diff options
Diffstat (limited to 'src/devices')
51 files changed, 1734 insertions, 1654 deletions
diff --git a/src/devices/bus/acorn/system/cass.cpp b/src/devices/bus/acorn/system/cass.cpp index 36038405a84..092a72f40a3 100644 --- a/src/devices/bus/acorn/system/cass.cpp +++ b/src/devices/bus/acorn/system/cass.cpp @@ -97,4 +97,4 @@ TIMER_DEVICE_CALLBACK_MEMBER(acorn_cass_device::cass_p) //m_bus->write_pb7(m_cass_data[1] < 12); m_cass_data[1] = 0; } -}
\ No newline at end of file +} diff --git a/src/devices/bus/hp_hil/hp_hil.h b/src/devices/bus/hp_hil/hp_hil.h index a11c53be461..6ed9d791ff7 100644 --- a/src/devices/bus/hp_hil/hp_hil.h +++ b/src/devices/bus/hp_hil/hp_hil.h @@ -11,8 +11,6 @@ #pragma once -#include "emu.h" - #define HPMLC_R1_OB 0x10 diff --git a/src/devices/bus/ti99/internal/evpcconn.h b/src/devices/bus/ti99/internal/evpcconn.h index 67e5784cd4f..945c151605c 100644 --- a/src/devices/bus/ti99/internal/evpcconn.h +++ b/src/devices/bus/ti99/internal/evpcconn.h @@ -11,7 +11,6 @@ #pragma once -#include "emu.h" #include "bus/ti99/ti99defs.h" namespace bus { namespace ti99 { namespace internal { diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h index d8ad6ef2c2f..adb45a04c78 100644 --- a/src/devices/cpu/m68000/m68kcpu.h +++ b/src/devices/cpu/m68000/m68kcpu.h @@ -1523,7 +1523,7 @@ inline void m68ki_exception_address_error() m_stopped = STOP_LEVEL_HALT; return; } - + m_run_mode = RUN_MODE_BERR_AERR_RESET_WSF; if (!CPU_TYPE_IS_010_PLUS()) diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp index e9d5f17b318..00ca50b1a3d 100644 --- a/src/devices/cpu/mips/mips3.cpp +++ b/src/devices/cpu/mips/mips3.cpp @@ -15,9 +15,9 @@ #include "mips3dsm.h" #include "ps2vu.h" -#define ENABLE_OVERFLOWS (0) -#define ENABLE_EE_ELF_LOADER (0) -#define ENABLE_EE_DECI2 (1) +#define ENABLE_OVERFLOWS (0) +#define ENABLE_EE_ELF_LOADER (0) +#define ENABLE_EE_DECI2 (1) /*************************************************************************** HELPER MACROS @@ -148,7 +148,7 @@ mips3_device::mips3_device(const machine_config &mconfig, device_type type, cons , m_ldr(endianness == ENDIANNESS_BIG ? &mips3_device::ldr_be : &mips3_device::ldr_le) , m_sdl(endianness == ENDIANNESS_BIG ? &mips3_device::sdl_be : &mips3_device::sdl_le) , m_sdr(endianness == ENDIANNESS_BIG ? &mips3_device::sdr_be : &mips3_device::sdr_le) - , m_data_bits(data_bits) + , m_data_bits(data_bits) , c_system_clock(0) , m_pfnmask(flavor == MIPS3_TYPE_VR4300 ? 0x000fffff : 0x00ffffff) , m_tlbentries(flavor == MIPS3_TYPE_VR4300 ? 32 : MIPS3_MAX_TLB_ENTRIES) @@ -389,34 +389,34 @@ void mips3_device::device_start() m_program = &space(AS_PROGRAM); if(m_program->endianness() == ENDIANNESS_LITTLE) { - if (m_data_bits == 32) - { - auto cache = m_program->cache<2, 0, ENDIANNESS_LITTLE>(); - m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); }; - m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); }; - } - else - { - auto cache = m_program->cache<3, 0, ENDIANNESS_LITTLE>(); - m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); }; - m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); }; - } + if (m_data_bits == 32) + { + auto cache = m_program->cache<2, 0, ENDIANNESS_LITTLE>(); + m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); }; + m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); }; + } + else + { + auto cache = m_program->cache<3, 0, ENDIANNESS_LITTLE>(); + m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); }; + m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); }; + } } else { - if (m_data_bits == 32) - { - auto cache = m_program->cache<2, 0, ENDIANNESS_BIG>(); - m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); }; - m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); }; - } - else - { - auto cache = m_program->cache<3, 0, ENDIANNESS_BIG>(); - m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); }; - m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); }; - } - } + if (m_data_bits == 32) + { + auto cache = m_program->cache<2, 0, ENDIANNESS_BIG>(); + m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); }; + m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); }; + } + else + { + auto cache = m_program->cache<3, 0, ENDIANNESS_BIG>(); + m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); }; + m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); }; + } + } /* set up the endianness */ m_program->accessors(m_memory); @@ -1492,37 +1492,37 @@ inline void mips3_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t inline void r5900le_device::WBYTE(offs_t address, uint8_t data) { - if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_byte)(*m_program, address, data); - else mips3_device::WBYTE(address, data); + if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_byte)(*m_program, address, data); + else mips3_device::WBYTE(address, data); } inline void r5900le_device::WHALF(offs_t address, uint16_t data) { - if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_word)(*m_program, address, data); - else mips3_device::WHALF(address, data); + if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_word)(*m_program, address, data); + else mips3_device::WHALF(address, data); } inline void r5900le_device::WWORD(offs_t address, uint32_t data) { - if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword)(*m_program, address, data); - else mips3_device::WWORD(address, data); + if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword)(*m_program, address, data); + else mips3_device::WWORD(address, data); } inline void r5900le_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask) { - if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask); - else mips3_device::WWORD_MASKED(address, data, mem_mask); + if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask); + else mips3_device::WWORD_MASKED(address, data, mem_mask); } inline void r5900le_device::WDOUBLE(offs_t address, uint64_t data) { - if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword)(*m_program, address, data); - else mips3_device::WDOUBLE(address, data); + if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword)(*m_program, address, data); + else mips3_device::WDOUBLE(address, data); } inline void r5900le_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask) { - if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask); - else mips3_device::WDOUBLE_MASKED(address, data, mem_mask); + if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask); + else mips3_device::WDOUBLE_MASKED(address, data, mem_mask); } inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t data_lo) @@ -1558,61 +1558,61 @@ inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t dat } inline bool r5900le_device::RBYTE(offs_t address, uint32_t *result) { - if (address >= 0x70000000 && address < 0x70004000) { - *result = (*m_memory.read_byte)(*m_program, address); - return true; - } - return mips3_device::RBYTE(address, result); + if (address >= 0x70000000 && address < 0x70004000) { + *result = (*m_memory.read_byte)(*m_program, address); + return true; + } + return mips3_device::RBYTE(address, result); } inline bool r5900le_device::RHALF(offs_t address, uint32_t *result) { - if (address >= 0x70000000 && address < 0x70004000) - { - *result = (*m_memory.read_word)(*m_program, address); - return true; - } - return mips3_device::RHALF(address, result); + if (address >= 0x70000000 && address < 0x70004000) + { + *result = (*m_memory.read_word)(*m_program, address); + return true; + } + return mips3_device::RHALF(address, result); } inline bool r5900le_device::RWORD(offs_t address, uint32_t *result) { - if (address >= 0x70000000 && address < 0x70004000) - { - *result = (*m_memory.read_dword)(*m_program, address); - return true; - } - return mips3_device::RWORD(address, result); + if (address >= 0x70000000 && address < 0x70004000) + { + *result = (*m_memory.read_dword)(*m_program, address); + return true; + } + return mips3_device::RWORD(address, result); } inline bool r5900le_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask) { - if (address >= 0x70000000 && address < 0x70004000) - { - *result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask); - return true; - } - return mips3_device::RWORD_MASKED(address, result, mem_mask); + if (address >= 0x70000000 && address < 0x70004000) + { + *result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask); + return true; + } + return mips3_device::RWORD_MASKED(address, result, mem_mask); } inline bool r5900le_device::RDOUBLE(offs_t address, uint64_t *result) { - if (address >= 0x70000000 && address < 0x70004000) - { - *result = (*m_memory.read_qword)(*m_program, address); - return true; - } - return mips3_device::RDOUBLE(address, result); + if (address >= 0x70000000 && address < 0x70004000) + { + *result = (*m_memory.read_qword)(*m_program, address); + return true; + } + return mips3_device::RDOUBLE(address, result); } inline bool r5900le_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask) { - if (address >= 0x70000000 && address < 0x70004000) - { - *result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask); - return true; - } - return mips3_device::RDOUBLE_MASKED(address, result, mem_mask); + if (address >= 0x70000000 && address < 0x70004000) + { + *result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask); + return true; + } + return mips3_device::RDOUBLE_MASKED(address, result, mem_mask); } inline bool r5900le_device::RQUAD(offs_t address, uint64_t *result_hi, uint64_t *result_lo) @@ -2952,12 +2952,12 @@ void mips3_device::handle_cop2(uint32_t op) switch (RSREG) { - case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_reg(RDREG); break; - case 0x01: /* DMFCz */ handle_dmfc2(op); break; - case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_creg(RDREG); break; - case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break; - case 0x05: /* DMTCz */ handle_dmtc2(op); break; - case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break; + case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_reg(RDREG); break; + case 0x01: /* DMFCz */ handle_dmfc2(op); break; + case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_creg(RDREG); break; + case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break; + case 0x05: /* DMTCz */ handle_dmtc2(op); break; + case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break; case 0x08: /* BC */ switch (RTREG) { @@ -3560,8 +3560,8 @@ void mips3_device::handle_special(uint32_t op) case 0x25: /* OR */ if (RDREG) RDVAL64 = RSVAL64 | RTVAL64; break; case 0x26: /* XOR */ if (RDREG) RDVAL64 = RSVAL64 ^ RTVAL64; break; case 0x27: /* NOR */ if (RDREG) RDVAL64 = ~(RSVAL64 | RTVAL64); break; - case 0x28: handle_extra_special(op); break; - case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (int64_t)RSVAL64 < (int64_t)RTVAL64; break; + case 0x28: handle_extra_special(op); break; + case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (int64_t)RSVAL64 < (int64_t)RTVAL64; break; case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (uint64_t)RSVAL64 < (uint64_t)RTVAL64; break; case 0x2c: /* DADD */ if (ENABLE_OVERFLOWS && RSVAL64 > ~RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1); @@ -3615,8 +3615,8 @@ void mips3_device::handle_idt(uint32_t op) void r5900le_device::handle_extra_base(uint32_t op) { - const int rs = (op >> 21) & 31; - const int rt = (op >> 16) & 31; + const int rs = (op >> 21) & 31; + const int rt = (op >> 16) & 31; switch (op >> 26) { @@ -3644,8 +3644,8 @@ void r5900le_device::handle_extra_base(uint32_t op) void r5900le_device::handle_extra_special(uint32_t op) { - const int rs = (op >> 21) & 31; - const int rd = (op >> 11) & 31; + const int rs = (op >> 21) & 31; + const int rd = (op >> 11) & 31; switch (op & 63) { @@ -3712,12 +3712,12 @@ void r5900le_device::handle_extra_cop1(uint32_t op) void r5900le_device::handle_idt(uint32_t op) { - const int rs = (op >> 21) & 31; - const int rt = (op >> 16) & 31; - const int rd = (op >> 11) & 31; - const int sa = (op >> 6) & 31; + const int rs = (op >> 21) & 31; + const int rt = (op >> 16) & 31; + const int rd = (op >> 11) & 31; + const int sa = (op >> 6) & 31; - switch (op & 0x3f) + switch (op & 0x3f) { case 0x00: /* MADD */ { @@ -3760,9 +3760,9 @@ void r5900le_device::handle_idt(uint32_t op) handle_mmi2(op); break; case 0x10: /* MFHI1 */ - if (rd) - m_core->r[rd] = m_core->rh[REG_HI]; - break; + if (rd) + m_core->r[rd] = m_core->rh[REG_HI]; + break; case 0x11: /* MTHI1 */ m_core->rh[REG_HI] = m_core->r[rs]; break; @@ -3787,13 +3787,13 @@ void r5900le_device::handle_idt(uint32_t op) printf("Unsupported instruction: MULTU1 @%08x\n", m_core->pc - 4); fflush(stdout); fatalerror("Unsupported parallel instruction\n"); break; case 0x1a: /* DIV1 */ - if (RTVAL32) - { - m_core->rh[REG_LO] = (int32_t)((int32_t)RSVAL32 / (int32_t)RTVAL32); - m_core->rh[REG_HI] = (int32_t)((int32_t)RSVAL32 % (int32_t)RTVAL32); - } - m_core->icount -= 35; // ? - break; + if (RTVAL32) + { + m_core->rh[REG_LO] = (int32_t)((int32_t)RSVAL32 / (int32_t)RTVAL32); + m_core->rh[REG_HI] = (int32_t)((int32_t)RSVAL32 % (int32_t)RTVAL32); + } + m_core->icount -= 35; // ? + break; case 0x1b: /* DIVU1 */ if (RTVAL32) { @@ -3936,11 +3936,11 @@ void r5900le_device::handle_idt(uint32_t op) void r5900le_device::handle_mmi0(uint32_t op) { - const int rs = (op >> 21) & 31; - const int rt = (op >> 16) & 31; - const int rd = (op >> 11) & 31; + const int rs = (op >> 21) & 31; + const int rt = (op >> 16) & 31; + const int rd = (op >> 11) & 31; - switch ((op >> 6) & 0x1f) + switch ((op >> 6) & 0x1f) { case 0x00: /* PADDW */ if (rd) @@ -4395,11 +4395,11 @@ void r5900le_device::handle_mmi0(uint32_t op) void r5900le_device::handle_mmi1(uint32_t op) { - const int rs = (op >> 21) & 31; - const int rt = (op >> 16) & 31; - const int rd = (op >> 11) & 31; + const int rs = (op >> 21) & 31; + const int rt = (op >> 16) & 31; + const int rd = (op >> 11) & 31; - switch ((op >> 6) & 0x1f) + switch ((op >> 6) & 0x1f) { case 0x01: /* PABSW */ if (rd) @@ -4634,8 +4634,8 @@ void r5900le_device::handle_mmi1(uint32_t op) } break; case 0x12: /* PEXTUW */ - if (rd) - { + if (rd) + { uint64_t rsval = m_core->rh[rs]; uint64_t rtval = m_core->rh[rt]; m_core->rh[rd] = (rsval & 0xffffffff00000000ULL) | (rtval >> 32); @@ -4759,9 +4759,9 @@ void r5900le_device::handle_mmi1(uint32_t op) void r5900le_device::handle_mmi2(uint32_t op) { - const int rs = (op >> 21) & 31; - const int rt = (op >> 16) & 31; - const int rd = (op >> 11) & 31; + const int rs = (op >> 21) & 31; + const int rt = (op >> 16) & 31; + const int rd = (op >> 11) & 31; switch ((op >> 6) & 0x1f) { @@ -4805,17 +4805,17 @@ void r5900le_device::handle_mmi2(uint32_t op) printf("Unsupported instruction: PMSUBW @%08x\n", m_core->pc - 4); fflush(stdout); fatalerror("Unsupported parallel instruction\n"); break; case 0x08: /* PMFHI */ - if (rd) - { - m_core->r[rd] = m_core->r[REG_HI]; - m_core->rh[rd] = m_core->rh[REG_HI]; + if (rd) + { + m_core->r[rd] = m_core->r[REG_HI]; + m_core->rh[rd] = m_core->rh[REG_HI]; } break; case 0x09: /* PMFLO */ - if (rd) - { - m_core->r[rd] = m_core->r[REG_LO]; - m_core->rh[rd] = m_core->rh[REG_LO]; + if (rd) + { + m_core->r[rd] = m_core->r[REG_LO]; + m_core->rh[rd] = m_core->rh[REG_LO]; } break; case 0x0a: /* PINTH */ @@ -4886,9 +4886,9 @@ void r5900le_device::handle_mmi2(uint32_t op) void r5900le_device::handle_mmi3(uint32_t op) { - const int rs = (op >> 21) & 31; - const int rt = (op >> 16) & 31; - const int rd = (op >> 11) & 31; + const int rs = (op >> 21) & 31; + const int rt = (op >> 16) & 31; + const int rd = (op >> 11) & 31; switch ((op >> 6) & 0x1f) { @@ -5433,25 +5433,25 @@ void mips3_device::load_elf() fread(buf, 1, size, elf); fclose(elf); - const uint32_t header_offset = *reinterpret_cast<uint32_t*>(&buf[0x1c]); - const uint16_t block_count = *reinterpret_cast<uint16_t*>(&buf[0x2c]); + const uint32_t header_offset = *reinterpret_cast<uint32_t*>(&buf[0x1c]); + const uint16_t block_count = *reinterpret_cast<uint16_t*>(&buf[0x2c]); - for (uint32_t i = 0; i < block_count; i++) - { + for (uint32_t i = 0; i < block_count; i++) + { const uint32_t *header_entry = reinterpret_cast<uint32_t*>(&buf[header_offset + i * 0x20]); - const uint32_t word_count = header_entry[4] >> 2; - const uint32_t file_offset = header_entry[1]; - const uint32_t *file_data = reinterpret_cast<uint32_t*>(&buf[file_offset]); - uint32_t addr = header_entry[3]; - for (uint32_t word = 0; word < word_count; word++) - { - WWORD(addr, file_data[word]); - addr += 4; - } + const uint32_t word_count = header_entry[4] >> 2; + const uint32_t file_offset = header_entry[1]; + const uint32_t *file_data = reinterpret_cast<uint32_t*>(&buf[file_offset]); + uint32_t addr = header_entry[3]; + for (uint32_t word = 0; word < word_count; word++) + { + WWORD(addr, file_data[word]); + addr += 4; + } } - const uint32_t entry_point = *reinterpret_cast<uint32_t*>(&buf[0x18]); + const uint32_t entry_point = *reinterpret_cast<uint32_t*>(&buf[0x18]); m_core->pc = entry_point; m_ppc = entry_point; diff --git a/src/devices/cpu/mips/mips3.h b/src/devices/cpu/mips/mips3.h index 6323ae5fd59..e36a5aa5fc8 100644 --- a/src/devices/cpu/mips/mips3.h +++ b/src/devices/cpu/mips/mips3.h @@ -50,183 +50,183 @@ REGISTER ENUMERATION ***************************************************************************/ enum { - MIPS3_PC = STATE_GENPC, - MIPS3_R0 = 1, - MIPS3_R1, - MIPS3_R2, - MIPS3_R3, - MIPS3_R4, - MIPS3_R5, - MIPS3_R6, - MIPS3_R7, - MIPS3_R8, - MIPS3_R9, - MIPS3_R10, - MIPS3_R11, - MIPS3_R12, - MIPS3_R13, - MIPS3_R14, - MIPS3_R15, - MIPS3_R16, - MIPS3_R17, - MIPS3_R18, - MIPS3_R19, - MIPS3_R20, - MIPS3_R21, - MIPS3_R22, - MIPS3_R23, - MIPS3_R24, - MIPS3_R25, - MIPS3_R26, - MIPS3_R27, - MIPS3_R28, - MIPS3_R29, - MIPS3_R30, - MIPS3_R31, - MIPS3_HI, - MIPS3_LO, - MIPS3_FPR0, - MIPS3_FPS0, - MIPS3_FPD0, - MIPS3_FPR1, - MIPS3_FPS1, - MIPS3_FPD1, - MIPS3_FPR2, - MIPS3_FPS2, - MIPS3_FPD2, - MIPS3_FPR3, - MIPS3_FPS3, - MIPS3_FPD3, - MIPS3_FPR4, - MIPS3_FPS4, - MIPS3_FPD4, - MIPS3_FPR5, - MIPS3_FPS5, - MIPS3_FPD5, - MIPS3_FPR6, - MIPS3_FPS6, - MIPS3_FPD6, - MIPS3_FPR7, - MIPS3_FPS7, - MIPS3_FPD7, - MIPS3_FPR8, - MIPS3_FPS8, - MIPS3_FPD8, - MIPS3_FPR9, - MIPS3_FPS9, - MIPS3_FPD9, - MIPS3_FPR10, - MIPS3_FPS10, - MIPS3_FPD10, - MIPS3_FPR11, - MIPS3_FPS11, - MIPS3_FPD11, - MIPS3_FPR12, - MIPS3_FPS12, - MIPS3_FPD12, - MIPS3_FPR13, - MIPS3_FPS13, - MIPS3_FPD13, - MIPS3_FPR14, - MIPS3_FPS14, - MIPS3_FPD14, - MIPS3_FPR15, - MIPS3_FPS15, - MIPS3_FPD15, - MIPS3_FPR16, - MIPS3_FPS16, - MIPS3_FPD16, - MIPS3_FPR17, - MIPS3_FPS17, - MIPS3_FPD17, - MIPS3_FPR18, - MIPS3_FPS18, - MIPS3_FPD18, - MIPS3_FPR19, - MIPS3_FPS19, - MIPS3_FPD19, - MIPS3_FPR20, - MIPS3_FPS20, - MIPS3_FPD20, - MIPS3_FPR21, - MIPS3_FPS21, - MIPS3_FPD21, - MIPS3_FPR22, - MIPS3_FPS22, - MIPS3_FPD22, - MIPS3_FPR23, - MIPS3_FPS23, - MIPS3_FPD23, - MIPS3_FPR24, - MIPS3_FPS24, - MIPS3_FPD24, - MIPS3_FPR25, - MIPS3_FPS25, - MIPS3_FPD25, - MIPS3_FPR26, - MIPS3_FPS26, - MIPS3_FPD26, - MIPS3_FPR27, - MIPS3_FPS27, - MIPS3_FPD27, - MIPS3_FPR28, - MIPS3_FPS28, - MIPS3_FPD28, - MIPS3_FPR29, - MIPS3_FPS29, - MIPS3_FPD29, - MIPS3_FPR30, - MIPS3_FPS30, - MIPS3_FPD30, - MIPS3_FPR31, - MIPS3_FPS31, - MIPS3_FPD31, - MIPS3_CCR1_31, - MIPS3_SR, - MIPS3_EPC, - MIPS3_CAUSE, - MIPS3_COUNT, - MIPS3_COMPARE, - MIPS3_INDEX, - MIPS3_RANDOM, - MIPS3_ENTRYHI, - MIPS3_ENTRYLO0, - MIPS3_ENTRYLO1, - MIPS3_PAGEMASK, - MIPS3_WIRED, - MIPS3_BADVADDR, - MIPS3_R0H, - MIPS3_R1H, - MIPS3_R2H, - MIPS3_R3H, - MIPS3_R4H, - MIPS3_R5H, - MIPS3_R6H, - MIPS3_R7H, - MIPS3_R8H, - MIPS3_R9H, - MIPS3_R10H, - MIPS3_R11H, - MIPS3_R12H, - MIPS3_R13H, - MIPS3_R14H, - MIPS3_R15H, - MIPS3_R16H, - MIPS3_R17H, - MIPS3_R18H, - MIPS3_R19H, - MIPS3_R20H, - MIPS3_R21H, - MIPS3_R22H, - MIPS3_R23H, - MIPS3_R24H, - MIPS3_R25H, - MIPS3_R26H, - MIPS3_R27H, - MIPS3_R28H, - MIPS3_R29H, - MIPS3_R30H, - MIPS3_R31H, + MIPS3_PC = STATE_GENPC, + MIPS3_R0 = 1, + MIPS3_R1, + MIPS3_R2, + MIPS3_R3, + MIPS3_R4, + MIPS3_R5, + MIPS3_R6, + MIPS3_R7, + MIPS3_R8, + MIPS3_R9, + MIPS3_R10, + MIPS3_R11, + MIPS3_R12, + MIPS3_R13, + MIPS3_R14, + MIPS3_R15, + MIPS3_R16, + MIPS3_R17, + MIPS3_R18, + MIPS3_R19, + MIPS3_R20, + MIPS3_R21, + MIPS3_R22, + MIPS3_R23, + MIPS3_R24, + MIPS3_R25, + MIPS3_R26, + MIPS3_R27, + MIPS3_R28, + MIPS3_R29, + MIPS3_R30, + MIPS3_R31, + MIPS3_HI, + MIPS3_LO, + MIPS3_FPR0, + MIPS3_FPS0, + MIPS3_FPD0, + MIPS3_FPR1, + MIPS3_FPS1, + MIPS3_FPD1, + MIPS3_FPR2, + MIPS3_FPS2, + MIPS3_FPD2, + MIPS3_FPR3, + MIPS3_FPS3, + MIPS3_FPD3, + MIPS3_FPR4, + MIPS3_FPS4, + MIPS3_FPD4, + MIPS3_FPR5, + MIPS3_FPS5, + MIPS3_FPD5, + MIPS3_FPR6, + MIPS3_FPS6, + MIPS3_FPD6, + MIPS3_FPR7, + MIPS3_FPS7, + MIPS3_FPD7, + MIPS3_FPR8, + MIPS3_FPS8, + MIPS3_FPD8, + MIPS3_FPR9, + MIPS3_FPS9, + MIPS3_FPD9, + MIPS3_FPR10, + MIPS3_FPS10, + MIPS3_FPD10, + MIPS3_FPR11, + MIPS3_FPS11, + MIPS3_FPD11, + MIPS3_FPR12, + MIPS3_FPS12, + MIPS3_FPD12, + MIPS3_FPR13, + MIPS3_FPS13, + MIPS3_FPD13, + MIPS3_FPR14, + MIPS3_FPS14, + MIPS3_FPD14, + MIPS3_FPR15, + MIPS3_FPS15, + MIPS3_FPD15, + MIPS3_FPR16, + MIPS3_FPS16, + MIPS3_FPD16, + MIPS3_FPR17, + MIPS3_FPS17, + MIPS3_FPD17, + MIPS3_FPR18, + MIPS3_FPS18, + MIPS3_FPD18, + MIPS3_FPR19, + MIPS3_FPS19, + MIPS3_FPD19, + MIPS3_FPR20, + MIPS3_FPS20, + MIPS3_FPD20, + MIPS3_FPR21, + MIPS3_FPS21, + MIPS3_FPD21, + MIPS3_FPR22, + MIPS3_FPS22, + MIPS3_FPD22, + MIPS3_FPR23, + MIPS3_FPS23, + MIPS3_FPD23, + MIPS3_FPR24, + MIPS3_FPS24, + MIPS3_FPD24, + MIPS3_FPR25, + MIPS3_FPS25, + MIPS3_FPD25, + MIPS3_FPR26, + MIPS3_FPS26, + MIPS3_FPD26, + MIPS3_FPR27, + MIPS3_FPS27, + MIPS3_FPD27, + MIPS3_FPR28, + MIPS3_FPS28, + MIPS3_FPD28, + MIPS3_FPR29, + MIPS3_FPS29, + MIPS3_FPD29, + MIPS3_FPR30, + MIPS3_FPS30, + MIPS3_FPD30, + MIPS3_FPR31, + MIPS3_FPS31, + MIPS3_FPD31, + MIPS3_CCR1_31, + MIPS3_SR, + MIPS3_EPC, + MIPS3_CAUSE, + MIPS3_COUNT, + MIPS3_COMPARE, + MIPS3_INDEX, + MIPS3_RANDOM, + MIPS3_ENTRYHI, + MIPS3_ENTRYLO0, + MIPS3_ENTRYLO1, + MIPS3_PAGEMASK, + MIPS3_WIRED, + MIPS3_BADVADDR, + MIPS3_R0H, + MIPS3_R1H, + MIPS3_R2H, + MIPS3_R3H, + MIPS3_R4H, + MIPS3_R5H, + MIPS3_R6H, + MIPS3_R7H, + MIPS3_R8H, + MIPS3_R9H, + MIPS3_R10H, + MIPS3_R11H, + MIPS3_R12H, + MIPS3_R13H, + MIPS3_R14H, + MIPS3_R15H, + MIPS3_R16H, + MIPS3_R17H, + MIPS3_R18H, + MIPS3_R19H, + MIPS3_R20H, + MIPS3_R21H, + MIPS3_R22H, + MIPS3_R23H, + MIPS3_R24H, + MIPS3_R25H, + MIPS3_R26H, + MIPS3_R27H, + MIPS3_R28H, + MIPS3_R29H, + MIPS3_R30H, + MIPS3_R31H, }; #define MIPS3_MAX_FASTRAM 3 @@ -251,9 +251,9 @@ STRUCTURES /* MIPS3 TLB entry */ struct mips3_tlb_entry { - uint64_t page_mask; - uint64_t entry_hi; - uint64_t entry_lo[2]; + uint64_t page_mask; + uint64_t entry_hi; + uint64_t entry_lo[2]; }; #define MIPS3_MAX_TLB_ENTRIES 48 @@ -271,363 +271,363 @@ struct mips3_tlb_entry { class mips3_frontend; class mips3_device : public cpu_device, public device_vtlb_interface { - friend class mips3_frontend; + friend class mips3_frontend; protected: - /* MIPS flavors */ - enum mips3_flavor { - /* MIPS III variants */ - MIPS3_TYPE_MIPS_III, - MIPS3_TYPE_VR4300, - MIPS3_TYPE_R4600, - MIPS3_TYPE_R4650, - MIPS3_TYPE_R4700, - MIPS3_TYPE_TX4925, - - /* MIPS IV variants */ - MIPS3_TYPE_MIPS_IV, - MIPS3_TYPE_R5000, - MIPS3_TYPE_VR5500, - MIPS3_TYPE_QED5271, - MIPS3_TYPE_R5900, - MIPS3_TYPE_RM7000 - }; + /* MIPS flavors */ + enum mips3_flavor { + /* MIPS III variants */ + MIPS3_TYPE_MIPS_III, + MIPS3_TYPE_VR4300, + MIPS3_TYPE_R4600, + MIPS3_TYPE_R4650, + MIPS3_TYPE_R4700, + MIPS3_TYPE_TX4925, + + /* MIPS IV variants */ + MIPS3_TYPE_MIPS_IV, + MIPS3_TYPE_R5000, + MIPS3_TYPE_VR5500, + MIPS3_TYPE_QED5271, + MIPS3_TYPE_R5900, + MIPS3_TYPE_RM7000 + }; public: - // construction/destruction - mips3_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, mips3_flavor flavor, endianness_t endiannes, uint32_t data_bits); + // construction/destruction + mips3_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, mips3_flavor flavor, endianness_t endiannes, uint32_t data_bits); - void set_icache_size(size_t icache_size) { c_icache_size = icache_size; } - void set_dcache_size(size_t dcache_size) { c_dcache_size = dcache_size; } - void set_system_clock(uint32_t system_clock) { c_system_clock = system_clock; } + void set_icache_size(size_t icache_size) { c_icache_size = icache_size; } + void set_dcache_size(size_t dcache_size) { c_dcache_size = dcache_size; } + void set_system_clock(uint32_t system_clock) { c_system_clock = system_clock; } - TIMER_CALLBACK_MEMBER(compare_int_callback); + TIMER_CALLBACK_MEMBER(compare_int_callback); - void add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base); - void clear_fastram(uint32_t select_start); - void mips3drc_set_options(uint32_t options); - void mips3drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles); - void burn_cycles(int32_t cycles); + void add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base); + void clear_fastram(uint32_t select_start); + void mips3drc_set_options(uint32_t options); + void mips3drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles); + void burn_cycles(int32_t cycles); protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - virtual void device_stop() override; - - // device_execute_interface overrides - virtual uint32_t execute_min_cycles() const override { return 1; } - virtual uint32_t execute_max_cycles() const override { return 40; } - virtual uint32_t execute_input_lines() const override { return 6; } - virtual void execute_run() override; - virtual void execute_set_input(int inputnum, int state) override; - virtual void execute_burn(int32_t cycles) override { m_totalcycles += cycles; } - - // device_memory_interface overrides - virtual space_config_vector memory_space_config() const override; - virtual bool memory_translate(int spacenum, int intention, offs_t &address) override; - - // device_state_interface overrides - virtual void state_export(const device_state_entry &entry) override; - virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; - - // device_disasm_interface overrides - virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; - - void invalid_instruction(uint32_t op); - - virtual bool RBYTE(offs_t address, uint32_t *result); - virtual bool RHALF(offs_t address, uint32_t *result); - virtual bool RWORD(offs_t address, uint32_t *result); - virtual bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask); - virtual bool RDOUBLE(offs_t address, uint64_t *result); - virtual bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask); - virtual void WBYTE(offs_t address, uint8_t data); - virtual void WHALF(offs_t address, uint16_t data); - virtual void WWORD(offs_t address, uint32_t data); - virtual void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask); - virtual void WDOUBLE(offs_t address, uint64_t data); - virtual void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask); - - struct internal_mips3_state { - /* core registers */ - uint32_t pc; - int icount; - uint64_t r[35]; - uint32_t sa; - - /* upper 64 bits of 128-bit GPRs (R5900 only) */ - uint64_t rh[35]; - - /* COP registers */ - uint64_t cpr[3][32]; - uint64_t ccr[3][32]; - uint32_t llbit; - float acc; - - /* VU0 registers (R5900 only) */ - float vfr[32][4]; // 0..3 = x..w - uint32_t vcr[32]; - float vumem[0x1000]; - float* vfmem; - uint32_t* vimem; - float vacc[4]; - float p; - - uint32_t* vr; - float* i; - float* q; - - uint32_t mode; /* current global mode */ - - /* parameters for subroutines */ - uint64_t numcycles; /* return value from gettotalcycles */ - const char * format; /* format string for print_debug */ - uint32_t arg0; /* print_debug argument 1 */ - uint32_t arg1; /* print_debug argument 2 */ - - uint64_t count_zero_time; - uint32_t compare_armed; - uint32_t jmpdest; /* destination jump target */ - }; - - /* core state */ - internal_mips3_state *m_core; - - address_space_config m_program_config; - mips3_flavor m_flavor; - - /* internal stuff */ - uint32_t m_ppc; - uint32_t m_nextpc; - uint32_t m_pcbase; - uint8_t m_cf[4][8]; - bool m_delayslot; - int m_op; - int m_interrupt_cycles; - uint32_t m_ll_value; - uint64_t m_lld_value; - uint32_t m_badcop_value; - - /* endian-dependent load/store */ - typedef void (mips3_device::*loadstore_func)(uint32_t op); - loadstore_func m_lwl; - loadstore_func m_lwr; - loadstore_func m_swl; - loadstore_func m_swr; - loadstore_func m_ldl; - loadstore_func m_ldr; - loadstore_func m_sdl; - loadstore_func m_sdr; - - address_space * m_program; - uint32_t m_data_bits; - std::function<u32(offs_t)> m_pr32; - std::function<const void * (offs_t)> m_prptr; - uint32_t c_system_clock; - uint32_t m_cpu_clock; - emu_timer * m_compare_int_timer; - - /* derived info based on flavor */ - uint32_t m_pfnmask; - uint8_t m_tlbentries; - - /* memory accesses */ - bool m_bigendian; - uint32_t m_byte_xor; - uint32_t m_word_xor; - data_accessors m_memory; - - /* cache memory */ - size_t c_icache_size; - size_t c_dcache_size; - - /* MMU */ - mips3_tlb_entry m_tlb[MIPS3_MAX_TLB_ENTRIES]; - - /* fast RAM */ - uint32_t m_fastram_select; - struct { - offs_t start; /* start of the RAM block */ - offs_t end; /* end of the RAM block */ - bool readonly; /* true if read-only */ - void * base; /* base in memory where the RAM lives */ - uint8_t * offset_base8; /* base in memory where the RAM lives, 8-bit pointer, with the start offset pre-applied */ - uint16_t * offset_base16; /* base in memory where the RAM lives, 16-bit pointer, with the start offset pre-applied */ - uint32_t * offset_base32; /* base in memory where the RAM lives, 32-bit pointer, with the start offset pre-applied */ - } m_fastram[MIPS3_MAX_FASTRAM]; - - uint32_t m_debugger_temp; - - /* core state */ - drc_cache m_cache; /* pointer to the DRC code cache */ - std::unique_ptr<drcuml_state> m_drcuml;/* DRC UML generator state */ - std::unique_ptr<mips3_frontend> m_drcfe; /* pointer to the DRC front-end state */ - uint32_t m_drcoptions; /* configurable DRC options */ - - /* internal stuff */ - uint8_t m_cache_dirty; /* true if we need to flush the cache */ - - /* tables */ - uint8_t m_fpmode[4]; /* FPU mode table */ - - /* register mappings */ - uml::parameter m_regmap[34]; /* parameter to register mappings for all 32 integer registers */ - uml::parameter m_regmaplo[34]; /* parameter to register mappings for all 32 integer registers */ - - /* subroutines */ - uml::code_handle * m_entry; /* entry point */ - uml::code_handle * m_nocode; /* nocode exception handler */ - uml::code_handle * m_out_of_cycles; /* out of cycles exception handler */ - uml::code_handle * m_tlb_mismatch; /* tlb mismatch handler */ - uml::code_handle * m_read8[3]; /* read byte */ - uml::code_handle * m_write8[3]; /* write byte */ - uml::code_handle * m_read16[3]; /* read half */ - uml::code_handle * m_write16[3]; /* write half */ - uml::code_handle * m_read32[3]; /* read word */ - uml::code_handle * m_read32mask[3]; /* read word masked */ - uml::code_handle * m_write32[3]; /* write word */ - uml::code_handle * m_write32mask[3]; /* write word masked */ - uml::code_handle * m_read64[3]; /* read double */ - uml::code_handle * m_read64mask[3]; /* read double masked */ - uml::code_handle * m_write64[3]; /* write double */ - uml::code_handle * m_write64mask[3]; /* write double masked */ - uml::code_handle * m_exception[18/*EXCEPTION_COUNT*/]; /* array of exception handlers */ - uml::code_handle * m_exception_norecover[18/*EXCEPTION_COUNT*/]; /* array of no-recover exception handlers */ - - /* hotspots */ - uint32_t m_hotspot_select; - struct { - offs_t pc; /* PC to consider */ - uint32_t opcode; /* required opcode at that PC */ - uint32_t cycles; /* number of cycles to eat when hit */ - } m_hotspot[MIPS3_MAX_HOTSPOTS]; - bool m_isdrc; - - - void generate_exception(int exception, int backup); - void generate_tlb_exception(int exception, offs_t address); - void check_irqs(); + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_stop() override; + + // device_execute_interface overrides + virtual uint32_t execute_min_cycles() const override { return 1; } + virtual uint32_t execute_max_cycles() const override { return 40; } + virtual uint32_t execute_input_lines() const override { return 6; } + virtual void execute_run() override; + virtual void execute_set_input(int inputnum, int state) override; + virtual void execute_burn(int32_t cycles) override { m_totalcycles += cycles; } + + // device_memory_interface overrides + virtual space_config_vector memory_space_config() const override; + virtual bool memory_translate(int spacenum, int intention, offs_t &address) override; + + // device_state_interface overrides + virtual void state_export(const device_state_entry &entry) override; + virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; + + // device_disasm_interface overrides + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + + void invalid_instruction(uint32_t op); + + virtual bool RBYTE(offs_t address, uint32_t *result); + virtual bool RHALF(offs_t address, uint32_t *result); + virtual bool RWORD(offs_t address, uint32_t *result); + virtual bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask); + virtual bool RDOUBLE(offs_t address, uint64_t *result); + virtual bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask); + virtual void WBYTE(offs_t address, uint8_t data); + virtual void WHALF(offs_t address, uint16_t data); + virtual void WWORD(offs_t address, uint32_t data); + virtual void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask); + virtual void WDOUBLE(offs_t address, uint64_t data); + virtual void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask); + + struct internal_mips3_state { + /* core registers */ + uint32_t pc; + int icount; + uint64_t r[35]; + uint32_t sa; + + /* upper 64 bits of 128-bit GPRs (R5900 only) */ + uint64_t rh[35]; + + /* COP registers */ + uint64_t cpr[3][32]; + uint64_t ccr[3][32]; + uint32_t llbit; + float acc; + + /* VU0 registers (R5900 only) */ + float vfr[32][4]; // 0..3 = x..w + uint32_t vcr[32]; + float vumem[0x1000]; + float* vfmem; + uint32_t* vimem; + float vacc[4]; + float p; + + uint32_t* vr; + float* i; + float* q; + + uint32_t mode; /* current global mode */ + + /* parameters for subroutines */ + uint64_t numcycles; /* return value from gettotalcycles */ + const char * format; /* format string for print_debug */ + uint32_t arg0; /* print_debug argument 1 */ + uint32_t arg1; /* print_debug argument 2 */ + + uint64_t count_zero_time; + uint32_t compare_armed; + uint32_t jmpdest; /* destination jump target */ + }; + + /* core state */ + internal_mips3_state *m_core; + + address_space_config m_program_config; + mips3_flavor m_flavor; + + /* internal stuff */ + uint32_t m_ppc; + uint32_t m_nextpc; + uint32_t m_pcbase; + uint8_t m_cf[4][8]; + bool m_delayslot; + int m_op; + int m_interrupt_cycles; + uint32_t m_ll_value; + uint64_t m_lld_value; + uint32_t m_badcop_value; + + /* endian-dependent load/store */ + typedef void (mips3_device::*loadstore_func)(uint32_t op); + loadstore_func m_lwl; + loadstore_func m_lwr; + loadstore_func m_swl; + loadstore_func m_swr; + loadstore_func m_ldl; + loadstore_func m_ldr; + loadstore_func m_sdl; + loadstore_func m_sdr; + + address_space * m_program; + uint32_t m_data_bits; + std::function<u32(offs_t)> m_pr32; + std::function<const void * (offs_t)> m_prptr; + uint32_t c_system_clock; + uint32_t m_cpu_clock; + emu_timer * m_compare_int_timer; + + /* derived info based on flavor */ + uint32_t m_pfnmask; + uint8_t m_tlbentries; + + /* memory accesses */ + bool m_bigendian; + uint32_t m_byte_xor; + uint32_t m_word_xor; + data_accessors m_memory; + + /* cache memory */ + size_t c_icache_size; + size_t c_dcache_size; + + /* MMU */ + mips3_tlb_entry m_tlb[MIPS3_MAX_TLB_ENTRIES]; + + /* fast RAM */ + uint32_t m_fastram_select; + struct { + offs_t start; /* start of the RAM block */ + offs_t end; /* end of the RAM block */ + bool readonly; /* true if read-only */ + void * base; /* base in memory where the RAM lives */ + uint8_t * offset_base8; /* base in memory where the RAM lives, 8-bit pointer, with the start offset pre-applied */ + uint16_t * offset_base16; /* base in memory where the RAM lives, 16-bit pointer, with the start offset pre-applied */ + uint32_t * offset_base32; /* base in memory where the RAM lives, 32-bit pointer, with the start offset pre-applied */ + } m_fastram[MIPS3_MAX_FASTRAM]; + + uint32_t m_debugger_temp; + + /* core state */ + drc_cache m_cache; /* pointer to the DRC code cache */ + std::unique_ptr<drcuml_state> m_drcuml;/* DRC UML generator state */ + std::unique_ptr<mips3_frontend> m_drcfe; /* pointer to the DRC front-end state */ + uint32_t m_drcoptions; /* configurable DRC options */ + + /* internal stuff */ + uint8_t m_cache_dirty; /* true if we need to flush the cache */ + + /* tables */ + uint8_t m_fpmode[4]; /* FPU mode table */ + + /* register mappings */ + uml::parameter m_regmap[34]; /* parameter to register mappings for all 32 integer registers */ + uml::parameter m_regmaplo[34]; /* parameter to register mappings for all 32 integer registers */ + + /* subroutines */ + uml::code_handle * m_entry; /* entry point */ + uml::code_handle * m_nocode; /* nocode exception handler */ + uml::code_handle * m_out_of_cycles; /* out of cycles exception handler */ + uml::code_handle * m_tlb_mismatch; /* tlb mismatch handler */ + uml::code_handle * m_read8[3]; /* read byte */ + uml::code_handle * m_write8[3]; /* write byte */ + uml::code_handle * m_read16[3]; /* read half */ + uml::code_handle * m_write16[3]; /* write half */ + uml::code_handle * m_read32[3]; /* read word */ + uml::code_handle * m_read32mask[3]; /* read word masked */ + uml::code_handle * m_write32[3]; /* write word */ + uml::code_handle * m_write32mask[3]; /* write word masked */ + uml::code_handle * m_read64[3]; /* read double */ + uml::code_handle * m_read64mask[3]; /* read double masked */ + uml::code_handle * m_write64[3]; /* write double */ + uml::code_handle * m_write64mask[3]; /* write double masked */ + uml::code_handle * m_exception[18/*EXCEPTION_COUNT*/]; /* array of exception handlers */ + uml::code_handle * m_exception_norecover[18/*EXCEPTION_COUNT*/]; /* array of no-recover exception handlers */ + + /* hotspots */ + uint32_t m_hotspot_select; + struct { + offs_t pc; /* PC to consider */ + uint32_t opcode; /* required opcode at that PC */ + uint32_t cycles; /* number of cycles to eat when hit */ + } m_hotspot[MIPS3_MAX_HOTSPOTS]; + bool m_isdrc; + + + void generate_exception(int exception, int backup); + void generate_tlb_exception(int exception, offs_t address); + void check_irqs(); public: - void mips3com_update_cycle_counting(); - void mips3com_asid_changed(); - void mips3com_tlbr(); - void mips3com_tlbwi(); - void mips3com_tlbwr(); - void mips3com_tlbp(); + void mips3com_update_cycle_counting(); + void mips3com_asid_changed(); + void mips3com_tlbr(); + void mips3com_tlbwi(); + void mips3com_tlbwr(); + void mips3com_tlbp(); private: - uint32_t compute_config_register(); - uint32_t compute_prid_register(); - - void tlb_map_entry(int tlbindex); - void tlb_write_common(int tlbindex); - - uint64_t get_cop0_reg(int idx); - void set_cop0_reg(int idx, uint64_t val); - uint64_t get_cop0_creg(int idx); - void set_cop0_creg(int idx, uint64_t val); - void handle_cop0(uint32_t op); - - uint32_t get_cop1_reg32(int idx); - uint64_t get_cop1_reg64(int idx); - void set_cop1_reg32(int idx, uint32_t val); - void set_cop1_reg64(int idx, uint64_t val); - uint64_t get_cop1_creg(int idx); - void set_cop1_creg(int idx, uint64_t val); - void handle_cop1_fr0(uint32_t op); - void handle_cop1_fr1(uint32_t op); - void handle_cop1x_fr0(uint32_t op); - void handle_cop1x_fr1(uint32_t op); - - virtual uint64_t get_cop2_reg(int idx); - virtual void set_cop2_reg(int idx, uint64_t val); - virtual uint64_t get_cop2_creg(int idx); - virtual void set_cop2_creg(int idx, uint64_t val); - void handle_cop2(uint32_t op); - - void handle_special(uint32_t op); - void handle_regimm(uint32_t op); - virtual void handle_extra_base(uint32_t op); - virtual void handle_extra_special(uint32_t op); - virtual void handle_extra_regimm(uint32_t op); - virtual void handle_extra_cop0(uint32_t op); - virtual void handle_extra_cop1(uint32_t op); - virtual void handle_extra_cop2(uint32_t op); - virtual void handle_idt(uint32_t op); - virtual void handle_ldc2(uint32_t op); - virtual void handle_sdc2(uint32_t op); - virtual void handle_dmfc2(uint32_t op); - virtual void handle_dmtc2(uint32_t op); - - void lwl_be(uint32_t op); - void lwr_be(uint32_t op); - void ldl_be(uint32_t op); - void ldr_be(uint32_t op); - void swl_be(uint32_t op); - void swr_be(uint32_t op); - void sdl_be(uint32_t op); - void sdr_be(uint32_t op); - void lwl_le(uint32_t op); - void lwr_le(uint32_t op); - void ldl_le(uint32_t op); - void ldr_le(uint32_t op); - void swl_le(uint32_t op); - void swr_le(uint32_t op); - void sdl_le(uint32_t op); - void sdr_le(uint32_t op); - void load_fast_iregs(drcuml_block &block); - void save_fast_iregs(drcuml_block &block); - void code_flush_cache(); - void code_compile_block(uint8_t mode, offs_t pc); + uint32_t compute_config_register(); + uint32_t compute_prid_register(); + + void tlb_map_entry(int tlbindex); + void tlb_write_common(int tlbindex); + + uint64_t get_cop0_reg(int idx); + void set_cop0_reg(int idx, uint64_t val); + uint64_t get_cop0_creg(int idx); + void set_cop0_creg(int idx, uint64_t val); + void handle_cop0(uint32_t op); + + uint32_t get_cop1_reg32(int idx); + uint64_t get_cop1_reg64(int idx); + void set_cop1_reg32(int idx, uint32_t val); + void set_cop1_reg64(int idx, uint64_t val); + uint64_t get_cop1_creg(int idx); + void set_cop1_creg(int idx, uint64_t val); + void handle_cop1_fr0(uint32_t op); + void handle_cop1_fr1(uint32_t op); + void handle_cop1x_fr0(uint32_t op); + void handle_cop1x_fr1(uint32_t op); + + virtual uint64_t get_cop2_reg(int idx); + virtual void set_cop2_reg(int idx, uint64_t val); + virtual uint64_t get_cop2_creg(int idx); + virtual void set_cop2_creg(int idx, uint64_t val); + void handle_cop2(uint32_t op); + + void handle_special(uint32_t op); + void handle_regimm(uint32_t op); + virtual void handle_extra_base(uint32_t op); + virtual void handle_extra_special(uint32_t op); + virtual void handle_extra_regimm(uint32_t op); + virtual void handle_extra_cop0(uint32_t op); + virtual void handle_extra_cop1(uint32_t op); + virtual void handle_extra_cop2(uint32_t op); + virtual void handle_idt(uint32_t op); + virtual void handle_ldc2(uint32_t op); + virtual void handle_sdc2(uint32_t op); + virtual void handle_dmfc2(uint32_t op); + virtual void handle_dmtc2(uint32_t op); + + void lwl_be(uint32_t op); + void lwr_be(uint32_t op); + void ldl_be(uint32_t op); + void ldr_be(uint32_t op); + void swl_be(uint32_t op); + void swr_be(uint32_t op); + void sdl_be(uint32_t op); + void sdr_be(uint32_t op); + void lwl_le(uint32_t op); + void lwr_le(uint32_t op); + void ldl_le(uint32_t op); + void ldr_le(uint32_t op); + void swl_le(uint32_t op); + void swr_le(uint32_t op); + void sdl_le(uint32_t op); + void sdr_le(uint32_t op); + void load_fast_iregs(drcuml_block &block); + void save_fast_iregs(drcuml_block &block); + void code_flush_cache(); + void code_compile_block(uint8_t mode, offs_t pc); public: - void func_get_cycles(); - void func_printf_exception(); - void func_printf_debug(); - void func_printf_probe(); - void func_unimplemented(); + void func_get_cycles(); + void func_printf_exception(); + void func_printf_debug(); + void func_printf_probe(); + void func_unimplemented(); private: - /* internal compiler state */ - struct compiler_state { - compiler_state &operator=(compiler_state &) = delete; - - uint32_t cycles; /* accumulated cycles */ - uint8_t checkints; /* need to check interrupts before next instruction */ - uint8_t checksoftints; /* need to check software interrupts before next instruction */ - uml::code_label labelnum; /* index for local labels */ - }; - - void static_generate_entry_point(); - void static_generate_nocode_handler(); - void static_generate_out_of_cycles(); - void static_generate_tlb_mismatch(); - void static_generate_exception(uint8_t exception, int recover, const char *name); - void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle *&handleptr); - - void generate_update_mode(drcuml_block &block); - void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception); - void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast); - void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); - void generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg); - - bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); - bool generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); - bool generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); - bool generate_idt(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); - - bool generate_set_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg); - bool generate_get_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg); - bool generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); - bool generate_cop1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); - bool generate_cop1x(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); - - void check_cop0_access(drcuml_block &block); - void check_cop1_access(drcuml_block &block); - void generate_badcop(drcuml_block &block, const int cop); - - void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op); - const char *log_desc_flags_to_string(uint32_t flags); - void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist); - void log_opcode_desc(const opcode_desc *desclist, int indent); + /* internal compiler state */ + struct compiler_state { + compiler_state &operator=(compiler_state &) = delete; + + uint32_t cycles; /* accumulated cycles */ + uint8_t checkints; /* need to check interrupts before next instruction */ + uint8_t checksoftints; /* need to check software interrupts before next instruction */ + uml::code_label labelnum; /* index for local labels */ + }; + + void static_generate_entry_point(); + void static_generate_nocode_handler(); + void static_generate_out_of_cycles(); + void static_generate_tlb_mismatch(); + void static_generate_exception(uint8_t exception, int recover, const char *name); + void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle *&handleptr); + + void generate_update_mode(drcuml_block &block); + void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception); + void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast); + void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + void generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg); + + bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + bool generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + bool generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + bool generate_idt(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + + bool generate_set_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg); + bool generate_get_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg); + bool generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + bool generate_cop1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + bool generate_cop1x(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); + + void check_cop0_access(drcuml_block &block); + void check_cop1_access(drcuml_block &block); + void generate_badcop(drcuml_block &block, const int cop); + + void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op); + const char *log_desc_flags_to_string(uint32_t flags); + void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist); + void log_opcode_desc(const opcode_desc *desclist, int indent); void load_elf(); }; @@ -635,268 +635,268 @@ private: class vr4300be_device : public mips3_device { public: - // construction/destruction - vr4300be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, VR4300BE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + vr4300be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, VR4300BE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_BIG, 32) // checkme + { + } }; class vr4300le_device : public mips3_device { public: - // construction/destruction - vr4300le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, VR4300LE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + vr4300le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, VR4300LE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class vr4310be_device : public mips3_device { public: - // construction/destruction - vr4310be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, VR4310BE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + vr4310be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, VR4310BE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_BIG, 32) // checkme + { + } }; class vr4310le_device : public mips3_device { public: - // construction/destruction - vr4310le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, VR4310LE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + vr4310le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, VR4310LE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class r4600be_device : public mips3_device { public: - // construction/destruction - r4600be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R4600BE, tag, owner, clock, MIPS3_TYPE_R4600, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + r4600be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4600BE, tag, owner, clock, MIPS3_TYPE_R4600, ENDIANNESS_BIG, 32) // checkme + { + } }; class r4600le_device : public mips3_device { public: - // construction/destruction - r4600le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R4600LE, tag, owner, clock, MIPS3_TYPE_R4600, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + r4600le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4600LE, tag, owner, clock, MIPS3_TYPE_R4600, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class r4650be_device : public mips3_device { public: - // construction/destruction - r4650be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R4650BE, tag, owner, clock, MIPS3_TYPE_R4650, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + r4650be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4650BE, tag, owner, clock, MIPS3_TYPE_R4650, ENDIANNESS_BIG, 32) // checkme + { + } }; class r4650le_device : public mips3_device { public: - // construction/destruction - r4650le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R4650LE, tag, owner, clock, MIPS3_TYPE_R4650, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + r4650le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4650LE, tag, owner, clock, MIPS3_TYPE_R4650, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class r4700be_device : public mips3_device { public: - // construction/destruction - r4700be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R4700BE, tag, owner, clock, MIPS3_TYPE_R4700, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + r4700be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4700BE, tag, owner, clock, MIPS3_TYPE_R4700, ENDIANNESS_BIG, 32) // checkme + { + } }; class r4700le_device : public mips3_device { public: - // construction/destruction - r4700le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R4700LE, tag, owner, clock, MIPS3_TYPE_R4700, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + r4700le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R4700LE, tag, owner, clock, MIPS3_TYPE_R4700, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class tx4925be_device : public mips3_device { public: - // construction/destruction - tx4925be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, TX4925BE, tag, owner, clock, MIPS3_TYPE_TX4925, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + tx4925be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, TX4925BE, tag, owner, clock, MIPS3_TYPE_TX4925, ENDIANNESS_BIG, 32) // checkme + { + } }; class tx4925le_device : public mips3_device { public: - // construction/destruction - tx4925le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, TX4925LE, tag, owner, clock, MIPS3_TYPE_TX4925, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + tx4925le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, TX4925LE, tag, owner, clock, MIPS3_TYPE_TX4925, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class r5000be_device : public mips3_device { public: - // construction/destruction - r5000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R5000BE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + r5000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R5000BE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_BIG, 32) // checkme + { + } }; class r5000le_device : public mips3_device { public: - // construction/destruction - r5000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R5000LE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + r5000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R5000LE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class vr5500be_device : public mips3_device { public: - // construction/destruction - vr5500be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, VR5500BE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_BIG, 32) { - } + // construction/destruction + vr5500be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, VR5500BE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_BIG, 32) { + } }; class vr5500le_device : public mips3_device { public: - // construction/destruction - vr5500le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, VR5500LE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + vr5500le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, VR5500LE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class r5900le_device : public mips3_device { public: - // construction/destruction - template <typename T> - r5900le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&vu0_tag) - : r5900le_device(mconfig, tag, owner, clock) + // construction/destruction + template <typename T> + r5900le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&vu0_tag) + : r5900le_device(mconfig, tag, owner, clock) { m_vu0.set_tag(std::forward<T>(vu0_tag)); - } + } - r5900le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, R5900LE, tag, owner, clock, MIPS3_TYPE_R5900, ENDIANNESS_LITTLE, 64) - , m_vu0(*this, finder_base::DUMMY_TAG) + r5900le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, R5900LE, tag, owner, clock, MIPS3_TYPE_R5900, ENDIANNESS_LITTLE, 64) + , m_vu0(*this, finder_base::DUMMY_TAG) { - } + } protected: virtual void device_start() override; - // device_disasm_interface overrides - virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; - - bool RBYTE(offs_t address, uint32_t *result) override; - bool RHALF(offs_t address, uint32_t *result) override; - bool RWORD(offs_t address, uint32_t *result) override; - bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask) override; - bool RDOUBLE(offs_t address, uint64_t *result) override; - bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask) override; - void WBYTE(offs_t address, uint8_t data) override; - void WHALF(offs_t address, uint16_t data) override; - void WWORD(offs_t address, uint32_t data) override; - void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask) override; - void WDOUBLE(offs_t address, uint64_t data) override; - void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask) override; - - bool RQUAD(offs_t address, uint64_t *result_hi, uint64_t *result_lo); + // device_disasm_interface overrides + virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + + bool RBYTE(offs_t address, uint32_t *result) override; + bool RHALF(offs_t address, uint32_t *result) override; + bool RWORD(offs_t address, uint32_t *result) override; + bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask) override; + bool RDOUBLE(offs_t address, uint64_t *result) override; + bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask) override; + void WBYTE(offs_t address, uint8_t data) override; + void WHALF(offs_t address, uint16_t data) override; + void WWORD(offs_t address, uint32_t data) override; + void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask) override; + void WDOUBLE(offs_t address, uint64_t data) override; + void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask) override; + + bool RQUAD(offs_t address, uint64_t *result_hi, uint64_t *result_lo); void WQUAD(offs_t address, uint64_t data_hi, uint64_t data_lo); - uint64_t get_cop2_reg(int idx) override; - void set_cop2_reg(int idx, uint64_t val) override; - uint64_t get_cop2_creg(int idx) override; - void set_cop2_creg(int idx, uint64_t val) override; - - void handle_extra_base(uint32_t op) override; - void handle_extra_special(uint32_t op) override; - void handle_extra_regimm(uint32_t op) override; - void handle_extra_cop0(uint32_t op) override; - void handle_extra_cop1(uint32_t op) override; - void handle_extra_cop2(uint32_t op) override; - void handle_idt(uint32_t op) override; - void handle_mmi0(uint32_t op); - void handle_mmi1(uint32_t op); - void handle_mmi2(uint32_t op); - void handle_mmi3(uint32_t op); - void handle_ldc2(uint32_t op) override; - void handle_sdc2(uint32_t op) override; - void handle_dmfc2(uint32_t op) override; - void handle_dmtc2(uint32_t op) override; - - required_device<sonyvu0_device> m_vu0; + uint64_t get_cop2_reg(int idx) override; + void set_cop2_reg(int idx, uint64_t val) override; + uint64_t get_cop2_creg(int idx) override; + void set_cop2_creg(int idx, uint64_t val) override; + + void handle_extra_base(uint32_t op) override; + void handle_extra_special(uint32_t op) override; + void handle_extra_regimm(uint32_t op) override; + void handle_extra_cop0(uint32_t op) override; + void handle_extra_cop1(uint32_t op) override; + void handle_extra_cop2(uint32_t op) override; + void handle_idt(uint32_t op) override; + void handle_mmi0(uint32_t op); + void handle_mmi1(uint32_t op); + void handle_mmi2(uint32_t op); + void handle_mmi3(uint32_t op); + void handle_ldc2(uint32_t op) override; + void handle_sdc2(uint32_t op) override; + void handle_dmfc2(uint32_t op) override; + void handle_dmtc2(uint32_t op) override; + + required_device<sonyvu0_device> m_vu0; }; class qed5271be_device : public mips3_device { public: - // construction/destruction - qed5271be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, QED5271BE, tag, owner, clock, MIPS3_TYPE_QED5271, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + qed5271be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, QED5271BE, tag, owner, clock, MIPS3_TYPE_QED5271, ENDIANNESS_BIG, 32) // checkme + { + } }; class qed5271le_device : public mips3_device { public: - // construction/destruction - qed5271le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, QED5271LE, tag, owner, clock, MIPS3_TYPE_QED5271, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + qed5271le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, QED5271LE, tag, owner, clock, MIPS3_TYPE_QED5271, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class rm7000be_device : public mips3_device { public: - // construction/destruction - rm7000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, RM7000BE, tag, owner, clock, MIPS3_TYPE_RM7000, ENDIANNESS_BIG, 32) // checkme - { - } + // construction/destruction + rm7000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, RM7000BE, tag, owner, clock, MIPS3_TYPE_RM7000, ENDIANNESS_BIG, 32) // checkme + { + } }; class rm7000le_device : public mips3_device { public: - // construction/destruction - rm7000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : mips3_device(mconfig, RM7000LE, tag, owner, clock, MIPS3_TYPE_RM7000, ENDIANNESS_LITTLE, 32) // checkme - { - } + // construction/destruction + rm7000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : mips3_device(mconfig, RM7000LE, tag, owner, clock, MIPS3_TYPE_RM7000, ENDIANNESS_LITTLE, 32) // checkme + { + } }; class mips3_frontend : public drc_frontend { public: - // construction/destruction - mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + // construction/destruction + mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + // required overrides + virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; private: - // internal helpers - bool describe_special(uint32_t op, opcode_desc &desc); - bool describe_regimm(uint32_t op, opcode_desc &desc); - bool describe_idt(uint32_t op, opcode_desc &desc); - bool describe_cop0(uint32_t op, opcode_desc &desc); - bool describe_cop1(uint32_t op, opcode_desc &desc); - bool describe_cop1x(uint32_t op, opcode_desc &desc); - bool describe_cop2(uint32_t op, opcode_desc &desc); - - // internal state - mips3_device *m_mips3; + // internal helpers + bool describe_special(uint32_t op, opcode_desc &desc); + bool describe_regimm(uint32_t op, opcode_desc &desc); + bool describe_idt(uint32_t op, opcode_desc &desc); + bool describe_cop0(uint32_t op, opcode_desc &desc); + bool describe_cop1(uint32_t op, opcode_desc &desc); + bool describe_cop1x(uint32_t op, opcode_desc &desc); + bool describe_cop2(uint32_t op, opcode_desc &desc); + + // internal state + mips3_device *m_mips3; }; diff --git a/src/devices/cpu/mips/mips3com.cpp b/src/devices/cpu/mips/mips3com.cpp index 294dd6b20e5..3893dfb19e0 100644 --- a/src/devices/cpu/mips/mips3com.cpp +++ b/src/devices/cpu/mips/mips3com.cpp @@ -367,7 +367,7 @@ void mips3_device::tlb_map_entry(int tlbindex) } /* get the number of pages from the page mask */ - /* R5900: if the S bit is set in EntryLo, it is the scratchpad, and is always 4 pages. */ + /* R5900: if the S bit is set in EntryLo, it is the scratchpad, and is always 4 pages. */ if ((entry->entry_lo[0] & 0x80000000) && m_flavor == MIPS3_TYPE_R5900) count = 4; else diff --git a/src/devices/cpu/mips/mips3com.h b/src/devices/cpu/mips/mips3com.h index 96fc9c28b09..83195ca037f 100644 --- a/src/devices/cpu/mips/mips3com.h +++ b/src/devices/cpu/mips/mips3com.h @@ -124,9 +124,9 @@ #define SR_IMEX4 0x00004000 #define SR_IMEX5 0x00008000 #define SR_DE 0x00010000 -#define SR_EIE 0x00010000 /* R5900/EE only, Enable IE bit */ +#define SR_EIE 0x00010000 /* R5900/EE only, Enable IE bit */ #define SR_CE 0x00020000 -#define SR_EDI 0x00020000 /* R5900/EE only, EI/DI instruction enable */ +#define SR_EDI 0x00020000 /* R5900/EE only, EI/DI instruction enable */ #define SR_CH 0x00040000 #define SR_SR 0x00100000 #define SR_TS 0x00200000 diff --git a/src/devices/cpu/mips/mips3dsm.cpp b/src/devices/cpu/mips/mips3dsm.cpp index e39bbab03c7..f394b99cb76 100644 --- a/src/devices/cpu/mips/mips3dsm.cpp +++ b/src/devices/cpu/mips/mips3dsm.cpp @@ -172,12 +172,12 @@ uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &s case 0x02: util::stream_format(stream, "tlbwi"); break; case 0x06: util::stream_format(stream, "tlbwr"); break; case 0x08: util::stream_format(stream, "tlbp"); break; - case 0x10: util::stream_format(stream, "rfe"); flags = STEP_OUT; break; - case 0x18: util::stream_format(stream, "eret"); break; - default: dasm_extra_cop0(pc, op, stream); break; + case 0x10: util::stream_format(stream, "rfe"); flags = STEP_OUT; break; + case 0x18: util::stream_format(stream, "eret"); break; + default: dasm_extra_cop0(pc, op, stream); break; } break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; } return flags; } @@ -841,9 +841,9 @@ uint32_t ee_disassembler::dasm_extra_special(uint32_t pc, uint32_t op, std::ostr switch (op & 63) { - case 0x28: util::stream_format(stream, "mfsa %s", reg[rd]); break; - case 0x29: util::stream_format(stream, "mtsa %s", reg[rs]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + case 0x28: util::stream_format(stream, "mfsa %s", reg[rd]); break; + case 0x29: util::stream_format(stream, "mtsa %s", reg[rs]); break; + default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; } return 0; } diff --git a/src/devices/cpu/mips/ps2vif1.cpp b/src/devices/cpu/mips/ps2vif1.cpp index cb5e5da275e..203511141b7 100644 --- a/src/devices/cpu/mips/ps2vif1.cpp +++ b/src/devices/cpu/mips/ps2vif1.cpp @@ -14,6 +14,10 @@ #include "emu.h" #include "ps2vif1.h" +#include "ps2vu.h" +#include "video/ps2gs.h" +#include "video/ps2gif.h" + DEFINE_DEVICE_TYPE(SONYPS2_VIF1, ps2_vif1_device, "ps2vif1", "PlayStation 2 VIF1") /*static*/ const size_t ps2_vif1_device::BUFFER_SIZE = 0x40; @@ -32,39 +36,43 @@ ps2_vif1_device::ps2_vif1_device(const machine_config &mconfig, const char *tag, { } +ps2_vif1_device::~ps2_vif1_device() +{ +} + void ps2_vif1_device::device_start() { set_icountptr(m_icount); save_item(NAME(m_icount)); - save_item(NAME(m_buffer)); - save_item(NAME(m_curr)); - save_item(NAME(m_end)); - - save_item(NAME(m_status)); - save_item(NAME(m_control)); - save_item(NAME(m_err)); - save_item(NAME(m_mark)); - save_item(NAME(m_cycle)); - save_item(NAME(m_mode)); - save_item(NAME(m_num)); - save_item(NAME(m_mask)); - save_item(NAME(m_code)); - save_item(NAME(m_itops)); - save_item(NAME(m_base)); - save_item(NAME(m_offset)); - save_item(NAME(m_tops)); - save_item(NAME(m_itop)); - save_item(NAME(m_top)); - - save_item(NAME(m_row_fill)); - save_item(NAME(m_col_fill)); - - save_item(NAME(m_data_needed)); - save_item(NAME(m_data_index)); - save_item(NAME(m_command)); - save_item(NAME(m_alignment)); + save_item(NAME(m_buffer)); + save_item(NAME(m_curr)); + save_item(NAME(m_end)); + + save_item(NAME(m_status)); + save_item(NAME(m_control)); + save_item(NAME(m_err)); + save_item(NAME(m_mark)); + save_item(NAME(m_cycle)); + save_item(NAME(m_mode)); + save_item(NAME(m_num)); + save_item(NAME(m_mask)); + save_item(NAME(m_code)); + save_item(NAME(m_itops)); + save_item(NAME(m_base)); + save_item(NAME(m_offset)); + save_item(NAME(m_tops)); + save_item(NAME(m_itop)); + save_item(NAME(m_top)); + + save_item(NAME(m_row_fill)); + save_item(NAME(m_col_fill)); + + save_item(NAME(m_data_needed)); + save_item(NAME(m_data_index)); + save_item(NAME(m_command)); + save_item(NAME(m_alignment)); save_item(NAME(m_mpg_count)); save_item(NAME(m_mpg_addr)); @@ -83,37 +91,37 @@ void ps2_vif1_device::device_reset() { m_icount = 0; - memset(m_buffer, 0, sizeof(uint32_t) * BUFFER_SIZE); - m_curr = 0; - m_end = 0; - - m_status = 0; - m_control = 0; - m_err = 0; - m_mark = 0; - m_cycle = 0; - m_mode = 0; - m_num = 0; - m_mask = 0; - m_code = 0; - m_itops = 0; - m_base = 0; - m_offset = 0; - m_tops = 0; - m_itop = 0; - m_top = 0; - - memset(m_row_fill, 0, sizeof(uint32_t) * 4); - memset(m_col_fill, 0, sizeof(uint32_t) * 4); - - m_data_needed = 0; - m_data_index = 0; - m_command = 0; - m_alignment = 0; - - m_mpg_count = 0; - m_mpg_addr = 0; - m_mpg_insn = 0; + memset(m_buffer, 0, sizeof(uint32_t) * BUFFER_SIZE); + m_curr = 0; + m_end = 0; + + m_status = 0; + m_control = 0; + m_err = 0; + m_mark = 0; + m_cycle = 0; + m_mode = 0; + m_num = 0; + m_mask = 0; + m_code = 0; + m_itops = 0; + m_base = 0; + m_offset = 0; + m_tops = 0; + m_itop = 0; + m_top = 0; + + memset(m_row_fill, 0, sizeof(uint32_t) * 4); + memset(m_col_fill, 0, sizeof(uint32_t) * 4); + + m_data_needed = 0; + m_data_index = 0; + m_command = 0; + m_alignment = 0; + + m_mpg_count = 0; + m_mpg_addr = 0; + m_mpg_insn = 0; m_unpack_count = 0; m_unpack_addr = 0; diff --git a/src/devices/cpu/mips/ps2vif1.h b/src/devices/cpu/mips/ps2vif1.h index 0ef8482280a..6241381e7dc 100644 --- a/src/devices/cpu/mips/ps2vif1.h +++ b/src/devices/cpu/mips/ps2vif1.h @@ -9,8 +9,8 @@ * */ -#ifndef DEVICES_MACHINE_VIF1_H -#define DEVICES_MACHINE_VIF1_H +#ifndef MAME_CPU_MIPS_PS2VIF1_H +#define MAME_CPU_MIPS_PS2VIF1_H #pragma once @@ -21,17 +21,18 @@ class ps2_vif1_device : public device_t, public device_execute_interface { public: template <typename T, typename U> - ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag) - : ps2_vif1_device(mconfig, tag, owner, clock) - { + ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag) + : ps2_vif1_device(mconfig, tag, owner, clock) + { m_gs.set_tag(std::forward<T>(gs_tag)); m_vu1.set_tag(std::forward<U>(vu1_tag)); } ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~ps2_vif1_device() override; - DECLARE_READ64_MEMBER(mmio_r); - DECLARE_WRITE64_MEMBER(mmio_w); + DECLARE_READ64_MEMBER(mmio_r); + DECLARE_WRITE64_MEMBER(mmio_w); DECLARE_READ32_MEMBER(regs_r); DECLARE_WRITE32_MEMBER(regs_w); @@ -41,8 +42,8 @@ public: bool fifo_available(uint32_t count) const { return (BUFFER_SIZE - m_end) >= count; } protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; virtual void execute_run() override; uint32_t calculate_unpack_count(); @@ -66,42 +67,42 @@ protected: STAT_MODE_DATA = 3, STAT_E_WAIT = (1 << 2), - STAT_GS_WAIT = (1 << 3), - STAT_MARK = (1 << 6), - STAT_DBUF = (1 << 7), + STAT_GS_WAIT = (1 << 3), + STAT_MARK = (1 << 6), + STAT_DBUF = (1 << 7), STAT_STALL_STOP = (1 << 8), STAT_STALL_FBRK = (1 << 9), STAT_STALL_INT = (1 << 10), - STAT_INT = (1 << 11), - STAT_BAD_TAG = (1 << 12), - STAT_BAD_CODE = (1 << 13), + STAT_INT = (1 << 11), + STAT_BAD_TAG = (1 << 12), + STAT_BAD_CODE = (1 << 13), STAT_FDR_TO_HOST = (1 << 23) }; enum : uint8_t { - CMD_INT = 0x80, - CMD_UNPACK_MASK = 0x10 + CMD_INT = 0x80, + CMD_UNPACK_MASK = 0x10 }; enum : uint8_t { - FMT_S32 = 0x00, - FMT_S16 = 0x01, - FMT_S8 = 0x02, - //FMT_UNK0 = 0x03, - FMT_V2_32 = 0x04, - FMT_V2_16 = 0x05, - FMT_V2_8 = 0x06, - //FMT_UNK1 = 0x07, - FMT_V3_32 = 0x08, - FMT_V3_16 = 0x09, - FMT_V3_8 = 0x0a, - //FMT_UNK2 = 0x0b, - FMT_V4_32 = 0x0c, - FMT_V4_16 = 0x0d, - FMT_V4_8 = 0x0e, - FMT_V4_5 = 0x0f, + FMT_S32 = 0x00, + FMT_S16 = 0x01, + FMT_S8 = 0x02, + //FMT_UNK0 = 0x03, + FMT_V2_32 = 0x04, + FMT_V2_16 = 0x05, + FMT_V2_8 = 0x06, + //FMT_UNK1 = 0x07, + FMT_V3_32 = 0x08, + FMT_V3_16 = 0x09, + FMT_V3_8 = 0x0a, + //FMT_UNK2 = 0x0b, + FMT_V4_32 = 0x0c, + FMT_V4_16 = 0x0d, + FMT_V4_8 = 0x0e, + FMT_V4_5 = 0x0f, }; required_device<ps2_gs_device> m_gs; @@ -109,28 +110,28 @@ protected: int m_icount; - uint32_t m_buffer[0x40]; - uint32_t m_curr; - uint32_t m_end; - - uint32_t m_status; - uint32_t m_control; - uint32_t m_err; - uint32_t m_mark; - uint32_t m_cycle; - uint32_t m_mode; - uint32_t m_num; - uint32_t m_mask; - uint32_t m_code; - uint32_t m_itops; - uint32_t m_base; - uint32_t m_offset; - uint32_t m_tops; - uint32_t m_itop; - uint32_t m_top; - - uint32_t m_row_fill[4]; - uint32_t m_col_fill[4]; + uint32_t m_buffer[0x40]; + uint32_t m_curr; + uint32_t m_end; + + uint32_t m_status; + uint32_t m_control; + uint32_t m_err; + uint32_t m_mark; + uint32_t m_cycle; + uint32_t m_mode; + uint32_t m_num; + uint32_t m_mask; + uint32_t m_code; + uint32_t m_itops; + uint32_t m_base; + uint32_t m_offset; + uint32_t m_tops; + uint32_t m_itop; + uint32_t m_top; + + uint32_t m_row_fill[4]; + uint32_t m_col_fill[4]; uint32_t m_data_needed; uint32_t m_data_index; @@ -149,13 +150,10 @@ protected: bool m_unpack_add_tops; uint8_t m_unpack_format; - static const size_t BUFFER_SIZE; - static const uint32_t FORMAT_SIZE[0x10]; + static const size_t BUFFER_SIZE; + static const uint32_t FORMAT_SIZE[0x10]; }; DECLARE_DEVICE_TYPE(SONYPS2_VIF1, ps2_vif1_device) -#include "video/ps2gs.h" -#include "ps2vu.h" - -#endif // DEVICES_MACHINE_PS2VIF1_H +#endif // MAME_CPU_MIPS_PS2VIF1_H diff --git a/src/devices/cpu/mips/ps2vu.cpp b/src/devices/cpu/mips/ps2vu.cpp index 3af58884aba..491af559fc9 100644 --- a/src/devices/cpu/mips/ps2vu.cpp +++ b/src/devices/cpu/mips/ps2vu.cpp @@ -11,6 +11,7 @@ #include "emu.h" #include "ps2vu.h" + #include "ps2vif1.h" #include "video/ps2gs.h" #include "video/ps2gif.h" @@ -20,8 +21,16 @@ DEFINE_DEVICE_TYPE(SONYPS2_VU0, sonyvu0_device, "sonyvu0", "Sony PlayStation 2 VU0") DEFINE_DEVICE_TYPE(SONYPS2_VU1, sonyvu1_device, "sonyvu1", "Sony PlayStation 2 VU1") -sonyvu_device::sonyvu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, - address_map_constructor micro_cons, address_map_constructor vu_cons, chip_type chiptype, uint32_t mem_size) +sonyvu_device::sonyvu_device( + const machine_config &mconfig, + device_type type, + const char *tag, + device_t *owner, + uint32_t clock, + address_map_constructor micro_cons, + address_map_constructor vu_cons, + chip_type chiptype, + uint32_t mem_size) : cpu_device(mconfig, type, tag, owner, clock) , m_micro_config("micro", ENDIANNESS_BIG, 64, 12, 0, micro_cons) , m_vu_config("vu", ENDIANNESS_BIG, 32, 12, 0, vu_cons) @@ -736,10 +745,10 @@ void sonyvu_device::execute_lower(const uint32_t op) { case 0x30: if (rs == 0 && rt == 0 && dest == 0) - { // NOP + { // NOP } else - { // MOVE + { // MOVE printf("Unsupported VU instruction: MOVE\n"); fflush(stdout); fatalerror("Unsupported VU instruction\n"); break; } break; diff --git a/src/devices/cpu/mips/ps2vu.h b/src/devices/cpu/mips/ps2vu.h index 9f22e9384ad..04b94c9a5f1 100644 --- a/src/devices/cpu/mips/ps2vu.h +++ b/src/devices/cpu/mips/ps2vu.h @@ -138,37 +138,37 @@ protected: // address spaces const address_space_config m_micro_config; const address_space_config m_vu_config; - address_space *m_micro_space; - address_space *m_vu_space; + address_space *m_micro_space; + address_space *m_vu_space; // core registers - uint32_t m_mem_size; - uint32_t m_mem_mask; + uint32_t m_mem_size; + uint32_t m_mem_mask; required_shared_ptr<uint64_t> m_micro_mem; required_shared_ptr<uint32_t> m_vu_mem; - float* m_vfmem; - uint32_t* m_vimem; + float* m_vfmem; + uint32_t* m_vimem; - float m_vfr[32][4]; // 0..3 = x..w - uint32_t m_vcr[32]; - float m_acc[4]; + float m_vfr[32][4]; // 0..3 = x..w + uint32_t m_vcr[32]; + float m_acc[4]; - float* m_v; + float* m_v; - uint32_t m_status_flag; - uint32_t m_mac_flag; - uint32_t m_clip_flag; - uint32_t m_r; - float m_i; - float m_q; + uint32_t m_status_flag; + uint32_t m_mac_flag; + uint32_t m_clip_flag; + uint32_t m_r; + float m_i; + float m_q; - uint32_t m_pc; - uint32_t m_delay_pc; - uint32_t m_start_pc; + uint32_t m_pc; + uint32_t m_delay_pc; + uint32_t m_start_pc; - bool m_running; + bool m_running; - int m_icount; + int m_icount; }; class sonyvu1_device : public sonyvu_device @@ -185,8 +185,8 @@ public: ps2_vif1_device* interface(); - DECLARE_READ64_MEMBER(vif_r); - DECLARE_WRITE64_MEMBER(vif_w); + DECLARE_READ64_MEMBER(vif_r); + DECLARE_WRITE64_MEMBER(vif_w); protected: virtual void device_start() override; @@ -232,17 +232,14 @@ protected: required_device<sonyvu1_device> m_vu1; - float* m_vu1_regs; - uint32_t m_control; - uint32_t m_vpu_stat; - uint32_t m_cmsar0; - uint32_t m_cmsar1; + float* m_vu1_regs; + uint32_t m_control; + uint32_t m_vpu_stat; + uint32_t m_cmsar0; + uint32_t m_cmsar1; }; DECLARE_DEVICE_TYPE(SONYPS2_VU1, sonyvu1_device) DECLARE_DEVICE_TYPE(SONYPS2_VU0, sonyvu0_device) -#include "video/ps2gs.h" -#include "cpu/mips/ps2vif1.h" - #endif // MAME_CPU_MIPS_PS2VU_H diff --git a/src/devices/cpu/mips/r3000.cpp b/src/devices/cpu/mips/r3000.cpp index a0084fd4c48..6495c922f86 100644 --- a/src/devices/cpu/mips/r3000.cpp +++ b/src/devices/cpu/mips/r3000.cpp @@ -15,7 +15,7 @@ #define ENABLE_OVERFLOWS (0) -#define ENABLE_IOP_KPUTS (1) +#define ENABLE_IOP_KPUTS (1) /*************************************************************************** diff --git a/src/devices/cpu/mips/vudasm.cpp b/src/devices/cpu/mips/vudasm.cpp index e3f7ab470d8..cb207498d1d 100644 --- a/src/devices/cpu/mips/vudasm.cpp +++ b/src/devices/cpu/mips/vudasm.cpp @@ -298,7 +298,7 @@ void sonyvu_disassembler::dasm_lower(uint32_t pc, uint32_t op, std::ostream &str util::stream_format(stream, "mtir %s, %s%s", VIREG[rt], VFREG[rs], fsf); break; case 0x3d: // MFIR - util::stream_format(stream, "mtir.%s %s%s %s", dest, VFREG[rt], destc, VIREG[rs] ); + util::stream_format(stream, "mtir.%s %s%s %s", dest, VFREG[rt], destc, VIREG[rs] ); break; case 0x3e: // ILWR util::stream_format(stream, "ilwr.%s %s, (%s)%s", dest, VIREG[rt], VIREG[rs], dest); diff --git a/src/devices/cpu/mips/vudasm.h b/src/devices/cpu/mips/vudasm.h index a2bbf5fb310..abd67ed89aa 100644 --- a/src/devices/cpu/mips/vudasm.h +++ b/src/devices/cpu/mips/vudasm.h @@ -38,4 +38,4 @@ private: static const char * VIREG[32]; }; -#endif // MAME_CPU_MIPS_VUDASM_H
\ No newline at end of file +#endif // MAME_CPU_MIPS_VUDASM_H diff --git a/src/devices/machine/i8255.cpp b/src/devices/machine/i8255.cpp index ff2a43f3caf..4d1bee6e2a6 100644 --- a/src/devices/machine/i8255.cpp +++ b/src/devices/machine/i8255.cpp @@ -590,7 +590,7 @@ void i8255_device::set_mode(uint8_t data) m_control = m_control & ~CONTROL_PORT_C_UPPER_INPUT; m_control = m_control & ~CONTROL_PORT_C_LOWER_INPUT; } - + // group A if (!m_dont_clear_output_latches) m_output[PORT_A] = 0; diff --git a/src/devices/machine/i8255.h b/src/devices/machine/i8255.h index 3258f29256a..59ead81e797 100644 --- a/src/devices/machine/i8255.h +++ b/src/devices/machine/i8255.h @@ -117,7 +117,7 @@ protected: const bool m_force_portb_in; const bool m_force_portc_out; const bool m_dont_clear_output_latches; - + private: inline void check_interrupt(int port); inline void set_ibf(int port, int state); diff --git a/src/devices/machine/iopcdvd.cpp b/src/devices/machine/iopcdvd.cpp index 24c7136221c..a1e32e48a1c 100644 --- a/src/devices/machine/iopcdvd.cpp +++ b/src/devices/machine/iopcdvd.cpp @@ -9,6 +9,7 @@ * */ +#include "emu.h" #include "iopcdvd.h" DEFINE_DEVICE_TYPE(SONYIOP_CDVD, iop_cdvd_device, "iopcdvd", "PlayStation 2 disc controller") @@ -21,6 +22,10 @@ iop_cdvd_device::iop_cdvd_device(const machine_config &mconfig, const char *tag, { } +iop_cdvd_device::~iop_cdvd_device() +{ +} + void iop_cdvd_device::device_start() { save_item(NAME(m_channel[0].m_buffer)); diff --git a/src/devices/machine/iopcdvd.h b/src/devices/machine/iopcdvd.h index ddc164760cb..e5d95f0322f 100644 --- a/src/devices/machine/iopcdvd.h +++ b/src/devices/machine/iopcdvd.h @@ -9,32 +9,32 @@ * */ -#ifndef DEVICES_MACHINE_IOPCDVD_H -#define DEVICES_MACHINE_IOPCDVD_H +#ifndef MAME_MACHINE_IOPCDVD_H +#define MAME_MACHINE_IOPCDVD_H #pragma once -#include "emu.h" #include "iopintc.h" class iop_cdvd_device : public device_t { public: template <typename T> - iop_cdvd_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag) - : iop_cdvd_device(mconfig, tag, owner, (uint32_t)0) - { + iop_cdvd_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag) + : iop_cdvd_device(mconfig, tag, owner, (uint32_t)0) + { m_intc.set_tag(std::forward<T>(intc_tag)); } - iop_cdvd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + iop_cdvd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~iop_cdvd_device() override; DECLARE_READ8_MEMBER(read); DECLARE_WRITE8_MEMBER(write); protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; void handle_data_command(uint8_t data); void data_fifo_push(uint8_t data); @@ -70,4 +70,4 @@ protected: DECLARE_DEVICE_TYPE(SONYIOP_CDVD, iop_cdvd_device) -#endif // DEVICES_MACHINE_IOPCDVD_H
\ No newline at end of file +#endif // MAME_MACHINE_IOPCDVD_H diff --git a/src/devices/machine/iopdma.cpp b/src/devices/machine/iopdma.cpp index 883a03eafd0..97b170a0a1a 100644 --- a/src/devices/machine/iopdma.cpp +++ b/src/devices/machine/iopdma.cpp @@ -11,8 +11,10 @@ #include "emu.h" #include "iopdma.h" + #include "cpu/mips/ps2vu.h" + DEFINE_DEVICE_TYPE(SONYIOP_DMA, iop_dma_device, "iopdma", "PlayStation 2 IOP DMAC") iop_dma_device::iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -27,6 +29,10 @@ iop_dma_device::iop_dma_device(const machine_config &mconfig, const char *tag, d { } +iop_dma_device::~iop_dma_device() +{ +} + void iop_dma_device::device_start() { set_icountptr(m_icount); @@ -237,7 +243,7 @@ void iop_dma_device::transfer_spu(uint32_t chan) //if (first_bank) //m_intc->raise_interrupt(iop_intc_device::INT_SPU); - transfer_finish(chan); + transfer_finish(chan); } } diff --git a/src/devices/machine/iopdma.h b/src/devices/machine/iopdma.h index 36e38556026..2492f7929ec 100644 --- a/src/devices/machine/iopdma.h +++ b/src/devices/machine/iopdma.h @@ -9,12 +9,11 @@ * */ -#ifndef DEVICES_MACHINE_IOPDMA_H -#define DEVICES_MACHINE_IOPDMA_H +#ifndef MAME_MACHINE_IOPDMA_H +#define MAME_MACHINE_IOPDMA_H #pragma once -#include "emu.h" #include "ps2sif.h" #include "iopintc.h" #include "iopsio2.h" @@ -24,9 +23,9 @@ class iop_dma_device : public device_t, public device_execute_interface { public: template <typename T, typename U, typename V, typename W, typename X> - iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&intc_tag, U &&ram_tag, V &&sif_tag, W &&spu_tag, X &&sio2_tag) - : iop_dma_device(mconfig, tag, owner, clock) - { + iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&intc_tag, U &&ram_tag, V &&sif_tag, W &&spu_tag, X &&sio2_tag) + : iop_dma_device(mconfig, tag, owner, clock) + { m_intc.set_tag(std::forward<T>(intc_tag)); m_ram.set_tag(std::forward<U>(ram_tag)); m_sif.set_tag(std::forward<V>(sif_tag)); @@ -34,7 +33,8 @@ public: m_sio2.set_tag(std::forward<X>(sio2_tag)); } - iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + iop_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~iop_dma_device() override; DECLARE_READ32_MEMBER(bank0_r); DECLARE_WRITE32_MEMBER(bank0_w); @@ -127,8 +127,8 @@ protected: uint32_t m_count; }; - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; virtual void execute_run() override; void set_dpcr(uint32_t data, uint32_t index); @@ -161,4 +161,4 @@ protected: DECLARE_DEVICE_TYPE(SONYIOP_DMA, iop_dma_device) -#endif // DEVICES_MACHINE_IOPDMA_H
\ No newline at end of file +#endif // MAME_MACHINE_IOPDMA_H diff --git a/src/devices/machine/iopintc.cpp b/src/devices/machine/iopintc.cpp index 9cace039047..9ffc14a6fe3 100644 --- a/src/devices/machine/iopintc.cpp +++ b/src/devices/machine/iopintc.cpp @@ -9,6 +9,7 @@ * */ +#include "emu.h" #include "iopintc.h" DEFINE_DEVICE_TYPE(SONYIOP_INTC, iop_intc_device, "iopintc", "PlayStation 2 IOP INTC") @@ -19,6 +20,10 @@ iop_intc_device::iop_intc_device(const machine_config &mconfig, const char *tag, { } +iop_intc_device::~iop_intc_device() +{ +} + void iop_intc_device::device_start() { save_item(NAME(m_status)); diff --git a/src/devices/machine/iopintc.h b/src/devices/machine/iopintc.h index d58b1ef52c7..ed326e3c7bf 100644 --- a/src/devices/machine/iopintc.h +++ b/src/devices/machine/iopintc.h @@ -9,25 +9,25 @@ * */ -#ifndef DEVICES_MACHINE_IOPINTC_H -#define DEVICES_MACHINE_IOPINTC_H +#ifndef MAME_MACHINE_IOPINTC_H +#define MAME_MACHINE_IOPINTC_H #pragma once -#include "emu.h" #include "cpu/mips/r3000.h" class iop_intc_device : public device_t { public: template <typename T> - iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&iop_tag) - : iop_intc_device(mconfig, tag, owner, (uint32_t)0) - { + iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&iop_tag) + : iop_intc_device(mconfig, tag, owner, (uint32_t)0) + { m_iop.set_tag(std::forward<T>(iop_tag)); } - iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + iop_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~iop_intc_device() override; DECLARE_READ32_MEMBER(read); DECLARE_WRITE32_MEMBER(write); @@ -45,8 +45,8 @@ public: }; protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; void update_interrupts(); @@ -58,4 +58,4 @@ protected: DECLARE_DEVICE_TYPE(SONYIOP_INTC, iop_intc_device) -#endif // DEVICES_MACHINE_IOPINTC_H
\ No newline at end of file +#endif // MAME_MACHINE_IOPINTC_H diff --git a/src/devices/machine/iopsio2.cpp b/src/devices/machine/iopsio2.cpp index a779d8d4631..d0a15d97446 100644 --- a/src/devices/machine/iopsio2.cpp +++ b/src/devices/machine/iopsio2.cpp @@ -9,6 +9,7 @@ * */ +#include "emu.h" #include "iopsio2.h" DEFINE_DEVICE_TYPE(SONYIOP_SIO2, iop_sio2_device, "iopsio2", "PlayStation 2 IOP SIO2") @@ -24,6 +25,10 @@ iop_sio2_device::iop_sio2_device(const machine_config &mconfig, const char *tag, { } +iop_sio2_device::~iop_sio2_device() +{ +} + void iop_sio2_device::device_start() { if (!m_response_timer) @@ -241,29 +246,29 @@ void iop_sio2_device::transmit_to_device_hack(uint8_t data) if (!m_cmd_size) { - m_response_timer->adjust(attotime::from_ticks(8*pad(m_curr_port)->xmit_fifo_depth(), 250'000), m_curr_port); - m_curr_port++; + m_response_timer->adjust(attotime::from_ticks(8*pad(m_curr_port)->xmit_fifo_depth(), 250'000), m_curr_port); + m_curr_port++; }*/ break; case ps2_mc_device::SIO_DEVICE_ID: /*if (m_cmd_size || cmd_complete) { - logerror("Pushing %02x to memory card, m_cmd_size is %d\n", data, m_cmd_size); - m_mc0->recv_fifo_push(data); + logerror("Pushing %02x to memory card, m_cmd_size is %d\n", data, m_cmd_size); + m_mc0->recv_fifo_push(data); } if (cmd_complete) { - logerror("Command is complete, processing fifos\n"); - m_unknown_0x6c = 0x00001100; - m_mc0->process_fifos(); - while (m_mc0->xmit_fifo_depth() && m_end_byte < BUFFER_SIZE) - { - logerror("xmit fifo is %d, end byte is %d\n", m_mc0->xmit_fifo_depth(), m_end_byte); - receive_from_device_hack(m_mc0->xmit_fifo_pop()); - } - m_unknown_0x74 = m_cmd_length; + logerror("Command is complete, processing fifos\n"); + m_unknown_0x6c = 0x00001100; + m_mc0->process_fifos(); + while (m_mc0->xmit_fifo_depth() && m_end_byte < BUFFER_SIZE) + { + logerror("xmit fifo is %d, end byte is %d\n", m_mc0->xmit_fifo_depth(), m_end_byte); + receive_from_device_hack(m_mc0->xmit_fifo_pop()); + } + m_unknown_0x74 = m_cmd_length; }*/ m_unknown_0x6c = 0x0001d100; // TODO: As above receive_from_device_hack(0); diff --git a/src/devices/machine/iopsio2.h b/src/devices/machine/iopsio2.h index bfe69680c5c..fe1193ba09e 100644 --- a/src/devices/machine/iopsio2.h +++ b/src/devices/machine/iopsio2.h @@ -9,12 +9,11 @@ * */ -#ifndef DEVICES_MACHINE_IOPSIO2_H -#define DEVICES_MACHINE_IOPSIO2_H +#ifndef MAME_MACHINE_IOPSIO2_H +#define MAME_MACHINE_IOPSIO2_H #pragma once -#include "emu.h" #include "iopintc.h" #include "ps2pad.h" #include "ps2mc.h" @@ -23,16 +22,17 @@ class iop_sio2_device : public device_t { public: template <typename T, typename U, typename V, typename W> - iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag, U &&pad0_tag, V &&pad1_tag, W &&mc0_tag) - : iop_sio2_device(mconfig, tag, owner, (uint32_t)0) - { + iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag, U &&pad0_tag, V &&pad1_tag, W &&mc0_tag) + : iop_sio2_device(mconfig, tag, owner, (uint32_t)0) + { m_intc.set_tag(std::forward<T>(intc_tag)); m_pad0.set_tag(std::forward<U>(pad0_tag)); m_pad1.set_tag(std::forward<V>(pad1_tag)); m_mc0.set_tag(std::forward<W>(mc0_tag)); } - iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + iop_sio2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~iop_sio2_device() override; DECLARE_READ32_MEMBER(read); DECLARE_WRITE32_MEMBER(write); @@ -43,8 +43,8 @@ public: void receive_from_device_hack(uint8_t data); // TODO: Turn me into a bus interface! protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; TIMER_CALLBACK_MEMBER(response_timer); @@ -87,4 +87,4 @@ protected: DECLARE_DEVICE_TYPE(SONYIOP_SIO2, iop_sio2_device) -#endif // DEVICES_MACHINE_IOPSIO2_H
\ No newline at end of file +#endif // MAME_MACHINE_IOPSIO2_H diff --git a/src/devices/machine/ioptimer.cpp b/src/devices/machine/ioptimer.cpp index 31c6c4fd6f2..a02f6c88ea5 100644 --- a/src/devices/machine/ioptimer.cpp +++ b/src/devices/machine/ioptimer.cpp @@ -18,8 +18,8 @@ iop_timer_device::iop_timer_device(const machine_config &mconfig, const char *ta : device_t(mconfig, SONYIOP_TIMER, tag, owner, clock) , m_compare_timer(nullptr) , m_overflow_timer(nullptr) - , m_last_update_time(attotime::zero) - , m_elapsed_time(attotime::zero) + , m_last_update_time(attotime::zero) + , m_elapsed_time(attotime::zero) , m_zero_return(false) , m_count(0) , m_compare(0) @@ -49,8 +49,8 @@ void iop_timer_device::device_reset() { m_ctrl = 0; - m_last_update_time = attotime::zero; - m_elapsed_time = attotime::zero; + m_last_update_time = attotime::zero; + m_elapsed_time = attotime::zero; m_zero_return = false; @@ -101,14 +101,14 @@ void iop_timer_device::update_overflow_timer() uint32_t ticks = 0; if (m_zero_return) { - if (m_compare > m_count) - ticks = m_compare - m_count; - else - ticks = (uint32_t)(0x100000000ULL - (m_count - m_compare)); + if (m_compare > m_count) + ticks = m_compare - m_count; + else + ticks = (uint32_t)(0x100000000ULL - (m_count - m_compare)); } else { - ticks = (uint32_t)(0x100000000ULL - m_count); + ticks = (uint32_t)(0x100000000ULL - m_count); } */ m_overflow_timer->adjust(attotime::never); @@ -116,38 +116,38 @@ void iop_timer_device::update_overflow_timer() void iop_timer_device::update_count() { - attotime curr_time = machine().scheduler().time(); - attotime time_delta = curr_time - m_last_update_time; - m_last_update_time = curr_time; - m_elapsed_time += time_delta; - uint32_t ticks = (uint32_t)m_elapsed_time.as_ticks(clock()); - if (ticks > 0) - { - m_elapsed_time -= attotime::from_ticks(ticks, clock()); - m_count += ticks; - } + attotime curr_time = machine().scheduler().time(); + attotime time_delta = curr_time - m_last_update_time; + m_last_update_time = curr_time; + m_elapsed_time += time_delta; + uint32_t ticks = (uint32_t)m_elapsed_time.as_ticks(clock()); + if (ticks > 0) + { + m_elapsed_time -= attotime::from_ticks(ticks, clock()); + m_count += ticks; + } } void iop_timer_device::set_ctrl(uint32_t data) { - static const char *gatm_names[4] = { "low?", "reset+rising?", "reset+falling?", "reset+both?" }; - logerror("%s: set_ctrl: GATE=%d, GATM=%s, ZRET=%d\n", machine().describe_context(), data & CTRL_GATE, gatm_names[(data & CTRL_GATM) >> 1], (data & CTRL_ZRET) >> 3); - logerror("%s: CMPE=%d, OVFE=%d, REP_INT=%d, TOG_INT=%d\n", machine().describe_context(), (data & CTRL_CMPE) >> 4, (data & CTRL_OVFE) >> 5, (data & CTRL_REPI) >> 6, (data & CTRL_TOGI) >> 7); + static const char *gatm_names[4] = { "low?", "reset+rising?", "reset+falling?", "reset+both?" }; + logerror("%s: set_ctrl: GATE=%d, GATM=%s, ZRET=%d\n", machine().describe_context(), data & CTRL_GATE, gatm_names[(data & CTRL_GATM) >> 1], (data & CTRL_ZRET) >> 3); + logerror("%s: CMPE=%d, OVFE=%d, REP_INT=%d, TOG_INT=%d\n", machine().describe_context(), (data & CTRL_CMPE) >> 4, (data & CTRL_OVFE) >> 5, (data & CTRL_REPI) >> 6, (data & CTRL_TOGI) >> 7); - const uint32_t old = m_ctrl; - m_ctrl = data | CTRL_INTE; - const uint32_t changed = old ^ data; + const uint32_t old = m_ctrl; + m_ctrl = data | CTRL_INTE; + const uint32_t changed = old ^ data; if (!changed) return; - m_gate_enable = data & CTRL_GATE; - m_gate_mode = (timer_gate_mode)((data & CTRL_GATM) >> 1); - m_zero_return = (data & CTRL_ZRET) >> 3; - m_cmp_int_enabled = (data & CTRL_CMPE) >> 4; - m_ovf_int_enabled = (data & CTRL_OVFE) >> 5; + m_gate_enable = data & CTRL_GATE; + m_gate_mode = (timer_gate_mode)((data & CTRL_GATM) >> 1); + m_zero_return = (data & CTRL_ZRET) >> 3; + m_cmp_int_enabled = (data & CTRL_CMPE) >> 4; + m_ovf_int_enabled = (data & CTRL_OVFE) >> 5; m_repeat_int = (data & CTRL_REPI) >> 6; m_toggle_int = (data & CTRL_TOGI) >> 7; - m_ienable = 1; + m_ienable = 1; m_count = 0; if (changed & CTRL_CMPE) @@ -200,64 +200,64 @@ TIMER_CALLBACK_MEMBER(iop_timer_device::overflow) READ32_MEMBER(iop_timer_device::read) { - uint32_t ret = 0; - switch (offset) - { - case 0x00: - { - //const uint32_t old = m_count; - update_count(); - ret = m_count; - //if (old != m_count) - //logerror("%s: IOP timer read: COUNT (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); - break; - } - - case 0x01: - ret = m_ctrl | (m_ovf_int ? CTRL_OVFF : 0) | (m_cmp_int ? CTRL_CMPF : 0); - logerror("%s: IOP timer read: MODE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); - break; - - case 0x02: - ret = m_compare; - logerror("%s: IOP timer read: COMPARE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); - break; - - default: - break; - } - return ret; + uint32_t ret = 0; + switch (offset) + { + case 0x00: + { + //const uint32_t old = m_count; + update_count(); + ret = m_count; + //if (old != m_count) + //logerror("%s: IOP timer read: COUNT (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); + break; + } + + case 0x01: + ret = m_ctrl | (m_ovf_int ? CTRL_OVFF : 0) | (m_cmp_int ? CTRL_CMPF : 0); + logerror("%s: IOP timer read: MODE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); + break; + + case 0x02: + ret = m_compare; + logerror("%s: IOP timer read: COMPARE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); + break; + + default: + break; + } + return ret; } WRITE32_MEMBER(iop_timer_device::write) { - switch (offset) - { - case 0x00: - m_count = data; - logerror("%s: IOP timer write: COUNT = %08x & %08x\n", machine().describe_context(), data, mem_mask); - update_compare_timer(); - update_overflow_timer(); - break; - - case 0x01: - set_ctrl(data); - break; - - case 0x02: - { - logerror("%s: IOP timer write: COMPARE = %08x & %08x\n", machine().describe_context(), data, mem_mask); + switch (offset) + { + case 0x00: + m_count = data; + logerror("%s: IOP timer write: COUNT = %08x & %08x\n", machine().describe_context(), data, mem_mask); + update_compare_timer(); + update_overflow_timer(); + break; + + case 0x01: + set_ctrl(data); + break; + + case 0x02: + { + logerror("%s: IOP timer write: COMPARE = %08x & %08x\n", machine().describe_context(), data, mem_mask); if (m_compare == data) break; - m_compare = data; - if (!m_toggle_int) - m_ienable = true; - update_compare_timer(); - break; + m_compare = data; + if (!m_toggle_int) + m_ienable = true; + update_compare_timer(); + break; } - default: - break; - } + default: + break; + } } diff --git a/src/devices/machine/ioptimer.h b/src/devices/machine/ioptimer.h index dcaaf0a9004..316349e7a90 100644 --- a/src/devices/machine/ioptimer.h +++ b/src/devices/machine/ioptimer.h @@ -9,8 +9,8 @@ * */ -#ifndef DEVICES_MACHINE_IOPTIMER_H -#define DEVICES_MACHINE_IOPTIMER_H +#ifndef MAME_MACHINE_IOPTIMER_H +#define MAME_MACHINE_IOPTIMER_H #pragma once @@ -20,7 +20,7 @@ class iop_timer_device : public device_t { public: - iop_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + iop_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); template <class Object> devcb_base &set_int_cb(Object &&cb) { return m_int_cb.set_callback(std::forward<Object>(cb)); } @@ -50,8 +50,8 @@ protected: GATM_BOTH }; - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; TIMER_CALLBACK_MEMBER(compare); TIMER_CALLBACK_MEMBER(overflow); @@ -59,10 +59,10 @@ protected: void set_ctrl(uint32_t data); void update_gate(); - void update_interrupts(); + void update_interrupts(); void update_compare_timer(); - void update_overflow_timer(); + void update_overflow_timer(); void update_count(); @@ -71,28 +71,28 @@ protected: uint32_t m_ctrl; - attotime m_last_update_time; - attotime m_elapsed_time; - bool m_zero_return; - uint32_t m_count; - uint32_t m_compare; + attotime m_last_update_time; + attotime m_elapsed_time; + bool m_zero_return; + uint32_t m_count; + uint32_t m_compare; - bool m_gate_enable; - timer_gate_mode m_gate_mode; + bool m_gate_enable; + timer_gate_mode m_gate_mode; - bool m_cmp_int_enabled; - bool m_cmp_int; + bool m_cmp_int_enabled; + bool m_cmp_int; - bool m_ovf_int_enabled; - bool m_ovf_int; + bool m_ovf_int_enabled; + bool m_ovf_int; bool m_repeat_int; bool m_toggle_int; - bool m_ienable; - devcb_write_line m_int_cb; + bool m_ienable; + devcb_write_line m_int_cb; }; DECLARE_DEVICE_TYPE(SONYIOP_TIMER, iop_timer_device) -#endif // DEVICES_MACHINE_IOPTIMER_H
\ No newline at end of file +#endif // MAME_MACHINE_IOPTIMER_H diff --git a/src/devices/machine/mc146818.cpp b/src/devices/machine/mc146818.cpp index e9421b3e505..c1a391b6ed6 100644 --- a/src/devices/machine/mc146818.cpp +++ b/src/devices/machine/mc146818.cpp @@ -620,4 +620,4 @@ WRITE8_MEMBER( mc146818_device::write_direct ) m_data[m_index] = data; break; } -}
\ No newline at end of file +} diff --git a/src/devices/machine/nscsi_cd.cpp b/src/devices/machine/nscsi_cd.cpp index 3496a84081b..8211657b73c 100644 --- a/src/devices/machine/nscsi_cd.cpp +++ b/src/devices/machine/nscsi_cd.cpp @@ -36,12 +36,12 @@ MACHINE_CONFIG_START(nscsi_cdrom_device::device_add_mconfig) MCFG_CDROM_INTERFACE("cdrom") MACHINE_CONFIG_END -void nscsi_cdrom_device::set_block_size(u32 block_size) +void nscsi_cdrom_device::set_block_size(u32 block_size) { assert_always(!started(), "block size should not be set after device start"); assert_always(bytes_per_sector % block_size == 0, "block size must be a factor of sector size"); - bytes_per_block = block_size; + bytes_per_block = block_size; }; diff --git a/src/devices/machine/ps2dma.cpp b/src/devices/machine/ps2dma.cpp index e3c8275fdb8..86cc249798a 100644 --- a/src/devices/machine/ps2dma.cpp +++ b/src/devices/machine/ps2dma.cpp @@ -11,6 +11,8 @@ #include "emu.h" #include "ps2dma.h" + +#include "ps2sif.h" #include "cpu/mips/mips3.h" #include "cpu/mips/ps2vif1.h" #include "video/ps2gif.h" @@ -29,6 +31,10 @@ ps2_dmac_device::ps2_dmac_device(const machine_config &mconfig, const char *tag, { } +ps2_dmac_device::~ps2_dmac_device() +{ +} + void ps2_dmac_device::device_start() { set_icountptr(m_icount); @@ -317,32 +323,32 @@ void ps2_dmac_device::follow_source_tag(uint32_t chan) switch (id) { case ID_CNT: - channel.set_addr(channel.tag_addr() + 0x10); - channel.set_tag_addr(channel.addr() + (channel.quadword_count() << 4)); + channel.set_addr(channel.tag_addr() + 0x10); + channel.set_tag_addr(channel.addr() + (channel.quadword_count() << 4)); break; case ID_REFE: - channel.set_end_tag(true); - // Intentional fall-through - case ID_REF: - channel.set_addr(addr); - channel.set_tag_addr(channel.tag_addr() + 0x10); - break; + channel.set_end_tag(true); + // Intentional fall-through + case ID_REF: + channel.set_addr(addr); + channel.set_tag_addr(channel.tag_addr() + 0x10); + break; case ID_REFS: // We don't handle stalls yet, just act the same as REF for now - channel.set_addr(addr); - channel.set_tag_addr(channel.tag_addr() + 0x10); - break; - case ID_NEXT: - channel.set_addr(channel.tag_addr() + 0x10); - channel.set_tag_addr(addr); + channel.set_addr(addr); + channel.set_tag_addr(channel.tag_addr() + 0x10); + break; + case ID_NEXT: + channel.set_addr(channel.tag_addr() + 0x10); + channel.set_tag_addr(addr); break; case ID_END: - channel.set_addr(channel.tag_addr() + 0x10); - channel.set_end_tag(true); - break; - default: - logerror("%s: Unknown DMAtag ID: %d\n", machine().describe_context(), id); - break; + channel.set_addr(channel.tag_addr() + 0x10); + channel.set_end_tag(true); + break; + default: + logerror("%s: Unknown DMAtag ID: %d\n", machine().describe_context(), id); + break; } if (irq && channel.irq_enable()) @@ -788,4 +794,4 @@ void ps2_dmac_device::channel_t::set_chcr(uint32_t data) { m_end_tag = false; } -}
\ No newline at end of file +} diff --git a/src/devices/machine/ps2dma.h b/src/devices/machine/ps2dma.h index a8a0f43476e..1eeec4f4f2a 100644 --- a/src/devices/machine/ps2dma.h +++ b/src/devices/machine/ps2dma.h @@ -9,22 +9,23 @@ * */ -#ifndef DEVICES_MACHINE_PS2DMAC_H -#define DEVICES_MACHINE_PS2DMAC_H +#ifndef MAME_MACHINE_PS2DMA_H +#define MAME_MACHINE_PS2DMA_H #pragma once -#include "ps2sif.h" -#include "video/ps2gs.h" #include "cpu/mips/ps2vu.h" +#include "video/ps2gs.h" + +class ps2_sif_device; class ps2_dmac_device : public device_t, public device_execute_interface { public: template <typename T, typename U, typename V, typename W, typename X> - ps2_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&ee_tag, U &&ram_tag, V &&sif_tag, W &&gs_tag, X &&vu1_tag) - : ps2_dmac_device(mconfig, tag, owner, clock) - { + ps2_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&ee_tag, U &&ram_tag, V &&sif_tag, W &&gs_tag, X &&vu1_tag) + : ps2_dmac_device(mconfig, tag, owner, clock) + { m_ee.set_tag(std::forward<T>(ee_tag)); m_ram.set_tag(std::forward<U>(ram_tag)); m_sif.set_tag(std::forward<V>(sif_tag)); @@ -32,7 +33,8 @@ public: m_vu1.set_tag(std::forward<X>(vu1_tag)); } - ps2_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ps2_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~ps2_dmac_device() override; enum channel_type : uint32_t { @@ -57,12 +59,12 @@ public: DECLARE_WRITE32_MEMBER(disable_mask_w); protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; virtual void execute_run() override; - enum tag_id - { + enum tag_id + { ID_REFE = 0, ID_CNT, ID_NEXT, @@ -148,4 +150,4 @@ protected: DECLARE_DEVICE_TYPE(SONYPS2_DMAC, ps2_dmac_device) -#endif // DEVICES_MACHINE_PS2DMAC_H +#endif // MAME_MACHINE_PS2DMA_H diff --git a/src/devices/machine/ps2intc.cpp b/src/devices/machine/ps2intc.cpp index e1bb2a6046b..15581ce3936 100644 --- a/src/devices/machine/ps2intc.cpp +++ b/src/devices/machine/ps2intc.cpp @@ -12,6 +12,9 @@ #include "emu.h" #include "ps2intc.h" +#include "cpu/mips/ps2vu.h" + + DEFINE_DEVICE_TYPE(SONYPS2_INTC, ps2_intc_device, "ps2intc", "PlayStation 2 EE INTC") ps2_intc_device::ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -20,6 +23,10 @@ ps2_intc_device::ps2_intc_device(const machine_config &mconfig, const char *tag, { } +ps2_intc_device::~ps2_intc_device() +{ +} + void ps2_intc_device::device_start() { save_item(NAME(m_status)); diff --git a/src/devices/machine/ps2intc.h b/src/devices/machine/ps2intc.h index 3d5d305fdcf..078061fbb9d 100644 --- a/src/devices/machine/ps2intc.h +++ b/src/devices/machine/ps2intc.h @@ -9,8 +9,8 @@ * */ -#ifndef DEVICES_MACHINE_PS2INTC_H -#define DEVICES_MACHINE_PS2INTC_H +#ifndef MAME_MACHINE_PS2INTC_H +#define MAME_MACHINE_PS2INTC_H #pragma once @@ -20,13 +20,14 @@ class ps2_intc_device : public device_t { public: template <typename T> - ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&ee_tag) - : ps2_intc_device(mconfig, tag, owner, (uint32_t)0) - { + ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&ee_tag) + : ps2_intc_device(mconfig, tag, owner, (uint32_t)0) + { m_ee.set_tag(std::forward<T>(ee_tag)); } - ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ps2_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~ps2_intc_device() override; DECLARE_READ32_MEMBER(read); DECLARE_WRITE32_MEMBER(write); @@ -53,8 +54,8 @@ public: }; protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; void update_interrupts(); @@ -66,4 +67,4 @@ protected: DECLARE_DEVICE_TYPE(SONYPS2_INTC, ps2_intc_device) -#endif // DEVICES_MACHINE_PS2INTC_H +#endif // MAME_MACHINE_PS2INTC_H diff --git a/src/devices/machine/ps2mc.cpp b/src/devices/machine/ps2mc.cpp index 68ec1a54a1b..b253f6153b7 100644 --- a/src/devices/machine/ps2mc.cpp +++ b/src/devices/machine/ps2mc.cpp @@ -22,6 +22,10 @@ ps2_mc_device::ps2_mc_device(const machine_config &mconfig, const char *tag, dev { } +ps2_mc_device::~ps2_mc_device() +{ +} + void ps2_mc_device::device_start() { save_item(NAME(m_recv_buf)); diff --git a/src/devices/machine/ps2mc.h b/src/devices/machine/ps2mc.h index c7551c1fce3..b3f120f62a1 100644 --- a/src/devices/machine/ps2mc.h +++ b/src/devices/machine/ps2mc.h @@ -9,20 +9,22 @@ * */ -#ifndef DEVICES_MACHINE_PS2MC_H -#define DEVICES_MACHINE_PS2MC_H +#ifndef MAME_MACHINE_PS2MC_H +#define MAME_MACHINE_PS2MC_H #pragma once + class ps2_mc_device : public device_t { public: - ps2_mc_device(const machine_config &mconfig, const char *tag, device_t *owner) - : ps2_mc_device(mconfig, tag, owner, (uint32_t)0) - { + ps2_mc_device(const machine_config &mconfig, const char *tag, device_t *owner) + : ps2_mc_device(mconfig, tag, owner, (uint32_t)0) + { } - ps2_mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ps2_mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~ps2_mc_device() override; void recv_fifo_push(uint8_t data); // TODO: Turn me into a bus interface! uint8_t xmit_fifo_pop(); @@ -34,8 +36,8 @@ public: static const uint8_t SIO_DEVICE_ID = 0x81; protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; void xmit_fifo_push(uint8_t data); uint8_t recv_fifo_pop(); @@ -47,9 +49,9 @@ protected: enum : uint8_t { - CMD_INIT = 0x11, - CMD_GET_TERM = 0x28, - CMD_UNKNOWN_F3 = 0xf3, + CMD_INIT = 0x11, + CMD_GET_TERM = 0x28, + CMD_UNKNOWN_F3 = 0xf3, }; uint8_t m_recv_buf[512]; // Buffer size is a guess @@ -70,4 +72,4 @@ protected: DECLARE_DEVICE_TYPE(SONYPS2_MC, ps2_mc_device) -#endif // DEVICES_MACHINE_PS2MC_H +#endif // MAME_MACHINE_PS2MC_H diff --git a/src/devices/machine/ps2pad.cpp b/src/devices/machine/ps2pad.cpp index fe7e7c0a3ec..64e1009a331 100644 --- a/src/devices/machine/ps2pad.cpp +++ b/src/devices/machine/ps2pad.cpp @@ -21,6 +21,10 @@ ps2_pad_device::ps2_pad_device(const machine_config &mconfig, const char *tag, d { } +ps2_pad_device::~ps2_pad_device() +{ +} + void ps2_pad_device::device_start() { save_item(NAME(m_recv_buf)); diff --git a/src/devices/machine/ps2pad.h b/src/devices/machine/ps2pad.h index 0343e8e52ac..dcfb8125052 100644 --- a/src/devices/machine/ps2pad.h +++ b/src/devices/machine/ps2pad.h @@ -9,20 +9,22 @@ * */ -#ifndef DEVICES_MACHINE_PS2PAD_H -#define DEVICES_MACHINE_PS2PAD_H +#ifndef MAME_MACHINE_PS2PAD_H +#define MAME_MACHINE_PS2PAD_H #pragma once + class ps2_pad_device : public device_t { public: - ps2_pad_device(const machine_config &mconfig, const char *tag, device_t *owner) - : ps2_pad_device(mconfig, tag, owner, (uint32_t)0) - { + ps2_pad_device(const machine_config &mconfig, const char *tag, device_t *owner) + : ps2_pad_device(mconfig, tag, owner, (uint32_t)0) + { } - ps2_pad_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ps2_pad_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~ps2_pad_device() override; void recv_fifo_push(uint8_t data); // TODO: Turn me into a bus interface! uint8_t xmit_fifo_pop(); @@ -32,8 +34,8 @@ public: static const uint8_t SIO_DEVICE_ID = 0x01; protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; void xmit_fifo_push(uint8_t data); uint8_t recv_fifo_pop(); @@ -49,12 +51,12 @@ protected: enum : uint8_t { - CMD_READ_BUTTONS = 0x42, - CMD_CONFIG = 0x43, - CMD_GET_MODEL = 0x45, - CMD_GET_ACT = 0x46, - CMD_GET_COMB = 0x47, - CMD_GET_MODE = 0x4c, + CMD_READ_BUTTONS = 0x42, + CMD_CONFIG = 0x43, + CMD_GET_MODEL = 0x45, + CMD_GET_ACT = 0x46, + CMD_GET_COMB = 0x47, + CMD_GET_MODE = 0x4c, }; uint8_t m_recv_buf[64]; // Buffer size is a guess @@ -73,4 +75,4 @@ protected: DECLARE_DEVICE_TYPE(SONYPS2_PAD, ps2_pad_device) -#endif // DEVICES_MACHINE_PS2PAD_H +#endif // MAME_MACHINE_PS2PAD_H diff --git a/src/devices/machine/ps2sif.cpp b/src/devices/machine/ps2sif.cpp index 73b055d2cc5..a9dd7717b49 100644 --- a/src/devices/machine/ps2sif.cpp +++ b/src/devices/machine/ps2sif.cpp @@ -22,6 +22,10 @@ ps2_sif_device::ps2_sif_device(const machine_config &mconfig, const char *tag, d { } +ps2_sif_device::~ps2_sif_device() +{ +} + void ps2_sif_device::device_start() { save_item(NAME(m_ms_mailbox)); diff --git a/src/devices/machine/ps2sif.h b/src/devices/machine/ps2sif.h index a98a9c93485..27850ff2bcb 100644 --- a/src/devices/machine/ps2sif.h +++ b/src/devices/machine/ps2sif.h @@ -9,8 +9,8 @@ * */ -#ifndef DEVICES_MACHINE_PS2SIF_H -#define DEVICES_MACHINE_PS2SIF_H +#ifndef MAME_MACHINE_PS2SIF_H +#define MAME_MACHINE_PS2SIF_H #pragma once @@ -20,13 +20,14 @@ class ps2_sif_device : public device_t { public: template <typename T> - ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag) - : ps2_sif_device(mconfig, tag, owner, (uint32_t)0) - { + ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&intc_tag) + : ps2_sif_device(mconfig, tag, owner, (uint32_t)0) + { m_intc.set_tag(std::forward<T>(intc_tag)); } - ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ps2_sif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~ps2_sif_device() override; DECLARE_READ32_MEMBER(ee_r); DECLARE_WRITE32_MEMBER(ee_w); @@ -40,8 +41,8 @@ public: static const size_t MAX_FIFO_DEPTH; protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; required_device<ps2_intc_device> m_intc; @@ -57,4 +58,4 @@ protected: DECLARE_DEVICE_TYPE(SONYPS2_SIF, ps2_sif_device) -#endif // DEVICES_MACHINE_PS2SIF_H +#endif // MAME_MACHINE_PS2SIF_H diff --git a/src/devices/machine/ps2timer.cpp b/src/devices/machine/ps2timer.cpp index 70970a6784a..263060b98a5 100644 --- a/src/devices/machine/ps2timer.cpp +++ b/src/devices/machine/ps2timer.cpp @@ -20,8 +20,8 @@ ps2_timer_device::ps2_timer_device(const machine_config &mconfig, const char *ta , m_overflow_timer(nullptr) , m_mode(0) , m_last_enable_time(attotime::zero) - , m_last_update_time(attotime::zero) - , m_elapsed_time(attotime::zero) + , m_last_update_time(attotime::zero) + , m_elapsed_time(attotime::zero) , m_enabled(false) , m_zero_return(false) , m_count(0) @@ -53,8 +53,8 @@ void ps2_timer_device::device_reset() m_mode = 0; m_last_enable_time = attotime::zero; - m_last_update_time = attotime::zero; - m_elapsed_time = attotime::zero; + m_last_update_time = attotime::zero; + m_elapsed_time = attotime::zero; m_enabled = false; m_zero_return = false; @@ -103,36 +103,36 @@ void ps2_timer_device::update_overflow_timer() void ps2_timer_device::update_count() { - if (!m_enabled) return; - uint32_t frequency = 0; - - switch (m_clk_select) - { - case CLKS_BUSCLK1: - frequency = clock(); - break; - case CLKS_BUSCLK16: - frequency = clock() / 16; - break; - case CLKS_BUSCLK256: - frequency = clock() / 256; - break; - case CLKS_HBLNK: - frequency = clock() / 18700; - break; - } - - attotime curr_time = machine().scheduler().time(); - attotime time_delta = curr_time - m_last_update_time; - m_last_update_time = curr_time; - m_elapsed_time += time_delta; - uint32_t ticks = (uint32_t)m_elapsed_time.as_ticks(frequency); - if (ticks > 0) - { - m_elapsed_time -= attotime::from_ticks(ticks, frequency); - m_count += ticks; - m_count &= 0xffff; - } + if (!m_enabled) return; + uint32_t frequency = 0; + + switch (m_clk_select) + { + case CLKS_BUSCLK1: + frequency = clock(); + break; + case CLKS_BUSCLK16: + frequency = clock() / 16; + break; + case CLKS_BUSCLK256: + frequency = clock() / 256; + break; + case CLKS_HBLNK: + frequency = clock() / 18700; + break; + } + + attotime curr_time = machine().scheduler().time(); + attotime time_delta = curr_time - m_last_update_time; + m_last_update_time = curr_time; + m_elapsed_time += time_delta; + uint32_t ticks = (uint32_t)m_elapsed_time.as_ticks(frequency); + if (ticks > 0) + { + m_elapsed_time -= attotime::from_ticks(ticks, frequency); + m_count += ticks; + m_count &= 0xffff; + } } void ps2_timer_device::update_hold() @@ -142,24 +142,24 @@ void ps2_timer_device::update_hold() void ps2_timer_device::set_mode(uint32_t data) { - static const char *clks_names[4] = { "BUSCLK", "BUSCLK/16", "BUSCLK/256", "HBLNK" }; - static const char *gatm_names[4] = { "low", "reset+rising", "reset+falling", "reset+both" }; - logerror("%s: CLKS=%s, GATE=%d, GATS=%cBLNK\n", machine().describe_context(), clks_names[data & 3], BIT(data, 2), BIT(data, 3) ? 'V' : 'H'); - logerror("%s: GATM=%s, ZRET=%d, CUE=%d\n", machine().describe_context(), gatm_names[(data >> 4) & 3], BIT(data, 6), BIT(data, 7)); - logerror("%s: CMPE=%d, OVFE=%d, %s, %s\n", machine().describe_context(), BIT(data, 8), BIT(data, 9), BIT(data, 10) ? "Clear Equal" : "", BIT(data, 11) ? "Clear Overflow" : ""); + static const char *clks_names[4] = { "BUSCLK", "BUSCLK/16", "BUSCLK/256", "HBLNK" }; + static const char *gatm_names[4] = { "low", "reset+rising", "reset+falling", "reset+both" }; + logerror("%s: CLKS=%s, GATE=%d, GATS=%cBLNK\n", machine().describe_context(), clks_names[data & 3], BIT(data, 2), BIT(data, 3) ? 'V' : 'H'); + logerror("%s: GATM=%s, ZRET=%d, CUE=%d\n", machine().describe_context(), gatm_names[(data >> 4) & 3], BIT(data, 6), BIT(data, 7)); + logerror("%s: CMPE=%d, OVFE=%d, %s, %s\n", machine().describe_context(), BIT(data, 8), BIT(data, 9), BIT(data, 10) ? "Clear Equal" : "", BIT(data, 11) ? "Clear Overflow" : ""); - if (!(data & (MODE_EQUF | MODE_OVFF)) && data == m_mode) return; + if (!(data & (MODE_EQUF | MODE_OVFF)) && data == m_mode) return; - const uint32_t old = m_mode; - m_mode = data; - const uint32_t changed = old ^ data; + const uint32_t old = m_mode; + m_mode = data; + const uint32_t changed = old ^ data; - m_clk_select = (timer_clock_select)(data & 3); - m_gate_enable = BIT(data, 2); - m_gate_select = BIT(data, 3) ? GATS_VBLNK : GATS_HBLNK; - m_gate_mode = (timer_gate_mode)((data >> 4) & 3); - m_zero_return = BIT(data, 6); - m_enabled = BIT(data, 7); + m_clk_select = (timer_clock_select)(data & 3); + m_gate_enable = BIT(data, 2); + m_gate_select = BIT(data, 3) ? GATS_VBLNK : GATS_HBLNK; + m_gate_mode = (timer_gate_mode)((data >> 4) & 3); + m_zero_return = BIT(data, 6); + m_enabled = BIT(data, 7); if (changed & (MODE_GATE | MODE_GATS | MODE_GATM)) { @@ -172,13 +172,13 @@ void ps2_timer_device::set_mode(uint32_t data) update_overflow_timer(); } - if (changed & (MODE_CMPE | MODE_OVFE | MODE_EQUF | MODE_OVFF)) - { + if (changed & (MODE_CMPE | MODE_OVFE | MODE_EQUF | MODE_OVFF)) + { m_cmp_int_enabled = BIT(data, 8); m_ovf_int_enabled = BIT(data, 9); m_cmp_int = BIT(data, 10) ? 0 : m_cmp_int; m_ovf_int = BIT(data, 11) ? 0 : m_ovf_int; - update_interrupts(); + update_interrupts(); } } @@ -192,81 +192,81 @@ TIMER_CALLBACK_MEMBER(ps2_timer_device::overflow) READ32_MEMBER(ps2_timer_device::read) { - uint32_t ret = 0; - switch (offset) - { - case 0x00: - { - const uint32_t old = m_count; - update_count(); - ret = m_count; - if (old != m_count) - logerror("%s: PS2 timer read: COUNT (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); - break; - } - - case 0x02: - ret = m_mode; - logerror("%s: PS2 timer read: MODE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); - break; - - case 0x04: - ret = m_compare; - logerror("%s: PS2 timer read: COMP (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); - break; - - case 0x06: - ret = m_hold; - logerror("%s: PS2 timer read: HOLD (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); - break; - - default: - break; - } - return ret; + uint32_t ret = 0; + switch (offset) + { + case 0x00: + { + const uint32_t old = m_count; + update_count(); + ret = m_count; + if (old != m_count) + logerror("%s: PS2 timer read: COUNT (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); + break; + } + + case 0x02: + ret = m_mode; + logerror("%s: PS2 timer read: MODE (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); + break; + + case 0x04: + ret = m_compare; + logerror("%s: PS2 timer read: COMP (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); + break; + + case 0x06: + ret = m_hold; + logerror("%s: PS2 timer read: HOLD (%08x & %08x)\n", machine().describe_context(), ret, mem_mask); + break; + + default: + break; + } + return ret; } WRITE32_MEMBER(ps2_timer_device::write) { - switch (offset) - { - case 0x00: - m_count = data; - logerror("%s: PS2 timer write: COUNT = %08x & %08x\n", machine().describe_context(), data, mem_mask); - update_compare_timer(); - update_overflow_timer(); - break; - - case 0x02: - set_mode(data); - break; - - case 0x04: - { - logerror("%s: PS2 timer write: COMP = %08x & %08x\n", machine().describe_context(), data, mem_mask); + switch (offset) + { + case 0x00: + m_count = data; + logerror("%s: PS2 timer write: COUNT = %08x & %08x\n", machine().describe_context(), data, mem_mask); + update_compare_timer(); + update_overflow_timer(); + break; + + case 0x02: + set_mode(data); + break; + + case 0x04: + { + logerror("%s: PS2 timer write: COMP = %08x & %08x\n", machine().describe_context(), data, mem_mask); if (m_compare == data) break; - m_compare = data; - update_compare_timer(); - break; + m_compare = data; + update_compare_timer(); + break; } - case 0x06: - { - if (!m_can_hold) - break; + case 0x06: + { + if (!m_can_hold) + break; - logerror("%s: PS2 timer write: HOLD = %08x & %08x\n", machine().describe_context(), data, mem_mask); - if (m_hold == data) - break; + logerror("%s: PS2 timer write: HOLD = %08x & %08x\n", machine().describe_context(), data, mem_mask); + if (m_hold == data) + break; - m_hold = data; - update_hold(); - break; + m_hold = data; + update_hold(); + break; } - default: - break; - } + default: + break; + } } diff --git a/src/devices/machine/ps2timer.h b/src/devices/machine/ps2timer.h index 425fc89798b..c412745b6ad 100644 --- a/src/devices/machine/ps2timer.h +++ b/src/devices/machine/ps2timer.h @@ -9,21 +9,21 @@ * */ -#ifndef DEVICES_MACHINE_PS2TIMER_H -#define DEVICES_MACHINE_PS2TIMER_H +#ifndef MAME_MACHINE_PS2TIMER_H +#define MAME_MACHINE_PS2TIMER_H #pragma once class ps2_timer_device : public device_t { public: - ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, bool can_hold) - : ps2_timer_device(mconfig, tag, owner, clock) - { + ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, bool can_hold) + : ps2_timer_device(mconfig, tag, owner, clock) + { m_can_hold = can_hold; } - ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ps2_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); DECLARE_READ32_MEMBER(read); DECLARE_WRITE32_MEMBER(write); @@ -65,52 +65,52 @@ protected: GATS_VBLNK }; - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; TIMER_CALLBACK_MEMBER(compare); TIMER_CALLBACK_MEMBER(overflow); void update_gate(); - void update_interrupts(); + void update_interrupts(); void update_compare_timer(); - void update_overflow_timer(); + void update_overflow_timer(); void update_count(); - void update_hold(); + void update_hold(); - void set_mode(uint32_t data); + void set_mode(uint32_t data); emu_timer *m_compare_timer; emu_timer *m_overflow_timer; - uint32_t m_mode; + uint32_t m_mode; attotime m_last_enable_time; - attotime m_last_update_time; - attotime m_elapsed_time; - bool m_enabled; - bool m_zero_return; - uint32_t m_count; - uint32_t m_compare; + attotime m_last_update_time; + attotime m_elapsed_time; + bool m_enabled; + bool m_zero_return; + uint32_t m_count; + uint32_t m_compare; - bool m_can_hold; - uint32_t m_hold; + bool m_can_hold; + uint32_t m_hold; - timer_clock_select m_clk_select; + timer_clock_select m_clk_select; - bool m_gate_enable; - timer_gate_select m_gate_select; - timer_gate_mode m_gate_mode; + bool m_gate_enable; + timer_gate_select m_gate_select; + timer_gate_mode m_gate_mode; - bool m_cmp_int_enabled; - bool m_cmp_int; + bool m_cmp_int_enabled; + bool m_cmp_int; - bool m_ovf_int_enabled; - bool m_ovf_int; + bool m_ovf_int_enabled; + bool m_ovf_int; }; DECLARE_DEVICE_TYPE(SONYPS2_TIMER, ps2_timer_device) -#endif // DEVICES_MACHINE_PS2TIMER_H
\ No newline at end of file +#endif // MAME_MACHINE_PS2TIMER_H diff --git a/src/devices/machine/pxa255defs.h b/src/devices/machine/pxa255defs.h index 6f861d9d9a0..d2c38f474f1 100644 --- a/src/devices/machine/pxa255defs.h +++ b/src/devices/machine/pxa255defs.h @@ -6,8 +6,8 @@ * **************************************************************************/ -#ifndef DEVICES_MACHINE_PXA255DEFS -#define DEVICES_MACHINE_PXA255DEFS +#ifndef MAME_MACHINE_PXA255DEFS +#define MAME_MACHINE_PXA255DEFS #pragma once @@ -376,4 +376,4 @@ #define PXA255_FIDR1 (PXA255_LCD_BASE_ADDR + 0x00000218) #define PXA255_LDCMD1 (PXA255_LCD_BASE_ADDR + 0x0000021c) -#endif // DEVICES_MACHINE_PXA255DEFS +#endif // MAME_MACHINE_PXA255DEFS diff --git a/src/devices/machine/te7750.h b/src/devices/machine/te7750.h index 32406b3c52c..4c4b3328346 100644 --- a/src/devices/machine/te7750.h +++ b/src/devices/machine/te7750.h @@ -6,8 +6,8 @@ **********************************************************************/ -#ifndef DEVICES_MACHINE_TE7750_H -#define DEVICES_MACHINE_TE7750_H +#ifndef MAME_MACHINE_TE7750_H +#define MAME_MACHINE_TE7750_H #pragma once @@ -132,4 +132,4 @@ private: // device type definition DECLARE_DEVICE_TYPE(TE7750, te7750_device) -#endif // DEVICES_MACHINE_TE7750_H +#endif // MAME_MACHINE_TE7750_H diff --git a/src/devices/sound/iopspu.cpp b/src/devices/sound/iopspu.cpp index 9701fc85be4..88ace1df633 100644 --- a/src/devices/sound/iopspu.cpp +++ b/src/devices/sound/iopspu.cpp @@ -9,6 +9,7 @@ * */ +#include "emu.h" #include "iopspu.h" DEFINE_DEVICE_TYPE(SONYIOP_SPU, iop_spu_device, "iopspu", "PlayStation 2 IOP SPU") @@ -21,6 +22,10 @@ iop_spu_device::iop_spu_device(const machine_config &mconfig, const char *tag, d { } +iop_spu_device::~iop_spu_device() +{ +} + void iop_spu_device::device_start() { m_ram = std::make_unique<uint16_t[]>(2 * 1024 * 1024); // ? @@ -139,15 +144,15 @@ uint16_t iop_spu_device::reg_read(int bank, uint32_t offset, uint16_t mem_mask) logerror("%s %d: read: Unknown 0x19a (%04x & %04x)\n", machine().describe_context(), bank, ret, mem_mask); break; - case 0x1a8: - ret = (uint16_t)(core.m_start_port_addr >> 16); + case 0x1a8: + ret = (uint16_t)(core.m_start_port_addr >> 16); logerror("%s %d: read: PORT_ADDR_HI: %04x & %04x\n", machine().describe_context(), bank, ret, mem_mask); - break; + break; - case 0x1aa: - ret = (uint16_t)core.m_start_port_addr; + case 0x1aa: + ret = (uint16_t)core.m_start_port_addr; logerror("%s %d: read: PORT_ADDR_LO: %04x & %04x\n", machine().describe_context(), bank, ret, mem_mask); - break; + break; case 0x1b0: ret = core.m_autodma_ctrl; @@ -196,19 +201,19 @@ void iop_spu_device::reg_write(int bank, uint32_t offset, uint16_t data, uint16_ core.m_unknown_0x19a = data; break; - case 0x1a8: + case 0x1a8: logerror("%s %d: write: PORT_ADDR_HI: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask); core.m_start_port_addr &= ~0x000f0000; core.m_start_port_addr |= ((uint32_t)data << 16) & 0x000f0000; core.m_curr_port_addr = core.m_start_port_addr; - break; + break; - case 0x1aa: + case 0x1aa: logerror("%s %d: write: PORT_ADDR_LO: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask); core.m_start_port_addr &= ~0x0000ffff; core.m_start_port_addr |= data; core.m_curr_port_addr = core.m_start_port_addr; - break; + break; case 0x1b0: logerror("%s %d: write: Auto DMA control: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask); diff --git a/src/devices/sound/iopspu.h b/src/devices/sound/iopspu.h index 41176cf7738..44e26a68066 100644 --- a/src/devices/sound/iopspu.h +++ b/src/devices/sound/iopspu.h @@ -9,12 +9,11 @@ * */ -#ifndef DEVICES_MACHINE_IOPSPU_H -#define DEVICES_MACHINE_IOPSPU_H +#ifndef MAME_MACHINE_IOPSPU_H +#define MAME_MACHINE_IOPSPU_H #pragma once -#include "emu.h" #include "cpu/mips/r3000.h" #include "machine/iopintc.h" @@ -22,14 +21,15 @@ class iop_spu_device : public device_t, public device_sound_interface { public: template <typename T, typename U> - iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&iop_tag, U &&intc_tag) - : iop_spu_device(mconfig, tag, owner, clock) - { + iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&iop_tag, U &&intc_tag) + : iop_spu_device(mconfig, tag, owner, clock) + { m_iop.set_tag(std::forward<T>(iop_tag)); m_intc.set_tag(std::forward<U>(intc_tag)); } - iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + iop_spu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~iop_spu_device() override; DECLARE_READ16_MEMBER(read); DECLARE_WRITE16_MEMBER(write); @@ -44,8 +44,8 @@ public: void dma_done(int bank); protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; // sound stream update overrides virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override; @@ -57,8 +57,8 @@ protected: enum { - STATUS_DMA_DONE = (1 << 7), - STATUS_DMA_ACTIVE = (1 << 10) + STATUS_DMA_DONE = (1 << 7), + STATUS_DMA_ACTIVE = (1 << 10) }; class voice_t @@ -98,4 +98,4 @@ protected: DECLARE_DEVICE_TYPE(SONYIOP_SPU, iop_spu_device) -#endif // DEVICES_MACHINE_IOPSPU_H
\ No newline at end of file +#endif // MAME_MACHINE_IOPSPU_H diff --git a/src/devices/video/315_5124.cpp b/src/devices/video/315_5124.cpp index f70662904ef..c08082d54c5 100644 --- a/src/devices/video/315_5124.cpp +++ b/src/devices/video/315_5124.cpp @@ -1008,7 +1008,7 @@ void sega315_5124_device::draw_scanline_mode4( int *line_buffer, int *priority_s /* Column 0 is the leftmost tile column that completely entered in the screen. If the leftmost pixels aren't part of a complete tile, due to horizontal scrolling, they are drawn only with color #0 of the selected palette. */ - if (tile_column == 0 && x_scroll_fine_adjust > 0) + if (tile_column == 0 && x_scroll_fine_adjust > 0) { draw_column0_x_scroll_mode4(line_buffer, priority_selected, x_scroll_fine_adjust, palette_selected, tile_line); } @@ -1262,24 +1262,24 @@ void sega315_5313_mode4_device::select_sprites( int line ) sega315_5124_device::select_sprites(line); /* - Info from Charles MacDonald regarding real hardware behavior: - (http://www.smspower.org/forums/15772-Sprites8x16Question) - - "As I recall the SMS will parses the sprite table on line N to find the - sprite numbers to display on line N+1, and on the next line it displays - those sprites. The data for the sprites is read in real-time and is not - buffered from any earlier time. The only thing that's buffered are the - eight sprite numbers. - - On the MD it has two line buffers (RAM) that it renders sprite data into - on one line, and displays that buffer on the next line while preparing - the next one. This only reveals itself if you play with the screen - blanking or left-column blanking bits, as the display process erases the - other buffer and on a blanked line nothing gets erased. - - So if you turn on either of those bits later they show the old sprite - data that hadn't been erased yet. This is how you can show a line of - sprite data further down on the screen than where the sprites were." + Info from Charles MacDonald regarding real hardware behavior: + (http://www.smspower.org/forums/15772-Sprites8x16Question) + + "As I recall the SMS will parses the sprite table on line N to find the + sprite numbers to display on line N+1, and on the next line it displays + those sprites. The data for the sprites is read in real-time and is not + buffered from any earlier time. The only thing that's buffered are the + eight sprite numbers. + + On the MD it has two line buffers (RAM) that it renders sprite data into + on one line, and displays that buffer on the next line while preparing + the next one. This only reveals itself if you play with the screen + blanking or left-column blanking bits, as the display process erases the + other buffer and on a blanked line nothing gets erased. + + So if you turn on either of those bits later they show the old sprite + data that hadn't been erased yet. This is how you can show a line of + sprite data further down on the screen than where the sprites were." */ // Runs the function that draws sprites, but only to check for diff --git a/src/devices/video/ps2gif.cpp b/src/devices/video/ps2gif.cpp index c4c714e7eb2..bfc404d2627 100644 --- a/src/devices/video/ps2gif.cpp +++ b/src/devices/video/ps2gif.cpp @@ -12,6 +12,9 @@ #include "emu.h" #include "ps2gif.h" +#include "ps2gs.h" +#include "cpu/mips/ps2vu.h" + DEFINE_DEVICE_TYPE(SONYPS2_GIF, ps2_gif_device, "ps2gif", "Playstation 2 GIF") ps2_gif_device::ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -22,6 +25,10 @@ ps2_gif_device::ps2_gif_device(const machine_config &mconfig, const char *tag, d { } +ps2_gif_device::~ps2_gif_device() +{ +} + ps2_gif_device::tag_t::tag_t(const uint64_t hi, const uint64_t lo) : m_nloop(lo & 0x7fffULL) , m_end((lo >> 15) & 1) diff --git a/src/devices/video/ps2gif.h b/src/devices/video/ps2gif.h index 29c57e80f2b..813a67a4678 100644 --- a/src/devices/video/ps2gif.h +++ b/src/devices/video/ps2gif.h @@ -9,8 +9,8 @@ * */ -#ifndef DEVICES_VIDEO_PS2GIF_H -#define DEVICES_VIDEO_PS2GIF_H +#ifndef MAME_VIDEO_PS2GIF_H +#define MAME_VIDEO_PS2GIF_H #pragma once @@ -21,14 +21,15 @@ class ps2_gif_device : public device_t, public device_execute_interface { public: template <typename T, typename U> - ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag) - : ps2_gif_device(mconfig, tag, owner, clock) - { + ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag) + : ps2_gif_device(mconfig, tag, owner, clock) + { m_gs.set_tag(std::forward<T>(gs_tag)); m_vu1.set_tag(std::forward<U>(vu1_tag)); } - ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + ps2_gif_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~ps2_gif_device() override; DECLARE_READ32_MEMBER(read); DECLARE_WRITE32_MEMBER(write); @@ -41,8 +42,8 @@ public: bool path3_available() const { return m_path3_available; } protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; virtual void execute_run() override; void fetch_path1(uint64_t &hi, uint64_t &lo); @@ -125,7 +126,4 @@ protected: DECLARE_DEVICE_TYPE(SONYPS2_GIF, ps2_gif_device) -#include "ps2gs.h" -#include "cpu/mips/ps2vu.h" - -#endif // DEVICES_VIDEO_PS2GIF_H +#endif // MAME_VIDEO_PS2GIF_H diff --git a/src/devices/video/ps2gs.cpp b/src/devices/video/ps2gs.cpp index 2186d5033eb..aa83adff58b 100644 --- a/src/devices/video/ps2gs.cpp +++ b/src/devices/video/ps2gs.cpp @@ -12,28 +12,33 @@ #include "emu.h" #include "ps2gs.h" +#include "ps2gif.h" +#include "machine/ps2intc.h" +#include "cpu/mips/ps2vu.h" + + DEFINE_DEVICE_TYPE(SONYPS2_GS, ps2_gs_device, "ps2gs", "Playstation 2 GS") /*static*/ const size_t ps2_gs_device::FORMAT_PIXEL_WIDTHS[] = { - 32, 24, 16, 0, 0, 0, 0, 0, - 0, 0, 16, 0, 0, 0, 0, 0, - 0, 0, 0, 8, 4, 0, 0, 0, - 0, 0, 0, 8, 0, 0, 0, 0, - 0, 0, 0, 0, 4, 0, 0, 0, - 0, 0, 0, 0, 4, 0, 0, 0, - 32, 24, 16, 0, 0, 0, 0, 0, - 0, 0, 16, 0, 0, 0, 0, 0 + 32, 24, 16, 0, 0, 0, 0, 0, + 0, 0, 16, 0, 0, 0, 0, 0, + 0, 0, 0, 8, 4, 0, 0, 0, + 0, 0, 0, 8, 0, 0, 0, 0, + 0, 0, 0, 0, 4, 0, 0, 0, + 0, 0, 0, 0, 4, 0, 0, 0, + 32, 24, 16, 0, 0, 0, 0, 0, + 0, 0, 16, 0, 0, 0, 0, 0 }; /*static*/ const char* ps2_gs_device::FORMAT_NAMES[] = { - "PSMCT32", "PSMCT24", "PSMCT16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", - "Unknown", "Unknown", "PCMCT16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", - "Unknown", "Unknown", "Unknown", "PSMT8", "PSMT4", "Unknown", "Unknown", "Unknown", - "Unknown", "Unknown", "Unknown", "PSMT8H", "Unknown", "Unknown", "Unknown", "Unknown", - "Unknown", "Unknown", "Unknown", "Unknown", "PSMT4HL", "Unknown", "Unknown", "Unknown", - "Unknown", "Unknown", "Unknown", "Unknown", "PSMT4HH", "Unknown", "Unknown", "Unknown", - "PSMZ32", "PSMZ24", "PSMZ16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", - "Unknown", "Unknown", "PSMZ16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown" + "PSMCT32", "PSMCT24", "PSMCT16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", + "Unknown", "Unknown", "PCMCT16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", + "Unknown", "Unknown", "Unknown", "PSMT8", "PSMT4", "Unknown", "Unknown", "Unknown", + "Unknown", "Unknown", "Unknown", "PSMT8H", "Unknown", "Unknown", "Unknown", "Unknown", + "Unknown", "Unknown", "Unknown", "Unknown", "PSMT4HL", "Unknown", "Unknown", "Unknown", + "Unknown", "Unknown", "Unknown", "Unknown", "PSMT4HH", "Unknown", "Unknown", "Unknown", + "PSMZ32", "PSMZ24", "PSMZ16", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", + "Unknown", "Unknown", "PSMZ16S", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown" }; /*static*/ const uint32_t ps2_gs_device::KICK_COUNTS[] = { @@ -48,6 +53,10 @@ ps2_gs_device::ps2_gs_device(const machine_config &mconfig, const char *tag, dev { } +ps2_gs_device::~ps2_gs_device() +{ +} + MACHINE_CONFIG_START(ps2_gs_device::device_add_mconfig) MCFG_DEVICE_ADD(m_gif, SONYPS2_GIF, clock(), DEVICE_SELF, m_vu1) MACHINE_CONFIG_END @@ -75,9 +84,9 @@ void ps2_gs_device::device_start() save_item(NAME(m_trx_dir)); - save_item(NAME(m_base_regs)); + save_item(NAME(m_base_regs)); - save_item(NAME(m_pmode)); + save_item(NAME(m_pmode)); save_item(NAME(m_read_circuit_enable)); save_item(NAME(m_use_fixed_alpha)); save_item(NAME(m_alpha_out_select)); @@ -109,13 +118,13 @@ void ps2_gs_device::device_start() save_item(NAME(m_bg_g)); save_item(NAME(m_bg_b)); - save_item(NAME(m_csr)); - save_item(NAME(m_imr)); - save_item(NAME(m_busdir)); - save_item(NAME(m_sig_label_id)); + save_item(NAME(m_csr)); + save_item(NAME(m_imr)); + save_item(NAME(m_busdir)); + save_item(NAME(m_sig_label_id)); - save_item(NAME(m_vertex_count)); - save_item(NAME(m_kick_count)); + save_item(NAME(m_vertex_count)); + save_item(NAME(m_kick_count)); save_item(NAME(m_context[0].m_xyoffset)); save_item(NAME(m_context[0].m_offset_x)); @@ -208,7 +217,7 @@ void ps2_gs_device::device_reset() memset(m_base_regs, 0, sizeof(uint64_t) * 15); - m_pmode = 0; + m_pmode = 0; memset(m_read_circuit_enable, 0, 2); m_use_fixed_alpha = 0; m_alpha_out_select = 0; @@ -240,101 +249,101 @@ void ps2_gs_device::device_reset() m_bg_g = 0; m_bg_b = 0; - m_csr = 0; - m_imr = 0; - m_busdir = 0; - m_sig_label_id = 0; + m_csr = 0; + m_imr = 0; + m_busdir = 0; + m_sig_label_id = 0; memset(m_context, 0, sizeof(context_t) * 2); - m_vertex_count = 0; - m_kick_count = 0; + m_vertex_count = 0; + m_kick_count = 0; } READ64_MEMBER(ps2_gs_device::priv_regs0_r) { - uint64_t ret = m_base_regs[offset >> 1]; - switch (offset) - { - case 0x00: - ret = m_pmode; - logerror("%s: regs0_r: PMODE (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - - case 0x04: - ret = m_smode2; - logerror("%s: regs0_r: SMODE2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - - case 0x0e: - case 0x12: - ret = m_dispfb[(offset - 0x0e) / 4]; - logerror("%s: regs0_r: DISPFB2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - - case 0x10: - case 0x14: - ret = m_display[(offset - 0x10) / 4]; - logerror("%s: regs0_r: DISPLAY2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - - case 0x1c: - ret = m_bgcolor; - logerror("%s: regs0_r: BGCOLOR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - - case 0x02: logerror("%s: regs0_r: SMODE1 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; - case 0x06: logerror("%s: regs0_r: SRFSH (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; - case 0x08: logerror("%s: regs0_r: SYNCH1 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; - case 0x0a: logerror("%s: regs0_r: SYNCH2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; - case 0x0c: logerror("%s: regs0_r: SYNCV (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; - case 0x16: logerror("%s: regs0_r: EXTBUF (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; - case 0x18: logerror("%s: regs0_r: EXTDATA (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; - case 0x1a: logerror("%s: regs0_r: EXTWRITE (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; - default: logerror("%s: regs0_r: Unknown (%08x)\n", machine().describe_context(), 0x12000000 + (offset << 3)); break; - } - return ret; + uint64_t ret = m_base_regs[offset >> 1]; + switch (offset) + { + case 0x00: + ret = m_pmode; + logerror("%s: regs0_r: PMODE (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + + case 0x04: + ret = m_smode2; + logerror("%s: regs0_r: SMODE2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + + case 0x0e: + case 0x12: + ret = m_dispfb[(offset - 0x0e) / 4]; + logerror("%s: regs0_r: DISPFB2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + + case 0x10: + case 0x14: + ret = m_display[(offset - 0x10) / 4]; + logerror("%s: regs0_r: DISPLAY2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + + case 0x1c: + ret = m_bgcolor; + logerror("%s: regs0_r: BGCOLOR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + + case 0x02: logerror("%s: regs0_r: SMODE1 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; + case 0x06: logerror("%s: regs0_r: SRFSH (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; + case 0x08: logerror("%s: regs0_r: SYNCH1 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; + case 0x0a: logerror("%s: regs0_r: SYNCH2 (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; + case 0x0c: logerror("%s: regs0_r: SYNCV (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; + case 0x16: logerror("%s: regs0_r: EXTBUF (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; + case 0x18: logerror("%s: regs0_r: EXTDATA (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; + case 0x1a: logerror("%s: regs0_r: EXTWRITE (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); break; + default: logerror("%s: regs0_r: Unknown (%08x)\n", machine().describe_context(), 0x12000000 + (offset << 3)); break; + } + return ret; } WRITE64_MEMBER(ps2_gs_device::priv_regs0_w) { - switch (offset) - { - case 0x00: // PMODE - m_pmode = data; - m_read_circuit_enable[0] = BIT(data, 0); - m_read_circuit_enable[1] = BIT(data, 1); - m_use_fixed_alpha = BIT(data, 5); - m_alpha_out_select = BIT(data, 6); - m_blend_to_background = BIT(data, 7); - m_fixed_alpha = (data >> 8) & 0xff; - logerror("%s: regs0_w: PMODE = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); - break; - - case 0x04: // SMODE2 - m_smode2 = data; - m_interlace = BIT(data, 0); - m_frame_interlace = BIT(data, 1); - m_dpms_mode = (data >> 2) & 3; - logerror("%s: regs0_w: SMODE2 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); - break; - - case 0x0e: // DISPFB1 - case 0x12: // DISPFB2 - { + switch (offset) + { + case 0x00: // PMODE + m_pmode = data; + m_read_circuit_enable[0] = BIT(data, 0); + m_read_circuit_enable[1] = BIT(data, 1); + m_use_fixed_alpha = BIT(data, 5); + m_alpha_out_select = BIT(data, 6); + m_blend_to_background = BIT(data, 7); + m_fixed_alpha = (data >> 8) & 0xff; + logerror("%s: regs0_w: PMODE = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); + break; + + case 0x04: // SMODE2 + m_smode2 = data; + m_interlace = BIT(data, 0); + m_frame_interlace = BIT(data, 1); + m_dpms_mode = (data >> 2) & 3; + logerror("%s: regs0_w: SMODE2 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); + break; + + case 0x0e: // DISPFB1 + case 0x12: // DISPFB2 + { const uint8_t index = (offset - 0x0e) / 4; - m_dispfb[index] = data; - m_dispfb_base[index] = (data & 0x1ff) << 11; - m_dispfb_width[index] = (data & 0x7e00) >> 3; - m_dispfb_format[index] = (data >> 15) & 0x1f; - m_dispfb_x[index] = (data >> 32) & 0x7ff; - m_dispfb_y[index] = (data >> 42) & 0x7ff; - logerror("%s: regs0_w: DISPFB%d = %08x%08x\n", machine().describe_context(), index + 1, (uint32_t)(data >> 32), (uint32_t)data); + m_dispfb[index] = data; + m_dispfb_base[index] = (data & 0x1ff) << 11; + m_dispfb_width[index] = (data & 0x7e00) >> 3; + m_dispfb_format[index] = (data >> 15) & 0x1f; + m_dispfb_x[index] = (data >> 32) & 0x7ff; + m_dispfb_y[index] = (data >> 42) & 0x7ff; + logerror("%s: regs0_w: DISPFB%d = %08x%08x\n", machine().describe_context(), index + 1, (uint32_t)(data >> 32), (uint32_t)data); break; } - case 0x10: // DISPLAY1 - case 0x14: // DISPLAY2 - { + case 0x10: // DISPLAY1 + case 0x14: // DISPLAY2 + { const uint8_t index = (offset - 0x10) / 4; m_display[index] = data; m_display_xpos[index] = data & 0xfff; @@ -343,84 +352,84 @@ WRITE64_MEMBER(ps2_gs_device::priv_regs0_w) m_magv[index] = (data >> 27) & 3; m_display_width[index] = (data >> 32) & 0xfff; m_display_height[index] = (data >> 44) & 0x7ff; - logerror("%s: regs0_w: DISPLAY%d = %08x%08x\n", machine().describe_context(), index + 1, (uint32_t)(data >> 32), (uint32_t)data); - break; + logerror("%s: regs0_w: DISPLAY%d = %08x%08x\n", machine().describe_context(), index + 1, (uint32_t)(data >> 32), (uint32_t)data); + break; } - case 0x1c: // BGCOLOR - m_bgcolor = data; - m_bg_r = data & 0xff; - m_bg_g = (data >> 8) & 0xff; - m_bg_b = (data >> 16) & 0xff; - logerror("%s: regs0_w: BGCOLOR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); - break; - - case 0x02: logerror("%s: regs0_w: SMODE1 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; - case 0x06: logerror("%s: regs0_w: SRFSH = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; - case 0x08: logerror("%s: regs0_w: SYNCH1 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; - case 0x0a: logerror("%s: regs0_w: SYNCH2 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; - case 0x0c: logerror("%s: regs0_w: SYNCV = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; - case 0x16: logerror("%s: regs0_w: EXTBUF = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; - case 0x18: logerror("%s: regs0_w: EXTDATA = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; - case 0x1a: logerror("%s: regs0_w: EXTWRITE = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; - default: logerror("%s: regs0_w: Unknown %08x = %08x%08x\n", machine().describe_context(), 0x12000000 + (offset << 3), (uint32_t)(data >> 32), (uint32_t)data); break; - } - m_base_regs[offset >> 1] = data; + case 0x1c: // BGCOLOR + m_bgcolor = data; + m_bg_r = data & 0xff; + m_bg_g = (data >> 8) & 0xff; + m_bg_b = (data >> 16) & 0xff; + logerror("%s: regs0_w: BGCOLOR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); + break; + + case 0x02: logerror("%s: regs0_w: SMODE1 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; + case 0x06: logerror("%s: regs0_w: SRFSH = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; + case 0x08: logerror("%s: regs0_w: SYNCH1 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; + case 0x0a: logerror("%s: regs0_w: SYNCH2 = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; + case 0x0c: logerror("%s: regs0_w: SYNCV = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; + case 0x16: logerror("%s: regs0_w: EXTBUF = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; + case 0x18: logerror("%s: regs0_w: EXTDATA = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; + case 0x1a: logerror("%s: regs0_w: EXTWRITE = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); break; + default: logerror("%s: regs0_w: Unknown %08x = %08x%08x\n", machine().describe_context(), 0x12000000 + (offset << 3), (uint32_t)(data >> 32), (uint32_t)data); break; + } + m_base_regs[offset >> 1] = data; } READ64_MEMBER(ps2_gs_device::priv_regs1_r) { uint64_t ret = 0; - switch (offset) - { - case 0x00: - ret = m_csr | (CSR_REV | CSR_ID | CSR_FIFO_EMPTY); - logerror("%s: regs1_r: CSR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - case 0x02: - ret = m_imr; - logerror("%s: regs1_r: IMR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - case 0x08: - ret = m_busdir; - logerror("%s: regs1_r: BUSDIR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - case 0x10: - ret = m_sig_label_id; - logerror("%s: regs1_r: SIGLBLID (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); - break; - default: - logerror("%s: regs1_r: Unknown (%08x)\n", machine().describe_context(), 0x12000000 + (offset << 3)); - break; + switch (offset) + { + case 0x00: + ret = m_csr | (CSR_REV | CSR_ID | CSR_FIFO_EMPTY); + logerror("%s: regs1_r: CSR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + case 0x02: + ret = m_imr; + logerror("%s: regs1_r: IMR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + case 0x08: + ret = m_busdir; + logerror("%s: regs1_r: BUSDIR (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + case 0x10: + ret = m_sig_label_id; + logerror("%s: regs1_r: SIGLBLID (%08x%08x)\n", machine().describe_context(), (uint32_t)(ret >> 32), (uint32_t)ret); + break; + default: + logerror("%s: regs1_r: Unknown (%08x)\n", machine().describe_context(), 0x12000000 + (offset << 3)); + break; } return ret; } WRITE64_MEMBER(ps2_gs_device::priv_regs1_w) { - switch (offset) - { - case 0x00: - logerror("%s: regs1_w: CSR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); - m_csr = data &~ (CSR_RESET | CSR_SIGNAL | CSR_HSINT | CSR_VSINT | CSR_EDWINT | CSR_FLUSH); - //m_csr |= (CSR_SIGNAL | CSR_HSINT | CSR_VSINT | CSR_EDWINT | CSR_FLUSH); - break; - case 0x02: - logerror("%s: regs1_w: IMR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); - m_imr = data; - break; - case 0x08: - logerror("%s: regs1_w: BUSDIR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); - m_busdir = data; - break; - case 0x10: - logerror("%s: regs1_w: SIGLBLID = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); - m_sig_label_id = data; - break; - default: - logerror("%s: regs1_w: Unknown %08x = %08x%08x\n", machine().describe_context(), 0x12000000 + (offset << 3), (uint32_t)(data >> 32), (uint32_t)data); - break; - } + switch (offset) + { + case 0x00: + logerror("%s: regs1_w: CSR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); + m_csr = data &~ (CSR_RESET | CSR_SIGNAL | CSR_HSINT | CSR_VSINT | CSR_EDWINT | CSR_FLUSH); + //m_csr |= (CSR_SIGNAL | CSR_HSINT | CSR_VSINT | CSR_EDWINT | CSR_FLUSH); + break; + case 0x02: + logerror("%s: regs1_w: IMR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); + m_imr = data; + break; + case 0x08: + logerror("%s: regs1_w: BUSDIR = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); + m_busdir = data; + break; + case 0x10: + logerror("%s: regs1_w: SIGLBLID = %08x%08x\n", machine().describe_context(), (uint32_t)(data >> 32), (uint32_t)data); + m_sig_label_id = data; + break; + default: + logerror("%s: regs1_w: Unknown %08x = %08x%08x\n", machine().describe_context(), 0x12000000 + (offset << 3), (uint32_t)(data >> 32), (uint32_t)data); + break; + } } void ps2_gs_device::write_packed(const uint8_t reg, const uint64_t hi, const uint64_t lo) diff --git a/src/devices/video/ps2gs.h b/src/devices/video/ps2gs.h index 1890ef5386f..77de9f40a6f 100644 --- a/src/devices/video/ps2gs.h +++ b/src/devices/video/ps2gs.h @@ -9,11 +9,12 @@ * */ -#ifndef DEVICES_VIDEO_PS2GS_H -#define DEVICES_VIDEO_PS2GS_H +#ifndef MAME_VIDEO_PS2GS_H +#define MAME_VIDEO_PS2GS_H #pragma once + class ps2_intc_device; class ps2_gif_device; class sonyvu1_device; @@ -23,19 +24,20 @@ class ps2_gs_device : public device_t public: template <typename T, typename U> - ps2_gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&intc_tag, U &&vu1_tag) - : ps2_gs_device(mconfig, tag, owner, clock) - { + ps2_gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&intc_tag, U &&vu1_tag) + : ps2_gs_device(mconfig, tag, owner, clock) + { m_intc.set_tag(std::forward<T>(intc_tag)); m_vu1.set_tag(std::forward<U>(vu1_tag)); } ps2_gs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~ps2_gs_device() override; - DECLARE_READ64_MEMBER(priv_regs0_r); - DECLARE_WRITE64_MEMBER(priv_regs0_w); - DECLARE_READ64_MEMBER(priv_regs1_r); - DECLARE_WRITE64_MEMBER(priv_regs1_w); + DECLARE_READ64_MEMBER(priv_regs0_r); + DECLARE_WRITE64_MEMBER(priv_regs0_w); + DECLARE_READ64_MEMBER(priv_regs1_r); + DECLARE_WRITE64_MEMBER(priv_regs1_w); DECLARE_WRITE64_MEMBER(regs_w); @@ -51,8 +53,8 @@ public: void vblank_end(); protected: - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override; + virtual void device_reset() override; virtual void device_add_mconfig(machine_config &config) override; void copy_dword_from_host(uint64_t data); @@ -75,19 +77,19 @@ protected: enum : uint8_t { - PSMCT32 = 0x00, - PSMCT24 = 0x01, - PSMCT16 = 0x02, - PSMCT16S = 0x0a, - PSMT8 = 0x13, - PSMT4 = 0x14, - PSMT8H = 0x1b, - PSMT4HL = 0x24, - PSMT4HH = 0x2c, - PSMZ32 = 0x30, - PSMZ24 = 0x31, - PSMZ16 = 0x32, - PSMZ16S = 0x3a + PSMCT32 = 0x00, + PSMCT24 = 0x01, + PSMCT16 = 0x02, + PSMCT16S = 0x0a, + PSMT8 = 0x13, + PSMT4 = 0x14, + PSMT8H = 0x1b, + PSMT4HL = 0x24, + PSMT4HH = 0x2c, + PSMZ32 = 0x30, + PSMZ24 = 0x31, + PSMZ16 = 0x32, + PSMZ16S = 0x3a }; enum : uint8_t @@ -260,9 +262,9 @@ protected: uint64_t m_trx_dir; // 0x53 // Privileged regs - uint64_t m_base_regs[15]; + uint64_t m_base_regs[15]; - uint64_t m_pmode; // Privileged 0x00 + uint64_t m_pmode; // Privileged 0x00 bool m_read_circuit_enable[2]; bool m_use_fixed_alpha; uint8_t m_alpha_out_select; @@ -294,25 +296,21 @@ protected: uint8_t m_bg_g; uint8_t m_bg_b; - uint64_t m_csr; - uint64_t m_imr; - uint64_t m_busdir; - uint64_t m_sig_label_id; + uint64_t m_csr; + uint64_t m_imr; + uint64_t m_busdir; + uint64_t m_sig_label_id; uint32_t m_vertex_count; uint32_t m_kick_count; uint8_t m_curr_field; - static const size_t FORMAT_PIXEL_WIDTHS[0x40]; - static const char* FORMAT_NAMES[0x40]; - static const uint32_t KICK_COUNTS[8]; + static const size_t FORMAT_PIXEL_WIDTHS[0x40]; + static const char* FORMAT_NAMES[0x40]; + static const uint32_t KICK_COUNTS[8]; }; DECLARE_DEVICE_TYPE(SONYPS2_GS, ps2_gs_device) -#include "ps2gif.h" -#include "cpu/mips/ps2vu.h" -#include "machine/ps2intc.h" - -#endif // DEVICES_VIDEO_PS2GS_H +#endif // MAME_VIDEO_PS2GS_H |