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-rw-r--r--src/devices/cpu/8x300/8x300.cpp4
-rw-r--r--src/devices/cpu/8x300/8x300.h2
-rw-r--r--src/devices/cpu/adsp2100/adsp2100.cpp4
-rw-r--r--src/devices/cpu/adsp2100/adsp2100.h2
-rw-r--r--src/devices/cpu/alph8201/alph8201.cpp4
-rw-r--r--src/devices/cpu/alph8201/alph8201.h2
-rw-r--r--src/devices/cpu/alto2/alto2cpu.cpp4
-rw-r--r--src/devices/cpu/alto2/alto2cpu.h2
-rw-r--r--src/devices/cpu/am29000/am29000.cpp4
-rw-r--r--src/devices/cpu/am29000/am29000.h2
-rw-r--r--src/devices/cpu/amis2000/amis2000.cpp4
-rw-r--r--src/devices/cpu/amis2000/amis2000.h2
-rw-r--r--src/devices/cpu/apexc/apexc.cpp4
-rw-r--r--src/devices/cpu/apexc/apexc.h2
-rw-r--r--src/devices/cpu/arc/arc.cpp4
-rw-r--r--src/devices/cpu/arc/arc.h2
-rw-r--r--src/devices/cpu/arcompact/arcompact.cpp4
-rw-r--r--src/devices/cpu/arcompact/arcompact.h2
-rw-r--r--src/devices/cpu/arm/arm.cpp4
-rw-r--r--src/devices/cpu/arm/arm.h2
-rw-r--r--src/devices/cpu/arm7/arm7.cpp4
-rw-r--r--src/devices/cpu/arm7/arm7.h240
-rw-r--r--src/devices/cpu/arm7/arm7drc.hxx175
-rw-r--r--src/devices/cpu/arm7/arm7tdrc.hxx228
-rw-r--r--src/devices/cpu/asap/asap.cpp4
-rw-r--r--src/devices/cpu/asap/asap.h2
-rw-r--r--src/devices/cpu/avr8/avr8.cpp4
-rw-r--r--src/devices/cpu/avr8/avr8.h2
-rw-r--r--src/devices/cpu/capricorn/capricorn.cpp4
-rw-r--r--src/devices/cpu/capricorn/capricorn.h2
-rw-r--r--src/devices/cpu/ccpu/ccpu.cpp4
-rw-r--r--src/devices/cpu/ccpu/ccpu.h2
-rw-r--r--src/devices/cpu/clipper/clipper.cpp4
-rw-r--r--src/devices/cpu/clipper/clipper.h2
-rw-r--r--src/devices/cpu/cop400/cop400.cpp24
-rw-r--r--src/devices/cpu/cop400/cop400.h2
-rw-r--r--src/devices/cpu/cosmac/cosmac.cpp8
-rw-r--r--src/devices/cpu/cosmac/cosmac.h4
-rw-r--r--src/devices/cpu/cp1610/cp1610.cpp4
-rw-r--r--src/devices/cpu/cp1610/cp1610.h2
-rw-r--r--src/devices/cpu/cubeqcpu/cubeqcpu.cpp12
-rw-r--r--src/devices/cpu/cubeqcpu/cubeqcpu.h6
-rw-r--r--src/devices/cpu/diablo/diablo1300.cpp4
-rw-r--r--src/devices/cpu/diablo/diablo1300.h2
-rw-r--r--src/devices/cpu/drcuml.cpp4
-rw-r--r--src/devices/cpu/drcuml.h2
-rw-r--r--src/devices/cpu/drcumlsh.h290
-rw-r--r--src/devices/cpu/dsp16/dsp16.cpp4
-rw-r--r--src/devices/cpu/dsp16/dsp16.h2
-rw-r--r--src/devices/cpu/dsp32/dsp32.cpp4
-rw-r--r--src/devices/cpu/dsp32/dsp32.h2
-rw-r--r--src/devices/cpu/dsp56k/dsp56k.cpp4
-rw-r--r--src/devices/cpu/dsp56k/dsp56k.h2
-rw-r--r--src/devices/cpu/e0c6200/e0c6200.cpp4
-rw-r--r--src/devices/cpu/e0c6200/e0c6200.h2
-rw-r--r--src/devices/cpu/e132xs/e132xs.cpp4
-rw-r--r--src/devices/cpu/e132xs/e132xs.h215
-rw-r--r--src/devices/cpu/e132xs/e132xsdrc.cpp104
-rw-r--r--src/devices/cpu/e132xs/e132xsdrc_ops.hxx318
-rw-r--r--src/devices/cpu/es5510/es5510.cpp4
-rw-r--r--src/devices/cpu/es5510/es5510.h2
-rw-r--r--src/devices/cpu/esrip/esrip.cpp4
-rw-r--r--src/devices/cpu/esrip/esrip.h2
-rw-r--r--src/devices/cpu/f8/f8.cpp4
-rw-r--r--src/devices/cpu/f8/f8.h2
-rw-r--r--src/devices/cpu/g65816/g65816.cpp4
-rw-r--r--src/devices/cpu/g65816/g65816.h2
-rw-r--r--src/devices/cpu/h6280/h6280.cpp4
-rw-r--r--src/devices/cpu/h6280/h6280.h2
-rw-r--r--src/devices/cpu/h8/h8.cpp4
-rw-r--r--src/devices/cpu/h8/h8.h2
-rw-r--r--src/devices/cpu/h8/h8h.cpp4
-rw-r--r--src/devices/cpu/h8/h8h.h2
-rw-r--r--src/devices/cpu/h8/h8s2000.cpp4
-rw-r--r--src/devices/cpu/h8/h8s2000.h2
-rw-r--r--src/devices/cpu/h8/h8s2600.cpp4
-rw-r--r--src/devices/cpu/h8/h8s2600.h2
-rw-r--r--src/devices/cpu/hcd62121/hcd62121.cpp4
-rw-r--r--src/devices/cpu/hcd62121/hcd62121.h2
-rw-r--r--src/devices/cpu/hd61700/hd61700.cpp4
-rw-r--r--src/devices/cpu/hd61700/hd61700.h2
-rw-r--r--src/devices/cpu/hmcs40/hmcs40.cpp4
-rw-r--r--src/devices/cpu/hmcs40/hmcs40.h2
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.cpp8
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.h4
-rw-r--r--src/devices/cpu/i386/i386.cpp4
-rw-r--r--src/devices/cpu/i386/i386.h2
-rw-r--r--src/devices/cpu/i8008/i8008.cpp4
-rw-r--r--src/devices/cpu/i8008/i8008.h2
-rw-r--r--src/devices/cpu/i8085/i8085.cpp4
-rw-r--r--src/devices/cpu/i8085/i8085.h2
-rw-r--r--src/devices/cpu/i8089/i8089.cpp4
-rw-r--r--src/devices/cpu/i8089/i8089.h2
-rw-r--r--src/devices/cpu/i86/i86.cpp4
-rw-r--r--src/devices/cpu/i86/i86.h2
-rw-r--r--src/devices/cpu/i860/i860.cpp4
-rw-r--r--src/devices/cpu/i860/i860.h2
-rw-r--r--src/devices/cpu/i960/i960.cpp4
-rw-r--r--src/devices/cpu/i960/i960.h2
-rw-r--r--src/devices/cpu/ie15/ie15.cpp4
-rw-r--r--src/devices/cpu/ie15/ie15.h2
-rw-r--r--src/devices/cpu/jaguar/jaguar.cpp8
-rw-r--r--src/devices/cpu/jaguar/jaguar.h4
-rw-r--r--src/devices/cpu/lc8670/lc8670.cpp4
-rw-r--r--src/devices/cpu/lc8670/lc8670.h2
-rw-r--r--src/devices/cpu/lh5801/lh5801.cpp4
-rw-r--r--src/devices/cpu/lh5801/lh5801.h2
-rw-r--r--src/devices/cpu/lr35902/lr35902.cpp4
-rw-r--r--src/devices/cpu/lr35902/lr35902.h2
-rw-r--r--src/devices/cpu/m37710/m37710.cpp4
-rw-r--r--src/devices/cpu/m37710/m37710.h2
-rw-r--r--src/devices/cpu/m6502/deco16.cpp4
-rw-r--r--src/devices/cpu/m6502/deco16.h2
-rw-r--r--src/devices/cpu/m6502/m4510.cpp4
-rw-r--r--src/devices/cpu/m6502/m4510.h2
-rw-r--r--src/devices/cpu/m6502/m6502.cpp4
-rw-r--r--src/devices/cpu/m6502/m6502.h2
-rw-r--r--src/devices/cpu/m6502/m6509.cpp4
-rw-r--r--src/devices/cpu/m6502/m6509.h2
-rw-r--r--src/devices/cpu/m6502/m6510.cpp4
-rw-r--r--src/devices/cpu/m6502/m6510.h2
-rw-r--r--src/devices/cpu/m6502/m65c02.cpp4
-rw-r--r--src/devices/cpu/m6502/m65c02.h2
-rw-r--r--src/devices/cpu/m6502/m65ce02.cpp4
-rw-r--r--src/devices/cpu/m6502/m65ce02.h2
-rw-r--r--src/devices/cpu/m6502/m740.cpp4
-rw-r--r--src/devices/cpu/m6502/m740.h2
-rw-r--r--src/devices/cpu/m6502/n2a03.cpp4
-rw-r--r--src/devices/cpu/m6502/n2a03.h2
-rw-r--r--src/devices/cpu/m6502/r65c02.cpp4
-rw-r--r--src/devices/cpu/m6502/r65c02.h2
-rw-r--r--src/devices/cpu/m6502/xavix.cpp4
-rw-r--r--src/devices/cpu/m6502/xavix.h2
-rw-r--r--src/devices/cpu/m6800/m6800.cpp16
-rw-r--r--src/devices/cpu/m6800/m6800.h8
-rw-r--r--src/devices/cpu/m6800/m6801.cpp16
-rw-r--r--src/devices/cpu/m6800/m6801.h8
-rw-r--r--src/devices/cpu/m68000/m68000.h38
-rw-r--r--src/devices/cpu/m68000/m68kcpu.cpp76
-rw-r--r--src/devices/cpu/m6805/m6805.cpp4
-rw-r--r--src/devices/cpu/m6805/m6805.h2
-rw-r--r--src/devices/cpu/m6805/m68705.cpp12
-rw-r--r--src/devices/cpu/m6805/m68705.h6
-rw-r--r--src/devices/cpu/m6805/m68hc05.cpp16
-rw-r--r--src/devices/cpu/m6805/m68hc05.h8
-rw-r--r--src/devices/cpu/m6809/hd6309.cpp4
-rw-r--r--src/devices/cpu/m6809/hd6309.h2
-rw-r--r--src/devices/cpu/m6809/konami.cpp4
-rw-r--r--src/devices/cpu/m6809/konami.h2
-rw-r--r--src/devices/cpu/m6809/m6809.cpp4
-rw-r--r--src/devices/cpu/m6809/m6809.h2
-rw-r--r--src/devices/cpu/mb86233/mb86233.cpp4
-rw-r--r--src/devices/cpu/mb86233/mb86233.h2
-rw-r--r--src/devices/cpu/mb86235/mb86235.cpp4
-rw-r--r--src/devices/cpu/mb86235/mb86235.h48
-rw-r--r--src/devices/cpu/mb86235/mb86235drc.cpp490
-rw-r--r--src/devices/cpu/mb88xx/mb88xx.cpp4
-rw-r--r--src/devices/cpu/mb88xx/mb88xx.h2
-rw-r--r--src/devices/cpu/mc68hc11/mc68hc11.cpp4
-rw-r--r--src/devices/cpu/mc68hc11/mc68hc11.h2
-rw-r--r--src/devices/cpu/mcs40/mcs40.cpp8
-rw-r--r--src/devices/cpu/mcs40/mcs40.h4
-rw-r--r--src/devices/cpu/mcs48/mcs48.cpp4
-rw-r--r--src/devices/cpu/mcs48/mcs48.h2
-rw-r--r--src/devices/cpu/mcs51/mcs51.cpp24
-rw-r--r--src/devices/cpu/mcs51/mcs51.h12
-rw-r--r--src/devices/cpu/mcs96/i8x9x.cpp4
-rw-r--r--src/devices/cpu/mcs96/i8x9x.h2
-rw-r--r--src/devices/cpu/mcs96/i8xc196.cpp4
-rw-r--r--src/devices/cpu/mcs96/i8xc196.h2
-rw-r--r--src/devices/cpu/melps4/melps4.cpp4
-rw-r--r--src/devices/cpu/melps4/melps4.h2
-rw-r--r--src/devices/cpu/minx/minx.cpp4
-rw-r--r--src/devices/cpu/minx/minx.h2
-rw-r--r--src/devices/cpu/mips/mips3.cpp4
-rw-r--r--src/devices/cpu/mips/mips3.h79
-rw-r--r--src/devices/cpu/mips/mips3com.h11
-rw-r--r--src/devices/cpu/mips/mips3drc.cpp547
-rw-r--r--src/devices/cpu/mips/mips3fe.h7
-rw-r--r--src/devices/cpu/mips/r3000.cpp4
-rw-r--r--src/devices/cpu/mips/r3000.h2
-rw-r--r--src/devices/cpu/mn10200/mn10200.cpp4
-rw-r--r--src/devices/cpu/mn10200/mn10200.h2
-rw-r--r--src/devices/cpu/nanoprocessor/nanoprocessor.cpp4
-rw-r--r--src/devices/cpu/nanoprocessor/nanoprocessor.h2
-rw-r--r--src/devices/cpu/nec/nec.cpp4
-rw-r--r--src/devices/cpu/nec/nec.h2
-rw-r--r--src/devices/cpu/nec/v25.cpp4
-rw-r--r--src/devices/cpu/nec/v25.h2
-rw-r--r--src/devices/cpu/nuon/nuon.h4
-rw-r--r--src/devices/cpu/patinhofeio/patinho_feio.cpp4
-rw-r--r--src/devices/cpu/patinhofeio/patinhofeio_cpu.h2
-rw-r--r--src/devices/cpu/pdp1/pdp1.cpp4
-rw-r--r--src/devices/cpu/pdp1/pdp1.h2
-rw-r--r--src/devices/cpu/pdp1/tx0.cpp8
-rw-r--r--src/devices/cpu/pdp1/tx0.h4
-rw-r--r--src/devices/cpu/pdp8/pdp8.cpp4
-rw-r--r--src/devices/cpu/pdp8/pdp8.h2
-rw-r--r--src/devices/cpu/pic16c5x/pic16c5x.cpp4
-rw-r--r--src/devices/cpu/pic16c5x/pic16c5x.h2
-rw-r--r--src/devices/cpu/pic16c62x/pic16c62x.cpp4
-rw-r--r--src/devices/cpu/pic16c62x/pic16c62x.h2
-rw-r--r--src/devices/cpu/powerpc/ppc.h40
-rw-r--r--src/devices/cpu/powerpc/ppccom.cpp4
-rw-r--r--src/devices/cpu/powerpc/ppcdrc.cpp153
-rw-r--r--src/devices/cpu/pps4/pps4.cpp4
-rw-r--r--src/devices/cpu/pps4/pps4.h2
-rw-r--r--src/devices/cpu/psx/psx.cpp4
-rw-r--r--src/devices/cpu/psx/psx.h2
-rw-r--r--src/devices/cpu/rsp/rsp.cpp19
-rw-r--r--src/devices/cpu/rsp/rsp.h43
-rw-r--r--src/devices/cpu/rsp/rspcp2.cpp52
-rw-r--r--src/devices/cpu/rsp/rspcp2.h23
-rw-r--r--src/devices/cpu/rsp/rspcp2d.cpp646
-rw-r--r--src/devices/cpu/rsp/rspcp2d.h92
-rw-r--r--src/devices/cpu/rsp/rspdrc.cpp140
-rw-r--r--src/devices/cpu/rsp/rspfe.cpp18
-rw-r--r--src/devices/cpu/rsp/rspfe.h11
-rw-r--r--src/devices/cpu/s2650/s2650.cpp4
-rw-r--r--src/devices/cpu/s2650/s2650.h2
-rw-r--r--src/devices/cpu/saturn/saturn.cpp4
-rw-r--r--src/devices/cpu/saturn/saturn.h2
-rw-r--r--src/devices/cpu/sc61860/sc61860.cpp4
-rw-r--r--src/devices/cpu/sc61860/sc61860.h2
-rw-r--r--src/devices/cpu/scmp/scmp.cpp4
-rw-r--r--src/devices/cpu/scmp/scmp.h2
-rw-r--r--src/devices/cpu/score/score.cpp4
-rw-r--r--src/devices/cpu/score/score.h2
-rw-r--r--src/devices/cpu/scudsp/scudsp.cpp4
-rw-r--r--src/devices/cpu/scudsp/scudsp.h2
-rw-r--r--src/devices/cpu/se3208/se3208.cpp4
-rw-r--r--src/devices/cpu/se3208/se3208.h2
-rw-r--r--src/devices/cpu/sh/sh.cpp290
-rw-r--r--src/devices/cpu/sh/sh.h51
-rw-r--r--src/devices/cpu/sh/sh2.cpp49
-rw-r--r--src/devices/cpu/sh/sh2.h6
-rw-r--r--src/devices/cpu/sh/sh2drc.cpp0
-rw-r--r--src/devices/cpu/sh/sh4.cpp199
-rw-r--r--src/devices/cpu/sh/sh4.h160
-rw-r--r--src/devices/cpu/sharc/sharc.cpp4
-rw-r--r--src/devices/cpu/sharc/sharc.h46
-rw-r--r--src/devices/cpu/sharc/sharcdrc.cpp732
-rw-r--r--src/devices/cpu/sharc/sharcfe.h6
-rw-r--r--src/devices/cpu/sm510/sm500.h4
-rw-r--r--src/devices/cpu/sm510/sm500core.cpp4
-rw-r--r--src/devices/cpu/sm510/sm510.h4
-rw-r--r--src/devices/cpu/sm510/sm510core.cpp4
-rw-r--r--src/devices/cpu/sm510/sm511core.cpp4
-rw-r--r--src/devices/cpu/sm510/sm590.h2
-rw-r--r--src/devices/cpu/sm510/sm590core.cpp4
-rw-r--r--src/devices/cpu/sm510/sm5acore.cpp4
-rw-r--r--src/devices/cpu/sm8500/sm8500.cpp4
-rw-r--r--src/devices/cpu/sm8500/sm8500.h2
-rw-r--r--src/devices/cpu/sparc/mb86901.cpp6
-rw-r--r--src/devices/cpu/sparc/sparc.h2
-rw-r--r--src/devices/cpu/spc700/spc700.cpp4
-rw-r--r--src/devices/cpu/spc700/spc700.h2
-rw-r--r--src/devices/cpu/ssem/ssem.cpp4
-rw-r--r--src/devices/cpu/ssem/ssem.h2
-rw-r--r--src/devices/cpu/ssp1601/ssp1601.cpp4
-rw-r--r--src/devices/cpu/ssp1601/ssp1601.h2
-rw-r--r--src/devices/cpu/superfx/superfx.cpp4
-rw-r--r--src/devices/cpu/superfx/superfx.h2
-rw-r--r--src/devices/cpu/t11/t11.cpp4
-rw-r--r--src/devices/cpu/t11/t11.h2
-rw-r--r--src/devices/cpu/tlcs870/tlcs870.cpp4
-rw-r--r--src/devices/cpu/tlcs870/tlcs870.h2
-rw-r--r--src/devices/cpu/tlcs90/tlcs90.cpp4
-rw-r--r--src/devices/cpu/tlcs90/tlcs90.h2
-rw-r--r--src/devices/cpu/tlcs900/tlcs900.cpp4
-rw-r--r--src/devices/cpu/tlcs900/tlcs900.h2
-rw-r--r--src/devices/cpu/tms1000/tms0980.cpp4
-rw-r--r--src/devices/cpu/tms1000/tms0980.h2
-rw-r--r--src/devices/cpu/tms1000/tms1000.cpp4
-rw-r--r--src/devices/cpu/tms1000/tms1000.h2
-rw-r--r--src/devices/cpu/tms1000/tms1100.cpp4
-rw-r--r--src/devices/cpu/tms1000/tms1100.h2
-rw-r--r--src/devices/cpu/tms1000/tp0320.cpp4
-rw-r--r--src/devices/cpu/tms1000/tp0320.h2
-rw-r--r--src/devices/cpu/tms32010/tms32010.cpp4
-rw-r--r--src/devices/cpu/tms32010/tms32010.h2
-rw-r--r--src/devices/cpu/tms32025/tms32025.cpp4
-rw-r--r--src/devices/cpu/tms32025/tms32025.h2
-rw-r--r--src/devices/cpu/tms32031/tms32031.cpp4
-rw-r--r--src/devices/cpu/tms32031/tms32031.h2
-rw-r--r--src/devices/cpu/tms32051/tms32051.cpp4
-rw-r--r--src/devices/cpu/tms32051/tms32051.h2
-rw-r--r--src/devices/cpu/tms32082/tms32082.cpp8
-rw-r--r--src/devices/cpu/tms32082/tms32082.h4
-rw-r--r--src/devices/cpu/tms34010/tms34010.cpp8
-rw-r--r--src/devices/cpu/tms34010/tms34010.h4
-rw-r--r--src/devices/cpu/tms57002/tms57002.cpp4
-rw-r--r--src/devices/cpu/tms57002/tms57002.h2
-rw-r--r--src/devices/cpu/tms7000/tms7000.cpp4
-rw-r--r--src/devices/cpu/tms7000/tms7000.h2
-rw-r--r--src/devices/cpu/tms9900/ti990_10.cpp4
-rw-r--r--src/devices/cpu/tms9900/ti990_10.h2
-rw-r--r--src/devices/cpu/tms9900/tms9900.cpp4
-rw-r--r--src/devices/cpu/tms9900/tms9900.h2
-rw-r--r--src/devices/cpu/tms9900/tms9980a.cpp4
-rw-r--r--src/devices/cpu/tms9900/tms9980a.h2
-rw-r--r--src/devices/cpu/tms9900/tms9995.cpp4
-rw-r--r--src/devices/cpu/tms9900/tms9995.h2
-rw-r--r--src/devices/cpu/ucom4/ucom4.cpp4
-rw-r--r--src/devices/cpu/ucom4/ucom4.h2
-rw-r--r--src/devices/cpu/unsp/unsp.cpp4
-rw-r--r--src/devices/cpu/unsp/unsp.h2
-rw-r--r--src/devices/cpu/upd7725/upd7725.cpp4
-rw-r--r--src/devices/cpu/upd7725/upd7725.h2
-rw-r--r--src/devices/cpu/upd7810/upd7810.cpp16
-rw-r--r--src/devices/cpu/upd7810/upd7810.h8
-rw-r--r--src/devices/cpu/v30mz/v30mz.cpp4
-rw-r--r--src/devices/cpu/v30mz/v30mz.h2
-rw-r--r--src/devices/cpu/v60/v60.cpp4
-rw-r--r--src/devices/cpu/v60/v60.h2
-rw-r--r--src/devices/cpu/v810/v810.cpp4
-rw-r--r--src/devices/cpu/v810/v810.h2
-rw-r--r--src/devices/cpu/z180/z180.cpp4
-rw-r--r--src/devices/cpu/z180/z180.h2
-rw-r--r--src/devices/cpu/z8/z8.cpp4
-rw-r--r--src/devices/cpu/z8/z8.h2
-rw-r--r--src/devices/cpu/z80/z80.cpp4
-rw-r--r--src/devices/cpu/z80/z80.h2
-rw-r--r--src/devices/cpu/z8000/z8000.cpp4
-rw-r--r--src/devices/cpu/z8000/z8000.h2
-rw-r--r--src/devices/machine/netlist.cpp4
-rw-r--r--src/devices/machine/netlist.h2
327 files changed, 3157 insertions, 3561 deletions
diff --git a/src/devices/cpu/8x300/8x300.cpp b/src/devices/cpu/8x300/8x300.cpp
index 575b3f2d0d0..3c44d47c313 100644
--- a/src/devices/cpu/8x300/8x300.cpp
+++ b/src/devices/cpu/8x300/8x300.cpp
@@ -591,7 +591,7 @@ void n8x300_cpu_device::execute_run()
} while (m_icount > 0);
}
-util::disasm_interface *n8x300_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> n8x300_cpu_device::create_disassembler()
{
- return new n8x300_disassembler;
+ return std::make_unique<n8x300_disassembler>();
}
diff --git a/src/devices/cpu/8x300/8x300.h b/src/devices/cpu/8x300/8x300.h
index 7a36dc941a6..aa62259ba1a 100644
--- a/src/devices/cpu/8x300/8x300.h
+++ b/src/devices/cpu/8x300/8x300.h
@@ -63,7 +63,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
address_space_config m_io_config;
diff --git a/src/devices/cpu/adsp2100/adsp2100.cpp b/src/devices/cpu/adsp2100/adsp2100.cpp
index 55b445b044f..a04d4521727 100644
--- a/src/devices/cpu/adsp2100/adsp2100.cpp
+++ b/src/devices/cpu/adsp2100/adsp2100.cpp
@@ -763,9 +763,9 @@ void adsp21xx_device::state_string_export(const device_state_entry &entry, std::
// helper function
//-------------------------------------------------
-util::disasm_interface *adsp21xx_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> adsp21xx_device::create_disassembler()
{
- return new adsp21xx_disassembler;
+ return std::make_unique<adsp21xx_disassembler>();
}
diff --git a/src/devices/cpu/adsp2100/adsp2100.h b/src/devices/cpu/adsp2100/adsp2100.h
index 9a7d8561621..1c45875c727 100644
--- a/src/devices/cpu/adsp2100/adsp2100.h
+++ b/src/devices/cpu/adsp2100/adsp2100.h
@@ -243,7 +243,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// helpers
void create_tables();
diff --git a/src/devices/cpu/alph8201/alph8201.cpp b/src/devices/cpu/alph8201/alph8201.cpp
index 8a422d3a450..61da750fe7d 100644
--- a/src/devices/cpu/alph8201/alph8201.cpp
+++ b/src/devices/cpu/alph8201/alph8201.cpp
@@ -690,7 +690,7 @@ void alpha8201_cpu_device::execute_set_input(int inputnum, int state)
}
}
-util::disasm_interface *alpha8201_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> alpha8201_cpu_device::create_disassembler()
{
- return new alpha8201_disassembler;
+ return std::make_unique<alpha8201_disassembler>();
}
diff --git a/src/devices/cpu/alph8201/alph8201.h b/src/devices/cpu/alph8201/alph8201.h
index 5627bf23068..77f442161c6 100644
--- a/src/devices/cpu/alph8201/alph8201.h
+++ b/src/devices/cpu/alph8201/alph8201.h
@@ -83,7 +83,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
u8 M_RDMEM(u16 A) { return m_program->read_byte(A); }
void M_WRMEM(u16 A, u8 V) { m_program->write_byte(A, V); }
diff --git a/src/devices/cpu/alto2/alto2cpu.cpp b/src/devices/cpu/alto2/alto2cpu.cpp
index 993738f82e0..cfe4d1a2fc4 100644
--- a/src/devices/cpu/alto2/alto2cpu.cpp
+++ b/src/devices/cpu/alto2/alto2cpu.cpp
@@ -2982,7 +2982,7 @@ void alto2_cpu_device::soft_reset()
m_bitclk_time = 0; // reset the bitclk timing accu
}
-util::disasm_interface *alto2_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> alto2_cpu_device::create_disassembler()
{
- return new alto2_disassembler;
+ return std::make_unique<alto2_disassembler>();
}
diff --git a/src/devices/cpu/alto2/alto2cpu.h b/src/devices/cpu/alto2/alto2cpu.h
index 3b4b0f4fc4f..ec5f3e2a372 100644
--- a/src/devices/cpu/alto2/alto2cpu.h
+++ b/src/devices/cpu/alto2/alto2cpu.h
@@ -238,7 +238,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
//! device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
diff --git a/src/devices/cpu/am29000/am29000.cpp b/src/devices/cpu/am29000/am29000.cpp
index fffd26c3cbc..36563ae5a81 100644
--- a/src/devices/cpu/am29000/am29000.cpp
+++ b/src/devices/cpu/am29000/am29000.cpp
@@ -703,7 +703,7 @@ void am29000_cpu_device::execute_set_input(int inputnum, int state)
// TODO : CHECK IRQs
}
-util::disasm_interface *am29000_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> am29000_cpu_device::create_disassembler()
{
- return new am29000_disassembler;
+ return std::make_unique<am29000_disassembler>();
}
diff --git a/src/devices/cpu/am29000/am29000.h b/src/devices/cpu/am29000/am29000.h
index d7d061996e8..d856fdf93d1 100644
--- a/src/devices/cpu/am29000/am29000.h
+++ b/src/devices/cpu/am29000/am29000.h
@@ -458,7 +458,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
void signal_exception(uint32_t type);
void external_irq_check();
diff --git a/src/devices/cpu/amis2000/amis2000.cpp b/src/devices/cpu/amis2000/amis2000.cpp
index 46217cc1d2e..fa092f0304b 100644
--- a/src/devices/cpu/amis2000/amis2000.cpp
+++ b/src/devices/cpu/amis2000/amis2000.cpp
@@ -99,9 +99,9 @@ void amis2000_base_device::state_string_export(const device_state_entry &entry,
}
}
-util::disasm_interface *amis2000_base_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> amis2000_base_device::create_disassembler()
{
- return new amis2000_disassembler;
+ return std::make_unique<amis2000_disassembler>();
}
diff --git a/src/devices/cpu/amis2000/amis2000.h b/src/devices/cpu/amis2000/amis2000.h
index b592bdd9466..abf3b55fca8 100644
--- a/src/devices/cpu/amis2000/amis2000.h
+++ b/src/devices/cpu/amis2000/amis2000.h
@@ -91,7 +91,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/apexc/apexc.cpp b/src/devices/cpu/apexc/apexc.cpp
index d870735a5c7..85b9a398853 100644
--- a/src/devices/cpu/apexc/apexc.cpp
+++ b/src/devices/cpu/apexc/apexc.cpp
@@ -857,7 +857,7 @@ void apexc_cpu_device::execute_run()
} while (m_icount > 0);
}
-util::disasm_interface *apexc_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> apexc_cpu_device::create_disassembler()
{
- return new apexc_disassembler;
+ return std::make_unique<apexc_disassembler>();
}
diff --git a/src/devices/cpu/apexc/apexc.h b/src/devices/cpu/apexc/apexc.h
index daa42e8ddd8..74a19a594be 100644
--- a/src/devices/cpu/apexc/apexc.h
+++ b/src/devices/cpu/apexc/apexc.h
@@ -50,7 +50,7 @@ protected:
virtual void state_import(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
inline uint32_t apexc_readmem(uint32_t address) { return m_program->read_dword((address)<<2); }
inline void apexc_writemem(uint32_t address, uint32_t data) { m_program->write_dword((address)<<2, (data)); }
diff --git a/src/devices/cpu/arc/arc.cpp b/src/devices/cpu/arc/arc.cpp
index e88624e93be..3553f328c6c 100644
--- a/src/devices/cpu/arc/arc.cpp
+++ b/src/devices/cpu/arc/arc.cpp
@@ -27,9 +27,9 @@ arc_cpu_device::arc_cpu_device(const machine_config &mconfig, const char *tag, d
}
-util::disasm_interface *arc_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> arc_cpu_device::create_disassembler()
{
- return new arc_disassembler;
+ return std::make_unique<arc_disassembler>();
}
/*****************************************************************************/
diff --git a/src/devices/cpu/arc/arc.h b/src/devices/cpu/arc/arc.h
index 7bdf1123ec8..ba9bfe02fe4 100644
--- a/src/devices/cpu/arc/arc.h
+++ b/src/devices/cpu/arc/arc.h
@@ -43,7 +43,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/arcompact/arcompact.cpp b/src/devices/cpu/arcompact/arcompact.cpp
index a8dae0358af..bbae63217cf 100644
--- a/src/devices/cpu/arcompact/arcompact.cpp
+++ b/src/devices/cpu/arcompact/arcompact.cpp
@@ -64,9 +64,9 @@ device_memory_interface::space_config_vector arcompact_device::memory_space_conf
};
}
-util::disasm_interface *arcompact_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> arcompact_device::create_disassembler()
{
- return new arcompact_disassembler;
+ return std::make_unique<arcompact_disassembler>();
}
diff --git a/src/devices/cpu/arcompact/arcompact.h b/src/devices/cpu/arcompact/arcompact.h
index 4365b4927f5..8025510a203 100644
--- a/src/devices/cpu/arcompact/arcompact.h
+++ b/src/devices/cpu/arcompact/arcompact.h
@@ -103,7 +103,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp
index 77c8a44ac6d..4c5d058a009 100644
--- a/src/devices/cpu/arm/arm.cpp
+++ b/src/devices/cpu/arm/arm.cpp
@@ -1560,7 +1560,7 @@ void arm_cpu_device::HandleCoPro( uint32_t insn )
}
-util::disasm_interface *arm_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> arm_cpu_device::create_disassembler()
{
- return new arm_disassembler;
+ return std::make_unique<arm_disassembler>();
}
diff --git a/src/devices/cpu/arm/arm.h b/src/devices/cpu/arm/arm.h
index e1795f0594d..e7bbee69087 100644
--- a/src/devices/cpu/arm/arm.h
+++ b/src/devices/cpu/arm/arm.h
@@ -64,7 +64,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp
index 54e4337147b..06625c8c344 100644
--- a/src/devices/cpu/arm7/arm7.cpp
+++ b/src/devices/cpu/arm7/arm7.cpp
@@ -971,9 +971,9 @@ void arm7_cpu_device::execute_set_input(int irqline, int state)
}
-util::disasm_interface *arm7_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> arm7_cpu_device::create_disassembler()
{
- return new arm7_disassembler(this);
+ return std::make_unique<arm7_disassembler>(this);
}
bool arm7_cpu_device::get_t_flag() const
diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h
index def6bed007b..d2fc97a27c5 100644
--- a/src/devices/cpu/arm7/arm7.h
+++ b/src/devices/cpu/arm7/arm7.h
@@ -130,7 +130,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual bool get_t_flag() const override;
address_space_config m_program_config;
@@ -374,6 +374,8 @@ protected:
/* internal compiler state */
struct compiler_state
{
+ compiler_state &operator=(compiler_state const &) = delete;
+
uint32_t cycles; /* accumulated cycles */
uint8_t checkints; /* need to check interrupts before next instruction */
uint8_t checksoftints; /* need to check software interrupts before next instruction */
@@ -426,114 +428,114 @@ protected:
hotspot_info hotspot[ARM7_MAX_HOTSPOTS];
} m_impstate;
- typedef void ( arm7_cpu_device::*arm7thumb_drcophandler)(drcuml_block*, compiler_state*, const opcode_desc*);
+ typedef void ( arm7_cpu_device::*arm7thumb_drcophandler)(drcuml_block &, compiler_state &, const opcode_desc *);
static const arm7thumb_drcophandler drcthumb_handler[0x40*0x10];
- void drctg00_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Shift left */
- void drctg00_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Shift right */
- void drctg01_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg01_10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg01_11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* SUB Rd, Rs, Rn */
- void drctg01_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ADD Rd, Rs, #imm */
- void drctg01_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* SUB Rd, Rs, #imm */
- void drctg02_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg02_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg03_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ADD Rd, #Offset8 */
- void drctg03_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* SUB Rd, #Offset8 */
- void drctg04_00_00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* AND Rd, Rs */
- void drctg04_00_01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* EOR Rd, Rs */
- void drctg04_00_02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* LSL Rd, Rs */
- void drctg04_00_03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* LSR Rd, Rs */
- void drctg04_00_04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ASR Rd, Rs */
- void drctg04_00_05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ADC Rd, Rs */
- void drctg04_00_06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* SBC Rd, Rs */
- void drctg04_00_07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ROR Rd, Rs */
- void drctg04_00_08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* TST Rd, Rs */
- void drctg04_00_09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* NEG Rd, Rs */
- void drctg04_00_0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* CMP Rd, Rs */
- void drctg04_00_0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* CMN Rd, Rs - check flags, add dasm */
- void drctg04_00_0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ORR Rd, Rs */
- void drctg04_00_0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* MUL Rd, Rs */
- void drctg04_00_0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* BIC Rd, Rs */
- void drctg04_00_0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* MVN Rd, Rs */
- void drctg04_01_00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg04_01_01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ADD Rd, HRs */
- void drctg04_01_02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ADD HRd, Rs */
- void drctg04_01_03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Add HRd, HRs */
- void drctg04_01_10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* CMP Rd, Rs */
- void drctg04_01_11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* CMP Rd, Hs */
- void drctg04_01_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* CMP Hd, Rs */
- void drctg04_01_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* CMP Hd, Hs */
- void drctg04_01_20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* MOV Rd, Rs (undefined) */
- void drctg04_01_21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* MOV Rd, Hs */
- void drctg04_01_22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* MOV Hd, Rs */
- void drctg04_01_23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* MOV Hd, Hs */
- void drctg04_01_30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg04_01_31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg04_01_32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg04_01_33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg04_0203(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg05_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* STR Rd, [Rn, Rm] */
- void drctg05_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* STRH Rd, [Rn, Rm] */
- void drctg05_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* STRB Rd, [Rn, Rm] */
- void drctg05_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* LDSB Rd, [Rn, Rm] todo, add dasm */
- void drctg05_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* LDR Rd, [Rn, Rm] */
- void drctg05_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* LDRH Rd, [Rn, Rm] */
- void drctg05_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* LDRB Rd, [Rn, Rm] */
- void drctg05_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* LDSH Rd, [Rn, Rm] */
- void drctg06_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Store */
- void drctg06_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Load */
- void drctg07_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Store */
- void drctg07_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Load */
- void drctg08_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Store */
- void drctg08_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Load */
- void drctg09_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Store */
- void drctg09_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Load */
- void drctg0a_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ADD Rd, PC, #nn */
- void drctg0a_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ADD Rd, SP, #nn */
- void drctg0b_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* ADD SP, #imm */
- void drctg0b_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* PUSH {Rlist} */
- void drctg0b_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* PUSH {Rlist}{LR} */
- void drctg0b_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* POP {Rlist} */
- void drctg0b_d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* POP {Rlist}{PC} */
- void drctg0b_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0b_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0c_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Store */
- void drctg0c_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* Load */
- void drctg0d_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_EQ:
- void drctg0d_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_NE:
- void drctg0d_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_CS:
- void drctg0d_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_CC:
- void drctg0d_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_MI:
- void drctg0d_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_PL:
- void drctg0d_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_VS:
- void drctg0d_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_VC:
- void drctg0d_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_HI:
- void drctg0d_9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_LS:
- void drctg0d_a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_GE:
- void drctg0d_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_LT:
- void drctg0d_c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_GT:
- void drctg0d_d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_LE:
- void drctg0d_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // COND_AL:
- void drctg0d_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); // SWI (this is sort of a "hole" in the opcode encoding)
- void drctg0e_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0e_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0f_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void drctg0f_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); /* BL */
+ void drctg00_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Shift left */
+ void drctg00_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Shift right */
+ void drctg01_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg01_10(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg01_11(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* SUB Rd, Rs, Rn */
+ void drctg01_12(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ADD Rd, Rs, #imm */
+ void drctg01_13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* SUB Rd, Rs, #imm */
+ void drctg02_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg02_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg03_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ADD Rd, #Offset8 */
+ void drctg03_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* SUB Rd, #Offset8 */
+ void drctg04_00_00(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* AND Rd, Rs */
+ void drctg04_00_01(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* EOR Rd, Rs */
+ void drctg04_00_02(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* LSL Rd, Rs */
+ void drctg04_00_03(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* LSR Rd, Rs */
+ void drctg04_00_04(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ASR Rd, Rs */
+ void drctg04_00_05(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ADC Rd, Rs */
+ void drctg04_00_06(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* SBC Rd, Rs */
+ void drctg04_00_07(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ROR Rd, Rs */
+ void drctg04_00_08(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* TST Rd, Rs */
+ void drctg04_00_09(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* NEG Rd, Rs */
+ void drctg04_00_0a(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* CMP Rd, Rs */
+ void drctg04_00_0b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* CMN Rd, Rs - check flags, add dasm */
+ void drctg04_00_0c(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ORR Rd, Rs */
+ void drctg04_00_0d(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* MUL Rd, Rs */
+ void drctg04_00_0e(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* BIC Rd, Rs */
+ void drctg04_00_0f(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* MVN Rd, Rs */
+ void drctg04_01_00(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg04_01_01(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ADD Rd, HRs */
+ void drctg04_01_02(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ADD HRd, Rs */
+ void drctg04_01_03(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Add HRd, HRs */
+ void drctg04_01_10(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* CMP Rd, Rs */
+ void drctg04_01_11(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* CMP Rd, Hs */
+ void drctg04_01_12(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* CMP Hd, Rs */
+ void drctg04_01_13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* CMP Hd, Hs */
+ void drctg04_01_20(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* MOV Rd, Rs (undefined) */
+ void drctg04_01_21(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* MOV Rd, Hs */
+ void drctg04_01_22(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* MOV Hd, Rs */
+ void drctg04_01_23(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* MOV Hd, Hs */
+ void drctg04_01_30(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg04_01_31(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg04_01_32(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg04_01_33(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg04_0203(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg05_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* STR Rd, [Rn, Rm] */
+ void drctg05_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* STRH Rd, [Rn, Rm] */
+ void drctg05_2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* STRB Rd, [Rn, Rm] */
+ void drctg05_3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* LDSB Rd, [Rn, Rm] todo, add dasm */
+ void drctg05_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* LDR Rd, [Rn, Rm] */
+ void drctg05_5(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* LDRH Rd, [Rn, Rm] */
+ void drctg05_6(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* LDRB Rd, [Rn, Rm] */
+ void drctg05_7(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* LDSH Rd, [Rn, Rm] */
+ void drctg06_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Store */
+ void drctg06_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Load */
+ void drctg07_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Store */
+ void drctg07_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Load */
+ void drctg08_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Store */
+ void drctg08_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Load */
+ void drctg09_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Store */
+ void drctg09_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Load */
+ void drctg0a_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ADD Rd, PC, #nn */
+ void drctg0a_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ADD Rd, SP, #nn */
+ void drctg0b_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* ADD SP, #imm */
+ void drctg0b_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* PUSH {Rlist} */
+ void drctg0b_5(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* PUSH {Rlist}{LR} */
+ void drctg0b_6(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_7(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_8(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_9(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_a(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_c(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* POP {Rlist} */
+ void drctg0b_d(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* POP {Rlist}{PC} */
+ void drctg0b_e(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0b_f(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0c_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Store */
+ void drctg0c_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* Load */
+ void drctg0d_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_EQ:
+ void drctg0d_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_NE:
+ void drctg0d_2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_CS:
+ void drctg0d_3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_CC:
+ void drctg0d_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_MI:
+ void drctg0d_5(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_PL:
+ void drctg0d_6(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_VS:
+ void drctg0d_7(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_VC:
+ void drctg0d_8(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_HI:
+ void drctg0d_9(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_LS:
+ void drctg0d_a(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_GE:
+ void drctg0d_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_LT:
+ void drctg0d_c(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_GT:
+ void drctg0d_d(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_LE:
+ void drctg0d_e(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // COND_AL:
+ void drctg0d_f(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); // SWI (this is sort of a "hole" in the opcode encoding)
+ void drctg0e_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0e_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0f_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void drctg0f_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); /* BL */
void update_reg_ptr();
const int* m_reg_group;
- void load_fast_iregs(drcuml_block *block);
- void save_fast_iregs(drcuml_block *block);
+ void load_fast_iregs(drcuml_block &block);
+ void save_fast_iregs(drcuml_block &block);
void arm7_drc_init();
void arm7_drc_exit();
void execute_run_drc();
@@ -550,24 +552,24 @@ protected:
void static_generate_out_of_cycles();
void static_generate_detect_fault(uml::code_handle **handleptr);
void static_generate_tlb_translate(uml::code_handle **handleptr);
- void static_generate_memory_accessor(int size, bool istlb, bool iswrite, const char *name, uml::code_handle **handleptr);
- void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param);
- void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg);
+ void static_generate_memory_accessor(int size, bool istlb, bool iswrite, const char *name, uml::code_handle *&handleptr);
+ void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param);
+ void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg);
- typedef bool ( arm7_cpu_device::*drcarm7ops_ophandler)(drcuml_block*, compiler_state*, const opcode_desc*, uint32_t);
+ typedef bool ( arm7_cpu_device::*drcarm7ops_ophandler)(drcuml_block &, compiler_state &, const opcode_desc *, uint32_t);
static const drcarm7ops_ophandler drcops_handler[0x10];
- void saturate_qbit_overflow(drcuml_block *block);
- bool drcarm7ops_0123(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
- bool drcarm7ops_4567(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
- bool drcarm7ops_89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
- bool drcarm7ops_ab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
- bool drcarm7ops_cd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
- bool drcarm7ops_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
- bool drcarm7ops_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
+ void saturate_qbit_overflow(drcuml_block &block);
+ bool drcarm7ops_0123(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_4567(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_89(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_ab(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_cd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_e(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_f(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op);
+ bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
};
diff --git a/src/devices/cpu/arm7/arm7drc.hxx b/src/devices/cpu/arm7/arm7drc.hxx
index 7df82e359ab..aa1e396b0bd 100644
--- a/src/devices/cpu/arm7/arm7drc.hxx
+++ b/src/devices/cpu/arm7/arm7drc.hxx
@@ -79,10 +79,10 @@ static inline uint32_t epc(const opcode_desc *desc)
already allocated
-------------------------------------------------*/
-static inline void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name)
+static inline void alloc_handle(drcuml_state &drcuml, uml::code_handle *&handleptr, const char *name)
{
- if (*handleptr == nullptr)
- *handleptr = drcuml->handle_alloc(name);
+ if (!handleptr)
+ handleptr = drcuml.handle_alloc(name);
}
@@ -91,7 +91,7 @@ static inline void alloc_handle(drcuml_state *drcuml, uml::code_handle **handlep
registers
-------------------------------------------------*/
-void arm7_cpu_device::load_fast_iregs(drcuml_block *block)
+void arm7_cpu_device::load_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -106,7 +106,7 @@ void arm7_cpu_device::load_fast_iregs(drcuml_block *block)
registers
-------------------------------------------------*/
-void arm7_cpu_device::save_fast_iregs(drcuml_block *block)
+void arm7_cpu_device::save_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -307,12 +307,12 @@ void arm7_cpu_device::code_flush_cache()
//static_generate_tlb_mismatch();
/* add subroutines for memory accesses */
- static_generate_memory_accessor(1, false, false, "read8", &m_impstate.read8);
- static_generate_memory_accessor(1, true, false, "write8", &m_impstate.write8);
- static_generate_memory_accessor(2, false, false, "read16", &m_impstate.read16);
- static_generate_memory_accessor(2, true, false, "write16", &m_impstate.write16);
- static_generate_memory_accessor(4, false, false, "read32", &m_impstate.read32);
- static_generate_memory_accessor(4, true, false, "write32", &m_impstate.write32);
+ static_generate_memory_accessor(1, false, false, "read8", m_impstate.read8);
+ static_generate_memory_accessor(1, true, false, "write8", m_impstate.write8);
+ static_generate_memory_accessor(2, false, false, "read16", m_impstate.read16);
+ static_generate_memory_accessor(2, true, false, "write16", m_impstate.write16);
+ static_generate_memory_accessor(4, false, false, "read32", m_impstate.read32);
+ static_generate_memory_accessor(4, true, false, "write32", m_impstate.write32);
}
catch (drcuml_block::abort_compilation &)
{
@@ -348,7 +348,7 @@ void arm7_cpu_device::code_compile_block(uint8_t mode, offs_t pc)
try
{
/* start the block */
- drcuml_block *block = drcuml->begin_block(4096);
+ drcuml_block &block(drcuml->begin_block(4096));
/* loop until we get through all instruction sequences */
for (const opcode_desc *seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
@@ -358,7 +358,7 @@ void arm7_cpu_device::code_compile_block(uint8_t mode, offs_t pc)
/* add a code log entry */
if (drcuml->logging())
- block->append_comment("-------------------------"); // comment
+ block.append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next())
@@ -389,7 +389,7 @@ void arm7_cpu_device::code_compile_block(uint8_t mode, offs_t pc)
/* validate this code block if we're not pointing into ROM */
if (m_program->get_write_ptr(seqhead->physpc) != nullptr)
- generate_checksum_block(block, &compiler, seqhead, seqlast);
+ generate_checksum_block(block, compiler, seqhead, seqlast);
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
@@ -397,7 +397,7 @@ void arm7_cpu_device::code_compile_block(uint8_t mode, offs_t pc)
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
- generate_sequence_instruction(block, &compiler, curdesc);
+ generate_sequence_instruction(block, compiler, curdesc);
/* if we need to return to the start, do it */
if (seqlast->flags & OPFLAG_RETURN_TO_START)
@@ -408,7 +408,7 @@ void arm7_cpu_device::code_compile_block(uint8_t mode, offs_t pc)
nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4;
/* count off cycles and go there */
- generate_update_cycles(block, &compiler, nextpc); // <subtract cycles>
+ generate_update_cycles(block, compiler, nextpc); // <subtract cycles>
/* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
/*if (seqlast->flags & OPFLAG_CAN_CHANGE_MODES)
@@ -420,7 +420,7 @@ void arm7_cpu_device::code_compile_block(uint8_t mode, offs_t pc)
}
/* end the sequence */
- block->end();
+ block.end();
g_profiler.stop();
succeeded = true;
}
@@ -480,17 +480,16 @@ void arm7_cpu_device::static_generate_entry_point()
uml::code_label swi32;
uml::code_label irqadjust;
uml::code_label done;
- drcuml_block *block;
- block = drcuml->begin_block(110);
+ drcuml_block &block(drcuml->begin_block(110));
/* forward references */
- //alloc_handle(drcuml, &m_impstate.exception_norecover[EXCEPTION_INTERRUPT], "interrupt_norecover");
- alloc_handle(drcuml, &m_impstate.nocode, "nocode");
- alloc_handle(drcuml, &m_impstate.detect_fault, "detect_fault");
- alloc_handle(drcuml, &m_impstate.tlb_translate, "tlb_translate");
+ //alloc_handle(*drcuml, &m_impstate.exception_norecover[EXCEPTION_INTERRUPT], "interrupt_norecover");
+ alloc_handle(*drcuml, m_impstate.nocode, "nocode");
+ alloc_handle(*drcuml, m_impstate.detect_fault, "detect_fault");
+ alloc_handle(*drcuml, m_impstate.tlb_translate, "tlb_translate");
- alloc_handle(drcuml, &m_impstate.entry, "entry");
+ alloc_handle(*drcuml, m_impstate.entry, "entry");
UML_HANDLE(block, *m_impstate.entry); // handle entry
/* load fast integer registers */
@@ -500,7 +499,7 @@ void arm7_cpu_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, 0, uml::mem(&m_pc), *m_impstate.nocode); // hashjmp 0,<pc>,nocode
- block->end();
+ block.end();
}
@@ -512,7 +511,6 @@ void arm7_cpu_device::static_generate_entry_point()
void arm7_cpu_device::static_generate_check_irq()
{
drcuml_state *drcuml = m_impstate.drcuml;
- drcuml_block *block;
uml::code_label noirq;
int nodabt = 0;
int nopabt = 0;
@@ -524,10 +522,10 @@ void arm7_cpu_device::static_generate_check_irq()
int label = 1;
/* begin generating */
- block = drcuml->begin_block(120);
+ drcuml_block &block(drcuml->begin_block(120));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_impstate.check_irq, "check_irq");
+ alloc_handle(*drcuml, m_impstate.check_irq, "check_irq");
UML_HANDLE(block, *m_impstate.check_irq); // handle check_irq
/* Exception priorities:
@@ -670,7 +668,7 @@ void arm7_cpu_device::static_generate_check_irq()
UML_LABEL(block, done); // done:
- block->end();
+ block.end();
}
/*-------------------------------------------------
@@ -681,20 +679,19 @@ void arm7_cpu_device::static_generate_check_irq()
void arm7_cpu_device::static_generate_nocode_handler()
{
drcuml_state *drcuml = m_impstate.drcuml;
- drcuml_block *block;
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_impstate.nocode, "nocode");
+ alloc_handle(*drcuml, m_impstate.nocode, "nocode");
UML_HANDLE(block, *m_impstate.nocode); // handle nocode
UML_GETEXP(block, uml::I0); // getexp i0
UML_MOV(block, uml::mem(&R15), uml::I0); // mov [pc],i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block.end();
}
@@ -706,25 +703,24 @@ void arm7_cpu_device::static_generate_nocode_handler()
void arm7_cpu_device::static_generate_out_of_cycles()
{
drcuml_state *drcuml = m_impstate.drcuml;
- drcuml_block *block;
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_impstate.out_of_cycles, "out_of_cycles");
+ alloc_handle(*drcuml, m_impstate.out_of_cycles, "out_of_cycles");
UML_HANDLE(block, *m_impstate.out_of_cycles); // handle out_of_cycles
UML_GETEXP(block, uml::I0); // getexp i0
UML_MOV(block, uml::mem(&R15), uml::I0); // mov <pc>,i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
- block->end();
+ block.end();
}
/*------------------------------------------------------------------
- static_generate_tlb_translate
+ static_generate_detect_fault
------------------------------------------------------------------*/
void arm7_cpu_device::static_generate_detect_fault(uml::code_handle **handleptr)
@@ -732,16 +728,15 @@ void arm7_cpu_device::static_generate_detect_fault(uml::code_handle **handleptr)
/* on entry, flags are in I2, vaddr is in I3, desc_lvl1 is in I4, ap is in R5 */
/* on exit, fault result is in I6 */
drcuml_state *drcuml = m_impstate.drcuml;
- drcuml_block *block;
int donefault = 0;
int checkuser = 0;
int label = 1;
/* begin generating */
- block = drcuml->begin_block(1024);
+ drcuml_block &block(drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, &m_impstate.detect_fault, "detect_fault");
+ alloc_handle(*drcuml, m_impstate.detect_fault, "detect_fault");
UML_HANDLE(block, *m_impstate.detect_fault); // handle detect_fault
UML_ROLAND(block, uml::I6, uml::I4, 32-4, 0x0f<<1); // roland i6, i4, 32-4, 0xf<<1
@@ -811,7 +806,6 @@ void arm7_cpu_device::static_generate_tlb_translate(uml::code_handle **handleptr
/* on exit, translated address is in I0 and success/failure is in I2 */
/* routine trashes I4-I7 */
drcuml_state *drcuml = m_impstate.drcuml;
- drcuml_block *block;
uml::code_label smallfault;
uml::code_label smallprefetch;
int nopid = 0;
@@ -830,9 +824,9 @@ void arm7_cpu_device::static_generate_tlb_translate(uml::code_handle **handleptr
int label = 1;
/* begin generating */
- block = drcuml->begin_block(170);
+ drcuml_block &block(drcuml->begin_block(170));
- alloc_handle(drcuml, &m_impstate.tlb_translate, "tlb_translate");
+ alloc_handle(*drcuml, m_impstate.tlb_translate, "tlb_translate");
UML_HANDLE(block, *m_impstate.tlb_translate); // handle tlb_translate
// I3: vaddr
@@ -1007,29 +1001,28 @@ void arm7_cpu_device::static_generate_tlb_translate(uml::code_handle **handleptr
UML_MOV(block, uml::I0, uml::I3); // mov i0, i3
UML_RET(block); // ret
- block->end();
+ block.end();
}
/*------------------------------------------------------------------
static_generate_memory_accessor
------------------------------------------------------------------*/
-void arm7_cpu_device::static_generate_memory_accessor(int size, bool istlb, bool iswrite, const char *name, uml::code_handle **handleptr)
+void arm7_cpu_device::static_generate_memory_accessor(int size, bool istlb, bool iswrite, const char *name, uml::code_handle *&handleptr)
{
/* on entry, address is in I0; data for writes is in I1, fetch type in I2 */
/* on exit, read result is in I0 */
/* routine trashes I0-I3 */
drcuml_state *drcuml = m_impstate.drcuml;
- drcuml_block *block;
//int tlbmiss = 0;
int label = 1;
/* begin generating */
- block = drcuml->begin_block(1024);
+ drcuml_block &block(drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, handleptr, name);
- UML_HANDLE(block, **handleptr); // handle *handleptr
+ alloc_handle(*drcuml, handleptr, name);
+ UML_HANDLE(block, *handleptr); // handle *handleptr
if (istlb)
{
@@ -1149,7 +1142,7 @@ void arm7_cpu_device::static_generate_memory_accessor(int size, bool istlb, bool
}
UML_RET(block); // ret
- block->end();
+ block.end();
}
/***************************************************************************
@@ -1162,25 +1155,25 @@ void arm7_cpu_device::static_generate_memory_accessor(int size, bool istlb, bool
an exception if out
-------------------------------------------------*/
-void arm7_cpu_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param)
+void arm7_cpu_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param)
{
/* check full interrupts if pending */
- if (compiler->checkints)
+ if (compiler.checkints)
{
uml::code_label skip;
- compiler->checkints = false;
+ compiler.checkints = false;
UML_CALLH(block, *m_impstate.check_irq);
}
/* account for cycles */
- if (compiler->cycles > 0)
+ if (compiler.cycles > 0)
{
UML_SUB(block, uml::mem(&m_icount), uml::mem(&m_icount), MAPVAR_CYCLES); // sub icount,icount,cycles
UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
UML_EXHc(block, uml::COND_S, *m_impstate.out_of_cycles, param); // exh out_of_cycles,nextpc
}
- compiler->cycles = 0;
+ compiler.cycles = 0;
}
@@ -1189,12 +1182,12 @@ void arm7_cpu_device::generate_update_cycles(drcuml_block *block, compiler_state
validate a sequence of opcodes
-------------------------------------------------*/
-void arm7_cpu_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
+void arm7_cpu_device::generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
{
const opcode_desc *curdesc;
if (m_impstate.drcuml->logging())
{
- block->append_comment("[Validation for %08X]", seqhead->pc); // comment
+ block.append_comment("[Validation for %08X]", seqhead->pc); // comment
}
/* loose verify or single instruction: just compare and fail */
@@ -1254,7 +1247,7 @@ void arm7_cpu_device::generate_checksum_block(drcuml_block *block, compiler_stat
for a single instruction in a sequence
-------------------------------------------------*/
-void arm7_cpu_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
//offs_t expc;
int hotnum;
@@ -1269,23 +1262,23 @@ void arm7_cpu_device::generate_sequence_instruction(drcuml_block *block, compile
UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,pc
/* accumulate total cycles */
- compiler->cycles += desc->cycles;
+ compiler.cycles += desc->cycles;
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* is this a hotspot? */
for (hotnum = 0; hotnum < ARM7_MAX_HOTSPOTS; hotnum++)
{
if (m_impstate.hotspot[hotnum].pc != 0 && desc->pc == m_impstate.hotspot[hotnum].pc && desc->opptr.l[0] == m_impstate.hotspot[hotnum].opcode)
{
- compiler->cycles += m_impstate.hotspot[hotnum].cycles;
+ compiler.cycles += m_impstate.hotspot[hotnum].cycles;
break;
}
}
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we are debugging, call the debugger */
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
@@ -1321,30 +1314,30 @@ void arm7_cpu_device::generate_sequence_instruction(drcuml_block *block, compile
generate_delay_slot_and_branch
------------------------------------------------------------------*/
-void arm7_cpu_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg)
+void arm7_cpu_device::generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg)
{
- compiler_state compiler_temp = *compiler;
+ compiler_state compiler_temp(compiler);
/* update the cycles and jump through the hash table to the target */
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(block, &compiler_temp, desc->targetpc); // <subtract cycles>
+ generate_update_cycles(block, compiler_temp, desc->targetpc); // <subtract cycles>
UML_HASHJMP(block, 0, desc->targetpc, *m_impstate.nocode);
// hashjmp 0,desc->targetpc,nocode
}
else
{
- generate_update_cycles(block, &compiler_temp, uml::mem(&m_impstate.jmpdest));
+ generate_update_cycles(block, compiler_temp, uml::mem(&m_impstate.jmpdest));
// <subtract cycles>
UML_HASHJMP(block, 0, uml::mem(&m_impstate.jmpdest), *m_impstate.nocode);// hashjmp 0,<rsreg>,nocode
}
/* update the label */
- compiler->labelnum = compiler_temp.labelnum;
+ compiler.labelnum = compiler_temp.labelnum;
/* reset the mapvar to the current cycles and account for skipped slots */
- compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ compiler.cycles += desc->skipslots;
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
}
@@ -1356,7 +1349,7 @@ const arm7_cpu_device::drcarm7ops_ophandler arm7_cpu_device::drcops_handler[0x10
&arm7_cpu_device::drcarm7ops_cd, &arm7_cpu_device::drcarm7ops_cd, &arm7_cpu_device::drcarm7ops_e, &arm7_cpu_device::drcarm7ops_f,
};
-void arm7_cpu_device::saturate_qbit_overflow(drcuml_block *block)
+void arm7_cpu_device::saturate_qbit_overflow(drcuml_block &block)
{
UML_MOV(block, uml::I1, 0);
UML_DCMP(block, uml::I0, 0x000000007fffffffL);
@@ -1368,7 +1361,7 @@ void arm7_cpu_device::saturate_qbit_overflow(drcuml_block *block)
UML_OR(block, DRC_CPSR, DRC_CPSR, uml::I1);
}
-bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t insn)
+bool arm7_cpu_device::drcarm7ops_0123(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t insn)
{
uml::code_label done;
/* Branch and Exchange (BX) */
@@ -1376,7 +1369,7 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
{
UML_MOV(block, DRC_PC, DRC_REG(insn & 0x0f));
UML_TEST(block, DRC_PC, 1);
- UML_JMPc(block, uml::COND_Z, done = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, done = compiler.labelnum++);
UML_OR(block, DRC_CPSR, DRC_CPSR, T_MASK);
UML_AND(block, DRC_PC, DRC_PC, ~1);
}
@@ -1650,32 +1643,32 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
return true;
}
-bool arm7_cpu_device::drcarm7ops_4567(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
+bool arm7_cpu_device::drcarm7ops_4567(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
+bool arm7_cpu_device::drcarm7ops_89(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_ab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
+bool arm7_cpu_device::drcarm7ops_ab(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_cd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
+bool arm7_cpu_device::drcarm7ops_cd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
+bool arm7_cpu_device::drcarm7ops_e(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
+bool arm7_cpu_device::drcarm7ops_f(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
@@ -1685,7 +1678,7 @@ bool arm7_cpu_device::drcarm7ops_f(drcuml_block *block, compiler_state *compiler
opcode
-------------------------------------------------*/
-bool arm7_cpu_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool arm7_cpu_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
//int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
uint32_t op = desc->opptr.l[0];
@@ -1718,45 +1711,45 @@ bool arm7_cpu_device::generate_opcode(drcuml_block *block, compiler_state *compi
{
case COND_EQ:
UML_TEST(block, DRC_CPSR, Z_MASK);
- UML_JMPc(block, uml::COND_Z, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, unexecuted = compiler.labelnum++);
break;
case COND_NE:
UML_TEST(block, DRC_CPSR, Z_MASK);
- UML_JMPc(block, uml::COND_NZ, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_NZ, unexecuted = compiler.labelnum++);
break;
case COND_CS:
UML_TEST(block, DRC_CPSR, C_MASK);
- UML_JMPc(block, uml::COND_Z, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, unexecuted = compiler.labelnum++);
break;
case COND_CC:
UML_TEST(block, DRC_CPSR, C_MASK);
- UML_JMPc(block, uml::COND_NZ, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_NZ, unexecuted = compiler.labelnum++);
break;
case COND_MI:
UML_TEST(block, DRC_CPSR, N_MASK);
- UML_JMPc(block, uml::COND_Z, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, unexecuted = compiler.labelnum++);
break;
case COND_PL:
UML_TEST(block, DRC_CPSR, N_MASK);
- UML_JMPc(block, uml::COND_NZ, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_NZ, unexecuted = compiler.labelnum++);
break;
case COND_VS:
UML_TEST(block, DRC_CPSR, V_MASK);
- UML_JMPc(block, uml::COND_Z, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, unexecuted = compiler.labelnum++);
break;
case COND_VC:
UML_TEST(block, DRC_CPSR, V_MASK);
- UML_JMPc(block, uml::COND_NZ, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_NZ, unexecuted = compiler.labelnum++);
break;
case COND_HI:
UML_TEST(block, DRC_CPSR, Z_MASK);
- UML_JMPc(block, uml::COND_NZ, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_NZ, unexecuted = compiler.labelnum++);
UML_TEST(block, DRC_CPSR, C_MASK);
- UML_JMPc(block, uml::COND_Z, unexecuted = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, unexecuted = compiler.labelnum++);
break;
case COND_LS:
UML_TEST(block, DRC_CPSR, Z_MASK);
- UML_JMPc(block, uml::COND_NZ, contdecode = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_NZ, contdecode = compiler.labelnum++);
UML_TEST(block, DRC_CPSR, C_MASK);
UML_JMPc(block, uml::COND_Z, contdecode);
UML_JMP(block, unexecuted);
diff --git a/src/devices/cpu/arm7/arm7tdrc.hxx b/src/devices/cpu/arm7/arm7tdrc.hxx
index fac7a70f7fa..5162674bfb9 100644
--- a/src/devices/cpu/arm7/arm7tdrc.hxx
+++ b/src/devices/cpu/arm7/arm7tdrc.hxx
@@ -155,7 +155,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
/* Shift operations */
-void arm7_cpu_device::drctg00_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Shift left */
+void arm7_cpu_device::drctg00_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Shift left */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -182,7 +182,7 @@ void arm7_cpu_device::drctg00_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg00_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Shift right */
+void arm7_cpu_device::drctg00_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Shift right */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -216,7 +216,7 @@ void arm7_cpu_device::drctg00_1(drcuml_block *block, compiler_state *compiler, c
/* Arithmetic */
-void arm7_cpu_device::drctg01_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg01_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -260,7 +260,7 @@ void arm7_cpu_device::drctg01_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg01_10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg01_10(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
@@ -270,7 +270,7 @@ void arm7_cpu_device::drctg01_10(drcuml_block *block, compiler_state *compiler,
DRCHandleThumbALUAddFlags(DRC_REG(rd), DRC_REG(rs), DRC_REG(rn));
}
-void arm7_cpu_device::drctg01_11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* SUB Rd, Rs, Rn */
+void arm7_cpu_device::drctg01_11(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* SUB Rd, Rs, Rn */
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
@@ -280,7 +280,7 @@ void arm7_cpu_device::drctg01_11(drcuml_block *block, compiler_state *compiler,
DRCHandleThumbALUSubFlags(DRC_REG(rd), DRC_REG(rs), DRC_REG(rn));
}
-void arm7_cpu_device::drctg01_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, Rs, #imm */
+void arm7_cpu_device::drctg01_12(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ADD Rd, Rs, #imm */
{
uint32_t op = desc->opptr.l[0];
uint32_t imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
@@ -290,7 +290,7 @@ void arm7_cpu_device::drctg01_12(drcuml_block *block, compiler_state *compiler,
DRCHandleThumbALUAddFlags(DRC_REG(rd), DRC_REG(rs), imm);
}
-void arm7_cpu_device::drctg01_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* SUB Rd, Rs, #imm */
+void arm7_cpu_device::drctg01_13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* SUB Rd, Rs, #imm */
{
uint32_t op = desc->opptr.l[0];
uint32_t imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
@@ -302,7 +302,7 @@ void arm7_cpu_device::drctg01_13(drcuml_block *block, compiler_state *compiler,
/* CMP / MOV */
-void arm7_cpu_device::drctg02_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg02_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
@@ -314,7 +314,7 @@ void arm7_cpu_device::drctg02_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg02_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg02_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
@@ -326,7 +326,7 @@ void arm7_cpu_device::drctg02_1(drcuml_block *block, compiler_state *compiler, c
/* ADD/SUB immediate */
-void arm7_cpu_device::drctg03_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, #Offset8 */
+void arm7_cpu_device::drctg03_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ADD Rd, #Offset8 */
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
@@ -336,7 +336,7 @@ void arm7_cpu_device::drctg03_0(drcuml_block *block, compiler_state *compiler, c
DRCHandleThumbALUAddFlags(DRC_REG(rd), DRC_REG(rn), op2);
}
-void arm7_cpu_device::drctg03_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* SUB Rd, #Offset8 */
+void arm7_cpu_device::drctg03_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* SUB Rd, #Offset8 */
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
@@ -348,7 +348,7 @@ void arm7_cpu_device::drctg03_1(drcuml_block *block, compiler_state *compiler, c
/* Rd & Rm instructions */
-void arm7_cpu_device::drctg04_00_00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* AND Rd, Rs */
+void arm7_cpu_device::drctg04_00_00(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* AND Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -360,7 +360,7 @@ void arm7_cpu_device::drctg04_00_00(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* EOR Rd, Rs */
+void arm7_cpu_device::drctg04_00_01(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* EOR Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -372,7 +372,7 @@ void arm7_cpu_device::drctg04_00_01(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LSL Rd, Rs */
+void arm7_cpu_device::drctg04_00_02(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* LSL Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -385,11 +385,11 @@ void arm7_cpu_device::drctg04_00_02(drcuml_block *block, compiler_state *compile
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK | C_MASK));
UML_CMP(block, uml::I1, 0);
- UML_JMPc(block, uml::COND_E, skip = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_E, skip = compiler.labelnum++);
UML_CMP(block, uml::I1, 32);
- UML_JMPc(block, uml::COND_A, offsg32 = compiler->labelnum++);
- UML_JMPc(block, uml::COND_E, offs32 = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_A, offsg32 = compiler.labelnum++);
+ UML_JMPc(block, uml::COND_E, offs32 = compiler.labelnum++);
UML_SHL(block, DRC_REG(rd), DRC_REG(rd), uml::I1);
UML_SUB(block, uml::I1, uml::I1, 1);
@@ -419,7 +419,7 @@ void arm7_cpu_device::drctg04_00_02(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LSR Rd, Rs */
+void arm7_cpu_device::drctg04_00_03(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* LSR Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -431,11 +431,11 @@ void arm7_cpu_device::drctg04_00_03(drcuml_block *block, compiler_state *compile
UML_AND(block, uml::I1, DRC_REG(rs), 0xff);
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK | C_MASK));
UML_CMP(block, uml::I1, 0);
- UML_JMPc(block, uml::COND_E, skip = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_E, skip = compiler.labelnum++);
UML_CMP(block, uml::I1, 32);
- UML_JMPc(block, uml::COND_A, offsg32 = compiler->labelnum++);
- UML_JMPc(block, uml::COND_E, offs32 = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_A, offsg32 = compiler.labelnum++);
+ UML_JMPc(block, uml::COND_E, offs32 = compiler.labelnum++);
UML_SHR(block, DRC_REG(rd), DRC_REG(rd), uml::I1);
UML_SUB(block, uml::I1, uml::I1, 1); // WP: TODO, Check this used to be "block, I1, 1"
@@ -464,7 +464,7 @@ void arm7_cpu_device::drctg04_00_03(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ASR Rd, Rs */
+void arm7_cpu_device::drctg04_00_04(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ASR Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -477,7 +477,7 @@ void arm7_cpu_device::drctg04_00_04(drcuml_block *block, compiler_state *compile
UML_AND(block, uml::I1, DRC_REG(rs), 0xff);
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK | C_MASK));
UML_CMP(block, uml::I1, 0);
- UML_JMPc(block, uml::COND_E, skip = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_E, skip = compiler.labelnum++);
UML_SHR(block, uml::I2, uml::I0, uml::I1);
UML_SUB(block, uml::I1, 32, uml::I1);
@@ -486,7 +486,7 @@ void arm7_cpu_device::drctg04_00_04(drcuml_block *block, compiler_state *compile
UML_MOVc(block, uml::COND_NZ, DRC_REG(rd), uml::I1);
UML_MOVc(block, uml::COND_Z, DRC_REG(rd), 0);
UML_OR(block, DRC_REG(rd), DRC_REG(rd), uml::I2);
- UML_JMPc(block, uml::COND_B, offs32 = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_B, offs32 = compiler.labelnum++);
UML_TEST(block, uml::I0, 0x80000000);
UML_MOVc(block, uml::COND_NZ, DRC_REG(rd), ~0);
@@ -512,7 +512,7 @@ void arm7_cpu_device::drctg04_00_04(drcuml_block *block, compiler_state *compile
}
-void arm7_cpu_device::drctg04_00_05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADC Rd, Rs */
+void arm7_cpu_device::drctg04_00_05(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ADC Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -526,7 +526,7 @@ void arm7_cpu_device::drctg04_00_05(drcuml_block *block, compiler_state *compile
UML_MOV(block, DRC_REG(rd), uml::I3);
}
-void arm7_cpu_device::drctg04_00_06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* SBC Rd, Rs */
+void arm7_cpu_device::drctg04_00_06(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* SBC Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -540,7 +540,7 @@ void arm7_cpu_device::drctg04_00_06(drcuml_block *block, compiler_state *compile
UML_MOV(block, DRC_REG(rd), uml::I3);
}
-void arm7_cpu_device::drctg04_00_07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ROR Rd, Rs */
+void arm7_cpu_device::drctg04_00_07(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ROR Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -562,7 +562,7 @@ void arm7_cpu_device::drctg04_00_07(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* TST Rd, Rs */
+void arm7_cpu_device::drctg04_00_08(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* TST Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -574,7 +574,7 @@ void arm7_cpu_device::drctg04_00_08(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* NEG Rd, Rs */
+void arm7_cpu_device::drctg04_00_09(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* NEG Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -584,7 +584,7 @@ void arm7_cpu_device::drctg04_00_09(drcuml_block *block, compiler_state *compile
DRCHandleThumbALUSubFlags(DRC_REG(rd), 0, uml::I3);
}
-void arm7_cpu_device::drctg04_00_0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Rd, Rs */
+void arm7_cpu_device::drctg04_00_0a(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* CMP Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -593,7 +593,7 @@ void arm7_cpu_device::drctg04_00_0a(drcuml_block *block, compiler_state *compile
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd), DRC_REG(rs));
}
-void arm7_cpu_device::drctg04_00_0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMN Rd, Rs - check flags, add dasm */
+void arm7_cpu_device::drctg04_00_0b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* CMN Rd, Rs - check flags, add dasm */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -602,7 +602,7 @@ void arm7_cpu_device::drctg04_00_0b(drcuml_block *block, compiler_state *compile
DRCHandleThumbALUAddFlags(uml::I3, DRC_REG(rd), DRC_REG(rs));
}
-void arm7_cpu_device::drctg04_00_0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ORR Rd, Rs */
+void arm7_cpu_device::drctg04_00_0c(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ORR Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -614,7 +614,7 @@ void arm7_cpu_device::drctg04_00_0c(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MUL Rd, Rs */
+void arm7_cpu_device::drctg04_00_0d(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* MUL Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -626,7 +626,7 @@ void arm7_cpu_device::drctg04_00_0d(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* BIC Rd, Rs */
+void arm7_cpu_device::drctg04_00_0e(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* BIC Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -639,7 +639,7 @@ void arm7_cpu_device::drctg04_00_0e(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_00_0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MVN Rd, Rs */
+void arm7_cpu_device::drctg04_00_0f(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* MVN Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -654,14 +654,14 @@ void arm7_cpu_device::drctg04_00_0f(drcuml_block *block, compiler_state *compile
/* ADD Rd, Rs group */
-void arm7_cpu_device::drctg04_01_00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg04_01_00(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: G4-1-0 Undefined Thumb instruction: %04x %x\n", pc, op, (op & THUMB_HIREG_H) >> THUMB_HIREG_H_SHIFT);
}
-void arm7_cpu_device::drctg04_01_01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, HRs */
+void arm7_cpu_device::drctg04_01_01(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ADD Rd, HRs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -674,7 +674,7 @@ void arm7_cpu_device::drctg04_01_01(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_01_02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD HRd, Rs */
+void arm7_cpu_device::drctg04_01_02(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ADD HRd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -687,7 +687,7 @@ void arm7_cpu_device::drctg04_01_02(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_01_03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Add HRd, HRs */
+void arm7_cpu_device::drctg04_01_03(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Add HRd, HRs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -705,7 +705,7 @@ void arm7_cpu_device::drctg04_01_03(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_01_10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Rd, Rs */
+void arm7_cpu_device::drctg04_01_10(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* CMP Rd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -714,7 +714,7 @@ void arm7_cpu_device::drctg04_01_10(drcuml_block *block, compiler_state *compile
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd), DRC_REG(rs));
}
-void arm7_cpu_device::drctg04_01_11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Rd, Hs */
+void arm7_cpu_device::drctg04_01_11(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* CMP Rd, Hs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -723,7 +723,7 @@ void arm7_cpu_device::drctg04_01_11(drcuml_block *block, compiler_state *compile
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd), DRC_REG(rs+8));
}
-void arm7_cpu_device::drctg04_01_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Hd, Rs */
+void arm7_cpu_device::drctg04_01_12(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* CMP Hd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -732,7 +732,7 @@ void arm7_cpu_device::drctg04_01_12(drcuml_block *block, compiler_state *compile
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd+8), DRC_REG(rs));
}
-void arm7_cpu_device::drctg04_01_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Hd, Hs */
+void arm7_cpu_device::drctg04_01_13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* CMP Hd, Hs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -743,7 +743,7 @@ void arm7_cpu_device::drctg04_01_13(drcuml_block *block, compiler_state *compile
/* MOV group */
-void arm7_cpu_device::drctg04_01_20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MOV Rd, Rs (undefined) */
+void arm7_cpu_device::drctg04_01_20(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* MOV Rd, Rs (undefined) */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -752,7 +752,7 @@ void arm7_cpu_device::drctg04_01_20(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_01_21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MOV Rd, Hs */
+void arm7_cpu_device::drctg04_01_21(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* MOV Rd, Hs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -765,7 +765,7 @@ void arm7_cpu_device::drctg04_01_21(drcuml_block *block, compiler_state *compile
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg04_01_22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MOV Hd, Rs */
+void arm7_cpu_device::drctg04_01_22(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* MOV Hd, Rs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -782,7 +782,7 @@ void arm7_cpu_device::drctg04_01_22(drcuml_block *block, compiler_state *compile
}
}
-void arm7_cpu_device::drctg04_01_23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MOV Hd, Hs */
+void arm7_cpu_device::drctg04_01_23(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* MOV Hd, Hs */
{
uint32_t op = desc->opptr.l[0];
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
@@ -803,7 +803,7 @@ void arm7_cpu_device::drctg04_01_23(drcuml_block *block, compiler_state *compile
}
-void arm7_cpu_device::drctg04_01_30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg04_01_30(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uml::code_label switch_state;
@@ -811,9 +811,9 @@ void arm7_cpu_device::drctg04_01_30(drcuml_block *block, compiler_state *compile
uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
UML_MOV(block, uml::I0, DRC_REG(rs));
UML_TEST(block, uml::I0, 1);
- UML_JMPc(block, uml::COND_Z, switch_state = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, switch_state = compiler.labelnum++);
UML_AND(block, uml::I0, uml::I0, ~1);
- UML_JMP(block, done = compiler->labelnum++);
+ UML_JMP(block, done = compiler.labelnum++);
UML_LABEL(block, switch_state);
UML_AND(block, DRC_CPSR, DRC_CPSR, ~T_MASK);
@@ -826,7 +826,7 @@ void arm7_cpu_device::drctg04_01_30(drcuml_block *block, compiler_state *compile
UML_MOV(block, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg04_01_31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg04_01_31(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uml::code_label switch_state;
@@ -838,9 +838,9 @@ void arm7_cpu_device::drctg04_01_31(drcuml_block *block, compiler_state *compile
UML_ADD(block, uml::I0, uml::I0, 2);
}
UML_TEST(block, uml::I0, 1);
- UML_JMPc(block, uml::COND_Z, switch_state = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, switch_state = compiler.labelnum++);
UML_AND(block, uml::I0, uml::I0, ~1);
- UML_JMP(block, done = compiler->labelnum++);
+ UML_JMP(block, done = compiler.labelnum++);
UML_LABEL(block, switch_state);
UML_AND(block, DRC_CPSR, DRC_CPSR, ~T_MASK);
@@ -853,21 +853,21 @@ void arm7_cpu_device::drctg04_01_31(drcuml_block *block, compiler_state *compile
UML_MOV(block, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg04_01_32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg04_01_32(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: G4-3 Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg04_01_33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg04_01_33(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: G4-3 Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg04_0203(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg04_0203(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
@@ -881,7 +881,7 @@ void arm7_cpu_device::drctg04_0203(drcuml_block *block, compiler_state *compiler
/* LDR* STR* group */
-void arm7_cpu_device::drctg05_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* STR Rd, [Rn, Rm] */
+void arm7_cpu_device::drctg05_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* STR Rd, [Rn, Rm] */
{
uint32_t op = desc->opptr.l[0];
uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
@@ -893,7 +893,7 @@ void arm7_cpu_device::drctg05_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg05_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* STRH Rd, [Rn, Rm] */
+void arm7_cpu_device::drctg05_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* STRH Rd, [Rn, Rm] */
{
uint32_t op = desc->opptr.l[0];
uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
@@ -905,7 +905,7 @@ void arm7_cpu_device::drctg05_1(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg05_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* STRB Rd, [Rn, Rm] */
+void arm7_cpu_device::drctg05_2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* STRB Rd, [Rn, Rm] */
{
uint32_t op = desc->opptr.l[0];
uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
@@ -917,7 +917,7 @@ void arm7_cpu_device::drctg05_2(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg05_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDSB Rd, [Rn, Rm] todo, add dasm */
+void arm7_cpu_device::drctg05_3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* LDSB Rd, [Rn, Rm] todo, add dasm */
{
uint32_t op = desc->opptr.l[0];
uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
@@ -929,7 +929,7 @@ void arm7_cpu_device::drctg05_3(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg05_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDR Rd, [Rn, Rm] */
+void arm7_cpu_device::drctg05_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* LDR Rd, [Rn, Rm] */
{
uint32_t op = desc->opptr.l[0];
uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
@@ -941,7 +941,7 @@ void arm7_cpu_device::drctg05_4(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg05_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDRH Rd, [Rn, Rm] */
+void arm7_cpu_device::drctg05_5(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* LDRH Rd, [Rn, Rm] */
{
uint32_t op = desc->opptr.l[0];
uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
@@ -953,7 +953,7 @@ void arm7_cpu_device::drctg05_5(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg05_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDRB Rd, [Rn, Rm] */
+void arm7_cpu_device::drctg05_6(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* LDRB Rd, [Rn, Rm] */
{
uint32_t op = desc->opptr.l[0];
uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
@@ -965,7 +965,7 @@ void arm7_cpu_device::drctg05_6(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg05_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDSH Rd, [Rn, Rm] */
+void arm7_cpu_device::drctg05_7(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* LDSH Rd, [Rn, Rm] */
{
uint32_t op = desc->opptr.l[0];
uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
@@ -979,7 +979,7 @@ void arm7_cpu_device::drctg05_7(drcuml_block *block, compiler_state *compiler, c
/* Word Store w/ Immediate Offset */
-void arm7_cpu_device::drctg06_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
+void arm7_cpu_device::drctg06_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Store */
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -991,7 +991,7 @@ void arm7_cpu_device::drctg06_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg06_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
+void arm7_cpu_device::drctg06_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Load */
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -1005,7 +1005,7 @@ void arm7_cpu_device::drctg06_1(drcuml_block *block, compiler_state *compiler, c
/* Byte Store w/ Immeidate Offset */
-void arm7_cpu_device::drctg07_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
+void arm7_cpu_device::drctg07_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Store */
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -1017,7 +1017,7 @@ void arm7_cpu_device::drctg07_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg07_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
+void arm7_cpu_device::drctg07_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Load */
{
uint32_t op = desc->opptr.l[0];
uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
@@ -1031,7 +1031,7 @@ void arm7_cpu_device::drctg07_1(drcuml_block *block, compiler_state *compiler, c
/* Load/Store Halfword */
-void arm7_cpu_device::drctg08_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
+void arm7_cpu_device::drctg08_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Store */
{
uint32_t op = desc->opptr.l[0];
uint32_t offs = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
@@ -1043,7 +1043,7 @@ void arm7_cpu_device::drctg08_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg08_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
+void arm7_cpu_device::drctg08_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Load */
{
uint32_t op = desc->opptr.l[0];
uint32_t offs = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
@@ -1057,7 +1057,7 @@ void arm7_cpu_device::drctg08_1(drcuml_block *block, compiler_state *compiler, c
/* Stack-Relative Load/Store */
-void arm7_cpu_device::drctg09_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
+void arm7_cpu_device::drctg09_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Store */
{
uint32_t op = desc->opptr.l[0];
uint32_t rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
@@ -1068,7 +1068,7 @@ void arm7_cpu_device::drctg09_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg09_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
+void arm7_cpu_device::drctg09_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Load */
{
uint32_t op = desc->opptr.l[0];
uint32_t rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
@@ -1081,7 +1081,7 @@ void arm7_cpu_device::drctg09_1(drcuml_block *block, compiler_state *compiler, c
/* Get relative address */
-void arm7_cpu_device::drctg0a_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, PC, #nn */
+void arm7_cpu_device::drctg0a_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ADD Rd, PC, #nn */
{
uint32_t op = desc->opptr.l[0];
uint32_t rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
@@ -1092,7 +1092,7 @@ void arm7_cpu_device::drctg0a_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg0a_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, SP, #nn */
+void arm7_cpu_device::drctg0a_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ADD Rd, SP, #nn */
{
uint32_t op = desc->opptr.l[0];
uint32_t rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
@@ -1103,7 +1103,7 @@ void arm7_cpu_device::drctg0a_1(drcuml_block *block, compiler_state *compiler, c
/* Stack-Related Opcodes */
-void arm7_cpu_device::drctg0b_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD SP, #imm */
+void arm7_cpu_device::drctg0b_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* ADD SP, #imm */
{
uint32_t op = desc->opptr.l[0];
int32_t addr = (op & THUMB_INSN_IMM);
@@ -1113,28 +1113,28 @@ void arm7_cpu_device::drctg0b_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg0b_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* PUSH {Rlist} */
+void arm7_cpu_device::drctg0b_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* PUSH {Rlist} */
{
uint32_t op = desc->opptr.l[0];
for (int32_t offs = 7; offs >= 0; offs--)
@@ -1150,7 +1150,7 @@ void arm7_cpu_device::drctg0b_4(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg0b_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* PUSH {Rlist}{LR} */
+void arm7_cpu_device::drctg0b_5(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* PUSH {Rlist}{LR} */
{
uint32_t op = desc->opptr.l[0];
UML_SUB(block, DRC_REG(13), DRC_REG(13), 4);
@@ -1170,49 +1170,49 @@ void arm7_cpu_device::drctg0b_5(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg0b_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_6(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_7(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_8(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_9(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_a(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* POP {Rlist} */
+void arm7_cpu_device::drctg0b_c(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* POP {Rlist} */
{
uint32_t op = desc->opptr.l[0];
for (int32_t offs = 0; offs < 8; offs++)
@@ -1228,7 +1228,7 @@ void arm7_cpu_device::drctg0b_c(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg0b_d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* POP {Rlist}{PC} */
+void arm7_cpu_device::drctg0b_d(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* POP {Rlist}{PC} */
{
uint32_t op = desc->opptr.l[0];
uml::code_label arch5up;
@@ -1247,13 +1247,13 @@ void arm7_cpu_device::drctg0b_d(drcuml_block *block, compiler_state *compiler, c
UML_MOV(block, uml::I0, DRC_REG(13));
UML_CALLH(block, *m_impstate.read32);
UML_CMP(block, uml::mem(&m_archRev), 4);
- UML_JMPc(block, uml::COND_A, arch5up = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_A, arch5up = compiler.labelnum++);
UML_AND(block, DRC_PC, uml::I0, ~1);
UML_LABEL(block, arch5up);
UML_TEST(block, uml::I0, 1);
- UML_JMPc(block, uml::COND_Z, switch_mode = compiler->labelnum++);
+ UML_JMPc(block, uml::COND_Z, switch_mode = compiler.labelnum++);
UML_AND(block, uml::I0, uml::I0, ~1);
UML_MOV(block, DRC_PC, uml::I0);
@@ -1271,14 +1271,14 @@ void arm7_cpu_device::drctg0b_d(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_REG(13), DRC_REG(13), 4);
}
-void arm7_cpu_device::drctg0b_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_e(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::drctg0b_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0b_f(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
@@ -1293,7 +1293,7 @@ void arm7_cpu_device::drctg0b_f(drcuml_block *block, compiler_state *compiler, c
// GBA "BB Ball" performs an unaligned read with A[1:0] = 2 and expects A[1] not to be ignored [BP 800B90A,(R4&3)!=0]
// GBA "Gadget Racers" performs an unaligned read with A[1:0] = 1 and expects A[0] to be ignored [BP B72,(R0&3)!=0]
-void arm7_cpu_device::drctg0c_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
+void arm7_cpu_device::drctg0c_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Store */
{
uint32_t op = desc->opptr.l[0];
uint32_t rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
@@ -1312,7 +1312,7 @@ void arm7_cpu_device::drctg0c_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg0c_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
+void arm7_cpu_device::drctg0c_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* Load */
{
uint32_t op = desc->opptr.l[0];
uint32_t rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
@@ -1336,7 +1336,7 @@ void arm7_cpu_device::drctg0c_1(drcuml_block *block, compiler_state *compiler, c
/* Conditional Branch */
-void arm7_cpu_device::drctg0d_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_EQ:
+void arm7_cpu_device::drctg0d_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_EQ:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1346,7 +1346,7 @@ void arm7_cpu_device::drctg0d_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_NE:
+void arm7_cpu_device::drctg0d_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_NE:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1356,7 +1356,7 @@ void arm7_cpu_device::drctg0d_1(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_CS:
+void arm7_cpu_device::drctg0d_2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_CS:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1366,7 +1366,7 @@ void arm7_cpu_device::drctg0d_2(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_CC:
+void arm7_cpu_device::drctg0d_3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_CC:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1376,7 +1376,7 @@ void arm7_cpu_device::drctg0d_3(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_MI:
+void arm7_cpu_device::drctg0d_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_MI:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1386,7 +1386,7 @@ void arm7_cpu_device::drctg0d_4(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_PL:
+void arm7_cpu_device::drctg0d_5(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_PL:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1396,7 +1396,7 @@ void arm7_cpu_device::drctg0d_5(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_VS:
+void arm7_cpu_device::drctg0d_6(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_VS:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1406,7 +1406,7 @@ void arm7_cpu_device::drctg0d_6(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_VC:
+void arm7_cpu_device::drctg0d_7(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_VC:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1416,7 +1416,7 @@ void arm7_cpu_device::drctg0d_7(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_HI:
+void arm7_cpu_device::drctg0d_8(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_HI:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1433,7 +1433,7 @@ void arm7_cpu_device::drctg0d_8(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_LS:
+void arm7_cpu_device::drctg0d_9(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_LS:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1450,7 +1450,7 @@ void arm7_cpu_device::drctg0d_9(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_GE:
+void arm7_cpu_device::drctg0d_a(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_GE:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1466,7 +1466,7 @@ void arm7_cpu_device::drctg0d_a(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_LT:
+void arm7_cpu_device::drctg0d_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_LT:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1482,7 +1482,7 @@ void arm7_cpu_device::drctg0d_b(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_GT:
+void arm7_cpu_device::drctg0d_c(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_GT:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1505,7 +1505,7 @@ void arm7_cpu_device::drctg0d_c(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_LE:
+void arm7_cpu_device::drctg0d_d(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_LE:
{
uint32_t op = desc->opptr.l[0];
int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
@@ -1528,14 +1528,14 @@ void arm7_cpu_device::drctg0d_d(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, uml::I0);
}
-void arm7_cpu_device::drctg0d_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_AL:
+void arm7_cpu_device::drctg0d_e(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // COND_AL:
{
uint32_t op = desc->opptr.l[0];
uint32_t pc = desc->pc;
fatalerror("%08x: Undefined Thumb instruction: %04x (ARM9 reserved)\n", pc, op);
}
-void arm7_cpu_device::drctg0d_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // SWI (this is sort of a "hole" in the opcode encoding)
+void arm7_cpu_device::drctg0d_f(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) // SWI (this is sort of a "hole" in the opcode encoding)
{
UML_MOV(block, uml::mem(&m_pendingSwi), 1);
UML_CALLH(block, *m_impstate.check_irq);
@@ -1543,7 +1543,7 @@ void arm7_cpu_device::drctg0d_f(drcuml_block *block, compiler_state *compiler, c
/* B #offs */
-void arm7_cpu_device::drctg0e_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0e_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
int32_t offs = (op & THUMB_BRANCH_OFFS) << 1;
@@ -1554,7 +1554,7 @@ void arm7_cpu_device::drctg0e_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, offs + 4);
}
-void arm7_cpu_device::drctg0e_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0e_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t offs = (op & THUMB_BLOP_OFFS) << 1;
@@ -1568,7 +1568,7 @@ void arm7_cpu_device::drctg0e_1(drcuml_block *block, compiler_state *compiler, c
/* BL */
-void arm7_cpu_device::drctg0f_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void arm7_cpu_device::drctg0f_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t addr = (op & THUMB_BLOP_OFFS) << 12;
@@ -1581,7 +1581,7 @@ void arm7_cpu_device::drctg0f_0(drcuml_block *block, compiler_state *compiler, c
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
-void arm7_cpu_device::drctg0f_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* BL */
+void arm7_cpu_device::drctg0f_1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) /* BL */
{
uint32_t op = desc->opptr.l[0];
uint32_t addr = (op & THUMB_BLOP_OFFS) << 1;
diff --git a/src/devices/cpu/asap/asap.cpp b/src/devices/cpu/asap/asap.cpp
index 5d1bf9cb12a..15da646c3b3 100644
--- a/src/devices/cpu/asap/asap.cpp
+++ b/src/devices/cpu/asap/asap.cpp
@@ -305,9 +305,9 @@ void asap_device::state_string_export(const device_state_entry &entry, std::stri
// helper function
//-------------------------------------------------
-util::disasm_interface *asap_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> asap_device::create_disassembler()
{
- return new asap_disassembler;
+ return std::make_unique<asap_disassembler>();
}
diff --git a/src/devices/cpu/asap/asap.h b/src/devices/cpu/asap/asap.h
index bfeb7c60350..2f8df62fc0b 100644
--- a/src/devices/cpu/asap/asap.h
+++ b/src/devices/cpu/asap/asap.h
@@ -89,7 +89,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// helpers
inline uint32_t readop(offs_t pc);
diff --git a/src/devices/cpu/avr8/avr8.cpp b/src/devices/cpu/avr8/avr8.cpp
index 44a05e42435..f76825e9cb1 100644
--- a/src/devices/cpu/avr8/avr8.cpp
+++ b/src/devices/cpu/avr8/avr8.cpp
@@ -916,9 +916,9 @@ void avr8_device::state_string_export(const device_state_entry &entry, std::stri
// helper function
//-------------------------------------------------
-util::disasm_interface *avr8_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> avr8_device::create_disassembler()
{
- return new avr8_disassembler;
+ return std::make_unique<avr8_disassembler>();
}
diff --git a/src/devices/cpu/avr8/avr8.h b/src/devices/cpu/avr8/avr8.h
index ca502935c4f..973eb9774ec 100644
--- a/src/devices/cpu/avr8/avr8.h
+++ b/src/devices/cpu/avr8/avr8.h
@@ -123,7 +123,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/capricorn/capricorn.cpp b/src/devices/cpu/capricorn/capricorn.cpp
index b41a3892667..76bef9fdbf8 100644
--- a/src/devices/cpu/capricorn/capricorn.cpp
+++ b/src/devices/cpu/capricorn/capricorn.cpp
@@ -238,9 +238,9 @@ void capricorn_cpu_device::state_string_export(const device_state_entry &entry,
}
}
-util::disasm_interface *capricorn_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> capricorn_cpu_device::create_disassembler()
{
- return new capricorn_disassembler;
+ return std::make_unique<capricorn_disassembler>();
}
void capricorn_cpu_device::start_mem_burst(ea_addr_t addr)
diff --git a/src/devices/cpu/capricorn/capricorn.h b/src/devices/cpu/capricorn/capricorn.h
index e20d6875def..22df8389743 100644
--- a/src/devices/cpu/capricorn/capricorn.h
+++ b/src/devices/cpu/capricorn/capricorn.h
@@ -39,7 +39,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/ccpu/ccpu.cpp b/src/devices/cpu/ccpu/ccpu.cpp
index 467b5eb2402..f32ae53885d 100644
--- a/src/devices/cpu/ccpu/ccpu.cpp
+++ b/src/devices/cpu/ccpu/ccpu.cpp
@@ -696,7 +696,7 @@ void ccpu_cpu_device::execute_run()
}
-util::disasm_interface *ccpu_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> ccpu_cpu_device::create_disassembler()
{
- return new ccpu_disassembler;
+ return std::make_unique<ccpu_disassembler>();
}
diff --git a/src/devices/cpu/ccpu/ccpu.h b/src/devices/cpu/ccpu/ccpu.h
index 6510250e233..1afc876d3b0 100644
--- a/src/devices/cpu/ccpu/ccpu.h
+++ b/src/devices/cpu/ccpu/ccpu.h
@@ -78,7 +78,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
address_space_config m_data_config;
diff --git a/src/devices/cpu/clipper/clipper.cpp b/src/devices/cpu/clipper/clipper.cpp
index 33418a764df..096c2968335 100644
--- a/src/devices/cpu/clipper/clipper.cpp
+++ b/src/devices/cpu/clipper/clipper.cpp
@@ -1921,7 +1921,7 @@ void clipper_c400_device::execute_instruction()
}
}
-util::disasm_interface *clipper_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> clipper_device::create_disassembler()
{
- return new clipper_disassembler;
+ return std::make_unique<clipper_disassembler>();
}
diff --git a/src/devices/cpu/clipper/clipper.h b/src/devices/cpu/clipper/clipper.h
index c1324d8ae27..599259efc05 100644
--- a/src/devices/cpu/clipper/clipper.h
+++ b/src/devices/cpu/clipper/clipper.h
@@ -166,7 +166,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// mmu helpers
virtual cammu_device &get_icammu() const = 0;
diff --git a/src/devices/cpu/cop400/cop400.cpp b/src/devices/cpu/cop400/cop400.cpp
index d77461e9533..ffc9662d582 100644
--- a/src/devices/cpu/cop400/cop400.cpp
+++ b/src/devices/cpu/cop400/cop400.cpp
@@ -1366,24 +1366,16 @@ void cop400_cpu_device::state_string_export(const device_state_entry &entry, std
}
-util::disasm_interface *cop400_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> cop400_cpu_device::create_disassembler()
{
if ( m_featuremask & COP424C_FEATURE )
- {
- return new cop424_disassembler;
- }
-
- if ( m_featuremask & COP444L_FEATURE )
- {
- return new cop444_disassembler;
- }
-
- if ( m_featuremask & COP420_FEATURE )
- {
- return new cop420_disassembler;
- }
-
- return new cop410_disassembler;
+ return std::make_unique<cop424_disassembler>();
+ else if ( m_featuremask & COP444L_FEATURE )
+ return std::make_unique<cop444_disassembler>();
+ else if ( m_featuremask & COP420_FEATURE )
+ return std::make_unique<cop420_disassembler>();
+ else
+ return std::make_unique<cop410_disassembler>();
}
READ8_MEMBER( cop400_cpu_device::microbus_rd )
diff --git a/src/devices/cpu/cop400/cop400.h b/src/devices/cpu/cop400/cop400.h
index 643f6129fe1..6c32ab274d2 100644
--- a/src/devices/cpu/cop400/cop400.h
+++ b/src/devices/cpu/cop400/cop400.h
@@ -171,7 +171,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
address_space_config m_data_config;
diff --git a/src/devices/cpu/cosmac/cosmac.cpp b/src/devices/cpu/cosmac/cosmac.cpp
index 60b28dee897..e4a320cd8d1 100644
--- a/src/devices/cpu/cosmac/cosmac.cpp
+++ b/src/devices/cpu/cosmac/cosmac.cpp
@@ -484,15 +484,15 @@ void cosmac_device::state_string_export(const device_state_entry &entry, std::st
// helper function
//-------------------------------------------------
-util::disasm_interface *cdp1801_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> cdp1801_device::create_disassembler()
{
- return new cosmac_disassembler(cosmac_disassembler::TYPE_1801);
+ return std::make_unique<cosmac_disassembler>(cosmac_disassembler::TYPE_1801);
}
-util::disasm_interface *cdp1802_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> cdp1802_device::create_disassembler()
{
- return new cosmac_disassembler(cosmac_disassembler::TYPE_1802);
+ return std::make_unique<cosmac_disassembler>(cosmac_disassembler::TYPE_1802);
}
//**************************************************************************
diff --git a/src/devices/cpu/cosmac/cosmac.h b/src/devices/cpu/cosmac/cosmac.h
index 161b3ea7d5c..e52762fbc10 100644
--- a/src/devices/cpu/cosmac/cosmac.h
+++ b/src/devices/cpu/cosmac/cosmac.h
@@ -455,7 +455,7 @@ public:
protected:
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) override;
@@ -473,7 +473,7 @@ public:
protected:
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) override;
diff --git a/src/devices/cpu/cp1610/cp1610.cpp b/src/devices/cpu/cp1610/cp1610.cpp
index aafbe86fbe9..e60f3376797 100644
--- a/src/devices/cpu/cp1610/cp1610.cpp
+++ b/src/devices/cpu/cp1610/cp1610.cpp
@@ -3422,7 +3422,7 @@ void cp1610_cpu_device::state_string_export(const device_state_entry &entry, std
}
}
-util::disasm_interface *cp1610_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> cp1610_cpu_device::create_disassembler()
{
- return new cp1610_disassembler;
+ return std::make_unique<cp1610_disassembler>();
}
diff --git a/src/devices/cpu/cp1610/cp1610.h b/src/devices/cpu/cp1610/cp1610.h
index 54daa10b4bc..86b22e43f70 100644
--- a/src/devices/cpu/cp1610/cp1610.h
+++ b/src/devices/cpu/cp1610/cp1610.h
@@ -60,7 +60,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/cubeqcpu/cubeqcpu.cpp b/src/devices/cpu/cubeqcpu/cubeqcpu.cpp
index f00ed3eefa0..db5ccf9eba8 100644
--- a/src/devices/cpu/cubeqcpu/cubeqcpu.cpp
+++ b/src/devices/cpu/cubeqcpu/cubeqcpu.cpp
@@ -92,9 +92,9 @@ device_memory_interface::space_config_vector cquestsnd_cpu_device::memory_space_
}
-util::disasm_interface *cquestsnd_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> cquestsnd_cpu_device::create_disassembler()
{
- return new cquestsnd_disassembler;
+ return std::make_unique<cquestsnd_disassembler>();
}
@@ -112,9 +112,9 @@ READ16_MEMBER( cquestrot_cpu_device::linedata_r )
}
-util::disasm_interface *cquestrot_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> cquestrot_cpu_device::create_disassembler()
{
- return new cquestsnd_disassembler;
+ return std::make_unique<cquestsnd_disassembler>();
}
@@ -134,9 +134,9 @@ device_memory_interface::space_config_vector cquestlin_cpu_device::memory_space_
};
}
-util::disasm_interface *cquestlin_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> cquestlin_cpu_device::create_disassembler()
{
- return new cquestlin_disassembler;
+ return std::make_unique<cquestlin_disassembler>();
}
diff --git a/src/devices/cpu/cubeqcpu/cubeqcpu.h b/src/devices/cpu/cubeqcpu/cubeqcpu.h
index 90f5b5250c0..cc8cc85bf93 100644
--- a/src/devices/cpu/cubeqcpu/cubeqcpu.h
+++ b/src/devices/cpu/cubeqcpu/cubeqcpu.h
@@ -87,7 +87,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
@@ -188,7 +188,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
@@ -300,7 +300,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/diablo/diablo1300.cpp b/src/devices/cpu/diablo/diablo1300.cpp
index 8aba2c157ac..ee2ae5264a2 100644
--- a/src/devices/cpu/diablo/diablo1300.cpp
+++ b/src/devices/cpu/diablo/diablo1300.cpp
@@ -146,9 +146,9 @@ device_memory_interface::space_config_vector diablo1300_cpu_device::memory_space
// helper function
//-------------------------------------------------
-util::disasm_interface *diablo1300_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> diablo1300_cpu_device::create_disassembler()
{
- return new diablo1300_disassembler;
+ return std::make_unique<diablo1300_disassembler>();
}
diff --git a/src/devices/cpu/diablo/diablo1300.h b/src/devices/cpu/diablo/diablo1300.h
index fda5b8541c2..a143d121aca 100644
--- a/src/devices/cpu/diablo/diablo1300.h
+++ b/src/devices/cpu/diablo/diablo1300.h
@@ -38,7 +38,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
//virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/drcuml.cpp b/src/devices/cpu/drcuml.cpp
index dcf8196dfe6..0a1dcae9d02 100644
--- a/src/devices/cpu/drcuml.cpp
+++ b/src/devices/cpu/drcuml.cpp
@@ -203,7 +203,7 @@ void drcuml_state::reset()
// begin_block - begin a new code block
//-------------------------------------------------
-drcuml_block *drcuml_state::begin_block(uint32_t maxinst)
+drcuml_block &drcuml_state::begin_block(uint32_t maxinst)
{
// find an inactive block that matches our qualifications
drcuml_block *bestblock(nullptr);
@@ -219,7 +219,7 @@ drcuml_block *drcuml_state::begin_block(uint32_t maxinst)
// start the block
bestblock->begin();
- return bestblock;
+ return *bestblock;
}
diff --git a/src/devices/cpu/drcuml.h b/src/devices/cpu/drcuml.h
index 75dcadadc23..5bb4bb04ae4 100644
--- a/src/devices/cpu/drcuml.h
+++ b/src/devices/cpu/drcuml.h
@@ -171,7 +171,7 @@ public:
int execute(uml::code_handle &entry) { return m_beintf->execute(entry); }
// code generation
- drcuml_block *begin_block(u32 maxinst);
+ drcuml_block &begin_block(u32 maxinst);
// back-end interface
void get_backend_info(drcbe_info &info) { m_beintf->get_info(info); }
diff --git a/src/devices/cpu/drcumlsh.h b/src/devices/cpu/drcumlsh.h
index 3df2ec614fa..5dec2d02dba 100644
--- a/src/devices/cpu/drcumlsh.h
+++ b/src/devices/cpu/drcumlsh.h
@@ -21,169 +21,169 @@
***************************************************************************/
/* ----- Compile-time Opcodes ----- */
-#define UML_HANDLE(block, handle_) do { using namespace uml; block->append().handle(handle_); } while (0)
-#define UML_HASH(block, mode, pc) do { using namespace uml; block->append().hash(mode, pc); } while (0)
-#define UML_LABEL(block, label_) do { using namespace uml; block->append().label(label_); } while (0)
-#define UML_MAPVAR(block, mapvar_, value) do { using namespace uml; block->append().mapvar(mapvar_, value); } while (0)
+#define UML_HANDLE(block, handle_) do { using namespace uml; block.append().handle(handle_); } while (0)
+#define UML_HASH(block, mode, pc) do { using namespace uml; block.append().hash(mode, pc); } while (0)
+#define UML_LABEL(block, label_) do { using namespace uml; block.append().label(label_); } while (0)
+#define UML_MAPVAR(block, mapvar_, value) do { using namespace uml; block.append().mapvar(mapvar_, value); } while (0)
/* ----- Control Flow Operations ----- */
-#define UML_NOP(block) do { using namespace uml; block->append().nop(); } while (0)
-#define UML_DEBUG(block, pc) do { using namespace uml; block->append().debug(pc); } while (0)
-#define UML_EXIT(block, param) do { using namespace uml; block->append().exit(param); } while (0)
-#define UML_EXITc(block, cond, param) do { using namespace uml; block->append().exit(param, cond); } while (0)
-#define UML_HASHJMP(block, mode, pc, handle) do { using namespace uml; block->append().hashjmp(mode, pc, handle); } while (0)
-#define UML_JMP(block, label) do { using namespace uml; block->append().jmp(label); } while (0)
-#define UML_JMPc(block, cond, label) do { using namespace uml; block->append().jmp(cond, label); } while (0)
-#define UML_JMPH(block, handle) do { using namespace uml; block->append().jmph(handle); } while (0)
-#define UML_JMPHc(block, cond, handle) do { using namespace uml; block->append().jmph(cond, handle); } while (0)
-#define UML_EXH(block, handle, param) do { using namespace uml; block->append().exh(handle, param); } while (0)
-#define UML_EXHc(block, cond, handle, param) do { using namespace uml; block->append().exh(cond, handle, param); } while (0)
-#define UML_CALLH(block, handle) do { using namespace uml; block->append().callh(handle); } while (0)
-#define UML_CALLHc(block, cond, handle) do { using namespace uml; block->append().callh(cond, handle); } while (0)
-#define UML_RET(block) do { using namespace uml; block->append().ret(); } while (0)
-#define UML_RETc(block, cond) do { using namespace uml; block->append().ret(cond); } while (0)
-#define UML_CALLC(block, func, ptr) do { using namespace uml; block->append().callc(func, ptr); } while (0)
-#define UML_CALLCc(block, cond, func, ptr) do { using namespace uml; block->append().callc(cond, func, ptr); } while (0)
-#define UML_RECOVER(block, dst, mapvar) do { using namespace uml; block->append().recover(dst, mapvar); } while (0)
+#define UML_NOP(block) do { using namespace uml; block.append().nop(); } while (0)
+#define UML_DEBUG(block, pc) do { using namespace uml; block.append().debug(pc); } while (0)
+#define UML_EXIT(block, param) do { using namespace uml; block.append().exit(param); } while (0)
+#define UML_EXITc(block, cond, param) do { using namespace uml; block.append().exit(param, cond); } while (0)
+#define UML_HASHJMP(block, mode, pc, handle) do { using namespace uml; block.append().hashjmp(mode, pc, handle); } while (0)
+#define UML_JMP(block, label) do { using namespace uml; block.append().jmp(label); } while (0)
+#define UML_JMPc(block, cond, label) do { using namespace uml; block.append().jmp(cond, label); } while (0)
+#define UML_JMPH(block, handle) do { using namespace uml; block.append().jmph(handle); } while (0)
+#define UML_JMPHc(block, cond, handle) do { using namespace uml; block.append().jmph(cond, handle); } while (0)
+#define UML_EXH(block, handle, param) do { using namespace uml; block.append().exh(handle, param); } while (0)
+#define UML_EXHc(block, cond, handle, param) do { using namespace uml; block.append().exh(cond, handle, param); } while (0)
+#define UML_CALLH(block, handle) do { using namespace uml; block.append().callh(handle); } while (0)
+#define UML_CALLHc(block, cond, handle) do { using namespace uml; block.append().callh(cond, handle); } while (0)
+#define UML_RET(block) do { using namespace uml; block.append().ret(); } while (0)
+#define UML_RETc(block, cond) do { using namespace uml; block.append().ret(cond); } while (0)
+#define UML_CALLC(block, func, ptr) do { using namespace uml; block.append().callc(func, ptr); } while (0)
+#define UML_CALLCc(block, cond, func, ptr) do { using namespace uml; block.append().callc(cond, func, ptr); } while (0)
+#define UML_RECOVER(block, dst, mapvar) do { using namespace uml; block.append().recover(dst, mapvar); } while (0)
/* ----- Internal Register Operations ----- */
-#define UML_SETFMOD(block, mode) do { using namespace uml; block->append().setfmod(mode); } while (0)
-#define UML_GETFMOD(block, dst) do { using namespace uml; block->append().getfmod(dst); } while (0)
-#define UML_GETEXP(block, dst) do { using namespace uml; block->append().getexp(dst); } while (0)
-#define UML_GETFLGS(block, dst, flags) do { using namespace uml; block->append().getflgs(dst, flags); } while (0)
-#define UML_SAVE(block, dst) do { using namespace uml; block->append().save(dst); } while (0)
-#define UML_RESTORE(block, src) do { using namespace uml; block->append().restore(src); } while (0)
+#define UML_SETFMOD(block, mode) do { using namespace uml; block.append().setfmod(mode); } while (0)
+#define UML_GETFMOD(block, dst) do { using namespace uml; block.append().getfmod(dst); } while (0)
+#define UML_GETEXP(block, dst) do { using namespace uml; block.append().getexp(dst); } while (0)
+#define UML_GETFLGS(block, dst, flags) do { using namespace uml; block.append().getflgs(dst, flags); } while (0)
+#define UML_SAVE(block, dst) do { using namespace uml; block.append().save(dst); } while (0)
+#define UML_RESTORE(block, src) do { using namespace uml; block.append().restore(src); } while (0)
/* ----- 32-Bit Integer Operations ----- */
-#define UML_LOAD(block, dst, base, index, size, scale) do { using namespace uml; block->append().load(dst, base, index, size, scale); } while (0)
-#define UML_LOADS(block, dst, base, index, size, scale) do { using namespace uml; block->append().loads(dst, base, index, size, scale); } while (0)
-#define UML_STORE(block, base, index, src1, size, scale) do { using namespace uml; block->append().store(base, index, src1, size, scale); } while (0)
-#define UML_READ(block, dst, src1, size, space) do { using namespace uml; block->append().read(dst, src1, size, space); } while (0)
-#define UML_READM(block, dst, src1, mask, size, space) do { using namespace uml; block->append().readm(dst, src1, mask, size, space); } while (0)
-#define UML_WRITE(block, dst, src1, size, space) do { using namespace uml; block->append().write(dst, src1, size, space); } while (0)
-#define UML_WRITEM(block, dst, src1, mask, size, space) do { using namespace uml; block->append().writem(dst, src1, mask, size, space); } while (0)
-#define UML_CARRY(block, src, bitnum) do { using namespace uml; block->append().carry(src, bitnum); } while (0)
-#define UML_SETc(block, cond, dst) do { using namespace uml; block->append().set(cond, dst); } while (0)
-#define UML_MOV(block, dst, src1) do { using namespace uml; block->append().mov(dst, src1); } while (0)
-#define UML_MOVc(block, cond, dst, src1) do { using namespace uml; block->append().mov(cond, dst, src1); } while (0)
-#define UML_SEXT(block, dst, src1, size) do { using namespace uml; block->append().sext(dst, src1, size); } while (0)
-#define UML_ROLAND(block, dst, src, shift, mask) do { using namespace uml; block->append().roland(dst, src, shift, mask); } while (0)
-#define UML_ROLINS(block, dst, src, shift, mask) do { using namespace uml; block->append().rolins(dst, src, shift, mask); } while (0)
-#define UML_ADD(block, dst, src1, src2) do { using namespace uml; block->append().add(dst, src1, src2); } while (0)
-#define UML_ADDC(block, dst, src1, src2) do { using namespace uml; block->append().addc(dst, src1, src2); } while (0)
-#define UML_SUB(block, dst, src1, src2) do { using namespace uml; block->append().sub(dst, src1, src2); } while (0)
-#define UML_SUBB(block, dst, src1, src2) do { using namespace uml; block->append().subb(dst, src1, src2); } while (0)
-#define UML_CMP(block, src1, src2) do { using namespace uml; block->append().cmp(src1, src2); } while (0)
-#define UML_MULU(block, dst, edst, src1, src2) do { using namespace uml; block->append().mulu(dst, edst, src1, src2); } while (0)
-#define UML_MULS(block, dst, edst, src1, src2) do { using namespace uml; block->append().muls(dst, edst, src1, src2); } while (0)
-#define UML_DIVU(block, dst, edst, src1, src2) do { using namespace uml; block->append().divu(dst, edst, src1, src2); } while (0)
-#define UML_DIVS(block, dst, edst, src1, src2) do { using namespace uml; block->append().divs(dst, edst, src1, src2); } while (0)
-#define UML_AND(block, dst, src1, src2) do { using namespace uml; block->append()._and(dst, src1, src2); } while (0)
-#define UML_TEST(block, src1, src2) do { using namespace uml; block->append().test(src1, src2); } while (0)
-#define UML_OR(block, dst, src1, src2) do { using namespace uml; block->append()._or(dst, src1, src2); } while (0)
-#define UML_XOR(block, dst, src1, src2) do { using namespace uml; block->append()._xor(dst, src1, src2); } while (0)
-#define UML_LZCNT(block, dst, src) do { using namespace uml; block->append().lzcnt(dst, src); } while (0)
-#define UML_TZCNT(block, dst, src) do { using namespace uml; block->append().tzcnt(dst, src); } while (0)
-#define UML_BSWAP(block, dst, src) do { using namespace uml; block->append().bswap(dst, src); } while (0)
-#define UML_SHL(block, dst, src, count) do { using namespace uml; block->append().shl(dst, src, count); } while (0)
-#define UML_SHR(block, dst, src, count) do { using namespace uml; block->append().shr(dst, src, count); } while (0)
-#define UML_SAR(block, dst, src, count) do { using namespace uml; block->append().sar(dst, src, count); } while (0)
-#define UML_ROL(block, dst, src, count) do { using namespace uml; block->append().rol(dst, src, count); } while (0)
-#define UML_ROLC(block, dst, src, count) do { using namespace uml; block->append().rolc(dst, src, count); } while (0)
-#define UML_ROR(block, dst, src, count) do { using namespace uml; block->append().ror(dst, src, count); } while (0)
-#define UML_RORC(block, dst, src, count) do { using namespace uml; block->append().rorc(dst, src, count); } while (0)
+#define UML_LOAD(block, dst, base, index, size, scale) do { using namespace uml; block.append().load(dst, base, index, size, scale); } while (0)
+#define UML_LOADS(block, dst, base, index, size, scale) do { using namespace uml; block.append().loads(dst, base, index, size, scale); } while (0)
+#define UML_STORE(block, base, index, src1, size, scale) do { using namespace uml; block.append().store(base, index, src1, size, scale); } while (0)
+#define UML_READ(block, dst, src1, size, space) do { using namespace uml; block.append().read(dst, src1, size, space); } while (0)
+#define UML_READM(block, dst, src1, mask, size, space) do { using namespace uml; block.append().readm(dst, src1, mask, size, space); } while (0)
+#define UML_WRITE(block, dst, src1, size, space) do { using namespace uml; block.append().write(dst, src1, size, space); } while (0)
+#define UML_WRITEM(block, dst, src1, mask, size, space) do { using namespace uml; block.append().writem(dst, src1, mask, size, space); } while (0)
+#define UML_CARRY(block, src, bitnum) do { using namespace uml; block.append().carry(src, bitnum); } while (0)
+#define UML_SETc(block, cond, dst) do { using namespace uml; block.append().set(cond, dst); } while (0)
+#define UML_MOV(block, dst, src1) do { using namespace uml; block.append().mov(dst, src1); } while (0)
+#define UML_MOVc(block, cond, dst, src1) do { using namespace uml; block.append().mov(cond, dst, src1); } while (0)
+#define UML_SEXT(block, dst, src1, size) do { using namespace uml; block.append().sext(dst, src1, size); } while (0)
+#define UML_ROLAND(block, dst, src, shift, mask) do { using namespace uml; block.append().roland(dst, src, shift, mask); } while (0)
+#define UML_ROLINS(block, dst, src, shift, mask) do { using namespace uml; block.append().rolins(dst, src, shift, mask); } while (0)
+#define UML_ADD(block, dst, src1, src2) do { using namespace uml; block.append().add(dst, src1, src2); } while (0)
+#define UML_ADDC(block, dst, src1, src2) do { using namespace uml; block.append().addc(dst, src1, src2); } while (0)
+#define UML_SUB(block, dst, src1, src2) do { using namespace uml; block.append().sub(dst, src1, src2); } while (0)
+#define UML_SUBB(block, dst, src1, src2) do { using namespace uml; block.append().subb(dst, src1, src2); } while (0)
+#define UML_CMP(block, src1, src2) do { using namespace uml; block.append().cmp(src1, src2); } while (0)
+#define UML_MULU(block, dst, edst, src1, src2) do { using namespace uml; block.append().mulu(dst, edst, src1, src2); } while (0)
+#define UML_MULS(block, dst, edst, src1, src2) do { using namespace uml; block.append().muls(dst, edst, src1, src2); } while (0)
+#define UML_DIVU(block, dst, edst, src1, src2) do { using namespace uml; block.append().divu(dst, edst, src1, src2); } while (0)
+#define UML_DIVS(block, dst, edst, src1, src2) do { using namespace uml; block.append().divs(dst, edst, src1, src2); } while (0)
+#define UML_AND(block, dst, src1, src2) do { using namespace uml; block.append()._and(dst, src1, src2); } while (0)
+#define UML_TEST(block, src1, src2) do { using namespace uml; block.append().test(src1, src2); } while (0)
+#define UML_OR(block, dst, src1, src2) do { using namespace uml; block.append()._or(dst, src1, src2); } while (0)
+#define UML_XOR(block, dst, src1, src2) do { using namespace uml; block.append()._xor(dst, src1, src2); } while (0)
+#define UML_LZCNT(block, dst, src) do { using namespace uml; block.append().lzcnt(dst, src); } while (0)
+#define UML_TZCNT(block, dst, src) do { using namespace uml; block.append().tzcnt(dst, src); } while (0)
+#define UML_BSWAP(block, dst, src) do { using namespace uml; block.append().bswap(dst, src); } while (0)
+#define UML_SHL(block, dst, src, count) do { using namespace uml; block.append().shl(dst, src, count); } while (0)
+#define UML_SHR(block, dst, src, count) do { using namespace uml; block.append().shr(dst, src, count); } while (0)
+#define UML_SAR(block, dst, src, count) do { using namespace uml; block.append().sar(dst, src, count); } while (0)
+#define UML_ROL(block, dst, src, count) do { using namespace uml; block.append().rol(dst, src, count); } while (0)
+#define UML_ROLC(block, dst, src, count) do { using namespace uml; block.append().rolc(dst, src, count); } while (0)
+#define UML_ROR(block, dst, src, count) do { using namespace uml; block.append().ror(dst, src, count); } while (0)
+#define UML_RORC(block, dst, src, count) do { using namespace uml; block.append().rorc(dst, src, count); } while (0)
/* ----- 64-Bit Integer Operations ----- */
-#define UML_DLOAD(block, dst, base, index, size, scale) do { using namespace uml; block->append().dload(dst, base, index, size, scale); } while (0)
-#define UML_DLOADS(block, dst, base, index, size, scale) do { using namespace uml; block->append().dloads(dst, base, index, size, scale); } while (0)
-#define UML_DSTORE(block, base, index, src1, size, scale) do { using namespace uml; block->append().dstore(base, index, src1, size, scale); } while (0)
-#define UML_DREAD(block, dst, src1, size, space) do { using namespace uml; block->append().dread(dst, src1, size, space); } while (0)
-#define UML_DREADM(block, dst, src1, mask, size, space) do { using namespace uml; block->append().dreadm(dst, src1, mask, size, space); } while (0)
-#define UML_DWRITE(block, dst, src1, size, space) do { using namespace uml; block->append().dwrite(dst, src1, size, space); } while (0)
-#define UML_DWRITEM(block, dst, src1, mask, size, space) do { using namespace uml; block->append().dwritem(dst, src1, mask, size, space); } while (0)
-#define UML_DCARRY(block, src, bitnum) do { using namespace uml; block->append().dcarry(src, bitnum); } while (0)
-#define UML_DSETc(block, cond, dst) do { using namespace uml; block->append().dset(cond, dst); } while (0)
-#define UML_DMOV(block, dst, src1) do { using namespace uml; block->append().dmov(dst, src1); } while (0)
-#define UML_DMOVc(block, cond, dst, src1) do { using namespace uml; block->append().dmov(cond, dst, src1); } while (0)
-#define UML_DSEXT(block, dst, src1, size) do { using namespace uml; block->append().dsext(dst, src1, size); } while (0)
-#define UML_DROLAND(block, dst, src, shift, mask) do { using namespace uml; block->append().droland(dst, src, shift, mask); } while (0)
-#define UML_DROLINS(block, dst, src, shift, mask) do { using namespace uml; block->append().drolins(dst, src, shift, mask); } while (0)
-#define UML_DADD(block, dst, src1, src2) do { using namespace uml; block->append().dadd(dst, src1, src2); } while (0)
-#define UML_DADDC(block, dst, src1, src2) do { using namespace uml; block->append().daddc(dst, src1, src2); } while (0)
-#define UML_DSUB(block, dst, src1, src2) do { using namespace uml; block->append().dsub(dst, src1, src2); } while (0)
-#define UML_DSUBB(block, dst, src1, src2) do { using namespace uml; block->append().dsubb(dst, src1, src2); } while (0)
-#define UML_DCMP(block, src1, src2) do { using namespace uml; block->append().dcmp(src1, src2); } while (0)
-#define UML_DMULU(block, dst, edst, src1, src2) do { using namespace uml; block->append().dmulu(dst, edst, src1, src2); } while (0)
-#define UML_DMULS(block, dst, edst, src1, src2) do { using namespace uml; block->append().dmuls(dst, edst, src1, src2); } while (0)
-#define UML_DDIVU(block, dst, edst, src1, src2) do { using namespace uml; block->append().ddivu(dst, edst, src1, src2); } while (0)
-#define UML_DDIVS(block, dst, edst, src1, src2) do { using namespace uml; block->append().ddivs(dst, edst, src1, src2); } while (0)
-#define UML_DAND(block, dst, src1, src2) do { using namespace uml; block->append().dand(dst, src1, src2); } while (0)
-#define UML_DTEST(block, src1, src2) do { using namespace uml; block->append().dtest(src1, src2); } while (0)
-#define UML_DOR(block, dst, src1, src2) do { using namespace uml; block->append().dor(dst, src1, src2); } while (0)
-#define UML_DXOR(block, dst, src1, src2) do { using namespace uml; block->append().dxor(dst, src1, src2); } while (0)
-#define UML_DLZCNT(block, dst, src) do { using namespace uml; block->append().dlzcnt(dst, src); } while (0)
-#define UML_DTZCNT(block, dst, src) do { using namespace uml; block->append().dtzcnt(dst, src); } while (0)
-#define UML_DBSWAP(block, dst, src) do { using namespace uml; block->append().dbswap(dst, src); } while (0)
-#define UML_DSHL(block, dst, src, count) do { using namespace uml; block->append().dshl(dst, src, count); } while (0)
-#define UML_DSHR(block, dst, src, count) do { using namespace uml; block->append().dshr(dst, src, count); } while (0)
-#define UML_DSAR(block, dst, src, count) do { using namespace uml; block->append().dsar(dst, src, count); } while (0)
-#define UML_DROL(block, dst, src, count) do { using namespace uml; block->append().drol(dst, src, count); } while (0)
-#define UML_DROLC(block, dst, src, count) do { using namespace uml; block->append().drolc(dst, src, count); } while (0)
-#define UML_DROR(block, dst, src, count) do { using namespace uml; block->append().dror(dst, src, count); } while (0)
-#define UML_DRORC(block, dst, src, count) do { using namespace uml; block->append().drorc(dst, src, count); } while (0)
+#define UML_DLOAD(block, dst, base, index, size, scale) do { using namespace uml; block.append().dload(dst, base, index, size, scale); } while (0)
+#define UML_DLOADS(block, dst, base, index, size, scale) do { using namespace uml; block.append().dloads(dst, base, index, size, scale); } while (0)
+#define UML_DSTORE(block, base, index, src1, size, scale) do { using namespace uml; block.append().dstore(base, index, src1, size, scale); } while (0)
+#define UML_DREAD(block, dst, src1, size, space) do { using namespace uml; block.append().dread(dst, src1, size, space); } while (0)
+#define UML_DREADM(block, dst, src1, mask, size, space) do { using namespace uml; block.append().dreadm(dst, src1, mask, size, space); } while (0)
+#define UML_DWRITE(block, dst, src1, size, space) do { using namespace uml; block.append().dwrite(dst, src1, size, space); } while (0)
+#define UML_DWRITEM(block, dst, src1, mask, size, space) do { using namespace uml; block.append().dwritem(dst, src1, mask, size, space); } while (0)
+#define UML_DCARRY(block, src, bitnum) do { using namespace uml; block.append().dcarry(src, bitnum); } while (0)
+#define UML_DSETc(block, cond, dst) do { using namespace uml; block.append().dset(cond, dst); } while (0)
+#define UML_DMOV(block, dst, src1) do { using namespace uml; block.append().dmov(dst, src1); } while (0)
+#define UML_DMOVc(block, cond, dst, src1) do { using namespace uml; block.append().dmov(cond, dst, src1); } while (0)
+#define UML_DSEXT(block, dst, src1, size) do { using namespace uml; block.append().dsext(dst, src1, size); } while (0)
+#define UML_DROLAND(block, dst, src, shift, mask) do { using namespace uml; block.append().droland(dst, src, shift, mask); } while (0)
+#define UML_DROLINS(block, dst, src, shift, mask) do { using namespace uml; block.append().drolins(dst, src, shift, mask); } while (0)
+#define UML_DADD(block, dst, src1, src2) do { using namespace uml; block.append().dadd(dst, src1, src2); } while (0)
+#define UML_DADDC(block, dst, src1, src2) do { using namespace uml; block.append().daddc(dst, src1, src2); } while (0)
+#define UML_DSUB(block, dst, src1, src2) do { using namespace uml; block.append().dsub(dst, src1, src2); } while (0)
+#define UML_DSUBB(block, dst, src1, src2) do { using namespace uml; block.append().dsubb(dst, src1, src2); } while (0)
+#define UML_DCMP(block, src1, src2) do { using namespace uml; block.append().dcmp(src1, src2); } while (0)
+#define UML_DMULU(block, dst, edst, src1, src2) do { using namespace uml; block.append().dmulu(dst, edst, src1, src2); } while (0)
+#define UML_DMULS(block, dst, edst, src1, src2) do { using namespace uml; block.append().dmuls(dst, edst, src1, src2); } while (0)
+#define UML_DDIVU(block, dst, edst, src1, src2) do { using namespace uml; block.append().ddivu(dst, edst, src1, src2); } while (0)
+#define UML_DDIVS(block, dst, edst, src1, src2) do { using namespace uml; block.append().ddivs(dst, edst, src1, src2); } while (0)
+#define UML_DAND(block, dst, src1, src2) do { using namespace uml; block.append().dand(dst, src1, src2); } while (0)
+#define UML_DTEST(block, src1, src2) do { using namespace uml; block.append().dtest(src1, src2); } while (0)
+#define UML_DOR(block, dst, src1, src2) do { using namespace uml; block.append().dor(dst, src1, src2); } while (0)
+#define UML_DXOR(block, dst, src1, src2) do { using namespace uml; block.append().dxor(dst, src1, src2); } while (0)
+#define UML_DLZCNT(block, dst, src) do { using namespace uml; block.append().dlzcnt(dst, src); } while (0)
+#define UML_DTZCNT(block, dst, src) do { using namespace uml; block.append().dtzcnt(dst, src); } while (0)
+#define UML_DBSWAP(block, dst, src) do { using namespace uml; block.append().dbswap(dst, src); } while (0)
+#define UML_DSHL(block, dst, src, count) do { using namespace uml; block.append().dshl(dst, src, count); } while (0)
+#define UML_DSHR(block, dst, src, count) do { using namespace uml; block.append().dshr(dst, src, count); } while (0)
+#define UML_DSAR(block, dst, src, count) do { using namespace uml; block.append().dsar(dst, src, count); } while (0)
+#define UML_DROL(block, dst, src, count) do { using namespace uml; block.append().drol(dst, src, count); } while (0)
+#define UML_DROLC(block, dst, src, count) do { using namespace uml; block.append().drolc(dst, src, count); } while (0)
+#define UML_DROR(block, dst, src, count) do { using namespace uml; block.append().dror(dst, src, count); } while (0)
+#define UML_DRORC(block, dst, src, count) do { using namespace uml; block.append().drorc(dst, src, count); } while (0)
/* ----- 32-bit Floating Point Arithmetic Operations ----- */
-#define UML_FSLOAD(block, dst, base, index) do { using namespace uml; block->append().fsload(dst, base, index); } while (0)
-#define UML_FSSTORE(block, base, index, src1) do { using namespace uml; block->append().fsstore(base, index, src1); } while (0)
-#define UML_FSREAD(block, dst, src1, space) do { using namespace uml; block->append().fsread(dst, src1, AS_##space); } while (0)
-#define UML_FSWRITE(block, dst, src1, space) do { using namespace uml; block->append().fswrite(dst, src1, AS_##space); } while (0)
-#define UML_FSMOV(block, dst, src1) do { using namespace uml; block->append().fsmov(dst, src1); } while (0)
-#define UML_FSMOVc(block, cond, dst, src1) do { using namespace uml; block->append().fsmov(cond, dst, src1); } while (0)
-#define UML_FSTOINT(block, dst, src1, size, round) do { using namespace uml; block->append().fstoint(dst, src1, size, round); } while (0)
-#define UML_FSFRINT(block, dst, src1, size) do { using namespace uml; block->append().fsfrint(dst, src1, size); } while (0)
-#define UML_FSFRFLT(block, dst, src1, size) do { using namespace uml; block->append().fsfrflt(dst, src1, size); } while (0)
-#define UML_FSADD(block, dst, src1, src2) do { using namespace uml; block->append().fsadd(dst, src1, src2); } while (0)
-#define UML_FSSUB(block, dst, src1, src2) do { using namespace uml; block->append().fssub(dst, src1, src2); } while (0)
-#define UML_FSCMP(block, src1, src2) do { using namespace uml; block->append().fscmp(src1, src2); } while (0)
-#define UML_FSMUL(block, dst, src1, src2) do { using namespace uml; block->append().fsmul(dst, src1, src2); } while (0)
-#define UML_FSDIV(block, dst, src1, src2) do { using namespace uml; block->append().fsdiv(dst, src1, src2); } while (0)
-#define UML_FSNEG(block, dst, src1) do { using namespace uml; block->append().fsneg(dst, src1); } while (0)
-#define UML_FSABS(block, dst, src1) do { using namespace uml; block->append().fsabs(dst, src1); } while (0)
-#define UML_FSSQRT(block, dst, src1) do { using namespace uml; block->append().fssqrt(dst, src1); } while (0)
-#define UML_FSRECIP(block, dst, src1) do { using namespace uml; block->append().fsrecip(dst, src1); } while (0)
-#define UML_FSRSQRT(block, dst, src1) do { using namespace uml; block->append().fsrsqrt(dst, src1); } while (0)
-#define UML_FSCOPYI(block, dst, src) do { using namespace uml; block->append().fscopyi(dst, src); } while (0)
-#define UML_ICOPYFS(block, dst, src) do { using namespace uml; block->append().icopyfs(dst, src); } while (0)
+#define UML_FSLOAD(block, dst, base, index) do { using namespace uml; block.append().fsload(dst, base, index); } while (0)
+#define UML_FSSTORE(block, base, index, src1) do { using namespace uml; block.append().fsstore(base, index, src1); } while (0)
+#define UML_FSREAD(block, dst, src1, space) do { using namespace uml; block.append().fsread(dst, src1, AS_##space); } while (0)
+#define UML_FSWRITE(block, dst, src1, space) do { using namespace uml; block.append().fswrite(dst, src1, AS_##space); } while (0)
+#define UML_FSMOV(block, dst, src1) do { using namespace uml; block.append().fsmov(dst, src1); } while (0)
+#define UML_FSMOVc(block, cond, dst, src1) do { using namespace uml; block.append().fsmov(cond, dst, src1); } while (0)
+#define UML_FSTOINT(block, dst, src1, size, round) do { using namespace uml; block.append().fstoint(dst, src1, size, round); } while (0)
+#define UML_FSFRINT(block, dst, src1, size) do { using namespace uml; block.append().fsfrint(dst, src1, size); } while (0)
+#define UML_FSFRFLT(block, dst, src1, size) do { using namespace uml; block.append().fsfrflt(dst, src1, size); } while (0)
+#define UML_FSADD(block, dst, src1, src2) do { using namespace uml; block.append().fsadd(dst, src1, src2); } while (0)
+#define UML_FSSUB(block, dst, src1, src2) do { using namespace uml; block.append().fssub(dst, src1, src2); } while (0)
+#define UML_FSCMP(block, src1, src2) do { using namespace uml; block.append().fscmp(src1, src2); } while (0)
+#define UML_FSMUL(block, dst, src1, src2) do { using namespace uml; block.append().fsmul(dst, src1, src2); } while (0)
+#define UML_FSDIV(block, dst, src1, src2) do { using namespace uml; block.append().fsdiv(dst, src1, src2); } while (0)
+#define UML_FSNEG(block, dst, src1) do { using namespace uml; block.append().fsneg(dst, src1); } while (0)
+#define UML_FSABS(block, dst, src1) do { using namespace uml; block.append().fsabs(dst, src1); } while (0)
+#define UML_FSSQRT(block, dst, src1) do { using namespace uml; block.append().fssqrt(dst, src1); } while (0)
+#define UML_FSRECIP(block, dst, src1) do { using namespace uml; block.append().fsrecip(dst, src1); } while (0)
+#define UML_FSRSQRT(block, dst, src1) do { using namespace uml; block.append().fsrsqrt(dst, src1); } while (0)
+#define UML_FSCOPYI(block, dst, src) do { using namespace uml; block.append().fscopyi(dst, src); } while (0)
+#define UML_ICOPYFS(block, dst, src) do { using namespace uml; block.append().icopyfs(dst, src); } while (0)
/* ----- 64-bit Floating Point Arithmetic Operations ----- */
-#define UML_FDLOAD(block, dst, base, index) do { using namespace uml; block->append().fdload(dst, base, index); } while (0)
-#define UML_FDSTORE(block, base, index, src1) do { using namespace uml; block->append().fdstore(base, index, src1); } while (0)
-#define UML_FDREAD(block, dst, src1, space) do { using namespace uml; block->append().fdread(dst, src1, AS_##space); } while (0)
-#define UML_FDWRITE(block, dst, src1, space) do { using namespace uml; block->append().fdwrite(dst, src1, AS_##space); } while (0)
-#define UML_FDMOV(block, dst, src1) do { using namespace uml; block->append().fdmov(dst, src1); } while (0)
-#define UML_FDMOVc(block, cond, dst, src1) do { using namespace uml; block->append().fdmov(cond, dst, src1); } while (0)
-#define UML_FDTOINT(block, dst, src1, size, round) do { using namespace uml; block->append().fdtoint(dst, src1, size, round); } while (0)
-#define UML_FDFRINT(block, dst, src1, size) do { using namespace uml; block->append().fdfrint(dst, src1, size); } while (0)
-#define UML_FDFRFLT(block, dst, src1, size) do { using namespace uml; block->append().fdfrflt(dst, src1, size); } while (0)
-#define UML_FDRNDS(block, dst, src1) do { using namespace uml; block->append().fdrnds(dst, src1); } while (0)
-#define UML_FDADD(block, dst, src1, src2) do { using namespace uml; block->append().fdadd(dst, src1, src2); } while (0)
-#define UML_FDSUB(block, dst, src1, src2) do { using namespace uml; block->append().fdsub(dst, src1, src2); } while (0)
-#define UML_FDCMP(block, src1, src2) do { using namespace uml; block->append().fdcmp(src1, src2); } while (0)
-#define UML_FDMUL(block, dst, src1, src2) do { using namespace uml; block->append().fdmul(dst, src1, src2); } while (0)
-#define UML_FDDIV(block, dst, src1, src2) do { using namespace uml; block->append().fddiv(dst, src1, src2); } while (0)
-#define UML_FDNEG(block, dst, src1) do { using namespace uml; block->append().fdneg(dst, src1); } while (0)
-#define UML_FDABS(block, dst, src1) do { using namespace uml; block->append().fdabs(dst, src1); } while (0)
-#define UML_FDSQRT(block, dst, src1) do { using namespace uml; block->append().fdsqrt(dst, src1); } while (0)
-#define UML_FDRECIP(block, dst, src1) do { using namespace uml; block->append().fdrecip(dst, src1); } while (0)
-#define UML_FDRSQRT(block, dst, src1) do { using namespace uml; block->append().fdrsqrt(dst, src1); } while (0)
-#define UML_FDCOPYI(block, dst, src) do { using namespace uml; block->append().fdcopyi(dst, src); } while (0)
-#define UML_ICOPYFD(block, dst, src) do { using namespace uml; block->append().icopyfd(dst, src); } while (0)
+#define UML_FDLOAD(block, dst, base, index) do { using namespace uml; block.append().fdload(dst, base, index); } while (0)
+#define UML_FDSTORE(block, base, index, src1) do { using namespace uml; block.append().fdstore(base, index, src1); } while (0)
+#define UML_FDREAD(block, dst, src1, space) do { using namespace uml; block.append().fdread(dst, src1, AS_##space); } while (0)
+#define UML_FDWRITE(block, dst, src1, space) do { using namespace uml; block.append().fdwrite(dst, src1, AS_##space); } while (0)
+#define UML_FDMOV(block, dst, src1) do { using namespace uml; block.append().fdmov(dst, src1); } while (0)
+#define UML_FDMOVc(block, cond, dst, src1) do { using namespace uml; block.append().fdmov(cond, dst, src1); } while (0)
+#define UML_FDTOINT(block, dst, src1, size, round) do { using namespace uml; block.append().fdtoint(dst, src1, size, round); } while (0)
+#define UML_FDFRINT(block, dst, src1, size) do { using namespace uml; block.append().fdfrint(dst, src1, size); } while (0)
+#define UML_FDFRFLT(block, dst, src1, size) do { using namespace uml; block.append().fdfrflt(dst, src1, size); } while (0)
+#define UML_FDRNDS(block, dst, src1) do { using namespace uml; block.append().fdrnds(dst, src1); } while (0)
+#define UML_FDADD(block, dst, src1, src2) do { using namespace uml; block.append().fdadd(dst, src1, src2); } while (0)
+#define UML_FDSUB(block, dst, src1, src2) do { using namespace uml; block.append().fdsub(dst, src1, src2); } while (0)
+#define UML_FDCMP(block, src1, src2) do { using namespace uml; block.append().fdcmp(src1, src2); } while (0)
+#define UML_FDMUL(block, dst, src1, src2) do { using namespace uml; block.append().fdmul(dst, src1, src2); } while (0)
+#define UML_FDDIV(block, dst, src1, src2) do { using namespace uml; block.append().fddiv(dst, src1, src2); } while (0)
+#define UML_FDNEG(block, dst, src1) do { using namespace uml; block.append().fdneg(dst, src1); } while (0)
+#define UML_FDABS(block, dst, src1) do { using namespace uml; block.append().fdabs(dst, src1); } while (0)
+#define UML_FDSQRT(block, dst, src1) do { using namespace uml; block.append().fdsqrt(dst, src1); } while (0)
+#define UML_FDRECIP(block, dst, src1) do { using namespace uml; block.append().fdrecip(dst, src1); } while (0)
+#define UML_FDRSQRT(block, dst, src1) do { using namespace uml; block.append().fdrsqrt(dst, src1); } while (0)
+#define UML_FDCOPYI(block, dst, src) do { using namespace uml; block.append().fdcopyi(dst, src); } while (0)
+#define UML_ICOPYFD(block, dst, src) do { using namespace uml; block.append().icopyfd(dst, src); } while (0)
#endif // MAME_CPU_DRCUMLSH_H
diff --git a/src/devices/cpu/dsp16/dsp16.cpp b/src/devices/cpu/dsp16/dsp16.cpp
index 2026cf5d80e..21cddebbf0a 100644
--- a/src/devices/cpu/dsp16/dsp16.cpp
+++ b/src/devices/cpu/dsp16/dsp16.cpp
@@ -608,9 +608,9 @@ void dsp16_device_base::state_string_export(device_state_entry const &entry, std
device_disasm_interface implementation
***********************************************************************/
-util::disasm_interface *dsp16_device_base::create_disassembler()
+std::unique_ptr<util::disasm_interface> dsp16_device_base::create_disassembler()
{
- return new dsp16_disassembler(*this);
+ return std::make_unique<dsp16_disassembler>(static_cast<dsp16_disassembler::cpu const &>(*this));
}
/***********************************************************************
diff --git a/src/devices/cpu/dsp16/dsp16.h b/src/devices/cpu/dsp16/dsp16.h
index 5e15b42e7f8..49ec622d392 100644
--- a/src/devices/cpu/dsp16/dsp16.h
+++ b/src/devices/cpu/dsp16/dsp16.h
@@ -146,7 +146,7 @@ protected:
virtual void state_string_export(device_state_entry const &entry, std::string &str) const override;
// device_disasm_interface implementation
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// dsp16_disassembler::cpu implementation
virtual predicate check_con(offs_t pc, u16 op) const override;
diff --git a/src/devices/cpu/dsp32/dsp32.cpp b/src/devices/cpu/dsp32/dsp32.cpp
index d8007e27378..f8749290604 100644
--- a/src/devices/cpu/dsp32/dsp32.cpp
+++ b/src/devices/cpu/dsp32/dsp32.cpp
@@ -402,9 +402,9 @@ void dsp32c_device::state_string_export(const device_state_entry &entry, std::st
// helper function
//-------------------------------------------------
-util::disasm_interface *dsp32c_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> dsp32c_device::create_disassembler()
{
- return new dsp32c_disassembler;
+ return std::make_unique<dsp32c_disassembler>();
}
diff --git a/src/devices/cpu/dsp32/dsp32.h b/src/devices/cpu/dsp32/dsp32.h
index 1a091fb1c95..5596714f03f 100644
--- a/src/devices/cpu/dsp32/dsp32.h
+++ b/src/devices/cpu/dsp32/dsp32.h
@@ -126,7 +126,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// memory accessors
uint32_t ROPCODE(offs_t pc);
diff --git a/src/devices/cpu/dsp56k/dsp56k.cpp b/src/devices/cpu/dsp56k/dsp56k.cpp
index 368ca9cc076..6276bd5f586 100644
--- a/src/devices/cpu/dsp56k/dsp56k.cpp
+++ b/src/devices/cpu/dsp56k/dsp56k.cpp
@@ -504,9 +504,9 @@ void dsp56k_device::execute_run()
}
-util::disasm_interface *dsp56k_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> dsp56k_device::create_disassembler()
{
- return new dsp56k_disassembler;
+ return std::make_unique<dsp56k_disassembler>();
}
} // namespace DSP56K
diff --git a/src/devices/cpu/dsp56k/dsp56k.h b/src/devices/cpu/dsp56k/dsp56k.h
index f36a8481d81..ea8e5f8c281 100644
--- a/src/devices/cpu/dsp56k/dsp56k.h
+++ b/src/devices/cpu/dsp56k/dsp56k.h
@@ -237,7 +237,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/e0c6200/e0c6200.cpp b/src/devices/cpu/e0c6200/e0c6200.cpp
index 4deadeb6bff..8b890d1c41b 100644
--- a/src/devices/cpu/e0c6200/e0c6200.cpp
+++ b/src/devices/cpu/e0c6200/e0c6200.cpp
@@ -50,9 +50,9 @@ void e0c6200_cpu_device::state_string_export(const device_state_entry &entry, st
}
}
-util::disasm_interface *e0c6200_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> e0c6200_cpu_device::create_disassembler()
{
- return new e0c6200_disassembler;
+ return std::make_unique<e0c6200_disassembler>();
}
diff --git a/src/devices/cpu/e0c6200/e0c6200.h b/src/devices/cpu/e0c6200/e0c6200.h
index 9328aed7cf1..a51f9aaf1fe 100644
--- a/src/devices/cpu/e0c6200/e0c6200.h
+++ b/src/devices/cpu/e0c6200/e0c6200.h
@@ -34,7 +34,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp
index 3f107c664f0..9f7222b5dfb 100644
--- a/src/devices/cpu/e132xs/e132xs.cpp
+++ b/src/devices/cpu/e132xs/e132xs.cpp
@@ -1510,9 +1510,9 @@ void hyperstone_device::state_string_export(const device_state_entry &entry, std
// helper function
//-------------------------------------------------
-util::disasm_interface *hyperstone_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hyperstone_device::create_disassembler()
{
- return new hyperstone_disassembler(this);
+ return std::make_unique<hyperstone_disassembler>(this);
}
u8 hyperstone_device::get_fp() const
diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h
index 876679bc581..f04431c62c8 100644
--- a/src/devices/cpu/e132xs/e132xs.h
+++ b/src/devices/cpu/e132xs/e132xs.h
@@ -292,7 +292,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual u8 get_fp() const override;
virtual bool get_h() const override;
@@ -456,6 +456,9 @@ private:
/* internal compiler state */
struct compiler_state
{
+ compiler_state(compiler_state const &) = delete;
+ compiler_state &operator=(compiler_state const &) = delete;
+
uint32_t m_cycles; /* accumulated cycles */
uint8_t m_checkints; /* need to check interrupts before next instruction */
uml::code_label m_labelnum; /* index for local labels */
@@ -465,117 +468,117 @@ private:
void flush_drc_cache();
void code_flush_cache();
void code_compile_block(offs_t pc);
- //void load_fast_iregs(drcuml_block *block);
- //void save_fast_iregs(drcuml_block *block);
+ //void load_fast_iregs(drcuml_block &block);
+ //void save_fast_iregs(drcuml_block &block);
void static_generate_entry_point();
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_exception(uint32_t exception, const char *name);
void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr);
void static_generate_interrupt_checks();
- void generate_interrupt_checks_no_timer(drcuml_block *block, uml::code_label &labelnum);
- void generate_interrupt_checks_with_timer(drcuml_block *block, uml::code_label &labelnum);
- void generate_branch(drcuml_block *block, uml::parameter targetpc, bool update_cycles = true);
- void generate_update_cycles(drcuml_block *block, bool check_interrupts = true);
- void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- void generate_get_trap_addr(drcuml_block *block, uml::code_label &label, uint32_t trapno);
- void generate_check_delay_pc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_ignore_immediate_s(drcuml_block *block, const opcode_desc *desc);
- void generate_decode_pcrel(drcuml_block *block, const opcode_desc *desc);
- void generate_ignore_pcrel(drcuml_block *block, const opcode_desc *desc);
-
- void generate_get_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- template <trap_exception_or_int TYPE> void generate_trap_exception_or_int(drcuml_block *block);
- void generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr);
- void generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr);
- void generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <shift_type HI_N> void generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <shift_type HI_N> void generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <shift_type HI_N> void generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- template <reg_bank SRC_GLOBAL> void generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- template <reg_bank SRC_GLOBAL> void generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- template <branch_condition CONDITION, condition_set COND_SET> void generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <branch_condition CONDITION, condition_set COND_SET> void generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- void generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- template <hyperstone_device::reg_bank SRC_GLOBAL> void generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- void generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- void generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
+ void generate_interrupt_checks_no_timer(drcuml_block &block, uml::code_label &labelnum);
+ void generate_interrupt_checks_with_timer(drcuml_block &block, uml::code_label &labelnum);
+ void generate_branch(drcuml_block &block, uml::parameter targetpc, bool update_cycles = true);
+ void generate_update_cycles(drcuml_block &block, bool check_interrupts = true);
+ void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
+ bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ void generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uint32_t trapno);
+ void generate_check_delay_pc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_decode_const(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_decode_immediate_s(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_ignore_immediate_s(drcuml_block &block, const opcode_desc *desc);
+ void generate_decode_pcrel(drcuml_block &block, const opcode_desc *desc);
+ void generate_ignore_pcrel(drcuml_block &block, const opcode_desc *desc);
+
+ void generate_get_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_set_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ template <trap_exception_or_int TYPE> void generate_trap_exception_or_int(drcuml_block &block);
+ void generate_int(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr);
+ void generate_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr);
+ void generate_software(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_chk(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_movd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_divsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mask(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sum(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sums(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mov(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_add(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmpb(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_addc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_neg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_and(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_andn(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_or(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xor(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_not(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_movi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addsi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpbi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_andni(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_ori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_xori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HI_N> void generate_shrdi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_shrd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_shr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shri(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HI_N> void generate_sardi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_sard(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_sar(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_sari(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HI_N> void generate_shldi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_shld(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_shl(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shli(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_testlz(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_rol(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_mulsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_set(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ template <reg_bank SRC_GLOBAL> void generate_ldwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SRC_GLOBAL> void generate_lddr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SRC_GLOBAL> void generate_ldwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SRC_GLOBAL> void generate_lddp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ template <reg_bank SRC_GLOBAL> void generate_stwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SRC_GLOBAL> void generate_stdr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SRC_GLOBAL> void generate_stwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SRC_GLOBAL> void generate_stdp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ template <branch_condition CONDITION, condition_set COND_SET> void generate_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_br(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <branch_condition CONDITION, condition_set COND_SET> void generate_db(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_dbr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ void generate_frame(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <hyperstone_device::reg_bank SRC_GLOBAL> void generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ void generate_trap_op(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_extend(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ void generate_reserved(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_do(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
};
// device type definition
diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp
index 81bfe7505c5..98daaa45817 100644
--- a/src/devices/cpu/e132xs/e132xsdrc.cpp
+++ b/src/devices/cpu/e132xs/e132xsdrc.cpp
@@ -11,7 +11,6 @@
void hyperstone_device::execute_run_drc()
{
- drcuml_state *drcuml = m_drcuml.get();
int execute_result;
/* reset the cache if dirty */
@@ -26,7 +25,7 @@ void hyperstone_device::execute_run_drc()
do
{
/* run as much as we can */
- execute_result = drcuml->execute(*m_entry);
+ execute_result = m_drcuml->execute(*m_entry);
/* if we need to recompile, do it */
if (execute_result == EXECUTE_MISSING_CODE)
@@ -192,7 +191,7 @@ void hyperstone_device::code_flush_cache()
}
/* Return the entry point for a determinated trap */
-void hyperstone_device::generate_get_trap_addr(drcuml_block *block, uml::code_label &label, uint32_t trapno)
+void hyperstone_device::generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uint32_t trapno)
{
int no_subtract;
UML_MOV(block, I0, trapno);
@@ -212,11 +211,9 @@ void hyperstone_device::generate_get_trap_addr(drcuml_block *block, uml::code_la
void hyperstone_device::code_compile_block(offs_t pc)
{
- drcuml_state *drcuml = m_drcuml.get();
compiler_state compiler = { 0 };
const opcode_desc *seqhead, *seqlast;
bool override = false;
- drcuml_block *block;
g_profiler.start(PROFILER_DRC_COMPILE);
@@ -229,7 +226,7 @@ void hyperstone_device::code_compile_block(offs_t pc)
try
{
/* start the block */
- block = drcuml->begin_block(8192);
+ drcuml_block &block(m_drcuml->begin_block(8192));
/* loop until we get through all instruction sequences */
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
@@ -238,8 +235,8 @@ void hyperstone_device::code_compile_block(offs_t pc)
uint32_t nextpc;
/* add a code log entry */
- if (drcuml->logging())
- block->append_comment("-------------------------");
+ if (m_drcuml->logging())
+ block.append_comment("-------------------------");
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next())
@@ -248,7 +245,7 @@ void hyperstone_device::code_compile_block(offs_t pc)
assert(seqlast != nullptr);
/* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
- if (override || !drcuml->hash_exists(0, seqhead->pc))
+ if (override || !m_drcuml->hash_exists(0, seqhead->pc))
UML_HASH(block, 0, seqhead->pc);
/* if we already have a hash, and this is the first sequence, assume that we */
@@ -269,7 +266,7 @@ void hyperstone_device::code_compile_block(offs_t pc)
/* validate this code block if we're not pointing into ROM */
if (m_program->get_write_ptr(seqhead->physpc) != nullptr)
- generate_checksum_block(block, &compiler, seqhead, seqlast);
+ generate_checksum_block(block, compiler, seqhead, seqlast);
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
@@ -281,7 +278,7 @@ void hyperstone_device::code_compile_block(offs_t pc)
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
{
- generate_sequence_instruction(block, &compiler, curdesc);
+ generate_sequence_instruction(block, compiler, curdesc);
generate_update_cycles(block);
}
@@ -298,7 +295,7 @@ void hyperstone_device::code_compile_block(offs_t pc)
}
/* end the sequence */
- block->end();
+ block.end();
g_profiler.stop();
succeeded = true;
}
@@ -329,10 +326,10 @@ static inline uint32_t epc(const opcode_desc *desc)
already allocated
-------------------------------------------------*/
-static inline void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name)
+static inline void alloc_handle(drcuml_state &drcuml, uml::code_handle *&handleptr, const char *name)
{
- if (*handleptr == nullptr)
- *handleptr = drcuml->handle_alloc(name);
+ if (!handleptr)
+ handleptr = drcuml.handle_alloc(name);
}
@@ -345,11 +342,10 @@ static inline void alloc_handle(drcuml_state *drcuml, uml::code_handle **handlep
void hyperstone_device::static_generate_exception(uint32_t exception, const char *name)
{
uml::code_handle *&exception_handle = m_exception[exception];
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block = drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, &exception_handle, name);
+ alloc_handle(*m_drcuml, exception_handle, name);
UML_HANDLE(block, *exception_handle);
uml::code_label label = 1;
@@ -382,20 +378,17 @@ void hyperstone_device::static_generate_exception(uint32_t exception, const char
UML_HASHJMP(block, 0, I0, *m_nocode);// hashjmp <mode>,i0,nocode
- block->end();
+ block.end();
}
void hyperstone_device::static_generate_interrupt_checks()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(512);
+ drcuml_block &block(m_drcuml->begin_block(512));
- alloc_handle(drcuml, &m_interrupt_checks, "int_checks");
+ alloc_handle(*m_drcuml, m_interrupt_checks, "int_checks");
UML_HANDLE(block, *m_interrupt_checks);
uml::code_label labelnum = 1;
@@ -427,7 +420,7 @@ void hyperstone_device::static_generate_interrupt_checks()
UML_LABEL(block, done_int);
UML_RET(block);
- block->end();
+ block.end();
}
/*-------------------------------------------------
@@ -437,16 +430,13 @@ void hyperstone_device::static_generate_interrupt_checks()
void hyperstone_device::static_generate_entry_point()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(20);
+ drcuml_block &block(m_drcuml->begin_block(20));
/* forward references */
- alloc_handle(drcuml, &m_nocode, "nocode");
+ alloc_handle(*m_drcuml, m_nocode, "nocode");
- alloc_handle(drcuml, &m_entry, "entry");
+ alloc_handle(*m_drcuml, m_entry, "entry");
UML_HANDLE(block, *m_entry);
/* load fast integer registers */
@@ -454,7 +444,7 @@ void hyperstone_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, 0, mem(&m_core->global_regs[0]), *m_nocode);
- block->end();
+ block.end();
}
@@ -465,14 +455,11 @@ void hyperstone_device::static_generate_entry_point()
void hyperstone_device::static_generate_nocode_handler()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_nocode, "nocode");
+ alloc_handle(*m_drcuml, m_nocode, "nocode");
UML_HANDLE(block, *m_nocode);
UML_GETEXP(block, I0);
@@ -480,7 +467,7 @@ void hyperstone_device::static_generate_nocode_handler()
//save_fast_iregs(block);
UML_EXIT(block, EXECUTE_MISSING_CODE);
- block->end();
+ block.end();
}
@@ -491,19 +478,16 @@ void hyperstone_device::static_generate_nocode_handler()
void hyperstone_device::static_generate_out_of_cycles()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_out_of_cycles, "out_of_cycles");
+ alloc_handle(*m_drcuml, m_out_of_cycles, "out_of_cycles");
UML_HANDLE(block, *m_out_of_cycles);
//save_fast_iregs(block);
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES);
- block->end();
+ block.end();
}
/*------------------------------------------------------------------
@@ -515,14 +499,12 @@ void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, b
/* on entry, address is in I0; data for writes is in I1 */
/* on exit, read result is in I1 */
/* routine trashes I0-I1 */
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
/* begin generating */
- block = drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, &handleptr, name);
+ alloc_handle(*m_drcuml, handleptr, name);
UML_HANDLE(block, *handleptr);
// write:
@@ -551,7 +533,7 @@ void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, b
}
UML_RET(block);
- block->end();
+ block.end();
}
@@ -560,7 +542,7 @@ void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, b
CODE GENERATION
***************************************************************************/
-void hyperstone_device::generate_interrupt_checks_no_timer(drcuml_block *block, uml::code_label &labelnum)
+void hyperstone_device::generate_interrupt_checks_no_timer(drcuml_block &block, uml::code_label &labelnum)
{
int skip_io3 = labelnum++;
UML_TEST(block, I0, 0x40);
@@ -643,7 +625,7 @@ void hyperstone_device::generate_interrupt_checks_no_timer(drcuml_block *block,
UML_LABEL(block, skip_io2);
}
-void hyperstone_device::generate_interrupt_checks_with_timer(drcuml_block *block, uml::code_label &labelnum)
+void hyperstone_device::generate_interrupt_checks_with_timer(drcuml_block &block, uml::code_label &labelnum)
{
int skip_io3 = labelnum++;
UML_TEST(block, I0, 0x40);
@@ -764,7 +746,7 @@ void hyperstone_device::generate_interrupt_checks_with_timer(drcuml_block *block
an exception if out
-------------------------------------------------*/
-void hyperstone_device::generate_update_cycles(drcuml_block *block, bool check_interrupts)
+void hyperstone_device::generate_update_cycles(drcuml_block &block, bool check_interrupts)
{
if (check_interrupts)
{
@@ -790,12 +772,12 @@ void hyperstone_device::generate_update_cycles(drcuml_block *block, bool check_i
validate a sequence of opcodes
-------------------------------------------------*/
-void hyperstone_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
+void hyperstone_device::generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
{
const opcode_desc *curdesc;
if (m_drcuml->logging())
{
- block->append_comment("[Validation for %08X]", seqhead->pc);
+ block.append_comment("[Validation for %08X]", seqhead->pc);
}
/* loose verify or single instruction: just compare and fail */
if (!(m_drcoptions & E132XS_STRICT_VERIFY) || seqhead->next() == nullptr)
@@ -870,11 +852,11 @@ void hyperstone_device::generate_checksum_block(drcuml_block *block, compiler_st
including disassembly of a MIPS instruction
-------------------------------------------------*/
-void hyperstone_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
+void hyperstone_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op)
{
if (m_drcuml->logging())
{
- block->append_comment("%08X: %08x", pc, op);
+ block.append_comment("%08X: %08x", pc, op);
}
}
@@ -883,7 +865,7 @@ void hyperstone_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc,
generate_branch
------------------------------------------------------------------*/
-void hyperstone_device::generate_branch(drcuml_block *block, uml::parameter targetpc, bool update_cycles)
+void hyperstone_device::generate_branch(drcuml_block &block, uml::parameter targetpc, bool update_cycles)
{
if (update_cycles)
generate_update_cycles(block);
@@ -905,7 +887,7 @@ void hyperstone_device::generate_branch(drcuml_block *block, uml::parameter targ
for a single instruction in a sequence
-------------------------------------------------*/
-void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
offs_t expc;
@@ -944,7 +926,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block *block, compi
#include "e132xsdrc_ops.hxx"
-bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool hyperstone_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = (uint32_t)desc->opptr.w[0];
@@ -1211,7 +1193,7 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com
case 0xff: generate_trap_op(block, compiler, desc); break;
}
- int no_delay_taken = compiler->m_labelnum++;
+ int no_delay_taken = compiler.m_labelnum++;
UML_TEST(block, mem(&m_core->delay_slot_taken), ~0);
UML_JMPc(block, uml::COND_Z, no_delay_taken);
UML_MOV(block, mem(&m_core->delay_slot_taken), 0);
@@ -1222,7 +1204,7 @@ bool hyperstone_device::generate_opcode(drcuml_block *block, compiler_state *com
int done;
UML_AND(block, I0, DRC_SR, (T_MASK | P_MASK));
UML_CMP(block, I0, (T_MASK | P_MASK));
- UML_JMPc(block, uml::COND_NE, done = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_NE, done = compiler.m_labelnum++);
UML_TEST(block, mem(&m_core->delay_slot), 1);
UML_EXHc(block, uml::COND_E, *m_exception[EXCEPTION_TRACE], 0);
diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
index c35a129f369..01ba2347b4d 100644
--- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
+++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
@@ -5,7 +5,7 @@
constexpr uint32_t WRITE_ONLY_REGMASK = (1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER);
-void hyperstone_device::generate_check_delay_pc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_check_delay_pc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
/* if PC is used in a delay instruction, the delayed PC should be used */
UML_TEST(block, mem(&m_core->delay_slot), 1);
@@ -14,7 +14,7 @@ void hyperstone_device::generate_check_delay_pc(drcuml_block *block, compiler_st
UML_SETc(block, uml::COND_NZ, mem(&m_core->delay_slot_taken));
}
-void hyperstone_device::generate_decode_const(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_decode_const(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t imm_1 = READ_OP(desc->pc + 2);
@@ -45,7 +45,7 @@ void hyperstone_device::generate_decode_const(drcuml_block *block, compiler_stat
}
}
-void hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_decode_immediate_s(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint16_t op = desc->opptr.w[0];
@@ -84,7 +84,7 @@ void hyperstone_device::generate_decode_immediate_s(drcuml_block *block, compile
}
}
-void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, const opcode_desc *desc)
+void hyperstone_device::generate_ignore_immediate_s(drcuml_block &block, const opcode_desc *desc)
{
uint16_t op = desc->opptr.w[0];
@@ -96,7 +96,7 @@ void hyperstone_device::generate_ignore_immediate_s(drcuml_block *block, const o
UML_ADD(block, DRC_PC, DRC_PC, offsets[nybble]);
}
-void hyperstone_device::generate_decode_pcrel(drcuml_block *block, const opcode_desc *desc)
+void hyperstone_device::generate_decode_pcrel(drcuml_block &block, const opcode_desc *desc)
{
uint16_t op = desc->opptr.w[0];
@@ -125,7 +125,7 @@ void hyperstone_device::generate_decode_pcrel(drcuml_block *block, const opcode_
UML_MOV(block, I1, offset);
}
-void hyperstone_device::generate_ignore_pcrel(drcuml_block *block, const opcode_desc *desc)
+void hyperstone_device::generate_ignore_pcrel(drcuml_block &block, const opcode_desc *desc)
{
uint16_t op = desc->opptr.w[0];
@@ -136,19 +136,19 @@ void hyperstone_device::generate_ignore_pcrel(drcuml_block *block, const opcode_
}
}
-void hyperstone_device::generate_set_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_set_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
// Expects register index in I4, value in I5, clobbers I6
int extended;
UML_CMP(block, I4, 16);
- UML_JMPc(block, uml::COND_AE, extended = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_AE, extended = compiler.m_labelnum++);
int generic_store, set_sr, done;
UML_CMP(block, I4, 1);
- UML_JMPc(block, uml::COND_A, generic_store = compiler->m_labelnum++);
- UML_JMPc(block, uml::COND_E, set_sr = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_A, generic_store = compiler.m_labelnum++);
+ UML_JMPc(block, uml::COND_E, set_sr = compiler.m_labelnum++);
UML_AND(block, DRC_PC, I5, ~1);
- UML_JMP(block, done = compiler->m_labelnum++);
+ UML_JMP(block, done = compiler.m_labelnum++);
UML_LABEL(block, set_sr);
UML_ROLINS(block, DRC_SR, I5, 0, 0x0000ffff);
@@ -168,7 +168,7 @@ void hyperstone_device::generate_set_global_register(drcuml_block *block, compil
UML_CMP(block, I4, 17);
UML_JMPc(block, uml::COND_BE, generic_store);
UML_CMP(block, I4, BCR_REGISTER);
- UML_JMPc(block, uml::COND_A, above_bcr = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_A, above_bcr = compiler.m_labelnum++);
UML_JMPc(block, uml::COND_E, generic_store);
// SP or UB
@@ -178,16 +178,16 @@ void hyperstone_device::generate_set_global_register(drcuml_block *block, compil
int set_tpr, set_tcr, set_tr, set_fcr;
UML_LABEL(block, above_bcr);
UML_CMP(block, I4, TCR_REGISTER);
- UML_JMPc(block, uml::COND_B, set_tpr = compiler->m_labelnum++);
- UML_JMPc(block, uml::COND_E, set_tcr = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_B, set_tpr = compiler.m_labelnum++);
+ UML_JMPc(block, uml::COND_E, set_tcr = compiler.m_labelnum++);
// Above TCR
UML_CMP(block, I4, WCR_REGISTER);
- UML_JMPc(block, uml::COND_B, set_tr = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_B, set_tr = compiler.m_labelnum++);
UML_JMPc(block, uml::COND_E, generic_store); // WCR
// Above WCR
UML_CMP(block, I4, FCR_REGISTER);
UML_JMPc(block, uml::COND_B, done); // ISR - read only
- UML_JMPc(block, uml::COND_E, set_fcr = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_E, set_fcr = compiler.m_labelnum++);
UML_CMP(block, I4, MCR_REGISTER);
UML_JMPc(block, uml::COND_A, generic_store); // regs 28..31
// Set MCR
@@ -200,7 +200,7 @@ void hyperstone_device::generate_set_global_register(drcuml_block *block, compil
UML_LABEL(block, set_tpr);
UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4);
UML_TEST(block, I5, 0x80000000);
- UML_JMPc(block, uml::COND_NZ, skip_compute_tr = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_NZ, skip_compute_tr = compiler.m_labelnum++);
UML_CALLC(block, cfunc_compute_tr, this);
UML_CALLC(block, cfunc_update_timer_prescale, this);
UML_LABEL(block, skip_compute_tr);
@@ -230,7 +230,7 @@ void hyperstone_device::generate_set_global_register(drcuml_block *block, compil
UML_LOAD(block, I6, (void *)m_core->global_regs, I4, SIZE_DWORD, SCALE_x4);
UML_XOR(block, I6, I6, I5);
UML_TEST(block, I6, 0x80000000);
- UML_JMPc(block, uml::COND_Z, skip_adjust_timer = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_Z, skip_adjust_timer = compiler.m_labelnum++);
UML_CALLC(block, cfunc_adjust_timer_interrupt, this);
UML_LABEL(block, skip_adjust_timer);
UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4);
@@ -242,7 +242,7 @@ void hyperstone_device::generate_set_global_register(drcuml_block *block, compil
}
template <hyperstone_device::trap_exception_or_int TYPE>
-void hyperstone_device::generate_trap_exception_or_int(drcuml_block *block)
+void hyperstone_device::generate_trap_exception_or_int(drcuml_block &block)
{
UML_ADD(block, I7, I7, mem(&m_core->clock_cycles_2));
@@ -278,21 +278,21 @@ void hyperstone_device::generate_trap_exception_or_int(drcuml_block *block)
generate_branch(block, DRC_PC, true);
}
-void hyperstone_device::generate_int(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr)
+void hyperstone_device::generate_int(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr)
{
printf("Unimplemented: generate_int (%08x)\n", desc->pc);
fflush(stdout);
fatalerror(" ");
}
-void hyperstone_device::generate_exception(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t addr)
+void hyperstone_device::generate_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr)
{
printf("Unimplemented: generate_exception (%08x)\n", desc->pc);
fflush(stdout);
fatalerror(" ");
}
-void hyperstone_device::generate_software(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_software(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_6));
@@ -316,8 +316,8 @@ void hyperstone_device::generate_software(drcuml_block *block, compiler_state *c
UML_ROLINS(block, DRC_SR, 1, 19, 0x00180000);
uint32_t num = op >> 8;
- int mem3 = compiler->m_labelnum++;
- int have_code_addr = compiler->m_labelnum++;
+ int mem3 = compiler.m_labelnum++;
+ int have_code_addr = compiler.m_labelnum++;
UML_MOV(block, I4, mem(&m_core->trap_entry));
UML_CMP(block, I4, 0xffffff00);
UML_JMPc(block, uml::COND_E, mem3);
@@ -373,7 +373,7 @@ void hyperstone_device::generate_software(drcuml_block *block, compiler_state *c
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_chk(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_chk(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -428,7 +428,7 @@ void hyperstone_device::generate_chk(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_movd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -480,7 +480,7 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi
UML_AND(block, I2, DRC_SR, (S_MASK | L_MASK));
UML_AND(block, I3, I1, I2);
UML_TEST(block, I3, S_MASK);
- UML_JMPc(block, uml::COND_NZ, no_exception = compiler->m_labelnum++); // If S is set and unchanged, there won't be an exception.
+ UML_JMPc(block, uml::COND_NZ, no_exception = compiler.m_labelnum++); // If S is set and unchanged, there won't be an exception.
UML_XOR(block, I3, I1, I2);
UML_AND(block, I4, I3, I2);
@@ -501,15 +501,15 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi
UML_ROLAND(block, I2, DRC_SR, 7, 0x7f);
UML_SUB(block, I3, I2, I1);
UML_CMP(block, I3, -64);
- UML_JMPc(block, uml::COND_L, done_ret = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_L, done_ret = compiler.m_labelnum++);
UML_CMP(block, I3, 64);
- UML_JMPc(block, uml::COND_L, diff_in_range = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_L, diff_in_range = compiler.m_labelnum++);
UML_OR(block, I3, I3, 0x80);
UML_SEXT(block, I3, I3, SIZE_BYTE);
UML_LABEL(block, diff_in_range);
int pop_next;
- UML_LABEL(block, pop_next = compiler->m_labelnum++);
+ UML_LABEL(block, pop_next = compiler.m_labelnum++);
UML_CMP(block, I3, 0);
UML_JMPc(block, uml::COND_GE, done_ret);
UML_SUB(block, I0, I0, 4);
@@ -609,7 +609,7 @@ void hyperstone_device::generate_movd(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL, hyperstone_device::sign_mode SIGNED>
-void hyperstone_device::generate_divsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_36));
@@ -663,8 +663,8 @@ void hyperstone_device::generate_divsu(drcuml_block *block, compiler_state *comp
UML_DSHL(block, I1, I1, 32);
UML_DOR(block, I1, I1, I2);
- int no_result = compiler->m_labelnum++;
- int done = compiler->m_labelnum++;
+ int no_result = compiler.m_labelnum++;
+ int done = compiler.m_labelnum++;
UML_TEST(block, I0, ~0);
UML_JMPc(block, uml::COND_Z, no_result);
if (SIGNED)
@@ -707,7 +707,7 @@ void hyperstone_device::generate_divsu(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_xm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -763,15 +763,15 @@ void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compile
int skip, done;
if (SRC_GLOBAL && (src_code == PC_REGISTER))
{
- UML_JMPc(block, uml::COND_B, skip = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_B, skip = compiler.m_labelnum++);
UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0);
- UML_JMP(block, done = compiler->m_labelnum++);
+ UML_JMP(block, done = compiler.m_labelnum++);
}
else
{
- UML_JMPc(block, uml::COND_BE, skip = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_BE, skip = compiler.m_labelnum++);
UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0);
- UML_JMP(block, done = compiler->m_labelnum++);
+ UML_JMP(block, done = compiler.m_labelnum++);
}
UML_LABEL(block, skip);
@@ -798,7 +798,7 @@ void hyperstone_device::generate_xm(drcuml_block *block, compiler_state *compile
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_mask(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -828,7 +828,7 @@ void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compi
int skip_mask;
UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK);
UML_TEST(block, I1, ~0);
- UML_JMPc(block, uml::COND_NZ, skip_mask = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_NZ, skip_mask = compiler.m_labelnum++);
UML_OR(block, DRC_SR, DRC_SR, Z_MASK);
UML_LABEL(block, skip_mask);
@@ -857,7 +857,7 @@ void hyperstone_device::generate_mask(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -932,7 +932,7 @@ void hyperstone_device::generate_sum(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_sums(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_sums(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
printf("Unimplemented: generate_sums (%08x)\n", desc->pc);
fflush(stdout);
@@ -941,7 +941,7 @@ void hyperstone_device::generate_sums(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_cmp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1006,13 +1006,13 @@ void hyperstone_device::generate_cmp(drcuml_block *block, compiler_state *compil
UML_ROLINS(block, DRC_SR, I3, 0, (V_MASK | N_MASK | Z_MASK | C_MASK));
}
-void hyperstone_device::generate_get_global_register(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_get_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
- int regular_load = compiler->m_labelnum++;
- int done = compiler->m_labelnum++;
+ int regular_load = compiler.m_labelnum++;
+ int done = compiler.m_labelnum++;
UML_TEST(block, DRC_SR, H_MASK);
UML_MOVc(block, uml::COND_NZ, I1, 16 + src_code);
UML_MOVc(block, uml::COND_Z, I1, src_code);
@@ -1039,7 +1039,7 @@ void hyperstone_device::generate_get_global_register(drcuml_block *block, compil
}
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_mov(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1053,7 +1053,7 @@ void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compil
{
int no_exception;
UML_TEST(block, DRC_SR, H_MASK);
- UML_JMPc(block, uml::COND_Z, no_exception = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_Z, no_exception = compiler.m_labelnum++);
UML_TEST(block, DRC_SR, S_MASK);
UML_JMPc(block, uml::COND_NZ, no_exception);
UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0);
@@ -1080,7 +1080,7 @@ void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compil
UML_ROLINS(block, DRC_SR, I2, Z_SHIFT, Z_MASK);
UML_ROLINS(block, DRC_SR, I5, 3, N_MASK);
- int done = compiler->m_labelnum++;
+ int done = compiler.m_labelnum++;
if (DST_GLOBAL)
{
UML_TEST(block, DRC_SR, H_MASK);
@@ -1106,7 +1106,7 @@ void hyperstone_device::generate_mov(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_add(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1186,7 +1186,7 @@ void hyperstone_device::generate_add(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_adds(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
printf("Unimplemented: generate_adds (%08x)\n", desc->pc);
fflush(stdout);
@@ -1195,7 +1195,7 @@ void hyperstone_device::generate_adds(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_cmpb(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_cmpb(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1237,7 +1237,7 @@ void hyperstone_device::generate_cmpb(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_subc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1335,7 +1335,7 @@ void hyperstone_device::generate_subc(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_sub(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_sub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1427,7 +1427,7 @@ void hyperstone_device::generate_sub(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_subs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_subs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1506,7 +1506,7 @@ void hyperstone_device::generate_subs(drcuml_block *block, compiler_state *compi
UML_STORE(block, (void *)m_core->local_regs, I5, I2, SIZE_DWORD, SCALE_x4);
}
- int no_exception = compiler->m_labelnum++;
+ int no_exception = compiler.m_labelnum++;
UML_TEST(block, DRC_SR, V_MASK);
UML_JMPc(block, uml::COND_Z, no_exception);
generate_trap_exception_or_int<IS_EXCEPTION>(block);
@@ -1515,7 +1515,7 @@ void hyperstone_device::generate_subs(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_addc(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1614,7 +1614,7 @@ void hyperstone_device::generate_addc(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_neg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_neg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1680,7 +1680,7 @@ void hyperstone_device::generate_neg(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_negs(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
printf("Unimplemented: generate_negs (%08x)\n", desc->pc);
fflush(stdout);
@@ -1689,7 +1689,7 @@ void hyperstone_device::generate_negs(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_and(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_and(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1752,7 +1752,7 @@ void hyperstone_device::generate_and(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_andn(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_andn(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1816,7 +1816,7 @@ void hyperstone_device::generate_andn(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_or(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_or(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1879,7 +1879,7 @@ void hyperstone_device::generate_or(drcuml_block *block, compiler_state *compile
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_xor(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_xor(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1942,7 +1942,7 @@ void hyperstone_device::generate_xor(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_not(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_not(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -1994,7 +1994,7 @@ void hyperstone_device::generate_not(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
-void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2038,7 +2038,7 @@ void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compi
UML_XOR(block, I3, I1, I2);
UML_AND(block, I0, I0, I3);
UML_TEST(block, I0, 0x80000000);
- UML_JMPc(block, uml::COND_Z, no_v = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_Z, no_v = compiler.m_labelnum++);
UML_OR(block, DRC_SR, DRC_SR, V_MASK);
UML_LABEL(block, no_v);
@@ -2047,7 +2047,7 @@ void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compi
UML_CMP(block, I2, I1);
UML_MOVc(block, uml::COND_E, I3, Z_MASK);
UML_MOVc(block, uml::COND_B, I3, C_MASK);
- UML_JMPc(block, uml::COND_GE, no_n = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_GE, no_n = compiler.m_labelnum++);
UML_OR(block, I3, I3, N_MASK);
UML_LABEL(block, no_n);
@@ -2056,7 +2056,7 @@ void hyperstone_device::generate_cmpi(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
-void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_movi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2075,11 +2075,11 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi
if (DST_GLOBAL)
{
UML_TEST(block, DRC_SR, H_MASK);
- UML_JMPc(block, uml::COND_Z, no_exception = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_Z, no_exception = compiler.m_labelnum++);
UML_TEST(block, DRC_SR, S_MASK);
UML_JMPc(block, uml::COND_NZ, no_exception);
UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0);
- UML_JMP(block, done = compiler->m_labelnum++);
+ UML_JMP(block, done = compiler.m_labelnum++);
UML_LABEL(block, no_exception);
}
@@ -2087,13 +2087,13 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi
int no_z;
UML_TEST(block, I1, ~0);
- UML_JMPc(block, uml::COND_NZ, no_z = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_NZ, no_z = compiler.m_labelnum++);
UML_OR(block, DRC_SR, DRC_SR, Z_MASK);
UML_LABEL(block, no_z);
int no_n;
UML_TEST(block, I1, 0x80000000);
- UML_JMPc(block, uml::COND_Z, no_n = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_Z, no_n = compiler.m_labelnum++);
UML_OR(block, DRC_SR, DRC_SR, N_MASK);
UML_LABEL(block, no_n);
@@ -2129,7 +2129,7 @@ void hyperstone_device::generate_movi(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
-void hyperstone_device::generate_addi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2216,7 +2216,7 @@ void hyperstone_device::generate_addi(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
-void hyperstone_device::generate_addsi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_addsi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
printf("Unimplemented: generate_addsi (%08x)\n", desc->pc);
fflush(stdout);
@@ -2225,7 +2225,7 @@ void hyperstone_device::generate_addsi(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
-void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_cmpbi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2287,7 +2287,7 @@ void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *comp
int or_mask, done;
UML_TEST(block, I2, 0xff000000);
- UML_JMPc(block, uml::COND_Z, or_mask = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_Z, or_mask = compiler.m_labelnum++);
UML_TEST(block, I2, 0x00ff0000);
UML_JMPc(block, uml::COND_Z, or_mask);
UML_TEST(block, I2, 0x0000ff00);
@@ -2295,7 +2295,7 @@ void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *comp
UML_TEST(block, I2, 0x000000ff);
UML_JMPc(block, uml::COND_Z, or_mask);
UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK);
- UML_JMP(block, done = compiler->m_labelnum++);
+ UML_JMP(block, done = compiler.m_labelnum++);
UML_LABEL(block, or_mask);
UML_OR(block, DRC_SR, DRC_SR, Z_MASK);
@@ -2306,7 +2306,7 @@ void hyperstone_device::generate_cmpbi(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
-void hyperstone_device::generate_andni(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_andni(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2368,7 +2368,7 @@ void hyperstone_device::generate_andni(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
-void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_ori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2431,7 +2431,7 @@ void hyperstone_device::generate_ori(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
-void hyperstone_device::generate_xori(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_xori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2494,7 +2494,7 @@ void hyperstone_device::generate_xori(drcuml_block *block, compiler_state *compi
template <hyperstone_device::shift_type HI_N>
-void hyperstone_device::generate_shrdi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_shrdi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -2526,7 +2526,7 @@ void hyperstone_device::generate_shrdi(drcuml_block *block, compiler_state *comp
const uint32_t n = HI_N ? (0x10 | (op & 0xf)) : (op & 0xf);
if (HI_N || n)
{
- int no_carry = compiler->m_labelnum++;
+ int no_carry = compiler.m_labelnum++;
UML_DTEST(block, I2, (1 << (n - 1)));
UML_JMPc(block, uml::COND_Z, no_carry);
UML_OR(block, I4, I4, 1);
@@ -2547,7 +2547,7 @@ void hyperstone_device::generate_shrdi(drcuml_block *block, compiler_state *comp
}
-void hyperstone_device::generate_shrd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_shrd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -2586,7 +2586,7 @@ void hyperstone_device::generate_shrd(drcuml_block *block, compiler_state *compi
UML_LOAD(block, I2, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
UML_AND(block, I6, I2, 0x1f);
- int no_shift = compiler->m_labelnum++;
+ int no_shift = compiler.m_labelnum++;
UML_TEST(block, I6, ~0);
UML_JMPc(block, uml::COND_Z, no_shift);
@@ -2609,7 +2609,7 @@ void hyperstone_device::generate_shrd(drcuml_block *block, compiler_state *compi
}
-void hyperstone_device::generate_shr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_shr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2633,8 +2633,8 @@ void hyperstone_device::generate_shr(drcuml_block *block, compiler_state *compil
UML_AND(block, I6, DRC_SR, ~(C_MASK | Z_MASK | N_MASK));
- int no_shift = compiler->m_labelnum++;
- int no_carry = compiler->m_labelnum++;
+ int no_shift = compiler.m_labelnum++;
+ int no_carry = compiler.m_labelnum++;
UML_CMP(block, I1, 0);
UML_JMPc(block, uml::COND_E, no_shift);
UML_SUB(block, I2, I1, 1);
@@ -2658,7 +2658,7 @@ void hyperstone_device::generate_shr(drcuml_block *block, compiler_state *compil
template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
-void hyperstone_device::generate_shri(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_shri(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2713,7 +2713,7 @@ void hyperstone_device::generate_shri(drcuml_block *block, compiler_state *compi
template <hyperstone_device::shift_type HI_N>
-void hyperstone_device::generate_sardi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_sardi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
printf("Unimplemented: generate_sardi (%08x)\n", desc->pc);
fflush(stdout);
@@ -2721,7 +2721,7 @@ void hyperstone_device::generate_sardi(drcuml_block *block, compiler_state *comp
}
-void hyperstone_device::generate_sard(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_sard(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -2760,7 +2760,7 @@ void hyperstone_device::generate_sard(drcuml_block *block, compiler_state *compi
UML_LOAD(block, I2, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
UML_AND(block, I6, I2, 0x1f);
- int no_shift = compiler->m_labelnum++;
+ int no_shift = compiler.m_labelnum++;
UML_TEST(block, I6, ~0);
UML_JMPc(block, uml::COND_Z, no_shift);
@@ -2783,7 +2783,7 @@ void hyperstone_device::generate_sard(drcuml_block *block, compiler_state *compi
}
-void hyperstone_device::generate_sar(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_sar(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2804,7 +2804,7 @@ void hyperstone_device::generate_sar(drcuml_block *block, compiler_state *compil
UML_LOAD(block, I1, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
UML_AND(block, I1, I1, 0x1f);
- int no_shift = compiler->m_labelnum++;
+ int no_shift = compiler.m_labelnum++;
UML_MOV(block, I3, 0);
UML_CMP(block, I1, 0);
UML_JMPc(block, uml::COND_E, no_shift);
@@ -2825,7 +2825,7 @@ void hyperstone_device::generate_sar(drcuml_block *block, compiler_state *compil
template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
-void hyperstone_device::generate_sari(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_sari(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -2885,7 +2885,7 @@ void hyperstone_device::generate_sari(drcuml_block *block, compiler_state *compi
template <hyperstone_device::shift_type HI_N>
-void hyperstone_device::generate_shldi(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_shldi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -2919,14 +2919,14 @@ void hyperstone_device::generate_shldi(drcuml_block *block, compiler_state *comp
UML_AND(block, DRC_SR, DRC_SR, ~C_MASK);
- int no_carry = compiler->m_labelnum++;
+ int no_carry = compiler.m_labelnum++;
UML_TEST(block, I4, 0x1f);
UML_JMPc(block, uml::COND_Z, no_carry);
UML_DROLINS(block, DRC_SR, I0, I4, 1); // Insert carry flag
UML_LABEL(block, no_carry);
- int no_hi_bit = compiler->m_labelnum++;
- int no_overflow = compiler->m_labelnum++;
+ int no_hi_bit = compiler.m_labelnum++;
+ int no_overflow = compiler.m_labelnum++;
UML_AND(block, I5, I6, I1); // I5: high_order & mask
UML_DSHL(block, I0, I0, I4); // I0: val << n
@@ -2953,7 +2953,7 @@ void hyperstone_device::generate_shldi(drcuml_block *block, compiler_state *comp
}
-void hyperstone_device::generate_shld(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_shld(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -2996,14 +2996,14 @@ void hyperstone_device::generate_shld(drcuml_block *block, compiler_state *compi
UML_AND(block, DRC_SR, DRC_SR, ~C_MASK);
- int no_carry = compiler->m_labelnum++;
+ int no_carry = compiler.m_labelnum++;
UML_TEST(block, I4, 0x1f);
UML_JMPc(block, uml::COND_Z, no_carry);
UML_DROLINS(block, DRC_SR, I0, I4, 1); // Insert carry flag
UML_LABEL(block, no_carry);
- int no_hi_bit = compiler->m_labelnum++;
- int no_overflow = compiler->m_labelnum++;
+ int no_hi_bit = compiler.m_labelnum++;
+ int no_overflow = compiler.m_labelnum++;
UML_AND(block, I5, I6, I1); // I5: high_order & mask
UML_DSHL(block, I0, I0, I4); // I0: val << n
@@ -3030,7 +3030,7 @@ void hyperstone_device::generate_shld(drcuml_block *block, compiler_state *compi
}
-void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_shl(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -3054,8 +3054,8 @@ void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compil
UML_AND(block, I6, DRC_SR, ~(C_MASK | Z_MASK | N_MASK | V_MASK));
- int done_shift = compiler->m_labelnum++;
- int no_carry = compiler->m_labelnum++;
+ int done_shift = compiler.m_labelnum++;
+ int no_carry = compiler.m_labelnum++;
UML_CMP(block, I1, 0);
UML_JMPc(block, uml::COND_E, done_shift);
UML_SUB(block, I2, I1, 1);
@@ -3070,7 +3070,7 @@ void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compil
UML_SHL(block, I0, I0, I1);
- int no_hi_bit = compiler->m_labelnum++;
+ int no_hi_bit = compiler.m_labelnum++;
UML_TEST(block, I0, 0x80000000);
UML_JMPc(block, uml::COND_Z, no_hi_bit);
@@ -3093,7 +3093,7 @@ void hyperstone_device::generate_shl(drcuml_block *block, compiler_state *compil
template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
-void hyperstone_device::generate_shli(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_shli(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -3120,7 +3120,7 @@ void hyperstone_device::generate_shli(drcuml_block *block, compiler_state *compi
if (HI_N || n)
{
- int skip_c = compiler->m_labelnum++;
+ int skip_c = compiler.m_labelnum++;
UML_TEST(block, I4, (0x80000000 >> (n - 1)));
UML_JMPc(block, uml::COND_Z, skip_c);
UML_OR(block, I1, I1, 1);
@@ -3129,10 +3129,10 @@ void hyperstone_device::generate_shli(drcuml_block *block, compiler_state *compi
UML_SHL(block, I5, I4, n);
- int done_v = compiler->m_labelnum++;
+ int done_v = compiler.m_labelnum++;
uint32_t mask = (uint32_t)(0xffffffff00000000ULL >> n);
- int no_high_bit = compiler->m_labelnum++;
+ int no_high_bit = compiler.m_labelnum++;
UML_TEST(block, I5, 0x80000000);
UML_JMPc(block, uml::COND_Z, no_high_bit);
@@ -3174,7 +3174,7 @@ void hyperstone_device::generate_shli(drcuml_block *block, compiler_state *compi
}
-void hyperstone_device::generate_testlz(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_testlz(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -3198,7 +3198,7 @@ void hyperstone_device::generate_testlz(drcuml_block *block, compiler_state *com
}
-void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_rol(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -3220,7 +3220,7 @@ void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compil
UML_LOAD(block, I5, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
UML_AND(block, I1, I5, 0x1f); // I1 = sreg & 0x1f
- int no_shift = compiler->m_labelnum++;
+ int no_shift = compiler.m_labelnum++;
UML_CMP(block, I1, 0);
UML_JMPc(block, uml::COND_E, no_shift);
UML_ROL(block, I2, I0, I1);
@@ -3231,13 +3231,13 @@ void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compil
UML_MOV(block, I6, 0);
- int no_hi_bit = compiler->m_labelnum++;
+ int no_hi_bit = compiler.m_labelnum++;
UML_TEST(block, I0, 0x80000000);
UML_JMPc(block, uml::COND_Z, no_hi_bit);
UML_XOR(block, I3, I3, I5);
- int done_shift = compiler->m_labelnum++;
+ int done_shift = compiler.m_labelnum++;
UML_LABEL(block, no_hi_bit);
UML_TEST(block, I3, ~0);
UML_JMPc(block, uml::COND_Z, done_shift);
@@ -3256,7 +3256,7 @@ void hyperstone_device::generate_rol(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_ldxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
uint16_t next_1 = READ_OP(desc->pc + 2);
@@ -3516,7 +3516,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_ldxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
uint16_t next_1 = READ_OP(desc->pc + 2);
@@ -3730,8 +3730,8 @@ void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *comp
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_3));
- int below_sp = compiler->m_labelnum++;
- int done = compiler->m_labelnum++;
+ int below_sp = compiler.m_labelnum++;
+ int done = compiler.m_labelnum++;
UML_MOV(block, I2, mem(&m_core->global_regs[SP_REGISTER]));
UML_CMP(block, I6, I2);
@@ -3784,7 +3784,7 @@ void hyperstone_device::generate_ldxx2(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_stxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
@@ -3941,7 +3941,7 @@ void hyperstone_device::generate_stxx1(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_stxx2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
@@ -4088,8 +4088,8 @@ void hyperstone_device::generate_stxx2(drcuml_block *block, compiler_state *comp
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_3));
- int less_than_sp = compiler->m_labelnum++;
- int store_done = compiler->m_labelnum++;
+ int less_than_sp = compiler.m_labelnum++;
+ int store_done = compiler.m_labelnum++;
UML_MOV(block, I5, I0);
UML_CMP(block, I5, mem(&SP));
@@ -4118,7 +4118,7 @@ void hyperstone_device::generate_stxx2(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL, hyperstone_device::sign_mode SIGNED>
-void hyperstone_device::generate_mulsu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_36));
@@ -4182,7 +4182,7 @@ void hyperstone_device::generate_mulsu(drcuml_block *block, compiler_state *comp
UML_STORE(block, (void *)m_core->local_regs, I5, I4, SIZE_DWORD, SCALE_x4);
}
- int done = compiler->m_labelnum++;
+ int done = compiler.m_labelnum++;
UML_MOV(block, I7, mem(&m_core->clock_cycles_6));
if (SIGNED == IS_SIGNED)
{
@@ -4209,7 +4209,7 @@ void hyperstone_device::generate_mulsu(drcuml_block *block, compiler_state *comp
template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
@@ -4260,8 +4260,8 @@ void hyperstone_device::generate_mul(drcuml_block *block, compiler_state *compil
UML_STORE(block, (void *)m_core->local_regs, I6, I2, SIZE_DWORD, SCALE_x4);
UML_MOV(block, I7, mem(&m_core->clock_cycles_3));
- int add_cycles = compiler->m_labelnum++;
- int done = compiler->m_labelnum++;
+ int add_cycles = compiler.m_labelnum++;
+ int done = compiler.m_labelnum++;
UML_CMP(block, I0, 0xffff8000);
UML_JMPc(block, uml::COND_B, add_cycles);
UML_CMP(block, I0, 0x8000);
@@ -4281,7 +4281,7 @@ void hyperstone_device::generate_mul(drcuml_block *block, compiler_state *compil
template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
-void hyperstone_device::generate_set(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -4320,7 +4320,7 @@ void hyperstone_device::generate_set(drcuml_block *block, compiler_state *compil
{
if (n == 0)
{
- int no_low_bit = compiler->m_labelnum++;
+ int no_low_bit = compiler.m_labelnum++;
UML_MOV(block, I1, mem(&m_core->global_regs[SP_REGISTER]));
UML_AND(block, I0, I1, 0xfffffe00);
UML_ROLINS(block, I0, DRC_SR, 9, 0x000001fc);
@@ -4364,7 +4364,7 @@ void hyperstone_device::generate_set(drcuml_block *block, compiler_state *compil
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_ldwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_ldwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -4409,7 +4409,7 @@ void hyperstone_device::generate_ldwr(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_lddr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_lddr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -4457,7 +4457,7 @@ void hyperstone_device::generate_lddr(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_ldwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_ldwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -4509,7 +4509,7 @@ void hyperstone_device::generate_ldwp(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_lddp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_lddp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -4570,7 +4570,7 @@ void hyperstone_device::generate_lddp(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_stwr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_stwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -4606,7 +4606,7 @@ void hyperstone_device::generate_stwr(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_stdr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_stdr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -4654,7 +4654,7 @@ void hyperstone_device::generate_stdr(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_stwp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_stwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -4692,7 +4692,7 @@ void hyperstone_device::generate_stwp(drcuml_block *block, compiler_state *compi
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_stdp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -4730,8 +4730,8 @@ void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compi
}
else
{
- int srcf_dst_equal = compiler->m_labelnum++;
- int done = compiler->m_labelnum++;
+ int srcf_dst_equal = compiler.m_labelnum++;
+ int done = compiler.m_labelnum++;
UML_MOV(block, I6, I0);
UML_AND(block, I0, I0, ~3);
@@ -4761,16 +4761,16 @@ void hyperstone_device::generate_stdp(drcuml_block *block, compiler_state *compi
template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET>
-void hyperstone_device::generate_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK };
- int done = compiler->m_labelnum++;
+ int done = compiler.m_labelnum++;
uml::condition_t condition = COND_SET ? uml::COND_Z : uml::COND_NZ;
int skip;
UML_TEST(block, DRC_SR, condition_masks[CONDITION]);
- UML_JMPc(block, condition, skip = compiler->m_labelnum++);
+ UML_JMPc(block, condition, skip = compiler.m_labelnum++);
generate_br(block, compiler, desc);
UML_JMP(block, done);
@@ -4784,7 +4784,7 @@ void hyperstone_device::generate_b(drcuml_block *block, compiler_state *compiler
}
-void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_br(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -4800,11 +4800,11 @@ void hyperstone_device::generate_br(drcuml_block *block, compiler_state *compile
template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET>
-void hyperstone_device::generate_db(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_db(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK };
- int skip_jump = compiler->m_labelnum++;
- int done = compiler->m_labelnum++;
+ int skip_jump = compiler.m_labelnum++;
+ int done = compiler.m_labelnum++;
UML_TEST(block, DRC_SR, condition_masks[CONDITION]);
if (COND_SET)
@@ -4824,7 +4824,7 @@ void hyperstone_device::generate_db(drcuml_block *block, compiler_state *compile
}
-void hyperstone_device::generate_dbr(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_dbr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
@@ -4837,7 +4837,7 @@ void hyperstone_device::generate_dbr(drcuml_block *block, compiler_state *compil
}
-void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_frame(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -4863,9 +4863,9 @@ void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *comp
int diff_in_range, done;
UML_CMP(block, I3, -64);
- UML_JMPc(block, uml::COND_L, done = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_L, done = compiler.m_labelnum++);
UML_CMP(block, I3, 64);
- UML_JMPc(block, uml::COND_L, diff_in_range = compiler->m_labelnum++);
+ UML_JMPc(block, uml::COND_L, diff_in_range = compiler.m_labelnum++);
UML_OR(block, I3, I3, 0xffffff80);
UML_LABEL(block, diff_in_range);
@@ -4875,7 +4875,7 @@ void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *comp
UML_JMPc(block, uml::COND_GE, done);
int push_next;
- UML_LABEL(block, push_next = compiler->m_labelnum++);
+ UML_LABEL(block, push_next = compiler.m_labelnum++);
UML_ROLAND(block, I2, I0, 30, 0x3f);
UML_LOAD(block, I1, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
UML_CALLH(block, *m_mem_write32);
@@ -4895,7 +4895,7 @@ void hyperstone_device::generate_frame(drcuml_block *block, compiler_state *comp
}
template <hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -4979,7 +4979,7 @@ void hyperstone_device::generate_call(drcuml_block *block, compiler_state *compi
-void hyperstone_device::generate_trap_op(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_trap_op(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); // TODO: with the latency it can change
@@ -5000,19 +5000,19 @@ void hyperstone_device::generate_trap_op(drcuml_block *block, compiler_state *co
UML_ROLINS(block, DRC_SR, (1<<19), 0, ILC_MASK);
UML_TEST(block, DRC_SR, conditions[code]);
- int skip_trap = compiler->m_labelnum++;
+ int skip_trap = compiler.m_labelnum++;
if (trap_if_set[code])
UML_JMPc(block, uml::COND_Z, skip_trap);
else
UML_JMPc(block, uml::COND_NZ, skip_trap);
- generate_get_trap_addr(block, compiler->m_labelnum, trapno);
+ generate_get_trap_addr(block, compiler.m_labelnum, trapno);
generate_trap_exception_or_int<IS_TRAP>(block);
UML_LABEL(block, skip_trap);
}
-void hyperstone_device::generate_extend(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
@@ -5168,14 +5168,14 @@ void hyperstone_device::generate_extend(drcuml_block *block, compiler_state *com
}
-void hyperstone_device::generate_reserved(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_reserved(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
printf("Unimplemented: generate_reserved (%08x)\n", desc->pc);
fflush(stdout);
fatalerror(" ");
}
-void hyperstone_device::generate_do(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void hyperstone_device::generate_do(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
printf("Unimplemented: generate_do (%08x)\n", desc->pc);
fflush(stdout);
diff --git a/src/devices/cpu/es5510/es5510.cpp b/src/devices/cpu/es5510/es5510.cpp
index 79ba2b3544c..d7e892c7d09 100644
--- a/src/devices/cpu/es5510/es5510.cpp
+++ b/src/devices/cpu/es5510/es5510.cpp
@@ -996,9 +996,9 @@ void es5510_device::execute_run() {
}
}
-util::disasm_interface *es5510_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> es5510_device::create_disassembler()
{
- return new es5510_disassembler;
+ return std::make_unique<es5510_disassembler>();
}
#if VERBOSE_EXEC
diff --git a/src/devices/cpu/es5510/es5510.h b/src/devices/cpu/es5510/es5510.h
index e92b68ab765..da5d6eb716d 100644
--- a/src/devices/cpu/es5510/es5510.h
+++ b/src/devices/cpu/es5510/es5510.h
@@ -136,7 +136,7 @@ protected:
virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int linenum, int state) override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
int32_t alu_operation(uint8_t op, int32_t aValue, int32_t bValue, uint8_t &flags);
void alu_operation_end();
diff --git a/src/devices/cpu/esrip/esrip.cpp b/src/devices/cpu/esrip/esrip.cpp
index 1e15fb43d5f..61783fde59e 100644
--- a/src/devices/cpu/esrip/esrip.cpp
+++ b/src/devices/cpu/esrip/esrip.cpp
@@ -377,9 +377,9 @@ void esrip_device::state_string_export(const device_state_entry &entry, std::str
// helper function
//-------------------------------------------------
-util::disasm_interface *esrip_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> esrip_device::create_disassembler()
{
- return new esrip_disassembler;
+ return std::make_unique<esrip_disassembler>();
}
/***************************************************************************
diff --git a/src/devices/cpu/esrip/esrip.h b/src/devices/cpu/esrip/esrip.h
index 6c1aac42a6c..1b3f2322042 100644
--- a/src/devices/cpu/esrip/esrip.h
+++ b/src/devices/cpu/esrip/esrip.h
@@ -139,7 +139,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/f8/f8.cpp b/src/devices/cpu/f8/f8.cpp
index 6fae87f8fab..54364ebddf3 100644
--- a/src/devices/cpu/f8/f8.cpp
+++ b/src/devices/cpu/f8/f8.cpp
@@ -54,9 +54,9 @@ device_memory_interface::space_config_vector f8_cpu_device::memory_space_config(
};
}
-util::disasm_interface *f8_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> f8_cpu_device::create_disassembler()
{
- return new f8_disassembler;
+ return std::make_unique<f8_disassembler>();
}
void f8_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const
diff --git a/src/devices/cpu/f8/f8.h b/src/devices/cpu/f8/f8.h
index dd3ccb3729e..a8cf2ca367d 100644
--- a/src/devices/cpu/f8/f8.h
+++ b/src/devices/cpu/f8/f8.h
@@ -53,7 +53,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/g65816/g65816.cpp b/src/devices/cpu/g65816/g65816.cpp
index ab376590ef6..e6f2b5329a1 100644
--- a/src/devices/cpu/g65816/g65816.cpp
+++ b/src/devices/cpu/g65816/g65816.cpp
@@ -788,9 +788,9 @@ void g65816_device::execute_set_input(int line, int state)
(this->*FTABLE_SET_LINE)(line, state);
}
-util::disasm_interface *g65816_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> g65816_device::create_disassembler()
{
- return new g65816_disassembler(this);
+ return std::make_unique<g65816_disassembler>(this);
}
bool g65816_device::get_m_flag() const
diff --git a/src/devices/cpu/g65816/g65816.h b/src/devices/cpu/g65816/g65816.h
index 47d3058e475..4078ffcea0c 100644
--- a/src/devices/cpu/g65816/g65816.h
+++ b/src/devices/cpu/g65816/g65816.h
@@ -88,7 +88,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual bool get_m_flag() const override;
virtual bool get_x_flag() const override;
diff --git a/src/devices/cpu/h6280/h6280.cpp b/src/devices/cpu/h6280/h6280.cpp
index 5df36ff2fb0..d8dd1c7db80 100644
--- a/src/devices/cpu/h6280/h6280.cpp
+++ b/src/devices/cpu/h6280/h6280.cpp
@@ -2225,9 +2225,9 @@ void h6280_device::state_string_export(const device_state_entry &entry, std::str
// helper function
//-------------------------------------------------
-util::disasm_interface *h6280_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> h6280_device::create_disassembler()
{
- return new h6280_disassembler;
+ return std::make_unique<h6280_disassembler>();
}
diff --git a/src/devices/cpu/h6280/h6280.h b/src/devices/cpu/h6280/h6280.h
index e744247e8cb..a1f64139b1a 100644
--- a/src/devices/cpu/h6280/h6280.h
+++ b/src/devices/cpu/h6280/h6280.h
@@ -89,7 +89,7 @@ protected:
virtual bool memory_translate(int spacenum, int intention, offs_t &address) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/h8/h8.cpp b/src/devices/cpu/h8/h8.cpp
index 8b994cd02d0..06fa7991c06 100644
--- a/src/devices/cpu/h8/h8.cpp
+++ b/src/devices/cpu/h8/h8.cpp
@@ -1343,9 +1343,9 @@ void h8_device::set_nz32(uint32_t v)
CCR |= F_N;
}
-util::disasm_interface *h8_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> h8_device::create_disassembler()
{
- return new h8_disassembler;
+ return std::make_unique<h8_disassembler>();
}
#include "cpu/h8/h8.hxx"
diff --git a/src/devices/cpu/h8/h8.h b/src/devices/cpu/h8/h8.h
index 678a4627f19..aa3de0c91ef 100644
--- a/src/devices/cpu/h8/h8.h
+++ b/src/devices/cpu/h8/h8.h
@@ -108,7 +108,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config program_config, io_config;
address_space *program, *io;
diff --git a/src/devices/cpu/h8/h8h.cpp b/src/devices/cpu/h8/h8h.cpp
index 3d749e5480f..ff2056c9805 100644
--- a/src/devices/cpu/h8/h8h.cpp
+++ b/src/devices/cpu/h8/h8h.cpp
@@ -11,9 +11,9 @@ h8h_device::h8h_device(const machine_config &mconfig, device_type type, const ch
mode_advanced = true;
}
-util::disasm_interface *h8h_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> h8h_device::create_disassembler()
{
- return new h8h_disassembler;
+ return std::make_unique<h8h_disassembler>();
}
#include "cpu/h8/h8h.hxx"
diff --git a/src/devices/cpu/h8/h8h.h b/src/devices/cpu/h8/h8h.h
index 0271d2ffeb8..1b0c9b4b3ce 100644
--- a/src/devices/cpu/h8/h8h.h
+++ b/src/devices/cpu/h8/h8h.h
@@ -22,7 +22,7 @@ class h8h_device : public h8_device {
protected:
h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/h8/h8s2000.cpp b/src/devices/cpu/h8/h8s2000.cpp
index 38d7464b083..04da92cdee3 100644
--- a/src/devices/cpu/h8/h8s2000.cpp
+++ b/src/devices/cpu/h8/h8s2000.cpp
@@ -10,9 +10,9 @@ h8s2000_device::h8s2000_device(const machine_config &mconfig, device_type type,
has_exr = true;
}
-util::disasm_interface *h8s2000_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> h8s2000_device::create_disassembler()
{
- return new h8s2000_disassembler;
+ return std::make_unique<h8s2000_disassembler>();
}
#include "cpu/h8/h8s2000.hxx"
diff --git a/src/devices/cpu/h8/h8s2000.h b/src/devices/cpu/h8/h8s2000.h
index 713e087f64b..36e6541f37c 100644
--- a/src/devices/cpu/h8/h8s2000.h
+++ b/src/devices/cpu/h8/h8s2000.h
@@ -24,7 +24,7 @@ class h8s2000_device : public h8h_device {
protected:
h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/h8/h8s2600.cpp b/src/devices/cpu/h8/h8s2600.cpp
index 1d2ec37775e..0c813bd6102 100644
--- a/src/devices/cpu/h8/h8s2600.cpp
+++ b/src/devices/cpu/h8/h8s2600.cpp
@@ -9,9 +9,9 @@ h8s2600_device::h8s2600_device(const machine_config &mconfig, device_type type,
{
}
-util::disasm_interface *h8s2600_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> h8s2600_device::create_disassembler()
{
- return new h8s2600_disassembler;
+ return std::make_unique<h8s2600_disassembler>();
}
#include "cpu/h8/h8s2600.hxx"
diff --git a/src/devices/cpu/h8/h8s2600.h b/src/devices/cpu/h8/h8s2600.h
index c1a184c9f36..84c611dd8f7 100644
--- a/src/devices/cpu/h8/h8s2600.h
+++ b/src/devices/cpu/h8/h8s2600.h
@@ -22,7 +22,7 @@ class h8s2600_device : public h8s2000_device {
protected:
h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/hcd62121/hcd62121.cpp b/src/devices/cpu/hcd62121/hcd62121.cpp
index fa15345ec79..374743788e2 100644
--- a/src/devices/cpu/hcd62121/hcd62121.cpp
+++ b/src/devices/cpu/hcd62121/hcd62121.cpp
@@ -1752,7 +1752,7 @@ void hcd62121_cpu_device::execute_run()
} while (m_icount > 0);
}
-util::disasm_interface *hcd62121_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hcd62121_cpu_device::create_disassembler()
{
- return new hcd62121_disassembler;
+ return std::make_unique<hcd62121_disassembler>();
}
diff --git a/src/devices/cpu/hcd62121/hcd62121.h b/src/devices/cpu/hcd62121/hcd62121.h
index def79f44681..0c2da71fec5 100644
--- a/src/devices/cpu/hcd62121/hcd62121.h
+++ b/src/devices/cpu/hcd62121/hcd62121.h
@@ -61,7 +61,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
u8 read_op();
diff --git a/src/devices/cpu/hd61700/hd61700.cpp b/src/devices/cpu/hd61700/hd61700.cpp
index 32d8bde8950..0d2e5aeb1d5 100644
--- a/src/devices/cpu/hd61700/hd61700.cpp
+++ b/src/devices/cpu/hd61700/hd61700.cpp
@@ -301,9 +301,9 @@ void hd61700_cpu_device::state_string_export(const device_state_entry &entry, st
// helper function
//-------------------------------------------------
-util::disasm_interface *hd61700_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hd61700_cpu_device::create_disassembler()
{
- return new hd61700_disassembler;
+ return std::make_unique<hd61700_disassembler>();
}
//-------------------------------------------------
diff --git a/src/devices/cpu/hd61700/hd61700.h b/src/devices/cpu/hd61700/hd61700.h
index 971de2fb179..cb139878221 100644
--- a/src/devices/cpu/hd61700/hd61700.h
+++ b/src/devices/cpu/hd61700/hd61700.h
@@ -90,7 +90,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// interrupts
bool check_irqs();
diff --git a/src/devices/cpu/hmcs40/hmcs40.cpp b/src/devices/cpu/hmcs40/hmcs40.cpp
index abb058023c1..dc64959475b 100644
--- a/src/devices/cpu/hmcs40/hmcs40.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40.cpp
@@ -174,9 +174,9 @@ void hmcs40_cpu_device::state_string_export(const device_state_entry &entry, std
}
}
-util::disasm_interface *hmcs40_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hmcs40_cpu_device::create_disassembler()
{
- return new hmcs40_disassembler;
+ return std::make_unique<hmcs40_disassembler>();
}
diff --git a/src/devices/cpu/hmcs40/hmcs40.h b/src/devices/cpu/hmcs40/hmcs40.h
index 4ea6b8f5eeb..355780dee11 100644
--- a/src/devices/cpu/hmcs40/hmcs40.h
+++ b/src/devices/cpu/hmcs40/hmcs40.h
@@ -158,7 +158,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// memorymaps
diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp
index e21df040a7c..d726f7d6191 100644
--- a/src/devices/cpu/hphybrid/hphybrid.cpp
+++ b/src/devices/cpu/hphybrid/hphybrid.cpp
@@ -682,9 +682,9 @@ void hp_hybrid_cpu_device::state_string_export(const device_state_entry &entry,
}
}
-util::disasm_interface *hp_hybrid_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hp_hybrid_cpu_device::create_disassembler()
{
- return new hp_hybrid_disassembler;
+ return std::make_unique<hp_hybrid_disassembler>();
}
uint16_t hp_hybrid_cpu_device::remove_mae(uint32_t addr)
@@ -1541,9 +1541,9 @@ uint16_t hp_5061_3001_cpu_device::execute_no_bpc_ioc(uint16_t opcode)
return m_reg_P + 1;
}
-util::disasm_interface *hp_5061_3001_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hp_5061_3001_cpu_device::create_disassembler()
{
- return new hp_5061_3001_disassembler;
+ return std::make_unique<hp_5061_3001_disassembler>();
}
uint32_t hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr)
diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h
index 63360d0bfdd..b81c26f08e9 100644
--- a/src/devices/cpu/hphybrid/hphybrid.h
+++ b/src/devices/cpu/hphybrid/hphybrid.h
@@ -85,7 +85,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// Different cases of memory access
// See patent @ pg 361
@@ -179,7 +179,7 @@ protected:
void do_mpy();
virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t add_mae(aec_cases_t aec_case, uint16_t addr) override;
virtual uint16_t read_non_common_reg(uint16_t addr) override;
virtual void write_non_common_reg(uint16_t addr , uint16_t v) override;
diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp
index 966287b9428..a3242c1d8bf 100644
--- a/src/devices/cpu/i386/i386.cpp
+++ b/src/devices/cpu/i386/i386.cpp
@@ -4012,9 +4012,9 @@ int i386_device::get_mode() const
return m_sreg[CS].d ? 32 : 16;
}
-util::disasm_interface *i386_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i386_device::create_disassembler()
{
- return new i386_disassembler(this);
+ return std::make_unique<i386_disassembler>(this);
}
/*****************************************************************************/
diff --git a/src/devices/cpu/i386/i386.h b/src/devices/cpu/i386/i386.h
index b0f0ba0fa5b..71ea0800216 100644
--- a/src/devices/cpu/i386/i386.h
+++ b/src/devices/cpu/i386/i386.h
@@ -73,7 +73,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual int get_mode() const override;
address_space_config m_program_config;
diff --git a/src/devices/cpu/i8008/i8008.cpp b/src/devices/cpu/i8008/i8008.cpp
index 9b687eec92a..bd5796394bd 100644
--- a/src/devices/cpu/i8008/i8008.cpp
+++ b/src/devices/cpu/i8008/i8008.cpp
@@ -208,9 +208,9 @@ void i8008_device::state_string_export(const device_state_entry &entry, std::str
// helper function
//-------------------------------------------------
-util::disasm_interface *i8008_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i8008_device::create_disassembler()
{
- return new i8008_disassembler;
+ return std::make_unique<i8008_disassembler>();
}
//**************************************************************************
diff --git a/src/devices/cpu/i8008/i8008.h b/src/devices/cpu/i8008/i8008.h
index ea473df22af..0aedcadd37c 100644
--- a/src/devices/cpu/i8008/i8008.h
+++ b/src/devices/cpu/i8008/i8008.h
@@ -43,7 +43,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one(int opcode);
diff --git a/src/devices/cpu/i8085/i8085.cpp b/src/devices/cpu/i8085/i8085.cpp
index 537e41146e4..4249cbd99b1 100644
--- a/src/devices/cpu/i8085/i8085.cpp
+++ b/src/devices/cpu/i8085/i8085.cpp
@@ -464,9 +464,9 @@ void i8085a_cpu_device::state_string_export(const device_state_entry &entry, std
}
}
-util::disasm_interface *i8085a_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i8085a_cpu_device::create_disassembler()
{
- return new i8085_disassembler;
+ return std::make_unique<i8085_disassembler>();
}
diff --git a/src/devices/cpu/i8085/i8085.h b/src/devices/cpu/i8085/i8085.h
index 2da4c89acd1..c9f3bd17b87 100644
--- a/src/devices/cpu/i8085/i8085.h
+++ b/src/devices/cpu/i8085/i8085.h
@@ -100,7 +100,7 @@ protected:
virtual void state_import(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
enum
{
diff --git a/src/devices/cpu/i8089/i8089.cpp b/src/devices/cpu/i8089/i8089.cpp
index c9efe424dfe..025a31978c4 100644
--- a/src/devices/cpu/i8089/i8089.cpp
+++ b/src/devices/cpu/i8089/i8089.cpp
@@ -148,9 +148,9 @@ device_memory_interface::space_config_vector i8089_device::memory_space_config()
// disassemble - disassembler
//-------------------------------------------------
-util::disasm_interface *i8089_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i8089_device::create_disassembler()
{
- return new i8089_disassembler();
+ return std::make_unique<i8089_disassembler>();
}
//-------------------------------------------------
diff --git a/src/devices/cpu/i8089/i8089.h b/src/devices/cpu/i8089/i8089.h
index df72f847b85..57dc9baea3d 100644
--- a/src/devices/cpu/i8089/i8089.h
+++ b/src/devices/cpu/i8089/i8089.h
@@ -82,7 +82,7 @@ protected:
address_space_config m_io_config;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp
index fd7068e77f4..f63e667d9da 100644
--- a/src/devices/cpu/i86/i86.cpp
+++ b/src/devices/cpu/i86/i86.cpp
@@ -615,9 +615,9 @@ void i8086_common_cpu_device::execute_set_input( int inptnum, int state )
}
}
-util::disasm_interface *i8086_common_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i8086_common_cpu_device::create_disassembler()
{
- return new i386_disassembler(this);
+ return std::make_unique<i386_disassembler>(this);
}
int i8086_common_cpu_device::get_mode() const
diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h
index 3376a37f3b8..7d2330e2d11 100644
--- a/src/devices/cpu/i86/i86.h
+++ b/src/devices/cpu/i86/i86.h
@@ -140,7 +140,7 @@ protected:
virtual void execute_set_input(int inputnum, int state) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual int get_mode() const override;
// device_state_interface overrides
diff --git a/src/devices/cpu/i860/i860.cpp b/src/devices/cpu/i860/i860.cpp
index 5387f0d6f29..9a008513dfd 100644
--- a/src/devices/cpu/i860/i860.cpp
+++ b/src/devices/cpu/i860/i860.cpp
@@ -232,9 +232,9 @@ void i860_cpu_device::device_reset()
reset_i860();
}
-util::disasm_interface *i860_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i860_cpu_device::create_disassembler()
{
- return new i860_disassembler;
+ return std::make_unique<i860_disassembler>();
}
diff --git a/src/devices/cpu/i860/i860.h b/src/devices/cpu/i860/i860.h
index 05e81407e7c..9666a238e3f 100644
--- a/src/devices/cpu/i860/i860.h
+++ b/src/devices/cpu/i860/i860.h
@@ -80,7 +80,7 @@ protected:
virtual void state_import(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/i960/i960.cpp b/src/devices/cpu/i960/i960.cpp
index 049d0a54043..373e58522bc 100644
--- a/src/devices/cpu/i960/i960.cpp
+++ b/src/devices/cpu/i960/i960.cpp
@@ -2296,7 +2296,7 @@ void i960_cpu_device::device_reset()
m_rcache_pos = 0;
}
-util::disasm_interface *i960_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i960_cpu_device::create_disassembler()
{
- return new i960_disassembler;
+ return std::make_unique<i960_disassembler>();
}
diff --git a/src/devices/cpu/i960/i960.h b/src/devices/cpu/i960/i960.h
index a76998d2747..cb5164cd7dd 100644
--- a/src/devices/cpu/i960/i960.h
+++ b/src/devices/cpu/i960/i960.h
@@ -101,7 +101,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
void burst_stall_save(uint32_t t1, uint32_t t2, int index, int size, bool iswriteop);
diff --git a/src/devices/cpu/ie15/ie15.cpp b/src/devices/cpu/ie15/ie15.cpp
index 80c0fecdbe7..eea0ef17db7 100644
--- a/src/devices/cpu/ie15/ie15.cpp
+++ b/src/devices/cpu/ie15/ie15.cpp
@@ -153,9 +153,9 @@ void ie15_cpu_device::state_string_export(const device_state_entry &entry, std::
// create_disassembler
//-------------------------------------------------
-util::disasm_interface *ie15_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> ie15_cpu_device::create_disassembler()
{
- return new ie15_disassembler;
+ return std::make_unique<ie15_disassembler>();
}
//**************************************************************************
diff --git a/src/devices/cpu/ie15/ie15.h b/src/devices/cpu/ie15/ie15.h
index f919d81c211..b39d1c183b6 100644
--- a/src/devices/cpu/ie15/ie15.h
+++ b/src/devices/cpu/ie15/ie15.h
@@ -44,7 +44,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one(int opcode);
diff --git a/src/devices/cpu/jaguar/jaguar.cpp b/src/devices/cpu/jaguar/jaguar.cpp
index a58d6c3be44..efa797a954a 100644
--- a/src/devices/cpu/jaguar/jaguar.cpp
+++ b/src/devices/cpu/jaguar/jaguar.cpp
@@ -1438,12 +1438,12 @@ WRITE32_MEMBER( jaguardsp_cpu_device::ctrl_w )
}
}
-util::disasm_interface *jaguargpu_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> jaguargpu_cpu_device::create_disassembler()
{
- return new jaguar_disassembler(jaguar_disassembler::JAGUAR_VARIANT_GPU);
+ return std::make_unique<jaguar_disassembler>(jaguar_disassembler::JAGUAR_VARIANT_GPU);
}
-util::disasm_interface *jaguardsp_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> jaguardsp_cpu_device::create_disassembler()
{
- return new jaguar_disassembler(jaguar_disassembler::JAGUAR_VARIANT_DSP);
+ return std::make_unique<jaguar_disassembler>(jaguar_disassembler::JAGUAR_VARIANT_DSP);
}
diff --git a/src/devices/cpu/jaguar/jaguar.h b/src/devices/cpu/jaguar/jaguar.h
index cb88c8a5d41..b16bf1e2c00 100644
--- a/src/devices/cpu/jaguar/jaguar.h
+++ b/src/devices/cpu/jaguar/jaguar.h
@@ -245,7 +245,7 @@ public:
protected:
virtual void execute_run() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -262,7 +262,7 @@ protected:
virtual uint32_t execute_input_lines() const override { return 6; }
virtual void execute_run() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
diff --git a/src/devices/cpu/lc8670/lc8670.cpp b/src/devices/cpu/lc8670/lc8670.cpp
index 0942636c4a3..5d0ff589928 100644
--- a/src/devices/cpu/lc8670/lc8670.cpp
+++ b/src/devices/cpu/lc8670/lc8670.cpp
@@ -1779,7 +1779,7 @@ int lc8670_cpu_device::op_xor()
return 1;
}
-util::disasm_interface *lc8670_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> lc8670_cpu_device::create_disassembler()
{
- return new lc8670_disassembler;
+ return std::make_unique<lc8670_disassembler>();
}
diff --git a/src/devices/cpu/lc8670/lc8670.h b/src/devices/cpu/lc8670/lc8670.h
index 3944c864a4a..8a7f2ad045d 100644
--- a/src/devices/cpu/lc8670/lc8670.h
+++ b/src/devices/cpu/lc8670/lc8670.h
@@ -117,7 +117,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
// helpers
diff --git a/src/devices/cpu/lh5801/lh5801.cpp b/src/devices/cpu/lh5801/lh5801.cpp
index 85feddde34f..e9a60dfaeb1 100644
--- a/src/devices/cpu/lh5801/lh5801.cpp
+++ b/src/devices/cpu/lh5801/lh5801.cpp
@@ -257,7 +257,7 @@ void lh5801_cpu_device::execute_set_input(int irqline, int state)
}
}
-util::disasm_interface *lh5801_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> lh5801_cpu_device::create_disassembler()
{
- return new lh5801_disassembler;
+ return std::make_unique<lh5801_disassembler>();
}
diff --git a/src/devices/cpu/lh5801/lh5801.h b/src/devices/cpu/lh5801/lh5801.h
index 679e2e90fa4..c8a8b59c3a2 100644
--- a/src/devices/cpu/lh5801/lh5801.h
+++ b/src/devices/cpu/lh5801/lh5801.h
@@ -93,7 +93,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/lr35902/lr35902.cpp b/src/devices/cpu/lr35902/lr35902.cpp
index 360613df184..7709952bd04 100644
--- a/src/devices/cpu/lr35902/lr35902.cpp
+++ b/src/devices/cpu/lr35902/lr35902.cpp
@@ -232,9 +232,9 @@ void lr35902_cpu_device::device_reset()
m_entering_halt = false;
}
-util::disasm_interface *lr35902_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> lr35902_cpu_device::create_disassembler()
{
- return new lr35902_disassembler;
+ return std::make_unique<lr35902_disassembler>();
}
void lr35902_cpu_device::check_interrupts()
diff --git a/src/devices/cpu/lr35902/lr35902.h b/src/devices/cpu/lr35902/lr35902.h
index d3743209e76..5fad91ff8e2 100644
--- a/src/devices/cpu/lr35902/lr35902.h
+++ b/src/devices/cpu/lr35902/lr35902.h
@@ -89,7 +89,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
inline void cycles_passed(uint8_t cycles);
inline uint8_t mem_read_byte(uint16_t addr);
diff --git a/src/devices/cpu/m37710/m37710.cpp b/src/devices/cpu/m37710/m37710.cpp
index 9851c30983a..2416a7b5b10 100644
--- a/src/devices/cpu/m37710/m37710.cpp
+++ b/src/devices/cpu/m37710/m37710.cpp
@@ -949,9 +949,9 @@ bool m37710_cpu_device::get_x_flag() const
return FLAG_X;
}
-util::disasm_interface *m37710_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m37710_cpu_device::create_disassembler()
{
- return new m7700_disassembler(this);
+ return std::make_unique<m7700_disassembler>(this);
}
void m37710_cpu_device::m37710_restore_state()
diff --git a/src/devices/cpu/m37710/m37710.h b/src/devices/cpu/m37710/m37710.h
index 102b137e2e6..be36f1f412a 100644
--- a/src/devices/cpu/m37710/m37710.h
+++ b/src/devices/cpu/m37710/m37710.h
@@ -127,7 +127,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual bool get_m_flag() const override;
virtual bool get_x_flag() const override;
diff --git a/src/devices/cpu/m6502/deco16.cpp b/src/devices/cpu/m6502/deco16.cpp
index b624d935d20..52d6ec640a2 100644
--- a/src/devices/cpu/m6502/deco16.cpp
+++ b/src/devices/cpu/m6502/deco16.cpp
@@ -23,9 +23,9 @@ deco16_device::deco16_device(const machine_config &mconfig, const char *tag, dev
{
}
-util::disasm_interface *deco16_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> deco16_device::create_disassembler()
{
- return new deco16_disassembler;
+ return std::make_unique<deco16_disassembler>();
}
void deco16_device::device_start()
diff --git a/src/devices/cpu/m6502/deco16.h b/src/devices/cpu/m6502/deco16.h
index 1c980b2e4c6..63494f6b1d4 100644
--- a/src/devices/cpu/m6502/deco16.h
+++ b/src/devices/cpu/m6502/deco16.h
@@ -18,7 +18,7 @@ class deco16_device : public m6502_device {
public:
deco16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/m4510.cpp b/src/devices/cpu/m6502/m4510.cpp
index d441abb24fd..c91e873a443 100644
--- a/src/devices/cpu/m6502/m4510.cpp
+++ b/src/devices/cpu/m6502/m4510.cpp
@@ -30,9 +30,9 @@ m4510_device::m4510_device(const machine_config &mconfig, const char *tag, devic
sprogram_config.m_page_shift = 13;
}
-util::disasm_interface *m4510_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m4510_device::create_disassembler()
{
- return new m4510_disassembler;
+ return std::make_unique<m4510_disassembler>();
}
void m4510_device::device_start()
diff --git a/src/devices/cpu/m6502/m4510.h b/src/devices/cpu/m6502/m4510.h
index a41a0620c93..2db5ea3fde3 100644
--- a/src/devices/cpu/m6502/m4510.h
+++ b/src/devices/cpu/m6502/m4510.h
@@ -19,7 +19,7 @@ class m4510_device : public m65ce02_device {
public:
m4510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp
index 9ea07bb18a4..9604f6c55a4 100644
--- a/src/devices/cpu/m6502/m6502.cpp
+++ b/src/devices/cpu/m6502/m6502.cpp
@@ -502,9 +502,9 @@ void m6502_device::set_nz(uint8_t v)
P |= F_Z;
}
-util::disasm_interface *m6502_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6502_device::create_disassembler()
{
- return new m6502_disassembler;
+ return std::make_unique<m6502_disassembler>();
}
uint8_t m6502_device::memory_interface::read_9(uint16_t adr)
diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h
index 18c0bdb5c3b..185598a8320 100644
--- a/src/devices/cpu/m6502/m6502.h
+++ b/src/devices/cpu/m6502/m6502.h
@@ -106,7 +106,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config program_config, sprogram_config;
diff --git a/src/devices/cpu/m6502/m6509.cpp b/src/devices/cpu/m6502/m6509.cpp
index d3d17596082..8536d04fe04 100644
--- a/src/devices/cpu/m6502/m6509.cpp
+++ b/src/devices/cpu/m6502/m6509.cpp
@@ -50,9 +50,9 @@ offs_t m6509_device::pc_to_external(u16 pc)
return adr_in_bank_i(pc);
}
-util::disasm_interface *m6509_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6509_device::create_disassembler()
{
- return new m6509_disassembler;
+ return std::make_unique<m6509_disassembler>();
}
m6509_device::mi_6509_normal::mi_6509_normal(m6509_device *_base)
diff --git a/src/devices/cpu/m6502/m6509.h b/src/devices/cpu/m6502/m6509.h
index 3945c4fcdac..0d9a536e71f 100644
--- a/src/devices/cpu/m6502/m6509.h
+++ b/src/devices/cpu/m6502/m6509.h
@@ -17,7 +17,7 @@ class m6509_device : public m6502_device {
public:
m6509_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/m6510.cpp b/src/devices/cpu/m6502/m6510.cpp
index 349988b850d..a977fc0c072 100644
--- a/src/devices/cpu/m6502/m6510.cpp
+++ b/src/devices/cpu/m6502/m6510.cpp
@@ -34,9 +34,9 @@ void m6510_device::set_pulls(uint8_t _pullup, uint8_t _floating)
floating = _floating;
}
-util::disasm_interface *m6510_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6510_device::create_disassembler()
{
- return new m6510_disassembler;
+ return std::make_unique<m6510_disassembler>();
}
void m6510_device::device_start()
diff --git a/src/devices/cpu/m6502/m6510.h b/src/devices/cpu/m6502/m6510.h
index 84f2cea32c7..033813cd9ad 100644
--- a/src/devices/cpu/m6502/m6510.h
+++ b/src/devices/cpu/m6502/m6510.h
@@ -32,7 +32,7 @@ public:
write_port.set_callback(wr);
}
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/m65c02.cpp b/src/devices/cpu/m6502/m65c02.cpp
index 7f4ce41dc31..ab7fdf5d3a7 100644
--- a/src/devices/cpu/m6502/m65c02.cpp
+++ b/src/devices/cpu/m6502/m65c02.cpp
@@ -25,9 +25,9 @@ m65c02_device::m65c02_device(const machine_config &mconfig, device_type type, co
{
}
-util::disasm_interface *m65c02_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m65c02_device::create_disassembler()
{
- return new m65c02_disassembler;
+ return std::make_unique<m65c02_disassembler>();
}
#include "cpu/m6502/m65c02.hxx"
diff --git a/src/devices/cpu/m6502/m65c02.h b/src/devices/cpu/m6502/m65c02.h
index c1898912b03..a1e0ba553d2 100644
--- a/src/devices/cpu/m6502/m65c02.h
+++ b/src/devices/cpu/m6502/m65c02.h
@@ -19,7 +19,7 @@ class m65c02_device : public m6502_device {
public:
m65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/m65ce02.cpp b/src/devices/cpu/m6502/m65ce02.cpp
index 7787dcef368..a882daf75df 100644
--- a/src/devices/cpu/m6502/m65ce02.cpp
+++ b/src/devices/cpu/m6502/m65ce02.cpp
@@ -24,9 +24,9 @@ m65ce02_device::m65ce02_device(const machine_config &mconfig, device_type type,
{
}
-util::disasm_interface *m65ce02_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m65ce02_device::create_disassembler()
{
- return new m65ce02_disassembler;
+ return std::make_unique<m65ce02_disassembler>();
}
void m65ce02_device::init()
diff --git a/src/devices/cpu/m6502/m65ce02.h b/src/devices/cpu/m6502/m65ce02.h
index dbefeb0f019..6e27c66e010 100644
--- a/src/devices/cpu/m6502/m65ce02.h
+++ b/src/devices/cpu/m6502/m65ce02.h
@@ -18,7 +18,7 @@ class m65ce02_device : public m65c02_device {
public:
m65ce02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/m740.cpp b/src/devices/cpu/m6502/m740.cpp
index 2a40ad3772a..684bff6773b 100644
--- a/src/devices/cpu/m6502/m740.cpp
+++ b/src/devices/cpu/m6502/m740.cpp
@@ -28,9 +28,9 @@ u32 m740_device::get_state_base() const
return inst_state_base;
}
-util::disasm_interface *m740_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m740_device::create_disassembler()
{
- return new m740_disassembler(this);
+ return std::make_unique<m740_disassembler>(this);
}
void m740_device::device_start()
diff --git a/src/devices/cpu/m6502/m740.h b/src/devices/cpu/m6502/m740.h
index be7245e328c..880e09fef7d 100644
--- a/src/devices/cpu/m6502/m740.h
+++ b/src/devices/cpu/m6502/m740.h
@@ -44,7 +44,7 @@ public:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/m6502/n2a03.cpp b/src/devices/cpu/m6502/n2a03.cpp
index cf10308b0d9..4988b2da280 100644
--- a/src/devices/cpu/m6502/n2a03.cpp
+++ b/src/devices/cpu/m6502/n2a03.cpp
@@ -57,9 +57,9 @@ n2a03_device::n2a03_device(const machine_config &mconfig, const char *tag, devic
program_config.m_internal_map = address_map_constructor(FUNC(n2a03_device::n2a03_map), this);
}
-util::disasm_interface *n2a03_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> n2a03_device::create_disassembler()
{
- return new n2a03_disassembler;
+ return std::make_unique<n2a03_disassembler>();
}
void n2a03_device::device_start()
diff --git a/src/devices/cpu/m6502/n2a03.h b/src/devices/cpu/m6502/n2a03.h
index 3f45b2fbb96..4096265b3d9 100644
--- a/src/devices/cpu/m6502/n2a03.h
+++ b/src/devices/cpu/m6502/n2a03.h
@@ -19,7 +19,7 @@ class n2a03_device : public m6502_device {
public:
n2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/r65c02.cpp b/src/devices/cpu/m6502/r65c02.cpp
index b6bc4a35eb3..190f370c933 100644
--- a/src/devices/cpu/m6502/r65c02.cpp
+++ b/src/devices/cpu/m6502/r65c02.cpp
@@ -24,9 +24,9 @@ r65c02_device::r65c02_device(const machine_config &mconfig, device_type type, co
{
}
-util::disasm_interface *r65c02_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> r65c02_device::create_disassembler()
{
- return new r65c02_disassembler;
+ return std::make_unique<r65c02_disassembler>();
}
#include "cpu/m6502/r65c02.hxx"
diff --git a/src/devices/cpu/m6502/r65c02.h b/src/devices/cpu/m6502/r65c02.h
index d6c88417bd6..a28ccd9d932 100644
--- a/src/devices/cpu/m6502/r65c02.h
+++ b/src/devices/cpu/m6502/r65c02.h
@@ -17,7 +17,7 @@ class r65c02_device : public m65c02_device {
public:
r65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/xavix.cpp b/src/devices/cpu/m6502/xavix.cpp
index 57b3c71ac6c..2a01e8ee390 100644
--- a/src/devices/cpu/m6502/xavix.cpp
+++ b/src/devices/cpu/m6502/xavix.cpp
@@ -26,9 +26,9 @@ xavix_device::xavix_device(const machine_config &mconfig, const char *tag, devic
}
-util::disasm_interface *xavix_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> xavix_device::create_disassembler()
{
- return new xavix_disassembler;
+ return std::make_unique<xavix_disassembler>();
}
diff --git a/src/devices/cpu/m6502/xavix.h b/src/devices/cpu/m6502/xavix.h
index 67014209aa0..3e55428bb8b 100644
--- a/src/devices/cpu/m6502/xavix.h
+++ b/src/devices/cpu/m6502/xavix.h
@@ -19,7 +19,7 @@ class xavix_device : public m6502_device {
public:
xavix_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6800/m6800.cpp b/src/devices/cpu/m6800/m6800.cpp
index 5285ea30661..b4cb4106094 100644
--- a/src/devices/cpu/m6800/m6800.cpp
+++ b/src/devices/cpu/m6800/m6800.cpp
@@ -579,22 +579,22 @@ void m6800_cpu_device::execute_run()
} while( m_icount>0 );
}
-util::disasm_interface *m6800_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6800_cpu_device::create_disassembler()
{
- return new m680x_disassembler(6800);
+ return std::make_unique<m680x_disassembler>(6800);
}
-util::disasm_interface *m6802_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6802_cpu_device::create_disassembler()
{
- return new m680x_disassembler(6802);
+ return std::make_unique<m680x_disassembler>(6802);
}
-util::disasm_interface *m6808_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6808_cpu_device::create_disassembler()
{
- return new m680x_disassembler(6808);
+ return std::make_unique<m680x_disassembler>(6808);
}
-util::disasm_interface *nsc8105_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> nsc8105_cpu_device::create_disassembler()
{
- return new m680x_disassembler(8105);
+ return std::make_unique<m680x_disassembler>(8105);
}
diff --git a/src/devices/cpu/m6800/m6800.h b/src/devices/cpu/m6800/m6800.h
index 38679e32e2b..74db573b96c 100644
--- a/src/devices/cpu/m6800/m6800.h
+++ b/src/devices/cpu/m6800/m6800.h
@@ -66,7 +66,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
address_space_config m_decrypted_opcodes_config;
@@ -373,7 +373,7 @@ protected:
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -383,7 +383,7 @@ public:
m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -393,7 +393,7 @@ public:
nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
diff --git a/src/devices/cpu/m6800/m6801.cpp b/src/devices/cpu/m6800/m6801.cpp
index 877952e1d29..c6842c10df0 100644
--- a/src/devices/cpu/m6800/m6801.cpp
+++ b/src/devices/cpu/m6800/m6801.cpp
@@ -1259,24 +1259,24 @@ void m6801_cpu_device::m6801_clock_serial()
}
}
-util::disasm_interface *m6801_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6801_cpu_device::create_disassembler()
{
- return new m680x_disassembler(6801);
+ return std::make_unique<m680x_disassembler>(6801);
}
-util::disasm_interface *m6803_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6803_cpu_device::create_disassembler()
{
- return new m680x_disassembler(6803);
+ return std::make_unique<m680x_disassembler>(6803);
}
-util::disasm_interface *hd6301_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hd6301_cpu_device::create_disassembler()
{
- return new m680x_disassembler(6301);
+ return std::make_unique<m680x_disassembler>(6301);
}
-util::disasm_interface *hd63701_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hd63701_cpu_device::create_disassembler()
{
- return new m680x_disassembler(63701);
+ return std::make_unique<m680x_disassembler>(63701);
}
void hd63701_cpu_device::TAKE_TRAP()
diff --git a/src/devices/cpu/m6800/m6801.h b/src/devices/cpu/m6800/m6801.h
index 154c6220ce1..c31248f18fc 100644
--- a/src/devices/cpu/m6800/m6801.h
+++ b/src/devices/cpu/m6800/m6801.h
@@ -88,7 +88,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_io_config;
@@ -159,7 +159,7 @@ public:
m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -171,7 +171,7 @@ public:
protected:
hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -181,7 +181,7 @@ public:
hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void TAKE_TRAP() override;
};
diff --git a/src/devices/cpu/m68000/m68000.h b/src/devices/cpu/m68000/m68000.h
index bc14bea27dc..7800b842328 100644
--- a/src/devices/cpu/m68000/m68000.h
+++ b/src/devices/cpu/m68000/m68000.h
@@ -111,7 +111,7 @@ protected:
void clear_all(void);
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const override { return 4; };
@@ -380,7 +380,7 @@ public:
m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 4; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -403,7 +403,7 @@ public:
// construction/destruction
m68301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 4; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -423,7 +423,7 @@ public:
// construction/destruction
m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 4; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -440,7 +440,7 @@ public:
// construction/destruction
m68008plcc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 4; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -457,7 +457,7 @@ public:
// construction/destruction
m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 4; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -474,7 +474,7 @@ public:
// construction/destruction
m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -491,7 +491,7 @@ public:
// construction/destruction
m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -508,7 +508,7 @@ public:
// construction/destruction
m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -525,7 +525,7 @@ public:
// construction/destruction
m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -542,7 +542,7 @@ public:
// construction/destruction
m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -561,7 +561,7 @@ public:
// construction/destruction
m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -578,7 +578,7 @@ public:
// construction/destruction
m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -595,7 +595,7 @@ public:
// construction/destruction
m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -612,7 +612,7 @@ public:
// construction/destruction
m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -629,7 +629,7 @@ public:
// construction/destruction
m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -646,7 +646,7 @@ public:
// construction/destruction
scc68070_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 4; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -666,7 +666,7 @@ public:
// construction/destruction
fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
@@ -689,7 +689,7 @@ public:
// construction/destruction
mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual uint32_t execute_min_cycles() const override { return 2; };
virtual uint32_t execute_max_cycles() const override { return 158; };
diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp
index bf8a92a600b..2e34f8bea61 100644
--- a/src/devices/cpu/m68000/m68kcpu.cpp
+++ b/src/devices/cpu/m68000/m68kcpu.cpp
@@ -2102,99 +2102,99 @@ void m68000_base_device::init_cpu_coldfire(void)
define_state();
}
-util::disasm_interface *m68000_base_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68000_base_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68000);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68000);
}
-util::disasm_interface *m68000_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68000_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68000);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68000);
}
-util::disasm_interface *m68301_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68301_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68000);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68000);
}
-util::disasm_interface *m68008_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68008_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68008);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68008);
}
-util::disasm_interface *m68008plcc_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68008plcc_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68008);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68008);
}
-util::disasm_interface *m68010_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68010_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68010);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68010);
}
-util::disasm_interface *m68ec020_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68ec020_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68020);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68020);
}
-util::disasm_interface *m68020_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68020_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68020);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68020);
}
-util::disasm_interface *m68020fpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68020fpu_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68020);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68020);
}
-util::disasm_interface *m68020pmmu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68020pmmu_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68020);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68020);
}
-util::disasm_interface *m68020hmmu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68020hmmu_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68020);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68020);
}
-util::disasm_interface *m68ec030_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68ec030_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68030);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68030);
}
-util::disasm_interface *m68030_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68030_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68030);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68030);
}
-util::disasm_interface *m68ec040_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68ec040_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68040);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68040);
}
-util::disasm_interface *m68lc040_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68lc040_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68040);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68040);
}
-util::disasm_interface *m68040_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68040_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68040);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68040);
}
-util::disasm_interface *scc68070_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> scc68070_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68000);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68000);
}
-util::disasm_interface *fscpu32_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> fscpu32_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_68340);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68340);
}
-util::disasm_interface *mcf5206e_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mcf5206e_device::create_disassembler()
{
- return new m68k_disassembler(m68k_disassembler::TYPE_COLDFIRE);
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_COLDFIRE);
}
diff --git a/src/devices/cpu/m6805/m6805.cpp b/src/devices/cpu/m6805/m6805.cpp
index 0fd92fd7154..3cc562d7825 100644
--- a/src/devices/cpu/m6805/m6805.cpp
+++ b/src/devices/cpu/m6805/m6805.cpp
@@ -411,9 +411,9 @@ void m6805_base_device::interrupt()
// helper function
//-------------------------------------------------
-util::disasm_interface *m6805_base_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6805_base_device::create_disassembler()
{
- return new m6805_disassembler;
+ return std::make_unique<m6805_disassembler>();
}
diff --git a/src/devices/cpu/m6805/m6805.h b/src/devices/cpu/m6805/m6805.h
index 55a15a9e849..74090368f09 100644
--- a/src/devices/cpu/m6805/m6805.h
+++ b/src/devices/cpu/m6805/m6805.h
@@ -119,7 +119,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/m6805/m68705.cpp b/src/devices/cpu/m6805/m68705.cpp
index c448901ab67..f56645c9381 100644
--- a/src/devices/cpu/m6805/m68705.cpp
+++ b/src/devices/cpu/m6805/m68705.cpp
@@ -698,9 +698,9 @@ void m68705p_device::device_start()
state_add(M68705_MOR, "MOR", get_user_rom()[0x0784]).mask(0xff);
}
-util::disasm_interface *m68705p_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68705p_device::create_disassembler()
{
- return new m6805_disassembler(m68705p_syms);
+ return std::make_unique<m6805_disassembler>(m68705p_syms);
}
@@ -772,9 +772,9 @@ void m68705u_device::device_start()
// TODO: MISC register
}
-util::disasm_interface *m68705u_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68705u_device::create_disassembler()
{
- return new m6805_disassembler(m68705u_syms);
+ return std::make_unique<m6805_disassembler>(m68705u_syms);
}
@@ -825,9 +825,9 @@ void m68705r_device::device_start()
// TODO: ADC
}
-util::disasm_interface *m68705r_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68705r_device::create_disassembler()
{
- return new m6805_disassembler(m68705r_syms);
+ return std::make_unique<m6805_disassembler>(m68705r_syms);
}
/****************************************************************************
diff --git a/src/devices/cpu/m6805/m68705.h b/src/devices/cpu/m6805/m68705.h
index 888dfdc23d1..04e2e273640 100644
--- a/src/devices/cpu/m6805/m68705.h
+++ b/src/devices/cpu/m6805/m68705.h
@@ -200,7 +200,7 @@ protected:
virtual void device_start() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -233,7 +233,7 @@ protected:
virtual void device_start() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -256,7 +256,7 @@ protected:
virtual void device_start() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
diff --git a/src/devices/cpu/m6805/m68hc05.cpp b/src/devices/cpu/m6805/m68hc05.cpp
index 2f2157a9570..232a00cf226 100644
--- a/src/devices/cpu/m6805/m68hc05.cpp
+++ b/src/devices/cpu/m6805/m68hc05.cpp
@@ -542,9 +542,9 @@ u64 m68hc05_device::execute_cycles_to_clocks(u64 cycles) const
return cycles * 2;
}
-util::disasm_interface *m68hc05_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68hc05_device::create_disassembler()
{
- return new m68hc05_disassembler;
+ return std::make_unique<m68hc05_disassembler>();
}
@@ -772,9 +772,9 @@ void m68hc05c4_device::device_start()
}
-util::disasm_interface *m68hc05c4_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68hc05c4_device::create_disassembler()
{
- return new m68hc05_disassembler(m68hc05c4_syms);
+ return std::make_unique<m68hc05_disassembler>(m68hc05c4_syms);
}
@@ -835,10 +835,10 @@ void m68hc05c8_device::device_start()
}
-util::disasm_interface *m68hc05c8_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68hc05c8_device::create_disassembler()
{
// same I/O registers as MC68HC05C4
- return new m68hc05_disassembler(m68hc05c4_syms);
+ return std::make_unique<m68hc05_disassembler>(m68hc05c4_syms);
}
@@ -922,7 +922,7 @@ void m68hc705c8a_device::device_reset()
}
-util::disasm_interface *m68hc705c8a_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m68hc705c8a_device::create_disassembler()
{
- return new m68hc05_disassembler(m68hc705c8a_syms);
+ return std::make_unique<m68hc05_disassembler>(m68hc705c8a_syms);
}
diff --git a/src/devices/cpu/m6805/m68hc05.h b/src/devices/cpu/m6805/m68hc05.h
index 4190ad9a91c..99dae24ffeb 100644
--- a/src/devices/cpu/m6805/m68hc05.h
+++ b/src/devices/cpu/m6805/m68hc05.h
@@ -135,7 +135,7 @@ protected:
virtual u64 execute_clocks_to_cycles(u64 clocks) const override;
virtual u64 execute_cycles_to_clocks(u64 cycles) const override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void interrupt() override;
virtual bool test_il() override;
@@ -221,7 +221,7 @@ protected:
virtual void device_start() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -237,7 +237,7 @@ protected:
virtual void device_start() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -256,7 +256,7 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
diff --git a/src/devices/cpu/m6809/hd6309.cpp b/src/devices/cpu/m6809/hd6309.cpp
index bbd662b9cc3..9b8b1bb4ed5 100644
--- a/src/devices/cpu/m6809/hd6309.cpp
+++ b/src/devices/cpu/m6809/hd6309.cpp
@@ -301,9 +301,9 @@ void hd6309_device::device_post_load()
// helper function
//-------------------------------------------------
-util::disasm_interface *hd6309_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hd6309_device::create_disassembler()
{
- return new hd6309_disassembler;
+ return std::make_unique<hd6309_disassembler>();
}
diff --git a/src/devices/cpu/m6809/hd6309.h b/src/devices/cpu/m6809/hd6309.h
index 26352b6fe57..daf9579db14 100644
--- a/src/devices/cpu/m6809/hd6309.h
+++ b/src/devices/cpu/m6809/hd6309.h
@@ -46,7 +46,7 @@ protected:
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual bool is_6809() override { return false; };
diff --git a/src/devices/cpu/m6809/konami.cpp b/src/devices/cpu/m6809/konami.cpp
index cf41649a101..d9cf3e2c62b 100644
--- a/src/devices/cpu/m6809/konami.cpp
+++ b/src/devices/cpu/m6809/konami.cpp
@@ -110,9 +110,9 @@ void konami_cpu_device::device_start()
// helper function
//-------------------------------------------------
-util::disasm_interface *konami_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> konami_cpu_device::create_disassembler()
{
- return new konami_disassembler;
+ return std::make_unique<konami_disassembler>();
}
diff --git a/src/devices/cpu/m6809/konami.h b/src/devices/cpu/m6809/konami.h
index e53c86e4fb2..08d1c75026e 100644
--- a/src/devices/cpu/m6809/konami.h
+++ b/src/devices/cpu/m6809/konami.h
@@ -46,7 +46,7 @@ protected:
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
typedef m6809_base_device super;
diff --git a/src/devices/cpu/m6809/m6809.cpp b/src/devices/cpu/m6809/m6809.cpp
index d54386329bf..892a23c2872 100644
--- a/src/devices/cpu/m6809/m6809.cpp
+++ b/src/devices/cpu/m6809/m6809.cpp
@@ -380,9 +380,9 @@ void m6809_base_device::state_string_export(const device_state_entry &entry, std
// helper function
//-------------------------------------------------
-util::disasm_interface *m6809_base_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> m6809_base_device::create_disassembler()
{
- return new m6809_disassembler;
+ return std::make_unique<m6809_disassembler>();
}
diff --git a/src/devices/cpu/m6809/m6809.h b/src/devices/cpu/m6809/m6809.h
index bffa63f8a7c..2187b87bf2d 100644
--- a/src/devices/cpu/m6809/m6809.h
+++ b/src/devices/cpu/m6809/m6809.h
@@ -72,7 +72,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
diff --git a/src/devices/cpu/mb86233/mb86233.cpp b/src/devices/cpu/mb86233/mb86233.cpp
index 3d49b8dc933..4c0921795f4 100644
--- a/src/devices/cpu/mb86233/mb86233.cpp
+++ b/src/devices/cpu/mb86233/mb86233.cpp
@@ -47,9 +47,9 @@ device_memory_interface::space_config_vector mb86233_cpu_device::memory_space_co
}
-util::disasm_interface *mb86233_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mb86233_cpu_device::create_disassembler()
{
- return new mb86233_disassembler;
+ return std::make_unique<mb86233_disassembler>();
}
diff --git a/src/devices/cpu/mb86233/mb86233.h b/src/devices/cpu/mb86233/mb86233.h
index 70e3a66dfd5..1d25be5eae4 100644
--- a/src/devices/cpu/mb86233/mb86233.h
+++ b/src/devices/cpu/mb86233/mb86233.h
@@ -77,7 +77,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/mb86235/mb86235.cpp b/src/devices/cpu/mb86235/mb86235.cpp
index 17ce8f0fb42..eb1baa4565e 100644
--- a/src/devices/cpu/mb86235/mb86235.cpp
+++ b/src/devices/cpu/mb86235/mb86235.cpp
@@ -288,9 +288,9 @@ void mb86235_device::state_string_export(const device_state_entry &entry, std::s
}
}
-util::disasm_interface *mb86235_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mb86235_device::create_disassembler()
{
- return new mb86235_disassembler;
+ return std::make_unique<mb86235_disassembler>();
}
diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h
index 58e8f645dda..72301d39bfd 100644
--- a/src/devices/cpu/mb86235/mb86235.h
+++ b/src/devices/cpu/mb86235/mb86235.h
@@ -78,7 +78,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
direct_read_data<-3> *m_direct;
@@ -200,6 +200,8 @@ private:
/* internal compiler state */
struct compiler_state
{
+ compiler_state &operator=(compiler_state const &) = delete;
+
uint32_t cycles; /* accumulated cycles */
uint8_t checkints; /* need to check interrupts before next instruction */
uml::code_label labelnum; /* index for local labels */
@@ -207,37 +209,37 @@ private:
void run_drc();
void flush_cache();
- void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name);
+ void alloc_handle(uml::code_handle *&handleptr, const char *name);
void compile_block(offs_t pc);
- void load_fast_iregs(drcuml_block *block);
- void save_fast_iregs(drcuml_block *block);
+ void load_fast_iregs(drcuml_block &block);
+ void save_fast_iregs(drcuml_block &block);
void static_generate_entry_point();
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_fifo();
void static_generate_memory_accessors();
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception);
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_alu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int aluop, bool alu_temp);
- void generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int mulop, bool mul_temp);
- void generate_pre_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_double_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_double_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_xfer3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_ea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int md, int arx, int ary, int disp);
- void generate_reg_read(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst);
- void generate_reg_write(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter src);
- void generate_alumul_input(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception);
+ bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_alu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int aluop, bool alu_temp);
+ void generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int mulop, bool mul_temp);
+ void generate_pre_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_double_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_double_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_xfer3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_ea(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int md, int arx, int ary, int disp);
+ void generate_reg_read(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter dst);
+ void generate_reg_write(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter src);
+ void generate_alumul_input(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul);
uml::parameter get_alu1_input(int reg);
uml::parameter get_alu_output(int reg);
uml::parameter get_mul1_input(int reg);
- void generate_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp);
- void generate_branch_target(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int type, int ef2);
+ void generate_condition(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp);
+ void generate_branch_target(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int type, int ef2);
bool has_register_clash(const opcode_desc *desc, int outreg);
bool aluop_has_result(int aluop);
bool check_previous_op_stall();
diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp
index e94bd726210..941f0f39f36 100644
--- a/src/devices/cpu/mb86235/mb86235drc.cpp
+++ b/src/devices/cpu/mb86235/mb86235drc.cpp
@@ -27,12 +27,9 @@
-using namespace uml;
-
-
// map variables
-#define MAPVAR_PC M0
-#define MAPVAR_CYCLES M1
+#define MAPVAR_PC uml::M0
+#define MAPVAR_CYCLES uml::M1
// exit codes
#define EXECUTE_OUT_OF_CYCLES 0
@@ -41,30 +38,30 @@ using namespace uml;
#define EXECUTE_RESET_CACHE 3
-#define AR(reg) mem(&m_core->ar[(reg)])
+#define AR(reg) uml::mem(&m_core->ar[(reg)])
#define AA(reg) m_regmap[(reg)]
#define AB(reg) m_regmap[(reg)+8]
#define MA(reg) m_regmap[(reg)+16]
#define MB(reg) m_regmap[(reg)+24]
-#define FLAGS_AZ mem(&m_core->flags.az)
-#define FLAGS_AN mem(&m_core->flags.an)
-#define FLAGS_AV mem(&m_core->flags.av)
-#define FLAGS_AU mem(&m_core->flags.au)
-#define FLAGS_AD mem(&m_core->flags.ad)
-#define FLAGS_ZC mem(&m_core->flags.zc)
-#define FLAGS_IL mem(&m_core->flags.il)
-#define FLAGS_NR mem(&m_core->flags.nr)
-#define FLAGS_ZD mem(&m_core->flags.zd)
-#define FLAGS_MN mem(&m_core->flags.mn)
-#define FLAGS_MZ mem(&m_core->flags.mz)
-#define FLAGS_MV mem(&m_core->flags.mv)
-#define FLAGS_MU mem(&m_core->flags.mu)
-#define FLAGS_MD mem(&m_core->flags.md)
-
-#define PRP mem(&m_core->prp)
-#define PWP mem(&m_core->pwp)
-#define RPC mem(&m_core->rpc)
-#define LPC mem(&m_core->lpc)
+#define FLAGS_AZ uml::mem(&m_core->flags.az)
+#define FLAGS_AN uml::mem(&m_core->flags.an)
+#define FLAGS_AV uml::mem(&m_core->flags.av)
+#define FLAGS_AU uml::mem(&m_core->flags.au)
+#define FLAGS_AD uml::mem(&m_core->flags.ad)
+#define FLAGS_ZC uml::mem(&m_core->flags.zc)
+#define FLAGS_IL uml::mem(&m_core->flags.il)
+#define FLAGS_NR uml::mem(&m_core->flags.nr)
+#define FLAGS_ZD uml::mem(&m_core->flags.zd)
+#define FLAGS_MN uml::mem(&m_core->flags.mn)
+#define FLAGS_MZ uml::mem(&m_core->flags.mz)
+#define FLAGS_MV uml::mem(&m_core->flags.mv)
+#define FLAGS_MU uml::mem(&m_core->flags.mu)
+#define FLAGS_MD uml::mem(&m_core->flags.md)
+
+#define PRP uml::mem(&m_core->prp)
+#define PWP uml::mem(&m_core->pwp)
+#define RPC uml::mem(&m_core->rpc)
+#define LPC uml::mem(&m_core->lpc)
#define AZ_CALC_REQUIRED ((desc->regreq[1] & 0x1) || desc->flags & OPFLAG_IN_DELAY_SLOT)
#define AN_CALC_REQUIRED ((desc->regreq[1] & 0x2) || desc->flags & OPFLAG_IN_DELAY_SLOT)
@@ -81,21 +78,21 @@ using namespace uml;
#define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
#define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define FIFOIN_RPOS mem(&m_core->fifoin.rpos)
-#define FIFOIN_WPOS mem(&m_core->fifoin.wpos)
-#define FIFOIN_NUM mem(&m_core->fifoin.num)
-#define FIFOOUT0_RPOS mem(&m_core->fifoout0.rpos)
-#define FIFOOUT0_WPOS mem(&m_core->fifoout0.wpos)
-#define FIFOOUT0_NUM mem(&m_core->fifoout0.num)
-#define FIFOOUT1_RPOS mem(&m_core->fifoout1.rpos)
-#define FIFOOUT1_WPOS mem(&m_core->fifoout1.wpos)
-#define FIFOOUT1_NUM mem(&m_core->fifoout1.num)
+#define FIFOIN_RPOS uml::mem(&m_core->fifoin.rpos)
+#define FIFOIN_WPOS uml::mem(&m_core->fifoin.wpos)
+#define FIFOIN_NUM uml::mem(&m_core->fifoin.num)
+#define FIFOOUT0_RPOS uml::mem(&m_core->fifoout0.rpos)
+#define FIFOOUT0_WPOS uml::mem(&m_core->fifoout0.wpos)
+#define FIFOOUT0_NUM uml::mem(&m_core->fifoout0.num)
+#define FIFOOUT1_RPOS uml::mem(&m_core->fifoout1.rpos)
+#define FIFOOUT1_WPOS uml::mem(&m_core->fifoout1.wpos)
+#define FIFOOUT1_NUM uml::mem(&m_core->fifoout1.num)
-inline void mb86235_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
+inline void mb86235_device::alloc_handle(uml::code_handle *&handleptr, const char *name)
{
- if (*handleptr == nullptr)
- *handleptr = drcuml->handle_alloc(name);
+ if (!handleptr)
+ handleptr = m_drcuml->handle_alloc(name);
}
@@ -199,7 +196,7 @@ load_fast_iregs - load any fast integer
registers
-------------------------------------------------*/
-inline void mb86235_device::load_fast_iregs(drcuml_block *block)
+inline void mb86235_device::load_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -217,7 +214,7 @@ save_fast_iregs - save any fast integer
registers
-------------------------------------------------*/
-void mb86235_device::save_fast_iregs(drcuml_block *block)
+void mb86235_device::save_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -266,8 +263,6 @@ void mb86235_device::compile_block(offs_t pc)
const opcode_desc *desclist;
bool override = false;
- drcuml_block *block;
-
desclist = m_drcfe->describe_code(pc);
bool succeeded = false;
@@ -275,7 +270,7 @@ void mb86235_device::compile_block(offs_t pc)
{
try
{
- block = m_drcuml->begin_block(4096);
+ drcuml_block &block(m_drcuml->begin_block(4096));
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
@@ -314,7 +309,7 @@ void mb86235_device::compile_block(offs_t pc)
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
- generate_sequence_instruction(block, &compiler, curdesc);
+ generate_sequence_instruction(block, compiler, curdesc);
/* if we need to return to the start, do it */
if (seqlast->flags & OPFLAG_RETURN_TO_START)
@@ -324,13 +319,13 @@ void mb86235_device::compile_block(offs_t pc)
nextpc = seqlast->pc + (seqlast->skipslots + 1);
/* count off cycles and go there */
- generate_update_cycles(block, &compiler, nextpc, true); // <subtract cycles>
+ generate_update_cycles(block, compiler, nextpc, true); // <subtract cycles>
if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc)
UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode
}
- block->end();
+ block.end();
succeeded = true;
}
catch (drcuml_block::abort_compilation &)
@@ -344,16 +339,14 @@ void mb86235_device::compile_block(offs_t pc)
void mb86235_device::static_generate_entry_point()
{
- //code_label skip = 1;
- drcuml_block *block;
-
+ //uml::code_label const skip = 1;
/* begin generating */
- block = m_drcuml->begin_block(20);
+ drcuml_block &block(m_drcuml->begin_block(20));
/* forward references */
- alloc_handle(m_drcuml.get(), &m_nocode, "nocode");
+ alloc_handle(m_nocode, "nocode");
- alloc_handle(m_drcuml.get(), &m_entry, "entry");
+ alloc_handle(m_entry, "entry");
UML_HANDLE(block, *m_entry); // handle entry
load_fast_iregs(block); // <load fastregs>
@@ -361,176 +354,179 @@ void mb86235_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, 0, mem(&m_core->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode
- block->end();
+ block.end();
}
void mb86235_device::static_generate_nocode_handler()
{
- drcuml_block *block;
-
/* begin generating */
- block = m_drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(m_drcuml.get(), &m_nocode, "nocode");
+ alloc_handle(m_nocode, "nocode");
UML_HANDLE(block, *m_nocode); // handle nocode
UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0
save_fast_iregs(block); // <save fastregs>
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block.end();
}
void mb86235_device::static_generate_out_of_cycles()
{
- drcuml_block *block;
-
/* begin generating */
- block = m_drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles");
+ alloc_handle(m_out_of_cycles, "out_of_cycles");
UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
save_fast_iregs(block); // <save fastregs>
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
- block->end();
+ block.end();
}
void mb86235_device::static_generate_fifo()
{
- drcuml_block *block;
-
- // clear fifo in
- block = m_drcuml->begin_block(20);
-
- alloc_handle(m_drcuml.get(), &m_clear_fifo_in, "clear_fifo_in");
- UML_HANDLE(block, *m_clear_fifo_in);
- UML_MOV(block, FIFOIN_NUM, 0);
- UML_MOV(block, FIFOIN_RPOS, 0);
- UML_MOV(block, FIFOIN_WPOS, 0);
- UML_RET(block);
-
- block->end();
-
- // clear fifo out0
- block = m_drcuml->begin_block(20);
-
- alloc_handle(m_drcuml.get(), &m_clear_fifo_out0, "clear_fifo_out0");
- UML_HANDLE(block, *m_clear_fifo_out0);
- UML_MOV(block, FIFOOUT0_NUM, 0);
- UML_MOV(block, FIFOOUT0_RPOS, 0);
- UML_MOV(block, FIFOOUT0_WPOS, 0);
- UML_RET(block);
-
- block->end();
-
- // clear fifo out1
- block = m_drcuml->begin_block(20);
-
- alloc_handle(m_drcuml.get(), &m_clear_fifo_out1, "clear_fifo_out1");
- UML_HANDLE(block, *m_clear_fifo_out1);
- UML_MOV(block, FIFOOUT1_NUM, 0);
- UML_MOV(block, FIFOOUT1_RPOS, 0);
- UML_MOV(block, FIFOOUT1_WPOS, 0);
- UML_RET(block);
-
- block->end();
-
- // read fifo in
- // I0 = return value
- block = m_drcuml->begin_block(32);
- alloc_handle(m_drcuml.get(), &m_read_fifo_in, "read_fifo_in");
- UML_HANDLE(block, *m_read_fifo_in);
- UML_MOV(block, I1, FIFOIN_RPOS);
- UML_LOAD(block, I0, m_core->fifoin.data, I1, SIZE_QWORD, SCALE_x8);
- UML_ADD(block, I1, I1, 1);
- UML_AND(block, I1, I1, FIFOIN_SIZE-1);
- UML_MOV(block, FIFOIN_RPOS, I1);
- UML_SUB(block, FIFOIN_NUM, FIFOIN_NUM, 1);
- UML_RET(block);
-
- block->end();
-
- // write fifo out0
- // I0 = input value
- block = m_drcuml->begin_block(32);
- alloc_handle(m_drcuml.get(), &m_write_fifo_out0, "write_fifo_out0");
- UML_HANDLE(block, *m_write_fifo_out0);
- UML_MOV(block, I1, FIFOOUT0_WPOS);
- UML_STORE(block, m_core->fifoout0.data, I1, I0, SIZE_QWORD, SCALE_x8);
- UML_ADD(block, I1, I1, 1);
- UML_AND(block, I1, I1, FIFOOUT0_SIZE - 1);
- UML_MOV(block, FIFOOUT0_WPOS, I1);
- UML_ADD(block, FIFOOUT0_NUM, FIFOOUT0_NUM, 1);
- UML_RET(block);
-
- block->end();
-
- // write fifo out1
- block = m_drcuml->begin_block(32);
- alloc_handle(m_drcuml.get(), &m_write_fifo_out1, "write_fifo_out1");
- UML_HANDLE(block, *m_write_fifo_out1);
- // TODO
- UML_RET(block);
-
- block->end();
+ {
+ // clear fifo in
+ drcuml_block &block(m_drcuml->begin_block(20));
+
+ alloc_handle(m_clear_fifo_in, "clear_fifo_in");
+ UML_HANDLE(block, *m_clear_fifo_in);
+ UML_MOV(block, FIFOIN_NUM, 0);
+ UML_MOV(block, FIFOIN_RPOS, 0);
+ UML_MOV(block, FIFOIN_WPOS, 0);
+ UML_RET(block);
+
+ block.end();
+ }
+ {
+ // clear fifo out0
+ drcuml_block &block(m_drcuml->begin_block(20));
+
+ alloc_handle(m_clear_fifo_out0, "clear_fifo_out0");
+ UML_HANDLE(block, *m_clear_fifo_out0);
+ UML_MOV(block, FIFOOUT0_NUM, 0);
+ UML_MOV(block, FIFOOUT0_RPOS, 0);
+ UML_MOV(block, FIFOOUT0_WPOS, 0);
+ UML_RET(block);
+
+ block.end();
+ }
+ {
+ // clear fifo out1
+ drcuml_block &block(m_drcuml->begin_block(20));
+
+ alloc_handle(m_clear_fifo_out1, "clear_fifo_out1");
+ UML_HANDLE(block, *m_clear_fifo_out1);
+ UML_MOV(block, FIFOOUT1_NUM, 0);
+ UML_MOV(block, FIFOOUT1_RPOS, 0);
+ UML_MOV(block, FIFOOUT1_WPOS, 0);
+ UML_RET(block);
+
+ block.end();
+ }
+ {
+ // read fifo in
+ // I0 = return value
+ drcuml_block &block(m_drcuml->begin_block(32));
+ alloc_handle(m_read_fifo_in, "read_fifo_in");
+ UML_HANDLE(block, *m_read_fifo_in);
+ UML_MOV(block, I1, FIFOIN_RPOS);
+ UML_LOAD(block, I0, m_core->fifoin.data, I1, SIZE_QWORD, SCALE_x8);
+ UML_ADD(block, I1, I1, 1);
+ UML_AND(block, I1, I1, FIFOIN_SIZE-1);
+ UML_MOV(block, FIFOIN_RPOS, I1);
+ UML_SUB(block, FIFOIN_NUM, FIFOIN_NUM, 1);
+ UML_RET(block);
+
+ block.end();
+ }
+ {
+ // write fifo out0
+ // I0 = input value
+ drcuml_block &block(m_drcuml->begin_block(32));
+ alloc_handle(m_write_fifo_out0, "write_fifo_out0");
+ UML_HANDLE(block, *m_write_fifo_out0);
+ UML_MOV(block, I1, FIFOOUT0_WPOS);
+ UML_STORE(block, m_core->fifoout0.data, I1, I0, SIZE_QWORD, SCALE_x8);
+ UML_ADD(block, I1, I1, 1);
+ UML_AND(block, I1, I1, FIFOOUT0_SIZE - 1);
+ UML_MOV(block, FIFOOUT0_WPOS, I1);
+ UML_ADD(block, FIFOOUT0_NUM, FIFOOUT0_NUM, 1);
+ UML_RET(block);
+
+ block.end();
+ }
+ {
+ // write fifo out1
+ drcuml_block &block(m_drcuml->begin_block(32));
+ alloc_handle(m_write_fifo_out1, "write_fifo_out1");
+ UML_HANDLE(block, *m_write_fifo_out1);
+ // TODO
+ UML_RET(block);
+
+ block.end();
+ }
}
void mb86235_device::static_generate_memory_accessors()
{
- drcuml_block *block;
- code_label label = 1;
-
- // A-Bus read handler
- // I0 = address
- // I1 = return data
- // I2 = trashed
- block = m_drcuml->begin_block(128);
-
- alloc_handle(m_drcuml.get(), &m_read_abus, "read_abus");
- UML_HANDLE(block, *m_read_abus);
- UML_CMP(block, I0, 0x400);
- UML_JMPc(block, COND_GE, label);
- // internal A-RAM
- UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA);
- UML_RET(block);
- // external
- UML_LABEL(block, label++);
- UML_AND(block, I0, I0, 0x3fff);
- UML_AND(block, I2, mem(&m_core->eb), ~0x3fff);
- UML_OR(block, I0, I0, I2);
- UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA);
- UML_RET(block);
-
- block->end();
-
- // A-Bus write handler
- // I0 = address
- // I1 = data
- // I2 = trashed
- block = m_drcuml->begin_block(128);
-
- alloc_handle(m_drcuml.get(), &m_write_abus, "write_abus");
- UML_HANDLE(block, *m_write_abus);
- UML_CMP(block, I0, 0x400);
- UML_JMPc(block, COND_GE, label);
- // internal A-RAM
- UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA);
- UML_RET(block);
- // external
- UML_LABEL(block, label++);
- UML_AND(block, I0, I0, 0x3fff);
- UML_AND(block, I2, mem(&m_core->eb), ~0x3fff);
- UML_OR(block, I0, I0, I2);
- UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA);
- UML_RET(block);
-
- block->end();
+ uml::code_label label = 1;
+
+ {
+ // A-Bus read handler
+ // I0 = address
+ // I1 = return data
+ // I2 = trashed
+ drcuml_block &block(m_drcuml->begin_block(128));
+
+ alloc_handle(m_read_abus, "read_abus");
+ UML_HANDLE(block, *m_read_abus);
+ UML_CMP(block, I0, 0x400);
+ UML_JMPc(block, COND_GE, label);
+ // internal A-RAM
+ UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA);
+ UML_RET(block);
+ // external
+ UML_LABEL(block, label++);
+ UML_AND(block, I0, I0, 0x3fff);
+ UML_AND(block, I2, mem(&m_core->eb), ~0x3fff);
+ UML_OR(block, I0, I0, I2);
+ UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA);
+ UML_RET(block);
+
+ block.end();
+ }
+ {
+ // A-Bus write handler
+ // I0 = address
+ // I1 = data
+ // I2 = trashed
+ drcuml_block &block(m_drcuml->begin_block(128));
+
+ alloc_handle(m_write_abus, "write_abus");
+ UML_HANDLE(block, *m_write_abus);
+ UML_CMP(block, I0, 0x400);
+ UML_JMPc(block, COND_GE, label);
+ // internal A-RAM
+ UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA);
+ UML_RET(block);
+ // external
+ UML_LABEL(block, label++);
+ UML_AND(block, I0, I0, 0x3fff);
+ UML_AND(block, I2, mem(&m_core->eb), ~0x3fff);
+ UML_OR(block, I0, I0, I2);
+ UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA);
+ UML_RET(block);
+
+ block.end();
+ }
}
@@ -562,7 +558,7 @@ void mb86235_device::flush_cache()
-void mb86235_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
/* add an entry for the log */
// if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
@@ -572,10 +568,10 @@ void mb86235_device::generate_sequence_instruction(drcuml_block *block, compiler
UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc
/* accumulate total cycles */
- compiler->cycles += desc->cycles;
+ compiler.cycles += desc->cycles;
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we are debugging, call the debugger */
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
@@ -610,21 +606,21 @@ void mb86235_device::generate_sequence_instruction(drcuml_block *block, compiler
}
}
-void mb86235_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception)
+void mb86235_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception)
{
/* account for cycles */
- if (compiler->cycles > 0)
+ if (compiler.cycles > 0)
{
UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
if (allow_exception)
UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc
}
- compiler->cycles = 0;
+ compiler.cycles = 0;
}
-void mb86235_device::generate_ea(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int md, int arx, int ary, int disp)
+void mb86235_device::generate_ea(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int md, int arx, int ary, int disp)
{
// Calculates EA into register I0
@@ -660,7 +656,7 @@ void mb86235_device::generate_ea(drcuml_block *block, compiler_state *compiler,
-void mb86235_device::generate_reg_read(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst)
+void mb86235_device::generate_reg_read(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter dst)
{
switch (reg)
{
@@ -705,7 +701,7 @@ void mb86235_device::generate_reg_read(drcuml_block *block, compiler_state *comp
}
-void mb86235_device::generate_reg_write(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter src)
+void mb86235_device::generate_reg_write(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter src)
{
switch (reg)
{
@@ -818,7 +814,7 @@ bool mb86235_device::aluop_has_result(int aluop)
-bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool mb86235_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint64_t opcode = desc->opptr.q[0];
@@ -856,7 +852,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
// insert FIFO IN check if needed
if (fifoin_check)
{
- code_label not_empty = compiler->labelnum++;
+ uml::code_label const not_empty = compiler.labelnum++;
UML_CMP(block, FIFOIN_NUM, 0);
UML_JMPc(block, COND_G, not_empty);
@@ -869,7 +865,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
// insert FIFO OUT0 check if needed
if (fifoout0_check)
{
- code_label not_full = compiler->labelnum++;
+ uml::code_label const not_full = compiler.labelnum++;
UML_CMP(block, FIFOOUT0_NUM, FIFOOUT0_SIZE - 1);
UML_JMPc(block, COND_L, not_full);
@@ -882,7 +878,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
// insert FIFO OUT1 check if needed
if (fifoout1_check)
{
- code_label not_full = compiler->labelnum++;
+ uml::code_label const not_full = compiler.labelnum++;
UML_CMP(block, FIFOOUT1_NUM, FIFOOUT1_SIZE - 1);
UML_JMPc(block, COND_L, not_full);
@@ -1035,7 +1031,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
// handle repeat
if (desc->userflags & OP_USERFLAG_REPEATED_OP)
{
- code_label no_repeat = compiler->labelnum++;
+ uml::code_label const no_repeat = compiler.labelnum++;
UML_SUB(block, RPC, RPC, 1);
UML_CMP(block, RPC, 0);
UML_JMPc(block, COND_LE, no_repeat);
@@ -1054,7 +1050,7 @@ bool mb86235_device::generate_opcode(drcuml_block *block, compiler_state *compil
-void mb86235_device::generate_alumul_input(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul)
+void mb86235_device::generate_alumul_input(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int reg, uml::parameter dst, bool fp, bool mul)
{
switch (reg)
{
@@ -1169,7 +1165,7 @@ uml::parameter mb86235_device::get_mul1_input(int reg)
-void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int aluop, bool alutemp)
+void mb86235_device::generate_alu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int aluop, bool alutemp)
{
int i1 = (aluop >> 10) & 0xf;
int i2 = (aluop >> 5) & 0x1f;
@@ -1179,7 +1175,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
switch (op)
{
case 0x00: // FADD
- generate_alumul_input(block, compiler, desc, i2, I0, true, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
UML_FSADD(block, F0, F0, F1);
@@ -1194,7 +1190,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x02: // FSUB
- generate_alumul_input(block, compiler, desc, i2, I0, true, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
UML_FSSUB(block, F0, F0, F1);
@@ -1209,7 +1205,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x04: // FCMP
- generate_alumul_input(block, compiler, desc, i2, I0, true, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I0, true, false);
UML_FSCOPYI(block, F0, I0);
UML_FSCOPYI(block, F1, get_alu1_input(i1));
UML_FSCMP(block, F0, F1);
@@ -1228,7 +1224,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x06: // FABC
- generate_alumul_input(block, compiler, desc, i2, I0, true, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I0, true, false);
UML_AND(block, I0, I0, 0x7fffffff);
UML_AND(block, I1, get_alu1_input(i1), 0x7fffffff);
UML_FSCOPYI(block, F0, I0);
@@ -1244,7 +1240,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x0d: // CIF
- generate_alumul_input(block, compiler, desc, i1, I1, true, false);
+ generate_alumul_input(block, compiler, desc, i1, uml::I1, true, false);
UML_FSFRINT(block, F0, I1, SIZE_DWORD);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
UML_CMP(block, I1, 0);
@@ -1255,8 +1251,8 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
case 0x0e: // CFI
{
- code_label truncate = compiler->labelnum++;
- code_label end = compiler->labelnum++;
+ uml::code_label const truncate = compiler.labelnum++;
+ uml::code_label const end = compiler.labelnum++;
UML_FSCOPYI(block, F0, get_alu1_input(i1));
UML_TEST(block, mem(&m_core->mod), 0x80);
UML_JMPc(block, COND_Z, truncate);
@@ -1281,7 +1277,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
}
case 0x10: // ADD
- generate_alumul_input(block, compiler, desc, i2, I1, false, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I1, false, false);
UML_ADD(block, I0, I1, get_alu1_input(i1));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
@@ -1295,7 +1291,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x12: // SUB
- generate_alumul_input(block, compiler, desc, i2, I1, false, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I1, false, false);
UML_SUB(block, I0, I1, get_alu1_input(i1));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
@@ -1309,7 +1305,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x14: // CMP
- generate_alumul_input(block, compiler, desc, i2, I1, false, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I1, false, false);
UML_SUB(block, I0, I1, get_alu1_input(i1));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
@@ -1327,7 +1323,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x18: // AND
- generate_alumul_input(block, compiler, desc, i2, I0, false, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I0, false, false);
UML_AND(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1));
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
@@ -1336,7 +1332,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x19: // OR
- generate_alumul_input(block, compiler, desc, i2, I0, false, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I0, false, false);
UML_OR(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1));
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
@@ -1345,7 +1341,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x1a: // XOR
- generate_alumul_input(block, compiler, desc, i2, I0, false, false);
+ generate_alumul_input(block, compiler, desc, i2, uml::I0, false, false);
UML_XOR(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1));
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_AZ);
@@ -1354,7 +1350,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x1c: // LSR
- generate_alumul_input(block, compiler, desc, i1, I0, false, false);
+ generate_alumul_input(block, compiler, desc, i1, uml::I0, false, false);
UML_SHR(block, I0, I0, i2);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
UML_CMP(block, I0, 0);
@@ -1366,7 +1362,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
break;
case 0x1d: // LSL
- generate_alumul_input(block, compiler, desc, i1, I0, false, false);
+ generate_alumul_input(block, compiler, desc, i1, uml::I0, false, false);
UML_SHL(block, I0, I0, i2);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
UML_CMP(block, I0, 0);
@@ -1385,7 +1381,7 @@ void mb86235_device::generate_alu(drcuml_block *block, compiler_state *compiler,
}
}
-void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int mulop, bool multemp)
+void mb86235_device::generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int mulop, bool multemp)
{
int i1 = (mulop >> 10) & 0xf;
int i2 = (mulop >> 5) & 0x1f;
@@ -1395,7 +1391,7 @@ void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler,
if (m)
{
// FMUL
- generate_alumul_input(block, compiler, desc, i2, I1, true, true);
+ generate_alumul_input(block, compiler, desc, i2, uml::I1, true, true);
UML_FSCOPYI(block, F1, I1);
UML_FSCOPYI(block, F0, get_mul1_input(i1));
UML_FSMUL(block, F1, F0, F1);
@@ -1411,7 +1407,7 @@ void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler,
else
{
// MUL
- generate_alumul_input(block, compiler, desc, i2, I1, false, true);
+ generate_alumul_input(block, compiler, desc, i2, uml::I1, false, true);
UML_MULS(block, I0, I0, I1, get_mul1_input(i1));
if (MZ_CALC_REQUIRED) UML_SETc(block, COND_Z, FLAGS_MZ);
if (MN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_MN);
@@ -1426,11 +1422,11 @@ void mb86235_device::generate_mul(drcuml_block *block, compiler_state *compiler,
}
-void mb86235_device::generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
// I0 = target pc for dynamic branches
- compiler_state compiler_temp = *compiler;
+ compiler_state compiler_temp(compiler);
// save branch target
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
@@ -1439,12 +1435,12 @@ void mb86235_device::generate_branch(drcuml_block *block, compiler_state *compil
}
// compile delay slots
- generate_sequence_instruction(block, &compiler_temp, desc->delay.first());
+ generate_sequence_instruction(block, compiler_temp, desc->delay.first());
// update cycles and hash jump
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(block, &compiler_temp, desc->targetpc, true);
+ generate_update_cycles(block, compiler_temp, desc->targetpc, true);
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
else
@@ -1452,20 +1448,20 @@ void mb86235_device::generate_branch(drcuml_block *block, compiler_state *compil
}
else
{
- generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), true);
+ generate_update_cycles(block, compiler_temp, uml::mem(&m_core->jmpdest), true);
UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode
}
// update compiler label
- compiler->labelnum = compiler_temp.labelnum;
+ compiler.labelnum = compiler_temp.labelnum;
/* reset the mapvar to the current cycles and account for skipped slots */
- compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ compiler.cycles += desc->skipslots;
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
}
-void mb86235_device::generate_branch_target(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int type, int ef2)
+void mb86235_device::generate_branch_target(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int type, int ef2)
{
// Calculates dynamic targets into I0
@@ -1495,7 +1491,7 @@ void mb86235_device::generate_branch_target(drcuml_block *block, compiler_state
}
-void mb86235_device::generate_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp)
+void mb86235_device::generate_condition(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int cc, bool n, uml::code_label skip_label, bool condtemp)
{
switch (cc)
{
@@ -1562,7 +1558,7 @@ void mb86235_device::generate_condition(drcuml_block *block, compiler_state *com
}
-void mb86235_device::generate_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint64_t op = desc->opptr.q[0];
int ef1 = (op >> 16) & 0x3f;
@@ -1597,7 +1593,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
case 0x10: // DBcc
{
- code_label skip_label = compiler->labelnum++;
+ uml::code_label const skip_label = compiler.labelnum++;
generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2);
generate_condition(block, compiler, desc, ef1, false, skip_label, true);
@@ -1608,7 +1604,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
case 0x11: // DBNcc
{
- code_label skip_label = compiler->labelnum++;
+ uml::code_label const skip_label = compiler.labelnum++;
generate_branch_target(block, compiler, desc, (op >> 12) & 0xf, ef2);
generate_condition(block, compiler, desc, ef1, true, skip_label, true);
@@ -1627,7 +1623,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
case 0x1a: // DCALL
{
// push PC
- code_label no_overflow = compiler->labelnum++;
+ uml::code_label const no_overflow = compiler.labelnum++;
UML_CMP(block, mem(&m_core->pcp), 4);
UML_JMPc(block, COND_L, no_overflow);
UML_MOV(block, mem(&m_core->pc), desc->pc);
@@ -1645,7 +1641,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
case 0x1b: // DRET
{
// pop PC
- code_label no_underflow = compiler->labelnum++;
+ uml::code_label const no_underflow = compiler.labelnum++;
UML_CMP(block, mem(&m_core->pcp), 0);
UML_JMPc(block, COND_G, no_underflow);
UML_MOV(block, mem(&m_core->pc), desc->pc);
@@ -1667,7 +1663,7 @@ void mb86235_device::generate_control(drcuml_block *block, compiler_state *compi
}
}
-void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint64_t opcode = desc->opptr.q[0];
@@ -1690,7 +1686,7 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile
{
if ((sr & 0x40) == 0)
{
- generate_reg_read(block, compiler, desc, sr & 0x3f, I1);
+ generate_reg_read(block, compiler, desc, sr & 0x3f, uml::I1);
}
else
{
@@ -1707,7 +1703,7 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile
if ((dr & 0x40) == 0)
{
- generate_reg_write(block, compiler, desc, dr & 0x3f, I1);
+ generate_reg_write(block, compiler, desc, dr & 0x3f, uml::I1);
}
else
{
@@ -1730,14 +1726,14 @@ void mb86235_device::generate_xfer1(drcuml_block *block, compiler_state *compile
}
}
-void mb86235_device::generate_double_xfer1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_double_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, mem(&m_core->pc), desc->pc);
UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]);
UML_CALLC(block, cfunc_unimplemented_double_xfer1, this);
}
-void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint64_t opcode = desc->opptr.q[0];
@@ -1765,7 +1761,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
{
if ((sr & 0x40) == 0)
{
- generate_reg_read(block, compiler, desc, sr & 0x3f, I1);
+ generate_reg_read(block, compiler, desc, sr & 0x3f, uml::I1);
}
else
{
@@ -1782,7 +1778,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
if ((dr & 0x40) == 0)
{
- generate_reg_write(block, compiler, desc, dr & 0x3f, I1);
+ generate_reg_write(block, compiler, desc, dr & 0x3f, uml::I1);
}
else
{
@@ -1803,7 +1799,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
// external transfer
if (dir == 0)
{
- generate_reg_read(block, compiler, desc, dr & 0x3f, I0);
+ generate_reg_read(block, compiler, desc, dr & 0x3f, uml::I0);
UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo));
UML_ADD(block, I1, I1, disp14);
UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA);
@@ -1813,7 +1809,7 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
UML_ADD(block, I1, mem(&m_core->eb), mem(&m_core->eo));
UML_ADD(block, I1, I1, disp14);
UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA);
- generate_reg_write(block, compiler, desc, dr & 0x3f, I0);
+ generate_reg_write(block, compiler, desc, dr & 0x3f, uml::I0);
}
// update EO
@@ -1826,14 +1822,14 @@ void mb86235_device::generate_xfer2(drcuml_block *block, compiler_state *compile
}
}
-void mb86235_device::generate_double_xfer2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_double_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, mem(&m_core->pc), desc->pc);
UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]);
UML_CALLC(block, cfunc_unimplemented_double_xfer2, this);
}
-void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_xfer3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint64_t opcode = desc->opptr.q[0];
@@ -1866,7 +1862,7 @@ void mb86235_device::generate_xfer3(drcuml_block *block, compiler_state *compile
}
-void mb86235_device::generate_pre_control(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mb86235_device::generate_pre_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint64_t op = desc->opptr.q[0];
int ef1 = (op >> 16) & 0x3f;
diff --git a/src/devices/cpu/mb88xx/mb88xx.cpp b/src/devices/cpu/mb88xx/mb88xx.cpp
index 5faf6bd9203..80a5b6d37bb 100644
--- a/src/devices/cpu/mb88xx/mb88xx.cpp
+++ b/src/devices/cpu/mb88xx/mb88xx.cpp
@@ -163,9 +163,9 @@ device_memory_interface::space_config_vector mb88_cpu_device::memory_space_confi
};
}
-util::disasm_interface *mb88_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mb88_cpu_device::create_disassembler()
{
- return new mb88_disassembler;
+ return std::make_unique<mb88_disassembler>();
}
diff --git a/src/devices/cpu/mb88xx/mb88xx.h b/src/devices/cpu/mb88xx/mb88xx.h
index b5dd5fe79fc..b37524de3d5 100644
--- a/src/devices/cpu/mb88xx/mb88xx.h
+++ b/src/devices/cpu/mb88xx/mb88xx.h
@@ -169,7 +169,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/mc68hc11/mc68hc11.cpp b/src/devices/cpu/mc68hc11/mc68hc11.cpp
index cebc8b47420..a48f3eed4c2 100644
--- a/src/devices/cpu/mc68hc11/mc68hc11.cpp
+++ b/src/devices/cpu/mc68hc11/mc68hc11.cpp
@@ -62,9 +62,9 @@ device_memory_interface::space_config_vector mc68hc11_cpu_device::memory_space_c
};
}
-util::disasm_interface *mc68hc11_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mc68hc11_cpu_device::create_disassembler()
{
- return new hc11_disassembler;
+ return std::make_unique<hc11_disassembler>();
}
diff --git a/src/devices/cpu/mc68hc11/mc68hc11.h b/src/devices/cpu/mc68hc11/mc68hc11.h
index e22c7f53197..d09e6ca3732 100644
--- a/src/devices/cpu/mc68hc11/mc68hc11.h
+++ b/src/devices/cpu/mc68hc11/mc68hc11.h
@@ -70,7 +70,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/mcs40/mcs40.cpp b/src/devices/cpu/mcs40/mcs40.cpp
index 29c33068edb..3285e795dba 100644
--- a/src/devices/cpu/mcs40/mcs40.cpp
+++ b/src/devices/cpu/mcs40/mcs40.cpp
@@ -860,9 +860,9 @@ void i4004_cpu_device::execute_set_input(int inputnum, int state)
device_disasm_interface implementation
***********************************************************************/
-util::disasm_interface *i4004_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i4004_cpu_device::create_disassembler()
{
- return new i4004_disassembler;
+ return std::make_unique<i4004_disassembler>();
}
@@ -1170,9 +1170,9 @@ void i4040_cpu_device::execute_set_input(int inputnum, int state)
device_disasm_interface implementation
***********************************************************************/
-util::disasm_interface *i4040_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i4040_cpu_device::create_disassembler()
{
- return new i4040_disassembler;
+ return std::make_unique<i4040_disassembler>();
}
diff --git a/src/devices/cpu/mcs40/mcs40.h b/src/devices/cpu/mcs40/mcs40.h
index 177425fff0f..a18fe7a85c2 100644
--- a/src/devices/cpu/mcs40/mcs40.h
+++ b/src/devices/cpu/mcs40/mcs40.h
@@ -363,7 +363,7 @@ protected:
virtual void execute_set_input(int inputnum, int state) override;
// device_disasm_interface implementation
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// mcs40_cpu_device_base implementation
virtual bool is_io_op(u8 opr) override;
@@ -392,7 +392,7 @@ public:
protected:
// device_disasm_interface implementation
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_execute_interface implementation
virtual u32 execute_input_lines() const override;
diff --git a/src/devices/cpu/mcs48/mcs48.cpp b/src/devices/cpu/mcs48/mcs48.cpp
index 5b59c660401..d19f92dadb6 100644
--- a/src/devices/cpu/mcs48/mcs48.cpp
+++ b/src/devices/cpu/mcs48/mcs48.cpp
@@ -338,9 +338,9 @@ device_memory_interface::space_config_vector mcs48_cpu_device::memory_space_conf
};
}
-util::disasm_interface *mcs48_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mcs48_cpu_device::create_disassembler()
{
- return new mcs48_disassembler((m_feature_mask & UPI41_FEATURE) != 0, (m_feature_mask & I802X_FEATURE) != 0);
+ return std::make_unique<mcs48_disassembler>((m_feature_mask & UPI41_FEATURE) != 0, (m_feature_mask & I802X_FEATURE) != 0);
}
/***************************************************************************
diff --git a/src/devices/cpu/mcs48/mcs48.h b/src/devices/cpu/mcs48/mcs48.h
index 58dc676219e..bbe85861bce 100644
--- a/src/devices/cpu/mcs48/mcs48.h
+++ b/src/devices/cpu/mcs48/mcs48.h
@@ -189,7 +189,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
protected:
address_space_config m_program_config;
diff --git a/src/devices/cpu/mcs51/mcs51.cpp b/src/devices/cpu/mcs51/mcs51.cpp
index 1a3e5b51c86..b5037cae522 100644
--- a/src/devices/cpu/mcs51/mcs51.cpp
+++ b/src/devices/cpu/mcs51/mcs51.cpp
@@ -2466,32 +2466,32 @@ void ds5002fp_device::nvram_write( emu_file &file )
file.write( m_sfr_ram, 0x80 );
}
-util::disasm_interface *mcs51_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mcs51_cpu_device::create_disassembler()
{
- return new i8051_disassembler;
+ return std::make_unique<i8051_disassembler>();
}
-util::disasm_interface *i8052_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i8052_device::create_disassembler()
{
- return new i8052_disassembler;
+ return std::make_unique<i8052_disassembler>();
}
-util::disasm_interface *i80c31_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i80c31_device::create_disassembler()
{
- return new i80c51_disassembler;
+ return std::make_unique<i80c51_disassembler>();
}
-util::disasm_interface *i80c51_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i80c51_device::create_disassembler()
{
- return new i80c51_disassembler;
+ return std::make_unique<i80c51_disassembler>();
}
-util::disasm_interface *i80c52_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i80c52_device::create_disassembler()
{
- return new i80c52_disassembler;
+ return std::make_unique<i80c52_disassembler>();
}
-util::disasm_interface *ds5002fp_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> ds5002fp_device::create_disassembler()
{
- return new ds5002fp_disassembler;
+ return std::make_unique<ds5002fp_disassembler>();
}
diff --git a/src/devices/cpu/mcs51/mcs51.h b/src/devices/cpu/mcs51/mcs51.h
index 2f4c096c04e..095775764f1 100644
--- a/src/devices/cpu/mcs51/mcs51.h
+++ b/src/devices/cpu/mcs51/mcs51.h
@@ -129,7 +129,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
protected:
address_space_config m_program_config;
@@ -405,7 +405,7 @@ public:
protected:
i8052_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, uint8_t features = 0);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
/* SFR Callbacks */
virtual void sfr_write(size_t offset, uint8_t data) override;
@@ -433,7 +433,7 @@ public:
i80c31_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -446,7 +446,7 @@ public:
protected:
i80c51_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, uint8_t features = 0);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
class i87c51_device : public i80c51_device
@@ -466,7 +466,7 @@ public:
protected:
i80c52_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, uint8_t features = 0);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
/* SFR Callbacks */
virtual void sfr_write(size_t offset, uint8_t data) override;
@@ -537,7 +537,7 @@ public:
virtual void nvram_write( emu_file &file ) override;
protected:
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
/* SFR Callbacks */
virtual void sfr_write(size_t offset, uint8_t data) override;
diff --git a/src/devices/cpu/mcs96/i8x9x.cpp b/src/devices/cpu/mcs96/i8x9x.cpp
index 8be334218e2..c3f154840cb 100644
--- a/src/devices/cpu/mcs96/i8x9x.cpp
+++ b/src/devices/cpu/mcs96/i8x9x.cpp
@@ -19,9 +19,9 @@ i8x9x_device::i8x9x_device(const machine_config &mconfig, device_type type, cons
{
}
-util::disasm_interface *i8x9x_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i8x9x_device::create_disassembler()
{
- return new i8x9x_disassembler;
+ return std::make_unique<i8x9x_disassembler>();
}
device_memory_interface::space_config_vector i8x9x_device::memory_space_config() const
diff --git a/src/devices/cpu/mcs96/i8x9x.h b/src/devices/cpu/mcs96/i8x9x.h
index 5684a95afc3..d239ed4c38f 100644
--- a/src/devices/cpu/mcs96/i8x9x.h
+++ b/src/devices/cpu/mcs96/i8x9x.h
@@ -30,7 +30,7 @@ protected:
virtual void device_reset() override;
virtual space_config_vector memory_space_config() const override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/mcs96/i8xc196.cpp b/src/devices/cpu/mcs96/i8xc196.cpp
index d415630f0fa..ccedc5e741d 100644
--- a/src/devices/cpu/mcs96/i8xc196.cpp
+++ b/src/devices/cpu/mcs96/i8xc196.cpp
@@ -17,9 +17,9 @@ i8xc196_device::i8xc196_device(const machine_config &mconfig, device_type type,
{
}
-util::disasm_interface *i8xc196_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> i8xc196_device::create_disassembler()
{
- return new i8xc196_disassembler;
+ return std::make_unique<i8xc196_disassembler>();
}
void i8xc196_device::io_w8(uint8_t adr, uint8_t data)
diff --git a/src/devices/cpu/mcs96/i8xc196.h b/src/devices/cpu/mcs96/i8xc196.h
index a82c1ea0515..6fa19de6410 100644
--- a/src/devices/cpu/mcs96/i8xc196.h
+++ b/src/devices/cpu/mcs96/i8xc196.h
@@ -17,7 +17,7 @@ class i8xc196_device : public mcs96_device {
protected:
i8xc196_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/melps4/melps4.cpp b/src/devices/cpu/melps4/melps4.cpp
index a749f4bc5c6..b809e914489 100644
--- a/src/devices/cpu/melps4/melps4.cpp
+++ b/src/devices/cpu/melps4/melps4.cpp
@@ -473,7 +473,7 @@ void melps4_cpu_device::execute_run()
}
}
-util::disasm_interface *melps4_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> melps4_cpu_device::create_disassembler()
{
- return new melps4_disassembler;
+ return std::make_unique<melps4_disassembler>();
}
diff --git a/src/devices/cpu/melps4/melps4.h b/src/devices/cpu/melps4/melps4.h
index ae11114aecf..e7bbe83b238 100644
--- a/src/devices/cpu/melps4/melps4.h
+++ b/src/devices/cpu/melps4/melps4.h
@@ -135,7 +135,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/minx/minx.cpp b/src/devices/cpu/minx/minx.cpp
index 7e4a898e22c..76d7df4c0dd 100644
--- a/src/devices/cpu/minx/minx.cpp
+++ b/src/devices/cpu/minx/minx.cpp
@@ -235,7 +235,7 @@ void minx_cpu_device::execute_set_input(int inputnum, int state)
}
-util::disasm_interface *minx_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> minx_cpu_device::create_disassembler()
{
- return new minx_disassembler;
+ return std::make_unique<minx_disassembler>();
}
diff --git a/src/devices/cpu/minx/minx.h b/src/devices/cpu/minx/minx.h
index 57f0456c76b..d7ecdf039a5 100644
--- a/src/devices/cpu/minx/minx.h
+++ b/src/devices/cpu/minx/minx.h
@@ -39,7 +39,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp
index d823e440b10..c46f02207e2 100644
--- a/src/devices/cpu/mips/mips3.cpp
+++ b/src/devices/cpu/mips/mips3.cpp
@@ -976,9 +976,9 @@ bool mips3_device::memory_translate(int spacenum, int intention, offs_t &address
}
-util::disasm_interface *mips3_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mips3_device::create_disassembler()
{
- return new mips3_disassembler;
+ return std::make_unique<mips3_disassembler>();
}
diff --git a/src/devices/cpu/mips/mips3.h b/src/devices/cpu/mips/mips3.h
index e207dd23469..019920df79e 100644
--- a/src/devices/cpu/mips/mips3.h
+++ b/src/devices/cpu/mips/mips3.h
@@ -18,7 +18,6 @@
#include "divtlb.h"
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
-#include "cpu/drcumlsh.h"
// NEC VR4300 series is MIPS III with 32-bit address bus and slightly custom COP0/TLB
@@ -226,15 +225,6 @@ struct mips3_tlb_entry
uint64_t entry_lo[2];
};
-/* internal compiler state */
-struct compiler_state
-{
- uint32_t cycles; /* accumulated cycles */
- uint8_t checkints; /* need to check interrupts before next instruction */
- uint8_t checksoftints; /* need to check software interrupts before next instruction */
- uml::code_label labelnum; /* index for local labels */
-};
-
#define MIPS3_MAX_TLB_ENTRIES 48
#define MCFG_MIPS3_ICACHE_SIZE(_size) \
@@ -312,7 +302,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
@@ -529,8 +519,8 @@ private:
void swr_le(uint32_t op);
void sdl_le(uint32_t op);
void sdr_le(uint32_t op);
- void load_fast_iregs(drcuml_block *block);
- void save_fast_iregs(drcuml_block *block);
+ void load_fast_iregs(drcuml_block &block);
+ void save_fast_iregs(drcuml_block &block);
void code_flush_cache();
void code_compile_block(uint8_t mode, offs_t pc);
public:
@@ -540,38 +530,49 @@ public:
void func_printf_probe();
void func_unimplemented();
private:
+ /* internal compiler state */
+ struct compiler_state
+ {
+ compiler_state &operator=(compiler_state &) = delete;
+
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
+ uint8_t checksoftints; /* need to check software interrupts before next instruction */
+ uml::code_label labelnum; /* index for local labels */
+ };
+
void static_generate_entry_point();
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_tlb_mismatch();
void static_generate_exception(uint8_t exception, int recover, const char *name);
- void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle **handleptr);
-
- void generate_update_mode(drcuml_block *block);
- void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception);
- void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg);
-
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_idt(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- bool generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg);
- bool generate_get_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg);
- bool generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_cop1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_cop1x(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
-
- void check_cop0_access(drcuml_block *block);
- void check_cop1_access(drcuml_block *block);
- void generate_badcop(drcuml_block *block, const int cop);
-
- void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
+ void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle *&handleptr);
+
+ void generate_update_mode(drcuml_block &block);
+ void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception);
+ void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg);
+
+ bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_idt(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ bool generate_set_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg);
+ bool generate_get_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg);
+ bool generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_cop1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_cop1x(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ void check_cop0_access(drcuml_block &block);
+ void check_cop1_access(drcuml_block &block);
+ void generate_badcop(drcuml_block &block, const int cop);
+
+ void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
const char *log_desc_flags_to_string(uint32_t flags);
- void log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
- void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent);
+ void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
+ void log_opcode_desc(const opcode_desc *desclist, int indent);
};
diff --git a/src/devices/cpu/mips/mips3com.h b/src/devices/cpu/mips/mips3com.h
index 677289a7763..befde0cf60c 100644
--- a/src/devices/cpu/mips/mips3com.h
+++ b/src/devices/cpu/mips/mips3com.h
@@ -7,12 +7,11 @@
Common MIPS III/IV definitions and functions
***************************************************************************/
+#ifndef MAME_CPU_MIPS_MIPS3COM_H
+#define MAME_CPU_MIPS_MIPS3COM_H
#pragma once
-#ifndef __MIPS3COM_H__
-#define __MIPS3COM_H__
-
#include "mips3.h"
@@ -37,8 +36,8 @@
***************************************************************************/
/* map variables */
-#define MAPVAR_PC M0
-#define MAPVAR_CYCLES M1
+#define MAPVAR_PC uml::M0
+#define MAPVAR_CYCLES uml::M1
/* modes */
#define MODE_KERNEL 0
@@ -187,4 +186,4 @@
#define LIMMVAL (op & 0x03ffffff)
-#endif /* __MIPS3COM_H__ */
+#endif // MAME_CPU_MIPS_MIPS3COM_H
diff --git a/src/devices/cpu/mips/mips3drc.cpp b/src/devices/cpu/mips/mips3drc.cpp
index db90d525149..a226fcbcbc7 100644
--- a/src/devices/cpu/mips/mips3drc.cpp
+++ b/src/devices/cpu/mips/mips3drc.cpp
@@ -32,8 +32,6 @@
#include "cpu/drcuml.h"
#include "cpu/drcumlsh.h"
-using namespace uml;
-
/***************************************************************************
MACROS
@@ -45,25 +43,25 @@ using namespace uml;
#define R32(reg) m_regmaplo[reg]
#define LO32 R32(REG_LO)
#define HI32 R32(REG_HI)
-#define CPR032(reg) mem(LOPTR(&m_core->cpr[0][reg]))
-#define CCR032(reg) mem(LOPTR(&m_core->ccr[0][reg]))
-#define FPR32(reg) mem((IS_FR0) ? &((float *)&m_core->cpr[1][reg & 0x1E])[BYTE_XOR_LE(reg & 1)] : (float *)&m_core->cpr[1][reg])
-#define CCR132(reg) mem(LOPTR(&m_core->ccr[1][reg]))
-#define CPR232(reg) mem(LOPTR(&m_core->cpr[2][reg]))
-#define CCR232(reg) mem(LOPTR(&m_core->ccr[2][reg]))
+#define CPR032(reg) uml::mem(LOPTR(&m_core->cpr[0][reg]))
+#define CCR032(reg) uml::mem(LOPTR(&m_core->ccr[0][reg]))
+#define FPR32(reg) uml::mem((IS_FR0) ? &((float *)&m_core->cpr[1][reg & 0x1E])[BYTE_XOR_LE(reg & 1)] : (float *)&m_core->cpr[1][reg])
+#define CCR132(reg) uml::mem(LOPTR(&m_core->ccr[1][reg]))
+#define CPR232(reg) uml::mem(LOPTR(&m_core->cpr[2][reg]))
+#define CCR232(reg) uml::mem(LOPTR(&m_core->ccr[2][reg]))
#define R64(reg) m_regmap[reg]
#define LO64 R64(REG_LO)
#define HI64 R64(REG_HI)
-#define CPR064(reg) mem(&m_core->cpr[0][reg])
-#define CCR064(reg) mem(&m_core->ccr[0][reg])
-#define FPR64(reg) mem((IS_FR0) ? (double *)&m_core->cpr[1][reg & 0x1E] : (double *)&m_core->cpr[1][reg])
-#define CCR164(reg) mem(&m_core->ccr[1][reg])
-#define CPR264(reg) mem(&m_core->cpr[2][reg])
-#define CCR264(reg) mem(&m_core->ccr[2][reg])
+#define CPR064(reg) uml::mem(&m_core->cpr[0][reg])
+#define CCR064(reg) uml::mem(&m_core->ccr[0][reg])
+#define FPR64(reg) uml::mem((IS_FR0) ? (double *)&m_core->cpr[1][reg & 0x1E] : (double *)&m_core->cpr[1][reg])
+#define CCR164(reg) uml::mem(&m_core->ccr[1][reg])
+#define CPR264(reg) uml::mem(&m_core->cpr[2][reg])
+#define CCR264(reg) uml::mem(&m_core->ccr[2][reg])
#define FCCSHIFT(which) fcc_shift[(m_flavor < MIPS3_TYPE_MIPS_IV) ? 0 : ((which) & 7)]
-#define FCCMASK(which) ((uint32_t)(1 << FCCSHIFT(which)))
+#define FCCMASK(which) (uint32_t(1 << FCCSHIFT(which)))
@@ -104,10 +102,10 @@ static inline uint32_t epc(const opcode_desc *desc)
already allocated
-------------------------------------------------*/
-static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
+static inline void alloc_handle(drcuml_state &drcuml, uml::code_handle *&handleptr, const char *name)
{
- if (*handleptr == nullptr)
- *handleptr = drcuml->handle_alloc(name);
+ if (!handleptr)
+ handleptr = drcuml.handle_alloc(name);
}
@@ -116,7 +114,7 @@ static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, c
registers
-------------------------------------------------*/
-inline void mips3_device::load_fast_iregs(drcuml_block *block)
+inline void mips3_device::load_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -131,7 +129,7 @@ inline void mips3_device::load_fast_iregs(drcuml_block *block)
registers
-------------------------------------------------*/
-inline void mips3_device::save_fast_iregs(drcuml_block *block)
+inline void mips3_device::save_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -252,18 +250,18 @@ void mips3_device::code_flush_cache()
/* add subroutines for memory accesses */
for (mode = 0; mode < 3; mode++)
{
- static_generate_memory_accessor(mode, 1, false, false, "read8", &m_read8[mode]);
- static_generate_memory_accessor(mode, 1, true, false, "write8", &m_write8[mode]);
- static_generate_memory_accessor(mode, 2, false, false, "read16", &m_read16[mode]);
- static_generate_memory_accessor(mode, 2, true, false, "write16", &m_write16[mode]);
- static_generate_memory_accessor(mode, 4, false, false, "read32", &m_read32[mode]);
- static_generate_memory_accessor(mode, 4, false, true, "read32mask", &m_read32mask[mode]);
- static_generate_memory_accessor(mode, 4, true, false, "write32", &m_write32[mode]);
- static_generate_memory_accessor(mode, 4, true, true, "write32mask", &m_write32mask[mode]);
- static_generate_memory_accessor(mode, 8, false, false, "read64", &m_read64[mode]);
- static_generate_memory_accessor(mode, 8, false, true, "read64mask", &m_read64mask[mode]);
- static_generate_memory_accessor(mode, 8, true, false, "write64", &m_write64[mode]);
- static_generate_memory_accessor(mode, 8, true, true, "write64mask", &m_write64mask[mode]);
+ static_generate_memory_accessor(mode, 1, false, false, "read8", m_read8[mode]);
+ static_generate_memory_accessor(mode, 1, true, false, "write8", m_write8[mode]);
+ static_generate_memory_accessor(mode, 2, false, false, "read16", m_read16[mode]);
+ static_generate_memory_accessor(mode, 2, true, false, "write16", m_write16[mode]);
+ static_generate_memory_accessor(mode, 4, false, false, "read32", m_read32[mode]);
+ static_generate_memory_accessor(mode, 4, false, true, "read32mask", m_read32mask[mode]);
+ static_generate_memory_accessor(mode, 4, true, false, "write32", m_write32[mode]);
+ static_generate_memory_accessor(mode, 4, true, true, "write32mask", m_write32mask[mode]);
+ static_generate_memory_accessor(mode, 8, false, false, "read64", m_read64[mode]);
+ static_generate_memory_accessor(mode, 8, false, true, "read64mask", m_read64mask[mode]);
+ static_generate_memory_accessor(mode, 8, true, false, "write64", m_write64[mode]);
+ static_generate_memory_accessor(mode, 8, true, true, "write64mask", m_write64mask[mode]);
}
}
catch (drcuml_block::abort_compilation &)
@@ -280,19 +278,17 @@ void mips3_device::code_flush_cache()
void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
{
- drcuml_state *drcuml = m_drcuml.get();
compiler_state compiler = { 0 };
const opcode_desc *seqhead, *seqlast;
const opcode_desc *desclist;
bool override = false;
- drcuml_block *block;
g_profiler.start(PROFILER_DRC_COMPILE);
/* get a description of this sequence */
desclist = m_drcfe->describe_code(pc);
- if (drcuml->logging() || drcuml->logging_native())
- log_opcode_desc(drcuml, desclist, 0);
+ if (m_drcuml->logging() || m_drcuml->logging_native())
+ log_opcode_desc(desclist, 0);
/* if we get an error back, flush the cache and try again */
bool succeeded = false;
@@ -301,7 +297,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
try
{
/* start the block */
- block = drcuml->begin_block(4096);
+ drcuml_block &block(m_drcuml->begin_block(4096));
/* loop until we get through all instruction sequences */
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
@@ -310,8 +306,8 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
uint32_t nextpc;
/* add a code log entry */
- if (drcuml->logging())
- block->append_comment("-------------------------"); // comment
+ if (m_drcuml->logging())
+ block.append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next())
@@ -320,7 +316,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
assert(seqlast != nullptr);
/* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
- if (override || !drcuml->hash_exists(mode, seqhead->pc))
+ if (override || !m_drcuml->hash_exists(mode, seqhead->pc))
UML_HASH(block, mode, seqhead->pc); // hash mode,pc
/* if we already have a hash, and this is the first sequence, assume that we */
@@ -342,7 +338,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
/* validate this code block if we're not pointing into ROM */
if (m_program->get_write_ptr(seqhead->physpc) != nullptr)
- generate_checksum_block(block, &compiler, seqhead, seqlast);
+ generate_checksum_block(block, compiler, seqhead, seqlast);
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
@@ -350,7 +346,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
- generate_sequence_instruction(block, &compiler, curdesc);
+ generate_sequence_instruction(block, compiler, curdesc);
/* if we need to return to the start, do it */
if (seqlast->flags & OPFLAG_RETURN_TO_START)
@@ -361,7 +357,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4;
/* count off cycles and go there */
- generate_update_cycles(block, &compiler, nextpc, true); // <subtract cycles>
+ generate_update_cycles(block, compiler, nextpc, true); // <subtract cycles>
/* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
if (seqlast->flags & OPFLAG_CAN_CHANGE_MODES)
@@ -373,7 +369,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
}
/* end the sequence */
- block->end();
+ block.end();
g_profiler.stop();
succeeded = true;
}
@@ -553,17 +549,15 @@ static void cfunc_unimplemented(void *param)
void mips3_device::static_generate_entry_point()
{
- drcuml_state *drcuml = m_drcuml.get();
- code_label skip = 1;
- drcuml_block *block;
+ uml::code_label const skip = 1;
- block = drcuml->begin_block(20);
+ drcuml_block &block(m_drcuml->begin_block(20));
/* forward references */
- alloc_handle(drcuml, &m_exception_norecover[EXCEPTION_INTERRUPT], "interrupt_norecover");
- alloc_handle(drcuml, &m_nocode, "nocode");
+ alloc_handle(*m_drcuml, m_exception_norecover[EXCEPTION_INTERRUPT], "interrupt_norecover");
+ alloc_handle(*m_drcuml, m_nocode, "nocode");
- alloc_handle(drcuml, &m_entry, "entry");
+ alloc_handle(*m_drcuml, m_entry, "entry");
UML_HANDLE(block, *m_entry); // handle entry
/* reset the FPU mode */
@@ -590,7 +584,7 @@ void mips3_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, mem(&m_core->mode), mem(&m_core->pc), *m_nocode);
// hashjmp <mode>,<pc>,nocode
- block->end();
+ block.end();
}
@@ -601,21 +595,18 @@ void mips3_device::static_generate_entry_point()
void mips3_device::static_generate_nocode_handler()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_nocode, "nocode");
- UML_HANDLE(block, *m_nocode); // handle nocode
+ alloc_handle(*m_drcuml, m_nocode, "nocode");
+ UML_HANDLE(block, *m_nocode); // handle nocode
UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0
+ UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block.end();
}
@@ -626,21 +617,18 @@ void mips3_device::static_generate_nocode_handler()
void mips3_device::static_generate_out_of_cycles()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_out_of_cycles, "out_of_cycles");
- UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
+ alloc_handle(*m_drcuml, m_out_of_cycles, "out_of_cycles");
+ UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
+ UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
save_fast_iregs(block);
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
- block->end();
+ block.end();
}
@@ -651,36 +639,33 @@ void mips3_device::static_generate_out_of_cycles()
void mips3_device::static_generate_tlb_mismatch()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* forward references */
- alloc_handle(drcuml, &m_exception[EXCEPTION_TLBLOAD], "exception_tlbload");
- alloc_handle(drcuml, &m_exception[EXCEPTION_TLBLOAD_FILL], "exception_tlbload_fill");
+ alloc_handle(*m_drcuml, m_exception[EXCEPTION_TLBLOAD], "exception_tlbload");
+ alloc_handle(*m_drcuml, m_exception[EXCEPTION_TLBLOAD_FILL], "exception_tlbload_fill");
/* begin generating */
- block = drcuml->begin_block(20);
+ drcuml_block &block(m_drcuml->begin_block(20));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_tlb_mismatch, "tlb_mismatch");
- UML_HANDLE(block, *m_tlb_mismatch); // handle tlb_mismatch
+ alloc_handle(*m_drcuml, m_tlb_mismatch, "tlb_mismatch");
+ UML_HANDLE(block, *m_tlb_mismatch); // handle tlb_mismatch
UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
- UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
- UML_SHR(block, I1, I0, 12); // shr i1,i0,12
- UML_LOAD(block, I1, (void *)vtlb_table(), I1, SIZE_DWORD, SCALE_x4);// load i1,[vtlb_table],i1,dword
+ UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
+ UML_SHR(block, I1, I0, 12); // shr i1,i0,12
+ UML_LOAD(block, I1, (void *)vtlb_table(), I1, SIZE_DWORD, SCALE_x4); // load i1,[vtlb_table],i1,dword
if (PRINTF_MMU)
{
static const char text[] = "TLB mismatch @ %08X (ent=%08X)\n";
- UML_MOV(block, mem(&m_core->format), (uintptr_t)text); // mov [format],text
- UML_MOV(block, mem(&m_core->arg0), I0); // mov [arg0],i0
- UML_MOV(block, mem(&m_core->arg1), I1); // mov [arg1],i1
- UML_CALLC(block, cfunc_printf_debug, this); // callc printf_debug
+ UML_MOV(block, mem(&m_core->format), (uintptr_t)text); // mov [format],text
+ UML_MOV(block, mem(&m_core->arg0), I0); // mov [arg0],i0
+ UML_MOV(block, mem(&m_core->arg1), I1); // mov [arg1],i1
+ UML_CALLC(block, cfunc_printf_debug, this); // callc printf_debug
}
- UML_TEST(block, I1, VTLB_FETCH_ALLOWED); // test i1,VTLB_FETCH_ALLOWED
- UML_JMPc(block, COND_NZ, 1); // jmp 1,nz
- UML_TEST(block, I1, VTLB_FLAG_FIXED); // test i1,VTLB_FLAG_FIXED
- UML_EXHc(block, COND_NZ, *m_exception[EXCEPTION_TLBLOAD], I0); // exh exception[TLBLOAD],i0,nz
- UML_EXH(block, *m_exception[EXCEPTION_TLBLOAD_FILL], I0); // exh exception[TLBLOAD_FILL],i0
+ UML_TEST(block, I1, VTLB_FETCH_ALLOWED); // test i1,VTLB_FETCH_ALLOWED
+ UML_JMPc(block, COND_NZ, 1); // jmp 1,nz
+ UML_TEST(block, I1, VTLB_FLAG_FIXED); // test i1,VTLB_FLAG_FIXED
+ UML_EXHc(block, COND_NZ, *m_exception[EXCEPTION_TLBLOAD], I0); // exh exception[TLBLOAD],i0,nz
+ UML_EXH(block, *m_exception[EXCEPTION_TLBLOAD_FILL], I0); // exh exception[TLBLOAD_FILL],i0
UML_LABEL(block, 1); // 1:
save_fast_iregs(block);
@@ -690,7 +675,7 @@ void mips3_device::static_generate_tlb_mismatch()
UML_AND(block, mem(&m_core->pc), I0, ~3); // and <pc>,i0,~3
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block.end();
}
@@ -701,12 +686,10 @@ void mips3_device::static_generate_tlb_mismatch()
void mips3_device::static_generate_exception(uint8_t exception, int recover, const char *name)
{
- code_handle *&exception_handle = recover ? m_exception[exception] : m_exception_norecover[exception];
- drcuml_state *drcuml = m_drcuml.get();
+ uml::code_handle *&exception_handle = recover ? m_exception[exception] : m_exception_norecover[exception];
uint32_t offset = 0x180;
- code_label next = 1;
- code_label skip = 2;
- drcuml_block *block;
+ uml::code_label const next = 1;
+ uml::code_label const skip = 2;
/* translate our fake fill exceptions into real exceptions */
if (exception == EXCEPTION_TLBLOAD_FILL || exception == EXCEPTION_TLBSTORE_FILL)
@@ -716,10 +699,10 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con
}
/* begin generating */
- block = drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, &exception_handle, name);
+ alloc_handle(*m_drcuml, exception_handle, name);
UML_HANDLE(block, *exception_handle); // handle name
/* exception parameter is expected to be the fault address in this case */
@@ -745,23 +728,23 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con
UML_RECOVER(block, I1, MAPVAR_CYCLES); // recover i1,CYCLES
}
- UML_AND(block, I2, CPR032(COP0_Cause), ~0x800000ff); // and i2,[Cause],~0x800000ff
- UML_TEST(block, I0, 1); // test i0,1
- UML_JMPc(block, COND_Z, next); // jz <next>
- UML_OR(block, I2, I2, 0x80000000); // or i2,i2,0x80000000
- UML_SUB(block, I0, I0, 1); // sub i0,i0,1
+ UML_AND(block, I2, CPR032(COP0_Cause), ~0x800000ff); // and i2,[Cause],~0x800000ff
+ UML_TEST(block, I0, 1); // test i0,1
+ UML_JMPc(block, COND_Z, next); // jz <next>
+ UML_OR(block, I2, I2, 0x80000000); // or i2,i2,0x80000000
+ UML_SUB(block, I0, I0, 1); // sub i0,i0,1
UML_LABEL(block, next); // <next>:
- UML_MOV(block, I3, offset); // mov i3,offset
+ UML_MOV(block, I3, offset); // mov i3,offset
UML_TEST(block, CPR032(COP0_Status), SR_EXL); // test [Status],SR_EXL
UML_MOVc(block, COND_Z, CPR032(COP0_EPC), I0); // mov [EPC],i0,Z
- UML_MOVc(block, COND_NZ, I3, 0x180); // mov i3,0x180,NZ
- UML_OR(block, CPR032(COP0_Cause), I2, exception << 2); // or [Cause],i2,exception << 2
+ UML_MOVc(block, COND_NZ, I3, 0x180); // mov i3,0x180,NZ
+ UML_OR(block, CPR032(COP0_Cause), I2, exception << 2); // or [Cause],i2,exception << 2
/* for BADCOP exceptions, we use the exception parameter to know which COP */
if (exception == EXCEPTION_BADCOP)
{
UML_GETEXP(block, I0); // getexp i0
- UML_ROLINS(block, CPR032(COP0_Cause), I0, 28, 0x30000000); // rolins [Cause],i0,28,0x30000000
+ UML_ROLINS(block, CPR032(COP0_Cause), I0, 28, 0x30000000); // rolins [Cause],i0,28,0x30000000
}
/* set EXL in the SR */
@@ -789,7 +772,7 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con
UML_HASHJMP(block, mem(&m_core->mode), I0, *m_nocode);// hashjmp <mode>,i0,nocode
- block->end();
+ block.end();
}
@@ -797,32 +780,30 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con
static_generate_memory_accessor
------------------------------------------------------------------*/
-void mips3_device::static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, code_handle **handleptr)
+void mips3_device::static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle *&handleptr)
{
/* on entry, address is in I0; data for writes is in I1; mask for accesses is in I2 */
/* on exit, read result is in I0 */
/* routine trashes I0-I3 */
- code_handle &exception_tlb = *m_exception[iswrite ? EXCEPTION_TLBSTORE : EXCEPTION_TLBLOAD];
- code_handle &exception_tlbfill = *m_exception[iswrite ? EXCEPTION_TLBSTORE_FILL : EXCEPTION_TLBLOAD_FILL];
- code_handle &exception_addrerr = *m_exception[iswrite ? EXCEPTION_ADDRSTORE : EXCEPTION_ADDRLOAD];
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
+ uml::code_handle &exception_tlb = *m_exception[iswrite ? EXCEPTION_TLBSTORE : EXCEPTION_TLBLOAD];
+ uml::code_handle &exception_tlbfill = *m_exception[iswrite ? EXCEPTION_TLBSTORE_FILL : EXCEPTION_TLBLOAD_FILL];
+ uml::code_handle &exception_addrerr = *m_exception[iswrite ? EXCEPTION_ADDRSTORE : EXCEPTION_ADDRLOAD];
int tlbmiss = 0;
int label = 1;
int ramnum;
/* begin generating */
- block = drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, handleptr, name);
- UML_HANDLE(block, **handleptr); // handle *handleptr
+ alloc_handle(*m_drcuml, handleptr, name);
+ UML_HANDLE(block, *handleptr); // handle handleptr
/* user mode? generate address exception if top bit is set */
if (mode == MODE_USER)
{
- UML_TEST(block, I0, 0x80000000); // test i0,0x80000000
- UML_EXHc(block, COND_NZ, exception_addrerr, I0); // exh addrerr,i0,nz
+ UML_TEST(block, I0, 0x80000000); // test i0,0x80000000
+ UML_EXHc(block, COND_NZ, exception_addrerr, I0); // exh addrerr,i0,nz
}
/* supervisor mode? generate address exception if not in user space or in $C0000000-DFFFFFFF */
@@ -998,7 +979,7 @@ void mips3_device::static_generate_memory_accessor(int mode, int size, int iswri
UML_EXH(block, exception_tlbfill, I0); // exh tlbfill,i0
}
- block->end();
+ block.end();
}
@@ -1012,7 +993,7 @@ void mips3_device::static_generate_memory_accessor(int mode, int size, int iswri
on a new SR (in i0); trashes i2
-------------------------------------------------*/
-void mips3_device::generate_update_mode(drcuml_block *block)
+void mips3_device::generate_update_mode(drcuml_block &block)
{
UML_ROLAND(block, I2, I0, 32-2, 0x06); // roland i2,i0,32-2,0x06
UML_TEST(block, I0, SR_EXL | SR_ERL); // test i0,SR_EXL | SR_ERL
@@ -1028,44 +1009,44 @@ void mips3_device::generate_update_mode(drcuml_block *block)
an exception if out
-------------------------------------------------*/
-void mips3_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception)
+void mips3_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception)
{
/* check software interrupts if pending */
- if (compiler->checksoftints)
+ if (compiler.checksoftints)
{
- code_label skip;
+ uml::code_label skip;
- compiler->checksoftints = false;
+ compiler.checksoftints = false;
UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
- UML_AND(block, I0, I0, 0x0300); // and i0,i0,0x0300
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
- UML_MOV(block, I0, param); // mov i0,nextpc
- UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
- UML_CALLH(block, *m_exception_norecover[EXCEPTION_INTERRUPT]);// callh interrupt_norecover
+ UML_AND(block, I0, I0, 0x0300); // and i0,i0,0x0300
+ UML_JMPc(block, COND_Z, skip = compiler.labelnum++); // jmp skip,Z
+ UML_MOV(block, I0, param); // mov i0,nextpc
+ UML_MOV(block, I1, compiler.cycles); // mov i1,cycles
+ UML_CALLH(block, *m_exception_norecover[EXCEPTION_INTERRUPT]); // callh interrupt_norecover
UML_LABEL(block, skip); // skip:
}
/* check full interrupts if pending */
- if (compiler->checkints)
+ if (compiler.checkints)
{
- code_label skip;
+ uml::code_label skip;
- compiler->checkints = false;
+ compiler.checkints = false;
UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
- UML_AND(block, I0, I0, 0xfc00); // and i0,i0,0xfc00
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
+ UML_AND(block, I0, I0, 0xfc00); // and i0,i0,0xfc00
+ UML_JMPc(block, COND_Z, skip = compiler.labelnum++); // jmp skip,Z
UML_TEST(block, CPR032(COP0_Status), SR_IE); // test [Status],SR_IE
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
UML_TEST(block, CPR032(COP0_Status), SR_EXL | SR_ERL); // test [Status],SR_EXL | SR_ERL
- UML_JMPc(block, COND_NZ, skip); // jmp skip,NZ
- UML_MOV(block, I0, param); // mov i0,nextpc
- UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
- UML_CALLH(block, *m_exception_norecover[EXCEPTION_INTERRUPT]);// callh interrupt_norecover
+ UML_JMPc(block, COND_NZ, skip); // jmp skip,NZ
+ UML_MOV(block, I0, param); // mov i0,nextpc
+ UML_MOV(block, I1, compiler.cycles); // mov i1,cycles
+ UML_CALLH(block, *m_exception_norecover[EXCEPTION_INTERRUPT]); // callh interrupt_norecover
UML_LABEL(block, skip); // skip:
}
/* account for cycles */
- if (compiler->cycles > 0)
+ if (compiler.cycles > 0)
{
UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
@@ -1073,7 +1054,7 @@ void mips3_device::generate_update_cycles(drcuml_block *block, compiler_state *c
UML_EXHc(block, COND_S, *m_out_of_cycles, param);
// exh out_of_cycles,nextpc
}
- compiler->cycles = 0;
+ compiler.cycles = 0;
}
@@ -1082,11 +1063,11 @@ void mips3_device::generate_update_cycles(drcuml_block *block, compiler_state *c
validate a sequence of opcodes
-------------------------------------------------*/
-void mips3_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
+void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
{
const opcode_desc *curdesc;
if (m_drcuml->logging())
- block->append_comment("[Validation for %08X]", seqhead->pc); // comment
+ block.append_comment("[Validation for %08X]", seqhead->pc); // comment
/* loose verify or single instruction: just compare and fail */
if (!(m_drcoptions & MIPS3DRC_STRICT_VERIFY) || seqhead->next() == nullptr)
@@ -1163,7 +1144,7 @@ void mips3_device::generate_checksum_block(drcuml_block *block, compiler_state *
for a single instruction in a sequence
-------------------------------------------------*/
-void mips3_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
offs_t expc;
int hotnum;
@@ -1177,18 +1158,18 @@ void mips3_device::generate_sequence_instruction(drcuml_block *block, compiler_s
UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
/* accumulate total cycles */
- compiler->cycles += desc->cycles;
+ compiler.cycles += desc->cycles;
/* is this a hotspot? */
for (hotnum = 0; hotnum < MIPS3_MAX_HOTSPOTS; hotnum++)
if (m_hotspot[hotnum].pc != 0 && desc->pc == m_hotspot[hotnum].pc && desc->opptr.l[0] == m_hotspot[hotnum].opcode)
{
- compiler->cycles += m_hotspot[hotnum].cycles;
+ compiler.cycles += m_hotspot[hotnum].cycles;
break;
}
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we want a probe, add it here */
if (desc->pc == PROBE_ADDRESS)
@@ -1282,9 +1263,9 @@ void mips3_device::generate_sequence_instruction(drcuml_block *block, compiler_s
generate_delay_slot_and_branch
------------------------------------------------------------------*/
-void mips3_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg)
+void mips3_device::generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg)
{
- compiler_state compiler_temp = *compiler;
+ compiler_state compiler_temp(compiler);
uint32_t op = desc->opptr.l[0];
/* fetch the target register if dynamic, in case it is modified by the delay slot */
@@ -1302,12 +1283,12 @@ void mips3_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_
/* compile the delay slot using temporary compiler state */
assert(desc->delay.first() != nullptr);
- generate_sequence_instruction(block, &compiler_temp, desc->delay.first()); // <next instruction>
+ generate_sequence_instruction(block, compiler_temp, desc->delay.first()); // <next instruction>
/* update the cycles and jump through the hash table to the target */
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(block, &compiler_temp, desc->targetpc, true); // <subtract cycles>
+ generate_update_cycles(block, compiler_temp, desc->targetpc, true); // <subtract cycles>
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000
else
@@ -1316,18 +1297,18 @@ void mips3_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_
}
else
{
- generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), true);
+ generate_update_cycles(block, compiler_temp, uml::mem(&m_core->jmpdest), true);
// <subtract cycles>
UML_HASHJMP(block, m_core->mode, mem(&m_core->jmpdest), *m_nocode);
// hashjmp <mode>,<rsreg>,nocode
}
/* update the label */
- compiler->labelnum = compiler_temp.labelnum;
+ compiler.labelnum = compiler_temp.labelnum;
/* reset the mapvar to the current cycles and account for skipped slots */
- compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ compiler.cycles += desc->skipslots;
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
}
@@ -1336,12 +1317,12 @@ void mips3_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_
opcode
-------------------------------------------------*/
-bool mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool mips3_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = op >> 26;
- code_label skip;
+ uml::code_label skip;
switch (opswitch)
{
@@ -1370,7 +1351,7 @@ bool mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler
case 0x04: /* BEQ - MIPS I */
case 0x14: /* BEQL - MIPS II */
UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_NE, skip = compiler->labelnum++); // jmp skip,NE
+ UML_JMPc(block, COND_NE, skip = compiler.labelnum++); // jmp skip,NE
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
return true;
@@ -1378,7 +1359,7 @@ bool mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler
case 0x05: /* BNE - MIPS I */
case 0x15: /* BNEL - MIPS II */
UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // jmp skip,E
+ UML_JMPc(block, COND_E, skip = compiler.labelnum++); // jmp skip,E
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
return true;
@@ -1388,7 +1369,7 @@ bool mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler
if (RSREG != 0)
{
UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_G, skip = compiler->labelnum++); // jmp skip,G
+ UML_JMPc(block, COND_G, skip = compiler.labelnum++); // jmp skip,G
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
}
@@ -1399,7 +1380,7 @@ bool mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler
case 0x07: /* BGTZ - MIPS I */
case 0x17: /* BGTZL - MIPS II */
UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_LE, skip = compiler->labelnum++); // jmp skip,LE
+ UML_JMPc(block, COND_LE, skip = compiler.labelnum++); // jmp skip,LE
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
return true;
@@ -1700,7 +1681,7 @@ bool mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler
case 0x38: /* SC - MIPS II */
UML_CMP(block, mem(&m_core->llbit), 0); // cmp [llbit],0
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // je skip
+ UML_JMPc(block, COND_E, skip = compiler.labelnum++); // je skip
UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
UML_CALLH(block, *m_write32[m_core->mode >> 1]); // callh write32
@@ -1720,7 +1701,7 @@ bool mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler
case 0x3c: /* SCD - MIPS III */
UML_CMP(block, mem(&m_core->llbit), 0); // cmp [llbit],0
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // je skip
+ UML_JMPc(block, COND_E, skip = compiler.labelnum++); // je skip
UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
UML_CALLH(block, *m_write64[m_core->mode >> 1]); // callh write64
@@ -1862,7 +1843,7 @@ bool mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler
'SPECIAL' group
-------------------------------------------------*/
-bool mips3_device::generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool mips3_device::generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = op & 63;
@@ -2255,11 +2236,11 @@ bool mips3_device::generate_special(drcuml_block *block, compiler_state *compile
'REGIMM' group
-------------------------------------------------*/
-bool mips3_device::generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool mips3_device::generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = RTREG;
- code_label skip;
+ uml::code_label skip;
switch (opswitch)
{
@@ -2274,7 +2255,7 @@ bool mips3_device::generate_regimm(drcuml_block *block, compiler_state *compiler
if (RSREG != 0)
{
UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_GE, skip = compiler->labelnum++); // jmp skip,GE
+ UML_JMPc(block, COND_GE, skip = compiler.labelnum++); // jmp skip,GE
generate_delay_slot_and_branch(block, compiler, desc, 0);
// <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
@@ -2293,7 +2274,7 @@ bool mips3_device::generate_regimm(drcuml_block *block, compiler_state *compiler
if (RSREG != 0)
{
UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_L, skip = compiler->labelnum++); // jmp skip,L
+ UML_JMPc(block, COND_L, skip = compiler.labelnum++); // jmp skip,L
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
}
@@ -2342,7 +2323,7 @@ bool mips3_device::generate_regimm(drcuml_block *block, compiler_state *compiler
specific group
-------------------------------------------------*/
-bool mips3_device::generate_idt(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool mips3_device::generate_idt(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = op & 0x1f;
@@ -2356,30 +2337,30 @@ bool mips3_device::generate_idt(drcuml_block *block, compiler_state *compiler, c
case 0: /* MAD */
if (RSREG != 0 && RTREG != 0)
{
- UML_MULS(block, I0, I1, R32(RSREG), R32(RTREG)); // muls i0,i1,rsreg,rtreg
- UML_ADD(block, I0, I0, LO32); // add i0,i0,lo
- UML_ADDC(block, I1, I1, HI32); // addc i1,i1,hi
- UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
- UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
+ UML_MULS(block, I0, I1, R32(RSREG), R32(RTREG)); // muls i0,i1,rsreg,rtreg
+ UML_ADD(block, I0, I0, LO32); // add i0,i0,lo
+ UML_ADDC(block, I1, I1, HI32); // addc i1,i1,hi
+ UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
+ UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
}
return true;
case 1: /* MADU */
if (RSREG != 0 && RTREG != 0)
{
- UML_MULU(block, I0, I1, R32(RSREG), R32(RTREG)); // mulu i0,i1,rsreg,rtreg
- UML_ADD(block, I0, I0, LO32); // add i0,i0,lo
- UML_ADDC(block, I1, I1, HI32); // addc i1,i1,hi
- UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
- UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
+ UML_MULU(block, I0, I1, R32(RSREG), R32(RTREG)); // mulu i0,i1,rsreg,rtreg
+ UML_ADD(block, I0, I0, LO32); // add i0,i0,lo
+ UML_ADDC(block, I1, I1, HI32); // addc i1,i1,hi
+ UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
+ UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
}
return true;
case 2: /* MUL */
if (RDREG != 0)
{
- UML_MULS(block, I0, I0, R32(RSREG), R32(RTREG)); // muls i0,i0,rsreg,rtreg
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext rdreg,i0,dword
+ UML_MULS(block, I0, I0, R32(RSREG), R32(RTREG)); // muls i0,i0,rsreg,rtreg
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext rdreg,i0,dword
}
return true;
}
@@ -2392,65 +2373,65 @@ bool mips3_device::generate_idt(drcuml_block *block, compiler_state *compiler, c
handle special COP0 registers
-------------------------------------------------*/
-bool mips3_device::generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg)
+bool mips3_device::generate_set_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
- code_label link;
+ uml::code_label link;
switch (reg)
{
case COP0_Cause:
- UML_ROLINS(block, CPR032(COP0_Cause), I0, 0, ~0xfc00); // rolins [Cause],i0,0,~0xfc00
- compiler->checksoftints = true;
+ UML_ROLINS(block, CPR032(COP0_Cause), I0, 0, ~0xfc00); // rolins [Cause],i0,0,~0xfc00
+ compiler.checksoftints = true;
if (!in_delay_slot)
generate_update_cycles(block, compiler, desc->pc + 4, true);
return true;
case COP0_Status:
- generate_update_cycles(block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
+ generate_update_cycles(block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
UML_MOV(block, I1, CPR032(COP0_Status)); // mov i1,[Status]
UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
- generate_update_mode(block); // <update mode>
- UML_XOR(block, I0, I0, I1); // xor i0,i0,i1
- UML_TEST(block, I0, 0x8000); // test i0,0x8000
+ generate_update_mode(block); // <update mode>
+ UML_XOR(block, I0, I0, I1); // xor i0,i0,i1
+ UML_TEST(block, I0, 0x8000); // test i0,0x8000
UML_CALLCc(block, COND_NZ, cfunc_mips3com_update_cycle_counting, this); // callc mips3com_update_cycle_counting,mips.core,NZ
- compiler->checkints = true;
+ compiler.checkints = true;
if (!in_delay_slot)
generate_update_cycles(block, compiler, desc->pc + 4, true);
return true;
case COP0_Count:
- generate_update_cycles(block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
- UML_MOV(block, CPR032(COP0_Count), I0); // mov [Count],i0
- UML_CALLC(block, cfunc_get_cycles, this); // callc cfunc_get_cycles,mips3
- UML_DAND(block, I0, I0, 0xffffffff); // and i0,i0,0xffffffff
- UML_DADD(block, I0, I0, I0); // dadd i0,i0,i0
+ generate_update_cycles(block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
+ UML_MOV(block, CPR032(COP0_Count), I0); // mov [Count],i0
+ UML_CALLC(block, cfunc_get_cycles, this); // callc cfunc_get_cycles,mips3
+ UML_DAND(block, I0, I0, 0xffffffff); // and i0,i0,0xffffffff
+ UML_DADD(block, I0, I0, I0); // dadd i0,i0,i0
UML_DSUB(block, mem(&m_core->count_zero_time), mem(&m_core->numcycles), I0);
- // dsub [count_zero_time],[m_numcycles],i0
- UML_CALLC(block, cfunc_mips3com_update_cycle_counting, this); // callc mips3com_update_cycle_counting,mips.core
+ // dsub [count_zero_time],[m_numcycles],i0
+ UML_CALLC(block, cfunc_mips3com_update_cycle_counting, this); // callc mips3com_update_cycle_counting,mips.core
return true;
case COP0_Compare:
- UML_MOV(block, mem(&m_core->compare_armed), 1); // mov [compare_armed],1
- generate_update_cycles(block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
+ UML_MOV(block, mem(&m_core->compare_armed), 1); // mov [compare_armed],1
+ generate_update_cycles(block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
UML_MOV(block, CPR032(COP0_Compare), I0); // mov [Compare],i0
UML_AND(block, CPR032(COP0_Cause), CPR032(COP0_Cause), ~0x8000); // and [Cause],[Cause],~0x8000
- UML_CALLC(block, cfunc_mips3com_update_cycle_counting, this); // callc mips3com_update_cycle_counting,mips.core
+ UML_CALLC(block, cfunc_mips3com_update_cycle_counting, this); // callc mips3com_update_cycle_counting,mips.core
return true;
case COP0_PRId:
return true;
case COP0_Config:
- UML_ROLINS(block, CPR032(COP0_Config), I0, 0, 0x0007); // rolins [Config],i0,0,0x0007
+ UML_ROLINS(block, CPR032(COP0_Config), I0, 0, 0x0007); // rolins [Config],i0,0,0x0007
return true;
case COP0_EntryHi:
- UML_XOR(block, I1, I0, CPR032(reg)); // xor i1,i0,cpr0[reg]
+ UML_XOR(block, I1, I0, CPR032(reg)); // xor i1,i0,cpr0[reg]
UML_MOV(block, CPR032(reg), I0); // mov cpr0[reg],i0
- UML_TEST(block, I1, 0xff); // test i1,0xff
- UML_JMPc(block, COND_Z, link = compiler->labelnum++); // jmp link,z
- UML_CALLC(block, cfunc_mips3com_asid_changed, this); // callc mips3com_asid_changed
+ UML_TEST(block, I1, 0xff); // test i1,0xff
+ UML_JMPc(block, COND_Z, link = compiler.labelnum++); // jmp link,z
+ UML_CALLC(block, cfunc_mips3com_asid_changed, this); // callc mips3com_asid_changed
UML_LABEL(block, link); // link:
return true;
@@ -2466,41 +2447,41 @@ bool mips3_device::generate_set_cop0_reg(drcuml_block *block, compiler_state *co
read special COP0 registers
-------------------------------------------------*/
-bool mips3_device::generate_get_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg)
+bool mips3_device::generate_get_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg)
{
- code_label link1, link2;
+ uml::code_label link1, link2;
switch (reg)
{
case COP0_Count:
- generate_update_cycles(block, compiler, desc->pc, false); // <subtract cycles>
- UML_CALLC(block, cfunc_get_cycles, this); // callc cfunc_get_cycles,mips3
+ generate_update_cycles(block, compiler, desc->pc, false); // <subtract cycles>
+ UML_CALLC(block, cfunc_get_cycles, this); // callc cfunc_get_cycles,mips3
UML_DSUB(block, I0, mem(&m_core->numcycles), mem(&m_core->count_zero_time));
- // dsub i0,[numcycles],[count_zero_time]
- UML_DSHR(block, I0, I0, 1); // dshr i0,i0,1
+ // dsub i0,[numcycles],[count_zero_time]
+ UML_DSHR(block, I0, I0, 1); // dshr i0,i0,1
UML_DSEXT(block, I0, I0, SIZE_DWORD); // dsext i0,i0,dword
return true;
case COP0_Random:
- generate_update_cycles(block, compiler, desc->pc, false); // <subtract cycles>
- UML_CALLC(block, cfunc_get_cycles, this); // callc cfunc_get_cycles,mips3
+ generate_update_cycles(block, compiler, desc->pc, false); // <subtract cycles>
+ UML_CALLC(block, cfunc_get_cycles, this); // callc cfunc_get_cycles,mips3
UML_DSUB(block, I0, mem(&m_core->numcycles), mem(&m_core->count_zero_time));
- // dsub i0,[numcycles],[count_zero_time]
- UML_AND(block, I1, CPR032(COP0_Wired), 0x3f); // and i1,[Wired],0x3f
- UML_SUB(block, I2, 48, I1); // sub i2,48,i1
- UML_JMPc(block, COND_BE, link1 = compiler->labelnum++); // jmp link1,BE
- UML_DAND(block, I2, I2, 0xffffffff); // dand i2,i2,0xffffffff
- UML_DDIVU(block, I0, I2, I0, I2); // ddivu i0,i2,i0,i2
- UML_ADD(block, I0, I2, I1); // add i0,i2,i1
- UML_DAND(block, I0, I0, 0x3f); // dand i0,i0,0x3f
- UML_JMP(block, link2 = compiler->labelnum++); // jmp link2
+ // dsub i0,[numcycles],[count_zero_time]
+ UML_AND(block, I1, CPR032(COP0_Wired), 0x3f); // and i1,[Wired],0x3f
+ UML_SUB(block, I2, 48, I1); // sub i2,48,i1
+ UML_JMPc(block, COND_BE, link1 = compiler.labelnum++); // jmp link1,BE
+ UML_DAND(block, I2, I2, 0xffffffff); // dand i2,i2,0xffffffff
+ UML_DDIVU(block, I0, I2, I0, I2); // ddivu i0,i2,i0,i2
+ UML_ADD(block, I0, I2, I1); // add i0,i2,i1
+ UML_DAND(block, I0, I0, 0x3f); // dand i0,i0,0x3f
+ UML_JMP(block, link2 = compiler.labelnum++); // jmp link2
UML_LABEL(block, link1); // link1:
- UML_DMOV(block, I0, 47); // dmov i0,47
+ UML_DMOV(block, I0, 47); // dmov i0,47
UML_LABEL(block, link2); // link2:
return true;
default:
- UML_DSEXT(block, I0, CPR032(reg), SIZE_DWORD); // dsext i0,cpr0[reg],dword
+ UML_DSEXT(block, I0, CPR032(reg), SIZE_DWORD); // dsext i0,cpr0[reg],dword
return true;
}
}
@@ -2510,7 +2491,7 @@ bool mips3_device::generate_get_cop0_reg(drcuml_block *block, compiler_state *co
generate_badcop - raise a BADCOP exception
-------------------------------------------------------------------------*/
-void mips3_device::generate_badcop(drcuml_block *block, const int cop)
+void mips3_device::generate_badcop(drcuml_block &block, const int cop)
{
UML_TEST(block, CPR032(COP0_Status), SR_COP0 << cop); // test [Status], SR_COP0 << cop
UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], cop); // exh badcop,cop,Z
@@ -2520,7 +2501,7 @@ void mips3_device::generate_badcop(drcuml_block *block, const int cop)
check_cop0_access - raise a BADCOP exception if we're not in kernel mode
-------------------------------------------------------------------------*/
-void mips3_device::check_cop0_access(drcuml_block *block)
+void mips3_device::check_cop0_access(drcuml_block &block)
{
if ((m_core->mode >> 1) != MODE_KERNEL)
{
@@ -2532,7 +2513,7 @@ void mips3_device::check_cop0_access(drcuml_block *block)
generate_cop0 - compile COP0 opcodes
-------------------------------------------------*/
-bool mips3_device::generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool mips3_device::generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = RSREG;
@@ -2542,7 +2523,7 @@ bool mips3_device::generate_cop0(drcuml_block *block, compiler_state *compiler,
if ((m_core->mode >> 1) != MODE_KERNEL)
{
UML_TEST(block, CPR032(COP0_Status), SR_COP0); // test [Status],SR_COP0
- UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], 0);// exh cop,0,Z
+ UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], 0); // exh cop,0,Z
}
switch (opswitch)
@@ -2550,36 +2531,36 @@ bool mips3_device::generate_cop0(drcuml_block *block, compiler_state *compiler,
case 0x00: /* MFCz */
if (RTREG != 0)
{
- generate_get_cop0_reg(block, compiler, desc, RDREG); // <get cop0 reg>
- UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0,dword
+ generate_get_cop0_reg(block, compiler, desc, RDREG); // <get cop0 reg>
+ UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0,dword
}
return true;
case 0x01: /* DMFCz */
if (RTREG != 0)
{
- generate_get_cop0_reg(block, compiler, desc, RDREG); // <get cop0 reg>
+ generate_get_cop0_reg(block, compiler, desc, RDREG); // <get cop0 reg>
UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
}
return true;
case 0x02: /* CFCz */
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), CCR032(RDREG), SIZE_DWORD); // dsext <rtreg>,ccr0[rdreg],dword
+ UML_DSEXT(block, R64(RTREG), CCR032(RDREG), SIZE_DWORD); // dsext <rtreg>,ccr0[rdreg],dword
return true;
case 0x04: /* MTCz */
- UML_DSEXT(block, I0, R32(RTREG), SIZE_DWORD); // dsext i0,<rtreg>,dword
- generate_set_cop0_reg(block, compiler, desc, RDREG); // <set cop0 reg>
+ UML_DSEXT(block, I0, R32(RTREG), SIZE_DWORD); // dsext i0,<rtreg>,dword
+ generate_set_cop0_reg(block, compiler, desc, RDREG); // <set cop0 reg>
return true;
case 0x05: /* DMTCz */
UML_DMOV(block, I0, R64(RTREG)); // dmov i0,<rtreg>
- generate_set_cop0_reg(block, compiler, desc, RDREG); // <set cop0 reg>
+ generate_set_cop0_reg(block, compiler, desc, RDREG); // <set cop0 reg>
return true;
case 0x06: /* CTCz */
- UML_DSEXT(block, CCR064(RDREG), R32(RTREG), SIZE_DWORD); // dsext ccr0[rdreg],<rtreg>,dword
+ UML_DSEXT(block, CCR064(RDREG), R32(RTREG), SIZE_DWORD); // dsext ccr0[rdreg],<rtreg>,dword
return true;
case 0x10:
@@ -2601,42 +2582,42 @@ bool mips3_device::generate_cop0(drcuml_block *block, compiler_state *compiler,
switch (op & 0x01ffffff)
{
case 0x01: /* TLBR */
- UML_CALLC(block, cfunc_mips3com_tlbr, this); // callc mips3com_tlbr,mips3
+ UML_CALLC(block, cfunc_mips3com_tlbr, this); // callc mips3com_tlbr,mips3
return true;
case 0x02: /* TLBWI */
- UML_CALLC(block, cfunc_mips3com_tlbwi, this); // callc mips3com_tlbwi,mips3
+ UML_CALLC(block, cfunc_mips3com_tlbwi, this); // callc mips3com_tlbwi,mips3
return true;
case 0x06: /* TLBWR */
- UML_CALLC(block, cfunc_mips3com_tlbwr, this); // callc mips3com_tlbwr,mips3
+ UML_CALLC(block, cfunc_mips3com_tlbwr, this); // callc mips3com_tlbwr,mips3
return true;
case 0x08: /* TLBP */
- UML_CALLC(block, cfunc_mips3com_tlbp, this); // callc mips3com_tlbp,mips3
+ UML_CALLC(block, cfunc_mips3com_tlbp, this); // callc mips3com_tlbp,mips3
return true;
case 0x18: /* ERET */
- UML_MOV(block, mem(&m_core->llbit), 0); // mov [llbit],0
+ UML_MOV(block, mem(&m_core->llbit), 0); // mov [llbit],0
UML_MOV(block, I0, CPR032(COP0_Status)); // mov i0,[Status]
- UML_TEST(block, I0, SR_ERL); // test i0,SR_ERL
- UML_JMPc(block, COND_NZ, skip = compiler->labelnum++); // jmp skip,nz
- UML_AND(block, I0, I0, ~SR_EXL); // and i0,i0,~SR_EXL
+ UML_TEST(block, I0, SR_ERL); // test i0,SR_ERL
+ UML_JMPc(block, COND_NZ, skip = compiler.labelnum++); // jmp skip,nz
+ UML_AND(block, I0, I0, ~SR_EXL); // and i0,i0,~SR_EXL
UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
generate_update_mode(block);
- compiler->checkints = true;
+ compiler.checkints = true;
generate_update_cycles(block, compiler, CPR032(COP0_EPC), true);// <subtract cycles>
UML_HASHJMP(block, mem(&m_core->mode), CPR032(COP0_EPC), *m_nocode);
- // hashjmp <mode>,[EPC],nocode
+ // hashjmp <mode>,[EPC],nocode
UML_LABEL(block, skip); // skip:
- UML_AND(block, I0, I0, ~SR_ERL); // and i0,i0,~SR_ERL
+ UML_AND(block, I0, I0, ~SR_ERL); // and i0,i0,~SR_ERL
UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
generate_update_mode(block);
- compiler->checkints = true;
+ compiler.checkints = true;
generate_update_cycles(block, compiler, CPR032(COP0_ErrorPC), true);
- // <subtract cycles>
+ // <subtract cycles>
UML_HASHJMP(block, mem(&m_core->mode), CPR032(COP0_ErrorPC), *m_nocode);
- // hashjmp <mode>,[EPC],nocode
+ // hashjmp <mode>,[EPC],nocode
return true;
case 0x20: /* WAIT */
@@ -2658,7 +2639,7 @@ bool mips3_device::generate_cop0(drcuml_block *block, compiler_state *compiler,
check_cop1_access - raise a BADCOP exception if COP1 is not enabled
-------------------------------------------------------------------------*/
-void mips3_device::check_cop1_access(drcuml_block *block)
+void mips3_device::check_cop1_access(drcuml_block &block)
{
if (m_drcoptions & MIPS3DRC_STRICT_COP1)
{
@@ -2670,11 +2651,11 @@ void mips3_device::check_cop1_access(drcuml_block *block)
generate_cop1 - compile COP1 opcodes
---------------------------------------------------------*/
-bool mips3_device::generate_cop1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool mips3_device::generate_cop1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
- code_label skip;
- condition_t condition;
+ uml::code_label skip;
+ uml::condition_t condition;
check_cop1_access(block);
@@ -2717,7 +2698,7 @@ bool mips3_device::generate_cop1(drcuml_block *block, compiler_state *compiler,
UML_XOR(block, I0, CCR132(31), R32(RTREG)); // xor i0,ccr1[31],<rtreg>
UML_DSEXT(block, CCR164(31), R32(RTREG), SIZE_DWORD); // dsext ccr1[31],<rtreg>,dword
UML_TEST(block, I0, 3); // test i0,3
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
+ UML_JMPc(block, COND_Z, skip = compiler.labelnum++); // jmp skip,Z
UML_AND(block, I0, CCR132(31), 3); // and i0,ccr1[31],3
UML_LOAD(block, I0, &m_fpmode[0], I0, SIZE_BYTE, SCALE_x1); // load i0,fpmode,i0,byte
UML_SETFMOD(block, I0); // setfmod i0
@@ -2731,7 +2712,7 @@ bool mips3_device::generate_cop1(drcuml_block *block, compiler_state *compiler,
case 0x00: /* BCzF - MIPS I */
case 0x02: /* BCzFL - MIPS II */
UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr1[31],fccmask[which]
- UML_JMPc(block, COND_NZ, skip = compiler->labelnum++); // jmp skip,NZ
+ UML_JMPc(block, COND_NZ, skip = compiler.labelnum++); // jmp skip,NZ
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
return true;
@@ -2739,7 +2720,7 @@ bool mips3_device::generate_cop1(drcuml_block *block, compiler_state *compiler,
case 0x01: /* BCzT - MIPS I */
case 0x03: /* BCzTL - MIPS II */
UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr1[31],fccmask[which]
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
+ UML_JMPc(block, COND_Z, skip = compiler.labelnum++); // jmp skip,Z
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
return true;
@@ -2930,7 +2911,7 @@ bool mips3_device::generate_cop1(drcuml_block *block, compiler_state *compiler,
return true;
case 0x11:
- condition = ((op >> 16) & 1) ? COND_NZ : COND_Z;
+ condition = ((op >> 16) & 1) ? uml::COND_NZ : uml::COND_Z;
UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr31,fccmask[op]
if (IS_SINGLE(op)) /* MOVT/F.S - MIPS IV */
{
@@ -3181,7 +3162,7 @@ bool mips3_device::generate_cop1(drcuml_block *block, compiler_state *compiler,
generate_cop1x - compile COP1X opcodes
----------------------------------------------------------*/
-bool mips3_device::generate_cop1x(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool mips3_device::generate_cop1x(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
uint32_t op = desc->opptr.l[0];
@@ -3283,7 +3264,7 @@ bool mips3_device::generate_cop1x(drcuml_block *block, compiler_state *compiler,
including disassembly of a MIPS instruction
-------------------------------------------------*/
-void mips3_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
+void mips3_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op)
{
if (m_drcuml->logging())
{
@@ -3291,7 +3272,7 @@ void mips3_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint
std::ostringstream stream;
mips3d.dasm_one(stream, pc, op);
const std::string stream_string = stream.str();
- block->append_comment("%08X: %s", pc, stream_string.c_str()); // comment
+ block.append_comment("%08X: %s", pc, stream_string.c_str()); // comment
}
}
@@ -3356,7 +3337,7 @@ const char *mips3_device::log_desc_flags_to_string(uint32_t flags)
log_register_list - log a list of GPR registers
-------------------------------------------------*/
-void mips3_device::log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist)
+void mips3_device::log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist)
{
int count = 0;
int regnum;
@@ -3365,44 +3346,44 @@ void mips3_device::log_register_list(drcuml_state *drcuml, const char *string, c
if (reglist[0] == 0 && reglist[1] == 0 && reglist[2] == 0)
return;
- drcuml->log_printf("[%s:", string);
+ m_drcuml->log_printf("[%s:", string);
for (regnum = 1; regnum < 32; regnum++)
if (reglist[0] & REGFLAG_R(regnum))
{
- drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum);
+ m_drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum);
if (regnostarlist != nullptr && !(regnostarlist[0] & REGFLAG_R(regnum)))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
for (regnum = 0; regnum < 32; regnum++)
if (reglist[1] & REGFLAG_CPR1(regnum))
{
- drcuml->log_printf("%sfr%d", (count++ == 0) ? "" : ",", regnum);
+ m_drcuml->log_printf("%sfr%d", (count++ == 0) ? "" : ",", regnum);
if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_CPR1(regnum)))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
if (reglist[2] & REGFLAG_LO)
{
- drcuml->log_printf("%slo", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%slo", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[2] & REGFLAG_LO))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
if (reglist[2] & REGFLAG_HI)
{
- drcuml->log_printf("%shi", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%shi", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[2] & REGFLAG_HI))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
if (reglist[2] & REGFLAG_FCC)
{
- drcuml->log_printf("%sfcc", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%sfcc", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[2] & REGFLAG_FCC))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
- drcuml->log_printf("] ");
+ m_drcuml->log_printf("] ");
}
@@ -3410,11 +3391,11 @@ void mips3_device::log_register_list(drcuml_state *drcuml, const char *string, c
log_opcode_desc - log a list of descriptions
-------------------------------------------------*/
-void mips3_device::log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent)
+void mips3_device::log_opcode_desc(const opcode_desc *desclist, int indent)
{
/* open the file, creating it if necessary */
if (indent == 0)
- drcuml->log_printf("\nDescriptor list @ %08X\n", desclist->pc);
+ m_drcuml->log_printf("\nDescriptor list @ %08X\n", desclist->pc);
/* output each descriptor */
for ( ; desclist != nullptr; desclist = desclist->next())
@@ -3422,7 +3403,7 @@ void mips3_device::log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desc
std::ostringstream buffer;
/* disassemle the current instruction and output it to the log */
- if (drcuml->logging() || drcuml->logging_native())
+ if (m_drcuml->logging() || m_drcuml->logging_native())
{
if (desclist->flags & OPFLAG_VIRTUAL_NOOP)
buffer << "<virtual nop>";
@@ -3436,19 +3417,19 @@ void mips3_device::log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desc
buffer << "???";
const std::string buffer_string = buffer.str();
- drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), buffer_string.c_str());
+ m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), buffer_string.c_str());
/* output register states */
- log_register_list(drcuml, "use", desclist->regin, nullptr);
- log_register_list(drcuml, "mod", desclist->regout, desclist->regreq);
- drcuml->log_printf("\n");
+ log_register_list("use", desclist->regin, nullptr);
+ log_register_list("mod", desclist->regout, desclist->regreq);
+ m_drcuml->log_printf("\n");
/* if we have a delay slot, output it recursively */
if (desclist->delay.first() != nullptr)
- log_opcode_desc(drcuml, desclist->delay.first(), indent + 1);
+ log_opcode_desc(desclist->delay.first(), indent + 1);
/* at the end of a sequence add a dividing line */
if (desclist->flags & OPFLAG_END_SEQUENCE)
- drcuml->log_printf("-----\n");
+ m_drcuml->log_printf("-----\n");
}
}
diff --git a/src/devices/cpu/mips/mips3fe.h b/src/devices/cpu/mips/mips3fe.h
index 15e90c922e0..0b8e9d79fec 100644
--- a/src/devices/cpu/mips/mips3fe.h
+++ b/src/devices/cpu/mips/mips3fe.h
@@ -7,12 +7,11 @@
Front-end for MIPS3 recompiler
***************************************************************************/
+#ifndef MAME_CPU_MIPS_MIPS3FE_H
+#define MAME_CPU_MIPS_MIPS3FE_H
#pragma once
-#ifndef __MIPS3FE_H__
-#define __MIPS3FE_H__
-
//**************************************************************************
// MACROS
@@ -30,4 +29,4 @@
#define REGFLAG_FCC (1 << 2)
-#endif /* __MIPS3FE_H__ */
+#endif // MAME_CPU_MIPS_MIPS3FE_H
diff --git a/src/devices/cpu/mips/r3000.cpp b/src/devices/cpu/mips/r3000.cpp
index 30571d00d6c..57f0dfe0d96 100644
--- a/src/devices/cpu/mips/r3000.cpp
+++ b/src/devices/cpu/mips/r3000.cpp
@@ -458,9 +458,9 @@ void r3000_device::state_string_export(const device_state_entry &entry, std::str
// helper function
//-------------------------------------------------
-util::disasm_interface *r3000_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> r3000_device::create_disassembler()
{
- return new r3000_disassembler;
+ return std::make_unique<r3000_disassembler>();
}
diff --git a/src/devices/cpu/mips/r3000.h b/src/devices/cpu/mips/r3000.h
index 9af401484d2..86ecec13a5b 100644
--- a/src/devices/cpu/mips/r3000.h
+++ b/src/devices/cpu/mips/r3000.h
@@ -113,7 +113,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// memory accessors
struct r3000_data_accessors
diff --git a/src/devices/cpu/mn10200/mn10200.cpp b/src/devices/cpu/mn10200/mn10200.cpp
index 0d59ad3e688..2ffd397ed2c 100644
--- a/src/devices/cpu/mn10200/mn10200.cpp
+++ b/src/devices/cpu/mn10200/mn10200.cpp
@@ -89,9 +89,9 @@ void mn10200_device::state_string_export(const device_state_entry &entry, std::s
}
}
-util::disasm_interface *mn10200_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mn10200_device::create_disassembler()
{
- return new mn10200_disassembler;
+ return std::make_unique<mn10200_disassembler>();
}
diff --git a/src/devices/cpu/mn10200/mn10200.h b/src/devices/cpu/mn10200/mn10200.h
index aadeff37281..714fd9385e7 100644
--- a/src/devices/cpu/mn10200/mn10200.h
+++ b/src/devices/cpu/mn10200/mn10200.h
@@ -88,7 +88,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/nanoprocessor/nanoprocessor.cpp b/src/devices/cpu/nanoprocessor/nanoprocessor.cpp
index 97ff8fb741b..802663f86c1 100644
--- a/src/devices/cpu/nanoprocessor/nanoprocessor.cpp
+++ b/src/devices/cpu/nanoprocessor/nanoprocessor.cpp
@@ -170,9 +170,9 @@ void hp_nanoprocessor_device::state_string_export(const device_state_entry &entr
}
-util::disasm_interface *hp_nanoprocessor_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> hp_nanoprocessor_device::create_disassembler()
{
- return new hp_nanoprocessor_disassembler;
+ return std::make_unique<hp_nanoprocessor_disassembler>();
}
void hp_nanoprocessor_device::execute_one(uint8_t opcode)
diff --git a/src/devices/cpu/nanoprocessor/nanoprocessor.h b/src/devices/cpu/nanoprocessor/nanoprocessor.h
index 1a8c820e748..93f5b910eba 100644
--- a/src/devices/cpu/nanoprocessor/nanoprocessor.h
+++ b/src/devices/cpu/nanoprocessor/nanoprocessor.h
@@ -91,7 +91,7 @@ public:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
static constexpr unsigned HP_NANO_REGS = 16; // Number of GP registers
diff --git a/src/devices/cpu/nec/nec.cpp b/src/devices/cpu/nec/nec.cpp
index 89beeb9d087..f7ca3da75b1 100644
--- a/src/devices/cpu/nec/nec.cpp
+++ b/src/devices/cpu/nec/nec.cpp
@@ -170,9 +170,9 @@ v33a_device::v33a_device(const machine_config &mconfig, const char *tag, device_
}
-util::disasm_interface *nec_common_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> nec_common_device::create_disassembler()
{
- return new nec_disassembler;
+ return std::make_unique<nec_disassembler>();
}
diff --git a/src/devices/cpu/nec/nec.h b/src/devices/cpu/nec/nec.h
index c868b58524e..244c448f794 100644
--- a/src/devices/cpu/nec/nec.h
+++ b/src/devices/cpu/nec/nec.h
@@ -48,7 +48,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/nec/v25.cpp b/src/devices/cpu/nec/v25.cpp
index f846c1541e4..617a3af9366 100644
--- a/src/devices/cpu/nec/v25.cpp
+++ b/src/devices/cpu/nec/v25.cpp
@@ -419,9 +419,9 @@ void v25_common_device::execute_set_input(int irqline, int state)
}
}
-util::disasm_interface *v25_common_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> v25_common_device::create_disassembler()
{
- return new nec_disassembler(m_v25v35_decryptiontable);
+ return std::make_unique<nec_disassembler>(m_v25v35_decryptiontable);
}
void v25_common_device::device_start()
diff --git a/src/devices/cpu/nec/v25.h b/src/devices/cpu/nec/v25.h
index b796bed3b67..e9ab912111b 100644
--- a/src/devices/cpu/nec/v25.h
+++ b/src/devices/cpu/nec/v25.h
@@ -93,7 +93,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/nuon/nuon.h b/src/devices/cpu/nuon/nuon.h
index 14b5e185d4d..6add914cb4a 100644
--- a/src/devices/cpu/nuon/nuon.h
+++ b/src/devices/cpu/nuon/nuon.h
@@ -38,7 +38,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -68,4 +68,4 @@ protected:
DECLARE_DEVICE_TYPE(NUON, nuon_device)
-#endif /* MAME_CPU_NUON_NUON_H */ \ No newline at end of file
+#endif /* MAME_CPU_NUON_NUON_H */
diff --git a/src/devices/cpu/patinhofeio/patinho_feio.cpp b/src/devices/cpu/patinhofeio/patinho_feio.cpp
index a453d17f1de..489271d3ae9 100644
--- a/src/devices/cpu/patinhofeio/patinho_feio.cpp
+++ b/src/devices/cpu/patinhofeio/patinho_feio.cpp
@@ -783,7 +783,7 @@ void patinho_feio_cpu_device::execute_instruction()
printf("unimplemented opcode: 0x%02X\n", m_opcode);
}
-util::disasm_interface *patinho_feio_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> patinho_feio_cpu_device::create_disassembler()
{
- return new patinho_feio_disassembler;
+ return std::make_unique<patinho_feio_disassembler>();
}
diff --git a/src/devices/cpu/patinhofeio/patinhofeio_cpu.h b/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
index 0450b2ea314..ecff53f7249 100644
--- a/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
+++ b/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
@@ -66,7 +66,7 @@ public:
protected:
virtual void execute_run() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
diff --git a/src/devices/cpu/pdp1/pdp1.cpp b/src/devices/cpu/pdp1/pdp1.cpp
index baff252ea63..5f56755d6df 100644
--- a/src/devices/cpu/pdp1/pdp1.cpp
+++ b/src/devices/cpu/pdp1/pdp1.cpp
@@ -419,9 +419,9 @@ void pdp1_device::device_config_complete()
}
-util::disasm_interface *pdp1_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> pdp1_device::create_disassembler()
{
- return new pdp1_disassembler;
+ return std::make_unique<pdp1_disassembler>();
}
diff --git a/src/devices/cpu/pdp1/pdp1.h b/src/devices/cpu/pdp1/pdp1.h
index a64b23f5c69..ae5964b2c47 100644
--- a/src/devices/cpu/pdp1/pdp1.h
+++ b/src/devices/cpu/pdp1/pdp1.h
@@ -114,7 +114,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/pdp1/tx0.cpp b/src/devices/cpu/pdp1/tx0.cpp
index f633468c55a..b4c3c693675 100644
--- a/src/devices/cpu/pdp1/tx0.cpp
+++ b/src/devices/cpu/pdp1/tx0.cpp
@@ -1076,12 +1076,12 @@ void tx0_device::io_complete()
}
-util::disasm_interface *tx0_8kw_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tx0_8kw_device::create_disassembler()
{
- return new tx0_8kw_disassembler;
+ return std::make_unique<tx0_8kw_disassembler>();
}
-util::disasm_interface *tx0_64kw_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tx0_64kw_device::create_disassembler()
{
- return new tx0_64kw_disassembler;
+ return std::make_unique<tx0_64kw_disassembler>();
}
diff --git a/src/devices/cpu/pdp1/tx0.h b/src/devices/cpu/pdp1/tx0.h
index 7c69bf40649..f19f7899ffd 100644
--- a/src/devices/cpu/pdp1/tx0.h
+++ b/src/devices/cpu/pdp1/tx0.h
@@ -147,7 +147,7 @@ public:
protected:
virtual void execute_run() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
void execute_instruction_8kw();
@@ -162,7 +162,7 @@ public:
protected:
virtual void execute_run() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
void execute_instruction_64kw();
diff --git a/src/devices/cpu/pdp8/pdp8.cpp b/src/devices/cpu/pdp8/pdp8.cpp
index 65906feb050..341a7d3c997 100644
--- a/src/devices/cpu/pdp8/pdp8.cpp
+++ b/src/devices/cpu/pdp8/pdp8.cpp
@@ -151,9 +151,9 @@ void pdp8_device::state_string_export(const device_state_entry &entry, std::stri
// helper function
//-------------------------------------------------
-util::disasm_interface *pdp8_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> pdp8_cpu_device::create_disassembler()
{
- return new pdp8_disassembler;
+ return std::make_unique<pdp8_disassembler>();
}
diff --git a/src/devices/cpu/pdp8/pdp8.h b/src/devices/cpu/pdp8/pdp8.h
index c6dc47ce56f..0c59faa3124 100644
--- a/src/devices/cpu/pdp8/pdp8.h
+++ b/src/devices/cpu/pdp8/pdp8.h
@@ -40,7 +40,7 @@ public:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/pic16c5x/pic16c5x.cpp b/src/devices/cpu/pic16c5x/pic16c5x.cpp
index 68301435a90..f467e221805 100644
--- a/src/devices/cpu/pic16c5x/pic16c5x.cpp
+++ b/src/devices/cpu/pic16c5x/pic16c5x.cpp
@@ -184,9 +184,9 @@ device_memory_interface::space_config_vector pic16c5x_device::memory_space_confi
};
}
-util::disasm_interface *pic16c5x_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> pic16c5x_device::create_disassembler()
{
- return new pic16c5x_disassembler;
+ return std::make_unique<pic16c5x_disassembler>();
}
diff --git a/src/devices/cpu/pic16c5x/pic16c5x.h b/src/devices/cpu/pic16c5x/pic16c5x.h
index e442fa3a5da..1f141322c08 100644
--- a/src/devices/cpu/pic16c5x/pic16c5x.h
+++ b/src/devices/cpu/pic16c5x/pic16c5x.h
@@ -135,7 +135,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/pic16c62x/pic16c62x.cpp b/src/devices/cpu/pic16c62x/pic16c62x.cpp
index 276747aef4d..f21f52b89c9 100644
--- a/src/devices/cpu/pic16c62x/pic16c62x.cpp
+++ b/src/devices/cpu/pic16c62x/pic16c62x.cpp
@@ -159,9 +159,9 @@ pic16c622a_device::pic16c622a_device(const machine_config &mconfig, const char *
}
-util::disasm_interface *pic16c62x_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> pic16c62x_device::create_disassembler()
{
- return new pic16c62x_disassembler;
+ return std::make_unique<pic16c62x_disassembler>();
}
diff --git a/src/devices/cpu/pic16c62x/pic16c62x.h b/src/devices/cpu/pic16c62x/pic16c62x.h
index 3617539f851..05366354d31 100644
--- a/src/devices/cpu/pic16c62x/pic16c62x.h
+++ b/src/devices/cpu/pic16c62x/pic16c62x.h
@@ -79,7 +79,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/powerpc/ppc.h b/src/devices/cpu/powerpc/ppc.h
index cc4fd03006e..ede72cf808b 100644
--- a/src/devices/cpu/powerpc/ppc.h
+++ b/src/devices/cpu/powerpc/ppc.h
@@ -266,7 +266,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
/* exception types */
enum
@@ -634,10 +634,10 @@ protected:
void ppc4xx_spu_rx_data(uint8_t data);
void ppc4xx_spu_timer_reset();
void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name);
- void load_fast_iregs(drcuml_block *block);
- void save_fast_iregs(drcuml_block *block);
- void load_fast_fregs(drcuml_block *block);
- void save_fast_fregs(drcuml_block *block);
+ void load_fast_iregs(drcuml_block &block);
+ void save_fast_iregs(drcuml_block &block);
+ void load_fast_fregs(drcuml_block &block);
+ void save_fast_fregs(drcuml_block &block);
uint32_t compute_rlw_mask(uint8_t mb, uint8_t me);
uint32_t compute_crf_mask(uint8_t crm);
uint32_t compute_spr(uint32_t spr);
@@ -652,21 +652,21 @@ protected:
void static_generate_swap_tgpr();
void static_generate_lsw_entries(int mode);
void static_generate_stsw_entries(int mode);
- void generate_update_mode(drcuml_block *block);
- void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception);
- void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_compute_flags(drcuml_block *block, const opcode_desc *desc, int updatecr, uint32_t xermask, int invertcarry);
- void generate_shift_flags(drcuml_block *block, const opcode_desc *desc, uint32_t op);
- void generate_fp_flags(drcuml_block *block, const opcode_desc *desc, int updatefprf);
- void generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int source, uint8_t link);
- void generate_branch_bo(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t bo, uint32_t bi, int source, int link);
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_instruction_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_instruction_1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_instruction_3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_instruction_3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
+ void generate_update_mode(drcuml_block &block);
+ void generate_update_cycles(drcuml_block &block, compiler_state *compiler, uml::parameter param, bool allow_exception);
+ void generate_checksum_block(drcuml_block &block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc);
+ void generate_compute_flags(drcuml_block &block, const opcode_desc *desc, int updatecr, uint32_t xermask, int invertcarry);
+ void generate_shift_flags(drcuml_block &block, const opcode_desc *desc, uint32_t op);
+ void generate_fp_flags(drcuml_block &block, const opcode_desc *desc, int updatefprf);
+ void generate_branch(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc, int source, uint8_t link);
+ void generate_branch_bo(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc, uint32_t bo, uint32_t bi, int source, int link);
+ bool generate_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc);
+ bool generate_instruction_13(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc);
+ bool generate_instruction_1f(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc);
+ bool generate_instruction_3b(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc);
+ bool generate_instruction_3f(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc);
+ void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
const char *log_desc_flags_to_string(uint32_t flags);
void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
void log_opcode_desc(const opcode_desc *desclist, int indent);
diff --git a/src/devices/cpu/powerpc/ppccom.cpp b/src/devices/cpu/powerpc/ppccom.cpp
index 2c271a608bf..e56ed8554e4 100644
--- a/src/devices/cpu/powerpc/ppccom.cpp
+++ b/src/devices/cpu/powerpc/ppccom.cpp
@@ -1165,9 +1165,9 @@ void ppc_device::device_reset()
CPU
-------------------------------------------------*/
-util::disasm_interface *ppc_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> ppc_device::create_disassembler()
{
- return new powerpc_disassembler;
+ return std::make_unique<powerpc_disassembler>();
}
diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp
index d3d1dd794e8..fd4f6179160 100644
--- a/src/devices/cpu/powerpc/ppcdrc.cpp
+++ b/src/devices/cpu/powerpc/ppcdrc.cpp
@@ -114,7 +114,7 @@ inline void ppc_device::alloc_handle(drcuml_state *drcuml, uml::code_handle **ha
registers
-------------------------------------------------*/
-inline void ppc_device::load_fast_iregs(drcuml_block *block)
+inline void ppc_device::load_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -133,7 +133,7 @@ inline void ppc_device::load_fast_iregs(drcuml_block *block)
registers
-------------------------------------------------*/
-void ppc_device::save_fast_iregs(drcuml_block *block)
+void ppc_device::save_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -147,7 +147,7 @@ void ppc_device::save_fast_iregs(drcuml_block *block)
}
-inline void ppc_device::load_fast_fregs(drcuml_block *block)
+inline void ppc_device::load_fast_fregs(drcuml_block &block)
{
for (int regnum = 0; regnum < ARRAY_LENGTH(m_fdregmap); regnum++)
{
@@ -158,7 +158,7 @@ inline void ppc_device::load_fast_fregs(drcuml_block *block)
}
}
-void ppc_device::save_fast_fregs(drcuml_block *block)
+void ppc_device::save_fast_fregs(drcuml_block &block)
{
for (int regnum = 0; regnum < ARRAY_LENGTH(m_fdregmap); regnum++)
{
@@ -382,7 +382,6 @@ void ppc_device::code_compile_block(uint8_t mode, offs_t pc)
const opcode_desc *seqhead, *seqlast;
const opcode_desc *desclist;
bool override = false;
- drcuml_block *block;
g_profiler.start(PROFILER_DRC_COMPILE);
@@ -397,7 +396,7 @@ void ppc_device::code_compile_block(uint8_t mode, offs_t pc)
try
{
/* start the block */
- block = m_drcuml->begin_block(4096);
+ drcuml_block &block(m_drcuml->begin_block(4096));
/* loop until we get through all instruction sequences */
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
@@ -407,7 +406,7 @@ void ppc_device::code_compile_block(uint8_t mode, offs_t pc)
/* add a code log entry */
if (m_drcuml->logging())
- block->append_comment("-------------------------"); // comment
+ block.append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next())
@@ -467,7 +466,7 @@ void ppc_device::code_compile_block(uint8_t mode, offs_t pc)
}
/* end the sequence */
- block->end();
+ block.end();
g_profiler.stop();
succeeded = true;
}
@@ -660,10 +659,9 @@ static void cfunc_ppccom_get_dsisr(void *param)
void ppc_device::static_generate_entry_point()
{
uml::code_label skip = 1;
- drcuml_block *block;
/* begin generating */
- block = m_drcuml->begin_block(20);
+ drcuml_block &block(m_drcuml->begin_block(20));
/* forward references */
alloc_handle(m_drcuml.get(), &m_nocode, "nocode");
@@ -694,7 +692,7 @@ void ppc_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, mem(&m_core->mode), mem(&m_core->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode
- block->end();
+ block.end();
}
@@ -705,10 +703,8 @@ void ppc_device::static_generate_entry_point()
void ppc_device::static_generate_nocode_handler()
{
- drcuml_block *block;
-
/* begin generating */
- block = m_drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
alloc_handle(m_drcuml.get(), &m_nocode, "nocode");
@@ -719,7 +715,7 @@ void ppc_device::static_generate_nocode_handler()
save_fast_fregs(block);
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block.end();
}
@@ -730,10 +726,8 @@ void ppc_device::static_generate_nocode_handler()
void ppc_device::static_generate_out_of_cycles()
{
- drcuml_block *block;
-
/* begin generating */
- block = m_drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles");
@@ -744,7 +738,7 @@ void ppc_device::static_generate_out_of_cycles()
save_fast_fregs(block);
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
- block->end();
+ block.end();
}
@@ -755,7 +749,6 @@ void ppc_device::static_generate_out_of_cycles()
void ppc_device::static_generate_tlb_mismatch()
{
- drcuml_block *block;
int isi, exit, label = 1;
/* forward references */
@@ -764,7 +757,7 @@ void ppc_device::static_generate_tlb_mismatch()
alloc_handle(m_drcuml.get(), &m_exception[EXCEPTION_ITLBMISS], "exception_itlb_miss");
/* begin generating */
- block = m_drcuml->begin_block(20);
+ drcuml_block &block(m_drcuml->begin_block(20));
/* generate a hash jump via the current mode and PC */
alloc_handle(m_drcuml.get(), &m_tlb_mismatch, "tlb_mismatch");
@@ -805,7 +798,7 @@ void ppc_device::static_generate_tlb_mismatch()
UML_EXH(block, *m_exception[EXCEPTION_ITLBMISS], I0); // exh itlbmiss,i0
}
- block->end();
+ block.end();
}
@@ -819,10 +812,9 @@ void ppc_device::static_generate_exception(uint8_t exception, int recover, const
uml::code_handle *&exception_handle = recover ? m_exception[exception] : m_exception_norecover[exception];
uint32_t vector = exception << 8;
uml::code_label label = 1;
- drcuml_block *block;
/* begin generating */
- block = m_drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
alloc_handle(m_drcuml.get(), &exception_handle, name);
@@ -982,7 +974,7 @@ void ppc_device::static_generate_exception(uint8_t exception, int recover, const
UML_EXHc(block, COND_S, *m_out_of_cycles, I0); // exh out_of_cycles,i0
UML_HASHJMP(block, mem(&m_core->mode), I0, *m_nocode); // hashjmp <mode>,i0,nocode
- block->end();
+ block.end();
}
@@ -996,7 +988,6 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
/* on exit, read result is in I0 */
/* routine trashes I0-I3 */
int fastxor = BYTE8_XOR_BE(0) >> (int)(space_config(AS_PROGRAM)->m_data_width < 64);
- drcuml_block *block;
int translate_type;
int tlbreturn = 0;
int unaligned = 0;
@@ -1011,7 +1002,7 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
translate_type = iswrite ? TRANSLATE_WRITE : TRANSLATE_READ;
/* begin generating */
- block = m_drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
alloc_handle(m_drcuml.get(), &handleptr, name);
@@ -1414,7 +1405,7 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
}
}
- block->end();
+ block.end();
}
@@ -1425,11 +1416,10 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
void ppc_device::static_generate_swap_tgpr()
{
- drcuml_block *block;
int regnum;
/* begin generating */
- block = m_drcuml->begin_block(30);
+ drcuml_block &block(m_drcuml->begin_block(30));
/* generate a hash jump via the current mode and PC */
alloc_handle(m_drcuml.get(), &m_swap_tgpr, "swap_tgpr");
@@ -1442,7 +1432,7 @@ void ppc_device::static_generate_swap_tgpr()
}
UML_RET(block); // ret
- block->end();
+ block.end();
}
@@ -1454,11 +1444,10 @@ void ppc_device::static_generate_swap_tgpr()
void ppc_device::static_generate_lsw_entries(int mode)
{
- drcuml_block *block;
int regnum;
/* begin generating */
- block = m_drcuml->begin_block(32 * 30);
+ drcuml_block &block(m_drcuml->begin_block(32 * 30));
/* iterate over all possible registers */
for (regnum = 0; regnum < 32; regnum++)
@@ -1497,7 +1486,7 @@ void ppc_device::static_generate_lsw_entries(int mode)
UML_JMP(block, (regnum + 1) % 32); // jmp nextreg
}
- block->end();
+ block.end();
}
@@ -1509,10 +1498,8 @@ void ppc_device::static_generate_lsw_entries(int mode)
void ppc_device::static_generate_stsw_entries(int mode)
{
- drcuml_block *block;
-
/* begin generating */
- block = m_drcuml->begin_block(32 * 30);
+ drcuml_block &block(m_drcuml->begin_block(32 * 30));
/* iterate over all possible registers */
for (int regnum = 0; regnum < 32; regnum++)
@@ -1548,7 +1535,7 @@ void ppc_device::static_generate_stsw_entries(int mode)
UML_JMP(block, (regnum + 1) % 32); // jmp nextreg
}
- block->end();
+ block.end();
}
@@ -1562,7 +1549,7 @@ void ppc_device::static_generate_stsw_entries(int mode)
on the MSR
-------------------------------------------------*/
-void ppc_device::generate_update_mode(drcuml_block *block)
+void ppc_device::generate_update_mode(drcuml_block &block)
{
/* LE in bit 0 of mode */
UML_AND(block, I0, MSR32, MSR_LE); // and i0,msr,MSR_LE
@@ -1593,7 +1580,7 @@ void ppc_device::generate_update_mode(drcuml_block *block)
an exception if out
-------------------------------------------------*/
-void ppc_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception)
+void ppc_device::generate_update_cycles(drcuml_block &block, compiler_state *compiler, uml::parameter param, bool allow_exception)
{
/* check full interrupts if pending */
if (compiler->checkints)
@@ -1628,11 +1615,11 @@ void ppc_device::generate_update_cycles(drcuml_block *block, compiler_state *com
validate a sequence of opcodes
-------------------------------------------------*/
-void ppc_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
+void ppc_device::generate_checksum_block(drcuml_block &block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
{
const opcode_desc *curdesc;
if (m_drcuml->logging())
- block->append_comment("[Validation for %08X]", seqhead->pc); // comment
+ block.append_comment("[Validation for %08X]", seqhead->pc); // comment
/* loose verify or single instruction: just compare and fail */
if (!(m_drcoptions & PPCDRC_STRICT_VERIFY) || seqhead->next() == nullptr)
@@ -1683,7 +1670,7 @@ void ppc_device::generate_checksum_block(drcuml_block *block, compiler_state *co
for a single instruction in a sequence
-------------------------------------------------*/
-void ppc_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc)
{
int hotnum;
@@ -1806,7 +1793,7 @@ void ppc_device::generate_sequence_instruction(drcuml_block *block, compiler_sta
generate_compute_flags - compute CR0 and/or XER flags
------------------------------------------------------------------*/
-void ppc_device::generate_compute_flags(drcuml_block *block, const opcode_desc *desc, int updatecr, uint32_t xermask, int invertcarry)
+void ppc_device::generate_compute_flags(drcuml_block &block, const opcode_desc *desc, int updatecr, uint32_t xermask, int invertcarry)
{
uint32_t xerflags;
@@ -1877,7 +1864,7 @@ void ppc_device::generate_compute_flags(drcuml_block *block, const opcode_desc *
generate_shift_flags - compute S/Z flags for shifts
-------------------------------------------------------*/
-void ppc_device::generate_shift_flags(drcuml_block *block, const opcode_desc *desc, uint32_t op)
+void ppc_device::generate_shift_flags(drcuml_block &block, const opcode_desc *desc, uint32_t op)
{
UML_CMP(block, R32(G_RA(op)), 0); // cmp ra, #0
UML_SETc(block, COND_Z, I1); // set Z, i1
@@ -1895,7 +1882,7 @@ void ppc_device::generate_shift_flags(drcuml_block *block, const opcode_desc *de
point status flags
-------------------------------------------------*/
-void ppc_device::generate_fp_flags(drcuml_block *block, const opcode_desc *desc, int updatefprf)
+void ppc_device::generate_fp_flags(drcuml_block &block, const opcode_desc *desc, int updatefprf)
{
/* for now, only handle the FPRF field */
if (updatefprf)
@@ -1914,7 +1901,7 @@ void ppc_device::generate_fp_flags(drcuml_block *block, const opcode_desc *desc,
branch
-------------------------------------------------*/
-void ppc_device::generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int source, uint8_t link)
+void ppc_device::generate_branch(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc, int source, uint8_t link)
{
compiler_state compiler_temp = *compiler;
uint32_t *srcptr = &m_core->spr[source];
@@ -1962,7 +1949,7 @@ void ppc_device::generate_branch(drcuml_block *block, compiler_state *compiler,
branch based on the BO and BI fields
-------------------------------------------------*/
-void ppc_device::generate_branch_bo(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t bo, uint32_t bi, int source, int link)
+void ppc_device::generate_branch_bo(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc, uint32_t bo, uint32_t bi, int source, int link)
{
int skip = compiler->labelnum++;
@@ -1986,7 +1973,7 @@ void ppc_device::generate_branch_bo(drcuml_block *block, compiler_state *compile
opcode
-------------------------------------------------*/
-bool ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool ppc_device::generate_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t opswitch = op >> 26;
@@ -2365,7 +2352,7 @@ bool ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
the 0x13 group
-------------------------------------------------*/
-bool ppc_device::generate_instruction_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool ppc_device::generate_instruction_13(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t opswitch = (op >> 1) & 0x3ff;
@@ -2502,7 +2489,7 @@ bool ppc_device::generate_instruction_13(drcuml_block *block, compiler_state *co
the 0x1f group
-------------------------------------------------*/
-bool ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t opswitch = (op >> 1) & 0x3ff;
@@ -3483,7 +3470,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *co
the 0x3b group
-------------------------------------------------*/
-bool ppc_device::generate_instruction_3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool ppc_device::generate_instruction_3b(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t opswitch = (op >> 1) & 0x1f;
@@ -3591,7 +3578,7 @@ bool ppc_device::generate_instruction_3b(drcuml_block *block, compiler_state *co
the 0x3f group
-------------------------------------------------*/
-bool ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool ppc_device::generate_instruction_3f(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint32_t opswitch = (op >> 1) & 0x3ff;
@@ -3638,33 +3625,33 @@ bool ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *co
return true;
case 0x17: /* FSELx */
- UML_FDCMP(block, F64(G_RA(op)), mem(&m_core->fp0)); // fdcmp f0,ra,[fp0]
+ UML_FDCMP(block, F64(G_RA(op)), mem(&m_core->fp0)); // fdcmp f0,ra,[fp0]
UML_FDMOVc(block, COND_AE, F64(G_RD(op)), F64(G_REGC(op))); // fdmov rd,rc,AE
- UML_FDMOVc(block, COND_B, F64(G_RD(op)), F64(G_RB(op))); // fdmov rd,rb,B
+ UML_FDMOVc(block, COND_B, F64(G_RD(op)), F64(G_RB(op))); // fdmov rd,rb,B
return true;
case 0x1d: /* FMADDx */
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDADD(block, F64(G_RD(op)), F0, F64(G_RB(op))); // fdadd rd,f0,rb
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDADD(block, F64(G_RD(op)), F0, F64(G_RB(op))); // fdadd rd,f0,rb
generate_fp_flags(block, desc, true);
return true;
case 0x1f: /* FNMADDx */
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDADD(block, F0, F0, F64(G_RB(op))); // fdadd f0,f0,rb
- UML_FDNEG(block, F64(G_RD(op)), F0); // fdneg rd,f0
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDADD(block, F0, F0, F64(G_RB(op))); // fdadd f0,f0,rb
+ UML_FDNEG(block, F64(G_RD(op)), F0); // fdneg rd,f0
generate_fp_flags(block, desc, true);
return true;
case 0x1c: /* FMSUBx */
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDSUB(block, F64(G_RD(op)), F0, F64(G_RB(op))); // fdsub rd,f0,rb
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDSUB(block, F64(G_RD(op)), F0, F64(G_RB(op))); // fdsub rd,f0,rb
generate_fp_flags(block, desc, true);
return true;
case 0x1e: /* FNMSUBx */
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDSUB(block, F64(G_RD(op)), F64(G_RB(op)), F0); // fdsub rd,rb,f0
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDSUB(block, F64(G_RD(op)), F64(G_RB(op)), F0); // fdsub rd,rb,f0
generate_fp_flags(block, desc, true);
return true;
}
@@ -3681,9 +3668,9 @@ bool ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *co
case 0x000: /* FCMPU */
case 0x020: /* FCMPO */
UML_FDCMP(block, F64(G_RA(op)), F64(G_RB(op))); // fdcmp ra,rb
- UML_GETFLGS(block, I0, FLAG_C | FLAG_Z | FLAG_U); // getflgs i0,czu
- UML_LOAD(block, I0, m_fcmp_cr_table, I0, SIZE_BYTE, SCALE_x1);// load i0,fcmp_cr_table,i0,byte
- UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
+ UML_GETFLGS(block, I0, FLAG_C | FLAG_Z | FLAG_U); // getflgs i0,czu
+ UML_LOAD(block, I0, m_fcmp_cr_table, I0, SIZE_BYTE, SCALE_x1); // load i0,fcmp_cr_table,i0,byte
+ UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
return true;
case 0x00c: /* FRSPx */
@@ -3692,15 +3679,15 @@ bool ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *co
return true;
case 0x00e: /* FCTIWx */
- UML_FDTOINT(block, I0, F64(G_RB(op)), SIZE_DWORD, ROUND_DEFAULT); // fdtoint i0,rb,dword,default
- UML_DAND(block, mem(&m_core->tempdata.w.l), I0, 0xffffffff);// dand i0,i0,0xffffffff
- UML_FDMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.w.l)); // fdmovr rd,i0
+ UML_FDTOINT(block, I0, F64(G_RB(op)), SIZE_DWORD, ROUND_DEFAULT); // fdtoint i0,rb,dword,default
+ UML_DAND(block, mem(&m_core->tempdata.w.l), I0, 0xffffffff); // dand i0,i0,0xffffffff
+ UML_FDMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.w.l)); // fdmovr rd,i0
return true;
case 0x00f: /* FCTIWZx */
- UML_FDTOINT(block, I0, F64(G_RB(op)), SIZE_DWORD, ROUND_TRUNC); // fdtoint i0,rb,dword,default
- UML_DAND(block, mem(&m_core->tempdata.w.l), I0, 0xffffffff);// dand i0,i0,0xffffffff
- UML_FDMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.w.l)); // fdmovr rd,i0
+ UML_FDTOINT(block, I0, F64(G_RB(op)), SIZE_DWORD, ROUND_TRUNC); // fdtoint i0,rb,dword,default
+ UML_DAND(block, mem(&m_core->tempdata.w.l), I0, 0xffffffff); // dand i0,i0,0xffffffff
+ UML_FDMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.w.l)); // fdmovr rd,i0
return true;
case 0x028: /* FNEGx */
@@ -3712,8 +3699,8 @@ bool ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *co
return true;
case 0x088: /* FNABSx */
- UML_FDABS(block, F0, F64(G_RB(op))); // fdabs f0,rb
- UML_FDNEG(block, F64(G_RD(op)), F0); // fdneg rd,f0
+ UML_FDABS(block, F0, F64(G_RB(op))); // fdabs f0,rb
+ UML_FDNEG(block, F64(G_RD(op)), F0); // fdneg rd,f0
return true;
case 0x108: /* FABSx */
@@ -3721,26 +3708,26 @@ bool ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *co
return true;
case 0x046: /* MTFSB0x */
- UML_AND(block, FPSCR32, FPSCR32, ~(0x80000000 >> G_CRBD(op))); // and fpscr32,fpscr32,~(0x80000000 >> G_CRBD)
+ UML_AND(block, FPSCR32, FPSCR32, ~(0x80000000 >> G_CRBD(op))); // and fpscr32,fpscr32,~(0x80000000 >> G_CRBD)
return true;
case 0x026: /* MTFSB1x */
- UML_OR(block, FPSCR32, FPSCR32, 0x80000000 >> G_CRBD(op)); // or fpscr32,fpscr32,(0x80000000 >> G_CRBD)
+ UML_OR(block, FPSCR32, FPSCR32, 0x80000000 >> G_CRBD(op)); // or fpscr32,fpscr32,(0x80000000 >> G_CRBD)
return true;
case 0x040: /* MCRFS */
UML_ROLAND(block, CR32(G_CRFD(op)), FPSCR32, ((G_CRFS(op) - 7) & 7) * 4, 0x0f);
// roland [crd],[fpscr],shift,0x0f
- UML_AND(block, FPSCR32, FPSCR32, ~CRMASK(G_CRFS(op))); // and fpscr,fpscr,~crmask[crfs]
+ UML_AND(block, FPSCR32, FPSCR32, ~CRMASK(G_CRFS(op))); // and fpscr,fpscr,~crmask[crfs]
return true;
case 0x247: /* MFFSx */
- UML_MOV(block, mem(&m_core->tempdata.w.l), FPSCR32); // mov [tempdata],fpscr
- UML_FSMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.d)); // fsmov rd,fpscr
+ UML_MOV(block, mem(&m_core->tempdata.w.l), FPSCR32); // mov [tempdata],fpscr
+ UML_FSMOV(block, F64(G_RD(op)), mem(&m_core->tempdata.d)); // fsmov rd,fpscr
return true;
case 0x2c7: /* MTFSFx */
- UML_FDMOV(block, mem(&m_core->tempdata.d), F64(G_RB(op))); // fdmov [tempdata],fb
+ UML_FDMOV(block, mem(&m_core->tempdata.d), F64(G_RB(op))); // fdmov [tempdata],fb
UML_ROLINS(block, FPSCR32, mem(&m_core->tempdata.w.l), 0, compute_crf_mask(G_FM(op)));
// rolins fpscr,rb,0,crf_mask
return true;
@@ -3766,13 +3753,13 @@ bool ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *co
including disassembly of a PowerPC instruction
-------------------------------------------------*/
-void ppc_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
+void ppc_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op)
{
if (m_drcuml->logging())
{
std::ostringstream stream;
powerpc_disassembler::dasm_one(stream, pc, op);
- block->append_comment("%08X: %s", pc, stream.str()); // comment
+ block.append_comment("%08X: %s", pc, stream.str()); // comment
}
}
diff --git a/src/devices/cpu/pps4/pps4.cpp b/src/devices/cpu/pps4/pps4.cpp
index e34f48ed5e2..d018f97a733 100644
--- a/src/devices/cpu/pps4/pps4.cpp
+++ b/src/devices/cpu/pps4/pps4.cpp
@@ -139,9 +139,9 @@ void pps4_device::W(u8 data)
m_SAG = 0;
}
-util::disasm_interface *pps4_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> pps4_device::create_disassembler()
{
- return new pps4_disassembler;
+ return std::make_unique<pps4_disassembler>();
}
/**
diff --git a/src/devices/cpu/pps4/pps4.h b/src/devices/cpu/pps4/pps4.h
index de0bca60b1c..8d3fb79cef7 100644
--- a/src/devices/cpu/pps4/pps4.h
+++ b/src/devices/cpu/pps4/pps4.h
@@ -82,7 +82,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
address_space_config m_data_config;
diff --git a/src/devices/cpu/psx/psx.cpp b/src/devices/cpu/psx/psx.cpp
index b7f4b726383..062e78219dd 100644
--- a/src/devices/cpu/psx/psx.cpp
+++ b/src/devices/cpu/psx/psx.cpp
@@ -2077,9 +2077,9 @@ void psxcpu_device::state_string_export( const device_state_entry &entry, std::s
// helper function
//-------------------------------------------------
-util::disasm_interface *psxcpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> psxcpu_device::create_disassembler()
{
- return new psxcpu_disassembler(this);
+ return std::make_unique<psxcpu_disassembler>(static_cast<psxcpu_disassembler::config *>(this));
}
diff --git a/src/devices/cpu/psx/psx.h b/src/devices/cpu/psx/psx.h
index 73e4380a8f7..9b18f8df5ff 100644
--- a/src/devices/cpu/psx/psx.h
+++ b/src/devices/cpu/psx/psx.h
@@ -220,7 +220,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// CPU registers
uint32_t m_pc;
diff --git a/src/devices/cpu/rsp/rsp.cpp b/src/devices/cpu/rsp/rsp.cpp
index 816df4d4e84..0f904fe45df 100644
--- a/src/devices/cpu/rsp/rsp.cpp
+++ b/src/devices/cpu/rsp/rsp.cpp
@@ -151,9 +151,9 @@ device_memory_interface::space_config_vector rsp_device::memory_space_config() c
};
}
-util::disasm_interface *rsp_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> rsp_device::create_disassembler()
{
- return new rsp_disassembler;
+ return std::make_unique<rsp_disassembler>();
}
void rsp_device::rsp_add_imem(uint32_t *base)
@@ -382,21 +382,16 @@ void rsp_device::device_start()
resolve_cb();
if (m_isdrc)
- {
- m_cop2 = std::make_unique<rsp_cop2_drc>(*this, machine());
- }
+ m_cop2 = std::make_unique<cop2_drc>(*this, machine());
else
- {
- m_cop2 = std::make_unique<rsp_cop2>(*this, machine());
- }
+ m_cop2 = std::make_unique<cop2>(*this, machine());
+
m_cop2->init();
m_cop2->start();
// RSP registers should power on to a random state
- for(int regIdx = 0; regIdx < 32; regIdx++ )
- {
+ for (int regIdx = 0; regIdx < 32; regIdx++)
m_rsp_state->r[regIdx] = 0;
- }
m_sr = RSP_STATUS_HALT;
m_step_count = 0;
@@ -421,7 +416,7 @@ void rsp_device::device_start()
m_drcuml->symbol_add(&m_numcycles, sizeof(m_numcycles), "numcycles");
/* initialize the front-end helper */
- m_drcfe = std::make_unique<rsp_frontend>(*this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
+ m_drcfe = std::make_unique<frontend>(*this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
/* compute the register parameters */
for (int regnum = 0; regnum < 32; regnum++)
diff --git a/src/devices/cpu/rsp/rsp.h b/src/devices/cpu/rsp/rsp.h
index cc407513cec..2dfa97d2cfb 100644
--- a/src/devices/cpu/rsp/rsp.h
+++ b/src/devices/cpu/rsp/rsp.h
@@ -99,14 +99,11 @@ enum
devcb = &downcast<rsp_device &>(*device).set_status_callback(DEVCB_##_devcb);
-class rsp_frontend;
-class rsp_cop2;
-
class rsp_device : public cpu_device
{
- friend class rsp_frontend;
- friend class rsp_cop2;
- friend class rsp_cop2_drc;
+ class frontend;
+ class cop2;
+ class cop2_drc;
public:
// construction/destruction
@@ -160,13 +157,15 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
void unimplemented_opcode(uint32_t op);
/* internal compiler state */
struct compiler_state
{
+ compiler_state &operator=(compiler_state &) = delete;
+
uint32_t cycles; /* accumulated cycles */
uint8_t checkints; /* need to check interrupts before next instruction */
uint8_t checksoftints; /* need to check software interrupts before next instruction */
@@ -187,8 +186,8 @@ private:
/* core state */
drc_cache m_cache; /* pointer to the DRC code cache */
- std::unique_ptr<drcuml_state> m_drcuml; /* DRC UML generator state */
- std::unique_ptr<rsp_frontend> m_drcfe; /* pointer to the DRC front-end state */
+ std::unique_ptr<drcuml_state> m_drcuml; /* DRC UML generator state */
+ std::unique_ptr<frontend> m_drcfe; /* pointer to the DRC front-end state */
uint32_t m_drcoptions; /* configurable DRC options */
/* internal stuff */
@@ -239,7 +238,7 @@ protected:
direct_read_data<0> *m_direct;
private:
- std::unique_ptr<rsp_cop2> m_cop2;
+ std::unique_ptr<cop2> m_cop2;
uint32_t *m_dmem32;
uint16_t *m_dmem16;
@@ -266,8 +265,8 @@ private:
void WRITE32(uint32_t address, uint32_t data);
uint32_t get_cop0_reg(int reg);
void set_cop0_reg(int reg, uint32_t data);
- void load_fast_iregs(drcuml_block *block);
- void save_fast_iregs(drcuml_block *block);
+ void load_fast_iregs(drcuml_block &block);
+ void save_fast_iregs(drcuml_block &block);
uint8_t DM_READ8(uint32_t address);
uint16_t DM_READ16(uint32_t address);
uint32_t DM_READ32(uint32_t address);
@@ -282,16 +281,16 @@ private:
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr);
- void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception);
- void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg);
- void generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- bool generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
+ void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception);
+ void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg);
+ void generate_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
};
diff --git a/src/devices/cpu/rsp/rspcp2.cpp b/src/devices/cpu/rsp/rspcp2.cpp
index 4169b563819..3180d7103f6 100644
--- a/src/devices/cpu/rsp/rspcp2.cpp
+++ b/src/devices/cpu/rsp/rspcp2.cpp
@@ -19,7 +19,7 @@
#if USE_SIMD
#include <emmintrin.h>
-const rsp_cop2::vec_helpers_t rsp_cop2::m_vec_helpers = {
+const rsp_device::cop2::vec_helpers_t rsp_device::cop2::m_vec_helpers = {
{ 0 },
{ // logic_mask
{ 0, 0, 0, 0, 0, 0, 0, 0 },
@@ -236,7 +236,7 @@ static inline rsp_vec_t sse2_pshufb(rsp_vec_t v, const uint16_t *keys)
return _mm_loadu_si128((rsp_vec_t *) dest);
}
-rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const uint16_t* src, uint32_t element)
+rsp_vec_t rsp_device::cop2::vec_load_and_shuffle_operand(const uint16_t* src, uint32_t element)
{
if (element >= 8) // element => 0w ... 7w
{
@@ -280,7 +280,7 @@ rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const uint16_t* src, uint32_t e
return vec_load_unshuffled_operand(src);
}
#else
-rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const uint16_t* src, uint32_t element)
+rsp_vec_t rsp_device::cop2::vec_load_and_shuffle_operand(const uint16_t* src, uint32_t element)
{
rsp_vec_t operand = _mm_load_si128((rsp_vec_t*) src);
rsp_vec_t key = _mm_load_si128((rsp_vec_t*) m_vec_helpers.shuffle_keys[element]);
@@ -297,7 +297,7 @@ rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const uint16_t* src, uint32_t e
// wraparound. Do we just discard the data, as below, or does the
// data effectively get rotated around the edge of the vector?
//
-void rsp_cop2::vec_load_group1(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm)
+void rsp_device::cop2::vec_load_group1(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm)
{
uint32_t offset = addr & 0x7;
uint32_t ror = offset - element;
@@ -354,7 +354,7 @@ void rsp_cop2::vec_load_group1(uint32_t addr, uint32_t element, uint16_t *regp,
//
// TODO: Reverse-engineer what happens when element != 0.
//
-void rsp_cop2::vec_load_group2(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
+void rsp_device::cop2::vec_load_group2(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
uint32_t offset = addr & 0x7;
rsp_vec_t data;
@@ -402,7 +402,7 @@ void rsp_cop2::vec_load_group2(uint32_t addr, uint32_t element, uint16_t *regp,
// must wraparound (i.e., the address offset is small, starting
// element is large).
//
-void rsp_cop2::vec_load_group4(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type)
+void rsp_device::cop2::vec_load_group4(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type)
{
uint32_t aligned_addr = addr & 0xFF0;
uint32_t offset = addr & 0xF;
@@ -454,7 +454,7 @@ void rsp_cop2::vec_load_group4(uint32_t addr, uint32_t element, uint16_t *regp,
// must wraparound. Do we just stop storing the data, or do we
// continue storing from the front of the vector, as below?
//
-void rsp_cop2::vec_store_group1(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm)
+void rsp_device::cop2::vec_store_group1(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm)
{
uint32_t offset = addr & 0x7;
uint32_t ror = element - offset;
@@ -528,7 +528,7 @@ void rsp_cop2::vec_store_group1(uint32_t addr, uint32_t element, uint16_t *regp,
//
// TODO: Reverse-engineer what happens when element != 0.
//
-void rsp_cop2::vec_store_group2(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
+void rsp_device::cop2::vec_store_group2(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
// "Pack" the data.
if (request_type != RSP_MEM_REQUEST_PACK)
{
@@ -553,7 +553,7 @@ void rsp_cop2::vec_store_group2(uint32_t addr, uint32_t element, uint16_t *regp,
// SSE3+ accelerated stores for group IV. Byteswap 2-byte little-endian
// vector back to big-endian. Stop storing at quadword boundaries.
//
-void rsp_cop2::vec_store_group4(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
+void rsp_device::cop2::vec_store_group4(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
uint32_t aligned_addr = addr & 0xFF0;
uint32_t offset = addr & 0xF;
uint32_t rol = offset;
@@ -691,7 +691,7 @@ static const int vector_elements_2[16][8] =
};
#endif
-rsp_cop2::rsp_cop2(rsp_device &rsp, running_machine &machine)
+rsp_device::cop2::cop2(rsp_device &rsp, running_machine &machine)
: m_rsp(rsp)
, m_machine(machine)
, m_reciprocal_res(0)
@@ -711,11 +711,11 @@ rsp_cop2::rsp_cop2(rsp_device &rsp, running_machine &machine)
m_rspcop2_state = (internal_rspcop2_state *)rsp.m_cache.alloc_near(sizeof(internal_rspcop2_state));
}
-rsp_cop2::~rsp_cop2()
+rsp_device::cop2::~cop2()
{
}
-void rsp_cop2::init()
+void rsp_device::cop2::init()
{
CLEAR_CARRY_FLAGS();
CLEAR_COMPARE_FLAGS();
@@ -724,7 +724,7 @@ void rsp_cop2::init()
CLEAR_CLIP2_FLAGS();
}
-void rsp_cop2::start()
+void rsp_device::cop2::start()
{
for(auto & elem : m_v)
{
@@ -747,7 +747,7 @@ void rsp_cop2::start()
}
}
-void rsp_cop2::state_string_export(const int index, std::string &str) const
+void rsp_device::cop2::state_string_export(const int index, std::string &str) const
{
switch (index)
{
@@ -854,7 +854,7 @@ void rsp_cop2::state_string_export(const int index, std::string &str) const
Vector Load Instructions
***************************************************************************/
-void rsp_cop2::handle_lwc2(uint32_t op)
+void rsp_device::cop2::handle_lwc2(uint32_t op)
{
int base = (op >> 21) & 0x1f;
#if !USE_SIMD
@@ -1201,7 +1201,7 @@ void rsp_cop2::handle_lwc2(uint32_t op)
Vector Store Instructions
***************************************************************************/
-void rsp_cop2::handle_swc2(uint32_t op)
+void rsp_device::cop2::handle_swc2(uint32_t op)
{
int base = (op >> 21) & 0x1f;
#if !USE_SIMD
@@ -1572,7 +1572,7 @@ void rsp_cop2::handle_swc2(uint32_t op)
Vector Accumulator Helpers
***************************************************************************/
-uint16_t rsp_cop2::SATURATE_ACCUM(int accum, int slice, uint16_t negative, uint16_t positive)
+uint16_t rsp_device::cop2::SATURATE_ACCUM(int accum, int slice, uint16_t negative, uint16_t positive)
{
if ((int16_t)ACCUM_H(accum) < 0)
{
@@ -1632,7 +1632,7 @@ uint16_t rsp_cop2::SATURATE_ACCUM(int accum, int slice, uint16_t negative, uint1
Vector Opcodes
***************************************************************************/
-void rsp_cop2::handle_vector_ops(uint32_t op)
+void rsp_device::cop2::handle_vector_ops(uint32_t op)
{
#if !USE_SIMD
int i;
@@ -3767,7 +3767,7 @@ void rsp_cop2::handle_vector_ops(uint32_t op)
Vector Flag Reading/Writing
***************************************************************************/
-void rsp_cop2::handle_cop2(uint32_t op)
+void rsp_device::cop2::handle_cop2(uint32_t op)
{
switch ((op >> 21) & 0x1f)
{
@@ -3979,7 +3979,7 @@ void rsp_cop2::handle_cop2(uint32_t op)
//dump(op);
}
-inline void rsp_cop2::mfc2()
+inline void rsp_device::cop2::mfc2()
{
uint32_t op = m_rspcop2_state->op;
int el = (op >> 7) & 0xf;
@@ -3989,7 +3989,7 @@ inline void rsp_cop2::mfc2()
if (RTREG) RTVAL = (int32_t)(int16_t)((b1 << 8) | (b2));
}
-inline void rsp_cop2::cfc2()
+inline void rsp_device::cop2::cfc2()
{
uint32_t op = m_rspcop2_state->op;
if (RTREG)
@@ -4048,7 +4048,7 @@ inline void rsp_cop2::cfc2()
}
}
-inline void rsp_cop2::mtc2()
+inline void rsp_device::cop2::mtc2()
{
uint32_t op = m_rspcop2_state->op;
int el = (op >> 7) & 0xf;
@@ -4056,7 +4056,7 @@ inline void rsp_cop2::mtc2()
VREG_B(VS1REG, (el+1) & 0xf) = (RTVAL >> 0) & 0xff;
}
-inline void rsp_cop2::ctc2()
+inline void rsp_device::cop2::ctc2()
{
uint32_t op = m_rspcop2_state->op;
switch(RDREG)
@@ -4155,7 +4155,7 @@ inline void rsp_cop2::ctc2()
}
}
-void rsp_cop2::log_instruction_execution()
+void rsp_device::cop2::log_instruction_execution()
{
static VECTOR_REG prev_vecs[32];
@@ -4171,7 +4171,7 @@ void rsp_cop2::log_instruction_execution()
}
}
-void rsp_cop2::dump(uint32_t op)
+void rsp_device::cop2::dump(uint32_t op)
{
printf("%08x ", op);
for (int i = 0; i < 32; i++)
@@ -4206,7 +4206,7 @@ void rsp_cop2::dump(uint32_t op)
#endif
}
-void rsp_cop2::dump_dmem()
+void rsp_device::cop2::dump_dmem()
{
uint8_t* dmem = m_rsp.get_dmem();
printf("\n");
diff --git a/src/devices/cpu/rsp/rspcp2.h b/src/devices/cpu/rsp/rspcp2.h
index ad12d82b601..7e374e71ae3 100644
--- a/src/devices/cpu/rsp/rspcp2.h
+++ b/src/devices/cpu/rsp/rspcp2.h
@@ -7,15 +7,14 @@
Interface file for Reality Signal Processor (RSP) vector extensions.
***************************************************************************/
+#ifndef MAME_CPU_RSP_RSPCP2_H
+#define MAME_CPU_RSP_RSPCP2_H
#pragma once
-#ifndef __RSPCP2_H__
-#define __RSPCP2_H__
-
-#include "cpu/drcuml.h"
#include "rsp.h"
#include "rspdiv.h"
+#include "cpu/drcuml.h"
#define SIMD_OFF (1)
@@ -74,25 +73,25 @@ union ACCUMULATOR_REG
struct compiler_state;
-class rsp_cop2
+class rsp_device::cop2
{
friend class rsp_device;
public:
- rsp_cop2(rsp_device &rsp, running_machine &machine);
+ cop2(rsp_device &rsp, running_machine &machine);
protected:
virtual void init();
virtual void start();
- virtual bool generate_cop2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) { return true; }
- virtual bool generate_lwc2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) { return true; }
- virtual bool generate_swc2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) { return true; }
+ virtual bool generate_cop2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc) { return true; }
+ virtual bool generate_lwc2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc) { return true; }
+ virtual bool generate_swc2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc) { return true; }
virtual void state_string_export(const int index, std::string &str) const;
public:
- virtual ~rsp_cop2();
+ virtual ~cop2();
virtual void lbv() { }
virtual void lsv() { }
@@ -172,7 +171,7 @@ public:
void dump_dmem();
protected:
- virtual bool generate_vector_opcode(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) { return true; }
+ virtual bool generate_vector_opcode(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc) { return true; }
uint16_t SATURATE_ACCUM(int accum, int slice, uint16_t negative, uint16_t positive);
@@ -393,4 +392,4 @@ private:
uint32_t m_div_out;
};
-#endif /* __RSPCP2_H__ */
+#endif // MAME_CPU_RSP_RSPCP2_H
diff --git a/src/devices/cpu/rsp/rspcp2d.cpp b/src/devices/cpu/rsp/rspcp2d.cpp
index 47972b54747..9b9b20d094e 100644
--- a/src/devices/cpu/rsp/rspcp2d.cpp
+++ b/src/devices/cpu/rsp/rspcp2d.cpp
@@ -12,9 +12,7 @@
#include "emu.h"
#include "rspcp2d.h"
-#include "rsp.h"
#include "rsp_dasm.h"
-#include "rspcp2.h"
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
@@ -23,8 +21,6 @@
#include "rspdefs.h"
-using namespace uml;
-
/***************************************************************************
Helpful Defines
***************************************************************************/
@@ -52,11 +48,6 @@ using namespace uml;
#define ZERO 3
#define CLIP2 4
-static void cfunc_mfc2(void *param);
-static void cfunc_cfc2(void *param);
-static void cfunc_mtc2(void *param);
-static void cfunc_ctc2(void *param);
-
#define ACCUM_H(x) (uint16_t)m_accum[x].w[3]
#define ACCUM_M(x) (uint16_t)m_accum[x].w[2]
#define ACCUM_L(x) (uint16_t)m_accum[x].w[1]
@@ -134,7 +125,7 @@ static const int vector_elements_2[16][8] =
{ 7, 7, 7, 7, 7, 7, 7, 7 }, // 7
};
-void rsp_cop2_drc::cfunc_unimplemented_opcode()
+void rsp_device::cop2_drc::cfunc_unimplemented_opcode()
{
const uint32_t ppc = m_rsp.m_ppc;
if ((m_machine.debug_flags & DEBUG_FLAG_ENABLED) != 0)
@@ -148,12 +139,7 @@ void rsp_cop2_drc::cfunc_unimplemented_opcode()
fatalerror("RSP: unknown opcode %02X (%08X) at %08X\n", m_rspcop2_state->op >> 26, m_rspcop2_state->op, ppc);
}
-static void unimplemented_opcode(void *param)
-{
- ((rsp_cop2 *)param)->cfunc_unimplemented_opcode();
-}
-
-void rsp_cop2_drc::state_string_export(const int index, std::string &str) const
+void rsp_device::cop2_drc::state_string_export(const int index, std::string &str) const
{
switch (index)
{
@@ -270,7 +256,7 @@ void rsp_cop2_drc::state_string_export(const int index, std::string &str) const
//
// Load 1 byte to vector byte index
-void rsp_cop2_drc::lbv()
+void rsp_device::cop2_drc::lbv()
{
uint32_t op = m_rspcop2_state->op;
@@ -288,11 +274,6 @@ void rsp_cop2_drc::lbv()
VREG_B(dest, index) = m_rsp.DM_READ8(ea);
}
-static void cfunc_lbv(void *param)
-{
- ((rsp_cop2 *)param)->lbv();
-}
-
// LSV
//
@@ -303,7 +284,7 @@ static void cfunc_lbv(void *param)
//
// Loads 2 bytes starting from vector byte index
-void rsp_cop2_drc::lsv()
+void rsp_device::cop2_drc::lsv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -324,11 +305,6 @@ void rsp_cop2_drc::lsv()
}
}
-static void cfunc_lsv(void *param)
-{
- ((rsp_cop2 *)param)->lsv();
-}
-
// LLV
//
@@ -339,7 +315,7 @@ static void cfunc_lsv(void *param)
//
// Loads 4 bytes starting from vector byte index
-void rsp_cop2_drc::llv()
+void rsp_device::cop2_drc::llv()
{
uint32_t op = m_rspcop2_state->op;
uint32_t ea;
@@ -363,11 +339,6 @@ void rsp_cop2_drc::llv()
}
}
-static void cfunc_llv(void *param)
-{
- ((rsp_cop2 *)param)->llv();
-}
-
// LDV
//
@@ -378,7 +349,7 @@ static void cfunc_llv(void *param)
//
// Loads 8 bytes starting from vector byte index
-void rsp_cop2_drc::ldv()
+void rsp_device::cop2_drc::ldv()
{
uint32_t op = m_rspcop2_state->op;
uint32_t ea;
@@ -402,11 +373,6 @@ void rsp_cop2_drc::ldv()
}
}
-static void cfunc_ldv(void *param)
-{
- ((rsp_cop2 *)param)->ldv();
-}
-
// LQV
//
@@ -417,7 +383,7 @@ static void cfunc_ldv(void *param)
//
// Loads up to 16 bytes starting from vector byte index
-void rsp_cop2_drc::lqv()
+void rsp_device::cop2_drc::lqv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -440,11 +406,6 @@ void rsp_cop2_drc::lqv()
}
}
-static void cfunc_lqv(void *param)
-{
- ((rsp_cop2 *)param)->lqv();
-}
-
// LRV
//
@@ -455,7 +416,7 @@ static void cfunc_lqv(void *param)
//
// Stores up to 16 bytes starting from right side until 16-byte boundary
-void rsp_cop2_drc::lrv()
+void rsp_device::cop2_drc::lrv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -479,11 +440,6 @@ void rsp_cop2_drc::lrv()
}
}
-static void cfunc_lrv(void *param)
-{
- ((rsp_cop2 *)param)->lrv();
-}
-
// LPV
//
@@ -494,7 +450,7 @@ static void cfunc_lrv(void *param)
//
// Loads a byte as the upper 8 bits of each element
-void rsp_cop2_drc::lpv()
+void rsp_device::cop2_drc::lpv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -514,11 +470,6 @@ void rsp_cop2_drc::lpv()
}
}
-static void cfunc_lpv(void *param)
-{
- ((rsp_cop2 *)param)->lpv();
-}
-
// LUV
//
@@ -529,7 +480,7 @@ static void cfunc_lpv(void *param)
//
// Loads a byte as the bits 14-7 of each element
-void rsp_cop2_drc::luv()
+void rsp_device::cop2_drc::luv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -549,11 +500,6 @@ void rsp_cop2_drc::luv()
}
}
-static void cfunc_luv(void *param)
-{
- ((rsp_cop2 *)param)->luv();
-}
-
// LHV
//
@@ -564,7 +510,7 @@ static void cfunc_luv(void *param)
//
// Loads a byte as the bits 14-7 of each element, with 2-byte stride
-void rsp_cop2_drc::lhv()
+void rsp_device::cop2_drc::lhv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -584,11 +530,6 @@ void rsp_cop2_drc::lhv()
}
}
-static void cfunc_lhv(void *param)
-{
- ((rsp_cop2 *)param)->lhv();
-}
-
// LFV
// 31 25 20 15 10 6 0
@@ -598,7 +539,7 @@ static void cfunc_lhv(void *param)
//
// Loads a byte as the bits 14-7 of upper or lower quad, with 4-byte stride
-void rsp_cop2_drc::lfv()
+void rsp_device::cop2_drc::lfv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -623,11 +564,6 @@ void rsp_cop2_drc::lfv()
}
}
-static void cfunc_lfv(void *param)
-{
- ((rsp_cop2 *)param)->lfv();
-}
-
// LWV
//
@@ -639,7 +575,7 @@ static void cfunc_lfv(void *param)
// Loads the full 128-bit vector starting from vector byte index and wrapping to index 0
// after byte index 15
-void rsp_cop2_drc::lwv()
+void rsp_device::cop2_drc::lwv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -661,11 +597,6 @@ void rsp_cop2_drc::lwv()
}
}
-static void cfunc_lwv(void *param)
-{
- ((rsp_cop2 *)param)->lwv();
-}
-
// LTV
//
@@ -676,7 +607,7 @@ static void cfunc_lwv(void *param)
//
// Loads one element to maximum of 8 vectors, while incrementing element index
-void rsp_cop2_drc::ltv()
+void rsp_device::cop2_drc::ltv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -707,13 +638,8 @@ void rsp_cop2_drc::ltv()
}
}
-static void cfunc_ltv(void *param)
-{
- ((rsp_cop2 *)param)->ltv();
-}
-
-bool rsp_cop2_drc::generate_lwc2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc)
+bool rsp_device::cop2_drc::generate_lwc2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
int offset = (op & 0x7f);
@@ -726,62 +652,62 @@ bool rsp_cop2_drc::generate_lwc2(drcuml_block *block, rsp_device::compiler_state
{
case 0x00: /* LBV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_lbv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_lbv, this);
return true;
case 0x01: /* LSV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_lsv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_lsv, this);
return true;
case 0x02: /* LLV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_llv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_llv, this);
return true;
case 0x03: /* LDV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_ldv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_ldv, this);
return true;
case 0x04: /* LQV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_lqv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_lqv, this);
return true;
case 0x05: /* LRV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_lrv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_lrv, this);
return true;
case 0x06: /* LPV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_lpv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_lpv, this);
return true;
case 0x07: /* LUV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_luv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_luv, this);
return true;
case 0x08: /* LHV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_lhv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_lhv, this);
return true;
case 0x09: /* LFV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_lfv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_lfv, this);
return true;
case 0x0a: /* LWV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_lwv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_lwv, this);
return true;
case 0x0b: /* LTV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [m_rspcop2_state->op],desc->opptr.l
- UML_CALLC(block, cfunc_ltv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_ltv, this);
return true;
default:
@@ -803,7 +729,7 @@ bool rsp_cop2_drc::generate_lwc2(drcuml_block *block, rsp_device::compiler_state
//
// Stores 1 byte from vector byte index
-void rsp_cop2_drc::sbv()
+void rsp_device::cop2_drc::sbv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -819,11 +745,6 @@ void rsp_cop2_drc::sbv()
m_rsp.DM_WRITE8(ea, VREG_B(dest, index));
}
-static void cfunc_sbv(void *param)
-{
- ((rsp_cop2 *)param)->sbv();
-}
-
// SSV
//
@@ -834,7 +755,7 @@ static void cfunc_sbv(void *param)
//
// Stores 2 bytes starting from vector byte index
-void rsp_cop2_drc::ssv()
+void rsp_device::cop2_drc::ssv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -856,11 +777,6 @@ void rsp_cop2_drc::ssv()
}
}
-static void cfunc_ssv(void *param)
-{
- ((rsp_cop2 *)param)->ssv();
-}
-
// SLV
//
@@ -871,7 +787,7 @@ static void cfunc_ssv(void *param)
//
// Stores 4 bytes starting from vector byte index
-void rsp_cop2_drc::slv()
+void rsp_device::cop2_drc::slv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -893,11 +809,6 @@ void rsp_cop2_drc::slv()
}
}
-static void cfunc_slv(void *param)
-{
- ((rsp_cop2 *)param)->slv();
-}
-
// SDV
//
@@ -908,7 +819,7 @@ static void cfunc_slv(void *param)
//
// Stores 8 bytes starting from vector byte index
-void rsp_cop2_drc::sdv()
+void rsp_device::cop2_drc::sdv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -929,11 +840,6 @@ void rsp_cop2_drc::sdv()
}
}
-static void cfunc_sdv(void *param)
-{
- ((rsp_cop2 *)param)->sdv();
-}
-
// SQV
//
@@ -944,7 +850,7 @@ static void cfunc_sdv(void *param)
//
// Stores up to 16 bytes starting from vector byte index until 16-byte boundary
-void rsp_cop2_drc::sqv()
+void rsp_device::cop2_drc::sqv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -965,11 +871,6 @@ void rsp_cop2_drc::sqv()
}
}
-static void cfunc_sqv(void *param)
-{
- ((rsp_cop2 *)param)->sqv();
-}
-
// SRV
//
@@ -980,7 +881,7 @@ static void cfunc_sqv(void *param)
//
// Stores up to 16 bytes starting from right side until 16-byte boundary
-void rsp_cop2_drc::srv()
+void rsp_device::cop2_drc::srv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -1005,11 +906,6 @@ void rsp_cop2_drc::srv()
}
}
-static void cfunc_srv(void *param)
-{
- ((rsp_cop2 *)param)->srv();
-}
-
// SPV
//
@@ -1020,7 +916,7 @@ static void cfunc_srv(void *param)
//
// Stores upper 8 bits of each element
-void rsp_cop2_drc::spv()
+void rsp_device::cop2_drc::spv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -1048,11 +944,6 @@ void rsp_cop2_drc::spv()
}
}
-static void cfunc_spv(void *param)
-{
- ((rsp_cop2 *)param)->spv();
-}
-
// SUV
//
@@ -1063,7 +954,7 @@ static void cfunc_spv(void *param)
//
// Stores bits 14-7 of each element
-void rsp_cop2_drc::suv()
+void rsp_device::cop2_drc::suv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -1091,11 +982,6 @@ void rsp_cop2_drc::suv()
}
}
-static void cfunc_suv(void *param)
-{
- ((rsp_cop2 *)param)->suv();
-}
-
// SHV
//
@@ -1106,7 +992,7 @@ static void cfunc_suv(void *param)
//
// Stores bits 14-7 of each element, with 2-byte stride
-void rsp_cop2_drc::shv()
+void rsp_device::cop2_drc::shv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -1129,11 +1015,6 @@ void rsp_cop2_drc::shv()
}
}
-static void cfunc_shv(void *param)
-{
- ((rsp_cop2 *)param)->shv();
-}
-
// SFV
//
@@ -1144,7 +1025,7 @@ static void cfunc_shv(void *param)
//
// Stores bits 14-7 of upper or lower quad, with 4-byte stride
-void rsp_cop2_drc::sfv()
+void rsp_device::cop2_drc::sfv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -1169,11 +1050,6 @@ void rsp_cop2_drc::sfv()
}
}
-static void cfunc_sfv(void *param)
-{
- ((rsp_cop2 *)param)->sfv();
-}
-
// SWV
//
@@ -1185,7 +1061,7 @@ static void cfunc_sfv(void *param)
// Stores the full 128-bit vector starting from vector byte index and wrapping to index 0
// after byte index 15
-void rsp_cop2_drc::swv()
+void rsp_device::cop2_drc::swv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -1209,11 +1085,6 @@ void rsp_cop2_drc::swv()
}
}
-static void cfunc_swv(void *param)
-{
- ((rsp_cop2 *)param)->swv();
-}
-
// STV
//
@@ -1224,7 +1095,7 @@ static void cfunc_swv(void *param)
//
// Stores one element from maximum of 8 vectors, while incrementing element index
-void rsp_cop2_drc::stv()
+void rsp_device::cop2_drc::stv()
{
uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
@@ -1258,12 +1129,7 @@ void rsp_cop2_drc::stv()
}
}
-static void cfunc_stv(void *param)
-{
- ((rsp_cop2 *)param)->stv();
-}
-
-bool rsp_cop2_drc::generate_swc2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc)
+bool rsp_device::cop2_drc::generate_swc2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
int offset = (op & 0x7f);
@@ -1276,62 +1142,62 @@ bool rsp_cop2_drc::generate_swc2(drcuml_block *block, rsp_device::compiler_state
{
case 0x00: /* SBV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_sbv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_sbv, this);
return true;
case 0x01: /* SSV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_ssv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_ssv, this);
return true;
case 0x02: /* SLV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_slv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_slv, this);
return true;
case 0x03: /* SDV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_sdv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_sdv, this);
return true;
case 0x04: /* SQV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_sqv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_sqv, this);
return true;
case 0x05: /* SRV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_srv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_srv, this);
return true;
case 0x06: /* SPV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_spv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_spv, this);
return true;
case 0x07: /* SUV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_suv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_suv, this);
return true;
case 0x08: /* SHV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_shv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_shv, this);
return true;
case 0x09: /* SFV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_sfv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_sfv, this);
return true;
case 0x0a: /* SWV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_swv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_swv, this);
return true;
case 0x0b: /* STV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_stv, this);
+ UML_CALLC(block, &cop2_drc::cfunc_stv, this);
return true;
default:
@@ -1356,7 +1222,7 @@ bool rsp_cop2_drc::generate_swc2(drcuml_block *block, rsp_device::compiler_state
//
// Multiplies signed integer by signed integer * 2
-void rsp_cop2_drc::vmulf()
+void rsp_device::cop2_drc::vmulf()
{
CACHE_VALUES();
@@ -1383,11 +1249,6 @@ void rsp_cop2_drc::vmulf()
WRITEBACK_RESULT();
}
-static void cfunc_vmulf(void *param)
-{
- ((rsp_cop2 *)param)->vmulf();
-}
-
// VMULU
//
@@ -1397,7 +1258,7 @@ static void cfunc_vmulf(void *param)
// ------------------------------------------------------
//
-void rsp_cop2_drc::vmulu()
+void rsp_device::cop2_drc::vmulu()
{
CACHE_VALUES();
@@ -1429,11 +1290,6 @@ void rsp_cop2_drc::vmulu()
WRITEBACK_RESULT();
}
-static void cfunc_vmulu(void *param)
-{
- ((rsp_cop2 *)param)->vmulu();
-}
-
// VMUDL
//
@@ -1446,7 +1302,7 @@ static void cfunc_vmulu(void *param)
// The result is added into accumulator
// The middle slice of accumulator is stored into destination element
-void rsp_cop2_drc::vmudl()
+void rsp_device::cop2_drc::vmudl()
{
CACHE_VALUES();
@@ -1465,11 +1321,6 @@ void rsp_cop2_drc::vmudl()
WRITEBACK_RESULT();
}
-static void cfunc_vmudl(void *param)
-{
- ((rsp_cop2 *)param)->vmudl();
-}
-
// VMUDM
//
@@ -1482,7 +1333,7 @@ static void cfunc_vmudl(void *param)
// The result is stored into accumulator
// The middle slice of accumulator is stored into destination element
-void rsp_cop2_drc::vmudm()
+void rsp_device::cop2_drc::vmudm()
{
CACHE_VALUES();
@@ -1501,11 +1352,6 @@ void rsp_cop2_drc::vmudm()
WRITEBACK_RESULT();
}
-static void cfunc_vmudm(void *param)
-{
- ((rsp_cop2 *)param)->vmudm();
-}
-
// VMUDN
//
@@ -1518,7 +1364,7 @@ static void cfunc_vmudm(void *param)
// The result is stored into accumulator
// The low slice of accumulator is stored into destination element
-void rsp_cop2_drc::vmudn()
+void rsp_device::cop2_drc::vmudn()
{
CACHE_VALUES();
@@ -1539,11 +1385,6 @@ void rsp_cop2_drc::vmudn()
WRITEBACK_RESULT();
}
-static void cfunc_vmudn(void *param)
-{
- ((rsp_cop2 *)param)->vmudn();
-}
-
// VMUDH
//
@@ -1556,7 +1397,7 @@ static void cfunc_vmudn(void *param)
// The result is stored into highest 32 bits of accumulator, the low slice is zero
// The highest 32 bits of accumulator is saturated into destination element
-void rsp_cop2_drc::vmudh()
+void rsp_device::cop2_drc::vmudh()
{
CACHE_VALUES();
@@ -1579,11 +1420,6 @@ void rsp_cop2_drc::vmudh()
WRITEBACK_RESULT();
}
-static void cfunc_vmudh(void *param)
-{
- ((rsp_cop2 *)param)->vmudh();
-}
-
// VMACF
//
@@ -1593,7 +1429,7 @@ static void cfunc_vmudh(void *param)
// ------------------------------------------------------
//
-void rsp_cop2_drc::vmacf()
+void rsp_device::cop2_drc::vmacf()
{
CACHE_VALUES();
@@ -1612,11 +1448,6 @@ void rsp_cop2_drc::vmacf()
WRITEBACK_RESULT();
}
-static void cfunc_vmacf(void *param)
-{
- ((rsp_cop2 *)param)->vmacf();
-}
-
// VMACU
//
@@ -1626,7 +1457,7 @@ static void cfunc_vmacf(void *param)
// ------------------------------------------------------
//
-void rsp_cop2_drc::vmacu()
+void rsp_device::cop2_drc::vmacu()
{
CACHE_VALUES();
@@ -1666,11 +1497,6 @@ void rsp_cop2_drc::vmacu()
WRITEBACK_RESULT();
}
-static void cfunc_vmacu(void *param)
-{
- ((rsp_cop2 *)param)->vmacu();
-}
-
// VMADL
//
@@ -1683,7 +1509,7 @@ static void cfunc_vmacu(void *param)
// Adds the higher 16 bits of the 32-bit result to accumulator
// The low slice of accumulator is stored into destination element
-void rsp_cop2_drc::vmadl()
+void rsp_device::cop2_drc::vmadl()
{
CACHE_VALUES();
@@ -1702,16 +1528,11 @@ void rsp_cop2_drc::vmadl()
WRITEBACK_RESULT();
}
-static void cfunc_vmadl(void *param)
-{
- ((rsp_cop2 *)param)->vmadl();
-}
-
// VMADM
//
-void rsp_cop2_drc::vmadm()
+void rsp_device::cop2_drc::vmadm()
{
CACHE_VALUES();
@@ -1730,16 +1551,11 @@ void rsp_cop2_drc::vmadm()
WRITEBACK_RESULT();
}
-static void cfunc_vmadm(void *param)
-{
- ((rsp_cop2 *)param)->vmadm();
-}
-
// VMADN
//
-void rsp_cop2_drc::vmadn()
+void rsp_device::cop2_drc::vmadn()
{
CACHE_VALUES();
@@ -1758,11 +1574,6 @@ void rsp_cop2_drc::vmadn()
WRITEBACK_RESULT();
}
-static void cfunc_vmadn(void *param)
-{
- ((rsp_cop2 *)param)->vmadn();
-}
-
// VMADH
//
@@ -1775,7 +1586,7 @@ static void cfunc_vmadn(void *param)
// The result is added into highest 32 bits of accumulator, the low slice is zero
// The highest 32 bits of accumulator is saturated into destination element
-void rsp_cop2_drc::vmadh()
+void rsp_device::cop2_drc::vmadh()
{
CACHE_VALUES();
@@ -1794,11 +1605,6 @@ void rsp_cop2_drc::vmadh()
WRITEBACK_RESULT();
}
-static void cfunc_vmadh(void *param)
-{
- ((rsp_cop2 *)param)->vmadh();
-}
-
// VADD
// 31 25 24 20 15 10 5 0
@@ -1808,7 +1614,7 @@ static void cfunc_vmadh(void *param)
//
// Adds two vector registers and carry flag, the result is saturated to 32767
-void rsp_cop2_drc::vadd()
+void rsp_device::cop2_drc::vadd()
{
CACHE_VALUES();
@@ -1832,11 +1638,6 @@ void rsp_cop2_drc::vadd()
WRITEBACK_RESULT();
}
-static void cfunc_vadd(void *param)
-{
- ((rsp_cop2 *)param)->vadd();
-}
-
// VSUB
//
@@ -1848,7 +1649,7 @@ static void cfunc_vadd(void *param)
// Subtracts two vector registers and carry flag, the result is saturated to -32768
// TODO: check VS2REG == VDREG
-void rsp_cop2_drc::vsub()
+void rsp_device::cop2_drc::vsub()
{
CACHE_VALUES();
@@ -1873,11 +1674,6 @@ void rsp_cop2_drc::vsub()
WRITEBACK_RESULT();
}
-static void cfunc_vsub(void *param)
-{
- ((rsp_cop2 *)param)->vsub();
-}
-
// VABS
//
@@ -1888,7 +1684,7 @@ static void cfunc_vsub(void *param)
//
// Changes the sign of source register 2 if source register 1 is negative and stores the result to destination register
-void rsp_cop2_drc::vabs()
+void rsp_device::cop2_drc::vabs()
{
CACHE_VALUES();
@@ -1923,11 +1719,6 @@ void rsp_cop2_drc::vabs()
WRITEBACK_RESULT();
}
-static void cfunc_vabs(void *param)
-{
- ((rsp_cop2 *)param)->vabs();
-}
-
// VADDC
//
@@ -1939,7 +1730,7 @@ static void cfunc_vabs(void *param)
// Adds two vector registers, the carry out is stored into carry register
// TODO: check VS2REG = VDREG
-void rsp_cop2_drc::vaddc()
+void rsp_device::cop2_drc::vaddc()
{
CACHE_VALUES();
@@ -1966,11 +1757,6 @@ void rsp_cop2_drc::vaddc()
WRITEBACK_RESULT();
}
-static void cfunc_vaddc(void *param)
-{
- ((rsp_cop2 *)param)->vaddc();
-}
-
// VSUBC
//
@@ -1982,7 +1768,7 @@ static void cfunc_vaddc(void *param)
// Subtracts two vector registers, the carry out is stored into carry register
// TODO: check VS2REG = VDREG
-void rsp_cop2_drc::vsubc()
+void rsp_device::cop2_drc::vsubc()
{
CACHE_VALUES();
@@ -2013,11 +1799,6 @@ void rsp_cop2_drc::vsubc()
WRITEBACK_RESULT();
}
-static void cfunc_vsubc(void *param)
-{
- ((rsp_cop2 *)param)->vsubc();
-}
-
// VADDB
//
@@ -2028,7 +1809,7 @@ static void cfunc_vsubc(void *param)
//
// Adds two vector registers bytewise with rounding
-void rsp_cop2_drc::vaddb()
+void rsp_device::cop2_drc::vaddb()
{
CACHE_VALUES();
const int round = (el == 0) ? 0 : (1 << (el - 1));
@@ -2067,11 +1848,6 @@ void rsp_cop2_drc::vaddb()
WRITEBACK_RESULT();
}
-static void cfunc_vaddb(void *param)
-{
- ((rsp_cop2 *)param)->vaddb();
-}
-
// VSAW
//
@@ -2082,7 +1858,7 @@ static void cfunc_vaddb(void *param)
//
// Stores high, middle or low slice of accumulator to destination vector
-void rsp_cop2_drc::vsaw()
+void rsp_device::cop2_drc::vsaw()
{
const int op = m_rspcop2_state->op;
const int vdreg = VDREG;
@@ -2118,11 +1894,6 @@ void rsp_cop2_drc::vsaw()
}
}
-static void cfunc_vsaw(void *param)
-{
- ((rsp_cop2 *)param)->vsaw();
-}
-
// VLT
//
@@ -2134,7 +1905,7 @@ static void cfunc_vsaw(void *param)
// Sets compare flags if elements in VS1 are less than VS2
// Moves the element in VS2 to destination vector
-void rsp_cop2_drc::vlt()
+void rsp_device::cop2_drc::vlt()
{
CACHE_VALUES();
@@ -2176,11 +1947,6 @@ void rsp_cop2_drc::vlt()
WRITEBACK_RESULT();
}
-static void cfunc_vlt(void *param)
-{
- ((rsp_cop2 *)param)->vlt();
-}
-
// VEQ
//
@@ -2192,7 +1958,7 @@ static void cfunc_vlt(void *param)
// Sets compare flags if elements in VS1 are equal with VS2
// Moves the element in VS2 to destination vector
-void rsp_cop2_drc::veq()
+void rsp_device::cop2_drc::veq()
{
CACHE_VALUES();
@@ -2223,11 +1989,6 @@ void rsp_cop2_drc::veq()
WRITEBACK_RESULT();
}
-static void cfunc_veq(void *param)
-{
- ((rsp_cop2 *)param)->veq();
-}
-
// VNE
//
@@ -2239,7 +2000,7 @@ static void cfunc_veq(void *param)
// Sets compare flags if elements in VS1 are not equal with VS2
// Moves the element in VS2 to destination vector
-void rsp_cop2_drc::vne()
+void rsp_device::cop2_drc::vne()
{
CACHE_VALUES();
@@ -2270,11 +2031,6 @@ void rsp_cop2_drc::vne()
WRITEBACK_RESULT();
}
-static void cfunc_vne(void *param)
-{
- ((rsp_cop2 *)param)->vne();
-}
-
// VGE
//
@@ -2286,7 +2042,7 @@ static void cfunc_vne(void *param)
// Sets compare flags if elements in VS1 are greater or equal with VS2
// Moves the element in VS2 to destination vector
-void rsp_cop2_drc::vge()
+void rsp_device::cop2_drc::vge()
{
CACHE_VALUES();
@@ -2316,11 +2072,6 @@ void rsp_cop2_drc::vge()
WRITEBACK_RESULT();
}
-static void cfunc_vge(void *param)
-{
- ((rsp_cop2 *)param)->vge();
-}
-
// VCL
//
@@ -2331,7 +2082,7 @@ static void cfunc_vge(void *param)
//
// Vector clip low
-void rsp_cop2_drc::vcl()
+void rsp_device::cop2_drc::vcl()
{
CACHE_VALUES();
@@ -2419,11 +2170,6 @@ void rsp_cop2_drc::vcl()
WRITEBACK_RESULT();
}
-static void cfunc_vcl(void *param)
-{
- ((rsp_cop2 *)param)->vcl();
-}
-
// VCH
//
@@ -2434,7 +2180,7 @@ static void cfunc_vcl(void *param)
//
// Vector clip high
-void rsp_cop2_drc::vch()
+void rsp_device::cop2_drc::vch()
{
CACHE_VALUES();
@@ -2506,11 +2252,6 @@ void rsp_cop2_drc::vch()
WRITEBACK_RESULT();
}
-static void cfunc_vch(void *param)
-{
- ((rsp_cop2 *)param)->vch();
-}
-
// VCR
//
@@ -2521,7 +2262,7 @@ static void cfunc_vch(void *param)
//
// Vector clip reverse
-void rsp_cop2_drc::vcr()
+void rsp_device::cop2_drc::vcr()
{
CACHE_VALUES();
@@ -2575,11 +2316,6 @@ void rsp_cop2_drc::vcr()
WRITEBACK_RESULT();
}
-static void cfunc_vcr(void *param)
-{
- ((rsp_cop2 *)param)->vcr();
-}
-
// VMRG
//
@@ -2590,7 +2326,7 @@ static void cfunc_vcr(void *param)
//
// Merges two vectors according to compare flags
-void rsp_cop2_drc::vmrg()
+void rsp_device::cop2_drc::vmrg()
{
CACHE_VALUES();
@@ -2613,11 +2349,6 @@ void rsp_cop2_drc::vmrg()
WRITEBACK_RESULT();
}
-static void cfunc_vmrg(void *param)
-{
- ((rsp_cop2 *)param)->vmrg();
-}
-
// VAND
//
@@ -2628,7 +2359,7 @@ static void cfunc_vmrg(void *param)
//
// Bitwise AND of two vector registers
-void rsp_cop2_drc::vand()
+void rsp_device::cop2_drc::vand()
{
CACHE_VALUES();
@@ -2643,11 +2374,6 @@ void rsp_cop2_drc::vand()
WRITEBACK_RESULT();
}
-static void cfunc_vand(void *param)
-{
- ((rsp_cop2 *)param)->vand();
-}
-
// VNAND
//
@@ -2658,7 +2384,7 @@ static void cfunc_vand(void *param)
//
// Bitwise NOT AND of two vector registers
-void rsp_cop2_drc::vnand()
+void rsp_device::cop2_drc::vnand()
{
CACHE_VALUES();
@@ -2673,11 +2399,6 @@ void rsp_cop2_drc::vnand()
WRITEBACK_RESULT();
}
-static void cfunc_vnand(void *param)
-{
- ((rsp_cop2 *)param)->vnand();
-}
-
// VOR
//
@@ -2688,7 +2409,7 @@ static void cfunc_vnand(void *param)
//
// Bitwise OR of two vector registers
-void rsp_cop2_drc::vor()
+void rsp_device::cop2_drc::vor()
{
CACHE_VALUES();
@@ -2703,11 +2424,6 @@ void rsp_cop2_drc::vor()
WRITEBACK_RESULT();
}
-static void cfunc_vor(void *param)
-{
- ((rsp_cop2 *)param)->vor();
-}
-
// VNOR
//
@@ -2718,7 +2434,7 @@ static void cfunc_vor(void *param)
//
// Bitwise NOT OR of two vector registers
-void rsp_cop2_drc::vnor()
+void rsp_device::cop2_drc::vnor()
{
CACHE_VALUES();
@@ -2733,11 +2449,6 @@ void rsp_cop2_drc::vnor()
WRITEBACK_RESULT();
}
-static void cfunc_vnor(void *param)
-{
- ((rsp_cop2 *)param)->vnor();
-}
-
// VXOR
//
@@ -2748,7 +2459,7 @@ static void cfunc_vnor(void *param)
//
// Bitwise XOR of two vector registers
-void rsp_cop2_drc::vxor()
+void rsp_device::cop2_drc::vxor()
{
CACHE_VALUES();
@@ -2763,11 +2474,6 @@ void rsp_cop2_drc::vxor()
WRITEBACK_RESULT();
}
-static void cfunc_vxor(void *param)
-{
- ((rsp_cop2 *)param)->vxor();
-}
-
// VNXOR
//
@@ -2778,7 +2484,7 @@ static void cfunc_vxor(void *param)
//
// Bitwise NOT XOR of two vector registers
-void rsp_cop2_drc::vnxor()
+void rsp_device::cop2_drc::vnxor()
{
CACHE_VALUES();
@@ -2793,11 +2499,6 @@ void rsp_cop2_drc::vnxor()
WRITEBACK_RESULT();
}
-static void cfunc_vnxor(void *param)
-{
- ((rsp_cop2 *)param)->vnxor();
-}
-
// VRCP
//
@@ -2808,7 +2509,7 @@ static void cfunc_vnxor(void *param)
//
// Calculates reciprocal
-void rsp_cop2_drc::vrcp()
+void rsp_device::cop2_drc::vrcp()
{
CACHE_VALUES();
@@ -2858,11 +2559,6 @@ void rsp_cop2_drc::vrcp()
}
}
-static void cfunc_vrcp(void *param)
-{
- ((rsp_cop2 *)param)->vrcp();
-}
-
// VRCPL
//
@@ -2873,7 +2569,7 @@ static void cfunc_vrcp(void *param)
//
// Calculates reciprocal low part
-void rsp_cop2_drc::vrcpl()
+void rsp_device::cop2_drc::vrcpl()
{
CACHE_VALUES();
@@ -2943,11 +2639,6 @@ void rsp_cop2_drc::vrcpl()
}
}
-static void cfunc_vrcpl(void *param)
-{
- ((rsp_cop2 *)param)->vrcpl();
-}
-
// VRCPH
//
@@ -2958,7 +2649,7 @@ static void cfunc_vrcpl(void *param)
//
// Calculates reciprocal high part
-void rsp_cop2_drc::vrcph()
+void rsp_device::cop2_drc::vrcph()
{
CACHE_VALUES();
@@ -2973,11 +2664,6 @@ void rsp_cop2_drc::vrcph()
W_VREG_S(vdreg, vs1reg & 7) = (int16_t)(m_reciprocal_res >> 16);
}
-static void cfunc_vrcph(void *param)
-{
- ((rsp_cop2 *)param)->vrcph();
-}
-
// VMOV
//
@@ -2988,7 +2674,7 @@ static void cfunc_vrcph(void *param)
//
// Moves element from vector to destination vector
-void rsp_cop2_drc::vmov()
+void rsp_device::cop2_drc::vmov()
{
CACHE_VALUES();
@@ -2999,11 +2685,6 @@ void rsp_cop2_drc::vmov()
}
}
-static void cfunc_vmov(void *param)
-{
- ((rsp_cop2 *)param)->vmov();
-}
-
// VRSQ
//
@@ -3014,7 +2695,7 @@ static void cfunc_vmov(void *param)
//
// Calculates reciprocal square-root
-void rsp_cop2_drc::vrsq()
+void rsp_device::cop2_drc::vrsq()
{
CACHE_VALUES();
@@ -3130,11 +2811,6 @@ void rsp_cop2_drc::vrsq()
}
}
-static void cfunc_vrsq(void *param)
-{
- ((rsp_cop2 *)param)->vrsq();
-}
-
// VRSQL
//
@@ -3145,7 +2821,7 @@ static void cfunc_vrsq(void *param)
//
// Calculates reciprocal square-root low part
-void rsp_cop2_drc::vrsql()
+void rsp_device::cop2_drc::vrsql()
{
CACHE_VALUES();
@@ -3216,11 +2892,6 @@ void rsp_cop2_drc::vrsql()
}
}
-static void cfunc_vrsql(void *param)
-{
- ((rsp_cop2 *)param)->vrsql();
-}
-
// VRSQH
//
@@ -3231,7 +2902,7 @@ static void cfunc_vrsql(void *param)
//
// Calculates reciprocal square-root high part
-void rsp_cop2_drc::vrsqh()
+void rsp_device::cop2_drc::vrsqh()
{
CACHE_VALUES();
@@ -3246,18 +2917,13 @@ void rsp_cop2_drc::vrsqh()
W_VREG_S(vdreg, vs1reg & 7) = (int16_t)(m_reciprocal_res >> 16); // store high part
}
-static void cfunc_vrsqh(void *param)
-{
- ((rsp_cop2 *)param)->vrsqh();
-}
-
/*-------------------------------------------------
generate_vector_opcode - generate code for a
vector opcode
-------------------------------------------------*/
-bool rsp_cop2_drc::generate_vector_opcode(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc)
+bool rsp_device::cop2_drc::generate_vector_opcode(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
// Opcode legend:
@@ -3270,217 +2936,217 @@ bool rsp_cop2_drc::generate_vector_opcode(drcuml_block *block, rsp_device::compi
{
case 0x00: /* VMULF */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmulf, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmulf, this);
return true;
case 0x01: /* VMULU */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmulu, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmulu, this);
return true;
case 0x04: /* VMUDL */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmudl, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmudl, this);
return true;
case 0x05: /* VMUDM */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmudm, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmudm, this);
return true;
case 0x06: /* VMUDN */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmudn, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmudn, this);
return true;
case 0x07: /* VMUDH */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmudh, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmudh, this);
return true;
case 0x08: /* VMACF */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmacf, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmacf, this);
return true;
case 0x09: /* VMACU */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmacu, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmacu, this);
return true;
case 0x0c: /* VMADL */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmadl, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmadl, this);
return true;
case 0x0d: /* VMADM */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmadm, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmadm, this);
return true;
case 0x0e: /* VMADN */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmadn, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmadn, this);
return true;
case 0x0f: /* VMADH */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmadh, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmadh, this);
return true;
case 0x10: /* VADD */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vadd, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vadd, this);
return true;
case 0x11: /* VSUB */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vsub, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vsub, this);
return true;
case 0x13: /* VABS */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vabs, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vabs, this);
return true;
case 0x14: /* VADDC */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vaddc, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vaddc, this);
return true;
case 0x15: /* VSUBC */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vsubc, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vsubc, this);
return true;
case 0x16: /* VADDB */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vaddb, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vaddb, this);
return true;
case 0x17: /* VSUBB (reserved, functionally identical to VADDB) */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vaddb, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vaddb, this);
return true;
case 0x18: /* VACCB (reserved, functionally identical to VADDB) */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vaddb, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vaddb, this);
return true;
case 0x19: /* VSUCB (reserved, functionally identical to VADDB) */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vaddb, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vaddb, this);
return true;
case 0x1d: /* VSAW */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vsaw, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vsaw, this);
return true;
case 0x20: /* VLT */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vlt, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vlt, this);
return true;
case 0x21: /* VEQ */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_veq, this);
+ UML_CALLC(block, &cop2_drc::cfunc_veq, this);
return true;
case 0x22: /* VNE */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vne, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vne, this);
return true;
case 0x23: /* VGE */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vge, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vge, this);
return true;
case 0x24: /* VCL */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vcl, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vcl, this);
return true;
case 0x25: /* VCH */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vch, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vch, this);
return true;
case 0x26: /* VCR */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vcr, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vcr, this);
return true;
case 0x27: /* VMRG */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmrg, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmrg, this);
return true;
case 0x28: /* VAND */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vand, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vand, this);
return true;
case 0x29: /* VNAND */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vnand, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vnand, this);
return true;
case 0x2a: /* VOR */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vor, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vor, this);
return true;
case 0x2b: /* VNOR */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vnor, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vnor, this);
return true;
case 0x2c: /* VXOR */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vxor, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vxor, this);
return true;
case 0x2d: /* VNXOR */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vnxor, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vnxor, this);
return true;
case 0x30: /* VRCP */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vrcp, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vrcp, this);
return true;
case 0x31: /* VRCPL */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vrcpl, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vrcpl, this);
return true;
case 0x32: /* VRCPH */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vrcph, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vrcph, this);
return true;
case 0x33: /* VMOV */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vmov, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vmov, this);
return true;
case 0x34: /* VRSQ */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vrsq, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vrsq, this);
return true;
case 0x35: /* VRSQL */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vrsql, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vrsql, this);
return true;
case 0x36: /* VRSQH */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_vrsqh, this);
+ UML_CALLC(block, &cop2_drc::cfunc_vrsqh, this);
return true;
case 0x37: /* VNOP */
@@ -3489,7 +3155,7 @@ bool rsp_cop2_drc::generate_vector_opcode(drcuml_block *block, rsp_device::compi
default:
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, unimplemented_opcode, &m_rsp);
+ UML_CALLC(block, &cop2_drc::unimplemented_opcode, &m_rsp);
return false;
}
}
@@ -3499,7 +3165,7 @@ bool rsp_cop2_drc::generate_vector_opcode(drcuml_block *block, rsp_device::compi
Vector Flag Reading/Writing
***************************************************************************/
-void rsp_cop2_drc::mfc2()
+void rsp_device::cop2_drc::mfc2()
{
uint32_t op = m_rspcop2_state->op;
int el = (op >> 7) & 0xf;
@@ -3509,12 +3175,7 @@ void rsp_cop2_drc::mfc2()
if (RTREG) RTVAL = (int32_t)(int16_t)((b1 << 8) | (b2));
}
-static void cfunc_mfc2(void *param)
-{
- ((rsp_cop2 *)param)->mfc2();
-}
-
-void rsp_cop2_drc::cfc2()
+void rsp_device::cop2_drc::cfc2()
{
uint32_t op = m_rspcop2_state->op;
if (RTREG)
@@ -3573,13 +3234,8 @@ void rsp_cop2_drc::cfc2()
}
}
-static void cfunc_cfc2(void *param)
-{
- ((rsp_cop2 *)param)->cfc2();
-}
-
-void rsp_cop2_drc::mtc2()
+void rsp_device::cop2_drc::mtc2()
{
uint32_t op = m_rspcop2_state->op;
int el = (op >> 7) & 0xf;
@@ -3587,13 +3243,8 @@ void rsp_cop2_drc::mtc2()
VREG_B(VS1REG, (el+1) & 0xf) = (RTVAL >> 0) & 0xff;
}
-static void cfunc_mtc2(void *param)
-{
- ((rsp_cop2 *)param)->mtc2();
-}
-
-void rsp_cop2_drc::ctc2()
+void rsp_device::cop2_drc::ctc2()
{
uint32_t op = m_rspcop2_state->op;
switch(RDREG)
@@ -3692,16 +3343,11 @@ void rsp_cop2_drc::ctc2()
}
}
-static void cfunc_ctc2(void *param)
-{
- ((rsp_cop2 *)param)->ctc2();
-}
-
/***************************************************************************
COP2 Opcode Compilation
***************************************************************************/
-bool rsp_cop2_drc::generate_cop2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc)
+bool rsp_device::cop2_drc::generate_cop2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = RSREG;
@@ -3712,7 +3358,7 @@ bool rsp_cop2_drc::generate_cop2(drcuml_block *block, rsp_device::compiler_state
if (RTREG != 0)
{
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_mfc2, this); // callc mfc2
+ UML_CALLC(block, &cop2_drc::cfunc_mfc2, this); // callc mfc2
}
return true;
@@ -3720,18 +3366,18 @@ bool rsp_cop2_drc::generate_cop2(drcuml_block *block, rsp_device::compiler_state
if (RTREG != 0)
{
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_cfc2, this); // callc cfc2
+ UML_CALLC(block, &cop2_drc::cfunc_cfc2, this); // callc cfc2
}
return true;
case 0x04: /* MTCz */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_mtc2, this); // callc mtc2
+ UML_CALLC(block, &cop2_drc::cfunc_mtc2, this); // callc mtc2
return true;
case 0x06: /* CTCz */
UML_MOV(block, mem(&m_rspcop2_state->op), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_ctc2, this); // callc ctc2
+ UML_CALLC(block, &cop2_drc::cfunc_ctc2, this); // callc ctc2
return true;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
diff --git a/src/devices/cpu/rsp/rspcp2d.h b/src/devices/cpu/rsp/rspcp2d.h
index 2e07403458d..09263a39cdf 100644
--- a/src/devices/cpu/rsp/rspcp2d.h
+++ b/src/devices/cpu/rsp/rspcp2d.h
@@ -8,30 +8,100 @@
using Universal Machine Language (UML) dynamic recompilation.
***************************************************************************/
+#ifndef MAME_CPU_RSP_RSPCP2D_H
+#define MAME_CPU_RSP_RSPCP2D_H
#pragma once
-#ifndef __RSPCP2D_H__
-#define __RSPCP2D_H__
-
-#include "cpu/drcuml.h"
#include "rsp.h"
#include "rspcp2.h"
+#include "cpu/drcuml.h"
-class rsp_cop2_drc : public rsp_cop2
+
+class rsp_device::cop2_drc : public rsp_device::cop2
{
friend class rsp_device;
public:
- rsp_cop2_drc(rsp_device &rsp, running_machine &machine) : rsp_cop2(rsp, machine) { }
+ cop2_drc(rsp_device &rsp, running_machine &machine) : cop2(rsp, machine) { }
private:
- virtual bool generate_cop2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) override;
- virtual bool generate_lwc2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) override;
- virtual bool generate_swc2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) override;
+ virtual bool generate_cop2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc) override;
+ virtual bool generate_lwc2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc) override;
+ virtual bool generate_swc2(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc) override;
virtual void state_string_export(const int index, std::string &str) const override;
void cfunc_unimplemented_opcode() override;
+ static void unimplemented_opcode(void *param) { ((cop2 *)param)->cfunc_unimplemented_opcode(); }
+ static void cfunc_lbv(void *param) { ((cop2 *)param)->lbv(); }
+ static void cfunc_lsv(void *param) { ((cop2 *)param)->lsv(); }
+ static void cfunc_llv(void *param) { ((cop2 *)param)->llv(); }
+ static void cfunc_ldv(void *param) { ((cop2 *)param)->ldv(); }
+ static void cfunc_lqv(void *param) { ((cop2 *)param)->lqv(); }
+ static void cfunc_lrv(void *param) { ((cop2 *)param)->lrv(); }
+ static void cfunc_lpv(void *param) { ((cop2 *)param)->lpv(); }
+ static void cfunc_luv(void *param) { ((cop2 *)param)->luv(); }
+ static void cfunc_lhv(void *param) { ((cop2 *)param)->lhv(); }
+ static void cfunc_lfv(void *param) { ((cop2 *)param)->lfv(); }
+ static void cfunc_lwv(void *param) { ((cop2 *)param)->lwv(); }
+ static void cfunc_ltv(void *param) { ((cop2 *)param)->ltv(); }
+ static void cfunc_sbv(void *param) { ((cop2 *)param)->sbv(); }
+ static void cfunc_ssv(void *param) { ((cop2 *)param)->ssv(); }
+ static void cfunc_slv(void *param) { ((cop2 *)param)->slv(); }
+ static void cfunc_sdv(void *param) { ((cop2 *)param)->sdv(); }
+ static void cfunc_sqv(void *param) { ((cop2 *)param)->sqv(); }
+ static void cfunc_srv(void *param) { ((cop2 *)param)->srv(); }
+ static void cfunc_spv(void *param) { ((cop2 *)param)->spv(); }
+ static void cfunc_suv(void *param) { ((cop2 *)param)->suv(); }
+ static void cfunc_shv(void *param) { ((cop2 *)param)->shv(); }
+ static void cfunc_sfv(void *param) { ((cop2 *)param)->sfv(); }
+ static void cfunc_swv(void *param) { ((cop2 *)param)->swv(); }
+ static void cfunc_stv(void *param) { ((cop2 *)param)->stv(); }
+ static void cfunc_vmulf(void *param) { ((cop2 *)param)->vmulf(); }
+ static void cfunc_vmulu(void *param) { ((cop2 *)param)->vmulu(); }
+ static void cfunc_vmudl(void *param) { ((cop2 *)param)->vmudl(); }
+ static void cfunc_vmudm(void *param) { ((cop2 *)param)->vmudm(); }
+ static void cfunc_vmudn(void *param) { ((cop2 *)param)->vmudn(); }
+ static void cfunc_vmudh(void *param) { ((cop2 *)param)->vmudh(); }
+ static void cfunc_vmacf(void *param) { ((cop2 *)param)->vmacf(); }
+ static void cfunc_vmacu(void *param) { ((cop2 *)param)->vmacu(); }
+ static void cfunc_vmadl(void *param) { ((cop2 *)param)->vmadl(); }
+ static void cfunc_vmadm(void *param) { ((cop2 *)param)->vmadm(); }
+ static void cfunc_vmadn(void *param) { ((cop2 *)param)->vmadn(); }
+ static void cfunc_vmadh(void *param) { ((cop2 *)param)->vmadh(); }
+ static void cfunc_vadd(void *param) { ((cop2 *)param)->vadd(); }
+ static void cfunc_vsub(void *param) { ((cop2 *)param)->vsub(); }
+ static void cfunc_vabs(void *param) { ((cop2 *)param)->vabs(); }
+ static void cfunc_vaddc(void *param) { ((cop2 *)param)->vaddc(); }
+ static void cfunc_vsubc(void *param) { ((cop2 *)param)->vsubc(); }
+ static void cfunc_vaddb(void *param) { ((cop2 *)param)->vaddb(); }
+ static void cfunc_vsaw(void *param) { ((cop2 *)param)->vsaw(); }
+ static void cfunc_vlt(void *param) { ((cop2 *)param)->vlt(); }
+ static void cfunc_veq(void *param) { ((cop2 *)param)->veq(); }
+ static void cfunc_vne(void *param) { ((cop2 *)param)->vne(); }
+ static void cfunc_vge(void *param) { ((cop2 *)param)->vge(); }
+ static void cfunc_vcl(void *param) { ((cop2 *)param)->vcl(); }
+ static void cfunc_vch(void *param) { ((cop2 *)param)->vch(); }
+ static void cfunc_vcr(void *param) { ((cop2 *)param)->vcr(); }
+ static void cfunc_vmrg(void *param) { ((cop2 *)param)->vmrg(); }
+ static void cfunc_vand(void *param) { ((cop2 *)param)->vand(); }
+ static void cfunc_vnand(void *param) { ((cop2 *)param)->vnand(); }
+ static void cfunc_vor(void *param) { ((cop2 *)param)->vor(); }
+ static void cfunc_vnor(void *param) { ((cop2 *)param)->vnor(); }
+ static void cfunc_vxor(void *param) { ((cop2 *)param)->vxor(); }
+ static void cfunc_vnxor(void *param) { ((cop2 *)param)->vnxor(); }
+ static void cfunc_vrcp(void *param) { ((cop2 *)param)->vrcp(); }
+ static void cfunc_vrcpl(void *param) { ((cop2 *)param)->vrcpl(); }
+ static void cfunc_vrcph(void *param) { ((cop2 *)param)->vrcph(); }
+ static void cfunc_vmov(void *param) { ((cop2 *)param)->vmov(); }
+ static void cfunc_vrsq(void *param) { ((cop2 *)param)->vrsq(); }
+ static void cfunc_vrsql(void *param) { ((cop2 *)param)->vrsql(); }
+ static void cfunc_vrsqh(void *param) { ((cop2 *)param)->vrsqh(); }
+ static void cfunc_mfc2(void *param) { ((cop2 *)param)->mfc2(); }
+ static void cfunc_cfc2(void *param) { ((cop2 *)param)->cfc2(); }
+ static void cfunc_mtc2(void *param) { ((cop2 *)param)->mtc2(); }
+ static void cfunc_ctc2(void *param) { ((cop2 *)param)->ctc2(); }
+
public:
virtual void lbv() override;
virtual void lsv() override;
@@ -103,7 +173,7 @@ public:
virtual void ctc2() override;
private:
- virtual bool generate_vector_opcode(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) override;
+ virtual bool generate_vector_opcode(drcuml_block &block, rsp_device::compiler_state &compiler, const opcode_desc *desc) override;
};
-#endif /* __RSPCP2D_H__ */
+#endif // MAME_CPU_RSP_RSPCP2D_H
diff --git a/src/devices/cpu/rsp/rspdrc.cpp b/src/devices/cpu/rsp/rspdrc.cpp
index 3c7a1f2efab..52022213f43 100644
--- a/src/devices/cpu/rsp/rspdrc.cpp
+++ b/src/devices/cpu/rsp/rspdrc.cpp
@@ -33,8 +33,6 @@
#include "rspdefs.h"
-using namespace uml;
-
/***************************************************************************
CONSTANTS
***************************************************************************/
@@ -77,10 +75,10 @@ static inline uint32_t epc(const opcode_desc *desc)
already allocated
-------------------------------------------------*/
-static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
+static inline void alloc_handle(drcuml_state &drcuml, uml::code_handle *&handleptr, const char *name)
{
- if (*handleptr == nullptr)
- *handleptr = drcuml->handle_alloc(name);
+ if (!handleptr)
+ handleptr = drcuml.handle_alloc(name);
}
@@ -89,7 +87,7 @@ static inline void alloc_handle(drcuml_state *drcuml, code_handle **handleptr, c
registers
-------------------------------------------------*/
-inline void rsp_device::load_fast_iregs(drcuml_block *block)
+inline void rsp_device::load_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -104,7 +102,7 @@ inline void rsp_device::load_fast_iregs(drcuml_block *block)
registers
-------------------------------------------------*/
-inline void rsp_device::save_fast_iregs(drcuml_block *block)
+inline void rsp_device::save_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -262,7 +260,6 @@ void cfunc_sp_set_status_cb(void *param)
void rsp_device::execute_run_drc()
{
- drcuml_state *drcuml = m_drcuml.get();
int execute_result;
/* reset the cache if dirty */
@@ -280,7 +277,7 @@ void rsp_device::execute_run_drc()
}
/* run as much as we can */
- execute_result = drcuml->execute(*m_entry);
+ execute_result = m_drcuml->execute(*m_entry);
/* if we need to recompile, do it */
if (execute_result == EXECUTE_MISSING_CODE)
@@ -352,12 +349,10 @@ void rsp_device::code_flush_cache()
void rsp_device::code_compile_block(offs_t pc)
{
- drcuml_state *drcuml = m_drcuml.get();
compiler_state compiler = { 0 };
const opcode_desc *seqhead, *seqlast;
const opcode_desc *desclist;
int override = false;
- drcuml_block *block;
g_profiler.start(PROFILER_DRC_COMPILE);
@@ -370,7 +365,7 @@ void rsp_device::code_compile_block(offs_t pc)
try
{
/* start the block */
- block = drcuml->begin_block(4096);
+ drcuml_block &block(m_drcuml->begin_block(4096));
/* loop until we get through all instruction sequences */
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
@@ -379,8 +374,8 @@ void rsp_device::code_compile_block(offs_t pc)
uint32_t nextpc;
/* add a code log entry */
- if (drcuml->logging())
- block->append_comment("-------------------------"); // comment
+ if (m_drcuml->logging())
+ block.append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next())
@@ -389,7 +384,7 @@ void rsp_device::code_compile_block(offs_t pc)
assert(seqlast != nullptr);
/* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
- if (override || !drcuml->hash_exists(0, seqhead->pc))
+ if (override || !m_drcuml->hash_exists(0, seqhead->pc))
UML_HASH(block, 0, seqhead->pc); // hash mode,pc
/* if we already have a hash, and this is the first sequence, assume that we */
@@ -411,7 +406,7 @@ void rsp_device::code_compile_block(offs_t pc)
/* validate this code block if we're not pointing into ROM */
if (m_program->get_write_ptr(seqhead->physpc) != nullptr)
- generate_checksum_block(block, &compiler, seqhead, seqlast);
+ generate_checksum_block(block, compiler, seqhead, seqlast);
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
@@ -419,7 +414,7 @@ void rsp_device::code_compile_block(offs_t pc)
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
- generate_sequence_instruction(block, &compiler, curdesc);
+ generate_sequence_instruction(block, compiler, curdesc);
/* if we need to return to the start, do it */
if (seqlast->flags & OPFLAG_RETURN_TO_START)
@@ -430,7 +425,7 @@ void rsp_device::code_compile_block(offs_t pc)
nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4;
/* count off cycles and go there */
- generate_update_cycles(block, &compiler, nextpc, true); // <subtract cycles>
+ generate_update_cycles(block, compiler, nextpc, true); // <subtract cycles>
/* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc)
@@ -438,7 +433,7 @@ void rsp_device::code_compile_block(offs_t pc)
}
/* end the sequence */
- block->end();
+ block.end();
g_profiler.stop();
succeeded = true;
}
@@ -492,16 +487,13 @@ static void cfunc_fatalerror(void *param)
void rsp_device::static_generate_entry_point()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(20);
+ drcuml_block &block(m_drcuml->begin_block(20));
/* forward references */
- alloc_handle(drcuml, &m_nocode, "nocode");
+ alloc_handle(*m_drcuml, m_nocode, "nocode");
- alloc_handle(drcuml, &m_entry, "entry");
+ alloc_handle(*m_drcuml, m_entry, "entry");
UML_HANDLE(block, *m_entry); // handle entry
/* load fast integer registers */
@@ -509,7 +501,7 @@ void rsp_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, 0, mem(&m_rsp_state->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode
- block->end();
+ block.end();
}
@@ -520,21 +512,18 @@ void rsp_device::static_generate_entry_point()
void rsp_device::static_generate_nocode_handler()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_nocode, "nocode");
+ alloc_handle(*m_drcuml, m_nocode, "nocode");
UML_HANDLE(block, *m_nocode); // handle nocode
UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_rsp_state->pc), I0); // mov [pc],i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block.end();
}
@@ -545,40 +534,35 @@ void rsp_device::static_generate_nocode_handler()
void rsp_device::static_generate_out_of_cycles()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_out_of_cycles, "out_of_cycles");
+ alloc_handle(*m_drcuml, m_out_of_cycles, "out_of_cycles");
UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_rsp_state->pc), I0); // mov <pc>,i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
- block->end();
+ block.end();
}
/*------------------------------------------------------------------
static_generate_memory_accessor
------------------------------------------------------------------*/
-void rsp_device::static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle *&handleptr)
+void rsp_device::static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr)
{
/* on entry, address is in I0; data for writes is in I1 */
/* on exit, read result is in I0 */
/* routine trashes I0-I1 */
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
/* begin generating */
- block = drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, &handleptr, name);
+ alloc_handle(*m_drcuml, handleptr, name);
UML_HANDLE(block, *handleptr); // handle *handleptr
// write:
@@ -626,7 +610,7 @@ void rsp_device::static_generate_memory_accessor(int size, int iswrite, const ch
}
UML_RET(block);
- block->end();
+ block.end();
}
@@ -640,16 +624,16 @@ void rsp_device::static_generate_memory_accessor(int size, int iswrite, const ch
subtract cycles from the icount and generate
an exception if out
-------------------------------------------------*/
-void rsp_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception)
+void rsp_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception)
{
/* account for cycles */
- if (compiler->cycles > 0)
+ if (compiler.cycles > 0)
{
UML_SUB(block, mem(&m_rsp_state->icount), mem(&m_rsp_state->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
UML_EXHc(block, COND_S, *m_out_of_cycles, param);
}
- compiler->cycles = 0;
+ compiler.cycles = 0;
}
/*-------------------------------------------------
@@ -657,12 +641,12 @@ void rsp_device::generate_update_cycles(drcuml_block *block, compiler_state *com
validate a sequence of opcodes
-------------------------------------------------*/
-void rsp_device::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
+void rsp_device::generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
{
const opcode_desc *curdesc;
if (m_drcuml->logging())
{
- block->append_comment("[Validation for %08X]", seqhead->pc | 0x1000); // comment
+ block.append_comment("[Validation for %08X]", seqhead->pc | 0x1000); // comment
}
/* loose verify or single instruction: just compare and fail */
if (!(m_drcoptions & RSPDRC_STRICT_VERIFY) || seqhead->next() == nullptr)
@@ -725,7 +709,7 @@ void rsp_device::generate_checksum_block(drcuml_block *block, compiler_state *co
for a single instruction in a sequence
-------------------------------------------------*/
-void rsp_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void rsp_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
offs_t expc;
@@ -738,10 +722,10 @@ void rsp_device::generate_sequence_instruction(drcuml_block *block, compiler_sta
UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
/* accumulate total cycles */
- compiler->cycles += desc->cycles;
+ compiler.cycles += desc->cycles;
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we are debugging, call the debugger */
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
@@ -778,14 +762,14 @@ void rsp_device::generate_sequence_instruction(drcuml_block *block, compiler_sta
generate_branch
------------------------------------------------------------------*/
-void rsp_device::generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void rsp_device::generate_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
- compiler_state compiler_temp = *compiler;
+ compiler_state compiler_temp(compiler);
/* update the cycles and jump through the hash table to the target */
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(block, &compiler_temp, desc->targetpc, true); // <subtract cycles>
+ generate_update_cycles(block, compiler_temp, desc->targetpc, true); // <subtract cycles>
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc
else
@@ -793,7 +777,7 @@ void rsp_device::generate_branch(drcuml_block *block, compiler_state *compiler,
}
else
{
- generate_update_cycles(block, &compiler_temp, mem(&m_rsp_state->jmpdest), true); // <subtract cycles>
+ generate_update_cycles(block, compiler_temp, uml::mem(&m_rsp_state->jmpdest), true); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_rsp_state->jmpdest), *m_nocode); // hashjmp <mode>,<rsreg>,nocode
}
}
@@ -802,9 +786,9 @@ void rsp_device::generate_branch(drcuml_block *block, compiler_state *compiler,
generate_delay_slot_and_branch
------------------------------------------------------------------*/
-void rsp_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg)
+void rsp_device::generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg)
{
- compiler_state compiler_temp = *compiler;
+ compiler_state compiler_temp(compiler);
uint32_t op = desc->opptr.l[0];
/* fetch the target register if dynamic, in case it is modified by the delay slot */
@@ -822,24 +806,24 @@ void rsp_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_st
/* compile the delay slot using temporary compiler state */
assert(desc->delay.first() != nullptr);
- generate_sequence_instruction(block, &compiler_temp, desc->delay.first()); // <next instruction>
+ generate_sequence_instruction(block, compiler_temp, desc->delay.first()); // <next instruction>
generate_branch(block, compiler, desc);
/* update the label */
- compiler->labelnum = compiler_temp.labelnum;
+ compiler.labelnum = compiler_temp.labelnum;
/* reset the mapvar to the current cycles and account for skipped slots */
- compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ compiler.cycles += desc->skipslots;
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
}
-bool rsp_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool rsp_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = op >> 26;
- code_label skip;
+ uml::code_label skip;
switch (opswitch)
{
@@ -863,14 +847,14 @@ bool rsp_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
case 0x04: /* BEQ - MIPS I */
UML_CMP(block, R32(RSREG), R32(RTREG)); // cmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_NE, skip = compiler->labelnum++); // jmp skip,NE
+ UML_JMPc(block, COND_NE, skip = compiler.labelnum++); // jmp skip,NE
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
return true;
case 0x05: /* BNE - MIPS I */
UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // jmp skip,E
+ UML_JMPc(block, COND_E, skip = compiler.labelnum++); // jmp skip,E
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
return true;
@@ -879,7 +863,7 @@ bool rsp_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
if (RSREG != 0)
{
UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_G, skip = compiler->labelnum++); // jmp skip,G
+ UML_JMPc(block, COND_G, skip = compiler.labelnum++); // jmp skip,G
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
}
@@ -889,7 +873,7 @@ bool rsp_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
case 0x07: /* BGTZ - MIPS I */
UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_LE, skip = compiler->labelnum++); // jmp skip,LE
+ UML_JMPc(block, COND_LE, skip = compiler.labelnum++); // jmp skip,LE
generate_delay_slot_and_branch(block, compiler, desc, 0); // <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
return true;
@@ -1045,11 +1029,11 @@ bool rsp_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
'SPECIAL' group
-------------------------------------------------*/
-bool rsp_device::generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool rsp_device::generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = op & 63;
- //code_label skip;
+ //uml::code_label skip;
switch (opswitch)
{
@@ -1200,11 +1184,11 @@ bool rsp_device::generate_special(drcuml_block *block, compiler_state *compiler,
'REGIMM' group
-------------------------------------------------*/
-bool rsp_device::generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool rsp_device::generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = RTREG;
- code_label skip;
+ uml::code_label skip;
switch (opswitch)
{
@@ -1213,7 +1197,7 @@ bool rsp_device::generate_regimm(drcuml_block *block, compiler_state *compiler,
if (RSREG != 0)
{
UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_GE, skip = compiler->labelnum++); // jmp skip,GE
+ UML_JMPc(block, COND_GE, skip = compiler.labelnum++); // jmp skip,GE
generate_delay_slot_and_branch(block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
// <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
@@ -1225,7 +1209,7 @@ bool rsp_device::generate_regimm(drcuml_block *block, compiler_state *compiler,
if (RSREG != 0)
{
UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_L, skip = compiler->labelnum++); // jmp skip,L
+ UML_JMPc(block, COND_L, skip = compiler.labelnum++); // jmp skip,L
generate_delay_slot_and_branch(block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
// <next instruction + hashjmp>
UML_LABEL(block, skip); // skip:
@@ -1243,7 +1227,7 @@ bool rsp_device::generate_regimm(drcuml_block *block, compiler_state *compiler,
generate_cop0 - compile COP0 opcodes
-------------------------------------------------*/
-bool rsp_device::generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool rsp_device::generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint32_t op = desc->opptr.l[0];
uint8_t opswitch = RSREG;
@@ -1258,7 +1242,7 @@ bool rsp_device::generate_cop0(drcuml_block *block, compiler_state *compiler, co
UML_CALLC(block, cfunc_get_cop0_reg, this); // callc cfunc_get_cop0_reg
if(RDREG == 2)
{
- generate_update_cycles(block, compiler, mem(&m_rsp_state->pc), true);
+ generate_update_cycles(block, compiler, uml::mem(&m_rsp_state->pc), true);
UML_HASHJMP(block, 0, mem(&m_rsp_state->pc), *m_nocode);
}
}
@@ -1283,13 +1267,13 @@ bool rsp_device::generate_cop0(drcuml_block *block, compiler_state *compiler, co
including disassembly of a RSP instruction
-------------------------------------------------*/
-void rsp_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
+void rsp_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op)
{
if (m_drcuml->logging())
{
rsp_disassembler rspd;
std::ostringstream buffer;
rspd.dasm_one(buffer, pc, op);
- block->append_comment("%08X: %s", pc, buffer.str()); // comment
+ block.append_comment("%08X: %s", pc, buffer.str()); // comment
}
}
diff --git a/src/devices/cpu/rsp/rspfe.cpp b/src/devices/cpu/rsp/rspfe.cpp
index abf0597d006..ce4d4dceb0e 100644
--- a/src/devices/cpu/rsp/rspfe.cpp
+++ b/src/devices/cpu/rsp/rspfe.cpp
@@ -11,7 +11,6 @@
#include "emu.h"
#include "rspfe.h"
-#include "rsp.h"
#include "rspdefs.h"
@@ -20,12 +19,11 @@
//**************************************************************************
//-------------------------------------------------
-// rsp_frontend - constructor
+// rsp_device::frontend - constructor
//-------------------------------------------------
-rsp_frontend::rsp_frontend(rsp_device &rsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
- : drc_frontend(rsp, window_start, window_end, max_sequence),
- m_rsp(rsp)
+rsp_device::frontend::frontend(rsp_device &rsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
+ : drc_frontend(rsp, window_start, window_end, max_sequence), m_rsp(rsp)
{
}
@@ -35,7 +33,7 @@ rsp_frontend::rsp_frontend(rsp_device &rsp, uint32_t window_start, uint32_t wind
// instruction
//-------------------------------------------------
-bool rsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
+bool rsp_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
uint32_t op, opswitch;
@@ -160,7 +158,7 @@ bool rsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
// single instruction in the 'special' group
//-------------------------------------------------
-bool rsp_frontend::describe_special(uint32_t op, opcode_desc &desc)
+bool rsp_device::frontend::describe_special(uint32_t op, opcode_desc &desc)
{
switch (op & 63)
{
@@ -222,7 +220,7 @@ bool rsp_frontend::describe_special(uint32_t op, opcode_desc &desc)
// single instruction in the 'regimm' group
//-------------------------------------------------
-bool rsp_frontend::describe_regimm(uint32_t op, opcode_desc &desc)
+bool rsp_device::frontend::describe_regimm(uint32_t op, opcode_desc &desc)
{
switch (RTREG)
{
@@ -265,7 +263,7 @@ bool rsp_frontend::describe_regimm(uint32_t op, opcode_desc &desc)
// single instruction in the COP0 group
//-------------------------------------------------
-bool rsp_frontend::describe_cop0(uint32_t op, opcode_desc &desc)
+bool rsp_device::frontend::describe_cop0(uint32_t op, opcode_desc &desc)
{
switch (RSREG)
{
@@ -290,7 +288,7 @@ bool rsp_frontend::describe_cop0(uint32_t op, opcode_desc &desc)
// single instruction in the COP2 group
//-------------------------------------------------
-bool rsp_frontend::describe_cop2(uint32_t op, opcode_desc &desc)
+bool rsp_device::frontend::describe_cop2(uint32_t op, opcode_desc &desc)
{
switch (RSREG)
{
diff --git a/src/devices/cpu/rsp/rspfe.h b/src/devices/cpu/rsp/rspfe.h
index d292d9f4225..5f965a96e11 100644
--- a/src/devices/cpu/rsp/rspfe.h
+++ b/src/devices/cpu/rsp/rspfe.h
@@ -7,12 +7,11 @@
Front-end for RSP recompiler
***************************************************************************/
+#ifndef MAME_CPU_RSP_RSPFE_H
+#define MAME_CPU_RSP_RSPFE_H
#pragma once
-#ifndef __RSPFE_H__
-#define __RSPFE_H__
-
#include "rsp.h"
#include "cpu/drcfe.h"
@@ -30,11 +29,11 @@
// TYPE DEFINITIONS
//**************************************************************************
-class rsp_frontend : public drc_frontend
+class rsp_device::frontend : public drc_frontend
{
public:
// construction/destruction
- rsp_frontend(rsp_device &rsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
+ frontend(rsp_device &rsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
protected:
// required overrides
@@ -53,4 +52,4 @@ private:
-#endif /* __RSPFE_H__ */
+#endif // MAME_CPU_RSP_RSPFE_H
diff --git a/src/devices/cpu/s2650/s2650.cpp b/src/devices/cpu/s2650/s2650.cpp
index 62793b175ed..a11f768c12d 100644
--- a/src/devices/cpu/s2650/s2650.cpp
+++ b/src/devices/cpu/s2650/s2650.cpp
@@ -48,9 +48,9 @@ bool s2650_device::get_z80_mnemonics_mode() const
return false;
}
-util::disasm_interface *s2650_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> s2650_device::create_disassembler()
{
- return new s2650_disassembler(this);
+ return std::make_unique<s2650_disassembler>(this);
}
device_memory_interface::space_config_vector s2650_device::memory_space_config() const
diff --git a/src/devices/cpu/s2650/s2650.h b/src/devices/cpu/s2650/s2650.h
index 4d8da0cde0c..1524f1d9e30 100644
--- a/src/devices/cpu/s2650/s2650.h
+++ b/src/devices/cpu/s2650/s2650.h
@@ -69,7 +69,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual bool get_z80_mnemonics_mode() const override;
private:
diff --git a/src/devices/cpu/saturn/saturn.cpp b/src/devices/cpu/saturn/saturn.cpp
index c8a9e7ab1f0..b6dbf0b98f9 100644
--- a/src/devices/cpu/saturn/saturn.cpp
+++ b/src/devices/cpu/saturn/saturn.cpp
@@ -71,9 +71,9 @@ bool saturn_device::get_nonstandard_mnemonics_mode() const
}
-util::disasm_interface *saturn_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> saturn_device::create_disassembler()
{
- return new saturn_disassembler(this);
+ return std::make_unique<saturn_disassembler>(this);
}
diff --git a/src/devices/cpu/saturn/saturn.h b/src/devices/cpu/saturn/saturn.h
index a7ad69c43fc..b912ce25f70 100644
--- a/src/devices/cpu/saturn/saturn.h
+++ b/src/devices/cpu/saturn/saturn.h
@@ -110,7 +110,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual bool get_nonstandard_mnemonics_mode() const override;
private:
diff --git a/src/devices/cpu/sc61860/sc61860.cpp b/src/devices/cpu/sc61860/sc61860.cpp
index b52bd5e1596..c6898c181e0 100644
--- a/src/devices/cpu/sc61860/sc61860.cpp
+++ b/src/devices/cpu/sc61860/sc61860.cpp
@@ -69,9 +69,9 @@ device_memory_interface::space_config_vector sc61860_device::memory_space_config
};
}
-util::disasm_interface *sc61860_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sc61860_device::create_disassembler()
{
- return new sc61860_disassembler;
+ return std::make_unique<sc61860_disassembler>();
}
diff --git a/src/devices/cpu/sc61860/sc61860.h b/src/devices/cpu/sc61860/sc61860.h
index 80f1733c666..61acce6f46e 100644
--- a/src/devices/cpu/sc61860/sc61860.h
+++ b/src/devices/cpu/sc61860/sc61860.h
@@ -109,7 +109,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/scmp/scmp.cpp b/src/devices/cpu/scmp/scmp.cpp
index d73ac319ed3..de3b46217ed 100644
--- a/src/devices/cpu/scmp/scmp.cpp
+++ b/src/devices/cpu/scmp/scmp.cpp
@@ -55,9 +55,9 @@ ins8060_device::ins8060_device(const machine_config &mconfig, const char *tag, d
}
-util::disasm_interface *scmp_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> scmp_device::create_disassembler()
{
- return new scmp_disassembler;
+ return std::make_unique<scmp_disassembler>();
}
diff --git a/src/devices/cpu/scmp/scmp.h b/src/devices/cpu/scmp/scmp.h
index c77068d40b8..51d897b073d 100644
--- a/src/devices/cpu/scmp/scmp.h
+++ b/src/devices/cpu/scmp/scmp.h
@@ -54,7 +54,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/score/score.cpp b/src/devices/cpu/score/score.cpp
index b1182a8bb25..1244160d9c7 100644
--- a/src/devices/cpu/score/score.cpp
+++ b/src/devices/cpu/score/score.cpp
@@ -1350,7 +1350,7 @@ void score7_cpu_device::unemulated_op(const char * op)
fatalerror("%s: unemulated %s (PC=0x%08x)\n", tag(), op, m_ppc);
}
-util::disasm_interface *score7_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> score7_cpu_device::create_disassembler()
{
- return new score7_disassembler;
+ return std::make_unique<score7_disassembler>();
}
diff --git a/src/devices/cpu/score/score.h b/src/devices/cpu/score/score.h
index 392e2aaa4ac..a258d3e6420 100644
--- a/src/devices/cpu/score/score.h
+++ b/src/devices/cpu/score/score.h
@@ -54,7 +54,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
// helpers
diff --git a/src/devices/cpu/scudsp/scudsp.cpp b/src/devices/cpu/scudsp/scudsp.cpp
index 534bed62012..ef7f5294af9 100644
--- a/src/devices/cpu/scudsp/scudsp.cpp
+++ b/src/devices/cpu/scudsp/scudsp.cpp
@@ -1051,7 +1051,7 @@ void scudsp_cpu_device::state_string_export(const device_state_entry &entry, std
}
-util::disasm_interface *scudsp_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> scudsp_cpu_device::create_disassembler()
{
- return new scudsp_disassembler;
+ return std::make_unique<scudsp_disassembler>();
}
diff --git a/src/devices/cpu/scudsp/scudsp.h b/src/devices/cpu/scudsp/scudsp.h
index aab1a6f0af3..6fb8133e51e 100644
--- a/src/devices/cpu/scudsp/scudsp.h
+++ b/src/devices/cpu/scudsp/scudsp.h
@@ -90,7 +90,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
devcb_write_line m_out_irq_cb;
devcb_read16 m_in_dma_cb;
diff --git a/src/devices/cpu/se3208/se3208.cpp b/src/devices/cpu/se3208/se3208.cpp
index 79d1830d533..ff872b03340 100644
--- a/src/devices/cpu/se3208/se3208.cpp
+++ b/src/devices/cpu/se3208/se3208.cpp
@@ -1848,7 +1848,7 @@ void se3208_device::execute_set_input( int line, int state )
m_IRQ=state;
}
-util::disasm_interface *se3208_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> se3208_device::create_disassembler()
{
- return new se3208_disassembler;
+ return std::make_unique<se3208_disassembler>();
}
diff --git a/src/devices/cpu/se3208/se3208.h b/src/devices/cpu/se3208/se3208.h
index a9fe4249922..de65d3ae83d 100644
--- a/src/devices/cpu/se3208/se3208.h
+++ b/src/devices/cpu/se3208/se3208.h
@@ -39,7 +39,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/sh/sh.cpp b/src/devices/cpu/sh/sh.cpp
index f89f260c322..c6fa52e37d1 100644
--- a/src/devices/cpu/sh/sh.cpp
+++ b/src/devices/cpu/sh/sh.cpp
@@ -4,6 +4,7 @@
#include "emu.h"
#include "sh.h"
#include "sh_dasm.h"
+#include "cpu/drcumlsh.h"
void sh_common_execution::device_start()
{
@@ -2018,8 +2019,6 @@ void sh_common_execution::sh2drc_add_fastram(offs_t start, offs_t end, uint8_t r
}
}
-using namespace uml;
-
/***************************************************************************
INLINE FUNCTIONS
***************************************************************************/
@@ -2039,10 +2038,10 @@ uint32_t sh_common_execution::epc(const opcode_desc *desc)
already allocated
-------------------------------------------------*/
-void sh_common_execution::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
+void sh_common_execution::alloc_handle(uml::code_handle *&handleptr, const char *name)
{
- if (*handleptr == nullptr)
- *handleptr = drcuml->handle_alloc(name);
+ if (!handleptr)
+ handleptr = m_drcuml->handle_alloc(name);
}
/*-------------------------------------------------
@@ -2050,11 +2049,9 @@ void sh_common_execution::alloc_handle(drcuml_state *drcuml, code_handle **handl
registers
-------------------------------------------------*/
-void sh_common_execution::load_fast_iregs(drcuml_block *block)
+void sh_common_execution::load_fast_iregs(drcuml_block &block)
{
- int regnum;
-
- for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
+ for (int regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
{
if (m_regmap[regnum].is_int_register())
{
@@ -2069,11 +2066,9 @@ void sh_common_execution::load_fast_iregs(drcuml_block *block)
registers
-------------------------------------------------*/
-void sh_common_execution::save_fast_iregs(drcuml_block *block)
+void sh_common_execution::save_fast_iregs(drcuml_block &block)
{
- int regnum;
-
- for (regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
+ for (int regnum = 0; regnum < ARRAY_LENGTH(m_regmap); regnum++)
{
if (m_regmap[regnum].is_int_register())
{
@@ -2143,7 +2138,7 @@ const char *sh_common_execution::log_desc_flags_to_string(uint32_t flags)
log_register_list - log a list of GPR registers
-------------------------------------------------*/
-void sh_common_execution::log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist)
+void sh_common_execution::log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist)
{
int count = 0;
int regnum;
@@ -2152,72 +2147,72 @@ void sh_common_execution::log_register_list(drcuml_state *drcuml, const char *st
if (reglist[0] == 0 && reglist[1] == 0 && reglist[2] == 0)
return;
- drcuml->log_printf("[%s:", string);
+ m_drcuml->log_printf("[%s:", string);
for (regnum = 0; regnum < 16; regnum++)
{
if (reglist[0] & REGFLAG_R(regnum))
{
- drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum);
+ m_drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum);
if (regnostarlist != nullptr && !(regnostarlist[0] & REGFLAG_R(regnum)))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
}
if (reglist[1] & REGFLAG_PR)
{
- drcuml->log_printf("%spr", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%spr", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_PR))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
if (reglist[1] & REGFLAG_SR)
{
- drcuml->log_printf("%ssr", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%ssr", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_SR))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
if (reglist[1] & REGFLAG_MACL)
{
- drcuml->log_printf("%smacl", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%smacl", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_MACL))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
if (reglist[1] & REGFLAG_MACH)
{
- drcuml->log_printf("%smach", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%smach", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_MACH))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
if (reglist[1] & REGFLAG_GBR)
{
- drcuml->log_printf("%sgbr", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%sgbr", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_GBR))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
if (reglist[1] & REGFLAG_VBR)
{
- drcuml->log_printf("%svbr", (count++ == 0) ? "" : ",");
+ m_drcuml->log_printf("%svbr", (count++ == 0) ? "" : ",");
if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_VBR))
- drcuml->log_printf("*");
+ m_drcuml->log_printf("*");
}
- drcuml->log_printf("] ");
+ m_drcuml->log_printf("] ");
}
/*-------------------------------------------------
log_opcode_desc - log a list of descriptions
-------------------------------------------------*/
-void sh_common_execution::log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent)
+void sh_common_execution::log_opcode_desc(const opcode_desc *desclist, int indent)
{
/* open the file, creating it if necessary */
if (indent == 0)
- drcuml->log_printf("\nDescriptor list @ %08X\n", desclist->pc);
+ m_drcuml->log_printf("\nDescriptor list @ %08X\n", desclist->pc);
/* output each descriptor */
for ( ; desclist != nullptr; desclist = desclist->next())
@@ -2225,7 +2220,7 @@ void sh_common_execution::log_opcode_desc(drcuml_state *drcuml, const opcode_des
std::ostringstream stream;
/* disassemle the current instruction and output it to the log */
- if (drcuml->logging() || drcuml->logging_native())
+ if (m_drcuml->logging() || m_drcuml->logging_native())
{
if (desclist->flags & OPFLAG_VIRTUAL_NOOP)
stream << "<virtual nop>";
@@ -2237,20 +2232,20 @@ void sh_common_execution::log_opcode_desc(drcuml_state *drcuml, const opcode_des
}
else
stream << "???";
- drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), stream.str().c_str());
+ m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), stream.str().c_str());
/* output register states */
- log_register_list(drcuml, "use", desclist->regin, nullptr);
- log_register_list(drcuml, "mod", desclist->regout, desclist->regreq);
- drcuml->log_printf("\n");
+ log_register_list("use", desclist->regin, nullptr);
+ log_register_list("mod", desclist->regout, desclist->regreq);
+ m_drcuml->log_printf("\n");
/* if we have a delay slot, output it recursively */
if (desclist->delay.first() != nullptr)
- log_opcode_desc(drcuml, desclist->delay.first(), indent + 1);
+ log_opcode_desc(desclist->delay.first(), indent + 1);
/* at the end of a sequence add a dividing line */
if (desclist->flags & OPFLAG_END_SEQUENCE)
- drcuml->log_printf("-----\n");
+ m_drcuml->log_printf("-----\n");
}
}
@@ -2259,14 +2254,14 @@ void sh_common_execution::log_opcode_desc(drcuml_state *drcuml, const opcode_des
including disassembly of an SH2 instruction
-------------------------------------------------*/
-void sh_common_execution::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
+void sh_common_execution::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op)
{
if (m_drcuml->logging())
{
sh_disassembler sh2d(false);
std::ostringstream stream;
sh2d.dasm_one(stream, pc, op);
- block->append_comment("%08X: %s", pc, stream.str().c_str());
+ block.append_comment("%08X: %s", pc, stream.str().c_str());
}
}
@@ -2278,10 +2273,8 @@ void sh_common_execution::log_add_disasm_comment(drcuml_block *block, uint32_t p
void sh_common_execution::code_flush_cache()
{
- drcuml_state *drcuml = m_drcuml.get();
-
/* empty the transient cache contents */
- drcuml->reset();
+ m_drcuml->reset();
try
{
@@ -2291,12 +2284,12 @@ void sh_common_execution::code_flush_cache()
static_generate_entry_point();
/* add subroutines for memory accesses */
- static_generate_memory_accessor(1, false, "read8", &m_read8);
- static_generate_memory_accessor(1, true, "write8", &m_write8);
- static_generate_memory_accessor(2, false, "read16", &m_read16);
- static_generate_memory_accessor(2, true, "write16", &m_write16);
- static_generate_memory_accessor(4, false, "read32", &m_read32);
- static_generate_memory_accessor(4, true, "write32", &m_write32);
+ static_generate_memory_accessor(1, false, "read8", m_read8);
+ static_generate_memory_accessor(1, true, "write8", m_write8);
+ static_generate_memory_accessor(2, false, "read16", m_read16);
+ static_generate_memory_accessor(2, true, "write16", m_write16);
+ static_generate_memory_accessor(4, false, "read32", m_read32);
+ static_generate_memory_accessor(4, true, "write32", m_write32);
}
catch (drcuml_block::abort_compilation &)
{
@@ -2309,7 +2302,6 @@ void sh_common_execution::code_flush_cache()
/* Execute cycles - returns number of cycles actually run */
void sh_common_execution::execute_run_drc()
{
- drcuml_state *drcuml = m_drcuml.get();
int execute_result;
/* reset the cache if dirty */
@@ -2320,7 +2312,7 @@ void sh_common_execution::execute_run_drc()
do
{
/* run as much as we can */
- execute_result = drcuml->execute(*m_entry);
+ execute_result = m_drcuml->execute(*m_entry);
/* if we need to recompile, do it */
if (execute_result == EXECUTE_MISSING_CODE)
@@ -2346,20 +2338,18 @@ void sh_common_execution::execute_run_drc()
void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
{
- drcuml_state *drcuml = m_drcuml.get();
compiler_state compiler = { 0 };
const opcode_desc *seqhead, *seqlast;
const opcode_desc *desclist;
bool override = false;
- drcuml_block *block;
g_profiler.start(PROFILER_DRC_COMPILE);
/* get a description of this sequence */
desclist = get_desclist(pc);
- if (drcuml->logging() || drcuml->logging_native())
- log_opcode_desc(drcuml, desclist, 0);
+ if (m_drcuml->logging() || m_drcuml->logging_native())
+ log_opcode_desc(desclist, 0);
bool succeeded = false;
while (!succeeded)
@@ -2367,7 +2357,7 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
try
{
/* start the block */
- block = drcuml->begin_block(4096);
+ drcuml_block &block(m_drcuml->begin_block(4096));
/* loop until we get through all instruction sequences */
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
@@ -2376,8 +2366,8 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
uint32_t nextpc;
/* add a code log entry */
- if (drcuml->logging())
- block->append_comment("-------------------------"); // comment
+ if (m_drcuml->logging())
+ block.append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next())
@@ -2386,7 +2376,7 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
assert(seqlast != nullptr);
/* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
- if (override || !drcuml->hash_exists(mode, seqhead->pc))
+ if (override || !m_drcuml->hash_exists(mode, seqhead->pc))
UML_HASH(block, mode, seqhead->pc); // hash mode,pc
/* if we already have a hash, and this is the first sequence, assume that we */
@@ -2408,7 +2398,7 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
/* validate this code block if we're not pointing into ROM */
if (m_program->get_write_ptr(seqhead->physpc) != nullptr)
- generate_checksum_block(block, &compiler, seqhead, seqlast);
+ generate_checksum_block(block, compiler, seqhead, seqlast);
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
@@ -2419,7 +2409,7 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
{
- generate_sequence_instruction(block, &compiler, curdesc, 0xffffffff);
+ generate_sequence_instruction(block, compiler, curdesc, 0xffffffff);
}
/* if we need to return to the start, do it */
@@ -2434,7 +2424,7 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
}
/* count off cycles and go there */
- generate_update_cycles(block, &compiler, nextpc, true); // <subtract cycles>
+ generate_update_cycles(block, compiler, nextpc, true); // <subtract cycles>
/* SH2 has no modes */
if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc)
@@ -2445,7 +2435,7 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
}
/* end the sequence */
- block->end();
+ block.end();
g_profiler.stop();
succeeded = true;
}
@@ -2464,21 +2454,18 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc)
void sh_common_execution::static_generate_nocode_handler()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_nocode, "nocode");
+ alloc_handle(m_nocode, "nocode");
UML_HANDLE(block, *m_nocode); // handle nocode
UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_sh2_state->pc), I0); // mov [pc],i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block.end();
}
@@ -2489,21 +2476,18 @@ void sh_common_execution::static_generate_nocode_handler()
void sh_common_execution::static_generate_out_of_cycles()
{
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
-
/* begin generating */
- block = drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(drcuml, &m_out_of_cycles, "out_of_cycles");
+ alloc_handle(m_out_of_cycles, "out_of_cycles");
UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_sh2_state->pc), I0); // mov <pc>,i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
- block->end();
+ block.end();
}
/*-------------------------------------------------
@@ -2511,11 +2495,11 @@ void sh_common_execution::static_generate_out_of_cycles()
validate a sequence of opcodes
-------------------------------------------------*/
-void sh_common_execution::generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
+void sh_common_execution::generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast)
{
const opcode_desc *curdesc;
if (m_drcuml->logging())
- block->append_comment("[Validation for %08X]", seqhead->pc); // comment
+ block.append_comment("[Validation for %08X]", seqhead->pc); // comment
/* loose verify or single instruction: just compare and fail */
if (!(m_drcoptions & SH2DRC_STRICT_VERIFY) || seqhead->next() == nullptr)
@@ -2567,7 +2551,7 @@ void sh_common_execution::generate_checksum_block(drcuml_block *block, compiler_
for a single instruction in a sequence
-------------------------------------------------*/
-void sh_common_execution::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc)
+void sh_common_execution::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc)
{
offs_t expc;
@@ -2580,10 +2564,10 @@ void sh_common_execution::generate_sequence_instruction(drcuml_block *block, com
UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
/* accumulate total cycles */
- compiler->cycles += desc->cycles;
+ compiler.cycles += desc->cycles;
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we want a probe, add it here */
if (desc->pc == PROBE_ADDRESS)
@@ -2652,16 +2636,16 @@ void sh_common_execution::generate_sequence_instruction(drcuml_block *block, com
generate_delay_slot
------------------------------------------------------------------*/
-void sh_common_execution::generate_delay_slot(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc)
+void sh_common_execution::generate_delay_slot(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc)
{
- compiler_state compiler_temp = *compiler;
+ compiler_state compiler_temp(compiler);
/* compile the delay slot using temporary compiler state */
assert(desc->delay.first() != nullptr);
- generate_sequence_instruction(block, &compiler_temp, desc->delay.first(), ovrpc); // <next instruction>
+ generate_sequence_instruction(block, compiler_temp, desc->delay.first(), ovrpc); // <next instruction>
/* update the label */
- compiler->labelnum = compiler_temp.labelnum;
+ compiler.labelnum = compiler_temp.labelnum;
}
void sh_common_execution::func_unimplemented()
@@ -2793,7 +2777,7 @@ void sh_common_execution::func_printf_probe()
opcode
-------------------------------------------------*/
-bool sh_common_execution::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc)
+bool sh_common_execution::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc)
{
uint32_t scratch, scratch2;
int32_t disp;
@@ -2942,13 +2926,13 @@ bool sh_common_execution::generate_opcode(drcuml_block *block, compiler_state *c
return false;
}
-bool sh_common_execution::generate_group_15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_15(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
// no ops here on sh1/2
return false;
}
-bool sh_common_execution::generate_group_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 15)
{
@@ -3027,33 +3011,33 @@ bool sh_common_execution::generate_group_2(drcuml_block *block, compiler_state *
UML_AND(block, I0, I0, ~(SH_Q|SH_M|SH_T)); // and r0, r0, ~(Q|M|T) (clear the Q,M, and T bits)
UML_TEST(block, R32(Rn), 0x80000000); // test Rn, #0x80000000
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jz labelnum
UML_OR(block, I0, I0, SH_Q); // or r0, r0, Q
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
UML_TEST(block, R32(Rm), 0x80000000); // test Rm, #0x80000000
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jz labelnum
UML_OR(block, I0, I0, SH_M); // or r0, r0, M
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
UML_XOR(block, I1, R32(Rn), R32(Rm)); // xor r1, Rn, Rm
UML_TEST(block, I1, 0x80000000); // test r1, #0x80000000
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jz labelnum
UML_OR(block, I0, I0, SH_T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
UML_MOV(block, mem(&m_sh2_state->sr), I0); // mov sr, r0
return true;
case 8: // TST(Rm, Rn);
UML_AND(block, I0, mem(&m_sh2_state->sr), ~SH_T); // and r0, sr, ~T (clear the T bit)
UML_TEST(block, R32(Rm), R32(Rn)); // test Rm, Rn
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_JMPc(block, COND_NZ, compiler.labelnum); // jnz compiler.labelnum
UML_OR(block, I0, I0, SH_T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // desc->pc:
+ UML_LABEL(block, compiler.labelnum++); // desc->pc:
UML_MOV(block, mem(&m_sh2_state->sr), I0); // mov m_sh2_state->sr, r0
return true;
@@ -3075,18 +3059,18 @@ bool sh_common_execution::generate_group_2(drcuml_block *block, compiler_state *
UML_AND(block, mem(&m_sh2_state->sr), mem(&m_sh2_state->sr), ~SH_T); // and sr, sr, ~T (clear the T bit)
UML_CMP(block, I1, 0); // cmp r1, #0
- UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jnz labelnum
UML_CMP(block, I2, 0); // cmp r2, #0
- UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jnz labelnum
UML_CMP(block, I3, 0); // cmp r3, #0
- UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jnz labelnum
UML_CMP(block, I7, 0); // cmp r7, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum+1); // jnz labelnum
+ UML_JMPc(block, COND_NZ, compiler.labelnum+1); // jnz labelnum
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
UML_OR(block, mem(&m_sh2_state->sr), mem(&m_sh2_state->sr), SH_T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum+1:
+ UML_LABEL(block, compiler.labelnum++); // labelnum+1:
return true;
case 9: // AND(Rm, Rn);
@@ -3118,7 +3102,7 @@ bool sh_common_execution::generate_group_2(drcuml_block *block, compiler_state *
}
-bool sh_common_execution::generate_group_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, uint32_t ovrpc)
+bool sh_common_execution::generate_group_3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, uint32_t ovrpc)
{
switch (opcode & 15)
{
@@ -3219,7 +3203,7 @@ bool sh_common_execution::generate_group_3(drcuml_block *block, compiler_state *
}
-bool sh_common_execution::generate_group_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_6(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 15)
{
@@ -3337,11 +3321,11 @@ bool sh_common_execution::generate_group_6(drcuml_block *block, compiler_state *
UML_CARRY(block, I0, 0); // carry = T (T is bit 0 of SR)
UML_SUBB(block, R32(Rn), 0, R32(Rm)); // subb Rn, #0, Rm
- UML_JMPc(block, COND_NC, compiler->labelnum); // jnc labelnum
+ UML_JMPc(block, COND_NC, compiler.labelnum); // jnc labelnum
UML_OR(block, mem(&m_sh2_state->sr), mem(&m_sh2_state->sr), SH_T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
return true;
}
@@ -3349,11 +3333,11 @@ bool sh_common_execution::generate_group_6(drcuml_block *block, compiler_state *
return false;
}
-bool sh_common_execution::generate_group_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_8(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
int32_t disp;
uint32_t udisp;
- code_label templabel;
+ uml::code_label templabel;
switch ( opcode & (15<<8) )
{
@@ -3413,17 +3397,17 @@ bool sh_common_execution::generate_group_8(drcuml_block *block, compiler_state *
UML_SEXT(block, I1, opcode&0xff, SIZE_BYTE); // sext r1, opcode&0xff, BYTE
UML_CMP(block, I1, R32(0)); // cmp r1, R0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum (if negative)
+ UML_JMPc(block, COND_NZ, compiler.labelnum); // jnz compiler.labelnum (if negative)
UML_OR(block, I0, I0, SH_T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
UML_MOV(block, mem(&m_sh2_state->sr), I0); // mov m_sh2_state->sr, r0
return true;
case 9<< 8: // BT(opcode & 0xff);
UML_TEST(block, mem(&m_sh2_state->sr), SH_T); // test m_sh2_state->sr, T
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jz compiler.labelnum
disp = ((int32_t)opcode << 24) >> 24;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = destination
@@ -3431,12 +3415,12 @@ bool sh_common_execution::generate_group_8(drcuml_block *block, compiler_state *
generate_update_cycles(block, compiler, m_sh2_state->ea, true); // <subtract cycles>
UML_HASHJMP(block, 0, m_sh2_state->ea, *m_nocode); // jmp m_sh2_state->ea
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
return true;
case 11<< 8: // BF(opcode & 0xff);
UML_TEST(block, mem(&m_sh2_state->sr), SH_T); // test m_sh2_state->sr, T
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_JMPc(block, COND_NZ, compiler.labelnum); // jnz compiler.labelnum
disp = ((int32_t)opcode << 24) >> 24;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = destination
@@ -3444,20 +3428,20 @@ bool sh_common_execution::generate_group_8(drcuml_block *block, compiler_state *
generate_update_cycles(block, compiler, m_sh2_state->ea, true); // <subtract cycles>
UML_HASHJMP(block, 0, m_sh2_state->ea, *m_nocode); // jmp m_sh2_state->ea
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
return true;
case 13<< 8: // BTS(opcode & 0xff);
if (m_cpu_type > CPU_TYPE_SH1)
{
UML_TEST(block, mem(&m_sh2_state->sr), SH_T); // test m_sh2_state->sr, T
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jz compiler.labelnum
disp = ((int32_t)opcode << 24) >> 24;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = destination
- templabel = compiler->labelnum; // save our label
- compiler->labelnum++; // make sure the delay slot doesn't use it
+ templabel = compiler.labelnum; // save our label
+ compiler.labelnum++; // make sure the delay slot doesn't use it
generate_delay_slot(block, compiler, desc, m_sh2_state->ea-2);
generate_update_cycles(block, compiler, m_sh2_state->ea, true); // <subtract cycles>
@@ -3472,13 +3456,13 @@ bool sh_common_execution::generate_group_8(drcuml_block *block, compiler_state *
if (m_cpu_type > CPU_TYPE_SH1)
{
UML_TEST(block, mem(&m_sh2_state->sr), SH_T); // test m_sh2_state->sr, T
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_JMPc(block, COND_NZ, compiler.labelnum); // jnz compiler.labelnum
disp = ((int32_t)opcode << 24) >> 24;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = destination
- templabel = compiler->labelnum; // save our label
- compiler->labelnum++; // make sure the delay slot doesn't use it
+ templabel = compiler.labelnum; // save our label
+ compiler.labelnum++; // make sure the delay slot doesn't use it
generate_delay_slot(block, compiler, desc, m_sh2_state->ea-2); // delay slot only if the branch is taken
generate_update_cycles(block, compiler, m_sh2_state->ea, true); // <subtract cycles>
@@ -3493,7 +3477,7 @@ bool sh_common_execution::generate_group_8(drcuml_block *block, compiler_state *
return false;
}
-bool sh_common_execution::generate_group_12_TRAPA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_12_TRAPA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
uint32_t scratch = (opcode & 0xff) * 4;
UML_ADD(block, mem(&m_sh2_state->ea), mem(&m_sh2_state->vbr), scratch); // add ea, vbr, scratch
@@ -3515,7 +3499,7 @@ bool sh_common_execution::generate_group_12_TRAPA(drcuml_block *block, compiler_
return true;
}
-bool sh_common_execution::generate_group_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_12(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
uint32_t scratch;
@@ -3597,11 +3581,11 @@ bool sh_common_execution::generate_group_12(drcuml_block *block, compiler_state
UML_AND(block, mem(&m_sh2_state->sr), mem(&m_sh2_state->sr), ~SH_T); // and sr, sr, ~T (clear the T bit)
UML_AND(block, I0, R32(0), scratch); // and r0, R0, scratch
UML_CMP(block, I0, 0); // cmp r0, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
+ UML_JMPc(block, COND_NZ, compiler.labelnum); // jnz labelnum
UML_OR(block, mem(&m_sh2_state->sr), mem(&m_sh2_state->sr), SH_T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
return true;
case 9<<8: // ANDI(opcode & 0xff);
@@ -3623,11 +3607,11 @@ bool sh_common_execution::generate_group_12(drcuml_block *block, compiler_state
UML_AND(block, I0, I0, opcode & 0xff);
UML_CMP(block, I0, 0); // cmp r0, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
+ UML_JMPc(block, COND_NZ, compiler.labelnum); // jnz labelnum
UML_OR(block, mem(&m_sh2_state->sr), mem(&m_sh2_state->sr), SH_T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
return true;
case 13<<8: // ANDM(opcode & 0xff);
@@ -3664,7 +3648,7 @@ bool sh_common_execution::generate_group_12(drcuml_block *block, compiler_state
return false;
}
-bool sh_common_execution::generate_group_0_RTE(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_0_RTE(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
generate_delay_slot(block, compiler, desc, 0xffffffff);
@@ -3678,16 +3662,16 @@ bool sh_common_execution::generate_group_0_RTE(drcuml_block *block, compiler_sta
UML_MOV(block, mem(&m_sh2_state->sr), I0); // mov sr, r0
UML_ADD(block, R32(15), R32(15), 4); // add R15, R15, #4
- compiler->checkints = true;
+ compiler.checkints = true;
UML_MOV(block, mem(&m_sh2_state->ea), mem(&m_sh2_state->pc)); // mov ea, pc
- generate_update_cycles(block, compiler, mem(&m_sh2_state->ea), true); // <subtract cycles>
+ generate_update_cycles(block, compiler, uml::mem(&m_sh2_state->ea), true); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_sh2_state->pc), *m_nocode); // and jump to the "resume PC"
return true;
}
-bool sh_common_execution::generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 0x3F)
{
@@ -3727,7 +3711,7 @@ bool sh_common_execution::generate_group_0(drcuml_block *block, compiler_state *
generate_delay_slot(block, compiler, desc, m_sh2_state->target);
- generate_update_cycles(block, compiler, mem(&m_sh2_state->target), true); // <subtract cycles>
+ generate_update_cycles(block, compiler, uml::mem(&m_sh2_state->target), true); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_sh2_state->target), *m_nocode); // jmp target
return true;
}
@@ -3793,7 +3777,7 @@ bool sh_common_execution::generate_group_0(drcuml_block *block, compiler_state *
generate_delay_slot(block, compiler, desc, m_sh2_state->target);
- generate_update_cycles(block, compiler, mem(&m_sh2_state->target), true); // <subtract cycles>
+ generate_update_cycles(block, compiler, uml::mem(&m_sh2_state->target), true); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_sh2_state->target), *m_nocode);
return true;
@@ -3866,18 +3850,18 @@ bool sh_common_execution::generate_group_0(drcuml_block *block, compiler_state *
case 0x1b: // SLEEP();
UML_MOV(block, I0, mem(&m_sh2_state->sleep_mode)); // mov i0, sleep_mode
UML_CMP(block, I0, 0x2); // cmp i0, #2
- UML_JMPc(block, COND_E, compiler->labelnum); // beq labelnum
+ UML_JMPc(block, COND_E, compiler.labelnum); // beq labelnum
// sleep mode != 2
UML_MOV(block, mem(&m_sh2_state->sleep_mode), 0x1); // mov sleep_mode, #1
generate_update_cycles(block, compiler, desc->pc, true); // repeat this insn
- UML_JMP(block, compiler->labelnum+1); // jmp labelnum+1
+ UML_JMP(block, compiler.labelnum+1); // jmp labelnum+1
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
// sleep_mode == 2
UML_MOV(block, mem(&m_sh2_state->sleep_mode), 0x0); // sleep_mode = 0
generate_update_cycles(block, compiler, desc->pc+2, true); // go to next insn
- UML_LABEL(block, compiler->labelnum++); // labelnum+1:
+ UML_LABEL(block, compiler.labelnum++); // labelnum+1:
return true;
case 0x22: // STCVBR(Rn);
@@ -3891,7 +3875,7 @@ bool sh_common_execution::generate_group_0(drcuml_block *block, compiler_state *
generate_delay_slot(block, compiler, desc, m_sh2_state->target);
- generate_update_cycles(block, compiler, mem(&m_sh2_state->target), true); // <subtract cycles>
+ generate_update_cycles(block, compiler, uml::mem(&m_sh2_state->target), true); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_sh2_state->target), *m_nocode); // jmp target
return true;
}
@@ -3917,18 +3901,18 @@ bool sh_common_execution::generate_group_0(drcuml_block *block, compiler_state *
return false;
}
-bool sh_common_execution::generate_group_4_LDCSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_4_LDCSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
// needs to be different on SH2 / 4
UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
UML_AND(block, I0, I0, SH_FLAGS); // and r0, r0, FLAGS
UML_MOV(block, mem(&m_sh2_state->sr), I0);
- compiler->checkints = true;
+ compiler.checkints = true;
return true;
}
-bool sh_common_execution::generate_group_4_LDCMSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_4_LDCMSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
@@ -3936,13 +3920,13 @@ bool sh_common_execution::generate_group_4_LDCMSR(drcuml_block *block, compiler_
UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
UML_MOV(block, mem(&m_sh2_state->sr), I0); // mov sr, r0
- compiler->checkints = true;
+ compiler.checkints = true;
if (!in_delay_slot)
generate_update_cycles(block, compiler, desc->pc + 2, true);
return true;
}
-bool sh_common_execution::generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh_common_execution::generate_group_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 0x3F)
{
@@ -4041,7 +4025,7 @@ bool sh_common_execution::generate_group_4(drcuml_block *block, compiler_state *
generate_delay_slot(block, compiler, desc, m_sh2_state->target-4);
- generate_update_cycles(block, compiler, mem(&m_sh2_state->target), true); // <subtract cycles>
+ generate_update_cycles(block, compiler, uml::mem(&m_sh2_state->target), true); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_sh2_state->target), *m_nocode); // and do the jump
return true;
@@ -4063,10 +4047,10 @@ bool sh_common_execution::generate_group_4(drcuml_block *block, compiler_state *
{
UML_AND(block, I0, mem(&m_sh2_state->sr), ~SH_T); // and r0, sr, ~T (clear the T bit)
UML_SUB(block, R32(Rn), R32(Rn), 1); // sub Rn, Rn, 1
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jz compiler->labelnum
+ UML_JMPc(block, COND_NZ, compiler.labelnum); // jz compiler.labelnum
UML_OR(block, I0, I0, SH_T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // desc->pc:
+ UML_LABEL(block, compiler.labelnum++); // desc->pc:
UML_MOV(block, mem(&m_sh2_state->sr), I0); // mov m_sh2_state->sr, r0
return true;
@@ -4077,10 +4061,10 @@ bool sh_common_execution::generate_group_4(drcuml_block *block, compiler_state *
UML_AND(block, I0, mem(&m_sh2_state->sr), ~SH_T); // and r0, sr, ~T (clear the T bit)
UML_CMP(block, R32(Rn), 0); // cmp Rn, 0
- UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
+ UML_JMPc(block, COND_S, compiler.labelnum); // js compiler.labelnum (if negative)
UML_OR(block, I0, I0, SH_T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // desc->pc:
+ UML_LABEL(block, compiler.labelnum++); // desc->pc:
UML_MOV(block, mem(&m_sh2_state->sr), I0); // mov m_sh2_state->sr, r0
return true;
@@ -4090,12 +4074,12 @@ bool sh_common_execution::generate_group_4(drcuml_block *block, compiler_state *
UML_CMP(block, R32(Rn), 0); // cmp Rn, 0
- UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum (if zero)
+ UML_JMPc(block, COND_S, compiler.labelnum); // js compiler.labelnum (if negative)
+ UML_JMPc(block, COND_Z, compiler.labelnum); // jz compiler.labelnum (if zero)
UML_OR(block, I0, I0, SH_T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // desc->pc:
+ UML_LABEL(block, compiler.labelnum++); // desc->pc:
UML_MOV(block, mem(&m_sh2_state->sr), I0); // mov m_sh2_state->sr, r0
return true;
@@ -4155,11 +4139,11 @@ bool sh_common_execution::generate_group_4(drcuml_block *block, compiler_state *
UML_AND(block, mem(&m_sh2_state->sr), mem(&m_sh2_state->sr), ~SH_T); // and sr, sr, ~T
UML_CMP(block, I0, 0); // cmp r0, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
+ UML_JMPc(block, COND_NZ, compiler.labelnum); // jnz labelnum
UML_OR(block, mem(&m_sh2_state->sr), mem(&m_sh2_state->sr), SH_T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler.labelnum++); // labelnum:
UML_OR(block, I1, I0, 0x80); // or r1, r0, #0x80
@@ -4256,7 +4240,7 @@ bool sh_common_execution::generate_group_4(drcuml_block *block, compiler_state *
generate_delay_slot(block, compiler, desc, m_sh2_state->target);
- generate_update_cycles(block, compiler, mem(&m_sh2_state->target), true); // <subtract cycles>
+ generate_update_cycles(block, compiler, uml::mem(&m_sh2_state->target), true); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_sh2_state->target), *m_nocode); // jmp (target)
return true;
diff --git a/src/devices/cpu/sh/sh.h b/src/devices/cpu/sh/sh.h
index 914e9189f23..6ff23a7c989 100644
--- a/src/devices/cpu/sh/sh.h
+++ b/src/devices/cpu/sh/sh.h
@@ -8,7 +8,6 @@
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
-#include "cpu/drcumlsh.h"
/***************************************************************************
DEBUGGING
@@ -382,6 +381,8 @@ public:
/* internal compiler state */
struct compiler_state
{
+ compiler_state &operator=(compiler_state const &) = delete;
+
uint32_t cycles; /* accumulated cycles */
uint8_t checkints; /* need to check interrupts before next instruction */
uml::code_label labelnum; /* index for local labels */
@@ -389,23 +390,23 @@ public:
virtual void sh2_exception(const char *message, int irqline) { fatalerror("sh2_exception in base classs\n"); };
- virtual void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception) = 0;
+ virtual void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception) = 0;
- virtual bool generate_group_0_RTE(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- virtual bool generate_group_4_LDCSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- virtual bool generate_group_4_LDCMSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- virtual bool generate_group_12_TRAPA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ virtual bool generate_group_0_RTE(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ virtual bool generate_group_4_LDCSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ virtual bool generate_group_4_LDCMSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ virtual bool generate_group_12_TRAPA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc);
- virtual bool generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, uint32_t ovrpc);
- virtual bool generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- virtual bool generate_group_15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc);
+ virtual bool generate_group_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, uint32_t ovrpc);
+ virtual bool generate_group_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_6(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_8(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_12(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ virtual bool generate_group_15(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
void func_printf_probe();
void func_unimplemented();
@@ -424,20 +425,20 @@ public:
void sh2drc_add_pcflush(offs_t address);
virtual void static_generate_entry_point() = 0;
- virtual void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle **handleptr) = 0;
+ virtual void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr) = 0;
virtual const opcode_desc* get_desclist(offs_t pc) = 0;
uint32_t epc(const opcode_desc *desc);
- void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name);
- void load_fast_iregs(drcuml_block *block);
- void save_fast_iregs(drcuml_block *block);
+ void alloc_handle(uml::code_handle *&handleptr, const char *name);
+ void load_fast_iregs(drcuml_block &block);
+ void save_fast_iregs(drcuml_block &block);
const char *log_desc_flags_to_string(uint32_t flags);
- void log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
- void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent);
- void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
- void generate_delay_slot(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc);
- void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc);
+ void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
+ void log_opcode_desc(const opcode_desc *desclist, int indent);
+ void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
+ void generate_delay_slot(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc);
+ void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc);
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void code_flush_cache();
diff --git a/src/devices/cpu/sh/sh2.cpp b/src/devices/cpu/sh/sh2.cpp
index bf68177a10b..40259f420d5 100644
--- a/src/devices/cpu/sh/sh2.cpp
+++ b/src/devices/cpu/sh/sh2.cpp
@@ -200,9 +200,9 @@ device_memory_interface::space_config_vector sh2_device::memory_space_config() c
};
}
-util::disasm_interface *sh2_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sh2_device::create_disassembler()
{
- return new sh_disassembler(false);
+ return std::make_unique<sh_disassembler>(false);
}
uint8_t sh2_device::RB(offs_t A)
@@ -679,13 +679,12 @@ void sh2_device::sh2_exception(const char *message, int irqline)
***************************************************************************/
#include "emu.h"
-#include "debugger.h"
#include "sh2.h"
#include "sh2comn.h"
+#include "cpu/drcumlsh.h"
+#include "debugger.h"
-using namespace uml;
-
const opcode_desc* sh2_device::get_desclist(offs_t pc)
{
return m_drcfe->describe_code(pc);
@@ -706,17 +705,15 @@ static void cfunc_fastirq(void *param) { ((sh2_device *)param)->func_fastirq();
void sh2_device::static_generate_entry_point()
{
- drcuml_state *drcuml = m_drcuml.get();
- code_label skip = 1;
- drcuml_block *block;
+ uml::code_label const skip = 1;
/* begin generating */
- block = drcuml->begin_block(200);
+ drcuml_block &block(m_drcuml->begin_block(200));
/* forward references */
- alloc_handle(drcuml, &m_nocode, "nocode");
- alloc_handle(drcuml, &m_write32, "write32"); // necessary?
- alloc_handle(drcuml, &m_entry, "entry");
+ alloc_handle(m_nocode, "nocode");
+ alloc_handle(m_write32, "write32"); // necessary?
+ alloc_handle(m_entry, "entry");
UML_HANDLE(block, *m_entry); // handle entry
/* load fast integer registers */
@@ -776,7 +773,7 @@ void sh2_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, 0, mem(&m_sh2_state->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode
- block->end();
+ block.end();
}
@@ -786,15 +783,15 @@ void sh2_device::static_generate_entry_point()
an exception if out
-------------------------------------------------*/
-void sh2_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception)
+void sh2_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception)
{
/* check full interrupts if pending */
- if (compiler->checkints)
+ if (compiler.checkints)
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
- compiler->checkints = false;
- compiler->labelnum += 4;
+ compiler.checkints = false;
+ compiler.labelnum += 4;
/* check for interrupts */
UML_MOV(block, mem(&m_sh2_state->irqline), 0xffffffff); // mov irqline, #-1
@@ -848,7 +845,7 @@ void sh2_device::generate_update_cycles(drcuml_block *block, compiler_state *com
}
/* account for cycles */
- if (compiler->cycles > 0)
+ if (compiler.cycles > 0)
{
UML_SUB(block, mem(&m_sh2_state->icount), mem(&m_sh2_state->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
@@ -856,28 +853,26 @@ void sh2_device::generate_update_cycles(drcuml_block *block, compiler_state *com
UML_EXHc(block, COND_S, *m_out_of_cycles, param);
// exh out_of_cycles,nextpc
}
- compiler->cycles = 0;
+ compiler.cycles = 0;
}
/*------------------------------------------------------------------
static_generate_memory_accessor
------------------------------------------------------------------*/
-void sh2_device::static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle **handleptr)
+void sh2_device::static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr)
{
/* on entry, address is in I0; data for writes is in I1 */
/* on exit, read result is in I0 */
/* routine trashes I0 */
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
int label = 1;
/* begin generating */
- block = drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, handleptr, name);
- UML_HANDLE(block, **handleptr); // handle *handleptr
+ alloc_handle(handleptr, name);
+ UML_HANDLE(block, *handleptr); // handle *handleptr
// with internal handlers this becomes easier.
// if addr < 0x40000000 AND it with AM and do the read/write, else just do the read/write
@@ -986,7 +981,7 @@ void sh2_device::static_generate_memory_accessor(int size, int iswrite, const ch
UML_RET(block); // ret
- block->end();
+ block.end();
}
diff --git a/src/devices/cpu/sh/sh2.h b/src/devices/cpu/sh/sh2.h
index b3b767347e7..431c9831870 100644
--- a/src/devices/cpu/sh/sh2.h
+++ b/src/devices/cpu/sh/sh2.h
@@ -110,7 +110,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space *m_decrypted_program;
@@ -184,9 +184,9 @@ private:
virtual void init_drc_frontend() override;
virtual const opcode_desc* get_desclist(offs_t pc) override;
- virtual void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception) override;
+ virtual void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception) override;
virtual void static_generate_entry_point() override;
- virtual void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle **handleptr) override;
+ virtual void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr) override;
};
diff --git a/src/devices/cpu/sh/sh2drc.cpp b/src/devices/cpu/sh/sh2drc.cpp
deleted file mode 100644
index e69de29bb2d..00000000000
--- a/src/devices/cpu/sh/sh2drc.cpp
+++ /dev/null
diff --git a/src/devices/cpu/sh/sh4.cpp b/src/devices/cpu/sh/sh4.cpp
index 2cc4260559f..31da75a896b 100644
--- a/src/devices/cpu/sh/sh4.cpp
+++ b/src/devices/cpu/sh/sh4.cpp
@@ -31,6 +31,7 @@
#include "sh3comn.h"
#include "sh4tmu.h"
#include "sh_dasm.h"
+#include "cpu/drcumlsh.h"
#include "debugger.h"
@@ -140,9 +141,9 @@ sh4be_device::sh4be_device(const machine_config &mconfig, const char *tag, devic
}
-util::disasm_interface *sh34_base_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sh34_base_device::create_disassembler()
{
- return new sh_disassembler(true);
+ return std::make_unique<sh_disassembler>(true);
}
@@ -2522,8 +2523,6 @@ void sh34_base_device::sh4_set_ftcsr_callback(sh4_ftcsr_callback callback)
}
*/
-using namespace uml;
-
const opcode_desc* sh4be_device::get_desclist(offs_t pc)
{
return m_drcfe->describe_code(pc);
@@ -2574,12 +2573,12 @@ void sh3_device::init_drc_frontend()
void sh34_base_device::func_CHECKIRQ() { if (m_test_irq) sh4_check_pending_irq("mame_sh4_execute"); }
static void cfunc_CHECKIRQ(void *param) { ((sh34_base_device *)param)->func_CHECKIRQ(); };
-void sh34_base_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception)
+void sh34_base_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception)
{
/* check full interrupts if pending */
- if (compiler->checkints)
+ if (compiler.checkints)
{
- compiler->checkints = false;
+ compiler.checkints = false;
/* param is pc + 2 (the opcode after the current one)
as we're calling from opcode handlers here that will point to the current opcode instead
@@ -2598,7 +2597,7 @@ void sh34_base_device::generate_update_cycles(drcuml_block *block, compiler_stat
}
/* account for cycles */
- if (compiler->cycles > 0)
+ if (compiler.cycles > 0)
{
UML_SUB(block, mem(&m_sh2_state->icount), mem(&m_sh2_state->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
@@ -2606,7 +2605,7 @@ void sh34_base_device::generate_update_cycles(drcuml_block *block, compiler_stat
UML_EXHc(block, COND_S, *m_out_of_cycles, param);
// exh out_of_cycles,nextpc
}
- compiler->cycles = 0;
+ compiler.cycles = 0;
}
/*-------------------------------------------------
@@ -2617,18 +2616,15 @@ void sh34_base_device::generate_update_cycles(drcuml_block *block, compiler_stat
void sh34_base_device::static_generate_entry_point()
{
-
- drcuml_state *drcuml = m_drcuml.get();
- //code_label skip = 1;
- drcuml_block *block;
+ //uml::code_label const skip = 1;
/* begin generating */
- block = drcuml->begin_block(200);
+ drcuml_block &block(m_drcuml->begin_block(200));
/* forward references */
- alloc_handle(drcuml, &m_nocode, "nocode");
- alloc_handle(drcuml, &m_write32, "write32"); // necessary?
- alloc_handle(drcuml, &m_entry, "entry");
+ alloc_handle(m_nocode, "nocode");
+ alloc_handle(m_write32, "write32"); // necessary?
+ alloc_handle(m_entry, "entry");
UML_HANDLE(block, *m_entry); // handle entry
UML_CALLC(block, cfunc_CHECKIRQ, this);
@@ -2637,8 +2633,7 @@ void sh34_base_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, 0, mem(&m_sh2_state->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode
- block->end();
-
+ block.end();
}
@@ -2646,21 +2641,19 @@ void sh34_base_device::static_generate_entry_point()
static_generate_memory_accessor
------------------------------------------------------------------*/
-void sh34_base_device::static_generate_memory_accessor(int size, int iswrite, const char *name, code_handle **handleptr)
+void sh34_base_device::static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr)
{
/* on entry, address is in I0; data for writes is in I1 */
/* on exit, read result is in I0 */
/* routine trashes I0 */
- drcuml_state *drcuml = m_drcuml.get();
- drcuml_block *block;
int label = 1;
/* begin generating */
- block = drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(drcuml, handleptr, name);
- UML_HANDLE(block, **handleptr); // handle *handleptr
+ alloc_handle(handleptr, name);
+ UML_HANDLE(block, *handleptr); // handle *handleptr
#if 0
if (A >= 0xe0000000)
@@ -2785,10 +2778,10 @@ void sh34_base_device::static_generate_memory_accessor(int size, int iswrite, co
UML_RET(block); // ret
- block->end();
+ block.end();
}
-bool sh34_base_device::generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 0xff)
{
@@ -2862,7 +2855,7 @@ bool sh34_base_device::generate_group_0(drcuml_block *block, compiler_state *com
void sh34_base_device::func_STCRBANK() { STCRBANK(m_sh2_state->arg0); }
static void cfunc_STCRBANK(void *param) { ((sh34_base_device *)param)->func_STCRBANK(); };
-bool sh34_base_device::generate_group_0_STCRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_STCRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2874,7 +2867,7 @@ bool sh34_base_device::generate_group_0_STCRBANK(drcuml_block *block, compiler_s
void sh34_base_device::func_STCSSR() { STCSSR(m_sh2_state->arg0); }
static void cfunc_STCSSR(void *param) { ((sh34_base_device *)param)->func_STCSSR(); };
-bool sh34_base_device::generate_group_0_STCSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_STCSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2886,7 +2879,7 @@ bool sh34_base_device::generate_group_0_STCSSR(drcuml_block *block, compiler_sta
void sh34_base_device::func_STCSPC() { STCSPC(m_sh2_state->arg0); }
static void cfunc_STCSPC(void *param) { ((sh34_base_device *)param)->func_STCSPC(); };
-bool sh34_base_device::generate_group_0_STCSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_STCSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2898,7 +2891,7 @@ bool sh34_base_device::generate_group_0_STCSPC(drcuml_block *block, compiler_sta
void sh34_base_device::func_PREFM() { PREFM(m_sh2_state->arg0); }
static void cfunc_PREFM(void *param) { ((sh34_base_device *)param)->func_PREFM(); };
-bool sh34_base_device::generate_group_0_PREFM(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_PREFM(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2910,7 +2903,7 @@ bool sh34_base_device::generate_group_0_PREFM(drcuml_block *block, compiler_stat
void sh34_base_device::func_MOVCAL() { MOVCAL(m_sh2_state->arg0); }
static void cfunc_MOVCAL(void *param) { ((sh34_base_device *)param)->func_MOVCAL(); };
-bool sh34_base_device::generate_group_0_MOVCAL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_MOVCAL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2922,7 +2915,7 @@ bool sh34_base_device::generate_group_0_MOVCAL(drcuml_block *block, compiler_sta
void sh34_base_device::func_LDTLB() { LDTLB(m_sh2_state->arg0); }
static void cfunc_LDTLB(void *param) { ((sh34_base_device *)param)->func_LDTLB(); };
-bool sh34_base_device::generate_group_0_LDTLB(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_LDTLB(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2934,7 +2927,7 @@ bool sh34_base_device::generate_group_0_LDTLB(drcuml_block *block, compiler_stat
void sh34_base_device::func_CLRS() { CLRS(m_sh2_state->arg0); }
static void cfunc_CLRS(void *param) { ((sh34_base_device *)param)->func_CLRS(); };
-bool sh34_base_device::generate_group_0_CLRS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_CLRS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2946,7 +2939,7 @@ bool sh34_base_device::generate_group_0_CLRS(drcuml_block *block, compiler_state
void sh34_base_device::func_SETS() { SETS(m_sh2_state->arg0); }
static void cfunc_SETS(void *param) { ((sh34_base_device *)param)->func_SETS(); };
-bool sh34_base_device::generate_group_0_SETS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_SETS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2958,7 +2951,7 @@ bool sh34_base_device::generate_group_0_SETS(drcuml_block *block, compiler_state
void sh34_base_device::func_STCSGR() { STCSGR(m_sh2_state->arg0); }
static void cfunc_STCSGR(void *param) { ((sh34_base_device *)param)->func_STCSGR(); };
-bool sh34_base_device::generate_group_0_STCSGR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_STCSGR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2971,7 +2964,7 @@ bool sh34_base_device::generate_group_0_STCSGR(drcuml_block *block, compiler_sta
void sh34_base_device::func_STSFPUL() { STSFPUL(m_sh2_state->arg0); }
static void cfunc_STSFPUL(void *param) { ((sh34_base_device *)param)->func_STSFPUL(); };
-bool sh34_base_device::generate_group_0_STSFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_STSFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2983,7 +2976,7 @@ bool sh34_base_device::generate_group_0_STSFPUL(drcuml_block *block, compiler_st
void sh34_base_device::func_STSFPSCR() { STSFPSCR(m_sh2_state->arg0); }
static void cfunc_STSFPSCR(void *param) { ((sh34_base_device *)param)->func_STSFPSCR(); };
-bool sh34_base_device::generate_group_0_STSFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_STSFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -2995,7 +2988,7 @@ bool sh34_base_device::generate_group_0_STSFPSCR(drcuml_block *block, compiler_s
void sh34_base_device::func_STCDBR() { STCDBR(m_sh2_state->arg0); }
static void cfunc_STCDBR(void *param) { ((sh34_base_device *)param)->func_STCDBR(); };
-bool sh34_base_device::generate_group_0_STCDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_STCDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3007,17 +3000,17 @@ bool sh34_base_device::generate_group_0_STCDBR(drcuml_block *block, compiler_sta
void sh34_base_device::func_RTE() { RTE(); }
static void cfunc_RTE(void *param) { ((sh34_base_device *)param)->func_RTE(); };
-bool sh34_base_device::generate_group_0_RTE(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_0_RTE(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
generate_delay_slot(block, compiler, desc, 0xffffffff);
save_fast_iregs(block);
UML_CALLC(block, cfunc_RTE, this);
load_fast_iregs(block);
- compiler->checkints = true;
+ compiler.checkints = true;
UML_MOV(block, mem(&m_sh2_state->pc), mem(&m_sh2_state->m_delay));
- generate_update_cycles(block, compiler, mem(&m_sh2_state->ea), true); // <subtract cycles>
+ generate_update_cycles(block, compiler, uml::mem(&m_sh2_state->ea), true); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_sh2_state->pc), *m_nocode); // and jump to the "resume PC"
return true;
}
@@ -3025,7 +3018,7 @@ bool sh34_base_device::generate_group_0_RTE(drcuml_block *block, compiler_state
void sh34_base_device::func_TRAPA() { TRAPA(m_sh2_state->arg0 & 0xff); }
static void cfunc_TRAPA(void *param) { ((sh34_base_device *)param)->func_TRAPA(); };
-bool sh34_base_device::generate_group_12_TRAPA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_12_TRAPA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3039,14 +3032,14 @@ bool sh34_base_device::generate_group_12_TRAPA(drcuml_block *block, compiler_sta
void sh34_base_device::func_LDCSR() { LDCSR(m_sh2_state->arg0); }
static void cfunc_LDCSR(void *param) { ((sh34_base_device *)param)->func_LDCSR(); };
-bool sh34_base_device::generate_group_4_LDCSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
UML_CALLC(block, cfunc_LDCSR, this);
load_fast_iregs(block);
- compiler->checkints = true;
+ compiler.checkints = true;
return true;
}
@@ -3054,14 +3047,14 @@ bool sh34_base_device::generate_group_4_LDCSR(drcuml_block *block, compiler_stat
void sh34_base_device::func_LDCMSR() { LDCMSR(m_sh2_state->arg0); }
static void cfunc_LDCMSR(void *param) { ((sh34_base_device *)param)->func_LDCMSR(); };
-bool sh34_base_device::generate_group_4_LDCMSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCMSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
UML_CALLC(block, cfunc_LDCMSR, this);
load_fast_iregs(block);
- compiler->checkints = true;
+ compiler.checkints = true;
if (!in_delay_slot)
generate_update_cycles(block, compiler, desc->pc + 2, true);
@@ -3071,7 +3064,7 @@ bool sh34_base_device::generate_group_4_LDCMSR(drcuml_block *block, compiler_sta
void sh34_base_device::func_SHAD() { SHAD(m_sh2_state->arg0); }
static void cfunc_SHAD(void *param) { ((sh34_base_device *)param)->func_SHAD(); };
-bool sh34_base_device::generate_group_4_SHAD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_SHAD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3083,7 +3076,7 @@ bool sh34_base_device::generate_group_4_SHAD(drcuml_block *block, compiler_state
void sh34_base_device::func_SHLD() { SHLD(m_sh2_state->arg0); }
static void cfunc_SHLD(void *param) { ((sh34_base_device *)param)->func_SHLD(); };
-bool sh34_base_device::generate_group_4_SHLD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_SHLD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3092,7 +3085,7 @@ bool sh34_base_device::generate_group_4_SHLD(drcuml_block *block, compiler_state
return true;
}
-bool sh34_base_device::generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 0xff)
{
@@ -3219,7 +3212,7 @@ bool sh34_base_device::generate_group_4(drcuml_block *block, compiler_state *com
void sh34_base_device::func_LDCRBANK() { LDCRBANK(m_sh2_state->arg0); }
static void cfunc_LDCRBANK(void *param) { ((sh34_base_device *)param)->func_LDCRBANK(); };
-bool sh34_base_device::generate_group_4_LDCRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3231,7 +3224,7 @@ bool sh34_base_device::generate_group_4_LDCRBANK(drcuml_block *block, compiler_s
void sh34_base_device::func_STCMRBANK() { STCMRBANK(m_sh2_state->arg0); }
static void cfunc_STCMRBANK(void *param) { ((sh34_base_device *)param)->func_STCMRBANK(); };
-bool sh34_base_device::generate_group_4_STCMRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_STCMRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3243,7 +3236,7 @@ bool sh34_base_device::generate_group_4_STCMRBANK(drcuml_block *block, compiler_
void sh34_base_device::func_LDCMRBANK() { LDCMRBANK(m_sh2_state->arg0); }
static void cfunc_LDCMRBANK(void *param) { ((sh34_base_device *)param)->func_LDCMRBANK(); };
-bool sh34_base_device::generate_group_4_LDCMRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCMRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3255,7 +3248,7 @@ bool sh34_base_device::generate_group_4_LDCMRBANK(drcuml_block *block, compiler_
void sh34_base_device::func_STCMSGR() { STCMSGR(m_sh2_state->arg0); }
static void cfunc_STCMSGR(void *param) { ((sh34_base_device *)param)->func_STCMSGR(); };
-bool sh34_base_device::generate_group_4_STCMSGR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_STCMSGR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3267,7 +3260,7 @@ bool sh34_base_device::generate_group_4_STCMSGR(drcuml_block *block, compiler_st
void sh34_base_device::func_STCMSSR() { STCMSSR(m_sh2_state->arg0); }
static void cfunc_STCMSSR(void *param) { ((sh34_base_device *)param)->func_STCMSSR(); };
-bool sh34_base_device::generate_group_4_STCMSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_STCMSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3279,7 +3272,7 @@ bool sh34_base_device::generate_group_4_STCMSSR(drcuml_block *block, compiler_st
void sh34_base_device::func_LDCMSSR() { LDCMSSR(m_sh2_state->arg0); }
static void cfunc_LDCMSSR(void *param) { ((sh34_base_device *)param)->func_LDCMSSR(); };
-bool sh34_base_device::generate_group_4_LDCMSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCMSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3291,7 +3284,7 @@ bool sh34_base_device::generate_group_4_LDCMSSR(drcuml_block *block, compiler_st
void sh34_base_device::func_LDCSSR() { LDCSSR(m_sh2_state->arg0); }
static void cfunc_LDCSSR(void *param) { ((sh34_base_device *)param)->func_LDCSSR(); };
-bool sh34_base_device::generate_group_4_LDCSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3303,7 +3296,7 @@ bool sh34_base_device::generate_group_4_LDCSSR(drcuml_block *block, compiler_sta
void sh34_base_device::func_STCMSPC() { STCMSPC(m_sh2_state->arg0); }
static void cfunc_STCMSPC(void *param) { ((sh34_base_device *)param)->func_STCMSPC(); };
-bool sh34_base_device::generate_group_4_STCMSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_STCMSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3315,7 +3308,7 @@ bool sh34_base_device::generate_group_4_STCMSPC(drcuml_block *block, compiler_st
void sh34_base_device::func_LDCMSPC() { LDCMSPC(m_sh2_state->arg0); }
static void cfunc_LDCMSPC(void *param) { ((sh34_base_device *)param)->func_LDCMSPC(); };
-bool sh34_base_device::generate_group_4_LDCMSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCMSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3327,7 +3320,7 @@ bool sh34_base_device::generate_group_4_LDCMSPC(drcuml_block *block, compiler_st
void sh34_base_device::func_LDCSPC() { LDCSPC(m_sh2_state->arg0); }
static void cfunc_LDCSPC(void *param) { ((sh34_base_device *)param)->func_LDCSPC(); };
-bool sh34_base_device::generate_group_4_LDCSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3339,7 +3332,7 @@ bool sh34_base_device::generate_group_4_LDCSPC(drcuml_block *block, compiler_sta
void sh34_base_device::func_STSMFPUL() { STSMFPUL(m_sh2_state->arg0); }
static void cfunc_STSMFPUL(void *param) { ((sh34_base_device *)param)->func_STSMFPUL(); };
-bool sh34_base_device::generate_group_4_STSMFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_STSMFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3351,7 +3344,7 @@ bool sh34_base_device::generate_group_4_STSMFPUL(drcuml_block *block, compiler_s
void sh34_base_device::func_LDSMFPUL() { LDSMFPUL(m_sh2_state->arg0); }
static void cfunc_LDSMFPUL(void *param) { ((sh34_base_device *)param)->func_LDSMFPUL(); };
-bool sh34_base_device::generate_group_4_LDSMFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDSMFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3363,7 +3356,7 @@ bool sh34_base_device::generate_group_4_LDSMFPUL(drcuml_block *block, compiler_s
void sh34_base_device::func_LDSFPUL() { LDSFPUL(m_sh2_state->arg0); }
static void cfunc_LDSFPUL(void *param) { ((sh34_base_device *)param)->func_LDSFPUL(); };
-bool sh34_base_device::generate_group_4_LDSFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDSFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3375,7 +3368,7 @@ bool sh34_base_device::generate_group_4_LDSFPUL(drcuml_block *block, compiler_st
void sh34_base_device::func_STSMFPSCR() { STSMFPSCR(m_sh2_state->arg0); }
static void cfunc_STSMFPSCR(void *param) { ((sh34_base_device *)param)->func_STSMFPSCR(); };
-bool sh34_base_device::generate_group_4_STSMFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_STSMFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3388,7 +3381,7 @@ void sh34_base_device::func_LDSMFPSCR() { LDSMFPSCR(m_sh2_state->arg0); }
static void cfunc_LDSMFPSCR(void *param) { ((sh34_base_device *)param)->func_LDSMFPSCR(); };
-bool sh34_base_device::generate_group_4_LDSMFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDSMFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3401,7 +3394,7 @@ bool sh34_base_device::generate_group_4_LDSMFPSCR(drcuml_block *block, compiler_
void sh34_base_device::func_LDSFPSCR() { LDSFPSCR(m_sh2_state->arg0); }
static void cfunc_LDSFPSCR(void *param) { ((sh34_base_device *)param)->func_LDSFPSCR(); };
-bool sh34_base_device::generate_group_4_LDSFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDSFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3413,7 +3406,7 @@ bool sh34_base_device::generate_group_4_LDSFPSCR(drcuml_block *block, compiler_s
void sh34_base_device::func_STCMDBR() { STCMDBR(m_sh2_state->arg0); }
static void cfunc_STCMDBR(void *param) { ((sh34_base_device *)param)->func_STCMDBR(); };
-bool sh34_base_device::generate_group_4_STCMDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_STCMDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3425,7 +3418,7 @@ bool sh34_base_device::generate_group_4_STCMDBR(drcuml_block *block, compiler_st
void sh34_base_device::func_LDCMDBR() { LDCMDBR(m_sh2_state->arg0); }
static void cfunc_LDCMDBR(void *param) { ((sh34_base_device *)param)->func_LDCMDBR(); };
-bool sh34_base_device::generate_group_4_LDCMDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCMDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3437,7 +3430,7 @@ bool sh34_base_device::generate_group_4_LDCMDBR(drcuml_block *block, compiler_st
void sh34_base_device::func_LDCDBR() { LDCDBR(m_sh2_state->arg0); }
static void cfunc_LDCDBR(void *param) { ((sh34_base_device *)param)->func_LDCDBR(); };
-bool sh34_base_device::generate_group_4_LDCDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_4_LDCDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3446,7 +3439,7 @@ bool sh34_base_device::generate_group_4_LDCDBR(drcuml_block *block, compiler_sta
return true;
}
-bool sh34_base_device::generate_group_15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 0x0f)
{
@@ -3476,7 +3469,7 @@ bool sh34_base_device::generate_group_15(drcuml_block *block, compiler_state *co
void sh34_base_device::func_FADD() { FADD(m_sh2_state->arg0); }
static void cfunc_FADD(void *param) { ((sh34_base_device *)param)->func_FADD(); };
-bool sh34_base_device::generate_group_15_FADD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FADD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3488,7 +3481,7 @@ bool sh34_base_device::generate_group_15_FADD(drcuml_block *block, compiler_stat
void sh34_base_device::func_FSUB() { FSUB(m_sh2_state->arg0); }
static void cfunc_FSUB(void *param) { ((sh34_base_device *)param)->func_FSUB(); };
-bool sh34_base_device::generate_group_15_FSUB(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FSUB(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3500,7 +3493,7 @@ bool sh34_base_device::generate_group_15_FSUB(drcuml_block *block, compiler_stat
void sh34_base_device::func_FMUL() { FMUL(m_sh2_state->arg0); }
static void cfunc_FMUL(void *param) { ((sh34_base_device *)param)->func_FMUL(); };
-bool sh34_base_device::generate_group_15_FMUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3512,7 +3505,7 @@ bool sh34_base_device::generate_group_15_FMUL(drcuml_block *block, compiler_stat
void sh34_base_device::func_FDIV() { FDIV(m_sh2_state->arg0); }
static void cfunc_FDIV(void *param) { ((sh34_base_device *)param)->func_FDIV(); };
-bool sh34_base_device::generate_group_15_FDIV(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FDIV(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3524,7 +3517,7 @@ bool sh34_base_device::generate_group_15_FDIV(drcuml_block *block, compiler_stat
void sh34_base_device::func_FCMP_EQ() { FCMP_EQ(m_sh2_state->arg0); }
static void cfunc_FCMP_EQ(void *param) { ((sh34_base_device *)param)->func_FCMP_EQ(); };
-bool sh34_base_device::generate_group_15_FCMP_EQ(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FCMP_EQ(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3536,7 +3529,7 @@ bool sh34_base_device::generate_group_15_FCMP_EQ(drcuml_block *block, compiler_s
void sh34_base_device::func_FCMP_GT() { FCMP_GT(m_sh2_state->arg0); }
static void cfunc_FCMP_GT(void *param) { ((sh34_base_device *)param)->func_FCMP_GT(); };
-bool sh34_base_device::generate_group_15_FCMP_GT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FCMP_GT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3548,7 +3541,7 @@ bool sh34_base_device::generate_group_15_FCMP_GT(drcuml_block *block, compiler_s
void sh34_base_device::func_FMOVS0FR() { FMOVS0FR(m_sh2_state->arg0); }
static void cfunc_FMOVS0FR(void *param) { ((sh34_base_device *)param)->func_FMOVS0FR(); };
-bool sh34_base_device::generate_group_15_FMOVS0FR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMOVS0FR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3560,7 +3553,7 @@ bool sh34_base_device::generate_group_15_FMOVS0FR(drcuml_block *block, compiler_
void sh34_base_device::func_FMOVFRS0() { FMOVFRS0(m_sh2_state->arg0); }
static void cfunc_FMOVFRS0(void *param) { ((sh34_base_device *)param)->func_FMOVFRS0(); };
-bool sh34_base_device::generate_group_15_FMOVFRS0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMOVFRS0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3572,7 +3565,7 @@ bool sh34_base_device::generate_group_15_FMOVFRS0(drcuml_block *block, compiler_
void sh34_base_device::func_FMOVMRFR() { FMOVMRFR(m_sh2_state->arg0); }
static void cfunc_FMOVMRFR(void *param) { ((sh34_base_device *)param)->func_FMOVMRFR(); };
-bool sh34_base_device::generate_group_15_FMOVMRFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMOVMRFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3584,7 +3577,7 @@ bool sh34_base_device::generate_group_15_FMOVMRFR(drcuml_block *block, compiler_
void sh34_base_device::func_FMOVMRIFR() { FMOVMRIFR(m_sh2_state->arg0); }
static void cfunc_FMOVMRIFR(void *param) { ((sh34_base_device *)param)->func_FMOVMRIFR(); };
-bool sh34_base_device::generate_group_15_FMOVMRIFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMOVMRIFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3596,7 +3589,7 @@ bool sh34_base_device::generate_group_15_FMOVMRIFR(drcuml_block *block, compiler
void sh34_base_device::func_FMOVFRMR() { FMOVFRMR(m_sh2_state->arg0); }
static void cfunc_FMOVFRMR(void *param) { ((sh34_base_device *)param)->func_FMOVFRMR(); };
-bool sh34_base_device::generate_group_15_FMOVFRMR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMOVFRMR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3608,7 +3601,7 @@ bool sh34_base_device::generate_group_15_FMOVFRMR(drcuml_block *block, compiler_
void sh34_base_device::func_FMOVFRMDR() { FMOVFRMDR(m_sh2_state->arg0); }
static void cfunc_FMOVFRMDR(void *param) { ((sh34_base_device *)param)->func_FMOVFRMDR(); };
-bool sh34_base_device::generate_group_15_FMOVFRMDR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMOVFRMDR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3620,7 +3613,7 @@ bool sh34_base_device::generate_group_15_FMOVFRMDR(drcuml_block *block, compiler
void sh34_base_device::func_FMOVFR() { FMOVFR(m_sh2_state->arg0); }
static void cfunc_FMOVFR(void *param) { ((sh34_base_device *)param)->func_FMOVFR(); };
-bool sh34_base_device::generate_group_15_FMOVFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMOVFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3632,7 +3625,7 @@ bool sh34_base_device::generate_group_15_FMOVFR(drcuml_block *block, compiler_st
void sh34_base_device::func_FMAC() { FMAC(m_sh2_state->arg0); }
static void cfunc_FMAC(void *param) { ((sh34_base_device *)param)->func_FMAC(); };
-bool sh34_base_device::generate_group_15_FMAC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_FMAC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3641,7 +3634,7 @@ bool sh34_base_device::generate_group_15_FMAC(drcuml_block *block, compiler_stat
return true;
}
-bool sh34_base_device::generate_group_15_op1111_0x13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch ((opcode >> 4) & 0x0f)
{
@@ -3668,7 +3661,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13(drcuml_block *block, compil
void sh34_base_device::func_FSTS() { FSTS(m_sh2_state->arg0); }
static void cfunc_FSTS(void *param) { ((sh34_base_device *)param)->func_FSTS(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FSTS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FSTS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3680,7 +3673,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FSTS(drcuml_block *block, c
void sh34_base_device::func_FLDS() { FLDS(m_sh2_state->arg0); }
static void cfunc_FLDS(void *param) { ((sh34_base_device *)param)->func_FLDS(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FLDS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FLDS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3692,7 +3685,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FLDS(drcuml_block *block, c
void sh34_base_device::func_FLOAT() { FLOAT(m_sh2_state->arg0); }
static void cfunc_FLOAT(void *param) { ((sh34_base_device *)param)->func_FLOAT(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FLOAT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FLOAT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3704,7 +3697,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FLOAT(drcuml_block *block,
void sh34_base_device::func_FTRC() { FTRC(m_sh2_state->arg0); }
static void cfunc_FTRC(void *param) { ((sh34_base_device *)param)->func_FTRC(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FTRC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FTRC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3716,7 +3709,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FTRC(drcuml_block *block, c
void sh34_base_device::func_FNEG() { FNEG(m_sh2_state->arg0); }
static void cfunc_FNEG(void *param) { ((sh34_base_device *)param)->func_FNEG(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FNEG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FNEG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3728,7 +3721,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FNEG(drcuml_block *block, c
void sh34_base_device::func_FABS() { FABS(m_sh2_state->arg0); }
static void cfunc_FABS(void *param) { ((sh34_base_device *)param)->func_FABS(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FABS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FABS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3740,7 +3733,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FABS(drcuml_block *block, c
void sh34_base_device::func_FSQRT() { FSQRT(m_sh2_state->arg0); }
static void cfunc_FSQRT(void *param) { ((sh34_base_device *)param)->func_FSQRT(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FSQRT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FSQRT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3752,7 +3745,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FSQRT(drcuml_block *block,
void sh34_base_device::func_FSRRA() { FSRRA(m_sh2_state->arg0); }
static void cfunc_FSRRA(void *param) { ((sh34_base_device *)param)->func_FSRRA(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FSRRA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FSRRA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3764,7 +3757,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FSRRA(drcuml_block *block,
void sh34_base_device::func_FLDI0() { FLDI0(m_sh2_state->arg0); }
static void cfunc_FLDI0(void *param) { ((sh34_base_device *)param)->func_FLDI0(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FLDI0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FLDI0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3776,7 +3769,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FLDI0(drcuml_block *block,
void sh34_base_device::func_FLDI1() { FLDI1(m_sh2_state->arg0); }
static void cfunc_FLDI1(void *param) { ((sh34_base_device *)param)->func_FLDI1(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FLDI1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FLDI1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3788,7 +3781,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FLDI1(drcuml_block *block,
void sh34_base_device::func_FCNVSD() { FCNVSD(m_sh2_state->arg0); }
static void cfunc_FCNVSD(void *param) { ((sh34_base_device *)param)->func_FCNVSD(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FCNVSD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FCNVSD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3800,7 +3793,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FCNVSD(drcuml_block *block,
void sh34_base_device::func_FCNVDS() { FCNVDS(m_sh2_state->arg0); }
static void cfunc_FCNVDS(void *param) { ((sh34_base_device *)param)->func_FCNVDS(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FCNVDS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FCNVDS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3812,7 +3805,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FCNVDS(drcuml_block *block,
void sh34_base_device::func_FIPR() { FIPR(m_sh2_state->arg0); }
static void cfunc_FIPR(void *param) { ((sh34_base_device *)param)->func_FIPR(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_FIPR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_FIPR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3821,7 +3814,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_FIPR(drcuml_block *block, c
return true;
}
-bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
if (opcode & 0x100) {
if (opcode & 0x200) {
@@ -3851,7 +3844,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13(drcuml_block *
void sh34_base_device::func_FSCHG() { FSCHG(); }
static void cfunc_FSCHG(void *param) { ((sh34_base_device *)param)->func_FSCHG(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSCHG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSCHG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
//UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3863,7 +3856,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSCHG(drcuml_b
void sh34_base_device::func_FRCHG() { FRCHG(); }
static void cfunc_FRCHG(void *param) { ((sh34_base_device *)param)->func_FRCHG(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FRCHG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FRCHG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
//UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3875,7 +3868,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FRCHG(drcuml_b
void sh34_base_device::func_FTRV() { FTRV(m_sh2_state->arg0); }
static void cfunc_FTRV(void *param) { ((sh34_base_device *)param)->func_FTRV(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
@@ -3887,7 +3880,7 @@ bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_bl
void sh34_base_device::func_FSSCA() { FSSCA(m_sh2_state->arg0); }
static void cfunc_FSSCA(void *param) { ((sh34_base_device *)param)->func_FSSCA(); };
-bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSSCA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
+bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSSCA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
save_fast_iregs(block);
UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]);
diff --git a/src/devices/cpu/sh/sh4.h b/src/devices/cpu/sh/sh4.h
index 52d7cdf4c3b..0f504f9083b 100644
--- a/src/devices/cpu/sh/sh4.h
+++ b/src/devices/cpu/sh/sh4.h
@@ -317,7 +317,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
address_space_config m_io_config;
@@ -648,93 +648,93 @@ protected:
// DRC related parts
- virtual void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception) override;
+ virtual void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception) override;
// code generators for sh3/4 specific opcodes
- bool generate_group_0_STCRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_STCSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_STCSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_PREFM(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_MOVCAL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_LDTLB(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_CLRS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_SETS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_STCSGR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_STSFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_STSFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_0_STCDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
-
- bool generate_group_4_SHAD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_SHLD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDCRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_STCMRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDCMRBANK(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_STCMSGR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_STCMSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDCMSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDCSSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_STCMSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDCMSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDCSPC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_STSMFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDSMFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDSFPUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_STSMFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDSMFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDSFPSCR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_STCMDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDCMDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_4_LDCDBR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
-
- bool generate_group_15_FADD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FSUB(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FMUL(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FDIV(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FCMP_EQ(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FCMP_GT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FMOVS0FR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FMOVFRS0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FMOVMRFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FMOVMRIFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FMOVFRMR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_s_0xf13_FTRVlot, uint32_t ovrpc);
- bool generate_group_15_FMOVFRMDR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FMOVFR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_FMAC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
-
- bool generate_group_15_op1111_0x13_FSTS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FLDS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FLOAT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FTRC(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FNEG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FABS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FSQRT(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FSRRA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FLDI0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FLDI1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FCNVSD(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FCNVDS(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_FIPR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_op1111_0xf13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
-
- bool generate_group_15_op1111_0x13_op1111_0xf13_FSCHG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_op1111_0xf13_FRCHG(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
- bool generate_group_15_op1111_0x13_op1111_0xf13_FSSCA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_STCRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_STCSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_STCSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_PREFM(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_MOVCAL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_LDTLB(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_CLRS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_SETS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_STCSGR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_STSFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_STSFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_0_STCDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+
+ bool generate_group_4_SHAD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_SHLD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDCRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_STCMRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDCMRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_STCMSGR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_STCMSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDCMSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDCSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_STCMSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDCMSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDCSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_STSMFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDSMFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDSFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_STSMFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDSMFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDSFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_STCMDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDCMDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_4_LDCDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+
+ bool generate_group_15_FADD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FSUB(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FMUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FDIV(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FCMP_EQ(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FCMP_GT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FMOVS0FR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FMOVFRS0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FMOVMRFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FMOVMRIFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FMOVFRMR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_s_0xf13_FTRVlot, uint32_t ovrpc);
+ bool generate_group_15_FMOVFRMDR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FMOVFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_FMAC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+
+ bool generate_group_15_op1111_0x13_FSTS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FLDS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FLOAT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FTRC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FNEG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FABS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FSQRT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FSRRA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FLDI0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FLDI1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FCNVSD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FCNVDS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_FIPR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_op1111_0xf13(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+
+ bool generate_group_15_op1111_0x13_op1111_0xf13_FSCHG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_op1111_0xf13_FRCHG(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ bool generate_group_15_op1111_0x13_op1111_0xf13_FSSCA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
// code generators for opcodes which need to differ on sh3/4 due to different interrupt / exception handling and register banking
- virtual bool generate_group_0_RTE(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
- virtual bool generate_group_4_LDCSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
- virtual bool generate_group_4_LDCMSR(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
- virtual bool generate_group_12_TRAPA(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
+ virtual bool generate_group_0_RTE(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
+ virtual bool generate_group_4_LDCSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
+ virtual bool generate_group_4_LDCMSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
+ virtual bool generate_group_12_TRAPA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
// group generators to allow for new opcodes
- virtual bool generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
- virtual bool generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
- virtual bool generate_group_15(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
+ virtual bool generate_group_0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
+ virtual bool generate_group_4(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
+ virtual bool generate_group_15(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override;
virtual void static_generate_entry_point() override;
- virtual void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle **handleptr) override;
+ virtual void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr) override;
private:
bool m_bigendian;
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp
index 115280bd3ac..bda0c6e6910 100644
--- a/src/devices/cpu/sharc/sharc.cpp
+++ b/src/devices/cpu/sharc/sharc.cpp
@@ -97,9 +97,9 @@ device_memory_interface::space_config_vector adsp21062_device::memory_space_conf
};
}
-util::disasm_interface *adsp21062_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> adsp21062_device::create_disassembler()
{
- return new sharc_disassembler;
+ return std::make_unique<sharc_disassembler>();
}
void adsp21062_device::enable_recompiler()
diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h
index 8699d6d3455..91455cb3b6c 100644
--- a/src/devices/cpu/sharc/sharc.h
+++ b/src/devices/cpu/sharc/sharc.h
@@ -222,7 +222,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
struct alignas(16) SHARC_DAG
@@ -612,7 +612,7 @@ private:
void execute_run_drc();
void flush_cache();
void compile_block(offs_t pc);
- void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name);
+ void alloc_handle(uml::code_handle *&handleptr, const char *name);
void static_generate_entry_point();
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
@@ -625,27 +625,27 @@ private:
void static_generate_push_status();
void static_generate_pop_status();
void static_generate_mode1_ops();
- void load_fast_iregs(drcuml_block *block);
- void save_fast_iregs(drcuml_block *block);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool last_delayslot);
- void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception);
- bool generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_unimplemented_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_if_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int condition, int skip_label);
- void generate_do_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int condition, int skip_label, ASTAT_DRC &astat);
- void generate_shift_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int data, int shiftop, int rn, int rx);
- void generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot);
- void generate_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot, bool loopabort, bool clearint);
- void generate_loop_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_write_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data);
- void generate_set_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data);
- void generate_clear_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data);
- void generate_toggle_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data);
- void generate_read_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool has_compute);
- void generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, uint32_t data);
- void generate_update_circular_buffer(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int g, int i);
- void generate_astat_copy(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
+ void load_fast_iregs(drcuml_block &block);
+ void save_fast_iregs(drcuml_block &block);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, bool last_delayslot);
+ void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception);
+ bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_unimplemented_compute(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_compute(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_if_condition(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int condition, int skip_label);
+ void generate_do_condition(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int condition, int skip_label, ASTAT_DRC &astat);
+ void generate_shift_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int data, int shiftop, int rn, int rx);
+ void generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, bool delayslot);
+ void generate_jump(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, bool delayslot, bool loopabort, bool clearint);
+ void generate_loop_jump(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_write_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data);
+ void generate_set_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data);
+ void generate_clear_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data);
+ void generate_toggle_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data);
+ void generate_read_ureg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int ureg, bool has_compute);
+ void generate_write_ureg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int ureg, bool imm, uint32_t data);
+ void generate_update_circular_buffer(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int g, int i);
+ void generate_astat_copy(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
bool if_condition_always_true(int condition);
uint32_t do_condition_astat_bits(int condition);
diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp
index c21a1c2e997..91802cc4d61 100644
--- a/src/devices/cpu/sharc/sharcdrc.cpp
+++ b/src/devices/cpu/sharc/sharcdrc.cpp
@@ -15,8 +15,6 @@
#include "cpu/drcuml.h"
#include "cpu/drcumlsh.h"
-using namespace uml;
-
#define USE_SWAPDQ 0
@@ -105,10 +103,10 @@ using namespace uml;
#define IRAM_END 0x7ffff
-inline void adsp21062_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
+inline void adsp21062_device::alloc_handle(uml::code_handle *&handleptr, const char *name)
{
- if (*handleptr == nullptr)
- *handleptr = drcuml->handle_alloc(name);
+ if (!handleptr)
+ handleptr = m_drcuml->handle_alloc(name);
}
@@ -261,7 +259,7 @@ load_fast_iregs - load any fast integer
registers
-------------------------------------------------*/
-inline void adsp21062_device::load_fast_iregs(drcuml_block *block)
+inline void adsp21062_device::load_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -280,7 +278,7 @@ save_fast_iregs - save any fast integer
registers
-------------------------------------------------*/
-void adsp21062_device::save_fast_iregs(drcuml_block *block)
+void adsp21062_device::save_fast_iregs(drcuml_block &block)
{
int regnum;
@@ -293,15 +291,15 @@ void adsp21062_device::save_fast_iregs(drcuml_block *block)
}
}
-void adsp21062_device::static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, const char *name, code_handle *&handleptr)
+void adsp21062_device::static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, const char *name, uml::code_handle *&handleptr)
{
// I0 = read/write data
// I1 = address
- drcuml_block *block = m_drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
// add a global entry for this
- alloc_handle(m_drcuml.get(), &handleptr, name);
+ alloc_handle(handleptr, name);
UML_HANDLE(block, *handleptr); // handle *handleptr
switch (type)
@@ -335,7 +333,7 @@ void adsp21062_device::static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, c
UML_RET(block);
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_push_pc()
@@ -343,11 +341,11 @@ void adsp21062_device::static_generate_push_pc()
// Push contents of I0 to PC stack
// Trashes I1
- code_label label = 1;
- drcuml_block *block = m_drcuml->begin_block(32);
+ uml::code_label label = 1;
+ drcuml_block &block(m_drcuml->begin_block(32));
// add a global entry for this
- alloc_handle(m_drcuml.get(), &m_push_pc, "push_pc");
+ alloc_handle(m_push_pc, "push_pc");
UML_HANDLE(block, *m_push_pc); // handle *m_push_pc
UML_MOV(block, I1, PCSTKP); // mov i1,PCSTKP
@@ -371,7 +369,7 @@ void adsp21062_device::static_generate_push_pc()
UML_RET(block);
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_pop_pc()
@@ -379,11 +377,11 @@ void adsp21062_device::static_generate_pop_pc()
// Pop PC stack into I0
// Trashes I1
- code_label label = 1;
- drcuml_block *block = m_drcuml->begin_block(32);
+ uml::code_label label = 1;
+ drcuml_block &block(m_drcuml->begin_block(32));
// add a global entry for this
- alloc_handle(m_drcuml.get(), &m_pop_pc, "pop_pc");
+ alloc_handle(m_pop_pc, "pop_pc");
UML_HANDLE(block, *m_pop_pc); // handle *m_pop_pc
UML_MOV(block, I1, PCSTKP); // mov i0,PCSTKP
@@ -407,7 +405,7 @@ void adsp21062_device::static_generate_pop_pc()
UML_RET(block);
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_push_loop()
@@ -416,11 +414,11 @@ void adsp21062_device::static_generate_push_loop()
// I1 = type/condition/addr
// Trashes I2
- code_label label = 1;
- drcuml_block *block = m_drcuml->begin_block(32);
+ uml::code_label label = 1;
+ drcuml_block &block(m_drcuml->begin_block(32));
// add a global entry for this
- alloc_handle(m_drcuml.get(), &m_push_loop, "push_loop");
+ alloc_handle(m_push_loop, "push_loop");
UML_HANDLE(block, *m_push_loop); // handle *m_push_loop
UML_MOV(block, I2, LSTKP); // mov i2,LSTKP
@@ -446,18 +444,18 @@ void adsp21062_device::static_generate_push_loop()
UML_RET(block);
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_pop_loop()
{
// Trashes I0,I2
- code_label label = 1;
- drcuml_block *block = m_drcuml->begin_block(32);
+ uml::code_label label = 1;
+ drcuml_block &block(m_drcuml->begin_block(32));
// add a global entry for this
- alloc_handle(m_drcuml.get(), &m_pop_loop, "pop_loop");
+ alloc_handle(m_pop_loop, "pop_loop");
UML_HANDLE(block, *m_pop_loop); // handle *m_pop_loop
UML_MOV(block, I2, LSTKP); // mov i2,LSTKP
@@ -481,18 +479,18 @@ void adsp21062_device::static_generate_pop_loop()
UML_RET(block);
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_push_status()
{
// Trashes I2
- code_label label = 1;
- drcuml_block *block = m_drcuml->begin_block(32);
+ uml::code_label label = 1;
+ drcuml_block &block(m_drcuml->begin_block(32));
// add a global entry for this
- alloc_handle(m_drcuml.get(), &m_push_status, "push_status");
+ alloc_handle(m_push_status, "push_status");
UML_HANDLE(block, *m_push_status); // handle *m_push_status
UML_MOV(block, I2, mem(&m_core->status_stkp)); // mov i2,[status_stkp]
@@ -517,18 +515,18 @@ void adsp21062_device::static_generate_push_status()
UML_RET(block);
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_pop_status()
{
// Trashes I2
- code_label label = 1;
- drcuml_block *block = m_drcuml->begin_block(32);
+ uml::code_label label = 1;
+ drcuml_block &block(m_drcuml->begin_block(32));
// add a global entry for this
- alloc_handle(m_drcuml.get(), &m_pop_status, "pop_status");
+ alloc_handle(m_pop_status, "pop_status");
UML_HANDLE(block, *m_pop_status); // handle *m_pop_status
//TODO: store MODE1
@@ -553,23 +551,23 @@ void adsp21062_device::static_generate_pop_status()
UML_RET(block);
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_exception(uint8_t exception, const char *name)
{
- code_handle *&exception_handle = m_exception[exception];
+ uml::code_handle *&exception_handle = m_exception[exception];
- code_label label = 1;
+ uml::code_label label = 1;
- code_label label_nopush = label++;
+ uml::code_label const label_nopush = label++;
/* begin generating */
- drcuml_block *block = m_drcuml->begin_block(1024);
+ drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
- alloc_handle(m_drcuml.get(), &exception_handle, name);
+ alloc_handle(exception_handle, name);
UML_HANDLE(block, *exception_handle); // handle name
UML_AND(block, I3, mem(&m_core->irq_pending), IMASK); // and i3,[irq_pending],IMASK
@@ -595,180 +593,185 @@ void adsp21062_device::static_generate_exception(uint8_t exception, const char *
UML_ADD(block, I0, I0, 0x20000); // add i0,0x20000
UML_HASHJMP(block, 0, I0, *m_nocode); // hashjmp i0,m_nocode
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_mode1_ops()
{
- drcuml_block *block;
-
// TODO: these could be further optimized with 64-bit or 128-bit swaps
// e.g SWAP128 instruction (swap 128 bits between 2 memory locations)
- block = m_drcuml->begin_block(128);
- alloc_handle(m_drcuml.get(), &m_swap_dag1_0_3, "swap_dag1_0_3");
- UML_HANDLE(block, *m_swap_dag1_0_3); // handle name
-#if !USE_SWAPDQ
- for (int i = 0; i < 4; i++)
{
- UML_MOV(block, I0, mem(&m_core->dag1.i[i]));
- UML_MOV(block, I1, mem(&m_core->dag1_alt.i[i]));
- UML_MOV(block, mem(&m_core->dag1.i[i]), I1);
- UML_MOV(block, mem(&m_core->dag1_alt.i[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag1.m[i]));
- UML_MOV(block, I1, mem(&m_core->dag1_alt.m[i]));
- UML_MOV(block, mem(&m_core->dag1.m[i]), I1);
- UML_MOV(block, mem(&m_core->dag1_alt.m[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag1.l[i]));
- UML_MOV(block, I1, mem(&m_core->dag1_alt.l[i]));
- UML_MOV(block, mem(&m_core->dag1.l[i]), I1);
- UML_MOV(block, mem(&m_core->dag1_alt.l[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag1.b[i]));
- UML_MOV(block, I1, mem(&m_core->dag1_alt.b[i]));
- UML_MOV(block, mem(&m_core->dag1.b[i]), I1);
- UML_MOV(block, mem(&m_core->dag1_alt.b[i]), I0);
- }
+ drcuml_block &block(m_drcuml->begin_block(128));
+ alloc_handle(m_swap_dag1_0_3, "swap_dag1_0_3");
+ UML_HANDLE(block, *m_swap_dag1_0_3); // handle name
+#if !USE_SWAPDQ
+ for (int i = 0; i < 4; i++)
+ {
+ UML_MOV(block, I0, mem(&m_core->dag1.i[i]));
+ UML_MOV(block, I1, mem(&m_core->dag1_alt.i[i]));
+ UML_MOV(block, mem(&m_core->dag1.i[i]), I1);
+ UML_MOV(block, mem(&m_core->dag1_alt.i[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag1.m[i]));
+ UML_MOV(block, I1, mem(&m_core->dag1_alt.m[i]));
+ UML_MOV(block, mem(&m_core->dag1.m[i]), I1);
+ UML_MOV(block, mem(&m_core->dag1_alt.m[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag1.l[i]));
+ UML_MOV(block, I1, mem(&m_core->dag1_alt.l[i]));
+ UML_MOV(block, mem(&m_core->dag1.l[i]), I1);
+ UML_MOV(block, mem(&m_core->dag1_alt.l[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag1.b[i]));
+ UML_MOV(block, I1, mem(&m_core->dag1_alt.b[i]));
+ UML_MOV(block, mem(&m_core->dag1.b[i]), I1);
+ UML_MOV(block, mem(&m_core->dag1_alt.b[i]), I0);
+ }
#else
- UML_SWAPDQ(block, mem(&m_core->dag1.i[0]), mem(&m_core->dag1_alt.i[0]));
- UML_SWAPDQ(block, mem(&m_core->dag1.m[0]), mem(&m_core->dag1_alt.m[0]));
- UML_SWAPDQ(block, mem(&m_core->dag1.l[0]), mem(&m_core->dag1_alt.l[0]));
- UML_SWAPDQ(block, mem(&m_core->dag1.b[0]), mem(&m_core->dag1_alt.b[0]));
+ UML_SWAPDQ(block, mem(&m_core->dag1.i[0]), mem(&m_core->dag1_alt.i[0]));
+ UML_SWAPDQ(block, mem(&m_core->dag1.m[0]), mem(&m_core->dag1_alt.m[0]));
+ UML_SWAPDQ(block, mem(&m_core->dag1.l[0]), mem(&m_core->dag1_alt.l[0]));
+ UML_SWAPDQ(block, mem(&m_core->dag1.b[0]), mem(&m_core->dag1_alt.b[0]));
#endif
- UML_RET(block);
- block->end();
-
- block = m_drcuml->begin_block(128);
- alloc_handle(m_drcuml.get(), &m_swap_dag1_4_7, "swap_dag1_4_7");
- UML_HANDLE(block, *m_swap_dag1_4_7); // handle name
-#if !USE_SWAPDQ
- for (int i = 4; i < 8; i++)
- {
- UML_MOV(block, I0, mem(&m_core->dag1.i[i]));
- UML_MOV(block, I1, mem(&m_core->dag1_alt.i[i]));
- UML_MOV(block, mem(&m_core->dag1.i[i]), I1);
- UML_MOV(block, mem(&m_core->dag1_alt.i[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag1.m[i]));
- UML_MOV(block, I1, mem(&m_core->dag1_alt.m[i]));
- UML_MOV(block, mem(&m_core->dag1.m[i]), I1);
- UML_MOV(block, mem(&m_core->dag1_alt.m[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag1.l[i]));
- UML_MOV(block, I1, mem(&m_core->dag1_alt.l[i]));
- UML_MOV(block, mem(&m_core->dag1.l[i]), I1);
- UML_MOV(block, mem(&m_core->dag1_alt.l[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag1.b[i]));
- UML_MOV(block, I1, mem(&m_core->dag1_alt.b[i]));
- UML_MOV(block, mem(&m_core->dag1.b[i]), I1);
- UML_MOV(block, mem(&m_core->dag1_alt.b[i]), I0);
+ UML_RET(block);
+ block.end();
}
+ {
+ drcuml_block &block(m_drcuml->begin_block(128));
+ alloc_handle(m_swap_dag1_4_7, "swap_dag1_4_7");
+ UML_HANDLE(block, *m_swap_dag1_4_7); // handle name
+#if !USE_SWAPDQ
+ for (int i = 4; i < 8; i++)
+ {
+ UML_MOV(block, I0, mem(&m_core->dag1.i[i]));
+ UML_MOV(block, I1, mem(&m_core->dag1_alt.i[i]));
+ UML_MOV(block, mem(&m_core->dag1.i[i]), I1);
+ UML_MOV(block, mem(&m_core->dag1_alt.i[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag1.m[i]));
+ UML_MOV(block, I1, mem(&m_core->dag1_alt.m[i]));
+ UML_MOV(block, mem(&m_core->dag1.m[i]), I1);
+ UML_MOV(block, mem(&m_core->dag1_alt.m[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag1.l[i]));
+ UML_MOV(block, I1, mem(&m_core->dag1_alt.l[i]));
+ UML_MOV(block, mem(&m_core->dag1.l[i]), I1);
+ UML_MOV(block, mem(&m_core->dag1_alt.l[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag1.b[i]));
+ UML_MOV(block, I1, mem(&m_core->dag1_alt.b[i]));
+ UML_MOV(block, mem(&m_core->dag1.b[i]), I1);
+ UML_MOV(block, mem(&m_core->dag1_alt.b[i]), I0);
+ }
#else
- UML_SWAPDQ(block, mem(&m_core->dag1.i[4]), mem(&m_core->dag1_alt.i[4]));
- UML_SWAPDQ(block, mem(&m_core->dag1.m[4]), mem(&m_core->dag1_alt.m[4]));
- UML_SWAPDQ(block, mem(&m_core->dag1.l[4]), mem(&m_core->dag1_alt.l[4]));
- UML_SWAPDQ(block, mem(&m_core->dag1.b[4]), mem(&m_core->dag1_alt.b[4]));
+ UML_SWAPDQ(block, mem(&m_core->dag1.i[4]), mem(&m_core->dag1_alt.i[4]));
+ UML_SWAPDQ(block, mem(&m_core->dag1.m[4]), mem(&m_core->dag1_alt.m[4]));
+ UML_SWAPDQ(block, mem(&m_core->dag1.l[4]), mem(&m_core->dag1_alt.l[4]));
+ UML_SWAPDQ(block, mem(&m_core->dag1.b[4]), mem(&m_core->dag1_alt.b[4]));
#endif
- UML_RET(block);
- block->end();
-
- block = m_drcuml->begin_block(128);
- alloc_handle(m_drcuml.get(), &m_swap_dag2_0_3, "swap_dag2_0_3");
- UML_HANDLE(block, *m_swap_dag2_0_3); // handle name
-#if !USE_SWAPDQ
- for (int i = 0; i < 4; i++)
- {
- UML_MOV(block, I0, mem(&m_core->dag2.i[i]));
- UML_MOV(block, I1, mem(&m_core->dag2_alt.i[i]));
- UML_MOV(block, mem(&m_core->dag2.i[i]), I1);
- UML_MOV(block, mem(&m_core->dag2_alt.i[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag2.m[i]));
- UML_MOV(block, I1, mem(&m_core->dag2_alt.m[i]));
- UML_MOV(block, mem(&m_core->dag2.m[i]), I1);
- UML_MOV(block, mem(&m_core->dag2_alt.m[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag2.l[i]));
- UML_MOV(block, I1, mem(&m_core->dag2_alt.l[i]));
- UML_MOV(block, mem(&m_core->dag2.l[i]), I1);
- UML_MOV(block, mem(&m_core->dag2_alt.l[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag2.b[i]));
- UML_MOV(block, I1, mem(&m_core->dag2_alt.b[i]));
- UML_MOV(block, mem(&m_core->dag2.b[i]), I1);
- UML_MOV(block, mem(&m_core->dag2_alt.b[i]), I0);
+ UML_RET(block);
+ block.end();
}
+ {
+ drcuml_block &block(m_drcuml->begin_block(128));
+ alloc_handle(m_swap_dag2_0_3, "swap_dag2_0_3");
+ UML_HANDLE(block, *m_swap_dag2_0_3); // handle name
+#if !USE_SWAPDQ
+ for (int i = 0; i < 4; i++)
+ {
+ UML_MOV(block, I0, mem(&m_core->dag2.i[i]));
+ UML_MOV(block, I1, mem(&m_core->dag2_alt.i[i]));
+ UML_MOV(block, mem(&m_core->dag2.i[i]), I1);
+ UML_MOV(block, mem(&m_core->dag2_alt.i[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag2.m[i]));
+ UML_MOV(block, I1, mem(&m_core->dag2_alt.m[i]));
+ UML_MOV(block, mem(&m_core->dag2.m[i]), I1);
+ UML_MOV(block, mem(&m_core->dag2_alt.m[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag2.l[i]));
+ UML_MOV(block, I1, mem(&m_core->dag2_alt.l[i]));
+ UML_MOV(block, mem(&m_core->dag2.l[i]), I1);
+ UML_MOV(block, mem(&m_core->dag2_alt.l[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag2.b[i]));
+ UML_MOV(block, I1, mem(&m_core->dag2_alt.b[i]));
+ UML_MOV(block, mem(&m_core->dag2.b[i]), I1);
+ UML_MOV(block, mem(&m_core->dag2_alt.b[i]), I0);
+ }
#else
- UML_SWAPDQ(block, mem(&m_core->dag2.i[0]), mem(&m_core->dag2_alt.i[0]));
- UML_SWAPDQ(block, mem(&m_core->dag2.m[0]), mem(&m_core->dag2_alt.m[0]));
- UML_SWAPDQ(block, mem(&m_core->dag2.l[0]), mem(&m_core->dag2_alt.l[0]));
- UML_SWAPDQ(block, mem(&m_core->dag2.b[0]), mem(&m_core->dag2_alt.b[0]));
+ UML_SWAPDQ(block, mem(&m_core->dag2.i[0]), mem(&m_core->dag2_alt.i[0]));
+ UML_SWAPDQ(block, mem(&m_core->dag2.m[0]), mem(&m_core->dag2_alt.m[0]));
+ UML_SWAPDQ(block, mem(&m_core->dag2.l[0]), mem(&m_core->dag2_alt.l[0]));
+ UML_SWAPDQ(block, mem(&m_core->dag2.b[0]), mem(&m_core->dag2_alt.b[0]));
#endif
- UML_RET(block);
- block->end();
-
- block = m_drcuml->begin_block(128);
- alloc_handle(m_drcuml.get(), &m_swap_dag2_4_7, "swap_dag2_4_7");
- UML_HANDLE(block, *m_swap_dag2_4_7); // handle name
-#if !USE_SWAPDQ
- for (int i = 4; i < 8; i++)
- {
- UML_MOV(block, I0, mem(&m_core->dag2.i[i]));
- UML_MOV(block, I1, mem(&m_core->dag2_alt.i[i]));
- UML_MOV(block, mem(&m_core->dag2.i[i]), I1);
- UML_MOV(block, mem(&m_core->dag2_alt.i[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag2.m[i]));
- UML_MOV(block, I1, mem(&m_core->dag2_alt.m[i]));
- UML_MOV(block, mem(&m_core->dag2.m[i]), I1);
- UML_MOV(block, mem(&m_core->dag2_alt.m[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag2.l[i]));
- UML_MOV(block, I1, mem(&m_core->dag2_alt.l[i]));
- UML_MOV(block, mem(&m_core->dag2.l[i]), I1);
- UML_MOV(block, mem(&m_core->dag2_alt.l[i]), I0);
- UML_MOV(block, I0, mem(&m_core->dag2.b[i]));
- UML_MOV(block, I1, mem(&m_core->dag2_alt.b[i]));
- UML_MOV(block, mem(&m_core->dag2.b[i]), I1);
- UML_MOV(block, mem(&m_core->dag2_alt.b[i]), I0);
+ UML_RET(block);
+ block.end();
}
+ {
+ drcuml_block &block(m_drcuml->begin_block(128));
+ alloc_handle(m_swap_dag2_4_7, "swap_dag2_4_7");
+ UML_HANDLE(block, *m_swap_dag2_4_7); // handle name
+#if !USE_SWAPDQ
+ for (int i = 4; i < 8; i++)
+ {
+ UML_MOV(block, I0, mem(&m_core->dag2.i[i]));
+ UML_MOV(block, I1, mem(&m_core->dag2_alt.i[i]));
+ UML_MOV(block, mem(&m_core->dag2.i[i]), I1);
+ UML_MOV(block, mem(&m_core->dag2_alt.i[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag2.m[i]));
+ UML_MOV(block, I1, mem(&m_core->dag2_alt.m[i]));
+ UML_MOV(block, mem(&m_core->dag2.m[i]), I1);
+ UML_MOV(block, mem(&m_core->dag2_alt.m[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag2.l[i]));
+ UML_MOV(block, I1, mem(&m_core->dag2_alt.l[i]));
+ UML_MOV(block, mem(&m_core->dag2.l[i]), I1);
+ UML_MOV(block, mem(&m_core->dag2_alt.l[i]), I0);
+ UML_MOV(block, I0, mem(&m_core->dag2.b[i]));
+ UML_MOV(block, I1, mem(&m_core->dag2_alt.b[i]));
+ UML_MOV(block, mem(&m_core->dag2.b[i]), I1);
+ UML_MOV(block, mem(&m_core->dag2_alt.b[i]), I0);
+ }
#else
- UML_SWAPDQ(block, mem(&m_core->dag2.i[4]), mem(&m_core->dag2_alt.i[4]));
- UML_SWAPDQ(block, mem(&m_core->dag2.m[4]), mem(&m_core->dag2_alt.m[4]));
- UML_SWAPDQ(block, mem(&m_core->dag2.l[4]), mem(&m_core->dag2_alt.l[4]));
- UML_SWAPDQ(block, mem(&m_core->dag2.b[4]), mem(&m_core->dag2_alt.b[4]));
+ UML_SWAPDQ(block, mem(&m_core->dag2.i[4]), mem(&m_core->dag2_alt.i[4]));
+ UML_SWAPDQ(block, mem(&m_core->dag2.m[4]), mem(&m_core->dag2_alt.m[4]));
+ UML_SWAPDQ(block, mem(&m_core->dag2.l[4]), mem(&m_core->dag2_alt.l[4]));
+ UML_SWAPDQ(block, mem(&m_core->dag2.b[4]), mem(&m_core->dag2_alt.b[4]));
#endif
- UML_RET(block);
- block->end();
-
- block = m_drcuml->begin_block(64);
- alloc_handle(m_drcuml.get(), &m_swap_r0_7, "swap_r0_7");
- UML_HANDLE(block, *m_swap_r0_7); // handle name
-#if !USE_SWAPDQ
- for (int i = 0; i < 8; i++)
- {
- UML_MOV(block, I0, mem(&m_core->r[i]));
- UML_MOV(block, I1, mem(&m_core->reg_alt[i]));
- UML_MOV(block, mem(&m_core->r[i]), I1);
- UML_MOV(block, mem(&m_core->reg_alt[i]), I0);
+ UML_RET(block);
+ block.end();
}
+ {
+ drcuml_block &block(m_drcuml->begin_block(64));
+ alloc_handle(m_swap_r0_7, "swap_r0_7");
+ UML_HANDLE(block, *m_swap_r0_7); // handle name
+#if !USE_SWAPDQ
+ for (int i = 0; i < 8; i++)
+ {
+ UML_MOV(block, I0, mem(&m_core->r[i]));
+ UML_MOV(block, I1, mem(&m_core->reg_alt[i]));
+ UML_MOV(block, mem(&m_core->r[i]), I1);
+ UML_MOV(block, mem(&m_core->reg_alt[i]), I0);
+ }
#else
- UML_SWAPDQ(block, mem(&m_core->r[0]), mem(&m_core->reg_alt[0]));
- UML_SWAPDQ(block, mem(&m_core->r[4]), mem(&m_core->reg_alt[4]));
+ UML_SWAPDQ(block, mem(&m_core->r[0]), mem(&m_core->reg_alt[0]));
+ UML_SWAPDQ(block, mem(&m_core->r[4]), mem(&m_core->reg_alt[4]));
#endif
- UML_RET(block);
- block->end();
-
- block = m_drcuml->begin_block(64);
- alloc_handle(m_drcuml.get(), &m_swap_r8_15, "swap_r8_15");
- UML_HANDLE(block, *m_swap_r8_15); // handle name
-#if !USE_SWAPDQ
- for (int i = 8; i < 16; i++)
- {
- UML_MOV(block, I0, mem(&m_core->r[i]));
- UML_MOV(block, I1, mem(&m_core->reg_alt[i]));
- UML_MOV(block, mem(&m_core->r[i]), I1);
- UML_MOV(block, mem(&m_core->reg_alt[i]), I0);
+ UML_RET(block);
+ block.end();
}
+ {
+ drcuml_block &block(m_drcuml->begin_block(64));
+ alloc_handle(m_swap_r8_15, "swap_r8_15");
+ UML_HANDLE(block, *m_swap_r8_15); // handle name
+#if !USE_SWAPDQ
+ for (int i = 8; i < 16; i++)
+ {
+ UML_MOV(block, I0, mem(&m_core->r[i]));
+ UML_MOV(block, I1, mem(&m_core->reg_alt[i]));
+ UML_MOV(block, mem(&m_core->r[i]), I1);
+ UML_MOV(block, mem(&m_core->reg_alt[i]), I0);
+ }
#else
- UML_SWAPDQ(block, mem(&m_core->r[8]), mem(&m_core->reg_alt[8]));
- UML_SWAPDQ(block, mem(&m_core->r[12]), mem(&m_core->reg_alt[12]));
+ UML_SWAPDQ(block, mem(&m_core->r[8]), mem(&m_core->reg_alt[8]));
+ UML_SWAPDQ(block, mem(&m_core->r[12]), mem(&m_core->reg_alt[12]));
#endif
- UML_RET(block);
- block->end();
+ UML_RET(block);
+ block.end();
+ }
}
@@ -819,8 +822,6 @@ void adsp21062_device::compile_block(offs_t pc)
const opcode_desc *desclist;
bool override = false;
- drcuml_block *block;
-
desclist = m_drcfe->describe_code(pc);
bool succeeded = false;
@@ -828,7 +829,7 @@ void adsp21062_device::compile_block(offs_t pc)
{
try
{
- block = m_drcuml->begin_block(4096);
+ drcuml_block &block(m_drcuml->begin_block(4096));
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
@@ -867,7 +868,7 @@ void adsp21062_device::compile_block(offs_t pc)
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
- generate_sequence_instruction(block, &compiler, curdesc, false);
+ generate_sequence_instruction(block, compiler, curdesc, false);
/* if we need to return to the start, do it */
if (seqlast->flags & OPFLAG_RETURN_TO_START)
@@ -886,13 +887,13 @@ void adsp21062_device::compile_block(offs_t pc)
/* count off cycles and go there */
- generate_update_cycles(block, &compiler, nextpc, true); // <subtract cycles>
+ generate_update_cycles(block, compiler, nextpc, true); // <subtract cycles>
if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc)
UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode
}
- block->end();
+ block.end();
succeeded = true;
}
catch (drcuml_block::abort_compilation &)
@@ -944,17 +945,16 @@ void adsp21062_device::flush_cache()
void adsp21062_device::static_generate_entry_point()
{
- code_label skip = 1;
- drcuml_block *block;
+ uml::code_label const skip = 1;
/* begin generating */
- block = m_drcuml->begin_block(20);
+ drcuml_block &block(m_drcuml->begin_block(20));
/* forward references */
- alloc_handle(m_drcuml.get(), &m_nocode, "nocode");
- alloc_handle(m_drcuml.get(), &m_exception[EXCEPTION_INTERRUPT], "exception_interrupt");
+ alloc_handle(m_nocode, "nocode");
+ alloc_handle(m_exception[EXCEPTION_INTERRUPT], "exception_interrupt");
- alloc_handle(m_drcuml.get(), &m_entry, "entry");
+ alloc_handle(m_entry, "entry");
UML_HANDLE(block, *m_entry); // handle entry
load_fast_iregs(block); // <load fastregs>
@@ -978,48 +978,44 @@ void adsp21062_device::static_generate_entry_point()
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, 0, mem(&m_core->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_nocode_handler()
{
- drcuml_block *block;
-
/* begin generating */
- block = m_drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(m_drcuml.get(), &m_nocode, "nocode");
+ alloc_handle(m_nocode, "nocode");
UML_HANDLE(block, *m_nocode); // handle nocode
UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0
save_fast_iregs(block); // <save fastregs>
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- block->end();
+ block.end();
}
void adsp21062_device::static_generate_out_of_cycles()
{
- drcuml_block *block;
-
/* begin generating */
- block = m_drcuml->begin_block(10);
+ drcuml_block &block(m_drcuml->begin_block(10));
/* generate a hash jump via the current mode and PC */
- alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles");
+ alloc_handle(m_out_of_cycles, "out_of_cycles");
UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
save_fast_iregs(block); // <save fastregs>
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
- block->end();
+ block.end();
}
-void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool last_delayslot)
+void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, bool last_delayslot)
{
/* add an entry for the log */
// if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
@@ -1029,10 +1025,10 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc
/* accumulate total cycles */
- compiler->cycles += desc->cycles;
+ compiler.cycles += desc->cycles;
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we are debugging, call the debugger */
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
@@ -1055,12 +1051,12 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
{
if (desc->userflags & OP_USERFLAG_COUNTER_LOOP)
{
- code_label end = compiler->labelnum++;
+ uml::code_label const end = compiler.labelnum++;
UML_LOAD(block, I0, m_core->lastack, LSTKP, SIZE_DWORD, SCALE_x4);
UML_CMP(block, I0, desc->pc);
UML_JMPc(block, COND_NE, end);
- code_label label_expire = compiler->labelnum++;
+ uml::code_label const label_expire = compiler.labelnum++;
UML_MOV(block, I1, mem(&m_core->lstkp)); // mov i1,[m_core->lstkp]
UML_LOAD(block, I0, m_core->lcstack, I1, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i1,dword,scale_x4
UML_SUB(block, I0, I0, 1); // sub i0,1
@@ -1080,12 +1076,12 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
}
if (desc->userflags & OP_USERFLAG_COND_LOOP)
{
- code_label end = compiler->labelnum++;
+ uml::code_label const end = compiler.labelnum++;
UML_LOAD(block, I0, m_core->lastack, LSTKP, SIZE_DWORD, SCALE_x4);
UML_CMP(block, I0, desc->pc);
UML_JMPc(block, COND_NE, end);
- code_label label_expire = compiler->labelnum++;
+ uml::code_label const label_expire = compiler.labelnum++;
int condition = (desc->userflags & OP_USERFLAG_COND_FIELD) >> OP_USERFLAG_COND_FIELD_SHIFT;
generate_do_condition(block, compiler, desc, condition, label_expire, m_core->astat_delay_copy);
@@ -1119,29 +1115,29 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
// insert delayed MODE1 operation if needed
- if (compiler->mode1_delay.counter > 0)
+ if (compiler.mode1_delay.counter > 0)
{
- compiler->mode1_delay.counter--;
+ compiler.mode1_delay.counter--;
// delayed operation in the last delay slot needs to be done before the branch is taken
if (last_delayslot)
- compiler->mode1_delay.counter = 0;
+ compiler.mode1_delay.counter = 0;
- if (compiler->mode1_delay.counter <= 0)
+ if (compiler.mode1_delay.counter <= 0)
{
- switch (compiler->mode1_delay.mode)
+ switch (compiler.mode1_delay.mode)
{
case MODE1_WRITE_IMM:
- generate_write_mode1_imm(block, compiler, desc, compiler->mode1_delay.data);
+ generate_write_mode1_imm(block, compiler, desc, compiler.mode1_delay.data);
break;
case MODE1_WRITE_REG:
fatalerror("MODE1 delay REG");
break;
case MODE1_SET:
- generate_set_mode1_imm(block, compiler, desc, compiler->mode1_delay.data);
+ generate_set_mode1_imm(block, compiler, desc, compiler.mode1_delay.data);
break;
case MODE1_CLEAR:
- generate_clear_mode1_imm(block, compiler, desc, compiler->mode1_delay.data);
+ generate_clear_mode1_imm(block, compiler, desc, compiler.mode1_delay.data);
break;
case MODE1_TOGGLE:
fatalerror("MODE1 delay TOGGLE");
@@ -1154,12 +1150,12 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
// insert loop check at this instruction if needed
if (desc->userflags & OP_USERFLAG_COUNTER_LOOP)
{
- code_label label_skip_loop = compiler->labelnum++;
+ uml::code_label const label_skip_loop = compiler.labelnum++;
UML_LOAD(block, I0, m_core->lastack, LSTKP, SIZE_DWORD, SCALE_x4);
UML_CMP(block, I0, desc->pc);
UML_JMPc(block, COND_NE, label_skip_loop);
- code_label label_expire = compiler->labelnum++;
+ uml::code_label const label_expire = compiler.labelnum++;
UML_MOV(block, I1, mem(&m_core->lstkp)); // mov i1,[m_core->lstkp]
UML_LOAD(block, I0, m_core->lcstack, I1, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i1,dword,scale_x4
UML_SUB(block, I0, I0, 1); // sub i0,1
@@ -1177,12 +1173,12 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
}
if (desc->userflags & OP_USERFLAG_COND_LOOP)
{
- code_label label_skip_loop = compiler->labelnum++;
+ uml::code_label const label_skip_loop = compiler.labelnum++;
UML_LOAD(block, I0, m_core->lastack, LSTKP, SIZE_DWORD, SCALE_x4);
UML_CMP(block, I0, desc->pc);
UML_JMPc(block, COND_NE, label_skip_loop);
- code_label label_expire = compiler->labelnum++;
+ uml::code_label const label_expire = compiler.labelnum++;
int condition = (desc->userflags & OP_USERFLAG_COND_FIELD) >> OP_USERFLAG_COND_FIELD_SHIFT;
generate_do_condition(block, compiler, desc, condition, label_expire, m_core->astat_delay_copy);
@@ -1220,13 +1216,13 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
}
}
-void adsp21062_device::generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, bool allow_exception)
+void adsp21062_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception)
{
/* check full interrupts if pending */
- if (compiler->checkints)
+ if (compiler.checkints)
{
- code_label skip = compiler->labelnum++;
- compiler->checkints = false;
+ uml::code_label const skip = compiler.labelnum++;
+ compiler.checkints = false;
UML_CMP(block, mem(&m_core->irq_pending), 0); // cmp [irq_pending],0
UML_JMPc(block, COND_E, skip); // je skip
@@ -1238,26 +1234,26 @@ void adsp21062_device::generate_update_cycles(drcuml_block *block, compiler_stat
UML_JMPc(block, COND_Z, skip); // jz skip
UML_MOV(block, I0, param); // mov i0,nextpc
- UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
+ UML_MOV(block, I1, compiler.cycles); // mov i1,cycles
UML_CALLH(block, *m_exception[EXCEPTION_INTERRUPT]); // callh m_exception[EXCEPTION_INTERRUPT]
UML_LABEL(block, skip);
}
/* account for cycles */
- if (compiler->cycles > 0)
+ if (compiler.cycles > 0)
{
UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
if (allow_exception)
UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc
}
- compiler->cycles = 0;
+ compiler.cycles = 0;
}
-void adsp21062_device::generate_write_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data)
+void adsp21062_device::generate_write_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data)
{
- code_label skip;
+ uml::code_label skip;
// TODO: swap effects
if (data & 0x1)
@@ -1268,42 +1264,42 @@ void adsp21062_device::generate_write_mode1_imm(drcuml_block *block, compiler_st
fatalerror("generate_write_mode1_imm: tried to enable MR alternate");
// DAG1 regs 4-7
- skip = compiler->labelnum++;
+ skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x8);
UML_JMPc(block, (data & 0x8) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_dag1_4_7);
UML_LABEL(block, skip);
// DAG1 regs 0-3
- skip = compiler->labelnum++;
+ skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x10);
UML_JMPc(block, (data & 0x10) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_dag1_0_3);
UML_LABEL(block, skip);
// DAG2 regs 4-7
- skip = compiler->labelnum++;
+ skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x20);
UML_JMPc(block, (data & 0x20) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_dag2_4_7);
UML_LABEL(block, skip);
// DAG2 regs 0-3
- skip = compiler->labelnum++;
+ skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x40);
UML_JMPc(block, (data & 0x40) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_dag2_0_3);
UML_LABEL(block, skip);
// REG 8-15
- skip = compiler->labelnum++;
+ skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x80);
UML_JMPc(block, (data & 0x80) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_r8_15);
UML_LABEL(block, skip);
// REG 0-7
- skip = compiler->labelnum++;
+ skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x400);
UML_JMPc(block, (data & 0x400) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_r0_7);
@@ -1312,7 +1308,7 @@ void adsp21062_device::generate_write_mode1_imm(drcuml_block *block, compiler_st
UML_MOV(block, MODE1, data);
}
-void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data)
+void adsp21062_device::generate_set_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data)
{
if (data & 0x1)
fatalerror("generate_set_mode1_imm: tried to enable I8 bit reversing");
@@ -1322,7 +1318,7 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
fatalerror("generate_set_mode1_imm: tried to enable MR alternate");
if (data & 0x8) // DAG1 regs 4-7
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x8);
UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_dag1_4_7);
@@ -1330,7 +1326,7 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
}
if (data & 0x10) // DAG1 regs 0-3
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x10);
UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_dag1_0_3);
@@ -1338,7 +1334,7 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
}
if (data & 0x20) // DAG2 regs 4-7
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x20);
UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_dag2_4_7);
@@ -1346,7 +1342,7 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
}
if (data & 0x40) // DAG1 regs 0-3
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x40);
UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_dag2_0_3);
@@ -1354,7 +1350,7 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
}
if (data & 0x80) // REG 8-15
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x80);
UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_r8_15);
@@ -1362,7 +1358,7 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
}
if (data & 0x400) // REG 0-7
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x400);
UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_r0_7);
@@ -1372,7 +1368,7 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
UML_OR(block, MODE1, MODE1, data);
}
-void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data)
+void adsp21062_device::generate_clear_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data)
{
if (data & 0x1)
fatalerror("generate_clear_mode1_imm: tried to disable I8 bit reversing");
@@ -1382,7 +1378,7 @@ void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_st
fatalerror("generate_clear_mode1_imm: tried to disable MR alternate");
if (data & 0x8) // DAG1 regs 4-7
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x8);
UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_dag1_4_7);
@@ -1390,7 +1386,7 @@ void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_st
}
if (data & 0x10) // DAG1 regs 0-3
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x10);
UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_dag1_0_3);
@@ -1398,7 +1394,7 @@ void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_st
}
if (data & 0x20) // DAG2 regs 4-7
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x20);
UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_dag2_4_7);
@@ -1406,7 +1402,7 @@ void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_st
}
if (data & 0x40) // DAG1 regs 0-3
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x40);
UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_dag2_0_3);
@@ -1414,7 +1410,7 @@ void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_st
}
if (data & 0x80) // REG 8-15
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x80);
UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_r8_15);
@@ -1422,7 +1418,7 @@ void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_st
}
if (data & 0x400) // REG 0-7
{
- code_label skip = compiler->labelnum++;
+ uml::code_label const skip = compiler.labelnum++;
UML_TEST(block, MODE1, 0x400);
UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_r0_7);
@@ -1434,13 +1430,13 @@ void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_st
-void adsp21062_device::generate_update_circular_buffer(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int g, int i)
+void adsp21062_device::generate_update_circular_buffer(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int g, int i)
{
if (g)
{
// PM
- code_label end = compiler->labelnum++;
- code_label label2 = compiler->labelnum++;
+ uml::code_label const end = compiler.labelnum++;
+ uml::code_label const label2 = compiler.labelnum++;
UML_CMP(block, PM_L(i), 0);
UML_JMPc(block, COND_E, end);
@@ -1460,8 +1456,8 @@ void adsp21062_device::generate_update_circular_buffer(drcuml_block *block, comp
else
{
// DM
- code_label end = compiler->labelnum++;
- code_label label2 = compiler->labelnum++;
+ uml::code_label const end = compiler.labelnum++;
+ uml::code_label const label2 = compiler.labelnum++;
UML_CMP(block, DM_L(i), 0);
UML_JMPc(block, COND_E, end);
@@ -1480,7 +1476,7 @@ void adsp21062_device::generate_update_circular_buffer(drcuml_block *block, comp
}
}
-void adsp21062_device::generate_astat_copy(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void adsp21062_device::generate_astat_copy(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, mem(&m_core->astat_drc_copy.az), ASTAT_AZ);
UML_MOV(block, mem(&m_core->astat_drc_copy.av), ASTAT_AV);
@@ -1502,11 +1498,11 @@ void adsp21062_device::generate_astat_copy(drcuml_block *block, compiler_state *
-void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot)
+void adsp21062_device::generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, bool delayslot)
{
// I0 = target pc for dynamic branches
- compiler_state compiler_temp = *compiler;
+ compiler_state compiler_temp(compiler);
// save branch target
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
@@ -1517,8 +1513,8 @@ void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compil
// compile delay slots if needed
if (delayslot)
{
- generate_sequence_instruction(block, &compiler_temp, desc->delay.first(), false);
- generate_sequence_instruction(block, &compiler_temp, desc->delay.last(), true);
+ generate_sequence_instruction(block, compiler_temp, desc->delay.first(), false);
+ generate_sequence_instruction(block, compiler_temp, desc->delay.last(), true);
}
// if this is the last instruction of a loop, we need to use the return PC from the resolved loop
@@ -1538,7 +1534,7 @@ void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compil
// update cycles and hash jump
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(block, &compiler_temp, desc->targetpc, true);
+ generate_update_cycles(block, compiler_temp, desc->targetpc, true);
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
else
@@ -1546,23 +1542,23 @@ void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compil
}
else
{
- generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), true);
+ generate_update_cycles(block, compiler_temp, uml::mem(&m_core->jmpdest), true);
UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode
}
// update compiler label
- compiler->labelnum = compiler_temp.labelnum;
+ compiler.labelnum = compiler_temp.labelnum;
/* reset the mapvar to the current cycles and account for skipped slots */
- compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ compiler.cycles += desc->skipslots;
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
}
-void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot, bool loopabort, bool clearint)
+void adsp21062_device::generate_jump(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, bool delayslot, bool loopabort, bool clearint)
{
// I0 = target pc for dynamic branches
- compiler_state compiler_temp = *compiler;
+ compiler_state compiler_temp(compiler);
// save branch target
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
@@ -1573,14 +1569,14 @@ void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compil
// compile delay slots if needed
if (delayslot)
{
- generate_sequence_instruction(block, &compiler_temp, desc->delay.first(), false);
- generate_sequence_instruction(block, &compiler_temp, desc->delay.last(), true);
+ generate_sequence_instruction(block, compiler_temp, desc->delay.first(), false);
+ generate_sequence_instruction(block, compiler_temp, desc->delay.last(), true);
}
// clear interrupt
if (clearint)
{
- code_label skip_pop = compiler_temp.labelnum++;
+ uml::code_label const skip_pop = compiler_temp.labelnum++;
UML_MOV(block, mem(&m_core->interrupt_active), 0); // mov [interrupt_active],0
UML_SHL(block, I1, 1, mem(&m_core->active_irq_num)); // shl i1,1,[active_irq_num]
@@ -1601,7 +1597,7 @@ void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compil
// update cycles and hash jump
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(block, &compiler_temp, desc->targetpc, true);
+ generate_update_cycles(block, compiler_temp, desc->targetpc, true);
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
else
@@ -1609,19 +1605,19 @@ void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compil
}
else
{
- generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), true);
+ generate_update_cycles(block, compiler_temp, uml::mem(&m_core->jmpdest), true);
UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode
}
// update compiler label
- compiler->labelnum = compiler_temp.labelnum;
+ compiler.labelnum = compiler_temp.labelnum;
/* reset the mapvar to the current cycles and account for skipped slots */
- compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ compiler.cycles += desc->skipslots;
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
}
-void adsp21062_device::generate_loop_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void adsp21062_device::generate_loop_jump(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
// update cycles and hash jump
generate_update_cycles(block, compiler, desc->userdata0, true);
@@ -1634,15 +1630,15 @@ void adsp21062_device::generate_loop_jump(drcuml_block *block, compiler_state *c
UML_HASHJMP(block, 0, desc->userdata0, *m_nocode);
/* reset the mapvar to the current cycles and account for skipped slots */
- compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ compiler.cycles += desc->skipslots;
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
}
/*-------------------------------------------------
generate_write_ureg - UREG is read into I0
-------------------------------------------------*/
-void adsp21062_device::generate_read_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool has_compute)
+void adsp21062_device::generate_read_ureg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int ureg, bool has_compute)
{
// UREG is read into I0
@@ -1825,7 +1821,7 @@ void adsp21062_device::generate_read_ureg(drcuml_block *block, compiler_state *c
generate_write_ureg - contents of register I0 or 32-bit immediate data are written into UREG
-------------------------------------------------*/
-void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, uint32_t data)
+void adsp21062_device::generate_write_ureg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int ureg, bool imm, uint32_t data)
{
switch (ureg)
{
@@ -1899,14 +1895,14 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
// MODE1 needs to be written delayed
if (imm)
{
- compiler->mode1_delay.counter = 2;
- compiler->mode1_delay.data = data;
- compiler->mode1_delay.mode = MODE1_WRITE_IMM;
+ compiler.mode1_delay.counter = 2;
+ compiler.mode1_delay.data = data;
+ compiler.mode1_delay.mode = MODE1_WRITE_IMM;
}
else
{
- compiler->mode1_delay.counter = 2;
- compiler->mode1_delay.mode = MODE1_WRITE_REG;
+ compiler.mode1_delay.counter = 2;
+ compiler.mode1_delay.mode = MODE1_WRITE_REG;
UML_MOV(block, mem(&m_core->mode1_delay_data), I0);
}
break;
@@ -1964,7 +1960,7 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
}
}
-bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint64_t opcode = desc->opptr.q[0];
@@ -1999,7 +1995,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
@@ -2023,7 +2019,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
@@ -2046,7 +2042,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
@@ -2084,7 +2080,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
if (b) // call
@@ -2113,7 +2109,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
if (b) // call
@@ -2144,7 +2140,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
{
// IF ... ELSE
- int label_else = compiler->labelnum++;
+ int label_else = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, label_else);
UML_ADD(block, I0, PM_I(pmi), PM_M(pmm));
@@ -2169,7 +2165,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
generate_compute(block, compiler, desc);
@@ -2205,7 +2201,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
{
// IF ... ELSE
- int label_else = compiler->labelnum++;
+ int label_else = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, label_else);
if (b) // call
@@ -2228,7 +2224,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
generate_compute(block, compiler, desc);
@@ -2262,7 +2258,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
{
// IF ... ELSE
- int label_else = compiler->labelnum++;
+ int label_else = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, label_else);
UML_CALLH(block, *m_pop_pc);
@@ -2279,7 +2275,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
generate_compute(block, compiler, desc);
@@ -2301,7 +2297,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
int e = (opcode >> 25) & 0x1;
- code_label skip_pop = compiler->labelnum++;
+ uml::code_label const skip_pop = compiler.labelnum++;
UML_MOV(block, mem(&m_core->interrupt_active), 0); // mov [interrupt_active],0
UML_MOV(block, I0, 1); // mov i0,1
@@ -2319,7 +2315,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
{
// IF ... ELSE
- code_label label_else = compiler->labelnum++;
+ uml::code_label const label_else = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, label_else);
UML_CALLH(block, *m_pop_pc);
@@ -2332,11 +2328,11 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
{
// IF
bool has_condition = !if_condition_always_true(cond);
- code_label skip_label = 0;
+ uml::code_label skip_label = 0;
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
generate_compute(block, compiler, desc);
@@ -2496,9 +2492,9 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
UML_OR(block, MODE2, MODE2, data);
break;
case 0xb: // MODE1
- compiler->mode1_delay.counter = 2;
- compiler->mode1_delay.data = data;
- compiler->mode1_delay.mode = MODE1_SET;
+ compiler.mode1_delay.counter = 2;
+ compiler.mode1_delay.data = data;
+ compiler.mode1_delay.mode = MODE1_SET;
break;
case 0xc: // ASTAT
// TODO: does this need delay?
@@ -2577,9 +2573,9 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
UML_AND(block, MODE2, MODE2, ~data);
break;
case 0xb: // MODE1
- compiler->mode1_delay.counter = 2;
- compiler->mode1_delay.data = data;
- compiler->mode1_delay.mode = MODE1_CLEAR;
+ compiler.mode1_delay.counter = 2;
+ compiler.mode1_delay.data = data;
+ compiler.mode1_delay.mode = MODE1_CLEAR;
break;
case 0xc: // ASTAT
// TODO: does this need delay?
@@ -2658,9 +2654,9 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
UML_XOR(block, MODE2, MODE2, data);
break;
case 0xb: // MODE1
- compiler->mode1_delay.counter = 2;
- compiler->mode1_delay.data = data;
- compiler->mode1_delay.mode = MODE1_TOGGLE;
+ compiler.mode1_delay.counter = 2;
+ compiler.mode1_delay.data = data;
+ compiler.mode1_delay.mode = MODE1_TOGGLE;
break;
case 0xc: // ASTAT
return false;
@@ -2905,7 +2901,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
@@ -2994,7 +2990,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
@@ -3043,7 +3039,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
if (d)
@@ -3150,7 +3146,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
if (has_condition)
{
- skip_label = compiler->labelnum++;
+ skip_label = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
if (d)
@@ -3249,7 +3245,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
int cond = (opcode >> 33) & 0x1f;
int dreg = (opcode >> 23) & 0xf;
- code_label label_else = compiler->labelnum++;
+ uml::code_label const label_else = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, label_else);
UML_ADD(block, I0, PM_I(pmi), PM_M(pmm));
@@ -3308,7 +3304,7 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
int cond = (opcode >> 33) & 0x1f;
int dreg = (opcode >> 23) & 0xf;
- code_label label_else = compiler->labelnum++;
+ uml::code_label const label_else = compiler.labelnum++;
generate_if_condition(block, compiler, desc, cond, label_else);
generate_jump(block, compiler, desc, false, false, false);
@@ -3362,14 +3358,14 @@ bool adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *comp
return false;
}
-void adsp21062_device::generate_unimplemented_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void adsp21062_device::generate_unimplemented_compute(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, mem(&m_core->pc), desc->pc);
UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]);
UML_CALLC(block, cfunc_unimplemented_compute, this);
}
-void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
+void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
uint64_t opcode = desc->opptr.q[0];
if ((opcode & 0x7fffff) == 0)
@@ -3597,8 +3593,8 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0x1a: // Fm = F3-0 * F7-4, Fa = FLOAT F11-8 BY R15-12
{
- code_label denormal = compiler->labelnum++;
- code_label end = compiler->labelnum++;
+ uml::code_label const denormal = compiler.labelnum++;
+ uml::code_label const end = compiler.labelnum++;
// TODO: denormals
UML_FSCOPYI(block, F0, REG(fxm));
@@ -3650,8 +3646,8 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0x1b: // Fm = F3-0 * F7-4, Fa = FIX F11-8 BY R15-12
{
- code_label denormal = compiler->labelnum++;
- code_label end = compiler->labelnum++;
+ uml::code_label const denormal = compiler.labelnum++;
+ uml::code_label const end = compiler.labelnum++;
// TODO: denormals
UML_FSCOPYI(block, F0, REG(fxm));
@@ -3692,12 +3688,12 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCOPYI(block, F2, I0);
UML_TEST(block, MODE1, MODE1_TRUNCATE);
- UML_JMPc(block, COND_Z, compiler->labelnum);
+ UML_JMPc(block, COND_Z, compiler.labelnum);
UML_FSTOINT(block, I0, F2, SIZE_DWORD, ROUND_TRUNC);
- UML_JMP(block, compiler->labelnum + 1);
- UML_LABEL(block, compiler->labelnum++);
+ UML_JMP(block, compiler.labelnum + 1);
+ UML_LABEL(block, compiler.labelnum++);
UML_FSTOINT(block, I0, F2, SIZE_DWORD, ROUND_ROUND);
- UML_LABEL(block, compiler->labelnum++);
+ UML_LABEL(block, compiler.labelnum++);
if (MN_CALC_REQUIRED)
UML_FSCMP(block, F0, mem(&m_core->fp0));
@@ -4146,9 +4142,9 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
if (AV_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AV);
UML_FSCMP(block, F0, mem(&m_core->fp0));
- UML_JMPc(block, COND_Z, compiler->labelnum);
+ UML_JMPc(block, COND_Z, compiler.labelnum);
UML_FSRECIP(block, F0, F0);
- UML_LABEL(block, compiler->labelnum++);
+ UML_LABEL(block, compiler.labelnum++);
if (AZ_CALC_REQUIRED)
UML_FSCMP(block, F0, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
@@ -4163,9 +4159,9 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
// TODO: use the bit accurate method from interpreter?
UML_FSCOPYI(block, F0, REG(rx));
UML_FSCMP(block, F0, mem(&m_core->fp0));
- UML_JMPc(block, COND_Z, compiler->labelnum);
+ UML_JMPc(block, COND_Z, compiler.labelnum);
UML_FSRSQRT(block, F0, F0);
- UML_LABEL(block, compiler->labelnum++);
+ UML_LABEL(block, compiler.labelnum++);
UML_ICOPYFS(block, REG(rn), F0);
// TODO: flags!
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
@@ -4187,12 +4183,12 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0xc9: // Rn = FIX Fx
UML_FSCOPYI(block, F0, REG(rx));
UML_TEST(block, MODE1, MODE1_TRUNCATE);
- UML_JMPc(block, COND_Z, compiler->labelnum);
+ UML_JMPc(block, COND_Z, compiler.labelnum);
UML_FSTOINT(block, I0, F0, SIZE_DWORD, ROUND_TRUNC);
- UML_JMP(block, compiler->labelnum + 1);
- UML_LABEL(block, compiler->labelnum++);
+ UML_JMP(block, compiler.labelnum + 1);
+ UML_LABEL(block, compiler.labelnum++);
UML_FSTOINT(block, I0, F0, SIZE_DWORD, ROUND_ROUND);
- UML_LABEL(block, compiler->labelnum++);
+ UML_LABEL(block, compiler.labelnum++);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
UML_CMP(block, I0, 0);
@@ -4207,8 +4203,8 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0xd9: // Rn = FIX Fx BY Ry
{
- code_label denormal = compiler->labelnum++;
- code_label end = compiler->labelnum++;
+ uml::code_label const denormal = compiler.labelnum++;
+ uml::code_label const end = compiler.labelnum++;
UML_MOV(block, I1, REG(rx));
UML_AND(block, I0, I1, 0x7f800000);
@@ -4226,12 +4222,12 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCOPYI(block, F2, I0);
UML_TEST(block, MODE1, MODE1_TRUNCATE);
- UML_JMPc(block, COND_Z, compiler->labelnum);
+ UML_JMPc(block, COND_Z, compiler.labelnum);
UML_FSTOINT(block, I0, F2, SIZE_DWORD, ROUND_TRUNC);
- UML_JMP(block, compiler->labelnum + 1);
- UML_LABEL(block, compiler->labelnum++);
+ UML_JMP(block, compiler.labelnum + 1);
+ UML_LABEL(block, compiler.labelnum++);
UML_FSTOINT(block, I0, F2, SIZE_DWORD, ROUND_ROUND);
- UML_LABEL(block, compiler->labelnum++);
+ UML_LABEL(block, compiler.labelnum++);
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
UML_CMP(block, I0, 0);
@@ -4260,8 +4256,8 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0xda: // Fn = FLOAT Rx BY Ry
{
- code_label denormal = compiler->labelnum++;
- code_label end = compiler->labelnum++;
+ uml::code_label const denormal = compiler.labelnum++;
+ uml::code_label const end = compiler.labelnum++;
UML_FSFRINT(block, F0, REG(rx), SIZE_DWORD);
UML_ICOPYFS(block, I1, F0);
UML_AND(block, I0, I1, 0x7f800000);
@@ -4336,8 +4332,8 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0xe3: // Fn = CLIP Fx BY Fy
{
- code_label label_1 = compiler->labelnum++;
- code_label label_2 = compiler->labelnum++;
+ uml::code_label const label_1 = compiler.labelnum++;
+ uml::code_label const label_2 = compiler.labelnum++;
UML_FSCOPYI(block, F0, REG(rx));
UML_FSCOPYI(block, F1, REG(ry));
UML_FSABS(block, F1, F1);
@@ -4641,8 +4637,8 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0x00: // Rn = LSHIFT Rx BY Ry | <data8>
{
- code_label shift_neg = compiler->labelnum++;
- code_label shift_end = compiler->labelnum++;
+ uml::code_label const shift_neg = compiler.labelnum++;
+ uml::code_label const shift_end = compiler.labelnum++;
UML_MOV(block, I0, REG(ry));
UML_CMP(block, I0, 0);
@@ -4666,8 +4662,8 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0x08: // Rn = ROT Rx BY Ry | <data8>
{
- code_label shift_neg = compiler->labelnum++;
- code_label shift_end = compiler->labelnum++;
+ uml::code_label const shift_neg = compiler.labelnum++;
+ uml::code_label const shift_end = compiler.labelnum++;
UML_MOV(block, I0, REG(ry));
UML_CMP(block, I0, 0);
@@ -4687,8 +4683,8 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0x20: // Rn = Rn OR LSHIFT Rx BY Ry | <data8>
{
- code_label shift_neg = compiler->labelnum++;
- code_label shift_end = compiler->labelnum++;
+ uml::code_label const shift_neg = compiler.labelnum++;
+ uml::code_label const shift_end = compiler.labelnum++;
UML_MOV(block, I0, REG(ry));
UML_CMP(block, I0, 0);
@@ -4844,10 +4840,10 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
}
}
-void adsp21062_device::generate_if_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int condition, int skip_label)
+void adsp21062_device::generate_if_condition(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int condition, int skip_label)
{
// Jump to skip_label if condition is not true
- code_label not_skip;
+ uml::code_label not_skip;
switch (condition)
{
@@ -4862,7 +4858,7 @@ void adsp21062_device::generate_if_condition(drcuml_block *block, compiler_state
UML_JMPc(block, COND_E, skip_label);
break;
case 0x02: /* LE */
- not_skip = compiler->labelnum++;
+ not_skip = compiler.labelnum++;
UML_TEST(block, ASTAT_AZ, 1);
UML_JMPc(block, COND_NZ, not_skip);
UML_TEST(block, ASTAT_AN, 1);
@@ -4926,7 +4922,7 @@ void adsp21062_device::generate_if_condition(drcuml_block *block, compiler_state
UML_JMPc(block, COND_NE, skip_label);
break;
case 0x11: /* GE */
- not_skip = compiler->labelnum++;
+ not_skip = compiler.labelnum++;
UML_TEST(block, ASTAT_AZ, 1);
UML_JMPc(block, COND_NZ, not_skip);
UML_TEST(block, ASTAT_AN, 1);
@@ -4993,10 +4989,10 @@ void adsp21062_device::generate_if_condition(drcuml_block *block, compiler_state
}
}
-void adsp21062_device::generate_do_condition(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int condition, int skip_label, ASTAT_DRC &astat)
+void adsp21062_device::generate_do_condition(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int condition, int skip_label, ASTAT_DRC &astat)
{
// Jump to skip_label if condition is true
- code_label not_skip;
+ uml::code_label not_skip;
switch (condition)
{
@@ -5005,7 +5001,7 @@ void adsp21062_device::generate_do_condition(drcuml_block *block, compiler_state
UML_JMPc(block, COND_NZ, skip_label);
break;
case 0x01: /* LT */
- not_skip = compiler->labelnum++;
+ not_skip = compiler.labelnum++;
UML_TEST(block, mem(&m_core->astat_delay_copy.az), 1);
UML_JMPc(block, COND_NZ, not_skip);
UML_TEST(block, mem(&m_core->astat_delay_copy.an), 1);
@@ -5080,7 +5076,7 @@ void adsp21062_device::generate_do_condition(drcuml_block *block, compiler_state
UML_JMPc(block, COND_Z, skip_label);
break;
case 0x12: /* GT */
- not_skip = compiler->labelnum++;
+ not_skip = compiler.labelnum++;
UML_TEST(block, mem(&m_core->astat_delay_copy.az), 1);
UML_JMPc(block, COND_NZ, not_skip);
UML_TEST(block, mem(&m_core->astat_delay_copy.an), 1);
@@ -5142,7 +5138,7 @@ void adsp21062_device::generate_do_condition(drcuml_block *block, compiler_state
}
}
-void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int data, int shiftop, int rn, int rx)
+void adsp21062_device::generate_shift_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, int data, int shiftop, int rn, int rx)
{
int8_t shift = data & 0xff;
int bit = data & 0x3f;
diff --git a/src/devices/cpu/sharc/sharcfe.h b/src/devices/cpu/sharc/sharcfe.h
index 6961b53b34f..5aaeeb45a4b 100644
--- a/src/devices/cpu/sharc/sharcfe.h
+++ b/src/devices/cpu/sharc/sharcfe.h
@@ -6,14 +6,14 @@
Front-end for SHARC recompiler
******************************************************************************/
+#ifndef MAME_CPU_SHARC_SHARCFE_H
+#define MAME_CPU_SHARC_SHARCFE_H
#pragma once
#include "sharc.h"
#include "cpu/drcfe.h"
-#ifndef __SHARCFE_H__
-#define __SHARCFE_H__
class sharc_frontend : public drc_frontend
{
@@ -78,4 +78,4 @@ private:
std::unique_ptr<LOOP_ENTRY[]> m_loopmap;
};
-#endif /* __SHARCFE_H__ */
+#endif // MAME_CPU_SHARC_SHARCFE_H
diff --git a/src/devices/cpu/sm510/sm500.h b/src/devices/cpu/sm510/sm500.h
index b0d056b47bd..53cc0c3859b 100644
--- a/src/devices/cpu/sm510/sm500.h
+++ b/src/devices/cpu/sm510/sm500.h
@@ -90,7 +90,7 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one() override;
virtual void get_opcode_param() override;
virtual void clock_melody() override;
@@ -161,7 +161,7 @@ protected:
void program_1_8k(address_map &map);
void data_5x13x4(address_map &map);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one() override;
virtual int get_trs_field() override { return 1; }
};
diff --git a/src/devices/cpu/sm510/sm500core.cpp b/src/devices/cpu/sm510/sm500core.cpp
index 9cd8e796a16..b4f72b85788 100644
--- a/src/devices/cpu/sm510/sm500core.cpp
+++ b/src/devices/cpu/sm510/sm500core.cpp
@@ -48,9 +48,9 @@ sm500_device::sm500_device(const machine_config &mconfig, device_type type, cons
// disasm
-util::disasm_interface *sm500_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sm500_device::create_disassembler()
{
- return new sm500_disassembler;
+ return std::make_unique<sm500_disassembler>();
}
diff --git a/src/devices/cpu/sm510/sm510.h b/src/devices/cpu/sm510/sm510.h
index d51aca23bcf..7d0ec21eb4d 100644
--- a/src/devices/cpu/sm510/sm510.h
+++ b/src/devices/cpu/sm510/sm510.h
@@ -323,7 +323,7 @@ protected:
void program_2_7k(address_map &map);
void data_96_32x4(address_map &map);
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one() override;
virtual void get_opcode_param() override;
@@ -347,7 +347,7 @@ protected:
virtual void device_post_load() override { notify_clock_changed(); }
virtual void device_reset() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one() override;
virtual void get_opcode_param() override;
diff --git a/src/devices/cpu/sm510/sm510core.cpp b/src/devices/cpu/sm510/sm510core.cpp
index e838ad12b14..26a80824533 100644
--- a/src/devices/cpu/sm510/sm510core.cpp
+++ b/src/devices/cpu/sm510/sm510core.cpp
@@ -42,9 +42,9 @@ sm510_device::sm510_device(const machine_config &mconfig, const char *tag, devic
// disasm
-util::disasm_interface *sm510_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sm510_device::create_disassembler()
{
- return new sm510_disassembler;
+ return std::make_unique<sm510_disassembler>();
}
diff --git a/src/devices/cpu/sm510/sm511core.cpp b/src/devices/cpu/sm510/sm511core.cpp
index faf65d12266..95e184b80c4 100644
--- a/src/devices/cpu/sm510/sm511core.cpp
+++ b/src/devices/cpu/sm510/sm511core.cpp
@@ -44,9 +44,9 @@ ADDRESS_MAP_END
// disasm
-util::disasm_interface *sm511_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sm511_device::create_disassembler()
{
- return new sm511_disassembler;
+ return std::make_unique<sm511_disassembler>();
}
diff --git a/src/devices/cpu/sm510/sm590.h b/src/devices/cpu/sm510/sm590.h
index fa777436aa9..81d16060ffe 100644
--- a/src/devices/cpu/sm510/sm590.h
+++ b/src/devices/cpu/sm510/sm590.h
@@ -104,7 +104,7 @@ protected:
void data_16x2x4(address_map &map);
virtual void device_reset() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual bool wake_me_up() override;
virtual void init_divider() override { }
virtual void init_lcd_driver() override { }
diff --git a/src/devices/cpu/sm510/sm590core.cpp b/src/devices/cpu/sm510/sm590core.cpp
index 0ece8bc58f5..c71d61ce9be 100644
--- a/src/devices/cpu/sm510/sm590core.cpp
+++ b/src/devices/cpu/sm510/sm590core.cpp
@@ -54,9 +54,9 @@ sm590_device::sm590_device(const machine_config &mconfig, device_type type, cons
}
-util::disasm_interface *sm590_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sm590_device::create_disassembler()
{
- return new sm590_disassembler;
+ return std::make_unique<sm590_disassembler>();
}
diff --git a/src/devices/cpu/sm510/sm5acore.cpp b/src/devices/cpu/sm510/sm5acore.cpp
index 85876e115a3..7915db8c301 100644
--- a/src/devices/cpu/sm510/sm5acore.cpp
+++ b/src/devices/cpu/sm510/sm5acore.cpp
@@ -64,9 +64,9 @@ kb1013vk12_device::kb1013vk12_device(const machine_config &mconfig, const char *
// disasm
-util::disasm_interface *sm5a_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sm5a_device::create_disassembler()
{
- return new sm5a_disassembler;
+ return std::make_unique<sm5a_disassembler>();
}
diff --git a/src/devices/cpu/sm8500/sm8500.cpp b/src/devices/cpu/sm8500/sm8500.cpp
index 85622f5a197..c5ab3aeccfe 100644
--- a/src/devices/cpu/sm8500/sm8500.cpp
+++ b/src/devices/cpu/sm8500/sm8500.cpp
@@ -349,9 +349,9 @@ void sm8500_cpu_device::process_interrupts()
}
-util::disasm_interface *sm8500_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> sm8500_cpu_device::create_disassembler()
{
- return new sm8500_disassembler;
+ return std::make_unique<sm8500_disassembler>();
}
diff --git a/src/devices/cpu/sm8500/sm8500.h b/src/devices/cpu/sm8500/sm8500.h
index 34e3242f957..ddb4916fc1f 100644
--- a/src/devices/cpu/sm8500/sm8500.h
+++ b/src/devices/cpu/sm8500/sm8500.h
@@ -74,7 +74,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
inline void get_sp();
uint8_t mem_readbyte(uint32_t offset) const;
diff --git a/src/devices/cpu/sparc/mb86901.cpp b/src/devices/cpu/sparc/mb86901.cpp
index bf3023d8f97..e40d551dc94 100644
--- a/src/devices/cpu/sparc/mb86901.cpp
+++ b/src/devices/cpu/sparc/mb86901.cpp
@@ -523,10 +523,10 @@ void mb86901_device::state_string_export(const device_state_entry &entry, std::s
// helper function
//-------------------------------------------------
-util::disasm_interface *mb86901_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> mb86901_device::create_disassembler()
{
- auto dasm = new sparc_disassembler(this, 7);
- m_asi_desc_adder(dasm);
+ auto dasm = std::make_unique<sparc_disassembler>(static_cast<sparc_disassembler::config const *>(this), 7);
+ m_asi_desc_adder(dasm.get());
return dasm;
}
diff --git a/src/devices/cpu/sparc/sparc.h b/src/devices/cpu/sparc/sparc.h
index 2991886adfa..435fee74e91 100644
--- a/src/devices/cpu/sparc/sparc.h
+++ b/src/devices/cpu/sparc/sparc.h
@@ -43,7 +43,7 @@ public:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/spc700/spc700.cpp b/src/devices/cpu/spc700/spc700.cpp
index a60bb957521..97596d00fa8 100644
--- a/src/devices/cpu/spc700/spc700.cpp
+++ b/src/devices/cpu/spc700/spc700.cpp
@@ -1353,9 +1353,9 @@ void spc700_device::execute_set_input( int inptnum, int state )
#include "spc700ds.h"
-util::disasm_interface *spc700_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> spc700_device::create_disassembler()
{
- return new spc700_disassembler;
+ return std::make_unique<spc700_disassembler>();
}
//int dump_flag = 0;
diff --git a/src/devices/cpu/spc700/spc700.h b/src/devices/cpu/spc700/spc700.h
index 6af60c16d8e..9050bdfe981 100644
--- a/src/devices/cpu/spc700/spc700.h
+++ b/src/devices/cpu/spc700/spc700.h
@@ -33,7 +33,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/ssem/ssem.cpp b/src/devices/cpu/ssem/ssem.cpp
index d115db0e3e0..354bda3cb85 100644
--- a/src/devices/cpu/ssem/ssem.cpp
+++ b/src/devices/cpu/ssem/ssem.cpp
@@ -163,9 +163,9 @@ void ssem_device::state_string_export(const device_state_entry &entry, std::stri
// helper function
//-------------------------------------------------
-util::disasm_interface *ssem_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> ssem_device::create_disassembler()
{
- return new ssem_disassembler;
+ return std::make_unique<ssem_disassembler>();
}
diff --git a/src/devices/cpu/ssem/ssem.h b/src/devices/cpu/ssem/ssem.h
index c6e396307f1..f635f1e1971 100644
--- a/src/devices/cpu/ssem/ssem.h
+++ b/src/devices/cpu/ssem/ssem.h
@@ -41,7 +41,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/ssp1601/ssp1601.cpp b/src/devices/cpu/ssp1601/ssp1601.cpp
index 0eb076ff78d..0c414d4d46e 100644
--- a/src/devices/cpu/ssp1601/ssp1601.cpp
+++ b/src/devices/cpu/ssp1601/ssp1601.cpp
@@ -210,9 +210,9 @@ device_memory_interface::space_config_vector ssp1601_device::memory_space_config
}
-util::disasm_interface *ssp1601_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> ssp1601_device::create_disassembler()
{
- return new ssp1601_disassembler;
+ return std::make_unique<ssp1601_disassembler>();
}
diff --git a/src/devices/cpu/ssp1601/ssp1601.h b/src/devices/cpu/ssp1601/ssp1601.h
index a44615b16f3..cc7414991c3 100644
--- a/src/devices/cpu/ssp1601/ssp1601.h
+++ b/src/devices/cpu/ssp1601/ssp1601.h
@@ -43,7 +43,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/superfx/superfx.cpp b/src/devices/cpu/superfx/superfx.cpp
index 802ccff64be..d3985d4645d 100644
--- a/src/devices/cpu/superfx/superfx.cpp
+++ b/src/devices/cpu/superfx/superfx.cpp
@@ -1450,7 +1450,7 @@ u16 superfx_device::get_alt() const
return m_sfr & SUPERFX_SFR_ALT;
}
-util::disasm_interface *superfx_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> superfx_device::create_disassembler()
{
- return new superfx_disassembler(this);
+ return std::make_unique<superfx_disassembler>(this);
}
diff --git a/src/devices/cpu/superfx/superfx.h b/src/devices/cpu/superfx/superfx.h
index 28c474d4d92..14cc48d401f 100644
--- a/src/devices/cpu/superfx/superfx.h
+++ b/src/devices/cpu/superfx/superfx.h
@@ -129,7 +129,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/t11/t11.cpp b/src/devices/cpu/t11/t11.cpp
index b7d2b13db2b..f77400acf53 100644
--- a/src/devices/cpu/t11/t11.cpp
+++ b/src/devices/cpu/t11/t11.cpp
@@ -423,7 +423,7 @@ void t11_device::execute_run()
} while (m_icount > 0);
}
-util::disasm_interface *t11_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> t11_device::create_disassembler()
{
- return new t11_disassembler;
+ return std::make_unique<t11_disassembler>();
}
diff --git a/src/devices/cpu/t11/t11.h b/src/devices/cpu/t11/t11.h
index 2ca0dd0e425..085032028c9 100644
--- a/src/devices/cpu/t11/t11.h
+++ b/src/devices/cpu/t11/t11.h
@@ -66,7 +66,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
diff --git a/src/devices/cpu/tlcs870/tlcs870.cpp b/src/devices/cpu/tlcs870/tlcs870.cpp
index b40f3aa75c9..86cdac439c6 100644
--- a/src/devices/cpu/tlcs870/tlcs870.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870.cpp
@@ -3164,7 +3164,7 @@ void tlcs870_device::state_string_export(const device_state_entry &entry, std::s
}
-util::disasm_interface *tlcs870_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tlcs870_device::create_disassembler()
{
- return new tlcs870_disassembler;
+ return std::make_unique<tlcs870_disassembler>();
}
diff --git a/src/devices/cpu/tlcs870/tlcs870.h b/src/devices/cpu/tlcs870/tlcs870.h
index 0775f4a8f1e..d0ab90221c5 100644
--- a/src/devices/cpu/tlcs870/tlcs870.h
+++ b/src/devices/cpu/tlcs870/tlcs870.h
@@ -106,7 +106,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
void tmp87ph40an_mem(address_map &map);
diff --git a/src/devices/cpu/tlcs90/tlcs90.cpp b/src/devices/cpu/tlcs90/tlcs90.cpp
index 39b5d78267f..b6a01d81178 100644
--- a/src/devices/cpu/tlcs90/tlcs90.cpp
+++ b/src/devices/cpu/tlcs90/tlcs90.cpp
@@ -2872,7 +2872,7 @@ void tlcs90_device::state_string_export(const device_state_entry &entry, std::st
}
}
-util::disasm_interface *tlcs90_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tlcs90_device::create_disassembler()
{
- return new tlcs90_disassembler;
+ return std::make_unique<tlcs90_disassembler>();
}
diff --git a/src/devices/cpu/tlcs90/tlcs90.h b/src/devices/cpu/tlcs90/tlcs90.h
index 19a7a1e9150..3d5a27a25b9 100644
--- a/src/devices/cpu/tlcs90/tlcs90.h
+++ b/src/devices/cpu/tlcs90/tlcs90.h
@@ -124,7 +124,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
enum class e_mode : u8 {
diff --git a/src/devices/cpu/tlcs900/tlcs900.cpp b/src/devices/cpu/tlcs900/tlcs900.cpp
index 3fd84d6d9e4..64e7e928f7a 100644
--- a/src/devices/cpu/tlcs900/tlcs900.cpp
+++ b/src/devices/cpu/tlcs900/tlcs900.cpp
@@ -149,9 +149,9 @@ void tmp95c063_device::device_config_complete()
}
-util::disasm_interface *tlcs900h_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tlcs900h_device::create_disassembler()
{
- return new tlcs900_disassembler;
+ return std::make_unique<tlcs900_disassembler>();
}
diff --git a/src/devices/cpu/tlcs900/tlcs900.h b/src/devices/cpu/tlcs900/tlcs900.h
index 27c3ccdc689..5bddc3ead85 100644
--- a/src/devices/cpu/tlcs900/tlcs900.h
+++ b/src/devices/cpu/tlcs900/tlcs900.h
@@ -72,7 +72,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
protected:
int m_am8_16;
diff --git a/src/devices/cpu/tms1000/tms0980.cpp b/src/devices/cpu/tms1000/tms0980.cpp
index 401ec6e2649..acb8d7ef249 100644
--- a/src/devices/cpu/tms1000/tms0980.cpp
+++ b/src/devices/cpu/tms1000/tms0980.cpp
@@ -85,9 +85,9 @@ MACHINE_CONFIG_END
// disasm
-util::disasm_interface *tms0980_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms0980_cpu_device::create_disassembler()
{
- return new tms0980_disassembler;
+ return std::make_unique<tms0980_disassembler>();
}
diff --git a/src/devices/cpu/tms1000/tms0980.h b/src/devices/cpu/tms1000/tms0980.h
index 9d28f1e7714..d187e23247a 100644
--- a/src/devices/cpu/tms1000/tms0980.h
+++ b/src/devices/cpu/tms1000/tms0980.h
@@ -32,7 +32,7 @@ protected:
virtual void device_add_mconfig(machine_config &config) override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual u8 read_k_input() override;
virtual void set_cki_bus() override;
diff --git a/src/devices/cpu/tms1000/tms1000.cpp b/src/devices/cpu/tms1000/tms1000.cpp
index dbaff7e56fa..cb650d0bd03 100644
--- a/src/devices/cpu/tms1000/tms1000.cpp
+++ b/src/devices/cpu/tms1000/tms1000.cpp
@@ -114,9 +114,9 @@ MACHINE_CONFIG_END
// disasm
-util::disasm_interface *tms1000_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms1000_cpu_device::create_disassembler()
{
- return new tms1000_disassembler;
+ return std::make_unique<tms1000_disassembler>();
}
diff --git a/src/devices/cpu/tms1000/tms1000.h b/src/devices/cpu/tms1000/tms1000.h
index 9838563bca6..f3dbb0a826a 100644
--- a/src/devices/cpu/tms1000/tms1000.h
+++ b/src/devices/cpu/tms1000/tms1000.h
@@ -30,7 +30,7 @@ protected:
// overrides
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual u32 decode_micro(u8 sel);
};
diff --git a/src/devices/cpu/tms1000/tms1100.cpp b/src/devices/cpu/tms1000/tms1100.cpp
index 01b800f8c05..2f417b2658d 100644
--- a/src/devices/cpu/tms1000/tms1100.cpp
+++ b/src/devices/cpu/tms1000/tms1100.cpp
@@ -59,9 +59,9 @@ tms1370_cpu_device::tms1370_cpu_device(const machine_config &mconfig, const char
// disasm
-util::disasm_interface *tms1100_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms1100_cpu_device::create_disassembler()
{
- return new tms1100_disassembler;
+ return std::make_unique<tms1100_disassembler>();
}
// device_reset
diff --git a/src/devices/cpu/tms1000/tms1100.h b/src/devices/cpu/tms1000/tms1100.h
index b759126e615..a55d7e6099a 100644
--- a/src/devices/cpu/tms1000/tms1100.h
+++ b/src/devices/cpu/tms1000/tms1100.h
@@ -28,7 +28,7 @@ protected:
// overrides
virtual void device_reset() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void op_setr() override;
virtual void op_rstr() override;
diff --git a/src/devices/cpu/tms1000/tp0320.cpp b/src/devices/cpu/tms1000/tp0320.cpp
index 395f437b811..b27543e9e1b 100644
--- a/src/devices/cpu/tms1000/tp0320.cpp
+++ b/src/devices/cpu/tms1000/tp0320.cpp
@@ -52,9 +52,9 @@ MACHINE_CONFIG_END
// disasm
-util::disasm_interface *tp0320_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tp0320_cpu_device::create_disassembler()
{
- return new tp0320_disassembler;
+ return std::make_unique<tp0320_disassembler>();
}
diff --git a/src/devices/cpu/tms1000/tp0320.h b/src/devices/cpu/tms1000/tp0320.h
index 41b697cdf38..a49723d19ba 100644
--- a/src/devices/cpu/tms1000/tp0320.h
+++ b/src/devices/cpu/tms1000/tp0320.h
@@ -28,7 +28,7 @@ protected:
virtual u32 decode_fixed(u16 op) override { return 0; } // not yet
virtual u32 decode_micro(u8 sel) override;
virtual void device_reset() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void device_add_mconfig(machine_config &config) override;
};
diff --git a/src/devices/cpu/tms32010/tms32010.cpp b/src/devices/cpu/tms32010/tms32010.cpp
index 64b355fcf5b..c5e15660a6f 100644
--- a/src/devices/cpu/tms32010/tms32010.cpp
+++ b/src/devices/cpu/tms32010/tms32010.cpp
@@ -135,9 +135,9 @@ device_memory_interface::space_config_vector tms32010_device::memory_space_confi
};
}
-util::disasm_interface *tms32010_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms32010_device::create_disassembler()
{
- return new tms32010_disassembler;
+ return std::make_unique<tms32010_disassembler>();
}
diff --git a/src/devices/cpu/tms32010/tms32010.h b/src/devices/cpu/tms32010/tms32010.h
index 1d1f60833c2..a9662ff75be 100644
--- a/src/devices/cpu/tms32010/tms32010.h
+++ b/src/devices/cpu/tms32010/tms32010.h
@@ -72,7 +72,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/tms32025/tms32025.cpp b/src/devices/cpu/tms32025/tms32025.cpp
index cb007f51f5c..db83ca7f3aa 100644
--- a/src/devices/cpu/tms32025/tms32025.cpp
+++ b/src/devices/cpu/tms32025/tms32025.cpp
@@ -254,9 +254,9 @@ device_memory_interface::space_config_vector tms32025_device::memory_space_confi
};
}
-util::disasm_interface *tms32025_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms32025_device::create_disassembler()
{
- return new tms32025_disassembler;
+ return std::make_unique<tms32025_disassembler>();
}
READ16_MEMBER( tms32025_device::drr_r)
diff --git a/src/devices/cpu/tms32025/tms32025.h b/src/devices/cpu/tms32025/tms32025.h
index c3576dacb50..2bb7fdc4c0c 100644
--- a/src/devices/cpu/tms32025/tms32025.h
+++ b/src/devices/cpu/tms32025/tms32025.h
@@ -127,7 +127,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
void common_reset();
diff --git a/src/devices/cpu/tms32031/tms32031.cpp b/src/devices/cpu/tms32031/tms32031.cpp
index 5a1891568c0..713a511f304 100644
--- a/src/devices/cpu/tms32031/tms32031.cpp
+++ b/src/devices/cpu/tms32031/tms32031.cpp
@@ -558,9 +558,9 @@ void tms3203x_device::state_string_export(const device_state_entry &entry, std::
// helper function
//-------------------------------------------------
-util::disasm_interface *tms3203x_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms3203x_device::create_disassembler()
{
- return new tms32031_disassembler;
+ return std::make_unique<tms32031_disassembler>();
}
diff --git a/src/devices/cpu/tms32031/tms32031.h b/src/devices/cpu/tms32031/tms32031.h
index 4b6b3a8057b..25046630461 100644
--- a/src/devices/cpu/tms32031/tms32031.h
+++ b/src/devices/cpu/tms32031/tms32031.h
@@ -182,7 +182,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// memory helpers
uint32_t ROPCODE(offs_t pc);
diff --git a/src/devices/cpu/tms32051/tms32051.cpp b/src/devices/cpu/tms32051/tms32051.cpp
index 6b0b44fade9..89ec626de71 100644
--- a/src/devices/cpu/tms32051/tms32051.cpp
+++ b/src/devices/cpu/tms32051/tms32051.cpp
@@ -118,9 +118,9 @@ tms32053_device::tms32053_device(const machine_config &mconfig, const char *tag,
}
-util::disasm_interface *tms32051_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms32051_device::create_disassembler()
{
- return new tms32051_disassembler;
+ return std::make_unique<tms32051_disassembler>();
}
diff --git a/src/devices/cpu/tms32051/tms32051.h b/src/devices/cpu/tms32051/tms32051.h
index 6c1ab166263..f1aee2bff1e 100644
--- a/src/devices/cpu/tms32051/tms32051.h
+++ b/src/devices/cpu/tms32051/tms32051.h
@@ -82,7 +82,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
address_space_config m_data_config;
diff --git a/src/devices/cpu/tms32082/tms32082.cpp b/src/devices/cpu/tms32082/tms32082.cpp
index 3b8fa103160..a3b0c47a565 100644
--- a/src/devices/cpu/tms32082/tms32082.cpp
+++ b/src/devices/cpu/tms32082/tms32082.cpp
@@ -64,9 +64,9 @@ device_memory_interface::space_config_vector tms32082_pp_device::memory_space_co
}
-util::disasm_interface *tms32082_mp_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms32082_mp_device::create_disassembler()
{
- return new tms32082_mp_disassembler;
+ return std::make_unique<tms32082_mp_disassembler>();
}
void tms32082_mp_device::set_command_callback(write32_delegate callback)
@@ -500,9 +500,9 @@ tms32082_pp_device::tms32082_pp_device(const machine_config &mconfig, const char
}
-util::disasm_interface *tms32082_pp_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms32082_pp_device::create_disassembler()
{
- return new tms32082_pp_disassembler;
+ return std::make_unique<tms32082_pp_disassembler>();
}
void tms32082_pp_device::device_start()
diff --git a/src/devices/cpu/tms32082/tms32082.h b/src/devices/cpu/tms32082/tms32082.h
index 77337c66171..c4d7a32963c 100644
--- a/src/devices/cpu/tms32082/tms32082.h
+++ b/src/devices/cpu/tms32082/tms32082.h
@@ -94,7 +94,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
@@ -181,7 +181,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config;
diff --git a/src/devices/cpu/tms34010/tms34010.cpp b/src/devices/cpu/tms34010/tms34010.cpp
index 6efb36980d2..3ce41c05d7c 100644
--- a/src/devices/cpu/tms34010/tms34010.cpp
+++ b/src/devices/cpu/tms34010/tms34010.cpp
@@ -1626,12 +1626,12 @@ void tms340x0_device::state_string_export(const device_state_entry &entry, std::
}
}
-util::disasm_interface *tms34010_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms34010_device::create_disassembler()
{
- return new tms34010_disassembler(false);
+ return std::make_unique<tms34010_disassembler>(false);
}
-util::disasm_interface *tms34020_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms34020_device::create_disassembler()
{
- return new tms34010_disassembler(true);
+ return std::make_unique<tms34010_disassembler>(true);
}
diff --git a/src/devices/cpu/tms34010/tms34010.h b/src/devices/cpu/tms34010/tms34010.h
index 056f414d80a..da4993cd92b 100644
--- a/src/devices/cpu/tms34010/tms34010.h
+++ b/src/devices/cpu/tms34010/tms34010.h
@@ -1022,7 +1022,7 @@ public:
protected:
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 8 - 1) / 8; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 8); }
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
DECLARE_DEVICE_TYPE(TMS34010, tms34010_device)
@@ -1039,7 +1039,7 @@ public:
protected:
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
DECLARE_DEVICE_TYPE(TMS34020, tms34020_device)
diff --git a/src/devices/cpu/tms57002/tms57002.cpp b/src/devices/cpu/tms57002/tms57002.cpp
index c5451b35f91..9343439671a 100644
--- a/src/devices/cpu/tms57002/tms57002.cpp
+++ b/src/devices/cpu/tms57002/tms57002.cpp
@@ -30,9 +30,9 @@ tms57002_device::tms57002_device(const machine_config &mconfig, const char *tag,
{
}
-util::disasm_interface *tms57002_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms57002_device::create_disassembler()
{
- return new tms57002_disassembler;
+ return std::make_unique<tms57002_disassembler>();
}
WRITE_LINE_MEMBER(tms57002_device::pload_w)
diff --git a/src/devices/cpu/tms57002/tms57002.h b/src/devices/cpu/tms57002/tms57002.h
index 63376caaa79..f0cf2eb03c3 100644
--- a/src/devices/cpu/tms57002/tms57002.h
+++ b/src/devices/cpu/tms57002/tms57002.h
@@ -36,7 +36,7 @@ protected:
virtual uint32_t execute_max_cycles() const override;
virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
enum {
diff --git a/src/devices/cpu/tms7000/tms7000.cpp b/src/devices/cpu/tms7000/tms7000.cpp
index ae55767dd70..eebc111cbaa 100644
--- a/src/devices/cpu/tms7000/tms7000.cpp
+++ b/src/devices/cpu/tms7000/tms7000.cpp
@@ -274,9 +274,9 @@ void tms7000_device::state_string_export(const device_state_entry &entry, std::s
}
}
-util::disasm_interface *tms7000_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms7000_device::create_disassembler()
{
- return new tms7000_disassembler;
+ return std::make_unique<tms7000_disassembler>();
}
diff --git a/src/devices/cpu/tms7000/tms7000.h b/src/devices/cpu/tms7000/tms7000.h
index 2fdbf26af43..17a065ac4d0 100644
--- a/src/devices/cpu/tms7000/tms7000.h
+++ b/src/devices/cpu/tms7000/tms7000.h
@@ -111,7 +111,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
uint32_t chip_get_family() const { return m_info_flags & CHIP_FAMILY_MASK; }
diff --git a/src/devices/cpu/tms9900/ti990_10.cpp b/src/devices/cpu/tms9900/ti990_10.cpp
index 79a2de3c280..ecccef75942 100644
--- a/src/devices/cpu/tms9900/ti990_10.cpp
+++ b/src/devices/cpu/tms9900/ti990_10.cpp
@@ -124,9 +124,9 @@ uint32_t ti990_10_device::execute_input_lines() const
}
// TODO: check 9900dasm
-util::disasm_interface *ti990_10_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> ti990_10_device::create_disassembler()
{
- return new tms9900_disassembler(TMS9900_ID);
+ return std::make_unique<tms9900_disassembler>(TMS9900_ID);
}
DEFINE_DEVICE_TYPE(TI990_10, ti990_10_device, "ti990_10_cpu", "Texas Instruments TI990/10 CPU")
diff --git a/src/devices/cpu/tms9900/ti990_10.h b/src/devices/cpu/tms9900/ti990_10.h
index 6e9b945e17e..abab4f27682 100644
--- a/src/devices/cpu/tms9900/ti990_10.h
+++ b/src/devices/cpu/tms9900/ti990_10.h
@@ -34,7 +34,7 @@ protected:
void execute_run() override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual space_config_vector memory_space_config() const override;
diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp
index 9616bf833d2..c5240e16e47 100644
--- a/src/devices/cpu/tms9900/tms9900.cpp
+++ b/src/devices/cpu/tms9900/tms9900.cpp
@@ -2753,9 +2753,9 @@ uint32_t tms99xx_device::execute_input_lines() const
// device_disasm_interface overrides
-util::disasm_interface *tms99xx_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms99xx_device::create_disassembler()
{
- return new tms9900_disassembler(TMS9900_ID);
+ return std::make_unique<tms9900_disassembler>(TMS9900_ID);
}
diff --git a/src/devices/cpu/tms9900/tms9900.h b/src/devices/cpu/tms9900/tms9900.h
index 7c320908937..5af536fb54d 100644
--- a/src/devices/cpu/tms9900/tms9900.h
+++ b/src/devices/cpu/tms9900/tms9900.h
@@ -82,7 +82,7 @@ protected:
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual space_config_vector memory_space_config() const override;
diff --git a/src/devices/cpu/tms9900/tms9980a.cpp b/src/devices/cpu/tms9900/tms9980a.cpp
index ccfd6555f7f..0c316b8efee 100644
--- a/src/devices/cpu/tms9900/tms9980a.cpp
+++ b/src/devices/cpu/tms9900/tms9980a.cpp
@@ -284,9 +284,9 @@ uint32_t tms9980a_device::execute_input_lines() const
// device_disasm_interface overrides
-util::disasm_interface *tms9980a_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms9980a_device::create_disassembler()
{
- return new tms9900_disassembler(TMS9980_ID);
+ return std::make_unique<tms9900_disassembler>(TMS9980_ID);
}
DEFINE_DEVICE_TYPE(TMS9980A, tms9980a_device, "tms9980a", "Texas Instruments TMS9980A")
diff --git a/src/devices/cpu/tms9900/tms9980a.h b/src/devices/cpu/tms9900/tms9980a.h
index 72adcaf56c5..970a5f70839 100644
--- a/src/devices/cpu/tms9900/tms9980a.h
+++ b/src/devices/cpu/tms9900/tms9980a.h
@@ -44,7 +44,7 @@ protected:
uint32_t execute_input_lines() const override;
void execute_set_input(int irqline, int state) override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
address_space_config m_program_config80;
address_space_config m_io_config80;
diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp
index 625aa14b487..2c03b30b911 100644
--- a/src/devices/cpu/tms9900/tms9995.cpp
+++ b/src/devices/cpu/tms9900/tms9995.cpp
@@ -3501,9 +3501,9 @@ uint32_t tms9995_device::execute_input_lines() const
return 2;
}
-util::disasm_interface *tms9995_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms9995_device::create_disassembler()
{
- return new tms9900_disassembler(TMS9995_ID);
+ return std::make_unique<tms9900_disassembler>(TMS9995_ID);
}
diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h
index e623c1573af..3dafc001008 100644
--- a/src/devices/cpu/tms9900/tms9995.h
+++ b/src/devices/cpu/tms9900/tms9995.h
@@ -92,7 +92,7 @@ protected:
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual space_config_vector memory_space_config() const override;
diff --git a/src/devices/cpu/ucom4/ucom4.cpp b/src/devices/cpu/ucom4/ucom4.cpp
index b9fb9f5e247..72cd1cc4dfd 100644
--- a/src/devices/cpu/ucom4/ucom4.cpp
+++ b/src/devices/cpu/ucom4/ucom4.cpp
@@ -137,9 +137,9 @@ void ucom4_cpu_device::state_string_export(const device_state_entry &entry, std:
}
}
-util::disasm_interface *ucom4_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> ucom4_cpu_device::create_disassembler()
{
- return new ucom4_disassembler;
+ return std::make_unique<ucom4_disassembler>();
}
diff --git a/src/devices/cpu/ucom4/ucom4.h b/src/devices/cpu/ucom4/ucom4.h
index 1b47c612e37..77f963a61e9 100644
--- a/src/devices/cpu/ucom4/ucom4.h
+++ b/src/devices/cpu/ucom4/ucom4.h
@@ -134,7 +134,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/unsp/unsp.cpp b/src/devices/cpu/unsp/unsp.cpp
index 5fd7695b025..894186b0c31 100644
--- a/src/devices/cpu/unsp/unsp.cpp
+++ b/src/devices/cpu/unsp/unsp.cpp
@@ -31,9 +31,9 @@ device_memory_interface::space_config_vector unsp_device::memory_space_config()
};
}
-util::disasm_interface *unsp_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> unsp_device::create_disassembler()
{
- return new unsp_disassembler;
+ return std::make_unique<unsp_disassembler>();
}
diff --git a/src/devices/cpu/unsp/unsp.h b/src/devices/cpu/unsp/unsp.h
index 331bbf46786..9131cf8b983 100644
--- a/src/devices/cpu/unsp/unsp.h
+++ b/src/devices/cpu/unsp/unsp.h
@@ -75,7 +75,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/upd7725/upd7725.cpp b/src/devices/cpu/upd7725/upd7725.cpp
index 8d6c37cdb61..6d66f0420cd 100644
--- a/src/devices/cpu/upd7725/upd7725.cpp
+++ b/src/devices/cpu/upd7725/upd7725.cpp
@@ -321,9 +321,9 @@ void necdsp_device::execute_set_input(int inputnum, int state)
// helper function
//-------------------------------------------------
-util::disasm_interface *necdsp_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> necdsp_device::create_disassembler()
{
- return new necdsp_disassembler;
+ return std::make_unique<necdsp_disassembler>();
}
void necdsp_device::execute_run()
diff --git a/src/devices/cpu/upd7725/upd7725.h b/src/devices/cpu/upd7725/upd7725.h
index 16c196c5a66..e98256f2789 100644
--- a/src/devices/cpu/upd7725/upd7725.h
+++ b/src/devices/cpu/upd7725/upd7725.h
@@ -107,7 +107,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// inline data
const address_space_config m_program_config, m_data_config;
diff --git a/src/devices/cpu/upd7810/upd7810.cpp b/src/devices/cpu/upd7810/upd7810.cpp
index c9fd6105dde..93d4e83f474 100644
--- a/src/devices/cpu/upd7810/upd7810.cpp
+++ b/src/devices/cpu/upd7810/upd7810.cpp
@@ -520,24 +520,24 @@ device_memory_interface::space_config_vector upd7810_device::memory_space_config
};
}
-util::disasm_interface *upd7810_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> upd7810_device::create_disassembler()
{
- return new upd7810_disassembler;
+ return std::make_unique<upd7810_disassembler>();
}
-util::disasm_interface *upd7807_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> upd7807_device::create_disassembler()
{
- return new upd7807_disassembler;
+ return std::make_unique<upd7807_disassembler>();
}
-util::disasm_interface *upd7801_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> upd7801_device::create_disassembler()
{
- return new upd7801_disassembler;
+ return std::make_unique<upd7801_disassembler>();
}
-util::disasm_interface *upd78c05_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> upd78c05_device::create_disassembler()
{
- return new upd78c05_disassembler;
+ return std::make_unique<upd78c05_disassembler>();
}
WRITE8_MEMBER(upd7810_device::pa_w)
diff --git a/src/devices/cpu/upd7810/upd7810.h b/src/devices/cpu/upd7810/upd7810.h
index 1f0e12fcc85..9eb27540bec 100644
--- a/src/devices/cpu/upd7810/upd7810.h
+++ b/src/devices/cpu/upd7810/upd7810.h
@@ -230,7 +230,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void handle_timers(int cycles);
virtual void upd7810_take_irq();
@@ -1444,7 +1444,7 @@ public:
upd7807_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void configure_ops() override;
};
@@ -1458,7 +1458,7 @@ public:
protected:
virtual void device_reset() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void handle_timers(int cycles) override;
virtual void upd7810_take_irq() override;
virtual void configure_ops() override;
@@ -1478,7 +1478,7 @@ protected:
virtual void device_reset() override;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void handle_timers(int cycles) override;
virtual void configure_ops() override;
};
diff --git a/src/devices/cpu/v30mz/v30mz.cpp b/src/devices/cpu/v30mz/v30mz.cpp
index 0d9b07cee76..6357f9d09b2 100644
--- a/src/devices/cpu/v30mz/v30mz.cpp
+++ b/src/devices/cpu/v30mz/v30mz.cpp
@@ -1305,9 +1305,9 @@ void v30mz_cpu_device::execute_set_input( int inptnum, int state )
}
-util::disasm_interface *v30mz_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> v30mz_cpu_device::create_disassembler()
{
- return new nec_disassembler;
+ return std::make_unique<nec_disassembler>();
}
diff --git a/src/devices/cpu/v30mz/v30mz.h b/src/devices/cpu/v30mz/v30mz.h
index 7afee5907b0..14db6b4d2fb 100644
--- a/src/devices/cpu/v30mz/v30mz.h
+++ b/src/devices/cpu/v30mz/v30mz.h
@@ -47,7 +47,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
void interrupt(int int_num);
diff --git a/src/devices/cpu/v60/v60.cpp b/src/devices/cpu/v60/v60.cpp
index a792d6771be..e1fead227e9 100644
--- a/src/devices/cpu/v60/v60.cpp
+++ b/src/devices/cpu/v60/v60.cpp
@@ -116,9 +116,9 @@ device_memory_interface::space_config_vector v60_device::memory_space_config() c
}
-util::disasm_interface *v60_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> v60_device::create_disassembler()
{
- return new v60_disassembler;
+ return std::make_unique<v60_disassembler>();
}
diff --git a/src/devices/cpu/v60/v60.h b/src/devices/cpu/v60/v60.h
index 727972d7d99..d43dceded65 100644
--- a/src/devices/cpu/v60/v60.h
+++ b/src/devices/cpu/v60/v60.h
@@ -110,7 +110,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
typedef uint32_t (v60_device::*am_func)();
diff --git a/src/devices/cpu/v810/v810.cpp b/src/devices/cpu/v810/v810.cpp
index d93cda0be28..46d914f7fa9 100644
--- a/src/devices/cpu/v810/v810.cpp
+++ b/src/devices/cpu/v810/v810.cpp
@@ -55,9 +55,9 @@ device_memory_interface::space_config_vector v810_device::memory_space_config()
}
-util::disasm_interface *v810_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> v810_device::create_disassembler()
{
- return new v810_disassembler;
+ return std::make_unique<v810_disassembler>();
}
diff --git a/src/devices/cpu/v810/v810.h b/src/devices/cpu/v810/v810.h
index ad2e91a6617..d248f26d1bd 100644
--- a/src/devices/cpu/v810/v810.h
+++ b/src/devices/cpu/v810/v810.h
@@ -104,7 +104,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
typedef uint32_t (v810_device::*opcode_func)(uint32_t op);
diff --git a/src/devices/cpu/z180/z180.cpp b/src/devices/cpu/z180/z180.cpp
index a4464998b36..9a39cb3996d 100644
--- a/src/devices/cpu/z180/z180.cpp
+++ b/src/devices/cpu/z180/z180.cpp
@@ -90,9 +90,9 @@ z180_device::z180_device(const machine_config &mconfig, const char *tag, device_
{
}
-util::disasm_interface *z180_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> z180_device::create_disassembler()
{
- return new z180_disassembler;
+ return std::make_unique<z180_disassembler>();
}
#define CF 0x01
diff --git a/src/devices/cpu/z180/z180.h b/src/devices/cpu/z180/z180.h
index 57ee654efa8..7a902722b0c 100644
--- a/src/devices/cpu/z180/z180.h
+++ b/src/devices/cpu/z180/z180.h
@@ -158,7 +158,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/z8/z8.cpp b/src/devices/cpu/z8/z8.cpp
index 1fc8848731e..b2ef0f36d76 100644
--- a/src/devices/cpu/z8/z8.cpp
+++ b/src/devices/cpu/z8/z8.cpp
@@ -208,9 +208,9 @@ z8681_device::z8681_device(const machine_config &mconfig, const char *tag, devic
{
}
-util::disasm_interface *z8_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> z8_device::create_disassembler()
{
- return new z8_disassembler;
+ return std::make_unique<z8_disassembler>();
}
diff --git a/src/devices/cpu/z8/z8.h b/src/devices/cpu/z8/z8.h
index 96654f1efc8..afd403334ad 100644
--- a/src/devices/cpu/z8/z8.h
+++ b/src/devices/cpu/z8/z8.h
@@ -89,7 +89,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
void program_2kb(address_map &map);
void program_4kb(address_map &map);
diff --git a/src/devices/cpu/z80/z80.cpp b/src/devices/cpu/z80/z80.cpp
index 5f64bb2ab0e..81bfd9c5634 100644
--- a/src/devices/cpu/z80/z80.cpp
+++ b/src/devices/cpu/z80/z80.cpp
@@ -3672,9 +3672,9 @@ void z80_device::state_string_export(const device_state_entry &entry, std::strin
// helper function
//-------------------------------------------------
-util::disasm_interface *z80_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> z80_device::create_disassembler()
{
- return new z80_disassembler;
+ return std::make_unique<z80_disassembler>();
}
diff --git a/src/devices/cpu/z80/z80.h b/src/devices/cpu/z80/z80.h
index 3acb54b2cf0..84943b528bc 100644
--- a/src/devices/cpu/z80/z80.h
+++ b/src/devices/cpu/z80/z80.h
@@ -70,7 +70,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
#undef PROTOTYPES
#define PROTOTYPES(prefix) \
diff --git a/src/devices/cpu/z8000/z8000.cpp b/src/devices/cpu/z8000/z8000.cpp
index ce2751723a8..feae93fcbfa 100644
--- a/src/devices/cpu/z8000/z8000.cpp
+++ b/src/devices/cpu/z8000/z8000.cpp
@@ -647,9 +647,9 @@ void z8002_device::init_tables()
z8000_exec[val] = opc - table;
}
-util::disasm_interface *z8002_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> z8002_device::create_disassembler()
{
- return new z8000_disassembler(this);
+ return std::make_unique<z8000_disassembler>(this);
}
void z8001_device::device_start()
diff --git a/src/devices/cpu/z8000/z8000.h b/src/devices/cpu/z8000/z8000.h
index bea1dfe9b5a..4ae13025828 100644
--- a/src/devices/cpu/z8000/z8000.h
+++ b/src/devices/cpu/z8000/z8000.h
@@ -64,7 +64,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
void init_tables();
diff --git a/src/devices/machine/netlist.cpp b/src/devices/machine/netlist.cpp
index d1dc5f78b59..0ecf6b62acc 100644
--- a/src/devices/machine/netlist.cpp
+++ b/src/devices/machine/netlist.cpp
@@ -1053,9 +1053,9 @@ ATTR_HOT void netlist_mame_cpu_device::execute_run()
}
}
-util::disasm_interface *netlist_mame_cpu_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> netlist_mame_cpu_device::create_disassembler()
{
- return new netlist_disassembler(this);
+ return std::make_unique<netlist_disassembler>(this);
}
netlist_disassembler::netlist_disassembler(netlist_mame_cpu_device *dev) : m_dev(dev)
diff --git a/src/devices/machine/netlist.h b/src/devices/machine/netlist.h
index 0a374ee605c..050ffad69d6 100644
--- a/src/devices/machine/netlist.h
+++ b/src/devices/machine/netlist.h
@@ -192,7 +192,7 @@ protected:
ATTR_HOT virtual void execute_run() override;
// device_disasm_interface overrides
- virtual util::disasm_interface *create_disassembler() override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;