summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/video/huc6272.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/video/huc6272.h')
-rw-r--r--src/devices/video/huc6272.h76
1 files changed, 67 insertions, 9 deletions
diff --git a/src/devices/video/huc6272.h b/src/devices/video/huc6272.h
index 8380482f38b..169eda8cee9 100644
--- a/src/devices/video/huc6272.h
+++ b/src/devices/video/huc6272.h
@@ -27,7 +27,7 @@ class huc6272_device : public device_t,
public device_memory_interface
{
public:
- static constexpr feature_type imperfect_features() { return feature::SOUND | feature::GRAPHICS; } // Incorrect ADPCM and Graphics
+ static constexpr feature_type imperfect_features() { return feature::SOUND | feature::GRAPHICS; }
// construction/destruction
huc6272_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@@ -35,16 +35,14 @@ public:
auto irq_changed_callback() { return m_irq_changed_cb.bind(); }
template <typename T> void set_rainbow_tag(T &&tag) { m_huc6271.set_tag(std::forward<T>(tag)); }
- // I/O operations
- DECLARE_WRITE32_MEMBER( write );
- DECLARE_READ32_MEMBER( read );
+ void amap(address_map &map);
// ADPCM operations
- DECLARE_READ8_MEMBER( adpcm_update_0 );
- DECLARE_READ8_MEMBER( adpcm_update_1 );
+ uint8_t adpcm_update_0();
+ uint8_t adpcm_update_1();
// CD-DA operations
- DECLARE_WRITE8_MEMBER( cdda_update );
+ void cdda_update(offs_t offset, uint8_t data);
static void cdrom_config(device_t *device);
@@ -63,8 +61,9 @@ private:
uint8_t m_register;
uint32_t m_kram_addr_r, m_kram_addr_w;
- uint16_t m_kram_inc_r,m_kram_inc_w;
- uint8_t m_kram_page_r,m_kram_page_w;
+ uint16_t m_kram_inc_r, m_kram_inc_w;
+ uint8_t m_kram_page_r, m_kram_page_w;
+ u32 m_kram_load_reg = 0, m_kram_write_reg = 0;
uint32_t m_page_setting;
struct{
@@ -107,6 +106,7 @@ private:
const address_space_config m_program_space_config;
const address_space_config m_data_space_config;
+ const address_space_config m_io_space_config;
required_shared_ptr<uint16_t> m_microprg_ram;
required_shared_ptr<uint32_t> m_kram_page0;
required_shared_ptr<uint32_t> m_kram_page1;
@@ -114,6 +114,7 @@ private:
required_device<input_buffer_device> m_scsi_data_in;
required_device<output_latch_device> m_scsi_data_out;
required_device<input_buffer_device> m_scsi_ctrl_in;
+ required_device<input_buffer_device> m_scsi_cmd_in;
/* Callback for when the irq line may have changed (mandatory) */
devcb_write_line m_irq_changed_cb;
@@ -125,8 +126,65 @@ private:
uint8_t adpcm_update(int chan);
void interrupt_update();
+ void io_map(address_map &map);
void kram_map(address_map &map);
void microprg_map(address_map &map);
+
+// void write(offs_t offset, uint32_t data);
+ // host interface
+ u16 status_r(offs_t offset);
+ void register_select_w(offs_t offset, u16 data, u16 mem_mask = ~0);
+ u16 status2_r(offs_t offset);
+ // u32 mem_mask = ~0
+ u32 data_r(offs_t offset, u32 mem_mask = ~0);
+ void data_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ // internal I/O handlers
+ u32 scsi_data_r(offs_t offset);
+ void scsi_data_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ u32 scsi_cmd_status_r(offs_t offset);
+ void scsi_initiate_cmd_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ void scsi_target_cmd_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ u32 scsi_bus_r(offs_t offset);
+ void scsi_bus_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ u32 kram_read_address_r(offs_t offset);
+ void kram_read_address_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ u32 kram_write_address_r(offs_t offset);
+ void kram_write_address_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ u32 kram_read_data_r(offs_t offset);
+ void kram_write_data_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ u32 kram_page_setup_r(offs_t offset);
+ void kram_page_setup_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ void bg_mode_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ void bg_priority_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ void microprogram_address_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ void microprogram_data_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ void microprogram_control_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ template <unsigned N> void bg_bat_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ template <unsigned N> void bg_cg_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ void bg0sub_bat_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ void bg0sub_cg_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ void bg_size_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ void bg_scroll_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ void adpcm_control_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ void adpcm_channel_control_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ template <unsigned N> void adpcm_start_address_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ template <unsigned N> void adpcm_end_address_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+ template <unsigned N> void adpcm_imm_address_w(offs_t offset, u32 data, u32 mem_mask = ~0);
+
+ u32 adpcm_status_r(offs_t offset);
};
// device type definition