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Diffstat (limited to 'src/devices/sound/iopspu.cpp')
-rw-r--r--src/devices/sound/iopspu.cpp25
1 files changed, 15 insertions, 10 deletions
diff --git a/src/devices/sound/iopspu.cpp b/src/devices/sound/iopspu.cpp
index 9701fc85be4..88ace1df633 100644
--- a/src/devices/sound/iopspu.cpp
+++ b/src/devices/sound/iopspu.cpp
@@ -9,6 +9,7 @@
*
*/
+#include "emu.h"
#include "iopspu.h"
DEFINE_DEVICE_TYPE(SONYIOP_SPU, iop_spu_device, "iopspu", "PlayStation 2 IOP SPU")
@@ -21,6 +22,10 @@ iop_spu_device::iop_spu_device(const machine_config &mconfig, const char *tag, d
{
}
+iop_spu_device::~iop_spu_device()
+{
+}
+
void iop_spu_device::device_start()
{
m_ram = std::make_unique<uint16_t[]>(2 * 1024 * 1024); // ?
@@ -139,15 +144,15 @@ uint16_t iop_spu_device::reg_read(int bank, uint32_t offset, uint16_t mem_mask)
logerror("%s %d: read: Unknown 0x19a (%04x & %04x)\n", machine().describe_context(), bank, ret, mem_mask);
break;
- case 0x1a8:
- ret = (uint16_t)(core.m_start_port_addr >> 16);
+ case 0x1a8:
+ ret = (uint16_t)(core.m_start_port_addr >> 16);
logerror("%s %d: read: PORT_ADDR_HI: %04x & %04x\n", machine().describe_context(), bank, ret, mem_mask);
- break;
+ break;
- case 0x1aa:
- ret = (uint16_t)core.m_start_port_addr;
+ case 0x1aa:
+ ret = (uint16_t)core.m_start_port_addr;
logerror("%s %d: read: PORT_ADDR_LO: %04x & %04x\n", machine().describe_context(), bank, ret, mem_mask);
- break;
+ break;
case 0x1b0:
ret = core.m_autodma_ctrl;
@@ -196,19 +201,19 @@ void iop_spu_device::reg_write(int bank, uint32_t offset, uint16_t data, uint16_
core.m_unknown_0x19a = data;
break;
- case 0x1a8:
+ case 0x1a8:
logerror("%s %d: write: PORT_ADDR_HI: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask);
core.m_start_port_addr &= ~0x000f0000;
core.m_start_port_addr |= ((uint32_t)data << 16) & 0x000f0000;
core.m_curr_port_addr = core.m_start_port_addr;
- break;
+ break;
- case 0x1aa:
+ case 0x1aa:
logerror("%s %d: write: PORT_ADDR_LO: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask);
core.m_start_port_addr &= ~0x0000ffff;
core.m_start_port_addr |= data;
core.m_curr_port_addr = core.m_start_port_addr;
- break;
+ break;
case 0x1b0:
logerror("%s %d: write: Auto DMA control: %04x & %04x\n", machine().describe_context(), bank, data, mem_mask);