diff options
Diffstat (limited to 'src/devices/machine/sun4c_mmu.h')
-rw-r--r-- | src/devices/machine/sun4c_mmu.h | 73 |
1 files changed, 23 insertions, 50 deletions
diff --git a/src/devices/machine/sun4c_mmu.h b/src/devices/machine/sun4c_mmu.h index 9152705a905..87db83ec4a7 100644 --- a/src/devices/machine/sun4c_mmu.h +++ b/src/devices/machine/sun4c_mmu.h @@ -15,8 +15,6 @@ #include "machine/ram.h" #include "machine/z80scc.h" -#define SUN4CMMU_LOG_MEM_ACCESSES (0) - class sun4_mmu_base_device : public device_t, public sparc_mmu_interface { public: @@ -39,7 +37,6 @@ public: template <typename T> void set_ram(T &&ram_tag) { m_ram.set_tag(std::forward<T>(ram_tag)); } template <typename T> void set_rom(T &&rom_tag) { m_rom.set_tag(std::forward<T>(rom_tag)); } template <typename T> void set_scc(T &&scc_tag) { m_scc.set_tag(std::forward<T>(scc_tag)); } - void set_cache_line_size(uint32_t line_size) { m_cache_line_size = line_size; } auto type1_r() { return m_type1_r.bind(); } auto type1_w() { return m_type1_w.bind(); } @@ -51,31 +48,26 @@ public: void set_seg_entry_mask(uint32_t seg_entry_mask) { m_seg_entry_mask = seg_entry_mask; } void set_page_entry_mask(uint32_t page_entry_mask) { m_page_entry_mask = page_entry_mask; } void set_cache_mask(uint32_t cache_mask) { m_cache_mask = cache_mask; } - - enum perm_mode - { - USER_MODE, - SUPER_MODE - }; + void set_cache_line_size(uint32_t cache_line_size) { m_cache_line_size = cache_line_size; } enum insn_data_mode { USER_INSN, - USER_DATA, SUPER_INSN, + USER_DATA, SUPER_DATA }; - template <insn_data_mode MODE> uint32_t insn_data_r(uint32_t offset, uint32_t mem_mask); - template <insn_data_mode MODE> void insn_data_w(uint32_t offset, uint32_t data, uint32_t mem_mask); + template <insn_data_mode MODE> uint32_t insn_data_r(const uint32_t offset, const uint32_t mem_mask); + template <insn_data_mode MODE> void insn_data_w(const uint32_t offset, const uint32_t data, const uint32_t mem_mask); uint32_t type1_timeout_r(uint32_t offset); void type1_timeout_w(uint32_t offset, uint32_t data); uint32_t parity_r(uint32_t offset, uint32_t mem_mask); void parity_w(uint32_t offset, uint32_t data, uint32_t mem_mask); - // sparc_mmu_device overrides - uint32_t fetch_insn(const bool supervisor, uint32_t offset) override; + // sparc_mmu_interface overrides + uint32_t fetch_insn(const bool supervisor, const uint32_t offset) override; void set_host(sparc_mmu_host_interface *host) override { m_host = host; } uint32_t context_reg_r(uint32_t offset, uint32_t mem_mask); @@ -107,39 +99,17 @@ public: protected: sun4_mmu_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - struct page_entry - { - uint32_t index; - uint32_t raw; - uint32_t valid; - uint32_t writable; - uint32_t supervisor; - uint32_t uncached; - uint32_t accessed; - uint32_t modified; - uint32_t page; - uint8_t type; - uint8_t pad[3]; - }; - - static const device_timer_id TIMER_RESET = 0; - virtual void device_start() override; virtual void device_reset() override; - virtual void device_stop() override; - virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + + TIMER_CALLBACK_MEMBER(reset_off_tick); uint32_t page_entry_to_uint(uint32_t index); void merge_page_entry(uint32_t index, uint32_t data, uint32_t mem_mask); - template <insn_data_mode MODE> bool cache_fetch(page_entry &entry, uint32_t vaddr, uint32_t paddr, uint32_t &cached_data, uint32_t entry_index); - void cache_fill(page_entry &entry, uint32_t vaddr, uint32_t paddr, uint32_t entry_index); - void type0_timeout_r(const uint32_t offset); void type0_timeout_w(const uint32_t offset); - bool translate(uint32_t &addr); - void l2p_command(const std::vector<std::string> ¶ms); - uint32_t vaddr_to_cache_line(uint32_t vaddr); + void l2p_command(const std::vector<std::string_view> ¶ms); enum { @@ -160,6 +130,19 @@ protected: PM_MODIFIED = 0x01000000 // modified flag }; + struct page_entry + { + uint32_t valid; + uint32_t writable; + uint32_t supervisor; + uint32_t uncached; + uint32_t accessed; + uint32_t modified; + uint32_t page; + uint8_t type; + uint8_t pad[3]; + }; + required_device<cpu_device> m_cpu; required_device<ram_device> m_ram; required_memory_region m_rom; @@ -186,7 +169,7 @@ protected: uint32_t m_cache_context; uint8_t m_system_enable; bool m_fetch_bootrom; - uint32_t m_buserr[16]; + uint32_t m_buserr[4]; uint32_t m_type1_offset; uint32_t m_parity_err_reg; uint32_t m_memory_err_reg; @@ -206,21 +189,11 @@ protected: uint32_t m_seg_entry_mask; uint32_t m_page_entry_mask; uint32_t m_cache_mask; - uint32_t m_cache_tag_mask; uint32_t m_cache_line_size; - uint32_t m_cache_word_size; - uint32_t m_cache_tag_shift; - uint32_t m_cache_tag_id_mask; - uint32_t m_cache_tag_id_shift; - uint32_t m_cache_vaddr_shift; uint32_t m_ram_set_mask[4]; // Used for mirroring within 4 megabyte sets uint32_t m_ram_set_base[4]; uint32_t m_populated_ram_words; -#if SUN4CMMU_LOG_MEM_ACCESSES - uint64_t m_fpos; -#endif emu_timer *m_reset_timer; - bool m_log_mem; }; class sun4_mmu_device : public sun4_mmu_base_device |