diff options
Diffstat (limited to 'src/devices/machine/smartmed.h')
-rw-r--r-- | src/devices/machine/smartmed.h | 231 |
1 files changed, 116 insertions, 115 deletions
diff --git a/src/devices/machine/smartmed.h b/src/devices/machine/smartmed.h index f8efcc2df0b..12f7e8c7539 100644 --- a/src/devices/machine/smartmed.h +++ b/src/devices/machine/smartmed.h @@ -4,136 +4,116 @@ smartmed.h: header file for smartmed.c */ -#ifndef __SMARTMEDIA_H__ -#define __SMARTMEDIA_H__ +#ifndef MAME_MACHINE_SMARTMEDIA_H +#define MAME_MACHINE_SMARTMEDIA_H + +#pragma once #include "formats/imageutl.h" #include "softlist_dev.h" //#define SMARTMEDIA_IMAGE_SAVE -#define MCFG_NAND_TYPE(_type) \ - nand_device::set_nand_type(*device, _type); +#define MCFG_NAND_TYPE(type) \ + nand_device::set_nand_type(*device, (nand_device::chip::type)); -#define MCFG_NAND_RNB_CALLBACK(_write) \ - devcb = &nand_device::set_rnb_wr_callback(*device, DEVCB_##_write); +#define MCFG_NAND_RNB_CALLBACK(write) \ + devcb = &nand_device::set_rnb_wr_callback(*device, DEVCB_##write); /*************************************************************************** TYPE DEFINITIONS ***************************************************************************/ -enum sm_mode_t -{ - SM_M_INIT, // initial state - SM_M_READ, // read page data - SM_M_PROGRAM, // program page data - SM_M_ERASE, // erase block data - SM_M_READSTATUS,// read status - SM_M_READID, // read ID - SM_M_30, - SM_M_RANDOM_DATA_INPUT, - SM_M_RANDOM_DATA_OUTPUT -}; - -enum pointer_sm_mode_t -{ - SM_PM_A, // accessing first 256-byte half of 512-byte data field - SM_PM_B, // accessing second 256-byte half of 512-byte data field - SM_PM_C // accessing spare field -}; - - -// "Sequential Row Read is available only on K9F5608U0D_Y,P,V,F or K9F5608D0D_Y,P" -enum -{ - NAND_CHIP_K9F5608U0D = 0, // K9F5608U0D - NAND_CHIP_K9F5608U0D_J, // K9F5608U0D-Jxxx - NAND_CHIP_K9F5608U0B, // K9F5608U0B - NAND_CHIP_K9F1G08U0B, // K9F1G08U0B - NAND_CHIP_K9LAG08U0M // K9LAG08U0M -}; - // ======================> nand_device class nand_device : public device_t { public: + // "Sequential Row Read is available only on K9F5608U0D_Y,P,V,F or K9F5608D0D_Y,P" + enum class chip + { + K9F5608U0D = 0, // K9F5608U0D + K9F5608U0D_J, // K9F5608U0D-Jxxx + K9F5608U0B, // K9F5608U0B + K9F1G08U0B, // K9F1G08U0B + K9LAG08U0M // K9LAG08U0M + }; + // construction/destruction nand_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - nand_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source); - template<class _Object> static devcb_base &set_rnb_wr_callback(device_t &device, _Object object) { return downcast<nand_device &>(device).m_write_rnb.set_callback(object); } + template <class Object> static devcb_base &set_rnb_wr_callback(device_t &device, Object &&cb) { return downcast<nand_device &>(device).m_write_rnb.set_callback(std::forward<Object>(cb)); } - static void set_nand_type(device_t &device, int type) + static void set_nand_type(device_t &device, chip type) { nand_device &dev = downcast<nand_device &>(device); switch (type) { - case NAND_CHIP_K9F5608U0D: - dev.m_id_len = 2; - dev.m_id[0] = 0xec; - dev.m_id[1] = 0x75; - dev.m_page_data_size = 512; - dev.m_page_total_size = 512 + 16; - dev.m_log2_pages_per_block = compute_log2(32); - dev.m_num_pages = 32 * 2048; - dev.m_col_address_cycles = 1; - dev.m_row_address_cycles = 2; - dev.m_sequential_row_read = 1; - break; - case NAND_CHIP_K9F5608U0D_J: - case NAND_CHIP_K9F5608U0B: - dev.m_id_len = 2; - dev.m_id[0] = 0xec; - dev.m_id[1] = 0x75; - dev.m_page_data_size = 512; - dev.m_page_total_size = 512 + 16; - dev.m_log2_pages_per_block = compute_log2(32); - dev.m_num_pages = 32 * 2048; - dev.m_col_address_cycles = 1; - dev.m_row_address_cycles = 2; - dev.m_sequential_row_read = 0; - break; - case NAND_CHIP_K9F1G08U0B: - dev.m_id_len = 5; - dev.m_id[0] = 0xec; - dev.m_id[1] = 0xf1; - dev.m_id[2] = 0x00; - dev.m_id[3] = 0x95; - dev.m_id[4] = 0x40; - dev.m_page_data_size = 2048; - dev.m_page_total_size = 2048 + 64; - dev.m_log2_pages_per_block = compute_log2(64); - dev.m_num_pages = 64 * 1024; - dev.m_col_address_cycles = 2; - dev.m_row_address_cycles = 2; - dev.m_sequential_row_read = 0; - break; - case NAND_CHIP_K9LAG08U0M: - dev.m_id_len = 5; - dev.m_id[0] = 0xec; - dev.m_id[1] = 0xd5; - dev.m_id[2] = 0x55; - dev.m_id[3] = 0x25; - dev.m_id[4] = 0x68; - dev.m_page_data_size = 2048; - dev.m_page_total_size = 2048 + 64; - dev.m_log2_pages_per_block = compute_log2(128); - dev.m_num_pages = 128 * 8192; - dev.m_col_address_cycles = 2; - dev.m_row_address_cycles = 3; - dev.m_sequential_row_read = 0; - break; - default: - printf("Unknown NAND type!\n"); - dev.m_id_len = 0; - dev.m_page_data_size = 0; - dev.m_page_total_size = 0; - dev.m_log2_pages_per_block = 0; - dev.m_num_pages = 0; - dev.m_col_address_cycles = 0; - dev.m_row_address_cycles = 0; - dev.m_sequential_row_read = 0; - break; + case chip::K9F5608U0D: + dev.m_id_len = 2; + dev.m_id[0] = 0xec; + dev.m_id[1] = 0x75; + dev.m_page_data_size = 512; + dev.m_page_total_size = 512 + 16; + dev.m_log2_pages_per_block = compute_log2(32); + dev.m_num_pages = 32 * 2048; + dev.m_col_address_cycles = 1; + dev.m_row_address_cycles = 2; + dev.m_sequential_row_read = 1; + break; + case chip::K9F5608U0D_J: + case chip::K9F5608U0B: + dev.m_id_len = 2; + dev.m_id[0] = 0xec; + dev.m_id[1] = 0x75; + dev.m_page_data_size = 512; + dev.m_page_total_size = 512 + 16; + dev.m_log2_pages_per_block = compute_log2(32); + dev.m_num_pages = 32 * 2048; + dev.m_col_address_cycles = 1; + dev.m_row_address_cycles = 2; + dev.m_sequential_row_read = 0; + break; + case chip::K9F1G08U0B: + dev.m_id_len = 5; + dev.m_id[0] = 0xec; + dev.m_id[1] = 0xf1; + dev.m_id[2] = 0x00; + dev.m_id[3] = 0x95; + dev.m_id[4] = 0x40; + dev.m_page_data_size = 2048; + dev.m_page_total_size = 2048 + 64; + dev.m_log2_pages_per_block = compute_log2(64); + dev.m_num_pages = 64 * 1024; + dev.m_col_address_cycles = 2; + dev.m_row_address_cycles = 2; + dev.m_sequential_row_read = 0; + break; + case chip::K9LAG08U0M: + dev.m_id_len = 5; + dev.m_id[0] = 0xec; + dev.m_id[1] = 0xd5; + dev.m_id[2] = 0x55; + dev.m_id[3] = 0x25; + dev.m_id[4] = 0x68; + dev.m_page_data_size = 2048; + dev.m_page_total_size = 2048 + 64; + dev.m_log2_pages_per_block = compute_log2(128); + dev.m_num_pages = 128 * 8192; + dev.m_col_address_cycles = 2; + dev.m_row_address_cycles = 3; + dev.m_sequential_row_read = 0; + break; + default: + printf("Unknown NAND type!\n"); + dev.m_id_len = 0; + dev.m_page_data_size = 0; + dev.m_page_total_size = 0; + dev.m_log2_pages_per_block = 0; + dev.m_num_pages = 0; + dev.m_col_address_cycles = 0; + dev.m_row_address_cycles = 0; + dev.m_sequential_row_read = 0; + break; } } @@ -147,7 +127,30 @@ public: void data_w(uint8_t data); void set_data_ptr(void *ptr); + protected: + enum sm_mode_t + { + SM_M_INIT, // initial state + SM_M_READ, // read page data + SM_M_PROGRAM, // program page data + SM_M_ERASE, // erase block data + SM_M_READSTATUS,// read status + SM_M_READID, // read ID + SM_M_30, + SM_M_RANDOM_DATA_INPUT, + SM_M_RANDOM_DATA_OUTPUT + }; + + enum pointer_sm_mode_t + { + SM_PM_A, // accessing first 256-byte half of 512-byte data field + SM_PM_B, // accessing second 256-byte half of 512-byte data field + SM_PM_C // accessing spare field + }; + + nand_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + // device-level overrides virtual void device_start() override; virtual void device_reset() override; @@ -190,15 +193,14 @@ protected: devcb_write_line m_write_rnb; - #ifdef SMARTMEDIA_IMAGE_SAVE +#ifdef SMARTMEDIA_IMAGE_SAVE int m_image_format; - #endif +#endif }; -class smartmedia_image_device : public nand_device, - public device_image_interface +class smartmedia_image_device : public nand_device, public device_image_interface { public: // construction/destruction @@ -222,13 +224,12 @@ public: protected: image_init_result smartmedia_format_1(); image_init_result smartmedia_format_2(); - int detect_geometry( uint8_t id1, uint8_t id2); + int detect_geometry(uint8_t id1, uint8_t id2); }; // device type definition -extern const device_type NAND; -extern const device_type SMARTMEDIA; - +DECLARE_DEVICE_TYPE(NAND, nand_device) +DECLARE_DEVICE_TYPE(SMARTMEDIA, smartmedia_image_device) -#endif /* __SMARTMEDIA_H__ */ +#endif // MAME_MACHINE_SMARTMEDIA_H |