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Diffstat (limited to 'src/devices/machine/sega_scu.h')
-rw-r--r--src/devices/machine/sega_scu.h57
1 files changed, 29 insertions, 28 deletions
diff --git a/src/devices/machine/sega_scu.h b/src/devices/machine/sega_scu.h
index 58751a2405f..f66f65df0d4 100644
--- a/src/devices/machine/sega_scu.h
+++ b/src/devices/machine/sega_scu.h
@@ -11,7 +11,7 @@
#pragma once
-#include "cpu/sh/sh2.h"
+#include "cpu/sh/sh7604.h"
#include "cpu/scudsp/scudsp.h"
#define IRQ_VBLANK_IN 1 << 0
@@ -46,13 +46,13 @@ public:
// I/O operations
void regs_map(address_map &map);
- DECLARE_WRITE_LINE_MEMBER(vblank_out_w);
- DECLARE_WRITE_LINE_MEMBER(vblank_in_w);
- DECLARE_WRITE_LINE_MEMBER(hblank_in_w);
- DECLARE_WRITE_LINE_MEMBER(vdp1_end_w);
+ void vblank_out_w(int state);
+ void vblank_in_w(int state);
+ void hblank_in_w(int state);
+ void vdp1_end_w(int state);
void check_scanline_timers(int scanline,int y_step);
- DECLARE_WRITE_LINE_MEMBER(sound_req_w);
- DECLARE_WRITE_LINE_MEMBER(smpc_irq_w);
+ void sound_req_w(int state);
+ void smpc_irq_w(int state);
template <typename T> void set_hostcpu(T &&tag) { m_hostcpu.set_tag(std::forward<T>(tag)); }
@@ -63,12 +63,13 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_reset_after_children() override;
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+
+ template <int Level> TIMER_CALLBACK_MEMBER(dma_tick);
private:
required_device<scudsp_cpu_device> m_scudsp;
- enum {
+ enum dma_id : int {
DMALV0_ID = 0,
DMALV1_ID,
DMALV2_ID
@@ -83,7 +84,7 @@ private:
bool m_t1md;
bool m_tenb;
- required_device<sh2_device> m_hostcpu;
+ required_device<sh7604_device> m_hostcpu;
address_space *m_hostspace;
void test_pending_irqs();
@@ -109,29 +110,29 @@ private:
void dma_single_transfer(uint32_t src, uint32_t dst,uint8_t *src_shift);
void dma_start_factor_ack(uint8_t event);
- DECLARE_WRITE_LINE_MEMBER(scudsp_end_w);
- DECLARE_READ16_MEMBER(scudsp_dma_r);
- DECLARE_WRITE16_MEMBER(scudsp_dma_w);
+ void scudsp_end_w(int state);
+ uint16_t scudsp_dma_r(offs_t offset, uint16_t mem_mask = ~0);
+ void scudsp_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
// DMA
- DECLARE_READ32_MEMBER(dma_lv0_r);
- DECLARE_WRITE32_MEMBER(dma_lv0_w);
- DECLARE_READ32_MEMBER(dma_lv1_r);
- DECLARE_WRITE32_MEMBER(dma_lv1_w);
- DECLARE_READ32_MEMBER(dma_lv2_r);
- DECLARE_WRITE32_MEMBER(dma_lv2_w);
- DECLARE_READ32_MEMBER(dma_status_r);
+ uint32_t dma_lv0_r(offs_t offset);
+ void dma_lv0_w(offs_t offset, uint32_t data);
+ uint32_t dma_lv1_r(offs_t offset);
+ void dma_lv1_w(offs_t offset, uint32_t data);
+ uint32_t dma_lv2_r(offs_t offset);
+ void dma_lv2_w(offs_t offset, uint32_t data);
+ uint32_t dma_status_r();
// Timers
- DECLARE_WRITE32_MEMBER(t0_compare_w);
- DECLARE_WRITE32_MEMBER(t1_setdata_w);
- DECLARE_WRITE16_MEMBER(t1_mode_w);
+ void t0_compare_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ void t1_setdata_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ void t1_mode_w(uint16_t data);
// Interrupt
- DECLARE_READ32_MEMBER(irq_mask_r);
- DECLARE_READ32_MEMBER(irq_status_r);
- DECLARE_WRITE32_MEMBER(irq_mask_w);
- DECLARE_WRITE32_MEMBER(irq_status_w);
- DECLARE_READ32_MEMBER(version_r);
+ uint32_t irq_mask_r();
+ uint32_t irq_status_r();
+ void irq_mask_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ void irq_status_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t version_r();
};