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Diffstat (limited to 'src/devices/machine/s3c24xx.hxx')
-rw-r--r--src/devices/machine/s3c24xx.hxx1661
1 files changed, 636 insertions, 1025 deletions
diff --git a/src/devices/machine/s3c24xx.hxx b/src/devices/machine/s3c24xx.hxx
index 5481d485f15..2f7d616f702 100644
--- a/src/devices/machine/s3c24xx.hxx
+++ b/src/devices/machine/s3c24xx.hxx
@@ -19,9 +19,6 @@
#define CLOCK_MULTIPLIER 1
-#define BITS(x,m,n) (((x)>>(n))&(((uint32_t)1<<((m)-(n)+1))-1))
-#define CLR_BITS(x,m,n) ((x) & ~((((uint32_t)1 << ((m) - (n) + 1)) - 1) << n))
-
#if defined(DEVICE_S3C2400)
#define S3C24XX_TPAL_GET_TPALEN(x) BIT(x,16)
@@ -109,26 +106,25 @@ int S3C24_CLASS_NAME::iface_core_pin_r(int pin)
void S3C24_CLASS_NAME::s3c24xx_lcd_reset()
{
- s3c24xx_lcd_t *lcd = &m_lcd;
- memset( &lcd->regs, 0, sizeof( lcd->regs));
- #if defined(DEVICE_S3C2410)
- lcd->regs.lcdintmsk = 3;
- lcd->regs.lpcsel = 4;
- #elif defined(DEVICE_S3C2440)
- lcd->regs.lcdintmsk = 3;
- lcd->regs.tconsel = 0x0F84;
- #endif
- lcd->vramaddr_cur = lcd->vramaddr_max = 0;
- lcd->offsize = 0;
- lcd->pagewidth_cur = lcd->pagewidth_max = 0;
- lcd->bppmode = 0;
- lcd->bswp = lcd->hwswp = 0;
- lcd->vpos = lcd->hpos = 0;
- lcd->framerate = 0;
- lcd->tpal = 0;
- lcd->hpos_min = lcd->hpos_max = lcd->vpos_min = lcd->vpos_max = 0;
- lcd->dma_data = lcd->dma_bits = 0;
- lcd->timer->adjust( attotime::never);
+ memset( &m_lcd.regs, 0, sizeof( m_lcd.regs));
+#if defined(DEVICE_S3C2410)
+ m_lcd.regs.lcdintmsk = 3;
+ m_lcd.regs.lpcsel = 4;
+#elif defined(DEVICE_S3C2440)
+ m_lcd.regs.lcdintmsk = 3;
+ m_lcd.regs.tconsel = 0x0F84;
+#endif
+ m_lcd.vramaddr_cur = m_lcd.vramaddr_max = 0;
+ m_lcd.offsize = 0;
+ m_lcd.pagewidth_cur = m_lcd.pagewidth_max = 0;
+ m_lcd.bppmode = 0;
+ m_lcd.bswp = m_lcd.hwswp = 0;
+ m_lcd.vpos = m_lcd.hpos = 0;
+ m_lcd.framerate = 0;
+ m_lcd.tpal = 0;
+ m_lcd.hpos_min = m_lcd.hpos_max = m_lcd.vpos_min = m_lcd.vpos_max = 0;
+ m_lcd.dma_data = m_lcd.dma_bits = 0;
+ m_lcd.timer->adjust(attotime::never);
}
rgb_t S3C24_CLASS_NAME::s3c24xx_get_color_tft_16(uint16_t data)
@@ -691,18 +687,18 @@ TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_lcd_timer_exp )
{
switch (m_lcd.bppmode)
{
- case S3C24XX_BPPMODE_STN_01 : s3c24xx_lcd_render_stn_01(); break;
- case S3C24XX_BPPMODE_STN_02 : s3c24xx_lcd_render_stn_02(); break;
- case S3C24XX_BPPMODE_STN_04 : s3c24xx_lcd_render_stn_04(); break;
- case S3C24XX_BPPMODE_STN_08 : s3c24xx_lcd_render_stn_08(); break;
- case S3C24XX_BPPMODE_STN_12_P : s3c24xx_lcd_render_stn_12_p(); break;
- case S3C24XX_BPPMODE_STN_12_U : s3c24xx_lcd_render_stn_12_u(); break;
- case S3C24XX_BPPMODE_TFT_01 : s3c24xx_lcd_render_tft_01(); break;
- case S3C24XX_BPPMODE_TFT_02 : s3c24xx_lcd_render_tft_02(); break;
- case S3C24XX_BPPMODE_TFT_04 : s3c24xx_lcd_render_tft_04(); break;
- case S3C24XX_BPPMODE_TFT_08 : s3c24xx_lcd_render_tft_08(); break;
- case S3C24XX_BPPMODE_TFT_16 : s3c24xx_lcd_render_tft_16(); break;
- default : verboselog( *this, 0, "s3c24xx_lcd_timer_exp: bppmode %d not supported\n", m_lcd.bppmode); break;
+ case S3C24XX_BPPMODE_STN_01: s3c24xx_lcd_render_stn_01(); break;
+ case S3C24XX_BPPMODE_STN_02: s3c24xx_lcd_render_stn_02(); break;
+ case S3C24XX_BPPMODE_STN_04: s3c24xx_lcd_render_stn_04(); break;
+ case S3C24XX_BPPMODE_STN_08: s3c24xx_lcd_render_stn_08(); break;
+ case S3C24XX_BPPMODE_STN_12_P: s3c24xx_lcd_render_stn_12_p(); break;
+ case S3C24XX_BPPMODE_STN_12_U: s3c24xx_lcd_render_stn_12_u(); break;
+ case S3C24XX_BPPMODE_TFT_01: s3c24xx_lcd_render_tft_01(); break;
+ case S3C24XX_BPPMODE_TFT_02: s3c24xx_lcd_render_tft_02(); break;
+ case S3C24XX_BPPMODE_TFT_04: s3c24xx_lcd_render_tft_04(); break;
+ case S3C24XX_BPPMODE_TFT_08: s3c24xx_lcd_render_tft_08(); break;
+ case S3C24XX_BPPMODE_TFT_16: s3c24xx_lcd_render_tft_16(); break;
+ default: verboselog( *this, 0, "s3c24xx_lcd_timer_exp: bppmode %d not supported\n", m_lcd.bppmode); break;
}
if ((m_lcd.vpos == m_lcd.vpos_min) && (m_lcd.hpos == m_lcd.hpos_min)) break;
}
@@ -730,20 +726,20 @@ void S3C24_CLASS_NAME::bitmap_blend( bitmap_rgb32 &bitmap_dst, bitmap_rgb32 &bit
uint32_t *line2 = &bitmap_dst.pix32(y);
for (int x = 0; x < bitmap_dst.width(); x++)
{
- uint32_t color0 = line0[x];
- uint32_t color1 = line1[x];
- uint16_t r0 = (color0 >> 16) & 0x000000ff;
- uint16_t g0 = (color0 >> 8) & 0x000000ff;
- uint16_t b0 = (color0 >> 0) & 0x000000ff;
- uint16_t r1 = (color1 >> 16) & 0x000000ff;
- uint16_t g1 = (color1 >> 8) & 0x000000ff;
- uint16_t b1 = (color1 >> 0) & 0x000000ff;
- uint8_t r = (uint8_t)((r0 + r1) >> 1);
- uint8_t g = (uint8_t)((g0 + g1) >> 1);
- uint8_t b = (uint8_t)((b0 + b1) >> 1);
- line2[x] = (r << 16) | (g << 8) | b;
- }
+ uint32_t color0 = line0[x];
+ uint32_t color1 = line1[x];
+ uint16_t r0 = (color0 >> 16) & 0x000000ff;
+ uint16_t g0 = (color0 >> 8) & 0x000000ff;
+ uint16_t b0 = (color0 >> 0) & 0x000000ff;
+ uint16_t r1 = (color1 >> 16) & 0x000000ff;
+ uint16_t g1 = (color1 >> 8) & 0x000000ff;
+ uint16_t b1 = (color1 >> 0) & 0x000000ff;
+ uint8_t r = (uint8_t)((r0 + r1) >> 1);
+ uint8_t g = (uint8_t)((g0 + g1) >> 1);
+ uint8_t b = (uint8_t)((b0 + b1) >> 1);
+ line2[x] = (r << 16) | (g << 8) | b;
}
+ }
}
uint32_t S3C24_CLASS_NAME::s3c24xx_video_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
@@ -770,7 +766,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_lcd_r )
uint32_t data = ((uint32_t*)&m_lcd.regs)[offset];
switch (offset)
{
- case S3C24XX_LCDCON1 :
+ case S3C24XX_LCDCON1:
{
// make sure line counter is going
uint32_t vpos = machine().first_screen()->vpos();
@@ -779,7 +775,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_lcd_r )
data = (data & ~0xFFFC0000) | ((m_lcd.vpos_max - vpos) << 18);
}
break;
- case S3C24XX_LCDCON5 :
+ case S3C24XX_LCDCON5:
{
uint32_t vpos = machine().first_screen()->vpos();
data = data & ~0x00018000;
@@ -861,10 +857,10 @@ int S3C24_CLASS_NAME::s3c24xx_lcd_configure_stn()
verboselog( *this, 3, "LCD - framerate %f\n", framerate);
switch (pnrmode)
{
- case S3C24XX_PNRMODE_STN_04_SS : width = ((hozval + 1) * 4); break;
- case S3C24XX_PNRMODE_STN_04_DS : width = ((hozval + 1) * 4); break;
- case S3C24XX_PNRMODE_STN_08_SS : width = ((hozval + 1) * 8 / 3); break;
- default : width = 0; break;
+ case S3C24XX_PNRMODE_STN_04_SS: width = ((hozval + 1) * 4); break;
+ case S3C24XX_PNRMODE_STN_04_DS: width = ((hozval + 1) * 4); break;
+ case S3C24XX_PNRMODE_STN_08_SS: width = ((hozval + 1) * 8 / 3); break;
+ default: width = 0; break;
}
height = lineval + 1;
m_lcd.framerate = framerate;
@@ -965,25 +961,24 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_lcd_palette_w )
void S3C24_CLASS_NAME::s3c24xx_clkpow_reset()
{
- s3c24xx_clkpow_t *clkpow = &m_clkpow;
- memset( &clkpow->regs, 0, sizeof( clkpow->regs));
- #if defined(DEVICE_S3C2400)
- clkpow->regs.locktime = 0x00FFFFFF;
- clkpow->regs.mpllcon = 0x0005C080;
- clkpow->regs.upllcon = 0x00028080;
- clkpow->regs.clkcon = 0x0000FFF8;
- #elif defined(DEVICE_S3C2410)
- clkpow->regs.locktime = 0x00FFFFFF;
- clkpow->regs.mpllcon = 0x0005C080;
- clkpow->regs.upllcon = 0x00028080;
- clkpow->regs.clkcon = 0x0007FFF0;
- #elif defined(DEVICE_S3C2440)
- clkpow->regs.locktime = 0xFFFFFFFF;
- clkpow->regs.mpllcon = 0x00096030;
- clkpow->regs.upllcon = 0x0004D030;
- clkpow->regs.clkcon = 0x00FFFFF0;
- #endif
- clkpow->regs.clkslow = 4;
+ memset( &m_clkpow.regs, 0, sizeof(m_clkpow.regs));
+#if defined(DEVICE_S3C2400)
+ m_clkpow.regs.locktime = 0x00FFFFFF;
+ m_clkpow.regs.mpllcon = 0x0005C080;
+ m_clkpow.regs.upllcon = 0x00028080;
+ m_clkpow.regs.clkcon = 0x0000FFF8;
+#elif defined(DEVICE_S3C2410)
+ m_clkpow.regs.locktime = 0x00FFFFFF;
+ m_clkpow.regs.mpllcon = 0x0005C080;
+ m_clkpow.regs.upllcon = 0x00028080;
+ m_clkpow.regs.clkcon = 0x0007FFF0;
+#elif defined(DEVICE_S3C2440)
+ m_clkpow.regs.locktime = 0xFFFFFFFF;
+ m_clkpow.regs.mpllcon = 0x00096030;
+ m_clkpow.regs.upllcon = 0x0004D030;
+ m_clkpow.regs.clkcon = 0x00FFFFF0;
+#endif
+ m_clkpow.regs.clkslow = 4;
}
uint32_t S3C24_CLASS_NAME::s3c24xx_get_fclk()
@@ -1020,10 +1015,10 @@ uint32_t S3C24_CLASS_NAME::s3c24xx_get_hclk()
#else
switch (BITS( m_clkpow.regs.clkdivn, 2, 1))
{
- case 0 : return s3c24xx_get_fclk() / 1;
- case 1 : return s3c24xx_get_fclk() / 2;
- case 2 : return s3c24xx_get_fclk() / (4 * (BIT( m_clkpow.regs.camdivn, 9) + 1));
- case 3 : return s3c24xx_get_fclk() / (3 * (BIT( m_clkpow.regs.camdivn, 8) + 1));
+ case 0: return s3c24xx_get_fclk() / 1;
+ case 1: return s3c24xx_get_fclk() / 2;
+ case 2: return s3c24xx_get_fclk() / (4 * (BIT( m_clkpow.regs.camdivn, 9) + 1));
+ case 3: return s3c24xx_get_fclk() / (3 * (BIT( m_clkpow.regs.camdivn, 8) + 1));
}
return 0;
#endif
@@ -1047,17 +1042,13 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_clkpow_w )
COMBINE_DATA(&((uint32_t*)&m_clkpow.regs)[offset]);
switch (offset)
{
- case S3C24XX_MPLLCON :
- {
- verboselog( *this, 5, "CLKPOW - fclk %d hclk %d pclk %d\n", s3c24xx_get_fclk(), s3c24xx_get_hclk(), s3c24xx_get_pclk());
- m_cpu->set_unscaled_clock(s3c24xx_get_fclk() * CLOCK_MULTIPLIER);
- }
+ case S3C24XX_MPLLCON :
+ verboselog( *this, 5, "CLKPOW - fclk %d hclk %d pclk %d\n", s3c24xx_get_fclk(), s3c24xx_get_hclk(), s3c24xx_get_pclk());
+ m_cpu->set_unscaled_clock(s3c24xx_get_fclk() * CLOCK_MULTIPLIER);
break;
- case S3C24XX_CLKSLOW :
- {
- verboselog( *this, 5, "CLKPOW - fclk %d hclk %d pclk %d\n", s3c24xx_get_fclk(), s3c24xx_get_hclk(), s3c24xx_get_pclk());
- m_cpu->set_unscaled_clock(s3c24xx_get_fclk() * CLOCK_MULTIPLIER);
- }
+ case S3C24XX_CLKSLOW :
+ verboselog( *this, 5, "CLKPOW - fclk %d hclk %d pclk %d\n", s3c24xx_get_fclk(), s3c24xx_get_hclk(), s3c24xx_get_pclk());
+ m_cpu->set_unscaled_clock(s3c24xx_get_fclk() * CLOCK_MULTIPLIER);
break;
}
}
@@ -1066,16 +1057,15 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_clkpow_w )
void S3C24_CLASS_NAME::s3c24xx_irq_reset()
{
- s3c24xx_irq_t *irq = &m_irq;
- memset( &irq->regs, 0, sizeof( irq->regs));
- irq->line_irq = irq->line_fiq = CLEAR_LINE;
- irq->regs.intmsk = 0xFFFFFFFF;
- irq->regs.priority = 0x7F;
- #if defined(DEVICE_S3C2410)
- irq->regs.intsubmsk = 0x07FF;
- #elif defined(DEVICE_S3C2440)
- irq->regs.intsubmsk = 0xFFFF;
- #endif
+ memset(&m_irq.regs, 0, sizeof(m_irq.regs));
+ m_irq.line_irq = m_irq.line_fiq = CLEAR_LINE;
+ m_irq.regs.intmsk = 0xFFFFFFFF;
+ m_irq.regs.priority = 0x7F;
+#if defined(DEVICE_S3C2410)
+ m_irq.regs.intsubmsk = 0x07FF;
+#elif defined(DEVICE_S3C2440)
+ m_irq.regs.intsubmsk = 0xFFFF;
+#endif
}
void S3C24_CLASS_NAME::s3c24xx_check_pending_irq()
@@ -1228,36 +1218,26 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_irq_w )
COMBINE_DATA(&((uint32_t*)&m_irq.regs)[offset]);
switch (offset)
{
- case S3C24XX_SRCPND :
- {
- m_irq.regs.srcpnd = (old_value & ~data); // clear only the bit positions of SRCPND corresponding to those set to one in the data
- m_irq.regs.intoffset = 0; // "This bit can be cleared automatically by clearing SRCPND and INTPND."
- s3c24xx_check_pending_irq();
- }
+ case S3C24XX_SRCPND:
+ m_irq.regs.srcpnd = (old_value & ~data); // clear only the bit positions of SRCPND corresponding to those set to one in the data
+ m_irq.regs.intoffset = 0; // "This bit can be cleared automatically by clearing SRCPND and INTPND."
+ s3c24xx_check_pending_irq();
break;
- case S3C24XX_INTMSK :
- {
- s3c24xx_check_pending_irq();
- }
+ case S3C24XX_INTMSK:
+ s3c24xx_check_pending_irq();
break;
- case S3C24XX_INTPND :
- {
- m_irq.regs.intpnd = (old_value & ~data); // clear only the bit positions of INTPND corresponding to those set to one in the data
- m_irq.regs.intoffset = 0; // "This bit can be cleared automatically by clearing SRCPND and INTPND."
- s3c24xx_check_pending_irq();
- }
+ case S3C24XX_INTPND:
+ m_irq.regs.intpnd = (old_value & ~data); // clear only the bit positions of INTPND corresponding to those set to one in the data
+ m_irq.regs.intoffset = 0; // "This bit can be cleared automatically by clearing SRCPND and INTPND."
+ s3c24xx_check_pending_irq();
break;
#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- case S3C24XX_SUBSRCPND :
- {
- m_irq.regs.subsrcpnd = (old_value & ~data); // clear only the bit positions of SRCPND corresponding to those set to one in the data
- s3c24xx_check_pending_subirq();
- }
+ case S3C24XX_SUBSRCPND :
+ m_irq.regs.subsrcpnd = (old_value & ~data); // clear only the bit positions of SRCPND corresponding to those set to one in the data
+ s3c24xx_check_pending_subirq();
break;
- case S3C24XX_INTSUBMSK :
- {
- s3c24xx_check_pending_subirq();
- }
+ case S3C24XX_INTSUBMSK:
+ s3c24xx_check_pending_subirq();
break;
#endif
}
@@ -1265,59 +1245,25 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_irq_w )
/* PWM Timer */
-void S3C24_CLASS_NAME::s3c24xx_pwm_reset()
-{
- s3c24xx_pwm_t *pwm = &m_pwm;
- memset( &pwm->regs, 0, sizeof( pwm->regs));
- for (int i = 0; i < 5; i++)
- {
- pwm->timer[i]->adjust( attotime::never);
- }
-}
-
-uint16_t S3C24_CLASS_NAME::s3c24xx_pwm_calc_observation(int ch)
-{
- double timeleft, x1, x2;
- uint32_t cnto;
- timeleft = m_pwm.timer[ch]->remaining( ).as_double();
-// printf( "timeleft %f freq %d cntb %d cmpb %d\n", timeleft, m_pwm.freq[ch], m_pwm.cnt[ch], m_pwm.cmp[ch]);
- x1 = 1 / ((double)m_pwm.freq[ch] / (m_pwm.cnt[ch]- m_pwm.cmp[ch] + 1));
- x2 = x1 / timeleft;
-// printf( "x1 %f\n", x1);
- cnto = m_pwm.cmp[ch] + ((m_pwm.cnt[ch]- m_pwm.cmp[ch]) / x2);
-// printf( "cnto %d\n", cnto);
- return cnto;
-}
-
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_pwm_r )
{
uint32_t data = ((uint32_t*)&m_pwm.regs)[offset];
switch (offset)
{
- case S3C24XX_TCNTO0 :
- {
- data = (data & ~0x0000FFFF) | s3c24xx_pwm_calc_observation( 0);
- }
+ case pwm_t::TCNTO0:
+ data = (data & ~0x0000FFFF) | m_pwm.calc_observation(0);
break;
- case S3C24XX_TCNTO1 :
- {
- data = (data & ~0x0000FFFF) | s3c24xx_pwm_calc_observation( 1);
- }
+ case pwm_t::TCNTO1:
+ data = (data & ~0x0000FFFF) | m_pwm.calc_observation(1);
break;
- case S3C24XX_TCNTO2 :
- {
- data = (data & ~0x0000FFFF) | s3c24xx_pwm_calc_observation( 2);
- }
+ case pwm_t::TCNTO2:
+ data = (data & ~0x0000FFFF) | m_pwm.calc_observation(2);
break;
- case S3C24XX_TCNTO3 :
- {
- data = (data & ~0x0000FFFF) | s3c24xx_pwm_calc_observation( 3);
- }
+ case pwm_t::TCNTO3:
+ data = (data & ~0x0000FFFF) | m_pwm.calc_observation(3);
break;
- case S3C24XX_TCNTO4 :
- {
- data = (data & ~0x0000FFFF) | s3c24xx_pwm_calc_observation( 4);
- }
+ case pwm_t::TCNTO4:
+ data = (data & ~0x0000FFFF) | m_pwm.calc_observation(4);
break;
}
verboselog( *this, 9, "(PWM) %08X -> %08X\n", S3C24XX_BASE_PWM + (offset << 2), data);
@@ -1326,9 +1272,9 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_pwm_r )
void S3C24_CLASS_NAME::s3c24xx_pwm_start(int timer)
{
- const int mux_table[] = { 2, 4, 8, 16};
- const int prescaler_shift[] = { 0, 0, 8, 8, 8};
- const int mux_shift[] = { 0, 4, 8, 12, 16};
+ static constexpr int mux_table[] = { 2, 4, 8, 16 };
+ static constexpr int prescaler_shift[] = { 0, 0, 8, 8, 8 };
+ static constexpr int mux_shift[] = { 0, 4, 8, 12, 16 };
uint32_t pclk, prescaler, mux, cnt, cmp, auto_reload;
double freq, hz;
verboselog( *this, 1, "PWM %d start\n", timer);
@@ -1346,45 +1292,33 @@ void S3C24_CLASS_NAME::s3c24xx_pwm_start(int timer)
}
switch (timer)
{
- case 0 :
- {
- cnt = BITS( m_pwm.regs.tcntb0, 15, 0);
- cmp = BITS( m_pwm.regs.tcmpb0, 15, 0);
- auto_reload = BIT( m_pwm.regs.tcon, 3);
- }
+ case 0:
+ cnt = BITS(m_pwm.regs.tcntb0, 15, 0);
+ cmp = BITS(m_pwm.regs.tcmpb0, 15, 0);
+ auto_reload = BIT(m_pwm.regs.tcon, 3);
break;
- case 1 :
- {
- cnt = BITS( m_pwm.regs.tcntb1, 15, 0);
- cmp = BITS( m_pwm.regs.tcmpb1, 15, 0);
- auto_reload = BIT( m_pwm.regs.tcon, 11);
- }
+ case 1:
+ cnt = BITS(m_pwm.regs.tcntb1, 15, 0);
+ cmp = BITS(m_pwm.regs.tcmpb1, 15, 0);
+ auto_reload = BIT(m_pwm.regs.tcon, 11);
break;
- case 2 :
- {
- cnt = BITS( m_pwm.regs.tcntb2, 15, 0);
- cmp = BITS( m_pwm.regs.tcmpb2, 15, 0);
- auto_reload = BIT( m_pwm.regs.tcon, 15);
- }
+ case 2:
+ cnt = BITS(m_pwm.regs.tcntb2, 15, 0);
+ cmp = BITS(m_pwm.regs.tcmpb2, 15, 0);
+ auto_reload = BIT(m_pwm.regs.tcon, 15);
break;
- case 3 :
- {
- cnt = BITS( m_pwm.regs.tcntb3, 15, 0);
- cmp = BITS( m_pwm.regs.tcmpb3, 15, 0);
- auto_reload = BIT( m_pwm.regs.tcon, 19);
- }
+ case 3:
+ cnt = BITS(m_pwm.regs.tcntb3, 15, 0);
+ cmp = BITS(m_pwm.regs.tcmpb3, 15, 0);
+ auto_reload = BIT(m_pwm.regs.tcon, 19);
break;
- case 4 :
- {
- cnt = BITS( m_pwm.regs.tcntb4, 15, 0);
- cmp = 0;
- auto_reload = BIT( m_pwm.regs.tcon, 22);
- }
+ case 4:
+ cnt = BITS(m_pwm.regs.tcntb4, 15, 0);
+ cmp = 0;
+ auto_reload = BIT(m_pwm.regs.tcon, 22);
break;
- default :
- {
- cnt = cmp = auto_reload = 0;
- }
+ default:
+ cnt = cmp = auto_reload = 0;
break;
}
// hz = freq / (cnt - cmp + 1);
@@ -1396,29 +1330,29 @@ void S3C24_CLASS_NAME::s3c24xx_pwm_start(int timer)
{
hz = freq / cnt;
}
- verboselog( *this, 5, "PWM %d - pclk=%d prescaler=%d div=%d freq=%f cnt=%d cmp=%d auto_reload=%d hz=%f\n", timer, pclk, prescaler, mux_table[mux], freq, cnt, cmp, auto_reload, hz);
+ verboselog(*this, 5, "PWM %d - pclk=%d prescaler=%d div=%d freq=%f cnt=%d cmp=%d auto_reload=%d hz=%f\n", timer, pclk, prescaler, mux_table[mux], freq, cnt, cmp, auto_reload, hz);
m_pwm.cnt[timer] = cnt;
m_pwm.cmp[timer] = cmp;
m_pwm.freq[timer] = freq;
if (auto_reload)
{
- m_pwm.timer[timer]->adjust( attotime::from_hz( hz), timer, attotime::from_hz( hz));
+ m_pwm.timer[timer]->adjust(attotime::from_hz( hz), timer, attotime::from_hz(hz));
}
else
{
- m_pwm.timer[timer]->adjust( attotime::from_hz( hz), timer);
+ m_pwm.timer[timer]->adjust(attotime::from_hz(hz), timer);
}
}
void S3C24_CLASS_NAME::s3c24xx_pwm_stop(int timer)
{
- verboselog( *this, 1, "PWM %d stop\n", timer);
- m_pwm.timer[timer]->adjust( attotime::never);
+ verboselog(*this, 1, "PWM %d stop\n", timer);
+ m_pwm.timer[timer]->adjust(attotime::never);
}
void S3C24_CLASS_NAME::s3c24xx_pwm_recalc(int timer)
{
- const int tcon_shift[] = { 0, 8, 12, 16, 20};
+ static constexpr int tcon_shift[] = { 0, 8, 12, 16, 20 };
if (m_pwm.regs.tcon & (1 << tcon_shift[timer]))
{
s3c24xx_pwm_start(timer);
@@ -1431,33 +1365,31 @@ void S3C24_CLASS_NAME::s3c24xx_pwm_recalc(int timer)
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_pwm_w )
{
- uint32_t old_value = ((uint32_t*)&m_pwm.regs)[offset];
+ uint32_t const old_value = ((uint32_t*)&m_pwm.regs)[offset];
verboselog( *this, 9, "(PWM) %08X <- %08X\n", S3C24XX_BASE_PWM + (offset << 2), data);
COMBINE_DATA(&((uint32_t*)&m_pwm.regs)[offset]);
switch (offset)
{
- case S3C24XX_TCON :
+ case pwm_t::TCON:
+ if (BIT(data ^ old_value, 0))
{
- if ((data & (1 << 0)) != (old_value & (1 << 0)))
- {
- s3c24xx_pwm_recalc( 0);
- }
- if ((data & (1 << 8)) != (old_value & (1 << 8)))
- {
- s3c24xx_pwm_recalc( 1);
- }
- if ((data & (1 << 12)) != (old_value & (1 << 12)))
- {
- s3c24xx_pwm_recalc(2);
- }
- if ((data & (1 << 16)) != (old_value & (1 << 16)))
- {
- s3c24xx_pwm_recalc(3);
- }
- if ((data & (1 << 20)) != (old_value & (1 << 20)))
- {
- s3c24xx_pwm_recalc(4);
- }
+ s3c24xx_pwm_recalc(0);
+ }
+ if (BIT(data ^ old_value, 8))
+ {
+ s3c24xx_pwm_recalc(1);
+ }
+ if (BIT(data ^ old_value, 12))
+ {
+ s3c24xx_pwm_recalc(2);
+ }
+ if (BIT(data ^ old_value, 16))
+ {
+ s3c24xx_pwm_recalc(3);
+ }
+ if (BIT(data ^ old_value, 20))
+ {
+ s3c24xx_pwm_recalc(4);
}
break;
}
@@ -1466,9 +1398,9 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_pwm_w )
TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_pwm_timer_exp )
{
int ch = param;
- const int ch_int[] = { S3C24XX_INT_TIMER0, S3C24XX_INT_TIMER1, S3C24XX_INT_TIMER2, S3C24XX_INT_TIMER3, S3C24XX_INT_TIMER4 };
- verboselog( *this, 2, "PWM %d timer callback\n", ch);
- if (BITS( m_pwm.regs.tcfg1, 23, 20) == (ch + 1))
+ static constexpr int ch_int[] = { S3C24XX_INT_TIMER0, S3C24XX_INT_TIMER1, S3C24XX_INT_TIMER2, S3C24XX_INT_TIMER3, S3C24XX_INT_TIMER4 };
+ verboselog(*this, 2, "PWM %d timer callback\n", ch);
+ if (BITS(m_pwm.regs.tcfg1, 23, 20) == (ch + 1))
{
s3c24xx_dma_request_pwm();
}
@@ -1482,44 +1414,43 @@ TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_pwm_timer_exp )
void S3C24_CLASS_NAME::s3c24xx_dma_reset()
{
- for (auto & elem : m_dma)
+ for (dma_t &dma : m_dma)
{
- s3c24xx_dma_t *dma = &elem;
- memset( &dma->regs, 0, sizeof( dma->regs));
- dma->timer->adjust( attotime::never);
+ memset(&dma.regs, 0, sizeof(dma.regs));
+ dma.timer->adjust(attotime::never);
}
}
void S3C24_CLASS_NAME::s3c24xx_dma_reload(int ch)
{
- s3c24xx_dma_regs_t *regs = &m_dma[ch].regs;
- regs->dstat = S3C24XX_DSTAT_SET_CURR_TC( regs->dstat, S3C24XX_DCON_GET_TC( regs->dcon));
- regs->dcsrc = S3C24XX_DCSRC_SET_CURR_SRC( regs->dcsrc, S3C24XX_DISRC_GET_SADDR( regs->disrc));
- regs->dcdst = S3C24XX_DCDST_SET_CURR_DST( regs->dcdst, S3C24XX_DIDST_GET_DADDR( regs->didst));
+ dma_regs_t *regs = &m_dma[ch].regs;
+ regs->dstat = S3C24XX_DSTAT_SET_CURR_TC(regs->dstat, S3C24XX_DCON_GET_TC(regs->dcon));
+ regs->dcsrc = S3C24XX_DCSRC_SET_CURR_SRC(regs->dcsrc, S3C24XX_DISRC_GET_SADDR(regs->disrc));
+ regs->dcdst = S3C24XX_DCDST_SET_CURR_DST(regs->dcdst, S3C24XX_DIDST_GET_DADDR(regs->didst));
}
void S3C24_CLASS_NAME::s3c24xx_dma_trigger(int ch)
{
- s3c24xx_dma_regs_t *regs = &m_dma[ch].regs;
+ dma_regs_t *regs = &m_dma[ch].regs;
uint32_t curr_tc, curr_src, curr_dst;
- address_space &space = m_cpu->memory().space( AS_PROGRAM);
+ address_space &space = m_cpu->memory().space(AS_PROGRAM);
int dsz, inc_src, inc_dst, servmode, tsz;
- const uint32_t ch_int[] = { S3C24XX_INT_DMA0, S3C24XX_INT_DMA1, S3C24XX_INT_DMA2, S3C24XX_INT_DMA3};
- verboselog( *this, 5, "DMA %d trigger\n", ch);
- curr_tc = S3C24XX_DSTAT_GET_CURR_TC( regs->dstat);
- dsz = S3C24XX_DCON_GET_DSZ( regs->dcon);
- curr_src = S3C24XX_DCSRC_GET_CURR_SRC( regs->dcsrc);
- curr_dst = S3C24XX_DCDST_GET_CURR_DST( regs->dcdst);
- servmode = S3C24XX_DCON_GET_SERVMODE( regs->dcon);
- tsz = S3C24XX_DCON_GET_TSZ( regs->dcon);
+ static constexpr uint32_t ch_int[] = { S3C24XX_INT_DMA0, S3C24XX_INT_DMA1, S3C24XX_INT_DMA2, S3C24XX_INT_DMA3 };
+ verboselog(*this, 5, "DMA %d trigger\n", ch);
+ curr_tc = S3C24XX_DSTAT_GET_CURR_TC(regs->dstat);
+ dsz = S3C24XX_DCON_GET_DSZ(regs->dcon);
+ curr_src = S3C24XX_DCSRC_GET_CURR_SRC(regs->dcsrc);
+ curr_dst = S3C24XX_DCDST_GET_CURR_DST(regs->dcdst);
+ servmode = S3C24XX_DCON_GET_SERVMODE(regs->dcon);
+ tsz = S3C24XX_DCON_GET_TSZ(regs->dcon);
#if defined(DEVICE_S3C2400)
- inc_src = BIT( regs->disrc, 29);
- inc_dst = BIT( regs->didst, 29);
+ inc_src = BIT(regs->disrc, 29);
+ inc_dst = BIT(regs->didst, 29);
#else
inc_src = BIT( regs->disrcc, 0);
- inc_dst = BIT( regs->didstc, 0);
+ inc_dst = BIT(regs->didstc, 0);
#endif
- verboselog( *this, 5, "DMA %d - curr_src %08X curr_dst %08X curr_tc %d dsz %d\n", ch, curr_src, curr_dst, curr_tc, dsz);
+ verboselog(*this, 5, "DMA %d - curr_src %08X curr_dst %08X curr_tc %d dsz %d\n", ch, curr_src, curr_dst, curr_tc, dsz);
while (curr_tc > 0)
{
curr_tc--;
@@ -1527,21 +1458,21 @@ void S3C24_CLASS_NAME::s3c24xx_dma_trigger(int ch)
{
switch (dsz)
{
- case 0 : space.write_byte( curr_dst, space.read_byte( curr_src)); break;
- case 1 : space.write_word( curr_dst, space.read_word( curr_src)); break;
- case 2 : space.write_dword( curr_dst, space.read_dword( curr_src)); break;
+ case 0: space.write_byte(curr_dst, space.read_byte( curr_src)); break;
+ case 1: space.write_word(curr_dst, space.read_word( curr_src)); break;
+ case 2: space.write_dword(curr_dst, space.read_dword( curr_src)); break;
}
if (inc_src == 0) curr_src += (1 << dsz);
if (inc_dst == 0) curr_dst += (1 << dsz);
}
if (servmode == 0) break;
}
- regs->dcsrc = S3C24XX_DCSRC_SET_CURR_SRC( regs->dcsrc, curr_src);
- regs->dcdst = S3C24XX_DCDST_SET_CURR_DST( regs->dcdst, curr_dst);
- regs->dstat = S3C24XX_DSTAT_SET_CURR_TC( regs->dstat, curr_tc);
+ regs->dcsrc = S3C24XX_DCSRC_SET_CURR_SRC(regs->dcsrc, curr_src);
+ regs->dcdst = S3C24XX_DCDST_SET_CURR_DST(regs->dcdst, curr_dst);
+ regs->dstat = S3C24XX_DSTAT_SET_CURR_TC(regs->dstat, curr_tc);
if (curr_tc == 0)
{
- if (S3C24XX_DCON_GET_RELOAD( regs->dcon) == 0)
+ if (S3C24XX_DCON_GET_RELOAD(regs->dcon) == 0)
{
s3c24xx_dma_reload(ch);
}
@@ -1549,7 +1480,7 @@ void S3C24_CLASS_NAME::s3c24xx_dma_trigger(int ch)
{
regs->dmasktrig &= ~(1 << 1); // clear on/off
}
- if (S3C24XX_DCON_GET_INT( regs->dcon) != 0)
+ if (S3C24XX_DCON_GET_INT(regs->dcon) != 0)
{
s3c24xx_request_irq(ch_int[ch]);
}
@@ -1558,12 +1489,10 @@ void S3C24_CLASS_NAME::s3c24xx_dma_trigger(int ch)
void S3C24_CLASS_NAME::s3c24xx_dma_request_iis()
{
- s3c24xx_dma_regs_t *regs = &m_dma[2].regs;
+ dma_regs_t *regs = &m_dma[2].regs;
verboselog( *this, 5, "s3c24xx_dma_request_iis\n");
- if ((S3C24XX_DMASKTRIG_GET_ON_OFF( regs->dmasktrig) != 0) && (S3C24XX_DCON_GET_SWHWSEL( regs->dcon) != 0) && (S3C24XX_DCON_GET_HWSRCSEL( regs->dcon) == 0))
- {
+ if ((S3C24XX_DMASKTRIG_GET_ON_OFF(regs->dmasktrig) != 0) && (S3C24XX_DCON_GET_SWHWSEL(regs->dcon) != 0) && (S3C24XX_DCON_GET_HWSRCSEL(regs->dcon) == 0))
s3c24xx_dma_trigger(2);
- }
}
void S3C24_CLASS_NAME::s3c24xx_dma_request_pwm()
@@ -1573,8 +1502,8 @@ void S3C24_CLASS_NAME::s3c24xx_dma_request_pwm()
{
if (i != 1)
{
- s3c24xx_dma_regs_t *regs = &m_dma[i].regs;
- if ((S3C24XX_DMASKTRIG_GET_ON_OFF( regs->dmasktrig) != 0) && (S3C24XX_DCON_GET_SWHWSEL( regs->dcon) != 0) && (S3C24XX_DCON_GET_HWSRCSEL( regs->dcon) == 3))
+ dma_regs_t *regs = &m_dma[i].regs;
+ if ((S3C24XX_DMASKTRIG_GET_ON_OFF(regs->dmasktrig) != 0) && (S3C24XX_DCON_GET_SWHWSEL(regs->dcon) != 0) && (S3C24XX_DCON_GET_HWSRCSEL(regs->dcon) == 3))
{
s3c24xx_dma_trigger(i);
}
@@ -1585,51 +1514,45 @@ void S3C24_CLASS_NAME::s3c24xx_dma_request_pwm()
void S3C24_CLASS_NAME::s3c24xx_dma_start(int ch)
{
uint32_t addr_src, addr_dst, tc;
- s3c24xx_dma_regs_t *regs = &m_dma[ch].regs;
+ dma_regs_t *regs = &m_dma[ch].regs;
uint32_t dsz, tsz, reload;
int inc_src, inc_dst, _int, servmode, swhwsel, hwsrcsel;
- verboselog( *this, 1, "DMA %d start\n", ch);
- addr_src = S3C24XX_DISRC_GET_SADDR( regs->disrc);
- addr_dst = S3C24XX_DIDST_GET_DADDR( regs->didst);
- tc = S3C24XX_DCON_GET_TC( regs->dcon);
- _int = S3C24XX_DCON_GET_INT( regs->dcon);
- servmode = S3C24XX_DCON_GET_SERVMODE( regs->dcon);
- hwsrcsel = S3C24XX_DCON_GET_HWSRCSEL( regs->dcon);
- swhwsel = S3C24XX_DCON_GET_SWHWSEL( regs->dcon);
- reload = S3C24XX_DCON_GET_RELOAD( regs->dcon);
- dsz = S3C24XX_DCON_GET_DSZ( regs->dcon);
- tsz = S3C24XX_DCON_GET_TSZ( regs->dcon);
+ verboselog(*this, 1, "DMA %d start\n", ch);
+ addr_src = S3C24XX_DISRC_GET_SADDR(regs->disrc);
+ addr_dst = S3C24XX_DIDST_GET_DADDR(regs->didst);
+ tc = S3C24XX_DCON_GET_TC(regs->dcon);
+ _int = S3C24XX_DCON_GET_INT(regs->dcon);
+ servmode = S3C24XX_DCON_GET_SERVMODE(regs->dcon);
+ hwsrcsel = S3C24XX_DCON_GET_HWSRCSEL(regs->dcon);
+ swhwsel = S3C24XX_DCON_GET_SWHWSEL(regs->dcon);
+ reload = S3C24XX_DCON_GET_RELOAD(regs->dcon);
+ dsz = S3C24XX_DCON_GET_DSZ(regs->dcon);
+ tsz = S3C24XX_DCON_GET_TSZ(regs->dcon);
#if defined(DEVICE_S3C2400)
- inc_src = BIT( regs->disrc, 29);
- inc_dst = BIT( regs->didst, 29);
+ inc_src = BIT(regs->disrc, 29);
+ inc_dst = BIT(regs->didst, 29);
#else
- inc_src = BIT( regs->disrcc, 0);
- inc_dst = BIT( regs->didstc, 0);
+ inc_src = BIT(regs->disrcc, 0);
+ inc_dst = BIT(regs->didstc, 0);
#endif
- verboselog( *this, 5, "DMA %d - addr_src %08X inc_src %d addr_dst %08X inc_dst %d int %d tsz %d servmode %d hwsrcsel %d swhwsel %d reload %d dsz %d tc %d\n", ch, addr_src, inc_src, addr_dst, inc_dst, _int, tsz, servmode, hwsrcsel, swhwsel, reload, dsz, tc);
- verboselog( *this, 5, "DMA %d - copy %08X bytes from %08X (%s) to %08X (%s)\n", ch, (tc << dsz) << (tsz << 1), addr_src, inc_src ? "fix" : "inc", addr_dst, inc_dst ? "fix" : "inc");
+ verboselog(*this, 5, "DMA %d - addr_src %08X inc_src %d addr_dst %08X inc_dst %d int %d tsz %d servmode %d hwsrcsel %d swhwsel %d reload %d dsz %d tc %d\n", ch, addr_src, inc_src, addr_dst, inc_dst, _int, tsz, servmode, hwsrcsel, swhwsel, reload, dsz, tc);
+ verboselog(*this, 5, "DMA %d - copy %08X bytes from %08X (%s) to %08X (%s)\n", ch, (tc << dsz) << (tsz << 1), addr_src, inc_src ? "fix" : "inc", addr_dst, inc_dst ? "fix" : "inc");
s3c24xx_dma_reload(ch);
if (swhwsel == 0)
- {
s3c24xx_dma_trigger(ch);
- }
}
void S3C24_CLASS_NAME::s3c24xx_dma_stop(int ch)
{
- verboselog( *this, 1, "DMA %d stop\n", ch);
+ verboselog(*this, 1, "DMA %d stop\n", ch);
}
void S3C24_CLASS_NAME::s3c24xx_dma_recalc(int ch)
{
if ((m_dma[ch].regs.dmasktrig & (1 << 1)) != 0)
- {
s3c24xx_dma_start(ch);
- }
else
- {
s3c24xx_dma_stop(ch);
- }
}
uint32_t S3C24_CLASS_NAME::s3c24xx_dma_r(uint32_t ch, uint32_t offset)
@@ -1643,24 +1566,18 @@ void S3C24_CLASS_NAME::s3c24xx_dma_w(uint32_t ch, uint32_t offset, uint32_t data
COMBINE_DATA(&((uint32_t*)&m_dma[ch].regs)[offset]);
switch (offset)
{
- case S3C24XX_DCON :
+ case S3C24XX_DCON :
+#if 0 // is this code necessary ???
+ if (BIT(data, 22)) // reload
{
- #if 0 // is this code necessary ???
- if ((data & (1 << 22)) != 0) // reload
- {
- s3c24xx_dma_regs_t *regs = &m_dma[ch].regs;
- regs->dmasktrig &= ~(1 << 1); // clear on/off
- }
- #endif
+ dma_regs_t *regs = &m_dma[ch].regs;
+ regs->dmasktrig &= ~(1 << 1); // clear on/off
}
+#endif
break;
- case S3C24XX_DMASKTRIG :
- {
- if ((old_value & (1 << 1)) != (data & (1 << 1)))
- {
- s3c24xx_dma_recalc(ch);
- }
- }
+ case S3C24XX_DMASKTRIG :
+ if (BIT(data ^ old_value, 1))
+ s3c24xx_dma_recalc(ch);
break;
}
}
@@ -1668,89 +1585,88 @@ void S3C24_CLASS_NAME::s3c24xx_dma_w(uint32_t ch, uint32_t offset, uint32_t data
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_0_r )
{
uint32_t data = s3c24xx_dma_r( 0, offset);
- verboselog( *this, 9, "(DMA 0) %08X -> %08X\n", S3C24XX_BASE_DMA_0 + (offset << 2), data);
+ verboselog(*this, 9, "(DMA 0) %08X -> %08X\n", S3C24XX_BASE_DMA_0 + (offset << 2), data);
return data;
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_1_r )
{
- uint32_t data = s3c24xx_dma_r( 1, offset);
- verboselog( *this, 9, "(DMA 1) %08X -> %08X\n", S3C24XX_BASE_DMA_1 + (offset << 2), data);
+ uint32_t data = s3c24xx_dma_r(1, offset);
+ verboselog(*this, 9, "(DMA 1) %08X -> %08X\n", S3C24XX_BASE_DMA_1 + (offset << 2), data);
return data;
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_2_r )
{
uint32_t data = s3c24xx_dma_r( 2, offset);
- verboselog( *this, 9, "(DMA 2) %08X -> %08X\n", S3C24XX_BASE_DMA_2 + (offset << 2), data);
+ verboselog(*this, 9, "(DMA 2) %08X -> %08X\n", S3C24XX_BASE_DMA_2 + (offset << 2), data);
return data;
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_3_r )
{
uint32_t data = s3c24xx_dma_r( 3, offset);
- verboselog( *this, 9, "(DMA 3) %08X -> %08X\n", S3C24XX_BASE_DMA_3 + (offset << 2), data);
+ verboselog(*this, 9, "(DMA 3) %08X -> %08X\n", S3C24XX_BASE_DMA_3 + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_0_w )
{
- verboselog( *this, 9, "(DMA 0) %08X <- %08X\n", S3C24XX_BASE_DMA_0 + (offset << 2), data);
- s3c24xx_dma_w( 0, offset, data, mem_mask);
+ verboselog(*this, 9, "(DMA 0) %08X <- %08X\n", S3C24XX_BASE_DMA_0 + (offset << 2), data);
+ s3c24xx_dma_w(0, offset, data, mem_mask);
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_1_w )
{
- verboselog( *this, 9, "(DMA 1) %08X <- %08X\n", S3C24XX_BASE_DMA_1 + (offset << 2), data);
- s3c24xx_dma_w( 1, offset, data, mem_mask);
+ verboselog(*this, 9, "(DMA 1) %08X <- %08X\n", S3C24XX_BASE_DMA_1 + (offset << 2), data);
+ s3c24xx_dma_w(1, offset, data, mem_mask);
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_2_w )
{
- verboselog( *this, 9, "(DMA 2) %08X <- %08X\n", S3C24XX_BASE_DMA_2 + (offset << 2), data);
- s3c24xx_dma_w( 2, offset, data, mem_mask);
+ verboselog(*this, 9, "(DMA 2) %08X <- %08X\n", S3C24XX_BASE_DMA_2 + (offset << 2), data);
+ s3c24xx_dma_w(2, offset, data, mem_mask);
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_3_w )
{
- verboselog( *this, 9, "(DMA 3) %08X <- %08X\n", S3C24XX_BASE_DMA_3 + (offset << 2), data);
- s3c24xx_dma_w( 3, offset, data, mem_mask);
+ verboselog(*this, 9, "(DMA 3) %08X <- %08X\n", S3C24XX_BASE_DMA_3 + (offset << 2), data);
+ s3c24xx_dma_w(3, offset, data, mem_mask);
}
TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_dma_timer_exp )
{
int ch = param;
- verboselog( *this, 2, "DMA %d timer callback\n", ch);
+ verboselog(*this, 2, "DMA %d timer callback\n", ch);
}
/* I/O Port */
void S3C24_CLASS_NAME::s3c24xx_gpio_reset()
{
- s3c24xx_gpio_t *gpio = &m_gpio;
- memset( &gpio->regs, 0, sizeof( gpio->regs));
- #if defined(DEVICE_S3C2400)
- gpio->regs.gpacon = 0x0003FFFF;
- gpio->regs.gpbcon = 0xAAAAAAAA;
- gpio->regs.gpdup = 0x0620;
- gpio->regs.gpeup = 0x0003;
- #elif defined(DEVICE_S3C2410)
- gpio->regs.gpacon = 0x007FFFFF;
- gpio->regs.gpgup = 0xF800;
- gpio->regs.misccr = 0x00010330;
- gpio->regs.eintmask = 0x00FFFFF0;
- gpio->regs.gstatus1 = 0x32410002;
- #elif defined(DEVICE_S3C2440)
- gpio->regs.gpacon = 0x00FFFFFF;
- gpio->regs.gpgup = 0xFC00;
- gpio->regs.misccr = 0x00010020;
- gpio->regs.eintmask = 0x000FFFFF;
- gpio->regs.gstatus1 = 0x32440001;
- #endif
- gpio->regs.gpdup = 0xF000;
- #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- gpio->regs.gstatus2 = 1 << 0; // Boot is caused by power on reset
- #endif
+ memset(&m_gpio.regs, 0, sizeof(m_gpio.regs));
+#if defined(DEVICE_S3C2400)
+ m_gpio.regs.gpacon = 0x0003FFFF;
+ m_gpio.regs.gpbcon = 0xAAAAAAAA;
+ m_gpio.regs.gpdup = 0x0620;
+ m_gpio.regs.gpeup = 0x0003;
+#elif defined(DEVICE_S3C2410)
+ m_gpio.regs.gpacon = 0x007FFFFF;
+ m_gpio.regs.gpgup = 0xF800;
+ m_gpio.regs.misccr = 0x00010330;
+ m_gpio.regs.eintmask = 0x00FFFFF0;
+ m_gpio.regs.gstatus1 = 0x32410002;
+#elif defined(DEVICE_S3C2440)
+ m_gpio.regs.gpacon = 0x00FFFFFF;
+ m_gpio.regs.gpgup = 0xFC00;
+ m_gpio.regs.misccr = 0x00010020;
+ m_gpio.regs.eintmask = 0x000FFFFF;
+ m_gpio.regs.gstatus1 = 0x32440001;
+#endif
+ m_gpio.regs.gpdup = 0xF000;
+#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+ m_gpio.regs.gstatus2 = 1 << 0; // Boot is caused by power on reset
+#endif
}
uint32_t S3C24_CLASS_NAME::iface_gpio_port_r(int port, uint32_t mask)
@@ -1782,146 +1698,100 @@ uint16_t S3C24_CLASS_NAME::s3c24xx_gpio_get_mask( uint32_t con, int val)
for (int i = 0; i < 16; i++)
{
if (((con >> (i << 1)) & 3) == val)
- {
mask = mask | (1 << i);
- }
}
return mask;
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_gpio_r )
{
- s3c24xx_gpio_t *gpio = &m_gpio;
uint32_t data = ((uint32_t*)&m_gpio.regs)[offset];
switch (offset)
{
- case S3C24XX_GPADAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_A, 0) & S3C24XX_GPADAT_MASK;
- }
+ case S3C24XX_GPADAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_A, 0) & S3C24XX_GPADAT_MASK;
break;
- case S3C24XX_GPBDAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_B, s3c24xx_gpio_get_mask( gpio->regs.gpbcon, 0) & S3C24XX_GPBDAT_MASK) & S3C24XX_GPBDAT_MASK;
- }
+ case S3C24XX_GPBDAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_B, s3c24xx_gpio_get_mask(m_gpio.regs.gpbcon, 0) & S3C24XX_GPBDAT_MASK) & S3C24XX_GPBDAT_MASK;
break;
- case S3C24XX_GPCDAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_C, s3c24xx_gpio_get_mask( gpio->regs.gpccon, 0) & S3C24XX_GPCDAT_MASK) & S3C24XX_GPCDAT_MASK;
- }
+ case S3C24XX_GPCDAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_C, s3c24xx_gpio_get_mask(m_gpio.regs.gpccon, 0) & S3C24XX_GPCDAT_MASK) & S3C24XX_GPCDAT_MASK;
break;
- case S3C24XX_GPDDAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_D, s3c24xx_gpio_get_mask( gpio->regs.gpdcon, 0) & S3C24XX_GPDDAT_MASK) & S3C24XX_GPDDAT_MASK;
- }
+ case S3C24XX_GPDDAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_D, s3c24xx_gpio_get_mask(m_gpio.regs.gpdcon, 0) & S3C24XX_GPDDAT_MASK) & S3C24XX_GPDDAT_MASK;
break;
- case S3C24XX_GPEDAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_E, s3c24xx_gpio_get_mask( gpio->regs.gpecon, 0) & S3C24XX_GPEDAT_MASK) & S3C24XX_GPEDAT_MASK;
- }
+ case S3C24XX_GPEDAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_E, s3c24xx_gpio_get_mask(m_gpio.regs.gpecon, 0) & S3C24XX_GPEDAT_MASK) & S3C24XX_GPEDAT_MASK;
break;
- case S3C24XX_GPFDAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_F, s3c24xx_gpio_get_mask( gpio->regs.gpfcon, 0) & S3C24XX_GPFDAT_MASK) & S3C24XX_GPFDAT_MASK;
- }
+ case S3C24XX_GPFDAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_F, s3c24xx_gpio_get_mask(m_gpio.regs.gpfcon, 0) & S3C24XX_GPFDAT_MASK) & S3C24XX_GPFDAT_MASK;
break;
- case S3C24XX_GPGDAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_G, s3c24xx_gpio_get_mask( gpio->regs.gpgcon, 0) & S3C24XX_GPGDAT_MASK) & S3C24XX_GPGDAT_MASK;
- }
+ case S3C24XX_GPGDAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_G, s3c24xx_gpio_get_mask(m_gpio.regs.gpgcon, 0) & S3C24XX_GPGDAT_MASK) & S3C24XX_GPGDAT_MASK;
break;
#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- case S3C24XX_GPHDAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_H, s3c24xx_gpio_get_mask( gpio->regs.gphcon, 0) & S3C24XX_GPHDAT_MASK) & S3C24XX_GPHDAT_MASK;
- }
+ case S3C24XX_GPHDAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_H, s3c24xx_gpio_get_mask(m_gpio.regs.gphcon, 0) & S3C24XX_GPHDAT_MASK) & S3C24XX_GPHDAT_MASK;
break;
#endif
#if defined(DEVICE_S3C2440)
- case S3C24XX_GPJDAT :
- {
- data = iface_gpio_port_r( S3C24XX_GPIO_PORT_J, s3c24xx_gpio_get_mask( gpio->regs.gpjcon, 0) & S3C24XX_GPJDAT_MASK) & S3C24XX_GPJDAT_MASK;
- }
+ case S3C24XX_GPJDAT :
+ data = iface_gpio_port_r( S3C24XX_GPIO_PORT_J, s3c24xx_gpio_get_mask(m_gpio.regs.gpjcon, 0) & S3C24XX_GPJDAT_MASK) & S3C24XX_GPJDAT_MASK;
break;
#endif
}
- verboselog( *this, 9, "(GPIO) %08X -> %08X\n", S3C24XX_BASE_GPIO + (offset << 2), data);
+ verboselog(*this, 9, "(GPIO) %08X -> %08X\n", S3C24XX_BASE_GPIO + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_gpio_w )
{
- s3c24xx_gpio_t *gpio = &m_gpio;
#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
uint32_t old_value = ((uint32_t*)&m_gpio.regs)[offset];
#endif
- verboselog( *this, 9, "(GPIO) %08X <- %08X\n", S3C24XX_BASE_GPIO + (offset << 2), data);
+ verboselog(*this, 9, "(GPIO) %08X <- %08X\n", S3C24XX_BASE_GPIO + (offset << 2), data);
COMBINE_DATA(&((uint32_t*)&m_gpio.regs)[offset]);
switch (offset)
{
- case S3C24XX_GPADAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_A, gpio->regs.gpacon ^ 0xFFFFFFFF, data & S3C24XX_GPADAT_MASK);
- }
+ case S3C24XX_GPADAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_A, m_gpio.regs.gpacon ^ 0xFFFFFFFF, data & S3C24XX_GPADAT_MASK);
break;
- case S3C24XX_GPBDAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_B, s3c24xx_gpio_get_mask( gpio->regs.gpbcon, 1) & S3C24XX_GPBDAT_MASK, data & S3C24XX_GPBDAT_MASK);
- }
+ case S3C24XX_GPBDAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_B, s3c24xx_gpio_get_mask(m_gpio.regs.gpbcon, 1) & S3C24XX_GPBDAT_MASK, data & S3C24XX_GPBDAT_MASK);
break;
- case S3C24XX_GPCDAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_C, s3c24xx_gpio_get_mask( gpio->regs.gpccon, 1) & S3C24XX_GPCDAT_MASK, data & S3C24XX_GPCDAT_MASK);
- }
+ case S3C24XX_GPCDAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_C, s3c24xx_gpio_get_mask(m_gpio.regs.gpccon, 1) & S3C24XX_GPCDAT_MASK, data & S3C24XX_GPCDAT_MASK);
break;
- case S3C24XX_GPDDAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_D, s3c24xx_gpio_get_mask( gpio->regs.gpdcon, 1) & S3C24XX_GPDDAT_MASK, data & S3C24XX_GPDDAT_MASK);
- }
+ case S3C24XX_GPDDAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_D, s3c24xx_gpio_get_mask(m_gpio.regs.gpdcon, 1) & S3C24XX_GPDDAT_MASK, data & S3C24XX_GPDDAT_MASK);
break;
- case S3C24XX_GPEDAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_E, s3c24xx_gpio_get_mask( gpio->regs.gpecon, 1) & S3C24XX_GPEDAT_MASK, data & S3C24XX_GPEDAT_MASK);
- }
+ case S3C24XX_GPEDAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_E, s3c24xx_gpio_get_mask(m_gpio.regs.gpecon, 1) & S3C24XX_GPEDAT_MASK, data & S3C24XX_GPEDAT_MASK);
break;
- case S3C24XX_GPFDAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_F, s3c24xx_gpio_get_mask( gpio->regs.gpfcon, 1) & S3C24XX_GPFDAT_MASK, data & S3C24XX_GPFDAT_MASK);
- }
+ case S3C24XX_GPFDAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_F, s3c24xx_gpio_get_mask(m_gpio.regs.gpfcon, 1) & S3C24XX_GPFDAT_MASK, data & S3C24XX_GPFDAT_MASK);
break;
- case S3C24XX_GPGDAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_G, s3c24xx_gpio_get_mask( gpio->regs.gpgcon, 1) & S3C24XX_GPGDAT_MASK, data & S3C24XX_GPGDAT_MASK);
- }
+ case S3C24XX_GPGDAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_G, s3c24xx_gpio_get_mask(m_gpio.regs.gpgcon, 1) & S3C24XX_GPGDAT_MASK, data & S3C24XX_GPGDAT_MASK);
break;
#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- case S3C24XX_GPHDAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_H, s3c24xx_gpio_get_mask( gpio->regs.gphcon, 1) & S3C24XX_GPHDAT_MASK, data & S3C24XX_GPHDAT_MASK);
- }
+ case S3C24XX_GPHDAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_H, s3c24xx_gpio_get_mask(m_gpio.regs.gphcon, 1) & S3C24XX_GPHDAT_MASK, data & S3C24XX_GPHDAT_MASK);
break;
- case S3C24XX_EINTPEND :
- {
- m_gpio.regs.eintpend = (old_value & ~data);
- s3c24xx_check_pending_eint();
- }
+ case S3C24XX_EINTPEND:
+ m_gpio.regs.eintpend = (old_value & ~data);
+ s3c24xx_check_pending_eint();
break;
- case S3C24XX_EINTMASK :
- {
- s3c24xx_check_pending_eint();
- }
+ case S3C24XX_EINTMASK:
+ s3c24xx_check_pending_eint();
break;
- case S3C24XX_GSTATUS2 :
- {
- m_gpio.regs.gstatus2 = (old_value & ~data) & 7; // "The setting is cleared by writing '1' to this bit"
- }
+ case S3C24XX_GSTATUS2:
+ m_gpio.regs.gstatus2 = (old_value & ~data) & 7; // "The setting is cleared by writing '1' to this bit"
break;
#endif
#if defined(DEVICE_S3C2440)
- case S3C24XX_GPJDAT :
- {
- iface_gpio_port_w( S3C24XX_GPIO_PORT_J, s3c24xx_gpio_get_mask( gpio->regs.gpjcon, 1) & S3C24XX_GPJDAT_MASK, data & S3C24XX_GPJDAT_MASK);
- }
+ case S3C24XX_GPJDAT:
+ iface_gpio_port_w(S3C24XX_GPIO_PORT_J, s3c24xx_gpio_get_mask(m_gpio.regs.gpjcon, 1) & S3C24XX_GPJDAT_MASK, data & S3C24XX_GPJDAT_MASK);
break;
#endif
}
@@ -1929,43 +1799,22 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_gpio_w )
/* Memory Controller */
-void S3C24_CLASS_NAME::s3c24xx_memcon_reset()
-{
- s3c24xx_memcon_t *memcon = &m_memcon;
- memset( &memcon->regs, 0, sizeof( memcon->regs));
- memcon->regs.data[0x04/4] = 0x00000700;
- memcon->regs.data[0x08/4] = 0x00000700;
- memcon->regs.data[0x0C/4] = 0x00000700;
- memcon->regs.data[0x10/4] = 0x00000700;
- memcon->regs.data[0x14/4] = 0x00000700;
- memcon->regs.data[0x18/4] = 0x00000700;
- memcon->regs.data[0x1C/4] = 0x00018008;
- memcon->regs.data[0x20/4] = 0x00018008;
- memcon->regs.data[0x24/4] = 0x00AC0000;
-}
-
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_memcon_r )
{
assert(offset < ARRAY_LENGTH(m_memcon.regs.data));
uint32_t data = m_memcon.regs.data[offset];
- verboselog( *this, 9, "(MEMCON) %08X -> %08X\n", S3C24XX_BASE_MEMCON + (offset << 2), data);
+ verboselog(*this, 9, "(MEMCON) %08X -> %08X\n", S3C24XX_BASE_MEMCON + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_memcon_w )
{
- verboselog( *this, 9, "(MEMCON) %08X <- %08X\n", S3C24XX_BASE_MEMCON + (offset << 2), data);
+ verboselog(*this, 9, "(MEMCON) %08X <- %08X\n", S3C24XX_BASE_MEMCON + (offset << 2), data);
COMBINE_DATA(&m_memcon.regs.data[offset]);
}
/* USB Host Controller */
-void S3C24_CLASS_NAME::s3c24xx_usb_host_reset()
-{
- s3c24xx_usbhost_t *usbhost = &m_usbhost;
- memset( &usbhost->regs, 0, sizeof( usbhost->regs));
-}
-
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_host_r )
{
uint32_t data = m_usbhost.regs.data[offset];
@@ -1999,42 +1848,32 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_host_r )
}
break;
}
- verboselog( *this, 9, "(USB H) %08X -> %08X\n", S3C24XX_BASE_USBHOST + (offset << 2), data);
+ verboselog(*this, 9, "(USB H) %08X -> %08X\n", S3C24XX_BASE_USBHOST + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_host_w )
{
- verboselog( *this, 9, "(USB H) %08X <- %08X\n", S3C24XX_BASE_USBHOST + (offset << 2), data);
+ verboselog(*this, 9, "(USB H) %08X <- %08X\n", S3C24XX_BASE_USBHOST + (offset << 2), data);
COMBINE_DATA(&m_usbhost.regs.data[offset]);
}
/* UART */
-void S3C24_CLASS_NAME::s3c24xx_uart_reset()
-{
- for (auto & elem : m_uart)
- {
- s3c24xx_uart_t *uart = &elem;
- memset( &uart->regs, 0, sizeof( uart->regs));
- uart->regs.utrstat = 6;
- }
-}
-
uint32_t S3C24_CLASS_NAME::s3c24xx_uart_r(uint32_t ch, uint32_t offset)
{
uint32_t data = ((uint32_t*)&m_uart[ch].regs)[offset];
switch (offset)
{
- case S3C24XX_UTRSTAT :
+ case uart_t::UTRSTAT:
{
data = (data & ~0x00000006) | 0x00000004 | 0x00000002; // [bit 2] Transmitter empty / [bit 1] Transmit buffer empty
}
break;
- case S3C24XX_URXH :
+ case uart_t::URXH:
{
uint8_t rxdata = data & 0xFF;
- verboselog( *this, 5, "UART %d read %02X (%c)\n", ch, rxdata, ((rxdata >= 32) && (rxdata < 128)) ? (char)rxdata : '?');
+ verboselog(*this, 5, "UART %d read %02X (%c)\n", ch, rxdata, ((rxdata >= 32) && (rxdata < 128)) ? (char)rxdata : '?');
m_uart[ch].regs.utrstat &= ~1; // [bit 0] Receive buffer data ready
}
break;
@@ -2047,17 +1886,17 @@ void S3C24_CLASS_NAME::s3c24xx_uart_w(uint32_t ch, uint32_t offset, uint32_t dat
COMBINE_DATA(&((uint32_t*)&m_uart[ch].regs)[offset]);
switch (offset)
{
- case S3C24XX_UFCON :
+ case uart_t::UFCON :
{
m_uart[ch].regs.ufcon &= ~((1 << 2) | (1 << 1)); // bits 1 and 2 are auto-cleared after resetting FIFO
}
break;
- case S3C24XX_UTXH :
+ case uart_t::UTXH :
{
uint8_t txdata = data & 0xFF;
verboselog( *this, 5, "UART %d write %02X (%c)\n", ch, txdata, ((txdata >= 32) && (txdata < 128)) ? (char)txdata : '?');
#ifdef UART_PRINTF
- printf( "%c", ((txdata >= 32) && (txdata < 128)) ? (char)txdata : '?');
+ printf("%c", ((txdata >= 32) && (txdata < 128)) ? (char)txdata : '?');
#endif
}
break;
@@ -2066,14 +1905,14 @@ void S3C24_CLASS_NAME::s3c24xx_uart_w(uint32_t ch, uint32_t offset, uint32_t dat
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_0_r )
{
- uint32_t data = s3c24xx_uart_r( 0, offset);
+ uint32_t data = s3c24xx_uart_r(0, offset);
// verboselog( *this, 9, "(UART 0) %08X -> %08X\n", S3C24XX_BASE_UART_0 + (offset << 2), data);
return data;
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_1_r )
{
- uint32_t data = s3c24xx_uart_r( 1, offset);
+ uint32_t data = s3c24xx_uart_r(1, offset);
// verboselog( *this, 9, "(UART 1) %08X -> %08X\n", S3C24XX_BASE_UART_1 + (offset << 2), data);
return data;
}
@@ -2082,7 +1921,7 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_1_r )
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_2_r )
{
- uint32_t data = s3c24xx_uart_r( 2, offset);
+ uint32_t data = s3c24xx_uart_r(2, offset);
// verboselog( *this, 9, "(UART 2) %08X -> %08X\n", S3C24XX_BASE_UART_2 + (offset << 2), data);
return data;
}
@@ -2092,13 +1931,13 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_2_r )
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_0_w )
{
// verboselog( *this, 9, "(UART 0) %08X <- %08X\n", S3C24XX_BASE_UART_0 + (offset << 2), data);
- s3c24xx_uart_w( 0, offset, data, mem_mask);
+ s3c24xx_uart_w(0, offset, data, mem_mask);
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_1_w )
{
// verboselog( *this, 9, "(UART 1) %08X <- %08X\n", S3C24XX_BASE_UART_1 + (offset << 2), data);
- s3c24xx_uart_w( 1, offset, data, mem_mask);
+ s3c24xx_uart_w(1, offset, data, mem_mask);
}
#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
@@ -2106,7 +1945,7 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_1_w )
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_uart_2_w )
{
// verboselog( *this, 9, "(UART 2) %08X <- %08X\n", S3C24XX_BASE_UART_2 + (offset << 2), data);
- s3c24xx_uart_w( 2, offset, data, mem_mask);
+ s3c24xx_uart_w(2, offset, data, mem_mask);
}
#endif
@@ -2122,91 +1961,57 @@ void S3C24_CLASS_NAME::s3c24xx_uart_fifo_w(int uart, uint8_t data)
void S3C24_CLASS_NAME::s3c24xx_usb_device_reset()
{
- s3c24xx_usbdev_t *usbdev = &m_usbdev;
- memset( &usbdev->regs, 0, sizeof( usbdev->regs));
- #if defined(DEVICE_S3C2400)
- usbdev->regs.data[0x0C/4] = 0x033F;
- usbdev->regs.data[0x14/4] = 0x000A;
- usbdev->regs.data[0x24/4] = 0x0001;
- usbdev->regs.data[0x44/4] = 0x0001;
- usbdev->regs.data[0x54/4] = 0x0001;
- usbdev->regs.data[0x64/4] = 0x0001;
- usbdev->regs.data[0x74/4] = 0x0001;
- usbdev->regs.data[0xB8/4] = 0x00FF;
- #elif defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- usbdev->regs.data[0x1C/4] = 0xFF;
- usbdev->regs.data[0x2C/4] = 0x04;
- usbdev->regs.data[0x40/4] = 0x01;
- usbdev->regs.data[0x48/4] = 0x20;
- #endif
+ memset(&m_usbdev.regs, 0, sizeof(m_usbdev.regs));
+#if defined(DEVICE_S3C2400)
+ m_usbdev.regs.data[0x0C/4] = 0x033F;
+ m_usbdev.regs.data[0x14/4] = 0x000A;
+ m_usbdev.regs.data[0x24/4] = 0x0001;
+ m_usbdev.regs.data[0x44/4] = 0x0001;
+ m_usbdev.regs.data[0x54/4] = 0x0001;
+ m_usbdev.regs.data[0x64/4] = 0x0001;
+ m_usbdev.regs.data[0x74/4] = 0x0001;
+ m_usbdev.regs.data[0xB8/4] = 0x00FF;
+#elif defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+ m_usbdev.regs.data[0x1C/4] = 0xFF;
+ m_usbdev.regs.data[0x2C/4] = 0x04;
+ m_usbdev.regs.data[0x40/4] = 0x01;
+ m_usbdev.regs.data[0x48/4] = 0x20;
+#endif
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_device_r )
{
uint32_t data = m_usbdev.regs.data[offset];
- verboselog( *this, 9, "(USB D) %08X -> %08X\n", S3C24XX_BASE_USBDEV + (offset << 2), data);
+ verboselog(*this, 9, "(USB D) %08X -> %08X\n", S3C24XX_BASE_USBDEV + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_usb_device_w )
{
- verboselog( *this, 9, "(USB D) %08X <- %08X\n", S3C24XX_BASE_USBDEV + (offset << 2), data);
+ verboselog(*this, 9, "(USB D) %08X <- %08X\n", S3C24XX_BASE_USBDEV + (offset << 2), data);
COMBINE_DATA(&m_usbdev.regs.data[offset]);
}
/* Watchdog Timer */
-void S3C24_CLASS_NAME::s3c24xx_wdt_reset()
-{
- s3c24xx_wdt_t *wdt = &m_wdt;
- memset( &wdt->regs, 0, sizeof( wdt->regs));
- wdt->regs.wtcon = 0x8021;
- wdt->regs.wtdat = 0x8000;
- wdt->regs.wtcnt = 0x8000;
- wdt->timer->adjust( attotime::never);
-}
-
-#if defined(DEVICE_S3C2410)
-
-uint16_t S3C24_CLASS_NAME::s3c24xx_wdt_calc_current_count()
-{
- double timeleft, x1, x2;
- uint32_t cnt;
- timeleft = m_wdt.timer->remaining( ).as_double();
-// printf( "timeleft %f freq %d cnt %d\n", timeleft, m_wdt.freq, m_wdt.cnt);
- x1 = 1 / ((double)m_wdt.freq / m_wdt.cnt);
- x2 = x1 / timeleft;
-// printf( "x1 %f\n", x1);
- cnt = m_wdt.cnt / x2;
-// printf( "cnt %d\n", cnt);
- return cnt;
-}
-
-#else
-
-uint16_t S3C24_CLASS_NAME::s3c24xx_wdt_calc_current_count()
-{
- return 0;
-}
-
-#endif
-
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_wdt_r )
{
uint32_t data = ((uint32_t*)&m_wdt.regs)[offset];
switch (offset)
{
- case S3C24XX_WTCNT :
+ case wdt_t::WTCNT:
+ // is wdt active?
+ if (BIT(m_wdt.regs.wtcon, 5))
{
- // is wdt active?
- if ((m_wdt.regs.wtcon & (1 << 5)) != 0)
- {
- data = s3c24xx_wdt_calc_current_count();
- }
+#if defined(DEVICE_S3C2410)
+ data = m_wdt.calc_current_count();
+#else
+ data = 0;
+#endif
}
break;
}
- verboselog( *this, 9, "(WDT) %08X -> %08X\n", S3C24XX_BASE_WDT + (offset << 2), data);
+ verboselog(*this, 9, "(WDT) %08X -> %08X\n", S3C24XX_BASE_WDT + (offset << 2), data);
return data;
}
@@ -2214,13 +2019,13 @@ void S3C24_CLASS_NAME::s3c24xx_wdt_start()
{
uint32_t pclk, prescaler, clock;
double freq, hz;
- verboselog( *this, 1, "WDT start\n");
+ verboselog(*this, 1, "WDT start\n");
pclk = s3c24xx_get_pclk();
- prescaler = BITS( m_wdt.regs.wtcon, 15, 8);
- clock = 16 << BITS( m_wdt.regs.wtcon, 4, 3);
+ prescaler = BITS(m_wdt.regs.wtcon, 15, 8);
+ clock = 16 << BITS(m_wdt.regs.wtcon, 4, 3);
freq = (double)pclk / (prescaler + 1) / clock;
hz = freq / m_wdt.regs.wtcnt;
- verboselog( *this, 5, "WDT pclk %d prescaler %d clock %d freq %f hz %f\n", pclk, prescaler, clock, freq, hz);
+ verboselog(*this, 5, "WDT pclk %d prescaler %d clock %d freq %f hz %f\n", pclk, prescaler, clock, freq, hz);
m_wdt.timer->adjust( attotime::from_hz( hz), 0, attotime::from_hz( hz));
#if defined(DEVICE_S3C2410)
m_wdt.freq = freq;
@@ -2231,20 +2036,20 @@ void S3C24_CLASS_NAME::s3c24xx_wdt_start()
void S3C24_CLASS_NAME::s3c24xx_wdt_stop()
{
verboselog( *this, 1, "WDT stop\n");
- m_wdt.regs.wtcnt = s3c24xx_wdt_calc_current_count();
- m_wdt.timer->adjust( attotime::never);
+#if defined(DEVICE_S3C2410)
+ m_wdt.regs.wtcnt = m_wdt.calc_current_count();
+#else
+ m_wdt.regs.wtcnt = 0;
+#endif
+ m_wdt.timer->adjust(attotime::never);
}
void S3C24_CLASS_NAME::s3c24xx_wdt_recalc()
{
- if ((m_wdt.regs.wtcon & (1 << 5)) != 0)
- {
+ if (BIT(m_wdt.regs.wtcon, 5))
s3c24xx_wdt_start();
- }
else
- {
s3c24xx_wdt_stop();
- }
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_wdt_w )
@@ -2254,13 +2059,9 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_wdt_w )
COMBINE_DATA(&((uint32_t*)&m_wdt.regs)[offset]);
switch (offset)
{
- case S3C24XX_WTCON :
- {
- if ((data & (1 << 5)) != (old_value & (1 << 5)))
- {
- s3c24xx_wdt_recalc();
- }
- }
+ case wdt_t::WTCON :
+ if (BIT(data ^ old_value, 5))
+ s3c24xx_wdt_recalc();
break;
}
}
@@ -2268,20 +2069,20 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_wdt_w )
TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_wdt_timer_exp )
{
verboselog( *this, 2, "WDT timer callback\n");
- if ((m_wdt.regs.wtcon & (1 << 2)) != 0)
+ if (BIT(m_wdt.regs.wtcon, 2))
{
#if defined(DEVICE_S3C2400) || defined(DEVICE_S3C2410)
- s3c24xx_request_irq( S3C24XX_INT_WDT);
+ s3c24xx_request_irq(S3C24XX_INT_WDT);
#else
- s3c24xx_request_subirq( S3C24XX_SUBINT_WDT);
+ s3c24xx_request_subirq(S3C24XX_SUBINT_WDT);
#endif
}
- if ((m_wdt.regs.wtcon & (1 << 0)) != 0)
+ if (BIT(m_wdt.regs.wtcon, 0))
{
s3c24xx_reset();
- #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
m_gpio.regs.gstatus2 = 1 << 2; // Watchdog reset
- #endif
+#endif
}
}
@@ -2289,129 +2090,122 @@ TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_wdt_timer_exp )
void S3C24_CLASS_NAME::s3c24xx_iic_reset()
{
- s3c24xx_iic_t *iic = &m_iic;
- memset( &iic->regs, 0, sizeof( iic->regs));
- iic->count = 0;
- iic->timer->adjust( attotime::never);
+ memset(&m_iic.regs, 0, sizeof(m_iic.regs));
+ m_iic.count = 0;
+ m_iic.timer->adjust(attotime::never);
}
void S3C24_CLASS_NAME::iface_i2c_scl_w( int state)
{
if (!m_scl_w_cb.isnull())
- {
- (m_scl_w_cb)( state);
- }
+ m_scl_w_cb(state);
}
void S3C24_CLASS_NAME::iface_i2c_sda_w(int state)
{
if (!m_sda_w_cb.isnull())
- {
- (m_sda_w_cb)(state);
- }
+ m_sda_w_cb(state);
}
int S3C24_CLASS_NAME::iface_i2c_sda_r()
{
if (!m_sda_r_cb.isnull())
- {
- return (m_sda_r_cb)();
- }
+ return m_sda_r_cb();
else
- {
- return 0;
- }
+ return 1;
}
void S3C24_CLASS_NAME::i2c_send_start()
{
- verboselog( *this, 5, "i2c_send_start\n");
- iface_i2c_sda_w( 1);
- iface_i2c_scl_w( 1);
- iface_i2c_sda_w( 0);
- iface_i2c_scl_w( 0);
+ // FIXME: this needs to sense busy condition and use realistic timing
+ verboselog(*this, 5, "i2c_send_start\n");
+ iface_i2c_sda_w(1);
+ iface_i2c_scl_w(1);
+ iface_i2c_sda_w(0);
+ iface_i2c_scl_w(0);
}
void S3C24_CLASS_NAME::i2c_send_stop()
{
- verboselog( *this, 5, "i2c_send_stop\n");
- iface_i2c_sda_w( 0);
- iface_i2c_scl_w( 1);
- iface_i2c_sda_w( 1);
- iface_i2c_scl_w( 0);
+ // FIXME: this needs realistic timing
+ verboselog(*this, 5, "i2c_send_stop\n");
+ iface_i2c_sda_w(0);
+ iface_i2c_scl_w(1);
+ iface_i2c_sda_w(1);
+ iface_i2c_scl_w(0);
}
uint8_t S3C24_CLASS_NAME::i2c_receive_byte(int ack)
{
uint8_t data = 0;
- verboselog( *this, 5, "i2c_receive_byte ...\n");
- iface_i2c_sda_w( 1);
+ verboselog(*this, 5, "i2c_receive_byte ...\n");
+ iface_i2c_sda_w(1);
for (int i = 0; i < 8; i++)
{
iface_i2c_scl_w( 1);
data = (data << 1) + (iface_i2c_sda_r() ? 1 : 0);
iface_i2c_scl_w( 0);
}
- verboselog( *this, 5, "recv data %02X\n", data);
- verboselog( *this, 5, "send ack %d\n", ack);
- iface_i2c_sda_w( ack ? 0 : 1);
- iface_i2c_scl_w( 1);
- iface_i2c_scl_w( 0);
+ verboselog(*this, 5, "recv data %02X\n", data);
+ verboselog(*this, 5, "send ack %d\n", ack);
+ iface_i2c_sda_w(ack ? 0 : 1);
+ iface_i2c_scl_w(1);
+ iface_i2c_scl_w(0);
return data;
}
int S3C24_CLASS_NAME::i2c_send_byte(uint8_t data)
{
int ack;
- verboselog( *this, 5, "i2c_send_byte ...\n");
- verboselog( *this, 5, "send data %02X\n", data);
+ verboselog(*this, 5, "i2c_send_byte ...\n");
+ verboselog(*this, 5, "send data %02X\n", data);
for (int i = 0; i < 8; i++)
{
- iface_i2c_sda_w( (data & 0x80) ? 1 : 0);
+ iface_i2c_sda_w((data & 0x80) ? 1 : 0);
data = data << 1;
- iface_i2c_scl_w( 1);
- iface_i2c_scl_w( 0);
+ iface_i2c_scl_w(1);
+ iface_i2c_scl_w(0);
}
- iface_i2c_sda_w( 1); // ack bit
- iface_i2c_scl_w( 1);
+ iface_i2c_sda_w(1); // ack bit
+ iface_i2c_scl_w(1);
ack = iface_i2c_sda_r();
- verboselog( *this, 5, "recv ack %d\n", ack);
- iface_i2c_scl_w( 0);
+ verboselog(*this, 5, "recv ack %d\n", ack);
+ iface_i2c_scl_w(0);
return ack;
}
void S3C24_CLASS_NAME::iic_start()
{
int mode_selection;
- verboselog( *this, 1, "IIC start\n");
+ verboselog(*this, 1, "IIC start\n");
i2c_send_start();
mode_selection = BITS( m_iic.regs.iicstat, 7, 6);
switch (mode_selection)
{
- case 2 : i2c_send_byte( m_iic.regs.iicds | 0x01); break;
- case 3 : i2c_send_byte( m_iic.regs.iicds & 0xFE); break;
+ case 2: i2c_send_byte( m_iic.regs.iicds | 0x01); break;
+ case 3: i2c_send_byte( m_iic.regs.iicds & 0xFE); break;
}
m_iic.timer->adjust( attotime::from_usec( 1));
}
void S3C24_CLASS_NAME::iic_stop()
{
- verboselog( *this, 1, "IIC stop\n");
+ verboselog(*this, 1, "IIC stop\n");
i2c_send_stop();
- m_iic.timer->adjust( attotime::never);
+ m_iic.timer->adjust(attotime::never);
}
void S3C24_CLASS_NAME::iic_resume()
{
int mode_selection;
- verboselog( *this, 1, "IIC resume\n");
- mode_selection = BITS( m_iic.regs.iicstat, 7, 6);
+ verboselog(*this, 1, "IIC resume\n");
+ mode_selection = BITS(m_iic.regs.iicstat, 7, 6);
switch (mode_selection)
{
- case 2 : m_iic.regs.iicds = i2c_receive_byte( BIT( m_iic.regs.iiccon, 7)); break;
- case 3 : i2c_send_byte( m_iic.regs.iicds & 0xFF); break;
+ case 2: m_iic.regs.iicds = i2c_receive_byte(BIT( m_iic.regs.iiccon, 7)); break;
+ case 3: i2c_send_byte( m_iic.regs.iicds & 0xFF); break;
}
- m_iic.timer->adjust( attotime::from_usec( 1));
+ m_iic.timer->adjust(attotime::from_usec(1));
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_r )
@@ -2419,28 +2213,26 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_r )
uint32_t data = ((uint32_t*)&m_iic.regs)[offset];
switch (offset)
{
- case S3C24XX_IICSTAT :
- {
- data = data & ~0x0000000F;
- }
+ case S3C24XX_IICSTAT:
+ data = data & ~0x0000000F;
break;
}
- verboselog( *this, 9, "(IIC) %08X -> %08X\n", S3C24XX_BASE_IIC + (offset << 2), data);
+ verboselog(*this, 9, "(IIC) %08X -> %08X\n", S3C24XX_BASE_IIC + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_w )
{
uint32_t old_value = ((uint32_t*)&m_iic.regs)[offset];
- verboselog( *this, 9, "(IIC) %08X <- %08X\n", S3C24XX_BASE_IIC + (offset << 2), data);
+ verboselog(*this, 9, "(IIC) %08X <- %08X\n", S3C24XX_BASE_IIC + (offset << 2), data);
COMBINE_DATA(&((uint32_t*)&m_iic.regs)[offset]);
switch (offset)
{
- case S3C24XX_IICCON :
+ case S3C24XX_IICCON:
{
int interrupt_pending_flag;
#if 0
- const int div_table[] = { 16, 512};
+ static constexpr int div_table[] = { 16, 512 };
int enable_interrupt, transmit_clock_value, tx_clock_source_selection
double clock;
transmit_clock_value = (data >> 0) & 0xF;
@@ -2448,14 +2240,14 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_w )
enable_interrupt = (data >> 5) & 1;
clock = (double)s3c24xx_get_pclk() / div_table[tx_clock_source_selection] / (transmit_clock_value + 1);
#endif
- interrupt_pending_flag = BIT( old_value, 4);
+ interrupt_pending_flag = BIT(old_value, 4);
if (interrupt_pending_flag != 0)
{
- interrupt_pending_flag = BIT( data, 4);
+ interrupt_pending_flag = BIT(data, 4);
if (interrupt_pending_flag == 0)
{
int start_stop_condition;
- start_stop_condition = BIT( m_iic.regs.iicstat, 5);
+ start_stop_condition = BIT(m_iic.regs.iicstat, 5);
if (start_stop_condition != 0)
{
if (m_iic.count == 0)
@@ -2476,7 +2268,7 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_w )
}
}
break;
- case S3C24XX_IICSTAT :
+ case S3C24XX_IICSTAT:
{
int interrupt_pending_flag;
m_iic.count = 0;
@@ -2510,9 +2302,9 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_w )
TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_timer_exp )
{
int enable_interrupt;
- verboselog( *this, 2, "IIC timer callback\n");
+ verboselog(*this, 2, "IIC timer callback\n");
m_iic.count++;
- enable_interrupt = BIT( m_iic.regs.iiccon, 5);
+ enable_interrupt = BIT(m_iic.regs.iiccon, 5);
if (enable_interrupt)
{
m_iic.regs.iiccon |= (1 << 4); // [bit 4] interrupt is pending
@@ -2522,21 +2314,10 @@ TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_iic_timer_exp )
/* IIS */
-void S3C24_CLASS_NAME::s3c24xx_iis_reset()
-{
- s3c24xx_iis_t *iis = &m_iis;
- memset( &iis->regs, 0, sizeof( iis->regs));
- iis->fifo_index = 0;
- iis->regs.iiscon = 0x0100;
- iis->timer->adjust( attotime::never);
-}
-
void S3C24_CLASS_NAME::iface_i2s_data_w(int ch, uint16_t data)
{
if (!m_data_w_cb.isnull())
- {
- (m_data_w_cb)( ch, data, 0);
- }
+ (m_data_w_cb)(ch, data, 0);
}
void S3C24_CLASS_NAME::s3c24xx_iis_start()
@@ -2563,14 +2344,10 @@ void S3C24_CLASS_NAME::s3c24xx_iis_stop()
void S3C24_CLASS_NAME::s3c24xx_iis_recalc()
{
- if ((m_iis.regs.iiscon & (1 << 0)) != 0)
- {
+ if (BIT(m_iis.regs.iiscon, 0))
s3c24xx_iis_start();
- }
else
- {
s3c24xx_iis_stop();
- }
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_r )
@@ -2579,48 +2356,40 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_r )
#if 0
switch (offset)
{
- case S3C24XX_IISCON :
- {
- data = data & ~1; // hack for mp3 player
- }
+ case iis_t::IISCON :
+ data = data & ~1; // hack for mp3 player
break;
}
#endif
- verboselog( *this, 9, "(IIS) %08X -> %08X\n", S3C24XX_BASE_IIS + (offset << 2), data);
+ verboselog(*this, 9, "(IIS) %08X -> %08X\n", S3C24XX_BASE_IIS + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_w )
{
uint32_t old_value = ((uint32_t*)&m_iis.regs)[offset];
- verboselog( *this, 9, "(IIS) %08X <- %08X\n", S3C24XX_BASE_IIS + (offset << 2), data);
+ verboselog(*this, 9, "(IIS) %08X <- %08X\n", S3C24XX_BASE_IIS + (offset << 2), data);
COMBINE_DATA(&((uint32_t*)&m_iis.regs)[offset]);
switch (offset)
{
- case S3C24XX_IISCON :
+ case iis_t::IISCON :
+ if (BIT(data ^ old_value, 0))
+ s3c24xx_iis_recalc();
+ break;
+ case iis_t::IISFIFO :
+ if (ACCESSING_BITS_16_31)
{
- if ((old_value & (1 << 0)) != (data & (1 << 0)))
- {
- s3c24xx_iis_recalc();
- }
+ m_iis.fifo[m_iis.fifo_index++] = BITS(data, 31, 16);
}
- break;
- case S3C24XX_IISFIFO :
+ if (ACCESSING_BITS_0_15)
{
- if (ACCESSING_BITS_16_31)
- {
- m_iis.fifo[m_iis.fifo_index++] = BITS( data, 31, 16);
- }
- if (ACCESSING_BITS_0_15)
- {
- m_iis.fifo[m_iis.fifo_index++] = BITS( data, 15, 0);
- }
- if (m_iis.fifo_index == 2)
- {
- m_iis.fifo_index = 0;
- iface_i2s_data_w( 0, m_iis.fifo[0]);
- iface_i2s_data_w( 1, m_iis.fifo[1]);
- }
+ m_iis.fifo[m_iis.fifo_index++] = BITS(data, 15, 0);
+ }
+ if (m_iis.fifo_index == 2)
+ {
+ m_iis.fifo_index = 0;
+ iface_i2s_data_w(0, m_iis.fifo[0]);
+ iface_i2s_data_w(1, m_iis.fifo[1]);
}
break;
}
@@ -2628,22 +2397,12 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_w )
TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_iis_timer_exp )
{
- verboselog( *this, 2, "IIS timer callback\n");
+ verboselog(*this, 2, "IIS timer callback\n");
s3c24xx_dma_request_iis();
}
/* RTC */
-void S3C24_CLASS_NAME::s3c24xx_rtc_reset()
-{
- s3c24xx_rtc_t *rtc = &m_rtc;
- memset( &rtc->regs, 0, sizeof( rtc->regs));
- rtc->regs.almday = 1;
- rtc->regs.almmon = 1;
- rtc->timer_update->adjust( attotime::never);
- rtc->timer_update->adjust( attotime::from_msec( 1000), 0, attotime::from_msec( 1000));
-}
-
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_rtc_r )
{
uint32_t data = ((uint32_t*)&m_rtc.regs)[offset];
@@ -2651,109 +2410,39 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_rtc_r )
return data;
}
-void S3C24_CLASS_NAME::s3c24xx_rtc_recalc()
-{
- if (m_rtc.regs.ticnt & (1 << 7))
- {
- uint32_t ttc;
- double freq;
- ttc = BITS( m_rtc.regs.ticnt, 6, 0);
- freq = 128 / (ttc + 1);
-// printf( "ttc %d freq %f\n", ttc, freq);
- m_rtc.timer_tick_count->adjust( attotime::from_hz( freq), 0, attotime::from_hz( freq));
- }
- else
- {
- m_rtc.timer_tick_count->adjust( attotime::never);
- }
-}
-
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_rtc_w )
{
verboselog( *this, 9, "(RTC) %08X <- %08X\n", S3C24XX_BASE_RTC + (offset << 2), data);
COMBINE_DATA(&((uint32_t*)&m_rtc.regs)[offset]);
switch (offset)
{
- case S3C24XX_TICNT :
- {
- s3c24xx_rtc_recalc();
- }
+ case rtc_t::TICNT :
+ m_rtc.recalc();
break;
}
}
TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_rtc_timer_tick_count_exp )
{
- verboselog( *this, 2, "RTC timer callback (tick count)\n");
- s3c24xx_request_irq( S3C24XX_INT_TICK);
+ verboselog(*this, 2, "RTC timer callback (tick count)\n");
+ s3c24xx_request_irq(S3C24XX_INT_TICK);
}
void S3C24_CLASS_NAME::s3c24xx_rtc_update()
{
- uint32_t bcdday_max;
- // increase second
- m_rtc.regs.bcdsec = bcd_adjust( m_rtc.regs.bcdsec + 1);
- if (m_rtc.regs.bcdsec >= 0x60)
- {
- m_rtc.regs.bcdsec = 0;
- // increase minute
- m_rtc.regs.bcdmin = bcd_adjust( m_rtc.regs.bcdmin + 1);
- if (m_rtc.regs.bcdmin >= 0x60)
- {
- m_rtc.regs.bcdmin = 0;
- // increase hour
- m_rtc.regs.bcdhour = bcd_adjust( m_rtc.regs.bcdhour + 1);
- if (m_rtc.regs.bcdhour >= 0x24)
- {
- m_rtc.regs.bcdhour = 0;
- // increase day-of-week
- m_rtc.regs.bcddow = (m_rtc.regs.bcddow % 7) + 1;
- // increase day
- m_rtc.regs.bcdday = bcd_adjust( m_rtc.regs.bcdday + 1);
- bcdday_max = dec_2_bcd( gregorian_days_in_month( bcd_2_dec( m_rtc.regs.bcdmon), bcd_2_dec( m_rtc.regs.bcdyear) + 2000));
- if (m_rtc.regs.bcdday > bcdday_max)
- {
- m_rtc.regs.bcdday = 1;
- // increase month
- m_rtc.regs.bcdmon = bcd_adjust( m_rtc.regs.bcdmon + 1);
- if (m_rtc.regs.bcdmon >= 0x12)
- {
- m_rtc.regs.bcdmon = 1;
- // increase year
- m_rtc.regs.bcdyear = bcd_adjust( m_rtc.regs.bcdyear + 1);
- if (m_rtc.regs.bcdyear >= 0x100)
- {
- m_rtc.regs.bcdyear = 0;
- }
- }
- }
- }
- }
- }
+ m_rtc.update();
verboselog( *this, 5, "RTC - %04d/%02d/%02d %02d:%02d:%02d\n", bcd_2_dec( m_rtc.regs.bcdyear) + 2000, bcd_2_dec( m_rtc.regs.bcdmon), bcd_2_dec( m_rtc.regs.bcdday), bcd_2_dec( m_rtc.regs.bcdhour), bcd_2_dec( m_rtc.regs.bcdmin), bcd_2_dec( m_rtc.regs.bcdsec));
}
void S3C24_CLASS_NAME::s3c24xx_rtc_check_alarm()
{
- if (m_rtc.regs.rtcalm & 0x40)
- {
- int isalarm = 1;
- isalarm = isalarm && (((m_rtc.regs.rtcalm & 0x20) == 0) || (m_rtc.regs.almyear == m_rtc.regs.bcdyear));
- isalarm = isalarm && (((m_rtc.regs.rtcalm & 0x10) == 0) || (m_rtc.regs.almmon == m_rtc.regs.bcdmon));
- isalarm = isalarm && (((m_rtc.regs.rtcalm & 0x08) == 0) || (m_rtc.regs.almday == m_rtc.regs.bcdday));
- isalarm = isalarm && (((m_rtc.regs.rtcalm & 0x04) == 0) || (m_rtc.regs.almhour == m_rtc.regs.bcdhour));
- isalarm = isalarm && (((m_rtc.regs.rtcalm & 0x02) == 0) || (m_rtc.regs.almmin == m_rtc.regs.bcdmin));
- isalarm = isalarm && (((m_rtc.regs.rtcalm & 0x01) == 0) || (m_rtc.regs.almsec == m_rtc.regs.bcdsec));
- if (isalarm != 0)
- {
- s3c24xx_request_irq(S3C24XX_INT_RTC);
- }
- }
+ if (m_rtc.check_alarm())
+ s3c24xx_request_irq(S3C24XX_INT_RTC);
}
TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_rtc_timer_update_exp )
{
- verboselog( *this, 2, "RTC timer callback (update)\n");
+ verboselog(*this, 2, "RTC timer callback (update)\n");
s3c24xx_rtc_update();
s3c24xx_rtc_check_alarm();
}
@@ -2762,13 +2451,12 @@ TIMER_CALLBACK_MEMBER( S3C24_CLASS_NAME::s3c24xx_rtc_timer_update_exp )
void S3C24_CLASS_NAME::s3c24xx_adc_reset()
{
- s3c24xx_adc_t *adc = &m_adc;
- memset( &adc->regs, 0, sizeof( adc->regs));
- adc->regs.adccon = 0x3FC4;
- #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- adc->regs.adctsc = 0x58;
- adc->regs.adcdly = 0xFF;
- #endif
+ memset(&m_adc.regs, 0, sizeof(m_adc.regs));
+ m_adc.regs.adccon = 0x3FC4;
+#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+ m_adc.regs.adctsc = 0x58;
+ m_adc.regs.adcdly = 0xFF;
+#endif
}
uint32_t S3C24_CLASS_NAME::iface_adc_data_r(int ch)
@@ -2776,13 +2464,13 @@ uint32_t S3C24_CLASS_NAME::iface_adc_data_r(int ch)
if (!m_data_r_cb.isnull())
{
int offs = ch;
- #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- if (BIT( m_adc.regs.adctsc, 2) != 0)
+#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+ if (BIT(m_adc.regs.adctsc, 2) != 0)
{
offs += 2;
}
- #endif
- return (m_data_r_cb)(offs, 0);
+#endif
+ return m_data_r_cb(offs, 0);
}
else
{
@@ -2796,42 +2484,36 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_adc_r )
switch (offset)
{
#if defined(DEVICE_S3C2400)
- case S3C24XX_ADCDAT :
- {
- data = (data & ~0x3FF) | (iface_adc_data_r( 0) & 0x3FF);
- }
+ case S3C24XX_ADCDAT:
+ data = (data & ~0x3FF) | (iface_adc_data_r(0) & 0x3FF);
break;
#else
- case S3C24XX_ADCDAT0 :
- {
- data = (data & ~0x3FF) | (iface_adc_data_r( 0) & 0x3FF);
- }
+ case S3C24XX_ADCDAT0:
+ data = (data & ~0x3FF) | (iface_adc_data_r(0) & 0x3FF);
break;
- case S3C24XX_ADCDAT1 :
- {
- data = (data & ~0x3FF) | (iface_adc_data_r( 1) & 0x3FF);
- }
+ case S3C24XX_ADCDAT1:
+ data = (data & ~0x3FF) | (iface_adc_data_r(1) & 0x3FF);
break;
#endif
}
- verboselog( *this, 9, "(ADC) %08X -> %08X\n", S3C24XX_BASE_ADC + (offset << 2), data);
+ verboselog(*this, 9, "(ADC) %08X -> %08X\n", S3C24XX_BASE_ADC + (offset << 2), data);
return data;
}
void S3C24_CLASS_NAME::s3c24xx_adc_start()
{
- verboselog( *this, 1, "ADC start\n");
+ verboselog(*this, 1, "ADC start\n");
m_adc.regs.adccon &= ~(1 << 0); // A/D conversion is completed
m_adc.regs.adccon |= (1 << 15); // End of A/D conversion
- #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- s3c24xx_request_subirq( S3C24XX_SUBINT_ADC);
- #endif
+#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+ s3c24xx_request_subirq(S3C24XX_SUBINT_ADC);
+#endif
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_adc_w )
{
uint32_t old_value = ((uint32_t*)&m_adc.regs)[offset];
- verboselog( *this, 9, "(ADC) %08X <- %08X\n", S3C24XX_BASE_ADC + (offset << 2), data);
+ verboselog(*this, 9, "(ADC) %08X <- %08X\n", S3C24XX_BASE_ADC + (offset << 2), data);
COMBINE_DATA(&((uint32_t*)&m_adc.regs)[offset]);
switch (offset)
{
@@ -2861,14 +2543,13 @@ void S3C24_CLASS_NAME::s3c24xx_touch_screen(int state)
void S3C24_CLASS_NAME::s3c24xx_spi_reset()
{
- for (auto & elem : m_spi)
+ for (spi_t &spi : m_spi)
{
- s3c24xx_spi_t *spi = &elem;
- memset( &spi->regs, 0, sizeof( spi->regs));
- spi->regs.spsta = 1;
- #if defined(DEVICE_S3C2400) || defined(DEVICE_S3C2410)
- spi->regs.sppin = 2;
- #endif
+ memset(&spi.regs, 0, sizeof(spi.regs));
+ spi.regs.spsta = 1;
+#if defined(DEVICE_S3C2400) || defined(DEVICE_S3C2410)
+ spi.regs.sppin = 2;
+#endif
}
}
@@ -2877,10 +2558,8 @@ uint32_t S3C24_CLASS_NAME::s3c24xx_spi_r(uint32_t ch, uint32_t offset)
uint32_t data = ((uint32_t*)&m_spi[ch].regs)[offset];
switch (offset)
{
- case S3C24XX_SPSTA :
- {
- data = data | (1 << 0); // [bit 0] Transfer Ready Flag
- }
+ case spi_t::SPSTA :
+ data = data | (1 << 0); // [bit 0] Transfer Ready Flag
break;
}
return data;
@@ -2893,8 +2572,8 @@ void S3C24_CLASS_NAME::s3c24xx_spi_w(uint32_t ch, uint32_t offset, uint32_t data
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_0_r )
{
- uint32_t data = s3c24xx_spi_r( 0, offset);
- verboselog( *this, 9, "(SPI 0) %08X -> %08X\n", S3C24XX_BASE_SPI_0 + (offset << 2), data);
+ uint32_t data = s3c24xx_spi_r(0, offset);
+ verboselog(*this, 9, "(SPI 0) %08X -> %08X\n", S3C24XX_BASE_SPI_0 + (offset << 2), data);
return data;
}
@@ -2902,8 +2581,8 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_0_r )
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_1_r )
{
- uint32_t data = s3c24xx_spi_r( 1, offset);
- verboselog( *this, 9, "(SPI 1) %08X -> %08X\n", S3C24XX_BASE_SPI_1 + (offset << 2), data);
+ uint32_t data = s3c24xx_spi_r(1, offset);
+ verboselog(*this, 9, "(SPI 1) %08X -> %08X\n", S3C24XX_BASE_SPI_1 + (offset << 2), data);
return data;
}
@@ -2929,22 +2608,16 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_spi_1_w )
#if defined(DEVICE_S3C2400)
-void S3C24_CLASS_NAME::s3c24xx_mmc_reset()
-{
- s3c24xx_mmc_t *mmc = &m_mmc;
- memset( &mmc->regs, 0, sizeof( mmc->regs));
-}
-
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_mmc_r )
{
uint32_t data = m_mmc.regs.data[offset];
- verboselog( *this, 9, "(MMC) %08X -> %08X\n", S3C24XX_BASE_MMC + (offset << 2), data);
+ verboselog(*this, 9, "(MMC) %08X -> %08X\n", S3C24XX_BASE_MMC + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_mmc_w )
{
- verboselog( *this, 9, "(MMC) %08X <- %08X\n", S3C24XX_BASE_MMC + (offset << 2), data);
+ verboselog(*this, 9, "(MMC) %08X <- %08X\n", S3C24XX_BASE_MMC + (offset << 2), data);
COMBINE_DATA(&m_mmc.regs.data[offset]);
}
@@ -2956,14 +2629,13 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_mmc_w )
void S3C24_CLASS_NAME::s3c24xx_sdi_reset()
{
- s3c24xx_sdi_t *sdi = &m_sdi;
- memset( &sdi->regs, 0, sizeof( sdi->regs));
- #if defined(DEVICE_S3C2410)
- sdi->regs.data[0x24/4] = 0x2000;
- #elif defined(DEVICE_S3C2440)
- sdi->regs.data[0x04/4] = 1;
- sdi->regs.data[0x24/4] = 0x10000;
- #endif
+ memset(&m_sdi.regs, 0, sizeof(m_sdi.regs));
+#if defined(DEVICE_S3C2410)
+ m_sdi.regs.data[0x24/4] = 0x2000;
+#elif defined(DEVICE_S3C2440)
+ m_sdi.regs.data[0x04/4] = 1;
+ m_sdi.regs.data[0x24/4] = 0x10000;
+#endif
}
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_sdi_r )
@@ -2987,19 +2659,18 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_sdi_w )
void S3C24_CLASS_NAME::s3c24xx_nand_reset()
{
- s3c24xx_nand_t *nand = &m_nand;
- memset( &nand->regs, 0, sizeof( nand->regs));
- #if defined(DEVICE_S3C2440)
- nand->regs.nfconf = 0x1000;
- nand->regs.nfcont = 0x0384;
- #endif
+ memset(&m_nand.regs, 0, sizeof(m_nand.regs));
+#if defined(DEVICE_S3C2440)
+ m_nand.regs.nfconf = 0x1000;
+ m_nand.regs.nfcont = 0x0384;
+#endif
}
void S3C24_CLASS_NAME::iface_nand_command_w(uint8_t data)
{
if (!m_command_w_cb.isnull())
{
- (m_command_w_cb)( 0, data, 0xff);
+ m_command_w_cb(0, data, 0xff);
}
}
@@ -3007,31 +2678,25 @@ void S3C24_CLASS_NAME::iface_nand_address_w(uint8_t data)
{
if (!m_address_w_cb.isnull())
{
- (m_address_w_cb)( 0, data, 0xff);
+ m_address_w_cb(0, data, 0xff);
}
}
uint8_t S3C24_CLASS_NAME::iface_nand_data_r()
{
if (!m_nand_data_r_cb.isnull())
- {
- return (m_nand_data_r_cb)( 0, 0xff);
- }
+ return m_nand_data_r_cb(0, 0xff);
else
- {
return 0;
- }
}
void S3C24_CLASS_NAME::iface_nand_data_w(uint8_t data)
{
if (!m_nand_data_w_cb.isnull())
- {
- (m_nand_data_w_cb)(0, data, 0xff);
- }
+ m_nand_data_w_cb(0, data, 0xff);
}
-void S3C24_CLASS_NAME::nand_update_mecc( uint8_t *ecc, int pos, uint8_t data)
+void S3C24_CLASS_NAME::nand_update_mecc(uint8_t *ecc, int pos, uint8_t data)
{
int bit[8];
uint8_t temp;
@@ -3098,40 +2763,41 @@ void S3C24_CLASS_NAME::nand_update_secc( uint8_t *ecc, int pos, uint8_t data)
void S3C24_CLASS_NAME::s3c24xx_nand_update_ecc(uint8_t data)
{
- s3c24xx_nand_t *nand = &m_nand;
uint8_t temp[4];
#if defined(DEVICE_S3C2410)
- temp[0] = nand->mecc[0];
- temp[1] = nand->mecc[1];
- temp[2] = nand->mecc[2];
- nand_update_mecc( nand->mecc, nand->ecc_pos++, data);
- verboselog( *this, 5, "NAND - MECC %03X - %02X %02X %02X -> %02X %02X %02X\n", nand->ecc_pos - 1, temp[0], temp[1], temp[2], nand->mecc[0], nand->mecc[1], nand->mecc[2]);
- if (nand->ecc_pos == 512) nand->ecc_pos = 0;
+ temp[0] = m_nand.mecc[0];
+ temp[1] = m_nand.mecc[1];
+ temp[2] = m_nand.mecc[2];
+ nand_update_mecc(m_nand.mecc, m_nand.ecc_pos++, data);
+ verboselog(*this, 5, "NAND - MECC %03X - %02X %02X %02X -> %02X %02X %02X\n", m_nand.ecc_pos - 1, temp[0], temp[1], temp[2], m_nand.mecc[0], m_nand.mecc[1], m_nand.mecc[2]);
+ if (m_nand.ecc_pos == 512)
+ m_nand.ecc_pos = 0;
#else
- if ((nand->regs.nfcont & (1 << 5)) == 0)
+ if (!BIT(m_nand.regs.nfcont, 5))
{
- temp[0] = nand->mecc[0];
- temp[1] = nand->mecc[1];
- temp[2] = nand->mecc[2];
- temp[3] = nand->mecc[3];
- nand_update_mecc( nand->mecc, nand->ecc_pos++, data);
- verboselog( *this, 5, "NAND - MECC %03X - %02X %02X %02X %02X -> %02X %02X %02X %02X\n", nand->ecc_pos - 1, temp[0], temp[1], temp[2], temp[3], nand->mecc[0], nand->mecc[1], nand->mecc[2], nand->mecc[3]);
- if (nand->ecc_pos == 2048) nand->ecc_pos = 0;
+ temp[0] = m_nand.mecc[0];
+ temp[1] = m_nand.mecc[1];
+ temp[2] = m_nand.mecc[2];
+ temp[3] = m_nand.mecc[3];
+ nand_update_mecc( m_nand.mecc, m_nand.ecc_pos++, data);
+ verboselog( *this, 5, "NAND - MECC %03X - %02X %02X %02X %02X -> %02X %02X %02X %02X\n", m_nand.ecc_pos - 1, temp[0], temp[1], temp[2], temp[3], m_nand.mecc[0], m_nand.mecc[1], m_nand.mecc[2], m_nand.mecc[3]);
+ if (m_nand.ecc_pos == 2048) m_nand.ecc_pos = 0;
}
- if ((nand->regs.nfcont & (1 << 6)) == 0)
+ if (!BIT(m_nand.regs.nfcont, 6))
{
- temp[0] = nand->secc[0];
- temp[1] = nand->secc[1];
- nand_update_secc( nand->secc, nand->ecc_pos++, data);
- verboselog( *this, 5, "NAND - SECC %02X - %02X %02X -> %02X %02X\n", nand->ecc_pos - 1, temp[0], temp[1], nand->secc[0], nand->secc[1]);
- if (nand->ecc_pos == 16) nand->ecc_pos = 0;
+ temp[0] = m_nand.secc[0];
+ temp[1] = m_nand.secc[1];
+ nand_update_secc(m_nand.secc, m_nand.ecc_pos++, data);
+ verboselog( *this, 5, "NAND - SECC %02X - %02X %02X -> %02X %02X\n", m_nand.ecc_pos - 1, temp[0], temp[1], m_nand.secc[0], m_nand.secc[1]);
+ if (m_nand.ecc_pos == 16)
+ m_nand.ecc_pos = 0;
}
#endif
}
void S3C24_CLASS_NAME::s3c24xx_nand_command_w(uint8_t data)
{
- verboselog( *this, 5, "NAND write command %02X\n", data);
+ verboselog(*this, 5, "NAND write command %02X\n", data);
m_nand.data_count = 0;
iface_nand_command_w( data);
}
@@ -3163,50 +2829,38 @@ READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_nand_r )
uint32_t data = ((uint32_t*)&m_nand.regs)[offset];
switch (offset)
{
- case S3C24XX_NFDATA :
- {
- data = 0;
- #if defined(DEVICE_S3C2410)
- data = data | s3c24xx_nand_data_r();
- #elif defined(DEVICE_S3C2440)
- if ((mem_mask & 0x000000FF) != 0) data = data | (s3c24xx_nand_data_r() << 0);
- if ((mem_mask & 0x0000FF00) != 0) data = data | (s3c24xx_nand_data_r() << 8);
- if ((mem_mask & 0x00FF0000) != 0) data = data | (s3c24xx_nand_data_r() << 16);
- if ((mem_mask & 0xFF000000) != 0) data = data | (s3c24xx_nand_data_r() << 24);
- #endif
- }
+ case S3C24XX_NFDATA:
+ data = 0;
+#if defined(DEVICE_S3C2410)
+ data = data | s3c24xx_nand_data_r();
+#elif defined(DEVICE_S3C2440)
+ if ((mem_mask & 0x000000FF) != 0) data = data | (s3c24xx_nand_data_r() << 0);
+ if ((mem_mask & 0x0000FF00) != 0) data = data | (s3c24xx_nand_data_r() << 8);
+ if ((mem_mask & 0x00FF0000) != 0) data = data | (s3c24xx_nand_data_r() << 16);
+ if ((mem_mask & 0xFF000000) != 0) data = data | (s3c24xx_nand_data_r() << 24);
+#endif
break;
#if defined(DEVICE_S3C2410)
- case S3C24XX_NFECC :
- {
- data = ((m_nand.mecc[2] << 16) | (m_nand.mecc[1] << 8) | (m_nand.mecc[0] << 0));
- }
+ case S3C24XX_NFECC :
+ data = ((m_nand.mecc[2] << 16) | (m_nand.mecc[1] << 8) | (m_nand.mecc[0] << 0));
break;
#endif
#if defined(DEVICE_S3C2440)
- case S3C24XX_NFMECC0 :
- {
- data = (m_nand.mecc[3] << 24) | (m_nand.mecc[2] << 16) | (m_nand.mecc[1] << 8) | (m_nand.mecc[0] << 0);
- }
+ case S3C24XX_NFMECC0 :
+ data = (m_nand.mecc[3] << 24) | (m_nand.mecc[2] << 16) | (m_nand.mecc[1] << 8) | (m_nand.mecc[0] << 0);
break;
- case S3C24XX_NFSECC :
- {
- data = (m_nand.secc[1] << 8) | (m_nand.secc[0] << 0);
- }
+ case S3C24XX_NFSECC :
+ data = (m_nand.secc[1] << 8) | (m_nand.secc[0] << 0);
break;
- case S3C24XX_NFESTAT0 :
- {
- data &= ~0x000000F; // no main/spare ECC errors
- }
+ case S3C24XX_NFESTAT0 :
+ data &= ~0x000000F; // no main/spare ECC errors
break;
- case S3C24XX_NFESTAT1 :
- {
- data &= ~0x000000F; // no main/spare ECC errors
- }
+ case S3C24XX_NFESTAT1 :
+ data &= ~0x000000F; // no main/spare ECC errors
break;
#endif
}
- verboselog( *this, 9, "(NAND) %08X -> %08X (%08X)\n", S3C24XX_BASE_NAND + (offset << 2), data, mem_mask);
+ verboselog(*this, 9, "(NAND) %08X -> %08X (%08X)\n", S3C24XX_BASE_NAND + (offset << 2), data, mem_mask);
return data;
}
@@ -3216,11 +2870,11 @@ void S3C24_CLASS_NAME::s3c24xx_nand_init_ecc()
m_nand.mecc[0] = 0xFF;
m_nand.mecc[1] = 0xFF;
m_nand.mecc[2] = 0xFF;
- #if defined(DEVICE_S3C2440)
+#if defined(DEVICE_S3C2440)
m_nand.mecc[3] = 0xFF;
m_nand.secc[0] = 0;
m_nand.secc[1] = 0;
- #endif
+#endif
m_nand.ecc_pos = 0;
}
@@ -3232,57 +2886,39 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_nand_w )
switch (offset)
{
#if defined(DEVICE_S3C2410)
- case S3C24XX_NFCONF :
- {
- if ((data & (1 << 12)) != 0)
- {
- s3c24xx_nand_init_ecc();
- }
- }
+ case S3C24XX_NFCONF:
+ if ((data & (1 << 12)) != 0)
+ s3c24xx_nand_init_ecc();
break;
#endif
#if defined(DEVICE_S3C2440)
- case S3C24XX_NFCONT :
- {
- if ((data & (1 << 4)) != 0)
- {
- s3c24xx_nand_init_ecc();
- }
- }
+ case S3C24XX_NFCONT:
+ if ((data & (1 << 4)) != 0)
+ s3c24xx_nand_init_ecc();
break;
#endif
- case S3C24XX_NFSTAT :
- {
- m_nand.regs.nfstat = (m_nand.regs.nfstat & ~0x03) | (old_value & 0x03); // read-only
+ case S3C24XX_NFSTAT:
+ m_nand.regs.nfstat = (m_nand.regs.nfstat & ~0x03) | (old_value & 0x03); // read-only
#if defined(DEVICE_S3C2440)
- if ((data & (1 << 2)) != 0)
- {
- m_nand.regs.nfstat &= ~(1 << 2); // "RnB_TransDetect, to clear this value write 1"
- }
+ if ((data & (1 << 2)) != 0)
+ m_nand.regs.nfstat &= ~(1 << 2); // "RnB_TransDetect, to clear this value write 1"
#endif
- }
break;
- case S3C24XX_NFCMD :
- {
- s3c24xx_nand_command_w(data);
- }
+ case S3C24XX_NFCMD:
+ s3c24xx_nand_command_w(data);
break;
- case S3C24XX_NFADDR :
- {
- s3c24xx_nand_address_w(data);
- }
+ case S3C24XX_NFADDR:
+ s3c24xx_nand_address_w(data);
break;
- case S3C24XX_NFDATA :
- {
- #if defined(DEVICE_S3C2410)
- s3c24xx_nand_data_w(data & 0xFF);
- #elif defined(DEVICE_S3C2440)
- if ((mem_mask & 0x000000FF) != 0) s3c24xx_nand_data_w((data >> 0) & 0xFF);
- if ((mem_mask & 0x0000FF00) != 0) s3c24xx_nand_data_w((data >> 8) & 0xFF);
- if ((mem_mask & 0x00FF0000) != 0) s3c24xx_nand_data_w((data >> 16) & 0xFF);
- if ((mem_mask & 0xFF000000) != 0) s3c24xx_nand_data_w((data >> 24) & 0xFF);
- #endif
- }
+ case S3C24XX_NFDATA:
+#if defined(DEVICE_S3C2410)
+ s3c24xx_nand_data_w(data & 0xFF);
+#elif defined(DEVICE_S3C2440)
+ if ((mem_mask & 0x000000FF) != 0) s3c24xx_nand_data_w((data >> 0) & 0xFF);
+ if ((mem_mask & 0x0000FF00) != 0) s3c24xx_nand_data_w((data >> 8) & 0xFF);
+ if ((mem_mask & 0x00FF0000) != 0) s3c24xx_nand_data_w((data >> 16) & 0xFF);
+ if ((mem_mask & 0xFF000000) != 0) s3c24xx_nand_data_w((data >> 24) & 0xFF);
+#endif
break;
}
}
@@ -3295,19 +2931,13 @@ ATTR_UNUSED WRITE_LINE_MEMBER( S3C24_CLASS_NAME::s3c24xx_pin_frnb_w )
{
m_nand.regs.nfstat |= (1 << 2);
if (BIT( m_nand.regs.nfcont, 9) != 0)
- {
s3c24xx_request_irq( S3C24XX_INT_NFCON);
- }
}
#endif
if (state == 0)
- {
m_nand.regs.nfstat &= ~(1 << 0);
- }
else
- {
m_nand.regs.nfstat |= (1 << 0);
- }
}
#endif
@@ -3316,22 +2946,16 @@ ATTR_UNUSED WRITE_LINE_MEMBER( S3C24_CLASS_NAME::s3c24xx_pin_frnb_w )
#if defined(DEVICE_S3C2440)
-void S3C24_CLASS_NAME::s3c24xx_cam_reset()
-{
- s3c24xx_cam_t *cam = &m_cam;
- memset( &cam->regs, 0, sizeof( cam->regs));
-}
-
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_cam_r )
{
uint32_t data = m_cam.regs.data[offset];
- verboselog( *this, 9, "(CAM) %08X -> %08X\n", S3C24XX_BASE_CAM + (offset << 2), data);
+ verboselog(*this, 9, "(CAM) %08X -> %08X\n", S3C24XX_BASE_CAM + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_cam_w )
{
- verboselog( *this, 9, "(CAM) %08X <- %08X\n", S3C24XX_BASE_CAM + (offset << 2), data);
+ verboselog(*this, 9, "(CAM) %08X <- %08X\n", S3C24XX_BASE_CAM + (offset << 2), data);
COMBINE_DATA(&m_cam.regs.data[offset]);
}
@@ -3341,22 +2965,16 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_cam_w )
#if defined(DEVICE_S3C2440)
-void S3C24_CLASS_NAME::s3c24xx_ac97_reset()
-{
- s3c24xx_ac97_t *ac97 = &m_ac97;
- memset( &ac97->regs, 0, sizeof( ac97->regs));
-}
-
READ32_MEMBER( S3C24_CLASS_NAME::s3c24xx_ac97_r )
{
uint32_t data = m_ac97.regs.data[offset];
- verboselog( *this, 9, "(AC97) %08X -> %08X\n", S3C24XX_BASE_AC97 + (offset << 2), data);
+ verboselog(*this, 9, "(AC97) %08X -> %08X\n", S3C24XX_BASE_AC97 + (offset << 2), data);
return data;
}
WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_ac97_w )
{
- verboselog( *this, 9, "(AC97) %08X <- %08X\n", S3C24XX_BASE_AC97 + (offset << 2), data);
+ verboselog(*this, 9, "(AC97) %08X <- %08X\n", S3C24XX_BASE_AC97 + (offset << 2), data);
COMBINE_DATA(&m_ac97.regs.data[offset]);
}
@@ -3368,24 +2986,20 @@ WRITE32_MEMBER( S3C24_CLASS_NAME::s3c24xx_ac97_w )
void S3C24_CLASS_NAME::s3c24xx_nand_auto_boot()
{
- int om0 = iface_core_pin_r( S3C24XX_CORE_PIN_OM0);
- int om1 = iface_core_pin_r( S3C24XX_CORE_PIN_OM1);
+ int om0 = iface_core_pin_r(S3C24XX_CORE_PIN_OM0);
+ int om1 = iface_core_pin_r(S3C24XX_CORE_PIN_OM1);
if ((om0 == 0) && (om1 == 0))
{
- int ncon = iface_core_pin_r( S3C24XX_CORE_PIN_NCON);
+ int ncon = iface_core_pin_r(S3C24XX_CORE_PIN_NCON);
uint8_t *ptr = m_steppingstone;
int page_size, address_cycle;
- #if defined(DEVICE_S3C2410)
+#if defined(DEVICE_S3C2410)
page_size = 512;
if (ncon == 0)
- {
address_cycle = 3; // byte-page-page
- }
else
- {
address_cycle = 4; // byte-page-page-page
- }
- #elif defined(DEVICE_S3C2440)
+#elif defined(DEVICE_S3C2440)
uint32_t port_g = iface_gpio_port_r( S3C24XX_GPIO_PORT_G, 0);
if (ncon == 0)
{
@@ -3413,28 +3027,28 @@ void S3C24_CLASS_NAME::s3c24xx_nand_auto_boot()
address_cycle = 5; // byte-byte-page-page-page
}
}
- #endif
- iface_nand_command_w( 0xFF);
+#endif
+ iface_nand_command_w(0xFF);
for (int page = 0; page < (4 * 1024) / page_size; page++)
{
- iface_nand_command_w( 0x00);
- iface_nand_address_w( 0x00);
+ iface_nand_command_w(0x00);
+ iface_nand_address_w(0x00);
if (address_cycle > 4)
{
- iface_nand_address_w( 0x00);
+ iface_nand_address_w(0x00);
}
- iface_nand_address_w( (page >> 0) & 0xFF);
- iface_nand_address_w( (page >> 8) & 0xFF);
+ iface_nand_address_w((page >> 0) & 0xFF);
+ iface_nand_address_w((page >> 8) & 0xFF);
if (address_cycle > 3)
{
- iface_nand_address_w( (page >> 16) & 0xFF);
+ iface_nand_address_w((page >> 16) & 0xFF);
}
for (int i = 0; i < page_size; i++)
{
*ptr++ = iface_nand_data_r();
}
}
- iface_nand_command_w( 0xFF);
+ iface_nand_command_w(0xFF);
}
}
@@ -3443,41 +3057,42 @@ void S3C24_CLASS_NAME::s3c24xx_nand_auto_boot()
void S3C24_CLASS_NAME::s3c24xx_device_reset()
{
verboselog( *this, 1, "s3c24xx device reset\n");
- s3c24xx_uart_reset( );
- s3c24xx_pwm_reset();
+ for (uart_t &uart : m_uart)
+ uart.reset();
+ m_pwm.reset();
s3c24xx_dma_reset();
s3c24xx_iic_reset();
- s3c24xx_iis_reset();
+ m_iis.reset();
s3c24xx_lcd_reset();
- s3c24xx_rtc_reset();
- s3c24xx_wdt_reset();
+ m_rtc.reset();
+ m_wdt.reset();
s3c24xx_irq_reset();
s3c24xx_gpio_reset();
- s3c24xx_memcon_reset();
+ m_memcon.reset();
s3c24xx_clkpow_reset();
- s3c24xx_usb_host_reset();
+ m_usbhost.reset();
s3c24xx_usb_device_reset();
s3c24xx_adc_reset();
s3c24xx_spi_reset();
- #if defined(DEVICE_S3C2400)
- s3c24xx_mmc_reset();
- #endif
- #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+#if defined(DEVICE_S3C2400)
+ m_mmc.reset();
+#endif
+#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
s3c24xx_sdi_reset();
s3c24xx_nand_reset();
- #endif
- #if defined(DEVICE_S3C2440)
- s3c24xx_cam_reset();
- s3c24xx_ac97_reset();
- #endif
- #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+#endif
+#if defined(DEVICE_S3C2440)
+ m_cam.reset();
+ m_ac97.reset();
+#endif
+#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
s3c24xx_nand_auto_boot();
- #endif
+#endif
}
void S3C24_CLASS_NAME::s3c24xx_device_start()
{
- verboselog( *this, 1, "s3c24xx device start\n");
+ verboselog(*this, 1, "s3c24xx device start\n");
m_pin_r_cb.resolve();
m_pin_w_cb.resolve_safe();
m_port_r_cb.resolve();
@@ -3487,34 +3102,30 @@ void S3C24_CLASS_NAME::s3c24xx_device_start()
m_sda_w_cb.resolve();
m_data_r_cb.resolve();
m_data_w_cb.resolve();
- #if !defined(DEVICE_S3C2400)
+#if !defined(DEVICE_S3C2400)
m_command_w_cb.resolve();
m_address_w_cb.resolve();
m_nand_data_r_cb.resolve();
m_nand_data_w_cb.resolve();
- #endif
+#endif
for (int i = 0; i < 5; i++)
- {
- m_pwm.timer[i] = machine().scheduler().timer_alloc(timer_expired_delegate( FUNC(S3C24_CLASS_NAME::s3c24xx_pwm_timer_exp), this));
- }
+ m_pwm.timer[i] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(S3C24_CLASS_NAME::s3c24xx_pwm_timer_exp), this));
for (auto & elem : m_dma)
- {
- elem.timer = machine().scheduler().timer_alloc(timer_expired_delegate( FUNC(S3C24_CLASS_NAME::s3c24xx_dma_timer_exp), this));
- }
- m_iic.timer = machine().scheduler().timer_alloc(timer_expired_delegate( FUNC(S3C24_CLASS_NAME::s3c24xx_iic_timer_exp), this));
- m_iis.timer = machine().scheduler().timer_alloc(timer_expired_delegate( FUNC(S3C24_CLASS_NAME::s3c24xx_iis_timer_exp), this));
- m_lcd.timer = machine().scheduler().timer_alloc(timer_expired_delegate( FUNC(S3C24_CLASS_NAME::s3c24xx_lcd_timer_exp), this));
- m_rtc.timer_tick_count = machine().scheduler().timer_alloc(timer_expired_delegate( FUNC(S3C24_CLASS_NAME::s3c24xx_rtc_timer_tick_count_exp), this));
- m_rtc.timer_update = machine().scheduler().timer_alloc(timer_expired_delegate( FUNC(S3C24_CLASS_NAME::s3c24xx_rtc_timer_update_exp), this));
- m_wdt.timer = machine().scheduler().timer_alloc(timer_expired_delegate( FUNC(S3C24_CLASS_NAME::s3c24xx_wdt_timer_exp), this));
- #if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
- int om0 = iface_core_pin_r( S3C24XX_CORE_PIN_OM0);
- int om1 = iface_core_pin_r( S3C24XX_CORE_PIN_OM1);
+ elem.timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(S3C24_CLASS_NAME::s3c24xx_dma_timer_exp), this));
+ m_iic.timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(S3C24_CLASS_NAME::s3c24xx_iic_timer_exp), this));
+ m_iis.timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(S3C24_CLASS_NAME::s3c24xx_iis_timer_exp), this));
+ m_lcd.timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(S3C24_CLASS_NAME::s3c24xx_lcd_timer_exp), this));
+ m_rtc.timer_tick_count = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(S3C24_CLASS_NAME::s3c24xx_rtc_timer_tick_count_exp), this));
+ m_rtc.timer_update = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(S3C24_CLASS_NAME::s3c24xx_rtc_timer_update_exp), this));
+ m_wdt.timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(S3C24_CLASS_NAME::s3c24xx_wdt_timer_exp), this));
+#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
+ int om0 = iface_core_pin_r(S3C24XX_CORE_PIN_OM0);
+ int om1 = iface_core_pin_r(S3C24XX_CORE_PIN_OM1);
if ((om0 == 0) && (om1 == 0))
{
- address_space &space = m_cpu->memory().space( AS_PROGRAM);
- space.install_ram( 0x00000000, 0x00000fff, m_steppingstone);
- space.install_ram( 0x40000000, 0x40000fff, m_steppingstone);
+ address_space &space = m_cpu->memory().space(AS_PROGRAM);
+ space.install_ram(0x00000000, 0x00000fff, m_steppingstone);
+ space.install_ram(0x40000000, 0x40000fff, m_steppingstone);
}
- #endif
+#endif
}