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Diffstat (limited to 'src/devices/machine/ncr5390.h')
-rw-r--r--src/devices/machine/ncr5390.h135
1 files changed, 56 insertions, 79 deletions
diff --git a/src/devices/machine/ncr5390.h b/src/devices/machine/ncr5390.h
index 7cc2469bde5..bf301bed266 100644
--- a/src/devices/machine/ncr5390.h
+++ b/src/devices/machine/ncr5390.h
@@ -7,46 +7,59 @@
#include "machine/nscsi_bus.h"
+#define MCFG_NCR5390_IRQ_HANDLER(_devcb) \
+ downcast<ncr5390_device &>(*device).set_irq_handler(DEVCB_##_devcb);
+
+#define MCFG_NCR5390_DRQ_HANDLER(_devcb) \
+ downcast<ncr5390_device &>(*device).set_drq_handler(DEVCB_##_devcb);
+
class ncr5390_device : public nscsi_device
{
public:
ncr5390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
+ template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); }
+ template <class Object> devcb_base &set_drq_handler(Object &&cb) { return m_drq_handler.set_callback(std::forward<Object>(cb)); }
+
auto irq_handler_cb() { return m_irq_handler.bind(); }
auto drq_handler_cb() { return m_drq_handler.bind(); }
virtual void map(address_map &map);
- uint8_t tcounter_lo_r();
- void tcount_lo_w(uint8_t data);
- uint8_t tcounter_hi_r();
- void tcount_hi_w(uint8_t data);
- uint8_t fifo_r();
- void fifo_w(uint8_t data);
- uint8_t command_r();
- void command_w(uint8_t data);
- virtual uint8_t status_r();
- void bus_id_w(uint8_t data);
- uint8_t istatus_r();
- void timeout_w(uint8_t data);
- uint8_t seq_step_r();
- void sync_period_w(uint8_t data);
- uint8_t fifo_flags_r();
- void sync_offset_w(uint8_t data);
- uint8_t conf_r();
- void conf_w(uint8_t data);
- void test_w(uint8_t data);
- void clock_w(uint8_t data);
-
- virtual uint8_t read(offs_t offset);
- virtual void write(offs_t offset, uint8_t data);
+ DECLARE_READ8_MEMBER(tcounter_lo_r);
+ DECLARE_WRITE8_MEMBER(tcount_lo_w);
+ DECLARE_READ8_MEMBER(tcounter_hi_r);
+ DECLARE_WRITE8_MEMBER(tcount_hi_w);
+ DECLARE_READ8_MEMBER(fifo_r);
+ DECLARE_WRITE8_MEMBER(fifo_w);
+ DECLARE_READ8_MEMBER(command_r);
+ DECLARE_WRITE8_MEMBER(command_w);
+ virtual DECLARE_READ8_MEMBER(status_r);
+ DECLARE_WRITE8_MEMBER(bus_id_w);
+ DECLARE_READ8_MEMBER(istatus_r);
+ DECLARE_WRITE8_MEMBER(timeout_w);
+ DECLARE_READ8_MEMBER(seq_step_r);
+ DECLARE_WRITE8_MEMBER(sync_period_w);
+ DECLARE_READ8_MEMBER(fifo_flags_r);
+ DECLARE_WRITE8_MEMBER(sync_offset_w);
+ DECLARE_READ8_MEMBER(conf_r);
+ DECLARE_WRITE8_MEMBER(conf_w);
+ DECLARE_WRITE8_MEMBER(test_w);
+ DECLARE_WRITE8_MEMBER(clock_w);
+
+ virtual DECLARE_READ8_MEMBER(read);
+ virtual DECLARE_WRITE8_MEMBER(write);
virtual void scsi_ctrl_changed() override;
uint8_t dma_r();
void dma_w(uint8_t val);
+ // memory mapped wrappers for dma read/write
+ DECLARE_READ8_MEMBER(mdma_r) { return dma_r(); }
+ DECLARE_WRITE8_MEMBER(mdma_w) { dma_w(data); }
+
protected:
ncr5390_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -207,11 +220,13 @@ protected:
bool test_mode;
void dma_set(int dir);
- virtual void check_drq();
+ void drq_set();
+ void drq_clear();
void start_command();
void step(bool timeout);
virtual bool check_valid_command(uint8_t cmd);
+ int derive_msg_size(uint8_t msg_id);
void function_complete();
void function_bus_complete();
void bus_complete();
@@ -220,6 +235,10 @@ protected:
void command_pop_and_chain();
void check_irq();
+protected:
+ virtual void reset_soft();
+
+private:
void reset_disconnect();
uint8_t fifo_pop();
@@ -230,7 +249,7 @@ protected:
void delay(int cycles);
void delay_cycles(int cycles);
- void decrement_tcounter(int count = 1);
+ void decrement_tcounter();
devcb_write_line m_irq_handler;
devcb_write_line m_drq_handler;
@@ -243,19 +262,19 @@ public:
virtual void map(address_map &map) override;
- virtual uint8_t status_r() override;
+ virtual DECLARE_READ8_MEMBER(status_r) override;
- uint8_t conf2_r() { return config2; };
- void conf2_w(uint8_t data) { config2 = data; };
+ DECLARE_READ8_MEMBER(conf2_r) { return config2; };
+ DECLARE_WRITE8_MEMBER(conf2_w) { config2 = data; };
- virtual uint8_t read(offs_t offset) override;
- virtual void write(offs_t offset, uint8_t data) override;
+ virtual DECLARE_READ8_MEMBER(read) override;
+ virtual DECLARE_WRITE8_MEMBER(write) override;
protected:
ncr53c90a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void reset_soft() override;
virtual bool check_valid_command(uint8_t cmd) override;
@@ -264,18 +283,6 @@ protected:
S_INTERRUPT = 0x80,
};
- enum conf2_mask : u8
- {
- PGDP = 0x01, // pass through/generate data parity
- PGRP = 0x02, // pass through/generate register parity
- ACDPE = 0x04, // abort on command/data parity error
- S2FE = 0x08, // scsi-2 features enable
- TSDR = 0x10, // tri-state dma request
- SBO = 0x20, // select byte order
- LSP = 0x40, // latch scsi phase
- DAE = 0x80, // data alignment enable
- };
-
private:
u8 config2;
};
@@ -285,56 +292,26 @@ class ncr53c94_device : public ncr53c90a_device
public:
ncr53c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- enum busmd_t : u8
- {
- BUSMD_0 = 0, // single bus: 8-bit host, 8 bit dma
- BUSMD_1 = 1, // single bus: 8 bit host, 16 bit dma
- BUSMD_2 = 2, // two buses: 8 bit multiplexed host, 16 bit dma
- BUSMD_3 = 3, // two buses: 8 bit host, 16 bit dma
- };
- void set_busmd(busmd_t const busmd) { m_busmd = busmd; }
-
virtual void map(address_map &map) override;
- uint8_t conf3_r() { return config3; };
- void conf3_w(uint8_t data) { config3 = data; };
- void fifo_align_w(uint8_t data) { fifo_align = data; };
-
- virtual uint8_t read(offs_t offset) override;
- virtual void write(offs_t offset, uint8_t data) override;
+ DECLARE_READ8_MEMBER(conf3_r) { return config3; };
+ DECLARE_WRITE8_MEMBER(conf3_w) { config3 = data; };
+ DECLARE_WRITE8_MEMBER(fifo_align_w) { fifo_align = data; };
- u16 dma16_r();
- void dma16_w(u16 data);
+ virtual DECLARE_READ8_MEMBER(read) override;
+ virtual DECLARE_WRITE8_MEMBER(write) override;
protected:
- ncr53c94_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
-
- enum conf3_mask : u8
- {
- BS8 = 0x01, // burst size 8
- MDM = 0x02, // modify dma mode
- LBTM = 0x04, // last byte transfer mode
- };
-
virtual void device_start() override;
- virtual void device_reset() override;
- virtual void check_drq() override;
+ virtual void reset_soft() override;
private:
u8 config3;
u8 fifo_align;
- busmd_t m_busmd;
-};
-
-class ncr53cf94_device : public ncr53c94_device
-{
-public:
- ncr53cf94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
DECLARE_DEVICE_TYPE(NCR5390, ncr5390_device)
DECLARE_DEVICE_TYPE(NCR53C90A, ncr53c90a_device)
DECLARE_DEVICE_TYPE(NCR53C94, ncr53c94_device)
-DECLARE_DEVICE_TYPE(NCR53CF94, ncr53cf94_device)
#endif // MAME_MACHINE_NCR5390_H