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Diffstat (limited to 'src/devices/machine/mcf5206e.h')
-rw-r--r--src/devices/machine/mcf5206e.h194
1 files changed, 100 insertions, 94 deletions
diff --git a/src/devices/machine/mcf5206e.h b/src/devices/machine/mcf5206e.h
index a910849a25d..d4ec0dd7980 100644
--- a/src/devices/machine/mcf5206e.h
+++ b/src/devices/machine/mcf5206e.h
@@ -23,18 +23,24 @@ class mcf5206e_peripheral_device : public device_t,
{
public:
// construction/destruction
+ template <typename T>
+ mcf5206e_peripheral_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag)
+ : mcf5206e_peripheral_device(mconfig, tag, owner, clock)
+ {
+ m_maincpu.set_tag(std::forward<T>(cpu_tag));
+ }
+
mcf5206e_peripheral_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- DECLARE_READ32_MEMBER( dev_r );
- DECLARE_WRITE32_MEMBER( dev_w );
- DECLARE_READ32_MEMBER( seta2_coldfire_regs_r );
- DECLARE_WRITE32_MEMBER( seta2_coldfire_regs_w );
+ uint32_t dev_r(offs_t offset, uint32_t mem_mask = ~0);
+ void dev_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t seta2_coldfire_regs_r(offs_t offset);
+ void seta2_coldfire_regs_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
- virtual void device_post_load() override { }
virtual void device_clock_changed() override { }
virtual space_config_vector memory_space_config() const override;
@@ -52,94 +58,94 @@ private:
uint16_t CSCR_r(int which, int offset, uint16_t mem_mask);
void CSCR_w(int which, int offset, uint16_t data, uint16_t mem_mask);
- DECLARE_READ8_MEMBER( ICR1_ICR2_ICR3_ICR4_r );
- DECLARE_WRITE8_MEMBER( ICR1_ICR2_ICR3_ICR4_w );
-
- DECLARE_READ8_MEMBER( ICR9_ICR10_ICR11_ICR12_r );
- DECLARE_WRITE8_MEMBER( ICR9_ICR10_ICR11_ICR12_w );
- DECLARE_READ8_MEMBER( ICR13_r );
- DECLARE_WRITE8_MEMBER( ICR13_w );
-
- DECLARE_READ16_MEMBER( CSAR0_r );
- DECLARE_WRITE16_MEMBER( CSAR0_w );
- DECLARE_READ32_MEMBER( CSMR0_r );
- DECLARE_WRITE32_MEMBER( CSMR0_w );
- DECLARE_READ16_MEMBER( CSCR0_r );
- DECLARE_WRITE16_MEMBER( CSCR0_w );
- DECLARE_READ16_MEMBER( CSAR1_r );
- DECLARE_WRITE16_MEMBER( CSAR1_w );
- DECLARE_READ32_MEMBER( CSMR1_r );
- DECLARE_WRITE32_MEMBER( CSMR1_w );
- DECLARE_READ16_MEMBER( CSCR1_r );
- DECLARE_WRITE16_MEMBER( CSCR1_w );
- DECLARE_READ16_MEMBER( CSAR2_r );
- DECLARE_WRITE16_MEMBER( CSAR2_w );
- DECLARE_READ32_MEMBER( CSMR2_r );
- DECLARE_WRITE32_MEMBER( CSMR2_w );
- DECLARE_READ16_MEMBER( CSCR2_r );
- DECLARE_WRITE16_MEMBER( CSCR2_w );
- DECLARE_READ16_MEMBER( CSAR3_r );
- DECLARE_WRITE16_MEMBER( CSAR3_w );
- DECLARE_READ32_MEMBER( CSMR3_r );
- DECLARE_WRITE32_MEMBER( CSMR3_w );
- DECLARE_READ16_MEMBER( CSCR3_r );
- DECLARE_WRITE16_MEMBER( CSCR3_w );
- DECLARE_READ16_MEMBER( CSAR4_r );
- DECLARE_WRITE16_MEMBER( CSAR4_w );
- DECLARE_READ32_MEMBER( CSMR4_r );
- DECLARE_WRITE32_MEMBER( CSMR4_w );
- DECLARE_READ16_MEMBER( CSCR4_r );
- DECLARE_WRITE16_MEMBER( CSCR4_w );
- DECLARE_READ16_MEMBER( CSAR5_r );
- DECLARE_WRITE16_MEMBER( CSAR5_w );
- DECLARE_READ32_MEMBER( CSMR5_r );
- DECLARE_WRITE32_MEMBER( CSMR5_w );
- DECLARE_READ16_MEMBER( CSCR5_r );
- DECLARE_WRITE16_MEMBER( CSCR5_w );
- DECLARE_READ16_MEMBER( CSAR6_r );
- DECLARE_WRITE16_MEMBER( CSAR6_w );
- DECLARE_READ32_MEMBER( CSMR6_r );
- DECLARE_WRITE32_MEMBER( CSMR6_w );
- DECLARE_READ16_MEMBER( CSCR6_r );
- DECLARE_WRITE16_MEMBER( CSCR6_w );
- DECLARE_READ16_MEMBER( CSAR7_r );
- DECLARE_WRITE16_MEMBER( CSAR7_w );
- DECLARE_READ32_MEMBER( CSMR7_r );
- DECLARE_WRITE32_MEMBER( CSMR7_w );
- DECLARE_READ16_MEMBER( CSCR7_r );
- DECLARE_WRITE16_MEMBER( CSCR7_w );
-
- DECLARE_READ16_MEMBER( DMCR_r );
- DECLARE_WRITE16_MEMBER( DMCR_w );
- DECLARE_READ16_MEMBER( PAR_r );
- DECLARE_WRITE16_MEMBER( PAR_w );
-
- DECLARE_READ16_MEMBER( TMR1_r );
- DECLARE_WRITE16_MEMBER( TMR1_w );
- DECLARE_READ16_MEMBER( TRR1_r );
- DECLARE_WRITE16_MEMBER( TRR1_w );
- DECLARE_READ8_MEMBER( TER1_r );
- DECLARE_WRITE8_MEMBER(TER1_w );
- DECLARE_READ16_MEMBER( TCN1_r );
- DECLARE_WRITE16_MEMBER( TCN1_w );
-
- DECLARE_READ8_MEMBER( PPDDR_r );
- DECLARE_WRITE8_MEMBER( PPDDR_w );
- DECLARE_READ8_MEMBER( PPDAT_r );
- DECLARE_WRITE8_MEMBER( PPDAT_w );
-
- DECLARE_READ16_MEMBER( IMR_r );
- DECLARE_WRITE16_MEMBER( IMR_w );
-
-
- DECLARE_READ8_MEMBER( MBCR_r );
- DECLARE_WRITE8_MEMBER( MBCR_w );
- DECLARE_READ8_MEMBER( MBSR_r );
- DECLARE_WRITE8_MEMBER( MBSR_w );
- DECLARE_READ8_MEMBER( MFDR_r );
- DECLARE_WRITE8_MEMBER( MFDR_w );
- DECLARE_READ8_MEMBER( MBDR_r );
- DECLARE_WRITE8_MEMBER( MBDR_w );
+ uint8_t ICR1_ICR2_ICR3_ICR4_r(offs_t offset);
+ void ICR1_ICR2_ICR3_ICR4_w(offs_t offset, uint8_t data);
+
+ uint8_t ICR9_ICR10_ICR11_ICR12_r(offs_t offset);
+ void ICR9_ICR10_ICR11_ICR12_w(offs_t offset, uint8_t data);
+ uint8_t ICR13_r(offs_t offset);
+ void ICR13_w(offs_t offset, uint8_t data);
+
+ uint16_t CSAR0_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSAR0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint32_t CSMR0_r(offs_t offset, uint32_t mem_mask = ~0);
+ void CSMR0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t CSCR0_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSCR0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t CSAR1_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSAR1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint32_t CSMR1_r(offs_t offset, uint32_t mem_mask = ~0);
+ void CSMR1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t CSCR1_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSCR1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t CSAR2_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSAR2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint32_t CSMR2_r(offs_t offset, uint32_t mem_mask = ~0);
+ void CSMR2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t CSCR2_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSCR2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t CSAR3_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSAR3_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint32_t CSMR3_r(offs_t offset, uint32_t mem_mask = ~0);
+ void CSMR3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t CSCR3_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSCR3_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t CSAR4_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSAR4_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint32_t CSMR4_r(offs_t offset, uint32_t mem_mask = ~0);
+ void CSMR4_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t CSCR4_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSCR4_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t CSAR5_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSAR5_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint32_t CSMR5_r(offs_t offset, uint32_t mem_mask = ~0);
+ void CSMR5_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t CSCR5_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSCR5_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t CSAR6_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSAR6_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint32_t CSMR6_r(offs_t offset, uint32_t mem_mask = ~0);
+ void CSMR6_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t CSCR6_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSCR6_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t CSAR7_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSAR7_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint32_t CSMR7_r(offs_t offset, uint32_t mem_mask = ~0);
+ void CSMR7_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint16_t CSCR7_r(offs_t offset, uint16_t mem_mask = ~0);
+ void CSCR7_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+
+ uint16_t DMCR_r(offs_t offset, uint16_t mem_mask = ~0);
+ void DMCR_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t PAR_r(offs_t offset, uint16_t mem_mask = ~0);
+ void PAR_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+
+ uint16_t TMR1_r(offs_t offset, uint16_t mem_mask = ~0);
+ void TMR1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint16_t TRR1_r(offs_t offset, uint16_t mem_mask = ~0);
+ void TRR1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ uint8_t TER1_r(offs_t offset);
+ void TER1_w(offs_t offset, uint8_t data);
+ uint16_t TCN1_r(offs_t offset, uint16_t mem_mask = ~0);
+ void TCN1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+
+ uint8_t PPDDR_r(offs_t offset);
+ void PPDDR_w(offs_t offset, uint8_t data);
+ uint8_t PPDAT_r(offs_t offset);
+ void PPDAT_w(offs_t offset, uint8_t data);
+
+ uint16_t IMR_r(offs_t offset, uint16_t mem_mask = ~0);
+ void IMR_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+
+
+ uint8_t MBCR_r(offs_t offset);
+ void MBCR_w(offs_t offset, uint8_t data);
+ uint8_t MBSR_r(offs_t offset);
+ void MBSR_w(offs_t offset, uint8_t data);
+ uint8_t MFDR_r(offs_t offset);
+ void MFDR_w(offs_t offset, uint8_t data);
+ uint8_t MBDR_r(offs_t offset);
+ void MBDR_w(offs_t offset, uint8_t data);
void coldfire_regs_map(address_map &map);
@@ -161,7 +167,7 @@ private:
MAX_ICR
};
- cpu_device* m_cpu;
+ required_device<cpu_device> m_maincpu;
address_space_config m_space_config;