diff options
Diffstat (limited to 'src/devices/machine/cs4031.h')
-rw-r--r-- | src/devices/machine/cs4031.h | 110 |
1 files changed, 50 insertions, 60 deletions
diff --git a/src/devices/machine/cs4031.h b/src/devices/machine/cs4031.h index 3e554e91904..d8376f538f9 100644 --- a/src/devices/machine/cs4031.h +++ b/src/devices/machine/cs4031.h @@ -1,23 +1,9 @@ -// license:GPL-2.0+ +// license:BSD-3-Clause // copyright-holders:Dirk Best /*************************************************************************** Chips & Technologies CS4031 chipset - Chipset for 486 based PC/AT compatible systems. Consists of two - individual chips: - - * F84031 - - DRAM controller - - ISA-bus controller - - VESA VL-BUS controller - - * F84035 (82C206 IPC core) - - 2x 8257 DMA controller - - 2x 8259 interrupt controller - - 8254 timer - - MC14818 RTC - ***************************************************************************/ #ifndef MAME_MACHINE_CS4031_H @@ -30,19 +16,21 @@ #include "machine/pit8253.h" #include "machine/ds128x.h" #include "machine/at_keybc.h" +#include "machine/ram.h" class cs4031_device : public device_t { public: // construction/destruction - template <typename T, typename U, typename V, typename W> - cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cputag, U &&isatag, V &&biostag, W &&keybctag) + template <typename T, typename U, typename V, typename W, typename X> + cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cputag, U &&isatag, V &&biostag, W &&keybctag, X &&ramtag) : cs4031_device(mconfig, tag, owner, clock) { set_cputag(std::forward<T>(cputag)); set_isatag(std::forward<U>(isatag)); set_biostag(std::forward<V>(biostag)); set_keybctag(std::forward<W>(keybctag)); + set_ramtag(std::forward<X>(ramtag)); } cs4031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -64,7 +52,7 @@ public: void config_data_w(uint8_t data); uint8_t portb_r(); void portb_w(uint8_t data); - void rtc_w(offs_t offset, uint8_t data); + void rtc_nmi_w(uint8_t data); void sysctrl_w(uint8_t data); uint8_t sysctrl_r(); uint8_t dma_page_r(offs_t offset) { return m_dma_page[offset]; } @@ -78,30 +66,30 @@ public: void keyb_command_blocked_w(uint8_t data); // input lines - DECLARE_WRITE_LINE_MEMBER( irq01_w ) { m_intc1->ir1_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq03_w ) { m_intc1->ir3_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq04_w ) { m_intc1->ir4_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq05_w ) { m_intc1->ir5_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq06_w ) { m_intc1->ir6_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq07_w ) { m_intc1->ir7_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq09_w ) { m_intc2->ir1_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq10_w ) { m_intc2->ir2_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq11_w ) { m_intc2->ir3_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq12_w ) { m_intc2->ir4_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq13_w ) { m_intc2->ir5_w(state); } // also FERR# - DECLARE_WRITE_LINE_MEMBER( irq14_w ) { m_intc2->ir6_w(state); } - DECLARE_WRITE_LINE_MEMBER( irq15_w ) { m_intc2->ir7_w(state); } - DECLARE_WRITE_LINE_MEMBER( dreq0_w ) { m_dma1->dreq0_w(state); } - DECLARE_WRITE_LINE_MEMBER( dreq1_w ) { m_dma1->dreq1_w(state); } - DECLARE_WRITE_LINE_MEMBER( dreq2_w ) { m_dma1->dreq2_w(state); } - DECLARE_WRITE_LINE_MEMBER( dreq3_w ) { m_dma1->dreq3_w(state); } - DECLARE_WRITE_LINE_MEMBER( dreq5_w ) { m_dma2->dreq1_w(state); } - DECLARE_WRITE_LINE_MEMBER( dreq6_w ) { m_dma2->dreq2_w(state); } - DECLARE_WRITE_LINE_MEMBER( dreq7_w ) { m_dma2->dreq3_w(state); } - DECLARE_WRITE_LINE_MEMBER( hlda_w ) { m_dma2->hack_w(state); } - DECLARE_WRITE_LINE_MEMBER( iochck_w ); - DECLARE_WRITE_LINE_MEMBER( gatea20_w ); - DECLARE_WRITE_LINE_MEMBER( kbrst_w ); + void irq01_w(int state) { m_intc1->ir1_w(state); } + void irq03_w(int state) { m_intc1->ir3_w(state); } + void irq04_w(int state) { m_intc1->ir4_w(state); } + void irq05_w(int state) { m_intc1->ir5_w(state); } + void irq06_w(int state) { m_intc1->ir6_w(state); } + void irq07_w(int state) { m_intc1->ir7_w(state); } + void irq09_w(int state) { m_intc2->ir1_w(state); } + void irq10_w(int state) { m_intc2->ir2_w(state); } + void irq11_w(int state) { m_intc2->ir3_w(state); } + void irq12_w(int state) { m_intc2->ir4_w(state); } + void irq13_w(int state) { m_intc2->ir5_w(state); } // also FERR# + void irq14_w(int state) { m_intc2->ir6_w(state); } + void irq15_w(int state) { m_intc2->ir7_w(state); } + void dreq0_w(int state) { m_dma1->dreq0_w(state); } + void dreq1_w(int state) { m_dma1->dreq1_w(state); } + void dreq2_w(int state) { m_dma1->dreq2_w(state); } + void dreq3_w(int state) { m_dma1->dreq3_w(state); } + void dreq5_w(int state) { m_dma2->dreq1_w(state); } + void dreq6_w(int state) { m_dma2->dreq2_w(state); } + void dreq7_w(int state) { m_dma2->dreq3_w(state); } + void hlda_w(int state) { m_dma2->hack_w(state); } + void iochck_w(int state); + void gatea20_w(int state); + void kbrst_w(int state); IRQ_CALLBACK_MEMBER(int_ack_r) { return m_intc1->acknowledge(); } @@ -110,14 +98,15 @@ public: template <typename T> void set_isatag(T &&tag) { m_isa.set_tag(std::forward<T>(tag)); } template <typename T> void set_biostag(T &&tag) { m_bios.set_tag(std::forward<T>(tag)); } template <typename T> void set_keybctag(T &&tag) { m_keybc.set_tag(std::forward<T>(tag)); } + template <typename T> void set_ramtag(T &&tag) { m_ram_dev.set_tag(std::forward<T>(tag)); } protected: // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; virtual void device_reset_after_children() override; // optional information overrides - virtual void device_add_mconfig(machine_config &config) override; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; private: devcb_read16 m_read_ior; @@ -142,8 +131,8 @@ private: void fast_gatea20(int state); void keyboard_gatea20(int state); - void update_read_region(int index, const char *region, offs_t start, offs_t end); - void update_write_region(int index, const char *region, offs_t start, offs_t end); + void update_read_region(int index, offs_t start, offs_t end); + void update_write_region(int index, offs_t start, offs_t end); void update_read_regions(); void update_write_regions(); @@ -164,6 +153,7 @@ private: required_device<pic8259_device> m_intc2; required_device<pit8254_device> m_ctc; required_device<ds12885_device> m_rtc; + required_device<ram_device> m_ram_dev; int m_dma_eop; uint8_t m_dma_page[0x10]; @@ -209,7 +199,7 @@ private: void dma_write_byte(offs_t offset, uint8_t data); uint8_t dma_read_word(offs_t offset); void dma_write_word(offs_t offset, uint8_t data); - DECLARE_WRITE_LINE_MEMBER( dma1_eop_w ); + void dma1_eop_w(int state); uint8_t dma1_ior0_r() { return m_read_ior(0); } uint8_t dma1_ior1_r() { return m_read_ior(1); } uint8_t dma1_ior2_r() { return m_read_ior(2); } @@ -224,19 +214,19 @@ private: void dma2_iow1_w(uint8_t data) { m_write_iow(5, (m_dma_high_byte << 8) | data, 0xffff); } void dma2_iow2_w(uint8_t data) { m_write_iow(6, (m_dma_high_byte << 8) | data, 0xffff); } void dma2_iow3_w(uint8_t data) { m_write_iow(7, (m_dma_high_byte << 8) | data, 0xffff); } - DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); } - DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); } - DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); } - DECLARE_WRITE_LINE_MEMBER( dma1_dack3_w ) { set_dma_channel(3, state); } - DECLARE_WRITE_LINE_MEMBER( dma2_dack0_w ); - DECLARE_WRITE_LINE_MEMBER( dma2_dack1_w ) { set_dma_channel(5, state); } - DECLARE_WRITE_LINE_MEMBER( dma2_dack2_w ) { set_dma_channel(6, state); } - DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); } - DECLARE_WRITE_LINE_MEMBER( dma2_hreq_w ) { m_write_hold(state); } - DECLARE_WRITE_LINE_MEMBER( intc1_int_w ) { m_write_intr(state); } + void dma1_dack0_w(int state) { set_dma_channel(0, state); } + void dma1_dack1_w(int state) { set_dma_channel(1, state); } + void dma1_dack2_w(int state) { set_dma_channel(2, state); } + void dma1_dack3_w(int state) { set_dma_channel(3, state); } + void dma2_dack0_w(int state); + void dma2_dack1_w(int state) { set_dma_channel(5, state); } + void dma2_dack2_w(int state) { set_dma_channel(6, state); } + void dma2_dack3_w(int state) { set_dma_channel(7, state); } + void dma2_hreq_w(int state) { m_write_hold(state); } + void intc1_int_w(int state) { m_write_intr(state); } uint8_t intc1_slave_ack_r(offs_t offset); - DECLARE_WRITE_LINE_MEMBER( ctc_out1_w ); - DECLARE_WRITE_LINE_MEMBER( ctc_out2_w ); + void ctc_out1_w(int state); + void ctc_out2_w(int state); }; DECLARE_DEVICE_TYPE(CS4031, cs4031_device) |