diff options
Diffstat (limited to 'src/devices/machine/am9517a.cpp')
-rw-r--r-- | src/devices/machine/am9517a.cpp | 65 |
1 files changed, 45 insertions, 20 deletions
diff --git a/src/devices/machine/am9517a.cpp b/src/devices/machine/am9517a.cpp index 463f1c447ef..5fda6ed486c 100644 --- a/src/devices/machine/am9517a.cpp +++ b/src/devices/machine/am9517a.cpp @@ -39,6 +39,18 @@ */ +/* + * The EISA_DMA device represents the 82C37A-compatible DMA devices present in + * EISA bus systems, in particular those embedded within the i82357 Integrated + * System Peripheral. The device supports 32 bit addressing, 32 bit data sizes, + * and 24 bit transfer counts, allowing DMA across 64k boundaries. It also adds + * stop registers, supporting ring-buffer memory arrangements. + * + * TODO + * - stop registers + * - 16/32-bit transfer sizes + */ + #include "emu.h" #include "am9517a.h" @@ -54,6 +66,7 @@ DEFINE_DEVICE_TYPE(AM9517A, am9517a_device, "am9517a", "AM9517A") DEFINE_DEVICE_TYPE(V5X_DMAU, v5x_dmau_device, "v5x_dmau", "V5X DMAU") DEFINE_DEVICE_TYPE(PCXPORT_DMAC, pcxport_dmac_device, "pcx_dmac", "PC Transporter DMAC") +DEFINE_DEVICE_TYPE(EISA_DMA, eisa_dma_device, "eisa_dma", "EISA DMA") //************************************************************************** @@ -290,8 +303,6 @@ inline void am9517a_device::dma_advance() { bool msb_changed = false; - m_channel[m_current_channel].m_count--; - if (m_current_channel || !COMMAND_MEM_TO_MEM || !COMMAND_CH0_ADDRESS_HOLD) { if (MODE_ADDRESS_DECREMENT) @@ -316,7 +327,7 @@ inline void am9517a_device::dma_advance() } } - if (m_channel[m_current_channel].m_count == 0xffff) + if (m_channel[m_current_channel].m_count-- == 0) { end_of_process(); } @@ -712,7 +723,7 @@ void am9517a_device::execute_run() // read - //------------------------------------------------- -READ8_MEMBER( am9517a_device::read ) +uint8_t am9517a_device::read(offs_t offset) { uint8_t data = 0; @@ -776,7 +787,7 @@ READ8_MEMBER( am9517a_device::read ) // write - //------------------------------------------------- -WRITE8_MEMBER( am9517a_device::write ) +void am9517a_device::write(offs_t offset, uint8_t data) { if (!BIT(offset, 3)) { @@ -1013,7 +1024,7 @@ void v5x_dmau_device::device_reset() } -READ8_MEMBER(v5x_dmau_device::read) +uint8_t v5x_dmau_device::read(offs_t offset) { uint8_t ret = 0; int channel = m_selected_channel; @@ -1097,7 +1108,7 @@ READ8_MEMBER(v5x_dmau_device::read) return ret; } -WRITE8_MEMBER(v5x_dmau_device::write) +void v5x_dmau_device::write(offs_t offset, uint8_t data) { int channel = m_selected_channel; @@ -1108,12 +1119,12 @@ WRITE8_MEMBER(v5x_dmau_device::write) //m_buswidth = data & 0x02; //if (data & 0x01) // soft_reset(); - logerror("DMA: Initialise [%02x]\n", data); + LOG("DMA: Initialise [%02x]\n", data); break; case 0x01: // Channel m_selected_channel = data & 0x03; m_base = data & 0x04; - logerror("DMA: Channel selected [%02x]\n", data); + LOG("DMA: Channel selected [%02x]\n", data); break; case 0x02: // Count (low) m_channel[channel].m_base_count = @@ -1121,7 +1132,7 @@ WRITE8_MEMBER(v5x_dmau_device::write) if (m_base == 0) m_channel[channel].m_count = (m_channel[channel].m_count & 0xff00) | data; - logerror("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count); + LOG("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count); break; case 0x03: // Count (high) m_channel[channel].m_base_count = @@ -1129,7 +1140,7 @@ WRITE8_MEMBER(v5x_dmau_device::write) if (m_base == 0) m_channel[channel].m_count = (m_channel[channel].m_count & 0x00ff) | (data << 8); - logerror("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count); + LOG("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count); break; case 0x04: // Address (low) m_channel[channel].m_base_address = @@ -1137,7 +1148,7 @@ WRITE8_MEMBER(v5x_dmau_device::write) if (m_base == 0) m_channel[channel].m_address = (m_channel[channel].m_address & 0xffffff00) | data; - logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); + LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); break; case 0x05: // Address (mid) m_channel[channel].m_base_address = @@ -1145,7 +1156,7 @@ WRITE8_MEMBER(v5x_dmau_device::write) if (m_base == 0) m_channel[channel].m_address = (m_channel[channel].m_address & 0xffff00ff) | (data << 8); - logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); + LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); break; case 0x06: // Address (high) m_channel[channel].m_base_address = @@ -1153,7 +1164,7 @@ WRITE8_MEMBER(v5x_dmau_device::write) if (m_base == 0) m_channel[channel].m_address = (m_channel[channel].m_address & 0xff00ffff) | (data << 16); - logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); + LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); break; case 0x07: // Address (highest) m_channel[channel].m_base_address = @@ -1161,31 +1172,31 @@ WRITE8_MEMBER(v5x_dmau_device::write) if (m_base == 0) m_channel[channel].m_address = (m_channel[channel].m_address & 0x00ffffff) | (data << 24); - logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); + LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address); break; case 0x0a: // Mode control m_channel[channel].m_mode = data; // clear terminal count m_status &= ~(1 << channel); - logerror("DMA: Channel %i Mode control set [%02x]\n",m_selected_channel,m_channel[channel].m_mode); + LOG("DMA: Channel %i Mode control set [%02x]\n",m_selected_channel,m_channel[channel].m_mode); break; case 0x08: // Device control (low) m_command = data; - logerror("DMA: Device control low set [%02x]\n",data); + LOG("DMA: Device control low set [%02x]\n",data); break; case 0x09: // Device control (high) m_command_high = data; - logerror("DMA: Device control high set [%02x]\n",data); + LOG("DMA: Device control high set [%02x]\n",data); break; case 0x0e: // Request //m_reg.request = data; - logerror("(invalid) DMA: Request set [%02x]\n",data); // no software requests on the v53 integrated version + LOG("(invalid) DMA: Request set [%02x]\n",data); // no software requests on the v53 integrated version break; case 0x0f: // Mask m_mask = data & 0x0f; - logerror("DMA: Mask set [%02x]\n",data); + LOG("DMA: Mask set [%02x]\n",data); break; @@ -1298,3 +1309,17 @@ void pcxport_dmac_device::end_of_process() m_state = STATE_SI; } + +eisa_dma_device::eisa_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : am9517a_device(mconfig, EISA_DMA, tag, owner, clock) +{ +} + +void eisa_dma_device::device_start() +{ + am9517a_device::device_start(); + + m_address_mask = 0xffffffffU; + + save_item(NAME(m_stop)); +} |