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Diffstat (limited to 'src/devices/machine/am9517a.cpp')
-rw-r--r--src/devices/machine/am9517a.cpp65
1 files changed, 20 insertions, 45 deletions
diff --git a/src/devices/machine/am9517a.cpp b/src/devices/machine/am9517a.cpp
index 5fda6ed486c..463f1c447ef 100644
--- a/src/devices/machine/am9517a.cpp
+++ b/src/devices/machine/am9517a.cpp
@@ -39,18 +39,6 @@
*/
-/*
- * The EISA_DMA device represents the 82C37A-compatible DMA devices present in
- * EISA bus systems, in particular those embedded within the i82357 Integrated
- * System Peripheral. The device supports 32 bit addressing, 32 bit data sizes,
- * and 24 bit transfer counts, allowing DMA across 64k boundaries. It also adds
- * stop registers, supporting ring-buffer memory arrangements.
- *
- * TODO
- * - stop registers
- * - 16/32-bit transfer sizes
- */
-
#include "emu.h"
#include "am9517a.h"
@@ -66,7 +54,6 @@
DEFINE_DEVICE_TYPE(AM9517A, am9517a_device, "am9517a", "AM9517A")
DEFINE_DEVICE_TYPE(V5X_DMAU, v5x_dmau_device, "v5x_dmau", "V5X DMAU")
DEFINE_DEVICE_TYPE(PCXPORT_DMAC, pcxport_dmac_device, "pcx_dmac", "PC Transporter DMAC")
-DEFINE_DEVICE_TYPE(EISA_DMA, eisa_dma_device, "eisa_dma", "EISA DMA")
//**************************************************************************
@@ -303,6 +290,8 @@ inline void am9517a_device::dma_advance()
{
bool msb_changed = false;
+ m_channel[m_current_channel].m_count--;
+
if (m_current_channel || !COMMAND_MEM_TO_MEM || !COMMAND_CH0_ADDRESS_HOLD)
{
if (MODE_ADDRESS_DECREMENT)
@@ -327,7 +316,7 @@ inline void am9517a_device::dma_advance()
}
}
- if (m_channel[m_current_channel].m_count-- == 0)
+ if (m_channel[m_current_channel].m_count == 0xffff)
{
end_of_process();
}
@@ -723,7 +712,7 @@ void am9517a_device::execute_run()
// read -
//-------------------------------------------------
-uint8_t am9517a_device::read(offs_t offset)
+READ8_MEMBER( am9517a_device::read )
{
uint8_t data = 0;
@@ -787,7 +776,7 @@ uint8_t am9517a_device::read(offs_t offset)
// write -
//-------------------------------------------------
-void am9517a_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( am9517a_device::write )
{
if (!BIT(offset, 3))
{
@@ -1024,7 +1013,7 @@ void v5x_dmau_device::device_reset()
}
-uint8_t v5x_dmau_device::read(offs_t offset)
+READ8_MEMBER(v5x_dmau_device::read)
{
uint8_t ret = 0;
int channel = m_selected_channel;
@@ -1108,7 +1097,7 @@ uint8_t v5x_dmau_device::read(offs_t offset)
return ret;
}
-void v5x_dmau_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(v5x_dmau_device::write)
{
int channel = m_selected_channel;
@@ -1119,12 +1108,12 @@ void v5x_dmau_device::write(offs_t offset, uint8_t data)
//m_buswidth = data & 0x02;
//if (data & 0x01)
// soft_reset();
- LOG("DMA: Initialise [%02x]\n", data);
+ logerror("DMA: Initialise [%02x]\n", data);
break;
case 0x01: // Channel
m_selected_channel = data & 0x03;
m_base = data & 0x04;
- LOG("DMA: Channel selected [%02x]\n", data);
+ logerror("DMA: Channel selected [%02x]\n", data);
break;
case 0x02: // Count (low)
m_channel[channel].m_base_count =
@@ -1132,7 +1121,7 @@ void v5x_dmau_device::write(offs_t offset, uint8_t data)
if (m_base == 0)
m_channel[channel].m_count =
(m_channel[channel].m_count & 0xff00) | data;
- LOG("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
+ logerror("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
break;
case 0x03: // Count (high)
m_channel[channel].m_base_count =
@@ -1140,7 +1129,7 @@ void v5x_dmau_device::write(offs_t offset, uint8_t data)
if (m_base == 0)
m_channel[channel].m_count =
(m_channel[channel].m_count & 0x00ff) | (data << 8);
- LOG("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
+ logerror("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
break;
case 0x04: // Address (low)
m_channel[channel].m_base_address =
@@ -1148,7 +1137,7 @@ void v5x_dmau_device::write(offs_t offset, uint8_t data)
if (m_base == 0)
m_channel[channel].m_address =
(m_channel[channel].m_address & 0xffffff00) | data;
- LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
+ logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break;
case 0x05: // Address (mid)
m_channel[channel].m_base_address =
@@ -1156,7 +1145,7 @@ void v5x_dmau_device::write(offs_t offset, uint8_t data)
if (m_base == 0)
m_channel[channel].m_address =
(m_channel[channel].m_address & 0xffff00ff) | (data << 8);
- LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
+ logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break;
case 0x06: // Address (high)
m_channel[channel].m_base_address =
@@ -1164,7 +1153,7 @@ void v5x_dmau_device::write(offs_t offset, uint8_t data)
if (m_base == 0)
m_channel[channel].m_address =
(m_channel[channel].m_address & 0xff00ffff) | (data << 16);
- LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
+ logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break;
case 0x07: // Address (highest)
m_channel[channel].m_base_address =
@@ -1172,31 +1161,31 @@ void v5x_dmau_device::write(offs_t offset, uint8_t data)
if (m_base == 0)
m_channel[channel].m_address =
(m_channel[channel].m_address & 0x00ffffff) | (data << 24);
- LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
+ logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break;
case 0x0a: // Mode control
m_channel[channel].m_mode = data;
// clear terminal count
m_status &= ~(1 << channel);
- LOG("DMA: Channel %i Mode control set [%02x]\n",m_selected_channel,m_channel[channel].m_mode);
+ logerror("DMA: Channel %i Mode control set [%02x]\n",m_selected_channel,m_channel[channel].m_mode);
break;
case 0x08: // Device control (low)
m_command = data;
- LOG("DMA: Device control low set [%02x]\n",data);
+ logerror("DMA: Device control low set [%02x]\n",data);
break;
case 0x09: // Device control (high)
m_command_high = data;
- LOG("DMA: Device control high set [%02x]\n",data);
+ logerror("DMA: Device control high set [%02x]\n",data);
break;
case 0x0e: // Request
//m_reg.request = data;
- LOG("(invalid) DMA: Request set [%02x]\n",data); // no software requests on the v53 integrated version
+ logerror("(invalid) DMA: Request set [%02x]\n",data); // no software requests on the v53 integrated version
break;
case 0x0f: // Mask
m_mask = data & 0x0f;
- LOG("DMA: Mask set [%02x]\n",data);
+ logerror("DMA: Mask set [%02x]\n",data);
break;
@@ -1309,17 +1298,3 @@ void pcxport_dmac_device::end_of_process()
m_state = STATE_SI;
}
-
-eisa_dma_device::eisa_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : am9517a_device(mconfig, EISA_DMA, tag, owner, clock)
-{
-}
-
-void eisa_dma_device::device_start()
-{
- am9517a_device::device_start();
-
- m_address_mask = 0xffffffffU;
-
- save_item(NAME(m_stop));
-}