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Diffstat (limited to 'src/devices/machine/68307tmu.cpp')
-rw-r--r--src/devices/machine/68307tmu.cpp198
1 files changed, 98 insertions, 100 deletions
diff --git a/src/devices/machine/68307tmu.cpp b/src/devices/machine/68307tmu.cpp
index 5deb48a9f85..c83a0855f29 100644
--- a/src/devices/machine/68307tmu.cpp
+++ b/src/devices/machine/68307tmu.cpp
@@ -4,105 +4,105 @@
// 2x timers
#include "emu.h"
-#include "68307.h"
-
-READ16_MEMBER( m68307cpu_device::m68307_internal_timer_r )
+#include "68307tmu.h"
+
+#define m68307TIMER_TMR (0x0)
+#define m68307TIMER_TRR (0x1)
+#define m68307TIMER_TCR (0x2)
+#define m68307TIMER_TCN (0x3)
+#define m68307TIMER_TER (0x4)
+#define m68307TIMER_WRR (0x5)
+#define m68307TIMER_WCR (0x6)
+#define m68307TIMER_XXX (0x7)
+
+READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r )
{
- m68307cpu_device *m68k = this;
- m68307_timer* timer = m68k->m68307TIMER;
- assert(timer != nullptr);
+ assert(m68307TIMER);
+ m68307_timer &timer = *m68307TIMER;
+
+ int pc = space.device().safe_pc();
+ int which = offset & 0x8;
- if (timer)
+ switch (offset&0x7)
{
- int pc = space.device().safe_pc();
- int which = offset & 0x8;
-
- switch (offset&0x7)
- {
- case m68307TIMER_TCN: /* 0x3 (0x126 / 0x136) */
- //if (pc!=0x2182e) logerror("%08x m68307_internal_timer_r %08x (%04x) (TCN - Timer Counter for timer %d)\n", pc, offset*2,mem_mask, which);
- return timer->read_tcn(mem_mask, which);
-
- default:
- logerror("%08x m68307_internal_timer_r %08x, (%04x)\n", pc, offset*2,mem_mask);
- break;
- }
+ case m68307TIMER_TCN: /* 0x3 (0x126 / 0x136) */
+ //if (pc!=0x2182e) logerror("%08x m68307_internal_timer_r %08x (%04x) (TCN - Timer Counter for timer %d)\n", pc, offset*2,mem_mask, which);
+ return timer.read_tcn(mem_mask, which);
+
+ default:
+ logerror("%08x m68307_internal_timer_r %08x, (%04x)\n", pc, offset*2,mem_mask);
+ break;
}
return 0x0000;
}
-WRITE16_MEMBER( m68307cpu_device::m68307_internal_timer_w )
+WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w )
{
- m68307cpu_device *m68k = this;
- m68307_timer* timer = m68k->m68307TIMER;
- assert(timer != nullptr);
+ assert(m68307TIMER);
+ m68307_timer &timer = *m68307TIMER;
+
+ int pc = space.device().safe_pc();
+ int which = offset & 0x8;
- if (timer)
+ switch (offset&0x7)
{
- int pc = space.device().safe_pc();
- int which = offset & 0x8;
-
- switch (offset&0x7)
- {
- case m68307TIMER_TMR: /* 0x0 (0x120 / 0x130) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TMR - Timer Mode Register for timer %d)\n", pc, offset*2,data,mem_mask, which);
- timer->write_tmr(data, mem_mask, which);
- break;
-
- case m68307TIMER_TRR: /* 0x1 (0x122 / 0x132) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TRR - Timer Reference Register for timer %d)\n", pc, offset*2,data,mem_mask, which);
- timer->write_trr(data, mem_mask, which);
- break;
-
- case m68307TIMER_TCR: /* 0x2 (0x124 / 0x134) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TCR - Timer Capture Register for timer %d) (illegal, read-only)\n", pc, offset*2,data,mem_mask, which);
- break;
-
- case m68307TIMER_TCN: /* 0x3 (0x126 / 0x136) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TCN - Timer Counter for timer %d)\n", pc, offset*2,data,mem_mask, which);
- break;
-
- case m68307TIMER_TER: /* 0x4 (0x128 / 0x138) */
- /* 8-bit only!! */
- //logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TER - Timer Event Register for timer %d)\n", pc, offset*2,data,mem_mask, which);
- timer->write_ter(data, mem_mask, which);
- break;
-
- case m68307TIMER_WRR: /* 0x5 (0x12a / 0x13a) */
- if (which==0)
- {
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (WRR - Watchdog Reference Register)\n", pc, offset*2,data,mem_mask);
- }
- else
- {
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", pc, offset*2,data,mem_mask);
- }
- break;
-
- case m68307TIMER_WCR: /* 0x6 (0x12c / 0x13c) */
- if (which==0)
- {
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (WRR - Watchdog Counter Register)\n", pc, offset*2,data,mem_mask);
- }
- else
- {
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", pc, offset*2,data,mem_mask);
- }
- break;
-
- case m68307TIMER_XXX: /* 0x7 (0x12e / 0x13e) */
+ case m68307TIMER_TMR: /* 0x0 (0x120 / 0x130) */
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TMR - Timer Mode Register for timer %d)\n", pc, offset*2,data,mem_mask, which);
+ timer.write_tmr(data, mem_mask, which);
+ break;
+
+ case m68307TIMER_TRR: /* 0x1 (0x122 / 0x132) */
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TRR - Timer Reference Register for timer %d)\n", pc, offset*2,data,mem_mask, which);
+ timer.write_trr(data, mem_mask, which);
+ break;
+
+ case m68307TIMER_TCR: /* 0x2 (0x124 / 0x134) */
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TCR - Timer Capture Register for timer %d) (illegal, read-only)\n", pc, offset*2,data,mem_mask, which);
+ break;
+
+ case m68307TIMER_TCN: /* 0x3 (0x126 / 0x136) */
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TCN - Timer Counter for timer %d)\n", pc, offset*2,data,mem_mask, which);
+ break;
+
+ case m68307TIMER_TER: /* 0x4 (0x128 / 0x138) */
+ /* 8-bit only!! */
+ //logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TER - Timer Event Register for timer %d)\n", pc, offset*2,data,mem_mask, which);
+ timer.write_ter(data, mem_mask, which);
+ break;
+
+ case m68307TIMER_WRR: /* 0x5 (0x12a / 0x13a) */
+ if (which==0)
+ {
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (WRR - Watchdog Reference Register)\n", pc, offset*2,data,mem_mask);
+ }
+ else
+ {
logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", pc, offset*2,data,mem_mask);
- break;
+ }
+ break;
+
+ case m68307TIMER_WCR: /* 0x6 (0x12c / 0x13c) */
+ if (which==0)
+ {
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (WRR - Watchdog Counter Register)\n", pc, offset*2,data,mem_mask);
+ }
+ else
+ {
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", pc, offset*2,data,mem_mask);
+ }
+ break;
- }
+ case m68307TIMER_XXX: /* 0x7 (0x12e / 0x13e) */
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", pc, offset*2,data,mem_mask);
+ break;
}
}
-TIMER_CALLBACK_MEMBER(m68307_timer::timer0_callback )
+TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer0_callback )
{
- m68307cpu_device* m68k = (m68307cpu_device *)ptr;
- m68307_single_timer* tptr = &m68k->m68307TIMER->singletimer[0];
+ m68307_cpu_device* m68k = (m68307_cpu_device *)ptr;
+ single_timer* tptr = &m68k->m68307TIMER->singletimer[0];
tptr->regs[m68307TIMER_TMR] |= 0x2;
m68k->timer0_interrupt();
@@ -110,10 +110,10 @@ TIMER_CALLBACK_MEMBER(m68307_timer::timer0_callback )
tptr->mametimer->adjust(m68k->cycles_to_attotime(20000));
}
-TIMER_CALLBACK_MEMBER(m68307_timer::timer1_callback )
+TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer1_callback )
{
- m68307cpu_device* m68k = (m68307cpu_device *)ptr;
- m68307_single_timer* tptr = &m68k->m68307TIMER->singletimer[1];
+ m68307_cpu_device* m68k = (m68307_cpu_device *)ptr;
+ single_timer* tptr = &m68k->m68307TIMER->singletimer[1];
tptr->regs[m68307TIMER_TMR] |= 0x2;
m68k->timer1_interrupt();
@@ -122,16 +122,16 @@ TIMER_CALLBACK_MEMBER(m68307_timer::timer1_callback )
}
-TIMER_CALLBACK_MEMBER(m68307_timer::wd_timer_callback )
+TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::wd_timer_callback )
{
printf("wd timer\n");
}
-void m68307_timer::init(m68307cpu_device *device)
+void m68307_cpu_device::m68307_timer::init(m68307_cpu_device *device)
{
parent = device;
- m68307_single_timer* tptr;
+ single_timer* tptr;
tptr = &singletimer[0];
tptr->mametimer = device->machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68307_timer::timer0_callback),this), parent);
@@ -142,7 +142,7 @@ void m68307_timer::init(m68307cpu_device *device)
wd_mametimer = device->machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68307_timer::wd_timer_callback),this), parent);
}
-uint16_t m68307_timer::read_tcn(uint16_t mem_mask, int which)
+uint16_t m68307_cpu_device::m68307_timer::read_tcn(uint16_t mem_mask, int which)
{
// we should return the current timer value by
// calculating what it should be based on the time
@@ -150,18 +150,18 @@ uint16_t m68307_timer::read_tcn(uint16_t mem_mask, int which)
return 0x3a98;
}
-void m68307_timer::write_ter(uint16_t data, uint16_t mem_mask, int which)
+void m68307_cpu_device::m68307_timer::write_ter(uint16_t data, uint16_t mem_mask, int which)
{
assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
- m68307_single_timer* tptr = &singletimer[which];
+ single_timer* tptr = &singletimer[which];
if (data & 0x2) tptr->regs[m68307TIMER_TMR] &= ~0x2;
}
-void m68307_timer::write_tmr(uint16_t data, uint16_t mem_mask, int which)
+void m68307_cpu_device::m68307_timer::write_tmr(uint16_t data, uint16_t mem_mask, int which)
{
- m68307cpu_device* m68k = parent;
+ m68307_cpu_device* m68k = parent;
assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
- m68307_single_timer* tptr = &singletimer[which];
+ single_timer* tptr = &singletimer[which];
COMBINE_DATA(&tptr->regs[m68307TIMER_TMR]);
@@ -208,21 +208,21 @@ void m68307_timer::write_tmr(uint16_t data, uint16_t mem_mask, int which)
}
-void m68307_timer::write_trr(uint16_t data, uint16_t mem_mask, int which)
+void m68307_cpu_device::m68307_timer::write_trr(uint16_t data, uint16_t mem_mask, int which)
{
assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
- m68307_single_timer* tptr = &singletimer[which];
+ single_timer* tptr = &singletimer[which];
COMBINE_DATA(&tptr->regs[m68307TIMER_TRR]);
}
-void m68307_timer::reset(void)
+void m68307_cpu_device::m68307_timer::reset()
{
for (auto & elem : singletimer)
{
- m68307_single_timer* tptr = &elem;
+ single_timer* tptr = &elem;
tptr->regs[m68307TIMER_TMR] = 0x0000;
tptr->regs[m68307TIMER_TRR] = 0xffff;
@@ -237,6 +237,4 @@ void m68307_timer::reset(void)
}
wd_mametimer->adjust(attotime::never);
-
-
}