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Diffstat (limited to 'src/devices/machine/68307tmu.cpp')
-rw-r--r--src/devices/machine/68307tmu.cpp56
1 files changed, 27 insertions, 29 deletions
diff --git a/src/devices/machine/68307tmu.cpp b/src/devices/machine/68307tmu.cpp
index 2b5e3efd2b2..12c999c0b40 100644
--- a/src/devices/machine/68307tmu.cpp
+++ b/src/devices/machine/68307tmu.cpp
@@ -15,7 +15,7 @@
#define m68307TIMER_WCR (0x6)
#define m68307TIMER_XXX (0x7)
-READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r )
+uint16_t m68307_cpu_device::m68307_internal_timer_r(offs_t offset, uint16_t mem_mask)
{
assert(m_m68307TIMER);
m68307_timer &timer = *m_m68307TIMER;
@@ -25,18 +25,18 @@ READ16_MEMBER( m68307_cpu_device::m68307_internal_timer_r )
switch (offset&0x7)
{
case m68307TIMER_TCN: /* 0x3 (0x126 / 0x136) */
- //if (m_ppc!=0x2182e) logerror("%08x m68307_internal_timer_r %08x (%04x) (TCN - Timer Counter for timer %d)\n", m_ppc, offset*2,mem_mask, which);
+ //if (m_ipc!=0x2182e) logerror("%08x m68307_internal_timer_r %08x (%04x) (TCN - Timer Counter for timer %d)\n", m_ipc, offset*2,mem_mask, which);
return timer.read_tcn(mem_mask, which);
default:
- logerror("%08x m68307_internal_timer_r %08x, (%04x)\n", m_ppc, offset*2,mem_mask);
+ logerror("%08x m68307_internal_timer_r %08x, (%04x)\n", m_ipc, offset*2,mem_mask);
break;
}
return 0x0000;
}
-WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w )
+void m68307_cpu_device::m68307_internal_timer_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
assert(m_m68307TIMER);
m68307_timer &timer = *m_m68307TIMER;
@@ -46,79 +46,77 @@ WRITE16_MEMBER( m68307_cpu_device::m68307_internal_timer_w )
switch (offset&0x7)
{
case m68307TIMER_TMR: /* 0x0 (0x120 / 0x130) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TMR - Timer Mode Register for timer %d)\n", m_ppc, offset*2,data,mem_mask, which);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TMR - Timer Mode Register for timer %d)\n", m_ipc, offset*2,data,mem_mask, which);
timer.write_tmr(data, mem_mask, which);
break;
case m68307TIMER_TRR: /* 0x1 (0x122 / 0x132) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TRR - Timer Reference Register for timer %d)\n", m_ppc, offset*2,data,mem_mask, which);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TRR - Timer Reference Register for timer %d)\n", m_ipc, offset*2,data,mem_mask, which);
timer.write_trr(data, mem_mask, which);
break;
case m68307TIMER_TCR: /* 0x2 (0x124 / 0x134) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TCR - Timer Capture Register for timer %d) (illegal, read-only)\n", m_ppc, offset*2,data,mem_mask, which);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TCR - Timer Capture Register for timer %d) (illegal, read-only)\n", m_ipc, offset*2,data,mem_mask, which);
break;
case m68307TIMER_TCN: /* 0x3 (0x126 / 0x136) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TCN - Timer Counter for timer %d)\n", m_ppc, offset*2,data,mem_mask, which);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TCN - Timer Counter for timer %d)\n", m_ipc, offset*2,data,mem_mask, which);
break;
case m68307TIMER_TER: /* 0x4 (0x128 / 0x138) */
/* 8-bit only!! */
- //logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TER - Timer Event Register for timer %d)\n", m_ppc, offset*2,data,mem_mask, which);
+ //logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (TER - Timer Event Register for timer %d)\n", m_ipc, offset*2,data,mem_mask, which);
timer.write_ter(data, mem_mask, which);
break;
case m68307TIMER_WRR: /* 0x5 (0x12a / 0x13a) */
if (which==0)
{
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (WRR - Watchdog Reference Register)\n", m_ppc, offset*2,data,mem_mask);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (WRR - Watchdog Reference Register)\n", m_ipc, offset*2,data,mem_mask);
}
else
{
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", m_ppc, offset*2,data,mem_mask);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", m_ipc, offset*2,data,mem_mask);
}
break;
case m68307TIMER_WCR: /* 0x6 (0x12c / 0x13c) */
if (which==0)
{
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (WRR - Watchdog Counter Register)\n", m_ppc, offset*2,data,mem_mask);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (WRR - Watchdog Counter Register)\n", m_ipc, offset*2,data,mem_mask);
}
else
{
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", m_ppc, offset*2,data,mem_mask);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", m_ipc, offset*2,data,mem_mask);
}
break;
case m68307TIMER_XXX: /* 0x7 (0x12e / 0x13e) */
- logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", m_ppc, offset*2,data,mem_mask);
+ logerror("%08x m68307_internal_timer_w %08x, %04x (%04x) (illegal)\n", m_ipc, offset*2,data,mem_mask);
break;
}
}
TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer0_callback )
{
- m68307_cpu_device* m68k = (m68307_cpu_device *)ptr;
- single_timer* tptr = &m68k->m_m68307TIMER->singletimer[0];
+ single_timer* tptr = &parent->m_m68307TIMER->singletimer[0];
tptr->regs[m68307TIMER_TER] |= 0x2;
if (BIT(tptr->regs[m68307TIMER_TMR], 4))
- m68k->timer0_interrupt(1);
+ parent->timer0_interrupt(1);
- tptr->mametimer->adjust(m68k->cycles_to_attotime(20000));
+ tptr->mametimer->adjust(parent->cycles_to_attotime(20000));
}
TIMER_CALLBACK_MEMBER(m68307_cpu_device::m68307_timer::timer1_callback )
{
- m68307_cpu_device* m68k = (m68307_cpu_device *)ptr;
- single_timer* tptr = &m68k->m_m68307TIMER->singletimer[1];
+ single_timer* tptr = &parent->m_m68307TIMER->singletimer[1];
tptr->regs[m68307TIMER_TER] |= 0x2;
if (BIT(tptr->regs[m68307TIMER_TMR], 4))
- m68k->timer1_interrupt(1);
+ parent->timer1_interrupt(1);
- tptr->mametimer->adjust(m68k->cycles_to_attotime(20000));
+ tptr->mametimer->adjust(parent->cycles_to_attotime(20000));
}
@@ -134,12 +132,12 @@ void m68307_cpu_device::m68307_timer::init(m68307_cpu_device *device)
single_timer* tptr;
tptr = &singletimer[0];
- tptr->mametimer = device->machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68307_timer::timer0_callback),this), parent);
+ tptr->mametimer = device->timer_alloc(FUNC(m68307_timer::timer0_callback), this);
tptr = &singletimer[1];
- tptr->mametimer = device->machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68307_timer::timer1_callback),this), parent);
+ tptr->mametimer = device->timer_alloc(FUNC(m68307_timer::timer1_callback), this);
- wd_mametimer = device->machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(m68307_timer::wd_timer_callback),this), parent);
+ wd_mametimer = device->timer_alloc(FUNC(m68307_timer::wd_timer_callback), this);
}
uint16_t m68307_cpu_device::m68307_timer::read_tcn(uint16_t mem_mask, int which)
@@ -152,7 +150,7 @@ uint16_t m68307_cpu_device::m68307_timer::read_tcn(uint16_t mem_mask, int which)
void m68307_cpu_device::m68307_timer::write_ter(uint16_t data, uint16_t mem_mask, int which)
{
- assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
+ assert(which >= 0 && which < std::size(singletimer));
single_timer* tptr = &singletimer[which];
if (data & 0x2)
{
@@ -167,7 +165,7 @@ void m68307_cpu_device::m68307_timer::write_ter(uint16_t data, uint16_t mem_mask
void m68307_cpu_device::m68307_timer::write_tmr(uint16_t data, uint16_t mem_mask, int which)
{
m68307_cpu_device* m68k = parent;
- assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
+ assert(which >= 0 && which < std::size(singletimer));
single_timer* tptr = &singletimer[which];
COMBINE_DATA(&tptr->regs[m68307TIMER_TMR]);
@@ -216,7 +214,7 @@ void m68307_cpu_device::m68307_timer::write_tmr(uint16_t data, uint16_t mem_mask
void m68307_cpu_device::m68307_timer::write_trr(uint16_t data, uint16_t mem_mask, int which)
{
- assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
+ assert(which >= 0 && which < std::size(singletimer));
single_timer* tptr = &singletimer[which];
COMBINE_DATA(&tptr->regs[m68307TIMER_TRR]);
@@ -248,7 +246,7 @@ void m68307_cpu_device::m68307_timer::reset()
bool m68307_cpu_device::m68307_timer::timer_int_pending(int which) const
{
- assert(which >= 0 && which < ARRAY_LENGTH(singletimer));
+ assert(which >= 0 && which < std::size(singletimer));
const single_timer* tptr = &singletimer[which];
return BIT(tptr->regs[m68307TIMER_TER], 1) && BIT(tptr->regs[m68307TIMER_TMR], 4);