summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/cpu')
-rw-r--r--src/devices/cpu/8x300/8x300.cpp20
-rw-r--r--src/devices/cpu/8x300/8x300.h64
-rw-r--r--src/devices/cpu/8x300/8x300dasm.cpp8
-rw-r--r--src/devices/cpu/adsp2100/2100ops.hxx418
-rw-r--r--src/devices/cpu/adsp2100/adsp2100.cpp84
-rw-r--r--src/devices/cpu/adsp2100/adsp2100.h204
-rw-r--r--src/devices/cpu/alph8201/8201dasm.cpp2
-rw-r--r--src/devices/cpu/alph8201/alph8201.cpp34
-rw-r--r--src/devices/cpu/alph8201/alph8201.h116
-rw-r--r--src/devices/cpu/alto2/a2dht.cpp2
-rw-r--r--src/devices/cpu/alto2/a2disk.cpp52
-rw-r--r--src/devices/cpu/alto2/a2disk.h58
-rw-r--r--src/devices/cpu/alto2/a2disp.cpp40
-rw-r--r--src/devices/cpu/alto2/a2disp.h36
-rw-r--r--src/devices/cpu/alto2/a2dwt.cpp2
-rw-r--r--src/devices/cpu/alto2/a2emu.cpp44
-rw-r--r--src/devices/cpu/alto2/a2emu.h6
-rw-r--r--src/devices/cpu/alto2/a2ether.cpp82
-rw-r--r--src/devices/cpu/alto2/a2ether.h28
-rw-r--r--src/devices/cpu/alto2/a2hw.cpp22
-rw-r--r--src/devices/cpu/alto2/a2hw.h8
-rw-r--r--src/devices/cpu/alto2/a2jkff.h4
-rw-r--r--src/devices/cpu/alto2/a2kbd.cpp4
-rw-r--r--src/devices/cpu/alto2/a2kbd.h6
-rw-r--r--src/devices/cpu/alto2/a2mem.cpp76
-rw-r--r--src/devices/cpu/alto2/a2mem.h40
-rw-r--r--src/devices/cpu/alto2/a2mouse.cpp14
-rw-r--r--src/devices/cpu/alto2/a2mouse.h8
-rw-r--r--src/devices/cpu/alto2/a2ram.cpp34
-rw-r--r--src/devices/cpu/alto2/a2roms.cpp64
-rw-r--r--src/devices/cpu/alto2/a2roms.h16
-rw-r--r--src/devices/cpu/alto2/alto2cpu.cpp144
-rw-r--r--src/devices/cpu/alto2/alto2cpu.h160
-rw-r--r--src/devices/cpu/alto2/alto2dsm.cpp26
-rw-r--r--src/devices/cpu/am29000/am29000.cpp20
-rw-r--r--src/devices/cpu/am29000/am29000.h102
-rw-r--r--src/devices/cpu/am29000/am29dasm.cpp18
-rw-r--r--src/devices/cpu/am29000/am29ops.h374
-rw-r--r--src/devices/cpu/amis2000/amis2000.cpp8
-rw-r--r--src/devices/cpu/amis2000/amis2000.h76
-rw-r--r--src/devices/cpu/amis2000/amis2000d.cpp12
-rw-r--r--src/devices/cpu/amis2000/amis2000op.cpp50
-rw-r--r--src/devices/cpu/apexc/apexc.cpp26
-rw-r--r--src/devices/cpu/apexc/apexc.h44
-rw-r--r--src/devices/cpu/apexc/apexcdsm.cpp2
-rw-r--r--src/devices/cpu/arc/arc.cpp14
-rw-r--r--src/devices/cpu/arc/arc.h26
-rw-r--r--src/devices/cpu/arc/arcdasm.cpp4
-rw-r--r--src/devices/cpu/arcompact/arcompact.cpp6
-rw-r--r--src/devices/cpu/arcompact/arcompact.h60
-rw-r--r--src/devices/cpu/arcompact/arcompact_execute.cpp186
-rw-r--r--src/devices/cpu/arcompact/arcompact_make.py96
-rw-r--r--src/devices/cpu/arcompact/arcompactdasm.cpp4
-rw-r--r--src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp56
-rw-r--r--src/devices/cpu/arcompact/arcompactdasm_dispatch.h4
-rw-r--r--src/devices/cpu/arcompact/arcompactdasm_ops.cpp40
-rw-r--r--src/devices/cpu/arcompact/arcompactdasm_ops.h4
-rw-r--r--src/devices/cpu/arm/arm.cpp192
-rw-r--r--src/devices/cpu/arm/arm.h76
-rw-r--r--src/devices/cpu/arm/armdasm.cpp18
-rw-r--r--src/devices/cpu/arm7/arm7.cpp108
-rw-r--r--src/devices/cpu/arm7/arm7.h402
-rw-r--r--src/devices/cpu/arm7/arm7core.h198
-rw-r--r--src/devices/cpu/arm7/arm7core.hxx8
-rw-r--r--src/devices/cpu/arm7/arm7dasm.cpp46
-rw-r--r--src/devices/cpu/arm7/arm7drc.hxx130
-rw-r--r--src/devices/cpu/arm7/arm7help.h2
-rw-r--r--src/devices/cpu/arm7/arm7ops.cpp258
-rw-r--r--src/devices/cpu/arm7/arm7tdrc.hxx592
-rw-r--r--src/devices/cpu/arm7/arm7thmb.cpp642
-rw-r--r--src/devices/cpu/arm7/lpc210x.cpp8
-rw-r--r--src/devices/cpu/arm7/lpc210x.h10
-rw-r--r--src/devices/cpu/asap/asap.cpp316
-rw-r--r--src/devices/cpu/asap/asap.h52
-rw-r--r--src/devices/cpu/asap/asapdasm.cpp16
-rw-r--r--src/devices/cpu/avr8/avr8.cpp320
-rw-r--r--src/devices/cpu/avr8/avr8.h130
-rw-r--r--src/devices/cpu/avr8/avr8dasm.cpp6
-rw-r--r--src/devices/cpu/ccpu/ccpu.cpp44
-rw-r--r--src/devices/cpu/ccpu/ccpu.h52
-rw-r--r--src/devices/cpu/ccpu/ccpudasm.cpp4
-rw-r--r--src/devices/cpu/cop400/cop400.cpp66
-rw-r--r--src/devices/cpu/cop400/cop400.h246
-rw-r--r--src/devices/cpu/cop400/cop400op.hxx58
-rw-r--r--src/devices/cpu/cop400/cop410ds.cpp16
-rw-r--r--src/devices/cpu/cop400/cop420ds.cpp18
-rw-r--r--src/devices/cpu/cop400/cop440ds.cpp18
-rw-r--r--src/devices/cpu/cosmac/cosdasm.cpp16
-rw-r--r--src/devices/cpu/cosmac/cosmac.cpp36
-rw-r--r--src/devices/cpu/cosmac/cosmac.h58
-rw-r--r--src/devices/cpu/cp1610/1610dasm.cpp6
-rw-r--r--src/devices/cpu/cp1610/cp1610.cpp220
-rw-r--r--src/devices/cpu/cp1610/cp1610.h32
-rw-r--r--src/devices/cpu/cubeqcpu/cubedasm.cpp18
-rw-r--r--src/devices/cpu/cubeqcpu/cubeqcpu.cpp120
-rw-r--r--src/devices/cpu/cubeqcpu/cubeqcpu.h198
-rw-r--r--src/devices/cpu/drcbec.cpp324
-rw-r--r--src/devices/cpu/drcbec.h18
-rw-r--r--src/devices/cpu/drcbeut.cpp46
-rw-r--r--src/devices/cpu/drcbeut.h48
-rw-r--r--src/devices/cpu/drcbex64.cpp276
-rw-r--r--src/devices/cpu/drcbex64.h128
-rw-r--r--src/devices/cpu/drcbex86.cpp354
-rw-r--r--src/devices/cpu/drcbex86.h132
-rw-r--r--src/devices/cpu/drccache.cpp2
-rw-r--r--src/devices/cpu/drccache.h4
-rw-r--r--src/devices/cpu/drcfe.cpp14
-rw-r--r--src/devices/cpu/drcfe.h86
-rw-r--r--src/devices/cpu/drcuml.cpp88
-rw-r--r--src/devices/cpu/drcuml.h44
-rw-r--r--src/devices/cpu/dsp16/dsp16.cpp34
-rw-r--r--src/devices/cpu/dsp16/dsp16.h114
-rw-r--r--src/devices/cpu/dsp16/dsp16dis.cpp180
-rw-r--r--src/devices/cpu/dsp16/dsp16ops.hxx260
-rw-r--r--src/devices/cpu/dsp32/dsp32.cpp50
-rw-r--r--src/devices/cpu/dsp32/dsp32.h464
-rw-r--r--src/devices/cpu/dsp32/dsp32dis.cpp74
-rw-r--r--src/devices/cpu/dsp32/dsp32ops.hxx534
-rw-r--r--src/devices/cpu/dsp56k/dsp56dsm.cpp4
-rw-r--r--src/devices/cpu/dsp56k/dsp56k.cpp12
-rw-r--r--src/devices/cpu/dsp56k/dsp56k.h116
-rw-r--r--src/devices/cpu/dsp56k/dsp56mem.cpp156
-rw-r--r--src/devices/cpu/dsp56k/dsp56mem.h218
-rw-r--r--src/devices/cpu/dsp56k/dsp56ops.hxx1378
-rw-r--r--src/devices/cpu/dsp56k/dsp56pcu.cpp106
-rw-r--r--src/devices/cpu/dsp56k/dsp56pcu.h90
-rw-r--r--src/devices/cpu/dsp56k/inst.cpp8
-rw-r--r--src/devices/cpu/dsp56k/inst.h624
-rw-r--r--src/devices/cpu/dsp56k/opcode.cpp2
-rw-r--r--src/devices/cpu/dsp56k/opcode.h6
-rw-r--r--src/devices/cpu/dsp56k/pmove.cpp6
-rw-r--r--src/devices/cpu/dsp56k/pmove.h34
-rw-r--r--src/devices/cpu/dsp56k/tables.cpp118
-rw-r--r--src/devices/cpu/dsp56k/tables.h90
-rw-r--r--src/devices/cpu/e0c6200/e0c6200.cpp2
-rw-r--r--src/devices/cpu/e0c6200/e0c6200.h84
-rw-r--r--src/devices/cpu/e0c6200/e0c6200d.cpp12
-rw-r--r--src/devices/cpu/e0c6200/e0c6200op.cpp52
-rw-r--r--src/devices/cpu/e0c6200/e0c6s46.cpp26
-rw-r--r--src/devices/cpu/e0c6200/e0c6s46.h66
-rw-r--r--src/devices/cpu/e132xs/32xsdasm.cpp178
-rw-r--r--src/devices/cpu/e132xs/e132xs.cpp448
-rw-r--r--src/devices/cpu/e132xs/e132xs.h134
-rw-r--r--src/devices/cpu/es5510/es5510.cpp194
-rw-r--r--src/devices/cpu/es5510/es5510.h126
-rw-r--r--src/devices/cpu/esrip/esrip.cpp202
-rw-r--r--src/devices/cpu/esrip/esrip.h176
-rw-r--r--src/devices/cpu/esrip/esripdsm.cpp20
-rw-r--r--src/devices/cpu/f8/f8.cpp72
-rw-r--r--src/devices/cpu/f8/f8.h40
-rw-r--r--src/devices/cpu/f8/f8dasm.cpp32
-rw-r--r--src/devices/cpu/g65816/g65816.cpp10
-rw-r--r--src/devices/cpu/g65816/g65816.h32
-rw-r--r--src/devices/cpu/g65816/g65816ds.cpp8
-rw-r--r--src/devices/cpu/g65816/g65816ds.h2
-rw-r--r--src/devices/cpu/g65816/g65816op.h8
-rw-r--r--src/devices/cpu/h6280/6280dasm.cpp2
-rw-r--r--src/devices/cpu/h6280/h6280.cpp242
-rw-r--r--src/devices/cpu/h6280/h6280.h202
-rw-r--r--src/devices/cpu/h8/h8.cpp358
-rw-r--r--src/devices/cpu/h8/h8.h208
-rw-r--r--src/devices/cpu/h8/h8.lst124
-rw-r--r--src/devices/cpu/h8/h83002.cpp6
-rw-r--r--src/devices/cpu/h8/h83002.h6
-rw-r--r--src/devices/cpu/h8/h83006.cpp10
-rw-r--r--src/devices/cpu/h8/h83006.h12
-rw-r--r--src/devices/cpu/h8/h83008.cpp6
-rw-r--r--src/devices/cpu/h8/h83008.h6
-rw-r--r--src/devices/cpu/h8/h83048.cpp14
-rw-r--r--src/devices/cpu/h8/h83048.h16
-rw-r--r--src/devices/cpu/h8/h83337.cpp12
-rw-r--r--src/devices/cpu/h8/h83337.h14
-rw-r--r--src/devices/cpu/h8/h8_adc.cpp22
-rw-r--r--src/devices/cpu/h8/h8_adc.h26
-rw-r--r--src/devices/cpu/h8/h8_dma.cpp8
-rw-r--r--src/devices/cpu/h8/h8_dma.h22
-rw-r--r--src/devices/cpu/h8/h8_dtc.cpp12
-rw-r--r--src/devices/cpu/h8/h8_dtc.h12
-rw-r--r--src/devices/cpu/h8/h8_intc.cpp10
-rw-r--r--src/devices/cpu/h8/h8_intc.h24
-rw-r--r--src/devices/cpu/h8/h8_port.cpp12
-rw-r--r--src/devices/cpu/h8/h8_port.h12
-rw-r--r--src/devices/cpu/h8/h8_sci.cpp32
-rw-r--r--src/devices/cpu/h8/h8_sci.h8
-rw-r--r--src/devices/cpu/h8/h8_timer16.cpp50
-rw-r--r--src/devices/cpu/h8/h8_timer16.h52
-rw-r--r--src/devices/cpu/h8/h8_timer8.cpp24
-rw-r--r--src/devices/cpu/h8/h8_timer8.h18
-rw-r--r--src/devices/cpu/h8/h8_watchdog.cpp12
-rw-r--r--src/devices/cpu/h8/h8_watchdog.h10
-rw-r--r--src/devices/cpu/h8/h8h.cpp4
-rw-r--r--src/devices/cpu/h8/h8h.h8
-rw-r--r--src/devices/cpu/h8/h8s2000.cpp4
-rw-r--r--src/devices/cpu/h8/h8s2000.h4
-rw-r--r--src/devices/cpu/h8/h8s2245.cpp16
-rw-r--r--src/devices/cpu/h8/h8s2245.h18
-rw-r--r--src/devices/cpu/h8/h8s2320.cpp24
-rw-r--r--src/devices/cpu/h8/h8s2320.h26
-rw-r--r--src/devices/cpu/h8/h8s2357.cpp18
-rw-r--r--src/devices/cpu/h8/h8s2357.h18
-rw-r--r--src/devices/cpu/h8/h8s2600.cpp4
-rw-r--r--src/devices/cpu/h8/h8s2600.h4
-rw-r--r--src/devices/cpu/h8/h8s2655.cpp10
-rw-r--r--src/devices/cpu/h8/h8s2655.h10
-rw-r--r--src/devices/cpu/hcd62121/hcd62121.cpp40
-rw-r--r--src/devices/cpu/hcd62121/hcd62121.h60
-rw-r--r--src/devices/cpu/hcd62121/hcd62121_ops.h160
-rw-r--r--src/devices/cpu/hcd62121/hcd62121d.cpp10
-rw-r--r--src/devices/cpu/hd61700/hd61700.cpp652
-rw-r--r--src/devices/cpu/hd61700/hd61700.h68
-rw-r--r--src/devices/cpu/hd61700/hd61700d.cpp26
-rw-r--r--src/devices/cpu/hmcs40/hmcs40.cpp54
-rw-r--r--src/devices/cpu/hmcs40/hmcs40.h120
-rw-r--r--src/devices/cpu/hmcs40/hmcs40d.cpp16
-rw-r--r--src/devices/cpu/hmcs40/hmcs40op.cpp28
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.cpp208
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.h142
-rw-r--r--src/devices/cpu/hphybrid/hphybrid_dasm.cpp38
-rw-r--r--src/devices/cpu/i386/cycles.h2
-rw-r--r--src/devices/cpu/i386/i386.cpp288
-rw-r--r--src/devices/cpu/i386/i386.h702
-rw-r--r--src/devices/cpu/i386/i386dasm.cpp122
-rw-r--r--src/devices/cpu/i386/i386op16.hxx860
-rw-r--r--src/devices/cpu/i386/i386op32.hxx872
-rw-r--r--src/devices/cpu/i386/i386ops.hxx574
-rw-r--r--src/devices/cpu/i386/i386priv.h346
-rw-r--r--src/devices/cpu/i386/i486ops.hxx94
-rw-r--r--src/devices/cpu/i386/pentops.hxx1706
-rw-r--r--src/devices/cpu/i386/x87ops.hxx514
-rw-r--r--src/devices/cpu/i4004/4004dasm.cpp6
-rw-r--r--src/devices/cpu/i4004/i4004.cpp70
-rw-r--r--src/devices/cpu/i4004/i4004.h48
-rw-r--r--src/devices/cpu/i8008/8008dasm.cpp4
-rw-r--r--src/devices/cpu/i8008/i8008.cpp46
-rw-r--r--src/devices/cpu/i8008/i8008.h46
-rw-r--r--src/devices/cpu/i8085/8085dasm.cpp4
-rw-r--r--src/devices/cpu/i8085/i8085.cpp36
-rw-r--r--src/devices/cpu/i8085/i8085.h80
-rw-r--r--src/devices/cpu/i8085/i8085cpu.h8
-rw-r--r--src/devices/cpu/i8089/i8089.cpp24
-rw-r--r--src/devices/cpu/i8089/i8089.h24
-rw-r--r--src/devices/cpu/i8089/i8089_channel.cpp52
-rw-r--r--src/devices/cpu/i8089/i8089_channel.h74
-rw-r--r--src/devices/cpu/i8089/i8089_dasm.cpp62
-rw-r--r--src/devices/cpu/i8089/i8089_ops.cpp86
-rw-r--r--src/devices/cpu/i86/i186.cpp86
-rw-r--r--src/devices/cpu/i86/i186.h80
-rw-r--r--src/devices/cpu/i86/i286.cpp218
-rw-r--r--src/devices/cpu/i86/i286.h70
-rw-r--r--src/devices/cpu/i86/i86.cpp174
-rw-r--r--src/devices/cpu/i86/i86.h206
-rw-r--r--src/devices/cpu/i86/i86inline.h196
-rw-r--r--src/devices/cpu/i860/i860.cpp4
-rw-r--r--src/devices/cpu/i860/i860.h186
-rw-r--r--src/devices/cpu/i860/i860dasm.cpp148
-rw-r--r--src/devices/cpu/i860/i860dec.hxx920
-rw-r--r--src/devices/cpu/i860/i860dis.cpp74
-rw-r--r--src/devices/cpu/i960/i960.cpp182
-rw-r--r--src/devices/cpu/i960/i960.h100
-rw-r--r--src/devices/cpu/i960/i960dis.h4
-rw-r--r--src/devices/cpu/ie15/ie15.cpp44
-rw-r--r--src/devices/cpu/ie15/ie15.h42
-rw-r--r--src/devices/cpu/ie15/ie15dasm.cpp4
-rw-r--r--src/devices/cpu/jaguar/jagdasm.cpp12
-rw-r--r--src/devices/cpu/jaguar/jaguar.cpp466
-rw-r--r--src/devices/cpu/jaguar/jaguar.h190
-rw-r--r--src/devices/cpu/lc8670/lc8670.cpp204
-rw-r--r--src/devices/cpu/lc8670/lc8670.h86
-rw-r--r--src/devices/cpu/lc8670/lc8670dsm.cpp6
-rw-r--r--src/devices/cpu/lh5801/5801dasm.cpp2
-rw-r--r--src/devices/cpu/lh5801/5801tbl.hxx60
-rw-r--r--src/devices/cpu/lh5801/lh5801.cpp4
-rw-r--r--src/devices/cpu/lh5801/lh5801.h64
-rw-r--r--src/devices/cpu/lr35902/lr35902.cpp26
-rw-r--r--src/devices/cpu/lr35902/lr35902.h68
-rw-r--r--src/devices/cpu/lr35902/lr35902d.cpp12
-rw-r--r--src/devices/cpu/lr35902/opc_cb.hxx94
-rw-r--r--src/devices/cpu/lr35902/opc_main.hxx152
-rw-r--r--src/devices/cpu/m37710/m37710.cpp28
-rw-r--r--src/devices/cpu/m37710/m37710.h242
-rw-r--r--src/devices/cpu/m37710/m37710il.h96
-rw-r--r--src/devices/cpu/m37710/m37710op.h16
-rw-r--r--src/devices/cpu/m37710/m7700ds.cpp10
-rw-r--r--src/devices/cpu/m37710/m7700ds.h2
-rw-r--r--src/devices/cpu/m6502/deco16.cpp4
-rw-r--r--src/devices/cpu/m6502/deco16.h4
-rw-r--r--src/devices/cpu/m6502/m3745x.cpp16
-rw-r--r--src/devices/cpu/m6502/m3745x.h20
-rw-r--r--src/devices/cpu/m6502/m4510.cpp16
-rw-r--r--src/devices/cpu/m6502/m4510.h22
-rw-r--r--src/devices/cpu/m6502/m5074x.cpp18
-rw-r--r--src/devices/cpu/m6502/m5074x.h26
-rw-r--r--src/devices/cpu/m6502/m6502.cpp128
-rw-r--r--src/devices/cpu/m6502/m6502.h112
-rw-r--r--src/devices/cpu/m6502/m6504.cpp14
-rw-r--r--src/devices/cpu/m6502/m6504.h14
-rw-r--r--src/devices/cpu/m6502/m6507.cpp14
-rw-r--r--src/devices/cpu/m6502/m6507.h14
-rw-r--r--src/devices/cpu/m6502/m6509.cpp32
-rw-r--r--src/devices/cpu/m6502/m6509.h36
-rw-r--r--src/devices/cpu/m6502/m6510.cpp40
-rw-r--r--src/devices/cpu/m6502/m6510.h32
-rw-r--r--src/devices/cpu/m6502/m6510t.cpp2
-rw-r--r--src/devices/cpu/m6502/m6510t.h2
-rw-r--r--src/devices/cpu/m6502/m65c02.cpp6
-rw-r--r--src/devices/cpu/m6502/m65c02.h6
-rw-r--r--src/devices/cpu/m6502/m65ce02.cpp6
-rw-r--r--src/devices/cpu/m6502/m65ce02.h12
-rw-r--r--src/devices/cpu/m6502/m65sc02.cpp2
-rw-r--r--src/devices/cpu/m6502/m65sc02.h2
-rw-r--r--src/devices/cpu/m6502/m740.cpp60
-rw-r--r--src/devices/cpu/m6502/m740.h28
-rw-r--r--src/devices/cpu/m6502/m7501.cpp2
-rw-r--r--src/devices/cpu/m6502/m7501.h2
-rw-r--r--src/devices/cpu/m6502/m8502.cpp2
-rw-r--r--src/devices/cpu/m6502/m8502.h2
-rw-r--r--src/devices/cpu/m6502/n2a03.cpp20
-rw-r--r--src/devices/cpu/m6502/n2a03.h20
-rw-r--r--src/devices/cpu/m6502/om6502.lst102
-rw-r--r--src/devices/cpu/m6502/om65c02.lst18
-rw-r--r--src/devices/cpu/m6502/om65ce02.lst64
-rw-r--r--src/devices/cpu/m6502/om740.lst28
-rw-r--r--src/devices/cpu/m6502/on2a03.lst8
-rw-r--r--src/devices/cpu/m6502/r65c02.cpp6
-rw-r--r--src/devices/cpu/m6502/r65c02.h6
-rw-r--r--src/devices/cpu/m6800/6800dasm.cpp10
-rw-r--r--src/devices/cpu/m6800/6800ops.hxx304
-rw-r--r--src/devices/cpu/m6800/m6800.cpp94
-rw-r--r--src/devices/cpu/m6800/m6800.h128
-rw-r--r--src/devices/cpu/m68000/m68000.h498
-rw-r--r--src/devices/cpu/m68000/m68k_in.cpp2634
-rw-r--r--src/devices/cpu/m68000/m68kcpu.cpp208
-rw-r--r--src/devices/cpu/m68000/m68kcpu.h402
-rw-r--r--src/devices/cpu/m68000/m68kdasm.cpp272
-rw-r--r--src/devices/cpu/m68000/m68kfpu.hxx376
-rw-r--r--src/devices/cpu/m68000/m68kmmu.h110
-rw-r--r--src/devices/cpu/m6805/6805dasm.cpp8
-rw-r--r--src/devices/cpu/m6805/6805ops.hxx222
-rw-r--r--src/devices/cpu/m6805/m6805.cpp46
-rw-r--r--src/devices/cpu/m6805/m6805.h58
-rw-r--r--src/devices/cpu/m6809/6309dasm.cpp28
-rw-r--r--src/devices/cpu/m6809/6809dasm.cpp24
-rw-r--r--src/devices/cpu/m6809/base6x09.ops56
-rw-r--r--src/devices/cpu/m6809/hd6309.cpp92
-rw-r--r--src/devices/cpu/m6809/hd6309.h32
-rw-r--r--src/devices/cpu/m6809/hd6309.ops44
-rw-r--r--src/devices/cpu/m6809/konami.cpp44
-rw-r--r--src/devices/cpu/m6809/konami.h26
-rw-r--r--src/devices/cpu/m6809/konami.ops32
-rw-r--r--src/devices/cpu/m6809/m6809.cpp40
-rw-r--r--src/devices/cpu/m6809/m6809.h120
-rw-r--r--src/devices/cpu/m6809/m6809.ops16
-rw-r--r--src/devices/cpu/m6809/m6809inl.h32
-rw-r--r--src/devices/cpu/mb86233/mb86233.cpp158
-rw-r--r--src/devices/cpu/mb86233/mb86233.h64
-rw-r--r--src/devices/cpu/mb86233/mb86233d.cpp62
-rw-r--r--src/devices/cpu/mb86235/mb86235.cpp6
-rw-r--r--src/devices/cpu/mb86235/mb86235.h18
-rw-r--r--src/devices/cpu/mb86235/mb86235d.cpp38
-rw-r--r--src/devices/cpu/mb88xx/mb88dasm.cpp4
-rw-r--r--src/devices/cpu/mb88xx/mb88xx.cpp22
-rw-r--r--src/devices/cpu/mb88xx/mb88xx.h84
-rw-r--r--src/devices/cpu/mc68hc11/hc11dasm.cpp24
-rw-r--r--src/devices/cpu/mc68hc11/hc11ops.hxx1044
-rw-r--r--src/devices/cpu/mc68hc11/mc68hc11.cpp34
-rw-r--r--src/devices/cpu/mc68hc11/mc68hc11.h86
-rw-r--r--src/devices/cpu/mcs48/mcs48.cpp124
-rw-r--r--src/devices/cpu/mcs48/mcs48.h148
-rw-r--r--src/devices/cpu/mcs48/mcs48dsm.cpp6
-rw-r--r--src/devices/cpu/mcs51/mcs51.cpp190
-rw-r--r--src/devices/cpu/mcs51/mcs51.h382
-rw-r--r--src/devices/cpu/mcs51/mcs51dasm.cpp18
-rw-r--r--src/devices/cpu/mcs51/mcs51ops.hxx302
-rw-r--r--src/devices/cpu/mcs96/i8x9x.cpp52
-rw-r--r--src/devices/cpu/mcs96/i8x9x.h48
-rw-r--r--src/devices/cpu/mcs96/i8xc196.cpp16
-rw-r--r--src/devices/cpu/mcs96/i8xc196.h12
-rw-r--r--src/devices/cpu/mcs96/mcs96.cpp128
-rw-r--r--src/devices/cpu/mcs96/mcs96.h78
-rw-r--r--src/devices/cpu/mcs96/mcs96ops.lst164
-rw-r--r--src/devices/cpu/melps4/m58846.cpp6
-rw-r--r--src/devices/cpu/melps4/m58846.h6
-rw-r--r--src/devices/cpu/melps4/melps4.cpp6
-rw-r--r--src/devices/cpu/melps4/melps4.h98
-rw-r--r--src/devices/cpu/melps4/melps4d.cpp18
-rw-r--r--src/devices/cpu/melps4/melps4op.cpp28
-rw-r--r--src/devices/cpu/minx/minx.cpp16
-rw-r--r--src/devices/cpu/minx/minx.h122
-rw-r--r--src/devices/cpu/minx/minxd.cpp14
-rw-r--r--src/devices/cpu/minx/minxfunc.h158
-rw-r--r--src/devices/cpu/minx/minxopce.h66
-rw-r--r--src/devices/cpu/minx/minxopcf.h18
-rw-r--r--src/devices/cpu/minx/minxops.h76
-rw-r--r--src/devices/cpu/mips/mips3.cpp522
-rw-r--r--src/devices/cpu/mips/mips3.h304
-rw-r--r--src/devices/cpu/mips/mips3com.cpp60
-rw-r--r--src/devices/cpu/mips/mips3com.h6
-rw-r--r--src/devices/cpu/mips/mips3drc.cpp178
-rw-r--r--src/devices/cpu/mips/mips3dsm.cpp84
-rw-r--r--src/devices/cpu/mips/mips3fe.cpp18
-rw-r--r--src/devices/cpu/mips/r3000.cpp184
-rw-r--r--src/devices/cpu/mips/r3000.h134
-rw-r--r--src/devices/cpu/mips/r3kdasm.cpp56
-rw-r--r--src/devices/cpu/mn10200/mn10200.cpp136
-rw-r--r--src/devices/cpu/mn10200/mn10200.h114
-rw-r--r--src/devices/cpu/mn10200/mn102dis.cpp112
-rw-r--r--src/devices/cpu/nec/nec.cpp36
-rw-r--r--src/devices/cpu/nec/nec.h142
-rw-r--r--src/devices/cpu/nec/necdasm.cpp78
-rw-r--r--src/devices/cpu/nec/necea.h48
-rw-r--r--src/devices/cpu/nec/necinstr.hxx132
-rw-r--r--src/devices/cpu/nec/necmacro.h42
-rw-r--r--src/devices/cpu/nec/necmodrm.h16
-rw-r--r--src/devices/cpu/nec/necpriv.h10
-rw-r--r--src/devices/cpu/nec/v25.cpp36
-rw-r--r--src/devices/cpu/nec/v25.h172
-rw-r--r--src/devices/cpu/nec/v25instr.hxx2
-rw-r--r--src/devices/cpu/nec/v25priv.h10
-rw-r--r--src/devices/cpu/nec/v25sfr.cpp24
-rw-r--r--src/devices/cpu/nec/v53.cpp14
-rw-r--r--src/devices/cpu/nec/v53.h22
-rw-r--r--src/devices/cpu/patinhofeio/patinho_feio.cpp16
-rw-r--r--src/devices/cpu/patinhofeio/patinhofeio_cpu.h26
-rw-r--r--src/devices/cpu/pdp1/pdp1.cpp6
-rw-r--r--src/devices/cpu/pdp1/pdp1.h28
-rw-r--r--src/devices/cpu/pdp1/tx0.cpp10
-rw-r--r--src/devices/cpu/pdp1/tx0.h22
-rw-r--r--src/devices/cpu/pdp8/pdp8.cpp16
-rw-r--r--src/devices/cpu/pdp8/pdp8.h28
-rw-r--r--src/devices/cpu/pdp8/pdp8dasm.cpp14
-rw-r--r--src/devices/cpu/pic16c5x/16c5xdsm.cpp8
-rw-r--r--src/devices/cpu/pic16c5x/pic16c5x.cpp80
-rw-r--r--src/devices/cpu/pic16c5x/pic16c5x.h80
-rw-r--r--src/devices/cpu/pic16c62x/16c62xdsm.cpp8
-rw-r--r--src/devices/cpu/pic16c62x/pic16c62x.cpp76
-rw-r--r--src/devices/cpu/pic16c62x/pic16c62x.h82
-rw-r--r--src/devices/cpu/powerpc/ppc.h420
-rw-r--r--src/devices/cpu/powerpc/ppc_dasm.cpp30
-rw-r--r--src/devices/cpu/powerpc/ppccom.cpp222
-rw-r--r--src/devices/cpu/powerpc/ppccom.h10
-rw-r--r--src/devices/cpu/powerpc/ppcdrc.cpp154
-rw-r--r--src/devices/cpu/powerpc/ppcfe.cpp24
-rw-r--r--src/devices/cpu/powerpc/ppcfe.h12
-rw-r--r--src/devices/cpu/pps4/pps4.cpp50
-rw-r--r--src/devices/cpu/pps4/pps4.h52
-rw-r--r--src/devices/cpu/pps4/pps4dasm.cpp26
-rw-r--r--src/devices/cpu/psx/dismips.cpp86
-rw-r--r--src/devices/cpu/psx/dma.cpp24
-rw-r--r--src/devices/cpu/psx/dma.h24
-rw-r--r--src/devices/cpu/psx/gte.cpp262
-rw-r--r--src/devices/cpu/psx/gte.h66
-rw-r--r--src/devices/cpu/psx/irq.cpp4
-rw-r--r--src/devices/cpu/psx/irq.h8
-rw-r--r--src/devices/cpu/psx/mdec.cpp138
-rw-r--r--src/devices/cpu/psx/mdec.h66
-rw-r--r--src/devices/cpu/psx/psx.cpp202
-rw-r--r--src/devices/cpu/psx/psx.h158
-rw-r--r--src/devices/cpu/psx/psxdasm.cpp30
-rw-r--r--src/devices/cpu/psx/rcnt.cpp10
-rw-r--r--src/devices/cpu/psx/rcnt.h14
-rw-r--r--src/devices/cpu/psx/sio.cpp8
-rw-r--r--src/devices/cpu/psx/sio.h26
-rw-r--r--src/devices/cpu/rsp/rsp.cpp138
-rw-r--r--src/devices/cpu/rsp/rsp.h112
-rw-r--r--src/devices/cpu/rsp/rsp_dasm.cpp42
-rw-r--r--src/devices/cpu/rsp/rspcp2.cpp656
-rw-r--r--src/devices/cpu/rsp/rspcp2.h124
-rw-r--r--src/devices/cpu/rsp/rspcp2d.cpp484
-rw-r--r--src/devices/cpu/rsp/rspdiv.h2
-rw-r--r--src/devices/cpu/rsp/rspdrc.cpp42
-rw-r--r--src/devices/cpu/rsp/rspfe.cpp12
-rw-r--r--src/devices/cpu/rsp/rspfe.h10
-rw-r--r--src/devices/cpu/rsp/vand.h2
-rw-r--r--src/devices/cpu/rsp/vcmp.h2
-rw-r--r--src/devices/cpu/rsp/vdivh.h2
-rw-r--r--src/devices/cpu/rsp/vldst.h26
-rw-r--r--src/devices/cpu/rsp/vmac.h2
-rw-r--r--src/devices/cpu/rsp/vmov.h2
-rw-r--r--src/devices/cpu/rsp/vmul.h2
-rw-r--r--src/devices/cpu/rsp/vmulh.h2
-rw-r--r--src/devices/cpu/rsp/vmull.h2
-rw-r--r--src/devices/cpu/rsp/vmulm.h2
-rw-r--r--src/devices/cpu/rsp/vmuln.h2
-rw-r--r--src/devices/cpu/rsp/vor.h2
-rw-r--r--src/devices/cpu/rsp/vrcpsq.h20
-rw-r--r--src/devices/cpu/rsp/vrsq.h24
-rw-r--r--src/devices/cpu/rsp/vxor.h2
-rw-r--r--src/devices/cpu/s2650/2650dasm.cpp4
-rw-r--r--src/devices/cpu/s2650/s2650.cpp72
-rw-r--r--src/devices/cpu/s2650/s2650.h52
-rw-r--r--src/devices/cpu/saturn/satops.hxx36
-rw-r--r--src/devices/cpu/saturn/saturn.cpp12
-rw-r--r--src/devices/cpu/saturn/saturn.h68
-rw-r--r--src/devices/cpu/saturn/saturnds.cpp4
-rw-r--r--src/devices/cpu/sc61860/sc61860.cpp6
-rw-r--r--src/devices/cpu/sc61860/sc61860.h70
-rw-r--r--src/devices/cpu/sc61860/scdasm.cpp4
-rw-r--r--src/devices/cpu/sc61860/scops.hxx88
-rw-r--r--src/devices/cpu/scmp/scmp.cpp72
-rw-r--r--src/devices/cpu/scmp/scmp.h46
-rw-r--r--src/devices/cpu/scmp/scmpdasm.cpp6
-rw-r--r--src/devices/cpu/score/score.cpp192
-rw-r--r--src/devices/cpu/score/score.h56
-rw-r--r--src/devices/cpu/score/scoredsm.cpp22
-rw-r--r--src/devices/cpu/score/scorem.h6
-rw-r--r--src/devices/cpu/scudsp/scudsp.cpp98
-rw-r--r--src/devices/cpu/scudsp/scudsp.h82
-rw-r--r--src/devices/cpu/scudsp/scudspdasm.cpp6
-rw-r--r--src/devices/cpu/se3208/se3208.cpp424
-rw-r--r--src/devices/cpu/se3208/se3208.h226
-rw-r--r--src/devices/cpu/se3208/se3208dis.cpp356
-rw-r--r--src/devices/cpu/sh2/sh2.cpp544
-rw-r--r--src/devices/cpu/sh2/sh2.h500
-rw-r--r--src/devices/cpu/sh2/sh2comn.cpp42
-rw-r--r--src/devices/cpu/sh2/sh2dasm.cpp46
-rw-r--r--src/devices/cpu/sh2/sh2drc.cpp186
-rw-r--r--src/devices/cpu/sh2/sh2fe.cpp26
-rw-r--r--src/devices/cpu/sh2/sh7604_bus.cpp2
-rw-r--r--src/devices/cpu/sh2/sh7604_bus.h14
-rw-r--r--src/devices/cpu/sh2/sh7604_sci.cpp2
-rw-r--r--src/devices/cpu/sh2/sh7604_sci.h10
-rw-r--r--src/devices/cpu/sh2/sh7604_wdt.cpp4
-rw-r--r--src/devices/cpu/sh2/sh7604_wdt.h2
-rw-r--r--src/devices/cpu/sh4/sh3comn.cpp4
-rw-r--r--src/devices/cpu/sh4/sh4.cpp868
-rw-r--r--src/devices/cpu/sh4/sh4.h758
-rw-r--r--src/devices/cpu/sh4/sh4comn.cpp40
-rw-r--r--src/devices/cpu/sh4/sh4comn.h36
-rw-r--r--src/devices/cpu/sh4/sh4dasm.cpp50
-rw-r--r--src/devices/cpu/sh4/sh4dmac.cpp96
-rw-r--r--src/devices/cpu/sh4/sh4dmac.h68
-rw-r--r--src/devices/cpu/sh4/sh4tmu.cpp66
-rw-r--r--src/devices/cpu/sharc/compute.hxx162
-rw-r--r--src/devices/cpu/sharc/sharc.cpp60
-rw-r--r--src/devices/cpu/sharc/sharc.h306
-rw-r--r--src/devices/cpu/sharc/sharcdma.hxx50
-rw-r--r--src/devices/cpu/sharc/sharcdrc.cpp64
-rw-r--r--src/devices/cpu/sharc/sharcdsm.cpp92
-rw-r--r--src/devices/cpu/sharc/sharcdsm.h6
-rw-r--r--src/devices/cpu/sharc/sharcfe.cpp58
-rw-r--r--src/devices/cpu/sharc/sharcfe.h26
-rw-r--r--src/devices/cpu/sharc/sharcmem.hxx106
-rw-r--r--src/devices/cpu/sharc/sharcops.hxx172
-rw-r--r--src/devices/cpu/sm510/kb1013vk1-2.h4
-rw-r--r--src/devices/cpu/sm510/kb1013vk1-2core.cpp4
-rw-r--r--src/devices/cpu/sm510/sm500.h6
-rw-r--r--src/devices/cpu/sm510/sm500core.cpp6
-rw-r--r--src/devices/cpu/sm510/sm510.cpp16
-rw-r--r--src/devices/cpu/sm510/sm510.h78
-rw-r--r--src/devices/cpu/sm510/sm510core.cpp4
-rw-r--r--src/devices/cpu/sm510/sm510d.cpp38
-rw-r--r--src/devices/cpu/sm510/sm510op.cpp22
-rw-r--r--src/devices/cpu/sm510/sm511core.cpp8
-rw-r--r--src/devices/cpu/sm8500/sm8500.cpp24
-rw-r--r--src/devices/cpu/sm8500/sm8500.h70
-rw-r--r--src/devices/cpu/sm8500/sm8500d.cpp24
-rw-r--r--src/devices/cpu/sm8500/sm85ops.h10
-rw-r--r--src/devices/cpu/sparc/mb86901.cpp198
-rw-r--r--src/devices/cpu/sparc/sparc.h148
-rw-r--r--src/devices/cpu/sparc/sparcdasm.cpp58
-rw-r--r--src/devices/cpu/sparc/sparcdasm.h70
-rw-r--r--src/devices/cpu/sparc/sparcdefs.h18
-rw-r--r--src/devices/cpu/sparc/sparcv8ops.ipp46
-rw-r--r--src/devices/cpu/sparc/ss1fcode.ipp194
-rw-r--r--src/devices/cpu/spc700/spc700.cpp86
-rw-r--r--src/devices/cpu/spc700/spc700.h132
-rw-r--r--src/devices/cpu/spc700/spc700ds.cpp4
-rw-r--r--src/devices/cpu/ssem/ssem.cpp32
-rw-r--r--src/devices/cpu/ssem/ssem.h26
-rw-r--r--src/devices/cpu/ssem/ssemdasm.cpp16
-rw-r--r--src/devices/cpu/ssp1601/ssp1601.cpp42
-rw-r--r--src/devices/cpu/ssp1601/ssp1601.h52
-rw-r--r--src/devices/cpu/ssp1601/ssp1601d.cpp6
-rw-r--r--src/devices/cpu/superfx/sfx_dasm.cpp26
-rw-r--r--src/devices/cpu/superfx/superfx.cpp176
-rw-r--r--src/devices/cpu/superfx/superfx.h134
-rw-r--r--src/devices/cpu/t11/t11.cpp16
-rw-r--r--src/devices/cpu/t11/t11.h2110
-rw-r--r--src/devices/cpu/t11/t11dasm.cpp38
-rw-r--r--src/devices/cpu/t11/t11ops.hxx2164
-rw-r--r--src/devices/cpu/tlcs90/tlcs90.cpp156
-rw-r--r--src/devices/cpu/tlcs90/tlcs90.h104
-rw-r--r--src/devices/cpu/tlcs900/900tbl.hxx374
-rw-r--r--src/devices/cpu/tlcs900/dasm900.cpp20
-rw-r--r--src/devices/cpu/tlcs900/tlcs900.cpp36
-rw-r--r--src/devices/cpu/tlcs900/tlcs900.h186
-rw-r--r--src/devices/cpu/tms1000/tms0270.cpp6
-rw-r--r--src/devices/cpu/tms1000/tms0270.h20
-rw-r--r--src/devices/cpu/tms1000/tms0970.cpp24
-rw-r--r--src/devices/cpu/tms1000/tms0970.h10
-rw-r--r--src/devices/cpu/tms1000/tms0980.cpp40
-rw-r--r--src/devices/cpu/tms1000/tms0980.h24
-rw-r--r--src/devices/cpu/tms1000/tms1000.cpp24
-rw-r--r--src/devices/cpu/tms1000/tms1000.h16
-rw-r--r--src/devices/cpu/tms1000/tms1100.cpp12
-rw-r--r--src/devices/cpu/tms1000/tms1100.h12
-rw-r--r--src/devices/cpu/tms1000/tms1400.cpp12
-rw-r--r--src/devices/cpu/tms1000/tms1400.h12
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.cpp6
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.h118
-rw-r--r--src/devices/cpu/tms1000/tms1k_dasm.cpp24
-rw-r--r--src/devices/cpu/tms1000/tp0320.cpp12
-rw-r--r--src/devices/cpu/tms1000/tp0320.h8
-rw-r--r--src/devices/cpu/tms32010/32010dsm.cpp4
-rw-r--r--src/devices/cpu/tms32010/tms32010.cpp70
-rw-r--r--src/devices/cpu/tms32010/tms32010.h60
-rw-r--r--src/devices/cpu/tms32025/32025dsm.cpp4
-rw-r--r--src/devices/cpu/tms32025/tms32025.cpp176
-rw-r--r--src/devices/cpu/tms32025/tms32025.h86
-rw-r--r--src/devices/cpu/tms32031/32031ops.hxx2436
-rw-r--r--src/devices/cpu/tms32031/dis32031.cpp48
-rw-r--r--src/devices/cpu/tms32031/tms32031.cpp66
-rw-r--r--src/devices/cpu/tms32031/tms32031.h1130
-rw-r--r--src/devices/cpu/tms32051/32051ops.hxx370
-rw-r--r--src/devices/cpu/tms32051/dis32051.cpp14
-rw-r--r--src/devices/cpu/tms32051/tms32051.cpp32
-rw-r--r--src/devices/cpu/tms32051/tms32051.h166
-rw-r--r--src/devices/cpu/tms32082/dis_mp.cpp22
-rw-r--r--src/devices/cpu/tms32082/dis_pp.cpp22
-rw-r--r--src/devices/cpu/tms32082/mp_ops.cpp362
-rw-r--r--src/devices/cpu/tms32082/tms32082.cpp66
-rw-r--r--src/devices/cpu/tms32082/tms32082.h78
-rw-r--r--src/devices/cpu/tms34010/34010dsm.cpp74
-rw-r--r--src/devices/cpu/tms34010/34010fld.hxx376
-rw-r--r--src/devices/cpu/tms34010/34010gfx.hxx144
-rw-r--r--src/devices/cpu/tms34010/34010ops.h48
-rw-r--r--src/devices/cpu/tms34010/34010ops.hxx1110
-rw-r--r--src/devices/cpu/tms34010/dis34010.cpp8
-rw-r--r--src/devices/cpu/tms34010/tms34010.cpp220
-rw-r--r--src/devices/cpu/tms34010/tms34010.h1240
-rw-r--r--src/devices/cpu/tms57002/57002dsm.cpp6
-rw-r--r--src/devices/cpu/tms57002/tms57002.cpp150
-rw-r--r--src/devices/cpu/tms57002/tms57002.h104
-rw-r--r--src/devices/cpu/tms57002/tms57kdec.cpp30
-rw-r--r--src/devices/cpu/tms57002/tmsinstr.lst46
-rwxr-xr-xsrc/devices/cpu/tms57002/tmsmake.py2
-rw-r--r--src/devices/cpu/tms7000/7000dasm.cpp24
-rw-r--r--src/devices/cpu/tms7000/tms7000.cpp32
-rw-r--r--src/devices/cpu/tms7000/tms7000.h164
-rw-r--r--src/devices/cpu/tms7000/tms7000op.cpp202
-rw-r--r--src/devices/cpu/tms9900/9900dasm.cpp8
-rw-r--r--src/devices/cpu/tms9900/99xxcore.h328
-rw-r--r--src/devices/cpu/tms9900/ti990_10.cpp14
-rw-r--r--src/devices/cpu/tms9900/ti990_10.h22
-rw-r--r--src/devices/cpu/tms9900/tms9900.cpp110
-rw-r--r--src/devices/cpu/tms9900/tms9900.h66
-rw-r--r--src/devices/cpu/tms9900/tms9980a.cpp22
-rw-r--r--src/devices/cpu/tms9900/tms9980a.h18
-rw-r--r--src/devices/cpu/tms9900/tms9995.cpp124
-rw-r--r--src/devices/cpu/tms9900/tms9995.h82
-rw-r--r--src/devices/cpu/ucom4/ucom4.cpp20
-rw-r--r--src/devices/cpu/ucom4/ucom4.h76
-rw-r--r--src/devices/cpu/ucom4/ucom4d.cpp14
-rw-r--r--src/devices/cpu/ucom4/ucom4op.cpp34
-rw-r--r--src/devices/cpu/uml.cpp90
-rw-r--r--src/devices/cpu/uml.h88
-rw-r--r--src/devices/cpu/unsp/unsp.cpp62
-rw-r--r--src/devices/cpu/unsp/unsp.h44
-rw-r--r--src/devices/cpu/unsp/unspdasm.cpp4
-rw-r--r--src/devices/cpu/upd7725/dasm7725.cpp28
-rw-r--r--src/devices/cpu/upd7725/upd7725.cpp66
-rw-r--r--src/devices/cpu/upd7725/upd7725.h70
-rw-r--r--src/devices/cpu/upd7810/upd7810.cpp34
-rw-r--r--src/devices/cpu/upd7810/upd7810.h172
-rw-r--r--src/devices/cpu/upd7810/upd7810_dasm.cpp16
-rw-r--r--src/devices/cpu/upd7810/upd7810_opcodes.cpp1340
-rw-r--r--src/devices/cpu/v30mz/v30mz.cpp374
-rw-r--r--src/devices/cpu/v30mz/v30mz.h174
-rw-r--r--src/devices/cpu/v60/am.hxx10
-rw-r--r--src/devices/cpu/v60/am1.hxx348
-rw-r--r--src/devices/cpu/v60/am2.hxx328
-rw-r--r--src/devices/cpu/v60/am3.hxx218
-rw-r--r--src/devices/cpu/v60/op12.hxx612
-rw-r--r--src/devices/cpu/v60/op2.hxx56
-rw-r--r--src/devices/cpu/v60/op3.hxx178
-rw-r--r--src/devices/cpu/v60/op4.hxx124
-rw-r--r--src/devices/cpu/v60/op5.hxx20
-rw-r--r--src/devices/cpu/v60/op6.hxx72
-rw-r--r--src/devices/cpu/v60/op7a.hxx278
-rw-r--r--src/devices/cpu/v60/v60.cpp54
-rw-r--r--src/devices/cpu/v60/v60.h1208
-rw-r--r--src/devices/cpu/v60/v60d.cpp2
-rw-r--r--src/devices/cpu/v810/v810.cpp330
-rw-r--r--src/devices/cpu/v810/v810.h162
-rw-r--r--src/devices/cpu/v810/v810dasm.cpp4
-rw-r--r--src/devices/cpu/x86emit.h3504
-rw-r--r--src/devices/cpu/x86log.cpp8
-rw-r--r--src/devices/cpu/z180/z180.cpp40
-rw-r--r--src/devices/cpu/z180/z180.h106
-rw-r--r--src/devices/cpu/z180/z180dasm.cpp22
-rw-r--r--src/devices/cpu/z180/z180ed.hxx2
-rw-r--r--src/devices/cpu/z180/z180ops.h112
-rw-r--r--src/devices/cpu/z180/z180tbl.h22
-rw-r--r--src/devices/cpu/z8/z8.cpp64
-rw-r--r--src/devices/cpu/z8/z8.h128
-rw-r--r--src/devices/cpu/z8/z8dasm.cpp8
-rw-r--r--src/devices/cpu/z8/z8ops.hxx246
-rw-r--r--src/devices/cpu/z80/kl5c80a12.cpp2
-rw-r--r--src/devices/cpu/z80/kl5c80a12.h2
-rw-r--r--src/devices/cpu/z80/tmpz84c011.cpp2
-rw-r--r--src/devices/cpu/z80/tmpz84c011.h6
-rw-r--r--src/devices/cpu/z80/tmpz84c015.cpp4
-rw-r--r--src/devices/cpu/z80/tmpz84c015.h4
-rw-r--r--src/devices/cpu/z80/z80.cpp210
-rw-r--r--src/devices/cpu/z80/z80.h138
-rw-r--r--src/devices/cpu/z80/z80daisy.h4
-rw-r--r--src/devices/cpu/z80/z80dasm.cpp22
-rw-r--r--src/devices/cpu/z8000/8000dasm.cpp12
-rw-r--r--src/devices/cpu/z8000/makedab.cpp2
-rw-r--r--src/devices/cpu/z8000/z8000.cpp92
-rw-r--r--src/devices/cpu/z8000/z8000.h260
-rw-r--r--src/devices/cpu/z8000/z8000cpu.h44
-rw-r--r--src/devices/cpu/z8000/z8000dab.h2
-rw-r--r--src/devices/cpu/z8000/z8000ops.hxx506
714 files changed, 42405 insertions, 42405 deletions
diff --git a/src/devices/cpu/8x300/8x300.cpp b/src/devices/cpu/8x300/8x300.cpp
index 58a9077fd9d..9800d6bf57e 100644
--- a/src/devices/cpu/8x300/8x300.cpp
+++ b/src/devices/cpu/8x300/8x300.cpp
@@ -39,14 +39,14 @@
const device_type N8X300 = &device_creator<n8x300_cpu_device>;
-n8x300_cpu_device::n8x300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+n8x300_cpu_device::n8x300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, N8X300, "Signetics 8X300", tag, owner, clock, "8x300", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 16, 14, 0)
, m_io_config("io", ENDIANNESS_BIG, 8, 9, 0)
{
}
-void n8x300_cpu_device::set_reg(UINT8 reg, UINT8 val)
+void n8x300_cpu_device::set_reg(uint8_t reg, uint8_t val)
{
switch(reg)
{
@@ -65,7 +65,7 @@ void n8x300_cpu_device::set_reg(UINT8 reg, UINT8 val)
}
}
-UINT8 n8x300_cpu_device::get_reg(UINT8 reg)
+uint8_t n8x300_cpu_device::get_reg(uint8_t reg)
{
switch(reg)
{
@@ -158,12 +158,12 @@ void n8x300_cpu_device::execute_run()
{
do
{
- UINT16 opcode;
- UINT8 src;
- UINT8 dst;
- UINT8 rotlen; // rotate amount or I/O field length
- UINT8 mask;
- UINT16 result;
+ uint16_t opcode;
+ uint8_t src;
+ uint8_t dst;
+ uint8_t rotlen; // rotate amount or I/O field length
+ uint8_t mask;
+ uint16_t result;
/* fetch the opcode */
debugger_instruction_hook(this, m_genPC);
@@ -543,7 +543,7 @@ void n8x300_cpu_device::execute_run()
} while (m_icount > 0);
}
-offs_t n8x300_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t n8x300_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( n8x300 );
return CPU_DISASSEMBLE_NAME(n8x300)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/8x300/8x300.h b/src/devices/cpu/8x300/8x300.h
index 0ba76e30d20..ef34c7b00b8 100644
--- a/src/devices/cpu/8x300/8x300.h
+++ b/src/devices/cpu/8x300/8x300.h
@@ -43,7 +43,7 @@ class n8x300_cpu_device : public cpu_device
{
public:
// construction/destruction
- n8x300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ n8x300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -51,9 +51,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -68,9 +68,9 @@ protected:
}
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
address_space_config m_io_config;
@@ -81,53 +81,53 @@ protected:
direct_read_data *m_direct;
address_space *m_io;
- UINT16 m_PC; // Program Counter
- UINT16 m_AR; // Address Register
- UINT16 m_IR; // Instruction Register
- UINT8 m_AUX; // Auxiliary Register (second operand for AND, ADD, XOR)
- UINT8 m_R1;
- UINT8 m_R2;
- UINT8 m_R3;
- UINT8 m_R4;
- UINT8 m_R5;
- UINT8 m_R6;
- UINT8 m_R11;
- UINT8 m_IVL; // Interface vector (I/O) left bank (write-only)
- UINT8 m_IVR; // Interface vector (I/O) right bank (write-only)
- UINT8 m_OVF; // Overflow register (read-only)
- UINT16 m_genPC;
-
- UINT8 m_left_IV; // IV bank contents, these are latched when IVL or IVR are set
- UINT8 m_right_IV;
+ uint16_t m_PC; // Program Counter
+ uint16_t m_AR; // Address Register
+ uint16_t m_IR; // Instruction Register
+ uint8_t m_AUX; // Auxiliary Register (second operand for AND, ADD, XOR)
+ uint8_t m_R1;
+ uint8_t m_R2;
+ uint8_t m_R3;
+ uint8_t m_R4;
+ uint8_t m_R5;
+ uint8_t m_R6;
+ uint8_t m_R11;
+ uint8_t m_IVL; // Interface vector (I/O) left bank (write-only)
+ uint8_t m_IVR; // Interface vector (I/O) right bank (write-only)
+ uint8_t m_OVF; // Overflow register (read-only)
+ uint16_t m_genPC;
+
+ uint8_t m_left_IV; // IV bank contents, these are latched when IVL or IVR are set
+ uint8_t m_right_IV;
private:
- inline bool is_rot(UINT16 opcode)
+ inline bool is_rot(uint16_t opcode)
{
if((opcode & 0x1000) || (opcode & 0x0010))
return false;
else
return true;
}
- inline bool is_src_reg(UINT16 opcode)
+ inline bool is_src_reg(uint16_t opcode)
{
if((opcode & 0x1000))
return false;
else
return true;
}
- inline bool is_dst_reg(UINT16 opcode)
+ inline bool is_dst_reg(uint16_t opcode)
{
if((opcode & 0x0010))
return false;
else
return true;
}
- inline UINT8 rotate(UINT8 s, UINT8 n) // right rotate
+ inline uint8_t rotate(uint8_t s, uint8_t n) // right rotate
{
- return ((s & ((UINT8)0xff << n)) >> n) | ((s & ((UINT8)0xff >> (8-n))) << (8-n));
+ return ((s & ((uint8_t)0xff << n)) >> n) | ((s & ((uint8_t)0xff >> (8-n))) << (8-n));
}
- void set_reg(UINT8 reg,UINT8 val);
- UINT8 get_reg(UINT8 reg);
+ void set_reg(uint8_t reg,uint8_t val);
+ uint8_t get_reg(uint8_t reg);
};
extern const device_type N8X300;
diff --git a/src/devices/cpu/8x300/8x300dasm.cpp b/src/devices/cpu/8x300/8x300dasm.cpp
index eb65e735162..562dbaf4693 100644
--- a/src/devices/cpu/8x300/8x300dasm.cpp
+++ b/src/devices/cpu/8x300/8x300dasm.cpp
@@ -25,7 +25,7 @@ static const char *reg_names[32] =
};
// determines if right rotate or I/O field length is to be used
-static inline bool is_rot(UINT16 opcode)
+static inline bool is_rot(uint16_t opcode)
{
if((opcode & 0x1000) || (opcode & 0x0010))
return false;
@@ -33,7 +33,7 @@ static inline bool is_rot(UINT16 opcode)
return true;
}
-static inline bool is_src_rot(UINT16 opcode)
+static inline bool is_src_rot(uint16_t opcode)
{
if((opcode & 0x1000))
return false;
@@ -45,8 +45,8 @@ CPU_DISASSEMBLE( n8x300 )
{
char tmp[16];
unsigned startpc = pc;
- UINT16 opcode = (oprom[pc - startpc] << 8) | oprom[pc+1 - startpc];
- UINT8 inst = opcode >> 13;
+ uint16_t opcode = (oprom[pc - startpc] << 8) | oprom[pc+1 - startpc];
+ uint8_t inst = opcode >> 13;
pc+=2;
// determine instruction
diff --git a/src/devices/cpu/adsp2100/2100ops.hxx b/src/devices/cpu/adsp2100/2100ops.hxx
index c52767bd9cf..7143b90fb67 100644
--- a/src/devices/cpu/adsp2100/2100ops.hxx
+++ b/src/devices/cpu/adsp2100/2100ops.hxx
@@ -49,7 +49,7 @@
#define CALC_NZVC_SUB(s,d,r) CLR_FLAGS; CALC_N(r); CALC_Z(r); CALC_V(s,d,r); CALC_C_SUB(r)
/* ADSP-218x constants */
-static const INT32 constants[] =
+static const int32_t constants[] =
{
0x0001, 0xfffe, 0x0002, 0xfffd, 0x0004, 0xfffb, 0x0008, 0xfff7,
0x0010, 0xffef, 0x0020, 0xffdf, 0x0040, 0xffbf, 0x0080, 0xff7f,
@@ -112,7 +112,7 @@ inline void adsp21xx_device::update_mstat()
PC stack handlers
===========================================================================*/
-inline UINT32 adsp21xx_device::pc_stack_top()
+inline uint32_t adsp21xx_device::pc_stack_top()
{
if (m_pc_sp > 0)
return m_pc_stack[m_pc_sp - 1];
@@ -120,7 +120,7 @@ inline UINT32 adsp21xx_device::pc_stack_top()
return m_pc_stack[0];
}
-inline void adsp21xx_device::set_pc_stack_top(UINT32 top)
+inline void adsp21xx_device::set_pc_stack_top(uint32_t top)
{
if (m_pc_sp > 0)
m_pc_stack[m_pc_sp - 1] = top;
@@ -140,7 +140,7 @@ inline void adsp21xx_device::pc_stack_push()
m_sstat |= PC_OVER;
}
-inline void adsp21xx_device::pc_stack_push_val(UINT32 val)
+inline void adsp21xx_device::pc_stack_push_val(uint32_t val)
{
if (m_pc_sp < PC_STACK_DEPTH)
{
@@ -163,7 +163,7 @@ inline void adsp21xx_device::pc_stack_pop()
m_pc = m_pc_stack[m_pc_sp];
}
-inline UINT32 adsp21xx_device::pc_stack_pop_val()
+inline uint32_t adsp21xx_device::pc_stack_pop_val()
{
if (m_pc_sp > 0)
{
@@ -179,7 +179,7 @@ inline UINT32 adsp21xx_device::pc_stack_pop_val()
CNTR stack handlers
===========================================================================*/
-inline UINT32 adsp21xx_device::cntr_stack_top()
+inline uint32_t adsp21xx_device::cntr_stack_top()
{
if (m_cntr_sp > 0)
return m_cntr_stack[m_cntr_sp - 1];
@@ -215,7 +215,7 @@ inline void adsp21xx_device::cntr_stack_pop()
LOOP stack handlers
===========================================================================*/
-inline UINT32 adsp21xx_device::loop_stack_top()
+inline uint32_t adsp21xx_device::loop_stack_top()
{
if (m_loop_sp > 0)
return m_loop_stack[m_loop_sp - 1];
@@ -223,7 +223,7 @@ inline UINT32 adsp21xx_device::loop_stack_top()
return m_loop_stack[0];
}
-inline void adsp21xx_device::loop_stack_push(UINT32 value)
+inline void adsp21xx_device::loop_stack_push(uint32_t value)
{
if (m_loop_sp < LOOP_STACK_DEPTH)
{
@@ -311,7 +311,7 @@ inline int adsp21xx_device::condition(int c)
int adsp21xx_device::slow_condition()
{
- if ((INT32)--m_cntr > 0)
+ if ((int32_t)--m_cntr > 0)
return 1;
else
{
@@ -337,7 +337,7 @@ inline void adsp21xx_device::update_l(int which)
m_base[which] = m_i[which] & m_lmask[which];
}
-void adsp21xx_device::write_reg0(int regnum, INT32 val)
+void adsp21xx_device::write_reg0(int regnum, int32_t val)
{
switch (regnum)
{
@@ -350,17 +350,17 @@ void adsp21xx_device::write_reg0(int regnum, INT32 val)
case 0x06: m_core.my0.s = val; break;
case 0x07: m_core.my1.s = val; break;
case 0x08: m_core.si.s = val; break;
- case 0x09: m_core.se.s = (INT8)val; break;
+ case 0x09: m_core.se.s = (int8_t)val; break;
case 0x0a: m_core.ar.s = val; break;
case 0x0b: m_core.mr.mrx.mr0.s = val; break;
- case 0x0c: m_core.mr.mrx.mr1.s = val; m_core.mr.mrx.mr2.s = (INT16)val >> 15; break;
- case 0x0d: m_core.mr.mrx.mr2.s = (INT8)val; break;
+ case 0x0c: m_core.mr.mrx.mr1.s = val; m_core.mr.mrx.mr2.s = (int16_t)val >> 15; break;
+ case 0x0d: m_core.mr.mrx.mr2.s = (int8_t)val; break;
case 0x0e: m_core.sr.srx.sr0.s = val; break;
case 0x0f: m_core.sr.srx.sr1.s = val; break;
}
}
-void adsp21xx_device::write_reg1(int regnum, INT32 val)
+void adsp21xx_device::write_reg1(int regnum, int32_t val)
{
int index = regnum & 3;
switch (regnum >> 2)
@@ -371,7 +371,7 @@ void adsp21xx_device::write_reg1(int regnum, INT32 val)
break;
case 1:
- m_m[index] = (INT32)(val << 18) >> 18;
+ m_m[index] = (int32_t)(val << 18) >> 18;
break;
case 2:
@@ -389,7 +389,7 @@ void adsp21xx_device::write_reg1(int regnum, INT32 val)
}
}
-void adsp21xx_device::write_reg2(int regnum, INT32 val)
+void adsp21xx_device::write_reg2(int regnum, int32_t val)
{
int index = 4 + (regnum & 3);
switch (regnum >> 2)
@@ -400,7 +400,7 @@ void adsp21xx_device::write_reg2(int regnum, INT32 val)
break;
case 1:
- m_m[index] = (INT32)(val << 18) >> 18;
+ m_m[index] = (int32_t)(val << 18) >> 18;
break;
case 2:
@@ -414,7 +414,7 @@ void adsp21xx_device::write_reg2(int regnum, INT32 val)
}
}
-void adsp21xx_device::write_reg3(int regnum, INT32 val)
+void adsp21xx_device::write_reg3(int regnum, int32_t val)
{
switch (regnum)
{
@@ -423,7 +423,7 @@ void adsp21xx_device::write_reg3(int regnum, INT32 val)
case 0x03: m_imask = val & m_imask_mask; check_irqs(); break;
case 0x04: m_icntl = val & 0x001f; check_irqs(); break;
case 0x05: cntr_stack_push(); m_cntr = val & 0x3fff; break;
- case 0x06: m_core.sb.s = (INT32)(val << 27) >> 27; break;
+ case 0x06: m_core.sb.s = (int32_t)(val << 27) >> 27; break;
case 0x07: m_px = val; break;
case 0x09: if (!m_sport_tx_cb.isnull()) m_sport_tx_cb(0, val, 0xffff); break;
case 0x0b: if (!m_sport_tx_cb.isnull()) m_sport_tx_cb(1, val, 0xffff); break;
@@ -479,22 +479,22 @@ void adsp21xx_device::write_reg3(int regnum, INT32 val)
register reading
===========================================================================*/
-INT32 adsp21xx_device::read_reg0(int regnum)
+int32_t adsp21xx_device::read_reg0(int regnum)
{
return *m_read0_ptr[regnum];
}
-INT32 adsp21xx_device::read_reg1(int regnum)
+int32_t adsp21xx_device::read_reg1(int regnum)
{
return *m_read1_ptr[regnum];
}
-INT32 adsp21xx_device::read_reg2(int regnum)
+int32_t adsp21xx_device::read_reg2(int regnum)
{
return *m_read2_ptr[regnum];
}
-INT32 adsp21xx_device::read_reg3(int regnum)
+int32_t adsp21xx_device::read_reg3(int regnum)
{
switch (regnum)
{
@@ -519,11 +519,11 @@ INT32 adsp21xx_device::read_reg3(int regnum)
Modulus addressing logic
===========================================================================*/
-inline void adsp21xx_device::modify_address(UINT32 ireg, UINT32 mreg)
+inline void adsp21xx_device::modify_address(uint32_t ireg, uint32_t mreg)
{
- UINT32 base = m_base[ireg];
- UINT32 i = m_i[ireg];
- UINT32 l = m_l[ireg];
+ uint32_t base = m_base[ireg];
+ uint32_t i = m_i[ireg];
+ uint32_t l = m_l[ireg];
i += m_m[mreg];
if (i < base) i += l;
@@ -537,17 +537,17 @@ inline void adsp21xx_device::modify_address(UINT32 ireg, UINT32 mreg)
Data memory accessors
===========================================================================*/
-inline void adsp21xx_device::data_write_dag1(UINT32 op, INT32 val)
+inline void adsp21xx_device::data_write_dag1(uint32_t op, int32_t val)
{
- UINT32 ireg = (op >> 2) & 3;
- UINT32 mreg = op & 3;
- UINT32 base = m_base[ireg];
- UINT32 i = m_i[ireg];
- UINT32 l = m_l[ireg];
+ uint32_t ireg = (op >> 2) & 3;
+ uint32_t mreg = op & 3;
+ uint32_t base = m_base[ireg];
+ uint32_t i = m_i[ireg];
+ uint32_t l = m_l[ireg];
if ( m_mstat & MSTAT_REVERSE )
{
- UINT32 ir = m_reverse_table[ i & 0x3fff ];
+ uint32_t ir = m_reverse_table[ i & 0x3fff ];
data_write(ir, val);
}
else
@@ -560,18 +560,18 @@ inline void adsp21xx_device::data_write_dag1(UINT32 op, INT32 val)
}
-inline UINT32 adsp21xx_device::data_read_dag1(UINT32 op)
+inline uint32_t adsp21xx_device::data_read_dag1(uint32_t op)
{
- UINT32 ireg = (op >> 2) & 3;
- UINT32 mreg = op & 3;
- UINT32 base = m_base[ireg];
- UINT32 i = m_i[ireg];
- UINT32 l = m_l[ireg];
- UINT32 res;
+ uint32_t ireg = (op >> 2) & 3;
+ uint32_t mreg = op & 3;
+ uint32_t base = m_base[ireg];
+ uint32_t i = m_i[ireg];
+ uint32_t l = m_l[ireg];
+ uint32_t res;
if (m_mstat & MSTAT_REVERSE)
{
- UINT32 ir = m_reverse_table[i & 0x3fff];
+ uint32_t ir = m_reverse_table[i & 0x3fff];
res = data_read(ir);
}
else
@@ -585,13 +585,13 @@ inline UINT32 adsp21xx_device::data_read_dag1(UINT32 op)
return res;
}
-inline void adsp21xx_device::data_write_dag2(UINT32 op, INT32 val)
+inline void adsp21xx_device::data_write_dag2(uint32_t op, int32_t val)
{
- UINT32 ireg = 4 + ((op >> 2) & 3);
- UINT32 mreg = 4 + (op & 3);
- UINT32 base = m_base[ireg];
- UINT32 i = m_i[ireg];
- UINT32 l = m_l[ireg];
+ uint32_t ireg = 4 + ((op >> 2) & 3);
+ uint32_t mreg = 4 + (op & 3);
+ uint32_t base = m_base[ireg];
+ uint32_t i = m_i[ireg];
+ uint32_t l = m_l[ireg];
data_write(i, val);
@@ -602,15 +602,15 @@ inline void adsp21xx_device::data_write_dag2(UINT32 op, INT32 val)
}
-inline UINT32 adsp21xx_device::data_read_dag2(UINT32 op)
+inline uint32_t adsp21xx_device::data_read_dag2(uint32_t op)
{
- UINT32 ireg = 4 + ((op >> 2) & 3);
- UINT32 mreg = 4 + (op & 3);
- UINT32 base = m_base[ireg];
- UINT32 i = m_i[ireg];
- UINT32 l = m_l[ireg];
+ uint32_t ireg = 4 + ((op >> 2) & 3);
+ uint32_t mreg = 4 + (op & 3);
+ uint32_t base = m_base[ireg];
+ uint32_t i = m_i[ireg];
+ uint32_t l = m_l[ireg];
- UINT32 res = data_read(i);
+ uint32_t res = data_read(i);
i += m_m[mreg];
if (i < base) i += l;
@@ -624,13 +624,13 @@ inline UINT32 adsp21xx_device::data_read_dag2(UINT32 op)
Program memory accessors
===========================================================================*/
-inline void adsp21xx_device::pgm_write_dag2(UINT32 op, INT32 val)
+inline void adsp21xx_device::pgm_write_dag2(uint32_t op, int32_t val)
{
- UINT32 ireg = 4 + ((op >> 2) & 3);
- UINT32 mreg = 4 + (op & 3);
- UINT32 base = m_base[ireg];
- UINT32 i = m_i[ireg];
- UINT32 l = m_l[ireg];
+ uint32_t ireg = 4 + ((op >> 2) & 3);
+ uint32_t mreg = 4 + (op & 3);
+ uint32_t base = m_base[ireg];
+ uint32_t i = m_i[ireg];
+ uint32_t l = m_l[ireg];
program_write(i, (val << 8) | m_px);
@@ -641,14 +641,14 @@ inline void adsp21xx_device::pgm_write_dag2(UINT32 op, INT32 val)
}
-inline UINT32 adsp21xx_device::pgm_read_dag2(UINT32 op)
+inline uint32_t adsp21xx_device::pgm_read_dag2(uint32_t op)
{
- UINT32 ireg = 4 + ((op >> 2) & 3);
- UINT32 mreg = 4 + (op & 3);
- UINT32 base = m_base[ireg];
- UINT32 i = m_i[ireg];
- UINT32 l = m_l[ireg];
- UINT32 res;
+ uint32_t ireg = 4 + ((op >> 2) & 3);
+ uint32_t mreg = 4 + (op & 3);
+ uint32_t base = m_base[ireg];
+ uint32_t i = m_i[ireg];
+ uint32_t l = m_l[ireg];
+ uint32_t res;
res = program_read(i);
m_px = res;
@@ -668,16 +668,16 @@ inline UINT32 adsp21xx_device::pgm_read_dag2(UINT32 op)
register reading
===========================================================================*/
-#define ALU_GETXREG_UNSIGNED(x) (*(UINT16 *)m_alu_xregs[x])
-#define ALU_GETYREG_UNSIGNED(y) (*(UINT16 *)m_alu_yregs[y])
+#define ALU_GETXREG_UNSIGNED(x) (*(uint16_t *)m_alu_xregs[x])
+#define ALU_GETYREG_UNSIGNED(y) (*(uint16_t *)m_alu_yregs[y])
-#define MAC_GETXREG_UNSIGNED(x) (*(UINT16 *)m_mac_xregs[x])
-#define MAC_GETXREG_SIGNED(x) (*( INT16 *)m_mac_xregs[x])
-#define MAC_GETYREG_UNSIGNED(y) (*(UINT16 *)m_mac_yregs[y])
-#define MAC_GETYREG_SIGNED(y) (*( INT16 *)m_mac_yregs[y])
+#define MAC_GETXREG_UNSIGNED(x) (*(uint16_t *)m_mac_xregs[x])
+#define MAC_GETXREG_SIGNED(x) (*( int16_t *)m_mac_xregs[x])
+#define MAC_GETYREG_UNSIGNED(y) (*(uint16_t *)m_mac_yregs[y])
+#define MAC_GETYREG_SIGNED(y) (*( int16_t *)m_mac_yregs[y])
-#define SHIFT_GETXREG_UNSIGNED(x) (*(UINT16 *)m_shift_xregs[x])
-#define SHIFT_GETXREG_SIGNED(x) (*( INT16 *)m_shift_xregs[x])
+#define SHIFT_GETXREG_UNSIGNED(x) (*(uint16_t *)m_shift_xregs[x])
+#define SHIFT_GETXREG_SIGNED(x) (*( int16_t *)m_shift_xregs[x])
@@ -687,9 +687,9 @@ inline UINT32 adsp21xx_device::pgm_read_dag2(UINT32 op)
void adsp21xx_device::alu_op_ar(int op)
{
- INT32 xop = (op >> 8) & 7;
- INT32 yop = (op >> 11) & 3;
- INT32 res;
+ int32_t xop = (op >> 8) & 7;
+ int32_t yop = (op >> 11) & 3;
+ int32_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -825,9 +825,9 @@ void adsp21xx_device::alu_op_ar(int op)
void adsp21xx_device::alu_op_ar_const(int op)
{
- INT32 xop = (op >> 8) & 7;
- INT32 yop = constants[((op >> 5) & 0x07) | ((op >> 8) & 0x18)];
- INT32 res;
+ int32_t xop = (op >> 8) & 7;
+ int32_t yop = constants[((op >> 5) & 0x07) | ((op >> 8) & 0x18)];
+ int32_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -951,9 +951,9 @@ void adsp21xx_device::alu_op_ar_const(int op)
void adsp21xx_device::alu_op_af(int op)
{
- INT32 xop = (op >> 8) & 7;
- INT32 yop = (op >> 11) & 3;
- INT32 res;
+ int32_t xop = (op >> 8) & 7;
+ int32_t yop = (op >> 11) & 3;
+ int32_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -1086,9 +1086,9 @@ void adsp21xx_device::alu_op_af(int op)
void adsp21xx_device::alu_op_af_const(int op)
{
- INT32 xop = (op >> 8) & 7;
- INT32 yop = constants[((op >> 5) & 0x07) | ((op >> 8) & 0x18)];
- INT32 res;
+ int32_t xop = (op >> 8) & 7;
+ int32_t yop = constants[((op >> 5) & 0x07) | ((op >> 8) & 0x18)];
+ int32_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -1209,9 +1209,9 @@ void adsp21xx_device::alu_op_af_const(int op)
void adsp21xx_device::alu_op_none(int op)
{
- INT32 xop = (op >> 8) & 7;
- INT32 yop = (op >> 11) & 3;
- INT32 res;
+ int32_t xop = (op >> 8) & 7;
+ int32_t yop = (op >> 11) & 3;
+ int32_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -1338,11 +1338,11 @@ void adsp21xx_device::alu_op_none(int op)
void adsp21xx_device::mac_op_mr(int op)
{
- INT8 shift = ((m_mstat & MSTAT_INTEGER) >> 4) ^ 1;
- INT32 xop = (op >> 8) & 7;
- INT32 yop = (op >> 11) & 3;
- INT32 temp;
- INT64 res;
+ int8_t shift = ((m_mstat & MSTAT_INTEGER) >> 4) ^ 1;
+ int32_t xop = (op >> 8) & 7;
+ int32_t yop = (op >> 11) & 3;
+ int32_t temp;
+ int64_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -1354,15 +1354,15 @@ void adsp21xx_device::mac_op_mr(int op)
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x02<<13:
@@ -1370,15 +1370,15 @@ void adsp21xx_device::mac_op_mr(int op)
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x03<<13:
@@ -1386,15 +1386,15 @@ void adsp21xx_device::mac_op_mr(int op)
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x04<<13:
@@ -1402,84 +1402,84 @@ void adsp21xx_device::mac_op_mr(int op)
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x05<<13:
/* X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x06<<13:
/* X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x07<<13:
/* X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x08<<13:
/* MR + X * Y (SS) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x09<<13:
/* MR + X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0a<<13:
/* MR + X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0b<<13:
/* MR + X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0c<<13:
/* MR - X * Y (SS) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0d<<13:
/* MR - X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0e<<13:
/* MR - X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0f<<13:
/* MR - X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
default:
res = 0; /* just to keep the compiler happy */
@@ -1501,10 +1501,10 @@ void adsp21xx_device::mac_op_mr(int op)
void adsp21xx_device::mac_op_mr_xop(int op)
{
- INT8 shift = ((m_mstat & MSTAT_INTEGER) >> 4) ^ 1;
- INT32 xop = (op >> 8) & 7;
- INT32 temp;
- INT64 res;
+ int8_t shift = ((m_mstat & MSTAT_INTEGER) >> 4) ^ 1;
+ int32_t xop = (op >> 8) & 7;
+ int32_t temp;
+ int64_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -1515,118 +1515,118 @@ void adsp21xx_device::mac_op_mr_xop(int op)
/* X * Y (RND) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x02<<13:
/* MR + X * Y (RND) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x03<<13:
/* MR - X * Y (RND) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x04<<13:
/* X * Y (SS) Clear when y = 0 */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x05<<13:
/* X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x06<<13:
/* X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x07<<13:
/* X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x08<<13:
/* MR + X * Y (SS) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x09<<13:
/* MR + X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0a<<13:
/* MR + X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0b<<13:
/* MR + X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0c<<13:
/* MR - X * Y (SS) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0d<<13:
/* MR - X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0e<<13:
/* MR - X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0f<<13:
/* MR - X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
default:
res = 0; /* just to keep the compiler happy */
@@ -1648,11 +1648,11 @@ void adsp21xx_device::mac_op_mr_xop(int op)
void adsp21xx_device::mac_op_mf(int op)
{
- INT8 shift = ((m_mstat & MSTAT_INTEGER) >> 4) ^ 1;
- INT32 xop = (op >> 8) & 7;
- INT32 yop = (op >> 11) & 3;
- INT32 temp;
- INT64 res;
+ int8_t shift = ((m_mstat & MSTAT_INTEGER) >> 4) ^ 1;
+ int32_t xop = (op >> 8) & 7;
+ int32_t yop = (op >> 11) & 3;
+ int32_t temp;
+ int64_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -1664,15 +1664,15 @@ void adsp21xx_device::mac_op_mf(int op)
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x02<<13:
@@ -1680,15 +1680,15 @@ void adsp21xx_device::mac_op_mf(int op)
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x03<<13:
@@ -1696,15 +1696,15 @@ void adsp21xx_device::mac_op_mf(int op)
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x04<<13:
@@ -1712,84 +1712,84 @@ void adsp21xx_device::mac_op_mf(int op)
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x05<<13:
/* X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x06<<13:
/* X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x07<<13:
/* X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x08<<13:
/* MR + X * Y (SS) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x09<<13:
/* MR + X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0a<<13:
/* MR + X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0b<<13:
/* MR + X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0c<<13:
/* MR - X * Y (SS) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0d<<13:
/* MR - X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0e<<13:
/* MR - X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_SIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0f<<13:
/* MR - X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
yop = MAC_GETYREG_UNSIGNED(yop);
temp = (xop * yop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
default:
res = 0; /* just to keep the compiler happy */
@@ -1797,7 +1797,7 @@ void adsp21xx_device::mac_op_mf(int op)
}
/* set the final value */
- m_core.mf.u = (UINT32)res >> 16;
+ m_core.mf.u = (uint32_t)res >> 16;
}
@@ -1808,10 +1808,10 @@ void adsp21xx_device::mac_op_mf(int op)
void adsp21xx_device::mac_op_mf_xop(int op)
{
- INT8 shift = ((m_mstat & MSTAT_INTEGER) >> 4) ^ 1;
- INT32 xop = (op >> 8) & 7;
- INT32 temp;
- INT64 res;
+ int8_t shift = ((m_mstat & MSTAT_INTEGER) >> 4) ^ 1;
+ int32_t xop = (op >> 8) & 7;
+ int32_t temp;
+ int64_t res;
switch (op & (15<<13)) /*JB*/
{
@@ -1822,118 +1822,118 @@ void adsp21xx_device::mac_op_mf_xop(int op)
/* X * Y (RND) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x02<<13:
/* MR + X * Y (RND) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x03<<13:
/* MR - X * Y (RND) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
#if 0
- if ((res & 0xffff) == 0x8000) res &= ~((UINT64)0x10000);
+ if ((res & 0xffff) == 0x8000) res &= ~((uint64_t)0x10000);
else res += (res & 0x8000) << 1;
#else
temp &= 0xffff;
res += 0x8000;
if ( temp == 0x8000 )
- res &= ~((UINT64)0x10000);
+ res &= ~((uint64_t)0x10000);
#endif
break;
case 0x04<<13:
/* X * Y (SS) Clear when y = 0 */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x05<<13:
/* X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x06<<13:
/* X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x07<<13:
/* X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = (INT64)temp;
+ res = (int64_t)temp;
break;
case 0x08<<13:
/* MR + X * Y (SS) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x09<<13:
/* MR + X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0a<<13:
/* MR + X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0b<<13:
/* MR + X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr + (INT64)temp;
+ res = m_core.mr.mr + (int64_t)temp;
break;
case 0x0c<<13:
/* MR - X * Y (SS) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0d<<13:
/* MR - X * Y (SU) */
xop = MAC_GETXREG_SIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0e<<13:
/* MR - X * Y (US) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
case 0x0f<<13:
/* MR - X * Y (UU) */
xop = MAC_GETXREG_UNSIGNED(xop);
temp = (xop * xop) << shift;
- res = m_core.mr.mr - (INT64)temp;
+ res = m_core.mr.mr - (int64_t)temp;
break;
default:
res = 0; /* just to keep the compiler happy */
@@ -1941,7 +1941,7 @@ void adsp21xx_device::mac_op_mf_xop(int op)
}
/* set the final value */
- m_core.mf.u = (UINT32)res >> 16;
+ m_core.mf.u = (uint32_t)res >> 16;
}
@@ -1952,9 +1952,9 @@ void adsp21xx_device::mac_op_mf_xop(int op)
void adsp21xx_device::shift_op(int op)
{
- INT8 sc = m_core.se.s;
- INT32 xop = (op >> 8) & 7;
- UINT32 res;
+ int8_t sc = m_core.se.s;
+ int32_t xop = (op >> 8) & 7;
+ uint32_t res;
switch (op & (15<<11)) /*JB*/
{
@@ -1962,14 +1962,14 @@ void adsp21xx_device::shift_op(int op)
/* LSHIFT (HI) */
xop = SHIFT_GETXREG_UNSIGNED(xop) << 16;
if (sc > 0) res = (sc < 32) ? (xop << sc) : 0;
- else res = (sc > -32) ? ((UINT32)xop >> -sc) : 0;
+ else res = (sc > -32) ? ((uint32_t)xop >> -sc) : 0;
m_core.sr.sr = res;
break;
case 0x01<<11:
/* LSHIFT (HI, OR) */
xop = SHIFT_GETXREG_UNSIGNED(xop) << 16;
if (sc > 0) res = (sc < 32) ? (xop << sc) : 0;
- else res = (sc > -32) ? ((UINT32)xop >> -sc) : 0;
+ else res = (sc > -32) ? ((uint32_t)xop >> -sc) : 0;
m_core.sr.sr |= res;
break;
case 0x02<<11:
@@ -2019,7 +2019,7 @@ void adsp21xx_device::shift_op(int op)
xop = SHIFT_GETXREG_SIGNED(xop) << 16;
if (sc > 0)
{
- xop = ((UINT32)xop >> 1) | ((m_astat & CFLAG) << 28);
+ xop = ((uint32_t)xop >> 1) | ((m_astat & CFLAG) << 28);
res = xop >> (sc - 1);
}
else res = (sc > -32) ? (xop << -sc) : 0;
@@ -2030,7 +2030,7 @@ void adsp21xx_device::shift_op(int op)
xop = SHIFT_GETXREG_SIGNED(xop) << 16;
if (sc > 0)
{
- xop = ((UINT32)xop >> 1) | ((m_astat & CFLAG) << 28);
+ xop = ((uint32_t)xop >> 1) | ((m_astat & CFLAG) << 28);
res = xop >> (sc - 1);
}
else res = (sc > -32) ? (xop << -sc) : 0;
@@ -2134,9 +2134,9 @@ void adsp21xx_device::shift_op(int op)
void adsp21xx_device::shift_op_imm(int op)
{
- INT8 sc = (INT8)op;
- INT32 xop = (op >> 8) & 7;
- UINT32 res;
+ int8_t sc = (int8_t)op;
+ int32_t xop = (op >> 8) & 7;
+ uint32_t res;
switch (op & (15<<11)) /*JB*/
{
@@ -2144,14 +2144,14 @@ void adsp21xx_device::shift_op_imm(int op)
/* LSHIFT (HI) */
xop = SHIFT_GETXREG_UNSIGNED(xop) << 16;
if (sc > 0) res = (sc < 32) ? (xop << sc) : 0;
- else res = (sc > -32) ? ((UINT32)xop >> -sc) : 0;
+ else res = (sc > -32) ? ((uint32_t)xop >> -sc) : 0;
m_core.sr.sr = res;
break;
case 0x01<<11:
/* LSHIFT (HI, OR) */
xop = SHIFT_GETXREG_UNSIGNED(xop) << 16;
if (sc > 0) res = (sc < 32) ? (xop << sc) : 0;
- else res = (sc > -32) ? ((UINT32)xop >> -sc) : 0;
+ else res = (sc > -32) ? ((uint32_t)xop >> -sc) : 0;
m_core.sr.sr |= res;
break;
case 0x02<<11:
@@ -2201,7 +2201,7 @@ void adsp21xx_device::shift_op_imm(int op)
xop = SHIFT_GETXREG_SIGNED(xop) << 16;
if (sc > 0)
{
- xop = ((UINT32)xop >> 1) | ((m_astat & CFLAG) << 28);
+ xop = ((uint32_t)xop >> 1) | ((m_astat & CFLAG) << 28);
res = xop >> (sc - 1);
}
else res = (sc > -32) ? (xop << -sc) : 0;
@@ -2212,7 +2212,7 @@ void adsp21xx_device::shift_op_imm(int op)
xop = SHIFT_GETXREG_SIGNED(xop) << 16;
if (sc > 0)
{
- xop = ((UINT32)xop >> 1) | ((m_astat & CFLAG) << 28);
+ xop = ((uint32_t)xop >> 1) | ((m_astat & CFLAG) << 28);
res = xop >> (sc - 1);
}
else res = (sc > -32) ? (xop << -sc) : 0;
diff --git a/src/devices/cpu/adsp2100/adsp2100.cpp b/src/devices/cpu/adsp2100/adsp2100.cpp
index 42627c3d5e2..a0cbda562b5 100644
--- a/src/devices/cpu/adsp2100/adsp2100.cpp
+++ b/src/devices/cpu/adsp2100/adsp2100.cpp
@@ -119,7 +119,7 @@ const device_type ADSP2181 = &device_creator<adsp2181_device>;
// adsp21xx_device - constructor
//-------------------------------------------------
-adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype, const char *shortname, const char *source)
+adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_LITTLE, 32, 14, -2),
m_data_config("data", ENDIANNESS_LITTLE, 16, 14, -1),
@@ -200,11 +200,11 @@ adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type
for (int index = 0; index < 4; index++)
{
m_read1_ptr[0x00 + index] = &m_i[0 + index];
- m_read1_ptr[0x04 + index] = (UINT32 *)&m_m[0 + index];
+ m_read1_ptr[0x04 + index] = (uint32_t *)&m_m[0 + index];
m_read1_ptr[0x08 + index] = &m_l[0 + index];
m_read1_ptr[0x0c + index] = &m_l[0 + index];
m_read2_ptr[0x00 + index] = &m_i[4 + index];
- m_read2_ptr[0x04 + index] = (UINT32 *)&m_m[4 + index];
+ m_read2_ptr[0x04 + index] = (uint32_t *)&m_m[4 + index];
m_read2_ptr[0x08 + index] = &m_l[4 + index];
m_read2_ptr[0x0c + index] = &m_l[4 + index];
}
@@ -248,25 +248,25 @@ adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type
m_shift_xregs[7] = &m_core.sr.srx.sr1;
}
-adsp2100_device::adsp2100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+adsp2100_device::adsp2100_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: adsp21xx_device(mconfig, ADSP2100, "ADSP-2100", tag, owner, clock, CHIP_TYPE_ADSP2100, "adsp2100", __FILE__) { }
-adsp2101_device::adsp2101_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+adsp2101_device::adsp2101_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: adsp21xx_device(mconfig, ADSP2101, "ADSP-2101", tag, owner, clock, CHIP_TYPE_ADSP2101, "adsp2101", __FILE__) { }
-adsp2101_device::adsp2101_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype, const char *shortname, const char *source)
+adsp2101_device::adsp2101_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype, const char *shortname, const char *source)
: adsp21xx_device(mconfig, type, name, tag, owner, clock, chiptype, shortname, source) { }
-adsp2104_device::adsp2104_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+adsp2104_device::adsp2104_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: adsp2101_device(mconfig, ADSP2104, "ADSP-2104", tag, owner, clock, CHIP_TYPE_ADSP2104, "adsp2104", __FILE__) { }
-adsp2105_device::adsp2105_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+adsp2105_device::adsp2105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: adsp2101_device(mconfig, ADSP2105, "ADSP-2105", tag, owner, clock, CHIP_TYPE_ADSP2105, "adsp2105", __FILE__) { }
-adsp2115_device::adsp2115_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+adsp2115_device::adsp2115_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: adsp2101_device(mconfig, ADSP2115, "ADSP-2115", tag, owner, clock, CHIP_TYPE_ADSP2115, "adsp2115", __FILE__) { }
-adsp2181_device::adsp2181_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+adsp2181_device::adsp2181_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: adsp21xx_device(mconfig, ADSP2181, "ADSP-2181", tag, owner, clock, CHIP_TYPE_ADSP2181, "adsp2181", __FILE__),
m_io_config("I/O", ENDIANNESS_LITTLE, 16, 11, -1) { }
@@ -300,13 +300,13 @@ adsp21xx_device::~adsp21xx_device()
// 8-bit ROM
//-------------------------------------------------
-void adsp21xx_device::load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
+void adsp21xx_device::load_boot_data(uint8_t *srcdata, uint32_t *dstdata)
{
// see how many words we need to copy
int pagelen = (srcdata[3] + 1) * 8;
for (int i = 0; i < pagelen; i++)
{
- UINT32 opcode = (srcdata[i*4+0] << 16) | (srcdata[i*4+1] << 8) | srcdata[i*4+2];
+ uint32_t opcode = (srcdata[i*4+0] << 16) | (srcdata[i*4+1] << 8) | srcdata[i*4+2];
dstdata[i] = opcode;
}
}
@@ -316,7 +316,7 @@ void adsp21xx_device::load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
// idma_addr_w - write the IDMA address register
//-------------------------------------------------
-void adsp2181_device::idma_addr_w(UINT16 data)
+void adsp2181_device::idma_addr_w(uint16_t data)
{
m_idma_addr = data;
m_idma_offs = 0;
@@ -327,7 +327,7 @@ void adsp2181_device::idma_addr_w(UINT16 data)
// idma_addr_r - read the IDMA address register
//-------------------------------------------------
-UINT16 adsp2181_device::idma_addr_r()
+uint16_t adsp2181_device::idma_addr_r()
{
return m_idma_addr;
}
@@ -337,7 +337,7 @@ UINT16 adsp2181_device::idma_addr_r()
// idma_data_w - write the IDMA data register
//-------------------------------------------------
-void adsp2181_device::idma_data_w(UINT16 data)
+void adsp2181_device::idma_data_w(uint16_t data)
{
// program memory?
if (!(m_idma_addr & 0x4000))
@@ -367,9 +367,9 @@ void adsp2181_device::idma_data_w(UINT16 data)
// idma_data_r - read the IDMA data register
//-------------------------------------------------
-UINT16 adsp2181_device::idma_data_r()
+uint16_t adsp2181_device::idma_data_r()
{
- UINT16 result;
+ uint16_t result;
// program memory?
if (!(m_idma_addr & 0x4000))
@@ -745,7 +745,7 @@ void adsp21xx_device::state_string_export(const device_state_entry &entry, std::
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 adsp21xx_device::disasm_min_opcode_bytes() const
+uint32_t adsp21xx_device::disasm_min_opcode_bytes() const
{
return 4;
}
@@ -756,7 +756,7 @@ UINT32 adsp21xx_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 adsp21xx_device::disasm_max_opcode_bytes() const
+uint32_t adsp21xx_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -767,7 +767,7 @@ UINT32 adsp21xx_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t adsp21xx_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t adsp21xx_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( adsp21xx );
return CPU_DISASSEMBLE_NAME(adsp21xx)(this, buffer, pc, oprom, opram, options);
@@ -780,37 +780,37 @@ offs_t adsp21xx_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
MEMORY ACCESSORS
***************************************************************************/
-inline UINT16 adsp21xx_device::data_read(UINT32 addr)
+inline uint16_t adsp21xx_device::data_read(uint32_t addr)
{
return m_data->read_word(addr << 1);
}
-inline void adsp21xx_device::data_write(UINT32 addr, UINT16 data)
+inline void adsp21xx_device::data_write(uint32_t addr, uint16_t data)
{
m_data->write_word(addr << 1, data);
}
-inline UINT16 adsp21xx_device::io_read(UINT32 addr)
+inline uint16_t adsp21xx_device::io_read(uint32_t addr)
{
return m_io->read_word(addr << 1);
}
-inline void adsp21xx_device::io_write(UINT32 addr, UINT16 data)
+inline void adsp21xx_device::io_write(uint32_t addr, uint16_t data)
{
m_io->write_word(addr << 1, data);
}
-inline UINT32 adsp21xx_device::program_read(UINT32 addr)
+inline uint32_t adsp21xx_device::program_read(uint32_t addr)
{
return m_program->read_dword(addr << 2);
}
-inline void adsp21xx_device::program_write(UINT32 addr, UINT32 data)
+inline void adsp21xx_device::program_write(uint32_t addr, uint32_t data)
{
m_program->write_dword(addr << 2, data & 0xffffff);
}
-inline UINT32 adsp21xx_device::opcode_read()
+inline uint32_t adsp21xx_device::opcode_read()
{
return m_direct->read_dword(m_pc << 2);
}
@@ -905,7 +905,7 @@ bool adsp2181_device::generate_irq(int which, int indx)
void adsp2100_device::check_irqs()
{
- UINT8 check;
+ uint8_t check;
// check IRQ3
check = (m_icntl & 8) ? m_irq_latch[ADSP2100_IRQ3] : m_irq_state[ADSP2100_IRQ3];
@@ -931,7 +931,7 @@ void adsp2100_device::check_irqs()
void adsp2101_device::check_irqs()
{
- UINT8 check;
+ uint8_t check;
// check IRQ2
check = (m_icntl & 4) ? m_irq_latch[ADSP2101_IRQ2] : m_irq_state[ADSP2101_IRQ2];
@@ -967,7 +967,7 @@ void adsp2101_device::check_irqs()
void adsp2181_device::check_irqs()
{
- UINT8 check;
+ uint8_t check;
// check IRQ2
check = (m_icntl & 4) ? m_irq_latch[ADSP2181_IRQ2] : m_irq_state[ADSP2181_IRQ2];
@@ -1028,7 +1028,7 @@ void adsp21xx_device::create_tables()
// initialize the bit reversing table
for (int i = 0; i < 0x4000; i++)
{
- UINT16 data = 0;
+ uint16_t data = 0;
data |= (i >> 13) & 0x0001;
data |= (i >> 11) & 0x0002;
@@ -1107,7 +1107,7 @@ void adsp21xx_device::create_tables()
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 adsp21xx_device::execute_min_cycles() const
+uint32_t adsp21xx_device::execute_min_cycles() const
{
return 1;
}
@@ -1118,7 +1118,7 @@ UINT32 adsp21xx_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 adsp21xx_device::execute_max_cycles() const
+uint32_t adsp21xx_device::execute_max_cycles() const
{
return 1;
}
@@ -1129,17 +1129,17 @@ UINT32 adsp21xx_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 adsp2100_device::execute_input_lines() const
+uint32_t adsp2100_device::execute_input_lines() const
{
return 4;
}
-UINT32 adsp2101_device::execute_input_lines() const
+uint32_t adsp2101_device::execute_input_lines() const
{
return 5;
}
-UINT32 adsp2181_device::execute_input_lines() const
+uint32_t adsp2181_device::execute_input_lines() const
{
return 9;
}
@@ -1174,7 +1174,7 @@ void adsp21xx_device::execute_run()
#endif
// instruction fetch
- UINT32 op = opcode_read();
+ uint32_t op = opcode_read();
// advance to the next instruction
if (m_pc != m_loop)
@@ -1197,7 +1197,7 @@ void adsp21xx_device::execute_run()
}
// parse the instruction
- UINT32 temp;
+ uint32_t temp;
switch ((op >> 16) & 0xff)
{
case 0x00:
@@ -1529,19 +1529,19 @@ void adsp21xx_device::execute_run()
break;
case 0x30: case 0x31: case 0x32: case 0x33:
// 001100xx xxxxxxxx xxxxxxxx load non-data register immediate (group 0)
- write_reg0(op & 15, (INT32)(op << 14) >> 18);
+ write_reg0(op & 15, (int32_t)(op << 14) >> 18);
break;
case 0x34: case 0x35: case 0x36: case 0x37:
// 001101xx xxxxxxxx xxxxxxxx load non-data register immediate (group 1)
- write_reg1(op & 15, (INT32)(op << 14) >> 18);
+ write_reg1(op & 15, (int32_t)(op << 14) >> 18);
break;
case 0x38: case 0x39: case 0x3a: case 0x3b:
// 001110xx xxxxxxxx xxxxxxxx load non-data register immediate (group 2)
- write_reg2(op & 15, (INT32)(op << 14) >> 18);
+ write_reg2(op & 15, (int32_t)(op << 14) >> 18);
break;
case 0x3c: case 0x3d: case 0x3e: case 0x3f:
// 001111xx xxxxxxxx xxxxxxxx load non-data register immediate (group 3)
- write_reg3(op & 15, (INT32)(op << 14) >> 18);
+ write_reg3(op & 15, (int32_t)(op << 14) >> 18);
break;
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
diff --git a/src/devices/cpu/adsp2100/adsp2100.h b/src/devices/cpu/adsp2100/adsp2100.h
index 71fe14eae8c..d8dd28ee2ea 100644
--- a/src/devices/cpu/adsp2100/adsp2100.h
+++ b/src/devices/cpu/adsp2100/adsp2100.h
@@ -211,7 +211,7 @@ protected:
};
// construction/destruction
- adsp21xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype, const char *shortname, const char *source);
+ adsp21xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype, const char *shortname, const char *source);
virtual ~adsp21xx_device();
public:
@@ -222,7 +222,7 @@ public:
template<class _Object> static devcb_base &set_dmovlay_callback(device_t &device, _Object object) { return downcast<adsp21xx_device &>(device).m_dmovlay_cb.set_callback(object); }
// public interfaces
- void load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
+ void load_boot_data(uint8_t *srcdata, uint32_t *dstdata);
protected:
// device-level overrides
@@ -230,8 +230,8 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -240,36 +240,36 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// helpers
void create_tables();
inline void update_mstat();
- inline UINT32 pc_stack_top();
- inline void set_pc_stack_top(UINT32 top);
+ inline uint32_t pc_stack_top();
+ inline void set_pc_stack_top(uint32_t top);
inline void pc_stack_push();
- inline void pc_stack_push_val(UINT32 val);
+ inline void pc_stack_push_val(uint32_t val);
inline void pc_stack_pop();
- inline UINT32 pc_stack_pop_val();
- inline UINT32 cntr_stack_top();
+ inline uint32_t pc_stack_pop_val();
+ inline uint32_t cntr_stack_top();
inline void cntr_stack_push();
inline void cntr_stack_pop();
- inline UINT32 loop_stack_top();
- inline void loop_stack_push(UINT32 value);
+ inline uint32_t loop_stack_top();
+ inline void loop_stack_push(uint32_t value);
inline void loop_stack_pop();
inline void stat_stack_push();
inline void stat_stack_pop();
// inline int condition(int c);
int slow_condition();
- inline void modify_address(UINT32 ireg, UINT32 mreg);
- inline void data_write_dag1(UINT32 op, INT32 val);
- inline UINT32 data_read_dag1(UINT32 op);
- inline void data_write_dag2(UINT32 op, INT32 val);
- inline UINT32 data_read_dag2(UINT32 op);
- inline void pgm_write_dag2(UINT32 op, INT32 val);
- inline UINT32 pgm_read_dag2(UINT32 op);
+ inline void modify_address(uint32_t ireg, uint32_t mreg);
+ inline void data_write_dag1(uint32_t op, int32_t val);
+ inline uint32_t data_read_dag1(uint32_t op);
+ inline void data_write_dag2(uint32_t op, int32_t val);
+ inline uint32_t data_read_dag2(uint32_t op);
+ inline void pgm_write_dag2(uint32_t op, int32_t val);
+ inline uint32_t pgm_read_dag2(uint32_t op);
void alu_op_ar(int op);
void alu_op_ar_const(int op);
void alu_op_af(int op);
@@ -283,25 +283,25 @@ protected:
void shift_op_imm(int op);
// memory access
- inline UINT16 data_read(UINT32 addr);
- inline void data_write(UINT32 addr, UINT16 data);
- inline UINT16 io_read(UINT32 addr);
- inline void io_write(UINT32 addr, UINT16 data);
- inline UINT32 program_read(UINT32 addr);
- inline void program_write(UINT32 addr, UINT32 data);
- inline UINT32 opcode_read();
+ inline uint16_t data_read(uint32_t addr);
+ inline void data_write(uint32_t addr, uint16_t data);
+ inline uint16_t io_read(uint32_t addr);
+ inline void io_write(uint32_t addr, uint16_t data);
+ inline uint32_t program_read(uint32_t addr);
+ inline void program_write(uint32_t addr, uint32_t data);
+ inline uint32_t opcode_read();
// register read/write
inline void update_i(int which);
inline void update_l(int which);
- inline void write_reg0(int regnum, INT32 val);
- inline void write_reg1(int regnum, INT32 val);
- inline void write_reg2(int regnum, INT32 val);
- inline void write_reg3(int regnum, INT32 val);
- inline INT32 read_reg0(int regnum);
- inline INT32 read_reg1(int regnum);
- inline INT32 read_reg2(int regnum);
- inline INT32 read_reg3(int regnum);
+ inline void write_reg0(int regnum, int32_t val);
+ inline void write_reg1(int regnum, int32_t val);
+ inline void write_reg2(int regnum, int32_t val);
+ inline void write_reg3(int regnum, int32_t val);
+ inline int32_t read_reg0(int regnum);
+ inline int32_t read_reg1(int regnum);
+ inline int32_t read_reg2(int regnum);
+ inline int32_t read_reg3(int regnum);
// interrupts
virtual bool generate_irq(int which, int indx = 0) = 0;
@@ -316,8 +316,8 @@ protected:
// 16-bit registers that can be loaded signed or unsigned
union adsp_reg16
{
- UINT16 u;
- INT16 s;
+ uint16_t u;
+ int16_t s;
};
// the SHIFT result register is 32 bits
@@ -328,7 +328,7 @@ protected:
#else
struct { adsp_reg16 sr1, sr0; } srx;
#endif
- UINT32 sr;
+ uint32_t sr;
};
// the MAC result register is 40 bits
@@ -336,12 +336,12 @@ protected:
{
#ifdef LSB_FIRST
struct { adsp_reg16 mr0, mr1, mr2, mrzero; } mrx;
- struct { UINT32 mr0, mr1; } mry;
+ struct { uint32_t mr0, mr1; } mry;
#else
struct { adsp_reg16 mrzero, mr2, mr1, mr0; } mrx;
- struct { UINT32 mr1, mr0; } mry;
+ struct { uint32_t mr1, mr0; } mry;
#endif
- UINT64 mr;
+ uint64_t mr;
};
// core registers which are replicated
@@ -372,60 +372,60 @@ protected:
// configuration
const address_space_config m_program_config;
const address_space_config m_data_config;
- UINT32 m_chip_type;
+ uint32_t m_chip_type;
// other CPU registers
- UINT32 m_pc;
- UINT32 m_ppc;
- UINT32 m_loop;
- UINT32 m_loop_condition;
- UINT32 m_cntr;
+ uint32_t m_pc;
+ uint32_t m_ppc;
+ uint32_t m_loop;
+ uint32_t m_loop_condition;
+ uint32_t m_cntr;
// status registers
- UINT32 m_astat;
- UINT32 m_sstat;
- UINT32 m_mstat;
- UINT32 m_mstat_prev;
- UINT32 m_astat_clear;
- UINT32 m_idle;
+ uint32_t m_astat;
+ uint32_t m_sstat;
+ uint32_t m_mstat;
+ uint32_t m_mstat_prev;
+ uint32_t m_astat_clear;
+ uint32_t m_idle;
// live set of core registers
adsp_core m_core;
// memory addressing registers
- UINT32 m_i[8];
- INT32 m_m[8];
- UINT32 m_l[8];
- UINT32 m_lmask[8];
- UINT32 m_base[8];
- UINT8 m_px;
+ uint32_t m_i[8];
+ int32_t m_m[8];
+ uint32_t m_l[8];
+ uint32_t m_lmask[8];
+ uint32_t m_base[8];
+ uint8_t m_px;
// stacks
- UINT32 m_loop_stack[LOOP_STACK_DEPTH];
- UINT32 m_cntr_stack[CNTR_STACK_DEPTH];
- UINT32 m_pc_stack[PC_STACK_DEPTH];
- UINT16 m_stat_stack[STAT_STACK_DEPTH][3];
- INT32 m_pc_sp;
- INT32 m_cntr_sp;
- INT32 m_stat_sp;
- INT32 m_loop_sp;
+ uint32_t m_loop_stack[LOOP_STACK_DEPTH];
+ uint32_t m_cntr_stack[CNTR_STACK_DEPTH];
+ uint32_t m_pc_stack[PC_STACK_DEPTH];
+ uint16_t m_stat_stack[STAT_STACK_DEPTH][3];
+ int32_t m_pc_sp;
+ int32_t m_cntr_sp;
+ int32_t m_stat_sp;
+ int32_t m_loop_sp;
// external I/O
- UINT8 m_flagout;
- UINT8 m_flagin;
- UINT8 m_fl0;
- UINT8 m_fl1;
- UINT8 m_fl2;
- UINT16 m_idma_addr;
- UINT16 m_idma_cache;
- UINT8 m_idma_offs;
+ uint8_t m_flagout;
+ uint8_t m_flagin;
+ uint8_t m_fl0;
+ uint8_t m_fl1;
+ uint8_t m_fl2;
+ uint16_t m_idma_addr;
+ uint16_t m_idma_cache;
+ uint8_t m_idma_offs;
// interrupt handling
- UINT16 m_imask;
- UINT8 m_icntl;
- UINT16 m_ifc;
- UINT8 m_irq_state[9];
- UINT8 m_irq_latch[9];
+ uint16_t m_imask;
+ uint8_t m_icntl;
+ uint16_t m_ifc;
+ uint8_t m_irq_state[9];
+ uint8_t m_irq_latch[9];
// other internal states
int m_icount;
@@ -433,9 +433,9 @@ protected:
int m_imask_mask;
// register maps
- INT16 * m_read0_ptr[16];
- UINT32 * m_read1_ptr[16];
- UINT32 * m_read2_ptr[16];
+ int16_t * m_read0_ptr[16];
+ uint32_t * m_read1_ptr[16];
+ uint32_t * m_read2_ptr[16];
void * m_alu_xregs[8];
void * m_alu_yregs[4];
void * m_mac_xregs[8];
@@ -452,9 +452,9 @@ protected:
direct_read_data * m_direct;
// tables
- UINT8 m_condition_table[0x1000];
- UINT16 m_mask_table[0x4000];
- UINT16 m_reverse_table[0x4000];
+ uint8_t m_condition_table[0x1000];
+ uint16_t m_mask_table[0x4000];
+ uint16_t m_reverse_table[0x4000];
devcb_read32 m_sport_rx_cb; // callback for serial receive
devcb_write32 m_sport_tx_cb; // callback for serial transmit
@@ -463,7 +463,7 @@ protected:
// debugging
#if ADSP_TRACK_HOTSPOTS
- UINT32 m_pcbucket[0x4000];
+ uint32_t m_pcbucket[0x4000];
#endif
// flag definitions
@@ -484,11 +484,11 @@ class adsp2100_device : public adsp21xx_device
{
public:
// construction/destruction
- adsp2100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ adsp2100_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_execute_interface overrides
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_input_lines() const override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
@@ -505,13 +505,13 @@ class adsp2101_device : public adsp21xx_device
{
public:
// construction/destruction
- adsp2101_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ adsp2101_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- adsp2101_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype, const char *shortname, const char *source);
+ adsp2101_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype, const char *shortname, const char *source);
// device_execute_interface overrides
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_input_lines() const override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
@@ -528,11 +528,11 @@ class adsp2181_device : public adsp21xx_device
{
public:
// construction/destruction
- adsp2181_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ adsp2181_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_execute_interface overrides
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_input_lines() const override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
@@ -546,10 +546,10 @@ protected:
public:
// public interfaces
- void idma_addr_w(UINT16 data);
- UINT16 idma_addr_r();
- void idma_data_w(UINT16 data);
- UINT16 idma_data_r();
+ void idma_addr_w(uint16_t data);
+ uint16_t idma_addr_r();
+ void idma_data_w(uint16_t data);
+ uint16_t idma_data_r();
};
@@ -558,19 +558,19 @@ public:
class adsp2104_device : public adsp2101_device
{
public:
- adsp2104_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ adsp2104_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class adsp2105_device : public adsp2101_device
{
public:
- adsp2105_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ adsp2105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class adsp2115_device : public adsp2101_device
{
public:
- adsp2115_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ adsp2115_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/alph8201/8201dasm.cpp b/src/devices/cpu/alph8201/8201dasm.cpp
index 464813cd170..f8fadecaedb 100644
--- a/src/devices/cpu/alph8201/8201dasm.cpp
+++ b/src/devices/cpu/alph8201/8201dasm.cpp
@@ -334,7 +334,7 @@ static void InitDasm8201(void)
Op[i].type = type;
/* 2 byte code ? */
- while (isspace((UINT8)*p)) p++;
+ while (isspace((uint8_t)*p)) p++;
if( (*p) )
Op[i].type |= 0x10;
/* number of param */
diff --git a/src/devices/cpu/alph8201/alph8201.cpp b/src/devices/cpu/alph8201/alph8201.cpp
index 26b358c7b90..509075e0bdb 100644
--- a/src/devices/cpu/alph8201/alph8201.cpp
+++ b/src/devices/cpu/alph8201/alph8201.cpp
@@ -184,7 +184,7 @@ const device_type ALPHA8301L = &device_creator<alpha8301_cpu_device>;
#define FN(x) &alpha8201_cpu_device::x
-alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ALPHA8201L, "ALPHA-8201L", tag, owner, clock, "alpha8201l", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 10, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 6, 0)
@@ -193,7 +193,7 @@ alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, const
}
-alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 10, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 6, 0)
@@ -201,7 +201,7 @@ alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, device
{
}
-alpha8301_cpu_device::alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+alpha8301_cpu_device::alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: alpha8201_cpu_device(mconfig, ALPHA8301L, "ALPHA-8301L", tag, owner, clock, "alpha8301l", __FILE__)
{
m_opmap = opcode_8301;
@@ -217,49 +217,49 @@ unsigned alpha8201_cpu_device::M_RDMEM_OPCODE()
return retval;
}
-void alpha8201_cpu_device::M_ADD(UINT8 dat)
+void alpha8201_cpu_device::M_ADD(uint8_t dat)
{
- UINT16 temp = m_A + dat;
+ uint16_t temp = m_A + dat;
m_A = temp & 0xff;
m_zf = (m_A==0);
m_cf = temp>>8;
}
-void alpha8201_cpu_device::M_ADDB(UINT8 dat)
+void alpha8201_cpu_device::M_ADDB(uint8_t dat)
{
- UINT16 temp = m_B + dat;
+ uint16_t temp = m_B + dat;
m_B = temp & 0xff;
m_zf = (m_B==0);
m_cf = temp>>8;
}
-void alpha8201_cpu_device::M_SUB(UINT8 dat)
+void alpha8201_cpu_device::M_SUB(uint8_t dat)
{
m_cf = (m_A>=dat); // m_cf is No Borrow
m_A -= dat;
m_zf = (m_A==0);
}
-void alpha8201_cpu_device::M_AND(UINT8 dat)
+void alpha8201_cpu_device::M_AND(uint8_t dat)
{
m_A &= dat;
m_zf = (m_A==0);
}
-void alpha8201_cpu_device::M_OR(UINT8 dat)
+void alpha8201_cpu_device::M_OR(uint8_t dat)
{
m_A |= dat;
m_zf = (m_A==0);
}
-void alpha8201_cpu_device::M_XOR(UINT8 dat)
+void alpha8201_cpu_device::M_XOR(uint8_t dat)
{
m_A ^= dat;
m_zf = (m_A==0);
m_cf = 0;
}
-void alpha8201_cpu_device::M_JMP(UINT8 dat)
+void alpha8201_cpu_device::M_JMP(uint8_t dat)
{
m_pc.b.l = dat;
/* update pc page */
@@ -279,8 +279,8 @@ void alpha8201_cpu_device::M_UNDEFINED()
void alpha8201_cpu_device::M_UNDEFINED2()
{
- UINT8 op = M_RDOP(m_pc.w.l-1);
- UINT8 imm = M_RDMEM_OPCODE();
+ uint8_t op = M_RDOP(m_pc.w.l-1);
+ uint8_t imm = M_RDMEM_OPCODE();
logerror("alpha8201: PC = %03x, Unimplemented opcode = %02x,%02x\n", m_pc.w.l-2, op,imm);
#if SHOW_MESSAGE_CONSOLE
osd_printf_debug("alpha8201: PC = %03x, Unimplemented opcode = %02x,%02x\n", m_pc.w.l-2, op,imm);
@@ -293,7 +293,7 @@ void alpha8201_cpu_device::M_UNDEFINED2()
void alpha8201_cpu_device::stop()
{
- UINT8 pcptr = M_RDMEM(0x001) & 0x1f;
+ uint8_t pcptr = M_RDMEM(0x001) & 0x1f;
M_WRMEM(pcptr,(M_RDMEM(pcptr)&0xf)+0x08); /* mark entry point ODD to HALT */
m_mb |= 0x08; /* mark internal HALT state */
}
@@ -585,7 +585,7 @@ void alpha8201_cpu_device::device_reset()
void alpha8201_cpu_device::execute_run()
{
unsigned opcode;
- UINT8 pcptr;
+ uint8_t pcptr;
if(m_halt)
{
@@ -673,7 +673,7 @@ void alpha8201_cpu_device::execute_set_input(int inputnum, int state)
}
-offs_t alpha8201_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t alpha8201_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( alpha8201 );
return CPU_DISASSEMBLE_NAME(alpha8201)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/alph8201/alph8201.h b/src/devices/cpu/alph8201/alph8201.h
index 432f8193c69..d9b34389e69 100644
--- a/src/devices/cpu/alph8201/alph8201.h
+++ b/src/devices/cpu/alph8201/alph8201.h
@@ -50,8 +50,8 @@ class alpha8201_cpu_device : public cpu_device
{
public:
// construction/destruction
- alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- alpha8201_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ alpha8201_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
protected:
// device-level overrides
@@ -59,9 +59,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 16; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 16; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -74,25 +74,25 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- UINT8 M_RDMEM(UINT16 A) { return m_program->read_byte(A); }
- void M_WRMEM(UINT16 A,UINT8 V) { m_program->write_byte(A, V); }
- UINT8 M_RDOP(UINT16 A) { return m_direct->read_byte(A); }
- UINT8 M_RDOP_ARG(UINT16 A) { return m_direct->read_byte(A); }
- UINT8 RD_REG(UINT8 x) { return m_RAM[(m_regPtr<<3)+(x)]; }
- void WR_REG(UINT8 x, UINT8 d) { m_RAM[(m_regPtr<<3)+(x)]=(d); }
+ uint8_t M_RDMEM(uint16_t A) { return m_program->read_byte(A); }
+ void M_WRMEM(uint16_t A,uint8_t V) { m_program->write_byte(A, V); }
+ uint8_t M_RDOP(uint16_t A) { return m_direct->read_byte(A); }
+ uint8_t M_RDOP_ARG(uint16_t A) { return m_direct->read_byte(A); }
+ uint8_t RD_REG(uint8_t x) { return m_RAM[(m_regPtr<<3)+(x)]; }
+ void WR_REG(uint8_t x, uint8_t d) { m_RAM[(m_regPtr<<3)+(x)]=(d); }
unsigned M_RDMEM_OPCODE();
- void M_ADD(UINT8 dat);
- void M_ADDB(UINT8 dat);
- void M_SUB(UINT8 dat);
- void M_AND(UINT8 dat);
- void M_OR(UINT8 dat);
- void M_XOR(UINT8 dat);
- void M_JMP(UINT8 dat);
+ void M_ADD(uint8_t dat);
+ void M_ADDB(uint8_t dat);
+ void M_SUB(uint8_t dat);
+ void M_AND(uint8_t dat);
+ void M_OR(uint8_t dat);
+ void M_XOR(uint8_t dat);
+ void M_JMP(uint8_t dat);
void M_UNDEFINED();
void M_UNDEFINED2();
@@ -290,26 +290,26 @@ protected:
void ld_lp2_n() { m_lp2 = M_RDMEM_OPCODE(); }
void ld_b_n() { m_B = M_RDMEM_OPCODE(); }
- void djnz_lp0() { UINT8 i=M_RDMEM_OPCODE(); m_lp0--; if (m_lp0 != 0) M_JMP(i); }
- void djnz_lp1() { UINT8 i=M_RDMEM_OPCODE(); m_lp1--; if (m_lp1 != 0) M_JMP(i); }
- void djnz_lp2() { UINT8 i=M_RDMEM_OPCODE(); m_lp2--; if (m_lp2 != 0) M_JMP(i); }
- void jnz() { UINT8 i=M_RDMEM_OPCODE(); if (!m_zf) M_JMP(i); }
- void jnc() { UINT8 i=M_RDMEM_OPCODE(); if (!m_cf) M_JMP(i);}
- void jz() { UINT8 i=M_RDMEM_OPCODE(); if ( m_zf) M_JMP(i); }
- void jc() { UINT8 i=M_RDMEM_OPCODE(); if ( m_cf) M_JMP(i);}
+ void djnz_lp0() { uint8_t i=M_RDMEM_OPCODE(); m_lp0--; if (m_lp0 != 0) M_JMP(i); }
+ void djnz_lp1() { uint8_t i=M_RDMEM_OPCODE(); m_lp1--; if (m_lp1 != 0) M_JMP(i); }
+ void djnz_lp2() { uint8_t i=M_RDMEM_OPCODE(); m_lp2--; if (m_lp2 != 0) M_JMP(i); }
+ void jnz() { uint8_t i=M_RDMEM_OPCODE(); if (!m_zf) M_JMP(i); }
+ void jnc() { uint8_t i=M_RDMEM_OPCODE(); if (!m_cf) M_JMP(i);}
+ void jz() { uint8_t i=M_RDMEM_OPCODE(); if ( m_zf) M_JMP(i); }
+ void jc() { uint8_t i=M_RDMEM_OPCODE(); if ( m_cf) M_JMP(i);}
void jmp() { M_JMP(M_RDMEM_OPCODE() ); }
void stop();
/* ALPHA 8301 : added instruction */
- void exg_a_ix0() { UINT8 t=m_A; m_A = m_ix0.b.l; m_ix0.b.l = t; }
- void exg_a_ix1() { UINT8 t=m_A; m_A = m_ix1.b.l; m_ix1.b.l = t; }
- void exg_a_ix2() { UINT8 t=m_A; m_A = m_ix2.b.l; m_ix2.b.l = t; }
- void exg_a_lp0() { UINT8 t=m_A; m_A = m_lp0; m_lp0 = t; }
- void exg_a_lp1() { UINT8 t=m_A; m_A = m_lp1; m_lp1 = t; }
- void exg_a_lp2() { UINT8 t=m_A; m_A = m_lp2; m_lp2 = t; }
- void exg_a_b() { UINT8 t=m_A; m_A = m_B; m_B = t; }
- void exg_a_rb() { UINT8 t=m_A; m_A = m_regPtr; m_regPtr = t; }
+ void exg_a_ix0() { uint8_t t=m_A; m_A = m_ix0.b.l; m_ix0.b.l = t; }
+ void exg_a_ix1() { uint8_t t=m_A; m_A = m_ix1.b.l; m_ix1.b.l = t; }
+ void exg_a_ix2() { uint8_t t=m_A; m_A = m_ix2.b.l; m_ix2.b.l = t; }
+ void exg_a_lp0() { uint8_t t=m_A; m_A = m_lp0; m_lp0 = t; }
+ void exg_a_lp1() { uint8_t t=m_A; m_A = m_lp1; m_lp1 = t; }
+ void exg_a_lp2() { uint8_t t=m_A; m_A = m_lp2; m_lp2 = t; }
+ void exg_a_b() { uint8_t t=m_A; m_A = m_B; m_B = t; }
+ void exg_a_rb() { uint8_t t=m_A; m_A = m_regPtr; m_regPtr = t; }
void ld_ix0_a() { m_ix0.b.l = m_A; }
void ld_ix1_a() { m_ix1.b.l = m_A; }
@@ -320,8 +320,8 @@ protected:
void ld_b_a() { m_B = m_A; }
void ld_rb_a() { m_regPtr = m_A; }
- void exg_ix0_ix1() { UINT8 t=m_ix1.b.l; m_ix1.b.l = m_ix0.b.l; m_ix0.b.l = t; }
- void exg_ix0_ix2() { UINT8 t=m_ix2.b.l; m_ix2.b.l = m_ix0.b.l; m_ix0.b.l = t; }
+ void exg_ix0_ix1() { uint8_t t=m_ix1.b.l; m_ix1.b.l = m_ix0.b.l; m_ix0.b.l = t; }
+ void exg_ix0_ix2() { uint8_t t=m_ix2.b.l; m_ix2.b.l = m_ix0.b.l; m_ix0.b.l = t; }
void op_d4() { m_A = M_RDMEM( ((m_RAM[(7<<3)+7] & 3) << 8) | M_RDMEM_OPCODE() ); }
void op_d5() { M_WRMEM( ((m_RAM[(7<<3)+7] & 3) << 8) | M_RDMEM_OPCODE(), m_A ); }
@@ -337,16 +337,16 @@ protected:
void op_rep_ld_b_ix0() { do { m_RAM[(m_B>>1)&0x3f] = M_RDMEM(m_ix0.w.l); m_ix0.b.l++; m_B+=2; m_lp0--; } while (m_lp0 != 0); }
void ld_rxb_a() { m_RAM[(m_B>>1)&0x3f] = m_A; }
void ld_a_rxb() { m_A = m_RAM[(m_B>>1)&0x3f]; }
- void cmp_a_rxb() { UINT8 i=m_RAM[(m_B>>1)&0x3f]; m_zf = (m_A==i); m_cf = (m_A>=i); }
+ void cmp_a_rxb() { uint8_t i=m_RAM[(m_B>>1)&0x3f]; m_zf = (m_A==i); m_cf = (m_A>=i); }
void xor_a_rxb() { M_XOR(m_RAM[(m_B>>1)&0x3f] ); }
void add_a_cf() { if (m_cf) inc_a(); }
void sub_a_cf() { if (m_cf) dec_a(); }
void tst_a() { m_zf = (m_A==0); }
void clr_a() { m_A = 0; m_zf = (m_A==0); }
- void cmp_a_n() { UINT8 i=M_RDMEM_OPCODE(); m_zf = (m_A==i); m_cf = (m_A>=i); }
+ void cmp_a_n() { uint8_t i=M_RDMEM_OPCODE(); m_zf = (m_A==i); m_cf = (m_A>=i); }
void xor_a_n() { M_XOR(M_RDMEM_OPCODE() ); }
- void call() { UINT8 i=M_RDMEM_OPCODE(); m_retptr.w.l = m_pc.w.l; M_JMP(i); };
+ void call() { uint8_t i=M_RDMEM_OPCODE(); m_retptr.w.l = m_pc.w.l; M_JMP(i); };
void ld_a_ix0_a() { m_A = M_RDMEM(m_ix0.w.l+m_A); }
void ret() { m_mb = m_retptr.b.h; M_JMP( m_retptr.b.l ); };
void save_zc() { m_savez = m_zf; m_savec = m_cf; };
@@ -366,27 +366,27 @@ protected:
address_space_config m_program_config;
address_space_config m_io_config;
- UINT8 m_RAM[8*8]; /* internal GP register 8 * 8bank */
+ uint8_t m_RAM[8*8]; /* internal GP register 8 * 8bank */
unsigned m_PREVPC;
PAIR m_retptr; /* for 8301, return address of CALL */
PAIR m_pc; /* 2bit+8bit program counter */
- UINT8 m_regPtr; /* RB register base */
- UINT8 m_mb; /* MB memory bank reg. latch after Branch */
- UINT8 m_cf; /* C flag */
- UINT8 m_zf; /* Z flag */
- UINT8 m_savec; /* for 8301, save flags */
- UINT8 m_savez; /* for 8301, save flags */
+ uint8_t m_regPtr; /* RB register base */
+ uint8_t m_mb; /* MB memory bank reg. latch after Branch */
+ uint8_t m_cf; /* C flag */
+ uint8_t m_zf; /* Z flag */
+ uint8_t m_savec; /* for 8301, save flags */
+ uint8_t m_savez; /* for 8301, save flags */
//
PAIR m_ix0; /* 8bit memory read index reg. */
PAIR m_ix1; /* 8bitmemory read index reg. */
PAIR m_ix2; /* 8bitmemory write index reg. */
- UINT8 m_lp0; /* 8bit loop reg. */
- UINT8 m_lp1; /* 8bit loop reg. */
- UINT8 m_lp2; /* 8bit loop reg. */
- UINT8 m_A; /* 8bit accumerator */
- UINT8 m_B; /* 8bit regiser */
+ uint8_t m_lp0; /* 8bit loop reg. */
+ uint8_t m_lp1; /* 8bit loop reg. */
+ uint8_t m_lp2; /* 8bit loop reg. */
+ uint8_t m_A; /* 8bit accumerator */
+ uint8_t m_B; /* 8bit regiser */
//
- UINT8 m_halt; /* halt input line */
+ uint8_t m_halt; /* halt input line */
address_space *m_program;
direct_read_data *m_direct;
@@ -396,9 +396,9 @@ protected:
const s_opcode *m_opmap;
// Used for import/export only
- UINT8 m_sp;
- UINT8 m_R[8];
- UINT8 m_flags;
+ uint8_t m_sp;
+ uint8_t m_R[8];
+ uint8_t m_flags;
};
@@ -406,7 +406,7 @@ class alpha8301_cpu_device : public alpha8201_cpu_device
{
public:
// construction/destruction
- alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/alto2/a2dht.cpp b/src/devices/cpu/alto2/a2dht.cpp
index cb2a0ee7fa9..620a5491817 100644
--- a/src/devices/cpu/alto2/a2dht.cpp
+++ b/src/devices/cpu/alto2/a2dht.cpp
@@ -74,7 +74,7 @@ void alto2_cpu_device::f1_early_dht_block()
*/
void alto2_cpu_device::f2_late_dht_setmode()
{
- UINT16 r = X_RDBITS(m_bus,16,0,0);
+ uint16_t r = X_RDBITS(m_bus,16,0,0);
m_dsp.setmode = m_bus;
LOG((this,LOG_DHT,2," SETMODE<- BUS (%#o), branch on BUS[0] (%#o | %#o)\n", m_bus, m_next2, r));
m_next2 |= r;
diff --git a/src/devices/cpu/alto2/a2disk.cpp b/src/devices/cpu/alto2/a2disk.cpp
index 0d0d43c0ceb..8a8d8f0d1d3 100644
--- a/src/devices/cpu/alto2/a2disk.cpp
+++ b/src/devices/cpu/alto2/a2disk.cpp
@@ -346,7 +346,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
diablo_hd_device* dhd = m_drive[m_dsk.drive];
int wddone = m_dsk.wddone; // get previous state of word-done
int i;
- UINT8 s0, s1;
+ uint8_t s0, s1;
LOG((this,LOG_DISK,9," *** KWD timing bitclk:%d datin:%d block:%d\n", bitclk, datin, block));
if (0 == m_dsk.seclate)
@@ -794,7 +794,7 @@ void alto2_cpu_device::kwd_timing(int bitclk, int datin, int block)
* @param ptr some unused pointer
* @param arg contains the seclate value
*/
-void alto2_cpu_device::disk_seclate(void* ptr, INT32 arg)
+void alto2_cpu_device::disk_seclate(void* ptr, int32_t arg)
{
(void)ptr;
LOG((this,LOG_DISK,2," SECLATE -> %d\n", arg));
@@ -807,7 +807,7 @@ void alto2_cpu_device::disk_seclate(void* ptr, INT32 arg)
* @param ptr some unused pointer
* @param arg contains the ok_to_run value
*/
-void alto2_cpu_device::disk_ok_to_run(void* ptr, INT32 arg)
+void alto2_cpu_device::disk_ok_to_run(void* ptr, int32_t arg)
{
(void)ptr;
LOG((this,LOG_DISK,2," OK TO RUN -> %d\n", arg));
@@ -835,7 +835,7 @@ void alto2_cpu_device::disk_ok_to_run(void* ptr, INT32 arg)
* @param ptr some unused pointer
* @param arg contains the drive, cylinder, and restore flag
*/
-void alto2_cpu_device::disk_strobon(void* ptr, INT32 arg)
+void alto2_cpu_device::disk_strobon(void* ptr, int32_t arg)
{
(void)ptr;
int unit = arg % 2;
@@ -849,7 +849,7 @@ void alto2_cpu_device::disk_strobon(void* ptr, INT32 arg)
dhd->set_restore(restore);
// This is really monoflop 52a generating a very short 0 pulse
for (int strobe = 0; strobe < 2; strobe++) {
- UINT8 s0, s1;
+ uint8_t s0, s1;
dhd->set_strobe(strobe); // pulse the strobe signal to the unit
int lai = dhd->get_log_addx_interlock_0();
@@ -903,7 +903,7 @@ void alto2_cpu_device::disk_strobon(void* ptr, INT32 arg)
}
/** @brief timer callback to change the READY monoflop 31a */
-void alto2_cpu_device::disk_ready_mf31a(void* ptr, INT32 arg)
+void alto2_cpu_device::disk_ready_mf31a(void* ptr, int32_t arg)
{
diablo_hd_device* dhd = m_drive[m_dsk.drive];
m_dsk.ready_mf31a = arg & dhd->get_ready_0();
@@ -938,7 +938,7 @@ void alto2_cpu_device::disk_block(int task)
void alto2_cpu_device::bs_early_read_kstat()
{
diablo_hd_device* dhd = m_drive[m_dsk.drive];
- UINT16 r;
+ uint16_t r;
/* KSTAT[4-7] bus is open */
PUT_KSTAT_DONE(m_dsk.kstat, 017);
@@ -984,7 +984,7 @@ void alto2_cpu_device::bs_early_read_kstat()
*/
void alto2_cpu_device::bs_early_read_kdata()
{
- UINT16 r;
+ uint16_t r;
/* get the current word from the drive */
r = m_dsk.datain;
LOG((this,LOG_DISK,1," <-KDATA (%#o)\n", r));
@@ -1045,7 +1045,7 @@ void alto2_cpu_device::f1_late_load_kstat()
* Q Q' inverted to BUS[13] on <-KSTAT
*/
for (int i = 0; i < 2; i++) {
- UINT8 s0, s1;
+ uint8_t s0, s1;
s0 = m_dsk.ff_44b;
s1 = i ? JKFF_CLK : JKFF_0;
if (!GET_KSTAT_CKSUM(m_bus))
@@ -1173,7 +1173,7 @@ void alto2_cpu_device::f1_late_increcno()
void alto2_cpu_device::f1_late_clrstat()
{
diablo_hd_device* dhd = m_drive[m_dsk.drive];
- UINT8 s0, s1;
+ uint8_t s0, s1;
/* clears the LAI clocked flip-flop 44a
* JK flip-flop 44a (LAI' clocked)
@@ -1274,7 +1274,7 @@ void alto2_cpu_device::f1_late_clrstat()
*/
void alto2_cpu_device::f1_late_load_kcom()
{
- UINT16 change = m_dsk.kcom ^ m_bus;
+ uint16_t change = m_dsk.kcom ^ m_bus;
m_dsk.kcom = m_bus;
LOG((this,LOG_DISK,2," KCOM<-; BUS %06o\n", m_dsk.kcom));
LOG((this,LOG_DISK,2," XFEROFF : %d\n", GET_KCOM_XFEROFF(m_dsk.kcom)));
@@ -1285,7 +1285,7 @@ void alto2_cpu_device::f1_late_load_kcom()
if (GET_KCOM_WDINHIB(change)) {
// WDALLOW going 0: should asynchronously reset 43a and 53a and set 53b
if (m_task == task_kwd) {
- UINT8 s0, s1;
+ uint8_t s0, s1;
/**
* JK flip-flop 53b (word task)
* <PRE>
@@ -1402,7 +1402,7 @@ void alto2_cpu_device::f1_late_load_kadr()
void alto2_cpu_device::f2_late_init()
{
// INIT = current task == KWD and WDINIT
- UINT16 r = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
+ uint16_t r = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
LOG((this,LOG_DISK,1," INIT; %sbranch (%#o | %#o)\n", r ? "" : "no ", m_next2, r));
m_next2 |= r;
m_dsk.wdinit0 = 0;
@@ -1432,8 +1432,8 @@ void alto2_cpu_device::f2_late_init()
*/
void alto2_cpu_device::f2_late_rwc()
{
- UINT16 r;
- UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
+ uint16_t r;
+ uint16_t init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
switch (m_dsk.krwc & 3) {
case 0: // read
@@ -1485,8 +1485,8 @@ void alto2_cpu_device::f2_late_rwc()
*/
void alto2_cpu_device::f2_late_recno()
{
- UINT16 r = m_dsk.krecno;
- UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
+ uint16_t r = m_dsk.krecno;
+ uint16_t init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
LOG((this,LOG_DISK,1," RECNO; %sbranch recno:%d (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_dsk.krecno, m_next2, r, init));
m_next2 |= r | init;
m_dsk.wdinit0 = 0;
@@ -1499,8 +1499,8 @@ void alto2_cpu_device::f2_late_recno()
*/
void alto2_cpu_device::f2_late_xfrdat()
{
- UINT16 r = GET_KADR_NOXFER(m_dsk.kadr) ? 0 : 1;
- UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
+ uint16_t r = GET_KADR_NOXFER(m_dsk.kadr) ? 0 : 1;
+ uint16_t init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
LOG((this,LOG_DISK,1," XFRDAT; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
m_next2 |= r | init;
m_dsk.wdinit0 = 0;
@@ -1514,8 +1514,8 @@ void alto2_cpu_device::f2_late_xfrdat()
void alto2_cpu_device::f2_late_swrnrdy()
{
diablo_hd_device* dhd = m_drive[m_dsk.drive];
- UINT16 r = dhd->get_seek_read_write_0();
- UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
+ uint16_t r = dhd->get_seek_read_write_0();
+ uint16_t init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
LOG((this,LOG_DISK,1," SWRNRDY; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
m_next2 |= r | init;
@@ -1529,8 +1529,8 @@ void alto2_cpu_device::f2_late_swrnrdy()
*/
void alto2_cpu_device::f2_late_nfer()
{
- UINT16 r = m_dsk.kfer ? 0 : 1;
- UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
+ uint16_t r = m_dsk.kfer ? 0 : 1;
+ uint16_t init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
LOG((this,LOG_DISK,1," NFER; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
m_next2 |= r | init;
@@ -1558,8 +1558,8 @@ void alto2_cpu_device::f2_late_nfer()
*/
void alto2_cpu_device::f2_late_strobon()
{
- UINT16 r = m_dsk.strobe;
- UINT16 init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
+ uint16_t r = m_dsk.strobe;
+ uint16_t init = (m_task == task_kwd && m_dsk.wdinit0) ? 037 : 0;
LOG((this,LOG_DISK,2," STROBON; %sbranch (%#o|%#o|%#o)\n", (r | init) ? "" : "no ", m_next2, r, init));
m_next2 |= r | init;
@@ -1572,7 +1572,7 @@ void alto2_cpu_device::f2_late_strobon()
* @param id timer id
* @param arg bit number
*/
-void alto2_cpu_device::disk_bitclk(void* ptr, INT32 arg)
+void alto2_cpu_device::disk_bitclk(void* ptr, int32_t arg)
{
(void)ptr;
diablo_hd_device* dhd = m_drive[m_dsk.drive];
diff --git a/src/devices/cpu/alto2/a2disk.h b/src/devices/cpu/alto2/a2disk.h
index e000ad7cfc4..cb5d671c76a 100644
--- a/src/devices/cpu/alto2/a2disk.h
+++ b/src/devices/cpu/alto2/a2disk.h
@@ -15,40 +15,40 @@ diablo_hd_device* m_drive[2]; //!< two diablo_hd_device drives
//! disk controller context
struct {
- UINT8 drive; //!< selected drive from KADDR[14] (written to data out with SENDADR)
- UINT16 kaddr; //!< A[0-15] disk hardware address (sector, cylinder, head, drive, restore)
- UINT16 kadr; //!< C[0-15] with read/write/check modes for header, label and data
- UINT16 kstat; //!< S[0-15] disk status
- UINT16 kcom; //!< disk command (5 bits kcom[1-5])
- UINT8 krecno; //!< record number (2 bits indexing header, label, data, -/-)
- UINT8 egate; //!< current erase gate signal to the DIABLO hd
- UINT8 wrgate; //!< current write gate signal to the DIABLO hd
- UINT8 rdgate; //!< current read gate signal to the DIABLO hd
- UINT32 shiftin; //!< input shift register
- UINT32 shiftout; //!< output shift register
- UINT32 datain; //!< disk data in latch
- UINT32 dataout; //!< disk data out latch
- UINT8 krwc; //!< read/write/check for current record
- UINT8 kfer; //!< disk fatal error signal state
- UINT8 wdtskena; //!< disk word task enable (active low)
- UINT8 wddone; //!< previous state of WDDONE
- UINT8 wdinit0; //!< disk word task init at the early microcycle
- UINT8 wdinit; //!< disk word task init at the late microcycle
- UINT8 strobe; //!< strobe (still) active
+ uint8_t drive; //!< selected drive from KADDR[14] (written to data out with SENDADR)
+ uint16_t kaddr; //!< A[0-15] disk hardware address (sector, cylinder, head, drive, restore)
+ uint16_t kadr; //!< C[0-15] with read/write/check modes for header, label and data
+ uint16_t kstat; //!< S[0-15] disk status
+ uint16_t kcom; //!< disk command (5 bits kcom[1-5])
+ uint8_t krecno; //!< record number (2 bits indexing header, label, data, -/-)
+ uint8_t egate; //!< current erase gate signal to the DIABLO hd
+ uint8_t wrgate; //!< current write gate signal to the DIABLO hd
+ uint8_t rdgate; //!< current read gate signal to the DIABLO hd
+ uint32_t shiftin; //!< input shift register
+ uint32_t shiftout; //!< output shift register
+ uint32_t datain; //!< disk data in latch
+ uint32_t dataout; //!< disk data out latch
+ uint8_t krwc; //!< read/write/check for current record
+ uint8_t kfer; //!< disk fatal error signal state
+ uint8_t wdtskena; //!< disk word task enable (active low)
+ uint8_t wddone; //!< previous state of WDDONE
+ uint8_t wdinit0; //!< disk word task init at the early microcycle
+ uint8_t wdinit; //!< disk word task init at the late microcycle
+ uint8_t strobe; //!< strobe (still) active
emu_timer* strobon_timer; //!< set strobe on timer
- UINT8 bitclk; //!< current bitclk state (either crystal clock, or rdclk from the drive)
+ uint8_t bitclk; //!< current bitclk state (either crystal clock, or rdclk from the drive)
attoseconds_t bitclk_time[2]; //!< per drive time in attoseconds per bit
- UINT8 datin; //!< current datin from the drive
- UINT8 bitcount; //!< bit counter
- UINT8 carry; //!< carry output of the bitcounter
- UINT8 seclate; //!< sector late (monoflop output)
+ uint8_t datin; //!< current datin from the drive
+ uint8_t bitcount; //!< bit counter
+ uint8_t carry; //!< carry output of the bitcounter
+ uint8_t seclate; //!< sector late (monoflop output)
emu_timer* seclate_timer; //!< sector late timer
- UINT8 seekok; //!< seekok state (SKINC' & LAI' & ff_44a.Q')
- UINT8 ok_to_run; //!< ok to run signal (set to 1 some time after reset)
+ uint8_t seekok; //!< seekok state (SKINC' & LAI' & ff_44a.Q')
+ uint8_t ok_to_run; //!< ok to run signal (set to 1 some time after reset)
emu_timer* ok_to_run_timer; //!< ok to run timer
- UINT8 ready_mf31a; //!< ready monoflop 31a
+ uint8_t ready_mf31a; //!< ready monoflop 31a
emu_timer* ready_timer; //!< ready timer
- UINT8 seclate_mf31b; //!< seclate monoflop 31b
+ uint8_t seclate_mf31b; //!< seclate monoflop 31b
jkff_t ff_21a; //!< JK flip-flop 21a (sector task)
jkff_t ff_21a_old; //!< -"- previous state
jkff_t ff_21b; //!< JK flip-flop 21b (sector task)
diff --git a/src/devices/cpu/alto2/a2disp.cpp b/src/devices/cpu/alto2/a2disp.cpp
index df8ac15f3a5..0102cd8a73f 100644
--- a/src/devices/cpu/alto2/a2disp.cpp
+++ b/src/devices/cpu/alto2/a2disp.cpp
@@ -46,7 +46,7 @@ static const prom_load_t pl_displ_a38 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
//! PROM a38 bit O1 is STOPWAKE' (stop DWT if bit is zero)
@@ -134,7 +134,7 @@ static const prom_load_t pl_displ_a63 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
//!< test the HBLANK (horizontal blanking) signal in PROM a63 being high
@@ -177,7 +177,7 @@ static const prom_load_t pl_displ_a66 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
//! test the VSYNC (vertical synchronisation) signal in PROM a66 being high
@@ -189,7 +189,7 @@ static const prom_load_t pl_displ_a66 =
/**
* @brief double the bits for a byte (left and right of display word) to a word
*/
-static const UINT16 double_bits[256] = {
+static const uint16_t double_bits[256] = {
0x0000,0x0003,0x000c,0x000f,0x0030,0x0033,0x003c,0x003f,
0x00c0,0x00c3,0x00cc,0x00cf,0x00f0,0x00f3,0x00fc,0x00ff,
0x0300,0x0303,0x030c,0x030f,0x0330,0x0333,0x033c,0x033f,
@@ -243,7 +243,7 @@ static const UINT16 double_bits[256] = {
#define A63_NEXT(n) ((n >> 2) & 017)
//! update the internal frame buffer and draw the scanline segment if changed
-void alto2_cpu_device::update_framebuf_word(UINT16* framebuf, int x, int y, UINT16 word)
+void alto2_cpu_device::update_framebuf_word(uint16_t* framebuf, int x, int y, uint16_t word)
{
if (y >= A2_DISP_TOTAL_HEIGHT)
return;
@@ -272,9 +272,9 @@ void alto2_cpu_device::unload_word()
m_unload_time = -1;
return;
}
- UINT16* framebuf = m_dsp.framebuf.get() + y * A2_DISP_SCANLINE_WORDS;
- UINT16 word = m_dsp.inverse;
- UINT8 a38 = m_disp_a38[m_dsp.ra * 16 + m_dsp.wa];
+ uint16_t* framebuf = m_dsp.framebuf.get() + y * A2_DISP_SCANLINE_WORDS;
+ uint16_t word = m_dsp.inverse;
+ uint8_t a38 = m_disp_a38[m_dsp.ra * 16 + m_dsp.wa];
if (FIFO_MBEMPTY(a38))
{
LOG((this,LOG_DISPL,1, " DSP FIFO underrun y:%d x:%d\n", y, x));
@@ -289,12 +289,12 @@ void alto2_cpu_device::unload_word()
if (m_dsp.halfclock)
{
- const UINT16 word1 = double_bits[word / 256];
+ const uint16_t word1 = double_bits[word / 256];
update_framebuf_word(framebuf, x, y, word1);
x++;
if (x < A2_DISP_VISIBLE_WORDS)
{
- const UINT16 word2 = double_bits[word % 256];
+ const uint16_t word2 = double_bits[word % 256];
update_framebuf_word(framebuf, x, y, word2);
x++;
}
@@ -326,7 +326,7 @@ void alto2_cpu_device::display_state_machine()
LOG((this,LOG_DISPL,2," HLC=%d", m_dsp.hlc));
}
- const UINT8 a63 = m_disp_a63[m_dsp.state];
+ const uint8_t a63 = m_disp_a63[m_dsp.state];
if (A63_HLCGATE(a63))
{
// count horizontal line counters and wrap
@@ -341,10 +341,10 @@ void alto2_cpu_device::display_state_machine()
m_task_wakeup |= 1 << task_mrt;
}
// PROM a66 is disabled, if any of HLC256 or HLC512 are high
- const UINT8 a66 = (HLC256 | HLC512) ? 017 : m_disp_a66[m_dsp.hlc & 0377];
+ const uint8_t a66 = (HLC256 | HLC512) ? 017 : m_disp_a66[m_dsp.hlc & 0377];
// next address from PROM a63, use A4 from HLC1
- const UINT8 next = ((HLC1 ^ 1) << 4) | A63_NEXT(a63);
+ const uint8_t next = ((HLC1 ^ 1) << 4) | A63_NEXT(a63);
if (A66_VBLANK(a66))
{
@@ -412,7 +412,7 @@ void alto2_cpu_device::display_state_machine()
* if DHT is not blocked, and if the buffer is not full, DWT wakeups
* are generated.
*/
- UINT8 a38 = m_disp_a38[m_dsp.ra * 16 + m_dsp.wa];
+ uint8_t a38 = m_disp_a38[m_dsp.ra * 16 + m_dsp.wa];
if (!m_dsp.dwt_blocks && !m_dsp.dht_blocks && !FIFO_STOPWAKE(a38))
{
m_task_wakeup |= 1 << task_dwt;
@@ -484,7 +484,7 @@ void alto2_cpu_device::display_state_machine()
*/
void alto2_cpu_device::f2_late_evenfield()
{
- UINT16 r = HLC1024 ^ 1;
+ uint16_t r = HLC1024 ^ 1;
LOG((this,LOG_DISPL,2," EVENFIELD branch (%#o | %#o)\n", m_next2, r));
m_next2 |= r;
}
@@ -522,10 +522,10 @@ void alto2_cpu_device::init_disp()
m_dsp.hlc = A2_DISP_HLC_START;
- m_dsp.framebuf = std::make_unique<UINT16[]>(A2_DISP_TOTAL_HEIGHT * A2_DISP_SCANLINE_WORDS);
- m_dsp.patterns = auto_alloc_array(machine(), UINT8, 65536 * 16);
+ m_dsp.framebuf = std::make_unique<uint16_t[]>(A2_DISP_TOTAL_HEIGHT * A2_DISP_SCANLINE_WORDS);
+ m_dsp.patterns = auto_alloc_array(machine(), uint8_t, 65536 * 16);
for (int y = 0; y < 65536; y++) {
- UINT8* dst = m_dsp.patterns + y * 16;
+ uint8_t* dst = m_dsp.patterns + y * 16;
for (int x = 0; x < 16; x++)
*dst++ = (~y >> (15 - x)) & 1;
}
@@ -559,11 +559,11 @@ void alto2_cpu_device::reset_disp()
m_dsp.vblank = false;
m_dsp.xpreg = 0;
m_dsp.csr = 0;
- memset(m_dsp.framebuf.get(), 1, sizeof(UINT16) * A2_DISP_HEIGHT * A2_DISP_SCANLINE_WORDS);
+ memset(m_dsp.framebuf.get(), 1, sizeof(uint16_t) * A2_DISP_HEIGHT * A2_DISP_SCANLINE_WORDS);
}
/* Video update */
-UINT32 alto2_cpu_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+uint32_t alto2_cpu_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
copybitmap(bitmap, *m_dsp.bitmap, 0, 0, 0, 0, cliprect);
return 0;
diff --git a/src/devices/cpu/alto2/a2disp.h b/src/devices/cpu/alto2/a2disp.h
index c2c321583e6..2d5e641b035 100644
--- a/src/devices/cpu/alto2/a2disp.h
+++ b/src/devices/cpu/alto2/a2disp.h
@@ -193,26 +193,26 @@
#ifndef _A2DISP_H_
#define _A2DISP_H_
struct {
- UINT32 state; //!< current state of the display_state_machine()
- UINT32 hlc; //!< horizontal line counter
- UINT32 setmode; //!< value written by last SETMODE<-
- UINT32 inverse; //!< set to 0xffff if line is inverse, 0x0000 otherwise
- UINT32 scanline; //!< current scanline
+ uint32_t state; //!< current state of the display_state_machine()
+ uint32_t hlc; //!< horizontal line counter
+ uint32_t setmode; //!< value written by last SETMODE<-
+ uint32_t inverse; //!< set to 0xffff if line is inverse, 0x0000 otherwise
+ uint32_t scanline; //!< current scanline
bool halfclock; //!< false for normal pixel clock, true for half pixel clock
bool vblank; //!< true during vblank, false otherwise
- UINT16 fifo[A2_DISP_FIFO]; //!< display word fifo
- UINT32 wa; //!< fifo input pointer (write address; 4-bit)
- UINT32 ra; //!< fifo output pointer (read address; 4-bit)
- UINT32 a63; //!< most recent value read from the PROM a63
- UINT32 a66; //!< most recent value read from the PROM a66
+ uint16_t fifo[A2_DISP_FIFO]; //!< display word fifo
+ uint32_t wa; //!< fifo input pointer (write address; 4-bit)
+ uint32_t ra; //!< fifo output pointer (read address; 4-bit)
+ uint32_t a63; //!< most recent value read from the PROM a63
+ uint32_t a66; //!< most recent value read from the PROM a66
bool dht_blocks; //!< set true, if the DHT executed BLOCK
bool dwt_blocks; //!< set true, if the DWT executed BLOCK
bool curt_blocks; //!< set true, if the CURT executed BLOCK
bool curt_wakeup; //!< set true, if CURT wakeups are generated
- UINT32 xpreg; //!< cursor cursor x position register (10-bit)
- UINT32 csr; //!< cursor shift register (16-bit)
- std::unique_ptr<UINT16[]> framebuf; //!< array of words of the raw bitmap that is displayed
- UINT8 *patterns; //!< array of 65536 patterns (16 bytes) with 1 byte per pixel
+ uint32_t xpreg; //!< cursor cursor x position register (10-bit)
+ uint32_t csr; //!< cursor shift register (16-bit)
+ std::unique_ptr<uint16_t[]> framebuf; //!< array of words of the raw bitmap that is displayed
+ uint8_t *patterns; //!< array of 65536 patterns (16 bytes) with 1 byte per pixel
std::unique_ptr<bitmap_ind16> bitmap; //!< MAME bitmap with 16 bit indices
} m_dsp;
@@ -238,7 +238,7 @@ struct {
* O3 (010) = MBEMPTY'
* </PRE>
*/
-UINT8* m_disp_a38;
+uint8_t* m_disp_a38;
//! output bits of PROM A38
enum {
@@ -273,7 +273,7 @@ enum {
* which happens to be very close to every 7th CPU micrcocycle.
* </PRE>
*/
-UINT8* m_disp_a63;
+uint8_t* m_disp_a63;
enum {
disp_a63_HBLANK = (1 << 0), //!< PROM a63 B0 is latched as HBLANK signal
@@ -293,7 +293,7 @@ enum {
* Address lines are driven by H[1] to H[128] of the horz. line counters.
* The PROM is enabled whenever H[256] and H[512] are both 0.
*/
-UINT8* m_disp_a66;
+uint8_t* m_disp_a66;
enum {
disp_a66_VSYNC_ODD = (1 << 0), //!< Q1 (001) is VSYNC for the odd field (with H1024=1)
@@ -302,7 +302,7 @@ enum {
disp_a66_VBLANK_EVEN = (1 << 3) //!< Q4 (010) is VBLANK for the even field (with H1024=0)
};
-void update_framebuf_word(UINT16* framebuf, int x, int y, UINT16 word);
+void update_framebuf_word(uint16_t* framebuf, int x, int y, uint16_t word);
void unload_word(); //!< unload the next word from the display FIFO and shift it to the screen
void display_state_machine(); //!< function called by the CPU execution loop to enter the next display state
diff --git a/src/devices/cpu/alto2/a2dwt.cpp b/src/devices/cpu/alto2/a2dwt.cpp
index c11523a02ef..752a1ab9660 100644
--- a/src/devices/cpu/alto2/a2dwt.cpp
+++ b/src/devices/cpu/alto2/a2dwt.cpp
@@ -67,7 +67,7 @@ void alto2_cpu_device::f2_late_load_ddr()
LOG((this,LOG_DWT,2," DDR<- BUS (%#o)\n", m_bus));
m_dsp.fifo[m_dsp.wa] = m_bus;
m_dsp.wa = (m_dsp.wa + 1) % A2_DISP_FIFO;
- UINT8 a38 = m_disp_a38[m_dsp.ra * 16 + m_dsp.wa];
+ uint8_t a38 = m_disp_a38[m_dsp.ra * 16 + m_dsp.wa];
if (FIFO_STOPWAKE(a38))
m_task_wakeup &= ~(1 << task_dwt);
LOG((this,LOG_DWT,2, " DWT push %04x into FIFO[%02o]%s\n",
diff --git a/src/devices/cpu/alto2/a2emu.cpp b/src/devices/cpu/alto2/a2emu.cpp
index 8cb0296e512..bd0fb8d16f6 100644
--- a/src/devices/cpu/alto2/a2emu.cpp
+++ b/src/devices/cpu/alto2/a2emu.cpp
@@ -247,7 +247,7 @@
*/
void alto2_cpu_device::bs_early_emu_disp()
{
- UINT16 r = IR_DISP(m_emu.ir);
+ uint16_t r = IR_DISP(m_emu.ir);
if (IR_X(m_emu.ir)) {
r = ((signed char)r) & 0177777;
}
@@ -304,7 +304,7 @@ void alto2_cpu_device::f1_late_emu_load_esrb()
*/
void alto2_cpu_device::f1_early_rsnf()
{
- UINT16 r = 0177400 | m_ether_id;
+ uint16_t r = 0177400 | m_ether_id;
LOG((this,LOG_EMU,2," <-RSNF; (%#o)\n", r));
m_bus &= r;
}
@@ -354,7 +354,7 @@ void alto2_cpu_device::f1_early_startf()
*/
void alto2_cpu_device::f2_late_busodd()
{
- UINT16 r = m_bus & 1;
+ uint16_t r = m_bus & 1;
LOG((this,LOG_EMU,2," BUSODD; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
m_next2 |= r;
}
@@ -424,22 +424,22 @@ void alto2_cpu_device::f2_early_load_dns()
*/
void alto2_cpu_device::f2_late_load_dns()
{
- UINT8 IR10 = X_BIT(m_emu.ir,16,10);
- UINT8 IR11 = X_BIT(m_emu.ir,16,11);
- UINT8 IR12 = X_BIT(m_emu.ir,16,12);
- UINT8 IR13 = X_BIT(m_emu.ir,16,13);
- UINT8 IR14 = X_BIT(m_emu.ir,16,14);
- UINT8 IR15 = X_BIT(m_emu.ir,16,15);
- UINT8 exorB = IR11 ^ IR10;
- UINT8 CARRY = m_emu.cy ^ 1;
- UINT8 ORA = (exorB | CARRY) ^ 1;
- UINT8 exorC = ORA ^ (IR11 ^ 1);
- UINT8 exorD = exorC ^ m_laluc0;
- UINT8 XC = exorD;
- UINT8 NEWCARRY;
- UINT8 DCARRY;
- UINT8 DSKIP;
- UINT8 SHZERO;
+ uint8_t IR10 = X_BIT(m_emu.ir,16,10);
+ uint8_t IR11 = X_BIT(m_emu.ir,16,11);
+ uint8_t IR12 = X_BIT(m_emu.ir,16,12);
+ uint8_t IR13 = X_BIT(m_emu.ir,16,13);
+ uint8_t IR14 = X_BIT(m_emu.ir,16,14);
+ uint8_t IR15 = X_BIT(m_emu.ir,16,15);
+ uint8_t exorB = IR11 ^ IR10;
+ uint8_t CARRY = m_emu.cy ^ 1;
+ uint8_t ORA = (exorB | CARRY) ^ 1;
+ uint8_t exorC = ORA ^ (IR11 ^ 1);
+ uint8_t exorD = exorC ^ m_laluc0;
+ uint8_t XC = exorD;
+ uint8_t NEWCARRY;
+ uint8_t DCARRY;
+ uint8_t DSKIP;
+ uint8_t SHZERO;
switch (f1()) {
case f1_l_rsh_1: // <-L RSH 1
@@ -534,7 +534,7 @@ void alto2_cpu_device::bitblt_info()
*/
void alto2_cpu_device::f2_late_load_ir()
{
- UINT16 r = (X_BIT(m_bus,16,0) << 3) | X_RDBITS(m_bus,16,5,7);
+ uint16_t r = (X_BIT(m_bus,16,0) << 3) | X_RDBITS(m_bus,16,5,7);
#if ALTO2_DEBUG
/* special logging of some opcodes */
@@ -599,7 +599,7 @@ void alto2_cpu_device::f2_late_load_ir()
*/
void alto2_cpu_device::f2_late_idisp()
{
- UINT16 r;
+ uint16_t r;
if (IR_ARITH(m_emu.ir)) {
/* 1xxxxxxxxxxxxxxx */
@@ -633,7 +633,7 @@ void alto2_cpu_device::f2_early_acsource()
*/
void alto2_cpu_device::f2_late_acsource()
{
- UINT16 r;
+ uint16_t r;
if (IR_ARITH(m_emu.ir)) {
/* 1xxxxxxxxxxxxxxx */
diff --git a/src/devices/cpu/alto2/a2emu.h b/src/devices/cpu/alto2/a2emu.h
index 344c7ff2c71..5fd012b6196 100644
--- a/src/devices/cpu/alto2/a2emu.h
+++ b/src/devices/cpu/alto2/a2emu.h
@@ -42,9 +42,9 @@ enum {
};
struct {
- UINT16 ir; //!< emulator instruction register
- UINT8 skip; //!< emulator skip
- UINT8 cy; //!< emulator carry
+ uint16_t ir; //!< emulator instruction register
+ uint8_t skip; //!< emulator skip
+ uint8_t cy; //!< emulator carry
} m_emu;
void bs_early_emu_disp(); //!< bus source: drive bus by IR[8-15], possibly sign extended
void f1_early_emu_block(); //!< F1 func: block task
diff --git a/src/devices/cpu/alto2/a2ether.cpp b/src/devices/cpu/alto2/a2ether.cpp
index 3a360f8854e..97d2fe6399e 100644
--- a/src/devices/cpu/alto2/a2ether.cpp
+++ b/src/devices/cpu/alto2/a2ether.cpp
@@ -58,7 +58,7 @@ static const prom_load_t pl_enet_a41 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
static const prom_load_t pl_enet_a42 =
@@ -75,7 +75,7 @@ static const prom_load_t pl_enet_a42 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
/**
@@ -117,7 +117,7 @@ static const prom_load_t pl_enet_a49 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
#define GET_ETH_WLF(st) X_BIT(st,16,4) //!< hardware status: write latch full/filled (? set by EODFCT)
@@ -164,7 +164,7 @@ static const prom_load_t pl_enet_a49 =
#define BREATHLEN ALTO2_ETHER_PACKET_SIZE //!< ethernet packet length
#define BREATHADDR (0377<<8) //!< destination (0377) and source (0000)
#define BREATHTYPE 0602 //!< ethernet packet type
-static const UINT16 breath_of_life_data[BREATHLEN] =
+static const uint16_t breath_of_life_data[BREATHLEN] =
{
BREATHADDR, /* 3MB destination and source */
BREATHTYPE, /* ether packet type */
@@ -207,7 +207,7 @@ static const UINT16 breath_of_life_data[BREATHLEN] =
};
#if DEBUG_PACKETS
-static void dump_ascii(device_t *device, const UINT16 *src, size_t size)
+static void dump_ascii(device_t *device, const uint16_t *src, size_t size)
{
device->logerror(" [");
for (size_t offs = 0; offs < size; offs++) {
@@ -219,11 +219,11 @@ static void dump_ascii(device_t *device, const UINT16 *src, size_t size)
device->logerror("]\n");
}
-static void dump_packet(device_t *device, const char* name, const UINT16 *src, size_t addr, size_t size)
+static void dump_packet(device_t *device, const char* name, const uint16_t *src, size_t addr, size_t size)
{
size_t offs;
for (offs = 0; offs < size; offs++) {
- UINT16 word = src[offs];
+ uint16_t word = src[offs];
if (offs % 8) {
device->logerror(" %06o", word);
} else {
@@ -247,7 +247,7 @@ void alto2_cpu_device::eth_wakeup()
{
int st = m_eth.status;
LOG((this,LOG_ETH,0,"IBUSY=%d OBUSY=%d ", GET_ETH_IBUSY(st), GET_ETH_OBUSY(st)));
- UINT8 busy = GET_ETH_IBUSY(st) | GET_ETH_OBUSY(st);
+ uint8_t busy = GET_ETH_IBUSY(st) | GET_ETH_OBUSY(st);
if (0 == busy) {
// if not busy, reset the FIFO read and write counters
m_eth.fifo_rd = 0;
@@ -312,11 +312,11 @@ void alto2_cpu_device::eth_wakeup()
*
************************************************************
*/
- UINT8 a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
- UINT8 ETAC = m_task == task_ether ? 0 : 1;
- UINT8 i1 = ~(BNE(a49) & ETAC);
- UINT8 i2 = ~(~BNNE(a49) & i1);
- UINT8 IDR = ~(GET_ETH_IBUSY(st) & i2);
+ uint8_t a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
+ uint8_t ETAC = m_task == task_ether ? 0 : 1;
+ uint8_t i1 = ~(BNE(a49) & ETAC);
+ uint8_t i2 = ~(~BNNE(a49) & i1);
+ uint8_t IDR = ~(GET_ETH_IBUSY(st) & i2);
if (0 == IDR) {
m_task_wakeup |= 1 << task_ether;
LOG((this,LOG_ETH,0,"IDR (input data ready)\n"));
@@ -346,8 +346,8 @@ void alto2_cpu_device::eth_wakeup()
*
************************************************************
*/
- UINT8 o1 = ~(~GET_ETH_WLF(st) & BF(a49));
- UINT8 ODR = ~(GET_ETH_OBUSY(st) & ~GET_ETH_OEOT(st) & o1);
+ uint8_t o1 = ~(~GET_ETH_WLF(st) & BF(a49));
+ uint8_t ODR = ~(GET_ETH_OBUSY(st) & ~GET_ETH_OEOT(st) & o1);
if (0 == ODR) {
m_task_wakeup |= 1 << task_ether;
LOG((this,LOG_ETH,0,"ODR (output data ready)\n"));
@@ -467,9 +467,9 @@ void alto2_cpu_device::eth_wakeup()
* @param data 16 bit data
* @return new CRC value after 16 bits
*/
-UINT32 f9401_7(UINT32 crc, UINT32 data)
+uint32_t f9401_7(uint32_t crc, uint32_t data)
{
- static const UINT32 XOR = (1 << 10) | (1 << 3) | (1 << 0);
+ static const uint32_t XOR = (1 << 10) | (1 << 3) | (1 << 0);
crc ^= data;
for (int i = 0; i < 16; i++)
crc = (crc >> 1) ^ ((crc & 1) ? XOR : 0);
@@ -482,9 +482,9 @@ UINT32 f9401_7(UINT32 crc, UINT32 data)
* This is probably lacking the updates to one or more of
* the status flip flops.
*/
-void alto2_cpu_device::rx_breath_of_life(void* ptr, INT32 arg)
+void alto2_cpu_device::rx_breath_of_life(void* ptr, int32_t arg)
{
- UINT32 data;
+ uint32_t data;
if (arg == 0) {
// on the first word set the IBUSY flip flop
@@ -506,7 +506,7 @@ void alto2_cpu_device::rx_breath_of_life(void* ptr, INT32 arg)
PUT_ETH_IT(m_eth.status, 1); // set IT (input shift register full ...)?
- UINT8 a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
+ uint8_t a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
if (0 == BF(a49))
PUT_ETH_IDL(m_eth.status, 1); // fifo is overrun: set input data late flip flop
@@ -532,9 +532,9 @@ void alto2_cpu_device::rx_breath_of_life(void* ptr, INT32 arg)
* @param ptr unused pointer
* @param arg word count if >= 0, -1 if CRC is to be transmitted (last word)
*/
-void alto2_cpu_device::tx_packet(void* ptr, INT32 arg)
+void alto2_cpu_device::tx_packet(void* ptr, int32_t arg)
{
- UINT32 data;
+ uint32_t data;
// the last word sent is the CRC
if (-1 == arg) {
@@ -551,7 +551,7 @@ void alto2_cpu_device::tx_packet(void* ptr, INT32 arg)
m_eth.tx_crc = f9401_7(m_eth.tx_crc, data);
m_eth.fifo_rd = (m_eth.fifo_rd + 1) % ALTO2_ETHER_FIFO_SIZE;
- UINT8 a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
+ uint8_t a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
if (0 == BE(a49)) {
// the FIFO is empty now: clear the OBUSY and WLF flip flops
PUT_ETH_OBUSY(m_eth.status, 0);
@@ -590,7 +590,7 @@ void alto2_cpu_device::eth_startf()
*/
void alto2_cpu_device::bs_early_eidfct()
{
- UINT16 r = m_eth.fifo[m_eth.fifo_rd];
+ uint16_t r = m_eth.fifo[m_eth.fifo_rd];
LOG((this,LOG_ETH,3, " <-EIDFCT; pull %06o from FIFO[%02o]\n", r, m_eth.fifo_rd));
m_eth.fifo_rd = (m_eth.fifo_rd + 1) % ALTO2_ETHER_FIFO_SIZE;
m_bus &= r;
@@ -624,7 +624,7 @@ void alto2_cpu_device::f1_early_eth_block()
*/
void alto2_cpu_device::f1_early_eilfct()
{
- UINT16 r = m_eth.fifo[m_eth.fifo_rd];
+ uint16_t r = m_eth.fifo[m_eth.fifo_rd];
LOG((this,LOG_ETH,3, " <-EILFCT; %06o at FIFO[%02o]\n", r, m_eth.fifo_rd));
m_bus &= r;
}
@@ -645,8 +645,8 @@ void alto2_cpu_device::f1_early_eilfct()
*/
void alto2_cpu_device::f1_early_epfct()
{
- UINT16 r = 0177777;
- UINT16 st = m_eth.status;
+ uint16_t r = 0177777;
+ uint16_t st = m_eth.status;
m_eth.status = 0;
m_eth.tx_count = 0;
@@ -718,7 +718,7 @@ void alto2_cpu_device::f2_late_eodfct()
PUT_ETH_OBUSY(m_eth.status, 1); // set OBUSY (output busy)
eth_wakeup();
// if the FIFO is full, stop wakeup and kick off the timer
- UINT8 a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
+ uint8_t a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
if (0 == BF(a49)) {
m_task_wakeup &= ~(1 << task_ether);
m_eth.tx_timer->adjust(attotime::from_usec(5.44), 0);
@@ -753,7 +753,7 @@ void alto2_cpu_device::f2_late_eosfct()
*/
void alto2_cpu_device::f2_late_erbfct()
{
- UINT16 r = 0;
+ uint16_t r = 0;
X_WRBITS(r,10,6,6,GET_ETH_ICMD(m_eth.status));
X_WRBITS(r,10,7,7,GET_ETH_OCMD(m_eth.status));
LOG((this,LOG_ETH,3, " ERBFCT; NEXT[6-7] = ICMD,OCMD (%#o | %#o)\n", m_next2, r));
@@ -789,7 +789,7 @@ void alto2_cpu_device::f2_late_eefct()
*/
void alto2_cpu_device::f2_late_ebfct()
{
- UINT16 r = 0;
+ uint16_t r = 0;
X_WRBITS(r,10,6,6, GET_ETH_COLL(m_eth.status));
X_WRBITS(r,10,7,7,
GET_ETH_IDL(m_eth.status) |
@@ -809,8 +809,8 @@ void alto2_cpu_device::f2_late_ebfct()
*/
void alto2_cpu_device::f2_late_ecbfct()
{
- UINT16 r = 0;
- UINT8 a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
+ uint16_t r = 0;
+ uint8_t a49 = m_ether_a49[16 * m_eth.fifo_wr + m_eth.fifo_rd];
X_WRBITS(r,10,7,7,~BE(a49));
LOG((this,LOG_ETH,3, " ECBFCT; NEXT[7] = FIFO %sempty (%#o | %#o)\n", r ? "not " : "is ", m_next2, r));
m_next2 |= r;
@@ -846,7 +846,7 @@ void alto2_cpu_device::activate_eth()
*/
void alto2_cpu_device::update_sysclk(int sysclk)
{
- UINT8 s0, s1;
+ uint8_t s0, s1;
/*
* JK flip-flop 35a (SIO' and SYSCLK clocked)
@@ -926,10 +926,10 @@ void alto2_cpu_device::update_sysclk(int sysclk)
* 3Y RR
* 4Y WLL'
*/
- UINT8 WLLOAD;
- UINT8 RDCNT0;
- UINT8 RR;
- UINT8 WLL0;
+ uint8_t WLLOAD;
+ uint8_t RDCNT0;
+ uint8_t RR;
+ uint8_t WLL0;
if (m_eth.ff_10a & JKFF_Q) {
WLLOAD = ~(sysclk & (f2() == f2_ether_eodfct)) & 1;
RDCNT0 = m_eth.ff_52b & JKFF_Q ? 1 : 0;
@@ -1167,7 +1167,7 @@ void alto2_cpu_device::update_sysclk(int sysclk)
*/
void alto2_cpu_device::update_rclk(int rclk)
{
- UINT8 s0, s1;
+ uint8_t s0, s1;
/*
* JK flip-flop 70a IMID (Sheet 14)
@@ -1221,7 +1221,7 @@ void alto2_cpu_device::update_rclk(int rclk)
*/
void alto2_cpu_device::update_tclk(int tclk)
{
- UINT8 s0, s1;
+ uint8_t s0, s1;
/*
* JK flip-flop 52b OSLOAD (Sheet 17)
@@ -1321,8 +1321,8 @@ void alto2_cpu_device::init_ether(int task)
m_ether_a42 = prom_load(machine(), &pl_enet_a42, memregion("ether_a42")->base());
m_ether_a49 = prom_load(machine(), &pl_enet_a49, memregion("ether_a49")->base());
- m_eth.rx_packet = std::make_unique<UINT16[]>(sizeof(UINT16)*ALTO2_ETHER_PACKET_SIZE);
- m_eth.tx_packet = std::make_unique<UINT16[]>(sizeof(UINT16)*ALTO2_ETHER_PACKET_SIZE);
+ m_eth.rx_packet = std::make_unique<uint16_t[]>(sizeof(uint16_t)*ALTO2_ETHER_PACKET_SIZE);
+ m_eth.tx_packet = std::make_unique<uint16_t[]>(sizeof(uint16_t)*ALTO2_ETHER_PACKET_SIZE);
m_eth.tx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(alto2_cpu_device::tx_packet),this));
m_eth.tx_timer->reset();
diff --git a/src/devices/cpu/alto2/a2ether.h b/src/devices/cpu/alto2/a2ether.h
index 484bd187f8c..fe302fd0eef 100644
--- a/src/devices/cpu/alto2/a2ether.h
+++ b/src/devices/cpu/alto2/a2ether.h
@@ -37,9 +37,9 @@ enum {
//!< f2 (1111): undefined
};
-UINT8* m_ether_a41; //!< BPROM; P3601-1; 256x4; enet.a41 "PE1"
-UINT8* m_ether_a42; //!< BPROM; P3601-1; 256x4; enet.a42 "PE2"
-UINT8* m_ether_a49; //!< BPROM; P3601-1; 265x4 enet.a49 "AFIFO"
+uint8_t* m_ether_a41; //!< BPROM; P3601-1; 256x4; enet.a41 "PE1"
+uint8_t* m_ether_a42; //!< BPROM; P3601-1; 256x4; enet.a42 "PE2"
+uint8_t* m_ether_a49; //!< BPROM; P3601-1; 265x4 enet.a49 "AFIFO"
enum {
ether_a49_BE = (1 << 0), //!< buffer empty
ether_a49_BNE = (1 << 1), //!< buffer next empty
@@ -48,17 +48,17 @@ enum {
};
struct {
- UINT32 serin; //!< serial input shift registers 74164 #37 and #33
- UINT16 fifo[ALTO2_ETHER_FIFO_SIZE]; //!< FIFO buffer
- UINT16 fifo_rd; //!< FIFO input pointer
- UINT16 fifo_wr; //!< FIFO output pointer
- UINT16 status; //!< status word
- UINT16 rx_crc; //!< receiver CRC
- UINT16 tx_crc; //!< transmitter CRC
- UINT32 rx_count; //!< received words count
- UINT32 tx_count; //!< transmitted words count
- std::unique_ptr<UINT16[]> rx_packet; //!< buffer to collect received words
- std::unique_ptr<UINT16[]> tx_packet; //!< buffer to collect transmitted words
+ uint32_t serin; //!< serial input shift registers 74164 #37 and #33
+ uint16_t fifo[ALTO2_ETHER_FIFO_SIZE]; //!< FIFO buffer
+ uint16_t fifo_rd; //!< FIFO input pointer
+ uint16_t fifo_wr; //!< FIFO output pointer
+ uint16_t status; //!< status word
+ uint16_t rx_crc; //!< receiver CRC
+ uint16_t tx_crc; //!< transmitter CRC
+ uint32_t rx_count; //!< received words count
+ uint32_t tx_count; //!< transmitted words count
+ std::unique_ptr<uint16_t[]> rx_packet; //!< buffer to collect received words
+ std::unique_ptr<uint16_t[]> tx_packet; //!< buffer to collect transmitted words
emu_timer* rx_timer; //!< receiver timer
emu_timer* tx_timer; //!< transmitter timer
jkff_t ff_10a; //!< JK flip-flop 10a IBUSY (Sheet 13)
diff --git a/src/devices/cpu/alto2/a2hw.cpp b/src/devices/cpu/alto2/a2hw.cpp
index 5a85c8c8083..43dc4709a38 100644
--- a/src/devices/cpu/alto2/a2hw.cpp
+++ b/src/devices/cpu/alto2/a2hw.cpp
@@ -184,7 +184,7 @@ WRITE16_MEMBER( alto2_cpu_device::mouse_buttons_w ) { X_WRBITS(m_hw.utilin,16,13
* @brief printer paper strobe bit
* Paper strobe bit. Toggling this bit causes a paper scrolling operation.
*/
-//static inline UINT16 GET_PPPSTR(UINT16 utilout) { return X_RDBITS(utilout,16,0,0); }
+//static inline uint16_t GET_PPPSTR(uint16_t utilout) { return X_RDBITS(utilout,16,0,0); }
/**
* @brief printer retstore bit
@@ -192,26 +192,26 @@ WRITE16_MEMBER( alto2_cpu_device::mouse_buttons_w ) { X_WRBITS(m_hw.utilin,16,13
* the "check" condition if present) and moves the carriage to the
* left margin.
*/
-//static inline UINT16 GET_PREST(UINT16 utilout) { return X_RDBITS(utilout,16,1,1); }
+//static inline uint16_t GET_PREST(uint16_t utilout) { return X_RDBITS(utilout,16,1,1); }
/**
* @brief printer ribbon bit
* Ribbon bit. When this bit is 1 the ribbon is up (in printing
* position); when 0, it is down.
*/
-//static inline UINT16 GET_PRIB(UINT16 utilout) { return X_RDBITS(utilout,16,2,2); }
+//static inline uint16_t GET_PRIB(uint16_t utilout) { return X_RDBITS(utilout,16,2,2); }
/**
* @brief printer daisy strobe bit
* Daisy strobe bit. Toggling this bit causes a character to be printed.
*/
-//static inline UINT16 GET_PCHSTR(UINT16 utilout) { return X_RDBITS(utilout,16,3,3); }
+//static inline uint16_t GET_PCHSTR(uint16_t utilout) { return X_RDBITS(utilout,16,3,3); }
/**
* @brief printer carriage strobe bit
* Carriage strobe bit. Toggling this bit causes a horizontal position operation.
*/
-//static inline UINT16 GET_PCARSTR(UINT16 utilout) { return X_RDBITS(utilout,16,4,4); }
+//static inline uint16_t GET_PCARSTR(uint16_t utilout) { return X_RDBITS(utilout,16,4,4); }
/**
* @brief printer data
@@ -225,7 +225,7 @@ WRITE16_MEMBER( alto2_cpu_device::mouse_buttons_w ) { X_WRBITS(m_hw.utilin,16,13
* represented as sign-magnitude (i.e., bit 5 is 1 for negative numbers, 0 for
* positive; bits 6-15 are the absolute value of the number).
*/
-//static inline UINT16 GET_PDATA(UINT16 utilout) { return X_RDBITS(utilout,16,5,15); }
+//static inline uint16_t GET_PDATA(uint16_t utilout) { return X_RDBITS(utilout,16,5,15); }
/**
* @brief read the UTILIN port
@@ -235,7 +235,7 @@ WRITE16_MEMBER( alto2_cpu_device::mouse_buttons_w ) { X_WRBITS(m_hw.utilin,16,13
*/
READ16_MEMBER( alto2_cpu_device::utilin_r )
{
- UINT16 data;
+ uint16_t data;
// FIXME: update the printer status
// printer_read();
@@ -255,7 +255,7 @@ READ16_MEMBER( alto2_cpu_device::utilin_r )
*/
READ16_MEMBER( alto2_cpu_device::xbus_r )
{
- UINT16 data = m_hw.xbus[offset & 3];
+ uint16_t data = m_hw.xbus[offset & 3];
if (!space.debugger_access()) {
LOG((this,LOG_HW,2," XBUS[%d] rd %#o (%#o)\n", offset & 3, offset, data));
@@ -287,7 +287,7 @@ WRITE16_MEMBER( alto2_cpu_device::xbus_w )
*/
READ16_MEMBER( alto2_cpu_device::utilout_r )
{
- UINT16 data = m_hw.utilout ^ 0177777;
+ uint16_t data = m_hw.utilout ^ 0177777;
if (!space.debugger_access()) {
LOG((this,0,2," UTILOUT rd %#o (%#o)\n", offset, data));
}
@@ -374,7 +374,7 @@ static const prom_load_t pl_madr_a64 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
static const prom_load_t pl_madr_a65 =
@@ -391,7 +391,7 @@ static const prom_load_t pl_madr_a65 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
/**
diff --git a/src/devices/cpu/alto2/a2hw.h b/src/devices/cpu/alto2/a2hw.h
index 49d20ff5e30..18accb36c23 100644
--- a/src/devices/cpu/alto2/a2hw.h
+++ b/src/devices/cpu/alto2/a2hw.h
@@ -12,10 +12,10 @@
#define _A2HW_H_
//! miscellaneous hardware registers in the memory mapped I/O range
struct {
- UINT16 eia; //!< the EIA port at 0177001
- UINT16 utilout; //!< the UTILOUT port at 0177016 (active-low outputs)
- UINT16 xbus[4]; //!< the XBUS port at 0177020 to 0177023
- UINT16 utilin; //!< the UTILIN port at 0177030 to 0177033 (same value on all addresses)
+ uint16_t eia; //!< the EIA port at 0177001
+ uint16_t utilout; //!< the UTILOUT port at 0177016 (active-low outputs)
+ uint16_t xbus[4]; //!< the XBUS port at 0177020 to 0177023
+ uint16_t utilin; //!< the UTILIN port at 0177030 to 0177033 (same value on all addresses)
} m_hw;
DECLARE_READ16_MEMBER ( pprdy_r ); //!< read UTILIN[0] printer paper ready bit
diff --git a/src/devices/cpu/alto2/a2jkff.h b/src/devices/cpu/alto2/a2jkff.h
index 9f9caa5c558..49929474c19 100644
--- a/src/devices/cpu/alto2/a2jkff.h
+++ b/src/devices/cpu/alto2/a2jkff.h
@@ -55,7 +55,7 @@ typedef enum {
* @param s1 is the next state
* @return returns the next state and probably modified Q output
*/
-static inline jkff_t update_jkff(UINT8 s0, UINT8 s1, const char* jkff_name)
+static inline jkff_t update_jkff(uint8_t s0, uint8_t s1, const char* jkff_name)
{
switch (s1 & (JKFF_C | JKFF_S))
{
@@ -133,7 +133,7 @@ static inline jkff_t update_jkff(UINT8 s0, UINT8 s1, const char* jkff_name)
* @param s1 is the next state
* @return returns the next state and probably modified Q output
*/
-static inline jkff_t update_jkff(UINT8 s0, UINT8 s1, const char*)
+static inline jkff_t update_jkff(uint8_t s0, uint8_t s1, const char*)
{
switch (s1 & (JKFF_C | JKFF_S))
{
diff --git a/src/devices/cpu/alto2/a2kbd.cpp b/src/devices/cpu/alto2/a2kbd.cpp
index 45800f03bd2..bb7105686fe 100644
--- a/src/devices/cpu/alto2/a2kbd.cpp
+++ b/src/devices/cpu/alto2/a2kbd.cpp
@@ -15,7 +15,7 @@
*/
READ16_MEMBER( alto2_cpu_device::kbd_ad_r )
{
- UINT16 data = 0177777;
+ uint16_t data = 0177777;
switch (offset & 3) {
case 0:
data = machine().root_device().ioport("ROW0")->read();
@@ -44,7 +44,7 @@ READ16_MEMBER( alto2_cpu_device::kbd_ad_r )
return data;
}
-void alto2_cpu_device::init_kbd(UINT16 bootkey)
+void alto2_cpu_device::init_kbd(uint16_t bootkey)
{
m_kbd.bootkey = bootkey;
}
diff --git a/src/devices/cpu/alto2/a2kbd.h b/src/devices/cpu/alto2/a2kbd.h
index b7bf6607ee2..8921132fc11 100644
--- a/src/devices/cpu/alto2/a2kbd.h
+++ b/src/devices/cpu/alto2/a2kbd.h
@@ -96,13 +96,13 @@
#ifndef _A2KBD_H_
#define _A2KBD_H_
struct {
- UINT16 bootkey; //!< boot key - key code pressed before power on
- UINT16 matrix[4]; //!< a bit map of the keys pressed (ioports ROW0 ... ROW3)
+ uint16_t bootkey; //!< boot key - key code pressed before power on
+ uint16_t matrix[4]; //!< a bit map of the keys pressed (ioports ROW0 ... ROW3)
} m_kbd;
DECLARE_READ16_MEMBER( kbd_ad_r ); //!< read the keyboard matrix
-void init_kbd(UINT16 bootkey = 0177777); //!< initialize the keyboard hardware, optinally set the boot key
+void init_kbd(uint16_t bootkey = 0177777); //!< initialize the keyboard hardware, optinally set the boot key
void exit_kbd(); //!< deinitialize the keyboard hardware
void reset_kbd(); //!< reset the keyboard hardware
#endif // _A2KBD_H_
diff --git a/src/devices/cpu/alto2/a2mem.cpp b/src/devices/cpu/alto2/a2mem.cpp
index 2a09c0fab10..1f5f5609374 100644
--- a/src/devices/cpu/alto2/a2mem.cpp
+++ b/src/devices/cpu/alto2/a2mem.cpp
@@ -289,7 +289,7 @@
* @param val 32 bits
* @return 1 for even parity, 0 for odd parity
*/
-static __inline UINT8 parity_even(UINT32 val)
+static __inline uint8_t parity_even(uint32_t val)
{
val -= ((val >> 1) & 0x55555555);
val = (((val >> 2) & 0x33333333) + (val & 0x33333333));
@@ -330,47 +330,47 @@ static const int hamming_lut[64] = {
* @param dw_data the double-word data
* @return dw_data, possibly with 1 bit error corrected
*/
-UINT32 alto2_cpu_device::hamming_code(bool write, UINT32 dw_addr, UINT32 dw_data)
+uint32_t alto2_cpu_device::hamming_code(bool write, uint32_t dw_addr, uint32_t dw_data)
{
- const UINT8 hpb = write ? 0 : m_mem.hpb[dw_addr];
+ const uint8_t hpb = write ? 0 : m_mem.hpb[dw_addr];
/* a75: WD01 WD04 WD08 WD11 WD15 WD19 WD23 WD26 WD30 --- HC(0)A */
- const UINT8 hc_0_a = parity_odd (dw_data & A75);
+ const uint8_t hc_0_a = parity_odd (dw_data & A75);
/* a76: WD00 WD03 WD06 WD10 WD13 WD17 WD21 WD25 WD29 HC(0B1) --- */
- const UINT8 hc_0b1 = parity_even(dw_data & A76);
+ const uint8_t hc_0b1 = parity_even(dw_data & A76);
/* a86: WD02 WD05 WD09 WD12 WD16 WD20 WD24 WD27 WD31 HC(1)A --- */
- const UINT8 hc_1_a = parity_even(dw_data & A86);
+ const uint8_t hc_1_a = parity_even(dw_data & A86);
/* a64: WD01 WD02 WD03 WD07 WD08 WD09 WD10 WD14 WD15 --- HC(2)A */
- const UINT8 hc_2_a = parity_odd (dw_data & A64);
+ const uint8_t hc_2_a = parity_odd (dw_data & A64);
/* a85: WD16 WD17 WD22 WD23 WD24 WD25 WD29 WD30 WD31 HC(2)B --- */
- const UINT8 hc_2_b = parity_even(dw_data & A85);
+ const uint8_t hc_2_b = parity_even(dw_data & A85);
- const UINT8 hc_0 = H0(hpb) ^ hc_0_a ^ hc_0b1;
- const UINT8 hc_1 = H1(hpb) ^ hc_1_a ^ hc_0b1;
- const UINT8 hc_2 = hc_2_a ^ hc_2_b ^ H2(hpb);
- const UINT8 h_0_2 = H0(hpb) ^ H1(hpb) ^ H2(hpb);
+ const uint8_t hc_0 = H0(hpb) ^ hc_0_a ^ hc_0b1;
+ const uint8_t hc_1 = H1(hpb) ^ hc_1_a ^ hc_0b1;
+ const uint8_t hc_2 = hc_2_a ^ hc_2_b ^ H2(hpb);
+ const uint8_t h_0_2 = H0(hpb) ^ H1(hpb) ^ H2(hpb);
/* a66: WD04 WD05 WD06 WD07 WD08 WD09 WD10 H(3) 0 --- HC(3)A */
- const UINT8 hc_3_a = parity_odd ((dw_data & A66) ^ H3(hpb));
+ const uint8_t hc_3_a = parity_odd ((dw_data & A66) ^ H3(hpb));
/* a84: WD18 WD19 WD20 WD21 WD22 WD23 WD24 WD25 0 HC(3/4) HCPA */
- const UINT8 hcpa = parity_odd (dw_data & A84);
- const UINT8 hc_3_4 = hcpa ^ 1;
+ const uint8_t hcpa = parity_odd (dw_data & A84);
+ const uint8_t hc_3_4 = hcpa ^ 1;
/* a63: WD11 WD12 WD13 WD14 WD15 WD16 WD17 H(4) 0 --- HC(4)A */
- const UINT8 hc_4_a = parity_odd ((dw_data & A63) ^ H4(hpb));
+ const uint8_t hc_4_a = parity_odd ((dw_data & A63) ^ H4(hpb));
/* a87: WD26 WD27 WD28 WD29 WD30 WD31 H(5) 0 0 HC(5) HCPB */
- const UINT8 hcpb = parity_odd ((dw_data & A87) ^ H5(hpb));
- const UINT8 hc_3 = hc_3_a ^ hc_3_4;
- const UINT8 hc_4 = hc_4_a ^ hc_3_4;
- const UINT8 hc_5 = hcpb ^ 1;
+ const uint8_t hcpb = parity_odd ((dw_data & A87) ^ H5(hpb));
+ const uint8_t hc_3 = hc_3_a ^ hc_3_4;
+ const uint8_t hc_4 = hc_4_a ^ hc_3_4;
+ const uint8_t hc_5 = hcpb ^ 1;
- const UINT8 syndrome = 32*hc_0 + 16*hc_1 + 8*hc_2 + 4*hc_3 + 2*hc_4 + hc_5;
+ const uint8_t syndrome = 32*hc_0 + 16*hc_1 + 8*hc_2 + 4*hc_3 + 2*hc_4 + hc_5;
/* a54: HC(3)A HC(4)A HCPA HCPB H(0/2) XX01 WD02 WD03 P PERR ---
@@ -379,7 +379,7 @@ UINT32 alto2_cpu_device::hamming_code(bool write, UINT32 dw_addr, UINT32 dw_data
* which has the same effect as spreading them over some bits
* and then counting them... I hope ;-)
*/
- const UINT8 perr = parity_even(
+ const uint8_t perr = parity_even(
hc_3_a ^
hc_4_a ^
hcpa ^
@@ -392,11 +392,11 @@ UINT32 alto2_cpu_device::hamming_code(bool write, UINT32 dw_addr, UINT32 dw_data
1);
/* a65: WD00 WD01 WD02 WD04 WD05 WD07 WD10 WD11 WD12 --- PCA */
- const UINT8 pca = parity_odd (dw_data & A65);
+ const uint8_t pca = parity_odd (dw_data & A65);
/* a74: WD14 WD17 WD18 WD21 WD23 WD24 WD26 WD27 WD29 PCB --- */
- const UINT8 pcb = parity_even(dw_data & A74);
- const UINT8 pc = pca ^ pcb;
+ const uint8_t pcb = parity_even(dw_data & A74);
+ const uint8_t pc = pca ^ pcb;
if (write) {
/* Update the hamming code and parity bit store */
@@ -508,7 +508,7 @@ READ16_MEMBER( alto2_cpu_device::mear_r )
*/
READ16_MEMBER( alto2_cpu_device::mesr_r )
{
- UINT16 data = m_mem.mesr ^ 0177777;
+ uint16_t data = m_mem.mesr ^ 0177777;
if (!space.debugger_access()) {
LOG((this,LOG_MEM,2," MESR read %07o\n", data));
LOG((this,LOG_MEM,6," Hamming code read : %#o\n", GET_MESR_HAMMING(data)));
@@ -572,7 +572,7 @@ WRITE16_MEMBER( alto2_cpu_device::mecr_w )
*/
READ16_MEMBER( alto2_cpu_device::mecr_r )
{
- UINT16 data = m_mem.mecr ^ 0177777;
+ uint16_t data = m_mem.mecr ^ 0177777;
// all spare bits are set
if (!space.debugger_access()) {
LOG((this,LOG_MEM,2," MECR read %07o\n", data));
@@ -593,7 +593,7 @@ READ16_MEMBER( alto2_cpu_device::mecr_r )
READ16_MEMBER ( alto2_cpu_device::ioram_r )
{
offs_t dw_addr = offset / 2;
- return static_cast<UINT16>(offset & 1 ? GET_ODD(m_mem.ram[dw_addr]) : GET_EVEN(m_mem.ram[dw_addr]));
+ return static_cast<uint16_t>(offset & 1 ? GET_ODD(m_mem.ram[dw_addr]) : GET_EVEN(m_mem.ram[dw_addr]));
}
/**
@@ -616,7 +616,7 @@ WRITE16_MEMBER( alto2_cpu_device::ioram_w )
* @param rsel selected register (to detect refresh cycles)
* @param addr memory address
*/
-void alto2_cpu_device::load_mar(UINT8 rsel, UINT32 addr)
+void alto2_cpu_device::load_mar(uint8_t rsel, uint32_t addr)
{
if (rsel == 037) {
/*
@@ -657,7 +657,7 @@ void alto2_cpu_device::load_mar(UINT8 rsel, UINT32 addr)
*
* @result returns value from memory (RAM or MMIO)
*/
-UINT16 alto2_cpu_device::read_mem()
+uint16_t alto2_cpu_device::read_mem()
{
if (ALTO2_MEM_NONE == m_mem.access) {
LOG((this,LOG_MEM,0," fatal: mem read with no preceding address\n"));
@@ -668,7 +668,7 @@ UINT16 alto2_cpu_device::read_mem()
return m_mem.md;
}
- const UINT32 base_addr = m_mem.mar & 0177777;
+ const uint32_t base_addr = m_mem.mar & 0177777;
if (base_addr >= ALTO2_IO_PAGE_BASE && m_mem.mar < ALTO2_RAM_SIZE) {
m_mem.md = m_iomem->read_word(m_iomem->address_to_byte(base_addr));
LOG((this,LOG_MEM,6," MD = MMIO[%#o] (%#o)\n", base_addr, m_mem.md));
@@ -709,7 +709,7 @@ UINT16 alto2_cpu_device::read_mem()
*
* @param data data to write to RAM or MMIO
*/
-void alto2_cpu_device::write_mem(UINT16 data)
+void alto2_cpu_device::write_mem(uint16_t data)
{
int base_addr;
@@ -766,7 +766,7 @@ void alto2_cpu_device::write_mem(UINT16 data)
* @param addr address to read
* @return memory contents at address (16 bits)
*/
-UINT16 alto2_cpu_device::debug_read_mem(UINT32 addr)
+uint16_t alto2_cpu_device::debug_read_mem(uint32_t addr)
{
int base_addr = addr & 0177777;
int data;
@@ -786,7 +786,7 @@ UINT16 alto2_cpu_device::debug_read_mem(UINT32 addr)
* @param addr address to write
* @param data data to write (16 bits used)
*/
-void alto2_cpu_device::debug_write_mem(UINT32 addr, UINT16 data)
+void alto2_cpu_device::debug_write_mem(uint32_t addr, uint16_t data)
{
int base_addr = addr & 0177777;
if (addr >= ALTO2_IO_PAGE_BASE && addr < ALTO2_RAM_SIZE) {
@@ -840,13 +840,13 @@ void alto2_cpu_device::reset_memory()
// config should be valid, unless the driver doesn't define it
if (config && 0 == config->read())
m_mem.size *= 2;
- logerror("Main memory %u KiB\n", static_cast<UINT32>(sizeof(UINT16) * m_mem.size / 1024));
+ logerror("Main memory %u KiB\n", static_cast<uint32_t>(sizeof(uint16_t) * m_mem.size / 1024));
- m_mem.ram = make_unique_clear<UINT32[]>(sizeof(UINT16) * m_mem.size);
- m_mem.hpb = make_unique_clear<UINT8[]> (sizeof(UINT16) * m_mem.size);
+ m_mem.ram = make_unique_clear<uint32_t[]>(sizeof(uint16_t) * m_mem.size);
+ m_mem.hpb = make_unique_clear<uint8_t[]> (sizeof(uint16_t) * m_mem.size);
// Initialize the hamming codes and parity bits
- for (UINT32 addr = 0; addr < m_mem.size; addr++)
+ for (uint32_t addr = 0; addr < m_mem.size; addr++)
hamming_code(true, addr, 0);
m_mem.mar = 0;
diff --git a/src/devices/cpu/alto2/a2mem.h b/src/devices/cpu/alto2/a2mem.h
index 0f00d16fbeb..d9ff97060c9 100644
--- a/src/devices/cpu/alto2/a2mem.h
+++ b/src/devices/cpu/alto2/a2mem.h
@@ -25,14 +25,14 @@ enum {
};
struct {
- UINT32 size; //!< main memory size (64K or 128K)
- std::unique_ptr<UINT32[]> ram; //!< main memory organized as double-words
- std::unique_ptr<UINT8[]> hpb; //!< Hamming Code bits (6) and Parity bits (1) per double word
- UINT32 mar; //!< memory address register
- UINT32 rmdd; //!< read memory data double-word
- UINT32 wmdd; //!< write memory data double-word
- UINT32 md; //!< memory data register
- UINT64 cycle; //!< cycle when the memory address register was loaded
+ uint32_t size; //!< main memory size (64K or 128K)
+ std::unique_ptr<uint32_t[]> ram; //!< main memory organized as double-words
+ std::unique_ptr<uint8_t[]> hpb; //!< Hamming Code bits (6) and Parity bits (1) per double word
+ uint32_t mar; //!< memory address register
+ uint32_t rmdd; //!< read memory data double-word
+ uint32_t wmdd; //!< write memory data double-word
+ uint32_t md; //!< memory data register
+ uint64_t cycle; //!< cycle when the memory address register was loaded
/**
* @brief memory access under the way if non-zero
@@ -43,9 +43,9 @@ struct {
*/
int access;
bool error; //!< non-zero after a memory error was detected
- UINT32 mear; //!< memory error address register
- UINT32 mesr; //!< memory error status register
- UINT32 mecr; //!< memory error control register
+ uint32_t mear; //!< memory error address register
+ uint32_t mesr; //!< memory error status register
+ uint32_t mecr; //!< memory error control register
} m_mem;
/**
@@ -61,7 +61,7 @@ struct {
*
* @return false, if memory address can be loaded
*/
-inline bool check_mem_load_mar_stall(UINT8 rsel) {
+inline bool check_mem_load_mar_stall(uint8_t rsel) {
if (ALTO2_MEM_NONE == m_mem.access || ALTO2_MEM_REFRESH == m_mem.access)
return false;
return cycle() < m_mem.cycle+5;
@@ -110,26 +110,26 @@ DECLARE_READ16_MEMBER ( mecr_r ); //!< memory error control register read
DECLARE_WRITE16_MEMBER( mecr_w ); //!< memory error control register write
//! Read or write a memory double-word and caluclate or compare its Hamming code.
-UINT32 hamming_code(bool write, UINT32 dw_addr, UINT32 dw_data);
+uint32_t hamming_code(bool write, uint32_t dw_addr, uint32_t dw_data);
//! Load the memory address register with some value.
-void load_mar(UINT8 rsel, UINT32 addr);
+void load_mar(uint8_t rsel, uint32_t addr);
//! Read memory or memory mapped I/O from the address in mar to md.
-UINT16 read_mem();
+uint16_t read_mem();
//! Write memory or memory mapped I/O from md to the address in mar.
-void write_mem(UINT16 data);
+void write_mem(uint16_t data);
//! Debugger interface to read memory.
-UINT16 debug_read_mem(UINT32 addr);
+uint16_t debug_read_mem(uint32_t addr);
//! Debugger interface to write memory.
-void debug_write_mem(UINT32 addr, UINT16 data);
+void debug_write_mem(uint32_t addr, uint16_t data);
#if ALTO2_DEBUG
-void watch_write(UINT32 addr, UINT32 data);
-void watch_read(UINT32 addr, UINT32 data);
+void watch_write(uint32_t addr, uint32_t data);
+void watch_read(uint32_t addr, uint32_t data);
#endif
void init_memory(); //!< initialize the memory system
diff --git a/src/devices/cpu/alto2/a2mouse.cpp b/src/devices/cpu/alto2/a2mouse.cpp
index 411e9135b21..7f18e7b7280 100644
--- a/src/devices/cpu/alto2/a2mouse.cpp
+++ b/src/devices/cpu/alto2/a2mouse.cpp
@@ -106,9 +106,9 @@ enum {
*
* @return lookup value from madr_a32
*/
-UINT16 alto2_cpu_device::mouse_read()
+uint16_t alto2_cpu_device::mouse_read()
{
- UINT16 data;
+ uint16_t data;
m_mouse.latch = (m_mouse.latch << 1) & MLATCH;
data = m_madr_a32[m_mouse.latch];
@@ -145,8 +145,8 @@ UINT16 alto2_cpu_device::mouse_read()
*/
INPUT_CHANGED_MEMBER( alto2_cpu_device::mouse_motion_x )
{
- INT16 ox = static_cast<INT16>(oldval);
- INT16 nx = static_cast<INT16>(newval);
+ int16_t ox = static_cast<int16_t>(oldval);
+ int16_t nx = static_cast<int16_t>(newval);
m_mouse.dx = std::min(std::max(0, m_mouse.dx + (nx - ox)), 639);
}
@@ -159,8 +159,8 @@ INPUT_CHANGED_MEMBER( alto2_cpu_device::mouse_motion_x )
*/
INPUT_CHANGED_MEMBER( alto2_cpu_device::mouse_motion_y )
{
- INT16 oy = static_cast<INT16>(oldval);
- INT16 ny = static_cast<INT16>(newval);
+ int16_t oy = static_cast<int16_t>(oldval);
+ int16_t ny = static_cast<int16_t>(newval);
m_mouse.dy = std::min(std::max(0, m_mouse.dy + (ny - oy)), 824);
}
@@ -203,7 +203,7 @@ static const prom_load_t pl_madr_a32 =
/* shift */ 0,
/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
/**
diff --git a/src/devices/cpu/alto2/a2mouse.h b/src/devices/cpu/alto2/a2mouse.h
index 29d5e88ca5b..375a37397a2 100644
--- a/src/devices/cpu/alto2/a2mouse.h
+++ b/src/devices/cpu/alto2/a2mouse.h
@@ -51,7 +51,7 @@
* sequence: 10 -> 70 -> e0 -> 80
* </PRE>
*/
-UINT8* m_madr_a32;
+uint8_t* m_madr_a32;
//! mouse context
struct {
@@ -59,11 +59,11 @@ struct {
int y; //!< current Y coordinate
int dx; //!< destination X coordinate (real mouse X)
int dy; //!< destination Y coordinate (real mouse Y)
- UINT8 latch; //!< current latch value
- UINT8 phase; //!< current read latch phase
+ uint8_t latch; //!< current latch value
+ uint8_t phase; //!< current read latch phase
} m_mouse;
-UINT16 mouse_read(); //!< return the mouse motion flags
+uint16_t mouse_read(); //!< return the mouse motion flags
void init_mouse(); //!< initialize the mouse context
void exit_mouse(); //!< deinitialize the mouse context
void reset_mouse(); //!< reset the mouse context
diff --git a/src/devices/cpu/alto2/a2ram.cpp b/src/devices/cpu/alto2/a2ram.cpp
index d655f461bc2..83930364c8b 100644
--- a/src/devices/cpu/alto2/a2ram.cpp
+++ b/src/devices/cpu/alto2/a2ram.cpp
@@ -12,7 +12,7 @@
#define DEBUG_BRANCH 0 //!< define to 1 to print branching to ROM/RAM
//! direct read access to the microcode CRAM
-#define RD_CRAM(addr) (*reinterpret_cast<UINT32 *>(m_ucode_cram.get() + addr * 4))
+#define RD_CRAM(addr) (*reinterpret_cast<uint32_t *>(m_ucode_cram.get() + addr * 4))
/**
* @brief read the microcode ROM/RAM halfword
@@ -70,9 +70,9 @@
*/
void alto2_cpu_device::rdram()
{
- UINT32 addr, value;
- UINT32 bank = GET_CRAM_BANKSEL(m_cram_addr);
- UINT32 wordaddr = GET_CRAM_WORDADDR(m_cram_addr);
+ uint32_t addr, value;
+ uint32_t bank = GET_CRAM_BANKSEL(m_cram_addr);
+ uint32_t wordaddr = GET_CRAM_WORDADDR(m_cram_addr);
if (GET_CRAM_RAMROM(m_cram_addr)) {
/* read CROM 0 at current mpc */
@@ -94,10 +94,10 @@ void alto2_cpu_device::rdram()
#endif
return;
}
- value = *reinterpret_cast<UINT32 *>(m_ucode_cram.get() + addr * 4) ^ ALTO2_UCODE_INVERTED;
+ value = *reinterpret_cast<uint32_t *>(m_ucode_cram.get() + addr * 4) ^ ALTO2_UCODE_INVERTED;
#if DEBUG_RDRAM
char buffer[256];
- UINT8* oprom = m_ucode_cram.get() + 4 * wordaddr;
+ uint8_t* oprom = m_ucode_cram.get() + 4 * wordaddr;
disasm_disassemble(buffer, wordaddr, oprom, oprom, 0);
printf("RD CRAM_BANKSEL=%d RAM%d [%04o] upper:%06o lower:%06o value:%011o '%s'\n",
GET_CRAM_BANKSEL(m_cram_addr), bank, wordaddr, m_myl, m_alu,
@@ -125,10 +125,10 @@ void alto2_cpu_device::rdram()
*/
void alto2_cpu_device::wrtram()
{
- const UINT32 bank = GET_CRAM_BANKSEL(m_cram_addr);
- const UINT32 wordaddr = GET_CRAM_WORDADDR(m_cram_addr);
- const UINT32 addr = bank * ALTO2_UCODE_PAGE_SIZE + wordaddr; // write RAM 0,1,2
- const UINT32 value = (m_myl << 16) | m_alu;
+ const uint32_t bank = GET_CRAM_BANKSEL(m_cram_addr);
+ const uint32_t wordaddr = GET_CRAM_WORDADDR(m_cram_addr);
+ const uint32_t addr = bank * ALTO2_UCODE_PAGE_SIZE + wordaddr; // write RAM 0,1,2
+ const uint32_t value = (m_myl << 16) | m_alu;
LOG((this,LOG_CPU,0," wrtram: RAM%d [%04o] upper:%06o lower:%06o", bank, wordaddr, m_myl, m_alu));
@@ -138,11 +138,11 @@ void alto2_cpu_device::wrtram()
return;
}
LOG((this,LOG_CPU,0,"\n"));
- *reinterpret_cast<UINT32 *>(m_ucode_cram.get() + addr * 4) = value ^ ALTO2_UCODE_INVERTED;
+ *reinterpret_cast<uint32_t *>(m_ucode_cram.get() + addr * 4) = value ^ ALTO2_UCODE_INVERTED;
#if DEBUG_WRTRAM
char buffer[256];
- UINT8* oprom = m_ucode_cram.get() + 4 * wordaddr;
+ uint8_t* oprom = m_ucode_cram.get() + 4 * wordaddr;
disasm_disassemble(buffer, wordaddr, oprom, oprom, 0);
printf("WR CRAM_BANKSEL=%d RAM%d [%04o] upper:%06o lower:%06o value:%011o '%s'\n",
GET_CRAM_BANKSEL(m_cram_addr), bank, wordaddr, m_myl, m_alu,
@@ -158,10 +158,10 @@ void alto2_cpu_device::wrtram()
*/
void alto2_cpu_device::bs_early_read_sreg()
{
- UINT16 r;
+ uint16_t r;
if (rsel()) {
- UINT8 bank = m_s_reg_bank[m_task];
+ uint8_t bank = m_s_reg_bank[m_task];
r = m_s[bank][rsel()];
LOG((this,LOG_RAM,2," <-S%02o; bus &= S[%o][%02o] (%#o)\n", rsel(), bank, rsel(), r));
} else {
@@ -186,7 +186,7 @@ void alto2_cpu_device::bs_early_load_sreg()
*/
void alto2_cpu_device::bs_late_load_sreg()
{
- UINT8 bank = m_s_reg_bank[m_task];
+ uint8_t bank = m_s_reg_bank[m_task];
m_s[bank][rsel()] = m_myl;
LOG((this,LOG_RAM,2," S%02o<- S[%o][%02o] := %#o\n", rsel(), bank, rsel(), m_myl));
}
@@ -232,8 +232,8 @@ void alto2_cpu_device::branch_RAM(const char *from, int page)
void alto2_cpu_device::f1_late_swmode()
{
// Currently executing in what CROM/CRAM page?
- UINT16 page = m_mpc / ALTO2_UCODE_PAGE_SIZE;
- UINT16 next;
+ uint16_t page = m_mpc / ALTO2_UCODE_PAGE_SIZE;
+ uint16_t next;
switch (m_cram_config) {
case 1: // 1K CROM, 1K CRAM
diff --git a/src/devices/cpu/alto2/a2roms.cpp b/src/devices/cpu/alto2/a2roms.cpp
index 995d1841da2..ec262d1be27 100644
--- a/src/devices/cpu/alto2/a2roms.cpp
+++ b/src/devices/cpu/alto2/a2roms.cpp
@@ -17,7 +17,7 @@
* but first step is mapping 2-bit values
* into sum of 2 1-bit values in sneaky way.
*/
-static UINT32 ones_u32(UINT32 val)
+static uint32_t ones_u32(uint32_t val)
{
val -= ((val >> 1) & 0x55555555);
val = (((val >> 2) & 0x33333333) + (val & 0x33333333));
@@ -30,7 +30,7 @@ static UINT32 ones_u32(UINT32 val)
/**
* @brief return the log2 of an integer value
*/
-static UINT32 log2_u32(UINT32 val)
+static uint32_t log2_u32(uint32_t val)
{
val |= (val >> 1);
val |= (val >> 2);
@@ -48,12 +48,12 @@ static UINT32 log2_u32(UINT32 val)
* @param val value to map
* @result returns the remapped value, or just val, if map was nullptr
*/
-static UINT32 map_lines(const UINT8 *map, int lines, UINT32 val)
+static uint32_t map_lines(const uint8_t *map, int lines, uint32_t val)
{
if (nullptr == map)
return val;
- UINT32 res = 0;
+ uint32_t res = 0;
for (int i = 0; i < lines; i++)
if (val & (1 << i))
res |= 1 << map[i];
@@ -64,29 +64,29 @@ static UINT32 map_lines(const UINT8 *map, int lines, UINT32 val)
* @brief write to a ROM base + address of type 'type', ANDing with and, ORing with or
*
* @param base ROM base address in memory
- * @param type one of 1 for UINT8, 2 for UINT16, 4 for UINT32
+ * @param type one of 1 for uint8_t, 2 for uint16_t, 4 for uint32_t
* @param addr address offset into base
* @param dand value to AND to contents before XORing
* @param dxor value to XOR before writing back
*/
-static void write_type_and_xor(void *base, int type, UINT32 addr, UINT32 dand, UINT32 dxor)
+static void write_type_and_xor(void *base, int type, uint32_t addr, uint32_t dand, uint32_t dxor)
{
switch (type) {
- case sizeof(UINT8):
+ case sizeof(uint8_t):
{
- UINT8 *base8 = reinterpret_cast<UINT8 *>(base);
+ uint8_t *base8 = reinterpret_cast<uint8_t *>(base);
base8[addr] = (base8[addr] & dand) ^ dxor;
}
break;
- case sizeof(UINT16):
+ case sizeof(uint16_t):
{
- UINT16 *base16 = reinterpret_cast<UINT16 *>(base);
+ uint16_t *base16 = reinterpret_cast<uint16_t *>(base);
base16[addr] = (base16[addr] & dand) ^ dxor;
}
break;
- case sizeof(UINT32):
+ case sizeof(uint32_t):
{
- UINT32 *base32 = reinterpret_cast<UINT32 *>(base);
+ uint32_t *base32 = reinterpret_cast<uint32_t *>(base);
base32[addr] = (base32[addr] & dand) ^ dxor;
}
break;
@@ -103,39 +103,39 @@ static void write_type_and_xor(void *base, int type, UINT32 addr, UINT32 dand, U
* @param segments number of segments in one page of the result
* @return pointer to the newly allocated memory filled with source bits
*/
-UINT8* prom_load(running_machine& machine, const prom_load_t* prom, const UINT8* src, int pages, int segments)
+uint8_t* prom_load(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages, int segments)
{
void* array = nullptr;
size_t type = prom->type;
size_t size = prom->size;
#if DEBUG_PROM_LOAD
- UINT8 width = prom->width;
+ uint8_t width = prom->width;
#endif
switch (type) {
- case sizeof(UINT8):
- array = auto_alloc_array(machine, UINT8, pages * size);
+ case sizeof(uint8_t):
+ array = auto_alloc_array(machine, uint8_t, pages * size);
break;
- case sizeof(UINT16):
- array = auto_alloc_array(machine, UINT16, pages * size);
+ case sizeof(uint16_t):
+ array = auto_alloc_array(machine, uint16_t, pages * size);
break;
- case sizeof(UINT32):
- array = auto_alloc_array(machine, UINT32, pages * size);
+ case sizeof(uint32_t):
+ array = auto_alloc_array(machine, uint32_t, pages * size);
break;
}
- UINT8* base = reinterpret_cast<UINT8*>(array);
+ uint8_t* base = reinterpret_cast<uint8_t*>(array);
for (int page = 0; page < pages; page++)
{
- UINT8* dst = base + (prom->type * prom->size * page);
+ uint8_t* dst = base + (prom->type * prom->size * page);
for (int segment = 0; segment < segments; segment++, prom++)
{
- for (UINT32 src_addr = 0; src_addr < prom->size; src_addr++)
+ for (uint32_t src_addr = 0; src_addr < prom->size; src_addr++)
{
// map destination address lines
- UINT32 dst_addr = map_lines(prom->amap, log2_u32(prom->size) + 1, src_addr);
+ uint32_t dst_addr = map_lines(prom->amap, log2_u32(prom->size) + 1, src_addr);
// fetch data bits
- UINT32 data = src[src_addr ^ prom->axor] ^ prom->dxor;
+ uint32_t data = src[src_addr ^ prom->axor] ^ prom->dxor;
// mask width bits
data = data & ((1 << prom->width) - 1);
// map destination data lines
@@ -151,9 +151,9 @@ UINT8* prom_load(running_machine& machine, const prom_load_t* prom, const UINT8*
#if DEBUG_PROM_LOAD
switch (type) {
- case sizeof(UINT8):
+ case sizeof(uint8_t):
{
- UINT8* data = reinterpret_cast<UINT8*>(array);
+ uint8_t* data = reinterpret_cast<uint8_t*>(array);
for (int addr = 0; addr < pages*size; addr++) {
if (0 == (addr % 16))
printf("%04x:", addr);
@@ -166,9 +166,9 @@ UINT8* prom_load(running_machine& machine, const prom_load_t* prom, const UINT8*
}
}
break;
- case sizeof(UINT16):
+ case sizeof(uint16_t):
{
- UINT16* data = reinterpret_cast<UINT16*>(array);
+ uint16_t* data = reinterpret_cast<uint16_t*>(array);
for (int addr = 0; addr < pages*size; addr++) {
if (0 == (addr % 8))
printf("%04x:", addr);
@@ -178,9 +178,9 @@ UINT8* prom_load(running_machine& machine, const prom_load_t* prom, const UINT8*
}
}
break;
- case sizeof(UINT32):
+ case sizeof(uint32_t):
{
- UINT32* data = reinterpret_cast<UINT32*>(array);
+ uint32_t* data = reinterpret_cast<uint32_t*>(array);
for (int addr = 0; addr < pages*size; addr++) {
if (0 == (addr % 4))
printf("%04x:", addr);
@@ -192,5 +192,5 @@ UINT8* prom_load(running_machine& machine, const prom_load_t* prom, const UINT8*
break;
}
#endif
- return reinterpret_cast<UINT8 *>(array);
+ return reinterpret_cast<uint8_t *>(array);
}
diff --git a/src/devices/cpu/alto2/a2roms.h b/src/devices/cpu/alto2/a2roms.h
index abd218344c9..e320239fc86 100644
--- a/src/devices/cpu/alto2/a2roms.h
+++ b/src/devices/cpu/alto2/a2roms.h
@@ -19,13 +19,13 @@ typedef struct {
const char *crc32; //!< CRC32 hash of the file
const char *sha1; //!< SHA1 hash of the file
size_t size; //!< size of the file, and elements in destination memory
- const UINT8 amap[16]; //!< address bit mapping
- UINT32 axor; //!< address XOR mask (applied to source address)
- UINT32 dxor; //!< data XOR mask (applied before shifting and mapping)
- UINT8 width; //!< width in bits
- UINT8 shift; //!< left shift in bits
- const UINT8 dmap[16]; //!< data bit mapping
- UINT32 dand; //!< ANDing destination with this value, before XORing the data
+ const uint8_t amap[16]; //!< address bit mapping
+ uint32_t axor; //!< address XOR mask (applied to source address)
+ uint32_t dxor; //!< data XOR mask (applied before shifting and mapping)
+ uint8_t width; //!< width in bits
+ uint8_t shift; //!< left shift in bits
+ const uint8_t dmap[16]; //!< data bit mapping
+ uint32_t dand; //!< ANDing destination with this value, before XORing the data
size_t type; //!< type of the destination, i.e. sizeof(type)
} prom_load_t;
@@ -39,5 +39,5 @@ typedef struct {
#define DMAP_DEFAULT {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}
#define DMAP_REVERSE_0_3 {3,2,1,0,}
-extern UINT8* prom_load(running_machine& machine, const prom_load_t* prom, const UINT8* src, int pages = 1, int segments = 1);
+extern uint8_t* prom_load(running_machine& machine, const prom_load_t* prom, const uint8_t* src, int pages = 1, int segments = 1);
#endif // _CPU_A2ROMS_H_
diff --git a/src/devices/cpu/alto2/alto2cpu.cpp b/src/devices/cpu/alto2/alto2cpu.cpp
index 74d0b07d8f8..7096fb09e3e 100644
--- a/src/devices/cpu/alto2/alto2cpu.cpp
+++ b/src/devices/cpu/alto2/alto2cpu.cpp
@@ -120,7 +120,7 @@ ADDRESS_MAP_END
// alto2_cpu_device - constructor
//-------------------------------------------------
-alto2_cpu_device::alto2_cpu_device(const machine_config& mconfig, const char* tag, device_t* owner, UINT32 clock) :
+alto2_cpu_device::alto2_cpu_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock) :
cpu_device(mconfig, ALTO2, "Xerox Alto-II", tag, owner, clock, "alto2_cpu", __FILE__),
m_ucode_config("ucode", ENDIANNESS_BIG, 32, 12, -2 ),
m_const_config("const", ENDIANNESS_BIG, 16, 8, -1 ),
@@ -271,7 +271,7 @@ ROM_START( alto2_cpu )
ROM_LOAD( "xm51.u72", 15*02000, 02000, CRC(a28e5251) SHA1(44dd8ad4ad56541b5394d30ce3521b4d1d561394) ) //!< 00000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
// constant PROMs, 4 x 4bit
- // UINT16 src = BITS(addr, 3,2,1,4,5,6,7,0);
+ // uint16_t src = BITS(addr, 3,2,1,4,5,6,7,0);
ROM_REGION( 4 * 0400, "const_proms", 0 )
ROM_LOAD( "madr.a6", 0*00400, 00400, CRC(c2c196b2) SHA1(8b2a599ac839ec2a070dbfef2f1626e645c858ca) ) //!< 0000-0377 C(00)',C(01)',C(02)',C(03)'
ROM_LOAD( "madr.a5", 1*00400, 00400, CRC(42336101) SHA1(c77819cf40f063af3abf66ea43f17cc1a62e928b) ) //!< 0000-0377 C(04)',C(05)',C(06)',C(07)'
@@ -370,7 +370,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 28,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 0000-01777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
"64x.3",
@@ -385,7 +385,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 24,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 0000-01777 ALUF(3)',BS(0)',BS(1)',BS(2)'
"65x.3",
@@ -400,7 +400,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 20,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 0000-01777 F1(0),F1(1)',F1(2)',F1(3)'
"63x.3",
@@ -415,7 +415,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 16,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 0000-01777 F2(0),F2(1)',F2(2)',F2(3)'
"53x.3",
@@ -430,7 +430,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 12,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 0000-01777 LOADT',LOADL,NEXT(0)',NEXT(1)'
"60x.3",
@@ -445,7 +445,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 8,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 0000-01777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
"61x.3",
@@ -460,7 +460,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 4,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 0000-01777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
"62x.3",
@@ -475,7 +475,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
// NOTE: the Mesa 5.1 ucode PROM may be used as RAM, if m_cram_config == 3
{ // 02000-03777 RSEL(0)',RSEL(1)',RSEL(2)',RSEL(3)'
@@ -491,7 +491,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 28,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 02000-03777 RSEL(4)',ALUF(0)',ALUF(1)',ALUF(2)'
"xm51.u74",
@@ -506,7 +506,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 24,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 02000-03777 ALUF(3)',BS(0)',BS(1)',BS(2)'
"xm51.u75",
@@ -521,7 +521,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 20,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 02000-03777 F1(0),F1(1)',F1(2)',F1(3)'
"xm51.u73",
@@ -536,7 +536,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 16,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 02000-03777 F2(0),F2(1)',F2(2)',F2(3)'
"xm51.u52",
@@ -551,7 +551,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 12,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 02000-03777 LOADT',LOADL,NEXT(0)',NEXT(1)'
"xm51.u70",
@@ -566,7 +566,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 8,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 02000-03777 NEXT(2)',NEXT(3)',NEXT(4)',NEXT(5)'
"xm51.u71",
@@ -581,7 +581,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 4,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
},
{ // 02000-03777 NEXT(6)',NEXT(7)',NEXT(8)',NEXT(9)'
"xm51.u72",
@@ -596,7 +596,7 @@ static const prom_load_t pl_ucode[] = {
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ KEEP,
- /* type */ sizeof(UINT32)
+ /* type */ sizeof(uint32_t)
}
};
@@ -617,7 +617,7 @@ static const prom_load_t pl_const[] = {
/* shift */ 0,
/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
/* dand */ ZERO,
- /* type */ sizeof(UINT16)
+ /* type */ sizeof(uint16_t)
},
{ // constant prom D4-D7
"madr.a5",
@@ -632,7 +632,7 @@ static const prom_load_t pl_const[] = {
/* shift */ 4,
/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
/* dand */ KEEP,
- /* type */ sizeof(UINT16)
+ /* type */ sizeof(uint16_t)
},
{ // constant prom D8-D11
"madr.a4",
@@ -647,7 +647,7 @@ static const prom_load_t pl_const[] = {
/* shift */ 8,
/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
/* dand */ KEEP,
- /* type */ sizeof(UINT16)
+ /* type */ sizeof(uint16_t)
},
{ // constant PROM D12-D15
"madr.a3",
@@ -662,7 +662,7 @@ static const prom_load_t pl_const[] = {
/* shift */ 12,
/* dmap */ DMAP_REVERSE_0_3, // reverse D0-D3 to D3-D0
/* dand */ KEEP,
- /* type */ sizeof(UINT16)
+ /* type */ sizeof(uint16_t)
}
};
@@ -681,7 +681,7 @@ static const prom_load_t pl_2kctl_u3 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
//! 82S23 32x8 BPROM; task priority and initial address
@@ -699,7 +699,7 @@ static const prom_load_t pl_2kctl_u38 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
//! 3601-1 256x4 BPROM; 2KCTL replacement for u51 (1KCTL)
@@ -717,7 +717,7 @@ static const prom_load_t pl_2kctl_u76 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
//! ALUF to ALU 741818 functions and carry in mapper
@@ -735,7 +735,7 @@ static const prom_load_t pl_alu_a10 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
static const prom_load_t pl_3kcram_a37 =
@@ -752,7 +752,7 @@ static const prom_load_t pl_3kcram_a37 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
static const prom_load_t pl_madr_a90 =
@@ -769,7 +769,7 @@ static const prom_load_t pl_madr_a90 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
static const prom_load_t pl_madr_a91 =
@@ -786,7 +786,7 @@ static const prom_load_t pl_madr_a91 =
/* shift */ 0,
/* dmap */ DMAP_DEFAULT,
/* dand */ ZERO,
- /* type */ sizeof(UINT8)
+ /* type */ sizeof(uint8_t)
};
//-------------------------------------------------
@@ -818,10 +818,10 @@ void alto2_cpu_device::device_start()
m_ucode_crom = prom_load(machine(), pl_ucode, memregion("ucode_proms")->base(), 2, 8);
// allocate micro code CRAM for max 3 pages
- m_ucode_cram = std::make_unique<UINT8[]>(sizeof(UINT32) * 3 * ALTO2_UCODE_PAGE_SIZE);
+ m_ucode_cram = std::make_unique<uint8_t[]>(sizeof(uint32_t) * 3 * ALTO2_UCODE_PAGE_SIZE);
// fill with the micro code inverted bits value
for (offs_t offset = 0; offset < 3 * ALTO2_UCODE_PAGE_SIZE; offset++)
- *reinterpret_cast<UINT32 *>(m_ucode_cram.get() + offset * 4) = ALTO2_UCODE_INVERTED;
+ *reinterpret_cast<uint32_t *>(m_ucode_cram.get() + offset * 4) = ALTO2_UCODE_INVERTED;
// decode constant PROMs to m_const_data
m_const_data = prom_load(machine(), pl_const, memregion("const_proms")->base(), 1, 4);
@@ -836,8 +836,8 @@ void alto2_cpu_device::device_start()
#if DEBUG_ALU_A10_PROM
// dump ALU a10 PROM after loading
- for (UINT8 i = 0; i < 32; i++) {
- UINT8 a = m_alu_a10[i];
+ for (uint8_t i = 0; i < 32; i++) {
+ uint8_t a = m_alu_a10[i];
printf("%03o: S3-S0:%u%u%u%u M:%u CI:%u T:%u ?:%u\n",
i, (a >> 7) & 1, (a >> 6) & 1, (a >> 5) & 1, (a >> 4) & 1,
(a >> 3) & 1, (a >> 2) & 1, (a >> 1) & 1, (a >> 0) & 1);
@@ -1014,7 +1014,7 @@ void alto2_cpu_device::state_string_export(const device_state_entry &entry, std:
m_aluc0 ? 'C' : '-',
m_laluc0 ? 'c' : '-',
(m_shifter == 0) ? '0' : '-',
- (INT16(m_shifter) < 0) ? '<' : '-');
+ (int16_t(m_shifter) < 0) ? '<' : '-');
break;
}
}
@@ -1023,8 +1023,8 @@ void alto2_cpu_device::state_string_export(const device_state_entry &entry, std:
READ32_MEMBER ( alto2_cpu_device::crom_cram_r )
{
if (offset < m_ucode_ram_base)
- return *reinterpret_cast<UINT32 *>(m_ucode_crom + offset * 4);
- return *reinterpret_cast<UINT32 *>(m_ucode_cram.get() + (offset - m_ucode_ram_base) * 4);
+ return *reinterpret_cast<uint32_t *>(m_ucode_crom + offset * 4);
+ return *reinterpret_cast<uint32_t *>(m_ucode_cram.get() + (offset - m_ucode_ram_base) * 4);
}
//! write microcode CROM or CRAM (CROM of course can't be written)
@@ -1032,19 +1032,19 @@ WRITE32_MEMBER( alto2_cpu_device::crom_cram_w )
{
if (offset < m_ucode_ram_base)
return;
- *reinterpret_cast<UINT32 *>(m_ucode_cram.get() + (offset - m_ucode_ram_base) * 4) = data;
+ *reinterpret_cast<uint32_t *>(m_ucode_cram.get() + (offset - m_ucode_ram_base) * 4) = data;
}
//! read constants PROM
READ16_MEMBER ( alto2_cpu_device::const_r )
{
- return *reinterpret_cast<UINT16 *>(m_const_data + offset * 2);
+ return *reinterpret_cast<uint16_t *>(m_const_data + offset * 2);
}
//! direct read access to the microcode CROM or CRAM
#define RD_UCODE(addr) (addr < m_ucode_ram_base ? \
- *reinterpret_cast<UINT32 *>(m_ucode_crom + addr * 4) : \
- *reinterpret_cast<UINT32 *>(m_ucode_cram.get() + (addr - m_ucode_ram_base) * 4))
+ *reinterpret_cast<uint32_t *>(m_ucode_crom + addr * 4) : \
+ *reinterpret_cast<uint32_t *>(m_ucode_cram.get() + (addr - m_ucode_ram_base) * 4))
//-------------------------------------------------
// device_reset - device-specific reset
@@ -1140,7 +1140,7 @@ const char* alto2_cpu_device::task_name(int task)
}
/** @brief register names (as used by the microcode) */
-const char* alto2_cpu_device::r_name(UINT8 reg)
+const char* alto2_cpu_device::r_name(uint8_t reg)
{
switch (reg) {
case 000: return "ac(3)";
@@ -1180,7 +1180,7 @@ const char* alto2_cpu_device::r_name(UINT8 reg)
}
/** @brief ALU function names */
-const char* alto2_cpu_device::aluf_name(UINT8 aluf)
+const char* alto2_cpu_device::aluf_name(uint8_t aluf)
{
switch (aluf) {
case 000: return "bus";
@@ -1204,7 +1204,7 @@ const char* alto2_cpu_device::aluf_name(UINT8 aluf)
}
/** @brief BUS source names */
-const char* alto2_cpu_device::bs_name(UINT8 bs)
+const char* alto2_cpu_device::bs_name(uint8_t bs)
{
switch (bs) {
case 000: return "read_r";
@@ -1220,7 +1220,7 @@ const char* alto2_cpu_device::bs_name(UINT8 bs)
}
/** @brief F1 function names */
-const char* alto2_cpu_device::f1_name(UINT8 f1)
+const char* alto2_cpu_device::f1_name(uint8_t f1)
{
switch (f1) {
case 000: return "nop";
@@ -1244,7 +1244,7 @@ const char* alto2_cpu_device::f1_name(UINT8 f1)
}
/** @brief F2 function names */
-const char* alto2_cpu_device::f2_name(UINT8 f2)
+const char* alto2_cpu_device::f2_name(uint8_t f2)
{
switch (f2) {
case 000: return "nop";
@@ -1268,12 +1268,12 @@ const char* alto2_cpu_device::f2_name(UINT8 f2)
}
#if ALTO2_DEBUG
-void alto2_cpu_device::watch_read(UINT32 addr, UINT32 data)
+void alto2_cpu_device::watch_read(uint32_t addr, uint32_t data)
{
LOG((this,LOG_MEM,0,"mem: rd[%06o] = %06o\n", addr, data));
}
-void alto2_cpu_device::watch_write(UINT32 addr, UINT32 data)
+void alto2_cpu_device::watch_write(uint32_t addr, uint32_t data)
{
LOG((this,LOG_MEM,0,"mem: wr[%06o] = %06o\n", addr, data));
}
@@ -1323,7 +1323,7 @@ void alto2_cpu_device::f2_late_bad()
#if ALTO2_DEBUG
typedef struct {
- UINT16 first, last;
+ uint16_t first, last;
const char* name;
} memory_range_name_t;
@@ -1433,7 +1433,7 @@ WRITE16_MEMBER( alto2_cpu_device::bank_reg_w )
*/
void alto2_cpu_device::bs_early_read_r()
{
- UINT16 r = m_r[m_rsel];
+ uint16_t r = m_r[m_rsel];
LOG((this,LOG_CPU,2," <-R%02o; %s (%#o)\n", m_rsel, r_name(m_rsel), r));
m_bus &= r;
}
@@ -1443,7 +1443,7 @@ void alto2_cpu_device::bs_early_read_r()
*/
void alto2_cpu_device::bs_early_load_r()
{
- UINT16 r = 0;
+ uint16_t r = 0;
LOG((this,LOG_CPU,2," R%02o<-; %s (BUS&=0)\n", m_rsel, r_name(m_rsel)));
m_bus &= r;
}
@@ -1467,9 +1467,9 @@ void alto2_cpu_device::bs_late_load_r()
void alto2_cpu_device::bs_early_read_md()
{
#if ALTO2_DEBUG
- UINT32 mar = m_mem.mar;
+ uint32_t mar = m_mem.mar;
#endif
- UINT16 md = read_mem();
+ uint16_t md = read_mem();
LOG((this,LOG_CPU,2," <-MD; BUS&=MD (%#o=[%#o])\n", md, mar));
m_bus &= md;
}
@@ -1479,7 +1479,7 @@ void alto2_cpu_device::bs_early_read_md()
*/
void alto2_cpu_device::bs_early_mouse()
{
- UINT16 r = mouse_read();
+ uint16_t r = mouse_read();
LOG((this,LOG_CPU,2," <-MOUSE; BUS&=MOUSE (%#o)\n", r));
m_bus &= r;
}
@@ -1489,7 +1489,7 @@ void alto2_cpu_device::bs_early_mouse()
*/
void alto2_cpu_device::bs_early_disp()
{
- UINT16 r = 0177777;
+ uint16_t r = 0177777;
LOG((this,LOG_CPU,0,"BS <-DISP not handled by task %s mpc:%04x\n", task_name(m_task), m_mpc));
LOG((this,LOG_CPU,2," <-DISP; BUS&=DISP ?? (%#o)\n", r));
m_bus &= r;
@@ -1503,8 +1503,8 @@ void alto2_cpu_device::bs_early_disp()
*/
void alto2_cpu_device::f1_late_load_mar()
{
- UINT8 bank = m_bank_reg[m_task];
- UINT32 msb;
+ uint8_t bank = m_bank_reg[m_task];
+ uint32_t msb;
if (f2() == f2_load_md) {
msb = GET_BANK_EXTENDED(bank) << 16;
LOG((this,LOG_CPU,7, " XMAR %#o\n", msb | m_alu));
@@ -1829,7 +1829,7 @@ void alto2_cpu_device::f1_late_l_lcy_8()
*/
void alto2_cpu_device::f2_late_bus_eq_zero()
{
- UINT16 r = m_bus == 0 ? 1 : 0;
+ uint16_t r = m_bus == 0 ? 1 : 0;
LOG((this,LOG_CPU,2, " BUS=0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
m_next2 |= r;
}
@@ -1839,7 +1839,7 @@ void alto2_cpu_device::f2_late_bus_eq_zero()
*/
void alto2_cpu_device::f2_late_shifter_lt_zero()
{
- UINT16 r = (m_shifter & 0100000) ? 1 : 0;
+ uint16_t r = (m_shifter & 0100000) ? 1 : 0;
LOG((this,LOG_CPU,2, " SH<0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
m_next2 |= r;
}
@@ -1849,7 +1849,7 @@ void alto2_cpu_device::f2_late_shifter_lt_zero()
*/
void alto2_cpu_device::f2_late_shifter_eq_zero()
{
- UINT16 r = m_shifter == 0 ? 1 : 0;
+ uint16_t r = m_shifter == 0 ? 1 : 0;
LOG((this,LOG_CPU,2, " SH=0; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
m_next2 |= r;
}
@@ -1859,7 +1859,7 @@ void alto2_cpu_device::f2_late_shifter_eq_zero()
*/
void alto2_cpu_device::f2_late_bus()
{
- UINT16 r = X_RDBITS(m_bus,16,6,15);
+ uint16_t r = X_RDBITS(m_bus,16,6,15);
LOG((this,LOG_CPU,2, " BUS; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
m_next2 |= r;
}
@@ -1869,7 +1869,7 @@ void alto2_cpu_device::f2_late_bus()
*/
void alto2_cpu_device::f2_late_alucy()
{
- UINT16 r = m_laluc0;
+ uint16_t r = m_laluc0;
LOG((this,LOG_CPU,2, " ALUCY; %sbranch (%#o|%#o)\n", r ? "" : "no ", m_next2, r));
m_next2 |= r;
}
@@ -1882,7 +1882,7 @@ void alto2_cpu_device::f2_late_alucy()
void alto2_cpu_device::f2_late_load_md()
{
#if ALTO2_DEBUG
- UINT16 mar = m_mem.mar;
+ uint16_t mar = m_mem.mar;
#endif
if (f1() == f1_load_mar) {
/* part of an XMAR */
@@ -2000,10 +2000,10 @@ void alto2_cpu_device::f2_late_load_md()
* @return resulting ALU output
*/
#if 1
-UINT32 alto2_cpu_device::alu_74181(UINT32 a, UINT32 b, UINT8 smc)
+uint32_t alto2_cpu_device::alu_74181(uint32_t a, uint32_t b, uint8_t smc)
{
- UINT32 f;
- const UINT32 cout = 1 << 16;
+ uint32_t f;
+ const uint32_t cout = 1 << 16;
switch (smc & A10_ALUIN) {
case SMC(0,0,0,0, 0, 0): // 0000: A + 1
@@ -2243,7 +2243,7 @@ UINT32 alto2_cpu_device::alu_74181(UINT32 a, UINT32 b, UINT8 smc)
} while (0)
-UINT32 alto2_cpu_device::alu_74181(UINT32 a, UINT32 b, UINT8 smc)
+uint32_t alto2_cpu_device::alu_74181(uint32_t a, uint32_t b, uint8_t smc)
{
// inputs
int ci = !BIT(smc, 2);
@@ -2251,7 +2251,7 @@ UINT32 alto2_cpu_device::alu_74181(UINT32 a, UINT32 b, UINT8 smc)
int s0 = !BIT(smc, 4), s1 = !BIT(smc, 5), s2 = !BIT(smc, 6), s3 = !BIT(smc, 7);
// outputs
- UINT32 f = 0;
+ uint32_t f = 0;
int cn_x;
DO_74181(ci, mp,s0,s1,s2,s3,a,b, 0, 1, 2, 3,f,cn_x); // 74181 #1
int cn_y;
@@ -2359,8 +2359,8 @@ void alto2_cpu_device::execute_run()
// The constant memory is gated to the bus by F1 == f1_const, F2 == f2_const, or BS >= 4
if (!do_bs || bs() >= bs_task_4) {
- const UINT32 addr = 8 * m_rsel + bs();
- const UINT16 data = m_const_data[2*addr] | (m_const_data[2*addr+1] << 8);
+ const uint32_t addr = 8 * m_rsel + bs();
+ const uint16_t data = m_const_data[2*addr] | (m_const_data[2*addr+1] << 8);
m_bus &= data;
LOG((this,LOG_CPU,2," %#o; BUS &= %#o CONST[%03o]\n", m_bus, data, addr));
}
@@ -2544,11 +2544,11 @@ void alto2_cpu_device::execute_run()
*
* B1 and B3-B7 are inverted on loading the PROM
*/
- const UINT8 a10 = m_alu_a10[(m_emu.skip << 4) | aluf()];
- const UINT32 alu = alu_74181(m_bus, m_t, a10);
+ const uint8_t a10 = m_alu_a10[(m_emu.skip << 4) | aluf()];
+ const uint32_t alu = alu_74181(m_bus, m_t, a10);
const int flags = a10 & (TSELECT | ALUM);
m_aluc0 = (alu >> 16) & 1;
- m_alu = static_cast<UINT16>(alu);
+ m_alu = static_cast<uint16_t>(alu);
// WRTRAM must happen now before L is changed
if (m_wrtram_flag)
diff --git a/src/devices/cpu/alto2/alto2cpu.h b/src/devices/cpu/alto2/alto2cpu.h
index 036f709dae0..20211b511e7 100644
--- a/src/devices/cpu/alto2/alto2cpu.h
+++ b/src/devices/cpu/alto2/alto2cpu.h
@@ -85,7 +85,7 @@ enum {
//! put a value %val into %reg, a word of %width bits, starting at bit %from until bit %to
#define X_WRBITS(reg,width,from,to,val) do { \
- UINT32 mask = X_BITMASK(from,to) << X_BITSHIFT(width,to); \
+ uint32_t mask = X_BITMASK(from,to) << X_BITSHIFT(width,to); \
reg = ((reg) & ~mask) | (((val) << X_BITSHIFT(width,to)) & mask); \
} while (0)
@@ -180,7 +180,7 @@ class alto2_cpu_device : public cpu_device
{
public:
// construction/destruction
- alto2_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ alto2_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
~alto2_cpu_device();
//! driver interface to set diablo_hd_device
@@ -193,7 +193,7 @@ public:
void next_sector(int unit);
//! update the screen bitmap
- UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
//! set the vblank bit for the display to synch upon
void screen_vblank();
@@ -221,9 +221,9 @@ protected:
void interface_post_reset() override;
//! device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -236,9 +236,9 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
//! device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
@@ -250,16 +250,16 @@ private:
address_space* m_iomem;
- UINT32 m_cram_config; //!< CROM/CRAM configuration (1 .. 3)
- UINT32 m_ucode_rom_pages; //!< Number of CROM pages; derived from m_cram_config
- UINT32 m_ucode_ram_pages; //!< Number of CRAM pages; derived from m_cram_config
- UINT32 m_ucode_ram_base; //!< Base offset of the CRAM addresses
- UINT32 m_ucode_size; //!< Size of both, CROM and CRAM together
- UINT32 m_sreg_banks; //!< Number of S register banks; derived from m_cram_config
+ uint32_t m_cram_config; //!< CROM/CRAM configuration (1 .. 3)
+ uint32_t m_ucode_rom_pages; //!< Number of CROM pages; derived from m_cram_config
+ uint32_t m_ucode_ram_pages; //!< Number of CRAM pages; derived from m_cram_config
+ uint32_t m_ucode_ram_base; //!< Base offset of the CRAM addresses
+ uint32_t m_ucode_size; //!< Size of both, CROM and CRAM together
+ uint32_t m_sreg_banks; //!< Number of S register banks; derived from m_cram_config
- UINT8* m_ucode_crom;
- std::unique_ptr<UINT8[]> m_ucode_cram;
- UINT8* m_const_data;
+ uint8_t* m_ucode_crom;
+ std::unique_ptr<uint8_t[]> m_ucode_cram;
+ uint8_t* m_const_data;
//! read microcode CROM or CRAM, depending on m_ucode_ram_base
DECLARE_READ32_MEMBER ( crom_cram_r );
@@ -520,42 +520,42 @@ private:
};
//! get the normally accessed bank number from a bank register
- static inline UINT16 GET_BANK_NORMAL(UINT16 breg) { return X_RDBITS(breg,16,12,13); }
+ static inline uint16_t GET_BANK_NORMAL(uint16_t breg) { return X_RDBITS(breg,16,12,13); }
//! get the extended bank number (accessed via XMAR) from a bank register
- static inline UINT16 GET_BANK_EXTENDED(UINT16 breg) { return X_RDBITS(breg,16,14,15); }
+ static inline uint16_t GET_BANK_EXTENDED(uint16_t breg) { return X_RDBITS(breg,16,14,15); }
//! get an ignored bit field from a control RAM address
- static inline UINT16 GET_CRAM_IGNORE(UINT16 addr) { return X_RDBITS(addr,16,0,1); }
+ static inline uint16_t GET_CRAM_IGNORE(uint16_t addr) { return X_RDBITS(addr,16,0,1); }
//! get the bank select bit field from a control RAM address
- static inline UINT16 GET_CRAM_BANKSEL(UINT16 addr) { return X_RDBITS(addr,16,2,3); }
+ static inline uint16_t GET_CRAM_BANKSEL(uint16_t addr) { return X_RDBITS(addr,16,2,3); }
//! get the ROM/RAM flag from a control RAM address
- static inline UINT16 GET_CRAM_RAMROM(UINT16 addr) { return X_RDBITS(addr,16,4,4); }
+ static inline uint16_t GET_CRAM_RAMROM(uint16_t addr) { return X_RDBITS(addr,16,4,4); }
//! get the half select flag from a control RAM address
- static inline UINT16 GET_CRAM_HALFSEL(UINT16 addr) { return X_RDBITS(addr,16,5,5); }
+ static inline uint16_t GET_CRAM_HALFSEL(uint16_t addr) { return X_RDBITS(addr,16,5,5); }
//! get the word address bit field from a control RAM address
- static inline UINT16 GET_CRAM_WORDADDR(UINT16 addr) { return X_RDBITS(addr,16,6,15); }
-
- UINT16 m_task_mpc[ALTO2_TASKS]; //!< per task micro program counter
- UINT16 m_task_next2[ALTO2_TASKS]; //!< per task address modifier
- UINT8 m_task; //!< active task
- UINT8 m_next_task; //!< next micro instruction's task
- UINT8 m_next2_task; //!< next but one micro instruction's task
- UINT16 m_mpc; //!< micro program counter
- UINT32 m_mir; //!< micro instruction register
-
- inline UINT32 rsel() const { return X_RDBITS(m_mir, 32, DRSEL0, DRSEL4); }
- inline UINT32 aluf() const { return X_RDBITS(m_mir, 32, DALUF0, DALUF3); }
- inline UINT32 bs() const { return X_RDBITS(m_mir, 32, DBS0, DBS2); }
- inline UINT32 f1() const { return X_RDBITS(m_mir, 32, DF1_0, DF1_3); }
- inline UINT32 f2() const { return X_RDBITS(m_mir, 32, DF2_0, DF2_3); }
- inline UINT32 loadt() const { return X_BIT(m_mir, 32, DLOADT); }
- inline UINT32 loadl() const { return X_BIT(m_mir, 32, DLOADL); }
- inline UINT32 next() const { return X_RDBITS(m_mir, 32, NEXT0, NEXT9); }
+ static inline uint16_t GET_CRAM_WORDADDR(uint16_t addr) { return X_RDBITS(addr,16,6,15); }
+
+ uint16_t m_task_mpc[ALTO2_TASKS]; //!< per task micro program counter
+ uint16_t m_task_next2[ALTO2_TASKS]; //!< per task address modifier
+ uint8_t m_task; //!< active task
+ uint8_t m_next_task; //!< next micro instruction's task
+ uint8_t m_next2_task; //!< next but one micro instruction's task
+ uint16_t m_mpc; //!< micro program counter
+ uint32_t m_mir; //!< micro instruction register
+
+ inline uint32_t rsel() const { return X_RDBITS(m_mir, 32, DRSEL0, DRSEL4); }
+ inline uint32_t aluf() const { return X_RDBITS(m_mir, 32, DALUF0, DALUF3); }
+ inline uint32_t bs() const { return X_RDBITS(m_mir, 32, DBS0, DBS2); }
+ inline uint32_t f1() const { return X_RDBITS(m_mir, 32, DF1_0, DF1_3); }
+ inline uint32_t f2() const { return X_RDBITS(m_mir, 32, DF2_0, DF2_3); }
+ inline uint32_t loadt() const { return X_BIT(m_mir, 32, DLOADT); }
+ inline uint32_t loadl() const { return X_BIT(m_mir, 32, DLOADL); }
+ inline uint32_t next() const { return X_RDBITS(m_mir, 32, NEXT0, NEXT9); }
/**
* \brief current micro instruction's register selection
@@ -563,28 +563,28 @@ private:
* Note: The S registers are addressed by the original RSEL[0-4],
* even when the emulator modifies this.
*/
- UINT8 m_rsel;
- UINT16 m_next; //!< current micro instruction's next
- UINT16 m_next2; //!< next micro instruction's next
- UINT16 m_r[ALTO2_REGS]; //!< R register file
- UINT16 m_s[8][ALTO2_REGS]; //!< S register file(s) (1 or 8 are used)
- UINT16 m_bus; //!< wired-AND bus
- UINT16 m_t; //!< T register
- UINT16 m_alu; //!< the current ALU
- UINT16 m_aluc0; //!< the current ALU carry output
- UINT16 m_l; //!< L register
- UINT16 m_shifter; //!< shifter output
- UINT16 m_laluc0; //!< the latched ALU carry output
- UINT16 m_myl; //!< M register of RAM related tasks (MYL latch in the schematics)
- UINT16 m_cram_addr; //!< constant RAM address
- UINT16 m_task_wakeup; //!< task wakeup: bit 1<<n set if task n requesting service
-
- UINT16 m_reset_mode; //!< reset mode register: bit 1<<n set if task n starts in ROM
+ uint8_t m_rsel;
+ uint16_t m_next; //!< current micro instruction's next
+ uint16_t m_next2; //!< next micro instruction's next
+ uint16_t m_r[ALTO2_REGS]; //!< R register file
+ uint16_t m_s[8][ALTO2_REGS]; //!< S register file(s) (1 or 8 are used)
+ uint16_t m_bus; //!< wired-AND bus
+ uint16_t m_t; //!< T register
+ uint16_t m_alu; //!< the current ALU
+ uint16_t m_aluc0; //!< the current ALU carry output
+ uint16_t m_l; //!< L register
+ uint16_t m_shifter; //!< shifter output
+ uint16_t m_laluc0; //!< the latched ALU carry output
+ uint16_t m_myl; //!< M register of RAM related tasks (MYL latch in the schematics)
+ uint16_t m_cram_addr; //!< constant RAM address
+ uint16_t m_task_wakeup; //!< task wakeup: bit 1<<n set if task n requesting service
+
+ uint16_t m_reset_mode; //!< reset mode register: bit 1<<n set if task n starts in ROM
bool m_rdram_flag; //!< set by rdram, action happens on next cycle
bool m_wrtram_flag; //!< set by wrtram, action happens on next cycle
- UINT8 m_s_reg_bank[ALTO2_TASKS]; //!< active S register bank per task
- UINT8 m_bank_reg[ALTO2_TASKS]; //!< normal and extended RAM banks per task
+ uint8_t m_s_reg_bank[ALTO2_TASKS]; //!< active S register bank per task
+ uint8_t m_bank_reg[ALTO2_TASKS]; //!< normal and extended RAM banks per task
bool m_ether_enable; //!< set to true, if the ethernet should be simulated
bool m_ewfct; //!< set by Ether task when it want's a wakeup at switch to task_mrt
attoseconds_t m_display_time; //!< display time accu (display state machine)
@@ -594,11 +594,11 @@ private:
int m_bitclk_index; //!< bitclk index (bit number in sector)
static const char *task_name(int task); //!< human readable task names
- static const char *r_name(UINT8 reg); //!< human readable register names
- static const char *aluf_name(UINT8 aluf); //!< human readable ALU function names
- static const char *bs_name(UINT8 bs); //!< human readable bus source names
- static const char *f1_name(UINT8 f1); //!< human readable F1 function names
- static const char *f2_name(UINT8 f2); //!< human readable F2 function names
+ static const char *r_name(uint8_t reg); //!< human readable register names
+ static const char *aluf_name(uint8_t aluf); //!< human readable ALU function names
+ static const char *bs_name(uint8_t bs); //!< human readable bus source names
+ static const char *f1_name(uint8_t f1); //!< human readable F1 function names
+ static const char *f2_name(uint8_t f2); //!< human readable F2 function names
/**
* @brief 2KCTL PROM u3 - 256x4
@@ -659,7 +659,7 @@ private:
* access it. Also both, address and data lines, are inverted.
* </PRE>
*/
- UINT8* m_ctl2k_u3;
+ uint8_t* m_ctl2k_u3;
/**
* @brief 2KCTL PROM u38; 82S23; 32x8 bit
@@ -708,7 +708,7 @@ private:
* B7 9 NEXT[06]'
* </PRE>
*/
- UINT8* m_ctl2k_u38;
+ uint8_t* m_ctl2k_u38;
//! output lines of the 2KCTL U38 PROM
enum {
@@ -780,22 +780,22 @@ private:
* depending on the current NEXT[01]' level.
* </PRE>
*/
- UINT8* m_ctl2k_u76;
+ uint8_t* m_ctl2k_u76;
/**
* @brief 3k CRAM PROM a37
*/
- UINT8* m_cram3k_a37;
+ uint8_t* m_cram3k_a37;
/**
* @brief memory addressing PROM a64
*/
- UINT8* m_madr_a64;
+ uint8_t* m_madr_a64;
/**
* @brief memory addressing PROM a65
*/
- UINT8* m_madr_a65;
+ uint8_t* m_madr_a65;
/**
* @brief unused PROM a90
@@ -810,7 +810,7 @@ private:
*
* I haven't found yet where KP3-KP5 are used
*/
- UINT8* m_madr_a90;
+ uint8_t* m_madr_a90;
/**
* @brief unused PROM a91
@@ -837,12 +837,12 @@ private:
* KE(6) KB(^L) KB(RTN) KB(") KB(/) KB(S3) KB(<-) KB(]) KB(\)
* KE(7) KB(S1) KB(DEL) KB(S2) KB(LF) KB(S4) KB(S5) KB(BW) KB(BS)
*/
- UINT8* m_madr_a91;
+ uint8_t* m_madr_a91;
/**
* @brief ALU function to 74181 operation lookup PROM
*/
- UINT8* m_alu_a10;
+ uint8_t* m_alu_a10;
//! output lines of the ALU a10 PROM
enum {
@@ -862,10 +862,10 @@ private:
bool m_ram_related[ALTO2_TASKS]; //!< set when task is RAM related
- UINT64 m_cycle; //!< number of cycles executed in the current slice
+ uint64_t m_cycle; //!< number of cycles executed in the current slice
- UINT64 cycle() { return m_cycle; } //!< return the current CPU cycle
- UINT64 ntime() { return m_cycle*ALTO2_UCYCLE/1000; } //!< return the current nano seconds
+ uint64_t cycle() { return m_cycle; } //!< return the current CPU cycle
+ uint64_t ntime() { return m_cycle*ALTO2_UCYCLE/1000; } //!< return the current nano seconds
void hard_reset(); //!< reset the various registers
void soft_reset(); //!< soft reset
@@ -906,12 +906,12 @@ private:
void f2_late_alucy(); //!< F2 func: branch on latched ALU carry
void f2_late_load_md(); //!< F2 func: load memory data
- UINT32 alu_74181(UINT32 a, UINT32 b, UINT8 smc);
+ uint32_t alu_74181(uint32_t a, uint32_t b, uint8_t smc);
void rdram(); //!< read the microcode ROM/RAM halfword
void wrtram(); //!< write the microcode RAM from M register and ALU
- UINT8 m_ether_id; //!< configured Ethernet ID for this machine
+ uint8_t m_ether_id; //!< configured Ethernet ID for this machine
//*******************************************
// inline the sub-devices
diff --git a/src/devices/cpu/alto2/alto2dsm.cpp b/src/devices/cpu/alto2/alto2dsm.cpp
index 57571352c53..791cafb56e7 100644
--- a/src/devices/cpu/alto2/alto2dsm.cpp
+++ b/src/devices/cpu/alto2/alto2dsm.cpp
@@ -147,7 +147,7 @@ static const char* t_bus_alu[16] = {
/**
* @brief copy of the constant PROM, which this disassembler may not have access to
*/
-static UINT16 const_prom[PROM_SIZE] = {
+static uint16_t const_prom[PROM_SIZE] = {
/* 0000 */ 0x0000, 0x0001, 0x0002, 0xfffe, 0xffff, 0xffff, 0x000f, 0xffff,
/* 0008 */ 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008, 0xfff8, 0xfff8,
/* 0010 */ 0x0010, 0x001f, 0x0020, 0x003f, 0x0040, 0x007f, 0x0080, 0x0007,
@@ -206,14 +206,14 @@ static const char *addrname(int a)
return dst;
}
-offs_t alto2_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t alto2_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
size_t len = 128;
- UINT32 mir = (static_cast<UINT32>(oprom[0]) << 24) |
- (static_cast<UINT32>(oprom[1]) << 16) |
- (static_cast<UINT32>(oprom[2]) << 8) |
- (static_cast<UINT32>(oprom[3]) << 0);
+ uint32_t mir = (static_cast<uint32_t>(oprom[0]) << 24) |
+ (static_cast<uint32_t>(oprom[1]) << 16) |
+ (static_cast<uint32_t>(oprom[2]) << 8) |
+ (static_cast<uint32_t>(oprom[3]) << 0);
int rsel = (mir >> 27) & 31;
int aluf = (mir >> 23) & 15;
int bs = (mir >> 20) & 7;
@@ -222,15 +222,15 @@ offs_t alto2_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
int t = (mir >> 11) & 1;
int l = (mir >> 10) & 1;
offs_t next = mir & 1023;
- const UINT8* src = oprom - 4 * pc + 4 * next;
- UINT32 next2 = (static_cast<UINT32>(src[0]) << 24) |
- (static_cast<UINT32>(src[1]) << 16) |
- (static_cast<UINT32>(src[2]) << 8) |
- (static_cast<UINT32>(src[3]) << 0);
- UINT16 prefetch = next2 & 1023;
+ const uint8_t* src = oprom - 4 * pc + 4 * next;
+ uint32_t next2 = (static_cast<uint32_t>(src[0]) << 24) |
+ (static_cast<uint32_t>(src[1]) << 16) |
+ (static_cast<uint32_t>(src[2]) << 8) |
+ (static_cast<uint32_t>(src[3]) << 0);
+ uint16_t prefetch = next2 & 1023;
char *dst = buffer;
offs_t result = 1 | DASMFLAG_SUPPORTED;
- UINT8 pa;
+ uint8_t pa;
if (next != pc + 1)
result |= DASMFLAG_STEP_OUT;
diff --git a/src/devices/cpu/am29000/am29000.cpp b/src/devices/cpu/am29000/am29000.cpp
index 524cb8b28d8..62fbb6a5536 100644
--- a/src/devices/cpu/am29000/am29000.cpp
+++ b/src/devices/cpu/am29000/am29000.cpp
@@ -78,7 +78,7 @@ const device_type AM29000 = &device_creator<am29000_cpu_device>;
STATE ACCESSORS
***************************************************************************/
-am29000_cpu_device::am29000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+am29000_cpu_device::am29000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, AM29000, "AMD Am29000", tag, owner, clock, "am29000", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 32, 0)
, m_io_config("io", ENDIANNESS_BIG, 32, 32, 0)
@@ -439,7 +439,7 @@ void am29000_cpu_device::device_reset()
}
-void am29000_cpu_device::signal_exception(UINT32 type)
+void am29000_cpu_device::signal_exception(uint32_t type)
{
m_exception_queue[m_exceptions++] = type;
}
@@ -477,7 +477,7 @@ void am29000_cpu_device::external_irq_check()
}
-UINT32 am29000_cpu_device::read_program_word(UINT32 address)
+uint32_t am29000_cpu_device::read_program_word(uint32_t address)
{
/* TODO: ROM enable? */
if (m_cps & CPS_PI || m_cps & CPS_RE)
@@ -494,7 +494,7 @@ UINT32 am29000_cpu_device::read_program_word(UINT32 address)
HELPER FUNCTIONS
***************************************************************************/
-UINT32 am29000_cpu_device::get_abs_reg(UINT8 r, UINT32 iptr)
+uint32_t am29000_cpu_device::get_abs_reg(uint8_t r, uint32_t iptr)
{
if (r & 0x80)
{
@@ -528,8 +528,8 @@ UINT32 am29000_cpu_device::get_abs_reg(UINT8 r, UINT32 iptr)
void am29000_cpu_device::fetch_decode()
{
- UINT32 inst;
- UINT32 op_flags;
+ uint32_t inst;
+ uint32_t op_flags;
inst = read_program_word(m_pc);
m_next_ir = inst;
@@ -598,7 +598,7 @@ void am29000_cpu_device::fetch_decode()
void am29000_cpu_device::execute_run()
{
- UINT32 call_debugger = (machine().debug_flags & DEBUG_FLAG_ENABLED) != 0;
+ uint32_t call_debugger = (machine().debug_flags & DEBUG_FLAG_ENABLED) != 0;
external_irq_check();
@@ -627,8 +627,8 @@ void am29000_cpu_device::execute_run()
if (m_cfg & CFG_VF)
{
- UINT32 vaddr = m_vab | m_exception_queue[0] * 4;
- UINT32 vect = m_datadirect->read_dword(vaddr);
+ uint32_t vaddr = m_vab | m_exception_queue[0] * 4;
+ uint32_t vect = m_datadirect->read_dword(vaddr);
m_pc = vect & ~3;
m_next_pc = m_pc;
@@ -674,7 +674,7 @@ void am29000_cpu_device::execute_set_input(int inputnum, int state)
}
-offs_t am29000_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t am29000_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( am29000 );
return CPU_DISASSEMBLE_NAME(am29000)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/am29000/am29000.h b/src/devices/cpu/am29000/am29000.h
index 4f0c1a1a4af..2b8dd1be5f8 100644
--- a/src/devices/cpu/am29000/am29000.h
+++ b/src/devices/cpu/am29000/am29000.h
@@ -435,7 +435,7 @@ class am29000_cpu_device : public cpu_device
{
public:
// construction/destruction
- am29000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ am29000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -443,9 +443,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -465,17 +465,17 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- void signal_exception(UINT32 type);
+ void signal_exception(uint32_t type);
void external_irq_check();
- UINT32 read_program_word(UINT32 address);
- UINT32 get_abs_reg(UINT8 r, UINT32 iptr);
+ uint32_t read_program_word(uint32_t address);
+ uint32_t get_abs_reg(uint8_t r, uint32_t iptr);
void fetch_decode();
- UINT32 read_spr(UINT32 idx);
- void write_spr(UINT32 idx, UINT32 val);
+ uint32_t read_spr(uint32_t idx);
+ void write_spr(uint32_t idx, uint32_t val);
void ADD();
void ADDS();
void ADDU();
@@ -584,59 +584,59 @@ protected:
address_space_config m_io_config;
address_space_config m_data_config;
- INT32 m_icount;
- UINT32 m_pc;
+ int32_t m_icount;
+ uint32_t m_pc;
/* General purpose */
- UINT32 m_r[256]; // TODO: There's only 192 implemented!
+ uint32_t m_r[256]; // TODO: There's only 192 implemented!
/* TLB */
- UINT32 m_tlb[128];
+ uint32_t m_tlb[128];
/* Protected SPRs */
- UINT32 m_vab;
- UINT32 m_ops;
- UINT32 m_cps;
- UINT32 m_cfg;
- UINT32 m_cha;
- UINT32 m_chd;
- UINT32 m_chc;
- UINT32 m_rbp;
- UINT32 m_tmc;
- UINT32 m_tmr;
- UINT32 m_pc0;
- UINT32 m_pc1;
- UINT32 m_pc2;
- UINT32 m_mmu;
- UINT32 m_lru;
+ uint32_t m_vab;
+ uint32_t m_ops;
+ uint32_t m_cps;
+ uint32_t m_cfg;
+ uint32_t m_cha;
+ uint32_t m_chd;
+ uint32_t m_chc;
+ uint32_t m_rbp;
+ uint32_t m_tmc;
+ uint32_t m_tmr;
+ uint32_t m_pc0;
+ uint32_t m_pc1;
+ uint32_t m_pc2;
+ uint32_t m_mmu;
+ uint32_t m_lru;
/* Unprotected SPRs */
- UINT32 m_ipc;
- UINT32 m_ipa;
- UINT32 m_ipb;
- UINT32 m_q;
- UINT32 m_alu;
- UINT32 m_fpe;
- UINT32 m_inte;
- UINT32 m_fps;
+ uint32_t m_ipc;
+ uint32_t m_ipa;
+ uint32_t m_ipb;
+ uint32_t m_q;
+ uint32_t m_alu;
+ uint32_t m_fpe;
+ uint32_t m_inte;
+ uint32_t m_fps;
/* Pipeline state */
- UINT32 m_exceptions;
- UINT32 m_exception_queue[4];
+ uint32_t m_exceptions;
+ uint32_t m_exception_queue[4];
- UINT8 m_irq_active;
- UINT8 m_irq_lines;
+ uint8_t m_irq_active;
+ uint8_t m_irq_lines;
- UINT32 m_exec_ir;
- UINT32 m_next_ir;
+ uint32_t m_exec_ir;
+ uint32_t m_next_ir;
- UINT32 m_pl_flags;
- UINT32 m_next_pl_flags;
+ uint32_t m_pl_flags;
+ uint32_t m_next_pl_flags;
- UINT32 m_iret_pc;
+ uint32_t m_iret_pc;
- UINT32 m_exec_pc;
- UINT32 m_next_pc;
+ uint32_t m_exec_pc;
+ uint32_t m_next_pc;
address_space *m_program;
direct_read_data *m_direct;
@@ -647,7 +647,7 @@ protected:
typedef void ( am29000_cpu_device::*opcode_func ) ();
struct op_info {
opcode_func opcode;
- UINT32 flags;
+ uint32_t flags;
};
static const op_info op_table[256];
diff --git a/src/devices/cpu/am29000/am29dasm.cpp b/src/devices/cpu/am29000/am29dasm.cpp
index bd8c6712fd2..039181d65a4 100644
--- a/src/devices/cpu/am29000/am29dasm.cpp
+++ b/src/devices/cpu/am29000/am29dasm.cpp
@@ -29,14 +29,14 @@
#define OP_CE ((op >> 23) & 1)
#define OP_CNTL ((op >> 16) & 0x7f)
-#define OP_SJMP ((INT32)(INT16)OP_I16 << 2)
+#define OP_SJMP ((int32_t)(int16_t)OP_I16 << 2)
/***************************************************************************
CODE
***************************************************************************/
-static const char *dasm_type1(UINT32 op)
+static const char *dasm_type1(uint32_t op)
{
static char buf[32];
@@ -48,7 +48,7 @@ static const char *dasm_type1(UINT32 op)
return buf;
}
-static const char *dasm_type2(UINT32 op)
+static const char *dasm_type2(uint32_t op)
{
static char buf[32];
@@ -57,7 +57,7 @@ static const char *dasm_type2(UINT32 op)
return buf;
}
-static const char *dasm_type3(UINT32 op)
+static const char *dasm_type3(uint32_t op)
{
static char buf[32];
@@ -66,7 +66,7 @@ static const char *dasm_type3(UINT32 op)
return buf;
}
-static const char *dasm_type4(UINT32 op, UINT32 pc)
+static const char *dasm_type4(uint32_t op, uint32_t pc)
{
static char buf[32];
@@ -78,7 +78,7 @@ static const char *dasm_type4(UINT32 op, UINT32 pc)
return buf;
}
-static const char *dasm_type5(UINT32 op)
+static const char *dasm_type5(uint32_t op)
{
static char buf[32];
@@ -90,7 +90,7 @@ static const char *dasm_type5(UINT32 op)
return buf;
}
-static const char *dasm_type6(UINT32 op)
+static const char *dasm_type6(uint32_t op)
{
static char buf[32];
@@ -147,8 +147,8 @@ static const char* get_spr(int spid)
CPU_DISASSEMBLE( am29000 )
{
- UINT32 op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | oprom[3];
- UINT32 flags = 0;
+ uint32_t op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | oprom[3];
+ uint32_t flags = 0;
switch (op >> 24)
{
diff --git a/src/devices/cpu/am29000/am29ops.h b/src/devices/cpu/am29000/am29ops.h
index df8925972ab..87890ea0137 100644
--- a/src/devices/cpu/am29000/am29ops.h
+++ b/src/devices/cpu/am29000/am29ops.h
@@ -45,12 +45,12 @@
#define I8 (m_exec_ir & 0xff)
#define I16 (((m_exec_ir >> 8) & 0xff00) | (m_exec_ir & 0xff))
-#define I16_ZEX ((UINT32)(I16))
-#define I16_SEX ((INT32)(INT16)I16)
+#define I16_ZEX ((uint32_t)(I16))
+#define I16_SEX ((int32_t)(int16_t)I16)
#define I16_OEX (0xffff0000 | I16)
#define JMP_ZEX (I16 << 2)
-#define JMP_SEX ((INT32)(INT16)(((m_exec_ir >> 8) & 0xff00) | (m_exec_ir & 0xff)) << 2)
+#define JMP_SEX ((int32_t)(int16_t)(((m_exec_ir >> 8) & 0xff00) | (m_exec_ir & 0xff)) << 2)
#define BOOLEAN_MASK (1 << 31)
#define BOOLEAN_TRUE (1 << 31)
@@ -67,31 +67,31 @@
m_alu |= (r == 0) << ALU_Z_SHIFT;
#define SET_ALU_N(r) m_alu &= ~ALU_N; \
- m_alu |= ((UINT32)r & 0x80000000) >> (31 - ALU_N_SHIFT);
+ m_alu |= ((uint32_t)r & 0x80000000) >> (31 - ALU_N_SHIFT);
-#define CALC_C_ADD(r, a) ((UINT32)(r) < (UINT32)(a))
+#define CALC_C_ADD(r, a) ((uint32_t)(r) < (uint32_t)(a))
#define SET_ALU_C_ADD(r, a) m_alu &= ~ALU_C; \
m_alu |= CALC_C_ADD(r, a) << ALU_C_SHIFT;
-#define CALC_C_SUB(a, b) (!((UINT32)(a) < (UINT32)(b)))
+#define CALC_C_SUB(a, b) (!((uint32_t)(a) < (uint32_t)(b)))
#define SET_ALU_C_SUB(a, b) m_alu &= ~ALU_C; \
m_alu |= CALC_C_SUB(a, b) << ALU_C_SHIFT;
#define SET_ALU_V_ADD(r, a, b) m_alu &= ~ALU_V; \
- m_alu |= (((INT32)(~((a) ^ (b)) & ((a) ^ (r))) < 0)) << ALU_V_SHIFT;
+ m_alu |= (((int32_t)(~((a) ^ (b)) & ((a) ^ (r))) < 0)) << ALU_V_SHIFT;
#define SET_ALU_V_SUB(r, a, b) m_alu &= ~ALU_V; \
- m_alu |= ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0) << ALU_V_SHIFT;
+ m_alu |= ((int32_t)(((a) ^ (b)) & ((a) ^ (r))) < 0) << ALU_V_SHIFT;
#define GET_CARRY ((m_alu >> ALU_C_SHIFT) & 1)
-UINT32 am29000_cpu_device::read_spr(UINT32 idx)
+uint32_t am29000_cpu_device::read_spr(uint32_t idx)
{
- UINT32 val = 0;
+ uint32_t val = 0;
switch (idx)
{
@@ -129,7 +129,7 @@ UINT32 am29000_cpu_device::read_spr(UINT32 idx)
}
-void am29000_cpu_device::write_spr(UINT32 idx, UINT32 val)
+void am29000_cpu_device::write_spr(uint32_t idx, uint32_t val)
{
switch (idx)
{
@@ -203,9 +203,9 @@ void am29000_cpu_device::write_spr(UINT32 idx, UINT32 val)
void am29000_cpu_device::ADD()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = a + b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = a + b;
if (!FREEZE_MODE)
{
@@ -235,14 +235,14 @@ void am29000_cpu_device::ADDC()
void am29000_cpu_device::ADDCS()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = a + b + GET_CARRY;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = a + b + GET_CARRY;
if (!FREEZE_MODE)
{
- UINT32 carry = GET_CARRY;
- UINT32 tmp = a + b;
+ uint32_t carry = GET_CARRY;
+ uint32_t tmp = a + b;
SET_ALU_V_ADD(r, a, b);
SET_ALU_Z(r);
@@ -264,9 +264,9 @@ void am29000_cpu_device::ADDCU()
void am29000_cpu_device::SUB()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8 : GET_RB_VAL;
- UINT32 r = a - b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8 : GET_RB_VAL;
+ uint32_t r = a - b;
if (!FREEZE_MODE)
{
@@ -282,9 +282,9 @@ void am29000_cpu_device::SUB()
void am29000_cpu_device::SUBS()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8 : GET_RB_VAL;
- UINT32 r = a - b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8 : GET_RB_VAL;
+ uint32_t r = a - b;
if (!FREEZE_MODE)
{
@@ -294,7 +294,7 @@ void am29000_cpu_device::SUBS()
SET_ALU_C_SUB(a, b);
}
- if ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0)
+ if ((int32_t)(((a) ^ (b)) & ((a) ^ (r))) < 0)
SIGNAL_EXCEPTION(EXCEPTION_OUT_OF_RANGE);
m_r[RC] = r;
@@ -322,9 +322,9 @@ void am29000_cpu_device::SUBCU()
void am29000_cpu_device::SUBR()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8 : GET_RB_VAL;
- UINT32 r = b - a;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8 : GET_RB_VAL;
+ uint32_t r = b - a;
if (!FREEZE_MODE)
{
@@ -349,9 +349,9 @@ void am29000_cpu_device::SUBRU()
void am29000_cpu_device::SUBRC()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8 : GET_RB_VAL;
- UINT32 r = b - a - 1 + GET_CARRY;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8 : GET_RB_VAL;
+ uint32_t r = b - a - 1 + GET_CARRY;
if (!FREEZE_MODE)
{
@@ -387,16 +387,16 @@ void am29000_cpu_device::MULTIPLY()
void am29000_cpu_device::MUL()
{
/* TODO: Zero/Neg flags ? */
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8 : GET_RB_VAL;
- UINT32 r;
- UINT64 v;
- UINT32 sign;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8 : GET_RB_VAL;
+ uint32_t r;
+ uint64_t v;
+ uint32_t sign;
if (m_q & 1)
{
r = a + b;
- sign = (r >> 31) ^ (((INT32)(~((a) ^ (b)) & ((a) ^ (r))) < 0));
+ sign = (r >> 31) ^ (((int32_t)(~((a) ^ (b)) & ((a) ^ (r))) < 0));
}
else
{
@@ -404,7 +404,7 @@ void am29000_cpu_device::MUL()
sign = b >> 31;
}
- v = ((((UINT64)r << 32) | m_q) >> 1) | ((UINT64)sign << 63);
+ v = ((((uint64_t)r << 32) | m_q) >> 1) | ((uint64_t)sign << 63);
m_q = v & 0xffffffff;
m_r[RC] = v >> 32;
@@ -413,16 +413,16 @@ void am29000_cpu_device::MUL()
void am29000_cpu_device::MULL()
{
/* TODO: Zero/Neg flags ? */
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8 : GET_RB_VAL;
- UINT32 r;
- UINT64 v;
- UINT32 sign;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8 : GET_RB_VAL;
+ uint32_t r;
+ uint64_t v;
+ uint32_t sign;
if (m_q & 1)
{
r = b - a;
- sign = (r >> 31) ^ ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0);
+ sign = (r >> 31) ^ ((int32_t)(((a) ^ (b)) & ((a) ^ (r))) < 0);
}
else
{
@@ -430,7 +430,7 @@ void am29000_cpu_device::MULL()
sign = b >> 31;
}
- v = ((((UINT64)r << 32) | m_q) >> 1) | ((UINT64)sign << 63);
+ v = ((((uint64_t)r << 32) | m_q) >> 1) | ((uint64_t)sign << 63);
m_q = v & 0xffffffff;
m_r[RC] = v >> 32;
@@ -439,16 +439,16 @@ void am29000_cpu_device::MULL()
void am29000_cpu_device::MULU()
{
/* TODO: Zero/Neg flags ? */
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8 : GET_RB_VAL;
- UINT32 r;
- UINT64 v;
- UINT32 c;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8 : GET_RB_VAL;
+ uint32_t r;
+ uint64_t v;
+ uint32_t c;
if (m_q & 1)
{
r = a + b;
- c = (UINT32)(r) < (UINT32)(a);
+ c = (uint32_t)(r) < (uint32_t)(a);
}
else
{
@@ -456,7 +456,7 @@ void am29000_cpu_device::MULU()
c = 0;
}
- v = ((((UINT64)r << 32) | m_q) >> 1) | ((UINT64)c << 63);
+ v = ((((uint64_t)r << 32) | m_q) >> 1) | ((uint64_t)c << 63);
m_q = v & 0xffffffff;
m_r[RC] = v >> 32;
@@ -478,8 +478,8 @@ void am29000_cpu_device::DIVIDU()
void am29000_cpu_device::DIV0()
{
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT64 v;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint64_t v;
if (!FREEZE_MODE)
{
@@ -487,7 +487,7 @@ void am29000_cpu_device::DIV0()
SET_ALU_N(b);
}
- v = (((UINT64)b << 32) | m_q) << 1;
+ v = (((uint64_t)b << 32) | m_q) << 1;
m_q = v & 0xffffffff;
@@ -496,22 +496,22 @@ void am29000_cpu_device::DIV0()
void am29000_cpu_device::DIV()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 c;
- UINT32 r;
- UINT64 r64;
- UINT32 df;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t c;
+ uint32_t r;
+ uint64_t r64;
+ uint32_t df;
if (m_alu & ALU_DF)
{
r = a - b;
- c = !((UINT32)(a) < (UINT32)(b));
+ c = !((uint32_t)(a) < (uint32_t)(b));
}
else
{
r = a + b;
- c = (UINT32)(r) < (UINT32)(a);
+ c = (uint32_t)(r) < (uint32_t)(a);
}
@@ -524,7 +524,7 @@ void am29000_cpu_device::DIV()
SET_ALU_N(r);
}
- r64 = ((((UINT64)r << 32) | m_q) << 1) | df;
+ r64 = ((((uint64_t)r << 32) | m_q) << 1) | df;
m_q = r64 & 0xffffffff;
m_r[RC] = r64 >> 32;
@@ -532,21 +532,21 @@ void am29000_cpu_device::DIV()
void am29000_cpu_device::DIVL()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 c;
- UINT32 r;
- UINT32 df;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t c;
+ uint32_t r;
+ uint32_t df;
if (m_alu & ALU_DF)
{
r = a - b;
- c = !((UINT32)(a) < (UINT32)(b));
+ c = !((uint32_t)(a) < (uint32_t)(b));
}
else
{
r = a + b;
- c = (UINT32)(r) < (UINT32)(a);
+ c = (uint32_t)(r) < (uint32_t)(a);
}
df = (~(c ^ (m_alu >> ALU_DF_SHIFT) ^ (m_alu >> ALU_N_SHIFT)) & 1);
@@ -564,8 +564,8 @@ void am29000_cpu_device::DIVL()
void am29000_cpu_device::DIVREM()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
if (m_alu & ALU_DF)
m_r[RC] = a;
@@ -580,99 +580,99 @@ void am29000_cpu_device::DIVREM()
void am29000_cpu_device::CPEQ()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = a == b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = a == b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPNEQ()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = a != b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = a != b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPLT()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = (INT32)a < (INT32)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = (int32_t)a < (int32_t)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPLTU()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = (UINT32)a < (UINT32)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = (uint32_t)a < (uint32_t)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPLE()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = (INT32)a <= (INT32)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = (int32_t)a <= (int32_t)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPLEU()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = (UINT32)a <= (UINT32)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = (uint32_t)a <= (uint32_t)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPGT()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = (INT32)a > (INT32)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = (int32_t)a > (int32_t)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPGTU()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = (UINT32)a > (UINT32)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = (uint32_t)a > (uint32_t)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPGE()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = (INT32)a >= (INT32)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = (int32_t)a >= (int32_t)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPGEU()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = (UINT32)a >= (UINT32)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = (uint32_t)a >= (uint32_t)b ? BOOLEAN_TRUE : BOOLEAN_FALSE;
m_r[RC] = r;
}
void am29000_cpu_device::CPBYTE()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8 : GET_RB_VAL;
- UINT32 r =
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8 : GET_RB_VAL;
+ uint32_t r =
((a & 0xff000000) == (b & 0xff000000)) ||
((a & 0x00ff0000) == (b & 0x00ff0000)) ||
((a & 0x0000ff00) == (b & 0x0000ff00)) ||
@@ -702,7 +702,7 @@ void am29000_cpu_device::ASLT()
{
if (USER_MODE && INST_VN < 64)
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
- else if (!((INT32)GET_RA_VAL < (INT32)GET_RB_VAL))
+ else if (!((int32_t)GET_RA_VAL < (int32_t)GET_RB_VAL))
SIGNAL_EXCEPTION(INST_VN);
}
@@ -710,7 +710,7 @@ void am29000_cpu_device::ASLTU()
{
if (USER_MODE && INST_VN < 64)
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
- else if (!((UINT32)GET_RA_VAL < (UINT32)GET_RB_VAL))
+ else if (!((uint32_t)GET_RA_VAL < (uint32_t)GET_RB_VAL))
SIGNAL_EXCEPTION(INST_VN);
}
@@ -718,7 +718,7 @@ void am29000_cpu_device::ASLE()
{
if (USER_MODE && INST_VN < 64)
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
- else if (!((INT32)GET_RA_VAL <= (INT32)GET_RB_VAL))
+ else if (!((int32_t)GET_RA_VAL <= (int32_t)GET_RB_VAL))
SIGNAL_EXCEPTION(INST_VN);
}
@@ -726,7 +726,7 @@ void am29000_cpu_device::ASLEU()
{
if (USER_MODE && INST_VN < 64)
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
- else if (!((UINT32)GET_RA_VAL <= (UINT32)GET_RB_VAL))
+ else if (!((uint32_t)GET_RA_VAL <= (uint32_t)GET_RB_VAL))
SIGNAL_EXCEPTION(INST_VN);
}
@@ -734,7 +734,7 @@ void am29000_cpu_device::ASGT()
{
if (USER_MODE && INST_VN < 64)
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
- else if (!((INT32)GET_RA_VAL > (INT32)GET_RB_VAL))
+ else if (!((int32_t)GET_RA_VAL > (int32_t)GET_RB_VAL))
SIGNAL_EXCEPTION(INST_VN);
}
@@ -742,7 +742,7 @@ void am29000_cpu_device::ASGTU()
{
if (USER_MODE && INST_VN < 64)
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
- else if (!((UINT32)GET_RA_VAL > (UINT32)GET_RB_VAL))
+ else if (!((uint32_t)GET_RA_VAL > (uint32_t)GET_RB_VAL))
SIGNAL_EXCEPTION(INST_VN);
}
@@ -750,7 +750,7 @@ void am29000_cpu_device::ASGE()
{
if (USER_MODE && INST_VN < 64)
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
- else if (!((INT32)GET_RA_VAL >= (INT32)GET_RB_VAL))
+ else if (!((int32_t)GET_RA_VAL >= (int32_t)GET_RB_VAL))
SIGNAL_EXCEPTION(INST_VN);
}
@@ -758,7 +758,7 @@ void am29000_cpu_device::ASGEU()
{
if (USER_MODE && INST_VN < 64)
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
- else if (!((UINT32)GET_RA_VAL >= (UINT32)GET_RB_VAL))
+ else if (!((uint32_t)GET_RA_VAL >= (uint32_t)GET_RB_VAL))
SIGNAL_EXCEPTION(INST_VN);
}
@@ -769,9 +769,9 @@ void am29000_cpu_device::ASGEU()
void am29000_cpu_device::AND()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = a & b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = a & b;
if (!FREEZE_MODE)
{
@@ -784,9 +784,9 @@ void am29000_cpu_device::AND()
void am29000_cpu_device::ANDN()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = a & ~b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = a & ~b;
if (!FREEZE_MODE)
{
@@ -799,9 +799,9 @@ void am29000_cpu_device::ANDN()
void am29000_cpu_device::NAND()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = ~(a & b);
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = ~(a & b);
if (!FREEZE_MODE)
{
@@ -814,9 +814,9 @@ void am29000_cpu_device::NAND()
void am29000_cpu_device::OR()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = a | b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = a | b;
if (!FREEZE_MODE)
{
@@ -829,9 +829,9 @@ void am29000_cpu_device::OR()
void am29000_cpu_device::NOR()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = ~(a | b);
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = ~(a | b);
if (!FREEZE_MODE)
{
@@ -844,9 +844,9 @@ void am29000_cpu_device::NOR()
void am29000_cpu_device::XOR()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = a ^ b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = a ^ b;
if (!FREEZE_MODE)
{
@@ -859,9 +859,9 @@ void am29000_cpu_device::XOR()
void am29000_cpu_device::XNOR()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r = ~(a ^ b);
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r = ~(a ^ b);
if (!FREEZE_MODE)
{
@@ -879,38 +879,38 @@ void am29000_cpu_device::XNOR()
void am29000_cpu_device::SLL()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = (INST_M_BIT ? I8: GET_RB_VAL) & 0x1f;
- UINT32 r = a << b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = (INST_M_BIT ? I8: GET_RB_VAL) & 0x1f;
+ uint32_t r = a << b;
m_r[RC] = r;
}
void am29000_cpu_device::SRL()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = (INST_M_BIT ? I8: GET_RB_VAL) & 0x1f;
- UINT32 r = a >> b;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = (INST_M_BIT ? I8: GET_RB_VAL) & 0x1f;
+ uint32_t r = a >> b;
m_r[RC] = r;
}
void am29000_cpu_device::SRA()
{
- INT32 a = GET_RA_VAL;
- UINT32 b = (INST_M_BIT ? I8: GET_RB_VAL) & 0x1f;
- UINT32 r = a >> b;
+ int32_t a = GET_RA_VAL;
+ uint32_t b = (INST_M_BIT ? I8: GET_RB_VAL) & 0x1f;
+ uint32_t r = a >> b;
m_r[RC] = r;
}
void am29000_cpu_device::EXTRACT()
{
- INT32 a = GET_RA_VAL;
- UINT32 b = (INST_M_BIT ? I8: GET_RB_VAL);
- UINT64 r;
+ int32_t a = GET_RA_VAL;
+ uint32_t b = (INST_M_BIT ? I8: GET_RB_VAL);
+ uint64_t r;
- r = (((UINT64)a << 32) | b) << GET_ALU_FC;
+ r = (((uint64_t)a << 32) | b) << GET_ALU_FC;
m_r[RC] = r >> 32;
}
@@ -922,8 +922,8 @@ void am29000_cpu_device::EXTRACT()
void am29000_cpu_device::LOAD()
{
- UINT32 addr = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r;
+ uint32_t addr = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t r;
if (INST_UA_BIT)
fatalerror("Am29000: UA bit set on LOAD\n");
@@ -986,14 +986,14 @@ void am29000_cpu_device::LOADSET()
void am29000_cpu_device::LOADM()
{
- UINT32 addr = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t addr = INST_M_BIT ? I8: GET_RB_VAL;
if (INST_UA_BIT)
{
fatalerror("Am29000: UA bit set on LOAD\n");
}
- UINT32 r;
+ uint32_t r;
if (INST_CE_BIT)
{
logerror("Am29000: Attempting a co-processor LOAD!\n");
@@ -1033,7 +1033,7 @@ void am29000_cpu_device::LOADM()
r = RA;
- for (INT32 cnt = 0; cnt <= GET_CHC_CR; ++cnt)
+ for (int32_t cnt = 0; cnt <= GET_CHC_CR; ++cnt)
{
m_r[r] = m_data->read_dword(addr);
@@ -1049,7 +1049,7 @@ void am29000_cpu_device::LOADM()
void am29000_cpu_device::STORE()
{
- UINT32 addr = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t addr = INST_M_BIT ? I8: GET_RB_VAL;
if (INST_UA_BIT)
{
@@ -1102,14 +1102,14 @@ void am29000_cpu_device::STOREL()
void am29000_cpu_device::STOREM()
{
- UINT32 addr = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t addr = INST_M_BIT ? I8: GET_RB_VAL;
if (INST_UA_BIT)
{
fatalerror("Am29000: UA bit set on LOAD\n");
}
- UINT32 r;
+ uint32_t r;
if (INST_CE_BIT)
{
logerror("Am29000: Attempting a co-processor LOAD!\n");
@@ -1146,7 +1146,7 @@ void am29000_cpu_device::STOREM()
r = RA;
- for (INT32 cnt = 0; cnt <= GET_CHC_CR; ++cnt)
+ for (int32_t cnt = 0; cnt <= GET_CHC_CR; ++cnt)
{
m_data->write_dword(addr, m_r[r]);
@@ -1161,11 +1161,11 @@ void am29000_cpu_device::STOREM()
void am29000_cpu_device::EXBYTE()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 bp = GET_ALU_BP;
- UINT8 srcbyte;
- UINT32 r;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t bp = GET_ALU_BP;
+ uint8_t srcbyte;
+ uint32_t r;
if (m_cfg & CFG_BO)
srcbyte = a >> 8 * bp;
@@ -1179,11 +1179,11 @@ void am29000_cpu_device::EXBYTE()
void am29000_cpu_device::EXHW()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 wp = ((m_alu >> ALU_BP_SHIFT) & ALU_BP_MASK) >> 1;
- UINT16 srcword;
- UINT32 r;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t wp = ((m_alu >> ALU_BP_SHIFT) & ALU_BP_MASK) >> 1;
+ uint16_t srcword;
+ uint32_t r;
if (m_cfg & CFG_BO)
srcword = a >> 16 * wp;
@@ -1197,28 +1197,28 @@ void am29000_cpu_device::EXHW()
void am29000_cpu_device::EXHWS()
{
- UINT32 a = GET_RA_VAL;
- UINT32 wp = ((m_alu >> ALU_BP_SHIFT) & ALU_BP_MASK) >> 1;
- UINT16 srcword;
- UINT32 r;
+ uint32_t a = GET_RA_VAL;
+ uint32_t wp = ((m_alu >> ALU_BP_SHIFT) & ALU_BP_MASK) >> 1;
+ uint16_t srcword;
+ uint32_t r;
if (m_cfg & CFG_BO)
srcword = a >> 16 * wp;
else
srcword = a >> (16 * (1 - wp));
- r = (INT32)(INT16)srcword;
+ r = (int32_t)(int16_t)srcword;
m_r[RC] = r;
}
void am29000_cpu_device::INBYTE()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 bp = GET_ALU_BP;
- UINT8 shift = (m_cfg & CFG_BO) ? 8 * bp : (8 * (3 - bp));
- UINT32 r;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t bp = GET_ALU_BP;
+ uint8_t shift = (m_cfg & CFG_BO) ? 8 * bp : (8 * (3 - bp));
+ uint32_t r;
r = (a & ~(0xff << shift)) | ((b & 0xff) << shift);
@@ -1227,11 +1227,11 @@ void am29000_cpu_device::INBYTE()
void am29000_cpu_device::INHW()
{
- UINT32 a = GET_RA_VAL;
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 wp = ((m_alu >> ALU_BP_SHIFT) & ALU_BP_MASK) >> 1;
- UINT32 shift = (m_cfg & CFG_BO) ? 16 * wp : (16 * (1 - wp));
- UINT32 r;
+ uint32_t a = GET_RA_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t wp = ((m_alu >> ALU_BP_SHIFT) & ALU_BP_MASK) >> 1;
+ uint32_t shift = (m_cfg & CFG_BO) ? 16 * wp : (16 * (1 - wp));
+ uint32_t r;
r = (a & ~(0xffff << shift)) | ((b & 0xffff) << shift);
@@ -1290,7 +1290,7 @@ void am29000_cpu_device::CONSTN()
void am29000_cpu_device::CALL()
{
- UINT32 ret = m_next_pc;
+ uint32_t ret = m_next_pc;
if (INST_M_BIT)
m_next_pc = JMP_ZEX;
@@ -1303,7 +1303,7 @@ m_next_pl_flags |= PFLAG_JUMP;
void am29000_cpu_device::CALLI()
{
- UINT32 ret = m_next_pc;
+ uint32_t ret = m_next_pc;
m_next_pc = GET_RB_VAL;
m_r[RA] = ret;
m_next_pl_flags |= PFLAG_JUMP;
@@ -1372,7 +1372,7 @@ void am29000_cpu_device::JMPFI()
void am29000_cpu_device::JMPFDEC()
{
- UINT32 a = GET_RA_VAL;
+ uint32_t a = GET_RA_VAL;
if ((a & BOOLEAN_MASK) == BOOLEAN_FALSE)
{
@@ -1394,7 +1394,7 @@ void am29000_cpu_device::JMPFDEC()
void am29000_cpu_device::CLZ()
{
- UINT32 b = INST_M_BIT ? I8: GET_RB_VAL;
+ uint32_t b = INST_M_BIT ? I8: GET_RB_VAL;
m_r[RC] = count_leading_zeros(b);
}
diff --git a/src/devices/cpu/amis2000/amis2000.cpp b/src/devices/cpu/amis2000/amis2000.cpp
index 1deb6967864..6409a8b1917 100644
--- a/src/devices/cpu/amis2000/amis2000.cpp
+++ b/src/devices/cpu/amis2000/amis2000.cpp
@@ -55,15 +55,15 @@ ADDRESS_MAP_END
// device definitions
-amis2000_cpu_device::amis2000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+amis2000_cpu_device::amis2000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: amis2000_base_device(mconfig, AMI_S2000, "AMI S2000", tag, owner, clock, 2, 10, 3, 13, ADDRESS_MAP_NAME(program_1k), 6, ADDRESS_MAP_NAME(data_64x4), "amis2000", __FILE__)
{ }
-amis2150_cpu_device::amis2150_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+amis2150_cpu_device::amis2150_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: amis2000_base_device(mconfig, AMI_S2150, "AMI S2150", tag, owner, clock, 3, 11, 3, 13, ADDRESS_MAP_NAME(program_1_5k), 7, ADDRESS_MAP_NAME(data_80x4), "amis2150", __FILE__)
{ }
-amis2152_cpu_device::amis2152_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+amis2152_cpu_device::amis2152_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: amis2000_base_device(mconfig, AMI_S2152, "AMI S2152", tag, owner, clock, 3, 11, 3, 13, ADDRESS_MAP_NAME(program_1_5k), 7, ADDRESS_MAP_NAME(data_80x4), "amis2152", __FILE__)
{ }
@@ -89,7 +89,7 @@ void amis2000_base_device::state_string_export(const device_state_entry &entry,
}
}
-offs_t amis2000_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t amis2000_base_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(amis2000);
return CPU_DISASSEMBLE_NAME(amis2000)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/amis2000/amis2000.h b/src/devices/cpu/amis2000/amis2000.h
index 5beee90fae9..0e46c7d0dd7 100644
--- a/src/devices/cpu/amis2000/amis2000.h
+++ b/src/devices/cpu/amis2000/amis2000.h
@@ -44,7 +44,7 @@ class amis2000_base_device : public cpu_device
{
public:
// construction/destruction
- amis2000_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 bu_bits, UINT8 callstack_bits, UINT8 callstack_depth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+ amis2000_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t bu_bits, uint8_t callstack_bits, uint8_t callstack_depth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 8, prgwidth, 0, program)
, m_data_config("data", ENDIANNESS_BIG, 8, datawidth, 0, data)
@@ -67,7 +67,7 @@ public:
template<class _Object> static devcb_base &set_write_d_callback(device_t &device, _Object object) { return downcast<amis2000_base_device &>(device).m_write_d.set_callback(object); }
template<class _Object> static devcb_base &set_write_a_callback(device_t &device, _Object object) { return downcast<amis2000_base_device &>(device).m_write_a.set_callback(object); }
template<class _Object> static devcb_base &set_write_f_callback(device_t &device, _Object object) { return downcast<amis2000_base_device &>(device).m_write_f.set_callback(object); }
- static void set_7seg_table(device_t &device, const UINT8 *ptr) { downcast<amis2000_base_device &>(device).m_7seg_table = ptr; }
+ static void set_7seg_table(device_t &device, const uint8_t *ptr) { downcast<amis2000_base_device &>(device).m_7seg_table = ptr; }
protected:
// device-level overrides
@@ -75,20 +75,20 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); } // "
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); } // "
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : nullptr); }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 1; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 1; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
address_space_config m_program_config;
@@ -96,33 +96,33 @@ protected:
address_space *m_program;
address_space *m_data;
- UINT8 m_bu_bits;
- UINT16 m_bu_mask;
- UINT8 m_callstack_bits; // number of program counter bits held in callstack
- UINT16 m_callstack_mask;
- UINT8 m_callstack_depth; // callstack levels: 3 on 2000/2150, 5 on 2200/2400
- UINT16 m_callstack[5]; // max 5
+ uint8_t m_bu_bits;
+ uint16_t m_bu_mask;
+ uint8_t m_callstack_bits; // number of program counter bits held in callstack
+ uint16_t m_callstack_mask;
+ uint8_t m_callstack_depth; // callstack levels: 3 on 2000/2150, 5 on 2200/2400
+ uint16_t m_callstack[5]; // max 5
int m_icount;
- UINT16 m_pc; // 13-bit program counter
- UINT8 m_ppr; // prepared page register (PP 1)
- UINT8 m_pbr; // prepared bank register (PP 2)
+ uint16_t m_pc; // 13-bit program counter
+ uint8_t m_ppr; // prepared page register (PP 1)
+ uint8_t m_pbr; // prepared bank register (PP 2)
bool m_skip; // skip next opcode, including PP prefixes
- UINT8 m_op;
- UINT8 m_prev_op; // previous opcode, needed for PP, LAI, LB*
- UINT8 m_f; // generic flags: 2 on 2000/2150, 6 on 2200/2400
- UINT8 m_carry; // carry flag
- UINT8 m_bl; // 4-bit ram index x
- UINT8 m_bu; // 2/3-bit ram index y
- UINT8 m_acc; // 4-bit accumulator
- UINT8 m_e; // 4-bit generic register
- UINT8 m_ki_mask; // 4-bit k/i-pins select latch
- UINT8 m_d; // 8-bit d-pins latch
+ uint8_t m_op;
+ uint8_t m_prev_op; // previous opcode, needed for PP, LAI, LB*
+ uint8_t m_f; // generic flags: 2 on 2000/2150, 6 on 2200/2400
+ uint8_t m_carry; // carry flag
+ uint8_t m_bl; // 4-bit ram index x
+ uint8_t m_bu; // 2/3-bit ram index y
+ uint8_t m_acc; // 4-bit accumulator
+ uint8_t m_e; // 4-bit generic register
+ uint8_t m_ki_mask; // 4-bit k/i-pins select latch
+ uint8_t m_d; // 8-bit d-pins latch
bool m_d_active; // d-pins available for direct i/o(floating), or outputting d-latch
- UINT8 m_d_polarity; // invert d-latch output
- UINT16 m_a; // 13-bit a-pins latch (master strobe latch)
+ uint8_t m_d_polarity; // invert d-latch output
+ uint16_t m_a; // 13-bit a-pins latch (master strobe latch)
// i/o handlers
- const UINT8 *m_7seg_table;
+ const uint8_t *m_7seg_table;
devcb_read8 m_read_k;
devcb_read8 m_read_i;
devcb_read8 m_read_d;
@@ -131,8 +131,8 @@ protected:
devcb_write_line m_write_f;
// misc internal helpers
- UINT8 ram_r();
- void ram_w(UINT8 data);
+ uint8_t ram_r();
+ void ram_w(uint8_t data);
void pop_callstack();
void push_callstack();
void d_latch_out(bool active);
@@ -201,21 +201,21 @@ protected:
class amis2000_cpu_device : public amis2000_base_device
{
public:
- amis2000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ amis2000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class amis2150_cpu_device : public amis2000_base_device
{
public:
- amis2150_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ amis2150_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class amis2152_cpu_device : public amis2000_base_device
{
public:
- amis2152_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ amis2152_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -223,7 +223,7 @@ protected:
virtual void device_reset() override;
// digital-to-frequency converter
- UINT8 m_d2f_latch;
+ uint8_t m_d2f_latch;
emu_timer *m_d2f_timer;
int m_fout_state;
diff --git a/src/devices/cpu/amis2000/amis2000d.cpp b/src/devices/cpu/amis2000/amis2000d.cpp
index 27077170402..f820fcec79a 100644
--- a/src/devices/cpu/amis2000/amis2000d.cpp
+++ b/src/devices/cpu/amis2000/amis2000d.cpp
@@ -32,7 +32,7 @@ static const char *const s_mnemonics[] =
};
// number of bits per opcode parameter, negative indicates complement
-static const INT8 s_bits[] =
+static const int8_t s_bits[] =
{
0, 0, 4, 2, 2, 2, 2, 0, 0, 0,
-2, -2, -2, -2, 2, 2,
@@ -45,7 +45,7 @@ static const INT8 s_bits[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] =
+static const uint32_t s_flags[] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0,
@@ -56,7 +56,7 @@ static const UINT32 s_flags[] =
};
-static const UINT8 s2000_mnemonic[0x100] =
+static const uint8_t s2000_mnemonic[0x100] =
{
/* 0x00 */
mNOP, mHALT, mRT, mRTS, mPSH, mPSL, mAND, mSOS,
@@ -103,8 +103,8 @@ static const UINT8 s2000_mnemonic[0x100] =
CPU_DISASSEMBLE( amis2000 )
{
int pos = 0;
- UINT8 op = oprom[pos++];
- UINT8 instr = s2000_mnemonic[op];
+ uint8_t op = oprom[pos++];
+ uint8_t instr = s2000_mnemonic[op];
char *dst = buffer;
dst += sprintf(dst, "%-5s ", s_mnemonics[instr]);
@@ -118,7 +118,7 @@ CPU_DISASSEMBLE( amis2000 )
if (mask != 0)
{
- UINT8 param = op;
+ uint8_t param = op;
if (complement)
param = ~param;
param &= mask;
diff --git a/src/devices/cpu/amis2000/amis2000op.cpp b/src/devices/cpu/amis2000/amis2000op.cpp
index 3a172590bf3..2962f5327cc 100644
--- a/src/devices/cpu/amis2000/amis2000op.cpp
+++ b/src/devices/cpu/amis2000/amis2000op.cpp
@@ -8,15 +8,15 @@
// internal helpers
-inline UINT8 amis2000_base_device::ram_r()
+inline uint8_t amis2000_base_device::ram_r()
{
- UINT16 address = m_bu << 4 | m_bl;
+ uint16_t address = m_bu << 4 | m_bl;
return m_data->read_byte(address) & 0xf;
}
-inline void amis2000_base_device::ram_w(UINT8 data)
+inline void amis2000_base_device::ram_w(uint8_t data)
{
- UINT16 address = m_bu << 4 | m_bl;
+ uint16_t address = m_bu << 4 | m_bl;
m_data->write_byte(address, data & 0xf);
}
@@ -49,7 +49,7 @@ void amis2000_base_device::op_lai()
// note: only execute the first one in a sequence of LAI
if ((m_prev_op & 0xf0) != (m_op & 0xf0))
{
- UINT8 param = m_op & 0x0f;
+ uint8_t param = m_op & 0x0f;
m_acc = param;
m_ki_mask = param;
}
@@ -70,7 +70,7 @@ void amis2000_base_device::op_lae()
void amis2000_base_device::op_xab()
{
// XAB: exchange ACC with BL
- UINT8 old_acc = m_acc;
+ uint8_t old_acc = m_acc;
m_acc = m_bl;
m_bl = old_acc;
}
@@ -78,7 +78,7 @@ void amis2000_base_device::op_xab()
void amis2000_base_device::op_xabu()
{
// XABU: exchange ACC with BU
- UINT8 old_acc = m_acc;
+ uint8_t old_acc = m_acc;
m_acc = (m_acc & ~m_bu_mask) | (m_bu & m_bu_mask);
m_bu = old_acc & m_bu_mask;
}
@@ -86,7 +86,7 @@ void amis2000_base_device::op_xabu()
void amis2000_base_device::op_xae()
{
// XAE: exchange ACC with E
- UINT8 old_acc = m_acc;
+ uint8_t old_acc = m_acc;
m_acc = m_e;
m_e = old_acc;
}
@@ -97,7 +97,7 @@ void amis2000_base_device::op_lbe()
// note: only execute the first one in a sequence of LB*
if ((m_prev_op & 0xf0) != (m_op & 0xf0))
{
- UINT8 param = m_op & 0x03;
+ uint8_t param = m_op & 0x03;
m_bu = param & m_bu_mask;
m_bl = m_e;
}
@@ -109,7 +109,7 @@ void amis2000_base_device::op_lbep()
// note: only execute the first one in a sequence of LB*
if ((m_prev_op & 0xf0) != (m_op & 0xf0))
{
- UINT8 param = m_op & 0x03;
+ uint8_t param = m_op & 0x03;
m_bu = param & m_bu_mask;
m_bl = (m_e + 1) & 0xf;
}
@@ -121,7 +121,7 @@ void amis2000_base_device::op_lbz()
// note: only execute the first one in a sequence of LB*
if ((m_prev_op & 0xf0) != (m_op & 0xf0))
{
- UINT8 param = m_op & 0x03;
+ uint8_t param = m_op & 0x03;
m_bu = param & m_bu_mask;
m_bl = 0;
}
@@ -133,7 +133,7 @@ void amis2000_base_device::op_lbf()
// note: only execute the first one in a sequence of LB*
if ((m_prev_op & 0xf0) != (m_op & 0xf0))
{
- UINT8 param = m_op & 0x03;
+ uint8_t param = m_op & 0x03;
m_bu = param & m_bu_mask;
m_bl = 0xf;
}
@@ -146,17 +146,17 @@ void amis2000_base_device::op_lam()
{
// LAM _Y: load ACC with RAM, xor BU with _Y
m_acc = ram_r();
- UINT8 param = ~m_op & 0x03;
+ uint8_t param = ~m_op & 0x03;
m_bu ^= (param & m_bu_mask);
}
void amis2000_base_device::op_xc()
{
// XC _Y: exchange ACC with RAM, xor BU with _Y
- UINT8 old_acc = m_acc;
+ uint8_t old_acc = m_acc;
m_acc = ram_r();
ram_w(old_acc);
- UINT8 param = ~m_op & 0x03;
+ uint8_t param = ~m_op & 0x03;
m_bu ^= (param & m_bu_mask);
}
@@ -179,14 +179,14 @@ void amis2000_base_device::op_xcd()
void amis2000_base_device::op_stm()
{
// STM Z: set RAM bit Z
- UINT8 param = 1 << (m_op & 0x03);
+ uint8_t param = 1 << (m_op & 0x03);
ram_w(ram_r() | param);
}
void amis2000_base_device::op_rsm()
{
// RSM Z: reset RAM bit Z
- UINT8 param = 1 << (m_op & 0x03);
+ uint8_t param = 1 << (m_op & 0x03);
ram_w(ram_r() & ~param);
}
@@ -196,7 +196,7 @@ void amis2000_base_device::op_rsm()
void amis2000_base_device::op_inp()
{
// INP: input D-pins to ACC and RAM
- UINT8 in = m_d_active ? m_d : m_read_d(0, 0xff);
+ uint8_t in = m_d_active ? m_d : m_read_d(0, 0xff);
m_acc = in & 0xf;
ram_w(in >> 4 & 0xf);
}
@@ -217,12 +217,12 @@ void amis2000_base_device::op_disb()
void amis2000_base_device::op_disn()
{
// DISN: set D-latch to ACC+carry via on-die segment decoder
- static const UINT8 lut_segment_decoder[0x10] =
+ static const uint8_t lut_segment_decoder[0x10] =
{
// 0-F digits in bit order [DP]abcdefg
0x7e, 0x30, 0x6d, 0x79, 0x33, 0x5b, 0x5f, 0x70, 0x7f, 0x7b, 0x77, 0x1f, 0x4e, 0x3d, 0x4f, 0x47
};
- const UINT8 *ptr = (m_7seg_table != nullptr) ? m_7seg_table : lut_segment_decoder;
+ const uint8_t *ptr = (m_7seg_table != nullptr) ? m_7seg_table : lut_segment_decoder;
m_d = ptr[m_acc] | (m_carry ? 0x80 : 0x00);
d_latch_out(true);
}
@@ -301,7 +301,7 @@ void amis2000_base_device::op_eur()
void amis2000_base_device::op_pp()
{
// PP _X: prepare page/bank with _X
- UINT8 param = ~m_op & 0x0f;
+ uint8_t param = ~m_op & 0x0f;
if ((m_prev_op & 0xf0) != (m_op & 0xf0))
m_ppr = param;
else
@@ -311,8 +311,8 @@ void amis2000_base_device::op_pp()
void amis2000_base_device::op_jmp()
{
// JMP X: jump to X(+PP)
- UINT16 mask = 0x3f;
- UINT16 param = m_op & mask;
+ uint16_t mask = 0x3f;
+ uint16_t param = m_op & mask;
// if previous opcode was PP, change PC high bits too
if ((m_prev_op & 0xf0) == 0x60)
@@ -371,7 +371,7 @@ void amis2000_base_device::op_szc()
void amis2000_base_device::op_szm()
{
// SZM Z: skip next on zero RAM bit Z
- UINT8 param = 1 << (m_op & 0x03);
+ uint8_t param = 1 << (m_op & 0x03);
m_skip = !(ram_r() & param);
}
@@ -432,7 +432,7 @@ void amis2000_base_device::op_adcs()
void amis2000_base_device::op_adis()
{
// ADIS X: add X to ACC, skip next on not carry
- UINT8 param = m_op & 0x0f;
+ uint8_t param = m_op & 0x0f;
m_acc += param;
m_skip = !(m_acc & 0x10);
m_acc &= 0xf;
diff --git a/src/devices/cpu/apexc/apexc.cpp b/src/devices/cpu/apexc/apexc.cpp
index 5d367d33667..3b490b2339d 100644
--- a/src/devices/cpu/apexc/apexc.cpp
+++ b/src/devices/cpu/apexc/apexc.cpp
@@ -337,7 +337,7 @@ const device_type APEXC = &device_creator<apexc_cpu_device>;
#define DELAY(n) {m_icount -= (n); m_current_word = (m_current_word + (n)) & 0x1f;}
-apexc_cpu_device::apexc_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+apexc_cpu_device::apexc_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, APEXC, "APEXC", tag, owner, clock, "apexc_cpu", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 15, 0)
, m_io_config("io", ENDIANNESS_BIG, 8, 1, 0)
@@ -369,7 +369,7 @@ apexc_cpu_device::apexc_cpu_device(const machine_config &mconfig, const char *ta
/* compute complete word address (i.e. translate a logical track address (expressed
in current working store) to an absolute track address) */
-UINT32 apexc_cpu_device::effective_address(UINT32 address)
+uint32_t apexc_cpu_device::effective_address(uint32_t address)
{
if (address & 0x200)
{
@@ -380,9 +380,9 @@ UINT32 apexc_cpu_device::effective_address(UINT32 address)
}
/* read word */
-UINT32 apexc_cpu_device::word_read(UINT32 address, UINT32 special)
+uint32_t apexc_cpu_device::word_read(uint32_t address, uint32_t special)
{
- UINT32 result;
+ uint32_t result;
/* compute absolute track address */
address = effective_address(address);
@@ -408,7 +408,7 @@ UINT32 apexc_cpu_device::word_read(UINT32 address, UINT32 special)
}
/* write word (or part of a word, according to mask) */
-void apexc_cpu_device::word_write(UINT32 address, UINT32 data, UINT32 mask)
+void apexc_cpu_device::word_write(uint32_t address, uint32_t data, uint32_t mask)
{
/* compute absolute track address */
address = effective_address(address);
@@ -430,12 +430,12 @@ void apexc_cpu_device::word_write(UINT32 address, UINT32 data, UINT32 mask)
no address is used, these functions just punch or read 5 bits
*/
-UINT8 apexc_cpu_device::papertape_read()
+uint8_t apexc_cpu_device::papertape_read()
{
return m_io->read_byte(0) & 0x1f;
}
-void apexc_cpu_device::papertape_punch(UINT8 data)
+void apexc_cpu_device::papertape_punch(uint8_t data)
{
m_io->write_byte(0, data);
}
@@ -447,7 +447,7 @@ void apexc_cpu_device::papertape_punch(UINT8 data)
/*
set the memory location (i.e. address) register, and compute the associated delay
*/
-UINT32 apexc_cpu_device::load_ml(UINT32 address, UINT32 vector)
+uint32_t apexc_cpu_device::load_ml(uint32_t address, uint32_t vector)
{
int delay;
@@ -599,7 +599,7 @@ void apexc_cpu_device::execute()
m_r >>= 1;
if (m_a & 1)
m_r |= 0x80000000UL;
- m_a = ((INT32) m_a) >> 1;
+ m_a = ((int32_t) m_a) >> 1;
c6 = (c6+1) & 0x3f;
}
@@ -648,7 +648,7 @@ void apexc_cpu_device::execute()
m_r >>= 1;
if (m_a & 1)
m_r |= 0x80000000UL;
- m_a = ((INT32) m_a) >> 1;
+ m_a = ((int32_t) m_a) >> 1;
}
}
@@ -687,7 +687,7 @@ void apexc_cpu_device::execute()
/* R_(1-n)(x) & R_(n-32)(x) */
{
- UINT32 mask;
+ uint32_t mask;
if (c6 & 0x20)
mask = 0xFFFFFFFFUL << (64 - c6);
@@ -706,7 +706,7 @@ void apexc_cpu_device::execute()
/* A_(1-n)(x) & A_(n-32)(x) */
{
- UINT32 mask;
+ uint32_t mask;
if (c6 & 0x20)
mask = 0xFFFFFFFFUL << (64 - c6);
@@ -860,7 +860,7 @@ void apexc_cpu_device::execute_run()
}
-offs_t apexc_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t apexc_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( apexc );
return CPU_DISASSEMBLE_NAME(apexc)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/apexc/apexc.h b/src/devices/cpu/apexc/apexc.h
index e5634c3dcb1..9f84e6f073e 100644
--- a/src/devices/cpu/apexc/apexc.h
+++ b/src/devices/cpu/apexc/apexc.h
@@ -25,7 +25,7 @@ class apexc_cpu_device : public cpu_device
{
public:
// construction/destruction
- apexc_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ apexc_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -33,9 +33,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 2; }
- virtual UINT32 execute_max_cycles() const override { return 75; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 75; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -47,44 +47,44 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- inline UINT32 apexc_readmem(UINT32 address) { return m_program->read_dword((address)<<2); }
- inline void apexc_writemem(UINT32 address, UINT32 data) { m_program->write_dword((address)<<2, (data)); }
- inline void apexc_writemem_masked(UINT32 address, UINT32 data, UINT32 mask) { apexc_writemem((address), (apexc_readmem(address) & ~(mask)) | ((data) & (mask))); }
+ inline uint32_t apexc_readmem(uint32_t address) { return m_program->read_dword((address)<<2); }
+ inline void apexc_writemem(uint32_t address, uint32_t data) { m_program->write_dword((address)<<2, (data)); }
+ inline void apexc_writemem_masked(uint32_t address, uint32_t data, uint32_t mask) { apexc_writemem((address), (apexc_readmem(address) & ~(mask)) | ((data) & (mask))); }
- UINT32 effective_address(UINT32 address);
- UINT32 word_read(UINT32 address, UINT32 special);
- void word_write(UINT32 address, UINT32 data, UINT32 mask);
- UINT8 papertape_read();
- void papertape_punch(UINT8 data);
+ uint32_t effective_address(uint32_t address);
+ uint32_t word_read(uint32_t address, uint32_t special);
+ void word_write(uint32_t address, uint32_t data, uint32_t mask);
+ uint8_t papertape_read();
+ void papertape_punch(uint8_t data);
- UINT32 load_ml(UINT32 address, UINT32 vector);
+ uint32_t load_ml(uint32_t address, uint32_t vector);
void execute();
address_space_config m_program_config;
address_space_config m_io_config;
- UINT32 m_a; /* accumulator */
- UINT32 m_r; /* register */
- UINT32 m_cr; /* control register (i.e. instruction register) */
+ uint32_t m_a; /* accumulator */
+ uint32_t m_r; /* register */
+ uint32_t m_cr; /* control register (i.e. instruction register) */
int m_ml; /* memory location (current track in working store, and requested word position within track) (10 bits) */
int m_working_store; /* current working store (group of 16 tracks) (1-15) */
int m_current_word; /* current word position within track (0-31) */
int m_running; /* 1 flag: */
/* running: flag implied by the existence of the stop instruction */
- UINT32 m_pc; /* address of next instruction for the disassembler */
+ uint32_t m_pc; /* address of next instruction for the disassembler */
address_space *m_program;
address_space *m_io;
int m_icount;
// For state
- UINT32 m_ml_full;
- UINT32 m_genpc;
+ uint32_t m_ml_full;
+ uint32_t m_genpc;
};
diff --git a/src/devices/cpu/apexc/apexcdsm.cpp b/src/devices/cpu/apexc/apexcdsm.cpp
index 81effc58b0e..a5d5cfbf754 100644
--- a/src/devices/cpu/apexc/apexcdsm.cpp
+++ b/src/devices/cpu/apexc/apexcdsm.cpp
@@ -85,7 +85,7 @@ static const instr_desc instructions[16] =
CPU_DISASSEMBLE( apexc )
{
- UINT32 instruction; /* 32-bit machine instruction */
+ uint32_t instruction; /* 32-bit machine instruction */
int x, y, function, c6, vector; /* instruction fields */
int n; /* 'friendly', instruction-dependant interpretation of C6 */
const instr_desc *the_desc; /* pointer to the relevant entry in the instructions array */
diff --git a/src/devices/cpu/arc/arc.cpp b/src/devices/cpu/arc/arc.cpp
index b0672f03bfe..03fddcb14e5 100644
--- a/src/devices/cpu/arc/arc.cpp
+++ b/src/devices/cpu/arc/arc.cpp
@@ -17,7 +17,7 @@
const device_type ARC = &device_creator<arc_device>;
-arc_device::arc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arc_device::arc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ARC, "ARCtangent A4", tag, owner, clock, "arc", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 24, 0), m_pc(0), m_program(nullptr), m_icount(0), m_debugger_temp(0)
// some docs describe these as 'middle endian'?!
@@ -25,7 +25,7 @@ arc_device::arc_device(const machine_config &mconfig, const char *tag, device_t
}
-offs_t arc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t arc_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( arc );
return CPU_DISASSEMBLE_NAME(arc)(this, buffer, pc, oprom, opram, options);
@@ -36,19 +36,19 @@ offs_t arc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opro
/*****************************************************************************/
-void arc_device::unimplemented_opcode(UINT16 op)
+void arc_device::unimplemented_opcode(uint16_t op)
{
fatalerror("arc: unknown opcode %04x at %04x\n", op, m_pc << 2);
}
/*****************************************************************************/
-UINT32 arc_device::READ32(UINT32 address)
+uint32_t arc_device::READ32(uint32_t address)
{
return m_program->read_dword(address << 2);
}
-void arc_device::WRITE32(UINT32 address, UINT32 data)
+void arc_device::WRITE32(uint32_t address, uint32_t data)
{
m_program->write_dword(address << 2, data);
}
@@ -109,14 +109,14 @@ void arc_device::execute_set_input(int irqline, int state)
void arc_device::execute_run()
{
- //UINT32 lres;
+ //uint32_t lres;
//lres = 0;
while (m_icount > 0)
{
debugger_instruction_hook(this, m_pc<<2);
- //UINT32 op = READ32(m_pc);
+ //uint32_t op = READ32(m_pc);
m_pc++;
diff --git a/src/devices/cpu/arc/arc.h b/src/devices/cpu/arc/arc.h
index 5b9302cc99f..6421b2eb94d 100644
--- a/src/devices/cpu/arc/arc.h
+++ b/src/devices/cpu/arc/arc.h
@@ -16,7 +16,7 @@ class arc_device : public cpu_device
{
public:
// construction/destruction
- arc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ arc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -24,9 +24,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 5; }
- virtual UINT32 execute_max_cycles() const override { return 5; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 5; }
+ virtual uint32_t execute_max_cycles() const override { return 5; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -38,9 +38,9 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -54,18 +54,18 @@ private:
// 61 = Short Immediate Data Indicator Settings Flag
// 62 = Long Immediate Data Indicator
// 63 = Short Immediate Data Indicator NOT Settings Flag
- UINT32 m_pc;
- //UINT32 m_r[64];
+ uint32_t m_pc;
+ //uint32_t m_r[64];
address_space *m_program;
int m_icount;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
- void unimplemented_opcode(UINT16 op);
- inline UINT32 READ32(UINT32 address);
- inline void WRITE32(UINT32 address, UINT32 data);
+ void unimplemented_opcode(uint16_t op);
+ inline uint32_t READ32(uint32_t address);
+ inline void WRITE32(uint32_t address, uint32_t data);
};
diff --git a/src/devices/cpu/arc/arcdasm.cpp b/src/devices/cpu/arc/arcdasm.cpp
index 1b7897069de..872f821d560 100644
--- a/src/devices/cpu/arc/arcdasm.cpp
+++ b/src/devices/cpu/arc/arcdasm.cpp
@@ -193,12 +193,12 @@ static const char *regnames[0x40] =
CPU_DISASSEMBLE(arc)
{
- UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
+ uint32_t op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
op = big_endianize_int32(op);
output = buffer;
- UINT8 opcode = ARC_OPERATION;
+ uint8_t opcode = ARC_OPERATION;
switch (opcode)
{
diff --git a/src/devices/cpu/arcompact/arcompact.cpp b/src/devices/cpu/arcompact/arcompact.cpp
index 7c290e1adad..8f44ea45b52 100644
--- a/src/devices/cpu/arcompact/arcompact.cpp
+++ b/src/devices/cpu/arcompact/arcompact.cpp
@@ -50,7 +50,7 @@ ADDRESS_MAP_END
//#define AUX_SPACE_ADDRESS_WIDTH 34 // IO space is 32 bits of dwords, so 34-bits
#define AUX_SPACE_ADDRESS_WIDTH 64 // but the MAME core requires us to use power of 2 values for >32
-arcompact_device::arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arcompact_device::arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ARCA5, "ARCtangent-A5", tag, owner, clock, "arca5", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0) // some docs describe these as 'middle endian'?!
, m_io_config( "io", ENDIANNESS_LITTLE, 32, AUX_SPACE_ADDRESS_WIDTH, 0, ADDRESS_MAP_NAME( arcompact_auxreg_map ) )
@@ -58,7 +58,7 @@ arcompact_device::arcompact_device(const machine_config &mconfig, const char *ta
}
-offs_t arcompact_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t arcompact_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( arcompact );
return CPU_DISASSEMBLE_NAME(arcompact)(this, buffer, pc, oprom, opram, options);
@@ -69,7 +69,7 @@ offs_t arcompact_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
/*****************************************************************************/
-void arcompact_device::unimplemented_opcode(UINT16 op)
+void arcompact_device::unimplemented_opcode(uint16_t op)
{
fatalerror("ARCOMPACT: unknown opcode %04x at %04x\n", op, m_pc << 2);
}
diff --git a/src/devices/cpu/arcompact/arcompact.h b/src/devices/cpu/arcompact/arcompact.h
index a6d10528040..fed808b0cc8 100644
--- a/src/devices/cpu/arcompact/arcompact.h
+++ b/src/devices/cpu/arcompact/arcompact.h
@@ -11,9 +11,9 @@
#ifndef __ARCOMPACT_H__
#define __ARCOMPACT_H__
-#define ARCOMPACT_RETTYPE UINT32
-#define OPS_32 UINT32 op
-#define OPS_16 UINT16 op
+#define ARCOMPACT_RETTYPE uint32_t
+#define OPS_32 uint32_t op
+#define OPS_16 uint16_t op
#define PARAMS op
#define LIMM_REG 62
#define ARCOMPACT_OPERATION ((op & 0xf800) >> 11)
@@ -61,7 +61,7 @@ class arcompact_device : public cpu_device
{
public:
// construction/destruction
- arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ32_MEMBER( arcompact_auxreg002_LPSTART_r);
DECLARE_WRITE32_MEMBER(arcompact_auxreg002_LPSTART_w);
@@ -79,9 +79,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 5; }
- virtual UINT32 execute_max_cycles() const override { return 5; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 5; }
+ virtual uint32_t execute_max_cycles() const override { return 5; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -93,9 +93,9 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
@@ -774,8 +774,8 @@ protected:
ARCOMPACT_RETTYPE arcompact_handle1e_03_0x_helper(OPS_16, const char* optext);
- UINT32 handle_jump_to_addr(int delay, int link, UINT32 address, UINT32 next_addr);
- UINT32 handle_jump_to_register(int delay, int link, UINT32 reg, UINT32 next_addr, int flag);
+ uint32_t handle_jump_to_addr(int delay, int link, uint32_t address, uint32_t next_addr);
+ uint32_t handle_jump_to_register(int delay, int link, uint32_t reg, uint32_t next_addr, int flag);
ARCOMPACT_RETTYPE get_insruction(OPS_32);
@@ -813,43 +813,43 @@ private:
const address_space_config m_program_config;
const address_space_config m_io_config;
- UINT32 m_pc;
+ uint32_t m_pc;
address_space *m_program;
address_space *m_io;
int m_icount;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
- void unimplemented_opcode(UINT16 op);
+ void unimplemented_opcode(uint16_t op);
- inline UINT32 READ32(UINT32 address) { return m_program->read_dword(address << 2); }
- inline void WRITE32(UINT32 address, UINT32 data) { m_program->write_dword(address << 2, data); }
- inline UINT16 READ16(UINT32 address) { return m_program->read_word(address << 1); }
- inline void WRITE16(UINT32 address, UINT16 data){ m_program->write_word(address << 1, data); }
- inline UINT8 READ8(UINT32 address) { return m_program->read_byte(address << 0); }
- inline void WRITE8(UINT32 address, UINT8 data){ m_program->write_byte(address << 0, data); }
+ inline uint32_t READ32(uint32_t address) { return m_program->read_dword(address << 2); }
+ inline void WRITE32(uint32_t address, uint32_t data) { m_program->write_dword(address << 2, data); }
+ inline uint16_t READ16(uint32_t address) { return m_program->read_word(address << 1); }
+ inline void WRITE16(uint32_t address, uint16_t data){ m_program->write_word(address << 1, data); }
+ inline uint8_t READ8(uint32_t address) { return m_program->read_byte(address << 0); }
+ inline void WRITE8(uint32_t address, uint8_t data){ m_program->write_byte(address << 0, data); }
- inline UINT64 READAUX(UINT64 address) { return m_io->read_dword(address *4); }
- inline void WRITEAUX(UINT64 address, UINT32 data) { m_io->write_dword(address *4, data); }
+ inline uint64_t READAUX(uint64_t address) { return m_io->read_dword(address *4); }
+ inline void WRITEAUX(uint64_t address, uint32_t data) { m_io->write_dword(address *4, data); }
- int check_condition(UINT8 condition);
+ int check_condition(uint8_t condition);
- UINT32 m_regs[0x40];
+ uint32_t m_regs[0x40];
int m_delayactive;
int m_delaylinks;
- UINT32 m_delayjump;
+ uint32_t m_delayjump;
// f e d c| b a 9 8| 7 6 5 4| 3 2 1 0
// - - - L| Z N C V| U DE AE A2|A1 E2 E1 H
- UINT32 m_status32;
+ uint32_t m_status32;
- UINT32 m_LP_START;
- UINT32 m_LP_END;
- UINT32 m_INTVECTORBASE;
+ uint32_t m_LP_START;
+ uint32_t m_LP_END;
+ uint32_t m_INTVECTORBASE;
};
diff --git a/src/devices/cpu/arcompact/arcompact_execute.cpp b/src/devices/cpu/arcompact/arcompact_execute.cpp
index d145a698fc8..53d3ce742cb 100644
--- a/src/devices/cpu/arcompact/arcompact_execute.cpp
+++ b/src/devices/cpu/arcompact/arcompact_execute.cpp
@@ -14,7 +14,7 @@
void arcompact_device::execute_run()
{
- //UINT32 lres;
+ //uint32_t lres;
//lres = 0;
while (m_icount > 0)
@@ -25,7 +25,7 @@ void arcompact_device::execute_run()
if (m_delayactive)
{
- UINT16 op = READ16((m_pc + 0) >> 1);
+ uint16_t op = READ16((m_pc + 0) >> 1);
m_pc = get_insruction(op);
if (m_delaylinks) m_regs[REG_BLINK] = m_pc;
@@ -34,7 +34,7 @@ void arcompact_device::execute_run()
}
else
{
- UINT16 op = READ16((m_pc + 0) >> 1);
+ uint16_t op = READ16((m_pc + 0) >> 1);
m_pc = get_insruction(op);
}
@@ -56,7 +56,7 @@ void arcompact_device::execute_run()
#define GET_01_01_01_BRANCH_ADDR \
- INT32 address = (op & 0x00fe0000) >> 17; \
+ int32_t address = (op & 0x00fe0000) >> 17; \
address |= ((op & 0x00008000) >> 15) << 7; \
if (address & 0x80) address = -0x80 + (address & 0x7f);
@@ -83,10 +83,10 @@ void arcompact_device::execute_run()
#define COMMON32_GET_s12 \
int S_temp = (op & 0x0000003f) >> 0; \
int s_temp = (op & 0x00000fc0) >> 6; \
- INT32 S = s_temp | (S_temp<<6); \
+ int32_t S = s_temp | (S_temp<<6); \
if (S & 0x800) S = -0x800 + (S&0x7ff); /* sign extend */
#define COMMON32_GET_CONDITION \
- UINT8 condition = op & 0x0000001f;
+ uint8_t condition = op & 0x0000001f;
#define COMMON16_GET_breg \
@@ -121,7 +121,7 @@ void arcompact_device::execute_run()
#define PC_ALIGNED32 \
(m_pc&0xfffffffc)
-int arcompact_device::check_condition(UINT8 condition)
+int arcompact_device::check_condition(uint8_t condition)
{
switch (condition & 0x1f)
{
@@ -166,7 +166,7 @@ int arcompact_device::check_condition(UINT8 condition)
ARCOMPACT_RETTYPE arcompact_device::get_insruction(OPS_32)
{
- UINT8 instruction = ARCOMPACT_OPERATION;
+ uint8_t instruction = ARCOMPACT_OPERATION;
if (instruction < 0x0c)
{
@@ -221,7 +221,7 @@ ARCOMPACT_RETTYPE arcompact_device::get_insruction(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00(OPS_32)
{
- UINT8 subinstr = (op & 0x00010000) >> 16;
+ uint8_t subinstr = (op & 0x00010000) >> 16;
switch (subinstr)
{
@@ -234,7 +234,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01(OPS_32)
{
- UINT8 subinstr = (op & 0x00010000) >> 16;
+ uint8_t subinstr = (op & 0x00010000) >> 16;
switch (subinstr)
{
@@ -247,7 +247,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_00(OPS_32)
{
- UINT8 subinstr2 = (op & 0x00020000) >> 17;
+ uint8_t subinstr2 = (op & 0x00020000) >> 17;
switch (subinstr2)
{
@@ -260,7 +260,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_00(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01(OPS_32)
{
- UINT8 subinstr2 = (op & 0x00000010) >> 4;
+ uint8_t subinstr2 = (op & 0x00000010) >> 4;
switch (subinstr2)
{
@@ -273,7 +273,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00(OPS_32)
{
- UINT8 subinstr3 = (op & 0x0000000f) >> 0;
+ uint8_t subinstr3 = (op & 0x0000000f) >> 0;
switch (subinstr3)
{
@@ -300,7 +300,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01(OPS_32) // Branch on Compare/Bit Test Register-Immediate
{
- UINT8 subinstr3 = (op & 0x0000000f) >> 0;
+ uint8_t subinstr3 = (op & 0x0000000f) >> 0;
switch (subinstr3)
{
@@ -327,7 +327,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01(OPS_32) // Branch
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04(OPS_32)
{
- UINT8 subinstr = (op & 0x003f0000) >> 16;
+ uint8_t subinstr = (op & 0x003f0000) >> 16;
switch (subinstr)
{
@@ -402,7 +402,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f(OPS_32)
{
- UINT8 subinstr2 = (op & 0x0000003f) >> 0;
+ uint8_t subinstr2 = (op & 0x0000003f) >> 0;
switch (subinstr2)
{
@@ -478,7 +478,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f(OPS_32)
{
- UINT8 subinstr2 = (op & 0x0000003f) >> 0;
+ uint8_t subinstr2 = (op & 0x0000003f) >> 0;
switch (subinstr2)
{
@@ -553,7 +553,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f(OPS_32)
{
- UINT8 subinstr3 = (op & 0x07000000) >> 24;
+ uint8_t subinstr3 = (op & 0x07000000) >> 24;
subinstr3 |= ((op & 0x00007000) >> 12) << 3;
switch (subinstr3)
@@ -630,7 +630,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f(OPS_32) // useless ZOP group, no actual opcodes
{
- UINT8 subinstr3 = (op & 0x07000000) >> 24;
+ uint8_t subinstr3 = (op & 0x07000000) >> 24;
subinstr3 |= ((op & 0x00007000) >> 12) << 3;
switch (subinstr3)
@@ -708,7 +708,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_3f(OPS_32) // useless
// this is an Extension ALU group, maybe optional on some CPUs?
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05(OPS_32)
{
- UINT8 subinstr = (op & 0x003f0000) >> 16;
+ uint8_t subinstr = (op & 0x003f0000) >> 16;
switch (subinstr)
{
@@ -783,7 +783,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0c(OPS_16)
{
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
switch (subinstr)
{
@@ -798,7 +798,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0c(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0d(OPS_16)
{
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
switch (subinstr)
{
@@ -813,7 +813,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0d(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e(OPS_16)
{
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
switch (subinstr)
{
@@ -828,7 +828,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f(OPS_16)
{
- UINT8 subinstr = (op & 0x01f) >> 0;
+ uint8_t subinstr = (op & 0x01f) >> 0;
switch (subinstr)
{
@@ -872,7 +872,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00(OPS_16)
{
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
switch (subinstr)
{
@@ -892,7 +892,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07(OPS_16)
{
- UINT8 subinstr3 = (op & 0x0700) >> 8;
+ uint8_t subinstr3 = (op & 0x0700) >> 8;
switch (subinstr3)
{
@@ -912,7 +912,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17(OPS_16)
{
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
switch (subinstr)
{
@@ -931,7 +931,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18(OPS_16)
{
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
switch (subinstr)
{
@@ -950,7 +950,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05(OPS_16)
{
- UINT8 subinstr2 = (op & 0x0700) >> 8;
+ uint8_t subinstr2 = (op & 0x0700) >> 8;
switch (subinstr2)
{
@@ -969,7 +969,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06(OPS_16)
{
- UINT8 subinstr2 = (op & 0x001f) >> 0;
+ uint8_t subinstr2 = (op & 0x001f) >> 0;
switch (subinstr2)
{
@@ -1012,7 +1012,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07(OPS_16)
{
- UINT8 subinstr2 = (op & 0x001f) >> 0;
+ uint8_t subinstr2 = (op & 0x001f) >> 0;
switch (subinstr2)
{
@@ -1055,7 +1055,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle19(OPS_16)
{
- UINT8 subinstr = (op & 0x0600) >> 9;
+ uint8_t subinstr = (op & 0x0600) >> 9;
switch (subinstr)
{
@@ -1070,7 +1070,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle19(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c(OPS_16)
{
- UINT8 subinstr = (op & 0x0080) >> 7;
+ uint8_t subinstr = (op & 0x0080) >> 7;
switch (subinstr)
{
@@ -1083,7 +1083,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d(OPS_16)
{
- UINT8 subinstr = (op & 0x0080) >> 7;
+ uint8_t subinstr = (op & 0x0080) >> 7;
switch (subinstr)
{
@@ -1096,7 +1096,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e(OPS_16)
{
- UINT8 subinstr = (op & 0x0600) >> 9;
+ uint8_t subinstr = (op & 0x0600) >> 9;
switch (subinstr)
{
@@ -1111,7 +1111,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03(OPS_16)
{
- UINT8 subinstr2 = (op & 0x01c0) >> 6;
+ uint8_t subinstr2 = (op & 0x01c0) >> 6;
switch (subinstr2)
{
@@ -1130,7 +1130,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03(OPS_16)
// handlers
-UINT32 arcompact_device::handle_jump_to_addr(int delay, int link, UINT32 address, UINT32 next_addr)
+uint32_t arcompact_device::handle_jump_to_addr(int delay, int link, uint32_t address, uint32_t next_addr)
{
if (delay)
{
@@ -1148,7 +1148,7 @@ UINT32 arcompact_device::handle_jump_to_addr(int delay, int link, UINT32 address
}
-UINT32 arcompact_device::handle_jump_to_register(int delay, int link, UINT32 reg, UINT32 next_addr, int flag)
+uint32_t arcompact_device::handle_jump_to_register(int delay, int link, uint32_t reg, uint32_t next_addr, int flag)
{
if (reg == LIMM_REG)
arcompact_fatal("handle_jump_to_register called with LIMM register, call handle_jump_to_addr instead");
@@ -1176,7 +1176,7 @@ UINT32 arcompact_device::handle_jump_to_register(int delay, int link, UINT32 reg
else
{
//arcompact_fatal("jump not supported");
- UINT32 target = m_regs[reg];
+ uint32_t target = m_regs[reg];
return handle_jump_to_addr(delay, link, target, next_addr);
}
}
@@ -1195,12 +1195,12 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00_00(OPS_32)
// Branch Conditionally
// 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ
- INT32 address = (op & 0x07fe0000) >> 17;
+ int32_t address = (op & 0x07fe0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
if (address & 0x80000) address = -0x80000 + (address & 0x7ffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
- UINT32 realaddress = PC_ALIGNED32 + (address * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (address * 2);
if (n)
{
@@ -1222,14 +1222,14 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00_01(OPS_32)
{
int size = 4;
// Branch Unconditionally Far
- INT32 address = (op & 0x07fe0000) >> 17;
+ int32_t address = (op & 0x07fe0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
if (address & 0x800000) address = -0x800000 + (address & 0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
// int res = (op & 0x00000010) >> 4; op &= ~0x00000010; // should be set to 0
- UINT32 realaddress = PC_ALIGNED32 + (address * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (address * 2);
if (n)
{
@@ -1264,14 +1264,14 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_00_01dasm(OPS_32)
int size = 4;
// Branch and Link Unconditionally Far
// 00001 sssssssss 10 SSSSSSSSSS N R TTTT
- INT32 address = (op & 0x07fc0000) >> 17;
+ int32_t address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
// int res = (op & 0x00000010) >> 4; op &= ~0x00000010;
- UINT32 realaddress = PC_ALIGNED32 + (address * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (address * 2);
if (n)
{
@@ -1307,7 +1307,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_00_helper(OPS_32, const char
}
else
{
- //UINT32 limm;
+ //uint32_t limm;
//GET_LIMM_32;
size = 8;
}
@@ -1326,7 +1326,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_00_helper(OPS_32, const char
COMMON32_GET_creg; \
COMMON32_GET_breg; \
int n = (op & 0x00000020) >> 5; \
- UINT32 b,c; \
+ uint32_t b,c; \
if ((breg != LIMM_REG) && (creg != LIMM_REG)) \
{ \
b = m_regs[breg]; \
@@ -1334,7 +1334,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_00_helper(OPS_32, const char
} \
else \
{ \
- UINT32 limm; \
+ uint32_t limm; \
GET_LIMM_32; \
size = 8; \
\
@@ -1350,7 +1350,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_00_helper(OPS_32, const char
}
#define BR_TAKEJUMP \
/* take jump */ \
- UINT32 realaddress = PC_ALIGNED32 + (address * 2); \
+ uint32_t realaddress = PC_ALIGNED32 + (address * 2); \
\
if (n) \
{ \
@@ -1395,7 +1395,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_02(OPS_32) // regit
BR_REGREG_SETUP
// BRLT (signed operation)
- if ((INT32)b < (INT32)c)
+ if ((int32_t)b < (int32_t)c)
{
BR_TAKEJUMP
}
@@ -1408,7 +1408,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_03(OPS_32) // regis
BR_REGREG_SETUP
// BRGE (signed operation)
- if ((INT32)b >= (INT32)c)
+ if ((int32_t)b >= (int32_t)c)
{
BR_TAKEJUMP
}
@@ -1460,7 +1460,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_01_helper(OPS_32, const char
COMMON32_GET_u6; \
COMMON32_GET_breg; \
int n = (op & 0x00000020) >> 5; \
- UINT32 b,c; \
+ uint32_t b,c; \
c = u; \
/* comparing a LIMM to an immediate is pointless, is it a valid encoding? */ \
if ((breg != LIMM_REG)) \
@@ -1469,7 +1469,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_01_helper(OPS_32, const char
} \
else \
{ \
- UINT32 limm; \
+ uint32_t limm; \
GET_LIMM_32; \
size = 8; \
b = limm; \
@@ -1509,7 +1509,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_02(OPS_32) // BRLT
BR_REGIMM_SETUP
// BRLT (signed operation)
- if ((INT32)b < (INT32)c)
+ if ((int32_t)b < (int32_t)c)
{
BR_TAKEJUMP
}
@@ -1522,7 +1522,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_03(OPS_32)
BR_REGIMM_SETUP
// BRGE (signed operation)
- if ((INT32)b >= (INT32)c)
+ if ((int32_t)b >= (int32_t)c)
{
BR_TAKEJUMP
}
@@ -1564,7 +1564,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_0f(OPS_32) { retur
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle02(OPS_32)
{
int size = 4;
- UINT32 limm;
+ uint32_t limm;
int S = (op & 0x00008000) >> 15;// op &= ~0x00008000;
int s = (op & 0x00ff0000) >> 16;// op &= ~0x00ff0000;
@@ -1578,7 +1578,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle02(OPS_32)
int a = (op & 0x00000600) >> 9; //op &= ~0x00000600;
// int D = (op & 0x00000800) >> 11;// op &= ~0x00000800; // we don't use the data cache currently
- UINT32 address = m_regs[breg];
+ uint32_t address = m_regs[breg];
if (breg == LIMM_REG)
{
@@ -1613,7 +1613,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle02(OPS_32)
}
}
- UINT32 readdata = 0;
+ uint32_t readdata = 0;
// read data
if (Z == 0)
@@ -1663,7 +1663,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle02(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle03(OPS_32)
{
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
int S = (op & 0x00008000) >> 15;
int s = (op & 0x00ff0000) >> 16;
@@ -1678,7 +1678,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle03(OPS_32)
// int D = (op & 0x00000020) >> 5; // we don't use the data cache currently
- UINT32 address = m_regs[breg];
+ uint32_t address = m_regs[breg];
if (breg == LIMM_REG)
{
@@ -1689,7 +1689,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle03(OPS_32)
address = limm;
}
- UINT32 writedata = m_regs[creg];
+ uint32_t writedata = m_regs[creg];
if (creg == LIMM_REG)
{
@@ -1762,7 +1762,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle03(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_helper(OPS_32, const char* optext, int ignore_dst, int b_reserved)
{
int size;
- //UINT32 limm = 0;
+ //uint32_t limm = 0;
int got_limm = 0;
COMMON32_GET_p;
@@ -1926,7 +1926,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1d(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p00(OPS_32)
{
int size;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
COMMON32_GET_creg
@@ -2004,14 +2004,14 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p10(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32) // Jcc (no link, no delay)
{
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
COMMON32_GET_creg
COMMON32_GET_CONDITION;
COMMON32_GET_F
- UINT32 c;
+ uint32_t c;
if (creg == LIMM_REG)
{
@@ -2048,7 +2048,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32) // Jcc
}
else
{
- UINT32 realaddress = c;
+ uint32_t realaddress = c;
return realaddress;
}
}
@@ -2085,7 +2085,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m1(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p00(OPS_32)
{
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
COMMON32_GET_creg
@@ -2127,14 +2127,14 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p10(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p11_m0(OPS_32) // Jcc.D (no link, delay)
{
int size = 4;
- UINT32 limm;
+ uint32_t limm;
int got_limm = 0;
COMMON32_GET_creg
COMMON32_GET_CONDITION;
COMMON32_GET_F
- //UINT32 c = 0;
+ //uint32_t c = 0;
if (creg == LIMM_REG)
{
@@ -2243,7 +2243,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop
// if the loop condition fails then just jump to after the end of the loop, don't set any registers
if (!check_condition(condition))
{
- UINT32 realoffset = PC_ALIGNED32 + (u * 2);
+ uint32_t realoffset = PC_ALIGNED32 + (u * 2);
return realoffset;
}
else
@@ -2281,7 +2281,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_helper(OPS_32, const c
if (creg == LIMM_REG)
{
- //UINT32 limm;
+ //uint32_t limm;
//GET_LIMM_32;
size = 8;
}
@@ -2331,7 +2331,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_3f_05(OPS_32) { arcom
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3x_helper(OPS_32, int dsize, int extend)
{
int size;
- //UINT32 limm=0;
+ //uint32_t limm=0;
int got_limm = 0;
@@ -2417,7 +2417,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0x_helper(OPS_32, cons
if (creg == LIMM_REG)
{
- //UINT32 limm;
+ //uint32_t limm;
//GET_LIMM_32;
size = 8;
@@ -2554,7 +2554,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_0x_helper(OPS_16, const c
if (h == LIMM_REG)
{
- //UINT32 limm;
+ //uint32_t limm;
//GET_LIMM;
size = 6;
}
@@ -2579,7 +2579,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_00(OPS_16) // ADD_s b, b,
if (h == LIMM_REG)
{
- UINT32 limm;
+ uint32_t limm;
GET_LIMM_16;
size = 6;
@@ -2609,7 +2609,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_01(OPS_16) // MOV_S b <-
// opcode iiii ibbb hhhI Ihhh
// MOV_S b, limm 0111 0bbb 1100 1111 [LIMM] (h == LIMM)
- UINT32 limm;
+ uint32_t limm;
GET_LIMM_16;
size = 6;
@@ -2914,14 +2914,14 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_0x_helper(OPS_16, const c
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_00(OPS_16) // LD_S b, [SP, u7]
{
int breg;
- UINT32 u;
+ uint32_t u;
COMMON16_GET_breg;
COMMON16_GET_u5;
REG_16BIT_RANGE(breg);
- UINT32 address = m_regs[REG_SP] + (u << 2);
+ uint32_t address = m_regs[REG_SP] + (u << 2);
m_regs[breg] = READ32(address >> 2);
@@ -2936,14 +2936,14 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_01(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_02(OPS_16) // ST_S b, [SP, u7]
{
int breg;
- UINT32 u;
+ uint32_t u;
COMMON16_GET_breg;
COMMON16_GET_u5;
REG_16BIT_RANGE(breg);
- UINT32 address = m_regs[REG_SP] + (u << 2);
+ uint32_t address = m_regs[REG_SP] + (u << 2);
WRITE32(address >> 2, m_regs[breg]);
@@ -2958,7 +2958,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_03(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_04(OPS_16) // ADD_S b, SP, u7
{
int breg;
- UINT32 u;
+ uint32_t u;
COMMON16_GET_breg;
COMMON16_GET_u5;
@@ -3060,7 +3060,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1a(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1b(OPS_16) // MOV_S b, u8
{
int breg;
- UINT32 u;
+ uint32_t u;
COMMON16_GET_breg;
COMMON16_GET_u8;
REG_16BIT_RANGE(breg);
@@ -3073,7 +3073,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1b(OPS_16) // MOV_S b, u8
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c_00(OPS_16) // ADD_S b, b, u7
{
int breg;
- UINT32 u;
+ uint32_t u;
COMMON16_GET_breg;
COMMON16_GET_u7;
REG_16BIT_RANGE(breg);
@@ -3086,7 +3086,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c_00(OPS_16) // ADD_S b, b,
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c_01(OPS_16) // CMP b, u7
{
int breg;
- UINT32 u;
+ uint32_t u;
COMMON16_GET_breg;
COMMON16_GET_u7;
REG_16BIT_RANGE(breg);
@@ -3114,7 +3114,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1c_01(OPS_16) // CMP b, u7
STATUS32_CLEAR_C;
}
// signed checks
- INT32 temp = (INT32)m_regs[breg] - (INT32)u;
+ int32_t temp = (int32_t)m_regs[breg] - (int32_t)u;
if (temp < 0)
{
@@ -3155,7 +3155,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d_00(OPS_16) // BREQ_S b,0,
{
int s = (op & 0x007f) >> 0; op &= ~0x007f;
if (s & 0x40) s = -0x40 + (s & 0x3f);
- UINT32 realaddress = PC_ALIGNED32 + (s * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
return realaddress;
}
@@ -3174,7 +3174,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d_01(OPS_16) // BRNE_S b,0,
{
int s = (op & 0x007f) >> 0; op &= ~0x007f;
if (s & 0x40) s = -0x40 + (s & 0x3f);
- UINT32 realaddress = PC_ALIGNED32 + (s * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
return realaddress;
}
@@ -3195,7 +3195,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_00(OPS_16) // B_S s10 (b
{
int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
if (s & 0x100) s = -0x100 + (s & 0xff);
- UINT32 realaddress = PC_ALIGNED32 + (s * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
return realaddress;
}
@@ -3206,7 +3206,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_01(OPS_16) // BEQ_S s10 (
{
int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
if (s & 0x100) s = -0x100 + (s & 0xff);
- UINT32 realaddress = PC_ALIGNED32 + (s * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
return realaddress;
}
@@ -3220,7 +3220,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_02(OPS_16) // BNE_S s10
{
int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
if (s & 0x100) s = -0x100 + (s & 0xff);
- UINT32 realaddress = PC_ALIGNED32 + (s * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
return realaddress;
}
@@ -3243,7 +3243,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_02(OPS_16) // BLT_S
{
int s = (op & 0x003f) >> 0; op &= ~0x003f;
if (s & 0x020) s = -0x20 + (s & 0x1f);
- UINT32 realaddress = PC_ALIGNED32 + (s * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
return realaddress;
}
@@ -3257,7 +3257,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_03(OPS_16) // BLE_S
{
int s = (op & 0x003f) >> 0; op &= ~0x003f;
if (s & 0x020) s = -0x20 + (s & 0x1f);
- UINT32 realaddress = PC_ALIGNED32 + (s * 2);
+ uint32_t realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
return realaddress;
}
@@ -3275,7 +3275,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1f(OPS_16) // BL_S s13
int s = (op & 0x07ff) >> 0; op &= ~0x07ff;
if (s & 0x400) s = -0x400 + (s & 0x3ff);
- UINT32 realaddress = PC_ALIGNED32 + (s * 4);
+ uint32_t realaddress = PC_ALIGNED32 + (s * 4);
m_regs[REG_BLINK] = m_pc + (2 >> 0);
return realaddress;
diff --git a/src/devices/cpu/arcompact/arcompact_make.py b/src/devices/cpu/arcompact/arcompact_make.py
index 30aba810a99..2f1ce7ff4fe 100644
--- a/src/devices/cpu/arcompact/arcompact_make.py
+++ b/src/devices/cpu/arcompact/arcompact_make.py
@@ -71,7 +71,7 @@ def EmitGroup04_u5fragment(f,funcname, opname, opexecute, opwrite, opwrite_alt,
print(" int size = 4;", file=f)
if breg_is_dst_only == 0:
- print(" UINT32 limm = 0;", file=f)
+ print(" uint32_t limm = 0;", file=f)
print("/* int got_limm = 0; */", file=f)
print(" ", file=f)
@@ -92,9 +92,9 @@ def EmitGroup04_u5fragment(f,funcname, opname, opexecute, opwrite, opwrite_alt,
print(" //COMMON32_GET_areg; // areg bits already used as condition code select", file=f)
print(" ", file=f)
- print(" UINT32 c;", file=f)
+ print(" uint32_t c;", file=f)
if breg_is_dst_only == 0:
- print(" UINT32 b;", file=f)
+ print(" uint32_t b;", file=f)
print(" ", file=f)
print(" /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */", file=f)
print(" if (breg == LIMM_REG)", file=f)
@@ -120,7 +120,7 @@ def EmitGroup04(f,funcname, opname, opexecute, opwrite, opwrite_alt, ignore_a, b
print("{", file=f)
print(" int size = 4;", file=f)
- print(" UINT32 limm = 0;", file=f)
+ print(" uint32_t limm = 0;", file=f)
print(" int got_limm = 0;", file=f)
print(" ", file=f)
@@ -140,9 +140,9 @@ def EmitGroup04(f,funcname, opname, opexecute, opwrite, opwrite_alt, ignore_a, b
print(" ", file=f)
- print(" UINT32 c;", file=f)
+ print(" uint32_t c;", file=f)
if breg_is_dst_only == 0:
- print(" UINT32 b;", file=f)
+ print(" uint32_t b;", file=f)
print(" ", file=f)
print(" if (breg == LIMM_REG)", file=f)
print(" {", file=f)
@@ -204,7 +204,7 @@ def EmitGroup04(f,funcname, opname, opexecute, opwrite, opwrite_alt, ignore_a, b
print("{", file=f)
print(" int size = 4;", file=f)
if breg_is_dst_only == 0:
- print(" UINT32 limm = 0;", file=f)
+ print(" uint32_t limm = 0;", file=f)
print("/* int got_limm = 0; */", file=f)
print(" ", file=f)
@@ -218,9 +218,9 @@ def EmitGroup04(f,funcname, opname, opexecute, opwrite, opwrite_alt, ignore_a, b
# areg can't be used here, it's used for s12 bits
print(" ", file=f)
- print(" UINT32 c;", file=f)
+ print(" uint32_t c;", file=f)
if breg_is_dst_only == 0:
- print(" UINT32 b;", file=f)
+ print(" uint32_t b;", file=f)
print(" ", file=f)
print(" /* is having b as LIMM valid here? LIMM vs. fixed u6 value makes no sense */", file=f)
print(" if (breg == LIMM_REG)", file=f)
@@ -236,7 +236,7 @@ def EmitGroup04(f,funcname, opname, opexecute, opwrite, opwrite_alt, ignore_a, b
print(" }", file=f)
print(" ", file=f)
- print(" c = (UINT32)S;", file=f)
+ print(" c = (uint32_t)S;", file=f)
print(" ", file=f)
print(" /* todo: if areg = LIMM then there is no result (but since that register can never be read, I guess it doesn't matter if we store it there anyway?) */", file=f)
print(" %s" % opexecute, file=f)
@@ -359,72 +359,72 @@ except Exception:
sys.exit(1)
-EmitGroup04(f, "04_00", "ADD", "UINT32 result = b + c;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_Handle_NZCV_ADD_Flags )
+EmitGroup04(f, "04_00", "ADD", "uint32_t result = b + c;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_Handle_NZCV_ADD_Flags )
-EmitGroup04(f, "04_02", "SUB", "UINT32 result = b - c;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_02", "SUB", "uint32_t result = b - c;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_04", "AND", "UINT32 result = b & c;", "if (areg != LIMM_REG) { m_regs[areg] = result; }", "if (breg != LIMM_REG) { m_regs[breg] = result; }", 0,0, -1, EmitGroup04_Handle_NZ_Flags )
-EmitGroup04(f, "04_05", "OR", "UINT32 result = b | c;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_06", "BIC", "UINT32 result = b & (~c);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_07", "XOR", "UINT32 result = b ^ c;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_04", "AND", "uint32_t result = b & c;", "if (areg != LIMM_REG) { m_regs[areg] = result; }", "if (breg != LIMM_REG) { m_regs[breg] = result; }", 0,0, -1, EmitGroup04_Handle_NZ_Flags )
+EmitGroup04(f, "04_05", "OR", "uint32_t result = b | c;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_06", "BIC", "uint32_t result = b & (~c);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_07", "XOR", "uint32_t result = b ^ c;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_0a", "MOV", "UINT32 result = c;", "m_regs[breg] = result;", "m_regs[breg] = result;", 1,1, -1, EmitGroup04_Handle_NZ_Flags ) # special case, result always goes to breg
+EmitGroup04(f, "04_0a", "MOV", "uint32_t result = c;", "m_regs[breg] = result;", "m_regs[breg] = result;", 1,1, -1, EmitGroup04_Handle_NZ_Flags ) # special case, result always goes to breg
-EmitGroup04(f, "04_0e", "RSUB", "UINT32 result = c - b;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_0f", "BSET", "UINT32 result = b | (1 << (c & 0x1f));", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_0e", "RSUB", "uint32_t result = c - b;", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_0f", "BSET", "uint32_t result = b | (1 << (c & 0x1f));", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_13", "BMSK", "UINT32 result = b & ((1<<(c+1))-1);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_13", "BMSK", "uint32_t result = b & ((1<<(c+1))-1);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_14", "ADD1", "UINT32 result = b + (c << 1);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_15", "ADD2", "UINT32 result = b + (c << 2);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_16", "ADD3", "UINT32 result = b + (c << 3);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_17", "SUB1", "UINT32 result = b - (c << 1);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_18", "SUB2", "UINT32 result = b - (c << 2);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "04_19", "SUB3", "UINT32 result = b - (c << 3);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_14", "ADD1", "uint32_t result = b + (c << 1);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_15", "ADD2", "uint32_t result = b + (c << 2);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_16", "ADD3", "uint32_t result = b + (c << 3);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_17", "SUB1", "uint32_t result = b - (c << 1);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_18", "SUB2", "uint32_t result = b - (c << 2);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "04_19", "SUB3", "uint32_t result = b - (c << 3);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
EmitGroup04(f, "04_2a", "LR", "m_regs[breg] = READAUX(c);", "", "", 1,1, -1, EmitGroup04_no_Flags ) # this can't be conditional (todo)
EmitGroup04(f, "04_2b", "SR", "WRITEAUX(c,b);", "", "", 1,0, -1, EmitGroup04_no_Flags ) # this can't be conditional (todo)
-EmitGroup04(f, "05_00", "ASL", "UINT32 result = b << (c&0x1f);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
-EmitGroup04(f, "05_01", "LSR", "UINT32 result = b >> (c&0x1f);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "05_00", "ASL", "uint32_t result = b << (c&0x1f);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
+EmitGroup04(f, "05_01", "LSR", "uint32_t result = b >> (c&0x1f);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
# the 04_2f subgroup uses the same encoding, but the areg is already used as sub-opcode select, so any modes relying on areg bits for other reasons (sign, condition) (modes 10, 11m0, 11m1) are illegal. the destination is also breg not areg
-EmitGroup04(f, "04_2f_02", "LSR1", "UINT32 result = c >> 1;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_Handle_NZC_LSR1_Flags ) # no alt handler (invalid path)
-EmitGroup04(f, "04_2f_03", "ROR", "int shift = 1; UINT32 mask = (1 << (shift)) - 1; mask <<= (32-shift); UINT32 result = ((c >> shift) & ~mask) | ((c << (32-shift)) & mask);", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_Handle_NZC_LSR1_Flags )
+EmitGroup04(f, "04_2f_02", "LSR1", "uint32_t result = c >> 1;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_Handle_NZC_LSR1_Flags ) # no alt handler (invalid path)
+EmitGroup04(f, "04_2f_03", "ROR", "int shift = 1; uint32_t mask = (1 << (shift)) - 1; mask <<= (32-shift); uint32_t result = ((c >> shift) & ~mask) | ((c << (32-shift)) & mask);", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_Handle_NZC_LSR1_Flags )
-EmitGroup04(f, "04_2f_07", "EXTB", "UINT32 result = c & 0x000000ff;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags ) # ^
-EmitGroup04(f, "04_2f_08", "EXTW", "UINT32 result = c & 0x0000ffff;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags ) # ^
+EmitGroup04(f, "04_2f_07", "EXTB", "uint32_t result = c & 0x000000ff;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags ) # ^
+EmitGroup04(f, "04_2f_08", "EXTW", "uint32_t result = c & 0x0000ffff;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags ) # ^
# xxx_S c, b, u3 format opcodes (note c is destination)
-EmitGroup0d(f, "0d_00", "ADD_S", "UINT32 result = m_regs[breg] + u;", "m_regs[creg] = result;" )
-EmitGroup0d(f, "0d_01", "SUB_S", "UINT32 result = m_regs[breg] - u;", "m_regs[creg] = result;" )
-EmitGroup0d(f, "0d_02", "ASL_S", "UINT32 result = m_regs[breg] << u;", "m_regs[creg] = result;" )
+EmitGroup0d(f, "0d_00", "ADD_S", "uint32_t result = m_regs[breg] + u;", "m_regs[creg] = result;" )
+EmitGroup0d(f, "0d_01", "SUB_S", "uint32_t result = m_regs[breg] - u;", "m_regs[creg] = result;" )
+EmitGroup0d(f, "0d_02", "ASL_S", "uint32_t result = m_regs[breg] << u;", "m_regs[creg] = result;" )
# xxx_S b <- b,c format opcodes (or in some cases xxx_S b,c)
-EmitGroup0f(f, "0f_02", "SUB_S", "UINT32 result = m_regs[breg] - m_regs[creg];", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_04", "AND_S", "UINT32 result = m_regs[breg] & m_regs[creg];", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_05", "OR_S", "UINT32 result = m_regs[breg] | m_regs[creg];", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_07", "XOR_S", "UINT32 result = m_regs[breg] ^ m_regs[creg];", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_0f", "EXTB_S","UINT32 result = m_regs[creg] & 0x000000ff;", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_10", "EXTW_S","UINT32 result = m_regs[creg] & 0x0000ffff;", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_13", "NEG_S"," UINT32 result = 0 - m_regs[creg];", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_02", "SUB_S", "uint32_t result = m_regs[breg] - m_regs[creg];", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_04", "AND_S", "uint32_t result = m_regs[breg] & m_regs[creg];", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_05", "OR_S", "uint32_t result = m_regs[breg] | m_regs[creg];", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_07", "XOR_S", "uint32_t result = m_regs[breg] ^ m_regs[creg];", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_0f", "EXTB_S","uint32_t result = m_regs[creg] & 0x000000ff;", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_10", "EXTW_S","uint32_t result = m_regs[creg] & 0x0000ffff;", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_13", "NEG_S"," uint32_t result = 0 - m_regs[creg];", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_14", "ADD1_S"," UINT32 result = m_regs[breg] + (m_regs[creg] <<1);", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_15", "ADD2_S"," UINT32 result = m_regs[breg] + (m_regs[creg] <<2);", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_16", "ADD3_S"," UINT32 result = m_regs[breg] + (m_regs[creg] <<3);", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_14", "ADD1_S"," uint32_t result = m_regs[breg] + (m_regs[creg] <<1);", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_15", "ADD2_S"," uint32_t result = m_regs[breg] + (m_regs[creg] <<2);", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_16", "ADD3_S"," uint32_t result = m_regs[breg] + (m_regs[creg] <<3);", "m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_19", "LSR_S", "UINT32 result = m_regs[breg] >> (m_regs[creg]&0x1f);","m_regs[breg] = result;" )
-EmitGroup0f(f, "0f_1b", "ASL1_S","UINT32 result = m_regs[creg] << 1;", "m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_19", "LSR_S", "uint32_t result = m_regs[breg] >> (m_regs[creg]&0x1f);","m_regs[breg] = result;" )
+EmitGroup0f(f, "0f_1b", "ASL1_S","uint32_t result = m_regs[creg] << 1;", "m_regs[breg] = result;" )
# xxx_S b, b, u5 format opcodes
EmitGroup17(f, "17_00", "ASL_S", "m_regs[breg] = m_regs[breg] << (u&0x1f);" )
EmitGroup17(f, "17_01", "LSR_S", "m_regs[breg] = m_regs[breg] >> (u&0x1f);" )
-EmitGroup17(f, "17_02", "ASR_S", "INT32 temp = (INT32)m_regs[breg]; m_regs[breg] = temp >> (u&0x1f); // treat it as a signed value, so sign extension occurs during shift" )
+EmitGroup17(f, "17_02", "ASR_S", "int32_t temp = (int32_t)m_regs[breg]; m_regs[breg] = temp >> (u&0x1f); // treat it as a signed value, so sign extension occurs during shift" )
EmitGroup17(f, "17_03", "SUB_S", "m_regs[breg] = m_regs[breg] - u;" )
EmitGroup17(f, "17_04", "BSET_S", "m_regs[breg] = m_regs[breg] | (1 << (u & 0x1f));" )
diff --git a/src/devices/cpu/arcompact/arcompactdasm.cpp b/src/devices/cpu/arcompact/arcompactdasm.cpp
index 755106ce90c..cc77f73c585 100644
--- a/src/devices/cpu/arcompact/arcompactdasm.cpp
+++ b/src/devices/cpu/arcompact/arcompactdasm.cpp
@@ -28,10 +28,10 @@ CPU_DISASSEMBLE(arcompact)
{
int size;
- UINT32 op = oprom[0] | (oprom[1] << 8);
+ uint32_t op = oprom[0] | (oprom[1] << 8);
output = buffer;
- UINT8 instruction = ARCOMPACT_OPERATION;
+ uint8_t instruction = ARCOMPACT_OPERATION;
if (instruction < 0x0c)
{
diff --git a/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp b/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp
index ddd809b84bc..769a8604fc8 100644
--- a/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp
+++ b/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp
@@ -15,7 +15,7 @@
int arcompact_handle00_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr = (op & 0x00010000) >> 16;
+ uint8_t subinstr = (op & 0x00010000) >> 16;
op &= ~0x00010000;
switch (subinstr)
@@ -30,7 +30,7 @@ int arcompact_handle00_dasm(DASM_OPS_32)
int arcompact_handle01_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr = (op & 0x00010000) >> 16;
+ uint8_t subinstr = (op & 0x00010000) >> 16;
op &= ~0x00010000;
switch (subinstr)
@@ -45,7 +45,7 @@ int arcompact_handle01_dasm(DASM_OPS_32)
int arcompact_handle01_00_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr2 = (op & 0x00020000) >> 17;
+ uint8_t subinstr2 = (op & 0x00020000) >> 17;
op &= ~0x00020000;
switch (subinstr2)
@@ -61,7 +61,7 @@ int arcompact_handle01_01_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr2 = (op & 0x00000010) >> 4;
+ uint8_t subinstr2 = (op & 0x00000010) >> 4;
op &= ~0x00000010;
switch (subinstr2)
@@ -76,7 +76,7 @@ int arcompact_handle01_01_dasm(DASM_OPS_32)
int arcompact_handle01_01_00_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr3 = (op & 0x0000000f) >> 0;
+ uint8_t subinstr3 = (op & 0x0000000f) >> 0;
op &= ~0x0000000f;
switch (subinstr3)
@@ -105,7 +105,7 @@ int arcompact_handle01_01_00_dasm(DASM_OPS_32)
int arcompact_handle01_01_01_dasm(DASM_OPS_32) // Branch on Compare/Bit Test Register-Immediate
{
int size = 4;
- UINT8 subinstr3 = (op & 0x0000000f) >> 0;
+ uint8_t subinstr3 = (op & 0x0000000f) >> 0;
op &= ~0x0000000f;
switch (subinstr3)
@@ -146,7 +146,7 @@ int arcompact_handle04_dasm(DASM_OPS_32)
// 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ General Operations Conditional Register
// 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ General Operations Conditional Register (Unsigned 6-bit IMM)
- UINT8 subinstr = (op & 0x003f0000) >> 16;
+ uint8_t subinstr = (op & 0x003f0000) >> 16;
op &= ~0x003f0000;
switch (subinstr)
@@ -223,7 +223,7 @@ int arcompact_handle04_dasm(DASM_OPS_32)
int arcompact_handle04_2f_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr2 = (op & 0x0000003f) >> 0;
+ uint8_t subinstr2 = (op & 0x0000003f) >> 0;
op &= ~0x0000003f;
switch (subinstr2)
@@ -301,7 +301,7 @@ int arcompact_handle04_2f_dasm(DASM_OPS_32)
int arcompact_handle05_2f_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr2 = (op & 0x0000003f) >> 0;
+ uint8_t subinstr2 = (op & 0x0000003f) >> 0;
op &= ~0x0000003f;
switch (subinstr2)
@@ -378,7 +378,7 @@ int arcompact_handle05_2f_dasm(DASM_OPS_32)
int arcompact_handle04_2f_3f_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr3 = (op & 0x07000000) >> 24;
+ uint8_t subinstr3 = (op & 0x07000000) >> 24;
subinstr3 |= ((op & 0x00007000) >> 12) << 3;
op &= ~0x07007000;
@@ -458,7 +458,7 @@ int arcompact_handle04_2f_3f_dasm(DASM_OPS_32)
int arcompact_handle05_2f_3f_dasm(DASM_OPS_32) // useless ZOP group, no actual opcodes
{
int size = 4;
- UINT8 subinstr3 = (op & 0x07000000) >> 24;
+ uint8_t subinstr3 = (op & 0x07000000) >> 24;
subinstr3 |= ((op & 0x00007000) >> 12) << 3;
op &= ~0x07007000;
@@ -539,7 +539,7 @@ int arcompact_handle05_2f_3f_dasm(DASM_OPS_32) // useless ZOP group, no actual o
int arcompact_handle05_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr = (op & 0x003f0000) >> 16;
+ uint8_t subinstr = (op & 0x003f0000) >> 16;
op &= ~0x003f0000;
switch (subinstr)
@@ -616,7 +616,7 @@ int arcompact_handle05_dasm(DASM_OPS_32)
int arcompact_handle0c_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
op &= ~0x0018;
switch (subinstr)
@@ -632,7 +632,7 @@ int arcompact_handle0c_dasm(DASM_OPS_16)
int arcompact_handle0d_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
op &= ~0x0018;
switch (subinstr)
@@ -648,7 +648,7 @@ int arcompact_handle0d_dasm(DASM_OPS_16)
int arcompact_handle0e_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
op &= ~0x0018;
switch (subinstr)
@@ -666,7 +666,7 @@ int arcompact_handle0f_dasm(DASM_OPS_16)
int size = 2;
// General Register Instructions (16-bit)
// 0111 1bbb ccci iiii
- UINT8 subinstr = (op & 0x01f) >> 0;
+ uint8_t subinstr = (op & 0x01f) >> 0;
op &= ~0x001f;
switch (subinstr)
@@ -711,7 +711,7 @@ int arcompact_handle0f_dasm(DASM_OPS_16)
int arcompact_handle0f_00_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
op &= ~0x00e0;
switch (subinstr)
@@ -735,7 +735,7 @@ int arcompact_handle0f_00_07_dasm(DASM_OPS_16)
int size = 2;
// General Operations w/o Register
// 01111 iii 111 00000
- UINT8 subinstr3 = (op & 0x0700) >> 8;
+ uint8_t subinstr3 = (op & 0x0700) >> 8;
op &= ~0x0700;
switch (subinstr3)
@@ -756,7 +756,7 @@ int arcompact_handle0f_00_07_dasm(DASM_OPS_16)
int arcompact_handle17_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
op &= ~0x00e0;
switch (subinstr)
@@ -779,7 +779,7 @@ int arcompact_handle18_dasm(DASM_OPS_16)
int size = 2;
// Stack Pointer Based Instructions (16-bit)
// 11000 bbb iii uuuuu
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
op &= ~0x00e0;
switch (subinstr)
@@ -800,7 +800,7 @@ int arcompact_handle18_dasm(DASM_OPS_16)
int arcompact_handle18_05_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr2 = (op & 0x0700) >> 8;
+ uint8_t subinstr2 = (op & 0x0700) >> 8;
op &= ~0x0700;
switch (subinstr2)
@@ -821,7 +821,7 @@ int arcompact_handle18_05_dasm(DASM_OPS_16)
int arcompact_handle18_06_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr2 = (op & 0x001f) >> 0;
+ uint8_t subinstr2 = (op & 0x001f) >> 0;
op &= ~0x001f;
switch (subinstr2)
@@ -866,7 +866,7 @@ int arcompact_handle18_06_dasm(DASM_OPS_16)
int arcompact_handle18_07_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr2 = (op & 0x001f) >> 0;
+ uint8_t subinstr2 = (op & 0x001f) >> 0;
op &= ~0x001f;
switch (subinstr2)
@@ -911,7 +911,7 @@ int arcompact_handle18_07_dasm(DASM_OPS_16)
int arcompact_handle19_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0600) >> 9;
+ uint8_t subinstr = (op & 0x0600) >> 9;
op &= ~0x0600;
switch (subinstr)
@@ -927,7 +927,7 @@ int arcompact_handle19_dasm(DASM_OPS_16)
int arcompact_handle1c_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0080) >> 7;
+ uint8_t subinstr = (op & 0x0080) >> 7;
op &= ~0x0080;
switch (subinstr)
@@ -941,7 +941,7 @@ int arcompact_handle1c_dasm(DASM_OPS_16)
int arcompact_handle1d_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0080) >> 7;
+ uint8_t subinstr = (op & 0x0080) >> 7;
op &= ~0x0080;
switch (subinstr)
@@ -955,7 +955,7 @@ int arcompact_handle1d_dasm(DASM_OPS_16)
int arcompact_handle1e_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0600) >> 9;
+ uint8_t subinstr = (op & 0x0600) >> 9;
op &= ~0x0600;
switch (subinstr)
@@ -971,7 +971,7 @@ int arcompact_handle1e_dasm(DASM_OPS_16)
int arcompact_handle1e_03_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr2 = (op & 0x01c0) >> 6;
+ uint8_t subinstr2 = (op & 0x01c0) >> 6;
op &= ~0x01c0;
switch (subinstr2)
diff --git a/src/devices/cpu/arcompact/arcompactdasm_dispatch.h b/src/devices/cpu/arcompact/arcompactdasm_dispatch.h
index 40cb06f2d6b..1642871e1cf 100644
--- a/src/devices/cpu/arcompact/arcompactdasm_dispatch.h
+++ b/src/devices/cpu/arcompact/arcompactdasm_dispatch.h
@@ -6,8 +6,8 @@
\*********************************/
-#define DASM_OPS_16 char *output, offs_t pc, UINT16 op, const UINT8* oprom
-#define DASM_OPS_32 char *output, offs_t pc, UINT32 op, const UINT8* oprom
+#define DASM_OPS_16 char *output, offs_t pc, uint16_t op, const uint8_t* oprom
+#define DASM_OPS_32 char *output, offs_t pc, uint32_t op, const uint8_t* oprom
#define DASM_PARAMS output, pc, op, oprom
#define LIMM_REG 62
diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops.cpp b/src/devices/cpu/arcompact/arcompactdasm_ops.cpp
index b9cfc30b545..d8498069682 100644
--- a/src/devices/cpu/arcompact/arcompactdasm_ops.cpp
+++ b/src/devices/cpu/arcompact/arcompactdasm_ops.cpp
@@ -25,7 +25,7 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
#define GET_01_01_01_BRANCH_ADDR \
- INT32 address = (op & 0x00fe0000) >> 17; \
+ int32_t address = (op & 0x00fe0000) >> 17; \
address |= ((op & 0x00008000) >> 15) << 7; \
if (address & 0x80) address = -0x80 + (address & 0x7f); \
op &= ~ 0x00fe800f;
@@ -57,7 +57,7 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
int s_temp = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \
int S = s_temp | (S_temp<<6);
#define COMMON32_GET_CONDITION \
- UINT8 condition = op & 0x0000001f; op &= ~0x0000001f;
+ uint8_t condition = op & 0x0000001f; op &= ~0x0000001f;
#define COMMON16_GET_breg \
@@ -110,7 +110,7 @@ int arcompact_handle00_00_dasm(DASM_OPS_32)
int size = 4;
// Branch Conditionally
// 0000 0sss ssss sss0 SSSS SSSS SSNQ QQQQ
- INT32 address = (op & 0x07fe0000) >> 17;
+ int32_t address = (op & 0x07fe0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
if (address & 0x80000) address = -0x80000 + (address & 0x7ffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
@@ -125,7 +125,7 @@ int arcompact_handle00_01_dasm(DASM_OPS_32)
int size = 4;
// Branch Unconditionally Far
// 0000 0sss ssss sss1 SSSS SSSS SSNR TTTT
- INT32 address = (op & 0x07fe0000) >> 17;
+ int32_t address = (op & 0x07fe0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
if (address & 0x800000) address = -0x800000 + (address & 0x7fffff);
@@ -144,7 +144,7 @@ int arcompact_handle01_00_00dasm(DASM_OPS_32)
// Branch and Link Conditionally
// 00001 sssssssss 00 SSSSSSSSSS N QQQQQ
- INT32 address = (op & 0x07fc0000) >> 17;
+ int32_t address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
@@ -160,7 +160,7 @@ int arcompact_handle01_00_01dasm(DASM_OPS_32)
int size = 4;
// Branch and Link Unconditionally Far
// 00001 sssssssss 10 SSSSSSSSSS N R TTTT
- INT32 address = (op & 0x07fc0000) >> 17;
+ int32_t address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
@@ -196,7 +196,7 @@ int arcompact_01_01_00_helper(DASM_OPS_32, const char* optext)
}
else
{
- UINT32 limm;
+ uint32_t limm;
GET_LIMM_32;
size = 8;
@@ -283,7 +283,7 @@ int arcompact_handle02_dasm(DASM_OPS_32)
int sdat = s | (S << 8); // todo - signed
- UINT32 limm = 0;
+ uint32_t limm = 0;
if (breg == LIMM_REG)
{
GET_LIMM_32;
@@ -309,7 +309,7 @@ int arcompact_handle02_dasm(DASM_OPS_32)
int arcompact_handle03_dasm(DASM_OPS_32)
{
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
// bitpos
// 1111 1111 1111 1111 0000 0000 0000 0000
@@ -374,7 +374,7 @@ int arcompact_handle04_p00_helper_dasm(DASM_OPS_32, const char* optext, int igno
// PP
// 0010 0bbb 00ii iiii FBBB CCCC CCAA AAAA
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
COMMON32_GET_breg;
@@ -446,7 +446,7 @@ int arcompact_handle04_p01_helper_dasm(DASM_OPS_32, const char* optext, int igno
// PP
// 0010 0bbb 01ii iiii FBBB uuuu uuAA AAAA
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
// int got_limm = 0;
COMMON32_GET_breg;
@@ -504,7 +504,7 @@ int arcompact_handle04_p01_helper_dasm(DASM_OPS_32, const char* optext, int igno
int arcompact_handle04_p10_helper_dasm(DASM_OPS_32, const char* optext, int b_reserved)
{
int size = 4;
- UINT32 limm;
+ uint32_t limm;
//int got_limm = 0;
COMMON32_GET_breg;
@@ -543,7 +543,7 @@ int arcompact_handle04_p10_helper_dasm(DASM_OPS_32, const char* optext, int b_re
int arcompact_handle04_p11_m0_helper_dasm(DASM_OPS_32, const char* optext, int b_reserved)
{
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
COMMON32_GET_breg;
@@ -599,7 +599,7 @@ int arcompact_handle04_p11_m0_helper_dasm(DASM_OPS_32, const char* optext, int b
int arcompact_handle04_p11_m1_helper_dasm(DASM_OPS_32, const char* optext, int b_reserved)
{
int size = 4;
- UINT32 limm;
+ uint32_t limm;
//int got_limm = 0;
COMMON32_GET_breg;
@@ -902,7 +902,7 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
COMMON32_GET_p;
@@ -981,7 +981,7 @@ int arcompact_handle04_2b_dasm(DASM_OPS_32) // Store TO Auxiliary register FROM
// rather than using the lPcc opcode
int size = 4;
- UINT32 limm = 0;
+ uint32_t limm = 0;
int got_limm = 0;
COMMON32_GET_p;
@@ -1102,7 +1102,7 @@ int arcompact_handle04_2f_helper_dasm(DASM_OPS_32, const char* optext)
if (creg == LIMM_REG)
{
- UINT32 limm;
+ uint32_t limm;
GET_LIMM_32;
size = 8;
output += sprintf( output, "(%08x) ", limm );
@@ -1167,7 +1167,7 @@ int arcompact_handle04_2f_3f_05_dasm(DASM_OPS_32) { print("BRK (%08x)", op); re
int arcompact_handle04_3x_helper_dasm(DASM_OPS_32, int dsize, int extend)
{
int size = 4;
- UINT32 limm=0;
+ uint32_t limm=0;
int got_limm = 0;
output += sprintf(output, "LD");
@@ -1283,7 +1283,7 @@ int arcompact_handle05_2f_0x_helper_dasm(DASM_OPS_32, const char* optext)
if (creg == LIMM_REG)
{
- UINT32 limm;
+ uint32_t limm;
GET_LIMM_32;
size = 8;
output += sprintf( output, "(%08x) ", limm );
@@ -1451,7 +1451,7 @@ int arcompact_handle0e_0x_helper_dasm(DASM_OPS_16, const char* optext, int revop
if (h == LIMM_REG)
{
- UINT32 limm;
+ uint32_t limm;
GET_LIMM;
size = 6;
if (!revop) print("%s %s <- 0x%08x", optext, regnames[breg], limm);
diff --git a/src/devices/cpu/arcompact/arcompactdasm_ops.h b/src/devices/cpu/arcompact/arcompactdasm_ops.h
index a2d09d83441..338fc9976a0 100644
--- a/src/devices/cpu/arcompact/arcompactdasm_ops.h
+++ b/src/devices/cpu/arcompact/arcompactdasm_ops.h
@@ -9,8 +9,8 @@
#include "arcompact_common.h"
-#define DASM_OPS_16 char *output, offs_t pc, UINT16 op, const UINT8* oprom
-#define DASM_OPS_32 char *output, offs_t pc, UINT32 op, const UINT8* oprom
+#define DASM_OPS_16 char *output, offs_t pc, uint16_t op, const uint8_t* oprom
+#define DASM_OPS_32 char *output, offs_t pc, uint32_t op, const uint8_t* oprom
#define DASM_PARAMS output, pc, op, oprom
#define LIMM_REG 62
diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp
index 31bcfa527dd..b4870ce9f54 100644
--- a/src/devices/cpu/arm/arm.cpp
+++ b/src/devices/cpu/arm/arm.cpp
@@ -96,12 +96,12 @@ static const int sRegisterTable[kNumModes][16] =
#define I_BIT 27
#define F_BIT 26
-#define N_MASK ((UINT32)(1<<N_BIT)) /* Negative flag */
-#define Z_MASK ((UINT32)(1<<Z_BIT)) /* Zero flag */
-#define C_MASK ((UINT32)(1<<C_BIT)) /* Carry flag */
-#define V_MASK ((UINT32)(1<<V_BIT)) /* oVerflow flag */
-#define I_MASK ((UINT32)(1<<I_BIT)) /* Interrupt request disable */
-#define F_MASK ((UINT32)(1<<F_BIT)) /* Fast interrupt request disable */
+#define N_MASK ((uint32_t)(1<<N_BIT)) /* Negative flag */
+#define Z_MASK ((uint32_t)(1<<Z_BIT)) /* Zero flag */
+#define C_MASK ((uint32_t)(1<<C_BIT)) /* Carry flag */
+#define V_MASK ((uint32_t)(1<<V_BIT)) /* oVerflow flag */
+#define I_MASK ((uint32_t)(1<<I_BIT)) /* Interrupt request disable */
+#define F_MASK ((uint32_t)(1<<F_BIT)) /* Fast interrupt request disable */
#define N_IS_SET(pc) ((pc) & N_MASK)
#define Z_IS_SET(pc) ((pc) & Z_MASK)
@@ -117,50 +117,50 @@ static const int sRegisterTable[kNumModes][16] =
#define I_IS_CLEAR(pc) (!I_IS_SET(pc))
#define F_IS_CLEAR(pc) (!F_IS_SET(pc))
-#define PSR_MASK ((UINT32) 0xf0000000u)
-#define IRQ_MASK ((UINT32) 0x0c000000u)
-#define ADDRESS_MASK ((UINT32) 0x03fffffcu)
-#define MODE_MASK ((UINT32) 0x00000003u)
+#define PSR_MASK ((uint32_t) 0xf0000000u)
+#define IRQ_MASK ((uint32_t) 0x0c000000u)
+#define ADDRESS_MASK ((uint32_t) 0x03fffffcu)
+#define MODE_MASK ((uint32_t) 0x00000003u)
#define R15 m_sArmRegister[eR15]
#define MODE (R15&0x03)
-#define SIGN_BIT ((UINT32)(1<<31))
+#define SIGN_BIT ((uint32_t)(1<<31))
#define SIGN_BITS_DIFFER(a,b) (((a)^(b)) >> 31)
/* Deconstructing an instruction */
-#define INSN_COND ((UINT32) 0xf0000000u)
-#define INSN_SDT_L ((UINT32) 0x00100000u)
-#define INSN_SDT_W ((UINT32) 0x00200000u)
-#define INSN_SDT_B ((UINT32) 0x00400000u)
-#define INSN_SDT_U ((UINT32) 0x00800000u)
-#define INSN_SDT_P ((UINT32) 0x01000000u)
-#define INSN_BDT_L ((UINT32) 0x00100000u)
-#define INSN_BDT_W ((UINT32) 0x00200000u)
-#define INSN_BDT_S ((UINT32) 0x00400000u)
-#define INSN_BDT_U ((UINT32) 0x00800000u)
-#define INSN_BDT_P ((UINT32) 0x01000000u)
-#define INSN_BDT_REGS ((UINT32) 0x0000ffffu)
-#define INSN_SDT_IMM ((UINT32) 0x00000fffu)
-#define INSN_MUL_A ((UINT32) 0x00200000u)
-#define INSN_MUL_RM ((UINT32) 0x0000000fu)
-#define INSN_MUL_RS ((UINT32) 0x00000f00u)
-#define INSN_MUL_RN ((UINT32) 0x0000f000u)
-#define INSN_MUL_RD ((UINT32) 0x000f0000u)
-#define INSN_I ((UINT32) 0x02000000u)
-#define INSN_OPCODE ((UINT32) 0x01e00000u)
-#define INSN_S ((UINT32) 0x00100000u)
-#define INSN_BL ((UINT32) 0x01000000u)
-#define INSN_BRANCH ((UINT32) 0x00ffffffu)
-#define INSN_SWI ((UINT32) 0x00ffffffu)
-#define INSN_RN ((UINT32) 0x000f0000u)
-#define INSN_RD ((UINT32) 0x0000f000u)
-#define INSN_OP2 ((UINT32) 0x00000fffu)
-#define INSN_OP2_SHIFT ((UINT32) 0x00000f80u)
-#define INSN_OP2_SHIFT_TYPE ((UINT32) 0x00000070u)
-#define INSN_OP2_RM ((UINT32) 0x0000000fu)
-#define INSN_OP2_ROTATE ((UINT32) 0x00000f00u)
-#define INSN_OP2_IMM ((UINT32) 0x000000ffu)
+#define INSN_COND ((uint32_t) 0xf0000000u)
+#define INSN_SDT_L ((uint32_t) 0x00100000u)
+#define INSN_SDT_W ((uint32_t) 0x00200000u)
+#define INSN_SDT_B ((uint32_t) 0x00400000u)
+#define INSN_SDT_U ((uint32_t) 0x00800000u)
+#define INSN_SDT_P ((uint32_t) 0x01000000u)
+#define INSN_BDT_L ((uint32_t) 0x00100000u)
+#define INSN_BDT_W ((uint32_t) 0x00200000u)
+#define INSN_BDT_S ((uint32_t) 0x00400000u)
+#define INSN_BDT_U ((uint32_t) 0x00800000u)
+#define INSN_BDT_P ((uint32_t) 0x01000000u)
+#define INSN_BDT_REGS ((uint32_t) 0x0000ffffu)
+#define INSN_SDT_IMM ((uint32_t) 0x00000fffu)
+#define INSN_MUL_A ((uint32_t) 0x00200000u)
+#define INSN_MUL_RM ((uint32_t) 0x0000000fu)
+#define INSN_MUL_RS ((uint32_t) 0x00000f00u)
+#define INSN_MUL_RN ((uint32_t) 0x0000f000u)
+#define INSN_MUL_RD ((uint32_t) 0x000f0000u)
+#define INSN_I ((uint32_t) 0x02000000u)
+#define INSN_OPCODE ((uint32_t) 0x01e00000u)
+#define INSN_S ((uint32_t) 0x00100000u)
+#define INSN_BL ((uint32_t) 0x01000000u)
+#define INSN_BRANCH ((uint32_t) 0x00ffffffu)
+#define INSN_SWI ((uint32_t) 0x00ffffffu)
+#define INSN_RN ((uint32_t) 0x000f0000u)
+#define INSN_RD ((uint32_t) 0x0000f000u)
+#define INSN_OP2 ((uint32_t) 0x00000fffu)
+#define INSN_OP2_SHIFT ((uint32_t) 0x00000f80u)
+#define INSN_OP2_SHIFT_TYPE ((uint32_t) 0x00000070u)
+#define INSN_OP2_RM ((uint32_t) 0x0000000fu)
+#define INSN_OP2_ROTATE ((uint32_t) 0x00000f00u)
+#define INSN_OP2_IMM ((uint32_t) 0x000000ffu)
#define INSN_OP2_SHIFT_TYPE_SHIFT 4
#define INSN_OP2_SHIFT_SHIFT 7
#define INSN_OP2_ROTATE_SHIFT 8
@@ -228,7 +228,7 @@ const device_type ARM = &device_creator<arm_cpu_device>;
const device_type ARM_BE = &device_creator<arm_be_cpu_device>;
-arm_cpu_device::arm_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arm_cpu_device::arm_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ARM, "ARM", tag, owner, clock, "arm", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 26, 0)
, m_endian(ENDIANNESS_LITTLE)
@@ -238,7 +238,7 @@ arm_cpu_device::arm_cpu_device(const machine_config &mconfig, const char *tag, d
}
-arm_cpu_device::arm_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, endianness_t endianness)
+arm_cpu_device::arm_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, endianness_t endianness)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", endianness, 32, 26, 0)
, m_endian(endianness)
@@ -248,28 +248,28 @@ arm_cpu_device::arm_cpu_device(const machine_config &mconfig, device_type type,
}
-arm_be_cpu_device::arm_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arm_be_cpu_device::arm_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm_cpu_device(mconfig, ARM_BE, "ARM (big endian)", tag, owner, clock, "arm be", __FILE__, ENDIANNESS_BIG)
{
}
-void arm_cpu_device::cpu_write32( int addr, UINT32 data )
+void arm_cpu_device::cpu_write32( int addr, uint32_t data )
{
/* Unaligned writes are treated as normal writes */
m_program->write_dword(addr&ADDRESS_MASK,data);
if (ARM_DEBUG_CORE && !DWORD_ALIGNED(addr)) logerror("%08x: Unaligned write %08x\n",R15,addr);
}
-void arm_cpu_device::cpu_write8( int addr, UINT8 data )
+void arm_cpu_device::cpu_write8( int addr, uint8_t data )
{
m_program->write_byte(addr,data);
}
-UINT32 arm_cpu_device::cpu_read32( int addr )
+uint32_t arm_cpu_device::cpu_read32( int addr )
{
- UINT32 result = m_program->read_dword(addr&ADDRESS_MASK);
+ uint32_t result = m_program->read_dword(addr&ADDRESS_MASK);
/* Unaligned reads rotate the word, they never combine words */
if (!DWORD_ALIGNED(addr))
@@ -288,27 +288,27 @@ UINT32 arm_cpu_device::cpu_read32( int addr )
return result;
}
-UINT8 arm_cpu_device::cpu_read8( int addr )
+uint8_t arm_cpu_device::cpu_read8( int addr )
{
return m_program->read_byte(addr);
}
-UINT32 arm_cpu_device::GetRegister( int rIndex )
+uint32_t arm_cpu_device::GetRegister( int rIndex )
{
return m_sArmRegister[sRegisterTable[MODE][rIndex]];
}
-void arm_cpu_device::SetRegister( int rIndex, UINT32 value )
+void arm_cpu_device::SetRegister( int rIndex, uint32_t value )
{
m_sArmRegister[sRegisterTable[MODE][rIndex]] = value;
}
-UINT32 arm_cpu_device::GetModeRegister( int mode, int rIndex )
+uint32_t arm_cpu_device::GetModeRegister( int mode, int rIndex )
{
return m_sArmRegister[sRegisterTable[mode][rIndex]];
}
-void arm_cpu_device::SetModeRegister( int mode, int rIndex, UINT32 value )
+void arm_cpu_device::SetModeRegister( int mode, int rIndex, uint32_t value )
{
m_sArmRegister[sRegisterTable[mode][rIndex]] = value;
}
@@ -336,8 +336,8 @@ void arm_cpu_device::device_reset()
void arm_cpu_device::execute_run()
{
- UINT32 pc;
- UINT32 insn;
+ uint32_t pc;
+ uint32_t insn;
do
{
@@ -451,7 +451,7 @@ void arm_cpu_device::execute_run()
void arm_cpu_device::arm_check_irq_state()
{
- UINT32 pc = R15+4; /* save old pc (already incremented in pipeline) */;
+ uint32_t pc = R15+4; /* save old pc (already incremented in pipeline) */;
/* Exception priorities (from ARM6, not specifically ARM2/3):
@@ -575,9 +575,9 @@ void arm_cpu_device::state_string_export(const device_state_entry &entry, std::s
/***************************************************************************/
-void arm_cpu_device::HandleBranch( UINT32 insn )
+void arm_cpu_device::HandleBranch( uint32_t insn )
{
- UINT32 off = (insn & INSN_BRANCH) << 2;
+ uint32_t off = (insn & INSN_BRANCH) << 2;
/* Save PC into LR if this is a branch with link */
if (insn & INSN_BL)
@@ -598,9 +598,9 @@ void arm_cpu_device::HandleBranch( UINT32 insn )
}
-void arm_cpu_device::HandleMemSingle( UINT32 insn )
+void arm_cpu_device::HandleMemSingle( uint32_t insn )
{
- UINT32 rn, rnv, off, rd;
+ uint32_t rn, rnv, off, rd;
/* Fetch the offset */
if (insn & INSN_I)
@@ -669,7 +669,7 @@ void arm_cpu_device::HandleMemSingle( UINT32 insn )
{
if (ARM_DEBUG_CORE && rd == eR15)
logerror("read byte R15 %08x\n", R15);
- SetRegister(rd,(UINT32) cpu_read8(rnv) );
+ SetRegister(rd,(uint32_t) cpu_read8(rnv) );
}
else
{
@@ -705,7 +705,7 @@ void arm_cpu_device::HandleMemSingle( UINT32 insn )
if (ARM_DEBUG_CORE && rd==eR15)
logerror("Wrote R15 in byte mode\n");
- cpu_write8(rnv, (UINT8) GetRegister(rd) & 0xffu);
+ cpu_write8(rnv, (uint8_t) GetRegister(rd) & 0xffu);
}
else
{
@@ -793,10 +793,10 @@ void arm_cpu_device::HandleMemSingle( UINT32 insn )
| (((sc) != 0) << C_BIT)) + 4; \
else R15 += 4;
-void arm_cpu_device::HandleALU( UINT32 insn )
+void arm_cpu_device::HandleALU( uint32_t insn )
{
- UINT32 op2, sc=0, rd, rn, opcode;
- UINT32 by, rdn;
+ uint32_t op2, sc=0, rd, rn, opcode;
+ uint32_t by, rdn;
opcode = (insn & INSN_OPCODE) >> INSN_OPCODE_SHIFT;
m_icount -= S_CYCLE;
@@ -958,9 +958,9 @@ void arm_cpu_device::HandleALU( UINT32 insn )
}
}
-void arm_cpu_device::HandleMul( UINT32 insn)
+void arm_cpu_device::HandleMul( uint32_t insn)
{
- UINT32 r;
+ uint32_t r;
m_icount -= S_CYCLE + I_CYCLE;
/* should be:
@@ -1011,7 +1011,7 @@ void arm_cpu_device::HandleMul( UINT32 insn)
}
-int arm_cpu_device::loadInc(UINT32 pat, UINT32 rbv, UINT32 s)
+int arm_cpu_device::loadInc(uint32_t pat, uint32_t rbv, uint32_t s)
{
int i,result;
@@ -1037,7 +1037,7 @@ int arm_cpu_device::loadInc(UINT32 pat, UINT32 rbv, UINT32 s)
}
-int arm_cpu_device::loadDec(UINT32 pat, UINT32 rbv, UINT32 s, UINT32* deferredR15, int* defer)
+int arm_cpu_device::loadDec(uint32_t pat, uint32_t rbv, uint32_t s, uint32_t* deferredR15, int* defer)
{
int i,result;
@@ -1063,7 +1063,7 @@ int arm_cpu_device::loadDec(UINT32 pat, UINT32 rbv, UINT32 s, UINT32* deferredR1
}
-int arm_cpu_device::storeInc(UINT32 pat, UINT32 rbv)
+int arm_cpu_device::storeInc(uint32_t pat, uint32_t rbv)
{
int i,result;
@@ -1083,7 +1083,7 @@ int arm_cpu_device::storeInc(UINT32 pat, UINT32 rbv)
} /* storeInc */
-int arm_cpu_device::storeDec(UINT32 pat, UINT32 rbv)
+int arm_cpu_device::storeDec(uint32_t pat, uint32_t rbv)
{
int i,result;
@@ -1103,10 +1103,10 @@ int arm_cpu_device::storeDec(UINT32 pat, UINT32 rbv)
} /* storeDec */
-void arm_cpu_device::HandleMemBlock( UINT32 insn )
+void arm_cpu_device::HandleMemBlock( uint32_t insn )
{
- UINT32 rb = (insn & INSN_RN) >> INSN_RN_SHIFT;
- UINT32 rbp = GetRegister(rb);
+ uint32_t rb = (insn & INSN_RN) >> INSN_RN_SHIFT;
+ uint32_t rbp = GetRegister(rb);
int result;
if (ARM_DEBUG_CORE && insn & INSN_BDT_S)
@@ -1154,7 +1154,7 @@ void arm_cpu_device::HandleMemBlock( UINT32 insn )
}
else
{
- UINT32 deferredR15=0;
+ uint32_t deferredR15=0;
int defer=0;
/* Decrementing */
@@ -1242,11 +1242,11 @@ void arm_cpu_device::HandleMemBlock( UINT32 insn )
* shifter carry output will manifest itself as @*carry == 0@ for carry clear
* and @*carry != 0@ for carry set.
*/
-UINT32 arm_cpu_device::decodeShift(UINT32 insn, UINT32 *pCarry)
+uint32_t arm_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
{
- UINT32 k = (insn & INSN_OP2_SHIFT) >> INSN_OP2_SHIFT_SHIFT;
- UINT32 rm = GetRegister( insn & INSN_OP2_RM );
- UINT32 t = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
+ uint32_t k = (insn & INSN_OP2_SHIFT) >> INSN_OP2_SHIFT_SHIFT;
+ uint32_t rm = GetRegister( insn & INSN_OP2_RM );
+ uint32_t t = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
if ((insn & INSN_OP2_RM)==0xf)
{
@@ -1332,10 +1332,10 @@ UINT32 arm_cpu_device::decodeShift(UINT32 insn, UINT32 *pCarry)
} /* decodeShift */
-UINT32 arm_cpu_device::BCDToDecimal(UINT32 value)
+uint32_t arm_cpu_device::BCDToDecimal(uint32_t value)
{
- UINT32 accumulator = 0;
- UINT32 multiplier = 1;
+ uint32_t accumulator = 0;
+ uint32_t multiplier = 1;
int i;
for(i = 0; i < 8; i++)
@@ -1350,15 +1350,15 @@ UINT32 arm_cpu_device::BCDToDecimal(UINT32 value)
}
-UINT32 arm_cpu_device::DecimalToBCD(UINT32 value)
+uint32_t arm_cpu_device::DecimalToBCD(uint32_t value)
{
- UINT32 accumulator = 0;
- UINT32 divisor = 10;
+ uint32_t accumulator = 0;
+ uint32_t divisor = 10;
int i;
for(i = 0; i < 8; i++)
{
- UINT32 temp;
+ uint32_t temp;
temp = value % divisor;
value -= temp;
@@ -1372,10 +1372,10 @@ UINT32 arm_cpu_device::DecimalToBCD(UINT32 value)
return accumulator;
}
-void arm_cpu_device::HandleCoProVL86C020( UINT32 insn )
+void arm_cpu_device::HandleCoProVL86C020( uint32_t insn )
{
- UINT32 rn=(insn>>12)&0xf;
- UINT32 crn=(insn>>16)&0xf;
+ uint32_t rn=(insn>>12)&0xf;
+ uint32_t crn=(insn>>16)&0xf;
m_icount -= S_CYCLE;
@@ -1412,10 +1412,10 @@ void arm_cpu_device::HandleCoProVL86C020( UINT32 insn )
}
}
-void arm_cpu_device::HandleCoPro( UINT32 insn )
+void arm_cpu_device::HandleCoPro( uint32_t insn )
{
- UINT32 rn=(insn>>12)&0xf;
- UINT32 crn=(insn>>16)&0xf;
+ uint32_t rn=(insn>>12)&0xf;
+ uint32_t crn=(insn>>16)&0xf;
m_icount -= S_CYCLE;
@@ -1506,14 +1506,14 @@ void arm_cpu_device::HandleCoPro( UINT32 insn )
}
-offs_t arm_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t arm_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( arm );
return CPU_DISASSEMBLE_NAME(arm)(this, buffer, pc, oprom, opram, options);
}
-offs_t arm_be_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t arm_be_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( arm_be );
return CPU_DISASSEMBLE_NAME(arm_be)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/arm/arm.h b/src/devices/cpu/arm/arm.h
index d2f6156127b..051c88f64b9 100644
--- a/src/devices/cpu/arm/arm.h
+++ b/src/devices/cpu/arm/arm.h
@@ -40,8 +40,8 @@ class arm_cpu_device : public cpu_device
{
public:
// construction/destruction
- arm_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- arm_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, endianness_t endianness);
+ arm_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ arm_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, endianness_t endianness);
static void set_copro_type(device_t &device, int type) { downcast<arm_cpu_device &>(device).m_copro_type = type; }
@@ -51,9 +51,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 3; }
- virtual UINT32 execute_max_cycles() const override { return 4; }
- virtual UINT32 execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_min_cycles() const override { return 3; }
+ virtual uint32_t execute_max_cycles() const override { return 4; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -64,45 +64,45 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
int m_icount;
- UINT32 m_sArmRegister[27];
- UINT32 m_coproRegister[16];
- UINT8 m_pendingIrq;
- UINT8 m_pendingFiq;
+ uint32_t m_sArmRegister[27];
+ uint32_t m_coproRegister[16];
+ uint8_t m_pendingIrq;
+ uint8_t m_pendingFiq;
address_space *m_program;
direct_read_data *m_direct;
endianness_t m_endian;
- UINT8 m_copro_type;
-
- void cpu_write32( int addr, UINT32 data );
- void cpu_write8( int addr, UINT8 data );
- UINT32 cpu_read32( int addr );
- UINT8 cpu_read8( int addr );
- UINT32 GetRegister( int rIndex );
- void SetRegister( int rIndex, UINT32 value );
- UINT32 GetModeRegister( int mode, int rIndex );
- void SetModeRegister( int mode, int rIndex, UINT32 value );
- void HandleALU(UINT32 insn);
- void HandleMul(UINT32 insn);
- void HandleBranch(UINT32 insn);
- void HandleMemSingle(UINT32 insn);
- void HandleMemBlock(UINT32 insn);
- void HandleCoPro(UINT32 insn);
- void HandleCoProVL86C020(UINT32 insn);
- UINT32 decodeShift(UINT32 insn, UINT32 *pCarry);
+ uint8_t m_copro_type;
+
+ void cpu_write32( int addr, uint32_t data );
+ void cpu_write8( int addr, uint8_t data );
+ uint32_t cpu_read32( int addr );
+ uint8_t cpu_read8( int addr );
+ uint32_t GetRegister( int rIndex );
+ void SetRegister( int rIndex, uint32_t value );
+ uint32_t GetModeRegister( int mode, int rIndex );
+ void SetModeRegister( int mode, int rIndex, uint32_t value );
+ void HandleALU(uint32_t insn);
+ void HandleMul(uint32_t insn);
+ void HandleBranch(uint32_t insn);
+ void HandleMemSingle(uint32_t insn);
+ void HandleMemBlock(uint32_t insn);
+ void HandleCoPro(uint32_t insn);
+ void HandleCoProVL86C020(uint32_t insn);
+ uint32_t decodeShift(uint32_t insn, uint32_t *pCarry);
void arm_check_irq_state();
- int loadInc(UINT32 pat, UINT32 rbv, UINT32 s);
- int loadDec(UINT32 pat, UINT32 rbv, UINT32 s, UINT32* deferredR15, int* defer);
- int storeInc(UINT32 pat, UINT32 rbv);
- int storeDec(UINT32 pat, UINT32 rbv);
- static UINT32 BCDToDecimal(UINT32 value);
- static UINT32 DecimalToBCD(UINT32 value);
+ int loadInc(uint32_t pat, uint32_t rbv, uint32_t s);
+ int loadDec(uint32_t pat, uint32_t rbv, uint32_t s, uint32_t* deferredR15, int* defer);
+ int storeInc(uint32_t pat, uint32_t rbv);
+ int storeDec(uint32_t pat, uint32_t rbv);
+ static uint32_t BCDToDecimal(uint32_t value);
+ static uint32_t DecimalToBCD(uint32_t value);
};
@@ -110,10 +110,10 @@ class arm_be_cpu_device : public arm_cpu_device
{
public:
// construction/destruction
- arm_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ arm_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
diff --git a/src/devices/cpu/arm/armdasm.cpp b/src/devices/cpu/arm/armdasm.cpp
index 83860b22aff..08a0b282afe 100644
--- a/src/devices/cpu/arm/armdasm.cpp
+++ b/src/devices/cpu/arm/armdasm.cpp
@@ -9,10 +9,10 @@
#include "emu.h"
#include "arm.h"
-static char *WriteImmediateOperand( char *pBuf, UINT32 opcode )
+static char *WriteImmediateOperand( char *pBuf, uint32_t opcode )
{
/* rrrrbbbbbbbb */
- UINT32 imm;
+ uint32_t imm;
int r;
imm = opcode&0xff;
@@ -22,7 +22,7 @@ static char *WriteImmediateOperand( char *pBuf, UINT32 opcode )
return pBuf;
}
-static char *WriteDataProcessingOperand( char *pBuf, UINT32 opcode, int printOp0, int printOp1, int printOp2 )
+static char *WriteDataProcessingOperand( char *pBuf, uint32_t opcode, int printOp0, int printOp1, int printOp2 )
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@@ -55,7 +55,7 @@ static char *WriteDataProcessingOperand( char *pBuf, UINT32 opcode, int printOp0
return pBuf;
}
-static char *WriteRegisterOperand1( char *pBuf, UINT32 opcode )
+static char *WriteRegisterOperand1( char *pBuf, uint32_t opcode )
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@@ -80,7 +80,7 @@ static char *WriteRegisterOperand1( char *pBuf, UINT32 opcode )
} /* WriteRegisterOperand */
-static char *WriteBranchAddress( char *pBuf, UINT32 pc, UINT32 opcode )
+static char *WriteBranchAddress( char *pBuf, uint32_t pc, uint32_t opcode )
{
opcode &= 0x00ffffff;
if( opcode&0x00800000 )
@@ -102,7 +102,7 @@ static char *WritePadding( char *pBuf, const char *pBuf0 )
return pBuf;
}
-static UINT32 arm_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
+static uint32_t arm_disasm( char *pBuf, uint32_t pc, uint32_t opcode )
{
const char *pBuf0;
@@ -121,7 +121,7 @@ static UINT32 arm_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
"ORR","MOV","BIC","MVN"
};
const char *pConditionCode;
- UINT32 dasmflags = 0;
+ uint32_t dasmflags = 0;
pConditionCode= pConditionCodeTable[opcode>>28];
pBuf0 = pBuf;
@@ -397,12 +397,12 @@ static UINT32 arm_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
CPU_DISASSEMBLE( arm )
{
- UINT32 opcode = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
+ uint32_t opcode = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
return 4 | arm_disasm(buffer, pc, opcode);
}
CPU_DISASSEMBLE( arm_be )
{
- UINT32 opcode = oprom[3] | (oprom[2] << 8) | (oprom[1] << 16) | (oprom[0] << 24);
+ uint32_t opcode = oprom[3] | (oprom[2] << 8) | (oprom[1] << 16) | (oprom[0] << 24);
return 4 | arm_disasm(buffer, pc, opcode);
}
diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp
index 952ddc46c73..5a3dd15be17 100644
--- a/src/devices/cpu/arm7/arm7.cpp
+++ b/src/devices/cpu/arm7/arm7.cpp
@@ -37,12 +37,12 @@ TODO:
/* prototypes of coprocessor functions */
-void arm7_dt_r_callback(arm_state *arm, UINT32 insn, UINT32 *prn, UINT32 (*read32)(arm_state *arm, UINT32 addr));
-void arm7_dt_w_callback(arm_state *arm, UINT32 insn, UINT32 *prn, void (*write32)(arm_state *arm, UINT32 addr, UINT32 data));
+void arm7_dt_r_callback(arm_state *arm, uint32_t insn, uint32_t *prn, uint32_t (*read32)(arm_state *arm, uint32_t addr));
+void arm7_dt_w_callback(arm_state *arm, uint32_t insn, uint32_t *prn, void (*write32)(arm_state *arm, uint32_t addr, uint32_t data));
// holder for the co processor Data Transfer Read & Write Callback funcs
-void (*arm7_coproc_dt_r_callback)(arm_state *arm, UINT32 insn, UINT32 *prn, UINT32 (*read32)(arm_state *arm, UINT32 addr));
-void (*arm7_coproc_dt_w_callback)(arm_state *arm, UINT32 insn, UINT32 *prn, void (*write32)(arm_state *arm, UINT32 addr, UINT32 data));
+void (*arm7_coproc_dt_r_callback)(arm_state *arm, uint32_t insn, uint32_t *prn, uint32_t (*read32)(arm_state *arm, uint32_t addr));
+void (*arm7_coproc_dt_w_callback)(arm_state *arm, uint32_t insn, uint32_t *prn, void (*write32)(arm_state *arm, uint32_t addr, uint32_t data));
const device_type ARM7 = &device_creator<arm7_cpu_device>;
@@ -54,7 +54,7 @@ const device_type PXA255 = &device_creator<pxa255_cpu_device>;
const device_type SA1110 = &device_creator<sa1110_cpu_device>;
-arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ARM7, "ARM7", tag, owner, clock, "arm7", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0)
, m_endian(ENDIANNESS_LITTLE)
@@ -67,7 +67,7 @@ arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, const char *tag,
}
-arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, UINT8 archRev, UINT8 archFlags, endianness_t endianness)
+arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, uint8_t archRev, uint8_t archFlags, endianness_t endianness)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", endianness, 32, 32, 0)
, m_endian(endianness)
@@ -80,20 +80,20 @@ arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, device_type type
}
-arm7_be_cpu_device::arm7_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arm7_be_cpu_device::arm7_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM7_BE, "ARM7 (big endian)", tag, owner, clock, "arm7_be", __FILE__, 4, eARM_ARCHFLAGS_T, ENDIANNESS_BIG)
{
}
-arm7500_cpu_device::arm7500_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arm7500_cpu_device::arm7500_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM7500, "ARM7500", tag, owner, clock, "arm7500", __FILE__, 3, eARM_ARCHFLAGS_MODE26)
{
m_copro_id = (0x41 << 24) | (0 << 20) | (1 << 16) | (0x710 << 4) | (0 << 0);
}
-arm9_cpu_device::arm9_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arm9_cpu_device::arm9_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM9, "ARM9", tag, owner, clock, "arm9", __FILE__, 5, eARM_ARCHFLAGS_T | eARM_ARCHFLAGS_E)
// ARMv5
// has TE extensions
@@ -101,7 +101,7 @@ arm9_cpu_device::arm9_cpu_device(const machine_config &mconfig, const char *tag,
}
-arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM920T, "ARM920T", tag, owner, clock, "arm920t", __FILE__, 4, eARM_ARCHFLAGS_T)
// ARMv4
// has T extension
@@ -110,7 +110,7 @@ arm920t_cpu_device::arm920t_cpu_device(const machine_config &mconfig, const char
}
-pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, PXA255, "PXA255", tag, owner, clock, "pxa255", __FILE__, 5, eARM_ARCHFLAGS_T | eARM_ARCHFLAGS_E | eARM_ARCHFLAGS_XSCALE)
// ARMv5
// has TE and XScale extensions
@@ -118,7 +118,7 @@ pxa255_cpu_device::pxa255_cpu_device(const machine_config &mconfig, const char *
}
-sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, SA1110, "SA1110", tag, owner, clock, "sa1110", __FILE__, 4, eARM_ARCHFLAGS_SA)
// ARMv4
// has StrongARM, no Thumb, no Enhanced DSP
@@ -130,9 +130,9 @@ void arm7_cpu_device::update_reg_ptr()
m_reg_group = sRegisterTable[GET_MODE];
}
-void arm7_cpu_device::set_cpsr(UINT32 val)
+void arm7_cpu_device::set_cpsr(uint32_t val)
{
- UINT8 old_mode = GET_CPSR & MODE_FLAG;
+ uint8_t old_mode = GET_CPSR & MODE_FLAG;
if (m_archFlags & eARM_ARCHFLAGS_MODE26)
{
if ((val & 0x10) != (m_r[eCPSR] & 0x10))
@@ -189,9 +189,9 @@ enum
// COARSE, desc_level1, vaddr
-UINT32 arm7_cpu_device::arm7_tlb_get_second_level_descriptor( UINT32 granularity, UINT32 first_desc, UINT32 vaddr )
+uint32_t arm7_cpu_device::arm7_tlb_get_second_level_descriptor( uint32_t granularity, uint32_t first_desc, uint32_t vaddr )
{
- UINT32 desc_lvl2 = vaddr;
+ uint32_t desc_lvl2 = vaddr;
switch( granularity )
{
@@ -294,7 +294,7 @@ bool arm7_cpu_device::arm7_tlb_translate(offs_t &addr, int flags)
addr += m_pid_offset;
}
- UINT32 desc_lvl1 = m_program->read_dword(m_tlb_base_mask | ((addr & COPRO_TLB_VADDR_FLTI_MASK) >> COPRO_TLB_VADDR_FLTI_MASK_SHIFT));
+ uint32_t desc_lvl1 = m_program->read_dword(m_tlb_base_mask | ((addr & COPRO_TLB_VADDR_FLTI_MASK) >> COPRO_TLB_VADDR_FLTI_MASK_SHIFT));
#if ARM7_MMU_ENABLE_HACK
if ((m_r[eR15] == (m_mmu_enable_addr + 4)) || (m_r[eR15] == (m_mmu_enable_addr + 8)))
@@ -308,7 +308,7 @@ bool arm7_cpu_device::arm7_tlb_translate(offs_t &addr, int flags)
}
#endif
- UINT8 tlb_type = desc_lvl1 & 3;
+ uint8_t tlb_type = desc_lvl1 & 3;
if (tlb_type == COPRO_TLB_SECTION_TABLE)
{
// Entry is a section
@@ -321,7 +321,7 @@ bool arm7_cpu_device::arm7_tlb_translate(offs_t &addr, int flags)
{
if (flags & ARM7_TLB_ABORT_D)
{
- UINT8 domain = (desc_lvl1 >> 5) & 0xF;
+ uint8_t domain = (desc_lvl1 >> 5) & 0xF;
LOG( ( "ARM7: Section Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", addr, m_r[eR15] ) );
m_faultStatus[0] = ((fault == FAULT_DOMAIN) ? (9 << 0) : (13 << 0)) | (domain << 4); // 9 = section domain fault, 13 = section permission fault
m_faultAddress = addr;
@@ -358,11 +358,11 @@ bool arm7_cpu_device::arm7_tlb_translate(offs_t &addr, int flags)
else
{
// Entry is the physical address of a coarse second-level table
- UINT8 permission = (m_domainAccessControl >> ((desc_lvl1 >> 4) & 0x1e)) & 3;
- UINT32 desc_lvl2 = arm7_tlb_get_second_level_descriptor( (desc_lvl1 & 3) == COPRO_TLB_COARSE_TABLE ? TLB_COARSE : TLB_FINE, desc_lvl1, addr );
+ uint8_t permission = (m_domainAccessControl >> ((desc_lvl1 >> 4) & 0x1e)) & 3;
+ uint32_t desc_lvl2 = arm7_tlb_get_second_level_descriptor( (desc_lvl1 & 3) == COPRO_TLB_COARSE_TABLE ? TLB_COARSE : TLB_FINE, desc_lvl1, addr );
if ((permission != 1) && (permission != 3))
{
- UINT8 domain = (desc_lvl1 >> 5) & 0xF;
+ uint8_t domain = (desc_lvl1 >> 5) & 0xF;
fatalerror("ARM7: Not Yet Implemented: Coarse Table, Section Domain fault on virtual address, vaddr = %08x, domain = %08x, PC = %08x\n", addr, domain, m_r[eR15]);
}
@@ -372,7 +372,7 @@ bool arm7_cpu_device::arm7_tlb_translate(offs_t &addr, int flags)
// Unmapped, generate a translation fault
if (flags & ARM7_TLB_ABORT_D)
{
- UINT8 domain = (desc_lvl1 >> 5) & 0xF;
+ uint8_t domain = (desc_lvl1 >> 5) & 0xF;
LOG( ( "ARM7: Translation fault on unmapped virtual address, vaddr = %08x, PC %08X\n", addr, m_r[eR15] ) );
m_faultStatus[0] = (7 << 0) | (domain << 4); // 7 = page translation fault
m_faultAddress = addr;
@@ -391,7 +391,7 @@ bool arm7_cpu_device::arm7_tlb_translate(offs_t &addr, int flags)
case COPRO_TLB_SMALL_PAGE:
// Small page descriptor
{
- UINT8 ap = ((((desc_lvl2 >> 4) & 0xFF) >> (((addr >> 10) & 3) << 1)) & 3);
+ uint8_t ap = ((((desc_lvl2 >> 4) & 0xFF) >> (((addr >> 10) & 3) << 1)) & 3);
int fault = detect_fault(desc_lvl1, ap, flags);
if (fault == FAULT_NONE)
{
@@ -401,7 +401,7 @@ bool arm7_cpu_device::arm7_tlb_translate(offs_t &addr, int flags)
{
if (flags & ARM7_TLB_ABORT_D)
{
- UINT8 domain = (desc_lvl1 >> 5) & 0xF;
+ uint8_t domain = (desc_lvl1 >> 5) & 0xF;
// hapyfish expects a data abort when something tries to write to a read-only memory location from user mode
LOG( ( "ARM7: Page Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", addr, m_r[eR15] ) );
m_faultStatus[0] = ((fault == FAULT_DOMAIN) ? (11 << 0) : (15 << 0)) | (domain << 4); // 11 = page domain fault, 15 = page permission fault
@@ -571,7 +571,7 @@ void arm7_cpu_device::device_reset()
m_fcsePID = 0;
m_pid_offset = 0;
m_domainAccessControl = 0;
- memset(m_decoded_access_control, 0, sizeof(UINT8) * 16);
+ memset(m_decoded_access_control, 0, sizeof(uint8_t) * 16);
/* start up in SVC mode with interrupts disabled. */
m_r[eCPSR] = I_MASK | F_MASK | 0x10;
@@ -588,11 +588,11 @@ void arm7_cpu_device::device_reset()
void arm7_cpu_device::execute_run()
{
- UINT32 insn;
+ uint32_t insn;
do
{
- UINT32 pc = GET_PC;
+ uint32_t pc = GET_PC;
debugger_instruction_hook(this, pc);
@@ -638,7 +638,7 @@ void arm7_cpu_device::execute_run()
#if 0
if (MODE26)
{
- UINT32 temp1, temp2;
+ uint32_t temp1, temp2;
temp1 = GET_CPSR & 0xF00000C3;
temp2 = (R15 & 0xF0000000) | ((R15 & 0x0C000000) >> (26 - 6)) | (R15 & 0x00000003);
if (temp1 != temp2) fatalerror( "%08X: 32-bit and 26-bit modes are out of sync (%08X %08X)\n", pc, temp1, temp2);
@@ -756,7 +756,7 @@ void arm7_cpu_device::execute_set_input(int irqline, int state)
}
-offs_t arm7_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t arm7_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( arm7arm );
extern CPU_DISASSEMBLE( arm7thumb );
@@ -789,12 +789,12 @@ WRITE32_MEMBER( arm7_cpu_device::arm7_do_callback )
READ32_MEMBER( arm7_cpu_device::arm7_rt_r_callback )
{
- UINT32 opcode = offset;
- UINT8 cReg = ( opcode & INSN_COPRO_CREG ) >> INSN_COPRO_CREG_SHIFT;
- UINT8 op2 = ( opcode & INSN_COPRO_OP2 ) >> INSN_COPRO_OP2_SHIFT;
- UINT8 op3 = opcode & INSN_COPRO_OP3;
- UINT8 cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
- UINT32 data = 0;
+ uint32_t opcode = offset;
+ uint8_t cReg = ( opcode & INSN_COPRO_CREG ) >> INSN_COPRO_CREG_SHIFT;
+ uint8_t op2 = ( opcode & INSN_COPRO_OP2 ) >> INSN_COPRO_OP2_SHIFT;
+ uint8_t op3 = opcode & INSN_COPRO_OP3;
+ uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
+ uint32_t data = 0;
// printf("cpnum %d cReg %d op2 %d op3 %d (%x)\n", cpnum, cReg, op2, op3, GET_REGISTER(arm, 15));
@@ -809,7 +809,7 @@ READ32_MEMBER( arm7_cpu_device::arm7_rt_r_callback )
switch( cReg )
{
case 1: // clock counter
- data = (UINT32)total_cycles();
+ data = (uint32_t)total_cycles();
break;
default:
@@ -952,11 +952,11 @@ READ32_MEMBER( arm7_cpu_device::arm7_rt_r_callback )
WRITE32_MEMBER( arm7_cpu_device::arm7_rt_w_callback )
{
- UINT32 opcode = offset;
- UINT8 cReg = ( opcode & INSN_COPRO_CREG ) >> INSN_COPRO_CREG_SHIFT;
- UINT8 op2 = ( opcode & INSN_COPRO_OP2 ) >> INSN_COPRO_OP2_SHIFT;
- UINT8 op3 = opcode & INSN_COPRO_OP3;
- UINT8 cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
+ uint32_t opcode = offset;
+ uint8_t cReg = ( opcode & INSN_COPRO_CREG ) >> INSN_COPRO_CREG_SHIFT;
+ uint8_t op2 = ( opcode & INSN_COPRO_OP2 ) >> INSN_COPRO_OP2_SHIFT;
+ uint8_t op3 = opcode & INSN_COPRO_OP3;
+ uint8_t cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
// handle XScale specific CP14 - just eat writes for now
if (cpnum != 15)
@@ -1060,9 +1060,9 @@ WRITE32_MEMBER( arm7_cpu_device::arm7_rt_w_callback )
}
-void arm7_cpu_device::arm7_dt_r_callback(UINT32 insn, UINT32 *prn)
+void arm7_cpu_device::arm7_dt_r_callback(uint32_t insn, uint32_t *prn)
{
- UINT8 cpn = (insn >> 8) & 0xF;
+ uint8_t cpn = (insn >> 8) & 0xF;
if ((m_archFlags & eARM_ARCHFLAGS_XSCALE) && (cpn == 0))
{
LOG( ( "arm7_dt_r_callback: DSP Coprocessor 0 (CP0) not yet emulated (PC %08x)\n", GET_PC ) );
@@ -1074,9 +1074,9 @@ void arm7_cpu_device::arm7_dt_r_callback(UINT32 insn, UINT32 *prn)
}
-void arm7_cpu_device::arm7_dt_w_callback(UINT32 insn, UINT32 *prn)
+void arm7_cpu_device::arm7_dt_w_callback(uint32_t insn, uint32_t *prn)
{
- UINT8 cpn = (insn >> 8) & 0xF;
+ uint8_t cpn = (insn >> 8) & 0xF;
if ((m_archFlags & eARM_ARCHFLAGS_XSCALE) && (cpn == 0))
{
LOG( ( "arm7_dt_w_callback: DSP Coprocessor 0 (CP0) not yet emulated (PC %08x)\n", GET_PC ) );
@@ -1091,7 +1091,7 @@ void arm7_cpu_device::arm7_dt_w_callback(UINT32 insn, UINT32 *prn)
/***************************************************************************
* Default Memory Handlers
***************************************************************************/
-void arm7_cpu_device::arm7_cpu_write32(UINT32 addr, UINT32 data)
+void arm7_cpu_device::arm7_cpu_write32(uint32_t addr, uint32_t data)
{
if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
{
@@ -1106,7 +1106,7 @@ void arm7_cpu_device::arm7_cpu_write32(UINT32 addr, UINT32 data)
}
-void arm7_cpu_device::arm7_cpu_write16(UINT32 addr, UINT16 data)
+void arm7_cpu_device::arm7_cpu_write16(uint32_t addr, uint16_t data)
{
if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
{
@@ -1120,7 +1120,7 @@ void arm7_cpu_device::arm7_cpu_write16(UINT32 addr, UINT16 data)
m_program->write_word(addr, data);
}
-void arm7_cpu_device::arm7_cpu_write8(UINT32 addr, UINT8 data)
+void arm7_cpu_device::arm7_cpu_write8(uint32_t addr, uint8_t data)
{
if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
{
@@ -1133,9 +1133,9 @@ void arm7_cpu_device::arm7_cpu_write8(UINT32 addr, UINT8 data)
m_program->write_byte(addr, data);
}
-UINT32 arm7_cpu_device::arm7_cpu_read32(UINT32 addr)
+uint32_t arm7_cpu_device::arm7_cpu_read32(uint32_t addr)
{
- UINT32 result;
+ uint32_t result;
if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
{
@@ -1158,9 +1158,9 @@ UINT32 arm7_cpu_device::arm7_cpu_read32(UINT32 addr)
return result;
}
-UINT16 arm7_cpu_device::arm7_cpu_read16(UINT32 addr)
+uint16_t arm7_cpu_device::arm7_cpu_read16(uint32_t addr)
{
- UINT16 result;
+ uint16_t result;
if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
{
@@ -1180,7 +1180,7 @@ UINT16 arm7_cpu_device::arm7_cpu_read16(UINT32 addr)
return result;
}
-UINT8 arm7_cpu_device::arm7_cpu_read8(UINT32 addr)
+uint8_t arm7_cpu_device::arm7_cpu_read8(uint32_t addr)
{
if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
{
diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h
index 27615a7dbb1..94b0f9cff4e 100644
--- a/src/devices/cpu/arm7/arm7.h
+++ b/src/devices/cpu/arm7/arm7.h
@@ -50,8 +50,8 @@ class arm7_cpu_device : public cpu_device
{
public:
// construction/destruction
- arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- arm7_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, UINT8 archRev, UINT8 archFlags, endianness_t endianness = ENDIANNESS_LITTLE);
+ arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ arm7_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, uint8_t archRev, uint8_t archFlags, endianness_t endianness = ENDIANNESS_LITTLE);
protected:
// device-level overrides
@@ -59,9 +59,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 3; }
- virtual UINT32 execute_max_cycles() const override { return 4; }
- virtual UINT32 execute_input_lines() const override { return 4; } /* There are actually only 2 input lines: we use 3 variants of the ABORT line while there is only 1 real one */
+ virtual uint32_t execute_min_cycles() const override { return 3; }
+ virtual uint32_t execute_max_cycles() const override { return 4; }
+ virtual uint32_t execute_input_lines() const override { return 4; } /* There are actually only 2 input lines: we use 3 variants of the ABORT line while there is only 1 real one */
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -74,13 +74,13 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
- UINT32 m_r[/*NUM_REGS*/37];
+ uint32_t m_r[/*NUM_REGS*/37];
bool m_pendingIrq;
bool m_pendingFiq;
bool m_pendingAbtD;
@@ -94,180 +94,180 @@ protected:
direct_read_data *m_direct;
/* Coprocessor Registers */
- UINT32 m_control;
- UINT32 m_tlbBase;
- UINT32 m_tlb_base_mask;
- UINT32 m_faultStatus[2];
- UINT32 m_faultAddress;
- UINT32 m_fcsePID;
- UINT32 m_pid_offset;
- UINT32 m_domainAccessControl;
- UINT8 m_decoded_access_control[16];
-
- UINT8 m_archRev; // ARM architecture revision (3, 4, and 5 are valid)
- UINT8 m_archFlags; // architecture flags
+ uint32_t m_control;
+ uint32_t m_tlbBase;
+ uint32_t m_tlb_base_mask;
+ uint32_t m_faultStatus[2];
+ uint32_t m_faultAddress;
+ uint32_t m_fcsePID;
+ uint32_t m_pid_offset;
+ uint32_t m_domainAccessControl;
+ uint8_t m_decoded_access_control[16];
+
+ uint8_t m_archRev; // ARM architecture revision (3, 4, and 5 are valid)
+ uint8_t m_archFlags; // architecture flags
//#if ARM7_MMU_ENABLE_HACK
-// UINT32 mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
+// uint32_t mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
//#endif
- UINT32 m_copro_id;
+ uint32_t m_copro_id;
// For debugger
- UINT32 m_pc;
-
- INT64 saturate_qbit_overflow(INT64 res);
- void SwitchMode(UINT32 cpsr_mode_val);
- UINT32 decodeShift(UINT32 insn, UINT32 *pCarry);
- int loadInc(UINT32 pat, UINT32 rbv, UINT32 s, int mode);
- int loadDec(UINT32 pat, UINT32 rbv, UINT32 s, int mode);
- int storeInc(UINT32 pat, UINT32 rbv, int mode);
- int storeDec(UINT32 pat, UINT32 rbv, int mode);
- void HandleCoProcDO(UINT32 insn);
- void HandleCoProcRT(UINT32 insn);
- void HandleCoProcDT(UINT32 insn);
- void HandleBranch(UINT32 insn);
- void HandleMemSingle(UINT32 insn);
- void HandleHalfWordDT(UINT32 insn);
- void HandleSwap(UINT32 insn);
- void HandlePSRTransfer(UINT32 insn);
- void HandleALU(UINT32 insn);
- void HandleMul(UINT32 insn);
- void HandleSMulLong(UINT32 insn);
- void HandleUMulLong(UINT32 insn);
- void HandleMemBlock(UINT32 insn);
- void arm7ops_0123(UINT32 insn);
- void arm7ops_4567(UINT32 insn);
- void arm7ops_89(UINT32 insn);
- void arm7ops_ab(UINT32 insn);
- void arm7ops_cd(UINT32 insn);
- void arm7ops_e(UINT32 insn);
- void arm7ops_f(UINT32 insn);
- void set_cpsr(UINT32 val);
+ uint32_t m_pc;
+
+ int64_t saturate_qbit_overflow(int64_t res);
+ void SwitchMode(uint32_t cpsr_mode_val);
+ uint32_t decodeShift(uint32_t insn, uint32_t *pCarry);
+ int loadInc(uint32_t pat, uint32_t rbv, uint32_t s, int mode);
+ int loadDec(uint32_t pat, uint32_t rbv, uint32_t s, int mode);
+ int storeInc(uint32_t pat, uint32_t rbv, int mode);
+ int storeDec(uint32_t pat, uint32_t rbv, int mode);
+ void HandleCoProcDO(uint32_t insn);
+ void HandleCoProcRT(uint32_t insn);
+ void HandleCoProcDT(uint32_t insn);
+ void HandleBranch(uint32_t insn);
+ void HandleMemSingle(uint32_t insn);
+ void HandleHalfWordDT(uint32_t insn);
+ void HandleSwap(uint32_t insn);
+ void HandlePSRTransfer(uint32_t insn);
+ void HandleALU(uint32_t insn);
+ void HandleMul(uint32_t insn);
+ void HandleSMulLong(uint32_t insn);
+ void HandleUMulLong(uint32_t insn);
+ void HandleMemBlock(uint32_t insn);
+ void arm7ops_0123(uint32_t insn);
+ void arm7ops_4567(uint32_t insn);
+ void arm7ops_89(uint32_t insn);
+ void arm7ops_ab(uint32_t insn);
+ void arm7ops_cd(uint32_t insn);
+ void arm7ops_e(uint32_t insn);
+ void arm7ops_f(uint32_t insn);
+ void set_cpsr(uint32_t val);
bool arm7_tlb_translate(offs_t &addr, int flags);
- UINT32 arm7_tlb_get_second_level_descriptor( UINT32 granularity, UINT32 first_desc, UINT32 vaddr );
+ uint32_t arm7_tlb_get_second_level_descriptor( uint32_t granularity, uint32_t first_desc, uint32_t vaddr );
int detect_fault(int desc_lvl1, int ap, int flags);
void arm7_check_irq_state();
void update_irq_state();
- void arm7_cpu_write32(UINT32 addr, UINT32 data);
- void arm7_cpu_write16(UINT32 addr, UINT16 data);
- void arm7_cpu_write8(UINT32 addr, UINT8 data);
- UINT32 arm7_cpu_read32(UINT32 addr);
- UINT16 arm7_cpu_read16(UINT32 addr);
- UINT8 arm7_cpu_read8(UINT32 addr);
+ void arm7_cpu_write32(uint32_t addr, uint32_t data);
+ void arm7_cpu_write16(uint32_t addr, uint16_t data);
+ void arm7_cpu_write8(uint32_t addr, uint8_t data);
+ uint32_t arm7_cpu_read32(uint32_t addr);
+ uint16_t arm7_cpu_read16(uint32_t addr);
+ uint8_t arm7_cpu_read8(uint32_t addr);
// Coprocessor support
DECLARE_WRITE32_MEMBER( arm7_do_callback );
DECLARE_READ32_MEMBER( arm7_rt_r_callback );
DECLARE_WRITE32_MEMBER( arm7_rt_w_callback );
- void arm7_dt_r_callback(UINT32 insn, UINT32 *prn);
- void arm7_dt_w_callback(UINT32 insn, UINT32 *prn);
-
- void tg00_0(UINT32 pc, UINT32 insn);
- void tg00_1(UINT32 pc, UINT32 insn);
- void tg01_0(UINT32 pc, UINT32 insn);
- void tg01_10(UINT32 pc, UINT32 insn);
- void tg01_11(UINT32 pc, UINT32 insn);
- void tg01_12(UINT32 pc, UINT32 insn);
- void tg01_13(UINT32 pc, UINT32 insn);
- void tg02_0(UINT32 pc, UINT32 insn);
- void tg02_1(UINT32 pc, UINT32 insn);
- void tg03_0(UINT32 pc, UINT32 insn);
- void tg03_1(UINT32 pc, UINT32 insn);
- void tg04_00_00(UINT32 pc, UINT32 insn);
- void tg04_00_01(UINT32 pc, UINT32 insn);
- void tg04_00_02(UINT32 pc, UINT32 insn);
- void tg04_00_03(UINT32 pc, UINT32 insn);
- void tg04_00_04(UINT32 pc, UINT32 insn);
- void tg04_00_05(UINT32 pc, UINT32 insn);
- void tg04_00_06(UINT32 pc, UINT32 insn);
- void tg04_00_07(UINT32 pc, UINT32 insn);
- void tg04_00_08(UINT32 pc, UINT32 insn);
- void tg04_00_09(UINT32 pc, UINT32 insn);
- void tg04_00_0a(UINT32 pc, UINT32 insn);
- void tg04_00_0b(UINT32 pc, UINT32 insn);
- void tg04_00_0c(UINT32 pc, UINT32 insn);
- void tg04_00_0d(UINT32 pc, UINT32 insn);
- void tg04_00_0e(UINT32 pc, UINT32 insn);
- void tg04_00_0f(UINT32 pc, UINT32 insn);
- void tg04_01_00(UINT32 pc, UINT32 insn);
- void tg04_01_01(UINT32 pc, UINT32 insn);
- void tg04_01_02(UINT32 pc, UINT32 insn);
- void tg04_01_03(UINT32 pc, UINT32 insn);
- void tg04_01_10(UINT32 pc, UINT32 insn);
- void tg04_01_11(UINT32 pc, UINT32 insn);
- void tg04_01_12(UINT32 pc, UINT32 insn);
- void tg04_01_13(UINT32 pc, UINT32 insn);
- void tg04_01_20(UINT32 pc, UINT32 insn);
- void tg04_01_21(UINT32 pc, UINT32 insn);
- void tg04_01_22(UINT32 pc, UINT32 insn);
- void tg04_01_23(UINT32 pc, UINT32 insn);
- void tg04_01_30(UINT32 pc, UINT32 insn);
- void tg04_01_31(UINT32 pc, UINT32 insn);
- void tg04_01_32(UINT32 pc, UINT32 insn);
- void tg04_01_33(UINT32 pc, UINT32 insn);
- void tg04_0203(UINT32 pc, UINT32 insn);
- void tg05_0(UINT32 pc, UINT32 insn);
- void tg05_1(UINT32 pc, UINT32 insn);
- void tg05_2(UINT32 pc, UINT32 insn);
- void tg05_3(UINT32 pc, UINT32 insn);
- void tg05_4(UINT32 pc, UINT32 insn);
- void tg05_5(UINT32 pc, UINT32 insn);
- void tg05_6(UINT32 pc, UINT32 insn);
- void tg05_7(UINT32 pc, UINT32 insn);
- void tg06_0(UINT32 pc, UINT32 insn);
- void tg06_1(UINT32 pc, UINT32 insn);
- void tg07_0(UINT32 pc, UINT32 insn);
- void tg07_1(UINT32 pc, UINT32 insn);
- void tg08_0(UINT32 pc, UINT32 insn);
- void tg08_1(UINT32 pc, UINT32 insn);
- void tg09_0(UINT32 pc, UINT32 insn);
- void tg09_1(UINT32 pc, UINT32 insn);
- void tg0a_0(UINT32 pc, UINT32 insn);
- void tg0a_1(UINT32 pc, UINT32 insn);
- void tg0b_0(UINT32 pc, UINT32 insn);
- void tg0b_1(UINT32 pc, UINT32 insn);
- void tg0b_2(UINT32 pc, UINT32 insn);
- void tg0b_3(UINT32 pc, UINT32 insn);
- void tg0b_4(UINT32 pc, UINT32 insn);
- void tg0b_5(UINT32 pc, UINT32 insn);
- void tg0b_6(UINT32 pc, UINT32 insn);
- void tg0b_7(UINT32 pc, UINT32 insn);
- void tg0b_8(UINT32 pc, UINT32 insn);
- void tg0b_9(UINT32 pc, UINT32 insn);
- void tg0b_a(UINT32 pc, UINT32 insn);
- void tg0b_b(UINT32 pc, UINT32 insn);
- void tg0b_c(UINT32 pc, UINT32 insn);
- void tg0b_d(UINT32 pc, UINT32 insn);
- void tg0b_e(UINT32 pc, UINT32 insn);
- void tg0b_f(UINT32 pc, UINT32 insn);
- void tg0c_0(UINT32 pc, UINT32 insn);
- void tg0c_1(UINT32 pc, UINT32 insn);
- void tg0d_0(UINT32 pc, UINT32 insn);
- void tg0d_1(UINT32 pc, UINT32 insn);
- void tg0d_2(UINT32 pc, UINT32 insn);
- void tg0d_3(UINT32 pc, UINT32 insn);
- void tg0d_4(UINT32 pc, UINT32 insn);
- void tg0d_5(UINT32 pc, UINT32 insn);
- void tg0d_6(UINT32 pc, UINT32 insn);
- void tg0d_7(UINT32 pc, UINT32 insn);
- void tg0d_8(UINT32 pc, UINT32 insn);
- void tg0d_9(UINT32 pc, UINT32 insn);
- void tg0d_a(UINT32 pc, UINT32 insn);
- void tg0d_b(UINT32 pc, UINT32 insn);
- void tg0d_c(UINT32 pc, UINT32 insn);
- void tg0d_d(UINT32 pc, UINT32 insn);
- void tg0d_e(UINT32 pc, UINT32 insn);
- void tg0d_f(UINT32 pc, UINT32 insn);
- void tg0e_0(UINT32 pc, UINT32 insn);
- void tg0e_1(UINT32 pc, UINT32 insn);
- void tg0f_0(UINT32 pc, UINT32 insn);
- void tg0f_1(UINT32 pc, UINT32 insn);
-
- typedef void ( arm7_cpu_device::*arm7thumb_ophandler ) (UINT32, UINT32);
+ void arm7_dt_r_callback(uint32_t insn, uint32_t *prn);
+ void arm7_dt_w_callback(uint32_t insn, uint32_t *prn);
+
+ void tg00_0(uint32_t pc, uint32_t insn);
+ void tg00_1(uint32_t pc, uint32_t insn);
+ void tg01_0(uint32_t pc, uint32_t insn);
+ void tg01_10(uint32_t pc, uint32_t insn);
+ void tg01_11(uint32_t pc, uint32_t insn);
+ void tg01_12(uint32_t pc, uint32_t insn);
+ void tg01_13(uint32_t pc, uint32_t insn);
+ void tg02_0(uint32_t pc, uint32_t insn);
+ void tg02_1(uint32_t pc, uint32_t insn);
+ void tg03_0(uint32_t pc, uint32_t insn);
+ void tg03_1(uint32_t pc, uint32_t insn);
+ void tg04_00_00(uint32_t pc, uint32_t insn);
+ void tg04_00_01(uint32_t pc, uint32_t insn);
+ void tg04_00_02(uint32_t pc, uint32_t insn);
+ void tg04_00_03(uint32_t pc, uint32_t insn);
+ void tg04_00_04(uint32_t pc, uint32_t insn);
+ void tg04_00_05(uint32_t pc, uint32_t insn);
+ void tg04_00_06(uint32_t pc, uint32_t insn);
+ void tg04_00_07(uint32_t pc, uint32_t insn);
+ void tg04_00_08(uint32_t pc, uint32_t insn);
+ void tg04_00_09(uint32_t pc, uint32_t insn);
+ void tg04_00_0a(uint32_t pc, uint32_t insn);
+ void tg04_00_0b(uint32_t pc, uint32_t insn);
+ void tg04_00_0c(uint32_t pc, uint32_t insn);
+ void tg04_00_0d(uint32_t pc, uint32_t insn);
+ void tg04_00_0e(uint32_t pc, uint32_t insn);
+ void tg04_00_0f(uint32_t pc, uint32_t insn);
+ void tg04_01_00(uint32_t pc, uint32_t insn);
+ void tg04_01_01(uint32_t pc, uint32_t insn);
+ void tg04_01_02(uint32_t pc, uint32_t insn);
+ void tg04_01_03(uint32_t pc, uint32_t insn);
+ void tg04_01_10(uint32_t pc, uint32_t insn);
+ void tg04_01_11(uint32_t pc, uint32_t insn);
+ void tg04_01_12(uint32_t pc, uint32_t insn);
+ void tg04_01_13(uint32_t pc, uint32_t insn);
+ void tg04_01_20(uint32_t pc, uint32_t insn);
+ void tg04_01_21(uint32_t pc, uint32_t insn);
+ void tg04_01_22(uint32_t pc, uint32_t insn);
+ void tg04_01_23(uint32_t pc, uint32_t insn);
+ void tg04_01_30(uint32_t pc, uint32_t insn);
+ void tg04_01_31(uint32_t pc, uint32_t insn);
+ void tg04_01_32(uint32_t pc, uint32_t insn);
+ void tg04_01_33(uint32_t pc, uint32_t insn);
+ void tg04_0203(uint32_t pc, uint32_t insn);
+ void tg05_0(uint32_t pc, uint32_t insn);
+ void tg05_1(uint32_t pc, uint32_t insn);
+ void tg05_2(uint32_t pc, uint32_t insn);
+ void tg05_3(uint32_t pc, uint32_t insn);
+ void tg05_4(uint32_t pc, uint32_t insn);
+ void tg05_5(uint32_t pc, uint32_t insn);
+ void tg05_6(uint32_t pc, uint32_t insn);
+ void tg05_7(uint32_t pc, uint32_t insn);
+ void tg06_0(uint32_t pc, uint32_t insn);
+ void tg06_1(uint32_t pc, uint32_t insn);
+ void tg07_0(uint32_t pc, uint32_t insn);
+ void tg07_1(uint32_t pc, uint32_t insn);
+ void tg08_0(uint32_t pc, uint32_t insn);
+ void tg08_1(uint32_t pc, uint32_t insn);
+ void tg09_0(uint32_t pc, uint32_t insn);
+ void tg09_1(uint32_t pc, uint32_t insn);
+ void tg0a_0(uint32_t pc, uint32_t insn);
+ void tg0a_1(uint32_t pc, uint32_t insn);
+ void tg0b_0(uint32_t pc, uint32_t insn);
+ void tg0b_1(uint32_t pc, uint32_t insn);
+ void tg0b_2(uint32_t pc, uint32_t insn);
+ void tg0b_3(uint32_t pc, uint32_t insn);
+ void tg0b_4(uint32_t pc, uint32_t insn);
+ void tg0b_5(uint32_t pc, uint32_t insn);
+ void tg0b_6(uint32_t pc, uint32_t insn);
+ void tg0b_7(uint32_t pc, uint32_t insn);
+ void tg0b_8(uint32_t pc, uint32_t insn);
+ void tg0b_9(uint32_t pc, uint32_t insn);
+ void tg0b_a(uint32_t pc, uint32_t insn);
+ void tg0b_b(uint32_t pc, uint32_t insn);
+ void tg0b_c(uint32_t pc, uint32_t insn);
+ void tg0b_d(uint32_t pc, uint32_t insn);
+ void tg0b_e(uint32_t pc, uint32_t insn);
+ void tg0b_f(uint32_t pc, uint32_t insn);
+ void tg0c_0(uint32_t pc, uint32_t insn);
+ void tg0c_1(uint32_t pc, uint32_t insn);
+ void tg0d_0(uint32_t pc, uint32_t insn);
+ void tg0d_1(uint32_t pc, uint32_t insn);
+ void tg0d_2(uint32_t pc, uint32_t insn);
+ void tg0d_3(uint32_t pc, uint32_t insn);
+ void tg0d_4(uint32_t pc, uint32_t insn);
+ void tg0d_5(uint32_t pc, uint32_t insn);
+ void tg0d_6(uint32_t pc, uint32_t insn);
+ void tg0d_7(uint32_t pc, uint32_t insn);
+ void tg0d_8(uint32_t pc, uint32_t insn);
+ void tg0d_9(uint32_t pc, uint32_t insn);
+ void tg0d_a(uint32_t pc, uint32_t insn);
+ void tg0d_b(uint32_t pc, uint32_t insn);
+ void tg0d_c(uint32_t pc, uint32_t insn);
+ void tg0d_d(uint32_t pc, uint32_t insn);
+ void tg0d_e(uint32_t pc, uint32_t insn);
+ void tg0d_f(uint32_t pc, uint32_t insn);
+ void tg0e_0(uint32_t pc, uint32_t insn);
+ void tg0e_1(uint32_t pc, uint32_t insn);
+ void tg0f_0(uint32_t pc, uint32_t insn);
+ void tg0f_1(uint32_t pc, uint32_t insn);
+
+ typedef void ( arm7_cpu_device::*arm7thumb_ophandler ) (uint32_t, uint32_t);
static const arm7thumb_ophandler thumb_handler[0x40*0x10];
- typedef void ( arm7_cpu_device::*arm7ops_ophandler )(UINT32);
+ typedef void ( arm7_cpu_device::*arm7ops_ophandler )(uint32_t);
static const arm7ops_ophandler ops_handler[0x10];
//
@@ -279,23 +279,23 @@ protected:
{
offs_t start; /* start of the RAM block */
offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
+ uint8_t readonly; /* TRUE if read-only */
void * base; /* base in memory where the RAM lives */
};
struct hotspot_info
{
- UINT32 pc;
- UINT32 opcode;
- UINT32 cycles;
+ uint32_t pc;
+ uint32_t opcode;
+ uint32_t cycles;
};
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- UINT8 checksoftints; /* need to check software interrupts before next instruction */
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
+ uint8_t checksoftints; /* need to check software interrupts before next instruction */
uml::code_label labelnum; /* index for local labels */
};
@@ -306,18 +306,18 @@ protected:
drc_cache * cache; /* pointer to the DRC code cache */
drcuml_state * drcuml; /* DRC UML generator state */
//arm7_frontend * drcfe; /* pointer to the DRC front-end state */
- UINT32 drcoptions; /* configurable DRC options */
+ uint32_t drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
- UINT32 jmpdest; /* destination jump target */
+ uint8_t cache_dirty; /* true if we need to flush the cache */
+ uint32_t jmpdest; /* destination jump target */
/* parameters for subroutines */
- UINT64 numcycles; /* return value from gettotalcycles */
- UINT32 mode; /* current global mode */
+ uint64_t numcycles; /* return value from gettotalcycles */
+ uint32_t mode; /* current global mode */
const char * format; /* format string for print_debug */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
+ uint32_t arg0; /* print_debug argument 1 */
+ uint32_t arg1; /* print_debug argument 2 */
/* register mappings */
uml::parameter regmap[/*NUM_REGS*/37]; /* parameter to register mappings for all 16 integer registers */
@@ -337,11 +337,11 @@ protected:
uml::code_handle * write32; /* write word */
/* fast RAM */
- UINT32 fastram_select;
+ uint32_t fastram_select;
fast_ram_info fastram[ARM7_MAX_FASTRAM];
/* hotspots */
- UINT32 hotspot_select;
+ uint32_t hotspot_select;
hotspot_info hotspot[ARM7_MAX_HOTSPOTS];
} m_impstate;
@@ -456,11 +456,11 @@ protected:
void arm7_drc_init();
void arm7_drc_exit();
void execute_run_drc();
- void arm7drc_set_options(UINT32 options);
- void arm7drc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base);
- void arm7drc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles);
+ void arm7drc_set_options(uint32_t options);
+ void arm7drc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base);
+ void arm7drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles);
void code_flush_cache();
- void code_compile_block(UINT8 mode, offs_t pc);
+ void code_compile_block(uint8_t mode, offs_t pc);
void cfunc_get_cycles();
void cfunc_unimplemented();
void static_generate_entry_point();
@@ -473,19 +473,19 @@ protected:
void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param);
void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 linkreg);
+ void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg);
- typedef bool ( arm7_cpu_device::*drcarm7ops_ophandler)(drcuml_block*, compiler_state*, const opcode_desc*, UINT32);
+ typedef bool ( arm7_cpu_device::*drcarm7ops_ophandler)(drcuml_block*, compiler_state*, const opcode_desc*, uint32_t);
static const drcarm7ops_ophandler drcops_handler[0x10];
void saturate_qbit_overflow(drcuml_block *block);
- bool drcarm7ops_0123(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op);
- bool drcarm7ops_4567(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op);
- bool drcarm7ops_89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op);
- bool drcarm7ops_ab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op);
- bool drcarm7ops_cd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op);
- bool drcarm7ops_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op);
- bool drcarm7ops_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op);
+ bool drcarm7ops_0123(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_4567(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_ab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_cd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
+ bool drcarm7ops_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op);
int generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
};
@@ -495,7 +495,7 @@ class arm7_be_cpu_device : public arm7_cpu_device
{
public:
// construction/destruction
- arm7_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ arm7_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -504,7 +504,7 @@ class arm7500_cpu_device : public arm7_cpu_device
{
public:
// construction/destruction
- arm7500_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ arm7500_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -513,7 +513,7 @@ class arm9_cpu_device : public arm7_cpu_device
{
public:
// construction/destruction
- arm9_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ arm9_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -522,7 +522,7 @@ class arm920t_cpu_device : public arm7_cpu_device
{
public:
// construction/destruction
- arm920t_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ arm920t_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -531,7 +531,7 @@ class pxa255_cpu_device : public arm7_cpu_device
{
public:
// construction/destruction
- pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pxa255_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -540,7 +540,7 @@ class sa1110_cpu_device : public arm7_cpu_device
{
public:
// construction/destruction
- sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/arm7/arm7core.h b/src/devices/cpu/arm7/arm7core.h
index 2d4179eda7a..85b26043152 100644
--- a/src/devices/cpu/arm7/arm7core.h
+++ b/src/devices/cpu/arm7/arm7core.h
@@ -164,7 +164,7 @@ struct arm7imp_state;
/* CPU state struct */
struct arm_state
{
- UINT32 m_r[NUM_REGS];
+ uint32_t m_r[NUM_REGS];
bool m_pendingIrq;
bool m_pendingFiq;
bool m_pendingAbtD;
@@ -178,20 +178,20 @@ struct arm_state
direct_read_data *m_direct;
/* Coprocessor Registers */
- UINT32 m_control;
- UINT32 m_tlbBase;
- UINT32 m_tlb_base_mask;
- UINT32 m_faultStatus[2];
- UINT32 m_faultAddress;
- UINT32 m_fcsePID;
- UINT32 m_domainAccessControl;
- UINT32 m_decoded_access_control[16];
-
- UINT8 m_archRev; // ARM architecture revision (3, 4, and 5 are valid)
- UINT8 m_archFlags; // architecture flags
+ uint32_t m_control;
+ uint32_t m_tlbBase;
+ uint32_t m_tlb_base_mask;
+ uint32_t m_faultStatus[2];
+ uint32_t m_faultAddress;
+ uint32_t m_fcsePID;
+ uint32_t m_domainAccessControl;
+ uint32_t m_decoded_access_control[16];
+
+ uint8_t m_archRev; // ARM architecture revision (3, 4, and 5 are valid)
+ uint8_t m_archFlags; // architecture flags
#if ARM7_MMU_ENABLE_HACK
- UINT32 mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
+ uint32_t mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
#endif
arm7imp_state m_impstate;
};
@@ -296,14 +296,14 @@ static const int sRegisterTable[ARM7_NUM_MODES][18] =
#define F_BIT 6
#define T_BIT 5 // Thumb mode
-#define N_MASK ((UINT32)(1 << N_BIT)) /* Negative flag */
-#define Z_MASK ((UINT32)(1 << Z_BIT)) /* Zero flag */
-#define C_MASK ((UINT32)(1 << C_BIT)) /* Carry flag */
-#define V_MASK ((UINT32)(1 << V_BIT)) /* oVerflow flag */
-#define Q_MASK ((UINT32)(1 << Q_BIT)) /* signed overflow for QADD, MAC */
-#define I_MASK ((UINT32)(1 << I_BIT)) /* Interrupt request disable */
-#define F_MASK ((UINT32)(1 << F_BIT)) /* Fast interrupt request disable */
-#define T_MASK ((UINT32)(1 << T_BIT)) /* Thumb Mode flag */
+#define N_MASK ((uint32_t)(1 << N_BIT)) /* Negative flag */
+#define Z_MASK ((uint32_t)(1 << Z_BIT)) /* Zero flag */
+#define C_MASK ((uint32_t)(1 << C_BIT)) /* Carry flag */
+#define V_MASK ((uint32_t)(1 << V_BIT)) /* oVerflow flag */
+#define Q_MASK ((uint32_t)(1 << Q_BIT)) /* signed overflow for QADD, MAC */
+#define I_MASK ((uint32_t)(1 << I_BIT)) /* Interrupt request disable */
+#define F_MASK ((uint32_t)(1 << F_BIT)) /* Fast interrupt request disable */
+#define T_MASK ((uint32_t)(1 << T_BIT)) /* Thumb Mode flag */
#define N_IS_SET(pc) ((pc) & N_MASK)
#define Z_IS_SET(pc) ((pc) & Z_MASK)
@@ -325,38 +325,38 @@ static const int sRegisterTable[ARM7_NUM_MODES][18] =
/* Deconstructing an instruction */
// todo: use these in all places (including dasm file)
-#define INSN_COND ((UINT32)0xf0000000u)
-#define INSN_SDT_L ((UINT32)0x00100000u)
-#define INSN_SDT_W ((UINT32)0x00200000u)
-#define INSN_SDT_B ((UINT32)0x00400000u)
-#define INSN_SDT_U ((UINT32)0x00800000u)
-#define INSN_SDT_P ((UINT32)0x01000000u)
-#define INSN_BDT_L ((UINT32)0x00100000u)
-#define INSN_BDT_W ((UINT32)0x00200000u)
-#define INSN_BDT_S ((UINT32)0x00400000u)
-#define INSN_BDT_U ((UINT32)0x00800000u)
-#define INSN_BDT_P ((UINT32)0x01000000u)
-#define INSN_BDT_REGS ((UINT32)0x0000ffffu)
-#define INSN_SDT_IMM ((UINT32)0x00000fffu)
-#define INSN_MUL_A ((UINT32)0x00200000u)
-#define INSN_MUL_RM ((UINT32)0x0000000fu)
-#define INSN_MUL_RS ((UINT32)0x00000f00u)
-#define INSN_MUL_RN ((UINT32)0x0000f000u)
-#define INSN_MUL_RD ((UINT32)0x000f0000u)
-#define INSN_I ((UINT32)0x02000000u)
-#define INSN_OPCODE ((UINT32)0x01e00000u)
-#define INSN_S ((UINT32)0x00100000u)
-#define INSN_BL ((UINT32)0x01000000u)
-#define INSN_BRANCH ((UINT32)0x00ffffffu)
-#define INSN_SWI ((UINT32)0x00ffffffu)
-#define INSN_RN ((UINT32)0x000f0000u)
-#define INSN_RD ((UINT32)0x0000f000u)
-#define INSN_OP2 ((UINT32)0x00000fffu)
-#define INSN_OP2_SHIFT ((UINT32)0x00000f80u)
-#define INSN_OP2_SHIFT_TYPE ((UINT32)0x00000070u)
-#define INSN_OP2_RM ((UINT32)0x0000000fu)
-#define INSN_OP2_ROTATE ((UINT32)0x00000f00u)
-#define INSN_OP2_IMM ((UINT32)0x000000ffu)
+#define INSN_COND ((uint32_t)0xf0000000u)
+#define INSN_SDT_L ((uint32_t)0x00100000u)
+#define INSN_SDT_W ((uint32_t)0x00200000u)
+#define INSN_SDT_B ((uint32_t)0x00400000u)
+#define INSN_SDT_U ((uint32_t)0x00800000u)
+#define INSN_SDT_P ((uint32_t)0x01000000u)
+#define INSN_BDT_L ((uint32_t)0x00100000u)
+#define INSN_BDT_W ((uint32_t)0x00200000u)
+#define INSN_BDT_S ((uint32_t)0x00400000u)
+#define INSN_BDT_U ((uint32_t)0x00800000u)
+#define INSN_BDT_P ((uint32_t)0x01000000u)
+#define INSN_BDT_REGS ((uint32_t)0x0000ffffu)
+#define INSN_SDT_IMM ((uint32_t)0x00000fffu)
+#define INSN_MUL_A ((uint32_t)0x00200000u)
+#define INSN_MUL_RM ((uint32_t)0x0000000fu)
+#define INSN_MUL_RS ((uint32_t)0x00000f00u)
+#define INSN_MUL_RN ((uint32_t)0x0000f000u)
+#define INSN_MUL_RD ((uint32_t)0x000f0000u)
+#define INSN_I ((uint32_t)0x02000000u)
+#define INSN_OPCODE ((uint32_t)0x01e00000u)
+#define INSN_S ((uint32_t)0x00100000u)
+#define INSN_BL ((uint32_t)0x01000000u)
+#define INSN_BRANCH ((uint32_t)0x00ffffffu)
+#define INSN_SWI ((uint32_t)0x00ffffffu)
+#define INSN_RN ((uint32_t)0x000f0000u)
+#define INSN_RD ((uint32_t)0x0000f000u)
+#define INSN_OP2 ((uint32_t)0x00000fffu)
+#define INSN_OP2_SHIFT ((uint32_t)0x00000f80u)
+#define INSN_OP2_SHIFT_TYPE ((uint32_t)0x00000070u)
+#define INSN_OP2_RM ((uint32_t)0x0000000fu)
+#define INSN_OP2_ROTATE ((uint32_t)0x00000f00u)
+#define INSN_OP2_IMM ((uint32_t)0x000000ffu)
#define INSN_OP2_SHIFT_TYPE_SHIFT 4
#define INSN_OP2_SHIFT_SHIFT 7
#define INSN_OP2_ROTATE_SHIFT 8
@@ -368,56 +368,56 @@ static const int sRegisterTable[ARM7_NUM_MODES][18] =
#define INSN_RD_SHIFT 12
#define INSN_COND_SHIFT 28
-#define INSN_COPRO_N ((UINT32) 0x00100000u)
-#define INSN_COPRO_CREG ((UINT32) 0x000f0000u)
-#define INSN_COPRO_AREG ((UINT32) 0x0000f000u)
-#define INSN_COPRO_CPNUM ((UINT32) 0x00000f00u)
-#define INSN_COPRO_OP2 ((UINT32) 0x000000e0u)
-#define INSN_COPRO_OP3 ((UINT32) 0x0000000fu)
+#define INSN_COPRO_N ((uint32_t) 0x00100000u)
+#define INSN_COPRO_CREG ((uint32_t) 0x000f0000u)
+#define INSN_COPRO_AREG ((uint32_t) 0x0000f000u)
+#define INSN_COPRO_CPNUM ((uint32_t) 0x00000f00u)
+#define INSN_COPRO_OP2 ((uint32_t) 0x000000e0u)
+#define INSN_COPRO_OP3 ((uint32_t) 0x0000000fu)
#define INSN_COPRO_N_SHIFT 20
#define INSN_COPRO_CREG_SHIFT 16
#define INSN_COPRO_AREG_SHIFT 12
#define INSN_COPRO_CPNUM_SHIFT 8
#define INSN_COPRO_OP2_SHIFT 5
-#define THUMB_INSN_TYPE ((UINT16)0xf000)
-#define THUMB_COND_TYPE ((UINT16)0x0f00)
-#define THUMB_GROUP4_TYPE ((UINT16)0x0c00)
-#define THUMB_GROUP5_TYPE ((UINT16)0x0e00)
-#define THUMB_GROUP5_RM ((UINT16)0x01c0)
-#define THUMB_GROUP5_RN ((UINT16)0x0038)
-#define THUMB_GROUP5_RD ((UINT16)0x0007)
-#define THUMB_ADDSUB_RNIMM ((UINT16)0x01c0)
-#define THUMB_ADDSUB_RS ((UINT16)0x0038)
-#define THUMB_ADDSUB_RD ((UINT16)0x0007)
-#define THUMB_INSN_CMP ((UINT16)0x0800)
-#define THUMB_INSN_SUB ((UINT16)0x0800)
-#define THUMB_INSN_IMM_RD ((UINT16)0x0700)
-#define THUMB_INSN_IMM_S ((UINT16)0x0080)
-#define THUMB_INSN_IMM ((UINT16)0x00ff)
-#define THUMB_INSN_ADDSUB ((UINT16)0x0800)
-#define THUMB_ADDSUB_TYPE ((UINT16)0x0600)
-#define THUMB_HIREG_OP ((UINT16)0x0300)
-#define THUMB_HIREG_H ((UINT16)0x00c0)
-#define THUMB_HIREG_RS ((UINT16)0x0038)
-#define THUMB_HIREG_RD ((UINT16)0x0007)
-#define THUMB_STACKOP_TYPE ((UINT16)0x0f00)
-#define THUMB_STACKOP_L ((UINT16)0x0800)
-#define THUMB_STACKOP_RD ((UINT16)0x0700)
-#define THUMB_ALUOP_TYPE ((UINT16)0x03c0)
-#define THUMB_BLOP_LO ((UINT16)0x0800)
-#define THUMB_BLOP_OFFS ((UINT16)0x07ff)
-#define THUMB_SHIFT_R ((UINT16)0x0800)
-#define THUMB_SHIFT_AMT ((UINT16)0x07c0)
-#define THUMB_HALFOP_L ((UINT16)0x0800)
-#define THUMB_HALFOP_OFFS ((UINT16)0x07c0)
-#define THUMB_BRANCH_OFFS ((UINT16)0x07ff)
-#define THUMB_LSOP_L ((UINT16)0x0800)
-#define THUMB_LSOP_OFFS ((UINT16)0x07c0)
-#define THUMB_MULTLS ((UINT16)0x0800)
-#define THUMB_MULTLS_BASE ((UINT16)0x0700)
-#define THUMB_RELADDR_SP ((UINT16)0x0800)
-#define THUMB_RELADDR_RD ((UINT16)0x0700)
+#define THUMB_INSN_TYPE ((uint16_t)0xf000)
+#define THUMB_COND_TYPE ((uint16_t)0x0f00)
+#define THUMB_GROUP4_TYPE ((uint16_t)0x0c00)
+#define THUMB_GROUP5_TYPE ((uint16_t)0x0e00)
+#define THUMB_GROUP5_RM ((uint16_t)0x01c0)
+#define THUMB_GROUP5_RN ((uint16_t)0x0038)
+#define THUMB_GROUP5_RD ((uint16_t)0x0007)
+#define THUMB_ADDSUB_RNIMM ((uint16_t)0x01c0)
+#define THUMB_ADDSUB_RS ((uint16_t)0x0038)
+#define THUMB_ADDSUB_RD ((uint16_t)0x0007)
+#define THUMB_INSN_CMP ((uint16_t)0x0800)
+#define THUMB_INSN_SUB ((uint16_t)0x0800)
+#define THUMB_INSN_IMM_RD ((uint16_t)0x0700)
+#define THUMB_INSN_IMM_S ((uint16_t)0x0080)
+#define THUMB_INSN_IMM ((uint16_t)0x00ff)
+#define THUMB_INSN_ADDSUB ((uint16_t)0x0800)
+#define THUMB_ADDSUB_TYPE ((uint16_t)0x0600)
+#define THUMB_HIREG_OP ((uint16_t)0x0300)
+#define THUMB_HIREG_H ((uint16_t)0x00c0)
+#define THUMB_HIREG_RS ((uint16_t)0x0038)
+#define THUMB_HIREG_RD ((uint16_t)0x0007)
+#define THUMB_STACKOP_TYPE ((uint16_t)0x0f00)
+#define THUMB_STACKOP_L ((uint16_t)0x0800)
+#define THUMB_STACKOP_RD ((uint16_t)0x0700)
+#define THUMB_ALUOP_TYPE ((uint16_t)0x03c0)
+#define THUMB_BLOP_LO ((uint16_t)0x0800)
+#define THUMB_BLOP_OFFS ((uint16_t)0x07ff)
+#define THUMB_SHIFT_R ((uint16_t)0x0800)
+#define THUMB_SHIFT_AMT ((uint16_t)0x07c0)
+#define THUMB_HALFOP_L ((uint16_t)0x0800)
+#define THUMB_HALFOP_OFFS ((uint16_t)0x07c0)
+#define THUMB_BRANCH_OFFS ((uint16_t)0x07ff)
+#define THUMB_LSOP_L ((uint16_t)0x0800)
+#define THUMB_LSOP_OFFS ((uint16_t)0x07c0)
+#define THUMB_MULTLS ((uint16_t)0x0800)
+#define THUMB_MULTLS_BASE ((uint16_t)0x0700)
+#define THUMB_RELADDR_SP ((uint16_t)0x0800)
+#define THUMB_RELADDR_RD ((uint16_t)0x0700)
#define THUMB_INSN_TYPE_SHIFT 12
#define THUMB_COND_TYPE_SHIFT 8
#define THUMB_GROUP4_TYPE_SHIFT 10
@@ -493,10 +493,10 @@ enum
#define GET_CPSR m_r[eCPSR]
#define MODE_FLAG 0xF // Mode bits are 4:0 of CPSR, but we ignore bit 4.
#define GET_MODE (GET_CPSR & MODE_FLAG)
-#define SIGN_BIT ((UINT32)(1 << 31))
+#define SIGN_BIT ((uint32_t)(1 << 31))
#define SIGN_BITS_DIFFER(a, b) (((a) ^ (b)) >> 31)
/* I really don't know why these were set to 16-bit, the thumb registers are still 32-bit ... */
-#define THUMB_SIGN_BIT ((UINT32)(1 << 31))
+#define THUMB_SIGN_BIT ((uint32_t)(1 << 31))
#define THUMB_SIGN_BITS_DIFFER(a, b) (((a)^(b)) >> 31)
#define SR_MODE32 0x10
diff --git a/src/devices/cpu/arm7/arm7core.hxx b/src/devices/cpu/arm7/arm7core.hxx
index 12a6884033c..0e418209e73 100644
--- a/src/devices/cpu/arm7/arm7core.hxx
+++ b/src/devices/cpu/arm7/arm7core.hxx
@@ -96,8 +96,8 @@ void arm7_cpu_device::arm7_check_irq_state()
if (!m_pending_interrupt)
return;
- UINT32 cpsr = m_r[eCPSR]; /* save current CPSR */
- UINT32 pc = m_r[eR15] + 4; /* save old pc (already incremented in pipeline) */;
+ uint32_t cpsr = m_r[eCPSR]; /* save current CPSR */
+ uint32_t pc = m_r[eR15] + 4; /* save old pc (already incremented in pipeline) */;
/* Exception priorities:
@@ -154,7 +154,7 @@ void arm7_cpu_device::arm7_check_irq_state()
}
else
{
- UINT32 temp;
+ uint32_t temp;
R15 = (pc & 0xF4000000) /* N Z C V F */ | 0x18 | 0x00000002 /* IRQ */ | 0x08000000 /* I */;
temp = (GET_CPSR & 0x0FFFFF3F) /* N Z C V I F */ | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */;
set_cpsr(temp); /* Mask IRQ */
@@ -225,7 +225,7 @@ void arm7_cpu_device::arm7_check_irq_state()
}
else
{
- UINT32 temp;
+ uint32_t temp;
R15 = (pc & 0xF4000000) /* N Z C V F */ | 0x08 | 0x00000003 /* SVC */ | 0x08000000 /* I */;
temp = (GET_CPSR & 0x0FFFFF3F) /* N Z C V I F */ | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */;
set_cpsr(temp); /* Mask IRQ */
diff --git a/src/devices/cpu/arm7/arm7dasm.cpp b/src/devices/cpu/arm7/arm7dasm.cpp
index 68a2bb38654..622064bf078 100644
--- a/src/devices/cpu/arm7/arm7dasm.cpp
+++ b/src/devices/cpu/arm7/arm7dasm.cpp
@@ -35,7 +35,7 @@ static char *WritePadding( char *pBuf, const char *pBuf0 )
return pBuf;
}
-static char *DasmCoProc_RT( char *pBuf, UINT32 opcode, const char *pConditionCode, const char *pBuf0)
+static char *DasmCoProc_RT( char *pBuf, uint32_t opcode, const char *pConditionCode, const char *pBuf0)
{
/* co processor register transfer */
/* xxxx 1110 oooL nnnn dddd cccc ppp1 mmmm */
@@ -55,7 +55,7 @@ static char *DasmCoProc_RT( char *pBuf, UINT32 opcode, const char *pConditionCod
return pBuf;
}
-static char *DasmCoProc_DT( char *pBuf, UINT32 opcode, const char *pConditionCode, const char *pBuf0 )
+static char *DasmCoProc_DT( char *pBuf, uint32_t opcode, const char *pConditionCode, const char *pBuf0 )
{
/* co processor data transfer */
/* xxxx 111P UNWL nnnn dddd pppp oooooooo */
@@ -80,7 +80,7 @@ static char *DasmCoProc_DT( char *pBuf, UINT32 opcode, const char *pConditionCod
return pBuf;
}
-static char *DasmCoProc_DO( char *pBuf, UINT32 opcode, const char *pConditionCode, const char *pBuf0 )
+static char *DasmCoProc_DO( char *pBuf, uint32_t opcode, const char *pConditionCode, const char *pBuf0 )
{
/* co processor data operation */
/* xxxx 1110 oooo nnnn dddd cccc ppp0 mmmm */
@@ -94,10 +94,10 @@ static char *DasmCoProc_DO( char *pBuf, UINT32 opcode, const char *pConditionCod
return pBuf;
}
-static char *WriteImmediateOperand( char *pBuf, UINT32 opcode )
+static char *WriteImmediateOperand( char *pBuf, uint32_t opcode )
{
/* rrrrbbbbbbbb */
- UINT32 imm;
+ uint32_t imm;
int r;
imm = opcode&0xff;
@@ -107,7 +107,7 @@ static char *WriteImmediateOperand( char *pBuf, UINT32 opcode )
return pBuf;
}
-static char *WriteDataProcessingOperand( char *pBuf, UINT32 opcode, int printOp0, int printOp1, int printOp2 )
+static char *WriteDataProcessingOperand( char *pBuf, uint32_t opcode, int printOp0, int printOp1, int printOp2 )
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@@ -146,7 +146,7 @@ static char *WriteDataProcessingOperand( char *pBuf, UINT32 opcode, int printOp0
return pBuf;
}
-static char *WriteRegisterOperand1( char *pBuf, UINT32 opcode )
+static char *WriteRegisterOperand1( char *pBuf, uint32_t opcode )
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@@ -177,7 +177,7 @@ static char *WriteRegisterOperand1( char *pBuf, UINT32 opcode )
} /* WriteRegisterOperand */
-static char *WriteBranchAddress( char *pBuf, UINT32 pc, UINT32 opcode )
+static char *WriteBranchAddress( char *pBuf, uint32_t pc, uint32_t opcode )
{
opcode &= 0x00ffffff;
if( opcode&0x00800000 )
@@ -189,7 +189,7 @@ static char *WriteBranchAddress( char *pBuf, UINT32 pc, UINT32 opcode )
return pBuf;
} /* WriteBranchAddress */
-static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
+static uint32_t arm7_disasm( char *pBuf, uint32_t pc, uint32_t opcode )
{
const char *pBuf0;
@@ -208,7 +208,7 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
"ORR","MOV","BIC","MVN"
};
const char *pConditionCode;
- UINT32 dasmflags = 0;
+ uint32_t dasmflags = 0;
pConditionCode= pConditionCodeTable[opcode>>28];
pBuf0 = pBuf;
@@ -494,8 +494,8 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
}
else if( (opcode&0x0c000000)==0x04000000 ) //bits 27-26 == 01
{
- UINT32 rn;
- UINT32 rnv = 0;
+ uint32_t rn;
+ uint32_t rnv = 0;
/* Data Transfer */
@@ -682,15 +682,15 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
return dasmflags | DASMFLAG_SUPPORTED;
}
-static UINT32 thumb_disasm( char *pBuf, UINT32 pc, UINT16 opcode )
+static uint32_t thumb_disasm( char *pBuf, uint32_t pc, uint16_t opcode )
{
const char *pBuf0;
- UINT32 dasmflags = 0;
+ uint32_t dasmflags = 0;
-// UINT32 readword;
- UINT32 addr;
- UINT32 rm, rn, rs, rd, op2, imm;//, rrs;
- INT32 offs;
+// uint32_t readword;
+ uint32_t addr;
+ uint32_t rm, rn, rs, rd, op2, imm;//, rrs;
+ int32_t offs;
pBuf0 = pBuf;
pBuf = WritePadding( pBuf, pBuf0 );
@@ -1100,13 +1100,13 @@ static UINT32 thumb_disasm( char *pBuf, UINT32 pc, UINT16 opcode )
if( opcode & THUMB_STACKOP_L )
{
rd = ( opcode & THUMB_STACKOP_RD ) >> THUMB_STACKOP_RD_SHIFT;
- offs = (UINT8)( opcode & THUMB_INSN_IMM );
+ offs = (uint8_t)( opcode & THUMB_INSN_IMM );
pBuf += sprintf( pBuf, "LDR R%d, [SP, #%03x]", rd, offs << 2 );
}
else
{
rd = ( opcode & THUMB_STACKOP_RD ) >> THUMB_STACKOP_RD_SHIFT;
- offs = (UINT8)( opcode & THUMB_INSN_IMM );
+ offs = (uint8_t)( opcode & THUMB_INSN_IMM );
pBuf += sprintf( pBuf, "STR R%d, [SP, #%03x]", rd, offs << 2 );
}
break;
@@ -1114,13 +1114,13 @@ static UINT32 thumb_disasm( char *pBuf, UINT32 pc, UINT16 opcode )
if( opcode & THUMB_RELADDR_SP ) /* ADD Rd, SP, #nn */
{
rd = ( opcode & THUMB_RELADDR_RD ) >> THUMB_RELADDR_RD_SHIFT;
- offs = (UINT8)( opcode & THUMB_INSN_IMM ) << 2;
+ offs = (uint8_t)( opcode & THUMB_INSN_IMM ) << 2;
pBuf += sprintf( pBuf, "ADD R%d, SP, #%03x", rd, offs );
}
else /* ADD Rd, PC, #nn */
{
rd = ( opcode & THUMB_RELADDR_RD ) >> THUMB_RELADDR_RD_SHIFT;
- offs = (UINT8)( opcode & THUMB_INSN_IMM ) << 2;
+ offs = (uint8_t)( opcode & THUMB_INSN_IMM ) << 2;
pBuf += sprintf( pBuf, "ADD R%d, PC, #%03x", rd, offs );
}
break;
@@ -1215,7 +1215,7 @@ static UINT32 thumb_disasm( char *pBuf, UINT32 pc, UINT16 opcode )
}
break;
case 0xd: /* Conditional Branch */
- offs = (INT8)( opcode & THUMB_INSN_IMM );
+ offs = (int8_t)( opcode & THUMB_INSN_IMM );
switch( ( opcode & THUMB_COND_TYPE ) >> THUMB_COND_TYPE_SHIFT )
{
case COND_EQ:
diff --git a/src/devices/cpu/arm7/arm7drc.hxx b/src/devices/cpu/arm7/arm7drc.hxx
index bff2b776969..ae7255f6714 100644
--- a/src/devices/cpu/arm7/arm7drc.hxx
+++ b/src/devices/cpu/arm7/arm7drc.hxx
@@ -68,7 +68,7 @@
descriptor
-------------------------------------------------*/
-static inline UINT32 epc(const opcode_desc *desc)
+static inline uint32_t epc(const opcode_desc *desc)
{
return desc->pc;
}
@@ -129,12 +129,12 @@ void arm7_cpu_device::arm7_drc_init()
{
drc_cache *cache;
drcbe_info beinfo;
- UINT32 flags = 0;
+ uint32_t flags = 0;
/* allocate enough space for the cache and the core */
cache = auto_alloc(machine(), drc_cache(CACHE_SIZE));
if (cache == nullptr)
- fatalerror("Unable to allocate cache of size %d\n", (UINT32)(CACHE_SIZE));
+ fatalerror("Unable to allocate cache of size %d\n", (uint32_t)(CACHE_SIZE));
/* allocate the implementation-specific state from the full cache */
memset(&m_impstate, 0, sizeof(m_impstate));
@@ -241,7 +241,7 @@ void arm7_cpu_device::arm7_drc_exit()
arm7drc_set_options - configure DRC options
-------------------------------------------------*/
-void arm7_cpu_device::arm7drc_set_options(UINT32 options)
+void arm7_cpu_device::arm7drc_set_options(uint32_t options)
{
m_impstate.drcoptions = options;
}
@@ -252,7 +252,7 @@ void arm7_cpu_device::arm7drc_set_options(UINT32 options)
region
-------------------------------------------------*/
-void arm7_cpu_device::arm7drc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base)
+void arm7_cpu_device::arm7drc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
{
if (m_impstate.fastram_select < ARRAY_LENGTH(m_impstate.fastram))
{
@@ -269,7 +269,7 @@ void arm7_cpu_device::arm7drc_add_fastram(offs_t start, offs_t end, UINT8 readon
arm7drc_add_hotspot - add a new hotspot
-------------------------------------------------*/
-void arm7_cpu_device::arm7drc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles)
+void arm7_cpu_device::arm7drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles)
{
if (m_impstate.hotspot_select < ARRAY_LENGTH(m_impstate.hotspot))
{
@@ -326,7 +326,7 @@ void arm7_cpu_device::code_flush_cache()
given mode at the specified pc
-------------------------------------------------*/
-void arm7_cpu_device::code_compile_block(UINT8 mode, offs_t pc)
+void arm7_cpu_device::code_compile_block(uint8_t mode, offs_t pc)
{
drcuml_state *drcuml = m_impstate.drcuml;
compiler_state compiler = { 0 };
@@ -354,7 +354,7 @@ void arm7_cpu_device::code_compile_block(UINT8 mode, offs_t pc)
for (const opcode_desc *seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
const opcode_desc *curdesc;
- UINT32 nextpc;
+ uint32_t nextpc;
/* add a code log entry */
if (drcuml->logging())
@@ -454,7 +454,7 @@ void arm7_cpu_device::cfunc_get_cycles()
void arm7_cpu_device::cfunc_unimplemented()
{
- UINT32 opcode = m_impstate.arg0;
+ uint32_t opcode = m_impstate.arg0;
fatalerror("PC=%08X: Unimplemented op %08X\n", m_r[eR15], opcode);
}
@@ -620,9 +620,9 @@ void arm7_cpu_device::static_generate_check_irq()
UML_JMPc(block, uml::COND_Z, nopabt = label++); // jmpz nound
UML_ROLINS(block, uml::mem(&GET_CPSR), eARM7_MODE_UND, 0, MODE_FLAG); // rolins CPSR, eARM7_MODE_UND, 0, MODE_FLAG
- UML_MOV(block, uml::I1, (UINT64)-4); // mov i1, -4
+ UML_MOV(block, uml::I1, (uint64_t)-4); // mov i1, -4
UML_TEST(block, uml::mem(&GET_CPSR), T_MASK); // test CPSR, T_MASK
- UML_MOVc(block, uml::COND_NZ, uml::I1, (UINT64)-2); // movnz i1, -2
+ UML_MOVc(block, uml::COND_NZ, uml::I1, (uint64_t)-2); // movnz i1, -2
UML_ADD(block, uml::mem(&GetRegister(14)), uml::I0, uml::I1); // add LR, i0, i1
UML_MOV(block, uml::mem(&GetRegister(SPSR)), uml::mem(&GET_CPSR)); // mov SPSR, CPSR
UML_OR(block, uml::mem(&GET_CPSR), uml::mem(&GET_CPSR), I_MASK); // or CPSR, CPSR, I_MASK
@@ -638,9 +638,9 @@ void arm7_cpu_device::static_generate_check_irq()
UML_JMPc(block, uml::COND_Z, done = label++); // jmpz done
UML_ROLINS(block, uml::mem(&GET_CPSR), eARM7_MODE_SVC, 0, MODE_FLAG); // rolins CPSR, eARM7_MODE_SVC, 0, MODE_FLAG
- UML_MOV(block, uml::I1, (UINT64)-4); // mov i1, -4
+ UML_MOV(block, uml::I1, (uint64_t)-4); // mov i1, -4
UML_TEST(block, uml::mem(&GET_CPSR), T_MASK); // test CPSR, T_MASK
- UML_MOVc(block, uml::COND_NZ, uml::I1, (UINT64)-2); // movnz i1, -2
+ UML_MOVc(block, uml::COND_NZ, uml::I1, (uint64_t)-2); // movnz i1, -2
UML_ADD(block, uml::mem(&GetRegister(14)), uml::I0, uml::I1); // add LR, i0, i1
UML_TEST(block, uml::mem(&GET_CPSR), SR_MODE32); // test CPSR, MODE32
@@ -1053,8 +1053,8 @@ void arm7_cpu_device::static_generate_memory_accessor(int size, bool istlb, bool
{
if (m_impstate.fastram[ramnum].base != nullptr && (!iswrite || !m_impstate.fastram[ramnum].readonly))
{
- void *fastbase = (UINT8 *)m_impstate.fastram[ramnum].base - m_impstate.fastram[ramnum].start;
- UINT32 skip = label++;
+ void *fastbase = (uint8_t *)m_impstate.fastram[ramnum].base - m_impstate.fastram[ramnum].start;
+ uint32_t skip = label++;
if (m_impstate.fastram[ramnum].end != 0xffffffff)
{
UML_CMP(block, uml::I0, m_impstate.fastram[ramnum].end); // cmp i0, end
@@ -1202,7 +1202,7 @@ void arm7_cpu_device::generate_checksum_block(drcuml_block *block, compiler_stat
{
if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP))
{
- UINT32 sum = seqhead->opptr.l[0];
+ uint32_t sum = seqhead->opptr.l[0];
void *base = m_direct->read_ptr(seqhead->physpc);
UML_LOAD(block, uml::I0, base, 0, uml::SIZE_DWORD, uml::SCALE_x4); // load i0,base,0,dword
@@ -1223,7 +1223,7 @@ void arm7_cpu_device::generate_checksum_block(drcuml_block *block, compiler_stat
/* full verification; sum up everything */
else
{
- UINT32 sum = 0;
+ uint32_t sum = 0;
void *base = m_direct->read_ptr(seqhead->physpc);
UML_LOAD(block, uml::I0, base, 0, uml::SIZE_DWORD, uml::SCALE_x4); // load i0,base,0,dword
sum += seqhead->opptr.l[0];
@@ -1321,7 +1321,7 @@ void arm7_cpu_device::generate_sequence_instruction(drcuml_block *block, compile
generate_delay_slot_and_branch
------------------------------------------------------------------*/
-void arm7_cpu_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 linkreg)
+void arm7_cpu_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg)
{
compiler_state compiler_temp = *compiler;
@@ -1368,7 +1368,7 @@ void arm7_cpu_device::saturate_qbit_overflow(drcuml_block *block)
UML_OR(block, DRC_CPSR, DRC_CPSR, uml::I1);
}
-bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 insn)
+bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t insn)
{
uml::code_label done;
/* Branch and Exchange (BX) */
@@ -1382,17 +1382,17 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
else if ((insn & 0x0ff000f0) == 0x01600010) // CLZ - v5
{
- UINT32 rm = insn&0xf;
- UINT32 rd = (insn>>12)&0xf;
+ uint32_t rm = insn&0xf;
+ uint32_t rd = (insn>>12)&0xf;
UML_LZCNT(block, DRC_REG(rd), DRC_REG(rm));
UML_ADD(block, DRC_PC, DRC_PC, 4);
}
else if ((insn & 0x0ff000f0) == 0x01000050) // QADD - v5
{
- UINT32 rm = insn&0xf;
- UINT32 rn = (insn>>16)&0xf;
- UINT32 rd = (insn>>12)&0xf;
+ uint32_t rm = insn&0xf;
+ uint32_t rn = (insn>>16)&0xf;
+ uint32_t rd = (insn>>12)&0xf;
UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD);
UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD);
UML_DADD(block, uml::I0, uml::I0, uml::I1);
@@ -1402,9 +1402,9 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
else if ((insn & 0x0ff000f0) == 0x01400050) // QDADD - v5
{
- UINT32 rm = insn&0xf;
- UINT32 rn = (insn>>16)&0xf;
- UINT32 rd = (insn>>12)&0xf;
+ uint32_t rm = insn&0xf;
+ uint32_t rn = (insn>>16)&0xf;
+ uint32_t rd = (insn>>12)&0xf;
UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD);
UML_DADD(block, uml::I0, uml::I1, uml::I1);
@@ -1421,9 +1421,9 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
else if ((insn & 0x0ff000f0) == 0x01200050) // QSUB - v5
{
- UINT32 rm = insn&0xf;
- UINT32 rn = (insn>>16)&0xf;
- UINT32 rd = (insn>>12)&0xf;
+ uint32_t rm = insn&0xf;
+ uint32_t rn = (insn>>16)&0xf;
+ uint32_t rd = (insn>>12)&0xf;
UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD);
UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD);
@@ -1434,9 +1434,9 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
else if ((insn & 0x0ff000f0) == 0x01600050) // QDSUB - v5
{
- UINT32 rm = insn&0xf;
- UINT32 rn = (insn>>16)&0xf;
- UINT32 rd = (insn>>12)&0xf;
+ uint32_t rm = insn&0xf;
+ uint32_t rn = (insn>>16)&0xf;
+ uint32_t rd = (insn>>12)&0xf;
UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD);
UML_DADD(block, uml::I0, uml::I1, uml::I1);
@@ -1453,10 +1453,10 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
else if ((insn & 0x0ff00090) == 0x01000080) // SMLAxy - v5
{
- UINT32 rm = insn&0xf;
- UINT32 rn = (insn>>8)&0xf;
- UINT32 rd = (insn>>16)&0xf;
- UINT32 ra = (insn>>12)&0xf;
+ uint32_t rm = insn&0xf;
+ uint32_t rn = (insn>>8)&0xf;
+ uint32_t rd = (insn>>16)&0xf;
+ uint32_t ra = (insn>>12)&0xf;
UML_MOV(block, uml::I0, DRC_REG(rm));
UML_MOV(block, uml::I1, DRC_REG(rn));
@@ -1487,10 +1487,10 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
else if ((insn & 0x0ff00090) == 0x01400080) // SMLALxy - v5
{
- UINT32 rm = insn&0xf;
- UINT32 rn = (insn>>8)&0xf;
- UINT32 rdh = (insn>>16)&0xf;
- UINT32 rdl = (insn>>12)&0xf;
+ uint32_t rm = insn&0xf;
+ uint32_t rn = (insn>>8)&0xf;
+ uint32_t rdh = (insn>>16)&0xf;
+ uint32_t rdl = (insn>>12)&0xf;
UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD);
UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD);
@@ -1508,9 +1508,9 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
else if ((insn & 0x0ff00090) == 0x01600080) // SMULxy - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>8)&0xf);
- INT32 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>8)&0xf);
+ int32_t res;
// select top and bottom halves of src1/src2 and sign extend if necessary
if (insn & 0x20)
@@ -1541,9 +1541,9 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
else if ((insn & 0x0ff000b0) == 0x012000a0) // SMULWy - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>8)&0xf);
- INT64 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>8)&0xf);
+ int64_t res;
if (insn & 0x40)
{
@@ -1558,16 +1558,16 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
}
- res = (INT64)src1 * (INT64)src2;
+ res = (int64_t)src1 * (int64_t)src2;
res >>= 16;
- SetRegister((insn>>16)&0xf, (UINT32)res);
+ SetRegister((insn>>16)&0xf, (uint32_t)res);
}
else if ((insn & 0x0ff000b0) == 0x01200080) // SMLAWy - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>8)&0xf);
- INT32 src3 = GetRegister((insn>>12)&0xf);
- INT64 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>8)&0xf);
+ int32_t src3 = GetRegister((insn>>12)&0xf);
+ int64_t res;
if (insn & 0x40)
{
@@ -1582,17 +1582,17 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
}
}
- res = (INT64)src1 * (INT64)src2;
+ res = (int64_t)src1 * (int64_t)src2;
res >>= 16;
// check for overflow and set the Q bit
- saturate_qbit_overflow((INT64)src3 + res);
+ saturate_qbit_overflow((int64_t)src3 + res);
// do the real accumulate
- src3 += (INT32)res;
+ src3 += (int32_t)res;
// write the result back
- SetRegister((insn>>16)&0xf, (UINT32)res);
+ SetRegister((insn>>16)&0xf, (uint32_t)res);
}
else
/* Multiply OR Swap OR Half Word Data Transfer */
@@ -1650,32 +1650,32 @@ bool arm7_cpu_device::drcarm7ops_0123(drcuml_block *block, compiler_state *compi
return true;
}
-bool arm7_cpu_device::drcarm7ops_4567(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op)
+bool arm7_cpu_device::drcarm7ops_4567(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op)
+bool arm7_cpu_device::drcarm7ops_89(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_ab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op)
+bool arm7_cpu_device::drcarm7ops_ab(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_cd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op)
+bool arm7_cpu_device::drcarm7ops_cd(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op)
+bool arm7_cpu_device::drcarm7ops_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
-bool arm7_cpu_device::drcarm7ops_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 op)
+bool arm7_cpu_device::drcarm7ops_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t op)
{
return false;
}
@@ -1688,8 +1688,8 @@ bool arm7_cpu_device::drcarm7ops_f(drcuml_block *block, compiler_state *compiler
int arm7_cpu_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
//int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = op >> 26;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = op >> 26;
uml::code_label skip;
uml::code_label contdecode;
uml::code_label unexecuted;
diff --git a/src/devices/cpu/arm7/arm7help.h b/src/devices/cpu/arm7/arm7help.h
index 41d9e8ad63b..4b0b4f21c8a 100644
--- a/src/devices/cpu/arm7/arm7help.h
+++ b/src/devices/cpu/arm7/arm7help.h
@@ -118,7 +118,7 @@
// Long ALU Functions use bit 63
#define HandleLongALUNZFlags(rd) \
- ((((rd) & ((UINT64)1 << 63)) >> 32) | ((!(rd)) << Z_BIT))
+ ((((rd) & ((uint64_t)1 << 63)) >> 32) | ((!(rd)) << Z_BIT))
#define HandleALULogicalFlags(rd, sc) \
if (insn & INSN_S) \
diff --git a/src/devices/cpu/arm7/arm7ops.cpp b/src/devices/cpu/arm7/arm7ops.cpp
index b41008bc4b1..b43fa89b60b 100644
--- a/src/devices/cpu/arm7/arm7ops.cpp
+++ b/src/devices/cpu/arm7/arm7ops.cpp
@@ -5,7 +5,7 @@
#include "arm7core.h"
#include "arm7help.h"
-INT64 arm7_cpu_device::saturate_qbit_overflow(INT64 res)
+int64_t arm7_cpu_device::saturate_qbit_overflow(int64_t res)
{
if (res > 2147483647) // INT32_MAX
{ // overflow high? saturate and set Q
@@ -22,9 +22,9 @@ INT64 arm7_cpu_device::saturate_qbit_overflow(INT64 res)
}
-void arm7_cpu_device::SwitchMode(UINT32 cpsr_mode_val)
+void arm7_cpu_device::SwitchMode(uint32_t cpsr_mode_val)
{
- UINT32 cspr = m_r[eCPSR] & ~MODE_FLAG;
+ uint32_t cspr = m_r[eCPSR] & ~MODE_FLAG;
set_cpsr(cspr | cpsr_mode_val);
}
@@ -47,11 +47,11 @@ void arm7_cpu_device::SwitchMode(UINT32 cpsr_mode_val)
ROR >32 = Same result as ROR n-32 until amount in range of 1-32 then follow rules
*/
-UINT32 arm7_cpu_device::decodeShift(UINT32 insn, UINT32 *pCarry)
+uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
{
- UINT32 k = (insn & INSN_OP2_SHIFT) >> INSN_OP2_SHIFT_SHIFT; // Bits 11-7
- UINT32 rm = GetRegister(insn & INSN_OP2_RM);
- UINT32 t = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
+ uint32_t k = (insn & INSN_OP2_SHIFT) >> INSN_OP2_SHIFT_SHIFT; // Bits 11-7
+ uint32_t rm = GetRegister(insn & INSN_OP2_RM);
+ uint32_t t = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
if ((insn & INSN_OP2_RM) == 0xf) {
// "If a register is used to specify the shift amount the PC will be 12 bytes ahead." (instead of 8)
@@ -165,10 +165,10 @@ UINT32 arm7_cpu_device::decodeShift(UINT32 insn, UINT32 *pCarry)
} /* decodeShift */
-int arm7_cpu_device::loadInc(UINT32 pat, UINT32 rbv, UINT32 s, int mode)
+int arm7_cpu_device::loadInc(uint32_t pat, uint32_t rbv, uint32_t s, int mode)
{
int i, result;
- UINT32 data;
+ uint32_t data;
result = 0;
rbv &= ~3;
@@ -202,10 +202,10 @@ int arm7_cpu_device::loadInc(UINT32 pat, UINT32 rbv, UINT32 s, int mode)
}
-int arm7_cpu_device::loadDec(UINT32 pat, UINT32 rbv, UINT32 s, int mode)
+int arm7_cpu_device::loadDec(uint32_t pat, uint32_t rbv, uint32_t s, int mode)
{
int i, result;
- UINT32 data;
+ uint32_t data;
result = 0;
rbv &= ~3;
@@ -239,7 +239,7 @@ int arm7_cpu_device::loadDec(UINT32 pat, UINT32 rbv, UINT32 s, int mode)
}
-int arm7_cpu_device::storeInc(UINT32 pat, UINT32 rbv, int mode)
+int arm7_cpu_device::storeInc(uint32_t pat, uint32_t rbv, int mode)
{
int i, result;
@@ -260,7 +260,7 @@ int arm7_cpu_device::storeInc(UINT32 pat, UINT32 rbv, int mode)
} /* storeInc */
-int arm7_cpu_device::storeDec(UINT32 pat, UINT32 rbv, int mode)
+int arm7_cpu_device::storeDec(uint32_t pat, uint32_t rbv, int mode)
{
int i, result = 0, cnt;
@@ -298,21 +298,21 @@ int arm7_cpu_device::storeDec(UINT32 pat, UINT32 rbv, int mode)
***************************************************************************/
// Co-Processor Data Operation
-void arm7_cpu_device::HandleCoProcDO(UINT32 insn)
+void arm7_cpu_device::HandleCoProcDO(uint32_t insn)
{
// This instruction simply instructs the co-processor to do something, no data is returned to ARM7 core
arm7_do_callback(*m_program, insn, 0, 0); // simply pass entire opcode to callback - since data format is actually dependent on co-proc implementation
}
// Co-Processor Register Transfer - To/From Arm to Co-Proc
-void arm7_cpu_device::HandleCoProcRT(UINT32 insn)
+void arm7_cpu_device::HandleCoProcRT(uint32_t insn)
{
/* xxxx 1110 oooL nnnn dddd cccc ppp1 mmmm */
// Load (MRC) data from Co-Proc to ARM7 register
if (insn & 0x00100000) // Bit 20 = Load or Store
{
- UINT32 res = arm7_rt_r_callback(*m_program, insn, 0); // RT Read handler must parse opcode & return appropriate result
+ uint32_t res = arm7_rt_r_callback(*m_program, insn, 0); // RT Read handler must parse opcode & return appropriate result
if (!m_pendingUnd)
{
SetRegister((insn >> 12) & 0xf, res);
@@ -337,13 +337,13 @@ void arm7_cpu_device::HandleCoProcRT(UINT32 insn)
but if co-proc reads multiple address, it must handle the offset adjustment itself.
*/
// todo: test with valid instructions
-void arm7_cpu_device::HandleCoProcDT(UINT32 insn)
+void arm7_cpu_device::HandleCoProcDT(uint32_t insn)
{
- UINT32 rn = (insn >> 16) & 0xf;
- UINT32 rnv = GetRegister(rn); // Get Address Value stored from Rn
- UINT32 ornv = rnv; // Keep value of Rn
- UINT32 off = (insn & 0xff) << 2; // Offset is << 2 according to manual
- UINT32 *prn = &ARM7REG(rn); // Pointer to our register, so it can be changed in the callback
+ uint32_t rn = (insn >> 16) & 0xf;
+ uint32_t rnv = GetRegister(rn); // Get Address Value stored from Rn
+ uint32_t ornv = rnv; // Keep value of Rn
+ uint32_t off = (insn & 0xff) << 2; // Offset is << 2 according to manual
+ uint32_t *prn = &ARM7REG(rn); // Pointer to our register, so it can be changed in the callback
#if ARM7_DEBUG_CORE
if (((insn >> 16) & 0xf) == 15 && (insn & 0x200000))
@@ -378,9 +378,9 @@ void arm7_cpu_device::HandleCoProcDT(UINT32 insn)
SetRegister(rn, ornv);
}
-void arm7_cpu_device::HandleBranch(UINT32 insn)
+void arm7_cpu_device::HandleBranch(uint32_t insn)
{
- UINT32 off = (insn & INSN_BRANCH) << 2;
+ uint32_t off = (insn & INSN_BRANCH) << 2;
/* Save PC into LR if this is a branch with link */
if (insn & INSN_BL)
@@ -405,9 +405,9 @@ void arm7_cpu_device::HandleBranch(UINT32 insn)
}
}
-void arm7_cpu_device::HandleMemSingle(UINT32 insn)
+void arm7_cpu_device::HandleMemSingle(uint32_t insn)
{
- UINT32 rn, rnv, off, rd, rnv_old = 0;
+ uint32_t rn, rnv, off, rd, rnv_old = 0;
/* Fetch the offset */
if (insn & INSN_I)
@@ -477,7 +477,7 @@ void arm7_cpu_device::HandleMemSingle(UINT32 insn)
/* Load */
if (insn & INSN_SDT_B)
{
- UINT32 data = READ8(rnv);
+ uint32_t data = READ8(rnv);
if (!m_pendingAbtD)
{
SetRegister(rd, data);
@@ -485,7 +485,7 @@ void arm7_cpu_device::HandleMemSingle(UINT32 insn)
}
else
{
- UINT32 data = READ32(rnv);
+ uint32_t data = READ32(rnv);
if (!m_pendingAbtD)
{
if (rd == eR15)
@@ -514,7 +514,7 @@ void arm7_cpu_device::HandleMemSingle(UINT32 insn)
LOG(("Wrote R15 in byte mode\n"));
#endif
- WRITE8(rnv, (UINT8) GetRegister(rd) & 0xffu);
+ WRITE8(rnv, (uint8_t) GetRegister(rd) & 0xffu);
}
else
{
@@ -578,9 +578,9 @@ void arm7_cpu_device::HandleMemSingle(UINT32 insn)
} /* HandleMemSingle */
-void arm7_cpu_device::HandleHalfWordDT(UINT32 insn)
+void arm7_cpu_device::HandleHalfWordDT(uint32_t insn)
{
- UINT32 rn, rnv, off, rd, rnv_old = 0;
+ uint32_t rn, rnv, off, rd, rnv_old = 0;
// Immediate or Register Offset?
if (insn & 0x400000) { // Bit 22 - 1 = immediate, 0 = register
@@ -641,22 +641,22 @@ void arm7_cpu_device::HandleHalfWordDT(UINT32 insn)
// Signed?
if (insn & 0x40)
{
- UINT32 newval;
+ uint32_t newval;
// Signed Half Word?
if (insn & 0x20) {
- UINT16 signbyte, databyte;
+ uint16_t signbyte, databyte;
databyte = READ16(rnv) & 0xFFFF;
signbyte = (databyte & 0x8000) ? 0xffff : 0;
- newval = (UINT32)(signbyte << 16)|databyte;
+ newval = (uint32_t)(signbyte << 16)|databyte;
}
// Signed Byte
else {
- UINT8 databyte;
- UINT32 signbyte;
+ uint8_t databyte;
+ uint32_t signbyte;
databyte = READ8(rnv) & 0xff;
signbyte = (databyte & 0x80) ? 0xffffff : 0;
- newval = (UINT32)(signbyte << 8)|databyte;
+ newval = (uint32_t)(signbyte << 8)|databyte;
}
if (!m_pendingAbtD)
@@ -685,7 +685,7 @@ void arm7_cpu_device::HandleHalfWordDT(UINT32 insn)
// Unsigned Half Word
else
{
- UINT32 newval = READ16(rnv);
+ uint32_t newval = READ16(rnv);
if (!m_pendingAbtD)
{
@@ -790,9 +790,9 @@ void arm7_cpu_device::HandleHalfWordDT(UINT32 insn)
}
-void arm7_cpu_device::HandleSwap(UINT32 insn)
+void arm7_cpu_device::HandleSwap(uint32_t insn)
{
- UINT32 rn, rm, rd, tmp;
+ uint32_t rn, rm, rd, tmp;
rn = GetRegister((insn >> 16) & 0xf); // reg. w/read address
rm = GetRegister(insn & 0xf); // reg. w/write address
@@ -822,10 +822,10 @@ void arm7_cpu_device::HandleSwap(UINT32 insn)
ARM7_ICOUNT -= 1;
}
-void arm7_cpu_device::HandlePSRTransfer(UINT32 insn)
+void arm7_cpu_device::HandlePSRTransfer(uint32_t insn)
{
int reg = (insn & 0x400000) ? SPSR : eCPSR; // Either CPSR or SPSR
- UINT32 newval, val;
+ uint32_t newval, val;
int oldmode = GET_CPSR & MODE_FLAG;
// get old value of CPSR/SPSR
@@ -924,10 +924,10 @@ void arm7_cpu_device::HandlePSRTransfer(UINT32 insn)
}
}
-void arm7_cpu_device::HandleALU(UINT32 insn)
+void arm7_cpu_device::HandleALU(uint32_t insn)
{
- UINT32 op2, sc = 0, rd, rn, opcode;
- UINT32 by, rdn;
+ uint32_t op2, sc = 0, rd, rn, opcode;
+ uint32_t by, rdn;
// Normal Data Processing : 1S
// Data Processing with register specified shift : 1S + 1I
@@ -1092,7 +1092,7 @@ void arm7_cpu_device::HandleALU(UINT32 insn)
}
else
{
- UINT32 temp;
+ uint32_t temp;
R15 = rd; //(R15 & 0x03FFFFFC) | (rd & 0xFC000003);
temp = (GET_CPSR & 0x0FFFFF20) | (rd & 0xF0000000) /* N Z C V */ | ((rd & 0x0C000000) >> (26 - 6)) /* I F */ | (rd & 0x00000003) /* M1 M0 */;
set_cpsr( temp);
@@ -1122,7 +1122,7 @@ void arm7_cpu_device::HandleALU(UINT32 insn)
R15 = rd;
else
{
- UINT32 temp;
+ uint32_t temp;
R15 = (R15 & 0x03FFFFFC) | (rd & ~0x03FFFFFC);
temp = (GET_CPSR & 0x0FFFFF20) | (rd & 0xF0000000) /* N Z C V */ | ((rd & 0x0C000000) >> (26 - 6)) /* I F */ | (rd & 0x00000003) /* M1 M0 */;
set_cpsr( temp);
@@ -1146,9 +1146,9 @@ void arm7_cpu_device::HandleALU(UINT32 insn)
ARM7_ICOUNT += 2;
}
-void arm7_cpu_device::HandleMul(UINT32 insn)
+void arm7_cpu_device::HandleMul(uint32_t insn)
{
- UINT32 r, rm, rs;
+ uint32_t r, rm, rs;
// MUL takes 1S + mI and MLA 1S + (m+1)I cycles to execute, where S and I are as
// defined in 6.2 Cycle Types on page 6-2.
@@ -1196,18 +1196,18 @@ void arm7_cpu_device::HandleMul(UINT32 insn)
}
// todo: add proper cycle counts
-void arm7_cpu_device::HandleSMulLong(UINT32 insn)
+void arm7_cpu_device::HandleSMulLong(uint32_t insn)
{
- INT32 rm, rs;
- UINT32 rhi, rlo;
- INT64 res;
+ int32_t rm, rs;
+ uint32_t rhi, rlo;
+ int64_t res;
// MULL takes 1S + (m+1)I and MLAL 1S + (m+2)I cycles to execute, where m is the
// number of 8 bit multiplier array cycles required to complete the multiply, which is
// controlled by the value of the multiplier operand specified by Rs.
- rm = (INT32)GetRegister(insn & 0xf);
- rs = (INT32)GetRegister(((insn >> 8) & 0xf));
+ rm = (int32_t)GetRegister(insn & 0xf);
+ rs = (int32_t)GetRegister(((insn >> 8) & 0xf));
rhi = (insn >> 16) & 0xf;
rlo = (insn >> 12) & 0xf;
@@ -1217,12 +1217,12 @@ void arm7_cpu_device::HandleSMulLong(UINT32 insn)
#endif
/* Perform the multiplication */
- res = (INT64)rm * rs;
+ res = (int64_t)rm * rs;
/* Add on Rn if this is a MLA */
if (insn & INSN_MUL_A)
{
- INT64 acum = (INT64)((((INT64)(GetRegister(rhi))) << 32) | GetRegister(rlo));
+ int64_t acum = (int64_t)((((int64_t)(GetRegister(rhi))) << 32) | GetRegister(rlo));
res += acum;
// extra cycle for MLA
ARM7_ICOUNT -= 1;
@@ -1248,18 +1248,18 @@ void arm7_cpu_device::HandleSMulLong(UINT32 insn)
}
// todo: add proper cycle counts
-void arm7_cpu_device::HandleUMulLong(UINT32 insn)
+void arm7_cpu_device::HandleUMulLong(uint32_t insn)
{
- UINT32 rm, rs;
- UINT32 rhi, rlo;
- UINT64 res;
+ uint32_t rm, rs;
+ uint32_t rhi, rlo;
+ uint64_t res;
// MULL takes 1S + (m+1)I and MLAL 1S + (m+2)I cycles to execute, where m is the
// number of 8 bit multiplier array cycles required to complete the multiply, which is
// controlled by the value of the multiplier operand specified by Rs.
- rm = (INT32)GetRegister(insn & 0xf);
- rs = (INT32)GetRegister(((insn >> 8) & 0xf));
+ rm = (int32_t)GetRegister(insn & 0xf);
+ rs = (int32_t)GetRegister(((insn >> 8) & 0xf));
rhi = (insn >> 16) & 0xf;
rlo = (insn >> 12) & 0xf;
@@ -1269,12 +1269,12 @@ void arm7_cpu_device::HandleUMulLong(UINT32 insn)
#endif
/* Perform the multiplication */
- res = (UINT64)rm * rs;
+ res = (uint64_t)rm * rs;
/* Add on Rn if this is a MLA */
if (insn & INSN_MUL_A)
{
- UINT64 acum = (UINT64)((((UINT64)(GetRegister(rhi))) << 32) | GetRegister(rlo));
+ uint64_t acum = (uint64_t)((((uint64_t)(GetRegister(rhi))) << 32) | GetRegister(rlo));
res += acum;
// extra cycle for MLA
ARM7_ICOUNT -= 1;
@@ -1298,10 +1298,10 @@ void arm7_cpu_device::HandleUMulLong(UINT32 insn)
ARM7_ICOUNT += 3;
}
-void arm7_cpu_device::HandleMemBlock(UINT32 insn)
+void arm7_cpu_device::HandleMemBlock(uint32_t insn)
{
- UINT32 rb = (insn & INSN_RN) >> INSN_RN_SHIFT;
- UINT32 rbp = GetRegister(rb);
+ uint32_t rb = (insn & INSN_RN) >> INSN_RN_SHIFT;
+ uint32_t rbp = GetRegister(rb);
int result;
#if ARM7_DEBUG_CORE
@@ -1368,7 +1368,7 @@ void arm7_cpu_device::HandleMemBlock(UINT32 insn)
}
else
{
- UINT32 temp;
+ uint32_t temp;
// LOG(("LDM + S | R15 %08X CPSR %08X\n", R15, GET_CPSR));
temp = (GET_CPSR & 0x0FFFFF20) | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */ | (R15 & 0x00000003) /* M1 M0 */;
set_cpsr( temp);
@@ -1425,7 +1425,7 @@ void arm7_cpu_device::HandleMemBlock(UINT32 insn)
}
else
{
- UINT32 temp;
+ uint32_t temp;
// LOG(("LDM + S | R15 %08X CPSR %08X\n", R15, GET_CPSR));
temp = (GET_CPSR & 0x0FFFFF20) /* N Z C V I F M4 M3 M2 M1 M0 */ | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */ | (R15 & 0x00000003) /* M1 M0 */;
set_cpsr(temp);
@@ -1527,7 +1527,7 @@ const arm7_cpu_device::arm7ops_ophandler arm7_cpu_device::ops_handler[0x10] =
&arm7_cpu_device::arm7ops_cd, &arm7_cpu_device::arm7ops_cd, &arm7_cpu_device::arm7ops_e, &arm7_cpu_device::arm7ops_f,
};
-void arm7_cpu_device::arm7ops_0123(UINT32 insn)
+void arm7_cpu_device::arm7ops_0123(uint32_t insn)
{
//case 0:
//case 1:
@@ -1545,8 +1545,8 @@ void arm7_cpu_device::arm7ops_0123(UINT32 insn)
}
else if ((insn & 0x0ff000f0) == 0x01600010) // CLZ - v5
{
- UINT32 rm = insn&0xf;
- UINT32 rd = (insn>>12)&0xf;
+ uint32_t rm = insn&0xf;
+ uint32_t rd = (insn>>12)&0xf;
SetRegister(rd, count_leading_zeros(GetRegister(rm)));
@@ -1554,63 +1554,63 @@ void arm7_cpu_device::arm7ops_0123(UINT32 insn)
}
else if ((insn & 0x0ff000f0) == 0x01000050) // QADD - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>16)&0xf);
- INT64 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>16)&0xf);
+ int64_t res;
- res = saturate_qbit_overflow((INT64)src1 + (INT64)src2);
+ res = saturate_qbit_overflow((int64_t)src1 + (int64_t)src2);
- SetRegister((insn>>12)&0xf, (INT32)res);
+ SetRegister((insn>>12)&0xf, (int32_t)res);
R15 += 4;
}
else if ((insn & 0x0ff000f0) == 0x01400050) // QDADD - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>16)&0xf);
- INT64 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>16)&0xf);
+ int64_t res;
// check if doubling operation will overflow
- res = (INT64)src2 * 2;
+ res = (int64_t)src2 * 2;
saturate_qbit_overflow(res);
src2 *= 2;
- res = saturate_qbit_overflow((INT64)src1 + (INT64)src2);
+ res = saturate_qbit_overflow((int64_t)src1 + (int64_t)src2);
- SetRegister((insn>>12)&0xf, (INT32)res);
+ SetRegister((insn>>12)&0xf, (int32_t)res);
R15 += 4;
}
else if ((insn & 0x0ff000f0) == 0x01200050) // QSUB - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>16)&0xf);
- INT64 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>16)&0xf);
+ int64_t res;
- res = saturate_qbit_overflow((INT64)src1 - (INT64)src2);
+ res = saturate_qbit_overflow((int64_t)src1 - (int64_t)src2);
- SetRegister((insn>>12)&0xf, (INT32)res);
+ SetRegister((insn>>12)&0xf, (int32_t)res);
R15 += 4;
}
else if ((insn & 0x0ff000f0) == 0x01600050) // QDSUB - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>16)&0xf);
- INT64 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>16)&0xf);
+ int64_t res;
// check if doubling operation will overflow
- res = (INT64)src2 * 2;
+ res = (int64_t)src2 * 2;
saturate_qbit_overflow(res);
src2 *= 2;
- res = saturate_qbit_overflow((INT64)src1 - (INT64)src2);
+ res = saturate_qbit_overflow((int64_t)src1 - (int64_t)src2);
- SetRegister((insn>>12)&0xf, (INT32)res);
+ SetRegister((insn>>12)&0xf, (int32_t)res);
R15 += 4;
}
else if ((insn & 0x0ff00090) == 0x01000080) // SMLAxy - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>8)&0xf);
- INT32 res1;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>8)&0xf);
+ int32_t res1;
// select top and bottom halves of src1/src2 and sign extend if necessary
if (insn & 0x20)
@@ -1638,33 +1638,33 @@ void arm7_cpu_device::arm7ops_0123(UINT32 insn)
// do the signed multiply
res1 = src1 * src2;
// and the accumulate. NOTE: only the accumulate can cause an overflow, which is why we do it this way.
- saturate_qbit_overflow((INT64)res1 + (INT64)GetRegister((insn>>12)&0xf));
+ saturate_qbit_overflow((int64_t)res1 + (int64_t)GetRegister((insn>>12)&0xf));
SetRegister((insn>>16)&0xf, res1 + GetRegister((insn>>12)&0xf));
R15 += 4;
}
else if ((insn & 0x0ff00090) == 0x01400080) // SMLALxy - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>8)&0xf);
- INT64 dst;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>8)&0xf);
+ int64_t dst;
- dst = (INT64)GetRegister((insn>>12)&0xf);
- dst |= (INT64)GetRegister((insn>>16)&0xf)<<32;
+ dst = (int64_t)GetRegister((insn>>12)&0xf);
+ dst |= (int64_t)GetRegister((insn>>16)&0xf)<<32;
// do the multiply and accumulate
- dst += (INT64)src1 * (INT64)src2;
+ dst += (int64_t)src1 * (int64_t)src2;
// write back the result
- SetRegister((insn>>12)&0xf, (UINT32)dst);
- SetRegister((insn>>16)&0xf, (UINT32)(dst >> 32));
+ SetRegister((insn>>12)&0xf, (uint32_t)dst);
+ SetRegister((insn>>16)&0xf, (uint32_t)(dst >> 32));
R15 += 4;
}
else if ((insn & 0x0ff00090) == 0x01600080) // SMULxy - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>8)&0xf);
- INT32 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>8)&0xf);
+ int32_t res;
// select top and bottom halves of src1/src2 and sign extend if necessary
if (insn & 0x20)
@@ -1695,9 +1695,9 @@ void arm7_cpu_device::arm7ops_0123(UINT32 insn)
}
else if ((insn & 0x0ff000b0) == 0x012000a0) // SMULWy - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>8)&0xf);
- INT64 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>8)&0xf);
+ int64_t res;
if (insn & 0x40)
{
@@ -1710,17 +1710,17 @@ void arm7_cpu_device::arm7ops_0123(UINT32 insn)
src2 |= 0xffff0000;
}
- res = (INT64)src1 * (INT64)src2;
+ res = (int64_t)src1 * (int64_t)src2;
res >>= 16;
- SetRegister((insn>>16)&0xf, (UINT32)res);
+ SetRegister((insn>>16)&0xf, (uint32_t)res);
R15 += 4;
}
else if ((insn & 0x0ff000b0) == 0x01200080) // SMLAWy - v5
{
- INT32 src1 = GetRegister(insn&0xf);
- INT32 src2 = GetRegister((insn>>8)&0xf);
- INT32 src3 = GetRegister((insn>>12)&0xf);
- INT64 res;
+ int32_t src1 = GetRegister(insn&0xf);
+ int32_t src2 = GetRegister((insn>>8)&0xf);
+ int32_t src3 = GetRegister((insn>>12)&0xf);
+ int64_t res;
if (insn & 0x40)
{
@@ -1733,17 +1733,17 @@ void arm7_cpu_device::arm7ops_0123(UINT32 insn)
src2 |= 0xffff0000;
}
- res = (INT64)src1 * (INT64)src2;
+ res = (int64_t)src1 * (int64_t)src2;
res >>= 16;
// check for overflow and set the Q bit
- saturate_qbit_overflow((INT64)src3 + res);
+ saturate_qbit_overflow((int64_t)src3 + res);
// do the real accumulate
- src3 += (INT32)res;
+ src3 += (int32_t)res;
// write the result back
- SetRegister((insn>>16)&0xf, (UINT32)res);
+ SetRegister((insn>>16)&0xf, (uint32_t)res);
R15 += 4;
}
else
@@ -1800,7 +1800,7 @@ void arm7_cpu_device::arm7ops_0123(UINT32 insn)
// break;
}
-void arm7_cpu_device::arm7ops_4567(UINT32 insn) /* Data Transfer - Single Data Access */
+void arm7_cpu_device::arm7ops_4567(uint32_t insn) /* Data Transfer - Single Data Access */
{
//case 4:
//case 5:
@@ -1811,7 +1811,7 @@ void arm7_cpu_device::arm7ops_4567(UINT32 insn) /* Data Transfer - Single Data A
// break;
}
-void arm7_cpu_device::arm7ops_89(UINT32 insn) /* Block Data Transfer/Access */
+void arm7_cpu_device::arm7ops_89(uint32_t insn) /* Block Data Transfer/Access */
{
//case 8:
//case 9:
@@ -1820,7 +1820,7 @@ void arm7_cpu_device::arm7ops_89(UINT32 insn) /* Block Data Transfer/Access */
// break;
}
-void arm7_cpu_device::arm7ops_ab(UINT32 insn) /* Branch or Branch & Link */
+void arm7_cpu_device::arm7ops_ab(uint32_t insn) /* Branch or Branch & Link */
{
//case 0xa:
//case 0xb:
@@ -1828,7 +1828,7 @@ void arm7_cpu_device::arm7ops_ab(UINT32 insn) /* Branch or Branch & Link */
// break;
}
-void arm7_cpu_device::arm7ops_cd(UINT32 insn) /* Co-Processor Data Transfer */
+void arm7_cpu_device::arm7ops_cd(uint32_t insn) /* Co-Processor Data Transfer */
{
//case 0xc:
//case 0xd:
@@ -1837,7 +1837,7 @@ void arm7_cpu_device::arm7ops_cd(UINT32 insn) /* Co-Processor Data Transfer */
// break;
}
-void arm7_cpu_device::arm7ops_e(UINT32 insn) /* Co-Processor Data Operation or Register Transfer */
+void arm7_cpu_device::arm7ops_e(uint32_t insn) /* Co-Processor Data Operation or Register Transfer */
{
//case 0xe:
if (insn & 0x10)
@@ -1848,7 +1848,7 @@ void arm7_cpu_device::arm7ops_e(UINT32 insn) /* Co-Processor Data Operation or R
// break;
}
-void arm7_cpu_device::arm7ops_f(UINT32 insn) /* Software Interrupt */
+void arm7_cpu_device::arm7ops_f(uint32_t insn) /* Software Interrupt */
{
m_pendingSwi = true;
update_irq_state();
diff --git a/src/devices/cpu/arm7/arm7tdrc.hxx b/src/devices/cpu/arm7/arm7tdrc.hxx
index ee0573a32e7..fac7a70f7fa 100644
--- a/src/devices/cpu/arm7/arm7tdrc.hxx
+++ b/src/devices/cpu/arm7/arm7tdrc.hxx
@@ -7,7 +7,7 @@
const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[0x40*0x10] =
{
-// #define THUMB_SHIFT_R ((UINT16)0x0800)
+// #define THUMB_SHIFT_R ((uint16_t)0x0800)
&arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0,
&arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0,
&arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0, &arm7_cpu_device::drctg00_0,
@@ -16,7 +16,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1,
&arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1,
&arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1, &arm7_cpu_device::drctg00_1,
-// #define THUMB_INSN_ADDSUB ((UINT16)0x0800) // #define THUMB_ADDSUB_TYPE ((UINT16)0x0600)
+// #define THUMB_INSN_ADDSUB ((uint16_t)0x0800) // #define THUMB_ADDSUB_TYPE ((uint16_t)0x0600)
&arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0,
&arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0,
&arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0, &arm7_cpu_device::drctg01_0,
@@ -25,7 +25,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg01_11, &arm7_cpu_device::drctg01_11, &arm7_cpu_device::drctg01_11, &arm7_cpu_device::drctg01_11, &arm7_cpu_device::drctg01_11, &arm7_cpu_device::drctg01_11, &arm7_cpu_device::drctg01_11, &arm7_cpu_device::drctg01_11,
&arm7_cpu_device::drctg01_12, &arm7_cpu_device::drctg01_12, &arm7_cpu_device::drctg01_12, &arm7_cpu_device::drctg01_12, &arm7_cpu_device::drctg01_12, &arm7_cpu_device::drctg01_12, &arm7_cpu_device::drctg01_12, &arm7_cpu_device::drctg01_12,
&arm7_cpu_device::drctg01_13, &arm7_cpu_device::drctg01_13, &arm7_cpu_device::drctg01_13, &arm7_cpu_device::drctg01_13, &arm7_cpu_device::drctg01_13, &arm7_cpu_device::drctg01_13, &arm7_cpu_device::drctg01_13, &arm7_cpu_device::drctg01_13,
-// #define THUMB_INSN_CMP ((UINT16)0x0800)
+// #define THUMB_INSN_CMP ((uint16_t)0x0800)
&arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0,
&arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0,
&arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0, &arm7_cpu_device::drctg02_0,
@@ -34,7 +34,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1,
&arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1,
&arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1, &arm7_cpu_device::drctg02_1,
-// #define THUMB_INSN_SUB ((UINT16)0x0800)
+// #define THUMB_INSN_SUB ((uint16_t)0x0800)
&arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0,
&arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0,
&arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0, &arm7_cpu_device::drctg03_0,
@@ -43,7 +43,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1,
&arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1,
&arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1, &arm7_cpu_device::drctg03_1,
-//#define THUMB_GROUP4_TYPE ((UINT16)0x0c00) //#define THUMB_ALUOP_TYPE ((UINT16)0x03c0) // #define THUMB_HIREG_OP ((UINT16)0x0300) // #define THUMB_HIREG_H ((UINT16)0x00c0)
+//#define THUMB_GROUP4_TYPE ((uint16_t)0x0c00) //#define THUMB_ALUOP_TYPE ((uint16_t)0x03c0) // #define THUMB_HIREG_OP ((uint16_t)0x0300) // #define THUMB_HIREG_H ((uint16_t)0x00c0)
&arm7_cpu_device::drctg04_00_00, &arm7_cpu_device::drctg04_00_01, &arm7_cpu_device::drctg04_00_02, &arm7_cpu_device::drctg04_00_03, &arm7_cpu_device::drctg04_00_04, &arm7_cpu_device::drctg04_00_05, &arm7_cpu_device::drctg04_00_06, &arm7_cpu_device::drctg04_00_07,
&arm7_cpu_device::drctg04_00_08, &arm7_cpu_device::drctg04_00_09, &arm7_cpu_device::drctg04_00_0a, &arm7_cpu_device::drctg04_00_0b, &arm7_cpu_device::drctg04_00_0c, &arm7_cpu_device::drctg04_00_0d, &arm7_cpu_device::drctg04_00_0e, &arm7_cpu_device::drctg04_00_0f,
&arm7_cpu_device::drctg04_01_00, &arm7_cpu_device::drctg04_01_01, &arm7_cpu_device::drctg04_01_02, &arm7_cpu_device::drctg04_01_03, &arm7_cpu_device::drctg04_01_10, &arm7_cpu_device::drctg04_01_11, &arm7_cpu_device::drctg04_01_12, &arm7_cpu_device::drctg04_01_13,
@@ -52,7 +52,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203,
&arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203,
&arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203, &arm7_cpu_device::drctg04_0203,
-//#define THUMB_GROUP5_TYPE ((UINT16)0x0e00)
+//#define THUMB_GROUP5_TYPE ((uint16_t)0x0e00)
&arm7_cpu_device::drctg05_0, &arm7_cpu_device::drctg05_0, &arm7_cpu_device::drctg05_0, &arm7_cpu_device::drctg05_0, &arm7_cpu_device::drctg05_0, &arm7_cpu_device::drctg05_0, &arm7_cpu_device::drctg05_0, &arm7_cpu_device::drctg05_0,
&arm7_cpu_device::drctg05_1, &arm7_cpu_device::drctg05_1, &arm7_cpu_device::drctg05_1, &arm7_cpu_device::drctg05_1, &arm7_cpu_device::drctg05_1, &arm7_cpu_device::drctg05_1, &arm7_cpu_device::drctg05_1, &arm7_cpu_device::drctg05_1,
&arm7_cpu_device::drctg05_2, &arm7_cpu_device::drctg05_2, &arm7_cpu_device::drctg05_2, &arm7_cpu_device::drctg05_2, &arm7_cpu_device::drctg05_2, &arm7_cpu_device::drctg05_2, &arm7_cpu_device::drctg05_2, &arm7_cpu_device::drctg05_2,
@@ -61,7 +61,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg05_5, &arm7_cpu_device::drctg05_5, &arm7_cpu_device::drctg05_5, &arm7_cpu_device::drctg05_5, &arm7_cpu_device::drctg05_5, &arm7_cpu_device::drctg05_5, &arm7_cpu_device::drctg05_5, &arm7_cpu_device::drctg05_5,
&arm7_cpu_device::drctg05_6, &arm7_cpu_device::drctg05_6, &arm7_cpu_device::drctg05_6, &arm7_cpu_device::drctg05_6, &arm7_cpu_device::drctg05_6, &arm7_cpu_device::drctg05_6, &arm7_cpu_device::drctg05_6, &arm7_cpu_device::drctg05_6,
&arm7_cpu_device::drctg05_7, &arm7_cpu_device::drctg05_7, &arm7_cpu_device::drctg05_7, &arm7_cpu_device::drctg05_7, &arm7_cpu_device::drctg05_7, &arm7_cpu_device::drctg05_7, &arm7_cpu_device::drctg05_7, &arm7_cpu_device::drctg05_7,
-//#define THUMB_LSOP_L ((UINT16)0x0800)
+//#define THUMB_LSOP_L ((uint16_t)0x0800)
&arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0,
&arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0,
&arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0, &arm7_cpu_device::drctg06_0,
@@ -70,7 +70,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1,
&arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1,
&arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1, &arm7_cpu_device::drctg06_1,
-//#define THUMB_LSOP_L ((UINT16)0x0800)
+//#define THUMB_LSOP_L ((uint16_t)0x0800)
&arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0,
&arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0,
&arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0, &arm7_cpu_device::drctg07_0,
@@ -79,7 +79,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1,
&arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1,
&arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1, &arm7_cpu_device::drctg07_1,
-// #define THUMB_HALFOP_L ((UINT16)0x0800)
+// #define THUMB_HALFOP_L ((uint16_t)0x0800)
&arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0,
&arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0,
&arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0, &arm7_cpu_device::drctg08_0,
@@ -88,7 +88,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1,
&arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1,
&arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1, &arm7_cpu_device::drctg08_1,
-// #define THUMB_STACKOP_L ((UINT16)0x0800)
+// #define THUMB_STACKOP_L ((uint16_t)0x0800)
&arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0,
&arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0,
&arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0, &arm7_cpu_device::drctg09_0,
@@ -97,7 +97,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1,
&arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1,
&arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1, &arm7_cpu_device::drctg09_1,
-// #define THUMB_RELADDR_SP ((UINT16)0x0800)
+// #define THUMB_RELADDR_SP ((uint16_t)0x0800)
&arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0,
&arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0,
&arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0, &arm7_cpu_device::drctg0a_0,
@@ -106,7 +106,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1,
&arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1,
&arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1, &arm7_cpu_device::drctg0a_1,
-// #define THUMB_STACKOP_TYPE ((UINT16)0x0f00)
+// #define THUMB_STACKOP_TYPE ((uint16_t)0x0f00)
&arm7_cpu_device::drctg0b_0, &arm7_cpu_device::drctg0b_0, &arm7_cpu_device::drctg0b_0, &arm7_cpu_device::drctg0b_0, &arm7_cpu_device::drctg0b_1, &arm7_cpu_device::drctg0b_1, &arm7_cpu_device::drctg0b_1, &arm7_cpu_device::drctg0b_1,
&arm7_cpu_device::drctg0b_2, &arm7_cpu_device::drctg0b_2, &arm7_cpu_device::drctg0b_2, &arm7_cpu_device::drctg0b_2, &arm7_cpu_device::drctg0b_3, &arm7_cpu_device::drctg0b_3, &arm7_cpu_device::drctg0b_3, &arm7_cpu_device::drctg0b_3,
&arm7_cpu_device::drctg0b_4, &arm7_cpu_device::drctg0b_4, &arm7_cpu_device::drctg0b_4, &arm7_cpu_device::drctg0b_4, &arm7_cpu_device::drctg0b_5, &arm7_cpu_device::drctg0b_5, &arm7_cpu_device::drctg0b_5, &arm7_cpu_device::drctg0b_5,
@@ -115,7 +115,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg0b_a, &arm7_cpu_device::drctg0b_a, &arm7_cpu_device::drctg0b_a, &arm7_cpu_device::drctg0b_a, &arm7_cpu_device::drctg0b_b, &arm7_cpu_device::drctg0b_b, &arm7_cpu_device::drctg0b_b, &arm7_cpu_device::drctg0b_b,
&arm7_cpu_device::drctg0b_c, &arm7_cpu_device::drctg0b_c, &arm7_cpu_device::drctg0b_c, &arm7_cpu_device::drctg0b_c, &arm7_cpu_device::drctg0b_d, &arm7_cpu_device::drctg0b_d, &arm7_cpu_device::drctg0b_d, &arm7_cpu_device::drctg0b_d,
&arm7_cpu_device::drctg0b_e, &arm7_cpu_device::drctg0b_e, &arm7_cpu_device::drctg0b_e, &arm7_cpu_device::drctg0b_e, &arm7_cpu_device::drctg0b_f, &arm7_cpu_device::drctg0b_f, &arm7_cpu_device::drctg0b_f, &arm7_cpu_device::drctg0b_f,
-// #define THUMB_MULTLS ((UINT16)0x0800)
+// #define THUMB_MULTLS ((uint16_t)0x0800)
&arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0,
&arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0,
&arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0, &arm7_cpu_device::drctg0c_0,
@@ -124,7 +124,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1,
&arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1,
&arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1, &arm7_cpu_device::drctg0c_1,
-// #define THUMB_COND_TYPE ((UINT16)0x0f00)
+// #define THUMB_COND_TYPE ((uint16_t)0x0f00)
&arm7_cpu_device::drctg0d_0, &arm7_cpu_device::drctg0d_0, &arm7_cpu_device::drctg0d_0, &arm7_cpu_device::drctg0d_0, &arm7_cpu_device::drctg0d_1, &arm7_cpu_device::drctg0d_1, &arm7_cpu_device::drctg0d_1, &arm7_cpu_device::drctg0d_1,
&arm7_cpu_device::drctg0d_2, &arm7_cpu_device::drctg0d_2, &arm7_cpu_device::drctg0d_2, &arm7_cpu_device::drctg0d_2, &arm7_cpu_device::drctg0d_3, &arm7_cpu_device::drctg0d_3, &arm7_cpu_device::drctg0d_3, &arm7_cpu_device::drctg0d_3,
&arm7_cpu_device::drctg0d_4, &arm7_cpu_device::drctg0d_4, &arm7_cpu_device::drctg0d_4, &arm7_cpu_device::drctg0d_4, &arm7_cpu_device::drctg0d_5, &arm7_cpu_device::drctg0d_5, &arm7_cpu_device::drctg0d_5, &arm7_cpu_device::drctg0d_5,
@@ -133,7 +133,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg0d_a, &arm7_cpu_device::drctg0d_a, &arm7_cpu_device::drctg0d_a, &arm7_cpu_device::drctg0d_a, &arm7_cpu_device::drctg0d_b, &arm7_cpu_device::drctg0d_b, &arm7_cpu_device::drctg0d_b, &arm7_cpu_device::drctg0d_b,
&arm7_cpu_device::drctg0d_c, &arm7_cpu_device::drctg0d_c, &arm7_cpu_device::drctg0d_c, &arm7_cpu_device::drctg0d_c, &arm7_cpu_device::drctg0d_d, &arm7_cpu_device::drctg0d_d, &arm7_cpu_device::drctg0d_d, &arm7_cpu_device::drctg0d_d,
&arm7_cpu_device::drctg0d_e, &arm7_cpu_device::drctg0d_e, &arm7_cpu_device::drctg0d_e, &arm7_cpu_device::drctg0d_e, &arm7_cpu_device::drctg0d_f, &arm7_cpu_device::drctg0d_f, &arm7_cpu_device::drctg0d_f, &arm7_cpu_device::drctg0d_f,
-// #define THUMB_BLOP_LO ((UINT16)0x0800)
+// #define THUMB_BLOP_LO ((uint16_t)0x0800)
&arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0,
&arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0,
&arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0, &arm7_cpu_device::drctg0e_0,
@@ -142,7 +142,7 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
&arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1,
&arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1,
&arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1, &arm7_cpu_device::drctg0e_1,
-// #define THUMB_BLOP_LO ((UINT16)0x0800)
+// #define THUMB_BLOP_LO ((uint16_t)0x0800)
&arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0,
&arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0,
&arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0, &arm7_cpu_device::drctg0f_0,
@@ -157,10 +157,10 @@ const arm7_cpu_device::arm7thumb_drcophandler arm7_cpu_device::drcthumb_handler[
void arm7_cpu_device::drctg00_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Shift left */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- INT32 offs = (op & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ int32_t offs = (op & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
UML_MOV(block, uml::I0, DRC_RS); // rrs
if (offs != 0)
@@ -184,10 +184,10 @@ void arm7_cpu_device::drctg00_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg00_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Shift right */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- INT32 offs = (op & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ int32_t offs = (op & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
UML_MOV(block, uml::I0, DRC_RS); // rrs
if (offs != 0)
@@ -218,10 +218,10 @@ void arm7_cpu_device::drctg00_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg01_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- INT32 offs = (op & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ int32_t offs = (op & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
/* ASR.. */
UML_MOV(block, uml::I0, DRC_RS);
@@ -262,40 +262,40 @@ void arm7_cpu_device::drctg01_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg01_10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_ADD(block, DRC_REG(rd), DRC_REG(rs), DRC_REG(rn));
DRCHandleThumbALUAddFlags(DRC_REG(rd), DRC_REG(rs), DRC_REG(rn));
}
void arm7_cpu_device::drctg01_11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* SUB Rd, Rs, Rn */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_SUB(block, DRC_REG(rd), DRC_REG(rs), DRC_REG(rn));
DRCHandleThumbALUSubFlags(DRC_REG(rd), DRC_REG(rs), DRC_REG(rn));
}
void arm7_cpu_device::drctg01_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, Rs, #imm */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_ADD(block, DRC_REG(rd), DRC_REG(rs), imm);
DRCHandleThumbALUAddFlags(DRC_REG(rd), DRC_REG(rs), imm);
}
void arm7_cpu_device::drctg01_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* SUB Rd, Rs, #imm */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_SUB(block, DRC_REG(rd), DRC_REG(rs), imm);
DRCHandleThumbALUSubFlags(DRC_REG(rd), DRC_REG(rs), imm);
}
@@ -304,9 +304,9 @@ void arm7_cpu_device::drctg01_13(drcuml_block *block, compiler_state *compiler,
void arm7_cpu_device::drctg02_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
- UINT32 op2 = (op & THUMB_INSN_IMM);
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
+ uint32_t op2 = (op & THUMB_INSN_IMM);
UML_MOV(block, DRC_REG(rd), op2);
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK));
DRCHandleALUNZFlags(DRC_REG(rd));
@@ -316,9 +316,9 @@ void arm7_cpu_device::drctg02_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg02_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
- UINT32 op2 = op & THUMB_INSN_IMM;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
+ uint32_t op2 = op & THUMB_INSN_IMM;
UML_SUB(block, uml::I3, DRC_REG(rn), op2);
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rn), op2);
@@ -328,20 +328,20 @@ void arm7_cpu_device::drctg02_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg03_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, #Offset8 */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
- UINT32 op2 = op & THUMB_INSN_IMM;
- UINT32 rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
+ uint32_t op2 = op & THUMB_INSN_IMM;
+ uint32_t rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
UML_ADD(block, DRC_REG(rd), DRC_REG(rn), op2);
DRCHandleThumbALUAddFlags(DRC_REG(rd), DRC_REG(rn), op2);
}
void arm7_cpu_device::drctg03_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* SUB Rd, #Offset8 */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
- UINT32 op2 = op & THUMB_INSN_IMM;
- UINT32 rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
+ uint32_t op2 = op & THUMB_INSN_IMM;
+ uint32_t rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
UML_SUB(block, DRC_REG(rd), DRC_REG(rn), op2);
DRCHandleThumbALUSubFlags(DRC_REG(rd), DRC_REG(rn), op2);
}
@@ -350,9 +350,9 @@ void arm7_cpu_device::drctg03_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg04_00_00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* AND Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_AND(block, DRC_REG(rd), DRC_REG(rd), DRC_REG(rs));
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK));
DRCHandleALUNZFlags(DRC_REG(rd));
@@ -362,9 +362,9 @@ void arm7_cpu_device::drctg04_00_00(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* EOR Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_XOR(block, DRC_REG(rd), DRC_REG(rd), DRC_REG(rs));
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK));
DRCHandleALUNZFlags(DRC_REG(rd));
@@ -374,9 +374,9 @@ void arm7_cpu_device::drctg04_00_01(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LSL Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
uml::code_label skip;
uml::code_label offsg32;
uml::code_label offs32;
@@ -421,9 +421,9 @@ void arm7_cpu_device::drctg04_00_02(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LSR Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
uml::code_label skip;
uml::code_label offsg32;
uml::code_label offs32;
@@ -466,9 +466,9 @@ void arm7_cpu_device::drctg04_00_03(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_04(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ASR Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
uml::code_label skip;
uml::code_label offsg32;
uml::code_label offs32;
@@ -514,9 +514,9 @@ void arm7_cpu_device::drctg04_00_04(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_05(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADC Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_TEST(block, DRC_CPSR, C_MASK);
UML_MOVc(block, uml::COND_NZ, uml::I3, 1);
UML_MOVc(block, uml::COND_Z, uml::I3, 0);
@@ -528,9 +528,9 @@ void arm7_cpu_device::drctg04_00_05(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_06(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* SBC Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_TEST(block, DRC_CPSR, C_MASK);
UML_MOVc(block, uml::COND_NZ, uml::I3, 0);
UML_MOVc(block, uml::COND_Z, uml::I3, 1);
@@ -542,9 +542,9 @@ void arm7_cpu_device::drctg04_00_06(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_07(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ROR Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_MOV(block, uml::I0, DRC_REG(rd));
UML_AND(block, uml::I1, DRC_REG(rs), 0x1f);
UML_SHR(block, DRC_REG(rd), uml::I0, uml::I1);
@@ -564,9 +564,9 @@ void arm7_cpu_device::drctg04_00_07(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_08(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* TST Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK));
UML_AND(block, uml::I2, DRC_REG(rd), DRC_REG(rs));
DRCHandleALUNZFlags(uml::I2);
@@ -576,9 +576,9 @@ void arm7_cpu_device::drctg04_00_08(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_09(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* NEG Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_MOV(block, uml::I3, DRC_REG(rs));
UML_SUB(block, DRC_REG(rd), 0, uml::I3);
DRCHandleThumbALUSubFlags(DRC_REG(rd), 0, uml::I3);
@@ -586,27 +586,27 @@ void arm7_cpu_device::drctg04_00_09(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_0a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_SUB(block, uml::I3, DRC_REG(rd), DRC_REG(rs));
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd), DRC_REG(rs));
}
void arm7_cpu_device::drctg04_00_0b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMN Rd, Rs - check flags, add dasm */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_ADD(block, uml::I3, DRC_REG(rd), DRC_REG(rs));
DRCHandleThumbALUAddFlags(uml::I3, DRC_REG(rd), DRC_REG(rs));
}
void arm7_cpu_device::drctg04_00_0c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ORR Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_OR(block, DRC_REG(rd), DRC_REG(rd), DRC_REG(rs));
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK));
DRCHandleALUNZFlags(DRC_REG(rd));
@@ -616,9 +616,9 @@ void arm7_cpu_device::drctg04_00_0c(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_0d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MUL Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK));
UML_MULU(block, DRC_REG(rd), uml::I1, DRC_REG(rd), DRC_REG(rs));
DRCHandleALUNZFlags(DRC_REG(rd));
@@ -628,9 +628,9 @@ void arm7_cpu_device::drctg04_00_0d(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_0e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* BIC Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK));
UML_XOR(block, uml::I0, DRC_REG(rs), ~0);
UML_AND(block, DRC_REG(rd), DRC_REG(rd), uml::I0);
@@ -641,9 +641,9 @@ void arm7_cpu_device::drctg04_00_0e(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_00_0f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MVN Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_XOR(block, uml::I0, DRC_REG(rs), ~0);
UML_MOV(block, DRC_REG(rd), uml::I0);
UML_AND(block, DRC_CPSR, DRC_CPSR, ~(Z_MASK | N_MASK));
@@ -656,16 +656,16 @@ void arm7_cpu_device::drctg04_00_0f(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_00(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: G4-1-0 Undefined Thumb instruction: %04x %x\n", pc, op, (op & THUMB_HIREG_H) >> THUMB_HIREG_H_SHIFT);
}
void arm7_cpu_device::drctg04_01_01(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, HRs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_ADD(block, DRC_REG(rd), DRC_REG(rd), DRC_REG(rs+8));
if (rs == 7)
{
@@ -676,9 +676,9 @@ void arm7_cpu_device::drctg04_01_01(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_02(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD HRd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_ADD(block, DRC_REG(rd+8), DRC_REG(rd+8), DRC_REG(rs));
if (rd == 7)
{
@@ -689,9 +689,9 @@ void arm7_cpu_device::drctg04_01_02(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_03(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Add HRd, HRs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_ADD(block, DRC_REG(rd+8), DRC_REG(rd+8), DRC_REG(rs+8));
// emulate the effects of pre-fetch
if (rs == 7)
@@ -707,36 +707,36 @@ void arm7_cpu_device::drctg04_01_03(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_10(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Rd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_SUB(block, uml::I3, DRC_REG(rd), DRC_REG(rs));
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd), DRC_REG(rs));
}
void arm7_cpu_device::drctg04_01_11(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Rd, Hs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_SUB(block, uml::I3, DRC_REG(rd), DRC_REG(rs+8));
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd), DRC_REG(rs+8));
}
void arm7_cpu_device::drctg04_01_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Hd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_SUB(block, uml::I3, DRC_REG(rd+8), DRC_REG(rs));
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd+8), DRC_REG(rs));
}
void arm7_cpu_device::drctg04_01_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* CMP Hd, Hs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_SUB(block, uml::I3, DRC_REG(rd+8), DRC_REG(rs+8));
DRCHandleThumbALUSubFlags(uml::I3, DRC_REG(rd+8), DRC_REG(rs+8));
}
@@ -745,18 +745,18 @@ void arm7_cpu_device::drctg04_01_13(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_20(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MOV Rd, Rs (undefined) */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_MOV(block, DRC_REG(rd), DRC_REG(rs));
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
void arm7_cpu_device::drctg04_01_21(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MOV Rd, Hs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_MOV(block, DRC_REG(rd), DRC_REG(rs+8));
if (rs == 7)
{
@@ -767,9 +767,9 @@ void arm7_cpu_device::drctg04_01_21(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_22(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MOV Hd, Rs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_MOV(block, DRC_REG(rd+8), DRC_REG(rs));
// CHECKME
if (rd != 7)
@@ -784,9 +784,9 @@ void arm7_cpu_device::drctg04_01_22(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_23(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* MOV Hd, Hs */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
UML_MOV(block, DRC_REG(rd+8), DRC_REG(rs+8));
if (rs == 7)
{
@@ -805,10 +805,10 @@ void arm7_cpu_device::drctg04_01_23(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_30(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
uml::code_label switch_state;
uml::code_label done;
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
UML_MOV(block, uml::I0, DRC_REG(rs));
UML_TEST(block, uml::I0, 1);
UML_JMPc(block, uml::COND_Z, switch_state = compiler->labelnum++);
@@ -828,10 +828,10 @@ void arm7_cpu_device::drctg04_01_30(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_31(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
uml::code_label switch_state;
uml::code_label done;
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
UML_MOV(block, uml::I0, DRC_REG(rs+8));
if(rs == 7)
{
@@ -855,23 +855,23 @@ void arm7_cpu_device::drctg04_01_31(drcuml_block *block, compiler_state *compile
void arm7_cpu_device::drctg04_01_32(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: G4-3 Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg04_01_33(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: G4-3 Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg04_0203(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
- UINT32 imm = 4 + ((op & THUMB_INSN_IMM) << 2);
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
+ uint32_t imm = 4 + ((op & THUMB_INSN_IMM) << 2);
UML_AND(block, uml::I0, DRC_PC, ~2);
UML_ADD(block, uml::I0, uml::I0, imm);
UML_CALLH(block, *m_impstate.read32);
@@ -883,10 +883,10 @@ void arm7_cpu_device::drctg04_0203(drcuml_block *block, compiler_state *compiler
void arm7_cpu_device::drctg05_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* STR Rd, [Rn, Rm] */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
UML_MOV(block, uml::I1, DRC_REG(rd));
UML_ADD(block, uml::I0, DRC_REG(rn), DRC_REG(rm));
UML_CALLH(block, *m_impstate.write32);
@@ -895,10 +895,10 @@ void arm7_cpu_device::drctg05_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg05_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* STRH Rd, [Rn, Rm] */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
UML_MOV(block, uml::I1, DRC_REG(rd));
UML_ADD(block, uml::I0, DRC_REG(rn), DRC_REG(rm));
UML_CALLH(block, *m_impstate.write16);
@@ -907,10 +907,10 @@ void arm7_cpu_device::drctg05_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg05_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* STRB Rd, [Rn, Rm] */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
UML_MOV(block, uml::I1, DRC_REG(rd));
UML_ADD(block, uml::I0, DRC_REG(rn), DRC_REG(rm));
UML_CALLH(block, *m_impstate.write16);
@@ -919,10 +919,10 @@ void arm7_cpu_device::drctg05_2(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg05_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDSB Rd, [Rn, Rm] todo, add dasm */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), DRC_REG(rm));
UML_CALLH(block, *m_impstate.read8);
UML_SEXT(block, DRC_REG(rd), uml::I0, uml::SIZE_BYTE);
@@ -931,10 +931,10 @@ void arm7_cpu_device::drctg05_3(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg05_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDR Rd, [Rn, Rm] */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), DRC_REG(rm));
UML_CALLH(block, *m_impstate.read32);
UML_MOV(block, DRC_REG(rd), uml::I0);
@@ -943,10 +943,10 @@ void arm7_cpu_device::drctg05_4(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg05_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDRH Rd, [Rn, Rm] */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), DRC_REG(rm));
UML_CALLH(block, *m_impstate.read16);
UML_MOV(block, DRC_REG(rd), uml::I0);
@@ -955,10 +955,10 @@ void arm7_cpu_device::drctg05_5(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg05_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDRB Rd, [Rn, Rm] */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), DRC_REG(rm));
UML_CALLH(block, *m_impstate.read8);
UML_MOV(block, DRC_REG(rd), uml::I0);
@@ -967,10 +967,10 @@ void arm7_cpu_device::drctg05_6(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg05_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* LDSH Rd, [Rn, Rm] */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), DRC_REG(rm));
UML_CALLH(block, *m_impstate.read16);
UML_SEXT(block, DRC_REG(rd), uml::I0, uml::SIZE_WORD);
@@ -981,10 +981,10 @@ void arm7_cpu_device::drctg05_7(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg06_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = op & THUMB_ADDSUB_RD;
- INT32 offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = op & THUMB_ADDSUB_RD;
+ int32_t offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2;
UML_ADD(block, uml::I0, DRC_REG(rn), offs);
UML_MOV(block, uml::I1, DRC_REG(rd));
UML_CALLH(block, *m_impstate.write32);
@@ -993,10 +993,10 @@ void arm7_cpu_device::drctg06_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg06_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = op & THUMB_ADDSUB_RD;
- INT32 offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = op & THUMB_ADDSUB_RD;
+ int32_t offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2;
UML_ADD(block, uml::I0, DRC_REG(rn), offs);
UML_CALLH(block, *m_impstate.read32);
UML_MOV(block, DRC_REG(rd), uml::I0);
@@ -1007,10 +1007,10 @@ void arm7_cpu_device::drctg06_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg07_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = op & THUMB_ADDSUB_RD;
- INT32 offs = (op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = op & THUMB_ADDSUB_RD;
+ int32_t offs = (op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), offs);
UML_MOV(block, uml::I1, DRC_REG(rd));
UML_CALLH(block, *m_impstate.write8);
@@ -1019,10 +1019,10 @@ void arm7_cpu_device::drctg07_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg07_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = op & THUMB_ADDSUB_RD;
- INT32 offs = (op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = op & THUMB_ADDSUB_RD;
+ int32_t offs = (op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), offs);
UML_CALLH(block, *m_impstate.read8);
UML_MOV(block, DRC_REG(rd), uml::I0);
@@ -1033,10 +1033,10 @@ void arm7_cpu_device::drctg07_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg08_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 offs = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t offs = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), offs << 1);
UML_MOV(block, uml::I1, DRC_REG(rd));
UML_CALLH(block, *m_impstate.write16);
@@ -1045,10 +1045,10 @@ void arm7_cpu_device::drctg08_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg08_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 offs = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t offs = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
UML_ADD(block, uml::I0, DRC_REG(rn), offs << 1);
UML_CALLH(block, *m_impstate.read16);
UML_MOV(block, DRC_REG(rd), uml::I0);
@@ -1059,9 +1059,9 @@ void arm7_cpu_device::drctg08_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg09_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
- INT32 offs = (UINT8)(op & THUMB_INSN_IMM) << 2;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
+ int32_t offs = (uint8_t)(op & THUMB_INSN_IMM) << 2;
UML_ADD(block, uml::I0, DRC_REG(13), offs);
UML_MOV(block, uml::I1, DRC_REG(rd));
UML_CALLH(block, *m_impstate.write32);
@@ -1070,9 +1070,9 @@ void arm7_cpu_device::drctg09_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg09_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
- UINT32 offs = (UINT8)(op & THUMB_INSN_IMM) << 2;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
+ uint32_t offs = (uint8_t)(op & THUMB_INSN_IMM) << 2;
UML_ADD(block, uml::I0, DRC_REG(13), offs);
UML_CALLH(block, *m_impstate.read32);
UML_MOV(block, DRC_REG(rd), uml::I0);
@@ -1083,9 +1083,9 @@ void arm7_cpu_device::drctg09_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0a_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, PC, #nn */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
- INT32 offs = (UINT8)(op & THUMB_INSN_IMM) << 2;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
+ int32_t offs = (uint8_t)(op & THUMB_INSN_IMM) << 2;
UML_ADD(block, uml::I0, DRC_PC, 4);
UML_AND(block, uml::I0, uml::I0, ~2);
UML_ADD(block, DRC_REG(rd), uml::I0, offs);
@@ -1094,9 +1094,9 @@ void arm7_cpu_device::drctg0a_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0a_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD Rd, SP, #nn */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
- INT32 offs = (UINT8)(op & THUMB_INSN_IMM) << 2;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
+ int32_t offs = (uint8_t)(op & THUMB_INSN_IMM) << 2;
UML_ADD(block, DRC_REG(rd), DRC_REG(13), offs);
UML_ADD(block, DRC_PC, DRC_PC, 2);
}
@@ -1105,8 +1105,8 @@ void arm7_cpu_device::drctg0a_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0b_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* ADD SP, #imm */
{
- UINT32 op = desc->opptr.l[0];
- INT32 addr = (op & THUMB_INSN_IMM);
+ uint32_t op = desc->opptr.l[0];
+ int32_t addr = (op & THUMB_INSN_IMM);
addr &= ~THUMB_INSN_IMM_S;
addr = ((op & THUMB_INSN_IMM_S) ? -(addr << 2) : (addr << 2));
UML_ADD(block, DRC_REG(13), DRC_REG(13), addr);
@@ -1115,29 +1115,29 @@ void arm7_cpu_device::drctg0b_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0b_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* PUSH {Rlist} */
{
- UINT32 op = desc->opptr.l[0];
- for (INT32 offs = 7; offs >= 0; offs--)
+ uint32_t op = desc->opptr.l[0];
+ for (int32_t offs = 7; offs >= 0; offs--)
{
if (op & (1 << offs))
{
@@ -1152,12 +1152,12 @@ void arm7_cpu_device::drctg0b_4(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0b_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* PUSH {Rlist}{LR} */
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
UML_SUB(block, DRC_REG(13), DRC_REG(13), 4);
UML_MOV(block, uml::I0, DRC_REG(13));
UML_MOV(block, uml::I1, DRC_REG(14));
UML_CALLH(block, *m_impstate.write32);
- for (INT32 offs = 7; offs >= 0; offs--)
+ for (int32_t offs = 7; offs >= 0; offs--)
{
if (op & (1 << offs))
{
@@ -1172,50 +1172,50 @@ void arm7_cpu_device::drctg0b_5(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0b_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* POP {Rlist} */
{
- UINT32 op = desc->opptr.l[0];
- for (INT32 offs = 0; offs < 8; offs++)
+ uint32_t op = desc->opptr.l[0];
+ for (int32_t offs = 0; offs < 8; offs++)
{
if (op & (1 << offs))
{
@@ -1230,11 +1230,11 @@ void arm7_cpu_device::drctg0b_c(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0b_d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* POP {Rlist}{PC} */
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
uml::code_label arch5up;
uml::code_label done;
uml::code_label switch_mode;
- for (INT32 offs = 0; offs < 8; offs++)
+ for (int32_t offs = 0; offs < 8; offs++)
{
if (op & (1 << offs))
{
@@ -1273,15 +1273,15 @@ void arm7_cpu_device::drctg0b_d(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0b_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
void arm7_cpu_device::drctg0b_f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
@@ -1295,10 +1295,10 @@ void arm7_cpu_device::drctg0b_f(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0c_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Store */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
UML_MOV(block, uml::I2, DRC_REG(rd));
- for (INT32 offs = 0; offs < 8; offs++)
+ for (int32_t offs = 0; offs < 8; offs++)
{
if (op & (1 << offs))
{
@@ -1314,11 +1314,11 @@ void arm7_cpu_device::drctg0c_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0c_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* Load */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
int rd_in_list = op & (1 << rd);
UML_MOV(block, uml::I2, DRC_REG(rd));
- for (INT32 offs = 0; offs < 8; offs++)
+ for (int32_t offs = 0; offs < 8; offs++)
{
if (op & (1 << offs))
{
@@ -1338,8 +1338,8 @@ void arm7_cpu_device::drctg0c_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_EQ:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, Z_MASK);
UML_MOVc(block, uml::COND_NZ, uml::I0, offs);
UML_MOVc(block, uml::COND_Z, uml::I0, 2);
@@ -1348,8 +1348,8 @@ void arm7_cpu_device::drctg0d_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_NE:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, Z_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, offs);
UML_MOVc(block, uml::COND_NZ, uml::I0, 2);
@@ -1358,8 +1358,8 @@ void arm7_cpu_device::drctg0d_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_CS:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, C_MASK);
UML_MOVc(block, uml::COND_NZ, uml::I0, offs);
UML_MOVc(block, uml::COND_Z, uml::I0, 2);
@@ -1368,8 +1368,8 @@ void arm7_cpu_device::drctg0d_2(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_CC:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, C_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, offs);
UML_MOVc(block, uml::COND_NZ, uml::I0, 2);
@@ -1378,8 +1378,8 @@ void arm7_cpu_device::drctg0d_3(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_MI:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, N_MASK);
UML_MOVc(block, uml::COND_NZ, uml::I0, offs);
UML_MOVc(block, uml::COND_Z, uml::I0, 2);
@@ -1388,8 +1388,8 @@ void arm7_cpu_device::drctg0d_4(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_5(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_PL:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, N_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, offs);
UML_MOVc(block, uml::COND_NZ, uml::I0, 2);
@@ -1398,8 +1398,8 @@ void arm7_cpu_device::drctg0d_5(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_VS:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, V_MASK);
UML_MOVc(block, uml::COND_NZ, uml::I0, offs);
UML_MOVc(block, uml::COND_Z, uml::I0, 2);
@@ -1408,8 +1408,8 @@ void arm7_cpu_device::drctg0d_6(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_7(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_VC:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, V_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, offs);
UML_MOVc(block, uml::COND_NZ, uml::I0, 2);
@@ -1418,8 +1418,8 @@ void arm7_cpu_device::drctg0d_7(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_HI:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, C_MASK);
UML_MOVc(block, uml::COND_NZ, uml::I0, 1);
UML_MOVc(block, uml::COND_Z, uml::I0, 0);
@@ -1435,8 +1435,8 @@ void arm7_cpu_device::drctg0d_8(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_9(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_LS:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, C_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, 1);
UML_MOVc(block, uml::COND_NZ, uml::I0, 0);
@@ -1452,8 +1452,8 @@ void arm7_cpu_device::drctg0d_9(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_a(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_GE:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, N_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, 1);
UML_MOVc(block, uml::COND_NZ, uml::I0, 0);
@@ -1468,8 +1468,8 @@ void arm7_cpu_device::drctg0d_a(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_LT:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, N_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, 1);
UML_MOVc(block, uml::COND_NZ, uml::I0, 0);
@@ -1484,8 +1484,8 @@ void arm7_cpu_device::drctg0d_b(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_c(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_GT:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, N_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, 1);
UML_MOVc(block, uml::COND_NZ, uml::I0, 0);
@@ -1507,8 +1507,8 @@ void arm7_cpu_device::drctg0d_c(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_LE:
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = ((INT8)(op & THUMB_INSN_IMM) << 1) + 4;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = ((int8_t)(op & THUMB_INSN_IMM) << 1) + 4;
UML_TEST(block, DRC_CPSR, N_MASK);
UML_MOVc(block, uml::COND_Z, uml::I0, 1);
UML_MOVc(block, uml::COND_NZ, uml::I0, 0);
@@ -1530,8 +1530,8 @@ void arm7_cpu_device::drctg0d_d(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0d_e(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) // COND_AL:
{
- UINT32 op = desc->opptr.l[0];
- UINT32 pc = desc->pc;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t pc = desc->pc;
fatalerror("%08x: Undefined Thumb instruction: %04x (ARM9 reserved)\n", pc, op);
}
@@ -1545,8 +1545,8 @@ void arm7_cpu_device::drctg0d_f(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0e_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- INT32 offs = (op & THUMB_BRANCH_OFFS) << 1;
+ uint32_t op = desc->opptr.l[0];
+ int32_t offs = (op & THUMB_BRANCH_OFFS) << 1;
if (offs & 0x00000800)
{
offs |= 0xfffff800;
@@ -1556,8 +1556,8 @@ void arm7_cpu_device::drctg0e_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0e_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 offs = (op & THUMB_BLOP_OFFS) << 1;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t offs = (op & THUMB_BLOP_OFFS) << 1;
UML_MOV(block, uml::I0, DRC_REG(14));
UML_ADD(block, uml::I0, uml::I0, offs);
UML_AND(block, uml::I0, uml::I0, ~3);
@@ -1570,8 +1570,8 @@ void arm7_cpu_device::drctg0e_1(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0f_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 addr = (op & THUMB_BLOP_OFFS) << 12;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t addr = (op & THUMB_BLOP_OFFS) << 12;
if (addr & (1 << 22))
{
addr |= 0xff800000;
@@ -1583,8 +1583,8 @@ void arm7_cpu_device::drctg0f_0(drcuml_block *block, compiler_state *compiler, c
void arm7_cpu_device::drctg0f_1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc) /* BL */
{
- UINT32 op = desc->opptr.l[0];
- UINT32 addr = (op & THUMB_BLOP_OFFS) << 1;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t addr = (op & THUMB_BLOP_OFFS) << 1;
UML_AND(block, uml::I0, DRC_REG(14), ~1);
UML_ADD(block, uml::I0, uml::I0, addr);
UML_ADD(block, DRC_REG(14), DRC_PC, 2);
diff --git a/src/devices/cpu/arm7/arm7thmb.cpp b/src/devices/cpu/arm7/arm7thmb.cpp
index fd26210d7bc..4c5fd62a1ae 100644
--- a/src/devices/cpu/arm7/arm7thmb.cpp
+++ b/src/devices/cpu/arm7/arm7thmb.cpp
@@ -8,7 +8,7 @@
// this is our master dispatch jump table for THUMB mode, representing [(INSN & 0xffc0) >> 6] bits of the 16-bit decoded instruction
const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0x10] =
{
-// #define THUMB_SHIFT_R ((UINT16)0x0800)
+// #define THUMB_SHIFT_R ((uint16_t)0x0800)
&arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0,
&arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0,
&arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0, &arm7_cpu_device::tg00_0,
@@ -25,7 +25,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1,
&arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1,
&arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1, &arm7_cpu_device::tg00_1,
-// #define THUMB_INSN_ADDSUB ((UINT16)0x0800) // #define THUMB_ADDSUB_TYPE ((UINT16)0x0600)
+// #define THUMB_INSN_ADDSUB ((uint16_t)0x0800) // #define THUMB_ADDSUB_TYPE ((uint16_t)0x0600)
&arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0,
&arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0,
&arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0, &arm7_cpu_device::tg01_0,
@@ -42,7 +42,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg01_12, &arm7_cpu_device::tg01_12, &arm7_cpu_device::tg01_12, &arm7_cpu_device::tg01_12,
&arm7_cpu_device::tg01_13, &arm7_cpu_device::tg01_13, &arm7_cpu_device::tg01_13, &arm7_cpu_device::tg01_13,
&arm7_cpu_device::tg01_13, &arm7_cpu_device::tg01_13, &arm7_cpu_device::tg01_13, &arm7_cpu_device::tg01_13,
-// #define THUMB_INSN_CMP ((UINT16)0x0800)
+// #define THUMB_INSN_CMP ((uint16_t)0x0800)
&arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0,
&arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0,
&arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0, &arm7_cpu_device::tg02_0,
@@ -59,7 +59,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1,
&arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1,
&arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1, &arm7_cpu_device::tg02_1,
-// #define THUMB_INSN_SUB ((UINT16)0x0800)
+// #define THUMB_INSN_SUB ((uint16_t)0x0800)
&arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0,
&arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0,
&arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0, &arm7_cpu_device::tg03_0,
@@ -76,7 +76,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1,
&arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1,
&arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1, &arm7_cpu_device::tg03_1,
-//#define THUMB_GROUP4_TYPE ((UINT16)0x0c00) //#define THUMB_ALUOP_TYPE ((UINT16)0x03c0) // #define THUMB_HIREG_OP ((UINT16)0x0300) // #define THUMB_HIREG_H ((UINT16)0x00c0)
+//#define THUMB_GROUP4_TYPE ((uint16_t)0x0c00) //#define THUMB_ALUOP_TYPE ((uint16_t)0x03c0) // #define THUMB_HIREG_OP ((uint16_t)0x0300) // #define THUMB_HIREG_H ((uint16_t)0x00c0)
&arm7_cpu_device::tg04_00_00, &arm7_cpu_device::tg04_00_01, &arm7_cpu_device::tg04_00_02, &arm7_cpu_device::tg04_00_03,
&arm7_cpu_device::tg04_00_04, &arm7_cpu_device::tg04_00_05, &arm7_cpu_device::tg04_00_06, &arm7_cpu_device::tg04_00_07,
&arm7_cpu_device::tg04_00_08, &arm7_cpu_device::tg04_00_09, &arm7_cpu_device::tg04_00_0a, &arm7_cpu_device::tg04_00_0b,
@@ -93,7 +93,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203,
&arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203,
&arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203, &arm7_cpu_device::tg04_0203,
-//#define THUMB_GROUP5_TYPE ((UINT16)0x0e00)
+//#define THUMB_GROUP5_TYPE ((uint16_t)0x0e00)
&arm7_cpu_device::tg05_0, &arm7_cpu_device::tg05_0, &arm7_cpu_device::tg05_0, &arm7_cpu_device::tg05_0,
&arm7_cpu_device::tg05_0, &arm7_cpu_device::tg05_0, &arm7_cpu_device::tg05_0, &arm7_cpu_device::tg05_0,
&arm7_cpu_device::tg05_1, &arm7_cpu_device::tg05_1, &arm7_cpu_device::tg05_1, &arm7_cpu_device::tg05_1,
@@ -110,7 +110,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg05_6, &arm7_cpu_device::tg05_6, &arm7_cpu_device::tg05_6, &arm7_cpu_device::tg05_6,
&arm7_cpu_device::tg05_7, &arm7_cpu_device::tg05_7, &arm7_cpu_device::tg05_7, &arm7_cpu_device::tg05_7,
&arm7_cpu_device::tg05_7, &arm7_cpu_device::tg05_7, &arm7_cpu_device::tg05_7, &arm7_cpu_device::tg05_7,
-//#define THUMB_LSOP_L ((UINT16)0x0800)
+//#define THUMB_LSOP_L ((uint16_t)0x0800)
&arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0,
&arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0,
&arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0, &arm7_cpu_device::tg06_0,
@@ -127,7 +127,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1,
&arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1,
&arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1, &arm7_cpu_device::tg06_1,
-//#define THUMB_LSOP_L ((UINT16)0x0800)
+//#define THUMB_LSOP_L ((uint16_t)0x0800)
&arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0,
&arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0,
&arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0, &arm7_cpu_device::tg07_0,
@@ -144,7 +144,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1,
&arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1,
&arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1, &arm7_cpu_device::tg07_1,
-// #define THUMB_HALFOP_L ((UINT16)0x0800)
+// #define THUMB_HALFOP_L ((uint16_t)0x0800)
&arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0,
&arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0,
&arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0, &arm7_cpu_device::tg08_0,
@@ -161,7 +161,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1,
&arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1,
&arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1, &arm7_cpu_device::tg08_1,
-// #define THUMB_STACKOP_L ((UINT16)0x0800)
+// #define THUMB_STACKOP_L ((uint16_t)0x0800)
&arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0,
&arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0,
&arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0, &arm7_cpu_device::tg09_0,
@@ -178,7 +178,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1,
&arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1,
&arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1, &arm7_cpu_device::tg09_1,
-// #define THUMB_RELADDR_SP ((UINT16)0x0800)
+// #define THUMB_RELADDR_SP ((uint16_t)0x0800)
&arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0,
&arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0,
&arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0, &arm7_cpu_device::tg0a_0,
@@ -195,7 +195,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1,
&arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1,
&arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1, &arm7_cpu_device::tg0a_1,
-// #define THUMB_STACKOP_TYPE ((UINT16)0x0f00)
+// #define THUMB_STACKOP_TYPE ((uint16_t)0x0f00)
&arm7_cpu_device::tg0b_0, &arm7_cpu_device::tg0b_0, &arm7_cpu_device::tg0b_0, &arm7_cpu_device::tg0b_0,
&arm7_cpu_device::tg0b_1, &arm7_cpu_device::tg0b_1, &arm7_cpu_device::tg0b_1, &arm7_cpu_device::tg0b_1,
&arm7_cpu_device::tg0b_2, &arm7_cpu_device::tg0b_2, &arm7_cpu_device::tg0b_2, &arm7_cpu_device::tg0b_2,
@@ -212,7 +212,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg0b_d, &arm7_cpu_device::tg0b_d, &arm7_cpu_device::tg0b_d, &arm7_cpu_device::tg0b_d,
&arm7_cpu_device::tg0b_e, &arm7_cpu_device::tg0b_e, &arm7_cpu_device::tg0b_e, &arm7_cpu_device::tg0b_e,
&arm7_cpu_device::tg0b_f, &arm7_cpu_device::tg0b_f, &arm7_cpu_device::tg0b_f, &arm7_cpu_device::tg0b_f,
-// #define THUMB_MULTLS ((UINT16)0x0800)
+// #define THUMB_MULTLS ((uint16_t)0x0800)
&arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0,
&arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0,
&arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0, &arm7_cpu_device::tg0c_0,
@@ -229,7 +229,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1,
&arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1,
&arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1, &arm7_cpu_device::tg0c_1,
-// #define THUMB_COND_TYPE ((UINT16)0x0f00)
+// #define THUMB_COND_TYPE ((uint16_t)0x0f00)
&arm7_cpu_device::tg0d_0, &arm7_cpu_device::tg0d_0, &arm7_cpu_device::tg0d_0, &arm7_cpu_device::tg0d_0,
&arm7_cpu_device::tg0d_1, &arm7_cpu_device::tg0d_1, &arm7_cpu_device::tg0d_1, &arm7_cpu_device::tg0d_1,
&arm7_cpu_device::tg0d_2, &arm7_cpu_device::tg0d_2, &arm7_cpu_device::tg0d_2, &arm7_cpu_device::tg0d_2,
@@ -246,7 +246,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg0d_d, &arm7_cpu_device::tg0d_d, &arm7_cpu_device::tg0d_d, &arm7_cpu_device::tg0d_d,
&arm7_cpu_device::tg0d_e, &arm7_cpu_device::tg0d_e, &arm7_cpu_device::tg0d_e, &arm7_cpu_device::tg0d_e,
&arm7_cpu_device::tg0d_f, &arm7_cpu_device::tg0d_f, &arm7_cpu_device::tg0d_f, &arm7_cpu_device::tg0d_f,
-// #define THUMB_BLOP_LO ((UINT16)0x0800)
+// #define THUMB_BLOP_LO ((uint16_t)0x0800)
&arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0,
&arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0,
&arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0, &arm7_cpu_device::tg0e_0,
@@ -263,7 +263,7 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
&arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1,
&arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1,
&arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1, &arm7_cpu_device::tg0e_1,
-// #define THUMB_BLOP_LO ((UINT16)0x0800)
+// #define THUMB_BLOP_LO ((uint16_t)0x0800)
&arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0,
&arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0,
&arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0, &arm7_cpu_device::tg0f_0,
@@ -284,10 +284,10 @@ const arm7_cpu_device::arm7thumb_ophandler arm7_cpu_device::thumb_handler[0x40*0
/* Shift operations */
-void arm7_cpu_device::tg00_0(UINT32 pc, UINT32 op) /* Shift left */
+void arm7_cpu_device::tg00_0(uint32_t pc, uint32_t op) /* Shift left */
{
- UINT32 rs, rd, rrs;
- INT32 offs;
+ uint32_t rs, rd, rrs;
+ int32_t offs;
set_cpsr(GET_CPSR & ~(N_MASK | Z_MASK));
@@ -316,10 +316,10 @@ void arm7_cpu_device::tg00_0(UINT32 pc, UINT32 op) /* Shift left */
R15 += 2;
}
-void arm7_cpu_device::tg00_1(UINT32 pc, UINT32 op) /* Shift right */
+void arm7_cpu_device::tg00_1(uint32_t pc, uint32_t op) /* Shift right */
{
- UINT32 rs, rd, rrs;
- INT32 offs;
+ uint32_t rs, rd, rrs;
+ int32_t offs;
rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
@@ -356,10 +356,10 @@ void arm7_cpu_device::tg00_1(UINT32 pc, UINT32 op) /* Shift right */
/* Arithmetic */
-void arm7_cpu_device::tg01_0(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg01_0(uint32_t pc, uint32_t op)
{
- UINT32 rs, rd, rrs;
- INT32 offs;
+ uint32_t rs, rd, rrs;
+ int32_t offs;
/* ASR.. */
//if (op & THUMB_SHIFT_R) /* Shift right */
{
@@ -404,41 +404,41 @@ void arm7_cpu_device::tg01_0(UINT32 pc, UINT32 op)
}
}
-void arm7_cpu_device::tg01_10(UINT32 pc, UINT32 op) /* ADD Rd, Rs, Rn */
+void arm7_cpu_device::tg01_10(uint32_t pc, uint32_t op) /* ADD Rd, Rs, Rn */
{
- UINT32 rn = GetRegister((op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
- UINT32 rs = GetRegister((op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rn = GetRegister((op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
+ uint32_t rs = GetRegister((op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, rs + rn);
HandleThumbALUAddFlags(GetRegister(rd), rs, rn);
}
-void arm7_cpu_device::tg01_11(UINT32 pc, UINT32 op) /* SUB Rd, Rs, Rn */
+void arm7_cpu_device::tg01_11(uint32_t pc, uint32_t op) /* SUB Rd, Rs, Rn */
{
- UINT32 rn = GetRegister((op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
- UINT32 rs = GetRegister((op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rn = GetRegister((op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
+ uint32_t rs = GetRegister((op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, rs - rn);
HandleThumbALUSubFlags(GetRegister(rd), rs, rn);
}
-void arm7_cpu_device::tg01_12(UINT32 pc, UINT32 op) /* ADD Rd, Rs, #imm */
+void arm7_cpu_device::tg01_12(uint32_t pc, uint32_t op) /* ADD Rd, Rs, #imm */
{
- UINT32 imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
- UINT32 rs = GetRegister((op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
+ uint32_t rs = GetRegister((op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, rs + imm);
HandleThumbALUAddFlags(GetRegister(rd), rs, imm);
}
-void arm7_cpu_device::tg01_13(UINT32 pc, UINT32 op) /* SUB Rd, Rs, #imm */
+void arm7_cpu_device::tg01_13(uint32_t pc, uint32_t op) /* SUB Rd, Rs, #imm */
{
- UINT32 imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
- UINT32 rs = GetRegister((op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t imm = (op & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
+ uint32_t rs = GetRegister((op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, rs - imm);
HandleThumbALUSubFlags(GetRegister(rd), rs,imm);
@@ -446,72 +446,72 @@ void arm7_cpu_device::tg01_13(UINT32 pc, UINT32 op) /* SUB Rd, Rs, #imm */
/* CMP / MOV */
-void arm7_cpu_device::tg02_0(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg02_0(uint32_t pc, uint32_t op)
{
- UINT32 rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
- UINT32 op2 = (op & THUMB_INSN_IMM);
+ uint32_t rd = (op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT;
+ uint32_t op2 = (op & THUMB_INSN_IMM);
SetRegister(rd, op2);
set_cpsr(GET_CPSR & ~(Z_MASK | N_MASK));
set_cpsr(GET_CPSR | HandleALUNZFlags(GetRegister(rd)));
R15 += 2;
}
-void arm7_cpu_device::tg02_1(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg02_1(uint32_t pc, uint32_t op)
{
- UINT32 rn = GetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT);
- UINT32 op2 = op & THUMB_INSN_IMM;
- UINT32 rd = rn - op2;
+ uint32_t rn = GetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT);
+ uint32_t op2 = op & THUMB_INSN_IMM;
+ uint32_t rd = rn - op2;
HandleThumbALUSubFlags(rd, rn, op2);
}
/* ADD/SUB immediate */
-void arm7_cpu_device::tg03_0(UINT32 pc, UINT32 op) /* ADD Rd, #Offset8 */
+void arm7_cpu_device::tg03_0(uint32_t pc, uint32_t op) /* ADD Rd, #Offset8 */
{
- UINT32 rn = GetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT);
- UINT32 op2 = op & THUMB_INSN_IMM;
- UINT32 rd = rn + op2;
+ uint32_t rn = GetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT);
+ uint32_t op2 = op & THUMB_INSN_IMM;
+ uint32_t rd = rn + op2;
SetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT, rd);
HandleThumbALUAddFlags(rd, rn, op2);
}
-void arm7_cpu_device::tg03_1(UINT32 pc, UINT32 op) /* SUB Rd, #Offset8 */
+void arm7_cpu_device::tg03_1(uint32_t pc, uint32_t op) /* SUB Rd, #Offset8 */
{
- UINT32 rn = GetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT);
- UINT32 op2 = op & THUMB_INSN_IMM;
- UINT32 rd = rn - op2;
+ uint32_t rn = GetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT);
+ uint32_t op2 = op & THUMB_INSN_IMM;
+ uint32_t rd = rn - op2;
SetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT, rd);
HandleThumbALUSubFlags(rd, rn, op2);
}
/* Rd & Rm instructions */
-void arm7_cpu_device::tg04_00_00(UINT32 pc, UINT32 op) /* AND Rd, Rs */
+void arm7_cpu_device::tg04_00_00(uint32_t pc, uint32_t op) /* AND Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, GetRegister(rd) & GetRegister(rs));
set_cpsr(GET_CPSR & ~(Z_MASK | N_MASK));
set_cpsr(GET_CPSR | HandleALUNZFlags(GetRegister(rd)));
R15 += 2;
}
-void arm7_cpu_device::tg04_00_01(UINT32 pc, UINT32 op) /* EOR Rd, Rs */
+void arm7_cpu_device::tg04_00_01(uint32_t pc, uint32_t op) /* EOR Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, GetRegister(rd) ^ GetRegister(rs));
set_cpsr(GET_CPSR & ~(Z_MASK | N_MASK));
set_cpsr(GET_CPSR | HandleALUNZFlags(GetRegister(rd)));
R15 += 2;
}
-void arm7_cpu_device::tg04_00_02(UINT32 pc, UINT32 op) /* LSL Rd, Rs */
+void arm7_cpu_device::tg04_00_02(uint32_t pc, uint32_t op) /* LSL Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 rrd = GetRegister(rd);
- INT32 offs = GetRegister(rs) & 0x000000ff;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rrd = GetRegister(rd);
+ int32_t offs = GetRegister(rs) & 0x000000ff;
if (offs > 0)
{
if (offs < 32)
@@ -549,12 +549,12 @@ void arm7_cpu_device::tg04_00_02(UINT32 pc, UINT32 op) /* LSL Rd, Rs */
R15 += 2;
}
-void arm7_cpu_device::tg04_00_03(UINT32 pc, UINT32 op) /* LSR Rd, Rs */
+void arm7_cpu_device::tg04_00_03(uint32_t pc, uint32_t op) /* LSR Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 rrd = GetRegister(rd);
- INT32 offs = GetRegister(rs) & 0x000000ff;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rrd = GetRegister(rd);
+ int32_t offs = GetRegister(rs) & 0x000000ff;
if (offs > 0)
{
if (offs < 32)
@@ -592,12 +592,12 @@ void arm7_cpu_device::tg04_00_03(UINT32 pc, UINT32 op) /* LSR Rd, Rs */
R15 += 2;
}
-void arm7_cpu_device::tg04_00_04(UINT32 pc, UINT32 op) /* ASR Rd, Rs */
+void arm7_cpu_device::tg04_00_04(uint32_t pc, uint32_t op) /* ASR Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 rrs = GetRegister(rs)&0xff;
- UINT32 rrd = GetRegister(rd);
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rrs = GetRegister(rs)&0xff;
+ uint32_t rrd = GetRegister(rd);
if (rrs != 0)
{
if (rrs >= 32)
@@ -632,32 +632,32 @@ void arm7_cpu_device::tg04_00_04(UINT32 pc, UINT32 op) /* ASR Rd, Rs */
R15 += 2;
}
-void arm7_cpu_device::tg04_00_05(UINT32 pc, UINT32 op) /* ADC Rd, Rs */
+void arm7_cpu_device::tg04_00_05(uint32_t pc, uint32_t op) /* ADC Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 op2 = (GET_CPSR & C_MASK) ? 1 : 0;
- UINT32 rn = GetRegister(rd) + GetRegister(rs) + op2;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op2 = (GET_CPSR & C_MASK) ? 1 : 0;
+ uint32_t rn = GetRegister(rd) + GetRegister(rs) + op2;
HandleThumbALUAddFlags(rn, GetRegister(rd), (GetRegister(rs))); // ?
SetRegister(rd, rn);
}
-void arm7_cpu_device::tg04_00_06(UINT32 pc, UINT32 op) /* SBC Rd, Rs */
+void arm7_cpu_device::tg04_00_06(uint32_t pc, uint32_t op) /* SBC Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 op2 = (GET_CPSR & C_MASK) ? 0 : 1;
- UINT32 rn = GetRegister(rd) - GetRegister(rs) - op2;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op2 = (GET_CPSR & C_MASK) ? 0 : 1;
+ uint32_t rn = GetRegister(rd) - GetRegister(rs) - op2;
HandleThumbALUSubFlags(rn, GetRegister(rd), (GetRegister(rs))); //?
SetRegister(rd, rn);
}
-void arm7_cpu_device::tg04_00_07(UINT32 pc, UINT32 op) /* ROR Rd, Rs */
+void arm7_cpu_device::tg04_00_07(uint32_t pc, uint32_t op) /* ROR Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 rrd = GetRegister(rd);
- UINT32 imm = GetRegister(rs) & 0x0000001f;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rrd = GetRegister(rd);
+ uint32_t imm = GetRegister(rs) & 0x0000001f;
SetRegister(rd, (rrd >> imm) | (rrd << (32 - imm)));
if (rrd & (1 << (imm - 1)))
{
@@ -672,76 +672,76 @@ void arm7_cpu_device::tg04_00_07(UINT32 pc, UINT32 op) /* ROR Rd, Rs */
R15 += 2;
}
-void arm7_cpu_device::tg04_00_08(UINT32 pc, UINT32 op) /* TST Rd, Rs */
+void arm7_cpu_device::tg04_00_08(uint32_t pc, uint32_t op) /* TST Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
set_cpsr(GET_CPSR & ~(Z_MASK | N_MASK));
set_cpsr(GET_CPSR | HandleALUNZFlags(GetRegister(rd) & GetRegister(rs)));
R15 += 2;
}
-void arm7_cpu_device::tg04_00_09(UINT32 pc, UINT32 op) /* NEG Rd, Rs */
+void arm7_cpu_device::tg04_00_09(uint32_t pc, uint32_t op) /* NEG Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 rrs = GetRegister(rs);
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rrs = GetRegister(rs);
SetRegister(rd, 0 - rrs);
HandleThumbALUSubFlags(GetRegister(rd), 0, rrs);
}
-void arm7_cpu_device::tg04_00_0a(UINT32 pc, UINT32 op) /* CMP Rd, Rs */
+void arm7_cpu_device::tg04_00_0a(uint32_t pc, uint32_t op) /* CMP Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 rn = GetRegister(rd) - GetRegister(rs);
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rn = GetRegister(rd) - GetRegister(rs);
HandleThumbALUSubFlags(rn, GetRegister(rd), GetRegister(rs));
}
-void arm7_cpu_device::tg04_00_0b(UINT32 pc, UINT32 op) /* CMN Rd, Rs - check flags, add dasm */
+void arm7_cpu_device::tg04_00_0b(uint32_t pc, uint32_t op) /* CMN Rd, Rs - check flags, add dasm */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 rn = GetRegister(rd) + GetRegister(rs);
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rn = GetRegister(rd) + GetRegister(rs);
HandleThumbALUAddFlags(rn, GetRegister(rd), GetRegister(rs));
}
-void arm7_cpu_device::tg04_00_0c(UINT32 pc, UINT32 op) /* ORR Rd, Rs */
+void arm7_cpu_device::tg04_00_0c(uint32_t pc, uint32_t op) /* ORR Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, GetRegister(rd) | GetRegister(rs));
set_cpsr(GET_CPSR & ~(Z_MASK | N_MASK));
set_cpsr(GET_CPSR | HandleALUNZFlags(GetRegister(rd)));
R15 += 2;
}
-void arm7_cpu_device::tg04_00_0d(UINT32 pc, UINT32 op) /* MUL Rd, Rs */
+void arm7_cpu_device::tg04_00_0d(uint32_t pc, uint32_t op) /* MUL Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 rn = GetRegister(rd) * GetRegister(rs);
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rn = GetRegister(rd) * GetRegister(rs);
set_cpsr(GET_CPSR & ~(Z_MASK | N_MASK));
SetRegister(rd, rn);
set_cpsr(GET_CPSR | HandleALUNZFlags(rn));
R15 += 2;
}
-void arm7_cpu_device::tg04_00_0e(UINT32 pc, UINT32 op) /* BIC Rd, Rs */
+void arm7_cpu_device::tg04_00_0e(uint32_t pc, uint32_t op) /* BIC Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, GetRegister(rd) & (~GetRegister(rs)));
set_cpsr(GET_CPSR & ~(Z_MASK | N_MASK));
set_cpsr(GET_CPSR | HandleALUNZFlags(GetRegister(rd)));
R15 += 2;
}
-void arm7_cpu_device::tg04_00_0f(UINT32 pc, UINT32 op) /* MVN Rd, Rs */
+void arm7_cpu_device::tg04_00_0f(uint32_t pc, uint32_t op) /* MVN Rd, Rs */
{
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- UINT32 op2 = GetRegister(rs);
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t op2 = GetRegister(rs);
SetRegister(rd, ~op2);
set_cpsr(GET_CPSR & ~(Z_MASK | N_MASK));
set_cpsr(GET_CPSR | HandleALUNZFlags(GetRegister(rd)));
@@ -750,15 +750,15 @@ void arm7_cpu_device::tg04_00_0f(UINT32 pc, UINT32 op) /* MVN Rd, Rs */
/* ADD Rd, Rs group */
-void arm7_cpu_device::tg04_01_00(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg04_01_00(uint32_t pc, uint32_t op)
{
fatalerror("%08x: G4-1-0 Undefined Thumb instruction: %04x %x\n", pc, op, (op & THUMB_HIREG_H) >> THUMB_HIREG_H_SHIFT);
}
-void arm7_cpu_device::tg04_01_01(UINT32 pc, UINT32 op) /* ADD Rd, HRs */
+void arm7_cpu_device::tg04_01_01(uint32_t pc, uint32_t op) /* ADD Rd, HRs */
{
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
SetRegister(rd, GetRegister(rd) + GetRegister(rs+8));
// emulate the effects of pre-fetch
if (rs == 7)
@@ -769,10 +769,10 @@ void arm7_cpu_device::tg04_01_01(UINT32 pc, UINT32 op) /* ADD Rd, HRs */
R15 += 2;
}
-void arm7_cpu_device::tg04_01_02(UINT32 pc, UINT32 op) /* ADD HRd, Rs */
+void arm7_cpu_device::tg04_01_02(uint32_t pc, uint32_t op) /* ADD HRd, Rs */
{
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
SetRegister(rd+8, GetRegister(rd+8) + GetRegister(rs));
if (rd == 7)
{
@@ -782,10 +782,10 @@ void arm7_cpu_device::tg04_01_02(UINT32 pc, UINT32 op) /* ADD HRd, Rs */
R15 += 2;
}
-void arm7_cpu_device::tg04_01_03(UINT32 pc, UINT32 op) /* Add HRd, HRs */
+void arm7_cpu_device::tg04_01_03(uint32_t pc, uint32_t op) /* Add HRd, HRs */
{
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
SetRegister(rd+8, GetRegister(rd+8) + GetRegister(rs+8));
// emulate the effects of pre-fetch
if (rs == 7)
@@ -800,53 +800,53 @@ void arm7_cpu_device::tg04_01_03(UINT32 pc, UINT32 op) /* Add HRd, HRs */
R15 += 2;
}
-void arm7_cpu_device::tg04_01_10(UINT32 pc, UINT32 op) /* CMP Rd, Rs */
+void arm7_cpu_device::tg04_01_10(uint32_t pc, uint32_t op) /* CMP Rd, Rs */
{
- UINT32 rs = GetRegister(((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT));
- UINT32 rd = GetRegister(op & THUMB_HIREG_RD);
- UINT32 rn = rd - rs;
+ uint32_t rs = GetRegister(((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT));
+ uint32_t rd = GetRegister(op & THUMB_HIREG_RD);
+ uint32_t rn = rd - rs;
HandleThumbALUSubFlags(rn, rd, rs);
}
-void arm7_cpu_device::tg04_01_11(UINT32 pc, UINT32 op) /* CMP Rd, Hs */
+void arm7_cpu_device::tg04_01_11(uint32_t pc, uint32_t op) /* CMP Rd, Hs */
{
- UINT32 rs = GetRegister(((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT) + 8);
- UINT32 rd = GetRegister(op & THUMB_HIREG_RD);
- UINT32 rn = rd - rs;
+ uint32_t rs = GetRegister(((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT) + 8);
+ uint32_t rd = GetRegister(op & THUMB_HIREG_RD);
+ uint32_t rn = rd - rs;
HandleThumbALUSubFlags(rn, rd, rs);
}
-void arm7_cpu_device::tg04_01_12(UINT32 pc, UINT32 op) /* CMP Hd, Rs */
+void arm7_cpu_device::tg04_01_12(uint32_t pc, uint32_t op) /* CMP Hd, Rs */
{
- UINT32 rs = GetRegister(((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT));
- UINT32 rd = GetRegister((op & THUMB_HIREG_RD) + 8);
- UINT32 rn = rd - rs;
+ uint32_t rs = GetRegister(((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT));
+ uint32_t rd = GetRegister((op & THUMB_HIREG_RD) + 8);
+ uint32_t rn = rd - rs;
HandleThumbALUSubFlags(rn, rd, rs);
}
-void arm7_cpu_device::tg04_01_13(UINT32 pc, UINT32 op) /* CMP Hd, Hs */
+void arm7_cpu_device::tg04_01_13(uint32_t pc, uint32_t op) /* CMP Hd, Hs */
{
- UINT32 rs = GetRegister(((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT) + 8);
- UINT32 rd = GetRegister((op & THUMB_HIREG_RD) + 8);
- UINT32 rn = rd - rs;
+ uint32_t rs = GetRegister(((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT) + 8);
+ uint32_t rd = GetRegister((op & THUMB_HIREG_RD) + 8);
+ uint32_t rn = rd - rs;
HandleThumbALUSubFlags(rn, rd, rs);
}
/* MOV group */
// "The action of H1 = 0, H2 = 0 for Op = 00 (ADD), Op = 01 (CMP) and Op = 10 (MOV) is undefined, and should not be used."
-void arm7_cpu_device::tg04_01_20(UINT32 pc, UINT32 op) /* MOV Rd, Rs (undefined) */
+void arm7_cpu_device::tg04_01_20(uint32_t pc, uint32_t op) /* MOV Rd, Rs (undefined) */
{
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
SetRegister(rd, GetRegister(rs));
R15 += 2;
}
-void arm7_cpu_device::tg04_01_21(UINT32 pc, UINT32 op) /* MOV Rd, Hs */
+void arm7_cpu_device::tg04_01_21(uint32_t pc, uint32_t op) /* MOV Rd, Hs */
{
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
SetRegister(rd, GetRegister(rs + 8));
if (rs == 7)
{
@@ -855,10 +855,10 @@ void arm7_cpu_device::tg04_01_21(UINT32 pc, UINT32 op) /* MOV Rd, Hs */
R15 += 2;
}
-void arm7_cpu_device::tg04_01_22(UINT32 pc, UINT32 op) /* MOV Hd, Rs */
+void arm7_cpu_device::tg04_01_22(uint32_t pc, uint32_t op) /* MOV Hd, Rs */
{
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
SetRegister(rd + 8, GetRegister(rs));
if (rd != 7)
{
@@ -870,10 +870,10 @@ void arm7_cpu_device::tg04_01_22(UINT32 pc, UINT32 op) /* MOV Hd, Rs */
}
}
-void arm7_cpu_device::tg04_01_23(UINT32 pc, UINT32 op) /* MOV Hd, Hs */
+void arm7_cpu_device::tg04_01_23(uint32_t pc, uint32_t op) /* MOV Hd, Hs */
{
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 rd = op & THUMB_HIREG_RD;
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t rd = op & THUMB_HIREG_RD;
if (rs == 7)
{
SetRegister(rd + 8, GetRegister(rs+8)+4);
@@ -892,10 +892,10 @@ void arm7_cpu_device::tg04_01_23(UINT32 pc, UINT32 op) /* MOV Hd, Hs */
}
}
-void arm7_cpu_device::tg04_01_30(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg04_01_30(uint32_t pc, uint32_t op)
{
- UINT32 rd = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 addr = GetRegister(rd);
+ uint32_t rd = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t addr = GetRegister(rd);
if (addr & 1)
{
addr &= ~1;
@@ -911,10 +911,10 @@ void arm7_cpu_device::tg04_01_30(UINT32 pc, UINT32 op)
R15 = addr;
}
-void arm7_cpu_device::tg04_01_31(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg04_01_31(uint32_t pc, uint32_t op)
{
- UINT32 rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
- UINT32 addr = GetRegister(rs+8);
+ uint32_t rs = (op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
+ uint32_t addr = GetRegister(rs+8);
if (rs == 7)
{
addr += 2;
@@ -935,9 +935,9 @@ void arm7_cpu_device::tg04_01_31(UINT32 pc, UINT32 op)
}
/* BLX */
-void arm7_cpu_device::tg04_01_32(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg04_01_32(uint32_t pc, uint32_t op)
{
- UINT32 addr = GetRegister((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT);
+ uint32_t addr = GetRegister((op & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT);
SetRegister(14, (R15 + 2) | 1);
// are we also switching to ARM mode?
@@ -957,57 +957,57 @@ void arm7_cpu_device::tg04_01_32(UINT32 pc, UINT32 op)
R15 = addr;
}
-void arm7_cpu_device::tg04_01_33(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg04_01_33(uint32_t pc, uint32_t op)
{
fatalerror("%08x: G4-3 Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg04_0203(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg04_0203(uint32_t pc, uint32_t op)
{
- UINT32 readword = READ32((R15 & ~2) + 4 + ((op & THUMB_INSN_IMM) << 2));
+ uint32_t readword = READ32((R15 & ~2) + 4 + ((op & THUMB_INSN_IMM) << 2));
SetRegister((op & THUMB_INSN_IMM_RD) >> THUMB_INSN_IMM_RD_SHIFT, readword);
R15 += 2;
}
/* LDR* STR* group */
-void arm7_cpu_device::tg05_0(UINT32 pc, UINT32 op) /* STR Rd, [Rn, Rm] */
+void arm7_cpu_device::tg05_0(uint32_t pc, uint32_t op) /* STR Rd, [Rn, Rm] */
{
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- UINT32 addr = GetRegister(rn) + GetRegister(rm);
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t addr = GetRegister(rn) + GetRegister(rm);
WRITE32(addr, GetRegister(rd));
R15 += 2;
}
-void arm7_cpu_device::tg05_1(UINT32 pc, UINT32 op) /* STRH Rd, [Rn, Rm] */
+void arm7_cpu_device::tg05_1(uint32_t pc, uint32_t op) /* STRH Rd, [Rn, Rm] */
{
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- UINT32 addr = GetRegister(rn) + GetRegister(rm);
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t addr = GetRegister(rn) + GetRegister(rm);
WRITE16(addr, GetRegister(rd));
R15 += 2;
}
-void arm7_cpu_device::tg05_2(UINT32 pc, UINT32 op) /* STRB Rd, [Rn, Rm] */
+void arm7_cpu_device::tg05_2(uint32_t pc, uint32_t op) /* STRB Rd, [Rn, Rm] */
{
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- UINT32 addr = GetRegister(rn) + GetRegister(rm);
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t addr = GetRegister(rn) + GetRegister(rm);
WRITE8(addr, GetRegister(rd));
R15 += 2;
}
-void arm7_cpu_device::tg05_3(UINT32 pc, UINT32 op) /* LDSB Rd, [Rn, Rm] todo, add dasm */
+void arm7_cpu_device::tg05_3(uint32_t pc, uint32_t op) /* LDSB Rd, [Rn, Rm] todo, add dasm */
{
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- UINT32 addr = GetRegister(rn) + GetRegister(rm);
- UINT32 op2 = READ8(addr);
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t addr = GetRegister(rn) + GetRegister(rm);
+ uint32_t op2 = READ8(addr);
if (op2 & 0x00000080)
{
op2 |= 0xffffff00;
@@ -1016,46 +1016,46 @@ void arm7_cpu_device::tg05_3(UINT32 pc, UINT32 op) /* LDSB Rd, [Rn, Rm] todo, a
R15 += 2;
}
-void arm7_cpu_device::tg05_4(UINT32 pc, UINT32 op) /* LDR Rd, [Rn, Rm] */
+void arm7_cpu_device::tg05_4(uint32_t pc, uint32_t op) /* LDR Rd, [Rn, Rm] */
{
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- UINT32 addr = GetRegister(rn) + GetRegister(rm);
- UINT32 op2 = READ32(addr);
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t addr = GetRegister(rn) + GetRegister(rm);
+ uint32_t op2 = READ32(addr);
SetRegister(rd, op2);
R15 += 2;
}
-void arm7_cpu_device::tg05_5(UINT32 pc, UINT32 op) /* LDRH Rd, [Rn, Rm] */
+void arm7_cpu_device::tg05_5(uint32_t pc, uint32_t op) /* LDRH Rd, [Rn, Rm] */
{
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- UINT32 addr = GetRegister(rn) + GetRegister(rm);
- UINT32 op2 = READ16(addr);
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t addr = GetRegister(rn) + GetRegister(rm);
+ uint32_t op2 = READ16(addr);
SetRegister(rd, op2);
R15 += 2;
}
-void arm7_cpu_device::tg05_6(UINT32 pc, UINT32 op) /* LDRB Rd, [Rn, Rm] */
+void arm7_cpu_device::tg05_6(uint32_t pc, uint32_t op) /* LDRB Rd, [Rn, Rm] */
{
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- UINT32 addr = GetRegister(rn) + GetRegister(rm);
- UINT32 op2 = READ8(addr);
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t addr = GetRegister(rn) + GetRegister(rm);
+ uint32_t op2 = READ8(addr);
SetRegister(rd, op2);
R15 += 2;
}
-void arm7_cpu_device::tg05_7(UINT32 pc, UINT32 op) /* LDSH Rd, [Rn, Rm] */
+void arm7_cpu_device::tg05_7(uint32_t pc, uint32_t op) /* LDSH Rd, [Rn, Rm] */
{
- UINT32 rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- UINT32 rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- UINT32 rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- UINT32 addr = GetRegister(rn) + GetRegister(rm);
- UINT32 op2 = READ16(addr);
+ uint32_t rm = (op & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ uint32_t addr = GetRegister(rn) + GetRegister(rm);
+ uint32_t op2 = READ16(addr);
if (op2 & 0x00008000)
{
op2 |= 0xffff0000;
@@ -1066,129 +1066,129 @@ void arm7_cpu_device::tg05_7(UINT32 pc, UINT32 op) /* LDSH Rd, [Rn, Rm] */
/* Word Store w/ Immediate Offset */
-void arm7_cpu_device::tg06_0(UINT32 pc, UINT32 op) /* Store */
+void arm7_cpu_device::tg06_0(uint32_t pc, uint32_t op) /* Store */
{
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = op & THUMB_ADDSUB_RD;
- INT32 offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2;
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = op & THUMB_ADDSUB_RD;
+ int32_t offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2;
WRITE32(GetRegister(rn) + offs, GetRegister(rd));
R15 += 2;
}
-void arm7_cpu_device::tg06_1(UINT32 pc, UINT32 op) /* Load */
+void arm7_cpu_device::tg06_1(uint32_t pc, uint32_t op) /* Load */
{
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = op & THUMB_ADDSUB_RD;
- INT32 offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2;
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = op & THUMB_ADDSUB_RD;
+ int32_t offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2;
SetRegister(rd, READ32(GetRegister(rn) + offs)); // fix
R15 += 2;
}
/* Byte Store w/ Immeidate Offset */
-void arm7_cpu_device::tg07_0(UINT32 pc, UINT32 op) /* Store */
+void arm7_cpu_device::tg07_0(uint32_t pc, uint32_t op) /* Store */
{
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = op & THUMB_ADDSUB_RD;
- INT32 offs = (op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT;
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = op & THUMB_ADDSUB_RD;
+ int32_t offs = (op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT;
WRITE8(GetRegister(rn) + offs, GetRegister(rd));
R15 += 2;
}
-void arm7_cpu_device::tg07_1(UINT32 pc, UINT32 op) /* Load */
+void arm7_cpu_device::tg07_1(uint32_t pc, uint32_t op) /* Load */
{
- UINT32 rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = op & THUMB_ADDSUB_RD;
- INT32 offs = (op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT;
+ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = op & THUMB_ADDSUB_RD;
+ int32_t offs = (op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT;
SetRegister(rd, READ8(GetRegister(rn) + offs));
R15 += 2;
}
/* Load/Store Halfword */
-void arm7_cpu_device::tg08_0(UINT32 pc, UINT32 op) /* Store */
+void arm7_cpu_device::tg08_0(uint32_t pc, uint32_t op) /* Store */
{
- UINT32 imm = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t imm = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
WRITE16(GetRegister(rs) + (imm << 1), GetRegister(rd));
R15 += 2;
}
-void arm7_cpu_device::tg08_1(UINT32 pc, UINT32 op) /* Load */
+void arm7_cpu_device::tg08_1(uint32_t pc, uint32_t op) /* Load */
{
- UINT32 imm = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
- UINT32 rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- UINT32 rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ uint32_t imm = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT;
+ uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
SetRegister(rd, READ16(GetRegister(rs) + (imm << 1)));
R15 += 2;
}
/* Stack-Relative Load/Store */
-void arm7_cpu_device::tg09_0(UINT32 pc, UINT32 op) /* Store */
+void arm7_cpu_device::tg09_0(uint32_t pc, uint32_t op) /* Store */
{
- UINT32 rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
- INT32 offs = (UINT8)(op & THUMB_INSN_IMM);
- WRITE32(GetRegister(13) + ((UINT32)offs << 2), GetRegister(rd));
+ uint32_t rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
+ int32_t offs = (uint8_t)(op & THUMB_INSN_IMM);
+ WRITE32(GetRegister(13) + ((uint32_t)offs << 2), GetRegister(rd));
R15 += 2;
}
-void arm7_cpu_device::tg09_1(UINT32 pc, UINT32 op) /* Load */
+void arm7_cpu_device::tg09_1(uint32_t pc, uint32_t op) /* Load */
{
- UINT32 rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
- INT32 offs = (UINT8)(op & THUMB_INSN_IMM);
- UINT32 readword = READ32(GetRegister(13) + ((UINT32)offs << 2));
+ uint32_t rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT;
+ int32_t offs = (uint8_t)(op & THUMB_INSN_IMM);
+ uint32_t readword = READ32(GetRegister(13) + ((uint32_t)offs << 2));
SetRegister(rd, readword);
R15 += 2;
}
/* Get relative address */
-void arm7_cpu_device::tg0a_0(UINT32 pc, UINT32 op) /* ADD Rd, PC, #nn */
+void arm7_cpu_device::tg0a_0(uint32_t pc, uint32_t op) /* ADD Rd, PC, #nn */
{
- UINT32 rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
- INT32 offs = (UINT8)(op & THUMB_INSN_IMM) << 2;
+ uint32_t rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
+ int32_t offs = (uint8_t)(op & THUMB_INSN_IMM) << 2;
SetRegister(rd, ((R15 + 4) & ~2) + offs);
R15 += 2;
}
-void arm7_cpu_device::tg0a_1(UINT32 pc, UINT32 op) /* ADD Rd, SP, #nn */
+void arm7_cpu_device::tg0a_1(uint32_t pc, uint32_t op) /* ADD Rd, SP, #nn */
{
- UINT32 rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
- INT32 offs = (UINT8)(op & THUMB_INSN_IMM) << 2;
+ uint32_t rd = (op & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
+ int32_t offs = (uint8_t)(op & THUMB_INSN_IMM) << 2;
SetRegister(rd, GetRegister(13) + offs);
R15 += 2;
}
/* Stack-Related Opcodes */
-void arm7_cpu_device::tg0b_0(UINT32 pc, UINT32 op) /* ADD SP, #imm */
+void arm7_cpu_device::tg0b_0(uint32_t pc, uint32_t op) /* ADD SP, #imm */
{
- UINT32 addr = (op & THUMB_INSN_IMM);
+ uint32_t addr = (op & THUMB_INSN_IMM);
addr &= ~THUMB_INSN_IMM_S;
SetRegister(13, GetRegister(13) + ((op & THUMB_INSN_IMM_S) ? -(addr << 2) : (addr << 2)));
R15 += 2;
}
-void arm7_cpu_device::tg0b_1(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_1(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_2(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_2(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_3(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_3(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_4(UINT32 pc, UINT32 op) /* PUSH {Rlist} */
+void arm7_cpu_device::tg0b_4(uint32_t pc, uint32_t op) /* PUSH {Rlist} */
{
- for (INT32 offs = 7; offs >= 0; offs--)
+ for (int32_t offs = 7; offs >= 0; offs--)
{
if (op & (1 << offs))
{
@@ -1199,11 +1199,11 @@ void arm7_cpu_device::tg0b_4(UINT32 pc, UINT32 op) /* PUSH {Rlist} */
R15 += 2;
}
-void arm7_cpu_device::tg0b_5(UINT32 pc, UINT32 op) /* PUSH {Rlist}{LR} */
+void arm7_cpu_device::tg0b_5(uint32_t pc, uint32_t op) /* PUSH {Rlist}{LR} */
{
SetRegister(13, GetRegister(13) - 4);
WRITE32(GetRegister(13), GetRegister(14));
- for (INT32 offs = 7; offs >= 0; offs--)
+ for (int32_t offs = 7; offs >= 0; offs--)
{
if (op & (1 << offs))
{
@@ -1214,39 +1214,39 @@ void arm7_cpu_device::tg0b_5(UINT32 pc, UINT32 op) /* PUSH {Rlist}{LR} */
R15 += 2;
}
-void arm7_cpu_device::tg0b_6(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_6(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_7(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_7(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_8(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_8(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_9(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_9(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_a(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_a(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_b(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_b(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_c(UINT32 pc, UINT32 op) /* POP {Rlist} */
+void arm7_cpu_device::tg0b_c(uint32_t pc, uint32_t op) /* POP {Rlist} */
{
- for (INT32 offs = 0; offs < 8; offs++)
+ for (int32_t offs = 0; offs < 8; offs++)
{
if (op & (1 << offs))
{
@@ -1257,9 +1257,9 @@ void arm7_cpu_device::tg0b_c(UINT32 pc, UINT32 op) /* POP {Rlist} */
R15 += 2;
}
-void arm7_cpu_device::tg0b_d(UINT32 pc, UINT32 op) /* POP {Rlist}{PC} */
+void arm7_cpu_device::tg0b_d(uint32_t pc, uint32_t op) /* POP {Rlist}{PC} */
{
- for (INT32 offs = 0; offs < 8; offs++)
+ for (int32_t offs = 0; offs < 8; offs++)
{
if (op & (1 << offs))
{
@@ -1267,7 +1267,7 @@ void arm7_cpu_device::tg0b_d(UINT32 pc, UINT32 op) /* POP {Rlist}{PC} */
SetRegister(13, GetRegister(13) + 4);
}
}
- UINT32 addr = READ32(GetRegister(13));
+ uint32_t addr = READ32(GetRegister(13));
if (m_archRev < 5)
{
R15 = addr & ~1;
@@ -1292,12 +1292,12 @@ void arm7_cpu_device::tg0b_d(UINT32 pc, UINT32 op) /* POP {Rlist}{PC} */
SetRegister(13, GetRegister(13) + 4);
}
-void arm7_cpu_device::tg0b_e(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_e(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
-void arm7_cpu_device::tg0b_f(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0b_f(uint32_t pc, uint32_t op)
{
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, op);
}
@@ -1310,11 +1310,11 @@ void arm7_cpu_device::tg0b_f(UINT32 pc, UINT32 op)
// GBA "BB Ball" performs an unaligned read with A[1:0] = 2 and expects A[1] not to be ignored [BP 800B90A,(R4&3)!=0]
// GBA "Gadget Racers" performs an unaligned read with A[1:0] = 1 and expects A[0] to be ignored [BP B72,(R0&3)!=0]
-void arm7_cpu_device::tg0c_0(UINT32 pc, UINT32 op) /* Store */
+void arm7_cpu_device::tg0c_0(uint32_t pc, uint32_t op) /* Store */
{
- UINT32 rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
- UINT32 ld_st_address = GetRegister(rd);
- for (INT32 offs = 0; offs < 8; offs++)
+ uint32_t rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
+ uint32_t ld_st_address = GetRegister(rd);
+ for (int32_t offs = 0; offs < 8; offs++)
{
if (op & (1 << offs))
{
@@ -1326,12 +1326,12 @@ void arm7_cpu_device::tg0c_0(UINT32 pc, UINT32 op) /* Store */
R15 += 2;
}
-void arm7_cpu_device::tg0c_1(UINT32 pc, UINT32 op) /* Load */
+void arm7_cpu_device::tg0c_1(uint32_t pc, uint32_t op) /* Load */
{
- UINT32 rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
+ uint32_t rd = (op & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
int rd_in_list = op & (1 << rd);
- UINT32 ld_st_address = GetRegister(rd);
- for (INT32 offs = 0; offs < 8; offs++)
+ uint32_t ld_st_address = GetRegister(rd);
+ for (int32_t offs = 0; offs < 8; offs++)
{
if (op & (1 << offs))
{
@@ -1348,9 +1348,9 @@ void arm7_cpu_device::tg0c_1(UINT32 pc, UINT32 op) /* Load */
/* Conditional Branch */
-void arm7_cpu_device::tg0d_0(UINT32 pc, UINT32 op) // COND_EQ:
+void arm7_cpu_device::tg0d_0(uint32_t pc, uint32_t op) // COND_EQ:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (Z_IS_SET(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1362,9 +1362,9 @@ void arm7_cpu_device::tg0d_0(UINT32 pc, UINT32 op) // COND_EQ:
}
-void arm7_cpu_device::tg0d_1(UINT32 pc, UINT32 op) // COND_NE:
+void arm7_cpu_device::tg0d_1(uint32_t pc, uint32_t op) // COND_NE:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (Z_IS_CLEAR(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1375,9 +1375,9 @@ void arm7_cpu_device::tg0d_1(UINT32 pc, UINT32 op) // COND_NE:
}
}
-void arm7_cpu_device::tg0d_2(UINT32 pc, UINT32 op) // COND_CS:
+void arm7_cpu_device::tg0d_2(uint32_t pc, uint32_t op) // COND_CS:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (C_IS_SET(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1388,9 +1388,9 @@ void arm7_cpu_device::tg0d_2(UINT32 pc, UINT32 op) // COND_CS:
}
}
-void arm7_cpu_device::tg0d_3(UINT32 pc, UINT32 op) // COND_CC:
+void arm7_cpu_device::tg0d_3(uint32_t pc, uint32_t op) // COND_CC:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (C_IS_CLEAR(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1401,9 +1401,9 @@ void arm7_cpu_device::tg0d_3(UINT32 pc, UINT32 op) // COND_CC:
}
}
-void arm7_cpu_device::tg0d_4(UINT32 pc, UINT32 op) // COND_MI:
+void arm7_cpu_device::tg0d_4(uint32_t pc, uint32_t op) // COND_MI:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (N_IS_SET(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1414,9 +1414,9 @@ void arm7_cpu_device::tg0d_4(UINT32 pc, UINT32 op) // COND_MI:
}
}
-void arm7_cpu_device::tg0d_5(UINT32 pc, UINT32 op) // COND_PL:
+void arm7_cpu_device::tg0d_5(uint32_t pc, uint32_t op) // COND_PL:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (N_IS_CLEAR(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1427,9 +1427,9 @@ void arm7_cpu_device::tg0d_5(UINT32 pc, UINT32 op) // COND_PL:
}
}
-void arm7_cpu_device::tg0d_6(UINT32 pc, UINT32 op) // COND_VS:
+void arm7_cpu_device::tg0d_6(uint32_t pc, uint32_t op) // COND_VS:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (V_IS_SET(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1440,9 +1440,9 @@ void arm7_cpu_device::tg0d_6(UINT32 pc, UINT32 op) // COND_VS:
}
}
-void arm7_cpu_device::tg0d_7(UINT32 pc, UINT32 op) // COND_VC:
+void arm7_cpu_device::tg0d_7(uint32_t pc, uint32_t op) // COND_VC:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (V_IS_CLEAR(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1453,9 +1453,9 @@ void arm7_cpu_device::tg0d_7(UINT32 pc, UINT32 op) // COND_VC:
}
}
-void arm7_cpu_device::tg0d_8(UINT32 pc, UINT32 op) // COND_HI:
+void arm7_cpu_device::tg0d_8(uint32_t pc, uint32_t op) // COND_HI:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (C_IS_SET(GET_CPSR) && Z_IS_CLEAR(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1466,9 +1466,9 @@ void arm7_cpu_device::tg0d_8(UINT32 pc, UINT32 op) // COND_HI:
}
}
-void arm7_cpu_device::tg0d_9(UINT32 pc, UINT32 op) // COND_LS:
+void arm7_cpu_device::tg0d_9(uint32_t pc, uint32_t op) // COND_LS:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (C_IS_CLEAR(GET_CPSR) || Z_IS_SET(GET_CPSR))
{
R15 += 4 + (offs << 1);
@@ -1479,9 +1479,9 @@ void arm7_cpu_device::tg0d_9(UINT32 pc, UINT32 op) // COND_LS:
}
}
-void arm7_cpu_device::tg0d_a(UINT32 pc, UINT32 op) // COND_GE:
+void arm7_cpu_device::tg0d_a(uint32_t pc, uint32_t op) // COND_GE:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (!(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK))
{
R15 += 4 + (offs << 1);
@@ -1492,9 +1492,9 @@ void arm7_cpu_device::tg0d_a(UINT32 pc, UINT32 op) // COND_GE:
}
}
-void arm7_cpu_device::tg0d_b(UINT32 pc, UINT32 op) // COND_LT:
+void arm7_cpu_device::tg0d_b(uint32_t pc, uint32_t op) // COND_LT:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (!(GET_CPSR & N_MASK) != !(GET_CPSR & V_MASK))
{
R15 += 4 + (offs << 1);
@@ -1505,9 +1505,9 @@ void arm7_cpu_device::tg0d_b(UINT32 pc, UINT32 op) // COND_LT:
}
}
-void arm7_cpu_device::tg0d_c(UINT32 pc, UINT32 op) // COND_GT:
+void arm7_cpu_device::tg0d_c(uint32_t pc, uint32_t op) // COND_GT:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (Z_IS_CLEAR(GET_CPSR) && !(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK))
{
R15 += 4 + (offs << 1);
@@ -1518,9 +1518,9 @@ void arm7_cpu_device::tg0d_c(UINT32 pc, UINT32 op) // COND_GT:
}
}
-void arm7_cpu_device::tg0d_d(UINT32 pc, UINT32 op) // COND_LE:
+void arm7_cpu_device::tg0d_d(uint32_t pc, uint32_t op) // COND_LE:
{
- INT32 offs = (INT8)(op & THUMB_INSN_IMM);
+ int32_t offs = (int8_t)(op & THUMB_INSN_IMM);
if (Z_IS_SET(GET_CPSR) || !(GET_CPSR & N_MASK) != !(GET_CPSR & V_MASK))
{
R15 += 4 + (offs << 1);
@@ -1531,12 +1531,12 @@ void arm7_cpu_device::tg0d_d(UINT32 pc, UINT32 op) // COND_LE:
}
}
-void arm7_cpu_device::tg0d_e(UINT32 pc, UINT32 op) // COND_AL:
+void arm7_cpu_device::tg0d_e(uint32_t pc, uint32_t op) // COND_AL:
{
fatalerror("%08x: Undefined Thumb instruction: %04x (ARM9 reserved)\n", pc, op);
}
-void arm7_cpu_device::tg0d_f(UINT32 pc, UINT32 op) // COND_NV: // SWI (this is sort of a "hole" in the opcode encoding)
+void arm7_cpu_device::tg0d_f(uint32_t pc, uint32_t op) // COND_NV: // SWI (this is sort of a "hole" in the opcode encoding)
{
m_pendingSwi = 1;
arm7_check_irq_state();
@@ -1544,9 +1544,9 @@ void arm7_cpu_device::tg0d_f(UINT32 pc, UINT32 op) // COND_NV: // SWI (this is
/* B #offs */
-void arm7_cpu_device::tg0e_0(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0e_0(uint32_t pc, uint32_t op)
{
- INT32 offs = (op & THUMB_BRANCH_OFFS) << 1;
+ int32_t offs = (op & THUMB_BRANCH_OFFS) << 1;
if (offs & 0x00000800)
{
offs |= 0xfffff800;
@@ -1554,9 +1554,9 @@ void arm7_cpu_device::tg0e_0(UINT32 pc, UINT32 op)
R15 += 4 + offs;
}
-void arm7_cpu_device::tg0e_1(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0e_1(uint32_t pc, uint32_t op)
{
- UINT32 addr = GetRegister(14);
+ uint32_t addr = GetRegister(14);
addr += (op & THUMB_BLOP_OFFS) << 1;
addr &= 0xfffffffc;
SetRegister(14, (R15 + 4) | 1);
@@ -1565,9 +1565,9 @@ void arm7_cpu_device::tg0e_1(UINT32 pc, UINT32 op)
/* BL */
-void arm7_cpu_device::tg0f_0(UINT32 pc, UINT32 op)
+void arm7_cpu_device::tg0f_0(uint32_t pc, uint32_t op)
{
- UINT32 addr = (op & THUMB_BLOP_OFFS) << 12;
+ uint32_t addr = (op & THUMB_BLOP_OFFS) << 12;
if (addr & (1 << 22))
{
addr |= 0xff800000;
@@ -1577,9 +1577,9 @@ void arm7_cpu_device::tg0f_0(UINT32 pc, UINT32 op)
R15 += 2;
}
-void arm7_cpu_device::tg0f_1(UINT32 pc, UINT32 op) /* BL */
+void arm7_cpu_device::tg0f_1(uint32_t pc, uint32_t op) /* BL */
{
- UINT32 addr = GetRegister(14) & ~1;
+ uint32_t addr = GetRegister(14) & ~1;
addr += (op & THUMB_BLOP_OFFS) << 1;
SetRegister(14, (R15 + 2) | 1);
R15 = addr;
diff --git a/src/devices/cpu/arm7/lpc210x.cpp b/src/devices/cpu/arm7/lpc210x.cpp
index 1d6acac4c79..28205774f30 100644
--- a/src/devices/cpu/arm7/lpc210x.cpp
+++ b/src/devices/cpu/arm7/lpc210x.cpp
@@ -39,7 +39,7 @@ static ADDRESS_MAP_START( lpc2103_map, AS_PROGRAM, 32, lpc210x_device )
ADDRESS_MAP_END
-lpc210x_device::lpc210x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+lpc210x_device::lpc210x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, LPC2103, "LPC2103", tag, owner, clock, "lpc2103", __FILE__, 4, eARM_ARCHFLAGS_T, ENDIANNESS_LITTLE),
m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0, ADDRESS_MAP_NAME(lpc2103_map))
{
@@ -52,7 +52,7 @@ READ32_MEMBER(lpc210x_device::arm_E01FC088_r)
READ32_MEMBER(lpc210x_device::flash_r)
{
- UINT32 ret = (m_flash[offset * 4 + 3] << 24) |
+ uint32_t ret = (m_flash[offset * 4 + 3] << 24) |
(m_flash[offset * 4 + 2] << 16) |
(m_flash[offset * 4 + 1] << 8) |
(m_flash[offset * 4 + 0] << 0);
@@ -245,7 +245,7 @@ WRITE32_MEMBER( lpc210x_device::pll_w )
/* Timers */
-UINT32 lpc210x_device::read_timer(address_space &space, int timer, int offset, UINT32 mem_mask)
+uint32_t lpc210x_device::read_timer(address_space &space, int timer, int offset, uint32_t mem_mask)
{
switch (offset*4)
{
@@ -260,7 +260,7 @@ UINT32 lpc210x_device::read_timer(address_space &space, int timer, int offset, U
}
-void lpc210x_device::write_timer(address_space &space, int timer, int offset, UINT32 data, UINT32 mem_mask)
+void lpc210x_device::write_timer(address_space &space, int timer, int offset, uint32_t data, uint32_t mem_mask)
{
switch (offset * 4)
{
diff --git a/src/devices/cpu/arm7/lpc210x.h b/src/devices/cpu/arm7/lpc210x.h
index 1d083f39dbc..53f4e28a798 100644
--- a/src/devices/cpu/arm7/lpc210x.h
+++ b/src/devices/cpu/arm7/lpc210x.h
@@ -22,12 +22,12 @@
class lpc210x_device : public arm7_cpu_device
{
public:
- lpc210x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
+ lpc210x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t);
// static configuration helpers
// todo, use an appropriate flash type instead
- UINT8 m_flash[0x8000];
+ uint8_t m_flash[0x8000];
DECLARE_READ32_MEMBER(arm_E01FC088_r);
@@ -41,10 +41,10 @@ public:
DECLARE_READ32_MEMBER(timer1_r) { return read_timer(space, 1, offset, mem_mask); }
DECLARE_WRITE32_MEMBER(timer1_w) { write_timer(space, 1, offset, data, mem_mask); }
- void write_timer(address_space &space, int timer, int offset, UINT32 data, UINT32 mem_mask);
- UINT32 read_timer(address_space &space, int timer, int offset, UINT32 mem_mask);
+ void write_timer(address_space &space, int timer, int offset, uint32_t data, uint32_t mem_mask);
+ uint32_t read_timer(address_space &space, int timer, int offset, uint32_t mem_mask);
- UINT32 m_TxPR[2];
+ uint32_t m_TxPR[2];
// VIC
DECLARE_READ32_MEMBER(vic_r);
diff --git a/src/devices/cpu/asap/asap.cpp b/src/devices/cpu/asap/asap.cpp
index bfad7b0a4cf..c5271ab128a 100644
--- a/src/devices/cpu/asap/asap.cpp
+++ b/src/devices/cpu/asap/asap.cpp
@@ -20,12 +20,12 @@
// CONSTANTS
//**************************************************************************
-const UINT32 PS_CFLAG = 0x00000001;
-const UINT32 PS_VFLAG = 0x00000002;
-const UINT32 PS_ZFLAG = 0x00000004;
-const UINT32 PS_NFLAG = 0x00000008;
-const UINT32 PS_IFLAG = 0x00000010;
-const UINT32 PS_PFLAG = 0x00000020;
+const uint32_t PS_CFLAG = 0x00000001;
+const uint32_t PS_VFLAG = 0x00000002;
+const uint32_t PS_ZFLAG = 0x00000004;
+const uint32_t PS_NFLAG = 0x00000008;
+const uint32_t PS_IFLAG = 0x00000010;
+const uint32_t PS_PFLAG = 0x00000020;
//const int EXCEPTION_RESET = 0;
const int EXCEPTION_TRAP0 = 1;
@@ -40,8 +40,8 @@ const int REGBASE = 0xffe0;
// MACROS
//**************************************************************************
-#define SET_C_ADD(a,b) (m_cflag = (UINT32)(b) > (UINT32)(~(a)))
-#define SET_C_SUB(a,b) (m_cflag = (UINT32)(b) <= (UINT32)(a))
+#define SET_C_ADD(a,b) (m_cflag = (uint32_t)(b) > (uint32_t)(~(a)))
+#define SET_C_SUB(a,b) (m_cflag = (uint32_t)(b) <= (uint32_t)(a))
#define SET_V_ADD(r,a,b) (m_vflag = ~((a) ^ (b)) & ((a) ^ (r)))
#define SET_V_SUB(r,a,b) (m_vflag = ((a) ^ (b)) & ((a) ^ (r)))
#define SET_ZN(r) (m_znflag = (r))
@@ -136,7 +136,7 @@ const device_type ASAP = &device_creator<asap_device>;
// asap_device - constructor
//-------------------------------------------------
-asap_device::asap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+asap_device::asap_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ASAP, "ASAP", tag, owner, clock, "asap", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 32, 32),
m_pc(0),
@@ -288,7 +288,7 @@ void asap_device::state_string_export(const device_state_entry &entry, std::stri
str = string_format("%c%c%c%c%c%c",
m_pflag ? 'P' : '.',
m_iflag ? 'I' : '.',
- ((INT32)m_znflag < 0) ? 'N' : '.',
+ ((int32_t)m_znflag < 0) ? 'N' : '.',
(m_znflag == 0) ? 'Z' : '.',
((m_vflag >> 30) & PS_VFLAG) ? 'V' : '.',
m_cflag ? 'C' : '.');
@@ -302,7 +302,7 @@ void asap_device::state_string_export(const device_state_entry &entry, std::stri
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 asap_device::disasm_min_opcode_bytes() const
+uint32_t asap_device::disasm_min_opcode_bytes() const
{
return 4;
}
@@ -313,7 +313,7 @@ UINT32 asap_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 asap_device::disasm_max_opcode_bytes() const
+uint32_t asap_device::disasm_max_opcode_bytes() const
{
return 12;
}
@@ -324,7 +324,7 @@ UINT32 asap_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t asap_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t asap_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( asap );
return CPU_DISASSEMBLE_NAME(asap)(this, buffer, pc, oprom, opram, options);
@@ -340,7 +340,7 @@ offs_t asap_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
// readop - read an opcode at the given address
//-------------------------------------------------
-inline UINT32 asap_device::readop(offs_t pc)
+inline uint32_t asap_device::readop(offs_t pc)
{
return m_direct->read_dword(pc);
}
@@ -350,7 +350,7 @@ inline UINT32 asap_device::readop(offs_t pc)
// readbyte - read a byte at the given address
//-------------------------------------------------
-inline UINT8 asap_device::readbyte(offs_t address)
+inline uint8_t asap_device::readbyte(offs_t address)
{
// no alignment issues with bytes
return m_program->read_byte(address);
@@ -361,7 +361,7 @@ inline UINT8 asap_device::readbyte(offs_t address)
// readword - read a word at the given address
//-------------------------------------------------
-inline UINT16 asap_device::readword(offs_t address)
+inline uint16_t asap_device::readword(offs_t address)
{
// aligned reads are easy
if (WORD_ALIGNED(address))
@@ -376,7 +376,7 @@ inline UINT16 asap_device::readword(offs_t address)
// readlong - read a long at the given address
//-------------------------------------------------
-inline UINT32 asap_device::readlong(offs_t address)
+inline uint32_t asap_device::readlong(offs_t address)
{
// aligned reads are easy
if (DWORD_ALIGNED(address))
@@ -391,7 +391,7 @@ inline UINT32 asap_device::readlong(offs_t address)
// writebyte - write a byte at the given address
//-------------------------------------------------
-inline void asap_device::writebyte(offs_t address, UINT8 data)
+inline void asap_device::writebyte(offs_t address, uint8_t data)
{
// no alignment issues with bytes
m_program->write_byte(address, data);
@@ -402,7 +402,7 @@ inline void asap_device::writebyte(offs_t address, UINT8 data)
// writeword - write a word at the given address
//-------------------------------------------------
-inline void asap_device::writeword(offs_t address, UINT16 data)
+inline void asap_device::writeword(offs_t address, uint16_t data)
{
// aligned writes are easy
if (WORD_ALIGNED(address))
@@ -426,7 +426,7 @@ inline void asap_device::writeword(offs_t address, UINT16 data)
// writelong - write a long at the given address
//-------------------------------------------------
-inline void asap_device::writelong(offs_t address, UINT32 data)
+inline void asap_device::writelong(offs_t address, uint32_t data)
{
// aligned writes are easy
if (DWORD_ALIGNED(address))
@@ -524,7 +524,7 @@ inline void asap_device::execute_instruction()
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 asap_device::execute_min_cycles() const
+uint32_t asap_device::execute_min_cycles() const
{
return 1;
}
@@ -535,7 +535,7 @@ UINT32 asap_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 asap_device::execute_max_cycles() const
+uint32_t asap_device::execute_max_cycles() const
{
return 2;
}
@@ -546,7 +546,7 @@ UINT32 asap_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 asap_device::execute_input_lines() const
+uint32_t asap_device::execute_input_lines() const
{
return 1;
}
@@ -635,9 +635,9 @@ void asap_device::trap0()
void asap_device::bsp()
{
- if ((INT32)m_znflag > 0)
+ if ((int32_t)m_znflag > 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -650,9 +650,9 @@ void asap_device::bsp()
void asap_device::bmz()
{
- if ((INT32)m_znflag <= 0)
+ if ((int32_t)m_znflag <= 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -665,9 +665,9 @@ void asap_device::bmz()
void asap_device::bgt()
{
- if (m_znflag != 0 && (INT32)(m_znflag ^ m_vflag) >= 0)
+ if (m_znflag != 0 && (int32_t)(m_znflag ^ m_vflag) >= 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -680,9 +680,9 @@ void asap_device::bgt()
void asap_device::ble()
{
- if (m_znflag == 0 || (INT32)(m_znflag ^ m_vflag) < 0)
+ if (m_znflag == 0 || (int32_t)(m_znflag ^ m_vflag) < 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -695,9 +695,9 @@ void asap_device::ble()
void asap_device::bge()
{
- if ((INT32)(m_znflag ^ m_vflag) >= 0)
+ if ((int32_t)(m_znflag ^ m_vflag) >= 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -710,9 +710,9 @@ void asap_device::bge()
void asap_device::blt()
{
- if ((INT32)(m_znflag ^ m_vflag) < 0)
+ if ((int32_t)(m_znflag ^ m_vflag) < 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -727,7 +727,7 @@ void asap_device::bhi()
{
if (m_znflag != 0 && m_cflag)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -742,7 +742,7 @@ void asap_device::bls()
{
if (m_znflag == 0 || !m_cflag)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -757,7 +757,7 @@ void asap_device::bcc()
{
if (!m_cflag)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -772,7 +772,7 @@ void asap_device::bcs()
{
if (m_cflag)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -785,9 +785,9 @@ void asap_device::bcs()
void asap_device::bpl()
{
- if ((INT32)m_znflag >= 0)
+ if ((int32_t)m_znflag >= 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -800,9 +800,9 @@ void asap_device::bpl()
void asap_device::bmi()
{
- if ((INT32)m_znflag < 0)
+ if ((int32_t)m_znflag < 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -817,7 +817,7 @@ void asap_device::bne()
{
if (m_znflag != 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -832,7 +832,7 @@ void asap_device::beq()
{
if (m_znflag == 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -845,9 +845,9 @@ void asap_device::beq()
void asap_device::bvc()
{
- if ((INT32)m_vflag >= 0)
+ if ((int32_t)m_vflag >= 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -860,9 +860,9 @@ void asap_device::bvc()
void asap_device::bvs()
{
- if ((INT32)m_vflag < 0)
+ if ((int32_t)m_vflag < 0)
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -878,7 +878,7 @@ void asap_device::bvs()
void asap_device::bsr()
{
DSTVAL = m_pc + 4;
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -890,7 +890,7 @@ void asap_device::bsr()
void asap_device::bsr_0()
{
- m_nextpc = m_ppc + ((INT32)(m_op << 10) >> 8);
+ m_nextpc = m_ppc + ((int32_t)(m_op << 10) >> 8);
fetch_instruction();
m_pc = m_nextpc;
@@ -909,9 +909,9 @@ void asap_device::lea()
void asap_device::lea_c()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 + (src2 << 2);
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 + (src2 << 2);
SET_ZNCV_ADD(dst, src1, src2);
if (src1 & 0xc0000000)
@@ -923,9 +923,9 @@ void asap_device::lea_c()
void asap_device::lea_c0()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 + (src2 << 2);
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 + (src2 << 2);
SET_ZNCV_ADD(dst, src1, src2);
if (src1 & 0xc0000000)
@@ -943,9 +943,9 @@ void asap_device::leah()
void asap_device::leah_c()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 + (src2 << 1);
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 + (src2 << 1);
SET_ZNCV_ADD(dst, src1, src2);
if (src1 & 0x80000000)
@@ -957,9 +957,9 @@ void asap_device::leah_c()
void asap_device::leah_c0()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 + (src2 << 1);
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 + (src2 << 1);
SET_ZNCV_ADD(dst, src1, src2);
if (src1 & 0x80000000)
@@ -977,9 +977,9 @@ void asap_device::subr()
void asap_device::subr_c()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src2 - src1;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src2 - src1;
SET_ZNCV_SUB(dst, src2, src1);
DSTVAL = dst;
@@ -987,9 +987,9 @@ void asap_device::subr_c()
void asap_device::subr_c0()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src2 - src1;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src2 - src1;
SET_ZNCV_SUB(dst, src2, src1);
}
@@ -1003,14 +1003,14 @@ void asap_device::xor_()
void asap_device::xor_c()
{
- UINT32 dst = SRC1VAL ^ SRC2VAL;
+ uint32_t dst = SRC1VAL ^ SRC2VAL;
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::xor_c0()
{
- UINT32 dst = SRC1VAL ^ SRC2VAL;
+ uint32_t dst = SRC1VAL ^ SRC2VAL;
SET_ZN(dst);
}
@@ -1023,14 +1023,14 @@ void asap_device::xorn()
void asap_device::xorn_c()
{
- UINT32 dst = SRC1VAL ^ ~SRC2VAL;
+ uint32_t dst = SRC1VAL ^ ~SRC2VAL;
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::xorn_c0()
{
- UINT32 dst = SRC1VAL ^ ~SRC2VAL;
+ uint32_t dst = SRC1VAL ^ ~SRC2VAL;
SET_ZN(dst);
}
@@ -1043,9 +1043,9 @@ void asap_device::add()
void asap_device::add_c()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 + src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 + src2;
SET_ZNCV_ADD(dst, src1, src2);
DSTVAL = dst;
@@ -1053,9 +1053,9 @@ void asap_device::add_c()
void asap_device::add_c0()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 + src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 + src2;
SET_ZNCV_ADD(dst, src1, src2);
}
@@ -1069,9 +1069,9 @@ void asap_device::sub()
void asap_device::sub_c()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 - src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 - src2;
SET_ZNCV_SUB(dst, src1, src2);
DSTVAL = dst;
@@ -1079,9 +1079,9 @@ void asap_device::sub_c()
void asap_device::sub_c0()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 - src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 - src2;
SET_ZNCV_SUB(dst, src1, src2);
}
@@ -1095,9 +1095,9 @@ void asap_device::addc()
void asap_device::addc_c()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 + src2 + m_cflag;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 + src2 + m_cflag;
SET_ZNCV_ADD(dst, src1, src2);
DSTVAL = dst;
@@ -1105,9 +1105,9 @@ void asap_device::addc_c()
void asap_device::addc_c0()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 + src2 + m_cflag;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 + src2 + m_cflag;
SET_ZNCV_ADD(dst, src1, src2);
}
@@ -1121,9 +1121,9 @@ void asap_device::subc()
void asap_device::subc_c()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 - src2 - 1 + m_cflag;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 - src2 - 1 + m_cflag;
SET_ZNCV_SUB(dst, src1, src2);
DSTVAL = dst;
@@ -1131,9 +1131,9 @@ void asap_device::subc_c()
void asap_device::subc_c0()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL;
- UINT32 dst = src1 - src2 - 1 + m_cflag;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL;
+ uint32_t dst = src1 - src2 - 1 + m_cflag;
SET_ZNCV_SUB(dst, src1, src2);
}
@@ -1147,14 +1147,14 @@ void asap_device::and_()
void asap_device::and_c()
{
- UINT32 dst = SRC1VAL & SRC2VAL;
+ uint32_t dst = SRC1VAL & SRC2VAL;
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::and_c0()
{
- UINT32 dst = SRC1VAL & SRC2VAL;
+ uint32_t dst = SRC1VAL & SRC2VAL;
SET_ZN(dst);
}
@@ -1167,14 +1167,14 @@ void asap_device::andn()
void asap_device::andn_c()
{
- UINT32 dst = SRC1VAL & ~SRC2VAL;
+ uint32_t dst = SRC1VAL & ~SRC2VAL;
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::andn_c0()
{
- UINT32 dst = SRC1VAL & ~SRC2VAL;
+ uint32_t dst = SRC1VAL & ~SRC2VAL;
SET_ZN(dst);
}
@@ -1187,14 +1187,14 @@ void asap_device::or_()
void asap_device::or_c()
{
- UINT32 dst = SRC1VAL | SRC2VAL;
+ uint32_t dst = SRC1VAL | SRC2VAL;
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::or_c0()
{
- UINT32 dst = SRC1VAL | SRC2VAL;
+ uint32_t dst = SRC1VAL | SRC2VAL;
SET_ZN(dst);
}
@@ -1207,14 +1207,14 @@ void asap_device::orn()
void asap_device::orn_c()
{
- UINT32 dst = SRC1VAL | ~SRC2VAL;
+ uint32_t dst = SRC1VAL | ~SRC2VAL;
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::orn_c0()
{
- UINT32 dst = SRC1VAL | ~SRC2VAL;
+ uint32_t dst = SRC1VAL | ~SRC2VAL;
SET_ZN(dst);
}
@@ -1232,14 +1232,14 @@ void asap_device::ld_0()
void asap_device::ld_c()
{
- UINT32 dst = readlong(SRC1VAL + (SRC2VAL << 2));
+ uint32_t dst = readlong(SRC1VAL + (SRC2VAL << 2));
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::ld_c0()
{
- UINT32 dst = readlong(SRC1VAL + (SRC2VAL << 2));
+ uint32_t dst = readlong(SRC1VAL + (SRC2VAL << 2));
SET_ZN(dst);
}
@@ -1247,7 +1247,7 @@ void asap_device::ld_c0()
void asap_device::ldh()
{
- DSTVAL = (INT16)readword(SRC1VAL + (SRC2VAL << 1));
+ DSTVAL = (int16_t)readword(SRC1VAL + (SRC2VAL << 1));
}
void asap_device::ldh_0()
@@ -1257,14 +1257,14 @@ void asap_device::ldh_0()
void asap_device::ldh_c()
{
- UINT32 dst = (INT16)readword(SRC1VAL + (SRC2VAL << 1));
+ uint32_t dst = (int16_t)readword(SRC1VAL + (SRC2VAL << 1));
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::ldh_c0()
{
- UINT32 dst = (INT16)readword(SRC1VAL + (SRC2VAL << 1));
+ uint32_t dst = (int16_t)readword(SRC1VAL + (SRC2VAL << 1));
SET_ZN(dst);
}
@@ -1282,14 +1282,14 @@ void asap_device::lduh_0()
void asap_device::lduh_c()
{
- UINT32 dst = readword(SRC1VAL + (SRC2VAL << 1));
+ uint32_t dst = readword(SRC1VAL + (SRC2VAL << 1));
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::lduh_c0()
{
- UINT32 dst = readword(SRC1VAL + (SRC2VAL << 1));
+ uint32_t dst = readword(SRC1VAL + (SRC2VAL << 1));
SET_ZN(dst);
}
@@ -1307,7 +1307,7 @@ void asap_device::sth_0()
void asap_device::sth_c()
{
- UINT32 dst = (UINT16)DSTVAL;
+ uint32_t dst = (uint16_t)DSTVAL;
SET_ZN(dst);
writeword(SRC1VAL + (SRC2VAL << 1), dst);
}
@@ -1332,7 +1332,7 @@ void asap_device::st_0()
void asap_device::st_c()
{
- UINT32 dst = DSTVAL;
+ uint32_t dst = DSTVAL;
SET_ZN(dst);
writelong(SRC1VAL + (SRC2VAL << 2), dst);
}
@@ -1347,7 +1347,7 @@ void asap_device::st_c0()
void asap_device::ldb()
{
- DSTVAL = (INT8)readbyte(SRC1VAL + SRC2VAL);
+ DSTVAL = (int8_t)readbyte(SRC1VAL + SRC2VAL);
}
void asap_device::ldb_0()
@@ -1357,14 +1357,14 @@ void asap_device::ldb_0()
void asap_device::ldb_c()
{
- UINT32 dst = (INT8)readbyte(SRC1VAL + SRC2VAL);
+ uint32_t dst = (int8_t)readbyte(SRC1VAL + SRC2VAL);
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::ldb_c0()
{
- UINT32 dst = (INT8)readbyte(SRC1VAL + SRC2VAL);
+ uint32_t dst = (int8_t)readbyte(SRC1VAL + SRC2VAL);
SET_ZN(dst);
}
@@ -1382,14 +1382,14 @@ void asap_device::ldub_0()
void asap_device::ldub_c()
{
- UINT32 dst = readbyte(SRC1VAL + SRC2VAL);
+ uint32_t dst = readbyte(SRC1VAL + SRC2VAL);
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::ldub_c0()
{
- UINT32 dst = readbyte(SRC1VAL + SRC2VAL);
+ uint32_t dst = readbyte(SRC1VAL + SRC2VAL);
SET_ZN(dst);
}
@@ -1407,7 +1407,7 @@ void asap_device::stb_0()
void asap_device::stb_c()
{
- UINT32 dst = (UINT8)DSTVAL;
+ uint32_t dst = (uint8_t)DSTVAL;
SET_ZN(dst);
writebyte(SRC1VAL + SRC2VAL, dst);
}
@@ -1422,18 +1422,18 @@ void asap_device::stb_c0()
void asap_device::ashr()
{
- UINT32 src2 = SRC2VAL;
- DSTVAL = (src2 < 32) ? ((INT32)SRC1VAL >> src2) : ((INT32)SRC1VAL >> 31);
+ uint32_t src2 = SRC2VAL;
+ DSTVAL = (src2 < 32) ? ((int32_t)SRC1VAL >> src2) : ((int32_t)SRC1VAL >> 31);
}
void asap_device::ashr_c()
{
- UINT32 src2 = SRC2VAL;
+ uint32_t src2 = SRC2VAL;
m_cflag = 0;
if (src2 < 32)
{
- UINT32 src1 = SRC1VAL;
- UINT32 dst = (INT32)src1 >> src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t dst = (int32_t)src1 >> src2;
SET_ZN(dst);
if (src2 != 0)
{
@@ -1444,7 +1444,7 @@ void asap_device::ashr_c()
}
else
{
- UINT32 dst = (INT32)SRC1VAL >> 31;
+ uint32_t dst = (int32_t)SRC1VAL >> 31;
SET_ZN(dst);
DSTVAL = dst;
}
@@ -1452,12 +1452,12 @@ void asap_device::ashr_c()
void asap_device::ashr_c0()
{
- UINT32 src2 = SRC2VAL;
+ uint32_t src2 = SRC2VAL;
m_cflag = 0;
if (src2 < 32)
{
- UINT32 src1 = SRC1VAL;
- UINT32 dst = (INT32)src1 >> src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t dst = (int32_t)src1 >> src2;
SET_ZN(dst);
if (src2 != 0)
{
@@ -1467,7 +1467,7 @@ void asap_device::ashr_c0()
}
else
{
- UINT32 dst = (INT32)SRC1VAL >> 31;
+ uint32_t dst = (int32_t)SRC1VAL >> 31;
SET_ZN(dst);
}
}
@@ -1476,18 +1476,18 @@ void asap_device::ashr_c0()
void asap_device::lshr()
{
- UINT32 src2 = SRC2VAL;
+ uint32_t src2 = SRC2VAL;
DSTVAL = (src2 < 32) ? (SRC1VAL >> src2) : (SRC1VAL >> 31);
}
void asap_device::lshr_c()
{
- UINT32 src2 = SRC2VAL;
+ uint32_t src2 = SRC2VAL;
m_cflag = 0;
if (src2 < 32)
{
- UINT32 src1 = SRC1VAL;
- UINT32 dst = src1 >> src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t dst = src1 >> src2;
SET_ZN(dst);
if (src2 != 0)
{
@@ -1498,7 +1498,7 @@ void asap_device::lshr_c()
}
else
{
- UINT32 dst = SRC1VAL >> 31;
+ uint32_t dst = SRC1VAL >> 31;
SET_ZN(dst);
DSTVAL = dst;
}
@@ -1506,12 +1506,12 @@ void asap_device::lshr_c()
void asap_device::lshr_c0()
{
- UINT32 src2 = SRC2VAL;
+ uint32_t src2 = SRC2VAL;
m_cflag = 0;
if (src2 < 32)
{
- UINT32 src1 = SRC1VAL;
- UINT32 dst = src1 >> src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t dst = src1 >> src2;
SET_ZN(dst);
if (src2 != 0)
{
@@ -1530,24 +1530,24 @@ void asap_device::lshr_c0()
void asap_device::ashl()
{
- UINT32 src2 = SRC2VAL;
+ uint32_t src2 = SRC2VAL;
DSTVAL = (src2 < 32) ? (SRC1VAL << src2) : 0;
}
void asap_device::ashl_c()
{
- UINT32 src2 = SRC2VAL;
+ uint32_t src2 = SRC2VAL;
m_cflag = m_vflag = 0;
if (src2 < 32)
{
- UINT32 src1 = SRC1VAL;
- UINT32 dst = src1 << src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t dst = src1 << src2;
SET_ZN(dst);
if (src2 != 0)
{
- src1 = (INT32)src1 >> (32 - src2);
+ src1 = (int32_t)src1 >> (32 - src2);
m_cflag = src1 & PS_CFLAG;
- m_vflag = (src1 != ((INT32)dst >> 31)) << 31;
+ m_vflag = (src1 != ((int32_t)dst >> 31)) << 31;
}
DSTVAL = dst;
}
@@ -1560,18 +1560,18 @@ void asap_device::ashl_c()
void asap_device::ashl_c0()
{
- UINT32 src2 = SRC2VAL;
+ uint32_t src2 = SRC2VAL;
m_cflag = m_vflag = 0;
if (src2 < 32)
{
- UINT32 src1 = SRC1VAL;
- UINT32 dst = src1 << src2;
+ uint32_t src1 = SRC1VAL;
+ uint32_t dst = src1 << src2;
SET_ZN(dst);
if (src2 != 0)
{
- src1 = (INT32)src1 >> (32 - src2);
+ src1 = (int32_t)src1 >> (32 - src2);
m_cflag = src1 & PS_CFLAG;
- m_vflag = (src1 != ((INT32)dst >> 31)) << 31;
+ m_vflag = (src1 != ((int32_t)dst >> 31)) << 31;
}
}
else
@@ -1582,25 +1582,25 @@ void asap_device::ashl_c0()
void asap_device::rotl()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL & 31;
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL & 31;
DSTVAL = (src1 << src2) | (src1 >> (32 - src2));
}
void asap_device::rotl_c()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL & 31;
- UINT32 dst = (src1 << src2) | (src1 >> (32 - src2));
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL & 31;
+ uint32_t dst = (src1 << src2) | (src1 >> (32 - src2));
SET_ZN(dst);
DSTVAL = dst;
}
void asap_device::rotl_c0()
{
- UINT32 src1 = SRC1VAL;
- UINT32 src2 = SRC2VAL & 31;
- UINT32 dst = (src1 << src2) | (src1 >> (32 - src2));
+ uint32_t src1 = SRC1VAL;
+ uint32_t src2 = SRC2VAL & 31;
+ uint32_t dst = (src1 << src2) | (src1 >> (32 - src2));
SET_ZN(dst);
}
@@ -1615,7 +1615,7 @@ void asap_device::getps()
void asap_device::putps()
{
- UINT32 src2 = SRC2VAL & 0x3f;
+ uint32_t src2 = SRC2VAL & 0x3f;
SET_FLAGS(src2);
check_irqs();
}
diff --git a/src/devices/cpu/asap/asap.h b/src/devices/cpu/asap/asap.h
index 87d11282072..1ed0583d4d1 100644
--- a/src/devices/cpu/asap/asap.h
+++ b/src/devices/cpu/asap/asap.h
@@ -26,7 +26,7 @@ class asap_device : public cpu_device
{
public:
// construction/destruction
- asap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ asap_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// public interfaces
@@ -36,9 +36,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -51,18 +51,18 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// helpers
- inline UINT32 readop(offs_t pc);
- inline UINT8 readbyte(offs_t address);
- inline UINT16 readword(offs_t address);
- inline UINT32 readlong(offs_t address);
- inline void writebyte(offs_t address, UINT8 data);
- inline void writeword(offs_t address, UINT16 data);
- inline void writelong(offs_t address, UINT32 data);
+ inline uint32_t readop(offs_t pc);
+ inline uint8_t readbyte(offs_t address);
+ inline uint16_t readword(offs_t address);
+ inline uint32_t readlong(offs_t address);
+ inline void writebyte(offs_t address, uint8_t data);
+ inline void writeword(offs_t address, uint16_t data);
+ inline void writelong(offs_t address, uint32_t data);
inline void generate_exception(int exception);
inline void check_irqs();
inline void fetch_instruction();
@@ -185,27 +185,27 @@ protected:
// internal state
const address_space_config m_program_config;
- UINT32 m_pc;
+ uint32_t m_pc;
// expanded flags
- UINT32 m_pflag;
- UINT32 m_iflag;
- UINT32 m_cflag;
- UINT32 m_vflag;
- UINT32 m_znflag;
- UINT32 m_flagsio;
+ uint32_t m_pflag;
+ uint32_t m_iflag;
+ uint32_t m_cflag;
+ uint32_t m_vflag;
+ uint32_t m_znflag;
+ uint32_t m_flagsio;
// internal stuff
- UINT32 m_op;
- UINT32 m_ppc;
- UINT32 m_nextpc;
- UINT8 m_irq_state;
+ uint32_t m_op;
+ uint32_t m_ppc;
+ uint32_t m_nextpc;
+ uint8_t m_irq_state;
int m_icount;
address_space * m_program;
direct_read_data * m_direct;
// src2val table, registers are at the end
- UINT32 m_src2val[65536];
+ uint32_t m_src2val[65536];
// opcode/condition tables
typedef void (asap_device::*ophandler)();
diff --git a/src/devices/cpu/asap/asapdasm.cpp b/src/devices/cpu/asap/asapdasm.cpp
index ded3a24e17b..47665331da2 100644
--- a/src/devices/cpu/asap/asapdasm.cpp
+++ b/src/devices/cpu/asap/asapdasm.cpp
@@ -35,7 +35,7 @@ static const char *const condition[16] =
CODE CODE
***************************************************************************/
-static inline char *src2(UINT32 op, int scale)
+static inline char *src2(uint32_t op, int scale)
{
static char temp[20];
if ((op & 0xffe0) == 0xffe0)
@@ -47,25 +47,25 @@ static inline char *src2(UINT32 op, int scale)
CPU_DISASSEMBLE( asap )
{
- UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
+ uint32_t op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
int opcode = op >> 27;
int cond = (op >> 21) & 1;
int rdst = (op >> 22) & 31;
int rsrc1 = (op >> 16) & 31;
int rsrc2 = op & 0xffff;
int rsrc2_iszero = (!rsrc2 || rsrc2 == 0xffe0);
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch (opcode)
{
case 0x00: sprintf(buffer, "trap $00"); flags = DASMFLAG_STEP_OVER; break;
- case 0x01: sprintf(buffer, "b%s $%08x", condition[rdst & 15], pc + ((INT32)(op << 10) >> 8)); break;
+ case 0x01: sprintf(buffer, "b%s $%08x", condition[rdst & 15], pc + ((int32_t)(op << 10) >> 8)); break;
case 0x02: if ((op & 0x003fffff) == 3)
{
- UINT32 nextop = oprom[4] | (oprom[5] << 8) | (oprom[6] << 16) | (oprom[7] << 24);
+ uint32_t nextop = oprom[4] | (oprom[5] << 8) | (oprom[6] << 16) | (oprom[7] << 24);
if ((nextop >> 27) == 0x10 && ((nextop >> 22) & 31) == rdst && (nextop & 0xffff) == 0)
{
- UINT32 nextnextop = oprom[8] | (oprom[9] << 8) | (oprom[10] << 16) | (oprom[11] << 24);
+ uint32_t nextnextop = oprom[8] | (oprom[9] << 8) | (oprom[10] << 16) | (oprom[11] << 24);
sprintf(buffer, "llit%s $%08x,%s", setcond[cond], nextnextop, reg[rdst]);
return 12 | DASMFLAG_STEP_OVER | DASMFLAG_SUPPORTED;
}
@@ -73,10 +73,10 @@ CPU_DISASSEMBLE( asap )
if (rdst)
{
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
- sprintf(buffer, "bsr %s,$%08x", reg[rdst], pc + ((INT32)(op << 10) >> 8));
+ sprintf(buffer, "bsr %s,$%08x", reg[rdst], pc + ((int32_t)(op << 10) >> 8));
}
else
- sprintf(buffer, "bra $%08x", pc + ((INT32)(op << 10) >> 8));
+ sprintf(buffer, "bra $%08x", pc + ((int32_t)(op << 10) >> 8));
break;
case 0x03: sprintf(buffer, "lea%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break;
case 0x04: sprintf(buffer, "leah%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
diff --git a/src/devices/cpu/avr8/avr8.cpp b/src/devices/cpu/avr8/avr8.cpp
index 44009a8c6fd..6f0a4278d5b 100644
--- a/src/devices/cpu/avr8/avr8.cpp
+++ b/src/devices/cpu/avr8/avr8.cpp
@@ -66,7 +66,7 @@
#define ENABLE_VERBOSE_LOG (0)
#if ENABLE_VERBOSE_LOG
-static inline void ATTR_PRINTF(3,4) verboselog(UINT16 pc, int n_level, const char *s_fmt, ...)
+static inline void ATTR_PRINTF(3,4) verboselog(uint16_t pc, int n_level, const char *s_fmt, ...)
{
if( VERBOSE_LEVEL >= n_level )
{
@@ -189,7 +189,7 @@ enum
#define KCONST6(op) ((((op) >> 2) & 0x0030) | ((op) & 0x000f))
#define KCONST7(op) (((op) >> 3) & 0x007f)
#define KCONST8(op) ((((op) >> 4) & 0x00f0) | ((op) & 0x000f))
-#define KCONST22(op) (((((UINT32)(op) >> 3) & 0x003e) | ((UINT32)(op) & 0x0001)) << 16)
+#define KCONST22(op) (((((uint32_t)(op) >> 3) & 0x003e) | ((uint32_t)(op) & 0x0001)) << 16)
#define QCONST6(op) ((((op) >> 8) & 0x0020) | (((op) >> 7) & 0x0018) | ((op) & 0x0007))
#define ACONST5(op) (((op) >> 3) & 0x001f)
#define ACONST6(op) ((((op) >> 5) & 0x0030) | ((op) & 0x000f))
@@ -596,7 +596,7 @@ ADDRESS_MAP_END
// atmega88_device - constructor
//-------------------------------------------------
-atmega88_device::atmega88_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+atmega88_device::atmega88_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: avr8_device(mconfig, "ATMEGA88", tag, owner, clock, ATMEGA88, 0x0fff, ADDRESS_MAP_NAME(atmega88_internal_map), CPU_TYPE_ATMEGA88, "atmega88", __FILE__)
{
}
@@ -605,7 +605,7 @@ atmega88_device::atmega88_device(const machine_config &mconfig, const char *tag,
// atmega644_device - constructor
//-------------------------------------------------
-atmega644_device::atmega644_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+atmega644_device::atmega644_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: avr8_device(mconfig, "ATMEGA644", tag, owner, clock, ATMEGA644, 0xffff, ADDRESS_MAP_NAME(atmega644_internal_map), CPU_TYPE_ATMEGA644, "atmega644", __FILE__)
{
}
@@ -614,7 +614,7 @@ atmega644_device::atmega644_device(const machine_config &mconfig, const char *ta
// atmega1280_device - constructor
//-------------------------------------------------
-atmega1280_device::atmega1280_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+atmega1280_device::atmega1280_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: avr8_device(mconfig, "ATMEGA1280", tag, owner, clock, ATMEGA1280, 0x1ffff, ADDRESS_MAP_NAME(atmega1280_internal_map), CPU_TYPE_ATMEGA1280, "atmega1280", __FILE__)
{
}
@@ -623,7 +623,7 @@ atmega1280_device::atmega1280_device(const machine_config &mconfig, const char *
// atmega2560_device - constructor
//-------------------------------------------------
-atmega2560_device::atmega2560_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+atmega2560_device::atmega2560_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: avr8_device(mconfig, "ATMEGA2560", tag, owner, clock, ATMEGA2560, 0x1ffff, ADDRESS_MAP_NAME(atmega2560_internal_map), CPU_TYPE_ATMEGA2560, "atmega2560", __FILE__)
{
}
@@ -632,7 +632,7 @@ atmega2560_device::atmega2560_device(const machine_config &mconfig, const char *
// avr8_device - constructor
//-------------------------------------------------
-avr8_device::avr8_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock, const device_type type, UINT32 addr_mask, address_map_constructor internal_map, UINT8 cpu_type, const char *shortname, const char *source)
+avr8_device::avr8_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t addr_mask, address_map_constructor internal_map, uint8_t cpu_type, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_shifted_pc(0)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 22)
@@ -667,7 +667,7 @@ avr8_device::avr8_device(const machine_config &mconfig, const char *name, const
// static_set_low_fuses
//-------------------------------------------------
-void avr8_device::set_low_fuses(const UINT8 byte)
+void avr8_device::set_low_fuses(const uint8_t byte)
{
m_lfuses = byte;
}
@@ -676,7 +676,7 @@ void avr8_device::set_low_fuses(const UINT8 byte)
// static_set_high_fuses
//-------------------------------------------------
-void avr8_device::set_high_fuses(const UINT8 byte)
+void avr8_device::set_high_fuses(const uint8_t byte)
{
m_hfuses = byte;
}
@@ -685,7 +685,7 @@ void avr8_device::set_high_fuses(const UINT8 byte)
// static_set_extended_fuses
//-------------------------------------------------
-void avr8_device::set_extended_fuses(const UINT8 byte)
+void avr8_device::set_extended_fuses(const uint8_t byte)
{
m_efuses = byte;
}
@@ -694,7 +694,7 @@ void avr8_device::set_extended_fuses(const UINT8 byte)
// static_set_lock_bits
//-------------------------------------------------
-void avr8_device::set_lock_bits(const UINT8 byte)
+void avr8_device::set_lock_bits(const uint8_t byte)
{
m_lock_bits = byte;
}
@@ -704,7 +704,7 @@ void avr8_device::set_lock_bits(const UINT8 byte)
// instruction
//-------------------------------------------------
-void avr8_device::unimplemented_opcode(UINT32 op)
+void avr8_device::unimplemented_opcode(uint32_t op)
{
// machine().debug_break();
fatalerror("AVR8: unknown opcode (%08x) at %08x\n", op, m_shifted_pc);
@@ -716,7 +716,7 @@ void avr8_device::unimplemented_opcode(UINT32 op)
// bytes long
//-------------------------------------------------
-inline bool avr8_device::is_long_opcode(UINT16 op)
+inline bool avr8_device::is_long_opcode(uint16_t op)
{
if((op & 0xf000) == 0x9000)
{
@@ -927,7 +927,7 @@ void avr8_device::state_string_export(const device_state_entry &entry, std::stri
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 avr8_device::disasm_min_opcode_bytes() const
+uint32_t avr8_device::disasm_min_opcode_bytes() const
{
return 2;
}
@@ -938,7 +938,7 @@ UINT32 avr8_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 avr8_device::disasm_max_opcode_bytes() const
+uint32_t avr8_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -949,7 +949,7 @@ UINT32 avr8_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t avr8_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t avr8_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( avr8 );
return CPU_DISASSEMBLE_NAME(avr8)(this, buffer, pc, oprom, opram, options);
@@ -960,18 +960,18 @@ offs_t avr8_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
// MEMORY ACCESSORS
//**************************************************************************
-inline void avr8_device::push(UINT8 val)
+inline void avr8_device::push(uint8_t val)
{
- UINT16 sp = SPREG;
+ uint16_t sp = SPREG;
m_data->write_byte(sp, val);
sp--;
m_r[AVR8_REGIDX_SPL] = sp & 0x00ff;
m_r[AVR8_REGIDX_SPH] = (sp >> 8) & 0x00ff;
}
-inline UINT8 avr8_device::pop()
+inline uint8_t avr8_device::pop()
{
- UINT16 sp = SPREG;
+ uint16_t sp = SPREG;
sp++;
m_r[AVR8_REGIDX_SPL] = sp & 0x00ff;
m_r[AVR8_REGIDX_SPH] = (sp >> 8) & 0x00ff;
@@ -982,7 +982,7 @@ inline UINT8 avr8_device::pop()
// IRQ HANDLING
//**************************************************************************
-void avr8_device::set_irq_line(UINT16 vector, int state)
+void avr8_device::set_irq_line(uint16_t vector, int state)
{
// Horrible hack, not accurate
if(state)
@@ -1005,11 +1005,11 @@ void avr8_device::set_irq_line(UINT16 vector, int state)
class CInterruptCondition
{
public:
- UINT8 m_intindex;
- UINT8 m_intreg;
- UINT8 m_intmask;
- UINT8 m_regindex;
- UINT8 m_regmask;
+ uint8_t m_intindex;
+ uint8_t m_intreg;
+ uint8_t m_intmask;
+ uint8_t m_regindex;
+ uint8_t m_regmask;
};
static const CInterruptCondition s_int_conditions[AVR8_INTIDX_COUNT] =
@@ -1124,7 +1124,7 @@ void avr8_device::timer_tick(int cycles)
m_spi_prescale_count++;
if (m_spi_prescale_count >= m_spi_prescale)
{
- UINT8 out_bit = (m_r[AVR8_REGIDX_SPDR] & (1 << m_spi_prescale_countdown)) >> m_spi_prescale_countdown;
+ uint8_t out_bit = (m_r[AVR8_REGIDX_SPDR] & (1 << m_spi_prescale_countdown)) >> m_spi_prescale_countdown;
m_spi_prescale_countdown--;
m_io->write_byte(AVR8_IO_PORTB, (m_r[AVR8_REGIDX_PORTB] &~ AVR8_PORTB_MOSI) | (out_bit ? AVR8_PORTB_MOSI : 0));
m_r[AVR8_REGIDX_PORTB] = (m_r[AVR8_REGIDX_PORTB] &~ AVR8_PORTB_MOSI) | (out_bit ? AVR8_PORTB_MOSI : 0);
@@ -1154,9 +1154,9 @@ void avr8_device::timer_tick(int cycles)
}
}
-// UINT8 ocr0[2] = { m_r[AVR8_REGIDX_OCR0A], m_r[AVR8_REGIDX_OCR0B] };
-//TODO UINT8 ocf0[2] = { (1 << AVR8_TIFR0_OCF0A_SHIFT), (1 << AVR8_TIFR4_OCF0B_SHIFT) };
-//TODO UINT8 int0[2] = { AVR8_INTIDX_OCF0A, AVR8_INTIDX_OCF0B };
+// uint8_t ocr0[2] = { m_r[AVR8_REGIDX_OCR0A], m_r[AVR8_REGIDX_OCR0B] };
+//TODO uint8_t ocf0[2] = { (1 << AVR8_TIFR0_OCF0A_SHIFT), (1 << AVR8_TIFR4_OCF0B_SHIFT) };
+//TODO uint8_t int0[2] = { AVR8_INTIDX_OCF0A, AVR8_INTIDX_OCF0B };
#define LOG_TIMER_0 0
#define LOG_TIMER_5 0
@@ -1168,8 +1168,8 @@ void avr8_device::timer0_tick()
printf("AVR8_TCCR0A_COM0B: %d\n", AVR8_TCCR0A_COM0B);
#endif
- UINT8 count = m_r[AVR8_REGIDX_TCNT0];
- INT32 increment = m_timer_increment[0];
+ uint8_t count = m_r[AVR8_REGIDX_TCNT0];
+ int32_t increment = m_timer_increment[0];
switch(AVR8_WGM0)
{
@@ -1242,11 +1242,11 @@ void avr8_device::timer0_tick()
m_r[AVR8_REGIDX_TCNT0] = count & 0xff;
}
-void avr8_device::changed_tccr0a(UINT8 data)
+void avr8_device::changed_tccr0a(uint8_t data)
{
- UINT8 oldtccr = AVR8_TCCR0A;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR0A;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR0A = data;
@@ -1262,13 +1262,13 @@ void avr8_device::timer0_force_output_compare(int reg)
verboselog(m_pc, 0, "timer0_force_output_compare: TODO; should be forcing OC0%c\n", avr8_reg_name[reg]);
}
-void avr8_device::changed_tccr0b(UINT8 data)
+void avr8_device::changed_tccr0b(uint8_t data)
{
if (VERBOSE_LEVEL) printf("changed_tccr0b: data=0x%02X\n", data);
- UINT8 oldtccr = AVR8_TCCR0B;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR0B;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR0B = data;
@@ -1295,7 +1295,7 @@ void avr8_device::changed_tccr0b(UINT8 data)
}
}
-void avr8_device::update_ocr0(UINT8 newval, UINT8 reg)
+void avr8_device::update_ocr0(uint8_t newval, uint8_t reg)
{
m_r[(reg == AVR8_REG_A) ? AVR8_REGIDX_OCR0A : AVR8_REGIDX_OCR0B] = newval;
}
@@ -1306,20 +1306,20 @@ void avr8_device::timer1_tick()
{
/* TODO: Handle comparison, setting OC1x pins, detection of BOTTOM and TOP */
- UINT16 count = (m_r[AVR8_REGIDX_TCNT1H] << 8) | m_r[AVR8_REGIDX_TCNT1L];
- INT32 wgm1 = ((m_r[AVR8_REGIDX_TCCR1B] & AVR8_TCCR1B_WGM1_32_MASK) >> 1) |
+ uint16_t count = (m_r[AVR8_REGIDX_TCNT1H] << 8) | m_r[AVR8_REGIDX_TCNT1L];
+ int32_t wgm1 = ((m_r[AVR8_REGIDX_TCCR1B] & AVR8_TCCR1B_WGM1_32_MASK) >> 1) |
(m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_WGM1_10_MASK);
// Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
- //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
+ //uint8_t compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
//(m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT };
- UINT16 ocr1[2] = { static_cast<UINT16>((m_r[AVR8_REGIDX_OCR1AH] << 8) | m_r[AVR8_REGIDX_OCR1AL]),
- static_cast<UINT16>((m_r[AVR8_REGIDX_OCR1BH] << 8) | m_r[AVR8_REGIDX_OCR1BL]) };
- UINT8 ocf1[2] = { (1 << AVR8_TIFR1_OCF1A_SHIFT), (1 << AVR8_TIFR1_OCF1B_SHIFT) };
- UINT8 int1[2] = { AVR8_INTIDX_OCF1A, AVR8_INTIDX_OCF1B };
- INT32 increment = m_timer_increment[1];
+ uint16_t ocr1[2] = { static_cast<uint16_t>((m_r[AVR8_REGIDX_OCR1AH] << 8) | m_r[AVR8_REGIDX_OCR1AL]),
+ static_cast<uint16_t>((m_r[AVR8_REGIDX_OCR1BH] << 8) | m_r[AVR8_REGIDX_OCR1BL]) };
+ uint8_t ocf1[2] = { (1 << AVR8_TIFR1_OCF1A_SHIFT), (1 << AVR8_TIFR1_OCF1B_SHIFT) };
+ uint8_t int1[2] = { AVR8_INTIDX_OCF1A, AVR8_INTIDX_OCF1B };
+ int32_t increment = m_timer_increment[1];
- for(INT32 reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
+ for(int32_t reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
{
switch(wgm1)
{
@@ -1409,9 +1409,9 @@ void avr8_device::timer1_tick()
m_r[AVR8_REGIDX_TCNT1L] = count & 0xff;
}
-void avr8_device::update_timer_waveform_gen_mode(UINT8 t, UINT8 mode)
+void avr8_device::update_timer_waveform_gen_mode(uint8_t t, uint8_t mode)
{
- INT32 oc_val = -1, ic_val = -1;
+ int32_t oc_val = -1, ic_val = -1;
switch (t){
case 0:
@@ -1440,9 +1440,9 @@ void avr8_device::update_timer_waveform_gen_mode(UINT8 t, UINT8 mode)
break;
}
- INT32 top_values_02[8] = {0xFF, 0xFF, oc_val, 0xFF, -1, oc_val, -1, oc_val}; //table 20-8
+ int32_t top_values_02[8] = {0xFF, 0xFF, oc_val, 0xFF, -1, oc_val, -1, oc_val}; //table 20-8
- INT32 top_values_1345[16] = {0xFFFF, 0x00FF, 0x01FF, 0x03FF,
+ int32_t top_values_1345[16] = {0xFFFF, 0x00FF, 0x01FF, 0x03FF,
oc_val, 0x00FF, 0x01FF, 0x03FF,
ic_val, oc_val, ic_val, oc_val,
ic_val, -1, ic_val, oc_val}; //table 17-2
@@ -1466,11 +1466,11 @@ void avr8_device::update_timer_waveform_gen_mode(UINT8 t, UINT8 mode)
}
}
-void avr8_device::changed_tccr1a(UINT8 data)
+void avr8_device::changed_tccr1a(uint8_t data)
{
- UINT8 oldtccr = AVR8_TCCR1A;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR1A;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
m_r[AVR8_REGIDX_TCCR1A] = newtccr;
@@ -1491,13 +1491,13 @@ void avr8_device::update_timer1_input_edge_select()
//verboselog(m_pc, 0, "update_timer1_input_edge_select: TODO; Clocking edge is %s\n", "test");
}
-void avr8_device::changed_tccr1b(UINT8 data)
+void avr8_device::changed_tccr1b(uint8_t data)
{
if (VERBOSE_LEVEL) printf("changed_tccr1b: data=0x%02X\n", data);
- UINT8 oldtccr = AVR8_TCCR1B;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR1B;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
m_r[AVR8_REGIDX_TCCR1B] = newtccr;
@@ -1524,12 +1524,12 @@ void avr8_device::changed_tccr1b(UINT8 data)
}
}
-void avr8_device::update_ocr1(UINT16 newval, UINT8 reg)
+void avr8_device::update_ocr1(uint16_t newval, uint8_t reg)
{
- UINT8 *p_reg_h = (reg == AVR8_REG_A) ? &m_r[AVR8_REGIDX_OCR1AH] : &m_r[AVR8_REGIDX_OCR1BH];
- UINT8 *p_reg_l = (reg == AVR8_REG_A) ? &m_r[AVR8_REGIDX_OCR1AL] : &m_r[AVR8_REGIDX_OCR1BL];
- *p_reg_h = (UINT8)(newval >> 8);
- *p_reg_l = (UINT8)newval;
+ uint8_t *p_reg_h = (reg == AVR8_REG_A) ? &m_r[AVR8_REGIDX_OCR1AH] : &m_r[AVR8_REGIDX_OCR1BH];
+ uint8_t *p_reg_l = (reg == AVR8_REG_A) ? &m_r[AVR8_REGIDX_OCR1AL] : &m_r[AVR8_REGIDX_OCR1BL];
+ *p_reg_h = (uint8_t)(newval >> 8);
+ *p_reg_l = (uint8_t)newval;
// Nothing needs to be done? All handled in timer callback
}
@@ -1538,18 +1538,18 @@ void avr8_device::update_ocr1(UINT16 newval, UINT8 reg)
void avr8_device::timer2_tick()
{
- UINT16 count = m_r[AVR8_REGIDX_TCNT2];
- INT32 wgm2 = ((m_r[AVR8_REGIDX_TCCR2B] & AVR8_TCCR2B_WGM2_2_MASK) >> 1) |
+ uint16_t count = m_r[AVR8_REGIDX_TCNT2];
+ int32_t wgm2 = ((m_r[AVR8_REGIDX_TCCR2B] & AVR8_TCCR2B_WGM2_2_MASK) >> 1) |
(m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_WGM2_10_MASK);
// Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
- //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_COM2A_MASK) >> AVR8_TCCR2A_COM2A_SHIFT,
+ //uint8_t compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_COM2A_MASK) >> AVR8_TCCR2A_COM2A_SHIFT,
//(m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_COM2B_MASK) >> AVR8_TCCR2A_COM2B_SHIFT };
- UINT8 ocr2[2] = { m_r[AVR8_REGIDX_OCR2A], m_r[AVR8_REGIDX_OCR2B] };
- UINT8 ocf2[2] = { (1 << AVR8_TIFR2_OCF2A_SHIFT), (1 << AVR8_TIFR2_OCF2B_SHIFT) };
- INT32 increment = m_timer_increment[2];
+ uint8_t ocr2[2] = { m_r[AVR8_REGIDX_OCR2A], m_r[AVR8_REGIDX_OCR2B] };
+ uint8_t ocf2[2] = { (1 << AVR8_TIFR2_OCF2A_SHIFT), (1 << AVR8_TIFR2_OCF2B_SHIFT) };
+ int32_t increment = m_timer_increment[2];
- for(INT32 reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
+ for(int32_t reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
{
switch(wgm2)
{
@@ -1628,11 +1628,11 @@ void avr8_device::timer2_tick()
update_interrupt(AVR8_INTIDX_TOV2);
}
-void avr8_device::changed_tccr2a(UINT8 data)
+void avr8_device::changed_tccr2a(uint8_t data)
{
- UINT8 oldtccr = AVR8_TCCR2A;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR2A;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR2A = data;
@@ -1649,13 +1649,13 @@ void avr8_device::timer2_force_output_compare(int reg)
verboselog(m_pc, 0, "force_output_compare: TODO; should be forcing OC2%c\n", avr8_reg_name[reg]);
}
-void avr8_device::changed_tccr2b(UINT8 data)
+void avr8_device::changed_tccr2b(uint8_t data)
{
if (VERBOSE_LEVEL) printf("changed_tccr2b: data=0x%02X\n", data);
- UINT8 oldtccr = AVR8_TCCR2B;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR2B;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR2B = data;
@@ -1682,7 +1682,7 @@ void avr8_device::changed_tccr2b(UINT8 data)
}
}
-void avr8_device::update_ocr2(UINT8 newval, UINT8 reg)
+void avr8_device::update_ocr2(uint8_t newval, uint8_t reg)
{
m_r[(reg == AVR8_REG_A) ? AVR8_REGIDX_OCR2A : AVR8_REGIDX_OCR2B] = newval;
@@ -1704,16 +1704,16 @@ void avr8_device::timer4_tick()
// printf("AVR8_WGM4: %d\n", AVR8_WGM4);
// printf("AVR8_TCCR4A_COM4B: %d\n", AVR8_TCCR4A_COM4B);
- UINT16 count = (m_r[AVR8_REGIDX_TCNT4H] << 8) | m_r[AVR8_REGIDX_TCNT4L];
+ uint16_t count = (m_r[AVR8_REGIDX_TCNT4H] << 8) | m_r[AVR8_REGIDX_TCNT4L];
// Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
- //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
+ //uint8_t compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
//(m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT };
- UINT16 ocr4[2] = { static_cast<UINT16>((m_r[AVR8_REGIDX_OCR4AH] << 8) | m_r[AVR8_REGIDX_OCR4AL]),
- static_cast<UINT16>((m_r[AVR8_REGIDX_OCR4BH] << 8) | m_r[AVR8_REGIDX_OCR4BL]) };
-//TODO UINT8 ocf4[2] = { (1 << AVR8_TIFR4_OCF4A_SHIFT), (1 << AVR8_TIFR4_OCF4B_SHIFT) };
-//TODO UINT8 int4[2] = { AVR8_INTIDX_OCF4A, AVR8_INTIDX_OCF4B };
- INT32 increment = m_timer_increment[4];
+ uint16_t ocr4[2] = { static_cast<uint16_t>((m_r[AVR8_REGIDX_OCR4AH] << 8) | m_r[AVR8_REGIDX_OCR4AL]),
+ static_cast<uint16_t>((m_r[AVR8_REGIDX_OCR4BH] << 8) | m_r[AVR8_REGIDX_OCR4BL]) };
+//TODO uint8_t ocf4[2] = { (1 << AVR8_TIFR4_OCF4A_SHIFT), (1 << AVR8_TIFR4_OCF4B_SHIFT) };
+//TODO uint8_t int4[2] = { AVR8_INTIDX_OCF4A, AVR8_INTIDX_OCF4B };
+ int32_t increment = m_timer_increment[4];
switch(AVR8_WGM4)
{
@@ -1783,7 +1783,7 @@ void avr8_device::timer4_tick()
m_r[AVR8_REGIDX_TCNT4L] = count & 0xff;
}
-void avr8_device::update_timer_clock_source(UINT8 t, UINT8 clock_select)
+void avr8_device::update_timer_clock_source(uint8_t t, uint8_t clock_select)
{
int prescale_values[8] = {0, 1, 8, 64, 256, 1024, -1, -1};
m_timer_prescale[t] = prescale_values[clock_select];
@@ -1799,22 +1799,22 @@ void avr8_device::update_timer_clock_source(UINT8 t, UINT8 clock_select)
m_timer_prescale_count[t] = m_timer_prescale[t] - 1;
}
-void avr8_device::changed_tccr3a(UINT8 data)
+void avr8_device::changed_tccr3a(uint8_t data)
{
//TODO: Implement-me
// AVR8_TCCR3A = data;
}
-void avr8_device::changed_tccr3b(UINT8 data)
+void avr8_device::changed_tccr3b(uint8_t data)
{
printf("IMPLEMENT-ME: changed_tccr4b: data=0x%02X\n", data);
}
-void avr8_device::changed_tccr3c(UINT8 data)
+void avr8_device::changed_tccr3c(uint8_t data)
{
-// UINT8 oldtccr = AVR8_TCCR3C;
-// UINT8 newtccr = data;
-// UINT8 changed = newtccr ^ oldtccr;
+// uint8_t oldtccr = AVR8_TCCR3C;
+// uint8_t newtccr = data;
+// uint8_t changed = newtccr ^ oldtccr;
printf("IMPLEMENT-ME: changed_tccr3c: data=0x%02X\n", data);
// AVR8_TCCR3C = data;
@@ -1822,11 +1822,11 @@ void avr8_device::changed_tccr3c(UINT8 data)
//TODO: Implement-me
}
-void avr8_device::changed_tccr4a(UINT8 data)
+void avr8_device::changed_tccr4a(uint8_t data)
{
- UINT8 oldtccr = AVR8_TCCR4A;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR4A;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR4A = data;
@@ -1836,13 +1836,13 @@ void avr8_device::changed_tccr4a(UINT8 data)
}
}
-void avr8_device::changed_tccr4b(UINT8 data)
+void avr8_device::changed_tccr4b(uint8_t data)
{
printf("changed_tccr4b: data=0x%02X\n", data);
- UINT8 oldtccr = AVR8_TCCR4B;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR4B;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR4B = data;
@@ -1869,11 +1869,11 @@ void avr8_device::changed_tccr4b(UINT8 data)
}
}
-void avr8_device::changed_tccr4c(UINT8 data)
+void avr8_device::changed_tccr4c(uint8_t data)
{
-// UINT8 oldtccr = AVR8_TCCR4C;
-// UINT8 newtccr = data;
-// UINT8 changed = newtccr ^ oldtccr;
+// uint8_t oldtccr = AVR8_TCCR4C;
+// uint8_t newtccr = data;
+// uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR4C = data;
@@ -1890,8 +1890,8 @@ void avr8_device::timer5_tick()
printf("AVR8_TCCR5A_COM5B: %d\n", AVR8_TCCR5A_COM5B);
#endif
- UINT16 count = (AVR8_TCNT5H << 8) + AVR8_TCNT5L;
- INT32 increment = m_timer_increment[5];
+ uint16_t count = (AVR8_TCNT5H << 8) + AVR8_TCNT5L;
+ int32_t increment = m_timer_increment[5];
switch(AVR8_WGM5)
{
@@ -1964,11 +1964,11 @@ void avr8_device::timer5_tick()
m_r[AVR8_REGIDX_TCNT5L] = count & 0xff;
}
-void avr8_device::changed_tccr5a(UINT8 data)
+void avr8_device::changed_tccr5a(uint8_t data)
{
- UINT8 oldtccr = AVR8_TCCR5A;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR5A;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR5A = data;
@@ -1978,13 +1978,13 @@ void avr8_device::changed_tccr5a(UINT8 data)
}
}
-void avr8_device::changed_tccr5b(UINT8 data)
+void avr8_device::changed_tccr5b(uint8_t data)
{
printf("changed_tccr5b: data=0x%02X\n", data);
- UINT8 oldtccr = AVR8_TCCR5B;
- UINT8 newtccr = data;
- UINT8 changed = newtccr ^ oldtccr;
+ uint8_t oldtccr = AVR8_TCCR5B;
+ uint8_t newtccr = data;
+ uint8_t changed = newtccr ^ oldtccr;
AVR8_TCCR5B = data;
@@ -2049,7 +2049,7 @@ void avr8_device::spi_update_clock_phase()
// TODO
}
-const UINT8 avr8_device::spi_clock_divisor[8] = { 4, 16, 64, 128, 2, 8, 32, 64 };
+const uint8_t avr8_device::spi_clock_divisor[8] = { 4, 16, 64, 128, 2, 8, 32, 64 };
void avr8_device::spi_update_clock_rate()
{
@@ -2057,13 +2057,13 @@ void avr8_device::spi_update_clock_rate()
m_spi_prescale_count &= m_spi_prescale - 1;
}
-void avr8_device::change_spcr(UINT8 data)
+void avr8_device::change_spcr(uint8_t data)
{
- UINT8 oldspcr = AVR8_SPCR;
- UINT8 newspcr = data;
- UINT8 changed = newspcr ^ oldspcr;
- UINT8 high_to_low = ~newspcr & oldspcr;
- UINT8 low_to_high = newspcr & ~oldspcr;
+ uint8_t oldspcr = AVR8_SPCR;
+ uint8_t newspcr = data;
+ uint8_t changed = newspcr ^ oldspcr;
+ uint8_t high_to_low = ~newspcr & oldspcr;
+ uint8_t low_to_high = newspcr & ~oldspcr;
AVR8_SPCR = data;
@@ -2103,11 +2103,11 @@ void avr8_device::change_spcr(UINT8 data)
}
}
-void avr8_device::change_spsr(UINT8 data)
+void avr8_device::change_spsr(uint8_t data)
{
- UINT8 oldspsr = AVR8_SPSR;
- UINT8 newspsr = data;
- UINT8 changed = newspsr ^ oldspsr;
+ uint8_t oldspsr = AVR8_SPSR;
+ uint8_t newspsr = data;
+ uint8_t changed = newspsr ^ oldspsr;
AVR8_SPSR &= ~1;
AVR8_SPSR |= data & 1;
@@ -2296,14 +2296,14 @@ WRITE8_MEMBER( avr8_device::regs_w )
if (data & AVR8_EECR_EERE_MASK)
{
- UINT16 addr = (m_r[AVR8_REGIDX_EEARH] & AVR8_EEARH_MASK) << 8;
+ uint16_t addr = (m_r[AVR8_REGIDX_EEARH] & AVR8_EEARH_MASK) << 8;
addr |= m_r[AVR8_REGIDX_EEARL];
m_r[AVR8_REGIDX_EEDR] = m_eeprom[addr];
if (VERBOSE_LEVEL) printf("EEPROM read @ 0x%04x data = 0x%02x\n", addr, m_eeprom[addr]);
}
if ((data & AVR8_EECR_EEPE_MASK) && (data & AVR8_EECR_EEMPE_MASK))
{
- UINT16 addr = (m_r[AVR8_REGIDX_EEARH] & AVR8_EEARH_MASK) << 8;
+ uint16_t addr = (m_r[AVR8_REGIDX_EEARH] & AVR8_EEARH_MASK) << 8;
addr |= m_r[AVR8_REGIDX_EEARL];
m_eeprom[addr] = m_r[AVR8_REGIDX_EEDR];
if (VERBOSE_LEVEL) printf("EEPROM write @ 0x%04x data = 0x%02x ('%c')\n", addr, m_eeprom[addr], m_eeprom[addr]);
@@ -2931,7 +2931,7 @@ READ8_MEMBER( avr8_device::regs_r )
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 avr8_device::execute_min_cycles() const
+uint32_t avr8_device::execute_min_cycles() const
{
return 1;
}
@@ -2942,7 +2942,7 @@ UINT32 avr8_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 avr8_device::execute_max_cycles() const
+uint32_t avr8_device::execute_max_cycles() const
{
return 4;
}
@@ -2953,7 +2953,7 @@ UINT32 avr8_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 avr8_device::execute_input_lines() const
+uint32_t avr8_device::execute_input_lines() const
{
return 0;
}
@@ -2971,15 +2971,15 @@ void avr8_device::execute_set_input(int inputnum, int state)
void avr8_device::execute_run()
{
- UINT32 op;
- INT32 offs;
- UINT8 rd;
- UINT8 rr;
- UINT8 res;
- UINT16 pd;
- UINT32 pd32;
- INT16 sd;
- INT32 opcycles;
+ uint32_t op;
+ int32_t offs;
+ uint8_t rd;
+ uint8_t rr;
+ uint8_t res;
+ uint16_t pd;
+ uint32_t pd32;
+ int16_t sd;
+ int32_t opcycles;
while (m_icount > 0)
{
@@ -2990,7 +2990,7 @@ void avr8_device::execute_run()
debugger_instruction_hook(this, m_shifted_pc);
- op = (UINT32)m_program->read_word(m_shifted_pc);
+ op = (uint32_t)m_program->read_word(m_shifted_pc);
switch(op & 0xf000)
{
@@ -3004,7 +3004,7 @@ void avr8_device::execute_run()
m_r[RD4(op) << 1] = m_r[RR4(op) << 1];
break;
case 0x0200: // MULS Rd,Rr
- sd = (INT8)m_r[16 + RD4(op)] * (INT8)m_r[16 + RR4(op)];
+ sd = (int8_t)m_r[16 + RD4(op)] * (int8_t)m_r[16 + RR4(op)];
m_r[1] = (sd >> 8) & 0x00ff;
m_r[0] = sd & 0x00ff;
SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0);
@@ -3015,7 +3015,7 @@ void avr8_device::execute_run()
switch(MULCONST2(op))
{
case 0x0000: // MULSU Rd,Rr
- sd = (INT8)m_r[16 + RD3(op)] * (UINT8)m_r[16 + RR3(op)];
+ sd = (int8_t)m_r[16 + RD3(op)] * (uint8_t)m_r[16 + RR3(op)];
m_r[1] = (sd >> 8) & 0x00ff;
m_r[0] = sd & 0x00ff;
SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0);
@@ -3023,7 +3023,7 @@ void avr8_device::execute_run()
opcycles = 2;
break;
case 0x0001: // FMUL Rd,Rr
- sd = (UINT8)m_r[16 + RD3(op)] * (UINT8)m_r[16 + RR3(op)];
+ sd = (uint8_t)m_r[16 + RD3(op)] * (uint8_t)m_r[16 + RR3(op)];
sd <<= 1;
m_r[1] = (sd >> 8) & 0x00ff;
m_r[0] = sd & 0x00ff;
@@ -3032,7 +3032,7 @@ void avr8_device::execute_run()
opcycles = 2;
break;
case 0x0002: // FMULS Rd,Rr
- sd = (INT8)m_r[16 + RD3(op)] * (INT8)m_r[16 + RR3(op)];
+ sd = (int8_t)m_r[16 + RD3(op)] * (int8_t)m_r[16 + RR3(op)];
sd <<= 1;
m_r[1] = (sd >> 8) & 0x00ff;
m_r[0] = sd & 0x00ff;
@@ -3041,7 +3041,7 @@ void avr8_device::execute_run()
opcycles = 2;
break;
case 0x0003: // FMULSU Rd,Rr
- sd = (INT8)m_r[16 + RD3(op)] * (UINT8)m_r[16 + RR3(op)];
+ sd = (int8_t)m_r[16 + RD3(op)] * (uint8_t)m_r[16 + RR3(op)];
sd <<= 1;
m_r[1] = (sd >> 8) & 0x00ff;
m_r[0] = sd & 0x00ff;
@@ -3105,7 +3105,7 @@ void avr8_device::execute_run()
rr = m_r[RR5(op)];
if (rd == rr)
{
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ op = (uint32_t)m_program->read_word(m_shifted_pc + 2);
opcycles += is_long_opcode(op) ? 2 : 1;
m_pc += is_long_opcode(op) ? 2 : 1;
}
@@ -3793,7 +3793,7 @@ void avr8_device::execute_run()
case 0x0900: // SBIC A,b
if(NOT(BIT(m_data->read_byte(32 + ACONST5(op)), RR3(op))))
{
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ op = (uint32_t)m_program->read_word(m_shifted_pc + 2);
opcycles = is_long_opcode(op) ? 3 : 2;
m_pc += is_long_opcode(op) ? 2 : 1;
}
@@ -3805,7 +3805,7 @@ void avr8_device::execute_run()
case 0x0b00: // SBIS A,b
if(BIT(m_data->read_byte(32 + ACONST5(op)), RR3(op)))
{
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ op = (uint32_t)m_program->read_word(m_shifted_pc + 2);
opcycles = is_long_opcode(op) ? 3 : 2;
m_pc += is_long_opcode(op) ? 2 : 1;
}
@@ -3814,7 +3814,7 @@ void avr8_device::execute_run()
case 0x0d00:
case 0x0e00:
case 0x0f00: // MUL Rd,Rr
- sd = (UINT8)m_r[RD5(op)] * (UINT8)m_r[RR5(op)];
+ sd = (uint8_t)m_r[RD5(op)] * (uint8_t)m_r[RR5(op)];
m_r[1] = (sd >> 8) & 0x00ff;
m_r[0] = sd & 0x00ff;
SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0);
@@ -3834,12 +3834,12 @@ void avr8_device::execute_run()
}
break;
case 0xc000: // RJMP k
- offs = (INT32)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff));
+ offs = (int32_t)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff));
m_pc += offs;
opcycles = 2;
break;
case 0xd000: // RCALL k
- offs = (INT32)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff));
+ offs = (int32_t)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff));
push((m_pc + 1) & 0x00ff);
push(((m_pc + 1) >> 8) & 0x00ff);
m_pc += offs;
@@ -3854,7 +3854,7 @@ void avr8_device::execute_run()
case 0x0000: // BRLO through BRIE
if(SREG_R(op & 0x0007))
{
- offs = (INT32)(KCONST7(op));
+ offs = (int32_t)(KCONST7(op));
if(offs & 0x40)
{
offs |= 0xffffff80;
@@ -3866,7 +3866,7 @@ void avr8_device::execute_run()
case 0x0400: // BRSH through BRID
if(SREG_R(op & 0x0007) == 0)
{
- offs = (INT32)(KCONST7(op));
+ offs = (int32_t)(KCONST7(op));
if(offs & 0x40)
{
offs |= 0xffffff80;
@@ -3897,7 +3897,7 @@ void avr8_device::execute_run()
{
if(BIT(m_r[RD5(op)], RR3(op)))
{
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ op = (uint32_t)m_program->read_word(m_shifted_pc + 2);
m_pc += is_long_opcode(op) ? 2 : 1;
opcycles = is_long_opcode(op) ? 3 : 2;
}
@@ -3906,7 +3906,7 @@ void avr8_device::execute_run()
{
if(NOT(BIT(m_r[RD5(op)], RR3(op))))
{
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ op = (uint32_t)m_program->read_word(m_shifted_pc + 2);
m_pc += is_long_opcode(op) ? 2 : 1;
opcycles = is_long_opcode(op) ? 3 : 2;
}
diff --git a/src/devices/cpu/avr8/avr8.h b/src/devices/cpu/avr8/avr8.h
index ea9cf8c8a19..006d052f70c 100644
--- a/src/devices/cpu/avr8/avr8.h
+++ b/src/devices/cpu/avr8/avr8.h
@@ -83,14 +83,14 @@ public:
static void set_eeprom_tag(device_t &device, const char *tag) { downcast<avr8_device &>(device).m_eeprom.set_tag(tag); }
// fuse configs
- void set_low_fuses(UINT8 byte);
- void set_high_fuses(UINT8 byte);
- void set_extended_fuses(UINT8 byte);
- void set_lock_bits(UINT8 byte);
+ void set_low_fuses(uint8_t byte);
+ void set_high_fuses(uint8_t byte);
+ void set_extended_fuses(uint8_t byte);
+ void set_lock_bits(uint8_t byte);
// public interfaces
virtual void update_interrupt(int source);
- UINT64 get_elapsed_cycles()
+ uint64_t get_elapsed_cycles()
{
return m_elapsed_cycles;
}
@@ -98,7 +98,7 @@ public:
// register handling
DECLARE_WRITE8_MEMBER( regs_w );
DECLARE_READ8_MEMBER( regs_r );
- UINT32 m_shifted_pc;
+ uint32_t m_shifted_pc;
protected:
enum
@@ -109,16 +109,16 @@ protected:
CPU_TYPE_ATMEGA2560
};
- avr8_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock, const device_type type, UINT32 address_mask, address_map_constructor internal_map, UINT8 cpu_type, const char *shortname, const char *source);
+ avr8_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t address_mask, address_map_constructor internal_map, uint8_t cpu_type, const char *shortname, const char *source);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -126,9 +126,9 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -137,111 +137,111 @@ protected:
const address_space_config m_program_config;
const address_space_config m_data_config;
const address_space_config m_io_config;
- required_region_ptr<UINT8> m_eeprom;
+ required_region_ptr<uint8_t> m_eeprom;
// bootloader
- UINT16 m_boot_size;
- UINT8 m_cpu_type;
+ uint16_t m_boot_size;
+ uint8_t m_cpu_type;
// Fuses
- UINT8 m_lfuses;
- UINT8 m_hfuses;
- UINT8 m_efuses;
- UINT8 m_lock_bits;
+ uint8_t m_lfuses;
+ uint8_t m_hfuses;
+ uint8_t m_efuses;
+ uint8_t m_lock_bits;
// CPU registers
- UINT32 m_pc;
- UINT8 m_r[0x200];
+ uint32_t m_pc;
+ uint8_t m_r[0x200];
// internal timers
- INT32 m_timer_top[6];
- UINT8 m_timer_increment[6];
- UINT16 m_timer_prescale[6];
- UINT16 m_timer_prescale_count[6];
+ int32_t m_timer_top[6];
+ uint8_t m_timer_increment[6];
+ uint16_t m_timer_prescale[6];
+ uint16_t m_timer_prescale_count[6];
bool m_ocr2_not_reached_yet;
// SPI
bool m_spi_active;
- UINT8 m_spi_prescale;
- UINT8 m_spi_prescale_count;
- INT8 m_spi_prescale_countdown;
- static const UINT8 spi_clock_divisor[8];
+ uint8_t m_spi_prescale;
+ uint8_t m_spi_prescale_count;
+ int8_t m_spi_prescale_countdown;
+ static const uint8_t spi_clock_divisor[8];
void enable_spi();
void disable_spi();
void spi_update_masterslave_select();
void spi_update_clock_polarity();
void spi_update_clock_phase();
void spi_update_clock_rate();
- void change_spcr(UINT8 data);
- void change_spsr(UINT8 data);
+ void change_spcr(uint8_t data);
+ void change_spsr(uint8_t data);
// internal CPU state
- UINT32 m_addr_mask;
+ uint32_t m_addr_mask;
bool m_interrupt_pending;
// other internal states
int m_icount;
- UINT64 m_elapsed_cycles;
+ uint64_t m_elapsed_cycles;
// memory access
- inline void push(UINT8 val);
- inline UINT8 pop();
- inline bool is_long_opcode(UINT16 op);
+ inline void push(uint8_t val);
+ inline uint8_t pop();
+ inline bool is_long_opcode(uint16_t op);
// utility
- void unimplemented_opcode(UINT32 op);
+ void unimplemented_opcode(uint32_t op);
// interrupts
- void set_irq_line(UINT16 vector, int state);
+ void set_irq_line(uint16_t vector, int state);
// timers
void timer_tick(int cycles);
- void update_timer_clock_source(UINT8 timer, UINT8 selection);
- void update_timer_waveform_gen_mode(UINT8 timer, UINT8 mode);
+ void update_timer_clock_source(uint8_t timer, uint8_t selection);
+ void update_timer_waveform_gen_mode(uint8_t timer, uint8_t mode);
// timer 0
void timer0_tick();
- void changed_tccr0a(UINT8 data);
- void changed_tccr0b(UINT8 data);
- void update_ocr0(UINT8 newval, UINT8 reg);
+ void changed_tccr0a(uint8_t data);
+ void changed_tccr0b(uint8_t data);
+ void update_ocr0(uint8_t newval, uint8_t reg);
void timer0_force_output_compare(int reg);
// timer 1
void timer1_tick();
- void changed_tccr1a(UINT8 data);
- void changed_tccr1b(UINT8 data);
+ void changed_tccr1a(uint8_t data);
+ void changed_tccr1b(uint8_t data);
void update_timer1_input_noise_canceler();
void update_timer1_input_edge_select();
- void update_ocr1(UINT16 newval, UINT8 reg);
+ void update_ocr1(uint16_t newval, uint8_t reg);
// timer 2
void timer2_tick();
- void changed_tccr2a(UINT8 data);
- void changed_tccr2b(UINT8 data);
- void update_ocr2(UINT8 newval, UINT8 reg);
+ void changed_tccr2a(uint8_t data);
+ void changed_tccr2b(uint8_t data);
+ void update_ocr2(uint8_t newval, uint8_t reg);
void timer2_force_output_compare(int reg);
// timer 3
void timer3_tick();
- void changed_tccr3a(UINT8 data);
- void changed_tccr3b(UINT8 data);
- void changed_tccr3c(UINT8 data);
-// void update_ocr3(UINT8 newval, UINT8 reg);
+ void changed_tccr3a(uint8_t data);
+ void changed_tccr3b(uint8_t data);
+ void changed_tccr3c(uint8_t data);
+// void update_ocr3(uint8_t newval, uint8_t reg);
// void timer3_force_output_compare(int reg);
// timer 4
void timer4_tick();
- void changed_tccr4a(UINT8 data);
- void changed_tccr4b(UINT8 data);
- void changed_tccr4c(UINT8 data);
- //void update_ocr4(UINT8 newval, UINT8 reg);
+ void changed_tccr4a(uint8_t data);
+ void changed_tccr4b(uint8_t data);
+ void changed_tccr4c(uint8_t data);
+ //void update_ocr4(uint8_t newval, uint8_t reg);
//void timer4_force_output_compare(int reg);
// timer 5
void timer5_tick();
- void changed_tccr5a(UINT8 data);
- void changed_tccr5b(UINT8 data);
-// void update_ocr5(UINT8 newval, UINT8 reg);
+ void changed_tccr5a(uint8_t data);
+ void changed_tccr5b(uint8_t data);
+// void update_ocr5(uint8_t newval, uint8_t reg);
// void timer5_force_output_compare(int reg);
// address spaces
@@ -262,7 +262,7 @@ class atmega88_device : public avr8_device
{
public:
// construction/destruction
- atmega88_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ atmega88_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// ======================> atmega644_device
@@ -271,7 +271,7 @@ class atmega644_device : public avr8_device
{
public:
// construction/destruction
- atmega644_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ atmega644_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void update_interrupt(int source) override;
};
@@ -282,7 +282,7 @@ class atmega1280_device : public avr8_device
{
public:
// construction/destruction
- atmega1280_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ atmega1280_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void update_interrupt(int source) override;
};
@@ -293,7 +293,7 @@ class atmega2560_device : public avr8_device
{
public:
// construction/destruction
- atmega2560_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ atmega2560_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void update_interrupt(int source) override;
};
diff --git a/src/devices/cpu/avr8/avr8dasm.cpp b/src/devices/cpu/avr8/avr8dasm.cpp
index cc5fcecf3a9..c344b4085b2 100644
--- a/src/devices/cpu/avr8/avr8dasm.cpp
+++ b/src/devices/cpu/avr8/avr8dasm.cpp
@@ -19,7 +19,7 @@
#define KCONST6(op) ((((op) >> 2) & 0x0030) | ((op) & 0x000f))
#define KCONST7(op) (((op) >> 3) & 0x007f)
#define KCONST8(op) ((((op) >> 4) & 0x00f0) | ((op) & 0x000f))
-#define KCONST22(op) (((((UINT32)(op) >> 3) & 0x003e) | ((UINT32)(op) & 0x0001)) << 16)
+#define KCONST22(op) (((((uint32_t)(op) >> 3) & 0x003e) | ((uint32_t)(op) & 0x0001)) << 16)
#define QCONST6(op) ((((op) >> 8) & 0x0020) | (((op) >> 7) & 0x0018) | ((op) & 0x0007))
#define ACONST5(op) (((op) >> 3) & 0x001f)
#define ACONST6(op) ((((op) >> 5) & 0x0030) | ((op) & 0x000f))
@@ -29,9 +29,9 @@ CPU_DISASSEMBLE( avr8 )
{
char *output = buffer;
int pos = 0;
- UINT32 op = oprom[pos++];
+ uint32_t op = oprom[pos++];
op |= oprom[pos++] << 8;
- UINT32 addr;
+ uint32_t addr;
const char* register_names[0x40] = {"PINA", "DDRA", "PORTA", "PINB", "DDRB", "PORTB", "PINC", "DDRC", "PORTC", "PIND", "DDRD", "PORTD", "PINE", "DDRE", "PORTE", "PINF", "DDRF", "PORTF", "PING", "DDRG", "PORTG", "TIFR0", "TIFR1", "TIFR2","TIFR3", "TIFR4", "TIFR5", "PCIFR", "EIFR", "EIMSK", "GPIOR0", "EECR", "EEDR", "EEARL", "EEARH", "GTCCR", "TCCR0A", "TCCR0B", "TCNT0", "OCR0A", "OCR0B", "0x29", "GPIOR1", "GPIOR2", "SPCR", "SPSR", "SPDR", "0x2F", "ACSR", "OCDR", "0x32", "SMCR", "MCUSR", "MCUCR", "0x36", "SPMCSR", "0x38", "0x39", "0x3A", "RAMPZ", "EIND", "SPL", "SPH", "SREG"};
const char* register_bit_names[0x40][8] = {
diff --git a/src/devices/cpu/ccpu/ccpu.cpp b/src/devices/cpu/ccpu/ccpu.cpp
index 9758faff4f0..419dcd23061 100644
--- a/src/devices/cpu/ccpu/ccpu.cpp
+++ b/src/devices/cpu/ccpu/ccpu.cpp
@@ -49,7 +49,7 @@ const device_type CCPU = &device_creator<ccpu_cpu_device>;
#define STANDARD_ACC_OP(resexp,cmpval) \
do { \
- UINT16 result = resexp; \
+ uint16_t result = resexp; \
SET_A0; /* set the A0 bit based on the previous 'A' value */ \
SET_CMP_VAL(cmpval); /* set the compare values to the previous accumulator and the cmpval */ \
SET_NC(result); /* set the NC flag based on the unmasked result */ \
@@ -62,7 +62,7 @@ do { \
INITIALIZATION AND SHUTDOWN
***************************************************************************/
-ccpu_cpu_device::ccpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ccpu_cpu_device::ccpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, CCPU, "Cinematronics CPU", tag, owner, clock, "ccpu", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 15, 0)
, m_data_config("data", ENDIANNESS_BIG, 16, 32, -1)
@@ -200,8 +200,8 @@ void ccpu_cpu_device::execute_run()
do
{
- UINT16 tempval;
- UINT8 opcode;
+ uint16_t tempval;
+ uint8_t opcode;
/* update the delayed MI flag */
m_miflag = m_nextmiflag;
@@ -437,7 +437,7 @@ void ccpu_cpu_device::execute_run()
m_I = (m_P << 4) + (opcode & 0x0f);
tempval = RDMEM(m_I);
{
- UINT16 result = *m_acc + (tempval ^ 0xfff) + 1;
+ uint16_t result = *m_acc + (tempval ^ 0xfff) + 1;
SET_A0;
SET_CMP_VAL(tempval);
SET_NC(result);
@@ -469,11 +469,11 @@ void ccpu_cpu_device::execute_run()
/* DV */
case 0xe0:
{
- INT16 stopX = (INT16)(m_A << 4) >> 4;
- INT16 stopY = (INT16)(m_B << 4) >> 4;
+ int16_t stopX = (int16_t)(m_A << 4) >> 4;
+ int16_t stopY = (int16_t)(m_B << 4) >> 4;
- stopX = ((INT16)(stopX - m_X) >> m_T) + m_X;
- stopY = ((INT16)(stopY - m_Y) >> m_T) + m_Y;
+ stopX = ((int16_t)(stopX - m_X) >> m_T) + m_X;
+ stopY = ((int16_t)(stopY - m_Y) >> m_T) + m_Y;
m_vector_callback(m_X, m_Y, stopX, stopY, m_T);
@@ -515,10 +515,10 @@ void ccpu_cpu_device::execute_run()
{
if (m_A & 1)
{
- UINT16 result;
+ uint16_t result;
m_cmpacc = m_B;
m_A = (m_A >> 1) | ((m_B << 11) & 0x800);
- m_B = ((INT16)(m_B << 4) >> 5) & 0xfff;
+ m_B = ((int16_t)(m_B << 4) >> 5) & 0xfff;
result = m_B + tempval;
SET_NC(result);
SET_MI(result);
@@ -526,20 +526,20 @@ void ccpu_cpu_device::execute_run()
}
else
{
- UINT16 result;
+ uint16_t result;
m_cmpacc = m_A;
result = m_A + tempval;
m_A = (m_A >> 1) | ((m_B << 11) & 0x800);
- m_B = ((INT16)(m_B << 4) >> 5) & 0xfff;
+ m_B = ((int16_t)(m_B << 4) >> 5) & 0xfff;
SET_NC(result);
SET_MI(result);
}
}
else
{
- UINT16 result;
+ uint16_t result;
m_cmpacc = m_B;
- m_B = ((INT16)(m_B << 4) >> 5) & 0xfff;
+ m_B = ((int16_t)(m_B << 4) >> 5) & 0xfff;
result = m_B + tempval;
SET_NC(result);
SET_MI(result);
@@ -623,7 +623,7 @@ void ccpu_cpu_device::execute_run()
/* SHR */
case 0xeb:
case 0xfb:
- tempval = ((m_acc == &m_A) ? (m_A >> 1) : ((INT16)(m_B << 4) >> 5)) & 0xfff;
+ tempval = ((m_acc == &m_A) ? (m_A >> 1) : ((int16_t)(m_B << 4) >> 5)) & 0xfff;
tempval |= (*m_acc + (0xb0b | (opcode & 0xf0))) & 0x1000;
STANDARD_ACC_OP(tempval, 0xb0b | (opcode & 0xf0));
NEXT_ACC_A; CYCLES(1);
@@ -641,7 +641,7 @@ void ccpu_cpu_device::execute_run()
/* ASR */
case 0xed:
case 0xfd:
- tempval = ((INT16)(*m_acc << 4) >> 5) & 0xfff;
+ tempval = ((int16_t)(*m_acc << 4) >> 5) & 0xfff;
STANDARD_ACC_OP(tempval, 0xd0d | (opcode & 0xf0));
NEXT_ACC_A; CYCLES(1);
break;
@@ -652,10 +652,10 @@ void ccpu_cpu_device::execute_run()
if (m_acc == &m_A)
{
tempval = (m_A >> 1) | ((m_B << 11) & 0x800);
- m_B = ((INT16)(m_B << 4) >> 5) & 0xfff;
+ m_B = ((int16_t)(m_B << 4) >> 5) & 0xfff;
}
else
- tempval = ((INT16)(m_B << 4) >> 5) & 0xfff;
+ tempval = ((int16_t)(m_B << 4) >> 5) & 0xfff;
tempval |= (*m_acc + (0xe0e | (opcode & 0xf0))) & 0x1000;
STANDARD_ACC_OP(tempval, 0xe0e | (opcode & 0xf0));
NEXT_ACC_A; CYCLES(1);
@@ -678,8 +678,8 @@ void ccpu_cpu_device::execute_run()
/* IV */
case 0xf0:
- m_X = (INT16)(m_A << 4) >> 4;
- m_Y = (INT16)(m_B << 4) >> 4;
+ m_X = (int16_t)(m_A << 4) >> 4;
+ m_Y = (int16_t)(m_B << 4) >> 4;
NEXT_ACC_A; CYCLES(1);
break;
}
@@ -687,7 +687,7 @@ void ccpu_cpu_device::execute_run()
}
-offs_t ccpu_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ccpu_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( ccpu );
return CPU_DISASSEMBLE_NAME(ccpu)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/ccpu/ccpu.h b/src/devices/cpu/ccpu/ccpu.h
index 9247e54f16d..6fff475a3b6 100644
--- a/src/devices/cpu/ccpu/ccpu.h
+++ b/src/devices/cpu/ccpu/ccpu.h
@@ -35,7 +35,7 @@ enum
};
-typedef device_delegate<void (INT16, INT16, INT16, INT16, UINT8)> ccpu_vector_delegate;
+typedef device_delegate<void (int16_t, int16_t, int16_t, int16_t, uint8_t)> ccpu_vector_delegate;
#define MCFG_CCPU_EXTERNAL_FUNC(_devcb) \
@@ -49,7 +49,7 @@ class ccpu_cpu_device : public cpu_device
{
public:
// construction/destruction
- ccpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ccpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_external_func(device_t &device, _Object object) { return downcast<ccpu_cpu_device &>(device).m_external_input.set_callback(object); }
@@ -64,9 +64,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -85,35 +85,35 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 3; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 3; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
- UINT16 m_PC;
- UINT16 m_A;
- UINT16 m_B;
- UINT8 m_I;
- UINT16 m_J;
- UINT8 m_P;
- UINT16 m_X;
- UINT16 m_Y;
- UINT16 m_T;
- UINT16 * m_acc;
-
- UINT16 m_a0flag, m_ncflag, m_cmpacc, m_cmpval;
- UINT16 m_miflag, m_nextmiflag, m_nextnextmiflag;
- UINT16 m_drflag;
+ uint16_t m_PC;
+ uint16_t m_A;
+ uint16_t m_B;
+ uint8_t m_I;
+ uint16_t m_J;
+ uint8_t m_P;
+ uint16_t m_X;
+ uint16_t m_Y;
+ uint16_t m_T;
+ uint16_t * m_acc;
+
+ uint16_t m_a0flag, m_ncflag, m_cmpacc, m_cmpval;
+ uint16_t m_miflag, m_nextmiflag, m_nextnextmiflag;
+ uint16_t m_drflag;
devcb_read8 m_external_input;
ccpu_vector_delegate m_vector_callback;
- UINT8 m_waiting;
- UINT8 m_watchdog;
- UINT8 m_extinput;
+ uint8_t m_waiting;
+ uint8_t m_watchdog;
+ uint8_t m_extinput;
int m_icount;
@@ -122,7 +122,7 @@ protected:
address_space *m_data;
address_space *m_io;
- UINT16 m_flags;
+ uint16_t m_flags;
};
diff --git a/src/devices/cpu/ccpu/ccpudasm.cpp b/src/devices/cpu/ccpu/ccpudasm.cpp
index e1f54d1ec00..9a02ee58d49 100644
--- a/src/devices/cpu/ccpu/ccpudasm.cpp
+++ b/src/devices/cpu/ccpu/ccpudasm.cpp
@@ -17,8 +17,8 @@
CPU_DISASSEMBLE( ccpu )
{
unsigned startpc = pc;
- UINT8 opcode = oprom[pc++ - startpc];
- UINT8 tempval;
+ uint8_t opcode = oprom[pc++ - startpc];
+ uint8_t tempval;
switch (opcode)
{
diff --git a/src/devices/cpu/cop400/cop400.cpp b/src/devices/cpu/cop400/cop400.cpp
index 885f00d34cf..58a5c672a35 100644
--- a/src/devices/cpu/cop400/cop400.cpp
+++ b/src/devices/cpu/cop400/cop400.cpp
@@ -168,7 +168,7 @@ ADDRESS_MAP_END
#endif
-cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, UINT8 program_addr_bits, UINT8 data_addr_bits, UINT8 featuremask, UINT8 g_mask, UINT8 d_mask, UINT8 in_mask, bool has_counter, bool has_inil, address_map_constructor internal_map_program, address_map_constructor internal_map_data)
+cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, uint8_t program_addr_bits, uint8_t data_addr_bits, uint8_t featuremask, uint8_t g_mask, uint8_t d_mask, uint8_t in_mask, bool has_counter, bool has_inil, address_map_constructor internal_map_program, address_map_constructor internal_map_data)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, program_addr_bits, 0, internal_map_program)
, m_data_config("data", ENDIANNESS_LITTLE, 8, data_addr_bits, 0, internal_map_data) // data width is really 4
@@ -230,67 +230,67 @@ cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type
}
}
-cop401_cpu_device::cop401_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop401_cpu_device::cop401_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP401, "COP401", tag, owner, clock, "cop401", __FILE__, 9, 5, COP410_FEATURE, 0xf, 0xf, 0, false, false, nullptr, ADDRESS_MAP_NAME(data_32b))
{
}
-cop410_cpu_device::cop410_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop410_cpu_device::cop410_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP410, "COP410", tag, owner, clock, "cop410", __FILE__, 9, 5, COP410_FEATURE, 0xf, 0xf, 0, false, false, ADDRESS_MAP_NAME(program_512b), ADDRESS_MAP_NAME(data_32b))
{
}
-cop411_cpu_device::cop411_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop411_cpu_device::cop411_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP411, "COP411", tag, owner, clock, "cop411", __FILE__, 9, 5, COP410_FEATURE, 0x7, 0x3, 0, false, false, ADDRESS_MAP_NAME(program_512b), ADDRESS_MAP_NAME(data_32b))
{
}
-cop402_cpu_device::cop402_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop402_cpu_device::cop402_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP402, "COP402", tag, owner, clock, "cop402", __FILE__, 10, 6, COP420_FEATURE, 0xf, 0xf, 0xf, true, true, nullptr, ADDRESS_MAP_NAME(data_64b))
{
}
-cop420_cpu_device::cop420_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop420_cpu_device::cop420_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP420, "COP420", tag, owner, clock, "cop420", __FILE__, 10, 6, COP420_FEATURE, 0xf, 0xf, 0xf, true, true, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{
}
-cop421_cpu_device::cop421_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop421_cpu_device::cop421_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP421, "COP421", tag, owner, clock, "cop421", __FILE__, 10, 6, COP420_FEATURE, 0xf, 0xf, 0, true, false, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{
}
-cop422_cpu_device::cop422_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop422_cpu_device::cop422_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP422, "COP422", tag, owner, clock, "cop422", __FILE__, 10, 6, COP420_FEATURE, 0xe, 0xe, 0, true, false, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{
}
-cop404_cpu_device::cop404_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop404_cpu_device::cop404_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP404, "COP404", tag, owner, clock, "cop404", __FILE__, 11, 7, COP444_FEATURE, 0xf, 0xf, 0xf, true, true, nullptr, ADDRESS_MAP_NAME(data_128b))
{
}
-cop424_cpu_device::cop424_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop424_cpu_device::cop424_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP424, "COP424", tag, owner, clock, "cop424", __FILE__, 10, 6, COP444_FEATURE, 0xf, 0xf, 0xf, true, true, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{
}
-cop425_cpu_device::cop425_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop425_cpu_device::cop425_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP425, "COP425", tag, owner, clock, "cop425", __FILE__, 10, 6, COP444_FEATURE, 0xf, 0xf, 0, true, false, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{
}
-cop426_cpu_device::cop426_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop426_cpu_device::cop426_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP426, "COP426", tag, owner, clock, "cop426", __FILE__, 10, 6, COP444_FEATURE, 0xe, 0xe, 0xf, true, true, ADDRESS_MAP_NAME(program_1kb), ADDRESS_MAP_NAME(data_64b))
{
}
-cop444_cpu_device::cop444_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop444_cpu_device::cop444_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP444, "COP444", tag, owner, clock, "cop444", __FILE__, 11, 7, COP444_FEATURE, 0xf, 0xf, 0xf, true, true, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b))
{
}
-cop445_cpu_device::cop445_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cop445_cpu_device::cop445_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cop400_cpu_device(mconfig, COP445, "COP445", tag, owner, clock, "cop445", __FILE__, 11, 7, COP444_FEATURE, 0x7, 0x3, 0, true, false, ADDRESS_MAP_NAME(program_2kb), ADDRESS_MAP_NAME(data_128b))
{
}
@@ -300,7 +300,7 @@ cop445_cpu_device::cop445_cpu_device(const machine_config &mconfig, const char *
***************************************************************************/
-void cop400_cpu_device::PUSH(UINT16 data)
+void cop400_cpu_device::PUSH(uint16_t data)
{
if (m_featuremask != COP410_FEATURE)
{
@@ -322,7 +322,7 @@ void cop400_cpu_device::POP()
}
}
-void cop400_cpu_device::WRITE_Q(UINT8 data)
+void cop400_cpu_device::WRITE_Q(uint8_t data)
{
Q = data;
@@ -332,7 +332,7 @@ void cop400_cpu_device::WRITE_Q(UINT8 data)
}
}
-void cop400_cpu_device::WRITE_G(UINT8 data)
+void cop400_cpu_device::WRITE_G(uint8_t data)
{
G = data;
@@ -343,7 +343,7 @@ void cop400_cpu_device::WRITE_G(UINT8 data)
OPCODE HANDLERS
***************************************************************************/
-#define INSTRUCTION(mnemonic) void (cop400_cpu_device::mnemonic)(UINT8 opcode)
+#define INSTRUCTION(mnemonic) void (cop400_cpu_device::mnemonic)(uint8_t opcode)
#define INST(mnemonic) &cop400_cpu_device::mnemonic
INSTRUCTION(illegal)
@@ -396,9 +396,9 @@ const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP410_OPCODE_23_M
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) }
};
-void cop400_cpu_device::cop410_op23(UINT8 opcode)
+void cop400_cpu_device::cop410_op23(uint8_t opcode)
{
- UINT8 opcode23 = ROM(PC++);
+ uint8_t opcode23 = ROM(PC++);
(this->*COP410_OPCODE_23_MAP[opcode23].function)(opcode23);
}
@@ -442,9 +442,9 @@ const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP410_OPCODE_33_M
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) }
};
-void cop400_cpu_device::cop410_op33(UINT8 opcode)
+void cop400_cpu_device::cop410_op33(uint8_t opcode)
{
- UINT8 opcode33 = ROM(PC++);
+ uint8_t opcode33 = ROM(PC++);
(this->*COP410_OPCODE_33_MAP[opcode33].function)(opcode33);
}
@@ -527,9 +527,9 @@ const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP420_OPCODE_23_M
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) }
};
-void cop400_cpu_device::cop420_op23(UINT8 opcode)
+void cop400_cpu_device::cop420_op23(uint8_t opcode)
{
- UINT8 opcode23 = ROM(PC++);
+ uint8_t opcode23 = ROM(PC++);
(this->*COP420_OPCODE_23_MAP[opcode23].function)(opcode23);
}
@@ -573,9 +573,9 @@ const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP420_OPCODE_33_M
{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) },{1, INST(illegal) }
};
-void cop400_cpu_device::cop420_op33(UINT8 opcode)
+void cop400_cpu_device::cop420_op33(uint8_t opcode)
{
- UINT8 opcode33 = ROM(PC++);
+ uint8_t opcode33 = ROM(PC++);
(this->*COP420_OPCODE_33_MAP[opcode33].function)(opcode33);
}
@@ -658,9 +658,9 @@ const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP444_OPCODE_23_M
{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },{1, INST(xad) },
};
-void cop400_cpu_device::cop444_op23(UINT8 opcode)
+void cop400_cpu_device::cop444_op23(uint8_t opcode)
{
- UINT8 opcode23 = ROM(PC++);
+ uint8_t opcode23 = ROM(PC++);
(this->*COP444_OPCODE_23_MAP[opcode23].function)(opcode23);
}
@@ -704,9 +704,9 @@ const cop400_cpu_device::cop400_opcode_map cop400_cpu_device::COP444_OPCODE_33_M
{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },{1, INST(lbi) },
};
-void cop400_cpu_device::cop444_op33(UINT8 opcode)
+void cop400_cpu_device::cop444_op33(uint8_t opcode)
{
- UINT8 opcode33 = ROM(PC++);
+ uint8_t opcode33 = ROM(PC++);
(this->*COP444_OPCODE_33_MAP[opcode33].function)(opcode33);
}
@@ -845,7 +845,7 @@ void cop400_cpu_device::counter_tick()
void cop400_cpu_device::inil_tick()
{
- UINT8 in;
+ uint8_t in;
int i;
in = IN_IN();
@@ -1072,7 +1072,7 @@ void cop400_cpu_device::execute_run()
continue;
}
- UINT8 opcode = ROM(PC);
+ uint8_t opcode = ROM(PC);
int inst_cycles = m_opcode_map[opcode].cycles;
PC++;
@@ -1171,7 +1171,7 @@ void cop400_cpu_device::state_string_export(const device_state_entry &entry, std
}
-offs_t cop400_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t cop400_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( cop410 );
extern CPU_DISASSEMBLE( cop420 );
diff --git a/src/devices/cpu/cop400/cop400.h b/src/devices/cpu/cop400/cop400.h
index d5ccef3a4a4..6788d52c2a2 100644
--- a/src/devices/cpu/cop400/cop400.h
+++ b/src/devices/cpu/cop400/cop400.h
@@ -119,7 +119,7 @@ class cop400_cpu_device : public cpu_device
{
public:
// construction/destruction
- cop400_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, UINT8 program_addr_bits, UINT8 data_addr_bits, UINT8 featuremask, UINT8 g_mask, UINT8 d_mask, UINT8 in_mask, bool has_counter, bool has_inil, address_map_constructor internal_map_program, address_map_constructor internal_map_data);
+ cop400_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, uint8_t program_addr_bits, uint8_t data_addr_bits, uint8_t featuremask, uint8_t g_mask, uint8_t d_mask, uint8_t in_mask, bool has_counter, bool has_inil, address_map_constructor internal_map_program, address_map_constructor internal_map_data);
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
@@ -148,11 +148,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + m_cki - 1) / m_cki; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * m_cki); }
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + m_cki - 1) / m_cki; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * m_cki); }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -167,9 +167,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
address_space_config m_data_config;
@@ -197,36 +197,36 @@ protected:
direct_read_data *m_direct;
address_space *m_data;
- UINT8 m_featuremask;
+ uint8_t m_featuremask;
/* registers */
- UINT16 m_pc; /* 9/10/11-bit ROM address program counter */
- UINT16 m_prevpc; /* previous value of program counter */
- UINT8 m_a; /* 4-bit accumulator */
- UINT8 m_b; /* 5/6/7-bit RAM address register */
+ uint16_t m_pc; /* 9/10/11-bit ROM address program counter */
+ uint16_t m_prevpc; /* previous value of program counter */
+ uint8_t m_a; /* 4-bit accumulator */
+ uint8_t m_b; /* 5/6/7-bit RAM address register */
int m_c; /* 1-bit carry register */
- UINT8 m_n; /* 2-bit stack pointer (COP440 only) */
- UINT8 m_en; /* 4-bit enable register */
- UINT8 m_g; /* 4-bit general purpose I/O port */
- UINT8 m_q; /* 8-bit latch for L port */
- UINT16 m_sa, m_sb, m_sc; /* subroutine save registers (not present in COP440) */
- UINT8 m_sio; /* 4-bit shift register and counter */
+ uint8_t m_n; /* 2-bit stack pointer (COP440 only) */
+ uint8_t m_en; /* 4-bit enable register */
+ uint8_t m_g; /* 4-bit general purpose I/O port */
+ uint8_t m_q; /* 8-bit latch for L port */
+ uint16_t m_sa, m_sb, m_sc; /* subroutine save registers (not present in COP440) */
+ uint8_t m_sio; /* 4-bit shift register and counter */
int m_skl; /* 1-bit latch for SK output */
- UINT8 m_h; /* 4-bit general purpose I/O port (COP440 only) */
- UINT8 m_r; /* 8-bit general purpose I/O port (COP440 only) */
- UINT8 m_flags; // used for I/O only
+ uint8_t m_h; /* 4-bit general purpose I/O port (COP440 only) */
+ uint8_t m_r; /* 8-bit general purpose I/O port (COP440 only) */
+ uint8_t m_flags; // used for I/O only
/* counter */
- UINT8 m_t; /* 8-bit timer */
+ uint8_t m_t; /* 8-bit timer */
int m_skt_latch; /* timer overflow latch */
/* input/output ports */
- UINT8 m_g_mask; /* G port mask */
- UINT8 m_d_mask; /* D port mask */
- UINT8 m_in_mask; /* IN port mask */
- UINT8 m_il; /* IN latch */
- UINT8 m_in[4]; /* IN port shift register */
- UINT8 m_si; /* serial input */
+ uint8_t m_g_mask; /* G port mask */
+ uint8_t m_d_mask; /* D port mask */
+ uint8_t m_in_mask; /* IN port mask */
+ uint8_t m_il; /* IN latch */
+ uint8_t m_in[4]; /* IN port shift register */
+ uint8_t m_si; /* serial input */
/* skipping logic */
int m_skip; /* skip next instruction */
@@ -244,11 +244,11 @@ protected:
emu_timer *m_counter_timer;
emu_timer *m_inil_timer;
- typedef void ( cop400_cpu_device::*cop400_opcode_func ) (UINT8 opcode);
+ typedef void ( cop400_cpu_device::*cop400_opcode_func ) (uint8_t opcode);
/* The opcode table now is a combination of cycle counts and function pointers */
struct cop400_opcode_map {
- UINT32 cycles;
+ uint32_t cycles;
cop400_opcode_func function;
};
@@ -268,85 +268,85 @@ protected:
void counter_tick();
void inil_tick();
- void PUSH(UINT16 data);
+ void PUSH(uint16_t data);
void POP();
- void WRITE_Q(UINT8 data);
- void WRITE_G(UINT8 data);
-
- void illegal(UINT8 opcode);
- void asc(UINT8 opcode);
- void add(UINT8 opcode);
- void aisc(UINT8 opcode);
- void clra(UINT8 opcode);
- void comp(UINT8 opcode);
- void nop(UINT8 opcode);
- void rc(UINT8 opcode);
- void sc(UINT8 opcode);
- void xor_(UINT8 opcode);
- void adt(UINT8 opcode);
- void casc(UINT8 opcode);
- void jid(UINT8 opcode);
- void jmp(UINT8 opcode);
- void jp(UINT8 opcode);
- void jsr(UINT8 opcode);
- void ret(UINT8 opcode);
- void cop420_ret(UINT8 opcode);
- void retsk(UINT8 opcode);
- void halt(UINT8 opcode);
- void it(UINT8 opcode);
- void camq(UINT8 opcode);
- void ld(UINT8 opcode);
- void lqid(UINT8 opcode);
- void rmb0(UINT8 opcode);
- void rmb1(UINT8 opcode);
- void rmb2(UINT8 opcode);
- void rmb3(UINT8 opcode);
- void smb0(UINT8 opcode);
- void smb1(UINT8 opcode);
- void smb2(UINT8 opcode);
- void smb3(UINT8 opcode);
- void stii(UINT8 opcode);
- void x(UINT8 opcode);
- void xad(UINT8 opcode);
- void xds(UINT8 opcode);
- void xis(UINT8 opcode);
- void cqma(UINT8 opcode);
- void ldd(UINT8 opcode);
- void camt(UINT8 opcode);
- void ctma(UINT8 opcode);
- void cab(UINT8 opcode);
- void cba(UINT8 opcode);
- void lbi(UINT8 opcode);
- void lei(UINT8 opcode);
- void xabr(UINT8 opcode);
- void cop444_xabr(UINT8 opcode);
- void skc(UINT8 opcode);
- void ske(UINT8 opcode);
- void skgz(UINT8 opcode);
- void skgbz0(UINT8 opcode);
- void skgbz1(UINT8 opcode);
- void skgbz2(UINT8 opcode);
- void skgbz3(UINT8 opcode);
- void skmbz0(UINT8 opcode);
- void skmbz1(UINT8 opcode);
- void skmbz2(UINT8 opcode);
- void skmbz3(UINT8 opcode);
- void skt(UINT8 opcode);
- void ing(UINT8 opcode);
- void inl(UINT8 opcode);
- void obd(UINT8 opcode);
- void omg(UINT8 opcode);
- void xas(UINT8 opcode);
- void inin(UINT8 opcode);
- void cop402m_inin(UINT8 opcode);
- void inil(UINT8 opcode);
- void ogi(UINT8 opcode);
- void cop410_op23(UINT8 opcode);
- void cop410_op33(UINT8 opcode);
- void cop420_op23(UINT8 opcode);
- void cop420_op33(UINT8 opcode);
- void cop444_op23(UINT8 opcode);
- void cop444_op33(UINT8 opcode);
+ void WRITE_Q(uint8_t data);
+ void WRITE_G(uint8_t data);
+
+ void illegal(uint8_t opcode);
+ void asc(uint8_t opcode);
+ void add(uint8_t opcode);
+ void aisc(uint8_t opcode);
+ void clra(uint8_t opcode);
+ void comp(uint8_t opcode);
+ void nop(uint8_t opcode);
+ void rc(uint8_t opcode);
+ void sc(uint8_t opcode);
+ void xor_(uint8_t opcode);
+ void adt(uint8_t opcode);
+ void casc(uint8_t opcode);
+ void jid(uint8_t opcode);
+ void jmp(uint8_t opcode);
+ void jp(uint8_t opcode);
+ void jsr(uint8_t opcode);
+ void ret(uint8_t opcode);
+ void cop420_ret(uint8_t opcode);
+ void retsk(uint8_t opcode);
+ void halt(uint8_t opcode);
+ void it(uint8_t opcode);
+ void camq(uint8_t opcode);
+ void ld(uint8_t opcode);
+ void lqid(uint8_t opcode);
+ void rmb0(uint8_t opcode);
+ void rmb1(uint8_t opcode);
+ void rmb2(uint8_t opcode);
+ void rmb3(uint8_t opcode);
+ void smb0(uint8_t opcode);
+ void smb1(uint8_t opcode);
+ void smb2(uint8_t opcode);
+ void smb3(uint8_t opcode);
+ void stii(uint8_t opcode);
+ void x(uint8_t opcode);
+ void xad(uint8_t opcode);
+ void xds(uint8_t opcode);
+ void xis(uint8_t opcode);
+ void cqma(uint8_t opcode);
+ void ldd(uint8_t opcode);
+ void camt(uint8_t opcode);
+ void ctma(uint8_t opcode);
+ void cab(uint8_t opcode);
+ void cba(uint8_t opcode);
+ void lbi(uint8_t opcode);
+ void lei(uint8_t opcode);
+ void xabr(uint8_t opcode);
+ void cop444_xabr(uint8_t opcode);
+ void skc(uint8_t opcode);
+ void ske(uint8_t opcode);
+ void skgz(uint8_t opcode);
+ void skgbz0(uint8_t opcode);
+ void skgbz1(uint8_t opcode);
+ void skgbz2(uint8_t opcode);
+ void skgbz3(uint8_t opcode);
+ void skmbz0(uint8_t opcode);
+ void skmbz1(uint8_t opcode);
+ void skmbz2(uint8_t opcode);
+ void skmbz3(uint8_t opcode);
+ void skt(uint8_t opcode);
+ void ing(uint8_t opcode);
+ void inl(uint8_t opcode);
+ void obd(uint8_t opcode);
+ void omg(uint8_t opcode);
+ void xas(uint8_t opcode);
+ void inin(uint8_t opcode);
+ void cop402m_inin(uint8_t opcode);
+ void inil(uint8_t opcode);
+ void ogi(uint8_t opcode);
+ void cop410_op23(uint8_t opcode);
+ void cop410_op33(uint8_t opcode);
+ void cop420_op23(uint8_t opcode);
+ void cop420_op33(uint8_t opcode);
+ void cop444_op23(uint8_t opcode);
+ void cop444_op33(uint8_t opcode);
void skgbz(int bit);
void skmbz(int bit);
@@ -359,7 +359,7 @@ class cop401_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop401_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop401_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -367,7 +367,7 @@ class cop410_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop410_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop410_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -376,7 +376,7 @@ class cop411_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop411_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop411_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -386,7 +386,7 @@ class cop402_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop402_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop402_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -394,7 +394,7 @@ class cop420_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop420_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop420_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -403,7 +403,7 @@ class cop421_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop421_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop421_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -412,7 +412,7 @@ class cop422_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop422_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop422_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -422,7 +422,7 @@ class cop404_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop404_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop404_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -431,7 +431,7 @@ class cop424_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop424_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop424_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -440,7 +440,7 @@ class cop425_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop425_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop425_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -449,7 +449,7 @@ class cop426_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop426_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop426_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -457,7 +457,7 @@ class cop444_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop444_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop444_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -466,7 +466,7 @@ class cop445_cpu_device : public cop400_cpu_device
{
public:
// construction/destruction
- cop445_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cop445_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/cop400/cop400op.hxx b/src/devices/cpu/cop400/cop400op.hxx
index 1f1bf1bfade..1c1d5f6f86d 100644
--- a/src/devices/cpu/cop400/cop400op.hxx
+++ b/src/devices/cpu/cop400/cop400op.hxx
@@ -80,7 +80,7 @@ INSTRUCTION( add )
INSTRUCTION( aisc )
{
- UINT8 y = opcode & 0x0f;
+ uint8_t y = opcode & 0x0f;
A = A + y;
@@ -266,7 +266,7 @@ INSTRUCTION( casc )
INSTRUCTION( jid )
{
- UINT16 addr = (PC & 0x700) | (A << 4) | RAM_R(B);
+ uint16_t addr = (PC & 0x700) | (A << 4) | RAM_R(B);
PC = (PC & 0x700) | ROM(addr);
}
@@ -286,7 +286,7 @@ INSTRUCTION( jid )
INSTRUCTION( jmp )
{
- UINT16 a = ((opcode & 0x07) << 8) | ROM(PC);
+ uint16_t a = ((opcode & 0x07) << 8) | ROM(PC);
PC = a;
}
@@ -313,22 +313,22 @@ INSTRUCTION( jmp )
INSTRUCTION( jp )
{
- UINT8 page = PC >> 6;
+ uint8_t page = PC >> 6;
if (page == 2 || page == 3)
{
- UINT8 a = opcode & 0x7f;
+ uint8_t a = opcode & 0x7f;
PC = (PC & 0x780) | a;
}
else if ((opcode & 0xc0) == 0xc0)
{
- UINT8 a = opcode & 0x3f;
+ uint8_t a = opcode & 0x3f;
PC = (PC & 0x7c0) | a;
}
else
{
// JSRP
- UINT8 a = opcode & 0x3f;
+ uint8_t a = opcode & 0x3f;
PUSH(PC);
PC = 0x80 | a;
}
@@ -351,7 +351,7 @@ INSTRUCTION( jp )
INSTRUCTION( jsr )
{
- UINT16 a = ((opcode & 0x07) << 8) | ROM(PC);
+ uint16_t a = ((opcode & 0x07) << 8) | ROM(PC);
PUSH(PC + 1);
PC = a;
@@ -503,7 +503,7 @@ INSTRUCTION( camq )
*/
- UINT8 data = (A << 4) | RAM_R(B);
+ uint8_t data = (A << 4) | RAM_R(B);
WRITE_Q(data);
@@ -530,7 +530,7 @@ INSTRUCTION( camq )
INSTRUCTION( ld )
{
- UINT8 r = opcode & 0x30;
+ uint8_t r = opcode & 0x30;
A = RAM_R(B);
B = B ^ r;
@@ -641,8 +641,8 @@ INSTRUCTION( smb3 ) { RAM_W(B, RAM_R(B) | 0x8); }
INSTRUCTION( stii )
{
- UINT8 y = opcode & 0x0f;
- UINT16 Bd;
+ uint8_t y = opcode & 0x0f;
+ uint16_t Bd;
RAM_W(B, y);
@@ -667,8 +667,8 @@ INSTRUCTION( stii )
INSTRUCTION( x )
{
- UINT8 r = opcode & 0x30;
- UINT8 t = RAM_R(B);
+ uint8_t r = opcode & 0x30;
+ uint8_t t = RAM_R(B);
RAM_W(B, A);
@@ -692,8 +692,8 @@ INSTRUCTION( x )
INSTRUCTION( xad )
{
- UINT8 rd = opcode & 0x7f;
- UINT8 t = A;
+ uint8_t rd = opcode & 0x7f;
+ uint8_t t = A;
A = RAM_R(rd);
@@ -720,8 +720,8 @@ INSTRUCTION( xad )
INSTRUCTION( xds )
{
- UINT8 t, Bd;
- UINT8 r = opcode & 0x30;
+ uint8_t t, Bd;
+ uint8_t r = opcode & 0x30;
t = RAM_R(B);
RAM_W(B, A);
@@ -755,8 +755,8 @@ INSTRUCTION( xds )
INSTRUCTION( xis )
{
- UINT8 t, Bd;
- UINT8 r = opcode & 0x30;
+ uint8_t t, Bd;
+ uint8_t r = opcode & 0x30;
t = RAM_R(B);
RAM_W(B, A);
@@ -806,7 +806,7 @@ INSTRUCTION( cqma )
INSTRUCTION( ldd )
{
- UINT8 rd = opcode & 0x7f;
+ uint8_t rd = opcode & 0x7f;
A = RAM_R(rd);
}
@@ -940,7 +940,7 @@ INSTRUCTION( lbi )
INSTRUCTION( lei )
{
- UINT8 y = opcode & 0x0f;
+ uint8_t y = opcode & 0x0f;
EN = y;
@@ -965,8 +965,8 @@ INSTRUCTION( lei )
INSTRUCTION( xabr )
{
- UINT8 Br = A & 0x03;
- UINT8 Bd = B & 0x0f;
+ uint8_t Br = A & 0x03;
+ uint8_t Bd = B & 0x0f;
A = B >> 4;
B = (Br << 4) + Bd;
@@ -989,8 +989,8 @@ INSTRUCTION( xabr )
INSTRUCTION( cop444_xabr )
{
- UINT8 Br = A & 0x07;
- UINT8 Bd = B & 0x0f;
+ uint8_t Br = A & 0x07;
+ uint8_t Bd = B & 0x0f;
A = B >> 4;
B = (Br << 4) + Bd;
@@ -1174,7 +1174,7 @@ INSTRUCTION( ing )
INSTRUCTION( inl )
{
- UINT8 L = IN_L();
+ uint8_t L = IN_L();
RAM_W(B, L >> 4);
A = L & 0xF;
@@ -1232,7 +1232,7 @@ INSTRUCTION( omg )
INSTRUCTION( xas )
{
- UINT8 t = SIO;
+ uint8_t t = SIO;
SIO = A;
A = t;
@@ -1313,7 +1313,7 @@ INSTRUCTION( inil )
INSTRUCTION( ogi )
{
- UINT8 y = opcode & 0x0f;
+ uint8_t y = opcode & 0x0f;
WRITE_G(y);
}
diff --git a/src/devices/cpu/cop400/cop410ds.cpp b/src/devices/cpu/cop400/cop410ds.cpp
index 638653151d0..fa8f675506e 100644
--- a/src/devices/cpu/cop400/cop410ds.cpp
+++ b/src/devices/cpu/cop400/cop410ds.cpp
@@ -12,29 +12,29 @@
CPU_DISASSEMBLE( cop410 )
{
- UINT8 opcode = oprom[0];
- UINT8 next_opcode = oprom[1];
- UINT16 address;
- UINT32 flags = 0;
+ uint8_t opcode = oprom[0];
+ uint8_t next_opcode = oprom[1];
+ uint16_t address;
+ uint32_t flags = 0;
int bytes = 1;
if ((opcode >= 0x80 && opcode <= 0xBE) || (opcode >= 0xC0 && opcode <= 0xFE))
{
if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3
{
- address = (UINT16)((pc & 0x380) | (opcode & 0x7F));
+ address = (uint16_t)((pc & 0x380) | (opcode & 0x7F));
sprintf(buffer, "JP %x", address);
}
else
{
if ((opcode & 0xC0) == 0xC0) //JP other pages
{
- address = (UINT16)((pc & 0x3C0) | (opcode & 0x3F));
+ address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F));
sprintf(buffer, "JP %x", address);
}
else //JSRP
{
- address = (UINT16)(0x80 | (opcode & 0x3F));
+ address = (uint16_t)(0x80 | (opcode & 0x3F));
sprintf(buffer, "JSRP %x", address);
flags = DASMFLAG_STEP_OVER;
}
@@ -154,7 +154,7 @@ CPU_DISASSEMBLE( cop410 )
if (next_opcode >= 0x80 && next_opcode <= 0xbf)
{
- address = (UINT16)(next_opcode & 0x3F);
+ address = (uint16_t)(next_opcode & 0x3F);
sprintf(buffer, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
}
else
diff --git a/src/devices/cpu/cop400/cop420ds.cpp b/src/devices/cpu/cop400/cop420ds.cpp
index 007b9afc8c6..e1e90eb7130 100644
--- a/src/devices/cpu/cop400/cop420ds.cpp
+++ b/src/devices/cpu/cop400/cop420ds.cpp
@@ -12,29 +12,29 @@
CPU_DISASSEMBLE( cop420 )
{
- UINT8 opcode = oprom[0];
- UINT8 next_opcode = oprom[1];
- UINT16 address;
- UINT32 flags = 0;
+ uint8_t opcode = oprom[0];
+ uint8_t next_opcode = oprom[1];
+ uint16_t address;
+ uint32_t flags = 0;
int bytes = 1;
if ((opcode >= 0x80 && opcode <= 0xBE) || (opcode >= 0xC0 && opcode <= 0xFE))
{
if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3
{
- address = (UINT16)((pc & 0x380) | (opcode & 0x7F));
+ address = (uint16_t)((pc & 0x380) | (opcode & 0x7F));
sprintf(buffer, "JP %x", address);
}
else
{
if ((opcode & 0xC0) == 0xC0) //JP other pages
{
- address = (UINT16)((pc & 0x3C0) | (opcode & 0x3F));
+ address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F));
sprintf(buffer, "JP %x", address);
}
else //JSRP
{
- address = (UINT16)(0x80 | (opcode & 0x3F));
+ address = (uint16_t)(0x80 | (opcode & 0x3F));
sprintf(buffer, "JSRP %x", address);
flags = DASMFLAG_STEP_OVER;
}
@@ -162,12 +162,12 @@ CPU_DISASSEMBLE( cop420 )
if (next_opcode <= 0x3f)
{
- address = (UINT16)(next_opcode & 0x3F);
+ address = (uint16_t)(next_opcode & 0x3F);
sprintf(buffer, "LDD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
}
else if (next_opcode >= 0x80 && next_opcode <= 0xbf)
{
- address = (UINT16)(next_opcode & 0x3F);
+ address = (uint16_t)(next_opcode & 0x3F);
sprintf(buffer, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
}
else
diff --git a/src/devices/cpu/cop400/cop440ds.cpp b/src/devices/cpu/cop400/cop440ds.cpp
index 4af02d3c481..460cf0a4e5b 100644
--- a/src/devices/cpu/cop400/cop440ds.cpp
+++ b/src/devices/cpu/cop400/cop440ds.cpp
@@ -12,29 +12,29 @@
CPU_DISASSEMBLE( cop444 )
{
- UINT8 opcode = oprom[0];
- UINT8 next_opcode = oprom[1];
- UINT16 address;
- UINT32 flags = 0;
+ uint8_t opcode = oprom[0];
+ uint8_t next_opcode = oprom[1];
+ uint16_t address;
+ uint32_t flags = 0;
int bytes = 1;
if ((opcode >= 0x80 && opcode <= 0xBE) || (opcode >= 0xC0 && opcode <= 0xFE))
{
if ((pc & 0x3E0) >= 0x80 && (pc & 0x3E0) < 0x100) //JP pages 2,3
{
- address = (UINT16)((pc & 0x380) | (opcode & 0x7F));
+ address = (uint16_t)((pc & 0x380) | (opcode & 0x7F));
sprintf(buffer, "JP %x", address);
}
else
{
if ((opcode & 0xC0) == 0xC0) //JP other pages
{
- address = (UINT16)((pc & 0x3C0) | (opcode & 0x3F));
+ address = (uint16_t)((pc & 0x3C0) | (opcode & 0x3F));
sprintf(buffer, "JP %x", address);
}
else //JSRP
{
- address = (UINT16)(0x80 | (opcode & 0x3F));
+ address = (uint16_t)(0x80 | (opcode & 0x3F));
sprintf(buffer, "JSRP %x", address);
flags = DASMFLAG_STEP_OVER;
}
@@ -162,12 +162,12 @@ CPU_DISASSEMBLE( cop444 )
if (next_opcode <= 0x3f)
{
- address = (UINT16)(next_opcode & 0x3F);
+ address = (uint16_t)(next_opcode & 0x3F);
sprintf(buffer, "LDD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
}
else if (next_opcode >= 0x80 && next_opcode <= 0xbf)
{
- address = (UINT16)(next_opcode & 0x3F);
+ address = (uint16_t)(next_opcode & 0x3F);
sprintf(buffer, "XAD %x,%x", ((address & 0x30) >> 4),address & 0x0F);
}
else
diff --git a/src/devices/cpu/cosmac/cosdasm.cpp b/src/devices/cpu/cosmac/cosdasm.cpp
index f8f41e2c4ce..ce93110e021 100644
--- a/src/devices/cpu/cosmac/cosdasm.cpp
+++ b/src/devices/cpu/cosmac/cosdasm.cpp
@@ -23,22 +23,22 @@ enum
#define CDP1802_OPCODE(...) \
if (variant < TYPE_1802) sprintf(buffer, "illegal"); else sprintf(buffer, __VA_ARGS__)
-static offs_t implied(const UINT8 opcode)
+static offs_t implied(const uint8_t opcode)
{
return opcode & 0x0f;
}
-static offs_t immediate(const UINT8 **opram)
+static offs_t immediate(const uint8_t **opram)
{
return *(*opram)++;
}
-static offs_t short_branch(offs_t pc, const UINT8 **opram)
+static offs_t short_branch(offs_t pc, const uint8_t **opram)
{
return (pc & 0xff00) | immediate(opram);
}
-static offs_t long_branch(const UINT8 **opram)
+static offs_t long_branch(const uint8_t **opram)
{
return (immediate(opram) << 8) | immediate(opram);
}
@@ -53,13 +53,13 @@ static offs_t long_skip(offs_t pc)
return pc + 3;
}
-static UINT32 disassemble(device_t *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 variant)
+static uint32_t disassemble(device_t *device, char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t variant)
{
- const UINT8 *startram = opram;
- UINT32 flags = 0;
+ const uint8_t *startram = opram;
+ uint32_t flags = 0;
opram++;
- UINT8 opcode = *oprom++;
+ uint8_t opcode = *oprom++;
switch (opcode)
{
diff --git a/src/devices/cpu/cosmac/cosmac.cpp b/src/devices/cpu/cosmac/cosmac.cpp
index f46f6de4dfc..a05d9cd1825 100644
--- a/src/devices/cpu/cosmac/cosmac.cpp
+++ b/src/devices/cpu/cosmac/cosmac.cpp
@@ -160,7 +160,7 @@ const cosmac_device::ophandler cdp1801_device::s_opcodetable[256] =
&cdp1801_device::adi, &cdp1801_device::sdi, &cdp1801_device::und, &cdp1801_device::smi
};
-cosmac_device::ophandler cdp1801_device::get_ophandler(UINT8 opcode)
+cosmac_device::ophandler cdp1801_device::get_ophandler(uint8_t opcode)
{
return s_opcodetable[opcode];
}
@@ -248,7 +248,7 @@ const cosmac_device::ophandler cdp1802_device::s_opcodetable[256] =
&cdp1802_device::adi, &cdp1802_device::sdi, &cdp1802_device::shl, &cdp1802_device::smi
};
-cosmac_device::ophandler cdp1802_device::get_ophandler(UINT8 opcode)
+cosmac_device::ophandler cdp1802_device::get_ophandler(uint8_t opcode)
{
return s_opcodetable[opcode];
}
@@ -268,7 +268,7 @@ const device_type CDP1802 = &device_creator<cdp1802_device>;
// cosmac_device - constructor
//-------------------------------------------------
-cosmac_device::cosmac_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+cosmac_device::cosmac_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_LITTLE, 8, 16),
m_io_config("io", ENDIANNESS_LITTLE, 8, 3),
@@ -301,7 +301,7 @@ cosmac_device::cosmac_device(const machine_config &mconfig, device_type type, co
// cdp1801_device - constructor
//-------------------------------------------------
-cdp1801_device::cdp1801_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cdp1801_device::cdp1801_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cosmac_device(mconfig, CDP1801, "CDP1801", tag, owner, clock, "cdp1801", __FILE__)
{
}
@@ -311,7 +311,7 @@ cdp1801_device::cdp1801_device(const machine_config &mconfig, const char *tag, d
// cdp1802_device - constructor
//-------------------------------------------------
-cdp1802_device::cdp1802_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cdp1802_device::cdp1802_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cosmac_device(mconfig, CDP1802, "CDP1802", tag, owner, clock, "cdp1802", __FILE__)
{
}
@@ -490,7 +490,7 @@ void cosmac_device::state_string_export(const device_state_entry &entry, std::st
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 cosmac_device::disasm_min_opcode_bytes() const
+uint32_t cosmac_device::disasm_min_opcode_bytes() const
{
return 1;
}
@@ -501,7 +501,7 @@ UINT32 cosmac_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 cosmac_device::disasm_max_opcode_bytes() const
+uint32_t cosmac_device::disasm_max_opcode_bytes() const
{
return 3;
}
@@ -512,13 +512,13 @@ UINT32 cosmac_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t cdp1801_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t cdp1801_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( cdp1801 );
return CPU_DISASSEMBLE_NAME( cdp1801 )(this, buffer, pc, oprom, opram, options);
}
-offs_t cdp1802_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t cdp1802_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( cdp1802 );
return CPU_DISASSEMBLE_NAME( cdp1802 )(this, buffer, pc, oprom, opram, options);
@@ -533,7 +533,7 @@ offs_t cdp1802_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *
// read_opcode - read an opcode at the given address
//-------------------------------------------------
-inline UINT8 cosmac_device::read_opcode(offs_t pc)
+inline uint8_t cosmac_device::read_opcode(offs_t pc)
{
return m_direct->read_byte(pc);
}
@@ -543,7 +543,7 @@ inline UINT8 cosmac_device::read_opcode(offs_t pc)
// read_byte - read a byte at the given address
//-------------------------------------------------
-inline UINT8 cosmac_device::read_byte(offs_t address)
+inline uint8_t cosmac_device::read_byte(offs_t address)
{
return m_program->read_byte(address);
}
@@ -554,7 +554,7 @@ inline UINT8 cosmac_device::read_byte(offs_t address)
// address
//-------------------------------------------------
-inline UINT8 cosmac_device::read_io_byte(offs_t address)
+inline uint8_t cosmac_device::read_io_byte(offs_t address)
{
return m_io->read_byte(address);
}
@@ -564,7 +564,7 @@ inline UINT8 cosmac_device::read_io_byte(offs_t address)
// write_byte - write a byte at the given address
//-------------------------------------------------
-inline void cosmac_device::write_byte(offs_t address, UINT8 data)
+inline void cosmac_device::write_byte(offs_t address, uint8_t data)
{
m_program->write_byte(address, data);
}
@@ -575,7 +575,7 @@ inline void cosmac_device::write_byte(offs_t address, UINT8 data)
// address
//-------------------------------------------------
-inline void cosmac_device::write_io_byte(offs_t address, UINT8 data)
+inline void cosmac_device::write_io_byte(offs_t address, uint8_t data)
{
m_io->write_byte(address, data);
}
@@ -601,7 +601,7 @@ offs_t cosmac_device::get_memory_address()
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 cosmac_device::execute_min_cycles() const
+uint32_t cosmac_device::execute_min_cycles() const
{
return 8 * 2;
}
@@ -612,7 +612,7 @@ UINT32 cosmac_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 cosmac_device::execute_max_cycles() const
+uint32_t cosmac_device::execute_max_cycles() const
{
return 8 * 3;
}
@@ -623,7 +623,7 @@ UINT32 cosmac_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 cosmac_device::execute_input_lines() const
+uint32_t cosmac_device::execute_input_lines() const
{
return 7;
}
@@ -1215,7 +1215,7 @@ void cosmac_device::mark()
void cosmac_device::return_from_interrupt(int ie)
{
- UINT8 data = RAM_R(R[X]);
+ uint8_t data = RAM_R(R[X]);
R[X]++;
P = data & 0xf;
X = data >> 4;
diff --git a/src/devices/cpu/cosmac/cosmac.h b/src/devices/cpu/cosmac/cosmac.h
index 31b1d8dc11c..7e4728f918b 100644
--- a/src/devices/cpu/cosmac/cosmac.h
+++ b/src/devices/cpu/cosmac/cosmac.h
@@ -190,7 +190,7 @@ class cosmac_device : public cpu_device
{
public:
// construction/destruction
- cosmac_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ cosmac_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
template<class _Object> static devcb_base &set_wait_rd_callback(device_t &device, _Object object) { return downcast<cosmac_device &>(device).m_read_wait.set_callback(object); }
template<class _Object> static devcb_base &set_clear_rd_callback(device_t &device, _Object object) { return downcast<cosmac_device &>(device).m_read_clear.set_callback(object); }
@@ -220,9 +220,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -235,15 +235,15 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
// helpers
- inline UINT8 read_opcode(offs_t pc);
- inline UINT8 read_byte(offs_t address);
- inline UINT8 read_io_byte(offs_t address);
- inline void write_byte(offs_t address, UINT8 data);
- inline void write_io_byte(offs_t address, UINT8 data);
+ inline uint8_t read_opcode(offs_t pc);
+ inline uint8_t read_byte(offs_t address);
+ inline uint8_t read_io_byte(offs_t address);
+ inline void write_byte(offs_t address, uint8_t data);
+ inline void write_io_byte(offs_t address, uint8_t data);
// execution logic
inline void run();
@@ -403,9 +403,9 @@ protected:
};
// internal state
- UINT16 m_pc; // fake program counter
- UINT8 m_op; // current opcode
- UINT8 m_flagsio; // flags storage for state saving
+ uint16_t m_pc; // fake program counter
+ uint8_t m_op; // current opcode
+ uint8_t m_flagsio; // flags storage for state saving
cosmac_state m_state; // state
cosmac_mode m_mode; // control mode
cosmac_mode m_pmode; // previous control mode
@@ -415,14 +415,14 @@ protected:
int m_ef[4]; // external flags
// registers
- UINT8 m_d; // data register (accumulator)
- UINT8 m_b; // auxiliary holding register
- UINT16 m_r[16]; // scratchpad registers
- UINT8 m_p; // designates which register is Program Counter
- UINT8 m_x; // designates which register is Data Pointer
- UINT8 m_n; // low-order instruction digit
- UINT8 m_i; // high-order instruction digit
- UINT8 m_t; // temporary register
+ uint8_t m_d; // data register (accumulator)
+ uint8_t m_b; // auxiliary holding register
+ uint16_t m_r[16]; // scratchpad registers
+ uint8_t m_p; // designates which register is Program Counter
+ uint8_t m_x; // designates which register is Data Pointer
+ uint8_t m_n; // low-order instruction digit
+ uint8_t m_i; // high-order instruction digit
+ uint8_t m_t; // temporary register
// flags
int m_df; // data flag (ALU carry)
@@ -437,7 +437,7 @@ protected:
// opcode/condition tables
typedef void (cosmac_device::*ophandler)();
- virtual cosmac_device::ophandler get_ophandler(UINT8 opcode) = 0;
+ virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) = 0;
};
@@ -447,13 +447,13 @@ class cdp1801_device : public cosmac_device
{
public:
// construction/destruction
- cdp1801_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cdp1801_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_disasm_interface overrides
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual cosmac_device::ophandler get_ophandler(UINT8 opcode) override;
+ virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) override;
static const ophandler s_opcodetable[256];
};
@@ -465,13 +465,13 @@ class cdp1802_device : public cosmac_device
{
public:
// construction/destruction
- cdp1802_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cdp1802_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_disasm_interface overrides
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual cosmac_device::ophandler get_ophandler(UINT8 opcode) override;
+ virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) override;
static const ophandler s_opcodetable[256];
};
diff --git a/src/devices/cpu/cp1610/1610dasm.cpp b/src/devices/cpu/cp1610/1610dasm.cpp
index 83b2ef018e0..964b1a5e612 100644
--- a/src/devices/cpu/cp1610/1610dasm.cpp
+++ b/src/devices/cpu/cp1610/1610dasm.cpp
@@ -6,9 +6,9 @@
CPU_DISASSEMBLE( cp1610 )
{
- UINT16 oprom16[4]={ static_cast<UINT16>((oprom[0] << 8) | oprom[1]), static_cast<UINT16>((oprom[2] << 8) | oprom[3]), static_cast<UINT16>((oprom[4] << 8) | oprom[5]), static_cast<UINT16>((oprom[6] << 8) | oprom[7]) };
- UINT16 op = oprom16[0]; UINT16 subop;
- UINT16 ea, ea1, ea2;
+ uint16_t oprom16[4]={ static_cast<uint16_t>((oprom[0] << 8) | oprom[1]), static_cast<uint16_t>((oprom[2] << 8) | oprom[3]), static_cast<uint16_t>((oprom[4] << 8) | oprom[5]), static_cast<uint16_t>((oprom[6] << 8) | oprom[7]) };
+ uint16_t op = oprom16[0]; uint16_t subop;
+ uint16_t ea, ea1, ea2;
unsigned size = 1;
// const char *sym, *sym2;
diff --git a/src/devices/cpu/cp1610/cp1610.cpp b/src/devices/cpu/cp1610/cp1610.cpp
index fa3ef8a1d4b..9c2ed837b3b 100644
--- a/src/devices/cpu/cp1610/cp1610.cpp
+++ b/src/devices/cpu/cp1610/cp1610.cpp
@@ -196,7 +196,7 @@ void cp1610_cpu_device::cp1610_comr(int n)
***************************************************/
void cp1610_cpu_device::cp1610_negr(int n)
{
- UINT32 temp;
+ uint32_t temp;
CLR_SZOC;
temp = (m_r[n] ^ 0xffff) + 1;
SET_COV(0,temp,1);
@@ -211,7 +211,7 @@ void cp1610_cpu_device::cp1610_negr(int n)
***************************************************/
void cp1610_cpu_device::cp1610_adcr(int n)
{
- UINT16 offset = 0;
+ uint16_t offset = 0;
if (m_flags & C)
offset = 1;
CLR_SZOC;
@@ -266,7 +266,7 @@ void cp1610_cpu_device::cp1610_rswd(int n)
***************************************************/
void cp1610_cpu_device::cp1610_swap(int r)
{
- UINT8 temp;
+ uint8_t temp;
m_mask_interrupts = 1;
CLR_SZ;
temp = m_r[r] >> 8;
@@ -286,7 +286,7 @@ void cp1610_cpu_device::cp1610_swap(int r)
void cp1610_cpu_device::cp1610_dswap(int r)
{
/* This instruction was not officially supported by GI */
- UINT16 temp;
+ uint16_t temp;
m_mask_interrupts = 1;
CLR_SZ;
temp = m_r[r] & 0xff;
@@ -331,7 +331,7 @@ void cp1610_cpu_device::cp1610_sll_2(int r)
***************************************************/
void cp1610_cpu_device::cp1610_rlc_1(int r)
{
- UINT16 offset = 0;
+ uint16_t offset = 0;
m_mask_interrupts = 1;
if (m_flags & C)
offset = 1;
@@ -349,7 +349,7 @@ void cp1610_cpu_device::cp1610_rlc_1(int r)
***************************************************/
void cp1610_cpu_device::cp1610_rlc_2(int r)
{
- UINT16 offset = 0;
+ uint16_t offset = 0;
m_mask_interrupts = 1;
switch(m_flags & (C | OV))
{
@@ -452,7 +452,7 @@ void cp1610_cpu_device::cp1610_sar_1(int r)
{
m_mask_interrupts = 1;
CLR_SZ;
- m_r[r] = (UINT16)(((INT16)(m_r[r])) >> 1);
+ m_r[r] = (uint16_t)(((int16_t)(m_r[r])) >> 1);
SET_SZ(m_r[r]);
/* S flag is set on bit 7 not bit 15 */
m_flags &= ~S;
@@ -469,7 +469,7 @@ void cp1610_cpu_device::cp1610_sar_2(int r)
{
m_mask_interrupts = 1;
CLR_SZ;
- m_r[r] = (UINT16)(((INT16)(m_r[r])) >> 2);
+ m_r[r] = (uint16_t)(((int16_t)(m_r[r])) >> 2);
SET_SZ(m_r[r]);
/* S flag is set on bit 7 not bit 15 */
m_flags &= ~S;
@@ -484,7 +484,7 @@ void cp1610_cpu_device::cp1610_sar_2(int r)
***************************************************/
void cp1610_cpu_device::cp1610_rrc_1(int r)
{
- UINT16 offset = 0;
+ uint16_t offset = 0;
m_mask_interrupts = 1;
if (m_flags & C)
offset = 0x8000;
@@ -507,7 +507,7 @@ void cp1610_cpu_device::cp1610_rrc_1(int r)
***************************************************/
void cp1610_cpu_device::cp1610_rrc_2(int r)
{
- UINT16 offset = 0;
+ uint16_t offset = 0;
m_mask_interrupts = 1;
if (m_flags & C)
offset |= 0x4000;
@@ -538,7 +538,7 @@ void cp1610_cpu_device::cp1610_sarc_1(int r)
CLR_SZC;
if (m_r[r] & 1)
m_flags |= C;
- m_r[r] = (UINT16)(((INT16)m_r[r]) >> 1);
+ m_r[r] = (uint16_t)(((int16_t)m_r[r]) >> 1);
SET_SZ(m_r[r]);
/* S flag is set on bit 7 not bit 15 */
m_flags &= ~S;
@@ -559,7 +559,7 @@ void cp1610_cpu_device::cp1610_sarc_2(int r)
m_flags |= C;
if (m_r[r] & 2)
m_flags |= OV;
- m_r[r] = (UINT16)(((INT16)m_r[r]) >> 2);
+ m_r[r] = (uint16_t)(((int16_t)m_r[r]) >> 2);
SET_SZ(m_r[r]);
/* S flag is set on bit 7 not bit 15 */
m_flags &= ~S;
@@ -615,7 +615,7 @@ void cp1610_cpu_device::cp1610_addr(int s, int d)
void cp1610_cpu_device::cp1610_subr(int s, int d)
{
CLR_SZOC;
- SET_COV(m_r[d],(UINT32)((m_r[s]^0xffff)+1),1);
+ SET_COV(m_r[d],(uint32_t)((m_r[s]^0xffff)+1),1);
m_r[d] -= m_r[s];
SET_SZ(m_r[d]);
m_icount -= 6;
@@ -627,9 +627,9 @@ void cp1610_cpu_device::cp1610_subr(int s, int d)
***************************************************/
void cp1610_cpu_device::cp1610_cmpr(int s, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZOC;
- SET_COV(m_r[d],(UINT32)((m_r[s]^0xffff)+1),1);
+ SET_COV(m_r[d],(uint32_t)((m_r[s]^0xffff)+1),1);
temp = m_r[d] - m_r[s];
SET_SZ(temp);
m_icount -= 6;
@@ -677,7 +677,7 @@ void cp1610_cpu_device::cp1610_clrr(int d)
***************************************************/
void cp1610_cpu_device::cp1610_b(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
m_r[7] += (offset ^ dir);
m_icount -= 9;
@@ -700,7 +700,7 @@ void cp1610_cpu_device::cp1610_nopp(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bc(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & C)
{
@@ -719,7 +719,7 @@ void cp1610_cpu_device::cp1610_bc(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bnc(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (!(m_flags & C))
{
@@ -738,7 +738,7 @@ void cp1610_cpu_device::cp1610_bnc(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bov(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & OV)
{
@@ -757,7 +757,7 @@ void cp1610_cpu_device::cp1610_bov(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bnov(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (!(m_flags & OV))
{
@@ -776,7 +776,7 @@ void cp1610_cpu_device::cp1610_bnov(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bpl(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (!(m_flags & S))
{
@@ -795,7 +795,7 @@ void cp1610_cpu_device::cp1610_bpl(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bmi(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & S)
{
@@ -814,7 +814,7 @@ void cp1610_cpu_device::cp1610_bmi(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bze(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & Z)
{
@@ -833,7 +833,7 @@ void cp1610_cpu_device::cp1610_bze(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bnze(int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (!(m_flags & Z))
{
@@ -854,7 +854,7 @@ void cp1610_cpu_device::cp1610_blt(int dir)
{
int condition1 = 0;
int condition2 = 0;
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & S) condition1 = 1;
if (m_flags & OV) condition2 = 1;
@@ -877,7 +877,7 @@ void cp1610_cpu_device::cp1610_bge(int dir)
{
int condition1 = 0;
int condition2 = 0;
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & S) condition1 = 1;
if (m_flags & OV) condition2 = 1;
@@ -900,7 +900,7 @@ void cp1610_cpu_device::cp1610_ble(int dir)
{
int condition1 = 0;
int condition2 = 0;
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & S) condition1 = 1;
if (m_flags & OV) condition2 = 1;
@@ -923,7 +923,7 @@ void cp1610_cpu_device::cp1610_bgt(int dir)
{
int condition1 = 0;
int condition2 = 0;
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & S) condition1 = 1;
if (m_flags & OV) condition2 = 1;
@@ -946,7 +946,7 @@ void cp1610_cpu_device::cp1610_busc(int dir)
{
int condition1 = 0;
int condition2 = 0;
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & C) condition1 = 1;
if (m_flags & S) condition2 = 1;
@@ -969,7 +969,7 @@ void cp1610_cpu_device::cp1610_besc(int dir)
{
int condition1 = 0;
int condition2 = 0;
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_flags & C) condition1 = 1;
if (m_flags & S) condition2 = 1;
@@ -990,7 +990,7 @@ void cp1610_cpu_device::cp1610_besc(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_bext(int ext, int dir)
{
- UINT16 offset = cp1610_readop(m_r[7]);
+ uint16_t offset = cp1610_readop(m_r[7]);
m_r[7]++;
if (m_read_bext(ext))
@@ -1010,7 +1010,7 @@ void cp1610_cpu_device::cp1610_besc(int dir)
***************************************************/
void cp1610_cpu_device::cp1610_mvo(int s)
{
- UINT16 addr;
+ uint16_t addr;
m_mask_interrupts = 1;
addr = cp1610_readop(m_r[7]);
m_r[7]++;
@@ -1059,7 +1059,7 @@ void cp1610_cpu_device::cp1610_mvoi(int s)
***************************************************/
void cp1610_cpu_device::cp1610_mvi(int d)
{
- UINT16 addr = cp1610_readop(m_r[7]);
+ uint16_t addr = cp1610_readop(m_r[7]);
m_r[7]++;
m_r[d] = cp1610_readmem16(addr);
m_icount -= 10;
@@ -1081,7 +1081,7 @@ void cp1610_cpu_device::cp1610_mviat(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_mviat_i(int m, int d)
{
- UINT16 temp = cp1610_readmem16(m_r[m]);
+ uint16_t temp = cp1610_readmem16(m_r[m]);
m_r[m]++;
m_r[d] = temp;
m_icount -= 8;
@@ -1104,7 +1104,7 @@ void cp1610_cpu_device::cp1610_pulr(int d)
***************************************************/
void cp1610_cpu_device::cp1610_mvii(int d)
{
- UINT16 temp = cp1610_readop(m_r[7]);
+ uint16_t temp = cp1610_readop(m_r[7]);
m_r[7]++;
m_r[d] = temp;
m_icount -= 8;
@@ -1116,8 +1116,8 @@ void cp1610_cpu_device::cp1610_mvii(int d)
***************************************************/
void cp1610_cpu_device::cp1610_add(int d)
{
- UINT16 addr = cp1610_readop(m_r[7]);
- UINT16 data = cp1610_readmem16(addr);
+ uint16_t addr = cp1610_readop(m_r[7]);
+ uint16_t data = cp1610_readmem16(addr);
m_r[7]++;
CLR_SZOC;
SET_COV(m_r[d],data,0);
@@ -1132,7 +1132,7 @@ void cp1610_cpu_device::cp1610_add(int d)
***************************************************/
void cp1610_cpu_device::cp1610_addat(int m, int d)
{
- UINT16 data = cp1610_readmem16(m_r[m]);
+ uint16_t data = cp1610_readmem16(m_r[m]);
CLR_SZOC;
SET_COV(m_r[d],data,0);
m_r[d] += data;
@@ -1146,7 +1146,7 @@ void cp1610_cpu_device::cp1610_addat(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_addat_i(int m, int d)
{
- UINT16 data = cp1610_readmem16(m_r[m]);
+ uint16_t data = cp1610_readmem16(m_r[m]);
m_r[m]++;
CLR_SZOC;
SET_COV(m_r[d],data,0);
@@ -1161,7 +1161,7 @@ void cp1610_cpu_device::cp1610_addat_i(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_addat_d(int m, int d)
{
- UINT16 data;
+ uint16_t data;
m_r[m]--;
data = cp1610_readmem16(m_r[m]);
CLR_SZOC;
@@ -1177,7 +1177,7 @@ void cp1610_cpu_device::cp1610_addat_d(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_addi(int d)
{
- UINT16 data;
+ uint16_t data;
data = cp1610_readop(m_r[7]);
m_r[7]++;
CLR_SZOC;
@@ -1193,8 +1193,8 @@ void cp1610_cpu_device::cp1610_addi(int d)
***************************************************/
void cp1610_cpu_device::cp1610_sub(int d)
{
- UINT16 addr = cp1610_readop(m_r[7]);
- UINT32 data = cp1610_readmem16(addr);
+ uint16_t addr = cp1610_readop(m_r[7]);
+ uint32_t data = cp1610_readmem16(addr);
m_r[7]++;
CLR_SZOC;
data = (data ^ 0xffff) + 1;
@@ -1211,7 +1211,7 @@ void cp1610_cpu_device::cp1610_sub(int d)
***************************************************/
void cp1610_cpu_device::cp1610_subat(int m, int d)
{
- UINT32 data = cp1610_readmem16(m_r[m]);
+ uint32_t data = cp1610_readmem16(m_r[m]);
CLR_SZOC;
data = (data ^ 0xffff) + 1;
SET_COV(m_r[d],data,1);
@@ -1227,7 +1227,7 @@ void cp1610_cpu_device::cp1610_subat(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_subat_i(int m, int d)
{
- UINT32 data = cp1610_readmem16(m_r[m]);
+ uint32_t data = cp1610_readmem16(m_r[m]);
m_r[m]++;
CLR_SZOC;
data = (data ^ 0xffff) + 1;
@@ -1244,7 +1244,7 @@ void cp1610_cpu_device::cp1610_subat_i(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_subat_d(int m, int d)
{
- UINT32 data;
+ uint32_t data;
m_r[m]--;
data = cp1610_readmem16(m_r[m]);
CLR_SZOC;
@@ -1262,7 +1262,7 @@ void cp1610_cpu_device::cp1610_subat_d(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_subi(int d)
{
- UINT32 data;
+ uint32_t data;
data = cp1610_readop(m_r[7]);
m_r[7]++;
data = (data ^ 0xffff) + 1;
@@ -1280,9 +1280,9 @@ void cp1610_cpu_device::cp1610_subi(int d)
***************************************************/
void cp1610_cpu_device::cp1610_cmp(int d)
{
- UINT16 addr = cp1610_readop(m_r[7]);
- UINT32 data = cp1610_readmem16(addr);
- UINT16 res;
+ uint16_t addr = cp1610_readop(m_r[7]);
+ uint32_t data = cp1610_readmem16(addr);
+ uint16_t res;
m_r[7]++;
CLR_SZOC;
data = (data ^ 0xffff) + 1;
@@ -1299,8 +1299,8 @@ void cp1610_cpu_device::cp1610_cmp(int d)
***************************************************/
void cp1610_cpu_device::cp1610_cmpat(int m, int d)
{
- UINT32 data = cp1610_readmem16(m_r[m]);
- UINT16 res;
+ uint32_t data = cp1610_readmem16(m_r[m]);
+ uint16_t res;
CLR_SZOC;
data = (data ^ 0xffff) + 1;
SET_COV(m_r[d],data,1);
@@ -1316,8 +1316,8 @@ void cp1610_cpu_device::cp1610_cmpat(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_cmpat_i(int m, int d)
{
- UINT32 data = cp1610_readmem16(m_r[m]);
- UINT16 res;
+ uint32_t data = cp1610_readmem16(m_r[m]);
+ uint16_t res;
m_r[m]++;
CLR_SZOC;
data = (data ^ 0xffff) + 1;
@@ -1334,8 +1334,8 @@ void cp1610_cpu_device::cp1610_cmpat_i(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_cmpat_d(int m, int d)
{
- UINT32 data;
- UINT16 res;
+ uint32_t data;
+ uint16_t res;
m_r[m]--;
data = cp1610_readmem16(m_r[m]);
CLR_SZOC;
@@ -1353,8 +1353,8 @@ void cp1610_cpu_device::cp1610_cmpat_d(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_cmpi(int d)
{
- UINT32 data;
- UINT16 res;
+ uint32_t data;
+ uint16_t res;
data = cp1610_readop(m_r[7]);
m_r[7]++;
data = (data ^ 0xffff) + 1;
@@ -1372,8 +1372,8 @@ void cp1610_cpu_device::cp1610_cmpi(int d)
***************************************************/
void cp1610_cpu_device::cp1610_and(int d)
{
- UINT16 addr = cp1610_readop(m_r[7]);
- UINT16 data = cp1610_readmem16(addr);
+ uint16_t addr = cp1610_readop(m_r[7]);
+ uint16_t data = cp1610_readmem16(addr);
m_r[7]++;
CLR_SZ;
m_r[d] &= data;
@@ -1387,7 +1387,7 @@ void cp1610_cpu_device::cp1610_and(int d)
***************************************************/
void cp1610_cpu_device::cp1610_andat(int m, int d)
{
- UINT16 data = cp1610_readmem16(m_r[m]);
+ uint16_t data = cp1610_readmem16(m_r[m]);
CLR_SZ;
m_r[d] &= data;
SET_SZ(m_r[d]);
@@ -1400,7 +1400,7 @@ void cp1610_cpu_device::cp1610_andat(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_andat_i(int m, int d)
{
- UINT16 data = cp1610_readmem16(m_r[m]);
+ uint16_t data = cp1610_readmem16(m_r[m]);
m_r[m]++;
CLR_SZ;
m_r[d] &= data;
@@ -1414,7 +1414,7 @@ void cp1610_cpu_device::cp1610_andat_i(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_andat_d(int m, int d)
{
- UINT16 data;
+ uint16_t data;
m_r[m]--;
data = cp1610_readmem16(m_r[m]);
CLR_SZ;
@@ -1429,7 +1429,7 @@ void cp1610_cpu_device::cp1610_andat_d(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_andi(int d)
{
- UINT16 data;
+ uint16_t data;
data = cp1610_readop(m_r[7]);
m_r[7]++;
CLR_SZ;
@@ -1444,8 +1444,8 @@ void cp1610_cpu_device::cp1610_andi(int d)
***************************************************/
void cp1610_cpu_device::cp1610_xor(int d)
{
- UINT16 addr = cp1610_readop(m_r[7]);
- UINT16 data = cp1610_readmem16(addr);
+ uint16_t addr = cp1610_readop(m_r[7]);
+ uint16_t data = cp1610_readmem16(addr);
m_r[7]++;
CLR_SZ;
m_r[d] ^= data;
@@ -1459,7 +1459,7 @@ void cp1610_cpu_device::cp1610_xor(int d)
***************************************************/
void cp1610_cpu_device::cp1610_xorat(int m, int d)
{
- UINT16 data = cp1610_readmem16(m_r[m]);
+ uint16_t data = cp1610_readmem16(m_r[m]);
CLR_SZ;
m_r[d] ^= data;
SET_SZ(m_r[d]);
@@ -1472,7 +1472,7 @@ void cp1610_cpu_device::cp1610_xorat(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_xorat_i(int m, int d)
{
- UINT16 data = cp1610_readmem16(m_r[m]);
+ uint16_t data = cp1610_readmem16(m_r[m]);
m_r[m]++;
CLR_SZ;
m_r[d] ^= data;
@@ -1486,7 +1486,7 @@ void cp1610_cpu_device::cp1610_xorat_i(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_xorat_d(int m, int d)
{
- UINT16 data;
+ uint16_t data;
m_r[m]--;
data = cp1610_readmem16(m_r[m]);
CLR_SZ;
@@ -1501,7 +1501,7 @@ void cp1610_cpu_device::cp1610_xorat_d(int m, int d)
***************************************************/
void cp1610_cpu_device::cp1610_xori(int d)
{
- UINT16 data;
+ uint16_t data;
data = cp1610_readop(m_r[7]);
m_r[7]++;
CLR_SZ;
@@ -1527,7 +1527,7 @@ void cp1610_cpu_device::cp1610_sdbd_mviat(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_mviat_i(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
temp = cp1610_readmem16(m_r[r]) & 0xff;
m_r[r]++;
m_r[d] = temp;
@@ -1556,7 +1556,7 @@ void cp1610_cpu_device::cp1610_sdbd_mviat_d(int r, int d)
************************************************************************/
void cp1610_cpu_device::cp1610_sdbd_mvii(int d)
{
- UINT16 addr;
+ uint16_t addr;
addr = cp1610_readop(m_r[7]) & 0xff;
m_r[7]++;
addr |= (cp1610_readop(m_r[7]) << 8);
@@ -1571,7 +1571,7 @@ void cp1610_cpu_device::cp1610_sdbd_mvii(int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_addat(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZOC;
temp = cp1610_readmem16(m_r[r]) & 0xff;
temp |= (cp1610_readmem16(m_r[r]) << 8);
@@ -1587,7 +1587,7 @@ void cp1610_cpu_device::cp1610_sdbd_addat(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_addat_i(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZOC;
temp = cp1610_readmem16(m_r[r]) & 0xff;
m_r[r]++;
@@ -1605,7 +1605,7 @@ void cp1610_cpu_device::cp1610_sdbd_addat_i(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_addat_d(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZOC;
m_r[r]--;
temp = cp1610_readmem16(m_r[r]) & 0xff;
@@ -1623,8 +1623,8 @@ void cp1610_cpu_device::cp1610_sdbd_addat_d(int r, int d)
************************************************************************/
void cp1610_cpu_device::cp1610_sdbd_addi(int d)
{
- UINT16 addr;
- UINT16 temp;
+ uint16_t addr;
+ uint16_t temp;
CLR_SZOC;
addr = cp1610_readop(m_r[7]) & 0xff;
m_r[7]++;
@@ -1643,7 +1643,7 @@ void cp1610_cpu_device::cp1610_sdbd_addi(int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_subat(int r, int d)
{
- UINT32 temp;
+ uint32_t temp;
CLR_SZOC;
temp = cp1610_readmem16(m_r[r]) & 0xff;
temp |= (cp1610_readmem16(m_r[r]) << 8);
@@ -1661,7 +1661,7 @@ void cp1610_cpu_device::cp1610_sdbd_subat(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_subat_i(int r, int d)
{
- UINT32 temp;
+ uint32_t temp;
CLR_SZOC;
temp = cp1610_readmem16(m_r[r]) & 0xff;
m_r[r]++;
@@ -1681,7 +1681,7 @@ void cp1610_cpu_device::cp1610_sdbd_subat_i(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_subat_d(int r, int d)
{
- UINT32 temp;
+ uint32_t temp;
CLR_SZOC;
m_r[r]--;
temp = cp1610_readmem16(m_r[r]) & 0xff;
@@ -1701,8 +1701,8 @@ void cp1610_cpu_device::cp1610_sdbd_subat_d(int r, int d)
************************************************************************/
void cp1610_cpu_device::cp1610_sdbd_subi(int d)
{
- UINT16 addr;
- UINT32 temp;
+ uint16_t addr;
+ uint32_t temp;
CLR_SZOC;
addr = cp1610_readop(m_r[7]) & 0xff;
m_r[7]++;
@@ -1723,8 +1723,8 @@ void cp1610_cpu_device::cp1610_sdbd_subi(int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_cmpat(int r, int d)
{
- UINT32 temp;
- UINT16 temp2;
+ uint32_t temp;
+ uint16_t temp2;
CLR_SZOC;
temp = cp1610_readmem16(m_r[r]) & 0xff;
temp |= (cp1610_readmem16(m_r[r]) << 8);
@@ -1742,8 +1742,8 @@ void cp1610_cpu_device::cp1610_sdbd_cmpat(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_cmpat_i(int r, int d)
{
- UINT32 temp;
- UINT16 temp2;
+ uint32_t temp;
+ uint16_t temp2;
CLR_SZOC;
temp = cp1610_readmem16(m_r[r]) & 0xff;
m_r[r]++;
@@ -1763,8 +1763,8 @@ void cp1610_cpu_device::cp1610_sdbd_cmpat_i(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_cmpat_d(int r, int d)
{
- UINT32 temp;
- UINT16 temp2;
+ uint32_t temp;
+ uint16_t temp2;
CLR_SZOC;
m_r[r]--;
temp = cp1610_readmem16(m_r[r]) & 0xff;
@@ -1784,9 +1784,9 @@ void cp1610_cpu_device::cp1610_sdbd_cmpat_d(int r, int d)
************************************************************************/
void cp1610_cpu_device::cp1610_sdbd_cmpi(int d)
{
- UINT16 addr;
- UINT32 temp;
- UINT16 temp2;
+ uint16_t addr;
+ uint32_t temp;
+ uint16_t temp2;
CLR_SZOC;
addr = cp1610_readop(m_r[7]) & 0xff;
m_r[7]++;
@@ -1807,7 +1807,7 @@ void cp1610_cpu_device::cp1610_sdbd_cmpi(int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_andat(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZ;
temp = cp1610_readmem16(m_r[r]) & 0xff;
temp |= (cp1610_readmem16(m_r[r]) << 8);
@@ -1822,7 +1822,7 @@ void cp1610_cpu_device::cp1610_sdbd_andat(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_andat_i(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZ;
temp = cp1610_readmem16(m_r[r]) & 0xff;
m_r[r]++;
@@ -1839,7 +1839,7 @@ void cp1610_cpu_device::cp1610_sdbd_andat_i(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_andat_d(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZ;
m_r[r]--;
temp = cp1610_readmem16(m_r[r]) & 0xff;
@@ -1856,7 +1856,7 @@ void cp1610_cpu_device::cp1610_sdbd_andat_d(int r, int d)
************************************************************************/
void cp1610_cpu_device::cp1610_sdbd_andi(int d)
{
- UINT16 addr;
+ uint16_t addr;
CLR_SZ;
addr = cp1610_readop(m_r[7]) & 0xff;
m_r[7]++;
@@ -1873,7 +1873,7 @@ void cp1610_cpu_device::cp1610_sdbd_andi(int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_xorat(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZ;
temp = cp1610_readmem16(m_r[r]) & 0xff;
temp |= (cp1610_readmem16(m_r[r]) << 8);
@@ -1888,7 +1888,7 @@ void cp1610_cpu_device::cp1610_sdbd_xorat(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_xorat_i(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZ;
temp = cp1610_readmem16(m_r[r]) & 0xff;
m_r[r]++;
@@ -1905,7 +1905,7 @@ void cp1610_cpu_device::cp1610_sdbd_xorat_i(int r, int d)
***************************************************/
void cp1610_cpu_device::cp1610_sdbd_xorat_d(int r, int d)
{
- UINT16 temp;
+ uint16_t temp;
CLR_SZ;
m_r[r]--;
temp = cp1610_readmem16(m_r[r]) & 0xff;
@@ -1922,7 +1922,7 @@ void cp1610_cpu_device::cp1610_sdbd_xorat_d(int r, int d)
************************************************************************/
void cp1610_cpu_device::cp1610_sdbd_xori(int d)
{
- UINT16 addr;
+ uint16_t addr;
CLR_SZ;
addr = cp1610_readop(m_r[7]) & 0xff;
m_r[7]++;
@@ -1937,7 +1937,7 @@ void cp1610_cpu_device::cp1610_sdbd_xori(int d)
* S Z C OV b baa aaa a00 x xxx xxa aaa aaa aaa
* - - - - JSR R1bb, ADDR
***************************************************/
-void cp1610_cpu_device::cp1610_jsr(int r, UINT16 addr)
+void cp1610_cpu_device::cp1610_jsr(int r, uint16_t addr)
{
m_r[r] = m_r[7];
m_r[7] = addr;
@@ -1947,7 +1947,7 @@ void cp1610_cpu_device::cp1610_jsr(int r, UINT16 addr)
* S Z C OV b baa aaa a01 x xxx xxa aaa aaa aaa
* - - - - JSRE R1bb, ADDR
***************************************************/
-void cp1610_cpu_device::cp1610_jsre(int r, UINT16 addr)
+void cp1610_cpu_device::cp1610_jsre(int r, uint16_t addr)
{
m_r[r] = m_r[7];
m_r[7] = addr;
@@ -1958,7 +1958,7 @@ void cp1610_cpu_device::cp1610_jsre(int r, UINT16 addr)
* S Z C OV b baa aaa a10 x xxx xxa aaa aaa aaa
* - - - - JSRD R1bb, ADDR
***************************************************/
-void cp1610_cpu_device::cp1610_jsrd(int r, UINT16 addr)
+void cp1610_cpu_device::cp1610_jsrd(int r, uint16_t addr)
{
m_r[r] = m_r[7];
m_r[7] = addr;
@@ -1969,7 +1969,7 @@ void cp1610_cpu_device::cp1610_jsrd(int r, UINT16 addr)
* S Z C OV 1 1aa aaa a00 x xxx xxa aaa aaa aaa
* - - - - J ADDR
***************************************************/
-void cp1610_cpu_device::cp1610_j(UINT16 addr)
+void cp1610_cpu_device::cp1610_j(uint16_t addr)
{
m_r[7] = addr;
}
@@ -1978,7 +1978,7 @@ void cp1610_cpu_device::cp1610_j(UINT16 addr)
* S Z C OV 1 1aa aaa a01 x xxx xxa aaa aaa aaa
* - - - - JE ADDR
***************************************************/
-void cp1610_cpu_device::cp1610_je(UINT16 addr)
+void cp1610_cpu_device::cp1610_je(uint16_t addr)
{
m_r[7] = addr;
m_intr_enabled = 1;
@@ -1988,7 +1988,7 @@ void cp1610_cpu_device::cp1610_je(UINT16 addr)
* S Z C OV 1 1aa aaa a10 x xxx xxa aaa aaa aaa
* - - - - JD ADDR
***************************************************/
-void cp1610_cpu_device::cp1610_jd(UINT16 addr)
+void cp1610_cpu_device::cp1610_jd(uint16_t addr)
{
m_r[7] = addr;
m_intr_enabled = 0;
@@ -1996,7 +1996,7 @@ void cp1610_cpu_device::cp1610_jd(UINT16 addr)
void cp1610_cpu_device::cp1610_do_sdbd()
{
- UINT16 sdbdtype, dest;
+ uint16_t sdbdtype, dest;
/* Even though SDBD is uninterruptable, we don't need to set the mask bit,
* because we already treat the SDBD prefixed instructions as uninterruptable
@@ -2077,7 +2077,7 @@ void cp1610_cpu_device::cp1610_do_sdbd()
void cp1610_cpu_device::cp1610_do_jumps()
{
- UINT16 jumptype, arg1, arg2, addr;
+ uint16_t jumptype, arg1, arg2, addr;
arg1 = cp1610_readop(m_r[7]);
m_r[7]++;
@@ -2118,7 +2118,7 @@ void cp1610_cpu_device::cp1610_do_jumps()
/* Execute cycles */
void cp1610_cpu_device::execute_run()
{
- UINT16 opcode;
+ uint16_t opcode;
do
{
@@ -3394,7 +3394,7 @@ void cp1610_cpu_device::execute_set_input(int irqline, int state)
}
-cp1610_cpu_device::cp1610_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cp1610_cpu_device::cp1610_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, CP1610, "CP1610", tag, owner, clock, "cp1610", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 16, 16, -1)
, m_read_bext(*this)
@@ -3417,7 +3417,7 @@ void cp1610_cpu_device::state_string_export(const device_state_entry &entry, std
}
-offs_t cp1610_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t cp1610_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( cp1610 );
return CPU_DISASSEMBLE_NAME(cp1610)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/cp1610/cp1610.h b/src/devices/cpu/cp1610/cp1610.h
index 84611f75a2c..fd821b6d8dc 100644
--- a/src/devices/cpu/cp1610/cp1610.h
+++ b/src/devices/cpu/cp1610/cp1610.h
@@ -33,7 +33,7 @@ class cp1610_cpu_device : public cpu_device
{
public:
// construction/destruction
- cp1610_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ cp1610_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
template<class _read> void set_bext_callback(_read rd)
{
@@ -46,9 +46,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 7; }
- virtual UINT32 execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 7; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -59,17 +59,17 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
- UINT16 m_r[8]; /* registers */
- UINT8 m_flags; /* flags */
+ uint16_t m_r[8]; /* registers */
+ uint8_t m_flags; /* flags */
int m_intr_enabled;
- UINT16 m_intr_vector;
+ uint16_t m_intr_vector;
int m_reset_state;
int m_intr_state;
int m_intrm_state;
@@ -197,12 +197,12 @@ private:
void cp1610_sdbd_xorat_i(int r, int d);
void cp1610_sdbd_xorat_d(int r, int d);
void cp1610_sdbd_xori(int d);
- void cp1610_jsr(int r, UINT16 addr);
- void cp1610_jsre(int r, UINT16 addr);
- void cp1610_jsrd(int r, UINT16 addr);
- void cp1610_j(UINT16 addr);
- void cp1610_je(UINT16 addr);
- void cp1610_jd(UINT16 addr);
+ void cp1610_jsr(int r, uint16_t addr);
+ void cp1610_jsre(int r, uint16_t addr);
+ void cp1610_jsrd(int r, uint16_t addr);
+ void cp1610_j(uint16_t addr);
+ void cp1610_je(uint16_t addr);
+ void cp1610_jd(uint16_t addr);
void cp1610_do_sdbd();
void cp1610_do_jumps();
};
diff --git a/src/devices/cpu/cubeqcpu/cubedasm.cpp b/src/devices/cpu/cubeqcpu/cubedasm.cpp
index bbd1c750361..034ac4873b2 100644
--- a/src/devices/cpu/cubeqcpu/cubedasm.cpp
+++ b/src/devices/cpu/cubeqcpu/cubedasm.cpp
@@ -81,9 +81,9 @@ CPU_DISASSEMBLE( cquestsnd )
" ",
};
- UINT64 inst = big_endianize_int64(*(UINT64 *)oprom);
- UINT32 inslow = inst & 0xffffffff;
- UINT32 inshig = inst >> 32;
+ uint64_t inst = big_endianize_int64(*(uint64_t *)oprom);
+ uint32_t inslow = inst & 0xffffffff;
+ uint32_t inshig = inst >> 32;
int t = (inshig >> 24) & 0xff;
int b = (inshig >> 20) & 0xf;
@@ -185,9 +185,9 @@ CPU_DISASSEMBLE( cquestrot )
"??? "
};
- UINT64 inst = big_endianize_int64(*(UINT64 *)oprom);
- UINT32 inslow = inst & 0xffffffff;
- UINT32 inshig = inst >> 32;
+ uint64_t inst = big_endianize_int64(*(uint64_t *)oprom);
+ uint32_t inslow = inst & 0xffffffff;
+ uint32_t inshig = inst >> 32;
int t = (inshig >> 20) & 0xfff;
int jmp = (inshig >> 16) & 0xf;
@@ -271,9 +271,9 @@ CPU_DISASSEMBLE( cquestlin )
"BRES ",
};
- UINT64 inst = big_endianize_int64(*(UINT64 *)oprom);
- UINT32 inslow = inst & 0xffffffff;
- UINT32 inshig = inst >> 32;
+ uint64_t inst = big_endianize_int64(*(uint64_t *)oprom);
+ uint32_t inslow = inst & 0xffffffff;
+ uint32_t inshig = inst >> 32;
int t = (inshig >> 24) & 0xff;
int jmp = (inshig >> 20) & 0xf;
diff --git a/src/devices/cpu/cubeqcpu/cubeqcpu.cpp b/src/devices/cpu/cubeqcpu/cubeqcpu.cpp
index ec286c10570..6939332b647 100644
--- a/src/devices/cpu/cubeqcpu/cubeqcpu.cpp
+++ b/src/devices/cpu/cubeqcpu/cubeqcpu.cpp
@@ -75,7 +75,7 @@ const device_type CQUESTROT = &device_creator<cquestrot_cpu_device>;
const device_type CQUESTLIN = &device_creator<cquestlin_cpu_device>;
-cquestsnd_cpu_device::cquestsnd_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cquestsnd_cpu_device::cquestsnd_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, CQUESTSND, "Cube Quest Sound CPU", tag, owner, clock, "cquestsnd", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 64, 8, -3)
, m_dac_w(*this)
@@ -84,14 +84,14 @@ cquestsnd_cpu_device::cquestsnd_cpu_device(const machine_config &mconfig, const
}
-offs_t cquestsnd_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t cquestsnd_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( cquestsnd );
return CPU_DISASSEMBLE_NAME(cquestsnd)(this, buffer, pc, oprom, opram, options);
}
-cquestrot_cpu_device::cquestrot_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cquestrot_cpu_device::cquestrot_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, CQUESTROT, "Cube Quest Rotate CPU", tag, owner, clock, "cquestrot", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 64, 9, -3)
, m_linedata_w(*this)
@@ -105,14 +105,14 @@ READ16_MEMBER( cquestrot_cpu_device::linedata_r )
}
-offs_t cquestrot_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t cquestrot_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( cquestrot );
return CPU_DISASSEMBLE_NAME(cquestrot)(this, buffer, pc, oprom, opram, options);
}
-cquestlin_cpu_device::cquestlin_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+cquestlin_cpu_device::cquestlin_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, CQUESTLIN, "Cube Quest Line CPU", tag, owner, clock, "cquestlin", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 64, 8, -3)
, m_linedata_r(*this)
@@ -122,7 +122,7 @@ cquestlin_cpu_device::cquestlin_cpu_device(const machine_config &mconfig, const
}
-offs_t cquestlin_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t cquestlin_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( cquestlin );
return CPU_DISASSEMBLE_NAME(cquestlin)(this, buffer, pc, oprom, opram, options);
@@ -169,7 +169,7 @@ void cquestsnd_cpu_device::device_start()
{
m_dac_w.resolve_safe();
assert(m_sound_region_tag != nullptr);
- m_sound_data = (UINT16*)machine().root_device().memregion(m_sound_region_tag)->base();
+ m_sound_data = (uint16_t*)machine().root_device().memregion(m_sound_region_tag)->base();
m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct();
@@ -525,9 +525,9 @@ void cquestsnd_cpu_device::execute_run()
do
{
/* Decode the instruction */
- UINT64 inst = m_direct->read_qword(SND_PC << 3);
- UINT32 inslow = inst & 0xffffffff;
- UINT32 inshig = inst >> 32;
+ uint64_t inst = m_direct->read_qword(SND_PC << 3);
+ uint32_t inslow = inst & 0xffffffff;
+ uint32_t inshig = inst >> 32;
int t = (inshig >> 24) & 0xff;
int b = (inshig >> 20) & 0xf;
@@ -554,12 +554,12 @@ void cquestsnd_cpu_device::execute_run()
/* Handle the AM2901 ALU instruction */
{
- UINT16 r = 0;
- UINT16 s = 0;
+ uint16_t r = 0;
+ uint16_t s = 0;
- UINT32 res = 0;
- UINT32 cflag = 0;
- UINT32 vflag = 0;
+ uint32_t res = 0;
+ uint32_t cflag = 0;
+ uint32_t vflag = 0;
/* Determine the ALU sources */
switch (i2_0)
@@ -632,7 +632,7 @@ void cquestsnd_cpu_device::execute_run()
break;
case RAMQD:
{
- UINT16 qin;
+ uint16_t qin;
m_ram[b] = (_rin ? 0 : 0x8000) | (m_f >> 1);
m_q >>= 1;
@@ -663,7 +663,7 @@ void cquestsnd_cpu_device::execute_run()
/* Now handle any SRAM accesses from the previous cycle */
if (!m_prev_ipram)
{
- UINT16 addr = m_adrlatch | (m_adrcntr & 0x7f);
+ uint16_t addr = m_adrlatch | (m_adrcntr & 0x7f);
if (!m_prev_ipwrt)
m_sram[addr] = m_ramwlatch;
@@ -781,10 +781,10 @@ void cquestrot_cpu_device::execute_run()
do
{
/* Decode the instruction */
- UINT64 inst = m_direct->read_qword(ROT_PC << 3);
+ uint64_t inst = m_direct->read_qword(ROT_PC << 3);
- UINT32 inslow = inst & 0xffffffff;
- UINT32 inshig = inst >> 32;
+ uint32_t inslow = inst & 0xffffffff;
+ uint32_t inshig = inst >> 32;
int t = (inshig >> 20) & 0xfff;
int jmp = (inshig >> 16) & 0xf;
@@ -802,7 +802,7 @@ void cquestrot_cpu_device::execute_run()
int i2_0 = (inslow >> 16) & 0x7;
int dsrclatch;
- UINT16 data_in = 0xffff;
+ uint16_t data_in = 0xffff;
debugger_instruction_hook(this, ROT_PC);
@@ -854,12 +854,12 @@ void cquestrot_cpu_device::execute_run()
/* No do the ALU operation */
{
- UINT16 r = 0;
- UINT16 s = 0;
+ uint16_t r = 0;
+ uint16_t s = 0;
- UINT32 res = 0;
- UINT32 cflag = 0;
- UINT32 vflag = 0;
+ uint32_t res = 0;
+ uint32_t cflag = 0;
+ uint32_t vflag = 0;
/* First, determine correct I1 bit */
if ((spf == SPF_MULT) && !_BIT(m_q, 0))
@@ -943,10 +943,10 @@ void cquestrot_cpu_device::execute_run()
break;
case RAMQD:
{
- UINT16 q0 = m_q & 1;
- UINT16 r0 = m_f & 1;
- UINT16 q15 = 0;
- UINT16 r15 = 0;
+ uint16_t q0 = m_q & 1;
+ uint16_t r0 = m_f & 1;
+ uint16_t q15 = 0;
+ uint16_t r15 = 0;
/* Determine Q15 and RAM15 */
switch (sel)
@@ -970,8 +970,8 @@ void cquestrot_cpu_device::execute_run()
}
case RAMD:
{
- UINT16 r0 = m_f & 1;
- UINT16 r15 = 0;
+ uint16_t r0 = m_f & 1;
+ uint16_t r15 = 0;
switch (sel)
{
@@ -989,10 +989,10 @@ void cquestrot_cpu_device::execute_run()
}
case RAMQU:
{
- UINT16 q15 = BIT(m_q, 15);
- UINT16 r15 = BIT(m_f, 15);
- UINT16 q0 = 0;
- UINT16 r0 = 0;
+ uint16_t q15 = BIT(m_q, 15);
+ uint16_t r15 = BIT(m_f, 15);
+ uint16_t q0 = 0;
+ uint16_t r0 = 0;
switch (sel)
{
@@ -1014,9 +1014,9 @@ void cquestrot_cpu_device::execute_run()
}
case RAMU:
{
- UINT16 q15 = BIT(m_q, 15);
- UINT16 r15 = BIT(m_f, 15);
- UINT16 r0 = 0;
+ uint16_t q15 = BIT(m_q, 15);
+ uint16_t r15 = BIT(m_f, 15);
+ uint16_t r0 = 0;
switch (sel)
{
@@ -1160,13 +1160,13 @@ void cquestlin_cpu_device::cubeqcpu_clear_stack()
}
-UINT8 cquestlin_cpu_device::cubeqcpu_get_ptr_ram_val(int i)
+uint8_t cquestlin_cpu_device::cubeqcpu_get_ptr_ram_val(int i)
{
return m_ptr_ram[((m_field^1) * 256) + i];
}
-UINT32* cquestlin_cpu_device::cubeqcpu_get_stack_ram()
+uint32_t* cquestlin_cpu_device::cubeqcpu_get_stack_ram()
{
if (m_field != ODD_FIELD)
return m_o_stack;
@@ -1179,8 +1179,8 @@ void cquestlin_cpu_device::execute_run()
{
#define LINE_PC ((m_pc[prog] & 0x7f) | ((prog == BACKGROUND) ? 0x80 : 0))
- UINT32 *stack_ram;
- UINT8 *ptr_ram;
+ uint32_t *stack_ram;
+ uint8_t *ptr_ram;
/* Check the field and set the stack/pointer RAM pointers appropriately */
if (m_field == ODD_FIELD)
@@ -1201,10 +1201,10 @@ void cquestlin_cpu_device::execute_run()
int prog = (m_clkcnt & 3) ? BACKGROUND : FOREGROUND;
m_curpc = LINE_PC;
- UINT64 inst = m_direct->read_qword(LINE_PC << 3);
+ uint64_t inst = m_direct->read_qword(LINE_PC << 3);
- UINT32 inslow = inst & 0xffffffff;
- UINT32 inshig = inst >> 32;
+ uint32_t inslow = inst & 0xffffffff;
+ uint32_t inshig = inst >> 32;
int t = (inshig >> 24) & 0xff;
int jmp = (inshig >> 20) & 0xf;
@@ -1219,7 +1219,7 @@ void cquestlin_cpu_device::execute_run()
int _pbcs = (inslow >> 27) & 0x1;
int i2_0 = (inslow >> 24) & 0x7;
- UINT16 data_in = 0;
+ uint16_t data_in = 0;
debugger_instruction_hook(this, m_pc[prog]);
@@ -1247,9 +1247,9 @@ void cquestlin_cpu_device::execute_run()
if (_BIT(m_fglatch, 4) && (m_ycnt < 256))
{
/* 20-bit words */
- UINT32 data;
- UINT16 h = m_xcnt;
- UINT8 v = m_ycnt & 0xff;
+ uint32_t data;
+ uint16_t h = m_xcnt;
+ uint8_t v = m_ycnt & 0xff;
/* Clamp H between 0 and 319 */
if (h >= 320)
@@ -1282,12 +1282,12 @@ void cquestlin_cpu_device::execute_run()
/* Now do the ALU operation */
{
- UINT16 r = 0;
- UINT16 s = 0;
+ uint16_t r = 0;
+ uint16_t s = 0;
- UINT16 res = 0;
- UINT32 cflag = 0;
- UINT32 vflag = 0;
+ uint16_t res = 0;
+ uint32_t cflag = 0;
+ uint32_t vflag = 0;
/* Determine the ALU sources */
switch (i2_0)
@@ -1364,8 +1364,8 @@ void cquestlin_cpu_device::execute_run()
break;
case RAMQD:
{
- UINT16 r11 = (BIT(m_f, 11) ^ m_vflag) ? 0x800 : 0;
- UINT16 q11 = (prog == BACKGROUND) ? 0x800 : 0;
+ uint16_t r11 = (BIT(m_f, 11) ^ m_vflag) ? 0x800 : 0;
+ uint16_t q11 = (prog == BACKGROUND) ? 0x800 : 0;
m_ram[b] = r11 | (m_f >> 1);
m_q = q11 | (m_q >> 1);
@@ -1374,7 +1374,7 @@ void cquestlin_cpu_device::execute_run()
}
case RAMD:
{
- UINT16 r11 = (BIT(m_f, 11) ^ m_vflag) ? 0x800 : 0;
+ uint16_t r11 = (BIT(m_f, 11) ^ m_vflag) ? 0x800 : 0;
m_ram[b] = r11 | (m_f >> 1);
m_y = m_f;
@@ -1383,7 +1383,7 @@ void cquestlin_cpu_device::execute_run()
case RAMQU:
{
/* Determine shift inputs */
- UINT16 r0 = (prog == BACKGROUND);
+ uint16_t r0 = (prog == BACKGROUND);
/* This should never happen - Q0 will be invalid */
m_ram[b] = (m_f << 1) | r0;
@@ -1393,7 +1393,7 @@ void cquestlin_cpu_device::execute_run()
}
case RAMU:
{
- UINT16 r0 = (prog == BACKGROUND);
+ uint16_t r0 = (prog == BACKGROUND);
m_ram[b] = (m_f << 1) | r0;
m_y = m_f;
diff --git a/src/devices/cpu/cubeqcpu/cubeqcpu.h b/src/devices/cpu/cubeqcpu/cubeqcpu.h
index 23bfbf84f5b..824ec9c29b1 100644
--- a/src/devices/cpu/cubeqcpu/cubeqcpu.h
+++ b/src/devices/cpu/cubeqcpu/cubeqcpu.h
@@ -140,7 +140,7 @@ class cquestsnd_cpu_device : public cpu_device
{
public:
// construction/destruction
- cquestsnd_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cquestsnd_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_dac_w(device_t &device, _Object object) { return downcast<cquestsnd_cpu_device &>(device).m_dac_w.set_callback(object); }
@@ -155,46 +155,46 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 8; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 8; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
/* AM2901 internals */
- UINT16 m_ram[16];
- UINT16 m_q;
- UINT16 m_f;
- UINT16 m_y;
- UINT32 m_cflag;
- UINT32 m_vflag;
-
- UINT8 m_pc; /* 2 x LS161 @ 6E, 6F */
- UINT16 m_platch;
- UINT8 m_rtnlatch; /* LS374 @ 5F */
- UINT8 m_adrcntr; /* 2 x LS161 */
- UINT16 m_adrlatch;
- UINT16 m_dinlatch;
- UINT16 m_ramwlatch;
-
- UINT16 m_sram[4096/2];
+ uint16_t m_ram[16];
+ uint16_t m_q;
+ uint16_t m_f;
+ uint16_t m_y;
+ uint32_t m_cflag;
+ uint32_t m_vflag;
+
+ uint8_t m_pc; /* 2 x LS161 @ 6E, 6F */
+ uint16_t m_platch;
+ uint8_t m_rtnlatch; /* LS374 @ 5F */
+ uint8_t m_adrcntr; /* 2 x LS161 */
+ uint16_t m_adrlatch;
+ uint16_t m_dinlatch;
+ uint16_t m_ramwlatch;
+
+ uint16_t m_sram[4096/2];
int m_prev_ipram;
int m_prev_ipwrt;
devcb_write16 m_dac_w;
const char *m_sound_region_tag;
- UINT16 *m_sound_data;
+ uint16_t *m_sound_data;
address_space *m_program;
direct_read_data *m_direct;
@@ -208,7 +208,7 @@ class cquestrot_cpu_device : public cpu_device
{
public:
// construction/destruction
- cquestrot_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cquestrot_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_linedata_w(device_t &device, _Object object) { return downcast<cquestrot_cpu_device &>(device).m_linedata_w.set_callback(object); }
@@ -223,9 +223,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -235,52 +235,52 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 8; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 8; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
devcb_write16 m_linedata_w;
/* AM2901 internals */
- UINT16 m_ram[16];
- UINT16 m_q;
- UINT16 m_f;
- UINT16 m_y;
- UINT32 m_cflag;
- UINT32 m_vflag;
-
- UINT16 m_pc; /* 12-bit, but only 9 used */
- UINT8 m_seqcnt; /* 4-bit counter */
-
- UINT8 m_dsrclatch;
- UINT8 m_rsrclatch;
- UINT16 m_dynaddr; /* LS374 at 2D, 8D */
- UINT16 m_dyndata; /* LS374 at 10B, 9B */
- UINT16 m_yrlatch; /* LS374 at 9D, 10D */
- UINT16 m_ydlatch; /* LS374 at 9C, 10C */
- UINT16 m_dinlatch;
- UINT8 m_divreg; /* LS74 at ? */
-
- UINT16 m_linedata;
- UINT16 m_lineaddr;
-
- UINT16 m_dram[16384]; /* Shared with 68000 */
- UINT16 m_sram[2048]; /* Private */
-
- UINT8 m_prev_dred;
- UINT8 m_prev_dwrt;
- UINT8 m_wc;
- UINT8 m_rc;
- UINT8 m_clkcnt;
+ uint16_t m_ram[16];
+ uint16_t m_q;
+ uint16_t m_f;
+ uint16_t m_y;
+ uint32_t m_cflag;
+ uint32_t m_vflag;
+
+ uint16_t m_pc; /* 12-bit, but only 9 used */
+ uint8_t m_seqcnt; /* 4-bit counter */
+
+ uint8_t m_dsrclatch;
+ uint8_t m_rsrclatch;
+ uint16_t m_dynaddr; /* LS374 at 2D, 8D */
+ uint16_t m_dyndata; /* LS374 at 10B, 9B */
+ uint16_t m_yrlatch; /* LS374 at 9D, 10D */
+ uint16_t m_ydlatch; /* LS374 at 9C, 10C */
+ uint16_t m_dinlatch;
+ uint8_t m_divreg; /* LS74 at ? */
+
+ uint16_t m_linedata;
+ uint16_t m_lineaddr;
+
+ uint16_t m_dram[16384]; /* Shared with 68000 */
+ uint16_t m_sram[2048]; /* Private */
+
+ uint8_t m_prev_dred;
+ uint8_t m_prev_dwrt;
+ uint8_t m_wc;
+ uint8_t m_rc;
+ uint8_t m_clkcnt;
address_space *m_program;
direct_read_data *m_direct;
int m_icount;
// For the debugger
- UINT8 m_flags;
+ uint8_t m_flags;
int do_rotjmp(int jmp);
};
@@ -290,7 +290,7 @@ class cquestlin_cpu_device : public cpu_device
{
public:
// construction/destruction
- cquestlin_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cquestlin_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_linedata_r(device_t &device, _Object object) { return downcast<cquestlin_cpu_device &>(device).m_linedata_r.set_callback(object); }
@@ -298,8 +298,8 @@ public:
DECLARE_WRITE16_MEMBER( linedata_w );
void cubeqcpu_swap_line_banks();
void cubeqcpu_clear_stack();
- UINT8 cubeqcpu_get_ptr_ram_val(int i);
- UINT32* cubeqcpu_get_stack_ram();
+ uint8_t cubeqcpu_get_ptr_ram_val(int i);
+ uint32_t* cubeqcpu_get_stack_ram();
protected:
// device-level overrides
@@ -307,9 +307,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -319,58 +319,58 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 8; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 8; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
devcb_read16 m_linedata_r;
/* 12-bit AM2901 internals */
- UINT16 m_ram[16];
- UINT16 m_q;
- UINT16 m_f;
- UINT16 m_y;
- UINT32 m_cflag;
- UINT32 m_vflag;
+ uint16_t m_ram[16];
+ uint16_t m_q;
+ uint16_t m_f;
+ uint16_t m_y;
+ uint32_t m_cflag;
+ uint32_t m_vflag;
- UINT8 m_pc[2]; /* Two program counters; one for FG, other for BG */
+ uint8_t m_pc[2]; /* Two program counters; one for FG, other for BG */
- UINT16 m_seqcnt; /* 12-bit */
- UINT16 m_clatch; /* LS374 at 9E and 1-bit FF */
- UINT8 m_zlatch; /* LS374 at 4H */
+ uint16_t m_seqcnt; /* 12-bit */
+ uint16_t m_clatch; /* LS374 at 9E and 1-bit FF */
+ uint8_t m_zlatch; /* LS374 at 4H */
- UINT16 m_xcnt;
- UINT16 m_ycnt;
- UINT8 m_sreg;
+ uint16_t m_xcnt;
+ uint16_t m_ycnt;
+ uint8_t m_sreg;
- UINT16 m_fadlatch;
- UINT16 m_badlatch;
+ uint16_t m_fadlatch;
+ uint16_t m_badlatch;
- UINT16 m_sramdlatch;
+ uint16_t m_sramdlatch;
- UINT8 m_fglatch;
- UINT8 m_bglatch;
- UINT8 m_gt0reg;
- UINT8 m_fdxreg;
- UINT32 m_field;
+ uint8_t m_fglatch;
+ uint8_t m_bglatch;
+ uint8_t m_gt0reg;
+ uint8_t m_fdxreg;
+ uint32_t m_field;
- UINT32 m_clkcnt;
+ uint32_t m_clkcnt;
/* RAM */
- UINT16 m_sram[4096]; /* Shared with rotate CPU */
- UINT8 m_ptr_ram[1024]; /* Pointer RAM */
- UINT32 m_e_stack[32768]; /* Stack DRAM: 32kx20 */
- UINT32 m_o_stack[32768]; /* Stack DRAM: 32kx20 */
+ uint16_t m_sram[4096]; /* Shared with rotate CPU */
+ uint8_t m_ptr_ram[1024]; /* Pointer RAM */
+ uint32_t m_e_stack[32768]; /* Stack DRAM: 32kx20 */
+ uint32_t m_o_stack[32768]; /* Stack DRAM: 32kx20 */
address_space *m_program;
direct_read_data *m_direct;
int m_icount;
// For the debugger
- UINT8 m_flags;
- UINT16 m_curpc;
+ uint8_t m_flags;
+ uint16_t m_curpc;
int do_linjmp(int jmp);
};
diff --git a/src/devices/cpu/drcbec.cpp b/src/devices/cpu/drcbec.cpp
index a5437e8dfb1..6ad8085afd6 100644
--- a/src/devices/cpu/drcbec.cpp
+++ b/src/devices/cpu/drcbec.cpp
@@ -179,24 +179,24 @@ enum
#define FDPARAM3 (*inst[3].pdouble)
// compute C and V flags for 32-bit add/subtract
-#define FLAGS32_C_ADD(a,b) ((UINT32)~(a) < (UINT32)(b))
-#define FLAGS32_C_SUB(a,b) ((UINT32)(b) > (UINT32)(a))
+#define FLAGS32_C_ADD(a,b) ((uint32_t)~(a) < (uint32_t)(b))
+#define FLAGS32_C_SUB(a,b) ((uint32_t)(b) > (uint32_t)(a))
#define FLAGS32_V_SUB(r,a,b) (((((a) ^ (b)) & ((a) ^ (r))) >> 30) & FLAG_V)
#define FLAGS32_V_ADD(r,a,b) (((~((a) ^ (b)) & ((a) ^ (r))) >> 30) & FLAG_V)
// compute N and Z flags for 32-bit operations
-#define FLAGS32_NZ(v) ((((v) >> 28) & FLAG_S) | (((UINT32)(v) == 0) << 2))
+#define FLAGS32_NZ(v) ((((v) >> 28) & FLAG_S) | (((uint32_t)(v) == 0) << 2))
#define FLAGS32_NZCV_ADD(r,a,b) (FLAGS32_NZ(r) | FLAGS32_C_ADD(a,b) | FLAGS32_V_ADD(r,a,b))
#define FLAGS32_NZCV_SUB(r,a,b) (FLAGS32_NZ(r) | FLAGS32_C_SUB(a,b) | FLAGS32_V_SUB(r,a,b))
// compute C and V flags for 64-bit add/subtract
-#define FLAGS64_C_ADD(a,b) ((UINT64)~(a) < (UINT64)(b))
-#define FLAGS64_C_SUB(a,b) ((UINT64)(b) > (UINT64)(a))
+#define FLAGS64_C_ADD(a,b) ((uint64_t)~(a) < (uint64_t)(b))
+#define FLAGS64_C_SUB(a,b) ((uint64_t)(b) > (uint64_t)(a))
#define FLAGS64_V_SUB(r,a,b) (((((a) ^ (b)) & ((a) ^ (r))) >> 62) & FLAG_V)
#define FLAGS64_V_ADD(r,a,b) (((~((a) ^ (b)) & ((a) ^ (r))) >> 62) & FLAG_V)
// compute N and Z flags for 64-bit operations
-#define FLAGS64_NZ(v) ((((v) >> 60) & FLAG_S) | (((UINT64)(v) == 0) << 2))
+#define FLAGS64_NZ(v) ((((v) >> 60) & FLAG_S) | (((uint64_t)(v) == 0) << 2))
#define FLAGS64_NZCV_ADD(r,a,b) (FLAGS64_NZ(r) | FLAGS64_C_ADD(a,b) | FLAGS64_V_ADD(r,a,b))
#define FLAGS64_NZCV_SUB(r,a,b) (FLAGS64_NZ(r) | FLAGS64_C_SUB(a,b) | FLAGS64_V_SUB(r,a,b))
@@ -209,17 +209,17 @@ enum
// union to simplify accessing data via the instruction stream
union drcbec_instruction
{
- UINT32 i;
+ uint32_t i;
void * v;
char * c;
- UINT8 * puint8;
- INT8 * pint8;
- UINT16 * puint16;
- INT16 * pint16;
- UINT32 * puint32;
- INT32 * pint32;
- UINT64 * puint64;
- INT64 * pint64;
+ uint8_t * puint8;
+ int8_t * pint8;
+ uint16_t * puint16;
+ int16_t * pint16;
+ uint32_t * puint32;
+ int32_t * pint32;
+ uint64_t * puint64;
+ int64_t * pint64;
float * pfloat;
double * pdouble;
void (*cfunc)(void *);
@@ -235,9 +235,9 @@ union drcbec_instruction
// GLOBAL VARIABLES
//**************************************************************************
-UINT64 drcbe_c::s_immediate_zero = 0;
+uint64_t drcbe_c::s_immediate_zero = 0;
-const UINT32 drcbe_c::s_condition_map[] =
+const uint32_t drcbe_c::s_condition_map[] =
{
/* ..... */ NCBIT | NVBIT | NZBIT | NSBIT | NUBIT | ABIT | GBIT | GEBIT,
/* ....C */ CBIT | NVBIT | NZBIT | NSBIT | NUBIT | BEBIT | GBIT | GEBIT,
@@ -283,7 +283,7 @@ const UINT32 drcbe_c::s_condition_map[] =
// drcbe_c - constructor
//-------------------------------------------------
-drcbe_c::drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
+drcbe_c::drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits)
: drcbe_interface(drcuml, cache, device),
m_hash(cache, modes, addrbits, ignorebits),
m_map(cache, 0),
@@ -318,7 +318,7 @@ void drcbe_c::reset()
// drcbec_generate - generate code
//-------------------------------------------------
-void drcbe_c::generate(drcuml_block &block, const instruction *instlist, UINT32 numinst)
+void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst)
{
// tell all of our utility objects that a block is beginning
m_hash.block_begin(block, instlist, numinst);
@@ -338,7 +338,7 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, UINT32
for (int inum = 0; inum < numinst; inum++)
{
const instruction &inst = instlist[inum];
- UINT8 psize[instruction::MAX_PARAMS];
+ uint8_t psize[instruction::MAX_PARAMS];
// handle most instructions generally, but a few special cases
opcode_t opcode = inst.opcode();
@@ -464,7 +464,7 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, UINT32
// exists in the hash table
//-------------------------------------------------
-bool drcbe_c::hash_exists(UINT32 mode, UINT32 pc)
+bool drcbe_c::hash_exists(uint32_t mode, uint32_t pc)
{
return m_hash.code_exists(mode, pc);
}
@@ -496,14 +496,14 @@ int drcbe_c::execute(code_handle &entry)
// loop while we have cycles
const drcbec_instruction *callstack[32];
const drcbec_instruction *newinst;
- UINT32 temp32;
- UINT64 temp64;
+ uint32_t temp32;
+ uint64_t temp64;
int shift;
- UINT8 flags = 0;
- UINT8 sp = 0;
+ uint8_t flags = 0;
+ uint8_t sp = 0;
while (true)
{
- UINT32 opcode = (inst++)->i;
+ uint32_t opcode = (inst++)->i;
switch (OPCODE_GET_SHORT(opcode))
{
@@ -646,19 +646,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x2, 4, 0): // LOAD dst,base,index,BYTE_x2
- PARAM0 = *(UINT8 *)&inst[1].puint16[PARAM2];
+ PARAM0 = *(uint8_t *)&inst[1].puint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x4, 4, 0): // LOAD dst,base,index,BYTE_x4
- PARAM0 = *(UINT8 *)&inst[1].puint32[PARAM2];
+ PARAM0 = *(uint8_t *)&inst[1].puint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x8, 4, 0): // LOAD dst,base,index,BYTE_x8
- PARAM0 = *(UINT8 *)&inst[1].puint64[PARAM2];
+ PARAM0 = *(uint8_t *)&inst[1].puint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x1, 4, 0): // LOAD dst,base,index,WORD_x1
- PARAM0 = *(UINT16 *)&inst[1].puint8[PARAM2];
+ PARAM0 = *(uint16_t *)&inst[1].puint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2, 4, 0): // LOAD dst,base,index,WORD
@@ -666,19 +666,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x4, 4, 0): // LOAD dst,base,index,WORD_x4
- PARAM0 = *(UINT16 *)&inst[1].puint32[PARAM2];
+ PARAM0 = *(uint16_t *)&inst[1].puint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x8, 4, 0): // LOAD dst,base,index,WORD_x8
- PARAM0 = *(UINT16 *)&inst[1].puint64[PARAM2];
+ PARAM0 = *(uint16_t *)&inst[1].puint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x1, 4, 0): // LOAD dst,base,index,DWORD_x1
- PARAM0 = *(UINT32 *)&inst[1].puint8[PARAM2];
+ PARAM0 = *(uint32_t *)&inst[1].puint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x2, 4, 0): // LOAD dst,base,index,DWORD_x2
- PARAM0 = *(UINT32 *)&inst[1].puint16[PARAM2];
+ PARAM0 = *(uint32_t *)&inst[1].puint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4, 4, 0): // LOAD dst,base,index,DWORD
@@ -686,7 +686,7 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x8, 4, 0): // LOAD dst,base,index,DWORD_x8
- PARAM0 = *(UINT32 *)&inst[1].puint64[PARAM2];
+ PARAM0 = *(uint32_t *)&inst[1].puint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1, 4, 0): // LOADS dst,base,index,BYTE
@@ -694,19 +694,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x2, 4, 0): // LOADS dst,base,index,BYTE_x2
- PARAM0 = *(INT8 *)&inst[1].pint16[PARAM2];
+ PARAM0 = *(int8_t *)&inst[1].pint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x4, 4, 0): // LOADS dst,base,index,BYTE_x4
- PARAM0 = *(INT8 *)&inst[1].pint32[PARAM2];
+ PARAM0 = *(int8_t *)&inst[1].pint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x8, 4, 0): // LOADS dst,base,index,BYTE_x8
- PARAM0 = *(INT8 *)&inst[1].pint64[PARAM2];
+ PARAM0 = *(int8_t *)&inst[1].pint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x1, 4, 0): // LOADS dst,base,index,WORD_x1
- PARAM0 = *(INT16 *)&inst[1].pint8[PARAM2];
+ PARAM0 = *(int16_t *)&inst[1].pint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2, 4, 0): // LOADS dst,base,index,WORD
@@ -714,19 +714,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x4, 4, 0): // LOADS dst,base,index,WORD_x4
- PARAM0 = *(INT16 *)&inst[1].pint32[PARAM2];
+ PARAM0 = *(int16_t *)&inst[1].pint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x8, 4, 0): // LOADS dst,base,index,WORD_x8
- PARAM0 = *(INT16 *)&inst[1].pint64[PARAM2];
+ PARAM0 = *(int16_t *)&inst[1].pint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x1, 4, 0): // LOADS dst,base,index,DWORD_x1
- PARAM0 = *(INT32 *)&inst[1].pint8[PARAM2];
+ PARAM0 = *(int32_t *)&inst[1].pint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x2, 4, 0): // LOADS dst,base,index,DWORD_x2
- PARAM0 = *(INT32 *)&inst[1].pint16[PARAM2];
+ PARAM0 = *(int32_t *)&inst[1].pint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4, 4, 0): // LOADS dst,base,index,DWORD
@@ -734,7 +734,7 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x8, 4, 0): // LOADS dst,base,index,DWORD_x8
- PARAM0 = *(INT32 *)&inst[1].pint64[PARAM2];
+ PARAM0 = *(int32_t *)&inst[1].pint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_STORE1, 4, 0): // STORE dst,base,index,BYTE
@@ -742,19 +742,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_STORE1x2, 4, 0): // STORE dst,base,index,BYTE_x2
- *(UINT8 *)&inst[0].puint16[PARAM1] = PARAM2;
+ *(uint8_t *)&inst[0].puint16[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x4, 4, 0): // STORE dst,base,index,BYTE_x4
- *(UINT8 *)&inst[0].puint32[PARAM1] = PARAM2;
+ *(uint8_t *)&inst[0].puint32[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x8, 4, 0): // STORE dst,base,index,BYTE_x8
- *(UINT8 *)&inst[0].puint64[PARAM1] = PARAM2;
+ *(uint8_t *)&inst[0].puint64[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x1, 4, 0): // STORE dst,base,index,WORD_x1
- *(UINT16 *)&inst[0].puint8[PARAM1] = PARAM2;
+ *(uint16_t *)&inst[0].puint8[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2, 4, 0): // STORE dst,base,index,WORD
@@ -762,19 +762,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_STORE2x4, 4, 0): // STORE dst,base,index,WORD_x4
- *(UINT16 *)&inst[0].puint32[PARAM1] = PARAM2;
+ *(uint16_t *)&inst[0].puint32[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x8, 4, 0): // STORE dst,base,index,WORD_x8
- *(UINT16 *)&inst[0].puint64[PARAM1] = PARAM2;
+ *(uint16_t *)&inst[0].puint64[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x1, 4, 0): // STORE dst,base,index,DWORD_x1
- *(UINT32 *)&inst[0].puint8[PARAM1] = PARAM2;
+ *(uint32_t *)&inst[0].puint8[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x2, 4, 0): // STORE dst,base,index,DWORD_x2
- *(UINT32 *)&inst[0].puint16[PARAM1] = PARAM2;
+ *(uint32_t *)&inst[0].puint16[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4, 4, 0): // STORE dst,base,index,DWORD
@@ -782,7 +782,7 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_STORE4x8, 4, 0): // STORE dst,base,index,DWORD_x8
- *(UINT32 *)&inst[0].puint64[PARAM1] = PARAM2;
+ *(uint32_t *)&inst[0].puint64[PARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_READ1, 4, 0): // READ dst,src1,space_BYTE
@@ -843,21 +843,21 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_SEXT1, 4, 0): // SEXT1 dst,src
- PARAM0 = (INT8)PARAM1;
+ PARAM0 = (int8_t)PARAM1;
break;
case MAKE_OPCODE_SHORT(OP_SEXT1, 4, 1):
- temp32 = (INT8)PARAM1;
+ temp32 = (int8_t)PARAM1;
flags = FLAGS32_NZ(temp32);
PARAM0 = temp32;
break;
case MAKE_OPCODE_SHORT(OP_SEXT2, 4, 0): // SEXT2 dst,src
- PARAM0 = (INT16)PARAM1;
+ PARAM0 = (int16_t)PARAM1;
break;
case MAKE_OPCODE_SHORT(OP_SEXT2, 4, 1):
- temp32 = (INT16)PARAM1;
+ temp32 = (int16_t)PARAM1;
flags = FLAGS32_NZ(temp32);
PARAM0 = temp32;
break;
@@ -933,7 +933,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SUBB, 4, 1):
temp32 = PARAM1 - PARAM2 - (flags & FLAG_C);
- temp64 = (UINT64)PARAM1 - (UINT64)PARAM2 - (UINT64)(flags & FLAG_C);
+ temp64 = (uint64_t)PARAM1 - (uint64_t)PARAM2 - (uint64_t)(flags & FLAG_C);
if (PARAM2 + 1 != 0)
flags = FLAGS32_NZCV_SUB(temp32, PARAM1, PARAM2 + (flags & FLAG_C));
else
@@ -953,41 +953,41 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_MULU, 4, 0): // MULU dst,edst,src1,src2[,f]
- temp64 = (UINT64)(UINT32)PARAM2 * (UINT64)(UINT32)PARAM3;
+ temp64 = (uint64_t)(uint32_t)PARAM2 * (uint64_t)(uint32_t)PARAM3;
PARAM1 = temp64 >> 32;
- PARAM0 = (UINT32)temp64;
+ PARAM0 = (uint32_t)temp64;
break;
case MAKE_OPCODE_SHORT(OP_MULU, 4, 1):
- temp64 = (UINT64)(UINT32)PARAM2 * (UINT64)(UINT32)PARAM3;
+ temp64 = (uint64_t)(uint32_t)PARAM2 * (uint64_t)(uint32_t)PARAM3;
flags = FLAGS64_NZ(temp64);
PARAM1 = temp64 >> 32;
- PARAM0 = (UINT32)temp64;
- if (temp64 != (UINT32)temp64)
+ PARAM0 = (uint32_t)temp64;
+ if (temp64 != (uint32_t)temp64)
flags |= FLAG_V;
break;
case MAKE_OPCODE_SHORT(OP_MULS, 4, 0): // MULS dst,edst,src1,src2[,f]
- temp64 = (INT64)(INT32)PARAM2 * (INT64)(INT32)PARAM3;
+ temp64 = (int64_t)(int32_t)PARAM2 * (int64_t)(int32_t)PARAM3;
PARAM1 = temp64 >> 32;
- PARAM0 = (UINT32)temp64;
+ PARAM0 = (uint32_t)temp64;
break;
case MAKE_OPCODE_SHORT(OP_MULS, 4, 1):
- temp64 = (INT64)(INT32)PARAM2 * (INT64)(INT32)PARAM3;
- temp32 = (INT32)temp64;
+ temp64 = (int64_t)(int32_t)PARAM2 * (int64_t)(int32_t)PARAM3;
+ temp32 = (int32_t)temp64;
flags = FLAGS32_NZ(temp32);
PARAM1 = temp64 >> 32;
- PARAM0 = (UINT32)temp64;
- if (temp64 != (INT32)temp64)
+ PARAM0 = (uint32_t)temp64;
+ if (temp64 != (int32_t)temp64)
flags |= FLAG_V;
break;
case MAKE_OPCODE_SHORT(OP_DIVU, 4, 0): // DIVU dst,edst,src1,src2[,f]
if (PARAM3 != 0)
{
- temp32 = (UINT32)PARAM2 / (UINT32)PARAM3;
- PARAM1 = (UINT32)PARAM2 % (UINT32)PARAM3;
+ temp32 = (uint32_t)PARAM2 / (uint32_t)PARAM3;
+ PARAM1 = (uint32_t)PARAM2 % (uint32_t)PARAM3;
PARAM0 = temp32;
}
break;
@@ -995,8 +995,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_DIVU, 4, 1):
if (PARAM3 != 0)
{
- temp32 = (UINT32)PARAM2 / (UINT32)PARAM3;
- PARAM1 = (UINT32)PARAM2 % (UINT32)PARAM3;
+ temp32 = (uint32_t)PARAM2 / (uint32_t)PARAM3;
+ PARAM1 = (uint32_t)PARAM2 % (uint32_t)PARAM3;
flags = FLAGS32_NZ(temp32);
PARAM0 = temp32;
}
@@ -1007,8 +1007,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_DIVS, 4, 0): // DIVS dst,edst,src1,src2[,f]
if (PARAM3 != 0)
{
- temp32 = (INT32)PARAM2 / (INT32)PARAM3;
- PARAM1 = (INT32)PARAM2 % (INT32)PARAM3;
+ temp32 = (int32_t)PARAM2 / (int32_t)PARAM3;
+ PARAM1 = (int32_t)PARAM2 % (int32_t)PARAM3;
PARAM0 = temp32;
}
break;
@@ -1016,8 +1016,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_DIVS, 4, 1):
if (PARAM3 != 0)
{
- temp32 = (INT32)PARAM2 / (INT32)PARAM3;
- PARAM1 = (INT32)PARAM2 % (INT32)PARAM3;
+ temp32 = (int32_t)PARAM2 / (int32_t)PARAM3;
+ PARAM1 = (int32_t)PARAM2 % (int32_t)PARAM3;
flags = FLAGS32_NZ(temp32);
PARAM0 = temp32;
}
@@ -1122,12 +1122,12 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_SAR, 4, 0): // SAR dst,src,count[,f]
- PARAM0 = (INT32)PARAM1 >> (PARAM2 & 31);
+ PARAM0 = (int32_t)PARAM1 >> (PARAM2 & 31);
break;
case MAKE_OPCODE_SHORT(OP_SAR, 4, 1):
shift = PARAM2 & 31;
- temp32 = (INT32)PARAM1 >> shift;
+ temp32 = (int32_t)PARAM1 >> shift;
if (shift != 0)
{
flags = FLAGS32_NZ(temp32);
@@ -1215,19 +1215,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x2, 8, 0): // DLOAD dst,base,index,BYTE_x2
- DPARAM0 = *(UINT8 *)&inst[1].puint16[PARAM2];
+ DPARAM0 = *(uint8_t *)&inst[1].puint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x4, 8, 0): // DLOAD dst,base,index,BYTE_x4
- DPARAM0 = *(UINT8 *)&inst[1].puint32[PARAM2];
+ DPARAM0 = *(uint8_t *)&inst[1].puint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x8, 8, 0): // DLOAD dst,base,index,BYTE_x8
- DPARAM0 = *(UINT8 *)&inst[1].puint64[PARAM2];
+ DPARAM0 = *(uint8_t *)&inst[1].puint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x1, 8, 0): // DLOAD dst,base,index,WORD_x1
- DPARAM0 = *(UINT16 *)&inst[1].puint8[PARAM2];
+ DPARAM0 = *(uint16_t *)&inst[1].puint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2, 8, 0): // DLOAD dst,base,index,WORD
@@ -1235,19 +1235,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x4, 8, 0): // DLOAD dst,base,index,WORD_x4
- DPARAM0 = *(UINT16 *)&inst[1].puint32[PARAM2];
+ DPARAM0 = *(uint16_t *)&inst[1].puint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x8, 8, 0): // DLOAD dst,base,index,WORD_x8
- DPARAM0 = *(UINT16 *)&inst[1].puint64[PARAM2];
+ DPARAM0 = *(uint16_t *)&inst[1].puint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x1, 8, 0): // DLOAD dst,base,index,DWORD_x1
- DPARAM0 = *(UINT32 *)&inst[1].puint8[PARAM2];
+ DPARAM0 = *(uint32_t *)&inst[1].puint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x2, 8, 0): // DLOAD dst,base,index,DWORD_x2
- DPARAM0 = *(UINT32 *)&inst[1].puint16[PARAM2];
+ DPARAM0 = *(uint32_t *)&inst[1].puint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4, 8, 0): // DLOAD dst,base,index,DWORD
@@ -1255,19 +1255,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x8, 8, 0): // DLOAD dst,base,index,DWORD_x8
- DPARAM0 = *(UINT32 *)&inst[1].puint64[PARAM2];
+ DPARAM0 = *(uint32_t *)&inst[1].puint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD8x1, 8, 0): // DLOAD dst,base,index,QWORD_x1
- DPARAM0 = *(UINT64 *)&inst[1].puint8[PARAM2];
+ DPARAM0 = *(uint64_t *)&inst[1].puint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD8x2, 8, 0): // DLOAD dst,base,index,QWORD_x2
- DPARAM0 = *(UINT64 *)&inst[1].puint16[PARAM2];
+ DPARAM0 = *(uint64_t *)&inst[1].puint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD8x4, 8, 0): // DLOAD dst,base,index,QWORD_x4
- DPARAM0 = *(UINT64 *)&inst[1].puint32[PARAM2];
+ DPARAM0 = *(uint64_t *)&inst[1].puint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD8, 8, 0): // DLOAD dst,base,index,QWORD
@@ -1279,19 +1279,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x2, 8, 0): // DLOADS dst,base,index,BYTE_x2
- DPARAM0 = *(INT8 *)&inst[1].pint16[PARAM2];
+ DPARAM0 = *(int8_t *)&inst[1].pint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x4, 8, 0): // DLOADS dst,base,index,BYTE_x4
- DPARAM0 = *(INT8 *)&inst[1].pint32[PARAM2];
+ DPARAM0 = *(int8_t *)&inst[1].pint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x8, 8, 0): // DLOADS dst,base,index,BYTE_x8
- DPARAM0 = *(INT8 *)&inst[1].pint64[PARAM2];
+ DPARAM0 = *(int8_t *)&inst[1].pint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x1, 8, 0): // DLOADS dst,base,index,WORD_x1
- DPARAM0 = *(INT16 *)&inst[1].pint8[PARAM2];
+ DPARAM0 = *(int16_t *)&inst[1].pint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2, 8, 0): // DLOADS dst,base,index,WORD
@@ -1299,19 +1299,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x4, 8, 0): // DLOADS dst,base,index,WORD_x4
- DPARAM0 = *(INT16 *)&inst[1].pint32[PARAM2];
+ DPARAM0 = *(int16_t *)&inst[1].pint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x8, 8, 0): // DLOADS dst,base,index,WORD_x8
- DPARAM0 = *(INT16 *)&inst[1].pint64[PARAM2];
+ DPARAM0 = *(int16_t *)&inst[1].pint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x1, 8, 0): // DLOADS dst,base,index,DWORD_x1
- DPARAM0 = *(INT32 *)&inst[1].pint8[PARAM2];
+ DPARAM0 = *(int32_t *)&inst[1].pint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x2, 8, 0): // DLOADS dst,base,index,DWORD_x2
- DPARAM0 = *(INT32 *)&inst[1].pint16[PARAM2];
+ DPARAM0 = *(int32_t *)&inst[1].pint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4, 8, 0): // DLOADS dst,base,index,DWORD
@@ -1319,19 +1319,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x8, 8, 0): // DLOADS dst,base,index,DWORD_x8
- DPARAM0 = *(INT32 *)&inst[1].pint64[PARAM2];
+ DPARAM0 = *(int32_t *)&inst[1].pint64[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS8x1, 8, 0): // DLOADS dst,base,index,QWORD_x1
- DPARAM0 = *(INT64 *)&inst[1].pint8[PARAM2];
+ DPARAM0 = *(int64_t *)&inst[1].pint8[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS8x2, 8, 0): // DLOADS dst,base,index,QWORD_x2
- DPARAM0 = *(INT64 *)&inst[1].pint16[PARAM2];
+ DPARAM0 = *(int64_t *)&inst[1].pint16[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS8x4, 8, 0): // DLOADS dst,base,index,QWORD_x4
- DPARAM0 = *(INT64 *)&inst[1].pint32[PARAM2];
+ DPARAM0 = *(int64_t *)&inst[1].pint32[PARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS8, 8, 0): // DLOADS dst,base,index,QWORD
@@ -1343,19 +1343,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_STORE1x2, 8, 0): // DSTORE dst,base,index,BYTE_x2
- *(UINT8 *)&inst[0].puint16[PARAM1] = DPARAM2;
+ *(uint8_t *)&inst[0].puint16[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x4, 8, 0): // DSTORE dst,base,index,BYTE_x4
- *(UINT8 *)&inst[0].puint32[PARAM1] = DPARAM2;
+ *(uint8_t *)&inst[0].puint32[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x8, 8, 0): // DSTORE dst,base,index,BYTE_x8
- *(UINT8 *)&inst[0].puint64[PARAM1] = DPARAM2;
+ *(uint8_t *)&inst[0].puint64[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x1, 8, 0): // DSTORE dst,base,index,WORD_x1
- *(UINT16 *)&inst[0].puint8[PARAM1] = DPARAM2;
+ *(uint16_t *)&inst[0].puint8[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2, 8, 0): // DSTORE dst,base,index,WORD
@@ -1363,19 +1363,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_STORE2x4, 8, 0): // DSTORE dst,base,index,WORD_x4
- *(UINT16 *)&inst[0].puint32[PARAM1] = DPARAM2;
+ *(uint16_t *)&inst[0].puint32[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x8, 8, 0): // DSTORE dst,base,index,WORD_x8
- *(UINT16 *)&inst[0].puint64[PARAM1] = DPARAM2;
+ *(uint16_t *)&inst[0].puint64[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x1, 8, 0): // DSTORE dst,base,index,DWORD_x1
- *(UINT32 *)&inst[0].puint8[PARAM1] = DPARAM2;
+ *(uint32_t *)&inst[0].puint8[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x2, 8, 0): // DSTORE dst,base,index,DWORD_x2
- *(UINT32 *)&inst[0].puint16[PARAM1] = DPARAM2;
+ *(uint32_t *)&inst[0].puint16[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4, 8, 0): // DSTORE dst,base,index,DWORD
@@ -1383,19 +1383,19 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_STORE4x8, 8, 0): // DSTORE dst,base,index,DWORD_x8
- *(UINT32 *)&inst[0].puint64[PARAM1] = DPARAM2;
+ *(uint32_t *)&inst[0].puint64[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE8x1, 8, 0): // DSTORE dst,base,index,QWORD_x1
- *(UINT64 *)&inst[0].puint8[PARAM1] = DPARAM2;
+ *(uint64_t *)&inst[0].puint8[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE8x2, 8, 0): // DSTORE dst,base,index,QWORD_x2
- *(UINT64 *)&inst[0].puint16[PARAM1] = DPARAM2;
+ *(uint64_t *)&inst[0].puint16[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE8x4, 8, 0): // DSTORE dst,base,index,QWORD_x4
- *(UINT64 *)&inst[0].puint32[PARAM1] = DPARAM2;
+ *(uint64_t *)&inst[0].puint32[PARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE8, 8, 0): // DSTORE dst,base,index,QWORD
@@ -1476,31 +1476,31 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_SEXT1, 8, 0): // DSEXT dst,src,BYTE
- DPARAM0 = (INT8)PARAM1;
+ DPARAM0 = (int8_t)PARAM1;
break;
case MAKE_OPCODE_SHORT(OP_SEXT1, 8, 1):
- temp64 = (INT8)PARAM1;
+ temp64 = (int8_t)PARAM1;
flags = FLAGS64_NZ(temp64);
DPARAM0 = temp64;
break;
case MAKE_OPCODE_SHORT(OP_SEXT2, 8, 0): // DSEXT dst,src,WORD
- DPARAM0 = (INT16)PARAM1;
+ DPARAM0 = (int16_t)PARAM1;
break;
case MAKE_OPCODE_SHORT(OP_SEXT2, 8, 1):
- temp64 = (INT16)PARAM1;
+ temp64 = (int16_t)PARAM1;
flags = FLAGS64_NZ(temp64);
DPARAM0 = temp64;
break;
case MAKE_OPCODE_SHORT(OP_SEXT4, 8, 0): // DSEXT dst,src,DWORD
- DPARAM0 = (INT32)PARAM1;
+ DPARAM0 = (int32_t)PARAM1;
break;
case MAKE_OPCODE_SHORT(OP_SEXT4, 8, 1):
- temp64 = (INT32)PARAM1;
+ temp64 = (int32_t)PARAM1;
flags = FLAGS64_NZ(temp64);
DPARAM0 = temp64;
break;
@@ -1599,8 +1599,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_DIVU, 8, 0): // DDIVU dst,edst,src1,src2[,f]
if (DPARAM3 != 0)
{
- temp64 = (UINT64)DPARAM2 / (UINT64)DPARAM3;
- DPARAM1 = (UINT64)DPARAM2 % (UINT64)DPARAM3;
+ temp64 = (uint64_t)DPARAM2 / (uint64_t)DPARAM3;
+ DPARAM1 = (uint64_t)DPARAM2 % (uint64_t)DPARAM3;
DPARAM0 = temp64;
}
break;
@@ -1608,8 +1608,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_DIVU, 8, 1):
if (DPARAM3 != 0)
{
- temp64 = (UINT64)DPARAM2 / (UINT64)DPARAM3;
- DPARAM1 = (UINT64)DPARAM2 % (UINT64)DPARAM3;
+ temp64 = (uint64_t)DPARAM2 / (uint64_t)DPARAM3;
+ DPARAM1 = (uint64_t)DPARAM2 % (uint64_t)DPARAM3;
flags = FLAGS64_NZ(temp64);
DPARAM0 = temp64;
}
@@ -1620,8 +1620,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_DIVS, 8, 0): // DDIVS dst,edst,src1,src2[,f]
if (DPARAM3 != 0)
{
- temp64 = (INT64)DPARAM2 / (INT64)DPARAM3;
- DPARAM1 = (INT64)DPARAM2 % (INT64)DPARAM3;
+ temp64 = (int64_t)DPARAM2 / (int64_t)DPARAM3;
+ DPARAM1 = (int64_t)DPARAM2 % (int64_t)DPARAM3;
DPARAM0 = temp64;
}
break;
@@ -1629,8 +1629,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_DIVS, 8, 1):
if (DPARAM3 != 0)
{
- temp64 = (INT64)DPARAM2 / (INT64)DPARAM3;
- DPARAM1 = (INT64)DPARAM2 % (INT64)DPARAM3;
+ temp64 = (int64_t)DPARAM2 / (int64_t)DPARAM3;
+ DPARAM1 = (int64_t)DPARAM2 % (int64_t)DPARAM3;
flags = FLAGS64_NZ(temp64);
DPARAM0 = temp64;
}
@@ -1674,14 +1674,14 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_LZCNT, 8, 0): // DLZCNT dst,src
- if ((UINT32)(DPARAM1 >> 32) != 0)
+ if ((uint32_t)(DPARAM1 >> 32) != 0)
DPARAM0 = count_leading_zeros(DPARAM1 >> 32);
else
DPARAM0 = 32 + count_leading_zeros(DPARAM1);
break;
case MAKE_OPCODE_SHORT(OP_LZCNT, 8, 1):
- if ((UINT32)(DPARAM1 >> 32) != 0)
+ if ((uint32_t)(DPARAM1 >> 32) != 0)
temp64 = count_leading_zeros(DPARAM1 >> 32);
else
temp64 = 32 + count_leading_zeros(DPARAM1);
@@ -1735,12 +1735,12 @@ int drcbe_c::execute(code_handle &entry)
break;
case MAKE_OPCODE_SHORT(OP_SAR, 8, 0): // DSAR dst,src,count[,f]
- DPARAM0 = (INT64)DPARAM1 >> (DPARAM2 & 63);
+ DPARAM0 = (int64_t)DPARAM1 >> (DPARAM2 & 63);
break;
case MAKE_OPCODE_SHORT(OP_SAR, 8, 1):
shift = DPARAM2 & 63;
- temp64 = (INT32)DPARAM1 >> shift;
+ temp64 = (int32_t)DPARAM1 >> shift;
flags = FLAGS64_NZ(temp64);
if (shift != 0) flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
DPARAM0 = temp64;
@@ -1796,17 +1796,17 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_RORC, 8, 0): // DRORC dst,src,count[,f]
shift = DPARAM2 & 63;
if (shift > 1)
- DPARAM0 = (DPARAM1 >> shift) | ((((UINT64)flags & FLAG_C) << 63) >> (shift - 1)) | (DPARAM1 << (65 - shift));
+ DPARAM0 = (DPARAM1 >> shift) | ((((uint64_t)flags & FLAG_C) << 63) >> (shift - 1)) | (DPARAM1 << (65 - shift));
else if (shift == 1)
- DPARAM0 = (DPARAM1 >> shift) | (((UINT64)flags & FLAG_C) << 63);
+ DPARAM0 = (DPARAM1 >> shift) | (((uint64_t)flags & FLAG_C) << 63);
break;
case MAKE_OPCODE_SHORT(OP_RORC, 8, 1):
shift = DPARAM2 & 63;
if (shift > 1)
- temp64 = (DPARAM1 >> shift) | ((((UINT64)flags & FLAG_C) << 63) >> (shift - 1)) | (DPARAM1 << (65 - shift));
+ temp64 = (DPARAM1 >> shift) | ((((uint64_t)flags & FLAG_C) << 63) >> (shift - 1)) | (DPARAM1 << (65 - shift));
else if (shift == 1)
- temp64 = (DPARAM1 >> shift) | (((UINT64)flags & FLAG_C) << 63);
+ temp64 = (DPARAM1 >> shift) | (((uint64_t)flags & FLAG_C) << 63);
else
temp64 = DPARAM1;
flags = FLAGS64_NZ(temp64);
@@ -2137,10 +2137,10 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
{
(dst++)->v = immed;
if (size == 4)
- *(UINT32 *)immed = (UINT32)param.immediate();
+ *(uint32_t *)immed = (uint32_t)param.immediate();
else
- *(UINT64 *)immed = (UINT64)param.immediate();
- immed = (UINT8 *)immed + size;
+ *(uint64_t *)immed = (uint64_t)param.immediate();
+ immed = (uint8_t *)immed + size;
}
break;
@@ -2188,7 +2188,7 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
// code label just contains the label value
case parameter::PTYPE_CODE_LABEL:
- return output_parameter(dstptr, immedptr, size, UINT32(param.label()));
+ return output_parameter(dstptr, immedptr, size, uint32_t(param.label()));
// c_function just points to the C function
case parameter::PTYPE_C_FUNCTION:
@@ -2220,7 +2220,7 @@ void drcbe_c::fixup_label(void *parameter, drccodeptr labelcodeptr)
// dmulu - perform a double-wide unsigned multiply
//-------------------------------------------------
-int drcbe_c::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int flags)
+int drcbe_c::dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, int flags)
{
// shortcut if we don't care about the high bits or the flags
if (&dstlo == &dsthi && flags == 0)
@@ -2230,8 +2230,8 @@ int drcbe_c::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int f
}
// fetch source values
- UINT64 a = src1;
- UINT64 b = src2;
+ uint64_t a = src1;
+ uint64_t b = src2;
if (a == 0 || b == 0)
{
dsthi = dstlo = 0;
@@ -2239,17 +2239,17 @@ int drcbe_c::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int f
}
// compute high and low parts first
- UINT64 lo = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 0);
- UINT64 hi = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 32);
+ uint64_t lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0);
+ uint64_t hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32);
// compute middle parts
- UINT64 prevlo = lo;
- UINT64 temp = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 0);
+ uint64_t prevlo = lo;
+ uint64_t temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0);
lo += temp << 32;
hi += (temp >> 32) + (lo < prevlo);
prevlo = lo;
- temp = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 32);
+ temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32);
lo += temp << 32;
hi += (temp >> 32) + (lo < prevlo);
@@ -2264,7 +2264,7 @@ int drcbe_c::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int f
// dmuls - perform a double-wide signed multiply
//-------------------------------------------------
-int drcbe_c::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int flags)
+int drcbe_c::dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, int flags)
{
// shortcut if we don't care about the high bits or the flags
if (&dstlo == &dsthi && flags == 0)
@@ -2274,8 +2274,8 @@ int drcbe_c::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int fla
}
// fetch absolute source values
- UINT64 a = src1; if ((INT64)a < 0) a = -a;
- UINT64 b = src2; if ((INT64)b < 0) b = -b;
+ uint64_t a = src1; if ((int64_t)a < 0) a = -a;
+ uint64_t b = src2; if ((int64_t)b < 0) b = -b;
if (a == 0 || b == 0)
{
dsthi = dstlo = 0;
@@ -2283,22 +2283,22 @@ int drcbe_c::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int fla
}
// compute high and low parts first
- UINT64 lo = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 0);
- UINT64 hi = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 32);
+ uint64_t lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0);
+ uint64_t hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32);
// compute middle parts
- UINT64 prevlo = lo;
- UINT64 temp = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 0);
+ uint64_t prevlo = lo;
+ uint64_t temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0);
lo += temp << 32;
hi += (temp >> 32) + (lo < prevlo);
prevlo = lo;
- temp = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 32);
+ temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32);
lo += temp << 32;
hi += (temp >> 32) + (lo < prevlo);
// adjust for signage
- if ((INT64)(src1 ^ src2) < 0)
+ if ((int64_t)(src1 ^ src2) < 0)
{
hi = ~hi + (lo == 0);
lo = ~lo + 1;
@@ -2307,10 +2307,10 @@ int drcbe_c::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int fla
// store the results
dsthi = hi;
dstlo = lo;
- return ((hi >> 60) & FLAG_S) | ((dsthi != ((INT64)lo >> 63)) << 1);
+ return ((hi >> 60) & FLAG_S) | ((dsthi != ((int64_t)lo >> 63)) << 1);
}
-UINT32 drcbe_c::tzcount32(UINT32 value)
+uint32_t drcbe_c::tzcount32(uint32_t value)
{
for (int i = 0; i < 32; i++)
{
@@ -2320,11 +2320,11 @@ UINT32 drcbe_c::tzcount32(UINT32 value)
return 32;
}
-UINT64 drcbe_c::tzcount64(UINT64 value)
+uint64_t drcbe_c::tzcount64(uint64_t value)
{
for (int i = 0; i < 64; i++)
{
- if (value & ((UINT64)(1) << i))
+ if (value & ((uint64_t)(1) << i))
return i;
}
return 64;
diff --git a/src/devices/cpu/drcbec.h b/src/devices/cpu/drcbec.h
index 7326144681e..d92fc7672e9 100644
--- a/src/devices/cpu/drcbec.h
+++ b/src/devices/cpu/drcbec.h
@@ -28,24 +28,24 @@ class drcbe_c : public drcbe_interface
{
public:
// construction/destruction
- drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits);
+ drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
virtual ~drcbe_c();
// required overrides
virtual void reset() override;
virtual int execute(uml::code_handle &entry) override;
- virtual void generate(drcuml_block &block, const uml::instruction *instlist, UINT32 numinst) override;
- virtual bool hash_exists(UINT32 mode, UINT32 pc) override;
+ virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
+ virtual bool hash_exists(uint32_t mode, uint32_t pc) override;
virtual void get_info(drcbe_info &info) override;
private:
// helpers
void output_parameter(drcbec_instruction **dstptr, void **immedptr, int size, const uml::parameter &param);
void fixup_label(void *parameter, drccodeptr labelcodeptr);
- int dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int flags);
- int dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int flags);
- UINT32 tzcount32(UINT32 value);
- UINT64 tzcount64(UINT64 value);
+ int dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, int flags);
+ int dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, int flags);
+ uint32_t tzcount32(uint32_t value);
+ uint64_t tzcount64(uint64_t value);
// internal state
drc_hash_table m_hash; // hash table state
@@ -53,8 +53,8 @@ private:
drc_label_list m_labels; // label list
drc_label_fixup_delegate m_fixup_delegate; // precomputed delegate
- static const UINT32 s_condition_map[32];
- static UINT64 s_immediate_zero;
+ static const uint32_t s_condition_map[32];
+ static uint64_t s_immediate_zero;
};
diff --git a/src/devices/cpu/drcbeut.cpp b/src/devices/cpu/drcbeut.cpp
index 8d4821e7421..265740d463c 100644
--- a/src/devices/cpu/drcbeut.cpp
+++ b/src/devices/cpu/drcbeut.cpp
@@ -30,7 +30,7 @@ using namespace uml;
// drc_hash_table - constructor
//-------------------------------------------------
-drc_hash_table::drc_hash_table(drc_cache &cache, UINT32 modes, UINT8 addrbits, UINT8 ignorebits)
+drc_hash_table::drc_hash_table(drc_cache &cache, uint32_t modes, uint8_t addrbits, uint8_t ignorebits)
: m_cache(cache),
m_modes(modes),
m_nocodeptr(nullptr),
@@ -85,7 +85,7 @@ bool drc_hash_table::reset()
// block_begin - note the beginning of a block
//-------------------------------------------------
-void drc_hash_table::block_begin(drcuml_block &block, const uml::instruction *instlist, UINT32 numinst)
+void drc_hash_table::block_begin(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst)
{
// before generating code, pre-allocate any hash entries; we do this by setting dummy hash values
for (int inum = 0; inum < numinst; inum++)
@@ -157,7 +157,7 @@ void drc_hash_table::set_default_codeptr(drccodeptr nocodeptr)
// mode/pc
//-------------------------------------------------
-bool drc_hash_table::set_codeptr(UINT32 mode, UINT32 pc, drccodeptr code)
+bool drc_hash_table::set_codeptr(uint32_t mode, uint32_t pc, drccodeptr code)
{
// copy-on-write for the l1 hash table
assert(mode < m_modes);
@@ -171,7 +171,7 @@ bool drc_hash_table::set_codeptr(UINT32 mode, UINT32 pc, drccodeptr code)
}
// copy-on-write for the l2 hash table
- UINT32 l1 = (pc >> m_l1shift) & m_l1mask;
+ uint32_t l1 = (pc >> m_l1shift) & m_l1mask;
if (m_base[mode][l1] == m_emptyl2)
{
drccodeptr *newtable = (drccodeptr *)m_cache.alloc_temporary(sizeof(drccodeptr) << m_l2bits);
@@ -182,7 +182,7 @@ bool drc_hash_table::set_codeptr(UINT32 mode, UINT32 pc, drccodeptr code)
}
// set the new entry
- UINT32 l2 = (pc >> m_l2shift) & m_l2mask;
+ uint32_t l2 = (pc >> m_l2shift) & m_l2mask;
m_base[mode][l1][l2] = code;
return true;
}
@@ -197,7 +197,7 @@ bool drc_hash_table::set_codeptr(UINT32 mode, UINT32 pc, drccodeptr code)
// drc_map_variables - constructor
//-------------------------------------------------
-drc_map_variables::drc_map_variables(drc_cache &cache, UINT64 uniquevalue)
+drc_map_variables::drc_map_variables(drc_cache &cache, uint64_t uniquevalue)
: m_cache(cache),
m_uniquevalue(uniquevalue)
{
@@ -244,13 +244,13 @@ void drc_map_variables::block_end(drcuml_block &block)
return;
// begin "code generation" aligned to an 8-byte boundary
- drccodeptr *top = m_cache.begin_codegen(sizeof(UINT64) + sizeof(UINT32) + 2 * sizeof(UINT32) * m_entry_list.count());
+ drccodeptr *top = m_cache.begin_codegen(sizeof(uint64_t) + sizeof(uint32_t) + 2 * sizeof(uint32_t) * m_entry_list.count());
if (top == nullptr)
block.abort();
- UINT32 *dest = (UINT32 *)(((uintptr_t)*top + 7) & ~7);
+ uint32_t *dest = (uint32_t *)(((uintptr_t)*top + 7) & ~7);
// store the cookie first
- *(UINT64 *)dest = m_uniquevalue;
+ *(uint64_t *)dest = m_uniquevalue;
dest += 2;
// get the pointer to the first item and store an initial backwards offset
@@ -259,7 +259,7 @@ void drc_map_variables::block_end(drcuml_block &block)
dest++;
// now iterate over entries and store them
- UINT32 curvalue[MAPVAR_COUNT] = { 0 };
+ uint32_t curvalue[MAPVAR_COUNT] = { 0 };
bool changed[MAPVAR_COUNT] = { false };
for (map_entry *entry = m_entry_list.first(); entry != nullptr; entry = entry->next())
{
@@ -275,7 +275,7 @@ void drc_map_variables::block_end(drcuml_block &block)
{
// build a mask of changed variables
int numchanged = 0;
- UINT32 varmask = 0;
+ uint32_t varmask = 0;
for (int varnum = 0; varnum < ARRAY_LENGTH(changed); varnum++)
if (changed[varnum])
{
@@ -289,7 +289,7 @@ void drc_map_variables::block_end(drcuml_block &block)
continue;
// first word is a code delta plus mask of changed variables
- UINT32 codedelta = entry->m_codeptr - lastptr;
+ uint32_t codedelta = entry->m_codeptr - lastptr;
while (codedelta > 0xffff)
{
*dest++ = 0xffff << 16;
@@ -321,7 +321,7 @@ void drc_map_variables::block_end(drcuml_block &block)
// code pointer
//-------------------------------------------------
-void drc_map_variables::set_value(drccodeptr codebase, UINT32 mapvar, UINT32 newvalue)
+void drc_map_variables::set_value(drccodeptr codebase, uint32_t mapvar, uint32_t newvalue)
{
assert(mapvar >= MAPVAR_M0 && mapvar < MAPVAR_END);
@@ -349,14 +349,14 @@ void drc_map_variables::set_value(drccodeptr codebase, UINT32 mapvar, UINT32 new
// code pointer
//-------------------------------------------------
-UINT32 drc_map_variables::get_value(drccodeptr codebase, UINT32 mapvar) const
+uint32_t drc_map_variables::get_value(drccodeptr codebase, uint32_t mapvar) const
{
assert(mapvar >= MAPVAR_M0 && mapvar < MAPVAR_END);
mapvar -= MAPVAR_M0;
// get an aligned pointer to start scanning
- UINT64 *curscan = (UINT64 *)(((uintptr_t)codebase | 7) + 1);
- UINT64 *endscan = (UINT64 *)m_cache.top();
+ uint64_t *curscan = (uint64_t *)(((uintptr_t)codebase | 7) + 1);
+ uint64_t *endscan = (uint64_t *)m_cache.top();
// look for the signature
while (curscan < endscan && *curscan++ != m_uniquevalue) {};
@@ -364,19 +364,19 @@ UINT32 drc_map_variables::get_value(drccodeptr codebase, UINT32 mapvar) const
return 0;
// switch to 32-bit pointers for processing the rest
- UINT32 *data = (UINT32 *)curscan;
+ uint32_t *data = (uint32_t *)curscan;
// first get the 32-bit starting offset to the code
drccodeptr curcode = (drccodeptr)data - *data;
data++;
// now loop until we advance past our target
- UINT32 varmask = 0x10 << mapvar;
- UINT32 result = 0;
+ uint32_t varmask = 0x10 << mapvar;
+ uint32_t result = 0;
while (true)
{
// a 0 is a terminator
- UINT32 controlword = *data++;
+ uint32_t controlword = *data++;
if (controlword == 0)
break;
@@ -390,7 +390,7 @@ UINT32 drc_map_variables::get_value(drccodeptr codebase, UINT32 mapvar) const
{
// count how many words precede the one we care about
int dataoffs = 0;
- for (UINT32 skipmask = (controlword & (varmask - 1)) >> 4; skipmask != 0; skipmask = skipmask & (skipmask - 1))
+ for (uint32_t skipmask = (controlword & (varmask - 1)) >> 4; skipmask != 0; skipmask = skipmask & (skipmask - 1))
dataoffs++;
// fetch the one we want
@@ -405,7 +405,7 @@ UINT32 drc_map_variables::get_value(drccodeptr codebase, UINT32 mapvar) const
return result;
}
-UINT32 drc_map_variables::static_get_value(drc_map_variables &map, drccodeptr codebase, UINT32 mapvar)
+uint32_t drc_map_variables::static_get_value(drc_map_variables &map, drccodeptr codebase, uint32_t mapvar)
{
return map.get_value(codebase, mapvar);
}
@@ -417,7 +417,7 @@ UINT32 drc_map_variables::static_get_value(drc_map_variables &map, drccodeptr co
// map value
//-------------------------------------------------
-UINT32 drc_map_variables::get_last_value(UINT32 mapvar)
+uint32_t drc_map_variables::get_last_value(uint32_t mapvar)
{
assert(mapvar >= MAPVAR_M0 && mapvar < MAPVAR_END);
return m_mapvalue[mapvar - MAPVAR_M0];
diff --git a/src/devices/cpu/drcbeut.h b/src/devices/cpu/drcbeut.h
index 8987edb49c2..b18fb008060 100644
--- a/src/devices/cpu/drcbeut.h
+++ b/src/devices/cpu/drcbeut.h
@@ -27,42 +27,42 @@ class drc_hash_table
{
public:
// construction/destruction
- drc_hash_table(drc_cache &cache, UINT32 modes, UINT8 addrbits, UINT8 ignorebits);
+ drc_hash_table(drc_cache &cache, uint32_t modes, uint8_t addrbits, uint8_t ignorebits);
// getters
drccodeptr ***base() const { return m_base; }
- UINT8 l1bits() const { return m_l1bits; }
- UINT8 l2bits() const { return m_l2bits; }
- UINT8 l1shift() const { return m_l1shift; }
- UINT8 l2shift() const { return m_l2shift; }
+ uint8_t l1bits() const { return m_l1bits; }
+ uint8_t l2bits() const { return m_l2bits; }
+ uint8_t l1shift() const { return m_l1shift; }
+ uint8_t l2shift() const { return m_l2shift; }
offs_t l1mask() const { return m_l1mask; }
offs_t l2mask() const { return m_l2mask; }
- bool is_mode_populated(UINT32 mode) const { return m_base[mode] != m_emptyl1; }
+ bool is_mode_populated(uint32_t mode) const { return m_base[mode] != m_emptyl1; }
// set up and configuration
bool reset();
void set_default_codeptr(drccodeptr code);
// block begin/end
- void block_begin(drcuml_block &block, const uml::instruction *instlist, UINT32 numinst);
+ void block_begin(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst);
void block_end(drcuml_block &block);
// code pointer access
- bool set_codeptr(UINT32 mode, UINT32 pc, drccodeptr code);
- drccodeptr get_codeptr(UINT32 mode, UINT32 pc) { assert(mode < m_modes); return m_base[mode][(pc >> m_l1shift) & m_l1mask][(pc >> m_l2shift) & m_l2mask]; }
- bool code_exists(UINT32 mode, UINT32 pc) { return get_codeptr(mode, pc) != m_nocodeptr; }
+ bool set_codeptr(uint32_t mode, uint32_t pc, drccodeptr code);
+ drccodeptr get_codeptr(uint32_t mode, uint32_t pc) { assert(mode < m_modes); return m_base[mode][(pc >> m_l1shift) & m_l1mask][(pc >> m_l2shift) & m_l2mask]; }
+ bool code_exists(uint32_t mode, uint32_t pc) { return get_codeptr(mode, pc) != m_nocodeptr; }
private:
// internal state
drc_cache & m_cache; // cache where allocations come from
- UINT32 m_modes; // number of modes supported
+ uint32_t m_modes; // number of modes supported
drccodeptr m_nocodeptr; // pointer to code which will handle missing entries
- UINT8 m_l1bits; // bits worth of entries in l1 hash tables
- UINT8 m_l2bits; // bits worth of entries in l2 hash tables
- UINT8 m_l1shift; // shift to apply to the PC to get the l1 hash entry
- UINT8 m_l2shift; // shift to apply to the PC to get the l2 hash entry
+ uint8_t m_l1bits; // bits worth of entries in l1 hash tables
+ uint8_t m_l2bits; // bits worth of entries in l2 hash tables
+ uint8_t m_l1shift; // shift to apply to the PC to get the l1 hash entry
+ uint8_t m_l2shift; // shift to apply to the PC to get the l2 hash entry
offs_t m_l1mask; // mask to apply after shifting
offs_t m_l2mask; // mask to apply after shifting
@@ -79,7 +79,7 @@ class drc_map_variables
{
public:
// construction/destruction
- drc_map_variables(drc_cache &cache, UINT64 uniquevalue);
+ drc_map_variables(drc_cache &cache, uint64_t uniquevalue);
~drc_map_variables();
// block begin/end
@@ -87,18 +87,18 @@ public:
void block_end(drcuml_block &block);
// get/set values
- void set_value(drccodeptr codebase, UINT32 mapvar, UINT32 newvalue);
- UINT32 get_value(drccodeptr codebase, UINT32 mapvar) const;
- UINT32 get_last_value(UINT32 mapvar);
+ void set_value(drccodeptr codebase, uint32_t mapvar, uint32_t newvalue);
+ uint32_t get_value(drccodeptr codebase, uint32_t mapvar) const;
+ uint32_t get_last_value(uint32_t mapvar);
// static accessors to be called directly by generated code
- static UINT32 static_get_value(drc_map_variables &map, drccodeptr codebase, UINT32 mapvar);
+ static uint32_t static_get_value(drc_map_variables &map, drccodeptr codebase, uint32_t mapvar);
private:
// internal state
drc_cache & m_cache; // pointer to the cache
- UINT64 m_uniquevalue; // unique value used to find the table
- UINT32 m_mapvalue[uml::MAPVAR_END - uml::MAPVAR_M0]; // array of current values
+ uint64_t m_uniquevalue; // unique value used to find the table
+ uint32_t m_mapvalue[uml::MAPVAR_END - uml::MAPVAR_M0]; // array of current values
// list of entries
struct map_entry
@@ -106,8 +106,8 @@ private:
map_entry *next() const { return m_next; }
map_entry * m_next; // pointer to next map entry
drccodeptr m_codeptr; // pointer to the relevant code
- UINT32 m_mapvar; // map variable id
- UINT32 m_newval; // value of the variable starting at codeptr
+ uint32_t m_mapvar; // map variable id
+ uint32_t m_newval; // value of the variable starting at codeptr
};
simple_list<map_entry> m_entry_list; // list of entries
};
diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp
index 4ecb8cef939..78dd9146ee2 100644
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@@ -219,15 +219,15 @@ using x64emit::REG_R15;
// CONSTANTS
//**************************************************************************
-const UINT32 PTYPE_M = 1 << parameter::PTYPE_MEMORY;
-const UINT32 PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
-const UINT32 PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
-const UINT32 PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
-//const UINT32 PTYPE_MI = PTYPE_M | PTYPE_I;
-//const UINT32 PTYPE_RI = PTYPE_R | PTYPE_I;
-const UINT32 PTYPE_MR = PTYPE_M | PTYPE_R;
-const UINT32 PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
-const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F;
+const uint32_t PTYPE_M = 1 << parameter::PTYPE_MEMORY;
+const uint32_t PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
+const uint32_t PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
+const uint32_t PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
+//const uint32_t PTYPE_MI = PTYPE_M | PTYPE_I;
+//const uint32_t PTYPE_RI = PTYPE_R | PTYPE_I;
+const uint32_t PTYPE_MR = PTYPE_M | PTYPE_R;
+const uint32_t PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
+const uint32_t PTYPE_MF = PTYPE_M | PTYPE_F;
#ifdef X64_WINDOWS_ABI
@@ -273,10 +273,10 @@ inline x86_memref drcbe_x64::MABS(const void *ptr)
drcbe_x64::opcode_generate_func drcbe_x64::s_opcode_table[OP_MAX];
// size-to-mask table
-//static const UINT64 size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) };
+//static const uint64_t size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) };
// register mapping tables
-static const UINT8 int_register_map[REG_I_COUNT] =
+static const uint8_t int_register_map[REG_I_COUNT] =
{
#ifdef X64_WINDOWS_ABI
REG_RBX, REG_RSI, REG_RDI, REG_R12, REG_R13, REG_R14, REG_R15
@@ -285,13 +285,13 @@ static const UINT8 int_register_map[REG_I_COUNT] =
#endif
};
-static UINT8 float_register_map[REG_F_COUNT] =
+static uint8_t float_register_map[REG_F_COUNT] =
{
REG_XMM6, REG_XMM7, REG_XMM8, REG_XMM9, REG_XMM10, REG_XMM11, REG_XMM12, REG_XMM13, REG_XMM14, REG_XMM15
};
// condition mapping table
-static const UINT8 condition_map[uml::COND_MAX - uml::COND_Z] =
+static const uint8_t condition_map[uml::COND_MAX - uml::COND_Z] =
{
x64emit::COND_Z, // COND_Z = 0x80, requires Z
x64emit::COND_NZ, // COND_NZ, requires Z
@@ -313,7 +313,7 @@ static const UINT8 condition_map[uml::COND_MAX - uml::COND_Z] =
#if 0
// rounding mode mapping table
-static const UINT8 fprnd_map[4] =
+static const uint8_t fprnd_map[4] =
{
FPRND_CHOP, // ROUND_TRUNC, truncate
FPRND_NEAR, // ROUND_ROUND, round
@@ -430,7 +430,7 @@ const drcbe_x64::opcode_table_entry drcbe_x64::s_opcode_table_source[] =
// into a reduced set
//-------------------------------------------------
-drcbe_x64::be_parameter::be_parameter(drcbe_x64 &drcbe, const parameter &param, UINT32 allowed)
+drcbe_x64::be_parameter::be_parameter(drcbe_x64 &drcbe, const parameter &param, uint32_t allowed)
{
int regnum;
@@ -536,11 +536,11 @@ inline void drcbe_x64::normalize_commutative(be_parameter &inner, be_parameter &
// from rbp
//-------------------------------------------------
-inline INT32 drcbe_x64::offset_from_rbp(const void *ptr)
+inline int32_t drcbe_x64::offset_from_rbp(const void *ptr)
{
- INT64 delta = reinterpret_cast<UINT8 *>(const_cast<void *>(ptr)) - m_rbpvalue;
- assert_always((INT32)delta == delta, "offset_from_rbp: delta out of range");
- return (INT32)delta;
+ int64_t delta = reinterpret_cast<uint8_t *>(const_cast<void *>(ptr)) - m_rbpvalue;
+ assert_always((int32_t)delta == delta, "offset_from_rbp: delta out of range");
+ return (int32_t)delta;
}
@@ -550,9 +550,9 @@ inline INT32 drcbe_x64::offset_from_rbp(const void *ptr)
// target address
//-------------------------------------------------
-inline int drcbe_x64::get_base_register_and_offset(x86code *&dst, void *target, UINT8 reg, INT32 &offset)
+inline int drcbe_x64::get_base_register_and_offset(x86code *&dst, void *target, uint8_t reg, int32_t &offset)
{
- INT64 delta = (UINT8 *)target - m_rbpvalue;
+ int64_t delta = (uint8_t *)target - m_rbpvalue;
if (short_immediate(delta))
{
offset = delta;
@@ -572,9 +572,9 @@ inline int drcbe_x64::get_base_register_and_offset(x86code *&dst, void *target,
// directly or via a call through pointer
//-------------------------------------------------
-inline void drcbe_x64::emit_smart_call_r64(x86code *&dst, x86code *target, UINT8 reg)
+inline void drcbe_x64::emit_smart_call_r64(x86code *&dst, x86code *target, uint8_t reg)
{
- INT64 delta = target - (dst + 5);
+ int64_t delta = target - (dst + 5);
if (short_immediate(delta))
emit_call(dst, target); // call target
else
@@ -592,7 +592,7 @@ inline void drcbe_x64::emit_smart_call_r64(x86code *&dst, x86code *target, UINT8
inline void drcbe_x64::emit_smart_call_m64(x86code *&dst, x86code **target)
{
- INT64 delta = *target - (dst + 5);
+ int64_t delta = *target - (dst + 5);
if (short_immediate(delta))
emit_call(dst, *target); // call *target
else
@@ -609,14 +609,14 @@ inline void drcbe_x64::emit_smart_call_m64(x86code *&dst, x86code **target)
// drcbe_x64 - constructor
//-------------------------------------------------
-drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
+drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits)
: drcbe_interface(drcuml, cache, device),
m_hash(cache, modes, addrbits, ignorebits),
m_map(cache, 0),
m_labels(cache),
m_log(nullptr),
m_sse41(false),
- m_absmask32((UINT32 *)cache.alloc_near(16*2 + 15)),
+ m_absmask32((uint32_t *)cache.alloc_near(16*2 + 15)),
m_absmask64(nullptr),
m_rbpvalue(cache.near() + 0x80),
m_entry(nullptr),
@@ -627,7 +627,7 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, U
m_near(*(near_state *)cache.alloc_near(sizeof(m_near)))
{
// build up necessary arrays
- static const UINT32 sse_control[4] =
+ static const uint32_t sse_control[4] =
{
0xffc0, // ROUND_TRUNC
0x9fc0, // ROUND_ROUND
@@ -639,9 +639,9 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, U
m_near.double1 = 1.0;
// create absolute value masks that are aligned to SSE boundaries
- m_absmask32 = (UINT32 *)(((uintptr_t)m_absmask32 + 15) & ~15);
+ m_absmask32 = (uint32_t *)(((uintptr_t)m_absmask32 + 15) & ~15);
m_absmask32[0] = m_absmask32[1] = m_absmask32[2] = m_absmask32[3] = 0x7fffffff;
- m_absmask64 = (UINT64 *)&m_absmask32[4];
+ m_absmask64 = (uint64_t *)&m_absmask32[4];
m_absmask64[0] = m_absmask64[1] = U64(0x7fffffffffffffff);
// get pointers to C functions we need to call
@@ -656,7 +656,7 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, U
// build the flags map
for (int entry = 0; entry < ARRAY_LENGTH(m_near.flagsmap); entry++)
{
- UINT8 flags = 0;
+ uint8_t flags = 0;
if (entry & 0x001) flags |= FLAG_C;
if (entry & 0x004) flags |= FLAG_U;
if (entry & 0x040) flags |= FLAG_Z;
@@ -666,7 +666,7 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, U
}
for (int entry = 0; entry < ARRAY_LENGTH(m_near.flagsunmap); entry++)
{
- UINT64 flags = 0;
+ uint64_t flags = 0;
if (entry & FLAG_C) flags |= 0x001;
if (entry & FLAG_U) flags |= 0x004;
if (entry & FLAG_Z) flags |= 0x040;
@@ -718,7 +718,7 @@ void drcbe_x64::reset()
x86code *dst = (x86code *)*cachetop;
// generate a simple CPUID stub
- UINT32 (*cpuid_ecx_stub)(void) = (UINT32 (*)(void))dst;
+ uint32_t (*cpuid_ecx_stub)(void) = (uint32_t (*)(void))dst;
emit_push_r64(dst, REG_RBX); // push rbx
emit_mov_r32_imm(dst, REG_EAX, 1); // mov eax,1
emit_cpuid(dst); // cpuid
@@ -798,7 +798,7 @@ int drcbe_x64::execute(code_handle &entry)
// drcbex64_generate - generate code
//-------------------------------------------------
-void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, UINT32 numinst)
+void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst)
{
// tell all of our utility objects that a block is beginning
m_hash.block_begin(block, instlist, numinst);
@@ -834,7 +834,7 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, UINT3
if (inst.opcode() == OP_HANDLE)
blockname = inst.param(0).handle().string();
else if (inst.opcode() == OP_HASH)
- blockname = string_format("Code: mode=%d PC=%08X", (UINT32)inst.param(0).immediate(), (offs_t)inst.param(1).immediate()).c_str();
+ blockname = string_format("Code: mode=%d PC=%08X", (uint32_t)inst.param(0).immediate(), (offs_t)inst.param(1).immediate()).c_str();
}
// generate code
@@ -861,7 +861,7 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, UINT3
// exists in the hash table
//-------------------------------------------------
-bool drcbe_x64::hash_exists(UINT32 mode, UINT32 pc)
+bool drcbe_x64::hash_exists(uint32_t mode, uint32_t pc)
{
return m_hash.code_exists(mode, pc);
}
@@ -893,7 +893,7 @@ void drcbe_x64::get_info(drcbe_info &info)
// into a register
//-------------------------------------------------
-void drcbe_x64::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x64::emit_mov_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param)
{
if (param.is_immediate())
{
@@ -917,16 +917,16 @@ void drcbe_x64::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
// sign-extended into a register
//-------------------------------------------------
-void drcbe_x64::emit_movsx_r64_p32(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x64::emit_movsx_r64_p32(x86code *&dst, uint8_t reg, const be_parameter &param)
{
if (param.is_immediate())
{
if (param.immediate() == 0)
emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
- else if ((INT32)param.immediate() >= 0)
+ else if ((int32_t)param.immediate() >= 0)
emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
else
- emit_mov_r64_imm(dst, reg, (INT32)param.immediate()); // mov reg,param
+ emit_mov_r64_imm(dst, reg, (int32_t)param.immediate()); // mov reg,param
}
else if (param.is_memory())
emit_movsxd_r64_m32(dst, reg, MABS(param.memory())); // movsxd reg,[param]
@@ -941,7 +941,7 @@ void drcbe_x64::emit_movsx_r64_p32(x86code *&dst, UINT8 reg, const be_parameter
// any flags
//-------------------------------------------------
-void drcbe_x64::emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x64::emit_mov_r32_p32_keepflags(x86code *&dst, uint8_t reg, const be_parameter &param)
{
if (param.is_immediate())
emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
@@ -979,7 +979,7 @@ void drcbe_x64::emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_para
// 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_mov_p32_r32(x86code *&dst, const be_parameter &param, UINT8 reg)
+void drcbe_x64::emit_mov_p32_r32(x86code *&dst, const be_parameter &param, uint8_t reg)
{
assert(!param.is_immediate());
if (param.is_memory())
@@ -997,7 +997,7 @@ void drcbe_x64::emit_mov_p32_r32(x86code *&dst, const be_parameter &param, UINT8
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_add_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_add_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -1037,7 +1037,7 @@ void drcbe_x64::emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_adc_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
emit_adc_r32_imm(dst, reg, param.immediate()); // adc reg,param
@@ -1071,7 +1071,7 @@ void drcbe_x64::emit_adc_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_sub_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_sub_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -1111,7 +1111,7 @@ void drcbe_x64::emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_sbb_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
emit_sbb_r32_imm(dst, reg, param.immediate()); // sbb reg,param
@@ -1145,7 +1145,7 @@ void drcbe_x64::emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_cmp_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
emit_cmp_r32_imm(dst, reg, param.immediate()); // cmp reg,param
@@ -1179,13 +1179,13 @@ void drcbe_x64::emit_cmp_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_and_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_and_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
else
emit_and_r32_imm(dst, reg, param.immediate()); // and reg,param
@@ -1206,9 +1206,9 @@ void drcbe_x64::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
else
emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
@@ -1227,7 +1227,7 @@ void drcbe_x64::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_test_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
emit_test_r32_imm(dst, reg, param.immediate()); // test reg,param
@@ -1262,13 +1262,13 @@ void drcbe_x64::emit_test_m32_p32(x86code *&dst, x86_memref memref, const be_par
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_or_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_or_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_mov_r32_imm(dst, reg, 0xffffffff); // mov reg,-1
else
emit_or_r32_imm(dst, reg, param.immediate()); // or reg,param
@@ -1289,9 +1289,9 @@ void drcbe_x64::emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_param
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_mov_m32_imm(dst, memref, 0xffffffff); // mov [dest],-1
else
emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
@@ -1310,13 +1310,13 @@ void drcbe_x64::emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_param
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_xor_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_xor_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_not_r32(dst, reg); // not reg
else
emit_xor_r32_imm(dst, reg, param.immediate()); // xor reg,param
@@ -1337,9 +1337,9 @@ void drcbe_x64::emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_not_m32(dst, memref); // not [dest]
else
emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
@@ -1358,11 +1358,11 @@ void drcbe_x64::emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_shl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_shl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shl_r32_imm(dst, reg, param.immediate()); // shl reg,param
@@ -1384,7 +1384,7 @@ void drcbe_x64::emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shl_m32_imm(dst, memref, param.immediate()); // shl [dest],param
@@ -1402,11 +1402,11 @@ void drcbe_x64::emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_shr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_shr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shr_r32_imm(dst, reg, param.immediate()); // shr reg,param
@@ -1428,7 +1428,7 @@ void drcbe_x64::emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shr_m32_imm(dst, memref, param.immediate()); // shr [dest],param
@@ -1446,11 +1446,11 @@ void drcbe_x64::emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_sar_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_sar_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_sar_r32_imm(dst, reg, param.immediate()); // sar reg,param
@@ -1472,7 +1472,7 @@ void drcbe_x64::emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_sar_m32_imm(dst, memref, param.immediate()); // sar [dest],param
@@ -1490,11 +1490,11 @@ void drcbe_x64::emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_rol_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_rol_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rol_r32_imm(dst, reg, param.immediate()); // rol reg,param
@@ -1516,7 +1516,7 @@ void drcbe_x64::emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rol_m32_imm(dst, memref, param.immediate()); // rol [dest],param
@@ -1534,11 +1534,11 @@ void drcbe_x64::emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_ror_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_ror_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_ror_r32_imm(dst, reg, param.immediate()); // ror reg,param
@@ -1560,7 +1560,7 @@ void drcbe_x64::emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_ror_m32_imm(dst, memref, param.immediate()); // ror [dest],param
@@ -1578,11 +1578,11 @@ void drcbe_x64::emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_rcl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_rcl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcl_r32_imm(dst, reg, param.immediate()); // rcl reg,param
@@ -1604,7 +1604,7 @@ void drcbe_x64::emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcl_m32_imm(dst, memref, param.immediate()); // rcl [dest],param
@@ -1622,11 +1622,11 @@ void drcbe_x64::emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_rcr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_rcr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcr_r32_imm(dst, reg, param.immediate()); // rcr reg,param
@@ -1648,7 +1648,7 @@ void drcbe_x64::emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcr_m32_imm(dst, memref, param.immediate()); // rcr [dest],param
@@ -1671,7 +1671,7 @@ void drcbe_x64::emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_para
// into a register
//-------------------------------------------------
-void drcbe_x64::emit_mov_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x64::emit_mov_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param)
{
if (param.is_immediate())
{
@@ -1696,7 +1696,7 @@ void drcbe_x64::emit_mov_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
// any flags
//-------------------------------------------------
-void drcbe_x64::emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x64::emit_mov_r64_p64_keepflags(x86code *&dst, uint8_t reg, const be_parameter &param)
{
if (param.is_immediate())
emit_mov_r64_imm(dst, reg, param.immediate()); // mov reg,param
@@ -1715,7 +1715,7 @@ void drcbe_x64::emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reg, const be_pa
// 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_mov_p64_r64(x86code *&dst, const be_parameter &param, UINT8 reg)
+void drcbe_x64::emit_mov_p64_r64(x86code *&dst, const be_parameter &param, uint8_t reg)
{
assert(!param.is_immediate());
if (param.is_memory())
@@ -1733,7 +1733,7 @@ void drcbe_x64::emit_mov_p64_r64(x86code *&dst, const be_parameter &param, UINT8
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_add_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_add_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -1789,7 +1789,7 @@ void drcbe_x64::emit_add_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_adc_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_adc_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -1831,7 +1831,7 @@ void drcbe_x64::emit_adc_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_sub_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_sub_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -1887,7 +1887,7 @@ void drcbe_x64::emit_sub_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_sbb_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_sbb_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -1929,7 +1929,7 @@ void drcbe_x64::emit_sbb_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_cmp_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_cmp_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -1971,7 +1971,7 @@ void drcbe_x64::emit_cmp_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_and_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_and_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -2027,7 +2027,7 @@ void drcbe_x64::emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_test_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_test_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -2070,7 +2070,7 @@ void drcbe_x64::emit_test_m64_p64(x86code *&dst, x86_memref memref, const be_par
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_or_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_or_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -2126,7 +2126,7 @@ void drcbe_x64::emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_param
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_xor_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_xor_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -2186,11 +2186,11 @@ void drcbe_x64::emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_shl_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_shl_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shl_r64_imm(dst, reg, param.immediate()); // shl reg,param
@@ -2212,7 +2212,7 @@ void drcbe_x64::emit_shl_m64_p64(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint64_t)param.immediate() == 0)
;// skip
else
emit_shl_m64_imm(dst, memref, param.immediate()); // shl [dest],param
@@ -2230,11 +2230,11 @@ void drcbe_x64::emit_shl_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_shr_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_shr_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shr_r64_imm(dst, reg, param.immediate()); // shr reg,param
@@ -2256,7 +2256,7 @@ void drcbe_x64::emit_shr_m64_p64(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint64_t)param.immediate() == 0)
;// skip
else
emit_shr_m64_imm(dst, memref, param.immediate()); // shr [dest],param
@@ -2274,11 +2274,11 @@ void drcbe_x64::emit_shr_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_sar_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_sar_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_sar_r64_imm(dst, reg, param.immediate()); // sar reg,param
@@ -2300,7 +2300,7 @@ void drcbe_x64::emit_sar_m64_p64(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint64_t)param.immediate() == 0)
;// skip
else
emit_sar_m64_imm(dst, memref, param.immediate()); // sar [dest],param
@@ -2318,11 +2318,11 @@ void drcbe_x64::emit_sar_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_rol_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_rol_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rol_r64_imm(dst, reg, param.immediate()); // rol reg,param
@@ -2344,7 +2344,7 @@ void drcbe_x64::emit_rol_m64_p64(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint64_t)param.immediate() == 0)
;// skip
else
emit_rol_m64_imm(dst, memref, param.immediate()); // rol [dest],param
@@ -2362,11 +2362,11 @@ void drcbe_x64::emit_rol_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_ror_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_ror_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_ror_r64_imm(dst, reg, param.immediate()); // ror reg,param
@@ -2388,7 +2388,7 @@ void drcbe_x64::emit_ror_m64_p64(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint64_t)param.immediate() == 0)
;// skip
else
emit_ror_m64_imm(dst, memref, param.immediate()); // ror [dest],param
@@ -2406,11 +2406,11 @@ void drcbe_x64::emit_ror_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_rcl_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_rcl_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcl_r64_imm(dst, reg, param.immediate()); // rcl reg,param
@@ -2432,7 +2432,7 @@ void drcbe_x64::emit_rcl_m64_p64(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint64_t)param.immediate() == 0)
;// skip
else
emit_rcl_m64_imm(dst, memref, param.immediate()); // rcl [dest],param
@@ -2450,11 +2450,11 @@ void drcbe_x64::emit_rcl_m64_p64(x86code *&dst, x86_memref memref, const be_para
// register from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_rcr_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x64::emit_rcr_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcr_r64_imm(dst, reg, param.immediate()); // rcr reg,param
@@ -2476,7 +2476,7 @@ void drcbe_x64::emit_rcr_m64_p64(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint64_t)param.immediate() == 0)
;// skip
else
emit_rcr_m64_imm(dst, memref, param.immediate()); // rcr [dest],param
@@ -2499,7 +2499,7 @@ void drcbe_x64::emit_rcr_m64_p64(x86code *&dst, x86_memref memref, const be_para
// into a register
//-------------------------------------------------
-void drcbe_x64::emit_movss_r128_p32(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x64::emit_movss_r128_p32(x86code *&dst, uint8_t reg, const be_parameter &param)
{
assert(!param.is_immediate());
if (param.is_memory())
@@ -2517,7 +2517,7 @@ void drcbe_x64::emit_movss_r128_p32(x86code *&dst, UINT8 reg, const be_parameter
// 32-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_movss_p32_r128(x86code *&dst, const be_parameter &param, UINT8 reg)
+void drcbe_x64::emit_movss_p32_r128(x86code *&dst, const be_parameter &param, uint8_t reg)
{
assert(!param.is_immediate());
if (param.is_memory())
@@ -2535,7 +2535,7 @@ void drcbe_x64::emit_movss_p32_r128(x86code *&dst, const be_parameter &param, UI
// into a register
//-------------------------------------------------
-void drcbe_x64::emit_movsd_r128_p64(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x64::emit_movsd_r128_p64(x86code *&dst, uint8_t reg, const be_parameter &param)
{
assert(!param.is_immediate());
if (param.is_memory())
@@ -2553,7 +2553,7 @@ void drcbe_x64::emit_movsd_r128_p64(x86code *&dst, UINT8 reg, const be_parameter
// 64-bit parameter
//-------------------------------------------------
-void drcbe_x64::emit_movsd_p64_r128(x86code *&dst, const be_parameter &param, UINT8 reg)
+void drcbe_x64::emit_movsd_p64_r128(x86code *&dst, const be_parameter &param, uint8_t reg)
{
assert(!param.is_immediate());
if (param.is_memory())
@@ -2589,12 +2589,12 @@ void drcbe_x64::fixup_label(void *parameter, drccodeptr labelcodeptr)
else if (src[0] == 0xe9)
{
src += 1 + 4;
- ((UINT32 *)src)[-1] = labelcodeptr - src;
+ ((uint32_t *)src)[-1] = labelcodeptr - src;
}
else if (src[0] == 0x0f && (src[1] & 0xf0) == 0x80)
{
src += 2 + 4;
- ((UINT32 *)src)[-1] = labelcodeptr - src;
+ ((uint32_t *)src)[-1] = labelcodeptr - src;
}
else
fatalerror("fixup_label called with invalid jmp source!\n");
@@ -2621,7 +2621,7 @@ void drcbe_x64::fixup_exception(drccodeptr *codeptr, void *param1, void *param2)
// first fixup the jump to get us here
drccodeptr dst = *codeptr;
- ((UINT32 *)src)[-1] = dst - src;
+ ((uint32_t *)src)[-1] = dst - src;
// then store the exception parameter
emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
@@ -2862,8 +2862,8 @@ void drcbe_x64::op_hashjmp(x86code *&dst, const instruction &inst)
// a straight immediate jump is direct, though we need the PC in EAX in case of failure
if (pcp.is_immediate())
{
- UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
- UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
+ uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
+ uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
emit_call_m64(dst, MABS(&m_hash.base()[modep.immediate()][l1val][l2val]));
// call hash[modep][l1val][l2val]
}
@@ -2891,8 +2891,8 @@ void drcbe_x64::op_hashjmp(x86code *&dst, const instruction &inst)
// fixed PC
if (pcp.is_immediate())
{
- UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
- UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
+ uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
+ uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
emit_mov_r64_m64(dst, REG_RDX, MBD(REG_RCX, l1val*8)); // mov rdx,[rcx+l1val*8]
emit_call_m64(dst, MBD(REG_RDX, l2val*8)); // call [l2val*8]
}
@@ -3211,7 +3211,7 @@ void drcbe_x64::op_getflgs(x86code *&dst, const instruction &inst)
int dstreg = dstp.select_register(REG_EAX);
// compute mask for flags
- UINT32 flagmask = 0;
+ uint32_t flagmask = 0;
if (maskp.immediate() & FLAG_C) flagmask |= 0x001;
if (maskp.immediate() & FLAG_V) flagmask |= 0x800;
if (maskp.immediate() & FLAG_Z) flagmask |= 0x040;
@@ -3467,7 +3467,7 @@ void drcbe_x64::op_load(x86code *&dst, const instruction &inst)
int size = scalesizep.size();
// determine the pointer base
- INT32 baseoffs;
+ int32_t baseoffs;
int basereg = get_base_register_and_offset(dst, basep.memory(), REG_RDX, baseoffs);
// pick a target register for the general case
@@ -3531,7 +3531,7 @@ void drcbe_x64::op_loads(x86code *&dst, const instruction &inst)
int size = scalesizep.size();
// determine the pointer base
- INT32 baseoffs;
+ int32_t baseoffs;
int basereg = get_base_register_and_offset(dst, basep.memory(), REG_RDX, baseoffs);
// pick a target register for the general case
@@ -3618,7 +3618,7 @@ void drcbe_x64::op_store(x86code *&dst, const instruction &inst)
int size = scalesizep.size();
// determine the pointer base
- INT32 baseoffs;
+ int32_t baseoffs;
int basereg = get_base_register_and_offset(dst, basep.memory(), REG_RDX, baseoffs);
// pick a source register for the general case
@@ -3930,7 +3930,7 @@ void drcbe_x64::op_carry(x86code *&dst, const instruction &inst)
// degenerate case: source is immediate
if (srcp.is_immediate() && bitp.is_immediate())
{
- if (srcp.immediate() & ((UINT64)1 << bitp.immediate()))
+ if (srcp.immediate() & ((uint64_t)1 << bitp.immediate()))
emit_stc(dst);
else
emit_clc(dst);
@@ -4602,8 +4602,8 @@ void drcbe_x64::op_cmp(x86code *&dst, const instruction &inst)
void drcbe_x64::op_mulu(x86code *&dst, const instruction &inst)
{
- UINT8 zsflags = inst.flags() & (FLAG_Z | FLAG_S);
- UINT8 vflag = inst.flags() & FLAG_V;
+ uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S);
+ uint8_t vflag = inst.flags() & FLAG_V;
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
@@ -4736,8 +4736,8 @@ void drcbe_x64::op_mulu(x86code *&dst, const instruction &inst)
void drcbe_x64::op_muls(x86code *&dst, const instruction &inst)
{
- UINT8 zsflags = inst.flags() & (FLAG_Z | FLAG_S);
- UINT8 vflag = inst.flags() & FLAG_V;
+ uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S);
+ uint8_t vflag = inst.flags() & FLAG_V;
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
@@ -5860,7 +5860,7 @@ void drcbe_x64::op_fload(x86code *&dst, const instruction &inst)
int dstreg = dstp.select_register(REG_XMM0);
// determine the pointer base
- INT32 baseoffs;
+ int32_t baseoffs;
int basereg = get_base_register_and_offset(dst, basep.memory(), REG_RDX, baseoffs);
// 32-bit form
@@ -5913,7 +5913,7 @@ void drcbe_x64::op_fstore(x86code *&dst, const instruction &inst)
int srcreg = srcp.select_register(REG_XMM0);
// determine the pointer base
- INT32 baseoffs;
+ int32_t baseoffs;
int basereg = get_base_register_and_offset(dst, basep.memory(), REG_RDX, baseoffs);
// 32-bit form
diff --git a/src/devices/cpu/drcbex64.h b/src/devices/cpu/drcbex64.h
index fc8b3cae1af..d996c5db8c7 100644
--- a/src/devices/cpu/drcbex64.h
+++ b/src/devices/cpu/drcbex64.h
@@ -28,18 +28,18 @@ namespace drc {
class drcbe_x64 : public drcbe_interface
{
- typedef UINT32 (*x86_entry_point_func)(UINT8 *rbpvalue, x86code *entry);
+ typedef uint32_t (*x86_entry_point_func)(uint8_t *rbpvalue, x86code *entry);
public:
// construction/destruction
- drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits);
+ drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
virtual ~drcbe_x64();
// required overrides
virtual void reset() override;
virtual int execute(uml::code_handle &entry) override;
- virtual void generate(drcuml_block &block, const uml::instruction *instlist, UINT32 numinst) override;
- virtual bool hash_exists(UINT32 mode, UINT32 pc) override;
+ virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
+ virtual bool hash_exists(uint32_t mode, uint32_t pc) override;
virtual void get_info(drcbe_info &info) override;
virtual bool logging() const override { return m_log != nullptr; }
@@ -61,13 +61,13 @@ private:
};
// represents the value of a parameter
- typedef UINT64 be_parameter_value;
+ typedef uint64_t be_parameter_value;
// construction
be_parameter() : m_type(PTYPE_NONE), m_value(0) { }
be_parameter(const be_parameter &param) : m_type(param.m_type), m_value(param.m_value) { }
- be_parameter(UINT64 val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
- be_parameter(drcbe_x64 &drcbe, const uml::parameter &param, UINT32 allowed);
+ be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
+ be_parameter(drcbe_x64 &drcbe, const uml::parameter &param, uint32_t allowed);
// creators for types that don't safely default
static inline be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < x64emit::REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
@@ -82,7 +82,7 @@ private:
// getters
be_parameter_type type() const { return m_type; }
- UINT64 immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
+ uint64_t immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
int ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value < x64emit::REG_MAX); return m_value; }
int freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value < x64emit::REG_MAX); return m_value; }
int vreg() const { assert(m_type == PTYPE_VECTOR_REGISTER); assert(m_value < x64emit::REG_MAX); return m_value; }
@@ -96,7 +96,7 @@ private:
bool is_memory() const { return (m_type == PTYPE_MEMORY); }
// other queries
- bool is_immediate_value(UINT64 value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
+ bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
// helpers
int select_register(int defreg) const;
@@ -114,11 +114,11 @@ private:
// helpers
x86_memref MABS(const void *ptr);
- bool short_immediate(INT64 immediate) const { return (INT32)immediate == immediate; }
+ bool short_immediate(int64_t immediate) const { return (int32_t)immediate == immediate; }
void normalize_commutative(be_parameter &inner, be_parameter &outer);
- INT32 offset_from_rbp(const void *ptr);
- int get_base_register_and_offset(x86code *&dst, void *target, UINT8 reg, INT32 &offset);
- void emit_smart_call_r64(x86code *&dst, x86code *target, UINT8 reg);
+ int32_t offset_from_rbp(const void *ptr);
+ int get_base_register_and_offset(x86code *&dst, void *target, uint8_t reg, int32_t &offset);
+ void emit_smart_call_r64(x86code *&dst, x86code *target, uint8_t reg);
void emit_smart_call_m64(x86code *&dst, x86code **target);
void fixup_label(void *parameter, drccodeptr labelcodeptr);
@@ -212,86 +212,86 @@ private:
void op_icopyf(x86code *&dst, const uml::instruction &inst);
// 32-bit code emission helpers
- void emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param);
- void emit_movsx_r64_p32(x86code *&dst, UINT8 reg, const be_parameter &param);
- void emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param);
+ void emit_mov_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param);
+ void emit_movsx_r64_p32(x86code *&dst, uint8_t reg, const be_parameter &param);
+ void emit_mov_r32_p32_keepflags(x86code *&dst, uint8_t reg, const be_parameter &param);
void emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param);
- void emit_mov_p32_r32(x86code *&dst, const be_parameter &param, UINT8 reg);
- void emit_add_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_mov_p32_r32(x86code *&dst, const be_parameter &param, uint8_t reg);
+ void emit_add_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_adc_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_adc_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sub_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sub_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sbb_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_cmp_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_cmp_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_and_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_and_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_test_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_test_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_or_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_or_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_xor_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_xor_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_shl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_shl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_shr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_shr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sar_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sar_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rol_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rol_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_ror_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_ror_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rcl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rcl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rcr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rcr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
// 64-bit code emission helpers
- void emit_mov_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param);
- void emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param);
- void emit_mov_p64_r64(x86code *&dst, const be_parameter &param, UINT8 reg);
- void emit_add_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_mov_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param);
+ void emit_mov_r64_p64_keepflags(x86code *&dst, uint8_t reg, const be_parameter &param);
+ void emit_mov_p64_r64(x86code *&dst, const be_parameter &param, uint8_t reg);
+ void emit_add_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_add_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_adc_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_adc_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_adc_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sub_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sub_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sub_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sbb_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sbb_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sbb_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_cmp_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_cmp_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_cmp_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_and_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_and_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_test_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_test_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_test_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_or_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_or_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_xor_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_xor_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_shl_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_shl_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_shl_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_shr_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_shr_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_shr_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sar_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sar_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sar_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rol_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rol_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rol_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_ror_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_ror_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_ror_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rcl_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rcl_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rcl_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rcr_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rcr_r64_p64(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rcr_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
// floating-point code emission helpers
- void emit_movss_r128_p32(x86code *&dst, UINT8 reg, const be_parameter &param);
- void emit_movss_p32_r128(x86code *&dst, const be_parameter &param, UINT8 reg);
- void emit_movsd_r128_p64(x86code *&dst, UINT8 reg, const be_parameter &param);
- void emit_movsd_p64_r128(x86code *&dst, const be_parameter &param, UINT8 reg);
+ void emit_movss_r128_p32(x86code *&dst, uint8_t reg, const be_parameter &param);
+ void emit_movss_p32_r128(x86code *&dst, const be_parameter &param, uint8_t reg);
+ void emit_movsd_r128_p64(x86code *&dst, uint8_t reg, const be_parameter &param);
+ void emit_movsd_p64_r128(x86code *&dst, const be_parameter &param, uint8_t reg);
// internal state
drc_hash_table m_hash; // hash table state
@@ -300,9 +300,9 @@ private:
x86log_context * m_log; // logging
bool m_sse41; // do we have SSE4.1 support?
- UINT32 * m_absmask32; // absolute value mask (32-bit)
- UINT64 * m_absmask64; // absolute value mask (32-bit)
- UINT8 * m_rbpvalue; // value of RBP
+ uint32_t * m_absmask32; // absolute value mask (32-bit)
+ uint64_t * m_absmask64; // absolute value mask (32-bit)
+ uint8_t * m_rbpvalue; // value of RBP
x86_entry_point_func m_entry; // entry point
x86code * m_exit; // exit point
@@ -319,17 +319,17 @@ private:
x86code * debug_log_hashjmp_fail; // hashjmp debugging
x86code * drcmap_get_value; // map lookup helper
- UINT32 ssemode; // saved SSE mode
- UINT32 ssemodesave; // temporary location for saving
- UINT32 ssecontrol[4]; // copy of the sse_control array
+ uint32_t ssemode; // saved SSE mode
+ uint32_t ssemodesave; // temporary location for saving
+ uint32_t ssecontrol[4]; // copy of the sse_control array
float single1; // 1.0 is single-precision
double double1; // 1.0 in double-precision
void * stacksave; // saved stack pointer
void * hashstacksave; // saved stack pointer for hashjmp
- UINT8 flagsmap[0x1000]; // flags map
- UINT64 flagsunmap[0x20]; // flags unmapper
+ uint8_t flagsmap[0x1000]; // flags map
+ uint64_t flagsunmap[0x20]; // flags unmapper
};
near_state & m_near;
diff --git a/src/devices/cpu/drcbex86.cpp b/src/devices/cpu/drcbex86.cpp
index 4bd869b410d..53dbe1eb347 100644
--- a/src/devices/cpu/drcbex86.cpp
+++ b/src/devices/cpu/drcbex86.cpp
@@ -115,15 +115,15 @@ using x86emit::REG_EDI;
// CONSTANTS
//**************************************************************************
-const UINT32 PTYPE_M = 1 << parameter::PTYPE_MEMORY;
-const UINT32 PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
-const UINT32 PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
-const UINT32 PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
-//const UINT32 PTYPE_MI = PTYPE_M | PTYPE_I;
-//const UINT32 PTYPE_RI = PTYPE_R | PTYPE_I;
-const UINT32 PTYPE_MR = PTYPE_M | PTYPE_R;
-const UINT32 PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
-const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F;
+const uint32_t PTYPE_M = 1 << parameter::PTYPE_MEMORY;
+const uint32_t PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
+const uint32_t PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
+const uint32_t PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
+//const uint32_t PTYPE_MI = PTYPE_M | PTYPE_I;
+//const uint32_t PTYPE_RI = PTYPE_R | PTYPE_I;
+const uint32_t PTYPE_MR = PTYPE_M | PTYPE_R;
+const uint32_t PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
+const uint32_t PTYPE_MF = PTYPE_M | PTYPE_F;
@@ -148,20 +148,20 @@ const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F;
drcbe_x86::opcode_generate_func drcbe_x86::s_opcode_table[OP_MAX];
// size-to-mask table
-//static const UINT64 size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) };
+//static const uint64_t size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) };
// register mapping tables
-static const UINT8 int_register_map[REG_I_COUNT] =
+static const uint8_t int_register_map[REG_I_COUNT] =
{
REG_EBX, REG_ESI, REG_EDI, REG_EBP
};
// flags mapping tables
-static UINT8 flags_map[0x1000];
-static UINT32 flags_unmap[0x20];
+static uint8_t flags_map[0x1000];
+static uint32_t flags_unmap[0x20];
// condition mapping table
-static const UINT8 condition_map[uml::COND_MAX - uml::COND_Z] =
+static const uint8_t condition_map[uml::COND_MAX - uml::COND_Z] =
{
x86emit::COND_Z, // COND_Z = 0x80, requires Z
x86emit::COND_NZ, // COND_NZ, requires Z
@@ -182,7 +182,7 @@ static const UINT8 condition_map[uml::COND_MAX - uml::COND_Z] =
};
// FPU control register mapping
-static const UINT16 fp_control[4] =
+static const uint16_t fp_control[4] =
{
0x0e3f, // ROUND_TRUNC
0x023f, // ROUND_ROUND
@@ -298,7 +298,7 @@ const drcbe_x86::opcode_table_entry drcbe_x86::s_opcode_table_source[] =
// into a reduced set
//-------------------------------------------------
-drcbe_x86::be_parameter::be_parameter(drcbe_x86 &drcbe, const parameter &param, UINT32 allowed)
+drcbe_x86::be_parameter::be_parameter(drcbe_x86 &drcbe, const parameter &param, uint32_t allowed)
{
int regnum;
@@ -447,12 +447,12 @@ inline void drcbe_x86::reset_last_upper_lower_reg()
// loaded a lower register
//-------------------------------------------------
-inline void drcbe_x86::set_last_lower_reg(x86code *&dst, const be_parameter &param, UINT8 reglo)
+inline void drcbe_x86::set_last_lower_reg(x86code *&dst, const be_parameter &param, uint8_t reglo)
{
if (param.is_memory())
{
m_last_lower_reg = reglo;
- m_last_lower_addr = (UINT32 *)((uintptr_t)param.memory());
+ m_last_lower_addr = (uint32_t *)((uintptr_t)param.memory());
m_last_lower_pc = dst;
}
}
@@ -463,10 +463,10 @@ inline void drcbe_x86::set_last_lower_reg(x86code *&dst, const be_parameter &par
// loaded an upper register
//-------------------------------------------------
-inline void drcbe_x86::set_last_upper_reg(x86code *&dst, const be_parameter &param, UINT8 reghi)
+inline void drcbe_x86::set_last_upper_reg(x86code *&dst, const be_parameter &param, uint8_t reghi)
{
m_last_upper_reg = reghi;
- m_last_upper_addr = (param.is_int_register()) ? m_reghi[param.ireg()] : (UINT32 *)((uintptr_t)param.memory(4));
+ m_last_upper_addr = (param.is_int_register()) ? m_reghi[param.ireg()] : (uint32_t *)((uintptr_t)param.memory(4));
m_last_upper_pc = dst;
}
@@ -476,7 +476,7 @@ inline void drcbe_x86::set_last_upper_reg(x86code *&dst, const be_parameter &par
// skip re-loading a lower half of a register
//-------------------------------------------------
-inline bool drcbe_x86::can_skip_lower_load(x86code *&dst, UINT32 *memref, UINT8 reglo)
+inline bool drcbe_x86::can_skip_lower_load(x86code *&dst, uint32_t *memref, uint8_t reglo)
{
return (dst == m_last_lower_pc && memref == m_last_lower_addr && reglo == m_last_lower_reg);
}
@@ -487,7 +487,7 @@ inline bool drcbe_x86::can_skip_lower_load(x86code *&dst, UINT32 *memref, UINT8
// skip re-loading an upper half of a register
//-------------------------------------------------
-inline bool drcbe_x86::can_skip_upper_load(x86code *&dst, UINT32 *memref, UINT8 reghi)
+inline bool drcbe_x86::can_skip_upper_load(x86code *&dst, uint32_t *memref, uint8_t reghi)
{
return (dst == m_last_upper_pc && memref == m_last_upper_addr && reghi == m_last_upper_reg);
}
@@ -516,7 +516,7 @@ inline void drcbe_x86::track_resolve_link(x86code *&destptr, const emit_link &li
// drcbe_x86 - constructor
//-------------------------------------------------
-drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
+drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits)
: drcbe_interface(drcuml, cache, device),
m_hash(cache, modes, addrbits, ignorebits),
m_map(cache, 0),
@@ -556,7 +556,7 @@ drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, U
// build the flags map (static but it doesn't hurt to regenerate it)
for (int entry = 0; entry < ARRAY_LENGTH(flags_map); entry++)
{
- UINT8 flags = 0;
+ uint8_t flags = 0;
if (entry & 0x001) flags |= FLAG_C;
if (entry & 0x004) flags |= FLAG_U;
if (entry & 0x040) flags |= FLAG_Z;
@@ -566,7 +566,7 @@ drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, U
}
for (int entry = 0; entry < ARRAY_LENGTH(flags_unmap); entry++)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
if (entry & FLAG_C) flags |= 0x001;
if (entry & FLAG_U) flags |= 0x004;
if (entry & FLAG_Z) flags |= 0x040;
@@ -618,7 +618,7 @@ void drcbe_x86::reset()
x86code *dst = (x86code *)*cachetop;
// generate a simple CPUID stub
- UINT32 (*cpuid_ecx_stub)(void) = (UINT32 (*)(void))dst;
+ uint32_t (*cpuid_ecx_stub)(void) = (uint32_t (*)(void))dst;
emit_push_r32(dst, REG_EBX); // push ebx
emit_mov_r32_imm(dst, REG_EAX, 1); // mov eax,1
emit_cpuid(dst); // cpuid
@@ -767,7 +767,7 @@ int drcbe_x86::execute(code_handle &entry)
// drcbex86_generate - generate code
//-------------------------------------------------
-void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, UINT32 numinst)
+void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst)
{
// tell all of our utility objects that a block is beginning
m_hash.block_begin(block, instlist, numinst);
@@ -803,7 +803,7 @@ void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, UINT3
if (inst.opcode() == OP_HANDLE)
blockname = inst.param(0).handle().string();
else if (inst.opcode() == OP_HASH)
- blockname = string_format("Code: mode=%d PC=%08X", (UINT32)inst.param(0).immediate(), (offs_t)inst.param(1).immediate()).c_str();
+ blockname = string_format("Code: mode=%d PC=%08X", (uint32_t)inst.param(0).immediate(), (offs_t)inst.param(1).immediate()).c_str();
}
// generate code
@@ -830,7 +830,7 @@ void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, UINT3
// given mode/pc exists in the hash table
//-------------------------------------------------
-bool drcbe_x86::hash_exists(UINT32 mode, UINT32 pc)
+bool drcbe_x86::hash_exists(uint32_t mode, uint32_t pc)
{
return m_hash.code_exists(mode, pc);
}
@@ -860,7 +860,7 @@ void drcbe_x86::get_info(drcbe_info &info)
// into a register
//-------------------------------------------------
-void drcbe_x86::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x86::emit_mov_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param)
{
if (param.is_immediate())
{
@@ -885,13 +885,13 @@ void drcbe_x86::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
// any flags
//-------------------------------------------------
-void drcbe_x86::emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param)
+void drcbe_x86::emit_mov_r32_p32_keepflags(x86code *&dst, uint8_t reg, const be_parameter &param)
{
if (param.is_immediate())
emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
else if (param.is_memory())
{
- if (!can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), reg))
+ if (!can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), reg))
emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
}
else if (param.is_int_register())
@@ -913,7 +913,7 @@ void drcbe_x86::emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_para
emit_mov_m32_imm(dst, memref, param.immediate()); // mov [mem],param
else if (param.is_memory())
{
- if (!can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), REG_EAX))
+ if (!can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), REG_EAX))
emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param]
emit_mov_m32_r32(dst, memref, REG_EAX); // mov [mem],eax
}
@@ -927,7 +927,7 @@ void drcbe_x86::emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_para
// 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_mov_p32_r32(x86code *&dst, const be_parameter &param, UINT8 reg)
+void drcbe_x86::emit_mov_p32_r32(x86code *&dst, const be_parameter &param, uint8_t reg)
{
assert(!param.is_immediate());
if (param.is_memory())
@@ -948,7 +948,7 @@ void drcbe_x86::emit_mov_p32_r32(x86code *&dst, const be_parameter &param, UINT8
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_add_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_add_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -988,7 +988,7 @@ void drcbe_x86::emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_adc_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
emit_adc_r32_imm(dst, reg, param.immediate()); // adc reg,param
@@ -1022,7 +1022,7 @@ void drcbe_x86::emit_adc_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_sub_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_sub_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
@@ -1062,7 +1062,7 @@ void drcbe_x86::emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_sbb_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
emit_sbb_r32_imm(dst, reg, param.immediate()); // sbb reg,param
@@ -1096,7 +1096,7 @@ void drcbe_x86::emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_cmp_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
emit_cmp_r32_imm(dst, reg, param.immediate()); // cmp reg,param
@@ -1130,13 +1130,13 @@ void drcbe_x86::emit_cmp_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_and_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_and_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
else
emit_and_r32_imm(dst, reg, param.immediate()); // and reg,param
@@ -1157,9 +1157,9 @@ void drcbe_x86::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
else
emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
@@ -1178,7 +1178,7 @@ void drcbe_x86::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_test_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
emit_test_r32_imm(dst, reg, param.immediate()); // test reg,param
@@ -1213,13 +1213,13 @@ void drcbe_x86::emit_test_m32_p32(x86code *&dst, x86_memref memref, const be_par
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_or_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_or_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_mov_r32_imm(dst, reg, ~0); // mov reg,-1
else
emit_or_r32_imm(dst, reg, param.immediate()); // or reg,param
@@ -1240,9 +1240,9 @@ void drcbe_x86::emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_param
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_mov_m32_imm(dst, memref, ~0); // mov [dest],-1
else
emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
@@ -1261,13 +1261,13 @@ void drcbe_x86::emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_param
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_xor_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_xor_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_not_r32(dst, reg); // not reg
else
emit_xor_r32_imm(dst, reg, param.immediate()); // xor reg,param
@@ -1288,9 +1288,9 @@ void drcbe_x86::emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_not_m32(dst, memref); // not [dest]
else
emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
@@ -1309,11 +1309,11 @@ void drcbe_x86::emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_shl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_shl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shl_r32_imm(dst, reg, param.immediate()); // shl reg,param
@@ -1335,7 +1335,7 @@ void drcbe_x86::emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shl_m32_imm(dst, memref, param.immediate()); // shl [dest],param
@@ -1353,11 +1353,11 @@ void drcbe_x86::emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_shr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_shr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shr_r32_imm(dst, reg, param.immediate()); // shr reg,param
@@ -1379,7 +1379,7 @@ void drcbe_x86::emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_shr_m32_imm(dst, memref, param.immediate()); // shr [dest],param
@@ -1397,11 +1397,11 @@ void drcbe_x86::emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_sar_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_sar_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_sar_r32_imm(dst, reg, param.immediate()); // sar reg,param
@@ -1423,7 +1423,7 @@ void drcbe_x86::emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_sar_m32_imm(dst, memref, param.immediate()); // sar [dest],param
@@ -1441,11 +1441,11 @@ void drcbe_x86::emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_rol_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_rol_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rol_r32_imm(dst, reg, param.immediate()); // rol reg,param
@@ -1467,7 +1467,7 @@ void drcbe_x86::emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rol_m32_imm(dst, memref, param.immediate()); // rol [dest],param
@@ -1485,11 +1485,11 @@ void drcbe_x86::emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_ror_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_ror_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_ror_r32_imm(dst, reg, param.immediate()); // ror reg,param
@@ -1511,7 +1511,7 @@ void drcbe_x86::emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_ror_m32_imm(dst, memref, param.immediate()); // ror [dest],param
@@ -1529,11 +1529,11 @@ void drcbe_x86::emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_rcl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_rcl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcl_r32_imm(dst, reg, param.immediate()); // rcl reg,param
@@ -1555,7 +1555,7 @@ void drcbe_x86::emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcl_m32_imm(dst, memref, param.immediate()); // rcl [dest],param
@@ -1573,11 +1573,11 @@ void drcbe_x86::emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_para
// register from a 32-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_rcr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_rcr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcr_r32_imm(dst, reg, param.immediate()); // rcr reg,param
@@ -1599,7 +1599,7 @@ void drcbe_x86::emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
else
emit_rcr_m32_imm(dst, memref, param.immediate()); // rcr [dest],param
@@ -1622,27 +1622,27 @@ void drcbe_x86::emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_para
// into a pair of registers
//-------------------------------------------------
-void drcbe_x86::emit_mov_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param)
+void drcbe_x86::emit_mov_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param)
{
if (param.is_immediate())
{
if (reglo == REG_NONE)
;
- else if ((UINT32)param.immediate() == 0)
+ else if ((uint32_t)param.immediate() == 0)
emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
else
emit_mov_r32_imm(dst, reglo, param.immediate()); // mov reglo,param
if (reghi == REG_NONE)
;
- else if ((UINT32)(param.immediate() >> 32) == 0)
+ else if ((uint32_t)(param.immediate() >> 32) == 0)
emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
else
emit_mov_r32_imm(dst, reghi, param.immediate() >> 32); // mov reghi,param >> 32
}
else if (param.is_memory())
{
- int skip_lower = can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), reglo);
- int skip_upper = can_skip_upper_load(dst, (UINT32 *)((uintptr_t)param.memory(4)), reghi);
+ int skip_lower = can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), reglo);
+ int skip_upper = can_skip_upper_load(dst, (uint32_t *)((uintptr_t)param.memory(4)), reghi);
if (reglo != REG_NONE && !skip_lower)
emit_mov_r32_m32(dst, reglo, MABS(param.memory())); // mov reglo,[param]
if (reghi != REG_NONE && !skip_upper)
@@ -1665,7 +1665,7 @@ void drcbe_x86::emit_mov_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
// affecting any flags
//-------------------------------------------------
-void drcbe_x86::emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param)
+void drcbe_x86::emit_mov_r64_p64_keepflags(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param)
{
if (param.is_immediate())
{
@@ -1676,8 +1676,8 @@ void drcbe_x86::emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reglo, UINT8 reg
}
else if (param.is_memory())
{
- int skip_lower = can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), reglo);
- int skip_upper = can_skip_upper_load(dst, (UINT32 *)((uintptr_t)param.memory(4)), reghi);
+ int skip_lower = can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), reglo);
+ int skip_upper = can_skip_upper_load(dst, (uint32_t *)((uintptr_t)param.memory(4)), reghi);
if (reglo != REG_NONE && !skip_lower)
emit_mov_r32_m32(dst, reglo, MABS(param.memory())); // mov reglo,[param]
if (reghi != REG_NONE && !skip_upper)
@@ -1708,7 +1708,7 @@ void drcbe_x86::emit_mov_m64_p64(x86code *&dst, x86_memref memref, const be_para
}
else if (param.is_memory())
{
- int skip_lower = can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), REG_EAX);
+ int skip_lower = can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), REG_EAX);
if (!skip_lower)
emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param]
emit_mov_m32_r32(dst, memref + 0, REG_EAX); // mov [mem],eax
@@ -1729,7 +1729,7 @@ void drcbe_x86::emit_mov_m64_p64(x86code *&dst, x86_memref memref, const be_para
// into a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_mov_p64_r64(x86code *&dst, const be_parameter &param, UINT8 reglo, UINT8 reghi)
+void drcbe_x86::emit_mov_p64_r64(x86code *&dst, const be_parameter &param, uint8_t reglo, uint8_t reghi)
{
assert(!param.is_immediate());
if (param.is_memory())
@@ -1753,7 +1753,7 @@ void drcbe_x86::emit_mov_p64_r64(x86code *&dst, const be_parameter &param, UINT8
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_add_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_add_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -1811,7 +1811,7 @@ void drcbe_x86::emit_add_m64_p64(x86code *&dst, x86_memref memref, const be_para
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_adc_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_adc_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -1869,7 +1869,7 @@ void drcbe_x86::emit_adc_m64_p64(x86code *&dst, x86_memref memref, const be_para
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_sub_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_sub_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -1927,7 +1927,7 @@ void drcbe_x86::emit_sub_m64_p64(x86code *&dst, x86_memref memref, const be_para
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_sbb_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_sbb_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -1985,7 +1985,7 @@ void drcbe_x86::emit_sbb_m64_p64(x86code *&dst, x86_memref memref, const be_para
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_cmp_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_cmp_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = (inst.flags() != FLAG_Z && (inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -2018,7 +2018,7 @@ void drcbe_x86::emit_cmp_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_and_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_and_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -2029,16 +2029,16 @@ void drcbe_x86::emit_and_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
}
else if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
else
emit_and_r32_imm(dst, reglo, param.immediate()); // and reglo,param
if (saveflags) emit_pushf(dst); // pushf
- if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
+ if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff)
;// skip
- else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
+ else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0)
emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
else
emit_and_r32_imm(dst, reghi, param.immediate() >> 32); // and reghi,param >> 32
@@ -2064,16 +2064,16 @@ void drcbe_x86::emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_para
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
else
emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
if (saveflags) emit_pushf(dst); // pushf
- if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
+ if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff)
;// skip
- else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
+ else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0)
emit_mov_m32_imm(dst, memref + 4, 0); // mov [dest+4],0
else
emit_and_m32_imm(dst, memref + 4, param.immediate() >> 32); // and [dest+4],param >> 32
@@ -2096,7 +2096,7 @@ void drcbe_x86::emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_para
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_test_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_test_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -2154,7 +2154,7 @@ void drcbe_x86::emit_test_m64_p64(x86code *&dst, x86_memref memref, const be_par
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_or_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_or_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -2165,16 +2165,16 @@ void drcbe_x86::emit_or_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const b
}
else if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_mov_r32_imm(dst, reglo, ~0); // mov reglo,-1
else
emit_or_r32_imm(dst, reglo, param.immediate()); // or reglo,param
if (saveflags) emit_pushf(dst); // pushf
- if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
+ if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff)
emit_mov_r32_imm(dst, reghi, ~0); // mov reghi,-1
else
emit_or_r32_imm(dst, reghi, param.immediate() >> 32); // or reghi,param >> 32
@@ -2200,16 +2200,16 @@ void drcbe_x86::emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_param
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_mov_m32_imm(dst, memref, ~0); // mov [dest],-1
else
emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
if (saveflags) emit_pushf(dst); // pushf
- if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
+ if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff)
emit_mov_m32_imm(dst, memref + 4, ~0); // mov [dest+4],-1
else
emit_or_m32_imm(dst, memref + 4, param.immediate() >> 32); // or [dest+4],param >> 32
@@ -2232,7 +2232,7 @@ void drcbe_x86::emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_param
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_xor_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_xor_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
@@ -2243,16 +2243,16 @@ void drcbe_x86::emit_xor_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
}
else if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_not_r32(dst, reglo); // not reglo
else
emit_xor_r32_imm(dst, reglo, param.immediate()); // xor reglo,param
if (saveflags) emit_pushf(dst); // pushf
- if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
+ if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff)
emit_not_r32(dst, reghi); // not reghi
else
emit_xor_r32_imm(dst, reghi, param.immediate() >> 32); // xor reghi,param >> 32
@@ -2278,16 +2278,16 @@ void drcbe_x86::emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_para
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
{
- if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
+ if (inst.flags() == 0 && (uint32_t)param.immediate() == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff)
emit_not_m32(dst, memref); // not [dest]
else
emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
if (saveflags) emit_pushf(dst); // pushf
- if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
+ if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0)
;// skip
- else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
+ else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff)
emit_not_m32(dst, memref + 4); // not [dest+4]
else
emit_xor_m32_imm(dst, memref + 4, param.immediate() >> 32); // xor [dest+4],param >> 32
@@ -2310,7 +2310,7 @@ void drcbe_x86::emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_para
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_shl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_shl_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = (inst.flags() != 0);
if (param.is_immediate())
@@ -2381,7 +2381,7 @@ void drcbe_x86::emit_shl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_shr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_shr_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
@@ -2452,7 +2452,7 @@ void drcbe_x86::emit_shr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_sar_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_sar_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
@@ -2523,7 +2523,7 @@ void drcbe_x86::emit_sar_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_rol_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_rol_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
@@ -2598,7 +2598,7 @@ void drcbe_x86::emit_rol_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_ror_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_ror_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
@@ -2673,7 +2673,7 @@ void drcbe_x86::emit_ror_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_rcl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_rcl_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = ((inst.flags() & FLAG_Z) != 0);
emit_link skipall, skiploop;
@@ -2715,7 +2715,7 @@ void drcbe_x86::emit_rcl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
// pair of registers from a 64-bit parameter
//-------------------------------------------------
-void drcbe_x86::emit_rcr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const instruction &inst)
+void drcbe_x86::emit_rcr_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const instruction &inst)
{
int saveflags = (inst.flags() != 0);
emit_link skipall, skiploop;
@@ -2812,12 +2812,12 @@ void drcbe_x86::fixup_label(void *parameter, drccodeptr labelcodeptr)
else if (src[0] == 0xe9)
{
src += 1 + 4;
- ((UINT32 *)src)[-1] = labelcodeptr - src;
+ ((uint32_t *)src)[-1] = labelcodeptr - src;
}
else if (src[0] == 0x0f && (src[1] & 0xf0) == 0x80)
{
src += 2 + 4;
- ((UINT32 *)src)[-1] = labelcodeptr - src;
+ ((uint32_t *)src)[-1] = labelcodeptr - src;
}
else
fatalerror("fixup_label called with invalid jmp source!\n");
@@ -2844,7 +2844,7 @@ void drcbe_x86::fixup_exception(drccodeptr *codeptr, void *param1, void *param2)
// first fixup the jump to get us here
drccodeptr dst = *codeptr;
- ((UINT32 *)src)[-1] = dst - src;
+ ((uint32_t *)src)[-1] = dst - src;
// then store the exception parameter
emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
@@ -3076,8 +3076,8 @@ void drcbe_x86::op_hashjmp(x86code *&dst, const instruction &inst)
// a straight immediate jump is direct, though we need the PC in EAX in case of failure
if (pcp.is_immediate())
{
- UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
- UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
+ uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
+ uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
emit_call_m32(dst, MABS(&m_hash.base()[modep.immediate()][l1val][l2val])); // call hash[modep][l1val][l2val]
}
@@ -3103,8 +3103,8 @@ void drcbe_x86::op_hashjmp(x86code *&dst, const instruction &inst)
// fixed PC
if (pcp.is_immediate())
{
- UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
- UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
+ uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
+ uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
emit_mov_r32_m32(dst, REG_EDX, MBD(REG_ECX, l1val*4)); // mov edx,[ecx+l1val*4]
emit_call_m32(dst, MBD(REG_EDX, l2val*4)); // call [l2val*4]
}
@@ -3416,7 +3416,7 @@ void drcbe_x86::op_getflgs(x86code *&dst, const instruction &inst)
int dstreg = dstp.select_register(REG_EAX);
// compute mask for flags
- UINT32 flagmask = 0;
+ uint32_t flagmask = 0;
if (maskp.immediate() & FLAG_C) flagmask |= 0x001;
if (maskp.immediate() & FLAG_V) flagmask |= 0x800;
if (maskp.immediate() & FLAG_Z) flagmask |= 0x040;
@@ -4097,7 +4097,7 @@ void drcbe_x86::op_carry(x86code *&dst, const instruction &inst)
// degenerate case: source is immediate
if (srcp.is_immediate() && bitp.is_immediate())
{
- if (srcp.immediate() & ((UINT64)1 << bitp.immediate()))
+ if (srcp.immediate() & ((uint64_t)1 << bitp.immediate()))
emit_stc(dst);
else
emit_clc(dst);
@@ -4769,8 +4769,8 @@ void drcbe_x86::op_cmp(x86code *&dst, const instruction &inst)
void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst)
{
- UINT8 zsflags = inst.flags() & (FLAG_Z | FLAG_S);
- UINT8 vflag = inst.flags() & FLAG_V;
+ uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S);
+ uint8_t vflag = inst.flags() & FLAG_V;
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
@@ -4855,13 +4855,13 @@ void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst)
emit_call(dst, (x86code *)dmulu); // call dmulu
if (inst.flags() != 0)
emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
if (compute_hi)
{
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
- emit_mov_r32_m32(dst, REG_ECX, MABS((UINT32 *)&m_reshi + 1)); // mov ecx,reshi.hi
+ emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reshi + 0)); // mov eax,reshi.lo
+ emit_mov_r32_m32(dst, REG_ECX, MABS((uint32_t *)&m_reshi + 1)); // mov ecx,reshi.hi
emit_mov_p64_r64(dst, edstp, REG_EAX, REG_ECX); // mov edstp,ecx:eax
}
if (inst.flags() != 0)
@@ -4876,8 +4876,8 @@ void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst)
void drcbe_x86::op_muls(x86code *&dst, const instruction &inst)
{
- UINT8 zsflags = inst.flags() & (FLAG_Z | FLAG_S);
- UINT8 vflag = inst.flags() & FLAG_V;
+ uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S);
+ uint8_t vflag = inst.flags() & FLAG_V;
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
@@ -4985,13 +4985,13 @@ void drcbe_x86::op_muls(x86code *&dst, const instruction &inst)
emit_call(dst, (x86code *)dmuls); // call dmuls
if (inst.flags() != 0)
emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
if (compute_hi)
{
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
+ emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reshi + 0)); // mov eax,reshi.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reshi + 1)); // mov edx,reshi.hi
emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
}
if (inst.flags() != 0)
@@ -5055,13 +5055,13 @@ void drcbe_x86::op_divu(x86code *&dst, const instruction &inst)
emit_call(dst, (x86code *)ddivu); // call ddivu
if (inst.flags() != 0)
emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
if (compute_rem)
{
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
+ emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reshi + 0)); // mov eax,reshi.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reshi + 1)); // mov edx,reshi.hi
emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
}
if (inst.flags() != 0)
@@ -5125,13 +5125,13 @@ void drcbe_x86::op_divs(x86code *&dst, const instruction &inst)
emit_call(dst, (x86code *)ddivs); // call ddivs
if (inst.flags() != 0)
emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
if (compute_rem)
{
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
+ emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reshi + 0)); // mov eax,reshi.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reshi + 1)); // mov edx,reshi.hi
emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
}
if (inst.flags() != 0)
@@ -6206,7 +6206,7 @@ void drcbe_x86::op_ffrint(x86code *&dst, const instruction &inst)
if (srcp.is_immediate())
{
emit_mov_m32_imm(dst, MABS(&m_fptemp), srcp.immediate()); // mov [fptemp],srcp
- emit_mov_m32_imm(dst, MABS((UINT8 *)&m_fptemp + 4), srcp.immediate()); // mov [fptemp+4],srcp
+ emit_mov_m32_imm(dst, MABS((uint8_t *)&m_fptemp + 4), srcp.immediate()); // mov [fptemp+4],srcp
emit_fild_m64(dst, MABS(&m_fptemp)); // fild [fptemp]
}
else if (srcp.is_memory())
@@ -6615,7 +6615,7 @@ void drcbe_x86::op_icopyf(x86code *&dst, const instruction &inst)
// dmulu - perform a double-wide unsigned multiply
//-------------------------------------------------
-int drcbe_x86::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int flags)
+int drcbe_x86::dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, int flags)
{
// shortcut if we don't care about the high bits or the flags
if (&dstlo == &dsthi && flags == 0)
@@ -6625,8 +6625,8 @@ int drcbe_x86::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int
}
// fetch source values
- UINT64 a = src1;
- UINT64 b = src2;
+ uint64_t a = src1;
+ uint64_t b = src2;
if (a == 0 || b == 0)
{
dsthi = dstlo = 0;
@@ -6634,17 +6634,17 @@ int drcbe_x86::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int
}
// compute high and low parts first
- UINT64 lo = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 0);
- UINT64 hi = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 32);
+ uint64_t lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0);
+ uint64_t hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32);
// compute middle parts
- UINT64 prevlo = lo;
- UINT64 temp = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 0);
+ uint64_t prevlo = lo;
+ uint64_t temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0);
lo += temp << 32;
hi += (temp >> 32) + (lo < prevlo);
prevlo = lo;
- temp = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 32);
+ temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32);
lo += temp << 32;
hi += (temp >> 32) + (lo < prevlo);
@@ -6659,10 +6659,10 @@ int drcbe_x86::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int
// dmuls - perform a double-wide signed multiply
//-------------------------------------------------
-int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int flags)
+int drcbe_x86::dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, int flags)
{
- UINT64 lo, hi, prevlo;
- UINT64 a, b, temp;
+ uint64_t lo, hi, prevlo;
+ uint64_t a, b, temp;
// shortcut if we don't care about the high bits or the flags
if (&dstlo == &dsthi && flags == 0)
@@ -6672,8 +6672,8 @@ int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int f
}
// fetch absolute source values
- a = src1; if ((INT64)a < 0) a = -a;
- b = src2; if ((INT64)b < 0) b = -b;
+ a = src1; if ((int64_t)a < 0) a = -a;
+ b = src2; if ((int64_t)b < 0) b = -b;
if (a == 0 || b == 0)
{
dsthi = dstlo = 0;
@@ -6681,22 +6681,22 @@ int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int f
}
// compute high and low parts first
- lo = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 0);
- hi = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 32);
+ lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0);
+ hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32);
// compute middle parts
prevlo = lo;
- temp = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 0);
+ temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0);
lo += temp << 32;
hi += (temp >> 32) + (lo < prevlo);
prevlo = lo;
- temp = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 32);
+ temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32);
lo += temp << 32;
hi += (temp >> 32) + (lo < prevlo);
// adjust for signage
- if ((INT64)(src1 ^ src2) < 0)
+ if ((int64_t)(src1 ^ src2) < 0)
{
hi = ~hi + (lo == 0);
lo = ~lo + 1;
@@ -6705,7 +6705,7 @@ int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int f
// store the results
dsthi = hi;
dstlo = lo;
- return ((hi >> 60) & FLAG_S) | ((dsthi != ((INT64)lo >> 63)) << 1);
+ return ((hi >> 60) & FLAG_S) | ((dsthi != ((int64_t)lo >> 63)) << 1);
}
@@ -6713,7 +6713,7 @@ int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int f
// ddivu - perform a double-wide unsigned divide
//-------------------------------------------------
-int drcbe_x86::ddivu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2)
+int drcbe_x86::ddivu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2)
{
// do nothing if src2 == 0
if (src2 == 0)
@@ -6731,7 +6731,7 @@ int drcbe_x86::ddivu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2)
// ddivs - perform a double-wide signed divide
//-------------------------------------------------
-int drcbe_x86::ddivs(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2)
+int drcbe_x86::ddivs(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2)
{
// do nothing if src2 == 0
if (src2 == 0)
diff --git a/src/devices/cpu/drcbex86.h b/src/devices/cpu/drcbex86.h
index c5c462c36b1..b7baaf8c9a7 100644
--- a/src/devices/cpu/drcbex86.h
+++ b/src/devices/cpu/drcbex86.h
@@ -29,18 +29,18 @@ namespace drc {
class drcbe_x86 : public drcbe_interface
{
- typedef UINT32 (*x86_entry_point_func)(x86code *entry);
+ typedef uint32_t (*x86_entry_point_func)(x86code *entry);
public:
// construction/destruction
- drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits);
+ drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
virtual ~drcbe_x86();
// required overrides
virtual void reset() override;
virtual int execute(uml::code_handle &entry) override;
- virtual void generate(drcuml_block &block, const uml::instruction *instlist, UINT32 numinst) override;
- virtual bool hash_exists(UINT32 mode, UINT32 pc) override;
+ virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
+ virtual bool hash_exists(uint32_t mode, uint32_t pc) override;
virtual void get_info(drcbe_info &info) override;
virtual bool logging() const override { return m_log != nullptr; }
@@ -62,13 +62,13 @@ private:
};
// represents the value of a parameter
- typedef UINT64 be_parameter_value;
+ typedef uint64_t be_parameter_value;
// construction
be_parameter() : m_type(PTYPE_NONE), m_value(0) { }
be_parameter(const be_parameter &param) : m_type(param.m_type), m_value(param.m_value) { }
- be_parameter(UINT64 val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
- be_parameter(drcbe_x86 &drcbe, const uml::parameter &param, UINT32 allowed);
+ be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
+ be_parameter(drcbe_x86 &drcbe, const uml::parameter &param, uint32_t allowed);
// creators for types that don't safely default
static inline be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < x86emit::REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
@@ -83,11 +83,11 @@ private:
// getters
be_parameter_type type() const { return m_type; }
- UINT64 immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
+ uint64_t immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
int ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value < x86emit::REG_MAX); return m_value; }
int freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value < x86emit::REG_MAX); return m_value; }
int vreg() const { assert(m_type == PTYPE_VECTOR_REGISTER); assert(m_value < x86emit::REG_MAX); return m_value; }
- void *memory(UINT32 offset = 0) const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value + offset); }
+ void *memory(uint32_t offset = 0) const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value + offset); }
// type queries
bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
@@ -97,7 +97,7 @@ private:
bool is_memory() const { return (m_type == PTYPE_MEMORY); }
// other queries
- bool is_immediate_value(UINT64 value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
+ bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
// helpers
int select_register(int defreg) const;
@@ -118,10 +118,10 @@ private:
void emit_combine_z_flags(x86code *&dst);
void emit_combine_z_shl_flags(x86code *&dst);
void reset_last_upper_lower_reg();
- void set_last_lower_reg(x86code *&dst, const be_parameter &param, UINT8 reglo);
- void set_last_upper_reg(x86code *&dst, const be_parameter &param, UINT8 reghi);
- bool can_skip_lower_load(x86code *&dst, UINT32 *memref, UINT8 reglo);
- bool can_skip_upper_load(x86code *&dst, UINT32 *memref, UINT8 reghi);
+ void set_last_lower_reg(x86code *&dst, const be_parameter &param, uint8_t reglo);
+ void set_last_upper_reg(x86code *&dst, const be_parameter &param, uint8_t reghi);
+ bool can_skip_lower_load(x86code *&dst, uint32_t *memref, uint8_t reglo);
+ bool can_skip_upper_load(x86code *&dst, uint32_t *memref, uint8_t reghi);
void track_resolve_link(x86code *&destptr, const emit_link &linkinfo);
void fixup_label(void *parameter, drccodeptr labelcodeptr);
@@ -214,82 +214,82 @@ private:
void op_icopyf(x86code *&dst, const uml::instruction &inst);
// 32-bit code emission helpers
- void emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param);
- void emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param);
+ void emit_mov_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param);
+ void emit_mov_r32_p32_keepflags(x86code *&dst, uint8_t reg, const be_parameter &param);
void emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param);
- void emit_mov_p32_r32(x86code *&dst, const be_parameter &param, UINT8 reg);
- void emit_add_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_mov_p32_r32(x86code *&dst, const be_parameter &param, uint8_t reg);
+ void emit_add_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_adc_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_adc_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sub_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sub_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sbb_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_cmp_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_cmp_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_and_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_and_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_test_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_test_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_or_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_or_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_xor_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_xor_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_shl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_shl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_shr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_shr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sar_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_sar_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rol_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rol_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_ror_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_ror_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rcl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rcl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_rcr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const uml::instruction &inst);
+ void emit_rcr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter &param, const uml::instruction &inst);
void emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
// 64-bit code emission helpers
- void emit_mov_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param);
- void emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param);
+ void emit_mov_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param);
+ void emit_mov_r64_p64_keepflags(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param);
void emit_mov_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param);
- void emit_mov_p64_r64(x86code *&dst, const be_parameter &param, UINT8 reglo, UINT8 reghi);
- void emit_add_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_mov_p64_r64(x86code *&dst, const be_parameter &param, uint8_t reglo, uint8_t reghi);
+ void emit_add_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
void emit_add_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_adc_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_adc_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
void emit_adc_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sub_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_sub_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
void emit_sub_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_sbb_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_sbb_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
void emit_sbb_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_cmp_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
- void emit_and_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_cmp_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_and_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
void emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_test_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_test_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
void emit_test_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_or_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_or_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
void emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_xor_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_xor_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
void emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const uml::instruction &inst);
- void emit_shl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
- void emit_shr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
- void emit_sar_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
- void emit_rol_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
- void emit_ror_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
- void emit_rcl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
- void emit_rcr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_shl_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_shr_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_sar_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_rol_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_ror_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_rcl_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
+ void emit_rcr_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter &param, const uml::instruction &inst);
// floating-point code emission helpers
void emit_fld_p(x86code *&dst, int size, const be_parameter &param);
void emit_fstp_p(x86code *&dst, int size, const be_parameter &param);
// callback helpers
- static int dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int flags);
- static int dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int flags);
- static int ddivu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2);
- static int ddivs(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2);
+ static int dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, int flags);
+ static int dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, int flags);
+ static int ddivu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2);
+ static int ddivs(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2);
// internal state
drc_hash_table m_hash; // hash table state
@@ -305,23 +305,23 @@ private:
x86code * m_save; // save handler
x86code * m_restore; // restore handler
- UINT32 * m_reglo[x86emit::REG_MAX];// pointer to low part of data for each register
- UINT32 * m_reghi[x86emit::REG_MAX];// pointer to high part of data for each register
- UINT8 m_last_lower_reg; // last register we stored a lower from
+ uint32_t * m_reglo[x86emit::REG_MAX];// pointer to low part of data for each register
+ uint32_t * m_reghi[x86emit::REG_MAX];// pointer to high part of data for each register
+ uint8_t m_last_lower_reg; // last register we stored a lower from
x86code * m_last_lower_pc; // PC after instruction where we last stored a lower register
- UINT32 * m_last_lower_addr; // address where we last stored an lower register
- UINT8 m_last_upper_reg; // last register we stored an upper from
+ uint32_t * m_last_lower_addr; // address where we last stored an lower register
+ uint8_t m_last_upper_reg; // last register we stored an upper from
x86code * m_last_upper_pc; // PC after instruction where we last stored an upper register
- UINT32 * m_last_upper_addr; // address where we last stored an upper register
+ uint32_t * m_last_upper_addr; // address where we last stored an upper register
double m_fptemp; // temporary storage for floating point
- UINT16 m_fpumode; // saved FPU mode
- UINT16 m_fmodesave; // temporary location for saving
+ uint16_t m_fpumode; // saved FPU mode
+ uint16_t m_fmodesave; // temporary location for saving
void * m_stacksave; // saved stack pointer
void * m_hashstacksave; // saved stack pointer for hashjmp
- UINT64 m_reslo; // extended low result
- UINT64 m_reshi; // extended high result
+ uint64_t m_reslo; // extended low result
+ uint64_t m_reshi; // extended high result
drc_label_fixup_delegate m_fixup_label; // precomputed delegate for fixups
drc_oob_delegate m_fixup_exception; // precomputed delegate for exception fixups
diff --git a/src/devices/cpu/drccache.cpp b/src/devices/cpu/drccache.cpp
index 113ce0e5392..9c4ba9c3148 100644
--- a/src/devices/cpu/drccache.cpp
+++ b/src/devices/cpu/drccache.cpp
@@ -184,7 +184,7 @@ void drc_cache::dealloc(void *memory, size_t bytes)
// begin_codegen - begin code generation
//-------------------------------------------------
-drccodeptr *drc_cache::begin_codegen(UINT32 reserve_bytes)
+drccodeptr *drc_cache::begin_codegen(uint32_t reserve_bytes)
{
// can't restart in the middle of codegen
assert(m_codegen == nullptr);
diff --git a/src/devices/cpu/drccache.h b/src/devices/cpu/drccache.h
index 129a54e6936..48243a56482 100644
--- a/src/devices/cpu/drccache.h
+++ b/src/devices/cpu/drccache.h
@@ -30,7 +30,7 @@
//**************************************************************************
// generic code pointer
-typedef UINT8 *drccodeptr;
+typedef uint8_t *drccodeptr;
// helper template for oob codegen
@@ -63,7 +63,7 @@ public:
void dealloc(void *memory, size_t bytes);
// codegen helpers
- drccodeptr *begin_codegen(UINT32 reserve_bytes);
+ drccodeptr *begin_codegen(uint32_t reserve_bytes);
drccodeptr end_codegen();
void request_oob_codegen(drc_oob_delegate callback, void *param1 = nullptr, void *param2 = nullptr);
diff --git a/src/devices/cpu/drcfe.cpp b/src/devices/cpu/drcfe.cpp
index 92753e983d7..dc743f01253 100644
--- a/src/devices/cpu/drcfe.cpp
+++ b/src/devices/cpu/drcfe.cpp
@@ -23,7 +23,7 @@
// CONSTANTS
//**************************************************************************
-const UINT32 MAX_STACK_DEPTH = 100;
+const uint32_t MAX_STACK_DEPTH = 100;
@@ -48,7 +48,7 @@ struct pc_stack_entry
// drc_frontend - constructor
//-------------------------------------------------
-drc_frontend::drc_frontend(device_t &cpu, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
+drc_frontend::drc_frontend(device_t &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
: m_window_start(window_start),
m_window_end(window_end),
m_max_sequence(max_sequence),
@@ -208,7 +208,7 @@ opcode_desc *drc_frontend::describe_one(offs_t curpc, const opcode_desc *prevdes
}
}
opcode_desc *prev = desc;
- for (UINT8 slotnum = 0; slotnum < desc->delayslots; slotnum++)
+ for (uint8_t slotnum = 0; slotnum < desc->delayslots; slotnum++)
{
// recursively describe the next instruction
opcode_desc *delaydesc = describe_one(delaypc, prev, true);
@@ -237,7 +237,7 @@ opcode_desc *drc_frontend::describe_one(offs_t curpc, const opcode_desc *prevdes
// of instructions
//-------------------------------------------------
-void drc_frontend::build_sequence(int start, int end, UINT32 endflag)
+void drc_frontend::build_sequence(int start, int end, uint32_t endflag)
{
// iterate in order from start to end, picking up all non-NULL instructions
int consecutive = 0;
@@ -250,7 +250,7 @@ void drc_frontend::build_sequence(int start, int end, UINT32 endflag)
opcode_desc *curdesc = m_desc_array[descnum];
int nextdescnum = descnum + curdesc->length;
opcode_desc *nextdesc = (nextdescnum < end) ? m_desc_array[nextdescnum] : nullptr;
- for (UINT8 skipnum = 0; skipnum < curdesc->skipslots && nextdesc != nullptr; skipnum++)
+ for (uint8_t skipnum = 0; skipnum < curdesc->skipslots && nextdesc != nullptr; skipnum++)
{
nextdescnum = nextdescnum + nextdesc->length;
nextdesc = (nextdescnum < end) ? m_desc_array[nextdescnum] : nullptr;
@@ -302,7 +302,7 @@ void drc_frontend::build_sequence(int start, int end, UINT32 endflag)
if (curdesc->flags & OPFLAG_END_SEQUENCE)
{
// figure out which registers we *must* generate, assuming at the end all must be
- UINT32 reqmask[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff };
+ uint32_t reqmask[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff };
if (seqstart != -1)
for (int backdesc = descnum; backdesc != seqstart - 1; backdesc--)
if (m_desc_array[backdesc] != nullptr)
@@ -342,7 +342,7 @@ void drc_frontend::build_sequence(int start, int end, UINT32 endflag)
// walking in a backwards direction
//-------------------------------------------------
-void drc_frontend::accumulate_required_backwards(opcode_desc &desc, UINT32 *reqmask)
+void drc_frontend::accumulate_required_backwards(opcode_desc &desc, uint32_t *reqmask)
{
// recursively handle delay slots
if (desc.delay.first() != nullptr)
diff --git a/src/devices/cpu/drcfe.h b/src/devices/cpu/drcfe.h
index 39d8184e5ff..66b55bcf4fb 100644
--- a/src/devices/cpu/drcfe.h
+++ b/src/devices/cpu/drcfe.h
@@ -44,39 +44,39 @@ const offs_t BRANCH_TARGET_DYNAMIC = ~0;
// opcode branch flags
-const UINT32 OPFLAG_IS_UNCONDITIONAL_BRANCH = 0x00000001; // instruction is unconditional branch
-const UINT32 OPFLAG_IS_CONDITIONAL_BRANCH = 0x00000002; // instruction is conditional branch
-const UINT32 OPFLAG_IS_BRANCH = (OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_IS_CONDITIONAL_BRANCH);
-const UINT32 OPFLAG_IS_BRANCH_TARGET = 0x00000004; // instruction is the target of a branch
-const UINT32 OPFLAG_IN_DELAY_SLOT = 0x00000008; // instruction is in the delay slot of a branch
-const UINT32 OPFLAG_INTRABLOCK_BRANCH = 0x00000010; // instruction branches within the block
+const uint32_t OPFLAG_IS_UNCONDITIONAL_BRANCH = 0x00000001; // instruction is unconditional branch
+const uint32_t OPFLAG_IS_CONDITIONAL_BRANCH = 0x00000002; // instruction is conditional branch
+const uint32_t OPFLAG_IS_BRANCH = (OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_IS_CONDITIONAL_BRANCH);
+const uint32_t OPFLAG_IS_BRANCH_TARGET = 0x00000004; // instruction is the target of a branch
+const uint32_t OPFLAG_IN_DELAY_SLOT = 0x00000008; // instruction is in the delay slot of a branch
+const uint32_t OPFLAG_INTRABLOCK_BRANCH = 0x00000010; // instruction branches within the block
// opcode exception flags
-const UINT32 OPFLAG_CAN_TRIGGER_SW_INT = 0x00000020; // instruction can trigger a software interrupt
-const UINT32 OPFLAG_CAN_EXPOSE_EXTERNAL_INT = 0x00000040; // instruction can expose an external interrupt
-const UINT32 OPFLAG_CAN_CAUSE_EXCEPTION = 0x00000080; // instruction may generate exception
-const UINT32 OPFLAG_WILL_CAUSE_EXCEPTION = 0x00000100; // instruction will generate exception
-const UINT32 OPFLAG_PRIVILEGED = 0x00000200; // instruction is privileged
+const uint32_t OPFLAG_CAN_TRIGGER_SW_INT = 0x00000020; // instruction can trigger a software interrupt
+const uint32_t OPFLAG_CAN_EXPOSE_EXTERNAL_INT = 0x00000040; // instruction can expose an external interrupt
+const uint32_t OPFLAG_CAN_CAUSE_EXCEPTION = 0x00000080; // instruction may generate exception
+const uint32_t OPFLAG_WILL_CAUSE_EXCEPTION = 0x00000100; // instruction will generate exception
+const uint32_t OPFLAG_PRIVILEGED = 0x00000200; // instruction is privileged
// opcode virtual->physical translation flags
-const UINT32 OPFLAG_VALIDATE_TLB = 0x00000400; // instruction must validate TLB before execution
-const UINT32 OPFLAG_MODIFIES_TRANSLATION = 0x00000800; // instruction modifies the TLB
-const UINT32 OPFLAG_COMPILER_PAGE_FAULT = 0x00001000; // compiler hit a page fault when parsing
-const UINT32 OPFLAG_COMPILER_UNMAPPED = 0x00002000; // compiler hit unmapped memory when parsing
+const uint32_t OPFLAG_VALIDATE_TLB = 0x00000400; // instruction must validate TLB before execution
+const uint32_t OPFLAG_MODIFIES_TRANSLATION = 0x00000800; // instruction modifies the TLB
+const uint32_t OPFLAG_COMPILER_PAGE_FAULT = 0x00001000; // compiler hit a page fault when parsing
+const uint32_t OPFLAG_COMPILER_UNMAPPED = 0x00002000; // compiler hit unmapped memory when parsing
// opcode flags
-const UINT32 OPFLAG_INVALID_OPCODE = 0x00004000; // instruction is invalid
-const UINT32 OPFLAG_VIRTUAL_NOOP = 0x00008000; // instruction is a virtual no-op
+const uint32_t OPFLAG_INVALID_OPCODE = 0x00004000; // instruction is invalid
+const uint32_t OPFLAG_VIRTUAL_NOOP = 0x00008000; // instruction is a virtual no-op
// opcode sequence flow flags
-const UINT32 OPFLAG_REDISPATCH = 0x00010000; // instruction must redispatch after completion
-const UINT32 OPFLAG_RETURN_TO_START = 0x00020000; // instruction must jump back to the beginning after completion
-const UINT32 OPFLAG_END_SEQUENCE = 0x00040000; // this is the last instruction in a sequence
-const UINT32 OPFLAG_CAN_CHANGE_MODES = 0x00080000; // instruction can change modes
+const uint32_t OPFLAG_REDISPATCH = 0x00010000; // instruction must redispatch after completion
+const uint32_t OPFLAG_RETURN_TO_START = 0x00020000; // instruction must jump back to the beginning after completion
+const uint32_t OPFLAG_END_SEQUENCE = 0x00040000; // this is the last instruction in a sequence
+const uint32_t OPFLAG_CAN_CHANGE_MODES = 0x00080000; // instruction can change modes
// execution semantics
-const UINT32 OPFLAG_READS_MEMORY = 0x00100000; // instruction reads memory
-const UINT32 OPFLAG_WRITES_MEMORY = 0x00200000; // instruction writes memory
+const uint32_t OPFLAG_READS_MEMORY = 0x00100000; // instruction reads memory
+const uint32_t OPFLAG_WRITES_MEMORY = 0x00200000; // instruction writes memory
@@ -102,25 +102,25 @@ struct opcode_desc
// copy of up to 16 bytes of opcode
union
{
- UINT8 b[16];
- UINT16 w[8];
- UINT32 l[4];
- UINT64 q[2];
+ uint8_t b[16];
+ uint16_t w[8];
+ uint32_t l[4];
+ uint64_t q[2];
} opptr; // pointer to opcode memory
// information about this instruction's execution
- UINT8 length; // length in bytes of this opcode
- UINT8 delayslots; // number of delay slots (for branches)
- UINT8 skipslots; // number of skip slots (for branches)
- UINT32 flags; // OPFLAG_* opcode flags
- UINT32 userflags; // core specific flags
- UINT32 userdata0; // core specific data
- UINT32 cycles; // number of cycles needed to execute
+ uint8_t length; // length in bytes of this opcode
+ uint8_t delayslots; // number of delay slots (for branches)
+ uint8_t skipslots; // number of skip slots (for branches)
+ uint32_t flags; // OPFLAG_* opcode flags
+ uint32_t userflags; // core specific flags
+ uint32_t userdata0; // core specific data
+ uint32_t cycles; // number of cycles needed to execute
// register usage information
- UINT32 regin[4]; // input registers
- UINT32 regout[4]; // output registers
- UINT32 regreq[4]; // required output registers
+ uint32_t regin[4]; // input registers
+ uint32_t regout[4]; // output registers
+ uint32_t regreq[4]; // required output registers
};
@@ -129,7 +129,7 @@ class drc_frontend
{
public:
// construction/destruction
- drc_frontend(device_t &cpu, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
+ drc_frontend(device_t &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
virtual ~drc_frontend();
// describe a block
@@ -142,14 +142,14 @@ protected:
private:
// internal helpers
opcode_desc *describe_one(offs_t curpc, const opcode_desc *prevdesc, bool in_delay_slot = false);
- void build_sequence(int start, int end, UINT32 endflag);
- void accumulate_required_backwards(opcode_desc &desc, UINT32 *reqmask);
+ void build_sequence(int start, int end, uint32_t endflag);
+ void accumulate_required_backwards(opcode_desc &desc, uint32_t *reqmask);
void release_descriptions();
// configuration parameters
- UINT32 m_window_start; // code window start offset = startpc - window_start
- UINT32 m_window_end; // code window end offset = startpc + window_end
- UINT32 m_max_sequence; // maximum instructions to include in a sequence
+ uint32_t m_window_start; // code window start offset = startpc - window_start
+ uint32_t m_window_end; // code window end offset = startpc + window_end
+ uint32_t m_max_sequence; // maximum instructions to include in a sequence
// CPU parameters
cpu_device & m_cpudevice; // CPU device object
diff --git a/src/devices/cpu/drcuml.cpp b/src/devices/cpu/drcuml.cpp
index 4b1b4d55a9b..252efa332e5 100644
--- a/src/devices/cpu/drcuml.cpp
+++ b/src/devices/cpu/drcuml.cpp
@@ -67,10 +67,10 @@ typedef NATIVE_DRC drcbe_native;
struct bevalidate_test
{
opcode_t opcode;
- UINT8 size;
- UINT8 iflags;
- UINT8 flags;
- UINT64 param[4];
+ uint8_t size;
+ uint8_t iflags;
+ uint8_t flags;
+ uint64_t param[4];
};
@@ -124,7 +124,7 @@ drcbe_interface::~drcbe_interface()
// drcuml_state - constructor
//-------------------------------------------------
-drcuml_state::drcuml_state(device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
+drcuml_state::drcuml_state(device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits)
: m_device(device),
m_cache(cache),
m_drcbe_interface(device.machine().options().drc_use_c() ?
@@ -196,7 +196,7 @@ void drcuml_state::reset()
// begin_block - begin a new code block
//-------------------------------------------------
-drcuml_block *drcuml_state::begin_block(UINT32 maxinst)
+drcuml_block *drcuml_state::begin_block(uint32_t maxinst)
{
// find an inactive block that matches our qualifications
drcuml_block *bestblock = nullptr;
@@ -230,7 +230,7 @@ code_handle *drcuml_state::handle_alloc(const char *name)
// symbol table
//-------------------------------------------------
-void drcuml_state::symbol_add(void *base, UINT32 length, const char *name)
+void drcuml_state::symbol_add(void *base, uint32_t length, const char *name)
{
m_symlist.append(*global_alloc(symbol(base, length, name)));
}
@@ -242,7 +242,7 @@ void drcuml_state::symbol_add(void *base, UINT32 length, const char *name)
// found
//-------------------------------------------------
-const char *drcuml_state::symbol_find(void *base, UINT32 *offset)
+const char *drcuml_state::symbol_find(void *base, uint32_t *offset)
{
drccodeptr search = drccodeptr(base);
@@ -295,7 +295,7 @@ void drcuml_state::log_printf(const char *format, ...)
// drcuml_block - constructor
//-------------------------------------------------
-drcuml_block::drcuml_block(drcuml_state &drcuml, UINT32 maxinst)
+drcuml_block::drcuml_block(drcuml_state &drcuml, uint32_t maxinst)
: m_drcuml(drcuml),
m_next(nullptr),
m_nextinst(0),
@@ -389,7 +389,7 @@ uml::instruction &drcuml_block::append()
void drcuml_block::optimize()
{
- UINT32 mapvar[MAPVAR_COUNT] = { 0 };
+ uint32_t mapvar[MAPVAR_COUNT] = { 0 };
// iterate over instructions
for (int instnum = 0; instnum < m_nextinst; instnum++)
@@ -397,8 +397,8 @@ void drcuml_block::optimize()
instruction &inst = m_inst[instnum];
// first compute what flags we need
- UINT8 accumflags = 0;
- UINT8 remainingflags = inst.output_flags();
+ uint8_t accumflags = 0;
+ uint8_t remainingflags = inst.output_flags();
// scan ahead until we run out of possible remaining flags
for (int scannum = instnum + 1; remainingflags != 0 && scannum < m_nextinst; scannum++)
@@ -454,11 +454,11 @@ void drcuml_block::disassemble()
// print labels, handles, and hashes left justified
else if (inst.opcode() == OP_LABEL)
- m_drcuml.log_printf("$%X:\n", UINT32(inst.param(0).label()));
+ m_drcuml.log_printf("$%X:\n", uint32_t(inst.param(0).label()));
else if (inst.opcode() == OP_HANDLE)
m_drcuml.log_printf("%s:\n", inst.param(0).handle().string());
else if (inst.opcode() == OP_HASH)
- m_drcuml.log_printf("(%X,%X):\n", UINT32(inst.param(0).immediate()), UINT32(inst.param(1).immediate()));
+ m_drcuml.log_printf("(%X,%X):\n", uint32_t(inst.param(0).immediate()), uint32_t(inst.param(1).immediate()));
// indent everything else with a tab
else
@@ -506,7 +506,7 @@ const char *drcuml_block::get_comment_text(const instruction &inst, std::string
// mapvars comment about their values
else if (inst.opcode() == OP_MAPVAR) {
- comment = string_format("m%d = $%X", (int)inst.param(0).mapvar() - MAPVAR_M0, (UINT32)inst.param(1).immediate());
+ comment = string_format("m%d = $%X", (int)inst.param(0).mapvar() - MAPVAR_M0, (uint32_t)inst.param(1).immediate());
return comment.c_str();
}
@@ -528,7 +528,7 @@ const char *drcuml_block::get_comment_text(const instruction &inst, std::string
// array of parameter values
//-------------------------------------------------
-inline UINT8 effective_test_psize(const opcode_info &opinfo, int pnum, int instsize, const UINT64 *params)
+inline uint8_t effective_test_psize(const opcode_info &opinfo, int pnum, int instsize, const uint64_t *params)
{
switch (opinfo.param[pnum].size)
{
@@ -809,8 +809,8 @@ static void bevalidate_iterate_over_params(drcuml_state *drcuml, code_handle **h
static void bevalidate_iterate_over_flags(drcuml_state *drcuml, code_handle **handles, const bevalidate_test *test, parameter *paramlist)
{
const opcode_info *opinfo = opcode_info_table[test->opcode()];
- UINT8 flagmask = opinfo->outflags;
- UINT8 curmask;
+ uint8_t flagmask = opinfo->outflags;
+ uint8_t curmask;
// iterate over all possible flag combinations
for (curmask = 0; curmask <= flagmask; curmask++)
@@ -825,17 +825,17 @@ static void bevalidate_iterate_over_flags(drcuml_state *drcuml, code_handle **ha
results
-------------------------------------------------*/
-static void bevalidate_execute(drcuml_state *drcuml, code_handle **handles, const bevalidate_test *test, const parameter *paramlist, UINT8 flagmask)
+static void bevalidate_execute(drcuml_state *drcuml, code_handle **handles, const bevalidate_test *test, const parameter *paramlist, uint8_t flagmask)
{
parameter params[ARRAY_LENGTH(test->param)];
drcuml_machine_state istate, fstate;
instruction testinst;
drcuml_block *block;
- UINT64 *parammem;
+ uint64_t *parammem;
int numparams;
// allocate memory for parameters
- parammem = (UINT64 *)drcuml->cache->alloc_near(sizeof(UINT64) * (ARRAY_LENGTH(test->param) + 1));
+ parammem = (uint64_t *)drcuml->cache->alloc_near(sizeof(uint64_t) * (ARRAY_LENGTH(test->param) + 1));
// flush the cache
drcuml->reset();
@@ -888,10 +888,10 @@ static void bevalidate_execute(drcuml_state *drcuml, code_handle **handles, cons
drcuml->execute(*handles[0]);
// verify the results
- bevalidate_verify_state(drcuml, &istate, &fstate, test, *(UINT32 *)&parammem[ARRAY_LENGTH(test->param)], params, &testinst, handles[1]->code, handles[2]->code, flagmask);
+ bevalidate_verify_state(drcuml, &istate, &fstate, test, *(uint32_t *)&parammem[ARRAY_LENGTH(test->param)], params, &testinst, handles[1]->code, handles[2]->code, flagmask);
// free memory
- drcuml->cache->dealloc(parammem, sizeof(UINT64) * (ARRAY_LENGTH(test->param) + 1));
+ drcuml->cache->dealloc(parammem, sizeof(uint64_t) * (ARRAY_LENGTH(test->param) + 1));
}
@@ -920,8 +920,8 @@ static void bevalidate_initialize_random_state(drcuml_state *drcuml, drcuml_bloc
// initialize float registers to random values
for (regnum = 0; regnum < ARRAY_LENGTH(state->f); regnum++)
{
- *(UINT32 *)&state->f[regnum].s.h = machine.rand();
- *(UINT32 *)&state->f[regnum].s.l = machine.rand();
+ *(uint32_t *)&state->f[regnum].s.h = machine.rand();
+ *(uint32_t *)&state->f[regnum].s.l = machine.rand();
}
// initialize map variables to random values
@@ -936,7 +936,7 @@ static void bevalidate_initialize_random_state(drcuml_state *drcuml, drcuml_bloc
to executing a test
-------------------------------------------------*/
-static int bevalidate_populate_state(drcuml_block *block, drcuml_machine_state *state, const bevalidate_test *test, const parameter *paramlist, parameter *params, UINT64 *parammem)
+static int bevalidate_populate_state(drcuml_block *block, drcuml_machine_state *state, const bevalidate_test *test, const parameter *paramlist, parameter *params, uint64_t *parammem)
{
const opcode_info *opinfo = opcode_info_table[test->opcode()];
int numparams = ARRAY_LENGTH(test->param);
@@ -978,9 +978,9 @@ static int bevalidate_populate_state(drcuml_block *block, drcuml_machine_state *
case parameter::PTYPE_MEMORY:
curparam->value = (uintptr_t)&parammem[pnum];
if (psize == 4)
- *(UINT32 *)(uintptr_t)curparam->value = test->param[pnum];
+ *(uint32_t *)(uintptr_t)curparam->value = test->param[pnum];
else
- *(UINT64 *)(uintptr_t)curparam->value = test->param[pnum];
+ *(uint64_t *)(uintptr_t)curparam->value = test->param[pnum];
break;
// map variables: issue a MAPVAR instruction to set the value and set the parameter value to the mapvar index
@@ -1007,11 +1007,11 @@ static int bevalidate_populate_state(drcuml_block *block, drcuml_machine_state *
discrepancies
-------------------------------------------------*/
-static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_state *istate, drcuml_machine_state *state, const bevalidate_test *test, UINT32 flags, const parameter *params, const instruction *testinst, drccodeptr codestart, drccodeptr codeend, UINT8 flagmask)
+static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_state *istate, drcuml_machine_state *state, const bevalidate_test *test, uint32_t flags, const parameter *params, const instruction *testinst, drccodeptr codestart, drccodeptr codeend, uint8_t flagmask)
{
const opcode_info *opinfo = opcode_info_table[test->opcode()];
- UINT8 ireg[REG_I_END - REG_I0] = { 0 };
- UINT8 freg[REG_F_END - REG_F0] = { 0 };
+ uint8_t ireg[REG_I_END - REG_I0] = { 0 };
+ uint8_t freg[REG_F_END - REG_F0] = { 0 };
char errorbuf[1024];
char *errend = errorbuf;
int pnum, regnum;
@@ -1039,8 +1039,8 @@ static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_st
if (opinfo->param[pnum].output & PIO_OUT)
{
int psize = effective_test_psize(opinfo, pnum, test->size, test->param);
- UINT64 mask = U64(0xffffffffffffffff) >> (64 - 8 * psize);
- UINT64 result = 0;
+ uint64_t mask = U64(0xffffffffffffffff) >> (64 - 8 * psize);
+ uint64_t result = 0;
// fetch the result from the parameters
switch (params[pnum].type)
@@ -1060,9 +1060,9 @@ static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_st
// memory registers fetch from the memory address
case parameter::PTYPE_MEMORY:
if (psize == 4)
- result = *(UINT32 *)(uintptr_t)params[pnum].value;
+ result = *(uint32_t *)(uintptr_t)params[pnum].value;
else
- result = *(UINT64 *)(uintptr_t)params[pnum].value;
+ result = *(uint64_t *)(uintptr_t)params[pnum].value;
break;
default:
@@ -1072,13 +1072,13 @@ static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_st
// check against the mask
if (test->param[pnum] != UNDEFINED_U64 && (result & mask) != (test->param[pnum] & mask))
{
- if ((UINT32)mask == mask)
+ if ((uint32_t)mask == mask)
errend += sprintf(errend, " Parameter %d ... result:%08X expected:%08X\n", pnum,
- (UINT32)(result & mask), (UINT32)(test->param[pnum] & mask));
+ (uint32_t)(result & mask), (uint32_t)(test->param[pnum] & mask));
else
errend += sprintf(errend, " Parameter %d ... result:%08X%08X expected:%08X%08X\n", pnum,
- (UINT32)((result & mask) >> 32), (UINT32)(result & mask),
- (UINT32)((test->param[pnum] & mask) >> 32), (UINT32)(test->param[pnum] & mask));
+ (uint32_t)((result & mask) >> 32), (uint32_t)(result & mask),
+ (uint32_t)((test->param[pnum] & mask) >> 32), (uint32_t)(test->param[pnum] & mask));
}
}
@@ -1086,15 +1086,15 @@ static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_st
for (regnum = 0; regnum < ARRAY_LENGTH(state->r); regnum++)
if (ireg[regnum] == 0 && istate->r[regnum].d != state->r[regnum].d)
errend += sprintf(errend, " Register i%d ... result:%08X%08X originally:%08X%08X\n", regnum,
- (UINT32)(state->r[regnum].d >> 32), (UINT32)state->r[regnum].d,
- (UINT32)(istate->r[regnum].d >> 32), (UINT32)istate->r[regnum].d);
+ (uint32_t)(state->r[regnum].d >> 32), (uint32_t)state->r[regnum].d,
+ (uint32_t)(istate->r[regnum].d >> 32), (uint32_t)istate->r[regnum].d);
// check source float parameters for unexpected alterations
for (regnum = 0; regnum < ARRAY_LENGTH(state->f); regnum++)
- if (freg[regnum] == 0 && *(UINT64 *)&istate->f[regnum].d != *(UINT64 *)&state->f[regnum].d)
+ if (freg[regnum] == 0 && *(uint64_t *)&istate->f[regnum].d != *(uint64_t *)&state->f[regnum].d)
errend += sprintf(errend, " Register f%d ... result:%08X%08X originally:%08X%08X\n", regnum,
- (UINT32)(*(UINT64 *)&state->f[regnum].d >> 32), (UINT32)*(UINT64 *)&state->f[regnum].d,
- (UINT32)(*(UINT64 *)&istate->f[regnum].d >> 32), (UINT32)*(UINT64 *)&istate->f[regnum].d);
+ (uint32_t)(*(uint64_t *)&state->f[regnum].d >> 32), (uint32_t)*(uint64_t *)&state->f[regnum].d,
+ (uint32_t)(*(uint64_t *)&istate->f[regnum].d >> 32), (uint32_t)*(uint64_t *)&istate->f[regnum].d);
// output the error if we have one
if (errend != errorbuf)
diff --git a/src/devices/cpu/drcuml.h b/src/devices/cpu/drcuml.h
index 5a93b132752..0d90c9412aa 100644
--- a/src/devices/cpu/drcuml.h
+++ b/src/devices/cpu/drcuml.h
@@ -37,11 +37,11 @@ class drcuml_state;
union drcuml_ireg
{
#ifdef LSB_FIRST
- struct { UINT32 l,h; } w; // 32-bit low, high parts of the register
+ struct { uint32_t l,h; } w; // 32-bit low, high parts of the register
#else
- struct { UINT32 h,l; } w; // 32-bit low, high parts of the register
+ struct { uint32_t h,l; } w; // 32-bit low, high parts of the register
#endif
- UINT64 d; // 64-bit full register
+ uint64_t d; // 64-bit full register
};
@@ -62,17 +62,17 @@ struct drcuml_machine_state
{
drcuml_ireg r[uml::REG_I_COUNT]; // integer registers
drcuml_freg f[uml::REG_F_COUNT]; // floating-point registers
- UINT32 exp; // exception parameter register
- UINT8 fmod; // fmod (floating-point mode) register
- UINT8 flags; // flags state
+ uint32_t exp; // exception parameter register
+ uint8_t fmod; // fmod (floating-point mode) register
+ uint8_t flags; // flags state
};
// hints and information about the back-end
struct drcbe_info
{
- UINT8 direct_iregs; // number of direct-mapped integer registers
- UINT8 direct_fregs; // number of direct-mapped floating point registers
+ uint8_t direct_iregs; // number of direct-mapped integer registers
+ uint8_t direct_fregs; // number of direct-mapped floating point registers
};
@@ -83,13 +83,13 @@ class drcuml_block
public:
// construction/destruction
- drcuml_block(drcuml_state &drcuml, UINT32 maxinst);
+ drcuml_block(drcuml_state &drcuml, uint32_t maxinst);
~drcuml_block();
// getters
drcuml_block *next() const { return m_next; }
bool inuse() const { return m_inuse; }
- UINT32 maxinst() const { return m_maxinst; }
+ uint32_t maxinst() const { return m_maxinst; }
// code generation
void begin();
@@ -116,8 +116,8 @@ private:
// internal state
drcuml_state & m_drcuml; // pointer back to the owning UML
drcuml_block * m_next; // pointer to next block
- UINT32 m_nextinst; // next instruction to fill in the cache
- UINT32 m_maxinst; // maximum number of instructions
+ uint32_t m_nextinst; // next instruction to fill in the cache
+ uint32_t m_maxinst; // maximum number of instructions
std::vector<uml::instruction> m_inst; // pointer to the instruction list
bool m_inuse; // this block is in use
};
@@ -134,8 +134,8 @@ public:
// required overrides
virtual void reset() = 0;
virtual int execute(uml::code_handle &entry) = 0;
- virtual void generate(drcuml_block &block, const uml::instruction *instlist, UINT32 numinst) = 0;
- virtual bool hash_exists(UINT32 mode, UINT32 pc) = 0;
+ virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) = 0;
+ virtual bool hash_exists(uint32_t mode, uint32_t pc) = 0;
virtual void get_info(drcbe_info &info) = 0;
virtual bool logging() const { return false; }
@@ -155,7 +155,7 @@ class drcuml_state
{
public:
// construction/destruction
- drcuml_state(device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits);
+ drcuml_state(device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
~drcuml_state();
// getters
@@ -167,19 +167,19 @@ public:
int execute(uml::code_handle &entry) { return m_beintf.execute(entry); }
// code generation
- drcuml_block *begin_block(UINT32 maxinst);
+ drcuml_block *begin_block(uint32_t maxinst);
// back-end interface
void get_backend_info(drcbe_info &info) { m_beintf.get_info(info); }
- bool hash_exists(UINT32 mode, UINT32 pc) { return m_beintf.hash_exists(mode, pc); }
- void generate(drcuml_block &block, uml::instruction *instructions, UINT32 count) { m_beintf.generate(block, instructions, count); }
+ bool hash_exists(uint32_t mode, uint32_t pc) { return m_beintf.hash_exists(mode, pc); }
+ void generate(drcuml_block &block, uml::instruction *instructions, uint32_t count) { m_beintf.generate(block, instructions, count); }
// handle management
uml::code_handle *handle_alloc(const char *name);
// symbol management
- void symbol_add(void *base, UINT32 length, const char *name);
- const char *symbol_find(void *base, UINT32 *offset = nullptr);
+ void symbol_add(void *base, uint32_t length, const char *name);
+ const char *symbol_find(void *base, uint32_t *offset = nullptr);
// logging
bool logging() const { return (m_umllog != nullptr); }
@@ -195,7 +195,7 @@ private:
friend class simple_list<symbol>;
// construction/destruction
- symbol(void *base, UINT32 length, const char *name)
+ symbol(void *base, uint32_t length, const char *name)
: m_next(nullptr),
m_base(drccodeptr(base)),
m_length(length),
@@ -209,7 +209,7 @@ private:
// internal state
symbol * m_next; // link to the next symbol
drccodeptr m_base; // base of the symbol
- UINT32 m_length; // length of the region covered
+ uint32_t m_length; // length of the region covered
std::string m_name; // name of the symbol
};
diff --git a/src/devices/cpu/dsp16/dsp16.cpp b/src/devices/cpu/dsp16/dsp16.cpp
index 0c41933bf32..6cefa03836c 100644
--- a/src/devices/cpu/dsp16/dsp16.cpp
+++ b/src/devices/cpu/dsp16/dsp16.cpp
@@ -34,7 +34,7 @@ const device_type DSP16 = &device_creator<dsp16_device>;
// dsp16_device - constructor
//-------------------------------------------------
-dsp16_device::dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+dsp16_device::dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, DSP16, "DSP16", tag, owner, clock, "dsp16", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1),
m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1),
@@ -225,7 +225,7 @@ void dsp16_device::state_string_export(const device_state_entry &entry, std::str
case DSP16_AUC:
{
std::string alignString;
- const UINT8 align = m_auc & 0x03;
+ const uint8_t align = m_auc & 0x03;
switch (align)
{
case 0x00: alignString = "xy"; break;
@@ -266,7 +266,7 @@ void dsp16_device::state_string_export(const device_state_entry &entry, std::str
case DSP16_PIOC:
{
std::string strobeString;
- const UINT8 strobe = (m_pioc & 0x6000) >> 13;
+ const uint8_t strobe = (m_pioc & 0x6000) >> 13;
switch (strobe)
{
case 0x00: strobeString = "1T"; break;
@@ -297,7 +297,7 @@ void dsp16_device::state_string_export(const device_state_entry &entry, std::str
case DSP16_SIOC:
{
std::string clkString;
- const UINT8 clk = (m_sioc & 0x0180) >> 7;
+ const uint8_t clk = (m_sioc & 0x0180) >> 7;
switch (clk)
{
case 0x00: clkString = "/4"; break;
@@ -326,7 +326,7 @@ void dsp16_device::state_string_export(const device_state_entry &entry, std::str
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 dsp16_device::disasm_min_opcode_bytes() const
+uint32_t dsp16_device::disasm_min_opcode_bytes() const
{
return 2;
}
@@ -337,7 +337,7 @@ UINT32 dsp16_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 dsp16_device::disasm_max_opcode_bytes() const
+uint32_t dsp16_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -348,7 +348,7 @@ UINT32 dsp16_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t dsp16_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t dsp16_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( dsp16a );
return CPU_DISASSEMBLE_NAME(dsp16a)(this, buffer, pc, oprom, opram, options);
@@ -360,19 +360,19 @@ offs_t dsp16_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
MEMORY ACCESSORS
***************************************************************************/
-inline UINT32 dsp16_device::data_read(const UINT16& addr)
+inline uint32_t dsp16_device::data_read(const uint16_t& addr)
{
return m_data->read_word(addr << 1);
}
-inline void dsp16_device::data_write(const UINT16& addr, const UINT16& data)
+inline void dsp16_device::data_write(const uint16_t& addr, const uint16_t& data)
{
m_data->write_word(addr << 1, data & 0xffff);
}
-inline UINT32 dsp16_device::opcode_read(const UINT8 pcOffset)
+inline uint32_t dsp16_device::opcode_read(const uint8_t pcOffset)
{
- const UINT16 readPC = m_pc + pcOffset;
+ const uint16_t readPC = m_pc + pcOffset;
return m_direct->read_dword(readPC << 1);
}
@@ -386,7 +386,7 @@ inline UINT32 dsp16_device::opcode_read(const UINT8 pcOffset)
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 dsp16_device::execute_min_cycles() const
+uint32_t dsp16_device::execute_min_cycles() const
{
return 1;
}
@@ -397,7 +397,7 @@ UINT32 dsp16_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 dsp16_device::execute_max_cycles() const
+uint32_t dsp16_device::execute_max_cycles() const
{
return 1;
}
@@ -408,7 +408,7 @@ UINT32 dsp16_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 dsp16_device::execute_input_lines() const
+uint32_t dsp16_device::execute_input_lines() const
{
return 1;
}
@@ -434,9 +434,9 @@ void dsp16_device::execute_run()
debugger_instruction_hook(this, m_pc);
// instruction fetch & execute
- UINT8 cycles;
- UINT8 pcAdvance;
- const UINT16 op = opcode_read();
+ uint8_t cycles;
+ uint8_t pcAdvance;
+ const uint16_t op = opcode_read();
execute_one(op, cycles, pcAdvance);
// step
diff --git a/src/devices/cpu/dsp16/dsp16.h b/src/devices/cpu/dsp16/dsp16.h
index 6e509da0569..1a558f1f18a 100644
--- a/src/devices/cpu/dsp16/dsp16.h
+++ b/src/devices/cpu/dsp16/dsp16.h
@@ -24,7 +24,7 @@ class dsp16_device : public cpu_device
{
public:
// construction/destruction
- dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// public interfaces
@@ -34,11 +34,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; } // internal /2 divider
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); } // internal /2 divider
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; } // internal /2 divider
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); } // internal /2 divider
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -49,9 +49,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// address spaces
const address_space_config m_program_config;
@@ -59,57 +59,57 @@ protected:
// CPU registers
// ROM Address Arithmetic Unit (XAAU) (page 2-4)
- UINT16 m_i; // 12 bits
- UINT16 m_pc;
- UINT16 m_pt;
- UINT16 m_pr;
- UINT16 m_pi;
+ uint16_t m_i; // 12 bits
+ uint16_t m_pc;
+ uint16_t m_pt;
+ uint16_t m_pr;
+ uint16_t m_pi;
// RAM Address Arithmetic Unit (YAAU) (page 2-6)
- UINT16 m_j; // Signed
- UINT16 m_k; // Signed
- UINT16 m_rb;
- UINT16 m_re;
- UINT16 m_r0;
- UINT16 m_r1;
- UINT16 m_r2;
- UINT16 m_r3;
+ uint16_t m_j; // Signed
+ uint16_t m_k; // Signed
+ uint16_t m_rb;
+ uint16_t m_re;
+ uint16_t m_r0;
+ uint16_t m_r1;
+ uint16_t m_r2;
+ uint16_t m_r3;
// Data Arithmetic Unit (DAU) (page 2-6)
- UINT16 m_x;
- UINT32 m_y;
- UINT32 m_p;
- UINT64 m_a0; // 36 bits
- UINT64 m_a1; // 36 bits
- UINT8 m_auc; // 6 bits
- UINT16 m_psw;
- UINT8 m_c0;
- UINT8 m_c1;
- UINT8 m_c2;
+ uint16_t m_x;
+ uint32_t m_y;
+ uint32_t m_p;
+ uint64_t m_a0; // 36 bits
+ uint64_t m_a1; // 36 bits
+ uint8_t m_auc; // 6 bits
+ uint16_t m_psw;
+ uint8_t m_c0;
+ uint8_t m_c1;
+ uint8_t m_c2;
// Serial and parallel interfaces (TODO: More here (page 2-13))
- UINT16 m_sioc;
- UINT16 m_srta;
- UINT16 m_sdx;
- UINT16 m_pioc;
- UINT16 m_pdx0; // pdx0 & pdx1 refer to the same physical register (page 6-1)
- UINT16 m_pdx1; // but we keep them separate for logic's sake.
+ uint16_t m_sioc;
+ uint16_t m_srta;
+ uint16_t m_sdx;
+ uint16_t m_pioc;
+ uint16_t m_pdx0; // pdx0 & pdx1 refer to the same physical register (page 6-1)
+ uint16_t m_pdx1; // but we keep them separate for logic's sake.
// internal stuff
- UINT16 m_ppc;
+ uint16_t m_ppc;
// This CPU core handles the cache as more of a loop than 15 separate memory elements.
// It's a bit of a hack, but it's easier this way (for now).
- UINT16 m_cacheStart;
- UINT16 m_cacheEnd;
- UINT16 m_cacheRedoNextPC;
- UINT16 m_cacheIterations;
- static const UINT16 CACHE_INVALID = 0xffff;
+ uint16_t m_cacheStart;
+ uint16_t m_cacheEnd;
+ uint16_t m_cacheRedoNextPC;
+ uint16_t m_cacheIterations;
+ static const uint16_t CACHE_INVALID = 0xffff;
// memory access
- inline UINT32 data_read(const UINT16& addr);
- inline void data_write(const UINT16& addr, const UINT16& data);
- inline UINT32 opcode_read(const UINT8 pcOffset=0);
+ inline uint32_t data_read(const uint16_t& addr);
+ inline void data_write(const uint16_t& addr, const uint16_t& data);
+ inline uint32_t opcode_read(const uint8_t pcOffset=0);
// address spaces
address_space* m_program;
@@ -120,23 +120,23 @@ protected:
int m_icount;
// operations
- void execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance);
+ void execute_one(const uint16_t& op, uint8_t& cycles, uint8_t& pcAdvance);
// table decoders
- void* registerFromRImmediateField(const UINT8& R);
- void* registerFromRTable(const UINT8& R);
- UINT16* registerFromYFieldUpper(const UINT8& Y);
+ void* registerFromRImmediateField(const uint8_t& R);
+ void* registerFromRTable(const uint8_t& R);
+ uint16_t* registerFromYFieldUpper(const uint8_t& Y);
// execution
- void executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S);
- void executeYFieldPost(const UINT8& Y);
- void executeZFieldPartOne(const UINT8& Z, UINT16* rN);
- void executeZFieldPartTwo(const UINT8& Z, UINT16* rN);
+ void executeF1Field(const uint8_t& F1, const uint8_t& D, const uint8_t& S);
+ void executeYFieldPost(const uint8_t& Y);
+ void executeZFieldPartOne(const uint8_t& Z, uint16_t* rN);
+ void executeZFieldPartTwo(const uint8_t& Z, uint16_t* rN);
// helpers
void* addressYL();
- void writeRegister(void* reg, const UINT16& value);
- bool conditionTest(const UINT8& CON);
+ void writeRegister(void* reg, const uint16_t& value);
+ bool conditionTest(const uint8_t& CON);
// flags
bool lmi();
diff --git a/src/devices/cpu/dsp16/dsp16dis.cpp b/src/devices/cpu/dsp16/dsp16dis.cpp
index 6b2de29a79c..136eaab0e22 100644
--- a/src/devices/cpu/dsp16/dsp16dis.cpp
+++ b/src/devices/cpu/dsp16/dsp16dis.cpp
@@ -3,7 +3,7 @@
#include "emu.h"
#include "dsp16.h"
-std::string disasmF1Field(const UINT8& F1, const UINT8& D, const UINT8& S)
+std::string disasmF1Field(const uint8_t& F1, const uint8_t& D, const uint8_t& S)
{
switch (F1)
{
@@ -28,7 +28,7 @@ std::string disasmF1Field(const UINT8& F1, const UINT8& D, const UINT8& S)
}
}
-std::string disasmYField(const UINT8& Y)
+std::string disasmYField(const uint8_t& Y)
{
switch (Y)
{
@@ -58,7 +58,7 @@ std::string disasmYField(const UINT8& Y)
//return "";
}
-std::string disasmZField(const UINT8& Z)
+std::string disasmZField(const uint8_t& Z)
{
switch (Z)
{
@@ -88,7 +88,7 @@ std::string disasmZField(const UINT8& Z)
//return "";
}
-std::string disasmF2Field(const UINT8& F2, const UINT8& D, const UINT8& S)
+std::string disasmF2Field(const uint8_t& F2, const uint8_t& D, const uint8_t& S)
{
std::string ret = "";
switch (F2)
@@ -116,7 +116,7 @@ std::string disasmF2Field(const UINT8& F2, const UINT8& D, const UINT8& S)
return ret;
}
-std::string disasmCONField(const UINT8& CON)
+std::string disasmCONField(const uint8_t& CON)
{
switch (CON)
{
@@ -145,7 +145,7 @@ std::string disasmCONField(const UINT8& CON)
//return "";
}
-std::string disasmBField(const UINT8& B)
+std::string disasmBField(const uint8_t& B)
{
switch (B)
{
@@ -164,7 +164,7 @@ std::string disasmBField(const UINT8& B)
//return "";
}
-std::string disasmRImmediateField(const UINT8& R)
+std::string disasmRImmediateField(const uint8_t& R)
{
switch (R)
{
@@ -183,7 +183,7 @@ std::string disasmRImmediateField(const UINT8& R)
//return "";
}
-std::string disasmRField(const UINT8& R)
+std::string disasmRField(const uint8_t& R)
{
switch (R)
{
@@ -222,7 +222,7 @@ std::string disasmRField(const UINT8& R)
//return "";
}
-std::string disasmIField(const UINT8& I)
+std::string disasmIField(const uint8_t& I)
{
switch (I)
{
@@ -237,7 +237,7 @@ std::string disasmIField(const UINT8& I)
//return "";
}
-bool disasmSIField(const UINT8& SI)
+bool disasmSIField(const uint8_t& SI)
{
switch (SI)
{
@@ -250,24 +250,24 @@ bool disasmSIField(const UINT8& SI)
CPU_DISASSEMBLE( dsp16a )
{
- UINT8 opSize = 1;
- UINT32 dasmflags = 0;
- UINT16 op = oprom[0] | (oprom[1] << 8);
- UINT16 op2 = oprom[2] | (oprom[3] << 8);
+ uint8_t opSize = 1;
+ uint32_t dasmflags = 0;
+ uint16_t op = oprom[0] | (oprom[1] << 8);
+ uint16_t op2 = oprom[2] | (oprom[3] << 8);
// TODO: Test for previous "if CON" instruction and tab the next instruction in?
- const UINT8 opcode = (op >> 11) & 0x1f;
+ const uint8_t opcode = (op >> 11) & 0x1f;
switch(opcode)
{
// Format 1: Multiply/ALU Read/Write Group
case 0x06:
{
// F1, Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string yString = disasmYField(Y);
std::string fString = disasmF1Field(F1, D, S);
sprintf(buffer, "%s, %s", fString.c_str(), yString.c_str());
@@ -276,11 +276,11 @@ CPU_DISASSEMBLE( dsp16a )
case 0x04: case 0x1c:
{
// F1 Y=a0[1] | F1 Y=a1[1]
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string yString = disasmYField(Y);
std::string fString = disasmF1Field(F1, D, S);
std::string aString = (opcode == 0x1c) ? "a0" : "a1";
@@ -291,10 +291,10 @@ CPU_DISASSEMBLE( dsp16a )
case 0x16:
{
// F1, x = Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string yString = disasmYField(Y);
std::string fString = disasmF1Field(F1, D, S);
sprintf(buffer, "%s, x = %s", fString.c_str(), yString.c_str());
@@ -303,11 +303,11 @@ CPU_DISASSEMBLE( dsp16a )
case 0x17:
{
// F1, y[l] = Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string yString = disasmYField(Y);
std::string fString = disasmF1Field(F1, D, S);
std::string xString = (X ? "y" : "y1");
@@ -317,11 +317,11 @@ CPU_DISASSEMBLE( dsp16a )
case 0x1f:
{
// F1, y = Y, x = *pt++[i]
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string yString = disasmYField(Y);
std::string fString = disasmF1Field(F1, D, S);
std::string xString = (X ? "*pt++i" : "*pt++");
@@ -331,11 +331,11 @@ CPU_DISASSEMBLE( dsp16a )
case 0x19: case 0x1b:
{
// F1, y = a0|1, x = *pt++[i]
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string fString = disasmF1Field(F1, D, S);
std::string xString = (X ? "*pt++i" : "*pt++");
std::string aString = (opcode == 0x19) ? "a0" : "a1";
@@ -346,11 +346,11 @@ CPU_DISASSEMBLE( dsp16a )
case 0x14:
{
// F1, Y = y[1]
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string yString = disasmYField(Y);
std::string xString = (X ? "y" : "y1");
std::string fString = disasmF1Field(F1, D, S);
@@ -362,10 +362,10 @@ CPU_DISASSEMBLE( dsp16a )
case 0x07:
{
// F1, At[1] = Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 aT = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t aT = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string yString = disasmYField(Y);
std::string atString = (aT ? "a0" : "a1");
std::string fString = disasmF1Field(F1, aT, S);
@@ -377,11 +377,11 @@ CPU_DISASSEMBLE( dsp16a )
case 0x15:
{
// F1, Z : y[1]
- const UINT8 Z = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Z = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string zString = disasmZField(Z);
std::string xString = (X ? "y" : "y1");
std::string fString = disasmF1Field(F1, D, S);
@@ -391,11 +391,11 @@ CPU_DISASSEMBLE( dsp16a )
case 0x1d:
{
// F1, Z : y, x=*pt++[i]
- const UINT8 Z = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Z = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string zString = disasmZField(Z);
std::string xString = (X ? "*pt++i" : "*pt++");
std::string fString = disasmF1Field(F1, D, S);
@@ -407,11 +407,11 @@ CPU_DISASSEMBLE( dsp16a )
case 0x05:
{
// F1, Z : aT[1]
- const UINT8 Z = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 aT = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Z = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t aT = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
std::string zString = disasmZField(Z);
std::string atString = (aT ? "a0" : "a1");
atString += X ? "" : "1"; // TODO: Figure out unclear wording.
@@ -425,10 +425,10 @@ CPU_DISASSEMBLE( dsp16a )
case 0x13:
{
// if|ifc CON F2
- const UINT8 CON = (op & 0x001f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F2 = (op & 0x01e0) >> 5;
+ const uint8_t CON = (op & 0x001f);
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F2 = (op & 0x01e0) >> 5;
std::string fString = disasmF2Field(F2, D, S);
std::string conString = disasmCONField(CON);
if (op & 0x0800) sprintf(buffer, "if %s : %s", conString.c_str(), fString.c_str());
@@ -440,14 +440,14 @@ CPU_DISASSEMBLE( dsp16a )
case 0x00: case 0x01:
{
// goto JA
- const UINT16 JA = (op & 0x0fff) | (pc & 0xf000);
+ const uint16_t JA = (op & 0x0fff) | (pc & 0xf000);
sprintf(buffer, "goto 0x%04x", JA);
break;
}
case 0x10: case 0x11:
{
// call JA
- const UINT16 JA = (op & 0x0fff) | (pc & 0xf000);
+ const uint16_t JA = (op & 0x0fff) | (pc & 0xf000);
sprintf(buffer, "call 0x%04x", JA);
break;
}
@@ -456,7 +456,7 @@ CPU_DISASSEMBLE( dsp16a )
case 0x18:
{
// goto B
- const UINT8 B = (op & 0x0700) >> 8;
+ const uint8_t B = (op & 0x0700) >> 8;
std::string bString = disasmBField(B);
sprintf(buffer, "%s", bString.c_str());
break;
@@ -466,7 +466,7 @@ CPU_DISASSEMBLE( dsp16a )
case 0x1a:
{
// if CON [goto/call/return]
- const UINT8 CON = (op & 0x001f);
+ const uint8_t CON = (op & 0x001f);
std::string conString = disasmCONField(CON);
sprintf(buffer, "if %s:", conString.c_str());
// TODO: Test for invalid ops
@@ -479,8 +479,8 @@ CPU_DISASSEMBLE( dsp16a )
case 0x09: case 0x0b:
{
// R = aS
- const UINT8 R = (op & 0x03f0) >> 4;
- const UINT8 S = (op & 0x1000) >> 12;
+ const uint8_t R = (op & 0x03f0) >> 4;
+ const uint8_t S = (op & 0x1000) >> 12;
std::string rString = disasmRField(R);
sprintf(buffer, "%s = %s", rString.c_str(), (S ? "a1" : "a0"));
break;
@@ -488,8 +488,8 @@ CPU_DISASSEMBLE( dsp16a )
case 0x08:
{
// aT = R
- const UINT8 R = (op & 0x03f0) >> 4;
- const UINT8 aT = (op & 0x0400) >> 10;
+ const uint8_t R = (op & 0x03f0) >> 4;
+ const uint8_t aT = (op & 0x0400) >> 10;
std::string rString = disasmRField(R);
sprintf(buffer, "%s = %s", (aT ? "a0" : "a1"), rString.c_str());
break;
@@ -497,8 +497,8 @@ CPU_DISASSEMBLE( dsp16a )
case 0x0f:
{
// R = Y
- const UINT8 Y = (op & 0x000f);
- const UINT8 R = (op & 0x03f0) >> 4;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t R = (op & 0x03f0) >> 4;
std::string yString = disasmYField(Y);
std::string rString = disasmRField(R);
sprintf(buffer, "%s = %s", rString.c_str(), yString.c_str());
@@ -508,8 +508,8 @@ CPU_DISASSEMBLE( dsp16a )
case 0x0c:
{
// Y = R
- const UINT8 Y = (op & 0x000f);
- const UINT8 R = (op & 0x03f0) >> 4;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t R = (op & 0x03f0) >> 4;
std::string yString = disasmYField(Y);
std::string rString = disasmRField(R);
// TODO: page 3-31 "special function encoding"
@@ -519,8 +519,8 @@ CPU_DISASSEMBLE( dsp16a )
case 0x0d:
{
// Z : R
- const UINT8 Z = (op & 0x000f);
- const UINT8 R = (op & 0x03f0) >> 4;
+ const uint8_t Z = (op & 0x000f);
+ const uint8_t R = (op & 0x03f0) >> 4;
std::string zString = disasmZField(Z);
std::string rString = disasmRField(R);
sprintf(buffer, "%s <=> %s", zString.c_str(), rString.c_str());
@@ -531,7 +531,7 @@ CPU_DISASSEMBLE( dsp16a )
case 0x0a:
{
// R = N
- const UINT8 R = (op & 0x03f0) >> 4;
+ const uint8_t R = (op & 0x03f0) >> 4;
std::string rString = disasmRField(R);
sprintf(buffer, "%s = 0x%04x", rString.c_str(), op2);
opSize = 2;
@@ -542,8 +542,8 @@ CPU_DISASSEMBLE( dsp16a )
case 0x02: case 0x03:
{
// R = M
- const UINT16 M = (op & 0x01ff);
- const UINT8 R = (op & 0x0e00) >> 9;
+ const uint16_t M = (op & 0x01ff);
+ const uint8_t R = (op & 0x0e00) >> 9;
std::string rString = disasmRImmediateField(R);
sprintf(buffer, "%s = 0x%04x", rString.c_str(), M);
break;
@@ -553,8 +553,8 @@ CPU_DISASSEMBLE( dsp16a )
case 0x0e:
{
// do|redo K
- const UINT8 K = (op & 0x007f);
- const UINT8 NI = (op & 0x0780) >> 7;
+ const uint8_t K = (op & 0x007f);
+ const uint8_t NI = (op & 0x0780) >> 7;
sprintf(buffer, "do (next %d inst) %d times", NI, K);
// TODO: Limits on K & NI
if (NI == 0x00)
diff --git a/src/devices/cpu/dsp16/dsp16ops.hxx b/src/devices/cpu/dsp16/dsp16ops.hxx
index 23d8797e64d..6893819f754 100644
--- a/src/devices/cpu/dsp16/dsp16ops.hxx
+++ b/src/devices/cpu/dsp16/dsp16ops.hxx
@@ -24,7 +24,7 @@
// The YL register is the lower half of the 32 bit Y register
void* dsp16_device::addressYL()
{
- return (void*)(((UINT8*)&m_y) + 2);
+ return (void*)(((uint8_t*)&m_y) + 2);
}
@@ -50,7 +50,7 @@ bool dsp16_device::lmv()
}
-void dsp16_device::writeRegister(void* reg, const UINT16 &value)
+void dsp16_device::writeRegister(void* reg, const uint16_t &value)
{
// Make sure you're not attempting to write somewhere this function doesn't support.
if (reg == &m_p || reg == &m_a0 || reg == &m_a1)
@@ -62,7 +62,7 @@ void dsp16_device::writeRegister(void* reg, const UINT16 &value)
if (reg == &m_auc || reg == &m_c0 || reg == &m_c1 || reg == &m_c2)
{
// 8 bit registers
- *(UINT8*)reg = value & 0x00ff;
+ *(uint8_t*)reg = value & 0x00ff;
}
else if (reg == &m_psw)
{
@@ -92,12 +92,12 @@ void dsp16_device::writeRegister(void* reg, const UINT16 &value)
else
{
// Everything else
- *(UINT16*)reg = value;
+ *(uint16_t*)reg = value;
}
}
-bool dsp16_device::conditionTest(const UINT8& CON)
+bool dsp16_device::conditionTest(const uint8_t& CON)
{
switch (CON)
{
@@ -128,7 +128,7 @@ bool dsp16_device::conditionTest(const UINT8& CON)
}
-void* dsp16_device::registerFromRImmediateField(const UINT8& R)
+void* dsp16_device::registerFromRImmediateField(const uint8_t& R)
{
switch (R)
{
@@ -147,7 +147,7 @@ void* dsp16_device::registerFromRImmediateField(const UINT8& R)
}
-void* dsp16_device::registerFromRTable(const UINT8 &R)
+void* dsp16_device::registerFromRTable(const uint8_t &R)
{
switch (R)
{
@@ -186,7 +186,7 @@ void* dsp16_device::registerFromRTable(const UINT8 &R)
}
-void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S)
+void dsp16_device::executeF1Field(const uint8_t& F1, const uint8_t& D, const uint8_t& S)
{
// TODO: I'm pretty sure we need to feed X into these as well - Double check
@@ -195,7 +195,7 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
// implementation details (page 3-9)
// Where is are the results going?
- UINT64* destinationReg = nullptr;
+ uint64_t* destinationReg = nullptr;
switch (D)
{
case 0x00: destinationReg = &m_a0; break;
@@ -204,7 +204,7 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
}
// Which source is being used?
- UINT64* sourceReg = nullptr;
+ uint64_t* sourceReg = nullptr;
switch (S)
{
case 0x00: sourceReg = &m_a0; break;
@@ -214,7 +214,7 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
// We must compute into an intermediate variable to compute flags on
- UINT64 result = 0;
+ uint64_t result = 0;
bool justATest = false;
switch (F1)
@@ -235,8 +235,8 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
{
// p = x*y
// TODO: What happens to the flags in this operation?
- const INT16 y = (m_y & 0xffff0000) >> 16;
- m_p = (INT32)((INT16)m_x * y);
+ const int16_t y = (m_y & 0xffff0000) >> 16;
+ m_p = (int32_t)((int16_t)m_x * y);
justATest = true;
break;
}
@@ -292,11 +292,11 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
case 0x0b:
{
// aS-y
- INT64 aS = *sourceReg;
+ int64_t aS = *sourceReg;
if (aS & U64(0x800000000))
aS |= U64(0xfffffff000000000);
- INT64 y = (m_y & 0xffff0000) >> 16;
+ int64_t y = (m_y & 0xffff0000) >> 16;
if (y & 0x8000)
y |= U64(0xffffffffffff0000);
@@ -313,11 +313,11 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
case 0x0d:
{
// Ad = aS+y
- INT64 aS = *sourceReg;
+ int64_t aS = *sourceReg;
if (aS & U64(0x800000000))
aS |= U64(0xfffffff000000000);
- INT64 y = (m_y & 0xffff0000) >> 16;
+ int64_t y = (m_y & 0xffff0000) >> 16;
if (y & 0x8000)
y |= U64(0xffffffffffff0000);
@@ -333,11 +333,11 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
case 0x0f:
{
// Ad = aS-y
- INT64 aS = *sourceReg;
+ int64_t aS = *sourceReg;
if (aS & U64(0x800000000))
aS |= U64(0xfffffff000000000);
- INT64 y = (m_y & 0xffff0000) >> 16;
+ int64_t y = (m_y & 0xffff0000) >> 16;
if (y & 0x8000)
y |= U64(0xffffffffffff0000);
@@ -371,14 +371,14 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
// If it was a real operation, make sure the data goes where it should
if (!justATest)
- *destinationReg = (UINT64)result & U64(0x0000000fffffffff);
+ *destinationReg = (uint64_t)result & U64(0x0000000fffffffff);
}
-UINT16* dsp16_device::registerFromYFieldUpper(const UINT8& Y)
+uint16_t* dsp16_device::registerFromYFieldUpper(const uint8_t& Y)
{
- UINT16* destinationReg = nullptr;
- const UINT8 N = (Y & 0x0c) >> 2;
+ uint16_t* destinationReg = nullptr;
+ const uint8_t N = (Y & 0x0c) >> 2;
switch (N)
{
case 0x00: destinationReg = &m_r0; break;
@@ -391,11 +391,11 @@ UINT16* dsp16_device::registerFromYFieldUpper(const UINT8& Y)
}
-void dsp16_device::executeYFieldPost(const UINT8& Y)
+void dsp16_device::executeYFieldPost(const uint8_t& Y)
{
- UINT16* opReg = registerFromYFieldUpper(Y);
+ uint16_t* opReg = registerFromYFieldUpper(Y);
- const UINT8 lower = Y & 0x03;
+ const uint8_t lower = Y & 0x03;
switch (lower)
{
case 0x00: /* nop */ break;
@@ -406,9 +406,9 @@ void dsp16_device::executeYFieldPost(const UINT8& Y)
}
-void dsp16_device::executeZFieldPartOne(const UINT8& Z, UINT16* rN)
+void dsp16_device::executeZFieldPartOne(const uint8_t& Z, uint16_t* rN)
{
- const UINT8 lower = Z & 0x03;
+ const uint8_t lower = Z & 0x03;
switch (lower)
{
case 0x00: /* nop */ break;
@@ -419,9 +419,9 @@ void dsp16_device::executeZFieldPartOne(const UINT8& Z, UINT16* rN)
}
-void dsp16_device::executeZFieldPartTwo(const UINT8& Z, UINT16* rN)
+void dsp16_device::executeZFieldPartTwo(const uint8_t& Z, uint16_t* rN)
{
- const UINT8 lower = Z & 0x03;
+ const uint8_t lower = Z & 0x03;
switch (lower)
{
case 0x00: (*rN)++; break;
@@ -432,14 +432,14 @@ void dsp16_device::executeZFieldPartTwo(const UINT8& Z, UINT16* rN)
}
-void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance)
+void dsp16_device::execute_one(const uint16_t& op, uint8_t& cycles, uint8_t& pcAdvance)
{
cycles = 1;
pcAdvance = 0;
// NOTE: pages 3-5 through 3-19 are good english descriptions of what's up
- const UINT8 opcode = (op >> 11) & 0x1f;
+ const uint8_t opcode = (op >> 11) & 0x1f;
switch(opcode)
{
// Format 1: Multiply/ALU Read/Write Group
@@ -447,10 +447,10 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-38")
// F1, Y : (page 3-38)
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
executeF1Field(F1, D, S);
executeYFieldPost(Y);
cycles = 1;
@@ -461,14 +461,14 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-40")
// F1 Y=a0[1] | F1 Y=a1[1] : (page 3-40)
- const UINT8 Y = (op & 0x000f);
- //const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
- UINT16* destinationReg = registerFromYFieldUpper(Y);
+ const uint8_t Y = (op & 0x000f);
+ //const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
+ uint16_t* destinationReg = registerFromYFieldUpper(Y);
// (page 3-18)
- UINT16 aRegValue = 0x0000;
+ uint16_t aRegValue = 0x0000;
if (op & 0xc000)
{
aRegValue = (m_a0 & U64(0x0ffff0000)) >> 16;
@@ -488,12 +488,12 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-42")
// F1, x = Y : (page 3-42)
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
executeF1Field(F1, D, S);
- UINT16* sourceReg = registerFromYFieldUpper(Y);
+ uint16_t* sourceReg = registerFromYFieldUpper(Y);
writeRegister(&m_x, data_read(*sourceReg));
executeYFieldPost(Y);
cycles = 1;
@@ -504,14 +504,14 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-44")
// F1, y[l] = Y : (page 3-44)
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
executeF1Field(F1, D, S);
- UINT16* sourceReg = registerFromYFieldUpper(Y);
- UINT16 sourceValue = data_read(*sourceReg);
+ uint16_t* sourceReg = registerFromYFieldUpper(Y);
+ uint16_t sourceValue = data_read(*sourceReg);
switch (X)
{
case 0x00: writeRegister(addressYL(), sourceValue); break;
@@ -527,13 +527,13 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-46")
// F1, y = Y, x = *pt++[i] : (page 3-46)
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
executeF1Field(F1, D, S);
- UINT16* sourceRegR = registerFromYFieldUpper(Y);
+ uint16_t* sourceRegR = registerFromYFieldUpper(Y);
writeRegister(&m_y, data_read(*sourceRegR));
executeYFieldPost(Y);
writeRegister(&m_x, data_read(m_pt));
@@ -550,11 +550,11 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-48")
// F1, y = a0|1, x = *pt++[i] : (page 3-48)
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
bool useA1 = (opcode == 0x1b);
if (Y != 0x00) printf("Unknown opcode @ PC=0x%04x", m_pc);
m_y = (useA1) ? (m_a1 & 0xffffffff) : (m_a0 & 0xffffffff); // TODO: What happens to Ax when it goes 32 bit (pc=3f & pc=47)?
@@ -573,14 +573,14 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-53")
// F1, Y = y[l] : (page 3-53)
- const UINT8 Y = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
executeF1Field(F1, D, S);
- UINT16* destinationReg = registerFromYFieldUpper(Y);
- UINT16 yRegValue = 0x0000;
+ uint16_t* destinationReg = registerFromYFieldUpper(Y);
+ uint16_t yRegValue = 0x0000;
switch (X)
{
case 0x00: yRegValue = (m_y & 0x0000ffff); break;
@@ -600,20 +600,20 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
DSP_LINE("3-50")
// F1, At[1] = Y : (page 3-50)
// TODO: What does the X field do here, exactly?
- const UINT8 Y = (op & 0x000f);
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 aT = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t aT = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
executeF1Field(F1, !aT, S);
- UINT64* destinationReg = nullptr;
+ uint64_t* destinationReg = nullptr;
switch(aT)
{
case 0: destinationReg = &m_a1; break;
case 1: destinationReg = &m_a0; break;
default: break;
}
- UINT16 sourceAddress = *(registerFromYFieldUpper(Y));
- INT64 sourceValueSigned = (INT16)data_read(sourceAddress);
+ uint16_t sourceAddress = *(registerFromYFieldUpper(Y));
+ int64_t sourceValueSigned = (int16_t)data_read(sourceAddress);
*destinationReg = sourceValueSigned & U64(0xffffffffff);
executeYFieldPost(Y);
cycles = 1;
@@ -626,14 +626,14 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-54")
// F1, Z : y[l] : (page 3-54)
- const UINT8 Z = (op & 0x000f);
- const UINT8 X = (op & 0x0010) >> 4;
- const UINT8 S = (op & 0x0200) >> 9;
- const UINT8 D = (op & 0x0400) >> 10;
- const UINT8 F1 = (op & 0x01e0) >> 5;
+ const uint8_t Z = (op & 0x000f);
+ const uint8_t X = (op & 0x0010) >> 4;
+ const uint8_t S = (op & 0x0200) >> 9;
+ const uint8_t D = (op & 0x0400) >> 10;
+ const uint8_t F1 = (op & 0x01e0) >> 5;
executeF1Field(F1, D, S);
- UINT16 temp = 0x0000;
- UINT16* rN = registerFromYFieldUpper(Z);
+ uint16_t temp = 0x0000;
+ uint16_t* rN = registerFromYFieldUpper(Z);
switch (X)
{
case 0x00:
@@ -661,11 +661,11 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("?")
// F1, Z : y, x=*pt++[i]
- //const UINT8 Z = (op & 0x000f);
- //const UINT8 X = (op & 0x0010) >> 4;
- //const UINT8 S = (op & 0x0200) >> 9;
- //const UINT8 D = (op & 0x0400) >> 10;
- //const UINT8 F1 = (op & 0x01e0) >> 5;
+ //const uint8_t Z = (op & 0x000f);
+ //const uint8_t X = (op & 0x0010) >> 4;
+ //const uint8_t S = (op & 0x0200) >> 9;
+ //const uint8_t D = (op & 0x0400) >> 10;
+ //const uint8_t F1 = (op & 0x01e0) >> 5;
break;
}
@@ -674,11 +674,11 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("?")
// F1, Z : aT[1]
- //const UINT8 Z = (op & 0x000f);
- //const UINT8 X = (op & 0x0010) >> 4;
- //const UINT8 S = (op & 0x0200) >> 9;
- //const UINT8 aT = (op & 0x0400) >> 10;
- //const UINT8 F1 = (op & 0x01e0) >> 5;
+ //const uint8_t Z = (op & 0x000f);
+ //const uint8_t X = (op & 0x0010) >> 4;
+ //const uint8_t S = (op & 0x0200) >> 9;
+ //const uint8_t aT = (op & 0x0400) >> 10;
+ //const uint8_t F1 = (op & 0x01e0) >> 5;
break;
}
@@ -688,10 +688,10 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-36")
// if|ifc CON F2 (page 3-36)
- const UINT8 CON = (op & 0x001f);
- //const UINT8 S = (op & 0x0200) >> 9;
- //const UINT8 D = (op & 0x0400) >> 10;
- //const UINT8 F2 = (op & 0x01e0) >> 5;
+ const uint8_t CON = (op & 0x001f);
+ //const uint8_t S = (op & 0x0200) >> 9;
+ //const uint8_t D = (op & 0x0400) >> 10;
+ //const uint8_t F2 = (op & 0x01e0) >> 5;
bool conditionFulfilled = conditionTest(CON);
if (conditionFulfilled)
{
@@ -707,7 +707,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-20")
// goto JA : (page 3-20) (DONE)
- const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
+ const uint16_t JA = (op & 0x0fff) | (m_pc & 0xf000);
m_pc = JA;
cycles = 2;
pcAdvance = 0;
@@ -718,7 +718,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-23")
// call JA : (page 3-23)
- const UINT16 JA = (op & 0x0fff) | (m_pc & 0xf000);
+ const uint16_t JA = (op & 0x0fff) | (m_pc & 0xf000);
m_pr = m_pc + 1;
m_pc = JA;
cycles = 2;
@@ -731,7 +731,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-21")
// goto B : (page 3-21)
- const UINT8 B = (op & 0x0700) >> 8;
+ const uint8_t B = (op & 0x0700) >> 8;
switch (B)
{
case 0x00: m_pc = m_pr; break;
@@ -750,7 +750,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-22")
// if CON [goto/call/return] : (page 3-22)
- const UINT8 CON = (op & 0x001f);
+ const uint8_t CON = (op & 0x001f);
bool conditionFulfilled = conditionTest(CON);
cycles = 3; // TODO: This may need to interact with the next opcode to make sure it doesn't exceed 3?
pcAdvance = 1;
@@ -767,11 +767,11 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
DSP_LINE("3-29")
// R = aS : (page 3-29)
// TODO: Fix register pdxX (pc=338)
- const UINT8 R = (op & 0x03f0) >> 4;
- const UINT8 S = (op & 0x1000) >> 12;
+ const uint8_t R = (op & 0x03f0) >> 4;
+ const uint8_t S = (op & 0x1000) >> 12;
void* destinationReg = registerFromRTable(R);
- UINT64* sourceReg = (S) ? &m_a1 : &m_a0;
- UINT16 sourceValue = (*sourceReg & U64(0x0ffff0000)) >> 16;
+ uint64_t* sourceReg = (S) ? &m_a1 : &m_a0;
+ uint16_t sourceValue = (*sourceReg & U64(0x0ffff0000)) >> 16;
writeRegister(destinationReg, sourceValue);
cycles = 2;
pcAdvance = 1;
@@ -781,9 +781,9 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-30")
// aT = R : (page 3-30)
- const UINT8 R = (op & 0x03f0) >> 4;
- const UINT8 aT = (op & 0x0400) >> 10;
- UINT64* destinationReg = nullptr;
+ const uint8_t R = (op & 0x03f0) >> 4;
+ const uint8_t aT = (op & 0x0400) >> 10;
+ uint64_t* destinationReg = nullptr;
switch(aT)
{
case 0: destinationReg = &m_a1; break;
@@ -792,8 +792,8 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
}
void* sourceReg = registerFromRTable(R);
*destinationReg &= U64(0x00000ffff);
- *destinationReg |= (*(UINT16*)sourceReg) << 16; // TODO: Fix for all registers
- if (*(UINT16*)sourceReg & 0x8000)
+ *destinationReg |= (*(uint16_t*)sourceReg) << 16; // TODO: Fix for all registers
+ if (*(uint16_t*)sourceReg & 0x8000)
*destinationReg |= U64(0xf00000000);
// TODO: Special function encoding
cycles = 2;
@@ -804,9 +804,9 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("3-32")
// R = Y : (page 3-32)
- const UINT8 Y = (op & 0x000f);
- const UINT8 R = (op & 0x03f0) >> 4;
- UINT16* sourceReg = registerFromYFieldUpper(Y);
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t R = (op & 0x03f0) >> 4;
+ uint16_t* sourceReg = registerFromYFieldUpper(Y);
void* destinationReg = registerFromRTable(R);
writeRegister(destinationReg, data_read(*sourceReg));
executeYFieldPost(Y);
@@ -819,10 +819,10 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
DSP_LINE("3-33")
// Y = R : (page 3-33)
// TODO: Zero & Sign extend i, c0, c1, c2, and auc
- const UINT8 Y = (op & 0x000f);
- const UINT8 R = (op & 0x03f0) >> 4;
- UINT16* destinationReg = registerFromYFieldUpper(Y);
- UINT16* sourceReg = (UINT16*)registerFromRTable(R); // TODO: This won't work for certain registers!
+ const uint8_t Y = (op & 0x000f);
+ const uint8_t R = (op & 0x03f0) >> 4;
+ uint16_t* destinationReg = registerFromYFieldUpper(Y);
+ uint16_t* sourceReg = (uint16_t*)registerFromRTable(R); // TODO: This won't work for certain registers!
data_write(*destinationReg, *sourceReg); // Fix in data_write() maybe?
executeYFieldPost(Y);
cycles = 2;
@@ -833,8 +833,8 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
{
DSP_LINE("?")
// Z : R
- //const UINT8 Z = (op & 0x000f);
- //const UINT8 R = (op & 0x03f0) >> 4;
+ //const uint8_t Z = (op & 0x000f);
+ //const uint8_t R = (op & 0x03f0) >> 4;
break;
}
@@ -845,8 +845,8 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
// R = N : (page 3-28) (DONE)
// NOTE: The docs speak of register sources & sign extension, but this is a register
// destination, so, typo? If so, what does one do with the overflow bits?
- const UINT8 R = (op & 0x03f0) >> 4;
- const UINT16 iVal = opcode_read(1);
+ const uint8_t R = (op & 0x03f0) >> 4;
+ const uint16_t iVal = opcode_read(1);
void* destinationReg = registerFromRTable(R);
writeRegister(destinationReg, iVal);
cycles = 2;
@@ -860,11 +860,11 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
DSP_LINE("3-27")
// R = M : (page 3-27)
// TODO: Figure out notes about the DSP16A vs the DSP16. 9 bit is very DSP16...
- const UINT16 M = (op & 0x01ff);
- const UINT8 R = (op & 0x0e00) >> 9;
+ const uint16_t M = (op & 0x01ff);
+ const uint8_t R = (op & 0x0e00) >> 9;
void* destinationReg = registerFromRImmediateField(R);
// Sign extend if the destination is j or k
- UINT16 mValue = M;
+ uint16_t mValue = M;
if (destinationReg == &m_j || destinationReg == &m_k)
{
if (mValue & 0x0100) mValue |= 0xfe00;
@@ -881,8 +881,8 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
DSP_LINE("3-25/3-26")
// do|redo K : (pages 3-25 & 3-26)
// TODO: The timings are intricate to say the least...
- const UINT8 K = (op & 0x007f);
- const UINT8 NI = (op & 0x0780) >> 7;
+ const uint8_t K = (op & 0x007f);
+ const uint8_t NI = (op & 0x0780) >> 7;
if (NI != 0)
{
// Do
diff --git a/src/devices/cpu/dsp32/dsp32.cpp b/src/devices/cpu/dsp32/dsp32.cpp
index 454be6c1aa7..2f0d8d2eeab 100644
--- a/src/devices/cpu/dsp32/dsp32.cpp
+++ b/src/devices/cpu/dsp32/dsp32.cpp
@@ -142,7 +142,7 @@ const device_type DSP32C = &device_creator<dsp32c_device>;
// dsp32c_device - constructor
//-------------------------------------------------
-dsp32c_device::dsp32c_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+dsp32c_device::dsp32c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, DSP32C, "DSP32C", tag, owner, clock, "dsp32c", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 32, 24),
m_pin(0),
@@ -399,7 +399,7 @@ void dsp32c_device::state_string_export(const device_state_entry &entry, std::st
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 dsp32c_device::disasm_min_opcode_bytes() const
+uint32_t dsp32c_device::disasm_min_opcode_bytes() const
{
return 4;
}
@@ -410,7 +410,7 @@ UINT32 dsp32c_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 dsp32c_device::disasm_max_opcode_bytes() const
+uint32_t dsp32c_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -421,7 +421,7 @@ UINT32 dsp32c_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t dsp32c_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t dsp32c_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( dsp32c );
return CPU_DISASSEMBLE_NAME(dsp32c)(this, buffer, pc, oprom, opram, options);
@@ -434,22 +434,22 @@ offs_t dsp32c_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
// MEMORY ACCESSORS
//**************************************************************************
-inline UINT32 dsp32c_device::ROPCODE(offs_t pc)
+inline uint32_t dsp32c_device::ROPCODE(offs_t pc)
{
return m_direct->read_dword(pc);
}
-inline UINT8 dsp32c_device::RBYTE(offs_t addr)
+inline uint8_t dsp32c_device::RBYTE(offs_t addr)
{
return m_program->read_byte(addr);
}
-inline void dsp32c_device::WBYTE(offs_t addr, UINT8 data)
+inline void dsp32c_device::WBYTE(offs_t addr, uint8_t data)
{
m_program->write_byte(addr, data);
}
-inline UINT16 dsp32c_device::RWORD(offs_t addr)
+inline uint16_t dsp32c_device::RWORD(offs_t addr)
{
#if DETECT_MISALIGNED_MEMORY
if (!WORD_ALIGNED(addr))
@@ -458,7 +458,7 @@ inline UINT16 dsp32c_device::RWORD(offs_t addr)
return m_program->read_word(addr);
}
-inline UINT32 dsp32c_device::RLONG(offs_t addr)
+inline uint32_t dsp32c_device::RLONG(offs_t addr)
{
#if DETECT_MISALIGNED_MEMORY
if (!DWORD_ALIGNED(addr))
@@ -467,7 +467,7 @@ inline UINT32 dsp32c_device::RLONG(offs_t addr)
return m_program->read_dword(addr);
}
-inline void dsp32c_device::WWORD(offs_t addr, UINT16 data)
+inline void dsp32c_device::WWORD(offs_t addr, uint16_t data)
{
#if DETECT_MISALIGNED_MEMORY
if (!WORD_ALIGNED(addr))
@@ -476,7 +476,7 @@ inline void dsp32c_device::WWORD(offs_t addr, UINT16 data)
m_program->write_word(addr, data);
}
-inline void dsp32c_device::WLONG(offs_t addr, UINT32 data)
+inline void dsp32c_device::WLONG(offs_t addr, uint32_t data)
{
#if DETECT_MISALIGNED_MEMORY
if (!DWORD_ALIGNED(addr))
@@ -508,9 +508,9 @@ void dsp32c_device::set_irq_line(int irqline, int state)
// REGISTER HANDLING
//**************************************************************************
-void dsp32c_device::update_pcr(UINT16 newval)
+void dsp32c_device::update_pcr(uint16_t newval)
{
- UINT16 oldval = m_pcr;
+ uint16_t oldval = m_pcr;
m_pcr = newval;
// reset the chip if we get a reset
@@ -528,7 +528,7 @@ void dsp32c_device::update_pins(void)
{
if (m_pcr & PCR_ENI)
{
- UINT16 newoutput = 0;
+ uint16_t newoutput = 0;
if (m_pcr & PCR_PIFs)
newoutput |= DSP32_OUTPUT_PIF;
@@ -563,7 +563,7 @@ void dsp32c_device::update_pins(void)
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 dsp32c_device::execute_min_cycles() const
+uint32_t dsp32c_device::execute_min_cycles() const
{
return 4;
}
@@ -574,7 +574,7 @@ UINT32 dsp32c_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 dsp32c_device::execute_max_cycles() const
+uint32_t dsp32c_device::execute_max_cycles() const
{
return 4;
}
@@ -585,7 +585,7 @@ UINT32 dsp32c_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 dsp32c_device::execute_input_lines() const
+uint32_t dsp32c_device::execute_input_lines() const
{
return 2;
}
@@ -630,7 +630,7 @@ void dsp32c_device::execute_run()
// PARALLEL INTERFACE WRITES
//**************************************************************************
-const UINT32 dsp32c_device::s_regmap[4][16] =
+const uint32_t dsp32c_device::s_regmap[4][16] =
{
{ // DSP32 compatible mode
PIO_PAR|LOWER, PIO_PAR|UPPER, PIO_PDR|LOWER, PIO_PDR|UPPER,
@@ -681,7 +681,7 @@ void dsp32c_device::dma_load()
// only process if DMA is enabled
if (m_pcr & PCR_DMA)
{
- UINT32 addr = m_par | (m_pare << 16);
+ uint32_t addr = m_par | (m_pare << 16);
// 16-bit case
if (!(m_pcr & PCR_DMA32))
@@ -690,7 +690,7 @@ void dsp32c_device::dma_load()
// 32-bit case
else
{
- UINT32 temp = RLONG(addr & 0xfffffc);
+ uint32_t temp = RLONG(addr & 0xfffffc);
m_pdr = temp >> 16;
m_pdr2 = temp & 0xffff;
}
@@ -706,7 +706,7 @@ void dsp32c_device::dma_store()
// only process if DMA is enabled
if (m_pcr & PCR_DMA)
{
- UINT32 addr = m_par | (m_pare << 16);
+ uint32_t addr = m_par | (m_pare << 16);
// 16-bit case
if (!(m_pcr & PCR_DMA32))
@@ -724,8 +724,8 @@ void dsp32c_device::dma_store()
void dsp32c_device::pio_w(int reg, int data)
{
- UINT16 mask;
- UINT8 mode;
+ uint16_t mask;
+ uint8_t mode;
// look up register and mask
mode = ((m_pcr >> 8) & 2) | ((m_pcr >> 1) & 1);
@@ -806,8 +806,8 @@ void dsp32c_device::pio_w(int reg, int data)
int dsp32c_device::pio_r(int reg)
{
- UINT16 mask, result = 0xffff;
- UINT8 mode, shift = 0;
+ uint16_t mask, result = 0xffff;
+ uint8_t mode, shift = 0;
// look up register and mask
mode = ((m_pcr >> 8) & 2) | ((m_pcr >> 1) & 1);
diff --git a/src/devices/cpu/dsp32/dsp32.h b/src/devices/cpu/dsp32/dsp32.h
index b83888b7a6a..62a56ef4a0a 100644
--- a/src/devices/cpu/dsp32/dsp32.h
+++ b/src/devices/cpu/dsp32/dsp32.h
@@ -96,7 +96,7 @@ class dsp32c_device : public cpu_device
{
public:
// construction/destruction
- dsp32c_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ dsp32c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class _Object> static devcb_base &set_output_pins_callback(device_t &device, _Object object) { return downcast<dsp32c_device &>(device).m_output_pins_changed.set_callback(object); }
@@ -111,9 +111,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -126,248 +126,248 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// memory accessors
- UINT32 ROPCODE(offs_t pc);
- UINT8 RBYTE(offs_t addr);
- void WBYTE(offs_t addr, UINT8 data);
- UINT16 RWORD(offs_t addr);
- UINT32 RLONG(offs_t addr);
- void WWORD(offs_t addr, UINT16 data);
- void WLONG(offs_t addr, UINT32 data);
+ uint32_t ROPCODE(offs_t pc);
+ uint8_t RBYTE(offs_t addr);
+ void WBYTE(offs_t addr, uint8_t data);
+ uint16_t RWORD(offs_t addr);
+ uint32_t RLONG(offs_t addr);
+ void WWORD(offs_t addr, uint16_t data);
+ void WLONG(offs_t addr, uint32_t data);
// interrupts
void check_irqs();
void set_irq_line(int irqline, int state);
- void update_pcr(UINT16 newval);
+ void update_pcr(uint16_t newval);
void update_pins(void);
- void illegal(UINT32 op);
- void unimplemented(UINT32 op);
+ void illegal(uint32_t op);
+ void unimplemented(uint32_t op);
void execute_one();
// CAU helpers
- UINT32 cau_read_pi_special(UINT8 i);
- void cau_write_pi_special(UINT8 i, UINT32 val);
- UINT8 cau_read_pi_1byte(int pi);
- UINT16 cau_read_pi_2byte(int pi);
- UINT32 cau_read_pi_4byte(int pi);
- void cau_write_pi_1byte(int pi, UINT8 val);
- void cau_write_pi_2byte(int pi, UINT16 val);
- void cau_write_pi_4byte(int pi, UINT32 val);
+ uint32_t cau_read_pi_special(uint8_t i);
+ void cau_write_pi_special(uint8_t i, uint32_t val);
+ uint8_t cau_read_pi_1byte(int pi);
+ uint16_t cau_read_pi_2byte(int pi);
+ uint32_t cau_read_pi_4byte(int pi);
+ void cau_write_pi_1byte(int pi, uint8_t val);
+ void cau_write_pi_2byte(int pi, uint16_t val);
+ void cau_write_pi_4byte(int pi, uint32_t val);
// DAU helpers
double dau_get_amult(int aidx);
double dau_get_anzflags();
- UINT8 dau_get_avuflags();
+ uint8_t dau_get_avuflags();
void remember_last_dau(int aidx);
void dau_set_val_noflags(int aidx, double res);
void dau_set_val_flags(int aidx, double res);
- double dsp_to_double(UINT32 val);
- UINT32 double_to_dsp(double val);
+ double dsp_to_double(uint32_t val);
+ uint32_t double_to_dsp(double val);
double dau_read_pi_special(int i);
void dau_write_pi_special(int i, double val);
double dau_read_pi_double_1st(int pi, int multiplier);
double dau_read_pi_double_2nd(int pi, int multiplier, double xval);
- UINT32 dau_read_pi_4bytes(int pi);
- UINT16 dau_read_pi_2bytes(int pi);
+ uint32_t dau_read_pi_4bytes(int pi);
+ uint16_t dau_read_pi_2bytes(int pi);
void dau_write_pi_double(int pi, double val);
- void dau_write_pi_4bytes(int pi, UINT32 val);
- void dau_write_pi_2bytes(int pi, UINT16 val);
+ void dau_write_pi_4bytes(int pi, uint32_t val);
+ void dau_write_pi_2bytes(int pi, uint16_t val);
// common condition routine
int condition(int cond);
// CAU branch instruction implementation
- void nop(UINT32 op);
- void goto_t(UINT32 op);
- void goto_pl(UINT32 op);
- void goto_mi(UINT32 op);
- void goto_ne(UINT32 op);
- void goto_eq(UINT32 op);
- void goto_vc(UINT32 op);
- void goto_vs(UINT32 op);
- void goto_cc(UINT32 op);
- void goto_cs(UINT32 op);
- void goto_ge(UINT32 op);
- void goto_lt(UINT32 op);
- void goto_gt(UINT32 op);
- void goto_le(UINT32 op);
- void goto_hi(UINT32 op);
- void goto_ls(UINT32 op);
- void goto_auc(UINT32 op);
- void goto_aus(UINT32 op);
- void goto_age(UINT32 op);
- void goto_alt(UINT32 op);
- void goto_ane(UINT32 op);
- void goto_aeq(UINT32 op);
- void goto_avc(UINT32 op);
- void goto_avs(UINT32 op);
- void goto_agt(UINT32 op);
- void goto_ale(UINT32 op);
- void goto_ibe(UINT32 op);
- void goto_ibf(UINT32 op);
- void goto_obf(UINT32 op);
- void goto_obe(UINT32 op);
- void goto_pde(UINT32 op);
- void goto_pdf(UINT32 op);
- void goto_pie(UINT32 op);
- void goto_pif(UINT32 op);
- void goto_syc(UINT32 op);
- void goto_sys(UINT32 op);
- void goto_fbc(UINT32 op);
- void goto_fbs(UINT32 op);
- void goto_irq1lo(UINT32 op);
- void goto_irq1hi(UINT32 op);
- void goto_irq2lo(UINT32 op);
- void goto_irq2hi(UINT32 op);
- void dec_goto(UINT32 op);
- void call(UINT32 op);
- void goto24(UINT32 op);
- void call24(UINT32 op);
- void do_i(UINT32 op);
- void do_r(UINT32 op);
+ void nop(uint32_t op);
+ void goto_t(uint32_t op);
+ void goto_pl(uint32_t op);
+ void goto_mi(uint32_t op);
+ void goto_ne(uint32_t op);
+ void goto_eq(uint32_t op);
+ void goto_vc(uint32_t op);
+ void goto_vs(uint32_t op);
+ void goto_cc(uint32_t op);
+ void goto_cs(uint32_t op);
+ void goto_ge(uint32_t op);
+ void goto_lt(uint32_t op);
+ void goto_gt(uint32_t op);
+ void goto_le(uint32_t op);
+ void goto_hi(uint32_t op);
+ void goto_ls(uint32_t op);
+ void goto_auc(uint32_t op);
+ void goto_aus(uint32_t op);
+ void goto_age(uint32_t op);
+ void goto_alt(uint32_t op);
+ void goto_ane(uint32_t op);
+ void goto_aeq(uint32_t op);
+ void goto_avc(uint32_t op);
+ void goto_avs(uint32_t op);
+ void goto_agt(uint32_t op);
+ void goto_ale(uint32_t op);
+ void goto_ibe(uint32_t op);
+ void goto_ibf(uint32_t op);
+ void goto_obf(uint32_t op);
+ void goto_obe(uint32_t op);
+ void goto_pde(uint32_t op);
+ void goto_pdf(uint32_t op);
+ void goto_pie(uint32_t op);
+ void goto_pif(uint32_t op);
+ void goto_syc(uint32_t op);
+ void goto_sys(uint32_t op);
+ void goto_fbc(uint32_t op);
+ void goto_fbs(uint32_t op);
+ void goto_irq1lo(uint32_t op);
+ void goto_irq1hi(uint32_t op);
+ void goto_irq2lo(uint32_t op);
+ void goto_irq2hi(uint32_t op);
+ void dec_goto(uint32_t op);
+ void call(uint32_t op);
+ void goto24(uint32_t op);
+ void call24(uint32_t op);
+ void do_i(uint32_t op);
+ void do_r(uint32_t op);
// CAU 16-bit arithmetic implementation
- void add_si(UINT32 op);
- void add_ss(UINT32 op);
- void mul2_s(UINT32 op);
- void subr_ss(UINT32 op);
- void addr_ss(UINT32 op);
- void sub_ss(UINT32 op);
- void neg_s(UINT32 op);
- void andc_ss(UINT32 op);
- void cmp_ss(UINT32 op);
- void xor_ss(UINT32 op);
- void rcr_s(UINT32 op);
- void or_ss(UINT32 op);
- void rcl_s(UINT32 op);
- void shr_s(UINT32 op);
- void div2_s(UINT32 op);
- void and_ss(UINT32 op);
- void test_ss(UINT32 op);
- void add_di(UINT32 op);
- void subr_di(UINT32 op);
- void addr_di(UINT32 op);
- void sub_di(UINT32 op);
- void andc_di(UINT32 op);
- void cmp_di(UINT32 op);
- void xor_di(UINT32 op);
- void or_di(UINT32 op);
- void and_di(UINT32 op);
- void test_di(UINT32 op);
+ void add_si(uint32_t op);
+ void add_ss(uint32_t op);
+ void mul2_s(uint32_t op);
+ void subr_ss(uint32_t op);
+ void addr_ss(uint32_t op);
+ void sub_ss(uint32_t op);
+ void neg_s(uint32_t op);
+ void andc_ss(uint32_t op);
+ void cmp_ss(uint32_t op);
+ void xor_ss(uint32_t op);
+ void rcr_s(uint32_t op);
+ void or_ss(uint32_t op);
+ void rcl_s(uint32_t op);
+ void shr_s(uint32_t op);
+ void div2_s(uint32_t op);
+ void and_ss(uint32_t op);
+ void test_ss(uint32_t op);
+ void add_di(uint32_t op);
+ void subr_di(uint32_t op);
+ void addr_di(uint32_t op);
+ void sub_di(uint32_t op);
+ void andc_di(uint32_t op);
+ void cmp_di(uint32_t op);
+ void xor_di(uint32_t op);
+ void or_di(uint32_t op);
+ void and_di(uint32_t op);
+ void test_di(uint32_t op);
// CAU 24-bit arithmetic implementation
- void adde_si(UINT32 op);
- void adde_ss(UINT32 op);
- void mul2e_s(UINT32 op);
- void subre_ss(UINT32 op);
- void addre_ss(UINT32 op);
- void sube_ss(UINT32 op);
- void nege_s(UINT32 op);
- void andce_ss(UINT32 op);
- void cmpe_ss(UINT32 op);
- void xore_ss(UINT32 op);
- void rcre_s(UINT32 op);
- void ore_ss(UINT32 op);
- void rcle_s(UINT32 op);
- void shre_s(UINT32 op);
- void div2e_s(UINT32 op);
- void ande_ss(UINT32 op);
- void teste_ss(UINT32 op);
- void adde_di(UINT32 op);
- void subre_di(UINT32 op);
- void addre_di(UINT32 op);
- void sube_di(UINT32 op);
- void andce_di(UINT32 op);
- void cmpe_di(UINT32 op);
- void xore_di(UINT32 op);
- void ore_di(UINT32 op);
- void ande_di(UINT32 op);
- void teste_di(UINT32 op);
+ void adde_si(uint32_t op);
+ void adde_ss(uint32_t op);
+ void mul2e_s(uint32_t op);
+ void subre_ss(uint32_t op);
+ void addre_ss(uint32_t op);
+ void sube_ss(uint32_t op);
+ void nege_s(uint32_t op);
+ void andce_ss(uint32_t op);
+ void cmpe_ss(uint32_t op);
+ void xore_ss(uint32_t op);
+ void rcre_s(uint32_t op);
+ void ore_ss(uint32_t op);
+ void rcle_s(uint32_t op);
+ void shre_s(uint32_t op);
+ void div2e_s(uint32_t op);
+ void ande_ss(uint32_t op);
+ void teste_ss(uint32_t op);
+ void adde_di(uint32_t op);
+ void subre_di(uint32_t op);
+ void addre_di(uint32_t op);
+ void sube_di(uint32_t op);
+ void andce_di(uint32_t op);
+ void cmpe_di(uint32_t op);
+ void xore_di(uint32_t op);
+ void ore_di(uint32_t op);
+ void ande_di(uint32_t op);
+ void teste_di(uint32_t op);
// CAU load/store implementation
- void load_hi(UINT32 op);
- void load_li(UINT32 op);
- void load_i(UINT32 op);
- void load_ei(UINT32 op);
- void store_hi(UINT32 op);
- void store_li(UINT32 op);
- void store_i(UINT32 op);
- void store_ei(UINT32 op);
- void load_hr(UINT32 op);
- void load_lr(UINT32 op);
- void load_r(UINT32 op);
- void load_er(UINT32 op);
- void store_hr(UINT32 op);
- void store_lr(UINT32 op);
- void store_r(UINT32 op);
- void store_er(UINT32 op);
- void load24(UINT32 op);
+ void load_hi(uint32_t op);
+ void load_li(uint32_t op);
+ void load_i(uint32_t op);
+ void load_ei(uint32_t op);
+ void store_hi(uint32_t op);
+ void store_li(uint32_t op);
+ void store_i(uint32_t op);
+ void store_ei(uint32_t op);
+ void load_hr(uint32_t op);
+ void load_lr(uint32_t op);
+ void load_r(uint32_t op);
+ void load_er(uint32_t op);
+ void store_hr(uint32_t op);
+ void store_lr(uint32_t op);
+ void store_r(uint32_t op);
+ void store_er(uint32_t op);
+ void load24(uint32_t op);
// DAU form 1 implementation
- void d1_aMpp(UINT32 op);
- void d1_aMpm(UINT32 op);
- void d1_aMmp(UINT32 op);
- void d1_aMmm(UINT32 op);
- void d1_0px(UINT32 op);
- void d1_0mx(UINT32 op);
- void d1_1pp(UINT32 op);
- void d1_1pm(UINT32 op);
- void d1_1mp(UINT32 op);
- void d1_1mm(UINT32 op);
- void d1_aMppr(UINT32 op);
- void d1_aMpmr(UINT32 op);
- void d1_aMmpr(UINT32 op);
- void d1_aMmmr(UINT32 op);
+ void d1_aMpp(uint32_t op);
+ void d1_aMpm(uint32_t op);
+ void d1_aMmp(uint32_t op);
+ void d1_aMmm(uint32_t op);
+ void d1_0px(uint32_t op);
+ void d1_0mx(uint32_t op);
+ void d1_1pp(uint32_t op);
+ void d1_1pm(uint32_t op);
+ void d1_1mp(uint32_t op);
+ void d1_1mm(uint32_t op);
+ void d1_aMppr(uint32_t op);
+ void d1_aMpmr(uint32_t op);
+ void d1_aMmpr(uint32_t op);
+ void d1_aMmmr(uint32_t op);
// DAU form 2 implementation
- void d2_aMpp(UINT32 op);
- void d2_aMpm(UINT32 op);
- void d2_aMmp(UINT32 op);
- void d2_aMmm(UINT32 op);
- void d2_aMppr(UINT32 op);
- void d2_aMpmr(UINT32 op);
- void d2_aMmpr(UINT32 op);
- void d2_aMmmr(UINT32 op);
+ void d2_aMpp(uint32_t op);
+ void d2_aMpm(uint32_t op);
+ void d2_aMmp(uint32_t op);
+ void d2_aMmm(uint32_t op);
+ void d2_aMppr(uint32_t op);
+ void d2_aMpmr(uint32_t op);
+ void d2_aMmpr(uint32_t op);
+ void d2_aMmmr(uint32_t op);
// DAU form 3 implementation
- void d3_aMpp(UINT32 op);
- void d3_aMpm(UINT32 op);
- void d3_aMmp(UINT32 op);
- void d3_aMmm(UINT32 op);
- void d3_aMppr(UINT32 op);
- void d3_aMpmr(UINT32 op);
- void d3_aMmpr(UINT32 op);
- void d3_aMmmr(UINT32 op);
+ void d3_aMpp(uint32_t op);
+ void d3_aMpm(uint32_t op);
+ void d3_aMmp(uint32_t op);
+ void d3_aMmm(uint32_t op);
+ void d3_aMppr(uint32_t op);
+ void d3_aMpmr(uint32_t op);
+ void d3_aMmpr(uint32_t op);
+ void d3_aMmmr(uint32_t op);
// DAU form 4 implementation
- void d4_pp(UINT32 op);
- void d4_pm(UINT32 op);
- void d4_mp(UINT32 op);
- void d4_mm(UINT32 op);
- void d4_ppr(UINT32 op);
- void d4_pmr(UINT32 op);
- void d4_mpr(UINT32 op);
- void d4_mmr(UINT32 op);
+ void d4_pp(uint32_t op);
+ void d4_pm(uint32_t op);
+ void d4_mp(uint32_t op);
+ void d4_mm(uint32_t op);
+ void d4_ppr(uint32_t op);
+ void d4_pmr(uint32_t op);
+ void d4_mpr(uint32_t op);
+ void d4_mmr(uint32_t op);
// DAU form 5 implementation
- void d5_ic(UINT32 op);
- void d5_oc(UINT32 op);
- void d5_float(UINT32 op);
- void d5_int(UINT32 op);
- void d5_round(UINT32 op);
- void d5_ifalt(UINT32 op);
- void d5_ifaeq(UINT32 op);
- void d5_ifagt(UINT32 op);
- void d5_float24(UINT32 op);
- void d5_int24(UINT32 op);
- void d5_ieee(UINT32 op);
- void d5_dsp(UINT32 op);
- void d5_seed(UINT32 op);
+ void d5_ic(uint32_t op);
+ void d5_oc(uint32_t op);
+ void d5_float(uint32_t op);
+ void d5_int(uint32_t op);
+ void d5_round(uint32_t op);
+ void d5_ifalt(uint32_t op);
+ void d5_ifaeq(uint32_t op);
+ void d5_ifagt(uint32_t op);
+ void d5_float24(uint32_t op);
+ void d5_int24(uint32_t op);
+ void d5_ieee(uint32_t op);
+ void d5_dsp(uint32_t op);
+ void d5_seed(uint32_t op);
// dma helpers
void dma_increment();
@@ -378,57 +378,57 @@ protected:
const address_space_config m_program_config;
// internal state
- UINT32 m_r[32];
- UINT32 m_pin, m_pout;
- UINT32 m_ivtp;
- UINT32 m_nzcflags;
- UINT32 m_vflags;
+ uint32_t m_r[32];
+ uint32_t m_pin, m_pout;
+ uint32_t m_ivtp;
+ uint32_t m_nzcflags;
+ uint32_t m_vflags;
double m_a[6];
double m_NZflags;
- UINT8 m_VUflags;
+ uint8_t m_VUflags;
double m_abuf[4];
- UINT8 m_abufreg[4];
- UINT8 m_abufVUflags[4];
- UINT8 m_abufNZflags[4];
+ uint8_t m_abufreg[4];
+ uint8_t m_abufVUflags[4];
+ uint8_t m_abufNZflags[4];
int m_abufcycle[4];
int m_abuf_index;
- INT32 m_mbufaddr[4];
- UINT32 m_mbufdata[4];
+ int32_t m_mbufaddr[4];
+ uint32_t m_mbufdata[4];
int m_mbuf_index;
- UINT16 m_par;
- UINT8 m_pare;
- UINT16 m_pdr;
- UINT16 m_pdr2;
- UINT16 m_pir;
- UINT16 m_pcr;
- UINT16 m_emr;
- UINT8 m_esr;
- UINT16 m_pcw;
- UINT8 m_piop;
+ uint16_t m_par;
+ uint8_t m_pare;
+ uint16_t m_pdr;
+ uint16_t m_pdr2;
+ uint16_t m_pir;
+ uint16_t m_pcr;
+ uint16_t m_emr;
+ uint8_t m_esr;
+ uint16_t m_pcw;
+ uint8_t m_piop;
- UINT32 m_ibuf;
- UINT32 m_isr;
- UINT32 m_obuf;
- UINT32 m_osr;
+ uint32_t m_ibuf;
+ uint32_t m_isr;
+ uint32_t m_obuf;
+ uint32_t m_osr;
- UINT32 m_iotemp;
+ uint32_t m_iotemp;
// internal stuff
int m_lastp;
int m_icount;
- UINT8 m_lastpins;
- UINT32 m_ppc;
+ uint8_t m_lastpins;
+ uint32_t m_ppc;
address_space * m_program;
direct_read_data *m_direct;
devcb_write32 m_output_pins_changed;
// tables
- static void (dsp32c_device::*const s_dsp32ops[])(UINT32 op);
- static const UINT32 s_regmap[4][16];
+ static void (dsp32c_device::*const s_dsp32ops[])(uint32_t op);
+ static const uint32_t s_regmap[4][16];
};
diff --git a/src/devices/cpu/dsp32/dsp32dis.cpp b/src/devices/cpu/dsp32/dsp32dis.cpp
index 18c06f01e9d..52dbfdeb79e 100644
--- a/src/devices/cpu/dsp32/dsp32dis.cpp
+++ b/src/devices/cpu/dsp32/dsp32dis.cpp
@@ -85,7 +85,7 @@ static const char *const regnamee[] =
static char tempbuf[10][40];
-static inline char *signed_16bit_unary(INT16 val)
+static inline char *signed_16bit_unary(int16_t val)
{
static char temp[10];
if (val < 0)
@@ -95,7 +95,7 @@ static inline char *signed_16bit_unary(INT16 val)
return temp;
}
-static inline char *signed_16bit_sep(INT16 val)
+static inline char *signed_16bit_sep(int16_t val)
{
static char temp[10];
if (val < 0)
@@ -105,7 +105,7 @@ static inline char *signed_16bit_sep(INT16 val)
return temp;
}
-static inline char *signed_16bit_sep_nospace(INT16 val)
+static inline char *signed_16bit_sep_nospace(int16_t val)
{
static char temp[10];
if (val < 0)
@@ -115,21 +115,21 @@ static inline char *signed_16bit_sep_nospace(INT16 val)
return temp;
}
-static inline char *unsigned_16bit_size(INT16 val, UINT8 size)
+static inline char *unsigned_16bit_size(int16_t val, uint8_t size)
{
static char temp[10];
if (size)
- sprintf(temp, "$%06x", (INT32)val & 0xffffff);
+ sprintf(temp, "$%06x", (int32_t)val & 0xffffff);
else
sprintf(temp, "$%04x", val & 0xffff);
return temp;
}
-static UINT8 lastp;
-static const char *dasm_XYZ(UINT8 bits, char *buffer)
+static uint8_t lastp;
+static const char *dasm_XYZ(uint8_t bits, char *buffer)
{
- UINT8 p = bits >> 3;
- UINT8 i = bits & 7;
+ uint8_t p = bits >> 3;
+ uint8_t i = bits & 7;
if (p)
{
@@ -165,10 +165,10 @@ static const char *dasm_XYZ(UINT8 bits, char *buffer)
}
-static const char *dasm_PI(UINT16 bits, char *buffer)
+static const char *dasm_PI(uint16_t bits, char *buffer)
{
- UINT8 p = bits >> 5;
- UINT8 i = bits & 0x1f;
+ uint8_t p = bits >> 5;
+ uint8_t i = bits & 0x1f;
if (p)
{
@@ -199,9 +199,9 @@ static const char *dasm_PI(UINT16 bits, char *buffer)
}
-static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
+static unsigned dasm_dsp32(char *buffer, unsigned pc, uint32_t op)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch (op >> 25)
{
@@ -214,7 +214,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]);
const char *Z = dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]);
const char *aM = aMvals[(op >> 26) & 7];
- UINT8 aN = (op >> 21) & 3;
+ uint8_t aN = (op >> 21) & 3;
if ((op & 0x7f) == 7)
{
if (aM[0] == '0')
@@ -245,7 +245,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]);
const char *Z = dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]);
const char *aM = aMvals[(op >> 26) & 7];
- UINT8 aN = (op >> 21) & 3;
+ uint8_t aN = (op >> 21) & 3;
if ((op & 0x7f) == 7)
{
@@ -273,7 +273,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]);
const char *Z = dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]);
const char *aM = aMvals[(op >> 26) & 7];
- UINT8 aN = (op >> 21) & 3;
+ uint8_t aN = (op >> 21) & 3;
if ((op & 0x7f) == 7)
{
@@ -298,7 +298,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]);
const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]);
const char *Z = dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]);
- UINT8 aN = (op >> 21) & 3;
+ uint8_t aN = (op >> 21) & 3;
if ((op & 0x7f) == 7)
sprintf(buffer, "a%d = %s%s %s %s", aN, unarysign[(op >> 24) & 1], Y, sign[(op >> 23) & 1], X);
@@ -326,8 +326,8 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
case 0x00: case 0x01: case 0x02: case 0x03:
{
const char *rH = regname[(op >> 16) & 0x1f];
- UINT8 C = (op >> 21) & 0x3f;
- INT16 N = (INT16)op;
+ uint8_t C = (op >> 21) & 0x3f;
+ int16_t N = (int16_t)op;
if (op == 0)
sprintf(buffer, "nop");
@@ -340,7 +340,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
else if (N && rH[0] != '0')
sprintf(buffer, "goto %s%s", rH, signed_16bit_sep_nospace(N));
else if (N)
- sprintf(buffer, "goto $%x", ((INT32)N & 0xffffff));
+ sprintf(buffer, "goto $%x", ((int32_t)N & 0xffffff));
else
{
if (((op >> 16) & 0x1f) == 20)
@@ -355,7 +355,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
else if (N && rH[0] != '0')
sprintf(buffer, "if (%s) goto %s%s", condtable[C], rH, signed_16bit_sep_nospace(N));
else if (N)
- sprintf(buffer, "if (%s) goto $%x", condtable[C], ((INT32)N & 0xffffff));
+ sprintf(buffer, "if (%s) goto $%x", condtable[C], ((int32_t)N & 0xffffff));
else
{
if (((op >> 16) & 0x1f) == 20)
@@ -371,7 +371,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
{
const char *rH = regname[(op >> 16) & 0x1f];
const char *rM = regname[(op >> 21) & 0x1f];
- INT16 N = (INT16)op;
+ int16_t N = (int16_t)op;
if (((op >> 16) & 0x1f) == 15)
{
@@ -383,8 +383,8 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
sprintf(buffer, "if (%s-- >= 0) goto %s%s", rM, rH, signed_16bit_sep_nospace(N));
else if (N)
{
- sprintf(buffer, "if (%s-- >= 0) goto $%x", rM, ((INT32)N & 0xffffff));
- if (((INT32)N & 0xffffff) < pc)
+ sprintf(buffer, "if (%s-- >= 0) goto $%x", rM, ((int32_t)N & 0xffffff));
+ if (((int32_t)N & 0xffffff) < pc)
flags = DASMFLAG_STEP_OVER;
}
else
@@ -409,14 +409,14 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
{
const char *rH = regname[(op >> 16) & 0x1f];
const char *rM = regname[(op >> 21) & 0x1f];
- INT16 N = (INT16)op;
+ int16_t N = (int16_t)op;
if (((op >> 16) & 0x1f) == 15)
sprintf(buffer, "call %s%s (%s) [%x]", rH, signed_16bit_sep_nospace(N), rM, (pc + 8 + N) & 0xffffff);
else if (N && rH[0] != '0')
sprintf(buffer, "call %s%s (%s)", rH, signed_16bit_sep_nospace(N), rM);
else if (N)
- sprintf(buffer, "call $%x (%s)", ((INT32)N & 0xffffff), rM);
+ sprintf(buffer, "call $%x (%s)", ((int32_t)N & 0xffffff), rM);
else
sprintf(buffer, "call %s (%s)", rH, rM);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -430,13 +430,13 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
const char *rD = regname[(op >> 21) & 0x1f];
const char *rH = regname[(op >> 16) & 0x1f];
const char *s = sizesuffix[(op >> 31) & 1];
- INT16 N = (INT16)op;
+ int16_t N = (int16_t)op;
if (N == 0)
sprintf(buffer, "%s%s = %s%s", rD, s, rH, s);
else if (rH[0] == '0')
sprintf(buffer, "%s%s = %s", rD, s, signed_16bit_unary(N));
else
- sprintf(buffer, "%s%s = %s%s%s", rD, s, rH, s, signed_16bit_sep((INT16)op));
+ sprintf(buffer, "%s%s = %s%s%s", rD, s, rH, s, signed_16bit_sep((int16_t)op));
break;
}
@@ -447,7 +447,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
const char *rS1 = regname[(op >> 5) & 0x1f];
const char *rS2 = regname[(op >> 0) & 0x1f];
const char *s = sizesuffix[(op >> 31) & 1];
- UINT8 threeop = (op >> 11) & 1;
+ uint8_t threeop = (op >> 11) & 1;
char condbuf[40] = { 0 };
if ((op >> 10) & 1)
@@ -572,7 +572,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
{
const char *rD = regname[(op >> 16) & 0x1f];
const char *s = sizesuffix[(op >> 31) & 1];
- INT16 N = (INT16)op;
+ int16_t N = (int16_t)op;
switch ((op >> 21) & 15)
{
@@ -628,9 +628,9 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
/* CA format 7a */
case 0x0e:
if ((op >> 24) & 1)
- sprintf(buffer, "*%08X = %s%s", (INT16)op, regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3]);
+ sprintf(buffer, "*%08X = %s%s", (int16_t)op, regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3]);
else
- sprintf(buffer, "%s%s = *%08X", regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3], (INT16)op);
+ sprintf(buffer, "%s%s = *%08X", regname[(op >> 16) & 0x1f], memsuffix[(op >> 22) & 3], (int16_t)op);
break;
/* CA format 7b */
@@ -647,7 +647,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
case 0x58: case 0x59: case 0x5a: case 0x5b:
case 0x5c: case 0x5d: case 0x5e: case 0x5f:
{
- INT32 N = (op & 0xffff) | ((INT32)((op & 0x1fe00000) << 3) >> 8);
+ int32_t N = (op & 0xffff) | ((int32_t)((op & 0x1fe00000) << 3) >> 8);
const char *rH = regname[(op >> 16) & 0x1f];
if (((op >> 16) & 0x1f) == 15)
@@ -655,7 +655,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
else if (N && rH[0] != '0')
sprintf(buffer, "goto %s%s", rH, signed_16bit_sep_nospace(N));
else if (N)
- sprintf(buffer, "goto $%x", ((INT32)N & 0xffffff));
+ sprintf(buffer, "goto $%x", ((int32_t)N & 0xffffff));
else
{
if (((op >> 16) & 0x1f) == 20)
@@ -671,7 +671,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
case 0x68: case 0x69: case 0x6a: case 0x6b:
case 0x6c: case 0x6d: case 0x6e: case 0x6f:
{
- INT32 immed = (op & 0xffff) | ((INT32)((op & 0x1fe00000) << 3) >> 8);
+ int32_t immed = (op & 0xffff) | ((int32_t)((op & 0x1fe00000) << 3) >> 8);
sprintf(buffer, "%s = $%x", regnamee[(op >> 16) & 0x1f], immed & 0xffffff);
break;
}
@@ -682,7 +682,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
case 0x78: case 0x79: case 0x7a: case 0x7b:
case 0x7c: case 0x7d: case 0x7e: case 0x7f:
{
- INT32 N = (op & 0xffff) | ((INT32)((op & 0x1fe00000) << 3) >> 8);
+ int32_t N = (op & 0xffff) | ((int32_t)((op & 0x1fe00000) << 3) >> 8);
const char *rM = regname[(op >> 16) & 0x1f];
sprintf(buffer, "call $%x (%s)", N & 0xffffff, rM);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
diff --git a/src/devices/cpu/dsp32/dsp32ops.hxx b/src/devices/cpu/dsp32/dsp32ops.hxx
index 696e4f14885..f8970c55405 100644
--- a/src/devices/cpu/dsp32/dsp32ops.hxx
+++ b/src/devices/cpu/dsp32/dsp32ops.hxx
@@ -41,8 +41,8 @@
#define SET_NZ00_24(r) m_nzcflags = ((r) & 0xffffff); m_vflags = 0
#define TRUNCATE24(a) ((a) & 0xffffff)
-#define EXTEND16_TO_24(a) TRUNCATE24((INT32)(INT16)(a))
-#define REG16(a) ((UINT16)m_r[a])
+#define EXTEND16_TO_24(a) TRUNCATE24((int32_t)(int16_t)(a))
+#define REG16(a) ((uint16_t)m_r[a])
#define REG24(a) (m_r[a])
#define WRITEABLE_REGS (0x6f3efffe)
@@ -100,7 +100,7 @@
union int_double
{
double d;
- UINT32 i[2];
+ uint32_t i[2];
};
@@ -109,12 +109,12 @@ union int_double
// IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::illegal(UINT32 op)
+void dsp32c_device::illegal(uint32_t op)
{
}
-void dsp32c_device::unimplemented(UINT32 op)
+void dsp32c_device::unimplemented(uint32_t op)
{
fatalerror("Unimplemented op @ %06X: %08X (dis=%02X, tbl=%03X)\n", PC - 4, op, op >> 25, op >> 21);
}
@@ -122,7 +122,7 @@ void dsp32c_device::unimplemented(UINT32 op)
inline void dsp32c_device::execute_one()
{
- UINT32 op;
+ uint32_t op;
PROCESS_DEFERRED_MEMORY();
m_ppc = PC;
@@ -140,7 +140,7 @@ inline void dsp32c_device::execute_one()
// CAU HELPERS
//**************************************************************************
-UINT32 dsp32c_device::cau_read_pi_special(UINT8 i)
+uint32_t dsp32c_device::cau_read_pi_special(uint8_t i)
{
switch (i)
{
@@ -157,7 +157,7 @@ UINT32 dsp32c_device::cau_read_pi_special(UINT8 i)
}
-void dsp32c_device::cau_write_pi_special(UINT8 i, UINT32 val)
+void dsp32c_device::cau_write_pi_special(uint8_t i, uint32_t val)
{
switch (i)
{
@@ -173,13 +173,13 @@ void dsp32c_device::cau_write_pi_special(UINT8 i, UINT32 val)
}
-inline UINT8 dsp32c_device::cau_read_pi_1byte(int pi)
+inline uint8_t dsp32c_device::cau_read_pi_1byte(int pi)
{
int p = (pi >> 5) & 0x1f;
int i = (pi >> 0) & 0x1f;
if (p)
{
- UINT32 result = RBYTE(m_r[p]);
+ uint32_t result = RBYTE(m_r[p]);
m_r[p] = TRUNCATE24(m_r[p] + m_r[i]);
return result;
}
@@ -188,13 +188,13 @@ inline UINT8 dsp32c_device::cau_read_pi_1byte(int pi)
}
-inline UINT16 dsp32c_device::cau_read_pi_2byte(int pi)
+inline uint16_t dsp32c_device::cau_read_pi_2byte(int pi)
{
int p = (pi >> 5) & 0x1f;
int i = (pi >> 0) & 0x1f;
if (p)
{
- UINT32 result = RWORD(m_r[p]);
+ uint32_t result = RWORD(m_r[p]);
if (i < 22 || i > 23)
m_r[p] = TRUNCATE24(m_r[p] + m_r[i]);
else
@@ -206,13 +206,13 @@ inline UINT16 dsp32c_device::cau_read_pi_2byte(int pi)
}
-inline UINT32 dsp32c_device::cau_read_pi_4byte(int pi)
+inline uint32_t dsp32c_device::cau_read_pi_4byte(int pi)
{
int p = (pi >> 5) & 0x1f;
int i = (pi >> 0) & 0x1f;
if (p)
{
- UINT32 result = RLONG(m_r[p]);
+ uint32_t result = RLONG(m_r[p]);
if (i < 22 || i > 23)
m_r[p] = TRUNCATE24(m_r[p] + m_r[i]);
else
@@ -224,7 +224,7 @@ inline UINT32 dsp32c_device::cau_read_pi_4byte(int pi)
}
-inline void dsp32c_device::cau_write_pi_1byte(int pi, UINT8 val)
+inline void dsp32c_device::cau_write_pi_1byte(int pi, uint8_t val)
{
int p = (pi >> 5) & 0x1f;
int i = (pi >> 0) & 0x1f;
@@ -238,7 +238,7 @@ inline void dsp32c_device::cau_write_pi_1byte(int pi, UINT8 val)
}
-inline void dsp32c_device::cau_write_pi_2byte(int pi, UINT16 val)
+inline void dsp32c_device::cau_write_pi_2byte(int pi, uint16_t val)
{
int p = (pi >> 5) & 0x1f;
int i = (pi >> 0) & 0x1f;
@@ -255,13 +255,13 @@ inline void dsp32c_device::cau_write_pi_2byte(int pi, UINT16 val)
}
-inline void dsp32c_device::cau_write_pi_4byte(int pi, UINT32 val)
+inline void dsp32c_device::cau_write_pi_4byte(int pi, uint32_t val)
{
int p = (pi >> 5) & 0x1f;
int i = (pi >> 0) & 0x1f;
if (p)
{
- WLONG(m_r[p], (INT32)(val << 8) >> 8);
+ WLONG(m_r[p], (int32_t)(val << 8) >> 8);
if (i < 22 || i > 23)
m_r[p] = TRUNCATE24(m_r[p] + m_r[i]);
else
@@ -304,11 +304,11 @@ inline double dsp32c_device::dau_get_anzflags()
}
-inline UINT8 dsp32c_device::dau_get_avuflags()
+inline uint8_t dsp32c_device::dau_get_avuflags()
{
#if (!IGNORE_DAU_UV_FLAGS)
int bufidx = (m_abuf_index - 1) & 3;
- UINT8 vuflags = m_VUflags;
+ uint8_t vuflags = m_VUflags;
while (m_icount >= m_abufcycle[bufidx] - 3 * 4)
{
vuflags = m_abufVUflags[bufidx];
@@ -370,13 +370,13 @@ inline void dsp32c_device::dau_set_val_flags(int aidx, double res)
}
-inline double dsp32c_device::dsp_to_double(UINT32 val)
+inline double dsp32c_device::dsp_to_double(uint32_t val)
{
int_double id;
if (val == 0)
return 0;
- else if ((INT32)val > 0)
+ else if ((int32_t)val > 0)
{
int exponent = ((val & 0xff) - 128 + 1023) << 20;
id.i[BYTE_XOR_BE(0)] = exponent + (val >> 11);
@@ -393,7 +393,7 @@ inline double dsp32c_device::dsp_to_double(UINT32 val)
}
-inline UINT32 dsp32c_device::double_to_dsp(double val)
+inline uint32_t dsp32c_device::double_to_dsp(double val)
{
int mantissa, exponent;
int_double id;
@@ -406,9 +406,9 @@ inline UINT32 dsp32c_device::double_to_dsp(double val)
{
// machine().debug_break();
// fprintf(stderr, "Exponent = %d\n", exponent);
- return ((INT32)id.i[BYTE_XOR_BE(0)] >= 0) ? 0x7fffffff : 0x800000ff;
+ return ((int32_t)id.i[BYTE_XOR_BE(0)] >= 0) ? 0x7fffffff : 0x800000ff;
}
- else if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
+ else if ((int32_t)id.i[BYTE_XOR_BE(0)] >= 0)
return exponent | mantissa;
else
{
@@ -440,7 +440,7 @@ inline double dsp32c_device::dau_read_pi_double_1st(int pi, int multiplier)
m_lastp = p;
if (p)
{
- UINT32 result = RLONG(m_r[p]);
+ uint32_t result = RLONG(m_r[p]);
if (i < 6)
m_r[p] = TRUNCATE24(m_r[p] + m_r[i+16]);
else
@@ -463,7 +463,7 @@ inline double dsp32c_device::dau_read_pi_double_2nd(int pi, int multiplier, doub
m_lastp = p;
if (p)
{
- UINT32 result;
+ uint32_t result;
result = RLONG(m_r[p]);
if (i < 6)
m_r[p] = TRUNCATE24(m_r[p] + m_r[i+16]);
@@ -478,7 +478,7 @@ inline double dsp32c_device::dau_read_pi_double_2nd(int pi, int multiplier, doub
}
-inline UINT32 dsp32c_device::dau_read_pi_4bytes(int pi)
+inline uint32_t dsp32c_device::dau_read_pi_4bytes(int pi)
{
int p = (pi >> 3) & 15;
int i = (pi >> 0) & 7;
@@ -486,7 +486,7 @@ inline UINT32 dsp32c_device::dau_read_pi_4bytes(int pi)
m_lastp = p;
if (p)
{
- UINT32 result = RLONG(m_r[p]);
+ uint32_t result = RLONG(m_r[p]);
if (i < 6)
m_r[p] = TRUNCATE24(m_r[p] + m_r[i+16]);
else
@@ -500,7 +500,7 @@ inline UINT32 dsp32c_device::dau_read_pi_4bytes(int pi)
}
-inline UINT16 dsp32c_device::dau_read_pi_2bytes(int pi)
+inline uint16_t dsp32c_device::dau_read_pi_2bytes(int pi)
{
int p = (pi >> 3) & 15;
int i = (pi >> 0) & 7;
@@ -508,7 +508,7 @@ inline UINT16 dsp32c_device::dau_read_pi_2bytes(int pi)
m_lastp = p;
if (p)
{
- UINT32 result = RWORD(m_r[p]);
+ uint32_t result = RWORD(m_r[p]);
if (i < 6)
m_r[p] = TRUNCATE24(m_r[p] + m_r[i+16]);
else
@@ -543,7 +543,7 @@ inline void dsp32c_device::dau_write_pi_double(int pi, double val)
}
-inline void dsp32c_device::dau_write_pi_4bytes(int pi, UINT32 val)
+inline void dsp32c_device::dau_write_pi_4bytes(int pi, uint32_t val)
{
int p = (pi >> 3) & 15;
int i = (pi >> 0) & 7;
@@ -565,7 +565,7 @@ inline void dsp32c_device::dau_write_pi_4bytes(int pi, UINT32 val)
}
-inline void dsp32c_device::dau_write_pi_2bytes(int pi, UINT16 val)
+inline void dsp32c_device::dau_write_pi_2bytes(int pi, uint16_t val)
{
int p = (pi >> 3) & 15;
int i = (pi >> 0) & 7;
@@ -679,405 +679,405 @@ int dsp32c_device::condition(int cond)
// CAU BRANCH INSTRUCTION IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::nop(UINT32 op)
+void dsp32c_device::nop(uint32_t op)
{
if (op == 0)
return;
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
-void dsp32c_device::goto_t(UINT32 op)
+void dsp32c_device::goto_t(uint32_t op)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
-void dsp32c_device::goto_pl(UINT32 op)
+void dsp32c_device::goto_pl(uint32_t op)
{
if (!nFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_mi(UINT32 op)
+void dsp32c_device::goto_mi(uint32_t op)
{
if (nFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_ne(UINT32 op)
+void dsp32c_device::goto_ne(uint32_t op)
{
if (!zFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_eq(UINT32 op)
+void dsp32c_device::goto_eq(uint32_t op)
{
if (zFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_vc(UINT32 op)
+void dsp32c_device::goto_vc(uint32_t op)
{
if (!vFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_vs(UINT32 op)
+void dsp32c_device::goto_vs(uint32_t op)
{
if (vFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_cc(UINT32 op)
+void dsp32c_device::goto_cc(uint32_t op)
{
if (!cFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_cs(UINT32 op)
+void dsp32c_device::goto_cs(uint32_t op)
{
if (cFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_ge(UINT32 op)
+void dsp32c_device::goto_ge(uint32_t op)
{
if (!(nFLAG ^ vFLAG))
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_lt(UINT32 op)
+void dsp32c_device::goto_lt(uint32_t op)
{
if (nFLAG ^ vFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_gt(UINT32 op)
+void dsp32c_device::goto_gt(uint32_t op)
{
if (!(zFLAG | (nFLAG ^ vFLAG)))
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_le(UINT32 op)
+void dsp32c_device::goto_le(uint32_t op)
{
if (zFLAG | (nFLAG ^ vFLAG))
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_hi(UINT32 op)
+void dsp32c_device::goto_hi(uint32_t op)
{
if (!cFLAG && !zFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_ls(UINT32 op)
+void dsp32c_device::goto_ls(uint32_t op)
{
if (cFLAG || zFLAG)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_auc(UINT32 op)
+void dsp32c_device::goto_auc(uint32_t op)
{
if (!(DEFERRED_VUFLAGS() & UFLAGBIT))
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_aus(UINT32 op)
+void dsp32c_device::goto_aus(uint32_t op)
{
if (DEFERRED_VUFLAGS() & UFLAGBIT)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_age(UINT32 op)
+void dsp32c_device::goto_age(uint32_t op)
{
if (DEFERRED_NZFLAGS() >= 0)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_alt(UINT32 op)
+void dsp32c_device::goto_alt(uint32_t op)
{
if (DEFERRED_NZFLAGS() < 0)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_ane(UINT32 op)
+void dsp32c_device::goto_ane(uint32_t op)
{
if (DEFERRED_NZFLAGS() != 0)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_aeq(UINT32 op)
+void dsp32c_device::goto_aeq(uint32_t op)
{
if (DEFERRED_NZFLAGS() == 0)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_avc(UINT32 op)
+void dsp32c_device::goto_avc(uint32_t op)
{
if (!(DEFERRED_VUFLAGS() & VFLAGBIT))
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_avs(UINT32 op)
+void dsp32c_device::goto_avs(uint32_t op)
{
if (DEFERRED_VUFLAGS() & VFLAGBIT)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_agt(UINT32 op)
+void dsp32c_device::goto_agt(uint32_t op)
{
if (DEFERRED_NZFLAGS() > 0)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_ale(UINT32 op)
+void dsp32c_device::goto_ale(uint32_t op)
{
if (DEFERRED_NZFLAGS() <= 0)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_ibe(UINT32 op)
+void dsp32c_device::goto_ibe(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_ibf(UINT32 op)
+void dsp32c_device::goto_ibf(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_obf(UINT32 op)
+void dsp32c_device::goto_obf(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_obe(UINT32 op)
+void dsp32c_device::goto_obe(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_pde(UINT32 op)
+void dsp32c_device::goto_pde(uint32_t op)
{
if (!(m_pcr & PCR_PDFs))
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_pdf(UINT32 op)
+void dsp32c_device::goto_pdf(uint32_t op)
{
if (m_pcr & PCR_PDFs)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_pie(UINT32 op)
+void dsp32c_device::goto_pie(uint32_t op)
{
if (!(m_pcr & PCR_PIFs))
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_pif(UINT32 op)
+void dsp32c_device::goto_pif(uint32_t op)
{
if (m_pcr & PCR_PIFs)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::goto_syc(UINT32 op)
+void dsp32c_device::goto_syc(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_sys(UINT32 op)
+void dsp32c_device::goto_sys(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_fbc(UINT32 op)
+void dsp32c_device::goto_fbc(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_fbs(UINT32 op)
+void dsp32c_device::goto_fbs(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_irq1lo(UINT32 op)
+void dsp32c_device::goto_irq1lo(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_irq1hi(UINT32 op)
+void dsp32c_device::goto_irq1hi(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_irq2lo(UINT32 op)
+void dsp32c_device::goto_irq2lo(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::goto_irq2hi(UINT32 op)
+void dsp32c_device::goto_irq2hi(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::dec_goto(UINT32 op)
+void dsp32c_device::dec_goto(uint32_t op)
{
int hr = (op >> 21) & 0x1f;
- int old = (INT16)m_r[hr];
+ int old = (int16_t)m_r[hr];
m_r[hr] = EXTEND16_TO_24(m_r[hr] - 1);
if (old >= 0)
{
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
}
-void dsp32c_device::call(UINT32 op)
+void dsp32c_device::call(uint32_t op)
{
int mr = (op >> 21) & 0x1f;
if (IS_WRITEABLE(mr))
m_r[mr] = PC + 4;
execute_one();
- PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (INT16)op);
+ PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (int16_t)op);
}
-void dsp32c_device::goto24(UINT32 op)
+void dsp32c_device::goto24(uint32_t op)
{
execute_one();
PC = TRUNCATE24(REG24((op >> 16) & 0x1f) + (op & 0xffff) + ((op >> 5) & 0xff0000));
}
-void dsp32c_device::call24(UINT32 op)
+void dsp32c_device::call24(uint32_t op)
{
int mr = (op >> 16) & 0x1f;
if (IS_WRITEABLE(mr))
@@ -1087,13 +1087,13 @@ void dsp32c_device::call24(UINT32 op)
}
-void dsp32c_device::do_i(UINT32 op)
+void dsp32c_device::do_i(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::do_r(UINT32 op)
+void dsp32c_device::do_r(uint32_t op)
{
unimplemented(op);
}
@@ -1104,18 +1104,18 @@ void dsp32c_device::do_r(UINT32 op)
// CAU 16-BIT ARITHMETIC IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::add_si(UINT32 op)
+void dsp32c_device::add_si(uint32_t op)
{
int dr = (op >> 21) & 0x1f;
int hrval = REG16((op >> 16) & 0x1f);
- int res = hrval + (UINT16)op;
+ int res = hrval + (uint16_t)op;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
SET_NZCV_16(hrval, op, res);
}
-void dsp32c_device::add_ss(UINT32 op)
+void dsp32c_device::add_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1130,7 +1130,7 @@ void dsp32c_device::add_ss(UINT32 op)
}
-void dsp32c_device::mul2_s(UINT32 op)
+void dsp32c_device::mul2_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1144,7 +1144,7 @@ void dsp32c_device::mul2_s(UINT32 op)
}
-void dsp32c_device::subr_ss(UINT32 op)
+void dsp32c_device::subr_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1159,13 +1159,13 @@ void dsp32c_device::subr_ss(UINT32 op)
}
-void dsp32c_device::addr_ss(UINT32 op)
+void dsp32c_device::addr_ss(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::sub_ss(UINT32 op)
+void dsp32c_device::sub_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1180,7 +1180,7 @@ void dsp32c_device::sub_ss(UINT32 op)
}
-void dsp32c_device::neg_s(UINT32 op)
+void dsp32c_device::neg_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1194,7 +1194,7 @@ void dsp32c_device::neg_s(UINT32 op)
}
-void dsp32c_device::andc_ss(UINT32 op)
+void dsp32c_device::andc_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1209,7 +1209,7 @@ void dsp32c_device::andc_ss(UINT32 op)
}
-void dsp32c_device::cmp_ss(UINT32 op)
+void dsp32c_device::cmp_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1221,7 +1221,7 @@ void dsp32c_device::cmp_ss(UINT32 op)
}
-void dsp32c_device::xor_ss(UINT32 op)
+void dsp32c_device::xor_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1236,7 +1236,7 @@ void dsp32c_device::xor_ss(UINT32 op)
}
-void dsp32c_device::rcr_s(UINT32 op)
+void dsp32c_device::rcr_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1251,7 +1251,7 @@ void dsp32c_device::rcr_s(UINT32 op)
}
-void dsp32c_device::or_ss(UINT32 op)
+void dsp32c_device::or_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1266,7 +1266,7 @@ void dsp32c_device::or_ss(UINT32 op)
}
-void dsp32c_device::rcl_s(UINT32 op)
+void dsp32c_device::rcl_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1281,7 +1281,7 @@ void dsp32c_device::rcl_s(UINT32 op)
}
-void dsp32c_device::shr_s(UINT32 op)
+void dsp32c_device::shr_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1296,7 +1296,7 @@ void dsp32c_device::shr_s(UINT32 op)
}
-void dsp32c_device::div2_s(UINT32 op)
+void dsp32c_device::div2_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1311,7 +1311,7 @@ void dsp32c_device::div2_s(UINT32 op)
}
-void dsp32c_device::and_ss(UINT32 op)
+void dsp32c_device::and_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1326,7 +1326,7 @@ void dsp32c_device::and_ss(UINT32 op)
}
-void dsp32c_device::test_ss(UINT32 op)
+void dsp32c_device::test_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1338,101 +1338,101 @@ void dsp32c_device::test_ss(UINT32 op)
}
-void dsp32c_device::add_di(UINT32 op)
+void dsp32c_device::add_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG16(dr);
- int res = drval + (UINT16)op;
+ int res = drval + (uint16_t)op;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
SET_NZCV_16(drval, op, res);
}
-void dsp32c_device::subr_di(UINT32 op)
+void dsp32c_device::subr_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG16(dr);
- int res = (UINT16)op - drval;
+ int res = (uint16_t)op - drval;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
SET_NZCV_16(drval, op, res);
}
-void dsp32c_device::addr_di(UINT32 op)
+void dsp32c_device::addr_di(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::sub_di(UINT32 op)
+void dsp32c_device::sub_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG16(dr);
- int res = drval - (UINT16)op;
+ int res = drval - (uint16_t)op;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
SET_NZCV_16(drval, op, res);
}
-void dsp32c_device::andc_di(UINT32 op)
+void dsp32c_device::andc_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG16(dr);
- int res = drval & ~(UINT16)op;
+ int res = drval & ~(uint16_t)op;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
SET_NZ00_16(res);
}
-void dsp32c_device::cmp_di(UINT32 op)
+void dsp32c_device::cmp_di(uint32_t op)
{
int drval = REG16((op >> 16) & 0x1f);
- int res = drval - (UINT16)op;
+ int res = drval - (uint16_t)op;
SET_NZCV_16(drval, op, res);
}
-void dsp32c_device::xor_di(UINT32 op)
+void dsp32c_device::xor_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG16(dr);
- int res = drval ^ (UINT16)op;
+ int res = drval ^ (uint16_t)op;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
SET_NZ00_16(res);
}
-void dsp32c_device::or_di(UINT32 op)
+void dsp32c_device::or_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG16(dr);
- int res = drval | (UINT16)op;
+ int res = drval | (uint16_t)op;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
SET_NZ00_16(res);
}
-void dsp32c_device::and_di(UINT32 op)
+void dsp32c_device::and_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG16(dr);
- int res = drval & (UINT16)op;
+ int res = drval & (uint16_t)op;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
SET_NZ00_16(res);
}
-void dsp32c_device::test_di(UINT32 op)
+void dsp32c_device::test_di(uint32_t op)
{
int drval = REG16((op >> 16) & 0x1f);
- int res = drval & (UINT16)op;
+ int res = drval & (uint16_t)op;
SET_NZ00_16(res);
}
@@ -1442,7 +1442,7 @@ void dsp32c_device::test_di(UINT32 op)
// CAU 24-BIT ARITHMETIC IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::adde_si(UINT32 op)
+void dsp32c_device::adde_si(uint32_t op)
{
int dr = (op >> 21) & 0x1f;
int hrval = REG24((op >> 16) & 0x1f);
@@ -1453,7 +1453,7 @@ void dsp32c_device::adde_si(UINT32 op)
}
-void dsp32c_device::adde_ss(UINT32 op)
+void dsp32c_device::adde_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1468,7 +1468,7 @@ void dsp32c_device::adde_ss(UINT32 op)
}
-void dsp32c_device::mul2e_s(UINT32 op)
+void dsp32c_device::mul2e_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1482,7 +1482,7 @@ void dsp32c_device::mul2e_s(UINT32 op)
}
-void dsp32c_device::subre_ss(UINT32 op)
+void dsp32c_device::subre_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1497,13 +1497,13 @@ void dsp32c_device::subre_ss(UINT32 op)
}
-void dsp32c_device::addre_ss(UINT32 op)
+void dsp32c_device::addre_ss(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::sube_ss(UINT32 op)
+void dsp32c_device::sube_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1518,7 +1518,7 @@ void dsp32c_device::sube_ss(UINT32 op)
}
-void dsp32c_device::nege_s(UINT32 op)
+void dsp32c_device::nege_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1532,7 +1532,7 @@ void dsp32c_device::nege_s(UINT32 op)
}
-void dsp32c_device::andce_ss(UINT32 op)
+void dsp32c_device::andce_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1547,7 +1547,7 @@ void dsp32c_device::andce_ss(UINT32 op)
}
-void dsp32c_device::cmpe_ss(UINT32 op)
+void dsp32c_device::cmpe_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1559,7 +1559,7 @@ void dsp32c_device::cmpe_ss(UINT32 op)
}
-void dsp32c_device::xore_ss(UINT32 op)
+void dsp32c_device::xore_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1574,7 +1574,7 @@ void dsp32c_device::xore_ss(UINT32 op)
}
-void dsp32c_device::rcre_s(UINT32 op)
+void dsp32c_device::rcre_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1589,7 +1589,7 @@ void dsp32c_device::rcre_s(UINT32 op)
}
-void dsp32c_device::ore_ss(UINT32 op)
+void dsp32c_device::ore_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1604,7 +1604,7 @@ void dsp32c_device::ore_ss(UINT32 op)
}
-void dsp32c_device::rcle_s(UINT32 op)
+void dsp32c_device::rcle_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1619,7 +1619,7 @@ void dsp32c_device::rcle_s(UINT32 op)
}
-void dsp32c_device::shre_s(UINT32 op)
+void dsp32c_device::shre_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1634,7 +1634,7 @@ void dsp32c_device::shre_s(UINT32 op)
}
-void dsp32c_device::div2e_s(UINT32 op)
+void dsp32c_device::div2e_s(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1649,7 +1649,7 @@ void dsp32c_device::div2e_s(UINT32 op)
}
-void dsp32c_device::ande_ss(UINT32 op)
+void dsp32c_device::ande_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1664,7 +1664,7 @@ void dsp32c_device::ande_ss(UINT32 op)
}
-void dsp32c_device::teste_ss(UINT32 op)
+void dsp32c_device::teste_ss(uint32_t op)
{
if (CONDITION_IS_TRUE())
{
@@ -1676,7 +1676,7 @@ void dsp32c_device::teste_ss(UINT32 op)
}
-void dsp32c_device::adde_di(UINT32 op)
+void dsp32c_device::adde_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG24(dr);
@@ -1687,7 +1687,7 @@ void dsp32c_device::adde_di(UINT32 op)
}
-void dsp32c_device::subre_di(UINT32 op)
+void dsp32c_device::subre_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG24(dr);
@@ -1698,13 +1698,13 @@ void dsp32c_device::subre_di(UINT32 op)
}
-void dsp32c_device::addre_di(UINT32 op)
+void dsp32c_device::addre_di(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::sube_di(UINT32 op)
+void dsp32c_device::sube_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG24(dr);
@@ -1715,7 +1715,7 @@ void dsp32c_device::sube_di(UINT32 op)
}
-void dsp32c_device::andce_di(UINT32 op)
+void dsp32c_device::andce_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG24(dr);
@@ -1726,7 +1726,7 @@ void dsp32c_device::andce_di(UINT32 op)
}
-void dsp32c_device::cmpe_di(UINT32 op)
+void dsp32c_device::cmpe_di(uint32_t op)
{
int drval = REG24((op >> 16) & 0x1f);
int res = drval - EXTEND16_TO_24(op);
@@ -1734,7 +1734,7 @@ void dsp32c_device::cmpe_di(UINT32 op)
}
-void dsp32c_device::xore_di(UINT32 op)
+void dsp32c_device::xore_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG24(dr);
@@ -1745,7 +1745,7 @@ void dsp32c_device::xore_di(UINT32 op)
}
-void dsp32c_device::ore_di(UINT32 op)
+void dsp32c_device::ore_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG24(dr);
@@ -1756,7 +1756,7 @@ void dsp32c_device::ore_di(UINT32 op)
}
-void dsp32c_device::ande_di(UINT32 op)
+void dsp32c_device::ande_di(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
int drval = REG24(dr);
@@ -1767,7 +1767,7 @@ void dsp32c_device::ande_di(UINT32 op)
}
-void dsp32c_device::teste_di(UINT32 op)
+void dsp32c_device::teste_di(uint32_t op)
{
int drval = REG24((op >> 16) & 0x1f);
int res = drval & EXTEND16_TO_24(op);
@@ -1780,10 +1780,10 @@ void dsp32c_device::teste_di(UINT32 op)
// CAU LOAD/STORE IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::load_hi(UINT32 op)
+void dsp32c_device::load_hi(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
- UINT32 res = RBYTE(EXTEND16_TO_24(op));
+ uint32_t res = RBYTE(EXTEND16_TO_24(op));
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
m_nzcflags = res << 8;
@@ -1791,10 +1791,10 @@ void dsp32c_device::load_hi(UINT32 op)
}
-void dsp32c_device::load_li(UINT32 op)
+void dsp32c_device::load_li(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
- UINT32 res = RBYTE(EXTEND16_TO_24(op));
+ uint32_t res = RBYTE(EXTEND16_TO_24(op));
if (IS_WRITEABLE(dr))
m_r[dr] = res;
m_nzcflags = res << 8;
@@ -1802,9 +1802,9 @@ void dsp32c_device::load_li(UINT32 op)
}
-void dsp32c_device::load_i(UINT32 op)
+void dsp32c_device::load_i(uint32_t op)
{
- UINT32 res = RWORD(EXTEND16_TO_24(op));
+ uint32_t res = RWORD(EXTEND16_TO_24(op));
int dr = (op >> 16) & 0x1f;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
@@ -1813,9 +1813,9 @@ void dsp32c_device::load_i(UINT32 op)
}
-void dsp32c_device::load_ei(UINT32 op)
+void dsp32c_device::load_ei(uint32_t op)
{
- UINT32 res = TRUNCATE24(RLONG(EXTEND16_TO_24(op)));
+ uint32_t res = TRUNCATE24(RLONG(EXTEND16_TO_24(op)));
int dr = (op >> 16) & 0x1f;
if (IS_WRITEABLE(dr))
m_r[dr] = res;
@@ -1824,36 +1824,36 @@ void dsp32c_device::load_ei(UINT32 op)
}
-void dsp32c_device::store_hi(UINT32 op)
+void dsp32c_device::store_hi(uint32_t op)
{
WBYTE(EXTEND16_TO_24(op), m_r[(op >> 16) & 0x1f] >> 8);
}
-void dsp32c_device::store_li(UINT32 op)
+void dsp32c_device::store_li(uint32_t op)
{
WBYTE(EXTEND16_TO_24(op), m_r[(op >> 16) & 0x1f]);
}
-void dsp32c_device::store_i(UINT32 op)
+void dsp32c_device::store_i(uint32_t op)
{
WWORD(EXTEND16_TO_24(op), REG16((op >> 16) & 0x1f));
}
-void dsp32c_device::store_ei(UINT32 op)
+void dsp32c_device::store_ei(uint32_t op)
{
- WLONG(EXTEND16_TO_24(op), (INT32)(REG24((op >> 16) & 0x1f) << 8) >> 8);
+ WLONG(EXTEND16_TO_24(op), (int32_t)(REG24((op >> 16) & 0x1f) << 8) >> 8);
}
-void dsp32c_device::load_hr(UINT32 op)
+void dsp32c_device::load_hr(uint32_t op)
{
if (!(op & 0x400))
{
int dr = (op >> 16) & 0x1f;
- UINT32 res = cau_read_pi_1byte(op) << 8;
+ uint32_t res = cau_read_pi_1byte(op) << 8;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
m_nzcflags = res << 8;
@@ -1864,12 +1864,12 @@ void dsp32c_device::load_hr(UINT32 op)
}
-void dsp32c_device::load_lr(UINT32 op)
+void dsp32c_device::load_lr(uint32_t op)
{
if (!(op & 0x400))
{
int dr = (op >> 16) & 0x1f;
- UINT32 res = cau_read_pi_1byte(op);
+ uint32_t res = cau_read_pi_1byte(op);
if (IS_WRITEABLE(dr))
m_r[dr] = res;
m_nzcflags = res << 8;
@@ -1880,11 +1880,11 @@ void dsp32c_device::load_lr(UINT32 op)
}
-void dsp32c_device::load_r(UINT32 op)
+void dsp32c_device::load_r(uint32_t op)
{
if (!(op & 0x400))
{
- UINT32 res = cau_read_pi_2byte(op);
+ uint32_t res = cau_read_pi_2byte(op);
int dr = (op >> 16) & 0x1f;
if (IS_WRITEABLE(dr))
m_r[dr] = EXTEND16_TO_24(res);
@@ -1896,11 +1896,11 @@ void dsp32c_device::load_r(UINT32 op)
}
-void dsp32c_device::load_er(UINT32 op)
+void dsp32c_device::load_er(uint32_t op)
{
if (!(op & 0x400))
{
- UINT32 res = TRUNCATE24(cau_read_pi_4byte(op));
+ uint32_t res = TRUNCATE24(cau_read_pi_4byte(op));
int dr = (op >> 16) & 0x1f;
if (IS_WRITEABLE(dr))
m_r[dr] = res;
@@ -1912,7 +1912,7 @@ void dsp32c_device::load_er(UINT32 op)
}
-void dsp32c_device::store_hr(UINT32 op)
+void dsp32c_device::store_hr(uint32_t op)
{
if (!(op & 0x400))
cau_write_pi_1byte(op, m_r[(op >> 16) & 0x1f] >> 8);
@@ -1921,7 +1921,7 @@ void dsp32c_device::store_hr(UINT32 op)
}
-void dsp32c_device::store_lr(UINT32 op)
+void dsp32c_device::store_lr(uint32_t op)
{
if (!(op & 0x400))
cau_write_pi_1byte(op, m_r[(op >> 16) & 0x1f]);
@@ -1930,7 +1930,7 @@ void dsp32c_device::store_lr(UINT32 op)
}
-void dsp32c_device::store_r(UINT32 op)
+void dsp32c_device::store_r(uint32_t op)
{
if (!(op & 0x400))
cau_write_pi_2byte(op, REG16((op >> 16) & 0x1f));
@@ -1939,7 +1939,7 @@ void dsp32c_device::store_r(UINT32 op)
}
-void dsp32c_device::store_er(UINT32 op)
+void dsp32c_device::store_er(uint32_t op)
{
if (!(op & 0x400))
cau_write_pi_4byte(op, REG24((op >> 16) & 0x1f));
@@ -1948,10 +1948,10 @@ void dsp32c_device::store_er(UINT32 op)
}
-void dsp32c_device::load24(UINT32 op)
+void dsp32c_device::load24(uint32_t op)
{
int dr = (op >> 16) & 0x1f;
- UINT32 res = (op & 0xffff) + ((op >> 5) & 0xff0000);
+ uint32_t res = (op & 0xffff) + ((op >> 5) & 0xff0000);
if (IS_WRITEABLE(dr))
m_r[dr] = res;
}
@@ -1962,7 +1962,7 @@ void dsp32c_device::load24(UINT32 op)
// DAU FORM 1 IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::d1_aMpp(UINT32 op)
+void dsp32c_device::d1_aMpp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -1974,7 +1974,7 @@ void dsp32c_device::d1_aMpp(UINT32 op)
}
-void dsp32c_device::d1_aMpm(UINT32 op)
+void dsp32c_device::d1_aMpm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -1986,7 +1986,7 @@ void dsp32c_device::d1_aMpm(UINT32 op)
}
-void dsp32c_device::d1_aMmp(UINT32 op)
+void dsp32c_device::d1_aMmp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -1998,7 +1998,7 @@ void dsp32c_device::d1_aMmp(UINT32 op)
}
-void dsp32c_device::d1_aMmm(UINT32 op)
+void dsp32c_device::d1_aMmm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2010,7 +2010,7 @@ void dsp32c_device::d1_aMmm(UINT32 op)
}
-void dsp32c_device::d1_0px(UINT32 op)
+void dsp32c_device::d1_0px(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2023,7 +2023,7 @@ void dsp32c_device::d1_0px(UINT32 op)
}
-void dsp32c_device::d1_0mx(UINT32 op)
+void dsp32c_device::d1_0mx(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2036,7 +2036,7 @@ void dsp32c_device::d1_0mx(UINT32 op)
}
-void dsp32c_device::d1_1pp(UINT32 op)
+void dsp32c_device::d1_1pp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2048,7 +2048,7 @@ void dsp32c_device::d1_1pp(UINT32 op)
}
-void dsp32c_device::d1_1pm(UINT32 op)
+void dsp32c_device::d1_1pm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2060,7 +2060,7 @@ void dsp32c_device::d1_1pm(UINT32 op)
}
-void dsp32c_device::d1_1mp(UINT32 op)
+void dsp32c_device::d1_1mp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2072,7 +2072,7 @@ void dsp32c_device::d1_1mp(UINT32 op)
}
-void dsp32c_device::d1_1mm(UINT32 op)
+void dsp32c_device::d1_1mm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2084,25 +2084,25 @@ void dsp32c_device::d1_1mm(UINT32 op)
}
-void dsp32c_device::d1_aMppr(UINT32 op)
+void dsp32c_device::d1_aMppr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d1_aMpmr(UINT32 op)
+void dsp32c_device::d1_aMpmr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d1_aMmpr(UINT32 op)
+void dsp32c_device::d1_aMmpr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d1_aMmmr(UINT32 op)
+void dsp32c_device::d1_aMmmr(uint32_t op)
{
unimplemented(op);
}
@@ -2113,7 +2113,7 @@ void dsp32c_device::d1_aMmmr(UINT32 op)
// DAU FORM 2 IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::d2_aMpp(UINT32 op)
+void dsp32c_device::d2_aMpp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 1, xval);
@@ -2125,7 +2125,7 @@ void dsp32c_device::d2_aMpp(UINT32 op)
}
-void dsp32c_device::d2_aMpm(UINT32 op)
+void dsp32c_device::d2_aMpm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 1, xval);
@@ -2137,7 +2137,7 @@ void dsp32c_device::d2_aMpm(UINT32 op)
}
-void dsp32c_device::d2_aMmp(UINT32 op)
+void dsp32c_device::d2_aMmp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 1, xval);
@@ -2149,7 +2149,7 @@ void dsp32c_device::d2_aMmp(UINT32 op)
}
-void dsp32c_device::d2_aMmm(UINT32 op)
+void dsp32c_device::d2_aMmm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 1, xval);
@@ -2161,25 +2161,25 @@ void dsp32c_device::d2_aMmm(UINT32 op)
}
-void dsp32c_device::d2_aMppr(UINT32 op)
+void dsp32c_device::d2_aMppr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d2_aMpmr(UINT32 op)
+void dsp32c_device::d2_aMpmr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d2_aMmpr(UINT32 op)
+void dsp32c_device::d2_aMmpr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d2_aMmmr(UINT32 op)
+void dsp32c_device::d2_aMmmr(uint32_t op)
{
unimplemented(op);
}
@@ -2190,7 +2190,7 @@ void dsp32c_device::d2_aMmmr(UINT32 op)
// DAU FORM 3 IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::d3_aMpp(UINT32 op)
+void dsp32c_device::d3_aMpp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 1, xval);
@@ -2202,7 +2202,7 @@ void dsp32c_device::d3_aMpp(UINT32 op)
}
-void dsp32c_device::d3_aMpm(UINT32 op)
+void dsp32c_device::d3_aMpm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 1, xval);
@@ -2214,7 +2214,7 @@ void dsp32c_device::d3_aMpm(UINT32 op)
}
-void dsp32c_device::d3_aMmp(UINT32 op)
+void dsp32c_device::d3_aMmp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 1, xval);
@@ -2226,7 +2226,7 @@ void dsp32c_device::d3_aMmp(UINT32 op)
}
-void dsp32c_device::d3_aMmm(UINT32 op)
+void dsp32c_device::d3_aMmm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 1, xval);
@@ -2238,25 +2238,25 @@ void dsp32c_device::d3_aMmm(UINT32 op)
}
-void dsp32c_device::d3_aMppr(UINT32 op)
+void dsp32c_device::d3_aMppr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d3_aMpmr(UINT32 op)
+void dsp32c_device::d3_aMpmr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d3_aMmpr(UINT32 op)
+void dsp32c_device::d3_aMmpr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d3_aMmmr(UINT32 op)
+void dsp32c_device::d3_aMmmr(uint32_t op)
{
unimplemented(op);
}
@@ -2267,7 +2267,7 @@ void dsp32c_device::d3_aMmmr(UINT32 op)
// DAU FORM 4 IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::d4_pp(UINT32 op)
+void dsp32c_device::d4_pp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2279,7 +2279,7 @@ void dsp32c_device::d4_pp(UINT32 op)
}
-void dsp32c_device::d4_pm(UINT32 op)
+void dsp32c_device::d4_pm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2291,7 +2291,7 @@ void dsp32c_device::d4_pm(UINT32 op)
}
-void dsp32c_device::d4_mp(UINT32 op)
+void dsp32c_device::d4_mp(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2303,7 +2303,7 @@ void dsp32c_device::d4_mp(UINT32 op)
}
-void dsp32c_device::d4_mm(UINT32 op)
+void dsp32c_device::d4_mm(uint32_t op)
{
double xval = dau_read_pi_double_1st(op >> 14, 1);
double yval = dau_read_pi_double_2nd(op >> 7, 0, xval);
@@ -2315,25 +2315,25 @@ void dsp32c_device::d4_mm(UINT32 op)
}
-void dsp32c_device::d4_ppr(UINT32 op)
+void dsp32c_device::d4_ppr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d4_pmr(UINT32 op)
+void dsp32c_device::d4_pmr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d4_mpr(UINT32 op)
+void dsp32c_device::d4_mpr(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d4_mmr(UINT32 op)
+void dsp32c_device::d4_mmr(uint32_t op)
{
unimplemented(op);
}
@@ -2344,21 +2344,21 @@ void dsp32c_device::d4_mmr(UINT32 op)
// DAU FORM 5 IMPLEMENTATION
//**************************************************************************
-void dsp32c_device::d5_ic(UINT32 op)
+void dsp32c_device::d5_ic(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d5_oc(UINT32 op)
+void dsp32c_device::d5_oc(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d5_float(UINT32 op)
+void dsp32c_device::d5_float(uint32_t op)
{
- double res = (double)(INT16)dau_read_pi_2bytes(op >> 7);
+ double res = (double)(int16_t)dau_read_pi_2bytes(op >> 7);
int zpi = (op >> 0) & 0x7f;
if (zpi != 7)
dau_write_pi_double(zpi, res);
@@ -2366,21 +2366,21 @@ void dsp32c_device::d5_float(UINT32 op)
}
-void dsp32c_device::d5_int(UINT32 op)
+void dsp32c_device::d5_int(uint32_t op)
{
double val = dau_read_pi_double_1st(op >> 7, 0);
int zpi = (op >> 0) & 0x7f;
- INT16 res;
+ int16_t res;
if (!(DAUC & 0x10)) val = floor(val + 0.5);
else val = ceil(val - 0.5);
- res = (INT16)val;
+ res = (int16_t)val;
if (zpi != 7)
dau_write_pi_2bytes(zpi, res);
dau_set_val_noflags((op >> 21) & 3, dsp_to_double(res << 16));
}
-void dsp32c_device::d5_round(UINT32 op)
+void dsp32c_device::d5_round(uint32_t op)
{
double res = (double)(float)dau_read_pi_double_1st(op >> 7, 0);
int zpi = (op >> 0) & 0x7f;
@@ -2390,7 +2390,7 @@ void dsp32c_device::d5_round(UINT32 op)
}
-void dsp32c_device::d5_ifalt(UINT32 op)
+void dsp32c_device::d5_ifalt(uint32_t op)
{
int ar = (op >> 21) & 3;
double res = m_a[ar];
@@ -2403,7 +2403,7 @@ void dsp32c_device::d5_ifalt(UINT32 op)
}
-void dsp32c_device::d5_ifaeq(UINT32 op)
+void dsp32c_device::d5_ifaeq(uint32_t op)
{
int ar = (op >> 21) & 3;
double res = m_a[ar];
@@ -2416,7 +2416,7 @@ void dsp32c_device::d5_ifaeq(UINT32 op)
}
-void dsp32c_device::d5_ifagt(UINT32 op)
+void dsp32c_device::d5_ifagt(uint32_t op)
{
int ar = (op >> 21) & 3;
double res = m_a[ar];
@@ -2429,9 +2429,9 @@ void dsp32c_device::d5_ifagt(UINT32 op)
}
-void dsp32c_device::d5_float24(UINT32 op)
+void dsp32c_device::d5_float24(uint32_t op)
{
- double res = (double)((INT32)(dau_read_pi_4bytes(op >> 7) << 8) >> 8);
+ double res = (double)((int32_t)(dau_read_pi_4bytes(op >> 7) << 8) >> 8);
int zpi = (op >> 0) & 0x7f;
if (zpi != 7)
dau_write_pi_double(zpi, res);
@@ -2439,42 +2439,42 @@ void dsp32c_device::d5_float24(UINT32 op)
}
-void dsp32c_device::d5_int24(UINT32 op)
+void dsp32c_device::d5_int24(uint32_t op)
{
double val = dau_read_pi_double_1st(op >> 7, 0);
int zpi = (op >> 0) & 0x7f;
- INT32 res;
+ int32_t res;
if (!(DAUC & 0x10)) val = floor(val + 0.5);
else val = ceil(val - 0.5);
- res = (INT32)val;
+ res = (int32_t)val;
if (res > 0x7fffff) res = 0x7fffff;
else if (res < -0x800000) res = -0x800000;
if (zpi != 7)
- dau_write_pi_4bytes(zpi, (INT32)(res << 8) >> 8);
+ dau_write_pi_4bytes(zpi, (int32_t)(res << 8) >> 8);
dau_set_val_noflags((op >> 21) & 3, dsp_to_double(res << 8));
}
-void dsp32c_device::d5_ieee(UINT32 op)
+void dsp32c_device::d5_ieee(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d5_dsp(UINT32 op)
+void dsp32c_device::d5_dsp(uint32_t op)
{
unimplemented(op);
}
-void dsp32c_device::d5_seed(UINT32 op)
+void dsp32c_device::d5_seed(uint32_t op)
{
- UINT32 val = dau_read_pi_4bytes(op >> 7);
- INT32 res = val ^ 0x7fffffff;
+ uint32_t val = dau_read_pi_4bytes(op >> 7);
+ int32_t res = val ^ 0x7fffffff;
int zpi = (op >> 0) & 0x7f;
if (zpi != 7)
dau_write_pi_4bytes(zpi, res);
- dau_set_val_flags((op >> 21) & 3, dsp_to_double((INT32)res));
+ dau_set_val_flags((op >> 21) & 3, dsp_to_double((int32_t)res));
}
@@ -2483,7 +2483,7 @@ void dsp32c_device::d5_seed(UINT32 op)
// FUNCTION TABLE
//**************************************************************************
-void (dsp32c_device::*const dsp32c_device::s_dsp32ops[])(UINT32 op) =
+void (dsp32c_device::*const dsp32c_device::s_dsp32ops[])(uint32_t op) =
{
&dsp32c_device::nop, &dsp32c_device::goto_t, &dsp32c_device::goto_pl, &dsp32c_device::goto_mi, &dsp32c_device::goto_ne, &dsp32c_device::goto_eq, &dsp32c_device::goto_vc, &dsp32c_device::goto_vs, // 00
&dsp32c_device::goto_cc, &dsp32c_device::goto_cs, &dsp32c_device::goto_ge, &dsp32c_device::goto_lt, &dsp32c_device::goto_gt, &dsp32c_device::goto_le, &dsp32c_device::goto_hi, &dsp32c_device::goto_ls,
diff --git a/src/devices/cpu/dsp56k/dsp56dsm.cpp b/src/devices/cpu/dsp56k/dsp56dsm.cpp
index 283f712ecda..1fd102bdc66 100644
--- a/src/devices/cpu/dsp56k/dsp56dsm.cpp
+++ b/src/devices/cpu/dsp56k/dsp56dsm.cpp
@@ -18,8 +18,8 @@
/*****************************/
CPU_DISASSEMBLE( dsp56k )
{
- const UINT16 w0 = oprom[0] | (oprom[1] << 8);
- const UINT16 w1 = oprom[2] | (oprom[3] << 8);
+ const uint16_t w0 = oprom[0] | (oprom[1] << 8);
+ const uint16_t w1 = oprom[2] | (oprom[3] << 8);
// Decode and disassemble.
DSP56K::Opcode op(w0, w1);
diff --git a/src/devices/cpu/dsp56k/dsp56k.cpp b/src/devices/cpu/dsp56k/dsp56k.cpp
index 4ede3141226..29492ae9c79 100644
--- a/src/devices/cpu/dsp56k/dsp56k.cpp
+++ b/src/devices/cpu/dsp56k/dsp56k.cpp
@@ -118,7 +118,7 @@ static ADDRESS_MAP_START( dsp56156_x_data_map, AS_DATA, 16, dsp56k_device )
ADDRESS_MAP_END
-dsp56k_device::dsp56k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+dsp56k_device::dsp56k_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, DSP56156, "DSP56156", tag, owner, clock, "dsp56156", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1, ADDRESS_MAP_NAME(dsp56156_program_map))
, m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1, ADDRESS_MAP_NAME(dsp56156_x_data_map))
@@ -293,8 +293,8 @@ void dsp56k_device::device_start()
state_add(DSP56K_X, "X", m_dsp56k_core.ALU.x.d).mask(0xffffffff).formatstr("%9s");
state_add(DSP56K_Y, "Y", m_dsp56k_core.ALU.y.d).mask(0xffffffff).formatstr("%9s");
- state_add(DSP56K_A, "A", m_dsp56k_core.ALU.a.q).mask((UINT64)U64(0xffffffffffffffff)).formatstr("%12s"); /* could benefit from a better mask? */
- state_add(DSP56K_B, "B", m_dsp56k_core.ALU.b.q).mask((UINT64)U64(0xffffffffffffffff)).formatstr("%12s"); /* could benefit from a better mask? */
+ state_add(DSP56K_A, "A", m_dsp56k_core.ALU.a.q).mask((uint64_t)U64(0xffffffffffffffff)).formatstr("%12s"); /* could benefit from a better mask? */
+ state_add(DSP56K_B, "B", m_dsp56k_core.ALU.b.q).mask((uint64_t)U64(0xffffffffffffffff)).formatstr("%12s"); /* could benefit from a better mask? */
state_add(DSP56K_R0, "R0", m_dsp56k_core.AGU.r0).formatstr("%04X");
state_add(DSP56K_R1, "R1", m_dsp56k_core.AGU.r1).formatstr("%04X");
@@ -455,8 +455,8 @@ static size_t execute_one_new(dsp56k_core* cpustate)
debugger_instruction_hook(cpustate->device, PC);
cpustate->op = ROPCODE(ADDRESS(PC));
- UINT16 w0 = ROPCODE(ADDRESS(PC));
- UINT16 w1 = ROPCODE(ADDRESS(PC) + ADDRESS(1));
+ uint16_t w0 = ROPCODE(ADDRESS(PC));
+ uint16_t w1 = ROPCODE(ADDRESS(PC) + ADDRESS(1));
Opcode op(w0, w1);
op.evaluate(cpustate);
@@ -494,7 +494,7 @@ void dsp56k_device::execute_run()
}
-offs_t dsp56k_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t dsp56k_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( dsp56k );
return CPU_DISASSEMBLE_NAME(dsp56k)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/dsp56k/dsp56k.h b/src/devices/cpu/dsp56k/dsp56k.h
index 185b52dc033..6d497941d3a 100644
--- a/src/devices/cpu/dsp56k/dsp56k.h
+++ b/src/devices/cpu/dsp56k/dsp56k.h
@@ -33,33 +33,33 @@ struct dsp56k_host_interface
{
// **** Dsp56k side **** //
// Host Control Register
- UINT16* hcr;
+ uint16_t* hcr;
// Host Status Register
- UINT16* hsr;
+ uint16_t* hsr;
// Host Transmit/Receive Data
- UINT16* htrx;
+ uint16_t* htrx;
// **** Host CPU side **** //
// Interrupt Control Register
- UINT8 icr;
+ uint8_t icr;
// Command Vector Register
- UINT8 cvr;
+ uint8_t cvr;
// Interrupt Status Register
- UINT8 isr;
+ uint8_t isr;
// Interrupt Vector Register
- UINT8 ivr;
+ uint8_t ivr;
// Transmit / Receive Registers
- UINT8 trxh;
- UINT8 trxl;
+ uint8_t trxh;
+ uint8_t trxl;
// HACK - Host interface bootstrap write offset
- UINT16 bootstrap_offset;
+ uint16_t bootstrap_offset;
};
@@ -84,28 +84,28 @@ struct dsp56k_data_alu
struct dsp56k_agu
{
// Four address registers
- UINT16 r0;
- UINT16 r1;
- UINT16 r2;
- UINT16 r3;
+ uint16_t r0;
+ uint16_t r1;
+ uint16_t r2;
+ uint16_t r3;
// Four offset registers
- UINT16 n0;
- UINT16 n1;
- UINT16 n2;
- UINT16 n3;
+ uint16_t n0;
+ uint16_t n1;
+ uint16_t n2;
+ uint16_t n3;
// Four modifier registers
- UINT16 m0;
- UINT16 m1;
- UINT16 m2;
- UINT16 m3;
+ uint16_t m0;
+ uint16_t m1;
+ uint16_t m2;
+ uint16_t m3;
// Used in loop processing
- UINT16 temp;
+ uint16_t temp;
// FM.4-5 - hmmm?
- // UINT8 status;
+ // uint8_t status;
// Basics
};
@@ -114,22 +114,22 @@ struct dsp56k_agu
struct dsp56k_pcu
{
// Program Counter
- UINT16 pc;
+ uint16_t pc;
// Loop Address
- UINT16 la;
+ uint16_t la;
// Loop Counter
- UINT16 lc;
+ uint16_t lc;
// Status Register
- UINT16 sr;
+ uint16_t sr;
// Operating Mode Register
- UINT16 omr;
+ uint16_t omr;
// Stack Pointer
- UINT16 sp;
+ uint16_t sp;
// Stack (TODO: 15-level?)
PAIR ss[16];
@@ -138,12 +138,12 @@ struct dsp56k_pcu
void (*service_interrupts)(void);
// A list of pending interrupts (indices into dsp56k_interrupt_sources array)
- INT8 pending_interrupts[32];
+ int8_t pending_interrupts[32];
// Basics
// Other PCU internals
- UINT16 reset_vector;
+ uint16_t reset_vector;
};
@@ -170,47 +170,47 @@ struct dsp56k_core
dsp56k_host_interface HI;
// IRQ line states
- UINT8 modA_state;
- UINT8 modB_state;
- UINT8 modC_state;
- UINT8 reset_state;
+ uint8_t modA_state;
+ uint8_t modB_state;
+ uint8_t modC_state;
+ uint8_t reset_state;
// HACK - Bootstrap mode state variable.
- UINT8 bootstrap_mode;
+ uint8_t bootstrap_mode;
- UINT8 repFlag; // Knowing if we're in a 'repeat' state (dunno how the processor does this)
- UINT32 repAddr; // The address of the instruction to repeat...
+ uint8_t repFlag; // Knowing if we're in a 'repeat' state (dunno how the processor does this)
+ uint32_t repAddr; // The address of the instruction to repeat...
/* MAME internal stuff */
int icount;
- UINT32 ppc;
- UINT32 op;
+ uint32_t ppc;
+ uint32_t op;
int interrupt_cycles;
- void (*output_pins_changed)(UINT32 pins);
+ void (*output_pins_changed)(uint32_t pins);
cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *data;
- UINT16 peripheral_ram[0x40];
- UINT16 *program_ram;
+ uint16_t peripheral_ram[0x40];
+ uint16_t *program_ram;
};
class dsp56k_device : public cpu_device
{
public:
- dsp56k_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ dsp56k_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
DECLARE_READ16_MEMBER( peripheral_register_r );
DECLARE_WRITE16_MEMBER( peripheral_register_w );
- void host_interface_write(UINT8 offset, UINT8 data);
- UINT8 host_interface_read(UINT8 offset);
+ void host_interface_write(uint8_t offset, uint8_t data);
+ uint8_t host_interface_read(uint8_t offset);
- UINT16 get_peripheral_memory(UINT16 addr);
+ uint16_t get_peripheral_memory(uint16_t addr);
protected:
// device-level overrides
@@ -218,12 +218,12 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); }
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 8; }
- virtual UINT32 execute_input_lines() const override { return 4; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 8; }
+ virtual uint32_t execute_input_lines() const override { return 4; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -234,14 +234,14 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
address_space_config m_data_config;
- required_shared_ptr<UINT16> m_program_ram;
+ required_shared_ptr<uint16_t> m_program_ram;
dsp56k_core m_dsp56k_core;
diff --git a/src/devices/cpu/dsp56k/dsp56mem.cpp b/src/devices/cpu/dsp56k/dsp56mem.cpp
index 5f8d4e405bd..ad8cfd6320e 100644
--- a/src/devices/cpu/dsp56k/dsp56mem.cpp
+++ b/src/devices/cpu/dsp56k/dsp56mem.cpp
@@ -9,21 +9,21 @@
namespace DSP56K
{
/* IPR Accessor Implementations */
-void IPR_set(dsp56k_core* cpustate, UINT16 value)
+void IPR_set(dsp56k_core* cpustate, uint16_t value)
{
/* TODO: Is there anything else? */
IPR = value;
}
-INT8 irqa_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0003) >> 0) - 1; }
-UINT8 irqa_trigger(dsp56k_core* cpustate){ return (IPR & 0x0004) >> 2; }
-INT8 irqb_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0018) >> 3) - 1; }
-UINT8 irqb_trigger(dsp56k_core* cpustate){ return (IPR & 0x0002) >> 5; }
-INT8 codec_ipl(dsp56k_core* cpustate) { return ((IPR & 0x00c0) >> 6) - 1; }
-INT8 host_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0300) >> 8) - 1; }
-INT8 ssi0_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0c00) >> 10) - 1; }
-INT8 ssi1_ipl(dsp56k_core* cpustate) { return ((IPR & 0x3000) >> 12) - 1; }
-INT8 tm_ipl(dsp56k_core* cpustate) { return ((IPR & 0xc000) >> 14) - 1; }
+int8_t irqa_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0003) >> 0) - 1; }
+uint8_t irqa_trigger(dsp56k_core* cpustate){ return (IPR & 0x0004) >> 2; }
+int8_t irqb_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0018) >> 3) - 1; }
+uint8_t irqb_trigger(dsp56k_core* cpustate){ return (IPR & 0x0002) >> 5; }
+int8_t codec_ipl(dsp56k_core* cpustate) { return ((IPR & 0x00c0) >> 6) - 1; }
+int8_t host_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0300) >> 8) - 1; }
+int8_t ssi0_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0c00) >> 10) - 1; }
+int8_t ssi1_ipl(dsp56k_core* cpustate) { return ((IPR & 0x3000) >> 12) - 1; }
+int8_t tm_ipl(dsp56k_core* cpustate) { return ((IPR & 0xc000) >> 14) - 1; }
void mem_reset(dsp56k_core* cpustate)
{
@@ -44,7 +44,7 @@ void mem_reset(dsp56k_core* cpustate)
/************************************/
/* Host Control Register (HCR) Bits */
/************************************/
-void HCR_set(dsp56k_core* cpustate, UINT16 value)
+void HCR_set(dsp56k_core* cpustate, uint16_t value)
{
HF3_bit_set (cpustate, (value & 0x0010) >> 4);
HF2_bit_set (cpustate, (value & 0x0008) >> 3);
@@ -52,13 +52,13 @@ void HCR_set(dsp56k_core* cpustate, UINT16 value)
HTIE_bit_set(cpustate, (value & 0x0002) >> 1);
HRIE_bit_set(cpustate, (value & 0x0001) >> 0);
}
-//UINT16 HF3_bit(dsp56k_core* cpustate) { return ((HCR & 0x0010) != 0); }
-//UINT16 HF2_bit(dsp56k_core* cpustate) { return ((HCR & 0x0008) != 0); }
-UINT16 HCIE_bit(dsp56k_core* cpustate) { return ((HCR & 0x0004) != 0); }
-UINT16 HTIE_bit(dsp56k_core* cpustate) { return ((HCR & 0x0002) != 0); }
-UINT16 HRIE_bit(dsp56k_core* cpustate) { return ((HCR & 0x0001) != 0); }
+//uint16_t HF3_bit(dsp56k_core* cpustate) { return ((HCR & 0x0010) != 0); }
+//uint16_t HF2_bit(dsp56k_core* cpustate) { return ((HCR & 0x0008) != 0); }
+uint16_t HCIE_bit(dsp56k_core* cpustate) { return ((HCR & 0x0004) != 0); }
+uint16_t HTIE_bit(dsp56k_core* cpustate) { return ((HCR & 0x0002) != 0); }
+uint16_t HRIE_bit(dsp56k_core* cpustate) { return ((HCR & 0x0001) != 0); }
-void HF3_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HF3_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HCR &= ~(0x0010);
@@ -66,7 +66,7 @@ void HF3_bit_set(dsp56k_core* cpustate, UINT16 value)
HF3_bit_host_set(cpustate, value);
}
-void HF2_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HF2_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HCR &= ~(0x0008);
@@ -74,19 +74,19 @@ void HF2_bit_set(dsp56k_core* cpustate, UINT16 value)
HF2_bit_host_set(cpustate, value);
}
-void HCIE_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HCIE_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HCR &= ~(0x0004);
HCR |= (value << 2);
}
-void HTIE_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HTIE_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HCR &= ~(0x0002);
HCR |= (value << 1);
}
-void HRIE_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HRIE_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HCR &= ~(0x0001);
@@ -96,33 +96,33 @@ void HRIE_bit_set(dsp56k_core* cpustate, UINT16 value)
/***********************************/
/* Host Status Register (HSR) Bits */
/***********************************/
-//UINT16 DMA_bit(dsp56k_core* cpustate) { return ((HSR & 0x0080) != 0); }
-//UINT16 HF1_bit(dsp56k_core* cpustate) { return ((HSR & 0x0010) != 0); }
-//UINT16 HF0_bit(dsp56k_core* cpustate) { return ((HSR & 0x0008) != 0); }
-//UINT16 HCP_bit(dsp56k_core* cpustate) { return ((HSR & 0x0004) != 0); }
-UINT16 HTDE_bit(dsp56k_core* cpustate) { return ((HSR & 0x0002) != 0); }
-UINT16 HRDF_bit(dsp56k_core* cpustate) { return ((HSR & 0x0001) != 0); }
+//uint16_t DMA_bit(dsp56k_core* cpustate) { return ((HSR & 0x0080) != 0); }
+//uint16_t HF1_bit(dsp56k_core* cpustate) { return ((HSR & 0x0010) != 0); }
+//uint16_t HF0_bit(dsp56k_core* cpustate) { return ((HSR & 0x0008) != 0); }
+//uint16_t HCP_bit(dsp56k_core* cpustate) { return ((HSR & 0x0004) != 0); }
+uint16_t HTDE_bit(dsp56k_core* cpustate) { return ((HSR & 0x0002) != 0); }
+uint16_t HRDF_bit(dsp56k_core* cpustate) { return ((HSR & 0x0001) != 0); }
-void DMA_bit_set(dsp56k_core* cpustate, UINT16 value)
+void DMA_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HSR &= ~(0x0080);
HSR |= (value << 7);
// TODO: 5-12 When the DMA bit is set, the DMA mode is enabled by the Host Mode bits HM0 & HM1
}
-void HF1_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HF1_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HSR &= ~(0x0010);
HSR |= (value << 4);
}
-void HF0_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HF0_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HSR &= ~(0x0008);
HSR |= (value << 3);
}
-void HCP_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HCP_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HSR &= ~(0x0004);
@@ -131,7 +131,7 @@ void HCP_bit_set(dsp56k_core* cpustate, UINT16 value)
if (value && HCIE_bit(cpustate))
dsp56k_add_pending_interrupt(cpustate, "Host Command");
}
-void HTDE_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HTDE_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HSR &= ~(0x0002);
@@ -145,7 +145,7 @@ void HTDE_bit_set(dsp56k_core* cpustate, UINT16 value)
if (!value && !RXDF_bit(cpustate))
dsp56k_host_interface_HTX_to_host(cpustate);
}
-void HRDF_bit_set(dsp56k_core* cpustate, UINT16 value)
+void HRDF_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x01;
HSR &= ~(0x0001);
@@ -168,7 +168,7 @@ void HRDF_bit_set(dsp56k_core* cpustate, UINT16 value)
/*****************************************/
/* Interrupt Control Register (ICR) Bits */
/*****************************************/
-void ICR_set(dsp56k_core* cpustate, UINT8 value)
+void ICR_set(dsp56k_core* cpustate, uint8_t value)
{
HF1_bit_host_set(cpustate, (value & 0x10) >> 4);
HF0_bit_host_set(cpustate, (value & 0x08) >> 3);
@@ -176,18 +176,18 @@ void ICR_set(dsp56k_core* cpustate, UINT8 value)
RREQ_bit_set(cpustate, (value & 0x01) >> 0);
}
-//UINT8 INIT_bit(dsp56k_core* cpustate); #define x_initBIT ((dsp56k.HI.ICR & 0x0080) != 0)
-//UINT8 HM1_bit(dsp56k_core* cpustate); #define x_hm1BIT ((dsp56k.HI.ICR & 0x0040) != 0)
-//UINT8 HM0_bit(dsp56k_core* cpustate); #define x_hm0BIT ((dsp56k.HI.ICR & 0x0020) != 0)
-//UINT8 HF1_bit_host(dsp56k_core* cpustate); #define x_hf1BIT ((dsp56k.HI.ICR & 0x0010) != 0)
-//UINT8 HF0_bit_host(dsp56k_core* cpustate); #define x_hf0BIT ((dsp56k.HI.ICR & 0x0008) != 0)
-//UINT8 TREQ_bit(dsp56k_core* cpustate); #define x_treqBIT ((dsp56k.HI.ICR & 0x0002) != 0)
-//UINT8 RREQ_bit(dsp56k_core* cpustate); #define x_rreqBIT ((dsp56k.HI.ICR & 0x0001) != 0)
+//uint8_t INIT_bit(dsp56k_core* cpustate); #define x_initBIT ((dsp56k.HI.ICR & 0x0080) != 0)
+//uint8_t HM1_bit(dsp56k_core* cpustate); #define x_hm1BIT ((dsp56k.HI.ICR & 0x0040) != 0)
+//uint8_t HM0_bit(dsp56k_core* cpustate); #define x_hm0BIT ((dsp56k.HI.ICR & 0x0020) != 0)
+//uint8_t HF1_bit_host(dsp56k_core* cpustate); #define x_hf1BIT ((dsp56k.HI.ICR & 0x0010) != 0)
+//uint8_t HF0_bit_host(dsp56k_core* cpustate); #define x_hf0BIT ((dsp56k.HI.ICR & 0x0008) != 0)
+//uint8_t TREQ_bit(dsp56k_core* cpustate); #define x_treqBIT ((dsp56k.HI.ICR & 0x0002) != 0)
+//uint8_t RREQ_bit(dsp56k_core* cpustate); #define x_rreqBIT ((dsp56k.HI.ICR & 0x0001) != 0)
-//void INIT_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_initBIT() (dsp56k.HI.ICR &= (~0x0080))
-//void HM1_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_hm1BIT() (dsp56k.HI.ICR &= (~0x0040))
-//void HM0_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_hm0BIT() (dsp56k.HI.ICR &= (~0x0020))
-void HF1_bit_host_set(dsp56k_core* cpustate, UINT8 value)
+//void INIT_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_initBIT() (dsp56k.HI.ICR &= (~0x0080))
+//void HM1_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_hm1BIT() (dsp56k.HI.ICR &= (~0x0040))
+//void HM0_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_hm0BIT() (dsp56k.HI.ICR &= (~0x0020))
+void HF1_bit_host_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
ICR &= ~(0x10);
@@ -195,7 +195,7 @@ void HF1_bit_host_set(dsp56k_core* cpustate, UINT8 value)
HF1_bit_set(cpustate, value); // 5-14
}
-void HF0_bit_host_set(dsp56k_core* cpustate, UINT8 value)
+void HF0_bit_host_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
ICR &= ~(0x08);
@@ -203,13 +203,13 @@ void HF0_bit_host_set(dsp56k_core* cpustate, UINT8 value)
HF0_bit_set(cpustate, value); // 5-13
}
-void TREQ_bit_set(dsp56k_core* cpustate, UINT8 value)
+void TREQ_bit_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
ICR &= ~(0x02);
ICR |= (value << 1);
}
-void RREQ_bit_set(dsp56k_core* cpustate, UINT8 value)
+void RREQ_bit_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
ICR &= ~(0x01);
@@ -227,16 +227,16 @@ void RREQ_bit_set(dsp56k_core* cpustate, UINT8 value)
/**************************************/
/* Command Vector Register (CVR) Bits */
/**************************************/
-UINT8 HV_bits(dsp56k_core* cpustate) { return (CVR & 0x1f); }
+uint8_t HV_bits(dsp56k_core* cpustate) { return (CVR & 0x1f); }
-void CVR_set(dsp56k_core* cpustate, UINT8 value)
+void CVR_set(dsp56k_core* cpustate, uint8_t value)
{
/* A single, unified place to run all callbacks for each of the bits */
HC_bit_set(cpustate, (value & 0x80) >> 7);
HV_bits_set(cpustate, (value & 0x1f));
}
-void HC_bit_set(dsp56k_core* cpustate, UINT8 value)
+void HC_bit_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
CVR &= ~(0x80);
@@ -244,7 +244,7 @@ void HC_bit_set(dsp56k_core* cpustate, UINT8 value)
HCP_bit_set(cpustate, value); // 5-9 & 5-11
}
-void HV_bits_set(dsp56k_core* cpustate, UINT8 value)
+void HV_bits_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x1f;
CVR &= ~(0x1f);
@@ -255,23 +255,23 @@ void HV_bits_set(dsp56k_core* cpustate, UINT8 value)
/****************************************/
/* Interrupt Status Register (ISR) Bits */
/****************************************/
-UINT8 TXDE_bit(dsp56k_core* cpustate) { return ((ISR & 0x0002) != 0); }
-UINT8 RXDF_bit(dsp56k_core* cpustate) { return ((ISR & 0x0001) != 0); }
+uint8_t TXDE_bit(dsp56k_core* cpustate) { return ((ISR & 0x0002) != 0); }
+uint8_t RXDF_bit(dsp56k_core* cpustate) { return ((ISR & 0x0001) != 0); }
-void HF3_bit_host_set(dsp56k_core* cpustate, UINT8 value)
+void HF3_bit_host_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
ISR &= ~(0x0010);
ISR |= (value << 4);
}
-void HF2_bit_host_set(dsp56k_core* cpustate, UINT8 value)
+void HF2_bit_host_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
ISR &= ~(0x0008);
ISR |= (value << 3);
}
-void TXDE_bit_set(dsp56k_core* cpustate, UINT8 value)
+void TXDE_bit_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
ISR &= ~(0x0002);
@@ -282,7 +282,7 @@ void TXDE_bit_set(dsp56k_core* cpustate, UINT8 value)
dsp56k_host_interface_host_to_HTX(cpustate);
}
-void RXDF_bit_set(dsp56k_core* cpustate, UINT8 value)
+void RXDF_bit_set(dsp56k_core* cpustate, uint8_t value)
{
value = value & 0x01;
ISR &= ~(0x0001);
@@ -347,7 +347,7 @@ void dsp56k_host_interface_host_to_HTX(dsp56k_core* cpustate)
I/O INTERFACE
***************************************************************************/
/* BCR */
-void BCR_set(dsp56k_core* cpustate, UINT16 value)
+void BCR_set(dsp56k_core* cpustate, uint16_t value)
{
RH_bit_set(cpustate, (value & 0x8000) >> 15);
BS_bit_set(cpustate, (value & 0x4000) >> 14);
@@ -355,12 +355,12 @@ void BCR_set(dsp56k_core* cpustate, UINT16 value)
external_p_wait_states_set(cpustate, (value & 0x001f) >> 0);
}
-//UINT16 RH_bit(dsp56k_core* cpustate);
-//UINT16 BS_bit(dsp56k_core* cpustate);
-//UINT16 external_x_wait_states(dsp56k_core* cpustate);
-//UINT16 external_p_wait_states(dsp56k_core* cpustate);
+//uint16_t RH_bit(dsp56k_core* cpustate);
+//uint16_t BS_bit(dsp56k_core* cpustate);
+//uint16_t external_x_wait_states(dsp56k_core* cpustate);
+//uint16_t external_p_wait_states(dsp56k_core* cpustate);
-void RH_bit_set(dsp56k_core* cpustate, UINT16 value)
+void RH_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x0001;
BCR &= ~(0x8000);
@@ -368,7 +368,7 @@ void RH_bit_set(dsp56k_core* cpustate, UINT16 value)
// TODO: 4-6 Assert BR pin?
}
-void BS_bit_set(dsp56k_core* cpustate, UINT16 value)
+void BS_bit_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x0001;
BCR &= ~(0x4000);
@@ -376,13 +376,13 @@ void BS_bit_set(dsp56k_core* cpustate, UINT16 value)
// TODO: 4-6 Respond to BR pin?
}
-void external_x_wait_states_set(dsp56k_core* cpustate, UINT16 value)
+void external_x_wait_states_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x001f;
BCR &= ~(0x03e0);
BCR |= (value << 5);
}
-void external_p_wait_states_set(dsp56k_core* cpustate, UINT16 value)
+void external_p_wait_states_set(dsp56k_core* cpustate, uint16_t value)
{
value = value & 0x001f;
BCR &= ~(0x001f);
@@ -391,7 +391,7 @@ void external_p_wait_states_set(dsp56k_core* cpustate, UINT16 value)
/* Port B Control Register PBC */
-void PBC_set(dsp56k_core* cpustate, UINT16 value)
+void PBC_set(dsp56k_core* cpustate, uint16_t value)
{
if (value & 0xfffe)
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PBC. Ignoring.\n");
@@ -410,7 +410,7 @@ int host_interface_active(dsp56k_core* cpustate)
#endif
/* Port B Data Direction Register (PBDDR) */
-void PBDDR_set(dsp56k_core* cpustate, UINT16 value)
+void PBDDR_set(dsp56k_core* cpustate, uint16_t value)
{
if (value & 0x8000)
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PBDDR. Ignoring.\n");
@@ -423,7 +423,7 @@ void PBDDR_set(dsp56k_core* cpustate, UINT16 value)
}
/* Port B Data Register (PBD) */
-void PBD_set(dsp56k_core* cpustate, UINT16 value)
+void PBD_set(dsp56k_core* cpustate, uint16_t value)
{
if (value & 0x8000)
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PBD. Ignoring.\n");
@@ -436,7 +436,7 @@ void PBD_set(dsp56k_core* cpustate, UINT16 value)
}
/* Port C Control Register (PCC) */
-void PCC_set(dsp56k_core* cpustate, UINT16 value)
+void PCC_set(dsp56k_core* cpustate, uint16_t value)
{
if (value & 0xf000)
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PCC. Ignoring.\n");
@@ -449,7 +449,7 @@ void PCC_set(dsp56k_core* cpustate, UINT16 value)
}
/* Port C Data Direction Register (PCDDR) */
-void PCDDR_set(dsp56k_core* cpustate, UINT16 value)
+void PCDDR_set(dsp56k_core* cpustate, uint16_t value)
{
if (value & 0xf000)
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PCDDR. Ignoring.\n");
@@ -462,7 +462,7 @@ void PCDDR_set(dsp56k_core* cpustate, UINT16 value)
}
/* Port C Data Register (PCD) */
-void PCD_set(dsp56k_core* cpustate, UINT16 value)
+void PCD_set(dsp56k_core* cpustate, uint16_t value)
{
if (value & 0xf000)
cpustate->device->logerror("Dsp56k : Attempting to set reserved bits in the PCD. Ignoring.\n");
@@ -557,7 +557,7 @@ READ16_MEMBER( dsp56k_device::peripheral_register_r )
return 0xbeef;
else
{
- UINT16 value = HRX; // TODO: Maybe not exactly right? Just being safe.
+ uint16_t value = HRX; // TODO: Maybe not exactly right? Just being safe.
DSP56K::HRDF_bit_set(cpustate, 0);
return value;
}
@@ -780,7 +780,7 @@ WRITE16_MEMBER( dsp56k_device::peripheral_register_w )
/* These two functions are exposed to the outside world */
/* They represent the host side of the dsp56k's host interface */
-void dsp56k_device::host_interface_write(UINT8 offset, UINT8 data)
+void dsp56k_device::host_interface_write(uint8_t offset, uint8_t data)
{
dsp56k_core* cpustate = &m_dsp56k_core;
@@ -876,7 +876,7 @@ void dsp56k_device::host_interface_write(UINT8 offset, UINT8 data)
}
}
-UINT8 dsp56k_device::host_interface_read(UINT8 offset)
+uint8_t dsp56k_device::host_interface_read(uint8_t offset)
{
dsp56k_core* cpustate = &m_dsp56k_core;
@@ -928,7 +928,7 @@ UINT8 dsp56k_device::host_interface_read(UINT8 offset)
return 0xbf;
else
{
- UINT8 value = RXL; // TODO: Maybe not exactly right? I'm just being safe.
+ uint8_t value = RXL; // TODO: Maybe not exactly right? I'm just being safe.
DSP56K::RXDF_bit_set(cpustate, 0);
return value;
}
@@ -941,7 +941,7 @@ UINT8 dsp56k_device::host_interface_read(UINT8 offset)
}
/* MISC*/
-UINT16 dsp56k_device::get_peripheral_memory(UINT16 addr)
+uint16_t dsp56k_device::get_peripheral_memory(uint16_t addr)
{
dsp56k_core* cpustate = &m_dsp56k_core;
return cpustate->peripheral_ram[A2O(addr)];
diff --git a/src/devices/cpu/dsp56k/dsp56mem.h b/src/devices/cpu/dsp56k/dsp56mem.h
index e8445f1b736..c80e278758e 100644
--- a/src/devices/cpu/dsp56k/dsp56mem.h
+++ b/src/devices/cpu/dsp56k/dsp56mem.h
@@ -56,19 +56,19 @@ void mem_reset(dsp56k_core* cpustate);
#define TSMB1 (cpustate->peripheral_ram[A2O(0xfffd)])
/* Interrupt priority register (IPR) bits */
-void IPR_set(dsp56k_core* cpustate, UINT16 value);
+void IPR_set(dsp56k_core* cpustate, uint16_t value);
/* A return value of -1 means disabled */
-INT8 irqa_ipl(dsp56k_core* cpustate);
-INT8 irqb_ipl(dsp56k_core* cpustate);
-UINT8 irqa_trigger(dsp56k_core* cpustate);
-UINT8 irqb_trigger(dsp56k_core* cpustate);
+int8_t irqa_ipl(dsp56k_core* cpustate);
+int8_t irqb_ipl(dsp56k_core* cpustate);
+uint8_t irqa_trigger(dsp56k_core* cpustate);
+uint8_t irqb_trigger(dsp56k_core* cpustate);
-INT8 codec_ipl(dsp56k_core* cpustate);
-INT8 host_ipl(dsp56k_core* cpustate);
-INT8 ssi0_ipl(dsp56k_core* cpustate);
-INT8 ssi1_ipl(dsp56k_core* cpustate);
-INT8 tm_ipl(dsp56k_core* cpustate);
+int8_t codec_ipl(dsp56k_core* cpustate);
+int8_t host_ipl(dsp56k_core* cpustate);
+int8_t ssi0_ipl(dsp56k_core* cpustate);
+int8_t ssi1_ipl(dsp56k_core* cpustate);
+int8_t tm_ipl(dsp56k_core* cpustate);
/***************************************************************************
@@ -91,107 +91,107 @@ void dsp56k_host_interface_reset(dsp56k_core* cpustate);
/* DSP56k SIDE */
/***************/
/* Host Control Register (HCR) Bits */
-void HCR_set(dsp56k_core* cpustate, UINT16 value);
+void HCR_set(dsp56k_core* cpustate, uint16_t value);
-//UINT16 HF3_bit(dsp56k_core* cpustate); #define hf3BIT ((HCR & 0x0010) != 0)
-//UINT16 HF2_bit(dsp56k_core* cpustate); #define hf2BIT ((HCR & 0x0008) != 0)
-UINT16 HCIE_bit(dsp56k_core* cpustate);
-UINT16 HTIE_bit(dsp56k_core* cpustate);
-UINT16 HRIE_bit(dsp56k_core* cpustate);
+//uint16_t HF3_bit(dsp56k_core* cpustate); #define hf3BIT ((HCR & 0x0010) != 0)
+//uint16_t HF2_bit(dsp56k_core* cpustate); #define hf2BIT ((HCR & 0x0008) != 0)
+uint16_t HCIE_bit(dsp56k_core* cpustate);
+uint16_t HTIE_bit(dsp56k_core* cpustate);
+uint16_t HRIE_bit(dsp56k_core* cpustate);
-void HF3_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HF2_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HCIE_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HTIE_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HRIE_bit_set(dsp56k_core* cpustate, UINT16 value);
+void HF3_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HF2_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HCIE_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HTIE_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HRIE_bit_set(dsp56k_core* cpustate, uint16_t value);
/* Host Status Register (HSR) Bits */
-//void HSR_set(dsp56k_core* cpustate, UINT16 value);
-
-//UINT16 DMA_bit(dsp56k_core* cpustate); #define dmaBIT ((HSR & 0x0080) != 0)
-//UINT16 HF1_bit(dsp56k_core* cpustate); #define hf1BIT ((HSR & 0x0010) != 0)
-//UINT16 HF0_bit(dsp56k_core* cpustate); #define hf0BIT ((HSR & 0x0008) != 0)
-//UINT16 HCP_bit(dsp56k_core* cpustate); #define hcpBIT ((HSR & 0x0004) != 0)
-UINT16 HTDE_bit(dsp56k_core* cpustate);
-UINT16 HRDF_bit(dsp56k_core* cpustate);
-
-void DMA_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HF1_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HF0_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HCP_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HTDE_bit_set(dsp56k_core* cpustate, UINT16 value);
-void HRDF_bit_set(dsp56k_core* cpustate, UINT16 value);
+//void HSR_set(dsp56k_core* cpustate, uint16_t value);
+
+//uint16_t DMA_bit(dsp56k_core* cpustate); #define dmaBIT ((HSR & 0x0080) != 0)
+//uint16_t HF1_bit(dsp56k_core* cpustate); #define hf1BIT ((HSR & 0x0010) != 0)
+//uint16_t HF0_bit(dsp56k_core* cpustate); #define hf0BIT ((HSR & 0x0008) != 0)
+//uint16_t HCP_bit(dsp56k_core* cpustate); #define hcpBIT ((HSR & 0x0004) != 0)
+uint16_t HTDE_bit(dsp56k_core* cpustate);
+uint16_t HRDF_bit(dsp56k_core* cpustate);
+
+void DMA_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HF1_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HF0_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HCP_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HTDE_bit_set(dsp56k_core* cpustate, uint16_t value);
+void HRDF_bit_set(dsp56k_core* cpustate, uint16_t value);
/*************/
/* HOST SIDE */
/*************/
/* Interrupt Control Register (ICR) Bits */
-void ICR_set(dsp56k_core* cpustate, UINT8 value);
-
-//UINT8 INIT_bit(dsp56k_core* cpustate); #define x_initBIT ((dsp56k.HI.ICR & 0x0080) != 0)
-//UINT8 HM1_bit(dsp56k_core* cpustate); #define x_hm1BIT ((dsp56k.HI.ICR & 0x0040) != 0)
-//UINT8 HM0_bit(dsp56k_core* cpustate); #define x_hm0BIT ((dsp56k.HI.ICR & 0x0020) != 0)
-//UINT8 HF1_bit_host(dsp56k_core* cpustate); #define x_hf1BIT ((dsp56k.HI.ICR & 0x0010) != 0)
-//UINT8 HF0_bit_host(dsp56k_core* cpustate); #define x_hf0BIT ((dsp56k.HI.ICR & 0x0008) != 0)
-//UINT8 TREQ_bit(dsp56k_core* cpustate); #define x_treqBIT ((dsp56k.HI.ICR & 0x0002) != 0)
-//UINT8 RREQ_bit(dsp56k_core* cpustate); #define x_rreqBIT ((dsp56k.HI.ICR & 0x0001) != 0)
-
-//void INIT_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_initBIT() (dsp56k.HI.ICR &= (~0x0080))
-//void HM1_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_hm1BIT() (dsp56k.HI.ICR &= (~0x0040))
-//void HM0_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_hm0BIT() (dsp56k.HI.ICR &= (~0x0020))
-void HF1_bit_host_set(dsp56k_core* cpustate, UINT8 value);
-void HF0_bit_host_set(dsp56k_core* cpustate, UINT8 value);
-void TREQ_bit_set(dsp56k_core* cpustate, UINT8 value);
-void RREQ_bit_set(dsp56k_core* cpustate, UINT8 value);
+void ICR_set(dsp56k_core* cpustate, uint8_t value);
+
+//uint8_t INIT_bit(dsp56k_core* cpustate); #define x_initBIT ((dsp56k.HI.ICR & 0x0080) != 0)
+//uint8_t HM1_bit(dsp56k_core* cpustate); #define x_hm1BIT ((dsp56k.HI.ICR & 0x0040) != 0)
+//uint8_t HM0_bit(dsp56k_core* cpustate); #define x_hm0BIT ((dsp56k.HI.ICR & 0x0020) != 0)
+//uint8_t HF1_bit_host(dsp56k_core* cpustate); #define x_hf1BIT ((dsp56k.HI.ICR & 0x0010) != 0)
+//uint8_t HF0_bit_host(dsp56k_core* cpustate); #define x_hf0BIT ((dsp56k.HI.ICR & 0x0008) != 0)
+//uint8_t TREQ_bit(dsp56k_core* cpustate); #define x_treqBIT ((dsp56k.HI.ICR & 0x0002) != 0)
+//uint8_t RREQ_bit(dsp56k_core* cpustate); #define x_rreqBIT ((dsp56k.HI.ICR & 0x0001) != 0)
+
+//void INIT_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_initBIT() (dsp56k.HI.ICR &= (~0x0080))
+//void HM1_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_hm1BIT() (dsp56k.HI.ICR &= (~0x0040))
+//void HM0_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_hm0BIT() (dsp56k.HI.ICR &= (~0x0020))
+void HF1_bit_host_set(dsp56k_core* cpustate, uint8_t value);
+void HF0_bit_host_set(dsp56k_core* cpustate, uint8_t value);
+void TREQ_bit_set(dsp56k_core* cpustate, uint8_t value);
+void RREQ_bit_set(dsp56k_core* cpustate, uint8_t value);
/* Command Vector Register (CVR) Bits */
-void CVR_set(dsp56k_core* cpustate, UINT8 value);
+void CVR_set(dsp56k_core* cpustate, uint8_t value);
-//UINT8 HC_bit();
-UINT8 HV_bits(dsp56k_core* cpustate);
+//uint8_t HC_bit();
+uint8_t HV_bits(dsp56k_core* cpustate);
-void HC_bit_set(dsp56k_core* cpustate, UINT8 value);
-void HV_bits_set(dsp56k_core* cpustate, UINT8 value);
+void HC_bit_set(dsp56k_core* cpustate, uint8_t value);
+void HV_bits_set(dsp56k_core* cpustate, uint8_t value);
/* Interrupt Status Register (ISR) Bits */
-// void ISR_set(dsp56k_core* cpustate, UINT8 value);
-
-//UINT8 HREQ_bit(dsp56k_core* cpustate); #define x_hreqBIT ((dsp56k.HI.ISR & 0x0080) != 0)
-//UINT8 DMA_bit(dsp56k_core* cpustate); #define x_dmaBIT ((dsp56k.HI.ISR & 0x0040) != 0)
-//UINT8 HF3_bit_host(dsp56k_core* cpustate); #define x_hf3BIT ((dsp56k.HI.ISR & 0x0010) != 0)
-//UINT8 HF2_bit_host(dsp56k_core* cpustate); #define x_hf2BIT ((dsp56k.HI.ISR & 0x0008) != 0)
-//UINT8 TRDY_bit(dsp56k_core* cpustate); #define x_trdyBIT ((dsp56k.HI.ISR & 0x0004) != 0)
-UINT8 TXDE_bit(dsp56k_core* cpustate);
-UINT8 RXDF_bit(dsp56k_core* cpustate);
-
-//void HREQ_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_hreqBIT() (dsp56k.HI.ISR &= (~0x0080))
-//void DMA_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_dmaBIT() (dsp56k.HI.ISR &= (~0x0040))
-void HF3_bit_host_set(dsp56k_core* cpustate, UINT8 value);
-void HF2_bit_host_set(dsp56k_core* cpustate, UINT8 value);
-//void TRDY_bit_set(dsp56k_core* cpustate, UINT8 value); #define CLEAR_x_trdyBIT() (dsp56k.HI.ISR &= (~0x0004))
-void TXDE_bit_set(dsp56k_core* cpustate, UINT8 value);
-void RXDF_bit_set(dsp56k_core* cpustate, UINT8 value);
+// void ISR_set(dsp56k_core* cpustate, uint8_t value);
+
+//uint8_t HREQ_bit(dsp56k_core* cpustate); #define x_hreqBIT ((dsp56k.HI.ISR & 0x0080) != 0)
+//uint8_t DMA_bit(dsp56k_core* cpustate); #define x_dmaBIT ((dsp56k.HI.ISR & 0x0040) != 0)
+//uint8_t HF3_bit_host(dsp56k_core* cpustate); #define x_hf3BIT ((dsp56k.HI.ISR & 0x0010) != 0)
+//uint8_t HF2_bit_host(dsp56k_core* cpustate); #define x_hf2BIT ((dsp56k.HI.ISR & 0x0008) != 0)
+//uint8_t TRDY_bit(dsp56k_core* cpustate); #define x_trdyBIT ((dsp56k.HI.ISR & 0x0004) != 0)
+uint8_t TXDE_bit(dsp56k_core* cpustate);
+uint8_t RXDF_bit(dsp56k_core* cpustate);
+
+//void HREQ_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_hreqBIT() (dsp56k.HI.ISR &= (~0x0080))
+//void DMA_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_dmaBIT() (dsp56k.HI.ISR &= (~0x0040))
+void HF3_bit_host_set(dsp56k_core* cpustate, uint8_t value);
+void HF2_bit_host_set(dsp56k_core* cpustate, uint8_t value);
+//void TRDY_bit_set(dsp56k_core* cpustate, uint8_t value); #define CLEAR_x_trdyBIT() (dsp56k.HI.ISR &= (~0x0004))
+void TXDE_bit_set(dsp56k_core* cpustate, uint8_t value);
+void RXDF_bit_set(dsp56k_core* cpustate, uint8_t value);
/* Interrupt Vector Register (IVR) Bits */
-//void IVR_set(dsp56k_core* cpustate, UINT8 value);
-
-//UINT8 IV7_bit(dsp56k_core* cpustate);
-//UINT8 IV6_bit(dsp56k_core* cpustate);
-//UINT8 IV5_bit(dsp56k_core* cpustate);
-//UINT8 IV4_bit(dsp56k_core* cpustate);
-//UINT8 IV3_bit(dsp56k_core* cpustate);
-//UINT8 IV2_bit(dsp56k_core* cpustate);
-//UINT8 IV1_bit(dsp56k_core* cpustate);
-//UINT8 IV0_bit(dsp56k_core* cpustate);
-
-//void IV7_bit_set(dsp56k_core* cpustate, UINT8 value);
-//void IV6_bit_set(dsp56k_core* cpustate, UINT8 value);
-//void IV5_bit_set(dsp56k_core* cpustate, UINT8 value);
-//void IV4_bit_set(dsp56k_core* cpustate, UINT8 value);
-//void IV3_bit_set(dsp56k_core* cpustate, UINT8 value);
-//void IV2_bit_set(dsp56k_core* cpustate, UINT8 value);
-//void IV1_bit_set(dsp56k_core* cpustate, UINT8 value);
-//void IV0_bit_set(dsp56k_core* cpustate, UINT8 value);
+//void IVR_set(dsp56k_core* cpustate, uint8_t value);
+
+//uint8_t IV7_bit(dsp56k_core* cpustate);
+//uint8_t IV6_bit(dsp56k_core* cpustate);
+//uint8_t IV5_bit(dsp56k_core* cpustate);
+//uint8_t IV4_bit(dsp56k_core* cpustate);
+//uint8_t IV3_bit(dsp56k_core* cpustate);
+//uint8_t IV2_bit(dsp56k_core* cpustate);
+//uint8_t IV1_bit(dsp56k_core* cpustate);
+//uint8_t IV0_bit(dsp56k_core* cpustate);
+
+//void IV7_bit_set(dsp56k_core* cpustate, uint8_t value);
+//void IV6_bit_set(dsp56k_core* cpustate, uint8_t value);
+//void IV5_bit_set(dsp56k_core* cpustate, uint8_t value);
+//void IV4_bit_set(dsp56k_core* cpustate, uint8_t value);
+//void IV3_bit_set(dsp56k_core* cpustate, uint8_t value);
+//void IV2_bit_set(dsp56k_core* cpustate, uint8_t value);
+//void IV1_bit_set(dsp56k_core* cpustate, uint8_t value);
+//void IV0_bit_set(dsp56k_core* cpustate, uint8_t value);
/* PROTOTYPES */
@@ -205,36 +205,36 @@ void dsp56k_host_interface_host_to_HTX(dsp56k_core* cpustate);
void dsp56k_io_reset(dsp56k_core* cpustate);
/* Port A Bus Control Register (BCR) */
-void BCR_set(dsp56k_core* cpustate, UINT16 value);
+void BCR_set(dsp56k_core* cpustate, uint16_t value);
-//UINT16 RH_bit(dsp56k_core* cpustate);
-//UINT16 BS_bit(dsp56k_core* cpustate);
-//UINT16 external_x_wait_states(dsp56k_core* cpustate);
-//UINT16 external_p_wait_states(dsp56k_core* cpustate);
+//uint16_t RH_bit(dsp56k_core* cpustate);
+//uint16_t BS_bit(dsp56k_core* cpustate);
+//uint16_t external_x_wait_states(dsp56k_core* cpustate);
+//uint16_t external_p_wait_states(dsp56k_core* cpustate);
-void RH_bit_set(dsp56k_core* cpustate, UINT16 value);
-void BS_bit_set(dsp56k_core* cpustate, UINT16 value);
-void external_x_wait_states_set(dsp56k_core* cpustate, UINT16 value);
-void external_p_wait_states_set(dsp56k_core* cpustate, UINT16 value);
+void RH_bit_set(dsp56k_core* cpustate, uint16_t value);
+void BS_bit_set(dsp56k_core* cpustate, uint16_t value);
+void external_x_wait_states_set(dsp56k_core* cpustate, uint16_t value);
+void external_p_wait_states_set(dsp56k_core* cpustate, uint16_t value);
/* Port B Control Register (PBC) */
-void PBC_set(dsp56k_core* cpustate, UINT16 value);
+void PBC_set(dsp56k_core* cpustate, uint16_t value);
//int host_interface_active(dsp56k_core* cpustate);
/* Port B Data Direction Register (PBDDR) */
-void PBDDR_set(dsp56k_core* cpustate, UINT16 value);
+void PBDDR_set(dsp56k_core* cpustate, uint16_t value);
/* Port B Data Register (PBD) */
-void PBD_set(dsp56k_core* cpustate, UINT16 value);
+void PBD_set(dsp56k_core* cpustate, uint16_t value);
/* Port C Control Register (PCC) */
-void PCC_set(dsp56k_core* cpustate, UINT16 value);
+void PCC_set(dsp56k_core* cpustate, uint16_t value);
/* Port C Data Direction Register (PCDDR) */
-void PCDDR_set(dsp56k_core* cpustate, UINT16 value);
+void PCDDR_set(dsp56k_core* cpustate, uint16_t value);
/* Port C Dtaa Register (PCD) */
-void PCD_set(dsp56k_core* cpustate, UINT16 value);
+void PCD_set(dsp56k_core* cpustate, uint16_t value);
} // namespace DSP56K
diff --git a/src/devices/cpu/dsp56k/dsp56ops.hxx b/src/devices/cpu/dsp56k/dsp56ops.hxx
index f581175b6d8..0395e08d337 100644
--- a/src/devices/cpu/dsp56k/dsp56ops.hxx
+++ b/src/devices/cpu/dsp56k/dsp56ops.hxx
@@ -48,167 +48,167 @@ struct typed_pointer
/*********************/
/* Opcode prototypes */
/*********************/
-static size_t dsp56k_op_addsub_2 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_mac_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_macr_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_move_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_mpy_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_mpyr_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_tfr_2 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_mpy_2 (dsp56k_core* cpustate, const UINT16 op_byte, UINT8* cycles);
-static size_t dsp56k_op_mac_2 (dsp56k_core* cpustate, const UINT16 op_byte, UINT8* cycles);
-static size_t dsp56k_op_clr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_add (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_move (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_tfr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_rnd (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_tst (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_inc (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_inc24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_or (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_asr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_asl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_lsr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_lsl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_eor (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_subl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_sub (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_clr24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_sbc (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_cmp (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_neg (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_not (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_dec (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_dec24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_and (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_abs (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_ror (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_rol (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_cmpm (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_mpy (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_mpyr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_mac (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_macr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_adc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_andi (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_asl4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_asr4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_asr16 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bfop (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bfop_1 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bfop_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bcc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bcc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bcc_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bra (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bra_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bra_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_brkcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bscc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bscc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bsr (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bsr_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_chkaau (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_debug (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_debugcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_div (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_dmac (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_do (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_do_1 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_do_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_doforever(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_enddo (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_ext (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_illegal (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_imac (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_impy (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jcc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_jcc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jmp (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_jmp_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jscc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_jscc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jsr (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_jsr_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jsr_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_lea (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_lea_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_macsuuu (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_move_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_movec (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movec_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movec_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movec_3 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_movec_4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movec_5 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_movei (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movem (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movem_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movem_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_movep (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movep_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_moves (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_mpysuuu (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_negc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_nop (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_norm (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_ori (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rep (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rep_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rep_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_repcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_reset (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rti (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rts (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_stop (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_swap (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_swi (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_tcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_tfr2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_tfr3 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_tst2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_wait (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_zero (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-
-
-static void execute_register_to_register_data_move(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register, UINT64* prev_accum_value);
-static void execute_address_register_update(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register, UINT64* prev_accum_value);
-static void execute_x_memory_data_move (dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register, UINT64* prev_accum_value);
-static void execute_x_memory_data_move2(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register);
-static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register);
-static void execute_x_memory_data_move_with_short_displacement(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2);
-
-static UINT16 decode_BBB_bitmask(dsp56k_core* cpustate, UINT16 BBB, UINT16 *iVal);
-static int decode_cccc_table(dsp56k_core* cpustate, UINT16 cccc);
-static void decode_DDDDD_table(dsp56k_core* cpustate, UINT16 DDDDD, typed_pointer* ret);
-static void decode_DD_table(dsp56k_core* cpustate, UINT16 DD, typed_pointer* ret);
-static void decode_DDF_table(dsp56k_core* cpustate, UINT16 DD, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_F_table(dsp56k_core* cpustate, UINT16 F, typed_pointer* ret);
-static void decode_h0hF_table(dsp56k_core* cpustate, UINT16 h0h, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_HH_table(dsp56k_core* cpustate, UINT16 HH, typed_pointer* ret);
-static void decode_HHH_table(dsp56k_core* cpustate, UINT16 HHH, typed_pointer* ret);
-static void decode_IIII_table(dsp56k_core* cpustate, UINT16 IIII, typed_pointer* src_ret, typed_pointer* dst_ret, void* working);
-static void decode_JJJF_table(dsp56k_core* cpustate, UINT16 JJJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_JJF_table(dsp56k_core* cpustate, UINT16 JJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_JF_table(dsp56k_core* cpustate, UINT16 JJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_KKK_table(dsp56k_core* cpustate, UINT16 KKK, typed_pointer* dst_ret1, typed_pointer* dst_ret2, void* working);
-static void decode_QQF_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **S1, void **S2, void **D);
-static void decode_QQF_special_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **S1, void **S2, void **D);
-static void decode_QQQF_table(dsp56k_core* cpustate, UINT16 QQQ, UINT16 F, void **S1, void **S2, void **D);
-static void decode_RR_table(dsp56k_core* cpustate, UINT16 RR, typed_pointer* ret);
-static void decode_TT_table(dsp56k_core* cpustate, UINT16 TT, typed_pointer* ret);
-static void decode_uuuuF_table(dsp56k_core* cpustate, UINT16 uuuu, UINT16 F, UINT8 add_sub_other, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_Z_table(dsp56k_core* cpustate, UINT16 Z, typed_pointer* ret);
-
-static void execute_m_table(dsp56k_core* cpustate, int x, UINT16 m);
-static void execute_mm_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 mm);
-static void execute_MM_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 MM);
-static UINT16 execute_q_table(dsp56k_core* cpustate, int RR, UINT16 q);
-static void execute_z_table(dsp56k_core* cpustate, int RR, UINT16 z);
-
-static UINT16 assemble_address_from_Pppppp_table(dsp56k_core* cpustate, UINT16 P, UINT16 ppppp);
-static UINT16 assemble_address_from_IO_short_address(dsp56k_core* cpustate, UINT16 pp);
-static UINT16 assemble_address_from_6bit_signed_relative_short_address(dsp56k_core* cpustate, UINT16 srs);
+static size_t dsp56k_op_addsub_2 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles);
+static size_t dsp56k_op_mac_1 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles);
+static size_t dsp56k_op_macr_1 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles);
+static size_t dsp56k_op_move_1 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles);
+static size_t dsp56k_op_mpy_1 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles);
+static size_t dsp56k_op_mpyr_1 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles);
+static size_t dsp56k_op_tfr_2 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles);
+static size_t dsp56k_op_mpy_2 (dsp56k_core* cpustate, const uint16_t op_byte, uint8_t* cycles);
+static size_t dsp56k_op_mac_2 (dsp56k_core* cpustate, const uint16_t op_byte, uint8_t* cycles);
+static size_t dsp56k_op_clr (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_add (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_move (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_tfr (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_rnd (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_tst (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_inc (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_inc24 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_or (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_asr (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_asl (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_lsr (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_lsl (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_eor (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_subl (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_sub (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_clr24 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_sbc (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_cmp (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_neg (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_not (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_dec (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_dec24 (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_and (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_abs (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_ror (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_rol (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_cmpm (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_mpy (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_mpyr (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_mac (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_macr (dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles);
+static size_t dsp56k_op_adc (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_andi (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_asl4 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_asr4 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_asr16 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_bfop (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_bfop_1 (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_bfop_2 (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_bcc (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_bcc_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_bcc_2 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_bra (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_bra_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_bra_2 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_brkcc (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_bscc (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_bscc_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_bsr (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_bsr_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_chkaau (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_debug (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_debugcc (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_div (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_dmac (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_do (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_do_1 (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_do_2 (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_doforever(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_enddo (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_ext (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_illegal (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_imac (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_impy (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_jcc (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_jcc_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_jmp (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_jmp_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_jscc (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_jscc_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_jsr (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_jsr_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_jsr_2 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_lea (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_lea_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_macsuuu (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_move_2 (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_movec (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_movec_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_movec_2 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_movec_3 (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_movec_4 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_movec_5 (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_movei (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_movem (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_movem_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_movem_2 (dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles);
+static size_t dsp56k_op_movep (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_movep_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_moves (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_mpysuuu (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_negc (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_nop (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_norm (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_ori (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_rep (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_rep_1 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_rep_2 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_repcc (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_reset (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_rti (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_rts (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_stop (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_swap (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_swi (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_tcc (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_tfr2 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_tfr3 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_tst2 (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_wait (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+static size_t dsp56k_op_zero (dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles);
+
+
+static void execute_register_to_register_data_move(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register, uint64_t* prev_accum_value);
+static void execute_address_register_update(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register, uint64_t* prev_accum_value);
+static void execute_x_memory_data_move (dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register, uint64_t* prev_accum_value);
+static void execute_x_memory_data_move2(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register);
+static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register);
+static void execute_x_memory_data_move_with_short_displacement(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2);
+
+static uint16_t decode_BBB_bitmask(dsp56k_core* cpustate, uint16_t BBB, uint16_t *iVal);
+static int decode_cccc_table(dsp56k_core* cpustate, uint16_t cccc);
+static void decode_DDDDD_table(dsp56k_core* cpustate, uint16_t DDDDD, typed_pointer* ret);
+static void decode_DD_table(dsp56k_core* cpustate, uint16_t DD, typed_pointer* ret);
+static void decode_DDF_table(dsp56k_core* cpustate, uint16_t DD, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_F_table(dsp56k_core* cpustate, uint16_t F, typed_pointer* ret);
+static void decode_h0hF_table(dsp56k_core* cpustate, uint16_t h0h, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_HH_table(dsp56k_core* cpustate, uint16_t HH, typed_pointer* ret);
+static void decode_HHH_table(dsp56k_core* cpustate, uint16_t HHH, typed_pointer* ret);
+static void decode_IIII_table(dsp56k_core* cpustate, uint16_t IIII, typed_pointer* src_ret, typed_pointer* dst_ret, void* working);
+static void decode_JJJF_table(dsp56k_core* cpustate, uint16_t JJJ, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_JJF_table(dsp56k_core* cpustate, uint16_t JJ, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_JF_table(dsp56k_core* cpustate, uint16_t JJ, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_KKK_table(dsp56k_core* cpustate, uint16_t KKK, typed_pointer* dst_ret1, typed_pointer* dst_ret2, void* working);
+static void decode_QQF_table(dsp56k_core* cpustate, uint16_t QQ, uint16_t F, void **S1, void **S2, void **D);
+static void decode_QQF_special_table(dsp56k_core* cpustate, uint16_t QQ, uint16_t F, void **S1, void **S2, void **D);
+static void decode_QQQF_table(dsp56k_core* cpustate, uint16_t QQQ, uint16_t F, void **S1, void **S2, void **D);
+static void decode_RR_table(dsp56k_core* cpustate, uint16_t RR, typed_pointer* ret);
+static void decode_TT_table(dsp56k_core* cpustate, uint16_t TT, typed_pointer* ret);
+static void decode_uuuuF_table(dsp56k_core* cpustate, uint16_t uuuu, uint16_t F, uint8_t add_sub_other, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_Z_table(dsp56k_core* cpustate, uint16_t Z, typed_pointer* ret);
+
+static void execute_m_table(dsp56k_core* cpustate, int x, uint16_t m);
+static void execute_mm_table(dsp56k_core* cpustate, uint16_t rnum, uint16_t mm);
+static void execute_MM_table(dsp56k_core* cpustate, uint16_t rnum, uint16_t MM);
+static uint16_t execute_q_table(dsp56k_core* cpustate, int RR, uint16_t q);
+static void execute_z_table(dsp56k_core* cpustate, int RR, uint16_t z);
+
+static uint16_t assemble_address_from_Pppppp_table(dsp56k_core* cpustate, uint16_t P, uint16_t ppppp);
+static uint16_t assemble_address_from_IO_short_address(dsp56k_core* cpustate, uint16_t pp);
+static uint16_t assemble_address_from_6bit_signed_relative_short_address(dsp56k_core* cpustate, uint16_t srs);
static void dsp56k_process_loop(dsp56k_core* cpustate);
static void dsp56k_process_rep(dsp56k_core* cpustate, size_t repSize);
@@ -218,13 +218,13 @@ static void dsp56k_process_rep(dsp56k_core* cpustate, size_t repSize);
/********************/
/* Helper Functions */
/********************/
-static UINT16 Dsp56kOpMask(UINT16 op, UINT16 mask);
+static uint16_t Dsp56kOpMask(uint16_t op, uint16_t mask);
/* These arguments are written source->destination to fall in line with the processor's paradigm. */
static void SetDestinationValue(typed_pointer source, typed_pointer dest);
-static void SetDataMemoryValue(dsp56k_core* cpustate, typed_pointer source, UINT32 destinationAddr);
-static void SetProgramMemoryValue(dsp56k_core* cpustate, typed_pointer source, UINT32 destinationAddr);
+static void SetDataMemoryValue(dsp56k_core* cpustate, typed_pointer source, uint32_t destinationAddr);
+static void SetProgramMemoryValue(dsp56k_core* cpustate, typed_pointer source, uint32_t destinationAddr);
@@ -234,10 +234,10 @@ static void SetProgramMemoryValue(dsp56k_core* cpustate, typed_pointer source, U
static void execute_one(dsp56k_core* cpustate)
{
- UINT16 op;
- UINT16 op2;
+ uint16_t op;
+ uint16_t op2;
size_t size = 0x1337;
- UINT8 cycle_count = 0;
+ uint8_t cycle_count = 0;
/* For MAME */
cpustate->ppc = PC;
@@ -256,7 +256,7 @@ static void execute_one(dsp56k_core* cpustate)
typed_pointer d_register = {nullptr, DT_BYTE};
/* Quote: (MOVE, MAC(R), MPY(R), ADD, SUB, TFR) */
- UINT16 op_byte = op & 0x00ff;
+ uint16_t op_byte = op & 0x00ff;
/* ADD : 011m mKKK 0rru Fuuu : A-22 */
/* SUB : 011m mKKK 0rru Fuuu : A-202 */
@@ -309,7 +309,7 @@ static void execute_one(dsp56k_core* cpustate)
else if ((op & 0xfe00) == 0x1600)
{
/* Quote: (MPY or MAC) */
- UINT16 op_byte = op & 0x00ff;
+ uint16_t op_byte = op & 0x00ff;
/* MPY : 0001 0110 RRDD FQQQ : A-160 */
if ((op & 0xff00) == 0x1600)
@@ -342,9 +342,9 @@ static void execute_one(dsp56k_core* cpustate)
kXMemoryDataMoveWithDisp };
int parallelType = -1;
- UINT16 op_byte = 0x0000;
+ uint16_t op_byte = 0x0000;
typed_pointer d_register = {nullptr, DT_BYTE};
- UINT64 prev_accum_value = U64(0x0000000000000000);
+ uint64_t prev_accum_value = U64(0x0000000000000000);
/* Note: it's important that NPDM comes before RtRDM here */
/* No Parallel Data Move : 0100 1010 .... .... : A-131 */
@@ -609,7 +609,7 @@ static void execute_one(dsp56k_core* cpustate)
/* Drop out if you've already completed your work. */
if (size != 0x1337)
{
- PC += (UINT16)size;
+ PC += (uint16_t)size;
dsp56k_process_loop(cpustate);
dsp56k_process_rep(cpustate, size);
@@ -1094,7 +1094,7 @@ static void execute_one(dsp56k_core* cpustate)
}
/* Must have been a good opcode */
- PC += (UINT16)size;
+ PC += (uint16_t)size;
dsp56k_process_loop(cpustate);
dsp56k_process_rep(cpustate, size);
@@ -1115,10 +1115,10 @@ static void execute_one(dsp56k_core* cpustate)
/* ADD : 011m mKKK 0rru Fuuu : A-22 */
/* SUB : 011m mKKK 0rru Fuuu : A-202 */
-static size_t dsp56k_op_addsub_2(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles)
+static size_t dsp56k_op_addsub_2(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles)
{
- UINT64 useVal = 0;
- UINT8 op_type = OP_OTHER;
+ uint64_t useVal = 0;
+ uint8_t op_type = OP_OTHER;
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
@@ -1136,9 +1136,9 @@ static size_t dsp56k_op_addsub_2(dsp56k_core* cpustate, const UINT16 op_byte, ty
/* It's a real operation. Get on with it. */
switch(S.data_type)
{
- case DT_WORD: useVal = (UINT64)*((UINT16*)S.addr) << 16; break;
- case DT_DOUBLE_WORD: useVal = (UINT64)*((UINT32*)S.addr); break;
- case DT_LONG_WORD: useVal = (UINT64)*((UINT64*)S.addr); break;
+ case DT_WORD: useVal = (uint64_t)*((uint16_t*)S.addr) << 16; break;
+ case DT_DOUBLE_WORD: useVal = (uint64_t)*((uint32_t*)S.addr); break;
+ case DT_LONG_WORD: useVal = (uint64_t)*((uint64_t*)S.addr); break;
}
/* Sign-extend word for proper add/sub op */
@@ -1147,9 +1147,9 @@ static size_t dsp56k_op_addsub_2(dsp56k_core* cpustate, const UINT16 op_byte, ty
/* Operate*/
if (op_type == OP_ADD)
- *((UINT64*)D.addr) += useVal;
+ *((uint64_t*)D.addr) += useVal;
else if (op_type == OP_SUB)
- *((UINT64*)D.addr) -= useVal;
+ *((uint64_t*)D.addr) -= useVal;
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1157,21 +1157,21 @@ static size_t dsp56k_op_addsub_2(dsp56k_core* cpustate, const UINT16 op_byte, ty
/* S L E U N Z V C */
/* * * * * * * * * */
/* TODO S, L, E, U, V, C */
- if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if (*((uint64_t*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
/* MAC : 011m mKKK 1xx0 F1QQ : A-122 */
-static size_t dsp56k_op_mac_1(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles)
+static size_t dsp56k_op_mac_1(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles)
{
- INT64 opD = 0;
- INT64 result = 0;
+ int64_t opD = 0;
+ int64_t result = 0;
- INT32 s1 = 0;
- INT32 s2 = 0;
+ int32_t s1 = 0;
+ int32_t s2 = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -1180,14 +1180,14 @@ static size_t dsp56k_op_mac_1(dsp56k_core* cpustate, const UINT16 op_byte, typed
decode_QQF_table(cpustate, BITS(op_byte,0x0003), BITS(op_byte,0x0008), &S1, &S2, &D);
/* Cast both values as being signed */
- s1 = *((INT16*)S1);
- s2 = *((INT16*)S2);
+ s1 = *((int16_t*)S1);
+ s2 = *((int16_t*)S2);
/* Fixed-point 2's complement multiplication requires a shift */
result = (s1 * s2) << 1;
/* Sign extend D into a temp variable */
- opD = (*((UINT64*)D));
+ opD = (*((uint64_t*)D));
if (opD & U64(0x0000008000000000))
opD |= U64(0xffffff0000000000);
else
@@ -1199,7 +1199,7 @@ static size_t dsp56k_op_mac_1(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* And out the bits that don't live in the register */
opD &= U64(0x000000ffffffffff);
- (*((UINT64*)D)) = (UINT64)opD;
+ (*((uint64_t*)D)) = (uint64_t)opD;
/* For the parallel move */
d_register->addr = D;
@@ -1208,15 +1208,15 @@ static size_t dsp56k_op_mac_1(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
/* MACR: 011m mKKK 1--1 F1QQ : A-124 */
-static size_t dsp56k_op_macr_1(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles)
+static size_t dsp56k_op_macr_1(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * * - */
@@ -1224,7 +1224,7 @@ static size_t dsp56k_op_macr_1(dsp56k_core* cpustate, const UINT16 op_byte, type
}
/* MOVE : 011m mKKK 0rr1 0000 : A-128 */
-static size_t dsp56k_op_move_1(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles)
+static size_t dsp56k_op_move_1(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - - - - - */
@@ -1232,12 +1232,12 @@ static size_t dsp56k_op_move_1(dsp56k_core* cpustate, const UINT16 op_byte, type
}
/* MPY : 011m mKKK 1xx0 F0QQ : A-160 */
-static size_t dsp56k_op_mpy_1(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles)
+static size_t dsp56k_op_mpy_1(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles)
{
- INT64 result = 0;
+ int64_t result = 0;
- INT32 s1 = 0;
- INT32 s2 = 0;
+ int32_t s1 = 0;
+ int32_t s2 = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -1246,14 +1246,14 @@ static size_t dsp56k_op_mpy_1(dsp56k_core* cpustate, const UINT16 op_byte, typed
decode_QQF_table(cpustate, BITS(op_byte,0x0003), BITS(op_byte,0x0008), &S1, &S2, &D);
/* Cast both values as being signed */
- s1 = *((INT16*)S1);
- s2 = *((INT16*)S2);
+ s1 = *((int16_t*)S1);
+ s2 = *((int16_t*)S2);
/* Fixed-point 2's complement multiplication requires a shift */
result = (s1 * s2) << 1;
/* And out the bits that don't live in the register */
- (*((UINT64*)D)) = result & U64(0x000000ffffffffff);
+ (*((uint64_t*)D)) = result & U64(0x000000ffffffffff);
/* For the parallel move */
d_register->addr = D;
@@ -1262,15 +1262,15 @@ static size_t dsp56k_op_mpy_1(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
/* MPYR : 011m mKKK 1--1 F0QQ : A-162 */
-static size_t dsp56k_op_mpyr_1(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles)
+static size_t dsp56k_op_mpyr_1(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * * - */
@@ -1278,7 +1278,7 @@ static size_t dsp56k_op_mpyr_1(dsp56k_core* cpustate, const UINT16 op_byte, type
}
/* TFR : 011m mKKK 0rr1 F0DD : A-212 */
-static size_t dsp56k_op_tfr_2(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles)
+static size_t dsp56k_op_tfr_2(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -1286,7 +1286,7 @@ static size_t dsp56k_op_tfr_2(dsp56k_core* cpustate, const UINT16 op_byte, typed
}
/* MPY : 0001 0110 RRDD FQQQ : A-160 */
-static size_t dsp56k_op_mpy_2(dsp56k_core* cpustate, const UINT16 op_byte, UINT8* cycles)
+static size_t dsp56k_op_mpy_2(dsp56k_core* cpustate, const uint16_t op_byte, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * * - */
@@ -1294,7 +1294,7 @@ static size_t dsp56k_op_mpy_2(dsp56k_core* cpustate, const UINT16 op_byte, UINT8
}
/* MAC : 0001 0111 RRDD FQQQ : A-122 */
-static size_t dsp56k_op_mac_2(dsp56k_core* cpustate, const UINT16 op_byte, UINT8* cycles)
+static size_t dsp56k_op_mac_2(dsp56k_core* cpustate, const uint16_t op_byte, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * * - */
@@ -1302,15 +1302,15 @@ static size_t dsp56k_op_mac_2(dsp56k_core* cpustate, const UINT16 op_byte, UINT8
}
/* CLR : .... .... 0000 F001 : A-60 */
-static size_t dsp56k_op_clr(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_clr(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_LONG_WORD};
typed_pointer clear = {nullptr, DT_LONG_WORD};
- UINT64 clear_val = U64(0x0000000000000000);
+ uint64_t clear_val = U64(0x0000000000000000);
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
clear.addr = &clear_val;
clear.data_type = DT_LONG_WORD;
@@ -1333,21 +1333,21 @@ static size_t dsp56k_op_clr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* ADD : .... .... 0000 FJJJ : A-22 */
-static size_t dsp56k_op_add(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_add(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- UINT64 addVal = 0;
+ uint64_t addVal = 0;
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
decode_JJJF_table(cpustate, BITS(op_byte,0x0007),BITS(op_byte,0x0008), &S, &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
switch(S.data_type)
{
- case DT_WORD: addVal = (UINT64)*((UINT16*)S.addr) << 16; break;
- case DT_DOUBLE_WORD: addVal = (UINT64)*((UINT32*)S.addr); break;
- case DT_LONG_WORD: addVal = (UINT64)*((UINT64*)S.addr); break;
+ case DT_WORD: addVal = (uint64_t)*((uint16_t*)S.addr) << 16; break;
+ case DT_DOUBLE_WORD: addVal = (uint64_t)*((uint32_t*)S.addr); break;
+ case DT_LONG_WORD: addVal = (uint64_t)*((uint64_t*)S.addr); break;
}
/* Sign-extend word for proper add/sub op */
@@ -1355,7 +1355,7 @@ static size_t dsp56k_op_add(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
addVal |= U64(0x000000ff00000000);
/* Operate*/
- *((UINT64*)D.addr) += addVal;
+ *((uint64_t*)D.addr) += addVal;
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1363,15 +1363,15 @@ static size_t dsp56k_op_add(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * * */
/* TODO S, L, E, U, V, C */
- if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if (*((uint64_t*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
/* MOVE : .... .... 0001 0001 : A-128 */
-static size_t dsp56k_op_move(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_move(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* Equivalent to a nop with a parallel move */
/* These can't be used later. Hopefully compilers would pick this up. */
@@ -1387,14 +1387,14 @@ static size_t dsp56k_op_move(dsp56k_core* cpustate, const UINT16 op_byte, typed_
}
/* TFR : .... .... 0001 FJJJ : A-212 */
-static size_t dsp56k_op_tfr(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_tfr(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
decode_JJJF_table(cpustate, BITS(op_byte,0x0007),BITS(op_byte,0x0008), &S, &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
SetDestinationValue(S, D);
@@ -1409,19 +1409,19 @@ static size_t dsp56k_op_tfr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* RND : .... .... 0010 F000 : A-188 */
-static size_t dsp56k_op_rnd(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_rnd(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* WARNING : ROUNDING NOT FULLY IMPLEMENTED YET! */
- if ((*((UINT64*)D.addr) & U64(0x000000000000ffff)) >= 0x8000)
- *((UINT64*)D.addr) += U64(0x0000000000010000);
+ if ((*((uint64_t*)D.addr) & U64(0x000000000000ffff)) >= 0x8000)
+ *((uint64_t*)D.addr) += U64(0x0000000000010000);
- *((UINT64*)D.addr) = *((UINT64*)D.addr) & U64(0x000000ffffff0000);
+ *((uint64_t*)D.addr) = *((uint64_t*)D.addr) & U64(0x000000ffffff0000);
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1429,21 +1429,21 @@ static size_t dsp56k_op_rnd(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, U, V */
- if ((*((UINT64*)D.addr)) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ((*((uint64_t*)D.addr)) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
/* TST : .... .... 0010 F001 : A-218 */
-static size_t dsp56k_op_tst(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_tst(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_LONG_WORD};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1451,8 +1451,8 @@ static size_t dsp56k_op_tst(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* 0 * * * * * 0 0 */
/* TODO: S, L, E, U */
- if ((*((UINT64*)D.addr)) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ((*((uint64_t*)D.addr)) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
DSP56K_C_CLEAR();
@@ -1461,19 +1461,19 @@ static size_t dsp56k_op_tst(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* INC : .... .... 0010 F010 : A-104 */
-static size_t dsp56k_op_inc(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_inc(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
/* Save some data for the parallel move */
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* Make sure the destination is a real 40-bit value */
- *((UINT64*)D.addr) &= U64(0x000000ffffffffff);
+ *((uint64_t*)D.addr) &= U64(0x000000ffffffffff);
/* Increment */
- *((UINT64*)D.addr) = *((UINT64*)D.addr) + 1;
+ *((uint64_t*)D.addr) = *((uint64_t*)D.addr) + 1;
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1481,34 +1481,34 @@ static size_t dsp56k_op_inc(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * * */
/* TODO: S, L, E, U */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
+ if ( *((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
/* INC24 : .... .... 0010 F011 : A-106 */
-static size_t dsp56k_op_inc24(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_inc24(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- UINT32 workBits24;
+ uint32_t workBits24;
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
/* Save some data for the parallel move */
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* TODO: I wonder if workBits24 should be signed? */
- workBits24 = ((*((UINT64*)D.addr)) & U64(0x000000ffffff0000)) >> 16;
+ workBits24 = ((*((uint64_t*)D.addr)) & U64(0x000000ffffff0000)) >> 16;
workBits24++;
//workBits24 &= 0x00ffffff; /* Solves -x issues - TODO: huh? */
/* Set the D bits with the dec result */
- *((UINT64*)D.addr) &= U64(0x000000000000ffff);
- *((UINT64*)D.addr) |= (((UINT64)(workBits24)) << 16);
+ *((uint64_t*)D.addr) &= U64(0x000000000000ffff);
+ *((uint64_t*)D.addr) |= (((uint64_t)(workBits24)) << 16);
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1516,8 +1516,8 @@ static size_t dsp56k_op_inc24(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* S L E U N Z V C */
/* * * * * * ? * * */
/* TODO: S, L, E, U */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
if ((workBits24 & 0xff000000) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
if ((workBits24 & 0xff000000) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
@@ -1526,7 +1526,7 @@ static size_t dsp56k_op_inc24(dsp56k_core* cpustate, const UINT16 op_byte, typed
}
/* OR : .... .... 0010 F1JJ : A-176 */
-static size_t dsp56k_op_or(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_or(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
@@ -1534,10 +1534,10 @@ static size_t dsp56k_op_or(dsp56k_core* cpustate, const UINT16 op_byte, typed_po
decode_JJF_table(cpustate, BITS(op_byte,0x0003), BITS(op_byte,0x0008), &S, &D);
/* Save some data for the parallel move */
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* OR a word of S with A1|B1 */
- ((PAIR64*)D.addr)->w.h = *((UINT16*)S.addr) | ((PAIR64*)D.addr)->w.h;
+ ((PAIR64*)D.addr)->w.h = *((uint16_t*)S.addr) | ((PAIR64*)D.addr)->w.h;
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1545,8 +1545,8 @@ static size_t dsp56k_op_or(dsp56k_core* cpustate, const UINT16 op_byte, typed_po
/* S L E U N Z V C */
/* * * - - ? ? 0 - */
/* TODO: S, L */
- if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
cycles += 2; /* TODO: + mv oscillator cycles */
@@ -1554,20 +1554,20 @@ static size_t dsp56k_op_or(dsp56k_core* cpustate, const UINT16 op_byte, typed_po
}
/* ASR : .... .... 0011 F000 : A-32 */
-static size_t dsp56k_op_asr(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_asr(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
- *((UINT64*)D.addr) = (*((UINT64*)D.addr)) >> 1;
+ *((uint64_t*)D.addr) = (*((uint64_t*)D.addr)) >> 1;
/* Make sure the MSB is maintained */
if (*p_accum & U64(0x0000008000000000))
- *((UINT64*)D.addr) |= U64(0x0000008000000000);
+ *((uint64_t*)D.addr) |= U64(0x0000008000000000);
else
- *((UINT64*)D.addr) &= (~U64(0x0000008000000000));
+ *((uint64_t*)D.addr) &= (~U64(0x0000008000000000));
/* For the parallel move */
d_register->addr = D.addr;
@@ -1576,8 +1576,8 @@ static size_t dsp56k_op_asr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * 0 ? */
/* TODO: S, L, E, U */
- if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if (*((uint64_t*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
if (*p_accum & U64(0x0000000000000001)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
@@ -1586,7 +1586,7 @@ static size_t dsp56k_op_asr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* ASL : .... .... 0011 F001 : A-28 */
-static size_t dsp56k_op_asl(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_asl(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * ? ? */
@@ -1597,12 +1597,12 @@ static size_t dsp56k_op_asl(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* LSR : .... .... 0011 F010 : A-120 */
-static size_t dsp56k_op_lsr(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_lsr(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
((PAIR64*)D.addr)->w.h = (((PAIR64*)D.addr)->w.h) >> 1;
@@ -1626,7 +1626,7 @@ static size_t dsp56k_op_lsr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* LSL : .... .... 0011 F011 : A-118 */
-static size_t dsp56k_op_lsl(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_lsl(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - ? ? 0 ? */
@@ -1637,7 +1637,7 @@ static size_t dsp56k_op_lsl(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* EOR : .... .... 0011 F1JJ : A-94 */
-static size_t dsp56k_op_eor(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_eor(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - ? ? 0 - */
@@ -1647,7 +1647,7 @@ static size_t dsp56k_op_eor(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* SUBL : .... .... 0100 F001 : A-204 */
-static size_t dsp56k_op_subl(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_subl(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * ? * */
@@ -1657,9 +1657,9 @@ static size_t dsp56k_op_subl(dsp56k_core* cpustate, const UINT16 op_byte, typed_
}
/* SUB : .... .... 0100 FJJJ : A-202 */
-static size_t dsp56k_op_sub(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_sub(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- UINT64 useVal = 0;
+ uint64_t useVal = 0;
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
@@ -1668,9 +1668,9 @@ static size_t dsp56k_op_sub(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* Get on with it. */
switch(S.data_type)
{
- case DT_WORD: useVal = (UINT64)*((UINT16*)S.addr) << 16; break;
- case DT_DOUBLE_WORD: useVal = (UINT64)*((UINT32*)S.addr); break;
- case DT_LONG_WORD: useVal = (UINT64)*((UINT64*)S.addr); break;
+ case DT_WORD: useVal = (uint64_t)*((uint16_t*)S.addr) << 16; break;
+ case DT_DOUBLE_WORD: useVal = (uint64_t)*((uint32_t*)S.addr); break;
+ case DT_LONG_WORD: useVal = (uint64_t)*((uint64_t*)S.addr); break;
}
/* Sign-extend word for proper sub op */
@@ -1679,10 +1679,10 @@ static size_t dsp56k_op_sub(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* Make sure they're both real 40-bit values */
useVal &= U64(0x000000ffffffffff);
- *((UINT64*)D.addr) &= U64(0x000000ffffffffff);
+ *((uint64_t*)D.addr) &= U64(0x000000ffffffffff);
/* Operate*/
- *((UINT64*)D.addr) -= useVal;
+ *((uint64_t*)D.addr) -= useVal;
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1690,17 +1690,17 @@ static size_t dsp56k_op_sub(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * * */
/* TODO S, L, E, U */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ( *((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
+ if ( *((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((uint64_t*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
/* CLR24 : .... .... 0101 F001 : A-62 */
-static size_t dsp56k_op_clr24(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_clr24(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * ? 0 - */
@@ -1709,7 +1709,7 @@ static size_t dsp56k_op_clr24(dsp56k_core* cpustate, const UINT16 op_byte, typed
}
/* SBC : .... .... 0101 F01J : A-198 */
-static size_t dsp56k_op_sbc(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_sbc(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * * * */
@@ -1717,23 +1717,23 @@ static size_t dsp56k_op_sbc(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* CMP : .... .... 0101 FJJJ : A-64 */
-static size_t dsp56k_op_cmp(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_cmp(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- UINT64 cmpVal = 0;
- UINT64 result = 0;
+ uint64_t cmpVal = 0;
+ uint64_t result = 0;
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
decode_JJJF_table(cpustate, BITS(op_byte,0x0007),BITS(op_byte,0x0008), &S, &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
switch(S.data_type)
{
- case DT_WORD: cmpVal = (UINT64)*((UINT16*)S.addr) << 16; break;
- case DT_DOUBLE_WORD: cmpVal = (UINT64)*((UINT32*)S.addr); break;
- case DT_LONG_WORD: cmpVal = (UINT64)*((UINT64*)S.addr); break;
+ case DT_WORD: cmpVal = (uint64_t)*((uint16_t*)S.addr) << 16; break;
+ case DT_DOUBLE_WORD: cmpVal = (uint64_t)*((uint32_t*)S.addr); break;
+ case DT_LONG_WORD: cmpVal = (uint64_t)*((uint64_t*)S.addr); break;
}
/* Sign-extend word for proper subtraction op */
@@ -1742,10 +1742,10 @@ static size_t dsp56k_op_cmp(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* Make sure they're both real 40-bit values */
cmpVal &= U64(0x000000ffffffffff);
- *((UINT64*)D.addr) &= U64(0x000000ffffffffff);
+ *((uint64_t*)D.addr) &= U64(0x000000ffffffffff);
/* Operate */
- result = *((UINT64*)D.addr) - cmpVal;
+ result = *((uint64_t*)D.addr) - cmpVal;
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1764,7 +1764,7 @@ static size_t dsp56k_op_cmp(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* NEG : .... .... 0110 F000 : A-166 */
-static size_t dsp56k_op_neg(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_neg(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * * * */
@@ -1772,12 +1772,12 @@ static size_t dsp56k_op_neg(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* NOT : .... .... 0110 F001 : A-174 */
-static size_t dsp56k_op_not(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_not(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* Invert bits [16:31] of D */
((PAIR64*)D.addr)->w.h = ~(((PAIR64*)D.addr)->w.h);
@@ -1788,8 +1788,8 @@ static size_t dsp56k_op_not(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * - - ? ? 0 - */
/* TODO: S?, L */
- if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
cycles += 2; /* TODO: + mv oscillator cycles */
@@ -1797,7 +1797,7 @@ static size_t dsp56k_op_not(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* DEC : .... .... 0110 F010 : A-72 */
-static size_t dsp56k_op_dec(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_dec(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * * * */
@@ -1805,24 +1805,24 @@ static size_t dsp56k_op_dec(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* DEC24 : .... .... 0110 F011 : A-74 */
-static size_t dsp56k_op_dec24(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_dec24(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- UINT32 workBits24;
+ uint32_t workBits24;
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
/* Save some data for the parallel move */
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* TODO: I wonder if workBits24 should be signed? */
- workBits24 = ((*((UINT64*)D.addr)) & U64(0x000000ffffff0000)) >> 16;
+ workBits24 = ((*((uint64_t*)D.addr)) & U64(0x000000ffffff0000)) >> 16;
workBits24--;
workBits24 &= 0x00ffffff; /* Solves -x issues */
/* Set the D bits with the dec result */
- *((UINT64*)D.addr) &= U64(0x000000000000ffff);
- *((UINT64*)D.addr) |= (((UINT64)(workBits24)) << 16);
+ *((uint64_t*)D.addr) &= U64(0x000000000000ffff);
+ *((uint64_t*)D.addr) |= (((uint64_t)(workBits24)) << 16);
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1830,15 +1830,15 @@ static size_t dsp56k_op_dec24(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* S L E U N Z V C */
/* * * * * * ? * * */
/* TODO: S, L, E, U, V, C */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
/* AND : .... .... 0110 F1JJ : A-24 */
-static size_t dsp56k_op_and(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_and(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
@@ -1846,10 +1846,10 @@ static size_t dsp56k_op_and(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
decode_JJF_table(cpustate, BITS(op_byte,0x0003), BITS(op_byte,0x0008), &S, &D);
/* Save some data for the parallel move */
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* AND a word of S with A1|B1 */
- ((PAIR64*)D.addr)->w.h = *((UINT16*)S.addr) & ((PAIR64*)D.addr)->w.h;
+ ((PAIR64*)D.addr)->w.h = *((uint16_t*)S.addr) & ((PAIR64*)D.addr)->w.h;
d_register->addr = D.addr;
d_register->data_type = D.data_type;
@@ -1857,8 +1857,8 @@ static size_t dsp56k_op_and(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * - - ? ? 0 - */
/* TODO: S, L */
- if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
cycles += 2; /* TODO: + mv oscillator cycles */
@@ -1866,14 +1866,14 @@ static size_t dsp56k_op_and(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* ABS : .... .... 0111 F001 : A-18 */
-static size_t dsp56k_op_abs(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_abs(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- INT64 opD = 0;
+ int64_t opD = 0;
typed_pointer D = {nullptr, DT_LONG_WORD};
decode_F_table(cpustate, BITS(op_byte,0x0008), &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* Sign extend D into a temp variable */
opD = *p_accum;
@@ -1887,17 +1887,17 @@ static size_t dsp56k_op_abs(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
opD &= U64(0x000000ffffffffff);
/* Reassign */
- *((UINT64*)D.addr) = opD;
+ *((uint64_t*)D.addr) = opD;
/* Special overflow case */
if ((*p_accum) == U64(0x0000008000000000))
- *((UINT64*)D.addr) = U64(0x0000007fffffffff);
+ *((uint64_t*)D.addr) = U64(0x0000007fffffffff);
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, U */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D.addr) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D.addr) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
if ((*p_accum) == U64(0x0000008000000000)) DSP56K_V_SET(); else DSP56K_V_CLEAR();
cycles += 2; /* TODO: + mv oscillator clock cycles */
@@ -1905,7 +1905,7 @@ static size_t dsp56k_op_abs(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* ROR : .... .... 0111 F010 : A-192 */
-static size_t dsp56k_op_ror(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_ror(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - ? ? 0 ? */
@@ -1916,7 +1916,7 @@ static size_t dsp56k_op_ror(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* ROL : .... .... 0111 F011 : A-190 */
-static size_t dsp56k_op_rol(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_rol(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - ? ? 0 ? */
@@ -1927,29 +1927,29 @@ static size_t dsp56k_op_rol(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
}
/* CMPM : .... .... 0111 FJJJ : A-66 */
-static size_t dsp56k_op_cmpm(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_cmpm(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- INT64 absS;
- INT64 absD;
- INT64 absResult;
+ int64_t absS;
+ int64_t absD;
+ int64_t absResult;
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
decode_JJJF_table(cpustate, BITS(op_byte,0x0007),BITS(op_byte,0x0008), &S, &D);
- *p_accum = *((UINT64*)D.addr);
+ *p_accum = *((uint64_t*)D.addr);
/* Sign extend and get absolute value of the source */
if (S.addr == &A || S.addr == &B)
{
- absS = *((UINT64*)S.addr);
+ absS = *((uint64_t*)S.addr);
if (absS & U64(0x0000008000000000))
absS |= U64(0xffffff8000000000);
}
else
{
- absS = (*((UINT16*)S.addr)) << 16;
+ absS = (*((uint16_t*)S.addr)) << 16;
if (absS & U64(0x0000000080000000))
absS |= U64(0xffffffff80000000);
}
@@ -1958,13 +1958,13 @@ static size_t dsp56k_op_cmpm(dsp56k_core* cpustate, const UINT16 op_byte, typed_
/* Sign extend and get absolute value of the destination */
if (D.addr == &A || D.addr == &B)
{
- absD = *((UINT64*)D.addr);
+ absD = *((uint64_t*)D.addr);
if (absD & U64(0x0000008000000000))
absD |= U64(0xffffff8000000000);
}
else
{
- absD = (*((UINT16*)D.addr)) << 16;
+ absD = (*((uint16_t*)D.addr)) << 16;
if (absS & U64(0x0000000080000000))
absS |= U64(0xffffffff80000000);
}
@@ -1989,13 +1989,13 @@ static size_t dsp56k_op_cmpm(dsp56k_core* cpustate, const UINT16 op_byte, typed_
}
/* MPY : .... .... 1k00 FQQQ : A-160 -- CONFIRMED TYPO IN DOCS (HHHH vs HHHW) */
-static size_t dsp56k_op_mpy(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_mpy(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- UINT16 k = 0;
- INT64 result = 0;
+ uint16_t k = 0;
+ int64_t result = 0;
- INT32 s1 = 0;
- INT32 s2 = 0;
+ int32_t s1 = 0;
+ int32_t s2 = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -2006,8 +2006,8 @@ static size_t dsp56k_op_mpy(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
k = BITS(op_byte,0x0040);
/* Cast both values as being signed */
- s1 = *((INT16*)S1);
- s2 = *((INT16*)S2);
+ s1 = *((int16_t*)S1);
+ s2 = *((int16_t*)S2);
/* Fixed-point 2's complement multiplication requires a shift */
result = (s1 * s2) << 1;
@@ -2016,20 +2016,20 @@ static size_t dsp56k_op_mpy(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
if (k)
result *= -1;
- (*((UINT64*)D)) = result & U64(0x000000ffffffffff);
+ (*((uint64_t*)D)) = result & U64(0x000000ffffffffff);
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
/* MPYR : .... .... 1k01 FQQQ : A-162 */
-static size_t dsp56k_op_mpyr(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_mpyr(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * * * * * * - */
@@ -2037,14 +2037,14 @@ static size_t dsp56k_op_mpyr(dsp56k_core* cpustate, const UINT16 op_byte, typed_
}
/* MAC : .... .... 1k10 FQQQ : A-122 */
-static size_t dsp56k_op_mac(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_mac(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- UINT16 k = 0;
- INT64 opD = 0;
- INT64 result = 0;
+ uint16_t k = 0;
+ int64_t opD = 0;
+ int64_t result = 0;
- INT32 s1 = 0;
- INT32 s2 = 0;
+ int32_t s1 = 0;
+ int32_t s2 = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -2055,14 +2055,14 @@ static size_t dsp56k_op_mac(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
k = BITS(op_byte,0x0040);
/* Cast both values as being signed */
- s1 = *((INT16*)S1);
- s2 = *((INT16*)S2);
+ s1 = *((int16_t*)S1);
+ s2 = *((int16_t*)S2);
/* Fixed-point 2's complement multiplication requires a shift */
result = (s1 * s2) << 1;
/* Sign extend D into a temp variable */
- opD = (*((UINT64*)D));
+ opD = (*((uint64_t*)D));
if (opD & U64(0x0000008000000000))
opD |= U64(0xffffff0000000000);
else
@@ -2078,7 +2078,7 @@ static size_t dsp56k_op_mac(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* And out the bits that don't live in the register */
opD &= U64(0x000000ffffffffff);
- (*((UINT64*)D)) = (UINT64)opD;
+ (*((uint64_t*)D)) = (uint64_t)opD;
/* For the parallel move */
d_register->addr = D;
@@ -2087,22 +2087,22 @@ static size_t dsp56k_op_mac(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
/* MACR : .... .... 1k11 FQQQ : A-124 -- DRAMA - rr vs xx (805) */
-static size_t dsp56k_op_macr(dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles)
+static size_t dsp56k_op_macr(dsp56k_core* cpustate, const uint16_t op_byte, typed_pointer* d_register, uint64_t* p_accum, uint8_t* cycles)
{
- UINT16 k = 0;
- INT64 opD = 0;
- INT64 result = 0;
+ uint16_t k = 0;
+ int64_t opD = 0;
+ int64_t result = 0;
- INT32 s1 = 0;
- INT32 s2 = 0;
+ int32_t s1 = 0;
+ int32_t s2 = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -2113,14 +2113,14 @@ static size_t dsp56k_op_macr(dsp56k_core* cpustate, const UINT16 op_byte, typed_
k = BITS(op_byte,0x0040);
/* Cast both values as being signed */
- s1 = *((INT16*)S1);
- s2 = *((INT16*)S2);
+ s1 = *((int16_t*)S1);
+ s2 = *((int16_t*)S2);
/* Fixed-point 2's complement multiplication requires a shift */
result = (s1 * s2) << 1;
/* Sign extend D into a temp variable */
- opD = (*((UINT64*)D));
+ opD = (*((uint64_t*)D));
if (opD & U64(0x0000008000000000))
opD |= U64(0xffffff0000000000);
else
@@ -2144,7 +2144,7 @@ static size_t dsp56k_op_macr(dsp56k_core* cpustate, const UINT16 op_byte, typed_
opD &= U64(0x000000ffffffffff);
/* Store the result */
- (*((UINT64*)D)) = (UINT64)opD;
+ (*((uint64_t*)D)) = (uint64_t)opD;
/* For the parallel move */
d_register->addr = D;
@@ -2153,8 +2153,8 @@ static size_t dsp56k_op_macr(dsp56k_core* cpustate, const UINT16 op_byte, typed_
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
@@ -2166,7 +2166,7 @@ static size_t dsp56k_op_macr(dsp56k_core* cpustate, const UINT16 op_byte, typed_
/******************************/
/* ADC : 0001 0101 0000 F01J : A-20 */
-static size_t dsp56k_op_adc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_adc(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - * * * * * * * */
@@ -2174,9 +2174,9 @@ static size_t dsp56k_op_adc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* ANDI : 0001 1EE0 iiii iiii : A-26 */
-static size_t dsp56k_op_andi(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_andi(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT16 immediate = BITS(op,0x00ff);
+ uint16_t immediate = BITS(op,0x00ff);
/* There is not currently a good way to refer to CCR or MR. Explicitly decode here. */
switch(BITS(op,0x0600))
@@ -2190,7 +2190,7 @@ static size_t dsp56k_op_andi(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
break;
case 0x03: /* OMR */
- OMR &= (UINT8)(immediate);
+ OMR &= (uint8_t)(immediate);
break;
default:
@@ -2206,16 +2206,16 @@ static size_t dsp56k_op_andi(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* ASL4 : 0001 0101 0011 F001 : A-30 */
-static size_t dsp56k_op_asl4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_asl4(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT64 p_accum = 0;
+ uint64_t p_accum = 0;
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op,0x0008), &D);
- p_accum = *((UINT64*)D.addr);
+ p_accum = *((uint64_t*)D.addr);
- *((UINT64*)D.addr) = (*((UINT64*)D.addr)) << 4;
- *((UINT64*)D.addr) = (*((UINT64*)D.addr)) & U64(0x000000ffffffffff);
+ *((uint64_t*)D.addr) = (*((uint64_t*)D.addr)) << 4;
+ *((uint64_t*)D.addr) = (*((uint64_t*)D.addr)) & U64(0x000000ffffffffff);
/* S L E U N Z V C */
/* - ? * * * * ? ? */
@@ -2223,9 +2223,9 @@ static size_t dsp56k_op_asl4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* V - Set if an arithmetic overflow occurs in the 40 bit result. Also set if bit 35 through 39 are
not the same. */
/* C - Set if bit 36 of source operand is set. Cleared otherwise. */
- if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- if ( (*((UINT64*)D.addr) & U64(0x000000ff00000000)) != (p_accum & U64(0x000000ff00000000)) ) DSP56K_V_SET(); else DSP56K_V_CLEAR();
+ if (*((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if (*((uint64_t*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( (*((uint64_t*)D.addr) & U64(0x000000ff00000000)) != (p_accum & U64(0x000000ff00000000)) ) DSP56K_V_SET(); else DSP56K_V_CLEAR();
if (p_accum & U64(0x0000001000000000)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
cycles += 2;
@@ -2233,29 +2233,29 @@ static size_t dsp56k_op_asl4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* ASR4 : 0001 0101 0011 F000 : A-34 */
-static size_t dsp56k_op_asr4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_asr4(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT64 p_accum = 0;
+ uint64_t p_accum = 0;
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op,0x0008), &D);
- p_accum = *((UINT64*)D.addr);
+ p_accum = *((uint64_t*)D.addr);
- *((UINT64*)D.addr) = (*((UINT64*)D.addr)) >> 4;
- *((UINT64*)D.addr) = (*((UINT64*)D.addr)) & U64(0x000000ffffffffff);
+ *((uint64_t*)D.addr) = (*((uint64_t*)D.addr)) >> 4;
+ *((uint64_t*)D.addr) = (*((uint64_t*)D.addr)) & U64(0x000000ffffffffff);
/* The top 4 bits become the old bit 39 */
if (p_accum & U64(0x0000008000000000))
- *((UINT64*)D.addr) |= U64(0x000000f000000000);
+ *((uint64_t*)D.addr) |= U64(0x000000f000000000);
else
- *((UINT64*)D.addr) &= (~U64(0x000000f000000000));
+ *((uint64_t*)D.addr) &= (~U64(0x000000f000000000));
/* S L E U N Z V C */
/* - * * * * * 0 ? */
/* TODO: E, U */
/* C - Set if bit 3 of source operand is set. Cleared otherwise. */
- if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if (*((uint64_t*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
if (p_accum & U64(0x0000000000000008)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
@@ -2264,27 +2264,27 @@ static size_t dsp56k_op_asr4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* ASR16 : 0001 0101 0111 F000 : A-36 */
-static size_t dsp56k_op_asr16(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_asr16(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT64 backupVal;
+ uint64_t backupVal;
typed_pointer D = {nullptr, DT_BYTE};
decode_F_table(cpustate, BITS(op,0x0008), &D);
- backupVal = *((UINT64*)D.addr);
+ backupVal = *((uint64_t*)D.addr);
- *((UINT64*)D.addr) = *((UINT64*)D.addr) >> 16;
+ *((uint64_t*)D.addr) = *((uint64_t*)D.addr) >> 16;
if(backupVal & U64(0x0000008000000000))
- *((UINT64*)D.addr) |= U64(0x000000ffff000000);
+ *((uint64_t*)D.addr) |= U64(0x000000ffff000000);
else
- *((UINT64*)D.addr) &= U64(0x0000000000ffffff);
+ *((uint64_t*)D.addr) &= U64(0x0000000000ffffff);
/* S L E U N Z V C */
/* - * * * * * 0 ? */
/* TODO: E, U */
- if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((uint64_t*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if (*((uint64_t*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
if (backupVal & U64(0x0000000000008000)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
@@ -2297,14 +2297,14 @@ static size_t dsp56k_op_asr16(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
/* BFSET : 0001 0100 11Pp pppp BBB1 1000 iiii iiii : A-42 */
/* BFTSTH : 0001 0100 01Pp pppp BBB1 0000 iiii iiii : A-44 */
/* BFTSTL : 0001 0100 01Pp pppp BBB0 0000 iiii iiii : A-46 */
-static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
- UINT16 workAddr = 0x0000;
- UINT16 workingWord = 0x0000;
- UINT16 previousValue = 0x0000;
+ uint16_t workAddr = 0x0000;
+ uint16_t workingWord = 0x0000;
+ uint16_t previousValue = 0x0000;
typed_pointer tempTP = { nullptr, DT_BYTE };
- UINT16 iVal = op2 & 0x00ff;
+ uint16_t iVal = op2 & 0x00ff;
decode_BBB_bitmask(cpustate, BITS(op2,0xe000), &iVal);
workAddr = assemble_address_from_Pppppp_table(cpustate, BITS(op,0x0020), BITS(op,0x001f));
@@ -2360,20 +2360,20 @@ static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const UINT16 op, const UINT1
/* BFSET : 0001 0100 101- --RR BBB1 1000 iiii iiii : A-42 */
/* BFTSTH : 0001 0100 001- --RR BBB1 0000 iiii iiii : A-44 */
/* BFTSTL : 0001 0100 001- --RR BBB0 0000 iiii iiii : A-46 */
-static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
- UINT16 workAddr = 0x0000;
- UINT16 workingWord = 0x0000;
- UINT16 previousValue = 0x0000;
+ uint16_t workAddr = 0x0000;
+ uint16_t workingWord = 0x0000;
+ uint16_t previousValue = 0x0000;
typed_pointer R = { nullptr, DT_BYTE };
typed_pointer tempTP = { nullptr, DT_BYTE };
- UINT16 iVal = op2 & 0x00ff;
+ uint16_t iVal = op2 & 0x00ff;
decode_BBB_bitmask(cpustate, BITS(op2,0xe000), &iVal);
decode_RR_table(cpustate, BITS(op,0x0003), &R);
- workAddr = *((UINT16*)R.addr);
+ workAddr = *((uint16_t*)R.addr);
previousValue = cpustate->data->read_word(ADDRESS(workAddr));
workingWord = previousValue;
@@ -2426,12 +2426,12 @@ static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const UINT16 op, const UIN
/* BFSET : 0001 0100 100D DDDD BBB1 1000 iiii iiii : A-42 */
/* BFTSTH : 0001 0100 000D DDDD BBB1 0000 iiii iiii : A-44 */
/* BFTSTL : 0001 0100 000D DDDD BBB0 0000 iiii iiii : A-46 */
-static size_t dsp56k_op_bfop_2(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_bfop_2(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
- UINT16 workingWord = 0x0000;
- UINT16 previousValue = 0x0000;
+ uint16_t workingWord = 0x0000;
+ uint16_t previousValue = 0x0000;
- UINT16 iVal = op2 & 0x00ff;
+ uint16_t iVal = op2 & 0x00ff;
typed_pointer S = { nullptr, DT_BYTE };
decode_BBB_bitmask(cpustate, BITS(op2,0xe000), &iVal);
@@ -2441,7 +2441,7 @@ static size_t dsp56k_op_bfop_2(dsp56k_core* cpustate, const UINT16 op, const UIN
if (S.data_type == DT_LONG_WORD)
previousValue = ((PAIR64*)S.addr)->w.h;
else
- previousValue = *((UINT16*)S.addr);
+ previousValue = *((uint16_t*)S.addr);
workingWord = previousValue;
@@ -2468,7 +2468,7 @@ static size_t dsp56k_op_bfop_2(dsp56k_core* cpustate, const UINT16 op, const UIN
if (S.data_type == DT_LONG_WORD)
((PAIR64*)S.addr)->w.h = workingWord;
else
- *((UINT16*)S.addr) = workingWord;
+ *((uint16_t*)S.addr) = workingWord;
/* S L E U N Z V C */
/* - * - - - - - ? */
@@ -2492,13 +2492,13 @@ static size_t dsp56k_op_bfop_2(dsp56k_core* cpustate, const UINT16 op, const UIN
}
/* Bcc : 0000 0111 --11 cccc xxxx xxxx xxxx xxxx : A-48 */
-static size_t dsp56k_op_bcc(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_bcc(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
int shouldBranch = decode_cccc_table(cpustate, BITS(op,0x000f));
if (shouldBranch)
{
- INT16 offset = (INT16)op2;
+ int16_t offset = (int16_t)op2;
PC += offset + 2;
@@ -2517,13 +2517,13 @@ static size_t dsp56k_op_bcc(dsp56k_core* cpustate, const UINT16 op, const UINT16
}
/* Bcc : 0010 11cc ccee eeee : A-48 */
-static size_t dsp56k_op_bcc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_bcc_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
int shouldBranch = decode_cccc_table(cpustate, BITS(op,0x03c0));
if (shouldBranch)
{
- INT16 offset = (INT16)assemble_address_from_6bit_signed_relative_short_address(cpustate, BITS(op,0x003f));
+ int16_t offset = (int16_t)assemble_address_from_6bit_signed_relative_short_address(cpustate, BITS(op,0x003f));
PC += offset + 1;
@@ -2542,7 +2542,7 @@ static size_t dsp56k_op_bcc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* Bcc : 0000 0111 RR10 cccc : A-48 */
-static size_t dsp56k_op_bcc_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_bcc_2(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2550,7 +2550,7 @@ static size_t dsp56k_op_bcc_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* BRA : 0000 0001 0011 11-- xxxx xxxx xxxx xxxx : A-50 */
-static size_t dsp56k_op_bra(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_bra(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2558,10 +2558,10 @@ static size_t dsp56k_op_bra(dsp56k_core* cpustate, const UINT16 op, const UINT16
}
/* BRA : 0000 1011 aaaa aaaa : A-50 */
-static size_t dsp56k_op_bra_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_bra_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* 8 bit immediate, relative offset */
- INT8 branchOffset = (INT8)BITS(op,0x00ff);
+ int8_t branchOffset = (int8_t)BITS(op,0x00ff);
/* "The PC Contains the address of the next instruction" */
PC += 1;
@@ -2576,7 +2576,7 @@ static size_t dsp56k_op_bra_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* BRA : 0000 0001 0010 11RR : A-50 */
-static size_t dsp56k_op_bra_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_bra_2(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2584,7 +2584,7 @@ static size_t dsp56k_op_bra_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* BRKcc : 0000 0001 0001 cccc : A-52 */
-static size_t dsp56k_op_brkcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_brkcc(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
int shouldBreak = decode_cccc_table(cpustate, BITS(op,0x000f));
@@ -2615,7 +2615,7 @@ static size_t dsp56k_op_brkcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* BScc : 0000 0111 --01 cccc xxxx xxxx xxxx xxxx : A-54 */
-static size_t dsp56k_op_bscc(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_bscc(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
int shouldBranch = decode_cccc_table(cpustate, BITS(op,0x000f));
@@ -2630,7 +2630,7 @@ static size_t dsp56k_op_bscc(dsp56k_core* cpustate, const UINT16 op, const UINT1
SSL = SR;
/* Change */
- PC = PC + (INT16)op2;
+ PC = PC + (int16_t)op2;
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2645,7 +2645,7 @@ static size_t dsp56k_op_bscc(dsp56k_core* cpustate, const UINT16 op, const UINT1
}
/* BScc : 0000 0111 RR00 cccc : A-54 */
-static size_t dsp56k_op_bscc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_bscc_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2653,7 +2653,7 @@ static size_t dsp56k_op_bscc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cy
}
/* BSR : 0000 0001 0011 10-- xxxx xxxx xxxx xxxx : A-56 */
-static size_t dsp56k_op_bsr(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_bsr(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
/* The PC Contains the address of the next instruction */
PC += 2;
@@ -2664,7 +2664,7 @@ static size_t dsp56k_op_bsr(dsp56k_core* cpustate, const UINT16 op, const UINT16
SSL = SR;
/* Change */
- PC = PC + (INT16)op2;
+ PC = PC + (int16_t)op2;
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2673,7 +2673,7 @@ static size_t dsp56k_op_bsr(dsp56k_core* cpustate, const UINT16 op, const UINT16
}
/* BSR : 0000 0001 0010 10RR : A-56 */
-static size_t dsp56k_op_bsr_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_bsr_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2681,7 +2681,7 @@ static size_t dsp56k_op_bsr_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* CHKAAU : 0000 0000 0000 0100 : A-58 */
-static size_t dsp56k_op_chkaau(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_chkaau(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - ? ? ? - */
@@ -2695,7 +2695,7 @@ static size_t dsp56k_op_chkaau(dsp56k_core* cpustate, const UINT16 op, UINT8* cy
}
/* DEBUG : 0000 0000 0000 0001 : A-68 */
-static size_t dsp56k_op_debug(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_debug(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2703,7 +2703,7 @@ static size_t dsp56k_op_debug(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* DEBUGcc : 0000 0000 0101 cccc : A-70 */
-static size_t dsp56k_op_debugcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_debugcc(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2712,7 +2712,7 @@ static size_t dsp56k_op_debugcc(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* DIV : 0001 0101 0--0 F1DD : A-76 */
/* WARNING : DOCS SAY THERE IS A PARALLEL MOVE HERE !!! */
-static size_t dsp56k_op_div(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_div(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* WARNING : THIS DOES NOT WORK. IT DOESN'T EVEN TRY !!! */
typed_pointer S = {nullptr, DT_BYTE};
@@ -2730,10 +2730,10 @@ static size_t dsp56k_op_div(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* DMAC : 0001 0101 10s1 FsQQ : A-80 */
-static size_t dsp56k_op_dmac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_dmac(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT8 ss = 0;
- INT64 result = 0;
+ uint8_t ss = 0;
+ int64_t result = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -2747,42 +2747,42 @@ static size_t dsp56k_op_dmac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
if (ss == 0x00 || ss == 0x01)
{
/* Signed * Signed */
- INT32 s1 = ((INT32)(*((UINT16*)S1)));
- INT32 s2 = ((INT32)(*((UINT16*)S2)));
+ int32_t s1 = ((int32_t)(*((uint16_t*)S1)));
+ int32_t s2 = ((int32_t)(*((uint16_t*)S2)));
result = ( s1 * s2 ) << 1;
}
else if (ss == 0x2)
{
/* Signed * Unsigned */
/* WARNING : THERE IS A HUGE CHANCE THIS DOESN'T WORK RIGHT */
- INT32 s1 = ((INT32)(*((UINT16*)S1)));
- INT32 s2 = (UINT32)(*((UINT16*)S2));
+ int32_t s1 = ((int32_t)(*((uint16_t*)S1)));
+ int32_t s2 = (uint32_t)(*((uint16_t*)S2));
result = ( s1 * s2 ) << 1;
}
else if (ss == 0x3)
{
/* Unsigned * Unsigned */
- UINT32 s1 = (UINT32)(*((UINT16*)S1));
- UINT32 s2 = (UINT32)(*((UINT16*)S2));
+ uint32_t s1 = (uint32_t)(*((uint16_t*)S1));
+ uint32_t s2 = (uint32_t)(*((uint16_t*)S2));
result = ( s1 * s2 ) << 1;
}
/* Shift right, then accumulate */
- (*((UINT64*)D)) = (*((UINT64*)D)) >> 16;
- (*((UINT64*)D)) += result;
+ (*((uint64_t*)D)) = (*((uint64_t*)D)) >> 16;
+ (*((uint64_t*)D)) += result;
/* S L E U N Z V C */
/* - * * * * * * - */
/* TODO: L, E, U, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2;
return 1;
}
/* DO : 0000 0000 110- --RR xxxx xxxx xxxx xxxx : A-82 */
-static size_t dsp56k_op_do(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_do(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - * - - - - - - */
@@ -2790,10 +2790,10 @@ static size_t dsp56k_op_do(dsp56k_core* cpustate, const UINT16 op, const UINT16
}
/* DO : 0000 1110 iiii iiii xxxx xxxx xxxx xxxx : A-82 */
-static size_t dsp56k_op_do_1(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_do_1(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
- UINT8 retSize = 0;
- UINT8 iValue = BITS(op,0x00ff);
+ uint8_t retSize = 0;
+ uint8_t iValue = BITS(op,0x00ff);
/* Don't execute if the loop counter == 0 */
if (iValue != 0x00)
@@ -2802,7 +2802,7 @@ static size_t dsp56k_op_do_1(dsp56k_core* cpustate, const UINT16 op, const UINT1
SP++; /* TODO: Should i really inc here first? */
SSH = LA;
SSL = LC;
- LC = (UINT16)iValue;
+ LC = (uint16_t)iValue;
/* Second instruction cycle */
@@ -2839,18 +2839,18 @@ static size_t dsp56k_op_do_1(dsp56k_core* cpustate, const UINT16 op, const UINT1
}
/* DO : 0000 0100 000D DDDD xxxx xxxx xxxx xxxx : A-82 */
-static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
- UINT8 retSize = 0;
- UINT16 lValue = 0x0000;
+ uint8_t retSize = 0;
+ uint16_t lValue = 0x0000;
typed_pointer S = {nullptr, DT_BYTE};
decode_DDDDD_table(cpustate, BITS(op,0x001f), &S);
/* TODO: Does not properly shift-limit sources A&B - Fix per the docs. */
/* TODO: There are other cases besides A&B this code won't work. */
- if (S.addr == &A) lValue = *((UINT16*)(&A1));
- else if (S.addr == &B) lValue = *((UINT16*)(&B1));
- else lValue = *((UINT16*)S.addr);
+ if (S.addr == &A) lValue = *((uint16_t*)(&A1));
+ else if (S.addr == &B) lValue = *((uint16_t*)(&B1));
+ else lValue = *((uint16_t*)S.addr);
/* HACK */
if (lValue >= 0xfff0)
@@ -2874,7 +2874,7 @@ static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT1
SP++; /* TODO: Should i really inc here first? */
SSH = LA;
SSL = LC;
- LC = (UINT16)lValue;
+ LC = (uint16_t)lValue;
/* Second instruction cycle */
@@ -2908,7 +2908,7 @@ static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT1
}
/* DO FOREVER : 0000 0000 0000 0010 xxxx xxxx xxxx xxxx : A-88 */
-static size_t dsp56k_op_doforever(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_doforever(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
/* First instruction cycle */
SP++;
@@ -2932,7 +2932,7 @@ static size_t dsp56k_op_doforever(dsp56k_core* cpustate, const UINT16 op, const
}
/* ENDDO : 0000 0000 0000 1001 : A-92 */
-static size_t dsp56k_op_enddo(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_enddo(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2940,7 +2940,7 @@ static size_t dsp56k_op_enddo(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* EXT : 0001 0101 0101 F010 : A-96 */
-static size_t dsp56k_op_ext(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_ext(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - * * * * * * - */
@@ -2948,7 +2948,7 @@ static size_t dsp56k_op_ext(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* ILLEGAL : 0000 0000 0000 1111 : A-98 */
-static size_t dsp56k_op_illegal(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_illegal(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -2956,13 +2956,13 @@ static size_t dsp56k_op_illegal(dsp56k_core* cpustate, const UINT16 op, UINT8* c
}
/* IMAC : 0001 0101 1010 FQQQ : A-100 */
-static size_t dsp56k_op_imac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_imac(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- INT64 opD = 0;
- INT64 result = 0;
+ int64_t opD = 0;
+ int64_t result = 0;
- INT32 s1 = 0;
- INT32 s2 = 0;
+ int32_t s1 = 0;
+ int32_t s2 = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -2971,8 +2971,8 @@ static size_t dsp56k_op_imac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
decode_QQQF_table(cpustate, BITS(op,0x0007), BITS(op,0x0008), &S1, &S2, &D);
/* Cast both values as being signed */
- s1 = *((INT16*)S1);
- s2 = *((INT16*)S2);
+ s1 = *((int16_t*)S1);
+ s2 = *((int16_t*)S2);
/* Integral multiply doesn't require the shift */
result = (s1 * s2);
@@ -2981,7 +2981,7 @@ static size_t dsp56k_op_imac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
result = (result << 16) & 0xffff0000;
/* Sign extend D into a temp variable */
- opD = (*((UINT64*)D));
+ opD = (*((uint64_t*)D));
if (opD & U64(0x0000008000000000))
opD |= U64(0xffffff0000000000);
else
@@ -2993,14 +2993,14 @@ static size_t dsp56k_op_imac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* And out the bits that don't live in the register */
opD &= U64(0x000000ffffffffff);
- (*((UINT64*)D)) = (UINT64)opD;
+ (*((uint64_t*)D)) = (uint64_t)opD;
/* S L E U N Z V C */
/* - * ? ? * ? ? - */
/* TODO: L */
/* U,E - Will not be set correctly by this instruction*/
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
cycles += 2;
@@ -3008,7 +3008,7 @@ static size_t dsp56k_op_imac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* IMPY : 0001 0101 1000 FQQQ : A-102 */
-static size_t dsp56k_op_impy(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_impy(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - * ? ? * ? ? - */
@@ -3019,7 +3019,7 @@ static size_t dsp56k_op_impy(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* Jcc : 0000 0110 --11 cccc xxxx xxxx xxxx xxxx : A-108 */
-static size_t dsp56k_op_jcc(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_jcc(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3027,7 +3027,7 @@ static size_t dsp56k_op_jcc(dsp56k_core* cpustate, const UINT16 op, const UINT16
}
/* Jcc : 0000 0110 RR10 cccc : A-108 */
-static size_t dsp56k_op_jcc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_jcc_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3035,7 +3035,7 @@ static size_t dsp56k_op_jcc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* JMP : 0000 0001 0011 01-- xxxx xxxx xxxx xxxx : A-110 */
-static size_t dsp56k_op_jmp(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_jmp(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
PC = op2;
@@ -3047,12 +3047,12 @@ static size_t dsp56k_op_jmp(dsp56k_core* cpustate, const UINT16 op, const UINT16
}
/* JMP : 0000 0001 0010 01RR : A-110 */
-static size_t dsp56k_op_jmp_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_jmp_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
typed_pointer R = { nullptr, DT_BYTE };
decode_RR_table(cpustate, BITS(op,0x0003), &R);
- PC = *((UINT16*)R.addr);
+ PC = *((uint16_t*)R.addr);
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3062,14 +3062,14 @@ static size_t dsp56k_op_jmp_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* JScc : 0000 0110 --01 cccc xxxx xxxx xxxx xxxx : A-112 */
-static size_t dsp56k_op_jscc(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_jscc(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
int shouldJump = decode_cccc_table(cpustate, BITS(op,0x000f));
if(shouldJump)
{
/* TODO: It says "signed" absolute offset. Weird. */
- UINT16 branchOffset = op2;
+ uint16_t branchOffset = op2;
/* TODO: Verify, since it's not in the docs, but it must be true */
PC += 2;
@@ -3095,7 +3095,7 @@ static size_t dsp56k_op_jscc(dsp56k_core* cpustate, const UINT16 op, const UINT1
}
/* JScc : 0000 0110 RR00 cccc : A-112 */
-static size_t dsp56k_op_jscc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_jscc_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3103,10 +3103,10 @@ static size_t dsp56k_op_jscc_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cy
}
/* JSR : 0000 0001 0011 00-- xxxx xxxx xxxx xxxx : A-114 */
-static size_t dsp56k_op_jsr(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_jsr(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
/* TODO: It says "signed" absolute offset. Weird. */
- UINT16 branchOffset = op2;
+ uint16_t branchOffset = op2;
/* TODO: Verify, since it's not in the docs, but it must be true */
PC += 2;
@@ -3138,7 +3138,7 @@ static size_t dsp56k_op_jsr(dsp56k_core* cpustate, const UINT16 op, const UINT16
}
/* JSR : 0000 1010 AAAA AAAA : A-114 */
-static size_t dsp56k_op_jsr_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_jsr_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3146,7 +3146,7 @@ static size_t dsp56k_op_jsr_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* JSR : 0000 0001 0010 00RR : A-114 */
-static size_t dsp56k_op_jsr_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_jsr_2(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3154,11 +3154,11 @@ static size_t dsp56k_op_jsr_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* LEA : 0000 0001 11TT MMRR : A-116 */
-static size_t dsp56k_op_lea(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_lea(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT16 ea = 0;
- UINT16 *rX = nullptr;
- UINT16 *nX = nullptr;
+ uint16_t ea = 0;
+ uint16_t *rX = nullptr;
+ uint16_t *nX = nullptr;
typed_pointer D = {nullptr, DT_BYTE};
decode_TT_table(cpustate, BITS(op,0x0030), &D);
@@ -3182,7 +3182,7 @@ static size_t dsp56k_op_lea(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
case 0x3: ea = *rX + *nX; break;
}
- *((UINT16*)D.addr) = ea;
+ *((uint16_t*)D.addr) = ea;
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3190,7 +3190,7 @@ static size_t dsp56k_op_lea(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* LEA : 0000 0001 10NN MMRR : A-116 */
-static size_t dsp56k_op_lea_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_lea_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3198,10 +3198,10 @@ static size_t dsp56k_op_lea_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* MAC(su,uu) : 0001 0101 1110 FsQQ : A-126 */
-static size_t dsp56k_op_macsuuu(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_macsuuu(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT8 s = 0;
- INT64 result = 0;
+ uint8_t s = 0;
+ int64_t result = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -3215,36 +3215,36 @@ static size_t dsp56k_op_macsuuu(dsp56k_core* cpustate, const UINT16 op, UINT8* c
if (s)
{
/* Unsigned * Unsigned */
- UINT32 s1 = (UINT32)(*((UINT16*)S1));
- UINT32 s2 = (UINT32)(*((UINT16*)S2));
+ uint32_t s1 = (uint32_t)(*((uint16_t*)S1));
+ uint32_t s2 = (uint32_t)(*((uint16_t*)S2));
result = ( s1 * s2 ) << 1;
}
else
{
/* Signed * Unsigned */
/* WARNING : THERE IS A HUGE CHANCE THIS DOESN'T WORK RIGHT */
- INT32 s1 = ((INT32)(*((UINT16*)S1)));
- INT32 s2 = (UINT32)(*((UINT16*)S2));
+ int32_t s1 = ((int32_t)(*((uint16_t*)S1)));
+ int32_t s2 = (uint32_t)(*((uint16_t*)S2));
result = ( s1 * s2 ) << 1;
}
- (*((UINT64*)D)) += result;
+ (*((uint64_t*)D)) += result;
/* And out the bits that don't live in the register */
- (*((UINT64*)D)) &= U64(0x000000ffffffffff);
+ (*((uint64_t*)D)) &= U64(0x000000ffffffffff);
/* S L E U N Z V C */
/* - * * * * * * - */
/* TODO: L, E, U, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2;
return 1;
}
/* MOVE : 0000 0101 BBBB BBBB ---- HHHW 0001 0001 : A-128 */
-static size_t dsp56k_op_move_2(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_move_2(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - - - - - */
@@ -3252,9 +3252,9 @@ static size_t dsp56k_op_move_2(dsp56k_core* cpustate, const UINT16 op, const UIN
}
/* MOVE(C) : 0011 1WDD DDD0 MMRR : A-144 */
-static size_t dsp56k_op_movec(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movec(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT8 W;
+ uint8_t W;
typed_pointer R = { nullptr, DT_BYTE };
typed_pointer SD = { nullptr, DT_BYTE };
@@ -3265,14 +3265,14 @@ static size_t dsp56k_op_movec(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
if (W)
{
/* Write D */
- UINT16 value = cpustate->data->read_word(ADDRESS(*((UINT16*)R.addr))) ;
+ uint16_t value = cpustate->data->read_word(ADDRESS(*((uint16_t*)R.addr))) ;
typed_pointer temp_src = { &value, DT_WORD };
SetDestinationValue(temp_src, SD);
}
else
{
/* Read S */
- UINT16 dataMemOffset = *((UINT16*)R.addr);
+ uint16_t dataMemOffset = *((uint16_t*)R.addr);
SetDataMemoryValue(cpustate, SD, ADDRESS(dataMemOffset));
}
@@ -3294,10 +3294,10 @@ static size_t dsp56k_op_movec(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* MOVE(C) : 0011 1WDD DDD1 q0RR : A-144 */
-static size_t dsp56k_op_movec_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movec_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT8 W;
- UINT16 memOffset;
+ uint8_t W;
+ uint16_t memOffset;
typed_pointer SD = {nullptr, DT_BYTE};
W = BITS(op,0x0400);
@@ -3307,14 +3307,14 @@ static size_t dsp56k_op_movec_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
if (W)
{
/* Write D */
- UINT16 tempData = cpustate->data->read_word(ADDRESS(memOffset));
+ uint16_t tempData = cpustate->data->read_word(ADDRESS(memOffset));
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDestinationValue(temp_src, SD);
}
else
{
/* Read S */
- UINT16 tempData = *((UINT16*)SD.addr);
+ uint16_t tempData = *((uint16_t*)SD.addr);
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDataMemoryValue(cpustate, temp_src, ADDRESS(memOffset));
}
@@ -3335,10 +3335,10 @@ static size_t dsp56k_op_movec_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
}
/* MOVE(C) : 0011 1WDD DDD1 Z11- : A-144 */
-static size_t dsp56k_op_movec_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movec_2(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT8 W;
- UINT16 memOffset;
+ uint8_t W;
+ uint16_t memOffset;
typed_pointer SD = {nullptr, DT_BYTE};
typed_pointer XMemOffset = {nullptr, DT_BYTE};
@@ -3346,19 +3346,19 @@ static size_t dsp56k_op_movec_2(dsp56k_core* cpustate, const UINT16 op, UINT8* c
decode_Z_table(cpustate, BITS(op,0x0008), &XMemOffset);
decode_DDDDD_table(cpustate, BITS(op,0x03e0), &SD);
- memOffset = *((UINT16*)XMemOffset.addr);
+ memOffset = *((uint16_t*)XMemOffset.addr);
if (W)
{
/* Write D */
- UINT16 tempData = cpustate->data->read_word(ADDRESS(memOffset));
+ uint16_t tempData = cpustate->data->read_word(ADDRESS(memOffset));
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDestinationValue(temp_src, SD);
}
else
{
/* Read S */
- UINT16 tempData = *((UINT16*)SD.addr);
+ uint16_t tempData = *((uint16_t*)SD.addr);
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDataMemoryValue(cpustate, temp_src, ADDRESS(memOffset));
}
@@ -3380,10 +3380,10 @@ static size_t dsp56k_op_movec_2(dsp56k_core* cpustate, const UINT16 op, UINT8* c
}
/* MOVE(C) : 0011 1WDD DDD1 t10- xxxx xxxx xxxx xxxx : A-144 */
-static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
- UINT8 W;
- UINT8 t;
+ uint8_t W;
+ uint8_t t;
typed_pointer SD = { nullptr, DT_BYTE };
W = BITS(op,0x0400);
@@ -3402,7 +3402,7 @@ static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const UINT16 op, const UI
else
{
/* 16-bit long address */
- UINT16 tempD = cpustate->data->read_word(ADDRESS(op2));
+ uint16_t tempD = cpustate->data->read_word(ADDRESS(op2));
typed_pointer tempTP = {&tempD, DT_WORD};
SetDestinationValue(tempTP, SD);
}
@@ -3438,7 +3438,7 @@ static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const UINT16 op, const UI
}
/* MOVE(C) : 0010 10dd dddD DDDD : A-144 */
-static size_t dsp56k_op_movec_4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movec_4(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
@@ -3464,30 +3464,30 @@ static size_t dsp56k_op_movec_4(dsp56k_core* cpustate, const UINT16 op, UINT8* c
}
/* MOVE(C) : 0000 0101 BBBB BBBB 0011 1WDD DDD0 ---- : A-144 */
-static size_t dsp56k_op_movec_5(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_movec_5(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
- INT8 xx;
- UINT8 W;
- UINT16 memOffset;
+ int8_t xx;
+ uint8_t W;
+ uint16_t memOffset;
typed_pointer SD = { nullptr, DT_BYTE };
- xx = (INT8)(op & 0x00ff);
+ xx = (int8_t)(op & 0x00ff);
W = BITS(op2,0x0400);
decode_DDDDD_table(cpustate, BITS(op2,0x03e0), &SD);
- memOffset = R2 + (INT16)xx;
+ memOffset = R2 + (int16_t)xx;
if (W)
{
/* Write D */
- UINT16 tempData = cpustate->data->read_word(ADDRESS(memOffset));
+ uint16_t tempData = cpustate->data->read_word(ADDRESS(memOffset));
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDestinationValue(temp_src, SD);
}
else
{
/* Read S */
- UINT16 tempData = *((UINT16*)SD.addr);
+ uint16_t tempData = *((uint16_t*)SD.addr);
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDataMemoryValue(cpustate, temp_src, ADDRESS(memOffset));
}
@@ -3508,13 +3508,13 @@ static size_t dsp56k_op_movec_5(dsp56k_core* cpustate, const UINT16 op, const UI
}
/* MOVE(I) : 0010 00DD BBBB BBBB : A-150 */
-static size_t dsp56k_op_movei(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movei(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_BYTE};
typed_pointer immTP = {nullptr, DT_BYTE};
- /* Typecasting to INT16 sign-extends the BBBBBBBB operand */
- UINT16 immediateSignExtended = (INT16)(op & 0x00ff);
+ /* Typecasting to int16_t sign-extends the BBBBBBBB operand */
+ uint16_t immediateSignExtended = (int16_t)(op & 0x00ff);
immTP.addr = &immediateSignExtended;
immTP.data_type = DT_WORD;
@@ -3529,9 +3529,9 @@ static size_t dsp56k_op_movei(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* MOVE(M) : 0000 001W RR0M MHHH : A-152 */
-static size_t dsp56k_op_movem(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movem(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT8 W;
+ uint8_t W;
typed_pointer R = { nullptr, DT_BYTE };
typed_pointer SD = { nullptr, DT_BYTE };
@@ -3543,7 +3543,7 @@ static size_t dsp56k_op_movem(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
{
/* Read from Program Memory */
typed_pointer data;
- UINT16 ldata = cpustate->program->read_word(ADDRESS(*((UINT16*)R.addr)));
+ uint16_t ldata = cpustate->program->read_word(ADDRESS(*((uint16_t*)R.addr)));
data.addr = &ldata;
data.data_type = DT_WORD;
@@ -3552,7 +3552,7 @@ static size_t dsp56k_op_movem(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
else
{
/* Write to Program Memory */
- SetProgramMemoryValue(cpustate, SD, ADDRESS(*((UINT16*)R.addr))) ;
+ SetProgramMemoryValue(cpustate, SD, ADDRESS(*((uint16_t*)R.addr))) ;
}
execute_MM_table(cpustate, BITS(op,0x00c0), BITS(op,0x0018));
@@ -3565,7 +3565,7 @@ static size_t dsp56k_op_movem(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* MOVE(M) : 0000 001W RR11 mmRR : A-152 */
-static size_t dsp56k_op_movem_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movem_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - - - - - */
@@ -3573,7 +3573,7 @@ static size_t dsp56k_op_movem_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
}
/* MOVE(M) : 0000 0101 BBBB BBBB 0000 001W --0- -HHH : A-152 */
-static size_t dsp56k_op_movem_2(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles)
+static size_t dsp56k_op_movem_2(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - - - - - */
@@ -3581,10 +3581,10 @@ static size_t dsp56k_op_movem_2(dsp56k_core* cpustate, const UINT16 op, const UI
}
/* MOVE(P) : 0001 100W HH1p pppp : A-156 */
-static size_t dsp56k_op_movep(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movep(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT16 W;
- UINT16 pp;
+ uint16_t W;
+ uint16_t pp;
typed_pointer SD = {nullptr, DT_BYTE};
decode_HH_table(cpustate, BITS(op,0x00c0), &SD);
@@ -3597,7 +3597,7 @@ static size_t dsp56k_op_movep(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
if (W)
{
- UINT16 data = cpustate->data->read_word(ADDRESS(pp));
+ uint16_t data = cpustate->data->read_word(ADDRESS(pp));
typed_pointer tempTP;
tempTP.addr = &data;
@@ -3619,11 +3619,11 @@ static size_t dsp56k_op_movep(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* MOVE(P) : 0000 110W RRmp pppp : A-156 */
-static size_t dsp56k_op_movep_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_movep_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* X:<Rx> and X:<pp> */
- UINT16 W;
- UINT16 pp;
+ uint16_t W;
+ uint16_t pp;
typed_pointer SD = {nullptr, DT_BYTE};
decode_RR_table(cpustate, BITS(op,0x00c0), &SD);
@@ -3636,7 +3636,7 @@ static size_t dsp56k_op_movep_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* A little different than most W if's - opposite read and write */
if (W)
{
- UINT16 data = cpustate->data->read_word(ADDRESS(*((UINT16*)SD.addr)));
+ uint16_t data = cpustate->data->read_word(ADDRESS(*((uint16_t*)SD.addr)));
typed_pointer tempTP;
tempTP.addr = &data;
@@ -3661,7 +3661,7 @@ static size_t dsp56k_op_movep_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
}
/* MOVE(S) : 0001 100W HH0a aaaa : A-158 */
-static size_t dsp56k_op_moves(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_moves(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - - - - - */
@@ -3669,10 +3669,10 @@ static size_t dsp56k_op_moves(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* MPY(su,uu) : 0001 0101 1100 FsQQ : A-164 */
-static size_t dsp56k_op_mpysuuu(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_mpysuuu(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
- UINT8 s = 0;
- INT64 result = 0;
+ uint8_t s = 0;
+ int64_t result = 0;
void* D = nullptr;
void* S1 = nullptr;
@@ -3686,36 +3686,36 @@ static size_t dsp56k_op_mpysuuu(dsp56k_core* cpustate, const UINT16 op, UINT8* c
if (s)
{
/* Unsigned * Unsigned */
- UINT32 s1 = (UINT32)(*((UINT16*)S1));
- UINT32 s2 = (UINT32)(*((UINT16*)S2));
+ uint32_t s1 = (uint32_t)(*((uint16_t*)S1));
+ uint32_t s2 = (uint32_t)(*((uint16_t*)S2));
result = ( s1 * s2 ) << 1;
}
else
{
/* Signed * Unsigned */
/* WARNING : THERE IS A HUGE CHANCE THIS DOESN'T WORK RIGHT */
- INT32 s1 = ((INT32)(*((UINT16*)S1)));
- INT32 s2 = (UINT32)(*((UINT16*)S2));
+ int32_t s1 = ((int32_t)(*((uint16_t*)S1)));
+ int32_t s2 = (uint32_t)(*((uint16_t*)S2));
result = ( s1 * s2 ) << 1;
}
- (*((UINT64*)D)) = result;
+ (*((uint64_t*)D)) = result;
/* And out the bits that don't live in the register */
- (*((UINT64*)D)) &= U64(0x000000ffffffffff);
+ (*((uint64_t*)D)) &= U64(0x000000ffffffffff);
/* S L E U N Z V C */
/* - * * * * * * - */
/* TODO: L, E, U, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((uint64_t*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint64_t*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2;
return 1;
}
/* NEGC : 0001 0101 0110 F000 : A-168 */
-static size_t dsp56k_op_negc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_negc(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - * * * * * * * */
@@ -3723,7 +3723,7 @@ static size_t dsp56k_op_negc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* NOP : 0000 0000 0000 0000 : A-170 */
-static size_t dsp56k_op_nop(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_nop(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3731,7 +3731,7 @@ static size_t dsp56k_op_nop(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* NORM : 0001 0101 0010 F0RR : A-172 */
-static size_t dsp56k_op_norm(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_norm(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - * * * * * ? - */
@@ -3741,7 +3741,7 @@ static size_t dsp56k_op_norm(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* ORI : 0001 1EE1 iiii iiii : A-178 */
-static size_t dsp56k_op_ori(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_ori(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - ? ? ? ? ? ? ? */
@@ -3751,7 +3751,7 @@ static size_t dsp56k_op_ori(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* REP : 0000 0000 111- --RR : A-180 */
-static size_t dsp56k_op_rep(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_rep(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - * - - - - - - */
@@ -3759,10 +3759,10 @@ static size_t dsp56k_op_rep(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* REP : 0000 1111 iiii iiii : A-180 */
-static size_t dsp56k_op_rep_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_rep_1(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* TODO: This is non-interruptable, probably have to turn off interrupts here */
- UINT16 iVal = op & 0x00ff;
+ uint16_t iVal = op & 0x00ff;
if (iVal != 0)
{
@@ -3787,10 +3787,10 @@ static size_t dsp56k_op_rep_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* REP : 0000 0100 001D DDDD : A-180 */
-static size_t dsp56k_op_rep_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_rep_2(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* TODO: This is non-interruptable, probably have to turn off interrupts here */
- UINT16 repValue;
+ uint16_t repValue;
typed_pointer D = {nullptr, DT_BYTE};
decode_DDDDD_table(cpustate, BITS(op,0x001f), &D);
@@ -3798,7 +3798,7 @@ static size_t dsp56k_op_rep_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
if (D.addr == &A || D.addr == &B)
cpustate->device->logerror("DSP56k ERROR : Rep with A or B instruction not implemented yet!\n");
- repValue = *((UINT16*)D.addr);
+ repValue = *((uint16_t*)D.addr);
if (repValue != 0)
{
@@ -3822,7 +3822,7 @@ static size_t dsp56k_op_rep_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* REPcc : 0000 0001 0101 cccc : A-184 */
-static size_t dsp56k_op_repcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_repcc(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3830,7 +3830,7 @@ static size_t dsp56k_op_repcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* RESET : 0000 0000 0000 1000 : A-186 */
-static size_t dsp56k_op_reset(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_reset(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3838,7 +3838,7 @@ static size_t dsp56k_op_reset(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
}
/* RTI : 0000 0000 0000 0111 : A-194 */
-static size_t dsp56k_op_rti(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_rti(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* WARNING : THERE SHOULD BE A MORE GENERAL HANDLING OF STACK ERRORS. */
if (SP == 0)
@@ -3860,7 +3860,7 @@ static size_t dsp56k_op_rti(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* RTS : 0000 0000 0000 0110 : A-196 */
-static size_t dsp56k_op_rts(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_rts(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* Pop */
PC = SSH;
@@ -3876,7 +3876,7 @@ static size_t dsp56k_op_rts(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* STOP : 0000 0000 0000 1010 : A-200 */
-static size_t dsp56k_op_stop(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_stop(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3884,7 +3884,7 @@ static size_t dsp56k_op_stop(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* SWAP : 0001 0101 0111 F001 : A-206 */
-static size_t dsp56k_op_swap(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_swap(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3892,7 +3892,7 @@ static size_t dsp56k_op_swap(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* SWI : 0000 0000 0000 0101 : A-208 */
-static size_t dsp56k_op_swi(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_swi(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3900,7 +3900,7 @@ static size_t dsp56k_op_swi(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* Tcc : 0001 00cc ccTT Fh0h : A-210 */
-static size_t dsp56k_op_tcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_tcc(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
int shouldTransfer = decode_cccc_table(cpustate, BITS(op,0x03c0));
@@ -3926,7 +3926,7 @@ static size_t dsp56k_op_tcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
}
/* TFR(2) : 0001 0101 0000 F00J : A-214 */
-static size_t dsp56k_op_tfr2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_tfr2(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
@@ -3943,7 +3943,7 @@ static size_t dsp56k_op_tfr2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* TFR(3) : 0010 01mW RRDD FHHH : A-216 */
-static size_t dsp56k_op_tfr3(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_tfr3(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* * * - - - - - - */
@@ -3951,7 +3951,7 @@ static size_t dsp56k_op_tfr3(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* TST(2) : 0001 0101 0001 -1DD : A-220 */
-static size_t dsp56k_op_tst2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_tst2(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
typed_pointer D = {nullptr, DT_BYTE};
decode_DD_table(cpustate, BITS(op,0x0003), &D);
@@ -3962,8 +3962,8 @@ static size_t dsp56k_op_tst2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
DSP56K_L_CLEAR();
DSP56K_E_CLEAR();
/* U_CLEAR(); */ /* TODO: Conflicting opinions? "Set if unnormalized." Documentation is weird (A&B?) */
- if ((*((UINT16*)D.addr)) & 0x8000) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ((*((UINT16*)D.addr)) == 0x0000) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ((*((uint16_t*)D.addr)) & 0x8000) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ((*((uint16_t*)D.addr)) == 0x0000) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
/* DSP56K_V_CLEAR(); */ /* Unaffected */
DSP56K_C_CLEAR();
@@ -3972,7 +3972,7 @@ static size_t dsp56k_op_tst2(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* WAIT : 0000 0000 0000 1011 : A-222 */
-static size_t dsp56k_op_wait(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_wait(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - - - - - - - - */
@@ -3980,7 +3980,7 @@ static size_t dsp56k_op_wait(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
}
/* ZERO : 0001 0101 0101 F000 : A-224 */
-static size_t dsp56k_op_zero(dsp56k_core* cpustate, const UINT16 op, UINT8* cycles)
+static size_t dsp56k_op_zero(dsp56k_core* cpustate, const uint16_t op, uint8_t* cycles)
{
/* S L E U N Z V C */
/* - * * * * * * - */
@@ -3992,9 +3992,9 @@ static size_t dsp56k_op_zero(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/***************************************************************************
Table decoding
***************************************************************************/
-static UINT16 decode_BBB_bitmask(dsp56k_core* cpustate, UINT16 BBB, UINT16 *iVal)
+static uint16_t decode_BBB_bitmask(dsp56k_core* cpustate, uint16_t BBB, uint16_t *iVal)
{
- UINT16 retVal = 0x0000;
+ uint16_t retVal = 0x0000;
switch(BBB)
{
@@ -4006,7 +4006,7 @@ static UINT16 decode_BBB_bitmask(dsp56k_core* cpustate, UINT16 BBB, UINT16 *iVal
return retVal;
}
-static int decode_cccc_table(dsp56k_core* cpustate, UINT16 cccc)
+static int decode_cccc_table(dsp56k_core* cpustate, uint16_t cccc)
{
int retVal = 0;
@@ -4035,7 +4035,7 @@ static int decode_cccc_table(dsp56k_core* cpustate, UINT16 cccc)
return retVal;
}
-static void decode_DDDDD_table(dsp56k_core* cpustate, UINT16 DDDDD, typed_pointer* ret)
+static void decode_DDDDD_table(dsp56k_core* cpustate, uint16_t DDDDD, typed_pointer* ret)
{
switch(DDDDD)
{
@@ -4075,7 +4075,7 @@ static void decode_DDDDD_table(dsp56k_core* cpustate, UINT16 DDDDD, typed_pointe
}
}
-static void decode_DD_table(dsp56k_core* cpustate, UINT16 DD, typed_pointer* ret)
+static void decode_DD_table(dsp56k_core* cpustate, uint16_t DD, typed_pointer* ret)
{
switch(DD)
{
@@ -4086,9 +4086,9 @@ static void decode_DD_table(dsp56k_core* cpustate, UINT16 DD, typed_pointer* ret
}
}
-static void decode_DDF_table(dsp56k_core* cpustate, UINT16 DD, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret)
+static void decode_DDF_table(dsp56k_core* cpustate, uint16_t DD, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret)
{
- UINT16 switchVal = (DD << 1) | F;
+ uint16_t switchVal = (DD << 1) | F;
switch (switchVal)
{
@@ -4103,7 +4103,7 @@ static void decode_DDF_table(dsp56k_core* cpustate, UINT16 DD, UINT16 F, typed_p
}
}
-static void decode_F_table(dsp56k_core* cpustate, UINT16 F, typed_pointer* ret)
+static void decode_F_table(dsp56k_core* cpustate, uint16_t F, typed_pointer* ret)
{
switch(F)
{
@@ -4112,9 +4112,9 @@ static void decode_F_table(dsp56k_core* cpustate, UINT16 F, typed_pointer* ret)
}
}
-static void decode_h0hF_table(dsp56k_core* cpustate, UINT16 h0h, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret)
+static void decode_h0hF_table(dsp56k_core* cpustate, uint16_t h0h, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret)
{
- UINT16 switchVal = (h0h << 1) | F ;
+ uint16_t switchVal = (h0h << 1) | F ;
switch (switchVal)
{
@@ -4129,7 +4129,7 @@ static void decode_h0hF_table(dsp56k_core* cpustate, UINT16 h0h, UINT16 F, typed
}
}
-static void decode_HH_table(dsp56k_core* cpustate, UINT16 HH, typed_pointer* ret)
+static void decode_HH_table(dsp56k_core* cpustate, uint16_t HH, typed_pointer* ret)
{
switch(HH)
{
@@ -4140,7 +4140,7 @@ static void decode_HH_table(dsp56k_core* cpustate, UINT16 HH, typed_pointer* ret
}
}
-static void decode_HHH_table(dsp56k_core* cpustate, UINT16 HHH, typed_pointer* ret)
+static void decode_HHH_table(dsp56k_core* cpustate, uint16_t HHH, typed_pointer* ret)
{
switch(HHH)
{
@@ -4155,7 +4155,7 @@ static void decode_HHH_table(dsp56k_core* cpustate, UINT16 HHH, typed_pointer* r
}
}
-static void decode_IIII_table(dsp56k_core* cpustate, UINT16 IIII, typed_pointer* src_ret, typed_pointer* dst_ret, void *working)
+static void decode_IIII_table(dsp56k_core* cpustate, uint16_t IIII, typed_pointer* src_ret, typed_pointer* dst_ret, void *working)
{
void *opposite = nullptr ;
@@ -4181,9 +4181,9 @@ static void decode_IIII_table(dsp56k_core* cpustate, UINT16 IIII, typed_pointer*
}
}
-static void decode_JJJF_table(dsp56k_core* cpustate, UINT16 JJJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret)
+static void decode_JJJF_table(dsp56k_core* cpustate, uint16_t JJJ, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret)
{
- UINT16 switchVal = (JJJ << 1) | F ;
+ uint16_t switchVal = (JJJ << 1) | F ;
switch(switchVal)
{
@@ -4204,9 +4204,9 @@ static void decode_JJJF_table(dsp56k_core* cpustate, UINT16 JJJ, UINT16 F, typed
}
}
-static void decode_JJF_table(dsp56k_core* cpustate, UINT16 JJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret)
+static void decode_JJF_table(dsp56k_core* cpustate, uint16_t JJ, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret)
{
- UINT16 switchVal = (JJ << 1) | F ;
+ uint16_t switchVal = (JJ << 1) | F ;
switch (switchVal)
{
@@ -4221,9 +4221,9 @@ static void decode_JJF_table(dsp56k_core* cpustate, UINT16 JJ, UINT16 F, typed_p
}
}
-static void decode_JF_table(dsp56k_core* cpustate, UINT16 J, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret)
+static void decode_JF_table(dsp56k_core* cpustate, uint16_t J, uint16_t F, typed_pointer* src_ret, typed_pointer* dst_ret)
{
- UINT16 switchVal = (J << 1) | F ;
+ uint16_t switchVal = (J << 1) | F ;
switch (switchVal)
{
@@ -4234,7 +4234,7 @@ static void decode_JF_table(dsp56k_core* cpustate, UINT16 J, UINT16 F, typed_poi
}
}
-static void decode_KKK_table(dsp56k_core* cpustate, UINT16 KKK, typed_pointer* dst_ret1, typed_pointer* dst_ret2, void* working)
+static void decode_KKK_table(dsp56k_core* cpustate, uint16_t KKK, typed_pointer* dst_ret1, typed_pointer* dst_ret2, void* working)
{
void *opposite = nullptr ;
@@ -4254,9 +4254,9 @@ static void decode_KKK_table(dsp56k_core* cpustate, UINT16 KKK, typed_pointer* d
}
}
-static void decode_QQF_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **S1, void **S2, void **D)
+static void decode_QQF_table(dsp56k_core* cpustate, uint16_t QQ, uint16_t F, void **S1, void **S2, void **D)
{
- UINT16 switchVal = (QQ << 1) | F ;
+ uint16_t switchVal = (QQ << 1) | F ;
switch(switchVal)
{
@@ -4271,9 +4271,9 @@ static void decode_QQF_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **
}
}
-static void decode_QQF_special_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **S1, void **S2, void **D)
+static void decode_QQF_special_table(dsp56k_core* cpustate, uint16_t QQ, uint16_t F, void **S1, void **S2, void **D)
{
- UINT16 switchVal = (QQ << 1) | F ;
+ uint16_t switchVal = (QQ << 1) | F ;
switch(switchVal)
{
@@ -4288,9 +4288,9 @@ static void decode_QQF_special_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F,
}
}
-static void decode_QQQF_table(dsp56k_core* cpustate, UINT16 QQQ, UINT16 F, void **S1, void **S2, void **D)
+static void decode_QQQF_table(dsp56k_core* cpustate, uint16_t QQQ, uint16_t F, void **S1, void **S2, void **D)
{
- UINT16 switchVal = (QQQ << 1) | F;
+ uint16_t switchVal = (QQQ << 1) | F;
switch(switchVal)
{
@@ -4313,7 +4313,7 @@ static void decode_QQQF_table(dsp56k_core* cpustate, UINT16 QQQ, UINT16 F, void
}
}
-static void decode_RR_table(dsp56k_core* cpustate, UINT16 RR, typed_pointer* ret)
+static void decode_RR_table(dsp56k_core* cpustate, uint16_t RR, typed_pointer* ret)
{
switch(RR)
{
@@ -4324,7 +4324,7 @@ static void decode_RR_table(dsp56k_core* cpustate, UINT16 RR, typed_pointer* ret
}
}
-static void decode_TT_table(dsp56k_core* cpustate, UINT16 TT, typed_pointer* ret)
+static void decode_TT_table(dsp56k_core* cpustate, uint16_t TT, typed_pointer* ret)
{
switch(TT)
{
@@ -4336,9 +4336,9 @@ static void decode_TT_table(dsp56k_core* cpustate, UINT16 TT, typed_pointer* ret
}
-static void decode_uuuuF_table(dsp56k_core* cpustate, UINT16 uuuu, UINT16 F, UINT8 add_sub_other, typed_pointer* src_ret, typed_pointer* dst_ret)
+static void decode_uuuuF_table(dsp56k_core* cpustate, uint16_t uuuu, uint16_t F, uint8_t add_sub_other, typed_pointer* src_ret, typed_pointer* dst_ret)
{
- UINT16 switchVal = (uuuu << 1) | F;
+ uint16_t switchVal = (uuuu << 1) | F;
/* Unknown uuuuFs have been seen in the wild */
add_sub_other = OP_OTHER;
@@ -4410,7 +4410,7 @@ static void decode_uuuuF_table(dsp56k_core* cpustate, UINT16 uuuu, UINT16 F, UIN
}
}
-static void decode_Z_table(dsp56k_core* cpustate, UINT16 Z, typed_pointer* ret)
+static void decode_Z_table(dsp56k_core* cpustate, uint16_t Z, typed_pointer* ret)
{
switch(Z)
{
@@ -4420,10 +4420,10 @@ static void decode_Z_table(dsp56k_core* cpustate, UINT16 Z, typed_pointer* ret)
}
}
-static void execute_m_table(dsp56k_core* cpustate, int x, UINT16 m)
+static void execute_m_table(dsp56k_core* cpustate, int x, uint16_t m)
{
- UINT16 *rX = nullptr ;
- UINT16 *nX = nullptr ;
+ uint16_t *rX = nullptr ;
+ uint16_t *nX = nullptr ;
switch(x)
{
@@ -4440,10 +4440,10 @@ static void execute_m_table(dsp56k_core* cpustate, int x, UINT16 m)
}
}
-static void execute_mm_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 mm)
+static void execute_mm_table(dsp56k_core* cpustate, uint16_t rnum, uint16_t mm)
{
- UINT16 *rX = nullptr;
- UINT16 *nX = nullptr;
+ uint16_t *rX = nullptr;
+ uint16_t *nX = nullptr;
switch(rnum)
{
@@ -4462,10 +4462,10 @@ static void execute_mm_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 mm)
}
}
-static void execute_MM_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 MM)
+static void execute_MM_table(dsp56k_core* cpustate, uint16_t rnum, uint16_t MM)
{
- UINT16 *rX = nullptr ;
- UINT16 *nX = nullptr ;
+ uint16_t *rX = nullptr ;
+ uint16_t *nX = nullptr ;
switch(rnum)
{
@@ -4485,10 +4485,10 @@ static void execute_MM_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 MM)
}
/* Returns R value */
-static UINT16 execute_q_table(dsp56k_core* cpustate, int RR, UINT16 q)
+static uint16_t execute_q_table(dsp56k_core* cpustate, int RR, uint16_t q)
{
- UINT16 *rX = nullptr;
- UINT16 *nX = nullptr;
+ uint16_t *rX = nullptr;
+ uint16_t *nX = nullptr;
switch(RR)
{
@@ -4509,10 +4509,10 @@ static UINT16 execute_q_table(dsp56k_core* cpustate, int RR, UINT16 q)
return 0;
}
-static void execute_z_table(dsp56k_core* cpustate, int RR, UINT16 z)
+static void execute_z_table(dsp56k_core* cpustate, int RR, uint16_t z)
{
- UINT16 *rX = nullptr;
- UINT16 *nX = nullptr;
+ uint16_t *rX = nullptr;
+ uint16_t *nX = nullptr;
switch(RR)
{
@@ -4529,9 +4529,9 @@ static void execute_z_table(dsp56k_core* cpustate, int RR, UINT16 z)
}
}
-static UINT16 assemble_address_from_Pppppp_table(dsp56k_core* cpustate, UINT16 P, UINT16 ppppp)
+static uint16_t assemble_address_from_Pppppp_table(dsp56k_core* cpustate, uint16_t P, uint16_t ppppp)
{
- UINT16 destAddr = 0x00 ;
+ uint16_t destAddr = 0x00 ;
switch (P)
{
@@ -4542,16 +4542,16 @@ static UINT16 assemble_address_from_Pppppp_table(dsp56k_core* cpustate, UINT16 P
return destAddr ;
}
-static UINT16 assemble_address_from_IO_short_address(dsp56k_core* cpustate, UINT16 pp)
+static uint16_t assemble_address_from_IO_short_address(dsp56k_core* cpustate, uint16_t pp)
{
- UINT16 fullAddy = 0xffe0;
+ uint16_t fullAddy = 0xffe0;
fullAddy |= pp;
return fullAddy;
}
-static UINT16 assemble_address_from_6bit_signed_relative_short_address(dsp56k_core* cpustate, UINT16 srs)
+static uint16_t assemble_address_from_6bit_signed_relative_short_address(dsp56k_core* cpustate, uint16_t srs)
{
- UINT16 fullAddy = srs ;
+ uint16_t fullAddy = srs ;
if (fullAddy & 0x0020)
fullAddy |= 0xffc0 ;
@@ -4622,7 +4622,7 @@ static void dsp56k_process_rep(dsp56k_core* cpustate, size_t repSize)
Parallel Memory Ops
***************************************************************************/
/* Register to Register Data Move : 0100 IIII .... .... : A-132 */
-static void execute_register_to_register_data_move(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register, UINT64* prev_accum_value)
+static void execute_register_to_register_data_move(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register, uint64_t* prev_accum_value)
{
typed_pointer S = {nullptr, DT_BYTE};
typed_pointer D = {nullptr, DT_BYTE};
@@ -4644,15 +4644,15 @@ static void execute_register_to_register_data_move(dsp56k_core* cpustate, const
}
/* Address Register Update : 0011 0zRR .... .... : A-135 */
-static void execute_address_register_update(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register, UINT64* prev_accum_value)
+static void execute_address_register_update(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register, uint64_t* prev_accum_value)
{
execute_z_table(cpustate, BITS(op,0x0300), BITS(op,0x0400));
}
/* X Memory Data Move : 1mRR HHHW .... .... : A-137 */
-static void execute_x_memory_data_move(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register, UINT64* prev_accum_value)
+static void execute_x_memory_data_move(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register, uint64_t* prev_accum_value)
{
- UINT16 W;
+ uint16_t W;
typed_pointer R = {nullptr, DT_BYTE};
typed_pointer SD = {nullptr, DT_BYTE};
@@ -4663,7 +4663,7 @@ static void execute_x_memory_data_move(dsp56k_core* cpustate, const UINT16 op, t
if (W)
{
/* From X:<ea> to SD */
- UINT16 data = cpustate->data->read_word(ADDRESS(*((UINT16*)R.addr)));
+ uint16_t data = cpustate->data->read_word(ADDRESS(*((uint16_t*)R.addr)));
typed_pointer tempTP;
tempTP.addr = &data;
@@ -4681,11 +4681,11 @@ static void execute_x_memory_data_move(dsp56k_core* cpustate, const UINT16 op, t
tempTP.addr = prev_accum_value;
tempTP.data_type = DT_LONG_WORD;
- SetDataMemoryValue(cpustate, tempTP, ADDRESS(*((UINT16*)R.addr))) ;
+ SetDataMemoryValue(cpustate, tempTP, ADDRESS(*((uint16_t*)R.addr))) ;
}
else
{
- SetDataMemoryValue(cpustate, SD, ADDRESS(*((UINT16*)R.addr))) ;
+ SetDataMemoryValue(cpustate, SD, ADDRESS(*((uint16_t*)R.addr))) ;
}
}
@@ -4694,10 +4694,10 @@ static void execute_x_memory_data_move(dsp56k_core* cpustate, const UINT16 op, t
/* X Memory Data Move : 0101 HHHW .... .... : A-137 */
/* NOTE: previous accumulator value is not needed since ^F1 is always the opposite accumulator */
-static void execute_x_memory_data_move2(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register)
+static void execute_x_memory_data_move2(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register)
{
- UINT16 W;
- UINT16* mem_offset = nullptr;
+ uint16_t W;
+ uint16_t* mem_offset = nullptr;
typed_pointer SD = {nullptr, DT_BYTE};
W = BITS(op,0x0100);
@@ -4711,7 +4711,7 @@ static void execute_x_memory_data_move2(dsp56k_core* cpustate, const UINT16 op,
if (W)
{
/* Write D */
- UINT16 value = cpustate->data->read_word(ADDRESS(*mem_offset));
+ uint16_t value = cpustate->data->read_word(ADDRESS(*mem_offset));
typed_pointer tempV = {&value, DT_WORD};
SetDestinationValue(tempV, SD);
}
@@ -4723,41 +4723,41 @@ static void execute_x_memory_data_move2(dsp56k_core* cpustate, const UINT16 op,
}
/* X Memory Data Move With Short Displacement : 0000 0101 BBBB BBBB ---- HHHW .... .... : A-139 */
-static void execute_x_memory_data_move_with_short_displacement(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2)
+static void execute_x_memory_data_move_with_short_displacement(dsp56k_core* cpustate, const uint16_t op, const uint16_t op2)
{
- INT8 xx;
- UINT8 W;
- UINT16 memOffset;
+ int8_t xx;
+ uint8_t W;
+ uint16_t memOffset;
typed_pointer SD = { nullptr, DT_BYTE };
- xx = (INT8)(op & 0x00ff);
+ xx = (int8_t)(op & 0x00ff);
W = BITS(op2,0x0100);
decode_HHH_table(cpustate, BITS(op2,0x0e00), &SD);
- memOffset = R2 + (INT16)xx;
+ memOffset = R2 + (int16_t)xx;
if (W)
{
/* Write D */
- UINT16 tempData = cpustate->data->read_word(ADDRESS(memOffset));
+ uint16_t tempData = cpustate->data->read_word(ADDRESS(memOffset));
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDestinationValue(temp_src, SD);
}
else
{
/* Read S */
- UINT16 tempData = *((UINT16*)SD.addr);
+ uint16_t tempData = *((uint16_t*)SD.addr);
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDataMemoryValue(cpustate, temp_src, ADDRESS(memOffset));
}
}
/* Dual X Memory Data Read : 011m mKKK .rr. .... : A-142*/
-static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register)
+static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const uint16_t op, typed_pointer* d_register)
{
typed_pointer tempV;
- UINT16 srcVal1 = 0x0000;
- UINT16 srcVal2 = 0x0000;
+ uint16_t srcVal1 = 0x0000;
+ uint16_t srcVal2 = 0x0000;
typed_pointer R = {nullptr, DT_BYTE};
typed_pointer D1 = {nullptr, DT_BYTE};
typed_pointer D2 = {nullptr, DT_BYTE};
@@ -4771,11 +4771,11 @@ static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const UINT16
/* The note on A-142 is very interesting.
You can effectively access external memory in the last 64 bytes of X data memory! */
- if (*((UINT16*)D2.addr) >= 0xffc0)
+ if (*((uint16_t*)D2.addr) >= 0xffc0)
fatalerror("Dsp56k: Unimplemented access to external X Data Memory >= 0xffc0 in Dual X Memory Data Read.\n");
/* First memmove */
- srcVal1 = cpustate->data->read_word(ADDRESS(*((UINT16*)R.addr)));
+ srcVal1 = cpustate->data->read_word(ADDRESS(*((uint16_t*)R.addr)));
tempV.addr = &srcVal1;
tempV.data_type = DT_WORD;
SetDestinationValue(tempV, D1);
@@ -4793,12 +4793,12 @@ static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const UINT16
/***************************************************************************
Helper Functions
***************************************************************************/
-static UINT16 Dsp56kOpMask(UINT16 cur, UINT16 mask)
+static uint16_t Dsp56kOpMask(uint16_t cur, uint16_t mask)
{
int i ;
- UINT16 retVal = (cur & mask) ;
- UINT16 temp = 0x0000 ;
+ uint16_t retVal = (cur & mask) ;
+ uint16_t temp = 0x0000 ;
int offsetCount = 0 ;
/* Shift everything right, eliminating 'whitespace' */
@@ -4816,7 +4816,7 @@ static UINT16 Dsp56kOpMask(UINT16 cur, UINT16 mask)
static void SetDestinationValue(typed_pointer source, typed_pointer dest)
{
- UINT64 destinationValue = 0 ;
+ uint64_t destinationValue = 0 ;
switch(dest.data_type)
{
@@ -4825,10 +4825,10 @@ static void SetDestinationValue(typed_pointer source, typed_pointer dest)
switch(source.data_type)
{
/* From a ? */
- case DT_BYTE: *((UINT8*)dest.addr) = (*((UINT8*) source.addr)) & 0xff; break;
- case DT_WORD: *((UINT8*)dest.addr) = (*((UINT16*)source.addr)) & 0x00ff; break;
- case DT_DOUBLE_WORD: *((UINT8*)dest.addr) = (*((UINT32*)source.addr)) & 0x000000ff; break;
- case DT_LONG_WORD: *((UINT8*)dest.addr) = (*((UINT64*)source.addr)) & U64(0x00000000000000ff); break;
+ case DT_BYTE: *((uint8_t*)dest.addr) = (*((uint8_t*) source.addr)) & 0xff; break;
+ case DT_WORD: *((uint8_t*)dest.addr) = (*((uint16_t*)source.addr)) & 0x00ff; break;
+ case DT_DOUBLE_WORD: *((uint8_t*)dest.addr) = (*((uint32_t*)source.addr)) & 0x000000ff; break;
+ case DT_LONG_WORD: *((uint8_t*)dest.addr) = (*((uint64_t*)source.addr)) & U64(0x00000000000000ff); break;
}
break ;
@@ -4836,10 +4836,10 @@ static void SetDestinationValue(typed_pointer source, typed_pointer dest)
case DT_WORD:
switch(source.data_type)
{
- case DT_BYTE: *((UINT16*)dest.addr) = (*((UINT8*) source.addr)) & 0xff; break;
- case DT_WORD: *((UINT16*)dest.addr) = (*((UINT16*)source.addr)) & 0xffff; break;
- case DT_DOUBLE_WORD: *((UINT16*)dest.addr) = (*((UINT32*)source.addr)) & 0x0000ffff; break;
- case DT_LONG_WORD: *((UINT16*)dest.addr) = (*((UINT64*)source.addr)) & U64(0x000000000000ffff); break; /* TODO: Shift limiter action! A-147 */
+ case DT_BYTE: *((uint16_t*)dest.addr) = (*((uint8_t*) source.addr)) & 0xff; break;
+ case DT_WORD: *((uint16_t*)dest.addr) = (*((uint16_t*)source.addr)) & 0xffff; break;
+ case DT_DOUBLE_WORD: *((uint16_t*)dest.addr) = (*((uint32_t*)source.addr)) & 0x0000ffff; break;
+ case DT_LONG_WORD: *((uint16_t*)dest.addr) = (*((uint64_t*)source.addr)) & U64(0x000000000000ffff); break; /* TODO: Shift limiter action! A-147 */
}
break ;
@@ -4847,10 +4847,10 @@ static void SetDestinationValue(typed_pointer source, typed_pointer dest)
case DT_DOUBLE_WORD:
switch(source.data_type)
{
- case DT_BYTE: *((UINT32*)dest.addr) = (*((UINT8*) source.addr)) & 0xff; break;
- case DT_WORD: *((UINT32*)dest.addr) = (*((UINT16*)source.addr)) & 0xffff; break;
- case DT_DOUBLE_WORD: *((UINT32*)dest.addr) = (*((UINT32*)source.addr)) & 0xffffffff; break;
- case DT_LONG_WORD: *((UINT32*)dest.addr) = (*((UINT64*)source.addr)) & U64(0x00000000ffffffff); break;
+ case DT_BYTE: *((uint32_t*)dest.addr) = (*((uint8_t*) source.addr)) & 0xff; break;
+ case DT_WORD: *((uint32_t*)dest.addr) = (*((uint16_t*)source.addr)) & 0xffff; break;
+ case DT_DOUBLE_WORD: *((uint32_t*)dest.addr) = (*((uint32_t*)source.addr)) & 0xffffffff; break;
+ case DT_LONG_WORD: *((uint32_t*)dest.addr) = (*((uint64_t*)source.addr)) & U64(0x00000000ffffffff); break;
}
break ;
@@ -4858,46 +4858,46 @@ static void SetDestinationValue(typed_pointer source, typed_pointer dest)
case DT_LONG_WORD:
switch(source.data_type)
{
- case DT_BYTE: *((UINT64*)dest.addr) = (*((UINT8*)source.addr)) & 0xff; break;
+ case DT_BYTE: *((uint64_t*)dest.addr) = (*((uint8_t*)source.addr)) & 0xff; break;
- case DT_WORD: destinationValue = (*((UINT16*)source.addr)) << 16;
+ case DT_WORD: destinationValue = (*((uint16_t*)source.addr)) << 16;
if (destinationValue & U64(0x0000000080000000))
destinationValue |= U64(0x000000ff00000000);
- *((UINT64*)dest.addr) = (UINT64)destinationValue; break; /* Forget not, yon shift register */
+ *((uint64_t*)dest.addr) = (uint64_t)destinationValue; break; /* Forget not, yon shift register */
- case DT_DOUBLE_WORD: *((UINT64*)dest.addr) = (*((UINT32*)source.addr)) & 0xffffffff; break;
- case DT_LONG_WORD: *((UINT64*)dest.addr) = (*((UINT64*)source.addr)) & U64(0x000000ffffffffff); break;
+ case DT_DOUBLE_WORD: *((uint64_t*)dest.addr) = (*((uint32_t*)source.addr)) & 0xffffffff; break;
+ case DT_LONG_WORD: *((uint64_t*)dest.addr) = (*((uint64_t*)source.addr)) & U64(0x000000ffffffffff); break;
}
break ;
}
}
/* TODO: Wait-state timings! */
-static void SetDataMemoryValue(dsp56k_core* cpustate, typed_pointer source, UINT32 destinationAddr)
+static void SetDataMemoryValue(dsp56k_core* cpustate, typed_pointer source, uint32_t destinationAddr)
{
switch(source.data_type)
{
- case DT_BYTE: cpustate->data->write_word(destinationAddr, (UINT16)( (*((UINT8*) source.addr) & 0xff) ) ) ; break ;
- case DT_WORD: cpustate->data->write_word(destinationAddr, (UINT16)( (*((UINT16*)source.addr) & 0xffff) ) ) ; break ;
- case DT_DOUBLE_WORD: cpustate->data->write_word(destinationAddr, (UINT16)( (*((UINT32*)source.addr) & 0x0000ffff) ) ) ; break ;
+ case DT_BYTE: cpustate->data->write_word(destinationAddr, (uint16_t)( (*((uint8_t*) source.addr) & 0xff) ) ) ; break ;
+ case DT_WORD: cpustate->data->write_word(destinationAddr, (uint16_t)( (*((uint16_t*)source.addr) & 0xffff) ) ) ; break ;
+ case DT_DOUBLE_WORD: cpustate->data->write_word(destinationAddr, (uint16_t)( (*((uint32_t*)source.addr) & 0x0000ffff) ) ) ; break ;
/* !!! Is this universal ??? */
/* !!! Forget not, yon shift-limiter !!! */
- case DT_LONG_WORD: cpustate->data->write_word(destinationAddr, (UINT16)( ((*((UINT64*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
+ case DT_LONG_WORD: cpustate->data->write_word(destinationAddr, (uint16_t)( ((*((uint64_t*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
}
}
/* TODO: Wait-state timings! */
-static void SetProgramMemoryValue(dsp56k_core* cpustate, typed_pointer source, UINT32 destinationAddr)
+static void SetProgramMemoryValue(dsp56k_core* cpustate, typed_pointer source, uint32_t destinationAddr)
{
switch(source.data_type)
{
- case DT_BYTE: cpustate->program->write_word(destinationAddr, (UINT16)( (*((UINT8*) source.addr) & 0xff) ) ) ; break ;
- case DT_WORD: cpustate->program->write_word(destinationAddr, (UINT16)( (*((UINT16*)source.addr) & 0xffff) ) ) ; break ;
- case DT_DOUBLE_WORD: cpustate->program->write_word(destinationAddr, (UINT16)( (*((UINT32*)source.addr) & 0x0000ffff) ) ) ; break ;
+ case DT_BYTE: cpustate->program->write_word(destinationAddr, (uint16_t)( (*((uint8_t*) source.addr) & 0xff) ) ) ; break ;
+ case DT_WORD: cpustate->program->write_word(destinationAddr, (uint16_t)( (*((uint16_t*)source.addr) & 0xffff) ) ) ; break ;
+ case DT_DOUBLE_WORD: cpustate->program->write_word(destinationAddr, (uint16_t)( (*((uint32_t*)source.addr) & 0x0000ffff) ) ) ; break ;
/* !!! Is this universal ??? */
/* !!! Forget not, yon shift-limiter !!! */
- case DT_LONG_WORD: cpustate->program->write_word(destinationAddr, (UINT16)( ((*((UINT64*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
+ case DT_LONG_WORD: cpustate->program->write_word(destinationAddr, (uint16_t)( ((*((uint64_t*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
}
}
diff --git a/src/devices/cpu/dsp56k/dsp56pcu.cpp b/src/devices/cpu/dsp56k/dsp56pcu.cpp
index 5bfe52cd242..2c7da64c1ed 100644
--- a/src/devices/cpu/dsp56k/dsp56pcu.cpp
+++ b/src/devices/cpu/dsp56k/dsp56pcu.cpp
@@ -14,34 +14,34 @@ namespace DSP56K
/* |-------------------------------------| |-------------------------------| */
/* */
/* ************************************************************************* */
-UINT8 LF_bit(const dsp56k_core* cpustate) { return (SR & 0x8000) >> 15; }
-UINT8 FV_bit(const dsp56k_core* cpustate) { return (SR & 0x4000) >> 14; }
-// UINT8 S_bits(const dsp56k_core* cpustate) { return (SR & 0x0c00) >> 10; }
-UINT8 I_bits(const dsp56k_core* cpustate) { return (SR & 0x0300) >> 8; }
-UINT8 S_bit (const dsp56k_core* cpustate) { return (SR & 0x0080) >> 7; }
-UINT8 L_bit (const dsp56k_core* cpustate) { return (SR & 0x0040) >> 6; }
-UINT8 E_bit (const dsp56k_core* cpustate) { return (SR & 0x0020) >> 5; }
-UINT8 U_bit (const dsp56k_core* cpustate) { return (SR & 0x0010) >> 4; }
-UINT8 N_bit (const dsp56k_core* cpustate) { return (SR & 0x0008) >> 3; }
-UINT8 Z_bit (const dsp56k_core* cpustate) { return (SR & 0x0004) >> 2; }
-UINT8 V_bit (const dsp56k_core* cpustate) { return (SR & 0x0002) >> 1; }
-UINT8 C_bit (const dsp56k_core* cpustate) { return (SR & 0x0001) >> 0; }
+uint8_t LF_bit(const dsp56k_core* cpustate) { return (SR & 0x8000) >> 15; }
+uint8_t FV_bit(const dsp56k_core* cpustate) { return (SR & 0x4000) >> 14; }
+// uint8_t S_bits(const dsp56k_core* cpustate) { return (SR & 0x0c00) >> 10; }
+uint8_t I_bits(const dsp56k_core* cpustate) { return (SR & 0x0300) >> 8; }
+uint8_t S_bit (const dsp56k_core* cpustate) { return (SR & 0x0080) >> 7; }
+uint8_t L_bit (const dsp56k_core* cpustate) { return (SR & 0x0040) >> 6; }
+uint8_t E_bit (const dsp56k_core* cpustate) { return (SR & 0x0020) >> 5; }
+uint8_t U_bit (const dsp56k_core* cpustate) { return (SR & 0x0010) >> 4; }
+uint8_t N_bit (const dsp56k_core* cpustate) { return (SR & 0x0008) >> 3; }
+uint8_t Z_bit (const dsp56k_core* cpustate) { return (SR & 0x0004) >> 2; }
+uint8_t V_bit (const dsp56k_core* cpustate) { return (SR & 0x0002) >> 1; }
+uint8_t C_bit (const dsp56k_core* cpustate) { return (SR & 0x0001) >> 0; }
/* MR setters */
-void LF_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x8000); else (SR &= (~0x8000)); }
-void FV_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x4000); else (SR &= (~0x4000)); }
-void S_bits_set(dsp56k_core* cpustate, UINT8 value) { value = value & 0x03; SR &= ~(0x0c00); SR |= (value << 10); }
-void I_bits_set(dsp56k_core* cpustate, UINT8 value) { value = value & 0x03; SR &= ~(0x0300); SR |= (value << 8); }
+void LF_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x8000); else (SR &= (~0x8000)); }
+void FV_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x4000); else (SR &= (~0x4000)); }
+void S_bits_set(dsp56k_core* cpustate, uint8_t value) { value = value & 0x03; SR &= ~(0x0c00); SR |= (value << 10); }
+void I_bits_set(dsp56k_core* cpustate, uint8_t value) { value = value & 0x03; SR &= ~(0x0300); SR |= (value << 8); }
/* CCR setters */
-void S_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0080); else (SR &= (~0x0080)); }
-void L_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0040); else (SR &= (~0x0040)); }
-void E_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0020); else (SR &= (~0x0020)); }
-void U_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0010); else (SR &= (~0x0010)); }
-void N_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0008); else (SR &= (~0x0008)); }
-void Z_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0004); else (SR &= (~0x0004)); }
-void V_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0002); else (SR &= (~0x0002)); }
-void C_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0001); else (SR &= (~0x0001)); }
+void S_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0080); else (SR &= (~0x0080)); }
+void L_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0040); else (SR &= (~0x0040)); }
+void E_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0020); else (SR &= (~0x0020)); }
+void U_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0010); else (SR &= (~0x0010)); }
+void N_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0008); else (SR &= (~0x0008)); }
+void Z_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0004); else (SR &= (~0x0004)); }
+void V_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0002); else (SR &= (~0x0002)); }
+void C_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0001); else (SR &= (~0x0001)); }
@@ -54,23 +54,23 @@ void C_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0001);
/* |---------------------------------------------------------------------| */
/* */
/* ************************************************************************* */
-// UINT8 CD_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0080) != 0); }
-// UINT8 SD_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0040) != 0); }
-// UINT8 R_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0020) != 0); }
-// UINT8 SA_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0010) != 0); }
-// UINT8 MC_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0004) != 0); }
-UINT8 MB_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0002) != 0); }
-UINT8 MA_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0001) != 0); }
-
-void CD_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0080); else (OMR &= (~0x0080)); }
-void SD_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0040); else (OMR &= (~0x0040)); }
-void R_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0020); else (OMR &= (~0x0020)); }
-void SA_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0010); else (OMR &= (~0x0010)); }
-void MC_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0004); else (OMR &= (~0x0004)); }
-void MB_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0002); else (OMR &= (~0x0002)); }
-void MA_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0001); else (OMR &= (~0x0001)); }
-
-UINT8 dsp56k_operating_mode(const dsp56k_core* cpustate)
+// uint8_t CD_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0080) != 0); }
+// uint8_t SD_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0040) != 0); }
+// uint8_t R_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0020) != 0); }
+// uint8_t SA_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0010) != 0); }
+// uint8_t MC_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0004) != 0); }
+uint8_t MB_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0002) != 0); }
+uint8_t MA_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0001) != 0); }
+
+void CD_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0080); else (OMR &= (~0x0080)); }
+void SD_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0040); else (OMR &= (~0x0040)); }
+void R_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0020); else (OMR &= (~0x0020)); }
+void SA_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0010); else (OMR &= (~0x0010)); }
+void MC_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0004); else (OMR &= (~0x0004)); }
+void MB_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0002); else (OMR &= (~0x0002)); }
+void MA_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0001); else (OMR &= (~0x0001)); }
+
+uint8_t dsp56k_operating_mode(const dsp56k_core* cpustate)
{
return ((MB_bit(cpustate) << 1) | MA_bit(cpustate));
}
@@ -86,11 +86,11 @@ UINT8 dsp56k_operating_mode(const dsp56k_core* cpustate)
/* |---------------------------------------------------------------------| */
/* */
/* ************************************************************************* */
-UINT8 UF_bit(const dsp56k_core* cpustate) { return ((SP & 0x0020) != 0); }
-UINT8 SE_bit(const dsp56k_core* cpustate) { return ((SP & 0x0010) != 0); }
+uint8_t UF_bit(const dsp56k_core* cpustate) { return ((SP & 0x0020) != 0); }
+uint8_t SE_bit(const dsp56k_core* cpustate) { return ((SP & 0x0010) != 0); }
-//void UF_bit_set(dsp56k_core* cpustate, UINT8 value) {};
-//void SE_bit_set(dsp56k_core* cpustate, UINT8 value) {};
+//void UF_bit_set(dsp56k_core* cpustate, uint8_t value) {};
+//void SE_bit_set(dsp56k_core* cpustate, uint8_t value) {};
@@ -137,7 +137,7 @@ void pcu_reset(dsp56k_core* cpustate)
/* This, in actuality, is handled with the internal boot ROM. */
for (i = 0; i < 0x800; i++)
{
- UINT32 mem_offset = (0xc000<<1) + (i<<1); /* TODO: TEST */
+ uint32_t mem_offset = (0xc000<<1) + (i<<1); /* TODO: TEST */
/* TODO - DO I HAVE TO FLIP THIS WORD? */
/* P:$c000 -> Internal P:$0000 low byte */
@@ -145,8 +145,8 @@ void pcu_reset(dsp56k_core* cpustate)
/* ... */
/* P:$cffe -> Internal P:$07ff low byte */
/* P:$cfff -> Internal P:$07ff high byte */
- UINT8 mem_value_low = cpustate->program->read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
- UINT8 mem_value_high = cpustate->program->read_byte(mem_offset);
+ uint8_t mem_value_low = cpustate->program->read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
+ uint8_t mem_value_high = cpustate->program->read_byte(mem_offset);
cpustate->program_ram[i] = (mem_value_high << 8) || mem_value_low;
}
@@ -239,7 +239,7 @@ void pcu_reset(dsp56k_core* cpustate)
***************************************************************************/
struct dsp56k_irq_data
{
- UINT16 irq_vector;
+ uint16_t irq_vector;
char irq_source[128];
};
@@ -266,7 +266,7 @@ void pcu_service_interrupts(dsp56k_core* cpustate)
const int interrupt_index = cpustate->PCU.pending_interrupts[i];
/* Get the priority of the interrupt - a return value of -1 means disabled! */
- INT8 priority = dsp56k_get_irq_priority(cpustate, interrupt_index);
+ int8_t priority = dsp56k_get_irq_priority(cpustate, interrupt_index);
/* 1-12 Make sure you're not masked out against the Interrupt Mask Bits (disabled is handled for free here) */
if (priority >= I_bits(cpustate))
@@ -283,7 +283,7 @@ void pcu_service_interrupts(dsp56k_core* cpustate)
else
{
/* The host command input has a floating vector. */
- const UINT16 irq_vector = HV_bits(cpustate) << 1;
+ const uint16_t irq_vector = HV_bits(cpustate) << 1;
PC = irq_vector;
@@ -314,7 +314,7 @@ void dsp56k_add_pending_interrupt(dsp56k_core* cpustate, const char* name)
}
/* Utility function to construct IRQ table */
-void dsp56k_set_irq_source(UINT8 irq_num, UINT16 iv, const char* source)
+void dsp56k_set_irq_source(uint8_t irq_num, uint16_t iv, const char* source)
{
dsp56k_interrupt_sources[irq_num].irq_vector = iv;
strcpy(dsp56k_interrupt_sources[irq_num].irq_source, source);
@@ -420,7 +420,7 @@ void dsp56k_sort_pending_interrupts(dsp56k_core* cpustate, int num)
}
/* Given an index into the irq table, return the interrupt's current priority */
-INT8 dsp56k_get_irq_priority(dsp56k_core* cpustate, int index)
+int8_t dsp56k_get_irq_priority(dsp56k_core* cpustate, int index)
{
/* 1-12 */
switch (index)
diff --git a/src/devices/cpu/dsp56k/dsp56pcu.h b/src/devices/cpu/dsp56k/dsp56pcu.h
index b3b83109a35..6e640af3839 100644
--- a/src/devices/cpu/dsp56k/dsp56pcu.h
+++ b/src/devices/cpu/dsp56k/dsp56pcu.h
@@ -42,87 +42,87 @@ void pcu_init(dsp56k_core* cpustate, device_t *device);
/* STATUS REGISTER (SR) BITS (1-25) */
/* MR */
-UINT8 LF_bit(const dsp56k_core* cpustate);
-UINT8 FV_bit(const dsp56k_core* cpustate);
-//UINT8 S_bits(const dsp56k_core* cpustate);
-UINT8 I_bits(const dsp56k_core* cpustate);
+uint8_t LF_bit(const dsp56k_core* cpustate);
+uint8_t FV_bit(const dsp56k_core* cpustate);
+//uint8_t S_bits(const dsp56k_core* cpustate);
+uint8_t I_bits(const dsp56k_core* cpustate);
/* CCR - with macros for easy access */
#define S() (S_bit(cpustate))
-UINT8 S_bit(const dsp56k_core* cpustate);
+uint8_t S_bit(const dsp56k_core* cpustate);
#define L() (L_bit(cpustate))
-UINT8 L_bit(const dsp56k_core* cpustate);
+uint8_t L_bit(const dsp56k_core* cpustate);
#define E() (E_bit(cpustate))
-UINT8 E_bit(const dsp56k_core* cpustate);
+uint8_t E_bit(const dsp56k_core* cpustate);
#define U() (U_bit(cpustate))
-UINT8 U_bit(const dsp56k_core* cpustate);
+uint8_t U_bit(const dsp56k_core* cpustate);
#define N() (N_bit(cpustate))
-UINT8 N_bit(const dsp56k_core* cpustate);
+uint8_t N_bit(const dsp56k_core* cpustate);
#define Z() (Z_bit(cpustate))
-UINT8 Z_bit(const dsp56k_core* cpustate);
+uint8_t Z_bit(const dsp56k_core* cpustate);
#define V() (V_bit(cpustate))
-UINT8 V_bit(const dsp56k_core* cpustate);
+uint8_t V_bit(const dsp56k_core* cpustate);
#define C() (C_bit(cpustate))
-UINT8 C_bit(const dsp56k_core* cpustate);
+uint8_t C_bit(const dsp56k_core* cpustate);
/* MR setters */
-void LF_bit_set(dsp56k_core* cpustate, UINT8 value);
-void FV_bit_set(dsp56k_core* cpustate, UINT8 value);
-void S_bits_set(dsp56k_core* cpustate, UINT8 value);
-void I_bits_set(dsp56k_core* cpustate, UINT8 value);
+void LF_bit_set(dsp56k_core* cpustate, uint8_t value);
+void FV_bit_set(dsp56k_core* cpustate, uint8_t value);
+void S_bits_set(dsp56k_core* cpustate, uint8_t value);
+void I_bits_set(dsp56k_core* cpustate, uint8_t value);
/* CCR setters - with macros for easy access */
#define DSP56K_S_SET() (S_bit_set(cpustate, 1))
#define DSP56K_S_CLEAR() (S_bit_set(cpustate, 0))
-void S_bit_set(dsp56k_core* cpustate, UINT8 value);
+void S_bit_set(dsp56k_core* cpustate, uint8_t value);
#define DSP56K_L_SET() (L_bit_set(cpustate, 1))
#define DSP56K_L_CLEAR() (L_bit_set(cpustate, 0))
-void L_bit_set(dsp56k_core* cpustate, UINT8 value);
+void L_bit_set(dsp56k_core* cpustate, uint8_t value);
#define DSP56K_E_SET() (E_bit_set(cpustate, 1))
#define DSP56K_E_CLEAR() (E_bit_set(cpustate, 0))
-void E_bit_set(dsp56k_core* cpustate, UINT8 value);
+void E_bit_set(dsp56k_core* cpustate, uint8_t value);
#define DSP56K_U_SET() (U_bit_set(cpustate, 1))
#define DSP56K_U_CLEAR() (U_bit_set(cpustate, 0))
-void U_bit_set(dsp56k_core* cpustate, UINT8 value);
+void U_bit_set(dsp56k_core* cpustate, uint8_t value);
#define DSP56K_N_SET() (N_bit_set(cpustate, 1))
#define DSP56K_N_CLEAR() (N_bit_set(cpustate, 0))
-void N_bit_set(dsp56k_core* cpustate, UINT8 value);
+void N_bit_set(dsp56k_core* cpustate, uint8_t value);
#define DSP56K_Z_SET() (Z_bit_set(cpustate, 1))
#define DSP56K_Z_CLEAR() (Z_bit_set(cpustate, 0))
-void Z_bit_set(dsp56k_core* cpustate, UINT8 value);
+void Z_bit_set(dsp56k_core* cpustate, uint8_t value);
#define DSP56K_V_SET() (V_bit_set(cpustate, 1))
#define DSP56K_V_CLEAR() (V_bit_set(cpustate, 0))
-void V_bit_set(dsp56k_core* cpustate, UINT8 value);
+void V_bit_set(dsp56k_core* cpustate, uint8_t value);
#define DSP56K_C_SET() (C_bit_set(cpustate, 1))
#define DSP56K_C_CLEAR() (C_bit_set(cpustate, 0))
-void C_bit_set(dsp56k_core* cpustate, UINT8 value);
+void C_bit_set(dsp56k_core* cpustate, uint8_t value);
// TODO: Maybe some functions for Interrupt Mask and Scaling Mode go here?
/* 1-28 OPERATING MODE REGISTER (OMR) BITS */
-//UINT8 CD_bit(const dsp56k_core* cpustate);
-//UINT8 SD_bit(const dsp56k_core* cpustate);
-//UINT8 R_bit(const dsp56k_core* cpustate);
-//UINT8 SA_bit(const dsp56k_core* cpustate);
-//UINT8 MC_bit(const dsp56k_core* cpustate);
-UINT8 MB_bit(const dsp56k_core* cpustate);
-UINT8 MA_bit(const dsp56k_core* cpustate);
-
-void CD_bit_set(dsp56k_core* cpustate, UINT8 value);
-void SD_bit_set(dsp56k_core* cpustate, UINT8 value);
-void R_bit_set(dsp56k_core* cpustate, UINT8 value);
-void SA_bit_set(dsp56k_core* cpustate, UINT8 value);
-void MC_bit_set(dsp56k_core* cpustate, UINT8 value);
-void MB_bit_set(dsp56k_core* cpustate, UINT8 value);
-void MA_bit_set(dsp56k_core* cpustate, UINT8 value);
+//uint8_t CD_bit(const dsp56k_core* cpustate);
+//uint8_t SD_bit(const dsp56k_core* cpustate);
+//uint8_t R_bit(const dsp56k_core* cpustate);
+//uint8_t SA_bit(const dsp56k_core* cpustate);
+//uint8_t MC_bit(const dsp56k_core* cpustate);
+uint8_t MB_bit(const dsp56k_core* cpustate);
+uint8_t MA_bit(const dsp56k_core* cpustate);
+
+void CD_bit_set(dsp56k_core* cpustate, uint8_t value);
+void SD_bit_set(dsp56k_core* cpustate, uint8_t value);
+void R_bit_set(dsp56k_core* cpustate, uint8_t value);
+void SA_bit_set(dsp56k_core* cpustate, uint8_t value);
+void MC_bit_set(dsp56k_core* cpustate, uint8_t value);
+void MB_bit_set(dsp56k_core* cpustate, uint8_t value);
+void MA_bit_set(dsp56k_core* cpustate, uint8_t value);
/* 1-27 STACK POINTER (SP) BITS */
-UINT8 UF_bit(const dsp56k_core* cpustate);
-UINT8 SE_bit(const dsp56k_core* cpustate);
+uint8_t UF_bit(const dsp56k_core* cpustate);
+uint8_t SE_bit(const dsp56k_core* cpustate);
-//void UF_bit_set(dsp56k_core* cpustate, UINT8 value) {};
-//void SE_bit_set(dsp56k_core* cpustate, UINT8 value) {};
+//void UF_bit_set(dsp56k_core* cpustate, uint8_t value) {};
+//void SE_bit_set(dsp56k_core* cpustate, uint8_t value) {};
// HACK - Bootstrap modes
@@ -135,7 +135,7 @@ UINT8 SE_bit(const dsp56k_core* cpustate);
void pcu_service_interrupts(dsp56k_core* cpustate);
void dsp56k_irq_table_init(void);
-void dsp56k_set_irq_source(UINT8 irq_num, UINT16 iv, const char* source);
+void dsp56k_set_irq_source(uint8_t irq_num, uint16_t iv, const char* source);
int dsp56k_get_irq_index_by_tag(const char* tag);
void dsp56k_add_pending_interrupt(dsp56k_core* cpustate, const char* name); // Call me to add an interrupt to the queue
@@ -143,7 +143,7 @@ void dsp56k_add_pending_interrupt(dsp56k_core* cpustate, const char* name);
void dsp56k_clear_pending_interrupts(dsp56k_core* cpustate);
int dsp56k_count_pending_interrupts(dsp56k_core* cpustate);
void dsp56k_sort_pending_interrupts(dsp56k_core* cpustate, int num);
-INT8 dsp56k_get_irq_priority(dsp56k_core* cpustate, int index);
+int8_t dsp56k_get_irq_priority(dsp56k_core* cpustate, int index);
} // namespace DSP56K
diff --git a/src/devices/cpu/dsp56k/inst.cpp b/src/devices/cpu/dsp56k/inst.cpp
index c7e6e2e6756..c07320fc5b3 100644
--- a/src/devices/cpu/dsp56k/inst.cpp
+++ b/src/devices/cpu/dsp56k/inst.cpp
@@ -7,12 +7,12 @@ namespace DSP56K
{
// Factory
std::unique_ptr<Instruction> Instruction::decodeInstruction(const Opcode* opc,
- const UINT16 word0,
- const UINT16 word1,
+ const uint16_t word0,
+ const uint16_t word1,
bool shifted)
{
- UINT16 w0 = word0;
- UINT16 w1 = word1;
+ uint16_t w0 = word0;
+ uint16_t w1 = word1;
if (shifted)
{
diff --git a/src/devices/cpu/dsp56k/inst.h b/src/devices/cpu/dsp56k/inst.h
index 93da87f8d15..91a624f030a 100644
--- a/src/devices/cpu/dsp56k/inst.h
+++ b/src/devices/cpu/dsp56k/inst.h
@@ -30,7 +30,7 @@ public:
m_destination(iINVALID) { }
virtual ~Instruction() {}
- virtual bool decode(const UINT16 word0, const UINT16 word1) = 0;
+ virtual bool decode(const uint16_t word0, const uint16_t word1) = 0;
virtual void disassemble(std::string& retString) const = 0;
virtual void evaluate(dsp56k_core* cpustate) = 0;
@@ -40,8 +40,8 @@ public:
virtual size_t flags() const { return 0; }
static std::unique_ptr<Instruction> decodeInstruction(const Opcode* opc,
- const UINT16 word0,
- const UINT16 word1,
+ const uint16_t word0,
+ const uint16_t word1,
bool shifted=false);
bool valid() const { return m_valid; }
@@ -70,11 +70,11 @@ protected:
class Abs: public Instruction
{
public:
- Abs(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Abs(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -92,11 +92,11 @@ public:
class Adc: public Instruction
{
public:
- Adc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Adc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JF_table(BITSn(word0,0x0001), BITSn(word0,0x0008),
m_source, m_destination);
@@ -115,11 +115,11 @@ public:
class Add: public Instruction
{
public:
- Add(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Add(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
m_source, m_destination);
@@ -139,13 +139,13 @@ public:
class Add_2: public Instruction
{
public:
- Add_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Add_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_arg = "";
m_opcode = "";
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_uuuuF_table(BITSn(word0,0x17), BITSn(word0,0x08),
m_opcode, m_source, m_destination);
@@ -169,11 +169,11 @@ private:
class And: public Instruction
{
public:
- And(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ And(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
m_source, m_destination);
@@ -192,12 +192,12 @@ public:
class Andi: public Instruction
{
public:
- Andi(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Andi(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_immediate = BITSn(word0,0x00ff);
decode_EE_table(BITSn(word0,0x0600), m_destination);
@@ -215,18 +215,18 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT8 m_immediate;
+ uint8_t m_immediate;
};
// ASL : .... .... 0011 F001 : A-28 ////////////////////////////////////////////
class Asl: public Instruction
{
public:
- Asl(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Asl(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -244,11 +244,11 @@ public:
class Asl4: public Instruction
{
public:
- Asl4(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Asl4(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x0008), m_destination);
return true;
@@ -266,11 +266,11 @@ public:
class Asr: public Instruction
{
public:
- Asr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Asr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -288,11 +288,11 @@ public:
class Asr4: public Instruction
{
public:
- Asr4(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Asr4(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x0008), m_destination);
return true;
@@ -310,11 +310,11 @@ public:
class Asr16: public Instruction
{
public:
- Asr16(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Asr16(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x0008), m_destination);
return true;
@@ -336,14 +336,14 @@ public:
class BfInstruction: public Instruction
{
public:
- BfInstruction(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ BfInstruction(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
dString = "";
m_opcode = "";
m_iVal = 0x0000;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
/* Decode the common parts */
m_iVal = BITSn(word1,0x00ff);
@@ -384,7 +384,7 @@ public:
size_t size() const override { return 2; }
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT16 m_iVal;
+ uint16_t m_iVal;
std::string m_opcode;
std::string dString;
};
@@ -397,14 +397,14 @@ private:
class BfInstruction_2: public Instruction
{
public:
- BfInstruction_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ BfInstruction_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_opcode = "";
m_r = iINVALID;
m_iVal = 0x0000;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
/* Decode the common parts */
m_iVal = BITSn(word1,0x00ff);
@@ -452,7 +452,7 @@ public:
private:
reg_id m_r;
- UINT16 m_iVal;
+ uint16_t m_iVal;
std::string m_opcode;
};
@@ -464,13 +464,13 @@ private:
class BfInstruction_3: public Instruction
{
public:
- BfInstruction_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ BfInstruction_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_opcode = "";
m_iVal = 0x0000;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
/* Decode the common parts */
m_iVal = BITSn(word1,0x00ff);
@@ -514,7 +514,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT16 m_iVal;
+ uint16_t m_iVal;
std::string m_opcode;
};
@@ -522,15 +522,15 @@ private:
class Bcc: public Instruction
{
public:
- Bcc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bcc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- m_immediate = (INT16)word1;
+ m_immediate = (int16_t)word1;
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
return true;
}
@@ -541,7 +541,7 @@ public:
char temp[32];
sprintf(temp, ">*+$%x", 2 + m_immediate);
- // NEW // sprintf(temp, "$%04x (%d)", pc + 2 + (INT16)word1, (INT16)word1);
+ // NEW // sprintf(temp, "$%04x (%d)", pc + 2 + (int16_t)word1, (int16_t)word1);
retString = opcode + " " + std::string(temp);
}
void evaluate(dsp56k_core* cpustate) override {}
@@ -550,20 +550,20 @@ public:
private:
op_mnem m_mnem;
- INT16 m_immediate;
+ int16_t m_immediate;
};
// Bcc : 0010 11cc ccee eeee : A-48 ////////////////////////////////////////////
class Bcc_2: public Instruction
{
public:
- Bcc_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bcc_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_cccc_table(BITSn(word0,0x3c0), m_mnem);
m_immediate = get_6_bit_signed_value(BITSn(word0,0x003f));
@@ -587,19 +587,19 @@ public:
private:
op_mnem m_mnem;
- INT8 m_immediate;
+ int8_t m_immediate;
};
// Bcc : 0000 0111 RR10 cccc : A-48 ////////////////////////////////////////////
class Bcc_3: public Instruction
{
public:
- Bcc_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bcc_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x00c0), m_destination);
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
@@ -623,21 +623,21 @@ private:
class Bra: public Instruction
{
public:
- Bra(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bra(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- m_immediate = (INT16)word1;
+ m_immediate = (int16_t)word1;
return true;
}
void disassemble(std::string& retString) const override
{
char temp[32];
sprintf(temp, ">*+$%x", 2 + m_immediate);
- // NEW // sprintf(temp, "$%04x (%d)", pc + 2 + word1, (INT16)word1);
+ // NEW // sprintf(temp, "$%04x (%d)", pc + 2 + word1, (int16_t)word1);
retString = "bra " + std::string(temp);
}
void evaluate(dsp56k_core* cpustate) override {}
@@ -645,21 +645,21 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT16 m_immediate;
+ int16_t m_immediate;
};
// BRA : 0000 1011 aaaa aaaa : A-50 ////////////////////////////////////////////
class Bra_2: public Instruction
{
public:
- Bra_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bra_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- m_immediate = (INT8)BITSn(word0,0x00ff);
+ m_immediate = (int8_t)BITSn(word0,0x00ff);
return true;
}
void disassemble(std::string& retString) const override
@@ -675,18 +675,18 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_immediate;
+ int8_t m_immediate;
};
// BRA : 0000 0001 0010 11RR : A-50 ////////////////////////////////////////////
class Bra_3: public Instruction
{
public:
- Bra_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bra_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x0003), m_destination);
return true;
@@ -704,12 +704,12 @@ public:
class Brkcc: public Instruction
{
public:
- Brkcc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Brkcc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
return true;
@@ -732,15 +732,15 @@ private:
class Bscc: public Instruction
{
public:
- Bscc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bscc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- m_immediate = (INT16)word1;
+ m_immediate = (int16_t)word1;
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
return true;
}
@@ -753,7 +753,7 @@ public:
if (m_immediate >= 0) sprintf(temp, ">*+$%x", 2 + m_immediate);
else sprintf(temp, ">*-$%x", 1 - m_immediate - 1 - 2);
//sprintf(temp, ">*+$%x", 2 + m_immediate);
- // NEW // sprintf(temp, "$%04x (%d)", pc + 2 + (INT16)word1, (INT16)word1);
+ // NEW // sprintf(temp, "$%04x (%d)", pc + 2 + (int16_t)word1, (int16_t)word1);
retString = opcode + " " + std::string(temp);
}
void evaluate(dsp56k_core* cpustate) override {}
@@ -763,19 +763,19 @@ public:
private:
op_mnem m_mnem;
- INT16 m_immediate;
+ int16_t m_immediate;
};
// BScc : 0000 0111 RR00 cccc : A-54 ///////////////////////////////////////////
class Bscc_2: public Instruction
{
public:
- Bscc_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bscc_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x00c0), m_destination);
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
@@ -800,14 +800,14 @@ private:
class Bsr: public Instruction
{
public:
- Bsr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bsr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- m_immediate = (INT16)word1;
+ m_immediate = (int16_t)word1;
return true;
}
void disassemble(std::string& retString) const override
@@ -815,7 +815,7 @@ public:
char temp[32];
if (m_immediate >= 0) sprintf(temp, ">*+$%x", 2 + m_immediate);
else sprintf(temp, ">*-$%x", 1 - m_immediate - 1 - 2);
- // NEW // sprintf(temp, "$%04x (%d)", pc + 2 + (INT16)word1, (INT16)word1);
+ // NEW // sprintf(temp, "$%04x (%d)", pc + 2 + (int16_t)word1, (int16_t)word1);
retString = "bsr " + std::string(temp);
}
void evaluate(dsp56k_core* cpustate) override {}
@@ -824,18 +824,18 @@ public:
size_t flags() const override { return DASMFLAG_STEP_OVER; }
private:
- INT16 m_immediate;
+ int16_t m_immediate;
};
// BSR : 0000 0001 0010 10RR : A-56 ////////////////////////////////////////////
class Bsr_2: public Instruction
{
public:
- Bsr_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Bsr_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x0003), m_destination);
return true;
@@ -854,11 +854,11 @@ public:
class Chkaau: public Instruction
{
public:
- Chkaau(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Chkaau(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -875,11 +875,11 @@ public:
class Clr: public Instruction
{
public:
- Clr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Clr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -897,11 +897,11 @@ public:
class Clr24: public Instruction
{
public:
- Clr24(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Clr24(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -919,11 +919,11 @@ public:
class Cmp: public Instruction
{
public:
- Cmp(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Cmp(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
/* Note: This is a JJJF limited in the docs, but other opcodes sneak
in before cmp, so the same decode function can be used. */
@@ -944,11 +944,11 @@ public:
class Cmpm: public Instruction
{
public:
- Cmpm(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Cmpm(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
/* Note: This is a JJJF limited in the docs, but other opcodes sneak
in before cmp, so the same decode function can be used. */
@@ -969,11 +969,11 @@ public:
class Debug: public Instruction
{
public:
- Debug(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Debug(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -990,12 +990,12 @@ public:
class Debugcc: public Instruction
{
public:
- Debugcc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Debugcc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
return true;
@@ -1018,11 +1018,11 @@ private:
class Dec: public Instruction
{
public:
- Dec(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Dec(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -1040,11 +1040,11 @@ public:
class Dec24: public Instruction
{
public:
- Dec24(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Dec24(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -1062,11 +1062,11 @@ public:
class Div: public Instruction
{
public:
- Div(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Div(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_DDF_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
m_source, m_destination);
@@ -1085,13 +1085,13 @@ public:
class Dmac: public Instruction
{
public:
- Dmac(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Dmac(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
m_source, m_source2, m_destination);
@@ -1122,12 +1122,12 @@ private:
class Do: public Instruction
{
public:
- Do(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Do(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_immediate = word1;
decode_RR_table(BITSn(word0,0x0003), m_source);
@@ -1150,20 +1150,20 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT16 m_immediate;
+ uint16_t m_immediate;
};
// DO : 0000 1110 iiii iiii xxxx xxxx xxxx xxxx : A-82 /////////////////////////
class Do_2: public Instruction
{
public:
- Do_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Do_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_displacement = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_immediate = BITSn(word0,0x00ff);
m_displacement = word1;
@@ -1181,20 +1181,20 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT8 m_immediate;
- UINT16 m_displacement;
+ uint8_t m_immediate;
+ uint16_t m_displacement;
};
// DO : 0000 0100 000D DDDD xxxx xxxx xxxx xxxx : A-82 /////////////////////////
class Do_3: public Instruction
{
public:
- Do_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Do_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_displacement = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_displacement = word1;
@@ -1215,19 +1215,19 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT16 m_displacement;
+ uint16_t m_displacement;
};
// DO FOREVER : 0000 0000 0000 0010 xxxx xxxx xxxx xxxx : A-88 /////////////////
class DoForever: public Instruction
{
public:
- DoForever(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ DoForever(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_displacement = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_displacement = word1;
return true;
@@ -1245,18 +1245,18 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT16 m_displacement;
+ uint16_t m_displacement;
};
// ENDDO : 0000 0000 0000 1001 : A-92 //////////////////////////////////////////
class Enddo: public Instruction
{
public:
- Enddo(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Enddo(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -1273,11 +1273,11 @@ public:
class Eor: public Instruction
{
public:
- Eor(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Eor(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
m_source, m_destination);
@@ -1296,11 +1296,11 @@ public:
class Ext: public Instruction
{
public:
- Ext(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Ext(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x0008), m_destination);
return true;
@@ -1318,11 +1318,11 @@ public:
class Illegal: public Instruction
{
public:
- Illegal(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Illegal(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -1339,12 +1339,12 @@ public:
class Imac: public Instruction
{
public:
- Imac(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Imac(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
m_source, m_source2, m_destination);
@@ -1368,12 +1368,12 @@ private:
class Impy: public Instruction
{
public:
- Impy(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Impy(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
m_source, m_source2, m_destination);
@@ -1397,11 +1397,11 @@ private:
class Inc: public Instruction
{
public:
- Inc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Inc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -1419,11 +1419,11 @@ public:
class Inc24: public Instruction
{
public:
- Inc24(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Inc24(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -1441,13 +1441,13 @@ public:
class Jcc: public Instruction
{
public:
- Jcc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jcc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_displacement = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_displacement = word1;
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
@@ -1469,19 +1469,19 @@ public:
private:
op_mnem m_mnem;
- UINT16 m_displacement;
+ uint16_t m_displacement;
};
// Jcc : 0000 0110 RR10 cccc : A-108 ///////////////////////////////////////////
class Jcc_2: public Instruction
{
public:
- Jcc_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jcc_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x00c0), m_destination);
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
@@ -1505,12 +1505,12 @@ private:
class Jmp: public Instruction
{
public:
- Jmp(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jmp(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_displacement = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_displacement = word1;
return true;
@@ -1534,18 +1534,18 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT16 m_displacement;
+ uint16_t m_displacement;
};
// JMP : 0000 0001 0010 01RR : A-110 ///////////////////////////////////////////
class Jmp_2: public Instruction
{
public:
- Jmp_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jmp_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x0003), m_destination);
return true;
@@ -1572,13 +1572,13 @@ public:
class Jscc: public Instruction
{
public:
- Jscc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jscc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_displacement = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_displacement = word1;
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
@@ -1601,19 +1601,19 @@ public:
private:
op_mnem m_mnem;
- UINT16 m_displacement;
+ uint16_t m_displacement;
};
// JScc : 0000 0110 RR00 cccc : A-112 //////////////////////////////////////////
class Jscc_2: public Instruction
{
public:
- Jscc_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jscc_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x00c0), m_destination);
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
@@ -1638,12 +1638,12 @@ private:
class Jsr: public Instruction
{
public:
- Jsr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jsr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_displacement = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_displacement = word1;
return true;
@@ -1661,19 +1661,19 @@ public:
size_t flags() const override { return DASMFLAG_STEP_OVER; }
private:
- UINT16 m_displacement;
+ uint16_t m_displacement;
};
// JSR : 0000 1010 AAAA AAAA : A-114 ///////////////////////////////////////////
class Jsr_2: public Instruction
{
public:
- Jsr_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jsr_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_bAddr = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_bAddr = BITSn(word0,0x00ff);
return true;
@@ -1691,18 +1691,18 @@ public:
size_t flags() const override { return DASMFLAG_STEP_OVER; }
private:
- UINT8 m_bAddr;
+ uint8_t m_bAddr;
};
// JSR : 0000 0001 0010 00RR : A-114 ///////////////////////////////////////////
class Jsr_3: public Instruction
{
public:
- Jsr_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Jsr_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x0003), m_destination);
return true;
@@ -1721,18 +1721,18 @@ public:
class Lea: public Instruction
{
public:
- Lea(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Lea(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_ea = "";
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
if ((word0 & 0x000c) == 0) return false; // NEW TODO //
decode_TT_table(BITSn(word0,0x0030), m_destination);
- INT8 rNum = BITSn(word0,0x0003);
+ int8_t rNum = BITSn(word0,0x0003);
assemble_ea_from_MM_table(BITSn(word0,0x000c), rNum, m_ea);
return true;
@@ -1754,17 +1754,17 @@ private:
class Lea_2: public Instruction
{
public:
- Lea_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Lea_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
if ((word0 & 0x000c) == 0) return false; // NEW TODO //
decode_NN_table(BITSn(word0,0x0030), m_destination);
- INT8 rNum = BITSn(word0,0x0003);
+ int8_t rNum = BITSn(word0,0x0003);
assemble_ea_from_MM_table(BITSn(word0,0x000c), rNum, m_ea);
return true;
@@ -1786,11 +1786,11 @@ private:
class Lsl: public Instruction
{
public:
- Lsl(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Lsl(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -1808,11 +1808,11 @@ public:
class Lsr: public Instruction
{
public:
- Lsr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Lsr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -1830,13 +1830,13 @@ public:
class Mac: public Instruction
{
public:
- Mac(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mac(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_sign = "";
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
m_source, m_source2, m_destination);
@@ -1866,12 +1866,12 @@ private:
class Mac_2: public Instruction
{
public:
- Mac_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mac_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
m_source, m_source2, m_destination);
@@ -1895,12 +1895,12 @@ private:
class Mac_3: public Instruction
{
public:
- Mac_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mac_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
m_source, m_source2, m_destination);
@@ -1924,13 +1924,13 @@ private:
class Macr: public Instruction
{
public:
- Macr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Macr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_sign = "";
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
m_source, m_source2, m_destination);
@@ -1960,12 +1960,12 @@ private:
class Macr_2: public Instruction
{
public:
- Macr_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Macr_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
m_source, m_source2, m_destination);
@@ -1989,13 +1989,13 @@ private:
class Macsuuu: public Instruction
{
public:
- Macsuuu(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Macsuuu(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
// Special QQF
decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
@@ -2026,12 +2026,12 @@ private:
class Move: public Instruction
{
public:
- Move(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Move(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_isNop = false;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
// Equivalent to a NOP (+ parallel move)
@@ -2043,7 +2043,7 @@ public:
m_destination = iB;
// Hack to match reference disassembler
- UINT8 BITSn = (word0 & 0xff00) >> 8;
+ uint8_t BITSn = (word0 & 0xff00) >> 8;
if (BITSn == 0x4a || BITSn == 0x4b)
m_isNop = true;
@@ -2068,11 +2068,11 @@ private:
class Move_2: public Instruction
{
public:
- Move_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Move_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
// Amounts to a nop with two parallel moves.
// This insures the debugger matches the reference disassembler
@@ -2096,14 +2096,14 @@ public:
class Move_3: public Instruction
{
public:
- Move_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Move_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_b = 0;
m_SD = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_b = BITSn(word0,0x00ff);
m_W = BITSn(word1,0x0100);
@@ -2122,8 +2122,8 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_b;
- UINT8 m_W;
+ int8_t m_b;
+ uint8_t m_W;
reg_id m_SD;
};
@@ -2131,16 +2131,16 @@ private:
class Movec: public Instruction
{
public:
- Movec(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movec(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
m_SD = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- INT8 rNum = BITSn(word0,0x0003);
+ int8_t rNum = BITSn(word0,0x0003);
assemble_ea_from_MM_table(BITSn(word0,0x000c), rNum, m_ea);
m_W = BITSn(word0,0x0400);
@@ -2161,7 +2161,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_W;
+ int8_t m_W;
reg_id m_SD;
std::string m_ea;
};
@@ -2170,16 +2170,16 @@ private:
class Movec_2: public Instruction
{
public:
- Movec_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movec_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
m_SD = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- INT8 rNum = BITSn(word0,0x0003);
+ int8_t rNum = BITSn(word0,0x0003);
assemble_ea_from_q_table(BITSn(word0,0x0008), rNum, m_ea);
decode_DDDDD_table(BITSn(word0,0x03e0), m_SD);
@@ -2200,7 +2200,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_W;
+ int8_t m_W;
reg_id m_SD;
std::string m_ea;
};
@@ -2209,14 +2209,14 @@ private:
class Movec_3: public Instruction
{
public:
- Movec_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movec_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
m_SD = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_Z_table(BITSn(word0,0x0008), m_ea);
@@ -2238,7 +2238,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_W;
+ int8_t m_W;
reg_id m_SD;
std::string m_ea;
};
@@ -2247,14 +2247,14 @@ private:
class Movec_4: public Instruction
{
public:
- Movec_4(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movec_4(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_t = 0;
m_W = 0;
m_sd = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_value = word1;
m_t = BITSn(word0,0x0008);
@@ -2289,7 +2289,7 @@ public:
}
else
{
- //UINT16 memValue = memory_read_word_16le(cpustate->data, ADDRESS(m_value));
+ //uint16_t memValue = memory_read_word_16le(cpustate->data, ADDRESS(m_value));
//setReg16(cpustate, memValue, m_sd);
}
}
@@ -2301,7 +2301,7 @@ public:
}
else
{
- //UINT16 regValue = regValue16(cpustate, m_sd);
+ //uint16_t regValue = regValue16(cpustate, m_sd);
//memory_write_word_16le(cpustate->data, m_value, regValue);
}
}
@@ -2316,9 +2316,9 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT8 m_t;
- UINT8 m_W;
- UINT16 m_value;
+ uint8_t m_t;
+ uint8_t m_W;
+ uint16_t m_value;
reg_id m_sd;
};
@@ -2326,11 +2326,11 @@ private:
class Movec_5: public Instruction
{
public:
- Movec_5(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movec_5(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_DDDDD_table(BITSn(word0,0x03e0), m_source);
decode_DDDDD_table(BITSn(word0,0x001f), m_destination);
@@ -2353,7 +2353,7 @@ public:
class Movec_6: public Instruction
{
public:
- Movec_6(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movec_6(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_b = 0;
@@ -2361,7 +2361,7 @@ public:
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_b = BITSn(word0,0x00ff);
m_W = BITSn(word1,0x0400);
@@ -2381,8 +2381,8 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_b;
- UINT8 m_W;
+ int8_t m_b;
+ uint8_t m_W;
reg_id m_SD;
op_mnem m_mnem;
};
@@ -2391,14 +2391,14 @@ private:
class Movei: public Instruction
{
public:
- Movei(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movei(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- m_immediate = (INT8)BITSn(word0,0x00ff);
+ m_immediate = (int8_t)BITSn(word0,0x00ff);
decode_DD_table(BITSn(word0,0x0300), m_destination);
return true;
}
@@ -2418,23 +2418,23 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_immediate;
+ int8_t m_immediate;
};
// MOVE(M) : 0000 001W RR0M MHHH : A-152 ///////////////////////////////////////
class Movem: public Instruction
{
public:
- Movem(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movem(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
m_SD = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- INT8 rNum = BITSn(word0,0x00c0);
+ int8_t rNum = BITSn(word0,0x00c0);
decode_HHH_table(BITSn(word0,0x0007), m_SD);
assemble_ea_from_MM_table(BITSn(word0,0x0018), rNum, m_ea);
@@ -2454,7 +2454,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_W;
+ int8_t m_W;
reg_id m_SD;
std::string m_ea;
};
@@ -2463,14 +2463,14 @@ private:
class Movem_2: public Instruction
{
public:
- Movem_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movem_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
m_ea2 = "";
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_W = BITSn(word0,0x0100);
assemble_eas_from_mm_table(BITSn(word0,0x000c), BITSn(word0,0x00c0), BITSn(word0,0x0003), m_ea, m_ea2);
@@ -2498,7 +2498,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT8 m_W;
+ uint8_t m_W;
std::string m_ea;
std::string m_ea2;
};
@@ -2507,14 +2507,14 @@ private:
class Movem_3: public Instruction
{
public:
- Movem_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movem_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_b = 0;
m_SD = iINVALID;
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_b = BITSn(word0,0x00ff);
m_W = BITSn(word1,0x0100);
@@ -2534,8 +2534,8 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_b;
- UINT8 m_W;
+ int8_t m_b;
+ uint8_t m_W;
reg_id m_SD;
op_mnem m_mnem;
};
@@ -2544,14 +2544,14 @@ private:
class Movep: public Instruction
{
public:
- Movep(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movep(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
m_SD = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_HH_table(BITSn(word0,0x00c0), m_SD);
@@ -2574,7 +2574,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_W;
+ int8_t m_W;
reg_id m_SD;
std::string m_ea;
};
@@ -2583,16 +2583,16 @@ private:
class Movep_2: public Instruction
{
public:
- Movep_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Movep_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
m_SD = "";
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- INT8 rNum = BITSn(word0,0x00c0);
+ int8_t rNum = BITSn(word0,0x00c0);
assemble_ea_from_m_table(BITSn(word0,0x0020), rNum, m_ea);
@@ -2617,7 +2617,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_W;
+ int8_t m_W;
std::string m_SD;
std::string m_ea;
};
@@ -2626,14 +2626,14 @@ private:
class Moves: public Instruction
{
public:
- Moves(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Moves(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
m_SD = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_HH_table(BITSn(word0,0x00c0), m_SD);
@@ -2657,7 +2657,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_W;
+ int8_t m_W;
reg_id m_SD;
std::string m_ea;
};
@@ -2666,13 +2666,13 @@ private:
class Mpy: public Instruction
{
public:
- Mpy(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mpy(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_sign = "";
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
/* There are inconsistencies with the S1 & S2 operand ordering in the docs,
but since it's a multiply it doesn't matter */
@@ -2704,12 +2704,12 @@ private:
class Mpy_2: public Instruction
{
public:
- Mpy_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mpy_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
m_source, m_source2, m_destination);
@@ -2733,12 +2733,12 @@ private:
class Mpy_3: public Instruction
{
public:
- Mpy_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mpy_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
m_source, m_source2, m_destination);
@@ -2762,13 +2762,13 @@ private:
class Mpyr: public Instruction
{
public:
- Mpyr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mpyr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_sign = "-";
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
/* There are inconsistencies with the S1 & S2 operand ordering in the docs,
but since it's a multiply it doesn't matter */
@@ -2800,12 +2800,12 @@ private:
class Mpyr_2: public Instruction
{
public:
- Mpyr_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mpyr_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
m_source, m_source2, m_destination);
@@ -2829,13 +2829,13 @@ private:
class Mpysuuu: public Instruction
{
public:
- Mpysuuu(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Mpysuuu(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
m_source, m_source2, m_destination);
@@ -2865,11 +2865,11 @@ private:
class Neg: public Instruction
{
public:
- Neg(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Neg(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -2887,11 +2887,11 @@ public:
class Negc: public Instruction
{
public:
- Negc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Negc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x0008), m_destination);
return true;
@@ -2909,11 +2909,11 @@ public:
class Nop: public Instruction
{
public:
- Nop(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Nop(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -2930,11 +2930,11 @@ public:
class Norm: public Instruction
{
public:
- Norm(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Norm(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x0008), m_destination);
@@ -2954,11 +2954,11 @@ public:
class Not: public Instruction
{
public:
- Not(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Not(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -2976,11 +2976,11 @@ public:
class Or: public Instruction
{
public:
- Or(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Or(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
m_source, m_destination);
@@ -2999,12 +2999,12 @@ public:
class Ori: public Instruction
{
public:
- Ori(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Ori(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_immediate = BITSn(word0,0x00ff);
decode_EE_table(BITSn(word0,0x0600), m_destination);
@@ -3023,18 +3023,18 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT8 m_immediate;
+ uint8_t m_immediate;
};
// REP : 0000 0000 111- --RR : A-180 ///////////////////////////////////////////
class Rep: public Instruction
{
public:
- Rep(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Rep(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_RR_table(BITSn(word0,0x0003), m_source);
return true;
@@ -3054,12 +3054,12 @@ public:
class Rep_2: public Instruction
{
public:
- Rep_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Rep_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_immediate = 0;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
m_immediate = BITSn(word0,0x00ff);
return true;
@@ -3076,18 +3076,18 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT8 m_immediate;
+ uint8_t m_immediate;
};
// REP : 0000 0100 001D DDDD : A-180 ///////////////////////////////////////////
class Rep_3: public Instruction
{
public:
- Rep_3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Rep_3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_DDDDD_table(BITSn(word0,0x001f), m_source);
if (m_source == iINVALID) return false;
@@ -3106,12 +3106,12 @@ public:
class Repcc: public Instruction
{
public:
- Repcc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Repcc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_cccc_table(BITSn(word0,0x000f), m_mnem);
return true;
@@ -3134,11 +3134,11 @@ private:
class Reset: public Instruction
{
public:
- Reset(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Reset(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -3155,11 +3155,11 @@ public:
class Rnd: public Instruction
{
public:
- Rnd(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Rnd(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -3177,11 +3177,11 @@ public:
class Rol: public Instruction
{
public:
- Rol(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Rol(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -3199,11 +3199,11 @@ public:
class Ror: public Instruction
{
public:
- Ror(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Ror(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -3221,11 +3221,11 @@ public:
class Rti: public Instruction
{
public:
- Rti(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Rti(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -3243,11 +3243,11 @@ public:
class Rts: public Instruction
{
public:
- Rts(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Rts(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -3265,11 +3265,11 @@ public:
class Sbc: public Instruction
{
public:
- Sbc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Sbc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JF_table(BITSn(word0,0x01), BITSn(word0,0x08),
m_source, m_destination);
@@ -3288,11 +3288,11 @@ public:
class Stop: public Instruction
{
public:
- Stop(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Stop(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -3309,11 +3309,11 @@ public:
class Sub: public Instruction
{
public:
- Sub(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Sub(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
m_source, m_destination);
@@ -3332,12 +3332,12 @@ public:
class Sub_2: public Instruction
{
public:
- Sub_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Sub_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_opcode = "";
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_uuuuF_table(BITSn(word0,0x17), BITSn(word0,0x08),
m_opcode, m_source, m_destination);
@@ -3361,11 +3361,11 @@ private:
class Subl: public Instruction
{
public:
- Subl(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Subl(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
/* There is only one option for the F table. This is a very strange opcode. */
if (!BITSn(word0,0x0008))
@@ -3393,11 +3393,11 @@ public:
class Swap: public Instruction
{
public:
- Swap(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Swap(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x0008), m_destination);
return true;
@@ -3415,11 +3415,11 @@ public:
class Swi: public Instruction
{
public:
- Swi(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Swi(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -3436,13 +3436,13 @@ public:
class Tcc: public Instruction
{
public:
- Tcc(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Tcc(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_mnem = oINVALID;
m_destination2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_h0hF_table(BITSn(word0,0x0007),BITSn(word0,0x0008),
m_source, m_destination);
@@ -3482,11 +3482,11 @@ private:
class Tfr: public Instruction
{
public:
- Tfr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Tfr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
m_source, m_destination);
@@ -3505,11 +3505,11 @@ public:
class Tfr_2: public Instruction
{
public:
- Tfr_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Tfr_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_DDF_table(BITSn(word0,0x03), BITSn(word0,0x08),
m_source, m_destination);
@@ -3528,11 +3528,11 @@ public:
class Tfr2: public Instruction
{
public:
- Tfr2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Tfr2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_JF_table(BITSn(word0,0x0001),BITSn(word0,0x0008),
m_destination, m_source);
@@ -3551,7 +3551,7 @@ public:
class Tfr3: public Instruction
{
public:
- Tfr3(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Tfr3(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_W = 0;
m_ea = "";
@@ -3560,7 +3560,7 @@ public:
m_destination2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_DDF_table(BITSn(word0,0x0030), BITSn(word0,0x0008),
m_destination, m_source);
@@ -3569,7 +3569,7 @@ public:
// If the destination of the second move is the same as the first, you're invalid
if (m_SD == m_destination && BITSn(word0,0x0100)) return false;
- INT8 rNum = BITSn(word0,0x00c0);
+ int8_t rNum = BITSn(word0,0x00c0);
assemble_ea_from_m_table(BITSn(word0,0x0200), rNum, m_ea);
m_W = BITSn(word0,0x0100);
@@ -3589,7 +3589,7 @@ public:
size_t accumulatorBitsModified() const override { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_W;
+ int8_t m_W;
reg_id m_SD;
std::string m_ea;
reg_id m_source2;
@@ -3600,11 +3600,11 @@ private:
class Tst: public Instruction
{
public:
- Tst(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Tst(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x08), m_destination);
return true;
@@ -3622,11 +3622,11 @@ public:
class Tst2: public Instruction
{
public:
- Tst2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Tst2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_DD_table(BITSn(word0,0x0003), m_source);
return true;
@@ -3644,11 +3644,11 @@ public:
class Wait: public Instruction
{
public:
- Wait(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Wait(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
return true;
}
@@ -3665,11 +3665,11 @@ public:
class Zero: public Instruction
{
public:
- Zero(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Zero(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_F_table(BITSn(word0,0x0008), m_destination);
return true;
@@ -3687,12 +3687,12 @@ public:
class Shfl: public Instruction
{
public:
- Shfl(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Shfl(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
m_source, m_source2, m_destination);
@@ -3731,12 +3731,12 @@ private:
class Shfr: public Instruction
{
public:
- Shfr(const Opcode* oco, const UINT16 word0, const UINT16 word1) : Instruction(oco)
+ Shfr(const Opcode* oco, const uint16_t word0, const uint16_t word1) : Instruction(oco)
{
m_source2 = iINVALID;
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
m_source, m_source2, m_destination);
diff --git a/src/devices/cpu/dsp56k/opcode.cpp b/src/devices/cpu/dsp56k/opcode.cpp
index 37a7024b6e3..cdffaba030c 100644
--- a/src/devices/cpu/dsp56k/opcode.cpp
+++ b/src/devices/cpu/dsp56k/opcode.cpp
@@ -6,7 +6,7 @@
namespace DSP56K
{
-Opcode::Opcode(UINT16 w0, UINT16 w1) : m_word0(w0)/*, m_word1(w1)*/
+Opcode::Opcode(uint16_t w0, uint16_t w1) : m_word0(w0)/*, m_word1(w1)*/
{
m_instruction = Instruction::decodeInstruction(this, w0, w1);
m_parallelMove = ParallelMove::decodeParallelMove(this, w0, w1);
diff --git a/src/devices/cpu/dsp56k/opcode.h b/src/devices/cpu/dsp56k/opcode.h
index ba8c9f2b97c..2fbc1a69d39 100644
--- a/src/devices/cpu/dsp56k/opcode.h
+++ b/src/devices/cpu/dsp56k/opcode.h
@@ -20,7 +20,7 @@ class ParallelMove;
class Opcode
{
public:
- Opcode(UINT16 w0, UINT16 w1);
+ Opcode(uint16_t w0, uint16_t w1);
virtual ~Opcode();
std::string disassemble() const;
@@ -37,8 +37,8 @@ private:
std::unique_ptr<Instruction> m_instruction;
std::unique_ptr<ParallelMove> m_parallelMove;
- UINT16 m_word0;
- //UINT16 m_word1;
+ uint16_t m_word0;
+ //uint16_t m_word1;
std::string dcString() const;
};
diff --git a/src/devices/cpu/dsp56k/pmove.cpp b/src/devices/cpu/dsp56k/pmove.cpp
index 681acd4dcf6..b57a8850154 100644
--- a/src/devices/cpu/dsp56k/pmove.cpp
+++ b/src/devices/cpu/dsp56k/pmove.cpp
@@ -9,10 +9,10 @@ const reg_id& ParallelMove::opDestination() const { return m_oco->instDestinatio
size_t ParallelMove::opAccumulatorBitsModified() const { return m_oco->instAccumulatorBitsModified(); }
-std::unique_ptr<ParallelMove> ParallelMove::decodeParallelMove(const Opcode* opc, const UINT16 word0, const UINT16 word1)
+std::unique_ptr<ParallelMove> ParallelMove::decodeParallelMove(const Opcode* opc, const uint16_t word0, const uint16_t word1)
{
- const UINT16 w0 = word0;
- const UINT16 w1 = word1;
+ const uint16_t w0 = word0;
+ const uint16_t w1 = word1;
/* Dual X Memory Data Read : 011m mKKK .rr. .... : A-142*/
if ((w0 & 0xe000) == 0x6000)
diff --git a/src/devices/cpu/dsp56k/pmove.h b/src/devices/cpu/dsp56k/pmove.h
index f818e4a40b2..8e4ecaa5fde 100644
--- a/src/devices/cpu/dsp56k/pmove.h
+++ b/src/devices/cpu/dsp56k/pmove.h
@@ -20,11 +20,11 @@ public:
ParallelMove(const Opcode* oco) : m_valid(false), m_oco(oco) { }
virtual ~ParallelMove() {}
- virtual bool decode(const UINT16 word0, const UINT16 word1) = 0;
+ virtual bool decode(const uint16_t word0, const uint16_t word1) = 0;
virtual void disassemble(std::string& retString) const = 0;
virtual void evaluate() = 0;
- static std::unique_ptr<ParallelMove> decodeParallelMove(const Opcode* opc, const UINT16 word0, const UINT16 word1);
+ static std::unique_ptr<ParallelMove> decodeParallelMove(const Opcode* opc, const uint16_t word0, const uint16_t word1);
bool valid() const { return m_valid; }
@@ -47,11 +47,11 @@ protected:
class XMemoryDataMove: public ParallelMove
{
public:
- XMemoryDataMove(const Opcode* oco, const UINT16 word0, const UINT16 word1) : ParallelMove(oco)
+ XMemoryDataMove(const Opcode* oco, const uint16_t word0, const uint16_t word1) : ParallelMove(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
reg_id r;
decode_RR_table(BITSn(word0,0x3000), r);
@@ -87,11 +87,11 @@ private:
class XMemoryDataMove_2: public ParallelMove
{
public:
- XMemoryDataMove_2(const Opcode* oco, const UINT16 word0, const UINT16 word1) : ParallelMove(oco)
+ XMemoryDataMove_2(const Opcode* oco, const uint16_t word0, const uint16_t word1) : ParallelMove(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
std::string ea;
if (opDestination() == iB)
@@ -129,11 +129,11 @@ private:
class DualXMemoryDataRead: public ParallelMove
{
public:
- DualXMemoryDataRead(const Opcode* oco, const UINT16 word0, const UINT16 word1) : ParallelMove(oco)
+ DualXMemoryDataRead(const Opcode* oco, const uint16_t word0, const uint16_t word1) : ParallelMove(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
reg_id r;
reg_id D1;
@@ -183,11 +183,11 @@ private:
class RegisterToRegisterDataMove: public ParallelMove
{
public:
- RegisterToRegisterDataMove(const Opcode* oco, const UINT16 word0, const UINT16 word1) : ParallelMove(oco)
+ RegisterToRegisterDataMove(const Opcode* oco, const uint16_t word0, const uint16_t word1) : ParallelMove(oco)
{
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
decode_IIIIx_table(BITSn(word0,0x0f00), BITSn(word0,0x0008),
m_source, m_destination);
@@ -234,13 +234,13 @@ private:
class XMemoryDataWriteAndRegisterDataMove: public ParallelMove
{
public:
- XMemoryDataWriteAndRegisterDataMove(const Opcode* oco, const UINT16 word0, const UINT16 word1) : ParallelMove(oco)
+ XMemoryDataWriteAndRegisterDataMove(const Opcode* oco, const uint16_t word0, const uint16_t word1) : ParallelMove(oco)
{
pms = "";
pms2 = "";
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
reg_id r;
reg_id S;
@@ -277,12 +277,12 @@ private:
class AddressRegisterUpdate: public ParallelMove
{
public:
- AddressRegisterUpdate(const Opcode* oco, const UINT16 word0, const UINT16 word1) : ParallelMove(oco)
+ AddressRegisterUpdate(const Opcode* oco, const uint16_t word0, const uint16_t word1) : ParallelMove(oco)
{
m_ea = "";
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
reg_id r;
decode_RR_table(BITSn(word0,0x0300), r);
@@ -305,15 +305,15 @@ private:
class XMemoryDataMoveWithShortDisplacement: public ParallelMove
{
public:
- XMemoryDataMoveWithShortDisplacement(const Opcode* oco, const UINT16 word0, const UINT16 word1) : ParallelMove(oco)
+ XMemoryDataMoveWithShortDisplacement(const Opcode* oco, const uint16_t word0, const uint16_t word1) : ParallelMove(oco)
{
m_source = "";
m_destination = "";
m_valid = decode(word0, word1);
}
- bool decode(const UINT16 word0, const UINT16 word1) override
+ bool decode(const uint16_t word0, const uint16_t word1) override
{
- INT8 b;
+ int8_t b;
reg_id SD;
b = (char)(word0 & 0x00ff);
decode_HHH_table(BITSn(word1,0x0e00), SD);
diff --git a/src/devices/cpu/dsp56k/tables.cpp b/src/devices/cpu/dsp56k/tables.cpp
index 5837580409e..72a46bfa0ee 100644
--- a/src/devices/cpu/dsp56k/tables.cpp
+++ b/src/devices/cpu/dsp56k/tables.cpp
@@ -12,7 +12,7 @@ namespace DSP56K
/******************/
/* Table decoding */
/******************/
-bfShift decode_BBB_table(UINT16 BBB)
+bfShift decode_BBB_table(uint16_t BBB)
{
switch(BBB)
{
@@ -24,7 +24,7 @@ bfShift decode_BBB_table(UINT16 BBB)
return BBB_INVALID;
}
-void decode_cccc_table(const UINT16 cccc, op_mnem& mnemonic)
+void decode_cccc_table(const uint16_t cccc, op_mnem& mnemonic)
{
switch (cccc)
{
@@ -67,7 +67,7 @@ void decode_cccc_table(const UINT16 cccc, op_mnem& mnemonic)
// NEW // }
}
-void decode_DDDDD_table(const UINT16 DDDDD, reg_id& SD)
+void decode_DDDDD_table(const uint16_t DDDDD, reg_id& SD)
{
switch(DDDDD)
{
@@ -107,7 +107,7 @@ void decode_DDDDD_table(const UINT16 DDDDD, reg_id& SD)
}
}
-void decode_DD_table(const UINT16 DD, reg_id& SD)
+void decode_DD_table(const uint16_t DD, reg_id& SD)
{
switch (DD)
{
@@ -118,9 +118,9 @@ void decode_DD_table(const UINT16 DD, reg_id& SD)
}
}
-void decode_DDF_table(const UINT16 DD, const UINT16 F, reg_id& S, reg_id& D)
+void decode_DDF_table(const uint16_t DD, const uint16_t F, reg_id& S, reg_id& D)
{
- const UINT16 switchVal = (DD << 1) | F;
+ const uint16_t switchVal = (DD << 1) | F;
switch (switchVal)
{
@@ -135,7 +135,7 @@ void decode_DDF_table(const UINT16 DD, const UINT16 F, reg_id& S, reg_id& D)
}
}
-void decode_EE_table(const UINT16 EE, reg_id& D)
+void decode_EE_table(const uint16_t EE, reg_id& D)
{
switch(EE)
{
@@ -145,7 +145,7 @@ void decode_EE_table(const UINT16 EE, reg_id& D)
}
}
-void decode_F_table(const UINT16 F, reg_id& SD)
+void decode_F_table(const uint16_t F, reg_id& SD)
{
switch(F)
{
@@ -154,9 +154,9 @@ void decode_F_table(const UINT16 F, reg_id& SD)
}
}
-void decode_h0hF_table(const UINT16 h0h, UINT16 F, reg_id& S, reg_id& D)
+void decode_h0hF_table(const uint16_t h0h, uint16_t F, reg_id& S, reg_id& D)
{
- const UINT16 switchVal = (h0h << 1) | F;
+ const uint16_t switchVal = (h0h << 1) | F;
switch (switchVal)
{
@@ -171,7 +171,7 @@ void decode_h0hF_table(const UINT16 h0h, UINT16 F, reg_id& S, reg_id& D)
}
}
-void decode_HH_table(const UINT16 HH, reg_id& SD)
+void decode_HH_table(const uint16_t HH, reg_id& SD)
{
switch(HH)
{
@@ -182,7 +182,7 @@ void decode_HH_table(const UINT16 HH, reg_id& SD)
}
}
-void decode_HHH_table(const UINT16 HHH, reg_id& SD)
+void decode_HHH_table(const uint16_t HHH, reg_id& SD)
{
switch(HHH)
{
@@ -197,7 +197,7 @@ void decode_HHH_table(const UINT16 HHH, reg_id& SD)
}
}
-void decode_IIIIx_table(const UINT16 IIII, const UINT16 x, reg_id& S, reg_id& D)
+void decode_IIIIx_table(const uint16_t IIII, const uint16_t x, reg_id& S, reg_id& D)
{
S = D = iINVALID;
switch(IIII)
@@ -221,9 +221,9 @@ void decode_IIIIx_table(const UINT16 IIII, const UINT16 x, reg_id& S, reg_id& D)
}
}
-void decode_JJJF_table(const UINT16 JJJ, const UINT16 F, reg_id& S, reg_id& D)
+void decode_JJJF_table(const uint16_t JJJ, const uint16_t F, reg_id& S, reg_id& D)
{
- const UINT16 switchVal = (JJJ << 1) | F;
+ const uint16_t switchVal = (JJJ << 1) | F;
switch(switchVal)
{
@@ -246,9 +246,9 @@ void decode_JJJF_table(const UINT16 JJJ, const UINT16 F, reg_id& S, reg_id& D)
}
}
-void decode_JJF_table(const UINT16 JJ, const UINT16 F, reg_id& S, reg_id& D)
+void decode_JJF_table(const uint16_t JJ, const uint16_t F, reg_id& S, reg_id& D)
{
- const UINT16 switchVal = (JJ << 1) | F;
+ const uint16_t switchVal = (JJ << 1) | F;
switch (switchVal)
{
@@ -263,9 +263,9 @@ void decode_JJF_table(const UINT16 JJ, const UINT16 F, reg_id& S, reg_id& D)
}
}
-void decode_JF_table(const UINT16 J, const UINT16 F, reg_id& S, reg_id& D)
+void decode_JF_table(const uint16_t J, const uint16_t F, reg_id& S, reg_id& D)
{
- const UINT16 switchVal = (J << 1) | F;
+ const uint16_t switchVal = (J << 1) | F;
switch(switchVal)
{
@@ -276,7 +276,7 @@ void decode_JF_table(const UINT16 J, const UINT16 F, reg_id& S, reg_id& D)
}
}
-// NEW // void decode_k_table(UINT16 k, char *Dnot)
+// NEW // void decode_k_table(uint16_t k, char *Dnot)
// NEW // {
// NEW // switch(k)
// NEW // {
@@ -285,7 +285,7 @@ void decode_JF_table(const UINT16 J, const UINT16 F, reg_id& S, reg_id& D)
// NEW // }
// NEW // }
-void decode_kSign_table(const UINT16 k, std::string& plusMinus)
+void decode_kSign_table(const uint16_t k, std::string& plusMinus)
{
switch(k)
{
@@ -294,7 +294,7 @@ void decode_kSign_table(const UINT16 k, std::string& plusMinus)
}
}
-void decode_KKK_table(const UINT16 KKK, reg_id& D1, reg_id& D2)
+void decode_KKK_table(const uint16_t KKK, reg_id& D1, reg_id& D2)
{
switch(KKK)
{
@@ -309,7 +309,7 @@ void decode_KKK_table(const UINT16 KKK, reg_id& D1, reg_id& D2)
}
}
-void decode_NN_table(UINT16 NN, reg_id& ret)
+void decode_NN_table(uint16_t NN, reg_id& ret)
{
switch(NN)
{
@@ -320,7 +320,7 @@ void decode_NN_table(UINT16 NN, reg_id& ret)
}
}
-void decode_TT_table(UINT16 TT, reg_id& ret)
+void decode_TT_table(uint16_t TT, reg_id& ret)
{
switch(TT)
{
@@ -331,9 +331,9 @@ void decode_TT_table(UINT16 TT, reg_id& ret)
}
}
-void decode_QQF_table(const UINT16 QQ, const UINT16 F, reg_id& S1, reg_id& S2, reg_id& D)
+void decode_QQF_table(const uint16_t QQ, const uint16_t F, reg_id& S1, reg_id& S2, reg_id& D)
{
- const UINT16 switchVal = (QQ << 1) | F;
+ const uint16_t switchVal = (QQ << 1) | F;
switch(switchVal)
{
@@ -348,9 +348,9 @@ void decode_QQF_table(const UINT16 QQ, const UINT16 F, reg_id& S1, reg_id& S2, r
}
}
-void decode_QQF_special_table(const UINT16 QQ, const UINT16 F, reg_id& S1, reg_id& S2, reg_id& D)
+void decode_QQF_special_table(const uint16_t QQ, const uint16_t F, reg_id& S1, reg_id& S2, reg_id& D)
{
- const UINT16 switchVal = (QQ << 1) | F;
+ const uint16_t switchVal = (QQ << 1) | F;
switch(switchVal)
{
@@ -365,9 +365,9 @@ void decode_QQF_special_table(const UINT16 QQ, const UINT16 F, reg_id& S1, reg_i
}
}
-void decode_QQQF_table(const UINT16 QQQ, const UINT16 F, reg_id& S1, reg_id& S2, reg_id& D)
+void decode_QQQF_table(const uint16_t QQQ, const uint16_t F, reg_id& S1, reg_id& S2, reg_id& D)
{
- const UINT16 switchVal = (QQQ << 1) | F;
+ const uint16_t switchVal = (QQQ << 1) | F;
switch(switchVal)
{
@@ -390,7 +390,7 @@ void decode_QQQF_table(const UINT16 QQQ, const UINT16 F, reg_id& S1, reg_id& S2,
}
}
-void decode_RR_table(UINT16 RR, reg_id& ret)
+void decode_RR_table(uint16_t RR, reg_id& ret)
{
switch(RR)
{
@@ -401,7 +401,7 @@ void decode_RR_table(UINT16 RR, reg_id& ret)
}
}
-void decode_rr_table(UINT16 rr, reg_id& ret)
+void decode_rr_table(uint16_t rr, reg_id& ret)
{
switch(rr)
{
@@ -412,7 +412,7 @@ void decode_rr_table(UINT16 rr, reg_id& ret)
}
}
-void decode_s_table(const UINT16 s, op_mnem& arithmetic)
+void decode_s_table(const uint16_t s, op_mnem& arithmetic)
{
switch(s)
{
@@ -421,7 +421,7 @@ void decode_s_table(const UINT16 s, op_mnem& arithmetic)
}
}
-void decode_ss_table(const UINT16 ss, op_mnem& arithmetic)
+void decode_ss_table(const uint16_t ss, op_mnem& arithmetic)
{
switch(ss)
{
@@ -433,9 +433,9 @@ void decode_ss_table(const UINT16 ss, op_mnem& arithmetic)
}
}
-void decode_uuuuF_table(const UINT16 uuuu, const UINT16 F, std::string& arg, reg_id& S, reg_id& D)
+void decode_uuuuF_table(const uint16_t uuuu, const uint16_t F, std::string& arg, reg_id& S, reg_id& D)
{
- const UINT16 switchVal = (uuuu << 1) | F;
+ const uint16_t switchVal = (uuuu << 1) | F;
//D = "sub?";
//S = "add";
@@ -475,7 +475,7 @@ void decode_uuuuF_table(const UINT16 uuuu, const UINT16 F, std::string& arg, reg
}
}
-void decode_Z_table(const UINT16 Z, std::string& ea)
+void decode_Z_table(const uint16_t Z, std::string& ea)
{
/* This is fixed as per the Family Manual errata addendum */
switch(Z)
@@ -485,7 +485,7 @@ void decode_Z_table(const UINT16 Z, std::string& ea)
}
}
-void assemble_ea_from_m_table(const UINT16 m, const int n, std::string& ea)
+void assemble_ea_from_m_table(const uint16_t m, const int n, std::string& ea)
{
char temp[32];
switch(m)
@@ -496,7 +496,7 @@ void assemble_ea_from_m_table(const UINT16 m, const int n, std::string& ea)
ea = temp;
}
-void assemble_eas_from_mm_table(UINT16 mm, int n1, int n2, std::string& ea1, std::string& ea2)
+void assemble_eas_from_mm_table(uint16_t mm, int n1, int n2, std::string& ea1, std::string& ea2)
{
char temp1[32];
char temp2[32];
@@ -515,7 +515,7 @@ void assemble_eas_from_mm_table(UINT16 mm, int n1, int n2, std::string& ea1, std
ea2 = temp2;
}
-void assemble_ea_from_MM_table(UINT16 MM, int n, std::string& ea)
+void assemble_ea_from_MM_table(uint16_t MM, int n, std::string& ea)
{
char temp[32];
switch(MM)
@@ -528,7 +528,7 @@ void assemble_ea_from_MM_table(UINT16 MM, int n, std::string& ea)
ea = temp;
}
-void assemble_ea_from_q_table(UINT16 q, int n, std::string& ea)
+void assemble_ea_from_q_table(uint16_t q, int n, std::string& ea)
{
char temp[32];
switch(q)
@@ -539,7 +539,7 @@ void assemble_ea_from_q_table(UINT16 q, int n, std::string& ea)
ea = temp;
}
-void assemble_ea_from_t_table(UINT16 t, UINT16 val, std::string& ea)
+void assemble_ea_from_t_table(uint16_t t, uint16_t val, std::string& ea)
{
char temp[32];
switch(t)
@@ -552,7 +552,7 @@ void assemble_ea_from_t_table(UINT16 t, UINT16 val, std::string& ea)
ea = temp;
}
-void assemble_ea_from_z_table(UINT16 z, int n, std::string& ea)
+void assemble_ea_from_z_table(uint16_t z, int n, std::string& ea)
{
char temp[32];
switch(z)
@@ -563,7 +563,7 @@ void assemble_ea_from_z_table(UINT16 z, int n, std::string& ea)
ea = temp;
}
-void assemble_D_from_P_table(UINT16 P, UINT16 ppppp, std::string& D)
+void assemble_D_from_P_table(uint16_t P, uint16_t ppppp, std::string& D)
{
char temp[32];
std::string fullAddy; /* Convert Short Absolute Address to full 16-bit */
@@ -583,7 +583,7 @@ void assemble_D_from_P_table(UINT16 P, UINT16 ppppp, std::string& D)
D = temp;
}
-void assemble_arguments_from_W_table(UINT16 W, char ma, const reg_id& SD, const std::string& ea,
+void assemble_arguments_from_W_table(uint16_t W, char ma, const reg_id& SD, const std::string& ea,
std::string& source, std::string& destination)
{
char temp[32];
@@ -595,7 +595,7 @@ void assemble_arguments_from_W_table(UINT16 W, char ma, const reg_id& SD, const
}
}
-void assemble_arguments_from_W_table(UINT16 W, char ma, const std::string& SD, const std::string& ea,
+void assemble_arguments_from_W_table(uint16_t W, char ma, const std::string& SD, const std::string& ea,
std::string& source, std::string& destination)
{
char temp[32];
@@ -607,9 +607,9 @@ void assemble_arguments_from_W_table(UINT16 W, char ma, const std::string& SD, c
}
}
-void assemble_reg_from_W_table(UINT16 W, char ma, const reg_id& SD, const INT8 xx, std::string& S, std::string& D)
+void assemble_reg_from_W_table(uint16_t W, char ma, const reg_id& SD, const int8_t xx, std::string& S, std::string& D)
{
- UINT8 abs_xx;
+ uint8_t abs_xx;
char temp[32];
char operation[32];
@@ -629,24 +629,24 @@ void assemble_reg_from_W_table(UINT16 W, char ma, const reg_id& SD, const INT8 x
}
}
-void assemble_address_from_IO_short_address(UINT16 pp, std::string& ea)
+void assemble_address_from_IO_short_address(uint16_t pp, std::string& ea)
{
char temp[32];
- UINT16 fullAddy = 0xffe0;
+ uint16_t fullAddy = 0xffe0;
fullAddy |= pp;
sprintf(temp, "%.04x", fullAddy);
ea = temp;
}
-INT8 get_6_bit_signed_value(UINT16 bits)
+int8_t get_6_bit_signed_value(uint16_t bits)
{
- UINT16 fullAddy = bits;
+ uint16_t fullAddy = bits;
if (fullAddy & 0x0020)
fullAddy |= 0xffc0;
- return (INT8)fullAddy;
+ return (int8_t)fullAddy;
}
@@ -654,12 +654,12 @@ INT8 get_6_bit_signed_value(UINT16 bits)
/* HELPER FUNCTIONS */
/********************/
-UINT16 dsp56k_op_maskn(UINT16 cur, UINT16 mask)
+uint16_t dsp56k_op_maskn(uint16_t cur, uint16_t mask)
{
int i;
- UINT16 retVal = (cur & mask);
- UINT16 temp = 0x0000;
+ uint16_t retVal = (cur & mask);
+ uint16_t temp = 0x0000;
int offsetCount = 0;
/* Shift everything right, eliminating 'whitespace'... */
@@ -694,7 +694,7 @@ bool registerOverlap(const reg_id& r0, const size_t bmd, const reg_id& r1)
return false;
}
-UINT16 regValue16(dsp56k_core* cpustate, const reg_id& reg)
+uint16_t regValue16(dsp56k_core* cpustate, const reg_id& reg)
{
if (reg == iX0) return X0;
if (reg == iX1) return X1;
@@ -725,7 +725,7 @@ UINT16 regValue16(dsp56k_core* cpustate, const reg_id& reg)
return 0xdead;
}
-void setReg16(dsp56k_core* cpustate, const UINT16& value, const reg_id& reg)
+void setReg16(dsp56k_core* cpustate, const uint16_t& value, const reg_id& reg)
{
if (reg == iX0) X0 = value;
if (reg == iX1) X1 = value;
@@ -876,7 +876,7 @@ reg_id stringAsRegID(const std::string& str)
return iINVALID;
}
-UINT8 regIDAsNum(const reg_id& regId)
+uint8_t regIDAsNum(const reg_id& regId)
{
if (regId == iR0) return 0;
if (regId == iR1) return 1;
diff --git a/src/devices/cpu/dsp56k/tables.h b/src/devices/cpu/dsp56k/tables.h
index f0bb88f21d8..2b590dc9027 100644
--- a/src/devices/cpu/dsp56k/tables.h
+++ b/src/devices/cpu/dsp56k/tables.h
@@ -34,60 +34,60 @@ enum op_mnem {oCC, oGE, oNE, oPL,
oSS, oSU, oUU, oINVALID};
-bfShift decode_BBB_table(UINT16 BBB);
-void decode_cccc_table(const UINT16 cccc, op_mnem& mnemonic);
-void decode_DDDDD_table(const UINT16 DDDDD, reg_id& SD);
-void decode_DD_table(const UINT16 DD, reg_id& SD);
-void decode_DDF_table(const UINT16 DD, const UINT16 F, reg_id& S, reg_id& D);
-void decode_EE_table(const UINT16 EE, reg_id& D);
-void decode_F_table(const UINT16 F, reg_id& SD);
-void decode_h0hF_table(const UINT16 h0h, UINT16 F, reg_id& S, reg_id& D);
-void decode_HH_table(const UINT16 HH, reg_id& SD);
-void decode_HHH_table(const UINT16 HHH, reg_id& SD);
-void decode_IIIIx_table(const UINT16 IIII, const UINT16 x, reg_id& S, reg_id& D);
-void decode_JJJF_table(const UINT16 JJJ, const UINT16 F, reg_id& S, reg_id& D);
-void decode_JJF_table(const UINT16 JJ, const UINT16 F, reg_id& S, reg_id& D);
-void decode_JF_table(const UINT16 J, const UINT16 F, reg_id& S, reg_id& D);
-void decode_kSign_table(const UINT16 k, std::string& plusMinus);
-void decode_KKK_table(const UINT16 KKK, reg_id& D1, reg_id& D2);
-void decode_NN_table(UINT16 NN, reg_id& ret);
-void decode_TT_table(UINT16 TT, reg_id& ret);
-void decode_QQF_table(const UINT16 QQ, const UINT16 F, reg_id& S1, reg_id& S2, reg_id& D);
-void decode_QQF_special_table(const UINT16 QQ, const UINT16 F, reg_id& S1, reg_id& S2, reg_id& D);
-void decode_QQQF_table(const UINT16 QQQ, const UINT16 F, reg_id& S1, reg_id& S2, reg_id& D);
-void decode_RR_table(UINT16 RR, reg_id& ret);
-void decode_rr_table(UINT16 rr, reg_id& ret);
-void decode_s_table(const UINT16 s, op_mnem& arithmetic);
-void decode_ss_table(const UINT16 ss, op_mnem& arithmetic);
-void decode_uuuuF_table(const UINT16 uuuu, const UINT16 F, std::string& arg, reg_id& S, reg_id& D);
-void decode_Z_table(const UINT16 Z, std::string& ea);
-
-void assemble_ea_from_m_table(const UINT16 m, const int n, std::string& ea);
-void assemble_eas_from_mm_table(UINT16 mm, int n1, int n2, std::string& ea1, std::string& ea2);
-void assemble_ea_from_MM_table(UINT16 MM, int n, std::string& ea);
-void assemble_ea_from_q_table(UINT16 q, int n, std::string& ea);
-void assemble_ea_from_t_table(UINT16 t, UINT16 val, std::string& ea);
-void assemble_ea_from_z_table(UINT16 z, int n, std::string& ea);
-void assemble_D_from_P_table(UINT16 P, UINT16 ppppp, std::string& D);
-void assemble_arguments_from_W_table(UINT16 W, char ma, const reg_id& SD, const std::string& ea, std::string& S, std::string& D);
-void assemble_arguments_from_W_table(UINT16 W, char ma, const std::string& SD, const std::string& ea, std::string& S, std::string& D);
-void assemble_reg_from_W_table(UINT16 W, char ma, const reg_id& SD, const INT8 xx, std::string& S, std::string& D);
-void assemble_address_from_IO_short_address(UINT16 pp, std::string& ea);
-
-INT8 get_6_bit_signed_value(UINT16 bits);
+bfShift decode_BBB_table(uint16_t BBB);
+void decode_cccc_table(const uint16_t cccc, op_mnem& mnemonic);
+void decode_DDDDD_table(const uint16_t DDDDD, reg_id& SD);
+void decode_DD_table(const uint16_t DD, reg_id& SD);
+void decode_DDF_table(const uint16_t DD, const uint16_t F, reg_id& S, reg_id& D);
+void decode_EE_table(const uint16_t EE, reg_id& D);
+void decode_F_table(const uint16_t F, reg_id& SD);
+void decode_h0hF_table(const uint16_t h0h, uint16_t F, reg_id& S, reg_id& D);
+void decode_HH_table(const uint16_t HH, reg_id& SD);
+void decode_HHH_table(const uint16_t HHH, reg_id& SD);
+void decode_IIIIx_table(const uint16_t IIII, const uint16_t x, reg_id& S, reg_id& D);
+void decode_JJJF_table(const uint16_t JJJ, const uint16_t F, reg_id& S, reg_id& D);
+void decode_JJF_table(const uint16_t JJ, const uint16_t F, reg_id& S, reg_id& D);
+void decode_JF_table(const uint16_t J, const uint16_t F, reg_id& S, reg_id& D);
+void decode_kSign_table(const uint16_t k, std::string& plusMinus);
+void decode_KKK_table(const uint16_t KKK, reg_id& D1, reg_id& D2);
+void decode_NN_table(uint16_t NN, reg_id& ret);
+void decode_TT_table(uint16_t TT, reg_id& ret);
+void decode_QQF_table(const uint16_t QQ, const uint16_t F, reg_id& S1, reg_id& S2, reg_id& D);
+void decode_QQF_special_table(const uint16_t QQ, const uint16_t F, reg_id& S1, reg_id& S2, reg_id& D);
+void decode_QQQF_table(const uint16_t QQQ, const uint16_t F, reg_id& S1, reg_id& S2, reg_id& D);
+void decode_RR_table(uint16_t RR, reg_id& ret);
+void decode_rr_table(uint16_t rr, reg_id& ret);
+void decode_s_table(const uint16_t s, op_mnem& arithmetic);
+void decode_ss_table(const uint16_t ss, op_mnem& arithmetic);
+void decode_uuuuF_table(const uint16_t uuuu, const uint16_t F, std::string& arg, reg_id& S, reg_id& D);
+void decode_Z_table(const uint16_t Z, std::string& ea);
+
+void assemble_ea_from_m_table(const uint16_t m, const int n, std::string& ea);
+void assemble_eas_from_mm_table(uint16_t mm, int n1, int n2, std::string& ea1, std::string& ea2);
+void assemble_ea_from_MM_table(uint16_t MM, int n, std::string& ea);
+void assemble_ea_from_q_table(uint16_t q, int n, std::string& ea);
+void assemble_ea_from_t_table(uint16_t t, uint16_t val, std::string& ea);
+void assemble_ea_from_z_table(uint16_t z, int n, std::string& ea);
+void assemble_D_from_P_table(uint16_t P, uint16_t ppppp, std::string& D);
+void assemble_arguments_from_W_table(uint16_t W, char ma, const reg_id& SD, const std::string& ea, std::string& S, std::string& D);
+void assemble_arguments_from_W_table(uint16_t W, char ma, const std::string& SD, const std::string& ea, std::string& S, std::string& D);
+void assemble_reg_from_W_table(uint16_t W, char ma, const reg_id& SD, const int8_t xx, std::string& S, std::string& D);
+void assemble_address_from_IO_short_address(uint16_t pp, std::string& ea);
+
+int8_t get_6_bit_signed_value(uint16_t bits);
// Helpers
-UINT16 dsp56k_op_maskn(UINT16 cur, UINT16 mask);
+uint16_t dsp56k_op_maskn(uint16_t cur, uint16_t mask);
bool registerOverlap(const reg_id& r0, const size_t bmd, const reg_id& r1);
-UINT16 regValue16(dsp56k_core* cpustate, const reg_id& reg);
-void setReg16(dsp56k_core* cpustate, const UINT16& value, const reg_id& reg);
+uint16_t regValue16(dsp56k_core* cpustate, const reg_id& reg);
+void setReg16(dsp56k_core* cpustate, const uint16_t& value, const reg_id& reg);
std::string regIdAsString(const reg_id& regId);
std::string opMnemonicAsString(const op_mnem& mnem);
reg_id stringAsRegID(const std::string& str);
-UINT8 regIDAsNum(const reg_id& regId);
+uint8_t regIDAsNum(const reg_id& regId);
}
diff --git a/src/devices/cpu/e0c6200/e0c6200.cpp b/src/devices/cpu/e0c6200/e0c6200.cpp
index e2bb9390586..9cc9468429d 100644
--- a/src/devices/cpu/e0c6200/e0c6200.cpp
+++ b/src/devices/cpu/e0c6200/e0c6200.cpp
@@ -40,7 +40,7 @@ void e0c6200_cpu_device::state_string_export(const device_state_entry &entry, st
}
}
-offs_t e0c6200_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t e0c6200_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(e0c6200);
return CPU_DISASSEMBLE_NAME(e0c6200)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/e0c6200/e0c6200.h b/src/devices/cpu/e0c6200/e0c6200.h
index 280ad88bd99..cc23c0b1897 100644
--- a/src/devices/cpu/e0c6200/e0c6200.h
+++ b/src/devices/cpu/e0c6200/e0c6200.h
@@ -16,7 +16,7 @@ class e0c6200_cpu_device : public cpu_device
{
public:
// construction/destruction
- e0c6200_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor program, address_map_constructor data, const char *shortname, const char *source)
+ e0c6200_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program, address_map_constructor data, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 16, 13, -1, program)
, m_data_config("data", ENDIANNESS_BIG, 8, 12, 0, data), m_program(nullptr), m_data(nullptr), m_op(0), m_prev_op(0), m_irq_vector(0), m_irq_id(0), m_possible_irq(false), m_halt(false),
@@ -29,9 +29,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 5; }
- virtual UINT32 execute_max_cycles() const override { return 14; } // longest opcode is 12 cycles, but interrupt service takes up to 14
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 5; }
+ virtual uint32_t execute_max_cycles() const override { return 14; } // longest opcode is 12 cycles, but interrupt service takes up to 14
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_one();
virtual bool check_interrupt() { return false; } // nothing to do by default
@@ -41,9 +41,9 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : nullptr); }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
address_space_config m_program_config;
@@ -51,27 +51,27 @@ protected:
address_space *m_program;
address_space *m_data;
- UINT16 m_op;
- UINT16 m_prev_op;
- UINT8 m_irq_vector; // low 4 bits for new programcounter after interrupt
+ uint16_t m_op;
+ uint16_t m_prev_op;
+ uint8_t m_irq_vector; // low 4 bits for new programcounter after interrupt
int m_irq_id; // for standard_irq_callback(id)
bool m_possible_irq; // indicates interrupts need to be re-checked
bool m_halt; // cpu halt state
bool m_sleep; // cpu sleep state
int m_icount;
- UINT16 m_pc; // 13-bit programcounter: 1-bit bank, 4-bit page, 8-bit 'step'
- UINT16 m_prev_pc;
- UINT16 m_npc; // new bank/page prepared by pset
- UINT16 m_jpc; // actual bank/page destination for jumps
+ uint16_t m_pc; // 13-bit programcounter: 1-bit bank, 4-bit page, 8-bit 'step'
+ uint16_t m_prev_pc;
+ uint16_t m_npc; // new bank/page prepared by pset
+ uint16_t m_jpc; // actual bank/page destination for jumps
// all work registers are 4-bit
- UINT8 m_a; // accumulator
- UINT8 m_b; // generic
- UINT8 m_xp, m_xh, m_xl; // 12-bit index register when combined
- UINT8 m_yp, m_yh, m_yl; // "
- UINT8 m_sp; // stackpointer (SPH, SPL)
- UINT8 m_f; // flags
+ uint8_t m_a; // accumulator
+ uint8_t m_b; // generic
+ uint8_t m_xp, m_xh, m_xl; // 12-bit index register when combined
+ uint8_t m_yp, m_yh, m_yl; // "
+ uint8_t m_sp; // stackpointer (SPH, SPL)
+ uint8_t m_f; // flags
enum
{
C_FLAG = 1,
@@ -81,39 +81,39 @@ protected:
};
// internal data memory read/write
- UINT8 read_mx();
- UINT8 read_my();
- UINT8 read_mn();
- void write_mx(UINT8 data);
- void write_my(UINT8 data);
- void write_mn(UINT8 data);
+ uint8_t read_mx();
+ uint8_t read_my();
+ uint8_t read_mn();
+ void write_mx(uint8_t data);
+ void write_my(uint8_t data);
+ void write_mn(uint8_t data);
// common stack ops
- void push(UINT8 data);
- UINT8 pop();
+ void push(uint8_t data);
+ uint8_t pop();
void push_pc();
void pop_pc();
// misc internal helpers
- void set_cf(UINT8 data);
- void set_zf(UINT8 data);
+ void set_cf(uint8_t data);
+ void set_zf(uint8_t data);
void inc_x();
void inc_y();
void do_branch(int condition = 1);
// opcode handlers
- UINT8 op_inc(UINT8 x);
- UINT8 op_dec(UINT8 x);
- UINT8 op_add(UINT8 x, UINT8 y, int decimal = 0);
- UINT8 op_adc(UINT8 x, UINT8 y, int decimal = 0);
- UINT8 op_sub(UINT8 x, UINT8 y, int decimal = 0);
- UINT8 op_sbc(UINT8 x, UINT8 y, int decimal = 0);
-
- UINT8 op_and(UINT8 x, UINT8 y);
- UINT8 op_or(UINT8 x, UINT8 y);
- UINT8 op_xor(UINT8 x, UINT8 y);
- UINT8 op_rlc(UINT8 x);
- UINT8 op_rrc(UINT8 x);
+ uint8_t op_inc(uint8_t x);
+ uint8_t op_dec(uint8_t x);
+ uint8_t op_add(uint8_t x, uint8_t y, int decimal = 0);
+ uint8_t op_adc(uint8_t x, uint8_t y, int decimal = 0);
+ uint8_t op_sub(uint8_t x, uint8_t y, int decimal = 0);
+ uint8_t op_sbc(uint8_t x, uint8_t y, int decimal = 0);
+
+ uint8_t op_and(uint8_t x, uint8_t y);
+ uint8_t op_or(uint8_t x, uint8_t y);
+ uint8_t op_xor(uint8_t x, uint8_t y);
+ uint8_t op_rlc(uint8_t x);
+ uint8_t op_rrc(uint8_t x);
};
diff --git a/src/devices/cpu/e0c6200/e0c6200d.cpp b/src/devices/cpu/e0c6200/e0c6200d.cpp
index 4935b257470..04025e1c484 100644
--- a/src/devices/cpu/e0c6200/e0c6200d.cpp
+++ b/src/devices/cpu/e0c6200/e0c6200d.cpp
@@ -34,7 +34,7 @@ static const char *const em_name[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 em_flags[] =
+static const uint32_t em_flags[] =
{
0, _OUT, _OVER, _OVER,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -56,7 +56,7 @@ enum e_params
// 0-digit is number of bits per opcode parameter, 0 bits is literal,
// 0x10-digit is for shift-right, 0x100-digit is special flag for r/q param
-static const UINT16 ep_bits[] =
+static const uint16_t ep_bits[] =
{
8, 8, 4, 0x102, 0x122, 0x142, 0x102,
0, 0, 0, 0,
@@ -65,7 +65,7 @@ static const UINT16 ep_bits[] =
};
// redirect for r/q param
-static const UINT8 ep_redirect_r[4] = { ep_A, ep_B, ep_MX, ep_MY };
+static const uint8_t ep_redirect_r[4] = { ep_A, ep_B, ep_MX, ep_MY };
// literal opcode parameter
static const char *const ep_name[] =
@@ -77,11 +77,11 @@ static const char *const ep_name[] =
};
-static char* decode_param(UINT16 opcode, int param, char* buffer)
+static char* decode_param(uint16_t opcode, int param, char* buffer)
{
int bits = ep_bits[param] & 0xf;
int shift = ep_bits[param] >> 4 & 0xf;
- UINT16 opmask = opcode >> shift & ((1 << bits) - 1);
+ uint16_t opmask = opcode >> shift & ((1 << bits) - 1);
// redirect r/q to A/B/MX/MY
if (ep_bits[param] & 0x100)
@@ -112,7 +112,7 @@ static char* decode_param(UINT16 opcode, int param, char* buffer)
CPU_DISASSEMBLE(e0c6200)
{
- UINT16 op = (oprom[1] | oprom[0] << 8) & 0xfff;
+ uint16_t op = (oprom[1] | oprom[0] << 8) & 0xfff;
int m;
int p1 = -1;
diff --git a/src/devices/cpu/e0c6200/e0c6200op.cpp b/src/devices/cpu/e0c6200/e0c6200op.cpp
index e6d2fed3933..ed2d4a06031 100644
--- a/src/devices/cpu/e0c6200/e0c6200op.cpp
+++ b/src/devices/cpu/e0c6200/e0c6200op.cpp
@@ -10,38 +10,38 @@
// MX/MY
-UINT8 e0c6200_cpu_device::read_mx()
+uint8_t e0c6200_cpu_device::read_mx()
{
- UINT16 address = m_xp << 8 | m_xh << 4 | m_xl;
+ uint16_t address = m_xp << 8 | m_xh << 4 | m_xl;
return m_data->read_byte(address) & 0xf;
}
-UINT8 e0c6200_cpu_device::read_my()
+uint8_t e0c6200_cpu_device::read_my()
{
- UINT16 address = m_yp << 8 | m_yh << 4 | m_yl;
+ uint16_t address = m_yp << 8 | m_yh << 4 | m_yl;
return m_data->read_byte(address) & 0xf;
}
-void e0c6200_cpu_device::write_mx(UINT8 data)
+void e0c6200_cpu_device::write_mx(uint8_t data)
{
- UINT16 address = m_xp << 8 | m_xh << 4 | m_xl;
+ uint16_t address = m_xp << 8 | m_xh << 4 | m_xl;
m_data->write_byte(address, data);
}
-void e0c6200_cpu_device::write_my(UINT8 data)
+void e0c6200_cpu_device::write_my(uint8_t data)
{
- UINT16 address = m_yp << 8 | m_yh << 4 | m_yl;
+ uint16_t address = m_yp << 8 | m_yh << 4 | m_yl;
m_data->write_byte(address, data);
}
// Mn(RP)
-UINT8 e0c6200_cpu_device::read_mn()
+uint8_t e0c6200_cpu_device::read_mn()
{
return m_data->read_byte(m_op & 0xf) & 0xf;
}
-void e0c6200_cpu_device::write_mn(UINT8 data)
+void e0c6200_cpu_device::write_mn(uint8_t data)
{
m_data->write_byte(m_op & 0xf, data);
}
@@ -49,12 +49,12 @@ void e0c6200_cpu_device::write_mn(UINT8 data)
// common stack ops
-void e0c6200_cpu_device::push(UINT8 data)
+void e0c6200_cpu_device::push(uint8_t data)
{
m_data->write_byte(--m_sp, data);
}
-UINT8 e0c6200_cpu_device::pop()
+uint8_t e0c6200_cpu_device::pop()
{
return m_data->read_byte(m_sp++) & 0xf;
}
@@ -70,7 +70,7 @@ void e0c6200_cpu_device::push_pc()
void e0c6200_cpu_device::pop_pc()
{
// the highest bit(bank bit) is unchanged
- UINT16 bank = m_pc & 0x1000;
+ uint16_t bank = m_pc & 0x1000;
m_pc = pop();
m_pc |= pop() << 4;
m_pc |= pop() << 8;
@@ -80,13 +80,13 @@ void e0c6200_cpu_device::pop_pc()
// misc internal helpers
-void e0c6200_cpu_device::set_cf(UINT8 data)
+void e0c6200_cpu_device::set_cf(uint8_t data)
{
// set carry flag if bit 4 is set, reset otherwise
m_f = (m_f & ~C_FLAG) | ((data & 0x10) ? C_FLAG : 0);
}
-void e0c6200_cpu_device::set_zf(UINT8 data)
+void e0c6200_cpu_device::set_zf(uint8_t data)
{
// set zero flag if 4-bit data is 0, reset otherwise
m_f = (m_f & ~Z_FLAG) | ((data & 0xf) ? 0 : Z_FLAG);
@@ -121,7 +121,7 @@ void e0c6200_cpu_device::do_branch(int condition)
// arithmetic instructions
-UINT8 e0c6200_cpu_device::op_inc(UINT8 x)
+uint8_t e0c6200_cpu_device::op_inc(uint8_t x)
{
// INC x: increment x (flags: C, Z)
m_icount -= 2;
@@ -130,7 +130,7 @@ UINT8 e0c6200_cpu_device::op_inc(UINT8 x)
return x & 0xf;
}
-UINT8 e0c6200_cpu_device::op_dec(UINT8 x)
+uint8_t e0c6200_cpu_device::op_dec(uint8_t x)
{
// DEC x: decrement x (flags: C, Z)
m_icount -= 2;
@@ -139,7 +139,7 @@ UINT8 e0c6200_cpu_device::op_dec(UINT8 x)
return x & 0xf;
}
-UINT8 e0c6200_cpu_device::op_add(UINT8 x, UINT8 y, int decimal)
+uint8_t e0c6200_cpu_device::op_add(uint8_t x, uint8_t y, int decimal)
{
// ADD x,y: add y to x (flags: C, Z)
m_icount -= 2;
@@ -157,13 +157,13 @@ UINT8 e0c6200_cpu_device::op_add(UINT8 x, UINT8 y, int decimal)
return x & 0xf;
}
-UINT8 e0c6200_cpu_device::op_adc(UINT8 x, UINT8 y, int decimal)
+uint8_t e0c6200_cpu_device::op_adc(uint8_t x, uint8_t y, int decimal)
{
// ADC x,y: add with carry y to x (flags: C, Z)
return op_add(x, y + (m_f & 1), decimal);
}
-UINT8 e0c6200_cpu_device::op_sub(UINT8 x, UINT8 y, int decimal)
+uint8_t e0c6200_cpu_device::op_sub(uint8_t x, uint8_t y, int decimal)
{
// SUB x,y: subtract y from x (flags: C, Z)
m_icount -= 2;
@@ -178,7 +178,7 @@ UINT8 e0c6200_cpu_device::op_sub(UINT8 x, UINT8 y, int decimal)
return x & 0xf;
}
-UINT8 e0c6200_cpu_device::op_sbc(UINT8 x, UINT8 y, int decimal)
+uint8_t e0c6200_cpu_device::op_sbc(uint8_t x, uint8_t y, int decimal)
{
// SBC x,y: subtract with carry y from x (flags: C, Z)
return op_sub(x, y + (m_f & 1), decimal);
@@ -187,7 +187,7 @@ UINT8 e0c6200_cpu_device::op_sbc(UINT8 x, UINT8 y, int decimal)
// logical instructions
-UINT8 e0c6200_cpu_device::op_and(UINT8 x, UINT8 y)
+uint8_t e0c6200_cpu_device::op_and(uint8_t x, uint8_t y)
{
// AND x,y: logical AND x with y (flags: Z)
m_icount -= 2;
@@ -196,7 +196,7 @@ UINT8 e0c6200_cpu_device::op_and(UINT8 x, UINT8 y)
return x;
}
-UINT8 e0c6200_cpu_device::op_or(UINT8 x, UINT8 y)
+uint8_t e0c6200_cpu_device::op_or(uint8_t x, uint8_t y)
{
// OR x,y: logical OR x with y (flags: Z)
m_icount -= 2;
@@ -205,7 +205,7 @@ UINT8 e0c6200_cpu_device::op_or(UINT8 x, UINT8 y)
return x;
}
-UINT8 e0c6200_cpu_device::op_xor(UINT8 x, UINT8 y)
+uint8_t e0c6200_cpu_device::op_xor(uint8_t x, uint8_t y)
{
// XOR x,y: exclusive-OR x with y (flags: Z)
m_icount -= 2;
@@ -214,7 +214,7 @@ UINT8 e0c6200_cpu_device::op_xor(UINT8 x, UINT8 y)
return x;
}
-UINT8 e0c6200_cpu_device::op_rlc(UINT8 x)
+uint8_t e0c6200_cpu_device::op_rlc(uint8_t x)
{
// RLC x: rotate x left through carry (flags: C, Z)
m_icount -= 2;
@@ -223,7 +223,7 @@ UINT8 e0c6200_cpu_device::op_rlc(UINT8 x)
return x & 0xf;
}
-UINT8 e0c6200_cpu_device::op_rrc(UINT8 x)
+uint8_t e0c6200_cpu_device::op_rrc(uint8_t x)
{
// RRC x: rotate x right through carry (flags: C, Z)
// note: RRC only takes 5 clock cycles
diff --git a/src/devices/cpu/e0c6200/e0c6s46.cpp b/src/devices/cpu/e0c6200/e0c6s46.cpp
index 4dc37fa11fe..7563f4bc4a3 100644
--- a/src/devices/cpu/e0c6200/e0c6s46.cpp
+++ b/src/devices/cpu/e0c6200/e0c6s46.cpp
@@ -45,7 +45,7 @@ ADDRESS_MAP_END
// device definitions
-e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: e0c6200_cpu_device(mconfig, E0C6S46, "E0C6S46", tag, owner, clock, ADDRESS_MAP_NAME(e0c6s46_program), ADDRESS_MAP_NAME(e0c6s46_data), "e0c6s46", __FILE__)
, m_vram1(*this, "vram1")
, m_vram2(*this, "vram2"), m_osc(0), m_svd(0), m_lcd_control(0), m_lcd_contrast(0)
@@ -279,7 +279,7 @@ void e0c6s46_device::execute_set_input(int line, int state)
state = (state) ? 1 : 0;
int port = line >> 2 & 1;
- UINT8 bit = 1 << (line & 3);
+ uint8_t bit = 1 << (line & 3);
m_port_k[port] = (m_port_k[port] & ~bit) | (state ? bit : 0);
}
@@ -292,13 +292,13 @@ void e0c6s46_device::execute_set_input(int line, int state)
// R output ports
-void e0c6s46_device::write_r(UINT8 port, UINT8 data)
+void e0c6s46_device::write_r(uint8_t port, uint8_t data)
{
data &= 0xf;
m_port_r[port] = data;
// ports R0x-R3x can be high-impedance
- UINT8 out = data;
+ uint8_t out = data;
if (port < 4 && !(m_r_dir >> port & 1))
out = 0xf;
@@ -327,14 +327,14 @@ void e0c6s46_device::write_r4_out()
// R40: _FOUT(clock inverted output)
// R42: FOUT or _BZ
// R43: BZ(buzzer)
- UINT8 out = (m_port_r[4] & 2) | (m_bz_pulse << 3) | (m_bz_pulse << 2 ^ 4);
+ uint8_t out = (m_port_r[4] & 2) | (m_bz_pulse << 3) | (m_bz_pulse << 2 ^ 4);
m_write_r4(4, out, 0xff);
}
// P I/O ports
-void e0c6s46_device::write_p(UINT8 port, UINT8 data)
+void e0c6s46_device::write_p(uint8_t port, uint8_t data)
{
data &= 0xf;
m_port_p[port] = data;
@@ -352,7 +352,7 @@ void e0c6s46_device::write_p(UINT8 port, UINT8 data)
}
}
-UINT8 e0c6s46_device::read_p(UINT8 port)
+uint8_t e0c6s46_device::read_p(uint8_t port)
{
// return written value if port direction is set to output
if (m_p_dir >> port & 1)
@@ -416,7 +416,7 @@ void e0c6s46_device::clock_clktimer()
m_clktimer_count++;
// irq on falling edge of 32, 8, 2, 1hz
- UINT8 flag = 0;
+ uint8_t flag = 0;
if ((m_clktimer_count & 0x07) == 0)
flag |= 1;
if ((m_clktimer_count & 0x1f) == 0)
@@ -488,7 +488,7 @@ void e0c6s46_device::clock_prgtimer()
bool e0c6s46_device::prgtimer_reset_prescaler()
{
// only 2 to 7 are clock dividers
- UINT8 sel = m_prgtimer_select & 7;
+ uint8_t sel = m_prgtimer_select & 7;
if (sel >= 2)
m_prgtimer_handle->adjust(attotime::from_ticks(2 << (sel ^ 7), unscaled_clock()));
@@ -572,12 +572,12 @@ void e0c6s46_device::clock_bz_1shot()
// LCD Driver
//-------------------------------------------------
-UINT32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+uint32_t e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
// call this 32 times per second (osc1/1024: 32hz at default clock of 32768hz)
for (int bank = 0; bank < 2; bank++)
{
- const UINT8* vram = bank ? m_vram2 : m_vram1;
+ const uint8_t* vram = bank ? m_vram2 : m_vram1;
// determine operating mode
bool lcd_on = false;
@@ -626,7 +626,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
{
// irq flags are reset(acked) when read
- UINT8 flag = m_irqflag[offset];
+ uint8_t flag = m_irqflag[offset];
if (!space.debugger_access())
m_irqflag[offset] = 0;
return flag;
@@ -719,7 +719,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
// irq masks
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15:
{
- static const UINT8 maskmask[6] = { 0xf, 3, 1, 1, 0xf, 0xf };
+ static const uint8_t maskmask[6] = { 0xf, 3, 1, 1, 0xf, 0xf };
m_irqmask[offset-0x10] = data & maskmask[offset-0x10];
m_possible_irq = true;
break;
diff --git a/src/devices/cpu/e0c6200/e0c6s46.h b/src/devices/cpu/e0c6200/e0c6s46.h
index 692f2332cd5..0d3ad7c250c 100644
--- a/src/devices/cpu/e0c6200/e0c6s46.h
+++ b/src/devices/cpu/e0c6200/e0c6s46.h
@@ -66,7 +66,7 @@ typedef void (*e0c6s46_pixel_update_func)(device_t &device, bitmap_ind16 &bitmap
class e0c6s46_device : public e0c6200_cpu_device
{
public:
- e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_write_r0_callback(device_t &device, _Object object) { return downcast<e0c6s46_device &>(device).m_write_r0.set_callback(object); }
@@ -89,7 +89,7 @@ public:
DECLARE_READ8_MEMBER(io_r);
DECLARE_WRITE8_MEMBER(io_w);
- UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
protected:
// device-level overrides
@@ -97,40 +97,40 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_input_lines() const override { return 8; }
+ virtual uint32_t execute_input_lines() const override { return 8; }
virtual void execute_set_input(int line, int state) override;
virtual void execute_one() override;
virtual bool check_interrupt() override;
private:
- required_shared_ptr<UINT8> m_vram1;
- required_shared_ptr<UINT8> m_vram2;
+ required_shared_ptr<uint8_t> m_vram1;
+ required_shared_ptr<uint8_t> m_vram2;
- UINT8 m_irqflag[6];
- UINT8 m_irqmask[6];
- UINT8 m_osc;
- UINT8 m_svd;
+ uint8_t m_irqflag[6];
+ uint8_t m_irqmask[6];
+ uint8_t m_osc;
+ uint8_t m_svd;
- UINT8 m_lcd_control;
- UINT8 m_lcd_contrast;
+ uint8_t m_lcd_control;
+ uint8_t m_lcd_contrast;
e0c6s46_pixel_update_func m_pixel_update_handler;
// i/o ports
devcb_write8 m_write_r0, m_write_r1, m_write_r2, m_write_r3, m_write_r4;
devcb_read8 m_read_p0, m_read_p1, m_read_p2, m_read_p3;
devcb_write8 m_write_p0, m_write_p1, m_write_p2, m_write_p3;
- void write_r(UINT8 port, UINT8 data);
+ void write_r(uint8_t port, uint8_t data);
void write_r4_out();
- void write_p(UINT8 port, UINT8 data);
- UINT8 read_p(UINT8 port);
+ void write_p(uint8_t port, uint8_t data);
+ uint8_t read_p(uint8_t port);
- UINT8 m_port_r[5];
- UINT8 m_r_dir;
- UINT8 m_port_p[4];
- UINT8 m_p_dir;
- UINT8 m_p_pullup;
- UINT8 m_port_k[2];
- UINT8 m_dfk0;
+ uint8_t m_port_r[5];
+ uint8_t m_r_dir;
+ uint8_t m_port_p[4];
+ uint8_t m_p_dir;
+ uint8_t m_p_pullup;
+ uint8_t m_port_k[2];
+ uint8_t m_dfk0;
// timers
int m_256_src_pulse;
@@ -139,34 +139,34 @@ private:
int m_watchdog_count;
void clock_watchdog();
- UINT8 m_clktimer_count;
+ uint8_t m_clktimer_count;
void clock_clktimer();
- UINT8 m_stopwatch_on;
+ uint8_t m_stopwatch_on;
int m_swl_cur_pulse;
int m_swl_slice;
int m_swl_count;
int m_swh_count;
void clock_stopwatch();
- UINT8 m_prgtimer_select;
- UINT8 m_prgtimer_on;
+ uint8_t m_prgtimer_select;
+ uint8_t m_prgtimer_on;
int m_prgtimer_src_pulse;
int m_prgtimer_cur_pulse;
- UINT8 m_prgtimer_count;
- UINT8 m_prgtimer_reload;
+ uint8_t m_prgtimer_count;
+ uint8_t m_prgtimer_reload;
emu_timer *m_prgtimer_handle;
TIMER_CALLBACK_MEMBER(prgtimer_cb);
bool prgtimer_reset_prescaler();
void clock_prgtimer();
- UINT8 m_bz_43_on;
- UINT8 m_bz_freq;
- UINT8 m_bz_envelope;
- UINT8 m_bz_duty_ratio;
- UINT8 m_bz_1shot_on;
+ uint8_t m_bz_43_on;
+ uint8_t m_bz_freq;
+ uint8_t m_bz_envelope;
+ uint8_t m_bz_duty_ratio;
+ uint8_t m_bz_1shot_on;
bool m_bz_1shot_running;
- UINT8 m_bz_1shot_count;
+ uint8_t m_bz_1shot_count;
int m_bz_pulse;
emu_timer *m_buzzer_handle;
TIMER_CALLBACK_MEMBER(buzzer_cb);
diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp
index 48f3e97968f..a69f5d9dbcd 100644
--- a/src/devices/cpu/e132xs/32xsdasm.cpp
+++ b/src/devices/cpu/e132xs/32xsdasm.cpp
@@ -49,17 +49,17 @@ static const char *const SETxx[] =
static int size, global_fp;
static offs_t base_pc;
-static const UINT8 *base_oprom;
+static const uint8_t *base_oprom;
#define READ_OP_DASM(p) ((base_oprom[(p) - base_pc] << 8) | base_oprom[(p) + 1 - base_pc])
-static void LL_format(char *source, char *dest, UINT16 op)
+static void LL_format(char *source, char *dest, uint16_t op)
{
strcpy(source, L_REG[(SOURCECODE(op)+global_fp)%64]);
strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
}
-static void LR_format(char *source, char *dest, UINT16 op)
+static void LR_format(char *source, char *dest, uint16_t op)
{
if( SOURCEBIT(op) )
{
@@ -73,7 +73,7 @@ static void LR_format(char *source, char *dest, UINT16 op)
strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
}
-static void RR_format(char *source, char *dest, UINT16 op, unsigned h_flag)
+static void RR_format(char *source, char *dest, uint16_t op, unsigned h_flag)
{
if( SOURCEBIT(op) )
{
@@ -94,10 +94,10 @@ static void RR_format(char *source, char *dest, UINT16 op, unsigned h_flag)
}
}
-static UINT32 LRconst_format(char *source, char *dest, UINT16 op, unsigned *pc)
+static uint32_t LRconst_format(char *source, char *dest, uint16_t op, unsigned *pc)
{
- UINT16 next_op;
- UINT32 const_val;
+ uint16_t next_op;
+ uint32_t const_val;
if( SOURCEBIT(op) )
{
@@ -117,7 +117,7 @@ static UINT32 LRconst_format(char *source, char *dest, UINT16 op, unsigned *pc)
if( E_BIT(next_op) )
{
- UINT16 next_op2;
+ uint16_t next_op2;
size = 6;
@@ -144,10 +144,10 @@ static UINT32 LRconst_format(char *source, char *dest, UINT16 op, unsigned *pc)
return const_val;
}
-static UINT32 RRconst_format(char *source, char *dest, UINT16 op, unsigned *pc)
+static uint32_t RRconst_format(char *source, char *dest, uint16_t op, unsigned *pc)
{
- UINT16 next_op;
- UINT32 const_val;
+ uint16_t next_op;
+ uint32_t const_val;
if( SOURCEBIT(op) )
{
@@ -174,7 +174,7 @@ static UINT32 RRconst_format(char *source, char *dest, UINT16 op, unsigned *pc)
if( E_BIT(next_op) )
{
- UINT16 next_op2;
+ uint16_t next_op2;
size = 6;
@@ -201,10 +201,10 @@ static UINT32 RRconst_format(char *source, char *dest, UINT16 op, unsigned *pc)
return const_val;
}
-static INT32 Rimm_format(char *dest, UINT16 op, unsigned *pc, unsigned h_flag)
+static int32_t Rimm_format(char *dest, uint16_t op, unsigned *pc, unsigned h_flag)
{
- UINT16 imm1, imm2;
- INT32 ret;
+ uint16_t imm1, imm2;
+ int32_t ret;
int n = N_VALUE(op);
@@ -243,7 +243,7 @@ static INT32 Rimm_format(char *dest, UINT16 op, unsigned *pc, unsigned h_flag)
case 19:
*pc += 2;
- ret = (INT32) (0xffff0000 | READ_OP_DASM(*pc));
+ ret = (int32_t) (0xffff0000 | READ_OP_DASM(*pc));
size = 4;
return ret;
@@ -289,14 +289,14 @@ static INT32 Rimm_format(char *dest, UINT16 op, unsigned *pc, unsigned h_flag)
}
}
-static UINT8 Ln_format(char *dest, UINT16 op)
+static uint8_t Ln_format(char *dest, uint16_t op)
{
strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
return N_VALUE(op);
}
-static UINT8 Rn_format(char *dest, UINT16 op)
+static uint8_t Rn_format(char *dest, uint16_t op)
{
if( DESTBIT(op) )
{
@@ -310,13 +310,13 @@ static UINT8 Rn_format(char *dest, UINT16 op)
return N_VALUE(op);
}
-static INT32 PCrel_format(UINT16 op, unsigned pc)
+static int32_t PCrel_format(uint16_t op, unsigned pc)
{
- INT32 ret;
+ int32_t ret;
if( op & 0x80 ) //bit 7 = 1
{
- UINT16 next;
+ uint16_t next;
size = 4;
@@ -342,9 +342,9 @@ static INT32 PCrel_format(UINT16 op, unsigned pc)
return (pc + ret);
}
-static UINT32 RRdis_format(char *source, char *dest, UINT16 op, UINT16 next_op, unsigned pc)
+static uint32_t RRdis_format(char *source, char *dest, uint16_t op, uint16_t next_op, unsigned pc)
{
- UINT32 ret;
+ uint32_t ret;
if( SOURCEBIT(op) )
{
@@ -366,7 +366,7 @@ static UINT32 RRdis_format(char *source, char *dest, UINT16 op, UINT16 next_op,
if( E_BIT(next_op) )
{
- UINT16 next;
+ uint16_t next;
size = 6;
@@ -392,15 +392,15 @@ static UINT32 RRdis_format(char *source, char *dest, UINT16 op, UINT16 next_op,
return ret;
}
-unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned h_flag, int private_fp)
+unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsigned h_flag, int private_fp)
{
- UINT16 op;
- UINT8 op_num;
+ uint16_t op;
+ uint8_t op_num;
- UINT8 source_code, dest_code, source_bit, dest_bit;
+ uint8_t source_code, dest_code, source_bit, dest_bit;
char source[5] = "\0", dest[5] = "\0";
- UINT32 flags = 0;
+ uint32_t flags = 0;
base_pc = pc;
base_oprom = oprom;
@@ -498,11 +498,11 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
if( xcode < 4 )
{
- UINT16 lim;
+ uint16_t lim;
if( E_BIT(op) )
{
- UINT16 next_op;
+ uint16_t next_op;
size = 6;
@@ -516,12 +516,12 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
lim = op & 0xfff;
}
- sprintf(buffer, "XM%x %s, %s, $%x", (UINT8)(float) pow(2.0, xcode), dest, source, lim);
+ sprintf(buffer, "XM%x %s, %s, $%x", (uint8_t)(float) pow(2.0, xcode), dest, source, lim);
}
else
{
- sprintf(buffer, "XX%x %s, %s, 0", (UINT8)(float) pow(2.0, (xcode - 4)), dest, source);
+ sprintf(buffer, "XX%x %s, %s, 0", (uint8_t)(float) pow(2.0, (xcode - 4)), dest, source);
}
break;
@@ -530,7 +530,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// MASK
case 0x14: case 0x15: case 0x16: case 0x17:
{
- UINT32 const_val = RRconst_format(source, dest, op, &pc);
+ uint32_t const_val = RRconst_format(source, dest, op, &pc);
sprintf(buffer, "MASK %s, %s, $%x", dest, source, const_val);
@@ -540,7 +540,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SUM
case 0x18: case 0x19: case 0x1a: case 0x1b:
{
- UINT32 const_val = RRconst_format(source, dest, op, &pc);
+ uint32_t const_val = RRconst_format(source, dest, op, &pc);
if( source_code == SR_REGISTER && !source_bit )
{
@@ -557,7 +557,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SUMS
case 0x1c: case 0x1d: case 0x1e: case 0x1f:
{
- UINT32 const_val = RRconst_format(source, dest, op, &pc);
+ uint32_t const_val = RRconst_format(source, dest, op, &pc);
if( source_code == SR_REGISTER && !source_bit )
{
@@ -775,7 +775,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// CMPI
case 0x60: case 0x61: case 0x62: case 0x63:
{
- UINT32 imm = Rimm_format(dest, op, &pc, 0);
+ uint32_t imm = Rimm_format(dest, op, &pc, 0);
sprintf(buffer, "CMPI %s, $%x", dest, imm);
@@ -785,7 +785,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// MOVI
case 0x64: case 0x65: case 0x66: case 0x67:
{
- UINT32 imm = Rimm_format(dest, op, &pc, h_flag);
+ uint32_t imm = Rimm_format(dest, op, &pc, h_flag);
sprintf(buffer, "MOVI %s, $%x", dest, imm);
@@ -795,7 +795,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// ADDI
case 0x68: case 0x69: case 0x6a: case 0x6b:
{
- UINT32 imm = Rimm_format(dest, op, &pc, 0);
+ uint32_t imm = Rimm_format(dest, op, &pc, 0);
if( !N_VALUE(op) )
{
@@ -812,7 +812,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// ADDSI
case 0x6c: case 0x6d: case 0x6e: case 0x6f:
{
- UINT32 imm = Rimm_format(dest, op, &pc, 0);
+ uint32_t imm = Rimm_format(dest, op, &pc, 0);
if( !N_VALUE(op) )
{
@@ -829,7 +829,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// CMPBI
case 0x70: case 0x71: case 0x72: case 0x73:
{
- UINT32 imm = Rimm_format(dest, op, &pc, 0);
+ uint32_t imm = Rimm_format(dest, op, &pc, 0);
if( !N_VALUE(op) )
{
@@ -849,7 +849,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// ANDNI
case 0x74: case 0x75: case 0x76: case 0x77:
{
- UINT32 imm = Rimm_format(dest, op, &pc, 0);
+ uint32_t imm = Rimm_format(dest, op, &pc, 0);
if( N_VALUE(op) == 31 )
imm = 0x7fffffff; //bit 31 = 0, others = 1
@@ -862,7 +862,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// ORI
case 0x78: case 0x79: case 0x7a: case 0x7b:
{
- UINT32 imm = Rimm_format(dest, op, &pc, 0);
+ uint32_t imm = Rimm_format(dest, op, &pc, 0);
sprintf(buffer, "ORI %s, $%x", dest, imm);
@@ -872,7 +872,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// XORI
case 0x7c: case 0x7d: case 0x7e: case 0x7f:
{
- UINT32 imm = Rimm_format(dest, op, &pc, 0);
+ uint32_t imm = Rimm_format(dest, op, &pc, 0);
sprintf(buffer, "XORI %s, $%x", dest, imm);
@@ -882,7 +882,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SHRDI
case 0x80: case 0x81:
{
- UINT8 n = Ln_format(dest, op);
+ uint8_t n = Ln_format(dest, op);
sprintf(buffer, "SHRDI %s, $%x", dest, n);
@@ -910,7 +910,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SARDI
case 0x84: case 0x85:
{
- UINT8 n = Ln_format(dest, op);
+ uint8_t n = Ln_format(dest, op);
sprintf(buffer, "SARDI %s, $%x", dest, n);
@@ -938,7 +938,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SHLDI
case 0x88: case 0x89:
{
- UINT8 n = Ln_format(dest, op);
+ uint8_t n = Ln_format(dest, op);
sprintf(buffer, "SHLDI %s, $%x", dest, n);
@@ -992,8 +992,8 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// LDxx.D/A/IOD/IOA
case 0x90: case 0x91: case 0x92: case 0x93:
{
- UINT16 next_op = READ_OP_DASM(pc + 2);
- UINT32 dis = RRdis_format(source, dest, op, next_op, pc);
+ uint16_t next_op = READ_OP_DASM(pc + 2);
+ uint32_t dis = RRdis_format(source, dest, op, next_op, pc);
if( size == 2 )
size = 4;
@@ -1110,8 +1110,8 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// LDxx.N/S
case 0x94: case 0x95: case 0x96: case 0x97:
{
- UINT16 next_op = READ_OP_DASM(pc + 2);
- UINT32 dis = RRdis_format(source, dest, op, next_op, pc);
+ uint16_t next_op = READ_OP_DASM(pc + 2);
+ uint32_t dis = RRdis_format(source, dest, op, next_op, pc);
if( size == 2 )
size = 4;
@@ -1179,8 +1179,8 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// STxx.D/A/IOD/IOA
case 0x98: case 0x99: case 0x9a: case 0x9b:
{
- UINT16 next_op = READ_OP_DASM(pc + 2);
- UINT32 dis = RRdis_format(source, dest, op, next_op, pc);
+ uint16_t next_op = READ_OP_DASM(pc + 2);
+ uint32_t dis = RRdis_format(source, dest, op, next_op, pc);
if( size == 2 )
size = 4;
@@ -1300,8 +1300,8 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// STxx.N/S
case 0x9c: case 0x9d: case 0x9e: case 0x9f:
{
- UINT16 next_op = READ_OP_DASM(pc + 2);
- UINT32 dis = RRdis_format(source, dest, op, next_op, pc);
+ uint16_t next_op = READ_OP_DASM(pc + 2);
+ uint32_t dis = RRdis_format(source, dest, op, next_op, pc);
if( size == 2 )
size = 4;
@@ -1372,7 +1372,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SHRI
case 0xa0: case 0xa1: case 0xa2: case 0xa3:
{
- UINT8 n = Rn_format(dest, op);
+ uint8_t n = Rn_format(dest, op);
sprintf(buffer, "SHRI %s, $%x", dest, n);
@@ -1382,7 +1382,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SARI
case 0xa4: case 0xa5: case 0xa6: case 0xa7:
{
- UINT8 n = Rn_format(dest, op);
+ uint8_t n = Rn_format(dest, op);
sprintf(buffer, "SARI %s, $%x", dest, n);
@@ -1392,7 +1392,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SHLI
case 0xa8: case 0xa9: case 0xaa: case 0xab:
{
- UINT8 n = Rn_format(dest, op);
+ uint8_t n = Rn_format(dest, op);
sprintf(buffer, "SHLI %s, $%x", dest, n);
@@ -1420,7 +1420,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// SETxx - SETADR - FETCH
case 0xb8: case 0xb9: case 0xba: case 0xbb:
{
- UINT8 n = Rn_format(dest, op);
+ uint8_t n = Rn_format(dest, op);
if( dest_code == PC_REGISTER && !dest_bit )
{
@@ -1576,7 +1576,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// EXTEND
case 0xce:
{
- UINT16 extended_op;
+ uint16_t extended_op;
LL_format(source, dest, op);
@@ -1749,7 +1749,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBV
case 0xe0:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBV $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1760,7 +1760,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBNV
case 0xe1:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBNV $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1771,7 +1771,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBE
case 0xe2:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBE $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1782,7 +1782,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBNE
case 0xe3:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBNE $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1793,7 +1793,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBC
case 0xe4:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBC $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1804,7 +1804,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBNC
case 0xe5:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBNC $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1815,7 +1815,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBSE
case 0xe6:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBSE $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1826,7 +1826,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBHT
case 0xe7:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBHT $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1837,7 +1837,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBN
case 0xe8:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBN $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1848,7 +1848,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBNN
case 0xe9:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBNN $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1859,7 +1859,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBLE
case 0xea:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBLE $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1870,7 +1870,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBGT
case 0xeb:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBGT $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1881,7 +1881,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// DBR
case 0xec:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "DBR $%x", rel);
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
@@ -1902,7 +1902,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// CALL
case 0xee: case 0xef:
{
- UINT32 const_val = LRconst_format(source, dest, op, &pc);
+ uint32_t const_val = LRconst_format(source, dest, op, &pc);
if( source_code == SR_REGISTER && !source_bit )
{
@@ -1921,7 +1921,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BV
case 0xf0:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BV $%x", rel);
@@ -1931,7 +1931,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BNV
case 0xf1:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BNV $%x", rel);
@@ -1941,7 +1941,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BE
case 0xf2:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BE $%x", rel);
@@ -1951,7 +1951,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BNE
case 0xf3:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BNE $%x", rel);
@@ -1961,7 +1961,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BC
case 0xf4:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BC $%x", rel);
@@ -1971,7 +1971,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BNC
case 0xf5:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BNC $%x", rel);
@@ -1981,7 +1981,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BSE
case 0xf6:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BSE $%x", rel);
@@ -1991,7 +1991,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BHT
case 0xf7:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BHT $%x", rel);
@@ -2001,7 +2001,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BN
case 0xf8:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BN $%x", rel);
@@ -2011,7 +2011,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BNN
case 0xf9:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BNN $%x", rel);
@@ -2021,7 +2021,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BLE
case 0xfa:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BLE $%x", rel);
@@ -2031,7 +2031,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BGT
case 0xfb:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BGT $%x", rel);
@@ -2041,7 +2041,7 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// BR
case 0xfc:
{
- INT32 rel = PCrel_format(op, pc) + 2;
+ int32_t rel = PCrel_format(op, pc) + 2;
sprintf(buffer, "BR $%x", rel);
@@ -2051,8 +2051,8 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
// TRAPxx - TRAP
case 0xfd: case 0xfe: case 0xff:
{
- UINT8 code = ((op & 0x300) >> 6) | (op & 0x03);
- UINT8 trapno = (op & 0xfc) >> 2;
+ uint8_t code = ((op & 0x300) >> 6) | (op & 0x03);
+ uint8_t trapno = (op & 0xfc) >> 2;
switch( code )
{
diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp
index 7d01744147d..8bbdd4f5bbb 100644
--- a/src/devices/cpu/e132xs/e132xs.cpp
+++ b/src/devices/cpu/e132xs/e132xs.cpp
@@ -203,8 +203,8 @@
after a branch
- Changed hyperstone_movi to decrement PC by 2 when G0 (PC) is modified so that the
next opcode isn't skipped after a branch
- - Changed hyperstone_movi to default to a UINT32 being moved into the register
- as opposed to a UINT8. This is wrong, the bit width is quite likely to be
+ - Changed hyperstone_movi to default to a uint32_t being moved into the register
+ as opposed to a uint8_t. This is wrong, the bit width is quite likely to be
dependent on the n field in the Rimm instruction type. However, vamphalf uses
MOVI G0,[FFFF]FBAC (n=$13) since there's apparently no absolute branch opcode.
What kind of CPU is this that it doesn't have an absolute jump in its branch
@@ -238,10 +238,10 @@
#define EXTRA_U (decode)->extra.u
#define EXTRA_S (decode)->extra.s
-#define SET_SREG( _data_ ) ((decode)->src_is_local ? set_local_register((decode)->src, (UINT32)_data_) : set_global_register((decode)->src, (UINT32)_data_))
-#define SET_SREGF( _data_ ) ((decode)->src_is_local ? set_local_register((decode)->src + 1, (UINT32)_data_) : set_global_register((decode)->src + 1, (UINT32)_data_))
-#define SET_DREG( _data_ ) ((decode)->dst_is_local ? set_local_register((decode)->dst, (UINT32)_data_) : set_global_register((decode)->dst, (UINT32)_data_))
-#define SET_DREGF( _data_ ) ((decode)->dst_is_local ? set_local_register((decode)->dst + 1, (UINT32)_data_) : set_global_register((decode)->dst + 1, (UINT32)_data_))
+#define SET_SREG( _data_ ) ((decode)->src_is_local ? set_local_register((decode)->src, (uint32_t)_data_) : set_global_register((decode)->src, (uint32_t)_data_))
+#define SET_SREGF( _data_ ) ((decode)->src_is_local ? set_local_register((decode)->src + 1, (uint32_t)_data_) : set_global_register((decode)->src + 1, (uint32_t)_data_))
+#define SET_DREG( _data_ ) ((decode)->dst_is_local ? set_local_register((decode)->dst, (uint32_t)_data_) : set_global_register((decode)->dst, (uint32_t)_data_))
+#define SET_DREGF( _data_ ) ((decode)->dst_is_local ? set_local_register((decode)->dst + 1, (uint32_t)_data_) : set_global_register((decode)->dst + 1, (uint32_t)_data_))
#define SRC_IS_PC (!(decode)->src_is_local && (decode)->src == PC_REGISTER)
#define DST_IS_PC (!(decode)->dst_is_local && (decode)->dst == PC_REGISTER)
@@ -292,8 +292,8 @@ ADDRESS_MAP_END
// hyperstone_device - constructor
//-------------------------------------------------
-hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 io_data_width, address_map_constructor internal_map, const char *shortname, const char *source)
+hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map),
m_io_config("io", ENDIANNESS_BIG, io_data_width, 15),
@@ -309,7 +309,7 @@ hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *
// e116t_device - constructor
//-------------------------------------------------
-e116t_device::e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e116t_device::e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-16T", tag, owner, clock, E116T, 16, 16, ADDRESS_MAP_NAME(e116_4k_iram_map), "e116t", __FILE__)
{
}
@@ -319,7 +319,7 @@ e116t_device::e116t_device(const machine_config &mconfig, const char *tag, devic
// e116xt_device - constructor
//-------------------------------------------------
-e116xt_device::e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e116xt_device::e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-16XT", tag, owner, clock, E116XT, 16, 16, ADDRESS_MAP_NAME(e116_8k_iram_map), "e116xt", __FILE__)
{
}
@@ -329,7 +329,7 @@ e116xt_device::e116xt_device(const machine_config &mconfig, const char *tag, dev
// e116xs_device - constructor
//-------------------------------------------------
-e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-16XS", tag, owner, clock, E116XS, 16, 16, ADDRESS_MAP_NAME(e116_16k_iram_map), "e116xs", __FILE__)
{
}
@@ -339,7 +339,7 @@ e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, dev
// e116xsr_device - constructor
//-------------------------------------------------
-e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-16XSR", tag, owner, clock, E116XT, 16, 16, ADDRESS_MAP_NAME(e116_16k_iram_map), "e116xsr", __FILE__)
{
}
@@ -349,7 +349,7 @@ e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, d
// e132n_device - constructor
//-------------------------------------------------
-e132n_device::e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e132n_device::e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-32N", tag, owner, clock, E132N, 32, 32, ADDRESS_MAP_NAME(e132_4k_iram_map), "e132n", __FILE__)
{
}
@@ -359,7 +359,7 @@ e132n_device::e132n_device(const machine_config &mconfig, const char *tag, devic
// e132t_device - constructor
//-------------------------------------------------
-e132t_device::e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e132t_device::e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-32T", tag, owner, clock, E132T, 32, 32, ADDRESS_MAP_NAME(e132_4k_iram_map), "e132t", __FILE__)
{
}
@@ -369,7 +369,7 @@ e132t_device::e132t_device(const machine_config &mconfig, const char *tag, devic
// e132xn_device - constructor
//-------------------------------------------------
-e132xn_device::e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e132xn_device::e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-32XN", tag, owner, clock, E132XN, 32, 32, ADDRESS_MAP_NAME(e132_8k_iram_map), "e132xn", __FILE__)
{
}
@@ -379,7 +379,7 @@ e132xn_device::e132xn_device(const machine_config &mconfig, const char *tag, dev
// e132xt_device - constructor
//-------------------------------------------------
-e132xt_device::e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e132xt_device::e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-32XT", tag, owner, clock, E132XT, 32, 32, ADDRESS_MAP_NAME(e132_8k_iram_map), "e132xt", __FILE__)
{
}
@@ -389,7 +389,7 @@ e132xt_device::e132xt_device(const machine_config &mconfig, const char *tag, dev
// e132xs_device - constructor
//-------------------------------------------------
-e132xs_device::e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e132xs_device::e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-32XS", tag, owner, clock, E132XS, 32, 32, ADDRESS_MAP_NAME(e132_16k_iram_map), "e132xs", __FILE__)
{
}
@@ -399,7 +399,7 @@ e132xs_device::e132xs_device(const machine_config &mconfig, const char *tag, dev
// e132xsr_device - constructor
//-------------------------------------------------
-e132xsr_device::e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+e132xsr_device::e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "E1-32XSR", tag, owner, clock, E132XSR, 32, 32, ADDRESS_MAP_NAME(e132_16k_iram_map), "e132xsr", __FILE__)
{
}
@@ -409,7 +409,7 @@ e132xsr_device::e132xsr_device(const machine_config &mconfig, const char *tag, d
// gms30c2116_device - constructor
//-------------------------------------------------
-gms30c2116_device::gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+gms30c2116_device::gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "GMS30C2116", tag, owner, clock, GMS30C2116, 16, 16, ADDRESS_MAP_NAME(e116_4k_iram_map), "gms30c2116", __FILE__)
{
}
@@ -419,7 +419,7 @@ gms30c2116_device::gms30c2116_device(const machine_config &mconfig, const char *
// gms30c2132_device - constructor
//-------------------------------------------------
-gms30c2132_device::gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+gms30c2132_device::gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "GMS30C2132", tag, owner, clock, GMS30C2132, 32, 32, ADDRESS_MAP_NAME(e132_4k_iram_map), "gms30c2132", __FILE__)
{
}
@@ -429,7 +429,7 @@ gms30c2132_device::gms30c2132_device(const machine_config &mconfig, const char *
// gms30c2216_device - constructor
//-------------------------------------------------
-gms30c2216_device::gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+gms30c2216_device::gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "GMS30C2216", tag, owner, clock, GMS30C2216, 16, 16, ADDRESS_MAP_NAME(e116_8k_iram_map), "gms30c2216", __FILE__)
{
}
@@ -439,15 +439,15 @@ gms30c2216_device::gms30c2216_device(const machine_config &mconfig, const char *
// gms30c2232_device - constructor
//-------------------------------------------------
-gms30c2232_device::gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+gms30c2232_device::gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hyperstone_device(mconfig, "GMS30C2232", tag, owner, clock, GMS30C2232, 32, 32, ADDRESS_MAP_NAME(e132_8k_iram_map), "gms30c2232", __FILE__)
{
}
/* Return the entry point for a determinated trap */
-UINT32 hyperstone_device::get_trap_addr(UINT8 trapno)
+uint32_t hyperstone_device::get_trap_addr(uint8_t trapno)
{
- UINT32 addr;
+ uint32_t addr;
if( m_trap_entry == 0xffffff00 ) /* @ MEM3 */
{
addr = trapno * 4;
@@ -462,9 +462,9 @@ UINT32 hyperstone_device::get_trap_addr(UINT8 trapno)
}
/* Return the entry point for a determinated emulated code (the one for "extend" opcode is reserved) */
-UINT32 hyperstone_device::get_emu_code_addr(UINT8 num) /* num is OP */
+uint32_t hyperstone_device::get_emu_code_addr(uint8_t num) /* num is OP */
{
- UINT32 addr;
+ uint32_t addr;
if( m_trap_entry == 0xffffff00 ) /* @ MEM3 */
{
addr = (m_trap_entry - 0x100) | ((num & 0xf) << 4);
@@ -569,7 +569,7 @@ void hyperstone_device::hyperstone_set_trap_entry(int which)
#define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed
-#define CHECK_C(x) (SR = (SR & ~0x00000001) | (((x) & (((UINT64)1) << 32)) ? 1 : 0 ))
+#define CHECK_C(x) (SR = (SR & ~0x00000001) | (((x) & (((uint64_t)1) << 32)) ? 1 : 0 ))
#define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 8: 0))
#define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) ? 8: 0))
#define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | ((((z) ^ (y)) & ((y) ^ (x)) & 0x80000000) ? 8: 0))
@@ -582,16 +582,16 @@ void hyperstone_device::hyperstone_set_trap_entry(int which)
//the user program can only changes the above 2 flags
-UINT32 hyperstone_device::compute_tr()
+uint32_t hyperstone_device::compute_tr()
{
- UINT64 cycles_since_base = total_cycles() - m_tr_base_cycles;
- UINT64 clocks_since_base = cycles_since_base >> m_clck_scale;
+ uint64_t cycles_since_base = total_cycles() - m_tr_base_cycles;
+ uint64_t clocks_since_base = cycles_since_base >> m_clck_scale;
return m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
}
void hyperstone_device::update_timer_prescale()
{
- UINT32 prevtr = compute_tr();
+ uint32_t prevtr = compute_tr();
TPR &= ~0x80000000;
m_clck_scale = (TPR >> 26) & m_clock_scale_mask;
m_clock_cycles_1 = 1 << m_clck_scale;
@@ -605,26 +605,26 @@ void hyperstone_device::update_timer_prescale()
void hyperstone_device::adjust_timer_interrupt()
{
- UINT64 cycles_since_base = total_cycles() - m_tr_base_cycles;
- UINT64 clocks_since_base = cycles_since_base >> m_clck_scale;
- UINT64 cycles_until_next_clock = cycles_since_base - (clocks_since_base << m_clck_scale);
+ uint64_t cycles_since_base = total_cycles() - m_tr_base_cycles;
+ uint64_t clocks_since_base = cycles_since_base >> m_clck_scale;
+ uint64_t cycles_until_next_clock = cycles_since_base - (clocks_since_base << m_clck_scale);
if (cycles_until_next_clock == 0)
- cycles_until_next_clock = (UINT64)(1 << m_clck_scale);
+ cycles_until_next_clock = (uint64_t)(1 << m_clck_scale);
/* special case: if we have a change pending, set a timer to fire then */
if (TPR & 0x80000000)
{
- UINT64 clocks_until_int = m_tr_clocks_per_tick - (clocks_since_base % m_tr_clocks_per_tick);
- UINT64 cycles_until_int = (clocks_until_int << m_clck_scale) + cycles_until_next_clock;
+ uint64_t clocks_until_int = m_tr_clocks_per_tick - (clocks_since_base % m_tr_clocks_per_tick);
+ uint64_t cycles_until_int = (clocks_until_int << m_clck_scale) + cycles_until_next_clock;
m_timer->adjust(cycles_to_attotime(cycles_until_int + 1), 1);
}
/* else if the timer interrupt is enabled, configure it to fire at the appropriate time */
else if (!(FCR & 0x00800000))
{
- UINT32 curtr = m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
- UINT32 delta = TCR - curtr;
+ uint32_t curtr = m_tr_base_value + (clocks_since_base / m_tr_clocks_per_tick);
+ uint32_t delta = TCR - curtr;
if (delta > 0x80000000)
{
if (!m_timer_int_pending)
@@ -632,8 +632,8 @@ void hyperstone_device::adjust_timer_interrupt()
}
else
{
- UINT64 clocks_until_int = mulu_32x32(delta, m_tr_clocks_per_tick);
- UINT64 cycles_until_int = (clocks_until_int << m_clck_scale) + cycles_until_next_clock;
+ uint64_t clocks_until_int = mulu_32x32(delta, m_tr_clocks_per_tick);
+ uint64_t cycles_until_int = (clocks_until_int << m_clck_scale) + cycles_until_next_clock;
m_timer->adjust(cycles_to_attotime(cycles_until_int));
}
}
@@ -663,7 +663,7 @@ TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback )
-UINT32 hyperstone_device::get_global_register(UINT8 code)
+uint32_t hyperstone_device::get_global_register(uint8_t code)
{
/*
if( code >= 16 )
@@ -707,14 +707,14 @@ UINT32 hyperstone_device::get_global_register(UINT8 code)
return m_global_regs[code];
}
-void hyperstone_device::set_local_register(UINT8 code, UINT32 val)
+void hyperstone_device::set_local_register(uint8_t code, uint32_t val)
{
- UINT8 new_code = (code + GET_FP) % 64;
+ uint8_t new_code = (code + GET_FP) % 64;
m_local_regs[new_code] = val;
}
-void hyperstone_device::set_global_register(UINT8 code, UINT32 val)
+void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
{
//TODO: add correct FER set instruction
@@ -731,7 +731,7 @@ void hyperstone_device::set_global_register(UINT8 code, UINT32 val)
}
else
{
- UINT32 oldval = m_global_regs[code];
+ uint32_t oldval = m_global_regs[code];
if( code != ISR_REGISTER )
m_global_regs[code] = val;
else
@@ -831,11 +831,11 @@ void hyperstone_device::set_global_register(UINT8 code, UINT32 val)
#define LOCAL 1
-static const INT32 immediate_values[32] =
+static const int32_t immediate_values[32] =
{
0, 1, 2, 3, 4, 5, 6, 7,
8, 9, 10, 11, 12, 13, 14, 15,
- 16, 0, 0, 0, 32, 64, 128, static_cast<INT32>(0x80000000),
+ 16, 0, 0, 0, 32, 64, 128, static_cast<int32_t>(0x80000000),
-8, -7, -6, -5, -4, -3, -2, -1
};
@@ -846,7 +846,7 @@ do
{ \
if(local) \
{ \
- UINT8 code = (decode)->src; \
+ uint8_t code = (decode)->src; \
(decode)->src_is_local = 1; \
code = ((decode)->src + GET_FP) % 64; /* registers offset by frame pointer */\
SREG = m_local_regs[code]; \
@@ -887,7 +887,7 @@ do
{ \
if(local) \
{ \
- UINT8 code = (decode)->dst; \
+ uint8_t code = (decode)->dst; \
(decode)->dst_is_local = 1; \
code = ((decode)->dst + GET_FP) % 64; /* registers offset by frame pointer */\
DREG = m_local_regs[code]; \
@@ -1023,14 +1023,14 @@ do
#define decode_const(decode) \
do \
{ \
- UINT16 imm_1 = READ_OP(PC); \
+ uint16_t imm_1 = READ_OP(PC); \
\
PC += 2; \
m_instruction_length = 2; \
\
if( E_BIT(imm_1) ) \
{ \
- UINT16 imm_2 = READ_OP(PC); \
+ uint16_t imm_2 = READ_OP(PC); \
\
PC += 2; \
m_instruction_length = 3; \
@@ -1059,7 +1059,7 @@ do
{ \
if( OP & 0x80 ) \
{ \
- UINT16 next = READ_OP(PC); \
+ uint16_t next = READ_OP(PC); \
\
PC += 2; \
m_instruction_length = 2; \
@@ -1082,7 +1082,7 @@ do
#define decode_dis(decode) \
do \
{ \
- UINT16 next_1 = READ_OP(PC); \
+ uint16_t next_1 = READ_OP(PC); \
\
PC += 2; \
m_instruction_length = 2; \
@@ -1091,7 +1091,7 @@ do
\
if( E_BIT(next_1) ) \
{ \
- UINT16 next_2 = READ_OP(PC); \
+ uint16_t next_2 = READ_OP(PC); \
\
PC += 2; \
m_instruction_length = 3; \
@@ -1118,7 +1118,7 @@ do
#define decode_lim(decode) \
do \
{ \
- UINT32 next = READ_OP(PC); \
+ uint32_t next = READ_OP(PC); \
PC += 2; \
m_instruction_length = 2; \
\
@@ -1284,10 +1284,10 @@ void hyperstone_device::execute_dbr(struct hyperstone_device::regs_decode *decod
}
-void hyperstone_device::execute_trap(UINT32 addr)
+void hyperstone_device::execute_trap(uint32_t addr)
{
- UINT8 reg;
- UINT32 oldSR;
+ uint8_t reg;
+ uint32_t oldSR;
reg = GET_FP + GET_FL;
SET_ILC(m_instruction_length & 3);
@@ -1312,10 +1312,10 @@ void hyperstone_device::execute_trap(UINT32 addr)
}
-void hyperstone_device::execute_int(UINT32 addr)
+void hyperstone_device::execute_int(uint32_t addr)
{
- UINT8 reg;
- UINT32 oldSR;
+ uint8_t reg;
+ uint32_t oldSR;
reg = GET_FP + GET_FL;
SET_ILC(m_instruction_length & 3);
@@ -1341,10 +1341,10 @@ void hyperstone_device::execute_int(UINT32 addr)
}
/* TODO: mask Parity Error and Extended Overflow exceptions */
-void hyperstone_device::execute_exception(UINT32 addr)
+void hyperstone_device::execute_exception(uint32_t addr)
{
- UINT8 reg;
- UINT32 oldSR;
+ uint8_t reg;
+ uint32_t oldSR;
reg = GET_FP + GET_FL;
SET_ILC(m_instruction_length & 3);
@@ -1371,10 +1371,10 @@ void hyperstone_device::execute_exception(UINT32 addr)
void hyperstone_device::execute_software(struct hyperstone_device::regs_decode *decode)
{
- UINT8 reg;
- UINT32 oldSR;
- UINT32 addr;
- UINT32 stack_of_dst;
+ uint8_t reg;
+ uint32_t oldSR;
+ uint32_t addr;
+ uint32_t stack_of_dst;
SET_ILC(1);
@@ -1532,8 +1532,8 @@ void hyperstone_device::device_start()
void hyperstone_device::init(int scale_mask)
{
- memset(m_global_regs, 0, sizeof(UINT32) * 32);
- memset(m_local_regs, 0, sizeof(UINT32) * 64);
+ memset(m_global_regs, 0, sizeof(uint32_t) * 32);
+ memset(m_local_regs, 0, sizeof(uint32_t) * 64);
m_ppc = 0;
m_op = 0;
m_trap_entry = 0;
@@ -1882,7 +1882,7 @@ void hyperstone_device::state_string_export(const device_state_entry &entry, std
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 hyperstone_device::disasm_min_opcode_bytes() const
+uint32_t hyperstone_device::disasm_min_opcode_bytes() const
{
return 2;
}
@@ -1893,7 +1893,7 @@ UINT32 hyperstone_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 hyperstone_device::disasm_max_opcode_bytes() const
+uint32_t hyperstone_device::disasm_max_opcode_bytes() const
{
return 6;
}
@@ -1904,7 +1904,7 @@ UINT32 hyperstone_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t hyperstone_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hyperstone_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( hyperstone );
return dasm_hyperstone( buffer, pc, oprom, GET_H, GET_FP );
@@ -1914,7 +1914,7 @@ offs_t hyperstone_device::disasm_disassemble(char *buffer, offs_t pc, const UINT
void hyperstone_device::hyperstone_chk(struct hyperstone_device::regs_decode *decode)
{
- UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_RANGE_ERROR);
if( SRC_IS_SR )
{
@@ -1944,8 +1944,8 @@ void hyperstone_device::hyperstone_movd(struct hyperstone_device::regs_decode *d
{
// RET instruction
- UINT8 old_s, old_l;
- INT8 difference; // really it's 7 bits
+ uint8_t old_s, old_l;
+ int8_t difference; // really it's 7 bits
if( SRC_IS_PC || SRC_IS_SR )
{
@@ -1966,7 +1966,7 @@ void hyperstone_device::hyperstone_movd(struct hyperstone_device::regs_decode *d
if( (!old_s && GET_S) || (!GET_S && !old_l && GET_L))
{
- UINT32 addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
execute_exception(addr);
}
@@ -1974,7 +1974,7 @@ void hyperstone_device::hyperstone_movd(struct hyperstone_device::regs_decode *d
/* convert to 8 bits */
if(difference > 63)
- difference = (INT8)(difference|0x80);
+ difference = (int8_t)(difference|0x80);
else if( difference < -64 )
difference = difference & 0x7f;
@@ -2004,7 +2004,7 @@ void hyperstone_device::hyperstone_movd(struct hyperstone_device::regs_decode *d
}
else // Rd doesn't denote PC and Rs doesn't denote SR
{
- UINT64 tmp;
+ uint64_t tmp;
SET_DREG(SREG);
SET_DREGF(SREGF);
@@ -2031,7 +2031,7 @@ void hyperstone_device::hyperstone_divu(struct hyperstone_device::regs_decode *d
}
else
{
- UINT64 dividend;
+ uint64_t dividend;
dividend = concat_64(DREG, DREGF);
@@ -2040,14 +2040,14 @@ void hyperstone_device::hyperstone_divu(struct hyperstone_device::regs_decode *d
//Rd//Rdf -> undefined
//Z -> undefined
//N -> undefined
- UINT32 addr;
+ uint32_t addr;
SET_V(1);
addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
else
{
- UINT32 quotient, remainder;
+ uint32_t quotient, remainder;
/* TODO: add quotient overflow */
quotient = dividend / SREG;
@@ -2080,27 +2080,27 @@ void hyperstone_device::hyperstone_divs(struct hyperstone_device::regs_decode *d
}
else
{
- INT64 dividend;
+ int64_t dividend;
- dividend = (INT64) concat_64(DREG, DREGF);
+ dividend = (int64_t) concat_64(DREG, DREGF);
if( SREG == 0 || (DREG & 0x80000000) )
{
//Rd//Rdf -> undefined
//Z -> undefined
//N -> undefined
- UINT32 addr;
+ uint32_t addr;
SET_V(1);
addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
else
{
- INT32 quotient, remainder;
+ int32_t quotient, remainder;
/* TODO: add quotient overflow */
- quotient = dividend / ((INT32)(SREG));
- remainder = dividend % ((INT32)(SREG));
+ quotient = dividend / ((int32_t)(SREG));
+ remainder = dividend % ((int32_t)(SREG));
SET_DREG(remainder);
SET_DREGF(quotient);
@@ -2131,12 +2131,12 @@ void hyperstone_device::hyperstone_xm(struct hyperstone_device::regs_decode *dec
case 3:
if( !SRC_IS_PC && (SREG > EXTRA_U) )
{
- UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
else if( SRC_IS_PC && (SREG >= EXTRA_U) )
{
- UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
else
@@ -2174,12 +2174,12 @@ void hyperstone_device::hyperstone_mask(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_sum(struct hyperstone_device::regs_decode *decode)
{
- UINT64 tmp;
+ uint64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
- tmp = (UINT64)(SREG) + (UINT64)(EXTRA_U);
+ tmp = (uint64_t)(SREG) + (uint64_t)(EXTRA_U);
CHECK_C(tmp);
CHECK_VADD(SREG,EXTRA_U,tmp);
@@ -2198,20 +2198,20 @@ void hyperstone_device::hyperstone_sum(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_sums(struct hyperstone_device::regs_decode *decode)
{
- INT32 res;
- INT64 tmp;
+ int32_t res;
+ int64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
- tmp = (INT64)((INT32)(SREG)) + (INT64)(EXTRA_S);
+ tmp = (int64_t)((int32_t)(SREG)) + (int64_t)(EXTRA_S);
CHECK_VADD(SREG,EXTRA_S,tmp);
//#if SETCARRYS
// CHECK_C(tmp);
//#endif
- res = (INT32)(SREG) + EXTRA_S;
+ res = (int32_t)(SREG) + EXTRA_S;
SET_DREG(res);
@@ -2222,14 +2222,14 @@ void hyperstone_device::hyperstone_sums(struct hyperstone_device::regs_decode *d
if( GET_V && !SRC_IS_SR )
{
- UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
}
void hyperstone_device::hyperstone_cmp(struct hyperstone_device::regs_decode *decode)
{
- UINT64 tmp;
+ uint64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
@@ -2239,12 +2239,12 @@ void hyperstone_device::hyperstone_cmp(struct hyperstone_device::regs_decode *de
else
SET_Z(0);
- if( (INT32) DREG < (INT32) SREG )
+ if( (int32_t) DREG < (int32_t) SREG )
SET_N(1);
else
SET_N(0);
- tmp = (UINT64)(DREG) - (UINT64)(SREG);
+ tmp = (uint64_t)(DREG) - (uint64_t)(SREG);
CHECK_VSUB(SREG,DREG,tmp);
if( DREG < SREG )
@@ -2259,7 +2259,7 @@ void hyperstone_device::hyperstone_mov(struct hyperstone_device::regs_decode *de
{
if( !GET_S && decode->dst >= 16 )
{
- UINT32 addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
execute_exception(addr);
}
@@ -2277,12 +2277,12 @@ void hyperstone_device::hyperstone_mov(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_add(struct hyperstone_device::regs_decode *decode)
{
- UINT64 tmp;
+ uint64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
- tmp = (UINT64)(SREG) + (UINT64)(DREG);
+ tmp = (uint64_t)(SREG) + (uint64_t)(DREG);
CHECK_C(tmp);
CHECK_VADD(SREG,DREG,tmp);
@@ -2300,13 +2300,13 @@ void hyperstone_device::hyperstone_add(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_adds(struct hyperstone_device::regs_decode *decode)
{
- INT32 res;
- INT64 tmp;
+ int32_t res;
+ int64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
- tmp = (INT64)((INT32)(SREG)) + (INT64)((INT32)(DREG));
+ tmp = (int64_t)((int32_t)(SREG)) + (int64_t)((int32_t)(DREG));
CHECK_VADD(SREG,DREG,tmp);
@@ -2314,7 +2314,7 @@ void hyperstone_device::hyperstone_adds(struct hyperstone_device::regs_decode *d
// CHECK_C(tmp);
//#endif
- res = (INT32)(SREG) + (INT32)(DREG);
+ res = (int32_t)(SREG) + (int32_t)(DREG);
SET_DREG(res);
SET_Z( res == 0 ? 1 : 0 );
@@ -2324,7 +2324,7 @@ void hyperstone_device::hyperstone_adds(struct hyperstone_device::regs_decode *d
if( GET_V )
{
- UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
}
@@ -2368,16 +2368,16 @@ void hyperstone_device::hyperstone_xor(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_subc(struct hyperstone_device::regs_decode *decode)
{
- UINT64 tmp;
+ uint64_t tmp;
if( SRC_IS_SR )
{
- tmp = (UINT64)(DREG) - (UINT64)(GET_C);
+ tmp = (uint64_t)(DREG) - (uint64_t)(GET_C);
CHECK_VSUB(GET_C,DREG,tmp);
}
else
{
- tmp = (UINT64)(DREG) - ((UINT64)(SREG) + (UINT64)(GET_C));
+ tmp = (uint64_t)(DREG) - ((uint64_t)(SREG) + (uint64_t)(GET_C));
//CHECK!
CHECK_VSUB(SREG + GET_C,DREG,tmp);
}
@@ -2412,12 +2412,12 @@ void hyperstone_device::hyperstone_not(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_sub(struct hyperstone_device::regs_decode *decode)
{
- UINT64 tmp;
+ uint64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
- tmp = (UINT64)(DREG) - (UINT64)(SREG);
+ tmp = (uint64_t)(DREG) - (uint64_t)(SREG);
CHECK_C(tmp);
CHECK_VSUB(SREG,DREG,tmp);
@@ -2435,13 +2435,13 @@ void hyperstone_device::hyperstone_sub(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_subs(struct hyperstone_device::regs_decode *decode)
{
- INT32 res;
- INT64 tmp;
+ int32_t res;
+ int64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
- tmp = (INT64)((INT32)(DREG)) - (INT64)((INT32)(SREG));
+ tmp = (int64_t)((int32_t)(DREG)) - (int64_t)((int32_t)(SREG));
//#ifdef SETCARRYS
// CHECK_C(tmp);
@@ -2449,7 +2449,7 @@ void hyperstone_device::hyperstone_subs(struct hyperstone_device::regs_decode *d
CHECK_VSUB(SREG,DREG,tmp);
- res = (INT32)(DREG) - (INT32)(SREG);
+ res = (int32_t)(DREG) - (int32_t)(SREG);
SET_DREG(res);
@@ -2460,23 +2460,23 @@ void hyperstone_device::hyperstone_subs(struct hyperstone_device::regs_decode *d
if( GET_V )
{
- UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
}
void hyperstone_device::hyperstone_addc(struct hyperstone_device::regs_decode *decode)
{
- UINT64 tmp;
+ uint64_t tmp;
if( SRC_IS_SR )
{
- tmp = (UINT64)(DREG) + (UINT64)(GET_C);
+ tmp = (uint64_t)(DREG) + (uint64_t)(GET_C);
CHECK_VADD(DREG,GET_C,tmp);
}
else
{
- tmp = (UINT64)(SREG) + (UINT64)(DREG) + (UINT64)(GET_C);
+ tmp = (uint64_t)(SREG) + (uint64_t)(DREG) + (uint64_t)(GET_C);
//CHECK!
//CHECK_VADD1: V = (DREG == 0x7FFF) && (C == 1);
@@ -2518,12 +2518,12 @@ void hyperstone_device::hyperstone_and(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_neg(struct hyperstone_device::regs_decode *decode)
{
- UINT64 tmp;
+ uint64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
- tmp = -(UINT64)(SREG);
+ tmp = -(uint64_t)(SREG);
CHECK_C(tmp);
CHECK_VSUB(SREG,0,tmp);
@@ -2539,20 +2539,20 @@ void hyperstone_device::hyperstone_neg(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_negs(struct hyperstone_device::regs_decode *decode)
{
- INT32 res;
- INT64 tmp;
+ int32_t res;
+ int64_t tmp;
if( SRC_IS_SR )
SREG = GET_C;
- tmp = -(INT64)((INT32)(SREG));
+ tmp = -(int64_t)((int32_t)(SREG));
CHECK_VSUB(SREG,0,tmp);
//#if SETCARRYS
// CHECK_C(tmp);
//#endif
- res = -(INT32)(SREG);
+ res = -(int32_t)(SREG);
SET_DREG(res);
@@ -2564,16 +2564,16 @@ void hyperstone_device::hyperstone_negs(struct hyperstone_device::regs_decode *d
if( GET_V && !SRC_IS_SR ) //trap doesn't occur when source is SR
{
- UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
}
void hyperstone_device::hyperstone_cmpi(struct hyperstone_device::regs_decode *decode)
{
- UINT64 tmp;
+ uint64_t tmp;
- tmp = (UINT64)(DREG) - (UINT64)(EXTRA_U);
+ tmp = (uint64_t)(DREG) - (uint64_t)(EXTRA_U);
CHECK_VSUB(EXTRA_U,DREG,tmp);
if( DREG == EXTRA_U )
@@ -2581,7 +2581,7 @@ void hyperstone_device::hyperstone_cmpi(struct hyperstone_device::regs_decode *d
else
SET_Z(0);
- if( (INT32) DREG < (INT32) EXTRA_U )
+ if( (int32_t) DREG < (int32_t) EXTRA_U )
SET_N(1);
else
SET_N(0);
@@ -2598,7 +2598,7 @@ void hyperstone_device::hyperstone_movi(struct hyperstone_device::regs_decode *d
{
if( !GET_S && decode->dst >= 16 )
{
- UINT32 addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_PRIVILEGE_ERROR);
execute_exception(addr);
}
@@ -2619,8 +2619,8 @@ void hyperstone_device::hyperstone_movi(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_addi(struct hyperstone_device::regs_decode *decode)
{
- UINT32 imm;
- UINT64 tmp;
+ uint32_t imm;
+ uint64_t tmp;
if( N_VALUE )
imm = EXTRA_U;
@@ -2628,7 +2628,7 @@ void hyperstone_device::hyperstone_addi(struct hyperstone_device::regs_decode *d
imm = GET_C & ((GET_Z == 0 ? 1 : 0) | (DREG & 0x01));
- tmp = (UINT64)(imm) + (UINT64)(DREG);
+ tmp = (uint64_t)(imm) + (uint64_t)(DREG);
CHECK_C(tmp);
CHECK_VADD(imm,DREG,tmp);
@@ -2646,22 +2646,22 @@ void hyperstone_device::hyperstone_addi(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_addsi(struct hyperstone_device::regs_decode *decode)
{
- INT32 imm, res;
- INT64 tmp;
+ int32_t imm, res;
+ int64_t tmp;
if( N_VALUE )
imm = EXTRA_S;
else
imm = GET_C & ((GET_Z == 0 ? 1 : 0) | (DREG & 0x01));
- tmp = (INT64)(imm) + (INT64)((INT32)(DREG));
+ tmp = (int64_t)(imm) + (int64_t)((int32_t)(DREG));
CHECK_VADD(imm,DREG,tmp);
//#if SETCARRYS
// CHECK_C(tmp);
//#endif
- res = imm + (INT32)(DREG);
+ res = imm + (int32_t)(DREG);
SET_DREG(res);
@@ -2672,14 +2672,14 @@ void hyperstone_device::hyperstone_addsi(struct hyperstone_device::regs_decode *
if( GET_V )
{
- UINT32 addr = get_trap_addr(TRAPNO_RANGE_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_RANGE_ERROR);
execute_exception(addr);
}
}
void hyperstone_device::hyperstone_cmpbi(struct hyperstone_device::regs_decode *decode)
{
- UINT32 imm;
+ uint32_t imm;
if( N_VALUE )
{
@@ -2708,7 +2708,7 @@ void hyperstone_device::hyperstone_cmpbi(struct hyperstone_device::regs_decode *
void hyperstone_device::hyperstone_andni(struct hyperstone_device::regs_decode *decode)
{
- UINT32 imm;
+ uint32_t imm;
if( N_VALUE == 31 )
imm = 0x7fffffff; // bit 31 = 0, others = 1
@@ -2745,8 +2745,8 @@ void hyperstone_device::hyperstone_xori(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_shrdi(struct hyperstone_device::regs_decode *decode)
{
- UINT32 low_order, high_order;
- UINT64 val;
+ uint32_t low_order, high_order;
+ uint64_t val;
high_order = DREG;
low_order = DREGF;
@@ -2773,9 +2773,9 @@ void hyperstone_device::hyperstone_shrdi(struct hyperstone_device::regs_decode *
void hyperstone_device::hyperstone_shrd(struct hyperstone_device::regs_decode *decode)
{
- UINT32 low_order, high_order;
- UINT64 val;
- UINT8 n = SREG & 0x1f;
+ uint32_t low_order, high_order;
+ uint64_t val;
+ uint8_t n = SREG & 0x1f;
// result undefined if Ls denotes the same register as Ld or Ldf
if( SAME_SRC_DST || SAME_SRC_DSTF )
@@ -2811,8 +2811,8 @@ void hyperstone_device::hyperstone_shrd(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_shr(struct hyperstone_device::regs_decode *decode)
{
- UINT32 ret;
- UINT8 n;
+ uint32_t ret;
+ uint8_t n;
n = SREG & 0x1f;
ret = DREG;
@@ -2833,9 +2833,9 @@ void hyperstone_device::hyperstone_shr(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_sardi(struct hyperstone_device::regs_decode *decode)
{
- UINT32 low_order, high_order;
- UINT64 val;
- UINT8 sign_bit;
+ uint32_t low_order, high_order;
+ uint64_t val;
+ uint8_t sign_bit;
high_order = DREG;
low_order = DREGF;
@@ -2873,9 +2873,9 @@ void hyperstone_device::hyperstone_sardi(struct hyperstone_device::regs_decode *
void hyperstone_device::hyperstone_sard(struct hyperstone_device::regs_decode *decode)
{
- UINT32 low_order, high_order;
- UINT64 val;
- UINT8 n, sign_bit;
+ uint32_t low_order, high_order;
+ uint64_t val;
+ uint8_t n, sign_bit;
n = SREG & 0x1f;
@@ -2923,8 +2923,8 @@ void hyperstone_device::hyperstone_sard(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_sar(struct hyperstone_device::regs_decode *decode)
{
- UINT32 ret;
- UINT8 n, sign_bit;
+ uint32_t ret;
+ uint8_t n, sign_bit;
n = SREG & 0x1f;
ret = DREG;
@@ -2955,15 +2955,15 @@ void hyperstone_device::hyperstone_sar(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_shldi(struct hyperstone_device::regs_decode *decode)
{
- UINT32 low_order, high_order, tmp;
- UINT64 val, mask;
+ uint32_t low_order, high_order, tmp;
+ uint64_t val, mask;
high_order = DREG;
low_order = DREGF;
val = concat_64(high_order, low_order);
SET_C( (N_VALUE)?(((val<<(N_VALUE-1))&U64(0x8000000000000000))?1:0):0);
- mask = ((((UINT64)1) << (32 - N_VALUE)) - 1) ^ 0xffffffff;
+ mask = ((((uint64_t)1) << (32 - N_VALUE)) - 1) ^ 0xffffffff;
tmp = high_order << N_VALUE;
if( ((high_order & mask) && (!(tmp & 0x80000000))) ||
@@ -2988,8 +2988,8 @@ void hyperstone_device::hyperstone_shldi(struct hyperstone_device::regs_decode *
void hyperstone_device::hyperstone_shld(struct hyperstone_device::regs_decode *decode)
{
- UINT32 low_order, high_order, tmp, n;
- UINT64 val, mask;
+ uint32_t low_order, high_order, tmp, n;
+ uint64_t val, mask;
n = SREG & 0x1f;
@@ -3003,7 +3003,7 @@ void hyperstone_device::hyperstone_shld(struct hyperstone_device::regs_decode *d
high_order = DREG;
low_order = DREGF;
- mask = ((((UINT64)1) << (32 - n)) - 1) ^ 0xffffffff;
+ mask = ((((uint64_t)1) << (32 - n)) - 1) ^ 0xffffffff;
val = concat_64(high_order, low_order);
SET_C( (n)?(((val<<(n-1))&U64(0x8000000000000000))?1:0):0);
@@ -3032,12 +3032,12 @@ void hyperstone_device::hyperstone_shld(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_shl(struct hyperstone_device::regs_decode *decode)
{
- UINT32 base, ret, n;
- UINT64 mask;
+ uint32_t base, ret, n;
+ uint64_t mask;
n = SREG & 0x1f;
base = DREG;
- mask = ((((UINT64)1) << (32 - n)) - 1) ^ 0xffffffff;
+ mask = ((((uint64_t)1) << (32 - n)) - 1) ^ 0xffffffff;
SET_C( (n)?(((base<<(n-1))&0x80000000)?1:0):0);
ret = base << n;
@@ -3061,8 +3061,8 @@ void hyperstone_device::reserved(struct hyperstone_device::regs_decode *decode)
void hyperstone_device::hyperstone_testlz(struct hyperstone_device::regs_decode *decode)
{
- UINT8 zeros = 0;
- UINT32 mask;
+ uint8_t zeros = 0;
+ uint32_t mask;
for( mask = 0x80000000; ; mask >>= 1 )
{
@@ -3082,15 +3082,15 @@ void hyperstone_device::hyperstone_testlz(struct hyperstone_device::regs_decode
void hyperstone_device::hyperstone_rol(struct hyperstone_device::regs_decode *decode)
{
- UINT32 val, base;
- UINT8 n;
- UINT64 mask;
+ uint32_t val, base;
+ uint8_t n;
+ uint64_t mask;
n = SREG & 0x1f;
val = base = DREG;
- mask = ((((UINT64)1) << (32 - n)) - 1) ^ 0xffffffff;
+ mask = ((((uint64_t)1) << (32 - n)) - 1) ^ 0xffffffff;
while( n > 0 )
{
@@ -3119,7 +3119,7 @@ void hyperstone_device::hyperstone_rol(struct hyperstone_device::regs_decode *de
//TODO: add trap error
void hyperstone_device::hyperstone_ldxx1(struct hyperstone_device::regs_decode *decode)
{
- UINT32 load;
+ uint32_t load;
if( DST_IS_SR )
{
@@ -3275,7 +3275,7 @@ void hyperstone_device::hyperstone_ldxx1(struct hyperstone_device::regs_decode *
void hyperstone_device::hyperstone_ldxx2(struct hyperstone_device::regs_decode *decode)
{
- UINT32 load;
+ uint32_t load;
if( DST_IS_PC || DST_IS_SR )
{
@@ -3623,7 +3623,7 @@ void hyperstone_device::hyperstone_stxx2(struct hyperstone_device::regs_decode *
void hyperstone_device::hyperstone_shri(struct hyperstone_device::regs_decode *decode)
{
- UINT32 val;
+ uint32_t val;
val = DREG;
@@ -3643,8 +3643,8 @@ void hyperstone_device::hyperstone_shri(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_sari(struct hyperstone_device::regs_decode *decode)
{
- UINT32 val;
- UINT8 sign_bit;
+ uint32_t val;
+ uint8_t sign_bit;
val = DREG;
sign_bit = (val & 0x80000000) >> 31;
@@ -3674,12 +3674,12 @@ void hyperstone_device::hyperstone_sari(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_shli(struct hyperstone_device::regs_decode *decode)
{
- UINT32 val, val2;
- UINT64 mask;
+ uint32_t val, val2;
+ uint64_t mask;
val = DREG;
SET_C( (N_VALUE)?(((val<<(N_VALUE-1))&0x80000000)?1:0):0);
- mask = ((((UINT64)1) << (32 - N_VALUE)) - 1) ^ 0xffffffff;
+ mask = ((((uint64_t)1) << (32 - N_VALUE)) - 1) ^ 0xffffffff;
val2 = val << N_VALUE;
if( ((val & mask) && (!(val2 & 0x80000000))) ||
@@ -3697,8 +3697,8 @@ void hyperstone_device::hyperstone_shli(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_mulu(struct hyperstone_device::regs_decode *decode)
{
- UINT32 low_order, high_order;
- UINT64 double_word;
+ uint32_t low_order, high_order;
+ uint64_t double_word;
// PC or SR aren't denoted, else result is undefined
if( SRC_IS_PC || SRC_IS_SR || DST_IS_PC || DST_IS_SR )
@@ -3707,7 +3707,7 @@ void hyperstone_device::hyperstone_mulu(struct hyperstone_device::regs_decode *d
}
else
{
- double_word = (UINT64)SREG *(UINT64)DREG;
+ double_word = (uint64_t)SREG *(uint64_t)DREG;
low_order = double_word & 0xffffffff;
high_order = double_word >> 32;
@@ -3727,8 +3727,8 @@ void hyperstone_device::hyperstone_mulu(struct hyperstone_device::regs_decode *d
void hyperstone_device::hyperstone_muls(struct hyperstone_device::regs_decode *decode)
{
- UINT32 low_order, high_order;
- INT64 double_word;
+ uint32_t low_order, high_order;
+ int64_t double_word;
// PC or SR aren't denoted, else result is undefined
if( SRC_IS_PC || SRC_IS_SR || DST_IS_PC || DST_IS_SR )
@@ -3737,7 +3737,7 @@ void hyperstone_device::hyperstone_muls(struct hyperstone_device::regs_decode *d
}
else
{
- double_word = (INT64)(INT32)(SREG) * (INT64)(INT32)(DREG);
+ double_word = (int64_t)(int32_t)(SREG) * (int64_t)(int32_t)(DREG);
low_order = double_word & 0xffffffff;
high_order = double_word >> 32;
@@ -3776,7 +3776,7 @@ void hyperstone_device::hyperstone_set(struct hyperstone_device::regs_decode *de
// SETADR
case 0:
{
- UINT32 val;
+ uint32_t val;
val = (SP & 0xfffffe00) | (GET_FP << 2);
//plus carry into bit 9
@@ -4102,7 +4102,7 @@ void hyperstone_device::hyperstone_set(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_mul(struct hyperstone_device::regs_decode *decode)
{
- UINT32 single_word;
+ uint32_t single_word;
// PC or SR aren't denoted, else result is undefined
if( SRC_IS_PC || SRC_IS_SR || DST_IS_PC || DST_IS_SR )
@@ -4212,7 +4212,7 @@ void hyperstone_device::hyperstone_fcvtd(struct hyperstone_device::regs_decode *
void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode *decode)
{
//TODO: add locks, overflow error and other things
- UINT32 vals, vald;
+ uint32_t vals, vald;
vals = SREG;
vald = DREG;
@@ -4223,7 +4223,7 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
case EMUL:
case 0x100: // used in "N" type cpu
{
- UINT32 result;
+ uint32_t result;
result = vals * vald;
SET_G_REG(15, result);
@@ -4233,9 +4233,9 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// unsigned multiplication, double word product
case EMULU:
{
- UINT64 result;
+ uint64_t result;
- result = (UINT64)vals * (UINT64)vald;
+ result = (uint64_t)vals * (uint64_t)vald;
vals = result >> 32;
vald = result & 0xffffffff;
SET_G_REG(14, vals);
@@ -4246,9 +4246,9 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// signed multiplication, double word product
case EMULS:
{
- INT64 result;
+ int64_t result;
- result = (INT64)(INT32)(vals) * (INT64)(INT32)(vald);
+ result = (int64_t)(int32_t)(vals) * (int64_t)(int32_t)(vald);
vals = result >> 32;
vald = result & 0xffffffff;
SET_G_REG(14, vals);
@@ -4259,9 +4259,9 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// signed multiply/add, single word product sum
case EMAC:
{
- INT32 result;
+ int32_t result;
- result = (INT32)GET_G_REG(15) + ((INT32)(vals) * (INT32)(vald));
+ result = (int32_t)GET_G_REG(15) + ((int32_t)(vals) * (int32_t)(vald));
SET_G_REG(15, result);
break;
@@ -4269,9 +4269,9 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// signed multiply/add, double word product sum
case EMACD:
{
- INT64 result;
+ int64_t result;
- result = (INT64)concat_64(GET_G_REG(14), GET_G_REG(15)) + (INT64)((INT64)(INT32)(vals) * (INT64)(INT32)(vald));
+ result = (int64_t)concat_64(GET_G_REG(14), GET_G_REG(15)) + (int64_t)((int64_t)(int32_t)(vals) * (int64_t)(int32_t)(vald));
vals = result >> 32;
vald = result & 0xffffffff;
@@ -4283,9 +4283,9 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// signed multiply/substract, single word product difference
case EMSUB:
{
- INT32 result;
+ int32_t result;
- result = (INT32)GET_G_REG(15) - ((INT32)(vals) * (INT32)(vald));
+ result = (int32_t)GET_G_REG(15) - ((int32_t)(vals) * (int32_t)(vald));
SET_G_REG(15, result);
break;
@@ -4293,9 +4293,9 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// signed multiply/substract, double word product difference
case EMSUBD:
{
- INT64 result;
+ int64_t result;
- result = (INT64)concat_64(GET_G_REG(14), GET_G_REG(15)) - (INT64)((INT64)(INT32)(vals) * (INT64)(INT32)(vald));
+ result = (int64_t)concat_64(GET_G_REG(14), GET_G_REG(15)) - (int64_t)((int64_t)(int32_t)(vals) * (int64_t)(int32_t)(vald));
vals = result >> 32;
vald = result & 0xffffffff;
@@ -4307,9 +4307,9 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// signed half-word multiply/add, single word product sum
case EHMAC:
{
- INT32 result;
+ int32_t result;
- result = (INT32)GET_G_REG(15) + ((INT32)((vald & 0xffff0000) >> 16) * (INT32)((vals & 0xffff0000) >> 16)) + ((INT32)(vald & 0xffff) * (INT32)(vals & 0xffff));
+ result = (int32_t)GET_G_REG(15) + ((int32_t)((vald & 0xffff0000) >> 16) * (int32_t)((vals & 0xffff0000) >> 16)) + ((int32_t)(vald & 0xffff) * (int32_t)(vals & 0xffff));
SET_G_REG(15, result);
break;
@@ -4317,9 +4317,9 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// signed half-word multiply/add, double word product sum
case EHMACD:
{
- INT64 result;
+ int64_t result;
- result = (INT64)concat_64(GET_G_REG(14), GET_G_REG(15)) + (INT64)((INT64)(INT32)((vald & 0xffff0000) >> 16) * (INT64)(INT32)((vals & 0xffff0000) >> 16)) + ((INT64)(INT32)(vald & 0xffff) * (INT64)(INT32)(vals & 0xffff));
+ result = (int64_t)concat_64(GET_G_REG(14), GET_G_REG(15)) + (int64_t)((int64_t)(int32_t)((vald & 0xffff0000) >> 16) * (int64_t)(int32_t)((vals & 0xffff0000) >> 16)) + ((int64_t)(int32_t)(vald & 0xffff) * (int64_t)(int32_t)(vals & 0xffff));
vals = result >> 32;
vald = result & 0xffffffff;
@@ -4331,7 +4331,7 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// half-word complex multiply
case EHCMULD:
{
- UINT32 result;
+ uint32_t result;
result = (((vald & 0xffff0000) >> 16) * ((vals & 0xffff0000) >> 16)) - ((vald & 0xffff) * (vals & 0xffff));
SET_G_REG(14, result);
@@ -4344,7 +4344,7 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// half-word complex multiply/add
case EHCMACD:
{
- UINT32 result;
+ uint32_t result;
result = GET_G_REG(14) + (((vald & 0xffff0000) >> 16) * ((vals & 0xffff0000) >> 16)) - ((vald & 0xffff) * (vals & 0xffff));
SET_G_REG(14, result);
@@ -4358,7 +4358,7 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// Ls is not used and should denote the same register as Ld
case EHCSUMD:
{
- UINT32 result;
+ uint32_t result;
result = ((((vals & 0xffff0000) >> 16) + GET_G_REG(14)) << 16) & 0xffff0000;
result |= ((vals & 0xffff) + GET_G_REG(15)) & 0xffff;
@@ -4374,7 +4374,7 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// Ls is not used and should denote the same register as Ld
case EHCFFTD:
{
- UINT32 result;
+ uint32_t result;
result = ((((vals & 0xffff0000) >> 16) + (GET_G_REG(14) >> 15)) << 16) & 0xffff0000;
result |= ((vals & 0xffff) + (GET_G_REG(15) >> 15)) & 0xffff;
@@ -4390,7 +4390,7 @@ void hyperstone_device::hyperstone_extend(struct hyperstone_device::regs_decode
// Ls is not used and should denote the same register as Ld
case EHCFFTSD:
{
- UINT32 result;
+ uint32_t result;
result = (((((vals & 0xffff0000) >> 16) + (GET_G_REG(14) >> 15)) >> 1) << 16) & 0xffff0000;
result |= ((((vals & 0xffff) + (GET_G_REG(15) >> 15)) >> 1) & 0xffff);
@@ -4612,8 +4612,8 @@ void hyperstone_device::hyperstone_dbr(struct hyperstone_device::regs_decode *de
void hyperstone_device::hyperstone_frame(struct hyperstone_device::regs_decode *decode)
{
- INT8 difference; // really it's 7 bits
- UINT8 realfp = GET_FP - SRC_CODE;
+ int8_t difference; // really it's 7 bits
+ uint8_t realfp = GET_FP - SRC_CODE;
SET_FP(realfp);
SET_FL(DST_CODE);
@@ -4623,13 +4623,13 @@ void hyperstone_device::hyperstone_frame(struct hyperstone_device::regs_decode *
/* convert to 8 bits */
if(difference > 63)
- difference = (INT8)(difference|0x80);
+ difference = (int8_t)(difference|0x80);
else if( difference < -64 )
difference = difference & 0x7f;
if( difference < 0 ) // else it's finished
{
- UINT8 tmp_flag;
+ uint8_t tmp_flag;
tmp_flag = ( SP >= UB ? 1 : 0 );
@@ -4643,7 +4643,7 @@ void hyperstone_device::hyperstone_frame(struct hyperstone_device::regs_decode *
if( tmp_flag )
{
- UINT32 addr = get_trap_addr(TRAPNO_FRAME_ERROR);
+ uint32_t addr = get_trap_addr(TRAPNO_FRAME_ERROR);
execute_exception(addr);
}
}
@@ -4786,8 +4786,8 @@ void hyperstone_device::hyperstone_br(struct hyperstone_device::regs_decode *dec
void hyperstone_device::hyperstone_trap(struct hyperstone_device::regs_decode *decode)
{
- UINT8 code, trapno;
- UINT32 addr;
+ uint8_t code, trapno;
+ uint32_t addr;
trapno = (OP & 0xfc) >> 2;
@@ -4883,7 +4883,7 @@ void hyperstone_device::hyperstone_trap(struct hyperstone_device::regs_decode *d
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 hyperstone_device::execute_min_cycles() const
+uint32_t hyperstone_device::execute_min_cycles() const
{
return 1;
}
@@ -4894,7 +4894,7 @@ UINT32 hyperstone_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 hyperstone_device::execute_max_cycles() const
+uint32_t hyperstone_device::execute_max_cycles() const
{
return 36;
}
@@ -4905,7 +4905,7 @@ UINT32 hyperstone_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 hyperstone_device::execute_input_lines() const
+uint32_t hyperstone_device::execute_input_lines() const
{
return 8;
}
@@ -4934,7 +4934,7 @@ void hyperstone_device::execute_run()
do
{
- UINT32 oldh = SR & 0x00000020;
+ uint32_t oldh = SR & 0x00000020;
PPC = PC; /* copy PC to previous PC */
debugger_instruction_hook(this, PC);
@@ -4954,7 +4954,7 @@ void hyperstone_device::execute_run()
if( GET_T && GET_P && m_delay.delay_cmd == NO_DELAY ) /* Not in a Delayed Branch instructions */
{
- UINT32 addr = get_trap_addr(TRAPNO_TRACE_EXCEPTION);
+ uint32_t addr = get_trap_addr(TRAPNO_TRACE_EXCEPTION);
execute_exception(addr);
}
diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h
index 28149e1a742..8c2710aee68 100644
--- a/src/devices/cpu/e132xs/e132xs.h
+++ b/src/devices/cpu/e132xs/e132xs.h
@@ -174,7 +174,7 @@ enum
E132XS_L60, E132XS_L61, E132XS_L62, E132XS_L63
};
-extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned h_flag, int private_fp);
+extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const uint8_t *oprom, unsigned h_flag, int private_fp);
/* Memory access */
/* read byte */
@@ -212,8 +212,8 @@ class hyperstone_device : public cpu_device
{
public:
// construction/destruction
- hyperstone_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 io_data_width, address_map_constructor internal_map, const char *shortname, const char *source);
+ hyperstone_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map, const char *shortname, const char *source);
// public interfaces
@@ -226,9 +226,9 @@ protected:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -236,9 +236,9 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -253,38 +253,38 @@ protected:
/* Delay information */
struct delay_info
{
- INT32 delay_cmd;
- UINT32 delay_pc;
+ int32_t delay_cmd;
+ uint32_t delay_pc;
};
// CPU registers
- UINT32 m_global_regs[32];
- UINT32 m_local_regs[64];
+ uint32_t m_global_regs[32];
+ uint32_t m_local_regs[64];
/* internal stuff */
- UINT32 m_ppc; // previous pc
- UINT16 m_op; // opcode
- UINT32 m_trap_entry; // entry point to get trap address
-
- UINT8 m_clock_scale_mask;
- UINT8 m_clck_scale;
- UINT8 m_clock_cycles_1;
- UINT8 m_clock_cycles_2;
- UINT8 m_clock_cycles_4;
- UINT8 m_clock_cycles_6;
-
- UINT64 m_tr_base_cycles;
- UINT32 m_tr_base_value;
- UINT32 m_tr_clocks_per_tick;
- UINT8 m_timer_int_pending;
+ uint32_t m_ppc; // previous pc
+ uint16_t m_op; // opcode
+ uint32_t m_trap_entry; // entry point to get trap address
+
+ uint8_t m_clock_scale_mask;
+ uint8_t m_clck_scale;
+ uint8_t m_clock_cycles_1;
+ uint8_t m_clock_cycles_2;
+ uint8_t m_clock_cycles_4;
+ uint8_t m_clock_cycles_6;
+
+ uint64_t m_tr_base_cycles;
+ uint32_t m_tr_base_value;
+ uint32_t m_tr_clocks_per_tick;
+ uint8_t m_timer_int_pending;
emu_timer *m_timer;
delay_info m_delay;
- UINT32 m_opcodexor;
+ uint32_t m_opcodexor;
- INT32 m_instruction_length;
- INT32 m_intblock;
+ int32_t m_instruction_length;
+ int32_t m_intblock;
// other internal state
int m_icount;
@@ -298,36 +298,36 @@ protected:
private:
struct regs_decode
{
- UINT8 src, dst; // destination and source register code
- UINT32 src_value; // current source register value
- UINT32 next_src_value; // current next source register value
- UINT32 dst_value; // current destination register value
- UINT32 next_dst_value; // current next destination register value
- UINT8 sub_type; // sub type opcode (for DD and X_CODE bits)
+ uint8_t src, dst; // destination and source register code
+ uint32_t src_value; // current source register value
+ uint32_t next_src_value; // current next source register value
+ uint32_t dst_value; // current destination register value
+ uint32_t next_dst_value; // current next destination register value
+ uint8_t sub_type; // sub type opcode (for DD and X_CODE bits)
union
{
- UINT32 u;
- INT32 s;
+ uint32_t u;
+ int32_t s;
} extra; // extra value such as immediate value, const, pcrel, ...
- UINT8 src_is_local;
- UINT8 dst_is_local;
- UINT8 same_src_dst;
- UINT8 same_src_dstf;
- UINT8 same_srcf_dst;
+ uint8_t src_is_local;
+ uint8_t dst_is_local;
+ uint8_t same_src_dst;
+ uint8_t same_src_dstf;
+ uint8_t same_srcf_dst;
};
// internal functions
void check_interrupts();
- void set_global_register(UINT8 code, UINT32 val);
- void set_local_register(UINT8 code, UINT32 val);
+ void set_global_register(uint8_t code, uint32_t val);
+ void set_local_register(uint8_t code, uint32_t val);
- UINT32 get_global_register(UINT8 code);
+ uint32_t get_global_register(uint8_t code);
- UINT32 get_trap_addr(UINT8 trapno);
- UINT32 get_emu_code_addr(UINT8 num);
+ uint32_t get_trap_addr(uint8_t trapno);
+ uint32_t get_emu_code_addr(uint8_t num);
void hyperstone_set_trap_entry(int which);
- UINT32 compute_tr();
+ uint32_t compute_tr();
void update_timer_prescale();
void adjust_timer_interrupt();
@@ -335,9 +335,9 @@ private:
void execute_br(struct regs_decode *decode);
void execute_dbr(struct regs_decode *decode);
- void execute_trap(UINT32 addr);
- void execute_int(UINT32 addr);
- void execute_exception(UINT32 addr);
+ void execute_trap(uint32_t addr);
+ void execute_int(uint32_t addr);
+ void execute_exception(uint32_t addr);
void execute_software(struct regs_decode *decode);
void hyperstone_chk(struct regs_decode *decode);
@@ -517,7 +517,7 @@ class e116t_device : public hyperstone_device
{
public:
// construction/destruction
- e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -530,7 +530,7 @@ class e116xt_device : public hyperstone_device
{
public:
// construction/destruction
- e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -543,7 +543,7 @@ class e116xs_device : public hyperstone_device
{
public:
// construction/destruction
- e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -556,7 +556,7 @@ class e116xsr_device : public hyperstone_device
{
public:
// construction/destruction
- e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -569,7 +569,7 @@ class e132n_device : public hyperstone_device
{
public:
// construction/destruction
- e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -582,7 +582,7 @@ class e132t_device : public hyperstone_device
{
public:
// construction/destruction
- e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -595,7 +595,7 @@ class e132xn_device : public hyperstone_device
{
public:
// construction/destruction
- e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -608,7 +608,7 @@ class e132xt_device : public hyperstone_device
{
public:
// construction/destruction
- e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -621,7 +621,7 @@ class e132xs_device : public hyperstone_device
{
public:
// construction/destruction
- e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -634,7 +634,7 @@ class e132xsr_device : public hyperstone_device
{
public:
// construction/destruction
- e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -647,7 +647,7 @@ class gms30c2116_device : public hyperstone_device
{
public:
// construction/destruction
- gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -660,7 +660,7 @@ class gms30c2132_device : public hyperstone_device
{
public:
// construction/destruction
- gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -673,7 +673,7 @@ class gms30c2216_device : public hyperstone_device
{
public:
// construction/destruction
- gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -686,7 +686,7 @@ class gms30c2232_device : public hyperstone_device
{
public:
// construction/destruction
- gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
diff --git a/src/devices/cpu/es5510/es5510.cpp b/src/devices/cpu/es5510/es5510.cpp
index fa4bd97a598..6191369a6a3 100644
--- a/src/devices/cpu/es5510/es5510.cpp
+++ b/src/devices/cpu/es5510/es5510.cpp
@@ -13,11 +13,11 @@
#include "es5510.h"
#include "cpu/m68000/m68000.h"
-static const INT32 MIN_24 = -(1 << 23);
-static const INT32 MAX_24 = (1 << 23) - 1;
+static const int32_t MIN_24 = -(1 << 23);
+static const int32_t MAX_24 = (1 << 23) - 1;
-static const INT64 MIN_48 = -(S64(1) << 47);
-static const INT64 MAX_48 = (S64(1) << 47) - 1;
+static const int64_t MIN_48 = -(S64(1) << 47);
+static const int64_t MAX_48 = (S64(1) << 47) - 1;
#define SIGN_BIT_24 (0x00800000)
#define GET_SIGN_BIT_24(x) ((x) & SIGN_BIT_24)
@@ -25,10 +25,10 @@ static const INT64 MAX_48 = (S64(1) << 47) - 1;
#define CARRY_OUT_24 (0x01000000)
-static inline INT32 SX(INT32 x) { return IS_NEGATIVE(x) ? x | 0xff000000 : x & 0x00ffffff; }
-static inline INT32 SC(INT32 x) { return x & 0x00ffffff; }
-static inline INT64 SX64(INT64 x) { return (x & S64(0x0000800000000000)) ? x | S64(0xffff000000000000) : x & S64(0x0000ffffffffffff); }
-//static inline INT64 SC64(INT64 x) { return x & S64(0x0000ffffffffffff); }
+static inline int32_t SX(int32_t x) { return IS_NEGATIVE(x) ? x | 0xff000000 : x & 0x00ffffff; }
+static inline int32_t SC(int32_t x) { return x & 0x00ffffff; }
+static inline int64_t SX64(int64_t x) { return (x & S64(0x0000800000000000)) ? x | S64(0xffff000000000000) : x & S64(0x0000ffffffffffff); }
+//static inline int64_t SC64(int64_t x) { return x & S64(0x0000ffffffffffff); }
#define VERBOSE 0
#define VERBOSE_EXEC 0
@@ -71,27 +71,27 @@ char *stpcpy_int (char *dst, const char *src)
return (char *) memcpy (dst, src, len + 1) + len;
}
-inline static UINT8 setFlag(UINT8 ccr, UINT8 flag) {
+inline static uint8_t setFlag(uint8_t ccr, uint8_t flag) {
return ccr | flag;
}
-inline static UINT8 clearFlag(UINT8 ccr, UINT8 flag) {
+inline static uint8_t clearFlag(uint8_t ccr, uint8_t flag) {
return ccr & ~flag;
}
-inline static UINT8 setFlagTo(UINT8 ccr, UINT8 flag, bool set) {
+inline static uint8_t setFlagTo(uint8_t ccr, uint8_t flag, bool set) {
return set ? setFlag(ccr, flag) : clearFlag(ccr, flag);
}
-inline static bool isFlagSet(UINT8 ccr, UINT8 flag) {
+inline static bool isFlagSet(uint8_t ccr, uint8_t flag) {
return (ccr & flag) != 0;
}
-inline static INT32 add(INT32 a, INT32 b, UINT8 &flags) {
- INT32 aSign = a & SIGN_BIT_24;
- INT32 bSign = b & SIGN_BIT_24;
- INT32 result = a + b;
- INT32 resultSign = result & SIGN_BIT_24;
+inline static int32_t add(int32_t a, int32_t b, uint8_t &flags) {
+ int32_t aSign = a & SIGN_BIT_24;
+ int32_t bSign = b & SIGN_BIT_24;
+ int32_t result = a + b;
+ int32_t resultSign = result & SIGN_BIT_24;
bool overflow = (aSign == bSign) && (aSign != resultSign);
bool carry = result & CARRY_OUT_24;
bool negative = resultSign != 0;
@@ -104,7 +104,7 @@ inline static INT32 add(INT32 a, INT32 b, UINT8 &flags) {
return SC(result);
}
-inline static INT32 saturate(INT32 value, UINT8 &flags, bool negative) {
+inline static int32_t saturate(int32_t value, uint8_t &flags, bool negative) {
if (isFlagSet(flags, FLAG_V)) {
setFlagTo(flags, FLAG_N, negative);
return negative ? MIN_24 : MAX_24;
@@ -113,20 +113,20 @@ inline static INT32 saturate(INT32 value, UINT8 &flags, bool negative) {
}
}
-inline static INT32 negate(INT32 value) {
+inline static int32_t negate(int32_t value) {
return ((value ^ 0x00ffffff) + 1) & 0x00ffffff;
}
-inline static INT32 asl(INT32 value, int shift, UINT8 &flags) {
- INT32 signBefore = value & SIGN_BIT_24;
- INT32 result = value << shift;
- INT32 signAfter = result & SIGN_BIT_24;
+inline static int32_t asl(int32_t value, int shift, uint8_t &flags) {
+ int32_t signBefore = value & SIGN_BIT_24;
+ int32_t result = value << shift;
+ int32_t signAfter = result & SIGN_BIT_24;
bool overflow = signBefore != signAfter;
flags = setFlagTo(flags, FLAG_V, overflow);
return saturate(result, flags, signBefore != 0);
}
-es5510_device::es5510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+es5510_device::es5510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ES5510, "ES5510", tag, owner, clock, "es5510", __FILE__)
{
// Initialize ESP to mostly zeroed, configured for 64k samples of delay line memory, running (not halted)
@@ -180,7 +180,7 @@ typedef es5510_device::alu_op_t alu_op_t;
typedef es5510_device::op_select_t op_select_t;
typedef es5510_device::op_src_dst_t op_src_dst_t;
-static inline const char * REGNAME(UINT8 r) {
+static inline const char * REGNAME(uint8_t r) {
static char rn[8];
if (r < 234) { sprintf(rn, "GPR_%02x", r); return rn; }
switch(r) {
@@ -210,7 +210,7 @@ static inline const char * REGNAME(UINT8 r) {
return nullptr;
}
-static inline char * DESCRIBE_REG(char *s, UINT8 r, const char *name) {
+static inline char * DESCRIBE_REG(char *s, uint8_t r, const char *name) {
if (name && *name) {
return s + sprintf(s, "%s/%s", REGNAME(r), name);
} else {
@@ -262,7 +262,7 @@ const op_select_t es5510_device::OPERAND_SELECT[16] = {
{ es5510_device::SRC_DST_DELAY, es5510_device::SRC_DST_BOTH, es5510_device::SRC_DST_DELAY, es5510_device::SRC_DST_REG },
};
-static inline char * DESCRIBE_SRC_DST(char *s, UINT8 reg, const char *regname, op_src_dst_t src_dst) {
+static inline char * DESCRIBE_SRC_DST(char *s, uint8_t reg, const char *regname, op_src_dst_t src_dst) {
switch (src_dst) {
case es5510_device::SRC_DST_REG:
return DESCRIBE_REG(s, reg, regname);
@@ -287,11 +287,11 @@ const es5510_device::ram_control_t es5510_device::RAM_CONTROL[8] = {
{ es5510_device::RAM_CYCLE_WRITE, es5510_device::RAM_CONTROL_IO, "Write to I/O at %06x" },
};
-static inline char * DESCRIBE_RAM(char *s, UINT8 ramControl, UINT32 gprContents) {
+static inline char * DESCRIBE_RAM(char *s, uint8_t ramControl, uint32_t gprContents) {
return s + sprintf(s, es5510_device::RAM_CONTROL[ramControl].description, SC(gprContents));
}
-static inline char * DESCRIBE_ALU(char *s, UINT8 opcode, UINT8 aReg, const char *aName, UINT8 bReg, const char *bName, const op_select_t &opSelect) {
+static inline char * DESCRIBE_ALU(char *s, uint8_t opcode, uint8_t aReg, const char *aName, uint8_t bReg, const char *bName, const op_select_t &opSelect) {
const alu_op_t &op = es5510_device::ALU_OPS[opcode];
switch (op.operands) {
@@ -315,7 +315,7 @@ static inline char * DESCRIBE_ALU(char *s, UINT8 opcode, UINT8 aReg, const char
return s;
}
-static inline char * DESCRIBE_MAC(char *s, UINT8 mac, UINT8 cReg, const char *cName, UINT8 dReg, const char *dName, const op_select_t &opSelect)
+static inline char * DESCRIBE_MAC(char *s, uint8_t mac, uint8_t cReg, const char *cName, uint8_t dReg, const char *dName, const op_select_t &opSelect)
{
if (mac)
{
@@ -328,17 +328,17 @@ static inline char * DESCRIBE_MAC(char *s, UINT8 mac, UINT8 cReg, const char *cN
return DESCRIBE_SRC_DST(s, cReg, cName, opSelect.mac_dst);
}
-static inline char * DESCRIBE_INSTR(char *s, UINT64 instr, UINT32 gpr, const char *aName, const char *bName, const char *cName, const char *dName)
+static inline char * DESCRIBE_INSTR(char *s, uint64_t instr, uint32_t gpr, const char *aName, const char *bName, const char *cName, const char *dName)
{
- UINT8 dReg = (UINT8)((instr >> 40) & 0xff);
- UINT8 cReg = (UINT8)((instr >> 32) & 0xff);
- UINT8 bReg = (UINT8)((instr >> 24) & 0xff);
- UINT8 aReg = (UINT8)((instr >> 16) & 0xff);
- UINT8 aluOpcode = (UINT8)((instr >> 12) & 0x0f);
- UINT8 operandSelect = (UINT8)((instr >> 8) & 0x0f);
- UINT8 skip = (UINT8)((instr >> 7) & 0x01);
- UINT8 mac = (UINT8)((instr >> 6) & 0x01);
- UINT8 ramControl = (UINT8)((instr >> 3) & 0x07);
+ uint8_t dReg = (uint8_t)((instr >> 40) & 0xff);
+ uint8_t cReg = (uint8_t)((instr >> 32) & 0xff);
+ uint8_t bReg = (uint8_t)((instr >> 24) & 0xff);
+ uint8_t aReg = (uint8_t)((instr >> 16) & 0xff);
+ uint8_t aluOpcode = (uint8_t)((instr >> 12) & 0x0f);
+ uint8_t operandSelect = (uint8_t)((instr >> 8) & 0x0f);
+ uint8_t skip = (uint8_t)((instr >> 7) & 0x01);
+ uint8_t mac = (uint8_t)((instr >> 6) & 0x01);
+ uint8_t ramControl = (uint8_t)((instr >> 3) & 0x07);
const op_select_t &opSelect = es5510_device::OPERAND_SELECT[operandSelect];
@@ -374,12 +374,12 @@ READ8_MEMBER(es5510_device::host_r)
case 0x01: LOG(("ES5510: Host Read GPR latch[1]: %02x\n", (gpr_latch >> 8) & 0xff)); return (gpr_latch >> 8) & 0xff;
case 0x02: LOG(("ES5510: Host Read GPR latch[0]: %02x\n", (gpr_latch >> 0) & 0xff)); return (gpr_latch >> 0) & 0xff;
- case 0x03: LOG(("ES5510: Host Read INSTR latch[5]: %02x\n", (UINT8)((instr_latch >> 40) & 0xff))); return (instr_latch >> 40) & 0xff;
- case 0x04: LOG(("ES5510: Host Read INSTR latch[4]: %02x\n", (UINT8)((instr_latch >> 32) & 0xff))); return (instr_latch >> 32) & 0xff;
- case 0x05: LOG(("ES5510: Host Read INSTR latch[3]: %02x\n", (UINT8)((instr_latch >> 24) & 0xff))); return (instr_latch >> 24) & 0xff;
- case 0x06: LOG(("ES5510: Host Read INSTR latch[2]: %02x\n", (UINT8)((instr_latch >> 16) & 0xff))); return (instr_latch >> 16) & 0xff;
- case 0x07: LOG(("ES5510: Host Read INSTR latch[1]: %02x\n", (UINT8)((instr_latch >> 8) & 0xff))); return (instr_latch >> 8) & 0xff;
- case 0x08: LOG(("ES5510: Host Read INSTR latch[0]: %02x\n", (UINT8)((instr_latch >> 0) & 0xff))); return (instr_latch >> 0) & 0xff;
+ case 0x03: LOG(("ES5510: Host Read INSTR latch[5]: %02x\n", (uint8_t)((instr_latch >> 40) & 0xff))); return (instr_latch >> 40) & 0xff;
+ case 0x04: LOG(("ES5510: Host Read INSTR latch[4]: %02x\n", (uint8_t)((instr_latch >> 32) & 0xff))); return (instr_latch >> 32) & 0xff;
+ case 0x05: LOG(("ES5510: Host Read INSTR latch[3]: %02x\n", (uint8_t)((instr_latch >> 24) & 0xff))); return (instr_latch >> 24) & 0xff;
+ case 0x06: LOG(("ES5510: Host Read INSTR latch[2]: %02x\n", (uint8_t)((instr_latch >> 16) & 0xff))); return (instr_latch >> 16) & 0xff;
+ case 0x07: LOG(("ES5510: Host Read INSTR latch[1]: %02x\n", (uint8_t)((instr_latch >> 8) & 0xff))); return (instr_latch >> 8) & 0xff;
+ case 0x08: LOG(("ES5510: Host Read INSTR latch[0]: %02x\n", (uint8_t)((instr_latch >> 0) & 0xff))); return (instr_latch >> 0) & 0xff;
case 0x09: LOG(("ES5510: Host Read DIL latch[2]: %02x\n", (dil_latch >> 16) & 0xff)); return (dil_latch >> 16) & 0xff;
case 0x0a: LOG(("ES5510: Host Read DIL latch[1]: %02x\n", (dil_latch >> 8) & 0xff)); return (dil_latch >> 8) & 0xff;
@@ -422,12 +422,12 @@ WRITE8_MEMBER(es5510_device::host_w)
break;
/* 0x03 to 0x08 INSTR Register */
- case 0x03: instr_latch = ((instr_latch&U64(0x00ffffffffff)) | ((INT64)data&0xff)<<40); LOG(("%s",string_format("ES5510: Host Write INSTR latch[5] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
- case 0x04: instr_latch = ((instr_latch&U64(0xff00ffffffff)) | ((INT64)data&0xff)<<32); LOG(("%s",string_format("ES5510: Host Write INSTR latch[4] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
- case 0x05: instr_latch = ((instr_latch&U64(0xffff00ffffff)) | ((INT64)data&0xff)<<24); LOG(("%s",string_format("ES5510: Host Write INSTR latch[3] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
- case 0x06: instr_latch = ((instr_latch&U64(0xffffff00ffff)) | ((INT64)data&0xff)<<16); LOG(("%s",string_format("ES5510: Host Write INSTR latch[2] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
- case 0x07: instr_latch = ((instr_latch&U64(0xffffffff00ff)) | ((INT64)data&0xff)<< 8); LOG(("%s",string_format("ES5510: Host Write INSTR latch[1] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
- case 0x08: instr_latch = ((instr_latch&U64(0xffffffffff00)) | ((INT64)data&0xff)<< 0); LOG(("%s",string_format("ES5510: Host Write INSTR latch[0] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
+ case 0x03: instr_latch = ((instr_latch&U64(0x00ffffffffff)) | ((int64_t)data&0xff)<<40); LOG(("%s",string_format("ES5510: Host Write INSTR latch[5] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
+ case 0x04: instr_latch = ((instr_latch&U64(0xff00ffffffff)) | ((int64_t)data&0xff)<<32); LOG(("%s",string_format("ES5510: Host Write INSTR latch[4] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
+ case 0x05: instr_latch = ((instr_latch&U64(0xffff00ffffff)) | ((int64_t)data&0xff)<<24); LOG(("%s",string_format("ES5510: Host Write INSTR latch[3] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
+ case 0x06: instr_latch = ((instr_latch&U64(0xffffff00ffff)) | ((int64_t)data&0xff)<<16); LOG(("%s",string_format("ES5510: Host Write INSTR latch[2] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
+ case 0x07: instr_latch = ((instr_latch&U64(0xffffffff00ff)) | ((int64_t)data&0xff)<< 8); LOG(("%s",string_format("ES5510: Host Write INSTR latch[1] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
+ case 0x08: instr_latch = ((instr_latch&U64(0xffffffffff00)) | ((int64_t)data&0xff)<< 0); LOG(("%s",string_format("ES5510: Host Write INSTR latch[0] = %02x -> %012I64x\n", data, instr_latch).c_str())); break;
/* 0x09 to 0x0b DIL Register (r/o) */
@@ -518,7 +518,7 @@ WRITE8_MEMBER(es5510_device::host_w)
}
}
-INT16 es5510_device::ser_r(int offset)
+int16_t es5510_device::ser_r(int offset)
{
switch(offset)
{
@@ -534,7 +534,7 @@ INT16 es5510_device::ser_r(int offset)
return 0;
}
-void es5510_device::ser_w(int offset, INT16 data)
+void es5510_device::ser_w(int offset, int16_t data)
{
switch(offset)
{
@@ -562,7 +562,7 @@ void es5510_device::device_reset() {
memset(dram, 0, sizeof(*dram) * (1<<20));
state = STATE_RUNNING;
dil_latch = dol_latch = dadr_latch = gpr_latch = 0;
- instr_latch = UINT64(0);
+ instr_latch = uint64_t(0);
ram_sel = 0;
host_control = 0;
memset(&ram, 0, sizeof(ram_t));
@@ -574,23 +574,23 @@ const address_space_config *es5510_device::memory_space_config(address_spacenum
return nullptr;
}
-UINT64 es5510_device::execute_clocks_to_cycles(UINT64 clocks) const {
+uint64_t es5510_device::execute_clocks_to_cycles(uint64_t clocks) const {
return clocks / 3;
}
-UINT64 es5510_device::execute_cycles_to_clocks(UINT64 cycles) const {
+uint64_t es5510_device::execute_cycles_to_clocks(uint64_t cycles) const {
return cycles * 3;
}
-UINT32 es5510_device::execute_min_cycles() const {
+uint32_t es5510_device::execute_min_cycles() const {
return 1;
}
-UINT32 es5510_device::execute_max_cycles() const {
+uint32_t es5510_device::execute_max_cycles() const {
return 1;
}
-UINT32 es5510_device::execute_input_lines() const {
+uint32_t es5510_device::execute_input_lines() const {
return 1;
}
@@ -615,18 +615,18 @@ void es5510_device::list_program(void(p)(const char *, ...)) {
for (addr = 0; addr < 0xa0; addr++) {
DESCRIBE_INSTR(buf, instr[addr], gpr[addr], nullptr, nullptr, nullptr, nullptr);
- UINT64 inst = instr[addr];
- UINT8 aReg = (UINT8)((inst >> 16) & 0xff);
- UINT8 bReg = (UINT8)((inst >> 24) & 0xff);
- UINT8 cReg = (UINT8)((inst >> 32) & 0xff);
- UINT8 dReg = (UINT8)((inst >> 40) & 0xff);
- UINT8 alu_op = (inst >> 12) & 0x0f;
+ uint64_t inst = instr[addr];
+ uint8_t aReg = (uint8_t)((inst >> 16) & 0xff);
+ uint8_t bReg = (uint8_t)((inst >> 24) & 0xff);
+ uint8_t cReg = (uint8_t)((inst >> 32) & 0xff);
+ uint8_t dReg = (uint8_t)((inst >> 40) & 0xff);
+ uint8_t alu_op = (inst >> 12) & 0x0f;
if (alu_op == 0x0f) {
// END!
break;
}
- UINT8 operandSelect = (UINT8)((inst >> 8) & 0x0f);
+ uint8_t operandSelect = (uint8_t)((inst >> 8) & 0x0f);
const op_select_t &opSelect = OPERAND_SELECT[operandSelect];
if (opSelect.mac_src == SRC_DST_REG) {
@@ -671,10 +671,10 @@ void es5510_device::list_program(void(p)(const char *, ...)) {
}
for (addr = 0; addr < 0xa0; addr++) {
- UINT8 aReg = (UINT8)((instr[addr] >> 16) & 0xff);
- UINT8 bReg = (UINT8)((instr[addr] >> 24) & 0xff);
- UINT8 cReg = (UINT8)((instr[addr] >> 32) & 0xff);
- UINT8 dReg = (UINT8)((instr[addr] >> 40) & 0xff);
+ uint8_t aReg = (uint8_t)((instr[addr] >> 16) & 0xff);
+ uint8_t bReg = (uint8_t)((instr[addr] >> 24) & 0xff);
+ uint8_t cReg = (uint8_t)((instr[addr] >> 32) & 0xff);
+ uint8_t dReg = (uint8_t)((instr[addr] >> 40) & 0xff);
DESCRIBE_INSTR(buf, instr[addr], gpr[addr], name[aReg], name[bReg], name[cReg], name[dReg]);
p("%s",string_format("%02x: %012I64x %06x (%8d) %s\n", addr, instr[addr], gpr[addr]&0xffffff, SX(gpr[addr]&0xffffff), buf).c_str());
}
@@ -715,7 +715,7 @@ void es5510_device::execute_run() {
// *** T0, clock low
// --- Read instruction N
- UINT64 instr = this->instr[pc];
+ uint64_t instr = this->instr[pc];
// --- RAM cycle N-2 (if a Read cycle): data read from bus is stored in DIL
if (ram_pp.cycle != RAM_CYCLE_WRITE) {
@@ -733,7 +733,7 @@ void es5510_device::execute_run() {
ram.io = ramControl.access == RAM_CONTROL_IO;
// --- RAM cycle N: read offset N
- INT32 offset = gpr[pc];
+ int32_t offset = gpr[pc];
switch(ramControl.access) {
case RAM_CONTROL_DELAY:
ram.address = (((dbase + offset) % (dlength + memincrement)) & memmask) >> memshift;
@@ -759,7 +759,7 @@ void es5510_device::execute_run() {
LOG_EXEC(("- T1.1\n"));
- UINT8 operandSelect = (UINT8)((instr >> 8) & 0x0f);
+ uint8_t operandSelect = (uint8_t)((instr >> 8) & 0x0f);
const op_select_t &opSelect = OPERAND_SELECT[operandSelect];
bool skip;
bool skippable = (instr & (0x01 << 7)) != 0; // aka the 'SKIP' bit in the instruction word
@@ -777,7 +777,7 @@ void es5510_device::execute_run() {
// --- Write Multiplier result N-1
LOG_EXEC((". write mulacc:\n"));
if (mulacc.write_result) {
- mulacc.product = ((INT64)SX(mulacc.cValue) * (INT64)SX(mulacc.dValue)) << mulshift;
+ mulacc.product = ((int64_t)SX(mulacc.cValue) * (int64_t)SX(mulacc.dValue)) << mulshift;
if (mulacc.accumulate) {
mulacc.result = mulacc.product + machl;
} else {
@@ -802,7 +802,7 @@ void es5510_device::execute_run() {
}
#endif
machl = mulacc.result;
- INT32 tmp = mac_overflow ? (machl < 0 ? MIN_24 : MAX_24) : (mulacc.result & U64(0x0000ffffff000000)) >> 24;
+ int32_t tmp = mac_overflow ? (machl < 0 ? MIN_24 : MAX_24) : (mulacc.result & U64(0x0000ffffff000000)) >> 24;
if (mulacc.dst & SRC_DST_REG) {
write_reg(mulacc.cReg, tmp);
}
@@ -817,8 +817,8 @@ void es5510_device::execute_run() {
// --- Start of multiplier cycle N
LOG_EXEC((". start mulacc:\n"));
- mulacc.cReg = (UINT8)((instr >> 32) & 0xff);
- mulacc.dReg = (UINT8)((instr >> 40) & 0xff);
+ mulacc.cReg = (uint8_t)((instr >> 32) & 0xff);
+ mulacc.dReg = (uint8_t)((instr >> 40) & 0xff);
mulacc.src = opSelect.mac_src;
mulacc.dst = opSelect.mac_dst;
mulacc.accumulate = ((instr >> 6) & 0x01) != 0;
@@ -840,7 +840,7 @@ void es5510_device::execute_run() {
// --- Write ALU Result N-1
LOG_EXEC((". write ALU:\n"));
if (alu.write_result) {
- UINT8 flags = ccr;
+ uint8_t flags = ccr;
alu.result = alu_operation(alu.op, alu.aValue, alu.bValue, flags);
if (alu.dst & SRC_DST_REG) {
write_reg(alu.aReg, alu.result);
@@ -923,32 +923,32 @@ void es5510_device::execute_run() {
}
}
-UINT32 es5510_device::disasm_min_opcode_bytes() const
+uint32_t es5510_device::disasm_min_opcode_bytes() const
{
return 6;
}
-UINT32 es5510_device::disasm_max_opcode_bytes() const
+uint32_t es5510_device::disasm_max_opcode_bytes() const
{
return 6;
}
-offs_t es5510_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t es5510_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return pc;
}
#if VERBOSE_EXEC
-#define RETURN_GPR(r, x) do { INT32 v = (x); LOG_EXEC((" . reading %x (%d) from gpr_%02x\n", v, SX(v), r)); return v; } while(0)
-#define RETURN(r, x) do { INT32 v = (x); LOG_EXEC((" . reading %x (%d) from " #r "\n", v, SX(v))); return v; } while(0)
-#define RETURN16(r, x) do { INT16 vv = (x); INT32 v = vv << 8; LOG_EXEC((" . reading %x (%d) as %x (%d) from " #r "\n", vv, vv, v, SX(v))); return v; } while(0)
+#define RETURN_GPR(r, x) do { int32_t v = (x); LOG_EXEC((" . reading %x (%d) from gpr_%02x\n", v, SX(v), r)); return v; } while(0)
+#define RETURN(r, x) do { int32_t v = (x); LOG_EXEC((" . reading %x (%d) from " #r "\n", v, SX(v))); return v; } while(0)
+#define RETURN16(r, x) do { int16_t vv = (x); int32_t v = vv << 8; LOG_EXEC((" . reading %x (%d) as %x (%d) from " #r "\n", vv, vv, v, SX(v))); return v; } while(0)
#else
#define RETURN_GPR(r, x) return x
#define RETURN(r, x) return x
#define RETURN16(r, x) return (x) << 8
#endif
-INT32 es5510_device::read_reg(UINT8 reg)
+int32_t es5510_device::read_reg(uint8_t reg)
{
if (reg < 0xc0) {
RETURN_GPR(reg, gpr[reg]);
@@ -1003,8 +1003,8 @@ void es5510_device::run_once()
}
}
-INT8 countLowOnes(INT32 x) {
- INT8 n = 0;
+int8_t countLowOnes(int32_t x) {
+ int8_t n = 0;
while ((x & 1) == 1) {
++n;
x >>= 1;
@@ -1020,10 +1020,10 @@ INT8 countLowOnes(INT32 x) {
#define WRITE_REG16(r, x) do { r = ((value >> 8) & 0xffff); } while(0)
#endif
-void es5510_device::write_reg(UINT8 reg, INT32 value)
+void es5510_device::write_reg(uint8_t reg, int32_t value)
{
#if VERBOSE_EXEC
- INT64 old;
+ int64_t old;
#endif
value &= 0x00ffffff;
if (reg < 0xc0) {
@@ -1052,8 +1052,8 @@ void es5510_device::write_reg(UINT8 reg, INT32 value)
#if VERBOSE_EXEC
old = machl;
#endif
- INT64 masked = machl & (S64(0x00ffffff) << 24);
- INT64 shifted = (INT64)(value & 0x00ffffff) << 0;
+ int64_t masked = machl & (S64(0x00ffffff) << 24);
+ int64_t shifted = (int64_t)(value & 0x00ffffff) << 0;
machl = SX64(masked | shifted);
#if VERBOSE_EXEC
LOG_EXEC((" . writing machl: l -> %06x => %llx -> %llx\n", value, old, machl));
@@ -1064,8 +1064,8 @@ void es5510_device::write_reg(UINT8 reg, INT32 value)
#if VERBOSE_EXEC
old = machl;
#endif
- INT64 masked = machl & (S64(0x00ffffff) << 0);
- INT64 shifted = (INT64)(value & 0x00ffffff) << 24;
+ int64_t masked = machl & (S64(0x00ffffff) << 0);
+ int64_t shifted = (int64_t)(value & 0x00ffffff) << 24;
machl = SX64(masked | shifted);
mac_overflow = false;
#if VERBOSE_EXEC
@@ -1108,7 +1108,7 @@ void es5510_device::write_reg(UINT8 reg, INT32 value)
}
}
-void es5510_device::write_to_dol(INT32 value) {
+void es5510_device::write_to_dol(int32_t value) {
#if VERBOSE_EXEC
LOG_EXEC((". writing %x (%d) to DOL: [ ", value, value));
if (dol_count >= 1) LOG_EXEC(("{ %x (%d) }", dol[0], SX(dol[0])));
@@ -1153,8 +1153,8 @@ void es5510_device::alu_operation_end() {
#endif
}
-INT32 es5510_device::alu_operation(UINT8 op, INT32 a, INT32 b, UINT8 &flags) {
- INT32 tmp;
+int32_t es5510_device::alu_operation(uint8_t op, int32_t a, int32_t b, uint8_t &flags) {
+ int32_t tmp;
switch(op) {
case 0x0: // ADD
tmp = add(a, b, flags);
diff --git a/src/devices/cpu/es5510/es5510.h b/src/devices/cpu/es5510/es5510.h
index 7cc2d7fba7e..76d890db2a7 100644
--- a/src/devices/cpu/es5510/es5510.h
+++ b/src/devices/cpu/es5510/es5510.h
@@ -16,13 +16,13 @@
class es5510_device : public cpu_device {
public:
- es5510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ es5510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(host_r);
DECLARE_WRITE8_MEMBER(host_w);
- INT16 ser_r(int offset);
- void ser_w(int offset, INT16 data);
+ int16_t ser_r(int offset);
+ void ser_w(int offset, int16_t data);
enum line_t {
ES5510_HALT = 0
@@ -75,33 +75,33 @@ public:
static const ram_control_t RAM_CONTROL[8];
struct alu_t {
- UINT8 aReg;
- UINT8 bReg;
+ uint8_t aReg;
+ uint8_t bReg;
op_src_dst_t src;
op_src_dst_t dst;
- UINT8 op;
- INT32 aValue;
- INT32 bValue;
- INT32 result;
+ uint8_t op;
+ int32_t aValue;
+ int32_t bValue;
+ int32_t result;
bool update_ccr;
bool write_result;
};
struct mulacc_t {
- UINT8 cReg;
- UINT8 dReg;
+ uint8_t cReg;
+ uint8_t dReg;
op_src_dst_t src;
op_src_dst_t dst;
bool accumulate;
- INT32 cValue;
- INT32 dValue;
- INT64 product;
- INT64 result;
+ int32_t cValue;
+ int32_t dValue;
+ int64_t product;
+ int64_t result;
bool write_result;
};
struct ram_t {
- INT32 address; // up to 20 bits, left-justified within the right 24 bits of the 32-bit word
+ int32_t address; // up to 20 bits, left-justified within the right 24 bits of the 32-bit word
bool io; // I/O space, rather than delay line memory
ram_cycle_t cycle; // cycle type
};
@@ -114,75 +114,75 @@ public:
void list_program(void(p)(const char *, ...));
// for testing purposes
- UINT64 &_instr(int pc) { return instr[pc % 160]; }
- INT16 &_dram(int addr) { return dram[addr & 0xfffff]; }
+ uint64_t &_instr(int pc) { return instr[pc % 160]; }
+ int16_t &_dram(int addr) { return dram[addr & 0xfffff]; }
// publicly visible for testing purposes
- INT32 read_reg(UINT8 reg);
- void write_reg(UINT8 reg, INT32 value);
- void write_to_dol(INT32 value);
+ int32_t read_reg(uint8_t reg);
+ void write_reg(uint8_t reg, int32_t value);
+ void write_to_dol(int32_t value);
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override;
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override;
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override;
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void execute_set_input(int linenum, int state) override;
- INT32 alu_operation(UINT8 op, INT32 aValue, INT32 bValue, UINT8 &flags);
+ int32_t alu_operation(uint8_t op, int32_t aValue, int32_t bValue, uint8_t &flags);
void alu_operation_end();
private:
int icount;
bool halt_asserted;
- UINT8 pc;
+ uint8_t pc;
state_t state;
- INT32 gpr[0xc0]; // 24 bits, right justified
- INT16 ser0r;
- INT16 ser0l;
- INT16 ser1r;
- INT16 ser1l;
- INT16 ser2r;
- INT16 ser2l;
- INT16 ser3r;
- INT16 ser3l;
- INT64 machl; // 48 bits, right justified and sign extended
+ int32_t gpr[0xc0]; // 24 bits, right justified
+ int16_t ser0r;
+ int16_t ser0l;
+ int16_t ser1r;
+ int16_t ser1l;
+ int16_t ser2r;
+ int16_t ser2l;
+ int16_t ser3r;
+ int16_t ser3l;
+ int64_t machl; // 48 bits, right justified and sign extended
bool mac_overflow; // whether reading the MAC register should return a saturated replacement value
- INT32 dil;
- INT32 memsiz;
- INT32 memmask;
- INT32 memincrement;
- INT8 memshift;
- INT32 dlength;
- INT32 abase;
- INT32 bbase;
- INT32 dbase;
- INT32 sigreg;
+ int32_t dil;
+ int32_t memsiz;
+ int32_t memmask;
+ int32_t memincrement;
+ int8_t memshift;
+ int32_t dlength;
+ int32_t abase;
+ int32_t bbase;
+ int32_t dbase;
+ int32_t sigreg;
int mulshift;
- INT8 ccr; // really, 5 bits, left justified
- INT8 cmr; // really, 6 bits, left justified
- INT32 dol[2];
+ int8_t ccr; // really, 5 bits, left justified
+ int8_t cmr; // really, 6 bits, left justified
+ int32_t dol[2];
int dol_count;
- UINT64 instr[160]; // 48 bits, right justified
- INT16 dram[1<<20]; // there are up to 20 address bits (at least 16 expected), left justified within the 24 bits of a gpr or dadr; we preallocate all of it.
+ uint64_t instr[160]; // 48 bits, right justified
+ int16_t dram[1<<20]; // there are up to 20 address bits (at least 16 expected), left justified within the 24 bits of a gpr or dadr; we preallocate all of it.
// latch registers for host interaction
- INT32 dol_latch; // 24 bits
- INT32 dil_latch; // 24 bits
- UINT32 dadr_latch; // 24 bits
- INT32 gpr_latch; // 24 bits, holding up to 20 address bits, left justified
- UINT64 instr_latch; // 48 bits, right justified
- UINT8 ram_sel; // effectively a boolean
- UINT8 host_control; //
+ int32_t dol_latch; // 24 bits
+ int32_t dil_latch; // 24 bits
+ uint32_t dadr_latch; // 24 bits
+ int32_t gpr_latch; // 24 bits, holding up to 20 address bits, left justified
+ uint64_t instr_latch; // 48 bits, right justified
+ uint8_t ram_sel; // effectively a boolean
+ uint8_t host_control; //
// currently executing instruction(s)
alu_t alu;
diff --git a/src/devices/cpu/esrip/esrip.cpp b/src/devices/cpu/esrip/esrip.cpp
index def6fbc6a05..dc5e79a18d3 100644
--- a/src/devices/cpu/esrip/esrip.cpp
+++ b/src/devices/cpu/esrip/esrip.cpp
@@ -18,7 +18,7 @@
CONSTANTS
***************************************************************************/
-#define IPT_RAM_SIZE (8192 * sizeof(UINT16))
+#define IPT_RAM_SIZE (8192 * sizeof(uint16_t))
/***************************************************************************
@@ -65,7 +65,7 @@
PUBLIC FUNCTIONS
***************************************************************************/
-UINT8 esrip_device::get_rip_status()
+uint8_t esrip_device::get_rip_status()
{
return m_status_out;
}
@@ -182,7 +182,7 @@ void esrip_device::device_start()
/* Register configuration structure callbacks */
m_fdt_r.resolve_safe(0);
m_fdt_w.resolve_safe();
- m_lbrm = (UINT8*)machine().root_device().memregion(m_lbrm_prom)->base();
+ m_lbrm = (uint8_t*)machine().root_device().memregion(m_lbrm_prom)->base();
m_status_in.resolve_safe(0);
m_draw.bind_relative_to(*owner());
@@ -376,7 +376,7 @@ void esrip_device::state_string_export(const device_state_entry &entry, std::str
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 esrip_device::disasm_min_opcode_bytes() const
+uint32_t esrip_device::disasm_min_opcode_bytes() const
{
return 8;
}
@@ -387,7 +387,7 @@ UINT32 esrip_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 esrip_device::disasm_max_opcode_bytes() const
+uint32_t esrip_device::disasm_max_opcode_bytes() const
{
return 8;
}
@@ -398,7 +398,7 @@ UINT32 esrip_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t esrip_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t esrip_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( esrip );
return CPU_DISASSEMBLE_NAME(esrip)(this, buffer, pc, oprom, opram, options);
@@ -420,12 +420,12 @@ int esrip_device::get_lbrm() const
int addr = ((m_y_scale & 0x3f) << 3) | ((m_line_latch >> 3) & 7);
int sel = (m_line_latch & 7);
- UINT8 val = m_lbrm[addr];
+ uint8_t val = m_lbrm[addr];
return (val >> sel) & 1;
}
-int esrip_device::check_jmp(UINT8 jmp_ctrl) const
+int esrip_device::check_jmp(uint8_t jmp_ctrl) const
{
int ret = 0;
@@ -468,37 +468,37 @@ int esrip_device::check_jmp(UINT8 jmp_ctrl) const
}
-void esrip_device::calc_z_flag(UINT16 res)
+void esrip_device::calc_z_flag(uint16_t res)
{
m_new_status &= ~Z_FLAG;
m_new_status |= (res == 0);
}
-void esrip_device::calc_c_flag_add(UINT16 a, UINT16 b)
+void esrip_device::calc_c_flag_add(uint16_t a, uint16_t b)
{
m_new_status &= ~C_FLAG;
- m_new_status |= ((UINT16)(b) > (UINT16)(~(a))) ? 2 : 0;
+ m_new_status |= ((uint16_t)(b) > (uint16_t)(~(a))) ? 2 : 0;
}
-void esrip_device::calc_c_flag_sub(UINT16 a, UINT16 b)
+void esrip_device::calc_c_flag_sub(uint16_t a, uint16_t b)
{
m_new_status &= ~C_FLAG;
- m_new_status |= ((UINT16)(b) <= (UINT16)(a)) ? 2 : 0;
+ m_new_status |= ((uint16_t)(b) <= (uint16_t)(a)) ? 2 : 0;
}
-void esrip_device::calc_n_flag(UINT16 res)
+void esrip_device::calc_n_flag(uint16_t res)
{
m_new_status &= ~N_FLAG;
m_new_status |= (res & 0x8000) ? 4 : 0;
}
-void esrip_device::calc_v_flag_add(UINT16 a, UINT16 b, UINT32 r)
+void esrip_device::calc_v_flag_add(uint16_t a, uint16_t b, uint32_t r)
{
m_new_status &= ~V_FLAG;
m_new_status |= ((a ^ r) & (b ^ r) & 0x8000) ? 8 : 0;
}
-void esrip_device::calc_v_flag_sub(UINT16 a, UINT16 b, UINT32 r)
+void esrip_device::calc_v_flag_sub(uint16_t a, uint16_t b, uint32_t r)
{
m_new_status &= ~V_FLAG;
m_new_status |= ((a ^ b) & (r ^ b) & 0x8000) ? 8 : 0;
@@ -545,9 +545,9 @@ enum
SORR = 0xb
};
-UINT16 esrip_device::sor_op(UINT16 r, UINT16 opcode)
+uint16_t esrip_device::sor_op(uint16_t r, uint16_t opcode)
{
- UINT32 res = 0;
+ uint32_t res = 0;
switch (opcode)
{
@@ -591,11 +591,11 @@ UINT16 esrip_device::sor_op(UINT16 r, UINT16 opcode)
return res & 0xffff;
}
-void esrip_device::sor(UINT16 inst)
+void esrip_device::sor(uint16_t inst)
{
- UINT16 r = 0;
- UINT16 dst = 0;
- UINT16 res = 0;
+ uint16_t r = 0;
+ uint16_t dst = 0;
+ uint16_t res = 0;
if (BYTE_MODE)
{
@@ -663,10 +663,10 @@ enum
NRAS = 5
};
-void esrip_device::sonr(UINT16 inst)
+void esrip_device::sonr(uint16_t inst)
{
- UINT16 r = 0;
- UINT16 res = 0;
+ uint16_t r = 0;
+ uint16_t res = 0;
switch ((inst >> 5) & 0xf)
{
@@ -727,9 +727,9 @@ enum
EXNOR = 0xb
};
-UINT16 esrip_device::tor_op(UINT16 r, UINT16 s, int opcode)
+uint16_t esrip_device::tor_op(uint16_t r, uint16_t s, int opcode)
{
- UINT32 res = 0;
+ uint32_t res = 0;
switch (opcode)
{
@@ -825,12 +825,12 @@ UINT16 esrip_device::tor_op(UINT16 r, UINT16 s, int opcode)
return res & 0xffff;
}
-void esrip_device::tor1(UINT16 inst)
+void esrip_device::tor1(uint16_t inst)
{
- UINT16 r = 0;
- UINT16 s = 0;
- UINT16 dst = 0;
- UINT16 res = 0;
+ uint16_t r = 0;
+ uint16_t s = 0;
+ uint16_t dst = 0;
+ uint16_t res = 0;
enum
{
@@ -922,11 +922,11 @@ void esrip_device::tor1(UINT16 inst)
m_result = res;
}
-void esrip_device::tor2(UINT16 inst)
+void esrip_device::tor2(uint16_t inst)
{
- UINT16 r = 0;
- UINT16 s = 0;
- UINT32 res = 0;
+ uint16_t r = 0;
+ uint16_t s = 0;
+ uint32_t res = 0;
enum
{
@@ -982,7 +982,7 @@ void esrip_device::tor2(UINT16 inst)
m_result = res;
}
-void esrip_device::tonr(UINT16 inst)
+void esrip_device::tonr(uint16_t inst)
{
enum
{
@@ -991,9 +991,9 @@ void esrip_device::tonr(UINT16 inst)
TODI = 0x5
};
- UINT16 r = 0;
- UINT16 s = 0;
- UINT16 res = 0;
+ uint16_t r = 0;
+ uint16_t s = 0;
+ uint16_t res = 0;
switch (SRC)
{
@@ -1055,7 +1055,7 @@ void esrip_device::tonr(UINT16 inst)
*
*************************************/
-void esrip_device::bonr(UINT16 inst)
+void esrip_device::bonr(uint16_t inst)
{
enum
{
@@ -1075,7 +1075,7 @@ void esrip_device::bonr(UINT16 inst)
LDC2NY = 0x17
};
- UINT16 res = 0;
+ uint16_t res = 0;
switch (inst & 0x1f)
{
@@ -1106,8 +1106,8 @@ void esrip_device::bonr(UINT16 inst)
}
case A2NA:
{
- UINT16 r = m_acc;
- UINT16 s = 1 << N;
+ uint16_t r = m_acc;
+ uint16_t s = 1 << N;
res = r + s;
calc_z_flag(res);
calc_n_flag(res);
@@ -1118,8 +1118,8 @@ void esrip_device::bonr(UINT16 inst)
}
case S2NA:
{
- UINT16 r = m_acc;
- UINT16 s = 1 << N;
+ uint16_t r = m_acc;
+ uint16_t s = 1 << N;
res = r - s;
calc_z_flag(res);
calc_n_flag(res);
@@ -1140,7 +1140,7 @@ void esrip_device::bonr(UINT16 inst)
case SETND:
{
- UINT16 r = m_d_latch;
+ uint16_t r = m_d_latch;
res = r | (1 << N);
m_d_latch = res;
@@ -1165,8 +1165,8 @@ void esrip_device::bonr(UINT16 inst)
case A2NDY:
{
- UINT16 r = m_d_latch;
- UINT16 s = 1 << N;
+ uint16_t r = m_d_latch;
+ uint16_t s = 1 << N;
res = r + s;
calc_z_flag(res);
@@ -1183,7 +1183,7 @@ void esrip_device::bonr(UINT16 inst)
m_result = res;
}
-void esrip_device::bor1(UINT16 inst)
+void esrip_device::bor1(uint16_t inst)
{
enum
{
@@ -1192,7 +1192,7 @@ void esrip_device::bor1(UINT16 inst)
TSTNR = 0xf
};
- UINT16 res = 0;
+ uint16_t res = 0;
switch ((inst >> 5) & 0xf)
{
@@ -1227,7 +1227,7 @@ void esrip_device::bor1(UINT16 inst)
m_result = res;
}
-void esrip_device::bor2(UINT16 inst)
+void esrip_device::bor2(uint16_t inst)
{
enum
{
@@ -1237,7 +1237,7 @@ void esrip_device::bor2(UINT16 inst)
S2NR = 0xf
};
- UINT32 res = 0;
+ uint32_t res = 0;
switch ((inst >> 5) & 0xf)
{
@@ -1257,8 +1257,8 @@ void esrip_device::bor2(UINT16 inst)
}
case A2NR:
{
- UINT16 r = m_ram[RAM_ADDR];
- UINT16 s = 1 << N;
+ uint16_t r = m_ram[RAM_ADDR];
+ uint16_t s = 1 << N;
res = r + s;
calc_v_flag_add(r, s, res);
@@ -1269,8 +1269,8 @@ void esrip_device::bor2(UINT16 inst)
}
case S2NR:
{
- UINT16 r = m_ram[RAM_ADDR];
- UINT16 s = 1 << N;
+ uint16_t r = m_ram[RAM_ADDR];
+ uint16_t s = 1 << N;
res = r - s;
calc_v_flag_sub(r, s, res);
@@ -1294,7 +1294,7 @@ void esrip_device::bor2(UINT16 inst)
*************************************/
/* TODO Combine these */
-void esrip_device::rotr1(UINT16 inst)
+void esrip_device::rotr1(uint16_t inst)
{
enum
{
@@ -1303,9 +1303,9 @@ void esrip_device::rotr1(UINT16 inst)
RTRR = 0xf
};
- UINT16 u = 0;
- UINT16 dst = 0;
- UINT16 res = 0;
+ uint16_t u = 0;
+ uint16_t dst = 0;
+ uint16_t res = 0;
int n = N;
switch ((inst >> 5) & 0xf)
@@ -1330,7 +1330,7 @@ void esrip_device::rotr1(UINT16 inst)
m_result = res;
}
-void esrip_device::rotr2(UINT16 inst)
+void esrip_device::rotr2(uint16_t inst)
{
enum
{
@@ -1338,8 +1338,8 @@ void esrip_device::rotr2(UINT16 inst)
RTDR = 1
};
- UINT16 u = 0;
- UINT16 res = 0;
+ uint16_t u = 0;
+ uint16_t res = 0;
switch ((inst >> 5) & 0xf)
{
@@ -1357,7 +1357,7 @@ void esrip_device::rotr2(UINT16 inst)
m_result = res;
}
-void esrip_device::rotnr(UINT16 inst)
+void esrip_device::rotnr(uint16_t inst)
{
enum
{
@@ -1367,9 +1367,9 @@ void esrip_device::rotnr(UINT16 inst)
RTAA = 0x1d
};
- UINT16 u = 0;
- UINT16 res = 0;
- UINT16 dst = 0;
+ uint16_t u = 0;
+ uint16_t res = 0;
+ uint16_t dst = 0;
switch (inst & 0x1f)
{
@@ -1402,7 +1402,7 @@ void esrip_device::rotnr(UINT16 inst)
*
*************************************/
-void esrip_device::rotc(UINT16 inst)
+void esrip_device::rotc(uint16_t inst)
{
UNHANDLED;
}
@@ -1413,7 +1413,7 @@ void esrip_device::rotc(UINT16 inst)
*
*************************************/
-void esrip_device::rotm(UINT16 inst)
+void esrip_device::rotm(uint16_t inst)
{
UNHANDLED;
}
@@ -1424,12 +1424,12 @@ void esrip_device::rotm(UINT16 inst)
*
*************************************/
-void esrip_device::prt(UINT16 inst)
+void esrip_device::prt(uint16_t inst)
{
UNHANDLED;
}
-void esrip_device::prtnr(UINT16 inst)
+void esrip_device::prtnr(uint16_t inst)
{
UNHANDLED;
}
@@ -1441,12 +1441,12 @@ void esrip_device::prtnr(UINT16 inst)
*
*************************************/
-void esrip_device::crcf(UINT16 inst)
+void esrip_device::crcf(uint16_t inst)
{
UNHANDLED;
}
-void esrip_device::crcr(UINT16 inst)
+void esrip_device::crcr(uint16_t inst)
{
UNHANDLED;
}
@@ -1472,9 +1472,9 @@ enum
#define SET_LINK_flag(x) (m_new_status &= ~L_FLAG); \
(m_new_status |= x ? L_FLAG : 0)
-UINT16 esrip_device::shift_op(UINT16 u, int opcode)
+uint16_t esrip_device::shift_op(uint16_t u, int opcode)
{
- UINT32 res = 0;
+ uint32_t res = 0;
switch (opcode)
{
@@ -1517,7 +1517,7 @@ UINT16 esrip_device::shift_op(UINT16 u, int opcode)
return res;
}
-void esrip_device::shftr(UINT16 inst)
+void esrip_device::shftr(uint16_t inst)
{
enum
{
@@ -1525,8 +1525,8 @@ void esrip_device::shftr(UINT16 inst)
SHDR = 7
};
- UINT16 u = 0;
- UINT16 res = 0;
+ uint16_t u = 0;
+ uint16_t res = 0;
switch ((inst >> 9) & 0xf)
{
@@ -1542,7 +1542,7 @@ void esrip_device::shftr(UINT16 inst)
m_result = res;
}
-void esrip_device::shftnr(UINT16 inst)
+void esrip_device::shftnr(uint16_t inst)
{
enum
{
@@ -1550,8 +1550,8 @@ void esrip_device::shftnr(UINT16 inst)
SHD = 7
};
- UINT16 u = 0;
- UINT16 res = 0;
+ uint16_t u = 0;
+ uint16_t res = 0;
switch ((inst >> 9) & 0xf)
{
@@ -1578,12 +1578,12 @@ void esrip_device::shftnr(UINT16 inst)
*
*************************************/
-void esrip_device::svstr(UINT16 inst)
+void esrip_device::svstr(uint16_t inst)
{
UNHANDLED;
}
-void esrip_device::rstst(UINT16 inst)
+void esrip_device::rstst(uint16_t inst)
{
enum
{
@@ -1606,7 +1606,7 @@ void esrip_device::rstst(UINT16 inst)
m_result = 0;
}
-void esrip_device::setst(UINT16 inst)
+void esrip_device::setst(uint16_t inst)
{
enum
{
@@ -1629,7 +1629,7 @@ void esrip_device::setst(UINT16 inst)
m_result = 0xffff;
}
-void esrip_device::test(UINT16 inst)
+void esrip_device::test(uint16_t inst)
{
enum
{
@@ -1647,7 +1647,7 @@ void esrip_device::test(UINT16 inst)
TF3 = 0x16
};
- UINT32 res = 0;
+ uint32_t res = 0;
switch (inst & 0x1f)
{
@@ -1676,7 +1676,7 @@ void esrip_device::test(UINT16 inst)
*
*************************************/
-void esrip_device::nop(UINT16 inst)
+void esrip_device::nop(uint16_t inst)
{
m_result = 0xff; // Undefined
}
@@ -1691,7 +1691,7 @@ const device_type ESRIP = &device_creator<esrip_device>;
// esrip_device - constructor
//-------------------------------------------------
-esrip_device::esrip_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+esrip_device::esrip_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ESRIP, "ESRIP", tag, owner, clock, "esrip", __FILE__),
m_program_config("program", ENDIANNESS_BIG, 64, 9, -3),
m_fdt_r(*this),
@@ -1720,7 +1720,7 @@ const esrip_device::ophandler esrip_device::s_opcodetable[24] =
};
-void esrip_device::am29116_execute(UINT16 inst, int _sre)
+void esrip_device::am29116_execute(uint16_t inst, int _sre)
{
/* Status register shadow */
m_new_status = m_status;
@@ -1746,7 +1746,7 @@ void esrip_device::am29116_execute(UINT16 inst, int _sre)
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 esrip_device::execute_min_cycles() const
+uint32_t esrip_device::execute_min_cycles() const
{
return 1;
}
@@ -1757,7 +1757,7 @@ UINT32 esrip_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 esrip_device::execute_max_cycles() const
+uint32_t esrip_device::execute_max_cycles() const
{
return 1;
}
@@ -1768,7 +1768,7 @@ UINT32 esrip_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 esrip_device::execute_input_lines() const
+uint32_t esrip_device::execute_input_lines() const
{
return 0;
}
@@ -1787,7 +1787,7 @@ void esrip_device::execute_set_input(int inputnum, int state)
void esrip_device::execute_run()
{
int calldebugger = (machine().debug_flags & DEBUG_FLAG_ENABLED) != 0;
- UINT8 status;
+ uint8_t status;
/* I think we can get away with placing this outside of the loop */
status = m_status_in(*m_program, 0);
@@ -1795,18 +1795,18 @@ void esrip_device::execute_run()
/* Core execution loop */
do
{
- UINT64 inst;
- UINT8 next_pc;
- UINT16 x_bus = 0;
- UINT16 ipt_bus = 0;
- UINT16 y_bus = 0;
+ uint64_t inst;
+ uint8_t next_pc;
+ uint16_t x_bus = 0;
+ uint16_t ipt_bus = 0;
+ uint16_t y_bus = 0;
int yoe = _BIT(m_l5, 1);
int bl46 = BIT(m_l4, 6);
int bl44 = BIT(m_l4, 4);
- UINT32 in_h;
- UINT32 in_l;
+ uint32_t in_h;
+ uint32_t in_l;
if (m_fig_cycles)
{
diff --git a/src/devices/cpu/esrip/esrip.h b/src/devices/cpu/esrip/esrip.h
index 852ce65533e..3d7fdc093e2 100644
--- a/src/devices/cpu/esrip/esrip.h
+++ b/src/devices/cpu/esrip/esrip.h
@@ -116,7 +116,7 @@ class esrip_device : public cpu_device
{
public:
// construction/destruction
- esrip_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ esrip_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// inline configuration helpers
template<class _Object> static devcb_base &static_set_fdt_r_callback(device_t &device, _Object object) { return downcast<esrip_device &>(device).m_fdt_r.set_callback(object); }
@@ -126,7 +126,7 @@ public:
static void static_lbrm_prom(device_t &device, const char *name) { downcast<esrip_device &>(device).m_lbrm_prom = name; }
// public interfaces
- UINT8 get_rip_status();
+ uint8_t get_rip_status();
protected:
// device-level overrides
@@ -137,9 +137,9 @@ protected:
void make_ops();
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -147,9 +147,9 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -158,52 +158,52 @@ protected:
const address_space_config m_program_config;
// CPU registers
- UINT16 m_ram[32];
- UINT16 m_acc;
- UINT16 m_d_latch;
- UINT16 m_i_latch;
- UINT16 m_result;
- UINT8 m_new_status;
- UINT8 m_status;
- UINT16 m_inst;
- UINT8 m_immflag;
- UINT8 m_ct;
- UINT8 m_t;
+ uint16_t m_ram[32];
+ uint16_t m_acc;
+ uint16_t m_d_latch;
+ uint16_t m_i_latch;
+ uint16_t m_result;
+ uint8_t m_new_status;
+ uint8_t m_status;
+ uint16_t m_inst;
+ uint8_t m_immflag;
+ uint8_t m_ct;
+ uint8_t m_t;
/* Instruction latches - current and previous values */
- UINT8 m_l1, m_pl1;
- UINT8 m_l2, m_pl2;
- UINT8 m_l3, m_pl3;
- UINT8 m_l4, m_pl4;
- UINT8 m_l5, m_pl5;
- UINT8 m_l6, m_pl6;
- UINT8 m_l7, m_pl7;
-
- UINT8 m_pc;
- UINT16 m_rip_pc;
- UINT8 m_status_out;
-
- UINT8 m_x_scale;
- UINT8 m_y_scale;
- UINT8 m_img_bank;
- UINT8 m_line_latch;
- UINT16 m_fig_latch;
- UINT16 m_attr_latch;
- UINT16 m_adl_latch;
- UINT16 m_adr_latch;
- UINT16 m_iaddr_latch;
- UINT8 m_c_latch;
-
- UINT16 m_fdt_cnt;
- UINT16 m_ipt_cnt;
-
- UINT8 m_fig;
- UINT16 m_fig_cycles;
-
- UINT8 m_optable[65536];
-
- std::vector<UINT16> m_ipt_ram;
- UINT8 *m_lbrm;
+ uint8_t m_l1, m_pl1;
+ uint8_t m_l2, m_pl2;
+ uint8_t m_l3, m_pl3;
+ uint8_t m_l4, m_pl4;
+ uint8_t m_l5, m_pl5;
+ uint8_t m_l6, m_pl6;
+ uint8_t m_l7, m_pl7;
+
+ uint8_t m_pc;
+ uint16_t m_rip_pc;
+ uint8_t m_status_out;
+
+ uint8_t m_x_scale;
+ uint8_t m_y_scale;
+ uint8_t m_img_bank;
+ uint8_t m_line_latch;
+ uint16_t m_fig_latch;
+ uint16_t m_attr_latch;
+ uint16_t m_adl_latch;
+ uint16_t m_adr_latch;
+ uint16_t m_iaddr_latch;
+ uint8_t m_c_latch;
+
+ uint16_t m_fdt_cnt;
+ uint16_t m_ipt_cnt;
+
+ uint8_t m_fig;
+ uint16_t m_fig_cycles;
+
+ uint8_t m_optable[65536];
+
+ std::vector<uint16_t> m_ipt_ram;
+ uint8_t *m_lbrm;
address_space *m_program;
direct_read_data *m_direct;
@@ -216,7 +216,7 @@ protected:
esrip_draw_delegate m_draw;
const char *m_lbrm_prom;
- typedef void (esrip_device::*ophandler)(UINT16 inst);
+ typedef void (esrip_device::*ophandler)(uint16_t inst);
ophandler m_opcode[24];
@@ -225,56 +225,56 @@ protected:
private:
int get_hblank() const;
int get_lbrm() const;
- int check_jmp(UINT8 jmp_ctrl) const;
+ int check_jmp(uint8_t jmp_ctrl) const;
// flags
- void calc_z_flag(UINT16 res);
- void calc_c_flag_add(UINT16 a, UINT16 b);
- void calc_c_flag_sub(UINT16 a, UINT16 b);
- void calc_n_flag(UINT16 res);
- void calc_v_flag_add(UINT16 a, UINT16 b, UINT32 r);
- void calc_v_flag_sub(UINT16 a, UINT16 b, UINT32 r);
+ void calc_z_flag(uint16_t res);
+ void calc_c_flag_add(uint16_t a, uint16_t b);
+ void calc_c_flag_sub(uint16_t a, uint16_t b);
+ void calc_n_flag(uint16_t res);
+ void calc_v_flag_add(uint16_t a, uint16_t b, uint32_t r);
+ void calc_v_flag_sub(uint16_t a, uint16_t b, uint32_t r);
// opcodes
- UINT16 sor_op(UINT16 r, UINT16 opcode);
- void sor(UINT16 inst);
- void sonr(UINT16 inst);
+ uint16_t sor_op(uint16_t r, uint16_t opcode);
+ void sor(uint16_t inst);
+ void sonr(uint16_t inst);
- UINT16 tor_op(UINT16 r, UINT16 s, int opcode);
- void tonr(UINT16 inst);
- void tor1(UINT16 inst);
- void tor2(UINT16 inst);
+ uint16_t tor_op(uint16_t r, uint16_t s, int opcode);
+ void tonr(uint16_t inst);
+ void tor1(uint16_t inst);
+ void tor2(uint16_t inst);
- void bonr(UINT16 inst);
- void bor1(UINT16 inst);
- void bor2(UINT16 inst);
+ void bonr(uint16_t inst);
+ void bor1(uint16_t inst);
+ void bor2(uint16_t inst);
- void rotr1(UINT16 inst);
- void rotr2(UINT16 inst);
- void rotnr(UINT16 inst);
- void rotc(UINT16 inst);
- void rotm(UINT16 inst);
+ void rotr1(uint16_t inst);
+ void rotr2(uint16_t inst);
+ void rotnr(uint16_t inst);
+ void rotc(uint16_t inst);
+ void rotm(uint16_t inst);
- void prt(UINT16 inst);
- void prtnr(UINT16 inst);
+ void prt(uint16_t inst);
+ void prtnr(uint16_t inst);
- void crcf(UINT16 inst);
- void crcr(UINT16 inst);
+ void crcf(uint16_t inst);
+ void crcr(uint16_t inst);
- UINT16 shift_op(UINT16 u, int opcode);
- void shftr(UINT16 inst);
- void shftnr(UINT16 inst);
+ uint16_t shift_op(uint16_t u, int opcode);
+ void shftr(uint16_t inst);
+ void shftnr(uint16_t inst);
- void svstr(UINT16 inst);
+ void svstr(uint16_t inst);
- void rstst(UINT16 inst);
- void setst(UINT16 inst);
+ void rstst(uint16_t inst);
+ void setst(uint16_t inst);
- void test(UINT16 inst);
+ void test(uint16_t inst);
- void nop(UINT16 inst);
+ void nop(uint16_t inst);
- void am29116_execute(UINT16 inst, int _sre);
+ void am29116_execute(uint16_t inst, int _sre);
};
diff --git a/src/devices/cpu/esrip/esripdsm.cpp b/src/devices/cpu/esrip/esripdsm.cpp
index 41f3434d2cd..64df6ca7dc5 100644
--- a/src/devices/cpu/esrip/esripdsm.cpp
+++ b/src/devices/cpu/esrip/esripdsm.cpp
@@ -45,20 +45,20 @@ CPU_DISASSEMBLE( esrip )
};
#endif
- UINT64 inst = big_endianize_int64(*(UINT64 *)oprom);
+ uint64_t inst = big_endianize_int64(*(uint64_t *)oprom);
- UINT32 inst_hi = inst >> 32;
- UINT32 inst_lo = inst & 0xffffffff;
+ uint32_t inst_hi = inst >> 32;
+ uint32_t inst_lo = inst & 0xffffffff;
- UINT16 ins = (inst_hi >> 16) & 0xffff;
- UINT8 ctrl = (inst_hi >> 8) & 0xff;
- UINT8 jmp_dest = (inst_lo >> 8) & 0xff;
+ uint16_t ins = (inst_hi >> 16) & 0xffff;
+ uint8_t ctrl = (inst_hi >> 8) & 0xff;
+ uint8_t jmp_dest = (inst_lo >> 8) & 0xff;
- UINT8 jmp_ctrl = (ctrl >> 3) & 0x1f;
+ uint8_t jmp_ctrl = (ctrl >> 3) & 0x1f;
- UINT8 ctrl1 = (inst_lo >> 16) & 0xff;
- UINT8 ctrl2 = (inst_lo >> 24) & 0xff;
- UINT8 ctrl3 = (inst_hi) & 0xff;
+ uint8_t ctrl1 = (inst_lo >> 16) & 0xff;
+ uint8_t ctrl2 = (inst_lo >> 24) & 0xff;
+ uint8_t ctrl3 = (inst_hi) & 0xff;
sprintf(buffer, "%.4x %c%c%c%c %.2x %s%s%s%s%s%s%s%s %c%s%s%s %c%c%c%c%c%c%c%c",
ins,
diff --git a/src/devices/cpu/f8/f8.cpp b/src/devices/cpu/f8/f8.cpp
index 7d711bf8b03..a4470c0686d 100644
--- a/src/devices/cpu/f8/f8.cpp
+++ b/src/devices/cpu/f8/f8.cpp
@@ -59,7 +59,7 @@
const device_type F8 = &device_creator<f8_cpu_device>;
-f8_cpu_device::f8_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+f8_cpu_device::f8_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, F8, "Fairchild F8", tag, owner, clock, "f8", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0)
, m_io_config("io", ENDIANNESS_BIG, 8, 8, 0)
@@ -111,7 +111,7 @@ void f8_cpu_device::ROMC_01()
* on the data bus as signed binary number to PC0.
*/
m_dbus = m_direct->read_byte(m_pc0);
- m_pc0 += (INT8)m_dbus;
+ m_pc0 += (int8_t)m_dbus;
m_icount -= cL;
}
@@ -206,7 +206,7 @@ void f8_cpu_device::ROMC_0A()
* All devices add the 8-bit value on the data bus, treated as
* signed binary number, to the data counter.
*/
- m_dc0 += (INT8)m_dbus;
+ m_dc0 += (int8_t)m_dbus;
m_icount -= cL;
}
@@ -420,7 +420,7 @@ void f8_cpu_device::ROMC_1D()
* Devices with DC0 and DC1 registers must switch registers.
* Devices without a DC1 register perform no operation.
*/
- UINT16 tmp = m_dc0;
+ uint16_t tmp = m_dc0;
m_dc0 = m_dc1;
m_dc1 = tmp;
m_icount -= cS;
@@ -859,12 +859,12 @@ void f8_cpu_device::f8_ai()
***************************************************/
void f8_cpu_device::f8_ci()
{
- UINT16 tmp = ((UINT8)~m_a) + 1;
+ uint16_t tmp = ((uint8_t)~m_a) + 1;
ROMC_03(cL);
CLR_OZCS;
SET_OC(tmp,m_dbus);
tmp += m_dbus;
- SET_SZ((UINT8)tmp);
+ SET_SZ((uint8_t)tmp);
}
/***************************************************
@@ -1146,13 +1146,13 @@ void f8_cpu_device::f8_amd()
*NOTE* status flags are updated prior to the factor being added
*/
- UINT8 augend=m_a;
+ uint8_t augend=m_a;
ROMC_02();
- UINT8 addend=m_dbus;
- UINT8 tmp=addend+augend;
+ uint8_t addend=m_dbus;
+ uint8_t tmp=addend+augend;
- UINT8 c=0; /* high order carry */
- UINT8 ic=0; /* low order carry */
+ uint8_t c=0; /* high order carry */
+ uint8_t ic=0; /* low order carry */
if(((augend+addend)&0xff0)>0xf0)
c=1;
if((augend&0x0f)+(addend&0x0f)>0x0F)
@@ -1214,12 +1214,12 @@ void f8_cpu_device::f8_xm()
***************************************************/
void f8_cpu_device::f8_cm() /* SKR changed to match f8_ci() */
{
- UINT16 tmp = ((UINT8)~m_a) + 1;
+ uint16_t tmp = ((uint8_t)~m_a) + 1;
ROMC_02();
CLR_OZCS;
SET_OC(tmp,m_dbus);
tmp += m_dbus;
- SET_SZ((UINT8)tmp);
+ SET_SZ((uint8_t)tmp);
}
/***************************************************
@@ -1362,13 +1362,13 @@ void f8_cpu_device::f8_as_isar_d()
void f8_cpu_device::f8_asd(int r)
{
/*SKR from F8 Guide To programming description of AMD */
- UINT8 augend=m_a;
+ uint8_t augend=m_a;
ROMC_1C(cS);
- UINT8 addend=m_r[r];
- UINT8 tmp=augend+addend;
+ uint8_t addend=m_r[r];
+ uint8_t tmp=augend+addend;
- UINT8 c=0;
- UINT8 ic=0;
+ uint8_t c=0;
+ uint8_t ic=0;
if(((augend+addend)&0xff0)>0xf0)
c=1;
if((augend&0x0f)+(addend&0x0f)>0x0F)
@@ -1395,13 +1395,13 @@ void f8_cpu_device::f8_asd(int r)
void f8_cpu_device::f8_asd_isar()
{
/*SKR from F8 Guide To programming description of AMD */
- UINT8 augend=m_a;
+ uint8_t augend=m_a;
ROMC_1C(cS);
- UINT8 addend=m_r[m_is];
- UINT8 tmp=augend+addend;
+ uint8_t addend=m_r[m_is];
+ uint8_t tmp=augend+addend;
- UINT8 c=0;
- UINT8 ic=0;
+ uint8_t c=0;
+ uint8_t ic=0;
if(((augend+addend)&0xff0)>0xf0)
c=1;
if((augend&0x0f)+(addend&0x0f)>0x0F)
@@ -1428,13 +1428,13 @@ void f8_cpu_device::f8_asd_isar()
void f8_cpu_device::f8_asd_isar_i()
{
/*SKR from F8 Guide To programming description of AMD */
- UINT8 augend=m_a;
+ uint8_t augend=m_a;
ROMC_1C(cS);
- UINT8 addend=m_r[m_is];
- UINT8 tmp=augend+addend;
+ uint8_t addend=m_r[m_is];
+ uint8_t tmp=augend+addend;
- UINT8 c=0;
- UINT8 ic=0;
+ uint8_t c=0;
+ uint8_t ic=0;
if(((augend+addend)&0xff0)>0xf0)
c=1;
if((augend&0x0f)+(addend&0x0f)>0x0F)
@@ -1462,13 +1462,13 @@ void f8_cpu_device::f8_asd_isar_i()
void f8_cpu_device::f8_asd_isar_d()
{
/*SKR from F8 Guide To programming description of AMD */
- UINT8 augend=m_a;
+ uint8_t augend=m_a;
ROMC_1C(cS);
- UINT8 addend=m_r[m_is];
- UINT8 tmp=augend+addend;
+ uint8_t addend=m_r[m_is];
+ uint8_t tmp=augend+addend;
- UINT8 c=0;
- UINT8 ic=0;
+ uint8_t c=0;
+ uint8_t ic=0;
if(((augend+addend)&0xff0)>0xf0)
c=1;
if((augend&0x0f)+(addend&0x0f)>0x0F)
@@ -1583,7 +1583,7 @@ void f8_cpu_device::f8_ns_isar_d()
void f8_cpu_device::device_reset()
{
- UINT8 data;
+ uint8_t data;
int i;
m_pc0 = 0;
@@ -1636,7 +1636,7 @@ void f8_cpu_device::execute_run()
{
do
{
- UINT8 op=m_dbus;
+ uint8_t op=m_dbus;
m_pc = (m_pc0 - 1) & 0xffff;
debugger_instruction_hook(this, (m_pc0 - 1) & 0xffff);
@@ -2062,7 +2062,7 @@ void f8_cpu_device::state_string_export(const device_state_entry &entry, std::st
}
-offs_t f8_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t f8_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( f8 );
return CPU_DISASSEMBLE_NAME(f8)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/f8/f8.h b/src/devices/cpu/f8/f8.h
index 8afddae22bd..6f96bea3f49 100644
--- a/src/devices/cpu/f8/f8.h
+++ b/src/devices/cpu/f8/f8.h
@@ -33,7 +33,7 @@ class f8_cpu_device : public cpu_device
{
public:
// construction/destruction
- f8_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ f8_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -41,9 +41,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 7; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 7; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -54,35 +54,35 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 3; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 3; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
address_space_config m_io_config;
- UINT16 m_pc0; /* program counter 0 */
- UINT16 m_pc1; /* program counter 1 */
- UINT16 m_dc0; /* data counter 0 */
- UINT16 m_dc1; /* data counter 1 */
- UINT8 m_a; /* accumulator */
- UINT8 m_w; /* processor status */
- UINT8 m_is; /* scratchpad pointer */
- UINT8 m_dbus; /* data bus value */
- UINT16 m_io; /* last I/O address */
- UINT16 m_irq_vector;
+ uint16_t m_pc0; /* program counter 0 */
+ uint16_t m_pc1; /* program counter 1 */
+ uint16_t m_dc0; /* data counter 0 */
+ uint16_t m_dc1; /* data counter 1 */
+ uint8_t m_a; /* accumulator */
+ uint8_t m_w; /* processor status */
+ uint8_t m_is; /* scratchpad pointer */
+ uint8_t m_dbus; /* data bus value */
+ uint16_t m_io; /* last I/O address */
+ uint16_t m_irq_vector;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_iospace;
int m_icount;
- UINT8 m_r[64]; /* scratchpad RAM */
+ uint8_t m_r[64]; /* scratchpad RAM */
int m_irq_request;
/* timer shifter polynome values (will be used for timer interrupts) */
- UINT8 timer_shifter[256];
+ uint8_t timer_shifter[256];
- UINT16 m_pc; // For the debugger
+ uint16_t m_pc; // For the debugger
void ROMC_00(int insttim);
void ROMC_01();
diff --git a/src/devices/cpu/f8/f8dasm.cpp b/src/devices/cpu/f8/f8dasm.cpp
index 03e3d3065ea..90d5c0e3baa 100644
--- a/src/devices/cpu/f8/f8dasm.cpp
+++ b/src/devices/cpu/f8/f8dasm.cpp
@@ -12,7 +12,7 @@ static const char *const rname[16] = {
CPU_DISASSEMBLE( f8 )
{
unsigned size = 0;
- UINT8 op = oprom[size++];
+ uint8_t op = oprom[size++];
switch( op )
{
@@ -286,22 +286,22 @@ CPU_DISASSEMBLE( f8 )
case 0x81: /* 1000 0001 */
case 0x85: /* 1000 0101 */
- sprintf(buffer, "BP $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BP $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x82: /* 1000 0010 */
- sprintf(buffer, "BC $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BC $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x84: /* 1000 0100 */
- sprintf(buffer, "BZ $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BZ $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x80: /* 1000 0000 */
case 0x83: /* 1000 0011 */
case 0x86: /* 1000 0110 */
case 0x87: /* 1000 0111 */
- sprintf(buffer, "BT $%02X,$%04X", op & 0x07, pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BT $%02X,$%04X", op & 0x07, pc + (int8_t)oprom[size++] + 1);
break;
case 0x88: /* 1000 1000 */
@@ -333,28 +333,28 @@ CPU_DISASSEMBLE( f8 )
break;
case 0x8f: /* 1000 1111 */
- sprintf(buffer, "BR7 $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BR7 $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x90: /* 1001 0000 */
- sprintf(buffer, "BR $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BR $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x91: /* 1001 0001 */
case 0x95: /* 1001 0101 */
- sprintf(buffer, "BM $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BM $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x92: /* 1001 0010 */
- sprintf(buffer, "BNC $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BNC $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x94: /* 1001 0100 */
- sprintf(buffer, "BNZ $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BNZ $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x98: /* 1001 1000 */
- sprintf(buffer, "BNO $%04X", pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BNO $%04X", pc + (int8_t)oprom[size++] + 1);
break;
case 0x93: /* 1001 0011 */
@@ -367,12 +367,12 @@ CPU_DISASSEMBLE( f8 )
case 0x9d: /* 1001 1101 */
case 0x9e: /* 1001 1110 */
case 0x9f: /* 1001 1111 */
- sprintf(buffer, "BF $%02X,$%04X", op & 0x0f, pc + (INT8)oprom[size++] + 1);
+ sprintf(buffer, "BF $%02X,$%04X", op & 0x0f, pc + (int8_t)oprom[size++] + 1);
break;
case 0xa0: /* 1010 0000 */
case 0xa1: /* 1010 0001 */
- sprintf(buffer, "INS $%02X", (unsigned) (INT8) (op & 0x0F));
+ sprintf(buffer, "INS $%02X", (unsigned) (int8_t) (op & 0x0F));
break;
case 0xa2: /* 1010 0010 */
@@ -392,12 +392,12 @@ CPU_DISASSEMBLE( f8 )
case 0xad: /* 1010 1101 */
case 0xae: /* 1010 1110 */
case 0xaf: /* 1010 1111 */
- sprintf(buffer, "INS $%02X", (INT8) op & 0x0f);
+ sprintf(buffer, "INS $%02X", (int8_t) op & 0x0f);
break;
case 0xb0: /* 1011 0000 */
case 0xb1: /* 1011 0001 */
- sprintf(buffer, "OUTS $%02X", (INT8) op & 0x0f);
+ sprintf(buffer, "OUTS $%02X", (int8_t) op & 0x0f);
break;
case 0xb2: /* 1011 0010 */
@@ -417,7 +417,7 @@ CPU_DISASSEMBLE( f8 )
case 0xbd: /* 1011 1101 */
case 0xbe: /* 1011 1110 */
case 0xbf: /* 1011 1111 */
- sprintf(buffer, "OUTS $%02X", (unsigned) (INT8) op & 0x0f);
+ sprintf(buffer, "OUTS $%02X", (unsigned) (int8_t) op & 0x0f);
break;
case 0xc0: /* 1100 0000 */
diff --git a/src/devices/cpu/g65816/g65816.cpp b/src/devices/cpu/g65816/g65816.cpp
index 169a8208e52..5eef5b1f386 100644
--- a/src/devices/cpu/g65816/g65816.cpp
+++ b/src/devices/cpu/g65816/g65816.cpp
@@ -97,7 +97,7 @@ const device_type G65816 = &device_creator<g65816_device>;
const device_type _5A22 = &device_creator<_5a22_device>;
-g65816_device::g65816_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+g65816_device::g65816_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, G65816, "G65C816", tag, owner, clock, "g65c816", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 24, 0)
, m_cpu_type(CPU_TYPE_G65816)
@@ -105,7 +105,7 @@ g65816_device::g65816_device(const machine_config &mconfig, const char *tag, dev
}
-g65816_device::g65816_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int cpu_type, address_map_constructor internal)
+g65816_device::g65816_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int cpu_type, address_map_constructor internal)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 24, 0, internal)
, m_cpu_type(cpu_type)
@@ -129,7 +129,7 @@ static ADDRESS_MAP_START(_5a22_map, AS_PROGRAM, 8, _5a22_device)
ADDRESS_MAP_END
-_5a22_device::_5a22_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+_5a22_device::_5a22_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: g65816_device(mconfig, _5A22, "5A22", tag, owner, clock, "5a22", __FILE__, CPU_TYPE_5A22, ADDRESS_MAP_NAME(_5a22_map))
{
}
@@ -759,7 +759,7 @@ void g65816_device::execute_set_input(int line, int state)
#include "g65816ds.h"
-offs_t g65816_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t g65816_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return g65816_disassemble(buffer, (pc & 0x00ffff), (pc & 0xff0000) >> 16, oprom, FLAG_M, FLAG_X);
}
@@ -1080,7 +1080,7 @@ WRITE8_MEMBER( _5a22_device::wrdivh_w )
WRITE8_MEMBER( _5a22_device::wrdvdd_w )
{
- UINT16 quotient, remainder;
+ uint16_t quotient, remainder;
m_dvdd = data;
diff --git a/src/devices/cpu/g65816/g65816.h b/src/devices/cpu/g65816/g65816.h
index c04b9adf71c..87bb2795101 100644
--- a/src/devices/cpu/g65816/g65816.h
+++ b/src/devices/cpu/g65816/g65816.h
@@ -59,8 +59,8 @@ class g65816_device : public cpu_device
{
public:
// construction/destruction
- g65816_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- g65816_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int cpu_type, address_map_constructor internal = nullptr);
+ g65816_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ g65816_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int cpu_type, address_map_constructor internal = nullptr);
void set_read_vector_callback(read8_delegate read_vector);
@@ -70,9 +70,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 20; }
- virtual UINT32 execute_input_lines() const override { return 5; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 20; }
+ virtual uint32_t execute_input_lines() const override { return 5; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -85,9 +85,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
@@ -233,15 +233,15 @@ protected:
uint m_destination;
int m_ICount;
int m_cpu_type;
- UINT8 m_rw8_cycles, m_rw16_cycles, m_rw24_cycles;
- UINT32 m_debugger_temp;
+ uint8_t m_rw8_cycles, m_rw16_cycles, m_rw24_cycles;
+ uint32_t m_debugger_temp;
/* 5A22 specific registers */
- UINT8 m_wrmpya, m_wrmpyb;
- UINT16 m_rdmpy;
- UINT16 m_wrdiv;
- UINT8 m_dvdd;
- UINT16 m_rddiv;
+ uint8_t m_wrmpya, m_wrmpyb;
+ uint16_t m_rdmpy;
+ uint16_t m_wrdiv;
+ uint8_t m_dvdd;
+ uint16_t m_rddiv;
void g65816i_00_M0X0();
void g65816i_01_M0X0();
@@ -1529,7 +1529,7 @@ protected:
class _5a22_device : public g65816_device
{
public:
- _5a22_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ _5a22_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE8_MEMBER( wrmpya_w );
DECLARE_WRITE8_MEMBER( wrmpyb_w );
diff --git a/src/devices/cpu/g65816/g65816ds.cpp b/src/devices/cpu/g65816/g65816ds.cpp
index d27dd67b1dc..849252a27d8 100644
--- a/src/devices/cpu/g65816/g65816ds.cpp
+++ b/src/devices/cpu/g65816/g65816ds.cpp
@@ -190,8 +190,8 @@ const g65816_opcode_struct g65816_opcode_struct::s_opcodes[256] =
} // anonymous namespace
-static const UINT8 *base_oprom;
-static UINT32 base_pc;
+static const uint8_t *base_oprom;
+static uint32_t base_pc;
static inline unsigned int read_8(unsigned int address)
{
@@ -241,7 +241,7 @@ static inline char* int_16_str(unsigned int val)
}
-unsigned g65816_disassemble(char* buff, unsigned int pc, unsigned int pb, const UINT8 *oprom, int m_flag, int x_flag)
+unsigned g65816_disassemble(char* buff, unsigned int pc, unsigned int pb, const uint8_t *oprom, int m_flag, int x_flag)
{
unsigned int instruction;
const g65816_opcode_struct* opcode;
@@ -278,7 +278,7 @@ unsigned g65816_disassemble(char* buff, unsigned int pc, unsigned int pb, const
sprintf(ptr, "A");
break;
case RELB:
- var = (INT8) read_8(address+1);
+ var = (int8_t) read_8(address+1);
length++;
sprintf(ptr, " %06x (%s)", pb | ((pc + length + var)&0xffff), int_8_str(var));
break;
diff --git a/src/devices/cpu/g65816/g65816ds.h b/src/devices/cpu/g65816/g65816ds.h
index 58b47752ca5..1663f0fb396 100644
--- a/src/devices/cpu/g65816/g65816ds.h
+++ b/src/devices/cpu/g65816/g65816ds.h
@@ -16,7 +16,7 @@ All rights reserved.
*/
-unsigned g65816_disassemble(char* buff, unsigned int pc, unsigned int pb, const UINT8 *oprom, int m_flag, int x_flag);
+unsigned g65816_disassemble(char* buff, unsigned int pc, unsigned int pb, const uint8_t *oprom, int m_flag, int x_flag);
#endif /* __G65816DS_H__ */
diff --git a/src/devices/cpu/g65816/g65816op.h b/src/devices/cpu/g65816/g65816op.h
index 81f887b3e12..c7649b16b70 100644
--- a/src/devices/cpu/g65816/g65816op.h
+++ b/src/devices/cpu/g65816/g65816op.h
@@ -237,7 +237,7 @@
SRC = OPER_8_##MODE(); \
if(FLAG_D) \
{ \
- INT32 result, r0, r1, carry; \
+ int32_t result, r0, r1, carry; \
r0 = REGISTER_A; \
r1 = SRC; \
carry = CFLAG_AS_1(); \
@@ -263,7 +263,7 @@
#define OP_ADC(MODE) \
CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
SRC = OPER_16_##MODE(); \
- INT32 result, r0, r1, carry; \
+ int32_t result, r0, r1, carry; \
r0 = REGISTER_A; \
r1 = SRC; \
carry = CFLAG_AS_1(); \
@@ -1110,7 +1110,7 @@
} \
else \
{ \
- INT32 result, r0, r1, carry; \
+ int32_t result, r0, r1, carry; \
r0 = REGISTER_A; \
r1 = SRC; \
r1 ^= 0xff; \
@@ -1129,7 +1129,7 @@
#define OP_SBC(MODE) \
CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
SRC = OPER_16_##MODE(); \
- INT32 result, r0, r1, carry; \
+ int32_t result, r0, r1, carry; \
r0 = REGISTER_A; \
r1 = SRC; \
r1 ^= 0xffff; \
diff --git a/src/devices/cpu/h6280/6280dasm.cpp b/src/devices/cpu/h6280/6280dasm.cpp
index 4a9923ae0dc..68d2ec5589c 100644
--- a/src/devices/cpu/h6280/6280dasm.cpp
+++ b/src/devices/cpu/h6280/6280dasm.cpp
@@ -146,7 +146,7 @@ static const unsigned char op6280[512]=
*****************************************************************************/
CPU_DISASSEMBLE( h6280 )
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
int PC, OP, opc, arg;
PC = pc;
diff --git a/src/devices/cpu/h6280/h6280.cpp b/src/devices/cpu/h6280/h6280.cpp
index 5ca1397bb64..469e057c88d 100644
--- a/src/devices/cpu/h6280/h6280.cpp
+++ b/src/devices/cpu/h6280/h6280.cpp
@@ -158,7 +158,7 @@ const device_type H6280 = &device_creator<h6280_device>;
// h6280_device - constructor
//-------------------------------------------------
-h6280_device::h6280_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+h6280_device::h6280_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, H6280, "H6280", tag, owner, clock, "h6280", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 8, 21),
m_io_config("io", ENDIANNESS_LITTLE, 8, 2)
@@ -282,7 +282,7 @@ void h6280_device::device_reset()
m_x = 0;
m_y = 0;
m_p = 0;
- memset(m_mmr, 0, sizeof(UINT8) * 8);
+ memset(m_mmr, 0, sizeof(uint8_t) * 8);
m_irq_mask = 0;
m_timer_ack = 0;
m_timer_value = 0;
@@ -321,7 +321,7 @@ void h6280_device::device_stop()
}
-inline UINT32 h6280_device::translated(UINT16 addr)
+inline uint32_t h6280_device::translated(uint16_t addr)
{
return ((m_mmr[((addr) >> 13) & 7] << 13) | ((addr) & 0x1fff));
}
@@ -335,7 +335,7 @@ inline void h6280_device::h6280_cycles(int cyc)
#if LAZY_FLAGS
#define NZ m_NZ
-inline void h6280_device::set_nz(UINT8 n)
+inline void h6280_device::set_nz(uint8_t n)
{
P &= ~_fT;
NZ = ((n & _fN) << 8) | n;
@@ -343,7 +343,7 @@ inline void h6280_device::set_nz(UINT8 n)
#else
-inline void h6280_device::set_nz(UINT8 n)
+inline void h6280_device::set_nz(uint8_t n)
{
P = (P & ~(_fN|_fT|_fZ)) |
(n & _fN) |
@@ -357,7 +357,7 @@ inline void h6280_device::clear_t()
P &= ~_fT;
}
-inline void h6280_device::do_interrupt(UINT16 vector)
+inline void h6280_device::do_interrupt(uint16_t vector)
{
h6280_cycles(7); /* 7 cycles for an int */
push(PCH);
@@ -408,7 +408,7 @@ inline void h6280_device::check_irq_lines()
* The CPU inserts 1 clock delay when accessing the VDC or VCE
* area.
***************************************************************/
-inline void h6280_device::check_vdc_vce_penalty(UINT16 addr)
+inline void h6280_device::check_vdc_vce_penalty(uint16_t addr)
{
if ( ( translated(addr) & 0x1FF800 ) == 0x1FE000 ) {
h6280_cycles(1);
@@ -424,7 +424,7 @@ inline void h6280_device::bra(bool cond)
if (cond)
{
h6280_cycles(4);
- UINT8 tmp = read_opcode_arg();
+ uint8_t tmp = read_opcode_arg();
PCW++;
EAW = PCW + (signed char)tmp;
PCD = EAD;
@@ -547,7 +547,7 @@ inline void h6280_device::ea_idy()
inline void h6280_device::ea_ind()
{
ea_abs();
- UINT8 tmp = program_read8(EAD);
+ uint8_t tmp = program_read8(EAD);
EAD++;
EAH = program_read8(EAD);
EAL = tmp;
@@ -560,139 +560,139 @@ inline void h6280_device::ea_iax()
{
ea_abs();
EAD+=X;
- UINT8 tmp = program_read8(EAD);
+ uint8_t tmp = program_read8(EAD);
EAD++;
EAH = program_read8(EAD);
EAL = tmp;
}
-inline UINT8 h6280_device::rd_imm()
+inline uint8_t h6280_device::rd_imm()
{
- UINT8 tmp = read_opcode_arg();
+ uint8_t tmp = read_opcode_arg();
PCW++;
return tmp;
}
-inline UINT8 h6280_device::rd_zpg()
+inline uint8_t h6280_device::rd_zpg()
{
ea_zpg();
return program_read8z(EAD);
}
-inline UINT8 h6280_device::rd_zpx()
+inline uint8_t h6280_device::rd_zpx()
{
ea_zpx();
return program_read8z(EAD);
}
-inline UINT8 h6280_device::rd_zpy()
+inline uint8_t h6280_device::rd_zpy()
{
ea_zpy();
return program_read8z(EAD);
}
-inline UINT8 h6280_device::rd_abs()
+inline uint8_t h6280_device::rd_abs()
{
ea_abs();
return program_read8(EAD);
}
-inline UINT8 h6280_device::rd_abx()
+inline uint8_t h6280_device::rd_abx()
{
ea_abx();
return program_read8(EAD);
}
-inline UINT8 h6280_device::rd_aby()
+inline uint8_t h6280_device::rd_aby()
{
ea_aby();
return program_read8(EAD);
}
-inline UINT8 h6280_device::rd_zpi()
+inline uint8_t h6280_device::rd_zpi()
{
ea_zpi();
return program_read8(EAD);
}
-inline UINT8 h6280_device::rd_idx()
+inline uint8_t h6280_device::rd_idx()
{
ea_idx();
return program_read8(EAD);
}
-inline UINT8 h6280_device::rd_idy()
+inline uint8_t h6280_device::rd_idy()
{
ea_idy();
return program_read8(EAD);
}
-inline UINT8 h6280_device::rd_tfl()
+inline uint8_t h6280_device::rd_tfl()
{
ea_tflg();
return program_read8z(EAD);
}
-inline void h6280_device::wr_zpg(UINT8 tmp)
+inline void h6280_device::wr_zpg(uint8_t tmp)
{
ea_zpg();
wb_eaz(tmp);
}
-inline void h6280_device::wr_zpx(UINT8 tmp)
+inline void h6280_device::wr_zpx(uint8_t tmp)
{
ea_zpx();
wb_eaz(tmp);
}
-inline void h6280_device::wr_zpy(UINT8 tmp)
+inline void h6280_device::wr_zpy(uint8_t tmp)
{
ea_zpy();
wb_eaz(tmp);
}
-inline void h6280_device::wr_abs(UINT8 tmp)
+inline void h6280_device::wr_abs(uint8_t tmp)
{
ea_abs();
wb_ea(tmp);
}
-inline void h6280_device::wr_abx(UINT8 tmp)
+inline void h6280_device::wr_abx(uint8_t tmp)
{
ea_abx();
wb_ea(tmp);
}
-inline void h6280_device::wr_aby(UINT8 tmp)
+inline void h6280_device::wr_aby(uint8_t tmp)
{
ea_aby();
wb_ea(tmp);
}
-inline void h6280_device::wr_zpi(UINT8 tmp)
+inline void h6280_device::wr_zpi(uint8_t tmp)
{
ea_zpi();
wb_ea(tmp);
}
-inline void h6280_device::wr_idx(UINT8 tmp)
+inline void h6280_device::wr_idx(uint8_t tmp)
{
ea_idx();
wb_ea(tmp);
}
-inline void h6280_device::wr_idy(UINT8 tmp)
+inline void h6280_device::wr_idy(uint8_t tmp)
{
ea_idy();
wb_ea(tmp);
}
-inline void h6280_device::wb_ea(UINT8 tmp)
+inline void h6280_device::wb_ea(uint8_t tmp)
{
program_write8(EAD, tmp);
}
-inline void h6280_device::wb_eaz(UINT8 tmp)
+inline void h6280_device::wb_eaz(uint8_t tmp)
{
program_write8z(EAD, tmp);
}
@@ -710,7 +710,7 @@ inline void h6280_device::wb_eaz(UINT8 tmp)
***************************************************************/
#if LAZY_FLAGS
-inline void h6280_device::compose_p(UINT8 SET, UINT8 CLR)
+inline void h6280_device::compose_p(uint8_t SET, uint8_t CLR)
{
P = (P & ~(_fN | _fZ | CLR)) |
(NZ >> 8) |
@@ -720,7 +720,7 @@ inline void h6280_device::compose_p(UINT8 SET, UINT8 CLR)
#else
-inline void h6280_device::compose_p(UINT8 SET, UINT8 CLR)
+inline void h6280_device::compose_p(uint8_t SET, uint8_t CLR)
{
P = (P & ~CLR) | SET;
}
@@ -730,7 +730,7 @@ inline void h6280_device::compose_p(UINT8 SET, UINT8 CLR)
/* 6280 ********************************************************
* ADC Add with carry
***************************************************************/
-inline void h6280_device::tadc(UINT8 tmp)
+inline void h6280_device::tadc(uint8_t tmp)
{
clear_t();
int tflagtemp = rd_tfl();
@@ -761,7 +761,7 @@ inline void h6280_device::tadc(UINT8 tmp)
P |= _fV;
if (sum & 0xff00)
P |= _fC;
- tflagtemp = (UINT8) sum;
+ tflagtemp = (uint8_t) sum;
}
set_nz(tflagtemp);
wb_eaz(tflagtemp);
@@ -769,7 +769,7 @@ inline void h6280_device::tadc(UINT8 tmp)
}
-inline void h6280_device::adc(UINT8 tmp)
+inline void h6280_device::adc(uint8_t tmp)
{
if(P & _fT)
tadc(tmp);
@@ -801,7 +801,7 @@ inline void h6280_device::adc(UINT8 tmp)
P |= _fV;
if (sum & 0xff00)
P |= _fC;
- A = (UINT8) sum;
+ A = (uint8_t) sum;
}
set_nz(A);
}
@@ -810,22 +810,22 @@ inline void h6280_device::adc(UINT8 tmp)
/* 6280 ********************************************************
* AND Logical and
***************************************************************/
-inline void h6280_device::tand(UINT8 tmp)
+inline void h6280_device::tand(uint8_t tmp)
{
clear_t();
int tflagtemp = rd_tfl();
- tflagtemp = (UINT8)(tflagtemp & tmp);
+ tflagtemp = (uint8_t)(tflagtemp & tmp);
wb_eaz(tflagtemp);
set_nz(tflagtemp);
h6280_cycles(3);
}
-inline void h6280_device::and_a(UINT8 tmp)
+inline void h6280_device::and_a(uint8_t tmp)
{
if(P & _fT)
tand(tmp);
else {
- A = (UINT8)(A & tmp);
+ A = (uint8_t)(A & tmp);
set_nz(A);
}
}
@@ -833,11 +833,11 @@ inline void h6280_device::and_a(UINT8 tmp)
/* 6280 ********************************************************
* ASL Arithmetic shift left
***************************************************************/
-inline UINT8 h6280_device::asl(UINT8 tmp)
+inline uint8_t h6280_device::asl(uint8_t tmp)
{
clear_t();
P = (P & ~_fC) | ((tmp >> 7) & _fC);
- tmp = (UINT8)(tmp << 1);
+ tmp = (uint8_t)(tmp << 1);
set_nz(tmp);
return tmp;
}
@@ -845,7 +845,7 @@ inline UINT8 h6280_device::asl(UINT8 tmp)
/* 6280 ********************************************************
* BBR Branch if bit is reset
***************************************************************/
-inline void h6280_device::bbr(int bit, UINT8 tmp)
+inline void h6280_device::bbr(int bit, uint8_t tmp)
{
bra(!(tmp & (1<<bit)));
}
@@ -853,7 +853,7 @@ inline void h6280_device::bbr(int bit, UINT8 tmp)
/* 6280 ********************************************************
* BBS Branch if bit is set
***************************************************************/
-inline void h6280_device::bbs(int bit, UINT8 tmp)
+inline void h6280_device::bbs(int bit, uint8_t tmp)
{
bra(tmp & (1<<bit));
}
@@ -889,7 +889,7 @@ inline void h6280_device::beq()
/* 6280 ********************************************************
* BIT Bit test
***************************************************************/
-inline void h6280_device::bit(UINT8 tmp)
+inline void h6280_device::bit(uint8_t tmp)
{
P = (P & ~(_fN|_fV|_fT|_fZ))
| ((tmp&0x80) ? _fN:0)
@@ -1049,46 +1049,46 @@ inline void h6280_device::cly()
/* 6280 ********************************************************
* CMP Compare accumulator
***************************************************************/
-inline void h6280_device::cmp(UINT8 tmp)
+inline void h6280_device::cmp(uint8_t tmp)
{
clear_t();
P &= ~_fC;
if (A >= tmp)
P |= _fC;
- set_nz((UINT8)(A - tmp));
+ set_nz((uint8_t)(A - tmp));
}
/* 6280 ********************************************************
* CPX Compare index X
***************************************************************/
-inline void h6280_device::cpx(UINT8 tmp)
+inline void h6280_device::cpx(uint8_t tmp)
{
clear_t();
P &= ~_fC;
if (X >= tmp)
P |= _fC;
- set_nz((UINT8)(X - tmp));
+ set_nz((uint8_t)(X - tmp));
}
/* 6280 ********************************************************
* CPY Compare index Y
***************************************************************/
-inline void h6280_device::cpy(UINT8 tmp)
+inline void h6280_device::cpy(uint8_t tmp)
{
clear_t();
P &= ~_fC;
if (Y >= tmp)
P |= _fC;
- set_nz((UINT8)(Y - tmp));
+ set_nz((uint8_t)(Y - tmp));
}
/* 6280 ********************************************************
* DEC Decrement memory
***************************************************************/
-inline UINT8 h6280_device::dec(UINT8 tmp)
+inline uint8_t h6280_device::dec(uint8_t tmp)
{
clear_t();
- tmp = (UINT8)(tmp-1);
+ tmp = (uint8_t)(tmp-1);
set_nz(tmp);
return tmp;
}
@@ -1099,7 +1099,7 @@ inline UINT8 h6280_device::dec(UINT8 tmp)
inline void h6280_device::dex()
{
clear_t();
- X = (UINT8)(X - 1);
+ X = (uint8_t)(X - 1);
set_nz(X);
}
@@ -1109,29 +1109,29 @@ inline void h6280_device::dex()
inline void h6280_device::dey()
{
clear_t();
- Y = (UINT8)(Y - 1);
+ Y = (uint8_t)(Y - 1);
set_nz(Y);
}
/* 6280 ********************************************************
* EOR Logical exclusive or
***************************************************************/
-inline void h6280_device::teor(UINT8 tmp)
+inline void h6280_device::teor(uint8_t tmp)
{
clear_t();
int tflagtemp = rd_tfl();
- tflagtemp = (UINT8)(tflagtemp ^ tmp);
+ tflagtemp = (uint8_t)(tflagtemp ^ tmp);
wb_eaz(tflagtemp);
set_nz(tflagtemp);
h6280_cycles(3);
}
-inline void h6280_device::eor(UINT8 tmp)
+inline void h6280_device::eor(uint8_t tmp)
{
if(P & _fT)
teor(tmp);
else {
- A = (UINT8)(A ^ tmp);
+ A = (uint8_t)(A ^ tmp);
set_nz(A);
}
}
@@ -1139,10 +1139,10 @@ inline void h6280_device::eor(UINT8 tmp)
/* 6280 ********************************************************
* INC Increment memory
***************************************************************/
-inline UINT8 h6280_device::inc(UINT8 tmp)
+inline uint8_t h6280_device::inc(uint8_t tmp)
{
clear_t();
- tmp = (UINT8)(tmp+1);
+ tmp = (uint8_t)(tmp+1);
set_nz(tmp);
return tmp;
}
@@ -1153,7 +1153,7 @@ inline UINT8 h6280_device::inc(UINT8 tmp)
inline void h6280_device::inx()
{
clear_t();
- X = (UINT8)(X + 1);
+ X = (uint8_t)(X + 1);
set_nz(X);
}
@@ -1163,7 +1163,7 @@ inline void h6280_device::inx()
inline void h6280_device::iny()
{
clear_t();
- Y = (UINT8)(Y + 1);
+ Y = (uint8_t)(Y + 1);
set_nz(Y);
}
@@ -1194,30 +1194,30 @@ inline void h6280_device::jsr()
/* 6280 ********************************************************
* LDA Load accumulator
***************************************************************/
-inline void h6280_device::lda(UINT8 tmp)
+inline void h6280_device::lda(uint8_t tmp)
{
clear_t();
- A = (UINT8)tmp;
+ A = (uint8_t)tmp;
set_nz(A);
}
/* 6280 ********************************************************
* LDX Load index X
***************************************************************/
-inline void h6280_device::ldx(UINT8 tmp)
+inline void h6280_device::ldx(uint8_t tmp)
{
clear_t();
- X = (UINT8)tmp;
+ X = (uint8_t)tmp;
set_nz(X);
}
/* 6280 ********************************************************
* LDY Load index Y
***************************************************************/
-inline void h6280_device::ldy(UINT8 tmp)
+inline void h6280_device::ldy(uint8_t tmp)
{
clear_t();
- Y = (UINT8)tmp;
+ Y = (uint8_t)tmp;
set_nz(Y);
}
@@ -1225,11 +1225,11 @@ inline void h6280_device::ldy(UINT8 tmp)
* LSR Logic shift right
* 0 -> [7][6][5][4][3][2][1][0] -> C
***************************************************************/
-inline UINT8 h6280_device::lsr(UINT8 tmp)
+inline uint8_t h6280_device::lsr(uint8_t tmp)
{
clear_t();
P = (P & ~_fC) | (tmp & _fC);
- tmp = (UINT8)tmp >> 1;
+ tmp = (uint8_t)tmp >> 1;
set_nz(tmp);
return tmp;
}
@@ -1246,22 +1246,22 @@ inline void h6280_device::nop()
* ORA Logical inclusive or
***************************************************************/
-inline void h6280_device::tora(UINT8 tmp)
+inline void h6280_device::tora(uint8_t tmp)
{
clear_t();
int tflagtemp = rd_tfl();
- tflagtemp = (UINT8)(tflagtemp | tmp);
+ tflagtemp = (uint8_t)(tflagtemp | tmp);
wb_eaz(tflagtemp);
set_nz(tflagtemp);
h6280_cycles(3);
}
-inline void h6280_device::ora(UINT8 tmp)
+inline void h6280_device::ora(uint8_t tmp)
{
if(P & _fT)
tora(tmp);
else {
- A = (UINT8)(A | tmp);
+ A = (uint8_t)(A | tmp);
set_nz(A);
}
}
@@ -1354,7 +1354,7 @@ inline void h6280_device::ply()
/* 6280 ********************************************************
* RMB Reset memory bit
***************************************************************/
-inline UINT8 h6280_device::rmb(int bit, UINT8 tmp)
+inline uint8_t h6280_device::rmb(int bit, uint8_t tmp)
{
clear_t();
tmp &= ~(1<<bit);
@@ -1365,12 +1365,12 @@ inline UINT8 h6280_device::rmb(int bit, UINT8 tmp)
* ROL Rotate left
* new C <- [7][6][5][4][3][2][1][0] <- C
***************************************************************/
-inline UINT8 h6280_device::rol(UINT8 tmp)
+inline uint8_t h6280_device::rol(uint8_t tmp)
{
clear_t();
int tmp9 = (tmp << 1) | (P & _fC);
P = (P & ~_fC) | ((tmp9 >> 8) & _fC);
- tmp = (UINT8)tmp9;
+ tmp = (uint8_t)tmp9;
set_nz(tmp);
return tmp;
}
@@ -1379,12 +1379,12 @@ inline UINT8 h6280_device::rol(UINT8 tmp)
* ROR Rotate right
* C -> [7][6][5][4][3][2][1][0] -> new C
***************************************************************/
-inline UINT8 h6280_device::ror(UINT8 tmp)
+inline uint8_t h6280_device::ror(uint8_t tmp)
{
clear_t();
int tmp9 = tmp | (P & _fC) << 8;
P = (P & ~_fC) | (tmp & _fC);
- tmp = (UINT8)(tmp9 >> 1);
+ tmp = (uint8_t)(tmp9 >> 1);
set_nz(tmp);
return tmp;
}
@@ -1430,7 +1430,7 @@ inline void h6280_device::rts()
inline void h6280_device::sax()
{
clear_t();
- UINT8 tmp = X;
+ uint8_t tmp = X;
X = A;
A = tmp;
}
@@ -1441,7 +1441,7 @@ inline void h6280_device::sax()
inline void h6280_device::say()
{
clear_t();
- UINT8 tmp = Y;
+ uint8_t tmp = Y;
Y = A;
A = tmp;
}
@@ -1449,7 +1449,7 @@ inline void h6280_device::say()
/* 6280 ********************************************************
* SBC Subtract with carry
***************************************************************/
-inline void h6280_device::tsbc(UINT8 tmp)
+inline void h6280_device::tsbc(uint8_t tmp)
{
clear_t();
int tflagtemp = rd_tfl();
@@ -1480,14 +1480,14 @@ inline void h6280_device::tsbc(UINT8 tmp)
P |= _fV;
if ((sum & 0xff00) == 0)
P |= _fC;
- tflagtemp = (UINT8) sum;
+ tflagtemp = (uint8_t) sum;
}
set_nz(tflagtemp);
wb_eaz(tflagtemp);
h6280_cycles(3);
}
-inline void h6280_device::sbc(UINT8 tmp)
+inline void h6280_device::sbc(uint8_t tmp)
{
if(P & _fT)
tsbc(tmp);
@@ -1519,7 +1519,7 @@ inline void h6280_device::sbc(UINT8 tmp)
P |= _fV;
if ((sum & 0xff00) == 0)
P |= _fC;
- A = (UINT8) sum;
+ A = (uint8_t) sum;
}
set_nz(A);
}
@@ -1563,7 +1563,7 @@ inline void h6280_device::set()
/* 6280 ********************************************************
* SMB Set memory bit
***************************************************************/
-inline UINT8 h6280_device::smb(int bit, UINT8 tmp)
+inline uint8_t h6280_device::smb(int bit, uint8_t tmp)
{
clear_t();
tmp |= (1<<bit);
@@ -1573,7 +1573,7 @@ inline UINT8 h6280_device::smb(int bit, UINT8 tmp)
/* 6280 ********************************************************
* ST0 Store at hardware address 0
***************************************************************/
-inline void h6280_device::st0(UINT8 tmp)
+inline void h6280_device::st0(uint8_t tmp)
{
clear_t();
m_io->write_byte(0x0000,tmp);
@@ -1582,7 +1582,7 @@ inline void h6280_device::st0(UINT8 tmp)
/* 6280 ********************************************************
* ST1 Store at hardware address 2
***************************************************************/
-inline void h6280_device::st1(UINT8 tmp)
+inline void h6280_device::st1(uint8_t tmp)
{
clear_t();
m_io->write_byte(0x0002,tmp);
@@ -1591,7 +1591,7 @@ inline void h6280_device::st1(UINT8 tmp)
/* 6280 ********************************************************
* ST2 Store at hardware address 3
***************************************************************/
-inline void h6280_device::st2(UINT8 tmp)
+inline void h6280_device::st2(uint8_t tmp)
{
clear_t();
m_io->write_byte(0x0003,tmp);
@@ -1600,7 +1600,7 @@ inline void h6280_device::st2(UINT8 tmp)
/* 6280 ********************************************************
* STA Store accumulator
***************************************************************/
-inline UINT8 h6280_device::sta()
+inline uint8_t h6280_device::sta()
{
clear_t();
return A;
@@ -1609,7 +1609,7 @@ inline UINT8 h6280_device::sta()
/* 6280 ********************************************************
* STX Store index X
***************************************************************/
-inline UINT8 h6280_device::stx()
+inline uint8_t h6280_device::stx()
{
clear_t();
return X;
@@ -1618,7 +1618,7 @@ inline UINT8 h6280_device::stx()
/* 6280 ********************************************************
* STY Store index Y
***************************************************************/
-inline UINT8 h6280_device::sty()
+inline uint8_t h6280_device::sty()
{
clear_t();
return Y;
@@ -1627,7 +1627,7 @@ inline UINT8 h6280_device::sty()
/* 6280 ********************************************************
* STZ Store zero
***************************************************************/
-inline UINT8 h6280_device::stz()
+inline uint8_t h6280_device::stz()
{
clear_t();
return 0;
@@ -1639,7 +1639,7 @@ inline UINT8 h6280_device::stz()
inline void h6280_device::sxy()
{
clear_t();
- UINT8 tmp = X;
+ uint8_t tmp = X;
X = Y;
Y = tmp;
}
@@ -1668,7 +1668,7 @@ inline void h6280_device::tai()
/* H6280 *******************************************************
* TAM Transfer accumulator to memory mapper register(s)
***************************************************************/
-inline void h6280_device::tam(UINT8 tmp)
+inline void h6280_device::tam(uint8_t tmp)
{
clear_t();
if (tmp&0x01) m_mmr[0] = A;
@@ -1781,7 +1781,7 @@ inline void h6280_device::tin()
* TMA Transfer memory mapper register(s) to accumulator
* the highest bit set in tmp is the one that counts
***************************************************************/
-inline void h6280_device::tma(UINT8 tmp)
+inline void h6280_device::tma(uint8_t tmp)
{
clear_t();
if (tmp&0x01) A = m_mmr[0];
@@ -1797,7 +1797,7 @@ inline void h6280_device::tma(UINT8 tmp)
/* 6280 ********************************************************
* TRB Test and reset bits
***************************************************************/
-inline UINT8 h6280_device::trb(UINT8 tmp)
+inline uint8_t h6280_device::trb(uint8_t tmp)
{
clear_t();
P = (P & ~(_fN|_fV|_fT|_fZ))
@@ -1811,7 +1811,7 @@ inline UINT8 h6280_device::trb(UINT8 tmp)
/* 6280 ********************************************************
* TSB Test and set bits
***************************************************************/
-inline UINT8 h6280_device::tsb(UINT8 tmp)
+inline uint8_t h6280_device::tsb(uint8_t tmp)
{
clear_t();
P = (P & ~(_fN|_fV|_fT|_fZ))
@@ -1835,7 +1835,7 @@ inline void h6280_device::tsx()
/* 6280 ********************************************************
* TST
***************************************************************/
-inline void h6280_device::tst(UINT8 imm, UINT8 tmp)
+inline void h6280_device::tst(uint8_t imm, uint8_t tmp)
{
P = (P & ~(_fN|_fV|_fT|_fZ))
| ((tmp&0x80) ? _fN:0)
@@ -2216,7 +2216,7 @@ void h6280_device::state_string_export(const device_state_entry &entry, std::str
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 h6280_device::disasm_min_opcode_bytes() const
+uint32_t h6280_device::disasm_min_opcode_bytes() const
{
return 1;
}
@@ -2227,7 +2227,7 @@ UINT32 h6280_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 h6280_device::disasm_max_opcode_bytes() const
+uint32_t h6280_device::disasm_max_opcode_bytes() const
{
return 7;
}
@@ -2238,7 +2238,7 @@ UINT32 h6280_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t h6280_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t h6280_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( h6280 );
return CPU_DISASSEMBLE_NAME(h6280)(this, buffer, pc, oprom, opram, options);
@@ -2250,7 +2250,7 @@ offs_t h6280_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 h6280_device::execute_min_cycles() const
+uint32_t h6280_device::execute_min_cycles() const
{
return 2;
}
@@ -2261,7 +2261,7 @@ UINT32 h6280_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 h6280_device::execute_max_cycles() const
+uint32_t h6280_device::execute_max_cycles() const
{
return 17 + 6*65536;
}
@@ -2272,7 +2272,7 @@ UINT32 h6280_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 h6280_device::execute_input_lines() const
+uint32_t h6280_device::execute_input_lines() const
{
return 4;
}
@@ -2309,7 +2309,7 @@ void h6280_device::execute_set_input(int inputnum, int state)
/***************************************************************
* program_read8 read memory
***************************************************************/
-UINT8 h6280_device::program_read8(offs_t addr)
+uint8_t h6280_device::program_read8(offs_t addr)
{
check_vdc_vce_penalty(addr);
return m_program->read_byte(translated(addr));
@@ -2318,7 +2318,7 @@ UINT8 h6280_device::program_read8(offs_t addr)
/***************************************************************
* program_write8 write memory
***************************************************************/
-void h6280_device::program_write8(offs_t addr, UINT8 data)
+void h6280_device::program_write8(offs_t addr, uint8_t data)
{
check_vdc_vce_penalty(addr);
m_program->write_byte(translated(addr), data);
@@ -2327,7 +2327,7 @@ void h6280_device::program_write8(offs_t addr, UINT8 data)
/***************************************************************
* program_read8z read memory - zero page
***************************************************************/
-UINT8 h6280_device::program_read8z(offs_t addr)
+uint8_t h6280_device::program_read8z(offs_t addr)
{
return m_program->read_byte((m_mmr[1] << 13) | (addr & 0x1fff));
}
@@ -2335,7 +2335,7 @@ UINT8 h6280_device::program_read8z(offs_t addr)
/***************************************************************
* program_write8z write memory - zero page
***************************************************************/
-void h6280_device::program_write8z(offs_t addr, UINT8 data)
+void h6280_device::program_write8z(offs_t addr, uint8_t data)
{
m_program->write_byte((m_mmr[1] << 13) | (addr & 0x1fff), data);
}
@@ -2343,7 +2343,7 @@ void h6280_device::program_write8z(offs_t addr, UINT8 data)
/***************************************************************
* program_read16 read word from memory
***************************************************************/
-UINT16 h6280_device::program_read16(offs_t addr)
+uint16_t h6280_device::program_read16(offs_t addr)
{
return m_program->read_byte(translated(addr)) |
(m_program->read_byte(translated(addr + 1)) << 8);
@@ -2352,7 +2352,7 @@ UINT16 h6280_device::program_read16(offs_t addr)
/***************************************************************
* program_read16z read a word from a zero page address
***************************************************************/
-UINT16 h6280_device::program_read16z(offs_t addr)
+uint16_t h6280_device::program_read16z(offs_t addr)
{
if ((addr & 0xff) == 0xff)
{
@@ -2369,7 +2369,7 @@ UINT16 h6280_device::program_read16z(offs_t addr)
/***************************************************************
* push a register onto the stack
***************************************************************/
-void h6280_device::push(UINT8 value)
+void h6280_device::push(uint8_t value)
{
m_program->write_byte((m_mmr[1] << 13) | m_sp.d, value);
S--;
@@ -2378,7 +2378,7 @@ void h6280_device::push(UINT8 value)
/***************************************************************
* pull a register from the stack
***************************************************************/
-void h6280_device::pull(UINT8 &value)
+void h6280_device::pull(uint8_t &value)
{
S++;
value = m_program->read_byte((m_mmr[1] << 13) | m_sp.d);
@@ -2387,7 +2387,7 @@ void h6280_device::pull(UINT8 &value)
/***************************************************************
* read_opcode read an opcode
***************************************************************/
-UINT8 h6280_device::read_opcode()
+uint8_t h6280_device::read_opcode()
{
return m_direct->read_byte(translated(PCW));
}
@@ -2395,7 +2395,7 @@ UINT8 h6280_device::read_opcode()
/***************************************************************
* read_opcode_arg read an opcode argument
***************************************************************/
-UINT8 h6280_device::read_opcode_arg()
+uint8_t h6280_device::read_opcode_arg()
{
return m_direct->read_byte(translated(PCW));
}
@@ -2571,12 +2571,12 @@ bool h6280_device::memory_translate(address_spacenum spacenum, int intention, of
return TRUE;
}
-UINT8 h6280_device::io_get_buffer()
+uint8_t h6280_device::io_get_buffer()
{
return m_io_buffer;
}
-void h6280_device::io_set_buffer(UINT8 data)
+void h6280_device::io_set_buffer(uint8_t data)
{
m_io_buffer = data;
}
diff --git a/src/devices/cpu/h6280/h6280.h b/src/devices/cpu/h6280/h6280.h
index ecf93dee843..5717b3fa55f 100644
--- a/src/devices/cpu/h6280/h6280.h
+++ b/src/devices/cpu/h6280/h6280.h
@@ -60,7 +60,7 @@ class h6280_device : public cpu_device
{
public:
// construction/destruction
- h6280_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h6280_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// public interfaces
void set_irq_line(int irqline, int state);
@@ -72,8 +72,8 @@ public:
DECLARE_WRITE8_MEMBER( timer_w );
/* functions for use by the PSG and joypad port only! */
- UINT8 io_get_buffer();
- void io_set_buffer(UINT8);
+ uint8_t io_get_buffer();
+ void io_set_buffer(uint8_t);
protected:
// device-level overrides
@@ -82,9 +82,9 @@ protected:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -93,24 +93,24 @@ protected:
virtual bool memory_translate(address_spacenum spacenum, int intention, offs_t &address) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// opcode accessors
- UINT8 program_read8(offs_t addr);
- void program_write8(offs_t addr, UINT8 data);
- UINT8 program_read8z(offs_t addr);
- void program_write8z(offs_t addr, UINT8 data);
- UINT16 program_read16(offs_t addr);
- UINT16 program_read16z(offs_t addr);
- void push(UINT8 value);
- void pull(UINT8 &value);
- UINT8 read_opcode();
- UINT8 read_opcode_arg();
+ uint8_t program_read8(offs_t addr);
+ void program_write8(offs_t addr, uint8_t data);
+ uint8_t program_read8z(offs_t addr);
+ void program_write8z(offs_t addr, uint8_t data);
+ uint16_t program_read16(offs_t addr);
+ uint16_t program_read16z(offs_t addr);
+ void push(uint8_t value);
+ void pull(uint8_t &value);
+ uint8_t read_opcode();
+ uint8_t read_opcode_arg();
#undef PROTOTYPES
#define PROTOTYPES(prefix) \
@@ -181,14 +181,14 @@ protected:
PROTOTYPES(op)
- UINT32 translated(UINT16 addr);
+ uint32_t translated(uint16_t addr);
void h6280_cycles(int cyc);
- void set_nz(UINT8 n);
+ void set_nz(uint8_t n);
void clear_t();
- void do_interrupt(UINT16 vector);
+ void do_interrupt(uint16_t vector);
void check_and_take_irq_lines();
void check_irq_lines();
- void check_vdc_vce_penalty(UINT16 addr);
+ void check_vdc_vce_penalty(uint16_t addr);
void bra(bool cond);
void ea_zpg();
void ea_tflg();
@@ -202,40 +202,40 @@ protected:
void ea_idy();
void ea_ind();
void ea_iax();
- UINT8 rd_imm();
- UINT8 rd_zpg();
- UINT8 rd_zpx();
- UINT8 rd_zpy();
- UINT8 rd_abs();
- UINT8 rd_abx();
- UINT8 rd_aby();
- UINT8 rd_zpi();
- UINT8 rd_idx();
- UINT8 rd_idy();
- UINT8 rd_tfl();
- void wr_zpg(UINT8 tmp);
- void wr_zpx(UINT8 tmp);
- void wr_zpy(UINT8 tmp);
- void wr_abs(UINT8 tmp);
- void wr_abx(UINT8 tmp);
- void wr_aby(UINT8 tmp);
- void wr_zpi(UINT8 tmp);
- void wr_idx(UINT8 tmp);
- void wr_idy(UINT8 tmp);
- void wb_ea(UINT8 tmp);
- void wb_eaz(UINT8 tmp);
- void compose_p(UINT8 set, UINT8 clr);
- void tadc(UINT8 tmp);
- void adc(UINT8 tmp);
- void tand(UINT8 tmp);
- void and_a(UINT8 tmp);
- UINT8 asl(UINT8 tmp);
- void bbr(int bit, UINT8 tmp);
- void bbs(int bit, UINT8 tmp);
+ uint8_t rd_imm();
+ uint8_t rd_zpg();
+ uint8_t rd_zpx();
+ uint8_t rd_zpy();
+ uint8_t rd_abs();
+ uint8_t rd_abx();
+ uint8_t rd_aby();
+ uint8_t rd_zpi();
+ uint8_t rd_idx();
+ uint8_t rd_idy();
+ uint8_t rd_tfl();
+ void wr_zpg(uint8_t tmp);
+ void wr_zpx(uint8_t tmp);
+ void wr_zpy(uint8_t tmp);
+ void wr_abs(uint8_t tmp);
+ void wr_abx(uint8_t tmp);
+ void wr_aby(uint8_t tmp);
+ void wr_zpi(uint8_t tmp);
+ void wr_idx(uint8_t tmp);
+ void wr_idy(uint8_t tmp);
+ void wb_ea(uint8_t tmp);
+ void wb_eaz(uint8_t tmp);
+ void compose_p(uint8_t set, uint8_t clr);
+ void tadc(uint8_t tmp);
+ void adc(uint8_t tmp);
+ void tand(uint8_t tmp);
+ void and_a(uint8_t tmp);
+ uint8_t asl(uint8_t tmp);
+ void bbr(int bit, uint8_t tmp);
+ void bbs(int bit, uint8_t tmp);
void bcc();
void bcs();
void beq();
- void bit(UINT8 tmp);
+ void bit(uint8_t tmp);
void bmi();
void bne();
void bpl();
@@ -250,26 +250,26 @@ protected:
void clv();
void clx();
void cly();
- void cmp(UINT8 tmp);
- void cpx(UINT8 tmp);
- void cpy(UINT8 tmp);
- UINT8 dec(UINT8 tmp);
+ void cmp(uint8_t tmp);
+ void cpx(uint8_t tmp);
+ void cpy(uint8_t tmp);
+ uint8_t dec(uint8_t tmp);
void dex();
void dey();
- void teor(UINT8 tmp);
- void eor(UINT8 tmp);
- UINT8 inc(UINT8 tmp);
+ void teor(uint8_t tmp);
+ void eor(uint8_t tmp);
+ uint8_t inc(uint8_t tmp);
void inx();
void iny();
void jmp();
void jsr();
- void lda(UINT8 tmp);
- void ldx(UINT8 tmp);
- void ldy(UINT8 tmp);
- UINT8 lsr(UINT8 tmp);
+ void lda(uint8_t tmp);
+ void ldx(uint8_t tmp);
+ void ldy(uint8_t tmp);
+ uint8_t lsr(uint8_t tmp);
void nop();
- void tora(UINT8 tmp);
- void ora(UINT8 tmp);
+ void tora(uint8_t tmp);
+ void ora(uint8_t tmp);
void pha();
void php();
void phx();
@@ -278,41 +278,41 @@ protected:
void plp();
void plx();
void ply();
- UINT8 rmb(int bit, UINT8 tmp);
- UINT8 rol(UINT8 tmp);
- UINT8 ror(UINT8 tmp);
+ uint8_t rmb(int bit, uint8_t tmp);
+ uint8_t rol(uint8_t tmp);
+ uint8_t ror(uint8_t tmp);
void rti();
void rts();
void sax();
void say();
- void tsbc(UINT8 tmp);
- void sbc(UINT8 tmp);
+ void tsbc(uint8_t tmp);
+ void sbc(uint8_t tmp);
void sec();
void sed();
void sei();
void set();
- UINT8 smb(int bit, UINT8 tmp);
- void st0(UINT8 tmp);
- void st1(UINT8 tmp);
- void st2(UINT8 tmp);
- UINT8 sta();
- UINT8 stx();
- UINT8 sty();
- UINT8 stz();
+ uint8_t smb(int bit, uint8_t tmp);
+ void st0(uint8_t tmp);
+ void st1(uint8_t tmp);
+ void st2(uint8_t tmp);
+ uint8_t sta();
+ uint8_t stx();
+ uint8_t sty();
+ uint8_t stz();
void sxy();
void tai();
- void tam(UINT8 tmp);
+ void tam(uint8_t tmp);
void tax();
void tay();
void tdd();
void tia();
void tii();
void tin();
- void tma(UINT8 tmp);
- UINT8 trb(UINT8 tmp);
- UINT8 tsb(UINT8 tmp);
+ void tma(uint8_t tmp);
+ uint8_t trb(uint8_t tmp);
+ uint8_t tsb(uint8_t tmp);
void tsx();
- void tst(UINT8 imm, UINT8 tmp);
+ void tst(uint8_t imm, uint8_t tmp);
void txa();
void txs();
void tya();
@@ -338,24 +338,24 @@ protected:
PAIR m_sp; /* stack pointer (always 100 - 1FF) */
PAIR m_zp; /* zero page address */
PAIR m_ea; /* effective address */
- UINT8 m_a; /* Accumulator */
- UINT8 m_x; /* X index register */
- UINT8 m_y; /* Y index register */
- UINT8 m_p; /* Processor status */
- UINT8 m_mmr[8]; /* Hu6280 memory mapper registers */
- UINT8 m_irq_mask; /* interrupt enable/disable */
- UINT8 m_timer_status; /* timer status */
- UINT8 m_timer_ack; /* timer acknowledge */
- UINT8 m_clocks_per_cycle; /* 4 = low speed mode, 1 = high speed mode */
- INT32 m_timer_value; /* timer interrupt */
- INT32 m_timer_load; /* reload value */
- UINT8 m_nmi_state;
- UINT8 m_irq_state[3];
- UINT8 m_irq_pending;
+ uint8_t m_a; /* Accumulator */
+ uint8_t m_x; /* X index register */
+ uint8_t m_y; /* Y index register */
+ uint8_t m_p; /* Processor status */
+ uint8_t m_mmr[8]; /* Hu6280 memory mapper registers */
+ uint8_t m_irq_mask; /* interrupt enable/disable */
+ uint8_t m_timer_status; /* timer status */
+ uint8_t m_timer_ack; /* timer acknowledge */
+ uint8_t m_clocks_per_cycle; /* 4 = low speed mode, 1 = high speed mode */
+ int32_t m_timer_value; /* timer interrupt */
+ int32_t m_timer_load; /* reload value */
+ uint8_t m_nmi_state;
+ uint8_t m_irq_state[3];
+ uint8_t m_irq_pending;
#if LAZY_FLAGS
- INT32 m_nz; /* last value (lazy N and Z flag) */
+ int32_t m_nz; /* last value (lazy N and Z flag) */
#endif
- UINT8 m_io_buffer; /* last value written to the PSG, timer, and interrupt pages */
+ uint8_t m_io_buffer; /* last value written to the PSG, timer, and interrupt pages */
// other internal states
int m_icount;
diff --git a/src/devices/cpu/h8/h8.cpp b/src/devices/cpu/h8/h8.cpp
index 4a413853b95..fe25c24d61f 100644
--- a/src/devices/cpu/h8/h8.cpp
+++ b/src/devices/cpu/h8/h8.cpp
@@ -15,7 +15,7 @@
#include "h8_dma.h"
#include "h8_dtc.h"
-h8_device::h8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool mode_a16, address_map_delegate map_delegate) :
+h8_device::h8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, bool mode_a16, address_map_delegate map_delegate) :
cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
program_config("program", ENDIANNESS_BIG, 16, mode_a16 ? 16 : 24, 0, map_delegate),
io_config("io", ENDIANNESS_BIG, 16, 16, -1), program(nullptr), io(nullptr), direct(nullptr), PPC(0), NPC(0), PC(0), PIR(0), EXR(0), CCR(0), MAC(0), MACF(0),
@@ -161,22 +161,22 @@ void h8_device::request_state(int state)
requested_state = state;
}
-UINT32 h8_device::execute_min_cycles() const
+uint32_t h8_device::execute_min_cycles() const
{
return 1;
}
-UINT32 h8_device::execute_max_cycles() const
+uint32_t h8_device::execute_max_cycles() const
{
return 1;
}
-UINT32 h8_device::execute_input_lines() const
+uint32_t h8_device::execute_input_lines() const
{
return 0;
}
-void h8_device::recompute_bcount(UINT64 event_time)
+void h8_device::recompute_bcount(uint64_t event_time)
{
if(!event_time || event_time >= total_cycles() + icount) {
bcount = 0;
@@ -223,7 +223,7 @@ void h8_device::execute_run()
}
}
-void h8_device::add_event(UINT64 &event_time, UINT64 new_event)
+void h8_device::add_event(uint64_t &event_time, uint64_t new_event)
{
if(!new_event)
return;
@@ -324,17 +324,17 @@ void h8_device::state_string_export(const device_state_entry &entry, std::string
}
-UINT32 h8_device::disasm_min_opcode_bytes() const
+uint32_t h8_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 h8_device::disasm_max_opcode_bytes() const
+uint32_t h8_device::disasm_max_opcode_bytes() const
{
return 10;
}
-void h8_device::disassemble_am(char *&buffer, int am, offs_t pc, const UINT8 *oprom, UINT32 opcode, int slot, int offset)
+void h8_device::disassemble_am(char *&buffer, int am, offs_t pc, const uint8_t *oprom, uint32_t opcode, int slot, int offset)
{
static const char *const r8_names[16] = {
"r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
@@ -453,9 +453,9 @@ void h8_device::disassemble_am(char *&buffer, int am, offs_t pc, const UINT8 *op
case DASM_abs16:
if(offset >= 6)
- buffer += sprintf(buffer, "@%08x", INT16((oprom[offset-4] << 8) | oprom[offset-3]));
+ buffer += sprintf(buffer, "@%08x", int16_t((oprom[offset-4] << 8) | oprom[offset-3]));
else
- buffer += sprintf(buffer, "@%08x", INT16((oprom[offset-2] << 8) | oprom[offset-1]));
+ buffer += sprintf(buffer, "@%08x", int16_t((oprom[offset-2] << 8) | oprom[offset-1]));
break;
case DASM_abs32:
@@ -478,11 +478,11 @@ void h8_device::disassemble_am(char *&buffer, int am, offs_t pc, const UINT8 *op
break;
case DASM_rel8:
- buffer += sprintf(buffer, "%08x", pc + 2 + INT8(oprom[1]));
+ buffer += sprintf(buffer, "%08x", pc + 2 + int8_t(oprom[1]));
break;
case DASM_rel16:
- buffer += sprintf(buffer, "%08x", pc + 4 + INT16((oprom[2] << 8) | oprom[3]));
+ buffer += sprintf(buffer, "%08x", pc + 4 + int16_t((oprom[2] << 8) | oprom[3]));
break;
case DASM_one:
@@ -539,9 +539,9 @@ void h8_device::disassemble_am(char *&buffer, int am, offs_t pc, const UINT8 *op
}
}
-offs_t h8_device::disassemble_generic(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options, const disasm_entry *table)
+offs_t h8_device::disassemble_generic(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options, const disasm_entry *table)
{
- UINT32 slot[5];
+ uint32_t slot[5];
slot[0] = (oprom[0] << 8) | oprom[1];
slot[1] = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | oprom[3];
slot[2] = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[4] << 8) | oprom[5];
@@ -569,43 +569,43 @@ offs_t h8_device::disassemble_generic(char *buffer, offs_t pc, const UINT8 *opro
return e.flags | DASMFLAG_SUPPORTED;
}
-offs_t h8_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t h8_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
-UINT16 h8_device::read16i(UINT32 adr)
+uint16_t h8_device::read16i(uint32_t adr)
{
icount--;
return direct->read_word(adr & ~1);
}
-UINT16 h8_device::fetch()
+uint16_t h8_device::fetch()
{
- UINT16 res = read16i(PC);
+ uint16_t res = read16i(PC);
PC += 2;
return res;
}
-UINT8 h8_device::read8(UINT32 adr)
+uint8_t h8_device::read8(uint32_t adr)
{
icount--;
return program->read_byte(adr);
}
-void h8_device::write8(UINT32 adr, UINT8 data)
+void h8_device::write8(uint32_t adr, uint8_t data)
{
icount--;
program->write_byte(adr, data);
}
-UINT16 h8_device::read16(UINT32 adr)
+uint16_t h8_device::read16(uint32_t adr)
{
icount--;
return program->read_word(adr & ~1);
}
-void h8_device::write16(UINT32 adr, UINT16 data)
+void h8_device::write16(uint32_t adr, uint16_t data)
{
icount--;
program->write_word(adr & ~1, data);
@@ -676,15 +676,15 @@ int h8_device::trapa_setup()
throw emu_fatalerror("%s: Trapa setup called but unimplemented.\n", tag());
}
-UINT8 h8_device::do_addx8(UINT8 v1, UINT8 v2)
+uint8_t h8_device::do_addx8(uint8_t v1, uint8_t v2)
{
- UINT16 res = v1 + v2 + (CCR & F_C ? 1 : 0);
+ uint16_t res = v1 + v2 + (CCR & F_C ? 1 : 0);
CCR &= ~(F_N|F_V|F_Z|F_C|F_H);
if(((v1 & 0xf) + (v2 & 0xf) + (CCR & F_C ? 1 : 0)) & 0x10)
CCR |= F_H;
- if(!UINT8(res))
+ if(!uint8_t(res))
CCR |= F_Z;
- else if(INT8(res) < 0)
+ else if(int8_t(res) < 0)
CCR |= F_N;
if(~(v1^v2) & (v1^res) & 0x80)
CCR |= F_V;
@@ -694,15 +694,15 @@ UINT8 h8_device::do_addx8(UINT8 v1, UINT8 v2)
}
-UINT8 h8_device::do_subx8(UINT8 v1, UINT8 v2)
+uint8_t h8_device::do_subx8(uint8_t v1, uint8_t v2)
{
- UINT16 res = v1 - v2 - (CCR & F_C ? 1 : 0);
+ uint16_t res = v1 - v2 - (CCR & F_C ? 1 : 0);
CCR &= ~(F_N|F_V|F_Z|F_C|F_H);
if(((v1 & 0xf) - (v2 & 0xf) - (CCR & F_C ? 1 : 0)) & 0x10)
CCR |= F_H;
- if(!UINT8(res))
+ if(!uint8_t(res))
CCR |= F_Z;
- else if(INT8(res) < 0)
+ else if(int8_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80)
CCR |= F_V;
@@ -712,54 +712,54 @@ UINT8 h8_device::do_subx8(UINT8 v1, UINT8 v2)
}
-UINT8 h8_device::do_inc8(UINT8 v1, UINT8 v2)
+uint8_t h8_device::do_inc8(uint8_t v1, uint8_t v2)
{
- UINT8 res = v1 + v2;
+ uint8_t res = v1 + v2;
CCR &= ~(F_N|F_V|F_Z);
if(!res)
CCR |= F_Z;
- else if(INT8(res) < 0)
+ else if(int8_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80)
CCR |= F_V;
return res;
}
-UINT16 h8_device::do_inc16(UINT16 v1, UINT16 v2)
+uint16_t h8_device::do_inc16(uint16_t v1, uint16_t v2)
{
- UINT16 res = v1 + v2;
+ uint16_t res = v1 + v2;
CCR &= ~(F_N|F_V|F_Z);
if(!res)
CCR |= F_Z;
- else if(INT16(res) < 0)
+ else if(int16_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x8000)
CCR |= F_V;
return res;
}
-UINT32 h8_device::do_inc32(UINT32 v1, UINT32 v2)
+uint32_t h8_device::do_inc32(uint32_t v1, uint32_t v2)
{
- UINT32 res = v1 + v2;
+ uint32_t res = v1 + v2;
CCR &= ~(F_N|F_V|F_Z);
if(!res)
CCR |= F_Z;
- else if(INT32(res) < 0)
+ else if(int32_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80000000)
CCR |= F_V;
return res;
}
-UINT8 h8_device::do_add8(UINT8 v1, UINT8 v2)
+uint8_t h8_device::do_add8(uint8_t v1, uint8_t v2)
{
- UINT16 res = v1 + v2;
+ uint16_t res = v1 + v2;
CCR &= ~(F_N|F_V|F_Z|F_C|F_H);
if(((v1 & 0xf) + (v2 & 0xf)) & 0x10)
CCR |= F_H;
- if(!UINT8(res))
+ if(!uint8_t(res))
CCR |= F_Z;
- else if(INT8(res) < 0)
+ else if(int8_t(res) < 0)
CCR |= F_N;
if(~(v1^v2) & (v1^res) & 0x80)
CCR |= F_V;
@@ -769,15 +769,15 @@ UINT8 h8_device::do_add8(UINT8 v1, UINT8 v2)
}
-UINT16 h8_device::do_add16(UINT16 v1, UINT16 v2)
+uint16_t h8_device::do_add16(uint16_t v1, uint16_t v2)
{
- UINT32 res = v1 + v2;
+ uint32_t res = v1 + v2;
CCR &= ~(F_N|F_V|F_Z|F_C|F_H);
if(((v1 & 0xfff) + (v2 & 0xffff)) & 0x1000)
CCR |= F_H;
- if(!UINT16(res))
+ if(!uint16_t(res))
CCR |= F_Z;
- else if(INT16(res) < 0)
+ else if(int16_t(res) < 0)
CCR |= F_N;
if(~(v1^v2) & (v1^res) & 0x8000)
CCR |= F_V;
@@ -787,15 +787,15 @@ UINT16 h8_device::do_add16(UINT16 v1, UINT16 v2)
}
-UINT32 h8_device::do_add32(UINT32 v1, UINT32 v2)
+uint32_t h8_device::do_add32(uint32_t v1, uint32_t v2)
{
- UINT64 res = UINT64(v1) + UINT64(v2);
+ uint64_t res = uint64_t(v1) + uint64_t(v2);
CCR &= ~(F_N|F_V|F_Z|F_C|F_H);
if(((v1 & 0xfffffff) + (v2 & 0xfffffff)) & 0x10000000)
CCR |= F_H;
- if(!UINT32(res))
+ if(!uint32_t(res))
CCR |= F_Z;
- else if(INT32(res) < 0)
+ else if(int32_t(res) < 0)
CCR |= F_N;
if(~(v1^v2) & (v1^res) & 0x80000000)
CCR |= F_V;
@@ -804,54 +804,54 @@ UINT32 h8_device::do_add32(UINT32 v1, UINT32 v2)
return res;
}
-UINT8 h8_device::do_dec8(UINT8 v1, UINT8 v2)
+uint8_t h8_device::do_dec8(uint8_t v1, uint8_t v2)
{
- UINT8 res = v1 - v2;
+ uint8_t res = v1 - v2;
CCR &= ~(F_N|F_V|F_Z);
if(!res)
CCR |= F_Z;
- else if(INT8(res) < 0)
+ else if(int8_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80)
CCR |= F_V;
return res;
}
-UINT16 h8_device::do_dec16(UINT16 v1, UINT16 v2)
+uint16_t h8_device::do_dec16(uint16_t v1, uint16_t v2)
{
- UINT16 res = v1 - v2;
+ uint16_t res = v1 - v2;
CCR &= ~(F_N|F_V|F_Z);
if(!res)
CCR |= F_Z;
- else if(INT16(res) < 0)
+ else if(int16_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x8000)
CCR |= F_V;
return res;
}
-UINT32 h8_device::do_dec32(UINT32 v1, UINT32 v2)
+uint32_t h8_device::do_dec32(uint32_t v1, uint32_t v2)
{
- UINT32 res = v1 - v2;
+ uint32_t res = v1 - v2;
CCR &= ~(F_N|F_V|F_Z);
if(!res)
CCR |= F_Z;
- else if(INT32(res) < 0)
+ else if(int32_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80000000)
CCR |= F_V;
return res;
}
-UINT8 h8_device::do_sub8(UINT8 v1, UINT8 v2)
+uint8_t h8_device::do_sub8(uint8_t v1, uint8_t v2)
{
- UINT16 res = v1 - v2;
+ uint16_t res = v1 - v2;
CCR &= ~(F_N|F_V|F_Z|F_C|F_H);
if(((v1 & 0xf) - (v2 & 0xf)) & 0x10)
CCR |= F_H;
- if(!UINT8(res))
+ if(!uint8_t(res))
CCR |= F_Z;
- else if(INT8(res) < 0)
+ else if(int8_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80)
CCR |= F_V;
@@ -861,15 +861,15 @@ UINT8 h8_device::do_sub8(UINT8 v1, UINT8 v2)
}
-UINT16 h8_device::do_sub16(UINT16 v1, UINT16 v2)
+uint16_t h8_device::do_sub16(uint16_t v1, uint16_t v2)
{
- UINT32 res = v1 - v2;
+ uint32_t res = v1 - v2;
CCR &= ~(F_N|F_V|F_Z|F_C|F_H);
if(((v1 & 0xfff) - (v2 & 0xffff)) & 0x1000)
CCR |= F_H;
- if(!UINT16(res))
+ if(!uint16_t(res))
CCR |= F_Z;
- else if(INT16(res) < 0)
+ else if(int16_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x8000)
CCR |= F_V;
@@ -879,15 +879,15 @@ UINT16 h8_device::do_sub16(UINT16 v1, UINT16 v2)
}
-UINT32 h8_device::do_sub32(UINT32 v1, UINT32 v2)
+uint32_t h8_device::do_sub32(uint32_t v1, uint32_t v2)
{
- UINT64 res = UINT64(v1) - UINT64(v2);
+ uint64_t res = uint64_t(v1) - uint64_t(v2);
CCR &= ~(F_N|F_V|F_Z|F_C|F_H);
if(((v1 & 0xfffffff) - (v2 & 0xfffffff)) & 0x10000000)
CCR |= F_H;
- if(!UINT32(res))
+ if(!uint32_t(res))
CCR |= F_Z;
- else if(INT32(res) < 0)
+ else if(int32_t(res) < 0)
CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80000000)
CCR |= F_V;
@@ -896,7 +896,7 @@ UINT32 h8_device::do_sub32(UINT32 v1, UINT32 v2)
return res;
}
-UINT8 h8_device::do_shal8(UINT8 v)
+uint8_t h8_device::do_shal8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80)
@@ -906,12 +906,12 @@ UINT8 h8_device::do_shal8(UINT8 v)
v <<= 1;
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_shal16(UINT16 v)
+uint16_t h8_device::do_shal16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x8000)
@@ -921,12 +921,12 @@ UINT16 h8_device::do_shal16(UINT16 v)
v <<= 1;
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_shal32(UINT32 v)
+uint32_t h8_device::do_shal32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80000000)
@@ -936,12 +936,12 @@ UINT32 h8_device::do_shal32(UINT32 v)
v <<= 1;
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_shar8(UINT8 v)
+uint8_t h8_device::do_shar8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -956,7 +956,7 @@ UINT8 h8_device::do_shar8(UINT8 v)
return v;
}
-UINT16 h8_device::do_shar16(UINT16 v)
+uint16_t h8_device::do_shar16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -971,7 +971,7 @@ UINT16 h8_device::do_shar16(UINT16 v)
return v;
}
-UINT32 h8_device::do_shar32(UINT32 v)
+uint32_t h8_device::do_shar32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -986,7 +986,7 @@ UINT32 h8_device::do_shar32(UINT32 v)
return v;
}
-UINT8 h8_device::do_shll8(UINT8 v)
+uint8_t h8_device::do_shll8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80)
@@ -994,12 +994,12 @@ UINT8 h8_device::do_shll8(UINT8 v)
v <<= 1;
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_shll16(UINT16 v)
+uint16_t h8_device::do_shll16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x8000)
@@ -1007,12 +1007,12 @@ UINT16 h8_device::do_shll16(UINT16 v)
v <<= 1;
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_shll32(UINT32 v)
+uint32_t h8_device::do_shll32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80000000)
@@ -1020,12 +1020,12 @@ UINT32 h8_device::do_shll32(UINT32 v)
v <<= 1;
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_shlr8(UINT8 v)
+uint8_t h8_device::do_shlr8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -1036,7 +1036,7 @@ UINT8 h8_device::do_shlr8(UINT8 v)
return v;
}
-UINT16 h8_device::do_shlr16(UINT16 v)
+uint16_t h8_device::do_shlr16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -1047,7 +1047,7 @@ UINT16 h8_device::do_shlr16(UINT16 v)
return v;
}
-UINT32 h8_device::do_shlr32(UINT32 v)
+uint32_t h8_device::do_shlr32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -1058,7 +1058,7 @@ UINT32 h8_device::do_shlr32(UINT32 v)
return v;
}
-UINT8 h8_device::do_shal2_8(UINT8 v)
+uint8_t h8_device::do_shal2_8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40)
@@ -1069,12 +1069,12 @@ UINT8 h8_device::do_shal2_8(UINT8 v)
v <<= 2;
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_shal2_16(UINT16 v)
+uint16_t h8_device::do_shal2_16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x4000)
@@ -1085,12 +1085,12 @@ UINT16 h8_device::do_shal2_16(UINT16 v)
v <<= 2;
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_shal2_32(UINT32 v)
+uint32_t h8_device::do_shal2_32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40000000)
@@ -1101,12 +1101,12 @@ UINT32 h8_device::do_shal2_32(UINT32 v)
v <<= 2;
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_shar2_8(UINT8 v)
+uint8_t h8_device::do_shar2_8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1121,7 +1121,7 @@ UINT8 h8_device::do_shar2_8(UINT8 v)
return v;
}
-UINT16 h8_device::do_shar2_16(UINT16 v)
+uint16_t h8_device::do_shar2_16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1136,7 +1136,7 @@ UINT16 h8_device::do_shar2_16(UINT16 v)
return v;
}
-UINT32 h8_device::do_shar2_32(UINT32 v)
+uint32_t h8_device::do_shar2_32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1151,7 +1151,7 @@ UINT32 h8_device::do_shar2_32(UINT32 v)
return v;
}
-UINT8 h8_device::do_shll2_8(UINT8 v)
+uint8_t h8_device::do_shll2_8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40)
@@ -1159,12 +1159,12 @@ UINT8 h8_device::do_shll2_8(UINT8 v)
v <<= 2;
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_shll2_16(UINT16 v)
+uint16_t h8_device::do_shll2_16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x4000)
@@ -1172,12 +1172,12 @@ UINT16 h8_device::do_shll2_16(UINT16 v)
v <<= 2;
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_shll2_32(UINT32 v)
+uint32_t h8_device::do_shll2_32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40000000)
@@ -1185,12 +1185,12 @@ UINT32 h8_device::do_shll2_32(UINT32 v)
v <<= 2;
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_shlr2_8(UINT8 v)
+uint8_t h8_device::do_shlr2_8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1201,7 +1201,7 @@ UINT8 h8_device::do_shlr2_8(UINT8 v)
return v;
}
-UINT16 h8_device::do_shlr2_16(UINT16 v)
+uint16_t h8_device::do_shlr2_16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1212,7 +1212,7 @@ UINT16 h8_device::do_shlr2_16(UINT16 v)
return v;
}
-UINT32 h8_device::do_shlr2_32(UINT32 v)
+uint32_t h8_device::do_shlr2_32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1223,7 +1223,7 @@ UINT32 h8_device::do_shlr2_32(UINT32 v)
return v;
}
-UINT8 h8_device::do_rotl8(UINT8 v)
+uint8_t h8_device::do_rotl8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80)
@@ -1231,12 +1231,12 @@ UINT8 h8_device::do_rotl8(UINT8 v)
v = (v << 1) | (v >> 7);
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_rotl16(UINT16 v)
+uint16_t h8_device::do_rotl16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x8000)
@@ -1244,12 +1244,12 @@ UINT16 h8_device::do_rotl16(UINT16 v)
v = (v << 1) | (v >> 15);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_rotl32(UINT32 v)
+uint32_t h8_device::do_rotl32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80000000)
@@ -1257,12 +1257,12 @@ UINT32 h8_device::do_rotl32(UINT32 v)
v = (v << 1) | (v >> 31);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_rotr8(UINT8 v)
+uint8_t h8_device::do_rotr8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x01)
@@ -1270,12 +1270,12 @@ UINT8 h8_device::do_rotr8(UINT8 v)
v = (v << 7) | (v >> 1);
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_rotr16(UINT16 v)
+uint16_t h8_device::do_rotr16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x0001)
@@ -1283,12 +1283,12 @@ UINT16 h8_device::do_rotr16(UINT16 v)
v = (v << 15) | (v >> 1);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_rotr32(UINT32 v)
+uint32_t h8_device::do_rotr32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x00000001)
@@ -1296,96 +1296,96 @@ UINT32 h8_device::do_rotr32(UINT32 v)
v = (v << 31) | (v >> 1);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_rotxl8(UINT8 v)
+uint8_t h8_device::do_rotxl8(uint8_t v)
{
- UINT8 c = CCR & F_C ? 1 : 0;
+ uint8_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80)
CCR |= F_C;
v = (v << 1) | c;
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_rotxl16(UINT16 v)
+uint16_t h8_device::do_rotxl16(uint16_t v)
{
- UINT16 c = CCR & F_C ? 1 : 0;
+ uint16_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x8000)
CCR |= F_C;
v = (v << 1) | c;
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_rotxl32(UINT32 v)
+uint32_t h8_device::do_rotxl32(uint32_t v)
{
- UINT32 c = CCR & F_C ? 1 : 0;
+ uint32_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80000000)
CCR |= F_C;
v = (v << 1) | c;
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_rotxr8(UINT8 v)
+uint8_t h8_device::do_rotxr8(uint8_t v)
{
- UINT8 c = CCR & F_C ? 1 : 0;
+ uint8_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x01)
CCR |= F_C;
v = (v >> 1) | (c << 7);
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_rotxr16(UINT16 v)
+uint16_t h8_device::do_rotxr16(uint16_t v)
{
- UINT8 c = CCR & F_C ? 1 : 0;
+ uint8_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x0001)
CCR |= F_C;
v = (v >> 1) | (c << 15);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_rotxr32(UINT32 v)
+uint32_t h8_device::do_rotxr32(uint32_t v)
{
- UINT8 c = CCR & F_C ? 1 : 0;
+ uint8_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x00000001)
CCR |= F_C;
v = (v >> 1) | (c << 31);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_rotl2_8(UINT8 v)
+uint8_t h8_device::do_rotl2_8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40)
@@ -1393,12 +1393,12 @@ UINT8 h8_device::do_rotl2_8(UINT8 v)
v = (v << 2) | (v >> 6);
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_rotl2_16(UINT16 v)
+uint16_t h8_device::do_rotl2_16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x4000)
@@ -1406,12 +1406,12 @@ UINT16 h8_device::do_rotl2_16(UINT16 v)
v = (v << 2) | (v >> 14);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_rotl2_32(UINT32 v)
+uint32_t h8_device::do_rotl2_32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40000000)
@@ -1419,12 +1419,12 @@ UINT32 h8_device::do_rotl2_32(UINT32 v)
v = (v << 2) | (v >> 30);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_rotr2_8(UINT8 v)
+uint8_t h8_device::do_rotr2_8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x02)
@@ -1432,12 +1432,12 @@ UINT8 h8_device::do_rotr2_8(UINT8 v)
v = (v << 6) | (v >> 2);
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_rotr2_16(UINT16 v)
+uint16_t h8_device::do_rotr2_16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x0002)
@@ -1445,12 +1445,12 @@ UINT16 h8_device::do_rotr2_16(UINT16 v)
v = (v << 14) | (v >> 2);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_rotr2_32(UINT32 v)
+uint32_t h8_device::do_rotr2_32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x00000002)
@@ -1458,137 +1458,137 @@ UINT32 h8_device::do_rotr2_32(UINT32 v)
v = (v << 30) | (v >> 2);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_rotxl2_8(UINT8 v)
+uint8_t h8_device::do_rotxl2_8(uint8_t v)
{
- UINT8 c = CCR & F_C ? 1 : 0;
+ uint8_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40)
CCR |= F_C;
v = (v << 2) | (c << 1) | ((v >> 6) & 0x01);
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_rotxl2_16(UINT16 v)
+uint16_t h8_device::do_rotxl2_16(uint16_t v)
{
- UINT16 c = CCR & F_C ? 1 : 0;
+ uint16_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x4000)
CCR |= F_C;
v = (v << 2) | (c << 1) | ((v >> 14) & 0x0001);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_rotxl2_32(UINT32 v)
+uint32_t h8_device::do_rotxl2_32(uint32_t v)
{
- UINT32 c = CCR & F_C ? 1 : 0;
+ uint32_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40000000)
CCR |= F_C;
v = (v << 2) | (c << 1) | ((v >> 30) & 0x00000001);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT8 h8_device::do_rotxr2_8(UINT8 v)
+uint8_t h8_device::do_rotxr2_8(uint8_t v)
{
- UINT8 c = CCR & F_C ? 1 : 0;
+ uint8_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x02)
CCR |= F_C;
v = (v >> 2) | (c << 6) | (v << 7);
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT16 h8_device::do_rotxr2_16(UINT16 v)
+uint16_t h8_device::do_rotxr2_16(uint16_t v)
{
- UINT16 c = CCR & F_C ? 1 : 0;
+ uint16_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x0002)
CCR |= F_C;
v = (v >> 2) | (c << 14) | (v << 15);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
return v;
}
-UINT32 h8_device::do_rotxr2_32(UINT32 v)
+uint32_t h8_device::do_rotxr2_32(uint32_t v)
{
- UINT32 c = CCR & F_C ? 1 : 0;
+ uint32_t c = CCR & F_C ? 1 : 0;
CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x00000002)
CCR |= F_C;
v = (v >> 2) | (c << 30) | (v << 31);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
return v;
}
-void h8_device::set_nzv8(UINT8 v)
+void h8_device::set_nzv8(uint8_t v)
{
CCR &= ~(F_N|F_V|F_Z);
if(!v)
CCR |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
CCR |= F_N;
}
-void h8_device::set_nzv16(UINT16 v)
+void h8_device::set_nzv16(uint16_t v)
{
CCR &= ~(F_N|F_V|F_Z);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
}
-void h8_device::set_nzv32(UINT32 v)
+void h8_device::set_nzv32(uint32_t v)
{
CCR &= ~(F_N|F_V|F_Z);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
}
-void h8_device::set_nz16(UINT16 v)
+void h8_device::set_nz16(uint16_t v)
{
CCR &= ~(F_N|F_Z);
if(!v)
CCR |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
CCR |= F_N;
}
-void h8_device::set_nz32(UINT32 v)
+void h8_device::set_nz32(uint32_t v)
{
CCR &= ~(F_N|F_Z);
if(!v)
CCR |= F_Z;
- else if(INT32(v) < 0)
+ else if(int32_t(v) < 0)
CCR |= F_N;
}
diff --git a/src/devices/cpu/h8/h8.h b/src/devices/cpu/h8/h8.h
index be466fae2d2..8a106ed852d 100644
--- a/src/devices/cpu/h8/h8.h
+++ b/src/devices/cpu/h8/h8.h
@@ -61,7 +61,7 @@ public:
STATE_DTC_WRITEBACK = 0x10006
};
- h8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool mode_a16, address_map_delegate map_delegate);
+ h8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, bool mode_a16, address_map_delegate map_delegate);
void internal_update();
void set_irq(int irq_vector, int irq_level, bool irq_nmi);
@@ -74,8 +74,8 @@ public:
protected:
struct disasm_entry {
int slot;
- UINT32 val, mask;
- UINT16 val0, mask0;
+ uint32_t val, mask;
+ uint16_t val0, mask0;
const char *opcode;
int am1, am2;
offs_t flags;
@@ -159,9 +159,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
// device_memory_interface overrides
@@ -173,9 +173,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config program_config, io_config;
address_space *program, *io;
@@ -185,18 +185,18 @@ protected:
h8_dma_state *current_dma;
h8_dtc_state *current_dtc;
- UINT32 PPC; /* previous program counter */
- UINT32 NPC; /* next start-of-instruction program counter */
- UINT32 PC; /* program counter */
- UINT16 PIR; /* Prefetched word */
- UINT16 IR[5]; /* Fetched instruction */
- UINT16 R[16]; /* Rn (0-7), En (8-15, h8-300h+) */
- UINT8 EXR; /* Interrupt/trace register (h8s/2000+) */
- UINT8 CCR; /* Condition-code register */
- INT64 MAC; /* Multiply accumulator (h8s/2600+) */
- UINT8 MACF; /* MAC flags (h8s/2600+) */
- UINT32 TMP1, TMP2;
- UINT32 TMPR; /* For debugger ER register import */
+ uint32_t PPC; /* previous program counter */
+ uint32_t NPC; /* next start-of-instruction program counter */
+ uint32_t PC; /* program counter */
+ uint16_t PIR; /* Prefetched word */
+ uint16_t IR[5]; /* Fetched instruction */
+ uint16_t R[16]; /* Rn (0-7), En (8-15, h8-300h+) */
+ uint8_t EXR; /* Interrupt/trace register (h8s/2000+) */
+ uint8_t CCR; /* Condition-code register */
+ int64_t MAC; /* Multiply accumulator (h8s/2600+) */
+ uint8_t MACF; /* MAC flags (h8s/2600+) */
+ uint32_t TMP1, TMP2;
+ uint32_t TMPR; /* For debugger ER register import */
bool has_exr, has_trace, supports_advanced, mode_advanced, mac_saturating;
@@ -208,137 +208,137 @@ protected:
static const disasm_entry disasm_entries[];
- offs_t disassemble_generic(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options, const disasm_entry *table);
- void disassemble_am(char *&buffer, int am, offs_t pc, const UINT8 *oprom, UINT32 opcode, int slot, int offset);
+ offs_t disassemble_generic(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options, const disasm_entry *table);
+ void disassemble_am(char *&buffer, int am, offs_t pc, const uint8_t *oprom, uint32_t opcode, int slot, int offset);
virtual void do_exec_full();
virtual void do_exec_partial();
- static void add_event(UINT64 &event_time, UINT64 new_event);
+ static void add_event(uint64_t &event_time, uint64_t new_event);
virtual bool exr_in_stack() const;
virtual void update_irq_filter() = 0;
virtual void interrupt_taken() = 0;
- virtual void internal_update(UINT64 current_time) = 0;
- void recompute_bcount(UINT64 event_time);
+ virtual void internal_update(uint64_t current_time) = 0;
+ void recompute_bcount(uint64_t event_time);
virtual int trace_setup();
virtual int trapa_setup();
virtual void irq_setup() = 0;
- UINT16 read16i(UINT32 adr);
- UINT16 fetch();
+ uint16_t read16i(uint32_t adr);
+ uint16_t fetch();
inline void fetch(int slot) { IR[slot] = fetch(); }
- UINT8 read8(UINT32 adr);
- void write8(UINT32 adr, UINT8 data);
- UINT16 read16(UINT32 adr);
- void write16(UINT32 adr, UINT16 data);
+ uint8_t read8(uint32_t adr);
+ void write8(uint32_t adr, uint8_t data);
+ uint16_t read16(uint32_t adr);
+ void write16(uint32_t adr, uint16_t data);
void internal(int cycles);
inline void prefetch() { prefetch_start(); prefetch_done(); }
inline void prefetch_noirq() { prefetch_start(); prefetch_done_noirq(); }
inline void prefetch_noirq_notrace() { prefetch_start(); prefetch_done_noirq_notrace(); }
void prefetch_start() { NPC = PC; PIR = fetch(); }
- void prefetch_switch(UINT32 pc, UINT16 ir) { NPC = pc; PC = pc+2; PIR = ir; }
+ void prefetch_switch(uint32_t pc, uint16_t ir) { NPC = pc; PC = pc+2; PIR = ir; }
void prefetch_done();
void prefetch_done_noirq();
void prefetch_done_noirq_notrace();
void illegal();
- UINT8 do_addx8(UINT8 a, UINT8 b);
- UINT8 do_subx8(UINT8 a, UINT8 b);
+ uint8_t do_addx8(uint8_t a, uint8_t b);
+ uint8_t do_subx8(uint8_t a, uint8_t b);
- UINT8 do_inc8(UINT8 a, UINT8 b);
- UINT16 do_inc16(UINT16 a, UINT16 b);
- UINT32 do_inc32(UINT32 a, UINT32 b);
+ uint8_t do_inc8(uint8_t a, uint8_t b);
+ uint16_t do_inc16(uint16_t a, uint16_t b);
+ uint32_t do_inc32(uint32_t a, uint32_t b);
- UINT8 do_add8(UINT8 a, UINT8 b);
- UINT16 do_add16(UINT16 a, UINT16 b);
- UINT32 do_add32(UINT32 a, UINT32 b);
+ uint8_t do_add8(uint8_t a, uint8_t b);
+ uint16_t do_add16(uint16_t a, uint16_t b);
+ uint32_t do_add32(uint32_t a, uint32_t b);
- UINT8 do_dec8(UINT8 a, UINT8 b);
- UINT16 do_dec16(UINT16 a, UINT16 b);
- UINT32 do_dec32(UINT32 a, UINT32 b);
+ uint8_t do_dec8(uint8_t a, uint8_t b);
+ uint16_t do_dec16(uint16_t a, uint16_t b);
+ uint32_t do_dec32(uint32_t a, uint32_t b);
- UINT8 do_sub8(UINT8 a, UINT8 b);
- UINT16 do_sub16(UINT16 a, UINT16 b);
- UINT32 do_sub32(UINT32 a, UINT32 b);
+ uint8_t do_sub8(uint8_t a, uint8_t b);
+ uint16_t do_sub16(uint16_t a, uint16_t b);
+ uint32_t do_sub32(uint32_t a, uint32_t b);
- UINT8 do_shal8(UINT8 v);
- UINT16 do_shal16(UINT16 v);
- UINT32 do_shal32(UINT32 v);
+ uint8_t do_shal8(uint8_t v);
+ uint16_t do_shal16(uint16_t v);
+ uint32_t do_shal32(uint32_t v);
- UINT8 do_shar8(UINT8 v);
- UINT16 do_shar16(UINT16 v);
- UINT32 do_shar32(UINT32 v);
+ uint8_t do_shar8(uint8_t v);
+ uint16_t do_shar16(uint16_t v);
+ uint32_t do_shar32(uint32_t v);
- UINT8 do_shll8(UINT8 v);
- UINT16 do_shll16(UINT16 v);
- UINT32 do_shll32(UINT32 v);
+ uint8_t do_shll8(uint8_t v);
+ uint16_t do_shll16(uint16_t v);
+ uint32_t do_shll32(uint32_t v);
- UINT8 do_shlr8(UINT8 v);
- UINT16 do_shlr16(UINT16 v);
- UINT32 do_shlr32(UINT32 v);
+ uint8_t do_shlr8(uint8_t v);
+ uint16_t do_shlr16(uint16_t v);
+ uint32_t do_shlr32(uint32_t v);
- UINT8 do_rotl8(UINT8 v);
- UINT16 do_rotl16(UINT16 v);
- UINT32 do_rotl32(UINT32 v);
+ uint8_t do_rotl8(uint8_t v);
+ uint16_t do_rotl16(uint16_t v);
+ uint32_t do_rotl32(uint32_t v);
- UINT8 do_rotr8(UINT8 v);
- UINT16 do_rotr16(UINT16 v);
- UINT32 do_rotr32(UINT32 v);
+ uint8_t do_rotr8(uint8_t v);
+ uint16_t do_rotr16(uint16_t v);
+ uint32_t do_rotr32(uint32_t v);
- UINT8 do_rotxl8(UINT8 v);
- UINT16 do_rotxl16(UINT16 v);
- UINT32 do_rotxl32(UINT32 v);
+ uint8_t do_rotxl8(uint8_t v);
+ uint16_t do_rotxl16(uint16_t v);
+ uint32_t do_rotxl32(uint32_t v);
- UINT8 do_rotxr8(UINT8 v);
- UINT16 do_rotxr16(UINT16 v);
- UINT32 do_rotxr32(UINT32 v);
+ uint8_t do_rotxr8(uint8_t v);
+ uint16_t do_rotxr16(uint16_t v);
+ uint32_t do_rotxr32(uint32_t v);
- UINT8 do_shal2_8(UINT8 v);
- UINT16 do_shal2_16(UINT16 v);
- UINT32 do_shal2_32(UINT32 v);
+ uint8_t do_shal2_8(uint8_t v);
+ uint16_t do_shal2_16(uint16_t v);
+ uint32_t do_shal2_32(uint32_t v);
- UINT8 do_shar2_8(UINT8 v);
- UINT16 do_shar2_16(UINT16 v);
- UINT32 do_shar2_32(UINT32 v);
+ uint8_t do_shar2_8(uint8_t v);
+ uint16_t do_shar2_16(uint16_t v);
+ uint32_t do_shar2_32(uint32_t v);
- UINT8 do_shll2_8(UINT8 v);
- UINT16 do_shll2_16(UINT16 v);
- UINT32 do_shll2_32(UINT32 v);
+ uint8_t do_shll2_8(uint8_t v);
+ uint16_t do_shll2_16(uint16_t v);
+ uint32_t do_shll2_32(uint32_t v);
- UINT8 do_shlr2_8(UINT8 v);
- UINT16 do_shlr2_16(UINT16 v);
- UINT32 do_shlr2_32(UINT32 v);
+ uint8_t do_shlr2_8(uint8_t v);
+ uint16_t do_shlr2_16(uint16_t v);
+ uint32_t do_shlr2_32(uint32_t v);
- UINT8 do_rotl2_8(UINT8 v);
- UINT16 do_rotl2_16(UINT16 v);
- UINT32 do_rotl2_32(UINT32 v);
+ uint8_t do_rotl2_8(uint8_t v);
+ uint16_t do_rotl2_16(uint16_t v);
+ uint32_t do_rotl2_32(uint32_t v);
- UINT8 do_rotr2_8(UINT8 v);
- UINT16 do_rotr2_16(UINT16 v);
- UINT32 do_rotr2_32(UINT32 v);
+ uint8_t do_rotr2_8(uint8_t v);
+ uint16_t do_rotr2_16(uint16_t v);
+ uint32_t do_rotr2_32(uint32_t v);
- UINT8 do_rotxl2_8(UINT8 v);
- UINT16 do_rotxl2_16(UINT16 v);
- UINT32 do_rotxl2_32(UINT32 v);
+ uint8_t do_rotxl2_8(uint8_t v);
+ uint16_t do_rotxl2_16(uint16_t v);
+ uint32_t do_rotxl2_32(uint32_t v);
- UINT8 do_rotxr2_8(UINT8 v);
- UINT16 do_rotxr2_16(UINT16 v);
- UINT32 do_rotxr2_32(UINT32 v);
+ uint8_t do_rotxr2_8(uint8_t v);
+ uint16_t do_rotxr2_16(uint16_t v);
+ uint32_t do_rotxr2_32(uint32_t v);
- void set_nzv8(UINT8 v);
- void set_nzv16(UINT16 v);
- void set_nzv32(UINT32 v);
+ void set_nzv8(uint8_t v);
+ void set_nzv16(uint16_t v);
+ void set_nzv32(uint32_t v);
- void set_nz16(UINT16 v);
- void set_nz32(UINT32 v);
+ void set_nz16(uint16_t v);
+ void set_nz32(uint32_t v);
- inline void r8_w(int reg, UINT8 val) {
+ inline void r8_w(int reg, uint8_t val) {
if(reg & 8)
R[reg & 7] = (R[reg & 7] & 0xff00) | val;
else
R[reg & 7] = (R[reg & 7] & 0xff) | (val << 8);
}
- inline UINT8 r8_r(int reg) {
+ inline uint8_t r8_r(int reg) {
if(reg & 8)
return R[reg & 7];
else
@@ -353,8 +353,8 @@ protected:
// and the h8-300h is r32 of course, we have to be careful to mask
// in h8.lst there if the top bit is 1.
- inline void r16_w(int reg, UINT16 val) { R[reg & 0xf] = val; }
- inline UINT16 r16_r(int reg) { return R[reg & 0xf]; }
+ inline void r16_w(int reg, uint16_t val) { R[reg & 0xf] = val; }
+ inline uint16_t r16_r(int reg) { return R[reg & 0xf]; }
#define O(o) void o ## _full(); void o ## _partial()
O(add_b_imm8_r8u); O(add_b_r8h_r8l); O(add_w_imm16_r16l); O(add_w_r16h_r16l);
diff --git a/src/devices/cpu/h8/h8.lst b/src/devices/cpu/h8/h8.lst
index 4763ca6f2cc..600deb94c95 100644
--- a/src/devices/cpu/h8/h8.lst
+++ b/src/devices/cpu/h8/h8.lst
@@ -8,11 +8,11 @@ macro bxx_any %cond
prefetch_done();
macro bxx_8 %cond
- TMP1 = PC + INT8(IR[0]);
+ TMP1 = PC + int8_t(IR[0]);
bxx_any %cond
macro bxx_16 %cond
- TMP1 = PC + INT16(IR[1]);
+ TMP1 = PC + int16_t(IR[1]);
bxx_any %cond
macro bset %bit
@@ -187,7 +187,7 @@ macro jsr32 %opc %spreg
current_dma->dest += current_dma->incd;
current_dma->count--;
if(!current_dma->count) {
- UINT8 id = current_dma->id;
+ uint8_t id = current_dma->id;
current_dma = nullptr;
dma_device->count_done(id);
}
@@ -205,7 +205,7 @@ macro jsr32 %opc %spreg
current_dtc->dar = (current_dtc->dar & 0xff000000) | ((current_dtc->dar + current_dtc->incd) & 0x00ffffff);
current_dtc->count--;
if(!current_dtc->count) {
- UINT8 id = current_dtc->id;
+ uint8_t id = current_dtc->id;
current_dtc = nullptr;
dtc_device->count_done(id);
}
@@ -267,7 +267,7 @@ macro jsr32 %opc %spreg
01006b00 fffffff8 0 mov.l abs16 r32l h
prefetch_start();
- TMP2 = INT16(IR[2]);
+ TMP2 = int16_t(IR[2]);
TMP1 = read16(TMP2) << 16;
TMP1 |= read16(TMP2+2);
set_nzv32(TMP1);
@@ -286,7 +286,7 @@ macro jsr32 %opc %spreg
01006b80 fffffff8 0 mov.l r32l abs16 h
prefetch_start();
TMP1 = r32_r(IR[1]);
- TMP2 = INT16(IR[2]);
+ TMP2 = int16_t(IR[2]);
set_nzv32(TMP1);
write16(TMP2, TMP1 >> 16);
write16(TMP2+2, TMP1);
@@ -327,7 +327,7 @@ macro jsr32 %opc %spreg
01006f00 ffffff88 0 mov.l r32d16h r32l h
prefetch_start();
- TMP1 = r32_r(IR[1] >> 4) + INT16(IR[2]);
+ TMP1 = r32_r(IR[1] >> 4) + int16_t(IR[2]);
TMP2 = read16(TMP1) << 16;
TMP2 |= read16(TMP1+2);
set_nzv32(TMP2);
@@ -336,7 +336,7 @@ macro jsr32 %opc %spreg
01006f80 ffffff88 0 mov.l r32l r32d16h h
prefetch_start();
- TMP1 = r32_r(IR[1] >> 4) + INT16(IR[2]);
+ TMP1 = r32_r(IR[1] >> 4) + int16_t(IR[2]);
TMP2 = r32_r(IR[1]);
set_nzv32(TMP2);
write16(TMP1, TMP2 >> 16);
@@ -506,7 +506,7 @@ macro jsr32 %opc %spreg
01406b00 ffffffff 0 ldc.w abs16 ccr h
prefetch_start();
- TMP1 = INT16(IR[2]);
+ TMP1 = int16_t(IR[2]);
CCR = read16(TMP1) >> 8;
update_irq_filter();
prefetch_done_noirq();
@@ -520,7 +520,7 @@ macro jsr32 %opc %spreg
01406b80 ffffffff 0 stc.w ccr abs16 h
prefetch_start();
- TMP1 = INT16(IR[2]);
+ TMP1 = int16_t(IR[2]);
write16(TMP1, (CCR << 8) | CCR);
prefetch_done();
@@ -549,14 +549,14 @@ macro jsr32 %opc %spreg
01406f00 ffffff8f 0 ldc.w r32d16h ccr h
prefetch_start();
- TMP1 = r32_r(IR[1] >> 4) + INT16(IR[2]);
+ TMP1 = r32_r(IR[1] >> 4) + int16_t(IR[2]);
CCR = read16(TMP1) >> 8;
update_irq_filter();
prefetch_done_noirq();
01406f80 ffffff8f 0 stc.w ccr r32d16h h
prefetch_start();
- TMP1 = r32_r(IR[1] >> 4) + INT16(IR[2]);
+ TMP1 = r32_r(IR[1] >> 4) + int16_t(IR[2]);
write16(TMP1, (CCR << 8) | CCR);
prefetch_done();
@@ -593,7 +593,7 @@ macro jsr32 %opc %spreg
01416b00 ffffffff 0 ldc.w abs16 exr s20
prefetch_start();
- TMP1 = INT16(IR[2]);
+ TMP1 = int16_t(IR[2]);
EXR = (read16(TMP1) >> 8) | EXR_NC;
update_irq_filter();
prefetch_done_noirq();
@@ -607,7 +607,7 @@ macro jsr32 %opc %spreg
01416b80 ffffffff 0 stc.w exr abs16 s20
prefetch_start();
- TMP1 = INT16(IR[2]);
+ TMP1 = int16_t(IR[2]);
write16(TMP1, (EXR << 8) | EXR);
prefetch_done();
@@ -636,14 +636,14 @@ macro jsr32 %opc %spreg
01416f00 ffffff8f 0 ldc.w r32d16h exr s20
prefetch_start();
- TMP1 = r32_r(IR[1] >> 4) + INT16(IR[2]);
+ TMP1 = r32_r(IR[1] >> 4) + int16_t(IR[2]);
EXR = (read16(TMP1) >> 8) | EXR_NC;
update_irq_filter();
prefetch_done_noirq();
01416f80 ffffff8f 0 stc.w exr r32d16h s20
prefetch_start();
- TMP1 = r32_r(IR[1] >> 4) + INT16(IR[2]);
+ TMP1 = r32_r(IR[1] >> 4) + int16_t(IR[2]);
write16(TMP1, (EXR << 8) | EXR);
prefetch_done();
@@ -666,7 +666,7 @@ macro jsr32 %opc %spreg
r32_w(IR[1], r32_r(IR[1]) + 2);
TMP2 = read16(r32_r(IR[1] >> 4));
r32_w(IR[1] >> 4, r32_r(IR[1] >> 4) + 2);
- MAC += INT16(TMP1)*INT16(TMP2);
+ MAC += int16_t(TMP1)*int16_t(TMP2);
MACF &= ~(F_Z|F_N);
if(MAC)
MACF |= F_Z;
@@ -707,7 +707,7 @@ macro jsr32 %opc %spreg
01c05000 ffffff00 0 mulxs.b r8h r16l h
prefetch_start();
- TMP1 = INT8(r16_r(IR[1])) * INT8(r8_r(IR[1] >> 4));
+ TMP1 = int8_t(r16_r(IR[1])) * int8_t(r8_r(IR[1] >> 4));
set_nz16(TMP1);
r16_w(IR[1], TMP1);
internal(2);
@@ -715,7 +715,7 @@ macro jsr32 %opc %spreg
01c05200 ffffff08 0 mulxs.w r16h r32l h
prefetch_start();
- TMP1 = INT16(r32_r(IR[1])) * INT16(r16_r(IR[1] >> 4));
+ TMP1 = int16_t(r32_r(IR[1])) * int16_t(r16_r(IR[1] >> 4));
set_nz32(TMP1);
r32_w(IR[1], TMP1);
internal(3);
@@ -724,8 +724,8 @@ macro jsr32 %opc %spreg
01d05100 ffffff00 0 divxs.b r8h r16l h
prefetch_start();
internal(11);
- TMP1 = INT16(r16_r(IR[1]));
- TMP2 = INT8(r8_r(IR[1] >> 4));
+ TMP1 = int16_t(r16_r(IR[1]));
+ TMP2 = int8_t(r8_r(IR[1] >> 4));
CCR &= ~(F_Z|F_N);
if(!TMP2) {
CCR |= F_Z;
@@ -774,7 +774,7 @@ macro jsr32 %opc %spreg
prefetch_start();
internal(19);
TMP1 = r32_r(IR[1]);
- TMP2 = INT16(r16_r(IR[1] >> 4));
+ TMP2 = int16_t(r16_r(IR[1] >> 4));
CCR &= ~(F_Z|F_N);
if(!TMP2) {
CCR |= F_Z;
@@ -881,7 +881,7 @@ macro jsr32 %opc %spreg
TMP1 |= 0xfffffc00;
else
TMP1 &= ~0xfffffc00;
- MAC = (MAC & 0x00000000ffffffffULL) | (UINT64(TMP1) << 32);
+ MAC = (MAC & 0x00000000ffffffffULL) | (uint64_t(TMP1) << 32);
MACF &= ~F_V;
prefetch_done();
@@ -1245,7 +1245,7 @@ macro jsr32 %opc %spreg
1750 fff0 0 extu.w r16l - h
CCR &= ~(F_N|F_Z|F_V);
- TMP1 = UINT8(r16_r(IR[0]));
+ TMP1 = uint8_t(r16_r(IR[0]));
if(!TMP1)
CCR |= F_Z;
r16_w(IR[0], TMP1);
@@ -1253,7 +1253,7 @@ macro jsr32 %opc %spreg
1770 fff8 0 extu.l r32l - h
CCR &= ~(F_N|F_Z|F_V);
- TMP1 = UINT16(r32_r(IR[0]));
+ TMP1 = uint16_t(r32_r(IR[0]));
if(!TMP1)
CCR |= F_Z;
r32_w(IR[0], TMP1);
@@ -1273,7 +1273,7 @@ macro jsr32 %opc %spreg
17d0 fff0 0 exts.w r16l - h
CCR &= ~(F_N|F_Z|F_V);
- TMP1 = INT8(r16_r(IR[0]));
+ TMP1 = int8_t(r16_r(IR[0]));
if(!TMP1)
CCR |= F_Z;
r16_w(IR[0], TMP1);
@@ -1281,7 +1281,7 @@ macro jsr32 %opc %spreg
17f0 fff8 0 exts.l r32l - h
CCR &= ~(F_N|F_Z|F_V);
- TMP1 = INT16(r32_r(IR[0]));
+ TMP1 = int16_t(r32_r(IR[0]));
if(!TMP1)
CCR |= F_Z;
r32_w(IR[0], TMP1);
@@ -1443,7 +1443,7 @@ macro jsr32 %opc %spreg
5000 ff00 0 mulxu.b r8h r16l
prefetch_start();
- r16_w(IR[0], UINT8(r16_r(IR[0])) * r8_r(IR[0] >> 4));
+ r16_w(IR[0], uint8_t(r16_r(IR[0])) * r8_r(IR[0] >> 4));
internal(2);
prefetch_done();
@@ -1466,7 +1466,7 @@ macro jsr32 %opc %spreg
5200 ff08 0 mulxu.w r16h r32l h
prefetch_start();
- r32_w(IR[0], UINT16(r32_r(IR[0])) * r16_r(IR[0] >> 4));
+ r32_w(IR[0], uint16_t(r32_r(IR[0])) * r16_r(IR[0] >> 4));
internal(3);
prefetch_done();
@@ -1513,12 +1513,12 @@ macro jsr32 %opc %spreg
5500 ff00 0 bsr rel8 - o
TMP2 = PC;
- PC += INT8(IR[0]);
+ PC += int8_t(IR[0]);
jsr16 TMP2 TMP1
5500 ff00 0 bsr rel8 - h
TMP2 = PC;
- PC += INT8(IR[0]);
+ PC += int8_t(IR[0]);
jsr32 TMP2 TMP1
5670 ffff 0 rte - - o
@@ -1664,7 +1664,7 @@ macro jsr32 %opc %spreg
5c00 ffff 0 bsr rel16 - h
internal(1);
TMP2 = PC;
- PC += INT16(IR[1]);
+ PC += int16_t(IR[1]);
jsr32 TMP2 TMP1
5d00 ff8f 0 jsr r16h - o
@@ -1818,73 +1818,73 @@ macro jsr32 %opc %spreg
6a00 fff0 0 mov.b abs16 r8l
prefetch_start();
- TMP1 = read8(INT16(IR[1]));
+ TMP1 = read8(int16_t(IR[1]));
set_nzv8(TMP1);
r8_w(IR[0], TMP1);
prefetch_done();
6a106300 ffffff0f 1 btst r8h abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
btst r8_r(IR[2] >> 4)
prefetch();
6a107300 ffffff8f 1 btst imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
btst IR[2] >> 4
prefetch();
6a107400 ffffff8f 1 bor imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
bor IR[2] >> 4
prefetch();
6a107480 ffffff8f 1 bior imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
bior IR[2] >> 4
prefetch();
6a107500 ffffff8f 1 bxor imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
bxor IR[2] >> 4
prefetch();
6a107580 ffffff8f 1 bixor imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
bixor IR[2] >> 4
prefetch();
6a107600 ffffff8f 1 band imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
band IR[2] >> 4
prefetch();
6a107680 ffffff8f 1 biand imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
biand IR[2] >> 4
prefetch();
6a107700 ffffff8f 1 bld imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
bld IR[2] >> 4
prefetch();
6a107780 ffffff8f 1 bild imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
bild IR[2] >> 4
prefetch();
6a186000 ffffff0f 1 bset r8h abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
prefetch_start();
bset r8_r(IR[2] >> 4)
@@ -1892,7 +1892,7 @@ macro jsr32 %opc %spreg
prefetch_done();
6a186100 ffffff0f 1 bnot r8h abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
prefetch_start();
bnot r8_r(IR[2] >> 4)
@@ -1900,7 +1900,7 @@ macro jsr32 %opc %spreg
prefetch_done();
6a186200 ffffff0f 1 bclr r8h abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
prefetch_start();
bclr r8_r(IR[2] >> 4)
@@ -1908,7 +1908,7 @@ macro jsr32 %opc %spreg
prefetch_done();
6a186700 ffffff8f 1 bst imm3 abs16
- TMP2 = INT16(IR[2]);
+ TMP2 = int16_t(IR[2]);
TMP1 = read8(TMP2);
prefetch_start();
bst IR[2] >> 4
@@ -1916,7 +1916,7 @@ macro jsr32 %opc %spreg
prefetch_done();
6a186780 ffffff8f 1 bist imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
prefetch_start();
bist IR[2] >> 4
@@ -1924,7 +1924,7 @@ macro jsr32 %opc %spreg
prefetch_done();
6a187000 ffffff8f 1 bset imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
prefetch_start();
bset IR[2] >> 4
@@ -1932,7 +1932,7 @@ macro jsr32 %opc %spreg
prefetch_done();
6a187100 ffffff8f 1 bnot imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
prefetch_start();
bnot IR[2] >> 4
@@ -1940,7 +1940,7 @@ macro jsr32 %opc %spreg
prefetch_done();
6a187200 ffffff8f 1 bclr imm3 abs16
- TMP2 = INT16(IR[1]);
+ TMP2 = int16_t(IR[1]);
TMP1 = read8(TMP2);
prefetch_start();
bclr IR[2] >> 4
@@ -2083,7 +2083,7 @@ macro jsr32 %opc %spreg
prefetch_start();
TMP1 = r8_r(IR[0]);
set_nzv8(TMP1);
- write8(INT16(IR[1]), TMP1);
+ write8(int16_t(IR[1]), TMP1);
prefetch_done();
6aa0 fff0 0 mov.b r8l abs32 h
@@ -2096,7 +2096,7 @@ macro jsr32 %opc %spreg
6ac0 fff0 0 movtpe r8l abs16
6b00 fff0 0 mov.w abs16 r16l
prefetch_start();
- TMP1 = read16(INT16(IR[1]));
+ TMP1 = read16(int16_t(IR[1]));
set_nzv16(TMP1);
r16_w(IR[0], TMP1);
prefetch_done();
@@ -2112,7 +2112,7 @@ macro jsr32 %opc %spreg
prefetch_start();
TMP1 = r16_r(IR[0]);
set_nzv16(TMP1);
- write16(INT16(IR[1]), TMP1);
+ write16(int16_t(IR[1]), TMP1);
prefetch_done();
6ba0 fff0 0 mov.w r16l abs32 h
@@ -2212,7 +2212,7 @@ macro jsr32 %opc %spreg
6e00 ff80 0 mov.b r16d16h r8l o
prefetch_start();
- TMP1 = UINT16(r16_r(IR[0] >> 4) + IR[1]);
+ TMP1 = uint16_t(r16_r(IR[0] >> 4) + IR[1]);
TMP2 = read8(TMP1);
set_nzv8(TMP2);
r8_w(IR[0], TMP2);
@@ -2220,7 +2220,7 @@ macro jsr32 %opc %spreg
6e00 ff80 0 mov.b r32d16h r8l h
prefetch_start();
- TMP1 = r32_r(IR[0] >> 4) + INT16(IR[1]);
+ TMP1 = r32_r(IR[0] >> 4) + int16_t(IR[1]);
TMP2 = read8(TMP1);
set_nzv8(TMP2);
r8_w(IR[0], TMP2);
@@ -2228,7 +2228,7 @@ macro jsr32 %opc %spreg
6e80 ff80 0 mov.b r8l r16d16h o
prefetch_start();
- TMP1 = UINT16(r16_r((IR[0] >> 4) & 7) + IR[1]);
+ TMP1 = uint16_t(r16_r((IR[0] >> 4) & 7) + IR[1]);
TMP2 = r8_r(IR[0]);
set_nzv8(TMP2);
write8(TMP1, TMP2);
@@ -2236,7 +2236,7 @@ macro jsr32 %opc %spreg
6e80 ff80 0 mov.b r8l r32d16h h
prefetch_start();
- TMP1 = r32_r(IR[0] >> 4) + INT16(IR[1]);
+ TMP1 = r32_r(IR[0] >> 4) + int16_t(IR[1]);
TMP2 = r8_r(IR[0]);
set_nzv8(TMP2);
write8(TMP1, TMP2);
@@ -2244,7 +2244,7 @@ macro jsr32 %opc %spreg
6f00 ff80 0 mov.w r16d16h r16l o
prefetch_start();
- TMP1 = UINT16(r16_r(IR[0] >> 4) + IR[1]);
+ TMP1 = uint16_t(r16_r(IR[0] >> 4) + IR[1]);
TMP2 = read16(TMP1);
set_nzv16(TMP2);
r16_w(IR[0], TMP2);
@@ -2252,7 +2252,7 @@ macro jsr32 %opc %spreg
6f00 ff80 0 mov.w r32d16h r16l h
prefetch_start();
- TMP1 = r32_r(IR[0] >> 4) + INT16(IR[1]);
+ TMP1 = r32_r(IR[0] >> 4) + int16_t(IR[1]);
TMP2 = read16(TMP1);
set_nzv16(TMP2);
r16_w(IR[0], TMP2);
@@ -2260,7 +2260,7 @@ macro jsr32 %opc %spreg
6f80 ff80 0 mov.w r16l r16d16h o
prefetch_start();
- TMP1 = UINT16(r16_r((IR[0] >> 4) & 7) + IR[1]);
+ TMP1 = uint16_t(r16_r((IR[0] >> 4) & 7) + IR[1]);
TMP2 = r16_r(IR[0]);
set_nzv16(TMP2);
write16(TMP1, TMP2);
@@ -2268,7 +2268,7 @@ macro jsr32 %opc %spreg
6f80 ff80 0 mov.w r16l r32d16h h
prefetch_start();
- TMP1 = r32_r(IR[0] >> 4) + INT16(IR[1]);
+ TMP1 = r32_r(IR[0] >> 4) + int16_t(IR[1]);
TMP2 = r16_r(IR[0]);
set_nzv16(TMP2);
write16(TMP1, TMP2);
diff --git a/src/devices/cpu/h8/h83002.cpp b/src/devices/cpu/h8/h83002.cpp
index 0b9a8036983..da976c31052 100644
--- a/src/devices/cpu/h8/h83002.cpp
+++ b/src/devices/cpu/h8/h83002.cpp
@@ -5,7 +5,7 @@
const device_type H83002 = &device_creator<h83002_device>;
-h83002_device::h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83002_device::h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8h_device(mconfig, H83002, "H8/3002", tag, owner, clock, "h83002", __FILE__, address_map_delegate(FUNC(h83002_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -185,9 +185,9 @@ void h83002_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h83002_device::internal_update(UINT64 current_time)
+void h83002_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
diff --git a/src/devices/cpu/h8/h83002.h b/src/devices/cpu/h8/h83002.h
index 64e38f43897..4f524c6f0b9 100644
--- a/src/devices/cpu/h8/h83002.h
+++ b/src/devices/cpu/h8/h83002.h
@@ -24,7 +24,7 @@
class h83002_device : public h8h_device {
public:
- h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(syscr_r);
DECLARE_WRITE8_MEMBER(syscr_w);
@@ -49,13 +49,13 @@ protected:
required_device<h8_sci_device> sci1;
required_device<h8_watchdog_device> watchdog;
- UINT8 syscr;
+ uint8_t syscr;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
diff --git a/src/devices/cpu/h8/h83006.cpp b/src/devices/cpu/h8/h83006.cpp
index 04c51cd720c..fd0ed7cc9dc 100644
--- a/src/devices/cpu/h8/h83006.cpp
+++ b/src/devices/cpu/h8/h83006.cpp
@@ -7,7 +7,7 @@ const device_type H83006 = &device_creator<h83006_device>;
const device_type H83007 = &device_creator<h83007_device>;
-h83006_device::h83006_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h83006_device::h83006_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
h8h_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(h83006_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -35,7 +35,7 @@ h83006_device::h83006_device(const machine_config &mconfig, device_type type, co
ram_start = 0;
}
-h83006_device::h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83006_device::h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8h_device(mconfig, H83006, "H8/3006", tag, owner, clock, "h83006", __FILE__, address_map_delegate(FUNC(h83006_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -64,7 +64,7 @@ h83006_device::h83006_device(const machine_config &mconfig, const char *tag, dev
}
-h83007_device::h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83007_device::h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h83006_device(mconfig, H83007, "H8/3007", tag, owner, clock, "h83007", __FILE__)
{
ram_start = 0xffef20;
@@ -235,9 +235,9 @@ void h83006_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h83006_device::internal_update(UINT64 current_time)
+void h83006_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
diff --git a/src/devices/cpu/h8/h83006.h b/src/devices/cpu/h8/h83006.h
index 34427c94644..9b73d54d1fe 100644
--- a/src/devices/cpu/h8/h83006.h
+++ b/src/devices/cpu/h8/h83006.h
@@ -25,8 +25,8 @@
class h83006_device : public h8h_device {
public:
- h83006_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
- h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83006_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(syscr_r);
DECLARE_WRITE8_MEMBER(syscr_w);
@@ -54,14 +54,14 @@ protected:
required_device<h8_sci_device> sci2;
required_device<h8_watchdog_device> watchdog;
- UINT8 syscr;
- UINT32 ram_start;
+ uint8_t syscr;
+ uint32_t ram_start;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
@@ -73,7 +73,7 @@ protected:
class h83007_device : public h83006_device {
public:
- h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type H83006;
diff --git a/src/devices/cpu/h8/h83008.cpp b/src/devices/cpu/h8/h83008.cpp
index abc7d49ec97..c6462944420 100644
--- a/src/devices/cpu/h8/h83008.cpp
+++ b/src/devices/cpu/h8/h83008.cpp
@@ -5,7 +5,7 @@
const device_type H83008 = &device_creator<h83008_device>;
-h83008_device::h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83008_device::h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8h_device(mconfig, H83008, "H8/3008", tag, owner, clock, "h83008", __FILE__, address_map_delegate(FUNC(h83008_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -188,9 +188,9 @@ void h83008_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h83008_device::internal_update(UINT64 current_time)
+void h83008_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
diff --git a/src/devices/cpu/h8/h83008.h b/src/devices/cpu/h8/h83008.h
index e3f9a50054d..8a24631ee90 100644
--- a/src/devices/cpu/h8/h83008.h
+++ b/src/devices/cpu/h8/h83008.h
@@ -25,7 +25,7 @@
class h83008_device : public h8h_device {
public:
- h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(syscr_r);
DECLARE_WRITE8_MEMBER(syscr_w);
@@ -52,13 +52,13 @@ protected:
required_device<h8_sci_device> sci1;
required_device<h8_watchdog_device> watchdog;
- UINT8 syscr;
+ uint8_t syscr;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
diff --git a/src/devices/cpu/h8/h83048.cpp b/src/devices/cpu/h8/h83048.cpp
index 9fb781d465f..0689072e9aa 100644
--- a/src/devices/cpu/h8/h83048.cpp
+++ b/src/devices/cpu/h8/h83048.cpp
@@ -8,7 +8,7 @@ const device_type H83045 = &device_creator<h83045_device>;
const device_type H83047 = &device_creator<h83047_device>;
const device_type H83048 = &device_creator<h83048_device>;
-h83048_device::h83048_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h83048_device::h83048_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
h8h_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(h83048_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -37,7 +37,7 @@ h83048_device::h83048_device(const machine_config &mconfig, device_type type, co
syscr = 0;
}
-h83048_device::h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83048_device::h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8h_device(mconfig, H83048, "H8/3048", tag, owner, clock, "h83048", __FILE__, address_map_delegate(FUNC(h83048_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -66,19 +66,19 @@ h83048_device::h83048_device(const machine_config &mconfig, const char *tag, dev
ram_start = 0xffef10;
}
-h83044_device::h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83044_device::h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h83048_device(mconfig, H83044, "H8/3044", tag, owner, clock, "h83044", __FILE__)
{
ram_start = 0xfff710;
}
-h83045_device::h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83045_device::h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h83048_device(mconfig, H83045, "H8/3045", tag, owner, clock, "h83045", __FILE__)
{
ram_start = 0xfff710;
}
-h83047_device::h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83047_device::h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h83048_device(mconfig, H83047, "H8/3047", tag, owner, clock, "h83047", __FILE__)
{
ram_start = 0xffef10;
@@ -255,9 +255,9 @@ void h83048_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h83048_device::internal_update(UINT64 current_time)
+void h83048_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
diff --git a/src/devices/cpu/h8/h83048.h b/src/devices/cpu/h8/h83048.h
index 34cb2358f3b..367313290fc 100644
--- a/src/devices/cpu/h8/h83048.h
+++ b/src/devices/cpu/h8/h83048.h
@@ -32,8 +32,8 @@
class h83048_device : public h8h_device {
public:
- h83048_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
- h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83048_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(syscr_r);
DECLARE_WRITE8_MEMBER(syscr_w);
@@ -62,14 +62,14 @@ protected:
required_device<h8_sci_device> sci1;
required_device<h8_watchdog_device> watchdog;
- UINT32 ram_start;
- UINT8 syscr;
+ uint32_t ram_start;
+ uint8_t syscr;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
@@ -80,17 +80,17 @@ protected:
class h83044_device : public h83048_device {
public:
- h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h83045_device : public h83048_device {
public:
- h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h83047_device : public h83048_device {
public:
- h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type H83044;
diff --git a/src/devices/cpu/h8/h83337.cpp b/src/devices/cpu/h8/h83337.cpp
index b325fc75496..8f1eeb57451 100644
--- a/src/devices/cpu/h8/h83337.cpp
+++ b/src/devices/cpu/h8/h83337.cpp
@@ -8,7 +8,7 @@ const device_type H83336 = &device_creator<h83336_device>;
const device_type H83337 = &device_creator<h83337_device>;
-h83337_device::h83337_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h83337_device::h83337_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
h8_device(mconfig, type, name, tag, owner, clock, shortname, source, true, address_map_delegate(FUNC(h83337_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -33,7 +33,7 @@ h83337_device::h83337_device(const machine_config &mconfig, device_type type, co
ram_start = 0;
}
-h83337_device::h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83337_device::h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_device(mconfig, H83337, "H8/3337", tag, owner, clock, "h83337", __FILE__, true, address_map_delegate(FUNC(h83337_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -58,13 +58,13 @@ h83337_device::h83337_device(const machine_config &mconfig, const char *tag, dev
ram_start = 0xf780;
}
-h83334_device::h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83334_device::h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h83337_device(mconfig, H83334, "H8/3334", tag, owner, clock, "h83334", __FILE__)
{
ram_start = 0xfb80;
}
-h83336_device::h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h83336_device::h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h83337_device(mconfig, H83336, "H8/3336", tag, owner, clock, "h83336", __FILE__)
{
ram_start = 0xf780;
@@ -185,9 +185,9 @@ void h83337_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h83337_device::internal_update(UINT64 current_time)
+void h83337_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
diff --git a/src/devices/cpu/h8/h83337.h b/src/devices/cpu/h8/h83337.h
index 9862ca00347..f5a66409335 100644
--- a/src/devices/cpu/h8/h83337.h
+++ b/src/devices/cpu/h8/h83337.h
@@ -32,8 +32,8 @@
class h83337_device : public h8_device {
public:
- h83337_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
- h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83337_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(wscr_r);
DECLARE_WRITE8_MEMBER(wscr_w);
@@ -64,13 +64,13 @@ protected:
required_device<h8_sci_device> sci1;
required_device<h8_watchdog_device> watchdog;
- UINT8 syscr;
- UINT32 ram_start;
+ uint8_t syscr;
+ uint32_t ram_start;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
@@ -81,12 +81,12 @@ protected:
class h83334_device : public h83337_device {
public:
- h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h83336_device : public h83337_device {
public:
- h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type H83334;
diff --git a/src/devices/cpu/h8/h8_adc.cpp b/src/devices/cpu/h8/h8_adc.cpp
index 809e4d101d5..7a153253e10 100644
--- a/src/devices/cpu/h8/h8_adc.cpp
+++ b/src/devices/cpu/h8/h8_adc.cpp
@@ -15,7 +15,7 @@ const device_type H8_ADC_2320 = &device_creator<h8_adc_2320_device>;
const device_type H8_ADC_2357 = &device_creator<h8_adc_2357_device>;
const device_type H8_ADC_2655 = &device_creator<h8_adc_2655_device>;
-h8_adc_device::h8_adc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8_adc_device::h8_adc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
cpu(*this, DEVICE_SELF_OWNER), intc(nullptr), io(nullptr), intc_tag(nullptr), intc_vector(0), adcsr(0), adcr(0), register_mask(0), trigger(0), start_mode(0), start_channel(0),
end_channel(0), start_count(0), mode(0), channel(0), count(0), analog_powered(false), adtrg(false), next_event(0)
@@ -57,7 +57,7 @@ READ8_MEMBER(h8_adc_device::adcr_r)
WRITE8_MEMBER(h8_adc_device::adcsr_w)
{
if(V>=1) logerror("adcsr_w %02x\n", data);
- UINT8 prev = adcsr;
+ uint8_t prev = adcsr;
adcsr = (data & 0x7f) | (adcsr & data & F_ADF);
mode_update();
if((prev & F_ADF) && !(adcsr & F_ADF)) {
@@ -146,7 +146,7 @@ void h8_adc_device::done()
analog_powered = false;
}
-UINT64 h8_adc_device::internal_update(UINT64 current_time)
+uint64_t h8_adc_device::internal_update(uint64_t current_time)
{
if(next_event && next_event <= current_time) {
next_event = 0;
@@ -155,7 +155,7 @@ UINT64 h8_adc_device::internal_update(UINT64 current_time)
return next_event;
}
-void h8_adc_device::conversion_wait(bool first, bool poweron, UINT64 current_time)
+void h8_adc_device::conversion_wait(bool first, bool poweron, uint64_t current_time)
{
if(current_time)
next_event = current_time + conversion_time(first, poweron);
@@ -199,7 +199,7 @@ void h8_adc_device::start_conversion()
analog_powered = true;
}
-void h8_adc_device::timeout(UINT64 current_time)
+void h8_adc_device::timeout(uint64_t current_time)
{
if(mode & BUFFER) {
do_buffering((mode & DUAL) && (channel & 1));
@@ -271,7 +271,7 @@ int h8_adc_device::get_channel_index(int count)
}
-h8_adc_3337_device::h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_adc_3337_device::h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_adc_device(mconfig, H8_ADC_3337, "H8 ADC 3337", tag, owner, clock, "h8_adc_3337", __FILE__)
{
register_mask = 3;
@@ -302,7 +302,7 @@ void h8_adc_3337_device::mode_update()
}
-h8_adc_3006_device::h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_adc_3006_device::h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_adc_device(mconfig, H8_ADC_3006, "H8 ADC 3006", tag, owner, clock, "h8_adc_3006", __FILE__)
{
register_mask = 3;
@@ -333,7 +333,7 @@ void h8_adc_3006_device::mode_update()
}
-h8_adc_2245_device::h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_adc_2245_device::h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_adc_device(mconfig, H8_ADC_2245, "H8 ADC 2245", tag, owner, clock, "h8_adc_2245", __FILE__)
{
register_mask = 3;
@@ -364,7 +364,7 @@ void h8_adc_2245_device::mode_update()
}
-h8_adc_2320_device::h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_adc_2320_device::h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_adc_device(mconfig, H8_ADC_2320, "H8 ADC 2320", tag, owner, clock, "h8_adc_2320", __FILE__)
{
register_mask = 3;
@@ -401,7 +401,7 @@ void h8_adc_2320_device::mode_update()
}
-h8_adc_2357_device::h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_adc_2357_device::h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_adc_device(mconfig, H8_ADC_2357, "H8 ADC 2357", tag, owner, clock, "h8_adc_2357", __FILE__)
{
register_mask = 3;
@@ -432,7 +432,7 @@ void h8_adc_2357_device::mode_update()
}
-h8_adc_2655_device::h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_adc_2655_device::h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_adc_device(mconfig, H8_ADC_2655, "H8 ADC 2655", tag, owner, clock, "h8_adc_2655", __FILE__)
{
suspend_on_interrupt = true;
diff --git a/src/devices/cpu/h8/h8_adc.h b/src/devices/cpu/h8/h8_adc.h
index 02e670ba144..ad87432517f 100644
--- a/src/devices/cpu/h8/h8_adc.h
+++ b/src/devices/cpu/h8/h8_adc.h
@@ -39,7 +39,7 @@
class h8_adc_device : public device_t {
public:
- h8_adc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ h8_adc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
void set_info(const char *intc_tag, int vect);
@@ -52,7 +52,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(adtrg_w);
void set_suspend(bool suspend);
- UINT64 internal_update(UINT64 current_time);
+ uint64_t internal_update(uint64_t current_time);
protected:
required_device<h8_device> cpu;
@@ -85,24 +85,24 @@ protected:
COUNTED = 64
};
- UINT16 addr[8], buf[2];
- UINT8 adcsr, adcr;
+ uint16_t addr[8], buf[2];
+ uint8_t adcsr, adcr;
int register_mask;
int trigger, start_mode, start_channel, end_channel, start_count;
bool suspend_on_interrupt, analog_power_control;
int mode, channel, count;
bool analog_powered, adtrg;
- UINT64 next_event;
+ uint64_t next_event;
virtual void device_start() override;
virtual void device_reset() override;
void sampling();
void start_conversion();
- void conversion_wait(bool first, bool poweron, UINT64 current_time = 0);
+ void conversion_wait(bool first, bool poweron, uint64_t current_time = 0);
void buffer_value(int port, int buffer = 0);
void commit_value(int reg, int buffer = 0);
- void timeout(UINT64 current_time);
+ void timeout(uint64_t current_time);
void done();
virtual int conversion_time(bool first, bool poweron) = 0;
@@ -113,7 +113,7 @@ protected:
class h8_adc_3337_device : public h8_adc_device {
public:
- h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual int conversion_time(bool first, bool poweron) override;
@@ -122,7 +122,7 @@ protected:
class h8_adc_3006_device : public h8_adc_device {
public:
- h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual int conversion_time(bool first, bool poweron) override;
@@ -131,7 +131,7 @@ protected:
class h8_adc_2245_device : public h8_adc_device {
public:
- h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual int conversion_time(bool first, bool poweron) override;
@@ -140,7 +140,7 @@ protected:
class h8_adc_2320_device : public h8_adc_device {
public:
- h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual int conversion_time(bool first, bool poweron) override;
@@ -149,7 +149,7 @@ protected:
class h8_adc_2357_device : public h8_adc_device {
public:
- h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual int conversion_time(bool first, bool poweron) override;
@@ -158,7 +158,7 @@ protected:
class h8_adc_2655_device : public h8_adc_device {
public:
- h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual int conversion_time(bool first, bool poweron) override;
diff --git a/src/devices/cpu/h8/h8_dma.cpp b/src/devices/cpu/h8/h8_dma.cpp
index fb907ffcef1..e3ce2ccc939 100644
--- a/src/devices/cpu/h8/h8_dma.cpp
+++ b/src/devices/cpu/h8/h8_dma.cpp
@@ -4,7 +4,7 @@
const device_type H8_DMA = &device_creator<h8_dma_device>;
const device_type H8_DMA_CHANNEL = &device_creator<h8_dma_channel_device>;
-h8_dma_device::h8_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_dma_device::h8_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_DMA, "H8 DMA controller", tag, owner, clock, "h8_dma", __FILE__),
dmach0(*this, "0"),
dmach1(*this, "1")
@@ -85,7 +85,7 @@ WRITE16_MEMBER(h8_dma_device::dmabcr_w)
-h8_dma_channel_device::h8_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_dma_channel_device::h8_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_DMA_CHANNEL, "H8 DMA channel", tag, owner, clock, "h8_dma_channel", __FILE__),
dmac(*this, "^"),
cpu(*this, "^^")
@@ -247,7 +247,7 @@ WRITE16_MEMBER(h8_dma_channel_device::dmacr_w)
start_test(-1);
}
-void h8_dma_channel_device::set_bcr(bool _fae, bool _sae, UINT8 _dta, UINT8 _dte, UINT8 _dtie)
+void h8_dma_channel_device::set_bcr(bool _fae, bool _sae, uint8_t _dta, uint8_t _dte, uint8_t _dtie)
{
fae = _fae;
sae = _sae;
@@ -291,7 +291,7 @@ void h8_dma_channel_device::start(int submodule)
state[submodule].dest = mar[1];
state[submodule].count = etcr[0] ? etcr[0] : 0x10000;
state[submodule].mode_16 = dmacr & 0x8000;
- INT32 step = state[submodule].mode_16 ? 2 : 1;
+ int32_t step = state[submodule].mode_16 ? 2 : 1;
state[submodule].incs = dmacr & 0x2000 ? dmacr & 0x4000 ? -step : step : 0;
state[submodule].incd = dmacr & 0x0020 ? dmacr & 0x0040 ? -step : step : 0;
cpu->set_current_dma(state + submodule);
diff --git a/src/devices/cpu/h8/h8_dma.h b/src/devices/cpu/h8/h8_dma.h
index c561f15aea8..7ffd415b2de 100644
--- a/src/devices/cpu/h8/h8_dma.h
+++ b/src/devices/cpu/h8/h8_dma.h
@@ -15,9 +15,9 @@
#include "h8_intc.h"
struct h8_dma_state {
- UINT32 source, dest;
- INT32 incs, incd;
- UINT32 count;
+ uint32_t source, dest;
+ int32_t incs, incd;
+ uint32_t count;
int id;
bool mode_16;
};
@@ -33,7 +33,7 @@ class h8_dma_channel_device;
class h8_dma_device : public device_t {
public:
- h8_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(dmawer_r);
DECLARE_WRITE8_MEMBER(dmawer_w);
@@ -52,8 +52,8 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
- UINT8 dmawer, dmatcr;
- UINT16 dmabcr;
+ uint8_t dmawer, dmatcr;
+ uint16_t dmabcr;
};
class h8_dma_channel_device : public device_t {
@@ -73,7 +73,7 @@ public:
MODE16_MEM_DACK
};
- h8_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_dma_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_info(const char *intc, int irq_base, int v0, int v1, int v2, int v3, int v4, int v5, int v6, int v7, int v8, int v9, int va, int vb, int vc, int vd, int ve, int vf);
@@ -97,7 +97,7 @@ public:
DECLARE_WRITE16_MEMBER(dmacr_w);
void set_id(int id);
- void set_bcr(bool fae, bool sae, UINT8 dta, UINT8 dte, UINT8 dtie);
+ void set_bcr(bool fae, bool sae, uint8_t dta, uint8_t dte, uint8_t dtie);
bool start_test(int vector);
void count_done(int submodule);
protected:
@@ -110,9 +110,9 @@ protected:
int activation_vectors[16];
- UINT32 mar[2];
- UINT16 ioar[2], etcr[2], dmacr;
- UINT8 dta, dte, dtie;
+ uint32_t mar[2];
+ uint16_t ioar[2], etcr[2], dmacr;
+ uint8_t dta, dte, dtie;
bool fae, sae;
virtual void device_start() override;
diff --git a/src/devices/cpu/h8/h8_dtc.cpp b/src/devices/cpu/h8/h8_dtc.cpp
index 2482b4b034c..117740cdd4b 100644
--- a/src/devices/cpu/h8/h8_dtc.cpp
+++ b/src/devices/cpu/h8/h8_dtc.cpp
@@ -24,7 +24,7 @@ const int h8_dtc_device::vector_to_enable[92] = {
-1, 40, 41, -1 // ERI2, RXI2, TXI2, TEI2
};
-h8_dtc_device::h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_dtc_device::h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_DTC, "H8 DTC controller", tag, owner, clock, "h8_dtc", __FILE__),
cpu(*this, DEVICE_SELF_OWNER)
{
@@ -45,7 +45,7 @@ void h8_dtc_device::device_reset()
{
memset(dtcer, 0x00, sizeof(dtcer));
memset(states, 0, sizeof(states));
- for(UINT8 i=0; i<sizeof(states)/sizeof(states[0]); i++)
+ for(uint8_t i=0; i<sizeof(states)/sizeof(states[0]); i++)
states[i].id = i;
dtvecr = 0x00;
cur_active_vector = -1;
@@ -125,11 +125,11 @@ void h8_dtc_device::vector_done(int vector)
waiting_vector.erase(wi);
h8_dtc_state *state = states + vector;
- UINT32 sra = state->sra;
- UINT32 dar = state->dar;
- UINT32 cr = state->cr;
+ uint32_t sra = state->sra;
+ uint32_t dar = state->dar;
+ uint32_t cr = state->cr;
- UINT32 mode = sra & 0x0c000000;
+ uint32_t mode = sra & 0x0c000000;
if(V>=1) logerror("regs at %08x sra=%08x dar=%08x cr=%08x %s mode\n", state->base, sra, dar, cr,
mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block");
state->incs = sra & 0x80000000 ?
diff --git a/src/devices/cpu/h8/h8_dtc.h b/src/devices/cpu/h8/h8_dtc.h
index cdccf42758a..d74f0ef3252 100644
--- a/src/devices/cpu/h8/h8_dtc.h
+++ b/src/devices/cpu/h8/h8_dtc.h
@@ -20,9 +20,9 @@
downcast<h8_dtc_device *>(device)->set_info(intc, irq);
struct h8_dtc_state {
- UINT32 base, sra, dar, cr;
- INT32 incs, incd;
- UINT32 count;
+ uint32_t base, sra, dar, cr;
+ int32_t incs, incd;
+ uint32_t count;
int id;
int next;
};
@@ -31,7 +31,7 @@ class h8_dtc_device : public device_t {
public:
enum { DTC_CHAINED = 1000 };
- h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_info(const char *intc, int irq);
DECLARE_READ8_MEMBER(dtcer_r);
@@ -43,7 +43,7 @@ public:
void count_done(int id);
inline h8_dtc_state *get_object(int vector) { return states + vector; }
- inline UINT32 get_vector_address(int vector) { return 0x400 | ((vector ? vector : dtvecr & 0x7f) << 1); }
+ inline uint32_t get_vector_address(int vector) { return 0x400 | ((vector ? vector : dtvecr & 0x7f) << 1); }
int get_waiting_vector();
int get_waiting_writeback();
void vector_done(int vector);
@@ -60,7 +60,7 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
- UINT8 dtcer[6], dtvecr;
+ uint8_t dtcer[6], dtvecr;
int cur_active_vector;
std::list<int> waiting_vector, waiting_writeback;
diff --git a/src/devices/cpu/h8/h8_intc.cpp b/src/devices/cpu/h8/h8_intc.cpp
index ad41b2cc2cd..d81d53ccfe7 100644
--- a/src/devices/cpu/h8/h8_intc.cpp
+++ b/src/devices/cpu/h8/h8_intc.cpp
@@ -7,7 +7,7 @@ const device_type H8_INTC = &device_creator<h8_intc_device>;
const device_type H8H_INTC = &device_creator<h8h_intc_device>;
const device_type H8S_INTC = &device_creator<h8s_intc_device>;
-h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_INTC, "H8 INTC", tag, owner, clock, "h8_intc", __FILE__),
cpu(*this, DEVICE_SELF_OWNER), nmi_input(false), irq_input(0), ier(0), isr(0), iscr(0), icr_filter(0), ipr_filter(0)
{
@@ -15,7 +15,7 @@ h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, d
irq_vector_nmi = 3;
}
-h8_intc_device::h8_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8_intc_device::h8_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source), irq_vector_base(0), irq_vector_nmi(0),
cpu(*this, DEVICE_SELF_OWNER), nmi_input(false), irq_input(0), ier(0), isr(0), iscr(0), icr_filter(0), ipr_filter(0)
{
@@ -193,14 +193,14 @@ void h8_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const
}
-h8h_intc_device::h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8h_intc_device::h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_intc_device(mconfig, H8H_INTC, "H8H INTC", tag, owner, clock, "h8h_intc", __FILE__)
{
irq_vector_base = 12;
irq_vector_nmi = 7;
}
-h8h_intc_device::h8h_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8h_intc_device::h8h_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
h8_intc_device(mconfig, type, name, tag, owner, clock, shortname, source)
{
}
@@ -319,7 +319,7 @@ void h8h_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const
icr_pri = (icr >> (slot ^ 7)) & 1;
}
-h8s_intc_device::h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s_intc_device::h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8h_intc_device(mconfig, H8S_INTC, "H8S INTC", tag, owner, clock, "h8s_intc", __FILE__)
{
irq_vector_base = 16;
diff --git a/src/devices/cpu/h8/h8_intc.h b/src/devices/cpu/h8/h8_intc.h
index b6a6da31af7..4b4b384b8b1 100644
--- a/src/devices/cpu/h8/h8_intc.h
+++ b/src/devices/cpu/h8/h8_intc.h
@@ -26,8 +26,8 @@
class h8_intc_device : public device_t {
public:
- h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- h8_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
int interrupt_taken(int vector);
void internal_interrupt(int vector);
@@ -48,13 +48,13 @@ protected:
required_device<h8_device> cpu;
- UINT32 pending_irqs[MAX_VECTORS/32];
+ uint32_t pending_irqs[MAX_VECTORS/32];
int irq_type[8];
bool nmi_input;
- UINT8 irq_input;
- UINT8 ier;
- UINT8 isr;
- UINT16 iscr;
+ uint8_t irq_input;
+ uint8_t ier;
+ uint8_t isr;
+ uint16_t iscr;
int icr_filter, ipr_filter;
virtual void device_start() override;
@@ -68,8 +68,8 @@ protected:
class h8h_intc_device : public h8_intc_device {
public:
- h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- h8h_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8h_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
DECLARE_READ8_MEMBER(isr_r);
DECLARE_WRITE8_MEMBER(isr_w);
@@ -85,7 +85,7 @@ public:
protected:
static const int vector_to_slot[];
- UINT32 icr;
+ uint32_t icr;
virtual void device_start() override;
virtual void device_reset() override;
@@ -96,7 +96,7 @@ protected:
class h8s_intc_device : public h8h_intc_device {
public:
- h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(ipr_r);
DECLARE_WRITE8_MEMBER(ipr_w);
@@ -104,7 +104,7 @@ public:
DECLARE_WRITE8_MEMBER(iprk_w);
private:
static const int vector_to_slot[];
- UINT8 ipr[11];
+ uint8_t ipr[11];
virtual void get_priority(int vect, int &icr_pri, int &ipr_pri) const override;
virtual void device_reset() override;
diff --git a/src/devices/cpu/h8/h8_port.cpp b/src/devices/cpu/h8/h8_port.cpp
index c610f0bde29..e319748d01a 100644
--- a/src/devices/cpu/h8/h8_port.cpp
+++ b/src/devices/cpu/h8/h8_port.cpp
@@ -5,13 +5,13 @@
const device_type H8_PORT = &device_creator<h8_port_device>;
-h8_port_device::h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_port_device::h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_PORT, "H8 digital port", tag, owner, clock, "h8_digital_port", __FILE__),
cpu(*this, DEVICE_SELF_OWNER), io(nullptr), address(0), default_ddr(0), ddr(0), pcr(0), odr(0), mask(0), dr(0), last_output(0)
{
}
-void h8_port_device::set_info(int _address, UINT8 _default_ddr, UINT8 _mask)
+void h8_port_device::set_info(int _address, uint8_t _default_ddr, uint8_t _mask)
{
address = 2*_address;
default_ddr = _default_ddr;
@@ -40,11 +40,11 @@ READ8_MEMBER(h8_port_device::dr_r)
READ8_MEMBER(h8_port_device::port_r)
{
- UINT8 res = mask | (dr & ddr);
- if((ddr & ~mask) != UINT8(~mask))
+ uint8_t res = mask | (dr & ddr);
+ if((ddr & ~mask) != uint8_t(~mask))
res |= io->read_word(address) & ~ddr;
- // logerror("port_r %02x (%02x %02x)\n", res, ddr & ~mask, UINT8(~mask));
+ // logerror("port_r %02x (%02x %02x)\n", res, ddr & ~mask, uint8_t(~mask));
return res;
}
@@ -74,7 +74,7 @@ READ8_MEMBER(h8_port_device::odr_r)
void h8_port_device::update_output()
{
- UINT8 res = dr & ddr & ~mask;
+ uint8_t res = dr & ddr & ~mask;
if(res != last_output) {
last_output = res;
io->write_word(address, res);
diff --git a/src/devices/cpu/h8/h8_port.h b/src/devices/cpu/h8/h8_port.h
index 3b1230f9d17..c6b7e8e2095 100644
--- a/src/devices/cpu/h8/h8_port.h
+++ b/src/devices/cpu/h8/h8_port.h
@@ -20,9 +20,9 @@
class h8_port_device : public device_t {
public:
- h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void set_info(int address, UINT8 default_ddr, UINT8 mask);
+ void set_info(int address, uint8_t default_ddr, uint8_t mask);
DECLARE_WRITE8_MEMBER(ddr_w);
DECLARE_WRITE8_MEMBER(dr_w);
@@ -38,10 +38,10 @@ protected:
address_space *io;
int address;
- UINT8 default_ddr, ddr, pcr, odr;
- UINT8 mask;
- UINT8 dr;
- UINT8 last_output;
+ uint8_t default_ddr, ddr, pcr, odr;
+ uint8_t mask;
+ uint8_t dr;
+ uint8_t last_output;
virtual void device_start() override;
virtual void device_reset() override;
diff --git a/src/devices/cpu/h8/h8_sci.cpp b/src/devices/cpu/h8/h8_sci.cpp
index 976e7546a9a..7a426ad65ec 100644
--- a/src/devices/cpu/h8/h8_sci.cpp
+++ b/src/devices/cpu/h8/h8_sci.cpp
@@ -15,7 +15,7 @@ const device_type H8_SCI = &device_creator<h8_sci_device>;
const char *const h8_sci_device::state_names[] = { "idle", "start", "bit", "parity", "stop", "last-tick" };
-h8_sci_device::h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_sci_device::h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_SCI, "H8 Serial Communications Interface", tag, owner, clock, "h8_sci", __FILE__),
cpu(*this, DEVICE_SELF_OWNER),
tx_cb(*this),
@@ -95,7 +95,7 @@ WRITE8_MEMBER(h8_sci_device::scr_w)
data & SCR_CKE,
cpu->pc());
- UINT8 delta = scr ^ data;
+ uint8_t delta = scr ^ data;
scr = data;
clock_update();
@@ -356,15 +356,15 @@ WRITE_LINE_MEMBER(h8_sci_device::clk_w)
}
}
-UINT64 h8_sci_device::internal_update(UINT64 current_time)
+uint64_t h8_sci_device::internal_update(uint64_t current_time)
{
- UINT64 event = 0;
+ uint64_t event = 0;
switch(clock_mode) {
case CLKM_INTERNAL_SYNC_OUT:
if(clock_state || !clock_value) {
- UINT64 fp = divider*2;
+ uint64_t fp = divider*2;
if(current_time >= clock_base) {
- UINT64 delta = current_time - clock_base;
+ uint64_t delta = current_time - clock_base;
if(delta >= fp) {
delta -= fp;
clock_base += fp;
@@ -392,9 +392,9 @@ UINT64 h8_sci_device::internal_update(UINT64 current_time)
case CLKM_INTERNAL_ASYNC:
case CLKM_INTERNAL_ASYNC_OUT:
if(clock_state || !clock_value) {
- UINT64 fp = divider*16;
+ uint64_t fp = divider*16;
if(current_time >= clock_base) {
- UINT64 delta = current_time - clock_base;
+ uint64_t delta = current_time - clock_base;
if(delta >= fp) {
delta -= fp;
clock_base += fp;
@@ -421,9 +421,9 @@ UINT64 h8_sci_device::internal_update(UINT64 current_time)
case CLKM_EXTERNAL_RATE_SYNC:
if(clock_state || !clock_value) {
- UINT64 ctime = UINT64(current_time*internal_to_external_ratio*2);
+ uint64_t ctime = uint64_t(current_time*internal_to_external_ratio*2);
if(ctime >= clock_base) {
- UINT64 delta = ctime - clock_base;
+ uint64_t delta = ctime - clock_base;
clock_base += delta & ~1;
delta &= 1;
bool new_clock = delta >= 1;
@@ -439,15 +439,15 @@ UINT64 h8_sci_device::internal_update(UINT64 current_time)
}
}
- event = UINT64((clock_base + (clock_value ? 2 : 1))*external_to_internal_ratio)+1;
+ event = uint64_t((clock_base + (clock_value ? 2 : 1))*external_to_internal_ratio)+1;
}
break;
case CLKM_EXTERNAL_RATE_ASYNC:
if(clock_state || !clock_value) {
- UINT64 ctime = UINT64(current_time*internal_to_external_ratio);
+ uint64_t ctime = uint64_t(current_time*internal_to_external_ratio);
if(ctime >= clock_base) {
- UINT64 delta = ctime - clock_base;
+ uint64_t delta = ctime - clock_base;
clock_base += delta & ~15;
delta &= 15;
bool new_clock = delta >= 8;
@@ -463,7 +463,7 @@ UINT64 h8_sci_device::internal_update(UINT64 current_time)
}
}
- event = UINT64((clock_base + (clock_value ? 16 : 8))*external_to_internal_ratio)+1;
+ event = uint64_t((clock_base + (clock_value ? 16 : 8))*external_to_internal_ratio)+1;
}
break;
@@ -503,13 +503,13 @@ void h8_sci_device::clock_start(int mode)
case CLKM_EXTERNAL_RATE_ASYNC:
if(V>=2) logerror("Simulating external clock async\n");
- clock_base = UINT64(cpu->total_cycles()*internal_to_external_ratio);
+ clock_base = uint64_t(cpu->total_cycles()*internal_to_external_ratio);
cpu->internal_update();
break;
case CLKM_EXTERNAL_RATE_SYNC:
if(V>=2) logerror("Simulating external clock sync\n");
- clock_base = UINT64(cpu->total_cycles()*2*internal_to_external_ratio);
+ clock_base = uint64_t(cpu->total_cycles()*2*internal_to_external_ratio);
cpu->internal_update();
break;
diff --git a/src/devices/cpu/h8/h8_sci.h b/src/devices/cpu/h8/h8_sci.h
index 285360afea1..1c3a79b0f39 100644
--- a/src/devices/cpu/h8/h8_sci.h
+++ b/src/devices/cpu/h8/h8_sci.h
@@ -30,7 +30,7 @@
class h8_sci_device : public device_t {
public:
- h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_info(const char *intc, int eri, int rxi, int txi, int tei);
void set_external_clock_period(const attotime &_period);
@@ -55,7 +55,7 @@ public:
template<class _Object> static devcb_base &set_tx_cb(device_t &device, _Object object) { return downcast<h8_sci_device &>(device).tx_cb.set_callback(object); }
template<class _Object> static devcb_base &set_clk_cb(device_t &device, _Object object) { return downcast<h8_sci_device &>(device).clk_cb.set_callback(object); }
- UINT64 internal_update(UINT64 current_time);
+ uint64_t internal_update(uint64_t current_time);
protected:
enum {
@@ -121,8 +121,8 @@ protected:
int tx_state, rx_state, tx_bit, rx_bit, clock_state, clock_mode, tx_parity, rx_parity, ext_clock_counter;
bool clock_value, ext_clock_value, rx_value;
- UINT8 rdr, tdr, smr, scr, ssr, brr, rsr, tsr;
- UINT64 clock_base, divider;
+ uint8_t rdr, tdr, smr, scr, ssr, brr, rsr, tsr;
+ uint64_t clock_base, divider;
std::string last_clock_message;
diff --git a/src/devices/cpu/h8/h8_timer16.cpp b/src/devices/cpu/h8/h8_timer16.cpp
index 796a26c0fef..2beb6d86c61 100644
--- a/src/devices/cpu/h8/h8_timer16.cpp
+++ b/src/devices/cpu/h8/h8_timer16.cpp
@@ -13,7 +13,7 @@ const device_type H8_TIMER16_CHANNEL = &device_creator<h8_timer16_channel_devic
const device_type H8H_TIMER16_CHANNEL = &device_creator<h8h_timer16_channel_device>;
const device_type H8S_TIMER16_CHANNEL = &device_creator<h8s_timer16_channel_device>;
-h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_TIMER16_CHANNEL, "H8 16-bits timer channel", tag, owner, clock, "h8_16bits_timer_channel", __FILE__),
cpu(*this, "^^"), chained_timer(nullptr), intc(nullptr), intc_tag(nullptr), tier_mask(0), tgr_count(0), tbr_count(0), tgr_clearing(0), tcr(0), tier(0), ier(0), isr(0), clock_type(0),
clock_divider(0), tcnt(0), last_clock_update(0), event_time(0), phase(0), counter_cycle(0), counter_incrementing(false), channel_active(false)
@@ -21,7 +21,7 @@ h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconf
chain_tag = nullptr;
}
-h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
cpu(*this, "^^"), chained_timer(nullptr), intc(nullptr), intc_tag(nullptr), tier_mask(0), tgr_count(0), tbr_count(0), tgr_clearing(0), tcr(0), tier(0), ier(0), isr(0), clock_type(0),
clock_divider(0), tcnt(0), last_clock_update(0), event_time(0), phase(0), counter_cycle(0), counter_incrementing(false), channel_active(false)
@@ -77,7 +77,7 @@ WRITE8_MEMBER(h8_timer16_channel_device::tior_w)
if(V>=1) logerror("tior_w %d, %02x\n", offset, data);
}
-void h8_timer16_channel_device::set_ier(UINT8 value)
+void h8_timer16_channel_device::set_ier(uint8_t value)
{
update_counter();
ier = value;
@@ -204,7 +204,7 @@ void h8_timer16_channel_device::device_reset()
counter_incrementing = true;
}
-UINT64 h8_timer16_channel_device::internal_update(UINT64 current_time)
+uint64_t h8_timer16_channel_device::internal_update(uint64_t current_time)
{
if(event_time && current_time >= event_time) {
update_counter(current_time);
@@ -214,7 +214,7 @@ UINT64 h8_timer16_channel_device::internal_update(UINT64 current_time)
return event_time;
}
-void h8_timer16_channel_device::update_counter(UINT64 cur_time)
+void h8_timer16_channel_device::update_counter(uint64_t cur_time)
{
if(clock_type != DIV_1)
return;
@@ -227,8 +227,8 @@ void h8_timer16_channel_device::update_counter(UINT64 cur_time)
return;
}
- UINT64 base_time = last_clock_update;
- UINT64 new_time = cur_time;
+ uint64_t base_time = last_clock_update;
+ uint64_t new_time = cur_time;
if(clock_divider) {
base_time = (base_time + phase) >> clock_divider;
new_time = (new_time + phase) >> clock_divider;
@@ -251,7 +251,7 @@ void h8_timer16_channel_device::update_counter(UINT64 cur_time)
last_clock_update = cur_time;
}
-void h8_timer16_channel_device::recalc_event(UINT64 cur_time)
+void h8_timer16_channel_device::recalc_event(uint64_t cur_time)
{
if(!channel_active) {
event_time = 0;
@@ -259,7 +259,7 @@ void h8_timer16_channel_device::recalc_event(UINT64 cur_time)
}
bool update_cpu = cur_time == 0;
- UINT64 old_event_time = event_time;
+ uint64_t old_event_time = event_time;
if(clock_type != DIV_1) {
event_time = 0;
@@ -273,7 +273,7 @@ void h8_timer16_channel_device::recalc_event(UINT64 cur_time)
cur_time = cpu->total_cycles();
if(counter_incrementing) {
- UINT32 event_delay = 0xffffffff;
+ uint32_t event_delay = 0xffffffff;
if(tgr_clearing >= 0 && tgr[tgr_clearing])
counter_cycle = tgr[tgr_clearing];
else {
@@ -286,7 +286,7 @@ void h8_timer16_channel_device::recalc_event(UINT64 cur_time)
}
for(int i=0; i<tgr_count; i++)
if(ier & (1 << i)) {
- UINT32 new_delay = 0xffffffff;
+ uint32_t new_delay = 0xffffffff;
if(tgr[i] > tcnt) {
if(tcnt >= counter_cycle || tgr[i] <= counter_cycle)
new_delay = tgr[i] - tcnt;
@@ -315,13 +315,13 @@ void h8_timer16_channel_device::recalc_event(UINT64 cur_time)
cpu->internal_update();
}
-h8_timer16_device::h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_timer16_device::h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_TIMER16, "H8 16-bits timer", tag, owner, clock, "h8_timer16", __FILE__),
cpu(*this, DEVICE_SELF_OWNER)
{
}
-void h8_timer16_device::set_info(int count, UINT8 tstr)
+void h8_timer16_device::set_info(int count, uint8_t tstr)
{
timer_count = count;
default_tstr = tstr;
@@ -412,7 +412,7 @@ WRITE8_MEMBER(h8_timer16_device::tocr_w)
READ8_MEMBER(h8_timer16_device::tisr_r)
{
- UINT8 r = 0;
+ uint8_t r = 0;
for(int i=0; i<timer_count; i++)
r |= timer_channel[i]->tisr_r(offset) << i;
for(int i=timer_count; i<4; i++)
@@ -451,11 +451,11 @@ void h8_timer16_channel_device::tier_update()
{
}
-void h8_timer16_channel_device::isr_update(UINT8 val)
+void h8_timer16_channel_device::isr_update(uint8_t val)
{
}
-UINT8 h8_timer16_channel_device::isr_to_sr() const
+uint8_t h8_timer16_channel_device::isr_to_sr() const
{
return 0x00;
}
@@ -464,7 +464,7 @@ void h8_timer16_channel_device::tcr_update()
{
}
-void h8_timer16_channel_device::tisr_w(int offset, UINT8 value)
+void h8_timer16_channel_device::tisr_w(int offset, uint8_t value)
{
update_counter();
if(!(value & 0x01)) {
@@ -508,7 +508,7 @@ void h8_timer16_channel_device::tisr_w(int offset, UINT8 value)
recalc_event();
}
-UINT8 h8_timer16_channel_device::tisr_r(int offset) const
+uint8_t h8_timer16_channel_device::tisr_r(int offset) const
{
switch(offset) {
case 0:
@@ -521,7 +521,7 @@ UINT8 h8_timer16_channel_device::tisr_r(int offset) const
return 0x00;
}
-h8h_timer16_channel_device::h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8h_timer16_channel_device::h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_timer16_channel_device(mconfig, H8H_TIMER16_CHANNEL, "H8H 16-bits timer channel", tag, owner, clock, "h8h_16bits_timer_channel", __FILE__)
{
}
@@ -553,7 +553,7 @@ void h8h_timer16_channel_device::tier_update()
(tier & 0x04 ? IRQ_V : 0);
}
-void h8h_timer16_channel_device::isr_update(UINT8 val)
+void h8h_timer16_channel_device::isr_update(uint8_t val)
{
if(!(val & 1))
isr &= ~IRQ_A;
@@ -563,7 +563,7 @@ void h8h_timer16_channel_device::isr_update(UINT8 val)
isr &= ~IRQ_V;
}
-UINT8 h8h_timer16_channel_device::isr_to_sr() const
+uint8_t h8h_timer16_channel_device::isr_to_sr() const
{
return 0xf8 | (isr & IRQ_V ? 4 : 0) | (isr & IRQ_B ? 2 : 0) | (isr & IRQ_A ? 1 : 0);
}
@@ -619,7 +619,7 @@ void h8h_timer16_channel_device::tcr_update()
}
}
-h8s_timer16_channel_device::h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s_timer16_channel_device::h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_timer16_channel_device(mconfig, H8S_TIMER16_CHANNEL, "H8S 16-bits timer channel", tag, owner, clock, "h8s_16bits_timer_channel", __FILE__)
{
}
@@ -633,7 +633,7 @@ void h8s_timer16_channel_device::set_chain(const char *_chain_tag)
chain_tag = _chain_tag;
}
-void h8s_timer16_channel_device::set_info(int _tgr_count, UINT8 _tier_mask, const char *intc, int irq_base,
+void h8s_timer16_channel_device::set_info(int _tgr_count, uint8_t _tier_mask, const char *intc, int irq_base,
int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7)
{
tgr_count = _tgr_count;
@@ -671,12 +671,12 @@ void h8s_timer16_channel_device::tier_update()
(tier & 0x80 ? IRQ_TRIG : 0);
}
-void h8s_timer16_channel_device::isr_update(UINT8 val)
+void h8s_timer16_channel_device::isr_update(uint8_t val)
{
isr &= (val | tier_mask | 0xc0);
}
-UINT8 h8s_timer16_channel_device::isr_to_sr() const
+uint8_t h8s_timer16_channel_device::isr_to_sr() const
{
return 0xc0 | isr;
}
diff --git a/src/devices/cpu/h8/h8_timer16.h b/src/devices/cpu/h8/h8_timer16.h
index f8f6c1efda2..6a0973da0d5 100644
--- a/src/devices/cpu/h8/h8_timer16.h
+++ b/src/devices/cpu/h8/h8_timer16.h
@@ -73,8 +73,8 @@ public:
};
- h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
void set_info(int tgr_count, int tbr_count, const char *intc, int irq_base);
@@ -95,11 +95,11 @@ public:
DECLARE_READ16_MEMBER(tbr_r);
DECLARE_WRITE16_MEMBER(tbr_w);
- UINT64 internal_update(UINT64 current_time);
- void set_ier(UINT8 value);
+ uint64_t internal_update(uint64_t current_time);
+ void set_ier(uint8_t value);
void set_enable(bool enable);
- void tisr_w(int offset, UINT8 data);
- UINT8 tisr_r(int offset) const;
+ void tisr_w(int offset, uint8_t data);
+ uint8_t tisr_r(int offset) const;
protected:
required_device<h8_device> cpu;
@@ -107,32 +107,32 @@ protected:
h8_intc_device *intc;
const char *chain_tag, *intc_tag;
int interrupt[6];
- UINT8 tier_mask;
+ uint8_t tier_mask;
int tgr_count, tbr_count;
int tgr_clearing;
- UINT8 tcr, tier, ier, isr;
+ uint8_t tcr, tier, ier, isr;
int clock_type, clock_divider;
- UINT16 tcnt, tgr[6];
- UINT64 last_clock_update, event_time;
- UINT32 phase, counter_cycle;
+ uint16_t tcnt, tgr[6];
+ uint64_t last_clock_update, event_time;
+ uint32_t phase, counter_cycle;
bool counter_incrementing;
bool channel_active;
virtual void device_start() override;
virtual void device_reset() override;
- void update_counter(UINT64 cur_time = 0);
- void recalc_event(UINT64 cur_time = 0);
+ void update_counter(uint64_t cur_time = 0);
+ void recalc_event(uint64_t cur_time = 0);
virtual void tcr_update();
virtual void tier_update();
- virtual void isr_update(UINT8 value);
- virtual UINT8 isr_to_sr() const;
+ virtual void isr_update(uint8_t value);
+ virtual uint8_t isr_to_sr() const;
};
class h8h_timer16_channel_device : public h8_timer16_channel_device {
public:
- h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~h8h_timer16_channel_device();
void set_info(int tgr_count, int tbr_count, const char *intc, int irq_base);
@@ -140,16 +140,16 @@ public:
protected:
virtual void tcr_update() override;
virtual void tier_update() override;
- virtual void isr_update(UINT8 value) override;
- virtual UINT8 isr_to_sr() const override;
+ virtual void isr_update(uint8_t value) override;
+ virtual uint8_t isr_to_sr() const override;
};
class h8s_timer16_channel_device : public h8_timer16_channel_device {
public:
- h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~h8s_timer16_channel_device();
- void set_info(int tgr_count, UINT8 _tier_mask, const char *intc, int irq_base,
+ void set_info(int tgr_count, uint8_t _tier_mask, const char *intc, int irq_base,
int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7);
void set_chain(const char *chain_tag);
@@ -158,15 +158,15 @@ protected:
virtual void tcr_update() override;
virtual void tier_update() override;
- virtual void isr_update(UINT8 value) override;
- virtual UINT8 isr_to_sr() const override;
+ virtual void isr_update(uint8_t value) override;
+ virtual uint8_t isr_to_sr() const override;
};
class h8_timer16_device : public device_t {
public:
- h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void set_info(int timer_count, UINT8 default_tstr);
+ void set_info(int timer_count, uint8_t default_tstr);
DECLARE_READ8_MEMBER(tstr_r);
DECLARE_WRITE8_MEMBER(tstr_w);
@@ -190,8 +190,8 @@ protected:
required_device<h8_device> cpu;
h8_timer16_channel_device *timer_channel[6];
int timer_count;
- UINT8 default_tstr;
- UINT8 tstr;
+ uint8_t default_tstr;
+ uint8_t tstr;
virtual void device_start() override;
virtual void device_reset() override;
diff --git a/src/devices/cpu/h8/h8_timer8.cpp b/src/devices/cpu/h8/h8_timer8.cpp
index 671170e1cab..93538817313 100644
--- a/src/devices/cpu/h8/h8_timer8.cpp
+++ b/src/devices/cpu/h8/h8_timer8.cpp
@@ -12,14 +12,14 @@ const int V = 1;
const device_type H8_TIMER8_CHANNEL = &device_creator<h8_timer8_channel_device>;
const device_type H8H_TIMER8_CHANNEL = &device_creator<h8h_timer8_channel_device>;
-h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_TIMER8_CHANNEL, "H8 8-bits timer channel", tag, owner, clock, "h8_8bits_timer_channel", __FILE__),
cpu(*this, "^"), chained_timer(nullptr), intc(nullptr), chain_tag(nullptr), intc_tag(nullptr), irq_ca(0), irq_cb(0), irq_v(0), chain_type(0), tcr(0), tcsr(0), tcnt(0), extra_clock_bit(false),
has_adte(false), has_ice(false), clock_type(0), clock_divider(0), clear_type(0), counter_cycle(0), last_clock_update(0), event_time(0)
{
}
-h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
cpu(*this, "^"), chained_timer(nullptr), intc(nullptr), chain_tag(nullptr), intc_tag(nullptr), irq_ca(0), irq_cb(0), irq_v(0), chain_type(0), tcr(0), tcsr(0), tcnt(0), extra_clock_bit(false),
has_adte(false), has_ice(false), clock_type(0), clock_divider(0), clear_type(0), counter_cycle(0), last_clock_update(0), event_time(0)
@@ -145,7 +145,7 @@ WRITE8_MEMBER(h8_timer8_channel_device::tcsr_w)
{
update_counter();
- UINT8 mask = has_adte || has_ice ? 0x1f : 0x0f;
+ uint8_t mask = has_adte || has_ice ? 0x1f : 0x0f;
tcsr = (tcsr & ~mask) | (data & mask);
tcsr &= data | 0x1f;
@@ -207,7 +207,7 @@ void h8_timer8_channel_device::device_reset()
extra_clock_bit = false;
}
-UINT64 h8_timer8_channel_device::internal_update(UINT64 current_time)
+uint64_t h8_timer8_channel_device::internal_update(uint64_t current_time)
{
if(event_time && current_time >= event_time) {
update_counter(current_time);
@@ -217,7 +217,7 @@ UINT64 h8_timer8_channel_device::internal_update(UINT64 current_time)
return event_time;
}
-void h8_timer8_channel_device::update_counter(UINT64 cur_time)
+void h8_timer8_channel_device::update_counter(uint64_t cur_time)
{
if(clock_type != DIV)
return;
@@ -225,8 +225,8 @@ void h8_timer8_channel_device::update_counter(UINT64 cur_time)
if(!cur_time)
cur_time = cpu->total_cycles();
- UINT64 base_time = (last_clock_update + clock_divider/2) / clock_divider;
- UINT64 new_time = (cur_time + clock_divider/2) / clock_divider;
+ uint64_t base_time = (last_clock_update + clock_divider/2) / clock_divider;
+ uint64_t new_time = (cur_time + clock_divider/2) / clock_divider;
int tt = tcnt + new_time - base_time;
tcnt = tt % counter_cycle;
@@ -260,10 +260,10 @@ void h8_timer8_channel_device::update_counter(UINT64 cur_time)
last_clock_update = cur_time;
}
-void h8_timer8_channel_device::recalc_event(UINT64 cur_time)
+void h8_timer8_channel_device::recalc_event(uint64_t cur_time)
{
bool update_cpu = cur_time == 0;
- UINT64 old_event_time = event_time;
+ uint64_t old_event_time = event_time;
if(clock_type != DIV) {
event_time = 0;
@@ -275,7 +275,7 @@ void h8_timer8_channel_device::recalc_event(UINT64 cur_time)
if(!cur_time)
cur_time = cpu->total_cycles();
- UINT32 event_delay = 0xffffffff;
+ uint32_t event_delay = 0xffffffff;
if(clear_type == CLEAR_A || clear_type == CLEAR_B)
counter_cycle = tcor[clear_type - CLEAR_A];
else {
@@ -286,7 +286,7 @@ void h8_timer8_channel_device::recalc_event(UINT64 cur_time)
}
for(auto & elem : tcor) {
- UINT32 new_delay = 0xffffffff;
+ uint32_t new_delay = 0xffffffff;
if(elem > tcnt) {
if(tcnt >= counter_cycle || elem <= counter_cycle)
new_delay = elem - tcnt;
@@ -353,7 +353,7 @@ void h8_timer8_channel_device::timer_tick()
}
}
-h8h_timer8_channel_device::h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8h_timer8_channel_device::h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8_timer8_channel_device(mconfig, H8H_TIMER8_CHANNEL, "H8H 8-bits timer channel", tag, owner, clock, "h8h_8bits_timer_channel", __FILE__)
{
}
diff --git a/src/devices/cpu/h8/h8_timer8.h b/src/devices/cpu/h8/h8_timer8.h
index 0ab4055ea38..d4919dddce0 100644
--- a/src/devices/cpu/h8/h8_timer8.h
+++ b/src/devices/cpu/h8/h8_timer8.h
@@ -35,8 +35,8 @@ public:
DIV
};
- h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
void set_info(const char *intc, int irq_ca, int irq_cb, int irq_v, int div1, int div2, int div3, int div4, int div5, int div6);
@@ -49,7 +49,7 @@ public:
DECLARE_READ8_MEMBER(tcnt_r);
DECLARE_WRITE8_MEMBER(tcnt_w);
- UINT64 internal_update(UINT64 current_time);
+ uint64_t internal_update(uint64_t current_time);
void set_extra_clock_bit(bool bit);
void chained_timer_overflow();
@@ -83,17 +83,17 @@ protected:
const char *chain_tag, *intc_tag;
int irq_ca, irq_cb, irq_v, chain_type;
int div_tab[6];
- UINT8 tcor[2];
- UINT8 tcr, tcsr, tcnt;
+ uint8_t tcor[2];
+ uint8_t tcr, tcsr, tcnt;
bool extra_clock_bit, has_adte, has_ice;
int clock_type, clock_divider, clear_type, counter_cycle;
- UINT64 last_clock_update, event_time;
+ uint64_t last_clock_update, event_time;
virtual void device_start() override;
virtual void device_reset() override;
- void update_counter(UINT64 cur_time = 0);
- void recalc_event(UINT64 cur_time = 0);
+ void update_counter(uint64_t cur_time = 0);
+ void recalc_event(uint64_t cur_time = 0);
void timer_tick();
void update_tcr();
@@ -101,7 +101,7 @@ protected:
class h8h_timer8_channel_device : public h8_timer8_channel_device {
public:
- h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~h8h_timer8_channel_device();
void set_info(const char *intc, int irq_ca, int irq_cb, int irq_v, const char *chain_tag, int chain_type, bool has_adte, bool has_ice);
diff --git a/src/devices/cpu/h8/h8_watchdog.cpp b/src/devices/cpu/h8/h8_watchdog.cpp
index 19d9131819a..286be74c208 100644
--- a/src/devices/cpu/h8/h8_watchdog.cpp
+++ b/src/devices/cpu/h8/h8_watchdog.cpp
@@ -6,7 +6,7 @@ const device_type H8_WATCHDOG = &device_creator<h8_watchdog_device>;
const int h8_watchdog_device::div_bh[8] = { 1, 6, 7, 9, 11, 13, 15, 17 };
const int h8_watchdog_device::div_s [8] = { 1, 5, 6, 7, 8, 9, 11, 12 };
-h8_watchdog_device::h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8_watchdog_device::h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, H8_WATCHDOG, "H8 watchdog", tag, owner, clock, "h8_watchdog", __FILE__),
cpu(*this, DEVICE_SELF_OWNER)
{
@@ -20,26 +20,26 @@ void h8_watchdog_device::set_info(const char *_intc_tag, int _irq, int _type)
}
-UINT64 h8_watchdog_device::internal_update(UINT64 current_time)
+uint64_t h8_watchdog_device::internal_update(uint64_t current_time)
{
tcnt_update(current_time);
if(tcsr & TCSR_TME) {
int shift = (type == S ? div_s : div_bh)[tcsr & TCSR_CKS];
- UINT64 spos = tcnt_cycle_base >> shift;
+ uint64_t spos = tcnt_cycle_base >> shift;
return (spos + 0x100 - tcnt) << shift;
} else
return 0;
}
-void h8_watchdog_device::tcnt_update(UINT64 cur_time)
+void h8_watchdog_device::tcnt_update(uint64_t cur_time)
{
if(tcsr & TCSR_TME) {
int shift = (type == S ? div_s : div_bh)[tcsr & TCSR_CKS];
if(!cur_time)
cur_time = cpu->total_cycles();
- UINT64 spos = tcnt_cycle_base >> shift;
- UINT64 epos = cur_time >> shift;
+ uint64_t spos = tcnt_cycle_base >> shift;
+ uint64_t epos = cur_time >> shift;
int next_tcnt = tcnt + int(epos - spos);
tcnt = next_tcnt;
diff --git a/src/devices/cpu/h8/h8_watchdog.h b/src/devices/cpu/h8/h8_watchdog.h
index efb77b29c05..f746be40aa9 100644
--- a/src/devices/cpu/h8/h8_watchdog.h
+++ b/src/devices/cpu/h8/h8_watchdog.h
@@ -51,11 +51,11 @@ class h8_watchdog_device : public device_t {
public:
enum { B, H, S };
- h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_info(const char *intc, int irq, int type);
- UINT64 internal_update(UINT64 current_time);
+ uint64_t internal_update(uint64_t current_time);
DECLARE_READ16_MEMBER(wd_r);
DECLARE_WRITE16_MEMBER(wd_w);
@@ -88,10 +88,10 @@ private:
const char *intc_tag;
int irq;
int type;
- UINT8 tcnt, tcsr, rst;
- UINT64 tcnt_cycle_base;
+ uint8_t tcnt, tcsr, rst;
+ uint64_t tcnt_cycle_base;
- void tcnt_update(UINT64 current_time = 0);
+ void tcnt_update(uint64_t current_time = 0);
};
extern const device_type H8_WATCHDOG;
diff --git a/src/devices/cpu/h8/h8h.cpp b/src/devices/cpu/h8/h8h.cpp
index a7ca2bc8685..1710cb930f6 100644
--- a/src/devices/cpu/h8/h8h.cpp
+++ b/src/devices/cpu/h8/h8h.cpp
@@ -3,14 +3,14 @@
#include "emu.h"
#include "h8h.h"
-h8h_device::h8h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate) :
+h8h_device::h8h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate) :
h8_device(mconfig, type, name, tag, owner, clock, shortname, source, false, map_delegate)
{
supports_advanced = true;
mode_advanced = true;
}
-offs_t h8h_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t h8h_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
diff --git a/src/devices/cpu/h8/h8h.h b/src/devices/cpu/h8/h8h.h
index 5999ad1030f..b4385d96ef6 100644
--- a/src/devices/cpu/h8/h8h.h
+++ b/src/devices/cpu/h8/h8h.h
@@ -18,18 +18,18 @@
class h8h_device : public h8_device {
public:
- h8h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate);
+ h8h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate);
protected:
static const disasm_entry disasm_entries[];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
- inline void r32_w(int reg, UINT32 val) { R[reg & 7] = val; R[(reg & 7) | 8] = val >> 16; }
- inline UINT32 r32_r(int reg) const { return R[reg & 7] | (R[(reg & 7) | 8] << 16); }
+ inline void r32_w(int reg, uint32_t val) { R[reg & 7] = val; R[(reg & 7) | 8] = val >> 16; }
+ inline uint32_t r32_r(int reg) const { return R[reg & 7] | (R[(reg & 7) | 8] << 16); }
#define O(o) void o ## _full(); void o ## _partial()
diff --git a/src/devices/cpu/h8/h8s2000.cpp b/src/devices/cpu/h8/h8s2000.cpp
index 7ebb24fd181..ff8997e4728 100644
--- a/src/devices/cpu/h8/h8s2000.cpp
+++ b/src/devices/cpu/h8/h8s2000.cpp
@@ -3,13 +3,13 @@
#include "emu.h"
#include "h8s2000.h"
-h8s2000_device::h8s2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate) :
+h8s2000_device::h8s2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate) :
h8h_device(mconfig, type, name, tag, owner, clock, shortname, source, map_delegate)
{
has_exr = true;
}
-offs_t h8s2000_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t h8s2000_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
diff --git a/src/devices/cpu/h8/h8s2000.h b/src/devices/cpu/h8/h8s2000.h
index 665f272fe5b..24808f8d596 100644
--- a/src/devices/cpu/h8/h8s2000.h
+++ b/src/devices/cpu/h8/h8s2000.h
@@ -20,12 +20,12 @@
class h8s2000_device : public h8h_device {
public:
- h8s2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate);
+ h8s2000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate);
protected:
static const disasm_entry disasm_entries[];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/h8/h8s2245.cpp b/src/devices/cpu/h8/h8s2245.cpp
index 88650f775bc..20cc8bbc237 100644
--- a/src/devices/cpu/h8/h8s2245.cpp
+++ b/src/devices/cpu/h8/h8s2245.cpp
@@ -9,7 +9,7 @@ const device_type H8S2245 = &device_creator<h8s2245_device>;
const device_type H8S2246 = &device_creator<h8s2246_device>;
-h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
h8s2000_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(h8s2245_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -41,7 +41,7 @@ h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type,
ram_start = 0;
}
-h8s2245_device::h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2245_device::h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2000_device(mconfig, H8S2245, "H8S/2245", tag, owner, clock, "h8s2245", __FILE__, address_map_delegate(FUNC(h8s2245_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -73,19 +73,19 @@ h8s2245_device::h8s2245_device(const machine_config &mconfig, const char *tag, d
ram_start = 0xffec00;
}
-h8s2241_device::h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2241_device::h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2245_device(mconfig, H8S2241, "H8S/2241", tag, owner, clock, "h8s2241", __FILE__)
{
ram_start = 0xffec00;
}
-h8s2242_device::h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2242_device::h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2245_device(mconfig, H8S2242, "H8S/2242", tag, owner, clock, "h8s2242", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2246_device::h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2246_device::h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2245_device(mconfig, H8S2246, "H8S/2246", tag, owner, clock, "h8s2246", __FILE__)
{
ram_start = 0xffdc00;
@@ -319,9 +319,9 @@ void h8s2245_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h8s2245_device::internal_update(UINT64 current_time)
+void h8s2245_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
@@ -369,7 +369,7 @@ READ16_MEMBER(h8s2245_device::mstpcr_r)
WRITE16_MEMBER(h8s2245_device::mstpcr_w)
{
- UINT16 omstpcr = mstpcr;
+ uint16_t omstpcr = mstpcr;
COMBINE_DATA(&mstpcr);
if((omstpcr ^ mstpcr) & 0x72e0) {
char buf[4096];
diff --git a/src/devices/cpu/h8/h8s2245.h b/src/devices/cpu/h8/h8s2245.h
index a67fa9f9866..b5c64aef730 100644
--- a/src/devices/cpu/h8/h8s2245.h
+++ b/src/devices/cpu/h8/h8s2245.h
@@ -33,8 +33,8 @@
class h8s2245_device : public h8s2000_device {
public:
- h8s2245_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
- h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2245_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(syscr_r);
DECLARE_WRITE8_MEMBER(syscr_w);
@@ -68,16 +68,16 @@ protected:
required_device<h8_sci_device> sci2;
required_device<h8_watchdog_device> watchdog;
- UINT32 ram_start;
- UINT16 mstpcr;
- UINT8 syscr;
+ uint32_t ram_start;
+ uint16_t mstpcr;
+ uint8_t syscr;
virtual bool exr_in_stack() const override;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
@@ -88,17 +88,17 @@ protected:
class h8s2241_device : public h8s2245_device {
public:
- h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2242_device : public h8s2245_device {
public:
- h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2246_device : public h8s2245_device {
public:
- h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type H8S2241;
diff --git a/src/devices/cpu/h8/h8s2320.cpp b/src/devices/cpu/h8/h8s2320.cpp
index 5f0987c2f10..073725dcd3e 100644
--- a/src/devices/cpu/h8/h8s2320.cpp
+++ b/src/devices/cpu/h8/h8s2320.cpp
@@ -14,7 +14,7 @@ const device_type H8S2328 = &device_creator<h8s2328_device>;
const device_type H8S2329 = &device_creator<h8s2329_device>;
-h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
h8s2000_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(h8s2320_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -53,7 +53,7 @@ h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type,
ram_start = 0;
}
-h8s2320_device::h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2320_device::h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2000_device(mconfig, H8S2320, "H8S/2320", tag, owner, clock, "h8s2320", __FILE__, address_map_delegate(FUNC(h8s2320_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -92,49 +92,49 @@ h8s2320_device::h8s2320_device(const machine_config &mconfig, const char *tag, d
ram_start = 0xffec00;
}
-h8s2321_device::h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2321_device::h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2320_device(mconfig, H8S2321, "H8S/2321", tag, owner, clock, "h8s2321", __FILE__)
{
ram_start = 0xffec00;
}
-h8s2322_device::h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2322_device::h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2320_device(mconfig, H8S2322, "H8S/2322", tag, owner, clock, "h8s2322", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2323_device::h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2323_device::h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2320_device(mconfig, H8S2323, "H8S/2323", tag, owner, clock, "h8s2323", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2324_device::h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2324_device::h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2320_device(mconfig, H8S2324, "H8S/2324", tag, owner, clock, "h8s2324", __FILE__)
{
ram_start = 0xff7c00;
}
-h8s2326_device::h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2326_device::h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2320_device(mconfig, H8S2326, "H8S/2326", tag, owner, clock, "h8s2326", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2327_device::h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2327_device::h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2320_device(mconfig, H8S2327, "H8S/2327", tag, owner, clock, "h8s2327", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2328_device::h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2328_device::h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2320_device(mconfig, H8S2328, "H8S/2328", tag, owner, clock, "h8s2328", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2329_device::h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2329_device::h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2320_device(mconfig, H8S2329, "H8S/2329", tag, owner, clock, "h8s2329", __FILE__)
{
ram_start = 0xff7c00;
@@ -456,9 +456,9 @@ void h8s2320_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h8s2320_device::internal_update(UINT64 current_time)
+void h8s2320_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
diff --git a/src/devices/cpu/h8/h8s2320.h b/src/devices/cpu/h8/h8s2320.h
index 68ef4f7ba66..e8a979127cf 100644
--- a/src/devices/cpu/h8/h8s2320.h
+++ b/src/devices/cpu/h8/h8s2320.h
@@ -39,8 +39,8 @@
class h8s2320_device : public h8s2000_device {
public:
- h8s2320_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
- h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2320_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(syscr_r);
DECLARE_WRITE8_MEMBER(syscr_w);
@@ -79,8 +79,8 @@ protected:
required_device<h8_sci_device> sci2;
required_device<h8_watchdog_device> watchdog;
- UINT32 ram_start;
- UINT8 syscr;
+ uint32_t ram_start;
+ uint8_t syscr;
virtual bool exr_in_stack() const override;
virtual void update_irq_filter() override;
@@ -88,7 +88,7 @@ protected:
virtual int trace_setup() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
@@ -99,42 +99,42 @@ protected:
class h8s2321_device : public h8s2320_device {
public:
- h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2322_device : public h8s2320_device {
public:
- h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2323_device : public h8s2320_device {
public:
- h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2324_device : public h8s2320_device {
public:
- h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2326_device : public h8s2320_device {
public:
- h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2327_device : public h8s2320_device {
public:
- h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2328_device : public h8s2320_device {
public:
- h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2329_device : public h8s2320_device {
public:
- h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type H8S2320;
diff --git a/src/devices/cpu/h8/h8s2357.cpp b/src/devices/cpu/h8/h8s2357.cpp
index d80f48e1551..c600904ba83 100644
--- a/src/devices/cpu/h8/h8s2357.cpp
+++ b/src/devices/cpu/h8/h8s2357.cpp
@@ -10,7 +10,7 @@ const device_type H8S2394 = &device_creator<h8s2394_device>;
const device_type H8S2392 = &device_creator<h8s2392_device>;
const device_type H8S2390 = &device_creator<h8s2390_device>;
-h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
h8s2000_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(h8s2357_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -45,7 +45,7 @@ h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type,
syscr = 0;
}
-h8s2357_device::h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2357_device::h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2000_device(mconfig, H8S2357, "H8S/2357", tag, owner, clock, "h8s2357", __FILE__, address_map_delegate(FUNC(h8s2357_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -81,31 +81,31 @@ h8s2357_device::h8s2357_device(const machine_config &mconfig, const char *tag, d
ram_start = 0xffdc00;
}
-h8s2352_device::h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2352_device::h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2357_device(mconfig, H8S2352, "H8S/2352", tag, owner, clock, "h8s2352", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2398_device::h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2398_device::h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2357_device(mconfig, H8S2398, "H8S/2398", tag, owner, clock, "h8s2398", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2394_device::h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2394_device::h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2357_device(mconfig, H8S2394, "H8S/2394", tag, owner, clock, "h8s2394", __FILE__)
{
ram_start = 0xff7c00;
}
-h8s2392_device::h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2392_device::h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2357_device(mconfig, H8S2392, "H8S/2392", tag, owner, clock, "h8s2392", __FILE__)
{
ram_start = 0xffdc00;
}
-h8s2390_device::h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2390_device::h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2357_device(mconfig, H8S2390, "H8S/2390", tag, owner, clock, "h8s2390", __FILE__)
{
ram_start = 0xffec00;
@@ -392,9 +392,9 @@ void h8s2357_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h8s2357_device::internal_update(UINT64 current_time)
+void h8s2357_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
diff --git a/src/devices/cpu/h8/h8s2357.h b/src/devices/cpu/h8/h8s2357.h
index fc677b565c3..c7fe219b5a7 100644
--- a/src/devices/cpu/h8/h8s2357.h
+++ b/src/devices/cpu/h8/h8s2357.h
@@ -34,8 +34,8 @@
class h8s2357_device : public h8s2000_device {
public:
- h8s2357_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
- h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2357_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(syscr_r);
DECLARE_WRITE8_MEMBER(syscr_w);
@@ -70,7 +70,7 @@ protected:
required_device<h8_sci_device> sci2;
required_device<h8_watchdog_device> watchdog;
- UINT32 ram_start;
+ uint32_t ram_start;
unsigned char syscr;
virtual bool exr_in_stack() const override;
@@ -79,7 +79,7 @@ protected:
virtual int trace_setup() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
@@ -90,27 +90,27 @@ protected:
class h8s2352_device : public h8s2357_device {
public:
- h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2398_device : public h8s2357_device {
public:
- h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2394_device : public h8s2357_device {
public:
- h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2392_device : public h8s2357_device {
public:
- h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class h8s2390_device : public h8s2357_device {
public:
- h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type H8S2357;
diff --git a/src/devices/cpu/h8/h8s2600.cpp b/src/devices/cpu/h8/h8s2600.cpp
index d0b6edfeef2..7717bc2f179 100644
--- a/src/devices/cpu/h8/h8s2600.cpp
+++ b/src/devices/cpu/h8/h8s2600.cpp
@@ -3,12 +3,12 @@
#include "emu.h"
#include "h8s2600.h"
-h8s2600_device::h8s2600_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate) :
+h8s2600_device::h8s2600_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate) :
h8s2000_device(mconfig, type, name, tag, owner, clock, shortname, source, map_delegate)
{
}
-offs_t h8s2600_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t h8s2600_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
diff --git a/src/devices/cpu/h8/h8s2600.h b/src/devices/cpu/h8/h8s2600.h
index 1a8e723c142..a7c686e910d 100644
--- a/src/devices/cpu/h8/h8s2600.h
+++ b/src/devices/cpu/h8/h8s2600.h
@@ -18,12 +18,12 @@
class h8s2600_device : public h8s2000_device {
public:
- h8s2600_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate);
+ h8s2600_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate);
protected:
static const disasm_entry disasm_entries[];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/h8/h8s2655.cpp b/src/devices/cpu/h8/h8s2655.cpp
index 80558108b69..14610e9161d 100644
--- a/src/devices/cpu/h8/h8s2655.cpp
+++ b/src/devices/cpu/h8/h8s2655.cpp
@@ -6,7 +6,7 @@
const device_type H8S2655 = &device_creator<h8s2655_device>;
const device_type H8S2653 = &device_creator<h8s2653_device>;
-h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
h8s2600_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(h8s2655_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -41,7 +41,7 @@ h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type,
syscr = 0;
}
-h8s2655_device::h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2655_device::h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2600_device(mconfig, H8S2655, "H8S/2655", tag, owner, clock, "h8s2655", __FILE__, address_map_delegate(FUNC(h8s2655_device::map), this)),
intc(*this, "intc"),
adc(*this, "adc"),
@@ -77,7 +77,7 @@ h8s2655_device::h8s2655_device(const machine_config &mconfig, const char *tag, d
syscr = 0;
}
-h8s2653_device::h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+h8s2653_device::h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
h8s2655_device(mconfig, H8S2653, "H8S/2653", tag, owner, clock, "h8s2653", __FILE__)
{
}
@@ -397,9 +397,9 @@ void h8s2655_device::interrupt_taken()
standard_irq_callback(intc->interrupt_taken(taken_irq_vector));
}
-void h8s2655_device::internal_update(UINT64 current_time)
+void h8s2655_device::internal_update(uint64_t current_time)
{
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
add_event(event_time, adc->internal_update(current_time));
add_event(event_time, sci0->internal_update(current_time));
diff --git a/src/devices/cpu/h8/h8s2655.h b/src/devices/cpu/h8/h8s2655.h
index 47fb7e57e23..7da96bce082 100644
--- a/src/devices/cpu/h8/h8s2655.h
+++ b/src/devices/cpu/h8/h8s2655.h
@@ -26,8 +26,8 @@
class h8s2655_device : public h8s2600_device {
public:
- h8s2655_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
- h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2655_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
+ h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(syscr_r);
DECLARE_WRITE8_MEMBER(syscr_w);
@@ -62,7 +62,7 @@ protected:
required_device<h8_sci_device> sci2;
required_device<h8_watchdog_device> watchdog;
- UINT8 syscr;
+ uint8_t syscr;
virtual bool exr_in_stack() const override;
virtual void update_irq_filter() override;
@@ -70,7 +70,7 @@ protected:
virtual int trace_setup() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(UINT64 current_time) override;
+ virtual void internal_update(uint64_t current_time) override;
virtual machine_config_constructor device_mconfig_additions() const override;
DECLARE_ADDRESS_MAP(map, 16);
@@ -81,7 +81,7 @@ protected:
class h8s2653_device : public h8s2655_device {
public:
- h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type H8S2655;
diff --git a/src/devices/cpu/hcd62121/hcd62121.cpp b/src/devices/cpu/hcd62121/hcd62121.cpp
index 4cc98ab13fe..8a3e6fa5049 100644
--- a/src/devices/cpu/hcd62121/hcd62121.cpp
+++ b/src/devices/cpu/hcd62121/hcd62121.cpp
@@ -29,7 +29,7 @@ Martin Poupe's site can be found at http://martin.poupe.org/casio/
const device_type HCD62121 = &device_creator<hcd62121_cpu_device>;
-hcd62121_cpu_device::hcd62121_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hcd62121_cpu_device::hcd62121_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, HCD62121, "Hitachi HCD62121", tag, owner, clock, "hcd62121", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 24, 0)
, m_io_config("io", ENDIANNESS_BIG, 8, 8, 0), m_prev_pc(0)
@@ -45,15 +45,15 @@ hcd62121_cpu_device::hcd62121_cpu_device(const machine_config &mconfig, const ch
}
-UINT8 hcd62121_cpu_device::read_op()
+uint8_t hcd62121_cpu_device::read_op()
{
- UINT8 d = m_program->read_byte( ( m_cseg << 16 ) | m_ip );
+ uint8_t d = m_program->read_byte( ( m_cseg << 16 ) | m_ip );
m_ip++;
return d;
}
-UINT8 hcd62121_cpu_device::datasize( UINT8 op )
+uint8_t hcd62121_cpu_device::datasize( uint8_t op )
{
switch( op & 0x03 )
{
@@ -70,7 +70,7 @@ UINT8 hcd62121_cpu_device::datasize( UINT8 op )
}
-void hcd62121_cpu_device::read_reg( int size, UINT8 op1 )
+void hcd62121_cpu_device::read_reg( int size, uint8_t op1 )
{
int i;
@@ -87,7 +87,7 @@ void hcd62121_cpu_device::read_reg( int size, UINT8 op1 )
}
-void hcd62121_cpu_device::write_reg( int size, UINT8 op1 )
+void hcd62121_cpu_device::write_reg( int size, uint8_t op1 )
{
int i;
@@ -104,7 +104,7 @@ void hcd62121_cpu_device::write_reg( int size, UINT8 op1 )
}
-void hcd62121_cpu_device::read_regreg( int size, UINT8 op1, UINT8 op2, bool op_is_logical )
+void hcd62121_cpu_device::read_regreg( int size, uint8_t op1, uint8_t op2, bool op_is_logical )
{
int i;
@@ -130,7 +130,7 @@ void hcd62121_cpu_device::read_regreg( int size, UINT8 op1, UINT8 op2, bool op_i
/* We need to swap parameters */
for ( i = 0; i < size; i++ )
{
- UINT8 v = m_temp1[i];
+ uint8_t v = m_temp1[i];
m_temp1[i] = m_temp2[i];
m_temp2[i] = v;
}
@@ -138,7 +138,7 @@ void hcd62121_cpu_device::read_regreg( int size, UINT8 op1, UINT8 op2, bool op_i
}
-void hcd62121_cpu_device::write_regreg( int size, UINT8 op1, UINT8 op2 )
+void hcd62121_cpu_device::write_regreg( int size, uint8_t op1, uint8_t op2 )
{
int i;
@@ -157,10 +157,10 @@ void hcd62121_cpu_device::write_regreg( int size, UINT8 op1, UINT8 op2 )
}
-void hcd62121_cpu_device::read_iregreg( int size, UINT8 op1, UINT8 op2 )
+void hcd62121_cpu_device::read_iregreg( int size, uint8_t op1, uint8_t op2 )
{
int i;
- UINT16 ad;
+ uint16_t ad;
ad = m_reg[ ( 0x40 | op1 ) & 0x7f ] | ( m_reg[ ( 0x40 | ( op1 + 1 ) ) & 0x7f ] << 8 );
@@ -188,7 +188,7 @@ void hcd62121_cpu_device::read_iregreg( int size, UINT8 op1, UINT8 op2 )
/* We need to swap parameters */
for ( i = 0; i < size; i++ )
{
- UINT8 v = m_temp1[i];
+ uint8_t v = m_temp1[i];
m_temp1[i] = m_temp2[i];
m_temp2[i] = v;
}
@@ -196,14 +196,14 @@ void hcd62121_cpu_device::read_iregreg( int size, UINT8 op1, UINT8 op2 )
}
-void hcd62121_cpu_device::write_iregreg( int size, UINT8 op1, UINT8 op2 )
+void hcd62121_cpu_device::write_iregreg( int size, uint8_t op1, uint8_t op2 )
{
int i;
if ( ( op1 & 0x80 ) || ( op2 & 0x80 ) )
{
/* store in (reg1) */
- UINT16 ad = m_reg[ ( 0x40 | op1 ) & 0x7f ] | ( m_reg[ ( 0x40 | ( op1 + 1 ) ) & 0x7f ] << 8 );
+ uint16_t ad = m_reg[ ( 0x40 | op1 ) & 0x7f ] | ( m_reg[ ( 0x40 | ( op1 + 1 ) ) & 0x7f ] << 8 );
for ( i = 0; i < size; i++ )
{
@@ -221,7 +221,7 @@ void hcd62121_cpu_device::write_iregreg( int size, UINT8 op1, UINT8 op2 )
}
-void hcd62121_cpu_device::write_iregreg2( int size, UINT8 op1, UINT8 op2 )
+void hcd62121_cpu_device::write_iregreg2( int size, uint8_t op1, uint8_t op2 )
{
int i;
@@ -234,7 +234,7 @@ void hcd62121_cpu_device::write_iregreg2( int size, UINT8 op1, UINT8 op2 )
else
{
/* store in (reg1) */
- UINT16 ad = m_reg[ ( 0x40 | op1 ) & 0x7f ] | ( m_reg[ ( 0x40 | ( op1 + 1 ) ) & 0x7f ] << 8 );
+ uint16_t ad = m_reg[ ( 0x40 | op1 ) & 0x7f ] | ( m_reg[ ( 0x40 | ( op1 + 1 ) ) & 0x7f ] << 8 );
for ( i = 0; i < size; i++ )
{
@@ -246,7 +246,7 @@ void hcd62121_cpu_device::write_iregreg2( int size, UINT8 op1, UINT8 op2 )
}
-int hcd62121_cpu_device::check_cond( UINT8 op )
+int hcd62121_cpu_device::check_cond( uint8_t op )
{
switch ( op & 0x07 )
{
@@ -506,8 +506,8 @@ void hcd62121_cpu_device::execute_run()
{
do
{
- UINT32 pc = ( m_cseg << 16 ) | m_ip;
- UINT8 op;
+ uint32_t pc = ( m_cseg << 16 ) | m_ip;
+ uint8_t op;
debugger_instruction_hook(this, pc);
m_prev_pc = pc;
@@ -525,7 +525,7 @@ void hcd62121_cpu_device::execute_run()
}
-offs_t hcd62121_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hcd62121_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( hcd62121 );
return CPU_DISASSEMBLE_NAME(hcd62121)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/hcd62121/hcd62121.h b/src/devices/cpu/hcd62121/hcd62121.h
index 2339f2229c3..df804d9a0e3 100644
--- a/src/devices/cpu/hcd62121/hcd62121.h
+++ b/src/devices/cpu/hcd62121/hcd62121.h
@@ -37,7 +37,7 @@ class hcd62121_cpu_device : public cpu_device
{
public:
// construction/destruction
- hcd62121_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hcd62121_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -45,9 +45,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 4; }
- virtual UINT32 execute_max_cycles() const override { return 48; }
- virtual UINT32 execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_min_cycles() const override { return 4; }
+ virtual uint32_t execute_max_cycles() const override { return 48; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -57,36 +57,36 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 18; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
-
- UINT8 read_op();
- UINT8 datasize( UINT8 op );
- void read_reg( int size, UINT8 op1 );
- void write_reg( int size, UINT8 op1 );
- void read_regreg( int size, UINT8 op1, UINT8 op2, bool op_is_logical );
- void write_regreg( int size, UINT8 op1, UINT8 op2 );
- void read_iregreg( int size, UINT8 op1, UINT8 op2 );
- void write_iregreg( int size, UINT8 op1, UINT8 op2 );
- void write_iregreg2( int size, UINT8 op1, UINT8 op2 );
- int check_cond( UINT8 op );
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 18; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
+
+ uint8_t read_op();
+ uint8_t datasize( uint8_t op );
+ void read_reg( int size, uint8_t op1 );
+ void write_reg( int size, uint8_t op1 );
+ void read_regreg( int size, uint8_t op1, uint8_t op2, bool op_is_logical );
+ void write_regreg( int size, uint8_t op1, uint8_t op2 );
+ void read_iregreg( int size, uint8_t op1, uint8_t op2 );
+ void write_iregreg( int size, uint8_t op1, uint8_t op2 );
+ void write_iregreg2( int size, uint8_t op1, uint8_t op2 );
+ int check_cond( uint8_t op );
address_space_config m_program_config;
address_space_config m_io_config;
- UINT32 m_prev_pc;
- UINT16 m_sp;
- UINT16 m_ip;
- UINT8 m_dsize;
- UINT8 m_cseg;
- UINT8 m_dseg;
- UINT8 m_sseg;
- UINT8 m_f;
- UINT16 m_lar;
- UINT8 m_reg[0x80];
- UINT8 m_temp1[0x10];
- UINT8 m_temp2[0x10];
+ uint32_t m_prev_pc;
+ uint16_t m_sp;
+ uint16_t m_ip;
+ uint8_t m_dsize;
+ uint8_t m_cseg;
+ uint8_t m_dseg;
+ uint8_t m_sseg;
+ uint8_t m_f;
+ uint16_t m_lar;
+ uint8_t m_reg[0x80];
+ uint8_t m_temp1[0x10];
+ uint8_t m_temp2[0x10];
address_space *m_program;
address_space *m_io;
diff --git a/src/devices/cpu/hcd62121/hcd62121_ops.h b/src/devices/cpu/hcd62121/hcd62121_ops.h
index 27bd988e650..57c1f6b7d52 100644
--- a/src/devices/cpu/hcd62121/hcd62121_ops.h
+++ b/src/devices/cpu/hcd62121/hcd62121_ops.h
@@ -4,7 +4,7 @@
#define HCD62121_MSK \
{ \
int i; \
- UINT8 mskres = 1; \
+ uint8_t mskres = 1; \
\
for ( i = 0; i < size; i++ ) \
{ \
@@ -21,8 +21,8 @@
#define HCD62121_IMSK \
{ \
int i; \
- UINT8 mskres = 1; \
- UINT8 set_zero = 0; \
+ uint8_t mskres = 1; \
+ uint8_t set_zero = 0; \
\
for ( i = 0; i < size; i++ ) \
{ \
@@ -47,7 +47,7 @@
#define HCD62121_AND \
{ \
int i; \
- UINT8 is_zero = 1; \
+ uint8_t is_zero = 1; \
\
for ( i = 0; i < size; i++ ) \
{ \
@@ -75,7 +75,7 @@
#define HCD62121_OR \
{ \
int i; \
- UINT8 is_zero = 1; \
+ uint8_t is_zero = 1; \
\
for ( i = 0; i < size; i++ ) \
{ \
@@ -103,7 +103,7 @@
#define HCD62121_XOR \
{ \
int i; \
- UINT8 is_zero = 1; \
+ uint8_t is_zero = 1; \
\
for ( i = 0; i < size; i++ ) \
{ \
@@ -131,7 +131,7 @@
#define HCD62121_ADD \
{ \
int i; \
- UINT8 is_zero = 1, carry = 0; \
+ uint8_t is_zero = 1, carry = 0; \
\
if ( ( m_temp1[0] & 0x0f ) + ( m_temp2[0] & 0x0f ) > 15 ) \
m_f |= _FLAG_CL; \
@@ -140,7 +140,7 @@
\
for ( i = 0; i < size; i++ ) \
{ \
- UINT16 res = m_temp1[i] + m_temp2[i] + carry; \
+ uint16_t res = m_temp1[i] + m_temp2[i] + carry; \
\
m_temp1[i] = res & 0xff; \
if ( m_temp1[i] ) \
@@ -174,7 +174,7 @@
#define HCD62121_ADDB \
{ \
int i; \
- UINT8 is_zero = 1, carry = 0; \
+ uint8_t is_zero = 1, carry = 0; \
\
if ( ( m_temp1[0] & 0x0f ) + ( m_temp2[0] & 0x0f ) > 9 ) \
m_f |= _FLAG_CL; \
@@ -183,7 +183,7 @@
\
for ( i = 0; i < size; i++ ) \
{ \
- UINT16 res = ( m_temp1[i] & 0x0f ) + ( m_temp2[i] & 0x0f ) + carry; \
+ uint16_t res = ( m_temp1[i] & 0x0f ) + ( m_temp2[i] & 0x0f ) + carry; \
\
if ( res > 9 ) \
{ \
@@ -225,7 +225,7 @@
#define HCD62121_SUB \
{ \
int i; \
- UINT8 is_zero = 1, carry = 0; \
+ uint8_t is_zero = 1, carry = 0; \
\
if ( ( m_temp1[0] & 0x0f ) < ( m_temp2[0] & 0x0f ) ) \
m_f |= _FLAG_CL; \
@@ -234,7 +234,7 @@
\
for ( i = 0; i < size; i++ ) \
{ \
- UINT16 res = m_temp1[i] - m_temp2[i] - carry; \
+ uint16_t res = m_temp1[i] - m_temp2[i] - carry; \
\
m_temp1[i] = res & 0xff; \
if ( m_temp1[i] ) \
@@ -266,7 +266,7 @@
#define HCD62121_PUSHW(source) \
{ \
- UINT16 address = source; \
+ uint16_t address = source; \
m_program->write_byte( ( m_sseg << 16 ) | m_sp, ( address ) & 0xff ); \
m_sp--; \
m_program->write_byte( ( m_sseg << 16 ) | m_sp, ( address ) >> 8 ); \
@@ -275,7 +275,7 @@
#define HCD62121_POPW(dest) \
{ \
- UINT16 res; \
+ uint16_t res; \
m_sp++; \
res = m_program->read_byte( ( m_sseg << 16 ) | m_sp ) << 8; \
m_sp++; \
@@ -289,8 +289,8 @@ case 0x06: /* mskq r1,r2 */
case 0x07: /* mskt r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -306,8 +306,8 @@ case 0x0B: /* sht r1,4 */
{
int i;
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 d1 = 0, d2 = 0;
+ uint8_t reg1 = read_op();
+ uint8_t d1 = 0, d2 = 0;
read_reg( size, reg1 );
@@ -336,8 +336,8 @@ case 0x0E: /* testq r1,r2 */
case 0x0F: /* testt r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -351,8 +351,8 @@ case 0x12: /* xorq r1,r2 */
case 0x13: /* xort r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -368,8 +368,8 @@ case 0x16: /* cmpq r1,r2 */
case 0x17: /* cmpt r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -384,8 +384,8 @@ case 0x1B: /* movt r1,r2 */
{
int i;
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -402,8 +402,8 @@ case 0x1E: /* imskq r1,r2 */
case 0x1F: /* imskt r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -419,8 +419,8 @@ case 0x23: /* shrt r1 */
{
int i;
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 d1 = 0, d2 = 0;
+ uint8_t reg1 = read_op();
+ uint8_t d1 = 0, d2 = 0;
read_reg( size, reg1 );
@@ -441,8 +441,8 @@ case 0x26: /* orq r1,r2 */
case 0x27: /* ort r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -460,8 +460,8 @@ case 0x2B: /* shlt r1 */
{
int i;
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 d1 = 0, d2 = 0;
+ uint8_t reg1 = read_op();
+ uint8_t d1 = 0, d2 = 0;
read_reg( size, reg1 );
@@ -482,8 +482,8 @@ case 0x2E: /* andq r1,r2 */
case 0x2F: /* andt r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, true );
@@ -499,8 +499,8 @@ case 0x36: /* subq r1,r2 */
case 0x37: /* subt r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -516,8 +516,8 @@ case 0x3A: /* adbq r1,r2 */
case 0x3B: /* adbt r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -533,8 +533,8 @@ case 0x3E: /* addq r1,r2 */
case 0x3F: /* addt r1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_regreg( size, reg1, reg2, false );
@@ -550,8 +550,8 @@ case 0x4E: /* testq ir1,r2 */
case 0x4F: /* testt ir1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_iregreg( size, reg1, reg2 );
@@ -565,8 +565,8 @@ case 0x56: /* cmpq ir1,r2 */
case 0x57: /* cmpt ir1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_iregreg( size, reg1, reg2 );
@@ -581,8 +581,8 @@ case 0x5B: /* movt ir1,r2 */
{
int i;
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_iregreg( size, reg1, reg2 );
@@ -599,8 +599,8 @@ case 0x66: /* orb ir1,r2 */
case 0x67: /* orb ir1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_iregreg( size, reg1, reg2 );
@@ -616,8 +616,8 @@ case 0x6E: /* andq ir1,r2 */
case 0x6F: /* andt ir1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_iregreg( size, reg1, reg2 );
@@ -633,8 +633,8 @@ case 0x7E: /* addq ir1,r2 */
case 0x7F: /* addt ir1,r2 */
{
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_iregreg( size, reg1, reg2 );
@@ -650,9 +650,9 @@ case 0x88: /* jump _a16 */
case 0x89: /* jumpf cs:a16 */
{
- UINT8 cs = read_op();
- UINT8 a1 = read_op();
- UINT8 a2 = read_op();
+ uint8_t cs = read_op();
+ uint8_t a1 = read_op();
+ uint8_t a2 = read_op();
m_cseg = cs;
m_ip = ( a1 << 8 ) | a2;
@@ -661,8 +661,8 @@ case 0x89: /* jumpf cs:a16 */
case 0x8A: /* call a16 */
{
- UINT8 a1 = read_op();
- UINT8 a2 = read_op();
+ uint8_t a1 = read_op();
+ uint8_t a2 = read_op();
HCD62121_PUSHW( m_ip );
@@ -690,8 +690,8 @@ case 0x97: /* retnz */
case 0x98: /* jump (r1) */
{
- UINT8 reg1 = read_op();
- UINT16 ad = m_reg[ ( reg1 | 0x40 ) & 0x7f ] << 8;
+ uint8_t reg1 = read_op();
+ uint16_t ad = m_reg[ ( reg1 | 0x40 ) & 0x7f ] << 8;
if ( reg1 & 0x40 )
ad |= m_reg[ ( ( reg1 - 1 ) | 0x40 ) & 0x7f ];
@@ -715,8 +715,8 @@ case 0xA5: /* jmpcl a16 */
case 0xA6: /* jmpnc a16 */
case 0xA7: /* jmpnz a16 */
{
- UINT8 a1 = read_op();
- UINT8 a2 = read_op();
+ uint8_t a1 = read_op();
+ uint8_t a2 = read_op();
if ( check_cond( op ) )
m_ip = ( a1 << 8 ) | a2;
@@ -732,8 +732,8 @@ case 0xAD: /* callcl a16 */
case 0xAE: /* callnc a16 */
case 0xAF: /* callnz a16 */
{
- UINT8 a1 = read_op();
- UINT8 a2 = read_op();
+ uint8_t a1 = read_op();
+ uint8_t a2 = read_op();
if ( check_cond( op ) )
{
@@ -774,8 +774,8 @@ case 0xB9: /* unk_B9 reg/i8 */
case 0xBB: /* jmpcl? a16 */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op );
{
- UINT8 a1 = read_op();
- UINT8 a2 = read_op();
+ uint8_t a1 = read_op();
+ uint8_t a2 = read_op();
if ( m_f & _FLAG_CL )
m_ip = ( a1 << 8 ) | a2;
@@ -785,8 +785,8 @@ case 0xBB: /* jmpcl? a16 */
case 0xBF: /* jmpncl? a16 */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op );
{
- UINT8 a1 = read_op();
- UINT8 a2 = read_op();
+ uint8_t a1 = read_op();
+ uint8_t a2 = read_op();
if ( ! ( m_f & _FLAG_CL ) )
m_ip = ( a1 << 8 ) | a2;
@@ -800,7 +800,7 @@ case 0xC3: /* movw reg,i80 */
{
int i;
int size = datasize( op );
- UINT8 reg = read_op();
+ uint8_t reg = read_op();
for( i = 0; i < size; i++ )
{
@@ -816,8 +816,8 @@ case 0xC7: /* movt (lar),r1 / r1,(lar) */
{
int i;
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
int pre_inc = 0;
int post_inc = 1;
@@ -871,14 +871,14 @@ case 0xCF: /* swapt ir1,r2? */
{
int i;
int size = datasize( op );
- UINT8 reg1 = read_op();
- UINT8 reg2 = read_op();
+ uint8_t reg1 = read_op();
+ uint8_t reg2 = read_op();
read_iregreg( size, reg1, reg2 );
for ( i = 0; i < size; i++ )
{
- UINT8 d = m_temp1[i];
+ uint8_t d = m_temp1[i];
m_temp1[i] = m_temp2[i];
m_temp2[i] = d;
}
@@ -914,7 +914,7 @@ case 0xD5: /* movb ss,i8 */
case 0xD6: /* movw sp,reg */
{
- UINT8 reg1 = read_op();
+ uint8_t reg1 = read_op();
m_sp = m_reg[ reg1 & 0x7f ] | ( m_reg[ ( reg1 + 1 ) & 0x7f ] << 8 );
}
@@ -943,7 +943,7 @@ case 0xDD: /* movb ds,i8 */
case 0xDE: /* movw lar,reg */
{
- UINT8 reg1 = read_op();
+ uint8_t reg1 = read_op();
m_lar = m_reg[ reg1 & 0x7f ] | ( m_reg[ ( reg1 + 1 ) & 0x7f ] << 8 );
}
@@ -951,7 +951,7 @@ case 0xDE: /* movw lar,reg */
case 0xE0: /* in0 reg */
{
- UINT8 reg1 = read_op();
+ uint8_t reg1 = read_op();
m_reg[ reg1 & 0x7f ] = m_io->read_byte( HCD62121_IN0 );
}
@@ -977,7 +977,7 @@ case 0xE7: /* unk_e7 reg/i8 (in?) */
case 0xE8: /* movw r1,lar */
{
- UINT8 reg1 = read_op();
+ uint8_t reg1 = read_op();
m_reg[ reg1 & 0x7f ] = m_lar & 0xff;
m_reg[ ( reg1 + 1 ) & 0x7f ] = m_lar >> 8;
@@ -986,7 +986,7 @@ case 0xE8: /* movw r1,lar */
case 0xEB: /* movw reg,ss */
{
- UINT8 reg1 = read_op();
+ uint8_t reg1 = read_op();
m_reg[ reg1 & 0x7f ] = m_sp & 0xff;
m_reg[ ( reg1 + 1 ) & 0x7f ] = m_sp >> 8;
diff --git a/src/devices/cpu/hcd62121/hcd62121d.cpp b/src/devices/cpu/hcd62121/hcd62121d.cpp
index 0c6bc082b11..8bc4d44d3d3 100644
--- a/src/devices/cpu/hcd62121/hcd62121d.cpp
+++ b/src/devices/cpu/hcd62121/hcd62121d.cpp
@@ -40,8 +40,8 @@ enum
struct hcd62121_dasm
{
const char *str;
- UINT8 arg1;
- UINT8 arg2;
+ uint8_t arg1;
+ uint8_t arg2;
};
@@ -131,9 +131,9 @@ static const hcd62121_dasm hcd62121_ops[256] =
CPU_DISASSEMBLE( hcd62121 )
{
- UINT8 op;
- UINT8 op1;
- UINT8 op2;
+ uint8_t op;
+ uint8_t op1;
+ uint8_t op2;
int pos = 0;
const hcd62121_dasm *inst;
diff --git a/src/devices/cpu/hd61700/hd61700.cpp b/src/devices/cpu/hd61700/hd61700.cpp
index e48b83a576f..11e0ab9f0c2 100644
--- a/src/devices/cpu/hd61700/hd61700.cpp
+++ b/src/devices/cpu/hd61700/hd61700.cpp
@@ -89,7 +89,7 @@
#define CPU_SLP 0x02
/* HD61700 IRQ vector */
-static const UINT16 irq_vector[] = {0x0032, 0x0042, 0x0052, 0x0062, 0x0072};
+static const uint16_t irq_vector[] = {0x0032, 0x0042, 0x0052, 0x0062, 0x0072};
//**************************************************************************
// HD61700 DEVICE
@@ -101,7 +101,7 @@ const device_type HD61700 = &device_creator<hd61700_cpu_device>;
// hd61700_cpu_device - constructor
//-------------------------------------------------
-hd61700_cpu_device::hd61700_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd61700_cpu_device::hd61700_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, HD61700, "HD61700", tag, owner, clock, "hd61700", __FILE__),
m_program_config("program", ENDIANNESS_BIG, 16, 18, -1),
m_ppc(0x0000),
@@ -292,7 +292,7 @@ void hd61700_cpu_device::state_string_export(const device_state_entry &entry, st
// helper function
//-------------------------------------------------
-offs_t hd61700_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hd61700_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( hd61700 );
return CPU_DISASSEMBLE_NAME(hd61700)(this, buffer, pc, oprom, opram, options);
@@ -344,7 +344,7 @@ void hd61700_cpu_device::execute_run()
}
else
{
- UINT8 op;
+ uint8_t op;
check_irqs();
@@ -359,9 +359,9 @@ void hd61700_cpu_device::execute_run()
case 0x08: //ad
case 0x09: //sb
{
- UINT8 arg = read_op();
- UINT8 src = READ_REG(get_sir_im8(arg));
- UINT16 res = READ_REG(arg) + ((op&1) ? -src : +src);
+ uint8_t arg = read_op();
+ uint8_t src = READ_REG(get_sir_im8(arg));
+ uint16_t res = READ_REG(arg) + ((op&1) ? -src : +src);
COND_WRITE_REG(op, arg, res & 0xff);
@@ -377,7 +377,7 @@ void hd61700_cpu_device::execute_run()
case 0x02: //ld
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
COPY_REG(arg, get_sir_im8(arg));
check_optional_jr(arg);
@@ -394,9 +394,9 @@ void hd61700_cpu_device::execute_run()
case 0x0e: //or
case 0x0f: //xr
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
- UINT8 res = make_logic(op, READ_REG(arg), READ_REG(get_sir_im8(arg)));
+ uint8_t res = make_logic(op, READ_REG(arg), READ_REG(get_sir_im8(arg)));
COND_WRITE_REG(op, arg, res);
@@ -416,8 +416,8 @@ void hd61700_cpu_device::execute_run()
case 0x0a: //adb
case 0x0b: //sbb
{
- UINT8 arg = read_op();
- UINT16 res;
+ uint8_t arg = read_op();
+ uint16_t res;
if (op & 0x01)
res = make_bcd_sub(READ_REG(arg), READ_REG(get_sir_im8(arg)));
@@ -438,9 +438,9 @@ void hd61700_cpu_device::execute_run()
case 0x10: //st
{
- UINT8 arg = read_op();
- UINT8 src = get_sir_im8(arg);
- UINT16 offset = REG_GET16(src);
+ uint8_t arg = read_op();
+ uint8_t src = get_sir_im8(arg);
+ uint16_t offset = REG_GET16(src);
mem_writebyte(REG_UA>>4, offset, READ_REG(arg));
@@ -451,9 +451,9 @@ void hd61700_cpu_device::execute_run()
case 0x11: //ld
{
- UINT8 arg = read_op();
- UINT8 src = get_sir_im8(arg);
- UINT16 offset = REG_GET16(src);
+ uint8_t arg = read_op();
+ uint8_t src = get_sir_im8(arg);
+ uint16_t offset = REG_GET16(src);
WRITE_REG(arg, mem_readbyte(REG_UA>>4, offset));
@@ -464,7 +464,7 @@ void hd61700_cpu_device::execute_run()
case 0x12: //stl
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
m_lcd_write_cb((offs_t)0, READ_REG(arg));
check_optional_jr(arg);
@@ -474,8 +474,8 @@ void hd61700_cpu_device::execute_run()
case 0x13: //ldl
{
- UINT8 arg = read_op();
- UINT8 res = m_lcd_read_cb(0);
+ uint8_t arg = read_op();
+ uint8_t res = m_lcd_read_cb(0);
WRITE_REG(arg, res);
@@ -486,7 +486,7 @@ void hd61700_cpu_device::execute_run()
case 0x14: //ppo/pfl
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
if (arg & 0x40)
{
@@ -504,7 +504,7 @@ void hd61700_cpu_device::execute_run()
case 0x15: //psr
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
WRITE_SREG(arg, READ_REG(arg));
check_optional_jr(arg);
@@ -515,9 +515,9 @@ void hd61700_cpu_device::execute_run()
case 0x16: //pst
case 0x17: //pst
{
- UINT8 arg = read_op();
- UINT8 src = READ_REG(arg);
- UINT8 idx = GET_REG_IDX(op, arg);
+ uint8_t arg = read_op();
+ uint8_t src = READ_REG(arg);
+ uint8_t idx = GET_REG_IDX(op, arg);
switch (idx)
{
@@ -554,15 +554,15 @@ void hd61700_cpu_device::execute_run()
case 0x18:
{
- UINT8 arg = read_op();
- UINT8 op1 = (arg>>5) & 0x03;
+ uint8_t arg = read_op();
+ uint8_t op1 = (arg>>5) & 0x03;
switch (op1)
{
case 0x00: //rod
case 0x02: //bid
{
- UINT8 src = READ_REG(arg);
- UINT8 res = (src>>1)&0x7f;
+ uint8_t src = READ_REG(arg);
+ uint8_t res = (src>>1)&0x7f;
if (!(op1&0x02))
res = res | ((m_flags&FLAG_C) !=0 )<<7;
@@ -579,8 +579,8 @@ void hd61700_cpu_device::execute_run()
case 0x01: //rou
case 0x03: //biu
{
- UINT8 src = READ_REG(arg);
- UINT8 res = (src<<1)&0xfe;
+ uint8_t src = READ_REG(arg);
+ uint8_t res = (src<<1)&0xfe;
if (!(op1&0x02))
res = res | ((m_flags&FLAG_C) !=0 )<<0;
@@ -602,14 +602,14 @@ void hd61700_cpu_device::execute_run()
case 0x1a:
{
- UINT8 arg = read_op();
- UINT8 op1 = (arg>>5) & 0x03;
+ uint8_t arg = read_op();
+ uint8_t op1 = (arg>>5) & 0x03;
switch (op1)
{
case 0x00: //did
case 0x01: //diu
{
- UINT8 res;
+ uint8_t res;
if (op1&0x01)
res = (READ_REG(arg)<<4)&0xf0;
@@ -639,8 +639,8 @@ void hd61700_cpu_device::execute_run()
case 0x1b: //cmp/inv
{
- UINT8 arg = read_op();
- UINT8 res = ~(READ_REG(arg));
+ uint8_t arg = read_op();
+ uint8_t res = ~(READ_REG(arg));
if (!(arg & 0x40)) res++;
WRITE_REG(arg, res);
@@ -657,8 +657,8 @@ void hd61700_cpu_device::execute_run()
case 0x1c: //gpo/gfl
{
- UINT8 arg = read_op();
- UINT8 src;
+ uint8_t arg = read_op();
+ uint8_t src;
if (arg&0x40)
{
@@ -679,7 +679,7 @@ void hd61700_cpu_device::execute_run()
case 0x1d: //gsr
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
WRITE_REG(arg, READ_SREG(arg));
check_optional_jr(arg);
m_icount -= 3;
@@ -689,8 +689,8 @@ void hd61700_cpu_device::execute_run()
case 0x1e: //gst
case 0x1f: //gst
{
- UINT8 arg = read_op();
- UINT8 idx = GET_REG_IDX(op, arg);
+ uint8_t arg = read_op();
+ uint8_t idx = GET_REG_IDX(op, arg);
WRITE_REG(arg, READ_REG8(idx));
check_optional_jr(arg);
m_icount -= 3;
@@ -700,8 +700,8 @@ void hd61700_cpu_device::execute_run()
case 0x20: //st
case 0x22: //sti
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IX;
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IX;
REG_IX += get_sign_mreg(arg);
mem_writebyte(REG_UA>>4, REG_IX++, READ_REG(arg));
@@ -715,8 +715,8 @@ void hd61700_cpu_device::execute_run()
case 0x21: //st
case 0x23: //sti
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IZ;
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IZ;
REG_IZ += get_sign_mreg(arg);
mem_writebyte(REG_UA>>6, REG_IZ++, READ_REG(arg));
@@ -729,7 +729,7 @@ void hd61700_cpu_device::execute_run()
case 0x24: //std
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
REG_IX += get_sign_mreg(arg);
mem_writebyte(REG_UA>>4, REG_IX, READ_REG(arg));
@@ -739,7 +739,7 @@ void hd61700_cpu_device::execute_run()
case 0x25: //std
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
REG_IZ += get_sign_mreg(arg);
mem_writebyte(REG_UA>>6, REG_IZ, READ_REG(arg));
@@ -749,7 +749,7 @@ void hd61700_cpu_device::execute_run()
case 0x26: //phs
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
push(REG_SS, READ_REG(arg));
m_icount -= 9;
@@ -757,7 +757,7 @@ void hd61700_cpu_device::execute_run()
break;
case 0x27: //phu
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
push(REG_US, READ_REG(arg));
m_icount -= 9;
@@ -767,8 +767,8 @@ void hd61700_cpu_device::execute_run()
case 0x28: //ld
case 0x2a: //ldi
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IX;
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IX;
REG_IX += get_sign_mreg(arg);
WRITE_REG(arg, mem_readbyte(REG_UA>>4, REG_IX++));
@@ -782,8 +782,8 @@ void hd61700_cpu_device::execute_run()
case 0x29: //ld
case 0x2b: //ldi
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IZ;
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IZ;
REG_IZ += get_sign_mreg(arg);
WRITE_REG(arg, mem_readbyte(REG_UA>>6, REG_IZ++));
@@ -796,7 +796,7 @@ void hd61700_cpu_device::execute_run()
case 0x2c: //ldd
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
REG_IX += get_sign_mreg(arg);
WRITE_REG(arg, mem_readbyte(REG_UA>>4, REG_IX));
@@ -807,7 +807,7 @@ void hd61700_cpu_device::execute_run()
case 0x2d: //ldd
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
REG_IZ += get_sign_mreg(arg);
WRITE_REG(arg, mem_readbyte(REG_UA>>6, REG_IZ));
@@ -818,7 +818,7 @@ void hd61700_cpu_device::execute_run()
case 0x2e: //pps
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
WRITE_REG(arg, pop(REG_SS));
m_icount -= 11;
@@ -826,7 +826,7 @@ void hd61700_cpu_device::execute_run()
break;
case 0x2f: //ppu
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
WRITE_REG(arg, pop(REG_US));
m_icount -= 11;
@@ -842,9 +842,9 @@ void hd61700_cpu_device::execute_run()
case 0x36: //jp nlz
case 0x37: //unconditional jp
{
- UINT8 lsb = read_op();
+ uint8_t lsb = read_op();
if (m_pc < INT_ROM) read_op();
- UINT8 msb = read_op();
+ uint8_t msb = read_op();
if (check_cond(op))
set_pc((msb<<8) | lsb);
@@ -857,11 +857,11 @@ void hd61700_cpu_device::execute_run()
case 0x3c: //ad
case 0x3e: //sb
{
- UINT8 arg = read_op();
- UINT16 offset = REG_IX + get_sign_mreg(arg);
- UINT8 src = mem_readbyte(REG_UA>>4, offset);
+ uint8_t arg = read_op();
+ uint16_t offset = REG_IX + get_sign_mreg(arg);
+ uint8_t src = mem_readbyte(REG_UA>>4, offset);
- UINT16 res = src + ((op & 2) ? -READ_REG(arg) : +READ_REG(arg)) ;
+ uint16_t res = src + ((op & 2) ? -READ_REG(arg) : +READ_REG(arg)) ;
if ((op & 4))
mem_writebyte(REG_UA>>4, offset, res & 0xff);
@@ -880,11 +880,11 @@ void hd61700_cpu_device::execute_run()
case 0x3d: //ad
case 0x3f: //sb
{
- UINT8 arg = read_op();
- UINT16 offset = REG_IZ + get_sign_mreg(arg);
- UINT8 src = mem_readbyte(REG_UA>>6, offset);
+ uint8_t arg = read_op();
+ uint16_t offset = REG_IZ + get_sign_mreg(arg);
+ uint8_t src = mem_readbyte(REG_UA>>6, offset);
- UINT16 res = src + ((op & 2) ? -READ_REG(arg) : +READ_REG(arg)) ;
+ uint16_t res = src + ((op & 2) ? -READ_REG(arg) : +READ_REG(arg)) ;
if ((op & 4))
mem_writebyte(REG_UA>>6, offset, res & 0xff);
@@ -903,9 +903,9 @@ void hd61700_cpu_device::execute_run()
case 0x48: //ad
case 0x49: //sb
{
- UINT8 arg = read_op();
- UINT8 src = read_op();
- UINT16 res = READ_REG(arg) + ((op&1) ? -src : +src);
+ uint8_t arg = read_op();
+ uint8_t src = read_op();
+ uint16_t res = READ_REG(arg) + ((op&1) ? -src : +src);
COND_WRITE_REG(op, arg, res & 0xff);
@@ -921,8 +921,8 @@ void hd61700_cpu_device::execute_run()
case 0x42: //ld
{
- UINT8 arg = read_op();
- UINT8 src = read_op() ;
+ uint8_t arg = read_op();
+ uint8_t src = read_op() ;
WRITE_REG(arg, src);
@@ -940,10 +940,10 @@ void hd61700_cpu_device::execute_run()
case 0x4e: //or
case 0x4f: //xr
{
- UINT8 arg = read_op();
- UINT8 src = read_op();
+ uint8_t arg = read_op();
+ uint8_t src = read_op();
- UINT8 res = make_logic(op, READ_REG(arg), src);
+ uint8_t res = make_logic(op, READ_REG(arg), src);
COND_WRITE_REG(op, arg, res);
@@ -963,9 +963,9 @@ void hd61700_cpu_device::execute_run()
case 0x4a: //adb
case 0x4b: //sbb
{
- UINT8 arg = read_op();
- UINT8 src = read_op();
- UINT16 res;
+ uint8_t arg = read_op();
+ uint8_t src = read_op();
+ uint16_t res;
if (op & 0x01)
res = make_bcd_sub(READ_REG(arg), src);
@@ -986,9 +986,9 @@ void hd61700_cpu_device::execute_run()
case 0x50: //st
{
- UINT8 arg = read_op();
- UINT8 src = read_op();
- UINT16 offset = REG_GET16(READ_SREG(arg));
+ uint8_t arg = read_op();
+ uint8_t src = read_op();
+ uint16_t offset = REG_GET16(READ_SREG(arg));
mem_writebyte(REG_UA>>4, offset, src);
m_icount -= 8;
@@ -997,8 +997,8 @@ void hd61700_cpu_device::execute_run()
case 0x51: //ld
{
- UINT8 arg = read_op();
- UINT8 src = read_op();
+ uint8_t arg = read_op();
+ uint8_t src = read_op();
WRITE_REG(arg, src);
m_icount -= 8;
@@ -1007,7 +1007,7 @@ void hd61700_cpu_device::execute_run()
case 0x52: //stl
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
m_lcd_write_cb((offs_t)0, arg);
m_icount -= 12;
@@ -1016,8 +1016,8 @@ void hd61700_cpu_device::execute_run()
case 0x54: //ppo/pfl
{
- UINT8 arg = read_op();
- UINT8 src = read_op();
+ uint8_t arg = read_op();
+ uint8_t src = read_op();
if (arg & 0x40)
{
@@ -1034,7 +1034,7 @@ void hd61700_cpu_device::execute_run()
case 0x55: //psr
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
WRITE_SREG(arg, arg);
m_icount -= 3;
@@ -1044,9 +1044,9 @@ void hd61700_cpu_device::execute_run()
case 0x56: //pst
case 0x57: //pst
{
- UINT8 arg = read_op();
- UINT8 src = read_op();
- UINT8 idx = GET_REG_IDX(op, arg);
+ uint8_t arg = read_op();
+ uint8_t src = read_op();
+ uint8_t idx = GET_REG_IDX(op, arg);
switch (idx)
{
@@ -1083,9 +1083,9 @@ void hd61700_cpu_device::execute_run()
case 0x58: //bups
case 0x59: //bdns
{
- UINT8 arg = read_op();
- UINT8 tmp;
- UINT16 res;
+ uint8_t arg = read_op();
+ uint8_t tmp;
+ uint16_t res;
for(;;)
{
@@ -1113,8 +1113,8 @@ void hd61700_cpu_device::execute_run()
case 0x5c: //sup
case 0x5d: //sdn
{
- UINT8 arg = read_op();
- UINT16 res;
+ uint8_t arg = read_op();
+ uint16_t res;
for(;;)
{
@@ -1139,8 +1139,8 @@ void hd61700_cpu_device::execute_run()
case 0x60: //st
case 0x62: //sti
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IX;
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IX;
REG_IX += get_sign_im8(arg);
mem_writebyte(REG_UA>>4, REG_IX++, READ_REG(arg));
@@ -1154,8 +1154,8 @@ void hd61700_cpu_device::execute_run()
case 0x61: //st
case 0x63: //sti
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IZ;
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IZ;
REG_IZ += get_sign_im8(arg);
mem_writebyte(REG_UA>>6, REG_IZ++, READ_REG(arg));
@@ -1167,7 +1167,7 @@ void hd61700_cpu_device::execute_run()
case 0x64: //std
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
REG_IX += get_sign_im8(arg);
mem_writebyte(REG_UA>>4, REG_IX, READ_REG(arg));
@@ -1177,7 +1177,7 @@ void hd61700_cpu_device::execute_run()
case 0x65: //std
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
REG_IZ += get_sign_im8(arg);
mem_writebyte(REG_UA>>6, REG_IZ, READ_REG(arg));
@@ -1188,8 +1188,8 @@ void hd61700_cpu_device::execute_run()
case 0x68: //ld
case 0x6a: //ldi
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IX;
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IX;
REG_IX += get_sign_im8(arg);
WRITE_REG(arg, mem_readbyte(REG_UA>>4, REG_IX++));
@@ -1202,8 +1202,8 @@ void hd61700_cpu_device::execute_run()
case 0x69: //ld
case 0x6b: //ldi
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IZ;
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IZ;
REG_IZ += get_sign_im8(arg);
WRITE_REG(arg, mem_readbyte(REG_UA>>6, REG_IZ++));
@@ -1215,7 +1215,7 @@ void hd61700_cpu_device::execute_run()
case 0x6c: //ldd
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
REG_IX += get_sign_im8(arg);
WRITE_REG(arg, mem_readbyte(REG_UA>>4, REG_IX));
@@ -1225,7 +1225,7 @@ void hd61700_cpu_device::execute_run()
case 0x6d: //ldd
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
REG_IZ += get_sign_im8(arg);
WRITE_REG(arg, mem_readbyte(REG_UA>>6, REG_IZ));
@@ -1242,9 +1242,9 @@ void hd61700_cpu_device::execute_run()
case 0x76: //cal nlz
case 0x77: //unconditional cal
{
- UINT8 lsb = read_op();
+ uint8_t lsb = read_op();
if (m_pc < INT_ROM) read_op();
- UINT8 msb = read_op();
+ uint8_t msb = read_op();
if (check_cond(op))
{
@@ -1264,11 +1264,11 @@ void hd61700_cpu_device::execute_run()
case 0x7c: //ad
case 0x7e: //sb
{
- UINT8 arg = read_op();
- UINT16 offset = REG_IX + get_sign_im8(arg);
- UINT8 src = mem_readbyte(REG_UA>>4, offset);
+ uint8_t arg = read_op();
+ uint16_t offset = REG_IX + get_sign_im8(arg);
+ uint8_t src = mem_readbyte(REG_UA>>4, offset);
- UINT16 res = src + ((op & 2) ? -READ_REG(arg) : +READ_REG(arg)) ;
+ uint16_t res = src + ((op & 2) ? -READ_REG(arg) : +READ_REG(arg)) ;
if ((op & 4))
mem_writebyte(REG_UA>>4, offset, res & 0xff);
@@ -1287,11 +1287,11 @@ void hd61700_cpu_device::execute_run()
case 0x7d: //ad
case 0x7f: //sb
{
- UINT8 arg = read_op();
- UINT16 offset = REG_IZ + get_sign_im8(arg);
- UINT8 src = mem_readbyte(REG_UA>>6, offset);
+ uint8_t arg = read_op();
+ uint16_t offset = REG_IZ + get_sign_im8(arg);
+ uint8_t src = mem_readbyte(REG_UA>>6, offset);
- UINT16 res = src + ((op & 2) ? -READ_REG(arg) : +READ_REG(arg)) ;
+ uint16_t res = src + ((op & 2) ? -READ_REG(arg) : +READ_REG(arg)) ;
if ((op & 4))
mem_writebyte(REG_UA>>6, offset, res & 0xff);
@@ -1310,9 +1310,9 @@ void hd61700_cpu_device::execute_run()
case 0x88: //adw
case 0x89: //sbw
{
- UINT8 arg = read_op();
- UINT8 src = get_sir_im8(arg);
- UINT32 res = REG_GET16(arg) + ((op & 0x01) ? -REG_GET16(src) : +REG_GET16(src));
+ uint8_t arg = read_op();
+ uint8_t src = get_sir_im8(arg);
+ uint32_t res = REG_GET16(arg) + ((op & 0x01) ? -REG_GET16(src) : +REG_GET16(src));
if (op & 0x08) REG_PUT16(arg, res&0xffff);
@@ -1328,8 +1328,8 @@ void hd61700_cpu_device::execute_run()
case 0x82: //ldw
{
- UINT8 arg = read_op();
- UINT8 src = get_sir_im8(arg);
+ uint8_t arg = read_op();
+ uint8_t src = get_sir_im8(arg);
COPY_REG(arg, src);
COPY_REG(arg+1, src+1);
@@ -1348,13 +1348,13 @@ void hd61700_cpu_device::execute_run()
case 0x8e: //orw
case 0x8f: //xrw
{
- UINT8 arg = read_op();
- UINT8 src = get_sir_im8(arg);
+ uint8_t arg = read_op();
+ uint8_t src = get_sir_im8(arg);
- UINT8 res0 = make_logic(op, READ_REG(arg), READ_REG(src));
+ uint8_t res0 = make_logic(op, READ_REG(arg), READ_REG(src));
COND_WRITE_REG(op, arg, res0);
- UINT8 res1 = make_logic(op, READ_REG(arg+1), READ_REG(src+1));
+ uint8_t res1 = make_logic(op, READ_REG(arg+1), READ_REG(src+1));
COND_WRITE_REG(op, arg+1, res1);
CLEAR_FLAGS;
@@ -1373,9 +1373,9 @@ void hd61700_cpu_device::execute_run()
case 0x8a: //adbw
case 0x8b: //sbbw
{
- UINT8 arg = read_op();
- UINT8 src = get_sir_im8(arg);
- UINT16 res0, res1;
+ uint8_t arg = read_op();
+ uint8_t src = get_sir_im8(arg);
+ uint16_t res0, res1;
if (op & 0x01)
res0 = make_bcd_sub(READ_REG(arg), READ_REG(src));
@@ -1405,9 +1405,9 @@ void hd61700_cpu_device::execute_run()
case 0x90: //stw
{
- UINT8 arg = read_op();
- UINT8 src = get_sir_im8(arg);
- UINT16 offset = REG_GET16(src);
+ uint8_t arg = read_op();
+ uint8_t src = get_sir_im8(arg);
+ uint16_t offset = REG_GET16(src);
mem_writebyte(REG_UA>>4, offset+0, READ_REG(arg+0));
mem_writebyte(REG_UA>>4, offset+1, READ_REG(arg+1));
@@ -1419,9 +1419,9 @@ void hd61700_cpu_device::execute_run()
case 0x91: //ldw
{
- UINT8 arg = read_op();
- UINT8 src = get_sir_im8(arg);
- UINT16 offset = REG_GET16(src);
+ uint8_t arg = read_op();
+ uint8_t src = get_sir_im8(arg);
+ uint16_t offset = REG_GET16(src);
WRITE_REG(arg+0, mem_readbyte(REG_UA>>4, offset+0));
WRITE_REG(arg+1, mem_readbyte(REG_UA>>4, offset+1));
@@ -1433,7 +1433,7 @@ void hd61700_cpu_device::execute_run()
case 0x92: //stlw
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
m_lcd_write_cb((offs_t)0, READ_REG(arg));
m_lcd_write_cb((offs_t)0, READ_REG(arg+1));
@@ -1445,8 +1445,8 @@ void hd61700_cpu_device::execute_run()
case 0x93: //ldcw
{
- UINT8 arg = read_op();
- UINT8 reg0, reg1;
+ uint8_t arg = read_op();
+ uint8_t reg0, reg1;
reg0 = m_lcd_read_cb(0);
reg1 = m_lcd_read_cb(0);
@@ -1462,8 +1462,8 @@ void hd61700_cpu_device::execute_run()
case 0x96: //pre
case 0x97: //pre
{
- UINT8 arg = read_op();
- UINT8 idx = GET_REG_IDX(op, arg);
+ uint8_t arg = read_op();
+ uint8_t idx = GET_REG_IDX(op, arg);
if (idx < 5)
m_reg16bit[idx] = REG_GET16(arg);
@@ -1475,15 +1475,15 @@ void hd61700_cpu_device::execute_run()
case 0x98: //rodw
{
- UINT8 arg = read_op();
- UINT8 op1 = (arg>>5) & 0x03;
+ uint8_t arg = read_op();
+ uint8_t op1 = (arg>>5) & 0x03;
switch (op1)
{
case 0x00: //rodw
case 0x02: //bidw
{
- UINT16 src = REG_GET16(arg-1);
- UINT16 res = (src>>1)&0x7fff;
+ uint16_t src = REG_GET16(arg-1);
+ uint16_t res = (src>>1)&0x7fff;
if (!(op1&0x02))
res = res | ((m_flags&FLAG_C) !=0 )<<15;
@@ -1500,8 +1500,8 @@ void hd61700_cpu_device::execute_run()
case 0x01: //rouw
case 0x03: //biuw
{
- UINT16 src = REG_GET16(arg);
- UINT16 res = (src<<1)&0xfffe;
+ uint16_t src = REG_GET16(arg);
+ uint16_t res = (src<<1)&0xfffe;
if (!(op1&0x02))
res = res | ((m_flags&FLAG_C) !=0 )<<0;
@@ -1523,13 +1523,13 @@ void hd61700_cpu_device::execute_run()
case 0x9a:
{
- UINT8 arg = read_op();
- UINT8 op1 = (arg>>5) & 0x03;
+ uint8_t arg = read_op();
+ uint8_t op1 = (arg>>5) & 0x03;
switch (op1)
{
case 0x00: //didw
{
- UINT16 src = (REG_GET16(arg-1)>>4)&0x0fff;
+ uint16_t src = (REG_GET16(arg-1)>>4)&0x0fff;
REG_PUT16(arg-1, src);
CLEAR_FLAGS;
@@ -1540,7 +1540,7 @@ void hd61700_cpu_device::execute_run()
case 0x01: //diuw
{
- UINT16 src = (REG_GET16(arg)<<4)&0xfff0;
+ uint16_t src = (REG_GET16(arg)<<4)&0xfff0;
REG_PUT16(arg, src);
CLEAR_FLAGS;
@@ -1551,7 +1551,7 @@ void hd61700_cpu_device::execute_run()
case 0x02: //bydw
{
- UINT8 src = READ_REG(arg);
+ uint8_t src = READ_REG(arg);
WRITE_REG(arg, 0);
WRITE_REG(arg-1, src);
@@ -1564,7 +1564,7 @@ void hd61700_cpu_device::execute_run()
case 0x03: //byuw
{
- UINT8 src = READ_REG(arg);
+ uint8_t src = READ_REG(arg);
WRITE_REG(arg, 0);
WRITE_REG(arg+1, src);
@@ -1583,8 +1583,8 @@ void hd61700_cpu_device::execute_run()
case 0x9b: //cmpw/invw
{
- UINT8 arg = read_op();
- UINT16 res = ~(REG_GET16(arg));
+ uint8_t arg = read_op();
+ uint16_t res = ~(REG_GET16(arg));
if (!(arg & 0x40)) res++;
REG_PUT16(arg, res);
@@ -1602,8 +1602,8 @@ void hd61700_cpu_device::execute_run()
case 0x9c: //gpow/gflw
{
- UINT8 arg = read_op();
- UINT8 reg0, reg1;
+ uint8_t arg = read_op();
+ uint8_t reg0, reg1;
if (arg&0x40)
{
@@ -1630,13 +1630,13 @@ void hd61700_cpu_device::execute_run()
case 0x9e: //gre
case 0x9f: //gre
{
- UINT8 arg = read_op();
- UINT8 idx = GET_REG_IDX(op, arg);
- UINT16 src;
+ uint8_t arg = read_op();
+ uint8_t idx = GET_REG_IDX(op, arg);
+ uint16_t src;
if (idx >= 5)
{
- UINT16 port = m_kb_read_cb(0);
+ uint16_t port = m_kb_read_cb(0);
src = (REG_KY & 0x0f00) | (port & 0xf0ff);
}
else
@@ -1652,9 +1652,9 @@ void hd61700_cpu_device::execute_run()
case 0xa0: //stw
case 0xa2: //stiw
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IX;
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IX;
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
REG_IX += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -1669,9 +1669,9 @@ void hd61700_cpu_device::execute_run()
case 0xa1: //stw
case 0xa3: //stiw
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IZ;
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IZ;
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
REG_IZ += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -1685,8 +1685,8 @@ void hd61700_cpu_device::execute_run()
case 0xa4: //stdw
{
- UINT8 arg = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
REG_IX += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -1698,8 +1698,8 @@ void hd61700_cpu_device::execute_run()
break;
case 0xa5: //stdw
{
- UINT8 arg = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
REG_IZ += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -1712,7 +1712,7 @@ void hd61700_cpu_device::execute_run()
case 0xa6: //phsw
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
push(REG_SS, READ_REG(arg));
push(REG_SS, READ_REG(arg-1));
@@ -1721,7 +1721,7 @@ void hd61700_cpu_device::execute_run()
break;
case 0xa7: //phuw
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
push(REG_US, READ_REG(arg));
push(REG_US, READ_REG(arg-1));
@@ -1732,9 +1732,9 @@ void hd61700_cpu_device::execute_run()
case 0xa8: //ldw
case 0xaa: //ldiw
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IX;
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IX;
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
REG_IX += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -1750,9 +1750,9 @@ void hd61700_cpu_device::execute_run()
case 0xa9: //ldw
case 0xab: //ldiw
{
- UINT8 arg = read_op();
- UINT16 prev_ir = REG_IZ;
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint16_t prev_ir = REG_IZ;
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
REG_IZ += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -1767,8 +1767,8 @@ void hd61700_cpu_device::execute_run()
case 0xac: //lddw
{
- UINT8 arg = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
REG_IX += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -1781,8 +1781,8 @@ void hd61700_cpu_device::execute_run()
case 0xad: //lddw
{
- UINT8 arg = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
REG_IZ += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -1796,7 +1796,7 @@ void hd61700_cpu_device::execute_run()
case 0xae: //ppsw
case 0xaf: //ppuw
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
WRITE_REG(arg, pop((op&1) ? REG_US : REG_SS));
WRITE_REG(arg+1, pop((op&1) ? REG_US : REG_SS));
@@ -1814,8 +1814,8 @@ void hd61700_cpu_device::execute_run()
case 0xb6: //jr nlz
case 0xb7: //unconditional jr
{
- UINT8 arg = read_op();
- UINT32 new_pc = m_pc-1 + get_im_7(arg);
+ uint8_t arg = read_op();
+ uint32_t new_pc = m_pc-1 + get_im_7(arg);
if (check_cond(op))
set_pc(new_pc);
@@ -1826,13 +1826,13 @@ void hd61700_cpu_device::execute_run()
case 0xb8: //adcw
case 0xbc: //adw
{
- UINT8 arg = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
- UINT16 offset = REG_IX + ((arg & 0x80) ? -ir_inc : +ir_inc);
+ uint16_t offset = REG_IX + ((arg & 0x80) ? -ir_inc : +ir_inc);
- UINT16 src0 = mem_readbyte(REG_UA>>4, offset) + READ_REG(arg);
- UINT16 src1 = mem_readbyte(REG_UA>>4, offset+1) + READ_REG(arg+1) + ((src0>0xff) ? 1 : 0);
+ uint16_t src0 = mem_readbyte(REG_UA>>4, offset) + READ_REG(arg);
+ uint16_t src1 = mem_readbyte(REG_UA>>4, offset+1) + READ_REG(arg+1) + ((src0>0xff) ? 1 : 0);
if (op&0x04)
{
@@ -1852,13 +1852,13 @@ void hd61700_cpu_device::execute_run()
case 0xba: //sbcw
case 0xbe: //sbw
{
- UINT8 arg = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
- UINT16 offset = REG_IX + ((arg & 0x80) ? -ir_inc : +ir_inc);
+ uint16_t offset = REG_IX + ((arg & 0x80) ? -ir_inc : +ir_inc);
- UINT16 src0 = mem_readbyte(REG_UA>>4, offset) - READ_REG(arg);
- UINT16 src1 = mem_readbyte(REG_UA>>4, offset+1) - READ_REG(arg+1) - ((src0>0xff) ? 1 : 0);
+ uint16_t src0 = mem_readbyte(REG_UA>>4, offset) - READ_REG(arg);
+ uint16_t src1 = mem_readbyte(REG_UA>>4, offset+1) - READ_REG(arg+1) - ((src0>0xff) ? 1 : 0);
if (op&0x04)
{
@@ -1878,13 +1878,13 @@ void hd61700_cpu_device::execute_run()
case 0xb9: //adcw
case 0xbd: //adw
{
- UINT8 arg = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
- UINT16 offset = REG_IZ + ((arg & 0x80) ? -ir_inc : +ir_inc);
+ uint16_t offset = REG_IZ + ((arg & 0x80) ? -ir_inc : +ir_inc);
- UINT16 src0 = mem_readbyte(REG_UA>>6, offset) + READ_REG(arg);
- UINT16 src1 = mem_readbyte(REG_UA>>6, offset+1) + READ_REG(arg+1) + ((src0>0xff) ? 1 : 0);
+ uint16_t src0 = mem_readbyte(REG_UA>>6, offset) + READ_REG(arg);
+ uint16_t src1 = mem_readbyte(REG_UA>>6, offset+1) + READ_REG(arg+1) + ((src0>0xff) ? 1 : 0);
if (op&0x04)
{
@@ -1904,13 +1904,13 @@ void hd61700_cpu_device::execute_run()
case 0xbb: //sbcw
case 0xbf: //sbw
{
- UINT8 arg = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg));
+ uint8_t arg = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg));
- UINT16 offset = REG_IZ + ((arg & 0x80) ? -ir_inc : +ir_inc);
+ uint16_t offset = REG_IZ + ((arg & 0x80) ? -ir_inc : +ir_inc);
- UINT16 src0 = mem_readbyte(REG_UA>>6, offset) - READ_REG(arg);
- UINT16 src1 = mem_readbyte(REG_UA>>6, offset+1) - READ_REG(arg+1) - ((src0>0xff) ? 1 : 0);
+ uint16_t src0 = mem_readbyte(REG_UA>>6, offset) - READ_REG(arg);
+ uint16_t src1 = mem_readbyte(REG_UA>>6, offset+1) - READ_REG(arg+1) - ((src0>0xff) ? 1 : 0);
if (op&0x04)
{
@@ -1932,12 +1932,12 @@ void hd61700_cpu_device::execute_run()
case 0xc8: //adbm
case 0xc9: //sbbm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 dst = arg;
- UINT8 src = get_sir_im8(arg, arg1);
- UINT8 c, f;
- UINT16 res = 0;
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t dst = arg;
+ uint8_t src = get_sir_im8(arg, arg1);
+ uint8_t c, f;
+ uint16_t res = 0;
c = f = 0;
for (int n=GET_IM3(arg1); n>0; n--)
@@ -1969,10 +1969,10 @@ void hd61700_cpu_device::execute_run()
case 0xc2: //ldm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 dst = arg;
- UINT8 src = get_sir_im8(arg, arg1);
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t dst = arg;
+ uint8_t src = get_sir_im8(arg, arg1);
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -1994,11 +1994,11 @@ void hd61700_cpu_device::execute_run()
case 0xce: //orm
case 0xcf: //xrm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 dst = arg;
- UINT8 src = get_sir_im8(arg, arg1);
- UINT8 res = 0, f = 0;
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t dst = arg;
+ uint8_t src = get_sir_im8(arg, arg1);
+ uint8_t res = 0, f = 0;
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2028,11 +2028,11 @@ void hd61700_cpu_device::execute_run()
case 0xca: //adbm
case 0xcb: //sbbm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 dst = arg;
- UINT16 res = 0;
- UINT8 src, f;
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t dst = arg;
+ uint16_t res = 0;
+ uint8_t src, f;
src = arg1 & 0x1f;
f = 0;
@@ -2065,8 +2065,8 @@ void hd61700_cpu_device::execute_run()
case 0xd0: //stw
{
- UINT8 arg = read_op();
- UINT16 offset = REG_GET16(READ_SREG(arg));
+ uint8_t arg = read_op();
+ uint16_t offset = REG_GET16(READ_SREG(arg));
mem_writebyte(REG_UA>>4, offset+0, read_op());
mem_writebyte(REG_UA>>4, offset+1, read_op());
@@ -2077,9 +2077,9 @@ void hd61700_cpu_device::execute_run()
case 0xd1: //ldw
{
- UINT8 arg = read_op();
- UINT8 reg0 = read_op();
- UINT8 reg1 = read_op();
+ uint8_t arg = read_op();
+ uint8_t reg0 = read_op();
+ uint8_t reg1 = read_op();
WRITE_REG(arg+0, reg0);
WRITE_REG(arg+1, reg1);
@@ -2089,8 +2089,8 @@ void hd61700_cpu_device::execute_run()
case 0xd2: //stlm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2106,9 +2106,9 @@ void hd61700_cpu_device::execute_run()
case 0xd3: //ldlm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 src;
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t src;
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2126,10 +2126,10 @@ void hd61700_cpu_device::execute_run()
case 0xd6: //pre
case 0xd7: //pre
{
- UINT8 arg = read_op();
- UINT8 lsb = read_op();
- UINT8 msb = read_op();
- UINT8 idx = GET_REG_IDX(op, arg);
+ uint8_t arg = read_op();
+ uint8_t lsb = read_op();
+ uint8_t msb = read_op();
+ uint8_t idx = GET_REG_IDX(op, arg);
if (idx < 5)
m_reg16bit[idx] = (msb<<8) | lsb;
@@ -2141,7 +2141,7 @@ void hd61700_cpu_device::execute_run()
case 0xd8: //bup
case 0xd9: //bdn
{
- UINT8 src;
+ uint8_t src;
for(;;)
{
src = mem_readbyte(REG_UA>>4, REG_IX);
@@ -2161,14 +2161,14 @@ void hd61700_cpu_device::execute_run()
case 0xda:
{
- UINT8 arg = read_op();
- UINT8 op1 = (arg>>5) & 0x03;
+ uint8_t arg = read_op();
+ uint8_t op1 = (arg>>5) & 0x03;
switch (op1)
{
case 0x00: //didm
{
- UINT8 arg1 = read_op();
- UINT8 r1 = 0, r2 = 0;
+ uint8_t arg1 = read_op();
+ uint8_t r1 = 0, r2 = 0;
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2187,8 +2187,8 @@ void hd61700_cpu_device::execute_run()
case 0x01: //dium
{
- UINT8 arg1 = read_op();
- UINT8 r1 = 0, r2 = 0;
+ uint8_t arg1 = read_op();
+ uint8_t r1 = 0, r2 = 0;
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2207,8 +2207,8 @@ void hd61700_cpu_device::execute_run()
case 0x02: //bydm
{
- UINT8 arg1 = read_op();
- UINT8 r1 = 0, r2 = 0, f = 0;
+ uint8_t arg1 = read_op();
+ uint8_t r1 = 0, r2 = 0, f = 0;
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2227,8 +2227,8 @@ void hd61700_cpu_device::execute_run()
case 0x03: //byum
{
- UINT8 arg1 = read_op();
- UINT8 r1 = 0, r2 = 0, f = 0;
+ uint8_t arg1 = read_op();
+ uint8_t r1 = 0, r2 = 0, f = 0;
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2250,9 +2250,9 @@ void hd61700_cpu_device::execute_run()
case 0xdb: //cmpm/invm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 r1 = 0, r2, f = 0;
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t r1 = 0, r2, f = 0;
r2 = (arg&0x40) ? 0 : 1;
@@ -2278,8 +2278,8 @@ void hd61700_cpu_device::execute_run()
case 0xdc: //sup
case 0xdd: //sdn
{
- UINT8 arg = read_op();
- UINT16 res;
+ uint8_t arg = read_op();
+ uint16_t res;
for(;;)
{
@@ -2303,7 +2303,7 @@ void hd61700_cpu_device::execute_run()
case 0xde: //jp
{
- UINT8 arg = read_op();
+ uint8_t arg = read_op();
set_pc(REG_GET16(arg));
m_icount -= 5;
@@ -2312,10 +2312,10 @@ void hd61700_cpu_device::execute_run()
case 0xdf: //jp
{
- UINT8 arg = read_op();
- UINT16 offset = REG_GET16(arg);
- UINT8 lsb = mem_readbyte(REG_UA>>4, offset+0);
- UINT8 msb = mem_readbyte(REG_UA>>4, offset+1);
+ uint8_t arg = read_op();
+ uint16_t offset = REG_GET16(arg);
+ uint8_t lsb = mem_readbyte(REG_UA>>4, offset+0);
+ uint8_t msb = mem_readbyte(REG_UA>>4, offset+1);
set_pc((msb<<8) | lsb);
@@ -2326,10 +2326,10 @@ void hd61700_cpu_device::execute_run()
case 0xe0: //stm
case 0xe2: //stim
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT16 prev_ir = REG_IX;
- UINT8 ir_inc = READ_REG(get_sir_im8(arg, arg1));
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint16_t prev_ir = REG_IX;
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg, arg1));
REG_IX += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -2348,10 +2348,10 @@ void hd61700_cpu_device::execute_run()
case 0xe1: //stm
case 0xe3: //stim
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT16 prev_ir = REG_IZ;
- UINT8 ir_inc = READ_REG(get_sir_im8(arg, arg1));
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint16_t prev_ir = REG_IZ;
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg, arg1));
REG_IZ += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -2369,9 +2369,9 @@ void hd61700_cpu_device::execute_run()
case 0xe4: //stdm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg, arg1));
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg, arg1));
REG_IX += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -2389,9 +2389,9 @@ void hd61700_cpu_device::execute_run()
case 0xe5: //stdm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg, arg1));
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg, arg1));
REG_IZ += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -2410,8 +2410,8 @@ void hd61700_cpu_device::execute_run()
case 0xe6: //phsm
case 0xe7: //phum
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2427,10 +2427,10 @@ void hd61700_cpu_device::execute_run()
case 0xe8: //ldm
case 0xea: //ldim
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT16 prev_ir = REG_IX;
- UINT8 ir_inc = READ_REG(get_sir_im8(arg, arg1));
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint16_t prev_ir = REG_IX;
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg, arg1));
REG_IX += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -2449,10 +2449,10 @@ void hd61700_cpu_device::execute_run()
case 0xe9: //ldm
case 0xeb: //ldim
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT16 prev_ir = REG_IZ;
- UINT8 ir_inc = READ_REG(get_sir_im8(arg, arg1));
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint16_t prev_ir = REG_IZ;
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg, arg1));
REG_IZ += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -2470,9 +2470,9 @@ void hd61700_cpu_device::execute_run()
case 0xec: //lddm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg, arg1));
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg, arg1));
REG_IX += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -2490,9 +2490,9 @@ void hd61700_cpu_device::execute_run()
case 0xed: //lddm
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
- UINT8 ir_inc = READ_REG(get_sir_im8(arg, arg1));
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
+ uint8_t ir_inc = READ_REG(get_sir_im8(arg, arg1));
REG_IZ += ((arg & 0x80) ? -ir_inc : +ir_inc);
@@ -2511,8 +2511,8 @@ void hd61700_cpu_device::execute_run()
case 0xee: //ppsm
case 0xef: //ppum
{
- UINT8 arg = read_op();
- UINT8 arg1 = read_op();
+ uint8_t arg = read_op();
+ uint8_t arg1 = read_op();
for (int n=GET_IM3(arg1); n>0; n--)
{
@@ -2535,8 +2535,8 @@ void hd61700_cpu_device::execute_run()
{
if (check_cond(op))
{
- UINT8 lsb = pop(REG_SS) ;
- UINT8 msb = pop(REG_SS);
+ uint8_t lsb = pop(REG_SS) ;
+ uint8_t msb = pop(REG_SS);
set_pc((((msb<<8) | (lsb<<0)) + 1));
}
@@ -2565,8 +2565,8 @@ void hd61700_cpu_device::execute_run()
case 0xfd: //rtni
{
- UINT8 lsb = pop(REG_SS);
- UINT8 msb = pop(REG_SS);
+ uint8_t lsb = pop(REG_SS);
+ uint8_t msb = pop(REG_SS);
set_pc((msb<<8) | (lsb<<0));
@@ -2576,7 +2576,7 @@ void hd61700_cpu_device::execute_run()
case 0xfc: //cani
{
- for (UINT8 arg=0x10; arg>0; arg>>=1)
+ for (uint8_t arg=0x10; arg>0; arg>>=1)
{
if (REG_IB & arg)
{
@@ -2733,7 +2733,7 @@ void hd61700_cpu_device::execute_set_input(int inputnum, int state)
// INLINE HELPERS
//**************************************************************************
-inline void hd61700_cpu_device::set_pc(INT32 new_pc)
+inline void hd61700_cpu_device::set_pc(int32_t new_pc)
{
m_curpc = (m_curpc & 0x30000) | new_pc;
m_pc = new_pc & 0xffff;
@@ -2741,10 +2741,10 @@ inline void hd61700_cpu_device::set_pc(INT32 new_pc)
m_fetch_addr = new_pc<<1;
}
-inline UINT8 hd61700_cpu_device::read_op()
+inline uint8_t hd61700_cpu_device::read_op()
{
- UINT16 data;
- UINT32 addr18 = make_18bit_addr((m_irq_status) ? 0 : prev_ua, m_pc);
+ uint16_t data;
+ uint32_t addr18 = make_18bit_addr((m_irq_status) ? 0 : prev_ua, m_pc);
if (m_pc <= INT_ROM)
{
@@ -2772,38 +2772,38 @@ inline UINT8 hd61700_cpu_device::read_op()
return (data&0xff);
}
-inline UINT8 hd61700_cpu_device::mem_readbyte(UINT8 segment, UINT16 offset)
+inline uint8_t hd61700_cpu_device::mem_readbyte(uint8_t segment, uint16_t offset)
{
return m_program->read_word(make_18bit_addr(segment, offset)<<1) & 0xff;
}
-inline void hd61700_cpu_device::mem_writebyte(UINT8 segment, UINT16 offset, UINT8 data)
+inline void hd61700_cpu_device::mem_writebyte(uint8_t segment, uint16_t offset, uint8_t data)
{
m_program->write_word(make_18bit_addr(segment, offset)<<1, data);
}
-inline UINT32 hd61700_cpu_device::make_18bit_addr(UINT8 segment, UINT16 offset)
+inline uint32_t hd61700_cpu_device::make_18bit_addr(uint8_t segment, uint16_t offset)
{
if (offset >= ((REG_IB>>6) & 0x03) * 0x4000)
- return (UINT32)((offset | ((segment&0x03)<<16)) & 0x3ffff);
+ return (uint32_t)((offset | ((segment&0x03)<<16)) & 0x3ffff);
else
return offset;
}
-inline void hd61700_cpu_device::push(UINT16 &offset, UINT8 data)
+inline void hd61700_cpu_device::push(uint16_t &offset, uint8_t data)
{
offset--;
mem_writebyte(REG_UA>>2, offset, data);
}
-inline UINT8 hd61700_cpu_device::pop(UINT16 &offset)
+inline uint8_t hd61700_cpu_device::pop(uint16_t &offset)
{
- UINT8 data = mem_readbyte(REG_UA>>2, offset);
+ uint8_t data = mem_readbyte(REG_UA>>2, offset);
offset++;
return data;
}
-inline int hd61700_cpu_device::check_cond(UINT32 op)
+inline int hd61700_cpu_device::check_cond(uint32_t op)
{
switch ( op & 0x07 )
{
@@ -2849,7 +2849,7 @@ inline int hd61700_cpu_device::check_cond(UINT32 op)
return 0;
}
-inline UINT8 hd61700_cpu_device::make_logic(UINT8 type, UINT8 d1, UINT8 d2)
+inline uint8_t hd61700_cpu_device::make_logic(uint8_t type, uint8_t d1, uint8_t d2)
{
switch (type&3)
{
@@ -2866,26 +2866,26 @@ inline UINT8 hd61700_cpu_device::make_logic(UINT8 type, UINT8 d1, UINT8 d2)
}
}
-inline void hd61700_cpu_device::check_optional_jr(UINT8 arg)
+inline void hd61700_cpu_device::check_optional_jr(uint8_t arg)
{
if (arg & 0x80)
{
if (m_pc < INT_ROM && WORD_ALIGNED(m_fetch_addr)) read_op();
- UINT8 arg1 = read_op();
+ uint8_t arg1 = read_op();
- UINT32 new_pc = m_pc + get_im_7(arg1) - 1;
+ uint32_t new_pc = m_pc + get_im_7(arg1) - 1;
set_pc(new_pc);
m_icount -= 3;
}
}
-inline UINT8 hd61700_cpu_device::get_sir_im8(UINT8 arg)
+inline uint8_t hd61700_cpu_device::get_sir_im8(uint8_t arg)
{
if (((arg>>5) & 0x03) == 0x03)
{
- UINT8 arg1 = read_op();
+ uint8_t arg1 = read_op();
return arg1&0x1f;
}
@@ -2895,7 +2895,7 @@ inline UINT8 hd61700_cpu_device::get_sir_im8(UINT8 arg)
}
}
-inline UINT8 hd61700_cpu_device::get_sir_im8(UINT8 arg, UINT8 arg1)
+inline uint8_t hd61700_cpu_device::get_sir_im8(uint8_t arg, uint8_t arg1)
{
if (((arg>>5) & 0x03) == 0x03)
{
@@ -2907,7 +2907,7 @@ inline UINT8 hd61700_cpu_device::get_sir_im8(UINT8 arg, UINT8 arg1)
}
}
-inline int hd61700_cpu_device::get_sign_mreg(UINT8 arg)
+inline int hd61700_cpu_device::get_sign_mreg(uint8_t arg)
{
int res = READ_REG(get_sir_im8(arg));
@@ -2916,7 +2916,7 @@ inline int hd61700_cpu_device::get_sign_mreg(UINT8 arg)
return res;
}
-inline int hd61700_cpu_device::get_sign_im8(UINT8 arg)
+inline int hd61700_cpu_device::get_sign_im8(uint8_t arg)
{
int res = read_op();
@@ -2925,7 +2925,7 @@ inline int hd61700_cpu_device::get_sign_im8(UINT8 arg)
return res;
}
-inline int hd61700_cpu_device::get_im_7(UINT8 data)
+inline int hd61700_cpu_device::get_im_7(uint8_t data)
{
if (data&0x80)
return 0x80 - data;
@@ -2933,10 +2933,10 @@ inline int hd61700_cpu_device::get_im_7(UINT8 data)
return data;
}
-inline UINT16 hd61700_cpu_device::make_bcd_sub(UINT8 arg1, UINT8 arg2)
+inline uint16_t hd61700_cpu_device::make_bcd_sub(uint8_t arg1, uint8_t arg2)
{
- UINT32 ret = (arg1&0x0f) - (arg2&0x0f);
- UINT8 carry;
+ uint32_t ret = (arg1&0x0f) - (arg2&0x0f);
+ uint8_t carry;
if (ret > 0x09)
{
@@ -2961,10 +2961,10 @@ inline UINT16 hd61700_cpu_device::make_bcd_sub(UINT8 arg1, UINT8 arg2)
return ret;
}
-inline UINT16 hd61700_cpu_device::make_bcd_add(UINT8 arg1, UINT8 arg2)
+inline uint16_t hd61700_cpu_device::make_bcd_add(uint8_t arg1, uint8_t arg2)
{
- UINT32 ret = (arg1&0x0f) + (arg2&0x0f);
- UINT8 carry;
+ uint32_t ret = (arg1&0x0f) + (arg2&0x0f);
+ uint8_t carry;
if (ret > 0x09)
{
diff --git a/src/devices/cpu/hd61700/hd61700.h b/src/devices/cpu/hd61700/hd61700.h
index 838ea8833bb..ea836e5f51e 100644
--- a/src/devices/cpu/hd61700/hd61700.h
+++ b/src/devices/cpu/hd61700/hd61700.h
@@ -67,7 +67,7 @@ class hd61700_cpu_device : public cpu_device
{
public:
// construction/destruction
- hd61700_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ hd61700_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
template<class _Object> static devcb_base &set_lcd_ctrl_callback(device_t &device, _Object object) { return downcast<hd61700_cpu_device &>(device).m_lcd_ctrl_cb.set_callback(object); }
template<class _Object> static devcb_base &set_lcd_write_callback(device_t &device, _Object object) { return downcast<hd61700_cpu_device &>(device).m_lcd_write_cb.set_callback(object); }
@@ -84,9 +84,9 @@ protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 52; }
- virtual UINT32 execute_input_lines() const override { return 6; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 52; }
+ virtual uint32_t execute_input_lines() const override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -98,31 +98,31 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 16; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 16; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// interrupts
bool check_irqs(void);
// inline helpers
- inline void set_pc(INT32 new_pc);
- inline UINT8 read_op();
- inline UINT8 mem_readbyte(UINT8 segment, UINT16 offset);
- inline void mem_writebyte(UINT8 segment, UINT16 offset, UINT8 data);
- inline UINT32 make_18bit_addr(UINT8 segment, UINT16 offset);
- inline int check_cond( UINT32 op );
- inline void push(UINT16 &offset, UINT8 data);
- inline UINT8 pop(UINT16 &offset);
- inline UINT8 make_logic(UINT8 type, UINT8 d1, UINT8 d2);
- inline void check_optional_jr(UINT8 arg);
- inline UINT8 get_sir_im8(UINT8 arg);
- inline UINT8 get_sir_im8(UINT8 arg, UINT8 arg1);
- inline int get_sign_mreg(UINT8 op1);
- inline int get_sign_im8(UINT8 op1);
- inline int get_im_7(UINT8 data);
- inline UINT16 make_bcd_sub(UINT8 arg1, UINT8 arg2);
- inline UINT16 make_bcd_add(UINT8 arg1, UINT8 arg2);
+ inline void set_pc(int32_t new_pc);
+ inline uint8_t read_op();
+ inline uint8_t mem_readbyte(uint8_t segment, uint16_t offset);
+ inline void mem_writebyte(uint8_t segment, uint16_t offset, uint8_t data);
+ inline uint32_t make_18bit_addr(uint8_t segment, uint16_t offset);
+ inline int check_cond( uint32_t op );
+ inline void push(uint16_t &offset, uint8_t data);
+ inline uint8_t pop(uint16_t &offset);
+ inline uint8_t make_logic(uint8_t type, uint8_t d1, uint8_t d2);
+ inline void check_optional_jr(uint8_t arg);
+ inline uint8_t get_sir_im8(uint8_t arg);
+ inline uint8_t get_sir_im8(uint8_t arg, uint8_t arg1);
+ inline int get_sign_mreg(uint8_t op1);
+ inline int get_sign_im8(uint8_t op1);
+ inline int get_im_7(uint8_t data);
+ inline uint16_t make_bcd_sub(uint8_t arg1, uint8_t arg2);
+ inline uint16_t make_bcd_add(uint8_t arg1, uint8_t arg2);
protected:
@@ -133,16 +133,16 @@ protected:
offs_t m_ppc;
offs_t m_curpc;
- UINT16 m_pc;
- UINT8 m_flags;
- UINT32 m_fetch_addr;
- UINT8 m_regsir[3]; // 5bit register (sx, sy, sz)
- UINT8 m_reg8bit[8]; // 8bit register (pe, pd, ib, ua, ia, ie, tm, tm)
- UINT16 m_reg16bit[8]; // 16bit register (ix, iy, iz, us, ss, ky, ky, ky)
- UINT8 m_regmain[0x20]; // main registers
- UINT8 m_irq_status;
- UINT8 m_state;
- UINT8 prev_ua;
+ uint16_t m_pc;
+ uint8_t m_flags;
+ uint32_t m_fetch_addr;
+ uint8_t m_regsir[3]; // 5bit register (sx, sy, sz)
+ uint8_t m_reg8bit[8]; // 8bit register (pe, pd, ib, ua, ia, ie, tm, tm)
+ uint16_t m_reg16bit[8]; // 16bit register (ix, iy, iz, us, ss, ky, ky, ky)
+ uint8_t m_regmain[0x20]; // main registers
+ uint8_t m_irq_status;
+ uint8_t m_state;
+ uint8_t prev_ua;
int m_lines_status[6];
int m_icount;
diff --git a/src/devices/cpu/hd61700/hd61700d.cpp b/src/devices/cpu/hd61700/hd61700d.cpp
index b5461ec58e8..8d6a73aa9eb 100644
--- a/src/devices/cpu/hd61700/hd61700d.cpp
+++ b/src/devices/cpu/hd61700/hd61700d.cpp
@@ -44,8 +44,8 @@ enum
struct hd61700_dasm
{
const char *str;
- UINT8 arg1;
- UINT8 arg2;
+ uint8_t arg1;
+ uint8_t arg2;
bool optjr;
};
@@ -213,12 +213,12 @@ static const hd61700_dasm hd61700_ops[256] =
};
-inline int dasm_im8(char *buffer, UINT16 pc, int arg, const UINT8 *oprom, int &pos, int type)
+inline int dasm_im8(char *buffer, uint16_t pc, int arg, const uint8_t *oprom, int &pos, int type)
{
if (((arg>>5) & 0x03) == 0x03)
{
INC_POS;
- UINT8 ret = sprintf( buffer, "0x%02x", oprom[POS] & 0x1f );
+ uint8_t ret = sprintf( buffer, "0x%02x", oprom[POS] & 0x1f );
return ret;
}
else
@@ -228,7 +228,7 @@ inline int dasm_im8(char *buffer, UINT16 pc, int arg, const UINT8 *oprom, int &p
}
-inline int dasm_im8(char *buffer, UINT16 pc, int arg, int arg1, const UINT8 *oprom, int &pos)
+inline int dasm_im8(char *buffer, uint16_t pc, int arg, int arg1, const uint8_t *oprom, int &pos)
{
if (((arg>>5) & 0x03) == 0x03)
{
@@ -241,7 +241,7 @@ inline int dasm_im8(char *buffer, UINT16 pc, int arg, int arg1, const UINT8 *opr
}
-int dasm_arg(char *buffer, UINT8 op, UINT16 pc, int arg, const UINT8 *oprom, int &pos)
+int dasm_arg(char *buffer, uint8_t op, uint16_t pc, int arg, const uint8_t *oprom, int &pos)
{
char* buffer_start = buffer;
int type = EXT_ROM;
@@ -302,7 +302,7 @@ int dasm_arg(char *buffer, UINT8 op, UINT16 pc, int arg, const UINT8 *oprom, int
case OP_RMSIM3:
{
- UINT8 tmp = oprom[POS];
+ uint8_t tmp = oprom[POS];
INC_POS;
buffer += dasm_im8(buffer, pc, tmp, oprom[POS], oprom, pos);
buffer += sprintf( buffer, ", 0x%02x", ((tmp>>5)&7)+1);
@@ -312,7 +312,7 @@ int dasm_arg(char *buffer, UINT8 op, UINT16 pc, int arg, const UINT8 *oprom, int
case OP_IR_IM3:
{
- UINT8 tmp = oprom[POS];
+ uint8_t tmp = oprom[POS];
INC_POS;
buffer += sprintf( buffer, "(%s%s", (op&1) ? "iz": "ix", (tmp&0x80) ? "-": "+");
buffer += dasm_im8(buffer, pc, tmp, oprom[POS], oprom, pos);
@@ -357,10 +357,10 @@ int dasm_arg(char *buffer, UINT8 op, UINT16 pc, int arg, const UINT8 *oprom, int
case OP_IM16:
case OP_IM16A:
{
- UINT8 tmp1 = oprom[POS];
+ uint8_t tmp1 = oprom[POS];
INC_POS;
if (!EXT_ROM && arg == OP_IM16A) INC_POS;
- UINT8 tmp2 = oprom[POS];
+ uint8_t tmp2 = oprom[POS];
buffer += sprintf( buffer, "0x%04x", ((tmp2<<8) | tmp1));
INC_POS;
}
@@ -373,7 +373,7 @@ int dasm_arg(char *buffer, UINT8 op, UINT16 pc, int arg, const UINT8 *oprom, int
return buffer - buffer_start;
}
-UINT32 get_dasmflags(UINT8 op)
+uint32_t get_dasmflags(uint8_t op)
{
switch (op)
{
@@ -399,8 +399,8 @@ UINT32 get_dasmflags(UINT8 op)
CPU_DISASSEMBLE( hd61700 )
{
const hd61700_dasm *inst;
- UINT32 dasmflags;
- UINT8 op, op1;
+ uint32_t dasmflags;
+ uint8_t op, op1;
int pos = 0, type = EXT_ROM;
op = oprom[POS];
diff --git a/src/devices/cpu/hmcs40/hmcs40.cpp b/src/devices/cpu/hmcs40/hmcs40.cpp
index c8d2148b861..b9e9f8e904b 100644
--- a/src/devices/cpu/hmcs40/hmcs40.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40.cpp
@@ -78,56 +78,56 @@ ADDRESS_MAP_END
// device definitions
-hmcs43_cpu_device::hmcs43_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 polarity, const char *shortname)
+hmcs43_cpu_device::hmcs43_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint16_t polarity, const char *shortname)
: hmcs40_cpu_device(mconfig, type, name, tag, owner, clock, HMCS40_FAMILY_HMCS43, polarity, 3 /* stack levels */, 10 /* pc width */, 11 /* prg width */, ADDRESS_MAP_NAME(program_1k), 7 /* data width */, ADDRESS_MAP_NAME(data_80x4), shortname, __FILE__)
{ }
-hd38750_device::hd38750_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd38750_device::hd38750_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs43_cpu_device(mconfig, HD38750, "HD38750", tag, owner, clock, IS_PMOS, "hd38750")
{ }
-hd38755_device::hd38755_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd38755_device::hd38755_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs43_cpu_device(mconfig, HD38755, "HD38755", tag, owner, clock, IS_PMOS, "hd38755")
{ }
-hd44750_device::hd44750_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd44750_device::hd44750_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs43_cpu_device(mconfig, HD44750, "HD44750", tag, owner, clock, IS_CMOS, "hd44750")
{ }
-hd44758_device::hd44758_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd44758_device::hd44758_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs43_cpu_device(mconfig, HD44758, "HD44758", tag, owner, clock, IS_CMOS, "hd44758")
{ }
-hmcs44_cpu_device::hmcs44_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 polarity, const char *shortname)
+hmcs44_cpu_device::hmcs44_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint16_t polarity, const char *shortname)
: hmcs40_cpu_device(mconfig, type, name, tag, owner, clock, HMCS40_FAMILY_HMCS44, polarity, 4, 11, 12, ADDRESS_MAP_NAME(program_2k), 8, ADDRESS_MAP_NAME(data_160x4), shortname, __FILE__)
{ }
-hd38800_device::hd38800_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd38800_device::hd38800_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs44_cpu_device(mconfig, HD38800, "HD38800", tag, owner, clock, IS_PMOS, "hd38800")
{ }
-hd38805_device::hd38805_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd38805_device::hd38805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs44_cpu_device(mconfig, HD38805, "HD38805", tag, owner, clock, IS_PMOS, "hd38805")
{ }
-hd44801_device::hd44801_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd44801_device::hd44801_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs44_cpu_device(mconfig, HD44801, "HD44801", tag, owner, clock, IS_CMOS, "hd44801")
{ }
-hd44808_device::hd44808_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd44808_device::hd44808_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs44_cpu_device(mconfig, HD44808, "HD44808", tag, owner, clock, IS_CMOS, "hd44808")
{ }
-hmcs45_cpu_device::hmcs45_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 polarity, const char *shortname)
+hmcs45_cpu_device::hmcs45_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint16_t polarity, const char *shortname)
: hmcs40_cpu_device(mconfig, type, name, tag, owner, clock, HMCS40_FAMILY_HMCS45, polarity, 4, 11, 12, ADDRESS_MAP_NAME(program_2k), 8, ADDRESS_MAP_NAME(data_160x4), shortname, __FILE__)
{ }
-hd38820_device::hd38820_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd38820_device::hd38820_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs45_cpu_device(mconfig, HD38820, "HD38820", tag, owner, clock, IS_PMOS, "hd38820")
{ }
-hd38825_device::hd38825_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd38825_device::hd38825_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs45_cpu_device(mconfig, HD38825, "HD38825", tag, owner, clock, IS_PMOS, "hd38825")
{ }
-hd44820_device::hd44820_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd44820_device::hd44820_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs45_cpu_device(mconfig, HD44820, "HD44820", tag, owner, clock, IS_CMOS, "hd44820")
{ }
-hd44828_device::hd44828_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd44828_device::hd44828_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hmcs45_cpu_device(mconfig, HD44828, "HD44828", tag, owner, clock, IS_CMOS, "hd44828")
{ }
@@ -148,7 +148,7 @@ void hmcs40_cpu_device::state_string_export(const device_state_entry &entry, std
}
}
-offs_t hmcs40_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hmcs40_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(hmcs40);
return CPU_DISASSEMBLE_NAME(hmcs40)(this, buffer, pc, oprom, opram, options);
@@ -306,10 +306,10 @@ void hmcs40_cpu_device::device_reset()
// i/o handling
//-------------------------------------------------
-UINT8 hmcs40_cpu_device::read_r(int index)
+uint8_t hmcs40_cpu_device::read_r(int index)
{
index &= 7;
- UINT8 inp = 0;
+ uint8_t inp = 0;
switch (index)
{
@@ -329,7 +329,7 @@ UINT8 hmcs40_cpu_device::read_r(int index)
return (inp | m_r[index]) & 0xf;
}
-void hmcs40_cpu_device::write_r(int index, UINT8 data)
+void hmcs40_cpu_device::write_r(int index, uint8_t data)
{
index &= 7;
data &= 0xf;
@@ -371,7 +371,7 @@ void hmcs40_cpu_device::write_d(int index, int state)
// R0 is input-only, R1 is i/o, R2,R3 are output-only, no R4-R7
// D0-D3 are i/o, D4-D15 are output-only
-UINT8 hmcs43_cpu_device::read_r(int index)
+uint8_t hmcs43_cpu_device::read_r(int index)
{
index &= 7;
@@ -381,7 +381,7 @@ UINT8 hmcs43_cpu_device::read_r(int index)
return hmcs40_cpu_device::read_r(index);
}
-void hmcs43_cpu_device::write_r(int index, UINT8 data)
+void hmcs43_cpu_device::write_r(int index, uint8_t data)
{
index &= 7;
@@ -405,7 +405,7 @@ int hmcs43_cpu_device::read_d(int index)
// R0-R3 are i/o, R4,R5 are extra registers, no R6,R7
// D0-D15 are i/o
-UINT8 hmcs44_cpu_device::read_r(int index)
+uint8_t hmcs44_cpu_device::read_r(int index)
{
index &= 7;
@@ -415,7 +415,7 @@ UINT8 hmcs44_cpu_device::read_r(int index)
return hmcs40_cpu_device::read_r(index);
}
-void hmcs44_cpu_device::write_r(int index, UINT8 data)
+void hmcs44_cpu_device::write_r(int index, uint8_t data)
{
index &= 7;
@@ -429,7 +429,7 @@ void hmcs44_cpu_device::write_r(int index, UINT8 data)
// R0-R5 are i/o, R6 is output-only, no R7
// D0-D15 are i/o
-UINT8 hmcs45_cpu_device::read_r(int index)
+uint8_t hmcs45_cpu_device::read_r(int index)
{
index &= 7;
@@ -439,7 +439,7 @@ UINT8 hmcs45_cpu_device::read_r(int index)
return hmcs40_cpu_device::read_r(index);
}
-void hmcs45_cpu_device::write_r(int index, UINT8 data)
+void hmcs45_cpu_device::write_r(int index, uint8_t data)
{
index &= 7;
@@ -553,8 +553,8 @@ void hmcs40_cpu_device::increment_tc()
inline void hmcs40_cpu_device::increment_pc()
{
// PC lower bits is a LFSR identical to TI TMS1000
- UINT8 mask = 0x3f;
- UINT8 low = m_pc & mask;
+ uint8_t mask = 0x3f;
+ uint8_t low = m_pc & mask;
int fb = (low << 1 & 0x20) == (low & 0x20);
if (low == (mask >> 1))
diff --git a/src/devices/cpu/hmcs40/hmcs40.h b/src/devices/cpu/hmcs40/hmcs40.h
index d9e30a92f72..225d5790b68 100644
--- a/src/devices/cpu/hmcs40/hmcs40.h
+++ b/src/devices/cpu/hmcs40/hmcs40.h
@@ -116,7 +116,7 @@ class hmcs40_cpu_device : public cpu_device
{
public:
// construction/destruction
- hmcs40_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int family, UINT16 polarity, int stack_levels, int pcwidth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+ hmcs40_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int family, uint16_t polarity, int stack_levels, int pcwidth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 16, prgwidth, -1, program)
, m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data)
@@ -160,11 +160,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); } // "
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 2+1; } // 3rd one is internal
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); } // "
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 2+1; } // 3rd one is internal
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
@@ -172,9 +172,9 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : nullptr); }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
address_space_config m_program_config;
@@ -189,39 +189,39 @@ protected:
int m_prgmask;
int m_datamask;
int m_family; // MCU family (42-47)
- UINT16 m_polarity; // i/o polarity (pmos vs cmos)
+ uint16_t m_polarity; // i/o polarity (pmos vs cmos)
int m_stack_levels; // number of callstack levels
- UINT16 m_stack[4]; // max 4
- UINT16 m_op; // current opcode
- UINT16 m_prev_op;
- UINT8 m_i; // 4-bit immediate opcode param
+ uint16_t m_stack[4]; // max 4
+ uint16_t m_op; // current opcode
+ uint16_t m_prev_op;
+ uint8_t m_i; // 4-bit immediate opcode param
int m_eint_line; // which input_line caused an interrupt
emu_timer *m_timer;
int m_halt; // internal HLT state
attotime m_timer_halted_remain;
int m_icount;
- UINT16 m_pc; // Program Counter
- UINT16 m_prev_pc;
- UINT8 m_page; // LPU prepared page
- UINT8 m_a; // 4-bit Accumulator
- UINT8 m_b; // 4-bit B register
- UINT8 m_x; // 1/3/4-bit X register
- UINT8 m_spx; // 1/3/4-bit SPX register
- UINT8 m_y; // 4-bit Y register
- UINT8 m_spy; // 4-bit SPY register
- UINT8 m_s; // Status F/F (F/F = flip-flop)
- UINT8 m_c; // Carry F/F
- UINT8 m_tc; // Timer/Counter
- UINT8 m_cf; // CF F/F (timer mode or counter mode)
- UINT8 m_ie; // I/E(Interrupt Enable) F/F
- UINT8 m_iri; // external interrupt pending I/RI F/F
- UINT8 m_irt; // timer interrupt pending I/RT F/F
- UINT8 m_if[2]; // external interrupt mask IF0,1 F/F
- UINT8 m_tf; // timer interrupt mask TF F/F
- UINT8 m_int[2]; // INT0/1 pins state
- UINT8 m_r[8]; // R outputs state
- UINT16 m_d; // D pins state
+ uint16_t m_pc; // Program Counter
+ uint16_t m_prev_pc;
+ uint8_t m_page; // LPU prepared page
+ uint8_t m_a; // 4-bit Accumulator
+ uint8_t m_b; // 4-bit B register
+ uint8_t m_x; // 1/3/4-bit X register
+ uint8_t m_spx; // 1/3/4-bit SPX register
+ uint8_t m_y; // 4-bit Y register
+ uint8_t m_spy; // 4-bit SPY register
+ uint8_t m_s; // Status F/F (F/F = flip-flop)
+ uint8_t m_c; // Carry F/F
+ uint8_t m_tc; // Timer/Counter
+ uint8_t m_cf; // CF F/F (timer mode or counter mode)
+ uint8_t m_ie; // I/E(Interrupt Enable) F/F
+ uint8_t m_iri; // external interrupt pending I/RI F/F
+ uint8_t m_irt; // timer interrupt pending I/RT F/F
+ uint8_t m_if[2]; // external interrupt mask IF0,1 F/F
+ uint8_t m_tf; // timer interrupt mask TF F/F
+ uint8_t m_int[2]; // INT0/1 pins state
+ uint8_t m_r[8]; // R outputs state
+ uint16_t m_d; // D pins state
// i/o handlers
devcb_read8 m_read_r0, m_read_r1, m_read_r2, m_read_r3, m_read_r4, m_read_r5, m_read_r6, m_read_r7;
@@ -232,13 +232,13 @@ protected:
// misc internal helpers
void increment_pc();
- UINT8 ram_r();
- void ram_w(UINT8 data);
+ uint8_t ram_r();
+ void ram_w(uint8_t data);
void pop_stack();
void push_stack();
- virtual UINT8 read_r(int index);
- virtual void write_r(int index, UINT8 data);
+ virtual uint8_t read_r(int index);
+ virtual void write_r(int index, uint8_t data);
virtual int read_d(int index);
virtual void write_d(int index, int state);
@@ -349,109 +349,109 @@ protected:
class hmcs43_cpu_device : public hmcs40_cpu_device
{
public:
- hmcs43_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 polarity, const char *shortname);
+ hmcs43_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint16_t polarity, const char *shortname);
protected:
// overrides
- virtual UINT8 read_r(int index) override;
- virtual void write_r(int index, UINT8 data) override;
+ virtual uint8_t read_r(int index) override;
+ virtual void write_r(int index, uint8_t data) override;
virtual int read_d(int index) override;
};
class hd38750_device : public hmcs43_cpu_device
{
public:
- hd38750_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd38750_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd38755_device : public hmcs43_cpu_device
{
public:
- hd38755_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd38755_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd44750_device : public hmcs43_cpu_device
{
public:
- hd44750_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd44750_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd44758_device : public hmcs43_cpu_device
{
public:
- hd44758_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd44758_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hmcs44_cpu_device : public hmcs40_cpu_device
{
public:
- hmcs44_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 polarity, const char *shortname);
+ hmcs44_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint16_t polarity, const char *shortname);
protected:
// overrides
- virtual UINT8 read_r(int index) override;
- virtual void write_r(int index, UINT8 data) override;
+ virtual uint8_t read_r(int index) override;
+ virtual void write_r(int index, uint8_t data) override;
};
class hd38800_device : public hmcs44_cpu_device
{
public:
- hd38800_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd38800_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd38805_device : public hmcs44_cpu_device
{
public:
- hd38805_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd38805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd44801_device : public hmcs44_cpu_device
{
public:
- hd44801_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd44801_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd44808_device : public hmcs44_cpu_device
{
public:
- hd44808_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd44808_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hmcs45_cpu_device : public hmcs40_cpu_device
{
public:
- hmcs45_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 polarity, const char *shortname);
+ hmcs45_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint16_t polarity, const char *shortname);
protected:
// overrides
- virtual UINT8 read_r(int index) override;
- virtual void write_r(int index, UINT8 data) override;
+ virtual uint8_t read_r(int index) override;
+ virtual void write_r(int index, uint8_t data) override;
};
class hd38820_device : public hmcs45_cpu_device
{
public:
- hd38820_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd38820_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd38825_device : public hmcs45_cpu_device
{
public:
- hd38825_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd38825_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd44820_device : public hmcs45_cpu_device
{
public:
- hd44820_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd44820_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class hd44828_device : public hmcs45_cpu_device
{
public:
- hd44828_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd44828_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/hmcs40/hmcs40d.cpp b/src/devices/cpu/hmcs40/hmcs40d.cpp
index 1a40547ebf1..c8a3993ac9c 100644
--- a/src/devices/cpu/hmcs40/hmcs40d.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40d.cpp
@@ -46,7 +46,7 @@ static const char *const s_mnemonics[] =
};
// number of bits per opcode parameter, 99 means (XY) parameter, negative means reversed bit-order
-static const INT8 s_bits[] =
+static const int8_t s_bits[] =
{
0,
0, 0, 0, 0, 0, 4,
@@ -65,7 +65,7 @@ static const INT8 s_bits[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] =
+static const uint32_t s_flags[] =
{
0,
0, 0, 0, 0, 0, 0,
@@ -82,7 +82,7 @@ static const UINT32 s_flags[] =
};
// next program counter in sequence (relative)
-static const INT8 s_next_pc[0x40] =
+static const int8_t s_next_pc[0x40] =
{
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 32+0x40 /* rollback */,
@@ -91,7 +91,7 @@ static const INT8 s_next_pc[0x40] =
};
-static const UINT8 hmcs40_mnemonic[0x400] =
+static const uint8_t hmcs40_mnemonic[0x400] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0x000 */
@@ -186,10 +186,10 @@ static const UINT8 hmcs40_mnemonic[0x400] =
CPU_DISASSEMBLE(hmcs40)
{
- UINT16 op = (oprom[0] | oprom[1] << 8) & 0x3ff;
+ uint16_t op = (oprom[0] | oprom[1] << 8) & 0x3ff;
char *dst = buffer;
- UINT8 instr = hmcs40_mnemonic[op];
- INT8 bits = s_bits[instr];
+ uint8_t instr = hmcs40_mnemonic[op];
+ int8_t bits = s_bits[instr];
// special case for (XY) opcode
if (bits == 99)
@@ -208,7 +208,7 @@ CPU_DISASSEMBLE(hmcs40)
// opcode parameter
if (bits != 0)
{
- UINT8 param = op;
+ uint8_t param = op;
// reverse bits
if (bits < 0)
diff --git a/src/devices/cpu/hmcs40/hmcs40op.cpp b/src/devices/cpu/hmcs40/hmcs40op.cpp
index 91777043553..31a74d76905 100644
--- a/src/devices/cpu/hmcs40/hmcs40op.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40op.cpp
@@ -8,15 +8,15 @@
// internal helpers
-inline UINT8 hmcs40_cpu_device::ram_r()
+inline uint8_t hmcs40_cpu_device::ram_r()
{
- UINT8 address = (m_x << 4 | m_y) & m_datamask;
+ uint8_t address = (m_x << 4 | m_y) & m_datamask;
return m_data->read_byte(address) & 0xf;
}
-inline void hmcs40_cpu_device::ram_w(UINT8 data)
+inline void hmcs40_cpu_device::ram_w(uint8_t data)
{
- UINT8 address = (m_x << 4 | m_y) & m_datamask;
+ uint8_t address = (m_x << 4 | m_y) & m_datamask;
m_data->write_byte(address, data & 0xf);
}
@@ -81,7 +81,7 @@ void hmcs40_cpu_device::op_xamr()
// XAMR m: Exchange A and MR(m)
// determine MR(Memory Register) location
- UINT8 address = m_op & 0xf;
+ uint8_t address = m_op & 0xf;
// HMCS42: MR0 on file 0, MR4-MR15 on file 4 (there is no file 1-3)
// HMCS43: MR0-MR3 on file 0-3, MR4-MR15 on file 4
@@ -93,7 +93,7 @@ void hmcs40_cpu_device::op_xamr()
address |= 0xf0;
address &= m_datamask;
- UINT8 old_a = m_a;
+ uint8_t old_a = m_a;
m_a = m_data->read_byte(address) & 0xf;
m_data->write_byte(address, old_a & 0xf);
}
@@ -160,13 +160,13 @@ void hmcs40_cpu_device::op_xsp()
// XSP (XY): Exchange X and SPX, Y and SPY, or NOP if 0
if (m_op & 1)
{
- UINT8 old_x = m_x;
+ uint8_t old_x = m_x;
m_x = m_spx;
m_spx = old_x;
}
if (m_op & 2)
{
- UINT8 old_y = m_y;
+ uint8_t old_y = m_y;
m_y = m_spy;
m_spy = old_y;
}
@@ -192,7 +192,7 @@ void hmcs40_cpu_device::op_lbm()
void hmcs40_cpu_device::op_xma()
{
// XMA (XY): Exchange Memory and A
- UINT8 old_a = m_a;
+ uint8_t old_a = m_a;
m_a = ram_r();
ram_w(old_a);
op_xsp();
@@ -201,7 +201,7 @@ void hmcs40_cpu_device::op_xma()
void hmcs40_cpu_device::op_xmb()
{
// XMB (XY): Exchange Memory and B
- UINT8 old_b = m_b;
+ uint8_t old_b = m_b;
m_b = ram_r();
ram_w(old_b);
op_xsp();
@@ -357,7 +357,7 @@ void hmcs40_cpu_device::op_rotl()
void hmcs40_cpu_device::op_rotr()
{
// ROTR: Rotate Right A with Carry
- UINT8 c = m_a & 1;
+ uint8_t c = m_a & 1;
m_a = m_a >> 1 | m_c << 3;
m_c = c;
}
@@ -470,7 +470,7 @@ void hmcs40_cpu_device::op_lpu()
void hmcs40_cpu_device::op_tbr()
{
// TBR p: Table Branch
- UINT16 address = m_a | m_b << 4 | m_c << 8 | (m_op & 7) << 9 | (m_pc & ~0x3f);
+ uint16_t address = m_a | m_b << 4 | m_c << 8 | (m_op & 7) << 9 | (m_pc & ~0x3f);
m_pc = address & m_pcmask;
}
@@ -661,8 +661,8 @@ void hmcs40_cpu_device::op_p()
{
// P p: Pattern Generation
m_icount--;
- UINT16 address = m_a | m_b << 4 | m_c << 8 | (m_op & 7) << 9 | (m_pc & ~0x3f);
- UINT16 o = m_program->read_word((address & m_prgmask) << 1);
+ uint16_t address = m_a | m_b << 4 | m_c << 8 | (m_op & 7) << 9 | (m_pc & ~0x3f);
+ uint16_t o = m_program->read_word((address & m_prgmask) << 1);
// destination is determined by the 2 highest bits
if (o & 0x100)
diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp
index 4a688ecc0d9..e2c58c86f15 100644
--- a/src/devices/cpu/hphybrid/hphybrid.cpp
+++ b/src/devices/cpu/hphybrid/hphybrid.cpp
@@ -140,12 +140,12 @@ WRITE_LINE_MEMBER(hp_hybrid_cpu_device::flag_w)
}
}
-UINT8 hp_hybrid_cpu_device::pa_r(void) const
+uint8_t hp_hybrid_cpu_device::pa_r(void) const
{
return CURRENT_PA;
}
-hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth)
+hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname , uint8_t addrwidth)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
m_pa_changed_func(*this),
m_program_config("program", ENDIANNESS_BIG, 16, addrwidth, -1),
@@ -261,14 +261,14 @@ void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state)
*
* @return Next opcode to be executed
*/
-UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
+uint16_t hp_hybrid_cpu_device::execute_one(uint16_t opcode)
{
if ((opcode & 0x7fe0) == 0x7000) {
// EXE
m_icount -= 8;
// Indirect addressing in EXE instruction seems to use AEC case A instead of case C
// (because it's an opcode fetch)
- UINT16 reg = RM(opcode & 0x1f);
+ uint16_t reg = RM(opcode & 0x1f);
if (BIT(opcode , 15)) {
m_icount -= 6;
return RM(add_mae(AEC_CASE_A , reg));
@@ -288,10 +288,10 @@ UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
*
* @return new value of P register
*/
-UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
+uint16_t hp_hybrid_cpu_device::execute_one_sub(uint16_t opcode)
{
- UINT32 ea;
- UINT16 tmp;
+ uint32_t ea;
+ uint16_t tmp;
switch (opcode & 0x7800) {
case 0x0000:
@@ -551,11 +551,11 @@ UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT);
memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
- m_pa_changed_func((UINT8)CURRENT_PA);
+ m_pa_changed_func((uint8_t)CURRENT_PA);
} else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT);
memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
- m_pa_changed_func((UINT8)CURRENT_PA);
+ m_pa_changed_func((uint8_t)CURRENT_PA);
}
tmp = RM(AEC_CASE_C , m_reg_R--) + (opcode & 0x1f);
BIT_CLR(m_flags, HPHYBRID_IM_BIT);
@@ -675,26 +675,26 @@ void hp_hybrid_cpu_device::state_string_export(const device_state_entry &entry,
}
}
-offs_t hp_hybrid_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hp_hybrid_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(hp_hybrid);
return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options);
}
-UINT16 hp_hybrid_cpu_device::remove_mae(UINT32 addr)
+uint16_t hp_hybrid_cpu_device::remove_mae(uint32_t addr)
{
- return (UINT16)(addr & 0xffff);
+ return (uint16_t)(addr & 0xffff);
}
-UINT16 hp_hybrid_cpu_device::RM(aec_cases_t aec_case , UINT16 addr)
+uint16_t hp_hybrid_cpu_device::RM(aec_cases_t aec_case , uint16_t addr)
{
return RM(add_mae(aec_case , addr));
}
-UINT16 hp_hybrid_cpu_device::RM(UINT32 addr)
+uint16_t hp_hybrid_cpu_device::RM(uint32_t addr)
{
- UINT16 tmp;
- UINT16 addr_wo_bsc = remove_mae(addr);
+ uint16_t tmp;
+ uint16_t addr_wo_bsc = remove_mae(addr);
if (addr_wo_bsc <= HP_REG_LAST_ADDR) {
// Any access to internal registers removes forcing of BSC 2x
@@ -759,14 +759,14 @@ UINT16 hp_hybrid_cpu_device::RM(UINT32 addr)
}
}
-void hp_hybrid_cpu_device::WM(aec_cases_t aec_case , UINT16 addr , UINT16 v)
+void hp_hybrid_cpu_device::WM(aec_cases_t aec_case , uint16_t addr , uint16_t v)
{
WM(add_mae(aec_case , addr) , v);
}
-void hp_hybrid_cpu_device::WM(UINT32 addr , UINT16 v)
+void hp_hybrid_cpu_device::WM(uint32_t addr , uint16_t v)
{
- UINT16 addr_wo_bsc = remove_mae(addr);
+ uint16_t addr_wo_bsc = remove_mae(addr);
if (addr_wo_bsc <= HP_REG_LAST_ADDR) {
// Any access to internal registers removes forcing of BSC 2x
@@ -803,7 +803,7 @@ void hp_hybrid_cpu_device::WM(UINT32 addr , UINT16 v)
case HP_REG_PA_ADDR:
CURRENT_PA = v & HP_REG_PA_MASK;
- m_pa_changed_func((UINT8)CURRENT_PA);
+ m_pa_changed_func((uint8_t)CURRENT_PA);
break;
case HP_REG_W_ADDR:
@@ -839,16 +839,16 @@ void hp_hybrid_cpu_device::WM(UINT32 addr , UINT16 v)
}
}
-UINT16 hp_hybrid_cpu_device::fetch(void)
+uint16_t hp_hybrid_cpu_device::fetch(void)
{
m_genpc = add_mae(AEC_CASE_A , m_reg_P);
return RM(m_genpc);
}
-UINT32 hp_hybrid_cpu_device::get_ea(UINT16 opcode)
+uint32_t hp_hybrid_cpu_device::get_ea(uint16_t opcode)
{
- UINT16 base;
- UINT16 off;
+ uint16_t base;
+ uint16_t off;
aec_cases_t aec;
if (BIT(opcode , 10)) {
@@ -878,9 +878,9 @@ UINT32 hp_hybrid_cpu_device::get_ea(UINT16 opcode)
}
}
-void hp_hybrid_cpu_device::do_add(UINT16& addend1 , UINT16 addend2)
+void hp_hybrid_cpu_device::do_add(uint16_t& addend1 , uint16_t addend2)
{
- UINT32 tmp = addend1 + addend2;
+ uint32_t tmp = addend1 + addend2;
if (BIT(tmp , 16)) {
// Carry
@@ -892,15 +892,15 @@ void hp_hybrid_cpu_device::do_add(UINT16& addend1 , UINT16 addend2)
BIT_SET(m_flags , HPHYBRID_O_BIT);
}
- addend1 = (UINT16)tmp;
+ addend1 = (uint16_t)tmp;
}
-UINT16 hp_hybrid_cpu_device::get_skip_addr(UINT16 opcode , bool condition) const
+uint16_t hp_hybrid_cpu_device::get_skip_addr(uint16_t opcode , bool condition) const
{
bool skip_val = BIT(opcode , 8) != 0;
if (condition == skip_val) {
- UINT16 off = opcode & 0x1f;
+ uint16_t off = opcode & 0x1f;
if (BIT(opcode , 5)) {
off -= 0x20;
@@ -911,7 +911,7 @@ UINT16 hp_hybrid_cpu_device::get_skip_addr(UINT16 opcode , bool condition) const
}
}
-UINT16 hp_hybrid_cpu_device::get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n)
+uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , uint16_t& v , unsigned n)
{
bool val = BIT(v , n);
@@ -926,7 +926,7 @@ UINT16 hp_hybrid_cpu_device::get_skip_addr_sc(UINT16 opcode , UINT16& v , unsign
return get_skip_addr(opcode , val);
}
-UINT16 hp_hybrid_cpu_device::get_skip_addr_sc(UINT16 opcode , UINT32& v , unsigned n)
+uint16_t hp_hybrid_cpu_device::get_skip_addr_sc(uint16_t opcode , uint32_t& v , unsigned n)
{
bool val = BIT(v , n);
@@ -941,12 +941,12 @@ UINT16 hp_hybrid_cpu_device::get_skip_addr_sc(UINT16 opcode , UINT32& v , unsign
return get_skip_addr(opcode , val);
}
-void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
+void hp_hybrid_cpu_device::do_pw(uint16_t opcode)
{
- UINT16 tmp;
- UINT16 reg_addr = opcode & 7;
- UINT16 *ptr_reg;
- UINT16 b_mask;
+ uint16_t tmp;
+ uint16_t reg_addr = opcode & 7;
+ uint16_t *ptr_reg;
+ uint16_t b_mask;
if (BIT(opcode , 3)) {
ptr_reg = &m_reg_D;
@@ -960,11 +960,11 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
// Withdraw
if (BIT(opcode , 11)) {
// Byte
- UINT32 tmp_addr = (UINT32)(*ptr_reg);
+ uint32_t tmp_addr = (uint32_t)(*ptr_reg);
if (m_flags & b_mask) {
tmp_addr |= 0x10000;
}
- tmp = RM(AEC_CASE_C , (UINT16)(tmp_addr >> 1));
+ tmp = RM(AEC_CASE_C , (uint16_t)(tmp_addr >> 1));
if (BIT(tmp_addr , 0)) {
tmp &= 0xff;
} else {
@@ -1003,7 +1003,7 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
tmp = RM(reg_addr);
if (BIT(opcode , 11)) {
// Byte
- UINT32 tmp_addr = (UINT32)(*ptr_reg);
+ uint32_t tmp_addr = (uint32_t)(*ptr_reg);
if (m_flags & b_mask) {
tmp_addr |= 0x10000;
}
@@ -1021,7 +1021,7 @@ void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
} else {
// Extend address, preserve LSB & form byte address
tmp_addr = (add_mae(AEC_CASE_C , tmp_addr >> 1) << 1) | (tmp_addr & 1);
- m_program->write_byte(tmp_addr , (UINT8)tmp);
+ m_program->write_byte(tmp_addr , (uint8_t)tmp);
}
} else {
// Word
@@ -1054,8 +1054,8 @@ void hp_hybrid_cpu_device::check_for_interrupts(void)
}
// Get interrupt vector in low byte
- UINT8 vector = (UINT8)standard_irq_callback(irqline);
- UINT8 new_PA;
+ uint8_t vector = (uint8_t)standard_irq_callback(irqline);
+ uint8_t new_PA;
// Get highest numbered 1
// Don't know what happens if vector is 0, here we assume bit 7 = 1
@@ -1074,7 +1074,7 @@ void hp_hybrid_cpu_device::check_for_interrupts(void)
CURRENT_PA = new_PA;
- m_pa_changed_func((UINT8)CURRENT_PA);
+ m_pa_changed_func((uint8_t)CURRENT_PA);
// Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence
// lasts for 32 cycles
@@ -1098,7 +1098,7 @@ void hp_hybrid_cpu_device::handle_dma(void)
{
// Patent hints at the fact that terminal count is detected by bit 15 of dmac being 1 after decrementing
bool tc = BIT(--m_dmac , 15) != 0;
- UINT16 tmp;
+ uint16_t tmp;
if (BIT(m_flags , HPHYBRID_DMADIR_BIT)) {
// "Outward" DMA: memory -> peripheral
@@ -1115,17 +1115,17 @@ void hp_hybrid_cpu_device::handle_dma(void)
// Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work)
}
-UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic)
+uint16_t hp_hybrid_cpu_device::RIO(uint8_t pa , uint8_t ic)
{
return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
}
-void hp_hybrid_cpu_device::WIO(UINT8 pa , UINT8 ic , UINT16 v)
+void hp_hybrid_cpu_device::WIO(uint8_t pa , uint8_t ic , uint16_t v)
{
m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
}
-hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hp_5061_3001_cpu_device::hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hp_hybrid_cpu_device(mconfig, HP_5061_3001, "HP-5061-3001", tag, owner, clock, "5061-3001", 22),
m_boot_mode(false)
{
@@ -1187,77 +1187,77 @@ void hp_5061_3001_cpu_device::device_reset()
hp_hybrid_cpu_device::device_reset();
}
-UINT8 hp_5061_3001_cpu_device::do_dec_shift_r(UINT8 d1 , UINT64& mantissa)
+uint8_t hp_5061_3001_cpu_device::do_dec_shift_r(uint8_t d1 , uint64_t& mantissa)
{
- UINT8 d12 = (UINT8)(mantissa & 0xf);
+ uint8_t d12 = (uint8_t)(mantissa & 0xf);
- mantissa = (mantissa >> 4) | ((UINT64)d1 << 44);
+ mantissa = (mantissa >> 4) | ((uint64_t)d1 << 44);
return d12;
}
-UINT8 hp_5061_3001_cpu_device::do_dec_shift_l(UINT8 d12 , UINT64& mantissa)
+uint8_t hp_5061_3001_cpu_device::do_dec_shift_l(uint8_t d12 , uint64_t& mantissa)
{
- UINT8 d1 = (UINT8)((mantissa >> 44) & 0xf);
+ uint8_t d1 = (uint8_t)((mantissa >> 44) & 0xf);
- mantissa = (mantissa << 4) | ((UINT64)d12);
+ mantissa = (mantissa << 4) | ((uint64_t)d12);
mantissa &= 0xffffffffffffULL;
return d1;
}
-UINT64 hp_5061_3001_cpu_device::get_ar1(void)
+uint64_t hp_5061_3001_cpu_device::get_ar1(void)
{
- UINT32 addr;
- UINT64 tmp;
+ uint32_t addr;
+ uint64_t tmp;
addr = add_mae(AEC_CASE_B , HP_REG_AR1_ADDR + 1);
- tmp = (UINT64)RM(addr++);
+ tmp = (uint64_t)RM(addr++);
tmp <<= 16;
- tmp |= (UINT64)RM(addr++);
+ tmp |= (uint64_t)RM(addr++);
tmp <<= 16;
- tmp |= (UINT64)RM(addr);
+ tmp |= (uint64_t)RM(addr);
return tmp;
}
-void hp_5061_3001_cpu_device::set_ar1(UINT64 v)
+void hp_5061_3001_cpu_device::set_ar1(uint64_t v)
{
- UINT32 addr;
+ uint32_t addr;
addr = add_mae(AEC_CASE_B , HP_REG_AR1_ADDR + 3);
- WM(addr-- , (UINT16)(v & 0xffff));
+ WM(addr-- , (uint16_t)(v & 0xffff));
v >>= 16;
- WM(addr-- , (UINT16)(v & 0xffff));
+ WM(addr-- , (uint16_t)(v & 0xffff));
v >>= 16;
- WM(addr , (UINT16)(v & 0xffff));
+ WM(addr , (uint16_t)(v & 0xffff));
}
-UINT64 hp_5061_3001_cpu_device::get_ar2(void) const
+uint64_t hp_5061_3001_cpu_device::get_ar2(void) const
{
- UINT64 tmp;
+ uint64_t tmp;
- tmp = (UINT64)m_reg_ar2[ 1 ];
+ tmp = (uint64_t)m_reg_ar2[ 1 ];
tmp <<= 16;
- tmp |= (UINT64)m_reg_ar2[ 2 ];
+ tmp |= (uint64_t)m_reg_ar2[ 2 ];
tmp <<= 16;
- tmp |= (UINT64)m_reg_ar2[ 3 ];
+ tmp |= (uint64_t)m_reg_ar2[ 3 ];
return tmp;
}
-void hp_5061_3001_cpu_device::set_ar2(UINT64 v)
+void hp_5061_3001_cpu_device::set_ar2(uint64_t v)
{
- m_reg_ar2[ 3 ] = (UINT16)(v & 0xffff);
+ m_reg_ar2[ 3 ] = (uint16_t)(v & 0xffff);
v >>= 16;
- m_reg_ar2[ 2 ] = (UINT16)(v & 0xffff);
+ m_reg_ar2[ 2 ] = (uint16_t)(v & 0xffff);
v >>= 16;
- m_reg_ar2[ 1 ] = (UINT16)(v & 0xffff);
+ m_reg_ar2[ 1 ] = (uint16_t)(v & 0xffff);
}
-UINT64 hp_5061_3001_cpu_device::do_mrxy(UINT64 ar)
+uint64_t hp_5061_3001_cpu_device::do_mrxy(uint64_t ar)
{
- UINT8 n;
+ uint8_t n;
n = m_reg_B & 0xf;
m_reg_A &= 0xf;
@@ -1273,15 +1273,15 @@ UINT64 hp_5061_3001_cpu_device::do_mrxy(UINT64 ar)
return ar;
}
-bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , UINT64& a , UINT64 b)
+bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , uint64_t& a , uint64_t b)
{
- UINT64 tmp = 0;
+ uint64_t tmp = 0;
unsigned i;
- UINT8 digit_a , digit_b;
+ uint8_t digit_a , digit_b;
for (i = 0; i < 12; i++) {
- digit_a = (UINT8)(a & 0xf);
- digit_b = (UINT8)(b & 0xf);
+ digit_a = (uint8_t)(a & 0xf);
+ digit_b = (uint8_t)(b & 0xf);
if (carry_in) {
digit_a++;
@@ -1295,7 +1295,7 @@ bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , UINT64& a , UINT64 b)
digit_a = (digit_a - 10) & 0xf;
}
- tmp |= (UINT64)digit_a << (4 * i);
+ tmp |= (uint64_t)digit_a << (4 * i);
a >>= 4;
b >>= 4;
@@ -1308,25 +1308,25 @@ bool hp_5061_3001_cpu_device::do_dec_add(bool carry_in , UINT64& a , UINT64 b)
void hp_5061_3001_cpu_device::do_mpy(void)
{
- INT32 a = (INT16)m_reg_A;
- INT32 b = (INT16)m_reg_B;
- INT32 p = a * b;
+ int32_t a = (int16_t)m_reg_A;
+ int32_t b = (int16_t)m_reg_B;
+ int32_t p = a * b;
- m_reg_A = (UINT16)(p & 0xffff);
- m_reg_B = (UINT16)((p >> 16) & 0xffff);
+ m_reg_A = (uint16_t)(p & 0xffff);
+ m_reg_B = (uint16_t)((p >> 16) & 0xffff);
// Not entirely correct, timing depends on initial content of A register
m_icount -= 65;
}
-UINT16 hp_5061_3001_cpu_device::execute_no_bpc_ioc(UINT16 opcode)
+uint16_t hp_5061_3001_cpu_device::execute_no_bpc_ioc(uint16_t opcode)
{
// EMC instructions
- UINT8 n;
- UINT16 tmp1;
- UINT16 tmp2;
- UINT64 tmp_ar;
- UINT64 tmp_ar2;
+ uint8_t n;
+ uint16_t tmp1;
+ uint16_t tmp2;
+ uint64_t tmp_ar;
+ uint64_t tmp_ar2;
bool carry;
switch (opcode & 0xfff0) {
@@ -1536,15 +1536,15 @@ UINT16 hp_5061_3001_cpu_device::execute_no_bpc_ioc(UINT16 opcode)
return m_reg_P + 1;
}
-offs_t hp_5061_3001_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hp_5061_3001_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(hp_5061_3001);
return CPU_DISASSEMBLE_NAME(hp_5061_3001)(this, buffer, pc, oprom, opram, options);
}
-UINT32 hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr)
+uint32_t hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr)
{
- UINT16 bsc_reg;
+ uint16_t bsc_reg;
bool top_half = BIT(addr , 15) != 0;
// Detect accesses to top half of base page
@@ -1603,16 +1603,16 @@ UINT32 hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr)
return 0;
}
- UINT16 aec_reg = bsc_reg & BSC_REG_MASK;
+ uint16_t aec_reg = bsc_reg & BSC_REG_MASK;
if (m_forced_bsc_25) {
aec_reg = (aec_reg & 0xf) | 0x20;
}
- return (UINT32)addr | ((UINT32)aec_reg << 16);
+ return (uint32_t)addr | ((uint32_t)aec_reg << 16);
}
-UINT16 hp_5061_3001_cpu_device::read_non_common_reg(UINT16 addr)
+uint16_t hp_5061_3001_cpu_device::read_non_common_reg(uint16_t addr)
{
switch (addr) {
case HP_REG_AR2_ADDR:
@@ -1646,7 +1646,7 @@ UINT16 hp_5061_3001_cpu_device::read_non_common_reg(UINT16 addr)
}
}
-void hp_5061_3001_cpu_device::write_non_common_reg(UINT16 addr , UINT16 v)
+void hp_5061_3001_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v)
{
switch (addr) {
case HP_REG_AR2_ADDR:
@@ -1692,12 +1692,12 @@ void hp_5061_3001_cpu_device::enter_isr(void)
BIT_SET(m_flags, HPHYBRID_IM_BIT);
}
-hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hp_hybrid_cpu_device(mconfig, HP_5061_3011, "HP-5061-3011", tag, owner, clock, "5061-3011", 16)
{
}
-UINT16 hp_5061_3011_cpu_device::execute_no_bpc_ioc(UINT16 opcode)
+uint16_t hp_5061_3011_cpu_device::execute_no_bpc_ioc(uint16_t opcode)
{
// Unrecognized instructions: NOP
// Execution time is fictional
@@ -1706,19 +1706,19 @@ UINT16 hp_5061_3011_cpu_device::execute_no_bpc_ioc(UINT16 opcode)
return m_reg_P + 1;
}
-UINT32 hp_5061_3011_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr)
+uint32_t hp_5061_3011_cpu_device::add_mae(aec_cases_t aec_case , uint16_t addr)
{
// No MAE on 3011
return addr;
}
-UINT16 hp_5061_3011_cpu_device::read_non_common_reg(UINT16 addr)
+uint16_t hp_5061_3011_cpu_device::read_non_common_reg(uint16_t addr)
{
// Non-existing registers are returned as 0
return 0;
}
-void hp_5061_3011_cpu_device::write_non_common_reg(UINT16 addr , UINT16 v)
+void hp_5061_3011_cpu_device::write_non_common_reg(uint16_t addr , uint16_t v)
{
// Non-existing registers are silently discarded
}
diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h
index 43ce4533694..2ec2124567c 100644
--- a/src/devices/cpu/hphybrid/hphybrid.h
+++ b/src/devices/cpu/hphybrid/hphybrid.h
@@ -87,28 +87,28 @@ public:
DECLARE_WRITE_LINE_MEMBER(status_w);
DECLARE_WRITE_LINE_MEMBER(flag_w);
- UINT8 pa_r(void) const;
+ uint8_t pa_r(void) const;
template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
protected:
- hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth);
+ hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname , uint8_t addrwidth);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 6; }
- virtual UINT32 execute_input_lines() const override { return 2; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
+ virtual uint32_t execute_min_cycles() const override { return 6; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xffff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- UINT16 execute_one(UINT16 opcode);
- UINT16 execute_one_sub(UINT16 opcode);
+ uint16_t execute_one(uint16_t opcode);
+ uint16_t execute_one_sub(uint16_t opcode);
// Execute an instruction that doesn't belong to either BPC or IOC
- virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
+ virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) = 0;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ); }
@@ -117,9 +117,9 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// Different cases of memory access
// See patent @ pg 361
@@ -131,21 +131,21 @@ protected:
} aec_cases_t;
// do memory address extension
- virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
+ virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr) = 0;
- UINT16 remove_mae(UINT32 addr);
+ uint16_t remove_mae(uint32_t addr);
- UINT16 RM(aec_cases_t aec_case , UINT16 addr);
- UINT16 RM(UINT32 addr);
- virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
+ uint16_t RM(aec_cases_t aec_case , uint16_t addr);
+ uint16_t RM(uint32_t addr);
+ virtual uint16_t read_non_common_reg(uint16_t addr) = 0;
- void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
- void WM(UINT32 addr , UINT16 v);
- virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
+ void WM(aec_cases_t aec_case , uint16_t addr , uint16_t v);
+ void WM(uint32_t addr , uint16_t v);
+ virtual void write_non_common_reg(uint16_t addr , uint16_t v) = 0;
- UINT16 fetch(void);
+ uint16_t fetch(void);
- UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
+ uint16_t get_skip_addr(uint16_t opcode , bool condition) const;
devcb_write8 m_pa_changed_func;
@@ -153,21 +153,21 @@ protected:
bool m_forced_bsc_25;
// State of processor
- UINT16 m_reg_A; // Register A
- UINT16 m_reg_B; // Register B
- UINT16 m_reg_P; // Register P
- UINT16 m_reg_R; // Register R
- UINT16 m_reg_C; // Register C
- UINT16 m_reg_D; // Register D
- UINT16 m_reg_IV; // Register IV
- UINT16 m_reg_W; // Register W
- UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
- UINT32 m_flags; // Flags
- UINT8 m_dmapa; // DMA peripheral address (4 bits)
- UINT16 m_dmama; // DMA address
- UINT16 m_dmac; // DMA counter
- UINT16 m_reg_I; // Instruction register
- UINT32 m_genpc; // Full PC
+ uint16_t m_reg_A; // Register A
+ uint16_t m_reg_B; // Register B
+ uint16_t m_reg_P; // Register P
+ uint16_t m_reg_R; // Register R
+ uint16_t m_reg_C; // Register C
+ uint16_t m_reg_D; // Register D
+ uint16_t m_reg_IV; // Register IV
+ uint16_t m_reg_W; // Register W
+ uint8_t m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
+ uint32_t m_flags; // Flags
+ uint8_t m_dmapa; // DMA peripheral address (4 bits)
+ uint16_t m_dmama; // DMA address
+ uint16_t m_dmac; // DMA counter
+ uint16_t m_reg_I; // Instruction register
+ uint32_t m_genpc; // Full PC
private:
address_space_config m_program_config;
@@ -177,57 +177,57 @@ private:
direct_read_data *m_direct;
address_space *m_io;
- UINT32 get_ea(UINT16 opcode);
- void do_add(UINT16& addend1 , UINT16 addend2);
- UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
- UINT16 get_skip_addr_sc(UINT16 opcode , UINT32& v , unsigned n);
- void do_pw(UINT16 opcode);
+ uint32_t get_ea(uint16_t opcode);
+ void do_add(uint16_t& addend1 , uint16_t addend2);
+ uint16_t get_skip_addr_sc(uint16_t opcode , uint16_t& v , unsigned n);
+ uint16_t get_skip_addr_sc(uint16_t opcode , uint32_t& v , unsigned n);
+ void do_pw(uint16_t opcode);
void check_for_interrupts(void);
virtual void enter_isr(void);
void handle_dma(void);
- UINT16 RIO(UINT8 pa , UINT8 ic);
- void WIO(UINT8 pa , UINT8 ic , UINT16 v);
+ uint16_t RIO(uint8_t pa , uint8_t ic);
+ void WIO(uint8_t pa , uint8_t ic , uint16_t v);
};
class hp_5061_3001_cpu_device : public hp_hybrid_cpu_device
{
public:
- hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hp_5061_3001_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
static void set_boot_mode_static(device_t &device, bool mode) { downcast<hp_5061_3001_cpu_device &>(device).m_boot_mode = mode; }
protected:
virtual void device_start() override;
virtual void device_reset() override;
- virtual UINT32 execute_max_cycles() const override { return 237; } // FMP 15
-
- static UINT8 do_dec_shift_r(UINT8 d1 , UINT64& mantissa);
- static UINT8 do_dec_shift_l(UINT8 d12 , UINT64& mantissa);
- UINT64 get_ar1(void);
- void set_ar1(UINT64 v);
- UINT64 get_ar2(void) const;
- void set_ar2(UINT64 v);
- UINT64 do_mrxy(UINT64 ar);
- bool do_dec_add(bool carry_in , UINT64& a , UINT64 b);
+ virtual uint32_t execute_max_cycles() const override { return 237; } // FMP 15
+
+ static uint8_t do_dec_shift_r(uint8_t d1 , uint64_t& mantissa);
+ static uint8_t do_dec_shift_l(uint8_t d12 , uint64_t& mantissa);
+ uint64_t get_ar1(void);
+ void set_ar1(uint64_t v);
+ uint64_t get_ar2(void) const;
+ void set_ar2(uint64_t v);
+ uint64_t do_mrxy(uint64_t ar);
+ bool do_dec_add(bool carry_in , uint64_t& a , uint64_t b);
void do_mpy(void);
- virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
- virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) override;
- virtual UINT16 read_non_common_reg(UINT16 addr) override;
- virtual void write_non_common_reg(UINT16 addr , UINT16 v) override;
+ virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
+ virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr) override;
+ virtual uint16_t read_non_common_reg(uint16_t addr) override;
+ virtual void write_non_common_reg(uint16_t addr , uint16_t v) override;
private:
bool m_boot_mode;
// Additional state of processor
- UINT16 m_reg_ar2[ 4 ]; // AR2 register
- UINT16 m_reg_se; // SE register (4 bits)
- UINT16 m_reg_r25; // R25 register
- UINT16 m_reg_r26; // R26 register
- UINT16 m_reg_r27; // R27 register
- UINT16 m_reg_aec[ HP_REG_R37_ADDR - HP_REG_R32_ADDR + 1 ]; // AEC registers R32-R37
+ uint16_t m_reg_ar2[ 4 ]; // AR2 register
+ uint16_t m_reg_se; // SE register (4 bits)
+ uint16_t m_reg_r25; // R25 register
+ uint16_t m_reg_r26; // R26 register
+ uint16_t m_reg_r27; // R27 register
+ uint16_t m_reg_aec[ HP_REG_R37_ADDR - HP_REG_R32_ADDR + 1 ]; // AEC registers R32-R37
virtual void enter_isr(void) override;
};
@@ -235,14 +235,14 @@ private:
class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device
{
public:
- hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual UINT32 execute_max_cycles() const override { return 25; }
- virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) override;
- virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) override;
- virtual UINT16 read_non_common_reg(UINT16 addr) override;
- virtual void write_non_common_reg(UINT16 addr , UINT16 v) override;
+ virtual uint32_t execute_max_cycles() const override { return 25; }
+ virtual uint16_t execute_no_bpc_ioc(uint16_t opcode) override;
+ virtual uint32_t add_mae(aec_cases_t aec_case , uint16_t addr) override;
+ virtual uint16_t read_non_common_reg(uint16_t addr) override;
+ virtual void write_non_common_reg(uint16_t addr , uint16_t v) override;
};
diff --git a/src/devices/cpu/hphybrid/hphybrid_dasm.cpp b/src/devices/cpu/hphybrid/hphybrid_dasm.cpp
index 869cbb0f32b..c656cc29c65 100644
--- a/src/devices/cpu/hphybrid/hphybrid_dasm.cpp
+++ b/src/devices/cpu/hphybrid/hphybrid_dasm.cpp
@@ -8,17 +8,17 @@
#include "debugger.h"
#include "hphybrid.h"
-typedef void (*fn_dis_param)(char *buffer , offs_t pc , UINT16 opcode , bool is_3001);
+typedef void (*fn_dis_param)(char *buffer , offs_t pc , uint16_t opcode , bool is_3001);
typedef struct {
- UINT16 m_op_mask;
- UINT16 m_opcode;
+ uint16_t m_op_mask;
+ uint16_t m_opcode;
const char *m_mnemonic;
fn_dis_param m_param_fn;
- UINT32 m_dasm_flags;
+ uint32_t m_dasm_flags;
} dis_entry_t;
-static void addr_2_str(char *buffer , UINT16 addr , bool indirect , bool is_3001)
+static void addr_2_str(char *buffer , uint16_t addr , bool indirect , bool is_3001)
{
char *s = buffer + strlen(buffer);
@@ -167,14 +167,14 @@ static void addr_2_str(char *buffer , UINT16 addr , bool indirect , bool is_3001
}
}
-static void param_none(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
+static void param_none(char *buffer , offs_t pc , uint16_t opcode , bool is_3001)
{
}
-static void param_loc(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
+static void param_loc(char *buffer , offs_t pc , uint16_t opcode , bool is_3001)
{
- UINT16 base;
- UINT16 off;
+ uint16_t base;
+ uint16_t off;
if (opcode & 0x0400) {
// Current page
@@ -192,21 +192,21 @@ static void param_loc(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
addr_2_str(buffer , base + off , (opcode & 0x8000) != 0 , is_3001);
}
-static void param_addr32(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
+static void param_addr32(char *buffer , offs_t pc , uint16_t opcode , bool is_3001)
{
addr_2_str(buffer , opcode & 0x1f , (opcode & 0x8000) != 0 , is_3001);
}
-static void param_skip(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
+static void param_skip(char *buffer , offs_t pc , uint16_t opcode , bool is_3001)
{
- UINT16 off = opcode & 0x3f;
+ uint16_t off = opcode & 0x3f;
if (off & 0x20) {
off -= 0x40;
}
addr_2_str(buffer , pc + off , false , is_3001);
}
-static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
+static void param_skip_sc(char *buffer , offs_t pc , uint16_t opcode , bool is_3001)
{
param_skip(buffer, pc, opcode , is_3001);
@@ -219,7 +219,7 @@ static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode , bool is_300
}
}
-static void param_ret(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
+static void param_ret(char *buffer , offs_t pc , uint16_t opcode , bool is_3001)
{
char *s = buffer + strlen(buffer);
@@ -235,14 +235,14 @@ static void param_ret(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
}
}
-static void param_n16(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
+static void param_n16(char *buffer , offs_t pc , uint16_t opcode , bool is_3001)
{
char *s = buffer + strlen(buffer);
sprintf(s , "%u" , (opcode & 0xf) + 1);
}
-static void param_reg_id(char *buffer , offs_t pc , UINT16 opcode , bool is_3001)
+static void param_reg_id(char *buffer , offs_t pc , uint16_t opcode , bool is_3001)
{
addr_2_str(buffer, opcode & 7, false , is_3001);
@@ -362,7 +362,7 @@ static const dis_entry_t dis_table_emc[] = {
{0 , 0 , nullptr , nullptr , 0 }
};
-static offs_t disassemble_table(UINT16 opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , char *buffer)
+static offs_t disassemble_table(uint16_t opcode , offs_t pc , const dis_entry_t *table , bool is_3001 , char *buffer)
{
const dis_entry_t *p;
@@ -380,7 +380,7 @@ static offs_t disassemble_table(UINT16 opcode , offs_t pc , const dis_entry_t *t
CPU_DISASSEMBLE(hp_hybrid)
{
- UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
+ uint16_t opcode = ((uint16_t)oprom[ 0 ] << 8) | oprom[ 1 ];
offs_t res;
res = disassemble_table(opcode , pc , dis_table , false , buffer);
@@ -396,7 +396,7 @@ CPU_DISASSEMBLE(hp_hybrid)
CPU_DISASSEMBLE(hp_5061_3001)
{
- UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
+ uint16_t opcode = ((uint16_t)oprom[ 0 ] << 8) | oprom[ 1 ];
offs_t res;
res = disassemble_table(opcode , pc , dis_table_emc , true , buffer);
diff --git a/src/devices/cpu/i386/cycles.h b/src/devices/cpu/i386/cycles.h
index 62b6da2a80a..b6399706858 100644
--- a/src/devices/cpu/i386/cycles.h
+++ b/src/devices/cpu/i386/cycles.h
@@ -342,7 +342,7 @@ enum X86_CYCLES
struct X86_CYCLE_TABLE
{
X86_CYCLES op;
- UINT8 cpu_cycles[X86_NUM_CPUS][2];
+ uint8_t cpu_cycles[X86_NUM_CPUS][2];
};
static const X86_CYCLE_TABLE x86_cycle_table[] =
diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp
index 5c26b195bfe..e6bd927d7de 100644
--- a/src/devices/cpu/i386/i386.cpp
+++ b/src/devices/cpu/i386/i386.cpp
@@ -39,7 +39,7 @@ const device_type PENTIUM3 = &device_creator<pentium3_device>;
const device_type PENTIUM4 = &device_creator<pentium4_device>;
-i386_device::i386_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i386_device::i386_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, I386, "I386", tag, owner, clock, "i386", __FILE__)
, device_vtlb_interface(mconfig, *this, AS_PROGRAM)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0)
@@ -54,7 +54,7 @@ i386_device::i386_device(const machine_config &mconfig, const char *tag, device_
}
-i386_device::i386_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int program_data_width, int program_addr_width, int io_data_width)
+i386_device::i386_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int program_data_width, int program_addr_width, int io_data_width)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, device_vtlb_interface(mconfig, *this, AS_PROGRAM)
, m_program_config("program", ENDIANNESS_LITTLE, program_data_width, program_addr_width, 0)
@@ -68,62 +68,62 @@ i386_device::i386_device(const machine_config &mconfig, device_type type, const
set_vtlb_dynamic_entries(32);
}
-i386SX_device::i386SX_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i386SX_device::i386SX_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i386_device(mconfig, I386SX, "I386SX", tag, owner, clock, "i386sx", __FILE__, 16, 24, 16)
{
}
-i486_device::i486_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i486_device::i486_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i386_device(mconfig, I486, "I486", tag, owner, clock, "i486", __FILE__)
{
}
-pentium_device::pentium_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pentium_device::pentium_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i386_device(mconfig, PENTIUM, "PENTIUM", tag, owner, clock, "pentium", __FILE__)
{
// 64 dtlb small, 8 dtlb large, 32 itlb
set_vtlb_dynamic_entries(96);
}
-pentium_device::pentium_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+pentium_device::pentium_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: i386_device(mconfig, type, name, tag, owner, clock, shortname, source)
{
// 64 dtlb small, 8 dtlb large, 32 itlb
set_vtlb_dynamic_entries(96);
}
-mediagx_device::mediagx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mediagx_device::mediagx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i386_device(mconfig, MEDIAGX, "MEDIAGX", tag, owner, clock, "mediagx", __FILE__)
{
}
-pentium_pro_device::pentium_pro_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pentium_pro_device::pentium_pro_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pentium_device(mconfig, PENTIUM_PRO, "Pentium Pro", tag, owner, clock, "pentium_pro", __FILE__)
{
}
-pentium_mmx_device::pentium_mmx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pentium_mmx_device::pentium_mmx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pentium_device(mconfig, PENTIUM_MMX, "Pentium MMX", tag, owner, clock, "pentium_mmx", __FILE__)
{
// 64 dtlb small, 8 dtlb large, 32 itlb small, 2 itlb large
set_vtlb_dynamic_entries(96);
}
-pentium2_device::pentium2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pentium2_device::pentium2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pentium_device(mconfig, PENTIUM2, "Pentium II", tag, owner, clock, "pentium2", __FILE__)
{
// 64 dtlb small, 8 dtlb large, 32 itlb small, 2 itlb large
set_vtlb_dynamic_entries(96);
}
-pentium3_device::pentium3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pentium3_device::pentium3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pentium_device(mconfig, PENTIUM3, "Pentium III", tag, owner, clock, "pentium3", __FILE__)
{
// 64 dtlb small, 8 dtlb large, 32 itlb small, 2 itlb large
set_vtlb_dynamic_entries(96);
}
-pentium4_device::pentium4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pentium4_device::pentium4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pentium_device(mconfig, PENTIUM4, "Pentium 4", tag, owner, clock, "pentium4", __FILE__)
{
// 128 dtlb, 64 itlb
@@ -139,10 +139,10 @@ MODRM_TABLE i386_MODRM_table[256];
/*************************************************************************/
-UINT32 i386_device::i386_load_protected_mode_segment(I386_SREG *seg, UINT64 *desc )
+uint32_t i386_device::i386_load_protected_mode_segment(I386_SREG *seg, uint64_t *desc )
{
- UINT32 v1,v2;
- UINT32 base, limit;
+ uint32_t v1,v2;
+ uint32_t base, limit;
int entry;
if(!seg->selector)
@@ -180,14 +180,14 @@ UINT32 i386_device::i386_load_protected_mode_segment(I386_SREG *seg, UINT64 *des
seg->valid = true;
if(desc)
- *desc = ((UINT64)v2<<32)|v1;
+ *desc = ((uint64_t)v2<<32)|v1;
return 1;
}
void i386_device::i386_load_call_gate(I386_CALL_GATE *gate)
{
- UINT32 v1,v2;
- UINT32 base,limit;
+ uint32_t v1,v2;
+ uint32_t base,limit;
int entry;
if ( gate->segment & 0x4 )
@@ -215,11 +215,11 @@ void i386_device::i386_load_call_gate(I386_CALL_GATE *gate)
gate->dpl = (gate->ar >> 5) & 0x03;
}
-void i386_device::i386_set_descriptor_accessed(UINT16 selector)
+void i386_device::i386_set_descriptor_accessed(uint16_t selector)
{
// assume the selector is valid, we don't need to check it again
- UINT32 base, addr;
- UINT8 rights;
+ uint32_t base, addr;
+ uint8_t rights;
if(!(selector & ~3))
return;
@@ -266,9 +266,9 @@ void i386_device::i386_load_segment_descriptor(int segment )
}
/* Retrieves the stack selector located in the current TSS */
-UINT32 i386_device::i386_get_stack_segment(UINT8 privilege)
+uint32_t i386_device::i386_get_stack_segment(uint8_t privilege)
{
- UINT32 ret;
+ uint32_t ret;
if(privilege >= 3)
return 0;
@@ -281,9 +281,9 @@ UINT32 i386_device::i386_get_stack_segment(UINT8 privilege)
}
/* Retrieves the stack pointer located in the current TSS */
-UINT32 i386_device::i386_get_stack_ptr(UINT8 privilege)
+uint32_t i386_device::i386_get_stack_ptr(uint8_t privilege)
{
- UINT32 ret;
+ uint32_t ret;
if(privilege >= 3)
return 0;
@@ -295,9 +295,9 @@ UINT32 i386_device::i386_get_stack_ptr(UINT8 privilege)
return ret;
}
-UINT32 i386_device::get_flags() const
+uint32_t i386_device::get_flags() const
{
- UINT32 f = 0x2;
+ uint32_t f = 0x2;
f |= m_CF;
f |= m_PF << 2;
f |= m_AF << 4;
@@ -319,7 +319,7 @@ UINT32 i386_device::get_flags() const
return (m_eflags & ~m_eflags_mask) | (f & m_eflags_mask);
}
-void i386_device::set_flags(UINT32 f )
+void i386_device::set_flags(uint32_t f )
{
m_CF = (f & 0x1) ? 1 : 0;
m_PF = (f & 0x4) ? 1 : 0;
@@ -342,12 +342,12 @@ void i386_device::set_flags(UINT32 f )
m_eflags = f & m_eflags_mask;
}
-void i386_device::sib_byte(UINT8 mod, UINT32* out_ea, UINT8* out_segment)
+void i386_device::sib_byte(uint8_t mod, uint32_t* out_ea, uint8_t* out_segment)
{
- UINT32 ea = 0;
- UINT8 segment = 0;
- UINT8 scale, i, base;
- UINT8 sib = FETCH();
+ uint32_t ea = 0;
+ uint8_t segment = 0;
+ uint8_t scale, i, base;
+ uint8_t sib = FETCH();
scale = (sib >> 6) & 0x3;
i = (sib >> 3) & 0x7;
base = sib & 0x7;
@@ -389,15 +389,15 @@ void i386_device::sib_byte(UINT8 mod, UINT32* out_ea, UINT8* out_segment)
*out_segment = segment;
}
-void i386_device::modrm_to_EA(UINT8 mod_rm, UINT32* out_ea, UINT8* out_segment)
+void i386_device::modrm_to_EA(uint8_t mod_rm, uint32_t* out_ea, uint8_t* out_segment)
{
- INT8 disp8;
- INT16 disp16;
- INT32 disp32;
- UINT8 mod = (mod_rm >> 6) & 0x3;
- UINT8 rm = mod_rm & 0x7;
- UINT32 ea;
- UINT8 segment;
+ int8_t disp8;
+ int16_t disp16;
+ int32_t disp32;
+ uint8_t mod = (mod_rm >> 6) & 0x3;
+ uint8_t rm = mod_rm & 0x7;
+ uint32_t ea;
+ uint8_t segment;
if( mod_rm >= 0xc0 )
fatalerror("i386: Called modrm_to_EA with modrm value %02X!\n",mod_rm);
@@ -424,7 +424,7 @@ void i386_device::modrm_to_EA(UINT8 mod_rm, UINT32* out_ea, UINT8* out_segment)
}
if( mod == 1 ) {
disp8 = FETCH();
- ea += (INT32)disp8;
+ ea += (int32_t)disp8;
} else if( mod == 2 ) {
disp32 = FETCH32();
ea += disp32;
@@ -457,10 +457,10 @@ void i386_device::modrm_to_EA(UINT8 mod_rm, UINT32* out_ea, UINT8* out_segment)
}
if( mod == 1 ) {
disp8 = FETCH();
- ea += (INT32)disp8;
+ ea += (int32_t)disp8;
} else if( mod == 2 ) {
disp16 = FETCH16();
- ea += (INT32)disp16;
+ ea += (int32_t)disp16;
}
if( m_segment_prefix )
@@ -471,19 +471,19 @@ void i386_device::modrm_to_EA(UINT8 mod_rm, UINT32* out_ea, UINT8* out_segment)
}
}
-UINT32 i386_device::GetNonTranslatedEA(UINT8 modrm,UINT8 *seg)
+uint32_t i386_device::GetNonTranslatedEA(uint8_t modrm,uint8_t *seg)
{
- UINT8 segment;
- UINT32 ea;
+ uint8_t segment;
+ uint32_t ea;
modrm_to_EA(modrm, &ea, &segment );
if(seg) *seg = segment;
return ea;
}
-UINT32 i386_device::GetEA(UINT8 modrm, int rwn)
+uint32_t i386_device::GetEA(uint8_t modrm, int rwn)
{
- UINT8 segment;
- UINT32 ea;
+ uint8_t segment;
+ uint32_t ea;
modrm_to_EA(modrm, &ea, &segment );
return i386_translate(segment, ea, rwn );
}
@@ -491,9 +491,9 @@ UINT32 i386_device::GetEA(UINT8 modrm, int rwn)
/* Check segment register for validity when changing privilege level after an RETF */
void i386_device::i386_check_sreg_validity(int reg)
{
- UINT16 selector = m_sreg[reg].selector;
- UINT8 CPL = m_CPL;
- UINT8 DPL,RPL;
+ uint16_t selector = m_sreg[reg].selector;
+ uint8_t CPL = m_CPL;
+ uint8_t DPL,RPL;
I386_SREG desc;
int invalid;
@@ -536,7 +536,7 @@ void i386_device::i386_check_sreg_validity(int reg)
}
}
-int i386_device::i386_limit_check(int seg, UINT32 offset)
+int i386_device::i386_limit_check(int seg, uint32_t offset)
{
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -561,10 +561,10 @@ int i386_device::i386_limit_check(int seg, UINT32 offset)
return 0;
}
-void i386_device::i386_sreg_load(UINT16 selector, UINT8 reg, bool *fault)
+void i386_device::i386_sreg_load(uint16_t selector, uint8_t reg, bool *fault)
{
// Checks done when MOV changes a segment register in protected mode
- UINT8 CPL,RPL,DPL;
+ uint8_t CPL,RPL,DPL;
CPL = m_CPL;
RPL = selector & 0x0003;
@@ -713,9 +713,9 @@ void i386_device::i386_trap(int irq, int irq_gate, int trap_level)
* 0x0f Reserved
* 0x10 Coprocessor error
*/
- UINT32 v1, v2;
- UINT32 offset, oldflags = get_flags();
- UINT16 segment;
+ uint32_t v1, v2;
+ uint32_t offset, oldflags = get_flags();
+ uint16_t segment;
int entry = irq * (PROTECTED_MODE ? 8 : 4);
int SetRPL;
m_lock = false;
@@ -739,9 +739,9 @@ void i386_device::i386_trap(int irq, int irq_gate, int trap_level)
else
{
int type;
- UINT16 flags;
+ uint16_t flags;
I386_SREG desc;
- UINT8 CPL = m_CPL, DPL; //, RPL = 0;
+ uint8_t CPL = m_CPL, DPL; //, RPL = 0;
/* 32-bit */
v1 = READ32PL0(m_idtr.base + entry );
@@ -882,7 +882,7 @@ void i386_device::i386_trap(int irq, int irq_gate, int trap_level)
{
/* IRQ to inner privilege */
I386_SREG stack;
- UINT32 newESP,oldSS,oldESP;
+ uint32_t newESP,oldSS,oldESP;
if(V8086_MODE && DPL)
{
@@ -1047,7 +1047,7 @@ void i386_device::i386_trap(int irq, int irq_gate, int trap_level)
}
}
}
- UINT32 tempSP = REG32(ESP);
+ uint32_t tempSP = REG32(ESP);
try
{
// this is ugly but the alternative is worse
@@ -1070,7 +1070,7 @@ void i386_device::i386_trap(int irq, int irq_gate, int trap_level)
PUSH32(m_prev_eip );
}
}
- catch(UINT64 e)
+ catch(uint64_t e)
{
REG32(ESP) = tempSP;
throw e;
@@ -1091,7 +1091,7 @@ void i386_device::i386_trap(int irq, int irq_gate, int trap_level)
}
-void i386_device::i386_trap_with_error(int irq, int irq_gate, int trap_level, UINT32 error)
+void i386_device::i386_trap_with_error(int irq, int irq_gate, int trap_level, uint32_t error)
{
i386_trap(irq,irq_gate,trap_level);
if(irq == 8 || irq == 10 || irq == 11 || irq == 12 || irq == 13 || irq == 14)
@@ -1100,8 +1100,8 @@ void i386_device::i386_trap_with_error(int irq, int irq_gate, int trap_level, UI
// no error code is pushed for software interrupts, either.
if(PROTECTED_MODE)
{
- UINT32 entry = irq * 8;
- UINT32 v2,type;
+ uint32_t entry = irq * 8;
+ uint32_t v2,type;
v2 = READ32PL0(m_idtr.base + entry + 4 );
type = (v2>>8) & 0x1F;
if(type == 5)
@@ -1121,12 +1121,12 @@ void i386_device::i386_trap_with_error(int irq, int irq_gate, int trap_level, UI
}
-void i386_device::i286_task_switch(UINT16 selector, UINT8 nested)
+void i386_device::i286_task_switch(uint16_t selector, uint8_t nested)
{
- UINT32 tss;
+ uint32_t tss;
I386_SREG seg;
- UINT16 old_task;
- UINT8 ar_byte; // access rights byte
+ uint16_t old_task;
+ uint8_t ar_byte; // access rights byte
/* TODO: Task State Segment privilege checks */
@@ -1228,13 +1228,13 @@ void i386_device::i286_task_switch(UINT16 selector, UINT8 nested)
// printf("286 Task Switch from selector %04x to %04x\n",old_task,selector);
}
-void i386_device::i386_task_switch(UINT16 selector, UINT8 nested)
+void i386_device::i386_task_switch(uint16_t selector, uint8_t nested)
{
- UINT32 tss;
+ uint32_t tss;
I386_SREG seg;
- UINT16 old_task;
- UINT8 ar_byte; // access rights byte
- UINT32 oldcr3 = m_cr[3];
+ uint16_t old_task;
+ uint8_t ar_byte; // access rights byte
+ uint32_t oldcr3 = m_cr[3];
/* TODO: Task State Segment privilege checks */
@@ -1362,14 +1362,14 @@ void i386_device::i386_check_irq_line()
}
}
-void i386_device::i386_protected_mode_jump(UINT16 seg, UINT32 off, int indirect, int operand32)
+void i386_device::i386_protected_mode_jump(uint16_t seg, uint32_t off, int indirect, int operand32)
{
I386_SREG desc;
I386_CALL_GATE call_gate;
- UINT8 CPL,DPL,RPL;
- UINT8 SetRPL;
- UINT16 segment = seg;
- UINT32 offset = off;
+ uint8_t CPL,DPL,RPL;
+ uint8_t SetRPL;
+ uint16_t segment = seg;
+ uint32_t offset = off;
/* Check selector is not null */
if((segment & ~0x03) == 0)
@@ -1634,14 +1634,14 @@ void i386_device::i386_protected_mode_jump(UINT16 seg, UINT32 off, int indirect,
CHANGE_PC(m_eip);
}
-void i386_device::i386_protected_mode_call(UINT16 seg, UINT32 off, int indirect, int operand32)
+void i386_device::i386_protected_mode_call(uint16_t seg, uint32_t off, int indirect, int operand32)
{
I386_SREG desc;
I386_CALL_GATE gate;
- UINT8 SetRPL;
- UINT8 CPL, DPL, RPL;
- UINT16 selector = seg;
- UINT32 offset = off;
+ uint8_t SetRPL;
+ uint8_t CPL, DPL, RPL;
+ uint16_t selector = seg;
+ uint32_t offset = off;
int x;
if((selector & ~0x03) == 0)
@@ -1835,7 +1835,7 @@ void i386_device::i386_protected_mode_call(UINT16 seg, UINT32 off, int indirect,
{
I386_SREG stack;
I386_SREG temp;
- UINT32 oldSS,oldESP;
+ uint32_t oldSS,oldESP;
/* more privilege */
/* Check new SS segment for privilege level from TSS */
memset(&stack, 0, sizeof(stack));
@@ -1882,7 +1882,7 @@ void i386_device::i386_protected_mode_call(UINT16 seg, UINT32 off, int indirect,
logerror("CALL: Call gate: Stack segment is not present\n");
FAULT(FAULT_SS,stack.selector) // #SS(SS selector)
}
- UINT32 newESP = i386_get_stack_ptr(DPL);
+ uint32_t newESP = i386_get_stack_ptr(DPL);
if(!stack.d)
{
newESP &= 0xffff;
@@ -1950,7 +1950,7 @@ void i386_device::i386_protected_mode_call(UINT16 seg, UINT32 off, int indirect,
/* copy parameters from old stack to new stack */
for(x=(gate.dword_count & 0x1f)-1;x>=0;x--)
{
- UINT32 addr = oldESP + (operand32?(x*4):(x*2));
+ uint32_t addr = oldESP + (operand32?(x*4):(x*2));
addr = temp.base + (temp.d?addr:(addr&0xffff));
if(operand32)
PUSH32(READ32(addr));
@@ -2052,7 +2052,7 @@ void i386_device::i386_protected_mode_call(UINT16 seg, UINT32 off, int indirect,
if(SetRPL != 0)
selector = (selector & ~0x03) | m_CPL;
- UINT32 tempSP = REG32(ESP);
+ uint32_t tempSP = REG32(ESP);
try
{
// this is ugly but the alternative is worse
@@ -2077,7 +2077,7 @@ void i386_device::i386_protected_mode_call(UINT16 seg, UINT32 off, int indirect,
i386_load_segment_descriptor(CS );
}
}
- catch(UINT64 e)
+ catch(uint64_t e)
{
REG32(ESP) = tempSP;
throw e;
@@ -2086,13 +2086,13 @@ void i386_device::i386_protected_mode_call(UINT16 seg, UINT32 off, int indirect,
CHANGE_PC(m_eip);
}
-void i386_device::i386_protected_mode_retf(UINT8 count, UINT8 operand32)
+void i386_device::i386_protected_mode_retf(uint8_t count, uint8_t operand32)
{
- UINT32 newCS, newEIP;
+ uint32_t newCS, newEIP;
I386_SREG desc;
- UINT8 CPL, RPL, DPL;
+ uint8_t CPL, RPL, DPL;
- UINT32 ea = i386_translate(SS, (STACK_32BIT)?REG32(ESP):REG16(SP), 0);
+ uint32_t ea = i386_translate(SS, (STACK_32BIT)?REG32(ESP):REG16(SP), 0);
if(operand32 == 0)
{
@@ -2175,7 +2175,7 @@ void i386_device::i386_protected_mode_retf(UINT8 count, UINT8 operand32)
}
if(operand32 == 0)
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+count+3) != 0)
{
logerror("RETF (%08x): SP is past stack segment limit.\n",m_pc);
@@ -2184,7 +2184,7 @@ void i386_device::i386_protected_mode_retf(UINT8 count, UINT8 operand32)
}
else
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+count+7) != 0)
{
logerror("RETF: ESP is past stack segment limit.\n");
@@ -2198,11 +2198,11 @@ void i386_device::i386_protected_mode_retf(UINT8 count, UINT8 operand32)
}
else if(RPL > CPL)
{
- UINT32 newSS, newESP; // when changing privilege
+ uint32_t newSS, newESP; // when changing privilege
/* outer privilege level */
if(operand32 == 0)
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+count+7) != 0)
{
logerror("RETF (%08x): SP is past stack segment limit.\n",m_pc);
@@ -2211,7 +2211,7 @@ void i386_device::i386_protected_mode_retf(UINT8 count, UINT8 operand32)
}
else
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+count+15) != 0)
{
logerror("RETF: ESP is past stack segment limit.\n");
@@ -2359,15 +2359,15 @@ void i386_device::i386_protected_mode_retf(UINT8 count, UINT8 operand32)
void i386_device::i386_protected_mode_iret(int operand32)
{
- UINT32 newCS, newEIP;
- UINT32 newSS, newESP; // when changing privilege
+ uint32_t newCS, newEIP;
+ uint32_t newSS, newESP; // when changing privilege
I386_SREG desc,stack;
- UINT8 CPL, RPL, DPL;
- UINT32 newflags;
- UINT8 IOPL = m_IOP1 | (m_IOP2 << 1);
+ uint8_t CPL, RPL, DPL;
+ uint32_t newflags;
+ uint8_t IOPL = m_IOP1 | (m_IOP2 << 1);
CPL = m_CPL;
- UINT32 ea = i386_translate(SS, (STACK_32BIT)?REG32(ESP):REG16(SP), 0);
+ uint32_t ea = i386_translate(SS, (STACK_32BIT)?REG32(ESP):REG16(SP), 0);
if(operand32 == 0)
{
newEIP = READ16(ea) & 0xffff;
@@ -2383,7 +2383,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
if(V8086_MODE)
{
- UINT32 oldflags = get_flags();
+ uint32_t oldflags = get_flags();
if(IOPL != 3)
{
logerror("IRET (%08x): Is in Virtual 8086 mode and IOPL != 3.\n",m_pc);
@@ -2410,7 +2410,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
}
else if(NESTED_TASK)
{
- UINT32 task = READ32(m_task.base);
+ uint32_t task = READ32(m_task.base);
/* Task Return */
logerror("IRET (%08x): Nested task return.\n",m_pc);
/* Check back-link selector in TSS */
@@ -2454,7 +2454,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
//logerror("IRET (%08x): Returning to Virtual 8086 mode.\n",m_pc);
if(CPL != 0)
{
- UINT32 oldflags = get_flags();
+ uint32_t oldflags = get_flags();
newflags = (newflags & ~0x00003000) | (oldflags & 0x00003000);
if(CPL > IOPL)
newflags = (newflags & ~0x200 ) | (oldflags & 0x200);
@@ -2482,7 +2482,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
{
if(operand32 == 0)
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) != 0)
{
logerror("IRET: Data on stack is past SS limit.\n");
@@ -2491,7 +2491,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
}
else
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+7) != 0)
{
logerror("IRET: Data on stack is past SS limit.\n");
@@ -2509,7 +2509,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
/* return to same privilege level */
if(operand32 == 0)
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+5) != 0)
{
logerror("IRET (%08x): Data on stack is past SS limit.\n",m_pc);
@@ -2518,7 +2518,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
}
else
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+11) != 0)
{
logerror("IRET (%08x): Data on stack is past SS limit.\n",m_pc);
@@ -2585,7 +2585,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
if(CPL != 0)
{
- UINT32 oldflags = get_flags();
+ uint32_t oldflags = get_flags();
newflags = (newflags & ~0x00003000) | (oldflags & 0x00003000);
if(CPL > IOPL)
newflags = (newflags & ~0x200 ) | (oldflags & 0x200);
@@ -2616,7 +2616,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
RPL = newCS & 0x03;
if(operand32 == 0)
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+9) != 0)
{
logerror("IRET: SP is past SS limit.\n");
@@ -2625,7 +2625,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
}
else
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+19) != 0)
{
logerror("IRET: ESP is past SS limit.\n");
@@ -2756,7 +2756,7 @@ void i386_device::i386_protected_mode_iret(int operand32)
// IOPL can only change if CPL is zero
if(CPL != 0)
{
- UINT32 oldflags = get_flags();
+ uint32_t oldflags = get_flags();
newflags = (newflags & ~0x00003000) | (oldflags & 0x00003000);
if(CPL > IOPL)
newflags = (newflags & ~0x200 ) | (oldflags & 0x200);
@@ -2841,8 +2841,8 @@ void i386_device::build_cycle_table()
int i, j;
for (j=0; j < X86_NUM_CPUS; j++)
{
- cycle_table_rm[j] = std::make_unique<UINT8[]>(CYCLES_NUM_OPCODES);
- cycle_table_pm[j] = std::make_unique<UINT8[]>(CYCLES_NUM_OPCODES);
+ cycle_table_rm[j] = std::make_unique<uint8_t[]>(CYCLES_NUM_OPCODES);
+ cycle_table_pm[j] = std::make_unique<uint8_t[]>(CYCLES_NUM_OPCODES);
for (i=0; i < sizeof(x86_cycle_table)/sizeof(X86_CYCLE_TABLE); i++)
{
@@ -2865,7 +2865,7 @@ void i386_device::report_invalid_opcode()
#endif
}
-void i386_device::report_invalid_modrm(const char* opcode, UINT8 modrm)
+void i386_device::report_invalid_modrm(const char* opcode, uint8_t modrm)
{
#ifndef DEBUG_MISSING_OPCODE
logerror("i386: Invalid %s modrm %01X at %08X\n", opcode, modrm, m_pc - 2);
@@ -3019,9 +3019,9 @@ void i386_device::i386_decode_four_byte38f3()
/*************************************************************************/
-UINT8 i386_device::read8_debug(UINT32 ea, UINT8 *data)
+uint8_t i386_device::read8_debug(uint32_t ea, uint8_t *data)
{
- UINT32 address = ea;
+ uint32_t address = ea;
if(!i386_translate_address(TRANSLATE_DEBUG_MASK,&address,nullptr))
return 0;
@@ -3031,11 +3031,11 @@ UINT8 i386_device::read8_debug(UINT32 ea, UINT8 *data)
return 1;
}
-UINT32 i386_device::i386_get_debug_desc(I386_SREG *seg)
+uint32_t i386_device::i386_get_debug_desc(I386_SREG *seg)
{
- UINT32 base, limit, address;
- union { UINT8 b[8]; UINT32 w[2]; } data;
- UINT8 ret;
+ uint32_t base, limit, address;
+ union { uint8_t b[8]; uint32_t w[2]; } data;
+ uint8_t ret;
int entry;
if ( seg->selector & 0x4 )
@@ -3077,9 +3077,9 @@ UINT32 i386_device::i386_get_debug_desc(I386_SREG *seg)
return seg->valid;
}
-UINT64 i386_device::debug_segbase(symbol_table &table, int params, const UINT64 *param)
+uint64_t i386_device::debug_segbase(symbol_table &table, int params, const uint64_t *param)
{
- UINT32 result;
+ uint32_t result;
I386_SREG seg;
if(param[0] > 65535)
@@ -3100,9 +3100,9 @@ UINT64 i386_device::debug_segbase(symbol_table &table, int params, const UINT64
return result;
}
-UINT64 i386_device::debug_seglimit(symbol_table &table, int params, const UINT64 *param)
+uint64_t i386_device::debug_seglimit(symbol_table &table, int params, const uint64_t *param)
{
- UINT32 result = 0;
+ uint32_t result = 0;
I386_SREG seg;
if (PROTECTED_MODE && !V8086_MODE)
@@ -3116,9 +3116,9 @@ UINT64 i386_device::debug_seglimit(symbol_table &table, int params, const UINT64
return result;
}
-UINT64 i386_device::debug_segofftovirt(symbol_table &table, int params, const UINT64 *param)
+uint64_t i386_device::debug_segofftovirt(symbol_table &table, int params, const uint64_t *param)
{
- UINT32 result;
+ uint32_t result;
I386_SREG seg;
if(param[0] > 65535)
@@ -3154,34 +3154,34 @@ UINT64 i386_device::debug_segofftovirt(symbol_table &table, int params, const UI
return result;
}
-UINT64 i386_device::debug_virttophys(symbol_table &table, int params, const UINT64 *param)
+uint64_t i386_device::debug_virttophys(symbol_table &table, int params, const uint64_t *param)
{
- UINT32 result = param[0];
+ uint32_t result = param[0];
if(!i386_translate_address(TRANSLATE_DEBUG_MASK,&result,nullptr))
return 0;
return result;
}
-UINT64 i386_debug_segbase(symbol_table &table, void *ref, int params, const UINT64 *param)
+uint64_t i386_debug_segbase(symbol_table &table, void *ref, int params, const uint64_t *param)
{
i386_device *i386 = (i386_device *)(ref);
return i386->debug_segbase(table, params, param);
}
-UINT64 i386_debug_seglimit(symbol_table &table, void *ref, int params, const UINT64 *param)
+uint64_t i386_debug_seglimit(symbol_table &table, void *ref, int params, const uint64_t *param)
{
i386_device *i386 = (i386_device *)(ref);
return i386->debug_seglimit(table, params, param);
}
-UINT64 i386_debug_segofftovirt(symbol_table &table, void *ref, int params, const UINT64 *param)
+uint64_t i386_debug_segofftovirt(symbol_table &table, void *ref, int params, const uint64_t *param)
{
i386_device *i386 = (i386_device *)(ref);
return i386->debug_segofftovirt(table, params, param);
}
-static UINT64 i386_debug_virttophys(symbol_table &table, void *ref, int params, const UINT64 *param)
+static uint64_t i386_debug_virttophys(symbol_table &table, void *ref, int params, const uint64_t *param)
{
i386_device *i386 = (i386_device *)(ref);
return i386->debug_virttophys(table, params, param);
@@ -3550,7 +3550,7 @@ void i386_device::state_string_export(const device_state_entry &entry, std::stri
}
}
-void i386_device::build_opcode_table(UINT32 features)
+void i386_device::build_opcode_table(uint32_t features)
{
int i;
for (i=0; i < 256; i++)
@@ -3766,9 +3766,9 @@ void i386_device::device_reset()
void i386_device::pentium_smi()
{
- UINT32 smram_state = m_smbase + 0xfe00;
- UINT32 old_cr0 = m_cr[0];
- UINT32 old_flags = get_flags();
+ uint32_t smram_state = m_smbase + 0xfe00;
+ uint32_t old_cr0 = m_cr[0];
+ uint32_t old_flags = get_flags();
if(m_smm)
return;
@@ -3971,7 +3971,7 @@ void i386_device::execute_run()
if(m_lock && (m_opcode != 0xf0))
m_lock = false;
}
- catch(UINT64 e)
+ catch(uint64_t e)
{
m_ext = 1;
i386_trap_with_error(e&0xffffffff,0,0,e>>32);
@@ -3991,7 +3991,7 @@ bool i386_device::memory_translate(address_spacenum spacenum, int intention, off
return ret;
}
-offs_t i386_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i386_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return i386_dasm_one(buffer, pc, oprom, m_sreg[CS].d ? 32 : 16);
}
diff --git a/src/devices/cpu/i386/i386.h b/src/devices/cpu/i386/i386.h
index 8e64458f228..60c962e8567 100644
--- a/src/devices/cpu/i386/i386.h
+++ b/src/devices/cpu/i386/i386.h
@@ -28,16 +28,16 @@ class i386_device : public cpu_device, public device_vtlb_interface
{
public:
// construction/destruction
- i386_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- i386_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int program_data_width=32, int program_addr_width=32, int io_data_width=32);
+ i386_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i386_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int program_data_width=32, int program_addr_width=32, int io_data_width=32);
// static configuration helpers
template<class _Object> static devcb_base &set_smiact(device_t &device, _Object object) { return downcast<i386_device &>(device).m_smiact.set_callback(object); }
- UINT64 debug_segbase(symbol_table &table, int params, const UINT64 *param);
- UINT64 debug_seglimit(symbol_table &table, int params, const UINT64 *param);
- UINT64 debug_segofftovirt(symbol_table &table, int params, const UINT64 *param);
- UINT64 debug_virttophys(symbol_table &table, int params, const UINT64 *param);
+ uint64_t debug_segbase(symbol_table &table, int params, const uint64_t *param);
+ uint64_t debug_seglimit(symbol_table &table, int params, const uint64_t *param);
+ uint64_t debug_segofftovirt(symbol_table &table, int params, const uint64_t *param);
+ uint64_t debug_virttophys(symbol_table &table, int params, const uint64_t *param);
protected:
// device-level overrides
@@ -46,9 +46,9 @@ protected:
virtual void device_debug_setup() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 40; }
- virtual UINT32 execute_input_lines() const override { return 32; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 40; }
+ virtual uint32_t execute_input_lines() const override { return 32; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -62,85 +62,85 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 15; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 15; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
address_space_config m_io_config;
- std::unique_ptr<UINT8[]> cycle_table_rm[X86_NUM_CPUS];
- std::unique_ptr<UINT8[]> cycle_table_pm[X86_NUM_CPUS];
+ std::unique_ptr<uint8_t[]> cycle_table_rm[X86_NUM_CPUS];
+ std::unique_ptr<uint8_t[]> cycle_table_pm[X86_NUM_CPUS];
union I386_GPR {
- UINT32 d[8];
- UINT16 w[16];
- UINT8 b[32];
+ uint32_t d[8];
+ uint16_t w[16];
+ uint8_t b[32];
};
struct I386_SREG {
- UINT16 selector;
- UINT16 flags;
- UINT32 base;
- UINT32 limit;
+ uint16_t selector;
+ uint16_t flags;
+ uint32_t base;
+ uint32_t limit;
int d; // Operand size
bool valid;
};
struct I386_SYS_TABLE {
- UINT32 base;
- UINT16 limit;
+ uint32_t base;
+ uint16_t limit;
};
struct I386_SEG_DESC {
- UINT16 segment;
- UINT16 flags;
- UINT32 base;
- UINT32 limit;
+ uint16_t segment;
+ uint16_t flags;
+ uint32_t base;
+ uint32_t limit;
};
union XMM_REG {
- UINT8 b[16];
- UINT16 w[8];
- UINT32 d[4];
- UINT64 q[2];
- INT8 c[16];
- INT16 s[8];
- INT32 i[4];
- INT64 l[2];
+ uint8_t b[16];
+ uint16_t w[8];
+ uint32_t d[4];
+ uint64_t q[2];
+ int8_t c[16];
+ int16_t s[8];
+ int32_t i[4];
+ int64_t l[2];
float f[4];
double f64[2];
};
union MMX_REG {
- UINT32 d[2];
- INT32 i[2];
- UINT16 w[4];
- INT16 s[4];
- UINT8 b[8];
- INT8 c[8];
+ uint32_t d[2];
+ int32_t i[2];
+ uint16_t w[4];
+ int16_t s[4];
+ uint8_t b[8];
+ int8_t c[8];
float f[2];
- UINT64 q;
- INT64 l;
+ uint64_t q;
+ int64_t l;
};
struct I386_CALL_GATE
{
- UINT16 segment;
- UINT16 selector;
- UINT32 offset;
- UINT8 ar; // access rights
- UINT8 dpl;
- UINT8 dword_count;
- UINT8 present;
+ uint16_t segment;
+ uint16_t selector;
+ uint32_t offset;
+ uint8_t ar; // access rights
+ uint8_t dpl;
+ uint8_t dword_count;
+ uint8_t present;
};
- typedef void (i386_device::*i386_modrm_func)(UINT8 modrm);
+ typedef void (i386_device::*i386_modrm_func)(uint8_t modrm);
typedef void (i386_device::*i386_op_func)();
struct X86_OPCODE {
- UINT8 opcode;
- UINT32 flags;
+ uint8_t opcode;
+ uint32_t flags;
i386_op_func handler16;
i386_op_func handler32;
bool lockable;
@@ -149,45 +149,45 @@ struct I386_CALL_GATE
I386_GPR m_reg;
I386_SREG m_sreg[6];
- UINT32 m_eip;
- UINT32 m_pc;
- UINT32 m_prev_eip;
- UINT32 m_eflags;
- UINT32 m_eflags_mask;
- UINT8 m_CF;
- UINT8 m_DF;
- UINT8 m_SF;
- UINT8 m_OF;
- UINT8 m_ZF;
- UINT8 m_PF;
- UINT8 m_AF;
- UINT8 m_IF;
- UINT8 m_TF;
- UINT8 m_IOP1;
- UINT8 m_IOP2;
- UINT8 m_NT;
- UINT8 m_RF;
- UINT8 m_VM;
- UINT8 m_AC;
- UINT8 m_VIF;
- UINT8 m_VIP;
- UINT8 m_ID;
-
- UINT8 m_CPL; // current privilege level
-
- UINT8 m_performed_intersegment_jump;
- UINT8 m_delayed_interrupt_enable;
-
- UINT32 m_cr[5]; // Control registers
- UINT32 m_dr[8]; // Debug registers
- UINT32 m_tr[8]; // Test registers
+ uint32_t m_eip;
+ uint32_t m_pc;
+ uint32_t m_prev_eip;
+ uint32_t m_eflags;
+ uint32_t m_eflags_mask;
+ uint8_t m_CF;
+ uint8_t m_DF;
+ uint8_t m_SF;
+ uint8_t m_OF;
+ uint8_t m_ZF;
+ uint8_t m_PF;
+ uint8_t m_AF;
+ uint8_t m_IF;
+ uint8_t m_TF;
+ uint8_t m_IOP1;
+ uint8_t m_IOP2;
+ uint8_t m_NT;
+ uint8_t m_RF;
+ uint8_t m_VM;
+ uint8_t m_AC;
+ uint8_t m_VIF;
+ uint8_t m_VIP;
+ uint8_t m_ID;
+
+ uint8_t m_CPL; // current privilege level
+
+ uint8_t m_performed_intersegment_jump;
+ uint8_t m_delayed_interrupt_enable;
+
+ uint32_t m_cr[5]; // Control registers
+ uint32_t m_dr[8]; // Debug registers
+ uint32_t m_tr[8]; // Test registers
I386_SYS_TABLE m_gdtr; // Global Descriptor Table Register
I386_SYS_TABLE m_idtr; // Interrupt Descriptor Table Register
I386_SEG_DESC m_task; // Task register
I386_SEG_DESC m_ldtr; // Local Descriptor Table Register
- UINT8 m_ext; // external interrupt
+ uint8_t m_ext; // external interrupt
int m_halted;
@@ -202,30 +202,30 @@ struct I386_CALL_GATE
int m_cycles;
int m_base_cycles;
- UINT8 m_opcode;
+ uint8_t m_opcode;
- UINT8 m_irq_state;
+ uint8_t m_irq_state;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
- UINT32 m_a20_mask;
+ uint32_t m_a20_mask;
int m_cpuid_max_input_value_eax;
- UINT32 m_cpuid_id0, m_cpuid_id1, m_cpuid_id2;
- UINT32 m_cpu_version;
- UINT32 m_feature_flags;
- UINT64 m_tsc;
- UINT64 m_perfctr[2];
+ uint32_t m_cpuid_id0, m_cpuid_id1, m_cpuid_id2;
+ uint32_t m_cpu_version;
+ uint32_t m_feature_flags;
+ uint64_t m_tsc;
+ uint64_t m_perfctr[2];
// FPU
floatx80 m_x87_reg[8];
- UINT16 m_x87_cw;
- UINT16 m_x87_sw;
- UINT16 m_x87_tw;
- UINT64 m_x87_data_ptr;
- UINT64 m_x87_inst_ptr;
- UINT16 m_x87_opcode;
+ uint16_t m_x87_cw;
+ uint16_t m_x87_sw;
+ uint16_t m_x87_tw;
+ uint64_t m_x87_data_ptr;
+ uint64_t m_x87_inst_ptr;
+ uint16_t m_x87_opcode;
i386_modrm_func m_opcode_table_x87_d8[256];
i386_modrm_func m_opcode_table_x87_d9[256];
@@ -238,7 +238,7 @@ struct I386_CALL_GATE
// SSE
XMM_REG m_sse_reg[8];
- UINT32 m_mxcsr;
+ uint32_t m_mxcsr;
i386_op_func m_opcode_table1_16[256];
i386_op_func m_opcode_table1_32[256];
@@ -267,121 +267,121 @@ struct I386_CALL_GATE
bool m_lock_table[2][256];
- UINT8 *m_cycle_table_pm;
- UINT8 *m_cycle_table_rm;
+ uint8_t *m_cycle_table_pm;
+ uint8_t *m_cycle_table_rm;
bool m_smm;
bool m_smi;
bool m_smi_latched;
bool m_nmi_masked;
bool m_nmi_latched;
- UINT32 m_smbase;
+ uint32_t m_smbase;
devcb_write_line m_smiact;
bool m_lock;
// bytes in current opcode, debug only
- UINT8 m_opcode_bytes[16];
- UINT32 m_opcode_pc;
+ uint8_t m_opcode_bytes[16];
+ uint32_t m_opcode_pc;
int m_opcode_bytes_length;
- UINT64 m_debugger_temp;
+ uint64_t m_debugger_temp;
void register_state_i386();
void register_state_i386_x87();
void register_state_i386_x87_xmm();
- inline UINT32 i386_translate(int segment, UINT32 ip, int rwn);
- inline vtlb_entry get_permissions(UINT32 pte, int wp);
+ inline uint32_t i386_translate(int segment, uint32_t ip, int rwn);
+ inline vtlb_entry get_permissions(uint32_t pte, int wp);
bool i386_translate_address(int intention, offs_t *address, vtlb_entry *entry);
- inline int translate_address(int pl, int type, UINT32 *address, UINT32 *error);
- inline void CHANGE_PC(UINT32 pc);
- inline void NEAR_BRANCH(INT32 offs);
- inline UINT8 FETCH();
- inline UINT16 FETCH16();
- inline UINT32 FETCH32();
- inline UINT8 READ8(UINT32 ea);
- inline UINT16 READ16(UINT32 ea);
- inline UINT32 READ32(UINT32 ea);
- inline UINT64 READ64(UINT32 ea);
- inline UINT8 READ8PL0(UINT32 ea);
- inline UINT16 READ16PL0(UINT32 ea);
- inline UINT32 READ32PL0(UINT32 ea);
- inline void WRITE_TEST(UINT32 ea);
- inline void WRITE8(UINT32 ea, UINT8 value);
- inline void WRITE16(UINT32 ea, UINT16 value);
- inline void WRITE32(UINT32 ea, UINT32 value);
- inline void WRITE64(UINT32 ea, UINT64 value);
- inline UINT8 OR8(UINT8 dst, UINT8 src);
- inline UINT16 OR16(UINT16 dst, UINT16 src);
- inline UINT32 OR32(UINT32 dst, UINT32 src);
- inline UINT8 AND8(UINT8 dst, UINT8 src);
- inline UINT16 AND16(UINT16 dst, UINT16 src);
- inline UINT32 AND32(UINT32 dst, UINT32 src);
- inline UINT8 XOR8(UINT8 dst, UINT8 src);
- inline UINT16 XOR16(UINT16 dst, UINT16 src);
- inline UINT32 XOR32(UINT32 dst, UINT32 src);
- inline UINT8 SBB8(UINT8 dst, UINT8 src, UINT8 b);
- inline UINT16 SBB16(UINT16 dst, UINT16 src, UINT16 b);
- inline UINT32 SBB32(UINT32 dst, UINT32 src, UINT32 b);
- inline UINT8 ADC8(UINT8 dst, UINT8 src, UINT8 c);
- inline UINT16 ADC16(UINT16 dst, UINT16 src, UINT8 c);
- inline UINT32 ADC32(UINT32 dst, UINT32 src, UINT32 c);
- inline UINT8 INC8(UINT8 dst);
- inline UINT16 INC16(UINT16 dst);
- inline UINT32 INC32(UINT32 dst);
- inline UINT8 DEC8(UINT8 dst);
- inline UINT16 DEC16(UINT16 dst);
- inline UINT32 DEC32(UINT32 dst);
- inline void PUSH16(UINT16 value);
- inline void PUSH32(UINT32 value);
- inline void PUSH32SEG(UINT32 value);
- inline void PUSH8(UINT8 value);
- inline UINT8 POP8();
- inline UINT16 POP16();
- inline UINT32 POP32();
+ inline int translate_address(int pl, int type, uint32_t *address, uint32_t *error);
+ inline void CHANGE_PC(uint32_t pc);
+ inline void NEAR_BRANCH(int32_t offs);
+ inline uint8_t FETCH();
+ inline uint16_t FETCH16();
+ inline uint32_t FETCH32();
+ inline uint8_t READ8(uint32_t ea);
+ inline uint16_t READ16(uint32_t ea);
+ inline uint32_t READ32(uint32_t ea);
+ inline uint64_t READ64(uint32_t ea);
+ inline uint8_t READ8PL0(uint32_t ea);
+ inline uint16_t READ16PL0(uint32_t ea);
+ inline uint32_t READ32PL0(uint32_t ea);
+ inline void WRITE_TEST(uint32_t ea);
+ inline void WRITE8(uint32_t ea, uint8_t value);
+ inline void WRITE16(uint32_t ea, uint16_t value);
+ inline void WRITE32(uint32_t ea, uint32_t value);
+ inline void WRITE64(uint32_t ea, uint64_t value);
+ inline uint8_t OR8(uint8_t dst, uint8_t src);
+ inline uint16_t OR16(uint16_t dst, uint16_t src);
+ inline uint32_t OR32(uint32_t dst, uint32_t src);
+ inline uint8_t AND8(uint8_t dst, uint8_t src);
+ inline uint16_t AND16(uint16_t dst, uint16_t src);
+ inline uint32_t AND32(uint32_t dst, uint32_t src);
+ inline uint8_t XOR8(uint8_t dst, uint8_t src);
+ inline uint16_t XOR16(uint16_t dst, uint16_t src);
+ inline uint32_t XOR32(uint32_t dst, uint32_t src);
+ inline uint8_t SBB8(uint8_t dst, uint8_t src, uint8_t b);
+ inline uint16_t SBB16(uint16_t dst, uint16_t src, uint16_t b);
+ inline uint32_t SBB32(uint32_t dst, uint32_t src, uint32_t b);
+ inline uint8_t ADC8(uint8_t dst, uint8_t src, uint8_t c);
+ inline uint16_t ADC16(uint16_t dst, uint16_t src, uint8_t c);
+ inline uint32_t ADC32(uint32_t dst, uint32_t src, uint32_t c);
+ inline uint8_t INC8(uint8_t dst);
+ inline uint16_t INC16(uint16_t dst);
+ inline uint32_t INC32(uint32_t dst);
+ inline uint8_t DEC8(uint8_t dst);
+ inline uint16_t DEC16(uint16_t dst);
+ inline uint32_t DEC32(uint32_t dst);
+ inline void PUSH16(uint16_t value);
+ inline void PUSH32(uint32_t value);
+ inline void PUSH32SEG(uint32_t value);
+ inline void PUSH8(uint8_t value);
+ inline uint8_t POP8();
+ inline uint16_t POP16();
+ inline uint32_t POP32();
inline void BUMP_SI(int adjustment);
inline void BUMP_DI(int adjustment);
- inline void check_ioperm(offs_t port, UINT8 mask);
- inline UINT8 READPORT8(offs_t port);
- inline void WRITEPORT8(offs_t port, UINT8 value);
- inline UINT16 READPORT16(offs_t port);
- inline void WRITEPORT16(offs_t port, UINT16 value);
- inline UINT32 READPORT32(offs_t port);
- inline void WRITEPORT32(offs_t port, UINT32 value);
- UINT64 pentium_msr_read(UINT32 offset,UINT8 *valid_msr);
- void pentium_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr);
- UINT64 p6_msr_read(UINT32 offset,UINT8 *valid_msr);
- void p6_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr);
- UINT64 piv_msr_read(UINT32 offset,UINT8 *valid_msr);
- void piv_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr);
- inline UINT64 MSR_READ(UINT32 offset,UINT8 *valid_msr);
- inline void MSR_WRITE(UINT32 offset, UINT64 data, UINT8 *valid_msr);
- UINT32 i386_load_protected_mode_segment(I386_SREG *seg, UINT64 *desc );
+ inline void check_ioperm(offs_t port, uint8_t mask);
+ inline uint8_t READPORT8(offs_t port);
+ inline void WRITEPORT8(offs_t port, uint8_t value);
+ inline uint16_t READPORT16(offs_t port);
+ inline void WRITEPORT16(offs_t port, uint16_t value);
+ inline uint32_t READPORT32(offs_t port);
+ inline void WRITEPORT32(offs_t port, uint32_t value);
+ uint64_t pentium_msr_read(uint32_t offset,uint8_t *valid_msr);
+ void pentium_msr_write(uint32_t offset, uint64_t data, uint8_t *valid_msr);
+ uint64_t p6_msr_read(uint32_t offset,uint8_t *valid_msr);
+ void p6_msr_write(uint32_t offset, uint64_t data, uint8_t *valid_msr);
+ uint64_t piv_msr_read(uint32_t offset,uint8_t *valid_msr);
+ void piv_msr_write(uint32_t offset, uint64_t data, uint8_t *valid_msr);
+ inline uint64_t MSR_READ(uint32_t offset,uint8_t *valid_msr);
+ inline void MSR_WRITE(uint32_t offset, uint64_t data, uint8_t *valid_msr);
+ uint32_t i386_load_protected_mode_segment(I386_SREG *seg, uint64_t *desc );
void i386_load_call_gate(I386_CALL_GATE *gate);
- void i386_set_descriptor_accessed(UINT16 selector);
+ void i386_set_descriptor_accessed(uint16_t selector);
void i386_load_segment_descriptor(int segment );
- UINT32 i386_get_stack_segment(UINT8 privilege);
- UINT32 i386_get_stack_ptr(UINT8 privilege);
- UINT32 get_flags() const;
- void set_flags(UINT32 f );
- void sib_byte(UINT8 mod, UINT32* out_ea, UINT8* out_segment);
- void modrm_to_EA(UINT8 mod_rm, UINT32* out_ea, UINT8* out_segment);
- UINT32 GetNonTranslatedEA(UINT8 modrm,UINT8 *seg);
- UINT32 GetEA(UINT8 modrm, int rwn);
+ uint32_t i386_get_stack_segment(uint8_t privilege);
+ uint32_t i386_get_stack_ptr(uint8_t privilege);
+ uint32_t get_flags() const;
+ void set_flags(uint32_t f );
+ void sib_byte(uint8_t mod, uint32_t* out_ea, uint8_t* out_segment);
+ void modrm_to_EA(uint8_t mod_rm, uint32_t* out_ea, uint8_t* out_segment);
+ uint32_t GetNonTranslatedEA(uint8_t modrm,uint8_t *seg);
+ uint32_t GetEA(uint8_t modrm, int rwn);
void i386_check_sreg_validity(int reg);
- int i386_limit_check(int seg, UINT32 offset);
- void i386_sreg_load(UINT16 selector, UINT8 reg, bool *fault);
+ int i386_limit_check(int seg, uint32_t offset);
+ void i386_sreg_load(uint16_t selector, uint8_t reg, bool *fault);
void i386_trap(int irq, int irq_gate, int trap_level);
- void i386_trap_with_error(int irq, int irq_gate, int trap_level, UINT32 error);
- void i286_task_switch(UINT16 selector, UINT8 nested);
- void i386_task_switch(UINT16 selector, UINT8 nested);
+ void i386_trap_with_error(int irq, int irq_gate, int trap_level, uint32_t error);
+ void i286_task_switch(uint16_t selector, uint8_t nested);
+ void i386_task_switch(uint16_t selector, uint8_t nested);
void i386_check_irq_line();
- void i386_protected_mode_jump(UINT16 seg, UINT32 off, int indirect, int operand32);
- void i386_protected_mode_call(UINT16 seg, UINT32 off, int indirect, int operand32);
- void i386_protected_mode_retf(UINT8 count, UINT8 operand32);
+ void i386_protected_mode_jump(uint16_t seg, uint32_t off, int indirect, int operand32);
+ void i386_protected_mode_call(uint16_t seg, uint32_t off, int indirect, int operand32);
+ void i386_protected_mode_retf(uint8_t count, uint8_t operand32);
void i386_protected_mode_iret(int operand32);
void build_cycle_table();
void report_invalid_opcode();
- void report_invalid_modrm(const char* opcode, UINT8 modrm);
+ void report_invalid_modrm(const char* opcode, uint8_t modrm);
void i386_decode_opcode();
void i386_decode_two_byte();
void i386_decode_three_byte38();
@@ -394,11 +394,11 @@ struct I386_CALL_GATE
void i386_decode_four_byte38f2();
void i386_decode_four_byte3af2();
void i386_decode_four_byte38f3();
- UINT8 read8_debug(UINT32 ea, UINT8 *data);
- UINT32 i386_get_debug_desc(I386_SREG *seg);
+ uint8_t read8_debug(uint32_t ea, uint8_t *data);
+ uint32_t i386_get_debug_desc(I386_SREG *seg);
inline void CYCLES(int x);
inline void CYCLES_RM(int modrm, int r, int m);
- UINT8 i386_shift_rotate8(UINT8 modrm, UINT32 value, UINT8 shift);
+ uint8_t i386_shift_rotate8(uint8_t modrm, uint32_t value, uint8_t shift);
void i386_adc_rm8_r8();
void i386_adc_r8_rm8();
void i386_adc_al_i8();
@@ -545,7 +545,7 @@ struct I386_CALL_GATE
void i386_loadall();
void i386_invalid();
void i386_xlat();
- UINT16 i386_shift_rotate16(UINT8 modrm, UINT32 value, UINT8 shift);
+ uint16_t i386_shift_rotate16(uint8_t modrm, uint32_t value, uint8_t shift);
void i386_adc_rm16_r16();
void i386_adc_r16_rm16();
void i386_adc_ax_i16();
@@ -720,7 +720,7 @@ struct I386_CALL_GATE
void i386_les16();
void i386_lfs16();
void i386_lgs16();
- UINT32 i386_shift_rotate32(UINT8 modrm, UINT32 value, UINT8 shift);
+ uint32_t i386_shift_rotate32(uint8_t modrm, uint32_t value, uint8_t shift);
void i386_adc_rm32_r32();
void i386_adc_r32_rm32();
void i386_adc_eax_i32();
@@ -918,14 +918,14 @@ struct I386_CALL_GATE
void i486_bswap_edi();
void i486_mov_cr_r32();
inline void MMXPROLOG();
- inline void READMMX(UINT32 ea,MMX_REG &r);
- inline void WRITEMMX(UINT32 ea,MMX_REG &r);
- inline void READXMM(UINT32 ea,XMM_REG &r);
- inline void WRITEXMM(UINT32 ea,XMM_REG &r);
- inline void READXMM_LO64(UINT32 ea,XMM_REG &r);
- inline void WRITEXMM_LO64(UINT32 ea,XMM_REG &r);
- inline void READXMM_HI64(UINT32 ea,XMM_REG &r);
- inline void WRITEXMM_HI64(UINT32 ea,XMM_REG &r);
+ inline void READMMX(uint32_t ea,MMX_REG &r);
+ inline void WRITEMMX(uint32_t ea,MMX_REG &r);
+ inline void READXMM(uint32_t ea,XMM_REG &r);
+ inline void WRITEXMM(uint32_t ea,XMM_REG &r);
+ inline void READXMM_LO64(uint32_t ea,XMM_REG &r);
+ inline void WRITEXMM_LO64(uint32_t ea,XMM_REG &r);
+ inline void READXMM_HI64(uint32_t ea,XMM_REG &r);
+ inline void WRITEXMM_HI64(uint32_t ea,XMM_REG &r);
void pentium_rdmsr();
void pentium_wrmsr();
void pentium_rdtsc();
@@ -1241,12 +1241,12 @@ struct I386_CALL_GATE
void sse_movdq2q_r64_r128();
void sse_cvtpd2dq_r128_rm128();
void sse_lddqu_r128_m128();
- inline void sse_predicate_compare_single(UINT8 imm8, XMM_REG d, XMM_REG s);
- inline void sse_predicate_compare_double(UINT8 imm8, XMM_REG d, XMM_REG s);
- inline void sse_predicate_compare_single_scalar(UINT8 imm8, XMM_REG d, XMM_REG s);
- inline void sse_predicate_compare_double_scalar(UINT8 imm8, XMM_REG d, XMM_REG s);
- inline floatx80 READ80(UINT32 ea);
- inline void WRITE80(UINT32 ea, floatx80 t);
+ inline void sse_predicate_compare_single(uint8_t imm8, XMM_REG d, XMM_REG s);
+ inline void sse_predicate_compare_double(uint8_t imm8, XMM_REG d, XMM_REG s);
+ inline void sse_predicate_compare_single_scalar(uint8_t imm8, XMM_REG d, XMM_REG s);
+ inline void sse_predicate_compare_double_scalar(uint8_t imm8, XMM_REG d, XMM_REG s);
+ inline floatx80 READ80(uint32_t ea);
+ inline void WRITE80(uint32_t ea, floatx80 t);
inline void x87_set_stack_top(int top);
inline void x87_set_tag(int reg, int tag);
void x87_write_stack(int i, floatx80 value, int update_tag);
@@ -1255,143 +1255,143 @@ struct I386_CALL_GATE
int x87_inc_stack();
int x87_dec_stack();
int x87_check_exceptions();
- inline void x87_write_cw(UINT16 cw);
+ inline void x87_write_cw(uint16_t cw);
void x87_reset();
floatx80 x87_add(floatx80 a, floatx80 b);
floatx80 x87_sub(floatx80 a, floatx80 b);
floatx80 x87_mul(floatx80 a, floatx80 b);
floatx80 x87_div(floatx80 a, floatx80 b);
- void x87_fadd_m32real(UINT8 modrm);
- void x87_fadd_m64real(UINT8 modrm);
- void x87_fadd_st_sti(UINT8 modrm);
- void x87_fadd_sti_st(UINT8 modrm);
- void x87_faddp(UINT8 modrm);
- void x87_fiadd_m32int(UINT8 modrm);
- void x87_fiadd_m16int(UINT8 modrm);
- void x87_fsub_m32real(UINT8 modrm);
- void x87_fsub_m64real(UINT8 modrm);
- void x87_fsub_st_sti(UINT8 modrm);
- void x87_fsub_sti_st(UINT8 modrm);
- void x87_fsubp(UINT8 modrm);
- void x87_fisub_m32int(UINT8 modrm);
- void x87_fisub_m16int(UINT8 modrm);
- void x87_fsubr_m32real(UINT8 modrm);
- void x87_fsubr_m64real(UINT8 modrm);
- void x87_fsubr_st_sti(UINT8 modrm);
- void x87_fsubr_sti_st(UINT8 modrm);
- void x87_fsubrp(UINT8 modrm);
- void x87_fisubr_m32int(UINT8 modrm);
- void x87_fisubr_m16int(UINT8 modrm);
- void x87_fdiv_m32real(UINT8 modrm);
- void x87_fdiv_m64real(UINT8 modrm);
- void x87_fdiv_st_sti(UINT8 modrm);
- void x87_fdiv_sti_st(UINT8 modrm);
- void x87_fdivp(UINT8 modrm);
- void x87_fidiv_m32int(UINT8 modrm);
- void x87_fidiv_m16int(UINT8 modrm);
- void x87_fdivr_m32real(UINT8 modrm);
- void x87_fdivr_m64real(UINT8 modrm);
- void x87_fdivr_st_sti(UINT8 modrm);
- void x87_fdivr_sti_st(UINT8 modrm);
- void x87_fdivrp(UINT8 modrm);
- void x87_fidivr_m32int(UINT8 modrm);
- void x87_fidivr_m16int(UINT8 modrm);
- void x87_fmul_m32real(UINT8 modrm);
- void x87_fmul_m64real(UINT8 modrm);
- void x87_fmul_st_sti(UINT8 modrm);
- void x87_fmul_sti_st(UINT8 modrm);
- void x87_fmulp(UINT8 modrm);
- void x87_fimul_m32int(UINT8 modrm);
- void x87_fimul_m16int(UINT8 modrm);
- void x87_fprem(UINT8 modrm);
- void x87_fprem1(UINT8 modrm);
- void x87_fsqrt(UINT8 modrm);
- void x87_f2xm1(UINT8 modrm);
- void x87_fyl2x(UINT8 modrm);
- void x87_fyl2xp1(UINT8 modrm);
- void x87_fptan(UINT8 modrm);
- void x87_fpatan(UINT8 modrm);
- void x87_fsin(UINT8 modrm);
- void x87_fcos(UINT8 modrm);
- void x87_fsincos(UINT8 modrm);
- void x87_fld_m32real(UINT8 modrm);
- void x87_fld_m64real(UINT8 modrm);
- void x87_fld_m80real(UINT8 modrm);
- void x87_fld_sti(UINT8 modrm);
- void x87_fild_m16int(UINT8 modrm);
- void x87_fild_m32int(UINT8 modrm);
- void x87_fild_m64int(UINT8 modrm);
- void x87_fbld(UINT8 modrm);
- void x87_fst_m32real(UINT8 modrm);
- void x87_fst_m64real(UINT8 modrm);
- void x87_fst_sti(UINT8 modrm);
- void x87_fstp_m32real(UINT8 modrm);
- void x87_fstp_m64real(UINT8 modrm);
- void x87_fstp_m80real(UINT8 modrm);
- void x87_fstp_sti(UINT8 modrm);
- void x87_fist_m16int(UINT8 modrm);
- void x87_fist_m32int(UINT8 modrm);
- void x87_fistp_m16int(UINT8 modrm);
- void x87_fistp_m32int(UINT8 modrm);
- void x87_fistp_m64int(UINT8 modrm);
- void x87_fbstp(UINT8 modrm);
- void x87_fld1(UINT8 modrm);
- void x87_fldl2t(UINT8 modrm);
- void x87_fldl2e(UINT8 modrm);
- void x87_fldpi(UINT8 modrm);
- void x87_fldlg2(UINT8 modrm);
- void x87_fldln2(UINT8 modrm);
- void x87_fldz(UINT8 modrm);
- void x87_fnop(UINT8 modrm);
- void x87_fchs(UINT8 modrm);
- void x87_fabs(UINT8 modrm);
- void x87_fscale(UINT8 modrm);
- void x87_frndint(UINT8 modrm);
- void x87_fxtract(UINT8 modrm);
- void x87_ftst(UINT8 modrm);
- void x87_fxam(UINT8 modrm);
- void x87_fcmovb_sti(UINT8 modrm);
- void x87_fcmove_sti(UINT8 modrm);
- void x87_fcmovbe_sti(UINT8 modrm);
- void x87_fcmovu_sti(UINT8 modrm);
- void x87_fcmovnb_sti(UINT8 modrm);
- void x87_fcmovne_sti(UINT8 modrm);
- void x87_fcmovnbe_sti(UINT8 modrm);
- void x87_fcmovnu_sti(UINT8 modrm);
- void x87_ficom_m16int(UINT8 modrm);
- void x87_ficom_m32int(UINT8 modrm);
- void x87_ficomp_m16int(UINT8 modrm);
- void x87_ficomp_m32int(UINT8 modrm);
- void x87_fcom_m32real(UINT8 modrm);
- void x87_fcom_m64real(UINT8 modrm);
- void x87_fcom_sti(UINT8 modrm);
- void x87_fcomp_m32real(UINT8 modrm);
- void x87_fcomp_m64real(UINT8 modrm);
- void x87_fcomp_sti(UINT8 modrm);
- void x87_fcomi_sti(UINT8 modrm);
- void x87_fcomip_sti(UINT8 modrm);
- void x87_fucomi_sti(UINT8 modrm);
- void x87_fucomip_sti(UINT8 modrm);
- void x87_fcompp(UINT8 modrm);
- void x87_fucom_sti(UINT8 modrm);
- void x87_fucomp_sti(UINT8 modrm);
- void x87_fucompp(UINT8 modrm);
- void x87_fdecstp(UINT8 modrm);
- void x87_fincstp(UINT8 modrm);
- void x87_fclex(UINT8 modrm);
- void x87_ffree(UINT8 modrm);
- void x87_finit(UINT8 modrm);
- void x87_fldcw(UINT8 modrm);
- void x87_fstcw(UINT8 modrm);
- void x87_fldenv(UINT8 modrm);
- void x87_fstenv(UINT8 modrm);
- void x87_fsave(UINT8 modrm);
- void x87_frstor(UINT8 modrm);
- void x87_fxch(UINT8 modrm);
- void x87_fxch_sti(UINT8 modrm);
- void x87_fstsw_ax(UINT8 modrm);
- void x87_fstsw_m2byte(UINT8 modrm);
- void x87_invalid(UINT8 modrm);
+ void x87_fadd_m32real(uint8_t modrm);
+ void x87_fadd_m64real(uint8_t modrm);
+ void x87_fadd_st_sti(uint8_t modrm);
+ void x87_fadd_sti_st(uint8_t modrm);
+ void x87_faddp(uint8_t modrm);
+ void x87_fiadd_m32int(uint8_t modrm);
+ void x87_fiadd_m16int(uint8_t modrm);
+ void x87_fsub_m32real(uint8_t modrm);
+ void x87_fsub_m64real(uint8_t modrm);
+ void x87_fsub_st_sti(uint8_t modrm);
+ void x87_fsub_sti_st(uint8_t modrm);
+ void x87_fsubp(uint8_t modrm);
+ void x87_fisub_m32int(uint8_t modrm);
+ void x87_fisub_m16int(uint8_t modrm);
+ void x87_fsubr_m32real(uint8_t modrm);
+ void x87_fsubr_m64real(uint8_t modrm);
+ void x87_fsubr_st_sti(uint8_t modrm);
+ void x87_fsubr_sti_st(uint8_t modrm);
+ void x87_fsubrp(uint8_t modrm);
+ void x87_fisubr_m32int(uint8_t modrm);
+ void x87_fisubr_m16int(uint8_t modrm);
+ void x87_fdiv_m32real(uint8_t modrm);
+ void x87_fdiv_m64real(uint8_t modrm);
+ void x87_fdiv_st_sti(uint8_t modrm);
+ void x87_fdiv_sti_st(uint8_t modrm);
+ void x87_fdivp(uint8_t modrm);
+ void x87_fidiv_m32int(uint8_t modrm);
+ void x87_fidiv_m16int(uint8_t modrm);
+ void x87_fdivr_m32real(uint8_t modrm);
+ void x87_fdivr_m64real(uint8_t modrm);
+ void x87_fdivr_st_sti(uint8_t modrm);
+ void x87_fdivr_sti_st(uint8_t modrm);
+ void x87_fdivrp(uint8_t modrm);
+ void x87_fidivr_m32int(uint8_t modrm);
+ void x87_fidivr_m16int(uint8_t modrm);
+ void x87_fmul_m32real(uint8_t modrm);
+ void x87_fmul_m64real(uint8_t modrm);
+ void x87_fmul_st_sti(uint8_t modrm);
+ void x87_fmul_sti_st(uint8_t modrm);
+ void x87_fmulp(uint8_t modrm);
+ void x87_fimul_m32int(uint8_t modrm);
+ void x87_fimul_m16int(uint8_t modrm);
+ void x87_fprem(uint8_t modrm);
+ void x87_fprem1(uint8_t modrm);
+ void x87_fsqrt(uint8_t modrm);
+ void x87_f2xm1(uint8_t modrm);
+ void x87_fyl2x(uint8_t modrm);
+ void x87_fyl2xp1(uint8_t modrm);
+ void x87_fptan(uint8_t modrm);
+ void x87_fpatan(uint8_t modrm);
+ void x87_fsin(uint8_t modrm);
+ void x87_fcos(uint8_t modrm);
+ void x87_fsincos(uint8_t modrm);
+ void x87_fld_m32real(uint8_t modrm);
+ void x87_fld_m64real(uint8_t modrm);
+ void x87_fld_m80real(uint8_t modrm);
+ void x87_fld_sti(uint8_t modrm);
+ void x87_fild_m16int(uint8_t modrm);
+ void x87_fild_m32int(uint8_t modrm);
+ void x87_fild_m64int(uint8_t modrm);
+ void x87_fbld(uint8_t modrm);
+ void x87_fst_m32real(uint8_t modrm);
+ void x87_fst_m64real(uint8_t modrm);
+ void x87_fst_sti(uint8_t modrm);
+ void x87_fstp_m32real(uint8_t modrm);
+ void x87_fstp_m64real(uint8_t modrm);
+ void x87_fstp_m80real(uint8_t modrm);
+ void x87_fstp_sti(uint8_t modrm);
+ void x87_fist_m16int(uint8_t modrm);
+ void x87_fist_m32int(uint8_t modrm);
+ void x87_fistp_m16int(uint8_t modrm);
+ void x87_fistp_m32int(uint8_t modrm);
+ void x87_fistp_m64int(uint8_t modrm);
+ void x87_fbstp(uint8_t modrm);
+ void x87_fld1(uint8_t modrm);
+ void x87_fldl2t(uint8_t modrm);
+ void x87_fldl2e(uint8_t modrm);
+ void x87_fldpi(uint8_t modrm);
+ void x87_fldlg2(uint8_t modrm);
+ void x87_fldln2(uint8_t modrm);
+ void x87_fldz(uint8_t modrm);
+ void x87_fnop(uint8_t modrm);
+ void x87_fchs(uint8_t modrm);
+ void x87_fabs(uint8_t modrm);
+ void x87_fscale(uint8_t modrm);
+ void x87_frndint(uint8_t modrm);
+ void x87_fxtract(uint8_t modrm);
+ void x87_ftst(uint8_t modrm);
+ void x87_fxam(uint8_t modrm);
+ void x87_fcmovb_sti(uint8_t modrm);
+ void x87_fcmove_sti(uint8_t modrm);
+ void x87_fcmovbe_sti(uint8_t modrm);
+ void x87_fcmovu_sti(uint8_t modrm);
+ void x87_fcmovnb_sti(uint8_t modrm);
+ void x87_fcmovne_sti(uint8_t modrm);
+ void x87_fcmovnbe_sti(uint8_t modrm);
+ void x87_fcmovnu_sti(uint8_t modrm);
+ void x87_ficom_m16int(uint8_t modrm);
+ void x87_ficom_m32int(uint8_t modrm);
+ void x87_ficomp_m16int(uint8_t modrm);
+ void x87_ficomp_m32int(uint8_t modrm);
+ void x87_fcom_m32real(uint8_t modrm);
+ void x87_fcom_m64real(uint8_t modrm);
+ void x87_fcom_sti(uint8_t modrm);
+ void x87_fcomp_m32real(uint8_t modrm);
+ void x87_fcomp_m64real(uint8_t modrm);
+ void x87_fcomp_sti(uint8_t modrm);
+ void x87_fcomi_sti(uint8_t modrm);
+ void x87_fcomip_sti(uint8_t modrm);
+ void x87_fucomi_sti(uint8_t modrm);
+ void x87_fucomip_sti(uint8_t modrm);
+ void x87_fcompp(uint8_t modrm);
+ void x87_fucom_sti(uint8_t modrm);
+ void x87_fucomp_sti(uint8_t modrm);
+ void x87_fucompp(uint8_t modrm);
+ void x87_fdecstp(uint8_t modrm);
+ void x87_fincstp(uint8_t modrm);
+ void x87_fclex(uint8_t modrm);
+ void x87_ffree(uint8_t modrm);
+ void x87_finit(uint8_t modrm);
+ void x87_fldcw(uint8_t modrm);
+ void x87_fstcw(uint8_t modrm);
+ void x87_fldenv(uint8_t modrm);
+ void x87_fstenv(uint8_t modrm);
+ void x87_fsave(uint8_t modrm);
+ void x87_frstor(uint8_t modrm);
+ void x87_fxch(uint8_t modrm);
+ void x87_fxch_sti(uint8_t modrm);
+ void x87_fstsw_ax(uint8_t modrm);
+ void x87_fstsw_m2byte(uint8_t modrm);
+ void x87_invalid(uint8_t modrm);
void i386_x87_group_d8();
void i386_x87_group_d9();
void i386_x87_group_da();
@@ -1411,7 +1411,7 @@ struct I386_CALL_GATE
void build_x87_opcode_table();
void i386_postload();
void i386_common_init();
- void build_opcode_table(UINT32 features);
+ void build_opcode_table(uint32_t features);
void pentium_smi();
void zero_state();
void i386_set_a20_line(int state);
@@ -1423,7 +1423,7 @@ class i386SX_device : public i386_device
{
public:
// construction/destruction
- i386SX_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i386SX_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -1431,7 +1431,7 @@ class i486_device : public i386_device
{
public:
// construction/destruction
- i486_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i486_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -1443,8 +1443,8 @@ class pentium_device : public i386_device
{
public:
// construction/destruction
- pentium_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- pentium_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ pentium_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ pentium_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
protected:
virtual void execute_set_input(int inputnum, int state) override;
@@ -1457,7 +1457,7 @@ class mediagx_device : public i386_device
{
public:
// construction/destruction
- mediagx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mediagx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -1469,7 +1469,7 @@ class pentium_pro_device : public pentium_device
{
public:
// construction/destruction
- pentium_pro_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pentium_pro_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -1481,7 +1481,7 @@ class pentium_mmx_device : public pentium_device
{
public:
// construction/destruction
- pentium_mmx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pentium_mmx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -1493,7 +1493,7 @@ class pentium2_device : public pentium_device
{
public:
// construction/destruction
- pentium2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pentium2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -1505,7 +1505,7 @@ class pentium3_device : public pentium_device
{
public:
// construction/destruction
- pentium3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pentium3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
@@ -1517,7 +1517,7 @@ class pentium4_device : public pentium_device
{
public:
// construction/destruction
- pentium4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pentium4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_start() override;
diff --git a/src/devices/cpu/i386/i386dasm.cpp b/src/devices/cpu/i386/i386dasm.cpp
index 780cda0ba1d..0e39a2edfe8 100644
--- a/src/devices/cpu/i386/i386dasm.cpp
+++ b/src/devices/cpu/i386/i386dasm.cpp
@@ -102,10 +102,10 @@ enum
struct I386_OPCODE {
const char *mnemonic;
- UINT32 flags;
- UINT32 param1;
- UINT32 param2;
- UINT32 param3;
+ uint32_t flags;
+ uint32_t param1;
+ uint32_t param2;
+ uint32_t param3;
offs_t dasm_flags;
};
@@ -114,8 +114,8 @@ struct GROUP_OP {
const I386_OPCODE *opcode;
};
-static const UINT8 *opcode_ptr;
-static const UINT8 *opcode_ptr_base;
+static const uint8_t *opcode_ptr;
+static const uint8_t *opcode_ptr_base;
static const I386_OPCODE i386_opcode_table1[256] =
{
@@ -1980,20 +1980,20 @@ static int operand_size;
static int address_prefix;
static int operand_prefix;
static int max_length;
-static UINT64 pc;
-static UINT8 modrm;
-static UINT32 segment;
+static uint64_t pc;
+static uint8_t modrm;
+static uint32_t segment;
static offs_t dasm_flags;
static char modrm_string[256];
-static UINT8 rex, regex, sibex, rmex;
-static UINT8 pre0f;
-static UINT8 curmode;
+static uint8_t rex, regex, sibex, rmex;
+static uint8_t pre0f;
+static uint8_t curmode;
#define MODRM_REG1 ((modrm >> 3) & 0x7)
#define MODRM_REG2 (modrm & 0x7)
#define MODRM_MOD ((modrm >> 6) & 0x3)
-static inline UINT8 FETCH(void)
+static inline uint8_t FETCH(void)
{
if ((opcode_ptr - opcode_ptr_base) + 1 > max_length)
return 0xff;
@@ -2002,9 +2002,9 @@ static inline UINT8 FETCH(void)
}
#if 0
-static inline UINT16 FETCH16(void)
+static inline uint16_t FETCH16(void)
{
- UINT16 d;
+ uint16_t d;
if ((opcode_ptr - opcode_ptr_base) + 2 > max_length)
return 0xffff;
d = opcode_ptr[0] | (opcode_ptr[1] << 8);
@@ -2014,9 +2014,9 @@ static inline UINT16 FETCH16(void)
}
#endif
-static inline UINT32 FETCH32(void)
+static inline uint32_t FETCH32(void)
{
- UINT32 d;
+ uint32_t d;
if ((opcode_ptr - opcode_ptr_base) + 4 > max_length)
return 0xffffffff;
d = opcode_ptr[0] | (opcode_ptr[1] << 8) | (opcode_ptr[2] << 16) | (opcode_ptr[3] << 24);
@@ -2025,7 +2025,7 @@ static inline UINT32 FETCH32(void)
return d;
}
-static inline UINT8 FETCHD(void)
+static inline uint8_t FETCHD(void)
{
if ((opcode_ptr - opcode_ptr_base) + 1 > max_length)
return 0xff;
@@ -2033,9 +2033,9 @@ static inline UINT8 FETCHD(void)
return *opcode_ptr++;
}
-static inline UINT16 FETCHD16(void)
+static inline uint16_t FETCHD16(void)
{
- UINT16 d;
+ uint16_t d;
if ((opcode_ptr - opcode_ptr_base) + 2 > max_length)
return 0xffff;
d = opcode_ptr[0] | (opcode_ptr[1] << 8);
@@ -2044,9 +2044,9 @@ static inline UINT16 FETCHD16(void)
return d;
}
-static inline UINT32 FETCHD32(void)
+static inline uint32_t FETCHD32(void)
{
- UINT32 d;
+ uint32_t d;
if ((opcode_ptr - opcode_ptr_base) + 4 > max_length)
return 0xffffffff;
d = opcode_ptr[0] | (opcode_ptr[1] << 8) | (opcode_ptr[2] << 16) | (opcode_ptr[3] << 24);
@@ -2055,7 +2055,7 @@ static inline UINT32 FETCHD32(void)
return d;
}
-static char *hexstring(UINT32 value, int digits)
+static char *hexstring(uint32_t value, int digits)
{
static char buffer[20];
buffer[0] = '0';
@@ -2066,7 +2066,7 @@ static char *hexstring(UINT32 value, int digits)
return (buffer[1] >= '0' && buffer[1] <= '9') ? &buffer[1] : &buffer[0];
}
-static char *hexstring64(UINT32 lo, UINT32 hi)
+static char *hexstring64(uint32_t lo, uint32_t hi)
{
static char buffer[40];
buffer[0] = '0';
@@ -2077,15 +2077,15 @@ static char *hexstring64(UINT32 lo, UINT32 hi)
return (buffer[1] >= '0' && buffer[1] <= '9') ? &buffer[1] : &buffer[0];
}
-static char *hexstringpc(UINT64 pc)
+static char *hexstringpc(uint64_t pc)
{
if (curmode == 64)
- return hexstring64((UINT32)pc, (UINT32)(pc >> 32));
+ return hexstring64((uint32_t)pc, (uint32_t)(pc >> 32));
else
- return hexstring((UINT32)pc, 0);
+ return hexstring((uint32_t)pc, 0);
}
-static char *shexstring(UINT32 value, int digits, int always)
+static char *shexstring(uint32_t value, int digits, int always)
{
static char buffer[20];
if (value >= 0x80000000)
@@ -2097,11 +2097,11 @@ static char *shexstring(UINT32 value, int digits, int always)
return buffer;
}
-static char* handle_sib_byte( char* s, UINT8 mod )
+static char* handle_sib_byte( char* s, uint8_t mod )
{
- UINT32 i32;
- UINT8 scale, i, base;
- UINT8 sib = FETCHD();
+ uint32_t i32;
+ uint8_t scale, i, base;
+ uint8_t sib = FETCHD();
scale = (sib >> 6) & 0x3;
i = ((sib >> 3) & 0x7) | sibex;
@@ -2123,10 +2123,10 @@ static char* handle_sib_byte( char* s, UINT8 mod )
static void handle_modrm(char* s)
{
- INT8 disp8;
- INT16 disp16;
- INT32 disp32;
- UINT8 mod, rm;
+ int8_t disp8;
+ int16_t disp16;
+ int32_t disp32;
+ uint8_t mod, rm;
modrm = FETCHD();
mod = (modrm >> 6) & 0x3;
@@ -2157,7 +2157,7 @@ static void handle_modrm(char* s)
if( mod == 1 ) {
disp8 = FETCHD();
if (disp8 != 0)
- s += sprintf( s, "%s", shexstring((INT32)disp8, 0, TRUE) );
+ s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, TRUE) );
} else if( mod == 2 ) {
disp32 = FETCHD32();
if (disp32 != 0)
@@ -2177,7 +2177,7 @@ static void handle_modrm(char* s)
if( mod == 1 ) {
disp8 = FETCHD();
if (disp8 != 0)
- s += sprintf( s, "%s", shexstring((INT32)disp8, 0, TRUE) );
+ s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, TRUE) );
} else if( mod == 2 ) {
disp32 = FETCHD32();
if (disp32 != 0)
@@ -2195,7 +2195,7 @@ static void handle_modrm(char* s)
case 6:
if( mod == 0 ) {
disp16 = FETCHD16();
- s += sprintf( s, "%s", hexstring((unsigned) (UINT16) disp16, 0) );
+ s += sprintf( s, "%s", hexstring((unsigned) (uint16_t) disp16, 0) );
} else {
s += sprintf( s, "bp" );
}
@@ -2205,26 +2205,26 @@ static void handle_modrm(char* s)
if( mod == 1 ) {
disp8 = FETCHD();
if (disp8 != 0)
- s += sprintf( s, "%s", shexstring((INT32)disp8, 0, TRUE) );
+ s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, TRUE) );
} else if( mod == 2 ) {
disp16 = FETCHD16();
if (disp16 != 0)
- s += sprintf( s, "%s", shexstring((INT32)disp16, 0, TRUE) );
+ s += sprintf( s, "%s", shexstring((int32_t)disp16, 0, TRUE) );
}
}
s += sprintf( s, "]" );
}
-static char* handle_param(char* s, UINT32 param)
+static char* handle_param(char* s, uint32_t param)
{
- UINT8 i8;
- UINT16 i16;
- UINT32 i32;
- UINT16 ptr;
- UINT32 addr;
- INT8 d8;
- INT16 d16;
- INT32 d32;
+ uint8_t i8;
+ uint16_t i16;
+ uint32_t i32;
+ uint16_t ptr;
+ uint32_t addr;
+ int8_t d8;
+ int16_t d16;
+ int32_t d32;
switch(param)
{
@@ -2378,27 +2378,27 @@ static char* handle_param(char* s, UINT32 param)
case PARAM_I8:
i8 = FETCHD();
- s += sprintf( s, "%s", shexstring((INT8)i8, 0, FALSE) );
+ s += sprintf( s, "%s", shexstring((int8_t)i8, 0, FALSE) );
break;
case PARAM_I16:
i16 = FETCHD16();
- s += sprintf( s, "%s", shexstring((INT16)i16, 0, FALSE) );
+ s += sprintf( s, "%s", shexstring((int16_t)i16, 0, FALSE) );
break;
case PARAM_UI8:
i8 = FETCHD();
- s += sprintf( s, "%s", shexstring((UINT8)i8, 0, FALSE) );
+ s += sprintf( s, "%s", shexstring((uint8_t)i8, 0, FALSE) );
break;
case PARAM_UI16:
i16 = FETCHD16();
- s += sprintf( s, "%s", shexstring((UINT16)i16, 0, FALSE) );
+ s += sprintf( s, "%s", shexstring((uint16_t)i16, 0, FALSE) );
break;
case PARAM_IMM64:
if (operand_size == 2) {
- UINT32 lo32 = FETCHD32();
+ uint32_t lo32 = FETCHD32();
i32 = FETCHD32();
s += sprintf( s, "%s", hexstring64(lo32, i32) );
} else if( operand_size ) {
@@ -2531,7 +2531,7 @@ static char* handle_param(char* s, UINT32 param)
return s;
}
-static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
+static void handle_fpu(char *s, uint8_t op1, uint8_t op2)
{
switch (op1 & 0x7)
{
@@ -2908,10 +2908,10 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
}
}
-static void decode_opcode(char *s, const I386_OPCODE *op, UINT8 op1)
+static void decode_opcode(char *s, const I386_OPCODE *op, uint8_t op1)
{
int i;
- UINT8 op2;
+ uint8_t op2;
if ((op->flags & SPECIAL64) && (address_size == 2))
op = &x64_opcode_alt[op->flags >> 24];
@@ -3057,9 +3057,9 @@ handle_unknown:
sprintf(s, "???");
}
-int i386_dasm_one_ex(char *buffer, UINT64 eip, const UINT8 *oprom, int mode)
+int i386_dasm_one_ex(char *buffer, uint64_t eip, const uint8_t *oprom, int mode)
{
- UINT8 op;
+ uint8_t op;
opcode_ptr = opcode_ptr_base = oprom;
switch(mode)
@@ -3105,7 +3105,7 @@ int i386_dasm_one_ex(char *buffer, UINT64 eip, const UINT8 *oprom, int mode)
return (pc-eip) | dasm_flags | DASMFLAG_SUPPORTED;
}
-int i386_dasm_one(char *buffer, offs_t eip, const UINT8 *oprom, int mode)
+int i386_dasm_one(char *buffer, offs_t eip, const uint8_t *oprom, int mode)
{
return i386_dasm_one_ex(buffer, eip, oprom, mode);
}
diff --git a/src/devices/cpu/i386/i386op16.hxx b/src/devices/cpu/i386/i386op16.hxx
index c7ce16553b0..71c4ff8f28e 100644
--- a/src/devices/cpu/i386/i386op16.hxx
+++ b/src/devices/cpu/i386/i386op16.hxx
@@ -1,9 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde, Barry Rodewald, Carl, Philip Bennett
-UINT16 i386_device::i386_shift_rotate16(UINT8 modrm, UINT32 value, UINT8 shift)
+uint16_t i386_device::i386_shift_rotate16(uint8_t modrm, uint32_t value, uint8_t shift)
{
- UINT32 src = value & 0xffff;
- UINT16 dst = value;
+ uint32_t src = value & 0xffff;
+ uint16_t dst = value;
if( shift == 0 ) {
CYCLES_RM(modrm, 3, 7);
@@ -50,7 +50,7 @@ UINT16 i386_device::i386_shift_rotate16(UINT8 modrm, UINT32 value, UINT8 shift)
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 7: /* SAR rm16, 1 */
- dst = (INT16)(src) >> 1;
+ dst = (int16_t)(src) >> 1;
m_CF = src & 0x1;
m_OF = 0;
SetSZPF16(dst);
@@ -71,8 +71,8 @@ UINT16 i386_device::i386_shift_rotate16(UINT8 modrm, UINT32 value, UINT8 shift)
break;
}
shift &= 15;
- dst = ((src & ((UINT16)0xffff >> shift)) << shift) |
- ((src & ((UINT16)0xffff << (16-shift))) >> (16-shift));
+ dst = ((src & ((uint16_t)0xffff >> shift)) << shift) |
+ ((src & ((uint16_t)0xffff << (16-shift))) >> (16-shift));
m_CF = dst & 0x1;
m_OF = (dst & 1) ^ (dst >> 15);
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
@@ -88,16 +88,16 @@ UINT16 i386_device::i386_shift_rotate16(UINT8 modrm, UINT32 value, UINT8 shift)
break;
}
shift &= 15;
- dst = ((src & ((UINT16)0xffff << shift)) >> shift) |
- ((src & ((UINT16)0xffff >> (16-shift))) << (16-shift));
+ dst = ((src & ((uint16_t)0xffff << shift)) >> shift) |
+ ((src & ((uint16_t)0xffff >> (16-shift))) << (16-shift));
m_CF = (dst >> 15) & 1;
m_OF = ((dst >> 15) ^ (dst >> 14)) & 1;
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 2: /* RCL rm16, i8 */
shift %= 17;
- dst = ((src & ((UINT16)0xffff >> shift)) << shift) |
- ((src & ((UINT16)0xffff << (17-shift))) >> (17-shift)) |
+ dst = ((src & ((uint16_t)0xffff >> shift)) << shift) |
+ ((src & ((uint16_t)0xffff << (17-shift))) >> (17-shift)) |
(m_CF << (shift-1));
if(shift) m_CF = (src >> (16-shift)) & 0x1;
m_OF = m_CF ^ ((dst >> 15) & 1);
@@ -105,8 +105,8 @@ UINT16 i386_device::i386_shift_rotate16(UINT8 modrm, UINT32 value, UINT8 shift)
break;
case 3: /* RCR rm16, i8 */
shift %= 17;
- dst = ((src & ((UINT16)0xffff << shift)) >> shift) |
- ((src & ((UINT16)0xffff >> (16-shift))) << (17-shift)) |
+ dst = ((src & ((uint16_t)0xffff << shift)) >> shift) |
+ ((src & ((uint16_t)0xffff >> (16-shift))) << (17-shift)) |
(m_CF << (16-shift));
if(shift) m_CF = (src >> (shift-1)) & 0x1;
m_OF = ((dst >> 15) ^ (dst >> 14)) & 1;
@@ -129,7 +129,7 @@ UINT16 i386_device::i386_shift_rotate16(UINT8 modrm, UINT32 value, UINT8 shift)
break;
case 7: /* SAR rm16, i8 */
shift &= 31;
- dst = (INT16)src >> shift;
+ dst = (int16_t)src >> shift;
m_CF = (src & (1 << (shift-1))) ? 1 : 0;
SetSZPF16(dst);
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
@@ -144,8 +144,8 @@ UINT16 i386_device::i386_shift_rotate16(UINT8 modrm, UINT32 value, UINT8 shift)
void i386_device::i386_adc_rm16_r16() // Opcode 0x11
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
@@ -153,7 +153,7 @@ void i386_device::i386_adc_rm16_r16() // Opcode 0x11
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
dst = READ16(ea);
dst = ADC16(dst, src, m_CF);
@@ -164,8 +164,8 @@ void i386_device::i386_adc_rm16_r16() // Opcode 0x11
void i386_device::i386_adc_r16_rm16() // Opcode 0x13
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
dst = LOAD_REG16(modrm);
@@ -173,7 +173,7 @@ void i386_device::i386_adc_r16_rm16() // Opcode 0x13
STORE_REG16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
dst = LOAD_REG16(modrm);
dst = ADC16(dst, src, m_CF);
@@ -184,7 +184,7 @@ void i386_device::i386_adc_r16_rm16() // Opcode 0x13
void i386_device::i386_adc_ax_i16() // Opcode 0x15
{
- UINT16 src, dst;
+ uint16_t src, dst;
src = FETCH16();
dst = REG16(AX);
dst = ADC16(dst, src, m_CF);
@@ -194,8 +194,8 @@ void i386_device::i386_adc_ax_i16() // Opcode 0x15
void i386_device::i386_add_rm16_r16() // Opcode 0x01
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
@@ -203,7 +203,7 @@ void i386_device::i386_add_rm16_r16() // Opcode 0x01
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
dst = READ16(ea);
dst = ADD16(dst, src);
@@ -214,8 +214,8 @@ void i386_device::i386_add_rm16_r16() // Opcode 0x01
void i386_device::i386_add_r16_rm16() // Opcode 0x03
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
dst = LOAD_REG16(modrm);
@@ -223,7 +223,7 @@ void i386_device::i386_add_r16_rm16() // Opcode 0x03
STORE_REG16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
dst = LOAD_REG16(modrm);
dst = ADD16(dst, src);
@@ -234,7 +234,7 @@ void i386_device::i386_add_r16_rm16() // Opcode 0x03
void i386_device::i386_add_ax_i16() // Opcode 0x05
{
- UINT16 src, dst;
+ uint16_t src, dst;
src = FETCH16();
dst = REG16(AX);
dst = ADD16(dst, src);
@@ -244,8 +244,8 @@ void i386_device::i386_add_ax_i16() // Opcode 0x05
void i386_device::i386_and_rm16_r16() // Opcode 0x21
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
@@ -253,7 +253,7 @@ void i386_device::i386_and_rm16_r16() // Opcode 0x21
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
dst = READ16(ea);
dst = AND16(dst, src);
@@ -264,8 +264,8 @@ void i386_device::i386_and_rm16_r16() // Opcode 0x21
void i386_device::i386_and_r16_rm16() // Opcode 0x23
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
dst = LOAD_REG16(modrm);
@@ -273,7 +273,7 @@ void i386_device::i386_and_r16_rm16() // Opcode 0x23
STORE_REG16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
dst = LOAD_REG16(modrm);
dst = AND16(dst, src);
@@ -284,7 +284,7 @@ void i386_device::i386_and_r16_rm16() // Opcode 0x23
void i386_device::i386_and_ax_i16() // Opcode 0x25
{
- UINT16 src, dst;
+ uint16_t src, dst;
src = FETCH16();
dst = REG16(AX);
dst = AND16(dst, src);
@@ -294,13 +294,13 @@ void i386_device::i386_and_ax_i16() // Opcode 0x25
void i386_device::i386_bsf_r16_rm16() // Opcode 0x0f bc
{
- UINT16 src, dst, temp;
- UINT8 modrm = FETCH();
+ uint16_t src, dst, temp;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
}
@@ -323,13 +323,13 @@ void i386_device::i386_bsf_r16_rm16() // Opcode 0x0f bc
void i386_device::i386_bsr_r16_rm16() // Opcode 0x0f bd
{
- UINT16 src, dst, temp;
- UINT8 modrm = FETCH();
+ uint16_t src, dst, temp;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
}
@@ -353,10 +353,10 @@ void i386_device::i386_bsr_r16_rm16() // Opcode 0x0f bd
void i386_device::i386_bt_rm16_r16() // Opcode 0x0f a3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 bit = LOAD_REG16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t bit = LOAD_REG16(modrm);
if( dst & (1 << (bit & 0xf)) )
m_CF = 1;
@@ -365,13 +365,13 @@ void i386_device::i386_bt_rm16_r16() // Opcode 0x0f a3
CYCLES(CYCLES_BT_REG_REG);
} else {
- UINT8 segment;
- UINT32 ea = GetNonTranslatedEA(modrm,&segment);
- UINT16 bit = LOAD_REG16(modrm);
+ uint8_t segment;
+ uint32_t ea = GetNonTranslatedEA(modrm,&segment);
+ uint16_t bit = LOAD_REG16(modrm);
ea += 2*(bit/16);
ea = i386_translate(segment,(m_address_size)?ea:(ea&0xffff),0);
bit %= 16;
- UINT16 dst = READ16(ea);
+ uint16_t dst = READ16(ea);
if( dst & (1 << bit) )
m_CF = 1;
@@ -384,10 +384,10 @@ void i386_device::i386_bt_rm16_r16() // Opcode 0x0f a3
void i386_device::i386_btc_rm16_r16() // Opcode 0x0f bb
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 bit = LOAD_REG16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t bit = LOAD_REG16(modrm);
if( dst & (1 << (bit & 0xf)) )
m_CF = 1;
@@ -398,13 +398,13 @@ void i386_device::i386_btc_rm16_r16() // Opcode 0x0f bb
STORE_RM16(modrm, dst);
CYCLES(CYCLES_BTC_REG_REG);
} else {
- UINT8 segment;
- UINT32 ea = GetNonTranslatedEA(modrm,&segment);
- UINT16 bit = LOAD_REG16(modrm);
+ uint8_t segment;
+ uint32_t ea = GetNonTranslatedEA(modrm,&segment);
+ uint16_t bit = LOAD_REG16(modrm);
ea += 2*(bit/16);
ea = i386_translate(segment,(m_address_size)?ea:(ea&0xffff),1);
bit %= 16;
- UINT16 dst = READ16(ea);
+ uint16_t dst = READ16(ea);
if( dst & (1 << bit) )
m_CF = 1;
@@ -419,10 +419,10 @@ void i386_device::i386_btc_rm16_r16() // Opcode 0x0f bb
void i386_device::i386_btr_rm16_r16() // Opcode 0x0f b3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 bit = LOAD_REG16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t bit = LOAD_REG16(modrm);
if( dst & (1 << (bit & 0xf)) )
m_CF = 1;
@@ -433,13 +433,13 @@ void i386_device::i386_btr_rm16_r16() // Opcode 0x0f b3
STORE_RM16(modrm, dst);
CYCLES(CYCLES_BTR_REG_REG);
} else {
- UINT8 segment;
- UINT32 ea = GetNonTranslatedEA(modrm,&segment);
- UINT16 bit = LOAD_REG16(modrm);
+ uint8_t segment;
+ uint32_t ea = GetNonTranslatedEA(modrm,&segment);
+ uint16_t bit = LOAD_REG16(modrm);
ea += 2*(bit/16);
ea = i386_translate(segment,(m_address_size)?ea:(ea&0xffff),1);
bit %= 16;
- UINT16 dst = READ16(ea);
+ uint16_t dst = READ16(ea);
if( dst & (1 << bit) )
m_CF = 1;
@@ -454,10 +454,10 @@ void i386_device::i386_btr_rm16_r16() // Opcode 0x0f b3
void i386_device::i386_bts_rm16_r16() // Opcode 0x0f ab
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 bit = LOAD_REG16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t bit = LOAD_REG16(modrm);
if( dst & (1 << (bit & 0xf)) )
m_CF = 1;
@@ -468,13 +468,13 @@ void i386_device::i386_bts_rm16_r16() // Opcode 0x0f ab
STORE_RM16(modrm, dst);
CYCLES(CYCLES_BTS_REG_REG);
} else {
- UINT8 segment;
- UINT32 ea = GetNonTranslatedEA(modrm,&segment);
- UINT16 bit = LOAD_REG16(modrm);
+ uint8_t segment;
+ uint32_t ea = GetNonTranslatedEA(modrm,&segment);
+ uint16_t bit = LOAD_REG16(modrm);
ea += 2*(bit/16);
ea = i386_translate(segment,(m_address_size)?ea:(ea&0xffff),1);
bit %= 16;
- UINT16 dst = READ16(ea);
+ uint16_t dst = READ16(ea);
if( dst & (1 << bit) )
m_CF = 1;
@@ -489,8 +489,8 @@ void i386_device::i386_bts_rm16_r16() // Opcode 0x0f ab
void i386_device::i386_call_abs16() // Opcode 0x9a
{
- UINT16 offset = FETCH16();
- UINT16 ptr = FETCH16();
+ uint16_t offset = FETCH16();
+ uint16_t ptr = FETCH16();
if( PROTECTED_MODE && !V8086_MODE)
{
@@ -511,7 +511,7 @@ void i386_device::i386_call_abs16() // Opcode 0x9a
void i386_device::i386_call_rel16() // Opcode 0xe8
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
PUSH16(m_eip );
if (m_sreg[CS].d)
@@ -528,21 +528,21 @@ void i386_device::i386_call_rel16() // Opcode 0xe8
void i386_device::i386_cbw() // Opcode 0x98
{
- REG16(AX) = (INT16)((INT8)REG8(AL));
+ REG16(AX) = (int16_t)((int8_t)REG8(AL));
CYCLES(CYCLES_CBW);
}
void i386_device::i386_cmp_rm16_r16() // Opcode 0x39
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
SUB16(dst, src);
CYCLES(CYCLES_CMP_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = LOAD_REG16(modrm);
dst = READ16(ea);
SUB16(dst, src);
@@ -552,15 +552,15 @@ void i386_device::i386_cmp_rm16_r16() // Opcode 0x39
void i386_device::i386_cmp_r16_rm16() // Opcode 0x3b
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
dst = LOAD_REG16(modrm);
SUB16(dst, src);
CYCLES(CYCLES_CMP_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
dst = LOAD_REG16(modrm);
SUB16(dst, src);
@@ -570,7 +570,7 @@ void i386_device::i386_cmp_r16_rm16() // Opcode 0x3b
void i386_device::i386_cmp_ax_i16() // Opcode 0x3d
{
- UINT16 src, dst;
+ uint16_t src, dst;
src = FETCH16();
dst = REG16(AX);
SUB16(dst, src);
@@ -579,8 +579,8 @@ void i386_device::i386_cmp_ax_i16() // Opcode 0x3d
void i386_device::i386_cmpsw() // Opcode 0xa7
{
- UINT32 eas, ead;
- UINT16 src, dst;
+ uint32_t eas, ead;
+ uint16_t src, dst;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -655,82 +655,82 @@ void i386_device::i386_dec_di() // Opcode 0x4f
void i386_device::i386_imul_r16_rm16() // Opcode 0x0f af
{
- UINT8 modrm = FETCH();
- INT32 result;
- INT32 src, dst;
+ uint8_t modrm = FETCH();
+ int32_t result;
+ int32_t src, dst;
if( modrm >= 0xc0 ) {
- src = (INT32)(INT16)LOAD_RM16(modrm);
+ src = (int32_t)(int16_t)LOAD_RM16(modrm);
CYCLES(CYCLES_IMUL16_REG_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- src = (INT32)(INT16)READ16(ea);
+ uint32_t ea = GetEA(modrm,0);
+ src = (int32_t)(int16_t)READ16(ea);
CYCLES(CYCLES_IMUL16_REG_MEM); /* TODO: Correct multiply timing */
}
- dst = (INT32)(INT16)LOAD_REG16(modrm);
+ dst = (int32_t)(int16_t)LOAD_REG16(modrm);
result = src * dst;
- STORE_REG16(modrm, (UINT16)result);
+ STORE_REG16(modrm, (uint16_t)result);
- m_CF = m_OF = !(result == (INT32)(INT16)result);
+ m_CF = m_OF = !(result == (int32_t)(int16_t)result);
}
void i386_device::i386_imul_r16_rm16_i16() // Opcode 0x69
{
- UINT8 modrm = FETCH();
- INT32 result;
- INT32 src, dst;
+ uint8_t modrm = FETCH();
+ int32_t result;
+ int32_t src, dst;
if( modrm >= 0xc0 ) {
- dst = (INT32)(INT16)LOAD_RM16(modrm);
+ dst = (int32_t)(int16_t)LOAD_RM16(modrm);
CYCLES(CYCLES_IMUL16_REG_IMM_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- dst = (INT32)(INT16)READ16(ea);
+ uint32_t ea = GetEA(modrm,0);
+ dst = (int32_t)(int16_t)READ16(ea);
CYCLES(CYCLES_IMUL16_MEM_IMM_REG); /* TODO: Correct multiply timing */
}
- src = (INT32)(INT16)FETCH16();
+ src = (int32_t)(int16_t)FETCH16();
result = src * dst;
- STORE_REG16(modrm, (UINT16)result);
+ STORE_REG16(modrm, (uint16_t)result);
- m_CF = m_OF = !(result == (INT32)(INT16)result);
+ m_CF = m_OF = !(result == (int32_t)(int16_t)result);
}
void i386_device::i386_imul_r16_rm16_i8() // Opcode 0x6b
{
- UINT8 modrm = FETCH();
- INT32 result;
- INT32 src, dst;
+ uint8_t modrm = FETCH();
+ int32_t result;
+ int32_t src, dst;
if( modrm >= 0xc0 ) {
- dst = (INT32)(INT16)LOAD_RM16(modrm);
+ dst = (int32_t)(int16_t)LOAD_RM16(modrm);
CYCLES(CYCLES_IMUL16_REG_IMM_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- dst = (INT32)(INT16)READ16(ea);
+ uint32_t ea = GetEA(modrm,0);
+ dst = (int32_t)(int16_t)READ16(ea);
CYCLES(CYCLES_IMUL16_MEM_IMM_REG); /* TODO: Correct multiply timing */
}
- src = (INT32)(INT8)FETCH();
+ src = (int32_t)(int8_t)FETCH();
result = src * dst;
- STORE_REG16(modrm, (UINT16)result);
+ STORE_REG16(modrm, (uint16_t)result);
- m_CF = m_OF = !(result == (INT32)(INT16)result);
+ m_CF = m_OF = !(result == (int32_t)(int16_t)result);
}
void i386_device::i386_in_ax_i8() // Opcode 0xe5
{
- UINT16 port = FETCH();
- UINT16 data = READPORT16(port);
+ uint16_t port = FETCH();
+ uint16_t data = READPORT16(port);
REG16(AX) = data;
CYCLES(CYCLES_IN_VAR);
}
void i386_device::i386_in_ax_dx() // Opcode 0xed
{
- UINT16 port = REG16(DX);
- UINT16 data = READPORT16(port);
+ uint16_t port = REG16(DX);
+ uint16_t data = READPORT16(port);
REG16(AX) = data;
CYCLES(CYCLES_IN);
}
@@ -804,7 +804,7 @@ void i386_device::i386_iret16() // Opcode 0xcf
void i386_device::i386_ja_rel16() // Opcode 0x0f 87
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_CF == 0 && m_ZF == 0 ) {
if (m_sreg[CS].d)
{
@@ -823,7 +823,7 @@ void i386_device::i386_ja_rel16() // Opcode 0x0f 87
void i386_device::i386_jbe_rel16() // Opcode 0x0f 86
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_CF != 0 || m_ZF != 0 ) {
if (m_sreg[CS].d)
{
@@ -842,7 +842,7 @@ void i386_device::i386_jbe_rel16() // Opcode 0x0f 86
void i386_device::i386_jc_rel16() // Opcode 0x0f 82
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_CF != 0 ) {
if (m_sreg[CS].d)
{
@@ -861,7 +861,7 @@ void i386_device::i386_jc_rel16() // Opcode 0x0f 82
void i386_device::i386_jg_rel16() // Opcode 0x0f 8f
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_ZF == 0 && (m_SF == m_OF) ) {
if (m_sreg[CS].d)
{
@@ -880,7 +880,7 @@ void i386_device::i386_jg_rel16() // Opcode 0x0f 8f
void i386_device::i386_jge_rel16() // Opcode 0x0f 8d
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if(m_SF == m_OF) {
if (m_sreg[CS].d)
{
@@ -899,7 +899,7 @@ void i386_device::i386_jge_rel16() // Opcode 0x0f 8d
void i386_device::i386_jl_rel16() // Opcode 0x0f 8c
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( (m_SF != m_OF) ) {
if (m_sreg[CS].d)
{
@@ -918,7 +918,7 @@ void i386_device::i386_jl_rel16() // Opcode 0x0f 8c
void i386_device::i386_jle_rel16() // Opcode 0x0f 8e
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_ZF != 0 || (m_SF != m_OF) ) {
if (m_sreg[CS].d)
{
@@ -937,7 +937,7 @@ void i386_device::i386_jle_rel16() // Opcode 0x0f 8e
void i386_device::i386_jnc_rel16() // Opcode 0x0f 83
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_CF == 0 ) {
if (m_sreg[CS].d)
{
@@ -956,7 +956,7 @@ void i386_device::i386_jnc_rel16() // Opcode 0x0f 83
void i386_device::i386_jno_rel16() // Opcode 0x0f 81
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_OF == 0 ) {
if (m_sreg[CS].d)
{
@@ -975,7 +975,7 @@ void i386_device::i386_jno_rel16() // Opcode 0x0f 81
void i386_device::i386_jnp_rel16() // Opcode 0x0f 8b
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_PF == 0 ) {
if (m_sreg[CS].d)
{
@@ -994,7 +994,7 @@ void i386_device::i386_jnp_rel16() // Opcode 0x0f 8b
void i386_device::i386_jns_rel16() // Opcode 0x0f 89
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_SF == 0 ) {
if (m_sreg[CS].d)
{
@@ -1013,7 +1013,7 @@ void i386_device::i386_jns_rel16() // Opcode 0x0f 89
void i386_device::i386_jnz_rel16() // Opcode 0x0f 85
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_ZF == 0 ) {
if (m_sreg[CS].d)
{
@@ -1032,7 +1032,7 @@ void i386_device::i386_jnz_rel16() // Opcode 0x0f 85
void i386_device::i386_jo_rel16() // Opcode 0x0f 80
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_OF != 0 ) {
if (m_sreg[CS].d)
{
@@ -1051,7 +1051,7 @@ void i386_device::i386_jo_rel16() // Opcode 0x0f 80
void i386_device::i386_jp_rel16() // Opcode 0x0f 8a
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_PF != 0 ) {
if (m_sreg[CS].d)
{
@@ -1070,7 +1070,7 @@ void i386_device::i386_jp_rel16() // Opcode 0x0f 8a
void i386_device::i386_js_rel16() // Opcode 0x0f 88
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_SF != 0 ) {
if (m_sreg[CS].d)
{
@@ -1089,7 +1089,7 @@ void i386_device::i386_js_rel16() // Opcode 0x0f 88
void i386_device::i386_jz_rel16() // Opcode 0x0f 84
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if( m_ZF != 0 ) {
if (m_sreg[CS].d)
{
@@ -1108,7 +1108,7 @@ void i386_device::i386_jz_rel16() // Opcode 0x0f 84
void i386_device::i386_jcxz16() // Opcode 0xe3
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
int val = (m_address_size)?(REG32(ECX) == 0):(REG16(CX) == 0);
if( val ) {
if (m_sreg[CS].d)
@@ -1128,7 +1128,7 @@ void i386_device::i386_jcxz16() // Opcode 0xe3
void i386_device::i386_jmp_rel16() // Opcode 0xe9
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
if (m_sreg[CS].d)
{
@@ -1144,8 +1144,8 @@ void i386_device::i386_jmp_rel16() // Opcode 0xe9
void i386_device::i386_jmp_abs16() // Opcode 0xea
{
- UINT16 address = FETCH16();
- UINT16 segment = FETCH16();
+ uint16_t address = FETCH16();
+ uint16_t segment = FETCH16();
if( PROTECTED_MODE && !V8086_MODE)
{
@@ -1164,18 +1164,18 @@ void i386_device::i386_jmp_abs16() // Opcode 0xea
void i386_device::i386_lea16() // Opcode 0x8d
{
- UINT8 modrm = FETCH();
- UINT32 ea = GetNonTranslatedEA(modrm,nullptr);
+ uint8_t modrm = FETCH();
+ uint32_t ea = GetNonTranslatedEA(modrm,nullptr);
STORE_REG16(modrm, ea);
CYCLES(CYCLES_LEA);
}
void i386_device::i386_enter16() // Opcode 0xc8
{
- UINT16 framesize = FETCH16();
- UINT8 level = FETCH() % 32;
- UINT8 x;
- UINT16 frameptr;
+ uint16_t framesize = FETCH16();
+ uint8_t level = FETCH() % 32;
+ uint8_t x;
+ uint16_t frameptr;
PUSH16(REG16(BP));
if(!STACK_32BIT)
@@ -1212,7 +1212,7 @@ void i386_device::i386_leave16() // Opcode 0xc9
void i386_device::i386_lodsw() // Opcode 0xad
{
- UINT32 eas;
+ uint32_t eas;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -1225,8 +1225,8 @@ void i386_device::i386_lodsw() // Opcode 0xad
void i386_device::i386_loop16() // Opcode 0xe2
{
- INT8 disp = FETCH();
- INT32 val = (m_address_size)?(--REG32(ECX)):(--REG16(CX));
+ int8_t disp = FETCH();
+ int32_t val = (m_address_size)?(--REG32(ECX)):(--REG16(CX));
if( val != 0 ) {
if (m_sreg[CS].d)
{
@@ -1243,8 +1243,8 @@ void i386_device::i386_loop16() // Opcode 0xe2
void i386_device::i386_loopne16() // Opcode 0xe0
{
- INT8 disp = FETCH();
- INT32 val = (m_address_size)?(--REG32(ECX)):(--REG16(CX));
+ int8_t disp = FETCH();
+ int32_t val = (m_address_size)?(--REG32(ECX)):(--REG16(CX));
if( val != 0 && m_ZF == 0 ) {
if (m_sreg[CS].d)
{
@@ -1261,8 +1261,8 @@ void i386_device::i386_loopne16() // Opcode 0xe0
void i386_device::i386_loopz16() // Opcode 0xe1
{
- INT8 disp = FETCH();
- INT32 val = (m_address_size)?(--REG32(ECX)):(--REG16(CX));
+ int8_t disp = FETCH();
+ int32_t val = (m_address_size)?(--REG32(ECX)):(--REG16(CX));
if( val != 0 && m_ZF != 0 ) {
if (m_sreg[CS].d)
{
@@ -1279,14 +1279,14 @@ void i386_device::i386_loopz16() // Opcode 0xe1
void i386_device::i386_mov_rm16_r16() // Opcode 0x89
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
STORE_RM16(modrm, src);
CYCLES(CYCLES_MOV_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
WRITE16(ea, src);
CYCLES(CYCLES_MOV_REG_MEM);
@@ -1295,14 +1295,14 @@ void i386_device::i386_mov_rm16_r16() // Opcode 0x89
void i386_device::i386_mov_r16_rm16() // Opcode 0x8b
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
STORE_REG16(modrm, src);
CYCLES(CYCLES_MOV_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
STORE_REG16(modrm, src);
CYCLES(CYCLES_MOV_MEM_REG);
@@ -1311,14 +1311,14 @@ void i386_device::i386_mov_r16_rm16() // Opcode 0x8b
void i386_device::i386_mov_rm16_i16() // Opcode 0xc7
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 value = FETCH16();
+ uint16_t value = FETCH16();
STORE_RM16(modrm, value);
CYCLES(CYCLES_MOV_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 value = FETCH16();
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t value = FETCH16();
WRITE16(ea, value);
CYCLES(CYCLES_MOV_IMM_MEM);
}
@@ -1326,7 +1326,7 @@ void i386_device::i386_mov_rm16_i16() // Opcode 0xc7
void i386_device::i386_mov_ax_m16() // Opcode 0xa1
{
- UINT32 offset, ea;
+ uint32_t offset, ea;
if( m_address_size ) {
offset = FETCH32();
} else {
@@ -1344,7 +1344,7 @@ void i386_device::i386_mov_ax_m16() // Opcode 0xa1
void i386_device::i386_mov_m16_ax() // Opcode 0xa3
{
- UINT32 offset, ea;
+ uint32_t offset, ea;
if( m_address_size ) {
offset = FETCH32();
} else {
@@ -1410,8 +1410,8 @@ void i386_device::i386_mov_di_i16() // Opcode 0xbf
void i386_device::i386_movsw() // Opcode 0xa5
{
- UINT32 eas, ead;
- UINT16 v;
+ uint32_t eas, ead;
+ uint16_t v;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -1427,14 +1427,14 @@ void i386_device::i386_movsw() // Opcode 0xa5
void i386_device::i386_movsx_r16_rm8() // Opcode 0x0f be
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- INT16 src = (INT8)LOAD_RM8(modrm);
+ int16_t src = (int8_t)LOAD_RM8(modrm);
STORE_REG16(modrm, src);
CYCLES(CYCLES_MOVSX_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- INT16 src = (INT8)READ8(ea);
+ uint32_t ea = GetEA(modrm,0);
+ int16_t src = (int8_t)READ8(ea);
STORE_REG16(modrm, src);
CYCLES(CYCLES_MOVSX_MEM_REG);
}
@@ -1442,14 +1442,14 @@ void i386_device::i386_movsx_r16_rm8() // Opcode 0x0f be
void i386_device::i386_movzx_r16_rm8() // Opcode 0x0f b6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 src = (UINT8)LOAD_RM8(modrm);
+ uint16_t src = (uint8_t)LOAD_RM8(modrm);
STORE_REG16(modrm, src);
CYCLES(CYCLES_MOVZX_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT16 src = (UINT8)READ8(ea);
+ uint32_t ea = GetEA(modrm,0);
+ uint16_t src = (uint8_t)READ8(ea);
STORE_REG16(modrm, src);
CYCLES(CYCLES_MOVZX_MEM_REG);
}
@@ -1457,8 +1457,8 @@ void i386_device::i386_movzx_r16_rm8() // Opcode 0x0f b6
void i386_device::i386_or_rm16_r16() // Opcode 0x09
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
@@ -1466,7 +1466,7 @@ void i386_device::i386_or_rm16_r16() // Opcode 0x09
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
dst = READ16(ea);
dst = OR16(dst, src);
@@ -1477,8 +1477,8 @@ void i386_device::i386_or_rm16_r16() // Opcode 0x09
void i386_device::i386_or_r16_rm16() // Opcode 0x0b
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
dst = LOAD_REG16(modrm);
@@ -1486,7 +1486,7 @@ void i386_device::i386_or_r16_rm16() // Opcode 0x0b
STORE_REG16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
dst = LOAD_REG16(modrm);
dst = OR16(dst, src);
@@ -1497,7 +1497,7 @@ void i386_device::i386_or_r16_rm16() // Opcode 0x0b
void i386_device::i386_or_ax_i16() // Opcode 0x0d
{
- UINT16 src, dst;
+ uint16_t src, dst;
src = FETCH16();
dst = REG16(AX);
dst = OR16(dst, src);
@@ -1507,23 +1507,23 @@ void i386_device::i386_or_ax_i16() // Opcode 0x0d
void i386_device::i386_out_ax_i8() // Opcode 0xe7
{
- UINT16 port = FETCH();
- UINT16 data = REG16(AX);
+ uint16_t port = FETCH();
+ uint16_t data = REG16(AX);
WRITEPORT16(port, data);
CYCLES(CYCLES_OUT_VAR);
}
void i386_device::i386_out_ax_dx() // Opcode 0xef
{
- UINT16 port = REG16(DX);
- UINT16 data = REG16(AX);
+ uint16_t port = REG16(DX);
+ uint16_t data = REG16(AX);
WRITEPORT16(port, data);
CYCLES(CYCLES_OUT);
}
void i386_device::i386_pop_ax() // Opcode 0x58
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
REG16(AX) = POP16();
else
@@ -1533,7 +1533,7 @@ void i386_device::i386_pop_ax() // Opcode 0x58
void i386_device::i386_pop_cx() // Opcode 0x59
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
REG16(CX) = POP16();
else
@@ -1543,7 +1543,7 @@ void i386_device::i386_pop_cx() // Opcode 0x59
void i386_device::i386_pop_dx() // Opcode 0x5a
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
REG16(DX) = POP16();
else
@@ -1553,7 +1553,7 @@ void i386_device::i386_pop_dx() // Opcode 0x5a
void i386_device::i386_pop_bx() // Opcode 0x5b
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
REG16(BX) = POP16();
else
@@ -1563,7 +1563,7 @@ void i386_device::i386_pop_bx() // Opcode 0x5b
void i386_device::i386_pop_sp() // Opcode 0x5c
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
REG16(SP) = POP16();
else
@@ -1573,7 +1573,7 @@ void i386_device::i386_pop_sp() // Opcode 0x5c
void i386_device::i386_pop_bp() // Opcode 0x5d
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
REG16(BP) = POP16();
else
@@ -1583,7 +1583,7 @@ void i386_device::i386_pop_bp() // Opcode 0x5d
void i386_device::i386_pop_si() // Opcode 0x5e
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
REG16(SI) = POP16();
else
@@ -1593,7 +1593,7 @@ void i386_device::i386_pop_si() // Opcode 0x5e
void i386_device::i386_pop_di() // Opcode 0x5f
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
REG16(DI) = POP16();
else
@@ -1603,8 +1603,8 @@ void i386_device::i386_pop_di() // Opcode 0x5f
bool i386_device::i386_pop_seg16(int segment)
{
- UINT32 ea, offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
- UINT16 value;
+ uint32_t ea, offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint16_t value;
bool fault;
if(i386_limit_check(SS,offset+1) == 0)
{
@@ -1659,13 +1659,13 @@ void i386_device::i386_pop_ss16() // Opcode 0x17
void i386_device::i386_pop_rm16() // Opcode 0x8f
{
- UINT8 modrm = FETCH();
- UINT16 value;
- UINT32 ea, offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint8_t modrm = FETCH();
+ uint16_t value;
+ uint32_t ea, offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+1) == 0)
{
- UINT32 temp_sp = REG32(ESP);
+ uint32_t temp_sp = REG32(ESP);
value = POP16();
if( modrm >= 0xc0 ) {
@@ -1676,7 +1676,7 @@ void i386_device::i386_pop_rm16() // Opcode 0x8f
{
WRITE16(ea, value);
}
- catch(UINT64 e)
+ catch(uint64_t e)
{
REG32(ESP) = temp_sp;
throw e;
@@ -1690,7 +1690,7 @@ void i386_device::i386_pop_rm16() // Opcode 0x8f
void i386_device::i386_popa() // Opcode 0x61
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+15) == 0)
{
@@ -1710,11 +1710,11 @@ void i386_device::i386_popa() // Opcode 0x61
void i386_device::i386_popf() // Opcode 0x9d
{
- UINT32 value;
- UINT32 current = get_flags();
- UINT8 IOPL = (current >> 12) & 0x03;
- UINT32 mask = 0x7fd5;
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t value;
+ uint32_t current = get_flags();
+ uint8_t IOPL = (current >> 12) & 0x03;
+ uint32_t mask = 0x7fd5;
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
// IOPL can only change if CPL is 0
if(m_CPL != 0)
@@ -1746,7 +1746,7 @@ void i386_device::i386_popf() // Opcode 0x9d
void i386_device::i386_push_ax() // Opcode 0x50
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1760,7 +1760,7 @@ void i386_device::i386_push_ax() // Opcode 0x50
void i386_device::i386_push_cx() // Opcode 0x51
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1774,7 +1774,7 @@ void i386_device::i386_push_cx() // Opcode 0x51
void i386_device::i386_push_dx() // Opcode 0x52
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1788,7 +1788,7 @@ void i386_device::i386_push_dx() // Opcode 0x52
void i386_device::i386_push_bx() // Opcode 0x53
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1802,7 +1802,7 @@ void i386_device::i386_push_bx() // Opcode 0x53
void i386_device::i386_push_sp() // Opcode 0x54
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1816,7 +1816,7 @@ void i386_device::i386_push_sp() // Opcode 0x54
void i386_device::i386_push_bp() // Opcode 0x55
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1830,7 +1830,7 @@ void i386_device::i386_push_bp() // Opcode 0x55
void i386_device::i386_push_si() // Opcode 0x56
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1844,7 +1844,7 @@ void i386_device::i386_push_si() // Opcode 0x56
void i386_device::i386_push_di() // Opcode 0x57
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1858,7 +1858,7 @@ void i386_device::i386_push_di() // Opcode 0x57
void i386_device::i386_push_cs16() // Opcode 0x0e
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1872,7 +1872,7 @@ void i386_device::i386_push_cs16() // Opcode 0x0e
void i386_device::i386_push_ds16() // Opcode 0x1e
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1886,7 +1886,7 @@ void i386_device::i386_push_ds16() // Opcode 0x1e
void i386_device::i386_push_es16() // Opcode 0x06
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1900,7 +1900,7 @@ void i386_device::i386_push_es16() // Opcode 0x06
void i386_device::i386_push_fs16() // Opcode 0x0f a0
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1914,7 +1914,7 @@ void i386_device::i386_push_fs16() // Opcode 0x0f a0
void i386_device::i386_push_gs16() // Opcode 0x0f a8
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1928,7 +1928,7 @@ void i386_device::i386_push_gs16() // Opcode 0x0f a8
void i386_device::i386_push_ss16() // Opcode 0x16
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1942,8 +1942,8 @@ void i386_device::i386_push_ss16() // Opcode 0x16
void i386_device::i386_push_i16() // Opcode 0x68
{
- UINT16 value = FETCH16();
- UINT32 offset;
+ uint16_t value = FETCH16();
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1957,8 +1957,8 @@ void i386_device::i386_push_i16() // Opcode 0x68
void i386_device::i386_pusha() // Opcode 0x60
{
- UINT16 temp = REG16(SP);
- UINT32 offset;
+ uint16_t temp = REG16(SP);
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 16;
else
@@ -1981,7 +1981,7 @@ void i386_device::i386_pusha() // Opcode 0x60
void i386_device::i386_pushf() // Opcode 0x9c
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 2;
else
@@ -1995,7 +1995,7 @@ void i386_device::i386_pushf() // Opcode 0x9c
void i386_device::i386_ret_near16_i16() // Opcode 0xc2
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
m_eip = POP16();
REG16(SP) += disp;
CHANGE_PC(m_eip);
@@ -2011,8 +2011,8 @@ void i386_device::i386_ret_near16() // Opcode 0xc3
void i386_device::i386_sbb_rm16_r16() // Opcode 0x19
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
@@ -2020,7 +2020,7 @@ void i386_device::i386_sbb_rm16_r16() // Opcode 0x19
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
dst = READ16(ea);
dst = SBB16(dst, src, m_CF);
@@ -2031,8 +2031,8 @@ void i386_device::i386_sbb_rm16_r16() // Opcode 0x19
void i386_device::i386_sbb_r16_rm16() // Opcode 0x1b
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
dst = LOAD_REG16(modrm);
@@ -2040,7 +2040,7 @@ void i386_device::i386_sbb_r16_rm16() // Opcode 0x1b
STORE_REG16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
dst = LOAD_REG16(modrm);
dst = SBB16(dst, src, m_CF);
@@ -2051,7 +2051,7 @@ void i386_device::i386_sbb_r16_rm16() // Opcode 0x1b
void i386_device::i386_sbb_ax_i16() // Opcode 0x1d
{
- UINT16 src, dst;
+ uint16_t src, dst;
src = FETCH16();
dst = REG16(AX);
dst = SBB16(dst, src, m_CF);
@@ -2061,8 +2061,8 @@ void i386_device::i386_sbb_ax_i16() // Opcode 0x1d
void i386_device::i386_scasw() // Opcode 0xaf
{
- UINT32 eas;
- UINT16 src, dst;
+ uint32_t eas;
+ uint16_t src, dst;
eas = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 0 );
src = READ16(eas);
dst = REG16(AX);
@@ -2073,11 +2073,11 @@ void i386_device::i386_scasw() // Opcode 0xaf
void i386_device::i386_shld16_i8() // Opcode 0x0f a4
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 upper = LOAD_REG16(modrm);
- UINT8 shift = FETCH();
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t upper = LOAD_REG16(modrm);
+ uint8_t shift = FETCH();
shift &= 31;
if( shift == 0 ) {
} else if( shift > 15 ) {
@@ -2095,10 +2095,10 @@ void i386_device::i386_shld16_i8() // Opcode 0x0f a4
STORE_RM16(modrm, dst);
CYCLES(CYCLES_SHLD_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
- UINT16 upper = LOAD_REG16(modrm);
- UINT8 shift = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
+ uint16_t upper = LOAD_REG16(modrm);
+ uint8_t shift = FETCH();
shift &= 31;
if( shift == 0 ) {
} else if( shift > 15 ) {
@@ -2119,11 +2119,11 @@ void i386_device::i386_shld16_i8() // Opcode 0x0f a4
void i386_device::i386_shld16_cl() // Opcode 0x0f a5
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 upper = LOAD_REG16(modrm);
- UINT8 shift = REG8(CL);
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t upper = LOAD_REG16(modrm);
+ uint8_t shift = REG8(CL);
shift &= 31;
if( shift == 0 ) {
} else if( shift > 15 ) {
@@ -2140,10 +2140,10 @@ void i386_device::i386_shld16_cl() // Opcode 0x0f a5
STORE_RM16(modrm, dst);
CYCLES(CYCLES_SHLD_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
- UINT16 upper = LOAD_REG16(modrm);
- UINT8 shift = REG8(CL);
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
+ uint16_t upper = LOAD_REG16(modrm);
+ uint8_t shift = REG8(CL);
shift &= 31;
if( shift == 0 ) {
} else if( shift > 15 ) {
@@ -2164,11 +2164,11 @@ void i386_device::i386_shld16_cl() // Opcode 0x0f a5
void i386_device::i386_shrd16_i8() // Opcode 0x0f ac
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 upper = LOAD_REG16(modrm);
- UINT8 shift = FETCH();
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t upper = LOAD_REG16(modrm);
+ uint8_t shift = FETCH();
shift &= 31;
if( shift == 0) {
} else if( shift > 15 ) {
@@ -2185,10 +2185,10 @@ void i386_device::i386_shrd16_i8() // Opcode 0x0f ac
STORE_RM16(modrm, dst);
CYCLES(CYCLES_SHRD_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
- UINT16 upper = LOAD_REG16(modrm);
- UINT8 shift = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
+ uint16_t upper = LOAD_REG16(modrm);
+ uint8_t shift = FETCH();
shift &= 31;
if( shift == 0) {
} else if( shift > 15 ) {
@@ -2209,11 +2209,11 @@ void i386_device::i386_shrd16_i8() // Opcode 0x0f ac
void i386_device::i386_shrd16_cl() // Opcode 0x0f ad
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 upper = LOAD_REG16(modrm);
- UINT8 shift = REG8(CL);
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t upper = LOAD_REG16(modrm);
+ uint8_t shift = REG8(CL);
shift &= 31;
if( shift == 0) {
} else if( shift > 15 ) {
@@ -2230,10 +2230,10 @@ void i386_device::i386_shrd16_cl() // Opcode 0x0f ad
STORE_RM16(modrm, dst);
CYCLES(CYCLES_SHRD_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
- UINT16 upper = LOAD_REG16(modrm);
- UINT8 shift = REG8(CL);
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
+ uint16_t upper = LOAD_REG16(modrm);
+ uint8_t shift = REG8(CL);
shift &= 31;
if( shift == 0) {
} else if( shift > 15 ) {
@@ -2254,7 +2254,7 @@ void i386_device::i386_shrd16_cl() // Opcode 0x0f ad
void i386_device::i386_stosw() // Opcode 0xab
{
- UINT32 ead;
+ uint32_t ead;
ead = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1 );
WRITE16(ead, REG16(AX));
BUMP_DI(2);
@@ -2263,8 +2263,8 @@ void i386_device::i386_stosw() // Opcode 0xab
void i386_device::i386_sub_rm16_r16() // Opcode 0x29
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
@@ -2272,7 +2272,7 @@ void i386_device::i386_sub_rm16_r16() // Opcode 0x29
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
dst = READ16(ea);
dst = SUB16(dst, src);
@@ -2283,8 +2283,8 @@ void i386_device::i386_sub_rm16_r16() // Opcode 0x29
void i386_device::i386_sub_r16_rm16() // Opcode 0x2b
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
dst = LOAD_REG16(modrm);
@@ -2292,7 +2292,7 @@ void i386_device::i386_sub_r16_rm16() // Opcode 0x2b
STORE_REG16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
dst = LOAD_REG16(modrm);
dst = SUB16(dst, src);
@@ -2303,7 +2303,7 @@ void i386_device::i386_sub_r16_rm16() // Opcode 0x2b
void i386_device::i386_sub_ax_i16() // Opcode 0x2d
{
- UINT16 src, dst;
+ uint16_t src, dst;
src = FETCH16();
dst = REG16(AX);
dst = SUB16(dst, src);
@@ -2313,8 +2313,8 @@ void i386_device::i386_sub_ax_i16() // Opcode 0x2d
void i386_device::i386_test_ax_i16() // Opcode 0xa9
{
- UINT16 src = FETCH16();
- UINT16 dst = REG16(AX);
+ uint16_t src = FETCH16();
+ uint16_t dst = REG16(AX);
dst = src & dst;
SetSZPF16(dst);
m_CF = 0;
@@ -2324,8 +2324,8 @@ void i386_device::i386_test_ax_i16() // Opcode 0xa9
void i386_device::i386_test_rm16_r16() // Opcode 0x85
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
@@ -2335,7 +2335,7 @@ void i386_device::i386_test_rm16_r16() // Opcode 0x85
m_OF = 0;
CYCLES(CYCLES_TEST_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = LOAD_REG16(modrm);
dst = READ16(ea);
dst = src & dst;
@@ -2348,7 +2348,7 @@ void i386_device::i386_test_rm16_r16() // Opcode 0x85
void i386_device::i386_xchg_ax_cx() // Opcode 0x91
{
- UINT16 temp;
+ uint16_t temp;
temp = REG16(AX);
REG16(AX) = REG16(CX);
REG16(CX) = temp;
@@ -2357,7 +2357,7 @@ void i386_device::i386_xchg_ax_cx() // Opcode 0x91
void i386_device::i386_xchg_ax_dx() // Opcode 0x92
{
- UINT16 temp;
+ uint16_t temp;
temp = REG16(AX);
REG16(AX) = REG16(DX);
REG16(DX) = temp;
@@ -2366,7 +2366,7 @@ void i386_device::i386_xchg_ax_dx() // Opcode 0x92
void i386_device::i386_xchg_ax_bx() // Opcode 0x93
{
- UINT16 temp;
+ uint16_t temp;
temp = REG16(AX);
REG16(AX) = REG16(BX);
REG16(BX) = temp;
@@ -2375,7 +2375,7 @@ void i386_device::i386_xchg_ax_bx() // Opcode 0x93
void i386_device::i386_xchg_ax_sp() // Opcode 0x94
{
- UINT16 temp;
+ uint16_t temp;
temp = REG16(AX);
REG16(AX) = REG16(SP);
REG16(SP) = temp;
@@ -2384,7 +2384,7 @@ void i386_device::i386_xchg_ax_sp() // Opcode 0x94
void i386_device::i386_xchg_ax_bp() // Opcode 0x95
{
- UINT16 temp;
+ uint16_t temp;
temp = REG16(AX);
REG16(AX) = REG16(BP);
REG16(BP) = temp;
@@ -2393,7 +2393,7 @@ void i386_device::i386_xchg_ax_bp() // Opcode 0x95
void i386_device::i386_xchg_ax_si() // Opcode 0x96
{
- UINT16 temp;
+ uint16_t temp;
temp = REG16(AX);
REG16(AX) = REG16(SI);
REG16(SI) = temp;
@@ -2402,7 +2402,7 @@ void i386_device::i386_xchg_ax_si() // Opcode 0x96
void i386_device::i386_xchg_ax_di() // Opcode 0x97
{
- UINT16 temp;
+ uint16_t temp;
temp = REG16(AX);
REG16(AX) = REG16(DI);
REG16(DI) = temp;
@@ -2411,17 +2411,17 @@ void i386_device::i386_xchg_ax_di() // Opcode 0x97
void i386_device::i386_xchg_r16_rm16() // Opcode 0x87
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 src = LOAD_RM16(modrm);
- UINT16 dst = LOAD_REG16(modrm);
+ uint16_t src = LOAD_RM16(modrm);
+ uint16_t dst = LOAD_REG16(modrm);
STORE_REG16(modrm, src);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_XCHG_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 src = READ16(ea);
- UINT16 dst = LOAD_REG16(modrm);
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t src = READ16(ea);
+ uint16_t dst = LOAD_REG16(modrm);
STORE_REG16(modrm, src);
WRITE16(ea, dst);
CYCLES(CYCLES_XCHG_REG_MEM);
@@ -2430,8 +2430,8 @@ void i386_device::i386_xchg_r16_rm16() // Opcode 0x87
void i386_device::i386_xor_rm16_r16() // Opcode 0x31
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
@@ -2439,7 +2439,7 @@ void i386_device::i386_xor_rm16_r16() // Opcode 0x31
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
dst = READ16(ea);
dst = XOR16(dst, src);
@@ -2450,8 +2450,8 @@ void i386_device::i386_xor_rm16_r16() // Opcode 0x31
void i386_device::i386_xor_r16_rm16() // Opcode 0x33
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
dst = LOAD_REG16(modrm);
@@ -2459,7 +2459,7 @@ void i386_device::i386_xor_r16_rm16() // Opcode 0x33
STORE_REG16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
dst = LOAD_REG16(modrm);
dst = XOR16(dst, src);
@@ -2470,7 +2470,7 @@ void i386_device::i386_xor_r16_rm16() // Opcode 0x33
void i386_device::i386_xor_ax_i16() // Opcode 0x35
{
- UINT16 src, dst;
+ uint16_t src, dst;
src = FETCH16();
dst = REG16(AX);
dst = XOR16(dst, src);
@@ -2482,9 +2482,9 @@ void i386_device::i386_xor_ax_i16() // Opcode 0x35
void i386_device::i386_group81_16() // Opcode 0x81
{
- UINT32 ea;
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t ea;
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
@@ -2619,23 +2619,23 @@ void i386_device::i386_group81_16() // Opcode 0x81
void i386_device::i386_group83_16() // Opcode 0x83
{
- UINT32 ea;
- UINT16 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t ea;
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 0: // ADD Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = ADD16(dst, src);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ16(ea);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = ADD16(dst, src);
WRITE16(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2644,14 +2644,14 @@ void i386_device::i386_group83_16() // Opcode 0x83
case 1: // OR Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = OR16(dst, src);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ16(ea);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = OR16(dst, src);
WRITE16(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2660,14 +2660,14 @@ void i386_device::i386_group83_16() // Opcode 0x83
case 2: // ADC Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = ADC16(dst, src, m_CF);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ16(ea);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = ADC16(dst, src, m_CF);
WRITE16(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2676,14 +2676,14 @@ void i386_device::i386_group83_16() // Opcode 0x83
case 3: // SBB Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
- src = ((UINT16)(INT16)(INT8)FETCH());
+ src = ((uint16_t)(int16_t)(int8_t)FETCH());
dst = SBB16(dst, src, m_CF);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ16(ea);
- src = ((UINT16)(INT16)(INT8)FETCH());
+ src = ((uint16_t)(int16_t)(int8_t)FETCH());
dst = SBB16(dst, src, m_CF);
WRITE16(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2692,14 +2692,14 @@ void i386_device::i386_group83_16() // Opcode 0x83
case 4: // AND Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = AND16(dst, src);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ16(ea);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = AND16(dst, src);
WRITE16(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2708,14 +2708,14 @@ void i386_device::i386_group83_16() // Opcode 0x83
case 5: // SUB Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = SUB16(dst, src);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ16(ea);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = SUB16(dst, src);
WRITE16(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2724,14 +2724,14 @@ void i386_device::i386_group83_16() // Opcode 0x83
case 6: // XOR Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = XOR16(dst, src);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ16(ea);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
dst = XOR16(dst, src);
WRITE16(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2740,13 +2740,13 @@ void i386_device::i386_group83_16() // Opcode 0x83
case 7: // CMP Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
SUB16(dst, src);
CYCLES(CYCLES_CMP_REG_REG);
} else {
ea = GetEA(modrm,0);
dst = READ16(ea);
- src = (UINT16)(INT16)(INT8)FETCH();
+ src = (uint16_t)(int16_t)(int8_t)FETCH();
SUB16(dst, src);
CYCLES(CYCLES_CMP_REG_MEM);
}
@@ -2756,9 +2756,9 @@ void i386_device::i386_group83_16() // Opcode 0x83
void i386_device::i386_groupC1_16() // Opcode 0xc1
{
- UINT16 dst;
- UINT8 modrm = FETCH();
- UINT8 shift;
+ uint16_t dst;
+ uint8_t modrm = FETCH();
+ uint8_t shift;
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
@@ -2766,7 +2766,7 @@ void i386_device::i386_groupC1_16() // Opcode 0xc1
dst = i386_shift_rotate16(modrm, dst, shift);
STORE_RM16(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ16(ea);
shift = FETCH() & 0x1f;
dst = i386_shift_rotate16(modrm, dst, shift);
@@ -2776,15 +2776,15 @@ void i386_device::i386_groupC1_16() // Opcode 0xc1
void i386_device::i386_groupD1_16() // Opcode 0xd1
{
- UINT16 dst;
- UINT8 modrm = FETCH();
+ uint16_t dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
dst = i386_shift_rotate16(modrm, dst, 1);
STORE_RM16(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ16(ea);
dst = i386_shift_rotate16(modrm, dst, 1);
WRITE16(ea, dst);
@@ -2793,15 +2793,15 @@ void i386_device::i386_groupD1_16() // Opcode 0xd1
void i386_device::i386_groupD3_16() // Opcode 0xd3
{
- UINT16 dst;
- UINT8 modrm = FETCH();
+ uint16_t dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
dst = i386_shift_rotate16(modrm, dst, REG8(CL));
STORE_RM16(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ16(ea);
dst = i386_shift_rotate16(modrm, dst, REG8(CL));
WRITE16(ea, dst);
@@ -2810,22 +2810,22 @@ void i386_device::i386_groupD3_16() // Opcode 0xd3
void i386_device::i386_groupF7_16() // Opcode 0xf7
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 0: /* TEST Rm16, i16 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 src = FETCH16();
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t src = FETCH16();
dst &= src;
m_CF = m_OF = m_AF = 0;
SetSZPF16(dst);
CYCLES(CYCLES_TEST_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT16 dst = READ16(ea);
- UINT16 src = FETCH16();
+ uint32_t ea = GetEA(modrm,0);
+ uint16_t dst = READ16(ea);
+ uint16_t src = FETCH16();
dst &= src;
m_CF = m_OF = m_AF = 0;
SetSZPF16(dst);
@@ -2834,13 +2834,13 @@ void i386_device::i386_groupF7_16() // Opcode 0xf7
break;
case 2: /* NOT Rm16 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
dst = ~dst;
STORE_RM16(modrm, dst);
CYCLES(CYCLES_NOT_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
dst = ~dst;
WRITE16(ea, dst);
CYCLES(CYCLES_NOT_MEM);
@@ -2848,13 +2848,13 @@ void i386_device::i386_groupF7_16() // Opcode 0xf7
break;
case 3: /* NEG Rm16 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
dst = SUB16(0, dst );
STORE_RM16(modrm, dst);
CYCLES(CYCLES_NEG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
dst = SUB16(0, dst );
WRITE16(ea, dst);
CYCLES(CYCLES_NEG_MEM);
@@ -2862,69 +2862,69 @@ void i386_device::i386_groupF7_16() // Opcode 0xf7
break;
case 4: /* MUL AX, Rm16 */
{
- UINT32 result;
- UINT16 src, dst;
+ uint32_t result;
+ uint16_t src, dst;
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
CYCLES(CYCLES_MUL16_ACC_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
CYCLES(CYCLES_MUL16_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = REG16(AX);
- result = (UINT32)src * (UINT32)dst;
- REG16(DX) = (UINT16)(result >> 16);
- REG16(AX) = (UINT16)result;
+ result = (uint32_t)src * (uint32_t)dst;
+ REG16(DX) = (uint16_t)(result >> 16);
+ REG16(AX) = (uint16_t)result;
m_CF = m_OF = (REG16(DX) != 0);
}
break;
case 5: /* IMUL AX, Rm16 */
{
- INT32 result;
- INT32 src, dst;
+ int32_t result;
+ int32_t src, dst;
if( modrm >= 0xc0 ) {
- src = (INT32)(INT16)LOAD_RM16(modrm);
+ src = (int32_t)(int16_t)LOAD_RM16(modrm);
CYCLES(CYCLES_IMUL16_ACC_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- src = (INT32)(INT16)READ16(ea);
+ uint32_t ea = GetEA(modrm,0);
+ src = (int32_t)(int16_t)READ16(ea);
CYCLES(CYCLES_IMUL16_ACC_MEM); /* TODO: Correct multiply timing */
}
- dst = (INT32)(INT16)REG16(AX);
+ dst = (int32_t)(int16_t)REG16(AX);
result = src * dst;
- REG16(DX) = (UINT16)(result >> 16);
- REG16(AX) = (UINT16)result;
+ REG16(DX) = (uint16_t)(result >> 16);
+ REG16(AX) = (uint16_t)result;
- m_CF = m_OF = !(result == (INT32)(INT16)result);
+ m_CF = m_OF = !(result == (int32_t)(int16_t)result);
}
break;
case 6: /* DIV AX, Rm16 */
{
- UINT32 quotient, remainder, result;
- UINT16 src;
+ uint32_t quotient, remainder, result;
+ uint16_t src;
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
CYCLES(CYCLES_DIV16_ACC_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
CYCLES(CYCLES_DIV16_ACC_MEM);
}
- quotient = ((UINT32)(REG16(DX)) << 16) | (UINT32)(REG16(AX));
+ quotient = ((uint32_t)(REG16(DX)) << 16) | (uint32_t)(REG16(AX));
if( src ) {
- remainder = quotient % (UINT32)src;
- result = quotient / (UINT32)src;
+ remainder = quotient % (uint32_t)src;
+ result = quotient / (uint32_t)src;
if( result > 0xffff ) {
/* TODO: Divide error */
} else {
- REG16(DX) = (UINT16)remainder;
- REG16(AX) = (UINT16)result;
+ REG16(DX) = (uint16_t)remainder;
+ REG16(AX) = (uint16_t)result;
// this flag is actually undefined, enable on non-cyrix
if (m_cpuid_id0 != 0x69727943)
@@ -2937,26 +2937,26 @@ void i386_device::i386_groupF7_16() // Opcode 0xf7
break;
case 7: /* IDIV AX, Rm16 */
{
- INT32 quotient, remainder, result;
- UINT16 src;
+ int32_t quotient, remainder, result;
+ uint16_t src;
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
CYCLES(CYCLES_IDIV16_ACC_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
CYCLES(CYCLES_IDIV16_ACC_MEM);
}
- quotient = (((INT32)REG16(DX)) << 16) | ((UINT32)REG16(AX));
+ quotient = (((int32_t)REG16(DX)) << 16) | ((uint32_t)REG16(AX));
if( src ) {
- remainder = quotient % (INT32)(INT16)src;
- result = quotient / (INT32)(INT16)src;
+ remainder = quotient % (int32_t)(int16_t)src;
+ result = quotient / (int32_t)(int16_t)src;
if( result > 0xffff ) {
/* TODO: Divide error */
} else {
- REG16(DX) = (UINT16)remainder;
- REG16(AX) = (UINT16)result;
+ REG16(DX) = (uint16_t)remainder;
+ REG16(AX) = (uint16_t)result;
// this flag is actually undefined, enable on non-cyrix
if (m_cpuid_id0 != 0x69727943)
@@ -2972,19 +2972,19 @@ void i386_device::i386_groupF7_16() // Opcode 0xf7
void i386_device::i386_groupFF_16() // Opcode 0xff
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 0: /* INC Rm16 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
dst = INC16(dst);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_INC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
dst = INC16(dst);
WRITE16(ea, dst);
CYCLES(CYCLES_INC_MEM);
@@ -2992,13 +2992,13 @@ void i386_device::i386_groupFF_16() // Opcode 0xff
break;
case 1: /* DEC Rm16 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
dst = DEC16(dst);
STORE_RM16(modrm, dst);
CYCLES(CYCLES_DEC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
dst = DEC16(dst);
WRITE16(ea, dst);
CYCLES(CYCLES_DEC_MEM);
@@ -3006,12 +3006,12 @@ void i386_device::i386_groupFF_16() // Opcode 0xff
break;
case 2: /* CALL Rm16 */
{
- UINT16 address;
+ uint16_t address;
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
CYCLES(CYCLES_CALL_REG); /* TODO: Timing = 7 + m */
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
address = READ16(ea);
CYCLES(CYCLES_CALL_MEM); /* TODO: Timing = 10 + m */
}
@@ -3022,14 +3022,14 @@ void i386_device::i386_groupFF_16() // Opcode 0xff
break;
case 3: /* CALL FAR Rm16 */
{
- UINT16 address, selector;
+ uint16_t address, selector;
if( modrm >= 0xc0 )
{
report_invalid_modrm("groupFF_16", modrm);
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
address = READ16(ea + 0);
selector = READ16(ea + 2);
CYCLES(CYCLES_CALL_MEM_INTERSEG); /* TODO: Timing = 10 + m */
@@ -3053,12 +3053,12 @@ void i386_device::i386_groupFF_16() // Opcode 0xff
break;
case 4: /* JMP Rm16 */
{
- UINT16 address;
+ uint16_t address;
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
CYCLES(CYCLES_JMP_REG); /* TODO: Timing = 7 + m */
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
address = READ16(ea);
CYCLES(CYCLES_JMP_MEM); /* TODO: Timing = 10 + m */
}
@@ -3068,7 +3068,7 @@ void i386_device::i386_groupFF_16() // Opcode 0xff
break;
case 5: /* JMP FAR Rm16 */
{
- UINT16 address, selector;
+ uint16_t address, selector;
if( modrm >= 0xc0 )
{
@@ -3076,7 +3076,7 @@ void i386_device::i386_groupFF_16() // Opcode 0xff
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
address = READ16(ea + 0);
selector = READ16(ea + 2);
CYCLES(CYCLES_JMP_MEM_INTERSEG); /* TODO: Timing = 10 + m */
@@ -3097,11 +3097,11 @@ void i386_device::i386_groupFF_16() // Opcode 0xff
break;
case 6: /* PUSH Rm16 */
{
- UINT16 value;
+ uint16_t value;
if( modrm >= 0xc0 ) {
value = LOAD_RM16(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
value = READ16(ea);
}
PUSH16(value);
@@ -3116,10 +3116,10 @@ void i386_device::i386_groupFF_16() // Opcode 0xff
void i386_device::i386_group0F00_16() // Opcode 0x0f 00
{
- UINT32 address, ea;
- UINT8 modrm = FETCH();
+ uint32_t address, ea;
+ uint8_t modrm = FETCH();
I386_SREG seg;
- UINT8 result;
+ uint8_t result;
switch( (modrm >> 3) & 0x7 )
{
@@ -3202,7 +3202,7 @@ void i386_device::i386_group0F00_16() // Opcode 0x0f 00
seg.selector = m_task.segment;
i386_load_protected_mode_segment(&seg,nullptr);
- UINT32 addr = ((seg.selector & 4) ? m_ldtr.base : m_gdtr.base) + (seg.selector & ~7) + 5;
+ uint32_t addr = ((seg.selector & 4) ? m_ldtr.base : m_gdtr.base) + (seg.selector & ~7) + 5;
i386_translate_address(TRANSLATE_READ, &addr, nullptr);
m_program->write_byte(addr, (seg.flags & 0xff) | 2);
@@ -3315,9 +3315,9 @@ void i386_device::i386_group0F00_16() // Opcode 0x0f 00
void i386_device::i386_group0F01_16() // Opcode 0x0f 01
{
- UINT8 modrm = FETCH();
- UINT16 address;
- UINT32 ea;
+ uint8_t modrm = FETCH();
+ uint16_t address;
+ uint32_t ea;
switch( (modrm >> 3) & 0x7 )
{
@@ -3396,7 +3396,7 @@ void i386_device::i386_group0F01_16() // Opcode 0x0f 01
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP,0)
- UINT16 b;
+ uint16_t b;
if( modrm >= 0xc0 ) {
b = LOAD_RM16(modrm);
CYCLES(CYCLES_LMSW_REG);
@@ -3419,14 +3419,14 @@ void i386_device::i386_group0F01_16() // Opcode 0x0f 01
void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 4: /* BT Rm16, i8 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT8 bit = FETCH();
+ uint16_t dst = LOAD_RM16(modrm);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3435,9 +3435,9 @@ void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
CYCLES(CYCLES_BT_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT16 dst = READ16(ea);
- UINT8 bit = FETCH();
+ uint32_t ea = GetEA(modrm,0);
+ uint16_t dst = READ16(ea);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3449,8 +3449,8 @@ void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
break;
case 5: /* BTS Rm16, i8 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT8 bit = FETCH();
+ uint16_t dst = LOAD_RM16(modrm);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3461,9 +3461,9 @@ void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
STORE_RM16(modrm, dst);
CYCLES(CYCLES_BTS_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
- UINT8 bit = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3477,8 +3477,8 @@ void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
break;
case 6: /* BTR Rm16, i8 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT8 bit = FETCH();
+ uint16_t dst = LOAD_RM16(modrm);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3489,9 +3489,9 @@ void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
STORE_RM16(modrm, dst);
CYCLES(CYCLES_BTR_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
- UINT8 bit = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3505,8 +3505,8 @@ void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
break;
case 7: /* BTC Rm16, i8 */
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT8 bit = FETCH();
+ uint16_t dst = LOAD_RM16(modrm);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3517,9 +3517,9 @@ void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
STORE_RM16(modrm, dst);
CYCLES(CYCLES_BTC_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
- UINT8 bit = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3539,9 +3539,9 @@ void i386_device::i386_group0FBA_16() // Opcode 0x0f ba
void i386_device::i386_lar_r16_rm16() // Opcode 0x0f 0x02
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
I386_SREG seg;
- UINT8 type;
+ uint8_t type;
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -3553,7 +3553,7 @@ void i386_device::i386_lar_r16_rm16() // Opcode 0x0f 0x02
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
seg.selector = READ16(ea);
CYCLES(CYCLES_LAR_MEM);
}
@@ -3569,7 +3569,7 @@ void i386_device::i386_lar_r16_rm16() // Opcode 0x0f 0x02
SetZF(0);
return;
}
- UINT8 DPL = (seg.flags >> 5) & 3;
+ uint8_t DPL = (seg.flags >> 5) & 3;
if(((DPL < m_CPL) || (DPL < (seg.selector & 3))) && ((seg.flags & 0x1c) != 0x1c))
{
SetZF(0);
@@ -3606,8 +3606,8 @@ void i386_device::i386_lar_r16_rm16() // Opcode 0x0f 0x02
void i386_device::i386_lsl_r16_rm16() // Opcode 0x0f 0x03
{
- UINT8 modrm = FETCH();
- UINT32 limit;
+ uint8_t modrm = FETCH();
+ uint32_t limit;
I386_SREG seg;
if(PROTECTED_MODE && !V8086_MODE)
@@ -3619,7 +3619,7 @@ void i386_device::i386_lsl_r16_rm16() // Opcode 0x0f 0x03
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
seg.selector = READ16(ea);
}
if(seg.selector == 0)
@@ -3628,13 +3628,13 @@ void i386_device::i386_lsl_r16_rm16() // Opcode 0x0f 0x03
}
else
{
- UINT8 type;
+ uint8_t type;
if(!i386_load_protected_mode_segment(&seg,nullptr))
{
SetZF(0);
return;
}
- UINT8 DPL = (seg.flags >> 5) & 3;
+ uint8_t DPL = (seg.flags >> 5) & 3;
if(((DPL < m_CPL) || (DPL < (seg.selector & 3))) && ((seg.flags & 0x1c) != 0x1c))
{
SetZF(0);
@@ -3669,8 +3669,8 @@ void i386_device::i386_lsl_r16_rm16() // Opcode 0x0f 0x03
void i386_device::i386_bound_r16_m16_m16() // Opcode 0x62
{
- UINT8 modrm;
- INT16 val, low, high;
+ uint8_t modrm;
+ int16_t val, low, high;
modrm = FETCH();
@@ -3680,7 +3680,7 @@ void i386_device::i386_bound_r16_m16_m16() // Opcode 0x62
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
low = READ16(ea + 0);
high = READ16(ea + 2);
}
@@ -3716,7 +3716,7 @@ void i386_device::i386_retf16() // Opcode 0xcb
void i386_device::i386_retf_i16() // Opcode 0xca
{
- UINT16 count = FETCH16();
+ uint16_t count = FETCH16();
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -3736,15 +3736,15 @@ void i386_device::i386_retf_i16() // Opcode 0xca
bool i386_device::i386_load_far_pointer16(int s)
{
- UINT8 modrm = FETCH();
- UINT16 selector;
+ uint8_t modrm = FETCH();
+ uint16_t selector;
if( modrm >= 0xc0 ) {
//logerror("i386: load_far_pointer16 NYI\n"); // don't log, NT will use this a lot
i386_trap(6, 0, 0);
return false;
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
STORE_REG16(modrm, READ16(ea + 0));
selector = READ16(ea + 2);
i386_sreg_load(selector,s,nullptr);
diff --git a/src/devices/cpu/i386/i386op32.hxx b/src/devices/cpu/i386/i386op32.hxx
index 89c7bab44b4..e333bbaaa70 100644
--- a/src/devices/cpu/i386/i386op32.hxx
+++ b/src/devices/cpu/i386/i386op32.hxx
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde, Barry Rodewald, Carl, Philip Bennett
-UINT32 i386_device::i386_shift_rotate32(UINT8 modrm, UINT32 value, UINT8 shift)
+uint32_t i386_device::i386_shift_rotate32(uint8_t modrm, uint32_t value, uint8_t shift)
{
- UINT32 dst, src;
+ uint32_t dst, src;
dst = value;
src = value;
@@ -51,7 +51,7 @@ UINT32 i386_device::i386_shift_rotate32(UINT8 modrm, UINT32 value, UINT8 shift)
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 7: /* SAR rm32, 1 */
- dst = (INT32)(src) >> 1;
+ dst = (int32_t)(src) >> 1;
m_CF = src & 0x1;
m_OF = 0;
SetSZPF32(dst);
@@ -64,30 +64,30 @@ UINT32 i386_device::i386_shift_rotate32(UINT8 modrm, UINT32 value, UINT8 shift)
switch( (modrm >> 3) & 0x7 )
{
case 0: /* ROL rm32, i8 */
- dst = ((src & ((UINT32)0xffffffff >> shift)) << shift) |
- ((src & ((UINT32)0xffffffff << (32-shift))) >> (32-shift));
+ dst = ((src & ((uint32_t)0xffffffff >> shift)) << shift) |
+ ((src & ((uint32_t)0xffffffff << (32-shift))) >> (32-shift));
m_CF = dst & 0x1;
m_OF = (dst & 1) ^ (dst >> 31);
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 1: /* ROR rm32, i8 */
- dst = ((src & ((UINT32)0xffffffff << shift)) >> shift) |
- ((src & ((UINT32)0xffffffff >> (32-shift))) << (32-shift));
+ dst = ((src & ((uint32_t)0xffffffff << shift)) >> shift) |
+ ((src & ((uint32_t)0xffffffff >> (32-shift))) << (32-shift));
m_CF = (dst >> 31) & 0x1;
m_OF = ((dst >> 31) ^ (dst >> 30)) & 1;
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 2: /* RCL rm32, i8 */
- dst = ((src & ((UINT32)0xffffffff >> shift)) << shift) |
- ((src & ((UINT32)0xffffffff << (33-shift))) >> (33-shift)) |
+ dst = ((src & ((uint32_t)0xffffffff >> shift)) << shift) |
+ ((src & ((uint32_t)0xffffffff << (33-shift))) >> (33-shift)) |
(m_CF << (shift-1));
m_CF = (src >> (32-shift)) & 0x1;
m_OF = m_CF ^ ((dst >> 31) & 1);
CYCLES_RM(modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
case 3: /* RCR rm32, i8 */
- dst = ((src & ((UINT32)0xffffffff << shift)) >> shift) |
- ((src & ((UINT32)0xffffffff >> (32-shift))) << (33-shift)) |
+ dst = ((src & ((uint32_t)0xffffffff << shift)) >> shift) |
+ ((src & ((uint32_t)0xffffffff >> (32-shift))) << (33-shift)) |
(m_CF << (32-shift));
m_CF = (src >> (shift-1)) & 0x1;
m_OF = ((dst >> 31) ^ (dst >> 30)) & 1;
@@ -107,7 +107,7 @@ UINT32 i386_device::i386_shift_rotate32(UINT8 modrm, UINT32 value, UINT8 shift)
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 7: /* SAR rm32, i8 */
- dst = (INT32)src >> shift;
+ dst = (int32_t)src >> shift;
m_CF = (src & (1 << (shift-1))) ? 1 : 0;
SetSZPF32(dst);
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
@@ -122,8 +122,8 @@ UINT32 i386_device::i386_shift_rotate32(UINT8 modrm, UINT32 value, UINT8 shift)
void i386_device::i386_adc_rm32_r32() // Opcode 0x11
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
@@ -131,7 +131,7 @@ void i386_device::i386_adc_rm32_r32() // Opcode 0x11
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG32(modrm);
dst = READ32(ea);
dst = ADC32(dst, src, m_CF);
@@ -142,8 +142,8 @@ void i386_device::i386_adc_rm32_r32() // Opcode 0x11
void i386_device::i386_adc_r32_rm32() // Opcode 0x13
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
dst = LOAD_REG32(modrm);
@@ -151,7 +151,7 @@ void i386_device::i386_adc_r32_rm32() // Opcode 0x13
STORE_REG32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
dst = LOAD_REG32(modrm);
dst = ADC32(dst, src, m_CF);
@@ -162,7 +162,7 @@ void i386_device::i386_adc_r32_rm32() // Opcode 0x13
void i386_device::i386_adc_eax_i32() // Opcode 0x15
{
- UINT32 src, dst;
+ uint32_t src, dst;
src = FETCH32();
dst = REG32(EAX);
dst = ADC32(dst, src, m_CF);
@@ -172,8 +172,8 @@ void i386_device::i386_adc_eax_i32() // Opcode 0x15
void i386_device::i386_add_rm32_r32() // Opcode 0x01
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
@@ -181,7 +181,7 @@ void i386_device::i386_add_rm32_r32() // Opcode 0x01
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG32(modrm);
dst = READ32(ea);
dst = ADD32(dst, src);
@@ -192,8 +192,8 @@ void i386_device::i386_add_rm32_r32() // Opcode 0x01
void i386_device::i386_add_r32_rm32() // Opcode 0x03
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
dst = LOAD_REG32(modrm);
@@ -201,7 +201,7 @@ void i386_device::i386_add_r32_rm32() // Opcode 0x03
STORE_REG32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
dst = LOAD_REG32(modrm);
dst = ADD32(dst, src);
@@ -212,7 +212,7 @@ void i386_device::i386_add_r32_rm32() // Opcode 0x03
void i386_device::i386_add_eax_i32() // Opcode 0x05
{
- UINT32 src, dst;
+ uint32_t src, dst;
src = FETCH32();
dst = REG32(EAX);
dst = ADD32(dst, src);
@@ -222,8 +222,8 @@ void i386_device::i386_add_eax_i32() // Opcode 0x05
void i386_device::i386_and_rm32_r32() // Opcode 0x21
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
@@ -231,7 +231,7 @@ void i386_device::i386_and_rm32_r32() // Opcode 0x21
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG32(modrm);
dst = READ32(ea);
dst = AND32(dst, src);
@@ -242,8 +242,8 @@ void i386_device::i386_and_rm32_r32() // Opcode 0x21
void i386_device::i386_and_r32_rm32() // Opcode 0x23
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
dst = LOAD_REG32(modrm);
@@ -251,7 +251,7 @@ void i386_device::i386_and_r32_rm32() // Opcode 0x23
STORE_REG32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
dst = LOAD_REG32(modrm);
dst = AND32(dst, src);
@@ -262,7 +262,7 @@ void i386_device::i386_and_r32_rm32() // Opcode 0x23
void i386_device::i386_and_eax_i32() // Opcode 0x25
{
- UINT32 src, dst;
+ uint32_t src, dst;
src = FETCH32();
dst = REG32(EAX);
dst = AND32(dst, src);
@@ -272,13 +272,13 @@ void i386_device::i386_and_eax_i32() // Opcode 0x25
void i386_device::i386_bsf_r32_rm32() // Opcode 0x0f bc
{
- UINT32 src, dst, temp;
- UINT8 modrm = FETCH();
+ uint32_t src, dst, temp;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
}
@@ -301,13 +301,13 @@ void i386_device::i386_bsf_r32_rm32() // Opcode 0x0f bc
void i386_device::i386_bsr_r32_rm32() // Opcode 0x0f bd
{
- UINT32 src, dst, temp;
- UINT8 modrm = FETCH();
+ uint32_t src, dst, temp;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
}
@@ -330,10 +330,10 @@ void i386_device::i386_bsr_r32_rm32() // Opcode 0x0f bd
void i386_device::i386_bt_rm32_r32() // Opcode 0x0f a3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 bit = LOAD_REG32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t bit = LOAD_REG32(modrm);
if( dst & (1 << bit) )
m_CF = 1;
@@ -342,13 +342,13 @@ void i386_device::i386_bt_rm32_r32() // Opcode 0x0f a3
CYCLES(CYCLES_BT_REG_REG);
} else {
- UINT8 segment;
- UINT32 ea = GetNonTranslatedEA(modrm,&segment);
- UINT32 bit = LOAD_REG32(modrm);
+ uint8_t segment;
+ uint32_t ea = GetNonTranslatedEA(modrm,&segment);
+ uint32_t bit = LOAD_REG32(modrm);
ea += 4*(bit/32);
ea = i386_translate(segment,(m_address_size)?ea:(ea&0xffff),0);
bit %= 32;
- UINT32 dst = READ32(ea);
+ uint32_t dst = READ32(ea);
if( dst & (1 << bit) )
m_CF = 1;
@@ -361,10 +361,10 @@ void i386_device::i386_bt_rm32_r32() // Opcode 0x0f a3
void i386_device::i386_btc_rm32_r32() // Opcode 0x0f bb
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 bit = LOAD_REG32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t bit = LOAD_REG32(modrm);
if( dst & (1 << bit) )
m_CF = 1;
@@ -375,13 +375,13 @@ void i386_device::i386_btc_rm32_r32() // Opcode 0x0f bb
STORE_RM32(modrm, dst);
CYCLES(CYCLES_BTC_REG_REG);
} else {
- UINT8 segment;
- UINT32 ea = GetNonTranslatedEA(modrm,&segment);
- UINT32 bit = LOAD_REG32(modrm);
+ uint8_t segment;
+ uint32_t ea = GetNonTranslatedEA(modrm,&segment);
+ uint32_t bit = LOAD_REG32(modrm);
ea += 4*(bit/32);
ea = i386_translate(segment,(m_address_size)?ea:(ea&0xffff),1);
bit %= 32;
- UINT32 dst = READ32(ea);
+ uint32_t dst = READ32(ea);
if( dst & (1 << bit) )
m_CF = 1;
@@ -396,10 +396,10 @@ void i386_device::i386_btc_rm32_r32() // Opcode 0x0f bb
void i386_device::i386_btr_rm32_r32() // Opcode 0x0f b3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 bit = LOAD_REG32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t bit = LOAD_REG32(modrm);
if( dst & (1 << bit) )
m_CF = 1;
@@ -410,13 +410,13 @@ void i386_device::i386_btr_rm32_r32() // Opcode 0x0f b3
STORE_RM32(modrm, dst);
CYCLES(CYCLES_BTR_REG_REG);
} else {
- UINT8 segment;
- UINT32 ea = GetNonTranslatedEA(modrm,&segment);
- UINT32 bit = LOAD_REG32(modrm);
+ uint8_t segment;
+ uint32_t ea = GetNonTranslatedEA(modrm,&segment);
+ uint32_t bit = LOAD_REG32(modrm);
ea += 4*(bit/32);
ea = i386_translate(segment,(m_address_size)?ea:(ea&0xffff),1);
bit %= 32;
- UINT32 dst = READ32(ea);
+ uint32_t dst = READ32(ea);
if( dst & (1 << bit) )
m_CF = 1;
@@ -431,10 +431,10 @@ void i386_device::i386_btr_rm32_r32() // Opcode 0x0f b3
void i386_device::i386_bts_rm32_r32() // Opcode 0x0f ab
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 bit = LOAD_REG32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t bit = LOAD_REG32(modrm);
if( dst & (1 << bit) )
m_CF = 1;
@@ -445,13 +445,13 @@ void i386_device::i386_bts_rm32_r32() // Opcode 0x0f ab
STORE_RM32(modrm, dst);
CYCLES(CYCLES_BTS_REG_REG);
} else {
- UINT8 segment;
- UINT32 ea = GetNonTranslatedEA(modrm,&segment);
- UINT32 bit = LOAD_REG32(modrm);
+ uint8_t segment;
+ uint32_t ea = GetNonTranslatedEA(modrm,&segment);
+ uint32_t bit = LOAD_REG32(modrm);
ea += 4*(bit/32);
ea = i386_translate(segment,(m_address_size)?ea:(ea&0xffff),1);
bit %= 32;
- UINT32 dst = READ32(ea);
+ uint32_t dst = READ32(ea);
if( dst & (1 << bit) )
m_CF = 1;
@@ -466,8 +466,8 @@ void i386_device::i386_bts_rm32_r32() // Opcode 0x0f ab
void i386_device::i386_call_abs32() // Opcode 0x9a
{
- UINT32 offset = FETCH32();
- UINT16 ptr = FETCH16();
+ uint32_t offset = FETCH32();
+ uint16_t ptr = FETCH16();
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -488,7 +488,7 @@ void i386_device::i386_call_abs32() // Opcode 0x9a
void i386_device::i386_call_rel32() // Opcode 0xe8
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
PUSH32(m_eip );
m_eip += disp;
CHANGE_PC(m_eip);
@@ -507,15 +507,15 @@ void i386_device::i386_cdq() // Opcode 0x99
void i386_device::i386_cmp_rm32_r32() // Opcode 0x39
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
SUB32(dst, src);
CYCLES(CYCLES_CMP_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = LOAD_REG32(modrm);
dst = READ32(ea);
SUB32(dst, src);
@@ -525,15 +525,15 @@ void i386_device::i386_cmp_rm32_r32() // Opcode 0x39
void i386_device::i386_cmp_r32_rm32() // Opcode 0x3b
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
dst = LOAD_REG32(modrm);
SUB32(dst, src);
CYCLES(CYCLES_CMP_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
dst = LOAD_REG32(modrm);
SUB32(dst, src);
@@ -543,7 +543,7 @@ void i386_device::i386_cmp_r32_rm32() // Opcode 0x3b
void i386_device::i386_cmp_eax_i32() // Opcode 0x3d
{
- UINT32 src, dst;
+ uint32_t src, dst;
src = FETCH32();
dst = REG32(EAX);
SUB32(dst, src);
@@ -552,7 +552,7 @@ void i386_device::i386_cmp_eax_i32() // Opcode 0x3d
void i386_device::i386_cmpsd() // Opcode 0xa7
{
- UINT32 eas, ead, src, dst;
+ uint32_t eas, ead, src, dst;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -569,7 +569,7 @@ void i386_device::i386_cmpsd() // Opcode 0xa7
void i386_device::i386_cwde() // Opcode 0x98
{
- REG32(EAX) = (INT32)((INT16)REG16(AX));
+ REG32(EAX) = (int32_t)((int16_t)REG16(AX));
CYCLES(CYCLES_CBW);
}
@@ -623,82 +623,82 @@ void i386_device::i386_dec_edi() // Opcode 0x4f
void i386_device::i386_imul_r32_rm32() // Opcode 0x0f af
{
- UINT8 modrm = FETCH();
- INT64 result;
- INT64 src, dst;
+ uint8_t modrm = FETCH();
+ int64_t result;
+ int64_t src, dst;
if( modrm >= 0xc0 ) {
- src = (INT64)(INT32)LOAD_RM32(modrm);
+ src = (int64_t)(int32_t)LOAD_RM32(modrm);
CYCLES(CYCLES_IMUL32_REG_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- src = (INT64)(INT32)READ32(ea);
+ uint32_t ea = GetEA(modrm,0);
+ src = (int64_t)(int32_t)READ32(ea);
CYCLES(CYCLES_IMUL32_REG_REG); /* TODO: Correct multiply timing */
}
- dst = (INT64)(INT32)LOAD_REG32(modrm);
+ dst = (int64_t)(int32_t)LOAD_REG32(modrm);
result = src * dst;
- STORE_REG32(modrm, (UINT32)result);
+ STORE_REG32(modrm, (uint32_t)result);
- m_CF = m_OF = !(result == (INT64)(INT32)result);
+ m_CF = m_OF = !(result == (int64_t)(int32_t)result);
}
void i386_device::i386_imul_r32_rm32_i32() // Opcode 0x69
{
- UINT8 modrm = FETCH();
- INT64 result;
- INT64 src, dst;
+ uint8_t modrm = FETCH();
+ int64_t result;
+ int64_t src, dst;
if( modrm >= 0xc0 ) {
- dst = (INT64)(INT32)LOAD_RM32(modrm);
+ dst = (int64_t)(int32_t)LOAD_RM32(modrm);
CYCLES(CYCLES_IMUL32_REG_IMM_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- dst = (INT64)(INT32)READ32(ea);
+ uint32_t ea = GetEA(modrm,0);
+ dst = (int64_t)(int32_t)READ32(ea);
CYCLES(CYCLES_IMUL32_MEM_IMM_REG); /* TODO: Correct multiply timing */
}
- src = (INT64)(INT32)FETCH32();
+ src = (int64_t)(int32_t)FETCH32();
result = src * dst;
- STORE_REG32(modrm, (UINT32)result);
+ STORE_REG32(modrm, (uint32_t)result);
- m_CF = m_OF = !(result == (INT64)(INT32)result);
+ m_CF = m_OF = !(result == (int64_t)(int32_t)result);
}
void i386_device::i386_imul_r32_rm32_i8() // Opcode 0x6b
{
- UINT8 modrm = FETCH();
- INT64 result;
- INT64 src, dst;
+ uint8_t modrm = FETCH();
+ int64_t result;
+ int64_t src, dst;
if( modrm >= 0xc0 ) {
- dst = (INT64)(INT32)LOAD_RM32(modrm);
+ dst = (int64_t)(int32_t)LOAD_RM32(modrm);
CYCLES(CYCLES_IMUL32_REG_IMM_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- dst = (INT64)(INT32)READ32(ea);
+ uint32_t ea = GetEA(modrm,0);
+ dst = (int64_t)(int32_t)READ32(ea);
CYCLES(CYCLES_IMUL32_MEM_IMM_REG); /* TODO: Correct multiply timing */
}
- src = (INT64)(INT8)FETCH();
+ src = (int64_t)(int8_t)FETCH();
result = src * dst;
- STORE_REG32(modrm, (UINT32)result);
+ STORE_REG32(modrm, (uint32_t)result);
- m_CF = m_OF = !(result == (INT64)(INT32)result);
+ m_CF = m_OF = !(result == (int64_t)(int32_t)result);
}
void i386_device::i386_in_eax_i8() // Opcode 0xe5
{
- UINT16 port = FETCH();
- UINT32 data = READPORT32(port);
+ uint16_t port = FETCH();
+ uint32_t data = READPORT32(port);
REG32(EAX) = data;
CYCLES(CYCLES_IN_VAR);
}
void i386_device::i386_in_eax_dx() // Opcode 0xed
{
- UINT16 port = REG16(DX);
- UINT32 data = READPORT32(port);
+ uint16_t port = REG16(DX);
+ uint32_t data = READPORT32(port);
REG32(EAX) = data;
CYCLES(CYCLES_IN);
}
@@ -772,7 +772,7 @@ void i386_device::i386_iret32() // Opcode 0xcf
void i386_device::i386_ja_rel32() // Opcode 0x0f 87
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_CF == 0 && m_ZF == 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -784,7 +784,7 @@ void i386_device::i386_ja_rel32() // Opcode 0x0f 87
void i386_device::i386_jbe_rel32() // Opcode 0x0f 86
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_CF != 0 || m_ZF != 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -796,7 +796,7 @@ void i386_device::i386_jbe_rel32() // Opcode 0x0f 86
void i386_device::i386_jc_rel32() // Opcode 0x0f 82
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_CF != 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -808,7 +808,7 @@ void i386_device::i386_jc_rel32() // Opcode 0x0f 82
void i386_device::i386_jg_rel32() // Opcode 0x0f 8f
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_ZF == 0 && (m_SF == m_OF) ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -820,7 +820,7 @@ void i386_device::i386_jg_rel32() // Opcode 0x0f 8f
void i386_device::i386_jge_rel32() // Opcode 0x0f 8d
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if(m_SF == m_OF) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -832,7 +832,7 @@ void i386_device::i386_jge_rel32() // Opcode 0x0f 8d
void i386_device::i386_jl_rel32() // Opcode 0x0f 8c
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( (m_SF != m_OF) ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -844,7 +844,7 @@ void i386_device::i386_jl_rel32() // Opcode 0x0f 8c
void i386_device::i386_jle_rel32() // Opcode 0x0f 8e
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_ZF != 0 || (m_SF != m_OF) ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -856,7 +856,7 @@ void i386_device::i386_jle_rel32() // Opcode 0x0f 8e
void i386_device::i386_jnc_rel32() // Opcode 0x0f 83
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_CF == 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -868,7 +868,7 @@ void i386_device::i386_jnc_rel32() // Opcode 0x0f 83
void i386_device::i386_jno_rel32() // Opcode 0x0f 81
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_OF == 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -880,7 +880,7 @@ void i386_device::i386_jno_rel32() // Opcode 0x0f 81
void i386_device::i386_jnp_rel32() // Opcode 0x0f 8b
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_PF == 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -892,7 +892,7 @@ void i386_device::i386_jnp_rel32() // Opcode 0x0f 8b
void i386_device::i386_jns_rel32() // Opcode 0x0f 89
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_SF == 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -904,7 +904,7 @@ void i386_device::i386_jns_rel32() // Opcode 0x0f 89
void i386_device::i386_jnz_rel32() // Opcode 0x0f 85
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_ZF == 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -916,7 +916,7 @@ void i386_device::i386_jnz_rel32() // Opcode 0x0f 85
void i386_device::i386_jo_rel32() // Opcode 0x0f 80
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_OF != 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -928,7 +928,7 @@ void i386_device::i386_jo_rel32() // Opcode 0x0f 80
void i386_device::i386_jp_rel32() // Opcode 0x0f 8a
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_PF != 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -940,7 +940,7 @@ void i386_device::i386_jp_rel32() // Opcode 0x0f 8a
void i386_device::i386_js_rel32() // Opcode 0x0f 88
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_SF != 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -952,7 +952,7 @@ void i386_device::i386_js_rel32() // Opcode 0x0f 88
void i386_device::i386_jz_rel32() // Opcode 0x0f 84
{
- INT32 disp = FETCH32();
+ int32_t disp = FETCH32();
if( m_ZF != 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -964,7 +964,7 @@ void i386_device::i386_jz_rel32() // Opcode 0x0f 84
void i386_device::i386_jcxz32() // Opcode 0xe3
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
int val = (m_address_size)?(REG32(ECX) == 0):(REG16(CX) == 0);
if( val ) {
m_eip += disp;
@@ -977,7 +977,7 @@ void i386_device::i386_jcxz32() // Opcode 0xe3
void i386_device::i386_jmp_rel32() // Opcode 0xe9
{
- UINT32 disp = FETCH32();
+ uint32_t disp = FETCH32();
/* TODO: Segment limit */
m_eip += disp;
CHANGE_PC(m_eip);
@@ -986,8 +986,8 @@ void i386_device::i386_jmp_rel32() // Opcode 0xe9
void i386_device::i386_jmp_abs32() // Opcode 0xea
{
- UINT32 address = FETCH32();
- UINT16 segment = FETCH16();
+ uint32_t address = FETCH32();
+ uint16_t segment = FETCH16();
if( PROTECTED_MODE && !V8086_MODE)
{
@@ -1006,8 +1006,8 @@ void i386_device::i386_jmp_abs32() // Opcode 0xea
void i386_device::i386_lea32() // Opcode 0x8d
{
- UINT8 modrm = FETCH();
- UINT32 ea = GetNonTranslatedEA(modrm,nullptr);
+ uint8_t modrm = FETCH();
+ uint32_t ea = GetNonTranslatedEA(modrm,nullptr);
if (!m_address_size)
{
ea &= 0xffff;
@@ -1018,10 +1018,10 @@ void i386_device::i386_lea32() // Opcode 0x8d
void i386_device::i386_enter32() // Opcode 0xc8
{
- UINT16 framesize = FETCH16();
- UINT8 level = FETCH() % 32;
- UINT8 x;
- UINT32 frameptr;
+ uint16_t framesize = FETCH16();
+ uint8_t level = FETCH() % 32;
+ uint8_t x;
+ uint32_t frameptr;
PUSH32(REG32(EBP));
if(!STACK_32BIT)
frameptr = REG16(SP);
@@ -1057,7 +1057,7 @@ void i386_device::i386_leave32() // Opcode 0xc9
void i386_device::i386_lodsd() // Opcode 0xad
{
- UINT32 eas;
+ uint32_t eas;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -1070,8 +1070,8 @@ void i386_device::i386_lodsd() // Opcode 0xad
void i386_device::i386_loop32() // Opcode 0xe2
{
- INT8 disp = FETCH();
- INT32 reg = (m_address_size)?--REG32(ECX):--REG16(CX);
+ int8_t disp = FETCH();
+ int32_t reg = (m_address_size)?--REG32(ECX):--REG16(CX);
if( reg != 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -1081,8 +1081,8 @@ void i386_device::i386_loop32() // Opcode 0xe2
void i386_device::i386_loopne32() // Opcode 0xe0
{
- INT8 disp = FETCH();
- INT32 reg = (m_address_size)?--REG32(ECX):--REG16(CX);
+ int8_t disp = FETCH();
+ int32_t reg = (m_address_size)?--REG32(ECX):--REG16(CX);
if( reg != 0 && m_ZF == 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -1092,8 +1092,8 @@ void i386_device::i386_loopne32() // Opcode 0xe0
void i386_device::i386_loopz32() // Opcode 0xe1
{
- INT8 disp = FETCH();
- INT32 reg = (m_address_size)?--REG32(ECX):--REG16(CX);
+ int8_t disp = FETCH();
+ int32_t reg = (m_address_size)?--REG32(ECX):--REG16(CX);
if( reg != 0 && m_ZF != 0 ) {
m_eip += disp;
CHANGE_PC(m_eip);
@@ -1103,14 +1103,14 @@ void i386_device::i386_loopz32() // Opcode 0xe1
void i386_device::i386_mov_rm32_r32() // Opcode 0x89
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
STORE_RM32(modrm, src);
CYCLES(CYCLES_MOV_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG32(modrm);
WRITE32(ea, src);
CYCLES(CYCLES_MOV_REG_MEM);
@@ -1119,14 +1119,14 @@ void i386_device::i386_mov_rm32_r32() // Opcode 0x89
void i386_device::i386_mov_r32_rm32() // Opcode 0x8b
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOV_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOV_MEM_REG);
@@ -1135,14 +1135,14 @@ void i386_device::i386_mov_r32_rm32() // Opcode 0x8b
void i386_device::i386_mov_rm32_i32() // Opcode 0xc7
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 value = FETCH32();
+ uint32_t value = FETCH32();
STORE_RM32(modrm, value);
CYCLES(CYCLES_MOV_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 value = FETCH32();
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t value = FETCH32();
WRITE32(ea, value);
CYCLES(CYCLES_MOV_IMM_MEM);
}
@@ -1150,7 +1150,7 @@ void i386_device::i386_mov_rm32_i32() // Opcode 0xc7
void i386_device::i386_mov_eax_m32() // Opcode 0xa1
{
- UINT32 offset, ea;
+ uint32_t offset, ea;
if( m_address_size ) {
offset = FETCH32();
} else {
@@ -1167,7 +1167,7 @@ void i386_device::i386_mov_eax_m32() // Opcode 0xa1
void i386_device::i386_mov_m32_eax() // Opcode 0xa3
{
- UINT32 offset, ea;
+ uint32_t offset, ea;
if( m_address_size ) {
offset = FETCH32();
} else {
@@ -1232,7 +1232,7 @@ void i386_device::i386_mov_edi_i32() // Opcode 0xbf
void i386_device::i386_movsd() // Opcode 0xa5
{
- UINT32 eas, ead, v;
+ uint32_t eas, ead, v;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -1248,14 +1248,14 @@ void i386_device::i386_movsd() // Opcode 0xa5
void i386_device::i386_movsx_r32_rm8() // Opcode 0x0f be
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- INT32 src = (INT8)LOAD_RM8(modrm);
+ int32_t src = (int8_t)LOAD_RM8(modrm);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOVSX_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- INT32 src = (INT8)READ8(ea);
+ uint32_t ea = GetEA(modrm,0);
+ int32_t src = (int8_t)READ8(ea);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOVSX_MEM_REG);
}
@@ -1263,14 +1263,14 @@ void i386_device::i386_movsx_r32_rm8() // Opcode 0x0f be
void i386_device::i386_movsx_r32_rm16() // Opcode 0x0f bf
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- INT32 src = (INT16)LOAD_RM16(modrm);
+ int32_t src = (int16_t)LOAD_RM16(modrm);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOVSX_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- INT32 src = (INT16)READ16(ea);
+ uint32_t ea = GetEA(modrm,0);
+ int32_t src = (int16_t)READ16(ea);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOVSX_MEM_REG);
}
@@ -1278,14 +1278,14 @@ void i386_device::i386_movsx_r32_rm16() // Opcode 0x0f bf
void i386_device::i386_movzx_r32_rm8() // Opcode 0x0f b6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 src = (UINT8)LOAD_RM8(modrm);
+ uint32_t src = (uint8_t)LOAD_RM8(modrm);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOVZX_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT32 src = (UINT8)READ8(ea);
+ uint32_t ea = GetEA(modrm,0);
+ uint32_t src = (uint8_t)READ8(ea);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOVZX_MEM_REG);
}
@@ -1293,14 +1293,14 @@ void i386_device::i386_movzx_r32_rm8() // Opcode 0x0f b6
void i386_device::i386_movzx_r32_rm16() // Opcode 0x0f b7
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 src = (UINT16)LOAD_RM16(modrm);
+ uint32_t src = (uint16_t)LOAD_RM16(modrm);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOVZX_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT32 src = (UINT16)READ16(ea);
+ uint32_t ea = GetEA(modrm,0);
+ uint32_t src = (uint16_t)READ16(ea);
STORE_REG32(modrm, src);
CYCLES(CYCLES_MOVZX_MEM_REG);
}
@@ -1308,8 +1308,8 @@ void i386_device::i386_movzx_r32_rm16() // Opcode 0x0f b7
void i386_device::i386_or_rm32_r32() // Opcode 0x09
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
@@ -1317,7 +1317,7 @@ void i386_device::i386_or_rm32_r32() // Opcode 0x09
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG32(modrm);
dst = READ32(ea);
dst = OR32(dst, src);
@@ -1328,8 +1328,8 @@ void i386_device::i386_or_rm32_r32() // Opcode 0x09
void i386_device::i386_or_r32_rm32() // Opcode 0x0b
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
dst = LOAD_REG32(modrm);
@@ -1337,7 +1337,7 @@ void i386_device::i386_or_r32_rm32() // Opcode 0x0b
STORE_REG32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
dst = LOAD_REG32(modrm);
dst = OR32(dst, src);
@@ -1348,7 +1348,7 @@ void i386_device::i386_or_r32_rm32() // Opcode 0x0b
void i386_device::i386_or_eax_i32() // Opcode 0x0d
{
- UINT32 src, dst;
+ uint32_t src, dst;
src = FETCH32();
dst = REG32(EAX);
dst = OR32(dst, src);
@@ -1358,23 +1358,23 @@ void i386_device::i386_or_eax_i32() // Opcode 0x0d
void i386_device::i386_out_eax_i8() // Opcode 0xe7
{
- UINT16 port = FETCH();
- UINT32 data = REG32(EAX);
+ uint16_t port = FETCH();
+ uint32_t data = REG32(EAX);
WRITEPORT32(port, data);
CYCLES(CYCLES_OUT_VAR);
}
void i386_device::i386_out_eax_dx() // Opcode 0xef
{
- UINT16 port = REG16(DX);
- UINT32 data = REG32(EAX);
+ uint16_t port = REG16(DX);
+ uint32_t data = REG32(EAX);
WRITEPORT32(port, data);
CYCLES(CYCLES_OUT);
}
void i386_device::i386_pop_eax() // Opcode 0x58
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
REG32(EAX) = POP32();
else
@@ -1384,7 +1384,7 @@ void i386_device::i386_pop_eax() // Opcode 0x58
void i386_device::i386_pop_ecx() // Opcode 0x59
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
REG32(ECX) = POP32();
else
@@ -1394,7 +1394,7 @@ void i386_device::i386_pop_ecx() // Opcode 0x59
void i386_device::i386_pop_edx() // Opcode 0x5a
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
REG32(EDX) = POP32();
else
@@ -1404,7 +1404,7 @@ void i386_device::i386_pop_edx() // Opcode 0x5a
void i386_device::i386_pop_ebx() // Opcode 0x5b
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
REG32(EBX) = POP32();
else
@@ -1414,7 +1414,7 @@ void i386_device::i386_pop_ebx() // Opcode 0x5b
void i386_device::i386_pop_esp() // Opcode 0x5c
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
REG32(ESP) = POP32();
else
@@ -1424,7 +1424,7 @@ void i386_device::i386_pop_esp() // Opcode 0x5c
void i386_device::i386_pop_ebp() // Opcode 0x5d
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
REG32(EBP) = POP32();
else
@@ -1434,7 +1434,7 @@ void i386_device::i386_pop_ebp() // Opcode 0x5d
void i386_device::i386_pop_esi() // Opcode 0x5e
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
REG32(ESI) = POP32();
else
@@ -1444,7 +1444,7 @@ void i386_device::i386_pop_esi() // Opcode 0x5e
void i386_device::i386_pop_edi() // Opcode 0x5f
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
REG32(EDI) = POP32();
else
@@ -1454,8 +1454,8 @@ void i386_device::i386_pop_edi() // Opcode 0x5f
bool i386_device::i386_pop_seg32(int segment)
{
- UINT32 ea, offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
- UINT32 value;
+ uint32_t ea, offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t value;
bool fault;
if(i386_limit_check(SS,offset+3) == 0)
{
@@ -1510,15 +1510,15 @@ void i386_device::i386_pop_ss32() // Opcode 0x17
void i386_device::i386_pop_rm32() // Opcode 0x8f
{
- UINT8 modrm = FETCH();
- UINT32 value;
- UINT32 ea, offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint8_t modrm = FETCH();
+ uint32_t value;
+ uint32_t ea, offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+3) == 0)
{
// be careful here, if the write references the esp register
// it expects the post-pop value but esp must be wound back
// if the write faults
- UINT32 temp_sp = REG32(ESP);
+ uint32_t temp_sp = REG32(ESP);
value = POP32();
if( modrm >= 0xc0 ) {
@@ -1529,7 +1529,7 @@ void i386_device::i386_pop_rm32() // Opcode 0x8f
{
WRITE32(ea, value);
}
- catch(UINT64 e)
+ catch(uint64_t e)
{
REG32(ESP) = temp_sp;
throw e;
@@ -1543,7 +1543,7 @@ void i386_device::i386_pop_rm32() // Opcode 0x8f
void i386_device::i386_popad() // Opcode 0x61
{
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(SS,offset+31) == 0)
{
REG32(EDI) = POP32();
@@ -1562,11 +1562,11 @@ void i386_device::i386_popad() // Opcode 0x61
void i386_device::i386_popfd() // Opcode 0x9d
{
- UINT32 value;
- UINT32 current = get_flags();
- UINT8 IOPL = (current >> 12) & 0x03;
- UINT32 mask = 0x00257fd5; // VM, VIP and VIF cannot be set by POPF/POPFD
- UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
+ uint32_t value;
+ uint32_t current = get_flags();
+ uint8_t IOPL = (current >> 12) & 0x03;
+ uint32_t mask = 0x00257fd5; // VM, VIP and VIF cannot be set by POPF/POPFD
+ uint32_t offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
// IOPL can only change if CPL is 0
if(m_CPL != 0)
@@ -1599,7 +1599,7 @@ void i386_device::i386_popfd() // Opcode 0x9d
void i386_device::i386_push_eax() // Opcode 0x50
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1613,7 +1613,7 @@ void i386_device::i386_push_eax() // Opcode 0x50
void i386_device::i386_push_ecx() // Opcode 0x51
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1627,7 +1627,7 @@ void i386_device::i386_push_ecx() // Opcode 0x51
void i386_device::i386_push_edx() // Opcode 0x52
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1641,7 +1641,7 @@ void i386_device::i386_push_edx() // Opcode 0x52
void i386_device::i386_push_ebx() // Opcode 0x53
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1655,7 +1655,7 @@ void i386_device::i386_push_ebx() // Opcode 0x53
void i386_device::i386_push_esp() // Opcode 0x54
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1669,7 +1669,7 @@ void i386_device::i386_push_esp() // Opcode 0x54
void i386_device::i386_push_ebp() // Opcode 0x55
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1683,7 +1683,7 @@ void i386_device::i386_push_ebp() // Opcode 0x55
void i386_device::i386_push_esi() // Opcode 0x56
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1697,7 +1697,7 @@ void i386_device::i386_push_esi() // Opcode 0x56
void i386_device::i386_push_edi() // Opcode 0x57
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1711,7 +1711,7 @@ void i386_device::i386_push_edi() // Opcode 0x57
void i386_device::i386_push_cs32() // Opcode 0x0e
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1725,7 +1725,7 @@ void i386_device::i386_push_cs32() // Opcode 0x0e
void i386_device::i386_push_ds32() // Opcode 0x1e
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1739,7 +1739,7 @@ void i386_device::i386_push_ds32() // Opcode 0x1e
void i386_device::i386_push_es32() // Opcode 0x06
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1753,7 +1753,7 @@ void i386_device::i386_push_es32() // Opcode 0x06
void i386_device::i386_push_fs32() // Opcode 0x0f a0
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1767,7 +1767,7 @@ void i386_device::i386_push_fs32() // Opcode 0x0f a0
void i386_device::i386_push_gs32() // Opcode 0x0f a8
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1781,7 +1781,7 @@ void i386_device::i386_push_gs32() // Opcode 0x0f a8
void i386_device::i386_push_ss32() // Opcode 0x16
{
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1795,8 +1795,8 @@ void i386_device::i386_push_ss32() // Opcode 0x16
void i386_device::i386_push_i32() // Opcode 0x68
{
- UINT32 value = FETCH32();
- UINT32 offset;
+ uint32_t value = FETCH32();
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1810,8 +1810,8 @@ void i386_device::i386_push_i32() // Opcode 0x68
void i386_device::i386_pushad() // Opcode 0x60
{
- UINT32 temp = REG32(ESP);
- UINT32 offset;
+ uint32_t temp = REG32(ESP);
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 32;
else
@@ -1836,7 +1836,7 @@ void i386_device::i386_pushfd() // Opcode 0x9c
{
if(!m_IOP1 && !m_IOP2 && V8086_MODE)
FAULT(FAULT_GP,0)
- UINT32 offset;
+ uint32_t offset;
if(STACK_32BIT)
offset = REG32(ESP) - 4;
else
@@ -1850,7 +1850,7 @@ void i386_device::i386_pushfd() // Opcode 0x9c
void i386_device::i386_ret_near32_i16() // Opcode 0xc2
{
- INT16 disp = FETCH16();
+ int16_t disp = FETCH16();
m_eip = POP32();
REG32(ESP) += disp;
CHANGE_PC(m_eip);
@@ -1866,8 +1866,8 @@ void i386_device::i386_ret_near32() // Opcode 0xc3
void i386_device::i386_sbb_rm32_r32() // Opcode 0x19
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
@@ -1875,7 +1875,7 @@ void i386_device::i386_sbb_rm32_r32() // Opcode 0x19
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG32(modrm);
dst = READ32(ea);
dst = SBB32(dst, src, m_CF);
@@ -1886,8 +1886,8 @@ void i386_device::i386_sbb_rm32_r32() // Opcode 0x19
void i386_device::i386_sbb_r32_rm32() // Opcode 0x1b
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
dst = LOAD_REG32(modrm);
@@ -1895,7 +1895,7 @@ void i386_device::i386_sbb_r32_rm32() // Opcode 0x1b
STORE_REG32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
dst = LOAD_REG32(modrm);
dst = SBB32(dst, src, m_CF);
@@ -1906,7 +1906,7 @@ void i386_device::i386_sbb_r32_rm32() // Opcode 0x1b
void i386_device::i386_sbb_eax_i32() // Opcode 0x1d
{
- UINT32 src, dst;
+ uint32_t src, dst;
src = FETCH32();
dst = REG32(EAX);
dst = SBB32(dst, src, m_CF);
@@ -1916,7 +1916,7 @@ void i386_device::i386_sbb_eax_i32() // Opcode 0x1d
void i386_device::i386_scasd() // Opcode 0xaf
{
- UINT32 eas, src, dst;
+ uint32_t eas, src, dst;
eas = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 0 );
src = READ32(eas);
dst = REG32(EAX);
@@ -1927,11 +1927,11 @@ void i386_device::i386_scasd() // Opcode 0xaf
void i386_device::i386_shld32_i8() // Opcode 0x0f a4
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 upper = LOAD_REG32(modrm);
- UINT8 shift = FETCH();
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t upper = LOAD_REG32(modrm);
+ uint8_t shift = FETCH();
shift &= 31;
if( shift == 0 ) {
} else {
@@ -1943,10 +1943,10 @@ void i386_device::i386_shld32_i8() // Opcode 0x0f a4
STORE_RM32(modrm, dst);
CYCLES(CYCLES_SHLD_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
- UINT32 upper = LOAD_REG32(modrm);
- UINT8 shift = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
+ uint32_t upper = LOAD_REG32(modrm);
+ uint8_t shift = FETCH();
shift &= 31;
if( shift == 0 ) {
} else {
@@ -1962,11 +1962,11 @@ void i386_device::i386_shld32_i8() // Opcode 0x0f a4
void i386_device::i386_shld32_cl() // Opcode 0x0f a5
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 upper = LOAD_REG32(modrm);
- UINT8 shift = REG8(CL);
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t upper = LOAD_REG32(modrm);
+ uint8_t shift = REG8(CL);
shift &= 31;
if( shift == 0 ) {
} else {
@@ -1978,10 +1978,10 @@ void i386_device::i386_shld32_cl() // Opcode 0x0f a5
STORE_RM32(modrm, dst);
CYCLES(CYCLES_SHLD_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
- UINT32 upper = LOAD_REG32(modrm);
- UINT8 shift = REG8(CL);
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
+ uint32_t upper = LOAD_REG32(modrm);
+ uint8_t shift = REG8(CL);
shift &= 31;
if( shift == 0 ) {
} else {
@@ -1997,11 +1997,11 @@ void i386_device::i386_shld32_cl() // Opcode 0x0f a5
void i386_device::i386_shrd32_i8() // Opcode 0x0f ac
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 upper = LOAD_REG32(modrm);
- UINT8 shift = FETCH();
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t upper = LOAD_REG32(modrm);
+ uint8_t shift = FETCH();
shift &= 31;
if( shift == 0 ) {
} else {
@@ -2013,10 +2013,10 @@ void i386_device::i386_shrd32_i8() // Opcode 0x0f ac
STORE_RM32(modrm, dst);
CYCLES(CYCLES_SHRD_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
- UINT32 upper = LOAD_REG32(modrm);
- UINT8 shift = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
+ uint32_t upper = LOAD_REG32(modrm);
+ uint8_t shift = FETCH();
shift &= 31;
if( shift == 0 ) {
} else {
@@ -2032,11 +2032,11 @@ void i386_device::i386_shrd32_i8() // Opcode 0x0f ac
void i386_device::i386_shrd32_cl() // Opcode 0x0f ad
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 upper = LOAD_REG32(modrm);
- UINT8 shift = REG8(CL);
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t upper = LOAD_REG32(modrm);
+ uint8_t shift = REG8(CL);
shift &= 31;
if( shift == 0 ) {
} else {
@@ -2048,10 +2048,10 @@ void i386_device::i386_shrd32_cl() // Opcode 0x0f ad
STORE_RM32(modrm, dst);
CYCLES(CYCLES_SHRD_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
- UINT32 upper = LOAD_REG32(modrm);
- UINT8 shift = REG8(CL);
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
+ uint32_t upper = LOAD_REG32(modrm);
+ uint8_t shift = REG8(CL);
shift &= 31;
if( shift == 0 ) {
} else {
@@ -2067,7 +2067,7 @@ void i386_device::i386_shrd32_cl() // Opcode 0x0f ad
void i386_device::i386_stosd() // Opcode 0xab
{
- UINT32 eas = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1 );
+ uint32_t eas = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1 );
WRITE32(eas, REG32(EAX));
BUMP_DI(4);
CYCLES(CYCLES_STOS);
@@ -2075,8 +2075,8 @@ void i386_device::i386_stosd() // Opcode 0xab
void i386_device::i386_sub_rm32_r32() // Opcode 0x29
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
@@ -2084,7 +2084,7 @@ void i386_device::i386_sub_rm32_r32() // Opcode 0x29
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG32(modrm);
dst = READ32(ea);
dst = SUB32(dst, src);
@@ -2095,8 +2095,8 @@ void i386_device::i386_sub_rm32_r32() // Opcode 0x29
void i386_device::i386_sub_r32_rm32() // Opcode 0x2b
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
dst = LOAD_REG32(modrm);
@@ -2104,7 +2104,7 @@ void i386_device::i386_sub_r32_rm32() // Opcode 0x2b
STORE_REG32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = READ32(ea);
dst = LOAD_REG32(modrm);
dst = SUB32(dst, src);
@@ -2115,7 +2115,7 @@ void i386_device::i386_sub_r32_rm32() // Opcode 0x2b
void i386_device::i386_sub_eax_i32() // Opcode 0x2d
{
- UINT32 src, dst;
+ uint32_t src, dst;
src = FETCH32();
dst = REG32(EAX);
dst = SUB32(dst, src);
@@ -2125,8 +2125,8 @@ void i386_device::i386_sub_eax_i32() // Opcode 0x2d
void i386_device::i386_test_eax_i32() // Opcode 0xa9
{
- UINT32 src = FETCH32();
- UINT32 dst = REG32(EAX);
+ uint32_t src = FETCH32();
+ uint32_t dst = REG32(EAX);
dst = src & dst;
SetSZPF32(dst);
m_CF = 0;
@@ -2136,8 +2136,8 @@ void i386_device::i386_test_eax_i32() // Opcode 0xa9
void i386_device::i386_test_rm32_r32() // Opcode 0x85
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
@@ -2147,7 +2147,7 @@ void i386_device::i386_test_rm32_r32() // Opcode 0x85
m_OF = 0;
CYCLES(CYCLES_TEST_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = LOAD_REG32(modrm);
dst = READ32(ea);
dst = src & dst;
@@ -2160,7 +2160,7 @@ void i386_device::i386_test_rm32_r32() // Opcode 0x85
void i386_device::i386_xchg_eax_ecx() // Opcode 0x91
{
- UINT32 temp;
+ uint32_t temp;
temp = REG32(EAX);
REG32(EAX) = REG32(ECX);
REG32(ECX) = temp;
@@ -2169,7 +2169,7 @@ void i386_device::i386_xchg_eax_ecx() // Opcode 0x91
void i386_device::i386_xchg_eax_edx() // Opcode 0x92
{
- UINT32 temp;
+ uint32_t temp;
temp = REG32(EAX);
REG32(EAX) = REG32(EDX);
REG32(EDX) = temp;
@@ -2178,7 +2178,7 @@ void i386_device::i386_xchg_eax_edx() // Opcode 0x92
void i386_device::i386_xchg_eax_ebx() // Opcode 0x93
{
- UINT32 temp;
+ uint32_t temp;
temp = REG32(EAX);
REG32(EAX) = REG32(EBX);
REG32(EBX) = temp;
@@ -2187,7 +2187,7 @@ void i386_device::i386_xchg_eax_ebx() // Opcode 0x93
void i386_device::i386_xchg_eax_esp() // Opcode 0x94
{
- UINT32 temp;
+ uint32_t temp;
temp = REG32(EAX);
REG32(EAX) = REG32(ESP);
REG32(ESP) = temp;
@@ -2196,7 +2196,7 @@ void i386_device::i386_xchg_eax_esp() // Opcode 0x94
void i386_device::i386_xchg_eax_ebp() // Opcode 0x95
{
- UINT32 temp;
+ uint32_t temp;
temp = REG32(EAX);
REG32(EAX) = REG32(EBP);
REG32(EBP) = temp;
@@ -2205,7 +2205,7 @@ void i386_device::i386_xchg_eax_ebp() // Opcode 0x95
void i386_device::i386_xchg_eax_esi() // Opcode 0x96
{
- UINT32 temp;
+ uint32_t temp;
temp = REG32(EAX);
REG32(EAX) = REG32(ESI);
REG32(ESI) = temp;
@@ -2214,7 +2214,7 @@ void i386_device::i386_xchg_eax_esi() // Opcode 0x96
void i386_device::i386_xchg_eax_edi() // Opcode 0x97
{
- UINT32 temp;
+ uint32_t temp;
temp = REG32(EAX);
REG32(EAX) = REG32(EDI);
REG32(EDI) = temp;
@@ -2223,17 +2223,17 @@ void i386_device::i386_xchg_eax_edi() // Opcode 0x97
void i386_device::i386_xchg_r32_rm32() // Opcode 0x87
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 src = LOAD_RM32(modrm);
- UINT32 dst = LOAD_REG32(modrm);
+ uint32_t src = LOAD_RM32(modrm);
+ uint32_t dst = LOAD_REG32(modrm);
STORE_REG32(modrm, src);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_XCHG_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 src = READ32(ea);
- UINT32 dst = LOAD_REG32(modrm);
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t src = READ32(ea);
+ uint32_t dst = LOAD_REG32(modrm);
WRITE32(ea, dst);
STORE_REG32(modrm, src);
CYCLES(CYCLES_XCHG_REG_MEM);
@@ -2242,8 +2242,8 @@ void i386_device::i386_xchg_r32_rm32() // Opcode 0x87
void i386_device::i386_xor_rm32_r32() // Opcode 0x31
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG32(modrm);
dst = LOAD_RM32(modrm);
@@ -2251,7 +2251,7 @@ void i386_device::i386_xor_rm32_r32() // Opcode 0x31
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG32(modrm);
dst = READ32(ea);
dst = XOR32(dst, src);
@@ -2262,8 +2262,8 @@ void i386_device::i386_xor_rm32_r32() // Opcode 0x31
void i386_device::i386_xor_r32_rm32() // Opcode 0x33
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
dst = LOAD_REG32(modrm);
@@ -2271,7 +2271,7 @@ void i386_device::i386_xor_r32_rm32() // Opcode 0x33
STORE_REG32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
dst = LOAD_REG32(modrm);
dst = XOR32(dst, src);
@@ -2282,7 +2282,7 @@ void i386_device::i386_xor_r32_rm32() // Opcode 0x33
void i386_device::i386_xor_eax_i32() // Opcode 0x35
{
- UINT32 src, dst;
+ uint32_t src, dst;
src = FETCH32();
dst = REG32(EAX);
dst = XOR32(dst, src);
@@ -2294,9 +2294,9 @@ void i386_device::i386_xor_eax_i32() // Opcode 0x35
void i386_device::i386_group81_32() // Opcode 0x81
{
- UINT32 ea;
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t ea;
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
@@ -2431,23 +2431,23 @@ void i386_device::i386_group81_32() // Opcode 0x81
void i386_device::i386_group83_32() // Opcode 0x83
{
- UINT32 ea;
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t ea;
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 0: // ADD Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = ADD32(dst, src);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ32(ea);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = ADD32(dst, src);
WRITE32(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2456,14 +2456,14 @@ void i386_device::i386_group83_32() // Opcode 0x83
case 1: // OR Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = OR32(dst, src);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ32(ea);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = OR32(dst, src);
WRITE32(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2472,14 +2472,14 @@ void i386_device::i386_group83_32() // Opcode 0x83
case 2: // ADC Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = ADC32(dst, src, m_CF);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ32(ea);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = ADC32(dst, src, m_CF);
WRITE32(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2488,14 +2488,14 @@ void i386_device::i386_group83_32() // Opcode 0x83
case 3: // SBB Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
- src = ((UINT32)(INT32)(INT8)FETCH());
+ src = ((uint32_t)(int32_t)(int8_t)FETCH());
dst = SBB32(dst, src, m_CF);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ32(ea);
- src = ((UINT32)(INT32)(INT8)FETCH());
+ src = ((uint32_t)(int32_t)(int8_t)FETCH());
dst = SBB32(dst, src, m_CF);
WRITE32(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2504,14 +2504,14 @@ void i386_device::i386_group83_32() // Opcode 0x83
case 4: // AND Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = AND32(dst, src);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ32(ea);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = AND32(dst, src);
WRITE32(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2520,14 +2520,14 @@ void i386_device::i386_group83_32() // Opcode 0x83
case 5: // SUB Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = SUB32(dst, src);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ32(ea);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = SUB32(dst, src);
WRITE32(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2536,14 +2536,14 @@ void i386_device::i386_group83_32() // Opcode 0x83
case 6: // XOR Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = XOR32(dst, src);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
ea = GetEA(modrm,1);
dst = READ32(ea);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
dst = XOR32(dst, src);
WRITE32(ea, dst);
CYCLES(CYCLES_ALU_REG_MEM);
@@ -2552,13 +2552,13 @@ void i386_device::i386_group83_32() // Opcode 0x83
case 7: // CMP Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
SUB32(dst, src);
CYCLES(CYCLES_CMP_REG_REG);
} else {
ea = GetEA(modrm,0);
dst = READ32(ea);
- src = (UINT32)(INT32)(INT8)FETCH();
+ src = (uint32_t)(int32_t)(int8_t)FETCH();
SUB32(dst, src);
CYCLES(CYCLES_CMP_REG_MEM);
}
@@ -2568,9 +2568,9 @@ void i386_device::i386_group83_32() // Opcode 0x83
void i386_device::i386_groupC1_32() // Opcode 0xc1
{
- UINT32 dst;
- UINT8 modrm = FETCH();
- UINT8 shift;
+ uint32_t dst;
+ uint8_t modrm = FETCH();
+ uint8_t shift;
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
@@ -2578,7 +2578,7 @@ void i386_device::i386_groupC1_32() // Opcode 0xc1
dst = i386_shift_rotate32(modrm, dst, shift);
STORE_RM32(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ32(ea);
shift = FETCH() & 0x1f;
dst = i386_shift_rotate32(modrm, dst, shift);
@@ -2588,15 +2588,15 @@ void i386_device::i386_groupC1_32() // Opcode 0xc1
void i386_device::i386_groupD1_32() // Opcode 0xd1
{
- UINT32 dst;
- UINT8 modrm = FETCH();
+ uint32_t dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
dst = i386_shift_rotate32(modrm, dst, 1);
STORE_RM32(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ32(ea);
dst = i386_shift_rotate32(modrm, dst, 1);
WRITE32(ea, dst);
@@ -2605,15 +2605,15 @@ void i386_device::i386_groupD1_32() // Opcode 0xd1
void i386_device::i386_groupD3_32() // Opcode 0xd3
{
- UINT32 dst;
- UINT8 modrm = FETCH();
+ uint32_t dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
dst = i386_shift_rotate32(modrm, dst, REG8(CL));
STORE_RM32(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ32(ea);
dst = i386_shift_rotate32(modrm, dst, REG8(CL));
WRITE32(ea, dst);
@@ -2622,22 +2622,22 @@ void i386_device::i386_groupD3_32() // Opcode 0xd3
void i386_device::i386_groupF7_32() // Opcode 0xf7
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 0: /* TEST Rm32, i32 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 src = FETCH32();
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t src = FETCH32();
dst &= src;
m_CF = m_OF = m_AF = 0;
SetSZPF32(dst);
CYCLES(CYCLES_TEST_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT32 dst = READ32(ea);
- UINT32 src = FETCH32();
+ uint32_t ea = GetEA(modrm,0);
+ uint32_t dst = READ32(ea);
+ uint32_t src = FETCH32();
dst &= src;
m_CF = m_OF = m_AF = 0;
SetSZPF32(dst);
@@ -2646,13 +2646,13 @@ void i386_device::i386_groupF7_32() // Opcode 0xf7
break;
case 2: /* NOT Rm32 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
dst = ~dst;
STORE_RM32(modrm, dst);
CYCLES(CYCLES_NOT_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
dst = ~dst;
WRITE32(ea, dst);
CYCLES(CYCLES_NOT_MEM);
@@ -2660,13 +2660,13 @@ void i386_device::i386_groupF7_32() // Opcode 0xf7
break;
case 3: /* NEG Rm32 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
dst = SUB32(0, dst );
STORE_RM32(modrm, dst);
CYCLES(CYCLES_NEG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
dst = SUB32(0, dst );
WRITE32(ea, dst);
CYCLES(CYCLES_NEG_MEM);
@@ -2674,69 +2674,69 @@ void i386_device::i386_groupF7_32() // Opcode 0xf7
break;
case 4: /* MUL EAX, Rm32 */
{
- UINT64 result;
- UINT32 src, dst;
+ uint64_t result;
+ uint32_t src, dst;
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
CYCLES(CYCLES_MUL32_ACC_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
CYCLES(CYCLES_MUL32_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = REG32(EAX);
- result = (UINT64)src * (UINT64)dst;
- REG32(EDX) = (UINT32)(result >> 32);
- REG32(EAX) = (UINT32)result;
+ result = (uint64_t)src * (uint64_t)dst;
+ REG32(EDX) = (uint32_t)(result >> 32);
+ REG32(EAX) = (uint32_t)result;
m_CF = m_OF = (REG32(EDX) != 0);
}
break;
case 5: /* IMUL EAX, Rm32 */
{
- INT64 result;
- INT64 src, dst;
+ int64_t result;
+ int64_t src, dst;
if( modrm >= 0xc0 ) {
- src = (INT64)(INT32)LOAD_RM32(modrm);
+ src = (int64_t)(int32_t)LOAD_RM32(modrm);
CYCLES(CYCLES_IMUL32_ACC_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- src = (INT64)(INT32)READ32(ea);
+ uint32_t ea = GetEA(modrm,0);
+ src = (int64_t)(int32_t)READ32(ea);
CYCLES(CYCLES_IMUL32_ACC_MEM); /* TODO: Correct multiply timing */
}
- dst = (INT64)(INT32)REG32(EAX);
+ dst = (int64_t)(int32_t)REG32(EAX);
result = src * dst;
- REG32(EDX) = (UINT32)(result >> 32);
- REG32(EAX) = (UINT32)result;
+ REG32(EDX) = (uint32_t)(result >> 32);
+ REG32(EAX) = (uint32_t)result;
- m_CF = m_OF = !(result == (INT64)(INT32)result);
+ m_CF = m_OF = !(result == (int64_t)(int32_t)result);
}
break;
case 6: /* DIV EAX, Rm32 */
{
- UINT64 quotient, remainder, result;
- UINT32 src;
+ uint64_t quotient, remainder, result;
+ uint32_t src;
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
CYCLES(CYCLES_DIV32_ACC_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
CYCLES(CYCLES_DIV32_ACC_MEM);
}
- quotient = ((UINT64)(REG32(EDX)) << 32) | (UINT64)(REG32(EAX));
+ quotient = ((uint64_t)(REG32(EDX)) << 32) | (uint64_t)(REG32(EAX));
if( src ) {
- remainder = quotient % (UINT64)src;
- result = quotient / (UINT64)src;
+ remainder = quotient % (uint64_t)src;
+ result = quotient / (uint64_t)src;
if( result > 0xffffffff ) {
/* TODO: Divide error */
} else {
- REG32(EDX) = (UINT32)remainder;
- REG32(EAX) = (UINT32)result;
+ REG32(EDX) = (uint32_t)remainder;
+ REG32(EAX) = (uint32_t)result;
}
} else {
i386_trap(0, 0, 0);
@@ -2745,26 +2745,26 @@ void i386_device::i386_groupF7_32() // Opcode 0xf7
break;
case 7: /* IDIV EAX, Rm32 */
{
- INT64 quotient, remainder, result;
- UINT32 src;
+ int64_t quotient, remainder, result;
+ uint32_t src;
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
CYCLES(CYCLES_IDIV32_ACC_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
CYCLES(CYCLES_IDIV32_ACC_MEM);
}
- quotient = (((INT64)REG32(EDX)) << 32) | ((UINT64)REG32(EAX));
+ quotient = (((int64_t)REG32(EDX)) << 32) | ((uint64_t)REG32(EAX));
if( src ) {
- remainder = quotient % (INT64)(INT32)src;
- result = quotient / (INT64)(INT32)src;
+ remainder = quotient % (int64_t)(int32_t)src;
+ result = quotient / (int64_t)(int32_t)src;
if( result > 0xffffffff ) {
/* TODO: Divide error */
} else {
- REG32(EDX) = (UINT32)remainder;
- REG32(EAX) = (UINT32)result;
+ REG32(EDX) = (uint32_t)remainder;
+ REG32(EAX) = (uint32_t)result;
}
} else {
i386_trap(0, 0, 0);
@@ -2776,19 +2776,19 @@ void i386_device::i386_groupF7_32() // Opcode 0xf7
void i386_device::i386_groupFF_32() // Opcode 0xff
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 0: /* INC Rm32 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
dst = INC32(dst);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_INC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
dst = INC32(dst);
WRITE32(ea, dst);
CYCLES(CYCLES_INC_MEM);
@@ -2796,13 +2796,13 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
break;
case 1: /* DEC Rm32 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
dst = DEC32(dst);
STORE_RM32(modrm, dst);
CYCLES(CYCLES_DEC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
dst = DEC32(dst);
WRITE32(ea, dst);
CYCLES(CYCLES_DEC_MEM);
@@ -2810,12 +2810,12 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
break;
case 2: /* CALL Rm32 */
{
- UINT32 address;
+ uint32_t address;
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
CYCLES(CYCLES_CALL_REG); /* TODO: Timing = 7 + m */
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
address = READ32(ea);
CYCLES(CYCLES_CALL_MEM); /* TODO: Timing = 10 + m */
}
@@ -2826,8 +2826,8 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
break;
case 3: /* CALL FAR Rm32 */
{
- UINT16 selector;
- UINT32 address;
+ uint16_t selector;
+ uint32_t address;
if( modrm >= 0xc0 )
{
@@ -2835,7 +2835,7 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
address = READ32(ea + 0);
selector = READ16(ea + 4);
CYCLES(CYCLES_CALL_MEM_INTERSEG); /* TODO: Timing = 10 + m */
@@ -2858,12 +2858,12 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
break;
case 4: /* JMP Rm32 */
{
- UINT32 address;
+ uint32_t address;
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
CYCLES(CYCLES_JMP_REG); /* TODO: Timing = 7 + m */
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
address = READ32(ea);
CYCLES(CYCLES_JMP_MEM); /* TODO: Timing = 10 + m */
}
@@ -2873,8 +2873,8 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
break;
case 5: /* JMP FAR Rm32 */
{
- UINT16 selector;
- UINT32 address;
+ uint16_t selector;
+ uint32_t address;
if( modrm >= 0xc0 )
{
@@ -2882,7 +2882,7 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
address = READ32(ea + 0);
selector = READ16(ea + 4);
CYCLES(CYCLES_JMP_MEM_INTERSEG); /* TODO: Timing = 10 + m */
@@ -2903,11 +2903,11 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
break;
case 6: /* PUSH Rm32 */
{
- UINT32 value;
+ uint32_t value;
if( modrm >= 0xc0 ) {
value = LOAD_RM32(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
value = READ32(ea);
}
PUSH32(value);
@@ -2922,10 +2922,10 @@ void i386_device::i386_groupFF_32() // Opcode 0xff
void i386_device::i386_group0F00_32() // Opcode 0x0f 00
{
- UINT32 address, ea;
- UINT8 modrm = FETCH();
+ uint32_t address, ea;
+ uint8_t modrm = FETCH();
I386_SREG seg;
- UINT8 result;
+ uint8_t result;
switch( (modrm >> 3) & 0x7 )
{
@@ -3008,7 +3008,7 @@ void i386_device::i386_group0F00_32() // Opcode 0x0f 00
seg.selector = m_task.segment;
i386_load_protected_mode_segment(&seg,nullptr);
- UINT32 addr = ((seg.selector & 4) ? m_ldtr.base : m_gdtr.base) + (seg.selector & ~7) + 5;
+ uint32_t addr = ((seg.selector & 4) ? m_ldtr.base : m_gdtr.base) + (seg.selector & ~7) + 5;
i386_translate_address(TRANSLATE_READ, &addr, nullptr);
m_program->write_byte(addr, (seg.flags & 0xff) | 2);
@@ -3119,8 +3119,8 @@ void i386_device::i386_group0F00_32() // Opcode 0x0f 00
void i386_device::i386_group0F01_32() // Opcode 0x0f 01
{
- UINT8 modrm = FETCH();
- UINT32 address, ea;
+ uint8_t modrm = FETCH();
+ uint32_t address, ea;
switch( (modrm >> 3) & 0x7 )
{
@@ -3201,7 +3201,7 @@ void i386_device::i386_group0F01_32() // Opcode 0x0f 01
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP,0)
- UINT16 b;
+ uint16_t b;
if( modrm >= 0xc0 ) {
b = LOAD_RM16(modrm);
CYCLES(CYCLES_LMSW_REG);
@@ -3224,14 +3224,14 @@ void i386_device::i386_group0F01_32() // Opcode 0x0f 01
void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 4: /* BT Rm32, i8 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT8 bit = FETCH();
+ uint32_t dst = LOAD_RM32(modrm);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3240,9 +3240,9 @@ void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
CYCLES(CYCLES_BT_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT32 dst = READ32(ea);
- UINT8 bit = FETCH();
+ uint32_t ea = GetEA(modrm,0);
+ uint32_t dst = READ32(ea);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3254,8 +3254,8 @@ void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
break;
case 5: /* BTS Rm32, i8 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT8 bit = FETCH();
+ uint32_t dst = LOAD_RM32(modrm);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3266,9 +3266,9 @@ void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
STORE_RM32(modrm, dst);
CYCLES(CYCLES_BTS_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
- UINT8 bit = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3282,8 +3282,8 @@ void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
break;
case 6: /* BTR Rm32, i8 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT8 bit = FETCH();
+ uint32_t dst = LOAD_RM32(modrm);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3294,9 +3294,9 @@ void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
STORE_RM32(modrm, dst);
CYCLES(CYCLES_BTR_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
- UINT8 bit = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3310,8 +3310,8 @@ void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
break;
case 7: /* BTC Rm32, i8 */
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT8 bit = FETCH();
+ uint32_t dst = LOAD_RM32(modrm);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3322,9 +3322,9 @@ void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
STORE_RM32(modrm, dst);
CYCLES(CYCLES_BTC_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
- UINT8 bit = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
+ uint8_t bit = FETCH();
if( dst & (1 << bit) )
m_CF = 1;
@@ -3344,9 +3344,9 @@ void i386_device::i386_group0FBA_32() // Opcode 0x0f ba
void i386_device::i386_lar_r32_rm32() // Opcode 0x0f 0x02
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
I386_SREG seg;
- UINT8 type;
+ uint8_t type;
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -3358,7 +3358,7 @@ void i386_device::i386_lar_r32_rm32() // Opcode 0x0f 0x02
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
seg.selector = READ32(ea);
CYCLES(CYCLES_LAR_MEM);
}
@@ -3368,13 +3368,13 @@ void i386_device::i386_lar_r32_rm32() // Opcode 0x0f 0x02
}
else
{
- UINT64 desc;
+ uint64_t desc;
if(!i386_load_protected_mode_segment(&seg,&desc))
{
SetZF(0);
return;
}
- UINT8 DPL = (seg.flags >> 5) & 3;
+ uint8_t DPL = (seg.flags >> 5) & 3;
if(((DPL < m_CPL) || (DPL < (seg.selector & 3))) && ((seg.flags & 0x1c) != 0x1c))
{
SetZF(0);
@@ -3411,8 +3411,8 @@ void i386_device::i386_lar_r32_rm32() // Opcode 0x0f 0x02
void i386_device::i386_lsl_r32_rm32() // Opcode 0x0f 0x03
{
- UINT8 modrm = FETCH();
- UINT32 limit;
+ uint8_t modrm = FETCH();
+ uint32_t limit;
I386_SREG seg;
if(PROTECTED_MODE && !V8086_MODE)
@@ -3424,7 +3424,7 @@ void i386_device::i386_lsl_r32_rm32() // Opcode 0x0f 0x03
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
seg.selector = READ32(ea);
}
if(seg.selector == 0)
@@ -3433,13 +3433,13 @@ void i386_device::i386_lsl_r32_rm32() // Opcode 0x0f 0x03
}
else
{
- UINT8 type;
+ uint8_t type;
if(!i386_load_protected_mode_segment(&seg,nullptr))
{
SetZF(0);
return;
}
- UINT8 DPL = (seg.flags >> 5) & 3;
+ uint8_t DPL = (seg.flags >> 5) & 3;
if(((DPL < m_CPL) || (DPL < (seg.selector & 3))) && ((seg.flags & 0x1c) != 0x1c))
{
SetZF(0);
@@ -3474,8 +3474,8 @@ void i386_device::i386_lsl_r32_rm32() // Opcode 0x0f 0x03
void i386_device::i386_bound_r32_m32_m32() // Opcode 0x62
{
- UINT8 modrm;
- INT32 val, low, high;
+ uint8_t modrm;
+ int32_t val, low, high;
modrm = FETCH();
@@ -3485,7 +3485,7 @@ void i386_device::i386_bound_r32_m32_m32() // Opcode 0x62
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
low = READ32(ea + 0);
high = READ32(ea + 4);
}
@@ -3521,7 +3521,7 @@ void i386_device::i386_retf32() // Opcode 0xcb
void i386_device::i386_retf_i32() // Opcode 0xca
{
- UINT16 count = FETCH16();
+ uint16_t count = FETCH16();
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -3541,13 +3541,13 @@ void i386_device::i386_retf_i32() // Opcode 0xca
void i386_device::i386_load_far_pointer32(int s)
{
- UINT8 modrm = FETCH();
- UINT16 selector;
+ uint8_t modrm = FETCH();
+ uint16_t selector;
if( modrm >= 0xc0 ) {
report_invalid_modrm("load_far_pointer32", modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
STORE_REG32(modrm, READ32(ea + 0));
selector = READ16(ea + 4);
i386_sreg_load(selector,s,nullptr);
diff --git a/src/devices/cpu/i386/i386ops.hxx b/src/devices/cpu/i386/i386ops.hxx
index 2f13445c8be..e27bb4a13bc 100644
--- a/src/devices/cpu/i386/i386ops.hxx
+++ b/src/devices/cpu/i386/i386ops.hxx
@@ -1,9 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde, Barry Rodewald, Carl, Philip Bennett
-UINT8 i386_device::i386_shift_rotate8(UINT8 modrm, UINT32 value, UINT8 shift)
+uint8_t i386_device::i386_shift_rotate8(uint8_t modrm, uint32_t value, uint8_t shift)
{
- UINT32 src = value & 0xff;
- UINT8 dst = value;
+ uint32_t src = value & 0xff;
+ uint8_t dst = value;
if( shift == 0 ) {
CYCLES_RM(modrm, 3, 7);
@@ -50,7 +50,7 @@ UINT8 i386_device::i386_shift_rotate8(UINT8 modrm, UINT32 value, UINT8 shift)
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 7: /* SAR rm8, 1 */
- dst = (INT8)(src) >> 1;
+ dst = (int8_t)(src) >> 1;
m_CF = src & 0x1;
m_OF = 0;
SetSZPF8(dst);
@@ -72,8 +72,8 @@ UINT8 i386_device::i386_shift_rotate8(UINT8 modrm, UINT32 value, UINT8 shift)
break;
}
shift &= 7;
- dst = ((src & ((UINT8)0xff >> shift)) << shift) |
- ((src & ((UINT8)0xff << (8-shift))) >> (8-shift));
+ dst = ((src & ((uint8_t)0xff >> shift)) << shift) |
+ ((src & ((uint8_t)0xff << (8-shift))) >> (8-shift));
m_CF = dst & 0x1;
m_OF = (dst & 1) ^ (dst >> 7);
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
@@ -89,16 +89,16 @@ UINT8 i386_device::i386_shift_rotate8(UINT8 modrm, UINT32 value, UINT8 shift)
break;
}
shift &= 7;
- dst = ((src & ((UINT8)0xff << shift)) >> shift) |
- ((src & ((UINT8)0xff >> (8-shift))) << (8-shift));
+ dst = ((src & ((uint8_t)0xff << shift)) >> shift) |
+ ((src & ((uint8_t)0xff >> (8-shift))) << (8-shift));
m_CF = (dst >> 7) & 1;
m_OF = ((dst >> 7) ^ (dst >> 6)) & 1;
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
case 2: /* RCL rm8, i8 */
shift %= 9;
- dst = ((src & ((UINT8)0xff >> shift)) << shift) |
- ((src & ((UINT8)0xff << (9-shift))) >> (9-shift)) |
+ dst = ((src & ((uint8_t)0xff >> shift)) << shift) |
+ ((src & ((uint8_t)0xff << (9-shift))) >> (9-shift)) |
(m_CF << (shift-1));
if(shift) m_CF = (src >> (8-shift)) & 0x1;
m_OF = m_CF ^ ((dst >> 7) & 1);
@@ -106,8 +106,8 @@ UINT8 i386_device::i386_shift_rotate8(UINT8 modrm, UINT32 value, UINT8 shift)
break;
case 3: /* RCR rm8, i8 */
shift %= 9;
- dst = ((src & ((UINT8)0xff << shift)) >> shift) |
- ((src & ((UINT8)0xff >> (8-shift))) << (9-shift)) |
+ dst = ((src & ((uint8_t)0xff << shift)) >> shift) |
+ ((src & ((uint8_t)0xff >> (8-shift))) << (9-shift)) |
(m_CF << (8-shift));
if(shift) m_CF = (src >> (shift-1)) & 0x1;
m_OF = ((dst >> 7) ^ (dst >> 6)) & 1;
@@ -130,7 +130,7 @@ UINT8 i386_device::i386_shift_rotate8(UINT8 modrm, UINT32 value, UINT8 shift)
break;
case 7: /* SAR rm8, i8 */
shift &= 31;
- dst = (INT8)src >> shift;
+ dst = (int8_t)src >> shift;
m_CF = (src & (1 << (shift-1))) ? 1 : 0;
SetSZPF8(dst);
CYCLES_RM(modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
@@ -145,8 +145,8 @@ UINT8 i386_device::i386_shift_rotate8(UINT8 modrm, UINT32 value, UINT8 shift)
void i386_device::i386_adc_rm8_r8() // Opcode 0x10
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
@@ -154,7 +154,7 @@ void i386_device::i386_adc_rm8_r8() // Opcode 0x10
STORE_RM8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG8(modrm);
dst = READ8(ea);
dst = ADC8(dst, src, m_CF);
@@ -165,8 +165,8 @@ void i386_device::i386_adc_rm8_r8() // Opcode 0x10
void i386_device::i386_adc_r8_rm8() // Opcode 0x12
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
dst = LOAD_REG8(modrm);
@@ -174,7 +174,7 @@ void i386_device::i386_adc_r8_rm8() // Opcode 0x12
STORE_REG8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
dst = LOAD_REG8(modrm);
dst = ADC8(dst, src, m_CF);
@@ -185,7 +185,7 @@ void i386_device::i386_adc_r8_rm8() // Opcode 0x12
void i386_device::i386_adc_al_i8() // Opcode 0x14
{
- UINT8 src, dst;
+ uint8_t src, dst;
src = FETCH();
dst = REG8(AL);
dst = ADC8(dst, src, m_CF);
@@ -195,8 +195,8 @@ void i386_device::i386_adc_al_i8() // Opcode 0x14
void i386_device::i386_add_rm8_r8() // Opcode 0x00
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
@@ -204,7 +204,7 @@ void i386_device::i386_add_rm8_r8() // Opcode 0x00
STORE_RM8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG8(modrm);
dst = READ8(ea);
dst = ADD8(dst, src);
@@ -215,8 +215,8 @@ void i386_device::i386_add_rm8_r8() // Opcode 0x00
void i386_device::i386_add_r8_rm8() // Opcode 0x02
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
dst = LOAD_REG8(modrm);
@@ -224,7 +224,7 @@ void i386_device::i386_add_r8_rm8() // Opcode 0x02
STORE_REG8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
dst = LOAD_REG8(modrm);
dst = ADD8(dst, src);
@@ -235,7 +235,7 @@ void i386_device::i386_add_r8_rm8() // Opcode 0x02
void i386_device::i386_add_al_i8() // Opcode 0x04
{
- UINT8 src, dst;
+ uint8_t src, dst;
src = FETCH();
dst = REG8(AL);
dst = ADD8(dst, src);
@@ -245,8 +245,8 @@ void i386_device::i386_add_al_i8() // Opcode 0x04
void i386_device::i386_and_rm8_r8() // Opcode 0x20
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
@@ -254,7 +254,7 @@ void i386_device::i386_and_rm8_r8() // Opcode 0x20
STORE_RM8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG8(modrm);
dst = READ8(ea);
dst = AND8(dst, src);
@@ -265,8 +265,8 @@ void i386_device::i386_and_rm8_r8() // Opcode 0x20
void i386_device::i386_and_r8_rm8() // Opcode 0x22
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
dst = LOAD_REG8(modrm);
@@ -274,7 +274,7 @@ void i386_device::i386_and_r8_rm8() // Opcode 0x22
STORE_REG8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
dst = LOAD_REG8(modrm);
dst = AND8(dst, src);
@@ -285,7 +285,7 @@ void i386_device::i386_and_r8_rm8() // Opcode 0x22
void i386_device::i386_and_al_i8() // Opcode 0x24
{
- UINT8 src, dst;
+ uint8_t src, dst;
src = FETCH();
dst = REG8(AL);
dst = AND8(dst, src);
@@ -309,7 +309,7 @@ void i386_device::i386_cli() // Opcode 0xfa
{
if(PROTECTED_MODE)
{
- UINT8 IOPL = m_IOP1 | (m_IOP2 << 1);
+ uint8_t IOPL = m_IOP1 | (m_IOP2 << 1);
if(m_CPL > IOPL)
FAULT(FAULT_GP,0);
}
@@ -325,15 +325,15 @@ void i386_device::i386_cmc() // Opcode 0xf5
void i386_device::i386_cmp_rm8_r8() // Opcode 0x38
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
SUB8(dst, src);
CYCLES(CYCLES_CMP_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = LOAD_REG8(modrm);
dst = READ8(ea);
SUB8(dst, src);
@@ -343,15 +343,15 @@ void i386_device::i386_cmp_rm8_r8() // Opcode 0x38
void i386_device::i386_cmp_r8_rm8() // Opcode 0x3a
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
dst = LOAD_REG8(modrm);
SUB8(dst, src);
CYCLES(CYCLES_CMP_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
dst = LOAD_REG8(modrm);
SUB8(dst, src);
@@ -361,7 +361,7 @@ void i386_device::i386_cmp_r8_rm8() // Opcode 0x3a
void i386_device::i386_cmp_al_i8() // Opcode 0x3c
{
- UINT8 src, dst;
+ uint8_t src, dst;
src = FETCH();
dst = REG8(AL);
SUB8(dst, src);
@@ -370,8 +370,8 @@ void i386_device::i386_cmp_al_i8() // Opcode 0x3c
void i386_device::i386_cmpsb() // Opcode 0xa6
{
- UINT32 eas, ead;
- UINT8 src, dst;
+ uint32_t eas, ead;
+ uint8_t src, dst;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -388,23 +388,23 @@ void i386_device::i386_cmpsb() // Opcode 0xa6
void i386_device::i386_in_al_i8() // Opcode 0xe4
{
- UINT16 port = FETCH();
- UINT8 data = READPORT8(port);
+ uint16_t port = FETCH();
+ uint8_t data = READPORT8(port);
REG8(AL) = data;
CYCLES(CYCLES_IN_VAR);
}
void i386_device::i386_in_al_dx() // Opcode 0xec
{
- UINT16 port = REG16(DX);
- UINT8 data = READPORT8(port);
+ uint16_t port = REG16(DX);
+ uint8_t data = READPORT8(port);
REG8(AL) = data;
CYCLES(CYCLES_IN);
}
void i386_device::i386_ja_rel8() // Opcode 0x77
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_CF == 0 && m_ZF == 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -415,7 +415,7 @@ void i386_device::i386_ja_rel8() // Opcode 0x77
void i386_device::i386_jbe_rel8() // Opcode 0x76
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_CF != 0 || m_ZF != 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -426,7 +426,7 @@ void i386_device::i386_jbe_rel8() // Opcode 0x76
void i386_device::i386_jc_rel8() // Opcode 0x72
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_CF != 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -437,7 +437,7 @@ void i386_device::i386_jc_rel8() // Opcode 0x72
void i386_device::i386_jg_rel8() // Opcode 0x7f
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_ZF == 0 && (m_SF == m_OF) ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -448,7 +448,7 @@ void i386_device::i386_jg_rel8() // Opcode 0x7f
void i386_device::i386_jge_rel8() // Opcode 0x7d
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if(m_SF == m_OF) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -459,7 +459,7 @@ void i386_device::i386_jge_rel8() // Opcode 0x7d
void i386_device::i386_jl_rel8() // Opcode 0x7c
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( (m_SF != m_OF) ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -470,7 +470,7 @@ void i386_device::i386_jl_rel8() // Opcode 0x7c
void i386_device::i386_jle_rel8() // Opcode 0x7e
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_ZF != 0 || (m_SF != m_OF) ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -481,7 +481,7 @@ void i386_device::i386_jle_rel8() // Opcode 0x7e
void i386_device::i386_jnc_rel8() // Opcode 0x73
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_CF == 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -492,7 +492,7 @@ void i386_device::i386_jnc_rel8() // Opcode 0x73
void i386_device::i386_jno_rel8() // Opcode 0x71
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_OF == 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -503,7 +503,7 @@ void i386_device::i386_jno_rel8() // Opcode 0x71
void i386_device::i386_jnp_rel8() // Opcode 0x7b
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_PF == 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -514,7 +514,7 @@ void i386_device::i386_jnp_rel8() // Opcode 0x7b
void i386_device::i386_jns_rel8() // Opcode 0x79
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_SF == 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -525,7 +525,7 @@ void i386_device::i386_jns_rel8() // Opcode 0x79
void i386_device::i386_jnz_rel8() // Opcode 0x75
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_ZF == 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -536,7 +536,7 @@ void i386_device::i386_jnz_rel8() // Opcode 0x75
void i386_device::i386_jo_rel8() // Opcode 0x70
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_OF != 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -547,7 +547,7 @@ void i386_device::i386_jo_rel8() // Opcode 0x70
void i386_device::i386_jp_rel8() // Opcode 0x7a
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_PF != 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -558,7 +558,7 @@ void i386_device::i386_jp_rel8() // Opcode 0x7a
void i386_device::i386_js_rel8() // Opcode 0x78
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_SF != 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -569,7 +569,7 @@ void i386_device::i386_js_rel8() // Opcode 0x78
void i386_device::i386_jz_rel8() // Opcode 0x74
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
if( m_ZF != 0 ) {
NEAR_BRANCH(disp);
CYCLES(CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
@@ -580,7 +580,7 @@ void i386_device::i386_jz_rel8() // Opcode 0x74
void i386_device::i386_jmp_rel8() // Opcode 0xeb
{
- INT8 disp = FETCH();
+ int8_t disp = FETCH();
NEAR_BRANCH(disp);
CYCLES(CYCLES_JMP_SHORT); /* TODO: Timing = 7 + m */
}
@@ -593,7 +593,7 @@ void i386_device::i386_lahf() // Opcode 0x9f
void i386_device::i386_lodsb() // Opcode 0xac
{
- UINT32 eas;
+ uint32_t eas;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -606,14 +606,14 @@ void i386_device::i386_lodsb() // Opcode 0xac
void i386_device::i386_mov_rm8_r8() // Opcode 0x88
{
- UINT8 src;
- UINT8 modrm = FETCH();
+ uint8_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
STORE_RM8(modrm, src);
CYCLES(CYCLES_MOV_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG8(modrm);
WRITE8(ea, src);
CYCLES(CYCLES_MOV_REG_MEM);
@@ -622,14 +622,14 @@ void i386_device::i386_mov_rm8_r8() // Opcode 0x88
void i386_device::i386_mov_r8_rm8() // Opcode 0x8a
{
- UINT8 src;
- UINT8 modrm = FETCH();
+ uint8_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
STORE_REG8(modrm, src);
CYCLES(CYCLES_MOV_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
STORE_REG8(modrm, src);
CYCLES(CYCLES_MOV_MEM_REG);
@@ -638,14 +638,14 @@ void i386_device::i386_mov_r8_rm8() // Opcode 0x8a
void i386_device::i386_mov_rm8_i8() // Opcode 0xc6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT8 value = FETCH();
+ uint8_t value = FETCH();
STORE_RM8(modrm, value);
CYCLES(CYCLES_MOV_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT8 value = FETCH();
+ uint32_t ea = GetEA(modrm,1);
+ uint8_t value = FETCH();
WRITE8(ea, value);
CYCLES(CYCLES_MOV_IMM_MEM);
}
@@ -655,8 +655,8 @@ void i386_device::i386_mov_r32_cr() // Opcode 0x0f 20
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP, 0);
- UINT8 modrm = FETCH();
- UINT8 cr = (modrm >> 3) & 0x7;
+ uint8_t modrm = FETCH();
+ uint8_t cr = (modrm >> 3) & 0x7;
STORE_RM32(modrm, m_cr[cr]);
CYCLES(CYCLES_MOV_CR_REG);
@@ -666,8 +666,8 @@ void i386_device::i386_mov_r32_dr() // Opcode 0x0f 21
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP, 0);
- UINT8 modrm = FETCH();
- UINT8 dr = (modrm >> 3) & 0x7;
+ uint8_t modrm = FETCH();
+ uint8_t dr = (modrm >> 3) & 0x7;
STORE_RM32(modrm, m_dr[dr]);
switch(dr)
@@ -689,9 +689,9 @@ void i386_device::i386_mov_cr_r32() // Opcode 0x0f 22
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP, 0);
- UINT8 modrm = FETCH();
- UINT8 cr = (modrm >> 3) & 0x7;
- UINT32 data = LOAD_RM32(modrm);
+ uint8_t modrm = FETCH();
+ uint8_t cr = (modrm >> 3) & 0x7;
+ uint32_t data = LOAD_RM32(modrm);
switch(cr)
{
case 0:
@@ -715,8 +715,8 @@ void i386_device::i386_mov_dr_r32() // Opcode 0x0f 23
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP, 0);
- UINT8 modrm = FETCH();
- UINT8 dr = (modrm >> 3) & 0x7;
+ uint8_t modrm = FETCH();
+ uint8_t dr = (modrm >> 3) & 0x7;
m_dr[dr] = LOAD_RM32(modrm);
switch(dr)
@@ -739,7 +739,7 @@ void i386_device::i386_mov_dr_r32() // Opcode 0x0f 23
void i386_device::i386_mov_al_m8() // Opcode 0xa0
{
- UINT32 offset, ea;
+ uint32_t offset, ea;
if( m_address_size ) {
offset = FETCH32();
} else {
@@ -757,7 +757,7 @@ void i386_device::i386_mov_al_m8() // Opcode 0xa0
void i386_device::i386_mov_m8_al() // Opcode 0xa2
{
- UINT32 offset, ea;
+ uint32_t offset, ea;
if( m_address_size ) {
offset = FETCH32();
} else {
@@ -775,7 +775,7 @@ void i386_device::i386_mov_m8_al() // Opcode 0xa2
void i386_device::i386_mov_rm16_sreg() // Opcode 0x8c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
int s = (modrm >> 3) & 0x7;
if( modrm >= 0xc0 ) {
@@ -785,7 +785,7 @@ void i386_device::i386_mov_rm16_sreg() // Opcode 0x8c
STORE_RM16(modrm, m_sreg[s].selector);
CYCLES(CYCLES_MOV_SREG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE16(ea, m_sreg[s].selector);
CYCLES(CYCLES_MOV_SREG_MEM);
}
@@ -793,8 +793,8 @@ void i386_device::i386_mov_rm16_sreg() // Opcode 0x8c
void i386_device::i386_mov_sreg_rm16() // Opcode 0x8e
{
- UINT16 selector;
- UINT8 modrm = FETCH();
+ uint16_t selector;
+ uint8_t modrm = FETCH();
bool fault;
int s = (modrm >> 3) & 0x7;
@@ -802,7 +802,7 @@ void i386_device::i386_mov_sreg_rm16() // Opcode 0x8e
selector = LOAD_RM16(modrm);
CYCLES(CYCLES_MOV_REG_SREG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
selector = READ16(ea);
CYCLES(CYCLES_MOV_MEM_SREG);
}
@@ -868,8 +868,8 @@ void i386_device::i386_mov_bh_i8() // Opcode 0xb7
void i386_device::i386_movsb() // Opcode 0xa4
{
- UINT32 eas, ead;
- UINT8 v;
+ uint32_t eas, ead;
+ uint8_t v;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
} else {
@@ -885,8 +885,8 @@ void i386_device::i386_movsb() // Opcode 0xa4
void i386_device::i386_or_rm8_r8() // Opcode 0x08
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
@@ -894,7 +894,7 @@ void i386_device::i386_or_rm8_r8() // Opcode 0x08
STORE_RM8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG8(modrm);
dst = READ8(ea);
dst = OR8(dst, src);
@@ -905,8 +905,8 @@ void i386_device::i386_or_rm8_r8() // Opcode 0x08
void i386_device::i386_or_r8_rm8() // Opcode 0x0a
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
dst = LOAD_REG8(modrm);
@@ -914,7 +914,7 @@ void i386_device::i386_or_r8_rm8() // Opcode 0x0a
STORE_REG8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
dst = LOAD_REG8(modrm);
dst = OR8(dst, src);
@@ -925,7 +925,7 @@ void i386_device::i386_or_r8_rm8() // Opcode 0x0a
void i386_device::i386_or_al_i8() // Opcode 0x0c
{
- UINT8 src, dst;
+ uint8_t src, dst;
src = FETCH();
dst = REG8(AL);
dst = OR8(dst, src);
@@ -935,16 +935,16 @@ void i386_device::i386_or_al_i8() // Opcode 0x0c
void i386_device::i386_out_al_i8() // Opcode 0xe6
{
- UINT16 port = FETCH();
- UINT8 data = REG8(AL);
+ uint16_t port = FETCH();
+ uint8_t data = REG8(AL);
WRITEPORT8(port, data);
CYCLES(CYCLES_OUT_VAR);
}
void i386_device::i386_out_al_dx() // Opcode 0xee
{
- UINT16 port = REG16(DX);
- UINT8 data = REG8(AL);
+ uint16_t port = REG16(DX);
+ uint8_t data = REG8(AL);
WRITEPORT8(port, data);
CYCLES(CYCLES_OUT);
}
@@ -952,9 +952,9 @@ void i386_device::i386_out_al_dx() // Opcode 0xee
void i386_device::i386_arpl() // Opcode 0x63
{
- UINT16 src, dst;
- UINT8 modrm = FETCH();
- UINT8 flag = 0;
+ uint16_t src, dst;
+ uint8_t modrm = FETCH();
+ uint8_t flag = 0;
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -967,7 +967,7 @@ void i386_device::i386_arpl() // Opcode 0x63
STORE_RM16(modrm, dst);
}
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG16(modrm);
dst = READ16(ea);
if( (dst&0x3) < (src&0x3) ) {
@@ -984,17 +984,17 @@ void i386_device::i386_arpl() // Opcode 0x63
void i386_device::i386_push_i8() // Opcode 0x6a
{
- UINT8 value = FETCH();
+ uint8_t value = FETCH();
PUSH8(value);
CYCLES(CYCLES_PUSH_IMM);
}
void i386_device::i386_ins_generic(int size)
{
- UINT32 ead;
- UINT8 vb;
- UINT16 vw;
- UINT32 vd;
+ uint32_t ead;
+ uint8_t vb;
+ uint16_t vw;
+ uint32_t vd;
ead = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1 );
@@ -1037,10 +1037,10 @@ void i386_device::i386_insd() // Opcode 0x6d
void i386_device::i386_outs_generic(int size)
{
- UINT32 eas;
- UINT8 vb;
- UINT16 vw;
- UINT32 vd;
+ uint32_t eas;
+ uint8_t vb;
+ uint16_t vw;
+ uint32_t vd;
if( m_segment_prefix ) {
eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
@@ -1087,14 +1087,14 @@ void i386_device::i386_outsd() // Opcode 0x6f
void i386_device::i386_repeat(int invert_flag)
{
- UINT32 repeated_eip = m_eip;
- UINT32 repeated_pc = m_pc;
- UINT8 opcode; // = FETCH();
-// UINT32 eas, ead;
- UINT32 count;
- INT32 cycle_base = 0, cycle_adjustment = 0;
- UINT8 prefix_flag=1;
- UINT8 *flag = nullptr;
+ uint32_t repeated_eip = m_eip;
+ uint32_t repeated_pc = m_pc;
+ uint8_t opcode; // = FETCH();
+// uint32_t eas, ead;
+ uint32_t count;
+ int32_t cycle_base = 0, cycle_adjustment = 0;
+ uint8_t prefix_flag=1;
+ uint8_t *flag = nullptr;
do {
@@ -1246,7 +1246,7 @@ void i386_device::i386_repeat(int invert_flag)
{
i386_decode_opcode();
}
- catch (UINT64 e)
+ catch (uint64_t e)
{
m_eip = m_prev_eip;
throw e;
@@ -1293,8 +1293,8 @@ void i386_device::i386_sahf() // Opcode 0x9e
void i386_device::i386_sbb_rm8_r8() // Opcode 0x18
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
@@ -1302,7 +1302,7 @@ void i386_device::i386_sbb_rm8_r8() // Opcode 0x18
STORE_RM8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG8(modrm);
dst = READ8(ea);
dst = SBB8(dst, src, m_CF);
@@ -1313,8 +1313,8 @@ void i386_device::i386_sbb_rm8_r8() // Opcode 0x18
void i386_device::i386_sbb_r8_rm8() // Opcode 0x1a
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
dst = LOAD_REG8(modrm);
@@ -1322,7 +1322,7 @@ void i386_device::i386_sbb_r8_rm8() // Opcode 0x1a
STORE_REG8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
dst = LOAD_REG8(modrm);
dst = SBB8(dst, src, m_CF);
@@ -1333,7 +1333,7 @@ void i386_device::i386_sbb_r8_rm8() // Opcode 0x1a
void i386_device::i386_sbb_al_i8() // Opcode 0x1c
{
- UINT8 src, dst;
+ uint8_t src, dst;
src = FETCH();
dst = REG8(AL);
dst = SBB8(dst, src, m_CF);
@@ -1343,8 +1343,8 @@ void i386_device::i386_sbb_al_i8() // Opcode 0x1c
void i386_device::i386_scasb() // Opcode 0xae
{
- UINT32 eas;
- UINT8 src, dst;
+ uint32_t eas;
+ uint8_t src, dst;
eas = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 0 );
src = READ8(eas);
dst = REG8(AL);
@@ -1365,8 +1365,8 @@ void i386_device::i386_setalc() // Opcode 0xd6 (undocumented)
void i386_device::i386_seta_rm8() // Opcode 0x0f 97
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_CF == 0 && m_ZF == 0 ) {
value = 1;
}
@@ -1374,7 +1374,7 @@ void i386_device::i386_seta_rm8() // Opcode 0x0f 97
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1382,8 +1382,8 @@ void i386_device::i386_seta_rm8() // Opcode 0x0f 97
void i386_device::i386_setbe_rm8() // Opcode 0x0f 96
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_CF != 0 || m_ZF != 0 ) {
value = 1;
}
@@ -1391,7 +1391,7 @@ void i386_device::i386_setbe_rm8() // Opcode 0x0f 96
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1399,8 +1399,8 @@ void i386_device::i386_setbe_rm8() // Opcode 0x0f 96
void i386_device::i386_setc_rm8() // Opcode 0x0f 92
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_CF != 0 ) {
value = 1;
}
@@ -1408,7 +1408,7 @@ void i386_device::i386_setc_rm8() // Opcode 0x0f 92
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1416,8 +1416,8 @@ void i386_device::i386_setc_rm8() // Opcode 0x0f 92
void i386_device::i386_setg_rm8() // Opcode 0x0f 9f
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_ZF == 0 && (m_SF == m_OF) ) {
value = 1;
}
@@ -1425,7 +1425,7 @@ void i386_device::i386_setg_rm8() // Opcode 0x0f 9f
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1433,8 +1433,8 @@ void i386_device::i386_setg_rm8() // Opcode 0x0f 9f
void i386_device::i386_setge_rm8() // Opcode 0x0f 9d
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if(m_SF == m_OF) {
value = 1;
}
@@ -1442,7 +1442,7 @@ void i386_device::i386_setge_rm8() // Opcode 0x0f 9d
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1450,8 +1450,8 @@ void i386_device::i386_setge_rm8() // Opcode 0x0f 9d
void i386_device::i386_setl_rm8() // Opcode 0x0f 9c
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_SF != m_OF ) {
value = 1;
}
@@ -1459,7 +1459,7 @@ void i386_device::i386_setl_rm8() // Opcode 0x0f 9c
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1467,8 +1467,8 @@ void i386_device::i386_setl_rm8() // Opcode 0x0f 9c
void i386_device::i386_setle_rm8() // Opcode 0x0f 9e
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_ZF != 0 || (m_SF != m_OF) ) {
value = 1;
}
@@ -1476,7 +1476,7 @@ void i386_device::i386_setle_rm8() // Opcode 0x0f 9e
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1484,8 +1484,8 @@ void i386_device::i386_setle_rm8() // Opcode 0x0f 9e
void i386_device::i386_setnc_rm8() // Opcode 0x0f 93
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_CF == 0 ) {
value = 1;
}
@@ -1493,7 +1493,7 @@ void i386_device::i386_setnc_rm8() // Opcode 0x0f 93
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1501,8 +1501,8 @@ void i386_device::i386_setnc_rm8() // Opcode 0x0f 93
void i386_device::i386_setno_rm8() // Opcode 0x0f 91
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_OF == 0 ) {
value = 1;
}
@@ -1510,7 +1510,7 @@ void i386_device::i386_setno_rm8() // Opcode 0x0f 91
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1518,8 +1518,8 @@ void i386_device::i386_setno_rm8() // Opcode 0x0f 91
void i386_device::i386_setnp_rm8() // Opcode 0x0f 9b
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_PF == 0 ) {
value = 1;
}
@@ -1527,7 +1527,7 @@ void i386_device::i386_setnp_rm8() // Opcode 0x0f 9b
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1535,8 +1535,8 @@ void i386_device::i386_setnp_rm8() // Opcode 0x0f 9b
void i386_device::i386_setns_rm8() // Opcode 0x0f 99
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_SF == 0 ) {
value = 1;
}
@@ -1544,7 +1544,7 @@ void i386_device::i386_setns_rm8() // Opcode 0x0f 99
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1552,8 +1552,8 @@ void i386_device::i386_setns_rm8() // Opcode 0x0f 99
void i386_device::i386_setnz_rm8() // Opcode 0x0f 95
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_ZF == 0 ) {
value = 1;
}
@@ -1561,7 +1561,7 @@ void i386_device::i386_setnz_rm8() // Opcode 0x0f 95
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1569,8 +1569,8 @@ void i386_device::i386_setnz_rm8() // Opcode 0x0f 95
void i386_device::i386_seto_rm8() // Opcode 0x0f 90
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_OF != 0 ) {
value = 1;
}
@@ -1578,7 +1578,7 @@ void i386_device::i386_seto_rm8() // Opcode 0x0f 90
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1586,8 +1586,8 @@ void i386_device::i386_seto_rm8() // Opcode 0x0f 90
void i386_device::i386_setp_rm8() // Opcode 0x0f 9a
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_PF != 0 ) {
value = 1;
}
@@ -1595,7 +1595,7 @@ void i386_device::i386_setp_rm8() // Opcode 0x0f 9a
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1603,8 +1603,8 @@ void i386_device::i386_setp_rm8() // Opcode 0x0f 9a
void i386_device::i386_sets_rm8() // Opcode 0x0f 98
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_SF != 0 ) {
value = 1;
}
@@ -1612,7 +1612,7 @@ void i386_device::i386_sets_rm8() // Opcode 0x0f 98
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1620,8 +1620,8 @@ void i386_device::i386_sets_rm8() // Opcode 0x0f 98
void i386_device::i386_setz_rm8() // Opcode 0x0f 94
{
- UINT8 modrm = FETCH();
- UINT8 value = 0;
+ uint8_t modrm = FETCH();
+ uint8_t value = 0;
if( m_ZF != 0 ) {
value = 1;
}
@@ -1629,7 +1629,7 @@ void i386_device::i386_setz_rm8() // Opcode 0x0f 94
STORE_RM8(modrm, value);
CYCLES(CYCLES_SETCC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
WRITE8(ea, value);
CYCLES(CYCLES_SETCC_MEM);
}
@@ -1651,7 +1651,7 @@ void i386_device::i386_sti() // Opcode 0xfb
{
if(PROTECTED_MODE)
{
- UINT8 IOPL = m_IOP1 | (m_IOP2 << 1);
+ uint8_t IOPL = m_IOP1 | (m_IOP2 << 1);
if(m_CPL > IOPL)
FAULT(FAULT_GP,0);
}
@@ -1661,7 +1661,7 @@ void i386_device::i386_sti() // Opcode 0xfb
void i386_device::i386_stosb() // Opcode 0xaa
{
- UINT32 ead;
+ uint32_t ead;
ead = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1 );
WRITE8(ead, REG8(AL));
BUMP_DI(1);
@@ -1670,8 +1670,8 @@ void i386_device::i386_stosb() // Opcode 0xaa
void i386_device::i386_sub_rm8_r8() // Opcode 0x28
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
@@ -1679,7 +1679,7 @@ void i386_device::i386_sub_rm8_r8() // Opcode 0x28
STORE_RM8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG8(modrm);
dst = READ8(ea);
dst = SUB8(dst, src);
@@ -1690,8 +1690,8 @@ void i386_device::i386_sub_rm8_r8() // Opcode 0x28
void i386_device::i386_sub_r8_rm8() // Opcode 0x2a
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
dst = LOAD_REG8(modrm);
@@ -1699,7 +1699,7 @@ void i386_device::i386_sub_r8_rm8() // Opcode 0x2a
STORE_REG8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
dst = LOAD_REG8(modrm);
dst = SUB8(dst, src);
@@ -1710,7 +1710,7 @@ void i386_device::i386_sub_r8_rm8() // Opcode 0x2a
void i386_device::i386_sub_al_i8() // Opcode 0x2c
{
- UINT8 src, dst;
+ uint8_t src, dst;
src = FETCH();
dst = REG8(EAX);
dst = SUB8(dst, src);
@@ -1720,8 +1720,8 @@ void i386_device::i386_sub_al_i8() // Opcode 0x2c
void i386_device::i386_test_al_i8() // Opcode 0xa8
{
- UINT8 src = FETCH();
- UINT8 dst = REG8(AL);
+ uint8_t src = FETCH();
+ uint8_t dst = REG8(AL);
dst = src & dst;
SetSZPF8(dst);
m_CF = 0;
@@ -1731,8 +1731,8 @@ void i386_device::i386_test_al_i8() // Opcode 0xa8
void i386_device::i386_test_rm8_r8() // Opcode 0x84
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
@@ -1742,7 +1742,7 @@ void i386_device::i386_test_rm8_r8() // Opcode 0x84
m_OF = 0;
CYCLES(CYCLES_TEST_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = LOAD_REG8(modrm);
dst = READ8(ea);
dst = src & dst;
@@ -1755,17 +1755,17 @@ void i386_device::i386_test_rm8_r8() // Opcode 0x84
void i386_device::i386_xchg_r8_rm8() // Opcode 0x86
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT8 src = LOAD_RM8(modrm);
- UINT8 dst = LOAD_REG8(modrm);
+ uint8_t src = LOAD_RM8(modrm);
+ uint8_t dst = LOAD_REG8(modrm);
STORE_REG8(modrm, src);
STORE_RM8(modrm, dst);
CYCLES(CYCLES_XCHG_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT8 src = READ8(ea);
- UINT8 dst = LOAD_REG8(modrm);
+ uint32_t ea = GetEA(modrm,1);
+ uint8_t src = READ8(ea);
+ uint8_t dst = LOAD_REG8(modrm);
WRITE8(ea, dst);
STORE_REG8(modrm, src);
CYCLES(CYCLES_XCHG_REG_MEM);
@@ -1774,8 +1774,8 @@ void i386_device::i386_xchg_r8_rm8() // Opcode 0x86
void i386_device::i386_xor_rm8_r8() // Opcode 0x30
{
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_REG8(modrm);
dst = LOAD_RM8(modrm);
@@ -1783,7 +1783,7 @@ void i386_device::i386_xor_rm8_r8() // Opcode 0x30
STORE_RM8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
src = LOAD_REG8(modrm);
dst = READ8(ea);
dst = XOR8(dst, src);
@@ -1794,8 +1794,8 @@ void i386_device::i386_xor_rm8_r8() // Opcode 0x30
void i386_device::i386_xor_r8_rm8() // Opcode 0x32
{
- UINT32 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t src, dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
dst = LOAD_REG8(modrm);
@@ -1803,7 +1803,7 @@ void i386_device::i386_xor_r8_rm8() // Opcode 0x32
STORE_REG8(modrm, dst);
CYCLES(CYCLES_ALU_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
dst = LOAD_REG8(modrm);
dst = XOR8(dst, src);
@@ -1814,7 +1814,7 @@ void i386_device::i386_xor_r8_rm8() // Opcode 0x32
void i386_device::i386_xor_al_i8() // Opcode 0x34
{
- UINT8 src, dst;
+ uint8_t src, dst;
src = FETCH();
dst = REG8(AL);
dst = XOR8(dst, src);
@@ -1826,9 +1826,9 @@ void i386_device::i386_xor_al_i8() // Opcode 0x34
void i386_device::i386_group80_8() // Opcode 0x80
{
- UINT32 ea;
- UINT8 src, dst;
- UINT8 modrm = FETCH();
+ uint32_t ea;
+ uint8_t src, dst;
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
@@ -1963,9 +1963,9 @@ void i386_device::i386_group80_8() // Opcode 0x80
void i386_device::i386_groupC0_8() // Opcode 0xc0
{
- UINT8 dst;
- UINT8 modrm = FETCH();
- UINT8 shift;
+ uint8_t dst;
+ uint8_t modrm = FETCH();
+ uint8_t shift;
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
@@ -1973,7 +1973,7 @@ void i386_device::i386_groupC0_8() // Opcode 0xc0
dst = i386_shift_rotate8(modrm, dst, shift);
STORE_RM8(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ8(ea);
shift = FETCH() & 0x1f;
dst = i386_shift_rotate8(modrm, dst, shift);
@@ -1983,15 +1983,15 @@ void i386_device::i386_groupC0_8() // Opcode 0xc0
void i386_device::i386_groupD0_8() // Opcode 0xd0
{
- UINT8 dst;
- UINT8 modrm = FETCH();
+ uint8_t dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
dst = i386_shift_rotate8(modrm, dst, 1);
STORE_RM8(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ8(ea);
dst = i386_shift_rotate8(modrm, dst, 1);
WRITE8(ea, dst);
@@ -2000,15 +2000,15 @@ void i386_device::i386_groupD0_8() // Opcode 0xd0
void i386_device::i386_groupD2_8() // Opcode 0xd2
{
- UINT8 dst;
- UINT8 modrm = FETCH();
+ uint8_t dst;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
dst = i386_shift_rotate8(modrm, dst, REG8(CL));
STORE_RM8(modrm, dst);
} else {
- UINT32 ea = GetEA(modrm,1);
+ uint32_t ea = GetEA(modrm,1);
dst = READ8(ea);
dst = i386_shift_rotate8(modrm, dst, REG8(CL));
WRITE8(ea, dst);
@@ -2017,22 +2017,22 @@ void i386_device::i386_groupD2_8() // Opcode 0xd2
void i386_device::i386_groupF6_8() // Opcode 0xf6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 0: /* TEST Rm8, i8 */
if( modrm >= 0xc0 ) {
- UINT8 dst = LOAD_RM8(modrm);
- UINT8 src = FETCH();
+ uint8_t dst = LOAD_RM8(modrm);
+ uint8_t src = FETCH();
dst &= src;
m_CF = m_OF = m_AF = 0;
SetSZPF8(dst);
CYCLES(CYCLES_TEST_IMM_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT8 dst = READ8(ea);
- UINT8 src = FETCH();
+ uint32_t ea = GetEA(modrm,0);
+ uint8_t dst = READ8(ea);
+ uint8_t src = FETCH();
dst &= src;
m_CF = m_OF = m_AF = 0;
SetSZPF8(dst);
@@ -2041,13 +2041,13 @@ void i386_device::i386_groupF6_8() // Opcode 0xf6
break;
case 2: /* NOT Rm8 */
if( modrm >= 0xc0 ) {
- UINT8 dst = LOAD_RM8(modrm);
+ uint8_t dst = LOAD_RM8(modrm);
dst = ~dst;
STORE_RM8(modrm, dst);
CYCLES(CYCLES_NOT_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT8 dst = READ8(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint8_t dst = READ8(ea);
dst = ~dst;
WRITE8(ea, dst);
CYCLES(CYCLES_NOT_MEM);
@@ -2055,13 +2055,13 @@ void i386_device::i386_groupF6_8() // Opcode 0xf6
break;
case 3: /* NEG Rm8 */
if( modrm >= 0xc0 ) {
- UINT8 dst = LOAD_RM8(modrm);
+ uint8_t dst = LOAD_RM8(modrm);
dst = SUB8(0, dst );
STORE_RM8(modrm, dst);
CYCLES(CYCLES_NEG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT8 dst = READ8(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint8_t dst = READ8(ea);
dst = SUB8(0, dst );
WRITE8(ea, dst);
CYCLES(CYCLES_NEG_MEM);
@@ -2069,67 +2069,67 @@ void i386_device::i386_groupF6_8() // Opcode 0xf6
break;
case 4: /* MUL AL, Rm8 */
{
- UINT16 result;
- UINT8 src, dst;
+ uint16_t result;
+ uint8_t src, dst;
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
CYCLES(CYCLES_MUL8_ACC_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
CYCLES(CYCLES_MUL8_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = REG8(AL);
- result = (UINT16)src * (UINT16)dst;
- REG16(AX) = (UINT16)result;
+ result = (uint16_t)src * (uint16_t)dst;
+ REG16(AX) = (uint16_t)result;
m_CF = m_OF = (REG16(AX) > 0xff);
}
break;
case 5: /* IMUL AL, Rm8 */
{
- INT16 result;
- INT16 src, dst;
+ int16_t result;
+ int16_t src, dst;
if( modrm >= 0xc0 ) {
- src = (INT16)(INT8)LOAD_RM8(modrm);
+ src = (int16_t)(int8_t)LOAD_RM8(modrm);
CYCLES(CYCLES_IMUL8_ACC_REG); /* TODO: Correct multiply timing */
} else {
- UINT32 ea = GetEA(modrm,0);
- src = (INT16)(INT8)READ8(ea);
+ uint32_t ea = GetEA(modrm,0);
+ src = (int16_t)(int8_t)READ8(ea);
CYCLES(CYCLES_IMUL8_ACC_MEM); /* TODO: Correct multiply timing */
}
- dst = (INT16)(INT8)REG8(AL);
+ dst = (int16_t)(int8_t)REG8(AL);
result = src * dst;
- REG16(AX) = (UINT16)result;
+ REG16(AX) = (uint16_t)result;
- m_CF = m_OF = !(result == (INT16)(INT8)result);
+ m_CF = m_OF = !(result == (int16_t)(int8_t)result);
}
break;
case 6: /* DIV AL, Rm8 */
{
- UINT16 quotient, remainder, result;
- UINT8 src;
+ uint16_t quotient, remainder, result;
+ uint8_t src;
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
CYCLES(CYCLES_DIV8_ACC_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
CYCLES(CYCLES_DIV8_ACC_MEM);
}
- quotient = (UINT16)REG16(AX);
+ quotient = (uint16_t)REG16(AX);
if( src ) {
- remainder = quotient % (UINT16)src;
- result = quotient / (UINT16)src;
+ remainder = quotient % (uint16_t)src;
+ result = quotient / (uint16_t)src;
if( result > 0xff ) {
/* TODO: Divide error */
} else {
- REG8(AH) = (UINT8)remainder & 0xff;
- REG8(AL) = (UINT8)result & 0xff;
+ REG8(AH) = (uint8_t)remainder & 0xff;
+ REG8(AL) = (uint8_t)result & 0xff;
// this flag is actually undefined, enable on non-cyrix
if (m_cpuid_id0 != 0x69727943)
@@ -2142,26 +2142,26 @@ void i386_device::i386_groupF6_8() // Opcode 0xf6
break;
case 7: /* IDIV AL, Rm8 */
{
- INT16 quotient, remainder, result;
- UINT8 src;
+ int16_t quotient, remainder, result;
+ uint8_t src;
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
CYCLES(CYCLES_IDIV8_ACC_REG);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ8(ea);
CYCLES(CYCLES_IDIV8_ACC_MEM);
}
- quotient = (INT16)REG16(AX);
+ quotient = (int16_t)REG16(AX);
if( src ) {
- remainder = quotient % (INT16)(INT8)src;
- result = quotient / (INT16)(INT8)src;
+ remainder = quotient % (int16_t)(int8_t)src;
+ result = quotient / (int16_t)(int8_t)src;
if( result > 0xff ) {
/* TODO: Divide error */
} else {
- REG8(AH) = (UINT8)remainder & 0xff;
- REG8(AL) = (UINT8)result & 0xff;
+ REG8(AH) = (uint8_t)remainder & 0xff;
+ REG8(AL) = (uint8_t)result & 0xff;
// this flag is actually undefined, enable on non-cyrix
if (m_cpuid_id0 != 0x69727943)
@@ -2177,19 +2177,19 @@ void i386_device::i386_groupF6_8() // Opcode 0xf6
void i386_device::i386_groupFE_8() // Opcode 0xfe
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
switch( (modrm >> 3) & 0x7 )
{
case 0: /* INC Rm8 */
if( modrm >= 0xc0 ) {
- UINT8 dst = LOAD_RM8(modrm);
+ uint8_t dst = LOAD_RM8(modrm);
dst = INC8(dst);
STORE_RM8(modrm, dst);
CYCLES(CYCLES_INC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT8 dst = READ8(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint8_t dst = READ8(ea);
dst = INC8(dst);
WRITE8(ea, dst);
CYCLES(CYCLES_INC_MEM);
@@ -2197,13 +2197,13 @@ void i386_device::i386_groupFE_8() // Opcode 0xfe
break;
case 1: /* DEC Rm8 */
if( modrm >= 0xc0 ) {
- UINT8 dst = LOAD_RM8(modrm);
+ uint8_t dst = LOAD_RM8(modrm);
dst = DEC8(dst);
STORE_RM8(modrm, dst);
CYCLES(CYCLES_DEC_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT8 dst = READ8(ea);
+ uint32_t ea = GetEA(modrm,1);
+ uint8_t dst = READ8(ea);
dst = DEC8(dst);
WRITE8(ea, dst);
CYCLES(CYCLES_DEC_MEM);
@@ -2211,11 +2211,11 @@ void i386_device::i386_groupFE_8() // Opcode 0xfe
break;
case 6: /* PUSH Rm8*/
{
- UINT8 value;
+ uint8_t value;
if( modrm >= 0xc0 ) {
value = LOAD_RM8(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
value = READ8(ea);
}
if( m_operand_size ) {
@@ -2348,10 +2348,10 @@ void i386_device::i386_into() // Opcode 0xce
}
}
-static UINT32 i386_escape_ea; // hack around GCC 4.6 error because we need the side effects of GetEA()
+static uint32_t i386_escape_ea; // hack around GCC 4.6 error because we need the side effects of GetEA()
void i386_device::i386_escape() // Opcodes 0xd8 - 0xdf
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if(modrm < 0xc0)
{
i386_escape_ea = GetEA(modrm,0);
@@ -2372,13 +2372,13 @@ void i386_device::i386_hlt() // Opcode 0xf4
void i386_device::i386_decimal_adjust(int direction)
{
- UINT8 tmpAL = REG8(AL);
- UINT8 tmpCF = m_CF;
+ uint8_t tmpAL = REG8(AL);
+ uint8_t tmpCF = m_CF;
if (m_AF || ((REG8(AL) & 0xf) > 9))
{
- UINT16 t= (UINT16)REG8(AL) + (direction * 0x06);
- REG8(AL) = (UINT8)t&0xff;
+ uint16_t t= (uint16_t)REG8(AL) + (direction * 0x06);
+ REG8(AL) = (uint8_t)t&0xff;
m_AF = 1;
if (t & 0x100)
m_CF = 1;
@@ -2442,9 +2442,9 @@ void i386_device::i386_aas() // Opcode 0x3f
void i386_device::i386_aad() // Opcode 0xd5
{
- UINT8 tempAL = REG8(AL);
- UINT8 tempAH = REG8(AH);
- UINT8 i = FETCH();
+ uint8_t tempAL = REG8(AL);
+ uint8_t tempAH = REG8(AH);
+ uint8_t i = FETCH();
REG8(AL) = (tempAL + (tempAH * i)) & 0xff;
REG8(AH) = 0;
@@ -2454,8 +2454,8 @@ void i386_device::i386_aad() // Opcode 0xd5
void i386_device::i386_aam() // Opcode 0xd4
{
- UINT8 tempAL = REG8(AL);
- UINT8 i = FETCH();
+ uint8_t tempAL = REG8(AL);
+ uint8_t i = FETCH();
if(!i)
{
@@ -2506,7 +2506,7 @@ void i386_device::i386_loadall() // Opcode 0x0f 0x07 (0x0f 0x05 on 80286),
{
if(PROTECTED_MODE && (m_CPL != 0))
FAULT(FAULT_GP,0)
- UINT32 ea = i386_translate(ES, REG32(EDI), 0);
+ uint32_t ea = i386_translate(ES, REG32(EDI), 0);
m_cr[0] = READ32(ea) & 0xfffeffff; // wp not supported on 386
set_flags(READ32(ea + 0x04));
m_eip = READ32(ea + 0x08);
@@ -2574,7 +2574,7 @@ void i386_device::i386_invalid()
void i386_device::i386_xlat() // Opcode 0xd7
{
- UINT32 ea;
+ uint32_t ea;
if( m_segment_prefix ) {
if(!m_address_size)
{
diff --git a/src/devices/cpu/i386/i386priv.h b/src/devices/cpu/i386/i386priv.h
index 3edf681744b..528dade6c72 100644
--- a/src/devices/cpu/i386/i386priv.h
+++ b/src/devices/cpu/i386/i386priv.h
@@ -15,7 +15,7 @@
#define MMXOP(XX) mmx_##XX
#define SSEOP(XX) sse_##XX
-extern int i386_dasm_one(char *buffer, UINT32 pc, const UINT8 *oprom, int mode);
+extern int i386_dasm_one(char *buffer, uint32_t pc, const uint8_t *oprom, int mode);
enum SREGS { ES, CS, SS, DS, FS, GS };
@@ -277,20 +277,20 @@ enum smram_intel_p5
#define MXCSR_FZ (1<<15) // Flush to Zero
union MMX_REG {
- UINT32 d[2];
- INT32 i[2];
- UINT16 w[4];
- INT16 s[4];
- UINT8 b[8];
- INT8 c[8];
+ uint32_t d[2];
+ int32_t i[2];
+ uint16_t w[4];
+ int16_t s[4];
+ uint8_t b[8];
+ int8_t c[8];
float f[2];
- UINT64 q;
- INT64 l;
+ uint64_t q;
+ int64_t l;
};
extern int i386_parity_table[256];
-#define FAULT_THROW(fault,error) { throw (UINT64)(fault | (UINT64)error << 32); }
+#define FAULT_THROW(fault,error) { throw (uint64_t)(fault | (uint64_t)error << 32); }
#define PF_THROW(error) { m_cr[2] = address; FAULT_THROW(FAULT_PF,error); }
#define PROTECTED_MODE (m_cr[0] & 0x1)
@@ -309,16 +309,16 @@ extern int i386_parity_table[256];
#define SetCF8(x) {m_CF = ((x) & 0x100) ? 1 : 0; }
#define SetCF16(x) {m_CF = ((x) & 0x10000) ? 1 : 0; }
-#define SetCF32(x) {m_CF = ((x) & (((UINT64)1) << 32)) ? 1 : 0; }
+#define SetCF32(x) {m_CF = ((x) & (((uint64_t)1) << 32)) ? 1 : 0; }
#define SetSF(x) (m_SF = (x))
#define SetZF(x) (m_ZF = (x))
#define SetAF(x,y,z) (m_AF = (((x) ^ ((y) ^ (z))) & 0x10) ? 1 : 0)
#define SetPF(x) (m_PF = i386_parity_table[(x) & 0xFF])
-#define SetSZPF8(x) {m_ZF = ((UINT8)(x)==0); m_SF = ((x)&0x80) ? 1 : 0; m_PF = i386_parity_table[x & 0xFF]; }
-#define SetSZPF16(x) {m_ZF = ((UINT16)(x)==0); m_SF = ((x)&0x8000) ? 1 : 0; m_PF = i386_parity_table[x & 0xFF]; }
-#define SetSZPF32(x) {m_ZF = ((UINT32)(x)==0); m_SF = ((x)&0x80000000) ? 1 : 0; m_PF = i386_parity_table[x & 0xFF]; }
+#define SetSZPF8(x) {m_ZF = ((uint8_t)(x)==0); m_SF = ((x)&0x80) ? 1 : 0; m_PF = i386_parity_table[x & 0xFF]; }
+#define SetSZPF16(x) {m_ZF = ((uint16_t)(x)==0); m_SF = ((x)&0x8000) ? 1 : 0; m_PF = i386_parity_table[x & 0xFF]; }
+#define SetSZPF32(x) {m_ZF = ((uint32_t)(x)==0); m_SF = ((x)&0x80000000) ? 1 : 0; m_PF = i386_parity_table[x & 0xFF]; }
#define MMX(n) (*((MMX_REG *)(&m_x87_reg[(n)].low)))
#define XMM(n) m_sse_reg[(n)]
@@ -362,7 +362,7 @@ extern MODRM_TABLE i386_MODRM_table[256];
/***********************************************************************************/
-UINT32 i386_device::i386_translate(int segment, UINT32 ip, int rwn)
+uint32_t i386_device::i386_translate(int segment, uint32_t ip, int rwn)
{
// TODO: segment limit access size, execution permission, handle exception thrown from exception handler
if(PROTECTED_MODE && !V8086_MODE && (rwn != -1))
@@ -381,7 +381,7 @@ UINT32 i386_device::i386_translate(int segment, UINT32 ip, int rwn)
#define VTLB_FLAG_DIRTY 0x100
-vtlb_entry i386_device::get_permissions(UINT32 pte, int wp)
+vtlb_entry i386_device::get_permissions(uint32_t pte, int wp)
{
vtlb_entry ret = VTLB_READ_ALLOWED | ((pte & 4) ? VTLB_USER_READ_ALLOWED : 0);
if(!wp)
@@ -393,10 +393,10 @@ vtlb_entry i386_device::get_permissions(UINT32 pte, int wp)
bool i386_device::i386_translate_address(int intention, offs_t *address, vtlb_entry *entry)
{
- UINT32 a = *address;
- UINT32 pdbr = m_cr[3] & 0xfffff000;
- UINT32 directory = (a >> 22) & 0x3ff;
- UINT32 table = (a >> 12) & 0x3ff;
+ uint32_t a = *address;
+ uint32_t pdbr = m_cr[3] & 0xfffff000;
+ uint32_t directory = (a >> 22) & 0x3ff;
+ uint32_t table = (a >> 12) & 0x3ff;
vtlb_entry perm = 0;
bool ret;
bool user = (intention & TRANSLATE_USER_MASK) ? true : false;
@@ -410,7 +410,7 @@ bool i386_device::i386_translate_address(int intention, offs_t *address, vtlb_en
return true;
}
- UINT32 page_dir = m_program->read_dword(pdbr + directory * 4);
+ uint32_t page_dir = m_program->read_dword(pdbr + directory * 4);
if(page_dir & 1)
{
if ((page_dir & 0x80) && (m_cr[4] & 0x10))
@@ -439,7 +439,7 @@ bool i386_device::i386_translate_address(int intention, offs_t *address, vtlb_en
}
else
{
- UINT32 page_entry = m_program->read_dword((page_dir & 0xfffff000) + (table * 4));
+ uint32_t page_entry = m_program->read_dword((page_dir & 0xfffff000) + (table * 4));
if(!(page_entry & 1))
ret = false;
else
@@ -481,20 +481,20 @@ bool i386_device::i386_translate_address(int intention, offs_t *address, vtlb_en
//#define TEST_TLB
-int i386_device::translate_address(int pl, int type, UINT32 *address, UINT32 *error)
+int i386_device::translate_address(int pl, int type, uint32_t *address, uint32_t *error)
{
if(!(m_cr[0] & 0x80000000)) // Some (very few) old OS's won't work with this
return TRUE;
const vtlb_entry *table = vtlb_table();
- UINT32 index = *address >> 12;
+ uint32_t index = *address >> 12;
vtlb_entry entry = table[index];
if(type == TRANSLATE_FETCH)
type = TRANSLATE_READ;
if(pl == 3)
type |= TRANSLATE_USER_MASK;
#ifdef TEST_TLB
- UINT32 test_addr = *address;
+ uint32_t test_addr = *address;
#endif
if(!(entry & VTLB_FLAG_VALID) || ((type & TRANSLATE_WRITE) && !(entry & VTLB_FLAG_DIRTY)))
@@ -523,22 +523,22 @@ int i386_device::translate_address(int pl, int type, UINT32 *address, UINT32 *er
return TRUE;
}
-void i386_device::CHANGE_PC(UINT32 pc)
+void i386_device::CHANGE_PC(uint32_t pc)
{
m_pc = i386_translate(CS, pc, -1 );
}
-void i386_device::NEAR_BRANCH(INT32 offs)
+void i386_device::NEAR_BRANCH(int32_t offs)
{
/* TODO: limit */
m_eip += offs;
m_pc += offs;
}
-UINT8 i386_device::FETCH()
+uint8_t i386_device::FETCH()
{
- UINT8 value;
- UINT32 address = m_pc, error;
+ uint8_t value;
+ uint32_t address = m_pc, error;
if(!translate_address(m_CPL,TRANSLATE_FETCH,&address,&error))
PF_THROW(error);
@@ -552,10 +552,10 @@ UINT8 i386_device::FETCH()
m_pc++;
return value;
}
-UINT16 i386_device::FETCH16()
+uint16_t i386_device::FETCH16()
{
- UINT16 value;
- UINT32 address = m_pc, error;
+ uint16_t value;
+ uint32_t address = m_pc, error;
if( !WORD_ALIGNED(address) ) { /* Unaligned read */
value = (FETCH() << 0);
@@ -570,10 +570,10 @@ UINT16 i386_device::FETCH16()
}
return value;
}
-UINT32 i386_device::FETCH32()
+uint32_t i386_device::FETCH32()
{
- UINT32 value;
- UINT32 address = m_pc, error;
+ uint32_t value;
+ uint32_t address = m_pc, error;
if( !DWORD_ALIGNED(m_pc) ) { /* Unaligned read */
value = (FETCH() << 0);
@@ -592,9 +592,9 @@ UINT32 i386_device::FETCH32()
return value;
}
-UINT8 i386_device::READ8(UINT32 ea)
+uint8_t i386_device::READ8(uint32_t ea)
{
- UINT32 address = ea, error;
+ uint32_t address = ea, error;
if(!translate_address(m_CPL,TRANSLATE_READ,&address, &error))
PF_THROW(error);
@@ -602,10 +602,10 @@ UINT8 i386_device::READ8(UINT32 ea)
address &= m_a20_mask;
return m_program->read_byte(address);
}
-UINT16 i386_device::READ16(UINT32 ea)
+uint16_t i386_device::READ16(uint32_t ea)
{
- UINT16 value;
- UINT32 address = ea, error;
+ uint16_t value;
+ uint32_t address = ea, error;
if( !WORD_ALIGNED(ea) ) { /* Unaligned read */
value = (READ8( address+0 ) << 0);
@@ -619,10 +619,10 @@ UINT16 i386_device::READ16(UINT32 ea)
}
return value;
}
-UINT32 i386_device::READ32(UINT32 ea)
+uint32_t i386_device::READ32(uint32_t ea)
{
- UINT32 value;
- UINT32 address = ea, error;
+ uint32_t value;
+ uint32_t address = ea, error;
if( !DWORD_ALIGNED(ea) ) { /* Unaligned read */
value = (READ8( address+0 ) << 0);
@@ -639,33 +639,33 @@ UINT32 i386_device::READ32(UINT32 ea)
return value;
}
-UINT64 i386_device::READ64(UINT32 ea)
+uint64_t i386_device::READ64(uint32_t ea)
{
- UINT64 value;
- UINT32 address = ea, error;
+ uint64_t value;
+ uint32_t address = ea, error;
if( !QWORD_ALIGNED(ea) ) { /* Unaligned read */
- value = (((UINT64) READ8( address+0 )) << 0);
- value |= (((UINT64) READ8( address+1 )) << 8);
- value |= (((UINT64) READ8( address+2 )) << 16);
- value |= (((UINT64) READ8( address+3 )) << 24);
- value |= (((UINT64) READ8( address+4 )) << 32);
- value |= (((UINT64) READ8( address+5 )) << 40);
- value |= (((UINT64) READ8( address+6 )) << 48);
- value |= (((UINT64) READ8( address+7 )) << 56);
+ value = (((uint64_t) READ8( address+0 )) << 0);
+ value |= (((uint64_t) READ8( address+1 )) << 8);
+ value |= (((uint64_t) READ8( address+2 )) << 16);
+ value |= (((uint64_t) READ8( address+3 )) << 24);
+ value |= (((uint64_t) READ8( address+4 )) << 32);
+ value |= (((uint64_t) READ8( address+5 )) << 40);
+ value |= (((uint64_t) READ8( address+6 )) << 48);
+ value |= (((uint64_t) READ8( address+7 )) << 56);
} else {
if(!translate_address(m_CPL,TRANSLATE_READ,&address,&error))
PF_THROW(error);
address &= m_a20_mask;
- value = (((UINT64) m_program->read_dword( address+0 )) << 0);
- value |= (((UINT64) m_program->read_dword( address+4 )) << 32);
+ value = (((uint64_t) m_program->read_dword( address+0 )) << 0);
+ value |= (((uint64_t) m_program->read_dword( address+4 )) << 32);
}
return value;
}
-UINT8 i386_device::READ8PL0(UINT32 ea)
+uint8_t i386_device::READ8PL0(uint32_t ea)
{
- UINT32 address = ea, error;
+ uint32_t address = ea, error;
if(!translate_address(0,TRANSLATE_READ,&address,&error))
PF_THROW(error);
@@ -673,10 +673,10 @@ UINT8 i386_device::READ8PL0(UINT32 ea)
address &= m_a20_mask;
return m_program->read_byte(address);
}
-UINT16 i386_device::READ16PL0(UINT32 ea)
+uint16_t i386_device::READ16PL0(uint32_t ea)
{
- UINT16 value;
- UINT32 address = ea, error;
+ uint16_t value;
+ uint32_t address = ea, error;
if( !WORD_ALIGNED(ea) ) { /* Unaligned read */
value = (READ8PL0( address+0 ) << 0);
@@ -691,10 +691,10 @@ UINT16 i386_device::READ16PL0(UINT32 ea)
return value;
}
-UINT32 i386_device::READ32PL0(UINT32 ea)
+uint32_t i386_device::READ32PL0(uint32_t ea)
{
- UINT32 value;
- UINT32 address = ea, error;
+ uint32_t value;
+ uint32_t address = ea, error;
if( !DWORD_ALIGNED(ea) ) { /* Unaligned read */
value = (READ8PL0( address+0 ) << 0);
@@ -711,16 +711,16 @@ UINT32 i386_device::READ32PL0(UINT32 ea)
return value;
}
-void i386_device::WRITE_TEST(UINT32 ea)
+void i386_device::WRITE_TEST(uint32_t ea)
{
- UINT32 address = ea, error;
+ uint32_t address = ea, error;
if(!translate_address(m_CPL,TRANSLATE_WRITE,&address,&error))
PF_THROW(error);
}
-void i386_device::WRITE8(UINT32 ea, UINT8 value)
+void i386_device::WRITE8(uint32_t ea, uint8_t value)
{
- UINT32 address = ea, error;
+ uint32_t address = ea, error;
if(!translate_address(m_CPL,TRANSLATE_WRITE,&address,&error))
PF_THROW(error);
@@ -728,9 +728,9 @@ void i386_device::WRITE8(UINT32 ea, UINT8 value)
address &= m_a20_mask;
m_program->write_byte(address, value);
}
-void i386_device::WRITE16(UINT32 ea, UINT16 value)
+void i386_device::WRITE16(uint32_t ea, uint16_t value)
{
- UINT32 address = ea, error;
+ uint32_t address = ea, error;
if( !WORD_ALIGNED(ea) ) { /* Unaligned write */
WRITE8( address+0, value & 0xff );
@@ -743,9 +743,9 @@ void i386_device::WRITE16(UINT32 ea, UINT16 value)
m_program->write_word(address, value);
}
}
-void i386_device::WRITE32(UINT32 ea, UINT32 value)
+void i386_device::WRITE32(uint32_t ea, uint32_t value)
{
- UINT32 address = ea, error;
+ uint32_t address = ea, error;
if( !DWORD_ALIGNED(ea) ) { /* Unaligned write */
WRITE8( address+0, value & 0xff );
@@ -761,9 +761,9 @@ void i386_device::WRITE32(UINT32 ea, UINT32 value)
}
}
-void i386_device::WRITE64(UINT32 ea, UINT64 value)
+void i386_device::WRITE64(uint32_t ea, uint64_t value)
{
- UINT32 address = ea, error;
+ uint32_t address = ea, error;
if( !QWORD_ALIGNED(ea) ) { /* Unaligned write */
WRITE8( address+0, value & 0xff );
@@ -786,193 +786,193 @@ void i386_device::WRITE64(UINT32 ea, UINT64 value)
/***********************************************************************************/
-UINT8 i386_device::OR8(UINT8 dst, UINT8 src)
+uint8_t i386_device::OR8(uint8_t dst, uint8_t src)
{
- UINT8 res = dst | src;
+ uint8_t res = dst | src;
m_CF = m_OF = 0;
SetSZPF8(res);
return res;
}
-UINT16 i386_device::OR16(UINT16 dst, UINT16 src)
+uint16_t i386_device::OR16(uint16_t dst, uint16_t src)
{
- UINT16 res = dst | src;
+ uint16_t res = dst | src;
m_CF = m_OF = 0;
SetSZPF16(res);
return res;
}
-UINT32 i386_device::OR32(UINT32 dst, UINT32 src)
+uint32_t i386_device::OR32(uint32_t dst, uint32_t src)
{
- UINT32 res = dst | src;
+ uint32_t res = dst | src;
m_CF = m_OF = 0;
SetSZPF32(res);
return res;
}
-UINT8 i386_device::AND8(UINT8 dst, UINT8 src)
+uint8_t i386_device::AND8(uint8_t dst, uint8_t src)
{
- UINT8 res = dst & src;
+ uint8_t res = dst & src;
m_CF = m_OF = 0;
SetSZPF8(res);
return res;
}
-UINT16 i386_device::AND16(UINT16 dst, UINT16 src)
+uint16_t i386_device::AND16(uint16_t dst, uint16_t src)
{
- UINT16 res = dst & src;
+ uint16_t res = dst & src;
m_CF = m_OF = 0;
SetSZPF16(res);
return res;
}
-UINT32 i386_device::AND32(UINT32 dst, UINT32 src)
+uint32_t i386_device::AND32(uint32_t dst, uint32_t src)
{
- UINT32 res = dst & src;
+ uint32_t res = dst & src;
m_CF = m_OF = 0;
SetSZPF32(res);
return res;
}
-UINT8 i386_device::XOR8(UINT8 dst, UINT8 src)
+uint8_t i386_device::XOR8(uint8_t dst, uint8_t src)
{
- UINT8 res = dst ^ src;
+ uint8_t res = dst ^ src;
m_CF = m_OF = 0;
SetSZPF8(res);
return res;
}
-UINT16 i386_device::XOR16(UINT16 dst, UINT16 src)
+uint16_t i386_device::XOR16(uint16_t dst, uint16_t src)
{
- UINT16 res = dst ^ src;
+ uint16_t res = dst ^ src;
m_CF = m_OF = 0;
SetSZPF16(res);
return res;
}
-UINT32 i386_device::XOR32(UINT32 dst, UINT32 src)
+uint32_t i386_device::XOR32(uint32_t dst, uint32_t src)
{
- UINT32 res = dst ^ src;
+ uint32_t res = dst ^ src;
m_CF = m_OF = 0;
SetSZPF32(res);
return res;
}
#define SUB8(dst, src) SBB8(dst, src, 0)
-UINT8 i386_device::SBB8(UINT8 dst, UINT8 src, UINT8 b)
+uint8_t i386_device::SBB8(uint8_t dst, uint8_t src, uint8_t b)
{
- UINT16 res = (UINT16)dst - (UINT16)src - (UINT8)b;
+ uint16_t res = (uint16_t)dst - (uint16_t)src - (uint8_t)b;
SetCF8(res);
SetOF_Sub8(res,src,dst);
SetAF(res,src,dst);
SetSZPF8(res);
- return (UINT8)res;
+ return (uint8_t)res;
}
#define SUB16(dst, src) SBB16(dst, src, 0)
-UINT16 i386_device::SBB16(UINT16 dst, UINT16 src, UINT16 b)
+uint16_t i386_device::SBB16(uint16_t dst, uint16_t src, uint16_t b)
{
- UINT32 res = (UINT32)dst - (UINT32)src - (UINT32)b;
+ uint32_t res = (uint32_t)dst - (uint32_t)src - (uint32_t)b;
SetCF16(res);
SetOF_Sub16(res,src,dst);
SetAF(res,src,dst);
SetSZPF16(res);
- return (UINT16)res;
+ return (uint16_t)res;
}
#define SUB32(dst, src) SBB32(dst, src, 0)
-UINT32 i386_device::SBB32(UINT32 dst, UINT32 src, UINT32 b)
+uint32_t i386_device::SBB32(uint32_t dst, uint32_t src, uint32_t b)
{
- UINT64 res = (UINT64)dst - (UINT64)src - (UINT64) b;
+ uint64_t res = (uint64_t)dst - (uint64_t)src - (uint64_t) b;
SetCF32(res);
SetOF_Sub32(res,src,dst);
SetAF(res,src,dst);
SetSZPF32(res);
- return (UINT32)res;
+ return (uint32_t)res;
}
#define ADD8(dst, src) ADC8(dst, src, 0)
-UINT8 i386_device::ADC8(UINT8 dst, UINT8 src, UINT8 c)
+uint8_t i386_device::ADC8(uint8_t dst, uint8_t src, uint8_t c)
{
- UINT16 res = (UINT16)dst + (UINT16)src + (UINT16)c;
+ uint16_t res = (uint16_t)dst + (uint16_t)src + (uint16_t)c;
SetCF8(res);
SetOF_Add8(res,src,dst);
SetAF(res,src,dst);
SetSZPF8(res);
- return (UINT8)res;
+ return (uint8_t)res;
}
#define ADD16(dst, src) ADC16(dst, src, 0)
-UINT16 i386_device::ADC16(UINT16 dst, UINT16 src, UINT8 c)
+uint16_t i386_device::ADC16(uint16_t dst, uint16_t src, uint8_t c)
{
- UINT32 res = (UINT32)dst + (UINT32)src + (UINT32)c;
+ uint32_t res = (uint32_t)dst + (uint32_t)src + (uint32_t)c;
SetCF16(res);
SetOF_Add16(res,src,dst);
SetAF(res,src,dst);
SetSZPF16(res);
- return (UINT16)res;
+ return (uint16_t)res;
}
#define ADD32(dst, src) ADC32(dst, src, 0)
-UINT32 i386_device::ADC32(UINT32 dst, UINT32 src, UINT32 c)
+uint32_t i386_device::ADC32(uint32_t dst, uint32_t src, uint32_t c)
{
- UINT64 res = (UINT64)dst + (UINT64)src + (UINT64) c;
+ uint64_t res = (uint64_t)dst + (uint64_t)src + (uint64_t) c;
SetCF32(res);
SetOF_Add32(res,src,dst);
SetAF(res,src,dst);
SetSZPF32(res);
- return (UINT32)res;
+ return (uint32_t)res;
}
-UINT8 i386_device::INC8(UINT8 dst)
+uint8_t i386_device::INC8(uint8_t dst)
{
- UINT16 res = (UINT16)dst + 1;
+ uint16_t res = (uint16_t)dst + 1;
SetOF_Add8(res,1,dst);
SetAF(res,1,dst);
SetSZPF8(res);
- return (UINT8)res;
+ return (uint8_t)res;
}
-UINT16 i386_device::INC16(UINT16 dst)
+uint16_t i386_device::INC16(uint16_t dst)
{
- UINT32 res = (UINT32)dst + 1;
+ uint32_t res = (uint32_t)dst + 1;
SetOF_Add16(res,1,dst);
SetAF(res,1,dst);
SetSZPF16(res);
- return (UINT16)res;
+ return (uint16_t)res;
}
-UINT32 i386_device::INC32(UINT32 dst)
+uint32_t i386_device::INC32(uint32_t dst)
{
- UINT64 res = (UINT64)dst + 1;
+ uint64_t res = (uint64_t)dst + 1;
SetOF_Add32(res,1,dst);
SetAF(res,1,dst);
SetSZPF32(res);
- return (UINT32)res;
+ return (uint32_t)res;
}
-UINT8 i386_device::DEC8(UINT8 dst)
+uint8_t i386_device::DEC8(uint8_t dst)
{
- UINT16 res = (UINT16)dst - 1;
+ uint16_t res = (uint16_t)dst - 1;
SetOF_Sub8(res,1,dst);
SetAF(res,1,dst);
SetSZPF8(res);
- return (UINT8)res;
+ return (uint8_t)res;
}
-UINT16 i386_device::DEC16(UINT16 dst)
+uint16_t i386_device::DEC16(uint16_t dst)
{
- UINT32 res = (UINT32)dst - 1;
+ uint32_t res = (uint32_t)dst - 1;
SetOF_Sub16(res,1,dst);
SetAF(res,1,dst);
SetSZPF16(res);
- return (UINT16)res;
+ return (uint16_t)res;
}
-UINT32 i386_device::DEC32(UINT32 dst)
+uint32_t i386_device::DEC32(uint32_t dst)
{
- UINT64 res = (UINT64)dst - 1;
+ uint64_t res = (uint64_t)dst - 1;
SetOF_Sub32(res,1,dst);
SetAF(res,1,dst);
SetSZPF32(res);
- return (UINT32)res;
+ return (uint32_t)res;
}
-void i386_device::PUSH16(UINT16 value)
+void i386_device::PUSH16(uint16_t value)
{
- UINT32 ea, new_esp;
+ uint32_t ea, new_esp;
if( STACK_32BIT ) {
new_esp = REG32(ESP) - 2;
ea = i386_translate(SS, new_esp, 1);
@@ -985,9 +985,9 @@ void i386_device::PUSH16(UINT16 value)
REG16(SP) = new_esp;
}
}
-void i386_device::PUSH32(UINT32 value)
+void i386_device::PUSH32(uint32_t value)
{
- UINT32 ea, new_esp;
+ uint32_t ea, new_esp;
if( STACK_32BIT ) {
new_esp = REG32(ESP) - 4;
ea = i386_translate(SS, new_esp, 1);
@@ -1001,9 +1001,9 @@ void i386_device::PUSH32(UINT32 value)
}
}
-void i386_device::PUSH32SEG(UINT32 value)
+void i386_device::PUSH32SEG(uint32_t value)
{
- UINT32 ea, new_esp;
+ uint32_t ea, new_esp;
if( STACK_32BIT ) {
new_esp = REG32(ESP) - 4;
ea = i386_translate(SS, new_esp, 1);
@@ -1017,19 +1017,19 @@ void i386_device::PUSH32SEG(UINT32 value)
}
}
-void i386_device::PUSH8(UINT8 value)
+void i386_device::PUSH8(uint8_t value)
{
if( m_operand_size ) {
- PUSH32((INT32)(INT8)value);
+ PUSH32((int32_t)(int8_t)value);
} else {
- PUSH16((INT16)(INT8)value);
+ PUSH16((int16_t)(int8_t)value);
}
}
-UINT8 i386_device::POP8()
+uint8_t i386_device::POP8()
{
- UINT8 value;
- UINT32 ea, new_esp;
+ uint8_t value;
+ uint32_t ea, new_esp;
if( STACK_32BIT ) {
new_esp = REG32(ESP) + 1;
ea = i386_translate(SS, new_esp - 1, 0);
@@ -1043,10 +1043,10 @@ UINT8 i386_device::POP8()
}
return value;
}
-UINT16 i386_device::POP16()
+uint16_t i386_device::POP16()
{
- UINT16 value;
- UINT32 ea, new_esp;
+ uint16_t value;
+ uint32_t ea, new_esp;
if( STACK_32BIT ) {
new_esp = REG32(ESP) + 2;
ea = i386_translate(SS, new_esp - 2, 0);
@@ -1060,10 +1060,10 @@ UINT16 i386_device::POP16()
}
return value;
}
-UINT32 i386_device::POP32()
+uint32_t i386_device::POP32()
{
- UINT32 value;
- UINT32 ea, new_esp;
+ uint32_t value;
+ uint32_t ea, new_esp;
if( STACK_32BIT ) {
new_esp = REG32(ESP) + 4;
ea = i386_translate(SS, new_esp - 4, 0);
@@ -1100,11 +1100,11 @@ void i386_device::BUMP_DI(int adjustment)
I/O ACCESS
***********************************************************************************/
-void i386_device::check_ioperm(offs_t port, UINT8 mask)
+void i386_device::check_ioperm(offs_t port, uint8_t mask)
{
- UINT8 IOPL, map;
- UINT16 IOPB;
- UINT32 address;
+ uint8_t IOPL, map;
+ uint16_t IOPB;
+ uint32_t address;
if(!PROTECTED_MODE)
return;
@@ -1127,23 +1127,23 @@ void i386_device::check_ioperm(offs_t port, UINT8 mask)
FAULT_THROW(FAULT_GP,0);
}
-UINT8 i386_device::READPORT8(offs_t port)
+uint8_t i386_device::READPORT8(offs_t port)
{
check_ioperm(port, 1);
return m_io->read_byte(port);
}
-void i386_device::WRITEPORT8(offs_t port, UINT8 value)
+void i386_device::WRITEPORT8(offs_t port, uint8_t value)
{
check_ioperm(port, 1);
m_io->write_byte(port, value);
}
-UINT16 i386_device::READPORT16(offs_t port)
+uint16_t i386_device::READPORT16(offs_t port)
{
if (port & 1)
{
- UINT16 value = READPORT8(port);
+ uint16_t value = READPORT8(port);
value |= (READPORT8(port + 1) << 8);
return value;
}
@@ -1154,7 +1154,7 @@ UINT16 i386_device::READPORT16(offs_t port)
}
}
-void i386_device::WRITEPORT16(offs_t port, UINT16 value)
+void i386_device::WRITEPORT16(offs_t port, uint16_t value)
{
if (port & 1)
{
@@ -1168,11 +1168,11 @@ void i386_device::WRITEPORT16(offs_t port, UINT16 value)
}
}
-UINT32 i386_device::READPORT32(offs_t port)
+uint32_t i386_device::READPORT32(offs_t port)
{
if (port & 3)
{
- UINT32 value = READPORT8(port);
+ uint32_t value = READPORT8(port);
value |= (READPORT8(port + 1) << 8);
value |= (READPORT8(port + 2) << 16);
value |= (READPORT8(port + 3) << 24);
@@ -1185,7 +1185,7 @@ UINT32 i386_device::READPORT32(offs_t port)
}
}
-void i386_device::WRITEPORT32(offs_t port, UINT32 value)
+void i386_device::WRITEPORT32(offs_t port, uint32_t value)
{
if (port & 3)
{
@@ -1206,7 +1206,7 @@ void i386_device::WRITEPORT32(offs_t port, UINT32 value)
***********************************************************************************/
// Pentium MSR handling
-UINT64 i386_device::pentium_msr_read(UINT32 offset,UINT8 *valid_msr)
+uint64_t i386_device::pentium_msr_read(uint32_t offset,uint8_t *valid_msr)
{
switch(offset)
{
@@ -1249,7 +1249,7 @@ UINT64 i386_device::pentium_msr_read(UINT32 offset,UINT8 *valid_msr)
return -1;
}
-void i386_device::pentium_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr)
+void i386_device::pentium_msr_write(uint32_t offset, uint64_t data, uint8_t *valid_msr)
{
switch(offset)
{
@@ -1288,14 +1288,14 @@ void i386_device::pentium_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr
logerror("WRMSR: Writing test MSR %x", offset);
break;
}
- logerror("WRMSR: invalid MSR write %08x (%08x%08x) at %08x\n",offset,(UINT32)(data >> 32),(UINT32)data,m_pc-2);
+ logerror("WRMSR: invalid MSR write %08x (%08x%08x) at %08x\n",offset,(uint32_t)(data >> 32),(uint32_t)data,m_pc-2);
*valid_msr = 0;
break;
}
}
// P6 (Pentium Pro, Pentium II, Pentium III) MSR handling
-UINT64 i386_device::p6_msr_read(UINT32 offset,UINT8 *valid_msr)
+uint64_t i386_device::p6_msr_read(uint32_t offset,uint8_t *valid_msr)
{
switch(offset)
{
@@ -1328,7 +1328,7 @@ UINT64 i386_device::p6_msr_read(UINT32 offset,UINT8 *valid_msr)
return -1;
}
-void i386_device::p6_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr)
+void i386_device::p6_msr_write(uint32_t offset, uint64_t data, uint8_t *valid_msr)
{
switch(offset)
{
@@ -1348,7 +1348,7 @@ void i386_device::p6_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr)
*valid_msr = 1;
break;
default:
- logerror("WRMSR: unimplemented register called %08x (%08x%08x) at %08x\n",offset,(UINT32)(data >> 32),(UINT32)data,m_pc-2);
+ logerror("WRMSR: unimplemented register called %08x (%08x%08x) at %08x\n",offset,(uint32_t)(data >> 32),(uint32_t)data,m_pc-2);
*valid_msr = 1;
break;
}
@@ -1356,7 +1356,7 @@ void i386_device::p6_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr)
// PIV (Pentium 4+)
-UINT64 i386_device::piv_msr_read(UINT32 offset,UINT8 *valid_msr)
+uint64_t i386_device::piv_msr_read(uint32_t offset,uint8_t *valid_msr)
{
switch(offset)
{
@@ -1368,21 +1368,21 @@ UINT64 i386_device::piv_msr_read(UINT32 offset,UINT8 *valid_msr)
return -1;
}
-void i386_device::piv_msr_write(UINT32 offset, UINT64 data, UINT8 *valid_msr)
+void i386_device::piv_msr_write(uint32_t offset, uint64_t data, uint8_t *valid_msr)
{
switch(offset)
{
default:
- logerror("WRMSR: unimplemented register called %08x (%08x%08x) at %08x\n",offset,(UINT32)(data >> 32),(UINT32)data,m_pc-2);
+ logerror("WRMSR: unimplemented register called %08x (%08x%08x) at %08x\n",offset,(uint32_t)(data >> 32),(uint32_t)data,m_pc-2);
*valid_msr = 1;
break;
}
}
-UINT64 i386_device::MSR_READ(UINT32 offset,UINT8 *valid_msr)
+uint64_t i386_device::MSR_READ(uint32_t offset,uint8_t *valid_msr)
{
- UINT64 res;
- UINT8 cpu_type = (m_cpu_version >> 8) & 0x0f;
+ uint64_t res;
+ uint8_t cpu_type = (m_cpu_version >> 8) & 0x0f;
*valid_msr = 0;
@@ -1405,10 +1405,10 @@ UINT64 i386_device::MSR_READ(UINT32 offset,UINT8 *valid_msr)
return res;
}
-void i386_device::MSR_WRITE(UINT32 offset, UINT64 data, UINT8 *valid_msr)
+void i386_device::MSR_WRITE(uint32_t offset, uint64_t data, uint8_t *valid_msr)
{
*valid_msr = 0;
- UINT8 cpu_type = (m_cpu_version >> 8) & 0x0f;
+ uint8_t cpu_type = (m_cpu_version >> 8) & 0x0f;
switch(cpu_type)
{
diff --git a/src/devices/cpu/i386/i486ops.hxx b/src/devices/cpu/i386/i486ops.hxx
index 8be406692d4..2db6a8eada0 100644
--- a/src/devices/cpu/i386/i486ops.hxx
+++ b/src/devices/cpu/i386/i486ops.hxx
@@ -48,10 +48,10 @@ void i386_device::i486_wbinvd() // Opcode 0x0f 09
void i386_device::i486_cmpxchg_rm8_r8() // Opcode 0x0f b0
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT8 dst = LOAD_RM8(modrm);
- UINT8 src = LOAD_REG8(modrm);
+ uint8_t dst = LOAD_RM8(modrm);
+ uint8_t src = LOAD_REG8(modrm);
if( REG8(AL) == dst ) {
STORE_RM8(modrm, src);
@@ -64,9 +64,9 @@ void i386_device::i486_cmpxchg_rm8_r8() // Opcode 0x0f b0
}
} else {
// TODO: Check write if needed
- UINT32 ea = GetEA(modrm,0);
- UINT8 dst = READ8(ea);
- UINT8 src = LOAD_REG8(modrm);
+ uint32_t ea = GetEA(modrm,0);
+ uint8_t dst = READ8(ea);
+ uint8_t src = LOAD_REG8(modrm);
if( REG8(AL) == dst ) {
WRITE8(ea, src);
@@ -82,10 +82,10 @@ void i386_device::i486_cmpxchg_rm8_r8() // Opcode 0x0f b0
void i386_device::i486_cmpxchg_rm16_r16() // Opcode 0x0f b1
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 src = LOAD_REG16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t src = LOAD_REG16(modrm);
if( REG16(AX) == dst ) {
STORE_RM16(modrm, src);
@@ -97,9 +97,9 @@ void i386_device::i486_cmpxchg_rm16_r16() // Opcode 0x0f b1
CYCLES(CYCLES_CMPXCHG_REG_REG_F);
}
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT16 dst = READ16(ea);
- UINT16 src = LOAD_REG16(modrm);
+ uint32_t ea = GetEA(modrm,0);
+ uint16_t dst = READ16(ea);
+ uint16_t src = LOAD_REG16(modrm);
if( REG16(AX) == dst ) {
WRITE16(ea, src);
@@ -115,10 +115,10 @@ void i386_device::i486_cmpxchg_rm16_r16() // Opcode 0x0f b1
void i386_device::i486_cmpxchg_rm32_r32() // Opcode 0x0f b1
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 src = LOAD_REG32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t src = LOAD_REG32(modrm);
if( REG32(EAX) == dst ) {
STORE_RM32(modrm, src);
@@ -130,9 +130,9 @@ void i386_device::i486_cmpxchg_rm32_r32() // Opcode 0x0f b1
CYCLES(CYCLES_CMPXCHG_REG_REG_F);
}
} else {
- UINT32 ea = GetEA(modrm,0);
- UINT32 dst = READ32(ea);
- UINT32 src = LOAD_REG32(modrm);
+ uint32_t ea = GetEA(modrm,0);
+ uint32_t dst = READ32(ea);
+ uint32_t src = LOAD_REG32(modrm);
if( REG32(EAX) == dst ) {
WRITE32(ea, src);
@@ -148,17 +148,17 @@ void i386_device::i486_cmpxchg_rm32_r32() // Opcode 0x0f b1
void i386_device::i486_xadd_rm8_r8() // Opcode 0x0f c0
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT8 dst = LOAD_RM8(modrm);
- UINT8 src = LOAD_REG8(modrm);
+ uint8_t dst = LOAD_RM8(modrm);
+ uint8_t src = LOAD_REG8(modrm);
STORE_REG8(modrm, dst);
STORE_RM8(modrm, dst + src);
CYCLES(CYCLES_XADD_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT8 dst = READ8(ea);
- UINT8 src = LOAD_REG8(modrm);
+ uint32_t ea = GetEA(modrm,1);
+ uint8_t dst = READ8(ea);
+ uint8_t src = LOAD_REG8(modrm);
WRITE8(ea, dst + src);
STORE_REG8(modrm, dst);
CYCLES(CYCLES_XADD_REG_MEM);
@@ -167,17 +167,17 @@ void i386_device::i486_xadd_rm8_r8() // Opcode 0x0f c0
void i386_device::i486_xadd_rm16_r16() // Opcode 0x0f c1
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 dst = LOAD_RM16(modrm);
- UINT16 src = LOAD_REG16(modrm);
+ uint16_t dst = LOAD_RM16(modrm);
+ uint16_t src = LOAD_REG16(modrm);
STORE_REG16(modrm, dst);
STORE_RM16(modrm, dst + src);
CYCLES(CYCLES_XADD_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT16 dst = READ16(ea);
- UINT16 src = LOAD_REG16(modrm);
+ uint32_t ea = GetEA(modrm,1);
+ uint16_t dst = READ16(ea);
+ uint16_t src = LOAD_REG16(modrm);
WRITE16(ea, dst + src);
STORE_REG16(modrm, dst);
CYCLES(CYCLES_XADD_REG_MEM);
@@ -186,17 +186,17 @@ void i386_device::i486_xadd_rm16_r16() // Opcode 0x0f c1
void i386_device::i486_xadd_rm32_r32() // Opcode 0x0f c1
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 dst = LOAD_RM32(modrm);
- UINT32 src = LOAD_REG32(modrm);
+ uint32_t dst = LOAD_RM32(modrm);
+ uint32_t src = LOAD_REG32(modrm);
STORE_REG32(modrm, dst);
STORE_RM32(modrm, dst + src);
CYCLES(CYCLES_XADD_REG_REG);
} else {
- UINT32 ea = GetEA(modrm,1);
- UINT32 dst = READ32(ea);
- UINT32 src = LOAD_REG32(modrm);
+ uint32_t ea = GetEA(modrm,1);
+ uint32_t dst = READ32(ea);
+ uint32_t src = LOAD_REG32(modrm);
WRITE32(ea, dst + src);
STORE_REG32(modrm, dst);
CYCLES(CYCLES_XADD_REG_MEM);
@@ -205,9 +205,9 @@ void i386_device::i486_xadd_rm32_r32() // Opcode 0x0f c1
void i386_device::i486_group0F01_16() // Opcode 0x0f 01
{
- UINT8 modrm = FETCH();
- UINT16 address;
- UINT32 ea;
+ uint8_t modrm = FETCH();
+ uint16_t address;
+ uint32_t ea;
switch( (modrm >> 3) & 0x7 )
{
@@ -284,7 +284,7 @@ void i386_device::i486_group0F01_16() // Opcode 0x0f 01
}
case 6: /* LMSW */
{
- UINT16 b;
+ uint16_t b;
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP,0)
if( modrm >= 0xc0 ) {
@@ -323,8 +323,8 @@ void i386_device::i486_group0F01_16() // Opcode 0x0f 01
void i386_device::i486_group0F01_32() // Opcode 0x0f 01
{
- UINT8 modrm = FETCH();
- UINT32 address, ea;
+ uint8_t modrm = FETCH();
+ uint32_t address, ea;
switch( (modrm >> 3) & 0x7 )
{
@@ -404,7 +404,7 @@ void i386_device::i486_group0F01_32() // Opcode 0x0f 01
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP,0)
- UINT16 b;
+ uint16_t b;
if( modrm >= 0xc0 ) {
b = LOAD_RM16(modrm);
CYCLES(CYCLES_LMSW_REG);
@@ -491,10 +491,10 @@ void i386_device::i486_mov_cr_r32() // Opcode 0x0f 22
{
if(PROTECTED_MODE && m_CPL)
FAULT(FAULT_GP, 0);
- UINT8 modrm = FETCH();
- UINT8 cr = (modrm >> 3) & 0x7;
- UINT32 oldcr = m_cr[cr];
- UINT32 data = LOAD_RM32(modrm);
+ uint8_t modrm = FETCH();
+ uint8_t cr = (modrm >> 3) & 0x7;
+ uint32_t oldcr = m_cr[cr];
+ uint32_t data = LOAD_RM32(modrm);
switch(cr)
{
case 0:
diff --git a/src/devices/cpu/i386/pentops.hxx b/src/devices/cpu/i386/pentops.hxx
index 3b8eec56499..00b706bd5f2 100644
--- a/src/devices/cpu/i386/pentops.hxx
+++ b/src/devices/cpu/i386/pentops.hxx
@@ -11,52 +11,52 @@ void i386_device::MMXPROLOG()
m_x87_tw = 0; // tag word = 0
}
-void i386_device::READMMX(UINT32 ea,MMX_REG &r)
+void i386_device::READMMX(uint32_t ea,MMX_REG &r)
{
r.q=READ64(ea);
}
-void i386_device::WRITEMMX(UINT32 ea,MMX_REG &r)
+void i386_device::WRITEMMX(uint32_t ea,MMX_REG &r)
{
WRITE64(ea, r.q);
}
-void i386_device::READXMM(UINT32 ea,XMM_REG &r)
+void i386_device::READXMM(uint32_t ea,XMM_REG &r)
{
r.q[0]=READ64(ea);
r.q[1]=READ64(ea+8);
}
-void i386_device::WRITEXMM(UINT32 ea,i386_device::XMM_REG &r)
+void i386_device::WRITEXMM(uint32_t ea,i386_device::XMM_REG &r)
{
WRITE64(ea, r.q[0]);
WRITE64(ea+8, r.q[1]);
}
-void i386_device::READXMM_LO64(UINT32 ea,i386_device::XMM_REG &r)
+void i386_device::READXMM_LO64(uint32_t ea,i386_device::XMM_REG &r)
{
r.q[0]=READ64(ea);
}
-void i386_device::WRITEXMM_LO64(UINT32 ea,i386_device::XMM_REG &r)
+void i386_device::WRITEXMM_LO64(uint32_t ea,i386_device::XMM_REG &r)
{
WRITE64(ea, r.q[0]);
}
-void i386_device::READXMM_HI64(UINT32 ea,i386_device::XMM_REG &r)
+void i386_device::READXMM_HI64(uint32_t ea,i386_device::XMM_REG &r)
{
r.q[1]=READ64(ea);
}
-void i386_device::WRITEXMM_HI64(UINT32 ea,i386_device::XMM_REG &r)
+void i386_device::WRITEXMM_HI64(uint32_t ea,i386_device::XMM_REG &r)
{
WRITE64(ea, r.q[1]);
}
void i386_device::pentium_rdmsr() // Opcode 0x0f 32
{
- UINT64 data;
- UINT8 valid_msr = 0;
+ uint64_t data;
+ uint8_t valid_msr = 0;
data = MSR_READ(REG32(ECX),&valid_msr);
REG32(EDX) = data >> 32;
@@ -70,11 +70,11 @@ void i386_device::pentium_rdmsr() // Opcode 0x0f 32
void i386_device::pentium_wrmsr() // Opcode 0x0f 30
{
- UINT64 data;
- UINT8 valid_msr = 0;
+ uint64_t data;
+ uint8_t valid_msr = 0;
- data = (UINT64)REG32(EAX);
- data |= (UINT64)(REG32(EDX)) << 32;
+ data = (uint64_t)REG32(EAX);
+ data |= (uint64_t)(REG32(EDX)) << 32;
MSR_WRITE(REG32(ECX),data,&valid_msr);
@@ -86,9 +86,9 @@ void i386_device::pentium_wrmsr() // Opcode 0x0f 30
void i386_device::pentium_rdtsc() // Opcode 0x0f 31
{
- UINT64 ts = m_tsc + (m_base_cycles - m_cycles);
- REG32(EAX) = (UINT32)(ts);
- REG32(EDX) = (UINT32)(ts >> 32);
+ uint64_t ts = m_tsc + (m_base_cycles - m_cycles);
+ REG32(EAX) = (uint32_t)(ts);
+ REG32(EDX) = (uint32_t)(ts >> 32);
CYCLES(CYCLES_RDTSC);
}
@@ -100,7 +100,7 @@ void i386_device::pentium_ud2() // Opcode 0x0f 0b
void i386_device::pentium_rsm()
{
- UINT32 smram_state = m_smbase + 0xfe00;
+ uint32_t smram_state = m_smbase + 0xfe00;
if(!m_smm)
{
logerror("i386: Invalid RSM outside SMM at %08X\n", m_pc - 1);
@@ -197,15 +197,15 @@ void i386_device::pentium_rsm()
void i386_device::pentium_prefetch_m8() // Opcode 0x0f 18
{
- UINT8 modrm = FETCH();
- UINT32 ea = GetEA(modrm,0);
+ uint8_t modrm = FETCH();
+ uint32_t ea = GetEA(modrm,0);
CYCLES(1+(ea & 1)); // TODO: correct cycle count
}
void i386_device::pentium_cmovo_r16_rm16() // Opcode 0x0f 40
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -218,7 +218,7 @@ void i386_device::pentium_cmovo_r16_rm16() // Opcode 0x0f 40
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_OF == 1)
{
src = READ16(ea);
@@ -230,8 +230,8 @@ void i386_device::pentium_cmovo_r16_rm16() // Opcode 0x0f 40
void i386_device::pentium_cmovo_r32_rm32() // Opcode 0x0f 40
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -244,7 +244,7 @@ void i386_device::pentium_cmovo_r32_rm32() // Opcode 0x0f 40
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_OF == 1)
{
src = READ32(ea);
@@ -256,8 +256,8 @@ void i386_device::pentium_cmovo_r32_rm32() // Opcode 0x0f 40
void i386_device::pentium_cmovno_r16_rm16() // Opcode 0x0f 41
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -270,7 +270,7 @@ void i386_device::pentium_cmovno_r16_rm16() // Opcode 0x0f 41
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_OF == 0)
{
src = READ16(ea);
@@ -282,8 +282,8 @@ void i386_device::pentium_cmovno_r16_rm16() // Opcode 0x0f 41
void i386_device::pentium_cmovno_r32_rm32() // Opcode 0x0f 41
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -296,7 +296,7 @@ void i386_device::pentium_cmovno_r32_rm32() // Opcode 0x0f 41
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_OF == 0)
{
src = READ32(ea);
@@ -308,8 +308,8 @@ void i386_device::pentium_cmovno_r32_rm32() // Opcode 0x0f 41
void i386_device::pentium_cmovb_r16_rm16() // Opcode 0x0f 42
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -322,7 +322,7 @@ void i386_device::pentium_cmovb_r16_rm16() // Opcode 0x0f 42
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_CF == 1)
{
src = READ16(ea);
@@ -334,8 +334,8 @@ void i386_device::pentium_cmovb_r16_rm16() // Opcode 0x0f 42
void i386_device::pentium_cmovb_r32_rm32() // Opcode 0x0f 42
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -348,7 +348,7 @@ void i386_device::pentium_cmovb_r32_rm32() // Opcode 0x0f 42
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_CF == 1)
{
src = READ32(ea);
@@ -360,8 +360,8 @@ void i386_device::pentium_cmovb_r32_rm32() // Opcode 0x0f 42
void i386_device::pentium_cmovae_r16_rm16() // Opcode 0x0f 43
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -374,7 +374,7 @@ void i386_device::pentium_cmovae_r16_rm16() // Opcode 0x0f 43
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_CF == 0)
{
src = READ16(ea);
@@ -386,8 +386,8 @@ void i386_device::pentium_cmovae_r16_rm16() // Opcode 0x0f 43
void i386_device::pentium_cmovae_r32_rm32() // Opcode 0x0f 43
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -400,7 +400,7 @@ void i386_device::pentium_cmovae_r32_rm32() // Opcode 0x0f 43
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_CF == 0)
{
src = READ32(ea);
@@ -412,8 +412,8 @@ void i386_device::pentium_cmovae_r32_rm32() // Opcode 0x0f 43
void i386_device::pentium_cmove_r16_rm16() // Opcode 0x0f 44
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -426,7 +426,7 @@ void i386_device::pentium_cmove_r16_rm16() // Opcode 0x0f 44
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_ZF == 1)
{
src = READ16(ea);
@@ -438,8 +438,8 @@ void i386_device::pentium_cmove_r16_rm16() // Opcode 0x0f 44
void i386_device::pentium_cmove_r32_rm32() // Opcode 0x0f 44
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -452,7 +452,7 @@ void i386_device::pentium_cmove_r32_rm32() // Opcode 0x0f 44
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_ZF == 1)
{
src = READ32(ea);
@@ -464,8 +464,8 @@ void i386_device::pentium_cmove_r32_rm32() // Opcode 0x0f 44
void i386_device::pentium_cmovne_r16_rm16() // Opcode 0x0f 45
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -478,7 +478,7 @@ void i386_device::pentium_cmovne_r16_rm16() // Opcode 0x0f 45
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_ZF == 0)
{
src = READ16(ea);
@@ -490,8 +490,8 @@ void i386_device::pentium_cmovne_r16_rm16() // Opcode 0x0f 45
void i386_device::pentium_cmovne_r32_rm32() // Opcode 0x0f 45
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -504,7 +504,7 @@ void i386_device::pentium_cmovne_r32_rm32() // Opcode 0x0f 45
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_ZF == 0)
{
src = READ32(ea);
@@ -516,8 +516,8 @@ void i386_device::pentium_cmovne_r32_rm32() // Opcode 0x0f 45
void i386_device::pentium_cmovbe_r16_rm16() // Opcode 0x0f 46
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -530,7 +530,7 @@ void i386_device::pentium_cmovbe_r16_rm16() // Opcode 0x0f 46
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if ((m_CF == 1) || (m_ZF == 1))
{
src = READ16(ea);
@@ -542,8 +542,8 @@ void i386_device::pentium_cmovbe_r16_rm16() // Opcode 0x0f 46
void i386_device::pentium_cmovbe_r32_rm32() // Opcode 0x0f 46
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -556,7 +556,7 @@ void i386_device::pentium_cmovbe_r32_rm32() // Opcode 0x0f 46
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if ((m_CF == 1) || (m_ZF == 1))
{
src = READ32(ea);
@@ -568,8 +568,8 @@ void i386_device::pentium_cmovbe_r32_rm32() // Opcode 0x0f 46
void i386_device::pentium_cmova_r16_rm16() // Opcode 0x0f 47
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -582,7 +582,7 @@ void i386_device::pentium_cmova_r16_rm16() // Opcode 0x0f 47
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if ((m_CF == 0) && (m_ZF == 0))
{
src = READ16(ea);
@@ -594,8 +594,8 @@ void i386_device::pentium_cmova_r16_rm16() // Opcode 0x0f 47
void i386_device::pentium_cmova_r32_rm32() // Opcode 0x0f 47
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -608,7 +608,7 @@ void i386_device::pentium_cmova_r32_rm32() // Opcode 0x0f 47
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if ((m_CF == 0) && (m_ZF == 0))
{
src = READ32(ea);
@@ -620,8 +620,8 @@ void i386_device::pentium_cmova_r32_rm32() // Opcode 0x0f 47
void i386_device::pentium_cmovs_r16_rm16() // Opcode 0x0f 48
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -634,7 +634,7 @@ void i386_device::pentium_cmovs_r16_rm16() // Opcode 0x0f 48
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_SF == 1)
{
src = READ16(ea);
@@ -646,8 +646,8 @@ void i386_device::pentium_cmovs_r16_rm16() // Opcode 0x0f 48
void i386_device::pentium_cmovs_r32_rm32() // Opcode 0x0f 48
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -660,7 +660,7 @@ void i386_device::pentium_cmovs_r32_rm32() // Opcode 0x0f 48
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_SF == 1)
{
src = READ32(ea);
@@ -672,8 +672,8 @@ void i386_device::pentium_cmovs_r32_rm32() // Opcode 0x0f 48
void i386_device::pentium_cmovns_r16_rm16() // Opcode 0x0f 49
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -686,7 +686,7 @@ void i386_device::pentium_cmovns_r16_rm16() // Opcode 0x0f 49
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_SF == 0)
{
src = READ16(ea);
@@ -698,8 +698,8 @@ void i386_device::pentium_cmovns_r16_rm16() // Opcode 0x0f 49
void i386_device::pentium_cmovns_r32_rm32() // Opcode 0x0f 49
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -712,7 +712,7 @@ void i386_device::pentium_cmovns_r32_rm32() // Opcode 0x0f 49
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_SF == 0)
{
src = READ32(ea);
@@ -724,8 +724,8 @@ void i386_device::pentium_cmovns_r32_rm32() // Opcode 0x0f 49
void i386_device::pentium_cmovp_r16_rm16() // Opcode 0x0f 4a
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -738,7 +738,7 @@ void i386_device::pentium_cmovp_r16_rm16() // Opcode 0x0f 4a
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_PF == 1)
{
src = READ16(ea);
@@ -750,8 +750,8 @@ void i386_device::pentium_cmovp_r16_rm16() // Opcode 0x0f 4a
void i386_device::pentium_cmovp_r32_rm32() // Opcode 0x0f 4a
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -764,7 +764,7 @@ void i386_device::pentium_cmovp_r32_rm32() // Opcode 0x0f 4a
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_PF == 1)
{
src = READ32(ea);
@@ -776,8 +776,8 @@ void i386_device::pentium_cmovp_r32_rm32() // Opcode 0x0f 4a
void i386_device::pentium_cmovnp_r16_rm16() // Opcode 0x0f 4b
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -790,7 +790,7 @@ void i386_device::pentium_cmovnp_r16_rm16() // Opcode 0x0f 4b
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_PF == 0)
{
src = READ16(ea);
@@ -802,8 +802,8 @@ void i386_device::pentium_cmovnp_r16_rm16() // Opcode 0x0f 4b
void i386_device::pentium_cmovnp_r32_rm32() // Opcode 0x0f 4b
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -816,7 +816,7 @@ void i386_device::pentium_cmovnp_r32_rm32() // Opcode 0x0f 4b
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_PF == 0)
{
src = READ32(ea);
@@ -828,8 +828,8 @@ void i386_device::pentium_cmovnp_r32_rm32() // Opcode 0x0f 4b
void i386_device::pentium_cmovl_r16_rm16() // Opcode 0x0f 4c
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -842,7 +842,7 @@ void i386_device::pentium_cmovl_r16_rm16() // Opcode 0x0f 4c
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_SF != m_OF)
{
src = READ16(ea);
@@ -854,8 +854,8 @@ void i386_device::pentium_cmovl_r16_rm16() // Opcode 0x0f 4c
void i386_device::pentium_cmovl_r32_rm32() // Opcode 0x0f 4c
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -868,7 +868,7 @@ void i386_device::pentium_cmovl_r32_rm32() // Opcode 0x0f 4c
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_SF != m_OF)
{
src = READ32(ea);
@@ -880,8 +880,8 @@ void i386_device::pentium_cmovl_r32_rm32() // Opcode 0x0f 4c
void i386_device::pentium_cmovge_r16_rm16() // Opcode 0x0f 4d
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -894,7 +894,7 @@ void i386_device::pentium_cmovge_r16_rm16() // Opcode 0x0f 4d
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_SF == m_OF)
{
src = READ16(ea);
@@ -906,8 +906,8 @@ void i386_device::pentium_cmovge_r16_rm16() // Opcode 0x0f 4d
void i386_device::pentium_cmovge_r32_rm32() // Opcode 0x0f 4d
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -920,7 +920,7 @@ void i386_device::pentium_cmovge_r32_rm32() // Opcode 0x0f 4d
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if (m_SF == m_OF)
{
src = READ32(ea);
@@ -932,8 +932,8 @@ void i386_device::pentium_cmovge_r32_rm32() // Opcode 0x0f 4d
void i386_device::pentium_cmovle_r16_rm16() // Opcode 0x0f 4e
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -946,7 +946,7 @@ void i386_device::pentium_cmovle_r16_rm16() // Opcode 0x0f 4e
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if ((m_ZF == 1) || (m_SF != m_OF))
{
src = READ16(ea);
@@ -958,8 +958,8 @@ void i386_device::pentium_cmovle_r16_rm16() // Opcode 0x0f 4e
void i386_device::pentium_cmovle_r32_rm32() // Opcode 0x0f 4e
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -972,7 +972,7 @@ void i386_device::pentium_cmovle_r32_rm32() // Opcode 0x0f 4e
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if ((m_ZF == 1) || (m_SF != m_OF))
{
src = READ32(ea);
@@ -984,8 +984,8 @@ void i386_device::pentium_cmovle_r32_rm32() // Opcode 0x0f 4e
void i386_device::pentium_cmovg_r16_rm16() // Opcode 0x0f 4f
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -998,7 +998,7 @@ void i386_device::pentium_cmovg_r16_rm16() // Opcode 0x0f 4f
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if ((m_ZF == 0) && (m_SF == m_OF))
{
src = READ16(ea);
@@ -1010,8 +1010,8 @@ void i386_device::pentium_cmovg_r16_rm16() // Opcode 0x0f 4f
void i386_device::pentium_cmovg_r32_rm32() // Opcode 0x0f 4f
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 )
{
@@ -1024,7 +1024,7 @@ void i386_device::pentium_cmovg_r32_rm32() // Opcode 0x0f 4f
}
else
{
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
if ((m_ZF == 0) && (m_SF == m_OF))
{
src = READ32(ea);
@@ -1036,13 +1036,13 @@ void i386_device::pentium_cmovg_r32_rm32() // Opcode 0x0f 4f
void i386_device::pentium_movnti_m16_r16() // Opcode 0f c3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// since cache is not implemented
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITE16(ea,LOAD_RM16(modrm));
CYCLES(1); // TODO: correct cycle count
}
@@ -1050,13 +1050,13 @@ void i386_device::pentium_movnti_m16_r16() // Opcode 0f c3
void i386_device::pentium_movnti_m32_r32() // Opcode 0f c3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// since cache is not implemented
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITE32(ea,LOAD_RM32(modrm));
CYCLES(1); // TODO: correct cycle count
}
@@ -1083,22 +1083,22 @@ void i386_device::i386_cyrix_unknown() // Opcode 0x0f 74
void i386_device::pentium_cmpxchg8b_m64() // Opcode 0x0f c7
{
- UINT8 modm = FETCH();
+ uint8_t modm = FETCH();
if( modm >= 0xc0 ) {
report_invalid_modrm("cmpxchg8b_m64", modm);
} else {
- UINT32 ea = GetEA(modm, 0);
- UINT64 value = READ64(ea);
- UINT64 edx_eax = (((UINT64) REG32(EDX)) << 32) | REG32(EAX);
- UINT64 ecx_ebx = (((UINT64) REG32(ECX)) << 32) | REG32(EBX);
+ uint32_t ea = GetEA(modm, 0);
+ uint64_t value = READ64(ea);
+ uint64_t edx_eax = (((uint64_t) REG32(EDX)) << 32) | REG32(EAX);
+ uint64_t ecx_ebx = (((uint64_t) REG32(ECX)) << 32) | REG32(EBX);
if( value == edx_eax ) {
WRITE64(ea, ecx_ebx);
m_ZF = 1;
CYCLES(CYCLES_CMPXCHG_REG_MEM_T);
} else {
- REG32(EDX) = (UINT32) (value >> 32);
- REG32(EAX) = (UINT32) (value >> 0);
+ REG32(EDX) = (uint32_t) (value >> 32);
+ REG32(EAX) = (uint32_t) (value >> 0);
m_ZF = 0;
CYCLES(CYCLES_CMPXCHG_REG_MEM_F);
}
@@ -1108,12 +1108,12 @@ void i386_device::pentium_cmpxchg8b_m64() // Opcode 0x0f c7
void i386_device::pentium_movntq_m64_r64() // Opcode 0f e7
{
//MMXPROLOG(); // TODO: check if needed
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
CYCLES(1); // unsupported
} else {
// since cache is not implemented
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEMMX(ea, MMX((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -1122,8 +1122,8 @@ void i386_device::pentium_movntq_m64_r64() // Opcode 0f e7
void i386_device::pentium_maskmovq_r64_r64() // Opcode 0f f7
{
int s,m,n;
- UINT8 modm = FETCH();
- UINT32 ea = GetEA(7, 0); // ds:di/edi/rdi register
+ uint8_t modm = FETCH();
+ uint32_t ea = GetEA(7, 0); // ds:di/edi/rdi register
MMXPROLOG();
s=(modm >> 3) & 7;
m=modm & 7;
@@ -1135,8 +1135,8 @@ void i386_device::pentium_maskmovq_r64_r64() // Opcode 0f f7
void i386_device::sse_maskmovdqu_r128_r128() // Opcode 66 0f f7
{
int s,m,n;
- UINT8 modm = FETCH();
- UINT32 ea = GetEA(7, 0); // ds:di/edi/rdi register
+ uint8_t modm = FETCH();
+ uint32_t ea = GetEA(7, 0); // ds:di/edi/rdi register
s=(modm >> 3) & 7;
m=modm & 7;
for (n=0;n < 16;n++)
@@ -1146,14 +1146,14 @@ void i386_device::sse_maskmovdqu_r128_r128() // Opcode 66 0f f7
void i386_device::pentium_popcnt_r16_rm16() // Opcode f3 0f b8
{
- UINT16 src;
- UINT8 modrm = FETCH();
+ uint16_t src;
+ uint8_t modrm = FETCH();
int n,count;
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ16(ea);
}
count=0;
@@ -1167,14 +1167,14 @@ void i386_device::pentium_popcnt_r16_rm16() // Opcode f3 0f b8
void i386_device::pentium_popcnt_r32_rm32() // Opcode f3 0f b8
{
- UINT32 src;
- UINT8 modrm = FETCH();
+ uint32_t src;
+ uint8_t modrm = FETCH();
int n,count;
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
} else {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
src = READ32(ea);
}
count=0;
@@ -1200,46 +1200,46 @@ void i386_device::pentium_tzcnt_r32_rm32()
// TODO: actually implement TZCNT
}
-static inline INT8 SaturatedSignedWordToSignedByte(INT16 word)
+static inline int8_t SaturatedSignedWordToSignedByte(int16_t word)
{
if (word > 127)
return 127;
if (word < -128)
return -128;
- return (INT8)word;
+ return (int8_t)word;
}
-static inline UINT8 SaturatedSignedWordToUnsignedByte(INT16 word)
+static inline uint8_t SaturatedSignedWordToUnsignedByte(int16_t word)
{
if (word > 255)
return 255;
if (word < 0)
return 0;
- return (UINT8)word;
+ return (uint8_t)word;
}
-static inline INT16 SaturatedSignedDwordToSignedWord(INT32 dword)
+static inline int16_t SaturatedSignedDwordToSignedWord(int32_t dword)
{
if (dword > 32767)
return 32767;
if (dword < -32768)
return -32768;
- return (INT16)dword;
+ return (int16_t)dword;
}
-static inline UINT16 SaturatedSignedDwordToUnsignedWord(INT32 dword)
+static inline uint16_t SaturatedSignedDwordToUnsignedWord(int32_t dword)
{
if (dword > 65535)
return 65535;
if (dword < 0)
return 0;
- return (UINT16)dword;
+ return (uint16_t)dword;
}
void i386_device::mmx_group_0f71() // Opcode 0f 71
{
- UINT8 modm = FETCH();
- UINT8 imm8 = FETCH();
+ uint8_t modm = FETCH();
+ uint8_t imm8 = FETCH();
MMXPROLOG();
if( modm >= 0xc0 ) {
switch ( (modm & 0x38) >> 3 )
@@ -1270,8 +1270,8 @@ void i386_device::mmx_group_0f71() // Opcode 0f 71
void i386_device::sse_group_660f71() // Opcode 66 0f 71
{
- UINT8 modm = FETCH();
- UINT8 imm8 = FETCH();
+ uint8_t modm = FETCH();
+ uint8_t imm8 = FETCH();
if (modm >= 0xc0) {
switch ((modm & 0x38) >> 3)
{
@@ -1295,8 +1295,8 @@ void i386_device::sse_group_660f71() // Opcode 66 0f 71
void i386_device::mmx_group_0f72() // Opcode 0f 72
{
- UINT8 modm = FETCH();
- UINT8 imm8 = FETCH();
+ uint8_t modm = FETCH();
+ uint8_t imm8 = FETCH();
MMXPROLOG();
if( modm >= 0xc0 ) {
switch ( (modm & 0x38) >> 3 )
@@ -1321,8 +1321,8 @@ void i386_device::mmx_group_0f72() // Opcode 0f 72
void i386_device::sse_group_660f72() // Opcode 66 0f 72
{
- UINT8 modm = FETCH();
- UINT8 imm8 = FETCH();
+ uint8_t modm = FETCH();
+ uint8_t imm8 = FETCH();
if (modm >= 0xc0) {
switch ((modm & 0x38) >> 3)
{
@@ -1346,8 +1346,8 @@ void i386_device::sse_group_660f72() // Opcode 66 0f 72
void i386_device::mmx_group_0f73() // Opcode 0f 73
{
- UINT8 modm = FETCH();
- UINT8 imm8 = FETCH();
+ uint8_t modm = FETCH();
+ uint8_t imm8 = FETCH();
MMXPROLOG();
if( modm >= 0xc0 ) {
switch ( (modm & 0x38) >> 3 )
@@ -1366,9 +1366,9 @@ void i386_device::mmx_group_0f73() // Opcode 0f 73
void i386_device::sse_group_660f73() // Opcode 66 0f 73
{
- UINT64 t0;
- UINT8 modm = FETCH();
- UINT8 imm8 = FETCH();
+ uint64_t t0;
+ uint8_t modm = FETCH();
+ uint8_t imm8 = FETCH();
if (modm >= 0xc0) {
switch ((modm & 0x38) >> 3)
{
@@ -1428,7 +1428,7 @@ void i386_device::sse_group_660f73() // Opcode 66 0f 73
void i386_device::mmx_psrlw_r64_rm64() // Opcode 0f d1
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
MMX((modrm >> 3) & 0x7).w[0]=MMX((modrm >> 3) & 0x7).w[0] >> count;
@@ -1437,7 +1437,7 @@ void i386_device::mmx_psrlw_r64_rm64() // Opcode 0f d1
MMX((modrm >> 3) & 0x7).w[3]=MMX((modrm >> 3) & 0x7).w[3] >> count;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
int count=(int)src.q;
MMX((modrm >> 3) & 0x7).w[0]=MMX((modrm >> 3) & 0x7).w[0] >> count;
@@ -1451,14 +1451,14 @@ void i386_device::mmx_psrlw_r64_rm64() // Opcode 0f d1
void i386_device::mmx_psrld_r64_rm64() // Opcode 0f d2
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
MMX((modrm >> 3) & 0x7).d[0]=MMX((modrm >> 3) & 0x7).d[0] >> count;
MMX((modrm >> 3) & 0x7).d[1]=MMX((modrm >> 3) & 0x7).d[1] >> count;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
int count=(int)src.q;
MMX((modrm >> 3) & 0x7).d[0]=MMX((modrm >> 3) & 0x7).d[0] >> count;
@@ -1470,13 +1470,13 @@ void i386_device::mmx_psrld_r64_rm64() // Opcode 0f d2
void i386_device::mmx_psrlq_r64_rm64() // Opcode 0f d3
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q >> count;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
int count=(int)src.q;
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q >> count;
@@ -1487,12 +1487,12 @@ void i386_device::mmx_psrlq_r64_rm64() // Opcode 0f d3
void i386_device::mmx_paddq_r64_rm64() // Opcode 0f d4
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q+MMX(modrm & 7).q;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q+src.q;
}
@@ -1502,20 +1502,20 @@ void i386_device::mmx_paddq_r64_rm64() // Opcode 0f d4
void i386_device::mmx_pmullw_r64_rm64() // Opcode 0f d5
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- MMX((modrm >> 3) & 0x7).w[0]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[0]*(INT32)MMX(modrm & 7).s[0]) & 0xffff;
- MMX((modrm >> 3) & 0x7).w[1]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)MMX(modrm & 7).s[1]) & 0xffff;
- MMX((modrm >> 3) & 0x7).w[2]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[2]*(INT32)MMX(modrm & 7).s[2]) & 0xffff;
- MMX((modrm >> 3) & 0x7).w[3]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)MMX(modrm & 7).s[3]) & 0xffff;
+ MMX((modrm >> 3) & 0x7).w[0]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)MMX(modrm & 7).s[0]) & 0xffff;
+ MMX((modrm >> 3) & 0x7).w[1]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[1]*(int32_t)MMX(modrm & 7).s[1]) & 0xffff;
+ MMX((modrm >> 3) & 0x7).w[2]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[2]*(int32_t)MMX(modrm & 7).s[2]) & 0xffff;
+ MMX((modrm >> 3) & 0x7).w[3]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[3]*(int32_t)MMX(modrm & 7).s[3]) & 0xffff;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
- MMX((modrm >> 3) & 0x7).w[0]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[0]*(INT32)src.s[0]) & 0xffff;
- MMX((modrm >> 3) & 0x7).w[1]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)src.s[1]) & 0xffff;
- MMX((modrm >> 3) & 0x7).w[2]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[2]*(INT32)src.s[2]) & 0xffff;
- MMX((modrm >> 3) & 0x7).w[3]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)src.s[3]) & 0xffff;
+ MMX((modrm >> 3) & 0x7).w[0]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)src.s[0]) & 0xffff;
+ MMX((modrm >> 3) & 0x7).w[1]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[1]*(int32_t)src.s[1]) & 0xffff;
+ MMX((modrm >> 3) & 0x7).w[2]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[2]*(int32_t)src.s[2]) & 0xffff;
+ MMX((modrm >> 3) & 0x7).w[3]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[3]*(int32_t)src.s[3]) & 0xffff;
}
CYCLES(1); // TODO: correct cycle count
}
@@ -1524,13 +1524,13 @@ void i386_device::mmx_psubusb_r64_rm64() // Opcode 0f d8
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n]=MMX((modrm >> 3) & 0x7).b[n] < MMX(modrm & 7).b[n] ? 0 : MMX((modrm >> 3) & 0x7).b[n]-MMX(modrm & 7).b[n];
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n]=MMX((modrm >> 3) & 0x7).b[n] < src.b[n] ? 0 : MMX((modrm >> 3) & 0x7).b[n]-src.b[n];
@@ -1542,13 +1542,13 @@ void i386_device::mmx_psubusw_r64_rm64() // Opcode 0f d9
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).w[n]=MMX((modrm >> 3) & 0x7).w[n] < MMX(modrm & 7).w[n] ? 0 : MMX((modrm >> 3) & 0x7).w[n]-MMX(modrm & 7).w[n];
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).w[n]=MMX((modrm >> 3) & 0x7).w[n] < src.w[n] ? 0 : MMX((modrm >> 3) & 0x7).w[n]-src.w[n];
@@ -1559,12 +1559,12 @@ void i386_device::mmx_psubusw_r64_rm64() // Opcode 0f d9
void i386_device::mmx_pand_r64_rm64() // Opcode 0f db
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q & MMX(modrm & 7).q;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q & src.q;
}
@@ -1575,13 +1575,13 @@ void i386_device::mmx_paddusb_r64_rm64() // Opcode 0f dc
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n]=MMX((modrm >> 3) & 0x7).b[n] > (0xff-MMX(modrm & 7).b[n]) ? 0xff : MMX((modrm >> 3) & 0x7).b[n]+MMX(modrm & 7).b[n];
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n]=MMX((modrm >> 3) & 0x7).b[n] > (0xff-src.b[n]) ? 0xff : MMX((modrm >> 3) & 0x7).b[n]+src.b[n];
@@ -1593,13 +1593,13 @@ void i386_device::mmx_paddusw_r64_rm64() // Opcode 0f dd
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).w[n]=MMX((modrm >> 3) & 0x7).w[n] > (0xffff-MMX(modrm & 7).w[n]) ? 0xffff : MMX((modrm >> 3) & 0x7).w[n]+MMX(modrm & 7).w[n];
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).w[n]=MMX((modrm >> 3) & 0x7).w[n] > (0xffff-src.w[n]) ? 0xffff : MMX((modrm >> 3) & 0x7).w[n]+src.w[n];
@@ -1610,12 +1610,12 @@ void i386_device::mmx_paddusw_r64_rm64() // Opcode 0f dd
void i386_device::mmx_pandn_r64_rm64() // Opcode 0f df
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=(~MMX((modrm >> 3) & 0x7).q) & MMX(modrm & 7).q;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
MMX((modrm >> 3) & 0x7).q=(~MMX((modrm >> 3) & 0x7).q) & src.q;
}
@@ -1625,7 +1625,7 @@ void i386_device::mmx_pandn_r64_rm64() // Opcode 0f df
void i386_device::mmx_psraw_r64_rm64() // Opcode 0f e1
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
MMX((modrm >> 3) & 0x7).s[0]=MMX((modrm >> 3) & 0x7).s[0] >> count;
@@ -1634,7 +1634,7 @@ void i386_device::mmx_psraw_r64_rm64() // Opcode 0f e1
MMX((modrm >> 3) & 0x7).s[3]=MMX((modrm >> 3) & 0x7).s[3] >> count;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
int count=(int)src.q;
MMX((modrm >> 3) & 0x7).s[0]=MMX((modrm >> 3) & 0x7).s[0] >> count;
@@ -1648,14 +1648,14 @@ void i386_device::mmx_psraw_r64_rm64() // Opcode 0f e1
void i386_device::mmx_psrad_r64_rm64() // Opcode 0f e2
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
MMX((modrm >> 3) & 0x7).i[0]=MMX((modrm >> 3) & 0x7).i[0] >> count;
MMX((modrm >> 3) & 0x7).i[1]=MMX((modrm >> 3) & 0x7).i[1] >> count;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
int count=(int)src.q;
MMX((modrm >> 3) & 0x7).i[0]=MMX((modrm >> 3) & 0x7).i[0] >> count;
@@ -1667,20 +1667,20 @@ void i386_device::mmx_psrad_r64_rm64() // Opcode 0f e2
void i386_device::mmx_pmulhw_r64_rm64() // Opcode 0f e5
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- MMX((modrm >> 3) & 0x7).w[0]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[0]*(INT32)MMX(modrm & 7).s[0]) >> 16;
- MMX((modrm >> 3) & 0x7).w[1]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)MMX(modrm & 7).s[1]) >> 16;
- MMX((modrm >> 3) & 0x7).w[2]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[2]*(INT32)MMX(modrm & 7).s[2]) >> 16;
- MMX((modrm >> 3) & 0x7).w[3]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)MMX(modrm & 7).s[3]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[0]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)MMX(modrm & 7).s[0]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[1]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[1]*(int32_t)MMX(modrm & 7).s[1]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[2]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[2]*(int32_t)MMX(modrm & 7).s[2]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[3]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[3]*(int32_t)MMX(modrm & 7).s[3]) >> 16;
} else {
MMX_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, src);
- MMX((modrm >> 3) & 0x7).w[0]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[0]*(INT32)src.s[0]) >> 16;
- MMX((modrm >> 3) & 0x7).w[1]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)src.s[1]) >> 16;
- MMX((modrm >> 3) & 0x7).w[2]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[2]*(INT32)src.s[2]) >> 16;
- MMX((modrm >> 3) & 0x7).w[3]=(UINT32)((INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)src.s[3]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[0]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)src.s[0]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[1]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[1]*(int32_t)src.s[1]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[2]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[2]*(int32_t)src.s[2]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[3]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[3]*(int32_t)src.s[3]) >> 16;
}
CYCLES(1); // TODO: correct cycle count
}
@@ -1689,16 +1689,16 @@ void i386_device::mmx_psubsb_r64_rm64() // Opcode 0f e8
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
- MMX((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)MMX((modrm >> 3) & 0x7).c[n] - (INT16)MMX(modrm & 7).c[n]);
+ MMX((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)MMX((modrm >> 3) & 0x7).c[n] - (int16_t)MMX(modrm & 7).c[n]);
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 8;n++)
- MMX((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)MMX((modrm >> 3) & 0x7).c[n] - (INT16)s.c[n]);
+ MMX((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)MMX((modrm >> 3) & 0x7).c[n] - (int16_t)s.c[n]);
}
CYCLES(1); // TODO: correct cycle count
}
@@ -1707,16 +1707,16 @@ void i386_device::mmx_psubsw_r64_rm64() // Opcode 0f e9
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
- MMX((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)MMX((modrm >> 3) & 0x7).s[n] - (INT32)MMX(modrm & 7).s[n]);
+ MMX((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)MMX((modrm >> 3) & 0x7).s[n] - (int32_t)MMX(modrm & 7).s[n]);
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 4;n++)
- MMX((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)MMX((modrm >> 3) & 0x7).s[n] - (INT32)s.s[n]);
+ MMX((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)MMX((modrm >> 3) & 0x7).s[n] - (int32_t)s.s[n]);
}
CYCLES(1); // TODO: correct cycle count
}
@@ -1724,12 +1724,12 @@ void i386_device::mmx_psubsw_r64_rm64() // Opcode 0f e9
void i386_device::mmx_por_r64_rm64() // Opcode 0f eb
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q | MMX(modrm & 7).q;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q | s.q;
}
@@ -1740,16 +1740,16 @@ void i386_device::mmx_paddsb_r64_rm64() // Opcode 0f ec
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
- MMX((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)MMX((modrm >> 3) & 0x7).c[n] + (INT16)MMX(modrm & 7).c[n]);
+ MMX((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)MMX((modrm >> 3) & 0x7).c[n] + (int16_t)MMX(modrm & 7).c[n]);
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 8;n++)
- MMX((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)MMX((modrm >> 3) & 0x7).c[n] + (INT16)s.c[n]);
+ MMX((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)MMX((modrm >> 3) & 0x7).c[n] + (int16_t)s.c[n]);
}
CYCLES(1); // TODO: correct cycle count
}
@@ -1758,16 +1758,16 @@ void i386_device::mmx_paddsw_r64_rm64() // Opcode 0f ed
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
- MMX((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)MMX((modrm >> 3) & 0x7).s[n] + (INT32)MMX(modrm & 7).s[n]);
+ MMX((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)MMX((modrm >> 3) & 0x7).s[n] + (int32_t)MMX(modrm & 7).s[n]);
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 4;n++)
- MMX((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)MMX((modrm >> 3) & 0x7).s[n] + (INT32)s.s[n]);
+ MMX((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)MMX((modrm >> 3) & 0x7).s[n] + (int32_t)s.s[n]);
}
CYCLES(1); // TODO: correct cycle count
}
@@ -1775,12 +1775,12 @@ void i386_device::mmx_paddsw_r64_rm64() // Opcode 0f ed
void i386_device::mmx_pxor_r64_rm64() // Opcode 0f ef
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q ^ MMX(modrm & 7).q;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q ^ s.q;
}
@@ -1790,7 +1790,7 @@ void i386_device::mmx_pxor_r64_rm64() // Opcode 0f ef
void i386_device::mmx_psllw_r64_rm64() // Opcode 0f f1
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
MMX((modrm >> 3) & 0x7).w[0]=MMX((modrm >> 3) & 0x7).w[0] << count;
@@ -1799,7 +1799,7 @@ void i386_device::mmx_psllw_r64_rm64() // Opcode 0f f1
MMX((modrm >> 3) & 0x7).w[3]=MMX((modrm >> 3) & 0x7).w[3] << count;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
int count=(int)s.q;
MMX((modrm >> 3) & 0x7).w[0]=MMX((modrm >> 3) & 0x7).w[0] << count;
@@ -1813,14 +1813,14 @@ void i386_device::mmx_psllw_r64_rm64() // Opcode 0f f1
void i386_device::mmx_pslld_r64_rm64() // Opcode 0f f2
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
MMX((modrm >> 3) & 0x7).d[0]=MMX((modrm >> 3) & 0x7).d[0] << count;
MMX((modrm >> 3) & 0x7).d[1]=MMX((modrm >> 3) & 0x7).d[1] << count;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
int count=(int)s.q;
MMX((modrm >> 3) & 0x7).d[0]=MMX((modrm >> 3) & 0x7).d[0] << count;
@@ -1832,13 +1832,13 @@ void i386_device::mmx_pslld_r64_rm64() // Opcode 0f f2
void i386_device::mmx_psllq_r64_rm64() // Opcode 0f f3
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q << count;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
int count=(int)s.q;
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q << count;
@@ -1849,20 +1849,20 @@ void i386_device::mmx_psllq_r64_rm64() // Opcode 0f f3
void i386_device::mmx_pmaddwd_r64_rm64() // Opcode 0f f5
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- MMX((modrm >> 3) & 0x7).i[0]=(INT32)MMX((modrm >> 3) & 0x7).s[0]*(INT32)MMX(modrm & 7).s[0]+
- (INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)MMX(modrm & 7).s[1];
- MMX((modrm >> 3) & 0x7).i[1]=(INT32)MMX((modrm >> 3) & 0x7).s[2]*(INT32)MMX(modrm & 7).s[2]+
- (INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)MMX(modrm & 7).s[3];
+ MMX((modrm >> 3) & 0x7).i[0]=(int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)MMX(modrm & 7).s[0]+
+ (int32_t)MMX((modrm >> 3) & 0x7).s[1]*(int32_t)MMX(modrm & 7).s[1];
+ MMX((modrm >> 3) & 0x7).i[1]=(int32_t)MMX((modrm >> 3) & 0x7).s[2]*(int32_t)MMX(modrm & 7).s[2]+
+ (int32_t)MMX((modrm >> 3) & 0x7).s[3]*(int32_t)MMX(modrm & 7).s[3];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
- MMX((modrm >> 3) & 0x7).i[0]=(INT32)MMX((modrm >> 3) & 0x7).s[0]*(INT32)s.s[0]+
- (INT32)MMX((modrm >> 3) & 0x7).s[1]*(INT32)s.s[1];
- MMX((modrm >> 3) & 0x7).i[1]=(INT32)MMX((modrm >> 3) & 0x7).s[2]*(INT32)s.s[2]+
- (INT32)MMX((modrm >> 3) & 0x7).s[3]*(INT32)s.s[3];
+ MMX((modrm >> 3) & 0x7).i[0]=(int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)s.s[0]+
+ (int32_t)MMX((modrm >> 3) & 0x7).s[1]*(int32_t)s.s[1];
+ MMX((modrm >> 3) & 0x7).i[1]=(int32_t)MMX((modrm >> 3) & 0x7).s[2]*(int32_t)s.s[2]+
+ (int32_t)MMX((modrm >> 3) & 0x7).s[3]*(int32_t)s.s[3];
}
CYCLES(1); // TODO: correct cycle count
}
@@ -1871,13 +1871,13 @@ void i386_device::mmx_psubb_r64_rm64() // Opcode 0f f8
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n]=MMX((modrm >> 3) & 0x7).b[n] - MMX(modrm & 7).b[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n]=MMX((modrm >> 3) & 0x7).b[n] - s.b[n];
@@ -1889,13 +1889,13 @@ void i386_device::mmx_psubw_r64_rm64() // Opcode 0f f9
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).w[n]=MMX((modrm >> 3) & 0x7).w[n] - MMX(modrm & 7).w[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).w[n]=MMX((modrm >> 3) & 0x7).w[n] - s.w[n];
@@ -1907,13 +1907,13 @@ void i386_device::mmx_psubd_r64_rm64() // Opcode 0f fa
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 2;n++)
MMX((modrm >> 3) & 0x7).d[n]=MMX((modrm >> 3) & 0x7).d[n] - MMX(modrm & 7).d[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 2;n++)
MMX((modrm >> 3) & 0x7).d[n]=MMX((modrm >> 3) & 0x7).d[n] - s.d[n];
@@ -1925,13 +1925,13 @@ void i386_device::mmx_paddb_r64_rm64() // Opcode 0f fc
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n]=MMX((modrm >> 3) & 0x7).b[n] + MMX(modrm & 7).b[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n]=MMX((modrm >> 3) & 0x7).b[n] + s.b[n];
@@ -1943,13 +1943,13 @@ void i386_device::mmx_paddw_r64_rm64() // Opcode 0f fd
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).w[n]=MMX((modrm >> 3) & 0x7).w[n] + MMX(modrm & 7).w[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).w[n]=MMX((modrm >> 3) & 0x7).w[n] + s.w[n];
@@ -1961,13 +1961,13 @@ void i386_device::mmx_paddd_r64_rm64() // Opcode 0f fe
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 2;n++)
MMX((modrm >> 3) & 0x7).d[n]=MMX((modrm >> 3) & 0x7).d[n] + MMX(modrm & 7).d[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 2;n++)
MMX((modrm >> 3) & 0x7).d[n]=MMX((modrm >> 3) & 0x7).d[n] + s.d[n];
@@ -1984,10 +1984,10 @@ void i386_device::mmx_emms() // Opcode 0f 77
void i386_device::i386_cyrix_svdc() // Opcode 0f 78
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm < 0xc0 ) {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
int index = (modrm >> 3) & 7;
int limit;
switch (index)
@@ -2048,14 +2048,14 @@ void i386_device::i386_cyrix_svdc() // Opcode 0f 78
void i386_device::i386_cyrix_rsdc() // Opcode 0f 79
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm < 0xc0 ) {
- UINT32 ea = GetEA(modrm,0);
+ uint32_t ea = GetEA(modrm,0);
int index = (modrm >> 3) & 7;
- UINT16 flags;
- UINT32 base;
- UINT32 limit;
+ uint16_t flags;
+ uint32_t base;
+ uint32_t limit;
switch (index)
{
case 0:
@@ -2117,11 +2117,11 @@ void i386_device::i386_cyrix_svldt() // Opcode 0f 7a
{
if ( PROTECTED_MODE && !V8086_MODE )
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( !(modrm & 0xf8) ) {
- UINT32 ea = GetEA(modrm,0);
- UINT32 limit = m_ldtr.limit;
+ uint32_t ea = GetEA(modrm,0);
+ uint32_t limit = m_ldtr.limit;
if (m_ldtr.flags & 0x8000) //G bit
{
@@ -2149,13 +2149,13 @@ void i386_device::i386_cyrix_rsldt() // Opcode 0f 7b
if(m_CPL)
FAULT(FAULT_GP,0)
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( !(modrm & 0xf8) ) {
- UINT32 ea = GetEA(modrm,0);
- UINT16 flags = READ16(ea + 5);
- UINT32 base = (READ32(ea + 2) | 0x00ffffff) | (READ8(ea + 7) << 24);
- UINT32 limit = READ16(ea + 0) | ((flags & 3) << 16);
+ uint32_t ea = GetEA(modrm,0);
+ uint16_t flags = READ16(ea + 5);
+ uint32_t base = (READ32(ea + 2) | 0x00ffffff) | (READ8(ea + 7) << 24);
+ uint32_t limit = READ16(ea + 0) | ((flags & 3) << 16);
I386_SREG seg;
if (flags & 0x8000) //G bit
@@ -2182,11 +2182,11 @@ void i386_device::i386_cyrix_svts() // Opcode 0f 7c
{
if ( PROTECTED_MODE )
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( !(modrm & 0xf8) ) {
- UINT32 ea = GetEA(modrm,0);
- UINT32 limit = m_task.limit;
+ uint32_t ea = GetEA(modrm,0);
+ uint32_t limit = m_task.limit;
if (m_task.flags & 0x8000) //G bit
{
@@ -2213,13 +2213,13 @@ void i386_device::i386_cyrix_rsts() // Opcode 0f 7d
if(m_CPL)
FAULT(FAULT_GP,0)
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( !(modrm & 0xf8) ) {
- UINT32 ea = GetEA(modrm,0);
- UINT16 flags = READ16(ea + 5);
- UINT32 base = (READ32(ea + 2) | 0x00ffffff) | (READ8(ea + 7) << 24);
- UINT32 limit = READ16(ea + 0) | ((flags & 3) << 16);
+ uint32_t ea = GetEA(modrm,0);
+ uint16_t flags = READ16(ea + 5);
+ uint32_t base = (READ32(ea + 2) | 0x00ffffff) | (READ8(ea + 7) << 24);
+ uint32_t limit = READ16(ea + 0) | ((flags & 3) << 16);
if (flags & 0x8000) //G bit
{
@@ -2241,11 +2241,11 @@ void i386_device::i386_cyrix_rsts() // Opcode 0f 7d
void i386_device::mmx_movd_r64_rm32() // Opcode 0f 6e
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).d[0]=LOAD_RM32(modrm);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
MMX((modrm >> 3) & 0x7).d[0]=READ32(ea);
}
MMX((modrm >> 3) & 0x7).d[1]=0;
@@ -2255,11 +2255,11 @@ void i386_device::mmx_movd_r64_rm32() // Opcode 0f 6e
void i386_device::mmx_movq_r64_rm64() // Opcode 0f 6f
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).l=MMX(modrm & 0x7).l;
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, MMX((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -2268,11 +2268,11 @@ void i386_device::mmx_movq_r64_rm64() // Opcode 0f 6f
void i386_device::mmx_movd_rm32_r64() // Opcode 0f 7e
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
STORE_RM32(modrm, MMX((modrm >> 3) & 0x7).d[0]);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITE32(ea, MMX((modrm >> 3) & 0x7).d[0]);
}
CYCLES(1); // TODO: correct cycle count
@@ -2281,11 +2281,11 @@ void i386_device::mmx_movd_rm32_r64() // Opcode 0f 7e
void i386_device::mmx_movq_rm64_r64() // Opcode 0f 7f
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX(modrm & 0x7)=MMX((modrm >> 3) & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEMMX(ea, MMX((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -2295,7 +2295,7 @@ void i386_device::mmx_pcmpeqb_r64_rm64() // Opcode 0f 74
{
int c;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2305,7 +2305,7 @@ void i386_device::mmx_pcmpeqb_r64_rm64() // Opcode 0f 74
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (c=0;c <= 7;c++)
MMX(d).b[c]=(MMX(d).b[c] == s.b[c]) ? 0xff : 0;
@@ -2316,7 +2316,7 @@ void i386_device::mmx_pcmpeqb_r64_rm64() // Opcode 0f 74
void i386_device::mmx_pcmpeqw_r64_rm64() // Opcode 0f 75
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2328,7 +2328,7 @@ void i386_device::mmx_pcmpeqw_r64_rm64() // Opcode 0f 75
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX(d).w[0]=(MMX(d).w[0] == s.w[0]) ? 0xffff : 0;
MMX(d).w[1]=(MMX(d).w[1] == s.w[1]) ? 0xffff : 0;
@@ -2341,7 +2341,7 @@ void i386_device::mmx_pcmpeqw_r64_rm64() // Opcode 0f 75
void i386_device::mmx_pcmpeqd_r64_rm64() // Opcode 0f 76
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2351,7 +2351,7 @@ void i386_device::mmx_pcmpeqd_r64_rm64() // Opcode 0f 76
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX(d).d[0]=(MMX(d).d[0] == s.d[0]) ? 0xffffffff : 0;
MMX(d).d[1]=(MMX(d).d[1] == s.d[1]) ? 0xffffffff : 0;
@@ -2362,11 +2362,11 @@ void i386_device::mmx_pcmpeqd_r64_rm64() // Opcode 0f 76
void i386_device::mmx_pshufw_r64_rm64_i8() // Opcode 0f 70
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX_REG t;
int s,d;
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
t.q=MMX(s).q;
@@ -2377,8 +2377,8 @@ void i386_device::mmx_pshufw_r64_rm64_i8() // Opcode 0f 70
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
READMMX(ea, s);
MMX(d).w[0]=s.w[imm8 & 3];
MMX(d).w[1]=s.w[(imm8 >> 2) & 3];
@@ -2390,7 +2390,7 @@ void i386_device::mmx_pshufw_r64_rm64_i8() // Opcode 0f 70
void i386_device::sse_punpcklbw_r128_rm128() // Opcode 66 0f 60
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM_REG xd,xs;
int s, d;
@@ -2418,7 +2418,7 @@ void i386_device::sse_punpcklbw_r128_rm128() // Opcode 66 0f 60
else {
XMM_REG xd, xs;
int d = (modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
xd.l[0] = XMM(d).l[0];
xs.q[0] = READ64(ea);
for (int n = 0; n < 8; n++) {
@@ -2431,7 +2431,7 @@ void i386_device::sse_punpcklbw_r128_rm128() // Opcode 66 0f 60
void i386_device::sse_punpcklwd_r128_rm128()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM_REG xd, xs;
int s, d;
@@ -2447,7 +2447,7 @@ void i386_device::sse_punpcklwd_r128_rm128()
else {
XMM_REG xd, xs;
int d = (modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
xd.l[0] = XMM(d).l[0];
xs.q[0] = READ64(ea);
for (int n = 0; n < 4; n++) {
@@ -2460,7 +2460,7 @@ void i386_device::sse_punpcklwd_r128_rm128()
void i386_device::sse_punpckldq_r128_rm128()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM_REG xd, xs;
int s, d;
@@ -2476,7 +2476,7 @@ void i386_device::sse_punpckldq_r128_rm128()
else {
XMM_REG xd, xs;
int d = (modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
xd.l[0] = XMM(d).l[0];
xs.q[0] = READ64(ea);
for (int n = 0; n < 2; n++) {
@@ -2489,7 +2489,7 @@ void i386_device::sse_punpckldq_r128_rm128()
void i386_device::sse_punpcklqdq_r128_rm128()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM_REG xd, xs;
int s, d;
@@ -2503,7 +2503,7 @@ void i386_device::sse_punpcklqdq_r128_rm128()
else {
XMM_REG xd, xs;
int d = (modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
xd.l[0] = XMM(d).l[0];
xs.q[0] = READ64(ea);
XMM(d).q[0] = xd.q[0];
@@ -2515,9 +2515,9 @@ void i386_device::sse_punpcklqdq_r128_rm128()
void i386_device::mmx_punpcklbw_r64_r64m32() // Opcode 0f 60
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 t;
+ uint32_t t;
int s,d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
@@ -2531,9 +2531,9 @@ void i386_device::mmx_punpcklbw_r64_r64m32() // Opcode 0f 60
MMX(d).b[6]=(t >> 24) & 0xff;
MMX(d).b[7]=MMX(s).b[3];
} else {
- UINT32 s,t;
+ uint32_t s,t;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
s = READ32(ea);
t=MMX(d).d[0];
MMX(d).b[0]=t & 0xff;
@@ -2551,9 +2551,9 @@ void i386_device::mmx_punpcklbw_r64_r64m32() // Opcode 0f 60
void i386_device::mmx_punpcklwd_r64_r64m32() // Opcode 0f 61
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT16 t;
+ uint16_t t;
int s,d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
@@ -2563,10 +2563,10 @@ void i386_device::mmx_punpcklwd_r64_r64m32() // Opcode 0f 61
MMX(d).w[2]=t;
MMX(d).w[3]=MMX(s).w[1];
} else {
- UINT32 s;
- UINT16 t;
+ uint32_t s;
+ uint16_t t;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
s = READ32(ea);
t=MMX(d).w[1];
MMX(d).w[0]=MMX(d).w[0];
@@ -2580,7 +2580,7 @@ void i386_device::mmx_punpcklwd_r64_r64m32() // Opcode 0f 61
void i386_device::mmx_punpckldq_r64_r64m32() // Opcode 0f 62
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2588,9 +2588,9 @@ void i386_device::mmx_punpckldq_r64_r64m32() // Opcode 0f 62
MMX(d).d[0]=MMX(d).d[0];
MMX(d).d[1]=MMX(s).d[0];
} else {
- UINT32 s;
+ uint32_t s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
s = READ32(ea);
MMX(d).d[0]=MMX(d).d[0];
MMX(d).d[1]=s;
@@ -2601,7 +2601,7 @@ void i386_device::mmx_punpckldq_r64_r64m32() // Opcode 0f 62
void i386_device::mmx_packsswb_r64_rm64() // Opcode 0f 63
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2617,7 +2617,7 @@ void i386_device::mmx_packsswb_r64_rm64() // Opcode 0f 63
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX(d).c[0]=SaturatedSignedWordToSignedByte(MMX(d).s[0]);
MMX(d).c[1]=SaturatedSignedWordToSignedByte(MMX(d).s[1]);
@@ -2635,7 +2635,7 @@ void i386_device::mmx_pcmpgtb_r64_rm64() // Opcode 0f 64
{
int c;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2645,7 +2645,7 @@ void i386_device::mmx_pcmpgtb_r64_rm64() // Opcode 0f 64
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (c=0;c <= 7;c++)
MMX(d).b[c]=(MMX(d).c[c] > s.c[c]) ? 0xff : 0;
@@ -2657,7 +2657,7 @@ void i386_device::mmx_pcmpgtw_r64_rm64() // Opcode 0f 65
{
int c;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2667,7 +2667,7 @@ void i386_device::mmx_pcmpgtw_r64_rm64() // Opcode 0f 65
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (c=0;c <= 3;c++)
MMX(d).w[c]=(MMX(d).s[c] > s.s[c]) ? 0xffff : 0;
@@ -2679,7 +2679,7 @@ void i386_device::mmx_pcmpgtd_r64_rm64() // Opcode 0f 66
{
int c;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2689,7 +2689,7 @@ void i386_device::mmx_pcmpgtd_r64_rm64() // Opcode 0f 66
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (c=0;c <= 1;c++)
MMX(d).d[c]=(MMX(d).i[c] > s.i[c]) ? 0xffffffff : 0;
@@ -2700,7 +2700,7 @@ void i386_device::mmx_pcmpgtd_r64_rm64() // Opcode 0f 66
void i386_device::mmx_packuswb_r64_rm64() // Opcode 0f 67
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX_REG ds, sd;
int s,d;
@@ -2719,7 +2719,7 @@ void i386_device::mmx_packuswb_r64_rm64() // Opcode 0f 67
} else {
MMX_REG s,t;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
t.q = MMX(d).q;
MMX(d).b[0]=SaturatedSignedWordToUnsignedByte(t.s[0]);
@@ -2737,7 +2737,7 @@ void i386_device::mmx_packuswb_r64_rm64() // Opcode 0f 67
void i386_device::mmx_punpckhbw_r64_rm64() // Opcode 0f 68
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2753,7 +2753,7 @@ void i386_device::mmx_punpckhbw_r64_rm64() // Opcode 0f 68
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX(d).b[0]=MMX(d).b[4];
MMX(d).b[1]=s.b[4];
@@ -2770,7 +2770,7 @@ void i386_device::mmx_punpckhbw_r64_rm64() // Opcode 0f 68
void i386_device::mmx_punpckhwd_r64_rm64() // Opcode 0f 69
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2782,7 +2782,7 @@ void i386_device::mmx_punpckhwd_r64_rm64() // Opcode 0f 69
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX(d).w[0]=MMX(d).w[2];
MMX(d).w[1]=s.w[2];
@@ -2795,7 +2795,7 @@ void i386_device::mmx_punpckhwd_r64_rm64() // Opcode 0f 69
void i386_device::mmx_punpckhdq_r64_rm64() // Opcode 0f 6a
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -2805,7 +2805,7 @@ void i386_device::mmx_punpckhdq_r64_rm64() // Opcode 0f 6a
} else {
MMX_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX(d).d[0]=MMX(d).d[1];
MMX(d).d[1]=s.d[1];
@@ -2816,10 +2816,10 @@ void i386_device::mmx_punpckhdq_r64_rm64() // Opcode 0f 6a
void i386_device::mmx_packssdw_r64_rm64() // Opcode 0f 6b
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
- INT32 t1, t2, t3, t4;
+ int32_t t1, t2, t3, t4;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
t1 = MMX(d).i[0];
@@ -2833,9 +2833,9 @@ void i386_device::mmx_packssdw_r64_rm64() // Opcode 0f 6b
}
else {
MMX_REG s;
- INT32 t1, t2;
+ int32_t t1, t2;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
t1 = MMX(d).i[0];
t2 = MMX(d).i[1];
@@ -2849,7 +2849,7 @@ void i386_device::mmx_packssdw_r64_rm64() // Opcode 0f 6b
void i386_device::sse_group_0fae() // Opcode 0f ae
{
- UINT8 modm = FETCH();
+ uint8_t modm = FETCH();
if( modm == 0xf8 ) {
logerror("Unemulated SFENCE opcode called\n");
CYCLES(1); // sfence instruction
@@ -2858,7 +2858,7 @@ void i386_device::sse_group_0fae() // Opcode 0f ae
} else if( modm == 0xe8 ) {
CYCLES(1); // lfence instruction
} else if( modm < 0xc0 ) {
- UINT32 ea;
+ uint32_t ea;
switch ( (modm & 0x38) >> 3 )
{
case 2: // ldmxcsr m32
@@ -2882,32 +2882,32 @@ void i386_device::sse_group_0fae() // Opcode 0f ae
void i386_device::sse_cvttps2dq_r128_rm128() // Opcode f3 0f 5b
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- XMM((modrm >> 3) & 0x7).i[0]=(INT32)XMM(modrm & 0x7).f[0];
- XMM((modrm >> 3) & 0x7).i[1]=(INT32)XMM(modrm & 0x7).f[1];
- XMM((modrm >> 3) & 0x7).i[2]=(INT32)XMM(modrm & 0x7).f[2];
- XMM((modrm >> 3) & 0x7).i[3]=(INT32)XMM(modrm & 0x7).f[3];
+ XMM((modrm >> 3) & 0x7).i[0]=(int32_t)XMM(modrm & 0x7).f[0];
+ XMM((modrm >> 3) & 0x7).i[1]=(int32_t)XMM(modrm & 0x7).f[1];
+ XMM((modrm >> 3) & 0x7).i[2]=(int32_t)XMM(modrm & 0x7).f[2];
+ XMM((modrm >> 3) & 0x7).i[3]=(int32_t)XMM(modrm & 0x7).f[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
- XMM((modrm >> 3) & 0x7).i[0]=(INT32)src.f[0];
- XMM((modrm >> 3) & 0x7).i[1]=(INT32)src.f[1];
- XMM((modrm >> 3) & 0x7).i[2]=(INT32)src.f[2];
- XMM((modrm >> 3) & 0x7).i[3]=(INT32)src.f[3];
+ XMM((modrm >> 3) & 0x7).i[0]=(int32_t)src.f[0];
+ XMM((modrm >> 3) & 0x7).i[1]=(int32_t)src.f[1];
+ XMM((modrm >> 3) & 0x7).i[2]=(int32_t)src.f[2];
+ XMM((modrm >> 3) & 0x7).i[3]=(int32_t)src.f[3];
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_cvtss2sd_r128_r128m32() // Opcode f3 0f 5a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM(modrm & 0x7).f[0];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
s.d[0] = READ32(ea);
XMM((modrm >> 3) & 0x7).f64[0] = s.f[0];
}
@@ -2916,58 +2916,58 @@ void i386_device::sse_cvtss2sd_r128_r128m32() // Opcode f3 0f 5a
void i386_device::sse_cvttss2si_r32_r128m32() // Opcode f3 0f 2c
{
- INT32 src;
- UINT8 modrm = FETCH(); // get mordm byte
+ int32_t src;
+ uint8_t modrm = FETCH(); // get mordm byte
if( modrm >= 0xc0 ) { // if bits 7-6 are 11 the source is a xmm register (low doubleword)
- src = (INT32)XMM(modrm & 0x7).f[0^NATIVE_ENDIAN_VALUE_LE_BE(0,1)];
+ src = (int32_t)XMM(modrm & 0x7).f[0^NATIVE_ENDIAN_VALUE_LE_BE(0,1)];
} else { // otherwise is a memory address
XMM_REG t;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
t.d[0] = READ32(ea);
- src = (INT32)t.f[0];
+ src = (int32_t)t.f[0];
}
- STORE_REG32(modrm, (UINT32)src);
+ STORE_REG32(modrm, (uint32_t)src);
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_cvtss2si_r32_r128m32() // Opcode f3 0f 2d
{
- INT32 src;
- UINT8 modrm = FETCH();
+ int32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- src = (INT32)XMM(modrm & 0x7).f[0];
+ src = (int32_t)XMM(modrm & 0x7).f[0];
} else {
XMM_REG t;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
t.d[0] = READ32(ea);
- src = (INT32)t.f[0];
+ src = (int32_t)t.f[0];
}
- STORE_REG32(modrm, (UINT32)src);
+ STORE_REG32(modrm, (uint32_t)src);
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_cvtsi2ss_r128_rm32() // Opcode f3 0f 2a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- XMM((modrm >> 3) & 0x7).f[0] = (INT32)LOAD_RM32(modrm);
+ XMM((modrm >> 3) & 0x7).f[0] = (int32_t)LOAD_RM32(modrm);
} else {
- UINT32 ea = GetEA(modrm, 0);
- XMM((modrm >> 3) & 0x7).f[0] = (INT32)READ32(ea);
+ uint32_t ea = GetEA(modrm, 0);
+ XMM((modrm >> 3) & 0x7).f[0] = (int32_t)READ32(ea);
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_cvtpi2ps_r128_rm64() // Opcode 0f 2a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
MMXPROLOG();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = (float)MMX(modrm & 0x7).i[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)MMX(modrm & 0x7).i[1];
} else {
MMX_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, r);
XMM((modrm >> 3) & 0x7).f[0] = (float)r.i[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)r.i[1];
@@ -2977,14 +2977,14 @@ void i386_device::sse_cvtpi2ps_r128_rm64() // Opcode 0f 2a
void i386_device::sse_cvttps2pi_r64_r128m64() // Opcode 0f 2c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
MMXPROLOG();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f[0];
MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f[1];
} else {
XMM_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, r);
XMM((modrm >> 3) & 0x7).i[0] = r.f[0];
XMM((modrm >> 3) & 0x7).i[1] = r.f[1];
@@ -2994,14 +2994,14 @@ void i386_device::sse_cvttps2pi_r64_r128m64() // Opcode 0f 2c
void i386_device::sse_cvtps2pi_r64_r128m64() // Opcode 0f 2d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
MMXPROLOG();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f[0];
MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f[1];
} else {
XMM_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, r);
XMM((modrm >> 3) & 0x7).i[0] = r.f[0];
XMM((modrm >> 3) & 0x7).i[1] = r.f[1];
@@ -3011,13 +3011,13 @@ void i386_device::sse_cvtps2pi_r64_r128m64() // Opcode 0f 2d
void i386_device::sse_cvtps2pd_r128_r128m64() // Opcode 0f 5a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = (double)XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)XMM(modrm & 0x7).f[1];
} else {
MMX_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, r);
XMM((modrm >> 3) & 0x7).f64[0] = (double)r.f[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)r.f[1];
@@ -3027,7 +3027,7 @@ void i386_device::sse_cvtps2pd_r128_r128m64() // Opcode 0f 5a
void i386_device::sse_cvtdq2ps_r128_rm128() // Opcode 0f 5b
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = (float)XMM(modrm & 0x7).i[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)XMM(modrm & 0x7).i[1];
@@ -3035,7 +3035,7 @@ void i386_device::sse_cvtdq2ps_r128_rm128() // Opcode 0f 5b
XMM((modrm >> 3) & 0x7).f[3] = (float)XMM(modrm & 0x7).i[3];
} else {
XMM_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, r);
XMM((modrm >> 3) & 0x7).f[0] = (float)r.i[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)r.i[1];
@@ -3047,13 +3047,13 @@ void i386_device::sse_cvtdq2ps_r128_rm128() // Opcode 0f 5b
void i386_device::sse_cvtdq2pd_r128_r128m64() // Opcode f3 0f e6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = (double)XMM(modrm & 0x7).i[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)XMM(modrm & 0x7).i[1];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
XMM((modrm >> 3) & 0x7).f64[0] = (double)s.i[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)s.i[1];
@@ -3063,11 +3063,11 @@ void i386_device::sse_cvtdq2pd_r128_r128m64() // Opcode f3 0f e6
void i386_device::sse_movss_r128_rm128() // Opcode f3 0f 10
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).d[0] = XMM(modrm & 0x7).d[0];
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
XMM((modrm >> 3) & 0x7).d[0] = READ32(ea);
}
CYCLES(1); // TODO: correct cycle count
@@ -3075,11 +3075,11 @@ void i386_device::sse_movss_r128_rm128() // Opcode f3 0f 10
void i386_device::sse_movss_rm128_r128() // Opcode f3 0f 11
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7).d[0] = XMM((modrm >> 3) & 0x7).d[0];
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITE32(ea, XMM((modrm >> 3) & 0x7).d[0]);
}
CYCLES(1); // TODO: correct cycle count
@@ -3087,7 +3087,7 @@ void i386_device::sse_movss_rm128_r128() // Opcode f3 0f 11
void i386_device::sse_movsldup_r128_rm128() // Opcode f3 0f 12
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).d[0] = XMM(modrm & 0x7).d[0];
XMM((modrm >> 3) & 0x7).d[1] = XMM(modrm & 0x7).d[0];
@@ -3095,7 +3095,7 @@ void i386_device::sse_movsldup_r128_rm128() // Opcode f3 0f 12
XMM((modrm >> 3) & 0x7).d[3] = XMM(modrm & 0x7).d[2];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).d[0] = src.d[0];
XMM((modrm >> 3) & 0x7).d[1] = src.d[0];
@@ -3107,7 +3107,7 @@ void i386_device::sse_movsldup_r128_rm128() // Opcode f3 0f 12
void i386_device::sse_movshdup_r128_rm128() // Opcode f3 0f 16
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).d[0] = XMM(modrm & 0x7).d[1];
XMM((modrm >> 3) & 0x7).d[1] = XMM(modrm & 0x7).d[1];
@@ -3115,7 +3115,7 @@ void i386_device::sse_movshdup_r128_rm128() // Opcode f3 0f 16
XMM((modrm >> 3) & 0x7).d[3] = XMM(modrm & 0x7).d[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).d[0] = src.d[1];
XMM((modrm >> 3) & 0x7).d[1] = src.d[1];
@@ -3127,11 +3127,11 @@ void i386_device::sse_movshdup_r128_rm128() // Opcode f3 0f 16
void i386_device::sse_movaps_r128_rm128() // Opcode 0f 28
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -3139,11 +3139,11 @@ void i386_device::sse_movaps_r128_rm128() // Opcode 0f 28
void i386_device::sse_movaps_rm128_r128() // Opcode 0f 29
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -3151,11 +3151,11 @@ void i386_device::sse_movaps_rm128_r128() // Opcode 0f 29
void i386_device::sse_movups_r128_rm128() // Opcode 0f 10
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, XMM((modrm >> 3) & 0x7)); // address does not need to be 16-byte aligned
}
CYCLES(1); // TODO: correct cycle count
@@ -3163,11 +3163,11 @@ void i386_device::sse_movups_r128_rm128() // Opcode 0f 10
void i386_device::sse_movupd_r128_rm128() // Opcode 66 0f 10
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, XMM((modrm >> 3) & 0x7)); // address does not need to be 16-byte aligned
}
CYCLES(1); // TODO: correct cycle count
@@ -3175,11 +3175,11 @@ void i386_device::sse_movupd_r128_rm128() // Opcode 66 0f 10
void i386_device::sse_movups_rm128_r128() // Opcode 0f 11
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7)); // address does not need to be 16-byte aligned
}
CYCLES(1); // TODO: correct cycle count
@@ -3187,11 +3187,11 @@ void i386_device::sse_movups_rm128_r128() // Opcode 0f 11
void i386_device::sse_movupd_rm128_r128() // Opcode 66 0f 11
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7)); // address does not need to be 16-byte aligned
}
CYCLES(1); // TODO: correct cycle count
@@ -3199,14 +3199,14 @@ void i386_device::sse_movupd_rm128_r128() // Opcode 66 0f 11
void i386_device::sse_movlps_r128_m64() // Opcode 0f 12
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// MOVHLPS opcode
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[1];
CYCLES(1); // TODO: correct cycle count
} else {
// MOVLPS opcode
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3214,12 +3214,12 @@ void i386_device::sse_movlps_r128_m64() // Opcode 0f 12
void i386_device::sse_movlpd_r128_m64() // Opcode 66 0f 12
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
CYCLES(1); // TODO: correct cycle count
} else {
// MOVLPS opcode
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3227,12 +3227,12 @@ void i386_device::sse_movlpd_r128_m64() // Opcode 66 0f 12
void i386_device::sse_movlps_m64_r128() // Opcode 0f 13
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3240,12 +3240,12 @@ void i386_device::sse_movlps_m64_r128() // Opcode 0f 13
void i386_device::sse_movlpd_m64_r128() // Opcode 66 0f 13
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3253,14 +3253,14 @@ void i386_device::sse_movlpd_m64_r128() // Opcode 66 0f 13
void i386_device::sse_movhps_r128_m64() // Opcode 0f 16
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// MOVLHPS opcode
XMM((modrm >> 3) & 0x7).q[1] = XMM(modrm & 0x7).q[0];
CYCLES(1); // TODO: correct cycle count
} else {
// MOVHPS opcode
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_HI64(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3268,13 +3268,13 @@ void i386_device::sse_movhps_r128_m64() // Opcode 0f 16
void i386_device::sse_movhpd_r128_m64() // Opcode 66 0f 16
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// MOVHPS opcode
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_HI64(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3282,12 +3282,12 @@ void i386_device::sse_movhpd_r128_m64() // Opcode 66 0f 16
void i386_device::sse_movhps_m64_r128() // Opcode 0f 17
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM_HI64(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3295,12 +3295,12 @@ void i386_device::sse_movhps_m64_r128() // Opcode 0f 17
void i386_device::sse_movhpd_m64_r128() // Opcode 66 0f 17
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM_HI64(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3308,13 +3308,13 @@ void i386_device::sse_movhpd_m64_r128() // Opcode 66 0f 17
void i386_device::sse_movntps_m128_r128() // Opcode 0f 2b
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// since cache is not implemented
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -3322,7 +3322,7 @@ void i386_device::sse_movntps_m128_r128() // Opcode 0f 2b
void i386_device::sse_movmskps_r16_r128() // Opcode 0f 50
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int b;
b=(XMM(modrm & 0x7).d[0] >> 31) & 1;
@@ -3336,7 +3336,7 @@ void i386_device::sse_movmskps_r16_r128() // Opcode 0f 50
void i386_device::sse_movmskps_r32_r128() // Opcode 0f 50
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int b;
b=(XMM(modrm & 0x7).d[0] >> 31) & 1;
@@ -3350,7 +3350,7 @@ void i386_device::sse_movmskps_r32_r128() // Opcode 0f 50
void i386_device::sse_movmskpd_r32_r128() // Opcode 66 0f 50
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int b;
b=(XMM(modrm & 0x7).q[0] >> 63) & 1;
@@ -3363,7 +3363,7 @@ void i386_device::sse_movmskpd_r32_r128() // Opcode 66 0f 50
void i386_device::sse_movq2dq_r128_r64() // Opcode f3 0f d6
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = MMX(modrm & 7).q;
XMM((modrm >> 3) & 0x7).q[1] = 0;
@@ -3374,12 +3374,12 @@ void i386_device::sse_movq2dq_r128_r64() // Opcode f3 0f d6
void i386_device::sse_movdqu_r128_rm128() // Opcode f3 0f 6f
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM(modrm & 0x7).q[1];
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -3388,12 +3388,12 @@ void i386_device::sse_movdqu_r128_rm128() // Opcode f3 0f 6f
void i386_device::sse_movdqu_rm128_r128() // Opcode f3 0f 7f
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0];
XMM(modrm & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1];
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -3401,12 +3401,12 @@ void i386_device::sse_movdqu_rm128_r128() // Opcode f3 0f 7f
void i386_device::sse_movd_m128_rm32() // Opcode 66 0f 6e
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM((modrm >> 3) & 0x7).d[0] = LOAD_RM32(modrm);
}
else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
XMM((modrm >> 3) & 0x7).d[0] = READ32(ea);
}
XMM((modrm >> 3) & 0x7).d[1] = 0;
@@ -3416,13 +3416,13 @@ void i386_device::sse_movd_m128_rm32() // Opcode 66 0f 6e
void i386_device::sse_movdqa_m128_rm128() // Opcode 66 0f 6f
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM(modrm & 0x7).q[1];
}
else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -3431,12 +3431,12 @@ void i386_device::sse_movdqa_m128_rm128() // Opcode 66 0f 6f
void i386_device::sse_movq_r128_r128m64() // Opcode f3 0f 7e
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = 0;
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
XMM((modrm >> 3) & 0x7).q[0] = READ64(ea);
XMM((modrm >> 3) & 0x7).q[1] = 0;
}
@@ -3445,12 +3445,12 @@ void i386_device::sse_movq_r128_r128m64() // Opcode f3 0f 7e
void i386_device::sse_movd_rm32_r128() // Opcode 66 0f 7e
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
STORE_RM32(modrm, XMM((modrm >> 3) & 0x7).d[0]);
}
else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITE32(ea, XMM((modrm >> 3) & 0x7).d[0]);
}
CYCLES(1); // TODO: correct cycle count
@@ -3458,13 +3458,13 @@ void i386_device::sse_movd_rm32_r128() // Opcode 66 0f 7e
void i386_device::sse_movdqa_rm128_r128() // Opcode 66 0f 7f
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM(modrm & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0];
XMM(modrm & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1];
}
else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -3473,7 +3473,7 @@ void i386_device::sse_movdqa_rm128_r128() // Opcode 66 0f 7f
void i386_device::sse_pmovmskb_r16_r64() // Opcode 0f d7
{
//MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int b;
b=(MMX(modrm & 0x7).b[0] >> 7) & 1;
@@ -3492,7 +3492,7 @@ void i386_device::sse_pmovmskb_r16_r64() // Opcode 0f d7
void i386_device::sse_pmovmskb_r32_r64() // Opcode 0f d7
{
//MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int b;
b=(MMX(modrm & 0x7).b[0] >> 7) & 1;
@@ -3510,9 +3510,9 @@ void i386_device::sse_pmovmskb_r32_r64() // Opcode 0f d7
void i386_device::sse_pmovmskb_r32_r128() // Opcode 66 0f d7
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT32 b;
+ uint32_t b;
b=(XMM(modrm & 0x7).b[0] >> 7) & 1;
b=b | ((XMM(modrm & 0x7).b[1] >> 6) & 2);
b=b | ((XMM(modrm & 0x7).b[2] >> 5) & 4);
@@ -3536,7 +3536,7 @@ void i386_device::sse_pmovmskb_r32_r128() // Opcode 66 0f d7
void i386_device::sse_xorps() // Opcode 0f 57
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).d[0] = XMM((modrm >> 3) & 0x7).d[0] ^ XMM(modrm & 0x7).d[0];
XMM((modrm >> 3) & 0x7).d[1] = XMM((modrm >> 3) & 0x7).d[1] ^ XMM(modrm & 0x7).d[1];
@@ -3544,7 +3544,7 @@ void i386_device::sse_xorps() // Opcode 0f 57
XMM((modrm >> 3) & 0x7).d[3] = XMM((modrm >> 3) & 0x7).d[3] ^ XMM(modrm & 0x7).d[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).d[0] = XMM((modrm >> 3) & 0x7).d[0] ^ src.d[0];
XMM((modrm >> 3) & 0x7).d[1] = XMM((modrm >> 3) & 0x7).d[1] ^ src.d[1];
@@ -3556,13 +3556,13 @@ void i386_device::sse_xorps() // Opcode 0f 57
void i386_device::sse_xorpd_r128_rm128() // Opcode 66 0f 57
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] ^ XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] ^ XMM(modrm & 0x7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] ^ src.q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] ^ src.q[1];
@@ -3572,7 +3572,7 @@ void i386_device::sse_xorpd_r128_rm128() // Opcode 66 0f 57
void i386_device::sse_addps() // Opcode 0f 58
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] + XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] + XMM(modrm & 0x7).f[1];
@@ -3580,7 +3580,7 @@ void i386_device::sse_addps() // Opcode 0f 58
XMM((modrm >> 3) & 0x7).f[3] = XMM((modrm >> 3) & 0x7).f[3] + XMM(modrm & 0x7).f[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] + src.f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] + src.f[1];
@@ -3592,7 +3592,7 @@ void i386_device::sse_addps() // Opcode 0f 58
void i386_device::sse_sqrtps_r128_rm128() // Opcode 0f 51
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sqrt(XMM(modrm & 0x7).f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sqrt(XMM(modrm & 0x7).f[1]);
@@ -3600,7 +3600,7 @@ void i386_device::sse_sqrtps_r128_rm128() // Opcode 0f 51
XMM((modrm >> 3) & 0x7).f[3] = sqrt(XMM(modrm & 0x7).f[3]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = sqrt(src.f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sqrt(src.f[1]);
@@ -3612,7 +3612,7 @@ void i386_device::sse_sqrtps_r128_rm128() // Opcode 0f 51
void i386_device::sse_rsqrtps_r128_rm128() // Opcode 0f 52
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = 1.0 / sqrt(XMM(modrm & 0x7).f[0]);
XMM((modrm >> 3) & 0x7).f[1] = 1.0 / sqrt(XMM(modrm & 0x7).f[1]);
@@ -3620,7 +3620,7 @@ void i386_device::sse_rsqrtps_r128_rm128() // Opcode 0f 52
XMM((modrm >> 3) & 0x7).f[3] = 1.0 / sqrt(XMM(modrm & 0x7).f[3]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = 1.0 / sqrt(src.f[0]);
XMM((modrm >> 3) & 0x7).f[1] = 1.0 / sqrt(src.f[1]);
@@ -3632,7 +3632,7 @@ void i386_device::sse_rsqrtps_r128_rm128() // Opcode 0f 52
void i386_device::sse_rcpps_r128_rm128() // Opcode 0f 53
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = 1.0f / XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = 1.0f / XMM(modrm & 0x7).f[1];
@@ -3640,7 +3640,7 @@ void i386_device::sse_rcpps_r128_rm128() // Opcode 0f 53
XMM((modrm >> 3) & 0x7).f[3] = 1.0f / XMM(modrm & 0x7).f[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = 1.0f / src.f[0];
XMM((modrm >> 3) & 0x7).f[1] = 1.0f / src.f[1];
@@ -3652,13 +3652,13 @@ void i386_device::sse_rcpps_r128_rm128() // Opcode 0f 53
void i386_device::sse_andps_r128_rm128() // Opcode 0f 54
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] & XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] & XMM(modrm & 0x7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] & src.q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] & src.q[1];
@@ -3668,13 +3668,13 @@ void i386_device::sse_andps_r128_rm128() // Opcode 0f 54
void i386_device::sse_andpd_r128_rm128() // Opcode 66 0f 54
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] & XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] & XMM(modrm & 0x7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] & src.q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] & src.q[1];
@@ -3684,13 +3684,13 @@ void i386_device::sse_andpd_r128_rm128() // Opcode 66 0f 54
void i386_device::sse_andnps_r128_rm128() // Opcode 0f 55
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = ~(XMM((modrm >> 3) & 0x7).q[0]) & XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = ~(XMM((modrm >> 3) & 0x7).q[1]) & XMM(modrm & 0x7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0] = ~(XMM((modrm >> 3) & 0x7).q[0]) & src.q[0];
XMM((modrm >> 3) & 0x7).q[1] = ~(XMM((modrm >> 3) & 0x7).q[1]) & src.q[1];
@@ -3700,13 +3700,13 @@ void i386_device::sse_andnps_r128_rm128() // Opcode 0f 55
void i386_device::sse_andnpd_r128_rm128() // Opcode 66 0f 55
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = ~(XMM((modrm >> 3) & 0x7).q[0]) & XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = ~(XMM((modrm >> 3) & 0x7).q[1]) & XMM(modrm & 0x7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0] = ~(XMM((modrm >> 3) & 0x7).q[0]) & src.q[0];
XMM((modrm >> 3) & 0x7).q[1] = ~(XMM((modrm >> 3) & 0x7).q[1]) & src.q[1];
@@ -3716,13 +3716,13 @@ void i386_device::sse_andnpd_r128_rm128() // Opcode 66 0f 55
void i386_device::sse_orps_r128_rm128() // Opcode 0f 56
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] | XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] | XMM(modrm & 0x7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] | src.q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] | src.q[1];
@@ -3732,13 +3732,13 @@ void i386_device::sse_orps_r128_rm128() // Opcode 0f 56
void i386_device::sse_orpd_r128_rm128() // Opcode 66 0f 56
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] | XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] | XMM(modrm & 0x7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] | src.q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] | src.q[1];
@@ -3748,7 +3748,7 @@ void i386_device::sse_orpd_r128_rm128() // Opcode 66 0f 56
void i386_device::sse_mulps() // Opcode 0f 59 ????
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] * XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] * XMM(modrm & 0x7).f[1];
@@ -3756,7 +3756,7 @@ void i386_device::sse_mulps() // Opcode 0f 59 ????
XMM((modrm >> 3) & 0x7).f[3] = XMM((modrm >> 3) & 0x7).f[3] * XMM(modrm & 0x7).f[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] * src.f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] * src.f[1];
@@ -3768,7 +3768,7 @@ void i386_device::sse_mulps() // Opcode 0f 59 ????
void i386_device::sse_subps() // Opcode 0f 5c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] - XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] - XMM(modrm & 0x7).f[1];
@@ -3776,7 +3776,7 @@ void i386_device::sse_subps() // Opcode 0f 5c
XMM((modrm >> 3) & 0x7).f[3] = XMM((modrm >> 3) & 0x7).f[3] - XMM(modrm & 0x7).f[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] - src.f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] - src.f[1];
@@ -3814,7 +3814,7 @@ static inline double sse_min_double(double src1, double src2)
void i386_device::sse_minps() // Opcode 0f 5d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sse_min_single(XMM((modrm >> 3) & 0x7).f[0], XMM(modrm & 0x7).f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sse_min_single(XMM((modrm >> 3) & 0x7).f[1], XMM(modrm & 0x7).f[1]);
@@ -3822,7 +3822,7 @@ void i386_device::sse_minps() // Opcode 0f 5d
XMM((modrm >> 3) & 0x7).f[3] = sse_min_single(XMM((modrm >> 3) & 0x7).f[3], XMM(modrm & 0x7).f[3]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = sse_min_single(XMM((modrm >> 3) & 0x7).f[0], src.f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sse_min_single(XMM((modrm >> 3) & 0x7).f[1], src.f[1]);
@@ -3834,7 +3834,7 @@ void i386_device::sse_minps() // Opcode 0f 5d
void i386_device::sse_divps() // Opcode 0f 5e
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] / XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] / XMM(modrm & 0x7).f[1];
@@ -3842,7 +3842,7 @@ void i386_device::sse_divps() // Opcode 0f 5e
XMM((modrm >> 3) & 0x7).f[3] = XMM((modrm >> 3) & 0x7).f[3] / XMM(modrm & 0x7).f[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] / src.f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] / src.f[1];
@@ -3880,7 +3880,7 @@ static inline double sse_max_double(double src1, double src2)
void i386_device::sse_maxps() // Opcode 0f 5f
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sse_max_single(XMM((modrm >> 3) & 0x7).f[0], XMM(modrm & 0x7).f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sse_max_single(XMM((modrm >> 3) & 0x7).f[1], XMM(modrm & 0x7).f[1]);
@@ -3888,7 +3888,7 @@ void i386_device::sse_maxps() // Opcode 0f 5f
XMM((modrm >> 3) & 0x7).f[3] = sse_max_single(XMM((modrm >> 3) & 0x7).f[3], XMM(modrm & 0x7).f[3]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = sse_max_single(XMM((modrm >> 3) & 0x7).f[0], src.f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sse_max_single(XMM((modrm >> 3) & 0x7).f[1], src.f[1]);
@@ -3900,12 +3900,12 @@ void i386_device::sse_maxps() // Opcode 0f 5f
void i386_device::sse_maxss_r128_r128m32() // Opcode f3 0f 5f
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sse_max_single(XMM((modrm >> 3) & 0x7).f[0], XMM(modrm & 0x7).f[0]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
src.d[0]=READ32(ea);
XMM((modrm >> 3) & 0x7).f[0] = sse_max_single(XMM((modrm >> 3) & 0x7).f[0], src.f[0]);
}
@@ -3914,12 +3914,12 @@ void i386_device::sse_maxss_r128_r128m32() // Opcode f3 0f 5f
void i386_device::sse_addss() // Opcode f3 0f 58
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] + XMM(modrm & 0x7).f[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] + src.f[0];
}
@@ -3928,12 +3928,12 @@ void i386_device::sse_addss() // Opcode f3 0f 58
void i386_device::sse_subss() // Opcode f3 0f 5c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] - XMM(modrm & 0x7).f[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] - src.f[0];
}
@@ -3942,12 +3942,12 @@ void i386_device::sse_subss() // Opcode f3 0f 5c
void i386_device::sse_mulss() // Opcode f3 0f 5e
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] * XMM(modrm & 0x7).f[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] * src.f[0];
}
@@ -3956,12 +3956,12 @@ void i386_device::sse_mulss() // Opcode f3 0f 5e
void i386_device::sse_divss() // Opcode 0f 59
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] / XMM(modrm & 0x7).f[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] / src.f[0];
}
@@ -3970,12 +3970,12 @@ void i386_device::sse_divss() // Opcode 0f 59
void i386_device::sse_rcpss_r128_r128m32() // Opcode f3 0f 53
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = 1.0f / XMM(modrm & 0x7).f[0];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
s.d[0]=READ32(ea);
XMM((modrm >> 3) & 0x7).f[0] = 1.0f / s.f[0];
}
@@ -3984,12 +3984,12 @@ void i386_device::sse_rcpss_r128_r128m32() // Opcode f3 0f 53
void i386_device::sse_sqrtss_r128_r128m32() // Opcode f3 0f 51
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sqrt(XMM(modrm & 0x7).f[0]);
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
s.d[0]=READ32(ea);
XMM((modrm >> 3) & 0x7).f[0] = sqrt(s.f[0]);
}
@@ -3998,12 +3998,12 @@ void i386_device::sse_sqrtss_r128_r128m32() // Opcode f3 0f 51
void i386_device::sse_rsqrtss_r128_r128m32() // Opcode f3 0f 52
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = 1.0 / sqrt(XMM(modrm & 0x7).f[0]);
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
s.d[0]=READ32(ea);
XMM((modrm >> 3) & 0x7).f[0] = 1.0 / sqrt(s.f[0]);
}
@@ -4012,12 +4012,12 @@ void i386_device::sse_rsqrtss_r128_r128m32() // Opcode f3 0f 52
void i386_device::sse_minss_r128_r128m32() // Opcode f3 0f 5d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] < XMM(modrm & 0x7).f[0] ? XMM((modrm >> 3) & 0x7).f[0] : XMM(modrm & 0x7).f[0];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
s.d[0] = READ32(ea);
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] < s.f[0] ? XMM((modrm >> 3) & 0x7).f[0] : s.f[0];
}
@@ -4027,13 +4027,13 @@ void i386_device::sse_minss_r128_r128m32() // Opcode f3 0f 5d
void i386_device::sse_comiss_r128_r128m32() // Opcode 0f 2f
{
float32 a,b;
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
a = XMM((modrm >> 3) & 0x7).d[0];
b = XMM(modrm & 0x7).d[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
a = XMM((modrm >> 3) & 0x7).d[0];
b = src.d[0];
@@ -4064,13 +4064,13 @@ void i386_device::sse_comiss_r128_r128m32() // Opcode 0f 2f
void i386_device::sse_comisd_r128_r128m64() // Opcode 66 0f 2f
{
float64 a,b;
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
a = XMM((modrm >> 3) & 0x7).q[0];
b = XMM(modrm & 0x7).q[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
a = XMM((modrm >> 3) & 0x7).q[0];
b = src.q[0];
@@ -4101,13 +4101,13 @@ void i386_device::sse_comisd_r128_r128m64() // Opcode 66 0f 2f
void i386_device::sse_ucomiss_r128_r128m32() // Opcode 0f 2e
{
float32 a,b;
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
a = XMM((modrm >> 3) & 0x7).d[0];
b = XMM(modrm & 0x7).d[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
a = XMM((modrm >> 3) & 0x7).d[0];
b = src.d[0];
@@ -4138,13 +4138,13 @@ void i386_device::sse_ucomiss_r128_r128m32() // Opcode 0f 2e
void i386_device::sse_ucomisd_r128_r128m64() // Opcode 66 0f 2e
{
float64 a,b;
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
a = XMM((modrm >> 3) & 0x7).q[0];
b = XMM(modrm & 0x7).q[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
a = XMM((modrm >> 3) & 0x7).q[0];
b = src.q[0];
@@ -4174,8 +4174,8 @@ void i386_device::sse_ucomisd_r128_r128m64() // Opcode 66 0f 2e
void i386_device::sse_shufps() // Opcode 0f c6
{
- UINT8 modrm = FETCH();
- UINT8 sel = FETCH();
+ uint8_t modrm = FETCH();
+ uint8_t sel = FETCH();
int m1,m2,m3,m4;
int s,d;
m1=sel & 3;
@@ -4185,7 +4185,7 @@ void i386_device::sse_shufps() // Opcode 0f c6
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
if( modrm >= 0xc0 ) {
- UINT32 t1,t2,t3,t4;
+ uint32_t t1,t2,t3,t4;
t1=XMM(d).d[m1];
t2=XMM(d).d[m2];
t3=XMM(s).d[m3];
@@ -4195,9 +4195,9 @@ void i386_device::sse_shufps() // Opcode 0f c6
XMM(d).d[2]=t3;
XMM(d).d[3]=t4;
} else {
- UINT32 t1,t2;
+ uint32_t t1,t2;
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
t1=XMM(d).d[m1];
t2=XMM(d).d[m2];
@@ -4211,8 +4211,8 @@ void i386_device::sse_shufps() // Opcode 0f c6
void i386_device::sse_shufpd_r128_rm128_i8() // Opcode 66 0f c6
{
- UINT8 modrm = FETCH();
- UINT8 sel = FETCH();
+ uint8_t modrm = FETCH();
+ uint8_t sel = FETCH();
int m1,m2;
int s,d;
m1=sel & 1;
@@ -4220,15 +4220,15 @@ void i386_device::sse_shufpd_r128_rm128_i8() // Opcode 66 0f c6
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
if( modrm >= 0xc0 ) {
- UINT64 t1,t2;
+ uint64_t t1,t2;
t1=XMM(d).q[m1];
t2=XMM(s).q[m2];
XMM(d).q[0]=t1;
XMM(d).q[1]=t2;
} else {
- UINT64 t1;
+ uint64_t t1;
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
t1=XMM(d).q[m1];
XMM(d).q[0]=t1;
@@ -4239,9 +4239,9 @@ void i386_device::sse_shufpd_r128_rm128_i8() // Opcode 66 0f c6
void i386_device::sse_unpcklps_r128_rm128() // Opcode 0f 14
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
int s,d;
- UINT32 t1, t2, t3, t4;
+ uint32_t t1, t2, t3, t4;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
if( modrm >= 0xc0 ) {
@@ -4255,7 +4255,7 @@ void i386_device::sse_unpcklps_r128_rm128() // Opcode 0f 14
XMM(d).d[0]=t4;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
t2 = XMM(d).d[1];
XMM(d).d[3]=src.d[1];
@@ -4267,7 +4267,7 @@ void i386_device::sse_unpcklps_r128_rm128() // Opcode 0f 14
void i386_device::sse_unpcklpd_r128_rm128() // Opcode 66 0f 14
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
int s,d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
@@ -4276,7 +4276,7 @@ void i386_device::sse_unpcklpd_r128_rm128() // Opcode 66 0f 14
XMM(d).q[0]=XMM(d).q[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM(d).q[1]=src.q[0];
XMM(d).q[0]=XMM(d).q[0];
@@ -4286,9 +4286,9 @@ void i386_device::sse_unpcklpd_r128_rm128() // Opcode 66 0f 14
void i386_device::sse_unpckhps_r128_rm128() // Opcode 0f 15
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
int s,d;
- UINT32 t1, t2, t3, t4;
+ uint32_t t1, t2, t3, t4;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
if( modrm >= 0xc0 ) {
@@ -4302,7 +4302,7 @@ void i386_device::sse_unpckhps_r128_rm128() // Opcode 0f 15
XMM(d).d[3]=t4;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
t1 = XMM(d).d[2];
t2 = XMM(d).d[3];
@@ -4316,7 +4316,7 @@ void i386_device::sse_unpckhps_r128_rm128() // Opcode 0f 15
void i386_device::sse_unpckhpd_r128_rm128() // Opcode 66 0f 15
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
int s,d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
@@ -4325,7 +4325,7 @@ void i386_device::sse_unpckhpd_r128_rm128() // Opcode 66 0f 15
XMM(d).q[1]=XMM(s).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM(d).q[0]=XMM(d).q[1];
XMM(d).q[1]=src.q[1];
@@ -4357,7 +4357,7 @@ static inline bool sse_isdoubleunordered(double op1, double op2)
return !((op1 != op1) || (op1 != op2));
}
-void i386_device::sse_predicate_compare_single(UINT8 imm8, XMM_REG d, XMM_REG s)
+void i386_device::sse_predicate_compare_single(uint8_t imm8, XMM_REG d, XMM_REG s)
{
switch (imm8 & 7)
{
@@ -4412,7 +4412,7 @@ void i386_device::sse_predicate_compare_single(UINT8 imm8, XMM_REG d, XMM_REG s)
}
}
-void i386_device::sse_predicate_compare_double(UINT8 imm8, XMM_REG d, XMM_REG s)
+void i386_device::sse_predicate_compare_double(uint8_t imm8, XMM_REG d, XMM_REG s)
{
switch (imm8 & 7)
{
@@ -4451,7 +4451,7 @@ void i386_device::sse_predicate_compare_double(UINT8 imm8, XMM_REG d, XMM_REG s)
}
}
-void i386_device::sse_predicate_compare_single_scalar(UINT8 imm8, XMM_REG d, XMM_REG s)
+void i386_device::sse_predicate_compare_single_scalar(uint8_t imm8, XMM_REG d, XMM_REG s)
{
switch (imm8 & 7)
{
@@ -4482,7 +4482,7 @@ void i386_device::sse_predicate_compare_single_scalar(UINT8 imm8, XMM_REG d, XMM
}
}
-void i386_device::sse_predicate_compare_double_scalar(UINT8 imm8, XMM_REG d, XMM_REG s)
+void i386_device::sse_predicate_compare_double_scalar(uint8_t imm8, XMM_REG d, XMM_REG s)
{
switch (imm8 & 7)
{
@@ -4515,18 +4515,18 @@ void i386_device::sse_predicate_compare_double_scalar(UINT8 imm8, XMM_REG d, XMM
void i386_device::sse_cmpps_r128_rm128_i8() // Opcode 0f c2
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
sse_predicate_compare_single(imm8, XMM(d), XMM(s));
} else {
int d;
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
READXMM(ea, s);
d=(modrm >> 3) & 0x7;
sse_predicate_compare_single(imm8, XMM(d), s);
@@ -4536,18 +4536,18 @@ void i386_device::sse_cmpps_r128_rm128_i8() // Opcode 0f c2
void i386_device::sse_cmppd_r128_rm128_i8() // Opcode 66 0f c2
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
sse_predicate_compare_double(imm8, XMM(d), XMM(s));
} else {
int d;
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
READXMM(ea, s);
d=(modrm >> 3) & 0x7;
sse_predicate_compare_double(imm8, XMM(d), s);
@@ -4557,18 +4557,18 @@ void i386_device::sse_cmppd_r128_rm128_i8() // Opcode 66 0f c2
void i386_device::sse_cmpss_r128_r128m32_i8() // Opcode f3 0f c2
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
sse_predicate_compare_single_scalar(imm8, XMM(d), XMM(s));
} else {
int d;
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
s.d[0]=READ32(ea);
d=(modrm >> 3) & 0x7;
sse_predicate_compare_single_scalar(imm8, XMM(d), s);
@@ -4579,18 +4579,18 @@ void i386_device::sse_cmpss_r128_r128m32_i8() // Opcode f3 0f c2
void i386_device::sse_pinsrw_r64_r16m16_i8() // Opcode 0f c4, 16bit register
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT8 imm8 = FETCH();
- UINT16 v = LOAD_RM16(modrm);
+ uint8_t imm8 = FETCH();
+ uint16_t v = LOAD_RM16(modrm);
if (m_xmm_operand_size)
XMM((modrm >> 3) & 0x7).w[imm8 & 7] = v;
else
MMX((modrm >> 3) & 0x7).w[imm8 & 3] = v;
} else {
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
- UINT16 v = READ16(ea);
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
+ uint16_t v = READ16(ea);
if (m_xmm_operand_size)
XMM((modrm >> 3) & 0x7).w[imm8 & 7] = v;
else
@@ -4602,15 +4602,15 @@ void i386_device::sse_pinsrw_r64_r16m16_i8() // Opcode 0f c4, 16bit register
void i386_device::sse_pinsrw_r64_r32m16_i8() // Opcode 0f c4, 32bit register
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT8 imm8 = FETCH();
- UINT16 v = (UINT16)LOAD_RM32(modrm);
+ uint8_t imm8 = FETCH();
+ uint16_t v = (uint16_t)LOAD_RM32(modrm);
MMX((modrm >> 3) & 0x7).w[imm8 & 3] = v;
} else {
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
- UINT16 v = READ16(ea);
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
+ uint16_t v = READ16(ea);
MMX((modrm >> 3) & 0x7).w[imm8 & 3] = v;
}
CYCLES(1); // TODO: correct cycle count
@@ -4618,16 +4618,16 @@ void i386_device::sse_pinsrw_r64_r32m16_i8() // Opcode 0f c4, 32bit register
void i386_device::sse_pinsrw_r128_r32m16_i8() // Opcode 66 0f c4
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
- UINT8 imm8 = FETCH();
- UINT16 v = (UINT16)LOAD_RM32(modrm);
+ uint8_t imm8 = FETCH();
+ uint16_t v = (uint16_t)LOAD_RM32(modrm);
XMM((modrm >> 3) & 0x7).w[imm8 & 7] = v;
}
else {
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
- UINT16 v = READ16(ea);
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
+ uint16_t v = READ16(ea);
XMM((modrm >> 3) & 0x7).w[imm8 & 7] = v;
}
CYCLES(1); // TODO: correct cycle count
@@ -4636,15 +4636,15 @@ void i386_device::sse_pinsrw_r128_r32m16_i8() // Opcode 66 0f c4
void i386_device::sse_pextrw_r16_r64_i8() // Opcode 0f c5
{
//MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
if (m_xmm_operand_size)
STORE_REG16(modrm, XMM(modrm & 0x7).w[imm8 & 7]);
else
STORE_REG16(modrm, MMX(modrm & 0x7).w[imm8 & 3]);
} else {
- //UINT8 imm8 = FETCH();
+ //uint8_t imm8 = FETCH();
report_invalid_modrm("pextrw_r16_r64_i8", modrm);
}
CYCLES(1); // TODO: correct cycle count
@@ -4653,12 +4653,12 @@ void i386_device::sse_pextrw_r16_r64_i8() // Opcode 0f c5
void i386_device::sse_pextrw_r32_r64_i8() // Opcode 0f c5
{
//MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
STORE_REG32(modrm, MMX(modrm & 0x7).w[imm8 & 3]);
} else {
- //UINT8 imm8 = FETCH();
+ //uint8_t imm8 = FETCH();
report_invalid_modrm("pextrw_r32_r64_i8", modrm);
}
CYCLES(1); // TODO: correct cycle count
@@ -4666,13 +4666,13 @@ void i386_device::sse_pextrw_r32_r64_i8() // Opcode 0f c5
void i386_device::sse_pextrw_reg_r128_i8() // Opcode 66 0f c5
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
STORE_REG32(modrm, XMM(modrm & 0x7).w[imm8 & 7]);
}
else {
- //UINT8 imm8 = FETCH();
+ //uint8_t imm8 = FETCH();
report_invalid_modrm("sse_pextrw_reg_r128_i8", modrm);
}
CYCLES(1); // TODO: correct cycle count
@@ -4682,13 +4682,13 @@ void i386_device::sse_pminub_r64_rm64() // Opcode 0f da
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n] = MMX((modrm >> 3) & 0x7).b[n] < MMX(modrm & 0x7).b[n] ? MMX((modrm >> 3) & 0x7).b[n] : MMX(modrm & 0x7).b[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n] = MMX((modrm >> 3) & 0x7).b[n] < s.b[n] ? MMX((modrm >> 3) & 0x7).b[n] : s.b[n];
@@ -4698,13 +4698,13 @@ void i386_device::sse_pminub_r64_rm64() // Opcode 0f da
void i386_device::sse_pminub_r128_rm128() // Opcode 66 0f da
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] < XMM(modrm & 0x7).b[n] ? XMM((modrm >> 3) & 0x7).b[n] : XMM(modrm & 0x7).b[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] < s.b[n] ? XMM((modrm >> 3) & 0x7).b[n] : s.b[n];
@@ -4716,13 +4716,13 @@ void i386_device::sse_pmaxub_r64_rm64() // Opcode 0f de
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n] = MMX((modrm >> 3) & 0x7).b[n] > MMX(modrm & 0x7).b[n] ? MMX((modrm >> 3) & 0x7).b[n] : MMX(modrm & 0x7).b[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 8;n++)
MMX((modrm >> 3) & 0x7).b[n] = MMX((modrm >> 3) & 0x7).b[n] > s.b[n] ? MMX((modrm >> 3) & 0x7).b[n] : s.b[n];
@@ -4734,16 +4734,16 @@ void i386_device::sse_pavgb_r64_rm64() // Opcode 0f e0
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
- MMX((modrm >> 3) & 0x7).b[n] = ((UINT16)MMX((modrm >> 3) & 0x7).b[n] + (UINT16)MMX(modrm & 0x7).b[n] + 1) >> 1;
+ MMX((modrm >> 3) & 0x7).b[n] = ((uint16_t)MMX((modrm >> 3) & 0x7).b[n] + (uint16_t)MMX(modrm & 0x7).b[n] + 1) >> 1;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 8;n++)
- MMX((modrm >> 3) & 0x7).b[n] = ((UINT16)MMX((modrm >> 3) & 0x7).b[n] + (UINT16)s.b[n] + 1) >> 1;
+ MMX((modrm >> 3) & 0x7).b[n] = ((uint16_t)MMX((modrm >> 3) & 0x7).b[n] + (uint16_t)s.b[n] + 1) >> 1;
}
CYCLES(1); // TODO: correct cycle count
}
@@ -4752,16 +4752,16 @@ void i386_device::sse_pavgw_r64_rm64() // Opcode 0f e3
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
- MMX((modrm >> 3) & 0x7).w[n] = ((UINT32)MMX((modrm >> 3) & 0x7).w[n] + (UINT32)MMX(modrm & 0x7).w[n] + 1) >> 1;
+ MMX((modrm >> 3) & 0x7).w[n] = ((uint32_t)MMX((modrm >> 3) & 0x7).w[n] + (uint32_t)MMX(modrm & 0x7).w[n] + 1) >> 1;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 4;n++)
- MMX((modrm >> 3) & 0x7).w[n] = ((UINT32)MMX((modrm >> 3) & 0x7).w[n] + (UINT32)s.w[n] + 1) >> 1;
+ MMX((modrm >> 3) & 0x7).w[n] = ((uint32_t)MMX((modrm >> 3) & 0x7).w[n] + (uint32_t)s.w[n] + 1) >> 1;
}
CYCLES(1); // TODO: correct cycle count
}
@@ -4769,20 +4769,20 @@ void i386_device::sse_pavgw_r64_rm64() // Opcode 0f e3
void i386_device::sse_pmulhuw_r64_rm64() // Opcode 0f e4
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- MMX((modrm >> 3) & 0x7).w[0]=((UINT32)MMX((modrm >> 3) & 0x7).w[0]*(UINT32)MMX(modrm & 7).w[0]) >> 16;
- MMX((modrm >> 3) & 0x7).w[1]=((UINT32)MMX((modrm >> 3) & 0x7).w[1]*(UINT32)MMX(modrm & 7).w[1]) >> 16;
- MMX((modrm >> 3) & 0x7).w[2]=((UINT32)MMX((modrm >> 3) & 0x7).w[2]*(UINT32)MMX(modrm & 7).w[2]) >> 16;
- MMX((modrm >> 3) & 0x7).w[3]=((UINT32)MMX((modrm >> 3) & 0x7).w[3]*(UINT32)MMX(modrm & 7).w[3]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[0]=((uint32_t)MMX((modrm >> 3) & 0x7).w[0]*(uint32_t)MMX(modrm & 7).w[0]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[1]=((uint32_t)MMX((modrm >> 3) & 0x7).w[1]*(uint32_t)MMX(modrm & 7).w[1]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[2]=((uint32_t)MMX((modrm >> 3) & 0x7).w[2]*(uint32_t)MMX(modrm & 7).w[2]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[3]=((uint32_t)MMX((modrm >> 3) & 0x7).w[3]*(uint32_t)MMX(modrm & 7).w[3]) >> 16;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
- MMX((modrm >> 3) & 0x7).w[0]=((UINT32)MMX((modrm >> 3) & 0x7).w[0]*(UINT32)s.w[0]) >> 16;
- MMX((modrm >> 3) & 0x7).w[1]=((UINT32)MMX((modrm >> 3) & 0x7).w[1]*(UINT32)s.w[1]) >> 16;
- MMX((modrm >> 3) & 0x7).w[2]=((UINT32)MMX((modrm >> 3) & 0x7).w[2]*(UINT32)s.w[2]) >> 16;
- MMX((modrm >> 3) & 0x7).w[3]=((UINT32)MMX((modrm >> 3) & 0x7).w[3]*(UINT32)s.w[3]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[0]=((uint32_t)MMX((modrm >> 3) & 0x7).w[0]*(uint32_t)s.w[0]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[1]=((uint32_t)MMX((modrm >> 3) & 0x7).w[1]*(uint32_t)s.w[1]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[2]=((uint32_t)MMX((modrm >> 3) & 0x7).w[2]*(uint32_t)s.w[2]) >> 16;
+ MMX((modrm >> 3) & 0x7).w[3]=((uint32_t)MMX((modrm >> 3) & 0x7).w[3]*(uint32_t)s.w[3]) >> 16;
}
CYCLES(1); // TODO: correct cycle count
}
@@ -4791,13 +4791,13 @@ void i386_device::sse_pminsw_r64_rm64() // Opcode 0f ea
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).s[n] = MMX((modrm >> 3) & 0x7).s[n] < MMX(modrm & 0x7).s[n] ? MMX((modrm >> 3) & 0x7).s[n] : MMX(modrm & 0x7).s[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).s[n] = MMX((modrm >> 3) & 0x7).s[n] < s.s[n] ? MMX((modrm >> 3) & 0x7).s[n] : s.s[n];
@@ -4809,13 +4809,13 @@ void i386_device::sse_pmaxsw_r64_rm64() // Opcode 0f ee
{
int n;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).s[n] = MMX((modrm >> 3) & 0x7).s[n] > MMX(modrm & 0x7).s[n] ? MMX((modrm >> 3) & 0x7).s[n] : MMX(modrm & 0x7).s[n];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
for (n=0;n < 4;n++)
MMX((modrm >> 3) & 0x7).s[n] = MMX((modrm >> 3) & 0x7).s[n] > s.s[n] ? MMX((modrm >> 3) & 0x7).s[n] : s.s[n];
@@ -4826,30 +4826,30 @@ void i386_device::sse_pmaxsw_r64_rm64() // Opcode 0f ee
void i386_device::sse_pmuludq_r64_rm64() // Opcode 0f f4
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- MMX((modrm >> 3) & 0x7).q = (UINT64)MMX((modrm >> 3) & 0x7).d[0] * (UINT64)MMX(modrm & 0x7).d[0];
+ MMX((modrm >> 3) & 0x7).q = (uint64_t)MMX((modrm >> 3) & 0x7).d[0] * (uint64_t)MMX(modrm & 0x7).d[0];
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
- MMX((modrm >> 3) & 0x7).q = (UINT64)MMX((modrm >> 3) & 0x7).d[0] * (UINT64)s.d[0];
+ MMX((modrm >> 3) & 0x7).q = (uint64_t)MMX((modrm >> 3) & 0x7).d[0] * (uint64_t)s.d[0];
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_pmuludq_r128_rm128() // Opcode 66 0f f4
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- XMM((modrm >> 3) & 0x7).q[0] = (UINT64)XMM((modrm >> 3) & 0x7).d[0] * (UINT64)XMM(modrm & 0x7).d[0];
- XMM((modrm >> 3) & 0x7).q[1] = (UINT64)XMM((modrm >> 3) & 0x7).d[2] * (UINT64)XMM(modrm & 0x7).d[2];
+ XMM((modrm >> 3) & 0x7).q[0] = (uint64_t)XMM((modrm >> 3) & 0x7).d[0] * (uint64_t)XMM(modrm & 0x7).d[0];
+ XMM((modrm >> 3) & 0x7).q[1] = (uint64_t)XMM((modrm >> 3) & 0x7).d[2] * (uint64_t)XMM(modrm & 0x7).d[2];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
- XMM((modrm >> 3) & 0x7).q[0] = (UINT64)XMM((modrm >> 3) & 0x7).d[0] * (UINT64)s.d[0];
- XMM((modrm >> 3) & 0x7).q[1] = (UINT64)XMM((modrm >> 3) & 0x7).d[2] * (UINT64)s.d[2];
+ XMM((modrm >> 3) & 0x7).q[0] = (uint64_t)XMM((modrm >> 3) & 0x7).d[0] * (uint64_t)s.d[0];
+ XMM((modrm >> 3) & 0x7).q[1] = (uint64_t)XMM((modrm >> 3) & 0x7).d[2] * (uint64_t)s.d[2];
}
CYCLES(1); // TODO: correct cycle count
}
@@ -4857,22 +4857,22 @@ void i386_device::sse_pmuludq_r128_rm128() // Opcode 66 0f f4
void i386_device::sse_psadbw_r64_rm64() // Opcode 0f f6
{
int n;
- INT32 temp;
+ int32_t temp;
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
temp=0;
for (n=0;n < 8;n++)
- temp += abs((INT32)MMX((modrm >> 3) & 0x7).b[n] - (INT32)MMX(modrm & 0x7).b[n]);
- MMX((modrm >> 3) & 0x7).l=(UINT64)temp & 0xffff;
+ temp += abs((int32_t)MMX((modrm >> 3) & 0x7).b[n] - (int32_t)MMX(modrm & 0x7).b[n]);
+ MMX((modrm >> 3) & 0x7).l=(uint64_t)temp & 0xffff;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
temp=0;
for (n=0;n < 8;n++)
- temp += abs((INT32)MMX((modrm >> 3) & 0x7).b[n] - (INT32)s.b[n]);
- MMX((modrm >> 3) & 0x7).l=(UINT64)temp & 0xffff;
+ temp += abs((int32_t)MMX((modrm >> 3) & 0x7).b[n] - (int32_t)s.b[n]);
+ MMX((modrm >> 3) & 0x7).l=(uint64_t)temp & 0xffff;
}
CYCLES(1); // TODO: correct cycle count
}
@@ -4880,12 +4880,12 @@ void i386_device::sse_psadbw_r64_rm64() // Opcode 0f f6
void i386_device::sse_psubq_r64_rm64() // Opcode 0f fb
{
MMXPROLOG();
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q - MMX(modrm & 7).q;
} else {
MMX_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q - s.q;
}
@@ -4894,13 +4894,13 @@ void i386_device::sse_psubq_r64_rm64() // Opcode 0f fb
void i386_device::sse_psubq_r128_rm128() // Opcode 66 0f fb
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] - XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] - XMM(modrm & 7).q[1];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] - s.q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] - s.q[1];
@@ -4910,11 +4910,11 @@ void i386_device::sse_psubq_r128_rm128() // Opcode 66 0f fb
void i386_device::sse_pshufd_r128_rm128_i8() // Opcode 66 0f 70
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
t.q[0]=XMM(s).q[0];
@@ -4926,8 +4926,8 @@ void i386_device::sse_pshufd_r128_rm128_i8() // Opcode 66 0f 70
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
READXMM(ea, s);
XMM(d).d[0]=s.d[(imm8 & 3)];
XMM(d).d[1]=s.d[((imm8 >> 2) & 3)];
@@ -4939,11 +4939,11 @@ void i386_device::sse_pshufd_r128_rm128_i8() // Opcode 66 0f 70
void i386_device::sse_pshuflw_r128_rm128_i8() // Opcode f2 0f 70
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
t.q[0]=XMM(s).q[0];
@@ -4955,8 +4955,8 @@ void i386_device::sse_pshuflw_r128_rm128_i8() // Opcode f2 0f 70
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
READXMM(ea, s);
XMM(d).q[1]=s.q[1];
XMM(d).w[0]=s.w[imm8 & 3];
@@ -4969,11 +4969,11 @@ void i386_device::sse_pshuflw_r128_rm128_i8() // Opcode f2 0f 70
void i386_device::sse_pshufhw_r128_rm128_i8() // Opcode f3 0f 70
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
t.q[0]=XMM(s).q[1];
@@ -4985,8 +4985,8 @@ void i386_device::sse_pshufhw_r128_rm128_i8() // Opcode f3 0f 70
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
READXMM(ea, s);
XMM(d).q[0]=s.q[0];
XMM(d).w[4]=s.w[4 + (imm8 & 3)];
@@ -4999,7 +4999,7 @@ void i386_device::sse_pshufhw_r128_rm128_i8() // Opcode f3 0f 70
void i386_device::sse_packsswb_r128_rm128() // Opcode 66 0f 63
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM_REG t;
int s, d;
@@ -5015,7 +5015,7 @@ void i386_device::sse_packsswb_r128_rm128() // Opcode 66 0f 63
else {
XMM_REG s;
int d = (modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n = 0; n < 8; n++)
XMM(d).c[n] = SaturatedSignedWordToSignedByte(XMM(d).s[n]);
@@ -5027,7 +5027,7 @@ void i386_device::sse_packsswb_r128_rm128() // Opcode 66 0f 63
void i386_device::sse_packssdw_r128_rm128() // Opcode 66 0f 6b
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if (modrm >= 0xc0) {
XMM_REG t;
int s, d;
@@ -5047,7 +5047,7 @@ void i386_device::sse_packssdw_r128_rm128() // Opcode 66 0f 6b
else {
XMM_REG s;
int d = (modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
XMM(d).s[0] = SaturatedSignedDwordToSignedWord(XMM(d).i[0]);
XMM(d).s[1] = SaturatedSignedDwordToSignedWord(XMM(d).i[1]);
@@ -5063,7 +5063,7 @@ void i386_device::sse_packssdw_r128_rm128() // Opcode 66 0f 6b
void i386_device::sse_pcmpgtb_r128_rm128() // Opcode 66 0f 64
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5073,7 +5073,7 @@ void i386_device::sse_pcmpgtb_r128_rm128() // Opcode 66 0f 64
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int c=0;c <= 15;c++)
XMM(d).b[c]=(XMM(d).c[c] > s.c[c]) ? 0xff : 0;
@@ -5083,7 +5083,7 @@ void i386_device::sse_pcmpgtb_r128_rm128() // Opcode 66 0f 64
void i386_device::sse_pcmpgtw_r128_rm128() // Opcode 66 0f 65
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5093,7 +5093,7 @@ void i386_device::sse_pcmpgtw_r128_rm128() // Opcode 66 0f 65
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int c=0;c <= 7;c++)
XMM(d).w[c]=(XMM(d).s[c] > s.s[c]) ? 0xffff : 0;
@@ -5103,7 +5103,7 @@ void i386_device::sse_pcmpgtw_r128_rm128() // Opcode 66 0f 65
void i386_device::sse_pcmpgtd_r128_rm128() // Opcode 66 0f 66
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5113,7 +5113,7 @@ void i386_device::sse_pcmpgtd_r128_rm128() // Opcode 66 0f 66
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int c=0;c <= 3;c++)
XMM(d).d[c]=(XMM(d).i[c] > s.i[c]) ? 0xffffffff : 0;
@@ -5123,7 +5123,7 @@ void i386_device::sse_pcmpgtd_r128_rm128() // Opcode 66 0f 66
void i386_device::sse_packuswb_r128_rm128() // Opcode 66 0f 67
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5138,7 +5138,7 @@ void i386_device::sse_packuswb_r128_rm128() // Opcode 66 0f 67
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n = 0; n < 8;n++)
XMM(d).b[n]=SaturatedSignedWordToUnsignedByte(XMM(d).s[n]);
@@ -5150,7 +5150,7 @@ void i386_device::sse_packuswb_r128_rm128() // Opcode 66 0f 67
void i386_device::sse_punpckhbw_r128_rm128() // Opcode 66 0f 68
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5164,7 +5164,7 @@ void i386_device::sse_punpckhbw_r128_rm128() // Opcode 66 0f 68
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n = 0; n < 16; n += 2) {
XMM(d).b[n]=XMM(d).b[8+(n >> 1)];
@@ -5176,7 +5176,7 @@ void i386_device::sse_punpckhbw_r128_rm128() // Opcode 66 0f 68
void i386_device::sse_punpckhwd_r128_rm128() // Opcode 66 0f 69
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5190,7 +5190,7 @@ void i386_device::sse_punpckhwd_r128_rm128() // Opcode 66 0f 69
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n = 0; n < 8; n += 2) {
XMM(d).w[n]=XMM(d).w[4+(n >> 1)];
@@ -5202,7 +5202,7 @@ void i386_device::sse_punpckhwd_r128_rm128() // Opcode 66 0f 69
void i386_device::sse_unpckhdq_r128_rm128() // Opcode 66 0f 6a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5216,7 +5216,7 @@ void i386_device::sse_unpckhdq_r128_rm128() // Opcode 66 0f 6a
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
XMM(d).d[0]=XMM(d).d[2];
XMM(d).d[1]=s.d[2];
@@ -5228,7 +5228,7 @@ void i386_device::sse_unpckhdq_r128_rm128() // Opcode 66 0f 6a
void i386_device::sse_punpckhqdq_r128_rm128() // Opcode 66 0f 6d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5240,7 +5240,7 @@ void i386_device::sse_punpckhqdq_r128_rm128() // Opcode 66 0f 6d
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
XMM(d).q[0]=XMM(d).q[1];
XMM(d).q[1]=s.q[1];
@@ -5250,7 +5250,7 @@ void i386_device::sse_punpckhqdq_r128_rm128() // Opcode 66 0f 6d
void i386_device::sse_pcmpeqb_r128_rm128() // Opcode 66 0f 74
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5260,7 +5260,7 @@ void i386_device::sse_pcmpeqb_r128_rm128() // Opcode 66 0f 74
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int c=0;c <= 15;c++)
XMM(d).b[c]=(XMM(d).c[c] == s.c[c]) ? 0xff : 0;
@@ -5270,7 +5270,7 @@ void i386_device::sse_pcmpeqb_r128_rm128() // Opcode 66 0f 74
void i386_device::sse_pcmpeqw_r128_rm128() // Opcode 66 0f 75
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5280,7 +5280,7 @@ void i386_device::sse_pcmpeqw_r128_rm128() // Opcode 66 0f 75
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int c=0;c <= 7;c++)
XMM(d).w[c]=(XMM(d).s[c] == s.s[c]) ? 0xffff : 0;
@@ -5290,7 +5290,7 @@ void i386_device::sse_pcmpeqw_r128_rm128() // Opcode 66 0f 75
void i386_device::sse_pcmpeqd_r128_rm128() // Opcode 66 0f 76
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5300,7 +5300,7 @@ void i386_device::sse_pcmpeqd_r128_rm128() // Opcode 66 0f 76
} else {
XMM_REG s;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int c=0;c <= 3;c++)
XMM(d).d[c]=(XMM(d).i[c] == s.i[c]) ? 0xffffffff : 0;
@@ -5310,7 +5310,7 @@ void i386_device::sse_pcmpeqd_r128_rm128() // Opcode 66 0f 76
void i386_device::sse_paddq_r128_rm128() // Opcode 66 0f d4
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5320,7 +5320,7 @@ void i386_device::sse_paddq_r128_rm128() // Opcode 66 0f d4
} else {
XMM_REG src;
int d=(modrm >> 3) & 0x7;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM(d).q[0]=XMM(d).q[0]+src.q[0];
XMM(d).q[1]=XMM(d).q[1]+src.q[1];
@@ -5330,34 +5330,34 @@ void i386_device::sse_paddq_r128_rm128() // Opcode 66 0f d4
void i386_device::sse_pmullw_r128_rm128() // Opcode 66 0f d5
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
for (int n = 0; n < 8;n++)
- XMM(d).w[n]=(UINT32)((INT32)XMM(d).s[n]*(INT32)XMM(s).s[n]) & 0xffff;
+ XMM(d).w[n]=(uint32_t)((int32_t)XMM(d).s[n]*(int32_t)XMM(s).s[n]) & 0xffff;
} else {
XMM_REG src;
int d;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
d=(modrm >> 3) & 0x7;
for (int n = 0; n < 8;n++)
- XMM(d).w[n]=(UINT32)((INT32)XMM(d).s[n]*(INT32)src.s[n]) & 0xffff;
+ XMM(d).w[n]=(uint32_t)((int32_t)XMM(d).s[n]*(int32_t)src.s[n]) & 0xffff;
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_paddb_r128_rm128() // Opcode 66 0f fc
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] + XMM(modrm & 7).b[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] + s.b[n];
@@ -5367,13 +5367,13 @@ void i386_device::sse_paddb_r128_rm128() // Opcode 66 0f fc
void i386_device::sse_paddw_r128_rm128() // Opcode 66 0f fd
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] + XMM(modrm & 7).w[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] + s.w[n];
@@ -5383,13 +5383,13 @@ void i386_device::sse_paddw_r128_rm128() // Opcode 66 0f fd
void i386_device::sse_paddd_r128_rm128() // Opcode 66 0f fe
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 4;n++)
XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] + XMM(modrm & 7).d[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 4;n++)
XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] + s.d[n];
@@ -5399,13 +5399,13 @@ void i386_device::sse_paddd_r128_rm128() // Opcode 66 0f fe
void i386_device::sse_psubusb_r128_rm128() // Opcode 66 0f d8
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] < XMM(modrm & 7).b[n] ? 0 : XMM((modrm >> 3) & 0x7).b[n]-XMM(modrm & 7).b[n];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] < src.b[n] ? 0 : XMM((modrm >> 3) & 0x7).b[n]-src.b[n];
@@ -5415,13 +5415,13 @@ void i386_device::sse_psubusb_r128_rm128() // Opcode 66 0f d8
void i386_device::sse_psubusw_r128_rm128() // Opcode 66 0f d9
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] < XMM(modrm & 7).w[n] ? 0 : XMM((modrm >> 3) & 0x7).w[n]-XMM(modrm & 7).w[n];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] < src.w[n] ? 0 : XMM((modrm >> 3) & 0x7).w[n]-src.w[n];
@@ -5431,13 +5431,13 @@ void i386_device::sse_psubusw_r128_rm128() // Opcode 66 0f d9
void i386_device::sse_pand_r128_rm128() // Opcode 66 0f db
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] & XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] & XMM(modrm & 7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] & src.q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] & src.q[1];
@@ -5447,13 +5447,13 @@ void i386_device::sse_pand_r128_rm128() // Opcode 66 0f db
void i386_device::sse_pandn_r128_rm128() // Opcode 66 0f df
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=(~XMM((modrm >> 3) & 0x7).q[0]) & XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=(~XMM((modrm >> 3) & 0x7).q[1]) & XMM(modrm & 7).q[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).q[0]=(~XMM((modrm >> 3) & 0x7).q[0]) & src.q[0];
XMM((modrm >> 3) & 0x7).q[1]=(~XMM((modrm >> 3) & 0x7).q[1]) & src.q[1];
@@ -5463,13 +5463,13 @@ void i386_device::sse_pandn_r128_rm128() // Opcode 66 0f df
void i386_device::sse_paddusb_r128_rm128() // Opcode 66 0f dc
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] > (0xff-XMM(modrm & 7).b[n]) ? 0xff : XMM((modrm >> 3) & 0x7).b[n]+XMM(modrm & 7).b[n];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] > (0xff-src.b[n]) ? 0xff : XMM((modrm >> 3) & 0x7).b[n]+src.b[n];
@@ -5479,13 +5479,13 @@ void i386_device::sse_paddusb_r128_rm128() // Opcode 66 0f dc
void i386_device::sse_paddusw_r128_rm128() // Opcode 66 0f dd
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] > (0xffff-XMM(modrm & 7).w[n]) ? 0xffff : XMM((modrm >> 3) & 0x7).w[n]+XMM(modrm & 7).w[n];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] > (0xffff-src.w[n]) ? 0xffff : XMM((modrm >> 3) & 0x7).w[n]+src.w[n];
@@ -5495,13 +5495,13 @@ void i386_device::sse_paddusw_r128_rm128() // Opcode 66 0f dd
void i386_device::sse_pmaxub_r128_rm128() // Opcode 66 0f de
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] > XMM(modrm & 0x7).b[n] ? XMM((modrm >> 3) & 0x7).b[n] : XMM(modrm & 0x7).b[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] > s.b[n] ? XMM((modrm >> 3) & 0x7).b[n] : s.b[n];
@@ -5511,77 +5511,77 @@ void i386_device::sse_pmaxub_r128_rm128() // Opcode 66 0f de
void i386_device::sse_pmulhuw_r128_rm128() // Opcode 66 0f e4
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).w[n]=((UINT32)XMM((modrm >> 3) & 0x7).w[n]*(UINT32)XMM(modrm & 7).w[n]) >> 16;
+ XMM((modrm >> 3) & 0x7).w[n]=((uint32_t)XMM((modrm >> 3) & 0x7).w[n]*(uint32_t)XMM(modrm & 7).w[n]) >> 16;
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).w[n]=((UINT32)XMM((modrm >> 3) & 0x7).w[n]*(UINT32)s.w[n]) >> 16;
+ XMM((modrm >> 3) & 0x7).w[n]=((uint32_t)XMM((modrm >> 3) & 0x7).w[n]*(uint32_t)s.w[n]) >> 16;
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_pmulhw_r128_rm128() // Opcode 66 0f e5
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).w[n]=(UINT32)((INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)XMM(modrm & 7).s[n]) >> 16;
+ XMM((modrm >> 3) & 0x7).w[n]=(uint32_t)((int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)XMM(modrm & 7).s[n]) >> 16;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).w[n]=(UINT32)((INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)src.s[n]) >> 16;
+ XMM((modrm >> 3) & 0x7).w[n]=(uint32_t)((int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)src.s[n]) >> 16;
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_psubsb_r128_rm128() // Opcode 66 0f e8
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
- XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)XMM((modrm >> 3) & 0x7).c[n] - (INT16)XMM(modrm & 7).c[n]);
+ XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)XMM((modrm >> 3) & 0x7).c[n] - (int16_t)XMM(modrm & 7).c[n]);
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 16;n++)
- XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)XMM((modrm >> 3) & 0x7).c[n] - (INT16)s.c[n]);
+ XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)XMM((modrm >> 3) & 0x7).c[n] - (int16_t)s.c[n]);
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_psubsw_r128_rm128() // Opcode 66 0f e9
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)XMM((modrm >> 3) & 0x7).s[n] - (INT32)XMM(modrm & 7).s[n]);
+ XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)XMM((modrm >> 3) & 0x7).s[n] - (int32_t)XMM(modrm & 7).s[n]);
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)XMM((modrm >> 3) & 0x7).s[n] - (INT32)s.s[n]);
+ XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)XMM((modrm >> 3) & 0x7).s[n] - (int32_t)s.s[n]);
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_pminsw_r128_rm128() // Opcode 66 0f ea
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] < XMM(modrm & 0x7).s[n] ? XMM((modrm >> 3) & 0x7).s[n] : XMM(modrm & 0x7).s[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] < s.s[n] ? XMM((modrm >> 3) & 0x7).s[n] : s.s[n];
@@ -5591,13 +5591,13 @@ void i386_device::sse_pminsw_r128_rm128() // Opcode 66 0f ea
void i386_device::sse_pmaxsw_r128_rm128() // Opcode 66 0f ee
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] > XMM(modrm & 0x7).s[n] ? XMM((modrm >> 3) & 0x7).s[n] : XMM(modrm & 0x7).s[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] > s.s[n] ? XMM((modrm >> 3) & 0x7).s[n] : s.s[n];
@@ -5607,45 +5607,45 @@ void i386_device::sse_pmaxsw_r128_rm128() // Opcode 66 0f ee
void i386_device::sse_paddsb_r128_rm128() // Opcode 66 0f ec
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
- XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)XMM((modrm >> 3) & 0x7).c[n] + (INT16)XMM(modrm & 7).c[n]);
+ XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)XMM((modrm >> 3) & 0x7).c[n] + (int16_t)XMM(modrm & 7).c[n]);
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 16;n++)
- XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((INT16)XMM((modrm >> 3) & 0x7).c[n] + (INT16)s.c[n]);
+ XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)XMM((modrm >> 3) & 0x7).c[n] + (int16_t)s.c[n]);
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_paddsw_r128_rm128() // Opcode 66 0f ed
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)XMM((modrm >> 3) & 0x7).s[n] + (INT32)XMM(modrm & 7).s[n]);
+ XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)XMM((modrm >> 3) & 0x7).s[n] + (int32_t)XMM(modrm & 7).s[n]);
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((INT32)XMM((modrm >> 3) & 0x7).s[n] + (INT32)s.s[n]);
+ XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)XMM((modrm >> 3) & 0x7).s[n] + (int32_t)s.s[n]);
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_por_r128_rm128() // Opcode 66 0f eb
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] | XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] | XMM(modrm & 7).q[1];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] | s.q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] | s.q[1];
@@ -5655,13 +5655,13 @@ void i386_device::sse_por_r128_rm128() // Opcode 66 0f eb
void i386_device::sse_pxor_r128_rm128() // Opcode 66 0f ef
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] ^ XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] ^ XMM(modrm & 7).q[1];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] ^ s.q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] ^ s.q[1];
@@ -5671,31 +5671,31 @@ void i386_device::sse_pxor_r128_rm128() // Opcode 66 0f ef
void i386_device::sse_pmaddwd_r128_rm128() // Opcode 66 0f f5
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 4;n++)
- XMM((modrm >> 3) & 0x7).i[n]=(INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)XMM(modrm & 7).s[n]+
- (INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)XMM(modrm & 7).s[n];
+ XMM((modrm >> 3) & 0x7).i[n]=(int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)XMM(modrm & 7).s[n]+
+ (int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)XMM(modrm & 7).s[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 4;n++)
- XMM((modrm >> 3) & 0x7).i[n]=(INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)s.s[n]+
- (INT32)XMM((modrm >> 3) & 0x7).s[n]*(INT32)s.s[n];
+ XMM((modrm >> 3) & 0x7).i[n]=(int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)s.s[n]+
+ (int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)s.s[n];
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_psubb_r128_rm128() // Opcode 66 0f f8
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] - XMM(modrm & 7).b[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] - s.b[n];
@@ -5705,13 +5705,13 @@ void i386_device::sse_psubb_r128_rm128() // Opcode 66 0f f8
void i386_device::sse_psubw_r128_rm128() // Opcode 66 0f f9
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] - XMM(modrm & 7).w[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] - s.w[n];
@@ -5721,13 +5721,13 @@ void i386_device::sse_psubw_r128_rm128() // Opcode 66 0f f9
void i386_device::sse_psubd_r128_rm128() // Opcode 66 0f fa
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 4;n++)
XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] - XMM(modrm & 7).d[n];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 4;n++)
XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] - s.d[n];
@@ -5737,75 +5737,75 @@ void i386_device::sse_psubd_r128_rm128() // Opcode 66 0f fa
void i386_device::sse_psadbw_r128_rm128() // Opcode 66 0f f6
{
- INT32 temp;
- UINT8 modrm = FETCH();
+ int32_t temp;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
temp=0;
for (int n=0;n < 8;n++)
- temp += abs((INT32)XMM((modrm >> 3) & 0x7).b[n] - (INT32)XMM(modrm & 0x7).b[n]);
- XMM((modrm >> 3) & 0x7).l[0]=(UINT64)temp & 0xffff;
+ temp += abs((int32_t)XMM((modrm >> 3) & 0x7).b[n] - (int32_t)XMM(modrm & 0x7).b[n]);
+ XMM((modrm >> 3) & 0x7).l[0]=(uint64_t)temp & 0xffff;
temp=0;
for (int n=8;n < 16;n++)
- temp += abs((INT32)XMM((modrm >> 3) & 0x7).b[n] - (INT32)XMM(modrm & 0x7).b[n]);
- XMM((modrm >> 3) & 0x7).l[1]=(UINT64)temp & 0xffff;
+ temp += abs((int32_t)XMM((modrm >> 3) & 0x7).b[n] - (int32_t)XMM(modrm & 0x7).b[n]);
+ XMM((modrm >> 3) & 0x7).l[1]=(uint64_t)temp & 0xffff;
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
temp=0;
for (int n=0;n < 8;n++)
- temp += abs((INT32)XMM((modrm >> 3) & 0x7).b[n] - (INT32)s.b[n]);
- XMM((modrm >> 3) & 0x7).l[0]=(UINT64)temp & 0xffff;
+ temp += abs((int32_t)XMM((modrm >> 3) & 0x7).b[n] - (int32_t)s.b[n]);
+ XMM((modrm >> 3) & 0x7).l[0]=(uint64_t)temp & 0xffff;
temp=0;
for (int n=8;n < 16;n++)
- temp += abs((INT32)XMM((modrm >> 3) & 0x7).b[n] - (INT32)s.b[n]);
- XMM((modrm >> 3) & 0x7).l[1]=(UINT64)temp & 0xffff;
+ temp += abs((int32_t)XMM((modrm >> 3) & 0x7).b[n] - (int32_t)s.b[n]);
+ XMM((modrm >> 3) & 0x7).l[1]=(uint64_t)temp & 0xffff;
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_pavgb_r128_rm128() // Opcode 66 0f e0
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
- XMM((modrm >> 3) & 0x7).b[n] = ((UINT16)XMM((modrm >> 3) & 0x7).b[n] + (UINT16)XMM(modrm & 0x7).b[n] + 1) >> 1;
+ XMM((modrm >> 3) & 0x7).b[n] = ((uint16_t)XMM((modrm >> 3) & 0x7).b[n] + (uint16_t)XMM(modrm & 0x7).b[n] + 1) >> 1;
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 16;n++)
- XMM((modrm >> 3) & 0x7).b[n] = ((UINT16)XMM((modrm >> 3) & 0x7).b[n] + (UINT16)s.b[n] + 1) >> 1;
+ XMM((modrm >> 3) & 0x7).b[n] = ((uint16_t)XMM((modrm >> 3) & 0x7).b[n] + (uint16_t)s.b[n] + 1) >> 1;
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_pavgw_r128_rm128() // Opcode 66 0f e3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).w[n] = ((UINT32)XMM((modrm >> 3) & 0x7).w[n] + (UINT32)XMM(modrm & 0x7).w[n] + 1) >> 1;
+ XMM((modrm >> 3) & 0x7).w[n] = ((uint32_t)XMM((modrm >> 3) & 0x7).w[n] + (uint32_t)XMM(modrm & 0x7).w[n] + 1) >> 1;
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 8;n++)
- XMM((modrm >> 3) & 0x7).w[n] = ((UINT32)XMM((modrm >> 3) & 0x7).w[n] + (UINT32)s.w[n] + 1) >> 1;
+ XMM((modrm >> 3) & 0x7).w[n] = ((uint32_t)XMM((modrm >> 3) & 0x7).w[n] + (uint32_t)s.w[n] + 1) >> 1;
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_psrlw_r128_rm128() // Opcode 66 0f d1
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
for (int n=0; n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] >> count;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
int count=(int)src.q[0];
for (int n=0; n < 8;n++)
@@ -5816,7 +5816,7 @@ void i386_device::sse_psrlw_r128_rm128() // Opcode 66 0f d1
void i386_device::sse_psrld_r128_rm128() // Opcode 66 0f d2
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] >> count;
@@ -5825,7 +5825,7 @@ void i386_device::sse_psrld_r128_rm128() // Opcode 66 0f d2
XMM((modrm >> 3) & 0x7).d[3]=XMM((modrm >> 3) & 0x7).d[3] >> count;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
int count=(int)src.q[0];
XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] >> count;
@@ -5838,14 +5838,14 @@ void i386_device::sse_psrld_r128_rm128() // Opcode 66 0f d2
void i386_device::sse_psrlq_r128_rm128() // Opcode 66 0f d3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] >> count;
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] >> count;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
int count=(int)src.q[0];
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] >> count;
@@ -5856,14 +5856,14 @@ void i386_device::sse_psrlq_r128_rm128() // Opcode 66 0f d3
void i386_device::sse_psllw_r128_rm128() // Opcode 66 0f f1
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
for (int n=0; n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] << count;
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
int count=(int)s.q[0];
for (int n=0; n < 8;n++)
@@ -5874,7 +5874,7 @@ void i386_device::sse_psllw_r128_rm128() // Opcode 66 0f f1
void i386_device::sse_pslld_r128_rm128() // Opcode 66 0f f2
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] << count;
@@ -5883,7 +5883,7 @@ void i386_device::sse_pslld_r128_rm128() // Opcode 66 0f f2
XMM((modrm >> 3) & 0x7).d[3]=XMM((modrm >> 3) & 0x7).d[3] << count;
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
int count=(int)s.q[0];
XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] << count;
@@ -5896,14 +5896,14 @@ void i386_device::sse_pslld_r128_rm128() // Opcode 66 0f f2
void i386_device::sse_psllq_r128_rm128() // Opcode 66 0f f3
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] << count;
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] << count;
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
int count=(int)s.q[0];
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] << count;
@@ -5914,14 +5914,14 @@ void i386_device::sse_psllq_r128_rm128() // Opcode 66 0f f3
void i386_device::sse_psraw_r128_rm128() // Opcode 66 0f e1
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
for (int n=0; n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n]=XMM((modrm >> 3) & 0x7).s[n] >> count;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
int count=(int)src.q[0];
for (int n=0; n < 8;n++)
@@ -5932,7 +5932,7 @@ void i386_device::sse_psraw_r128_rm128() // Opcode 66 0f e1
void i386_device::sse_psrad_r128_rm128() // Opcode 66 0f e2
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).i[0]=XMM((modrm >> 3) & 0x7).i[0] >> count;
@@ -5941,7 +5941,7 @@ void i386_device::sse_psrad_r128_rm128() // Opcode 66 0f e2
XMM((modrm >> 3) & 0x7).i[3]=XMM((modrm >> 3) & 0x7).i[3] >> count;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
int count=(int)src.q[0];
XMM((modrm >> 3) & 0x7).i[0]=XMM((modrm >> 3) & 0x7).i[0] >> count;
@@ -5954,12 +5954,12 @@ void i386_device::sse_psrad_r128_rm128() // Opcode 66 0f e2
void i386_device::sse_movntdq_m128_r128() // Opcode 66 0f e7
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
CYCLES(1); // unsupported
} else {
// since cache is not implemented
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -5967,17 +5967,17 @@ void i386_device::sse_movntdq_m128_r128() // Opcode 66 0f e7
void i386_device::sse_cvttpd2dq_r128_rm128() // Opcode 66 0f e6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- XMM((modrm >> 3) & 0x7).i[0]=(INT32)XMM((modrm >> 3) & 0x7).f64[0];
- XMM((modrm >> 3) & 0x7).i[1]=(INT32)XMM((modrm >> 3) & 0x7).f64[1];
+ XMM((modrm >> 3) & 0x7).i[0]=(int32_t)XMM((modrm >> 3) & 0x7).f64[0];
+ XMM((modrm >> 3) & 0x7).i[1]=(int32_t)XMM((modrm >> 3) & 0x7).f64[1];
XMM((modrm >> 3) & 0x7).q[1] = 0;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
- XMM((modrm >> 3) & 0x7).i[0]=(INT32)src.f64[0];
- XMM((modrm >> 3) & 0x7).i[1]=(INT32)src.f64[1];
+ XMM((modrm >> 3) & 0x7).i[0]=(int32_t)src.f64[0];
+ XMM((modrm >> 3) & 0x7).i[1]=(int32_t)src.f64[1];
XMM((modrm >> 3) & 0x7).q[1] = 0;
}
CYCLES(1); // TODO: correct cycle count
@@ -5985,12 +5985,12 @@ void i386_device::sse_cvttpd2dq_r128_rm128() // Opcode 66 0f e6
void i386_device::sse_movq_r128m64_r128() // Opcode 66 0f d6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0];
XMM(modrm & 0x7).q[1] = 0;
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITE64(ea, XMM((modrm >> 3) & 0x7).q[0]);
}
CYCLES(1); // TODO: correct cycle count
@@ -5998,7 +5998,7 @@ void i386_device::sse_movq_r128m64_r128() // Opcode 66 0f d6
void i386_device::sse_addsubpd_r128_rm128() // Opcode 66 0f d0
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s, d;
s=modrm & 0x7;
@@ -6008,7 +6008,7 @@ void i386_device::sse_addsubpd_r128_rm128() // Opcode 66 0f d0
} else {
XMM_REG src;
int d;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
d=(modrm >> 3) & 0x7;
READXMM(ea, src);
XMM(d).f64[0]=XMM(d).f64[0]-src.f64[0];
@@ -6019,7 +6019,7 @@ void i386_device::sse_addsubpd_r128_rm128() // Opcode 66 0f d0
void i386_device::sse_haddpd_r128_rm128() // Opcode 66 0f 7c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s, d;
s=modrm & 0x7;
@@ -6029,7 +6029,7 @@ void i386_device::sse_haddpd_r128_rm128() // Opcode 66 0f 7c
} else {
XMM_REG src;
int d;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
d=(modrm >> 3) & 0x7;
READXMM(ea, src);
XMM(d).f64[0]=XMM(d).f64[0]+XMM(d).f64[1];
@@ -6040,7 +6040,7 @@ void i386_device::sse_haddpd_r128_rm128() // Opcode 66 0f 7c
void i386_device::sse_hsubpd_r128_rm128() // Opcode 66 0f 7d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s, d;
s=modrm & 0x7;
@@ -6050,7 +6050,7 @@ void i386_device::sse_hsubpd_r128_rm128() // Opcode 66 0f 7d
} else {
XMM_REG src;
int d;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
d=(modrm >> 3) & 0x7;
READXMM(ea, src);
XMM(d).f64[0]=XMM(d).f64[0]-XMM(d).f64[1];
@@ -6061,7 +6061,7 @@ void i386_device::sse_hsubpd_r128_rm128() // Opcode 66 0f 7d
void i386_device::sse_sqrtpd_r128_rm128() // Opcode 66 0f 51
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s, d;
s=modrm & 0x7;
@@ -6071,7 +6071,7 @@ void i386_device::sse_sqrtpd_r128_rm128() // Opcode 66 0f 51
} else {
XMM_REG src;
int d;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
d=(modrm >> 3) & 0x7;
READXMM(ea, src);
XMM(d).f64[0]=sqrt(src.f64[0]);
@@ -6082,14 +6082,14 @@ void i386_device::sse_sqrtpd_r128_rm128() // Opcode 66 0f 51
void i386_device::sse_cvtpi2pd_r128_rm64() // Opcode 66 0f 2a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMXPROLOG();
XMM((modrm >> 3) & 0x7).f64[0] = (double)MMX(modrm & 0x7).i[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)MMX(modrm & 0x7).i[1];
} else {
MMX_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READMMX(ea, r);
XMM((modrm >> 3) & 0x7).f64[0] = (double)r.i[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)r.i[1];
@@ -6099,14 +6099,14 @@ void i386_device::sse_cvtpi2pd_r128_rm64() // Opcode 66 0f 2a
void i386_device::sse_cvttpd2pi_r64_rm128() // Opcode 66 0f 2c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
MMXPROLOG();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f64[0];
MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f64[1];
} else {
XMM_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, r);
MMX((modrm >> 3) & 0x7).i[0] = r.f64[0];
MMX((modrm >> 3) & 0x7).i[1] = r.f64[1];
@@ -6116,14 +6116,14 @@ void i386_device::sse_cvttpd2pi_r64_rm128() // Opcode 66 0f 2c
void i386_device::sse_cvtpd2pi_r64_rm128() // Opcode 66 0f 2d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
MMXPROLOG();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f64[0];
MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f64[1];
} else {
XMM_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, r);
MMX((modrm >> 3) & 0x7).i[0] = r.f64[0];
MMX((modrm >> 3) & 0x7).i[1] = r.f64[1];
@@ -6133,14 +6133,14 @@ void i386_device::sse_cvtpd2pi_r64_rm128() // Opcode 66 0f 2d
void i386_device::sse_cvtpd2ps_r128_rm128() // Opcode 66 0f 5a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = (float)XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)XMM(modrm & 0x7).f64[1];
XMM((modrm >> 3) & 0x7).q[1] = 0;
} else {
XMM_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, r);
XMM((modrm >> 3) & 0x7).f[0] = (float)r.f64[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)r.f64[1];
@@ -6151,7 +6151,7 @@ void i386_device::sse_cvtpd2ps_r128_rm128() // Opcode 66 0f 5a
void i386_device::sse_cvtps2dq_r128_rm128() // Opcode 66 0f 5b
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f[1];
@@ -6159,7 +6159,7 @@ void i386_device::sse_cvtps2dq_r128_rm128() // Opcode 66 0f 5b
XMM((modrm >> 3) & 0x7).i[3] = XMM(modrm & 0x7).f[3];
} else {
XMM_REG r;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, r);
XMM((modrm >> 3) & 0x7).i[0] = r.f[0];
XMM((modrm >> 3) & 0x7).i[1] = r.f[1];
@@ -6171,13 +6171,13 @@ void i386_device::sse_cvtps2dq_r128_rm128() // Opcode 66 0f 5b
void i386_device::sse_addpd_r128_rm128() // Opcode 66 0f 58
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] + XMM(modrm & 0x7).f64[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + src.f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] + src.f64[1];
@@ -6187,13 +6187,13 @@ void i386_device::sse_addpd_r128_rm128() // Opcode 66 0f 58
void i386_device::sse_mulpd_r128_rm128() // Opcode 66 0f 59
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] * XMM(modrm & 0x7).f64[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * src.f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] * src.f64[1];
@@ -6203,13 +6203,13 @@ void i386_device::sse_mulpd_r128_rm128() // Opcode 66 0f 59
void i386_device::sse_subpd_r128_rm128() // Opcode 66 0f 5c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] - XMM(modrm & 0x7).f64[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - src.f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] - src.f64[1];
@@ -6219,13 +6219,13 @@ void i386_device::sse_subpd_r128_rm128() // Opcode 66 0f 5c
void i386_device::sse_minpd_r128_rm128() // Opcode 66 0f 5d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
XMM((modrm >> 3) & 0x7).f64[1] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[1], XMM(modrm & 0x7).f64[1]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], src.f64[0]);
XMM((modrm >> 3) & 0x7).f64[1] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[1], src.f64[1]);
@@ -6235,13 +6235,13 @@ void i386_device::sse_minpd_r128_rm128() // Opcode 66 0f 5d
void i386_device::sse_divpd_r128_rm128() // Opcode 66 0f 5e
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] / XMM(modrm & 0x7).f64[1];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / src.f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] / src.f64[1];
@@ -6251,13 +6251,13 @@ void i386_device::sse_divpd_r128_rm128() // Opcode 66 0f 5e
void i386_device::sse_maxpd_r128_rm128() // Opcode 66 0f 5f
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
XMM((modrm >> 3) & 0x7).f64[1] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[1], XMM(modrm & 0x7).f64[1]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], src.f64[0]);
XMM((modrm >> 3) & 0x7).f64[1] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[1], src.f64[1]);
@@ -6267,13 +6267,13 @@ void i386_device::sse_maxpd_r128_rm128() // Opcode 66 0f 5f
void i386_device::sse_movntpd_m128_r128() // Opcode 66 0f 2b
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// since cache is not implemented
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
}
@@ -6281,11 +6281,11 @@ void i386_device::sse_movntpd_m128_r128() // Opcode 66 0f 2b
void i386_device::sse_movapd_r128_rm128() // Opcode 66 0f 28
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -6293,11 +6293,11 @@ void i386_device::sse_movapd_r128_rm128() // Opcode 66 0f 28
void i386_device::sse_movapd_rm128_r128() // Opcode 66 0f 29
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -6305,11 +6305,11 @@ void i386_device::sse_movapd_rm128_r128() // Opcode 66 0f 29
void i386_device::sse_movsd_r128_r128m64() // Opcode f2 0f 10
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
XMM((modrm >> 3) & 0x7).q[1] = 0;
}
@@ -6318,11 +6318,11 @@ void i386_device::sse_movsd_r128_r128m64() // Opcode f2 0f 10
void i386_device::sse_movsd_r128m64_r128() // Opcode f2 0f 11
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0];
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
WRITEXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
}
CYCLES(1); // TODO: correct cycle count
@@ -6330,12 +6330,12 @@ void i386_device::sse_movsd_r128m64_r128() // Opcode f2 0f 11
void i386_device::sse_movddup_r128_r128m64() // Opcode f2 0f 12
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[0];
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_LO64(ea, XMM((modrm >> 3) & 0x7));
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[0];
}
@@ -6344,51 +6344,51 @@ void i386_device::sse_movddup_r128_r128m64() // Opcode f2 0f 12
void i386_device::sse_cvtsi2sd_r128_rm32() // Opcode f2 0f 2a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- XMM((modrm >> 3) & 0x7).f64[0] = (INT32)LOAD_RM32(modrm);
+ XMM((modrm >> 3) & 0x7).f64[0] = (int32_t)LOAD_RM32(modrm);
} else {
- UINT32 ea = GetEA(modrm, 0);
- XMM((modrm >> 3) & 0x7).f64[0] = (INT32)READ32(ea);
+ uint32_t ea = GetEA(modrm, 0);
+ XMM((modrm >> 3) & 0x7).f64[0] = (int32_t)READ32(ea);
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_cvttsd2si_r32_r128m64() // Opcode f2 0f 2c
{
- INT32 src;
- UINT8 modrm = FETCH();
+ int32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- src = (INT32)XMM(modrm & 0x7).f64[0];
+ src = (int32_t)XMM(modrm & 0x7).f64[0];
} else { // otherwise is a memory address
XMM_REG t;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_LO64(ea, t);
- src = (INT32)t.f64[0];
+ src = (int32_t)t.f64[0];
}
- STORE_REG32(modrm, (UINT32)src);
+ STORE_REG32(modrm, (uint32_t)src);
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_cvtsd2si_r32_r128m64() // Opcode f2 0f 2d
{
- INT32 src;
- UINT8 modrm = FETCH();
+ int32_t src;
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- src = (INT32)XMM(modrm & 0x7).f64[0];
+ src = (int32_t)XMM(modrm & 0x7).f64[0];
} else { // otherwise is a memory address
XMM_REG t;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_LO64(ea, t);
- src = (INT32)t.f64[0];
+ src = (int32_t)t.f64[0];
}
- STORE_REG32(modrm, (UINT32)src);
+ STORE_REG32(modrm, (uint32_t)src);
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_sqrtsd_r128_r128m64() // Opcode f2 0f 51
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s, d;
s=modrm & 0x7;
@@ -6397,7 +6397,7 @@ void i386_device::sse_sqrtsd_r128_r128m64() // Opcode f2 0f 51
} else {
XMM_REG src;
int d;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
d=(modrm >> 3) & 0x7;
READXMM(ea, src);
XMM(d).f64[0]=sqrt(src.f64[0]);
@@ -6407,12 +6407,12 @@ void i386_device::sse_sqrtsd_r128_r128m64() // Opcode f2 0f 51
void i386_device::sse_addsd_r128_r128m64() // Opcode f2 0f 58
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + XMM(modrm & 0x7).f64[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + src.f64[0];
}
@@ -6421,12 +6421,12 @@ void i386_device::sse_addsd_r128_r128m64() // Opcode f2 0f 58
void i386_device::sse_mulsd_r128_r128m64() // Opcode f2 0f 59
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * XMM(modrm & 0x7).f64[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * src.f64[0];
}
@@ -6435,12 +6435,12 @@ void i386_device::sse_mulsd_r128_r128m64() // Opcode f2 0f 59
void i386_device::sse_cvtsd2ss_r128_r128m64() // Opcode f2 0f 5a
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM(modrm & 0x7).f64[0];
} else {
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM_LO64(ea, s);
XMM((modrm >> 3) & 0x7).f[0] = s.f64[0];
}
@@ -6449,12 +6449,12 @@ void i386_device::sse_cvtsd2ss_r128_r128m64() // Opcode f2 0f 5a
void i386_device::sse_subsd_r128_r128m64() // Opcode f2 0f 5c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - XMM(modrm & 0x7).f64[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - src.f64[0];
}
@@ -6463,12 +6463,12 @@ void i386_device::sse_subsd_r128_r128m64() // Opcode f2 0f 5c
void i386_device::sse_minsd_r128_r128m64() // Opcode f2 0f 5d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], src.f64[0]);
}
@@ -6477,12 +6477,12 @@ void i386_device::sse_minsd_r128_r128m64() // Opcode f2 0f 5d
void i386_device::sse_divsd_r128_r128m64() // Opcode f2 0f 5e
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / XMM(modrm & 0x7).f64[0];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / src.f64[0];
}
@@ -6491,12 +6491,12 @@ void i386_device::sse_divsd_r128_r128m64() // Opcode f2 0f 5e
void i386_device::sse_maxsd_r128_r128m64() // Opcode f2 0f 5f
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], src.f64[0]);
}
@@ -6505,7 +6505,7 @@ void i386_device::sse_maxsd_r128_r128m64() // Opcode f2 0f 5f
void i386_device::sse_haddps_r128_rm128() // Opcode f2 0f 7c
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s, d;
float f1, f2, f3, f4;
@@ -6523,7 +6523,7 @@ void i386_device::sse_haddps_r128_rm128() // Opcode f2 0f 7c
XMM_REG src;
int d;
float f1, f2;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
d=(modrm >> 3) & 0x7;
READXMM(ea, src);
f1=XMM(d).f[0]+XMM(d).f[1];
@@ -6538,7 +6538,7 @@ void i386_device::sse_haddps_r128_rm128() // Opcode f2 0f 7c
void i386_device::sse_hsubps_r128_rm128() // Opcode f2 0f 7d
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s, d;
float f1, f2, f3, f4;
@@ -6556,7 +6556,7 @@ void i386_device::sse_hsubps_r128_rm128() // Opcode f2 0f 7d
XMM_REG src;
int d;
float f1, f2;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
d=(modrm >> 3) & 0x7;
READXMM(ea, src);
f1=XMM(d).f[0]-XMM(d).f[1];
@@ -6571,18 +6571,18 @@ void i386_device::sse_hsubps_r128_rm128() // Opcode f2 0f 7d
void i386_device::sse_cmpsd_r128_r128m64_i8() // Opcode f2 0f c2
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
- UINT8 imm8 = FETCH();
+ uint8_t imm8 = FETCH();
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
sse_predicate_compare_double_scalar(imm8, XMM(d), XMM(s));
} else {
int d;
XMM_REG s;
- UINT32 ea = GetEA(modrm, 0);
- UINT8 imm8 = FETCH();
+ uint32_t ea = GetEA(modrm, 0);
+ uint8_t imm8 = FETCH();
READXMM_LO64(ea, s);
d=(modrm >> 3) & 0x7;
sse_predicate_compare_double_scalar(imm8, XMM(d), s);
@@ -6592,7 +6592,7 @@ void i386_device::sse_cmpsd_r128_r128m64_i8() // Opcode f2 0f c2
void i386_device::sse_addsubps_r128_rm128() // Opcode f2 0f d0
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0]=XMM((modrm >> 3) & 0x7).f[0] - XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1]=XMM((modrm >> 3) & 0x7).f[1] + XMM(modrm & 0x7).f[1];
@@ -6600,7 +6600,7 @@ void i386_device::sse_addsubps_r128_rm128() // Opcode f2 0f d0
XMM((modrm >> 3) & 0x7).f[3]=XMM((modrm >> 3) & 0x7).f[3] + XMM(modrm & 0x7).f[3];
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
XMM((modrm >> 3) & 0x7).f[0]=XMM((modrm >> 3) & 0x7).f[0] - src.f[0];
XMM((modrm >> 3) & 0x7).f[1]=XMM((modrm >> 3) & 0x7).f[1] + src.f[1];
@@ -6612,7 +6612,7 @@ void i386_device::sse_addsubps_r128_rm128() // Opcode f2 0f d0
void i386_device::sse_movdq2q_r64_r128() // Opcode f2 0f d6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
MMXPROLOG();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q = XMM(modrm & 0x7).q[0];
@@ -6625,17 +6625,17 @@ void i386_device::sse_movdq2q_r64_r128() // Opcode f2 0f d6
void i386_device::sse_cvtpd2dq_r128_rm128() // Opcode f2 0f e6
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- XMM((modrm >> 3) & 0x7).i[0]=(INT32)XMM((modrm >> 3) & 0x7).f64[0];
- XMM((modrm >> 3) & 0x7).i[1]=(INT32)XMM((modrm >> 3) & 0x7).f64[1];
+ XMM((modrm >> 3) & 0x7).i[0]=(int32_t)XMM((modrm >> 3) & 0x7).f64[0];
+ XMM((modrm >> 3) & 0x7).i[1]=(int32_t)XMM((modrm >> 3) & 0x7).f64[1];
XMM((modrm >> 3) & 0x7).q[1] = 0;
} else {
XMM_REG src;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, src);
- XMM((modrm >> 3) & 0x7).i[0]=(INT32)src.f64[0];
- XMM((modrm >> 3) & 0x7).i[1]=(INT32)src.f64[1];
+ XMM((modrm >> 3) & 0x7).i[0]=(int32_t)src.f64[0];
+ XMM((modrm >> 3) & 0x7).i[1]=(int32_t)src.f64[1];
XMM((modrm >> 3) & 0x7).q[1] = 0;
}
CYCLES(1); // TODO: correct cycle count
@@ -6643,12 +6643,12 @@ void i386_device::sse_cvtpd2dq_r128_rm128() // Opcode f2 0f e6
void i386_device::sse_lddqu_r128_m128() // Opcode f2 0f f0
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
READXMM(ea, XMM((modrm >> 3) & 0x7));
}
}
diff --git a/src/devices/cpu/i386/x87ops.hxx b/src/devices/cpu/i386/x87ops.hxx
index 1cc44e7b92f..505890f113c 100644
--- a/src/devices/cpu/i386/x87ops.hxx
+++ b/src/devices/cpu/i386/x87ops.hxx
@@ -153,16 +153,16 @@ static inline floatx80 floatx80_abs(floatx80 fx)
static inline double fx80_to_double(floatx80 fx)
{
- UINT64 d = floatx80_to_float64(fx);
+ uint64_t d = floatx80_to_float64(fx);
return *(double*)&d;
}
static inline floatx80 double_to_fx80(double in)
{
- return float64_to_floatx80(*(UINT64*)&in);
+ return float64_to_floatx80(*(uint64_t*)&in);
}
-floatx80 i386_device::READ80(UINT32 ea)
+floatx80 i386_device::READ80(uint32_t ea)
{
floatx80 t;
@@ -172,7 +172,7 @@ floatx80 i386_device::READ80(UINT32 ea)
return t;
}
-void i386_device::WRITE80(UINT32 ea, floatx80 t)
+void i386_device::WRITE80(uint32_t ea, floatx80 t)
{
WRITE64(ea, t.low);
WRITE16(ea + 8, t.high);
@@ -320,7 +320,7 @@ int i386_device::x87_check_exceptions()
return 1;
}
-void i386_device::x87_write_cw(UINT16 cw)
+void i386_device::x87_write_cw(uint16_t cw)
{
m_x87_cw = cw;
@@ -481,11 +481,11 @@ floatx80 i386_device::x87_div(floatx80 a, floatx80 b)
*
*************************************/
-void i386_device::x87_fadd_m32real(UINT8 modrm)
+void i386_device::x87_fadd_m32real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -493,7 +493,7 @@ void i386_device::x87_fadd_m32real(UINT8 modrm)
}
else
{
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
floatx80 a = ST(0);
floatx80 b = float32_to_floatx80(m32real);
@@ -516,11 +516,11 @@ void i386_device::x87_fadd_m32real(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fadd_m64real(UINT8 modrm)
+void i386_device::x87_fadd_m64real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -528,7 +528,7 @@ void i386_device::x87_fadd_m64real(UINT8 modrm)
}
else
{
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
floatx80 a = ST(0);
floatx80 b = float64_to_floatx80(m64real);
@@ -551,7 +551,7 @@ void i386_device::x87_fadd_m64real(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fadd_st_sti(UINT8 modrm)
+void i386_device::x87_fadd_st_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -584,7 +584,7 @@ void i386_device::x87_fadd_st_sti(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fadd_sti_st(UINT8 modrm)
+void i386_device::x87_fadd_sti_st(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -617,7 +617,7 @@ void i386_device::x87_fadd_sti_st(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_faddp(UINT8 modrm)
+void i386_device::x87_faddp(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -653,11 +653,11 @@ void i386_device::x87_faddp(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fiadd_m32int(UINT8 modrm)
+void i386_device::x87_fiadd_m32int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -665,7 +665,7 @@ void i386_device::x87_fiadd_m32int(UINT8 modrm)
}
else
{
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m32int);
@@ -688,11 +688,11 @@ void i386_device::x87_fiadd_m32int(UINT8 modrm)
CYCLES(19);
}
-void i386_device::x87_fiadd_m16int(UINT8 modrm)
+void i386_device::x87_fiadd_m16int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -700,7 +700,7 @@ void i386_device::x87_fiadd_m16int(UINT8 modrm)
}
else
{
- INT16 m16int = READ16(ea);
+ int16_t m16int = READ16(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m16int);
@@ -730,11 +730,11 @@ void i386_device::x87_fiadd_m16int(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fsub_m32real(UINT8 modrm)
+void i386_device::x87_fsub_m32real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -742,7 +742,7 @@ void i386_device::x87_fsub_m32real(UINT8 modrm)
}
else
{
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
floatx80 a = ST(0);
floatx80 b = float32_to_floatx80(m32real);
@@ -765,11 +765,11 @@ void i386_device::x87_fsub_m32real(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fsub_m64real(UINT8 modrm)
+void i386_device::x87_fsub_m64real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -777,7 +777,7 @@ void i386_device::x87_fsub_m64real(UINT8 modrm)
}
else
{
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
floatx80 a = ST(0);
floatx80 b = float64_to_floatx80(m64real);
@@ -800,7 +800,7 @@ void i386_device::x87_fsub_m64real(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fsub_st_sti(UINT8 modrm)
+void i386_device::x87_fsub_st_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -833,7 +833,7 @@ void i386_device::x87_fsub_st_sti(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fsub_sti_st(UINT8 modrm)
+void i386_device::x87_fsub_sti_st(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -866,7 +866,7 @@ void i386_device::x87_fsub_sti_st(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fsubp(UINT8 modrm)
+void i386_device::x87_fsubp(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -902,11 +902,11 @@ void i386_device::x87_fsubp(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fisub_m32int(UINT8 modrm)
+void i386_device::x87_fisub_m32int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -914,7 +914,7 @@ void i386_device::x87_fisub_m32int(UINT8 modrm)
}
else
{
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m32int);
@@ -937,11 +937,11 @@ void i386_device::x87_fisub_m32int(UINT8 modrm)
CYCLES(19);
}
-void i386_device::x87_fisub_m16int(UINT8 modrm)
+void i386_device::x87_fisub_m16int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -949,7 +949,7 @@ void i386_device::x87_fisub_m16int(UINT8 modrm)
}
else
{
- INT16 m16int = READ16(ea);
+ int16_t m16int = READ16(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m16int);
@@ -979,11 +979,11 @@ void i386_device::x87_fisub_m16int(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fsubr_m32real(UINT8 modrm)
+void i386_device::x87_fsubr_m32real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -991,7 +991,7 @@ void i386_device::x87_fsubr_m32real(UINT8 modrm)
}
else
{
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
floatx80 a = float32_to_floatx80(m32real);
floatx80 b = ST(0);
@@ -1014,11 +1014,11 @@ void i386_device::x87_fsubr_m32real(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fsubr_m64real(UINT8 modrm)
+void i386_device::x87_fsubr_m64real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1026,7 +1026,7 @@ void i386_device::x87_fsubr_m64real(UINT8 modrm)
}
else
{
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
floatx80 a = float64_to_floatx80(m64real);
floatx80 b = ST(0);
@@ -1049,7 +1049,7 @@ void i386_device::x87_fsubr_m64real(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fsubr_st_sti(UINT8 modrm)
+void i386_device::x87_fsubr_st_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -1082,7 +1082,7 @@ void i386_device::x87_fsubr_st_sti(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fsubr_sti_st(UINT8 modrm)
+void i386_device::x87_fsubr_sti_st(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -1115,7 +1115,7 @@ void i386_device::x87_fsubr_sti_st(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fsubrp(UINT8 modrm)
+void i386_device::x87_fsubrp(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -1151,11 +1151,11 @@ void i386_device::x87_fsubrp(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fisubr_m32int(UINT8 modrm)
+void i386_device::x87_fisubr_m32int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1163,7 +1163,7 @@ void i386_device::x87_fisubr_m32int(UINT8 modrm)
}
else
{
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
floatx80 a = int32_to_floatx80(m32int);
floatx80 b = ST(0);
@@ -1186,11 +1186,11 @@ void i386_device::x87_fisubr_m32int(UINT8 modrm)
CYCLES(19);
}
-void i386_device::x87_fisubr_m16int(UINT8 modrm)
+void i386_device::x87_fisubr_m16int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1198,7 +1198,7 @@ void i386_device::x87_fisubr_m16int(UINT8 modrm)
}
else
{
- INT16 m16int = READ16(ea);
+ int16_t m16int = READ16(ea);
floatx80 a = int32_to_floatx80(m16int);
floatx80 b = ST(0);
@@ -1228,11 +1228,11 @@ void i386_device::x87_fisubr_m16int(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fdiv_m32real(UINT8 modrm)
+void i386_device::x87_fdiv_m32real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1240,7 +1240,7 @@ void i386_device::x87_fdiv_m32real(UINT8 modrm)
}
else
{
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
floatx80 a = ST(0);
floatx80 b = float32_to_floatx80(m32real);
@@ -1263,11 +1263,11 @@ void i386_device::x87_fdiv_m32real(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fdiv_m64real(UINT8 modrm)
+void i386_device::x87_fdiv_m64real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1275,7 +1275,7 @@ void i386_device::x87_fdiv_m64real(UINT8 modrm)
}
else
{
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
floatx80 a = ST(0);
floatx80 b = float64_to_floatx80(m64real);
@@ -1298,7 +1298,7 @@ void i386_device::x87_fdiv_m64real(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fdiv_st_sti(UINT8 modrm)
+void i386_device::x87_fdiv_st_sti(uint8_t modrm)
{
int i = modrm & 7;
floatx80 result;
@@ -1333,7 +1333,7 @@ void i386_device::x87_fdiv_st_sti(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fdiv_sti_st(UINT8 modrm)
+void i386_device::x87_fdiv_sti_st(uint8_t modrm)
{
int i = modrm & 7;
floatx80 result;
@@ -1368,7 +1368,7 @@ void i386_device::x87_fdiv_sti_st(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fdivp(UINT8 modrm)
+void i386_device::x87_fdivp(uint8_t modrm)
{
int i = modrm & 7;
floatx80 result;
@@ -1404,11 +1404,11 @@ void i386_device::x87_fdivp(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fidiv_m32int(UINT8 modrm)
+void i386_device::x87_fidiv_m32int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1416,7 +1416,7 @@ void i386_device::x87_fidiv_m32int(UINT8 modrm)
}
else
{
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m32int);
@@ -1439,11 +1439,11 @@ void i386_device::x87_fidiv_m32int(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fidiv_m16int(UINT8 modrm)
+void i386_device::x87_fidiv_m16int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1451,7 +1451,7 @@ void i386_device::x87_fidiv_m16int(UINT8 modrm)
}
else
{
- INT16 m16int = READ32(ea);
+ int16_t m16int = READ32(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m16int);
@@ -1481,11 +1481,11 @@ void i386_device::x87_fidiv_m16int(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fdivr_m32real(UINT8 modrm)
+void i386_device::x87_fdivr_m32real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1493,7 +1493,7 @@ void i386_device::x87_fdivr_m32real(UINT8 modrm)
}
else
{
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
floatx80 a = float32_to_floatx80(m32real);
floatx80 b = ST(0);
@@ -1516,11 +1516,11 @@ void i386_device::x87_fdivr_m32real(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fdivr_m64real(UINT8 modrm)
+void i386_device::x87_fdivr_m64real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1528,7 +1528,7 @@ void i386_device::x87_fdivr_m64real(UINT8 modrm)
}
else
{
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
floatx80 a = float64_to_floatx80(m64real);
floatx80 b = ST(0);
@@ -1551,7 +1551,7 @@ void i386_device::x87_fdivr_m64real(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fdivr_st_sti(UINT8 modrm)
+void i386_device::x87_fdivr_st_sti(uint8_t modrm)
{
int i = modrm & 7;
floatx80 result;
@@ -1586,7 +1586,7 @@ void i386_device::x87_fdivr_st_sti(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fdivr_sti_st(UINT8 modrm)
+void i386_device::x87_fdivr_sti_st(uint8_t modrm)
{
int i = modrm & 7;
floatx80 result;
@@ -1621,7 +1621,7 @@ void i386_device::x87_fdivr_sti_st(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fdivrp(UINT8 modrm)
+void i386_device::x87_fdivrp(uint8_t modrm)
{
int i = modrm & 7;
floatx80 result;
@@ -1658,11 +1658,11 @@ void i386_device::x87_fdivrp(UINT8 modrm)
}
-void i386_device::x87_fidivr_m32int(UINT8 modrm)
+void i386_device::x87_fidivr_m32int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1670,7 +1670,7 @@ void i386_device::x87_fidivr_m32int(UINT8 modrm)
}
else
{
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
floatx80 a = int32_to_floatx80(m32int);
floatx80 b = ST(0);
@@ -1693,11 +1693,11 @@ void i386_device::x87_fidivr_m32int(UINT8 modrm)
CYCLES(73);
}
-void i386_device::x87_fidivr_m16int(UINT8 modrm)
+void i386_device::x87_fidivr_m16int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1705,7 +1705,7 @@ void i386_device::x87_fidivr_m16int(UINT8 modrm)
}
else
{
- INT16 m16int = READ32(ea);
+ int16_t m16int = READ32(ea);
floatx80 a = int32_to_floatx80(m16int);
floatx80 b = ST(0);
@@ -1735,11 +1735,11 @@ void i386_device::x87_fidivr_m16int(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fmul_m32real(UINT8 modrm)
+void i386_device::x87_fmul_m32real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1747,7 +1747,7 @@ void i386_device::x87_fmul_m32real(UINT8 modrm)
}
else
{
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
floatx80 a = ST(0);
floatx80 b = float32_to_floatx80(m32real);
@@ -1769,11 +1769,11 @@ void i386_device::x87_fmul_m32real(UINT8 modrm)
CYCLES(11);
}
-void i386_device::x87_fmul_m64real(UINT8 modrm)
+void i386_device::x87_fmul_m64real(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1781,7 +1781,7 @@ void i386_device::x87_fmul_m64real(UINT8 modrm)
}
else
{
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
floatx80 a = ST(0);
floatx80 b = float64_to_floatx80(m64real);
@@ -1803,7 +1803,7 @@ void i386_device::x87_fmul_m64real(UINT8 modrm)
CYCLES(14);
}
-void i386_device::x87_fmul_st_sti(UINT8 modrm)
+void i386_device::x87_fmul_st_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -1835,7 +1835,7 @@ void i386_device::x87_fmul_st_sti(UINT8 modrm)
CYCLES(16);
}
-void i386_device::x87_fmul_sti_st(UINT8 modrm)
+void i386_device::x87_fmul_sti_st(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -1867,7 +1867,7 @@ void i386_device::x87_fmul_sti_st(UINT8 modrm)
CYCLES(16);
}
-void i386_device::x87_fmulp(UINT8 modrm)
+void i386_device::x87_fmulp(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -1902,11 +1902,11 @@ void i386_device::x87_fmulp(UINT8 modrm)
CYCLES(16);
}
-void i386_device::x87_fimul_m32int(UINT8 modrm)
+void i386_device::x87_fimul_m32int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1914,7 +1914,7 @@ void i386_device::x87_fimul_m32int(UINT8 modrm)
}
else
{
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m32int);
@@ -1936,11 +1936,11 @@ void i386_device::x87_fimul_m32int(UINT8 modrm)
CYCLES(22);
}
-void i386_device::x87_fimul_m16int(UINT8 modrm)
+void i386_device::x87_fimul_m16int(uint8_t modrm)
{
floatx80 result;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -1948,7 +1948,7 @@ void i386_device::x87_fimul_m16int(UINT8 modrm)
}
else
{
- INT16 m16int = READ16(ea);
+ int16_t m16int = READ16(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m16int);
@@ -1976,7 +1976,7 @@ void i386_device::x87_fimul_m16int(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fcmovb_sti(UINT8 modrm)
+void i386_device::x87_fcmovb_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -2000,7 +2000,7 @@ void i386_device::x87_fcmovb_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcmove_sti(UINT8 modrm)
+void i386_device::x87_fcmove_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -2024,7 +2024,7 @@ void i386_device::x87_fcmove_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcmovbe_sti(UINT8 modrm)
+void i386_device::x87_fcmovbe_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -2048,7 +2048,7 @@ void i386_device::x87_fcmovbe_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcmovu_sti(UINT8 modrm)
+void i386_device::x87_fcmovu_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -2072,7 +2072,7 @@ void i386_device::x87_fcmovu_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcmovnb_sti(UINT8 modrm)
+void i386_device::x87_fcmovnb_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -2096,7 +2096,7 @@ void i386_device::x87_fcmovnb_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcmovne_sti(UINT8 modrm)
+void i386_device::x87_fcmovne_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -2120,7 +2120,7 @@ void i386_device::x87_fcmovne_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcmovnbe_sti(UINT8 modrm)
+void i386_device::x87_fcmovnbe_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -2144,7 +2144,7 @@ void i386_device::x87_fcmovnbe_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcmovnu_sti(UINT8 modrm)
+void i386_device::x87_fcmovnu_sti(uint8_t modrm)
{
floatx80 result;
int i = modrm & 7;
@@ -2174,7 +2174,7 @@ void i386_device::x87_fcmovnu_sti(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fprem(UINT8 modrm)
+void i386_device::x87_fprem(uint8_t modrm)
{
floatx80 result;
@@ -2228,7 +2228,7 @@ void i386_device::x87_fprem(UINT8 modrm)
CYCLES(84);
}
-void i386_device::x87_fprem1(UINT8 modrm)
+void i386_device::x87_fprem1(uint8_t modrm)
{
floatx80 result;
@@ -2254,7 +2254,7 @@ void i386_device::x87_fprem1(UINT8 modrm)
CYCLES(94);
}
-void i386_device::x87_fsqrt(UINT8 modrm)
+void i386_device::x87_fsqrt(uint8_t modrm)
{
floatx80 result;
@@ -2291,7 +2291,7 @@ void i386_device::x87_fsqrt(UINT8 modrm)
*
*************************************/
-void i386_device::x87_f2xm1(UINT8 modrm)
+void i386_device::x87_f2xm1(uint8_t modrm)
{
floatx80 result;
@@ -2316,7 +2316,7 @@ void i386_device::x87_f2xm1(UINT8 modrm)
CYCLES(242);
}
-void i386_device::x87_fyl2x(UINT8 modrm)
+void i386_device::x87_fyl2x(uint8_t modrm)
{
floatx80 result;
@@ -2353,7 +2353,7 @@ void i386_device::x87_fyl2x(UINT8 modrm)
CYCLES(250);
}
-void i386_device::x87_fyl2xp1(UINT8 modrm)
+void i386_device::x87_fyl2xp1(uint8_t modrm)
{
floatx80 result;
@@ -2382,7 +2382,7 @@ void i386_device::x87_fyl2xp1(UINT8 modrm)
CYCLES(313);
}
-void i386_device::x87_fptan(UINT8 modrm)
+void i386_device::x87_fptan(uint8_t modrm)
{
floatx80 result1, result2;
@@ -2427,7 +2427,7 @@ void i386_device::x87_fptan(UINT8 modrm)
CYCLES(244);
}
-void i386_device::x87_fpatan(UINT8 modrm)
+void i386_device::x87_fpatan(uint8_t modrm)
{
floatx80 result;
@@ -2452,7 +2452,7 @@ void i386_device::x87_fpatan(UINT8 modrm)
CYCLES(289);
}
-void i386_device::x87_fsin(UINT8 modrm)
+void i386_device::x87_fsin(uint8_t modrm)
{
floatx80 result;
@@ -2485,7 +2485,7 @@ void i386_device::x87_fsin(UINT8 modrm)
CYCLES(241);
}
-void i386_device::x87_fcos(UINT8 modrm)
+void i386_device::x87_fcos(uint8_t modrm)
{
floatx80 result;
@@ -2518,7 +2518,7 @@ void i386_device::x87_fcos(UINT8 modrm)
CYCLES(241);
}
-void i386_device::x87_fsincos(UINT8 modrm)
+void i386_device::x87_fsincos(uint8_t modrm)
{
floatx80 s_result, c_result;
@@ -2573,14 +2573,14 @@ void i386_device::x87_fsincos(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fld_m32real(UINT8 modrm)
+void i386_device::x87_fld_m32real(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (x87_dec_stack())
{
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
value = float32_to_floatx80(m32real);
@@ -2603,14 +2603,14 @@ void i386_device::x87_fld_m32real(UINT8 modrm)
CYCLES(3);
}
-void i386_device::x87_fld_m64real(UINT8 modrm)
+void i386_device::x87_fld_m64real(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (x87_dec_stack())
{
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
value = float64_to_floatx80(m64real);
@@ -2633,11 +2633,11 @@ void i386_device::x87_fld_m64real(UINT8 modrm)
CYCLES(3);
}
-void i386_device::x87_fld_m80real(UINT8 modrm)
+void i386_device::x87_fld_m80real(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (x87_dec_stack())
{
m_x87_sw &= ~X87_SW_C1;
@@ -2654,7 +2654,7 @@ void i386_device::x87_fld_m80real(UINT8 modrm)
CYCLES(6);
}
-void i386_device::x87_fld_sti(UINT8 modrm)
+void i386_device::x87_fld_sti(uint8_t modrm)
{
floatx80 value;
@@ -2674,11 +2674,11 @@ void i386_device::x87_fld_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fild_m16int(UINT8 modrm)
+void i386_device::x87_fild_m16int(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (!x87_dec_stack())
{
value = fx80_inan;
@@ -2687,7 +2687,7 @@ void i386_device::x87_fild_m16int(UINT8 modrm)
{
m_x87_sw &= ~X87_SW_C1;
- INT16 m16int = READ16(ea);
+ int16_t m16int = READ16(ea);
value = int32_to_floatx80(m16int);
}
@@ -2697,11 +2697,11 @@ void i386_device::x87_fild_m16int(UINT8 modrm)
CYCLES(13);
}
-void i386_device::x87_fild_m32int(UINT8 modrm)
+void i386_device::x87_fild_m32int(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (!x87_dec_stack())
{
value = fx80_inan;
@@ -2710,7 +2710,7 @@ void i386_device::x87_fild_m32int(UINT8 modrm)
{
m_x87_sw &= ~X87_SW_C1;
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
value = int32_to_floatx80(m32int);
}
@@ -2720,11 +2720,11 @@ void i386_device::x87_fild_m32int(UINT8 modrm)
CYCLES(9);
}
-void i386_device::x87_fild_m64int(UINT8 modrm)
+void i386_device::x87_fild_m64int(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (!x87_dec_stack())
{
value = fx80_inan;
@@ -2733,7 +2733,7 @@ void i386_device::x87_fild_m64int(UINT8 modrm)
{
m_x87_sw &= ~X87_SW_C1;
- INT64 m64int = READ64(ea);
+ int64_t m64int = READ64(ea);
value = int64_to_floatx80(m64int);
}
@@ -2743,11 +2743,11 @@ void i386_device::x87_fild_m64int(UINT8 modrm)
CYCLES(10);
}
-void i386_device::x87_fbld(UINT8 modrm)
+void i386_device::x87_fbld(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (!x87_dec_stack())
{
value = fx80_inan;
@@ -2756,8 +2756,8 @@ void i386_device::x87_fbld(UINT8 modrm)
{
m_x87_sw &= ~X87_SW_C1;
- UINT64 m64val = 0;
- UINT16 sign;
+ uint64_t m64val = 0;
+ uint16_t sign;
value = READ80(ea);
@@ -2788,11 +2788,11 @@ void i386_device::x87_fbld(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fst_m32real(UINT8 modrm)
+void i386_device::x87_fst_m32real(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -2806,18 +2806,18 @@ void i386_device::x87_fst_m32real(UINT8 modrm)
if (x87_check_exceptions())
{
- UINT32 m32real = floatx80_to_float32(value);
+ uint32_t m32real = floatx80_to_float32(value);
WRITE32(ea, m32real);
}
CYCLES(7);
}
-void i386_device::x87_fst_m64real(UINT8 modrm)
+void i386_device::x87_fst_m64real(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -2831,14 +2831,14 @@ void i386_device::x87_fst_m64real(UINT8 modrm)
if (x87_check_exceptions())
{
- UINT64 m64real = floatx80_to_float64(value);
+ uint64_t m64real = floatx80_to_float64(value);
WRITE64(ea, m64real);
}
CYCLES(8);
}
-void i386_device::x87_fst_sti(UINT8 modrm)
+void i386_device::x87_fst_sti(uint8_t modrm)
{
int i = modrm & 7;
floatx80 value;
@@ -2860,11 +2860,11 @@ void i386_device::x87_fst_sti(UINT8 modrm)
CYCLES(3);
}
-void i386_device::x87_fstp_m32real(UINT8 modrm)
+void i386_device::x87_fstp_m32real(uint8_t modrm)
{
floatx80 value;
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -2878,7 +2878,7 @@ void i386_device::x87_fstp_m32real(UINT8 modrm)
if (x87_check_exceptions())
{
- UINT32 m32real = floatx80_to_float32(value);
+ uint32_t m32real = floatx80_to_float32(value);
WRITE32(ea, m32real);
x87_inc_stack();
}
@@ -2886,7 +2886,7 @@ void i386_device::x87_fstp_m32real(UINT8 modrm)
CYCLES(7);
}
-void i386_device::x87_fstp_m64real(UINT8 modrm)
+void i386_device::x87_fstp_m64real(uint8_t modrm)
{
floatx80 value;
@@ -2902,10 +2902,10 @@ void i386_device::x87_fstp_m64real(UINT8 modrm)
}
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (x87_check_exceptions())
{
- UINT64 m64real = floatx80_to_float64(value);
+ uint64_t m64real = floatx80_to_float64(value);
WRITE64(ea, m64real);
x87_inc_stack();
}
@@ -2913,7 +2913,7 @@ void i386_device::x87_fstp_m64real(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fstp_m80real(UINT8 modrm)
+void i386_device::x87_fstp_m80real(uint8_t modrm)
{
floatx80 value;
@@ -2928,7 +2928,7 @@ void i386_device::x87_fstp_m80real(UINT8 modrm)
value = ST(0);
}
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (x87_check_exceptions())
{
WRITE80(ea, value);
@@ -2938,7 +2938,7 @@ void i386_device::x87_fstp_m80real(UINT8 modrm)
CYCLES(6);
}
-void i386_device::x87_fstp_sti(UINT8 modrm)
+void i386_device::x87_fstp_sti(uint8_t modrm)
{
int i = modrm & 7;
floatx80 value;
@@ -2963,9 +2963,9 @@ void i386_device::x87_fstp_sti(UINT8 modrm)
CYCLES(3);
}
-void i386_device::x87_fist_m16int(UINT8 modrm)
+void i386_device::x87_fist_m16int(uint8_t modrm)
{
- INT16 m16int;
+ int16_t m16int;
if (X87_IS_ST_EMPTY(0))
{
@@ -2987,7 +2987,7 @@ void i386_device::x87_fist_m16int(UINT8 modrm)
m16int = -32768;
}
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (x87_check_exceptions())
{
WRITE16(ea, m16int);
@@ -2996,9 +2996,9 @@ void i386_device::x87_fist_m16int(UINT8 modrm)
CYCLES(29);
}
-void i386_device::x87_fist_m32int(UINT8 modrm)
+void i386_device::x87_fist_m32int(uint8_t modrm)
{
- INT32 m32int;
+ int32_t m32int;
if (X87_IS_ST_EMPTY(0))
{
@@ -3020,7 +3020,7 @@ void i386_device::x87_fist_m32int(UINT8 modrm)
m32int = 0x80000000;
}
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (x87_check_exceptions())
{
WRITE32(ea, m32int);
@@ -3029,14 +3029,14 @@ void i386_device::x87_fist_m32int(UINT8 modrm)
CYCLES(28);
}
-void i386_device::x87_fistp_m16int(UINT8 modrm)
+void i386_device::x87_fistp_m16int(uint8_t modrm)
{
- INT16 m16int;
+ int16_t m16int;
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
- m16int = (UINT16)0x8000;
+ m16int = (uint16_t)0x8000;
}
else
{
@@ -3050,10 +3050,10 @@ void i386_device::x87_fistp_m16int(UINT8 modrm)
if (!floatx80_lt(fx80, lowerLim) && floatx80_le(fx80, upperLim))
m16int = floatx80_to_int32(fx80);
else
- m16int = (UINT16)0x8000;
+ m16int = (uint16_t)0x8000;
}
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (x87_check_exceptions())
{
WRITE16(ea, m16int);
@@ -3063,9 +3063,9 @@ void i386_device::x87_fistp_m16int(UINT8 modrm)
CYCLES(29);
}
-void i386_device::x87_fistp_m32int(UINT8 modrm)
+void i386_device::x87_fistp_m32int(uint8_t modrm)
{
- INT32 m32int;
+ int32_t m32int;
if (X87_IS_ST_EMPTY(0))
{
@@ -3087,7 +3087,7 @@ void i386_device::x87_fistp_m32int(UINT8 modrm)
m32int = 0x80000000;
}
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (x87_check_exceptions())
{
WRITE32(ea, m32int);
@@ -3097,9 +3097,9 @@ void i386_device::x87_fistp_m32int(UINT8 modrm)
CYCLES(29);
}
-void i386_device::x87_fistp_m64int(UINT8 modrm)
+void i386_device::x87_fistp_m64int(uint8_t modrm)
{
- INT64 m64int;
+ int64_t m64int;
if (X87_IS_ST_EMPTY(0))
{
@@ -3121,7 +3121,7 @@ void i386_device::x87_fistp_m64int(UINT8 modrm)
m64int = U64(0x8000000000000000);
}
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (x87_check_exceptions())
{
WRITE64(ea, m64int);
@@ -3131,7 +3131,7 @@ void i386_device::x87_fistp_m64int(UINT8 modrm)
CYCLES(29);
}
-void i386_device::x87_fbstp(UINT8 modrm)
+void i386_device::x87_fbstp(uint8_t modrm)
{
floatx80 result;
@@ -3142,7 +3142,7 @@ void i386_device::x87_fbstp(UINT8 modrm)
}
else
{
- UINT64 u64 = floatx80_to_int64(floatx80_abs(ST(0)));
+ uint64_t u64 = floatx80_to_int64(floatx80_abs(ST(0)));
result.low = 0;
for (int i = 0; i < 64; i += 4)
@@ -3156,7 +3156,7 @@ void i386_device::x87_fbstp(UINT8 modrm)
result.high |= ST(0).high & 0x8000;
}
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
if (x87_check_exceptions())
{
WRITE80(ea, result);
@@ -3173,7 +3173,7 @@ void i386_device::x87_fbstp(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fld1(UINT8 modrm)
+void i386_device::x87_fld1(uint8_t modrm)
{
floatx80 value;
int tag;
@@ -3199,7 +3199,7 @@ void i386_device::x87_fld1(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fldl2t(UINT8 modrm)
+void i386_device::x87_fldl2t(uint8_t modrm)
{
floatx80 value;
int tag;
@@ -3231,7 +3231,7 @@ void i386_device::x87_fldl2t(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fldl2e(UINT8 modrm)
+void i386_device::x87_fldl2e(uint8_t modrm)
{
floatx80 value;
int tag;
@@ -3264,7 +3264,7 @@ void i386_device::x87_fldl2e(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fldpi(UINT8 modrm)
+void i386_device::x87_fldpi(uint8_t modrm)
{
floatx80 value;
int tag;
@@ -3297,7 +3297,7 @@ void i386_device::x87_fldpi(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fldlg2(UINT8 modrm)
+void i386_device::x87_fldlg2(uint8_t modrm)
{
floatx80 value;
int tag;
@@ -3330,7 +3330,7 @@ void i386_device::x87_fldlg2(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fldln2(UINT8 modrm)
+void i386_device::x87_fldln2(uint8_t modrm)
{
floatx80 value;
int tag;
@@ -3363,7 +3363,7 @@ void i386_device::x87_fldln2(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_fldz(UINT8 modrm)
+void i386_device::x87_fldz(uint8_t modrm)
{
floatx80 value;
int tag;
@@ -3396,12 +3396,12 @@ void i386_device::x87_fldz(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fnop(UINT8 modrm)
+void i386_device::x87_fnop(uint8_t modrm)
{
CYCLES(3);
}
-void i386_device::x87_fchs(UINT8 modrm)
+void i386_device::x87_fchs(uint8_t modrm)
{
floatx80 value;
@@ -3424,7 +3424,7 @@ void i386_device::x87_fchs(UINT8 modrm)
CYCLES(6);
}
-void i386_device::x87_fabs(UINT8 modrm)
+void i386_device::x87_fabs(uint8_t modrm)
{
floatx80 value;
@@ -3447,7 +3447,7 @@ void i386_device::x87_fabs(UINT8 modrm)
CYCLES(6);
}
-void i386_device::x87_fscale(UINT8 modrm)
+void i386_device::x87_fscale(uint8_t modrm)
{
floatx80 value;
@@ -3462,18 +3462,18 @@ void i386_device::x87_fscale(UINT8 modrm)
value = ST(0);
// Set the rounding mode to truncate
- UINT16 old_cw = m_x87_cw;
- UINT16 new_cw = (old_cw & ~(X87_CW_RC_MASK << X87_CW_RC_SHIFT)) | (X87_CW_RC_ZERO << X87_CW_RC_SHIFT);
+ uint16_t old_cw = m_x87_cw;
+ uint16_t new_cw = (old_cw & ~(X87_CW_RC_MASK << X87_CW_RC_SHIFT)) | (X87_CW_RC_ZERO << X87_CW_RC_SHIFT);
x87_write_cw(new_cw);
// Interpret ST(1) as an integer
- UINT32 st1 = floatx80_to_int32(floatx80_round_to_int(ST(1)));
+ uint32_t st1 = floatx80_to_int32(floatx80_round_to_int(ST(1)));
// Restore the rounding mode
x87_write_cw(old_cw);
// Get the unbiased exponent of ST(0)
- INT16 exp = (ST(0).high & 0x7fff) - 0x3fff;
+ int16_t exp = (ST(0).high & 0x7fff) - 0x3fff;
// Calculate the new exponent
exp = (exp + st1 + 0x3fff) & 0x7fff;
@@ -3488,7 +3488,7 @@ void i386_device::x87_fscale(UINT8 modrm)
CYCLES(31);
}
-void i386_device::x87_frndint(UINT8 modrm)
+void i386_device::x87_frndint(uint8_t modrm)
{
floatx80 value;
@@ -3510,7 +3510,7 @@ void i386_device::x87_frndint(UINT8 modrm)
CYCLES(21);
}
-void i386_device::x87_fxtract(UINT8 modrm)
+void i386_device::x87_fxtract(uint8_t modrm)
{
floatx80 sig80, exp80;
@@ -3563,7 +3563,7 @@ void i386_device::x87_fxtract(UINT8 modrm)
*
*************************************/
-void i386_device::x87_ftst(UINT8 modrm)
+void i386_device::x87_ftst(uint8_t modrm)
{
if (X87_IS_ST_EMPTY(0))
{
@@ -3594,7 +3594,7 @@ void i386_device::x87_ftst(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fxam(UINT8 modrm)
+void i386_device::x87_fxam(uint8_t modrm)
{
floatx80 value = ST(0);
@@ -3628,9 +3628,9 @@ void i386_device::x87_fxam(UINT8 modrm)
CYCLES(8);
}
-void i386_device::x87_ficom_m16int(UINT8 modrm)
+void i386_device::x87_ficom_m16int(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -3640,7 +3640,7 @@ void i386_device::x87_ficom_m16int(UINT8 modrm)
{
m_x87_sw &= ~(X87_SW_C3 | X87_SW_C2 | X87_SW_C1 | X87_SW_C0);
- INT16 m16int = READ16(ea);
+ int16_t m16int = READ16(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m16int);
@@ -3665,9 +3665,9 @@ void i386_device::x87_ficom_m16int(UINT8 modrm)
CYCLES(16);
}
-void i386_device::x87_ficom_m32int(UINT8 modrm)
+void i386_device::x87_ficom_m32int(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -3677,7 +3677,7 @@ void i386_device::x87_ficom_m32int(UINT8 modrm)
{
m_x87_sw &= ~(X87_SW_C3 | X87_SW_C2 | X87_SW_C1 | X87_SW_C0);
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m32int);
@@ -3702,9 +3702,9 @@ void i386_device::x87_ficom_m32int(UINT8 modrm)
CYCLES(15);
}
-void i386_device::x87_ficomp_m16int(UINT8 modrm)
+void i386_device::x87_ficomp_m16int(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -3714,7 +3714,7 @@ void i386_device::x87_ficomp_m16int(UINT8 modrm)
{
m_x87_sw &= ~(X87_SW_C3 | X87_SW_C2 | X87_SW_C1 | X87_SW_C0);
- INT16 m16int = READ16(ea);
+ int16_t m16int = READ16(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m16int);
@@ -3740,9 +3740,9 @@ void i386_device::x87_ficomp_m16int(UINT8 modrm)
CYCLES(16);
}
-void i386_device::x87_ficomp_m32int(UINT8 modrm)
+void i386_device::x87_ficomp_m32int(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -3752,7 +3752,7 @@ void i386_device::x87_ficomp_m32int(UINT8 modrm)
{
m_x87_sw &= ~(X87_SW_C3 | X87_SW_C2 | X87_SW_C1 | X87_SW_C0);
- INT32 m32int = READ32(ea);
+ int32_t m32int = READ32(ea);
floatx80 a = ST(0);
floatx80 b = int32_to_floatx80(m32int);
@@ -3779,9 +3779,9 @@ void i386_device::x87_ficomp_m32int(UINT8 modrm)
}
-void i386_device::x87_fcom_m32real(UINT8 modrm)
+void i386_device::x87_fcom_m32real(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -3791,7 +3791,7 @@ void i386_device::x87_fcom_m32real(UINT8 modrm)
{
m_x87_sw &= ~(X87_SW_C3 | X87_SW_C2 | X87_SW_C1 | X87_SW_C0);
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
floatx80 a = ST(0);
floatx80 b = float32_to_floatx80(m32real);
@@ -3816,9 +3816,9 @@ void i386_device::x87_fcom_m32real(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcom_m64real(UINT8 modrm)
+void i386_device::x87_fcom_m64real(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -3828,7 +3828,7 @@ void i386_device::x87_fcom_m64real(UINT8 modrm)
{
m_x87_sw &= ~(X87_SW_C3 | X87_SW_C2 | X87_SW_C1 | X87_SW_C0);
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
floatx80 a = ST(0);
floatx80 b = float64_to_floatx80(m64real);
@@ -3853,7 +3853,7 @@ void i386_device::x87_fcom_m64real(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcom_sti(UINT8 modrm)
+void i386_device::x87_fcom_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -3889,9 +3889,9 @@ void i386_device::x87_fcom_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcomp_m32real(UINT8 modrm)
+void i386_device::x87_fcomp_m32real(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -3901,7 +3901,7 @@ void i386_device::x87_fcomp_m32real(UINT8 modrm)
{
m_x87_sw &= ~(X87_SW_C3 | X87_SW_C2 | X87_SW_C1 | X87_SW_C0);
- UINT32 m32real = READ32(ea);
+ uint32_t m32real = READ32(ea);
floatx80 a = ST(0);
floatx80 b = float32_to_floatx80(m32real);
@@ -3927,9 +3927,9 @@ void i386_device::x87_fcomp_m32real(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcomp_m64real(UINT8 modrm)
+void i386_device::x87_fcomp_m64real(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (X87_IS_ST_EMPTY(0))
{
x87_set_stack_underflow();
@@ -3939,7 +3939,7 @@ void i386_device::x87_fcomp_m64real(UINT8 modrm)
{
m_x87_sw &= ~(X87_SW_C3 | X87_SW_C2 | X87_SW_C1 | X87_SW_C0);
- UINT64 m64real = READ64(ea);
+ uint64_t m64real = READ64(ea);
floatx80 a = ST(0);
floatx80 b = float64_to_floatx80(m64real);
@@ -3965,7 +3965,7 @@ void i386_device::x87_fcomp_m64real(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcomp_sti(UINT8 modrm)
+void i386_device::x87_fcomp_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -4002,7 +4002,7 @@ void i386_device::x87_fcomp_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fcomi_sti(UINT8 modrm)
+void i386_device::x87_fcomi_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -4046,7 +4046,7 @@ void i386_device::x87_fcomi_sti(UINT8 modrm)
CYCLES(4); // TODO: correct cycle count
}
-void i386_device::x87_fcomip_sti(UINT8 modrm)
+void i386_device::x87_fcomip_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -4091,7 +4091,7 @@ void i386_device::x87_fcomip_sti(UINT8 modrm)
CYCLES(4); // TODO: correct cycle count
}
-void i386_device::x87_fucomi_sti(UINT8 modrm)
+void i386_device::x87_fucomi_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -4141,7 +4141,7 @@ void i386_device::x87_fucomi_sti(UINT8 modrm)
CYCLES(4); // TODO: correct cycle count
}
-void i386_device::x87_fucomip_sti(UINT8 modrm)
+void i386_device::x87_fucomip_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -4192,7 +4192,7 @@ void i386_device::x87_fucomip_sti(UINT8 modrm)
CYCLES(4); // TODO: correct cycle count
}
-void i386_device::x87_fcompp(UINT8 modrm)
+void i386_device::x87_fcompp(uint8_t modrm)
{
if (X87_IS_ST_EMPTY(0) || X87_IS_ST_EMPTY(1))
{
@@ -4237,7 +4237,7 @@ void i386_device::x87_fcompp(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fucom_sti(UINT8 modrm)
+void i386_device::x87_fucom_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -4275,7 +4275,7 @@ void i386_device::x87_fucom_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fucomp_sti(UINT8 modrm)
+void i386_device::x87_fucomp_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -4314,7 +4314,7 @@ void i386_device::x87_fucomp_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fucompp(UINT8 modrm)
+void i386_device::x87_fucompp(uint8_t modrm)
{
if (X87_IS_ST_EMPTY(0) || X87_IS_ST_EMPTY(1))
{
@@ -4361,7 +4361,7 @@ void i386_device::x87_fucompp(UINT8 modrm)
*
*************************************/
-void i386_device::x87_fdecstp(UINT8 modrm)
+void i386_device::x87_fdecstp(uint8_t modrm)
{
m_x87_sw &= ~X87_SW_C1;
@@ -4371,7 +4371,7 @@ void i386_device::x87_fdecstp(UINT8 modrm)
CYCLES(3);
}
-void i386_device::x87_fincstp(UINT8 modrm)
+void i386_device::x87_fincstp(uint8_t modrm)
{
m_x87_sw &= ~X87_SW_C1;
@@ -4381,31 +4381,31 @@ void i386_device::x87_fincstp(UINT8 modrm)
CYCLES(3);
}
-void i386_device::x87_fclex(UINT8 modrm)
+void i386_device::x87_fclex(uint8_t modrm)
{
m_x87_sw &= ~0x80ff;
CYCLES(7);
}
-void i386_device::x87_ffree(UINT8 modrm)
+void i386_device::x87_ffree(uint8_t modrm)
{
x87_set_tag(ST_TO_PHYS(modrm & 7), X87_TW_EMPTY);
CYCLES(3);
}
-void i386_device::x87_finit(UINT8 modrm)
+void i386_device::x87_finit(uint8_t modrm)
{
x87_reset();
CYCLES(17);
}
-void i386_device::x87_fldcw(UINT8 modrm)
+void i386_device::x87_fldcw(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
- UINT16 cw = READ16(ea);
+ uint32_t ea = GetEA(modrm, 0);
+ uint16_t cw = READ16(ea);
x87_write_cw(cw);
@@ -4414,18 +4414,18 @@ void i386_device::x87_fldcw(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fstcw(UINT8 modrm)
+void i386_device::x87_fstcw(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
WRITE16(ea, m_x87_cw);
CYCLES(3);
}
-void i386_device::x87_fldenv(UINT8 modrm)
+void i386_device::x87_fldenv(uint8_t modrm)
{
// TODO: Pointers and selectors
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
if (m_operand_size)
{
@@ -4447,9 +4447,9 @@ void i386_device::x87_fldenv(UINT8 modrm)
CYCLES((m_cr[0] & 1) ? 34 : 44);
}
-void i386_device::x87_fstenv(UINT8 modrm)
+void i386_device::x87_fstenv(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
// TODO: Pointers and selectors
switch((m_cr[0] & 1)|(m_operand_size & 1)<<1)
@@ -4496,9 +4496,9 @@ void i386_device::x87_fstenv(UINT8 modrm)
CYCLES((m_cr[0] & 1) ? 56 : 67);
}
-void i386_device::x87_fsave(UINT8 modrm)
+void i386_device::x87_fsave(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
// TODO: Pointers and selectors
switch((m_cr[0] & 1)|(m_operand_size & 1)<<1)
@@ -4552,9 +4552,9 @@ void i386_device::x87_fsave(UINT8 modrm)
CYCLES((m_cr[0] & 1) ? 56 : 67);
}
-void i386_device::x87_frstor(UINT8 modrm)
+void i386_device::x87_frstor(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 0);
+ uint32_t ea = GetEA(modrm, 0);
// TODO: Pointers and selectors
switch((m_cr[0] & 1)|(m_operand_size & 1)<<1)
@@ -4608,7 +4608,7 @@ void i386_device::x87_frstor(UINT8 modrm)
CYCLES((m_cr[0] & 1) ? 34 : 44);
}
-void i386_device::x87_fxch(UINT8 modrm)
+void i386_device::x87_fxch(uint8_t modrm)
{
if (X87_IS_ST_EMPTY(0) || X87_IS_ST_EMPTY(1))
x87_set_stack_underflow();
@@ -4628,7 +4628,7 @@ void i386_device::x87_fxch(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fxch_sti(UINT8 modrm)
+void i386_device::x87_fxch_sti(uint8_t modrm)
{
int i = modrm & 7;
@@ -4660,23 +4660,23 @@ void i386_device::x87_fxch_sti(UINT8 modrm)
CYCLES(4);
}
-void i386_device::x87_fstsw_ax(UINT8 modrm)
+void i386_device::x87_fstsw_ax(uint8_t modrm)
{
REG16(AX) = m_x87_sw;
CYCLES(3);
}
-void i386_device::x87_fstsw_m2byte(UINT8 modrm)
+void i386_device::x87_fstsw_m2byte(uint8_t modrm)
{
- UINT32 ea = GetEA(modrm, 1);
+ uint32_t ea = GetEA(modrm, 1);
WRITE16(ea, m_x87_sw);
CYCLES(3);
}
-void i386_device::x87_invalid(UINT8 modrm)
+void i386_device::x87_invalid(uint8_t modrm)
{
// TODO
fatalerror("x87 invalid instruction (PC:%.4x)\n", m_pc);
@@ -4692,49 +4692,49 @@ void i386_device::x87_invalid(UINT8 modrm)
void i386_device::i386_x87_group_d8()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
(this->*m_opcode_table_x87_d8[modrm])(modrm);
}
void i386_device::i386_x87_group_d9()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
(this->*m_opcode_table_x87_d9[modrm])(modrm);
}
void i386_device::i386_x87_group_da()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
(this->*m_opcode_table_x87_da[modrm])(modrm);
}
void i386_device::i386_x87_group_db()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
(this->*m_opcode_table_x87_db[modrm])(modrm);
}
void i386_device::i386_x87_group_dc()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
(this->*m_opcode_table_x87_dc[modrm])(modrm);
}
void i386_device::i386_x87_group_dd()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
(this->*m_opcode_table_x87_dd[modrm])(modrm);
}
void i386_device::i386_x87_group_de()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
(this->*m_opcode_table_x87_de[modrm])(modrm);
}
void i386_device::i386_x87_group_df()
{
- UINT8 modrm = FETCH();
+ uint8_t modrm = FETCH();
(this->*m_opcode_table_x87_df[modrm])(modrm);
}
diff --git a/src/devices/cpu/i4004/4004dasm.cpp b/src/devices/cpu/i4004/4004dasm.cpp
index 2e76c14b3b5..e6aa5e78ee3 100644
--- a/src/devices/cpu/i4004/4004dasm.cpp
+++ b/src/devices/cpu/i4004/4004dasm.cpp
@@ -15,10 +15,10 @@
CPU_DISASSEMBLE( i4004 )
{
- UINT32 flags = 0;
- UINT8 op;
+ uint32_t flags = 0;
+ uint8_t op;
unsigned PC = pc;
- UINT16 page = PC & 0x0f00;
+ uint16_t page = PC & 0x0f00;
switch (op = OP(pc++))
{
case 0x00: sprintf (buffer,"nop"); break;
diff --git a/src/devices/cpu/i4004/i4004.cpp b/src/devices/cpu/i4004/i4004.cpp
index ce67670a007..d0db65e6d63 100644
--- a/src/devices/cpu/i4004/i4004.cpp
+++ b/src/devices/cpu/i4004/i4004.cpp
@@ -12,7 +12,7 @@
#include "i4004.h"
-static const UINT8 kbp_table[] = { 0x00,0x01,0x02,0x0f,0x03,0x0f,0x0f,0x0f,0x04,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f };
+static const uint8_t kbp_table[] = { 0x00,0x01,0x02,0x0f,0x03,0x0f,0x0f,0x0f,0x04,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f,0x0f };
/***************************************************************************
@@ -24,7 +24,7 @@ static const UINT8 kbp_table[] = { 0x00,0x01,0x02,0x0f,0x03,0x0f,0x0f,0x0f,0x04,
const device_type I4004 = &device_creator<i4004_cpu_device>;
-i4004_cpu_device::i4004_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i4004_cpu_device::i4004_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, I4004, "Intel I4004", tag, owner, clock, "i4004", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 12, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 6, 0)
@@ -36,75 +36,75 @@ i4004_cpu_device::i4004_cpu_device(const machine_config &mconfig, const char *ta
}
-UINT8 i4004_cpu_device::ROP()
+uint8_t i4004_cpu_device::ROP()
{
- UINT8 retVal = m_direct->read_byte(GET_PC.w.l);
+ uint8_t retVal = m_direct->read_byte(GET_PC.w.l);
GET_PC.w.l = (GET_PC.w.l + 1) & 0x0fff;
m_PC = GET_PC;
return retVal;
}
-UINT8 i4004_cpu_device::READ_ROM()
+uint8_t i4004_cpu_device::READ_ROM()
{
return m_direct->read_byte((GET_PC.w.l & 0x0f00) | m_R[0]);
}
void i4004_cpu_device::WPM()
{
- UINT8 t = (m_program->read_byte(m_RAM.d) << 4) | m_A;
+ uint8_t t = (m_program->read_byte(m_RAM.d) << 4) | m_A;
m_program->write_byte((GET_PC.w.l & 0x0f00) | m_RAM.d, t);
}
-UINT8 i4004_cpu_device::ARG()
+uint8_t i4004_cpu_device::ARG()
{
- UINT8 retVal = m_direct->read_byte(GET_PC.w.l);
+ uint8_t retVal = m_direct->read_byte(GET_PC.w.l);
GET_PC.w.l = (GET_PC.w.l + 1) & 0x0fff;
m_PC = GET_PC;
return retVal;
}
-UINT8 i4004_cpu_device::RM()
+uint8_t i4004_cpu_device::RM()
{
return m_data->read_byte(m_RAM.d) & 0x0f;
}
-UINT8 i4004_cpu_device::RMS(UINT32 a)
+uint8_t i4004_cpu_device::RMS(uint32_t a)
{
return m_data->read_byte((m_RAM.d & 0xff0) + a) >> 4;
}
-void i4004_cpu_device::WM(UINT8 v)
+void i4004_cpu_device::WM(uint8_t v)
{
- UINT8 t = m_data->read_byte(m_RAM.d);
+ uint8_t t = m_data->read_byte(m_RAM.d);
m_data->write_byte(m_RAM.d, (t & 0xf0) | v);
}
-void i4004_cpu_device::WMP(UINT8 v)
+void i4004_cpu_device::WMP(uint8_t v)
{
m_io->write_byte((m_RAM.d >> 6) | 0x10, v & 0x0f);
}
-void i4004_cpu_device::WMS(UINT32 a, UINT8 v)
+void i4004_cpu_device::WMS(uint32_t a, uint8_t v)
{
- UINT8 t = m_data->read_byte((m_RAM.d & 0xff0) + a);
+ uint8_t t = m_data->read_byte((m_RAM.d & 0xff0) + a);
m_data->write_byte((m_RAM.d & 0xff0) + a, (t & 0x0f) | (v<<4));
}
-UINT8 i4004_cpu_device::RIO()
+uint8_t i4004_cpu_device::RIO()
{
return m_io->read_byte(m_RAM.b.l >> 4) & 0x0f;
}
-void i4004_cpu_device::WIO(UINT8 v)
+void i4004_cpu_device::WIO(uint8_t v)
{
m_io->write_byte(m_RAM.b.l >> 4, v & 0x0f);
}
-UINT8 i4004_cpu_device::GET_REG(UINT8 num)
+uint8_t i4004_cpu_device::GET_REG(uint8_t num)
{
- UINT8 r = m_R[num>>1];
+ uint8_t r = m_R[num>>1];
if (num & 1) {
return r & 0x0f;
} else {
@@ -112,7 +112,7 @@ UINT8 i4004_cpu_device::GET_REG(UINT8 num)
}
}
-void i4004_cpu_device::SET_REG(UINT8 num, UINT8 val)
+void i4004_cpu_device::SET_REG(uint8_t num, uint8_t val)
{
if (num & 1) {
m_R[num>>1] = (m_R[num>>1] & 0xf0) + (val & 0x0f);
@@ -132,7 +132,7 @@ void i4004_cpu_device::POP_STACK()
m_pc_pos = (m_pc_pos - 1) & m_addr_mask;
}
-void i4004_cpu_device::set_test(UINT8 val)
+void i4004_cpu_device::set_test(uint8_t val)
{
m_TEST = val;
}
@@ -150,13 +150,13 @@ void i4004_cpu_device::execute_one(int opcode)
case 0x18: case 0x19: case 0x1a: case 0x1b:
case 0x1c: case 0x1d: case 0x1e: case 0x1f: /* JCN */
{
- UINT8 arg = ARG();
+ uint8_t arg = ARG();
- UINT8 C1 = BIT(opcode,3);
- UINT8 C2 = BIT(opcode,2);
- UINT8 C3 = BIT(opcode,1);
- UINT8 C4 = BIT(opcode,0);
- UINT8 JUMP = (((m_A == 0) ? 1 : 0) & C2) | ((m_C) & C3) | ((m_TEST ^ 1) & C4);
+ uint8_t C1 = BIT(opcode,3);
+ uint8_t C2 = BIT(opcode,2);
+ uint8_t C3 = BIT(opcode,1);
+ uint8_t C4 = BIT(opcode,0);
+ uint8_t JUMP = (((m_A == 0) ? 1 : 0) & C2) | ((m_C) & C3) | ((m_TEST ^ 1) & C4);
m_icount -= 8;
if(((C1 ^ 1) & JUMP) | (C1 & (JUMP ^ 1))) {
@@ -197,7 +197,7 @@ void i4004_cpu_device::execute_one(int opcode)
case 0x58: case 0x59: case 0x5a: case 0x5b:
case 0x5c: case 0x5d: case 0x5e: case 0x5f: /* JMS */
{
- UINT16 newPC = ((opcode & 0x0f) << 8) | ARG();
+ uint16_t newPC = ((opcode & 0x0f) << 8) | ARG();
m_icount -= 8;
PUSH_STACK();
GET_PC.w.l = newPC;
@@ -215,8 +215,8 @@ void i4004_cpu_device::execute_one(int opcode)
case 0x78: case 0x79: case 0x7a: case 0x7b:
case 0x7c: case 0x7d: case 0x7e: case 0x7f: /* ISZ */
{
- UINT8 val = (GET_REG(opcode & 0x0f) + 1) & 0xf;
- UINT16 addr = ARG();
+ uint8_t val = (GET_REG(opcode & 0x0f) + 1) & 0xf;
+ uint16_t addr = ARG();
m_icount -= 8;
SET_REG(opcode & 0x0f, val);
if (val!=0) {
@@ -230,7 +230,7 @@ void i4004_cpu_device::execute_one(int opcode)
case 0x88: case 0x89: case 0x8a: case 0x8b:
case 0x8c: case 0x8d: case 0x8e: case 0x8f: /* ADD */
{
- UINT8 acc = m_A + GET_REG(opcode & 0x0f) + m_C;
+ uint8_t acc = m_A + GET_REG(opcode & 0x0f) + m_C;
m_A = acc & 0x0f;
m_C = (acc >> 4) & 1;
}
@@ -240,7 +240,7 @@ void i4004_cpu_device::execute_one(int opcode)
case 0x98: case 0x99: case 0x9a: case 0x9b:
case 0x9c: case 0x9d: case 0x9e: case 0x9f: /* SUB */
{
- UINT8 acc = m_A + (GET_REG(opcode & 0x0f) ^ 0x0f) + (m_C ^ 1);
+ uint8_t acc = m_A + (GET_REG(opcode & 0x0f) ^ 0x0f) + (m_C ^ 1);
m_A = acc & 0x0f;
m_C = (acc >> 4) & 1;
}
@@ -256,7 +256,7 @@ void i4004_cpu_device::execute_one(int opcode)
case 0xb8: case 0xb9: case 0xba: case 0xbb:
case 0xbc: case 0xbd: case 0xbe: case 0xbf: /* XCH */
{
- UINT8 temp = m_A;
+ uint8_t temp = m_A;
m_A = GET_REG(opcode & 0x0f);
SET_REG(opcode & 0x0f, temp);
}
@@ -353,7 +353,7 @@ void i4004_cpu_device::execute_one(int opcode)
break;
case 0xf6: /* RAR */
{
- UINT8 c = m_A & 1;
+ uint8_t c = m_A & 1;
m_A = (m_A >> 1) | (m_C << 3);
m_C = c;
}
@@ -522,7 +522,7 @@ void i4004_cpu_device::state_string_export(const device_state_entry &entry, std:
}
}
-offs_t i4004_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i4004_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i4004 );
return CPU_DISASSEMBLE_NAME(i4004)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/i4004/i4004.h b/src/devices/cpu/i4004/i4004.h
index c2e887c6e0d..1b875f10aee 100644
--- a/src/devices/cpu/i4004/i4004.h
+++ b/src/devices/cpu/i4004/i4004.h
@@ -25,9 +25,9 @@ class i4004_cpu_device : public cpu_device
{
public:
// construction/destruction
- i4004_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ i4004_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
- void set_test(UINT8 val);
+ void set_test(uint8_t val);
protected:
// device-level overrides
@@ -35,8 +35,8 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 8; }
- virtual UINT32 execute_max_cycles() const override { return 16; }
+ virtual uint32_t execute_min_cycles() const override { return 8; }
+ virtual uint32_t execute_max_cycles() const override { return 16; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -57,23 +57,23 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- UINT8 ROP();
- UINT8 READ_ROM();
+ uint8_t ROP();
+ uint8_t READ_ROM();
void WPM();
- UINT8 ARG();
- UINT8 RM();
- UINT8 RMS(UINT32 a);
- void WM(UINT8 v);
- void WMP(UINT8 v);
- void WMS(UINT32 a, UINT8 v);
- UINT8 RIO();
- void WIO(UINT8 v);
- UINT8 GET_REG(UINT8 num);
- void SET_REG(UINT8 num, UINT8 val);
+ uint8_t ARG();
+ uint8_t RM();
+ uint8_t RMS(uint32_t a);
+ void WM(uint8_t v);
+ void WMP(uint8_t v);
+ void WMS(uint32_t a, uint8_t v);
+ uint8_t RIO();
+ void WIO(uint8_t v);
+ uint8_t GET_REG(uint8_t num);
+ void SET_REG(uint8_t num, uint8_t val);
void PUSH_STACK();
void POP_STACK();
void execute_one(int opcode);
@@ -82,14 +82,14 @@ protected:
address_space_config m_io_config;
address_space_config m_data_config;
- UINT8 m_A; // Accumulator
- UINT8 m_R[8];
+ uint8_t m_A; // Accumulator
+ uint8_t m_R[8];
PAIR m_ADDR[4]; // Address registers
PAIR m_RAM;
- UINT8 m_C; // Carry flag
- UINT8 m_TEST; // Test PIN status
+ uint8_t m_C; // Carry flag
+ uint8_t m_TEST; // Test PIN status
PAIR m_PC; // It is in fact one of ADDR regs
- UINT8 m_flags; // used for I/O only
+ uint8_t m_flags; // used for I/O only
address_space *m_program;
direct_read_data *m_direct;
diff --git a/src/devices/cpu/i8008/8008dasm.cpp b/src/devices/cpu/i8008/8008dasm.cpp
index d5f1e082d5e..39615eb4f26 100644
--- a/src/devices/cpu/i8008/8008dasm.cpp
+++ b/src/devices/cpu/i8008/8008dasm.cpp
@@ -18,9 +18,9 @@ static const char flag_names[] = { 'c', 'z', 's', 'p' };
CPU_DISASSEMBLE( i8008 )
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
unsigned PC = pc;
- UINT8 op = OP(pc++);
+ uint8_t op = OP(pc++);
switch (op >> 6)
{
case 0x03: // starting with 11
diff --git a/src/devices/cpu/i8008/i8008.cpp b/src/devices/cpu/i8008/i8008.cpp
index c8e1f74195b..a323ed077c4 100644
--- a/src/devices/cpu/i8008/i8008.cpp
+++ b/src/devices/cpu/i8008/i8008.cpp
@@ -33,7 +33,7 @@ const device_type I8008 = &device_creator<i8008_device>;
//-------------------------------------------------
// i8008_device - constructor
//-------------------------------------------------
-i8008_device::i8008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8008_device::i8008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, I8008, "i8008", tag, owner, clock, "i8008", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 8, 14),
m_io_config("io", ENDIANNESS_LITTLE, 8, 8),
@@ -102,7 +102,7 @@ void i8008_device::device_start()
void i8008_device::init_tables (void)
{
int i;
- UINT8 p;
+ uint8_t p;
for (i = 0; i < 256; i++)
{
p = 0;
@@ -206,7 +206,7 @@ void i8008_device::state_string_export(const device_state_entry &entry, std::str
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 i8008_device::disasm_min_opcode_bytes() const
+uint32_t i8008_device::disasm_min_opcode_bytes() const
{
return 1;
}
@@ -216,7 +216,7 @@ UINT32 i8008_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 i8008_device::disasm_max_opcode_bytes() const
+uint32_t i8008_device::disasm_max_opcode_bytes() const
{
return 3;
}
@@ -226,7 +226,7 @@ UINT32 i8008_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t i8008_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i8008_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i8008 );
return CPU_DISASSEMBLE_NAME(i8008)(this, buffer, pc, oprom, opram, options);
@@ -241,7 +241,7 @@ offs_t i8008_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 i8008_device::execute_min_cycles() const
+uint32_t i8008_device::execute_min_cycles() const
{
return 8;
}
@@ -251,7 +251,7 @@ UINT32 i8008_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 i8008_device::execute_max_cycles() const
+uint32_t i8008_device::execute_max_cycles() const
{
return 16;
}
@@ -281,7 +281,7 @@ void i8008_device::execute_run()
} while (m_icount > 0);
}
-inline void i8008_device::illegal(UINT8 opcode)
+inline void i8008_device::illegal(uint8_t opcode)
{
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
@@ -302,7 +302,7 @@ void i8008_device::take_interrupt()
inline void i8008_device::execute_one(int opcode)
{
- UINT16 tmp;
+ uint16_t tmp;
switch (opcode >> 6)
{
@@ -618,17 +618,17 @@ inline void i8008_device::pop_stack()
m_pc_pos = (m_pc_pos - 1) & 7;
}
-inline UINT8 i8008_device::rop()
+inline uint8_t i8008_device::rop()
{
- UINT8 retVal = m_direct->read_byte(GET_PC.w.l);
+ uint8_t retVal = m_direct->read_byte(GET_PC.w.l);
GET_PC.w.l = (GET_PC.w.l + 1) & 0x3fff;
m_PC = GET_PC;
return retVal;
}
-inline UINT8 i8008_device::get_reg(UINT8 reg)
+inline uint8_t i8008_device::get_reg(uint8_t reg)
{
- UINT8 retVal;
+ uint8_t retVal;
switch(reg) {
case 0 : retVal = m_A; break;
case 1 : retVal = m_B; break;
@@ -642,7 +642,7 @@ inline UINT8 i8008_device::get_reg(UINT8 reg)
return retVal;
}
-inline void i8008_device::set_reg(UINT8 reg, UINT8 val)
+inline void i8008_device::set_reg(uint8_t reg, uint8_t val)
{
switch(reg) {
case 0 : m_A = val; break;
@@ -656,25 +656,25 @@ inline void i8008_device::set_reg(UINT8 reg, UINT8 val)
}
}
-inline UINT8 i8008_device::arg()
+inline uint8_t i8008_device::arg()
{
- UINT8 retVal = m_direct->read_byte(GET_PC.w.l);
+ uint8_t retVal = m_direct->read_byte(GET_PC.w.l);
GET_PC.w.l = (GET_PC.w.l + 1) & 0x3fff;
m_PC = GET_PC;
return retVal;
}
-inline void i8008_device::update_flags(UINT8 val)
+inline void i8008_device::update_flags(uint8_t val)
{
m_ZF = (val == 0) ? 1 : 0;
m_SF = (val & 0x80) ? 1 : 0;
m_PF = m_PARITY[val];
}
-inline UINT8 i8008_device::do_condition(UINT8 val)
+inline uint8_t i8008_device::do_condition(uint8_t val)
{
- UINT8 v = (val >> 5) & 1;
- UINT8 cond = 0;
+ uint8_t v = (val >> 5) & 1;
+ uint8_t cond = 0;
switch((val>> 3) & 0x03) {
case 0 :
if (m_CF==v) cond = 1;
@@ -692,9 +692,9 @@ inline UINT8 i8008_device::do_condition(UINT8 val)
return cond;
}
-inline UINT16 i8008_device::get_addr()
+inline uint16_t i8008_device::get_addr()
{
- UINT8 lo = arg();
- UINT8 hi = arg();
+ uint8_t lo = arg();
+ uint8_t hi = arg();
return ((hi & 0x3f) << 8) + lo;
}
diff --git a/src/devices/cpu/i8008/i8008.h b/src/devices/cpu/i8008/i8008.h
index 14fcf28d0dc..4ba000f3fe9 100644
--- a/src/devices/cpu/i8008/i8008.h
+++ b/src/devices/cpu/i8008/i8008.h
@@ -25,7 +25,7 @@ class i8008_device : public cpu_device
{
public:
// construction/destruction
- i8008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -33,8 +33,8 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -48,22 +48,22 @@ protected:
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void execute_one(int opcode);
void push_stack();
void pop_stack();
- UINT8 rop();
- UINT8 get_reg(UINT8 reg);
- void set_reg(UINT8 reg, UINT8 val);
- UINT8 arg();
- void update_flags(UINT8 val);
- UINT8 do_condition(UINT8 val);
- UINT16 get_addr();
- void illegal(UINT8 opcode);
+ uint8_t rop();
+ uint8_t get_reg(uint8_t reg);
+ void set_reg(uint8_t reg, uint8_t val);
+ uint8_t arg();
+ void update_flags(uint8_t val);
+ uint8_t do_condition(uint8_t val);
+ uint16_t get_addr();
+ void illegal(uint8_t opcode);
void take_interrupt();
void init_tables(void);
@@ -74,19 +74,19 @@ protected:
const address_space_config m_program_config;
const address_space_config m_io_config;
- UINT8 m_A,m_B,m_C,m_D,m_E,m_H,m_L;
+ uint8_t m_A,m_B,m_C,m_D,m_E,m_H,m_L;
PAIR m_PC; // It is in fact one of ADDR regs
PAIR m_ADDR[8]; // Address registers
- UINT8 m_CF; // Carry flag
- UINT8 m_ZF; // Zero flag
- UINT8 m_SF; // Sign flag
- UINT8 m_PF; // Parity flag
- UINT8 m_HALT;
- UINT8 m_flags; // temporary I/O only
+ uint8_t m_CF; // Carry flag
+ uint8_t m_ZF; // Zero flag
+ uint8_t m_SF; // Sign flag
+ uint8_t m_PF; // Parity flag
+ uint8_t m_HALT;
+ uint8_t m_flags; // temporary I/O only
- UINT8 m_irq_state;
+ uint8_t m_irq_state;
- UINT8 m_PARITY[256];
+ uint8_t m_PARITY[256];
address_space *m_program;
address_space *m_io;
diff --git a/src/devices/cpu/i8085/8085dasm.cpp b/src/devices/cpu/i8085/8085dasm.cpp
index e68bdfac337..515899a79e2 100644
--- a/src/devices/cpu/i8085/8085dasm.cpp
+++ b/src/devices/cpu/i8085/8085dasm.cpp
@@ -20,8 +20,8 @@
CPU_DISASSEMBLE( i8085 )
{
- UINT32 flags = 0;
- UINT8 op;
+ uint32_t flags = 0;
+ uint8_t op;
unsigned PC = pc;
switch (op = OP(pc++))
{
diff --git a/src/devices/cpu/i8085/i8085.cpp b/src/devices/cpu/i8085/i8085.cpp
index 5fc63d50987..b28ebab7380 100644
--- a/src/devices/cpu/i8085/i8085.cpp
+++ b/src/devices/cpu/i8085/i8085.cpp
@@ -128,7 +128,7 @@
***************************************************************************/
/* cycles lookup */
-const UINT8 i8085a_cpu_device::lut_cycles_8080[256]={
+const uint8_t i8085a_cpu_device::lut_cycles_8080[256]={
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0 */ 4, 10,7, 5, 5, 5, 7, 4, 4, 10,7, 5, 5, 5, 7, 4,
/* 1 */ 4, 10,7, 5, 5, 5, 7, 4, 4, 10,7, 5, 5, 5, 7, 4,
@@ -146,7 +146,7 @@ const UINT8 i8085a_cpu_device::lut_cycles_8080[256]={
/* D */ 5, 10,10,10,11,11,7, 11,5, 10,10,10,11,11,7, 11,
/* E */ 5, 10,10,18,11,11,7, 11,5, 5, 10,5, 11,11,7, 11,
/* F */ 5, 10,10,4, 11,11,7, 11,5, 5, 10,4, 11,11,7, 11 };
-const UINT8 i8085a_cpu_device::lut_cycles_8085[256]={
+const uint8_t i8085a_cpu_device::lut_cycles_8085[256]={
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0 */ 4, 10,7, 6, 4, 4, 7, 4, 10,10,7, 6, 4, 4, 7, 4,
/* 1 */ 7, 10,7, 6, 4, 4, 7, 4, 10,10,7, 6, 4, 4, 7, 4,
@@ -182,7 +182,7 @@ const device_type I8080A = &device_creator<i8080a_cpu_device>;
const device_type I8085A = &device_creator<i8085a_cpu_device>;
-i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, I8085A, "8085A", tag, owner, clock, "i8085a", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8, 0)
@@ -195,7 +195,7 @@ i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, const char *
}
-i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int cputype)
+i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int cputype)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8, 0)
@@ -208,13 +208,13 @@ i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, device_type
}
-i8080_cpu_device::i8080_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8080_cpu_device::i8080_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8085a_cpu_device(mconfig, I8080, "8080", tag, owner, clock, "i8080", __FILE__, CPUTYPE_8080)
{
}
-i8080a_cpu_device::i8080a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8080a_cpu_device::i8080a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8085a_cpu_device(mconfig, I8080A, "8080A", tag, owner, clock, "i8080a", __FILE__, CPUTYPE_8080)
{
}
@@ -250,7 +250,7 @@ void i8085a_cpu_device::set_inte(int state)
}
-void i8085a_cpu_device::set_status(UINT8 status)
+void i8085a_cpu_device::set_status(uint8_t status)
{
if (status != m_STATUS)
m_out_status_func(status);
@@ -259,9 +259,9 @@ void i8085a_cpu_device::set_status(UINT8 status)
}
-UINT8 i8085a_cpu_device::get_rim_value()
+uint8_t i8085a_cpu_device::get_rim_value()
{
- UINT8 result = m_IM;
+ uint8_t result = m_IM;
int sid = m_in_sid_func();
/* copy live RST5.5 and RST6.5 states */
@@ -290,20 +290,20 @@ void i8085a_cpu_device::break_halt_for_interrupt()
}
-UINT8 i8085a_cpu_device::ROP()
+uint8_t i8085a_cpu_device::ROP()
{
set_status(0xa2); // instruction fetch
return m_direct->read_byte(m_PC.w.l++);
}
-UINT8 i8085a_cpu_device::ARG()
+uint8_t i8085a_cpu_device::ARG()
{
return m_direct->read_byte(m_PC.w.l++);
}
-UINT16 i8085a_cpu_device::ARG16()
+uint16_t i8085a_cpu_device::ARG16()
{
- UINT16 w;
+ uint16_t w;
w = m_direct->read_byte(m_PC.d);
m_PC.w.l++;
w += m_direct->read_byte(m_PC.d) << 8;
@@ -311,13 +311,13 @@ UINT16 i8085a_cpu_device::ARG16()
return w;
}
-UINT8 i8085a_cpu_device::RM(UINT32 a)
+uint8_t i8085a_cpu_device::RM(uint32_t a)
{
set_status(0x82); // memory read
return m_program->read_byte(a);
}
-void i8085a_cpu_device::WM(UINT32 a, UINT8 v)
+void i8085a_cpu_device::WM(uint32_t a, uint8_t v)
{
set_status(0x00); // memory write
m_program->write_byte(a, v);
@@ -395,7 +395,7 @@ void i8085a_cpu_device::check_for_interrupts()
/* followed by classic INTR */
else if (m_irq_state[I8085_INTR_LINE] && (m_IM & IM_IE))
{
- UINT32 vector;
+ uint32_t vector;
/* break out of HALT state and call the IRQ ack callback */
break_halt_for_interrupt();
@@ -872,7 +872,7 @@ void i8085a_cpu_device::execute_run()
void i8085a_cpu_device::init_tables()
{
- UINT8 zs;
+ uint8_t zs;
int i, p;
for (i = 0; i < 256; i++)
{
@@ -1094,7 +1094,7 @@ void i8085a_cpu_device::execute_set_input(int irqline, int state)
}
-offs_t i8085a_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i8085a_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i8085 );
return CPU_DISASSEMBLE_NAME(i8085)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/i8085/i8085.h b/src/devices/cpu/i8085/i8085.h
index dfd1b8a9e02..c1e8c33e70b 100644
--- a/src/devices/cpu/i8085/i8085.h
+++ b/src/devices/cpu/i8085/i8085.h
@@ -53,8 +53,8 @@ class i8085a_cpu_device : public cpu_device
{
public:
// construction/destruction
- i8085a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int cputype);
+ i8085a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int cputype);
// static configuration helpers
template<class _Object> static devcb_base &set_out_status_func(device_t &device, _Object object) { return downcast<i8085a_cpu_device &>(device).m_out_status_func.set_callback(object); }
@@ -68,14 +68,14 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 4; }
- virtual UINT32 execute_max_cycles() const override { return 16; }
- virtual UINT32 execute_input_lines() const override { return 4; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xff; }
+ virtual uint32_t execute_min_cycles() const override { return 4; }
+ virtual uint32_t execute_max_cycles() const override { return 16; }
+ virtual uint32_t execute_input_lines() const override { return 4; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ); }
@@ -86,9 +86,9 @@ protected:
virtual void state_import(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 3; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 3; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -101,16 +101,16 @@ private:
int m_cputype; /* 0 8080, 1 8085A */
PAIR m_PC,m_SP,m_AF,m_BC,m_DE,m_HL,m_WZ;
- UINT8 m_HALT;
- UINT8 m_IM; /* interrupt mask (8085A only) */
- UINT8 m_STATUS; /* status word */
+ uint8_t m_HALT;
+ uint8_t m_IM; /* interrupt mask (8085A only) */
+ uint8_t m_STATUS; /* status word */
- UINT8 m_after_ei; /* post-EI processing; starts at 2, check for ints at 0 */
- UINT8 m_nmi_state; /* raw NMI line state */
- UINT8 m_irq_state[4]; /* raw IRQ line states */
- UINT8 m_trap_pending; /* TRAP interrupt latched? */
- UINT8 m_trap_im_copy; /* copy of IM register when TRAP was taken */
- UINT8 m_sod_state; /* state of the SOD line */
+ uint8_t m_after_ei; /* post-EI processing; starts at 2, check for ints at 0 */
+ uint8_t m_nmi_state; /* raw NMI line state */
+ uint8_t m_irq_state[4]; /* raw IRQ line states */
+ uint8_t m_trap_pending; /* TRAP interrupt latched? */
+ uint8_t m_trap_im_copy; /* copy of IM register when TRAP was taken */
+ uint8_t m_sod_state; /* state of the SOD line */
bool m_ietemp; /* import/export temp space */
@@ -120,23 +120,23 @@ private:
int m_icount;
/* cycles lookup */
- static const UINT8 lut_cycles_8080[256];
- static const UINT8 lut_cycles_8085[256];
- UINT8 lut_cycles[256];
+ static const uint8_t lut_cycles_8080[256];
+ static const uint8_t lut_cycles_8085[256];
+ uint8_t lut_cycles[256];
/* flags lookup */
- UINT8 ZS[256];
- UINT8 ZSP[256];
+ uint8_t ZS[256];
+ uint8_t ZSP[256];
void set_sod(int state);
void set_inte(int state);
- void set_status(UINT8 status);
- UINT8 get_rim_value();
+ void set_status(uint8_t status);
+ uint8_t get_rim_value();
void break_halt_for_interrupt();
- UINT8 ROP();
- UINT8 ARG();
- UINT16 ARG16();
- UINT8 RM(UINT32 a);
- void WM(UINT32 a, UINT8 v);
+ uint8_t ROP();
+ uint8_t ARG();
+ uint16_t ARG16();
+ uint8_t RM(uint32_t a);
+ void WM(uint32_t a, uint8_t v);
void check_for_interrupts();
void execute_one(int opcode);
void init_tables();
@@ -148,12 +148,12 @@ class i8080_cpu_device : public i8085a_cpu_device
{
public:
// construction/destruction
- i8080_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8080_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return clocks; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return cycles; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return clocks; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return cycles; }
};
@@ -161,12 +161,12 @@ class i8080a_cpu_device : public i8085a_cpu_device
{
public:
// construction/destruction
- i8080a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8080a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return clocks; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return cycles; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return clocks; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return cycles; }
};
diff --git a/src/devices/cpu/i8085/i8085cpu.h b/src/devices/cpu/i8085/i8085cpu.h
index 2f47c34f989..a41e96f06c7 100644
--- a/src/devices/cpu/i8085/i8085cpu.h
+++ b/src/devices/cpu/i8085/i8085cpu.h
@@ -66,11 +66,11 @@
/* logical */
#define M_ORA(R) m_AF.b.h|=R; m_AF.b.l=ZSP[m_AF.b.h]
#define M_XRA(R) m_AF.b.h^=R; m_AF.b.l=ZSP[m_AF.b.h]
-#define M_ANA(R) {UINT8 hc = ((m_AF.b.h | R)<<1) & HF; m_AF.b.h&=R; m_AF.b.l=ZSP[m_AF.b.h]; if(IS_8085()) { m_AF.b.l |= HF; } else {m_AF.b.l |= hc; } }
+#define M_ANA(R) {uint8_t hc = ((m_AF.b.h | R)<<1) & HF; m_AF.b.h&=R; m_AF.b.l=ZSP[m_AF.b.h]; if(IS_8085()) { m_AF.b.l |= HF; } else {m_AF.b.l |= hc; } }
/* increase / decrease */
-#define M_INR(R) {UINT8 hc = ((R & 0x0f) == 0x0f) ? HF : 0; ++R; m_AF.b.l= (m_AF.b.l & CF ) | ZSP[R] | hc; }
-#define M_DCR(R) {UINT8 hc = ((R & 0x0f) != 0x00) ? HF : 0; --R; m_AF.b.l= (m_AF.b.l & CF ) | ZSP[R] | hc | VF; }
+#define M_INR(R) {uint8_t hc = ((R & 0x0f) == 0x0f) ? HF : 0; ++R; m_AF.b.l= (m_AF.b.l & CF ) | ZSP[R] | hc; }
+#define M_DCR(R) {uint8_t hc = ((R & 0x0f) != 0x00) ? HF : 0; --R; m_AF.b.l= (m_AF.b.l & CF ) | ZSP[R] | hc | VF; }
/* arithmetic */
#define M_ADD(R) { \
@@ -162,7 +162,7 @@
{ \
if (cc) \
{ \
- UINT16 a = ARG16(); \
+ uint16_t a = ARG16(); \
m_icount -= (IS_8085()) ? 7 : 6 ; \
M_PUSH(PC); \
m_PC.d = a; \
diff --git a/src/devices/cpu/i8089/i8089.cpp b/src/devices/cpu/i8089/i8089.cpp
index b817e5d109d..2b20984c061 100644
--- a/src/devices/cpu/i8089/i8089.cpp
+++ b/src/devices/cpu/i8089/i8089.cpp
@@ -32,7 +32,7 @@ const device_type I8089 = &device_creator<i8089_device>;
// i8089_device - constructor
//-------------------------------------------------
-i8089_device::i8089_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+i8089_device::i8089_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
cpu_device(mconfig, I8089, "I8089", tag, owner, clock, "i8089", __FILE__),
m_icount(0),
m_ch1(*this, "1"),
@@ -148,7 +148,7 @@ const address_space_config *i8089_device::memory_space_config(address_spacenum s
// disasm_disassemble - disassembler
//-------------------------------------------------
-offs_t i8089_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i8089_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(i8089);
return CPU_DISASSEMBLE_NAME(i8089)(this, buffer, pc, oprom, opram, options);
@@ -243,8 +243,8 @@ void i8089_device::initialize()
m_sysbus = m_mem->read_byte(0xffff6);
// get system configuration block address
- UINT16 scb_offset = read_word(0, 0xffff8);
- UINT16 scb_segment = read_word(0, 0xffffa);
+ uint16_t scb_offset = read_word(0, 0xffff8);
+ uint16_t scb_segment = read_word(0, 0xffffa);
m_scb = ((scb_segment << 4) + scb_offset) & 0x0fffff;
// get system operation command
@@ -252,8 +252,8 @@ void i8089_device::initialize()
m_master = !m_sel;
// get control block address
- UINT16 cb_offset = read_word(0, m_scb + 2);
- UINT16 cb_segment = read_word(0, m_scb + 4);
+ uint16_t cb_offset = read_word(0, m_scb + 2);
+ uint16_t cb_segment = read_word(0, m_scb + 4);
offs_t cb_address = ((cb_segment << 4) + cb_offset) & 0x0fffff;
// initialize channels
@@ -261,7 +261,7 @@ void i8089_device::initialize()
m_ch2->set_reg(i8089_channel::CP, cb_address + 8);
// clear busy
- UINT16 ccw = read_word(0, cb_address);
+ uint16_t ccw = read_word(0, cb_address);
write_word(0, cb_address, ccw & 0x00ff);
// done
@@ -280,14 +280,14 @@ void i8089_device::initialize()
}
}
-UINT8 i8089_device::read_byte(bool space, offs_t address)
+uint8_t i8089_device::read_byte(bool space, offs_t address)
{
return (space ? m_io : m_mem)->read_byte(address);
}
-UINT16 i8089_device::read_word(bool space, offs_t address)
+uint16_t i8089_device::read_word(bool space, offs_t address)
{
- UINT16 data;
+ uint16_t data;
address_space *aspace = (space ? m_io : m_mem);
if (sysbus_width() && WORD_ALIGNED(address))
@@ -303,12 +303,12 @@ UINT16 i8089_device::read_word(bool space, offs_t address)
return data;
}
-void i8089_device::write_byte(bool space, offs_t address, UINT8 data)
+void i8089_device::write_byte(bool space, offs_t address, uint8_t data)
{
(space ? m_io : m_mem)->write_byte(address, data);
}
-void i8089_device::write_word(bool space, offs_t address, UINT16 data)
+void i8089_device::write_word(bool space, offs_t address, uint16_t data)
{
address_space *aspace = (space ? m_io : m_mem);
diff --git a/src/devices/cpu/i8089/i8089.h b/src/devices/cpu/i8089/i8089.h
index e4100b8fa94..0231f6c3b8a 100644
--- a/src/devices/cpu/i8089/i8089.h
+++ b/src/devices/cpu/i8089/i8089.h
@@ -44,14 +44,14 @@ class i8089_device : public cpu_device
public:
// construction/destruction
- i8089_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8089_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// callbacks
template<class _sintr1> void set_sintr1_callback(_sintr1 sintr1) { m_write_sintr1.set_callback(sintr1); }
template<class _sintr2> void set_sintr2_callback(_sintr2 sintr2) { m_write_sintr2.set_callback(sintr2); }
// static configuration helpers
- static void set_databus_width(device_t &device, UINT8 databus_width) { downcast<i8089_device &>(device).m_databus_width = databus_width; }
+ static void set_databus_width(device_t &device, uint8_t databus_width) { downcast<i8089_device &>(device).m_databus_width = databus_width; }
// input lines
DECLARE_WRITE_LINE_MEMBER( ca_w );
@@ -83,9 +83,9 @@ protected:
address_space_config m_io_config;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 7; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 7; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -98,10 +98,10 @@ private:
bool remotebus_width() const { return BIT(m_soc, 0); }
bool request_grant() const { return BIT(m_soc, 1); }
- UINT8 read_byte(bool space, offs_t address);
- UINT16 read_word(bool space, offs_t address);
- void write_byte(bool space, offs_t address, UINT8 data);
- void write_word(bool space, offs_t address, UINT16 data);
+ uint8_t read_byte(bool space, offs_t address);
+ uint16_t read_word(bool space, offs_t address);
+ void write_byte(bool space, offs_t address, uint8_t data);
+ void write_word(bool space, offs_t address, uint16_t data);
required_device<i8089_channel> m_ch1;
required_device<i8089_channel> m_ch2;
@@ -111,7 +111,7 @@ private:
void initialize();
- UINT8 m_databus_width;
+ uint8_t m_databus_width;
address_space *m_mem;
address_space *m_io;
@@ -134,9 +134,9 @@ private:
};
// system configuration
- UINT8 m_sysbus;
+ uint8_t m_sysbus;
offs_t m_scb;
- UINT8 m_soc;
+ uint8_t m_soc;
bool m_initialized;
bool m_master;
diff --git a/src/devices/cpu/i8089/i8089_channel.cpp b/src/devices/cpu/i8089/i8089_channel.cpp
index 932d59ff229..1b8d86d2b53 100644
--- a/src/devices/cpu/i8089/i8089_channel.cpp
+++ b/src/devices/cpu/i8089/i8089_channel.cpp
@@ -48,7 +48,7 @@ const device_type I8089_CHANNEL = &device_creator<i8089_channel>;
// i8089_channel - constructor
//-------------------------------------------------
-i8089_channel::i8089_channel(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+i8089_channel::i8089_channel(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, I8089_CHANNEL, "Intel 8089 I/O Channel", tag, owner, clock, "i8089_channel", __FILE__),
m_write_sintr(*this),
m_iop(nullptr),
@@ -109,7 +109,7 @@ void i8089_channel::device_reset()
// IMPLEMENTATION
//**************************************************************************
-void i8089_channel::set_reg(int reg, UINT32 value, int tag)
+void i8089_channel::set_reg(int reg, uint32_t value, int tag)
{
if((reg == BC) || (reg == IX) || (reg == CC) || (reg == MC))
{
@@ -141,27 +141,27 @@ int i8089_channel::chan_prio() { return m_prio; }
bool i8089_channel::chained() { return CC_CHAIN; }
bool i8089_channel::lock() { return CC_LOCK; }
-INT16 i8089_channel::displacement(int wb)
+int16_t i8089_channel::displacement(int wb)
{
- INT16 displacement = 0;
+ int16_t displacement = 0;
if (wb == 1)
{
- displacement = (INT16)((INT8)m_iop->read_byte(m_r[TP].t, m_r[TP].w));
+ displacement = (int16_t)((int8_t)m_iop->read_byte(m_r[TP].t, m_r[TP].w));
set_reg(TP, m_r[TP].w + 1);
}
else if (wb == 2)
{
- displacement = (INT16)m_iop->read_word(m_r[TP].t, m_r[TP].w);
+ displacement = (int16_t)m_iop->read_word(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 2);
}
return displacement;
}
-UINT32 i8089_channel::offset(int aa, int mm, int w)
+uint32_t i8089_channel::offset(int aa, int mm, int w)
{
- UINT32 offset = 0;
+ uint32_t offset = 0;
switch(aa)
{
case 0:
@@ -182,16 +182,16 @@ UINT32 i8089_channel::offset(int aa, int mm, int w)
return offset & 0xfffff;
}
-INT8 i8089_channel::imm8()
+int8_t i8089_channel::imm8()
{
- INT8 imm8 = (INT8)m_iop->read_byte(m_r[TP].t, m_r[TP].w);
+ int8_t imm8 = (int8_t)m_iop->read_byte(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 1);
return imm8;
}
-INT16 i8089_channel::imm16()
+int16_t i8089_channel::imm16()
{
- INT16 imm16 = (INT16)m_iop->read_word(m_r[TP].t, m_r[TP].w);
+ int16_t imm16 = (int16_t)m_iop->read_word(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 2);
return imm16;
}
@@ -414,12 +414,12 @@ int i8089_channel::execute_run()
m_prio = chained() ? PRIO_PROG_CHAIN : PRIO_PROG;
// fetch first two instruction bytes
- UINT16 op = m_iop->read_word(m_r[TP].t, m_r[TP].w);
+ uint16_t op = m_iop->read_word(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 2);
// extract parameters
- UINT8 params = op & 0xff;
- UINT8 opcode = (op >> 8) & 0xff;
+ uint8_t params = op & 0xff;
+ uint8_t opcode = (op >> 8) & 0xff;
int brp = (params >> 5) & 0x07;
int wb = (params >> 3) & 0x03;
@@ -431,8 +431,8 @@ int i8089_channel::execute_run()
// fix-up so we can use our register array
if (mm == BC) mm = PP;
- UINT32 o;
- UINT16 off, seg;
+ uint32_t o;
+ uint16_t off, seg;
switch (opc)
{
@@ -448,8 +448,8 @@ int i8089_channel::execute_run()
break;
case 0x02: // lpdi
- off = (UINT16)imm16();
- seg = (UINT16)imm16();
+ off = (uint16_t)imm16();
+ seg = (uint16_t)imm16();
lpdi(brp, seg, off);
break;
@@ -526,7 +526,7 @@ int i8089_channel::execute_run()
case 0x24: // mov(b) m, m
{
o = offset(aa, mm, w);
- UINT16 op2 = m_iop->read_word(m_r[TP].t, m_r[TP].w);
+ uint16_t op2 = m_iop->read_word(m_r[TP].t, m_r[TP].w);
set_reg(TP, m_r[TP].w + 2);
int mm2 = (op2 >> 8) & 0x03;
@@ -538,7 +538,7 @@ int i8089_channel::execute_run()
case 0x25: // tsl m, i, d
{
o = offset(aa, mm, w);
- INT8 i = imm8();
+ int8_t i = imm8();
tsl(mm, i, imm8(), o);
break;
}
@@ -676,7 +676,7 @@ int i8089_channel::execute_run()
return m_icount;
}
-void i8089_channel::examine_ccw(UINT8 ccw)
+void i8089_channel::examine_ccw(uint8_t ccw)
{
// priority and bus load limit, bit 7 and 5
m_r[PSW].w = (m_r[PSW].w & 0x5f) | (ccw & 0xa0);
@@ -701,7 +701,7 @@ void i8089_channel::examine_ccw(UINT8 ccw)
void i8089_channel::attention()
{
// examine control byte
- UINT8 ccw = m_iop->read_byte(m_r[CP].t, m_r[CP].w);
+ uint8_t ccw = m_iop->read_byte(m_r[CP].t, m_r[CP].w);
switch (ccw & 0x07)
{
@@ -729,7 +729,7 @@ void i8089_channel::attention()
lpd(PP, CP, m_r[CP].w + 2);
movp_pm(TP, PP, m_r[PP].w);
- movbi_mi(CP, (INT8) 0xff, m_r[CP].w + 1);
+ movbi_mi(CP, (int8_t) 0xff, m_r[CP].w + 1);
m_r[TP].t = 1;
m_r[PSW].w |= 1 << 2;
@@ -761,7 +761,7 @@ void i8089_channel::attention()
lpd(PP, CP, m_r[CP].w + 2);
lpd(TP, PP, m_r[PP].w);
- movbi_mi(CP, (INT8) 0xff, m_r[CP].w + 1);
+ movbi_mi(CP, (int8_t) 0xff, m_r[CP].w + 1);
m_r[PSW].w |= 1 << 2;
m_prio = chained() ? PRIO_PROG_CHAIN : PRIO_PROG;
@@ -790,7 +790,7 @@ void i8089_channel::attention()
// restore task pointer and parameter block
movp_pm(TP, PP, m_r[PP].w);
movb_rm(PSW, PP, m_r[PP].w + 3);
- movbi_mi(CP, (INT8) 0xff, m_r[CP].w + 1);
+ movbi_mi(CP, (int8_t) 0xff, m_r[CP].w + 1);
m_r[PSW].w |= 1 << 2;
m_prio = chained() ? PRIO_PROG_CHAIN : PRIO_PROG;
diff --git a/src/devices/cpu/i8089/i8089_channel.h b/src/devices/cpu/i8089/i8089_channel.h
index 569112e41e8..e95975c28c3 100644
--- a/src/devices/cpu/i8089/i8089_channel.h
+++ b/src/devices/cpu/i8089/i8089_channel.h
@@ -39,12 +39,12 @@ class i8089_channel : public device_t
{
public:
// construction/destruction
- i8089_channel(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8089_channel(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class _sintr> void set_sintr_callback(_sintr sintr) { m_write_sintr.set_callback(sintr); }
// set register
- void set_reg(int reg, UINT32 value, int tag = -1);
+ void set_reg(int reg, uint32_t value, int tag = -1);
int execute_run();
void attention();
@@ -83,7 +83,7 @@ public:
struct
{
- UINT32 w; // 20-bit address
+ uint32_t w; // 20-bit address
bool t; // tag-bit
}
m_r[11];
@@ -100,19 +100,19 @@ private:
void add_mr(int m, int r, int o);
void addb_rm(int r, int m, int o);
void addb_mr(int m, int r, int o);
- void addbi_ri(int r, INT8 i);
- void addbi_mi(int m, INT8 i, int o);
- void addi_ri(int r, INT16 i);
- void addi_mi(int m, INT16 i, int o);
+ void addbi_ri(int r, int8_t i);
+ void addbi_mi(int m, int8_t i, int o);
+ void addi_ri(int r, int16_t i);
+ void addi_mi(int m, int16_t i, int o);
void and_rm(int r, int m, int o);
void and_mr(int m, int r, int o);
void andb_rm(int r, int m, int o);
void andb_mr(int m, int r, int o);
- void andbi_ri(int r, INT8 i);
- void andbi_mi(int m, INT8 i, int o);
- void andi_ri(int r, INT16 i);
- void andi_mi(int m, INT16 i, int o);
- void call(int m, INT16 d, int o);
+ void andbi_ri(int r, int8_t i);
+ void andbi_mi(int m, int8_t i, int o);
+ void andi_ri(int r, int16_t i);
+ void andi_mi(int m, int16_t i, int o);
+ void call(int m, int16_t d, int o);
void clr(int m, int b, int o);
void dec_r(int r);
void dec_m(int m, int o);
@@ -121,16 +121,16 @@ private:
void inc_r(int r);
void inc_m(int m, int o);
void incb(int m, int o);
- void jbt(int m, int b, INT16 d, int o);
- void jmce(int m, INT16 d, int o);
- void jmcne(int m, INT16 d, int o);
- void jnbt(int m, int b, INT16 d, int o);
- void jnz_r(int r, INT16 d);
- void jnz_m(int m, INT16 d, int o);
- void jnzb(int m, INT16 d, int o);
- void jz_r(int r, INT16 d);
- void jz_m(int m, INT16 d, int o);
- void jzb(int m, INT16 d, int o);
+ void jbt(int m, int b, int16_t d, int o);
+ void jmce(int m, int16_t d, int o);
+ void jmcne(int m, int16_t d, int o);
+ void jnbt(int m, int b, int16_t d, int o);
+ void jnz_r(int r, int16_t d);
+ void jnz_m(int m, int16_t d, int o);
+ void jnzb(int m, int16_t d, int o);
+ void jz_r(int r, int16_t d);
+ void jz_m(int m, int16_t d, int o);
+ void jzb(int m, int16_t d, int o);
void lpd(int p, int m, int o);
void lpdi(int p, int s, int o);
void mov_mr(int m, int r, int o);
@@ -139,10 +139,10 @@ private:
void movb_mr(int m, int r, int o);
void movb_rm(int r, int m, int o);
void movb_mm(int m1, int m2, int o1, int o2);
- void movbi_ri(int r, INT8 i);
- void movbi_mi(int m, INT8 i, int o);
- void movi_ri(int r, INT16 i);
- void movi_mi(int m, INT16 i, int o);
+ void movbi_ri(int r, int8_t i);
+ void movbi_mi(int m, int8_t i, int o);
+ void movi_ri(int r, int16_t i);
+ void movi_mi(int m, int16_t i, int o);
void movp_mp(int m, int p, int o);
void movp_pm(int p, int m, int o);
void nop();
@@ -155,24 +155,24 @@ private:
void or_mr(int m, int r, int o);
void orb_rm(int r, int m, int o);
void orb_mr(int m, int r, int o);
- void orbi_ri(int r, INT8 i);
- void orbi_mi(int m, INT8 i, int o);
- void ori_ri(int r, INT16 i);
- void ori_mi(int m, INT16 i, int o);
+ void orbi_ri(int r, int8_t i);
+ void orbi_mi(int m, int8_t i, int o);
+ void ori_ri(int r, int16_t i);
+ void ori_mi(int m, int16_t i, int o);
void setb(int m, int b, int o);
void sintr();
- void tsl(int m, INT8 i, INT8 d, int o);
+ void tsl(int m, int8_t i, int8_t d, int o);
void wid(int s, int d);
void xfer();
void invalid(int opc);
// instruction fetch
- INT16 displacement(int wb);
- UINT32 offset(int aa, int mm, int w);
- INT8 imm8();
- INT16 imm16();
+ int16_t displacement(int wb);
+ uint32_t offset(int aa, int mm, int w);
+ int8_t imm8();
+ int16_t imm16();
- void examine_ccw(UINT8 ccw);
+ void examine_ccw(uint8_t ccw);
devcb_write_line m_write_sintr;
@@ -184,7 +184,7 @@ private:
void terminate_dma(int offset);
bool m_xfer_pending;
- UINT16 m_dma_value;
+ uint16_t m_dma_value;
int m_dma_state;
bool m_drq;
diff --git a/src/devices/cpu/i8089/i8089_dasm.cpp b/src/devices/cpu/i8089/i8089_dasm.cpp
index 2aa959485a3..ccfbadf2c58 100644
--- a/src/devices/cpu/i8089/i8089_dasm.cpp
+++ b/src/devices/cpu/i8089/i8089_dasm.cpp
@@ -13,7 +13,7 @@
class i8089_instruction
{
public:
- i8089_instruction(offs_t pc, const UINT8 *oprom) :
+ i8089_instruction(offs_t pc, const uint8_t *oprom) :
m_oprom(oprom), m_ppc(pc), m_pc(0), m_flags(DASMFLAG_SUPPORTED)
{
// instruction
@@ -37,7 +37,7 @@ public:
int flags() const { return m_flags; }
private:
- const UINT8 *m_oprom;
+ const uint8_t *m_oprom;
char m_buffer[256];
char m_offset[100];
@@ -72,23 +72,23 @@ private:
};
// fetch 1-byte value
- UINT8 fetch_value8()
+ uint8_t fetch_value8()
{
- UINT8 i = m_oprom[m_pc];
+ uint8_t i = m_oprom[m_pc];
m_pc += 1;
return i;
}
// fetch 2-byte value
- UINT16 fetch_value16()
+ uint16_t fetch_value16()
{
- UINT16 i = m_oprom[m_pc] | m_oprom[m_pc + 1] << 8;
+ uint16_t i = m_oprom[m_pc] | m_oprom[m_pc + 1] << 8;
m_pc += 2;
return i;
}
// fetch a 1 or 2 byte immediate value
- UINT16 fetch_immediate()
+ uint16_t fetch_immediate()
{
return (m_wb & 1) ? fetch_value8() : fetch_value16();
}
@@ -139,11 +139,11 @@ private:
// jump register
void inst_jr(const char *instr8, const char *instr16)
{
- UINT16 i = fetch_immediate();
+ uint16_t i = fetch_immediate();
if (m_mm == 0 && m_w == 0 && m_wb == 1)
- sprintf(m_buffer, "%s %s, %05x", instr8, m_reg[m_brp], m_ppc + m_pc + (INT8) i);
+ sprintf(m_buffer, "%s %s, %05x", instr8, m_reg[m_brp], m_ppc + m_pc + (int8_t) i);
else if (m_mm == 0 && m_w == 0 && m_wb == 2)
- sprintf(m_buffer, "%s %s, %05x", instr16, m_reg[m_brp], m_ppc + m_pc + (INT16) i);
+ sprintf(m_buffer, "%s %s, %05x", instr16, m_reg[m_brp], m_ppc + m_pc + (int16_t) i);
else
invalid();
}
@@ -171,11 +171,11 @@ private:
void inst_jm(const char *jump8short, const char *jump8long)
{
offset();
- UINT16 i = fetch_immediate();
+ uint16_t i = fetch_immediate();
if (m_w == 0 && m_wb == 1 && m_brp == 0)
- sprintf(m_buffer, "%s %s, %05x", jump8short, m_offset, m_ppc + m_pc + (INT8) i);
+ sprintf(m_buffer, "%s %s, %05x", jump8short, m_offset, m_ppc + m_pc + (int8_t) i);
else if (m_w == 0 && m_wb == 2 && m_brp == 0)
- sprintf(m_buffer, "%s %s, %05x", jump8long, m_offset, m_ppc + m_pc + (INT16) i);
+ sprintf(m_buffer, "%s %s, %05x", jump8long, m_offset, m_ppc + m_pc + (int16_t) i);
else
invalid();
}
@@ -184,11 +184,11 @@ private:
void inst_jmb(const char *jump8short, const char *jump8long)
{
offset();
- UINT16 i = fetch_immediate();
+ uint16_t i = fetch_immediate();
if (m_w == 0 && m_wb == 1)
- sprintf(m_buffer, "%s %s, %d, %05x", jump8short, m_offset, m_brp, m_ppc + m_pc + (INT8) i);
+ sprintf(m_buffer, "%s %s, %d, %05x", jump8short, m_offset, m_brp, m_ppc + m_pc + (int8_t) i);
else if (m_w == 0 && m_wb == 2)
- sprintf(m_buffer, "%s %s, %d, %05x", jump8long, m_offset, m_brp, m_ppc + m_pc + (INT16) i);
+ sprintf(m_buffer, "%s %s, %d, %05x", jump8long, m_offset, m_brp, m_ppc + m_pc + (int16_t) i);
else
invalid();
}
@@ -229,15 +229,15 @@ private:
void inst_j16(const char *jump8short, const char *jump16short, const char *jump8long, const char *jump16long)
{
offset();
- UINT16 i = fetch_immediate();
+ uint16_t i = fetch_immediate();
if (m_w == 0 && m_wb == 1)
- sprintf(m_buffer, "%s %s, %05x", jump8short, m_offset, m_ppc + m_pc + (INT8) i);
+ sprintf(m_buffer, "%s %s, %05x", jump8short, m_offset, m_ppc + m_pc + (int8_t) i);
else if (m_w == 1 && m_wb == 1)
- sprintf(m_buffer, "%s %s, %05x", jump16short, m_offset, m_ppc + m_pc + (INT8) i);
+ sprintf(m_buffer, "%s %s, %05x", jump16short, m_offset, m_ppc + m_pc + (int8_t) i);
else if (m_w == 0 && m_wb == 2)
- sprintf(m_buffer, "%s %s, %05x", jump8long, m_offset, m_ppc + m_pc + (INT16) i);
+ sprintf(m_buffer, "%s %s, %05x", jump8long, m_offset, m_ppc + m_pc + (int16_t) i);
else if (m_w == 1 && m_wb == 2)
- sprintf(m_buffer, "%s %s, %05x", jump16long, m_offset, m_ppc + m_pc + (INT16) i);
+ sprintf(m_buffer, "%s %s, %05x", jump16long, m_offset, m_ppc + m_pc + (int16_t) i);
else
invalid();
}
@@ -298,8 +298,8 @@ private:
case 0x02:
if (m_w == 1 && m_aa == 0 && m_wb == 2)
{
- UINT16 offs = fetch_immediate();
- UINT16 segm = fetch_immediate();
+ uint16_t offs = fetch_immediate();
+ uint16_t segm = fetch_immediate();
sprintf(m_buffer, "lpdi %s, %05x", m_reg[m_brp], ((segm << 4) + offs) & 0xfffff);
}
else
@@ -309,12 +309,12 @@ private:
case 0x08:
if (m_mm == 0)
{
- UINT16 i = fetch_immediate();
+ uint16_t i = fetch_immediate();
if (m_w == 0 && m_aa == 0 && m_wb == 1 && m_brp == TP)
- sprintf(m_buffer, "jmp %05x", m_ppc + m_pc + (INT8) i);
+ sprintf(m_buffer, "jmp %05x", m_ppc + m_pc + (int8_t) i);
else if (m_w == 1 && m_aa == 0 && m_wb == 2 && m_brp == TP)
- sprintf(m_buffer, "ljmp %05x", m_ppc + m_pc + (INT16) i);
+ sprintf(m_buffer, "ljmp %05x", m_ppc + m_pc + (int16_t) i);
else if (m_w == 0 && m_wb == 1)
sprintf(m_buffer, "addbi %s, %02x", m_reg[m_brp], i);
else if (m_w == 1 && m_wb == 2)
@@ -371,8 +371,8 @@ private:
if (m_w == 0 && m_wb == 3 && m_brp == 0)
{
offset();
- UINT16 i = fetch_immediate();
- int displacement = (INT8) fetch_immediate();
+ uint16_t i = fetch_immediate();
+ int displacement = (int8_t) fetch_immediate();
sprintf(m_buffer, "tsl %s, %02x, %05x", m_offset, i, m_ppc + m_pc + displacement);
}
else
@@ -385,12 +385,12 @@ private:
if (m_w == 1 && m_brp == TP && (m_wb == 1 || m_wb == 2))
{
offset();
- UINT16 i = fetch_immediate();
+ uint16_t i = fetch_immediate();
if (m_wb == 1)
- sprintf(m_buffer, "call %s, %05x", m_offset, m_ppc + m_pc + (INT8) i);
+ sprintf(m_buffer, "call %s, %05x", m_offset, m_ppc + m_pc + (int8_t) i);
else if (m_wb == 2)
- sprintf(m_buffer, "lcall %s, %05x", m_offset, m_ppc + m_pc + (INT16) i);
+ sprintf(m_buffer, "lcall %s, %05x", m_offset, m_ppc + m_pc + (int16_t) i);
m_flags |= DASMFLAG_STEP_OVER;
}
diff --git a/src/devices/cpu/i8089/i8089_ops.cpp b/src/devices/cpu/i8089/i8089_ops.cpp
index 09c8f5cd037..4b20052014e 100644
--- a/src/devices/cpu/i8089/i8089_ops.cpp
+++ b/src/devices/cpu/i8089/i8089_ops.cpp
@@ -13,8 +13,8 @@
#define UNIMPLEMENTED logerror("%s('%s'): unimplemented opcode: %s\n", shortname(), tag(), __FUNCTION__);
-#define LWR(m, o) ((INT16)m_iop->read_word(m_r[m].t, o))
-#define LBR(m, o) ((INT8)m_iop->read_byte(m_r[m].t, o))
+#define LWR(m, o) ((int16_t)m_iop->read_word(m_r[m].t, o))
+#define LBR(m, o) ((int8_t)m_iop->read_byte(m_r[m].t, o))
#define SWR(m, o, d) (m_iop->write_word(m_r[m].t, o, d))
#define SBR(m, o, d) (m_iop->write_byte(m_r[m].t, o, d))
@@ -38,22 +38,22 @@ void i8089_channel::addb_mr(int m, int r, int o)
SBR(m, o, LBR(m, o) + m_r[r].w);
}
-void i8089_channel::addbi_ri(int r, INT8 i)
+void i8089_channel::addbi_ri(int r, int8_t i)
{
set_reg(r, m_r[r].w + i);
}
-void i8089_channel::addbi_mi(int m, INT8 i, int o)
+void i8089_channel::addbi_mi(int m, int8_t i, int o)
{
SBR(m, o, LBR(m, o) + i);
}
-void i8089_channel::addi_ri(int r, INT16 i)
+void i8089_channel::addi_ri(int r, int16_t i)
{
set_reg(r, m_r[r].w + i);
}
-void i8089_channel::addi_mi(int m, INT16 i, int o)
+void i8089_channel::addi_mi(int m, int16_t i, int o)
{
SWR(m, o, LWR(m, o) + i);
}
@@ -70,7 +70,7 @@ void i8089_channel::and_mr(int m, int r, int o)
void i8089_channel::andb_rm(int r, int m, int o)
{
- set_reg(r, m_r[r].w & (INT16)LBR(m, o));
+ set_reg(r, m_r[r].w & (int16_t)LBR(m, o));
}
void i8089_channel::andb_mr(int m, int r, int o)
@@ -78,27 +78,27 @@ void i8089_channel::andb_mr(int m, int r, int o)
SBR(m, o, LBR(m, o) & m_r[r].w);
}
-void i8089_channel::andbi_ri(int r, INT8 i)
+void i8089_channel::andbi_ri(int r, int8_t i)
{
- set_reg(r, m_r[r].w & (INT16)i);
+ set_reg(r, m_r[r].w & (int16_t)i);
}
-void i8089_channel::andbi_mi(int m, INT8 i, int o)
+void i8089_channel::andbi_mi(int m, int8_t i, int o)
{
SBR(m, o, LBR(m, o) & i);
}
-void i8089_channel::andi_ri(int r, INT16 i)
+void i8089_channel::andi_ri(int r, int16_t i)
{
set_reg(r, m_r[r].w & i);
}
-void i8089_channel::andi_mi(int m, INT16 i, int o)
+void i8089_channel::andi_mi(int m, int16_t i, int o)
{
SWR(m, o, LWR(m, o) & i);
}
-void i8089_channel::call(int m, INT16 d, int o)
+void i8089_channel::call(int m, int16_t d, int o)
{
movp_mp(m, TP, o);
set_reg(TP, m_r[TP].w + d);
@@ -148,62 +148,62 @@ void i8089_channel::incb(int m, int o)
SBR(m, o, LBR(m, o) + 1);
}
-void i8089_channel::jbt(int m, int b, INT16 d, int o)
+void i8089_channel::jbt(int m, int b, int16_t d, int o)
{
if(LBR(m, o) & (1<<b))
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jmce(int m, INT16 d, int o)
+void i8089_channel::jmce(int m, int16_t d, int o)
{
if(!((LBR(m, o) ^ (m_r[MC].w & 0xff)) & (m_r[MC].w >> 8)))
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jmcne(int m, INT16 d, int o)
+void i8089_channel::jmcne(int m, int16_t d, int o)
{
if((LBR(m, o) ^ (m_r[MC].w & 0xff)) & (m_r[MC].w >> 8))
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jnbt(int m, int b, INT16 d, int o)
+void i8089_channel::jnbt(int m, int b, int16_t d, int o)
{
if(!(LBR(m, o) & (1<<b)))
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jnz_r(int r, INT16 d)
+void i8089_channel::jnz_r(int r, int16_t d)
{
m_icount += 5;
if(m_r[r].w & 0xffff)
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jnz_m(int m, INT16 d, int o)
+void i8089_channel::jnz_m(int m, int16_t d, int o)
{
if(LWR(m, o))
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jnzb(int m, INT16 d, int o)
+void i8089_channel::jnzb(int m, int16_t d, int o)
{
if(LBR(m, o))
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jz_r(int r, INT16 d)
+void i8089_channel::jz_r(int r, int16_t d)
{
if(!(m_r[r].w & 0xffff))
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jz_m(int m, INT16 d, int o)
+void i8089_channel::jz_m(int m, int16_t d, int o)
{
if(!LWR(m, o))
set_reg(TP, m_r[TP].w + d);
}
-void i8089_channel::jzb(int m, INT16 d, int o)
+void i8089_channel::jzb(int m, int16_t d, int o)
{
if(!LBR(m, o))
set_reg(TP, m_r[TP].w + d);
@@ -213,8 +213,8 @@ void i8089_channel::jzb(int m, INT16 d, int o)
// load pointer from memory
void i8089_channel::lpd(int p, int m, int o)
{
- UINT16 offset = m_iop->read_word(m_r[m].t, o);
- UINT16 segment = m_iop->read_word(m_r[m].t, o + 2);
+ uint16_t offset = m_iop->read_word(m_r[m].t, o);
+ uint16_t segment = m_iop->read_word(m_r[m].t, o + 2);
set_reg(p, ((segment << 4) + offset) & 0xfffff, 0);
}
@@ -232,7 +232,7 @@ void i8089_channel::mov_mr(int m, int r, int o)
void i8089_channel::mov_rm(int r, int m, int o)
{
- set_reg(r, (INT32)LWR(m, o), 1);
+ set_reg(r, (int32_t)LWR(m, o), 1);
}
void i8089_channel::mov_mm(int m1, int m2, int o1, int o2)
@@ -249,37 +249,37 @@ void i8089_channel::movb_mr(int m, int r, int o)
// move memory byte to register
void i8089_channel::movb_rm(int r, int m, int o)
{
- UINT8 byte = m_iop->read_byte(m_r[m].t, o);
+ uint8_t byte = m_iop->read_byte(m_r[m].t, o);
set_reg(r, (BIT(byte, 7) ? 0xfff00 : 0x00000) | byte, 1);
}
// move memory byte to memory byte
void i8089_channel::movb_mm(int m1, int m2, int o1, int o2)
{
- UINT8 byte = m_iop->read_byte(m_r[m1].t, o1);
+ uint8_t byte = m_iop->read_byte(m_r[m1].t, o1);
m_iop->write_byte(m_r[m2].t, o2, byte);
}
// move immediate byte to register
-void i8089_channel::movbi_ri(int r, INT8 i)
+void i8089_channel::movbi_ri(int r, int8_t i)
{
set_reg(r, (BIT(i, 7) ? 0xfff00 : 0x00000) | (i & 0xff), 1);
}
// move immediate byte to memory byte
-void i8089_channel::movbi_mi(int m, INT8 i, int o)
+void i8089_channel::movbi_mi(int m, int8_t i, int o)
{
m_iop->write_byte(m_r[m].t, o, i & 0xff);
}
// move immediate word to register
-void i8089_channel::movi_ri(int r, INT16 i)
+void i8089_channel::movi_ri(int r, int16_t i)
{
set_reg(r, (BIT(i, 15) ? 0xf0000 : 0x00000) | (i & 0xffff), 1);
}
// move immediate word to memory word
-void i8089_channel::movi_mi(int m, INT16 i, int o)
+void i8089_channel::movi_mi(int m, int16_t i, int o)
{
m_iop->write_word(m_r[m].t, o, (BIT(i, 15) ? 0xf0000 : 0x00000) | (i & 0xffff));
}
@@ -294,8 +294,8 @@ void i8089_channel::movp_mp(int m, int p, int o)
// move memory to pointer (restore)
void i8089_channel::movp_pm(int p, int m, int o)
{
- UINT16 offset = m_iop->read_word(m_r[m].t, o);
- UINT16 segment = m_iop->read_byte(m_r[m].t, o + 2);
+ uint16_t offset = m_iop->read_word(m_r[m].t, o);
+ uint16_t segment = m_iop->read_byte(m_r[m].t, o + 2);
set_reg(p, (((segment & 0xf0) << 12) + offset) & 0xfffff, segment >> 3 & 0x01);
}
@@ -317,7 +317,7 @@ void i8089_channel::not_m(int m, int o)
void i8089_channel::not_rm(int r, int m, int o)
{
- set_reg(r, ~(INT32)LWR(m, o));
+ set_reg(r, ~(int32_t)LWR(m, o));
}
void i8089_channel::notb_m(int m, int o)
@@ -327,7 +327,7 @@ void i8089_channel::notb_m(int m, int o)
void i8089_channel::notb_rm(int r, int m, int o)
{
- set_reg(r, ~(INT32)LBR(m, o));
+ set_reg(r, ~(int32_t)LBR(m, o));
}
void i8089_channel::or_rm(int r, int m, int o)
@@ -342,7 +342,7 @@ void i8089_channel::or_mr(int m, int r, int o)
void i8089_channel::orb_rm(int r, int m, int o)
{
- set_reg(r, m_r[r].w | (INT16)LBR(m, o));
+ set_reg(r, m_r[r].w | (int16_t)LBR(m, o));
}
void i8089_channel::orb_mr(int m, int r, int o)
@@ -350,22 +350,22 @@ void i8089_channel::orb_mr(int m, int r, int o)
SBR(m, o, LBR(m, o) | m_r[r].w);
}
-void i8089_channel::orbi_ri(int r, INT8 i)
+void i8089_channel::orbi_ri(int r, int8_t i)
{
- set_reg(r, m_r[r].w | (INT16)i);
+ set_reg(r, m_r[r].w | (int16_t)i);
}
-void i8089_channel::orbi_mi(int m, INT8 i, int o)
+void i8089_channel::orbi_mi(int m, int8_t i, int o)
{
SBR(m, o, LBR(m, o) | i);
}
-void i8089_channel::ori_ri(int r, INT16 i)
+void i8089_channel::ori_ri(int r, int16_t i)
{
set_reg(r, m_r[r].w | i);
}
-void i8089_channel::ori_mi(int m, INT16 i, int o)
+void i8089_channel::ori_mi(int m, int16_t i, int o)
{
SWR(m, o, LWR(m, o) | i);
}
@@ -386,7 +386,7 @@ void i8089_channel::sintr()
}
}
-void i8089_channel::tsl(int m, INT8 i, INT8 d, int o)
+void i8089_channel::tsl(int m, int8_t i, int8_t d, int o)
{
if(LBR(m, o))
set_reg(TP, m_r[TP].w + d);
diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp
index 00f3356f05d..9bfa8780c73 100644
--- a/src/devices/cpu/i86/i186.cpp
+++ b/src/devices/cpu/i86/i186.cpp
@@ -45,7 +45,7 @@
#define BYTE_WORD 0x0001
/* these come from the Intel 80186 datasheet */
-const UINT8 i80186_cpu_device::m_i80186_timing[] =
+const uint8_t i80186_cpu_device::m_i80186_timing[] =
{
45,28, /* exception, IRET */
0, 2, 4, 3, /* INTs */
@@ -120,7 +120,7 @@ const UINT8 i80186_cpu_device::m_i80186_timing[] =
const device_type I80186 = &device_creator<i80186_cpu_device>;
const device_type I80188 = &device_creator<i80188_cpu_device>;
-i80188_cpu_device::i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i80188_cpu_device::i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80186_cpu_device(mconfig, I80188, "I80188", tag, owner, clock, "i80188", __FILE__, 8)
{
memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
@@ -128,7 +128,7 @@ i80188_cpu_device::i80188_cpu_device(const machine_config &mconfig, const char *
static_set_irq_acknowledge_callback(*this, device_irq_acknowledge_delegate(FUNC(i80186_cpu_device::int_callback), this));
}
-i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8086_common_cpu_device(mconfig, I80186, "I80186", tag, owner, clock, "i80186", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 20, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 16, 16, 0)
@@ -142,7 +142,7 @@ i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, const char *
static_set_irq_acknowledge_callback(*this, device_irq_acknowledge_delegate(FUNC(i80186_cpu_device::int_callback), this));
}
-i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int data_bus_size)
+i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int data_bus_size)
: i8086_common_cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, data_bus_size, 20, 0)
, m_io_config("io", ENDIANNESS_LITTLE, data_bus_size, 16, 0)
@@ -153,16 +153,16 @@ i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type
{
}
-UINT8 i80186_cpu_device::fetch_op()
+uint8_t i80186_cpu_device::fetch_op()
{
- UINT8 data = m_direct->read_byte(pc(), m_fetch_xor);
+ uint8_t data = m_direct->read_byte(pc(), m_fetch_xor);
m_ip++;
return data;
}
-UINT8 i80186_cpu_device::fetch()
+uint8_t i80186_cpu_device::fetch()
{
- UINT8 data = m_direct->read_byte(pc(), m_fetch_xor);
+ uint8_t data = m_direct->read_byte(pc(), m_fetch_xor);
m_ip++;
return data;
}
@@ -228,13 +228,13 @@ void i80186_cpu_device::execute_run()
debugger_instruction_hook( this, pc() );
- UINT8 op = fetch_op();
+ uint8_t op = fetch_op();
switch(op)
{
case 0x60: // i_pusha
{
- UINT32 tmp = m_regs.w[SP];
+ uint32_t tmp = m_regs.w[SP];
PUSH(m_regs.w[AX]);
PUSH(m_regs.w[CX]);
@@ -262,7 +262,7 @@ void i80186_cpu_device::execute_run()
case 0x62: // i_bound
{
- UINT32 low,high,tmp;
+ uint32_t low,high,tmp;
m_modrm = fetch();
low = GetRMWord();
high = GetnextRMWord();
@@ -281,28 +281,28 @@ void i80186_cpu_device::execute_run()
case 0x69: // i_imul_d16
{
- UINT32 tmp;
+ uint32_t tmp;
DEF_r16w();
tmp = fetch_word();
- m_dst = (INT32)((INT16)m_src)*(INT32)((INT16)tmp);
- m_CarryVal = m_OverVal = (((INT32)m_dst) >> 15 != 0) && (((INT32)m_dst) >> 15 != -1);
+ m_dst = (int32_t)((int16_t)m_src)*(int32_t)((int16_t)tmp);
+ m_CarryVal = m_OverVal = (((int32_t)m_dst) >> 15 != 0) && (((int32_t)m_dst) >> 15 != -1);
RegWord(m_dst);
CLKM(IMUL_RRI16, IMUL_RMI16);
}
break;
case 0x6a: // i_push_d8
- PUSH( (UINT16)((INT16)((INT8)fetch())) );
+ PUSH( (uint16_t)((int16_t)((int8_t)fetch())) );
CLK(PUSH_IMM);
break;
case 0x6b: // i_imul_d8
{
- UINT32 src2;
+ uint32_t src2;
DEF_r16w();
- src2= (UINT16)((INT16)((INT8)fetch()));
- m_dst = (INT32)((INT16)m_src)*(INT32)((INT16)src2);
- m_CarryVal = m_OverVal = (((INT32)m_dst) >> 15 != 0) && (((INT32)m_dst) >> 15 != -1);
+ src2= (uint16_t)((int16_t)((int8_t)fetch()));
+ m_dst = (int32_t)((int16_t)m_src)*(int32_t)((int16_t)src2);
+ m_CarryVal = m_OverVal = (((int32_t)m_dst) >> 15 != 0) && (((int32_t)m_dst) >> 15 != -1);
RegWord(m_dst);
CLKM(IMUL_RRI8, IMUL_RMI8);
}
@@ -350,7 +350,7 @@ void i80186_cpu_device::execute_run()
case 0xc0: // i_rotshft_bd8
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMByte();
m_dst = m_src;
@@ -376,7 +376,7 @@ void i80186_cpu_device::execute_run()
case 0xc1: // i_rotshft_wd8
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMWord();
m_dst = m_src;
@@ -402,8 +402,8 @@ void i80186_cpu_device::execute_run()
case 0xc8: // i_enter
{
- UINT16 nb = fetch();
- UINT32 level;
+ uint16_t nb = fetch();
+ uint32_t level;
nb |= fetch() << 8;
level = fetch();
@@ -432,7 +432,7 @@ void i80186_cpu_device::execute_run()
case 0xd2: // i_rotshft_bcl
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMByte();
@@ -459,7 +459,7 @@ void i80186_cpu_device::execute_run()
case 0xd3: // i_rotshft_wcl
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMWord();
@@ -510,8 +510,8 @@ void i80186_cpu_device::execute_run()
case 0xf3:
{
bool pass = false;
- UINT8 next = repx_op();
- UINT16 c = m_regs.w[CX];
+ uint8_t next = repx_op();
+ uint16_t c = m_regs.w[CX];
switch (next)
{
@@ -653,23 +653,23 @@ void i80186_cpu_device::device_reset()
}
}
-UINT8 i80186_cpu_device::read_port_byte(UINT16 port)
+uint8_t i80186_cpu_device::read_port_byte(uint16_t port)
{
if(!(m_reloc & 0x1000) && (port >> 8) == (m_reloc & 0xff))
{
- UINT16 ret = internal_port_r(*m_io, (port >> 1) - ((m_reloc & 0xff) << 7), (port & 1) ? 0xff00 : 0x00ff);
+ uint16_t ret = internal_port_r(*m_io, (port >> 1) - ((m_reloc & 0xff) << 7), (port & 1) ? 0xff00 : 0x00ff);
return (port & 1) ? (ret >> 8) : (ret & 0xff);
}
return m_io->read_byte(port);
}
-UINT16 i80186_cpu_device::read_port_word(UINT16 port)
+uint16_t i80186_cpu_device::read_port_word(uint16_t port)
{
if(!(m_reloc & 0x1000) && (port >> 8) == (m_reloc & 0xff))
{
if(port & 1)
{
- UINT8 low = read_port_byte(port);
+ uint8_t low = read_port_byte(port);
return read_port_byte(port + 1) << 8 | low;
}
return internal_port_r(*m_io, (port >> 1) - ((m_reloc & 0xff) << 7));
@@ -677,7 +677,7 @@ UINT16 i80186_cpu_device::read_port_word(UINT16 port)
return m_io->read_word_unaligned(port);
}
-void i80186_cpu_device::write_port_byte(UINT16 port, UINT8 data)
+void i80186_cpu_device::write_port_byte(uint16_t port, uint8_t data)
{
if(!(m_reloc & 0x1000) && (port >> 8) == (m_reloc & 0xff))
internal_port_w(*m_io, (port >> 1) - ((m_reloc & 0xff) << 7), (port & 1) ? (data << 8) : data, (port & 1) ? 0xff00 : 0x00ff);
@@ -685,7 +685,7 @@ void i80186_cpu_device::write_port_byte(UINT16 port, UINT8 data)
m_io->write_byte(port, data);
}
-void i80186_cpu_device::write_port_word(UINT16 port, UINT16 data)
+void i80186_cpu_device::write_port_word(uint16_t port, uint16_t data)
{
if(!(m_reloc & 0x1000) && (port >> 8) == (m_reloc & 0xff))
{
@@ -708,9 +708,9 @@ void i80186_cpu_device::write_port_word(UINT16 port, UINT16 data)
*************************************/
IRQ_CALLBACK_MEMBER(i80186_cpu_device::int_callback)
{
- UINT8 vector;
- UINT16 old;
- UINT16 oldreq;
+ uint8_t vector;
+ uint16_t old;
+ uint16_t oldreq;
if (LOG_INTERRUPTS)
logerror("(%f) **** Acknowledged interrupt vector %02X\n", machine().time().as_double(), m_intr.poll_status & 0x1f);
@@ -943,7 +943,7 @@ void i80186_cpu_device::handle_eoi(int data)
}
/* Trigger an external interrupt, optionally supplying the vector to take */
-void i80186_cpu_device::external_int(UINT16 intno, int state)
+void i80186_cpu_device::external_int(uint16_t intno, int state)
{
if (!(m_intr.ext_state & (1 << intno)) == !state)
return;
@@ -1135,7 +1135,7 @@ void i80186_cpu_device::internal_timer_update(int which, int new_count, int new_
if (new_control != -1)
{
int diff;
- UINT16 resbits = (which == 2) ? 0x1fde : 0x1fc0;
+ uint16_t resbits = (which == 2) ? 0x1fde : 0x1fc0;
/* merge back in the bits we don't modify */
new_control = (new_control & ~resbits) | (t->control & resbits);
@@ -1231,9 +1231,9 @@ void i80186_cpu_device::drq_callback(int which)
{
dma_state *dma = &m_dma[which];
- UINT16 dma_word;
- UINT8 dma_byte;
- UINT8 incdec_size;
+ uint16_t dma_word;
+ uint8_t dma_byte;
+ uint8_t incdec_size;
if (LOG_DMA>1)
logerror("Control=%04X, src=%05X, dest=%05X, count=%04X\n",dma->control,dma->source,dma->dest,dma->count);
@@ -1693,8 +1693,8 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X\n", pc(), data);
if ((data & 0x1fff) != (m_reloc & 0x1fff))
{
- UINT32 newmap = (data & 0xfff) << 8;
- UINT32 oldmap = (m_reloc & 0xfff) << 8;
+ uint32_t newmap = (data & 0xfff) << 8;
+ uint32_t oldmap = (m_reloc & 0xfff) << 8;
if (!(data & 0x1000) || ((data & 0x1000) && (m_reloc & 0x1000)))
m_program->unmap_readwrite(oldmap, oldmap + 0xff);
if (data & 0x1000) // TODO: make work with 80188 if needed
diff --git a/src/devices/cpu/i86/i186.h b/src/devices/cpu/i86/i186.h
index cff4c9f8606..bfc4f14cb07 100644
--- a/src/devices/cpu/i86/i186.h
+++ b/src/devices/cpu/i86/i186.h
@@ -13,8 +13,8 @@ class i80186_cpu_device : public i8086_common_cpu_device
{
public:
// construction/destruction
- i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- i80186_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int data_bus_size);
+ i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i80186_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int data_bus_size);
template<class _Object> static devcb_base &static_set_read_slave_ack_callback(device_t &device, _Object object) { return downcast<i80186_cpu_device &>(device).m_read_slave_ack_func.set_callback(object); }
template<class _Object> static devcb_base &static_set_chip_select_callback(device_t &device, _Object object) { return downcast<i80186_cpu_device &>(device).m_out_chip_select_func.set_callback(object); }
@@ -36,28 +36,28 @@ public:
protected:
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks / 2); }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks / 2); }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); }
virtual void execute_run() override;
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT8 fetch_op() override;
- virtual UINT8 fetch() override;
- UINT32 pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint8_t fetch_op() override;
+ virtual uint8_t fetch() override;
+ uint32_t pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
- virtual UINT8 read_port_byte(UINT16 port) override;
- virtual UINT16 read_port_word(UINT16 port) override;
- virtual void write_port_byte(UINT16 port, UINT8 data) override;
- virtual void write_port_word(UINT16 port, UINT16 data) override;
+ virtual uint8_t read_port_byte(uint16_t port) override;
+ virtual uint16_t read_port_word(uint16_t port) override;
+ virtual void write_port_byte(uint16_t port, uint8_t data) override;
+ virtual void write_port_word(uint16_t port, uint16_t data) override;
- static const UINT8 m_i80186_timing[200];
+ static const uint8_t m_i80186_timing[200];
private:
void update_interrupt_state();
void handle_eoi(int data);
- void external_int(UINT16 intno, int state);
+ void external_int(uint16_t intno, int state);
void internal_timer_sync(int which);
void internal_timer_update(int which, int new_count, int new_maxA, int new_maxB, int new_control);
void update_dma_control(int which, int new_control);
@@ -68,45 +68,45 @@ private:
struct mem_state
{
- UINT16 lower;
- UINT16 upper;
- UINT16 middle;
- UINT16 middle_size;
- UINT16 peripheral;
+ uint16_t lower;
+ uint16_t upper;
+ uint16_t middle;
+ uint16_t middle_size;
+ uint16_t peripheral;
};
struct timer_state
{
- UINT16 control;
- UINT16 maxA;
- UINT16 maxB;
+ uint16_t control;
+ uint16_t maxA;
+ uint16_t maxB;
bool active_count;
- UINT16 count;
+ uint16_t count;
emu_timer *int_timer;
};
struct dma_state
{
bool drq_state;
- UINT32 source;
- UINT32 dest;
- UINT16 count;
- UINT16 control;
+ uint32_t source;
+ uint32_t dest;
+ uint16_t count;
+ uint16_t control;
};
struct intr_state
{
- UINT8 pending;
- UINT16 ack_mask;
- UINT16 priority_mask;
- UINT16 in_service;
- UINT16 request;
- UINT16 status;
- UINT16 poll_status;
- UINT16 timer;
- UINT16 dma[2];
- UINT16 ext[4];
- UINT8 ext_state;
+ uint8_t pending;
+ uint16_t ack_mask;
+ uint16_t priority_mask;
+ uint16_t in_service;
+ uint16_t request;
+ uint16_t status;
+ uint16_t poll_status;
+ uint16_t timer;
+ uint16_t dma[2];
+ uint16_t ext[4];
+ uint8_t ext_state;
};
timer_state m_timer[3];
@@ -118,7 +118,7 @@ private:
static const device_timer_id TIMER_INT1 = 1;
static const device_timer_id TIMER_INT2 = 2;
- UINT16 m_reloc;
+ uint16_t m_reloc;
address_space_config m_program_config;
address_space_config m_io_config;
@@ -133,7 +133,7 @@ class i80188_cpu_device : public i80186_cpu_device
{
public:
// construction/destruction
- i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i80188_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
#define MCFG_80186_IRQ_SLAVE_ACK(_devcb) \
diff --git a/src/devices/cpu/i86/i286.cpp b/src/devices/cpu/i86/i286.cpp
index d7743897d35..e6358a2f88b 100644
--- a/src/devices/cpu/i86/i286.cpp
+++ b/src/devices/cpu/i86/i286.cpp
@@ -92,7 +92,7 @@
/* these come from the 80286 timings in OPCODE.LST */
/* many of these numbers are suspect TODO: add protmode insns*/
-const UINT8 i80286_cpu_device::m_i80286_timing[] =
+const uint8_t i80286_cpu_device::m_i80286_timing[] =
{
23,17, /* exception, IRET */
0, 2, 3, 1, /* INTs */
@@ -166,7 +166,7 @@ const UINT8 i80286_cpu_device::m_i80286_timing[] =
const device_type I80286 = &device_creator<i80286_cpu_device>;
-i80286_cpu_device::i80286_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i80286_cpu_device::i80286_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8086_common_cpu_device(mconfig, I80286, "I80286", tag, owner, clock, "i80286", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 16, 16, 0)
@@ -289,7 +289,7 @@ void i80286_cpu_device::state_string_export(const device_state_entry &entry, std
case STATE_GENFLAGS:
{
- UINT16 flags = CompressFlags();
+ uint16_t flags = CompressFlags();
str = string_format("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
flags & 0x8000 ? '0':'.',
flags & 0x4000 ? 'N':'.',
@@ -353,10 +353,10 @@ void i80286_cpu_device::execute_set_input(int inptnum, int state)
// of the nvram. if yes, after init, it sets the stack pointer to the value in 0040:0067
// in the bios data segment then pops es and ds off that stack, does popa then a far ret.
-void i80286_cpu_device::trap(UINT32 error)
+void i80286_cpu_device::trap(uint32_t error)
{
int error_code = error & 0xffff;
- UINT16 number = error >> 16;
+ uint16_t number = error >> 16;
if(error_code == 0xffff)
error_code = -1;
m_ip = m_prev_ip;
@@ -383,7 +383,7 @@ void i80286_cpu_device::trap(UINT32 error)
interrupt_descriptor(number,1,-1);
}
}
- catch(UINT32 e)
+ catch(uint32_t e)
{
trap(e);
}
@@ -395,10 +395,10 @@ void i80286_cpu_device::trap(UINT32 error)
m_trap_level = 0;
}
-UINT32 i80286_cpu_device::selector_address(UINT16 sel)
+uint32_t i80286_cpu_device::selector_address(uint16_t sel)
{
- UINT32 base;
- UINT16 limit;
+ uint32_t base;
+ uint16_t limit;
if(TBL(sel))
{
base = m_ldtr.base;
@@ -412,7 +412,7 @@ UINT32 i80286_cpu_device::selector_address(UINT16 sel)
return ((IDX(sel) >= limit) || !IDXTBL(sel) ? -1 : base + IDX(sel));
}
-int i80286_cpu_device::verify(UINT16 selector, int operation, UINT8 rights, bool valid)
+int i80286_cpu_device::verify(uint16_t selector, int operation, uint8_t rights, bool valid)
{
if(!IDXTBL(selector) && !valid)
return FAULT_GP;
@@ -439,7 +439,7 @@ int i80286_cpu_device::verify(UINT16 selector, int operation, UINT8 rights, bool
void i80286_cpu_device::pop_seg(int reg)
{
- UINT16 sel;
+ uint16_t sel;
if(PM)
check_permission(SS, m_regs.w[SP], 2, I8086_READ);
sel = read_word(m_base[SS] + m_regs.w[SP]);
@@ -447,13 +447,13 @@ void i80286_cpu_device::pop_seg(int reg)
m_regs.w[SP] += 2;
}
-void i80286_cpu_device::data_descriptor(int reg, UINT16 selector, int cpl, UINT32 trap, UINT16 offset, int size)
+void i80286_cpu_device::data_descriptor(int reg, uint16_t selector, int cpl, uint32_t trap, uint16_t offset, int size)
{
if(PM)
{
- UINT16 desc[3];
- UINT8 r;
- UINT32 addr;
+ uint16_t desc[3];
+ uint8_t r;
+ uint32_t addr;
if((reg != SS) && !IDXTBL(selector))
{
m_sregs[reg] = 0;
@@ -522,16 +522,16 @@ void i80286_cpu_device::data_descriptor(int reg, UINT16 selector, int cpl, UINT3
m_valid[reg] = 1;
}
-void i80286_cpu_device::data_descriptor(int reg, UINT16 selector)
+void i80286_cpu_device::data_descriptor(int reg, uint16_t selector)
{
data_descriptor(reg, selector, CPL, TRAP(FAULT_GP,IDXTBL(selector)));
}
-void i80286_cpu_device::switch_task(UINT16 ntask, int type)
+void i80286_cpu_device::switch_task(uint16_t ntask, int type)
{
- UINT16 ndesc[3], desc[3], ntss[22], otss[22], flags;
- UINT8 r, lr;
- UINT32 naddr, oaddr, ldtaddr;
+ uint16_t ndesc[3], desc[3], ntss[22], otss[22], flags;
+ uint8_t r, lr;
+ uint32_t naddr, oaddr, ldtaddr;
int i;
logerror("i286: %06x This program uses TSSs, how rare. Please report this to the developers.\n", pc());
@@ -658,7 +658,7 @@ void i80286_cpu_device::switch_task(UINT16 ntask, int type)
{
code_descriptor(ntss[TSS_CS], ntss[TSS_IP], 0);
}
- catch (UINT32 e)
+ catch (uint32_t e)
{
int error_code = e & 0xffff;
if(error_code == FAULT_GP)
@@ -670,13 +670,13 @@ void i80286_cpu_device::switch_task(UINT16 ntask, int type)
data_descriptor(DS, ntss[TSS_DS], CPL, TRAP(FAULT_TS, IDXTBL(ntss[TSS_DS])));
}
-void i80286_cpu_device::code_descriptor(UINT16 selector, UINT16 offset, int gate)
+void i80286_cpu_device::code_descriptor(uint16_t selector, uint16_t offset, int gate)
{
if(PM)
{
- UINT16 desc[3];
- UINT8 r;
- UINT32 addr;
+ uint16_t desc[3];
+ uint8_t r;
+ uint32_t addr;
if((addr = selector_address(selector)) == -1)
throw TRAP(FAULT_GP, IDXTBL(selector));
@@ -715,7 +715,7 @@ void i80286_cpu_device::code_descriptor(UINT16 selector, UINT16 offset, int gate
}
else
{ // systemdescriptor
- UINT16 gatesel = GATESEL(desc);
+ uint16_t gatesel = GATESEL(desc);
if(!gate)
throw TRAP(FAULT_GP, IDXTBL(selector)); // tss cs must be segment
@@ -728,7 +728,7 @@ void i80286_cpu_device::code_descriptor(UINT16 selector, UINT16 offset, int gate
{
case CALLGATE:
{
- UINT16 gatedesc[3];
+ uint16_t gatedesc[3];
if((addr = selector_address(gatesel)) == -1)
throw TRAP(FAULT_GP, IDXTBL(gatesel));
@@ -750,8 +750,8 @@ void i80286_cpu_device::code_descriptor(UINT16 selector, UINT16 offset, int gate
if (!CONF(r) && (DPL(r) < CPL))
{
// inner call
- UINT16 tss_ss, tss_sp, oldss, oldsp;
- UINT32 oldstk;
+ uint16_t tss_ss, tss_sp, oldss, oldsp;
+ uint32_t oldstk;
int i;
if(gate == NT_JMP)
throw TRAP(FAULT_GP, IDXTBL(gatesel)); // can't jmp to inner
@@ -814,8 +814,8 @@ void i80286_cpu_device::code_descriptor(UINT16 selector, UINT16 offset, int gate
void i80286_cpu_device::interrupt_descriptor(int number, int hwint, int error)
{
- UINT16 desc[3], gatesel, flags = CompressFlags();
- UINT8 r;
+ uint16_t desc[3], gatesel, flags = CompressFlags();
+ uint8_t r;
hwint = hwint ? 1 : 0;
if(number == -1)
@@ -832,8 +832,8 @@ void i80286_cpu_device::interrupt_descriptor(int number, int hwint, int error)
PUSH(flags & ~0xf000);
m_TF = m_IF = 0;
- UINT16 dest_off = read_word(number * 4 + 0);
- UINT16 dest_seg = read_word(number * 4 + 2);
+ uint16_t dest_off = read_word(number * 4 + 0);
+ uint16_t dest_seg = read_word(number * 4 + 2);
PUSH(m_sregs[CS]);
PUSH(m_ip);
@@ -862,7 +862,7 @@ void i80286_cpu_device::interrupt_descriptor(int number, int hwint, int error)
{
switch_task(gatesel, NT_CALL);
}
- catch (UINT32 e)
+ catch (uint32_t e)
{
throw e + hwint;
}
@@ -874,8 +874,8 @@ void i80286_cpu_device::interrupt_descriptor(int number, int hwint, int error)
case INTGATE:
case TRAPGATE:
{
- UINT16 gatedesc[3];
- UINT32 addr;
+ uint16_t gatedesc[3];
+ uint32_t addr;
if((addr = selector_address(gatesel)) == -1)
throw TRAP(FAULT_GP, (IDXTBL(gatesel) + hwint));
@@ -896,7 +896,7 @@ void i80286_cpu_device::interrupt_descriptor(int number, int hwint, int error)
if(!CONF(r) && (DPL(r) < CPL))
{
// inner call
- UINT16 tss_ss, tss_sp, oldss, oldsp;
+ uint16_t tss_ss, tss_sp, oldss, oldsp;
tss_ss = read_word(m_tr.base + TSS_SS0 * 2 + (DPL(r) * 4));
tss_sp = read_word(m_tr.base + TSS_SP0 * 2 + (DPL(r) * 4));
@@ -933,37 +933,37 @@ void i80286_cpu_device::interrupt_descriptor(int number, int hwint, int error)
}
}
-UINT8 i80286_cpu_device::read_port_byte(UINT16 port)
+uint8_t i80286_cpu_device::read_port_byte(uint16_t port)
{
if(PM && (CPL > m_IOPL))
throw TRAP(FAULT_GP, 0);
return m_io->read_byte(port);
}
-UINT16 i80286_cpu_device::read_port_word(UINT16 port)
+uint16_t i80286_cpu_device::read_port_word(uint16_t port)
{
if(PM && (CPL > m_IOPL))
throw TRAP(FAULT_GP, 0);
return m_io->read_word_unaligned(port);
}
-void i80286_cpu_device::write_port_byte(UINT16 port, UINT8 data)
+void i80286_cpu_device::write_port_byte(uint16_t port, uint8_t data)
{
if(PM && (CPL > m_IOPL))
throw TRAP(FAULT_GP, 0);
m_io->write_byte(port, data);
}
-void i80286_cpu_device::write_port_word(UINT16 port, UINT16 data)
+void i80286_cpu_device::write_port_word(uint16_t port, uint16_t data)
{
if(PM && (CPL > m_IOPL))
throw TRAP(FAULT_GP, 0);
m_io->write_word_unaligned(port, data);
}
-UINT8 i80286_cpu_device::fetch_op()
+uint8_t i80286_cpu_device::fetch_op()
{
- UINT8 data;
+ uint8_t data;
if(m_ip > m_limit[CS])
throw TRAP(FAULT_GP, 0);
@@ -972,9 +972,9 @@ UINT8 i80286_cpu_device::fetch_op()
return data;
}
-UINT8 i80286_cpu_device::fetch()
+uint8_t i80286_cpu_device::fetch()
{
- UINT8 data;
+ uint8_t data;
if(m_ip > m_limit[CS])
throw TRAP(FAULT_GP, 0);
@@ -983,7 +983,7 @@ UINT8 i80286_cpu_device::fetch()
return data;
}
-UINT32 i80286_cpu_device::calc_addr(int seg, UINT16 offset, int size, int op, bool override)
+uint32_t i80286_cpu_device::calc_addr(int seg, uint16_t offset, int size, int op, bool override)
{
seg = (m_seg_prefix && (seg==DS || seg==SS) && override) ? m_prefix_seg : seg;
if(op != I8086_NONE)
@@ -1055,7 +1055,7 @@ void i80286_cpu_device::execute_run()
debugger_instruction_hook( this, pc() & m_amask );
- UINT8 op = fetch_op();
+ uint8_t op = fetch_op();
switch(op)
{
@@ -1067,15 +1067,15 @@ void i80286_cpu_device::execute_run()
case 0x0f:
{
unsigned next = fetch_op();
- UINT16 desc[3], tmp, msw, sel;
- UINT8 r;
- UINT32 addr;
+ uint16_t desc[3], tmp, msw, sel;
+ uint8_t r;
+ uint32_t addr;
switch (next)
{
case 0:
if(!PM)
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
m_modrm = fetch();
switch (m_modrm & 0x38)
{
@@ -1168,15 +1168,15 @@ void i80286_cpu_device::execute_run()
break;
default:
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
}
break;
case 1:
{
- UINT32 ea;
+ uint32_t ea;
m_modrm = fetch();
if((m_modrm >= 0xc0) && (m_modrm < 0xe0))
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
switch (m_modrm & 0x38)
{
case 0: /* sgdt */
@@ -1215,13 +1215,13 @@ void i80286_cpu_device::execute_run()
m_msw = (m_msw & 1) | msw;
break;
default:
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
}
break;
}
case 2: /* LAR */
if(!PM)
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
m_modrm = fetch_op();
tmp = GetRMWord();
if((addr = selector_address(tmp)) == -1)
@@ -1244,7 +1244,7 @@ void i80286_cpu_device::execute_run()
break;
case 3: /* LSL */
if(!PM)
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
m_modrm = fetch_op();
tmp = GetRMWord();
if((addr = selector_address(tmp)) == -1)
@@ -1309,7 +1309,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
m_msw &= ~8;
break;
default:
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
}
break;
}
@@ -1333,7 +1333,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0x60: // i_pusha
{
check_permission(SS, m_regs.w[SP]-16, 16, I8086_WRITE);
- UINT32 tmp = m_regs.w[SP];
+ uint32_t tmp = m_regs.w[SP];
PUSH(m_regs.w[AX]);
PUSH(m_regs.w[CX]);
PUSH(m_regs.w[DX]);
@@ -1361,7 +1361,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0x62: // i_bound
{
- UINT32 low,high,tmp;
+ uint32_t low,high,tmp;
m_modrm = fetch();
low = GetRMWord();
high = GetnextRMWord();
@@ -1375,8 +1375,8 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0x63: // arpl
{
- UINT16 tmp, source;
- if (!PM) throw TRAP(FAULT_UD,(UINT16)-1);
+ uint16_t tmp, source;
+ if (!PM) throw TRAP(FAULT_UD,(uint16_t)-1);
m_modrm=fetch_op();
tmp=GetRMWord();
@@ -1399,28 +1399,28 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0x69: // i_imul_d16
{
- UINT32 tmp;
+ uint32_t tmp;
DEF_r16w();
tmp = fetch_word();
- m_dst = (INT32)((INT16)m_src)*(INT32)((INT16)tmp);
- m_CarryVal = m_OverVal = (((INT32)m_dst) >> 15 != 0) && (((INT32)m_dst) >> 15 != -1);
+ m_dst = (int32_t)((int16_t)m_src)*(int32_t)((int16_t)tmp);
+ m_CarryVal = m_OverVal = (((int32_t)m_dst) >> 15 != 0) && (((int32_t)m_dst) >> 15 != -1);
RegWord(m_dst);
CLKM(IMUL_RRI16, IMUL_RMI16);
}
break;
case 0x6a: // i_push_d8
- PUSH( (UINT16)((INT16)((INT8)fetch())) );
+ PUSH( (uint16_t)((int16_t)((int8_t)fetch())) );
CLK(PUSH_IMM);
break;
case 0x6b: // i_imul_d8
{
- UINT32 src2;
+ uint32_t src2;
DEF_r16w();
- src2= (UINT16)((INT16)((INT8)fetch()));
- m_dst = (INT32)((INT16)m_src)*(INT32)((INT16)src2);
- m_CarryVal = m_OverVal = (((INT32)m_dst) >> 15 != 0) && (((INT32)m_dst) >> 15 != -1);
+ src2= (uint16_t)((int16_t)((int8_t)fetch()));
+ m_dst = (int32_t)((int16_t)m_src)*(int32_t)((int16_t)src2);
+ m_CarryVal = m_OverVal = (((int32_t)m_dst) >> 15 != 0) && (((int32_t)m_dst) >> 15 != -1);
RegWord(m_dst);
CLKM(IMUL_RRI8, IMUL_RMI8);
}
@@ -1447,7 +1447,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
if((m_modrm & 0x38) > 0x18)
{
logerror("%s: %06x: Mov Sreg - Invalid register\n", tag(), pc());
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
}
PutRMWord(m_sregs[(m_modrm & 0x38) >> 3]);
CLKM(MOV_RS,MOV_MS);
@@ -1471,14 +1471,14 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
break;
default:
logerror("%s: %06x: Mov Sreg - Invalid register\n", tag(), pc());
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
}
break;
case 0x8f: // i_popw
{
m_modrm = fetch();
- UINT16 tmp = read_word(calc_addr(SS, m_regs.w[SP], 2, I8086_READ, false));
+ uint16_t tmp = read_word(calc_addr(SS, m_regs.w[SP], 2, I8086_READ, false));
PutRMWord( tmp );
m_regs.w[SP] += 2;
CLKM(POP_R16,POP_M16);
@@ -1487,10 +1487,10 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0x9a: // i_call_far
{
- UINT16 cs = m_sregs[CS];
- UINT16 tmp = fetch_word();
- UINT16 tmp2 = fetch_word();
- UINT16 ip = m_ip;
+ uint16_t cs = m_sregs[CS];
+ uint16_t tmp = fetch_word();
+ uint16_t tmp2 = fetch_word();
+ uint16_t ip = m_ip;
code_descriptor(tmp2, tmp, NT_CALL);
PUSH(cs);
PUSH(ip);
@@ -1500,13 +1500,13 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0x9b: // i_wait
if((m_msw & 0x0a) == 0x0a)
- throw TRAP(FAULT_NM, (UINT16)-1);
+ throw TRAP(FAULT_NM, (uint16_t)-1);
CLK(WAIT);
break;
case 0x9c: // pushf
{
- UINT16 flags = CompressFlags();
+ uint16_t flags = CompressFlags();
if(!PM)
flags &= ~0xf000;
PUSH(flags);
@@ -1516,7 +1516,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0x9d: // popf
{
- UINT16 flags;
+ uint16_t flags;
flags = POP();
CLK(POPF);
load_flags(flags, CPL);
@@ -1525,7 +1525,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xc0: // i_rotshft_bd8
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMByte();
m_dst = m_src;
@@ -1551,7 +1551,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xc1: // i_rotshft_wd8
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMWord();
m_dst = m_src;
@@ -1579,8 +1579,8 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
{
m_modrm = fetch();
if(m_modrm >= 0xc0)
- throw TRAP(FAULT_UD, (UINT16)-1);
- UINT16 tmp = GetRMWord();
+ throw TRAP(FAULT_UD, (uint16_t)-1);
+ uint16_t tmp = GetRMWord();
data_descriptor(ES, GetnextRMWord());
RegWord(tmp);
CLK(LOAD_PTR);
@@ -1591,8 +1591,8 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
{
m_modrm = fetch();
if(m_modrm >= 0xc0)
- throw TRAP(FAULT_UD, (UINT16)-1);
- UINT16 tmp = GetRMWord();
+ throw TRAP(FAULT_UD, (uint16_t)-1);
+ uint16_t tmp = GetRMWord();
data_descriptor(DS, GetnextRMWord());
RegWord(tmp);
CLK(LOAD_PTR);
@@ -1601,8 +1601,8 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xc8: // i_enter
{
- UINT16 nb = fetch();
- UINT32 level;
+ uint16_t nb = fetch();
+ uint32_t level;
nb |= fetch() << 8;
level = fetch();
@@ -1644,7 +1644,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xcf: // iret
{
int oldcpl = (PM) ? CPL : 0;
- UINT16 flags = far_return(1, 0);
+ uint16_t flags = far_return(1, 0);
CLK(IRET);
load_flags(flags, oldcpl);
break;
@@ -1652,7 +1652,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xd2: // i_rotshft_bcl
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMByte();
@@ -1679,7 +1679,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xd3: // i_rotshft_wcl
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMWord();
@@ -1713,7 +1713,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xde:
case 0xdf:
if((m_msw & 8) || (m_msw & 4))
- throw TRAP(FAULT_NM, (UINT16)-1);
+ throw TRAP(FAULT_NM, (uint16_t)-1);
m_modrm = fetch();
GetRMByte();
CLK(NOP);
@@ -1723,8 +1723,8 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xea: // i_jmp_far
{
- UINT16 tmp = fetch_word();
- UINT16 tmp1 = fetch_word();
+ uint16_t tmp = fetch_word();
+ uint16_t tmp1 = fetch_word();
code_descriptor(tmp1, tmp, NT_JMP);
CLK(JMP_FAR);
break;
@@ -1761,7 +1761,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xff: // i_ffpre
{
- UINT32 tmp, tmp1;
+ uint32_t tmp, tmp1;
m_modrm = fetch();
tmp = GetRMWord();
switch ( m_modrm & 0x38 )
@@ -1789,7 +1789,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
break;
case 0x18: /* CALL FAR */
{
- UINT16 ip = m_ip;
+ uint16_t ip = m_ip;
tmp1 = m_sregs[CS];
code_descriptor(GetnextRMWord(), tmp, NT_CALL);
PUSH(tmp1);
@@ -1811,7 +1811,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
break;
default:
logerror("%s: %06x: FF Pre with unimplemented mod\n", tag(), pc());
- throw TRAP(FAULT_UD,(UINT16)-1);
+ throw TRAP(FAULT_UD,(uint16_t)-1);
}
}
break;
@@ -1820,8 +1820,8 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xf3:
{
bool pass = false;
- UINT8 next = repx_op();
- UINT16 c = m_regs.w[CX];
+ uint8_t next = repx_op();
+ uint16_t c = m_regs.w[CX];
switch (next)
{
@@ -1848,12 +1848,12 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
m_icount -= 10; // UD fault timing?
logerror("%s: %06x: Invalid Opcode %02x\n", tag(), pc(), op);
m_ip = m_prev_ip;
- throw TRAP(FAULT_UD, (UINT16)-1);
+ throw TRAP(FAULT_UD, (uint16_t)-1);
}
break;
}
}
- catch(UINT32 e)
+ catch(uint32_t e)
{
trap(e);
}
@@ -1861,13 +1861,13 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
}
-void i80286_cpu_device::load_flags(UINT16 flags, int cpl)
+void i80286_cpu_device::load_flags(uint16_t flags, int cpl)
{
- UINT16 oldflags = CompressFlags();
+ uint16_t oldflags = CompressFlags();
flags &= ~0x8000;
if(PM && cpl)
{
- UINT16 mask = 0x3000;
+ uint16_t mask = 0x3000;
if(cpl > m_IOPL)
mask |= 0x200;
flags &= ~mask;
@@ -1881,9 +1881,9 @@ void i80286_cpu_device::load_flags(UINT16 flags, int cpl)
m_fire_trap = 1;
}
-UINT16 i80286_cpu_device::far_return(int iret, int bytes)
+uint16_t i80286_cpu_device::far_return(int iret, int bytes)
{
- UINT16 sel, off, flags = 0;
+ uint16_t sel, off, flags = 0;
int spaddr;
if(PM && m_NT && iret)
@@ -1904,7 +1904,7 @@ UINT16 i80286_cpu_device::far_return(int iret, int bytes)
if(PM)
{
- UINT16 desc[3], newsp, newss;
+ uint16_t desc[3], newsp, newss;
int addr, r;
if((addr = selector_address(sel)) == -1)
@@ -1970,10 +1970,10 @@ UINT16 i80286_cpu_device::far_return(int iret, int bytes)
return flags;
}
-void i80286_cpu_device::check_permission(UINT8 check_seg, UINT32 offset, UINT16 size, int operation)
+void i80286_cpu_device::check_permission(uint8_t check_seg, uint32_t offset, uint16_t size, int operation)
{
int trap;
- UINT8 rights;
+ uint8_t rights;
if(PM)
{
rights = m_rights[check_seg];
diff --git a/src/devices/cpu/i86/i286.h b/src/devices/cpu/i86/i286.h
index 8df1bf43d94..ea47badb7fc 100644
--- a/src/devices/cpu/i86/i286.h
+++ b/src/devices/cpu/i86/i286.h
@@ -64,12 +64,12 @@ class i80286_cpu_device : public i8086_common_cpu_device
{
public:
// construction/destruction
- i80286_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i80286_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ); }
- typedef delegate<UINT32 (bool)> a20_cb;
+ typedef delegate<uint32_t (bool)> a20_cb;
static void static_set_a20_callback(device_t &device, a20_cb object) { downcast<i80286_cpu_device &>(device).m_a20_callback = object; }
template<class _Object> static devcb_base &static_set_shutdown_callback(device_t &device, _Object object) { return downcast<i80286_cpu_device &>(device).m_out_shutdown_func.set_callback(object); }
@@ -78,60 +78,60 @@ protected:
virtual void device_reset() override;
virtual void device_start() override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_set_input(int inputnum, int state) override;
bool memory_translate(address_spacenum spacenum, int intention, offs_t &address) override;
- virtual void interrupt(int int_num, int trap = 1) override { if(trap) throw TRAP(int_num, (UINT16)-1); else interrupt_descriptor(int_num, 0, 0); }
- virtual UINT8 read_port_byte(UINT16 port) override;
- virtual UINT16 read_port_word(UINT16 port) override;
- virtual void write_port_byte(UINT16 port, UINT8 data) override;
- virtual void write_port_word(UINT16 port, UINT16 data) override;
+ virtual void interrupt(int int_num, int trap = 1) override { if(trap) throw TRAP(int_num, (uint16_t)-1); else interrupt_descriptor(int_num, 0, 0); }
+ virtual uint8_t read_port_byte(uint16_t port) override;
+ virtual uint16_t read_port_word(uint16_t port) override;
+ virtual void write_port_byte(uint16_t port, uint8_t data) override;
+ virtual void write_port_word(uint16_t port, uint16_t data) override;
// Executing instructions
- virtual UINT8 fetch_op() override;
- virtual UINT8 fetch() override;
- virtual UINT32 calc_addr(int seg, UINT16 offset, int size, int op, bool override = true) override;
+ virtual uint8_t fetch_op() override;
+ virtual uint8_t fetch() override;
+ virtual uint32_t calc_addr(int seg, uint16_t offset, int size, int op, bool override = true) override;
private:
- void check_permission(UINT8 check_seg, UINT32 offset, UINT16 size, int operation);
- void code_descriptor(UINT16 selector, UINT16 offset, int gate);
- void data_descriptor(int reg, UINT16 selector);
- void data_descriptor(int reg, UINT16 selector, int cpl, UINT32 trap, UINT16 offset = 0, int size = 0);
- UINT16 far_return(int iret, int bytes);
+ void check_permission(uint8_t check_seg, uint32_t offset, uint16_t size, int operation);
+ void code_descriptor(uint16_t selector, uint16_t offset, int gate);
+ void data_descriptor(int reg, uint16_t selector);
+ void data_descriptor(int reg, uint16_t selector, int cpl, uint32_t trap, uint16_t offset = 0, int size = 0);
+ uint16_t far_return(int iret, int bytes);
void interrupt_descriptor(int number, int hwint, int error);
- void load_flags(UINT16 flags, int cpl);
+ void load_flags(uint16_t flags, int cpl);
void pop_seg(int reg);
- UINT32 selector_address(UINT16 sel);
- void switch_task(UINT16 ntask, int type);
- void trap(UINT32 error);
- int verify(UINT16 selector, int operation, UINT8 rights, bool valid);
- UINT32 pc() { return m_pc = m_base[CS] + m_ip; }
+ uint32_t selector_address(uint16_t sel);
+ void switch_task(uint16_t ntask, int type);
+ void trap(uint32_t error);
+ int verify(uint16_t selector, int operation, uint8_t rights, bool valid);
+ uint32_t pc() { return m_pc = m_base[CS] + m_ip; }
int m_trap_level;
- UINT16 m_msw;
- UINT32 m_base[4];
- UINT16 m_limit[4];
- UINT8 m_rights[4];
+ uint16_t m_msw;
+ uint32_t m_base[4];
+ uint16_t m_limit[4];
+ uint8_t m_rights[4];
bool m_valid[4];
- UINT32 m_amask;
+ uint32_t m_amask;
struct {
- UINT32 base;
- UINT16 limit;
+ uint32_t base;
+ uint16_t limit;
} m_gdtr, m_idtr;
struct {
- UINT16 sel;
- UINT32 base;
- UINT16 limit;
- UINT8 rights;
+ uint16_t sel;
+ uint32_t base;
+ uint16_t limit;
+ uint8_t rights;
} m_ldtr, m_tr;
- UINT32 TRAP(UINT16 fault, UINT16 code) { return ((((UINT32)fault&0xffff)<<16)|(code&0xffff)); }
+ uint32_t TRAP(uint16_t fault, uint16_t code) { return ((((uint32_t)fault&0xffff)<<16)|(code&0xffff)); }
address_space_config m_program_config;
address_space_config m_io_config;
- static const UINT8 m_i80286_timing[200];
+ static const uint8_t m_i80286_timing[200];
enum {
FAULT_DE = 0,
diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp
index ae68d66b66e..77566cbd9aa 100644
--- a/src/devices/cpu/i86/i86.cpp
+++ b/src/devices/cpu/i86/i86.cpp
@@ -18,7 +18,7 @@
#define I8086_NMI_INT_VECTOR 2
-const UINT8 i8086_cpu_device::m_i8086_timing[] =
+const uint8_t i8086_cpu_device::m_i8086_timing[] =
{
51,32, /* exception, IRET */
2, 0, 4, 2, /* INTs */
@@ -90,14 +90,14 @@ const UINT8 i8086_cpu_device::m_i8086_timing[] =
const device_type I8086 = &device_creator<i8086_cpu_device>;
const device_type I8088 = &device_creator<i8088_cpu_device>;
-i8088_cpu_device::i8088_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8088_cpu_device::i8088_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8086_cpu_device(mconfig, I8088, "I8088", tag, owner, clock, "i8088", __FILE__, 8)
{
memcpy(m_timing, m_i8086_timing, sizeof(m_i8086_timing));
m_fetch_xor = 0;
}
-i8086_cpu_device::i8086_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8086_cpu_device::i8086_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8086_common_cpu_device(mconfig, I8086, "I8086", tag, owner, clock, "i8086", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 20, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 16, 16, 0)
@@ -106,24 +106,24 @@ i8086_cpu_device::i8086_cpu_device(const machine_config &mconfig, const char *ta
m_fetch_xor = BYTE_XOR_LE(0);
}
-i8086_cpu_device::i8086_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int data_bus_size)
+i8086_cpu_device::i8086_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int data_bus_size)
: i8086_common_cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, data_bus_size, 20, 0)
, m_io_config("io", ENDIANNESS_LITTLE, data_bus_size, 16, 0)
{
}
-UINT8 i8086_cpu_device::fetch_op()
+uint8_t i8086_cpu_device::fetch_op()
{
- UINT8 data;
+ uint8_t data;
data = m_direct->read_byte(pc(), m_fetch_xor);
m_ip++;
return data;
}
-UINT8 i8086_cpu_device::fetch()
+uint8_t i8086_cpu_device::fetch()
{
- UINT8 data;
+ uint8_t data;
data = m_direct->read_byte(pc(), m_fetch_xor);
m_ip++;
return data;
@@ -189,7 +189,7 @@ void i8086_cpu_device::execute_run()
debugger_instruction_hook( this, pc() );
}
- UINT8 op = fetch_op();
+ uint8_t op = fetch_op();
switch(op)
{
@@ -200,7 +200,7 @@ void i8086_cpu_device::execute_run()
case 0xd2: // i_rotshft_bcl
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMByte();
@@ -227,7 +227,7 @@ void i8086_cpu_device::execute_run()
case 0xd3: // i_rotshft_wcl
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMWord();
@@ -277,7 +277,7 @@ void i8086_cpu_device::device_start()
state_add(STATE_GENPCBASE, "CURPC", m_pc).callexport().formatstr("%05X");
}
-i8086_common_cpu_device::i8086_common_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+i8086_common_cpu_device::i8086_common_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_ip(0)
, m_TF(0)
@@ -293,23 +293,23 @@ i8086_common_cpu_device::i8086_common_cpu_device(const machine_config &mconfig,
static const BREGS reg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH };
/* Set up parity lookup table. */
- for (UINT16 i = 0;i < 256; i++)
+ for (uint16_t i = 0;i < 256; i++)
{
- UINT16 c = 0;
- for (UINT16 j = i; j > 0; j >>= 1)
+ uint16_t c = 0;
+ for (uint16_t j = i; j > 0; j >>= 1)
{
if (j & 1) c++;
}
m_parity_table[i] = !(c & 1);
}
- for (UINT16 i = 0; i < 256; i++)
+ for (uint16_t i = 0; i < 256; i++)
{
m_Mod_RM.reg.b[i] = reg_name[(i & 0x38) >> 3];
m_Mod_RM.reg.w[i] = (WREGS) ( (i & 0x38) >> 3) ;
}
- for (UINT16 i = 0xc0; i < 0x100; i++)
+ for (uint16_t i = 0xc0; i < 0x100; i++)
{
m_Mod_RM.RM.w[i] = (WREGS)( i & 7 );
m_Mod_RM.RM.b[i] = (BREGS)reg_name[i & 7];
@@ -330,7 +330,7 @@ void i8086_common_cpu_device::state_string_export(const device_state_entry &entr
case STATE_GENFLAGS:
{
- UINT16 flags = CompressFlags();
+ uint16_t flags = CompressFlags();
str = string_format("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
flags & 0x8000 ? '1':'.',
flags & 0x4000 ? '1':'.',
@@ -466,8 +466,8 @@ void i8086_common_cpu_device::interrupt(int int_num, int trap)
m_pending_irq &= ~INT_IRQ;
}
- UINT16 dest_off = read_word( int_num * 4 + 0 );
- UINT16 dest_seg = read_word( int_num * 4 + 2 );
+ uint16_t dest_off = read_word( int_num * 4 + 0 );
+ uint16_t dest_seg = read_word( int_num * 4 + 2 );
PUSH(m_sregs[CS]);
PUSH(m_ip);
@@ -508,33 +508,33 @@ void i8086_common_cpu_device::execute_set_input( int inptnum, int state )
}
}
-offs_t i8086_common_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i8086_common_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
- extern int i386_dasm_one(char *buffer, offs_t eip, const UINT8 *oprom, int mode);
+ extern int i386_dasm_one(char *buffer, offs_t eip, const uint8_t *oprom, int mode);
return i386_dasm_one(buffer, pc, oprom, 1);
}
-UINT8 i8086_common_cpu_device::read_port_byte(UINT16 port)
+uint8_t i8086_common_cpu_device::read_port_byte(uint16_t port)
{
return m_io->read_byte(port);
}
-UINT16 i8086_common_cpu_device::read_port_word(UINT16 port)
+uint16_t i8086_common_cpu_device::read_port_word(uint16_t port)
{
return m_io->read_word_unaligned(port);
}
-void i8086_common_cpu_device::write_port_byte(UINT16 port, UINT8 data)
+void i8086_common_cpu_device::write_port_byte(uint16_t port, uint8_t data)
{
m_io->write_byte(port, data);
}
-void i8086_common_cpu_device::write_port_word(UINT16 port, UINT16 data)
+void i8086_common_cpu_device::write_port_word(uint16_t port, uint16_t data)
{
m_io->write_word_unaligned(port, data);
}
-UINT32 i8086_common_cpu_device::calc_addr(int seg, UINT16 offset, int size, int op, bool override)
+uint32_t i8086_common_cpu_device::calc_addr(int seg, uint16_t offset, int size, int op, bool override)
{
if ( m_seg_prefix && (seg==DS || seg==SS) && override )
{
@@ -546,7 +546,7 @@ UINT32 i8086_common_cpu_device::calc_addr(int seg, UINT16 offset, int size, int
}
}
-bool i8086_common_cpu_device::common_op(UINT8 op)
+bool i8086_common_cpu_device::common_op(uint8_t op)
{
switch(op)
{
@@ -653,7 +653,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
{
DEF_br8();
m_src += CF ? 1 : 0;
- UINT32 tmpcf = ADDB();
+ uint32_t tmpcf = ADDB();
PutbackRMByte(m_dst);
set_CFB(tmpcf);
CLKM(ALU_RR8,ALU_MR8);
@@ -663,7 +663,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
{
DEF_wr16();
m_src += CF ? 1 : 0;
- UINT32 tmpcf = ADDX();
+ uint32_t tmpcf = ADDX();
PutbackRMWord(m_dst);
set_CFW(tmpcf);
CLKM(ALU_RR16,ALU_MR16);
@@ -715,7 +715,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x18: // i_sbb_br8
{
- UINT32 tmpcf;
+ uint32_t tmpcf;
DEF_br8();
m_src += CF ? 1 : 0;
tmpcf = SUBB();
@@ -727,7 +727,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x19: // i_sbb_wr16
{
- UINT32 tmpcf;
+ uint32_t tmpcf;
DEF_wr16();
m_src += CF ? 1 : 0;
tmpcf = SUBX();
@@ -1243,7 +1243,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x80: // i_80pre
{
- UINT32 tmpcf;
+ uint32_t tmpcf;
m_modrm = fetch();
m_dst = GetRMByte();
m_src = fetch();
@@ -1267,7 +1267,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x81: // i_81pre
{
- UINT32 tmpcf;
+ uint32_t tmpcf;
m_modrm = fetch();
m_dst = GetRMWord();
m_src = fetch_word();
@@ -1291,10 +1291,10 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x82: // i_82pre
{
- UINT32 tmpcf;
+ uint32_t tmpcf;
m_modrm = fetch();
m_dst = GetRMByte();
- m_src = (INT8)fetch();
+ m_src = (int8_t)fetch();
if (m_modrm >=0xc0 ) { CLK(ALU_RI8); }
else if ((m_modrm & 0x38)==0x38) { CLK(ALU_MI8_RO); }
else { CLK(ALU_MI8); }
@@ -1315,10 +1315,10 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x83: // i_83pre
{
- UINT32 tmpcf;
+ uint32_t tmpcf;
m_modrm = fetch();
m_dst = GetRMWord();
- m_src = (UINT16)((INT16)((INT8)fetch()));
+ m_src = (uint16_t)((int16_t)((int8_t)fetch()));
if (m_modrm >=0xc0 ) { CLK(ALU_R16I8); }
else if ((m_modrm & 0x38)==0x38) { CLK(ALU_M16I8_RO); }
else { CLK(ALU_M16I8); }
@@ -1471,8 +1471,8 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x9a: // i_call_far
{
- UINT16 tmp = fetch_word();
- UINT16 tmp2 = fetch_word();
+ uint16_t tmp = fetch_word();
+ uint16_t tmp2 = fetch_word();
PUSH(m_sregs[CS]);
PUSH(m_ip);
m_ip = tmp;
@@ -1503,7 +1503,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x9e: // i_sahf
{
- UINT32 tmp = (CompressFlags() & 0xff00) | (m_regs.b[AH] & 0xd5);
+ uint32_t tmp = (CompressFlags() & 0xff00) | (m_regs.b[AH] & 0xd5);
ExpandFlags(tmp);
CLK(SAHF);
}
@@ -1517,7 +1517,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xa0: // i_mov_aldisp
{
- UINT32 addr = fetch_word();
+ uint32_t addr = fetch_word();
m_regs.b[AL] = GetMemB(DS, addr);
CLK(MOV_AM8);
}
@@ -1525,7 +1525,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xa1: // i_mov_axdisp
{
- UINT32 addr = fetch_word();
+ uint32_t addr = fetch_word();
m_regs.w[AX] = GetMemW(DS, addr);
CLK(MOV_AM16);
}
@@ -1533,7 +1533,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xa2: // i_mov_dispal
{
- UINT32 addr = fetch_word();
+ uint32_t addr = fetch_word();
PutMemB(DS, addr, m_regs.b[AL]);
CLK(MOV_MA8);
}
@@ -1541,7 +1541,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xa3: // i_mov_dispax
{
- UINT32 addr = fetch_word();
+ uint32_t addr = fetch_word();
PutMemW(DS, addr, m_regs.w[AX]);
CLK(MOV_MA16);
}
@@ -1693,7 +1693,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xc0: // 0xc0 is 0xc2 - see (*)
case 0xc2: // i_ret_d16
{
- UINT32 count = fetch_word();
+ uint32_t count = fetch_word();
m_ip = POP();
m_regs.w[SP] += count;
CLK(RET_NEAR_IMM);
@@ -1735,7 +1735,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xc8: // 0xc8 = 0xca - see (*)
case 0xca: // i_retf_d16
{
- UINT32 count = fetch_word();
+ uint32_t count = fetch_word();
m_ip = POP();
m_sregs[CS] = POP();
m_regs.w[SP] += count;
@@ -1815,7 +1815,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xd4: // i_aam
{
- UINT8 base = fetch();
+ uint8_t base = fetch();
if(!base)
{
interrupt(0);
@@ -1830,7 +1830,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xd5: // i_aad
{
- UINT8 base = fetch();
+ uint8_t base = fetch();
m_regs.b[AL] = m_regs.b[AH] * base + m_regs.b[AL];
m_regs.b[AH] = 0;
set_SZPF_Byte(m_regs.b[AL]);
@@ -1865,7 +1865,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xe0: // i_loopne
{
- INT8 disp = (INT8)fetch();
+ int8_t disp = (int8_t)fetch();
m_regs.w[CX]--;
if (!ZF && m_regs.w[CX])
@@ -1880,7 +1880,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xe1: // i_loope
{
- INT8 disp = (INT8)fetch();
+ int8_t disp = (int8_t)fetch();
m_regs.w[CX]--;
if (ZF && m_regs.w[CX])
@@ -1895,7 +1895,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xe2: // i_loop
{
- INT8 disp = (INT8)fetch();
+ int8_t disp = (int8_t)fetch();
m_regs.w[CX]--;
if (m_regs.w[CX])
@@ -1910,7 +1910,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xe3: // i_jcxz
{
- INT8 disp = (INT8)fetch();
+ int8_t disp = (int8_t)fetch();
if (m_regs.w[CX] == 0)
{
@@ -1931,7 +1931,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xe5: // i_inax
{
- UINT8 port = fetch();
+ uint8_t port = fetch();
m_regs.w[AX] = read_port_word(port);
CLK(IN_IMM16);
@@ -1945,7 +1945,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xe7: // i_outax
{
- UINT8 port = fetch();
+ uint8_t port = fetch();
write_port_word(port, m_regs.w[AX]);
CLK(OUT_IMM16);
@@ -1955,7 +1955,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xe8: // i_call_d16
{
- INT16 tmp = (INT16)fetch_word();
+ int16_t tmp = (int16_t)fetch_word();
PUSH(m_ip);
m_ip = m_ip + tmp;
@@ -1965,7 +1965,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xe9: // i_jmp_d16
{
- INT16 offset = (INT16)fetch_word();
+ int16_t offset = (int16_t)fetch_word();
m_ip += offset;
CLK(JMP_NEAR);
}
@@ -1973,8 +1973,8 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xea: // i_jmp_far
{
- UINT16 tmp = fetch_word();
- UINT16 tmp1 = fetch_word();
+ uint16_t tmp = fetch_word();
+ uint16_t tmp1 = fetch_word();
m_sregs[CS] = tmp1;
m_ip = tmp;
@@ -1984,14 +1984,14 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xeb: // i_jmp_d8
{
- int tmp = (int)((INT8)fetch());
+ int tmp = (int)((int8_t)fetch());
CLK(JMP_SHORT);
if (tmp==-2 && m_no_interrupt==0 && (m_pending_irq==0) && m_icount>0)
{
m_icount%=12; /* cycle skip */
}
- m_ip = (UINT16)(m_ip+tmp);
+ m_ip = (uint16_t)(m_ip+tmp);
}
break;
@@ -2002,7 +2002,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xed: // i_inaxdx
{
- UINT32 port = m_regs.w[DX];
+ uint32_t port = m_regs.w[DX];
m_regs.w[AX] = read_port_word(port);
CLK(IN_DX16);
@@ -2016,7 +2016,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xef: // i_outdxax
{
- UINT32 port = m_regs.w[DX];
+ uint32_t port = m_regs.w[DX];
write_port_word(port, m_regs.w[AX]);
CLK(OUT_DX16);
@@ -2035,8 +2035,8 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xf2: // i_repne
{
bool invalid = false;
- UINT8 next = repx_op();
- UINT16 c = m_regs.w[CX];
+ uint8_t next = repx_op();
+ uint16_t c = m_regs.w[CX];
switch (next)
{
@@ -2068,8 +2068,8 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xf3: // i_repe
{
bool invalid = false;
- UINT8 next = repx_op();
- UINT16 c = m_regs.w[CX];
+ uint8_t next = repx_op();
+ uint16_t c = m_regs.w[CX];
switch (next)
{
@@ -2111,9 +2111,9 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xf6: // i_f6pre
{
- UINT32 tmp;
- UINT32 uresult,uresult2;
- INT32 result,result2;
+ uint32_t tmp;
+ uint32_t uresult,uresult2;
+ int32_t result,result2;
m_modrm = fetch();
tmp = GetRMByte();
@@ -2139,14 +2139,14 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
break;
case 0x20: /* MUL */
uresult = m_regs.b[AL] * tmp;
- m_regs.w[AX] = (UINT16)uresult;
+ m_regs.w[AX] = (uint16_t)uresult;
m_CarryVal = m_OverVal = (m_regs.b[AH]!=0) ? 1 : 0;
set_ZF(m_regs.w[AX]);
CLKM(MUL_R8,MUL_M8);
break;
case 0x28: /* IMUL */
- result = (INT16)((INT8)m_regs.b[AL])*(INT16)((INT8)tmp);
- m_regs.w[AX] = (UINT16)result;
+ result = (int16_t)((int8_t)m_regs.b[AL])*(int16_t)((int8_t)tmp);
+ m_regs.w[AX] = (uint16_t)result;
m_CarryVal = m_OverVal = (m_regs.b[AH]!=0) ? 1 : 0;
set_ZF(m_regs.w[AX]);
CLKM(IMUL_R8,IMUL_M8);
@@ -2175,9 +2175,9 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x38: /* IDIV */
if (tmp)
{
- result = (INT16)m_regs.w[AX];
- result2 = result % (INT16)((INT8)tmp);
- if ((result /= (INT16)((INT8)tmp)) > 0xff)
+ result = (int16_t)m_regs.w[AX];
+ result2 = result % (int16_t)((int8_t)tmp);
+ if ((result /= (int16_t)((int8_t)tmp)) > 0xff)
{
interrupt(0);
}
@@ -2200,9 +2200,9 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xf7: // i_f7pre
{
- UINT32 tmp,tmp2;
- UINT32 uresult,uresult2;
- INT32 result,result2;
+ uint32_t tmp,tmp2;
+ uint32_t uresult,uresult2;
+ int32_t result,result2;
m_modrm = fetch();
tmp = GetRMWord();
@@ -2230,13 +2230,13 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x20: /* MUL */
uresult = m_regs.w[AX]*tmp;
m_regs.w[AX] = uresult & 0xffff;
- m_regs.w[DX] = ((UINT32)uresult)>>16;
+ m_regs.w[DX] = ((uint32_t)uresult)>>16;
m_CarryVal = m_OverVal = (m_regs.w[DX] != 0) ? 1 : 0;
set_ZF(m_regs.w[AX] | m_regs.w[DX]);
CLKM(MUL_R16,MUL_M16);
break;
case 0x28: /* IMUL */
- result = (INT32)((INT16)m_regs.w[AX]) * (INT32)((INT16)tmp);
+ result = (int32_t)((int16_t)m_regs.w[AX]) * (int32_t)((int16_t)tmp);
m_regs.w[AX] = result & 0xffff;
m_regs.w[DX] = result >> 16;
m_CarryVal = m_OverVal = (m_regs.w[DX] != 0) ? 1 : 0;
@@ -2246,7 +2246,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x30: /* DIV */
if (tmp)
{
- uresult = (((UINT32)m_regs.w[DX]) << 16) | m_regs.w[AX];
+ uresult = (((uint32_t)m_regs.w[DX]) << 16) | m_regs.w[AX];
uresult2 = uresult % tmp;
if ((uresult /= tmp) > 0xffff)
{
@@ -2267,9 +2267,9 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x38: /* IDIV */
if (tmp)
{
- result = ((UINT32)m_regs.w[DX] << 16) + m_regs.w[AX];
- result2 = result % (INT32)((INT16)tmp);
- if ((result /= (INT32)((INT16)tmp)) > 0xffff)
+ result = ((uint32_t)m_regs.w[DX] << 16) + m_regs.w[AX];
+ result2 = result % (int32_t)((int16_t)tmp);
+ if ((result /= (int32_t)((int16_t)tmp)) > 0xffff)
{
interrupt(0);
}
@@ -2322,7 +2322,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xfe: // i_fepre
{
- UINT32 tmp, tmp1;
+ uint32_t tmp, tmp1;
m_modrm = fetch();
tmp = GetRMByte();
switch ( m_modrm & 0x38 )
@@ -2352,7 +2352,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xff: // i_ffpre
{
- UINT32 tmp, tmp1;
+ uint32_t tmp, tmp1;
m_modrm = fetch();
tmp = GetRMWord();
switch ( m_modrm & 0x38 )
diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h
index f268c3c1671..6004158d8c1 100644
--- a/src/devices/cpu/i86/i86.h
+++ b/src/devices/cpu/i86/i86.h
@@ -31,7 +31,7 @@ class i8086_common_cpu_device : public cpu_device
{
public:
// construction/destruction
- i8086_common_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ i8086_common_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
template<class _Object> static devcb_base &set_lock_handler(device_t &device, _Object object)
{ return downcast<i8086_common_cpu_device &>(device).m_lock_handler.set_callback(object); }
@@ -117,60 +117,60 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 50; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 50; }
virtual void execute_set_input(int inputnum, int state) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
virtual void interrupt(int int_num, int trap = 1);
- virtual bool common_op(UINT8 op);
+ virtual bool common_op(uint8_t op);
// Accessing memory and io
- inline UINT8 read_byte(UINT32 addr);
- inline UINT16 read_word(UINT32 addr);
- inline void write_byte(UINT32 addr, UINT8 data);
- inline void write_word(UINT32 addr, UINT16 data);
- virtual UINT8 read_port_byte(UINT16 port);
- virtual UINT16 read_port_word(UINT16 port);
- virtual void write_port_byte(UINT16 port, UINT8 data);
- virtual void write_port_word(UINT16 port, UINT16 data);
+ inline uint8_t read_byte(uint32_t addr);
+ inline uint16_t read_word(uint32_t addr);
+ inline void write_byte(uint32_t addr, uint8_t data);
+ inline void write_word(uint32_t addr, uint16_t data);
+ virtual uint8_t read_port_byte(uint16_t port);
+ virtual uint16_t read_port_word(uint16_t port);
+ virtual void write_port_byte(uint16_t port, uint8_t data);
+ virtual void write_port_word(uint16_t port, uint16_t data);
// Executing instructions
- virtual UINT8 fetch_op() = 0;
- virtual UINT8 fetch() = 0;
- inline UINT16 fetch_word();
- inline UINT8 repx_op();
+ virtual uint8_t fetch_op() = 0;
+ virtual uint8_t fetch() = 0;
+ inline uint16_t fetch_word();
+ inline uint8_t repx_op();
// Cycles passed while executing instructions
- inline void CLK(UINT8 op);
- inline void CLKM(UINT8 op_reg, UINT8 op_mem);
+ inline void CLK(uint8_t op);
+ inline void CLKM(uint8_t op_reg, uint8_t op_mem);
// Memory handling while executing instructions
- virtual UINT32 calc_addr(int seg, UINT16 offset, int size, int op, bool override = true);
- inline UINT32 get_ea(int size, int op);
- inline void PutbackRMByte(UINT8 data);
- inline void PutbackRMWord(UINT16 data);
- inline void RegByte(UINT8 data);
- inline void RegWord(UINT16 data);
- inline UINT8 RegByte();
- inline UINT16 RegWord();
- inline UINT16 GetRMWord();
- inline UINT16 GetnextRMWord();
- inline UINT8 GetRMByte();
- inline void PutMemB(int seg, UINT16 offset, UINT8 data);
- inline void PutMemW(int seg, UINT16 offset, UINT16 data);
- inline UINT8 GetMemB(int seg, UINT16 offset);
- inline UINT16 GetMemW(int seg, UINT16 offset);
+ virtual uint32_t calc_addr(int seg, uint16_t offset, int size, int op, bool override = true);
+ inline uint32_t get_ea(int size, int op);
+ inline void PutbackRMByte(uint8_t data);
+ inline void PutbackRMWord(uint16_t data);
+ inline void RegByte(uint8_t data);
+ inline void RegWord(uint16_t data);
+ inline uint8_t RegByte();
+ inline uint16_t RegWord();
+ inline uint16_t GetRMWord();
+ inline uint16_t GetnextRMWord();
+ inline uint8_t GetRMByte();
+ inline void PutMemB(int seg, uint16_t offset, uint8_t data);
+ inline void PutMemW(int seg, uint16_t offset, uint16_t data);
+ inline uint8_t GetMemB(int seg, uint16_t offset);
+ inline uint16_t GetMemW(int seg, uint16_t offset);
inline void PutImmRMWord();
- inline void PutRMWord(UINT16 val);
- inline void PutRMByte(UINT8 val);
+ inline void PutRMWord(uint16_t val);
+ inline void PutRMByte(uint8_t val);
inline void PutImmRMByte();
inline void DEF_br8();
inline void DEF_wr16();
@@ -180,20 +180,20 @@ protected:
inline void DEF_axd16();
// Flags
- inline void set_CFB(UINT32 x);
- inline void set_CFW(UINT32 x);
- inline void set_AF(UINT32 x,UINT32 y,UINT32 z);
- inline void set_SF(UINT32 x);
- inline void set_ZF(UINT32 x);
- inline void set_PF(UINT32 x);
- inline void set_SZPF_Byte(UINT32 x);
- inline void set_SZPF_Word(UINT32 x);
- inline void set_OFW_Add(UINT32 x,UINT32 y,UINT32 z);
- inline void set_OFB_Add(UINT32 x,UINT32 y,UINT32 z);
- inline void set_OFW_Sub(UINT32 x,UINT32 y,UINT32 z);
- inline void set_OFB_Sub(UINT32 x,UINT32 y,UINT32 z);
- inline UINT16 CompressFlags() const;
- inline void ExpandFlags(UINT16 f);
+ inline void set_CFB(uint32_t x);
+ inline void set_CFW(uint32_t x);
+ inline void set_AF(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_SF(uint32_t x);
+ inline void set_ZF(uint32_t x);
+ inline void set_PF(uint32_t x);
+ inline void set_SZPF_Byte(uint32_t x);
+ inline void set_SZPF_Word(uint32_t x);
+ inline void set_OFW_Add(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_OFB_Add(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_OFW_Sub(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_OFB_Sub(uint32_t x,uint32_t y,uint32_t z);
+ inline uint16_t CompressFlags() const;
+ inline void ExpandFlags(uint16_t f);
// rep instructions
inline void i_insb();
@@ -213,10 +213,10 @@ protected:
inline void i_popf();
// sub implementations
- inline UINT32 ADDB();
- inline UINT32 ADDX();
- inline UINT32 SUBB();
- inline UINT32 SUBX();
+ inline uint32_t ADDB();
+ inline uint32_t ADDX();
+ inline uint32_t SUBB();
+ inline uint32_t SUBX();
inline void ORB();
inline void ORW();
inline void ANDB();
@@ -231,27 +231,27 @@ protected:
inline void ROLC_WORD();
inline void RORC_BYTE();
inline void RORC_WORD();
- inline void SHL_BYTE(UINT8 c);
- inline void SHL_WORD(UINT8 c);
- inline void SHR_BYTE(UINT8 c);
- inline void SHR_WORD(UINT8 c);
- inline void SHRA_BYTE(UINT8 c);
- inline void SHRA_WORD(UINT8 c);
- inline void XchgAXReg(UINT8 reg);
- inline void IncWordReg(UINT8 reg);
- inline void DecWordReg(UINT8 reg);
- inline void PUSH(UINT16 data);
- inline UINT16 POP();
+ inline void SHL_BYTE(uint8_t c);
+ inline void SHL_WORD(uint8_t c);
+ inline void SHR_BYTE(uint8_t c);
+ inline void SHR_WORD(uint8_t c);
+ inline void SHRA_BYTE(uint8_t c);
+ inline void SHRA_WORD(uint8_t c);
+ inline void XchgAXReg(uint8_t reg);
+ inline void IncWordReg(uint8_t reg);
+ inline void DecWordReg(uint8_t reg);
+ inline void PUSH(uint16_t data);
+ inline uint16_t POP();
inline void JMP(bool cond);
- inline void ADJ4(INT8 param1, INT8 param2);
- inline void ADJB(INT8 param1, INT8 param2);
+ inline void ADJ4(int8_t param1, int8_t param2);
+ inline void ADJB(int8_t param1, int8_t param2);
protected:
union
{ /* eight general registers */
- UINT16 w[8]; /* viewed as 16 bits registers */
- UINT8 b[16]; /* or as 8 bit registers */
+ uint16_t w[8]; /* viewed as 16 bits registers */
+ uint8_t b[16]; /* or as 8 bit registers */
} m_regs;
enum BREGS {
@@ -280,22 +280,22 @@ protected:
I8086_NONE
};
- UINT16 m_sregs[4];
+ uint16_t m_sregs[4];
- UINT16 m_ip;
- UINT16 m_prev_ip;
+ uint16_t m_ip;
+ uint16_t m_prev_ip;
- INT32 m_SignVal;
- UINT32 m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
- UINT8 m_TF, m_IF, m_DF; /* 0 or 1 valued flags */
- UINT8 m_IOPL, m_NT, m_MF;
- UINT32 m_int_vector;
- UINT32 m_pending_irq;
- UINT32 m_nmi_state;
- UINT32 m_irq_state;
- UINT8 m_no_interrupt;
- UINT8 m_fire_trap;
- UINT8 m_test_state;
+ int32_t m_SignVal;
+ uint32_t m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
+ uint8_t m_TF, m_IF, m_DF; /* 0 or 1 valued flags */
+ uint8_t m_IOPL, m_NT, m_MF;
+ uint32_t m_int_vector;
+ uint32_t m_pending_irq;
+ uint32_t m_nmi_state;
+ uint32_t m_irq_state;
+ uint8_t m_no_interrupt;
+ uint8_t m_fire_trap;
+ uint8_t m_test_state;
address_space *m_program;
direct_read_data *m_direct;
@@ -303,22 +303,22 @@ protected:
offs_t m_fetch_xor;
int m_icount;
- UINT32 m_prefix_seg; /* the latest prefix segment */
+ uint32_t m_prefix_seg; /* the latest prefix segment */
bool m_seg_prefix; /* prefix segment indicator */
bool m_seg_prefix_next; /* prefix segment for next instruction */
- UINT32 m_ea;
- UINT16 m_eo;
- UINT16 m_e16;
+ uint32_t m_ea;
+ uint16_t m_eo;
+ uint16_t m_e16;
// Used during execution of instructions
- UINT8 m_modrm;
- UINT32 m_dst;
- UINT32 m_src;
- UINT32 m_pc;
+ uint8_t m_modrm;
+ uint32_t m_dst;
+ uint32_t m_src;
+ uint32_t m_pc;
// Lookup tables
- UINT8 m_parity_table[256];
+ uint8_t m_parity_table[256];
struct {
struct {
int w[256];
@@ -330,7 +330,7 @@ protected:
} RM;
} m_Mod_RM;
- UINT8 m_timing[200];
+ uint8_t m_timing[200];
bool m_halt;
bool m_lock;
@@ -341,8 +341,8 @@ class i8086_cpu_device : public i8086_common_cpu_device
{
public:
// construction/destruction
- i8086_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- i8086_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int data_bus_size);
+ i8086_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8086_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int data_bus_size);
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ); }
@@ -350,21 +350,21 @@ public:
protected:
virtual void execute_run() override;
virtual void device_start() override;
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT8 fetch_op() override;
- virtual UINT8 fetch() override;
- UINT32 pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint8_t fetch_op() override;
+ virtual uint8_t fetch() override;
+ uint32_t pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
address_space_config m_program_config;
address_space_config m_io_config;
- static const UINT8 m_i8086_timing[200];
+ static const uint8_t m_i8086_timing[200];
};
class i8088_cpu_device : public i8086_cpu_device
{
public:
// construction/destruction
- i8088_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8088_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/i86/i86inline.h b/src/devices/cpu/i86/i86inline.h
index 8a9ad703fec..13dd366aa92 100644
--- a/src/devices/cpu/i86/i86inline.h
+++ b/src/devices/cpu/i86/i86inline.h
@@ -5,7 +5,7 @@
#define CF (m_CarryVal!=0)
#define SF (m_SignVal<0)
#define ZF (m_ZeroVal==0)
-#define PF m_parity_table[(UINT8)m_ParityVal]
+#define PF m_parity_table[(uint8_t)m_ParityVal]
#define AF (m_AuxVal!=0)
#define OF (m_OverVal!=0)
@@ -15,37 +15,37 @@
#define INT_IRQ 0x01
#define NMI_IRQ 0x02
-UINT8 i8086_common_cpu_device::read_byte(UINT32 addr)
+uint8_t i8086_common_cpu_device::read_byte(uint32_t addr)
{
return m_program->read_byte(addr);
}
-UINT16 i8086_common_cpu_device::read_word(UINT32 addr)
+uint16_t i8086_common_cpu_device::read_word(uint32_t addr)
{
return m_program->read_word_unaligned(addr);
}
-void i8086_common_cpu_device::write_byte(UINT32 addr, UINT8 data)
+void i8086_common_cpu_device::write_byte(uint32_t addr, uint8_t data)
{
m_program->write_byte(addr, data);
}
-void i8086_common_cpu_device::write_word(UINT32 addr, UINT16 data)
+void i8086_common_cpu_device::write_word(uint32_t addr, uint16_t data)
{
m_program->write_word_unaligned(addr, data);
}
-inline UINT16 i8086_common_cpu_device::fetch_word()
+inline uint16_t i8086_common_cpu_device::fetch_word()
{
- UINT16 data = fetch();
+ uint16_t data = fetch();
data |= ( fetch() << 8 );
return data;
}
-inline UINT8 i8086_common_cpu_device::repx_op()
+inline uint8_t i8086_common_cpu_device::repx_op()
{
- UINT8 next = fetch_op();
+ uint8_t next = fetch_op();
bool seg_prefix = false;
int seg = 0;
@@ -82,19 +82,19 @@ inline UINT8 i8086_common_cpu_device::repx_op()
}
-inline void i8086_common_cpu_device::CLK(UINT8 op)
+inline void i8086_common_cpu_device::CLK(uint8_t op)
{
m_icount -= m_timing[op];
}
-inline void i8086_common_cpu_device::CLKM(UINT8 op_reg, UINT8 op_mem)
+inline void i8086_common_cpu_device::CLKM(uint8_t op_reg, uint8_t op_mem)
{
m_icount -= ( m_modrm >= 0xc0 ) ? m_timing[op_reg] : m_timing[op_mem];
}
-inline UINT32 i8086_common_cpu_device::get_ea(int size, int op)
+inline uint32_t i8086_common_cpu_device::get_ea(int size, int op)
{
switch( m_modrm & 0xc7 )
{
@@ -141,91 +141,91 @@ inline UINT32 i8086_common_cpu_device::get_ea(int size, int op)
case 0x40:
m_icount -= 11;
- m_eo = m_regs.w[BX] + m_regs.w[SI] + (INT8)fetch();
+ m_eo = m_regs.w[BX] + m_regs.w[SI] + (int8_t)fetch();
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x41:
m_icount -= 12;
- m_eo = m_regs.w[BX] + m_regs.w[DI] + (INT8)fetch();
+ m_eo = m_regs.w[BX] + m_regs.w[DI] + (int8_t)fetch();
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x42:
m_icount -= 12;
- m_eo = m_regs.w[BP] + m_regs.w[SI] + (INT8)fetch();
+ m_eo = m_regs.w[BP] + m_regs.w[SI] + (int8_t)fetch();
m_ea = calc_addr(SS, m_eo, size, op);
break;
case 0x43:
m_icount -= 11;
- m_eo = m_regs.w[BP] + m_regs.w[DI] + (INT8)fetch();
+ m_eo = m_regs.w[BP] + m_regs.w[DI] + (int8_t)fetch();
m_ea = calc_addr(SS, m_eo, size, op);
break;
case 0x44:
m_icount -= 9;
- m_eo = m_regs.w[SI] + (INT8)fetch();
+ m_eo = m_regs.w[SI] + (int8_t)fetch();
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x45:
m_icount -= 9;
- m_eo = m_regs.w[DI] + (INT8)fetch();
+ m_eo = m_regs.w[DI] + (int8_t)fetch();
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x46:
m_icount -= 9;
- m_eo = m_regs.w[BP] + (INT8)fetch();
+ m_eo = m_regs.w[BP] + (int8_t)fetch();
m_ea = calc_addr(SS, m_eo, size, op);
break;
case 0x47:
m_icount -= 9;
- m_eo = m_regs.w[BX] + (INT8)fetch();
+ m_eo = m_regs.w[BX] + (int8_t)fetch();
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x80:
m_icount -= 11;
m_e16 = fetch_word();
- m_eo = m_regs.w[BX] + m_regs.w[SI] + (INT16)m_e16;
+ m_eo = m_regs.w[BX] + m_regs.w[SI] + (int16_t)m_e16;
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x81:
m_icount -= 12;
m_e16 = fetch_word();
- m_eo = m_regs.w[BX] + m_regs.w[DI] + (INT16)m_e16;
+ m_eo = m_regs.w[BX] + m_regs.w[DI] + (int16_t)m_e16;
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x82:
m_icount -= 11;
m_e16 = fetch_word();
- m_eo = m_regs.w[BP] + m_regs.w[SI] + (INT16)m_e16;
+ m_eo = m_regs.w[BP] + m_regs.w[SI] + (int16_t)m_e16;
m_ea = calc_addr(SS, m_eo, size, op);
break;
case 0x83:
m_icount -= 11;
m_e16 = fetch_word();
- m_eo = m_regs.w[BP] + m_regs.w[DI] + (INT16)m_e16;
+ m_eo = m_regs.w[BP] + m_regs.w[DI] + (int16_t)m_e16;
m_ea = calc_addr(SS, m_eo, size, op);
break;
case 0x84:
m_icount -= 9;
m_e16 = fetch_word();
- m_eo = m_regs.w[SI] + (INT16)m_e16;
+ m_eo = m_regs.w[SI] + (int16_t)m_e16;
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x85:
m_icount -= 9;
m_e16 = fetch_word();
- m_eo = m_regs.w[DI] + (INT16)m_e16;
+ m_eo = m_regs.w[DI] + (int16_t)m_e16;
m_ea = calc_addr(DS, m_eo, size, op);
break;
case 0x86:
m_icount -= 9;
m_e16 = fetch_word();
- m_eo = m_regs.w[BP] + (INT16)m_e16;
+ m_eo = m_regs.w[BP] + (int16_t)m_e16;
m_ea = calc_addr(SS, m_eo, size, op);
break;
case 0x87:
m_icount -= 9;
m_e16 = fetch_word();
- m_eo = m_regs.w[BX] + (INT16)m_e16;
+ m_eo = m_regs.w[BX] + (int16_t)m_e16;
m_ea = calc_addr(DS, m_eo, size, op);
break;
}
@@ -234,7 +234,7 @@ inline UINT32 i8086_common_cpu_device::get_ea(int size, int op)
}
-inline void i8086_common_cpu_device::PutbackRMByte(UINT8 data)
+inline void i8086_common_cpu_device::PutbackRMByte(uint8_t data)
{
if ( m_modrm >= 0xc0 )
{
@@ -247,7 +247,7 @@ inline void i8086_common_cpu_device::PutbackRMByte(UINT8 data)
}
-inline void i8086_common_cpu_device::PutbackRMWord(UINT16 data)
+inline void i8086_common_cpu_device::PutbackRMWord(uint16_t data)
{
if ( m_modrm >= 0xc0 )
{
@@ -267,12 +267,12 @@ inline void i8086_common_cpu_device::PutImmRMWord()
}
else
{
- UINT32 addr = get_ea(2, I8086_WRITE);
+ uint32_t addr = get_ea(2, I8086_WRITE);
write_word( addr, fetch_word() );
}
}
-inline void i8086_common_cpu_device::PutRMWord(UINT16 val)
+inline void i8086_common_cpu_device::PutRMWord(uint16_t val)
{
if ( m_modrm >= 0xc0 )
{
@@ -285,7 +285,7 @@ inline void i8086_common_cpu_device::PutRMWord(UINT16 val)
}
-inline void i8086_common_cpu_device::PutRMByte(UINT8 val)
+inline void i8086_common_cpu_device::PutRMByte(uint8_t val)
{
if ( m_modrm >= 0xc0 )
{
@@ -306,7 +306,7 @@ inline void i8086_common_cpu_device::PutImmRMByte()
}
else
{
- UINT32 addr = get_ea(1, I8086_WRITE);
+ uint32_t addr = get_ea(1, I8086_WRITE);
write_byte( addr, fetch() );
}
}
@@ -359,31 +359,31 @@ inline void i8086_common_cpu_device::DEF_axd16()
-inline void i8086_common_cpu_device::RegByte(UINT8 data)
+inline void i8086_common_cpu_device::RegByte(uint8_t data)
{
m_regs.b[ m_Mod_RM.reg.b[ m_modrm ] ] = data;
}
-inline void i8086_common_cpu_device::RegWord(UINT16 data)
+inline void i8086_common_cpu_device::RegWord(uint16_t data)
{
m_regs.w[ m_Mod_RM.reg.w[ m_modrm ] ] = data;
}
-inline UINT8 i8086_common_cpu_device::RegByte()
+inline uint8_t i8086_common_cpu_device::RegByte()
{
return m_regs.b[ m_Mod_RM.reg.b[ m_modrm ] ];
}
-inline UINT16 i8086_common_cpu_device::RegWord()
+inline uint16_t i8086_common_cpu_device::RegWord()
{
return m_regs.w[ m_Mod_RM.reg.w[ m_modrm ] ];
}
-inline UINT16 i8086_common_cpu_device::GetRMWord()
+inline uint16_t i8086_common_cpu_device::GetRMWord()
{
if ( m_modrm >= 0xc0 )
{
@@ -396,15 +396,15 @@ inline UINT16 i8086_common_cpu_device::GetRMWord()
}
-inline UINT16 i8086_common_cpu_device::GetnextRMWord()
+inline uint16_t i8086_common_cpu_device::GetnextRMWord()
{
- UINT32 addr = ( m_ea & ~0xffff ) | ( ( m_ea + 2 ) & 0xffff );
+ uint32_t addr = ( m_ea & ~0xffff ) | ( ( m_ea + 2 ) & 0xffff );
return read_word( addr );
}
-inline UINT8 i8086_common_cpu_device::GetRMByte()
+inline uint8_t i8086_common_cpu_device::GetRMByte()
{
if ( m_modrm >= 0xc0 )
{
@@ -417,25 +417,25 @@ inline UINT8 i8086_common_cpu_device::GetRMByte()
}
-inline void i8086_common_cpu_device::PutMemB(int seg, UINT16 offset, UINT8 data)
+inline void i8086_common_cpu_device::PutMemB(int seg, uint16_t offset, uint8_t data)
{
write_byte( calc_addr(seg, offset, 1, I8086_WRITE), data);
}
-inline void i8086_common_cpu_device::PutMemW(int seg, UINT16 offset, UINT16 data)
+inline void i8086_common_cpu_device::PutMemW(int seg, uint16_t offset, uint16_t data)
{
write_word( calc_addr( seg, offset, 2, I8086_WRITE), data);
}
-inline UINT8 i8086_common_cpu_device::GetMemB(int seg, UINT16 offset)
+inline uint8_t i8086_common_cpu_device::GetMemB(int seg, uint16_t offset)
{
return read_byte( calc_addr(seg, offset, 1, I8086_READ) );
}
-inline UINT16 i8086_common_cpu_device::GetMemW(int seg, UINT16 offset)
+inline uint16_t i8086_common_cpu_device::GetMemW(int seg, uint16_t offset)
{
return read_word( calc_addr(seg, offset, 2, I8086_READ) );
}
@@ -443,68 +443,68 @@ inline UINT16 i8086_common_cpu_device::GetMemW(int seg, UINT16 offset)
// Setting flags
-inline void i8086_common_cpu_device::set_CFB(UINT32 x)
+inline void i8086_common_cpu_device::set_CFB(uint32_t x)
{
m_CarryVal = x & 0x100;
}
-inline void i8086_common_cpu_device::set_CFW(UINT32 x)
+inline void i8086_common_cpu_device::set_CFW(uint32_t x)
{
m_CarryVal = x & 0x10000;
}
-inline void i8086_common_cpu_device::set_AF(UINT32 x,UINT32 y,UINT32 z)
+inline void i8086_common_cpu_device::set_AF(uint32_t x,uint32_t y,uint32_t z)
{
m_AuxVal = (x ^ (y ^ z)) & 0x10;
}
-inline void i8086_common_cpu_device::set_SF(UINT32 x)
+inline void i8086_common_cpu_device::set_SF(uint32_t x)
{
m_SignVal = x;
}
-inline void i8086_common_cpu_device::set_ZF(UINT32 x)
+inline void i8086_common_cpu_device::set_ZF(uint32_t x)
{
m_ZeroVal = x;
}
-inline void i8086_common_cpu_device::set_PF(UINT32 x)
+inline void i8086_common_cpu_device::set_PF(uint32_t x)
{
m_ParityVal = x;
}
-inline void i8086_common_cpu_device::set_SZPF_Byte(UINT32 x)
+inline void i8086_common_cpu_device::set_SZPF_Byte(uint32_t x)
{
- m_SignVal = m_ZeroVal = m_ParityVal = (INT8)x;
+ m_SignVal = m_ZeroVal = m_ParityVal = (int8_t)x;
}
-inline void i8086_common_cpu_device::set_SZPF_Word(UINT32 x)
+inline void i8086_common_cpu_device::set_SZPF_Word(uint32_t x)
{
- m_SignVal = m_ZeroVal = m_ParityVal = (INT16)x;
+ m_SignVal = m_ZeroVal = m_ParityVal = (int16_t)x;
}
-inline void i8086_common_cpu_device::set_OFW_Add(UINT32 x,UINT32 y,UINT32 z)
+inline void i8086_common_cpu_device::set_OFW_Add(uint32_t x,uint32_t y,uint32_t z)
{
m_OverVal = (x ^ y) & (x ^ z) & 0x8000;
}
-inline void i8086_common_cpu_device::set_OFB_Add(UINT32 x,UINT32 y,UINT32 z)
+inline void i8086_common_cpu_device::set_OFB_Add(uint32_t x,uint32_t y,uint32_t z)
{
m_OverVal = (x ^ y) & (x ^ z) & 0x80;
}
-inline void i8086_common_cpu_device::set_OFW_Sub(UINT32 x,UINT32 y,UINT32 z)
+inline void i8086_common_cpu_device::set_OFW_Sub(uint32_t x,uint32_t y,uint32_t z)
{
m_OverVal = (z ^ y) & (z ^ x) & 0x8000;
}
-inline void i8086_common_cpu_device::set_OFB_Sub(UINT32 x,UINT32 y,UINT32 z)
+inline void i8086_common_cpu_device::set_OFB_Sub(uint32_t x,uint32_t y,uint32_t z)
{
m_OverVal = (z ^ y) & (z ^ x) & 0x80;
}
-inline UINT16 i8086_common_cpu_device::CompressFlags() const
+inline uint16_t i8086_common_cpu_device::CompressFlags() const
{
return (CF ? 1 : 0)
| (1 << 1)
@@ -521,7 +521,7 @@ inline UINT16 i8086_common_cpu_device::CompressFlags() const
| (m_MF << 15);
}
-inline void i8086_common_cpu_device::ExpandFlags(UINT16 f)
+inline void i8086_common_cpu_device::ExpandFlags(uint16_t f)
{
m_CarryVal = (f) & 1;
m_ParityVal = !((f) & 4);
@@ -539,7 +539,7 @@ inline void i8086_common_cpu_device::ExpandFlags(UINT16 f)
inline void i8086_common_cpu_device::i_insb()
{
- UINT32 ea = calc_addr(ES, m_regs.w[DI], 1, I8086_WRITE);
+ uint32_t ea = calc_addr(ES, m_regs.w[DI], 1, I8086_WRITE);
write_byte(ea, read_port_byte(m_regs.w[DX]));
m_regs.w[DI] += -2 * m_DF + 1;
CLK(IN_IMM8);
@@ -547,7 +547,7 @@ inline void i8086_common_cpu_device::i_insb()
inline void i8086_common_cpu_device::i_insw()
{
- UINT32 ea = calc_addr(ES, m_regs.w[DI], 2, I8086_WRITE);
+ uint32_t ea = calc_addr(ES, m_regs.w[DI], 2, I8086_WRITE);
write_word(ea, read_port_word(m_regs.w[DX]));
m_regs.w[DI] += -4 * m_DF + 2;
CLK(IN_IMM16);
@@ -569,7 +569,7 @@ inline void i8086_common_cpu_device::i_outsw()
inline void i8086_common_cpu_device::i_movsb()
{
- UINT8 tmp = GetMemB( DS, m_regs.w[SI] );
+ uint8_t tmp = GetMemB( DS, m_regs.w[SI] );
PutMemB( ES, m_regs.w[DI], tmp);
m_regs.w[DI] += -2 * m_DF + 1;
m_regs.w[SI] += -2 * m_DF + 1;
@@ -578,7 +578,7 @@ inline void i8086_common_cpu_device::i_movsb()
inline void i8086_common_cpu_device::i_movsw()
{
- UINT16 tmp = GetMemW( DS, m_regs.w[SI] );
+ uint16_t tmp = GetMemW( DS, m_regs.w[SI] );
PutMemW( ES, m_regs.w[DI], tmp );
m_regs.w[DI] += -4 * m_DF + 2;
m_regs.w[SI] += -4 * m_DF + 2;
@@ -654,7 +654,7 @@ inline void i8086_common_cpu_device::i_scasw()
inline void i8086_common_cpu_device::i_popf()
{
- UINT32 tmp = POP();
+ uint32_t tmp = POP();
ExpandFlags(tmp | 0xf000);
CLK(POPF);
@@ -665,9 +665,9 @@ inline void i8086_common_cpu_device::i_popf()
}
-inline UINT32 i8086_common_cpu_device::ADDB()
+inline uint32_t i8086_common_cpu_device::ADDB()
{
- UINT32 res = m_dst + m_src;
+ uint32_t res = m_dst + m_src;
set_OFB_Add(res,m_src,m_dst);
set_AF(res,m_src,m_dst);
@@ -677,9 +677,9 @@ inline UINT32 i8086_common_cpu_device::ADDB()
}
-inline UINT32 i8086_common_cpu_device::ADDX()
+inline uint32_t i8086_common_cpu_device::ADDX()
{
- UINT32 res = m_dst + m_src;
+ uint32_t res = m_dst + m_src;
set_OFW_Add(res,m_src,m_dst);
set_AF(res,m_src,m_dst);
@@ -689,9 +689,9 @@ inline UINT32 i8086_common_cpu_device::ADDX()
}
-inline UINT32 i8086_common_cpu_device::SUBB()
+inline uint32_t i8086_common_cpu_device::SUBB()
{
- UINT32 res = m_dst - m_src;
+ uint32_t res = m_dst - m_src;
set_OFB_Sub(res,m_src,m_dst);
set_AF(res,m_src,m_dst);
@@ -701,9 +701,9 @@ inline UINT32 i8086_common_cpu_device::SUBB()
}
-inline UINT32 i8086_common_cpu_device::SUBX()
+inline uint32_t i8086_common_cpu_device::SUBX()
{
- UINT32 res = m_dst - m_src;
+ uint32_t res = m_dst - m_src;
set_OFW_Sub(res,m_src,m_dst);
set_AF(res,m_src,m_dst);
@@ -811,7 +811,7 @@ inline void i8086_common_cpu_device::RORC_WORD()
m_dst >>= 1;
}
-inline void i8086_common_cpu_device::SHL_BYTE(UINT8 c)
+inline void i8086_common_cpu_device::SHL_BYTE(uint8_t c)
{
while (c--)
m_dst <<= 1;
@@ -821,7 +821,7 @@ inline void i8086_common_cpu_device::SHL_BYTE(UINT8 c)
PutbackRMByte(m_dst);
}
-inline void i8086_common_cpu_device::SHL_WORD(UINT8 c)
+inline void i8086_common_cpu_device::SHL_WORD(uint8_t c)
{
while (c--)
m_dst <<= 1;
@@ -831,7 +831,7 @@ inline void i8086_common_cpu_device::SHL_WORD(UINT8 c)
PutbackRMWord(m_dst);
}
-inline void i8086_common_cpu_device::SHR_BYTE(UINT8 c)
+inline void i8086_common_cpu_device::SHR_BYTE(uint8_t c)
{
while (c--)
{
@@ -843,7 +843,7 @@ inline void i8086_common_cpu_device::SHR_BYTE(UINT8 c)
PutbackRMByte(m_dst);
}
-inline void i8086_common_cpu_device::SHR_WORD(UINT8 c)
+inline void i8086_common_cpu_device::SHR_WORD(uint8_t c)
{
while (c--)
{
@@ -855,24 +855,24 @@ inline void i8086_common_cpu_device::SHR_WORD(UINT8 c)
PutbackRMWord(m_dst);
}
-inline void i8086_common_cpu_device::SHRA_BYTE(UINT8 c)
+inline void i8086_common_cpu_device::SHRA_BYTE(uint8_t c)
{
while (c--)
{
m_CarryVal = m_dst & 0x01;
- m_dst = ((INT8) m_dst) >> 1;
+ m_dst = ((int8_t) m_dst) >> 1;
}
set_SZPF_Byte(m_dst);
PutbackRMByte(m_dst);
}
-inline void i8086_common_cpu_device::SHRA_WORD(UINT8 c)
+inline void i8086_common_cpu_device::SHRA_WORD(uint8_t c)
{
while (c--)
{
m_CarryVal = m_dst & 0x01;
- m_dst = ((INT16) m_dst) >> 1;
+ m_dst = ((int16_t) m_dst) >> 1;
}
set_SZPF_Word(m_dst);
@@ -880,19 +880,19 @@ inline void i8086_common_cpu_device::SHRA_WORD(UINT8 c)
}
-inline void i8086_common_cpu_device::XchgAXReg(UINT8 reg)
+inline void i8086_common_cpu_device::XchgAXReg(uint8_t reg)
{
- UINT16 tmp = m_regs.w[reg];
+ uint16_t tmp = m_regs.w[reg];
m_regs.w[reg] = m_regs.w[AX];
m_regs.w[AX] = tmp;
}
-inline void i8086_common_cpu_device::IncWordReg(UINT8 reg)
+inline void i8086_common_cpu_device::IncWordReg(uint8_t reg)
{
- UINT32 tmp = m_regs.w[reg];
- UINT32 tmp1 = tmp+1;
+ uint32_t tmp = m_regs.w[reg];
+ uint32_t tmp1 = tmp+1;
m_OverVal = (tmp == 0x7fff);
set_AF(tmp1,tmp,1);
@@ -901,10 +901,10 @@ inline void i8086_common_cpu_device::IncWordReg(UINT8 reg)
}
-inline void i8086_common_cpu_device::DecWordReg(UINT8 reg)
+inline void i8086_common_cpu_device::DecWordReg(uint8_t reg)
{
- UINT32 tmp = m_regs.w[reg];
- UINT32 tmp1 = tmp-1;
+ uint32_t tmp = m_regs.w[reg];
+ uint32_t tmp1 = tmp-1;
m_OverVal = (tmp == 0x8000);
set_AF(tmp1,tmp,1);
@@ -913,16 +913,16 @@ inline void i8086_common_cpu_device::DecWordReg(UINT8 reg)
}
-inline void i8086_common_cpu_device::PUSH(UINT16 data)
+inline void i8086_common_cpu_device::PUSH(uint16_t data)
{
write_word(calc_addr(SS, m_regs.w[SP] - 2, 2, I8086_WRITE, false), data);
m_regs.w[SP] -= 2;
}
-inline UINT16 i8086_common_cpu_device::POP()
+inline uint16_t i8086_common_cpu_device::POP()
{
- UINT16 data = read_word(calc_addr(SS, m_regs.w[SP], 2, I8086_READ, false));
+ uint16_t data = read_word(calc_addr(SS, m_regs.w[SP], 2, I8086_READ, false));
m_regs.w[SP] += 2;
return data;
@@ -931,7 +931,7 @@ inline UINT16 i8086_common_cpu_device::POP()
inline void i8086_common_cpu_device::JMP(bool cond)
{
- int rel = (int)((INT8)fetch());
+ int rel = (int)((int8_t)fetch());
if (cond)
{
@@ -943,11 +943,11 @@ inline void i8086_common_cpu_device::JMP(bool cond)
}
-inline void i8086_common_cpu_device::ADJ4(INT8 param1,INT8 param2)
+inline void i8086_common_cpu_device::ADJ4(int8_t param1,int8_t param2)
{
if (AF || ((m_regs.b[AL] & 0xf) > 9))
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = m_regs.b[AL] + param1;
m_regs.b[AL] = tmp;
m_AuxVal = 1;
@@ -962,7 +962,7 @@ inline void i8086_common_cpu_device::ADJ4(INT8 param1,INT8 param2)
}
-inline void i8086_common_cpu_device::ADJB(INT8 param1, INT8 param2)
+inline void i8086_common_cpu_device::ADJB(int8_t param1, int8_t param2)
{
if (AF || ((m_regs.b[AL] & 0xf) > 9))
{
diff --git a/src/devices/cpu/i860/i860.cpp b/src/devices/cpu/i860/i860.cpp
index 96ad4e967c9..fff1efec75a 100644
--- a/src/devices/cpu/i860/i860.cpp
+++ b/src/devices/cpu/i860/i860.cpp
@@ -34,7 +34,7 @@ enum {
const device_type I860 = &device_creator<i860_cpu_device>;
-i860_cpu_device::i860_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i860_cpu_device::i860_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, I860, "i860XR", tag, owner, clock, "i860xr", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 64, 32, 0), m_pc(0), m_merge(0), m_pin_bus_hold(0), m_pin_reset(0), m_exiting_readmem(0), m_exiting_ifetch(0), m_pc_updated(0), m_pending_trap(0), m_fir_gets_trap_addr(0), m_single_stepping(0), m_program(nullptr), m_icount(0)
{
@@ -225,7 +225,7 @@ void i860_cpu_device::device_reset()
}
-offs_t i860_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i860_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i860 );
return CPU_DISASSEMBLE_NAME(i860)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/i860/i860.h b/src/devices/cpu/i860/i860.h
index 248cab2d4ba..0eec3c055a0 100644
--- a/src/devices/cpu/i860/i860.h
+++ b/src/devices/cpu/i860/i860.h
@@ -48,7 +48,7 @@ class i860_cpu_device : public cpu_device
{
public:
// construction/destruction
- i860_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i860_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
/* This is the external interface for asserting an external interrupt
to the i860. */
@@ -67,9 +67,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 8; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 8; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -80,26 +80,26 @@ protected:
void state_import(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
/* Integer registers (32 x 32-bits). */
- UINT32 m_iregs[32];
+ uint32_t m_iregs[32];
/* Floating point registers (32 x 32-bits, 16 x 64 bits, or 8 x 128 bits).
When referenced as pairs or quads, the higher numbered registers
are the upper bits. E.g., double precision f0 is f1:f0. */
- UINT8 m_frg[32 * 4];
+ uint8_t m_frg[32 * 4];
/* Control registers (6 x 32-bits). */
- UINT32 m_cregs[6];
+ uint32_t m_cregs[6];
/* Program counter (1 x 32-bits). Reset starts at pc=0xffffff00. */
- UINT32 m_pc;
+ uint32_t m_pc;
/* Special registers (4 x 64-bits). */
union
@@ -107,7 +107,7 @@ private:
float s;
double d;
} m_KR, m_KI, m_T;
- UINT64 m_merge;
+ uint64_t m_merge;
/* The adder pipeline, always 3 stages. */
struct
@@ -202,91 +202,91 @@ private:
address_space *m_program;
int m_icount;
// For debugger
- UINT32 m_freg[32];
-
- void writememi_emu (UINT32 addr, int size, UINT32 data);
- void fp_readmem_emu (UINT32 addr, int size, UINT8 *dest);
- void fp_writemem_emu (UINT32 addr, int size, UINT8 *data, UINT32 wmask);
- void unrecog_opcode (UINT32 pc, UINT32 insn);
- void insn_ld_ctrl (UINT32 insn);
- void insn_st_ctrl (UINT32 insn);
- void insn_ldx (UINT32 insn);
- void insn_stx (UINT32 insn);
- void insn_fsty (UINT32 insn);
- void insn_fldy (UINT32 insn);
- void insn_pstd (UINT32 insn);
- void insn_ixfr (UINT32 insn);
- void insn_addu (UINT32 insn);
- void insn_addu_imm (UINT32 insn);
- void insn_adds (UINT32 insn);
- void insn_adds_imm (UINT32 insn);
- void insn_subu (UINT32 insn);
- void insn_subu_imm (UINT32 insn);
- void insn_subs (UINT32 insn);
- void insn_subs_imm (UINT32 insn);
- void insn_shl (UINT32 insn);
- void insn_shl_imm (UINT32 insn);
- void insn_shr (UINT32 insn);
- void insn_shr_imm (UINT32 insn);
- void insn_shra (UINT32 insn);
- void insn_shra_imm (UINT32 insn);
- void insn_shrd (UINT32 insn);
- void insn_and (UINT32 insn);
- void insn_and_imm (UINT32 insn);
- void insn_andh_imm (UINT32 insn);
- void insn_andnot (UINT32 insn);
- void insn_andnot_imm (UINT32 insn);
- void insn_andnoth_imm (UINT32 insn);
- void insn_or (UINT32 insn);
- void insn_or_imm (UINT32 insn);
- void insn_orh_imm (UINT32 insn);
- void insn_xor (UINT32 insn);
- void insn_xor_imm (UINT32 insn);
- void insn_xorh_imm (UINT32 insn);
- void insn_trap (UINT32 insn);
- void insn_intovr (UINT32 insn);
- void insn_bte (UINT32 insn);
- void insn_bte_imm (UINT32 insn);
- void insn_btne (UINT32 insn);
- void insn_btne_imm (UINT32 insn);
- void insn_bc (UINT32 insn);
- void insn_bnc (UINT32 insn);
- void insn_bct (UINT32 insn);
- void insn_bnct (UINT32 insn);
- void insn_call (UINT32 insn);
- void insn_br (UINT32 insn);
- void insn_bri (UINT32 insn);
- void insn_calli (UINT32 insn);
- void insn_bla (UINT32 insn);
- void insn_flush (UINT32 insn);
- void insn_fmul (UINT32 insn);
- void insn_fmlow (UINT32 insn);
- void insn_fadd_sub (UINT32 insn);
- void insn_dualop (UINT32 insn);
- void insn_frcp (UINT32 insn);
- void insn_frsqr (UINT32 insn);
- void insn_fxfr (UINT32 insn);
- void insn_ftrunc (UINT32 insn);
- void insn_famov (UINT32 insn);
- void insn_fiadd_sub (UINT32 insn);
- void insn_fcmp (UINT32 insn);
- void insn_fzchk (UINT32 insn);
- void insn_form (UINT32 insn);
- void insn_faddp (UINT32 insn);
- void insn_faddz (UINT32 insn);
- void decode_exec (UINT32 insn, UINT32 non_shadow);
+ uint32_t m_freg[32];
+
+ void writememi_emu (uint32_t addr, int size, uint32_t data);
+ void fp_readmem_emu (uint32_t addr, int size, uint8_t *dest);
+ void fp_writemem_emu (uint32_t addr, int size, uint8_t *data, uint32_t wmask);
+ void unrecog_opcode (uint32_t pc, uint32_t insn);
+ void insn_ld_ctrl (uint32_t insn);
+ void insn_st_ctrl (uint32_t insn);
+ void insn_ldx (uint32_t insn);
+ void insn_stx (uint32_t insn);
+ void insn_fsty (uint32_t insn);
+ void insn_fldy (uint32_t insn);
+ void insn_pstd (uint32_t insn);
+ void insn_ixfr (uint32_t insn);
+ void insn_addu (uint32_t insn);
+ void insn_addu_imm (uint32_t insn);
+ void insn_adds (uint32_t insn);
+ void insn_adds_imm (uint32_t insn);
+ void insn_subu (uint32_t insn);
+ void insn_subu_imm (uint32_t insn);
+ void insn_subs (uint32_t insn);
+ void insn_subs_imm (uint32_t insn);
+ void insn_shl (uint32_t insn);
+ void insn_shl_imm (uint32_t insn);
+ void insn_shr (uint32_t insn);
+ void insn_shr_imm (uint32_t insn);
+ void insn_shra (uint32_t insn);
+ void insn_shra_imm (uint32_t insn);
+ void insn_shrd (uint32_t insn);
+ void insn_and (uint32_t insn);
+ void insn_and_imm (uint32_t insn);
+ void insn_andh_imm (uint32_t insn);
+ void insn_andnot (uint32_t insn);
+ void insn_andnot_imm (uint32_t insn);
+ void insn_andnoth_imm (uint32_t insn);
+ void insn_or (uint32_t insn);
+ void insn_or_imm (uint32_t insn);
+ void insn_orh_imm (uint32_t insn);
+ void insn_xor (uint32_t insn);
+ void insn_xor_imm (uint32_t insn);
+ void insn_xorh_imm (uint32_t insn);
+ void insn_trap (uint32_t insn);
+ void insn_intovr (uint32_t insn);
+ void insn_bte (uint32_t insn);
+ void insn_bte_imm (uint32_t insn);
+ void insn_btne (uint32_t insn);
+ void insn_btne_imm (uint32_t insn);
+ void insn_bc (uint32_t insn);
+ void insn_bnc (uint32_t insn);
+ void insn_bct (uint32_t insn);
+ void insn_bnct (uint32_t insn);
+ void insn_call (uint32_t insn);
+ void insn_br (uint32_t insn);
+ void insn_bri (uint32_t insn);
+ void insn_calli (uint32_t insn);
+ void insn_bla (uint32_t insn);
+ void insn_flush (uint32_t insn);
+ void insn_fmul (uint32_t insn);
+ void insn_fmlow (uint32_t insn);
+ void insn_fadd_sub (uint32_t insn);
+ void insn_dualop (uint32_t insn);
+ void insn_frcp (uint32_t insn);
+ void insn_frsqr (uint32_t insn);
+ void insn_fxfr (uint32_t insn);
+ void insn_ftrunc (uint32_t insn);
+ void insn_famov (uint32_t insn);
+ void insn_fiadd_sub (uint32_t insn);
+ void insn_fcmp (uint32_t insn);
+ void insn_fzchk (uint32_t insn);
+ void insn_form (uint32_t insn);
+ void insn_faddp (uint32_t insn);
+ void insn_faddz (uint32_t insn);
+ void decode_exec (uint32_t insn, uint32_t non_shadow);
float get_fregval_s (int fr);
double get_fregval_d (int fr);
void set_fregval_s (int fr, float s);
void set_fregval_d (int fr, double d);
- int has_delay_slot(UINT32 insn);
- UINT32 ifetch (UINT32 pc);
- UINT32 get_address_translation (UINT32 vaddr, int is_dataref, int is_write);
- UINT32 readmemi_emu (UINT32 addr, int size);
- float get_fval_from_optype_s (UINT32 insn, int optype);
- double get_fval_from_optype_d (UINT32 insn, int optype);
-
- typedef void (i860_cpu_device::*insn_func)(UINT32);
+ int has_delay_slot(uint32_t insn);
+ uint32_t ifetch (uint32_t pc);
+ uint32_t get_address_translation (uint32_t vaddr, int is_dataref, int is_write);
+ uint32_t readmemi_emu (uint32_t addr, int size);
+ float get_fval_from_optype_s (uint32_t insn, int optype);
+ double get_fval_from_optype_d (uint32_t insn, int optype);
+
+ typedef void (i860_cpu_device::*insn_func)(uint32_t);
struct decode_tbl_t
{
/* Execute function for this opcode. */
diff --git a/src/devices/cpu/i860/i860dasm.cpp b/src/devices/cpu/i860/i860dasm.cpp
index 60c83a5fec0..03d24e2d2a8 100644
--- a/src/devices/cpu/i860/i860dasm.cpp
+++ b/src/devices/cpu/i860/i860dasm.cpp
@@ -3,43 +3,43 @@
#include "i860.h"
/* Sub-group decoders */
-static void i860_dasm_core_dasm(const UINT32 op, char* buffer);
-static void i860_dasm_floating_point_dasm(const UINT32 op, char* buffer);
-static void i860_dasm_CTRL_dasm(const UINT32 op, char* buffer);
+static void i860_dasm_core_dasm(const uint32_t op, char* buffer);
+static void i860_dasm_floating_point_dasm(const uint32_t op, char* buffer);
+static void i860_dasm_CTRL_dasm(const uint32_t op, char* buffer);
/* REG-Format Opcodes*/
-static void i860_dasm_ldx(const UINT32 op, char* buffer);
-static void i860_dasm_stx(const UINT32 op, char* buffer);
-static void i860_dasm_ixfr(const UINT32 op, char* buffer);
-static void i860_dasm_fid_fst(const UINT32 op, char* buffer);
-static void i860_dasm_flush(const UINT32 op, char* buffer);
-static void i860_dasm_pstd(const UINT32 op, char* buffer);
-static void i860_dasm_ldc_sdc(const UINT32 op, char* buffer);
-static void i860_dasm_bri(const UINT32 op, char* buffer);
-static void i860_dasm_trap(const UINT32 op, char* buffer);
-static void i860_dasm_bte_btne(const UINT32 op, char* buffer);
-static void i860_dasm_pfidy(const UINT32 op, char* buffer);
-static void i860_dasm_addu_subu(const UINT32 op, char* buffer);
-static void i860_dasm_shl_shr(const UINT32 op, char* buffer);
-static void i860_dasm_shrd(const UINT32 op, char* buffer);
-static void i860_dasm_bla(const UINT32 op, char* buffer);
-static void i860_dasm_shra(const UINT32 op, char* buffer);
-static void i860_dasm_and_andh(const UINT32 op, char* buffer);
-static void i860_dasm_andnot_andnoth(const UINT32 op, char* buffer);
-static void i860_dasm_or_orh(const UINT32 op, char* buffer);
-static void i860_dasm_xor_xorh(const UINT32 op, char* buffer);
+static void i860_dasm_ldx(const uint32_t op, char* buffer);
+static void i860_dasm_stx(const uint32_t op, char* buffer);
+static void i860_dasm_ixfr(const uint32_t op, char* buffer);
+static void i860_dasm_fid_fst(const uint32_t op, char* buffer);
+static void i860_dasm_flush(const uint32_t op, char* buffer);
+static void i860_dasm_pstd(const uint32_t op, char* buffer);
+static void i860_dasm_ldc_sdc(const uint32_t op, char* buffer);
+static void i860_dasm_bri(const uint32_t op, char* buffer);
+static void i860_dasm_trap(const uint32_t op, char* buffer);
+static void i860_dasm_bte_btne(const uint32_t op, char* buffer);
+static void i860_dasm_pfidy(const uint32_t op, char* buffer);
+static void i860_dasm_addu_subu(const uint32_t op, char* buffer);
+static void i860_dasm_shl_shr(const uint32_t op, char* buffer);
+static void i860_dasm_shrd(const uint32_t op, char* buffer);
+static void i860_dasm_bla(const uint32_t op, char* buffer);
+static void i860_dasm_shra(const uint32_t op, char* buffer);
+static void i860_dasm_and_andh(const uint32_t op, char* buffer);
+static void i860_dasm_andnot_andnoth(const uint32_t op, char* buffer);
+static void i860_dasm_or_orh(const uint32_t op, char* buffer);
+static void i860_dasm_xor_xorh(const uint32_t op, char* buffer);
/* CORE Escape Opcodes */
-static void i860_dasm_CORE_lock(const UINT32 op, char* buffer);
-static void i860_dasm_CORE_calli(const UINT32 op, char* buffer);
-static void i860_dasm_CORE_intovr(const UINT32 op, char* buffer);
-static void i860_dasm_CORE_unlock(const UINT32 op, char* buffer);
+static void i860_dasm_CORE_lock(const uint32_t op, char* buffer);
+static void i860_dasm_CORE_calli(const uint32_t op, char* buffer);
+static void i860_dasm_CORE_intovr(const uint32_t op, char* buffer);
+static void i860_dasm_CORE_unlock(const uint32_t op, char* buffer);
/* CTRL-Format Opcodes */
-static void i860_dasm_CTRL_br(const UINT32 op, char* buffer);
-static void i860_dasm_CTRL_call(const UINT32 op, char* buffer);
-static void i860_dasm_CTRL_bc_bct(const UINT32 op, char* buffer);
-static void i860_dasm_CTRL_bnc_bnct(const UINT32 op, char* buffer);
+static void i860_dasm_CTRL_br(const uint32_t op, char* buffer);
+static void i860_dasm_CTRL_call(const uint32_t op, char* buffer);
+static void i860_dasm_CTRL_bc_bct(const uint32_t op, char* buffer);
+static void i860_dasm_CTRL_bnc_bnct(const uint32_t op, char* buffer);
/* Floating-Point Instructions */
@@ -49,13 +49,13 @@ CPU_DISASSEMBLE( i860 )
char tempB[1024] = "";
/* Little Endian */
- const UINT32 op = (oprom[3] << 24) | (oprom[2] << 16) | (oprom[1] << 8) | (oprom[0] << 0);
- //const UINT32 op = (oprom[2] << 24) | (oprom[3] << 16) | (oprom[0] << 8) | (oprom[1] << 0); /* Mixed Endian */
- //const UINT32 op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | (oprom[3] << 0); /* Big Endian */
- //const UINT32 op = (oprom[1] << 24) | (oprom[0] << 16) | (oprom[3] << 8) | (oprom[2] << 0); /* Mixed Endian */
+ const uint32_t op = (oprom[3] << 24) | (oprom[2] << 16) | (oprom[1] << 8) | (oprom[0] << 0);
+ //const uint32_t op = (oprom[2] << 24) | (oprom[3] << 16) | (oprom[0] << 8) | (oprom[1] << 0); /* Mixed Endian */
+ //const uint32_t op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | (oprom[3] << 0); /* Big Endian */
+ //const uint32_t op = (oprom[1] << 24) | (oprom[0] << 16) | (oprom[3] << 8) | (oprom[2] << 0); /* Mixed Endian */
/* The opcode is the top 6 bits */
- UINT8 opcode = (op >> 26) & 0x3f;
+ uint8_t opcode = (op >> 26) & 0x3f;
/* DEBUG - print this out if you feel things are going a bit wonky */
// sprintf(buffer, "%08x : oo %02x", op, opcode);
@@ -172,9 +172,9 @@ CPU_DISASSEMBLE( i860 )
/**********************/
/* Sub-group decoders */
/**********************/
-static void i860_dasm_core_dasm(const UINT32 op, char* buffer)
+static void i860_dasm_core_dasm(const uint32_t op, char* buffer)
{
- //UINT8 src1 = (op >> 11) & 0x0000001f;
+ //uint8_t src1 = (op >> 11) & 0x0000001f;
/* Reserved bits must be set to 0 */
if ( (op & 0x000007e0) || (op & 0x03ff0000) )
@@ -194,14 +194,14 @@ static void i860_dasm_core_dasm(const UINT32 op, char* buffer)
}
}
-static void i860_dasm_floating_point_dasm(const UINT32 op, char* buffer)
+static void i860_dasm_floating_point_dasm(const uint32_t op, char* buffer)
{
sprintf(buffer, "[[F-P unit]]");
}
-static void i860_dasm_CTRL_dasm(const UINT32 op, char* buffer)
+static void i860_dasm_CTRL_dasm(const uint32_t op, char* buffer)
{
- UINT8 opc = (op >> 26) & 0x07;
+ uint8_t opc = (op >> 26) & 0x07;
switch(opc)
{
@@ -218,108 +218,108 @@ static void i860_dasm_CTRL_dasm(const UINT32 op, char* buffer)
/*********************/
/* REG-Format Opcodes*/
/*********************/
-static void i860_dasm_ldx(const UINT32 op, char* buffer)
+static void i860_dasm_ldx(const uint32_t op, char* buffer)
{
sprintf(buffer, "ldx");
}
-static void i860_dasm_stx(const UINT32 op, char* buffer)
+static void i860_dasm_stx(const uint32_t op, char* buffer)
{
sprintf(buffer, "stx");
}
-static void i860_dasm_ixfr(const UINT32 op, char* buffer)
+static void i860_dasm_ixfr(const uint32_t op, char* buffer)
{
-// UINT16 val = op & 0x7ff;
-// UINT8 opc = (op >> 26) & 0x3f;
-// UINT8 src2 = (op >> 21) & 0x1f;
-// UINT8 dest = (op >> 16) & 0x1f;
-// UINT8 src1 = (op >> 11) & 0x1f;
+// uint16_t val = op & 0x7ff;
+// uint8_t opc = (op >> 26) & 0x3f;
+// uint8_t src2 = (op >> 21) & 0x1f;
+// uint8_t dest = (op >> 16) & 0x1f;
+// uint8_t src1 = (op >> 11) & 0x1f;
sprintf(buffer, "ixfr");
}
-static void i860_dasm_fid_fst(const UINT32 op, char* buffer)
+static void i860_dasm_fid_fst(const uint32_t op, char* buffer)
{
sprintf(buffer, "fst");
}
-static void i860_dasm_flush(const UINT32 op, char* buffer)
+static void i860_dasm_flush(const uint32_t op, char* buffer)
{
sprintf(buffer, "flush");
}
-static void i860_dasm_pstd(const UINT32 op, char* buffer)
+static void i860_dasm_pstd(const uint32_t op, char* buffer)
{
sprintf(buffer, "pstd");
}
-static void i860_dasm_ldc_sdc(const UINT32 op, char* buffer)
+static void i860_dasm_ldc_sdc(const uint32_t op, char* buffer)
{
sprintf(buffer, "ldc, sdc");
}
-static void i860_dasm_bri(const UINT32 op, char* buffer)
+static void i860_dasm_bri(const uint32_t op, char* buffer)
{
sprintf(buffer, "bri");
}
-static void i860_dasm_trap(const UINT32 op, char* buffer)
+static void i860_dasm_trap(const uint32_t op, char* buffer)
{
sprintf(buffer, "trap");
}
-static void i860_dasm_bte_btne(const UINT32 op, char* buffer)
+static void i860_dasm_bte_btne(const uint32_t op, char* buffer)
{
sprintf(buffer, "bte, btne");
}
-static void i860_dasm_pfidy(const UINT32 op, char* buffer)
+static void i860_dasm_pfidy(const uint32_t op, char* buffer)
{
sprintf(buffer, "pfidy");
}
-static void i860_dasm_addu_subu(const UINT32 op, char* buffer)
+static void i860_dasm_addu_subu(const uint32_t op, char* buffer)
{
sprintf(buffer, "addu, subu");
}
-static void i860_dasm_shl_shr(const UINT32 op, char* buffer)
+static void i860_dasm_shl_shr(const uint32_t op, char* buffer)
{
sprintf(buffer, "shl, shr");
}
-static void i860_dasm_shrd(const UINT32 op, char* buffer)
+static void i860_dasm_shrd(const uint32_t op, char* buffer)
{
sprintf(buffer, "shrd");
}
-static void i860_dasm_bla(const UINT32 op, char* buffer)
+static void i860_dasm_bla(const uint32_t op, char* buffer)
{
sprintf(buffer, "bla");
}
-static void i860_dasm_shra(const UINT32 op, char* buffer)
+static void i860_dasm_shra(const uint32_t op, char* buffer)
{
sprintf(buffer, "shra");
}
-static void i860_dasm_and_andh(const UINT32 op, char* buffer)
+static void i860_dasm_and_andh(const uint32_t op, char* buffer)
{
sprintf(buffer, "and, andh");
}
-static void i860_dasm_andnot_andnoth(const UINT32 op, char* buffer)
+static void i860_dasm_andnot_andnoth(const uint32_t op, char* buffer)
{
sprintf(buffer, "andnot, andnoth");
}
-static void i860_dasm_or_orh(const UINT32 op, char* buffer)
+static void i860_dasm_or_orh(const uint32_t op, char* buffer)
{
sprintf(buffer, "or, orh");
}
-static void i860_dasm_xor_xorh(const UINT32 op, char* buffer)
+static void i860_dasm_xor_xorh(const uint32_t op, char* buffer)
{
sprintf(buffer, "xor, xorh");
}
@@ -328,22 +328,22 @@ static void i860_dasm_xor_xorh(const UINT32 op, char* buffer)
/***********************/
/* CORE Escape Opcodes */
/***********************/
-static void i860_dasm_CORE_lock(const UINT32 op, char* buffer)
+static void i860_dasm_CORE_lock(const uint32_t op, char* buffer)
{
sprintf(buffer, "lock");
}
-static void i860_dasm_CORE_calli(const UINT32 op, char* buffer)
+static void i860_dasm_CORE_calli(const uint32_t op, char* buffer)
{
sprintf(buffer, "calli");
}
-static void i860_dasm_CORE_intovr(const UINT32 op, char* buffer)
+static void i860_dasm_CORE_intovr(const uint32_t op, char* buffer)
{
sprintf(buffer, "intovr");
}
-static void i860_dasm_CORE_unlock(const UINT32 op, char* buffer)
+static void i860_dasm_CORE_unlock(const uint32_t op, char* buffer)
{
sprintf(buffer, "unlock");
}
@@ -352,22 +352,22 @@ static void i860_dasm_CORE_unlock(const UINT32 op, char* buffer)
/***********************/
/* CTRL-Format Opcodes */
/***********************/
-static void i860_dasm_CTRL_br(const UINT32 op, char* buffer)
+static void i860_dasm_CTRL_br(const uint32_t op, char* buffer)
{
sprintf(buffer, "br");
}
-static void i860_dasm_CTRL_call(const UINT32 op, char* buffer)
+static void i860_dasm_CTRL_call(const uint32_t op, char* buffer)
{
sprintf(buffer, "call");
}
-static void i860_dasm_CTRL_bc_bct(const UINT32 op, char* buffer)
+static void i860_dasm_CTRL_bc_bct(const uint32_t op, char* buffer)
{
sprintf(buffer, "bct");
}
-static void i860_dasm_CTRL_bnc_bnct(const UINT32 op, char* buffer)
+static void i860_dasm_CTRL_bnc_bnct(const uint32_t op, char* buffer)
{
sprintf(buffer, "bnct");
}
diff --git a/src/devices/cpu/i860/i860dec.hxx b/src/devices/cpu/i860/i860dec.hxx
index 4600af7a0b8..c33f2d0b7e8 100644
--- a/src/devices/cpu/i860/i860dec.hxx
+++ b/src/devices/cpu/i860/i860dec.hxx
@@ -60,13 +60,13 @@ enum {
/* TODO: THESE WILL BE REPLACED BY MAME FUNCTIONS
#define BYTE_REV32(t) \
do { \
- (t) = ((UINT32)(t) >> 16) | ((UINT32)(t) << 16); \
- (t) = (((UINT32)(t) >> 8) & 0x00ff00ff) | (((UINT32)(t) << 8) & 0xff00ff00); \
+ (t) = ((uint32_t)(t) >> 16) | ((uint32_t)(t) << 16); \
+ (t) = (((uint32_t)(t) >> 8) & 0x00ff00ff) | (((uint32_t)(t) << 8) & 0xff00ff00); \
} while (0);
#define BYTE_REV16(t) \
do { \
- (t) = (((UINT16)(t) >> 8) & 0x00ff) | (((UINT16)(t) << 8) & 0xff00); \
+ (t) = (((uint16_t)(t) >> 8) & 0x00ff) | (((uint16_t)(t) << 8) & 0xff00); \
} while (0);
#endif
*/
@@ -79,12 +79,12 @@ enum {
float i860_cpu_device::get_fregval_s (int fr)
{
float f;
- UINT32 x;
- UINT8 *tp;
+ uint32_t x;
+ uint8_t *tp;
fr = 31 - fr;
- tp = (UINT8 *)(&m_frg[fr * 4]);
- x = ((UINT32)tp[0] << 24) | ((UINT32)tp[1] << 16) |
- ((UINT32)tp[2] << 8) | ((UINT32)tp[3]);
+ tp = (uint8_t *)(&m_frg[fr * 4]);
+ x = ((uint32_t)tp[0] << 24) | ((uint32_t)tp[1] << 16) |
+ ((uint32_t)tp[2] << 8) | ((uint32_t)tp[3]);
f = *(float *)(&x);
return f;
}
@@ -92,27 +92,27 @@ float i860_cpu_device::get_fregval_s (int fr)
double i860_cpu_device::get_fregval_d (int fr)
{
double d;
- UINT64 x;
- UINT8 *tp;
+ uint64_t x;
+ uint8_t *tp;
fr = 31 - (fr + 1);
- tp = (UINT8 *)(&m_frg[fr * 4]);
- x = ((UINT64)tp[0] << 56) | ((UINT64)tp[1] << 48) |
- ((UINT64)tp[2] << 40) | ((UINT64)tp[3] << 32) |
- ((UINT64)tp[4] << 24) | ((UINT64)tp[5] << 16) |
- ((UINT64)tp[6] << 8) | ((UINT64)tp[7]);
+ tp = (uint8_t *)(&m_frg[fr * 4]);
+ x = ((uint64_t)tp[0] << 56) | ((uint64_t)tp[1] << 48) |
+ ((uint64_t)tp[2] << 40) | ((uint64_t)tp[3] << 32) |
+ ((uint64_t)tp[4] << 24) | ((uint64_t)tp[5] << 16) |
+ ((uint64_t)tp[6] << 8) | ((uint64_t)tp[7]);
d = *(double *)(&x);
return d;
}
void i860_cpu_device::set_fregval_s (int fr, float s)
{
- UINT8 *f = (UINT8 *)&s;
- UINT8 *tp;
+ uint8_t *f = (uint8_t *)&s;
+ uint8_t *tp;
int newfr = 31 - fr;
float jj = s;
- tp = (UINT8 *)(&m_frg[newfr * 4]);
+ tp = (uint8_t *)(&m_frg[newfr * 4]);
- f = (UINT8 *)(&jj);
+ f = (uint8_t *)(&jj);
if (fr == 0 || fr == 1)
{
tp[0] = 0; tp[1] = 0; tp[2] = 0; tp[3] = 0;
@@ -129,13 +129,13 @@ void i860_cpu_device::set_fregval_s (int fr, float s)
void i860_cpu_device::set_fregval_d (int fr, double d)
{
- UINT8 *f = (UINT8 *)&d;
- UINT8 *tp;
+ uint8_t *f = (uint8_t *)&d;
+ uint8_t *tp;
int newfr = 31 - (fr + 1);
double jj = d;
- tp = (UINT8 *)(&m_frg[newfr * 4]);
+ tp = (uint8_t *)(&m_frg[newfr * 4]);
- f = (UINT8 *)(&jj);
+ f = (uint8_t *)(&jj);
if (fr == 0)
{
@@ -280,7 +280,7 @@ void i860_cpu_device::set_fregval_d (int fr, double d)
#define SET_FSR_SE(val) (m_cregs[CR_FSR] = (m_cregs[CR_FSR] & ~(1 << 8)) | (((val) & 1) << 8))
-int i860_cpu_device::has_delay_slot(UINT32 insn)
+int i860_cpu_device::has_delay_slot(uint32_t insn)
{
int opc = (insn >> 26) & 0x3f;
if (opc == 0x10 || opc == 0x1a || opc == 0x1b || opc == 0x1d ||
@@ -329,10 +329,10 @@ void i860_cpu_device::i860_gen_interrupt()
/* Fetch instructions from instruction cache.
Note: The instruction cache is not implemented for MAME version,
this just fetches and returns 1 instruction from memory. */
-UINT32 i860_cpu_device::ifetch (UINT32 pc)
+uint32_t i860_cpu_device::ifetch (uint32_t pc)
{
- UINT32 phys_pc = 0;
- UINT32 w1 = 0;
+ uint32_t phys_pc = 0;
+ uint32_t w1 = 0;
/* If virtual mode, get translation. */
if (GET_DIRBASE_ATE ())
@@ -368,21 +368,21 @@ UINT32 i860_cpu_device::ifetch (UINT32 pc)
Page tables must always be in memory (not cached). So the routine
here only accesses memory. */
-UINT32 i860_cpu_device::get_address_translation (UINT32 vaddr, int is_dataref, int is_write)
+uint32_t i860_cpu_device::get_address_translation (uint32_t vaddr, int is_dataref, int is_write)
{
- UINT32 vdir = (vaddr >> 22) & 0x3ff;
- UINT32 vpage = (vaddr >> 12) & 0x3ff;
- UINT32 voffset = vaddr & 0xfff;
- UINT32 dtb = (m_cregs[CR_DIRBASE]) & 0xfffff000;
- UINT32 pg_dir_entry_a = 0;
- UINT32 pg_dir_entry = 0;
- UINT32 pg_tbl_entry_a = 0;
- UINT32 pg_tbl_entry = 0;
- UINT32 pfa1 = 0;
- UINT32 pfa2 = 0;
- UINT32 ret = 0;
- UINT32 ttpde = 0;
- UINT32 ttpte = 0;
+ uint32_t vdir = (vaddr >> 22) & 0x3ff;
+ uint32_t vpage = (vaddr >> 12) & 0x3ff;
+ uint32_t voffset = vaddr & 0xfff;
+ uint32_t dtb = (m_cregs[CR_DIRBASE]) & 0xfffff000;
+ uint32_t pg_dir_entry_a = 0;
+ uint32_t pg_dir_entry = 0;
+ uint32_t pg_tbl_entry_a = 0;
+ uint32_t pg_tbl_entry = 0;
+ uint32_t pfa1 = 0;
+ uint32_t pfa2 = 0;
+ uint32_t ret = 0;
+ uint32_t ttpde = 0;
+ uint32_t ttpte = 0;
assert (GET_DIRBASE_ATE ());
@@ -514,7 +514,7 @@ UINT32 i860_cpu_device::get_address_translation (UINT32 vaddr, int is_dataref, i
/* Read memory emulation.
addr = address to read.
size = size of read in bytes. */
-UINT32 i860_cpu_device::readmemi_emu (UINT32 addr, int size)
+uint32_t i860_cpu_device::readmemi_emu (uint32_t addr, int size)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "readmemi_emu: (ATE=%d) addr = 0x%08x, size = %d\n",
@@ -524,7 +524,7 @@ UINT32 i860_cpu_device::readmemi_emu (UINT32 addr, int size)
/* If virtual mode, do translation. */
if (GET_DIRBASE_ATE ())
{
- UINT32 phys = get_address_translation (addr, 1 /* is_dataref */, 0 /* is_write */);
+ uint32_t phys = get_address_translation (addr, 1 /* is_dataref */, 0 /* is_write */);
if (m_pending_trap && (GET_PSR_IAT () || GET_PSR_DAT ()))
{
#ifdef TRACE_PAGE_FAULT
@@ -548,12 +548,12 @@ UINT32 i860_cpu_device::readmemi_emu (UINT32 addr, int size)
/* Now do the actual read. */
if (size == 1)
{
- UINT32 ret = m_program->read_byte(addr);
+ uint32_t ret = m_program->read_byte(addr);
return ret & 0xff;
}
else if (size == 2)
{
- UINT32 ret = m_program->read_word(addr);
+ uint32_t ret = m_program->read_word(addr);
#ifdef HOST_MSB
BYTE_REV16 (ret);
#endif
@@ -561,7 +561,7 @@ UINT32 i860_cpu_device::readmemi_emu (UINT32 addr, int size)
}
else if (size == 4)
{
- UINT32 ret = m_program->read_dword(addr);
+ uint32_t ret = m_program->read_dword(addr);
#ifdef HOST_MSB
BYTE_REV32 (ret);
#endif
@@ -578,7 +578,7 @@ UINT32 i860_cpu_device::readmemi_emu (UINT32 addr, int size)
addr = address to write.
size = size of write in bytes.
data = data to write. */
-void i860_cpu_device::writememi_emu (UINT32 addr, int size, UINT32 data)
+void i860_cpu_device::writememi_emu (uint32_t addr, int size, uint32_t data)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "writememi_emu: (ATE=%d) addr = 0x%08x, size = %d, data = 0x%08x\n",
@@ -588,7 +588,7 @@ void i860_cpu_device::writememi_emu (UINT32 addr, int size, UINT32 data)
/* If virtual mode, do translation. */
if (GET_DIRBASE_ATE ())
{
- UINT32 phys = get_address_translation (addr, 1 /* is_dataref */, 1 /* is_write */);
+ uint32_t phys = get_address_translation (addr, 1 /* is_dataref */, 1 /* is_write */);
if (m_pending_trap && (GET_PSR_IAT () || GET_PSR_DAT ()))
{
#ifdef TRACE_PAGE_FAULT
@@ -635,7 +635,7 @@ void i860_cpu_device::writememi_emu (UINT32 addr, int size, UINT32 data)
addr = address to read.
size = size of read in bytes.
dest = memory to put read data. */
-void i860_cpu_device::fp_readmem_emu (UINT32 addr, int size, UINT8 *dest)
+void i860_cpu_device::fp_readmem_emu (uint32_t addr, int size, uint8_t *dest)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "fp_readmem_emu: (ATE=%d) addr = 0x%08x, size = %d\n",
@@ -647,7 +647,7 @@ void i860_cpu_device::fp_readmem_emu (UINT32 addr, int size, UINT8 *dest)
/* If virtual mode, do translation. */
if (GET_DIRBASE_ATE ())
{
- UINT32 phys = get_address_translation (addr, 1 /* is_dataref */, 0 /* is_write */);
+ uint32_t phys = get_address_translation (addr, 1 /* is_dataref */, 0 /* is_write */);
if (m_pending_trap && (GET_PSR_IAT () || GET_PSR_DAT ()))
{
#ifdef TRACE_PAGE_FAULT
@@ -702,7 +702,7 @@ void i860_cpu_device::fp_readmem_emu (UINT32 addr, int size, UINT8 *dest)
size = size of read in bytes.
data = pointer to the data.
wmask = bit mask of bytes to write (only for pst.d). */
-void i860_cpu_device::fp_writemem_emu (UINT32 addr, int size, UINT8 *data, UINT32 wmask)
+void i860_cpu_device::fp_writemem_emu (uint32_t addr, int size, uint8_t *data, uint32_t wmask)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "fp_writemem_emu: (ATE=%d) addr = 0x%08x, size = %d\n",
@@ -714,7 +714,7 @@ void i860_cpu_device::fp_writemem_emu (UINT32 addr, int size, UINT8 *data, UINT3
/* If virtual mode, do translation. */
if (GET_DIRBASE_ATE ())
{
- UINT32 phys = get_address_translation (addr, 1 /* is_dataref */, 1 /* is_write */);
+ uint32_t phys = get_address_translation (addr, 1 /* is_dataref */, 1 /* is_write */);
if (m_pending_trap && GET_PSR_DAT ())
{
#ifdef TRACE_PAGE_FAULT
@@ -743,7 +743,7 @@ void i860_cpu_device::fp_writemem_emu (UINT32 addr, int size, UINT8 *data, UINT3
m_program->write_byte(addr+1, data[2]);
m_program->write_byte(addr+0, data[3]);
#else
- UINT32 ddd = (data[3]) | (data[2] << 8) | (data[1] << 16) |(data[0] << 24);
+ uint32_t ddd = (data[3]) | (data[2] << 8) | (data[1] << 16) |(data[0] << 24);
m_program->write_dword(addr+0, ddd);
#endif
}
@@ -801,10 +801,10 @@ void i860_cpu_device::dump_pipe (int type)
{
if (m_A[i].stat.arp)
fprintf (stderr, "[%dd] 0x%016llx ", i + 1,
- *(UINT64 *)(&m_A[i].val.d));
+ *(uint64_t *)(&m_A[i].val.d));
else
fprintf (stderr, "[%ds] 0x%08x ", i + 1,
- *(UINT32 *)(&m_A[i].val.s));
+ *(uint32_t *)(&m_A[i].val.s));
}
fprintf (stderr, "\n");
}
@@ -818,10 +818,10 @@ void i860_cpu_device::dump_pipe (int type)
{
if (m_M[i].stat.mrp)
fprintf (stderr, "[%dd] 0x%016llx ", i + 1,
- *(UINT64 *)(&m_M[i].val.d));
+ *(uint64_t *)(&m_M[i].val.d));
else
fprintf (stderr, "[%ds] 0x%08x ", i + 1,
- *(UINT32 *)(&m_M[i].val.s));
+ *(uint32_t *)(&m_M[i].val.s));
}
fprintf (stderr, "\n");
}
@@ -834,10 +834,10 @@ void i860_cpu_device::dump_pipe (int type)
{
if (m_L[i].stat.lrp)
fprintf (stderr, "[%dd] 0x%016llx ", i + 1,
- *(UINT64 *)(&m_L[i].val.d));
+ *(uint64_t *)(&m_L[i].val.d));
else
fprintf (stderr, "[%ds] 0x%08x ", i + 1,
- *(UINT32 *)(&m_L[i].val.s));
+ *(uint32_t *)(&m_L[i].val.s));
}
fprintf (stderr, "\n");
}
@@ -848,10 +848,10 @@ void i860_cpu_device::dump_pipe (int type)
fprintf (stderr, " I: ");
if (m_G.stat.irp)
fprintf (stderr, "[1d] 0x%016llx\n",
- *(UINT64 *)(&m_G.val.d));
+ *(uint64_t *)(&m_G.val.d));
else
fprintf (stderr, "[1s] 0x%08x\n",
- *(UINT32 *)(&m_G.val.s));
+ *(uint32_t *)(&m_G.val.s));
}
}
@@ -876,7 +876,7 @@ void i860_cpu_device::dump_state (i860s *cpustate)
float ff = get_fregval_s (rn);
if ((rn % 4) == 0)
fprintf (stderr, "\n");
- fprintf (stderr, "%%f%-3d: 0x%08x ", rn, *(UINT32 *)&ff);
+ fprintf (stderr, "%%f%-3d: 0x%08x ", rn, *(uint32_t *)&ff);
}
fprintf (stderr, "\n");
@@ -896,26 +896,26 @@ void i860_cpu_device::dump_state (i860s *cpustate)
#endif
/* Sign extend N-bit number. */
-static inline INT32 sign_ext (UINT32 x, int n)
+static inline int32_t sign_ext (uint32_t x, int n)
{
- INT32 t;
+ int32_t t;
t = x >> (n - 1);
t = ((-t) << n) | x;
return t;
}
-void i860_cpu_device::unrecog_opcode (UINT32 pc, UINT32 insn)
+void i860_cpu_device::unrecog_opcode (uint32_t pc, uint32_t insn)
{
fprintf (stderr, "0x%08x: 0x%08x (unrecognized opcode)\n", pc, insn);
}
/* Execute "ld.c csrc2,idest" instruction. */
-void i860_cpu_device::insn_ld_ctrl (UINT32 insn)
+void i860_cpu_device::insn_ld_ctrl (uint32_t insn)
{
- UINT32 csrc2 = get_creg (insn);
- UINT32 idest = get_idest (insn);
+ uint32_t csrc2 = get_creg (insn);
+ uint32_t idest = get_idest (insn);
#ifdef TRACE_UNDEFINED_I860
if (csrc2 > 5)
@@ -946,10 +946,10 @@ void i860_cpu_device::insn_ld_ctrl (UINT32 insn)
/* Execute "st.c isrc1,csrc2" instruction. */
-void i860_cpu_device::insn_st_ctrl (UINT32 insn)
+void i860_cpu_device::insn_st_ctrl (uint32_t insn)
{
- UINT32 csrc2 = get_creg (insn);
- UINT32 isrc1 = get_isrc1 (insn);
+ uint32_t csrc2 = get_creg (insn);
+ uint32_t isrc1 = get_isrc1 (insn);
#ifdef TRACE_UNDEFINED_I860
if (csrc2 > 5)
@@ -980,7 +980,7 @@ void i860_cpu_device::insn_st_ctrl (UINT32 insn)
/* Update the register -- unless it is fir which cannot be updated. */
if (csrc2 == CR_EPSR)
{
- UINT32 enew = 0, tmp = 0;
+ uint32_t enew = 0, tmp = 0;
/* Make sure unchangeable EPSR bits stay unchanged (DCS, stepping,
and type). Also, some bits are only writeable in supervisor
mode. */
@@ -1001,8 +1001,8 @@ void i860_cpu_device::insn_st_ctrl (UINT32 insn)
/* Some PSR bits are only writeable in supervisor mode. */
if (GET_PSR_U ())
{
- UINT32 enew = get_iregval (isrc1) & ~PSR_SUPERVISOR_ONLY_MASK;
- UINT32 tmp = m_cregs[CR_PSR] & PSR_SUPERVISOR_ONLY_MASK;
+ uint32_t enew = get_iregval (isrc1) & ~PSR_SUPERVISOR_ONLY_MASK;
+ uint32_t tmp = m_cregs[CR_PSR] & PSR_SUPERVISOR_ONLY_MASK;
m_cregs[CR_PSR] = enew | tmp;
}
else
@@ -1011,8 +1011,8 @@ void i860_cpu_device::insn_st_ctrl (UINT32 insn)
else if (csrc2 == CR_FSR)
{
/* I believe that only 21..17, 8..5, and 3..0 should be updated. */
- UINT32 enew = get_iregval (isrc1) & 0x003e01ef;
- UINT32 tmp = m_cregs[CR_FSR] & ~0x003e01ef;
+ uint32_t enew = get_iregval (isrc1) & 0x003e01ef;
+ uint32_t tmp = m_cregs[CR_FSR] & ~0x003e01ef;
m_cregs[CR_FSR] = enew | tmp;
}
else if (csrc2 != CR_FIR)
@@ -1022,13 +1022,13 @@ void i860_cpu_device::insn_st_ctrl (UINT32 insn)
/* Execute "ld.{s,b,l} isrc1(isrc2),idest" or
"ld.{s,b,l} #const(isrc2),idest". */
-void i860_cpu_device::insn_ldx (UINT32 insn)
+void i860_cpu_device::insn_ldx (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- INT32 immsrc1 = sign_ext (get_imm16 (insn), 16);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 eff = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ int32_t immsrc1 = sign_ext (get_imm16 (insn), 16);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t eff = 0;
/* Operand size, in bytes. */
int sizes[4] = { 1, 1, 2, 4};
int size = 0;
@@ -1045,7 +1045,7 @@ void i860_cpu_device::insn_ldx (UINT32 insn)
{
/* Chop off lower bits of displacement. */
immsrc1 &= ~(size - 1);
- eff = (UINT32)(immsrc1 + (INT32)(get_iregval (isrc2)));
+ eff = (uint32_t)(immsrc1 + (int32_t)(get_iregval (isrc2)));
}
else
eff = get_iregval (isrc1) + get_iregval (isrc2);
@@ -1068,7 +1068,7 @@ void i860_cpu_device::insn_ldx (UINT32 insn)
is the target register). */
if (size < 4)
{
- UINT32 readval = sign_ext (readmemi_emu (eff, size), size * 8);
+ uint32_t readval = sign_ext (readmemi_emu (eff, size), size * 8);
/* Do not update register on page fault. */
if (m_exiting_readmem)
{
@@ -1078,7 +1078,7 @@ void i860_cpu_device::insn_ldx (UINT32 insn)
}
else
{
- UINT32 readval = readmemi_emu (eff, size);
+ uint32_t readval = readmemi_emu (eff, size);
/* Do not update register on page fault. */
if (m_exiting_readmem)
{
@@ -1092,12 +1092,12 @@ void i860_cpu_device::insn_ldx (UINT32 insn)
/* Execute "st.x isrc1ni,#const(isrc2)" instruction (there is no
(reg + reg form). Store uses the split immediate, not the normal
16-bit immediate as in ld.x. */
-void i860_cpu_device::insn_stx (UINT32 insn)
+void i860_cpu_device::insn_stx (uint32_t insn)
{
- INT32 immsrc = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 eff = 0;
+ int32_t immsrc = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t eff = 0;
/* Operand size, in bytes. */
int sizes[4] = { 1, 1, 2, 4};
int size = 0;
@@ -1109,7 +1109,7 @@ void i860_cpu_device::insn_stx (UINT32 insn)
/* Get effective address. Chop off lower bits of displacement. */
immsrc &= ~(size - 1);
- eff = (UINT32)(immsrc + (INT32)get_iregval (isrc2));
+ eff = (uint32_t)(immsrc + (int32_t)get_iregval (isrc2));
/* Write data (value of reg isrc1) to memory at eff. */
writememi_emu (eff, size, get_iregval (isrc1));
@@ -1121,13 +1121,13 @@ void i860_cpu_device::insn_stx (UINT32 insn)
/* Execute "fst.y fdest,isrc1(isrc2)", "fst.y fdest,isrc1(isrc2)++",
"fst.y fdest,#const(isrc2)" or "fst.y fdest,#const(isrc2)++"
instruction. */
-void i860_cpu_device::insn_fsty (UINT32 insn)
+void i860_cpu_device::insn_fsty (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- INT32 immsrc1 = sign_ext (get_imm16 (insn), 16);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 fdest = get_fdest (insn);
- UINT32 eff = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ int32_t immsrc1 = sign_ext (get_imm16 (insn), 16);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
+ uint32_t eff = 0;
/* Operand size, in bytes. */
int sizes[4] = { 8, 4, 16, 4};
int size = 0;
@@ -1148,7 +1148,7 @@ void i860_cpu_device::insn_fsty (UINT32 insn)
{
/* Chop off lower bits of displacement. */
immsrc1 &= ~(size - 1);
- eff = (UINT32)(immsrc1 + (INT32)(get_iregval (isrc2)));
+ eff = (uint32_t)(immsrc1 + (int32_t)(get_iregval (isrc2)));
}
else
eff = get_iregval (isrc1) + get_iregval (isrc2);
@@ -1181,11 +1181,11 @@ void i860_cpu_device::insn_fsty (UINT32 insn)
/* Write data (value of freg fdest) to memory at eff. */
if (size == 4)
- fp_writemem_emu (eff, size, (UINT8 *)(&m_frg[4 * (31 - fdest)]), 0xff);
+ fp_writemem_emu (eff, size, (uint8_t *)(&m_frg[4 * (31 - fdest)]), 0xff);
else if (size == 8)
- fp_writemem_emu (eff, size, (UINT8 *)(&m_frg[4 * (31 - (fdest + 1))]), 0xff);
+ fp_writemem_emu (eff, size, (uint8_t *)(&m_frg[4 * (31 - (fdest + 1))]), 0xff);
else
- fp_writemem_emu (eff, size, (UINT8 *)(&m_frg[4 * (31 - (fdest + 3))]), 0xff);
+ fp_writemem_emu (eff, size, (uint8_t *)(&m_frg[4 * (31 - (fdest + 3))]), 0xff);
}
@@ -1193,13 +1193,13 @@ void i860_cpu_device::insn_fsty (UINT32 insn)
/* Execute "fld.y isrc1(isrc2),fdest", "fld.y isrc1(isrc2)++,idest",
"fld.y #const(isrc2),fdest" or "fld.y #const(isrc2)++,idest".
Where y = {l,d,q}. Note, there is no pfld.q, though. */
-void i860_cpu_device::insn_fldy (UINT32 insn)
+void i860_cpu_device::insn_fldy (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- INT32 immsrc1 = sign_ext (get_imm16 (insn), 16);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 fdest = get_fdest (insn);
- UINT32 eff = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ int32_t immsrc1 = sign_ext (get_imm16 (insn), 16);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
+ uint32_t eff = 0;
/* Operand size, in bytes. */
int sizes[4] = { 8, 4, 16, 4};
int size = 0;
@@ -1228,7 +1228,7 @@ void i860_cpu_device::insn_fldy (UINT32 insn)
{
/* Chop off lower bits of displacement. */
immsrc1 &= ~(size - 1);
- eff = (UINT32)(immsrc1 + (INT32)(get_iregval (isrc2)));
+ eff = (uint32_t)(immsrc1 + (int32_t)(get_iregval (isrc2)));
}
else
eff = get_iregval (isrc1) + get_iregval (isrc2);
@@ -1269,11 +1269,11 @@ void i860_cpu_device::insn_fldy (UINT32 insn)
if (fdest > 1)
{
if (size == 4)
- fp_readmem_emu (eff, size, (UINT8 *)&(m_frg[4 * (31 - fdest)]));
+ fp_readmem_emu (eff, size, (uint8_t *)&(m_frg[4 * (31 - fdest)]));
else if (size == 8)
- fp_readmem_emu (eff, size, (UINT8 *)&(m_frg[4 * (31 - (fdest + 1))]));
+ fp_readmem_emu (eff, size, (uint8_t *)&(m_frg[4 * (31 - (fdest + 1))]));
else if (size == 16)
- fp_readmem_emu (eff, size, (UINT8 *)&(m_frg[4 * (31 - (fdest + 3))]));
+ fp_readmem_emu (eff, size, (uint8_t *)&(m_frg[4 * (31 - (fdest + 3))]));
}
}
else
@@ -1282,7 +1282,7 @@ void i860_cpu_device::insn_fldy (UINT32 insn)
for any traps before updating the pipeline. The pipeline must
stay unaffected after a trap so that the instruction can be
properly restarted. */
- UINT8 bebuf[8];
+ uint8_t bebuf[8];
fp_readmem_emu (eff, size, bebuf);
if (m_pending_trap && m_exiting_readmem)
goto ab_op;
@@ -1307,7 +1307,7 @@ void i860_cpu_device::insn_fldy (UINT32 insn)
m_L[1] = m_L[0];
if (size == 8)
{
- UINT8 *t = (UINT8 *)&(m_L[0].val.d);
+ uint8_t *t = (uint8_t *)&(m_L[0].val.d);
#ifndef HOST_MSB
t[7] = bebuf[0]; t[6] = bebuf[1]; t[5] = bebuf[2]; t[4] = bebuf[3];
t[3] = bebuf[4]; t[2] = bebuf[5]; t[1] = bebuf[6]; t[0] = bebuf[7];
@@ -1319,7 +1319,7 @@ void i860_cpu_device::insn_fldy (UINT32 insn)
}
else
{
- UINT8 *t = (UINT8 *)&(m_L[0].val.s);
+ uint8_t *t = (uint8_t *)&(m_L[0].val.s);
#ifndef HOST_MSB
t[3] = bebuf[0]; t[2] = bebuf[1]; t[1] = bebuf[2]; t[0] = bebuf[3];
#else
@@ -1335,17 +1335,17 @@ void i860_cpu_device::insn_fldy (UINT32 insn)
/* Execute "pst.d fdest,#const(isrc2)" or "fst.d fdest,#const(isrc2)++"
instruction. */
-void i860_cpu_device::insn_pstd (UINT32 insn)
+void i860_cpu_device::insn_pstd (uint32_t insn)
{
- INT32 immsrc1 = sign_ext (get_imm16 (insn), 16);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 fdest = get_fdest (insn);
- UINT32 eff = 0;
+ int32_t immsrc1 = sign_ext (get_imm16 (insn), 16);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
+ uint32_t eff = 0;
int auto_inc = (insn & 1);
- UINT8 *bebuf = nullptr;
+ uint8_t *bebuf = nullptr;
int pm = GET_PSR_PM ();
int i;
- UINT32 wmask;
+ uint32_t wmask;
int orig_pm = pm;
/* Get the pixel size, where:
@@ -1371,7 +1371,7 @@ void i860_cpu_device::insn_pstd (UINT32 insn)
/* Get effective address. Chop off lower bits of displacement. */
immsrc1 &= ~(8 - 1);
- eff = (UINT32)(immsrc1 + (INT32)(get_iregval (isrc2)));
+ eff = (uint32_t)(immsrc1 + (int32_t)(get_iregval (isrc2)));
#ifdef TRACE_UNALIGNED_MEM
if (eff & (8 - 1))
@@ -1429,17 +1429,17 @@ void i860_cpu_device::insn_pstd (UINT32 insn)
}
orig_pm <<= 1;
}
- bebuf = (UINT8 *)(&m_frg[4 * (31 - (fdest + 1))]);
+ bebuf = (uint8_t *)(&m_frg[4 * (31 - (fdest + 1))]);
fp_writemem_emu (eff, 8, bebuf, wmask);
}
/* Execute "ixfr isrc1ni,fdest" instruction. */
-void i860_cpu_device::insn_ixfr (UINT32 insn)
+void i860_cpu_device::insn_ixfr (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 fdest = get_fdest (insn);
- UINT32 iv = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t fdest = get_fdest (insn);
+ uint32_t iv = 0;
/* This is a bit-pattern transfer, not a conversion. */
iv = get_iregval (isrc1);
@@ -1448,13 +1448,13 @@ void i860_cpu_device::insn_ixfr (UINT32 insn)
/* Execute "addu isrc1,isrc2,idest". */
-void i860_cpu_device::insn_addu (UINT32 insn)
+void i860_cpu_device::insn_addu (uint32_t insn)
{
- UINT32 src1val;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 tmp_dest_val = 0;
- UINT64 tmp = 0;
+ uint32_t src1val;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t tmp_dest_val = 0;
+ uint64_t tmp = 0;
src1val = get_iregval (get_isrc1 (insn));
@@ -1468,7 +1468,7 @@ void i860_cpu_device::insn_addu (UINT32 insn)
OF = bit 31 carry
CC = bit 31 carry.
*/
- tmp = (UINT64)src1val + (UINT64)(get_iregval (isrc2));
+ tmp = (uint64_t)src1val + (uint64_t)(get_iregval (isrc2));
if ((tmp >> 32) & 1)
{
SET_PSR_CC (1);
@@ -1486,13 +1486,13 @@ void i860_cpu_device::insn_addu (UINT32 insn)
/* Execute "addu #const,isrc2,idest". */
-void i860_cpu_device::insn_addu_imm (UINT32 insn)
+void i860_cpu_device::insn_addu_imm (uint32_t insn)
{
- UINT32 src1val;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 tmp_dest_val = 0;
- UINT64 tmp = 0;
+ uint32_t src1val;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t tmp_dest_val = 0;
+ uint64_t tmp = 0;
src1val = sign_ext (get_imm16 (insn), 16);
@@ -1506,7 +1506,7 @@ void i860_cpu_device::insn_addu_imm (UINT32 insn)
OF = bit 31 carry
CC = bit 31 carry.
*/
- tmp = (UINT64)src1val + (UINT64)(get_iregval (isrc2));
+ tmp = (uint64_t)src1val + (uint64_t)(get_iregval (isrc2));
if ((tmp >> 32) & 1)
{
SET_PSR_CC (1);
@@ -1524,12 +1524,12 @@ void i860_cpu_device::insn_addu_imm (UINT32 insn)
/* Execute "adds isrc1,isrc2,idest". */
-void i860_cpu_device::insn_adds (UINT32 insn)
+void i860_cpu_device::insn_adds (uint32_t insn)
{
- UINT32 src1val;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 tmp_dest_val = 0;
+ uint32_t src1val;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t tmp_dest_val = 0;
int sa, sb, sres;
src1val = get_iregval (get_isrc1 (insn));
@@ -1553,7 +1553,7 @@ void i860_cpu_device::insn_adds (UINT32 insn)
else
SET_EPSR_OF (0);
- if ((INT32)get_iregval (isrc2) < -(INT32)(src1val))
+ if ((int32_t)get_iregval (isrc2) < -(int32_t)(src1val))
SET_PSR_CC (1);
else
SET_PSR_CC (0);
@@ -1564,12 +1564,12 @@ void i860_cpu_device::insn_adds (UINT32 insn)
/* Execute "adds #const,isrc2,idest". */
-void i860_cpu_device::insn_adds_imm (UINT32 insn)
+void i860_cpu_device::insn_adds_imm (uint32_t insn)
{
- UINT32 src1val;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 tmp_dest_val = 0;
+ uint32_t src1val;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t tmp_dest_val = 0;
int sa, sb, sres;
src1val = sign_ext (get_imm16 (insn), 16);
@@ -1593,7 +1593,7 @@ void i860_cpu_device::insn_adds_imm (UINT32 insn)
else
SET_EPSR_OF (0);
- if ((INT32)get_iregval (isrc2) < -(INT32)(src1val))
+ if ((int32_t)get_iregval (isrc2) < -(int32_t)(src1val))
SET_PSR_CC (1);
else
SET_PSR_CC (0);
@@ -1604,12 +1604,12 @@ void i860_cpu_device::insn_adds_imm (UINT32 insn)
/* Execute "subu isrc1,isrc2,idest". */
-void i860_cpu_device::insn_subu (UINT32 insn)
+void i860_cpu_device::insn_subu (uint32_t insn)
{
- UINT32 src1val;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 tmp_dest_val = 0;
+ uint32_t src1val;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t tmp_dest_val = 0;
src1val = get_iregval (get_isrc1 (insn));
@@ -1625,7 +1625,7 @@ void i860_cpu_device::insn_subu (UINT32 insn)
(i.e. CC set if isrc2 <= isrc1
CC clear if isrc2 > isrc1
*/
- if ((UINT32)get_iregval (isrc2) <= (UINT32)src1val)
+ if ((uint32_t)get_iregval (isrc2) <= (uint32_t)src1val)
{
SET_PSR_CC (1);
SET_EPSR_OF (0);
@@ -1642,12 +1642,12 @@ void i860_cpu_device::insn_subu (UINT32 insn)
/* Execute "subu #const,isrc2,idest". */
-void i860_cpu_device::insn_subu_imm (UINT32 insn)
+void i860_cpu_device::insn_subu_imm (uint32_t insn)
{
- UINT32 src1val;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 tmp_dest_val = 0;
+ uint32_t src1val;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t tmp_dest_val = 0;
src1val = sign_ext (get_imm16 (insn), 16);
@@ -1663,7 +1663,7 @@ void i860_cpu_device::insn_subu_imm (UINT32 insn)
(i.e. CC set if isrc2 <= isrc1
CC clear if isrc2 > isrc1
*/
- if ((UINT32)get_iregval (isrc2) <= (UINT32)src1val)
+ if ((uint32_t)get_iregval (isrc2) <= (uint32_t)src1val)
{
SET_PSR_CC (1);
SET_EPSR_OF (0);
@@ -1680,12 +1680,12 @@ void i860_cpu_device::insn_subu_imm (UINT32 insn)
/* Execute "subs isrc1,isrc2,idest". */
-void i860_cpu_device::insn_subs (UINT32 insn)
+void i860_cpu_device::insn_subs (uint32_t insn)
{
- UINT32 src1val;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 tmp_dest_val = 0;
+ uint32_t src1val;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t tmp_dest_val = 0;
int sa, sb, sres;
src1val = get_iregval (get_isrc1 (insn));
@@ -1709,7 +1709,7 @@ void i860_cpu_device::insn_subs (UINT32 insn)
else
SET_EPSR_OF (0);
- if ((INT32)get_iregval (isrc2) > (INT32)(src1val))
+ if ((int32_t)get_iregval (isrc2) > (int32_t)(src1val))
SET_PSR_CC (1);
else
SET_PSR_CC (0);
@@ -1720,12 +1720,12 @@ void i860_cpu_device::insn_subs (UINT32 insn)
/* Execute "subs #const,isrc2,idest". */
-void i860_cpu_device::insn_subs_imm (UINT32 insn)
+void i860_cpu_device::insn_subs_imm (uint32_t insn)
{
- UINT32 src1val;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 tmp_dest_val = 0;
+ uint32_t src1val;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t tmp_dest_val = 0;
int sa, sb, sres;
src1val = sign_ext (get_imm16 (insn), 16);
@@ -1749,7 +1749,7 @@ void i860_cpu_device::insn_subs_imm (UINT32 insn)
else
SET_EPSR_OF (0);
- if ((INT32)get_iregval (isrc2) > (INT32)(src1val))
+ if ((int32_t)get_iregval (isrc2) > (int32_t)(src1val))
SET_PSR_CC (1);
else
SET_PSR_CC (0);
@@ -1760,11 +1760,11 @@ void i860_cpu_device::insn_subs_imm (UINT32 insn)
/* Execute "shl isrc1,isrc2,idest". */
-void i860_cpu_device::insn_shl (UINT32 insn)
+void i860_cpu_device::insn_shl (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
src1val = get_iregval (get_isrc1 (insn));
set_iregval (idest, get_iregval (isrc2) << src1val);
@@ -1772,11 +1772,11 @@ void i860_cpu_device::insn_shl (UINT32 insn)
/* Execute "shl #const,isrc2,idest". */
-void i860_cpu_device::insn_shl_imm (UINT32 insn)
+void i860_cpu_device::insn_shl_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
src1val = sign_ext (get_imm16 (insn), 16);
set_iregval (idest, get_iregval (isrc2) << src1val);
@@ -1784,15 +1784,15 @@ void i860_cpu_device::insn_shl_imm (UINT32 insn)
/* Execute "shr isrc1,isrc2,idest". */
-void i860_cpu_device::insn_shr (UINT32 insn)
+void i860_cpu_device::insn_shr (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
src1val = get_iregval (get_isrc1 (insn));
- /* The iregs array is UINT32, so this is a logical shift. */
+ /* The iregs array is uint32_t, so this is a logical shift. */
set_iregval (idest, get_iregval (isrc2) >> src1val);
/* shr also sets the SC in psr (shift count). */
@@ -1801,15 +1801,15 @@ void i860_cpu_device::insn_shr (UINT32 insn)
/* Execute "shr #const,isrc2,idest". */
-void i860_cpu_device::insn_shr_imm (UINT32 insn)
+void i860_cpu_device::insn_shr_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
src1val = sign_ext (get_imm16 (insn), 16);
- /* The iregs array is UINT32, so this is a logical shift. */
+ /* The iregs array is uint32_t, so this is a logical shift. */
set_iregval (idest, get_iregval (isrc2) >> src1val);
/* shr also sets the SC in psr (shift count). */
@@ -1818,41 +1818,41 @@ void i860_cpu_device::insn_shr_imm (UINT32 insn)
/* Execute "shra isrc1,isrc2,idest". */
-void i860_cpu_device::insn_shra (UINT32 insn)
+void i860_cpu_device::insn_shra (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
src1val = get_iregval (get_isrc1 (insn));
- /* The iregs array is UINT32, so cast isrc2 to get arithmetic shift. */
- set_iregval (idest, (INT32)get_iregval (isrc2) >> src1val);
+ /* The iregs array is uint32_t, so cast isrc2 to get arithmetic shift. */
+ set_iregval (idest, (int32_t)get_iregval (isrc2) >> src1val);
}
/* Execute "shra #const,isrc2,idest". */
-void i860_cpu_device::insn_shra_imm (UINT32 insn)
+void i860_cpu_device::insn_shra_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
src1val = sign_ext (get_imm16 (insn), 16);
- /* The iregs array is UINT32, so cast isrc2 to get arithmetic shift. */
- set_iregval (idest, (INT32)get_iregval (isrc2) >> src1val);
+ /* The iregs array is uint32_t, so cast isrc2 to get arithmetic shift. */
+ set_iregval (idest, (int32_t)get_iregval (isrc2) >> src1val);
}
/* Execute "shrd isrc1ni,isrc2,idest" instruction. */
-void i860_cpu_device::insn_shrd (UINT32 insn)
+void i860_cpu_device::insn_shrd (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 sc = GET_PSR_SC ();
- UINT32 tmp;
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t sc = GET_PSR_SC ();
+ uint32_t tmp;
/* Do the operation:
idest = low_32(isrc1ni:isrc2 >> sc). */
@@ -1868,12 +1868,12 @@ void i860_cpu_device::insn_shrd (UINT32 insn)
/* Execute "and isrc1,isrc2,idest". */
-void i860_cpu_device::insn_and (UINT32 insn)
+void i860_cpu_device::insn_and (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
res = get_iregval (isrc1) & get_iregval (isrc2);
@@ -1889,12 +1889,12 @@ void i860_cpu_device::insn_and (UINT32 insn)
/* Execute "and #const,isrc2,idest". */
-void i860_cpu_device::insn_and_imm (UINT32 insn)
+void i860_cpu_device::insn_and_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
src1val = get_imm16 (insn);
@@ -1911,12 +1911,12 @@ void i860_cpu_device::insn_and_imm (UINT32 insn)
/* Execute "andh #const,isrc2,idest". */
-void i860_cpu_device::insn_andh_imm (UINT32 insn)
+void i860_cpu_device::insn_andh_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
src1val = get_imm16 (insn);
@@ -1933,12 +1933,12 @@ void i860_cpu_device::insn_andh_imm (UINT32 insn)
/* Execute "andnot isrc1,isrc2,idest". */
-void i860_cpu_device::insn_andnot (UINT32 insn)
+void i860_cpu_device::insn_andnot (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
res = (~get_iregval (isrc1)) & get_iregval (isrc2);
@@ -1954,12 +1954,12 @@ void i860_cpu_device::insn_andnot (UINT32 insn)
/* Execute "andnot #const,isrc2,idest". */
-void i860_cpu_device::insn_andnot_imm (UINT32 insn)
+void i860_cpu_device::insn_andnot_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
src1val = get_imm16 (insn);
@@ -1976,12 +1976,12 @@ void i860_cpu_device::insn_andnot_imm (UINT32 insn)
/* Execute "andnoth #const,isrc2,idest". */
-void i860_cpu_device::insn_andnoth_imm (UINT32 insn)
+void i860_cpu_device::insn_andnoth_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
src1val = get_imm16 (insn);
@@ -1998,12 +1998,12 @@ void i860_cpu_device::insn_andnoth_imm (UINT32 insn)
/* Execute "or isrc1,isrc2,idest". */
-void i860_cpu_device::insn_or (UINT32 insn)
+void i860_cpu_device::insn_or (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
res = get_iregval (isrc1) | get_iregval (isrc2);
@@ -2019,12 +2019,12 @@ void i860_cpu_device::insn_or (UINT32 insn)
/* Execute "or #const,isrc2,idest". */
-void i860_cpu_device::insn_or_imm (UINT32 insn)
+void i860_cpu_device::insn_or_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
src1val = get_imm16 (insn);
@@ -2041,12 +2041,12 @@ void i860_cpu_device::insn_or_imm (UINT32 insn)
/* Execute "orh #const,isrc2,idest". */
-void i860_cpu_device::insn_orh_imm (UINT32 insn)
+void i860_cpu_device::insn_orh_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
src1val = get_imm16 (insn);
@@ -2063,12 +2063,12 @@ void i860_cpu_device::insn_orh_imm (UINT32 insn)
/* Execute "xor isrc1,isrc2,idest". */
-void i860_cpu_device::insn_xor (UINT32 insn)
+void i860_cpu_device::insn_xor (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
res = get_iregval (isrc1) ^ get_iregval (isrc2);
@@ -2084,12 +2084,12 @@ void i860_cpu_device::insn_xor (UINT32 insn)
/* Execute "xor #const,isrc2,idest". */
-void i860_cpu_device::insn_xor_imm (UINT32 insn)
+void i860_cpu_device::insn_xor_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
src1val = get_imm16 (insn);
@@ -2106,12 +2106,12 @@ void i860_cpu_device::insn_xor_imm (UINT32 insn)
/* Execute "xorh #const,isrc2,idest". */
-void i860_cpu_device::insn_xorh_imm (UINT32 insn)
+void i860_cpu_device::insn_xorh_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 idest = get_idest (insn);
- UINT32 res = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t idest = get_idest (insn);
+ uint32_t res = 0;
/* Do the operation. */
src1val = get_imm16 (insn);
@@ -2128,7 +2128,7 @@ void i860_cpu_device::insn_xorh_imm (UINT32 insn)
/* Execute "trap isrc1ni,isrc2,idest" instruction. */
-void i860_cpu_device::insn_trap (UINT32 insn)
+void i860_cpu_device::insn_trap (uint32_t insn)
{
SET_PSR_IT (1);
m_pending_trap = 1;
@@ -2136,7 +2136,7 @@ void i860_cpu_device::insn_trap (UINT32 insn)
/* Execute "intovr" instruction. */
-void i860_cpu_device::insn_intovr (UINT32 insn)
+void i860_cpu_device::insn_intovr (uint32_t insn)
{
if (GET_EPSR_OF ())
{
@@ -2147,19 +2147,19 @@ void i860_cpu_device::insn_intovr (UINT32 insn)
/* Execute "bte isrc1,isrc2,sbroff". */
-void i860_cpu_device::insn_bte (UINT32 insn)
+void i860_cpu_device::insn_bte (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 target_addr = 0;
- INT32 sbroff = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t target_addr = 0;
+ int32_t sbroff = 0;
int res = 0;
src1val = get_iregval (get_isrc1 (insn));
/* Compute the target address from the sbroff field. */
sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
- target_addr = (INT32)m_pc + 4 + (sbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (sbroff << 2);
/* Determine comparison result. */
res = (src1val == get_iregval (isrc2));
@@ -2175,19 +2175,19 @@ void i860_cpu_device::insn_bte (UINT32 insn)
/* Execute "bte #const5,isrc2,sbroff". */
-void i860_cpu_device::insn_bte_imm (UINT32 insn)
+void i860_cpu_device::insn_bte_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 target_addr = 0;
- INT32 sbroff = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t target_addr = 0;
+ int32_t sbroff = 0;
int res = 0;
src1val = (insn >> 11) & 0x1f; /* 5-bit field, zero-extended. */
/* Compute the target address from the sbroff field. */
sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
- target_addr = (INT32)m_pc + 4 + (sbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (sbroff << 2);
/* Determine comparison result. */
res = (src1val == get_iregval (isrc2));
@@ -2203,19 +2203,19 @@ void i860_cpu_device::insn_bte_imm (UINT32 insn)
/* Execute "btne isrc1,isrc2,sbroff". */
-void i860_cpu_device::insn_btne (UINT32 insn)
+void i860_cpu_device::insn_btne (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 target_addr = 0;
- INT32 sbroff = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t target_addr = 0;
+ int32_t sbroff = 0;
int res = 0;
src1val = get_iregval (get_isrc1 (insn));
/* Compute the target address from the sbroff field. */
sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
- target_addr = (INT32)m_pc + 4 + (sbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (sbroff << 2);
/* Determine comparison result. */
res = (src1val != get_iregval (isrc2));
@@ -2231,19 +2231,19 @@ void i860_cpu_device::insn_btne (UINT32 insn)
/* Execute "btne #const5,isrc2,sbroff". */
-void i860_cpu_device::insn_btne_imm (UINT32 insn)
+void i860_cpu_device::insn_btne_imm (uint32_t insn)
{
- UINT32 src1val = 0;
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 target_addr = 0;
- INT32 sbroff = 0;
+ uint32_t src1val = 0;
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t target_addr = 0;
+ int32_t sbroff = 0;
int res = 0;
src1val = (insn >> 11) & 0x1f; /* 5-bit field, zero-extended. */
/* Compute the target address from the sbroff field. */
sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
- target_addr = (INT32)m_pc + 4 + (sbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (sbroff << 2);
/* Determine comparison result. */
res = (src1val != get_iregval (isrc2));
@@ -2259,15 +2259,15 @@ void i860_cpu_device::insn_btne_imm (UINT32 insn)
/* Execute "bc lbroff" instruction. */
-void i860_cpu_device::insn_bc (UINT32 insn)
+void i860_cpu_device::insn_bc (uint32_t insn)
{
- UINT32 target_addr = 0;
- INT32 lbroff = 0;
+ uint32_t target_addr = 0;
+ int32_t lbroff = 0;
int res = 0;
/* Compute the target address from the lbroff field. */
lbroff = sign_ext ((insn & 0x03ffffff), 26);
- target_addr = (INT32)m_pc + 4 + (lbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (lbroff << 2);
/* Determine comparison result. */
res = (GET_PSR_CC () == 1);
@@ -2283,15 +2283,15 @@ void i860_cpu_device::insn_bc (UINT32 insn)
/* Execute "bnc lbroff" instruction. */
-void i860_cpu_device::insn_bnc (UINT32 insn)
+void i860_cpu_device::insn_bnc (uint32_t insn)
{
- UINT32 target_addr = 0;
- INT32 lbroff = 0;
+ uint32_t target_addr = 0;
+ int32_t lbroff = 0;
int res = 0;
/* Compute the target address from the lbroff field. */
lbroff = sign_ext ((insn & 0x03ffffff), 26);
- target_addr = (INT32)m_pc + 4 + (lbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (lbroff << 2);
/* Determine comparison result. */
res = (GET_PSR_CC () == 0);
@@ -2308,16 +2308,16 @@ void i860_cpu_device::insn_bnc (UINT32 insn)
/* Execute "bc.t lbroff" instruction. */
-void i860_cpu_device::insn_bct (UINT32 insn)
+void i860_cpu_device::insn_bct (uint32_t insn)
{
- UINT32 target_addr = 0;
- INT32 lbroff = 0;
+ uint32_t target_addr = 0;
+ int32_t lbroff = 0;
int res = 0;
- UINT32 orig_pc = m_pc;
+ uint32_t orig_pc = m_pc;
/* Compute the target address from the lbroff field. */
lbroff = sign_ext ((insn & 0x03ffffff), 26);
- target_addr = (INT32)m_pc + 4 + (lbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (lbroff << 2);
/* Determine comparison result. */
res = (GET_PSR_CC () == 1);
@@ -2352,16 +2352,16 @@ void i860_cpu_device::insn_bct (UINT32 insn)
/* Execute "bnc.t lbroff" instruction. */
-void i860_cpu_device::insn_bnct (UINT32 insn)
+void i860_cpu_device::insn_bnct (uint32_t insn)
{
- UINT32 target_addr = 0;
- INT32 lbroff = 0;
+ uint32_t target_addr = 0;
+ int32_t lbroff = 0;
int res = 0;
- UINT32 orig_pc = m_pc;
+ uint32_t orig_pc = m_pc;
/* Compute the target address from the lbroff field. */
lbroff = sign_ext ((insn & 0x03ffffff), 26);
- target_addr = (INT32)m_pc + 4 + (lbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (lbroff << 2);
/* Determine comparison result. */
res = (GET_PSR_CC () == 0);
@@ -2396,15 +2396,15 @@ void i860_cpu_device::insn_bnct (UINT32 insn)
/* Execute "call lbroff" instruction. */
-void i860_cpu_device::insn_call (UINT32 insn)
+void i860_cpu_device::insn_call (uint32_t insn)
{
- UINT32 target_addr = 0;
- INT32 lbroff = 0;
- UINT32 orig_pc = m_pc;
+ uint32_t target_addr = 0;
+ int32_t lbroff = 0;
+ uint32_t orig_pc = m_pc;
/* Compute the target address from the lbroff field. */
lbroff = sign_ext ((insn & 0x03ffffff), 26);
- target_addr = (INT32)m_pc + 4 + (lbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (lbroff << 2);
/* Execute the delay slot instruction. */
m_pc += 4;
@@ -2428,15 +2428,15 @@ void i860_cpu_device::insn_call (UINT32 insn)
/* Execute "br lbroff". */
-void i860_cpu_device::insn_br (UINT32 insn)
+void i860_cpu_device::insn_br (uint32_t insn)
{
- UINT32 target_addr = 0;
- INT32 lbroff = 0;
- UINT32 orig_pc = m_pc;
+ uint32_t target_addr = 0;
+ int32_t lbroff = 0;
+ uint32_t orig_pc = m_pc;
/* Compute the target address from the lbroff field. */
lbroff = sign_ext ((insn & 0x03ffffff), 26);
- target_addr = (INT32)m_pc + 4 + (lbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (lbroff << 2);
/* Execute the delay slot instruction. */
m_pc += 4;
@@ -2459,12 +2459,12 @@ void i860_cpu_device::insn_br (UINT32 insn)
/* Execute "bri isrc1ni" instruction.
Note: I didn't merge this code with calli because bri must do
a lot of flag manipulation if any trap bits are set. */
-void i860_cpu_device::insn_bri (UINT32 insn)
+void i860_cpu_device::insn_bri (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 orig_pc = m_pc;
- UINT32 orig_psr = m_cregs[CR_PSR];
- UINT32 orig_src1_val = get_iregval (isrc1);
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t orig_pc = m_pc;
+ uint32_t orig_psr = m_cregs[CR_PSR];
+ uint32_t orig_src1_val = get_iregval (isrc1);
#if 1 /* TURBO. */
m_cregs[CR_PSR] &= ~PSR_ALL_TRAP_BITS_MASK;
@@ -2504,11 +2504,11 @@ void i860_cpu_device::insn_bri (UINT32 insn)
}
/* Execute "calli isrc1ni" instruction. */
-void i860_cpu_device::insn_calli (UINT32 insn)
+void i860_cpu_device::insn_calli (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 orig_pc = m_pc;
- UINT32 orig_src1_val = get_iregval (isrc1);
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t orig_pc = m_pc;
+ uint32_t orig_src1_val = get_iregval (isrc1);
#ifdef TRACE_UNDEFINED_I860
/* Check for undefined behavior. */
@@ -2542,15 +2542,15 @@ void i860_cpu_device::insn_calli (UINT32 insn)
/* Execute "bla isrc1ni,isrc2,sbroff" instruction. */
-void i860_cpu_device::insn_bla (UINT32 insn)
+void i860_cpu_device::insn_bla (uint32_t insn)
{
- UINT32 isrc1 = get_isrc1 (insn);
- UINT32 isrc2 = get_isrc2 (insn);
- UINT32 target_addr = 0;
- INT32 sbroff = 0;
+ uint32_t isrc1 = get_isrc1 (insn);
+ uint32_t isrc2 = get_isrc2 (insn);
+ uint32_t target_addr = 0;
+ int32_t sbroff = 0;
int lcc_tmp = 0;
- UINT32 orig_pc = m_pc;
- UINT32 orig_isrc2val = get_iregval (isrc2);
+ uint32_t orig_pc = m_pc;
+ uint32_t orig_isrc2val = get_iregval (isrc2);
#ifdef TRACE_UNDEFINED_I860
/* Check for undefined behavior. */
@@ -2564,10 +2564,10 @@ void i860_cpu_device::insn_bla (UINT32 insn)
/* Compute the target address from the sbroff field. */
sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
- target_addr = (INT32)m_pc + 4 + (sbroff << 2);
+ target_addr = (int32_t)m_pc + 4 + (sbroff << 2);
/* Determine comparison result based on opcode. */
- lcc_tmp = ((INT32)get_iregval (isrc2) >= -(INT32)get_iregval (isrc1));
+ lcc_tmp = ((int32_t)get_iregval (isrc2) >= -(int32_t)get_iregval (isrc1));
set_iregval (isrc2, get_iregval (isrc1) + orig_isrc2val);
@@ -2597,12 +2597,12 @@ void i860_cpu_device::insn_bla (UINT32 insn)
/* Execute "flush #const(isrc2)" or "flush #const(isrc2)++" instruction. */
-void i860_cpu_device::insn_flush (UINT32 insn)
+void i860_cpu_device::insn_flush (uint32_t insn)
{
- UINT32 src1val = sign_ext (get_imm16 (insn), 16);
- UINT32 isrc2 = get_isrc2 (insn);
+ uint32_t src1val = sign_ext (get_imm16 (insn), 16);
+ uint32_t isrc2 = get_isrc2 (insn);
int auto_inc = (insn & 1);
- UINT32 eff = 0;
+ uint32_t eff = 0;
/* Technically, idest should be encoded as r0 because idest
is undefined after the instruction. We don't currently
@@ -2635,11 +2635,11 @@ void i860_cpu_device::insn_flush (UINT32 insn)
The pfmul3.dd differs from pfmul.dd in that it treats the pipeline
as 3 stages, even though it is a double precision multiply. */
-void i860_cpu_device::insn_fmul (UINT32 insn)
+void i860_cpu_device::insn_fmul (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
@@ -2771,17 +2771,17 @@ void i860_cpu_device::insn_fmul (UINT32 insn)
/* Execute "fmlow.dd fsrc1,fsrc2,fdest" instruction. */
-void i860_cpu_device::insn_fmlow (UINT32 insn)
+void i860_cpu_device::insn_fmlow (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
double v1 = get_fregval_d (fsrc1);
double v2 = get_fregval_d (fsrc2);
- INT64 i1 = *(UINT64 *)&v1;
- INT64 i2 = *(UINT64 *)&v2;
- INT64 tmp = 0;
+ int64_t i1 = *(uint64_t *)&v1;
+ int64_t i2 = *(uint64_t *)&v2;
+ int64_t tmp = 0;
/* Only .dd is valid for fmlow. */
if ((insn & 0x180) != 0x180)
@@ -2804,11 +2804,11 @@ void i860_cpu_device::insn_fmlow (UINT32 insn)
/* Execute [p]fadd.{ss,sd,dd} fsrc1,fsrc2,fdest (.ds disallowed above). */
-void i860_cpu_device::insn_fadd_sub (UINT32 insn)
+void i860_cpu_device::insn_fadd_sub (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
@@ -2969,11 +2969,11 @@ static const struct
/* 1111 */ { OP_SRC1, OP_SRC2, OP_T, OP_APIPE|FLAGM, 0, 0}
};
-float i860_cpu_device::get_fval_from_optype_s (UINT32 insn, int optype)
+float i860_cpu_device::get_fval_from_optype_s (uint32_t insn, int optype)
{
float retval = 0.0;
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
optype &= ~FLAGM;
switch (optype)
@@ -3008,11 +3008,11 @@ float i860_cpu_device::get_fval_from_optype_s (UINT32 insn, int optype)
}
-double i860_cpu_device::get_fval_from_optype_d (UINT32 insn, int optype)
+double i860_cpu_device::get_fval_from_optype_d (uint32_t insn, int optype)
{
double retval = 0.0;
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
optype &= ~FLAGM;
switch (optype)
@@ -3057,11 +3057,11 @@ double i860_cpu_device::get_fval_from_optype_d (UINT32 insn, int optype)
floating point operations. The S bit denotes the precision of the
multiplication source, while the R bit denotes the precision of
the addition source as well as precision of all results. */
-void i860_cpu_device::insn_dualop (UINT32 insn)
+void i860_cpu_device::insn_dualop (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
int is_pfam = insn & 0x400; /* 1 = pfam, 0 = pfmam. */
@@ -3318,10 +3318,10 @@ void i860_cpu_device::insn_dualop (UINT32 insn)
/* Execute frcp.{ss,sd,dd} fsrc2,fdest (.ds disallowed above). */
-void i860_cpu_device::insn_frcp (UINT32 insn)
+void i860_cpu_device::insn_frcp (uint32_t insn)
{
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
@@ -3347,9 +3347,9 @@ void i860_cpu_device::insn_frcp (UINT32 insn)
/* Real i860 isn't a precise as a real divide, but this should
be okay. */
SET_FSR_SE (0);
- *((UINT64 *)&v) &= 0xfffff00000000000ULL;
+ *((uint64_t *)&v) &= 0xfffff00000000000ULL;
res = (double)1.0/v;
- *((UINT64 *)&res) &= 0xfffff00000000000ULL;
+ *((uint64_t *)&res) &= 0xfffff00000000000ULL;
if (res_prec)
set_fregval_d (fdest, res);
else
@@ -3376,9 +3376,9 @@ void i860_cpu_device::insn_frcp (UINT32 insn)
/* Real i860 isn't a precise as a real divide, but this should
be okay. */
SET_FSR_SE (0);
- *((UINT32 *)&v) &= 0xffff8000;
+ *((uint32_t *)&v) &= 0xffff8000;
res = (float)1.0/v;
- *((UINT32 *)&res) &= 0xffff8000;
+ *((uint32_t *)&res) &= 0xffff8000;
if (res_prec)
set_fregval_d (fdest, (double)res);
else
@@ -3389,10 +3389,10 @@ void i860_cpu_device::insn_frcp (UINT32 insn)
/* Execute frsqr.{ss,sd,dd} fsrc2,fdest (.ds disallowed above). */
-void i860_cpu_device::insn_frsqr (UINT32 insn)
+void i860_cpu_device::insn_frsqr (uint32_t insn)
{
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
@@ -3430,9 +3430,9 @@ void i860_cpu_device::insn_frsqr (UINT32 insn)
else
{
SET_FSR_SE (0);
- *((UINT64 *)&v) &= 0xfffff00000000000ULL;
+ *((uint64_t *)&v) &= 0xfffff00000000000ULL;
res = (double)1.0/sqrt (v);
- *((UINT64 *)&res) &= 0xfffff00000000000ULL;
+ *((uint64_t *)&res) &= 0xfffff00000000000ULL;
if (res_prec)
set_fregval_d (fdest, res);
else
@@ -3457,10 +3457,10 @@ void i860_cpu_device::insn_frsqr (UINT32 insn)
else
{
SET_FSR_SE (0);
- *((UINT32 *)&v) &= 0xffff8000;
+ *((uint32_t *)&v) &= 0xffff8000;
// FIXME: shouldn't this be 1.0f / sqrtf(v) ?
res = (float) (1.0/sqrt (v));
- *((UINT32 *)&res) &= 0xffff8000;
+ *((uint32_t *)&res) &= 0xffff8000;
if (res_prec)
set_fregval_d (fdest, (double)res);
else
@@ -3471,15 +3471,15 @@ void i860_cpu_device::insn_frsqr (UINT32 insn)
/* Execute fxfr fsrc1,idest. */
-void i860_cpu_device::insn_fxfr (UINT32 insn)
+void i860_cpu_device::insn_fxfr (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 idest = get_idest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t idest = get_idest (insn);
float fv = 0;
/* This is a bit-pattern transfer, not a conversion. */
fv = get_fregval_s (fsrc1);
- set_iregval (idest, *(UINT32 *)&fv);
+ set_iregval (idest, *(uint32_t *)&fv);
}
@@ -3491,10 +3491,10 @@ void i860_cpu_device::insn_fxfr (UINT32 insn)
results. Inconsistent.
Update: The vendor SVR4 assembler does not accept .ss combination,
so the latter sentence above appears to be the correct way. */
-void i860_cpu_device::insn_ftrunc (UINT32 insn)
+void i860_cpu_device::insn_ftrunc (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
@@ -3512,7 +3512,7 @@ void i860_cpu_device::insn_ftrunc (UINT32 insn)
if (src_prec)
{
double v1 = get_fregval_d (fsrc1);
- INT32 iv = (INT32)v1;
+ int32_t iv = (int32_t)v1;
/* We always write a single, since the lower 32-bits of fdest
get the result (and the even numbered reg is the lower). */
set_fregval_s (fdest, *(float *)&iv);
@@ -3520,7 +3520,7 @@ void i860_cpu_device::insn_ftrunc (UINT32 insn)
else
{
float v1 = get_fregval_s (fsrc1);
- INT32 iv = (INT32)v1;
+ int32_t iv = (int32_t)v1;
/* We always write a single, since the lower 32-bits of fdest
get the result (and the even numbered reg is the lower). */
set_fregval_s (fdest, *(float *)&iv);
@@ -3540,10 +3540,10 @@ void i860_cpu_device::insn_ftrunc (UINT32 insn)
/* Execute [p]famov.{ss,sd,ds,dd} fsrc1,fdest. */
-void i860_cpu_device::insn_famov (UINT32 insn)
+void i860_cpu_device::insn_famov (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
@@ -3617,11 +3617,11 @@ void i860_cpu_device::insn_famov (UINT32 insn)
/* Execute [p]fiadd/sub.{ss,dd} fsrc1,fsrc2,fdest. */
-void i860_cpu_device::insn_fiadd_sub (UINT32 insn)
+void i860_cpu_device::insn_fiadd_sub (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
@@ -3643,9 +3643,9 @@ void i860_cpu_device::insn_fiadd_sub (UINT32 insn)
{
double v1 = get_fregval_d (fsrc1);
double v2 = get_fregval_d (fsrc2);
- UINT64 iv1 = *(UINT64 *)&v1;
- UINT64 iv2 = *(UINT64 *)&v2;
- UINT64 r;
+ uint64_t iv1 = *(uint64_t *)&v1;
+ uint64_t iv2 = *(uint64_t *)&v2;
+ uint64_t r;
if (is_sub)
r = iv1 - iv2;
else
@@ -3659,13 +3659,13 @@ void i860_cpu_device::insn_fiadd_sub (UINT32 insn)
{
float v1 = get_fregval_s (fsrc1);
float v2 = get_fregval_s (fsrc2);
- UINT64 iv1 = (UINT64)(*(UINT32 *)&v1);
- UINT64 iv2 = (UINT64)(*(UINT32 *)&v2);
- UINT32 r;
+ uint64_t iv1 = (uint64_t)(*(uint32_t *)&v1);
+ uint64_t iv2 = (uint64_t)(*(uint32_t *)&v2);
+ uint32_t r;
if (is_sub)
- r = (UINT32)(iv1 - iv2);
+ r = (uint32_t)(iv1 - iv2);
else
- r = (UINT32)(iv1 + iv2);
+ r = (uint32_t)(iv1 + iv2);
if (res_prec)
assert (0); /* .sd not allowed. */
else
@@ -3717,11 +3717,11 @@ void i860_cpu_device::insn_fiadd_sub (UINT32 insn)
/* Execute pf{gt,le,eq}.{ss,dd} fsrc1,fsrc2,fdest.
Opcode pfgt has R bit cleared; pfle has R bit set. */
-void i860_cpu_device::insn_fcmp (UINT32 insn)
+void i860_cpu_device::insn_fcmp (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
double dbl_tmp_dest = 0.0;
double sgl_tmp_dest = 0.0;
@@ -3796,20 +3796,20 @@ void i860_cpu_device::insn_fcmp (UINT32 insn)
/* Execute [p]fzchk{l,s} fsrc1,fsrc2,fdest.
The fzchk instructions have S and R bits set. */
-void i860_cpu_device::insn_fzchk (UINT32 insn)
+void i860_cpu_device::insn_fzchk (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
int is_fzchks = insn & 8; /* 1 = fzchks, 0 = fzchkl. */
double dbl_tmp_dest = 0.0;
int i;
double v1 = get_fregval_d (fsrc1);
double v2 = get_fregval_d (fsrc2);
- UINT64 iv1 = *(UINT64 *)&v1;
- UINT64 iv2 = *(UINT64 *)&v2;
- UINT64 r = 0;
+ uint64_t iv1 = *(uint64_t *)&v1;
+ uint64_t iv2 = *(uint64_t *)&v2;
+ uint64_t r = 0;
char pm = GET_PSR_PM ();
/* Check for S and R bits set. */
@@ -3827,16 +3827,16 @@ void i860_cpu_device::insn_fzchk (UINT32 insn)
pm = (pm >> 4) & 0x0f;
for (i = 3; i >= 0; i--)
{
- UINT16 ps1 = (iv1 >> (i * 16)) & 0xffff;
- UINT16 ps2 = (iv2 >> (i * 16)) & 0xffff;
+ uint16_t ps1 = (iv1 >> (i * 16)) & 0xffff;
+ uint16_t ps2 = (iv2 >> (i * 16)) & 0xffff;
if (ps2 <= ps1)
{
- r |= ((UINT64)ps2 << (i * 16));
+ r |= ((uint64_t)ps2 << (i * 16));
pm |= (1 << (7 - (3 - i)));
}
else
{
- r |= ((UINT64)ps1 << (i * 16));
+ r |= ((uint64_t)ps1 << (i * 16));
pm &= ~(1 << (7 - (3 - i)));
}
}
@@ -3846,16 +3846,16 @@ void i860_cpu_device::insn_fzchk (UINT32 insn)
pm = (pm >> 2) & 0x3f;
for (i = 1; i >= 0; i--)
{
- UINT32 ps1 = (iv1 >> (i * 32)) & 0xffffffff;
- UINT32 ps2 = (iv2 >> (i * 32)) & 0xffffffff;
+ uint32_t ps1 = (iv1 >> (i * 32)) & 0xffffffff;
+ uint32_t ps2 = (iv2 >> (i * 32)) & 0xffffffff;
if (ps2 <= ps1)
{
- r |= ((UINT64)ps2 << (i * 32));
+ r |= ((uint64_t)ps2 << (i * 32));
pm |= (1 << (7 - (1 - i)));
}
else
{
- r |= ((UINT64)ps1 << (i * 32));
+ r |= ((uint64_t)ps1 << (i * 32));
pm &= ~(1 << (7 - (1 - i)));
}
}
@@ -3892,14 +3892,14 @@ void i860_cpu_device::insn_fzchk (UINT32 insn)
/* Execute [p]form.dd fsrc1,fdest.
The form.dd instructions have S and R bits set. */
-void i860_cpu_device::insn_form (UINT32 insn)
+void i860_cpu_device::insn_form (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fdest = get_fdest (insn);
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
double dbl_tmp_dest = 0.0;
double v1 = get_fregval_d (fsrc1);
- UINT64 iv1 = *(UINT64 *)&v1;
+ uint64_t iv1 = *(uint64_t *)&v1;
/* Check for S and R bits set. */
if ((insn & 0x180) != 0x180)
@@ -3938,18 +3938,18 @@ void i860_cpu_device::insn_form (UINT32 insn)
/* Execute [p]faddp fsrc1,fsrc2,fdest. */
-void i860_cpu_device::insn_faddp (UINT32 insn)
+void i860_cpu_device::insn_faddp (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
double dbl_tmp_dest = 0.0;
double v1 = get_fregval_d (fsrc1);
double v2 = get_fregval_d (fsrc2);
- UINT64 iv1 = *(UINT64 *)&v1;
- UINT64 iv2 = *(UINT64 *)&v2;
- UINT64 r = 0;
+ uint64_t iv1 = *(uint64_t *)&v1;
+ uint64_t iv2 = *(uint64_t *)&v2;
+ uint64_t r = 0;
int ps = GET_PSR_PS ();
r = iv1 + iv2;
@@ -4003,18 +4003,18 @@ void i860_cpu_device::insn_faddp (UINT32 insn)
/* Execute [p]faddz fsrc1,fsrc2,fdest. */
-void i860_cpu_device::insn_faddz (UINT32 insn)
+void i860_cpu_device::insn_faddz (uint32_t insn)
{
- UINT32 fsrc1 = get_fsrc1 (insn);
- UINT32 fsrc2 = get_fsrc2 (insn);
- UINT32 fdest = get_fdest (insn);
+ uint32_t fsrc1 = get_fsrc1 (insn);
+ uint32_t fsrc2 = get_fsrc2 (insn);
+ uint32_t fdest = get_fdest (insn);
int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
double dbl_tmp_dest = 0.0;
double v1 = get_fregval_d (fsrc1);
double v2 = get_fregval_d (fsrc2);
- UINT64 iv1 = *(UINT64 *)&v1;
- UINT64 iv2 = *(UINT64 *)&v2;
- UINT64 r = 0;
+ uint64_t iv1 = *(uint64_t *)&v1;
+ uint64_t iv2 = *(uint64_t *)&v2;
+ uint64_t r = 0;
r = iv1 + iv2;
dbl_tmp_dest = *(double *)&r;
@@ -4283,7 +4283,7 @@ const i860_cpu_device::decode_tbl_t i860_cpu_device::fp_decode_tbl[128] = {
* insn = instruction at the current PC to execute.
* non_shadow = This insn is not in the shadow of a delayed branch).
*/
-void i860_cpu_device::decode_exec (UINT32 insn, UINT32 non_shadow)
+void i860_cpu_device::decode_exec (uint32_t insn, uint32_t non_shadow)
{
int upper_6bits = (insn >> 26) & 0x3f;
char flags = 0;
@@ -4428,7 +4428,7 @@ void i860_cpu_device::execute_run()
/* Decode and execute loop. */
while (m_icount > 0)
{
- UINT32 savepc = m_pc;
+ uint32_t savepc = m_pc;
m_pc_updated = 0;
m_pending_trap = 0;
@@ -4507,14 +4507,14 @@ extern unsigned disasm_i860 (char *buf, unsigned int pc, unsigned int insn);
/* Disassemble `len' instructions starting at `addr'. */
-void i860_cpu_device::disasm (UINT32 addr, int len)
+void i860_cpu_device::disasm (uint32_t addr, int len)
{
- UINT32 insn;
+ uint32_t insn;
int j;
for (j = 0; j < len; j++)
{
char buf[256];
- UINT32 phys_addr = addr;
+ uint32_t phys_addr = addr;
if (GET_DIRBASE_ATE ())
phys_addr = get_address_translation (addr, 1 /* is_dataref */, 0 /* is_write */);
@@ -4537,9 +4537,9 @@ void i860_cpu_device::disasm (UINT32 addr, int len)
/* Dump `len' bytes starting at `addr'. */
-void i860_cpu_device::dbg_db (UINT32 addr, int len)
+void i860_cpu_device::dbg_db (uint32_t addr, int len)
{
- UINT8 b[16];
+ uint8_t b[16];
int i;
/* This will always dump a multiple of 16 bytes, even if 'len' isn't. */
while (len > 0)
@@ -4549,7 +4549,7 @@ void i860_cpu_device::dbg_db (UINT32 addr, int len)
fprintf (stderr, "0x%08x: ", addr);
for (i = 0; i < 16; i++)
{
- UINT32 phys_addr = addr;
+ uint32_t phys_addr = addr;
if (GET_DIRBASE_ATE ())
phys_addr = get_address_translation (addr, 1 /* is_dataref */, 0 /* is_write */);
@@ -4575,8 +4575,8 @@ void i860_cpu_device::dbg_db (UINT32 addr, int len)
void debugger (i860s *cpustate)
{
char buf[256];
- UINT32 curr_disasm = m_pc;
- UINT32 curr_dumpdb = 0;
+ uint32_t curr_disasm = m_pc;
+ uint32_t curr_dumpdb = 0;
int c = 0;
if (m_single_stepping > 1 && m_single_stepping != m_pc)
@@ -4658,7 +4658,7 @@ void debugger (i860s *cpustate)
}
else if (buf[0] == 'x' && buf[1] == '0')
{
- UINT32 v;
+ uint32_t v;
sscanf (buf + 1, "%x", &v);
if (GET_DIRBASE_ATE ())
fprintf (stderr, "vma 0x%08x ==> phys 0x%08x\n", v,
diff --git a/src/devices/cpu/i860/i860dis.cpp b/src/devices/cpu/i860/i860dis.cpp
index d35c3d33973..71f6469d282 100644
--- a/src/devices/cpu/i860/i860dis.cpp
+++ b/src/devices/cpu/i860/i860dis.cpp
@@ -33,9 +33,9 @@ static const char *const cr2str[] =
/* Sign extend N-bit number. */
-static INT32 sign_ext(UINT32 x, int n)
+static int32_t sign_ext(uint32_t x, int n)
{
- INT32 t;
+ int32_t t;
t = x >> (n - 1);
t = ((-t) << n) | x;
return t;
@@ -44,7 +44,7 @@ static INT32 sign_ext(UINT32 x, int n)
/* Basic integer 3-address register format:
* mnemonic %rs1,%rs2,%rd */
-static void int_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_12d(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
/* Possibly prefix shrd with 'd.' */
if (((insn & 0xfc000000) == 0xb0000000) && (insn & 0x200))
@@ -58,14 +58,14 @@ static void int_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Basic integer 3-address imm16 format:
* mnemonic #imm16,%rs2,%rd */
-static void int_i2d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_i2d(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
/* Sign extend the 16-bit immediate.
Print as hex for the bitwise operations. */
int upper_6bits = (insn >> 26) & 0x3f;
if (upper_6bits >= 0x30 && upper_6bits <= 0x3f)
sprintf(buf, "%s\t0x%04x,%%r%d,%%r%d", mnemonic,
- (UINT32)(get_imm16 (insn)), get_isrc2 (insn), get_idest (insn));
+ (uint32_t)(get_imm16 (insn)), get_isrc2 (insn), get_idest (insn));
else
sprintf(buf, "%s\t%d,%%r%d,%%r%d", mnemonic,
sign_ext(get_imm16 (insn), 16), get_isrc2 (insn), get_idest (insn));
@@ -73,21 +73,21 @@ static void int_i2d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Integer (mixed) 2-address isrc1ni,fdest. */
-static void int_1d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_1d(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
sprintf(buf, "%s\t%%r%d,%%f%d", mnemonic, get_isrc1 (insn), get_fdest (insn));
}
/* Integer (mixed) 2-address csrc2,idest. */
-static void int_cd(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_cd(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
sprintf(buf, "%s\t%%%s,%%r%d", mnemonic, cr2str[get_creg (insn)], get_idest (insn));
}
/* Integer (mixed) 2-address isrc1,csrc2. */
-static void int_1c(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_1c(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
sprintf(buf, "%s\t%%r%d,%%%s", mnemonic, get_isrc1(insn), cr2str[get_creg (insn)]);
}
@@ -95,7 +95,7 @@ static void int_1c(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Integer 1-address register format:
* mnemonic %rs1 */
-static void int_1(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_1(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
sprintf(buf, "%s\t%%r%d", mnemonic, get_isrc1 (insn));
}
@@ -103,7 +103,7 @@ static void int_1(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Integer no-address register format:
* mnemonic */
-static void int_0(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_0(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
sprintf(buf, "%s", mnemonic);
}
@@ -111,7 +111,7 @@ static void int_0(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Basic floating-point 3-address register format:
* mnemonic %fs1,%fs2,%fd */
-static void flop_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void flop_12d(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
const char *const suffix[4] = { "ss", "sd", "ds", "dd" };
const char *prefix_d, *prefix_p;
@@ -165,7 +165,7 @@ static void flop_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Floating-point 2-address register format:
* mnemonic %fs1,%fd */
-static void flop_1d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void flop_1d(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
const char *const suffix[4] = { "ss", "sd", "ds", "dd" };
const char *prefix_d, *prefix_p;
@@ -179,7 +179,7 @@ static void flop_1d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Floating-point 2-address register format:
* mnemonic %fs2,%fd */
-static void flop_2d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void flop_2d(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
const char *const suffix[4] = { "ss", "sd", "ds", "dd" };
const char *prefix_d;
@@ -192,7 +192,7 @@ static void flop_2d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Floating-point (mixed) 2-address register format:
* fxfr fsrc1,idest. */
-static void flop_fxfr(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void flop_fxfr(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
const char *prefix_d = (insn & 0x200) ? "d." : "";
sprintf(buf, "%s%s\t%%f%d,%%r%d", prefix_d, mnemonic, get_fsrc1 (insn),
@@ -202,48 +202,48 @@ static void flop_fxfr(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Branch with reg,reg,sbroff format:
* mnemonic %rs1,%rs2,sbroff */
-static void int_12S(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_12S(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
- INT32 sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
- INT32 rel = (INT32)pc + (sbroff << 2) + 4;
+ int32_t sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
+ int32_t rel = (int32_t)pc + (sbroff << 2) + 4;
sprintf(buf, "%s\t%%r%d,%%r%d,0x%08x", mnemonic, get_isrc1 (insn),
- get_isrc2 (insn), (UINT32)rel);
+ get_isrc2 (insn), (uint32_t)rel);
}
/* Branch with #const5,reg,sbroff format:
* mnemonic #const5,%rs2,sbroff */
-static void int_i2S(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_i2S(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
- INT32 sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
- INT32 rel = (INT32)pc + (sbroff << 2) + 4;
+ int32_t sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
+ int32_t rel = (int32_t)pc + (sbroff << 2) + 4;
sprintf(buf, "%s\t%d,%%r%d,0x%08x", mnemonic, ((insn >> 11) & 0x1f),
- get_isrc2 (insn), (UINT32)rel);
+ get_isrc2 (insn), (uint32_t)rel);
}
/* Branch with lbroff format:
* mnemonic lbroff */
-static void int_L(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_L(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
- INT32 lbroff = sign_ext ((insn & 0x03ffffff), 26);
- INT32 rel = (INT32)pc + (lbroff << 2) + 4;
+ int32_t lbroff = sign_ext ((insn & 0x03ffffff), 26);
+ int32_t rel = (int32_t)pc + (lbroff << 2) + 4;
- sprintf(buf, "%s\t0x%08x", mnemonic, (UINT32)rel);
+ sprintf(buf, "%s\t0x%08x", mnemonic, (uint32_t)rel);
}
/* Integer load.
* ld.{b,s,l} isrc1(isrc2),idest
* ld.{b,s,l} #const(isrc2),idest */
-static void int_ldx(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_ldx(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
/* Operand size, in bytes. */
int sizes[4] = { 1, 1, 2, 4 };
const char *const suffix[4] = { "b", "b", "s", "l" };
- UINT32 idx;
+ uint32_t idx;
/* Bits 28 and 0 determine the operand size. */
idx = ((insn >> 27) & 2) | (insn & 1);
@@ -252,7 +252,7 @@ static void int_ldx(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
if (insn & 0x04000000)
{
/* Chop off lower bits of displacement. */
- INT32 immsrc1 = sign_ext (get_imm16 (insn), 16);
+ int32_t immsrc1 = sign_ext (get_imm16 (insn), 16);
int size = sizes[idx];
immsrc1 &= ~(size - 1);
sprintf(buf, "%s%s\t%d(%%r%d),%%r%d", mnemonic, suffix[idx],
@@ -265,14 +265,14 @@ static void int_ldx(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* Integer store: st.b isrc1ni,#const(isrc2) */
-static void int_stx(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_stx(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
/* Operand size, in bytes. */
int sizes[4] = { 1, 1, 2, 4 };
const char *const suffix[4] = { "b", "b", "s", "l" };
int idx;
int size;
- INT32 immsrc = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
+ int32_t immsrc = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
/* Bits 28 and 0 determine the operand size. */
idx = ((insn >> 27) & 2) | (insn & 1);
@@ -291,9 +291,9 @@ static void int_stx(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
* "fst.y fdest,isrc1(isrc2)", "fst.y fdest,isrc1(isrc2)++",
* "fst.y fdest,#const(isrc2)" or "fst.y fdest,#const(isrc2)++"
* Where y = {l,d,q}. Note, there is no pfld.q, though. */
-static void int_fldst(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_fldst(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
- INT32 immsrc1 = sign_ext (get_imm16 (insn), 16);
+ int32_t immsrc1 = sign_ext (get_imm16 (insn), 16);
/* Operand size, in bytes. */
int sizes[4] = { 8, 4, 16, 4 };
const char *const suffix[4] = { "d", "l", "q", "l" };
@@ -353,10 +353,10 @@ static void int_fldst(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* flush #const(isrc2)[++]. */
-static void int_flush(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
+static void int_flush(char *buf, char *mnemonic, uint32_t pc, uint32_t insn)
{
const char *const auto_suff[2] = { "", "++" };
- INT32 immsrc = sign_ext (get_imm16 (insn), 16);
+ int32_t immsrc = sign_ext (get_imm16 (insn), 16);
immsrc &= ~(16-1);
sprintf(buf, "%s\t%d(%%r%d)%s", mnemonic, immsrc, get_isrc2 (insn),
auto_suff[(insn & 1)]);
@@ -375,7 +375,7 @@ struct decode_tbl_t
{
/* Disassembly function for this opcode.
Call with buffer, mnemonic, pc, insn. */
- void (*insn_dis)(char *, char *, UINT32, UINT32);
+ void (*insn_dis)(char *, char *, uint32_t, uint32_t);
/* Flags for this opcode. */
char flags;
@@ -645,7 +645,7 @@ static void i860_dasm_tab_replacer(char* buf, int tab_size)
CPU_DISASSEMBLE( i860 )
{
- UINT32 insn = (oprom[0] << 0) |
+ uint32_t insn = (oprom[0] << 0) |
(oprom[1] << 8) |
(oprom[2] << 16) |
(oprom[3] << 24);
diff --git a/src/devices/cpu/i960/i960.cpp b/src/devices/cpu/i960/i960.cpp
index 3e74c2e676a..4be6f937e42 100644
--- a/src/devices/cpu/i960/i960.cpp
+++ b/src/devices/cpu/i960/i960.cpp
@@ -16,7 +16,7 @@ CPU_DISASSEMBLE( i960 );
const device_type I960 = &device_creator<i960_cpu_device>;
-i960_cpu_device::i960_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i960_cpu_device::i960_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, I960, "i960kb", tag, owner, clock, "i960kb", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0), m_rcache_pos(0), m_SAT(0), m_PRCB(0), m_PC(0), m_AC(0), m_IP(0), m_PIP(0), m_ICR(0), m_bursting(0), m_immediate_irq(0),
m_immediate_vector(0), m_immediate_pri(0), m_program(nullptr), m_direct(nullptr), m_icount(0)
@@ -24,7 +24,7 @@ i960_cpu_device::i960_cpu_device(const machine_config &mconfig, const char *tag,
}
-UINT32 i960_cpu_device::i960_read_dword_unaligned(UINT32 address)
+uint32_t i960_cpu_device::i960_read_dword_unaligned(uint32_t address)
{
if (!DWORD_ALIGNED(address))
return m_program->read_byte(address) | m_program->read_byte(address+1)<<8 | m_program->read_byte(address+2)<<16 | m_program->read_byte(address+3)<<24;
@@ -32,7 +32,7 @@ UINT32 i960_cpu_device::i960_read_dword_unaligned(UINT32 address)
return m_program->read_dword(address);
}
-UINT16 i960_cpu_device::i960_read_word_unaligned(UINT32 address)
+uint16_t i960_cpu_device::i960_read_word_unaligned(uint32_t address)
{
if (!WORD_ALIGNED(address))
return m_program->read_byte(address) | m_program->read_byte(address+1)<<8;
@@ -40,7 +40,7 @@ UINT16 i960_cpu_device::i960_read_word_unaligned(UINT32 address)
return m_program->read_word(address);
}
-void i960_cpu_device::i960_write_dword_unaligned(UINT32 address, UINT32 data)
+void i960_cpu_device::i960_write_dword_unaligned(uint32_t address, uint32_t data)
{
if (!DWORD_ALIGNED(address))
{
@@ -55,7 +55,7 @@ void i960_cpu_device::i960_write_dword_unaligned(UINT32 address, UINT32 data)
}
}
-void i960_cpu_device::i960_write_word_unaligned(UINT32 address, UINT16 data)
+void i960_cpu_device::i960_write_word_unaligned(uint32_t address, uint16_t data)
{
if (!WORD_ALIGNED(address))
{
@@ -68,9 +68,9 @@ void i960_cpu_device::i960_write_word_unaligned(UINT32 address, UINT16 data)
}
}
-void i960_cpu_device::send_iac(UINT32 adr)
+void i960_cpu_device::send_iac(uint32_t adr)
{
- UINT32 iac[4];
+ uint32_t iac[4];
iac[0] = m_program->read_dword(adr);
iac[1] = m_program->read_dword(adr+4);
iac[2] = m_program->read_dword(adr+8);
@@ -87,11 +87,11 @@ void i960_cpu_device::send_iac(UINT32 adr)
}
}
-UINT32 i960_cpu_device::get_ea(UINT32 opcode)
+uint32_t i960_cpu_device::get_ea(uint32_t opcode)
{
int abase = (opcode >> 14) & 0x1f;
if(!(opcode & 0x00001000)) { // MEMA
- UINT32 offset = opcode & 0x1fff;
+ uint32_t offset = opcode & 0x1fff;
if(!(opcode & 0x2000))
return offset;
else
@@ -100,7 +100,7 @@ UINT32 i960_cpu_device::get_ea(UINT32 opcode)
int index = opcode & 0x1f;
int scale = (opcode >> 7) & 0x7;
int mode = (opcode >> 10) & 0xf;
- UINT32 ret;
+ uint32_t ret;
switch(mode) {
case 0x4:
@@ -135,7 +135,7 @@ UINT32 i960_cpu_device::get_ea(UINT32 opcode)
}
}
-UINT32 i960_cpu_device::get_1_ri(UINT32 opcode)
+uint32_t i960_cpu_device::get_1_ri(uint32_t opcode)
{
if(!(opcode & 0x00000800))
return m_r[opcode & 0x1f];
@@ -143,7 +143,7 @@ UINT32 i960_cpu_device::get_1_ri(UINT32 opcode)
return opcode & 0x1f;
}
-UINT32 i960_cpu_device::get_2_ri(UINT32 opcode)
+uint32_t i960_cpu_device::get_2_ri(uint32_t opcode)
{
if(!(opcode & 0x00001000))
return m_r[(opcode>>14) & 0x1f];
@@ -151,15 +151,15 @@ UINT32 i960_cpu_device::get_2_ri(UINT32 opcode)
return (opcode>>14) & 0x1f;
}
-UINT64 i960_cpu_device::get_2_ri64(UINT32 opcode)
+uint64_t i960_cpu_device::get_2_ri64(uint32_t opcode)
{
if(!(opcode & 0x00001000))
- return m_r[(opcode>>14) & 0x1f] | ((UINT64)m_r[((opcode>>14) & 0x1f)+1]<<32);
+ return m_r[(opcode>>14) & 0x1f] | ((uint64_t)m_r[((opcode>>14) & 0x1f)+1]<<32);
else
return (opcode>>14) & 0x1f;
}
-void i960_cpu_device::set_ri(UINT32 opcode, UINT32 val)
+void i960_cpu_device::set_ri(uint32_t opcode, uint32_t val)
{
if(!(opcode & 0x00002000))
m_r[(opcode>>19) & 0x1f] = val;
@@ -168,7 +168,7 @@ void i960_cpu_device::set_ri(UINT32 opcode, UINT32 val)
}
}
-void i960_cpu_device::set_ri2(UINT32 opcode, UINT32 val, UINT32 val2)
+void i960_cpu_device::set_ri2(uint32_t opcode, uint32_t val, uint32_t val2)
{
if(!(opcode & 0x00002000))
{
@@ -180,7 +180,7 @@ void i960_cpu_device::set_ri2(UINT32 opcode, UINT32 val, UINT32 val2)
}
}
-void i960_cpu_device::set_ri64(UINT32 opcode, UINT64 val)
+void i960_cpu_device::set_ri64(uint32_t opcode, uint64_t val)
{
if(!(opcode & 0x00002000)) {
m_r[(opcode>>19) & 0x1f] = val;
@@ -189,7 +189,7 @@ void i960_cpu_device::set_ri64(UINT32 opcode, UINT64 val)
fatalerror("I960: %x: set_ri64 on literal?\n", m_PIP);
}
-double i960_cpu_device::get_1_rif(UINT32 opcode)
+double i960_cpu_device::get_1_rif(uint32_t opcode)
{
if(!(opcode & 0x00000800))
return u2f(m_r[opcode & 0x1f]);
@@ -203,7 +203,7 @@ double i960_cpu_device::get_1_rif(UINT32 opcode)
}
}
-double i960_cpu_device::get_2_rif(UINT32 opcode)
+double i960_cpu_device::get_2_rif(uint32_t opcode)
{
if(!(opcode & 0x00001000))
return u2f(m_r[(opcode>>14) & 0x1f]);
@@ -217,7 +217,7 @@ double i960_cpu_device::get_2_rif(UINT32 opcode)
}
}
-void i960_cpu_device::set_rif(UINT32 opcode, double val)
+void i960_cpu_device::set_rif(uint32_t opcode, double val)
{
if(!(opcode & 0x00002000))
m_r[(opcode>>19) & 0x1f] = f2u(val);
@@ -227,11 +227,11 @@ void i960_cpu_device::set_rif(UINT32 opcode, double val)
fatalerror("I960: %x: set_rif on literal?\n", m_PIP);
}
-double i960_cpu_device::get_1_rifl(UINT32 opcode)
+double i960_cpu_device::get_1_rifl(uint32_t opcode)
{
if(!(opcode & 0x00000800)) {
- UINT64 v = m_r[opcode & 0x1e];
- v |= ((UINT64)(m_r[(opcode & 0x1e)+1]))<<32;
+ uint64_t v = m_r[opcode & 0x1e];
+ v |= ((uint64_t)(m_r[(opcode & 0x1e)+1]))<<32;
return u2d(v);
} else {
int idx = opcode & 0x1f;
@@ -243,11 +243,11 @@ double i960_cpu_device::get_1_rifl(UINT32 opcode)
}
}
-double i960_cpu_device::get_2_rifl(UINT32 opcode)
+double i960_cpu_device::get_2_rifl(uint32_t opcode)
{
if(!(opcode & 0x00001000)) {
- UINT64 v = m_r[(opcode >> 14) & 0x1e];
- v |= ((UINT64)(m_r[((opcode>>14) & 0x1e)+1]))<<32;
+ uint64_t v = m_r[(opcode >> 14) & 0x1e];
+ v |= ((uint64_t)(m_r[((opcode>>14) & 0x1e)+1]))<<32;
return u2d(v);
} else {
int idx = (opcode>>14) & 0x1f;
@@ -259,10 +259,10 @@ double i960_cpu_device::get_2_rifl(UINT32 opcode)
}
}
-void i960_cpu_device::set_rifl(UINT32 opcode, double val)
+void i960_cpu_device::set_rifl(uint32_t opcode, double val)
{
if(!(opcode & 0x00002000)) {
- UINT64 v = d2u(val);
+ uint64_t v = d2u(val);
m_r[(opcode>>19) & 0x1e] = v;
m_r[((opcode>>19) & 0x1e)+1] = v>>32;
} else if(!(opcode & 0x00e00000))
@@ -271,7 +271,7 @@ void i960_cpu_device::set_rifl(UINT32 opcode, double val)
fatalerror("I960: %x: set_rifl on literal?\n", m_PIP);
}
-UINT32 i960_cpu_device::get_1_ci(UINT32 opcode)
+uint32_t i960_cpu_device::get_1_ci(uint32_t opcode)
{
if(!(opcode & 0x00002000))
return m_r[(opcode >> 19) & 0x1f];
@@ -279,30 +279,30 @@ UINT32 i960_cpu_device::get_1_ci(UINT32 opcode)
return (opcode >> 19) & 0x1f;
}
-UINT32 i960_cpu_device::get_2_ci(UINT32 opcode)
+uint32_t i960_cpu_device::get_2_ci(uint32_t opcode)
{
return m_r[(opcode >> 14) & 0x1f];
}
-UINT32 i960_cpu_device::get_disp(UINT32 opcode)
+uint32_t i960_cpu_device::get_disp(uint32_t opcode)
{
- UINT32 disp;
+ uint32_t disp;
disp = opcode & 0xffffff;
if(disp & 0x00800000)
disp |= 0xff000000;
return disp-4;
}
-UINT32 i960_cpu_device::get_disp_s(UINT32 opcode)
+uint32_t i960_cpu_device::get_disp_s(uint32_t opcode)
{
- UINT32 disp;
+ uint32_t disp;
disp = opcode & 0x1fff;
if(disp & 0x00001000)
disp |= 0xffffe000;
return disp-4;
}
-void i960_cpu_device::cmp_s(INT32 v1, INT32 v2)
+void i960_cpu_device::cmp_s(int32_t v1, int32_t v2)
{
m_AC &= ~7;
if(v1<v2)
@@ -313,7 +313,7 @@ void i960_cpu_device::cmp_s(INT32 v1, INT32 v2)
m_AC |= 1;
}
-void i960_cpu_device::cmp_u(UINT32 v1, UINT32 v2)
+void i960_cpu_device::cmp_u(uint32_t v1, uint32_t v2)
{
m_AC &= ~7;
if(v1<v2)
@@ -324,7 +324,7 @@ void i960_cpu_device::cmp_u(UINT32 v1, UINT32 v2)
m_AC |= 1;
}
-void i960_cpu_device::concmp_s(INT32 v1, INT32 v2)
+void i960_cpu_device::concmp_s(int32_t v1, int32_t v2)
{
m_AC &= ~7;
if(v1 <= v2)
@@ -333,7 +333,7 @@ void i960_cpu_device::concmp_s(INT32 v1, INT32 v2)
m_AC |= 1;
}
-void i960_cpu_device::concmp_u(UINT32 v1, UINT32 v2)
+void i960_cpu_device::concmp_u(uint32_t v1, uint32_t v2)
{
m_AC &= ~7;
if(v1 <= v2)
@@ -353,21 +353,21 @@ void i960_cpu_device::cmp_d(double v1, double v2)
m_AC |= 1;
}
-void i960_cpu_device::bxx(UINT32 opcode, int mask)
+void i960_cpu_device::bxx(uint32_t opcode, int mask)
{
if(m_AC & mask) {
m_IP += get_disp(opcode);
}
}
-void i960_cpu_device::bxx_s(UINT32 opcode, int mask)
+void i960_cpu_device::bxx_s(uint32_t opcode, int mask)
{
if(m_AC & mask) {
m_IP += get_disp_s(opcode);
}
}
-void i960_cpu_device::test(UINT32 opcode, int mask)
+void i960_cpu_device::test(uint32_t opcode, int mask)
{
if(m_AC & mask)
m_r[(opcode>>19) & 0x1f] = 1;
@@ -382,7 +382,7 @@ void i960_cpu_device::take_interrupt(int vector, int lvl)
int int_tab = m_program->read_dword(m_PRCB+20); // interrupt table
int int_SP = m_program->read_dword(m_PRCB+24); // interrupt stack
int SP;
- UINT32 IRQV;
+ uint32_t IRQV;
IRQV = m_program->read_dword(int_tab + 36 + (vector-8)*4);
@@ -419,7 +419,7 @@ void i960_cpu_device::check_irqs()
int pending_pri;
int lvl, irq, take = -1;
int vword;
- static const UINT32 lvlmask[4] = { 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 };
+ static const uint32_t lvlmask[4] = { 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 };
pending_pri = m_program->read_dword(int_tab); // read pending priorities
@@ -477,10 +477,10 @@ void i960_cpu_device::check_irqs()
}
}
-void i960_cpu_device::do_call(UINT32 adr, int type, UINT32 stack)
+void i960_cpu_device::do_call(uint32_t adr, int type, uint32_t stack)
{
int i;
- UINT32 FP;
+ uint32_t FP;
// call and callx take 9 cycles base
m_icount -= 9;
@@ -499,7 +499,7 @@ void i960_cpu_device::do_call(UINT32 adr, int type, UINT32 stack)
}
else // a cache entry is available, use it
{
- memcpy(&m_rcache[m_rcache_pos][0], m_r, 0x10 * sizeof(UINT32));
+ memcpy(&m_rcache[m_rcache_pos][0], m_r, 0x10 * sizeof(uint32_t));
m_rcache_frame_addr[m_rcache_pos] = m_r[I960_FP] & ~0x3f;
}
m_rcache_pos++;
@@ -542,7 +542,7 @@ void i960_cpu_device::do_ret_0()
}
else
{
- memcpy(m_r, m_rcache[m_rcache_pos], 0x10*sizeof(UINT32));
+ memcpy(m_r, m_rcache[m_rcache_pos], 0x10*sizeof(uint32_t));
}
// osd_printf_debug("RET (type %d): FP %x, %x => %x, rcache_pos %d\n", type, m_r[I960_FP], m_IP, m_r[I960_RIP], m_rcache_pos);
@@ -551,7 +551,7 @@ void i960_cpu_device::do_ret_0()
void i960_cpu_device::do_ret()
{
- UINT32 x, y;
+ uint32_t x, y;
m_icount -= 7;
switch(m_r[I960_PFP] & 7) {
case 0:
@@ -575,9 +575,9 @@ void i960_cpu_device::do_ret()
}
}
-void i960_cpu_device::execute_op(UINT32 opcode)
+void i960_cpu_device::execute_op(uint32_t opcode)
{
- UINT32 t1, t2;
+ uint32_t t1, t2;
double t1f, t2f;
switch(opcode >> 24) {
@@ -960,11 +960,11 @@ void i960_cpu_device::execute_op(UINT32 opcode)
m_icount--;
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
- if(((INT32)t2) < 0) {
+ if(((int32_t)t2) < 0) {
if(t2 & ((1<<t1)-1))
- set_ri(opcode, (((INT32)t2)>>t1)+1);
+ set_ri(opcode, (((int32_t)t2)>>t1)+1);
else
- set_ri(opcode, ((INT32)t2)>>t1);
+ set_ri(opcode, ((int32_t)t2)>>t1);
} else
set_ri(opcode, t2>>t1);
break;
@@ -973,7 +973,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
m_icount--;
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
- set_ri(opcode, ((INT32)t2)>>t1);
+ set_ri(opcode, ((int32_t)t2)>>t1);
break;
case 0xc: // shlo
@@ -1088,7 +1088,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
switch((opcode >> 7) & 0xf) {
case 0x0: // addc
{
- UINT64 res;
+ uint64_t res;
m_icount -= 2;
t1 = get_1_ri(opcode);
@@ -1098,7 +1098,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
m_AC &= ~0x3; // clear C and V
// set carry
- m_AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0;
+ m_AC |= ((res) & (((uint64_t)1) << 32)) ? 0x2 : 0;
// set overflow
m_AC |= (((res) ^ (t1)) & ((res) ^ (t2)) & 0x80000000) ? 1: 0;
}
@@ -1106,7 +1106,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 0x2: // subc
{
- UINT64 res;
+ uint64_t res;
m_icount -= 2;
t1 = get_1_ri(opcode);
@@ -1116,7 +1116,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
m_AC &= ~0x3; // clear C and V
// set carry
- m_AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0;
+ m_AC |= ((res) & (((uint64_t)1) << 32)) ? 0x2 : 0;
// set overflow
m_AC |= (((t2) ^ (t1)) & ((t2) ^ (res)) & 0x80000000) ? 1 : 0;
}
@@ -1149,7 +1149,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
t1 = opcode & 0x1f;
m_r[t2] = m_r[t2+1] = t1;
} else
- memcpy(m_r+t2, m_r+(opcode & 0x1f), 2*sizeof(UINT32));
+ memcpy(m_r+t2, m_r+(opcode & 0x1f), 2*sizeof(uint32_t));
break;
default:
@@ -1166,7 +1166,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
t1 = opcode & 0x1f;
m_r[t2] = m_r[t2+1] = m_r[t2+2]= t1;
} else
- memcpy(m_r+t2, m_r+(opcode & 0x1f), 3*sizeof(UINT32));
+ memcpy(m_r+t2, m_r+(opcode & 0x1f), 3*sizeof(uint32_t));
break;
default:
@@ -1183,7 +1183,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
t1 = opcode & 0x1f;
m_r[t2] = m_r[t2+1] = m_r[t2+2] = m_r[t2+3] = t1;
} else
- memcpy(m_r+t2, m_r+(opcode & 0x1f), 4*sizeof(UINT32));
+ memcpy(m_r+t2, m_r+(opcode & 0x1f), 4*sizeof(uint32_t));
break;
default:
@@ -1229,7 +1229,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
switch((opcode >> 7) & 0xf) {
case 0x0: // spanbit
{
- UINT32 res = 0xffffffff;
+ uint32_t res = 0xffffffff;
int i;
m_icount -= 10;
@@ -1253,7 +1253,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 0x1: // scanbit
{
- UINT32 res = 0xffffffff;
+ uint32_t res = 0xffffffff;
int i;
m_icount -= 10;
@@ -1316,7 +1316,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
for (i = 0; i < 0x10; i++)
{
- m_program->write_dword(m_rcache_frame_addr[t1] + (i * sizeof(UINT32)), m_rcache[t1][i]);
+ m_program->write_dword(m_rcache_frame_addr[t1] + (i * sizeof(uint32_t)), m_rcache[t1][i]);
}
}
m_rcache_pos = 0;
@@ -1334,13 +1334,13 @@ void i960_cpu_device::execute_op(UINT32 opcode)
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
- set_ri64(opcode, (INT64)t1 * (INT64)t2);
+ set_ri64(opcode, (int64_t)t1 * (int64_t)t2);
break;
case 0x1: // ediv
m_icount -= 37;
{
- UINT64 src1, src2;
+ uint64_t src1, src2;
src1 = get_1_ri(opcode);
src2 = get_2_ri64(opcode);
@@ -1352,27 +1352,27 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 0x4: // cvtir
m_icount -= 30;
t1 = get_1_ri(opcode);
- set_rif(opcode, (double)(INT32)t1);
+ set_rif(opcode, (double)(int32_t)t1);
break;
case 0x5: // cvtilr
m_icount -= 30;
t1 = get_1_ri(opcode);
- set_rifl(opcode, (double)(INT32)t1);
+ set_rifl(opcode, (double)(int32_t)t1);
break;
case 0x6: // scalerl
m_icount -= 30;
t1 = get_1_ri(opcode);
t2f = get_2_rifl(opcode);
- set_rifl(opcode, t2f * pow(2.0, (double)(INT32)t1));
+ set_rifl(opcode, t2f * pow(2.0, (double)(int32_t)t1));
break;
case 0x7: // scaler
m_icount -= 30;
t1 = get_1_ri(opcode);
t2f = get_2_rif(opcode);
- set_rif(opcode, t2f * pow(2.0, (double)(INT32)t1));
+ set_rif(opcode, t2f * pow(2.0, (double)(int32_t)t1));
break;
default:
@@ -1424,7 +1424,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 0xb: // roundr
{
- INT32 st1 = get_1_rif(opcode);
+ int32_t st1 = get_1_rif(opcode);
m_icount -= 69;
set_rif(opcode, (double)st1);
}
@@ -1495,7 +1495,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 0xb: // roundrl
{
- INT32 st1 = get_1_rifl(opcode);
+ int32_t st1 = get_1_rifl(opcode);
m_icount -= 70;
set_rifl(opcode, (double)st1);
}
@@ -1539,19 +1539,19 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 2: t2f = ceil(t1f); break;
case 3: t2f = t1f; break;
}
- set_ri(opcode, (INT32)t2f);
+ set_ri(opcode, (int32_t)t2f);
break;
case 0x2: // cvtzri
m_icount -= 43;
t1f = get_1_rif(opcode);
- set_ri(opcode, (INT32)t1f);
+ set_ri(opcode, (int32_t)t1f);
break;
case 0x3: // cvtzril
m_icount -= 44;
t1f = get_1_rif(opcode);
- set_ri64(opcode, (INT64)t1f);
+ set_ri64(opcode, (int64_t)t1f);
break;
case 0x9: // movr
@@ -1582,22 +1582,22 @@ void i960_cpu_device::execute_op(UINT32 opcode)
switch((opcode >> 7) & 0xf) {
case 0x1: // movre
{
- UINT32 *src=nullptr, *dst=nullptr;
+ uint32_t *src=nullptr, *dst=nullptr;
m_icount -= 8;
if(!(opcode & 0x00000800)) {
- src = (UINT32 *)&m_r[opcode & 0x1e];
+ src = (uint32_t *)&m_r[opcode & 0x1e];
} else {
int idx = opcode & 0x1f;
if(idx < 4)
- src = (UINT32 *)&m_fp[idx];
+ src = (uint32_t *)&m_fp[idx];
}
if(!(opcode & 0x00002000)) {
- dst = (UINT32 *)&m_r[(opcode>>19) & 0x1e];
+ dst = (uint32_t *)&m_r[(opcode>>19) & 0x1e];
} else if(!(opcode & 0x00e00000))
- dst = (UINT32 *)&m_fp[(opcode>>19) & 3];
+ dst = (uint32_t *)&m_fp[(opcode>>19) & 3];
dst[0] = src[0];
dst[1] = src[1];
@@ -1656,21 +1656,21 @@ void i960_cpu_device::execute_op(UINT32 opcode)
m_icount -= 18;
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
- set_ri(opcode, ((INT32)t2)*((INT32)t1));
+ set_ri(opcode, ((int32_t)t2)*((int32_t)t1));
break;
case 0x8: // remi
m_icount -= 37;
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
- set_ri(opcode, ((INT32)t2)%((INT32)t1));
+ set_ri(opcode, ((int32_t)t2)%((int32_t)t1));
break;
case 0x9:{// modi
- INT32 src1, src2, dst;
+ int32_t src1, src2, dst;
m_icount -= 37;
- src1 = (INT32)get_1_ri(opcode);
- src2 = (INT32)get_2_ri(opcode);
+ src1 = (int32_t)get_1_ri(opcode);
+ src2 = (int32_t)get_2_ri(opcode);
dst = src2 - ((src2/src1)*src1);
if(((src2*src1) < 0) && (dst != 0))
dst += src1;
@@ -1682,7 +1682,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
m_icount -= 37;
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
- set_ri(opcode, ((INT32)t2)/((INT32)t1));
+ set_ri(opcode, ((int32_t)t2)/((int32_t)t1));
break;
default:
@@ -1898,7 +1898,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 0xc0: // ldib
m_icount -= 4;
- m_r[(opcode>>19)&0x1f] = (INT8)m_program->read_byte(get_ea(opcode));
+ m_r[(opcode>>19)&0x1f] = (int8_t)m_program->read_byte(get_ea(opcode));
break;
case 0xc2: // stib
@@ -1908,7 +1908,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 0xc8: // ldis
m_icount -= 4;
- m_r[(opcode>>19)&0x1f] = (INT16)i960_read_word_unaligned(get_ea(opcode));
+ m_r[(opcode>>19)&0x1f] = (int16_t)i960_read_word_unaligned(get_ea(opcode));
break;
case 0xca: // stis
@@ -1924,7 +1924,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
void i960_cpu_device::execute_run()
{
- UINT32 opcode;
+ uint32_t opcode;
check_irqs();
while(m_icount > 0) {
@@ -1946,7 +1946,7 @@ void i960_cpu_device::execute_set_input(int irqline, int state)
int cpu_pri = (m_PC>>16)&0x1f;
int vector =0;
int priority;
- UINT32 pend, word, wordofs;
+ uint32_t pend, word, wordofs;
// We support the 4 external IRQ lines in "normal" mode only.
// The i960's interrupt support is a bit more complete than that,
@@ -2117,7 +2117,7 @@ void i960_cpu_device::device_reset()
}
-offs_t i960_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i960_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i960 );
return CPU_DISASSEMBLE_NAME(i960)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/i960/i960.h b/src/devices/cpu/i960/i960.h
index 3f26fbb46d1..a7ebe01bfd0 100644
--- a/src/devices/cpu/i960/i960.h
+++ b/src/devices/cpu/i960/i960.h
@@ -70,7 +70,7 @@ class i960_cpu_device : public cpu_device
{
public:
// construction/destruction
- i960_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i960_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// call from any read/write handler for a memory area that can't be bursted
// on the real hardware (e.g. Model 2's interrupt control registers)
@@ -84,10 +84,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; } /* ???? TODO: Exact timing unknown */
- virtual UINT32 execute_max_cycles() const override { return 1; } /* ???? TODO: Exact timing unknown */
- virtual UINT32 execute_input_lines() const override { return 4; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xffffffff; }
+ virtual uint32_t execute_min_cycles() const override { return 1; } /* ???? TODO: Exact timing unknown */
+ virtual uint32_t execute_max_cycles() const override { return 1; } /* ???? TODO: Exact timing unknown */
+ virtual uint32_t execute_input_lines() const override { return 4; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xffffffff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -98,29 +98,29 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
- UINT32 m_r[0x20];
- UINT32 m_rcache[I960_RCACHE_SIZE][0x10];
- UINT32 m_rcache_frame_addr[I960_RCACHE_SIZE];
+ uint32_t m_r[0x20];
+ uint32_t m_rcache[I960_RCACHE_SIZE][0x10];
+ uint32_t m_rcache_frame_addr[I960_RCACHE_SIZE];
// rcache_pos = how deep in the stack we are. 0-(I960_RCACHE_SIZE-1) means in-cache.
// I960_RCACHE_SIZE or greater means out of cache, must save to memory.
- INT32 m_rcache_pos;
+ int32_t m_rcache_pos;
double m_fp[4];
- UINT32 m_SAT;
- UINT32 m_PRCB;
- UINT32 m_PC;
- UINT32 m_AC;
- UINT32 m_IP;
- UINT32 m_PIP;
- UINT32 m_ICR;
+ uint32_t m_SAT;
+ uint32_t m_PRCB;
+ uint32_t m_PC;
+ uint32_t m_AC;
+ uint32_t m_IP;
+ uint32_t m_PIP;
+ uint32_t m_ICR;
int m_bursting;
int m_immediate_irq;
@@ -132,40 +132,40 @@ private:
int m_icount;
- UINT32 i960_read_dword_unaligned(UINT32 address);
- UINT16 i960_read_word_unaligned(UINT32 address);
- void i960_write_dword_unaligned(UINT32 address, UINT32 data);
- void i960_write_word_unaligned(UINT32 address, UINT16 data);
- void send_iac(UINT32 adr);
- UINT32 get_ea(UINT32 opcode);
- UINT32 get_1_ri(UINT32 opcode);
- UINT32 get_2_ri(UINT32 opcode);
- UINT64 get_2_ri64(UINT32 opcode);
- void set_ri(UINT32 opcode, UINT32 val);
- void set_ri2(UINT32 opcode, UINT32 val, UINT32 val2);
- void set_ri64(UINT32 opcode, UINT64 val);
- double get_1_rif(UINT32 opcode);
- double get_2_rif(UINT32 opcode);
- void set_rif(UINT32 opcode, double val);
- double get_1_rifl(UINT32 opcode);
- double get_2_rifl(UINT32 opcode);
- void set_rifl(UINT32 opcode, double val);
- UINT32 get_1_ci(UINT32 opcode);
- UINT32 get_2_ci(UINT32 opcode);
- UINT32 get_disp(UINT32 opcode);
- UINT32 get_disp_s(UINT32 opcode);
- void cmp_s(INT32 v1, INT32 v2);
- void cmp_u(UINT32 v1, UINT32 v2);
- void concmp_s(INT32 v1, INT32 v2);
- void concmp_u(UINT32 v1, UINT32 v2);
+ uint32_t i960_read_dword_unaligned(uint32_t address);
+ uint16_t i960_read_word_unaligned(uint32_t address);
+ void i960_write_dword_unaligned(uint32_t address, uint32_t data);
+ void i960_write_word_unaligned(uint32_t address, uint16_t data);
+ void send_iac(uint32_t adr);
+ uint32_t get_ea(uint32_t opcode);
+ uint32_t get_1_ri(uint32_t opcode);
+ uint32_t get_2_ri(uint32_t opcode);
+ uint64_t get_2_ri64(uint32_t opcode);
+ void set_ri(uint32_t opcode, uint32_t val);
+ void set_ri2(uint32_t opcode, uint32_t val, uint32_t val2);
+ void set_ri64(uint32_t opcode, uint64_t val);
+ double get_1_rif(uint32_t opcode);
+ double get_2_rif(uint32_t opcode);
+ void set_rif(uint32_t opcode, double val);
+ double get_1_rifl(uint32_t opcode);
+ double get_2_rifl(uint32_t opcode);
+ void set_rifl(uint32_t opcode, double val);
+ uint32_t get_1_ci(uint32_t opcode);
+ uint32_t get_2_ci(uint32_t opcode);
+ uint32_t get_disp(uint32_t opcode);
+ uint32_t get_disp_s(uint32_t opcode);
+ void cmp_s(int32_t v1, int32_t v2);
+ void cmp_u(uint32_t v1, uint32_t v2);
+ void concmp_s(int32_t v1, int32_t v2);
+ void concmp_u(uint32_t v1, uint32_t v2);
void cmp_d(double v1, double v2);
- void bxx(UINT32 opcode, int mask);
- void bxx_s(UINT32 opcode, int mask);
- void test(UINT32 opcode, int mask);
- void execute_op(UINT32 opcode);
+ void bxx(uint32_t opcode, int mask);
+ void bxx_s(uint32_t opcode, int mask);
+ void test(uint32_t opcode, int mask);
+ void execute_op(uint32_t opcode);
void take_interrupt(int vector, int lvl);
void check_irqs();
- void do_call(UINT32 adr, int type, UINT32 stack);
+ void do_call(uint32_t adr, int type, uint32_t stack);
void do_ret_0();
void do_ret();
};
diff --git a/src/devices/cpu/i960/i960dis.h b/src/devices/cpu/i960/i960dis.h
index 6ad878ee119..3012b50ed06 100644
--- a/src/devices/cpu/i960/i960dis.h
+++ b/src/devices/cpu/i960/i960dis.h
@@ -8,8 +8,8 @@ struct disassemble_t
char *buffer; // output buffer
unsigned long IP;
unsigned long IPinc;
- const UINT8 *oprom;
- UINT32 disflags;
+ const uint8_t *oprom;
+ uint32_t disflags;
};
#endif /* __I960DIS_H__ */
diff --git a/src/devices/cpu/ie15/ie15.cpp b/src/devices/cpu/ie15/ie15.cpp
index 7d4d3a9a32a..37b2e648eba 100644
--- a/src/devices/cpu/ie15/ie15.cpp
+++ b/src/devices/cpu/ie15/ie15.cpp
@@ -28,7 +28,7 @@ const device_type IE15 = &device_creator<ie15_device>;
//-------------------------------------------------
// ie15_device - constructor
//-------------------------------------------------
-ie15_device::ie15_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ie15_device::ie15_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, IE15, "ie15", tag, owner, clock, "ie15_cpu", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 8, 14),
m_io_config("io", ENDIANNESS_LITTLE, 8, 8), m_A(0), m_CF(0), m_ZF(0), m_RF(0), m_flags(0),
@@ -151,7 +151,7 @@ void ie15_device::state_string_export(const device_state_entry &entry, std::stri
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 ie15_device::disasm_min_opcode_bytes() const
+uint32_t ie15_device::disasm_min_opcode_bytes() const
{
return 1;
}
@@ -161,7 +161,7 @@ UINT32 ie15_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 ie15_device::disasm_max_opcode_bytes() const
+uint32_t ie15_device::disasm_max_opcode_bytes() const
{
return 2;
}
@@ -171,7 +171,7 @@ UINT32 ie15_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t ie15_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ie15_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( ie15 );
return CPU_DISASSEMBLE_NAME(ie15)(nullptr, buffer, pc, oprom, opram, 0);
@@ -186,7 +186,7 @@ offs_t ie15_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 ie15_device::execute_min_cycles() const
+uint32_t ie15_device::execute_min_cycles() const
{
return 1;
}
@@ -196,7 +196,7 @@ UINT32 ie15_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 ie15_device::execute_max_cycles() const
+uint32_t ie15_device::execute_max_cycles() const
{
return 1;
}
@@ -214,7 +214,7 @@ void ie15_device::execute_run()
} while (m_icount > 0);
}
-inline void ie15_device::illegal(UINT8 opcode)
+inline void ie15_device::illegal(uint8_t opcode)
{
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
@@ -227,7 +227,7 @@ inline void ie15_device::illegal(UINT8 opcode)
// XXX what if ldc was at 0x_ff?
inline void ie15_device::execute_one(int opcode)
{
- UINT16 tmp;
+ uint16_t tmp;
m_icount -= 1;
@@ -412,45 +412,45 @@ inline void ie15_device::execute_one(int opcode)
INLINE FUNCTIONS
***************************************************************************/
-inline UINT8 ie15_device::rop()
+inline uint8_t ie15_device::rop()
{
- UINT8 retVal = m_direct->read_byte(m_PC.w.l);
+ uint8_t retVal = m_direct->read_byte(m_PC.w.l);
m_PC.w.l = (m_PC.w.l + 1) & 0x0fff;
return retVal;
}
-inline UINT8 ie15_device::arg()
+inline uint8_t ie15_device::arg()
{
- UINT8 retVal = m_direct->read_byte(m_PC.w.l);
+ uint8_t retVal = m_direct->read_byte(m_PC.w.l);
return retVal;
}
-inline UINT8 ie15_device::get_reg_lo(UINT8 reg)
+inline uint8_t ie15_device::get_reg_lo(uint8_t reg)
{
- UINT16 tmp = m_RF ? m_REGS[16 + reg] : m_REGS[reg];
+ uint16_t tmp = m_RF ? m_REGS[16 + reg] : m_REGS[reg];
return tmp & 255;
}
-inline UINT16 ie15_device::get_reg(UINT8 reg)
+inline uint16_t ie15_device::get_reg(uint8_t reg)
{
return m_RF ? m_REGS[16 + reg] : m_REGS[reg];
}
-inline void ie15_device::set_reg(UINT8 reg, UINT16 val)
+inline void ie15_device::set_reg(uint8_t reg, uint16_t val)
{
(m_RF ? m_REGS[16 + reg] : m_REGS[reg]) = val;
}
-inline void ie15_device::update_flags(UINT8 val)
+inline void ie15_device::update_flags(uint8_t val)
{
m_ZF = (val == 0xff) ? 1 : 0;
}
-inline UINT8 ie15_device::do_condition(UINT8 val)
+inline uint8_t ie15_device::do_condition(uint8_t val)
{
- UINT8 v = (val >> 5) & 1;
- UINT8 cond = 0;
+ uint8_t v = (val >> 5) & 1;
+ uint8_t cond = 0;
switch((val>> 3) & 0x03) {
case 0 :
if (m_CF==v) cond = 1;
@@ -462,8 +462,8 @@ inline UINT8 ie15_device::do_condition(UINT8 val)
return cond;
}
-inline UINT16 ie15_device::get_addr(UINT8 val)
+inline uint16_t ie15_device::get_addr(uint8_t val)
{
- UINT8 lo = arg();
+ uint8_t lo = arg();
return ((val & 0x0f) << 8) + lo + 1;
}
diff --git a/src/devices/cpu/ie15/ie15.h b/src/devices/cpu/ie15/ie15.h
index 5f5d4786ba9..823dd8f27b6 100644
--- a/src/devices/cpu/ie15/ie15.h
+++ b/src/devices/cpu/ie15/ie15.h
@@ -27,7 +27,7 @@ class ie15_device : public cpu_device
{
public:
// construction/destruction
- ie15_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ie15_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -35,8 +35,8 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
virtual void execute_run() override;
// device_memory_interface overrides
@@ -48,21 +48,21 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void execute_one(int opcode);
- UINT8 rop();
- UINT8 get_reg_lo(UINT8 reg);
- UINT16 get_reg(UINT8 reg);
- void set_reg(UINT8 reg, UINT16 val);
- UINT8 arg();
- void update_flags(UINT8 val);
- UINT8 do_condition(UINT8 val);
- UINT16 get_addr(UINT8 val);
- void illegal(UINT8 opcode);
+ uint8_t rop();
+ uint8_t get_reg_lo(uint8_t reg);
+ uint16_t get_reg(uint8_t reg);
+ void set_reg(uint8_t reg, uint16_t val);
+ uint8_t arg();
+ void update_flags(uint8_t val);
+ uint8_t do_condition(uint8_t val);
+ uint16_t get_addr(uint8_t val);
+ void illegal(uint8_t opcode);
int m_icount;
@@ -70,13 +70,13 @@ protected:
const address_space_config m_program_config;
const address_space_config m_io_config;
- UINT8 m_A;
+ uint8_t m_A;
PAIR m_PC;
- UINT16 m_REGS[32]; // General registers (2 pages of 16)
- UINT8 m_CF; // Carry flag
- UINT8 m_ZF; // Zero flag
- UINT8 m_RF; // Current register page
- UINT8 m_flags; // temporary I/O only
+ uint16_t m_REGS[32]; // General registers (2 pages of 16)
+ uint8_t m_CF; // Carry flag
+ uint8_t m_ZF; // Zero flag
+ uint8_t m_RF; // Current register page
+ uint8_t m_flags; // temporary I/O only
address_space *m_program;
address_space *m_io;
diff --git a/src/devices/cpu/ie15/ie15dasm.cpp b/src/devices/cpu/ie15/ie15dasm.cpp
index 3f21fb977e0..536497b9db0 100644
--- a/src/devices/cpu/ie15/ie15dasm.cpp
+++ b/src/devices/cpu/ie15/ie15dasm.cpp
@@ -7,8 +7,8 @@
CPU_DISASSEMBLE( ie15 )
{
- UINT32 flags = 0;
- UINT8 op;
+ uint32_t flags = 0;
+ uint8_t op;
unsigned PC = pc;
op = OP(pc++);
diff --git a/src/devices/cpu/jaguar/jagdasm.cpp b/src/devices/cpu/jaguar/jagdasm.cpp
index a12145c23c8..2b65353c0f3 100644
--- a/src/devices/cpu/jaguar/jagdasm.cpp
+++ b/src/devices/cpu/jaguar/jagdasm.cpp
@@ -23,7 +23,7 @@
STATIC VARIABLES
***************************************************************************/
-static const UINT8 convert_zero[32] =
+static const uint8_t convert_zero[32] =
{ 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
static const char *const condition[32] =
@@ -69,7 +69,7 @@ static const char *const condition[32] =
CODE CODE
***************************************************************************/
-static inline char *signed_16bit(INT16 val)
+static inline char *signed_16bit(int16_t val)
{
static char temp[10];
if (val < 0)
@@ -79,9 +79,9 @@ static inline char *signed_16bit(INT16 val)
return temp;
}
-static unsigned dasmjag(int variant, char *buffer, unsigned pc, const UINT8 *oprom)
+static unsigned dasmjag(int variant, char *buffer, unsigned pc, const uint8_t *oprom)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
int op = ROPCODE(0);
int reg1 = (op >> 5) & 31;
int reg2 = op & 31;
@@ -121,7 +121,7 @@ static unsigned dasmjag(int variant, char *buffer, unsigned pc, const UINT8 *opr
case 28: sprintf(buffer, "ror r%d,r%d", reg1, reg2); break;
case 29: sprintf(buffer, "rorq $%x,r%d", convert_zero[reg1], reg2); break;
case 30: sprintf(buffer, "cmp r%d,r%d", reg1, reg2); break;
- case 31: sprintf(buffer, "cmpq %s,r%d", signed_16bit((INT16)(reg1 << 11) >> 11), reg2);break;
+ case 31: sprintf(buffer, "cmpq %s,r%d", signed_16bit((int16_t)(reg1 << 11) >> 11), reg2);break;
case 32: if (variant == JAGUAR_VARIANT_GPU)
sprintf(buffer, "sat8 r%d", reg2);
else
@@ -159,7 +159,7 @@ static unsigned dasmjag(int variant, char *buffer, unsigned pc, const UINT8 *opr
case 50: sprintf(buffer, "store r%d,(r15+$%x)", reg2, convert_zero[reg1]*4);break;
case 51: sprintf(buffer, "move pc,r%d", reg2); break;
case 52: sprintf(buffer, "jump %s(r%d)", condition[reg2], reg1); break;
- case 53: sprintf(buffer, "jr %s%08X", condition[reg2], pc + ((INT8)(reg1 << 3) >> 2)); break;
+ case 53: sprintf(buffer, "jr %s%08X", condition[reg2], pc + ((int8_t)(reg1 << 3) >> 2)); break;
case 54: sprintf(buffer, "mmult r%d,r%d", reg1, reg2); break;
case 55: sprintf(buffer, "mtoi r%d,r%d", reg1, reg2); break;
case 56: sprintf(buffer, "normi r%d,r%d", reg1, reg2); break;
diff --git a/src/devices/cpu/jaguar/jaguar.cpp b/src/devices/cpu/jaguar/jaguar.cpp
index d6d7524dcc7..2906245858d 100644
--- a/src/devices/cpu/jaguar/jaguar.cpp
+++ b/src/devices/cpu/jaguar/jaguar.cpp
@@ -46,9 +46,9 @@
#define CLR_ZN() (FLAGS &= ~(ZFLAG | NFLAG))
#define CLR_ZNC() (FLAGS &= ~(CFLAG | ZFLAG | NFLAG))
#define SET_Z(r) (FLAGS |= ((r) == 0))
-#define SET_C_ADD(a,b) (FLAGS |= ((UINT32)(b) > (UINT32)(~(a))) << 1)
-#define SET_C_SUB(a,b) (FLAGS |= ((UINT32)(b) > (UINT32)(a)) << 1)
-#define SET_N(r) (FLAGS |= (((UINT32)(r) >> 29) & 4))
+#define SET_C_ADD(a,b) (FLAGS |= ((uint32_t)(b) > (uint32_t)(~(a))) << 1)
+#define SET_C_SUB(a,b) (FLAGS |= ((uint32_t)(b) > (uint32_t)(a)) << 1)
+#define SET_N(r) (FLAGS |= (((uint32_t)(r) >> 29) & 4))
#define SET_ZN(r) SET_N(r); SET_Z(r)
#define SET_ZNC_ADD(a,b,r) SET_N(r); SET_Z(r); SET_C_ADD(a,b)
#define SET_ZNC_SUB(a,b,r) SET_N(r); SET_Z(r); SET_C_SUB(a,b)
@@ -78,7 +78,7 @@
PRIVATE GLOBAL VARIABLES
***************************************************************************/
-const UINT32 jaguar_cpu_device::convert_zero[32] =
+const uint32_t jaguar_cpu_device::convert_zero[32] =
{ 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
@@ -140,7 +140,7 @@ const device_type JAGUARGPU = &device_creator<jaguargpu_cpu_device>;
const device_type JAGUARDSP = &device_creator<jaguardsp_cpu_device>;
-jaguar_cpu_device::jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool isdsp)
+jaguar_cpu_device::jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, bool isdsp)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 32, 24, 0)
, m_isdsp(isdsp)
@@ -162,13 +162,13 @@ jaguar_cpu_device::jaguar_cpu_device(const machine_config &mconfig, device_type
}
-jaguargpu_cpu_device::jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+jaguargpu_cpu_device::jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: jaguar_cpu_device(mconfig, JAGUARGPU, "Jaguar GPU", tag, owner, clock, "jaguargpu", __FILE__, false)
{
}
-jaguardsp_cpu_device::jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+jaguardsp_cpu_device::jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: jaguar_cpu_device(mconfig, JAGUARDSP, "Jaguar DSP", tag, owner, clock, "jaguardsp", __FILE__, true)
{
}
@@ -176,7 +176,7 @@ jaguardsp_cpu_device::jaguardsp_cpu_device(const machine_config &mconfig, const
void jaguar_cpu_device::update_register_banks()
{
- UINT32 temp;
+ uint32_t temp;
int i, bank;
/* pick the bank */
@@ -288,7 +288,7 @@ void jaguar_cpu_device::init_tables()
}
/* fill in the mirror table */
- mirror_table = std::make_unique<UINT16[]>(65536);
+ mirror_table = std::make_unique<uint16_t[]>(65536);
for (i = 0; i < 65536; i++)
mirror_table[i] = ((i >> 15) & 0x0001) | ((i >> 13) & 0x0002) |
((i >> 11) & 0x0004) | ((i >> 9) & 0x0008) |
@@ -300,7 +300,7 @@ void jaguar_cpu_device::init_tables()
((i << 13) & 0x4000) | ((i << 15) & 0x8000);
/* fill in the condition table */
- condition_table = std::make_unique<UINT8[]>(32 * 8);
+ condition_table = std::make_unique<uint8_t[]>(32 * 8);
for (i = 0; i < 8; i++)
for (j = 0; j < 32; j++)
{
@@ -466,7 +466,7 @@ void jaguargpu_cpu_device::execute_run()
/* core execution loop */
do
{
- UINT32 op;
+ uint32_t op;
/* debugging */
//if (PC < 0xf03000 || PC > 0xf04000) { fatalerror("GPU: PC = %06X (ppc = %06X)\n", PC, m_ppc); }
@@ -503,7 +503,7 @@ void jaguardsp_cpu_device::execute_run()
/* core execution loop */
do
{
- UINT32 op;
+ uint32_t op;
/* debugging */
//if (PC < 0xf1b000 || PC > 0xf1d000) { fatalerror(stderr, "DSP: PC = %06X\n", PC); }
@@ -527,10 +527,10 @@ void jaguardsp_cpu_device::execute_run()
OPCODES
***************************************************************************/
-void jaguar_cpu_device::abs_rn(UINT16 op)
+void jaguar_cpu_device::abs_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 res = m_r[dreg];
+ uint32_t res = m_r[dreg];
CLR_ZNC();
if (res & 0x80000000)
{
@@ -540,121 +540,121 @@ void jaguar_cpu_device::abs_rn(UINT16 op)
SET_Z(res);
}
-void jaguar_cpu_device::add_rn_rn(UINT16 op)
+void jaguar_cpu_device::add_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 + r1;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 + r1;
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_ADD(r2, r1, res);
}
-void jaguar_cpu_device::addc_rn_rn(UINT16 op)
+void jaguar_cpu_device::addc_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 c = ((FLAGS >> 1) & 1);
- UINT32 res = r2 + r1 + c;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t c = ((FLAGS >> 1) & 1);
+ uint32_t res = r2 + r1 + c;
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_ADD(r2, r1 + c, res);
}
-void jaguar_cpu_device::addq_n_rn(UINT16 op)
+void jaguar_cpu_device::addq_n_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 + r1;
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 + r1;
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_ADD(r2, r1, res);
}
-void jaguar_cpu_device::addqmod_n_rn(UINT16 op) /* DSP only */
+void jaguar_cpu_device::addqmod_n_rn(uint16_t op) /* DSP only */
{
int dreg = op & 31;
- UINT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 + r1;
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 + r1;
res = (res & ~m_ctrl[D_MOD]) | (r2 & ~m_ctrl[D_MOD]);
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_ADD(r2, r1, res);
}
-void jaguar_cpu_device::addqt_n_rn(UINT16 op)
+void jaguar_cpu_device::addqt_n_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 + r1;
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 + r1;
m_r[dreg] = res;
}
-void jaguar_cpu_device::and_rn_rn(UINT16 op)
+void jaguar_cpu_device::and_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 & r1;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 & r1;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::bclr_n_rn(UINT16 op)
+void jaguar_cpu_device::bclr_n_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = (op >> 5) & 31;
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 & ~(1 << r1);
+ uint32_t r1 = (op >> 5) & 31;
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 & ~(1 << r1);
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::bset_n_rn(UINT16 op)
+void jaguar_cpu_device::bset_n_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = (op >> 5) & 31;
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 | (1 << r1);
+ uint32_t r1 = (op >> 5) & 31;
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 | (1 << r1);
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::btst_n_rn(UINT16 op)
+void jaguar_cpu_device::btst_n_rn(uint16_t op)
{
- UINT32 r1 = (op >> 5) & 31;
- UINT32 r2 = m_r[op & 31];
+ uint32_t r1 = (op >> 5) & 31;
+ uint32_t r2 = m_r[op & 31];
CLR_Z(); FLAGS |= (~r2 >> r1) & 1;
}
-void jaguar_cpu_device::cmp_rn_rn(UINT16 op)
+void jaguar_cpu_device::cmp_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[op & 31];
- UINT32 res = r2 - r1;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[op & 31];
+ uint32_t res = r2 - r1;
CLR_ZNC(); SET_ZNC_SUB(r2, r1, res);
}
-void jaguar_cpu_device::cmpq_n_rn(UINT16 op)
+void jaguar_cpu_device::cmpq_n_rn(uint16_t op)
{
- UINT32 r1 = (INT8)(op >> 2) >> 3;
- UINT32 r2 = m_r[op & 31];
- UINT32 res = r2 - r1;
+ uint32_t r1 = (int8_t)(op >> 2) >> 3;
+ uint32_t r2 = m_r[op & 31];
+ uint32_t res = r2 - r1;
CLR_ZNC(); SET_ZNC_SUB(r2, r1, res);
}
-void jaguar_cpu_device::div_rn_rn(UINT16 op)
+void jaguar_cpu_device::div_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
if (r1)
{
if (m_ctrl[D_DIVCTRL] & 1)
{
- m_r[dreg] = ((UINT64)r2 << 16) / r1;
- m_ctrl[D_REMAINDER] = ((UINT64)r2 << 16) % r1;
+ m_r[dreg] = ((uint64_t)r2 << 16) / r1;
+ m_ctrl[D_REMAINDER] = ((uint64_t)r2 << 16) % r1;
}
else
{
@@ -666,35 +666,35 @@ void jaguar_cpu_device::div_rn_rn(UINT16 op)
m_r[dreg] = 0xffffffff;
}
-void jaguar_cpu_device::illegal(UINT16 op)
+void jaguar_cpu_device::illegal(uint16_t op)
{
}
-void jaguar_cpu_device::imacn_rn_rn(UINT16 op)
+void jaguar_cpu_device::imacn_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[op & 31];
- m_accum += (INT64)((INT16)r1 * (INT16)r2);
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[op & 31];
+ m_accum += (int64_t)((int16_t)r1 * (int16_t)r2);
logerror("Unexpected IMACN instruction!\n");
}
-void jaguar_cpu_device::imult_rn_rn(UINT16 op)
+void jaguar_cpu_device::imult_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = (INT16)r1 * (INT16)r2;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = (int16_t)r1 * (int16_t)r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::imultn_rn_rn(UINT16 op)
+void jaguar_cpu_device::imultn_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = (INT16)r1 * (INT16)r2;
- m_accum = (INT32)res;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = (int16_t)r1 * (int16_t)r2;
+ m_accum = (int32_t)res;
CLR_ZN(); SET_ZN(res);
op = ROPCODE(PC);
@@ -702,23 +702,23 @@ void jaguar_cpu_device::imultn_rn_rn(UINT16 op)
{
r1 = m_r[(op >> 5) & 31];
r2 = m_r[op & 31];
- m_accum += (INT64)((INT16)r1 * (INT16)r2);
+ m_accum += (int64_t)((int16_t)r1 * (int16_t)r2);
PC += 2;
op = ROPCODE(PC);
}
if ((op >> 10) == 19)
{
PC += 2;
- m_r[op & 31] = (UINT32)m_accum;
+ m_r[op & 31] = (uint32_t)m_accum;
}
}
-void jaguar_cpu_device::jr_cc_n(UINT16 op)
+void jaguar_cpu_device::jr_cc_n(uint16_t op)
{
if (CONDITION(op & 31))
{
- INT32 r1 = (INT8)((op >> 2) & 0xf8) >> 2;
- UINT32 newpc = PC + r1;
+ int32_t r1 = (int8_t)((op >> 2) & 0xf8) >> 2;
+ uint32_t newpc = PC + r1;
debugger_instruction_hook(this, PC);
op = ROPCODE(PC);
PC = newpc;
@@ -728,14 +728,14 @@ void jaguar_cpu_device::jr_cc_n(UINT16 op)
}
}
-void jaguar_cpu_device::jump_cc_rn(UINT16 op)
+void jaguar_cpu_device::jump_cc_rn(uint16_t op)
{
if (CONDITION(op & 31))
{
- UINT8 reg = (op >> 5) & 31;
+ uint8_t reg = (op >> 5) & 31;
/* special kludge for risky code in the cojag DSP interrupt handlers */
- UINT32 newpc = (m_icount == m_bankswitch_icount) ? m_a[reg] : m_r[reg];
+ uint32_t newpc = (m_icount == m_bankswitch_icount) ? m_a[reg] : m_r[reg];
debugger_instruction_hook(this, PC);
op = ROPCODE(PC);
PC = newpc;
@@ -745,39 +745,39 @@ void jaguar_cpu_device::jump_cc_rn(UINT16 op)
}
}
-void jaguar_cpu_device::load_rn_rn(UINT16 op)
+void jaguar_cpu_device::load_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
m_r[op & 31] = READLONG(r1);
}
-void jaguar_cpu_device::load_r14n_rn(UINT16 op)
+void jaguar_cpu_device::load_r14n_rn(uint16_t op)
{
- UINT32 r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
m_r[op & 31] = READLONG(m_r[14] + 4 * r1);
}
-void jaguar_cpu_device::load_r15n_rn(UINT16 op)
+void jaguar_cpu_device::load_r15n_rn(uint16_t op)
{
- UINT32 r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
m_r[op & 31] = READLONG(m_r[15] + 4 * r1);
}
-void jaguar_cpu_device::load_r14rn_rn(UINT16 op)
+void jaguar_cpu_device::load_r14rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
m_r[op & 31] = READLONG(m_r[14] + r1);
}
-void jaguar_cpu_device::load_r15rn_rn(UINT16 op)
+void jaguar_cpu_device::load_r15rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
m_r[op & 31] = READLONG(m_r[15] + r1);
}
-void jaguar_cpu_device::loadb_rn_rn(UINT16 op)
+void jaguar_cpu_device::loadb_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
if (r1 >= m_internal_ram_start && r1 <= m_internal_ram_end)
{
m_r[op & 31] = READLONG(r1 & ~3);
@@ -788,9 +788,9 @@ void jaguar_cpu_device::loadb_rn_rn(UINT16 op)
}
}
-void jaguar_cpu_device::loadw_rn_rn(UINT16 op)
+void jaguar_cpu_device::loadw_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
if (r1 >= m_internal_ram_start && r1 <= m_internal_ram_end)
{
m_r[op & 31] = READLONG(r1 & ~3);
@@ -801,9 +801,9 @@ void jaguar_cpu_device::loadw_rn_rn(UINT16 op)
}
}
-void jaguar_cpu_device::loadp_rn_rn(UINT16 op) /* GPU only */
+void jaguar_cpu_device::loadp_rn_rn(uint16_t op) /* GPU only */
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
if (r1 >= m_internal_ram_start && r1 <= m_internal_ram_end)
{
m_r[op & 31] = READLONG(r1 & ~3);
@@ -815,29 +815,29 @@ void jaguar_cpu_device::loadp_rn_rn(UINT16 op) /* GPU only */
}
}
-void jaguar_cpu_device::mirror_rn(UINT16 op) /* DSP only */
+void jaguar_cpu_device::mirror_rn(uint16_t op) /* DSP only */
{
int dreg = op & 31;
- UINT32 r1 = m_r[dreg];
- UINT32 res = (mirror_table[r1 & 0xffff] << 16) | mirror_table[r1 >> 16];
+ uint32_t r1 = m_r[dreg];
+ uint32_t res = (mirror_table[r1 & 0xffff] << 16) | mirror_table[r1 >> 16];
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::mmult_rn_rn(UINT16 op)
+void jaguar_cpu_device::mmult_rn_rn(uint16_t op)
{
int count = m_ctrl[G_MTXC] & 15, i;
int sreg = (op >> 5) & 31;
int dreg = op & 31;
- UINT32 addr = m_ctrl[G_MTXA];
- INT64 accum = 0;
- UINT32 res;
+ uint32_t addr = m_ctrl[G_MTXA];
+ int64_t accum = 0;
+ uint32_t res;
if (!(m_ctrl[G_MTXC] & 0x10))
{
for (i = 0; i < count; i++)
{
- accum += (INT16)(m_b1[sreg + i/2] >> (16 * ((i & 1) ^ 1))) * (INT16)READWORD(addr);
+ accum += (int16_t)(m_b1[sreg + i/2] >> (16 * ((i & 1) ^ 1))) * (int16_t)READWORD(addr);
addr += 2;
}
}
@@ -845,79 +845,79 @@ void jaguar_cpu_device::mmult_rn_rn(UINT16 op)
{
for (i = 0; i < count; i++)
{
- accum += (INT16)(m_b1[sreg + i/2] >> (16 * ((i & 1) ^ 1))) * (INT16)READWORD(addr);
+ accum += (int16_t)(m_b1[sreg + i/2] >> (16 * ((i & 1) ^ 1))) * (int16_t)READWORD(addr);
addr += 2 * count;
}
}
- m_r[dreg] = res = (UINT32)accum;
+ m_r[dreg] = res = (uint32_t)accum;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::move_rn_rn(UINT16 op)
+void jaguar_cpu_device::move_rn_rn(uint16_t op)
{
m_r[op & 31] = m_r[(op >> 5) & 31];
}
-void jaguar_cpu_device::move_pc_rn(UINT16 op)
+void jaguar_cpu_device::move_pc_rn(uint16_t op)
{
m_r[op & 31] = m_ppc;
}
-void jaguar_cpu_device::movefa_rn_rn(UINT16 op)
+void jaguar_cpu_device::movefa_rn_rn(uint16_t op)
{
m_r[op & 31] = m_a[(op >> 5) & 31];
}
-void jaguar_cpu_device::movei_n_rn(UINT16 op)
+void jaguar_cpu_device::movei_n_rn(uint16_t op)
{
- UINT32 res = ROPCODE(PC) | (ROPCODE(PC + 2) << 16);
+ uint32_t res = ROPCODE(PC) | (ROPCODE(PC + 2) << 16);
PC += 4;
m_r[op & 31] = res;
}
-void jaguar_cpu_device::moveq_n_rn(UINT16 op)
+void jaguar_cpu_device::moveq_n_rn(uint16_t op)
{
m_r[op & 31] = (op >> 5) & 31;
}
-void jaguar_cpu_device::moveta_rn_rn(UINT16 op)
+void jaguar_cpu_device::moveta_rn_rn(uint16_t op)
{
m_a[op & 31] = m_r[(op >> 5) & 31];
}
-void jaguar_cpu_device::mtoi_rn_rn(UINT16 op)
+void jaguar_cpu_device::mtoi_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
- m_r[op & 31] = (((INT32)r1 >> 8) & 0xff800000) | (r1 & 0x007fffff);
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ m_r[op & 31] = (((int32_t)r1 >> 8) & 0xff800000) | (r1 & 0x007fffff);
}
-void jaguar_cpu_device::mult_rn_rn(UINT16 op)
+void jaguar_cpu_device::mult_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = (UINT16)r1 * (UINT16)r2;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = (uint16_t)r1 * (uint16_t)r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::neg_rn(UINT16 op)
+void jaguar_cpu_device::neg_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r2 = m_r[dreg];
- UINT32 res = -r2;
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = -r2;
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_SUB(0, r2, res);
}
-void jaguar_cpu_device::nop(UINT16 op)
+void jaguar_cpu_device::nop(uint16_t op)
{
}
-void jaguar_cpu_device::normi_rn_rn(UINT16 op)
+void jaguar_cpu_device::normi_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 res = 0;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t res = 0;
if (r1 != 0)
{
while ((r1 & 0xffc00000) == 0)
@@ -935,30 +935,30 @@ void jaguar_cpu_device::normi_rn_rn(UINT16 op)
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::not_rn(UINT16 op)
+void jaguar_cpu_device::not_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 res = ~m_r[dreg];
+ uint32_t res = ~m_r[dreg];
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::or_rn_rn(UINT16 op)
+void jaguar_cpu_device::or_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r1 | r2;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r1 | r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::pack_rn(UINT16 op) /* GPU only */
+void jaguar_cpu_device::pack_rn(uint16_t op) /* GPU only */
{
int dreg = op & 31;
int pack = (op >> 5) & 31;
- UINT32 r2 = m_r[dreg];
- UINT32 res;
+ uint32_t r2 = m_r[dreg];
+ uint32_t res;
if (pack == 0) /* PACK */
res = ((r2 >> 10) & 0xf000) | ((r2 >> 5) & 0x0f00) | (r2 & 0xff);
else /* UNPACK */
@@ -966,83 +966,83 @@ void jaguar_cpu_device::pack_rn(UINT16 op) /* GPU only */
m_r[dreg] = res;
}
-void jaguar_cpu_device::resmac_rn(UINT16 op)
+void jaguar_cpu_device::resmac_rn(uint16_t op)
{
- m_r[op & 31] = (UINT32)m_accum;
+ m_r[op & 31] = (uint32_t)m_accum;
}
-void jaguar_cpu_device::ror_rn_rn(UINT16 op)
+void jaguar_cpu_device::ror_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31] & 31;
- UINT32 r2 = m_r[dreg];
- UINT32 res = (r2 >> r1) | (r2 << (32 - r1));
+ uint32_t r1 = m_r[(op >> 5) & 31] & 31;
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = (r2 >> r1) | (r2 << (32 - r1));
m_r[dreg] = res;
CLR_ZNC(); SET_ZN(res); FLAGS |= (r2 >> 30) & 2;
}
-void jaguar_cpu_device::rorq_n_rn(UINT16 op)
+void jaguar_cpu_device::rorq_n_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = (r2 >> r1) | (r2 << (32 - r1));
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = (r2 >> r1) | (r2 << (32 - r1));
m_r[dreg] = res;
CLR_ZNC(); SET_ZN(res); FLAGS |= (r2 >> 30) & 2;
}
-void jaguar_cpu_device::sat8_rn(UINT16 op) /* GPU only */
+void jaguar_cpu_device::sat8_rn(uint16_t op) /* GPU only */
{
int dreg = op & 31;
- INT32 r2 = m_r[dreg];
- UINT32 res = (r2 < 0) ? 0 : (r2 > 255) ? 255 : r2;
+ int32_t r2 = m_r[dreg];
+ uint32_t res = (r2 < 0) ? 0 : (r2 > 255) ? 255 : r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::sat16_rn(UINT16 op) /* GPU only */
+void jaguar_cpu_device::sat16_rn(uint16_t op) /* GPU only */
{
int dreg = op & 31;
- INT32 r2 = m_r[dreg];
- UINT32 res = (r2 < 0) ? 0 : (r2 > 65535) ? 65535 : r2;
+ int32_t r2 = m_r[dreg];
+ uint32_t res = (r2 < 0) ? 0 : (r2 > 65535) ? 65535 : r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::sat16s_rn(UINT16 op) /* DSP only */
+void jaguar_cpu_device::sat16s_rn(uint16_t op) /* DSP only */
{
int dreg = op & 31;
- INT32 r2 = m_r[dreg];
- UINT32 res = (r2 < -32768) ? -32768 : (r2 > 32767) ? 32767 : r2;
+ int32_t r2 = m_r[dreg];
+ uint32_t res = (r2 < -32768) ? -32768 : (r2 > 32767) ? 32767 : r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::sat24_rn(UINT16 op) /* GPU only */
+void jaguar_cpu_device::sat24_rn(uint16_t op) /* GPU only */
{
int dreg = op & 31;
- INT32 r2 = m_r[dreg];
- UINT32 res = (r2 < 0) ? 0 : (r2 > 16777215) ? 16777215 : r2;
+ int32_t r2 = m_r[dreg];
+ uint32_t res = (r2 < 0) ? 0 : (r2 > 16777215) ? 16777215 : r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::sat32s_rn(UINT16 op) /* DSP only */
+void jaguar_cpu_device::sat32s_rn(uint16_t op) /* DSP only */
{
int dreg = op & 31;
- INT32 r2 = (UINT32)m_r[dreg];
- INT32 temp = m_accum >> 32;
- UINT32 res = (temp < -1) ? (INT32)0x80000000 : (temp > 0) ? (INT32)0x7fffffff : r2;
+ int32_t r2 = (uint32_t)m_r[dreg];
+ int32_t temp = m_accum >> 32;
+ uint32_t res = (temp < -1) ? (int32_t)0x80000000 : (temp > 0) ? (int32_t)0x7fffffff : r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
-void jaguar_cpu_device::sh_rn_rn(UINT16 op)
+void jaguar_cpu_device::sh_rn_rn(uint16_t op)
{
int dreg = op & 31;
- INT32 r1 = (INT32)m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res;
+ int32_t r1 = (int32_t)m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res;
CLR_ZNC();
if (r1 < 0)
@@ -1059,12 +1059,12 @@ void jaguar_cpu_device::sh_rn_rn(UINT16 op)
SET_ZN(res);
}
-void jaguar_cpu_device::sha_rn_rn(UINT16 op)
+void jaguar_cpu_device::sha_rn_rn(uint16_t op)
{
int dreg = op & 31;
- INT32 r1 = (INT32)m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res;
+ int32_t r1 = (int32_t)m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res;
CLR_ZNC();
if (r1 < 0)
@@ -1074,76 +1074,76 @@ void jaguar_cpu_device::sha_rn_rn(UINT16 op)
}
else
{
- res = (r1 >= 32) ? ((INT32)r2 >> 31) : ((INT32)r2 >> r1);
+ res = (r1 >= 32) ? ((int32_t)r2 >> 31) : ((int32_t)r2 >> r1);
FLAGS |= (r2 << 1) & 2;
}
m_r[dreg] = res;
SET_ZN(res);
}
-void jaguar_cpu_device::sharq_n_rn(UINT16 op)
+void jaguar_cpu_device::sharq_n_rn(uint16_t op)
{
int dreg = op & 31;
- INT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = (INT32)r2 >> r1;
+ int32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = (int32_t)r2 >> r1;
m_r[dreg] = res;
CLR_ZNC(); SET_ZN(res); FLAGS |= (r2 << 1) & 2;
}
-void jaguar_cpu_device::shlq_n_rn(UINT16 op)
+void jaguar_cpu_device::shlq_n_rn(uint16_t op)
{
int dreg = op & 31;
- INT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 << (32 - r1);
+ int32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 << (32 - r1);
m_r[dreg] = res;
CLR_ZNC(); SET_ZN(res); FLAGS |= (r2 >> 30) & 2;
}
-void jaguar_cpu_device::shrq_n_rn(UINT16 op)
+void jaguar_cpu_device::shrq_n_rn(uint16_t op)
{
int dreg = op & 31;
- INT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 >> r1;
+ int32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 >> r1;
m_r[dreg] = res;
CLR_ZNC(); SET_ZN(res); FLAGS |= (r2 << 1) & 2;
}
-void jaguar_cpu_device::store_rn_rn(UINT16 op)
+void jaguar_cpu_device::store_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
WRITELONG(r1, m_r[op & 31]);
}
-void jaguar_cpu_device::store_rn_r14n(UINT16 op)
+void jaguar_cpu_device::store_rn_r14n(uint16_t op)
{
- UINT32 r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
WRITELONG(m_r[14] + r1 * 4, m_r[op & 31]);
}
-void jaguar_cpu_device::store_rn_r15n(UINT16 op)
+void jaguar_cpu_device::store_rn_r15n(uint16_t op)
{
- UINT32 r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
WRITELONG(m_r[15] + r1 * 4, m_r[op & 31]);
}
-void jaguar_cpu_device::store_rn_r14rn(UINT16 op)
+void jaguar_cpu_device::store_rn_r14rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
WRITELONG(m_r[14] + r1, m_r[op & 31]);
}
-void jaguar_cpu_device::store_rn_r15rn(UINT16 op)
+void jaguar_cpu_device::store_rn_r15rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
WRITELONG(m_r[15] + r1, m_r[op & 31]);
}
-void jaguar_cpu_device::storeb_rn_rn(UINT16 op)
+void jaguar_cpu_device::storeb_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
if (r1 >= m_internal_ram_start && r1 <= m_internal_ram_end)
{
WRITELONG(r1 & ~3, m_r[op & 31]);
@@ -1154,9 +1154,9 @@ void jaguar_cpu_device::storeb_rn_rn(UINT16 op)
}
}
-void jaguar_cpu_device::storew_rn_rn(UINT16 op)
+void jaguar_cpu_device::storew_rn_rn(uint16_t op)
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
if (r1 >= m_internal_ram_start && r1 <= m_internal_ram_end)
{
WRITELONG(r1 & ~3, m_r[op & 31]);
@@ -1167,9 +1167,9 @@ void jaguar_cpu_device::storew_rn_rn(UINT16 op)
}
}
-void jaguar_cpu_device::storep_rn_rn(UINT16 op) /* GPU only */
+void jaguar_cpu_device::storep_rn_rn(uint16_t op) /* GPU only */
{
- UINT32 r1 = m_r[(op >> 5) & 31];
+ uint32_t r1 = m_r[(op >> 5) & 31];
if (r1 >= m_internal_ram_start && r1 <= m_internal_ram_end)
{
WRITELONG(r1 & ~3, m_r[op & 31]);
@@ -1181,63 +1181,63 @@ void jaguar_cpu_device::storep_rn_rn(UINT16 op) /* GPU only */
}
}
-void jaguar_cpu_device::sub_rn_rn(UINT16 op)
+void jaguar_cpu_device::sub_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 - r1;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 - r1;
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_SUB(r2, r1, res);
}
-void jaguar_cpu_device::subc_rn_rn(UINT16 op)
+void jaguar_cpu_device::subc_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 c = ((FLAGS >> 1) & 1);
- UINT32 res = r2 - r1 - c;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t c = ((FLAGS >> 1) & 1);
+ uint32_t res = r2 - r1 - c;
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_SUB(r2, r1 + c, res);
}
-void jaguar_cpu_device::subq_n_rn(UINT16 op)
+void jaguar_cpu_device::subq_n_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 - r1;
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 - r1;
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_SUB(r2, r1, res);
}
-void jaguar_cpu_device::subqmod_n_rn(UINT16 op) /* DSP only */
+void jaguar_cpu_device::subqmod_n_rn(uint16_t op) /* DSP only */
{
int dreg = op & 31;
- UINT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 - r1;
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 - r1;
res = (res & ~m_ctrl[D_MOD]) | (r2 & ~m_ctrl[D_MOD]);
m_r[dreg] = res;
CLR_ZNC(); SET_ZNC_SUB(r2, r1, res);
}
-void jaguar_cpu_device::subqt_n_rn(UINT16 op)
+void jaguar_cpu_device::subqt_n_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = convert_zero[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r2 - r1;
+ uint32_t r1 = convert_zero[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r2 - r1;
m_r[dreg] = res;
}
-void jaguar_cpu_device::xor_rn_rn(UINT16 op)
+void jaguar_cpu_device::xor_rn_rn(uint16_t op)
{
int dreg = op & 31;
- UINT32 r1 = m_r[(op >> 5) & 31];
- UINT32 r2 = m_r[dreg];
- UINT32 res = r1 ^ r2;
+ uint32_t r1 = m_r[(op >> 5) & 31];
+ uint32_t r2 = m_r[dreg];
+ uint32_t res = r1 ^ r2;
m_r[dreg] = res;
CLR_ZN(); SET_ZN(res);
}
@@ -1258,7 +1258,7 @@ READ32_MEMBER( jaguargpu_cpu_device::ctrl_r )
WRITE32_MEMBER( jaguargpu_cpu_device::ctrl_w )
{
- UINT32 oldval, newval;
+ uint32_t oldval, newval;
if (LOG_GPU_IO && offset != G_HIDATA)
logerror("GPU write register @ F021%02X = %08X\n", offset * 4, data);
@@ -1352,7 +1352,7 @@ READ32_MEMBER( jaguardsp_cpu_device::ctrl_r )
WRITE32_MEMBER( jaguardsp_cpu_device::ctrl_w )
{
- UINT32 oldval, newval;
+ uint32_t oldval, newval;
if (LOG_DSP_IO && offset != D_FLAGS)
logerror("DSP write register @ F1A1%02X = %08X\n", offset * 4, data);
@@ -1430,14 +1430,14 @@ WRITE32_MEMBER( jaguardsp_cpu_device::ctrl_w )
}
-offs_t jaguargpu_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t jaguargpu_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( jaguargpu );
return CPU_DISASSEMBLE_NAME(jaguargpu)(this, buffer, pc, oprom, opram, options);
}
-offs_t jaguardsp_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t jaguardsp_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( jaguardsp );
return CPU_DISASSEMBLE_NAME(jaguardsp)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/jaguar/jaguar.h b/src/devices/cpu/jaguar/jaguar.h
index cc2e8938961..85fec3fe40e 100644
--- a/src/devices/cpu/jaguar/jaguar.h
+++ b/src/devices/cpu/jaguar/jaguar.h
@@ -103,7 +103,7 @@ class jaguar_cpu_device : public cpu_device
{
public:
// construction/destruction
- jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool isdsp);
+ jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, bool isdsp);
~jaguar_cpu_device();
// static configuration helpers
@@ -118,9 +118,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 5; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 5; }
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
@@ -130,21 +130,21 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 6; }
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 6; }
address_space_config m_program_config;
/* core registers */
- UINT32 m_r[32];
- UINT32 m_a[32];
- UINT32 * m_b0;
- UINT32 * m_b1;
+ uint32_t m_r[32];
+ uint32_t m_a[32];
+ uint32_t * m_b0;
+ uint32_t * m_b1;
/* control registers */
- UINT32 m_ctrl[G_CTRLMAX];
- UINT32 m_ppc;
- UINT64 m_accum;
+ uint32_t m_ctrl[G_CTRLMAX];
+ uint32_t m_ppc;
+ uint64_t m_accum;
/* internal stuff */
bool m_isdsp;
@@ -154,92 +154,92 @@ protected:
address_space *m_program;
direct_read_data *m_direct;
- UINT32 m_internal_ram_start;
- UINT32 m_internal_ram_end;
+ uint32_t m_internal_ram_start;
+ uint32_t m_internal_ram_end;
- typedef void (jaguar_cpu_device::*op_func)(UINT16 op);
+ typedef void (jaguar_cpu_device::*op_func)(uint16_t op);
static const op_func gpu_op_table[64];
static const op_func dsp_op_table[64];
- static const UINT32 convert_zero[32];
+ static const uint32_t convert_zero[32];
bool m_tables_referenced;
- UINT32 table_refcount;
- std::unique_ptr<UINT16[]> mirror_table;
- std::unique_ptr<UINT8[]> condition_table;
+ uint32_t table_refcount;
+ std::unique_ptr<uint16_t[]> mirror_table;
+ std::unique_ptr<uint8_t[]> condition_table;
const op_func *m_table;
- void abs_rn(UINT16 op);
- void add_rn_rn(UINT16 op);
- void addc_rn_rn(UINT16 op);
- void addq_n_rn(UINT16 op);
- void addqmod_n_rn(UINT16 op); /* DSP only */
- void addqt_n_rn(UINT16 op);
- void and_rn_rn(UINT16 op);
- void bclr_n_rn(UINT16 op);
- void bset_n_rn(UINT16 op);
- void btst_n_rn(UINT16 op);
- void cmp_rn_rn(UINT16 op);
- void cmpq_n_rn(UINT16 op);
- void div_rn_rn(UINT16 op);
- void illegal(UINT16 op);
- void imacn_rn_rn(UINT16 op);
- void imult_rn_rn(UINT16 op);
- void imultn_rn_rn(UINT16 op);
- void jr_cc_n(UINT16 op);
- void jump_cc_rn(UINT16 op);
- void load_rn_rn(UINT16 op);
- void load_r14n_rn(UINT16 op);
- void load_r15n_rn(UINT16 op);
- void load_r14rn_rn(UINT16 op);
- void load_r15rn_rn(UINT16 op);
- void loadb_rn_rn(UINT16 op);
- void loadw_rn_rn(UINT16 op);
- void loadp_rn_rn(UINT16 op); /* GPU only */
- void mirror_rn(UINT16 op); /* DSP only */
- void mmult_rn_rn(UINT16 op);
- void move_rn_rn(UINT16 op);
- void move_pc_rn(UINT16 op);
- void movefa_rn_rn(UINT16 op);
- void movei_n_rn(UINT16 op);
- void moveq_n_rn(UINT16 op);
- void moveta_rn_rn(UINT16 op);
- void mtoi_rn_rn(UINT16 op);
- void mult_rn_rn(UINT16 op);
- void neg_rn(UINT16 op);
- void nop(UINT16 op);
- void normi_rn_rn(UINT16 op);
- void not_rn(UINT16 op);
- void or_rn_rn(UINT16 op);
- void pack_rn(UINT16 op); /* GPU only */
- void resmac_rn(UINT16 op);
- void ror_rn_rn(UINT16 op);
- void rorq_n_rn(UINT16 op);
- void sat8_rn(UINT16 op); /* GPU only */
- void sat16_rn(UINT16 op); /* GPU only */
- void sat16s_rn(UINT16 op); /* DSP only */
- void sat24_rn(UINT16 op); /* GPU only */
- void sat32s_rn(UINT16 op); /* DSP only */
- void sh_rn_rn(UINT16 op);
- void sha_rn_rn(UINT16 op);
- void sharq_n_rn(UINT16 op);
- void shlq_n_rn(UINT16 op);
- void shrq_n_rn(UINT16 op);
- void store_rn_rn(UINT16 op);
- void store_rn_r14n(UINT16 op);
- void store_rn_r15n(UINT16 op);
- void store_rn_r14rn(UINT16 op);
- void store_rn_r15rn(UINT16 op);
- void storeb_rn_rn(UINT16 op);
- void storew_rn_rn(UINT16 op);
- void storep_rn_rn(UINT16 op); /* GPU only */
- void sub_rn_rn(UINT16 op);
- void subc_rn_rn(UINT16 op);
- void subq_n_rn(UINT16 op);
- void subqmod_n_rn(UINT16 op); /* DSP only */
- void subqt_n_rn(UINT16 op);
- void xor_rn_rn(UINT16 op);
+ void abs_rn(uint16_t op);
+ void add_rn_rn(uint16_t op);
+ void addc_rn_rn(uint16_t op);
+ void addq_n_rn(uint16_t op);
+ void addqmod_n_rn(uint16_t op); /* DSP only */
+ void addqt_n_rn(uint16_t op);
+ void and_rn_rn(uint16_t op);
+ void bclr_n_rn(uint16_t op);
+ void bset_n_rn(uint16_t op);
+ void btst_n_rn(uint16_t op);
+ void cmp_rn_rn(uint16_t op);
+ void cmpq_n_rn(uint16_t op);
+ void div_rn_rn(uint16_t op);
+ void illegal(uint16_t op);
+ void imacn_rn_rn(uint16_t op);
+ void imult_rn_rn(uint16_t op);
+ void imultn_rn_rn(uint16_t op);
+ void jr_cc_n(uint16_t op);
+ void jump_cc_rn(uint16_t op);
+ void load_rn_rn(uint16_t op);
+ void load_r14n_rn(uint16_t op);
+ void load_r15n_rn(uint16_t op);
+ void load_r14rn_rn(uint16_t op);
+ void load_r15rn_rn(uint16_t op);
+ void loadb_rn_rn(uint16_t op);
+ void loadw_rn_rn(uint16_t op);
+ void loadp_rn_rn(uint16_t op); /* GPU only */
+ void mirror_rn(uint16_t op); /* DSP only */
+ void mmult_rn_rn(uint16_t op);
+ void move_rn_rn(uint16_t op);
+ void move_pc_rn(uint16_t op);
+ void movefa_rn_rn(uint16_t op);
+ void movei_n_rn(uint16_t op);
+ void moveq_n_rn(uint16_t op);
+ void moveta_rn_rn(uint16_t op);
+ void mtoi_rn_rn(uint16_t op);
+ void mult_rn_rn(uint16_t op);
+ void neg_rn(uint16_t op);
+ void nop(uint16_t op);
+ void normi_rn_rn(uint16_t op);
+ void not_rn(uint16_t op);
+ void or_rn_rn(uint16_t op);
+ void pack_rn(uint16_t op); /* GPU only */
+ void resmac_rn(uint16_t op);
+ void ror_rn_rn(uint16_t op);
+ void rorq_n_rn(uint16_t op);
+ void sat8_rn(uint16_t op); /* GPU only */
+ void sat16_rn(uint16_t op); /* GPU only */
+ void sat16s_rn(uint16_t op); /* DSP only */
+ void sat24_rn(uint16_t op); /* GPU only */
+ void sat32s_rn(uint16_t op); /* DSP only */
+ void sh_rn_rn(uint16_t op);
+ void sha_rn_rn(uint16_t op);
+ void sharq_n_rn(uint16_t op);
+ void shlq_n_rn(uint16_t op);
+ void shrq_n_rn(uint16_t op);
+ void store_rn_rn(uint16_t op);
+ void store_rn_r14n(uint16_t op);
+ void store_rn_r15n(uint16_t op);
+ void store_rn_r14rn(uint16_t op);
+ void store_rn_r15rn(uint16_t op);
+ void storeb_rn_rn(uint16_t op);
+ void storew_rn_rn(uint16_t op);
+ void storep_rn_rn(uint16_t op); /* GPU only */
+ void sub_rn_rn(uint16_t op);
+ void subc_rn_rn(uint16_t op);
+ void subq_n_rn(uint16_t op);
+ void subqmod_n_rn(uint16_t op); /* DSP only */
+ void subqt_n_rn(uint16_t op);
+ void xor_rn_rn(uint16_t op);
void update_register_banks();
void check_irqs();
void init_tables();
@@ -251,14 +251,14 @@ class jaguargpu_cpu_device : public jaguar_cpu_device
{
public:
// construction/destruction
- jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE32_MEMBER(ctrl_w) override;
DECLARE_READ32_MEMBER(ctrl_r) override;
protected:
virtual void execute_run() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
@@ -266,16 +266,16 @@ class jaguardsp_cpu_device : public jaguar_cpu_device
{
public:
// construction/destruction
- jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE32_MEMBER(ctrl_w) override;
DECLARE_READ32_MEMBER(ctrl_r) override;
protected:
- virtual UINT32 execute_input_lines() const override { return 6; }
+ virtual uint32_t execute_input_lines() const override { return 6; }
virtual void execute_run() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
diff --git a/src/devices/cpu/lc8670/lc8670.cpp b/src/devices/cpu/lc8670/lc8670.cpp
index 9ea32374479..71e674c9221 100644
--- a/src/devices/cpu/lc8670/lc8670.cpp
+++ b/src/devices/cpu/lc8670/lc8670.cpp
@@ -144,7 +144,7 @@ const lc8670_cpu_device::op_handler lc8670_cpu_device::s_opcode_table[] =
// IRQ vectors
//**************************************************************************
-const UINT16 lc8670_cpu_device::s_irq_vectors[] =
+const uint16_t lc8670_cpu_device::s_irq_vectors[] =
{
0x0000, 0x0003, 0x000b, 0x0013, 0x001b, 0x0023, 0x002b, 0x0033,
0x003b, 0x0043, 0x004b, 0x004f, 0x0052, 0x0055, 0x005a, 0x005d
@@ -170,7 +170,7 @@ ADDRESS_MAP_END
// lc8670_cpu_device - constructor
//-------------------------------------------------
-lc8670_cpu_device::lc8670_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+lc8670_cpu_device::lc8670_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, LC8670, "Sanyo LC8670", tag, owner, clock, "lc8670", __FILE__),
m_program_config("program", ENDIANNESS_BIG, 8, 16, 0),
m_data_config("data", ENDIANNESS_BIG, 8, 9, 0, ADDRESS_MAP_NAME(lc8670_internal_map)),
@@ -554,7 +554,7 @@ void lc8670_cpu_device::execute_set_input(int inputnum, int state)
// screen_update - handle updating the screen
//-------------------------------------------------
-UINT32 lc8670_cpu_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+uint32_t lc8670_cpu_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
if (m_lcd_update_func)
return m_lcd_update_func(*this, bitmap, cliprect, m_xram, (REG_MCR & 0x08) && (REG_VCCR & 0x80), REG_STAD);
@@ -575,7 +575,7 @@ void lc8670_cpu_device::check_irqs()
if (m_irq_flag && !m_after_reti)
{
int irq = 0;
- UINT8 priority = 0;
+ uint8_t priority = 0;
// highest priority IRQ
if (!(REG_IE & 0x01) && (m_irq_flag & 0x02))
@@ -663,8 +663,8 @@ void lc8670_cpu_device::base_timer_tick()
{
if (REG_BTCR & 0x40)
{
- UINT16 base_counter_l = m_base_timer[0] + 1;
- UINT16 base_counter_h = m_base_timer[1];
+ uint16_t base_counter_l = m_base_timer[0] + 1;
+ uint16_t base_counter_h = m_base_timer[1];
if (REG_BTCR & 0x80) // 6-bit mode
base_counter_h++;
@@ -724,7 +724,7 @@ void lc8670_cpu_device::base_timer_tick()
void lc8670_cpu_device::timer0_prescaler_tick()
{
- UINT16 prescaler = m_timer0_prescaler + 1;
+ uint16_t prescaler = m_timer0_prescaler + 1;
if (prescaler & 0x100)
{
if (LOG_TIMERS) logerror("%s: timer0 prescaler overflow\n", tag());
@@ -755,7 +755,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line)
// 16-bit timer/counter mode
if ((REG_T0CNT & 0xc0) == 0xc0 && (((REG_T0CNT & 0x10) && ext_line) || (!(REG_T0CNT & 0x10) && !ext_line)))
{
- UINT32 timer0 = ((m_timer0[1] << 8) | m_timer0[0]) + 1;
+ uint32_t timer0 = ((m_timer0[1] << 8) | m_timer0[0]) + 1;
if (timer0 & 0x10000)
{
@@ -778,7 +778,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line)
// 8-bit timer/counter mode
if ((REG_T0CNT & 0x40) && (((REG_T0CNT & 0x10) && ext_line) || (!(REG_T0CNT & 0x10) && !ext_line)))
{
- UINT16 timer0l = m_timer0[0] + 1;
+ uint16_t timer0l = m_timer0[0] + 1;
if (timer0l & 0x100)
{
@@ -795,7 +795,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line)
}
if ((REG_T0CNT & 0x80) && !ext_line)
{
- UINT16 timer0h = m_timer0[1] + 1;
+ uint16_t timer0h = m_timer0[1] + 1;
if (timer0h & 0x100)
{
if (LOG_TIMERS) logerror("%s: timer0 high overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,3));
@@ -826,10 +826,10 @@ void lc8670_cpu_device::timer1_tick()
if (REG_T1CNT & 0x40)
{
// 16-bit timer mode
- UINT16 timer1l = m_timer1[0] + (REG_T1CNT & 0x80 ? 1 : 2);
+ uint16_t timer1l = m_timer1[0] + (REG_T1CNT & 0x80 ? 1 : 2);
if (timer1l & 0x100)
{
- UINT16 timer1h = m_timer1[1] + 1;
+ uint16_t timer1h = m_timer1[1] + 1;
m_timer1[0] = REG_T1LR;
REG_T1CNT |= 0x04;
@@ -857,7 +857,7 @@ void lc8670_cpu_device::timer1_tick()
// 8-bit timer/pulse generator mode
if (REG_T1CNT & 0x40)
{
- UINT16 timer1l = m_timer1[0] + 1;
+ uint16_t timer1l = m_timer1[0] + 1;
if (timer1l == m_timer1_comparator[0])
update_port1(m_p1_data | 0x80);
@@ -878,7 +878,7 @@ void lc8670_cpu_device::timer1_tick()
}
if (REG_T1CNT & 0x80)
{
- UINT16 timer1h = m_timer1[1] + 1;
+ uint16_t timer1h = m_timer1[1] + 1;
if (timer1h & 0x100)
{
@@ -916,7 +916,7 @@ READ8_MEMBER(lc8670_cpu_device::xram_r)
{
if (!(REG_VCCR & 0x40) || space.debugger_access()) // XRAM access enabled
{
- UINT8 * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60;
+ uint8_t * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60;
switch(REG_XBNK & 0x03)
{
@@ -939,7 +939,7 @@ WRITE8_MEMBER(lc8670_cpu_device::xram_w)
{
if (!(REG_VCCR & 0x40) || space.debugger_access()) // XRAM access enabled
{
- UINT8 * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60;
+ uint8_t * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60;
switch(REG_XBNK & 0x03)
{
@@ -976,10 +976,10 @@ READ8_MEMBER(lc8670_cpu_device::regs_r)
return m_io->read_byte(LC8670_PORT7) | 0xf0; // 4-bit read-only port
case 0x66:
{
- UINT8 data = m_vtrbf[((REG_VRMAD2<<8) | REG_VRMAD1) & 0x1ff];
+ uint8_t data = m_vtrbf[((REG_VRMAD2<<8) | REG_VRMAD1) & 0x1ff];
if (!space.debugger_access() && (REG_VSEL & 0x10))
{
- UINT16 vrmad = (REG_VRMAD1 | (REG_VRMAD2<<8)) + 1;
+ uint16_t vrmad = (REG_VRMAD1 | (REG_VRMAD2<<8)) + 1;
REG_VRMAD1 = vrmad & 0xff;
REG_VRMAD2 = (vrmad >> 8) & 0x01;
}
@@ -1046,7 +1046,7 @@ WRITE8_MEMBER(lc8670_cpu_device::regs_w)
m_vtrbf[((REG_VRMAD2<<8) | REG_VRMAD1) & 0x1ff] = data;
if (!space.debugger_access() && (REG_VSEL & 0x10))
{
- UINT16 vrmad = (REG_VRMAD1 | (REG_VRMAD2<<8)) + 1;
+ uint16_t vrmad = (REG_VRMAD1 | (REG_VRMAD2<<8)) + 1;
REG_VRMAD1 = vrmad & 0xff;
REG_VRMAD2 = (vrmad >> 8) & 0x01;
}
@@ -1070,26 +1070,26 @@ WRITE8_MEMBER(lc8670_cpu_device::regs_w)
// HELPERS
//**************************************************************************
-inline UINT8 lc8670_cpu_device::fetch()
+inline uint8_t lc8670_cpu_device::fetch()
{
- UINT8 data = m_direct->read_byte(m_pc);
+ uint8_t data = m_direct->read_byte(m_pc);
set_pc(m_pc + 1);
return data;
}
-inline UINT8 lc8670_cpu_device::read_data(UINT16 offset)
+inline uint8_t lc8670_cpu_device::read_data(uint16_t offset)
{
return m_data->read_byte(offset);
}
-inline void lc8670_cpu_device::write_data(UINT16 offset, UINT8 data)
+inline void lc8670_cpu_device::write_data(uint16_t offset, uint8_t data)
{
m_data->write_byte(offset, data);
}
-inline UINT8 lc8670_cpu_device::read_data_latch(UINT16 offset)
+inline uint8_t lc8670_cpu_device::read_data_latch(uint16_t offset)
{
if (offset == 0x144)
return REG_P1;
@@ -1099,7 +1099,7 @@ inline UINT8 lc8670_cpu_device::read_data_latch(UINT16 offset)
return read_data(offset);
}
-inline void lc8670_cpu_device::write_data_latch(UINT16 offset, UINT8 data)
+inline void lc8670_cpu_device::write_data_latch(uint16_t offset, uint8_t data)
{
if (offset == 0x144)
REG_P1 = data;
@@ -1109,34 +1109,34 @@ inline void lc8670_cpu_device::write_data_latch(UINT16 offset, UINT8 data)
write_data(offset, data);
}
-inline void lc8670_cpu_device::update_port1(UINT8 data)
+inline void lc8670_cpu_device::update_port1(uint8_t data)
{
m_p1_data = data;
m_io->write_byte(LC8670_PORT1, ((REG_P1 | (m_p1_data & REG_P1FCR)) & REG_P1DDR) | (m_io->read_byte(LC8670_PORT1) & (REG_P1DDR ^ 0xff)));
}
-inline void lc8670_cpu_device::set_pc(UINT16 new_pc)
+inline void lc8670_cpu_device::set_pc(uint16_t new_pc)
{
m_pc = new_pc;
}
-inline void lc8670_cpu_device::push(UINT8 data)
+inline void lc8670_cpu_device::push(uint8_t data)
{
REG_SP++;
m_mram[REG_SP] = data;
}
-inline UINT8 lc8670_cpu_device::pop()
+inline uint8_t lc8670_cpu_device::pop()
{
- UINT8 data = m_mram[REG_SP];
+ uint8_t data = m_mram[REG_SP];
REG_SP--;
return data;
}
-inline UINT16 lc8670_cpu_device::get_addr()
+inline uint16_t lc8670_cpu_device::get_addr()
{
int mode = m_op & 0x0f;
- UINT16 addr;
+ uint16_t addr;
if (mode > 0x01 && mode <= 0x03)
addr = GET_D9;
@@ -1148,10 +1148,10 @@ inline UINT16 lc8670_cpu_device::get_addr()
return addr;
}
-inline UINT8 lc8670_cpu_device::get_data()
+inline uint8_t lc8670_cpu_device::get_data()
{
int mode = m_op & 0x0f;
- UINT8 data;
+ uint8_t data;
if (mode == 0x01)
data = GET_I8;
@@ -1163,7 +1163,7 @@ inline UINT8 lc8670_cpu_device::get_data()
inline void lc8670_cpu_device::change_clock_source()
{
- UINT32 new_clock = 0;
+ uint32_t new_clock = 0;
switch(REG_OCR & 0x30)
{
@@ -1187,7 +1187,7 @@ inline void lc8670_cpu_device::change_clock_source()
inline void lc8670_cpu_device::check_p_flag()
{
- UINT8 p_plag = 0;
+ uint8_t p_plag = 0;
for(int i=0; i<8; i++)
p_plag ^= BIT(REG_A, i);
@@ -1216,7 +1216,7 @@ inline void lc8670_cpu_device::set_irq_flag(int source)
m_irq_flag |= 1<<source;
}
-int lc8670_cpu_device::decode_op(UINT8 op)
+int lc8670_cpu_device::decode_op(uint8_t op)
{
int idx;
switch (op & 0x0f)
@@ -1249,7 +1249,7 @@ int lc8670_cpu_device::op_nop()
int lc8670_cpu_device::op_br()
{
- UINT8 r8 = GET_R8;
+ uint8_t r8 = GET_R8;
set_pc(m_pc + SIGNED(r8));
return 2;
@@ -1265,7 +1265,7 @@ int lc8670_cpu_device::op_ld()
int lc8670_cpu_device::op_call()
{
- UINT16 new_pc = GET_A12;
+ uint16_t new_pc = GET_A12;
push((m_pc>>0) & 0xff);
push((m_pc>>8) & 0xff);
@@ -1278,7 +1278,7 @@ int lc8670_cpu_device::op_call()
int lc8670_cpu_device::op_callr()
{
- UINT16 r16 = fetch();
+ uint16_t r16 = fetch();
r16 |= fetch()<<8;
push((m_pc>>0) & 0xff);
@@ -1290,7 +1290,7 @@ int lc8670_cpu_device::op_callr()
int lc8670_cpu_device::op_brf()
{
- UINT16 r16 = fetch();
+ uint16_t r16 = fetch();
r16 |= fetch()<<8;
set_pc(m_pc - 1 + r16);
@@ -1306,7 +1306,7 @@ int lc8670_cpu_device::op_st()
int lc8670_cpu_device::op_callf()
{
- UINT16 a16 = fetch()<<8;
+ uint16_t a16 = fetch()<<8;
a16 |= fetch();
push((m_pc>>0) & 0xff);
@@ -1318,7 +1318,7 @@ int lc8670_cpu_device::op_callf()
int lc8670_cpu_device::op_jmpf()
{
- UINT16 a16 = fetch()<<8;
+ uint16_t a16 = fetch()<<8;
a16 |= fetch();
set_pc(a16);
@@ -1329,8 +1329,8 @@ int lc8670_cpu_device::op_jmpf()
int lc8670_cpu_device::op_mov()
{
- UINT16 addr = get_addr();
- UINT8 i8 = GET_I8;
+ uint16_t addr = get_addr();
+ uint8_t i8 = GET_I8;
write_data(addr, i8);
return 1;
@@ -1338,7 +1338,7 @@ int lc8670_cpu_device::op_mov()
int lc8670_cpu_device::op_jmp()
{
- UINT16 new_pc = GET_A12;
+ uint16_t new_pc = GET_A12;
set_pc((m_pc & 0xf000) | new_pc);
return 2;
@@ -1346,7 +1346,7 @@ int lc8670_cpu_device::op_jmp()
int lc8670_cpu_device::op_mul()
{
- UINT32 res = REG_B * ((REG_A<<8) | REG_C);
+ uint32_t res = REG_B * ((REG_A<<8) | REG_C);
REG_A = (res>>8) & 0xff;
REG_B = (res>>16) & 0xff;
@@ -1361,8 +1361,8 @@ int lc8670_cpu_device::op_mul()
int lc8670_cpu_device::op_be()
{
- UINT8 data = get_data();
- UINT8 r8 = GET_R8;
+ uint8_t data = get_data();
+ uint8_t r8 = GET_R8;
if (REG_A == data)
set_pc(m_pc + SIGNED(r8));
@@ -1374,9 +1374,9 @@ int lc8670_cpu_device::op_be()
int lc8670_cpu_device::op_be_ri()
{
- UINT8 data = get_data();
- UINT8 i8 = GET_I8;
- UINT8 r8 = GET_R8;
+ uint8_t data = get_data();
+ uint8_t i8 = GET_I8;
+ uint8_t r8 = GET_R8;
if (i8 == data)
set_pc(m_pc + SIGNED(r8));
@@ -1389,11 +1389,11 @@ int lc8670_cpu_device::op_be_ri()
int lc8670_cpu_device::op_div()
{
- UINT32 res, mod;
+ uint32_t res, mod;
if (REG_B != 0)
{
- UINT16 v = ((REG_A<<8) | REG_C);
+ uint16_t v = ((REG_A<<8) | REG_C);
res = v / REG_B;
mod = v % REG_B;
@@ -1416,8 +1416,8 @@ int lc8670_cpu_device::op_div()
int lc8670_cpu_device::op_bne()
{
- UINT8 data = get_data();
- UINT8 r8 = GET_R8;
+ uint8_t data = get_data();
+ uint8_t r8 = GET_R8;
if (REG_A != data)
set_pc(m_pc + SIGNED(r8));
@@ -1429,9 +1429,9 @@ int lc8670_cpu_device::op_bne()
int lc8670_cpu_device::op_bne_ri()
{
- UINT8 data = get_data();
- UINT8 i8 = GET_I8;
- UINT8 r8 = GET_R8;
+ uint8_t data = get_data();
+ uint8_t i8 = GET_I8;
+ uint8_t r8 = GET_R8;
if (i8 != data)
set_pc(m_pc + SIGNED(r8));
@@ -1443,7 +1443,7 @@ int lc8670_cpu_device::op_bne_ri()
int lc8670_cpu_device::op_ldf()
{
- UINT16 addr = REG_TRL | (REG_TRH<<8);
+ uint16_t addr = REG_TRL | (REG_TRH<<8);
m_bankswitch_func(REG_FPR & 0x01 ? 2 : 1);
REG_A = m_program->read_byte(addr);
@@ -1455,7 +1455,7 @@ int lc8670_cpu_device::op_ldf()
int lc8670_cpu_device::op_stf()
{
- UINT16 addr = REG_TRL | (REG_TRH<<8);
+ uint16_t addr = REG_TRL | (REG_TRH<<8);
m_bankswitch_func(REG_FPR & 0x01 ? 2 : 1);
m_program->write_byte(addr, REG_A);
@@ -1466,9 +1466,9 @@ int lc8670_cpu_device::op_stf()
int lc8670_cpu_device::op_dbnz()
{
- UINT16 addr = get_addr();
- UINT8 r8 = GET_R8;
- UINT8 data = read_data_latch(addr) - 1;
+ uint16_t addr = get_addr();
+ uint8_t r8 = GET_R8;
+ uint8_t data = read_data_latch(addr) - 1;
write_data_latch(addr, data);
@@ -1480,10 +1480,10 @@ int lc8670_cpu_device::op_dbnz()
int lc8670_cpu_device::op_bpc()
{
- UINT8 b3 = GET_B3;
- UINT16 d9 = GET_D9B3;
- UINT8 r8 = GET_R8;
- UINT8 data = read_data_latch(d9);
+ uint8_t b3 = GET_B3;
+ uint16_t d9 = GET_D9B3;
+ uint8_t r8 = GET_R8;
+ uint8_t data = read_data_latch(d9);
if (data & (1<<b3))
{
@@ -1496,7 +1496,7 @@ int lc8670_cpu_device::op_bpc()
int lc8670_cpu_device::op_push()
{
- UINT16 d9 = GET_D9;
+ uint16_t d9 = GET_D9;
push(read_data(d9));
return 2;
@@ -1504,8 +1504,8 @@ int lc8670_cpu_device::op_push()
int lc8670_cpu_device::op_inc()
{
- UINT16 addr = get_addr();
- UINT8 data = read_data_latch(addr);
+ uint16_t addr = get_addr();
+ uint8_t data = read_data_latch(addr);
write_data_latch(addr, data + 1);
@@ -1514,9 +1514,9 @@ int lc8670_cpu_device::op_inc()
int lc8670_cpu_device::op_bp()
{
- UINT8 b3 = GET_B3;
- UINT16 d9 = GET_D9B3;
- UINT8 r8 = GET_R8;
+ uint8_t b3 = GET_B3;
+ uint16_t d9 = GET_D9B3;
+ uint8_t r8 = GET_R8;
if (read_data(d9) & (1<<b3))
set_pc(m_pc + SIGNED(r8));
@@ -1526,7 +1526,7 @@ int lc8670_cpu_device::op_bp()
int lc8670_cpu_device::op_pop()
{
- UINT16 d9 = GET_D9;
+ uint16_t d9 = GET_D9;
write_data(d9, pop());
return 2;
@@ -1534,8 +1534,8 @@ int lc8670_cpu_device::op_pop()
int lc8670_cpu_device::op_dec()
{
- UINT16 addr = get_addr();
- UINT8 data = read_data_latch(addr);
+ uint16_t addr = get_addr();
+ uint8_t data = read_data_latch(addr);
write_data_latch(addr, data - 1);
@@ -1544,7 +1544,7 @@ int lc8670_cpu_device::op_dec()
int lc8670_cpu_device::op_bz()
{
- UINT8 r8 = GET_R8;
+ uint8_t r8 = GET_R8;
if (REG_A == 0)
set_pc(m_pc + SIGNED(r8));
@@ -1554,8 +1554,8 @@ int lc8670_cpu_device::op_bz()
int lc8670_cpu_device::op_add()
{
- UINT8 data = get_data();
- INT32 res = (REG_A + data);
+ uint8_t data = get_data();
+ int32_t res = (REG_A + data);
SET_CY(res > 0xff ? 1 : 0);
SET_AC(((REG_A & 0x0f) + (data & 0x0f)) > 0x0f ? 1 : 0);
@@ -1569,9 +1569,9 @@ int lc8670_cpu_device::op_add()
int lc8670_cpu_device::op_bn()
{
- UINT8 b3 = GET_B3;
- UINT16 d9 = GET_D9B3;
- UINT8 r8 = GET_R8;
+ uint8_t b3 = GET_B3;
+ uint16_t d9 = GET_D9B3;
+ uint8_t r8 = GET_R8;
if (!(read_data(d9) & (1<<b3)))
set_pc(m_pc + SIGNED(r8));
@@ -1581,7 +1581,7 @@ int lc8670_cpu_device::op_bn()
int lc8670_cpu_device::op_bnz()
{
- UINT8 r8 = GET_R8;
+ uint8_t r8 = GET_R8;
if (REG_A != 0)
set_pc(m_pc + SIGNED(r8));
@@ -1591,8 +1591,8 @@ int lc8670_cpu_device::op_bnz()
int lc8670_cpu_device::op_addc()
{
- UINT8 data = get_data();
- INT32 res = (REG_A + data + GET_CY);
+ uint8_t data = get_data();
+ int32_t res = (REG_A + data + GET_CY);
SET_CY(res > 0xff ? 1 : 0);
SET_AC(((REG_A & 0x0f) + (data & 0x0f) + GET_CY) > 0x0f ? 1 : 0);
@@ -1606,7 +1606,7 @@ int lc8670_cpu_device::op_addc()
int lc8670_cpu_device::op_ret()
{
- UINT16 new_pc = pop()<<8;
+ uint16_t new_pc = pop()<<8;
new_pc |= pop();
set_pc(new_pc);
@@ -1615,8 +1615,8 @@ int lc8670_cpu_device::op_ret()
int lc8670_cpu_device::op_sub()
{
- UINT8 data = get_data();
- INT32 res = (REG_A - data);
+ uint8_t data = get_data();
+ int32_t res = (REG_A - data);
SET_CY(res < 0x00 ? 1 : 0);
SET_AC(((REG_A & 0x0f) - (data & 0x0f)) < 0x00 ? 1 : 0);
@@ -1630,8 +1630,8 @@ int lc8670_cpu_device::op_sub()
int lc8670_cpu_device::op_not1()
{
- UINT16 d9 = GET_D9B3;
- UINT8 data = read_data_latch(d9);
+ uint16_t d9 = GET_D9B3;
+ uint8_t data = read_data_latch(d9);
data ^= (1<<GET_B3);
write_data_latch(d9, data);
@@ -1641,7 +1641,7 @@ int lc8670_cpu_device::op_not1()
int lc8670_cpu_device::op_reti()
{
- UINT16 new_pc = pop()<<8;
+ uint16_t new_pc = pop()<<8;
new_pc |= pop();
set_pc(new_pc);
@@ -1660,8 +1660,8 @@ int lc8670_cpu_device::op_reti()
int lc8670_cpu_device::op_subc()
{
- UINT8 data = get_data();
- INT32 res = (REG_A - data - GET_CY);
+ uint8_t data = get_data();
+ int32_t res = (REG_A - data - GET_CY);
SET_CY(res < 0x00 ? 1 : 0);
SET_AC(((REG_A & 0x0f) - (data & 0x0f) - GET_CY) < 0x00 ? 1 : 0);
@@ -1691,8 +1691,8 @@ int lc8670_cpu_device::op_ldc()
int lc8670_cpu_device::op_xch()
{
- UINT16 addr = get_addr();
- UINT8 data = read_data(addr);
+ uint16_t addr = get_addr();
+ uint8_t data = read_data(addr);
write_data(addr, REG_A);
REG_A = data;
@@ -1703,8 +1703,8 @@ int lc8670_cpu_device::op_xch()
int lc8670_cpu_device::op_clr1()
{
- UINT16 d9 = GET_D9B3;
- UINT8 data = read_data_latch(d9);
+ uint16_t d9 = GET_D9B3;
+ uint8_t data = read_data_latch(d9);
data &= ~(1<<GET_B3);
write_data_latch(d9, data);
@@ -1714,7 +1714,7 @@ int lc8670_cpu_device::op_clr1()
int lc8670_cpu_device::op_rorc()
{
- UINT8 a = (REG_A>>1) | (GET_CY ? 0x80 : 0x00);
+ uint8_t a = (REG_A>>1) | (GET_CY ? 0x80 : 0x00);
SET_CY(BIT(REG_A,0));
REG_A = a;
@@ -1749,8 +1749,8 @@ int lc8670_cpu_device::op_and()
int lc8670_cpu_device::op_set1()
{
- UINT16 d9 = GET_D9B3;
- UINT8 data = read_data_latch(d9);
+ uint16_t d9 = GET_D9B3;
+ uint8_t data = read_data_latch(d9);
data |= (1<<GET_B3);
write_data_latch(d9, data);
@@ -1760,7 +1760,7 @@ int lc8670_cpu_device::op_set1()
int lc8670_cpu_device::op_rolc()
{
- UINT8 a = (REG_A<<1) | (GET_CY ? 0x01 : 0x00);
+ uint8_t a = (REG_A<<1) | (GET_CY ? 0x01 : 0x00);
SET_CY(BIT(REG_A,7));
REG_A = a;
diff --git a/src/devices/cpu/lc8670/lc8670.h b/src/devices/cpu/lc8670/lc8670.h
index e6211a4522f..51c78b602c9 100644
--- a/src/devices/cpu/lc8670/lc8670.h
+++ b/src/devices/cpu/lc8670/lc8670.h
@@ -52,8 +52,8 @@ enum
// TYPE DEFINITIONS
//**************************************************************************
-typedef UINT32 (*lc8670_lcd_update)(device_t &device, bitmap_ind16 &bitmap, const rectangle &cliprect, UINT8* vram, bool lcd_enabled, UINT8 stad);
-#define LC8670_LCD_UPDATE(name) UINT32 name(device_t &device, bitmap_ind16 &bitmap, const rectangle &cliprect, UINT8* vram, bool lcd_enabled, UINT8 stad)
+typedef uint32_t (*lc8670_lcd_update)(device_t &device, bitmap_ind16 &bitmap, const rectangle &cliprect, uint8_t* vram, bool lcd_enabled, uint8_t stad);
+#define LC8670_LCD_UPDATE(name) uint32_t name(device_t &device, bitmap_ind16 &bitmap, const rectangle &cliprect, uint8_t* vram, bool lcd_enabled, uint8_t stad)
//**************************************************************************
@@ -77,10 +77,10 @@ class lc8670_cpu_device : public cpu_device
{
public:
// construction/destruction
- lc8670_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ lc8670_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
// public interfaces
- UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
// internal map handlers
DECLARE_READ8_MEMBER(regs_r);
@@ -91,7 +91,7 @@ public:
DECLARE_WRITE8_MEMBER(xram_w);
// static configuration helpers
- static void static_set_cpu_clock(device_t &device, int _source, UINT32 _clock) { downcast<lc8670_cpu_device &>(device).m_clocks[_source] = _clock; }
+ static void static_set_cpu_clock(device_t &device, int _source, uint32_t _clock) { downcast<lc8670_cpu_device &>(device).m_clocks[_source] = _clock; }
static void static_set_lcd_update_cb(device_t &device, lc8670_lcd_update _cb) { downcast<lc8670_cpu_device &>(device).m_lcd_update_func = _cb; }
template<class _Object> static devcb_base & static_set_bankswitch_cb(device_t &device, _Object object) { return downcast<lc8670_cpu_device &>(device).m_bankswitch_func.set_callback(object); }
@@ -102,9 +102,9 @@ protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 7; }
- virtual UINT32 execute_input_lines() const override { return 4; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 7; }
+ virtual uint32_t execute_input_lines() const override { return 4; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -116,34 +116,34 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
// helpers
- inline UINT8 fetch();
- inline void push(UINT8 data);
- inline UINT8 pop();
- inline UINT8 read_data(UINT16 offset);
- inline void write_data(UINT16 offset, UINT8 data);
- inline UINT8 read_data_latch(UINT16 offset);
- inline void write_data_latch(UINT16 offset, UINT8 data);
- inline void update_port1(UINT8 data);
- inline void set_pc(UINT16 new_pc);
- inline UINT8 get_data();
- inline UINT16 get_addr();
+ inline uint8_t fetch();
+ inline void push(uint8_t data);
+ inline uint8_t pop();
+ inline uint8_t read_data(uint16_t offset);
+ inline void write_data(uint16_t offset, uint8_t data);
+ inline uint8_t read_data_latch(uint16_t offset);
+ inline void write_data_latch(uint16_t offset, uint8_t data);
+ inline void update_port1(uint8_t data);
+ inline void set_pc(uint16_t new_pc);
+ inline uint8_t get_data();
+ inline uint16_t get_addr();
inline void change_clock_source();
inline void check_p_flag();
inline void check_p3int();
inline void set_irq_flag(int source);
- int decode_op(UINT8 op);
+ int decode_op(uint8_t op);
void check_irqs();
void timer0_prescaler_tick();
void timer0_tick(bool ext_line = false);
void timer1_tick();
void base_timer_tick();
- static void dasm_arg(UINT8 op, char *buffer, offs_t pc, int arg, const UINT8 *oprom, int &pos);
+ static void dasm_arg(uint8_t op, char *buffer, offs_t pc, int arg, const uint8_t *oprom, int &pos);
// opcodes handlers
int op_nop();
@@ -212,32 +212,32 @@ private:
// internal state
int m_icount;
- UINT16 m_pc;
- UINT16 m_ppc;
- UINT8 m_op;
- UINT8 m_sfr[0x80]; // special function registers
- UINT8 m_mram[0x200]; // main RAM
- UINT8 m_xram[0xc6]; // XRAM
- UINT8 m_vtrbf[0x200]; // work RAM
- UINT16 m_irq_flag;
- UINT8 m_irq_lev;
+ uint16_t m_pc;
+ uint16_t m_ppc;
+ uint8_t m_op;
+ uint8_t m_sfr[0x80]; // special function registers
+ uint8_t m_mram[0x200]; // main RAM
+ uint8_t m_xram[0xc6]; // XRAM
+ uint8_t m_vtrbf[0x200]; // work RAM
+ uint16_t m_irq_flag;
+ uint8_t m_irq_lev;
bool m_after_reti;
- UINT8 m_p1_data;
- UINT8 m_timer0_prescaler;
- UINT8 m_timer0[2];
- UINT8 m_timer1[2];
- UINT8 m_timer1_comparator[2];
- UINT8 m_base_timer[2];
+ uint8_t m_p1_data;
+ uint8_t m_timer0_prescaler;
+ uint8_t m_timer0[2];
+ uint8_t m_timer1[2];
+ uint8_t m_timer1_comparator[2];
+ uint8_t m_base_timer[2];
bool m_clock_changed;
int m_input_lines[4];
// configuration
- UINT32 m_clocks[3]; // clock sources
+ uint32_t m_clocks[3]; // clock sources
devcb_write8 m_bankswitch_func; // bankswitch CB
lc8670_lcd_update m_lcd_update_func; // LCD update CB
// interrupts vectors
- static const UINT16 s_irq_vectors[16];
+ static const uint16_t s_irq_vectors[16];
// opcodes table
typedef int (lc8670_cpu_device::*op_handler)();
@@ -264,8 +264,8 @@ private:
struct dasm_entry
{
const char *str;
- UINT8 arg1;
- UINT8 arg2;
+ uint8_t arg1;
+ uint8_t arg2;
bool inv;
};
static const dasm_entry s_dasm_table[80];
diff --git a/src/devices/cpu/lc8670/lc8670dsm.cpp b/src/devices/cpu/lc8670/lc8670dsm.cpp
index 45985ea6e5f..af2672a88bc 100644
--- a/src/devices/cpu/lc8670/lc8670dsm.cpp
+++ b/src/devices/cpu/lc8670/lc8670dsm.cpp
@@ -94,7 +94,7 @@ const lc8670_cpu_device::dasm_entry lc8670_cpu_device::s_dasm_table[] =
{ "SET1", OP_D9B3, OP_NULL, 0 },
};
-void lc8670_cpu_device::dasm_arg(UINT8 op, char *buffer, offs_t pc, int arg, const UINT8 *oprom, int &pos)
+void lc8670_cpu_device::dasm_arg(uint8_t op, char *buffer, offs_t pc, int arg, const uint8_t *oprom, int &pos)
{
switch( arg )
{
@@ -151,12 +151,12 @@ void lc8670_cpu_device::dasm_arg(UINT8 op, char *buffer, offs_t pc, int arg, con
// helper function
//-------------------------------------------------
-offs_t lc8670_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t lc8670_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
int pos = 0;
char arg1[16], arg2[16];
- UINT8 op = oprom[pos++];
+ uint8_t op = oprom[pos++];
int op_idx = decode_op(op);
const dasm_entry *inst = &s_dasm_table[op_idx];
diff --git a/src/devices/cpu/lh5801/5801dasm.cpp b/src/devices/cpu/lh5801/5801dasm.cpp
index 11fb6d38f4e..c6583b2cadd 100644
--- a/src/devices/cpu/lh5801/5801dasm.cpp
+++ b/src/devices/cpu/lh5801/5801dasm.cpp
@@ -667,7 +667,7 @@ CPU_DISASSEMBLE( lh5801 )
{
int pos = 0;
int oper;
- UINT16 absolut;
+ uint16_t absolut;
const Entry *entry;
int temp;
diff --git a/src/devices/cpu/lh5801/5801tbl.hxx b/src/devices/cpu/lh5801/5801tbl.hxx
index 98a8d7b1d02..4e48c8c9092 100644
--- a/src/devices/cpu/lh5801/5801tbl.hxx
+++ b/src/devices/cpu/lh5801/5801tbl.hxx
@@ -6,7 +6,7 @@
(decrement, compare the same)
(like in the m6502 processors)
*/
-UINT8 lh5801_cpu_device::lh5801_add_generic(int left, int right, int carry)
+uint8_t lh5801_cpu_device::lh5801_add_generic(int left, int right, int carry)
{
int res=left+right+carry;
int v,c;
@@ -23,21 +23,21 @@ UINT8 lh5801_cpu_device::lh5801_add_generic(int left, int right, int carry)
return res;
}
-UINT16 lh5801_cpu_device::lh5801_readop_word()
+uint16_t lh5801_cpu_device::lh5801_readop_word()
{
- UINT16 r;
+ uint16_t r;
r=m_direct->read_byte(P++)<<8;
r|=m_direct->read_byte(P++);
return r;
}
-void lh5801_cpu_device::lh5801_adc(UINT8 data)
+void lh5801_cpu_device::lh5801_adc(uint8_t data)
{
m_a=lh5801_add_generic(m_a,data,m_t&C);
}
-void lh5801_cpu_device::lh5801_add_mem(address_space &space, int addr, UINT8 data)
+void lh5801_cpu_device::lh5801_add_mem(address_space &space, int addr, uint8_t data)
{
int v=lh5801_add_generic(space.read_byte(addr),data,0);
space.write_byte(addr,v);
@@ -51,20 +51,20 @@ void lh5801_cpu_device::lh5801_adr(PAIR *reg)
}
}
-void lh5801_cpu_device::lh5801_sbc(UINT8 data)
+void lh5801_cpu_device::lh5801_sbc(uint8_t data)
{
m_a=lh5801_add_generic(m_a,data^0xff,m_t&C);
}
-void lh5801_cpu_device::lh5801_cpa(UINT8 a, UINT8 b)
+void lh5801_cpu_device::lh5801_cpa(uint8_t a, uint8_t b)
{
lh5801_add_generic(a, b^0xff, 1);
}
-UINT8 lh5801_cpu_device::lh5801_decimaladd_generic(int left, int right, int carry)
+uint8_t lh5801_cpu_device::lh5801_decimaladd_generic(int left, int right, int carry)
{
int res=lh5801_add_generic(left, right, carry);
- UINT8 da;
+ uint8_t da;
//DA values taken from official documentation
if (!(m_t&C) && !(m_t&H))
@@ -79,25 +79,25 @@ UINT8 lh5801_cpu_device::lh5801_decimaladd_generic(int left, int right, int carr
return res + da;
}
-void lh5801_cpu_device::lh5801_dca(UINT8 data)
+void lh5801_cpu_device::lh5801_dca(uint8_t data)
{
m_a += 0x66; //taken from official documentation
m_a=lh5801_decimaladd_generic(m_a, data, m_t&C);
}
-void lh5801_cpu_device::lh5801_dcs(UINT8 data)
+void lh5801_cpu_device::lh5801_dcs(uint8_t data)
{
m_a=lh5801_decimaladd_generic(m_a, data^0xff, m_t&C);
}
-void lh5801_cpu_device::lh5801_and(UINT8 data)
+void lh5801_cpu_device::lh5801_and(uint8_t data)
{
m_a&=data;
m_t&=~Z;
if (!m_a) m_t|=Z;
}
-void lh5801_cpu_device::lh5801_and_mem(address_space &space, int addr, UINT8 data)
+void lh5801_cpu_device::lh5801_and_mem(address_space &space, int addr, uint8_t data)
{
data&=space.read_byte(addr);
m_t&=~Z;
@@ -105,27 +105,27 @@ void lh5801_cpu_device::lh5801_and_mem(address_space &space, int addr, UINT8 dat
space.write_byte(addr,data);
}
-void lh5801_cpu_device::lh5801_bit(UINT8 a, UINT8 b)
+void lh5801_cpu_device::lh5801_bit(uint8_t a, uint8_t b)
{
m_t&=~Z;
if (!(a&b)) m_t|=Z;
}
-void lh5801_cpu_device::lh5801_eor(UINT8 data)
+void lh5801_cpu_device::lh5801_eor(uint8_t data)
{
m_a^=data;
m_t&=~Z;
if (!m_a) m_t|=Z;
}
-void lh5801_cpu_device::lh5801_ora(UINT8 data)
+void lh5801_cpu_device::lh5801_ora(uint8_t data)
{
m_a|=data;
m_t&=~Z;
if (!m_a) m_t|=Z;
}
-void lh5801_cpu_device::lh5801_ora_mem(address_space &space, int addr, UINT8 data)
+void lh5801_cpu_device::lh5801_ora_mem(address_space &space, int addr, uint8_t data)
{
data|=space.read_byte(addr);
m_t&=~Z;
@@ -133,7 +133,7 @@ void lh5801_cpu_device::lh5801_ora_mem(address_space &space, int addr, UINT8 dat
space.write_byte(addr,data);
}
-void lh5801_cpu_device::lh5801_lda(UINT8 data)
+void lh5801_cpu_device::lh5801_lda(uint8_t data)
{
m_a=data;
m_t&=~Z;
@@ -166,12 +166,12 @@ void lh5801_cpu_device::lh5801_sin(PAIR *reg)
m_program->write_byte(reg->w.l++, m_a);
}
-void lh5801_cpu_device::lh5801_dec(UINT8 *adr)
+void lh5801_cpu_device::lh5801_dec(uint8_t *adr)
{
*adr=lh5801_add_generic(*adr,0xff,0);
}
-void lh5801_cpu_device::lh5801_inc(UINT8 *adr)
+void lh5801_cpu_device::lh5801_inc(uint8_t *adr)
{
*adr=lh5801_add_generic(*adr,1,0);
}
@@ -203,25 +203,25 @@ void lh5801_cpu_device::lh5801_rti()
m_t=m_program->read_byte(++S);
}
-void lh5801_cpu_device::lh5801_push(UINT8 data)
+void lh5801_cpu_device::lh5801_push(uint8_t data)
{
m_program->write_byte(S--, data);
}
-void lh5801_cpu_device::lh5801_push_word(UINT16 data)
+void lh5801_cpu_device::lh5801_push_word(uint16_t data)
{
m_program->write_byte(S--, data&0xff);
m_program->write_byte(S--, data>>8);
}
-void lh5801_cpu_device::lh5801_jmp(UINT16 adr)
+void lh5801_cpu_device::lh5801_jmp(uint16_t adr)
{
P=adr;
}
void lh5801_cpu_device::lh5801_branch_plus(int doit)
{
- UINT8 t=m_direct->read_byte(P++);
+ uint8_t t=m_direct->read_byte(P++);
if (doit) {
m_icount-=3;
P+=t;
@@ -230,7 +230,7 @@ void lh5801_cpu_device::lh5801_branch_plus(int doit)
void lh5801_cpu_device::lh5801_branch_minus(int doit)
{
- UINT8 t=m_direct->read_byte(P++);
+ uint8_t t=m_direct->read_byte(P++);
if (doit) {
m_icount-=3;
P-=t;
@@ -239,7 +239,7 @@ void lh5801_cpu_device::lh5801_branch_minus(int doit)
void lh5801_cpu_device::lh5801_lop()
{
- UINT8 t=m_direct->read_byte(P++);
+ uint8_t t=m_direct->read_byte(P++);
m_icount-=8;
if (UL--) {
m_icount-=3;
@@ -249,7 +249,7 @@ void lh5801_cpu_device::lh5801_lop()
void lh5801_cpu_device::lh5801_sjp()
{
- UINT16 n=lh5801_readop_word();
+ uint16_t n=lh5801_readop_word();
lh5801_push_word(P);
P=n;
}
@@ -267,14 +267,14 @@ void lh5801_cpu_device::lh5801_vector(int doit, int nr)
void lh5801_cpu_device::lh5801_aex()
{
- UINT8 t=m_a;
+ uint8_t t=m_a;
m_a=(t<<4)|(t>>4);
// flags?
}
void lh5801_cpu_device::lh5801_drl(address_space &space, int adr)
{
- UINT16 t=m_a|(space.read_byte(adr)<<8);
+ uint16_t t=m_a|(space.read_byte(adr)<<8);
m_a=t>>8;
space.write_byte(adr,t>>4);
@@ -282,7 +282,7 @@ void lh5801_cpu_device::lh5801_drl(address_space &space, int adr)
void lh5801_cpu_device::lh5801_drr(address_space &space, int adr)
{
- UINT16 t=space.read_byte(adr)|(m_a<<8);
+ uint16_t t=space.read_byte(adr)|(m_a<<8);
m_a=t;
space.write_byte(adr,t>>4);
diff --git a/src/devices/cpu/lh5801/lh5801.cpp b/src/devices/cpu/lh5801/lh5801.cpp
index 072dbf932a5..67a09e2ae51 100644
--- a/src/devices/cpu/lh5801/lh5801.cpp
+++ b/src/devices/cpu/lh5801/lh5801.cpp
@@ -65,7 +65,7 @@ enum
const device_type LH5801 = &device_creator<lh5801_cpu_device>;
-lh5801_cpu_device::lh5801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+lh5801_cpu_device::lh5801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, LH5801, "LH5801", tag, owner, clock, "lh5801", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
@@ -248,7 +248,7 @@ void lh5801_cpu_device::execute_set_input(int irqline, int state)
}
}
-offs_t lh5801_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t lh5801_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( lh5801 );
return CPU_DISASSEMBLE_NAME(lh5801)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/lh5801/lh5801.h b/src/devices/cpu/lh5801/lh5801.h
index fe6f3c44f63..6df2bb06a37 100644
--- a/src/devices/cpu/lh5801/lh5801.h
+++ b/src/devices/cpu/lh5801/lh5801.h
@@ -68,7 +68,7 @@ class lh5801_cpu_device : public cpu_device
{
public:
// construction/destruction
- lh5801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ lh5801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_in_func(device_t &device, _Object object) { return downcast<lh5801_cpu_device &>(device).m_in_func.set_callback(object); }
@@ -79,10 +79,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 2; }
- virtual UINT32 execute_max_cycles() const override { return 19; }
- virtual UINT32 execute_input_lines() const override { return 2; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 19; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -93,9 +93,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 5; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 5; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -114,18 +114,18 @@ private:
PAIR m_y;
int m_tm; //9 bit
- UINT8 m_t, m_a;
+ uint8_t m_t, m_a;
int m_bf;
int m_dp;
int m_pu;
int m_pv;
- UINT16 m_oldpc;
+ uint16_t m_oldpc;
int m_irq_state;
- UINT8 m_ir_flipflop[3]; //interrupt request flipflop: IR0, IR1, IR2
+ uint8_t m_ir_flipflop[3]; //interrupt request flipflop: IR0, IR1, IR2
int m_lines_status[2]; //MI and NMI lines status
int m_idle;
@@ -134,36 +134,36 @@ private:
void check_irq();
void lh5801_instruction_fd();
void lh5801_instruction();
- UINT8 lh5801_add_generic(int left, int right, int carry);
- UINT16 lh5801_readop_word();
- void lh5801_adc(UINT8 data);
- void lh5801_add_mem(address_space &space, int addr, UINT8 data);
+ uint8_t lh5801_add_generic(int left, int right, int carry);
+ uint16_t lh5801_readop_word();
+ void lh5801_adc(uint8_t data);
+ void lh5801_add_mem(address_space &space, int addr, uint8_t data);
void lh5801_adr(PAIR *reg);
- void lh5801_sbc(UINT8 data);
- void lh5801_cpa(UINT8 a, UINT8 b);
- UINT8 lh5801_decimaladd_generic(int left, int right, int carry);
- void lh5801_dca(UINT8 data);
- void lh5801_dcs(UINT8 data);
- void lh5801_and(UINT8 data);
- void lh5801_and_mem(address_space &space, int addr, UINT8 data);
- void lh5801_bit(UINT8 a, UINT8 b);
- void lh5801_eor(UINT8 data);
- void lh5801_ora(UINT8 data);
- void lh5801_ora_mem(address_space &space, int addr, UINT8 data);
- void lh5801_lda(UINT8 data);
+ void lh5801_sbc(uint8_t data);
+ void lh5801_cpa(uint8_t a, uint8_t b);
+ uint8_t lh5801_decimaladd_generic(int left, int right, int carry);
+ void lh5801_dca(uint8_t data);
+ void lh5801_dcs(uint8_t data);
+ void lh5801_and(uint8_t data);
+ void lh5801_and_mem(address_space &space, int addr, uint8_t data);
+ void lh5801_bit(uint8_t a, uint8_t b);
+ void lh5801_eor(uint8_t data);
+ void lh5801_ora(uint8_t data);
+ void lh5801_ora_mem(address_space &space, int addr, uint8_t data);
+ void lh5801_lda(uint8_t data);
void lh5801_lde(PAIR *reg);
void lh5801_sde(PAIR *reg);
void lh5801_lin(PAIR *reg);
void lh5801_sin(PAIR *reg);
- void lh5801_dec(UINT8 *adr);
- void lh5801_inc(UINT8 *adr);
+ void lh5801_dec(uint8_t *adr);
+ void lh5801_inc(uint8_t *adr);
void lh5801_pop();
void lh5801_pop_word(PAIR *reg);
void lh5801_rtn();
void lh5801_rti();
- void lh5801_push(UINT8 data);
- void lh5801_push_word(UINT16 data);
- void lh5801_jmp(UINT16 adr);
+ void lh5801_push(uint8_t data);
+ void lh5801_push_word(uint16_t data);
+ void lh5801_jmp(uint16_t adr);
void lh5801_branch_plus(int doit);
void lh5801_branch_minus(int doit);
void lh5801_lop();
diff --git a/src/devices/cpu/lr35902/lr35902.cpp b/src/devices/cpu/lr35902/lr35902.cpp
index d86c490179f..d5fcb710c46 100644
--- a/src/devices/cpu/lr35902/lr35902.cpp
+++ b/src/devices/cpu/lr35902/lr35902.cpp
@@ -63,7 +63,7 @@ enum lr35902_flag
const device_type LR35902 = &device_creator<lr35902_cpu_device>;
-lr35902_cpu_device::lr35902_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+lr35902_cpu_device::lr35902_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, LR35902, "LR35902", tag, owner, clock, "lr35902", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
, m_A(0)
@@ -91,37 +91,37 @@ lr35902_cpu_device::lr35902_cpu_device(const machine_config &mconfig, const char
/* Memory functions */
/****************************************************************************/
-inline void lr35902_cpu_device::cycles_passed(UINT8 cycles)
+inline void lr35902_cpu_device::cycles_passed(uint8_t cycles)
{
m_icount -= cycles / m_gb_speed;
m_timer_func( cycles );
}
-inline UINT8 lr35902_cpu_device::mem_read_byte( UINT16 addr )
+inline uint8_t lr35902_cpu_device::mem_read_byte( uint16_t addr )
{
- UINT8 data = m_program->read_byte( addr );
+ uint8_t data = m_program->read_byte( addr );
cycles_passed( 4 );
return data;
}
-inline void lr35902_cpu_device::mem_write_byte( UINT16 addr, UINT8 data )
+inline void lr35902_cpu_device::mem_write_byte( uint16_t addr, uint8_t data )
{
m_program->write_byte( addr, data );
cycles_passed( 4 );
}
-inline UINT16 lr35902_cpu_device::mem_read_word( UINT16 addr )
+inline uint16_t lr35902_cpu_device::mem_read_word( uint16_t addr )
{
- UINT16 data = mem_read_byte( addr );
+ uint16_t data = mem_read_byte( addr );
data |= ( mem_read_byte( addr + 1 ) << 8 );
return data;
}
-inline void lr35902_cpu_device::mem_write_word( UINT16 addr, UINT16 data )
+inline void lr35902_cpu_device::mem_write_word( uint16_t addr, uint16_t data )
{
mem_write_byte( addr, data & 0xFF );
mem_write_byte( addr + 1, data >> 8 );
@@ -226,7 +226,7 @@ void lr35902_cpu_device::device_reset()
}
-offs_t lr35902_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t lr35902_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( lr35902 );
return CPU_DISASSEMBLE_NAME(lr35902)(this, buffer, pc, oprom, opram, options);
@@ -235,7 +235,7 @@ offs_t lr35902_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UIN
void lr35902_cpu_device::check_interrupts()
{
- UINT8 irq = m_IE & m_IF;
+ uint8_t irq = m_IE & m_IF;
/* Interrupts should be taken after the first instruction after an EI instruction */
if (m_handle_ei_delay) {
@@ -345,7 +345,7 @@ void lr35902_cpu_device::execute_run()
else
{
if ( m_execution_state ) {
- UINT8 x;
+ uint8_t x;
/* Execute instruction */
switch( m_op ) {
#include "opc_main.hxx"
@@ -391,13 +391,13 @@ void lr35902_cpu_device::execute_set_input( int inptnum, int state )
}
-UINT8 lr35902_cpu_device::get_speed()
+uint8_t lr35902_cpu_device::get_speed()
{
return 0x7E | ( ( m_gb_speed - 1 ) << 7 ) | m_gb_speed_change_pending;
}
-void lr35902_cpu_device::set_speed( UINT8 speed_request )
+void lr35902_cpu_device::set_speed( uint8_t speed_request )
{
m_gb_speed_change_pending = speed_request & 0x01;
}
diff --git a/src/devices/cpu/lr35902/lr35902.h b/src/devices/cpu/lr35902/lr35902.h
index 326247c6ad8..4288eac51dc 100644
--- a/src/devices/cpu/lr35902/lr35902.h
+++ b/src/devices/cpu/lr35902/lr35902.h
@@ -37,23 +37,23 @@ class lr35902_cpu_device : public cpu_device
{
public:
// construction/destruction
- lr35902_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ lr35902_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
// static configuration helpers
template<class _Object> static devcb_base &set_timer_cb(device_t &device, _Object object) { return downcast<lr35902_cpu_device &>(device).m_timer_func.set_callback(object); }
template<class _Object> static devcb_base &set_incdec16_cb(device_t &device, _Object object) { return downcast<lr35902_cpu_device &>(device).m_incdec16_func.set_callback(object); }
static void set_halt_bug(device_t &device) { downcast<lr35902_cpu_device &>(device).m_has_halt_bug = true; }
- UINT8 get_speed();
- void set_speed(UINT8 speed_request);
+ uint8_t get_speed();
+ void set_speed(uint8_t speed_request);
- inline UINT8 get_ie() { return m_IE; }
- inline void set_ie(UINT8 data) { m_IE = data; }
+ inline uint8_t get_ie() { return m_IE; }
+ inline void set_ie(uint8_t data) { m_IE = data; }
- inline UINT8 get_if() { return m_IF; }
- inline void set_if(UINT8 data) { m_IF = data; }
+ inline uint8_t get_if() { return m_IF; }
+ inline void set_if(uint8_t data) { m_IF = data; }
- inline void dma_cycles_to_burn(UINT16 cycles_to_burn) { m_dma_cycles_to_burn += cycles_to_burn; }
+ inline void dma_cycles_to_burn(uint16_t cycles_to_burn) { m_dma_cycles_to_burn += cycles_to_burn; }
// Needed for some gameboy operation which needs to read the results
// of setting an input during the currently running timeslice.
@@ -77,9 +77,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 16; }
- virtual UINT32 execute_input_lines() const override { return 5; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 16; }
+ virtual uint32_t execute_input_lines() const override { return 5; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -89,34 +89,34 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
-
- inline void cycles_passed(UINT8 cycles);
- inline UINT8 mem_read_byte(UINT16 addr);
- inline void mem_write_byte(UINT16 addr, UINT8 data);
- inline UINT16 mem_read_word(UINT16 addr);
- inline void mem_write_word(UINT16 addr, UINT16 data);
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
+
+ inline void cycles_passed(uint8_t cycles);
+ inline uint8_t mem_read_byte(uint16_t addr);
+ inline void mem_write_byte(uint16_t addr, uint8_t data);
+ inline uint16_t mem_read_word(uint16_t addr);
+ inline void mem_write_word(uint16_t addr, uint16_t data);
inline void check_interrupts();
address_space_config m_program_config;
- UINT8 m_A;
- UINT8 m_F;
- UINT8 m_B;
- UINT8 m_C;
- UINT8 m_D;
- UINT8 m_E;
- UINT8 m_H;
- UINT8 m_L;
+ uint8_t m_A;
+ uint8_t m_F;
+ uint8_t m_B;
+ uint8_t m_C;
+ uint8_t m_D;
+ uint8_t m_E;
+ uint8_t m_H;
+ uint8_t m_L;
- UINT16 m_SP;
- UINT16 m_PC;
+ uint16_t m_SP;
+ uint16_t m_PC;
/* Interrupt related */
- UINT8 m_IE;
- UINT8 m_IF;
+ uint8_t m_IE;
+ uint8_t m_IF;
int m_irq_state;
bool m_handle_ei_delay;
lr35902_cpu_device *m_device;
@@ -125,14 +125,14 @@ protected:
/* Fetch & execute related */
int m_execution_state;
- UINT8 m_op;
+ uint8_t m_op;
/* Others */
int m_gb_speed;
int m_gb_speed_change_pending;
int m_enable;
bool m_has_halt_bug;
- UINT32 m_dma_cycles_to_burn;
+ uint32_t m_dma_cycles_to_burn;
bool m_entering_halt;
/* Callbacks */
diff --git a/src/devices/cpu/lr35902/lr35902d.cpp b/src/devices/cpu/lr35902/lr35902d.cpp
index a41b789eddd..09ee836c287 100644
--- a/src/devices/cpu/lr35902/lr35902d.cpp
+++ b/src/devices/cpu/lr35902/lr35902d.cpp
@@ -36,7 +36,7 @@ static const char *const s_mnemonic[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] = {
+static const uint32_t s_flags[] = {
0 ,0 ,0 ,0 ,_OVER,0 ,0 ,
0 ,0 ,0 ,0 ,0 ,0 ,_OVER,
0 ,0 ,0 ,0 ,0 ,0 ,0 ,
@@ -48,7 +48,7 @@ static const UINT32 s_flags[] = {
struct lr35902dasm
{
- UINT8 mnemonic;
+ uint8_t mnemonic;
const char *arguments;
};
@@ -195,9 +195,9 @@ CPU_DISASSEMBLE( lr35902 )
const lr35902dasm *d;
const char /* *symbol,*/ *src;
char *dst;
- INT8 offset;
- UINT8 op, op1;
- UINT16 ea;
+ int8_t offset;
+ uint8_t op, op1;
+ uint16_t ea;
int pos = 0;
dst = buffer;
@@ -251,7 +251,7 @@ CPU_DISASSEMBLE( lr35902 )
dst += sprintf( dst, "$%04X", ea );
break;
case 'O': /* Offset relative to PC */
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
dst += sprintf( dst, "$%04X", pc + offset + 2 );
break;
case 'V': /* Restart vector */
diff --git a/src/devices/cpu/lr35902/opc_cb.hxx b/src/devices/cpu/lr35902/opc_cb.hxx
index 19470be9f3c..3677450bc59 100644
--- a/src/devices/cpu/lr35902/opc_cb.hxx
+++ b/src/devices/cpu/lr35902/opc_cb.hxx
@@ -2,8 +2,8 @@
// copyright-holders:Wilbert Pol
#define RLC_8BIT(x) \
{ \
- UINT8 f; \
- (x)=(UINT8)(((x)<<1)|((x)>>7)); \
+ uint8_t f; \
+ (x)=(uint8_t)(((x)<<1)|((x)>>7)); \
if( (x)&1 ) \
f=FLAG_C; \
else \
@@ -15,9 +15,9 @@
#define RL_8BIT(x) \
{ \
- UINT8 r; \
+ uint8_t r; \
r=((x)&0x80)?FLAG_C:0; \
- (x)=(UINT8)(((x)<<1)|((m_F&FLAG_C)?1:0)); \
+ (x)=(uint8_t)(((x)<<1)|((m_F&FLAG_C)?1:0)); \
if( (x)==0 ) \
r|=FLAG_Z; \
m_F=r; \
@@ -25,8 +25,8 @@
#define RRC_8BIT(x) \
{ \
- UINT8 f; \
- (x)=(UINT8)(((x)>>1)|((x)<<7)); \
+ uint8_t f; \
+ (x)=(uint8_t)(((x)>>1)|((x)<<7)); \
if( (x)&0x80 ) \
f=FLAG_C; \
else \
@@ -38,9 +38,9 @@
#define RR_8BIT(x) \
{ \
- UINT8 r; \
+ uint8_t r; \
r=((x)&1)?FLAG_C:0; \
- (x)=(UINT8)(((x)>>1)|((m_F&FLAG_C)?0x80:0)); \
+ (x)=(uint8_t)(((x)>>1)|((m_F&FLAG_C)?0x80:0)); \
if( (x)==0 ) \
r|=FLAG_Z; \
m_F=r; \
@@ -48,7 +48,7 @@
#define SLA_8BIT(x) \
{ \
- UINT8 f; \
+ uint8_t f; \
if( (x)&0x80 ) \
f=FLAG_C; \
else \
@@ -61,19 +61,19 @@
#define SRA_8BIT(x) \
{ \
- UINT8 f; \
+ uint8_t f; \
if( (x)&1 ) \
f=FLAG_C; \
else \
f=0; \
- (x)=(UINT8)(((char)(x))>>1); \
+ (x)=(uint8_t)(((char)(x))>>1); \
if( (x)==0 ) \
f|=FLAG_Z; \
m_F=f; \
}
#define SWAP_8BIT(x) \
- (x)=(UINT8)(((x)>>4)|((x)<<4)); \
+ (x)=(uint8_t)(((x)>>4)|((x)<<4)); \
if( (x)==0 ) \
m_F=FLAG_Z; \
else \
@@ -82,7 +82,7 @@
#define SRL_8BIT(x) \
{ \
- UINT8 f; \
+ uint8_t f; \
if( (x)&1 ) \
f=FLAG_C; \
else \
@@ -95,9 +95,9 @@
#define BIT_8BIT(n,x) \
if( (x)&(1<<(n)) ) \
- m_F=(UINT8)(FLAG_H|(m_F&FLAG_C)); \
+ m_F=(uint8_t)(FLAG_H|(m_F&FLAG_C)); \
else \
- m_F=(UINT8)(FLAG_Z|FLAG_H|(m_F&FLAG_C));
+ m_F=(uint8_t)(FLAG_Z|FLAG_H|(m_F&FLAG_C));
#define RES_8BIT(n,x) (x)&=~(1<<(n));
@@ -138,7 +138,7 @@ case 0x05:
case 0x06:
/* RLC (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr );
RLC_8BIT (x)
@@ -183,7 +183,7 @@ case 0x0D:
case 0x0E:
/* RRC (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RRC_8BIT (x)
@@ -228,7 +228,7 @@ case 0x15:
case 0x16:
/* RL (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RL_8BIT (x)
@@ -273,7 +273,7 @@ case 0x1D:
case 0x1E:
/* RR (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RR_8BIT (x)
@@ -318,7 +318,7 @@ case 0x25:
case 0x26:
/* SLA (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SLA_8BIT (x)
@@ -363,7 +363,7 @@ case 0x2D:
case 0x2E:
/* SRA (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SRA_8BIT (x)
@@ -408,7 +408,7 @@ case 0x35:
case 0x36:
/* SWAP (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SWAP_8BIT (x)
@@ -453,7 +453,7 @@ case 0x3D:
case 0x3E:
/* SRL (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SRL_8BIT (x)
@@ -498,7 +498,7 @@ case 0x45:
case 0x46:
/* BIT 0,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
BIT_8BIT (0, x)
@@ -542,7 +542,7 @@ case 0x4D:
case 0x4E:
/* BIT 1,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
BIT_8BIT (1, x)
@@ -586,7 +586,7 @@ case 0x55:
case 0x56:
/* BIT 2,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
BIT_8BIT (2, x)
@@ -630,7 +630,7 @@ case 0x5D:
case 0x5E:
/* BIT 3,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
BIT_8BIT (3, x)
@@ -674,7 +674,7 @@ case 0x65:
case 0x66:
/* BIT 4,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
BIT_8BIT (4, x)
@@ -718,7 +718,7 @@ case 0x6D:
case 0x6E:
/* BIT 5,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
BIT_8BIT (5, x)
@@ -762,7 +762,7 @@ case 0x75:
case 0x76:
/* BIT 6,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
BIT_8BIT (6, x)
@@ -806,7 +806,7 @@ case 0x7D:
case 0x7E:
/* BIT 7,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
BIT_8BIT (7, x)
@@ -850,7 +850,7 @@ case 0x85:
case 0x86:
/* RES 0,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RES_8BIT (0, x)
@@ -895,7 +895,7 @@ case 0x8D:
case 0x8E:
/* RES 1,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RES_8BIT (1, x)
@@ -940,7 +940,7 @@ case 0x95:
case 0x96:
/* RES 2,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RES_8BIT (2, x)
@@ -985,7 +985,7 @@ case 0x9D:
case 0x9E:
/* RES 3,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RES_8BIT (3, x)
@@ -1030,7 +1030,7 @@ case 0xA5:
case 0xA6:
/* RES 4,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RES_8BIT (4, x)
@@ -1075,7 +1075,7 @@ case 0xAD:
case 0xAE:
/* RES 5,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RES_8BIT (5, x)
@@ -1120,7 +1120,7 @@ case 0xB5:
case 0xB6:
/* RES 6,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RES_8BIT (6, x)
@@ -1165,7 +1165,7 @@ case 0xBD:
case 0xBE:
/* RES 7,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
RES_8BIT (7, x)
@@ -1210,7 +1210,7 @@ case 0xC5:
case 0xC6:
/* SET 0,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SET_8BIT (0, x)
@@ -1255,7 +1255,7 @@ case 0xCD:
case 0xCE:
/* SET 1,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SET_8BIT (1, x)
@@ -1300,7 +1300,7 @@ case 0xD5:
case 0xD6:
/* SET 2,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SET_8BIT (2, x)
@@ -1345,7 +1345,7 @@ case 0xDD:
case 0xDE:
/* SET 3,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SET_8BIT (3, x)
@@ -1390,7 +1390,7 @@ case 0xE5:
case 0xE6:
/* SET 4,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SET_8BIT (4, x)
@@ -1435,7 +1435,7 @@ case 0xED:
case 0xEE:
/* SET 5,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SET_8BIT (5, x)
@@ -1480,7 +1480,7 @@ case 0xF5:
case 0xF6:
/* SET 6,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SET_8BIT (6, x)
@@ -1525,7 +1525,7 @@ case 0xFD:
case 0xFE:
/* SET 7,(HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
+ uint16_t addr = ( m_H << 8 ) | m_L;
x = mem_read_byte( addr);
SET_8BIT (7, x)
diff --git a/src/devices/cpu/lr35902/opc_main.hxx b/src/devices/cpu/lr35902/opc_main.hxx
index 029ba822427..e86a48992e8 100644
--- a/src/devices/cpu/lr35902/opc_main.hxx
+++ b/src/devices/cpu/lr35902/opc_main.hxx
@@ -2,10 +2,10 @@
// copyright-holders:Wilbert Pol
#define INC_8BIT(x) \
{ \
- UINT8 r,f; \
+ uint8_t r,f; \
x++; \
r=(x); \
- f=(UINT8)(m_F&FLAG_C); \
+ f=(uint8_t)(m_F&FLAG_C); \
if( r==0 ) f|=FLAG_Z; \
if( (r&0xF)==0 ) f|=FLAG_H; \
m_F=f; \
@@ -13,10 +13,10 @@
#define DEC_8BIT(x) \
{ \
- UINT8 r,f; \
+ uint8_t r,f; \
x--; \
r=(x); \
- f=(UINT8)((m_F&FLAG_C)|FLAG_N); \
+ f=(uint8_t)((m_F&FLAG_C)|FLAG_N); \
if( r==0 ) f|=FLAG_Z; \
if( (r&0xF)==0xF ) f|=FLAG_H; \
m_F=f; \
@@ -24,25 +24,25 @@
#define INC_16BIT(x,y) \
{ \
- UINT16 r = x << 8 | y; \
+ uint16_t r = x << 8 | y; \
if (++y == 0) x++; \
m_incdec16_func(r << 16 | x << 8 | y); \
}
#define DEC_16BIT(x,y) \
{ \
- UINT16 r = x << 8 | y; \
+ uint16_t r = x << 8 | y; \
if (--y == 0xff) x--; \
m_incdec16_func(r << 16 | x << 8 | y); \
}
#define ADD_HL_RR(x) \
{ \
- UINT32 r1,r2; \
- UINT8 f; \
+ uint32_t r1,r2; \
+ uint8_t f; \
r1=((m_H<<8)|m_L)+(x); \
r2=(((m_H<<8)|m_L)&0xFFF)+((x)&0xFFF); \
- f=(UINT8)(m_F&FLAG_Z); \
+ f=(uint8_t)(m_F&FLAG_Z); \
if( r1>0xFFFF ) f|=FLAG_C; \
if( r2>0x0FFF ) f|=FLAG_H; \
m_L = r1; \
@@ -52,12 +52,12 @@
#define ADD_A_X(x) \
{ \
- UINT16 r1,r2; \
- UINT8 f; \
- r1=(UINT16)((m_A&0xF)+((x)&0xF)); \
- r2=(UINT16)(m_A+(x)); \
- m_A=(UINT8)r2; \
- if( ((UINT8)r2)==0 ) f=FLAG_Z; \
+ uint16_t r1,r2; \
+ uint8_t f; \
+ r1=(uint16_t)((m_A&0xF)+((x)&0xF)); \
+ r2=(uint16_t)(m_A+(x)); \
+ m_A=(uint8_t)r2; \
+ if( ((uint8_t)r2)==0 ) f=FLAG_Z; \
else f=0; \
if( r2>0xFF ) f|=FLAG_C; \
if( r1>0xF ) f|=FLAG_H; \
@@ -66,12 +66,12 @@
#define SUB_A_X(x) \
{ \
- UINT16 r1,r2; \
- UINT8 f; \
- r1=(UINT16)((m_A&0xF)-((x)&0xF)); \
- r2=(UINT16)(m_A-(x)); \
- m_A=(UINT8)r2; \
- if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
+ uint16_t r1,r2; \
+ uint8_t f; \
+ r1=(uint16_t)((m_A&0xF)-((x)&0xF)); \
+ r2=(uint16_t)(m_A-(x)); \
+ m_A=(uint8_t)r2; \
+ if( ((uint8_t)r2)==0 ) f=FLAG_N|FLAG_Z; \
else f=FLAG_N; \
if( r2>0xFF ) f|=FLAG_C; \
if( r1>0xF ) f|=FLAG_H; \
@@ -80,11 +80,11 @@
#define CP_A_X(x) \
{ \
- UINT16 r1,r2; \
- UINT8 f; \
- r1=(UINT16)((m_A&0xF)-((x)&0xF)); \
- r2=(UINT16)(m_A-(x)); \
- if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
+ uint16_t r1,r2; \
+ uint8_t f; \
+ r1=(uint16_t)((m_A&0xF)-((x)&0xF)); \
+ r2=(uint16_t)(m_A-(x)); \
+ if( ((uint8_t)r2)==0 ) f=FLAG_N|FLAG_Z; \
else f=FLAG_N; \
if( r2>0xFF ) f|=FLAG_C; \
if( r1>0xF ) f|=FLAG_H; \
@@ -93,12 +93,12 @@
#define SBC_A_X(x) \
{ \
- UINT16 r1,r2; \
- UINT8 f; \
- r1=(UINT16)((m_A&0xF)-((x)&0xF)-((m_F&FLAG_C)?1:0)); \
- r2=(UINT16)(m_A-(x)-((m_F&FLAG_C)?1:0)); \
- m_A=(UINT8)r2; \
- if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
+ uint16_t r1,r2; \
+ uint8_t f; \
+ r1=(uint16_t)((m_A&0xF)-((x)&0xF)-((m_F&FLAG_C)?1:0)); \
+ r2=(uint16_t)(m_A-(x)-((m_F&FLAG_C)?1:0)); \
+ m_A=(uint8_t)r2; \
+ if( ((uint8_t)r2)==0 ) f=FLAG_N|FLAG_Z; \
else f=FLAG_N; \
if( r2>0xFF ) f|=FLAG_C; \
if( r1>0xF ) f|=FLAG_H; \
@@ -107,11 +107,11 @@
#define ADC_A_X(x) \
{ \
- UINT16 r1,r2; \
- UINT8 f; \
- r1=(UINT16)((m_A&0xF)+((x)&0xF)+((m_F&FLAG_C)?1:0)); \
- r2=(UINT16)(m_A+(x)+((m_F&FLAG_C)?1:0)); \
- if( (m_A=(UINT8)r2)==0 ) f=FLAG_Z; \
+ uint16_t r1,r2; \
+ uint8_t f; \
+ r1=(uint16_t)((m_A&0xF)+((x)&0xF)+((m_F&FLAG_C)?1:0)); \
+ r2=(uint16_t)(m_A+(x)+((m_F&FLAG_C)?1:0)); \
+ if( (m_A=(uint8_t)r2)==0 ) f=FLAG_Z; \
else f=0; \
if( r2>0xFF ) f|=FLAG_C; \
if( r1>0xF ) f|=FLAG_H; \
@@ -179,7 +179,7 @@ case 0x06: /* LD B,n8 */
case 0x07: /* RLCA */
- m_A = (UINT8) ((m_A << 1) | (m_A >> 7));
+ m_A = (uint8_t) ((m_A << 1) | (m_A >> 7));
if (m_A & 1)
{
m_F = FLAG_C;
@@ -221,7 +221,7 @@ case 0x0E: /* LD C,n8 */
break;
case 0x0F: /* RRCA */
- m_A = (UINT8) ((m_A >> 1) | (m_A << 7));
+ m_A = (uint8_t) ((m_A >> 1) | (m_A << 7));
m_F = 0;
if (m_A & 0x80)
{
@@ -235,7 +235,7 @@ case 0x10: /* STOP */
{
// Quite a lot of time for a simple input clock change...
// And still not all speedchange related tests are passing.
- UINT32 cycles = ( 2 * 45 + 1 ) * 65536 + 8;
+ uint32_t cycles = ( 2 * 45 + 1 ) * 65536 + 8;
do {
cycles_passed(128);
@@ -274,12 +274,12 @@ case 0x17: /* RLA */
x = (m_A & 0x80) ? FLAG_C : 0;
- m_A = (UINT8) ((m_A << 1) | ((m_F & FLAG_C) ? 1 : 0));
+ m_A = (uint8_t) ((m_A << 1) | ((m_F & FLAG_C) ? 1 : 0));
m_F = x;
break;
case 0x18: /* JR n8 */
{
- INT8 offset;
+ int8_t offset;
offset = mem_read_byte( m_PC++ );
m_PC += offset;
@@ -314,12 +314,12 @@ case 0x1F: /* RRA */
x = (m_A & 1) ? FLAG_C : 0;
- m_A = (UINT8) ((m_A >> 1) | ((m_F & FLAG_C) ? 0x80 : 0));
+ m_A = (uint8_t) ((m_A >> 1) | ((m_F & FLAG_C) ? 0x80 : 0));
m_F = x;
break;
case 0x20: /* JR NZ,n8 */
{
- INT8 offset = mem_read_byte( m_PC++ );
+ int8_t offset = mem_read_byte( m_PC++ );
if (! (m_F & FLAG_Z) )
{
m_PC += offset;
@@ -379,7 +379,7 @@ case 0x27: /* DAA */
break;
case 0x28: /* JR Z,n8 */
{
- INT8 offset = mem_read_byte( m_PC++ );
+ int8_t offset = mem_read_byte( m_PC++ );
if (m_F & FLAG_Z)
{
@@ -419,7 +419,7 @@ case 0x2F: /* CPL */
break;
case 0x30: /* JR NC,n8 */
{
- INT8 offset = mem_read_byte( m_PC++ );
+ int8_t offset = mem_read_byte( m_PC++ );
if ( ! (m_F & FLAG_C) )
{
@@ -443,10 +443,10 @@ case 0x33: /* INC SP */
break;
case 0x34: /* INC (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
- UINT8 r, f;
+ uint16_t addr = ( m_H << 8 ) | m_L;
+ uint8_t r, f;
- f = (UINT8) (m_F & FLAG_C);
+ f = (uint8_t) (m_F & FLAG_C);
r = mem_read_byte( addr );
r += 1;
mem_write_byte( addr, r );
@@ -462,10 +462,10 @@ case 0x34: /* INC (HL) */
break;
case 0x35: /* DEC (HL) */
{
- UINT16 addr = ( m_H << 8 ) | m_L;
- UINT8 r, f;
+ uint16_t addr = ( m_H << 8 ) | m_L;
+ uint8_t r, f;
- f = (UINT8) ((m_F & FLAG_C) | FLAG_N);
+ f = (uint8_t) ((m_F & FLAG_C) | FLAG_N);
r = mem_read_byte( addr );
r -= 1;
mem_write_byte( addr, r );
@@ -481,17 +481,17 @@ case 0x35: /* DEC (HL) */
break;
case 0x36: /* LD (HL),n8 */
{
- UINT8 v = mem_read_byte( m_PC++ );
+ uint8_t v = mem_read_byte( m_PC++ );
mem_write_byte( ( m_H << 8 ) | m_L, v );
}
break;
case 0x37: /* SCF */
- m_F = (UINT8) ((m_F & FLAG_Z) | FLAG_C);
+ m_F = (uint8_t) ((m_F & FLAG_Z) | FLAG_C);
break;
case 0x38: /* JR C,n8 */
{
- INT8 offset = mem_read_byte( m_PC++ );
+ int8_t offset = mem_read_byte( m_PC++ );
if (m_F & FLAG_C)
{
@@ -526,7 +526,7 @@ case 0x3E: /* LD A,n8 */
break;
case 0x3F: /* CCF */
- m_F = (UINT8) ((m_F & FLAG_Z) | ((m_F & FLAG_C) ? 0 : FLAG_C));
+ m_F = (uint8_t) ((m_F & FLAG_Z) | ((m_F & FLAG_C) ? 0 : FLAG_C));
break;
case 0x40: /* LD B,B */
break;
@@ -1055,7 +1055,7 @@ case 0xC1: /* POP BC */
break;
case 0xC2: /* JP NZ,n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
if ( ! (m_F & FLAG_Z) )
@@ -1071,7 +1071,7 @@ case 0xC3: /* JP n16 */
break;
case 0xC4: /* CALL NZ,n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
if ( ! (m_F & FLAG_Z) )
@@ -1115,7 +1115,7 @@ case 0xC9: /* RET */
break;
case 0xCA: /* JP Z,n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
if (m_F & FLAG_Z)
@@ -1134,7 +1134,7 @@ case 0xCB: /* PREFIX! */
break;
case 0xCC: /* CALL Z,n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
if (m_F & FLAG_Z)
@@ -1148,7 +1148,7 @@ case 0xCC: /* CALL Z,n16 */
break;
case 0xCD: /* CALL n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
// Internal delay
@@ -1183,7 +1183,7 @@ case 0xD1: /* POP DE */
break;
case 0xD2: /* JP NC,n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
if ( ! (m_F & FLAG_C) )
@@ -1195,7 +1195,7 @@ case 0xD2: /* JP NC,n16 */
break;
case 0xD4: /* CALL NC,n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
if ( ! (m_F & FLAG_C) )
@@ -1240,7 +1240,7 @@ case 0xD9: /* RETI */
break;
case 0xDA: /* JP C,n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
if (m_F & FLAG_C)
@@ -1252,7 +1252,7 @@ case 0xDA: /* JP C,n16 */
break;
case 0xDC: /* CALL C,n16 */
{
- UINT16 addr = mem_read_word( m_PC );
+ uint16_t addr = mem_read_word( m_PC );
m_PC += 2;
if (m_F & FLAG_C)
@@ -1277,7 +1277,7 @@ case 0xDF: /* RST $18 */
break;
case 0xE0: /* LD ($FF00+n8),A */
{
- UINT8 v = mem_read_byte( m_PC++ );
+ uint8_t v = mem_read_byte( m_PC++ );
mem_write_byte( 0xFF00 + v, m_A );
}
break;
@@ -1313,11 +1313,11 @@ case 0xE8: /* ADD SP,n8 */
*/
{
- INT32 n;
+ int32_t n;
- n = (INT8) mem_read_byte( m_PC++ );
+ n = (int8_t) mem_read_byte( m_PC++ );
- if ( ( m_SP & 0xFF ) + (UINT8)(n & 0xFF) > 0xFF )
+ if ( ( m_SP & 0xFF ) + (uint8_t)(n & 0xFF) > 0xFF )
{
m_F = FLAG_C;
}
@@ -1331,7 +1331,7 @@ case 0xE8: /* ADD SP,n8 */
m_F |= FLAG_H;
}
- m_SP = (UINT16) ( m_SP + n );
+ m_SP = (uint16_t) ( m_SP + n );
}
cycles_passed( 8 );
break;
@@ -1356,7 +1356,7 @@ case 0xEF: /* RST $28 */
break;
case 0xF0: /* LD A,($FF00+n8) */
{
- UINT8 v = mem_read_byte( m_PC++ );
+ uint8_t v = mem_read_byte( m_PC++ );
m_A = mem_read_byte( 0xFF00 + v );
}
break;
@@ -1391,7 +1391,7 @@ case 0xF7: /* RST $30 */
break;
case 0xF8: /* LD HL,SP+n8 */
/*
- * n = one UINT8 signed immediate value.
+ * n = one uint8_t signed immediate value.
* Flags affected:
* Z - Reset.
* N - Reset.
@@ -1401,11 +1401,11 @@ case 0xF8: /* LD HL,SP+n8 */
*/
{
- INT32 n;
+ int32_t n;
- n = (INT8) mem_read_byte( m_PC++ );
+ n = (int8_t) mem_read_byte( m_PC++ );
- if ( ( m_SP & 0xFF ) + (UINT8)(n & 0xFF) > 0xFF )
+ if ( ( m_SP & 0xFF ) + (uint8_t)(n & 0xFF) > 0xFF )
{
m_F = FLAG_C;
}
@@ -1419,7 +1419,7 @@ case 0xF8: /* LD HL,SP+n8 */
m_F |= FLAG_H;
}
- UINT16 res = m_SP + n;
+ uint16_t res = m_SP + n;
m_L = res & 0xFF;
m_H = res >> 8;
diff --git a/src/devices/cpu/m37710/m37710.cpp b/src/devices/cpu/m37710/m37710.cpp
index ffaa7f46f05..ea4356f6a26 100644
--- a/src/devices/cpu/m37710/m37710.cpp
+++ b/src/devices/cpu/m37710/m37710.cpp
@@ -94,7 +94,7 @@ ADDRESS_MAP_END
// many other combinations of RAM and ROM size exist
-m37710_cpu_device::m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate)
+m37710_cpu_device::m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, map_delegate)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
@@ -102,25 +102,25 @@ m37710_cpu_device::m37710_cpu_device(const machine_config &mconfig, device_type
}
-m37702m2_device::m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m37702m2_device::m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m37710_cpu_device(mconfig, M37702M2, "M37702M2", tag, owner, clock, "m37702m2", __FILE__, address_map_delegate(FUNC(m37702m2_device::map), this))
{
}
-m37702m2_device::m37702m2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+m37702m2_device::m37702m2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: m37710_cpu_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(m37702m2_device::map), this))
{
}
-m37702s1_device::m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m37702s1_device::m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m37710_cpu_device(mconfig, M37702S1, "M37702S1", tag, owner, clock, "m37702s1", __FILE__, address_map_delegate(FUNC(m37702s1_device::map), this))
{
}
-m37710s4_device::m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m37710s4_device::m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m37710_cpu_device(mconfig, M37710S4, "M37710S4", tag, owner, clock, "m37710s4", __FILE__, address_map_delegate(FUNC(m37710s4_device::map), this))
{
}
@@ -458,9 +458,9 @@ void m37710_cpu_device::m37710_recalc_timer(int timer)
}
}
-UINT8 m37710_cpu_device::m37710_internal_r(int offset)
+uint8_t m37710_cpu_device::m37710_internal_r(int offset)
{
- UINT8 d;
+ uint8_t d;
#if M37710_DEBUG
if (offset > 1)
@@ -567,11 +567,11 @@ UINT8 m37710_cpu_device::m37710_internal_r(int offset)
return m_m37710_regs[offset];
}
-void m37710_cpu_device::m37710_internal_w(int offset, UINT8 data)
+void m37710_cpu_device::m37710_internal_w(int offset, uint8_t data)
{
int i;
- UINT8 prevdata;
- UINT8 d;
+ uint8_t prevdata;
+ uint8_t d;
#if M37710_DEBUG
if (offset != 0x60) // filter out watchdog
@@ -661,7 +661,7 @@ void m37710_cpu_device::m37710_internal_w(int offset, UINT8 data)
READ16_MEMBER( m37710_cpu_device::m37710_internal_word_r )
{
- UINT16 ret = 0;
+ uint16_t ret = 0;
if (mem_mask & 0x00ff)
ret |= m37710_internal_r(offset*2);
@@ -943,7 +943,7 @@ CPU_DISASSEMBLE( m37710 )
}
-offs_t m37710_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m37710_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return m7700_disassemble(buffer, (pc&0xffff), pc>>16, oprom, FLAG_M, FLAG_X);
}
@@ -1183,7 +1183,7 @@ void m37710_cpu_device::execute_set_input(int inputnum, int state)
}
-void m37710_cpu_device::m37710i_set_execution_mode(UINT32 mode)
+void m37710_cpu_device::m37710i_set_execution_mode(uint32_t mode)
{
m_opcodes = m37710i_opcodes[mode];
m_opcodes42 = m37710i_opcodes2[mode];
@@ -1199,7 +1199,7 @@ void m37710_cpu_device::m37710i_set_execution_mode(UINT32 mode)
/* =============================== INTERRUPTS ============================= */
/* ======================================================================== */
-void m37710_cpu_device::m37710i_interrupt_software(UINT32 vector)
+void m37710_cpu_device::m37710i_interrupt_software(uint32_t vector)
{
CLK(13);
m37710i_push_8(REG_PB>>16);
diff --git a/src/devices/cpu/m37710/m37710.h b/src/devices/cpu/m37710/m37710.h
index e88408e527a..32ec57ee04a 100644
--- a/src/devices/cpu/m37710/m37710.h
+++ b/src/devices/cpu/m37710/m37710.h
@@ -94,7 +94,7 @@ class m37710_cpu_device : public cpu_device
{
public:
// construction/destruction
- m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate);
+ m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate);
DECLARE_READ16_MEMBER( m37710_internal_word_r );
DECLARE_WRITE16_MEMBER( m37710_internal_word_w );
@@ -105,9 +105,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 20; /* rough guess */ }
- virtual UINT32 execute_input_lines() const override { return M37710_LINE_MAX; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 20; /* rough guess */ }
+ virtual uint32_t execute_input_lines() const override { return M37710_LINE_MAX; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -120,71 +120,71 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 6; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 6; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
address_space_config m_io_config;
- UINT32 m_a; /* Accumulator */
- UINT32 m_b; /* holds high byte of accumulator */
- UINT32 m_ba; /* Secondary Accumulator */
- UINT32 m_bb; /* holds high byte of secondary accumulator */
- UINT32 m_x; /* Index Register X */
- UINT32 m_y; /* Index Register Y */
- UINT32 m_xh; /* holds high byte of x */
- UINT32 m_yh; /* holds high byte of y */
- UINT32 m_s; /* Stack Pointer */
- UINT32 m_pc; /* Program Counter */
- UINT32 m_ppc; /* Previous Program Counter */
- UINT32 m_pb; /* Program Bank (shifted left 16) */
- UINT32 m_db; /* Data Bank (shifted left 16) */
- UINT32 m_d; /* Direct Register */
- UINT32 m_flag_e; /* Emulation Mode Flag */
- UINT32 m_flag_m; /* Memory/Accumulator Select Flag */
- UINT32 m_flag_x; /* Index Select Flag */
- UINT32 m_flag_n; /* Negative Flag */
- UINT32 m_flag_v; /* Overflow Flag */
- UINT32 m_flag_d; /* Decimal Mode Flag */
- UINT32 m_flag_i; /* Interrupt Mask Flag */
- UINT32 m_flag_z; /* Zero Flag (inverted) */
- UINT32 m_flag_c; /* Carry Flag */
- UINT32 m_line_irq; /* Bitmask of pending IRQs */
- UINT32 m_ipl; /* Interrupt priority level (top of PSW) */
- UINT32 m_ir; /* Instruction Register */
- UINT32 m_im; /* Immediate load value */
- UINT32 m_im2; /* Immediate load target */
- UINT32 m_im3; /* Immediate load target */
- UINT32 m_im4; /* Immediate load target */
- UINT32 m_irq_delay; /* delay 1 instruction before checking irq */
- UINT32 m_irq_level; /* irq level */
+ uint32_t m_a; /* Accumulator */
+ uint32_t m_b; /* holds high byte of accumulator */
+ uint32_t m_ba; /* Secondary Accumulator */
+ uint32_t m_bb; /* holds high byte of secondary accumulator */
+ uint32_t m_x; /* Index Register X */
+ uint32_t m_y; /* Index Register Y */
+ uint32_t m_xh; /* holds high byte of x */
+ uint32_t m_yh; /* holds high byte of y */
+ uint32_t m_s; /* Stack Pointer */
+ uint32_t m_pc; /* Program Counter */
+ uint32_t m_ppc; /* Previous Program Counter */
+ uint32_t m_pb; /* Program Bank (shifted left 16) */
+ uint32_t m_db; /* Data Bank (shifted left 16) */
+ uint32_t m_d; /* Direct Register */
+ uint32_t m_flag_e; /* Emulation Mode Flag */
+ uint32_t m_flag_m; /* Memory/Accumulator Select Flag */
+ uint32_t m_flag_x; /* Index Select Flag */
+ uint32_t m_flag_n; /* Negative Flag */
+ uint32_t m_flag_v; /* Overflow Flag */
+ uint32_t m_flag_d; /* Decimal Mode Flag */
+ uint32_t m_flag_i; /* Interrupt Mask Flag */
+ uint32_t m_flag_z; /* Zero Flag (inverted) */
+ uint32_t m_flag_c; /* Carry Flag */
+ uint32_t m_line_irq; /* Bitmask of pending IRQs */
+ uint32_t m_ipl; /* Interrupt priority level (top of PSW) */
+ uint32_t m_ir; /* Instruction Register */
+ uint32_t m_im; /* Immediate load value */
+ uint32_t m_im2; /* Immediate load target */
+ uint32_t m_im3; /* Immediate load target */
+ uint32_t m_im4; /* Immediate load target */
+ uint32_t m_irq_delay; /* delay 1 instruction before checking irq */
+ uint32_t m_irq_level; /* irq level */
int m_ICount; /* cycle count */
- UINT32 m_source; /* temp register */
- UINT32 m_destination; /* temp register */
+ uint32_t m_source; /* temp register */
+ uint32_t m_destination; /* temp register */
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
- UINT32 m_stopped; /* Sets how the CPU is stopped */
+ uint32_t m_stopped; /* Sets how the CPU is stopped */
// on-board peripheral stuff
- UINT8 m_m37710_regs[128];
+ uint8_t m_m37710_regs[128];
attotime m_reload[8];
emu_timer *m_timers[8];
// for debugger
- UINT32 m_debugger_pc;
- UINT32 m_debugger_pb;
- UINT32 m_debugger_db;
- UINT32 m_debugger_p;
- UINT32 m_debugger_a;
- UINT32 m_debugger_b;
+ uint32_t m_debugger_pc;
+ uint32_t m_debugger_pb;
+ uint32_t m_debugger_db;
+ uint32_t m_debugger_p;
+ uint32_t m_debugger_a;
+ uint32_t m_debugger_b;
// Statics
typedef void (m37710_cpu_device::*opcode_func)();
- typedef UINT32 (m37710_cpu_device::*get_reg_func)(int regnum);
- typedef void (m37710_cpu_device::*set_reg_func)(int regnum, UINT32 val);
+ typedef uint32_t (m37710_cpu_device::*get_reg_func)(int regnum);
+ typedef void (m37710_cpu_device::*set_reg_func)(int regnum, uint32_t val);
typedef void (m37710_cpu_device::*set_line_func)(int line, int state);
typedef int (m37710_cpu_device::*execute_func)(int cycles);
@@ -221,20 +221,20 @@ private:
execute_func m_execute;
// Implementation
- void m37710i_set_execution_mode(UINT32 mode);
+ void m37710i_set_execution_mode(uint32_t mode);
TIMER_CALLBACK_MEMBER( m37710_timer_cb );
void m37710_external_tick(int timer, int state);
void m37710_recalc_timer(int timer);
- UINT8 m37710_internal_r(int offset);
- void m37710_internal_w(int offset, UINT8 data);
- UINT32 m37710i_get_reg_M0X0(int regnum);
- UINT32 m37710i_get_reg_M0X1(int regnum);
- UINT32 m37710i_get_reg_M1X0(int regnum);
- UINT32 m37710i_get_reg_M1X1(int regnum);
- void m37710i_set_reg_M0X0(int regnum, UINT32 val);
- void m37710i_set_reg_M0X1(int regnum, UINT32 val);
- void m37710i_set_reg_M1X0(int regnum, UINT32 val);
- void m37710i_set_reg_M1X1(int regnum, UINT32 val);
+ uint8_t m37710_internal_r(int offset);
+ void m37710_internal_w(int offset, uint8_t data);
+ uint32_t m37710i_get_reg_M0X0(int regnum);
+ uint32_t m37710i_get_reg_M0X1(int regnum);
+ uint32_t m37710i_get_reg_M1X0(int regnum);
+ uint32_t m37710i_get_reg_M1X1(int regnum);
+ void m37710i_set_reg_M0X0(int regnum, uint32_t val);
+ void m37710i_set_reg_M0X1(int regnum, uint32_t val);
+ void m37710i_set_reg_M1X0(int regnum, uint32_t val);
+ void m37710i_set_reg_M1X1(int regnum, uint32_t val);
void m37710i_set_line_M0X0(int line, int state);
void m37710i_set_line_M0X1(int line, int state);
void m37710i_set_line_M1X0(int line, int state);
@@ -251,61 +251,61 @@ private:
void m37710_set_reg(int regnum, unsigned value);
void m37710_set_irq_line(int line, int state);
void m37710_restore_state();
- UINT32 m37710i_read_8_normal(UINT32 address);
- UINT32 m37710i_read_8_immediate(UINT32 address);
- UINT32 m37710i_read_8_direct(UINT32 address);
- void m37710i_write_8_normal(UINT32 address, UINT32 value);
- void m37710i_write_8_direct(UINT32 address, UINT32 value);
- UINT32 m37710i_read_16_normal(UINT32 address);
- UINT32 m37710i_read_16_immediate(UINT32 address);
- UINT32 m37710i_read_16_direct(UINT32 address);
- void m37710i_write_16_normal(UINT32 address, UINT32 value);
- void m37710i_write_16_direct(UINT32 address, UINT32 value);
- UINT32 m37710i_read_24_normal(UINT32 address);
- UINT32 m37710i_read_24_immediate(UINT32 address);
- UINT32 m37710i_read_24_direct(UINT32 address);
- void m37710i_push_8(UINT32 value);
- UINT32 m37710i_pull_8();
- void m37710i_push_16(UINT32 value);
- UINT32 m37710i_pull_16();
- void m37710i_push_24(UINT32 value);
- UINT32 m37710i_pull_24();
- void m37710i_jump_16(UINT32 address);
- void m37710i_jump_24(UINT32 address);
- void m37710i_branch_8(UINT32 offset);
- void m37710i_branch_16(UINT32 offset);
- UINT32 m37710i_get_reg_p();
- void m37710i_set_reg_ipl(UINT32 value);
- void m37710i_interrupt_software(UINT32 vector);
- void m37710i_set_flag_m0x0(UINT32 value);
- void m37710i_set_flag_m0x1(UINT32 value);
- void m37710i_set_flag_m1x0(UINT32 value);
- void m37710i_set_flag_m1x1(UINT32 value);
- void m37710i_set_reg_p_m0x0(UINT32 value);
- void m37710i_set_reg_p_m0x1(UINT32 value);
- void m37710i_set_reg_p_m1x0(UINT32 value);
- void m37710i_set_reg_p_m1x1(UINT32 value);
- UINT32 EA_IMM8();
- UINT32 EA_IMM16();
- UINT32 EA_IMM24();
- UINT32 EA_D();
- UINT32 EA_A();
- UINT32 EA_AL();
- UINT32 EA_DX();
- UINT32 EA_DY();
- UINT32 EA_AX();
- UINT32 EA_ALX();
- UINT32 EA_AY();
- UINT32 EA_DI();
- UINT32 EA_DLI();
- UINT32 EA_AI();
- UINT32 EA_ALI();
- UINT32 EA_DXI();
- UINT32 EA_DIY();
- UINT32 EA_DLIY();
- UINT32 EA_AXI();
- UINT32 EA_S();
- UINT32 EA_SIY();
+ uint32_t m37710i_read_8_normal(uint32_t address);
+ uint32_t m37710i_read_8_immediate(uint32_t address);
+ uint32_t m37710i_read_8_direct(uint32_t address);
+ void m37710i_write_8_normal(uint32_t address, uint32_t value);
+ void m37710i_write_8_direct(uint32_t address, uint32_t value);
+ uint32_t m37710i_read_16_normal(uint32_t address);
+ uint32_t m37710i_read_16_immediate(uint32_t address);
+ uint32_t m37710i_read_16_direct(uint32_t address);
+ void m37710i_write_16_normal(uint32_t address, uint32_t value);
+ void m37710i_write_16_direct(uint32_t address, uint32_t value);
+ uint32_t m37710i_read_24_normal(uint32_t address);
+ uint32_t m37710i_read_24_immediate(uint32_t address);
+ uint32_t m37710i_read_24_direct(uint32_t address);
+ void m37710i_push_8(uint32_t value);
+ uint32_t m37710i_pull_8();
+ void m37710i_push_16(uint32_t value);
+ uint32_t m37710i_pull_16();
+ void m37710i_push_24(uint32_t value);
+ uint32_t m37710i_pull_24();
+ void m37710i_jump_16(uint32_t address);
+ void m37710i_jump_24(uint32_t address);
+ void m37710i_branch_8(uint32_t offset);
+ void m37710i_branch_16(uint32_t offset);
+ uint32_t m37710i_get_reg_p();
+ void m37710i_set_reg_ipl(uint32_t value);
+ void m37710i_interrupt_software(uint32_t vector);
+ void m37710i_set_flag_m0x0(uint32_t value);
+ void m37710i_set_flag_m0x1(uint32_t value);
+ void m37710i_set_flag_m1x0(uint32_t value);
+ void m37710i_set_flag_m1x1(uint32_t value);
+ void m37710i_set_reg_p_m0x0(uint32_t value);
+ void m37710i_set_reg_p_m0x1(uint32_t value);
+ void m37710i_set_reg_p_m1x0(uint32_t value);
+ void m37710i_set_reg_p_m1x1(uint32_t value);
+ uint32_t EA_IMM8();
+ uint32_t EA_IMM16();
+ uint32_t EA_IMM24();
+ uint32_t EA_D();
+ uint32_t EA_A();
+ uint32_t EA_AL();
+ uint32_t EA_DX();
+ uint32_t EA_DY();
+ uint32_t EA_AX();
+ uint32_t EA_ALX();
+ uint32_t EA_AY();
+ uint32_t EA_DI();
+ uint32_t EA_DLI();
+ uint32_t EA_AI();
+ uint32_t EA_ALI();
+ uint32_t EA_DXI();
+ uint32_t EA_DIY();
+ uint32_t EA_DLIY();
+ uint32_t EA_AXI();
+ uint32_t EA_S();
+ uint32_t EA_SIY();
void m37710i_00_M0X0();
void m37710i_01_M0X0();
void m37710i_02_M0X0();
@@ -2014,7 +2014,7 @@ class m37702s1_device : public m37710_cpu_device
{
public:
// construction/destruction
- m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
DECLARE_ADDRESS_MAP(map, 16);
};
@@ -2023,8 +2023,8 @@ class m37702m2_device : public m37710_cpu_device
{
public:
// construction/destruction
- m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m37702m2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m37702m2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
protected:
DECLARE_ADDRESS_MAP(map, 16);
};
@@ -2033,7 +2033,7 @@ class m37710s4_device : public m37710_cpu_device
{
public:
// construction/destruction
- m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
DECLARE_ADDRESS_MAP(map, 16);
};
diff --git a/src/devices/cpu/m37710/m37710il.h b/src/devices/cpu/m37710/m37710il.h
index eb79f0fddd6..92e3fc6765f 100644
--- a/src/devices/cpu/m37710/m37710il.h
+++ b/src/devices/cpu/m37710/m37710il.h
@@ -10,37 +10,37 @@
/* ================================= MEMORY =============================== */
/* ======================================================================== */
-inline UINT32 m37710_cpu_device::m37710i_read_8_normal(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_8_normal(uint32_t address)
{
return m37710_read_8(address);
}
-inline UINT32 m37710_cpu_device::m37710i_read_8_immediate(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_8_immediate(uint32_t address)
{
return m37710_read_8_immediate(address);
}
-inline UINT32 m37710_cpu_device::m37710i_read_8_direct(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_8_direct(uint32_t address)
{
return m37710_read_8(address);
}
-inline void m37710_cpu_device::m37710i_write_8_normal(UINT32 address, UINT32 value)
+inline void m37710_cpu_device::m37710i_write_8_normal(uint32_t address, uint32_t value)
{
m37710_write_8(address, value);
}
-inline void m37710_cpu_device::m37710i_write_8_direct(UINT32 address, UINT32 value)
+inline void m37710_cpu_device::m37710i_write_8_direct(uint32_t address, uint32_t value)
{
m37710_write_8(address, value);
}
-inline UINT32 m37710_cpu_device::m37710i_read_16_normal(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_16_normal(uint32_t address)
{
return m37710_read_16(address);
}
-inline UINT32 m37710_cpu_device::m37710i_read_16_immediate(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_16_immediate(uint32_t address)
{
if (!WORD_ALIGNED(address))
return m37710_read_8_immediate(address) | (m37710_read_8_immediate(address+1)<<8);
@@ -48,22 +48,22 @@ inline UINT32 m37710_cpu_device::m37710i_read_16_immediate(UINT32 address)
return m37710_read_16_immediate(address);
}
-inline UINT32 m37710_cpu_device::m37710i_read_16_direct(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_16_direct(uint32_t address)
{
return m37710_read_16(address);
}
-inline void m37710_cpu_device::m37710i_write_16_normal(UINT32 address, UINT32 value)
+inline void m37710_cpu_device::m37710i_write_16_normal(uint32_t address, uint32_t value)
{
m37710_write_16(address, value);
}
-inline void m37710_cpu_device::m37710i_write_16_direct(UINT32 address, UINT32 value)
+inline void m37710_cpu_device::m37710i_write_16_direct(uint32_t address, uint32_t value)
{
m37710_write_16(address, value);
}
-inline UINT32 m37710_cpu_device::m37710i_read_24_normal(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_24_normal(uint32_t address)
{
if (!WORD_ALIGNED(address))
return m37710_read_8(address) | (m37710_read_16(address+1)<<8);
@@ -71,7 +71,7 @@ inline UINT32 m37710_cpu_device::m37710i_read_24_normal(UINT32 address)
return m37710_read_16(address) | (m37710_read_8(address+2)<<16);
}
-inline UINT32 m37710_cpu_device::m37710i_read_24_immediate(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_24_immediate(uint32_t address)
{
if (!WORD_ALIGNED(address))
return m37710_read_8_immediate(address) | (m37710_read_16_immediate(address+1)<<8);
@@ -79,7 +79,7 @@ inline UINT32 m37710_cpu_device::m37710i_read_24_immediate(UINT32 address)
return m37710_read_16_immediate(address) | (m37710_read_8_immediate(address+2)<<16);
}
-inline UINT32 m37710_cpu_device::m37710i_read_24_direct(UINT32 address)
+inline uint32_t m37710_cpu_device::m37710i_read_24_direct(uint32_t address)
{
if (!WORD_ALIGNED(address))
return m37710_read_8(address) | (m37710_read_16(address+1)<<8);
@@ -92,40 +92,40 @@ inline UINT32 m37710_cpu_device::m37710i_read_24_direct(UINT32 address)
/* ================================= STACK ================================ */
/* ======================================================================== */
-inline void m37710_cpu_device::m37710i_push_8(UINT32 value)
+inline void m37710_cpu_device::m37710i_push_8(uint32_t value)
{
m37710_write_8(REG_S, value);
REG_S = MAKE_UINT_16(REG_S-1);
}
-inline UINT32 m37710_cpu_device::m37710i_pull_8()
+inline uint32_t m37710_cpu_device::m37710i_pull_8()
{
REG_S = MAKE_UINT_16(REG_S+1);
return m37710_read_8(REG_S);
}
-inline void m37710_cpu_device::m37710i_push_16(UINT32 value)
+inline void m37710_cpu_device::m37710i_push_16(uint32_t value)
{
m37710i_push_8(value>>8);
m37710i_push_8(value);
}
-inline UINT32 m37710_cpu_device::m37710i_pull_16()
+inline uint32_t m37710_cpu_device::m37710i_pull_16()
{
- UINT32 res = m37710i_pull_8();
+ uint32_t res = m37710i_pull_8();
return res | (m37710i_pull_8() << 8);
}
-inline void m37710_cpu_device::m37710i_push_24(UINT32 value)
+inline void m37710_cpu_device::m37710i_push_24(uint32_t value)
{
m37710i_push_8(value>>16);
m37710i_push_8((value>>8));
m37710i_push_8(value);
}
-inline UINT32 m37710_cpu_device::m37710i_pull_24()
+inline uint32_t m37710_cpu_device::m37710i_pull_24()
{
- UINT32 res = m37710i_pull_8();
+ uint32_t res = m37710i_pull_8();
res |= m37710i_pull_8() << 8;
return res | (m37710i_pull_8() << 16);
}
@@ -135,23 +135,23 @@ inline UINT32 m37710_cpu_device::m37710i_pull_24()
/* ============================ PROGRAM COUNTER =========================== */
/* ======================================================================== */
-inline void m37710_cpu_device::m37710i_jump_16(UINT32 address)
+inline void m37710_cpu_device::m37710i_jump_16(uint32_t address)
{
REG_PC = MAKE_UINT_16(address);
}
-inline void m37710_cpu_device::m37710i_jump_24(UINT32 address)
+inline void m37710_cpu_device::m37710i_jump_24(uint32_t address)
{
REG_PB = address&0xff0000;
REG_PC = MAKE_UINT_16(address);
}
-inline void m37710_cpu_device::m37710i_branch_8(UINT32 offset)
+inline void m37710_cpu_device::m37710i_branch_8(uint32_t offset)
{
REG_PC = MAKE_UINT_16(REG_PC + MAKE_INT_8(offset));
}
-inline void m37710_cpu_device::m37710i_branch_16(UINT32 offset)
+inline void m37710_cpu_device::m37710i_branch_16(uint32_t offset)
{
REG_PC = MAKE_UINT_16(REG_PC + offset);
}
@@ -161,7 +161,7 @@ inline void m37710_cpu_device::m37710i_branch_16(UINT32 offset)
/* ============================ STATUS REGISTER =========================== */
/* ======================================================================== */
-inline UINT32 m37710_cpu_device::m37710i_get_reg_p()
+inline uint32_t m37710_cpu_device::m37710i_get_reg_p()
{
return (FLAG_N&0x80) |
((FLAG_V>>1)&0x40) |
@@ -173,7 +173,7 @@ inline UINT32 m37710_cpu_device::m37710i_get_reg_p()
((FLAG_C>>8)&1);
}
-inline void m37710_cpu_device::m37710i_set_reg_ipl(UINT32 value)
+inline void m37710_cpu_device::m37710i_set_reg_ipl(uint32_t value)
{
m_ipl = value & 7;
}
@@ -183,26 +183,26 @@ inline void m37710_cpu_device::m37710i_set_reg_ipl(UINT32 value)
/* ============================= ADDRESS MODES ============================ */
/* ======================================================================== */
-inline UINT32 m37710_cpu_device::EA_IMM8() {REG_PC += 1; return REG_PB | MAKE_UINT_16(REG_PC-1);}
-inline UINT32 m37710_cpu_device::EA_IMM16() {REG_PC += 2; return REG_PB | MAKE_UINT_16(REG_PC-2);}
-inline UINT32 m37710_cpu_device::EA_IMM24() {REG_PC += 3; return REG_PB | MAKE_UINT_16(REG_PC-3);}
-inline UINT32 m37710_cpu_device::EA_D() {if(MAKE_UINT_8(REG_D)) CLK(1); return MAKE_UINT_16(REG_D + OPER_8_IMM());}
-inline UINT32 m37710_cpu_device::EA_A() {return REG_DB | OPER_16_IMM();}
-inline UINT32 m37710_cpu_device::EA_AL() {return OPER_24_IMM();}
-inline UINT32 m37710_cpu_device::EA_DX() {return MAKE_UINT_16(REG_D + OPER_8_IMM() + REG_X);}
-inline UINT32 m37710_cpu_device::EA_DY() {return MAKE_UINT_16(REG_D + OPER_8_IMM() + REG_Y);}
-inline UINT32 m37710_cpu_device::EA_AX() {UINT32 tmp = EA_A(); if((tmp^(tmp+REG_X))&0xff00) CLK(1); return tmp + REG_X;}
-inline UINT32 m37710_cpu_device::EA_ALX() {return EA_AL() + REG_X;}
-inline UINT32 m37710_cpu_device::EA_AY() {UINT32 tmp = EA_A(); if((tmp^(tmp+REG_X))&0xff00) CLK(1); return tmp + REG_Y;}
-inline UINT32 m37710_cpu_device::EA_DI() {return REG_DB | OPER_16_D();}
-inline UINT32 m37710_cpu_device::EA_DLI() {return OPER_24_D();}
-inline UINT32 m37710_cpu_device::EA_AI() {return read_16_A(OPER_16_IMM());}
-inline UINT32 m37710_cpu_device::EA_ALI() {return OPER_24_A();}
-inline UINT32 m37710_cpu_device::EA_DXI() {return REG_DB | OPER_16_DX();}
-inline UINT32 m37710_cpu_device::EA_DIY() {UINT32 tmp = REG_DB | OPER_16_D(); if((tmp^(tmp+REG_X))&0xff00) CLK(1); return tmp + REG_Y;}
-inline UINT32 m37710_cpu_device::EA_DLIY() {return OPER_24_D() + REG_Y;}
-inline UINT32 m37710_cpu_device::EA_AXI() {return read_16_AXI(MAKE_UINT_16(OPER_16_IMM() + REG_X));}
-inline UINT32 m37710_cpu_device::EA_S() {return MAKE_UINT_16(REG_S + OPER_8_IMM());}
-inline UINT32 m37710_cpu_device::EA_SIY() {return MAKE_UINT_16(read_16_SIY(REG_S + OPER_8_IMM()) + REG_Y) | REG_DB;}
+inline uint32_t m37710_cpu_device::EA_IMM8() {REG_PC += 1; return REG_PB | MAKE_UINT_16(REG_PC-1);}
+inline uint32_t m37710_cpu_device::EA_IMM16() {REG_PC += 2; return REG_PB | MAKE_UINT_16(REG_PC-2);}
+inline uint32_t m37710_cpu_device::EA_IMM24() {REG_PC += 3; return REG_PB | MAKE_UINT_16(REG_PC-3);}
+inline uint32_t m37710_cpu_device::EA_D() {if(MAKE_UINT_8(REG_D)) CLK(1); return MAKE_UINT_16(REG_D + OPER_8_IMM());}
+inline uint32_t m37710_cpu_device::EA_A() {return REG_DB | OPER_16_IMM();}
+inline uint32_t m37710_cpu_device::EA_AL() {return OPER_24_IMM();}
+inline uint32_t m37710_cpu_device::EA_DX() {return MAKE_UINT_16(REG_D + OPER_8_IMM() + REG_X);}
+inline uint32_t m37710_cpu_device::EA_DY() {return MAKE_UINT_16(REG_D + OPER_8_IMM() + REG_Y);}
+inline uint32_t m37710_cpu_device::EA_AX() {uint32_t tmp = EA_A(); if((tmp^(tmp+REG_X))&0xff00) CLK(1); return tmp + REG_X;}
+inline uint32_t m37710_cpu_device::EA_ALX() {return EA_AL() + REG_X;}
+inline uint32_t m37710_cpu_device::EA_AY() {uint32_t tmp = EA_A(); if((tmp^(tmp+REG_X))&0xff00) CLK(1); return tmp + REG_Y;}
+inline uint32_t m37710_cpu_device::EA_DI() {return REG_DB | OPER_16_D();}
+inline uint32_t m37710_cpu_device::EA_DLI() {return OPER_24_D();}
+inline uint32_t m37710_cpu_device::EA_AI() {return read_16_A(OPER_16_IMM());}
+inline uint32_t m37710_cpu_device::EA_ALI() {return OPER_24_A();}
+inline uint32_t m37710_cpu_device::EA_DXI() {return REG_DB | OPER_16_DX();}
+inline uint32_t m37710_cpu_device::EA_DIY() {uint32_t tmp = REG_DB | OPER_16_D(); if((tmp^(tmp+REG_X))&0xff00) CLK(1); return tmp + REG_Y;}
+inline uint32_t m37710_cpu_device::EA_DLIY() {return OPER_24_D() + REG_Y;}
+inline uint32_t m37710_cpu_device::EA_AXI() {return read_16_AXI(MAKE_UINT_16(OPER_16_IMM() + REG_X));}
+inline uint32_t m37710_cpu_device::EA_S() {return MAKE_UINT_16(REG_S + OPER_8_IMM());}
+inline uint32_t m37710_cpu_device::EA_SIY() {return MAKE_UINT_16(read_16_SIY(REG_S + OPER_8_IMM()) + REG_Y) | REG_DB;}
#endif /* __M37710IL_H__ */
diff --git a/src/devices/cpu/m37710/m37710op.h b/src/devices/cpu/m37710/m37710op.h
index 03e29580323..268ef277f18 100644
--- a/src/devices/cpu/m37710/m37710op.h
+++ b/src/devices/cpu/m37710/m37710op.h
@@ -38,7 +38,7 @@
/* note: difference from 65816. when switching to 8-bit X/Y, X and Y are *not* truncated
to 8 bits! */
-void m37710_cpu_device::m37710i_set_flag_mx(UINT32 value)
+void m37710_cpu_device::m37710i_set_flag_mx(uint32_t value)
{
#if FLAG_SET_M
if(!(value & FLAGPOS_M))
@@ -82,7 +82,7 @@ void m37710_cpu_device::m37710i_set_flag_mx(UINT32 value)
}
-void m37710_cpu_device::m37710i_set_reg_p(UINT32 value)
+void m37710_cpu_device::m37710i_set_reg_p(uint32_t value)
{
FLAG_N = value;
FLAG_V = value << 1;
@@ -235,12 +235,12 @@ void m37710_cpu_device::m37710i_set_reg_p(UINT32 value)
#define OP_MPY(MODE) \
CLK(CLK_OP + CLK_R8 + CLK_##MODE + 14); \
SRC = OPER_8_##MODE(); \
- { UINT16 temp = SRC * (REG_A&0xff); REG_A = temp & 0xff; REG_BA = (temp>>8)&0xff; FLAG_Z = temp; FLAG_N = (temp & 0x8000) ? 1 : 0; FLAG_C = 0; }
+ { uint16_t temp = SRC * (REG_A&0xff); REG_A = temp & 0xff; REG_BA = (temp>>8)&0xff; FLAG_Z = temp; FLAG_N = (temp & 0x8000) ? 1 : 0; FLAG_C = 0; }
#else
#define OP_MPY(MODE) \
CLK(CLK_OP + CLK_R16 + CLK_##MODE + 14+8); \
SRC = OPER_16_##MODE(); \
- { UINT32 temp = SRC * REG_A; REG_A = temp & 0xffff; REG_BA = (temp>>16)&0xffff; FLAG_Z = temp; FLAG_N = (temp & 0x80000000) ? 1 : 0; FLAG_C = 0; }
+ { uint32_t temp = SRC * REG_A; REG_A = temp & 0xffff; REG_BA = (temp>>16)&0xffff; FLAG_Z = temp; FLAG_N = (temp & 0x80000000) ? 1 : 0; FLAG_C = 0; }
#endif
/* M37710 Divide */
@@ -252,7 +252,7 @@ void m37710_cpu_device::m37710i_set_reg_p(UINT32 value)
DST = OPER_8_##MODE(); \
if (DST != 0) \
{ \
- UINT16 tempa = SRC / DST; UINT16 tempb = SRC % DST; \
+ uint16_t tempa = SRC / DST; uint16_t tempb = SRC % DST; \
FLAG_V = ((tempa | tempb) & 0xff00) ? VFLAG_SET : 0; \
FLAG_C = FLAG_V ? CFLAG_SET : 0; \
if (!FLAG_V) { FLAG_N = (tempa & 0x80) ? 1 : 0; } \
@@ -266,7 +266,7 @@ void m37710_cpu_device::m37710i_set_reg_p(UINT32 value)
DST = OPER_16_##MODE(); \
if (DST != 0) \
{ \
- UINT32 tempa = SRC / DST; UINT32 tempb = SRC % DST; \
+ uint32_t tempa = SRC / DST; uint32_t tempb = SRC % DST; \
FLAG_V = ((tempa | tempb) & 0xffff0000) ? VFLAG_SET : 0; \
FLAG_C = FLAG_V ? CFLAG_SET : 0; \
if (!FLAG_V) { FLAG_N = (tempa & 0x8000) ? 1 : 0; } \
@@ -2539,7 +2539,7 @@ TABLE_FUNCTION(void, set_line, (int line, int state))
/* Get a register from the CPU core */
-TABLE_FUNCTION(UINT32, get_reg, (int regnum))
+TABLE_FUNCTION(uint32_t, get_reg, (int regnum))
{
switch(regnum)
{
@@ -2559,7 +2559,7 @@ TABLE_FUNCTION(UINT32, get_reg, (int regnum))
return 0;
}
-TABLE_FUNCTION(void, set_reg, (int regnum, UINT32 val))
+TABLE_FUNCTION(void, set_reg, (int regnum, uint32_t val))
{
switch(regnum)
{
diff --git a/src/devices/cpu/m37710/m7700ds.cpp b/src/devices/cpu/m37710/m7700ds.cpp
index b53980bd939..6e463dded1b 100644
--- a/src/devices/cpu/m37710/m7700ds.cpp
+++ b/src/devices/cpu/m37710/m7700ds.cpp
@@ -348,18 +348,18 @@ const m7700_opcode_struct m7700_opcode_struct::s_opcodes_prefix89[256] =
} // anonymous namespace
-static inline unsigned int read_8(const UINT8 *oprom, unsigned int offset)
+static inline unsigned int read_8(const uint8_t *oprom, unsigned int offset)
{
return oprom[offset];
}
-static inline unsigned int read_16(const UINT8 *oprom, unsigned int offset)
+static inline unsigned int read_16(const uint8_t *oprom, unsigned int offset)
{
unsigned int val = read_8(oprom, offset);
return val | (read_8(oprom, offset+1)<<8);
}
-static inline unsigned int read_24(const UINT8 *oprom, unsigned int offset)
+static inline unsigned int read_24(const uint8_t *oprom, unsigned int offset)
{
unsigned int val = read_8(oprom, offset);
val |= (read_8(oprom, offset+1)<<8);
@@ -395,7 +395,7 @@ static inline char* int_16_str(unsigned int val)
}
-int m7700_disassemble(char* buff, unsigned int pc, unsigned int pb, const UINT8 *oprom, int m_flag, int x_flag)
+int m7700_disassemble(char* buff, unsigned int pc, unsigned int pb, const uint8_t *oprom, int m_flag, int x_flag)
{
unsigned int instruction;
const m7700_opcode_struct *opcode;
@@ -405,7 +405,7 @@ int m7700_disassemble(char* buff, unsigned int pc, unsigned int pb, const UINT8
int length = 1;
unsigned int address;
//unsigned int start;
- UINT32 flags = 0;
+ uint32_t flags = 0;
pb <<= 16;
address = pc | pb;
diff --git a/src/devices/cpu/m37710/m7700ds.h b/src/devices/cpu/m37710/m7700ds.h
index c0af0846b72..80706b0a624 100644
--- a/src/devices/cpu/m37710/m7700ds.h
+++ b/src/devices/cpu/m37710/m7700ds.h
@@ -18,6 +18,6 @@ All rights reserved.
*/
-int m7700_disassemble(char* buff, unsigned int pc, unsigned int pb, const UINT8 *oprom, int m_flag, int x_flag);
+int m7700_disassemble(char* buff, unsigned int pc, unsigned int pb, const uint8_t *oprom, int m_flag, int x_flag);
#endif /* __M7700DS_H__ */
diff --git a/src/devices/cpu/m6502/deco16.cpp b/src/devices/cpu/m6502/deco16.cpp
index 30ae298daa6..482c7b1c0b7 100644
--- a/src/devices/cpu/m6502/deco16.cpp
+++ b/src/devices/cpu/m6502/deco16.cpp
@@ -15,14 +15,14 @@
const device_type DECO16 = &device_creator<deco16_device>;
-deco16_device::deco16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+deco16_device::deco16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, DECO16, "DECO16", tag, owner, clock, "deco16", __FILE__),
io(nullptr),
io_config("io", ENDIANNESS_LITTLE, 8, 16)
{
}
-offs_t deco16_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t deco16_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
diff --git a/src/devices/cpu/m6502/deco16.h b/src/devices/cpu/m6502/deco16.h
index 134b1e3aae4..3afc7af081f 100644
--- a/src/devices/cpu/m6502/deco16.h
+++ b/src/devices/cpu/m6502/deco16.h
@@ -15,11 +15,11 @@
class deco16_device : public m6502_device {
public:
- deco16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ deco16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/m3745x.cpp b/src/devices/cpu/m6502/m3745x.cpp
index a7f40fa7ada..22de70eec42 100644
--- a/src/devices/cpu/m6502/m3745x.cpp
+++ b/src/devices/cpu/m6502/m3745x.cpp
@@ -37,7 +37,7 @@ const device_type M37450 = &device_creator<m37450_device>;
//-------------------------------------------------
// m3745x_device - constructor
//-------------------------------------------------
-m3745x_device::m3745x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map, const char *shortname, const char *source) :
+m3745x_device::m3745x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map, const char *shortname, const char *source) :
m740_device(mconfig, type, name, tag, owner, clock, "m3745x", source),
m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, internal_map),
read_p3(*this),
@@ -201,7 +201,7 @@ void m3745x_device::execute_set_input(int inputnum, int state)
void m3745x_device::recalc_irqs()
{
- UINT16 all_ints;
+ uint16_t all_ints;
int static const irq_lines[16] =
{
-1, -1, -1, M740_INT11_LINE, M740_INT12_LINE, M740_INT13_LINE, -1, -1,
@@ -246,7 +246,7 @@ void m3745x_device::recalc_irqs()
m_last_all_ints = all_ints;
}
-void m3745x_device::send_port(address_space &space, UINT8 offset, UINT8 data)
+void m3745x_device::send_port(address_space &space, uint8_t offset, uint8_t data)
{
switch (offset)
{
@@ -268,9 +268,9 @@ void m3745x_device::send_port(address_space &space, UINT8 offset, UINT8 data)
}
}
-UINT8 m3745x_device::read_port(UINT8 offset)
+uint8_t m3745x_device::read_port(uint8_t offset)
{
- UINT8 incoming = 0;
+ uint8_t incoming = 0;
switch (offset)
{
@@ -417,7 +417,7 @@ WRITE8_MEMBER(m3745x_device::intregs_w)
READ8_MEMBER(m3745x_device::adc_r)
{
- UINT8 rv = 0;
+ uint8_t rv = 0;
switch (offset)
{
@@ -498,12 +498,12 @@ static ADDRESS_MAP_START( m37450_map, AS_PROGRAM, 8, m37450_device )
AM_RANGE(0x0100, 0x01ff) AM_RAM
ADDRESS_MAP_END
-m37450_device::m37450_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m37450_device::m37450_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m3745x_device(mconfig, M37450, "Mitsubishi M37450", tag, owner, clock, ADDRESS_MAP_NAME(m37450_map), "m3745x", __FILE__)
{
}
-m37450_device::m37450_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+m37450_device::m37450_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
m3745x_device(mconfig, type, name, tag, owner, clock, ADDRESS_MAP_NAME(m37450_map), shortname, source)
{
}
diff --git a/src/devices/cpu/m6502/m3745x.h b/src/devices/cpu/m6502/m3745x.h
index 0ddc69d099d..6b85aee9c20 100644
--- a/src/devices/cpu/m6502/m3745x.h
+++ b/src/devices/cpu/m6502/m3745x.h
@@ -61,7 +61,7 @@ public:
};
// construction/destruction
- m3745x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map, const char *shortname, const char *source);
+ m3745x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map, const char *shortname, const char *source);
const address_space_config m_program_config;
@@ -117,7 +117,7 @@ public:
DECLARE_READ8_MEMBER(intregs_r);
DECLARE_WRITE8_MEMBER(intregs_w);
- bool are_port_bits_output(UINT8 port, UINT8 mask) { return ((m_ddrs[port] & mask) == mask) ? true : false; }
+ bool are_port_bits_output(uint8_t port, uint8_t mask) { return ((m_ddrs[port] & mask) == mask) ? true : false; }
protected:
// device-level overrides
@@ -127,15 +127,15 @@ protected:
virtual void execute_set_input(int inputnum, int state) override;
virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
- void send_port(address_space &space, UINT8 offset, UINT8 data);
- UINT8 read_port(UINT8 offset);
+ void send_port(address_space &space, uint8_t offset, uint8_t data);
+ uint8_t read_port(uint8_t offset);
void recalc_irqs();
- UINT8 m_ports[6], m_ddrs[6];
- UINT8 m_intreq1, m_intreq2, m_intctrl1, m_intctrl2;
- UINT8 m_adctrl;
- UINT16 m_last_all_ints;
+ uint8_t m_ports[6], m_ddrs[6];
+ uint8_t m_intreq1, m_intreq2, m_intctrl1, m_intctrl2;
+ uint8_t m_adctrl;
+ uint16_t m_last_all_ints;
private:
emu_timer *m_timers[NUM_TIMERS];
@@ -144,8 +144,8 @@ private:
class m37450_device : public m3745x_device
{
public:
- m37450_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m37450_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m37450_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m37450_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
};
extern const device_type M37450;
diff --git a/src/devices/cpu/m6502/m4510.cpp b/src/devices/cpu/m6502/m4510.cpp
index 1b52ef569c8..bfb89dbcdc8 100644
--- a/src/devices/cpu/m6502/m4510.cpp
+++ b/src/devices/cpu/m6502/m4510.cpp
@@ -13,7 +13,7 @@
const device_type M4510 = &device_creator<m4510_device>;
-m4510_device::m4510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m4510_device::m4510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m65ce02_device(mconfig, M4510, "M4510", tag, owner, clock, "m4510", __FILE__),
map_enable(0),
nomap(false)
@@ -26,7 +26,7 @@ m4510_device::m4510_device(const machine_config &mconfig, const char *tag, devic
sprogram_config.m_page_shift = 13;
}
-offs_t m4510_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m4510_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
@@ -71,22 +71,22 @@ m4510_device::mi_4510_normal::mi_4510_normal(m4510_device *_base)
base = _base;
}
-UINT8 m4510_device::mi_4510_normal::read(UINT16 adr)
+uint8_t m4510_device::mi_4510_normal::read(uint16_t adr)
{
return program->read_byte(base->map(adr));
}
-UINT8 m4510_device::mi_4510_normal::read_sync(UINT16 adr)
+uint8_t m4510_device::mi_4510_normal::read_sync(uint16_t adr)
{
return sdirect->read_byte(base->map(adr));
}
-UINT8 m4510_device::mi_4510_normal::read_arg(UINT16 adr)
+uint8_t m4510_device::mi_4510_normal::read_arg(uint16_t adr)
{
return direct->read_byte(base->map(adr));
}
-void m4510_device::mi_4510_normal::write(UINT16 adr, UINT8 val)
+void m4510_device::mi_4510_normal::write(uint16_t adr, uint8_t val)
{
program->write_byte(base->map(adr), val);
}
@@ -95,12 +95,12 @@ m4510_device::mi_4510_nd::mi_4510_nd(m4510_device *_base) : mi_4510_normal(_base
{
}
-UINT8 m4510_device::mi_4510_nd::read_sync(UINT16 adr)
+uint8_t m4510_device::mi_4510_nd::read_sync(uint16_t adr)
{
return sprogram->read_byte(base->map(adr));
}
-UINT8 m4510_device::mi_4510_nd::read_arg(UINT16 adr)
+uint8_t m4510_device::mi_4510_nd::read_arg(uint16_t adr)
{
return program->read_byte(base->map(adr));
}
diff --git a/src/devices/cpu/m6502/m4510.h b/src/devices/cpu/m6502/m4510.h
index f6a8f904863..97629581531 100644
--- a/src/devices/cpu/m6502/m4510.h
+++ b/src/devices/cpu/m6502/m4510.h
@@ -15,19 +15,19 @@
class m4510_device : public m65ce02_device {
public:
- m4510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m4510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
bool get_nomap() const { return nomap; }
protected:
- UINT32 map_offset[2];
- UINT8 map_enable;
+ uint32_t map_offset[2];
+ uint8_t map_enable;
bool nomap;
class mi_4510_normal : public memory_interface {
@@ -36,25 +36,25 @@ protected:
mi_4510_normal(m4510_device *base);
virtual ~mi_4510_normal() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
};
class mi_4510_nd : public mi_4510_normal {
public:
mi_4510_nd(m4510_device *base);
virtual ~mi_4510_nd() {}
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
};
virtual void device_start() override;
virtual void device_reset() override;
virtual bool memory_translate(address_spacenum spacenum, int intention, offs_t &address) override;
- inline UINT32 map(UINT16 adr) {
+ inline uint32_t map(uint16_t adr) {
if(map_enable & (1 << (adr >> 13))) {
nomap = false;
return adr + map_offset[adr >> 15];
diff --git a/src/devices/cpu/m6502/m5074x.cpp b/src/devices/cpu/m6502/m5074x.cpp
index 965e8866467..a486691c678 100644
--- a/src/devices/cpu/m6502/m5074x.cpp
+++ b/src/devices/cpu/m6502/m5074x.cpp
@@ -39,7 +39,7 @@ const device_type M50741 = &device_creator<m50741_device>;
//-------------------------------------------------
// m5074x_device - constructor
//-------------------------------------------------
-m5074x_device::m5074x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map, const char *shortname, const char *source) :
+m5074x_device::m5074x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map, const char *shortname, const char *source) :
m740_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_LITTLE, 8, 13, 0, internal_map),
read_p0(*this),
@@ -189,7 +189,7 @@ void m5074x_device::execute_set_input(int inputnum, int state)
void m5074x_device::recalc_irqs()
{
- UINT8 all_ints = 0;
+ uint8_t all_ints = 0;
if ((m_intctrl & (IRQ_CNTRREQ|IRQ_CNTRENA)) == (IRQ_CNTRREQ|IRQ_CNTRENA))
{
@@ -280,7 +280,7 @@ void m5074x_device::recalc_timer(int timer)
}
}
-void m5074x_device::send_port(address_space &space, UINT8 offset, UINT8 data)
+void m5074x_device::send_port(address_space &space, uint8_t offset, uint8_t data)
{
switch (offset)
{
@@ -302,9 +302,9 @@ void m5074x_device::send_port(address_space &space, UINT8 offset, UINT8 data)
}
}
-UINT8 m5074x_device::read_port(UINT8 offset)
+uint8_t m5074x_device::read_port(uint8_t offset)
{
- UINT8 incoming = 0;
+ uint8_t incoming = 0;
switch (offset)
{
@@ -489,12 +489,12 @@ static ADDRESS_MAP_START( m50740_map, AS_PROGRAM, 8, m50740_device )
AM_RANGE(0x1400, 0x1fff) AM_ROM AM_REGION(M5074X_INTERNAL_ROM_REGION, 0)
ADDRESS_MAP_END
-m50740_device::m50740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m50740_device::m50740_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m5074x_device(mconfig, M50740, "Mitsubishi M50740", tag, owner, clock, ADDRESS_MAP_NAME(m50740_map), "m50740", __FILE__)
{
}
-m50740_device::m50740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+m50740_device::m50740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
m5074x_device(mconfig, type, name, tag, owner, clock, ADDRESS_MAP_NAME(m50740_map), shortname, source)
{
}
@@ -507,12 +507,12 @@ static ADDRESS_MAP_START( m50741_map, AS_PROGRAM, 8, m50741_device )
AM_RANGE(0x1000, 0x1fff) AM_ROM AM_REGION("internal", 0)
ADDRESS_MAP_END
-m50741_device::m50741_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m50741_device::m50741_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m5074x_device(mconfig, M50740, "Mitsubishi M50741", tag, owner, clock, ADDRESS_MAP_NAME(m50741_map), "m50741", __FILE__)
{
}
-m50741_device::m50741_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+m50741_device::m50741_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
m5074x_device(mconfig, type, name, tag, owner, clock, ADDRESS_MAP_NAME(m50741_map), shortname, source)
{
}
diff --git a/src/devices/cpu/m6502/m5074x.h b/src/devices/cpu/m6502/m5074x.h
index 79de50f63fb..0486a243a24 100644
--- a/src/devices/cpu/m6502/m5074x.h
+++ b/src/devices/cpu/m6502/m5074x.h
@@ -72,7 +72,7 @@ class m5074x_device : public m740_device
public:
// construction/destruction
- m5074x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map, const char *shortname, const char *source);
+ m5074x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map, const char *shortname, const char *source);
const address_space_config m_program_config;
@@ -93,7 +93,7 @@ public:
DECLARE_READ8_MEMBER(tmrirq_r);
DECLARE_WRITE8_MEMBER(tmrirq_w);
- bool are_port_bits_output(UINT8 port, UINT8 mask) { return ((m_ddrs[port] & mask) == mask) ? true : false; }
+ bool are_port_bits_output(uint8_t port, uint8_t mask) { return ((m_ddrs[port] & mask) == mask) ? true : false; }
protected:
// device-level overrides
@@ -103,17 +103,17 @@ protected:
virtual void execute_set_input(int inputnum, int state) override;
virtual const address_space_config *memory_space_config(address_spacenum spacenum) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
- void send_port(address_space &space, UINT8 offset, UINT8 data);
- UINT8 read_port(UINT8 offset);
+ void send_port(address_space &space, uint8_t offset, uint8_t data);
+ uint8_t read_port(uint8_t offset);
void recalc_irqs();
void recalc_timer(int timer);
- UINT8 m_ports[6], m_ddrs[6];
- UINT8 m_intctrl, m_tmrctrl;
- UINT8 m_tmr12pre, m_tmr1, m_tmr2, m_tmrxpre, m_tmrx;
- UINT8 m_tmr1latch, m_tmr2latch, m_tmrxlatch;
- UINT8 m_last_all_ints;
+ uint8_t m_ports[6], m_ddrs[6];
+ uint8_t m_intctrl, m_tmrctrl;
+ uint8_t m_tmr12pre, m_tmr1, m_tmr2, m_tmrxpre, m_tmrx;
+ uint8_t m_tmr1latch, m_tmr2latch, m_tmrxlatch;
+ uint8_t m_last_all_ints;
private:
emu_timer *m_timers[NUM_TIMERS];
@@ -122,15 +122,15 @@ private:
class m50740_device : public m5074x_device
{
public:
- m50740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m50740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m50740_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m50740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
};
class m50741_device : public m5074x_device
{
public:
- m50741_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m50741_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m50741_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m50741_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
};
extern const device_type M50740;
diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp
index 6fa76704731..1194273fae3 100644
--- a/src/devices/cpu/m6502/m6502.cpp
+++ b/src/devices/cpu/m6502/m6502.cpp
@@ -14,7 +14,7 @@
const device_type M6502 = &device_creator<m6502_device>;
-m6502_device::m6502_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m6502_device::m6502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
cpu_device(mconfig, M6502, "M6502", tag, owner, clock, "m6502", __FILE__),
sync_w(*this),
program_config("program", ENDIANNESS_LITTLE, 8, 16),
@@ -24,7 +24,7 @@ m6502_device::m6502_device(const machine_config &mconfig, const char *tag, devic
direct_disabled = false;
}
-m6502_device::m6502_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+m6502_device::m6502_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
sync_w(*this),
program_config("program", ENDIANNESS_LITTLE, 8, 16),
@@ -126,30 +126,30 @@ void m6502_device::device_reset()
}
-UINT32 m6502_device::execute_min_cycles() const
+uint32_t m6502_device::execute_min_cycles() const
{
return 1;
}
-UINT32 m6502_device::execute_max_cycles() const
+uint32_t m6502_device::execute_max_cycles() const
{
return 10;
}
-UINT32 m6502_device::execute_input_lines() const
+uint32_t m6502_device::execute_input_lines() const
{
return NMI_LINE+1;
}
-void m6502_device::do_adc_d(UINT8 val)
+void m6502_device::do_adc_d(uint8_t val)
{
- UINT8 c = P & F_C ? 1 : 0;
+ uint8_t c = P & F_C ? 1 : 0;
P &= ~(F_N|F_V|F_Z|F_C);
- UINT8 al = (A & 15) + (val & 15) + c;
+ uint8_t al = (A & 15) + (val & 15) + c;
if(al > 9)
al += 6;
- UINT8 ah = (A >> 4) + (val >> 4) + (al > 15);
- if(!UINT8(A + val + c))
+ uint8_t ah = (A >> 4) + (val >> 4) + (al > 15);
+ if(!uint8_t(A + val + c))
P |= F_Z;
else if(ah & 8)
P |= F_N;
@@ -162,14 +162,14 @@ void m6502_device::do_adc_d(UINT8 val)
A = (ah << 4) | (al & 15);
}
-void m6502_device::do_adc_nd(UINT8 val)
+void m6502_device::do_adc_nd(uint8_t val)
{
- UINT16 sum;
+ uint16_t sum;
sum = A + val + (P & F_C ? 1 : 0);
P &= ~(F_N|F_V|F_Z|F_C);
- if(!UINT8(sum))
+ if(!uint8_t(sum))
P |= F_Z;
- else if(INT8(sum) < 0)
+ else if(int8_t(sum) < 0)
P |= F_N;
if(~(A^val) & (A^sum) & 0x80)
P |= F_V;
@@ -178,7 +178,7 @@ void m6502_device::do_adc_nd(UINT8 val)
A = sum;
}
-void m6502_device::do_adc(UINT8 val)
+void m6502_device::do_adc(uint8_t val)
{
if(P & F_D)
do_adc_d(val);
@@ -195,7 +195,7 @@ void m6502_device::do_arr_nd()
A |= 0x80;
if(!A)
P |= F_Z;
- else if(INT8(A)<0)
+ else if(int8_t(A)<0)
P |= F_N;
if(A & 0x40)
P |= F_V|F_C;
@@ -208,12 +208,12 @@ void m6502_device::do_arr_d()
// The adc/ror interaction gives an extremely weird result
bool c = P & F_C;
P &= ~(F_N|F_Z|F_C|F_V);
- UINT8 a = A >> 1;
+ uint8_t a = A >> 1;
if(c)
a |= 0x80;
if(!a)
P |= F_Z;
- else if(INT8(a) < 0)
+ else if(int8_t(a) < 0)
P |= F_N;
if((a ^ A) & 0x40)
P |= F_V;
@@ -236,28 +236,28 @@ void m6502_device::do_arr()
do_arr_nd();
}
-void m6502_device::do_cmp(UINT8 val1, UINT8 val2)
+void m6502_device::do_cmp(uint8_t val1, uint8_t val2)
{
P &= ~(F_N|F_Z|F_C);
- UINT16 r = val1-val2;
+ uint16_t r = val1-val2;
if(!r)
P |= F_Z;
- else if(INT8(r) < 0)
+ else if(int8_t(r) < 0)
P |= F_N;
if(!(r & 0xff00))
P |= F_C;
}
-void m6502_device::do_sbc_d(UINT8 val)
+void m6502_device::do_sbc_d(uint8_t val)
{
- UINT8 c = P & F_C ? 0 : 1;
+ uint8_t c = P & F_C ? 0 : 1;
P &= ~(F_N|F_V|F_Z|F_C);
- UINT16 diff = A - val - c;
- UINT8 al = (A & 15) - (val & 15) - c;
- if(INT8(al) < 0)
+ uint16_t diff = A - val - c;
+ uint8_t al = (A & 15) - (val & 15) - c;
+ if(int8_t(al) < 0)
al -= 6;
- UINT8 ah = (A >> 4) - (val >> 4) - (INT8(al) < 0);
- if(!UINT8(diff))
+ uint8_t ah = (A >> 4) - (val >> 4) - (int8_t(al) < 0);
+ if(!uint8_t(diff))
P |= F_Z;
else if(diff & 0x80)
P |= F_N;
@@ -265,18 +265,18 @@ void m6502_device::do_sbc_d(UINT8 val)
P |= F_V;
if(!(diff & 0xff00))
P |= F_C;
- if(INT8(ah) < 0)
+ if(int8_t(ah) < 0)
ah -= 6;
A = (ah << 4) | (al & 15);
}
-void m6502_device::do_sbc_nd(UINT8 val)
+void m6502_device::do_sbc_nd(uint8_t val)
{
- UINT16 diff = A - val - (P & F_C ? 0 : 1);
+ uint16_t diff = A - val - (P & F_C ? 0 : 1);
P &= ~(F_N|F_V|F_Z|F_C);
- if(!UINT8(diff))
+ if(!uint8_t(diff))
P |= F_Z;
- else if(INT8(diff) < 0)
+ else if(int8_t(diff) < 0)
P |= F_N;
if((A^val) & (A^diff) & 0x80)
P |= F_V;
@@ -285,7 +285,7 @@ void m6502_device::do_sbc_nd(UINT8 val)
A = diff;
}
-void m6502_device::do_sbc(UINT8 val)
+void m6502_device::do_sbc(uint8_t val)
{
if(P & F_D)
do_sbc_d(val);
@@ -293,10 +293,10 @@ void m6502_device::do_sbc(UINT8 val)
do_sbc_nd(val);
}
-void m6502_device::do_bit(UINT8 val)
+void m6502_device::do_bit(uint8_t val)
{
P &= ~(F_N|F_Z|F_V);
- UINT8 r = A & val;
+ uint8_t r = A & val;
if(!r)
P |= F_Z;
if(val & 0x80)
@@ -305,20 +305,20 @@ void m6502_device::do_bit(UINT8 val)
P |= F_V;
}
-UINT8 m6502_device::do_asl(UINT8 v)
+uint8_t m6502_device::do_asl(uint8_t v)
{
P &= ~(F_N|F_Z|F_C);
- UINT8 r = v<<1;
+ uint8_t r = v<<1;
if(!r)
P |= F_Z;
- else if(INT8(r) < 0)
+ else if(int8_t(r) < 0)
P |= F_N;
if(v & 0x80)
P |= F_C;
return r;
}
-UINT8 m6502_device::do_lsr(UINT8 v)
+uint8_t m6502_device::do_lsr(uint8_t v)
{
P &= ~(F_N|F_Z|F_C);
if(v & 1)
@@ -329,7 +329,7 @@ UINT8 m6502_device::do_lsr(UINT8 v)
return v;
}
-UINT8 m6502_device::do_ror(UINT8 v)
+uint8_t m6502_device::do_ror(uint8_t v)
{
bool c = P & F_C;
P &= ~(F_N|F_Z|F_C);
@@ -340,12 +340,12 @@ UINT8 m6502_device::do_ror(UINT8 v)
v |= 0x80;
if(!v)
P |= F_Z;
- else if(INT8(v)<0)
+ else if(int8_t(v)<0)
P |= F_N;
return v;
}
-UINT8 m6502_device::do_rol(UINT8 v)
+uint8_t m6502_device::do_rol(uint8_t v)
{
bool c = P & F_C;
P &= ~(F_N|F_Z|F_C);
@@ -356,12 +356,12 @@ UINT8 m6502_device::do_rol(UINT8 v)
v |= 0x01;
if(!v)
P |= F_Z;
- else if(INT8(v)<0)
+ else if(int8_t(v)<0)
P |= F_N;
return v;
}
-UINT8 m6502_device::do_asr(UINT8 v)
+uint8_t m6502_device::do_asr(uint8_t v)
{
P &= ~(F_N|F_Z|F_C);
if(v & 1)
@@ -456,20 +456,20 @@ void m6502_device::state_string_export(const device_state_entry &entry, std::str
}
-UINT32 m6502_device::disasm_min_opcode_bytes() const
+uint32_t m6502_device::disasm_min_opcode_bytes() const
{
return 1;
}
-UINT32 m6502_device::disasm_max_opcode_bytes() const
+uint32_t m6502_device::disasm_max_opcode_bytes() const
{
return 4;
}
-offs_t m6502_device::disassemble_generic(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options, const disasm_entry *table)
+offs_t m6502_device::disassemble_generic(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options, const disasm_entry *table)
{
const disasm_entry &e = table[oprom[0] | inst_state_base];
- UINT32 flags = e.flags | DASMFLAG_SUPPORTED;
+ uint32_t flags = e.flags | DASMFLAG_SUPPORTED;
buffer += sprintf(buffer, "%s", e.opcode);
switch(e.mode) {
@@ -557,17 +557,17 @@ offs_t m6502_device::disassemble_generic(char *buffer, offs_t pc, const UINT8 *o
break;
case DASM_rel:
- sprintf(buffer, " $%04x", (pc & 0xf0000) | UINT16(pc + 2 + INT8(opram[1])));
+ sprintf(buffer, " $%04x", (pc & 0xf0000) | uint16_t(pc + 2 + int8_t(opram[1])));
flags |= 2;
break;
case DASM_rw2:
- sprintf(buffer, " $%04x", (pc & 0xf0000) | UINT16(pc + 2 + INT16((opram[2] << 8) | opram[1])));
+ sprintf(buffer, " $%04x", (pc & 0xf0000) | uint16_t(pc + 2 + int16_t((opram[2] << 8) | opram[1])));
flags |= 3;
break;
case DASM_zpb:
- sprintf(buffer, "%d $%02x, $%04x", (oprom[0] >> 4) & 7, opram[1], (pc & 0xf0000) | UINT16(pc + 3 + INT8(opram[2])));
+ sprintf(buffer, "%d $%02x, $%04x", (oprom[0] >> 4) & 7, opram[1], (pc & 0xf0000) | uint16_t(pc + 3 + int8_t(opram[2])));
flags |= 3;
break;
@@ -607,12 +607,12 @@ offs_t m6502_device::disassemble_generic(char *buffer, offs_t pc, const UINT8 *o
break;
case DASM_bzr:
- sprintf(buffer, " %d, $%02x, $%04x", (opram[0] >> 5) & 7, opram[1], (pc & 0xf0000) | UINT16(pc + 3 + INT8(opram[2])));
+ sprintf(buffer, " %d, $%02x, $%04x", (opram[0] >> 5) & 7, opram[1], (pc & 0xf0000) | uint16_t(pc + 3 + int8_t(opram[2])));
flags |= 3;
break;
case DASM_bar:
- sprintf(buffer, " %d, a, $%04x", (opram[0] >> 5) & 7, (pc & 0xf0000) | UINT16(pc + 3 + INT8(opram[1])));
+ sprintf(buffer, " %d, a, $%04x", (opram[0] >> 5) & 7, (pc & 0xf0000) | uint16_t(pc + 3 + int8_t(opram[1])));
flags |= 2;
break;
@@ -655,7 +655,7 @@ void m6502_device::prefetch_noirq()
PC++;
}
-void m6502_device::set_nz(UINT8 v)
+void m6502_device::set_nz(uint8_t v)
{
P &= ~(F_Z|F_N);
if(v & 0x80)
@@ -664,50 +664,50 @@ void m6502_device::set_nz(UINT8 v)
P |= F_Z;
}
-offs_t m6502_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6502_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
-UINT8 m6502_device::memory_interface::read_9(UINT16 adr)
+uint8_t m6502_device::memory_interface::read_9(uint16_t adr)
{
return read(adr);
}
-void m6502_device::memory_interface::write_9(UINT16 adr, UINT8 val)
+void m6502_device::memory_interface::write_9(uint16_t adr, uint8_t val)
{
write(adr, val);
}
-UINT8 m6502_device::mi_default_normal::read(UINT16 adr)
+uint8_t m6502_device::mi_default_normal::read(uint16_t adr)
{
return program->read_byte(adr);
}
-UINT8 m6502_device::mi_default_normal::read_sync(UINT16 adr)
+uint8_t m6502_device::mi_default_normal::read_sync(uint16_t adr)
{
return sdirect->read_byte(adr);
}
-UINT8 m6502_device::mi_default_normal::read_arg(UINT16 adr)
+uint8_t m6502_device::mi_default_normal::read_arg(uint16_t adr)
{
return direct->read_byte(adr);
}
-void m6502_device::mi_default_normal::write(UINT16 adr, UINT8 val)
+void m6502_device::mi_default_normal::write(uint16_t adr, uint8_t val)
{
program->write_byte(adr, val);
}
-UINT8 m6502_device::mi_default_nd::read_sync(UINT16 adr)
+uint8_t m6502_device::mi_default_nd::read_sync(uint16_t adr)
{
return sprogram->read_byte(adr);
}
-UINT8 m6502_device::mi_default_nd::read_arg(UINT16 adr)
+uint8_t m6502_device::mi_default_nd::read_arg(uint16_t adr)
{
return program->read_byte(adr);
}
diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h
index d09554a3dff..167b643ac94 100644
--- a/src/devices/cpu/m6502/m6502.h
+++ b/src/devices/cpu/m6502/m6502.h
@@ -26,8 +26,8 @@ public:
V_LINE = INPUT_LINE_IRQ0 + 16
};
- m6502_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m6502_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m6502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6502_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
bool get_sync() const { return sync; }
void disable_direct() { direct_disabled = true; }
@@ -43,28 +43,28 @@ protected:
direct_read_data *direct, *sdirect;
virtual ~memory_interface() {}
- virtual UINT8 read(UINT16 adr) = 0;
- virtual UINT8 read_9(UINT16 adr);
- virtual UINT8 read_sync(UINT16 adr) = 0;
- virtual UINT8 read_arg(UINT16 adr) = 0;
- virtual void write(UINT16 adr, UINT8 val) = 0;
- virtual void write_9(UINT16 adr, UINT8 val);
+ virtual uint8_t read(uint16_t adr) = 0;
+ virtual uint8_t read_9(uint16_t adr);
+ virtual uint8_t read_sync(uint16_t adr) = 0;
+ virtual uint8_t read_arg(uint16_t adr) = 0;
+ virtual void write(uint16_t adr, uint8_t val) = 0;
+ virtual void write_9(uint16_t adr, uint8_t val);
};
class mi_default_normal : public memory_interface {
public:
virtual ~mi_default_normal() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
};
class mi_default_nd : public mi_default_normal {
public:
virtual ~mi_default_nd() {}
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
};
struct disasm_entry {
@@ -129,9 +129,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -144,23 +144,23 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config program_config, sprogram_config;
- UINT16 PPC; /* previous program counter */
- UINT16 NPC; /* next start-of-instruction program counter */
- UINT16 PC; /* program counter */
- UINT16 SP; /* stack pointer (always 100 - 1FF) */
- UINT16 TMP; /* temporary internal values */
- UINT8 TMP2; /* another temporary internal value, 8 bits this time */
- UINT8 A; /* Accumulator */
- UINT8 X; /* X index register */
- UINT8 Y; /* Y index register */
- UINT8 P; /* Processor status */
- UINT8 IR; /* Prefetched instruction register */
+ uint16_t PPC; /* previous program counter */
+ uint16_t NPC; /* next start-of-instruction program counter */
+ uint16_t PC; /* program counter */
+ uint16_t SP; /* stack pointer (always 100 - 1FF) */
+ uint16_t TMP; /* temporary internal values */
+ uint8_t TMP2; /* another temporary internal value, 8 bits this time */
+ uint8_t A; /* Accumulator */
+ uint8_t X; /* X index register */
+ uint8_t Y; /* Y index register */
+ uint8_t P; /* Processor status */
+ uint8_t IR; /* Prefetched instruction register */
int inst_state_base; /* Current instruction bank */
memory_interface *mintf;
@@ -171,46 +171,46 @@ protected:
static const disasm_entry disasm_entries[0x100];
- offs_t disassemble_generic(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options, const disasm_entry *table);
- UINT8 read(UINT16 adr) { return mintf->read(adr); }
- UINT8 read_9(UINT16 adr) { return mintf->read_9(adr); }
- void write(UINT16 adr, UINT8 val) { mintf->write(adr, val); }
- void write_9(UINT16 adr, UINT8 val) { mintf->write_9(adr, val); }
- UINT8 read_arg(UINT16 adr) { return mintf->read_arg(adr); }
- UINT8 read_pc() { return mintf->read_arg(PC++); }
- UINT8 read_pc_noinc() { return mintf->read_arg(PC); }
+ offs_t disassemble_generic(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options, const disasm_entry *table);
+ uint8_t read(uint16_t adr) { return mintf->read(adr); }
+ uint8_t read_9(uint16_t adr) { return mintf->read_9(adr); }
+ void write(uint16_t adr, uint8_t val) { mintf->write(adr, val); }
+ void write_9(uint16_t adr, uint8_t val) { mintf->write_9(adr, val); }
+ uint8_t read_arg(uint16_t adr) { return mintf->read_arg(adr); }
+ uint8_t read_pc() { return mintf->read_arg(PC++); }
+ uint8_t read_pc_noinc() { return mintf->read_arg(PC); }
void prefetch();
void prefetch_noirq();
- void set_nz(UINT8 v);
+ void set_nz(uint8_t v);
virtual void do_exec_full();
virtual void do_exec_partial();
// inline helpers
- static inline bool page_changing(UINT16 base, int delta) { return ((base + delta) ^ base) & 0xff00; }
- static inline UINT16 set_l(UINT16 base, UINT8 val) { return (base & 0xff00) | val; }
- static inline UINT16 set_h(UINT16 base, UINT8 val) { return (base & 0x00ff) | (val << 8); }
+ static inline bool page_changing(uint16_t base, int delta) { return ((base + delta) ^ base) & 0xff00; }
+ static inline uint16_t set_l(uint16_t base, uint8_t val) { return (base & 0xff00) | val; }
+ static inline uint16_t set_h(uint16_t base, uint8_t val) { return (base & 0x00ff) | (val << 8); }
inline void dec_SP() { SP = set_l(SP, SP-1); }
inline void inc_SP() { SP = set_l(SP, SP+1); }
- void do_adc_d(UINT8 val);
- void do_adc_nd(UINT8 val);
- void do_sbc_d(UINT8 val);
- void do_sbc_nd(UINT8 val);
+ void do_adc_d(uint8_t val);
+ void do_adc_nd(uint8_t val);
+ void do_sbc_d(uint8_t val);
+ void do_sbc_nd(uint8_t val);
void do_arr_d();
void do_arr_nd();
- void do_adc(UINT8 val);
- void do_cmp(UINT8 val1, UINT8 val2);
- void do_sbc(UINT8 val);
- void do_bit(UINT8 val);
+ void do_adc(uint8_t val);
+ void do_cmp(uint8_t val1, uint8_t val2);
+ void do_sbc(uint8_t val);
+ void do_bit(uint8_t val);
void do_arr();
- UINT8 do_asl(UINT8 v);
- UINT8 do_lsr(UINT8 v);
- UINT8 do_ror(UINT8 v);
- UINT8 do_rol(UINT8 v);
- UINT8 do_asr(UINT8 v);
+ uint8_t do_asl(uint8_t v);
+ uint8_t do_lsr(uint8_t v);
+ uint8_t do_ror(uint8_t v);
+ uint8_t do_rol(uint8_t v);
+ uint8_t do_asr(uint8_t v);
#define O(o) void o ## _full(); void o ## _partial()
diff --git a/src/devices/cpu/m6502/m6504.cpp b/src/devices/cpu/m6502/m6504.cpp
index f2ae2c4b6d9..a2a2f006d1b 100644
--- a/src/devices/cpu/m6502/m6504.cpp
+++ b/src/devices/cpu/m6502/m6504.cpp
@@ -13,7 +13,7 @@
const device_type M6504 = &device_creator<m6504_device>;
-m6504_device::m6504_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m6504_device::m6504_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, M6504, "M6504", tag, owner, clock, "m6504", __FILE__)
{
program_config.m_addrbus_width = 13;
@@ -30,32 +30,32 @@ void m6504_device::device_start()
init();
}
-UINT8 m6504_device::mi_6504_normal::read(UINT16 adr)
+uint8_t m6504_device::mi_6504_normal::read(uint16_t adr)
{
return program->read_byte(adr & 0x1fff);
}
-UINT8 m6504_device::mi_6504_normal::read_sync(UINT16 adr)
+uint8_t m6504_device::mi_6504_normal::read_sync(uint16_t adr)
{
return sdirect->read_byte(adr & 0x1fff);
}
-UINT8 m6504_device::mi_6504_normal::read_arg(UINT16 adr)
+uint8_t m6504_device::mi_6504_normal::read_arg(uint16_t adr)
{
return direct->read_byte(adr & 0x1fff);
}
-void m6504_device::mi_6504_normal::write(UINT16 adr, UINT8 val)
+void m6504_device::mi_6504_normal::write(uint16_t adr, uint8_t val)
{
program->write_byte(adr & 0x1fff, val);
}
-UINT8 m6504_device::mi_6504_nd::read_sync(UINT16 adr)
+uint8_t m6504_device::mi_6504_nd::read_sync(uint16_t adr)
{
return sprogram->read_byte(adr & 0x1fff);
}
-UINT8 m6504_device::mi_6504_nd::read_arg(UINT16 adr)
+uint8_t m6504_device::mi_6504_nd::read_arg(uint16_t adr)
{
return program->read_byte(adr & 0x1fff);
}
diff --git a/src/devices/cpu/m6502/m6504.h b/src/devices/cpu/m6502/m6504.h
index 6a4e4f5f9df..fdd15ff46a6 100644
--- a/src/devices/cpu/m6502/m6504.h
+++ b/src/devices/cpu/m6502/m6504.h
@@ -15,23 +15,23 @@
class m6504_device : public m6502_device {
public:
- m6504_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m6504_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
class mi_6504_normal : public memory_interface {
public:
virtual ~mi_6504_normal() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
};
class mi_6504_nd : public mi_6504_normal {
public:
virtual ~mi_6504_nd() {}
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
};
virtual void device_start() override;
diff --git a/src/devices/cpu/m6502/m6507.cpp b/src/devices/cpu/m6502/m6507.cpp
index 0f561b17e62..85855f75aab 100644
--- a/src/devices/cpu/m6502/m6507.cpp
+++ b/src/devices/cpu/m6502/m6507.cpp
@@ -13,7 +13,7 @@
const device_type M6507 = &device_creator<m6507_device>;
-m6507_device::m6507_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m6507_device::m6507_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, M6507, "M6507", tag, owner, clock, "m6507", __FILE__)
{
program_config.m_addrbus_width = 13;
@@ -30,32 +30,32 @@ void m6507_device::device_start()
init();
}
-UINT8 m6507_device::mi_6507_normal::read(UINT16 adr)
+uint8_t m6507_device::mi_6507_normal::read(uint16_t adr)
{
return program->read_byte(adr & 0x1fff);
}
-UINT8 m6507_device::mi_6507_normal::read_sync(UINT16 adr)
+uint8_t m6507_device::mi_6507_normal::read_sync(uint16_t adr)
{
return sdirect->read_byte(adr & 0x1fff);
}
-UINT8 m6507_device::mi_6507_normal::read_arg(UINT16 adr)
+uint8_t m6507_device::mi_6507_normal::read_arg(uint16_t adr)
{
return direct->read_byte(adr & 0x1fff);
}
-void m6507_device::mi_6507_normal::write(UINT16 adr, UINT8 val)
+void m6507_device::mi_6507_normal::write(uint16_t adr, uint8_t val)
{
program->write_byte(adr & 0x1fff, val);
}
-UINT8 m6507_device::mi_6507_nd::read_sync(UINT16 adr)
+uint8_t m6507_device::mi_6507_nd::read_sync(uint16_t adr)
{
return sprogram->read_byte(adr & 0x1fff);
}
-UINT8 m6507_device::mi_6507_nd::read_arg(UINT16 adr)
+uint8_t m6507_device::mi_6507_nd::read_arg(uint16_t adr)
{
return program->read_byte(adr & 0x1fff);
}
diff --git a/src/devices/cpu/m6502/m6507.h b/src/devices/cpu/m6502/m6507.h
index b349b9f8bb7..256f1e4c8bb 100644
--- a/src/devices/cpu/m6502/m6507.h
+++ b/src/devices/cpu/m6502/m6507.h
@@ -15,23 +15,23 @@
class m6507_device : public m6502_device {
public:
- m6507_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m6507_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
class mi_6507_normal : public memory_interface {
public:
virtual ~mi_6507_normal() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
};
class mi_6507_nd : public mi_6507_normal {
public:
virtual ~mi_6507_nd() {}
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
};
virtual void device_start() override;
diff --git a/src/devices/cpu/m6502/m6509.cpp b/src/devices/cpu/m6502/m6509.cpp
index 6d955a7edec..459021a9bc6 100644
--- a/src/devices/cpu/m6502/m6509.cpp
+++ b/src/devices/cpu/m6502/m6509.cpp
@@ -13,7 +13,7 @@
const device_type M6509 = &device_creator<m6509_device>;
-m6509_device::m6509_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m6509_device::m6509_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, M6509, "M6509", tag, owner, clock, "m6509", __FILE__), XPC(0), bank_i(0), bank_y(0)
{
program_config.m_addrbus_width = 20;
@@ -54,7 +54,7 @@ void m6509_device::state_export(const device_state_entry &entry)
}
}
-offs_t m6509_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6509_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
@@ -65,9 +65,9 @@ m6509_device::mi_6509_normal::mi_6509_normal(m6509_device *_base)
base = _base;
}
-UINT8 m6509_device::mi_6509_normal::read(UINT16 adr)
+uint8_t m6509_device::mi_6509_normal::read(uint16_t adr)
{
- UINT8 res = program->read_byte(base->adr_in_bank_i(adr));
+ uint8_t res = program->read_byte(base->adr_in_bank_i(adr));
if(adr == 0x0000)
res = base->bank_i_r();
else if(adr == 0x0001)
@@ -75,9 +75,9 @@ UINT8 m6509_device::mi_6509_normal::read(UINT16 adr)
return res;
}
-UINT8 m6509_device::mi_6509_normal::read_sync(UINT16 adr)
+uint8_t m6509_device::mi_6509_normal::read_sync(uint16_t adr)
{
- UINT8 res = sdirect->read_byte(base->adr_in_bank_i(adr));
+ uint8_t res = sdirect->read_byte(base->adr_in_bank_i(adr));
if(adr == 0x0000)
res = base->bank_i_r();
else if(adr == 0x0001)
@@ -85,9 +85,9 @@ UINT8 m6509_device::mi_6509_normal::read_sync(UINT16 adr)
return res;
}
-UINT8 m6509_device::mi_6509_normal::read_arg(UINT16 adr)
+uint8_t m6509_device::mi_6509_normal::read_arg(uint16_t adr)
{
- UINT8 res = direct->read_byte(base->adr_in_bank_i(adr));
+ uint8_t res = direct->read_byte(base->adr_in_bank_i(adr));
if(adr == 0x0000)
res = base->bank_i_r();
else if(adr == 0x0001)
@@ -95,9 +95,9 @@ UINT8 m6509_device::mi_6509_normal::read_arg(UINT16 adr)
return res;
}
-UINT8 m6509_device::mi_6509_normal::read_9(UINT16 adr)
+uint8_t m6509_device::mi_6509_normal::read_9(uint16_t adr)
{
- UINT8 res = program->read_byte(base->adr_in_bank_y(adr));
+ uint8_t res = program->read_byte(base->adr_in_bank_y(adr));
if(adr == 0x0000)
res = base->bank_i_r();
else if(adr == 0x0001)
@@ -105,7 +105,7 @@ UINT8 m6509_device::mi_6509_normal::read_9(UINT16 adr)
return res;
}
-void m6509_device::mi_6509_normal::write(UINT16 adr, UINT8 val)
+void m6509_device::mi_6509_normal::write(uint16_t adr, uint8_t val)
{
program->write_byte(base->adr_in_bank_i(adr), val);
if(adr == 0x0000)
@@ -114,7 +114,7 @@ void m6509_device::mi_6509_normal::write(UINT16 adr, UINT8 val)
base->bank_y_w(val);
}
-void m6509_device::mi_6509_normal::write_9(UINT16 adr, UINT8 val)
+void m6509_device::mi_6509_normal::write_9(uint16_t adr, uint8_t val)
{
program->write_byte(base->adr_in_bank_y(adr), val);
if(adr == 0x0000)
@@ -127,9 +127,9 @@ m6509_device::mi_6509_nd::mi_6509_nd(m6509_device *_base) : mi_6509_normal(_base
{
}
-UINT8 m6509_device::mi_6509_nd::read_sync(UINT16 adr)
+uint8_t m6509_device::mi_6509_nd::read_sync(uint16_t adr)
{
- UINT8 res = sprogram->read_byte(base->adr_in_bank_i(adr));
+ uint8_t res = sprogram->read_byte(base->adr_in_bank_i(adr));
if(adr == 0x0000)
res = base->bank_i_r();
else if(adr == 0x0001)
@@ -137,9 +137,9 @@ UINT8 m6509_device::mi_6509_nd::read_sync(UINT16 adr)
return res;
}
-UINT8 m6509_device::mi_6509_nd::read_arg(UINT16 adr)
+uint8_t m6509_device::mi_6509_nd::read_arg(uint16_t adr)
{
- UINT8 res = program->read_byte(base->adr_in_bank_i(adr));
+ uint8_t res = program->read_byte(base->adr_in_bank_i(adr));
if(adr == 0x0000)
res = base->bank_i_r();
else if(adr == 0x0001)
diff --git a/src/devices/cpu/m6502/m6509.h b/src/devices/cpu/m6502/m6509.h
index 803afcff0e9..ec9e8e6690a 100644
--- a/src/devices/cpu/m6502/m6509.h
+++ b/src/devices/cpu/m6502/m6509.h
@@ -15,11 +15,11 @@
class m6509_device : public m6502_device {
public:
- m6509_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m6509_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
@@ -30,37 +30,37 @@ protected:
mi_6509_normal(m6509_device *base);
virtual ~mi_6509_normal() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_9(UINT16 adr) override;
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
- virtual void write_9(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_9(uint16_t adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
+ virtual void write_9(uint16_t adr, uint8_t val) override;
};
class mi_6509_nd : public mi_6509_normal {
public:
mi_6509_nd(m6509_device *base);
virtual ~mi_6509_nd() {}
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
};
virtual void device_start() override;
virtual void device_reset() override;
virtual void state_export(const device_state_entry &entry) override;
- UINT32 XPC;
+ uint32_t XPC;
- UINT8 bank_i, bank_y;
+ uint8_t bank_i, bank_y;
- UINT8 bank_i_r() { return bank_i; }
- UINT8 bank_y_r() { return bank_y; }
- void bank_i_w(UINT8 data) { bank_i = data; }
- void bank_y_w(UINT8 data) { bank_y = data; }
+ uint8_t bank_i_r() { return bank_i; }
+ uint8_t bank_y_r() { return bank_y; }
+ void bank_i_w(uint8_t data) { bank_i = data; }
+ void bank_y_w(uint8_t data) { bank_y = data; }
- UINT32 adr_in_bank_i(UINT16 adr) { return adr | ((bank_i & 0xf) << 16); }
- UINT32 adr_in_bank_y(UINT16 adr) { return adr | ((bank_y & 0xf) << 16); }
+ uint32_t adr_in_bank_i(uint16_t adr) { return adr | ((bank_i & 0xf) << 16); }
+ uint32_t adr_in_bank_y(uint16_t adr) { return adr | ((bank_y & 0xf) << 16); }
#define O(o) void o ## _full(); void o ## _partial()
diff --git a/src/devices/cpu/m6502/m6510.cpp b/src/devices/cpu/m6502/m6510.cpp
index 32ee2d6d4e0..26d881438f2 100644
--- a/src/devices/cpu/m6502/m6510.cpp
+++ b/src/devices/cpu/m6502/m6510.cpp
@@ -13,7 +13,7 @@
const device_type M6510 = &device_creator<m6510_device>;
-m6510_device::m6510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m6510_device::m6510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, M6510, "M6510", tag, owner, clock, "m6510", __FILE__),
read_port(*this),
write_port(*this), dir(0), port(0), drive(0)
@@ -22,7 +22,7 @@ m6510_device::m6510_device(const machine_config &mconfig, const char *tag, devic
floating = 0x00;
}
-m6510_device::m6510_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+m6510_device::m6510_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
m6502_device(mconfig, type, name, tag, owner, clock, shortname, source),
read_port(*this),
write_port(*this), dir(0), port(0), drive(0)
@@ -31,13 +31,13 @@ m6510_device::m6510_device(const machine_config &mconfig, device_type type, cons
floating = 0x00;
}
-void m6510_device::set_pulls(UINT8 _pullup, UINT8 _floating)
+void m6510_device::set_pulls(uint8_t _pullup, uint8_t _floating)
{
pullup = _pullup;
floating = _floating;
}
-offs_t m6510_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6510_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
@@ -76,28 +76,28 @@ void m6510_device::update_port()
write_port((port & dir) | (pullup & ~dir));
}
-UINT8 m6510_device::get_port()
+uint8_t m6510_device::get_port()
{
return (port & dir) | (pullup & ~dir);
}
-UINT8 m6510_device::dir_r()
+uint8_t m6510_device::dir_r()
{
return dir;
}
-UINT8 m6510_device::port_r()
+uint8_t m6510_device::port_r()
{
return ((read_port() | (floating & drive)) & ~dir) | (port & dir);
}
-void m6510_device::dir_w(UINT8 data)
+void m6510_device::dir_w(uint8_t data)
{
dir = data;
update_port();
}
-void m6510_device::port_w(UINT8 data)
+void m6510_device::port_w(uint8_t data)
{
port = data;
update_port();
@@ -109,9 +109,9 @@ m6510_device::mi_6510_normal::mi_6510_normal(m6510_device *_base)
base = _base;
}
-UINT8 m6510_device::mi_6510_normal::read(UINT16 adr)
+uint8_t m6510_device::mi_6510_normal::read(uint16_t adr)
{
- UINT8 res = program->read_byte(adr);
+ uint8_t res = program->read_byte(adr);
if(adr == 0x0000)
res = base->dir_r();
else if(adr == 0x0001)
@@ -119,9 +119,9 @@ UINT8 m6510_device::mi_6510_normal::read(UINT16 adr)
return res;
}
-UINT8 m6510_device::mi_6510_normal::read_sync(UINT16 adr)
+uint8_t m6510_device::mi_6510_normal::read_sync(uint16_t adr)
{
- UINT8 res = sdirect->read_byte(adr);
+ uint8_t res = sdirect->read_byte(adr);
if(adr == 0x0000)
res = base->dir_r();
else if(adr == 0x0001)
@@ -129,9 +129,9 @@ UINT8 m6510_device::mi_6510_normal::read_sync(UINT16 adr)
return res;
}
-UINT8 m6510_device::mi_6510_normal::read_arg(UINT16 adr)
+uint8_t m6510_device::mi_6510_normal::read_arg(uint16_t adr)
{
- UINT8 res = direct->read_byte(adr);
+ uint8_t res = direct->read_byte(adr);
if(adr == 0x0000)
res = base->dir_r();
else if(adr == 0x0001)
@@ -139,7 +139,7 @@ UINT8 m6510_device::mi_6510_normal::read_arg(UINT16 adr)
return res;
}
-void m6510_device::mi_6510_normal::write(UINT16 adr, UINT8 val)
+void m6510_device::mi_6510_normal::write(uint16_t adr, uint8_t val)
{
program->write_byte(adr, val);
if(adr == 0x0000)
@@ -152,9 +152,9 @@ m6510_device::mi_6510_nd::mi_6510_nd(m6510_device *_base) : mi_6510_normal(_base
{
}
-UINT8 m6510_device::mi_6510_nd::read_sync(UINT16 adr)
+uint8_t m6510_device::mi_6510_nd::read_sync(uint16_t adr)
{
- UINT8 res = sprogram->read_byte(adr);
+ uint8_t res = sprogram->read_byte(adr);
if(adr == 0x0000)
res = base->dir_r();
else if(adr == 0x0001)
@@ -162,9 +162,9 @@ UINT8 m6510_device::mi_6510_nd::read_sync(UINT16 adr)
return res;
}
-UINT8 m6510_device::mi_6510_nd::read_arg(UINT16 adr)
+uint8_t m6510_device::mi_6510_nd::read_arg(uint16_t adr)
{
- UINT8 res = program->read_byte(adr);
+ uint8_t res = program->read_byte(adr);
if(adr == 0x0000)
res = base->dir_r();
else if(adr == 0x0001)
diff --git a/src/devices/cpu/m6502/m6510.h b/src/devices/cpu/m6502/m6510.h
index dbd0132baff..101d6bb2c71 100644
--- a/src/devices/cpu/m6502/m6510.h
+++ b/src/devices/cpu/m6502/m6510.h
@@ -21,11 +21,11 @@
class m6510_device : public m6502_device {
public:
- m6510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m6510_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m6510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6510_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
- UINT8 get_port();
- void set_pulls(UINT8 pullup, UINT8 pulldown);
+ uint8_t get_port();
+ void set_pulls(uint8_t pullup, uint8_t pulldown);
template<class _read, class _write> void set_callbacks(_read rd, _write wr) {
read_port.set_callback(rd);
@@ -34,7 +34,7 @@ public:
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
@@ -45,32 +45,32 @@ protected:
mi_6510_normal(m6510_device *base);
virtual ~mi_6510_normal() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
};
class mi_6510_nd : public mi_6510_normal {
public:
mi_6510_nd(m6510_device *base);
virtual ~mi_6510_nd() {}
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
};
devcb_read8 read_port;
devcb_write8 write_port;
- UINT8 pullup, floating, dir, port, drive;
+ uint8_t pullup, floating, dir, port, drive;
virtual void device_start() override;
virtual void device_reset() override;
- UINT8 dir_r();
- void dir_w(UINT8 data);
- UINT8 port_r();
- void port_w(UINT8 data);
+ uint8_t dir_r();
+ void dir_w(uint8_t data);
+ uint8_t port_r();
+ void port_w(uint8_t data);
void update_port();
diff --git a/src/devices/cpu/m6502/m6510t.cpp b/src/devices/cpu/m6502/m6510t.cpp
index 7e8a34c6f20..6b9bb1f16ad 100644
--- a/src/devices/cpu/m6502/m6510t.cpp
+++ b/src/devices/cpu/m6502/m6510t.cpp
@@ -13,7 +13,7 @@
const device_type M6510T = &device_creator<m6510t_device>;
-m6510t_device::m6510t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m6510t_device::m6510t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6510_device(mconfig, M6510T, "M6510T", tag, owner, clock, "m6510t", __FILE__)
{
}
diff --git a/src/devices/cpu/m6502/m6510t.h b/src/devices/cpu/m6502/m6510t.h
index f580ed6aef3..e27fe97ea98 100644
--- a/src/devices/cpu/m6502/m6510t.h
+++ b/src/devices/cpu/m6502/m6510t.h
@@ -21,7 +21,7 @@
class m6510t_device : public m6510_device {
public:
- m6510t_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m6510t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
enum {
diff --git a/src/devices/cpu/m6502/m65c02.cpp b/src/devices/cpu/m6502/m65c02.cpp
index 8af7e663e8b..1fe8882c63c 100644
--- a/src/devices/cpu/m6502/m65c02.cpp
+++ b/src/devices/cpu/m6502/m65c02.cpp
@@ -14,17 +14,17 @@
const device_type M65C02 = &device_creator<m65c02_device>;
-m65c02_device::m65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m65c02_device::m65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, M65C02, "M65C02", tag, owner, clock, "mc65c02", __FILE__)
{
}
-m65c02_device::m65c02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+m65c02_device::m65c02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
m6502_device(mconfig, type, name, tag, owner, clock, shortname, source)
{
}
-offs_t m65c02_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m65c02_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
diff --git a/src/devices/cpu/m6502/m65c02.h b/src/devices/cpu/m6502/m65c02.h
index 6a929368512..ff1dbc0c780 100644
--- a/src/devices/cpu/m6502/m65c02.h
+++ b/src/devices/cpu/m6502/m65c02.h
@@ -16,12 +16,12 @@
class m65c02_device : public m6502_device {
public:
- m65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m65c02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m65c02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
diff --git a/src/devices/cpu/m6502/m65ce02.cpp b/src/devices/cpu/m6502/m65ce02.cpp
index 50b7dcb2129..ce19861f70c 100644
--- a/src/devices/cpu/m6502/m65ce02.cpp
+++ b/src/devices/cpu/m6502/m65ce02.cpp
@@ -13,17 +13,17 @@
const device_type M65CE02 = &device_creator<m65ce02_device>;
-m65ce02_device::m65ce02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m65ce02_device::m65ce02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m65c02_device(mconfig, M65CE02, "M65CE02", tag, owner, clock, "m65ce02", __FILE__), TMP3(0), Z(0), B(0)
{
}
-m65ce02_device::m65ce02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+m65ce02_device::m65ce02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
m65c02_device(mconfig, type, name, tag, owner, clock, shortname, source), TMP3(0), Z(0), B(0)
{
}
-offs_t m65ce02_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m65ce02_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
diff --git a/src/devices/cpu/m6502/m65ce02.h b/src/devices/cpu/m6502/m65ce02.h
index d0d457d313c..2046975d103 100644
--- a/src/devices/cpu/m6502/m65ce02.h
+++ b/src/devices/cpu/m6502/m65ce02.h
@@ -15,19 +15,19 @@
class m65ce02_device : public m65c02_device {
public:
- m65ce02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m65ce02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m65ce02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m65ce02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
protected:
- UINT16 TMP3; /* temporary internal values */
- UINT8 Z; /* Z index register */
- UINT16 B; /* Zero page base address (always xx00) */
+ uint16_t TMP3; /* temporary internal values */
+ uint8_t Z; /* Z index register */
+ uint16_t B; /* Zero page base address (always xx00) */
virtual void init() override;
virtual void device_start() override;
diff --git a/src/devices/cpu/m6502/m65sc02.cpp b/src/devices/cpu/m6502/m65sc02.cpp
index f61bc63cf7f..e340fc0ca44 100644
--- a/src/devices/cpu/m6502/m65sc02.cpp
+++ b/src/devices/cpu/m6502/m65sc02.cpp
@@ -13,7 +13,7 @@
const device_type M65SC02 = &device_creator<m65sc02_device>;
-m65sc02_device::m65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m65sc02_device::m65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
r65c02_device(mconfig, M65SC02, "M65SC02", tag, owner, clock, "m65sc02", __FILE__)
{
}
diff --git a/src/devices/cpu/m6502/m65sc02.h b/src/devices/cpu/m6502/m65sc02.h
index f754fc3de89..13e91a3d0e1 100644
--- a/src/devices/cpu/m6502/m65sc02.h
+++ b/src/devices/cpu/m6502/m65sc02.h
@@ -15,7 +15,7 @@
class m65sc02_device : public r65c02_device {
public:
- m65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
enum {
diff --git a/src/devices/cpu/m6502/m740.cpp b/src/devices/cpu/m6502/m740.cpp
index 3659a773ef5..005446487db 100644
--- a/src/devices/cpu/m6502/m740.cpp
+++ b/src/devices/cpu/m6502/m740.cpp
@@ -13,17 +13,17 @@
const device_type M740 = &device_creator<m740_device>;
-m740_device::m740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m740_device::m740_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, M740, "M740", tag, owner, clock, "m740", __FILE__), m_irq_multiplex(0), m_irq_vector(0)
{
}
-m740_device::m740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+m740_device::m740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
m6502_device(mconfig, type, name, tag, owner, clock, shortname, source), m_irq_multiplex(0), m_irq_vector(0)
{
}
-offs_t m740_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m740_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
@@ -70,33 +70,33 @@ void m740_device::state_string_export(const device_state_entry &entry, std::stri
}
}
-UINT8 m740_device::do_clb(UINT8 in, UINT8 bit)
+uint8_t m740_device::do_clb(uint8_t in, uint8_t bit)
{
return in & ~(1<<bit);
}
-UINT8 m740_device::do_seb(UINT8 in, UINT8 bit)
+uint8_t m740_device::do_seb(uint8_t in, uint8_t bit)
{
return in | (1<<bit);
}
// swap the two nibbles of the input (Rotate Right Four bits)
// doesn't affect the flags
-UINT8 m740_device::do_rrf(UINT8 in)
+uint8_t m740_device::do_rrf(uint8_t in)
{
return ((in&0xf)<<4) | ((in&0xf0)>>4);
}
-void m740_device::do_sbc_dt(UINT8 val)
+void m740_device::do_sbc_dt(uint8_t val)
{
- UINT8 c = P & F_C ? 0 : 1;
+ uint8_t c = P & F_C ? 0 : 1;
P &= ~(F_N|F_V|F_Z|F_C);
- UINT16 diff = TMP2 - val - c;
- UINT8 al = (TMP2 & 15) - (val & 15) - c;
- if(INT8(al) < 0)
+ uint16_t diff = TMP2 - val - c;
+ uint8_t al = (TMP2 & 15) - (val & 15) - c;
+ if(int8_t(al) < 0)
al -= 6;
- UINT8 ah = (TMP2 >> 4) - (val >> 4) - (INT8(al) < 0);
- if(!UINT8(diff))
+ uint8_t ah = (TMP2 >> 4) - (val >> 4) - (int8_t(al) < 0);
+ if(!uint8_t(diff))
P |= F_Z;
else if(diff & 0x80)
P |= F_N;
@@ -104,18 +104,18 @@ void m740_device::do_sbc_dt(UINT8 val)
P |= F_V;
if(!(diff & 0xff00))
P |= F_C;
- if(INT8(ah) < 0)
+ if(int8_t(ah) < 0)
ah -= 6;
TMP2 = (ah << 4) | (al & 15);
}
-void m740_device::do_sbc_ndt(UINT8 val)
+void m740_device::do_sbc_ndt(uint8_t val)
{
- UINT16 diff = TMP2 - val - (P & F_C ? 0 : 1);
+ uint16_t diff = TMP2 - val - (P & F_C ? 0 : 1);
P &= ~(F_N|F_V|F_Z|F_C);
- if(!UINT8(diff))
+ if(!uint8_t(diff))
P |= F_Z;
- else if(INT8(diff) < 0)
+ else if(int8_t(diff) < 0)
P |= F_N;
if((TMP2^val) & (TMP2^diff) & 0x80)
P |= F_V;
@@ -124,7 +124,7 @@ void m740_device::do_sbc_ndt(UINT8 val)
TMP2 = diff;
}
-void m740_device::do_sbct(UINT8 val)
+void m740_device::do_sbct(uint8_t val)
{
if(P & F_D)
do_sbc_dt(val);
@@ -132,15 +132,15 @@ void m740_device::do_sbct(UINT8 val)
do_sbc_ndt(val);
}
-void m740_device::do_adc_dt(UINT8 val)
+void m740_device::do_adc_dt(uint8_t val)
{
- UINT8 c = P & F_C ? 1 : 0;
+ uint8_t c = P & F_C ? 1 : 0;
P &= ~(F_N|F_V|F_Z|F_C);
- UINT8 al = (TMP2 & 15) + (val & 15) + c;
+ uint8_t al = (TMP2 & 15) + (val & 15) + c;
if(al > 9)
al += 6;
- UINT8 ah = (TMP2 >> 4) + (val >> 4) + (al > 15);
- if(!UINT8(TMP2 + val + c))
+ uint8_t ah = (TMP2 >> 4) + (val >> 4) + (al > 15);
+ if(!uint8_t(TMP2 + val + c))
P |= F_Z;
else if(ah & 8)
P |= F_N;
@@ -153,14 +153,14 @@ void m740_device::do_adc_dt(UINT8 val)
TMP2 = (ah << 4) | (al & 15);
}
-void m740_device::do_adc_ndt(UINT8 val)
+void m740_device::do_adc_ndt(uint8_t val)
{
- UINT16 sum;
+ uint16_t sum;
sum = TMP2 + val + (P & F_C ? 1 : 0);
P &= ~(F_N|F_V|F_Z|F_C);
- if(!UINT8(sum))
+ if(!uint8_t(sum))
P |= F_Z;
- else if(INT8(sum) < 0)
+ else if(int8_t(sum) < 0)
P |= F_N;
if(~(TMP2^val) & (TMP2^sum) & 0x80)
P |= F_V;
@@ -169,7 +169,7 @@ void m740_device::do_adc_ndt(UINT8 val)
TMP2 = sum;
}
-void m740_device::do_adct(UINT8 val)
+void m740_device::do_adct(uint8_t val)
{
if(P & F_D)
do_adc_dt(val);
@@ -231,7 +231,7 @@ void m740_device::set_irq_line(int line, int state)
{
if (m_irq_multiplex & (1 << i))
{
- m_irq_vector = 0xfffc - (UINT16)(2 * i);
+ m_irq_vector = 0xfffc - (uint16_t)(2 * i);
break;
}
}
diff --git a/src/devices/cpu/m6502/m740.h b/src/devices/cpu/m6502/m740.h
index 7f312b256cd..214cede5edc 100644
--- a/src/devices/cpu/m6502/m740.h
+++ b/src/devices/cpu/m6502/m740.h
@@ -36,8 +36,8 @@ public:
M740_SET_OVERFLOW = m6502_device::V_LINE
};
- m740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m740_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m740_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
virtual void device_start() override;
virtual void device_reset() override;
@@ -46,7 +46,7 @@ public:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -54,15 +54,15 @@ public:
protected:
#define O(o) void o ## _full(); void o ## _partial()
- UINT8 do_clb(UINT8 in, UINT8 bit);
- UINT8 do_seb(UINT8 in, UINT8 bit);
- UINT8 do_rrf(UINT8 in);
- void do_sbc_dt(UINT8 val);
- void do_sbc_ndt(UINT8 val);
- void do_sbct(UINT8 val);
- void do_adc_dt(UINT8 val);
- void do_adc_ndt(UINT8 val);
- void do_adct(UINT8 val);
+ uint8_t do_clb(uint8_t in, uint8_t bit);
+ uint8_t do_seb(uint8_t in, uint8_t bit);
+ uint8_t do_rrf(uint8_t in);
+ void do_sbc_dt(uint8_t val);
+ void do_sbc_ndt(uint8_t val);
+ void do_sbct(uint8_t val);
+ void do_adc_dt(uint8_t val);
+ void do_adc_ndt(uint8_t val);
+ void do_adct(uint8_t val);
// m740 opcodes
O(brk740_imp);
@@ -94,8 +94,8 @@ protected:
#undef O
- UINT32 m_irq_multiplex;
- UINT16 m_irq_vector;
+ uint32_t m_irq_multiplex;
+ uint16_t m_irq_vector;
void set_irq_line(int line, int state);
};
diff --git a/src/devices/cpu/m6502/m7501.cpp b/src/devices/cpu/m6502/m7501.cpp
index 83bc290a172..54e7bdb7456 100644
--- a/src/devices/cpu/m6502/m7501.cpp
+++ b/src/devices/cpu/m6502/m7501.cpp
@@ -13,7 +13,7 @@
const device_type M7501 = &device_creator<m7501_device>;
-m7501_device::m7501_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m7501_device::m7501_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6510_device(mconfig, M7501, "M7501", tag, owner, clock, "m7501", __FILE__)
{
}
diff --git a/src/devices/cpu/m6502/m7501.h b/src/devices/cpu/m6502/m7501.h
index 7ded4caffe2..7912d3af0de 100644
--- a/src/devices/cpu/m6502/m7501.h
+++ b/src/devices/cpu/m6502/m7501.h
@@ -21,7 +21,7 @@
class m7501_device : public m6510_device {
public:
- m7501_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m7501_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
enum {
diff --git a/src/devices/cpu/m6502/m8502.cpp b/src/devices/cpu/m6502/m8502.cpp
index a967d03d74c..97d66d4431c 100644
--- a/src/devices/cpu/m6502/m8502.cpp
+++ b/src/devices/cpu/m6502/m8502.cpp
@@ -13,7 +13,7 @@
const device_type M8502 = &device_creator<m8502_device>;
-m8502_device::m8502_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+m8502_device::m8502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6510_device(mconfig, M8502, "M8502", tag, owner, clock, "m8502", __FILE__)
{
}
diff --git a/src/devices/cpu/m6502/m8502.h b/src/devices/cpu/m6502/m8502.h
index 1969ba6ffad..4967f8379bc 100644
--- a/src/devices/cpu/m6502/m8502.h
+++ b/src/devices/cpu/m6502/m8502.h
@@ -21,7 +21,7 @@
class m8502_device : public m6510_device {
public:
- m8502_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m8502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
enum {
diff --git a/src/devices/cpu/m6502/n2a03.cpp b/src/devices/cpu/m6502/n2a03.cpp
index 0f58f837f00..fb237cee295 100644
--- a/src/devices/cpu/m6502/n2a03.cpp
+++ b/src/devices/cpu/m6502/n2a03.cpp
@@ -49,14 +49,14 @@ ADDRESS_MAP_END
-n2a03_device::n2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+n2a03_device::n2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, N2A03, "N2A03", tag, owner, clock, "n2a03", __FILE__),
m_apu(*this, "nesapu"),
m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME(n2a03_map))
{
}
-offs_t n2a03_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t n2a03_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
@@ -76,42 +76,42 @@ void n2a03_device::device_start()
init();
}
-UINT8 n2a03_device::mi_2a03_normal::read(UINT16 adr)
+uint8_t n2a03_device::mi_2a03_normal::read(uint16_t adr)
{
return program->read_byte(adr);
}
-UINT8 n2a03_device::mi_2a03_normal::read_sync(UINT16 adr)
+uint8_t n2a03_device::mi_2a03_normal::read_sync(uint16_t adr)
{
return sdirect->read_byte(adr);
}
-UINT8 n2a03_device::mi_2a03_normal::read_arg(UINT16 adr)
+uint8_t n2a03_device::mi_2a03_normal::read_arg(uint16_t adr)
{
return direct->read_byte(adr);
}
-void n2a03_device::mi_2a03_normal::write(UINT16 adr, UINT8 val)
+void n2a03_device::mi_2a03_normal::write(uint16_t adr, uint8_t val)
{
program->write_byte(adr, val);
}
-UINT8 n2a03_device::mi_2a03_nd::read(UINT16 adr)
+uint8_t n2a03_device::mi_2a03_nd::read(uint16_t adr)
{
return program->read_byte(adr);
}
-UINT8 n2a03_device::mi_2a03_nd::read_sync(UINT16 adr)
+uint8_t n2a03_device::mi_2a03_nd::read_sync(uint16_t adr)
{
return sprogram->read_byte(adr);
}
-UINT8 n2a03_device::mi_2a03_nd::read_arg(UINT16 adr)
+uint8_t n2a03_device::mi_2a03_nd::read_arg(uint16_t adr)
{
return program->read_byte(adr);
}
-void n2a03_device::mi_2a03_nd::write(UINT16 adr, UINT8 val)
+void n2a03_device::mi_2a03_nd::write(uint16_t adr, uint8_t val)
{
program->write_byte(adr, val);
}
diff --git a/src/devices/cpu/m6502/n2a03.h b/src/devices/cpu/m6502/n2a03.h
index 57c8f6b43cd..9d01b5b6f83 100644
--- a/src/devices/cpu/m6502/n2a03.h
+++ b/src/devices/cpu/m6502/n2a03.h
@@ -16,13 +16,13 @@
class n2a03_device : public m6502_device {
public:
- n2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ n2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
required_device<nesapu_device> m_apu;
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
virtual void device_clock_changed() override;
@@ -36,19 +36,19 @@ protected:
class mi_2a03_normal : public memory_interface {
public:
virtual ~mi_2a03_normal() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
};
class mi_2a03_nd : public memory_interface {
public:
virtual ~mi_2a03_nd() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_sync(UINT16 adr) override;
- virtual UINT8 read_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_sync(uint16_t adr) override;
+ virtual uint8_t read_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
};
virtual void device_start() override;
diff --git a/src/devices/cpu/m6502/om6502.lst b/src/devices/cpu/m6502/om6502.lst
index 93026a1fc8b..404eb1b6aad 100644
--- a/src/devices/cpu/m6502/om6502.lst
+++ b/src/devices/cpu/m6502/om6502.lst
@@ -66,7 +66,7 @@ adc_zpg
adc_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
do_adc(TMP);
prefetch();
@@ -134,7 +134,7 @@ and_zpg
and_zpx
TMP = read_pc();
read(TMP);
- A &= read(UINT8(TMP+X));
+ A &= read(uint8_t(TMP+X));
set_nz(A);
prefetch();
@@ -174,7 +174,7 @@ asl_zpg
asl_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_asl(TMP2);
@@ -185,10 +185,10 @@ bcc_rel
TMP = read_pc();
if(!(P & F_C)) {
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -196,10 +196,10 @@ bcs_rel
TMP = read_pc();
if(P & F_C) {
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -207,10 +207,10 @@ beq_rel
TMP = read_pc();
if(P & F_Z) {
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -229,10 +229,10 @@ bmi_rel
TMP = read_pc();
if(P & F_N) {
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -240,10 +240,10 @@ bne_rel
TMP = read_pc();
if(!(P & F_Z)) {
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -251,10 +251,10 @@ bpl_rel
TMP = read_pc();
if(!(P & F_N)) {
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -291,10 +291,10 @@ bvc_rel
TMP = read_pc();
if(!(P & F_V)) {
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -302,10 +302,10 @@ bvs_rel
TMP = read_pc();
if(P & F_V) {
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -391,7 +391,7 @@ cmp_zpg
cmp_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
do_cmp(A, TMP);
prefetch();
@@ -465,7 +465,7 @@ dec_zpg
dec_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2--;
@@ -549,7 +549,7 @@ eor_zpg
eor_zpx
TMP = read_pc();
read(TMP);
- A ^= read(UINT8(TMP+X));
+ A ^= read(uint8_t(TMP+X));
set_nz(A);
prefetch();
@@ -587,7 +587,7 @@ inc_zpg
inc_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2++;
@@ -693,7 +693,7 @@ lda_zpg
lda_zpx
TMP = read_pc();
read(TMP);
- A = read(UINT8(TMP+X));
+ A = read(uint8_t(TMP+X));
set_nz(A);
prefetch();
@@ -728,7 +728,7 @@ ldx_zpg
ldx_zpy
TMP = read_pc();
read(TMP);
- X = read(UINT8(TMP+Y));
+ X = read(uint8_t(TMP+Y));
set_nz(X);
prefetch();
@@ -764,7 +764,7 @@ ldy_zpg
ldy_zpx
TMP = read_pc();
read(TMP);
- Y = read(UINT8(TMP+X));
+ Y = read(uint8_t(TMP+X));
set_nz(Y);
prefetch();
@@ -804,7 +804,7 @@ lsr_zpg
lsr_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_lsr(TMP2);
@@ -879,7 +879,7 @@ ora_zpg
ora_zpx
TMP = read_pc();
read(TMP);
- A |= read(UINT8(TMP+X));
+ A |= read(uint8_t(TMP+X));
set_nz(A);
prefetch();
@@ -947,7 +947,7 @@ rol_zpg
rol_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_rol(TMP2);
@@ -990,7 +990,7 @@ ror_zpg
ror_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_ror(TMP2);
@@ -1080,7 +1080,7 @@ sbc_zpg
sbc_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
do_sbc(TMP);
prefetch();
@@ -1144,7 +1144,7 @@ sta_zpg
sta_zpx
TMP = read_pc();
read(TMP);
- write(UINT8(TMP+X), A);
+ write(uint8_t(TMP+X), A);
prefetch();
stx_aba
@@ -1161,7 +1161,7 @@ stx_zpg
stx_zpy
TMP = read_pc();
read(TMP);
- write(UINT8(TMP+Y), X);
+ write(uint8_t(TMP+Y), X);
prefetch();
sty_aba
@@ -1178,7 +1178,7 @@ sty_zpg
sty_zpx
TMP = read_pc();
read(TMP);
- write(UINT8(TMP+X), Y);
+ write(uint8_t(TMP+X), Y);
prefetch();
tax_imp
@@ -1297,7 +1297,7 @@ dcp_zpg
dcp_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2--;
@@ -1377,7 +1377,7 @@ isb_zpg
isb_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2++;
@@ -1431,7 +1431,7 @@ lax_zpg
lax_zpy
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+Y);
+ TMP = uint8_t(TMP+Y);
A = X = read(TMP);
set_nz(A);
prefetch();
@@ -1514,7 +1514,7 @@ rla_zpg
rla_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_rol(TMP2);
@@ -1595,7 +1595,7 @@ rra_zpg
rra_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_ror(TMP2);
@@ -1629,7 +1629,7 @@ sax_zpg
sax_zpy
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+Y);
+ TMP = uint8_t(TMP+Y);
TMP2 = A & X;
write(TMP, TMP2);
prefetch();
@@ -1785,7 +1785,7 @@ slo_zpg
slo_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_asl(TMP2);
@@ -1872,7 +1872,7 @@ sre_zpg
sre_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_lsr(TMP2);
@@ -1952,7 +1952,7 @@ nop_zpg
nop_zpx
TMP = read_pc();
read(TMP);
- read(UINT8(TMP+X));
+ read(uint8_t(TMP+X));
prefetch();
# system killers
diff --git a/src/devices/cpu/m6502/om65c02.lst b/src/devices/cpu/m6502/om65c02.lst
index c2536d2c11d..6f72fe7e29a 100644
--- a/src/devices/cpu/m6502/om65c02.lst
+++ b/src/devices/cpu/m6502/om65c02.lst
@@ -103,7 +103,7 @@ adc_c_zpi
adc_c_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
do_adc(TMP);
if(P & F_D) {
read_pc_noinc();
@@ -139,7 +139,7 @@ bbr_zpb
TMP = read_pc();
read_pc_noinc();
if(!(TMP2 & (1 << ((inst_state >> 4) & 7)))) {
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -150,7 +150,7 @@ bbs_zpb
TMP = read_pc();
read_pc_noinc();
if(TMP2 & (1 << ((inst_state >> 4) & 7))) {
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -175,17 +175,17 @@ bit_imm
bit_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
do_bit(TMP);
prefetch();
bra_rel
TMP = read_pc();
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
brk_c_imp
@@ -474,7 +474,7 @@ sbc_c_zpi
sbc_c_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
do_sbc(TMP);
if(P & F_D) {
read_pc_noinc();
@@ -524,7 +524,7 @@ stz_zpg
stz_zpx
TMP = read_pc();
read(TMP);
- write(UINT8(TMP+X), 0x00);
+ write(uint8_t(TMP+X), 0x00);
prefetch();
trb_aba
diff --git a/src/devices/cpu/m6502/om65ce02.lst b/src/devices/cpu/m6502/om65ce02.lst
index f5b6beebc9a..85648fd610d 100644
--- a/src/devices/cpu/m6502/om65ce02.lst
+++ b/src/devices/cpu/m6502/om65ce02.lst
@@ -79,7 +79,7 @@ adc_ce_zpg
adc_ce_zpx
TMP = read_pc();
- TMP = read(B|UINT8(TMP+X));
+ TMP = read(B|uint8_t(TMP+X));
do_adc(TMP);
if(P & F_D)
set_nz(A);
@@ -137,7 +137,7 @@ and_ce_zpg
and_ce_zpx
TMP = read_pc();
- A &= read(B|UINT8(TMP+X));
+ A &= read(B|uint8_t(TMP+X));
set_nz(A);
prefetch();
@@ -171,7 +171,7 @@ asl_ce_zpg
asl_ce_zpx
TMP = read_pc();
- TMP = B|UINT8(TMP+X);
+ TMP = B|uint8_t(TMP+X);
TMP2 = read(TMP);
TMP2 = do_asl(TMP2);
write(TMP, TMP2);
@@ -190,7 +190,7 @@ asr_zpg
asr_zpx
TMP = read_pc();
- TMP = B|UINT8(TMP+X);
+ TMP = B|uint8_t(TMP+X);
TMP2 = read(TMP);
TMP2 = do_asr(TMP2);
write(TMP, TMP2);
@@ -225,7 +225,7 @@ bbr_ce_zpb
TMP2 = read(TMP);
TMP = read_pc();
if(!(TMP2 & (1 << ((inst_state >> 4) & 7))))
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bbs_ce_zpb
@@ -234,13 +234,13 @@ bbs_ce_zpb
TMP2 = read(TMP);
TMP = read_pc();
if(TMP2 & (1 << ((inst_state >> 4) & 7)))
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bcc_ce_rel
TMP = read_pc();
if(!(P & F_C))
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bcc_rw2
@@ -253,7 +253,7 @@ bcc_rw2
bcs_ce_rel
TMP = read_pc();
if(P & F_C)
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bcs_rw2
@@ -266,7 +266,7 @@ bcs_rw2
beq_ce_rel
TMP = read_pc();
if(P & F_Z)
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
beq_rw2
@@ -295,14 +295,14 @@ bit_ce_zpg
bit_ce_zpx
TMP = read_pc();
- TMP = read(B|UINT8(TMP+X));
+ TMP = read(B|uint8_t(TMP+X));
do_bit(TMP);
prefetch();
bmi_ce_rel
TMP = read_pc();
if(P & F_N)
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bmi_rw2
@@ -315,7 +315,7 @@ bmi_rw2
bne_ce_rel
TMP = read_pc();
if(!(P & F_Z))
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bne_rw2
@@ -328,7 +328,7 @@ bne_rw2
bpl_ce_rel
TMP = read_pc();
if(!(P & F_N))
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bpl_rw2
@@ -340,7 +340,7 @@ bpl_rw2
bra_ce_rel
TMP = read_pc();
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bra_rw2
@@ -387,7 +387,7 @@ bsr_rw2
bvc_ce_rel
TMP = read_pc();
if(!(P & F_V))
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bvc_rw2
@@ -400,7 +400,7 @@ bvc_rw2
bvs_ce_rel
TMP = read_pc();
if(P & F_V)
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
bvs_rw2
@@ -482,7 +482,7 @@ cmp_ce_zpg
cmp_ce_zpx
TMP = read_pc();
read(TMP);
- TMP = read(B|UINT8(TMP+X));
+ TMP = read(B|uint8_t(TMP+X));
do_cmp(A, TMP);
prefetch();
@@ -550,7 +550,7 @@ dec_ce_zpg
dec_ce_zpx
TMP = read_pc();
- TMP = B|UINT8(TMP+X);
+ TMP = B|uint8_t(TMP+X);
TMP2 = read(TMP);
TMP2--;
set_nz(TMP2);
@@ -641,7 +641,7 @@ eor_ce_zpg
eor_ce_zpx
TMP = read_pc();
- A ^= read(B|UINT8(TMP+X));
+ A ^= read(B|uint8_t(TMP+X));
set_nz(A);
prefetch();
@@ -679,7 +679,7 @@ inc_ce_zpg
inc_ce_zpx
TMP = read_pc();
- TMP = B|UINT8(TMP+X);
+ TMP = B|uint8_t(TMP+X);
TMP2 = read(TMP);
TMP2++;
set_nz(TMP2);
@@ -830,7 +830,7 @@ lda_ce_zpg
lda_ce_zpx
TMP = read_pc();
- A = read(B|UINT8(TMP+X));
+ A = read(B|uint8_t(TMP+X));
set_nz(A);
prefetch();
@@ -849,7 +849,7 @@ ldx_ce_zpg
ldx_ce_zpy
TMP = read_pc();
- X = read(B|UINT8(TMP+Y));
+ X = read(B|uint8_t(TMP+Y));
set_nz(X);
prefetch();
@@ -869,7 +869,7 @@ ldy_ce_zpg
ldy_ce_zpx
TMP = read_pc();
- Y = read(B|UINT8(TMP+X));
+ Y = read(B|uint8_t(TMP+X));
set_nz(Y);
prefetch();
@@ -923,7 +923,7 @@ lsr_ce_zpg
lsr_ce_zpx
TMP = read_pc();
- TMP = B|UINT8(TMP+X);
+ TMP = B|uint8_t(TMP+X);
TMP2 = read(TMP);
TMP2 = do_lsr(TMP2);
write(TMP, TMP2);
@@ -987,7 +987,7 @@ ora_ce_zpg
ora_ce_zpx
TMP = read_pc();
- A |= read(B|UINT8(TMP+X));
+ A |= read(B|uint8_t(TMP+X));
set_nz(A);
prefetch();
@@ -1114,7 +1114,7 @@ rol_ce_zpg
rol_ce_zpx
TMP = read_pc();
- TMP = B|UINT8(TMP+X);
+ TMP = B|uint8_t(TMP+X);
TMP2 = read(TMP);
TMP2 = do_rol(TMP2);
write(TMP, TMP2);
@@ -1150,7 +1150,7 @@ ror_ce_zpg
ror_ce_zpx
TMP = read_pc();
- TMP = B|UINT8(TMP+X);
+ TMP = B|uint8_t(TMP+X);
TMP2 = read(TMP);
TMP2 = do_ror(TMP2);
write(TMP, TMP2);
@@ -1287,7 +1287,7 @@ sbc_ce_zpg
sbc_ce_zpx
TMP = read_pc();
read(TMP);
- TMP = read(B|UINT8(TMP+X));
+ TMP = read(B|uint8_t(TMP+X));
do_sbc(TMP);
if(P & F_D)
set_nz(A);
@@ -1374,7 +1374,7 @@ sta_ce_zpg
sta_ce_zpx
TMP = read_pc();
- write(B|UINT8(TMP+X), A);
+ write(B|uint8_t(TMP+X), A);
prefetch();
stx_aby
@@ -1390,7 +1390,7 @@ stx_ce_zpg
stx_ce_zpy
TMP = read_pc();
- write(B|UINT8(TMP+Y), X);
+ write(B|uint8_t(TMP+Y), X);
prefetch();
sty_abx
@@ -1406,7 +1406,7 @@ sty_ce_zpg
sty_ce_zpx
TMP = read_pc();
- write(B|UINT8(TMP+X), Y);
+ write(B|uint8_t(TMP+X), Y);
prefetch();
stz_ce_aba
@@ -1428,7 +1428,7 @@ stz_ce_zpg
stz_ce_zpx
TMP = read_pc();
- write(B|UINT8(TMP+X), Z);
+ write(B|uint8_t(TMP+X), Z);
prefetch();
tab_imp
diff --git a/src/devices/cpu/m6502/om740.lst b/src/devices/cpu/m6502/om740.lst
index f5ea32d49dc..0d84ca7cb5d 100644
--- a/src/devices/cpu/m6502/om740.lst
+++ b/src/devices/cpu/m6502/om740.lst
@@ -60,7 +60,7 @@ bbc_bzr
TMP = read_pc();
read_pc_noinc();
if(!(TMP2 & (1 << ((IR>>5) & 7)))) {
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -70,7 +70,7 @@ bbs_bzr
TMP = read_pc();
read_pc_noinc();
if(TMP2 & (1 << ((IR>>5) & 7))) {
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -78,7 +78,7 @@ bbc_bar
TMP = read_pc();
read_pc_noinc();
if(!(A & (1 << ((IR>>5) & 7)))) {
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -86,7 +86,7 @@ bbs_bar
TMP = read_pc();
read_pc_noinc();
if(A & (1 << ((IR>>5) & 7))) {
- PC += INT8(TMP);
+ PC += int8_t(TMP);
}
prefetch();
@@ -100,10 +100,10 @@ rrf_zpg
bra_rel
TMP = read_pc();
read_pc_noinc();
- if(page_changing(PC, INT8(TMP))) {
- read_arg(set_l(PC, PC+INT8(TMP)));
+ if(page_changing(PC, int8_t(TMP))) {
+ read_arg(set_l(PC, PC+int8_t(TMP)));
}
- PC += INT8(TMP);
+ PC += int8_t(TMP);
prefetch();
jmp_zpi
@@ -226,7 +226,7 @@ adct_zpg
adct_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
TMP2 = read(X);
do_adct(TMP);
write(X, TMP2);
@@ -311,7 +311,7 @@ andt_zpx
TMP = read_pc();
read(TMP);
TMP2 = read(X);
- TMP2 &= read(UINT8(TMP+X));
+ TMP2 &= read(uint8_t(TMP+X));
set_nz(TMP2);
write(X, TMP2);
prefetch();
@@ -393,7 +393,7 @@ cmpt_zpg
cmpt_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
TMP2 = read(X);
do_cmp(TMP2, TMP);
prefetch();
@@ -491,7 +491,7 @@ eort_zpx
TMP = read_pc();
read(TMP);
TMP2 = read(X);
- TMP2 ^= read(UINT8(TMP+X));
+ TMP2 ^= read(uint8_t(TMP+X));
set_nz(TMP2);
write(X, TMP2);
prefetch();
@@ -579,7 +579,7 @@ ldt_zpg
ldt_zpx
TMP = read_pc();
read(TMP);
- TMP2 = read(UINT8(TMP+X));
+ TMP2 = read(uint8_t(TMP+X));
set_nz(TMP2);
write(X, TMP2);
prefetch();
@@ -663,7 +663,7 @@ ort_zpx
TMP = read_pc();
read(TMP);
TMP2 = read(X);
- TMP2 |= read(UINT8(TMP+X));
+ TMP2 |= read(uint8_t(TMP+X));
set_nz(TMP2);
write(X, TMP2);
prefetch();
@@ -744,7 +744,7 @@ sbct_zpg
sbct_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
TMP2 = read(X);
do_sbct(TMP);
write(X, TMP2);
diff --git a/src/devices/cpu/m6502/on2a03.lst b/src/devices/cpu/m6502/on2a03.lst
index 2719f7c6ad2..096c5f08211 100644
--- a/src/devices/cpu/m6502/on2a03.lst
+++ b/src/devices/cpu/m6502/on2a03.lst
@@ -63,7 +63,7 @@ adc_nd_zpg
adc_nd_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
do_adc_nd(TMP);
prefetch();
@@ -144,7 +144,7 @@ rra_nd_zpg
rra_nd_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2 = do_ror(TMP2);
@@ -214,7 +214,7 @@ sbc_nd_zpg
sbc_nd_zpx
TMP = read_pc();
read(TMP);
- TMP = read(UINT8(TMP+X));
+ TMP = read(uint8_t(TMP+X));
do_sbc_nd(TMP);
prefetch();
@@ -290,7 +290,7 @@ isb_nd_zpg
isb_nd_zpx
TMP = read_pc();
read(TMP);
- TMP = UINT8(TMP+X);
+ TMP = uint8_t(TMP+X);
TMP2 = read(TMP);
write(TMP, TMP2);
TMP2++;
diff --git a/src/devices/cpu/m6502/r65c02.cpp b/src/devices/cpu/m6502/r65c02.cpp
index 7aca4506731..fe0c4826a83 100644
--- a/src/devices/cpu/m6502/r65c02.cpp
+++ b/src/devices/cpu/m6502/r65c02.cpp
@@ -13,17 +13,17 @@
const device_type R65C02 = &device_creator<r65c02_device>;
-r65c02_device::r65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+r65c02_device::r65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m65c02_device(mconfig, R65C02, "R65C02", tag, owner, clock, "r65c02", __FILE__)
{
}
-r65c02_device::r65c02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+r65c02_device::r65c02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
m65c02_device(mconfig, type, name, tag, owner, clock, shortname, source)
{
}
-offs_t r65c02_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t r65c02_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disassemble_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
diff --git a/src/devices/cpu/m6502/r65c02.h b/src/devices/cpu/m6502/r65c02.h
index 75077aab749..d25b1facf40 100644
--- a/src/devices/cpu/m6502/r65c02.h
+++ b/src/devices/cpu/m6502/r65c02.h
@@ -15,12 +15,12 @@
class r65c02_device : public m65c02_device {
public:
- r65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- r65c02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ r65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ r65c02_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
};
diff --git a/src/devices/cpu/m6800/6800dasm.cpp b/src/devices/cpu/m6800/6800dasm.cpp
index 2e94ef3b62d..483f0abc353 100644
--- a/src/devices/cpu/m6800/6800dasm.cpp
+++ b/src/devices/cpu/m6800/6800dasm.cpp
@@ -84,7 +84,7 @@ static const char *const op_name_str[] = {
* 2 invalid opcode for 1:6800/6802/6808, 2:6801/6803, 4:HD63701
*/
-static const UINT8 table[0x104][3] = {
+static const uint8_t table[0x104][3] = {
{ill, inh,7},{nop, inh,0},{ill, inh,7},{ill, inh,7},/* 00 */
{lsrd,inh,1},{asld,inh,1},{tap, inh,0},{tpa, inh,0},
{inx, inh,0},{dex, inh,0},{clv, inh,0},{sev, inh,0},
@@ -166,12 +166,12 @@ static const UINT8 table[0x104][3] = {
#define ARG2 opram[2]
#define ARGW (opram[1]<<8) + opram[2]
-static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const UINT8 *oprom, const UINT8 *opram)
+static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const uint8_t *oprom, const uint8_t *opram)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
int invalid_mask;
int code = OP;
- UINT8 opcode, args, invalid;
+ uint8_t opcode, args, invalid;
switch( subtype )
{
@@ -218,7 +218,7 @@ static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const UINT8 *opro
switch( args )
{
case rel: /* relative */
- sprintf (buf, "$%04X", pc + (INT8)ARG1 + 2);
+ sprintf (buf, "$%04X", pc + (int8_t)ARG1 + 2);
return 2 | flags | DASMFLAG_SUPPORTED;
case imb: /* immediate (byte) */
sprintf (buf, "#$%02X", ARG1);
diff --git a/src/devices/cpu/m6800/6800ops.hxx b/src/devices/cpu/m6800/6800ops.hxx
index 2138103bd41..a931d29b0b5 100644
--- a/src/devices/cpu/m6800/6800ops.hxx
+++ b/src/devices/cpu/m6800/6800ops.hxx
@@ -44,7 +44,7 @@ OP_HANDLER( nop )
/* $04 LSRD inherent -0*-* */
OP_HANDLER( lsrd )
{
- UINT16 t;
+ uint16_t t;
CLR_NZC; t = D; CC|=(t&0x0001);
t>>=1; SET_Z16(t); D=t;
}
@@ -53,7 +53,7 @@ OP_HANDLER( lsrd )
OP_HANDLER( asld )
{
int r;
- UINT16 t;
+ uint16_t t;
t = D; r=t<<1;
CLR_NZVC; SET_FLAGS16(t,t,r);
D=r;
@@ -130,7 +130,7 @@ OP_HANDLER( sei )
/* $10 SBA inherent -**** */
OP_HANDLER( sba )
{
- UINT16 t;
+ uint16_t t;
t=A-B;
CLR_NZVC; SET_FLAGS8(A,B,t);
A=t;
@@ -139,7 +139,7 @@ OP_HANDLER( sba )
/* $11 CBA inherent -**** */
OP_HANDLER( cba )
{
- UINT16 t;
+ uint16_t t;
t=A-B;
CLR_NZVC; SET_FLAGS8(A,B,t);
}
@@ -178,7 +178,7 @@ OP_HANDLER( tba )
/* $18 XGDX inherent ----- */ /* HD63701YO only */
OP_HANDLER( xgdx )
{
- UINT16 t = X;
+ uint16_t t = X;
X = D;
D=t;
}
@@ -186,15 +186,15 @@ OP_HANDLER( xgdx )
/* $19 DAA inherent (A) -**0* */
OP_HANDLER( daa )
{
- UINT8 msn, lsn;
- UINT16 t, cf = 0;
+ uint8_t msn, lsn;
+ uint16_t t, cf = 0;
msn=A & 0xf0; lsn=A & 0x0f;
if( lsn>0x09 || CC&0x20 ) cf |= 0x06;
if( msn>0x80 && lsn>0x09 ) cf |= 0x60;
if( msn>0x90 || CC&0x01 ) cf |= 0x60;
t = cf + A;
CLR_NZV; /* keep carry from previous operation */
- SET_NZ8((UINT8)t); SET_C8(t);
+ SET_NZ8((uint8_t)t); SET_C8(t);
A = t;
}
@@ -211,7 +211,7 @@ OP_HANDLER( slp )
/* $1b ABA inherent ***** */
OP_HANDLER( aba )
{
- UINT16 t;
+ uint16_t t;
t=A+B;
CLR_HNZVC; SET_FLAGS8(A,B,t); SET_H(A,B,t);
A=t;
@@ -228,13 +228,13 @@ OP_HANDLER( aba )
/* $20 BRA relative ----- */
OP_HANDLER( bra )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
PC+=SIGNED(t);
}
/* $21 BRN relative ----- */
-static UINT8 m6800_brn_t; // hack around GCC 4.6 error because we need the side effects of IMMBYTE
+static uint8_t m6800_brn_t; // hack around GCC 4.6 error because we need the side effects of IMMBYTE
OP_HANDLER( brn )
{
IMMBYTE(m6800_brn_t);
@@ -243,98 +243,98 @@ OP_HANDLER( brn )
/* $22 BHI relative ----- */
OP_HANDLER( bhi )
{
- UINT8 t;
+ uint8_t t;
BRANCH(!(CC&0x05));
}
/* $23 BLS relative ----- */
OP_HANDLER( bls )
{
- UINT8 t;
+ uint8_t t;
BRANCH(CC&0x05);
}
/* $24 BCC relative ----- */
OP_HANDLER( bcc )
{
- UINT8 t;
+ uint8_t t;
BRANCH(!(CC&0x01));
}
/* $25 BCS relative ----- */
OP_HANDLER( bcs )
{
- UINT8 t;
+ uint8_t t;
BRANCH(CC&0x01);
}
/* $26 BNE relative ----- */
OP_HANDLER( bne )
{
- UINT8 t;
+ uint8_t t;
BRANCH(!(CC&0x04));
}
/* $27 BEQ relative ----- */
OP_HANDLER( beq )
{
- UINT8 t;
+ uint8_t t;
BRANCH(CC&0x04);
}
/* $28 BVC relative ----- */
OP_HANDLER( bvc )
{
- UINT8 t;
+ uint8_t t;
BRANCH(!(CC&0x02));
}
/* $29 BVS relative ----- */
OP_HANDLER( bvs )
{
- UINT8 t;
+ uint8_t t;
BRANCH(CC&0x02);
}
/* $2a BPL relative ----- */
OP_HANDLER( bpl )
{
- UINT8 t;
+ uint8_t t;
BRANCH(!(CC&0x08));
}
/* $2b BMI relative ----- */
OP_HANDLER( bmi )
{
- UINT8 t;
+ uint8_t t;
BRANCH(CC&0x08);
}
/* $2c BGE relative ----- */
OP_HANDLER( bge )
{
- UINT8 t;
+ uint8_t t;
BRANCH(!NXORV);
}
/* $2d BLT relative ----- */
OP_HANDLER( blt )
{
- UINT8 t;
+ uint8_t t;
BRANCH(NXORV);
}
/* $2e BGT relative ----- */
OP_HANDLER( bgt )
{
- UINT8 t;
+ uint8_t t;
BRANCH(!(NXORV||CC&0x04));
}
/* $2f BLE relative ----- */
OP_HANDLER( ble )
{
- UINT8 t;
+ uint8_t t;
BRANCH(NXORV||CC&0x04);
}
@@ -424,7 +424,7 @@ OP_HANDLER( pshx )
/* $3d MUL inherent --*-@ */
OP_HANDLER( mul )
{
- UINT16 t;
+ uint16_t t;
t=A*B;
CLR_C;
if(t&0x80) SEC;
@@ -463,7 +463,7 @@ OP_HANDLER( swi )
/* $40 NEGA inherent ?**** */
OP_HANDLER( nega )
{
- UINT16 r;
+ uint16_t r;
r=-A;
CLR_NZVC; SET_FLAGS8(0,A,r);
A=r;
@@ -492,7 +492,7 @@ OP_HANDLER( lsra )
/* $46 RORA inherent -**-* */
OP_HANDLER( rora )
{
- UINT8 r;
+ uint8_t r;
r=(CC&0x01)<<7;
CLR_NZC; CC|=(A&0x01);
r |= A>>1; SET_NZ8(r);
@@ -510,7 +510,7 @@ OP_HANDLER( asra )
/* $48 ASLA inherent ?**** */
OP_HANDLER( asla )
{
- UINT16 r;
+ uint16_t r;
r=A<<1;
CLR_NZVC; SET_FLAGS8(A,A,r);
A=r;
@@ -519,7 +519,7 @@ OP_HANDLER( asla )
/* $49 ROLA inherent -**** */
OP_HANDLER( rola )
{
- UINT16 t,r;
+ uint16_t t,r;
t = A; r = CC&0x01; r |= t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
A=r;
@@ -559,7 +559,7 @@ OP_HANDLER( clra )
/* $50 NEGB inherent ?**** */
OP_HANDLER( negb )
{
- UINT16 r;
+ uint16_t r;
r=-B;
CLR_NZVC; SET_FLAGS8(0,B,r);
B=r;
@@ -588,7 +588,7 @@ OP_HANDLER( lsrb )
/* $56 RORB inherent -**-* */
OP_HANDLER( rorb )
{
- UINT8 r;
+ uint8_t r;
r=(CC&0x01)<<7;
CLR_NZC; CC|=(B&0x01);
r |= B>>1; SET_NZ8(r);
@@ -606,7 +606,7 @@ OP_HANDLER( asrb )
/* $58 ASLB inherent ?**** */
OP_HANDLER( aslb )
{
- UINT16 r;
+ uint16_t r;
r=B<<1;
CLR_NZVC; SET_FLAGS8(B,B,r);
B=r;
@@ -615,7 +615,7 @@ OP_HANDLER( aslb )
/* $59 ROLB inherent -**** */
OP_HANDLER( rolb )
{
- UINT16 t,r;
+ uint16_t t,r;
t = B; r = CC&0x01; r |= t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
B=r;
@@ -655,7 +655,7 @@ OP_HANDLER( clrb )
/* $60 NEG indexed ?**** */
OP_HANDLER( neg_ix )
{
- UINT16 r,t;
+ uint16_t r,t;
IDXBYTE(t); r=-t;
CLR_NZVC; SET_FLAGS8(0,t,r);
WM(EAD,r);
@@ -664,7 +664,7 @@ OP_HANDLER( neg_ix )
/* $61 AIM --**0- */ /* HD63701YO only */
OP_HANDLER( aim_ix )
{
- UINT8 t, r;
+ uint8_t t, r;
IMMBYTE(t);
IDXBYTE(r);
r &= t;
@@ -675,7 +675,7 @@ OP_HANDLER( aim_ix )
/* $62 OIM --**0- */ /* HD63701YO only */
OP_HANDLER( oim_ix )
{
- UINT8 t, r;
+ uint8_t t, r;
IMMBYTE(t);
IDXBYTE(r);
r |= t;
@@ -686,7 +686,7 @@ OP_HANDLER( oim_ix )
/* $63 COM indexed -**01 */
OP_HANDLER( com_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t); t = ~t;
CLR_NZV; SET_NZ8(t); SEC;
WM(EAD,t);
@@ -695,7 +695,7 @@ OP_HANDLER( com_ix )
/* $64 LSR indexed -0*-* */
OP_HANDLER( lsr_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t); CLR_NZC; CC|=(t&0x01);
t>>=1; SET_Z8(t);
WM(EAD,t);
@@ -704,7 +704,7 @@ OP_HANDLER( lsr_ix )
/* $65 EIM --**0- */ /* HD63701YO only */
OP_HANDLER( eim_ix )
{
- UINT8 t, r;
+ uint8_t t, r;
IMMBYTE(t);
IDXBYTE(r);
r ^= t;
@@ -715,7 +715,7 @@ OP_HANDLER( eim_ix )
/* $66 ROR indexed -**-* */
OP_HANDLER( ror_ix )
{
- UINT8 t,r;
+ uint8_t t,r;
IDXBYTE(t); r=(CC&0x01)<<7;
CLR_NZC; CC|=(t&0x01);
r |= t>>1; SET_NZ8(r);
@@ -725,7 +725,7 @@ OP_HANDLER( ror_ix )
/* $67 ASR indexed ?**-* */
OP_HANDLER( asr_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t); CLR_NZC; CC|=(t&0x01);
t>>=1; t|=((t&0x40)<<1);
SET_NZ8(t);
@@ -735,7 +735,7 @@ OP_HANDLER( asr_ix )
/* $68 ASL indexed ?**** */
OP_HANDLER( asl_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t); r=t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -744,7 +744,7 @@ OP_HANDLER( asl_ix )
/* $69 ROL indexed -**** */
OP_HANDLER( rol_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t); r = CC&0x01; r |= t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -753,7 +753,7 @@ OP_HANDLER( rol_ix )
/* $6a DEC indexed -***- */
OP_HANDLER( dec_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t); --t;
CLR_NZV; SET_FLAGS8D(t);
WM(EAD,t);
@@ -762,7 +762,7 @@ OP_HANDLER( dec_ix )
/* $6b TIM --**0- */ /* HD63701YO only */
OP_HANDLER( tim_ix )
{
- UINT8 t, r;
+ uint8_t t, r;
IMMBYTE(t);
IDXBYTE(r);
r &= t;
@@ -772,7 +772,7 @@ OP_HANDLER( tim_ix )
/* $6c INC indexed -***- */
OP_HANDLER( inc_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t); ++t;
CLR_NZV; SET_FLAGS8I(t);
WM(EAD,t);
@@ -781,7 +781,7 @@ OP_HANDLER( inc_ix )
/* $6d TST indexed -**0- */
OP_HANDLER( tst_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t); CLR_NZVC; SET_NZ8(t);
}
@@ -801,7 +801,7 @@ OP_HANDLER( clr_ix )
/* $70 NEG extended ?**** */
OP_HANDLER( neg_ex )
{
- UINT16 r,t;
+ uint16_t r,t;
EXTBYTE(t); r=-t;
CLR_NZVC; SET_FLAGS8(0,t,r);
WM(EAD,r);
@@ -810,7 +810,7 @@ OP_HANDLER( neg_ex )
/* $71 AIM --**0- */ /* HD63701YO only */
OP_HANDLER( aim_di )
{
- UINT8 t, r;
+ uint8_t t, r;
IMMBYTE(t);
DIRBYTE(r);
r &= t;
@@ -821,7 +821,7 @@ OP_HANDLER( aim_di )
/* $72 OIM --**0- */ /* HD63701YO only */
OP_HANDLER( oim_di )
{
- UINT8 t, r;
+ uint8_t t, r;
IMMBYTE(t);
DIRBYTE(r);
r |= t;
@@ -832,7 +832,7 @@ OP_HANDLER( oim_di )
/* $73 COM extended -**01 */
OP_HANDLER( com_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t); t = ~t;
CLR_NZV; SET_NZ8(t); SEC;
WM(EAD,t);
@@ -841,7 +841,7 @@ OP_HANDLER( com_ex )
/* $74 LSR extended -0*-* */
OP_HANDLER( lsr_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
CLR_NZC;
CC|=(t&0x01);
@@ -853,7 +853,7 @@ OP_HANDLER( lsr_ex )
/* $75 EIM --**0- */ /* HD63701YO only */
OP_HANDLER( eim_di )
{
- UINT8 t, r;
+ uint8_t t, r;
IMMBYTE(t);
DIRBYTE(r);
r ^= t;
@@ -864,7 +864,7 @@ OP_HANDLER( eim_di )
/* $76 ROR extended -**-* */
OP_HANDLER( ror_ex )
{
- UINT8 t,r;
+ uint8_t t,r;
EXTBYTE(t); r=(CC&0x01)<<7;
CLR_NZC; CC|=(t&0x01);
r |= t>>1; SET_NZ8(r);
@@ -874,7 +874,7 @@ OP_HANDLER( ror_ex )
/* $77 ASR extended ?**-* */
OP_HANDLER( asr_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t); CLR_NZC; CC|=(t&0x01);
t>>=1; t|=((t&0x40)<<1);
SET_NZ8(t);
@@ -884,7 +884,7 @@ OP_HANDLER( asr_ex )
/* $78 ASL extended ?**** */
OP_HANDLER( asl_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t); r=t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -893,7 +893,7 @@ OP_HANDLER( asl_ex )
/* $79 ROL extended -**** */
OP_HANDLER( rol_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t); r = CC&0x01; r |= t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -902,7 +902,7 @@ OP_HANDLER( rol_ex )
/* $7a DEC extended -***- */
OP_HANDLER( dec_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t); --t;
CLR_NZV; SET_FLAGS8D(t);
WM(EAD,t);
@@ -911,7 +911,7 @@ OP_HANDLER( dec_ex )
/* $7b TIM --**0- */ /* HD63701YO only */
OP_HANDLER( tim_di )
{
- UINT8 t, r;
+ uint8_t t, r;
IMMBYTE(t);
DIRBYTE(r);
r &= t;
@@ -921,7 +921,7 @@ OP_HANDLER( tim_di )
/* $7c INC extended -***- */
OP_HANDLER( inc_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t); ++t;
CLR_NZV; SET_FLAGS8I(t);
WM(EAD,t);
@@ -930,7 +930,7 @@ OP_HANDLER( inc_ex )
/* $7d TST extended -**0- */
OP_HANDLER( tst_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t); CLR_NZVC; SET_NZ8(t);
}
@@ -950,7 +950,7 @@ OP_HANDLER( clr_ex )
/* $80 SUBA immediate ?**** */
OP_HANDLER( suba_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -959,7 +959,7 @@ OP_HANDLER( suba_im )
/* $81 CMPA immediate ?**** */
OP_HANDLER( cmpa_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
}
@@ -967,7 +967,7 @@ OP_HANDLER( cmpa_im )
/* $82 SBCA immediate ?**** */
OP_HANDLER( sbca_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t); r = A-t-(CC&0x01);
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -976,7 +976,7 @@ OP_HANDLER( sbca_im )
/* $83 SUBD immediate -**** */
OP_HANDLER( subd_im )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
IMMWORD(b);
d = D;
@@ -989,7 +989,7 @@ OP_HANDLER( subd_im )
/* $84 ANDA immediate -**0- */
OP_HANDLER( anda_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t); A &= t;
CLR_NZV; SET_NZ8(A);
}
@@ -997,7 +997,7 @@ OP_HANDLER( anda_im )
/* $85 BITA immediate -**0- */
OP_HANDLER( bita_im )
{
- UINT8 t,r;
+ uint8_t t,r;
IMMBYTE(t); r = A&t;
CLR_NZV; SET_NZ8(r);
}
@@ -1020,7 +1020,7 @@ OP_HANDLER( sta_im )
/* $88 EORA immediate -**0- */
OP_HANDLER( eora_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t); A ^= t;
CLR_NZV; SET_NZ8(A);
}
@@ -1028,7 +1028,7 @@ OP_HANDLER( eora_im )
/* $89 ADCA immediate ***** */
OP_HANDLER( adca_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t); r = A+t+(CC&0x01);
CLR_HNZVC; SET_FLAGS8(A,t,r); SET_H(A,t,r);
A = r;
@@ -1037,7 +1037,7 @@ OP_HANDLER( adca_im )
/* $8a ORA immediate -**0- */
OP_HANDLER( ora_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t); A |= t;
CLR_NZV; SET_NZ8(A);
}
@@ -1045,7 +1045,7 @@ OP_HANDLER( ora_im )
/* $8b ADDA immediate ***** */
OP_HANDLER( adda_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t); r = A+t;
CLR_HNZVC; SET_FLAGS8(A,t,r); SET_H(A,t,r);
A = r;
@@ -1067,7 +1067,7 @@ OP_HANDLER( cmpx_im )
/* $8c CPX immediate -**** (6803) */
OP_HANDLER( cpx_im )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
IMMWORD(b);
d = X;
@@ -1079,7 +1079,7 @@ OP_HANDLER( cpx_im )
/* $8d BSR ----- */
OP_HANDLER( bsr )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
PUSHWORD(pPC);
PC += SIGNED(t);
@@ -1105,7 +1105,7 @@ OP_HANDLER( sts_im )
/* $90 SUBA direct ?**** */
OP_HANDLER( suba_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -1114,7 +1114,7 @@ OP_HANDLER( suba_di )
/* $91 CMPA direct ?**** */
OP_HANDLER( cmpa_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
}
@@ -1122,7 +1122,7 @@ OP_HANDLER( cmpa_di )
/* $92 SBCA direct ?**** */
OP_HANDLER( sbca_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t); r = A-t-(CC&0x01);
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -1131,7 +1131,7 @@ OP_HANDLER( sbca_di )
/* $93 SUBD direct -**** */
OP_HANDLER( subd_di )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
DIRWORD(b);
d = D;
@@ -1144,7 +1144,7 @@ OP_HANDLER( subd_di )
/* $94 ANDA direct -**0- */
OP_HANDLER( anda_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t); A &= t;
CLR_NZV; SET_NZ8(A);
}
@@ -1152,7 +1152,7 @@ OP_HANDLER( anda_di )
/* $95 BITA direct -**0- */
OP_HANDLER( bita_di )
{
- UINT8 t,r;
+ uint8_t t,r;
DIRBYTE(t); r = A&t;
CLR_NZV; SET_NZ8(r);
}
@@ -1177,7 +1177,7 @@ OP_HANDLER( sta_di )
/* $98 EORA direct -**0- */
OP_HANDLER( eora_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
A ^= t;
CLR_NZV;
@@ -1187,7 +1187,7 @@ OP_HANDLER( eora_di )
/* $99 ADCA direct ***** */
OP_HANDLER( adca_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = A+t+(CC&0x01);
CLR_HNZVC;
@@ -1199,7 +1199,7 @@ OP_HANDLER( adca_di )
/* $9a ORA direct -**0- */
OP_HANDLER( ora_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
A |= t;
CLR_NZV;
@@ -1209,7 +1209,7 @@ OP_HANDLER( ora_di )
/* $9b ADDA direct ***** */
OP_HANDLER( adda_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = A + t;
CLR_HNZVC;
@@ -1234,7 +1234,7 @@ OP_HANDLER( cmpx_di )
/* $9c CPX direct -**** (6803) */
OP_HANDLER( cpx_di )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
DIRWORD(b);
d = X;
@@ -1271,7 +1271,7 @@ OP_HANDLER( sts_di )
/* $a0 SUBA indexed ?**** */
OP_HANDLER( suba_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1282,7 +1282,7 @@ OP_HANDLER( suba_ix )
/* $a1 CMPA indexed ?**** */
OP_HANDLER( cmpa_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1292,7 +1292,7 @@ OP_HANDLER( cmpa_ix )
/* $a2 SBCA indexed ?**** */
OP_HANDLER( sbca_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A - t - (CC&0x01);
CLR_NZVC;
@@ -1303,7 +1303,7 @@ OP_HANDLER( sbca_ix )
/* $a3 SUBD indexed -**** */
OP_HANDLER( subd_ix )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
IDXWORD(b);
d = D;
@@ -1316,7 +1316,7 @@ OP_HANDLER( subd_ix )
/* $a4 ANDA indexed -**0- */
OP_HANDLER( anda_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t); A &= t;
CLR_NZV;
SET_NZ8(A);
@@ -1325,7 +1325,7 @@ OP_HANDLER( anda_ix )
/* $a5 BITA indexed -**0- */
OP_HANDLER( bita_ix )
{
- UINT8 t,r;
+ uint8_t t,r;
IDXBYTE(t); r = A&t;
CLR_NZV;
SET_NZ8(r);
@@ -1351,7 +1351,7 @@ OP_HANDLER( sta_ix )
/* $a8 EORA indexed -**0- */
OP_HANDLER( eora_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
A ^= t;
CLR_NZV;
@@ -1361,7 +1361,7 @@ OP_HANDLER( eora_ix )
/* $a9 ADCA indexed ***** */
OP_HANDLER( adca_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A + t + (CC&0x01);
CLR_HNZVC;
@@ -1373,7 +1373,7 @@ OP_HANDLER( adca_ix )
/* $aa ORA indexed -**0- */
OP_HANDLER( ora_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
A |= t;
CLR_NZV;
@@ -1383,7 +1383,7 @@ OP_HANDLER( ora_ix )
/* $ab ADDA indexed ***** */
OP_HANDLER( adda_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A+t;
CLR_HNZVC;
@@ -1408,7 +1408,7 @@ OP_HANDLER( cmpx_ix )
/* $ac CPX indexed -**** (6803)*/
OP_HANDLER( cpx_ix )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
IDXWORD(b);
d = X;
@@ -1445,7 +1445,7 @@ OP_HANDLER( sts_ix )
/* $b0 SUBA extended ?**** */
OP_HANDLER( suba_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1456,7 +1456,7 @@ OP_HANDLER( suba_ex )
/* $b1 CMPA extended ?**** */
OP_HANDLER( cmpa_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A-t;
CLR_NZVC;
@@ -1466,7 +1466,7 @@ OP_HANDLER( cmpa_ex )
/* $b2 SBCA extended ?**** */
OP_HANDLER( sbca_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A-t-(CC&0x01);
CLR_NZVC;
@@ -1477,7 +1477,7 @@ OP_HANDLER( sbca_ex )
/* $b3 SUBD extended -**** */
OP_HANDLER( subd_ex )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
EXTWORD(b);
d = D;
@@ -1490,7 +1490,7 @@ OP_HANDLER( subd_ex )
/* $b4 ANDA extended -**0- */
OP_HANDLER( anda_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
A &= t;
CLR_NZV;
@@ -1500,7 +1500,7 @@ OP_HANDLER( anda_ex )
/* $b5 BITA extended -**0- */
OP_HANDLER( bita_ex )
{
- UINT8 t,r;
+ uint8_t t,r;
EXTBYTE(t);
r = A&t;
CLR_NZV;
@@ -1527,7 +1527,7 @@ OP_HANDLER( sta_ex )
/* $b8 EORA extended -**0- */
OP_HANDLER( eora_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
A ^= t;
CLR_NZV;
@@ -1537,7 +1537,7 @@ OP_HANDLER( eora_ex )
/* $b9 ADCA extended ***** */
OP_HANDLER( adca_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A+t+(CC&0x01);
CLR_HNZVC;
@@ -1549,7 +1549,7 @@ OP_HANDLER( adca_ex )
/* $ba ORA extended -**0- */
OP_HANDLER( ora_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
A |= t;
CLR_NZV;
@@ -1559,7 +1559,7 @@ OP_HANDLER( ora_ex )
/* $bb ADDA extended ***** */
OP_HANDLER( adda_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A+t;
CLR_HNZVC;
@@ -1584,7 +1584,7 @@ OP_HANDLER( cmpx_ex )
/* $bc CPX extended -**** (6803) */
OP_HANDLER( cpx_ex )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
EXTWORD(b);
d = X;
@@ -1621,7 +1621,7 @@ OP_HANDLER( sts_ex )
/* $c0 SUBB immediate ?**** */
OP_HANDLER( subb_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1632,7 +1632,7 @@ OP_HANDLER( subb_im )
/* $c1 CMPB immediate ?**** */
OP_HANDLER( cmpb_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1642,7 +1642,7 @@ OP_HANDLER( cmpb_im )
/* $c2 SBCB immediate ?**** */
OP_HANDLER( sbcb_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -1653,7 +1653,7 @@ OP_HANDLER( sbcb_im )
/* $c3 ADDD immediate -**** */
OP_HANDLER( addd_im )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
IMMWORD(b);
d = D;
@@ -1666,7 +1666,7 @@ OP_HANDLER( addd_im )
/* $c4 ANDB immediate -**0- */
OP_HANDLER( andb_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
B &= t;
CLR_NZV;
@@ -1676,7 +1676,7 @@ OP_HANDLER( andb_im )
/* $c5 BITB immediate -**0- */
OP_HANDLER( bitb_im )
{
- UINT8 t,r;
+ uint8_t t,r;
IMMBYTE(t);
r = B&t;
CLR_NZV;
@@ -1704,7 +1704,7 @@ OP_HANDLER( stb_im )
/* $c8 EORB immediate -**0- */
OP_HANDLER( eorb_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
B ^= t;
CLR_NZV;
@@ -1714,7 +1714,7 @@ OP_HANDLER( eorb_im )
/* $c9 ADCB immediate ***** */
OP_HANDLER( adcb_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
@@ -1726,7 +1726,7 @@ OP_HANDLER( adcb_im )
/* $ca ORB immediate -**0- */
OP_HANDLER( orb_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
B |= t;
CLR_NZV;
@@ -1736,7 +1736,7 @@ OP_HANDLER( orb_im )
/* $cb ADDB immediate ***** */
OP_HANDLER( addb_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = B+t;
CLR_HNZVC;
@@ -1783,7 +1783,7 @@ OP_HANDLER( stx_im )
/* $d0 SUBB direct ?**** */
OP_HANDLER( subb_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1794,7 +1794,7 @@ OP_HANDLER( subb_di )
/* $d1 CMPB direct ?**** */
OP_HANDLER( cmpb_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1804,7 +1804,7 @@ OP_HANDLER( cmpb_di )
/* $d2 SBCB direct ?**** */
OP_HANDLER( sbcb_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -1815,7 +1815,7 @@ OP_HANDLER( sbcb_di )
/* $d3 ADDD direct -**** */
OP_HANDLER( addd_di )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
DIRWORD(b);
d = D;
@@ -1828,7 +1828,7 @@ OP_HANDLER( addd_di )
/* $d4 ANDB direct -**0- */
OP_HANDLER( andb_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
B &= t;
CLR_NZV;
@@ -1838,7 +1838,7 @@ OP_HANDLER( andb_di )
/* $d5 BITB direct -**0- */
OP_HANDLER( bitb_di )
{
- UINT8 t,r;
+ uint8_t t,r;
DIRBYTE(t);
r = B&t;
CLR_NZV;
@@ -1865,7 +1865,7 @@ OP_HANDLER( stb_di )
/* $d8 EORB direct -**0- */
OP_HANDLER( eorb_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
B ^= t;
CLR_NZV;
@@ -1875,7 +1875,7 @@ OP_HANDLER( eorb_di )
/* $d9 ADCB direct ***** */
OP_HANDLER( adcb_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
@@ -1887,7 +1887,7 @@ OP_HANDLER( adcb_di )
/* $da ORB direct -**0- */
OP_HANDLER( orb_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
B |= t;
CLR_NZV;
@@ -1897,7 +1897,7 @@ OP_HANDLER( orb_di )
/* $db ADDB direct ***** */
OP_HANDLER( addb_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = B+t;
CLR_HNZVC;
@@ -1943,7 +1943,7 @@ OP_HANDLER( stx_di )
/* $e0 SUBB indexed ?**** */
OP_HANDLER( subb_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1954,7 +1954,7 @@ OP_HANDLER( subb_ix )
/* $e1 CMPB indexed ?**** */
OP_HANDLER( cmpb_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1964,7 +1964,7 @@ OP_HANDLER( cmpb_ix )
/* $e2 SBCB indexed ?**** */
OP_HANDLER( sbcb_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -1975,7 +1975,7 @@ OP_HANDLER( sbcb_ix )
/* $e3 ADDD indexed -**** */
OP_HANDLER( addd_ix )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
IDXWORD(b);
d = D;
@@ -1988,7 +1988,7 @@ OP_HANDLER( addd_ix )
/* $e4 ANDB indexed -**0- */
OP_HANDLER( andb_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
B &= t;
CLR_NZV;
@@ -1998,7 +1998,7 @@ OP_HANDLER( andb_ix )
/* $e5 BITB indexed -**0- */
OP_HANDLER( bitb_ix )
{
- UINT8 t,r;
+ uint8_t t,r;
IDXBYTE(t);
r = B&t;
CLR_NZV;
@@ -2025,7 +2025,7 @@ OP_HANDLER( stb_ix )
/* $e8 EORB indexed -**0- */
OP_HANDLER( eorb_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
B ^= t;
CLR_NZV;
@@ -2035,7 +2035,7 @@ OP_HANDLER( eorb_ix )
/* $e9 ADCB indexed ***** */
OP_HANDLER( adcb_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
@@ -2047,7 +2047,7 @@ OP_HANDLER( adcb_ix )
/* $ea ORB indexed -**0- */
OP_HANDLER( orb_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
B |= t;
CLR_NZV;
@@ -2057,7 +2057,7 @@ OP_HANDLER( orb_ix )
/* $eb ADDB indexed ***** */
OP_HANDLER( addb_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = B+t;
CLR_HNZVC;
@@ -2078,7 +2078,7 @@ OP_HANDLER( ldd_ix )
// actually this is ADDX, causes garbage in nightgal.cpp otherwise
OP_HANDLER( adcx_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = X+t;
CLR_HNZVC;
@@ -2116,7 +2116,7 @@ OP_HANDLER( stx_ix )
/* $f0 SUBB extended ?**** */
OP_HANDLER( subb_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = B-t;
CLR_NZVC;
@@ -2127,7 +2127,7 @@ OP_HANDLER( subb_ex )
/* $f1 CMPB extended ?**** */
OP_HANDLER( cmpb_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = B-t;
CLR_NZVC;
@@ -2137,7 +2137,7 @@ OP_HANDLER( cmpb_ex )
/* $f2 SBCB extended ?**** */
OP_HANDLER( sbcb_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -2148,7 +2148,7 @@ OP_HANDLER( sbcb_ex )
/* $f3 ADDD extended -**** */
OP_HANDLER( addd_ex )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
EXTWORD(b);
d = D;
@@ -2161,7 +2161,7 @@ OP_HANDLER( addd_ex )
/* $f4 ANDB extended -**0- */
OP_HANDLER( andb_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
B &= t;
CLR_NZV;
@@ -2171,7 +2171,7 @@ OP_HANDLER( andb_ex )
/* $f5 BITB extended -**0- */
OP_HANDLER( bitb_ex )
{
- UINT8 t,r;
+ uint8_t t,r;
EXTBYTE(t);
r = B & t;
CLR_NZV;
@@ -2198,7 +2198,7 @@ OP_HANDLER( stb_ex )
/* $f8 EORB extended -**0- */
OP_HANDLER( eorb_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
B ^= t;
CLR_NZV;
@@ -2208,7 +2208,7 @@ OP_HANDLER( eorb_ex )
/* $f9 ADCB extended ***** */
OP_HANDLER( adcb_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
@@ -2220,7 +2220,7 @@ OP_HANDLER( adcb_ex )
/* $fa ORB extended -**0- */
OP_HANDLER( orb_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
B |= t;
CLR_NZV;
@@ -2230,7 +2230,7 @@ OP_HANDLER( orb_ex )
/* $fb ADDB extended ***** */
OP_HANDLER( addb_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = B+t;
CLR_HNZVC;
@@ -2250,7 +2250,7 @@ OP_HANDLER( ldd_ex )
/* $fc ADDX extended -**** NSC8105 only. Flags are a guess */
OP_HANDLER( addx_ex )
{
- UINT32 r,d;
+ uint32_t r,d;
PAIR b;
EXTWORD(b);
d = X;
@@ -2290,8 +2290,8 @@ OP_HANDLER( stx_ex )
// $bb - $mask & [X + $disp8]
OP_HANDLER( btst_ix )
{
- UINT8 val;
- UINT8 mask = M_RDOP_ARG(PCD);
+ uint8_t val;
+ uint8_t mask = M_RDOP_ARG(PCD);
{EA=X+(M_RDOP_ARG(PCD+1));PC+=2;}
val = RM(EAD) & mask;
CLR_NZVC; SET_NZ8(val);
@@ -2301,7 +2301,7 @@ OP_HANDLER( btst_ix )
OP_HANDLER( stx_nsc )
{
IMM8;
- UINT8 val = RM(EAD);
+ uint8_t val = RM(EAD);
IMM8;
EA = X + RM(EAD);
CLR_NZV;
diff --git a/src/devices/cpu/m6800/m6800.cpp b/src/devices/cpu/m6800/m6800.cpp
index c874a6c177a..11109fbe59a 100644
--- a/src/devices/cpu/m6800/m6800.cpp
+++ b/src/devices/cpu/m6800/m6800.cpp
@@ -14,9 +14,9 @@
6809 Microcomputer Programming & Interfacing with Experiments"
by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc.
- System dependencies: UINT16 must be 16 bit unsigned int
- UINT8 must be 8 bit unsigned int
- UINT32 must be more than 16 bits
+ System dependencies: uint16_t must be 16 bit unsigned int
+ uint8_t must be 8 bit unsigned int
+ uint32_t must be more than 16 bits
arrays up to 65536 bytes must be supported
machine must be twos complement
@@ -141,7 +141,7 @@ static void hd63701_trap_pc();
#define EA m_ea.w.l
/* point of next timer event */
-static UINT32 timer_next;
+static uint32_t timer_next;
/* memory interface */
@@ -284,7 +284,7 @@ enum
/* operate one instruction for */
#define ONE_MORE_INSN() { \
- UINT8 ireg; \
+ uint8_t ireg; \
pPPC = pPC; \
debugger_instruction_hook(this, PCD); \
ireg=M_RDOP(PCD); \
@@ -306,8 +306,8 @@ enum
/* macros for CC -- CC bits affected should be reset before calling */
#define SET_Z(a) if(!(a))SEZ
-#define SET_Z8(a) SET_Z((UINT8)(a))
-#define SET_Z16(a) SET_Z((UINT16)(a))
+#define SET_Z8(a) SET_Z((uint8_t)(a))
+#define SET_Z16(a) SET_Z((uint16_t)(a))
#define SET_N8(a) CC|=(((a)&0x80)>>4)
#define SET_N16(a) CC|=(((a)&0x8000)>>12)
#define SET_H(a,b,r) CC|=((((a)^(b)^(r))&0x10)<<1)
@@ -316,7 +316,7 @@ enum
#define SET_V8(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x80)>>6)
#define SET_V16(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x8000)>>14)
-const UINT8 m6800_cpu_device::flags8i[256]= /* increment */
+const uint8_t m6800_cpu_device::flags8i[256]= /* increment */
{
0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -337,7 +337,7 @@ const UINT8 m6800_cpu_device::flags8i[256]= /* increment */
};
-const UINT8 m6800_cpu_device::flags8d[256]= /* decrement */
+const uint8_t m6800_cpu_device::flags8d[256]= /* decrement */
{
0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -366,15 +366,15 @@ const UINT8 m6800_cpu_device::flags8d[256]= /* decrement */
#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
-/* for treating an UINT8 as a signed INT16 */
-#define SIGNED(b) ((INT16)(b&0x80?b|0xff00:b))
+/* for treating an uint8_t as a signed int16_t */
+#define SIGNED(b) ((int16_t)(b&0x80?b|0xff00:b))
/* Macros for addressing modes */
#define DIRECT IMMBYTE(EAD)
#define IMM8 EA=PC++
#define IMM16 {EA=PC;PC+=2;}
#define EXTENDED IMMWORD(m_ea)
-#define INDEXED {EA=X+(UINT8)M_RDOP_ARG(PCD);PC++;}
+#define INDEXED {EA=X+(uint8_t)M_RDOP_ARG(PCD);PC++;}
/* macros to set status flags */
#if defined(SEC)
@@ -422,7 +422,7 @@ const UINT8 m6800_cpu_device::flags8d[256]= /* decrement */
/* Note: don't use 0 cycles here for invalid opcodes so that we don't */
/* hang in an infinite loop if we hit one */
#define XX 5 // invalid opcode unknown cc
-const UINT8 m6800_cpu_device::cycles_6800[256] =
+const uint8_t m6800_cpu_device::cycles_6800[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ XX, 2,XX,XX,XX,XX, 2, 2, 4, 4, 2, 2, 2, 2, 2, 2,
@@ -443,7 +443,7 @@ const UINT8 m6800_cpu_device::cycles_6800[256] =
/*F*/ 4, 4, 4,XX, 4, 4, 4, 5, 4, 4, 4, 4,XX,XX, 5, 6
};
-const UINT8 m6800_cpu_device::cycles_6803[256] =
+const uint8_t m6800_cpu_device::cycles_6803[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ XX, 2,XX,XX, 3, 3, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2,
@@ -464,7 +464,7 @@ const UINT8 m6800_cpu_device::cycles_6803[256] =
/*F*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5
};
-const UINT8 m6800_cpu_device::cycles_63701[256] =
+const uint8_t m6800_cpu_device::cycles_63701[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ XX, 1,XX,XX, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
@@ -485,7 +485,7 @@ const UINT8 m6800_cpu_device::cycles_63701[256] =
/*F*/ 4, 4, 4, 5, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5
};
-const UINT8 m6800_cpu_device::cycles_nsc8105[256] =
+const uint8_t m6800_cpu_device::cycles_nsc8105[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ 5,XX, 2,XX,XX, 2,XX, 2, 4, 2, 4, 2, 2, 2, 2, 2,
@@ -532,7 +532,7 @@ const device_type HD6303R = &device_creator<hd6303r_cpu_device>;
const device_type HD6303Y = &device_creator<hd6303y_cpu_device>;
-m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, M6800, "M6800", tag, owner, clock, "m6800", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0)
, m_decrypted_opcodes_config("program", ENDIANNESS_BIG, 8, 16, 0)
@@ -546,7 +546,7 @@ m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, const char *ta
m_clock_divider = 1;
}
-m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool has_io, int clock_divider, const op_func *insn, const UINT8 *cycles, address_map_constructor internal)
+m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, bool has_io, int clock_divider, const op_func *insn, const uint8_t *cycles, address_map_constructor internal)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal)
, m_decrypted_opcodes_config("program", ENDIANNESS_BIG, 8, 16, 0)
@@ -560,22 +560,22 @@ m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type ty
m_clock_divider = clock_divider;
}
-m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6800_cpu_device(mconfig, M6801, "M6801", tag, owner, clock, "m6801", __FILE__, true, 4, m6803_insn, cycles_6803)
{
}
-m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, const op_func *insn, const UINT8 *cycles, address_map_constructor internal)
+m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, const op_func *insn, const uint8_t *cycles, address_map_constructor internal)
: m6800_cpu_device(mconfig, type, name, tag, owner, clock, shortname, source, true, 4, insn, cycles, internal)
{
}
-m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6800_cpu_device(mconfig, M6802, "M6802", tag, owner, clock, "m6802", __FILE__, false, 4, m6800_insn, cycles_6800)
{
}
-m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, const op_func *insn, const UINT8 *cycles)
+m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, const op_func *insn, const uint8_t *cycles)
: m6800_cpu_device(mconfig, type, name, tag, owner, clock, shortname, source, false, 4, insn, cycles)
{
}
@@ -587,42 +587,42 @@ static ADDRESS_MAP_START(m6803_mem, AS_PROGRAM, 8, m6800_cpu_device)
ADDRESS_MAP_END
-m6803_cpu_device::m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m6803_cpu_device::m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6801_cpu_device(mconfig, M6803, "M6803", tag, owner, clock, "m6803", __FILE__, m6803_insn, cycles_6803, ADDRESS_MAP_NAME(m6803_mem))
{
}
-m6808_cpu_device::m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m6808_cpu_device::m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6802_cpu_device(mconfig, M6808, "M6808", tag, owner, clock, "m6808", __FILE__, m6800_insn, cycles_6800)
{
}
-hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6801_cpu_device(mconfig, HD6301, "HD6301", tag, owner, clock, "hd6301", __FILE__, hd63701_insn, cycles_63701)
{
}
-hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: m6801_cpu_device(mconfig, type, name, tag, owner, clock, shortname, source, hd63701_insn, cycles_63701)
{
}
-hd63701_cpu_device::hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd63701_cpu_device::hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6801_cpu_device(mconfig, HD63701, "HD63701", tag, owner, clock, "hd63701", __FILE__, hd63701_insn, cycles_63701)
{
}
-nsc8105_cpu_device::nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+nsc8105_cpu_device::nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6802_cpu_device(mconfig, NSC8105, "NSC8105", tag, owner, clock, "nsc8105", __FILE__, nsc8105_insn, cycles_nsc8105)
{
}
-hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hd6301_cpu_device(mconfig, HD6303R, "HD6303R", tag, owner, clock, "hd6303r", __FILE__)
{
}
-hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: hd6301_cpu_device(mconfig, HD6303Y, "HD6303Y", tag, owner, clock, "hd6303y", __FILE__)
{
}
@@ -639,20 +639,20 @@ const address_space_config *m6800_cpu_device::memory_space_config(address_spacen
}
-UINT32 m6800_cpu_device::RM16(UINT32 Addr )
+uint32_t m6800_cpu_device::RM16(uint32_t Addr )
{
- UINT32 result = RM(Addr) << 8;
+ uint32_t result = RM(Addr) << 8;
return result | RM((Addr+1)&0xffff);
}
-void m6800_cpu_device::WM16(UINT32 Addr, PAIR *p )
+void m6800_cpu_device::WM16(uint32_t Addr, PAIR *p )
{
WM( Addr, p->b.h );
WM( (Addr+1)&0xffff, p->b.l );
}
/* IRQ enter */
-void m6800_cpu_device::enter_interrupt(const char *message,UINT16 irq_vector)
+void m6800_cpu_device::enter_interrupt(const char *message,uint16_t irq_vector)
{
LOG((message, tag()));
if( m_wai_state & (M6800_WAI|M6800_SLP) )
@@ -784,7 +784,7 @@ void m6800_cpu_device::increment_counter(int amount)
check_timer_event();
}
-void m6800_cpu_device::set_rmcr(UINT8 data)
+void m6800_cpu_device::set_rmcr(uint8_t data)
{
if (m_rmcr == data) return;
@@ -819,8 +819,8 @@ void m6800_cpu_device::write_port2()
{
if (!m_port2_written) return;
- UINT8 data = m_port2_data;
- UINT8 ddr = m_port2_ddr & 0x1f;
+ uint8_t data = m_port2_data;
+ uint8_t ddr = m_port2_ddr & 0x1f;
if ((ddr != 0x1f) && ddr)
{
@@ -1256,7 +1256,7 @@ void m6800_cpu_device::execute_set_input(int irqline, int state)
****************************************************************************/
void m6800_cpu_device::execute_run()
{
- UINT8 ireg;
+ uint8_t ireg;
CHECK_IRQ_LINES(); /* HJB 990417 */
@@ -1304,7 +1304,7 @@ void m6800_cpu_device::set_os3(int state)
READ8_MEMBER( m6800_cpu_device::m6801_io_r )
{
- UINT8 data = 0;
+ uint8_t data = 0;
switch (offset)
{
@@ -1752,56 +1752,56 @@ void m6801_cpu_device::m6801_clock_serial()
}
}
-offs_t m6800_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6800_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( m6800 );
return CPU_DISASSEMBLE_NAME(m6800)(this, buffer, pc, oprom, opram, options);
}
-offs_t m6801_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6801_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( m6801 );
return CPU_DISASSEMBLE_NAME(m6801)(this, buffer, pc, oprom, opram, options);
}
-offs_t m6802_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6802_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( m6802 );
return CPU_DISASSEMBLE_NAME(m6802)(this, buffer, pc, oprom, opram, options);
}
-offs_t m6803_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6803_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( m6803 );
return CPU_DISASSEMBLE_NAME(m6803)(this, buffer, pc, oprom, opram, options);
}
-offs_t m6808_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6808_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( m6808 );
return CPU_DISASSEMBLE_NAME(m6808)(this, buffer, pc, oprom, opram, options);
}
-offs_t hd6301_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hd6301_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( hd6301 );
return CPU_DISASSEMBLE_NAME(hd6301)(this, buffer, pc, oprom, opram, options);
}
-offs_t hd63701_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hd63701_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( hd63701 );
return CPU_DISASSEMBLE_NAME(hd63701)(this, buffer, pc, oprom, opram, options);
}
-offs_t nsc8105_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t nsc8105_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( nsc8105 );
return CPU_DISASSEMBLE_NAME(nsc8105)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/m6800/m6800.h b/src/devices/cpu/m6800/m6800.h
index 0ad47280bf3..c51a2741c7a 100644
--- a/src/devices/cpu/m6800/m6800.h
+++ b/src/devices/cpu/m6800/m6800.h
@@ -77,8 +77,8 @@ public:
typedef void (m6800_cpu_device::*op_func)();
// construction/destruction
- m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m6800_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool has_io, int clock_divider, const m6800_cpu_device::op_func *insn, const UINT8 *cycles, address_map_constructor internal = nullptr);
+ m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6800_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, bool has_io, int clock_divider, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = nullptr);
// static configuration helpers
template<class _Object> static devcb_base &set_out_sc2_func(device_t &device, _Object object) { return downcast<m6800_cpu_device &>(device).m_out_sc2_func.set_callback(object); }
@@ -93,10 +93,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 12; }
- virtual UINT32 execute_input_lines() const override { return 2; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 12; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -107,9 +107,9 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
address_space_config m_decrypted_opcodes_config;
@@ -124,12 +124,12 @@ protected:
PAIR m_s; /* Stack pointer */
PAIR m_x; /* Index register */
PAIR m_d; /* Accumulators */
- UINT8 m_cc; /* Condition codes */
- UINT8 m_wai_state; /* WAI opcode state ,(or sleep opcode state) */
- UINT8 m_nmi_state; /* NMI line state */
- UINT8 m_nmi_pending; /* NMI pending */
- UINT8 m_irq_state[3]; /* IRQ line state [IRQ1,TIN,SC1] */
- UINT8 m_ic_eddge; /* InputCapture eddge , b.0=fall,b.1=raise */
+ uint8_t m_cc; /* Condition codes */
+ uint8_t m_wai_state; /* WAI opcode state ,(or sleep opcode state) */
+ uint8_t m_nmi_state; /* NMI line state */
+ uint8_t m_nmi_pending; /* NMI pending */
+ uint8_t m_irq_state[3]; /* IRQ line state [IRQ1,TIN,SC1] */
+ uint8_t m_ic_eddge; /* InputCapture eddge , b.0=fall,b.1=raise */
int m_sc1_state;
/* Memory spaces */
@@ -138,29 +138,29 @@ protected:
address_space *m_io;
const op_func *m_insn;
- const UINT8 *m_cycles; /* clock cycle of instruction table */
+ const uint8_t *m_cycles; /* clock cycle of instruction table */
/* internal registers */
- UINT8 m_port1_ddr;
- UINT8 m_port2_ddr;
- UINT8 m_port3_ddr;
- UINT8 m_port4_ddr;
- UINT8 m_port1_data;
- UINT8 m_port2_data;
- UINT8 m_port3_data;
- UINT8 m_port4_data;
- UINT8 m_p3csr; // Port 3 Control/Status Register
- UINT8 m_tcsr; /* Timer Control and Status Register */
- UINT8 m_pending_tcsr; /* pending IRQ flag for clear IRQflag process */
- UINT8 m_irq2; /* IRQ2 flags */
- UINT8 m_ram_ctrl;
+ uint8_t m_port1_ddr;
+ uint8_t m_port2_ddr;
+ uint8_t m_port3_ddr;
+ uint8_t m_port4_ddr;
+ uint8_t m_port1_data;
+ uint8_t m_port2_data;
+ uint8_t m_port3_data;
+ uint8_t m_port4_data;
+ uint8_t m_p3csr; // Port 3 Control/Status Register
+ uint8_t m_tcsr; /* Timer Control and Status Register */
+ uint8_t m_pending_tcsr; /* pending IRQ flag for clear IRQflag process */
+ uint8_t m_irq2; /* IRQ2 flags */
+ uint8_t m_ram_ctrl;
PAIR m_counter; /* free running counter */
PAIR m_output_compare; /* output compare */
- UINT16 m_input_capture; /* input capture */
+ uint16_t m_input_capture; /* input capture */
int m_p3csr_is3_flag_read;
int m_port3_latched;
int m_clock_divider;
- UINT8 m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tsr;
+ uint8_t m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tsr;
int m_rxbits, m_txbits, m_txstate, m_trcsr_read_tdre, m_trcsr_read_orfe, m_trcsr_read_rdrf, m_tx, m_ext_serclock;
bool m_use_ext_serclock;
int m_port2_written;
@@ -172,25 +172,25 @@ protected:
emu_timer *m_sci_timer;
PAIR m_ea; /* effective address */
- static const UINT8 flags8i[256];
- static const UINT8 flags8d[256];
- static const UINT8 cycles_6800[256];
- static const UINT8 cycles_6803[256];
- static const UINT8 cycles_63701[256];
- static const UINT8 cycles_nsc8105[256];
+ static const uint8_t flags8i[256];
+ static const uint8_t flags8d[256];
+ static const uint8_t cycles_6800[256];
+ static const uint8_t cycles_6803[256];
+ static const uint8_t cycles_63701[256];
+ static const uint8_t cycles_nsc8105[256];
static const op_func m6800_insn[256];
static const op_func m6803_insn[256];
static const op_func hd63701_insn[256];
static const op_func nsc8105_insn[256];
- UINT32 RM16(UINT32 Addr );
- void WM16(UINT32 Addr, PAIR *p );
- void enter_interrupt(const char *message,UINT16 irq_vector);
+ uint32_t RM16(uint32_t Addr );
+ void WM16(uint32_t Addr, PAIR *p );
+ void enter_interrupt(const char *message,uint16_t irq_vector);
void m6800_check_irq2();
void CHECK_IRQ_LINES();
void check_timer_event();
void increment_counter(int amount);
- void set_rmcr(UINT8 data);
+ void set_rmcr(uint8_t data);
void write_port2();
int m6800_rx();
void serial_transmit();
@@ -451,79 +451,79 @@ protected:
class m6801_cpu_device : public m6800_cpu_device
{
public:
- m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m6801_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, const m6800_cpu_device::op_func *insn, const UINT8 *cycles, address_map_constructor internal = nullptr);
+ m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6801_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = nullptr);
void m6801_clock_serial();
protected:
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class m6802_cpu_device : public m6800_cpu_device
{
public:
- m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m6802_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, const m6800_cpu_device::op_func *insn, const UINT8 *cycles);
+ m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6802_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, const m6800_cpu_device::op_func *insn, const uint8_t *cycles);
protected:
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class m6803_cpu_device : public m6801_cpu_device
{
public:
- m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class m6808_cpu_device : public m6802_cpu_device
{
public:
- m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class hd6301_cpu_device : public m6801_cpu_device
{
public:
- hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class hd63701_cpu_device : public m6801_cpu_device
{
public:
- hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class nsc8105_cpu_device : public m6802_cpu_device
{
public:
- nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
@@ -534,7 +534,7 @@ protected:
class hd6303r_cpu_device : public hd6301_cpu_device
{
public:
- hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -546,7 +546,7 @@ public:
class hd6303y_cpu_device : public hd6301_cpu_device
{
public:
- hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/m68000/m68000.h b/src/devices/cpu/m68000/m68000.h
index 1840d27e5a0..61c0af7a228 100644
--- a/src/devices/cpu/m68000/m68000.h
+++ b/src/devices/cpu/m68000/m68000.h
@@ -121,30 +121,30 @@ class m68000_base_device : public cpu_device
public:
// construction/destruction
- m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, const char *shortname, const char *source);
+ m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, const char *shortname, const char *source);
- m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source);
+ m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source);
- m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void presave();
void postload();
void clear_all(void);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 10; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 10; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 4; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_input_lines() const override { return 8; }; // number of input lines
+ virtual uint32_t execute_min_cycles() const override { return 4; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_input_lines() const override { return 8; }; // number of input lines
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -165,47 +165,47 @@ public:
void set_cmpild_callback(write32_delegate callback);
void set_rte_callback(write_line_delegate callback);
void set_tas_write_callback(write8_delegate callback);
- UINT16 get_fc();
+ uint16_t get_fc();
void set_hmmu_enable(int enable);
void set_instruction_hook(read32_delegate ihook);
- void set_buserror_details(UINT32 fault_addr, UINT8 rw, UINT8 fc);
+ void set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc);
public:
- UINT32 cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
-// UINT32 dasm_type; /* disassembly type */
- UINT32 dar[16]; /* Data and Address Registers */
- UINT32 ppc; /* Previous program counter */
- UINT32 pc; /* Program Counter */
- UINT32 sp[7]; /* User, Interrupt, and Master Stack Pointers */
- UINT32 vbr; /* Vector Base Register (m68010+) */
- UINT32 sfc; /* Source Function Code Register (m68010+) */
- UINT32 dfc; /* Destination Function Code Register (m68010+) */
- UINT32 cacr; /* Cache Control Register (m68020, unemulated) */
- UINT32 caar; /* Cache Address Register (m68020, unemulated) */
- UINT32 ir; /* Instruction Register */
+ uint32_t cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
+// uint32_t dasm_type; /* disassembly type */
+ uint32_t dar[16]; /* Data and Address Registers */
+ uint32_t ppc; /* Previous program counter */
+ uint32_t pc; /* Program Counter */
+ uint32_t sp[7]; /* User, Interrupt, and Master Stack Pointers */
+ uint32_t vbr; /* Vector Base Register (m68010+) */
+ uint32_t sfc; /* Source Function Code Register (m68010+) */
+ uint32_t dfc; /* Destination Function Code Register (m68010+) */
+ uint32_t cacr; /* Cache Control Register (m68020, unemulated) */
+ uint32_t caar; /* Cache Address Register (m68020, unemulated) */
+ uint32_t ir; /* Instruction Register */
floatx80 fpr[8]; /* FPU Data Register (m68030/040) */
- UINT32 fpiar; /* FPU Instruction Address Register (m68040) */
- UINT32 fpsr; /* FPU Status Register (m68040) */
- UINT32 fpcr; /* FPU Control Register (m68040) */
- UINT32 t1_flag; /* Trace 1 */
- UINT32 t0_flag; /* Trace 0 */
- UINT32 s_flag; /* Supervisor */
- UINT32 m_flag; /* Master/Interrupt state */
- UINT32 x_flag; /* Extend */
- UINT32 n_flag; /* Negative */
- UINT32 not_z_flag; /* Zero, inverted for speedups */
- UINT32 v_flag; /* Overflow */
- UINT32 c_flag; /* Carry */
- UINT32 int_mask; /* I0-I2 */
- UINT32 int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
- UINT32 stopped; /* Stopped state */
- UINT32 pref_addr; /* Last prefetch address */
- UINT32 pref_data; /* Data in the prefetch queue */
- UINT32 sr_mask; /* Implemented status register bits */
- UINT32 instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
- UINT32 run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
+ uint32_t fpiar; /* FPU Instruction Address Register (m68040) */
+ uint32_t fpsr; /* FPU Status Register (m68040) */
+ uint32_t fpcr; /* FPU Control Register (m68040) */
+ uint32_t t1_flag; /* Trace 1 */
+ uint32_t t0_flag; /* Trace 0 */
+ uint32_t s_flag; /* Supervisor */
+ uint32_t m_flag; /* Master/Interrupt state */
+ uint32_t x_flag; /* Extend */
+ uint32_t n_flag; /* Negative */
+ uint32_t not_z_flag; /* Zero, inverted for speedups */
+ uint32_t v_flag; /* Overflow */
+ uint32_t c_flag; /* Carry */
+ uint32_t int_mask; /* I0-I2 */
+ uint32_t int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
+ uint32_t stopped; /* Stopped state */
+ uint32_t pref_addr; /* Last prefetch address */
+ uint32_t pref_data; /* Data in the prefetch queue */
+ uint32_t sr_mask; /* Implemented status register bits */
+ uint32_t instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
+ uint32_t run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
int has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */
int has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */
int pmmu_enabled; /* Indicates if the PMMU is enabled */
@@ -214,34 +214,34 @@ public:
int fpu_just_reset; /* Indicates the FPU was just reset */
/* Clocks required for instructions / exceptions */
- UINT32 cyc_bcc_notake_b;
- UINT32 cyc_bcc_notake_w;
- UINT32 cyc_dbcc_f_noexp;
- UINT32 cyc_dbcc_f_exp;
- UINT32 cyc_scc_r_true;
- UINT32 cyc_movem_w;
- UINT32 cyc_movem_l;
- UINT32 cyc_shift;
- UINT32 cyc_reset;
+ uint32_t cyc_bcc_notake_b;
+ uint32_t cyc_bcc_notake_w;
+ uint32_t cyc_dbcc_f_noexp;
+ uint32_t cyc_dbcc_f_exp;
+ uint32_t cyc_scc_r_true;
+ uint32_t cyc_movem_w;
+ uint32_t cyc_movem_l;
+ uint32_t cyc_shift;
+ uint32_t cyc_reset;
int initial_cycles;
int remaining_cycles; /* Number of clocks remaining */
int reset_cycles;
- UINT32 tracing;
+ uint32_t tracing;
int m_address_error;
- UINT32 aerr_address;
- UINT32 aerr_write_mode;
- UINT32 aerr_fc;
+ uint32_t aerr_address;
+ uint32_t aerr_write_mode;
+ uint32_t aerr_fc;
/* Virtual IRQ lines state */
- UINT32 virq_state;
- UINT32 nmi_pending;
+ uint32_t virq_state;
+ uint32_t nmi_pending;
void (**jump_table)(m68000_base_device *m68k);
- const UINT8* cyc_instruction;
- const UINT8* cyc_exception;
+ const uint8_t* cyc_instruction;
+ const uint8_t* cyc_exception;
/* Callbacks to host */
device_irq_acknowledge_delegate int_ack_callback; /* Interrupt Acknowledge */
@@ -257,13 +257,13 @@ public:
/* Redirect memory calls */
- typedef delegate<UINT8 (offs_t)> m68k_read8_delegate;
- typedef delegate<UINT16 (offs_t)> m68k_readimm16_delegate;
- typedef delegate<UINT16 (offs_t)> m68k_read16_delegate;
- typedef delegate<UINT32 (offs_t)> m68k_read32_delegate;
- typedef delegate<void (offs_t, UINT8)> m68k_write8_delegate;
- typedef delegate<void (offs_t, UINT16)> m68k_write16_delegate;
- typedef delegate<void (offs_t, UINT32)> m68k_write32_delegate;
+ typedef delegate<uint8_t (offs_t)> m68k_read8_delegate;
+ typedef delegate<uint16_t (offs_t)> m68k_readimm16_delegate;
+ typedef delegate<uint16_t (offs_t)> m68k_read16_delegate;
+ typedef delegate<uint32_t (offs_t)> m68k_read32_delegate;
+ typedef delegate<void (offs_t, uint8_t)> m68k_write8_delegate;
+ typedef delegate<void (offs_t, uint16_t)> m68k_write16_delegate;
+ typedef delegate<void (offs_t, uint32_t)> m68k_write32_delegate;
// class m68k_memory_interface
// {
@@ -284,27 +284,27 @@ public:
m68k_write32_delegate write32;
private:
- UINT16 m68008_read_immediate_16(offs_t address);
- UINT16 read_immediate_16(offs_t address);
- UINT16 simple_read_immediate_16(offs_t address);
-
- void m68000_write_byte(offs_t address, UINT8 data);
-
- UINT8 read_byte_32_mmu(offs_t address);
- void write_byte_32_mmu(offs_t address, UINT8 data);
- UINT16 read_immediate_16_mmu(offs_t address);
- UINT16 readword_d32_mmu(offs_t address);
- void writeword_d32_mmu(offs_t address, UINT16 data);
- UINT32 readlong_d32_mmu(offs_t address);
- void writelong_d32_mmu(offs_t address, UINT32 data);
-
- UINT8 read_byte_32_hmmu(offs_t address);
- void write_byte_32_hmmu(offs_t address, UINT8 data);
- UINT16 read_immediate_16_hmmu(offs_t address);
- UINT16 readword_d32_hmmu(offs_t address);
- void writeword_d32_hmmu(offs_t address, UINT16 data);
- UINT32 readlong_d32_hmmu(offs_t address);
- void writelong_d32_hmmu(offs_t address, UINT32 data);
+ uint16_t m68008_read_immediate_16(offs_t address);
+ uint16_t read_immediate_16(offs_t address);
+ uint16_t simple_read_immediate_16(offs_t address);
+
+ void m68000_write_byte(offs_t address, uint8_t data);
+
+ uint8_t read_byte_32_mmu(offs_t address);
+ void write_byte_32_mmu(offs_t address, uint8_t data);
+ uint16_t read_immediate_16_mmu(offs_t address);
+ uint16_t readword_d32_mmu(offs_t address);
+ void writeword_d32_mmu(offs_t address, uint16_t data);
+ uint32_t readlong_d32_mmu(offs_t address);
+ void writelong_d32_mmu(offs_t address, uint32_t data);
+
+ uint8_t read_byte_32_hmmu(offs_t address);
+ void write_byte_32_hmmu(offs_t address, uint8_t data);
+ uint16_t read_immediate_16_hmmu(offs_t address);
+ uint16_t readword_d32_hmmu(offs_t address);
+ void writeword_d32_hmmu(offs_t address, uint16_t data);
+ uint32_t readlong_d32_hmmu(offs_t address);
+ void writelong_d32_hmmu(offs_t address, uint32_t data);
// m68000_base_device *m_cpustate;
// };
@@ -315,37 +315,37 @@ public:
address_space *m_space, *m_ospace;
direct_read_data *m_direct, *m_odirect;
- UINT32 iotemp;
+ uint32_t iotemp;
/* save state data */
- UINT16 save_sr;
- UINT8 save_stopped;
- UINT8 save_halted;
+ uint16_t save_sr;
+ uint8_t save_stopped;
+ uint8_t save_halted;
/* PMMU registers */
- UINT32 mmu_crp_aptr, mmu_crp_limit;
- UINT32 mmu_srp_aptr, mmu_srp_limit;
- UINT32 mmu_urp_aptr; /* 040 only */
- UINT32 mmu_tc;
- UINT16 mmu_sr;
- UINT32 mmu_sr_040;
- UINT32 mmu_atc_tag[MMU_ATC_ENTRIES], mmu_atc_data[MMU_ATC_ENTRIES];
- UINT32 mmu_atc_rr;
- UINT32 mmu_tt0, mmu_tt1;
- UINT32 mmu_itt0, mmu_itt1, mmu_dtt0, mmu_dtt1;
- UINT32 mmu_acr0, mmu_acr1, mmu_acr2, mmu_acr3;
- UINT32 mmu_last_page_entry, mmu_last_page_entry_addr;
-
- UINT16 mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
- UINT16 mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
- UINT16 mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
- UINT32 mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
- UINT16 mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
- UINT16 mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
- UINT16 mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
-
- UINT32 ic_address[M68K_IC_SIZE]; /* instruction cache address data */
- UINT32 ic_data[M68K_IC_SIZE]; /* instruction cache content data */
+ uint32_t mmu_crp_aptr, mmu_crp_limit;
+ uint32_t mmu_srp_aptr, mmu_srp_limit;
+ uint32_t mmu_urp_aptr; /* 040 only */
+ uint32_t mmu_tc;
+ uint16_t mmu_sr;
+ uint32_t mmu_sr_040;
+ uint32_t mmu_atc_tag[MMU_ATC_ENTRIES], mmu_atc_data[MMU_ATC_ENTRIES];
+ uint32_t mmu_atc_rr;
+ uint32_t mmu_tt0, mmu_tt1;
+ uint32_t mmu_itt0, mmu_itt1, mmu_dtt0, mmu_dtt1;
+ uint32_t mmu_acr0, mmu_acr1, mmu_acr2, mmu_acr3;
+ uint32_t mmu_last_page_entry, mmu_last_page_entry_addr;
+
+ uint16_t mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */
+ uint16_t mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */
+ uint16_t mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */
+ uint32_t mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */
+ uint16_t mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */
+ uint16_t mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */
+ uint16_t mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */
+
+ uint32_t ic_address[M68K_IC_SIZE]; /* instruction cache address data */
+ uint32_t ic_data[M68K_IC_SIZE]; /* instruction cache content data */
bool ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */
@@ -379,7 +379,7 @@ public:
void init_cpu_coldfire(void);
- void m68ki_exception_interrupt(m68000_base_device *m68k, UINT32 int_level);
+ void m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level);
void reset_cpu(void);
inline void cpu_execute(void);
@@ -399,22 +399,22 @@ class m68000_device : public m68000_base_device
{
public:
// construction/destruction
- m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
- m68000_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source);
+ m68000_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 10; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 10; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 4; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 4; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -424,16 +424,16 @@ class m68301_device : public m68000_base_device
{
public:
// construction/destruction
- m68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 10; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 10; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 4; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 4; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -446,16 +446,16 @@ class m68008_device : public m68000_base_device
{
public:
// construction/destruction
- m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 10; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 10; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 4; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 4; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -465,16 +465,16 @@ class m68008plcc_device : public m68000_base_device
{
public:
// construction/destruction
- m68008plcc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68008plcc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 10; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 10; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 4; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 4; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -484,16 +484,16 @@ class m68010_device : public m68000_base_device
{
public:
// construction/destruction
- m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 10; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 10; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 4; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 4; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -503,16 +503,16 @@ class m68ec020_device : public m68000_base_device
{
public:
// construction/destruction
- m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -522,16 +522,16 @@ class m68020_device : public m68000_base_device
{
public:
// construction/destruction
- m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -541,16 +541,16 @@ class m68020fpu_device : public m68000_base_device
{
public:
// construction/destruction
- m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -560,16 +560,16 @@ class m68020pmmu_device : public m68000_base_device
{
public:
// construction/destruction
- m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -579,16 +579,16 @@ class m68020hmmu_device : public m68000_base_device
{
public:
// construction/destruction
- m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
virtual bool memory_translate(address_spacenum space, int intention, offs_t &address) override;
@@ -600,16 +600,16 @@ class m68ec030_device : public m68000_base_device
{
public:
// construction/destruction
- m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -619,16 +619,16 @@ class m68030_device : public m68000_base_device
{
public:
// construction/destruction
- m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -638,16 +638,16 @@ class m68ec040_device : public m68000_base_device
{
public:
// construction/destruction
- m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -657,16 +657,16 @@ class m68lc040_device : public m68000_base_device
{
public:
// construction/destruction
- m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -676,16 +676,16 @@ class m68040_device : public m68000_base_device
{
public:
// construction/destruction
- m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -695,16 +695,16 @@ class scc68070_device : public m68000_base_device
{
public:
// construction/destruction
- scc68070_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ scc68070_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 10; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 10; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 4; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 4; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -717,19 +717,19 @@ class fscpu32_device : public m68000_base_device
{
public:
// construction/destruction
- fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- fscpu32_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source);
+ fscpu32_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
virtual void device_start() override;
@@ -741,16 +741,16 @@ class mcf5206e_device : public m68000_base_device
{
public:
// construction/destruction
- mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; };
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; };
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; };
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; };
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT32 execute_min_cycles() const override { return 2; };
- virtual UINT32 execute_max_cycles() const override { return 158; };
+ virtual uint32_t execute_min_cycles() const override { return 2; };
+ virtual uint32_t execute_max_cycles() const override { return 158; };
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device-level overrides
diff --git a/src/devices/cpu/m68000/m68k_in.cpp b/src/devices/cpu/m68000/m68k_in.cpp
index df98a736226..36800d226b3 100644
--- a/src/devices/cpu/m68000/m68k_in.cpp
+++ b/src/devices/cpu/m68000/m68k_in.cpp
@@ -925,10 +925,10 @@ M68KMAKE_OP(040fpu1, 32, ., .)
M68KMAKE_OP(abcd, 8, rr, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = DY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = DY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
@@ -951,10 +951,10 @@ M68KMAKE_OP(abcd, 8, rr, .)
M68KMAKE_OP(abcd, 8, mm, ax7)
{
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
@@ -977,10 +977,10 @@ M68KMAKE_OP(abcd, 8, mm, ax7)
M68KMAKE_OP(abcd, 8, mm, ay7)
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
@@ -1003,10 +1003,10 @@ M68KMAKE_OP(abcd, 8, mm, ay7)
M68KMAKE_OP(abcd, 8, mm, axy7)
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
@@ -1029,10 +1029,10 @@ M68KMAKE_OP(abcd, 8, mm, axy7)
M68KMAKE_OP(abcd, 8, mm, .)
{
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
@@ -1055,10 +1055,10 @@ M68KMAKE_OP(abcd, 8, mm, .)
M68KMAKE_OP(add, 8, er, d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1071,10 +1071,10 @@ M68KMAKE_OP(add, 8, er, d)
M68KMAKE_OP(add, 8, er, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_8;
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_8;
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1087,10 +1087,10 @@ M68KMAKE_OP(add, 8, er, .)
M68KMAKE_OP(add, 16, er, d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1103,10 +1103,10 @@ M68KMAKE_OP(add, 16, er, d)
M68KMAKE_OP(add, 16, er, a)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1119,10 +1119,10 @@ M68KMAKE_OP(add, 16, er, a)
M68KMAKE_OP(add, 16, er, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_16;
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_16;
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1135,10 +1135,10 @@ M68KMAKE_OP(add, 16, er, .)
M68KMAKE_OP(add, 32, er, d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = DY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = DY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1151,10 +1151,10 @@ M68KMAKE_OP(add, 32, er, d)
M68KMAKE_OP(add, 32, er, a)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = AY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = AY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1167,10 +1167,10 @@ M68KMAKE_OP(add, 32, er, a)
M68KMAKE_OP(add, 32, er, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_32;
- UINT32 dst = *r_dst;
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_32;
+ uint32_t dst = *r_dst;
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1183,10 +1183,10 @@ M68KMAKE_OP(add, 32, er, .)
M68KMAKE_OP(add, 8, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = MASK_OUT_ABOVE_8(DX(mc68kcpu));
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = MASK_OUT_ABOVE_8(DX(mc68kcpu));
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1199,10 +1199,10 @@ M68KMAKE_OP(add, 8, re, .)
M68KMAKE_OP(add, 16, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = MASK_OUT_ABOVE_16(DX(mc68kcpu));
- UINT32 dst = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = MASK_OUT_ABOVE_16(DX(mc68kcpu));
+ uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1215,10 +1215,10 @@ M68KMAKE_OP(add, 16, re, .)
M68KMAKE_OP(add, 32, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 src = DX(mc68kcpu);
- UINT32 dst = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t src = DX(mc68kcpu);
+ uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1231,7 +1231,7 @@ M68KMAKE_OP(add, 32, re, .)
M68KMAKE_OP(adda, 16, ., d)
{
- UINT32* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY(mc68kcpu)));
}
@@ -1239,7 +1239,7 @@ M68KMAKE_OP(adda, 16, ., d)
M68KMAKE_OP(adda, 16, ., a)
{
- UINT32* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY(mc68kcpu)));
}
@@ -1247,8 +1247,8 @@ M68KMAKE_OP(adda, 16, ., a)
M68KMAKE_OP(adda, 16, ., .)
{
- UINT32* r_dst = &AX(mc68kcpu);
- UINT32 src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+ uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
*r_dst = MASK_OUT_ABOVE_32(*r_dst + src);
}
@@ -1256,7 +1256,7 @@ M68KMAKE_OP(adda, 16, ., .)
M68KMAKE_OP(adda, 32, ., d)
{
- UINT32* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst + DY(mc68kcpu));
}
@@ -1264,7 +1264,7 @@ M68KMAKE_OP(adda, 32, ., d)
M68KMAKE_OP(adda, 32, ., a)
{
- UINT32* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst + AY(mc68kcpu));
}
@@ -1272,8 +1272,8 @@ M68KMAKE_OP(adda, 32, ., a)
M68KMAKE_OP(adda, 32, ., .)
{
- UINT32* r_dst = &AX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_32;
+ uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_32;
*r_dst = MASK_OUT_ABOVE_32(*r_dst + src);
}
@@ -1281,10 +1281,10 @@ M68KMAKE_OP(adda, 32, ., .)
M68KMAKE_OP(addi, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1297,10 +1297,10 @@ M68KMAKE_OP(addi, 8, ., d)
M68KMAKE_OP(addi, 8, ., .)
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1313,10 +1313,10 @@ M68KMAKE_OP(addi, 8, ., .)
M68KMAKE_OP(addi, 16, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1329,10 +1329,10 @@ M68KMAKE_OP(addi, 16, ., d)
M68KMAKE_OP(addi, 16, ., .)
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 dst = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1345,10 +1345,10 @@ M68KMAKE_OP(addi, 16, ., .)
M68KMAKE_OP(addi, 32, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1361,10 +1361,10 @@ M68KMAKE_OP(addi, 32, ., d)
M68KMAKE_OP(addi, 32, ., .)
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 dst = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1377,10 +1377,10 @@ M68KMAKE_OP(addi, 32, ., .)
M68KMAKE_OP(addq, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1393,10 +1393,10 @@ M68KMAKE_OP(addq, 8, ., d)
M68KMAKE_OP(addq, 8, ., .)
{
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1409,10 +1409,10 @@ M68KMAKE_OP(addq, 8, ., .)
M68KMAKE_OP(addq, 16, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1425,7 +1425,7 @@ M68KMAKE_OP(addq, 16, ., d)
M68KMAKE_OP(addq, 16, ., a)
{
- UINT32* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst + ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1);
}
@@ -1433,10 +1433,10 @@ M68KMAKE_OP(addq, 16, ., a)
M68KMAKE_OP(addq, 16, ., .)
{
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 dst = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1449,10 +1449,10 @@ M68KMAKE_OP(addq, 16, ., .)
M68KMAKE_OP(addq, 32, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 dst = *r_dst;
- UINT32 res = src + dst;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t dst = *r_dst;
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1465,7 +1465,7 @@ M68KMAKE_OP(addq, 32, ., d)
M68KMAKE_OP(addq, 32, ., a)
{
- UINT32* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst + ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1);
}
@@ -1473,10 +1473,10 @@ M68KMAKE_OP(addq, 32, ., a)
M68KMAKE_OP(addq, 32, ., .)
{
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 dst = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = src + dst;
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = src + dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
@@ -1490,10 +1490,10 @@ M68KMAKE_OP(addq, 32, ., .)
M68KMAKE_OP(addx, 8, rr, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1508,10 +1508,10 @@ M68KMAKE_OP(addx, 8, rr, .)
M68KMAKE_OP(addx, 16, rr, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1526,10 +1526,10 @@ M68KMAKE_OP(addx, 16, rr, .)
M68KMAKE_OP(addx, 32, rr, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = DY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = DY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1544,10 +1544,10 @@ M68KMAKE_OP(addx, 32, rr, .)
M68KMAKE_OP(addx, 8, mm, ax7)
{
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1562,10 +1562,10 @@ M68KMAKE_OP(addx, 8, mm, ax7)
M68KMAKE_OP(addx, 8, mm, ay7)
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1580,10 +1580,10 @@ M68KMAKE_OP(addx, 8, mm, ay7)
M68KMAKE_OP(addx, 8, mm, axy7)
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1598,10 +1598,10 @@ M68KMAKE_OP(addx, 8, mm, axy7)
M68KMAKE_OP(addx, 8, mm, .)
{
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->v_flag = VFLAG_ADD_8(src, dst, res);
@@ -1616,10 +1616,10 @@ M68KMAKE_OP(addx, 8, mm, .)
M68KMAKE_OP(addx, 16, mm, .)
{
- UINT32 src = OPER_AY_PD_16(mc68kcpu);
- UINT32 ea = EA_AX_PD_16(mc68kcpu);
- UINT32 dst = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_16(mc68kcpu);
+ uint32_t ea = EA_AX_PD_16(mc68kcpu);
+ uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->v_flag = VFLAG_ADD_16(src, dst, res);
@@ -1634,10 +1634,10 @@ M68KMAKE_OP(addx, 16, mm, .)
M68KMAKE_OP(addx, 32, mm, .)
{
- UINT32 src = OPER_AY_PD_32(mc68kcpu);
- UINT32 ea = EA_AX_PD_32(mc68kcpu);
- UINT32 dst = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = src + dst + XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_32(mc68kcpu);
+ uint32_t ea = EA_AX_PD_32(mc68kcpu);
+ uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = src + dst + XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->v_flag = VFLAG_ADD_32(src, dst, res);
@@ -1712,8 +1712,8 @@ M68KMAKE_OP(and, 32, er, .)
M68KMAKE_OP(and, 8, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 res = DX(mc68kcpu) & m68ki_read_8((mc68kcpu), ea);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t res = DX(mc68kcpu) & m68ki_read_8((mc68kcpu), ea);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->c_flag = CFLAG_CLEAR;
@@ -1726,8 +1726,8 @@ M68KMAKE_OP(and, 8, re, .)
M68KMAKE_OP(and, 16, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 res = DX(mc68kcpu) & m68ki_read_16((mc68kcpu), ea);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t res = DX(mc68kcpu) & m68ki_read_16((mc68kcpu), ea);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->c_flag = CFLAG_CLEAR;
@@ -1740,8 +1740,8 @@ M68KMAKE_OP(and, 16, re, .)
M68KMAKE_OP(and, 32, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 res = DX(mc68kcpu) & m68ki_read_32((mc68kcpu), ea);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t res = DX(mc68kcpu) & m68ki_read_32((mc68kcpu), ea);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -1764,9 +1764,9 @@ M68KMAKE_OP(andi, 8, ., d)
M68KMAKE_OP(andi, 8, ., .)
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 res = src & m68ki_read_8((mc68kcpu), ea);
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t res = src & m68ki_read_8((mc68kcpu), ea);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -1789,9 +1789,9 @@ M68KMAKE_OP(andi, 16, ., d)
M68KMAKE_OP(andi, 16, ., .)
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 res = src & m68ki_read_16((mc68kcpu), ea);
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t res = src & m68ki_read_16((mc68kcpu), ea);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -1814,9 +1814,9 @@ M68KMAKE_OP(andi, 32, ., d)
M68KMAKE_OP(andi, 32, ., .)
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 res = src & m68ki_read_32((mc68kcpu), ea);
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t res = src & m68ki_read_32((mc68kcpu), ea);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -1837,7 +1837,7 @@ M68KMAKE_OP(andi, 16, tos, .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 src = OPER_I_16(mc68kcpu);
+ uint32_t src = OPER_I_16(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) & src);
return;
@@ -1848,10 +1848,10 @@ M68KMAKE_OP(andi, 16, tos, .)
M68KMAKE_OP(asr, 8, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src >> shift;
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -1870,10 +1870,10 @@ M68KMAKE_OP(asr, 8, s, .)
M68KMAKE_OP(asr, 16, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src >> shift;
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -1892,10 +1892,10 @@ M68KMAKE_OP(asr, 16, s, .)
M68KMAKE_OP(asr, 32, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = *r_dst;
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = *r_dst;
+ uint32_t res = src >> shift;
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -1914,10 +1914,10 @@ M68KMAKE_OP(asr, 32, s, .)
M68KMAKE_OP(asr, 8, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src >> shift;
if(shift != 0)
{
@@ -1966,10 +1966,10 @@ M68KMAKE_OP(asr, 8, r, .)
M68KMAKE_OP(asr, 16, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src >> shift;
if(shift != 0)
{
@@ -2018,10 +2018,10 @@ M68KMAKE_OP(asr, 16, r, .)
M68KMAKE_OP(asr, 32, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = *r_dst;
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = *r_dst;
+ uint32_t res = src >> shift;
if(shift != 0)
{
@@ -2070,9 +2070,9 @@ M68KMAKE_OP(asr, 32, r, .)
M68KMAKE_OP(asr, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = src >> 1;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = src >> 1;
if(GET_MSB_16(src))
res |= 0x8000;
@@ -2088,10 +2088,10 @@ M68KMAKE_OP(asr, 16, ., .)
M68KMAKE_OP(asl, 8, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_8(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_8(src << shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -2108,10 +2108,10 @@ M68KMAKE_OP(asl, 8, s, .)
M68KMAKE_OP(asl, 16, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_16(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_16(src << shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -2128,10 +2128,10 @@ M68KMAKE_OP(asl, 16, s, .)
M68KMAKE_OP(asl, 32, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = *r_dst;
- UINT32 res = MASK_OUT_ABOVE_32(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = *r_dst;
+ uint32_t res = MASK_OUT_ABOVE_32(src << shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -2148,10 +2148,10 @@ M68KMAKE_OP(asl, 32, s, .)
M68KMAKE_OP(asl, 8, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_8(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_8(src << shift);
if(shift != 0)
{
@@ -2185,10 +2185,10 @@ M68KMAKE_OP(asl, 8, r, .)
M68KMAKE_OP(asl, 16, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_16(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_16(src << shift);
if(shift != 0)
{
@@ -2222,10 +2222,10 @@ M68KMAKE_OP(asl, 16, r, .)
M68KMAKE_OP(asl, 32, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = *r_dst;
- UINT32 res = MASK_OUT_ABOVE_32(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = *r_dst;
+ uint32_t res = MASK_OUT_ABOVE_32(src << shift);
if(shift != 0)
{
@@ -2259,9 +2259,9 @@ M68KMAKE_OP(asl, 32, r, .)
M68KMAKE_OP(asl, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = MASK_OUT_ABOVE_16(src << 1);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = MASK_OUT_ABOVE_16(src << 1);
m68ki_write_16((mc68kcpu), ea, res);
@@ -2289,7 +2289,7 @@ M68KMAKE_OP(bcc, 16, ., .)
{
if(M68KMAKE_CC)
{
- UINT32 offset = OPER_I_16(mc68kcpu);
+ uint32_t offset = OPER_I_16(mc68kcpu);
REG_PC(mc68kcpu) -= 2;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16((mc68kcpu), offset);
@@ -2306,7 +2306,7 @@ M68KMAKE_OP(bcc, 32, ., .)
{
if(M68KMAKE_CC)
{
- UINT32 offset = OPER_I_32(mc68kcpu);
+ uint32_t offset = OPER_I_32(mc68kcpu);
REG_PC(mc68kcpu) -= 4;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_32((mc68kcpu), offset);
@@ -2330,8 +2330,8 @@ M68KMAKE_OP(bcc, 32, ., .)
M68KMAKE_OP(bchg, 32, r, d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 mask = 1 << (DX(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f);
(mc68kcpu)->not_z_flag = *r_dst & mask;
*r_dst ^= mask;
@@ -2340,9 +2340,9 @@ M68KMAKE_OP(bchg, 32, r, d)
M68KMAKE_OP(bchg, 8, r, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = m68ki_read_8((mc68kcpu), ea);
- UINT32 mask = 1 << (DX(mc68kcpu) & 7);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t mask = 1 << (DX(mc68kcpu) & 7);
(mc68kcpu)->not_z_flag = src & mask;
m68ki_write_8((mc68kcpu), ea, src ^ mask);
@@ -2351,8 +2351,8 @@ M68KMAKE_OP(bchg, 8, r, .)
M68KMAKE_OP(bchg, 32, s, d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
(mc68kcpu)->not_z_flag = *r_dst & mask;
*r_dst ^= mask;
@@ -2361,9 +2361,9 @@ M68KMAKE_OP(bchg, 32, s, d)
M68KMAKE_OP(bchg, 8, s, .)
{
- UINT32 mask = 1 << (OPER_I_8(mc68kcpu) & 7);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = m68ki_read_8((mc68kcpu), ea);
(mc68kcpu)->not_z_flag = src & mask;
m68ki_write_8((mc68kcpu), ea, src ^ mask);
@@ -2372,8 +2372,8 @@ M68KMAKE_OP(bchg, 8, s, .)
M68KMAKE_OP(bclr, 32, r, d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 mask = 1 << (DX(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f);
(mc68kcpu)->not_z_flag = *r_dst & mask;
*r_dst &= ~mask;
@@ -2382,9 +2382,9 @@ M68KMAKE_OP(bclr, 32, r, d)
M68KMAKE_OP(bclr, 8, r, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = m68ki_read_8((mc68kcpu), ea);
- UINT32 mask = 1 << (DX(mc68kcpu) & 7);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t mask = 1 << (DX(mc68kcpu) & 7);
(mc68kcpu)->not_z_flag = src & mask;
m68ki_write_8((mc68kcpu), ea, src & ~mask);
@@ -2393,8 +2393,8 @@ M68KMAKE_OP(bclr, 8, r, .)
M68KMAKE_OP(bclr, 32, s, d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
(mc68kcpu)->not_z_flag = *r_dst & mask;
*r_dst &= ~mask;
@@ -2403,9 +2403,9 @@ M68KMAKE_OP(bclr, 32, s, d)
M68KMAKE_OP(bclr, 8, s, .)
{
- UINT32 mask = 1 << (OPER_I_8(mc68kcpu) & 7);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = m68ki_read_8((mc68kcpu), ea);
(mc68kcpu)->not_z_flag = src & mask;
m68ki_write_8((mc68kcpu), ea, src & ~mask);
@@ -2416,11 +2416,11 @@ M68KMAKE_OP(bfchg, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32* data = &DY(mc68kcpu);
- UINT64 mask;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t* data = &DY(mc68kcpu);
+ uint64_t mask;
if(BIT_B(word2))
@@ -2451,15 +2451,15 @@ M68KMAKE_OP(bfchg, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- INT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32 mask_base;
- UINT32 data_long;
- UINT32 mask_long;
- UINT32 data_byte = 0;
- UINT32 mask_byte = 0;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ int32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t mask_base;
+ uint32_t data_long;
+ uint32_t mask_long;
+ uint32_t data_byte = 0;
+ uint32_t mask_byte = 0;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
@@ -2505,11 +2505,11 @@ M68KMAKE_OP(bfclr, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32* data = &DY(mc68kcpu);
- UINT64 mask;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t* data = &DY(mc68kcpu);
+ uint64_t mask;
if(BIT_B(word2))
@@ -2542,15 +2542,15 @@ M68KMAKE_OP(bfclr, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- INT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32 mask_base;
- UINT32 data_long;
- UINT32 mask_long;
- UINT32 data_byte = 0;
- UINT32 mask_byte = 0;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ int32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t mask_base;
+ uint32_t data_long;
+ uint32_t mask_long;
+ uint32_t data_byte = 0;
+ uint32_t mask_byte = 0;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
@@ -2596,10 +2596,10 @@ M68KMAKE_OP(bfexts, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT64 data = DY(mc68kcpu);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint64_t data = DY(mc68kcpu);
if(BIT_B(word2))
@@ -2630,11 +2630,11 @@ M68KMAKE_OP(bfexts, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- INT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32 data;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ int32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t data;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
@@ -2682,10 +2682,10 @@ M68KMAKE_OP(bfextu, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT64 data = DY(mc68kcpu);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint64_t data = DY(mc68kcpu);
if(BIT_B(word2))
@@ -2716,11 +2716,11 @@ M68KMAKE_OP(bfextu, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- INT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32 data;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ int32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t data;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
@@ -2767,11 +2767,11 @@ M68KMAKE_OP(bfffo, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT64 data = DY(mc68kcpu);
- UINT32 bit;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint64_t data = DY(mc68kcpu);
+ uint32_t bit;
if(BIT_B(word2))
@@ -2805,13 +2805,13 @@ M68KMAKE_OP(bfffo, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- INT32 offset = (word2>>6)&31;
- INT32 local_offset;
- UINT32 width = word2;
- UINT32 data;
- UINT32 bit;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ int32_t offset = (word2>>6)&31;
+ int32_t local_offset;
+ uint32_t width = word2;
+ uint32_t data;
+ uint32_t bit;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
@@ -2857,12 +2857,12 @@ M68KMAKE_OP(bfins, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32* data = &DY(mc68kcpu);
- UINT64 mask;
- UINT64 insert = REG_D(mc68kcpu)[(word2>>12)&7];
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t* data = &DY(mc68kcpu);
+ uint64_t mask;
+ uint64_t insert = REG_D(mc68kcpu)[(word2>>12)&7];
if(BIT_B(word2))
@@ -2899,18 +2899,18 @@ M68KMAKE_OP(bfins, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- INT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32 insert_base = REG_D(mc68kcpu)[(word2>>12)&7];
- UINT32 insert_long;
- UINT32 insert_byte;
- UINT32 mask_base;
- UINT32 data_long;
- UINT32 mask_long;
- UINT32 data_byte = 0;
- UINT32 mask_byte = 0;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ int32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t insert_base = REG_D(mc68kcpu)[(word2>>12)&7];
+ uint32_t insert_long;
+ uint32_t insert_byte;
+ uint32_t mask_base;
+ uint32_t data_long;
+ uint32_t mask_long;
+ uint32_t data_byte = 0;
+ uint32_t mask_byte = 0;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
@@ -2975,11 +2975,11 @@ M68KMAKE_OP(bfset, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32* data = &DY(mc68kcpu);
- UINT64 mask;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t* data = &DY(mc68kcpu);
+ uint64_t mask;
if(BIT_B(word2))
@@ -3012,15 +3012,15 @@ M68KMAKE_OP(bfset, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- INT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32 mask_base;
- UINT32 data_long;
- UINT32 mask_long;
- UINT32 data_byte = 0;
- UINT32 mask_byte = 0;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ int32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t mask_base;
+ uint32_t data_long;
+ uint32_t mask_long;
+ uint32_t data_byte = 0;
+ uint32_t mask_byte = 0;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
@@ -3065,11 +3065,11 @@ M68KMAKE_OP(bftst, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32* data = &DY(mc68kcpu);
- UINT64 mask;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t* data = &DY(mc68kcpu);
+ uint64_t mask;
if(BIT_B(word2))
@@ -3100,15 +3100,15 @@ M68KMAKE_OP(bftst, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- INT32 offset = (word2>>6)&31;
- UINT32 width = word2;
- UINT32 mask_base;
- UINT32 data_long;
- UINT32 mask_long;
- UINT32 data_byte = 0;
- UINT32 mask_byte = 0;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ int32_t offset = (word2>>6)&31;
+ uint32_t width = word2;
+ uint32_t mask_base;
+ uint32_t data_long;
+ uint32_t mask_long;
+ uint32_t data_byte = 0;
+ uint32_t mask_byte = 0;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(BIT_B(word2))
offset = MAKE_INT_32(REG_D(mc68kcpu)[offset&7]);
@@ -3169,7 +3169,7 @@ M68KMAKE_OP(bra, 8, ., .)
M68KMAKE_OP(bra, 16, ., .)
{
- UINT32 offset = OPER_I_16(mc68kcpu);
+ uint32_t offset = OPER_I_16(mc68kcpu);
REG_PC(mc68kcpu) -= 2;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16((mc68kcpu), offset);
@@ -3182,7 +3182,7 @@ M68KMAKE_OP(bra, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 offset = OPER_I_32(mc68kcpu);
+ uint32_t offset = OPER_I_32(mc68kcpu);
REG_PC(mc68kcpu) -= 4;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_32((mc68kcpu), offset);
@@ -3202,8 +3202,8 @@ M68KMAKE_OP(bra, 32, ., .)
M68KMAKE_OP(bset, 32, r, d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 mask = 1 << (DX(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t mask = 1 << (DX(mc68kcpu) & 0x1f);
(mc68kcpu)->not_z_flag = *r_dst & mask;
*r_dst |= mask;
@@ -3212,9 +3212,9 @@ M68KMAKE_OP(bset, 32, r, d)
M68KMAKE_OP(bset, 8, r, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = m68ki_read_8((mc68kcpu), ea);
- UINT32 mask = 1 << (DX(mc68kcpu) & 7);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t mask = 1 << (DX(mc68kcpu) & 7);
(mc68kcpu)->not_z_flag = src & mask;
m68ki_write_8((mc68kcpu), ea, src | mask);
@@ -3223,8 +3223,8 @@ M68KMAKE_OP(bset, 8, r, .)
M68KMAKE_OP(bset, 32, s, d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 0x1f);
(mc68kcpu)->not_z_flag = *r_dst & mask;
*r_dst |= mask;
@@ -3233,9 +3233,9 @@ M68KMAKE_OP(bset, 32, s, d)
M68KMAKE_OP(bset, 8, s, .)
{
- UINT32 mask = 1 << (OPER_I_8(mc68kcpu) & 7);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t mask = 1 << (OPER_I_8(mc68kcpu) & 7);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = m68ki_read_8((mc68kcpu), ea);
(mc68kcpu)->not_z_flag = src & mask;
m68ki_write_8((mc68kcpu), ea, src | mask);
@@ -3252,7 +3252,7 @@ M68KMAKE_OP(bsr, 8, ., .)
M68KMAKE_OP(bsr, 16, ., .)
{
- UINT32 offset = OPER_I_16(mc68kcpu);
+ uint32_t offset = OPER_I_16(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
REG_PC(mc68kcpu) -= 2;
@@ -3264,7 +3264,7 @@ M68KMAKE_OP(bsr, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 offset = OPER_I_32(mc68kcpu);
+ uint32_t offset = OPER_I_32(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
REG_PC(mc68kcpu) -= 4;
@@ -3300,7 +3300,7 @@ M68KMAKE_OP(btst, 32, s, d)
M68KMAKE_OP(btst, 8, s, .)
{
- UINT32 bit = OPER_I_8(mc68kcpu) & 7;
+ uint32_t bit = OPER_I_8(mc68kcpu) & 7;
(mc68kcpu)->not_z_flag = M68KMAKE_GET_OPER_AY_8 & (1 << bit);
}
@@ -3311,7 +3311,7 @@ M68KMAKE_OP(callm, 32, ., .)
/* note: watch out for pcrelative modes */
if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type))
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
REG_PC(mc68kcpu) += 2;
@@ -3328,11 +3328,11 @@ M68KMAKE_OP(cas, 8, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 dest = m68ki_read_8((mc68kcpu), ea);
- UINT32* compare = &REG_D(mc68kcpu)[word2 & 7];
- UINT32 res = dest - MASK_OUT_ABOVE_8(*compare);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t dest = m68ki_read_8((mc68kcpu), ea);
+ uint32_t* compare = &REG_D(mc68kcpu)[word2 & 7];
+ uint32_t res = dest - MASK_OUT_ABOVE_8(*compare);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_8(res);
@@ -3357,11 +3357,11 @@ M68KMAKE_OP(cas, 16, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 dest = m68ki_read_16((mc68kcpu), ea);
- UINT32* compare = &REG_D(mc68kcpu)[word2 & 7];
- UINT32 res = dest - MASK_OUT_ABOVE_16(*compare);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t dest = m68ki_read_16((mc68kcpu), ea);
+ uint32_t* compare = &REG_D(mc68kcpu)[word2 & 7];
+ uint32_t res = dest - MASK_OUT_ABOVE_16(*compare);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_16(res);
@@ -3386,11 +3386,11 @@ M68KMAKE_OP(cas, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 dest = m68ki_read_32((mc68kcpu), ea);
- UINT32* compare = &REG_D(mc68kcpu)[word2 & 7];
- UINT32 res = dest - *compare;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t dest = m68ki_read_32((mc68kcpu), ea);
+ uint32_t* compare = &REG_D(mc68kcpu)[word2 & 7];
+ uint32_t res = dest - *compare;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_32(res);
@@ -3415,15 +3415,15 @@ M68KMAKE_OP(cas2, 16, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_32(mc68kcpu);
- UINT32* compare1 = &REG_D(mc68kcpu)[(word2 >> 16) & 7];
- UINT32 ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15];
- UINT32 dest1 = m68ki_read_16((mc68kcpu), ea1);
- UINT32 res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);
- UINT32* compare2 = &REG_D(mc68kcpu)[word2 & 7];
- UINT32 ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- UINT32 dest2 = m68ki_read_16((mc68kcpu), ea2);
- UINT32 res2;
+ uint32_t word2 = OPER_I_32(mc68kcpu);
+ uint32_t* compare1 = &REG_D(mc68kcpu)[(word2 >> 16) & 7];
+ uint32_t ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15];
+ uint32_t dest1 = m68ki_read_16((mc68kcpu), ea1);
+ uint32_t res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);
+ uint32_t* compare2 = &REG_D(mc68kcpu)[word2 & 7];
+ uint32_t ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
+ uint32_t dest2 = m68ki_read_16((mc68kcpu), ea2);
+ uint32_t res2;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_16(res1);
@@ -3460,15 +3460,15 @@ M68KMAKE_OP(cas2, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_32(mc68kcpu);
- UINT32* compare1 = &REG_D(mc68kcpu)[(word2 >> 16) & 7];
- UINT32 ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15];
- UINT32 dest1 = m68ki_read_32((mc68kcpu), ea1);
- UINT32 res1 = dest1 - *compare1;
- UINT32* compare2 = &REG_D(mc68kcpu)[word2 & 7];
- UINT32 ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- UINT32 dest2 = m68ki_read_32((mc68kcpu), ea2);
- UINT32 res2;
+ uint32_t word2 = OPER_I_32(mc68kcpu);
+ uint32_t* compare1 = &REG_D(mc68kcpu)[(word2 >> 16) & 7];
+ uint32_t ea1 = REG_DA(mc68kcpu)[(word2 >> 28) & 15];
+ uint32_t dest1 = m68ki_read_32((mc68kcpu), ea1);
+ uint32_t res1 = dest1 - *compare1;
+ uint32_t* compare2 = &REG_D(mc68kcpu)[word2 & 7];
+ uint32_t ea2 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
+ uint32_t dest2 = m68ki_read_32((mc68kcpu), ea2);
+ uint32_t res2;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_32(res1);
@@ -3503,8 +3503,8 @@ M68KMAKE_OP(cas2, 32, ., .)
M68KMAKE_OP(chk, 16, ., d)
{
- INT32 src = MAKE_INT_16(DX(mc68kcpu));
- INT32 bound = MAKE_INT_16(DY(mc68kcpu));
+ int32_t src = MAKE_INT_16(DX(mc68kcpu));
+ int32_t bound = MAKE_INT_16(DY(mc68kcpu));
(mc68kcpu)->not_z_flag = ZFLAG_16(src); /* Undocumented */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */
@@ -3521,8 +3521,8 @@ M68KMAKE_OP(chk, 16, ., d)
M68KMAKE_OP(chk, 16, ., .)
{
- INT32 src = MAKE_INT_16(DX(mc68kcpu));
- INT32 bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+ int32_t src = MAKE_INT_16(DX(mc68kcpu));
+ int32_t bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
(mc68kcpu)->not_z_flag = ZFLAG_16(src); /* Undocumented */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */
@@ -3541,8 +3541,8 @@ M68KMAKE_OP(chk, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- INT32 src = MAKE_INT_32(DX(mc68kcpu));
- INT32 bound = MAKE_INT_32(DY(mc68kcpu));
+ int32_t src = MAKE_INT_32(DX(mc68kcpu));
+ int32_t bound = MAKE_INT_32(DY(mc68kcpu));
(mc68kcpu)->not_z_flag = ZFLAG_32(src); /* Undocumented */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */
@@ -3564,8 +3564,8 @@ M68KMAKE_OP(chk, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- INT32 src = MAKE_INT_32(DX(mc68kcpu));
- INT32 bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32);
+ int32_t src = MAKE_INT_32(DX(mc68kcpu));
+ int32_t bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32);
(mc68kcpu)->not_z_flag = ZFLAG_32(src); /* Undocumented */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undocumented */
@@ -3587,11 +3587,11 @@ M68KMAKE_OP(chk2cmp2, 8, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
- UINT32 ea = EA_PCDI_8(mc68kcpu);
- UINT32 lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
+ uint32_t ea = EA_PCDI_8(mc68kcpu);
+ uint32_t lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1);
if(!BIT_F(word2))
(mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
@@ -3618,11 +3618,11 @@ M68KMAKE_OP(chk2cmp2, 8, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
- UINT32 ea = EA_PCIX_8(mc68kcpu);
- UINT32 lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
+ uint32_t ea = EA_PCIX_8(mc68kcpu);
+ uint32_t lower_bound = m68ki_read_pcrel_8((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_pcrel_8((mc68kcpu), ea + 1);
if(!BIT_F(word2))
(mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
@@ -3649,11 +3649,11 @@ M68KMAKE_OP(chk2cmp2, 8, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 lower_bound = m68ki_read_8((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_8((mc68kcpu), ea + 1);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xff;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t lower_bound = m68ki_read_8((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_8((mc68kcpu), ea + 1);
if(!BIT_F(word2))
(mc68kcpu)->c_flag = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
@@ -3680,11 +3680,11 @@ M68KMAKE_OP(chk2cmp2, 16, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
- UINT32 ea = EA_PCDI_16(mc68kcpu);
- UINT32 lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
+ uint32_t ea = EA_PCDI_16(mc68kcpu);
+ uint32_t lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2);
if(!BIT_F(word2))
(mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
@@ -3716,11 +3716,11 @@ M68KMAKE_OP(chk2cmp2, 16, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
- UINT32 ea = EA_PCIX_16(mc68kcpu);
- UINT32 lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
+ uint32_t ea = EA_PCIX_16(mc68kcpu);
+ uint32_t lower_bound = m68ki_read_pcrel_16((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_pcrel_16((mc68kcpu), ea + 2);
if(!BIT_F(word2))
(mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
@@ -3752,11 +3752,11 @@ M68KMAKE_OP(chk2cmp2, 16, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 lower_bound = m68ki_read_16((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_16((mc68kcpu), ea + 2);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15]&0xffff;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t lower_bound = m68ki_read_16((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_16((mc68kcpu), ea + 2);
if(!BIT_F(word2))
(mc68kcpu)->c_flag = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
@@ -3789,11 +3789,11 @@ M68KMAKE_OP(chk2cmp2, 32, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- UINT32 ea = EA_PCDI_32(mc68kcpu);
- UINT32 lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
+ uint32_t ea = EA_PCDI_32(mc68kcpu);
+ uint32_t lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4);
(mc68kcpu)->c_flag = compare - lower_bound;
(mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
@@ -3819,11 +3819,11 @@ M68KMAKE_OP(chk2cmp2, 32, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- UINT32 ea = EA_PCIX_32(mc68kcpu);
- UINT32 lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
+ uint32_t ea = EA_PCIX_32(mc68kcpu);
+ uint32_t lower_bound = m68ki_read_pcrel_32((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_pcrel_32((mc68kcpu), ea + 4);
(mc68kcpu)->c_flag = compare - lower_bound;
(mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
@@ -3849,11 +3849,11 @@ M68KMAKE_OP(chk2cmp2, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 lower_bound = m68ki_read_32((mc68kcpu), ea);
- UINT32 upper_bound = m68ki_read_32((mc68kcpu), ea + 4);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t compare = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t lower_bound = m68ki_read_32((mc68kcpu), ea);
+ uint32_t upper_bound = m68ki_read_32((mc68kcpu), ea + 4);
(mc68kcpu)->c_flag = compare - lower_bound;
(mc68kcpu)->not_z_flag = !((upper_bound==compare) | (lower_bound==compare));
@@ -3888,7 +3888,7 @@ M68KMAKE_OP(clr, 8, ., d)
M68KMAKE_OP(clr, 8, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type))
{
@@ -3917,7 +3917,7 @@ M68KMAKE_OP(clr, 16, ., d)
M68KMAKE_OP(clr, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type))
{
@@ -3946,7 +3946,7 @@ M68KMAKE_OP(clr, 32, ., d)
M68KMAKE_OP(clr, 32, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type))
{
@@ -3964,9 +3964,9 @@ M68KMAKE_OP(clr, 32, ., .)
M68KMAKE_OP(cmp, 8, ., d)
{
- UINT32 src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_8(DX(mc68kcpu));
- UINT32 res = dst - src;
+ uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_8(DX(mc68kcpu));
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -3977,9 +3977,9 @@ M68KMAKE_OP(cmp, 8, ., d)
M68KMAKE_OP(cmp, 8, ., .)
{
- UINT32 src = M68KMAKE_GET_OPER_AY_8;
- UINT32 dst = MASK_OUT_ABOVE_8(DX(mc68kcpu));
- UINT32 res = dst - src;
+ uint32_t src = M68KMAKE_GET_OPER_AY_8;
+ uint32_t dst = MASK_OUT_ABOVE_8(DX(mc68kcpu));
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -3990,9 +3990,9 @@ M68KMAKE_OP(cmp, 8, ., .)
M68KMAKE_OP(cmp, 16, ., d)
{
- UINT32 src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
- UINT32 res = dst - src;
+ uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -4003,9 +4003,9 @@ M68KMAKE_OP(cmp, 16, ., d)
M68KMAKE_OP(cmp, 16, ., a)
{
- UINT32 src = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
- UINT32 res = dst - src;
+ uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -4016,9 +4016,9 @@ M68KMAKE_OP(cmp, 16, ., a)
M68KMAKE_OP(cmp, 16, ., .)
{
- UINT32 src = M68KMAKE_GET_OPER_AY_16;
- UINT32 dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
- UINT32 res = dst - src;
+ uint32_t src = M68KMAKE_GET_OPER_AY_16;
+ uint32_t dst = MASK_OUT_ABOVE_16(DX(mc68kcpu));
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -4029,9 +4029,9 @@ M68KMAKE_OP(cmp, 16, ., .)
M68KMAKE_OP(cmp, 32, ., d)
{
- UINT32 src = DY(mc68kcpu);
- UINT32 dst = DX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = DY(mc68kcpu);
+ uint32_t dst = DX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4042,9 +4042,9 @@ M68KMAKE_OP(cmp, 32, ., d)
M68KMAKE_OP(cmp, 32, ., a)
{
- UINT32 src = AY(mc68kcpu);
- UINT32 dst = DX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = AY(mc68kcpu);
+ uint32_t dst = DX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4055,9 +4055,9 @@ M68KMAKE_OP(cmp, 32, ., a)
M68KMAKE_OP(cmp, 32, ., .)
{
- UINT32 src = M68KMAKE_GET_OPER_AY_32;
- UINT32 dst = DX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = M68KMAKE_GET_OPER_AY_32;
+ uint32_t dst = DX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4068,9 +4068,9 @@ M68KMAKE_OP(cmp, 32, ., .)
M68KMAKE_OP(cmpa, 16, ., d)
{
- UINT32 src = MAKE_INT_16(DY(mc68kcpu));
- UINT32 dst = AX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = MAKE_INT_16(DY(mc68kcpu));
+ uint32_t dst = AX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4081,9 +4081,9 @@ M68KMAKE_OP(cmpa, 16, ., d)
M68KMAKE_OP(cmpa, 16, ., a)
{
- UINT32 src = MAKE_INT_16(AY(mc68kcpu));
- UINT32 dst = AX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = MAKE_INT_16(AY(mc68kcpu));
+ uint32_t dst = AX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4094,9 +4094,9 @@ M68KMAKE_OP(cmpa, 16, ., a)
M68KMAKE_OP(cmpa, 16, ., .)
{
- UINT32 src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
- UINT32 dst = AX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+ uint32_t dst = AX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4107,9 +4107,9 @@ M68KMAKE_OP(cmpa, 16, ., .)
M68KMAKE_OP(cmpa, 32, ., d)
{
- UINT32 src = DY(mc68kcpu);
- UINT32 dst = AX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = DY(mc68kcpu);
+ uint32_t dst = AX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4120,9 +4120,9 @@ M68KMAKE_OP(cmpa, 32, ., d)
M68KMAKE_OP(cmpa, 32, ., a)
{
- UINT32 src = AY(mc68kcpu);
- UINT32 dst = AX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = AY(mc68kcpu);
+ uint32_t dst = AX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4133,9 +4133,9 @@ M68KMAKE_OP(cmpa, 32, ., a)
M68KMAKE_OP(cmpa, 32, ., .)
{
- UINT32 src = M68KMAKE_GET_OPER_AY_32;
- UINT32 dst = AX(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = M68KMAKE_GET_OPER_AY_32;
+ uint32_t dst = AX(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4146,9 +4146,9 @@ M68KMAKE_OP(cmpa, 32, ., .)
M68KMAKE_OP(cmpi, 8, ., d)
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 dst = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t dst = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -4159,9 +4159,9 @@ M68KMAKE_OP(cmpi, 8, ., d)
M68KMAKE_OP(cmpi, 8, ., .)
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 dst = M68KMAKE_GET_OPER_AY_8;
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t dst = M68KMAKE_GET_OPER_AY_8;
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -4174,9 +4174,9 @@ M68KMAKE_OP(cmpi, 8, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 dst = OPER_PCDI_8(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t dst = OPER_PCDI_8(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -4192,9 +4192,9 @@ M68KMAKE_OP(cmpi, 8, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 dst = OPER_PCIX_8(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t dst = OPER_PCIX_8(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -4208,9 +4208,9 @@ M68KMAKE_OP(cmpi, 8, ., pcix)
M68KMAKE_OP(cmpi, 16, ., d)
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 dst = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t dst = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -4221,9 +4221,9 @@ M68KMAKE_OP(cmpi, 16, ., d)
M68KMAKE_OP(cmpi, 16, ., .)
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 dst = M68KMAKE_GET_OPER_AY_16;
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t dst = M68KMAKE_GET_OPER_AY_16;
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -4236,9 +4236,9 @@ M68KMAKE_OP(cmpi, 16, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 dst = OPER_PCDI_16(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t dst = OPER_PCDI_16(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -4254,9 +4254,9 @@ M68KMAKE_OP(cmpi, 16, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 dst = OPER_PCIX_16(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t dst = OPER_PCIX_16(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -4270,9 +4270,9 @@ M68KMAKE_OP(cmpi, 16, ., pcix)
M68KMAKE_OP(cmpi, 32, ., d)
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 dst = DY(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t dst = DY(mc68kcpu);
+ uint32_t res = dst - src;
if (!(mc68kcpu)->cmpild_instr_callback.isnull())
((mc68kcpu)->cmpild_instr_callback)(*(mc68kcpu)->program, (mc68kcpu)->ir & 7, src, 0xffffffff);
@@ -4286,9 +4286,9 @@ M68KMAKE_OP(cmpi, 32, ., d)
M68KMAKE_OP(cmpi, 32, ., .)
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 dst = M68KMAKE_GET_OPER_AY_32;
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t dst = M68KMAKE_GET_OPER_AY_32;
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4301,9 +4301,9 @@ M68KMAKE_OP(cmpi, 32, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 dst = OPER_PCDI_32(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t dst = OPER_PCDI_32(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4319,9 +4319,9 @@ M68KMAKE_OP(cmpi, 32, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 dst = OPER_PCIX_32(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t dst = OPER_PCIX_32(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4335,9 +4335,9 @@ M68KMAKE_OP(cmpi, 32, ., pcix)
M68KMAKE_OP(cmpm, 8, ., ax7)
{
- UINT32 src = OPER_AY_PI_8(mc68kcpu);
- UINT32 dst = OPER_A7_PI_8(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_AY_PI_8(mc68kcpu);
+ uint32_t dst = OPER_A7_PI_8(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -4348,9 +4348,9 @@ M68KMAKE_OP(cmpm, 8, ., ax7)
M68KMAKE_OP(cmpm, 8, ., ay7)
{
- UINT32 src = OPER_A7_PI_8(mc68kcpu);
- UINT32 dst = OPER_AX_PI_8(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_A7_PI_8(mc68kcpu);
+ uint32_t dst = OPER_AX_PI_8(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -4361,9 +4361,9 @@ M68KMAKE_OP(cmpm, 8, ., ay7)
M68KMAKE_OP(cmpm, 8, ., axy7)
{
- UINT32 src = OPER_A7_PI_8(mc68kcpu);
- UINT32 dst = OPER_A7_PI_8(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_A7_PI_8(mc68kcpu);
+ uint32_t dst = OPER_A7_PI_8(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -4374,9 +4374,9 @@ M68KMAKE_OP(cmpm, 8, ., axy7)
M68KMAKE_OP(cmpm, 8, ., .)
{
- UINT32 src = OPER_AY_PI_8(mc68kcpu);
- UINT32 dst = OPER_AX_PI_8(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_AY_PI_8(mc68kcpu);
+ uint32_t dst = OPER_AX_PI_8(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -4387,9 +4387,9 @@ M68KMAKE_OP(cmpm, 8, ., .)
M68KMAKE_OP(cmpm, 16, ., .)
{
- UINT32 src = OPER_AY_PI_16(mc68kcpu);
- UINT32 dst = OPER_AX_PI_16(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_AY_PI_16(mc68kcpu);
+ uint32_t dst = OPER_AX_PI_16(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -4400,9 +4400,9 @@ M68KMAKE_OP(cmpm, 16, ., .)
M68KMAKE_OP(cmpm, 32, ., .)
{
- UINT32 src = OPER_AY_PI_32(mc68kcpu);
- UINT32 dst = OPER_AX_PI_32(mc68kcpu);
- UINT32 res = dst - src;
+ uint32_t src = OPER_AY_PI_32(mc68kcpu);
+ uint32_t dst = OPER_AX_PI_32(mc68kcpu);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -4488,13 +4488,13 @@ M68KMAKE_OP(dbt, 16, ., .)
M68KMAKE_OP(dbf, 16, ., .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = MASK_OUT_ABOVE_16(*r_dst - 1);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(*r_dst - 1);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
if(res != 0xffff)
{
- UINT32 offset = OPER_I_16(mc68kcpu);
+ uint32_t offset = OPER_I_16(mc68kcpu);
REG_PC(mc68kcpu) -= 2;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16((mc68kcpu), offset);
@@ -4510,13 +4510,13 @@ M68KMAKE_OP(dbcc, 16, ., .)
{
if(M68KMAKE_NOT_CC)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = MASK_OUT_ABOVE_16(*r_dst - 1);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(*r_dst - 1);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
if(res != 0xffff)
{
- UINT32 offset = OPER_I_16(mc68kcpu);
+ uint32_t offset = OPER_I_16(mc68kcpu);
REG_PC(mc68kcpu) -= 2;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16((mc68kcpu), offset);
@@ -4533,14 +4533,14 @@ M68KMAKE_OP(dbcc, 16, ., .)
M68KMAKE_OP(divs, 16, ., d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- INT32 src = MAKE_INT_16(DY(mc68kcpu));
- INT32 quotient;
- INT32 remainder;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ int32_t src = MAKE_INT_16(DY(mc68kcpu));
+ int32_t quotient;
+ int32_t remainder;
if(src != 0)
{
- if((UINT32)*r_dst == 0x80000000 && src == -1)
+ if((uint32_t)*r_dst == 0x80000000 && src == -1)
{
(mc68kcpu)->not_z_flag = 0;
(mc68kcpu)->n_flag = NFLAG_CLEAR;
@@ -4571,14 +4571,14 @@ M68KMAKE_OP(divs, 16, ., d)
M68KMAKE_OP(divs, 16, ., .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- INT32 src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
- INT32 quotient;
- INT32 remainder;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ int32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+ int32_t quotient;
+ int32_t remainder;
if(src != 0)
{
- if((UINT32)*r_dst == 0x80000000 && src == -1)
+ if((uint32_t)*r_dst == 0x80000000 && src == -1)
{
(mc68kcpu)->not_z_flag = 0;
(mc68kcpu)->n_flag = NFLAG_CLEAR;
@@ -4609,13 +4609,13 @@ M68KMAKE_OP(divs, 16, ., .)
M68KMAKE_OP(divu, 16, ., d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
if(src != 0)
{
- UINT32 quotient = *r_dst / src;
- UINT32 remainder = *r_dst % src;
+ uint32_t quotient = *r_dst / src;
+ uint32_t remainder = *r_dst % src;
if(quotient < 0x10000)
{
@@ -4635,13 +4635,13 @@ M68KMAKE_OP(divu, 16, ., d)
M68KMAKE_OP(divu, 16, ., .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_16;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_16;
if(src != 0)
{
- UINT32 quotient = *r_dst / src;
- UINT32 remainder = *r_dst % src;
+ uint32_t quotient = *r_dst / src;
+ uint32_t remainder = *r_dst % src;
if(quotient < 0x10000)
{
@@ -4663,11 +4663,11 @@ M68KMAKE_OP(divl, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT64 divisor = DY(mc68kcpu);
- UINT64 dividend = 0;
- UINT64 quotient = 0;
- UINT64 remainder = 0;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint64_t divisor = DY(mc68kcpu);
+ uint64_t dividend = 0;
+ uint64_t quotient = 0;
+ uint64_t remainder = 0;
if(divisor != 0)
{
@@ -4679,9 +4679,9 @@ M68KMAKE_OP(divl, 32, ., d)
if(BIT_B(word2)) /* signed */
{
- quotient = (UINT64)((INT64)dividend / (INT64)((INT32)divisor));
- remainder = (UINT64)((INT64)dividend % (INT64)((INT32)divisor));
- if((INT64)quotient != (INT64)((INT32)quotient))
+ quotient = (uint64_t)((int64_t)dividend / (int64_t)((int32_t)divisor));
+ remainder = (uint64_t)((int64_t)dividend % (int64_t)((int32_t)divisor));
+ if((int64_t)quotient != (int64_t)((int32_t)quotient))
{
(mc68kcpu)->v_flag = VFLAG_SET;
return;
@@ -4703,8 +4703,8 @@ M68KMAKE_OP(divl, 32, ., d)
dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7];
if(BIT_B(word2)) /* signed */
{
- quotient = (UINT64)((INT64)((INT32)dividend) / (INT64)((INT32)divisor));
- remainder = (UINT64)((INT64)((INT32)dividend) % (INT64)((INT32)divisor));
+ quotient = (uint64_t)((int64_t)((int32_t)dividend) / (int64_t)((int32_t)divisor));
+ remainder = (uint64_t)((int64_t)((int32_t)dividend) % (int64_t)((int32_t)divisor));
}
else /* unsigned */
{
@@ -4733,11 +4733,11 @@ M68KMAKE_OP(divl, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT64 divisor = M68KMAKE_GET_OPER_AY_32;
- UINT64 dividend = 0;
- UINT64 quotient = 0;
- UINT64 remainder = 0;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint64_t divisor = M68KMAKE_GET_OPER_AY_32;
+ uint64_t dividend = 0;
+ uint64_t quotient = 0;
+ uint64_t remainder = 0;
if(divisor != 0)
{
@@ -4749,9 +4749,9 @@ M68KMAKE_OP(divl, 32, ., .)
if(BIT_B(word2)) /* signed */
{
- quotient = (UINT64)((INT64)dividend / (INT64)((INT32)divisor));
- remainder = (UINT64)((INT64)dividend % (INT64)((INT32)divisor));
- if((INT64)quotient != (INT64)((INT32)quotient))
+ quotient = (uint64_t)((int64_t)dividend / (int64_t)((int32_t)divisor));
+ remainder = (uint64_t)((int64_t)dividend % (int64_t)((int32_t)divisor));
+ if((int64_t)quotient != (int64_t)((int32_t)quotient))
{
(mc68kcpu)->v_flag = VFLAG_SET;
return;
@@ -4773,8 +4773,8 @@ M68KMAKE_OP(divl, 32, ., .)
dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7];
if(BIT_B(word2)) /* signed */
{
- quotient = (UINT64)((INT64)((INT32)dividend) / (INT64)((INT32)divisor));
- remainder = (UINT64)((INT64)((INT32)dividend) % (INT64)((INT32)divisor));
+ quotient = (uint64_t)((int64_t)((int32_t)dividend) / (int64_t)((int32_t)divisor));
+ remainder = (uint64_t)((int64_t)((int32_t)dividend) % (int64_t)((int32_t)divisor));
}
else /* unsigned */
{
@@ -4801,7 +4801,7 @@ M68KMAKE_OP(divl, 32, ., .)
M68KMAKE_OP(eor, 8, ., d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= MASK_OUT_ABOVE_8(DX(mc68kcpu)));
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= MASK_OUT_ABOVE_8(DX(mc68kcpu)));
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -4812,8 +4812,8 @@ M68KMAKE_OP(eor, 8, ., d)
M68KMAKE_OP(eor, 8, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 res = MASK_OUT_ABOVE_8(DX(mc68kcpu) ^ m68ki_read_8((mc68kcpu), ea));
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t res = MASK_OUT_ABOVE_8(DX(mc68kcpu) ^ m68ki_read_8((mc68kcpu), ea));
m68ki_write_8((mc68kcpu), ea, res);
@@ -4826,7 +4826,7 @@ M68KMAKE_OP(eor, 8, ., .)
M68KMAKE_OP(eor, 16, ., d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= MASK_OUT_ABOVE_16(DX(mc68kcpu)));
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= MASK_OUT_ABOVE_16(DX(mc68kcpu)));
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -4837,8 +4837,8 @@ M68KMAKE_OP(eor, 16, ., d)
M68KMAKE_OP(eor, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 res = MASK_OUT_ABOVE_16(DX(mc68kcpu) ^ m68ki_read_16((mc68kcpu), ea));
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t res = MASK_OUT_ABOVE_16(DX(mc68kcpu) ^ m68ki_read_16((mc68kcpu), ea));
m68ki_write_16((mc68kcpu), ea, res);
@@ -4851,7 +4851,7 @@ M68KMAKE_OP(eor, 16, ., .)
M68KMAKE_OP(eor, 32, ., d)
{
- UINT32 res = DY(mc68kcpu) ^= DX(mc68kcpu);
+ uint32_t res = DY(mc68kcpu) ^= DX(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -4862,8 +4862,8 @@ M68KMAKE_OP(eor, 32, ., d)
M68KMAKE_OP(eor, 32, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 res = DX(mc68kcpu) ^ m68ki_read_32((mc68kcpu), ea);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t res = DX(mc68kcpu) ^ m68ki_read_32((mc68kcpu), ea);
m68ki_write_32((mc68kcpu), ea, res);
@@ -4876,7 +4876,7 @@ M68KMAKE_OP(eor, 32, ., .)
M68KMAKE_OP(eori, 8, ., d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= OPER_I_8(mc68kcpu));
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu) ^= OPER_I_8(mc68kcpu));
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -4887,9 +4887,9 @@ M68KMAKE_OP(eori, 8, ., d)
M68KMAKE_OP(eori, 8, ., .)
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 res = src ^ m68ki_read_8((mc68kcpu), ea);
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t res = src ^ m68ki_read_8((mc68kcpu), ea);
m68ki_write_8((mc68kcpu), ea, res);
@@ -4902,7 +4902,7 @@ M68KMAKE_OP(eori, 8, ., .)
M68KMAKE_OP(eori, 16, ., d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= OPER_I_16(mc68kcpu));
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) ^= OPER_I_16(mc68kcpu));
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -4913,9 +4913,9 @@ M68KMAKE_OP(eori, 16, ., d)
M68KMAKE_OP(eori, 16, ., .)
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 res = src ^ m68ki_read_16((mc68kcpu), ea);
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t res = src ^ m68ki_read_16((mc68kcpu), ea);
m68ki_write_16((mc68kcpu), ea, res);
@@ -4928,7 +4928,7 @@ M68KMAKE_OP(eori, 16, ., .)
M68KMAKE_OP(eori, 32, ., d)
{
- UINT32 res = DY(mc68kcpu) ^= OPER_I_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu) ^= OPER_I_32(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -4939,9 +4939,9 @@ M68KMAKE_OP(eori, 32, ., d)
M68KMAKE_OP(eori, 32, ., .)
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 res = src ^ m68ki_read_32((mc68kcpu), ea);
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t res = src ^ m68ki_read_32((mc68kcpu), ea);
m68ki_write_32((mc68kcpu), ea, res);
@@ -4962,7 +4962,7 @@ M68KMAKE_OP(eori, 16, tos, .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 src = OPER_I_16(mc68kcpu);
+ uint32_t src = OPER_I_16(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) ^ src);
return;
@@ -4973,9 +4973,9 @@ M68KMAKE_OP(eori, 16, tos, .)
M68KMAKE_OP(exg, 32, dd, .)
{
- UINT32* reg_a = &DX(mc68kcpu);
- UINT32* reg_b = &DY(mc68kcpu);
- UINT32 tmp = *reg_a;
+ uint32_t* reg_a = &DX(mc68kcpu);
+ uint32_t* reg_b = &DY(mc68kcpu);
+ uint32_t tmp = *reg_a;
*reg_a = *reg_b;
*reg_b = tmp;
}
@@ -4983,9 +4983,9 @@ M68KMAKE_OP(exg, 32, dd, .)
M68KMAKE_OP(exg, 32, aa, .)
{
- UINT32* reg_a = &AX(mc68kcpu);
- UINT32* reg_b = &AY(mc68kcpu);
- UINT32 tmp = *reg_a;
+ uint32_t* reg_a = &AX(mc68kcpu);
+ uint32_t* reg_b = &AY(mc68kcpu);
+ uint32_t tmp = *reg_a;
*reg_a = *reg_b;
*reg_b = tmp;
}
@@ -4993,9 +4993,9 @@ M68KMAKE_OP(exg, 32, aa, .)
M68KMAKE_OP(exg, 32, da, .)
{
- UINT32* reg_a = &DX(mc68kcpu);
- UINT32* reg_b = &AY(mc68kcpu);
- UINT32 tmp = *reg_a;
+ uint32_t* reg_a = &DX(mc68kcpu);
+ uint32_t* reg_b = &AY(mc68kcpu);
+ uint32_t tmp = *reg_a;
*reg_a = *reg_b;
*reg_b = tmp;
}
@@ -5003,7 +5003,7 @@ M68KMAKE_OP(exg, 32, da, .)
M68KMAKE_OP(ext, 16, ., .)
{
- UINT32* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY(mc68kcpu);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0);
@@ -5016,7 +5016,7 @@ M68KMAKE_OP(ext, 16, ., .)
M68KMAKE_OP(ext, 32, ., .)
{
- UINT32* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0);
@@ -5031,7 +5031,7 @@ M68KMAKE_OP(extb, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0);
@@ -5061,7 +5061,7 @@ M68KMAKE_OP(jmp, 32, ., .)
M68KMAKE_OP(jsr, 32, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
m68ki_jump((mc68kcpu), ea);
@@ -5084,7 +5084,7 @@ M68KMAKE_OP(link, 16, ., a7)
M68KMAKE_OP(link, 16, ., .)
{
- UINT32* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY(mc68kcpu);
m68ki_push_32((mc68kcpu), *r_dst);
*r_dst = REG_A(mc68kcpu)[7];
@@ -5109,7 +5109,7 @@ M68KMAKE_OP(link, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY(mc68kcpu);
m68ki_push_32((mc68kcpu), *r_dst);
*r_dst = REG_A(mc68kcpu)[7];
@@ -5122,10 +5122,10 @@ M68KMAKE_OP(link, 32, ., .)
M68KMAKE_OP(lsr, 8, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src >> shift;
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -5141,10 +5141,10 @@ M68KMAKE_OP(lsr, 8, s, .)
M68KMAKE_OP(lsr, 16, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src >> shift;
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -5160,10 +5160,10 @@ M68KMAKE_OP(lsr, 16, s, .)
M68KMAKE_OP(lsr, 32, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = *r_dst;
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = *r_dst;
+ uint32_t res = src >> shift;
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -5179,10 +5179,10 @@ M68KMAKE_OP(lsr, 32, s, .)
M68KMAKE_OP(lsr, 8, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = src >> shift;
if(shift != 0)
{
@@ -5216,10 +5216,10 @@ M68KMAKE_OP(lsr, 8, r, .)
M68KMAKE_OP(lsr, 16, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = src >> shift;
if(shift != 0)
{
@@ -5253,10 +5253,10 @@ M68KMAKE_OP(lsr, 16, r, .)
M68KMAKE_OP(lsr, 32, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = *r_dst;
- UINT32 res = src >> shift;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = *r_dst;
+ uint32_t res = src >> shift;
if(shift != 0)
{
@@ -5289,9 +5289,9 @@ M68KMAKE_OP(lsr, 32, r, .)
M68KMAKE_OP(lsr, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = src >> 1;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = src >> 1;
m68ki_write_16((mc68kcpu), ea, res);
@@ -5304,10 +5304,10 @@ M68KMAKE_OP(lsr, 16, ., .)
M68KMAKE_OP(lsl, 8, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_8(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_8(src << shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -5323,10 +5323,10 @@ M68KMAKE_OP(lsl, 8, s, .)
M68KMAKE_OP(lsl, 16, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_16(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_16(src << shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -5342,10 +5342,10 @@ M68KMAKE_OP(lsl, 16, s, .)
M68KMAKE_OP(lsl, 32, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = *r_dst;
- UINT32 res = MASK_OUT_ABOVE_32(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = *r_dst;
+ uint32_t res = MASK_OUT_ABOVE_32(src << shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -5361,10 +5361,10 @@ M68KMAKE_OP(lsl, 32, s, .)
M68KMAKE_OP(lsl, 8, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_8(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_8(src << shift);
if(shift != 0)
{
@@ -5398,10 +5398,10 @@ M68KMAKE_OP(lsl, 8, r, .)
M68KMAKE_OP(lsl, 16, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_16(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_16(src << shift);
if(shift != 0)
{
@@ -5435,10 +5435,10 @@ M68KMAKE_OP(lsl, 16, r, .)
M68KMAKE_OP(lsl, 32, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = DX(mc68kcpu) & 0x3f;
- UINT32 src = *r_dst;
- UINT32 res = MASK_OUT_ABOVE_32(src << shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = DX(mc68kcpu) & 0x3f;
+ uint32_t src = *r_dst;
+ uint32_t res = MASK_OUT_ABOVE_32(src << shift);
if(shift != 0)
{
@@ -5471,9 +5471,9 @@ M68KMAKE_OP(lsl, 32, r, .)
M68KMAKE_OP(lsl, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = MASK_OUT_ABOVE_16(src << 1);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = MASK_OUT_ABOVE_16(src << 1);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5486,8 +5486,8 @@ M68KMAKE_OP(lsl, 16, ., .)
M68KMAKE_OP(move, 8, d, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
@@ -5500,8 +5500,8 @@ M68KMAKE_OP(move, 8, d, d)
M68KMAKE_OP(move, 8, d, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
@@ -5514,8 +5514,8 @@ M68KMAKE_OP(move, 8, d, .)
M68KMAKE_OP(move, 8, ai, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_AX_AI_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_AX_AI_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5528,8 +5528,8 @@ M68KMAKE_OP(move, 8, ai, d)
M68KMAKE_OP(move, 8, ai, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_AX_AI_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_AX_AI_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5542,8 +5542,8 @@ M68KMAKE_OP(move, 8, ai, .)
M68KMAKE_OP(move, 8, pi7, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_A7_PI_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_A7_PI_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5556,8 +5556,8 @@ M68KMAKE_OP(move, 8, pi7, d)
M68KMAKE_OP(move, 8, pi, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_AX_PI_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_AX_PI_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5570,8 +5570,8 @@ M68KMAKE_OP(move, 8, pi, d)
M68KMAKE_OP(move, 8, pi7, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_A7_PI_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_A7_PI_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5584,8 +5584,8 @@ M68KMAKE_OP(move, 8, pi7, .)
M68KMAKE_OP(move, 8, pi, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_AX_PI_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_AX_PI_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5598,8 +5598,8 @@ M68KMAKE_OP(move, 8, pi, .)
M68KMAKE_OP(move, 8, pd7, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5612,8 +5612,8 @@ M68KMAKE_OP(move, 8, pd7, d)
M68KMAKE_OP(move, 8, pd, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5626,8 +5626,8 @@ M68KMAKE_OP(move, 8, pd, d)
M68KMAKE_OP(move, 8, pd7, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5640,8 +5640,8 @@ M68KMAKE_OP(move, 8, pd7, .)
M68KMAKE_OP(move, 8, pd, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5654,8 +5654,8 @@ M68KMAKE_OP(move, 8, pd, .)
M68KMAKE_OP(move, 8, di, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_AX_DI_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_AX_DI_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5668,8 +5668,8 @@ M68KMAKE_OP(move, 8, di, d)
M68KMAKE_OP(move, 8, di, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_AX_DI_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_AX_DI_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5682,8 +5682,8 @@ M68KMAKE_OP(move, 8, di, .)
M68KMAKE_OP(move, 8, ix, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_AX_IX_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_AX_IX_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5696,8 +5696,8 @@ M68KMAKE_OP(move, 8, ix, d)
M68KMAKE_OP(move, 8, ix, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_AX_IX_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_AX_IX_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5710,8 +5710,8 @@ M68KMAKE_OP(move, 8, ix, .)
M68KMAKE_OP(move, 8, aw, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_AW_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_AW_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5724,8 +5724,8 @@ M68KMAKE_OP(move, 8, aw, d)
M68KMAKE_OP(move, 8, aw, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_AW_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_AW_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5738,8 +5738,8 @@ M68KMAKE_OP(move, 8, aw, .)
M68KMAKE_OP(move, 8, al, d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 ea = EA_AL_8(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t ea = EA_AL_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5752,8 +5752,8 @@ M68KMAKE_OP(move, 8, al, d)
M68KMAKE_OP(move, 8, al, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
- UINT32 ea = EA_AL_8(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t ea = EA_AL_8(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, res);
@@ -5766,8 +5766,8 @@ M68KMAKE_OP(move, 8, al, .)
M68KMAKE_OP(move, 16, d, d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
@@ -5780,8 +5780,8 @@ M68KMAKE_OP(move, 16, d, d)
M68KMAKE_OP(move, 16, d, a)
{
- UINT32 res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
@@ -5794,8 +5794,8 @@ M68KMAKE_OP(move, 16, d, a)
M68KMAKE_OP(move, 16, d, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
@@ -5808,8 +5808,8 @@ M68KMAKE_OP(move, 16, d, .)
M68KMAKE_OP(move, 16, ai, d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 ea = EA_AX_AI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t ea = EA_AX_AI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5822,8 +5822,8 @@ M68KMAKE_OP(move, 16, ai, d)
M68KMAKE_OP(move, 16, ai, a)
{
- UINT32 res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 ea = EA_AX_AI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t ea = EA_AX_AI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5836,8 +5836,8 @@ M68KMAKE_OP(move, 16, ai, a)
M68KMAKE_OP(move, 16, ai, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
- UINT32 ea = EA_AX_AI_16(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t ea = EA_AX_AI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5850,8 +5850,8 @@ M68KMAKE_OP(move, 16, ai, .)
M68KMAKE_OP(move, 16, pi, d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 ea = EA_AX_PI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t ea = EA_AX_PI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5864,8 +5864,8 @@ M68KMAKE_OP(move, 16, pi, d)
M68KMAKE_OP(move, 16, pi, a)
{
- UINT32 res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 ea = EA_AX_PI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t ea = EA_AX_PI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5878,8 +5878,8 @@ M68KMAKE_OP(move, 16, pi, a)
M68KMAKE_OP(move, 16, pi, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
- UINT32 ea = EA_AX_PI_16(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t ea = EA_AX_PI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5892,8 +5892,8 @@ M68KMAKE_OP(move, 16, pi, .)
M68KMAKE_OP(move, 16, pd, d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 ea = EA_AX_PD_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t ea = EA_AX_PD_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5906,8 +5906,8 @@ M68KMAKE_OP(move, 16, pd, d)
M68KMAKE_OP(move, 16, pd, a)
{
- UINT32 res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 ea = EA_AX_PD_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t ea = EA_AX_PD_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5920,8 +5920,8 @@ M68KMAKE_OP(move, 16, pd, a)
M68KMAKE_OP(move, 16, pd, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
- UINT32 ea = EA_AX_PD_16(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t ea = EA_AX_PD_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5934,8 +5934,8 @@ M68KMAKE_OP(move, 16, pd, .)
M68KMAKE_OP(move, 16, di, d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 ea = EA_AX_DI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t ea = EA_AX_DI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5948,8 +5948,8 @@ M68KMAKE_OP(move, 16, di, d)
M68KMAKE_OP(move, 16, di, a)
{
- UINT32 res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 ea = EA_AX_DI_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t ea = EA_AX_DI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5962,8 +5962,8 @@ M68KMAKE_OP(move, 16, di, a)
M68KMAKE_OP(move, 16, di, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
- UINT32 ea = EA_AX_DI_16(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t ea = EA_AX_DI_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5976,8 +5976,8 @@ M68KMAKE_OP(move, 16, di, .)
M68KMAKE_OP(move, 16, ix, d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 ea = EA_AX_IX_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t ea = EA_AX_IX_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -5990,8 +5990,8 @@ M68KMAKE_OP(move, 16, ix, d)
M68KMAKE_OP(move, 16, ix, a)
{
- UINT32 res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 ea = EA_AX_IX_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t ea = EA_AX_IX_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -6004,8 +6004,8 @@ M68KMAKE_OP(move, 16, ix, a)
M68KMAKE_OP(move, 16, ix, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
- UINT32 ea = EA_AX_IX_16(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t ea = EA_AX_IX_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -6018,8 +6018,8 @@ M68KMAKE_OP(move, 16, ix, .)
M68KMAKE_OP(move, 16, aw, d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 ea = EA_AW_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t ea = EA_AW_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -6032,8 +6032,8 @@ M68KMAKE_OP(move, 16, aw, d)
M68KMAKE_OP(move, 16, aw, a)
{
- UINT32 res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 ea = EA_AW_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t ea = EA_AW_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -6046,8 +6046,8 @@ M68KMAKE_OP(move, 16, aw, a)
M68KMAKE_OP(move, 16, aw, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
- UINT32 ea = EA_AW_16(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t ea = EA_AW_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -6060,8 +6060,8 @@ M68KMAKE_OP(move, 16, aw, .)
M68KMAKE_OP(move, 16, al, d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 ea = EA_AL_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t ea = EA_AL_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -6074,8 +6074,8 @@ M68KMAKE_OP(move, 16, al, d)
M68KMAKE_OP(move, 16, al, a)
{
- UINT32 res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 ea = EA_AL_16(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t ea = EA_AL_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -6088,8 +6088,8 @@ M68KMAKE_OP(move, 16, al, a)
M68KMAKE_OP(move, 16, al, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
- UINT32 ea = EA_AL_16(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t ea = EA_AL_16(mc68kcpu);
m68ki_write_16((mc68kcpu), ea, res);
@@ -6102,8 +6102,8 @@ M68KMAKE_OP(move, 16, al, .)
M68KMAKE_OP(move, 32, d, d)
{
- UINT32 res = DY(mc68kcpu);
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = res;
@@ -6116,8 +6116,8 @@ M68KMAKE_OP(move, 32, d, d)
M68KMAKE_OP(move, 32, d, a)
{
- UINT32 res = AY(mc68kcpu);
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = res;
@@ -6130,8 +6130,8 @@ M68KMAKE_OP(move, 32, d, a)
M68KMAKE_OP(move, 32, d, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = res;
@@ -6144,8 +6144,8 @@ M68KMAKE_OP(move, 32, d, .)
M68KMAKE_OP(move, 32, ai, d)
{
- UINT32 res = DY(mc68kcpu);
- UINT32 ea = EA_AX_AI_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
+ uint32_t ea = EA_AX_AI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6158,8 +6158,8 @@ M68KMAKE_OP(move, 32, ai, d)
M68KMAKE_OP(move, 32, ai, a)
{
- UINT32 res = AY(mc68kcpu);
- UINT32 ea = EA_AX_AI_32(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
+ uint32_t ea = EA_AX_AI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6172,8 +6172,8 @@ M68KMAKE_OP(move, 32, ai, a)
M68KMAKE_OP(move, 32, ai, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
- UINT32 ea = EA_AX_AI_32(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t ea = EA_AX_AI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6186,8 +6186,8 @@ M68KMAKE_OP(move, 32, ai, .)
M68KMAKE_OP(move, 32, pi, d)
{
- UINT32 res = DY(mc68kcpu);
- UINT32 ea = EA_AX_PI_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
+ uint32_t ea = EA_AX_PI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6200,8 +6200,8 @@ M68KMAKE_OP(move, 32, pi, d)
M68KMAKE_OP(move, 32, pi, a)
{
- UINT32 res = AY(mc68kcpu);
- UINT32 ea = EA_AX_PI_32(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
+ uint32_t ea = EA_AX_PI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6214,8 +6214,8 @@ M68KMAKE_OP(move, 32, pi, a)
M68KMAKE_OP(move, 32, pi, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
- UINT32 ea = EA_AX_PI_32(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t ea = EA_AX_PI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6228,8 +6228,8 @@ M68KMAKE_OP(move, 32, pi, .)
M68KMAKE_OP(move, 32, pd, d)
{
- UINT32 res = DY(mc68kcpu);
- UINT32 ea = EA_AX_PD_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
+ uint32_t ea = EA_AX_PD_32(mc68kcpu);
m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF );
m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF );
@@ -6243,8 +6243,8 @@ M68KMAKE_OP(move, 32, pd, d)
M68KMAKE_OP(move, 32, pd, a)
{
- UINT32 res = AY(mc68kcpu);
- UINT32 ea = EA_AX_PD_32(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
+ uint32_t ea = EA_AX_PD_32(mc68kcpu);
m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF );
m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF );
@@ -6258,8 +6258,8 @@ M68KMAKE_OP(move, 32, pd, a)
M68KMAKE_OP(move, 32, pd, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
- UINT32 ea = EA_AX_PD_32(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t ea = EA_AX_PD_32(mc68kcpu);
m68ki_write_16((mc68kcpu), ea+2, res & 0xFFFF );
m68ki_write_16((mc68kcpu), ea, (res >> 16) & 0xFFFF );
@@ -6273,8 +6273,8 @@ M68KMAKE_OP(move, 32, pd, .)
M68KMAKE_OP(move, 32, di, d)
{
- UINT32 res = DY(mc68kcpu);
- UINT32 ea = EA_AX_DI_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
+ uint32_t ea = EA_AX_DI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6287,8 +6287,8 @@ M68KMAKE_OP(move, 32, di, d)
M68KMAKE_OP(move, 32, di, a)
{
- UINT32 res = AY(mc68kcpu);
- UINT32 ea = EA_AX_DI_32(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
+ uint32_t ea = EA_AX_DI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6301,8 +6301,8 @@ M68KMAKE_OP(move, 32, di, a)
M68KMAKE_OP(move, 32, di, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
- UINT32 ea = EA_AX_DI_32(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t ea = EA_AX_DI_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6315,8 +6315,8 @@ M68KMAKE_OP(move, 32, di, .)
M68KMAKE_OP(move, 32, ix, d)
{
- UINT32 res = DY(mc68kcpu);
- UINT32 ea = EA_AX_IX_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
+ uint32_t ea = EA_AX_IX_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6329,8 +6329,8 @@ M68KMAKE_OP(move, 32, ix, d)
M68KMAKE_OP(move, 32, ix, a)
{
- UINT32 res = AY(mc68kcpu);
- UINT32 ea = EA_AX_IX_32(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
+ uint32_t ea = EA_AX_IX_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6343,8 +6343,8 @@ M68KMAKE_OP(move, 32, ix, a)
M68KMAKE_OP(move, 32, ix, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
- UINT32 ea = EA_AX_IX_32(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t ea = EA_AX_IX_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6357,8 +6357,8 @@ M68KMAKE_OP(move, 32, ix, .)
M68KMAKE_OP(move, 32, aw, d)
{
- UINT32 res = DY(mc68kcpu);
- UINT32 ea = EA_AW_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
+ uint32_t ea = EA_AW_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6371,8 +6371,8 @@ M68KMAKE_OP(move, 32, aw, d)
M68KMAKE_OP(move, 32, aw, a)
{
- UINT32 res = AY(mc68kcpu);
- UINT32 ea = EA_AW_32(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
+ uint32_t ea = EA_AW_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6385,8 +6385,8 @@ M68KMAKE_OP(move, 32, aw, a)
M68KMAKE_OP(move, 32, aw, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
- UINT32 ea = EA_AW_32(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t ea = EA_AW_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6399,8 +6399,8 @@ M68KMAKE_OP(move, 32, aw, .)
M68KMAKE_OP(move, 32, al, d)
{
- UINT32 res = DY(mc68kcpu);
- UINT32 ea = EA_AL_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
+ uint32_t ea = EA_AL_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6413,8 +6413,8 @@ M68KMAKE_OP(move, 32, al, d)
M68KMAKE_OP(move, 32, al, a)
{
- UINT32 res = AY(mc68kcpu);
- UINT32 ea = EA_AL_32(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
+ uint32_t ea = EA_AL_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6427,8 +6427,8 @@ M68KMAKE_OP(move, 32, al, a)
M68KMAKE_OP(move, 32, al, .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
- UINT32 ea = EA_AL_32(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t ea = EA_AL_32(mc68kcpu);
m68ki_write_32((mc68kcpu), ea, res);
@@ -6524,7 +6524,7 @@ M68KMAKE_OP(move, 16, frs, .)
{
if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
m68ki_write_16((mc68kcpu), ea, m68ki_get_sr(mc68kcpu));
return;
}
@@ -6547,7 +6547,7 @@ M68KMAKE_OP(move, 16, tos, .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 new_sr = M68KMAKE_GET_OPER_AY_16;
+ uint32_t new_sr = M68KMAKE_GET_OPER_AY_16;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_sr((mc68kcpu), new_sr);
return;
@@ -6585,7 +6585,7 @@ M68KMAKE_OP(movec, 32, cr, .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
switch (word2 & 0xfff)
@@ -6799,7 +6799,7 @@ M68KMAKE_OP(movec, 32, rc, .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
+ uint32_t word2 = OPER_I_16(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
switch (word2 & 0xfff)
@@ -7049,10 +7049,10 @@ M68KMAKE_OP(movec, 32, rc, .)
M68KMAKE_OP(movem, 16, re, pd)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = AY(mc68kcpu);
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = AY(mc68kcpu);
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7069,10 +7069,10 @@ M68KMAKE_OP(movem, 16, re, pd)
M68KMAKE_OP(movem, 16, re, .)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7088,10 +7088,10 @@ M68KMAKE_OP(movem, 16, re, .)
M68KMAKE_OP(movem, 32, re, pd)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = AY(mc68kcpu);
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = AY(mc68kcpu);
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7109,10 +7109,10 @@ M68KMAKE_OP(movem, 32, re, pd)
M68KMAKE_OP(movem, 32, re, .)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7128,10 +7128,10 @@ M68KMAKE_OP(movem, 32, re, .)
M68KMAKE_OP(movem, 16, er, pi)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = AY(mc68kcpu);
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = AY(mc68kcpu);
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7148,10 +7148,10 @@ M68KMAKE_OP(movem, 16, er, pi)
M68KMAKE_OP(movem, 16, er, pcdi)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = EA_PCDI_16(mc68kcpu);
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = EA_PCDI_16(mc68kcpu);
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7167,10 +7167,10 @@ M68KMAKE_OP(movem, 16, er, pcdi)
M68KMAKE_OP(movem, 16, er, pcix)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = EA_PCIX_16(mc68kcpu);
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = EA_PCIX_16(mc68kcpu);
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7186,10 +7186,10 @@ M68KMAKE_OP(movem, 16, er, pcix)
M68KMAKE_OP(movem, 16, er, .)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7205,10 +7205,10 @@ M68KMAKE_OP(movem, 16, er, .)
M68KMAKE_OP(movem, 32, er, pi)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = AY(mc68kcpu);
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = AY(mc68kcpu);
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7225,10 +7225,10 @@ M68KMAKE_OP(movem, 32, er, pi)
M68KMAKE_OP(movem, 32, er, pcdi)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = EA_PCDI_32(mc68kcpu);
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = EA_PCDI_32(mc68kcpu);
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7244,10 +7244,10 @@ M68KMAKE_OP(movem, 32, er, pcdi)
M68KMAKE_OP(movem, 32, er, pcix)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = EA_PCIX_32(mc68kcpu);
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = EA_PCIX_32(mc68kcpu);
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7263,10 +7263,10 @@ M68KMAKE_OP(movem, 32, er, pcix)
M68KMAKE_OP(movem, 32, er, .)
{
- UINT32 i = 0;
- UINT32 register_list = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 count = 0;
+ uint32_t i = 0;
+ uint32_t register_list = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t count = 0;
for(; i < 16; i++)
if(register_list & (1 << i))
@@ -7282,8 +7282,8 @@ M68KMAKE_OP(movem, 32, er, .)
M68KMAKE_OP(movep, 16, re, .)
{
- UINT32 ea = EA_AY_DI_16(mc68kcpu);
- UINT32 src = DX(mc68kcpu);
+ uint32_t ea = EA_AY_DI_16(mc68kcpu);
+ uint32_t src = DX(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(src >> 8));
m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src));
@@ -7292,8 +7292,8 @@ M68KMAKE_OP(movep, 16, re, .)
M68KMAKE_OP(movep, 32, re, .)
{
- UINT32 ea = EA_AY_DI_32(mc68kcpu);
- UINT32 src = DX(mc68kcpu);
+ uint32_t ea = EA_AY_DI_32(mc68kcpu);
+ uint32_t src = DX(mc68kcpu);
m68ki_write_8((mc68kcpu), ea, MASK_OUT_ABOVE_8(src >> 24));
m68ki_write_8((mc68kcpu), ea += 2, MASK_OUT_ABOVE_8(src >> 16));
@@ -7304,8 +7304,8 @@ M68KMAKE_OP(movep, 32, re, .)
M68KMAKE_OP(movep, 16, er, .)
{
- UINT32 ea = EA_AY_DI_16(mc68kcpu);
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t ea = EA_AY_DI_16(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8((mc68kcpu), ea) << 8) + m68ki_read_8((mc68kcpu), ea + 2));
}
@@ -7313,7 +7313,7 @@ M68KMAKE_OP(movep, 16, er, .)
M68KMAKE_OP(movep, 32, er, .)
{
- UINT32 ea = EA_AY_DI_32(mc68kcpu);
+ uint32_t ea = EA_AY_DI_32(mc68kcpu);
DX(mc68kcpu) = (m68ki_read_8((mc68kcpu), ea) << 24) + (m68ki_read_8((mc68kcpu), ea + 2) << 16)
+ (m68ki_read_8((mc68kcpu), ea + 4) << 8) + m68ki_read_8((mc68kcpu), ea + 6);
@@ -7326,8 +7326,8 @@ M68KMAKE_OP(moves, 8, ., .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
if(BIT_B(word2)) /* Register to memory */
@@ -7361,8 +7361,8 @@ M68KMAKE_OP(moves, 16, ., .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
if(BIT_B(word2)) /* Register to memory */
@@ -7396,8 +7396,8 @@ M68KMAKE_OP(moves, 32, ., .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
if(BIT_B(word2)) /* Register to memory */
@@ -7422,7 +7422,7 @@ M68KMAKE_OP(moves, 32, ., .)
M68KMAKE_OP(moveq, 32, ., .)
{
- UINT32 res = DX(mc68kcpu) = MAKE_INT_8(MASK_OUT_ABOVE_8((mc68kcpu)->ir));
+ uint32_t res = DX(mc68kcpu) = MAKE_INT_8(MASK_OUT_ABOVE_8((mc68kcpu)->ir));
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -7433,7 +7433,7 @@ M68KMAKE_OP(moveq, 32, ., .)
M68KMAKE_OP(move16, 32, ., .)
{
- UINT16 w2 = OPER_I_16(mc68kcpu);
+ uint16_t w2 = OPER_I_16(mc68kcpu);
int ax = (mc68kcpu)->ir & 7;
int ay = (w2 >> 12) & 7;
m68ki_write_32((mc68kcpu), REG_A(mc68kcpu)[ay], m68ki_read_32((mc68kcpu), REG_A(mc68kcpu)[ax]));
@@ -7448,8 +7448,8 @@ M68KMAKE_OP(move16, 32, ., .)
M68KMAKE_OP(muls, 16, ., d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY(mc68kcpu)) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY(mc68kcpu)) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
*r_dst = res;
@@ -7462,8 +7462,8 @@ M68KMAKE_OP(muls, 16, ., d)
M68KMAKE_OP(muls, 16, ., .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 res = MASK_OUT_ABOVE_32(MAKE_INT_16(M68KMAKE_GET_OPER_AY_16) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_32(MAKE_INT_16(M68KMAKE_GET_OPER_AY_16) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
*r_dst = res;
@@ -7476,8 +7476,8 @@ M68KMAKE_OP(muls, 16, ., .)
M68KMAKE_OP(mulu, 16, ., d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu)) * MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu)) * MASK_OUT_ABOVE_16(*r_dst);
*r_dst = res;
@@ -7490,8 +7490,8 @@ M68KMAKE_OP(mulu, 16, ., d)
M68KMAKE_OP(mulu, 16, ., .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 res = M68KMAKE_GET_OPER_AY_16 * MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t res = M68KMAKE_GET_OPER_AY_16 * MASK_OUT_ABOVE_16(*r_dst);
*r_dst = res;
@@ -7506,21 +7506,21 @@ M68KMAKE_OP(mull, 32, ., d)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT64 src = DY(mc68kcpu);
- UINT64 dst = REG_D(mc68kcpu)[(word2 >> 12) & 7];
- UINT64 res;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint64_t src = DY(mc68kcpu);
+ uint64_t dst = REG_D(mc68kcpu)[(word2 >> 12) & 7];
+ uint64_t res;
(mc68kcpu)->c_flag = CFLAG_CLEAR;
if(BIT_B(word2)) /* signed */
{
- res = (INT64)((INT32)src) * (INT64)((INT32)dst);
+ res = (int64_t)((int32_t)src) * (int64_t)((int32_t)dst);
if(!BIT_A(word2))
{
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
(mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = ((INT64)res != (INT32)res)<<7;
+ (mc68kcpu)->v_flag = ((int64_t)res != (int32_t)res)<<7;
REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag;
return;
}
@@ -7556,21 +7556,21 @@ M68KMAKE_OP(mull, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 word2 = OPER_I_16(mc68kcpu);
- UINT64 src = M68KMAKE_GET_OPER_AY_32;
- UINT64 dst = REG_D(mc68kcpu)[(word2 >> 12) & 7];
- UINT64 res;
+ uint32_t word2 = OPER_I_16(mc68kcpu);
+ uint64_t src = M68KMAKE_GET_OPER_AY_32;
+ uint64_t dst = REG_D(mc68kcpu)[(word2 >> 12) & 7];
+ uint64_t res;
(mc68kcpu)->c_flag = CFLAG_CLEAR;
if(BIT_B(word2)) /* signed */
{
- res = (INT64)((INT32)src) * (INT64)((INT32)dst);
+ res = (int64_t)((int32_t)src) * (int64_t)((int32_t)dst);
if(!BIT_A(word2))
{
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
(mc68kcpu)->n_flag = NFLAG_32(res);
- (mc68kcpu)->v_flag = ((INT64)res != (INT32)res)<<7;
+ (mc68kcpu)->v_flag = ((int64_t)res != (int32_t)res)<<7;
REG_D(mc68kcpu)[(word2 >> 12) & 7] = (mc68kcpu)->not_z_flag;
return;
}
@@ -7604,9 +7604,9 @@ M68KMAKE_OP(mull, 32, ., .)
M68KMAKE_OP(nbcd, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1(mc68kcpu));
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1(mc68kcpu));
if(res != 0x9a)
{
@@ -7637,9 +7637,9 @@ M68KMAKE_OP(nbcd, 8, ., d)
M68KMAKE_OP(nbcd, 8, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1(mc68kcpu));
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1(mc68kcpu));
if(res != 0x9a)
{
@@ -7670,8 +7670,8 @@ M68KMAKE_OP(nbcd, 8, ., .)
M68KMAKE_OP(neg, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = 0 - MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = 0 - MASK_OUT_ABOVE_8(*r_dst);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_8(res);
@@ -7684,9 +7684,9 @@ M68KMAKE_OP(neg, 8, ., d)
M68KMAKE_OP(neg, 8, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = 0 - src;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = 0 - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_8(res);
@@ -7699,8 +7699,8 @@ M68KMAKE_OP(neg, 8, ., .)
M68KMAKE_OP(neg, 16, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = 0 - MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = 0 - MASK_OUT_ABOVE_16(*r_dst);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_16(res);
@@ -7713,9 +7713,9 @@ M68KMAKE_OP(neg, 16, ., d)
M68KMAKE_OP(neg, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = 0 - src;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = 0 - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_16(res);
@@ -7728,8 +7728,8 @@ M68KMAKE_OP(neg, 16, ., .)
M68KMAKE_OP(neg, 32, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = 0 - *r_dst;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = 0 - *r_dst;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_SUB_32(*r_dst, 0, res);
@@ -7742,9 +7742,9 @@ M68KMAKE_OP(neg, 32, ., d)
M68KMAKE_OP(neg, 32, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 src = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = 0 - src;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t src = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = 0 - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->c_flag = (mc68kcpu)->x_flag = CFLAG_SUB_32(src, 0, res);
@@ -7757,8 +7757,8 @@ M68KMAKE_OP(neg, 32, ., .)
M68KMAKE_OP(negx, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -7773,9 +7773,9 @@ M68KMAKE_OP(negx, 8, ., d)
M68KMAKE_OP(negx, 8, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = 0 - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = 0 - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -7790,8 +7790,8 @@ M68KMAKE_OP(negx, 8, ., .)
M68KMAKE_OP(negx, 16, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
@@ -7806,9 +7806,9 @@ M68KMAKE_OP(negx, 16, ., d)
M68KMAKE_OP(negx, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
@@ -7823,8 +7823,8 @@ M68KMAKE_OP(negx, 16, ., .)
M68KMAKE_OP(negx, 32, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(*r_dst, 0, res);
@@ -7839,9 +7839,9 @@ M68KMAKE_OP(negx, 32, ., d)
M68KMAKE_OP(negx, 32, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 src = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t src = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, 0, res);
@@ -7862,8 +7862,8 @@ M68KMAKE_OP(nop, 0, ., .)
M68KMAKE_OP(not, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = MASK_OUT_ABOVE_8(~*r_dst);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_8(~*r_dst);
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
@@ -7876,8 +7876,8 @@ M68KMAKE_OP(not, 8, ., d)
M68KMAKE_OP(not, 8, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 res = MASK_OUT_ABOVE_8(~m68ki_read_8((mc68kcpu), ea));
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t res = MASK_OUT_ABOVE_8(~m68ki_read_8((mc68kcpu), ea));
m68ki_write_8((mc68kcpu), ea, res);
@@ -7890,8 +7890,8 @@ M68KMAKE_OP(not, 8, ., .)
M68KMAKE_OP(not, 16, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = MASK_OUT_ABOVE_16(~*r_dst);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = MASK_OUT_ABOVE_16(~*r_dst);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
@@ -7904,8 +7904,8 @@ M68KMAKE_OP(not, 16, ., d)
M68KMAKE_OP(not, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 res = MASK_OUT_ABOVE_16(~m68ki_read_16((mc68kcpu), ea));
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t res = MASK_OUT_ABOVE_16(~m68ki_read_16((mc68kcpu), ea));
m68ki_write_16((mc68kcpu), ea, res);
@@ -7918,8 +7918,8 @@ M68KMAKE_OP(not, 16, ., .)
M68KMAKE_OP(not, 32, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -7930,8 +7930,8 @@ M68KMAKE_OP(not, 32, ., d)
M68KMAKE_OP(not, 32, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 res = MASK_OUT_ABOVE_32(~m68ki_read_32((mc68kcpu), ea));
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t res = MASK_OUT_ABOVE_32(~m68ki_read_32((mc68kcpu), ea));
m68ki_write_32((mc68kcpu), ea, res);
@@ -7944,7 +7944,7 @@ M68KMAKE_OP(not, 32, ., .)
M68KMAKE_OP(or, 8, er, d)
{
- UINT32 res = MASK_OUT_ABOVE_8((DX(mc68kcpu) |= MASK_OUT_ABOVE_8(DY(mc68kcpu))));
+ uint32_t res = MASK_OUT_ABOVE_8((DX(mc68kcpu) |= MASK_OUT_ABOVE_8(DY(mc68kcpu))));
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -7955,7 +7955,7 @@ M68KMAKE_OP(or, 8, er, d)
M68KMAKE_OP(or, 8, er, .)
{
- UINT32 res = MASK_OUT_ABOVE_8((DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_8));
+ uint32_t res = MASK_OUT_ABOVE_8((DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_8));
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -7966,7 +7966,7 @@ M68KMAKE_OP(or, 8, er, .)
M68KMAKE_OP(or, 16, er, d)
{
- UINT32 res = MASK_OUT_ABOVE_16((DX(mc68kcpu) |= MASK_OUT_ABOVE_16(DY(mc68kcpu))));
+ uint32_t res = MASK_OUT_ABOVE_16((DX(mc68kcpu) |= MASK_OUT_ABOVE_16(DY(mc68kcpu))));
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -7977,7 +7977,7 @@ M68KMAKE_OP(or, 16, er, d)
M68KMAKE_OP(or, 16, er, .)
{
- UINT32 res = MASK_OUT_ABOVE_16((DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_16));
+ uint32_t res = MASK_OUT_ABOVE_16((DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_16));
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -7988,7 +7988,7 @@ M68KMAKE_OP(or, 16, er, .)
M68KMAKE_OP(or, 32, er, d)
{
- UINT32 res = DX(mc68kcpu) |= DY(mc68kcpu);
+ uint32_t res = DX(mc68kcpu) |= DY(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -7999,7 +7999,7 @@ M68KMAKE_OP(or, 32, er, d)
M68KMAKE_OP(or, 32, er, .)
{
- UINT32 res = DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_32;
+ uint32_t res = DX(mc68kcpu) |= M68KMAKE_GET_OPER_AY_32;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -8010,8 +8010,8 @@ M68KMAKE_OP(or, 32, er, .)
M68KMAKE_OP(or, 8, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 res = MASK_OUT_ABOVE_8(DX(mc68kcpu) | m68ki_read_8((mc68kcpu), ea));
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t res = MASK_OUT_ABOVE_8(DX(mc68kcpu) | m68ki_read_8((mc68kcpu), ea));
m68ki_write_8((mc68kcpu), ea, res);
@@ -8024,8 +8024,8 @@ M68KMAKE_OP(or, 8, re, .)
M68KMAKE_OP(or, 16, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 res = MASK_OUT_ABOVE_16(DX(mc68kcpu) | m68ki_read_16((mc68kcpu), ea));
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t res = MASK_OUT_ABOVE_16(DX(mc68kcpu) | m68ki_read_16((mc68kcpu), ea));
m68ki_write_16((mc68kcpu), ea, res);
@@ -8038,8 +8038,8 @@ M68KMAKE_OP(or, 16, re, .)
M68KMAKE_OP(or, 32, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 res = DX(mc68kcpu) | m68ki_read_32((mc68kcpu), ea);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t res = DX(mc68kcpu) | m68ki_read_32((mc68kcpu), ea);
m68ki_write_32((mc68kcpu), ea, res);
@@ -8052,7 +8052,7 @@ M68KMAKE_OP(or, 32, re, .)
M68KMAKE_OP(ori, 8, ., d)
{
- UINT32 res = MASK_OUT_ABOVE_8((DY(mc68kcpu) |= OPER_I_8(mc68kcpu)));
+ uint32_t res = MASK_OUT_ABOVE_8((DY(mc68kcpu) |= OPER_I_8(mc68kcpu)));
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -8063,9 +8063,9 @@ M68KMAKE_OP(ori, 8, ., d)
M68KMAKE_OP(ori, 8, ., .)
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 res = MASK_OUT_ABOVE_8(src | m68ki_read_8((mc68kcpu), ea));
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t res = MASK_OUT_ABOVE_8(src | m68ki_read_8((mc68kcpu), ea));
m68ki_write_8((mc68kcpu), ea, res);
@@ -8078,7 +8078,7 @@ M68KMAKE_OP(ori, 8, ., .)
M68KMAKE_OP(ori, 16, ., d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu) |= OPER_I_16(mc68kcpu));
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu) |= OPER_I_16(mc68kcpu));
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -8089,9 +8089,9 @@ M68KMAKE_OP(ori, 16, ., d)
M68KMAKE_OP(ori, 16, ., .)
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 res = MASK_OUT_ABOVE_16(src | m68ki_read_16((mc68kcpu), ea));
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t res = MASK_OUT_ABOVE_16(src | m68ki_read_16((mc68kcpu), ea));
m68ki_write_16((mc68kcpu), ea, res);
@@ -8104,7 +8104,7 @@ M68KMAKE_OP(ori, 16, ., .)
M68KMAKE_OP(ori, 32, ., d)
{
- UINT32 res = DY(mc68kcpu) |= OPER_I_32(mc68kcpu);
+ uint32_t res = DY(mc68kcpu) |= OPER_I_32(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -8115,9 +8115,9 @@ M68KMAKE_OP(ori, 32, ., d)
M68KMAKE_OP(ori, 32, ., .)
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 res = src | m68ki_read_32((mc68kcpu), ea);
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t res = src | m68ki_read_32((mc68kcpu), ea);
m68ki_write_32((mc68kcpu), ea, res);
@@ -8138,7 +8138,7 @@ M68KMAKE_OP(ori, 16, tos, .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 src = OPER_I_16(mc68kcpu);
+ uint32_t src = OPER_I_16(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) | src);
return;
@@ -8152,8 +8152,8 @@ M68KMAKE_OP(pack, 16, rr, .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* Note: DX(mc68kcpu) and DY(mc68kcpu) are reversed in Motorola's docs */
- UINT32 src = DY(mc68kcpu) + OPER_I_16(mc68kcpu);
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t src = DY(mc68kcpu) + OPER_I_16(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f);
return;
@@ -8167,8 +8167,8 @@ M68KMAKE_OP(pack, 16, mm, ax7)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* Note: AX and AY are reversed in Motorola's docs */
- UINT32 ea_src = EA_AY_PD_8(mc68kcpu);
- UINT32 src = m68ki_read_8((mc68kcpu), ea_src);
+ uint32_t ea_src = EA_AY_PD_8(mc68kcpu);
+ uint32_t src = m68ki_read_8((mc68kcpu), ea_src);
ea_src = EA_AY_PD_8(mc68kcpu);
src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu);
@@ -8184,8 +8184,8 @@ M68KMAKE_OP(pack, 16, mm, ay7)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* Note: AX and AY are reversed in Motorola's docs */
- UINT32 ea_src = EA_A7_PD_8(mc68kcpu);
- UINT32 src = m68ki_read_8((mc68kcpu), ea_src);
+ uint32_t ea_src = EA_A7_PD_8(mc68kcpu);
+ uint32_t src = m68ki_read_8((mc68kcpu), ea_src);
ea_src = EA_A7_PD_8(mc68kcpu);
src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu);
@@ -8200,8 +8200,8 @@ M68KMAKE_OP(pack, 16, mm, axy7)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 ea_src = EA_A7_PD_8(mc68kcpu);
- UINT32 src = m68ki_read_8((mc68kcpu), ea_src);
+ uint32_t ea_src = EA_A7_PD_8(mc68kcpu);
+ uint32_t src = m68ki_read_8((mc68kcpu), ea_src);
ea_src = EA_A7_PD_8(mc68kcpu);
src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu);
@@ -8217,8 +8217,8 @@ M68KMAKE_OP(pack, 16, mm, .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* Note: AX and AY are reversed in Motorola's docs */
- UINT32 ea_src = EA_AY_PD_8(mc68kcpu);
- UINT32 src = m68ki_read_8((mc68kcpu), ea_src);
+ uint32_t ea_src = EA_AY_PD_8(mc68kcpu);
+ uint32_t src = m68ki_read_8((mc68kcpu), ea_src);
ea_src = EA_AY_PD_8(mc68kcpu);
src = ((src << 8) | m68ki_read_8((mc68kcpu), ea_src)) + OPER_I_16(mc68kcpu);
@@ -8231,7 +8231,7 @@ M68KMAKE_OP(pack, 16, mm, .)
M68KMAKE_OP(pea, 32, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
m68ki_push_32((mc68kcpu), ea);
}
@@ -8296,11 +8296,11 @@ M68KMAKE_OP(reset, 0, ., .)
M68KMAKE_OP(ror, 8, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 shift = orig_shift & 7;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = ROR_8(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t shift = orig_shift & 7;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = ROR_8(src, shift);
if(orig_shift != 0)
(mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift;
@@ -8316,10 +8316,10 @@ M68KMAKE_OP(ror, 8, s, .)
M68KMAKE_OP(ror, 16, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = ROR_16(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = ROR_16(src, shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8335,10 +8335,10 @@ M68KMAKE_OP(ror, 16, s, .)
M68KMAKE_OP(ror, 32, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT64 src = *r_dst;
- UINT32 res = ROR_32(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint64_t src = *r_dst;
+ uint32_t res = ROR_32(src, shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8354,11 +8354,11 @@ M68KMAKE_OP(ror, 32, s, .)
M68KMAKE_OP(ror, 8, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
- UINT32 shift = orig_shift & 7;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = ROR_8(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t shift = orig_shift & 7;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = ROR_8(src, shift);
if(orig_shift != 0)
{
@@ -8381,11 +8381,11 @@ M68KMAKE_OP(ror, 8, r, .)
M68KMAKE_OP(ror, 16, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
- UINT32 shift = orig_shift & 15;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = ROR_16(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t shift = orig_shift & 15;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = ROR_16(src, shift);
if(orig_shift != 0)
{
@@ -8408,11 +8408,11 @@ M68KMAKE_OP(ror, 16, r, .)
M68KMAKE_OP(ror, 32, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
- UINT32 shift = orig_shift & 31;
- UINT64 src = *r_dst;
- UINT32 res = ROR_32(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t shift = orig_shift & 31;
+ uint64_t src = *r_dst;
+ uint32_t res = ROR_32(src, shift);
if(orig_shift != 0)
{
@@ -8435,9 +8435,9 @@ M68KMAKE_OP(ror, 32, r, .)
M68KMAKE_OP(ror, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = ROR_16(src, 1);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = ROR_16(src, 1);
m68ki_write_16((mc68kcpu), ea, res);
@@ -8450,11 +8450,11 @@ M68KMAKE_OP(ror, 16, ., .)
M68KMAKE_OP(rol, 8, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 shift = orig_shift & 7;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = ROL_8(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t shift = orig_shift & 7;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = ROL_8(src, shift);
if(orig_shift != 0)
(mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift;
@@ -8470,10 +8470,10 @@ M68KMAKE_OP(rol, 8, s, .)
M68KMAKE_OP(rol, 16, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = ROL_16(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = ROL_16(src, shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8489,10 +8489,10 @@ M68KMAKE_OP(rol, 16, s, .)
M68KMAKE_OP(rol, 32, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT64 src = *r_dst;
- UINT32 res = ROL_32(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint64_t src = *r_dst;
+ uint32_t res = ROL_32(src, shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8508,11 +8508,11 @@ M68KMAKE_OP(rol, 32, s, .)
M68KMAKE_OP(rol, 8, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
- UINT32 shift = orig_shift & 7;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = ROL_8(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t shift = orig_shift & 7;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = ROL_8(src, shift);
if(orig_shift != 0)
{
@@ -8543,11 +8543,11 @@ M68KMAKE_OP(rol, 8, r, .)
M68KMAKE_OP(rol, 16, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
- UINT32 shift = orig_shift & 15;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = MASK_OUT_ABOVE_16(ROL_16(src, shift));
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t shift = orig_shift & 15;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = MASK_OUT_ABOVE_16(ROL_16(src, shift));
if(orig_shift != 0)
{
@@ -8578,11 +8578,11 @@ M68KMAKE_OP(rol, 16, r, .)
M68KMAKE_OP(rol, 32, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
- UINT32 shift = orig_shift & 31;
- UINT64 src = *r_dst;
- UINT32 res = ROL_32(src, shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t shift = orig_shift & 31;
+ uint64_t src = *r_dst;
+ uint32_t res = ROL_32(src, shift);
if(orig_shift != 0)
{
@@ -8606,9 +8606,9 @@ M68KMAKE_OP(rol, 32, r, .)
M68KMAKE_OP(rol, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
m68ki_write_16((mc68kcpu), ea, res);
@@ -8621,10 +8621,10 @@ M68KMAKE_OP(rol, 16, ., .)
M68KMAKE_OP(roxr, 8, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = ROR_9(src | (XFLAG_AS_1(mc68kcpu) << 8), shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = ROR_9(src | (XFLAG_AS_1(mc68kcpu) << 8), shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8642,10 +8642,10 @@ M68KMAKE_OP(roxr, 8, s, .)
M68KMAKE_OP(roxr, 16, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = ROR_17(src | (XFLAG_AS_1(mc68kcpu) << 16), shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = ROR_17(src | (XFLAG_AS_1(mc68kcpu) << 16), shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8663,10 +8663,10 @@ M68KMAKE_OP(roxr, 16, s, .)
M68KMAKE_OP(roxr, 32, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT64 src = *r_dst;
- UINT64 res = src | (((UINT64)XFLAG_AS_1(mc68kcpu)) << 32);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint64_t src = *r_dst;
+ uint64_t res = src | (((uint64_t)XFLAG_AS_1(mc68kcpu)) << 32);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8686,14 +8686,14 @@ M68KMAKE_OP(roxr, 32, s, .)
M68KMAKE_OP(roxr, 8, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
if(orig_shift != 0)
{
- UINT32 shift = orig_shift % 9;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = ROR_9(src | (XFLAG_AS_1(mc68kcpu) << 8), shift);
+ uint32_t shift = orig_shift % 9;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = ROR_9(src | (XFLAG_AS_1(mc68kcpu) << 8), shift);
(mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift;
@@ -8716,14 +8716,14 @@ M68KMAKE_OP(roxr, 8, r, .)
M68KMAKE_OP(roxr, 16, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
if(orig_shift != 0)
{
- UINT32 shift = orig_shift % 17;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = ROR_17(src | (XFLAG_AS_1(mc68kcpu) << 16), shift);
+ uint32_t shift = orig_shift % 17;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = ROR_17(src | (XFLAG_AS_1(mc68kcpu) << 16), shift);
(mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift;
@@ -8746,14 +8746,14 @@ M68KMAKE_OP(roxr, 16, r, .)
M68KMAKE_OP(roxr, 32, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
if(orig_shift != 0)
{
- UINT32 shift = orig_shift % 33;
- UINT64 src = *r_dst;
- UINT64 res = src | (((UINT64)XFLAG_AS_1(mc68kcpu)) << 32);
+ uint32_t shift = orig_shift % 33;
+ uint64_t src = *r_dst;
+ uint64_t res = src | (((uint64_t)XFLAG_AS_1(mc68kcpu)) << 32);
res = ROR_33_64(res, shift);
@@ -8778,9 +8778,9 @@ M68KMAKE_OP(roxr, 32, r, .)
M68KMAKE_OP(roxr, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = ROR_17(src | (XFLAG_AS_1(mc68kcpu) << 16), 1);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = ROR_17(src | (XFLAG_AS_1(mc68kcpu) << 16), 1);
(mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8;
res = MASK_OUT_ABOVE_16(res);
@@ -8795,10 +8795,10 @@ M68KMAKE_OP(roxr, 16, ., .)
M68KMAKE_OP(roxl, 8, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = ROL_9(src | (XFLAG_AS_1(mc68kcpu) << 8), shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = ROL_9(src | (XFLAG_AS_1(mc68kcpu) << 8), shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8816,10 +8816,10 @@ M68KMAKE_OP(roxl, 8, s, .)
M68KMAKE_OP(roxl, 16, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = ROL_17(src | (XFLAG_AS_1(mc68kcpu) << 16), shift);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = ROL_17(src | (XFLAG_AS_1(mc68kcpu) << 16), shift);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8837,10 +8837,10 @@ M68KMAKE_OP(roxl, 16, s, .)
M68KMAKE_OP(roxl, 32, s, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT64 src = *r_dst;
- UINT64 res = src | (((UINT64)XFLAG_AS_1(mc68kcpu)) << 32);
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t shift = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint64_t src = *r_dst;
+ uint64_t res = src | (((uint64_t)XFLAG_AS_1(mc68kcpu)) << 32);
if(shift != 0)
(mc68kcpu)->remaining_cycles -= shift<<(mc68kcpu)->cyc_shift;
@@ -8860,15 +8860,15 @@ M68KMAKE_OP(roxl, 32, s, .)
M68KMAKE_OP(roxl, 8, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
if(orig_shift != 0)
{
- UINT32 shift = orig_shift % 9;
- UINT32 src = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = ROL_9(src | (XFLAG_AS_1(mc68kcpu) << 8), shift);
+ uint32_t shift = orig_shift % 9;
+ uint32_t src = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = ROL_9(src | (XFLAG_AS_1(mc68kcpu) << 8), shift);
(mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift;
@@ -8891,14 +8891,14 @@ M68KMAKE_OP(roxl, 8, r, .)
M68KMAKE_OP(roxl, 16, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
if(orig_shift != 0)
{
- UINT32 shift = orig_shift % 17;
- UINT32 src = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = ROL_17(src | (XFLAG_AS_1(mc68kcpu) << 16), shift);
+ uint32_t shift = orig_shift % 17;
+ uint32_t src = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = ROL_17(src | (XFLAG_AS_1(mc68kcpu) << 16), shift);
(mc68kcpu)->remaining_cycles -= orig_shift<<(mc68kcpu)->cyc_shift;
@@ -8921,14 +8921,14 @@ M68KMAKE_OP(roxl, 16, r, .)
M68KMAKE_OP(roxl, 32, r, .)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 orig_shift = DX(mc68kcpu) & 0x3f;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t orig_shift = DX(mc68kcpu) & 0x3f;
if(orig_shift != 0)
{
- UINT32 shift = orig_shift % 33;
- UINT64 src = *r_dst;
- UINT64 res = src | (((UINT64)XFLAG_AS_1(mc68kcpu)) << 32);
+ uint32_t shift = orig_shift % 33;
+ uint64_t src = *r_dst;
+ uint64_t res = src | (((uint64_t)XFLAG_AS_1(mc68kcpu)) << 32);
res = ROL_33_64(res, shift);
@@ -8953,9 +8953,9 @@ M68KMAKE_OP(roxl, 32, r, .)
M68KMAKE_OP(roxl, 16, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = ROL_17(src | (XFLAG_AS_1(mc68kcpu) << 16), 1);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = ROL_17(src | (XFLAG_AS_1(mc68kcpu) << 16), 1);
(mc68kcpu)->c_flag = (mc68kcpu)->x_flag = res >> 8;
res = MASK_OUT_ABOVE_16(res);
@@ -8972,7 +8972,7 @@ M68KMAKE_OP(rtd, 32, ., .)
{
if(CPU_TYPE_IS_010_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 new_pc = m68ki_pull_32(mc68kcpu);
+ uint32_t new_pc = m68ki_pull_32(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu)));
@@ -8987,9 +8987,9 @@ M68KMAKE_OP(rte, 32, ., .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 new_sr;
- UINT32 new_pc;
- UINT32 format_word;
+ uint32_t new_sr;
+ uint32_t new_pc;
+ uint32_t format_word;
if (!(mc68kcpu)->rte_instr_callback.isnull())
((mc68kcpu)->rte_instr_callback)(1);
@@ -9177,10 +9177,10 @@ M68KMAKE_OP(rts, 32, ., .)
M68KMAKE_OP(sbcd, 8, rr, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = DY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = DY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to assume cleared. */
@@ -9209,10 +9209,10 @@ M68KMAKE_OP(sbcd, 8, rr, .)
M68KMAKE_OP(sbcd, 8, mm, ax7)
{
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
@@ -9241,10 +9241,10 @@ M68KMAKE_OP(sbcd, 8, mm, ax7)
M68KMAKE_OP(sbcd, 8, mm, ay7)
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
@@ -9273,10 +9273,10 @@ M68KMAKE_OP(sbcd, 8, mm, ay7)
M68KMAKE_OP(sbcd, 8, mm, axy7)
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
@@ -9305,10 +9305,10 @@ M68KMAKE_OP(sbcd, 8, mm, axy7)
M68KMAKE_OP(sbcd, 8, mm, .)
{
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
(mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
@@ -9381,7 +9381,7 @@ M68KMAKE_OP(stop, 0, ., .)
{
if((mc68kcpu)->s_flag)
{
- UINT32 new_sr = OPER_I_16(mc68kcpu);
+ uint32_t new_sr = OPER_I_16(mc68kcpu);
m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->stopped |= STOP_LEVEL_STOP;
m68ki_set_sr((mc68kcpu), new_sr);
@@ -9394,10 +9394,10 @@ M68KMAKE_OP(stop, 0, ., .)
M68KMAKE_OP(sub, 8, er, d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -9410,10 +9410,10 @@ M68KMAKE_OP(sub, 8, er, d)
M68KMAKE_OP(sub, 8, er, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_8;
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_8;
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -9426,10 +9426,10 @@ M68KMAKE_OP(sub, 8, er, .)
M68KMAKE_OP(sub, 16, er, d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
@@ -9442,10 +9442,10 @@ M68KMAKE_OP(sub, 16, er, d)
M68KMAKE_OP(sub, 16, er, a)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_16(AY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_16(AY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
@@ -9458,10 +9458,10 @@ M68KMAKE_OP(sub, 16, er, a)
M68KMAKE_OP(sub, 16, er, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_16;
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_16;
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
@@ -9474,10 +9474,10 @@ M68KMAKE_OP(sub, 16, er, .)
M68KMAKE_OP(sub, 32, er, d)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = DY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = DY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
@@ -9490,10 +9490,10 @@ M68KMAKE_OP(sub, 32, er, d)
M68KMAKE_OP(sub, 32, er, a)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = AY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = AY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
@@ -9506,10 +9506,10 @@ M68KMAKE_OP(sub, 32, er, a)
M68KMAKE_OP(sub, 32, er, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_32;
- UINT32 dst = *r_dst;
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_32;
+ uint32_t dst = *r_dst;
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
@@ -9522,10 +9522,10 @@ M68KMAKE_OP(sub, 32, er, .)
M68KMAKE_OP(sub, 8, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 src = MASK_OUT_ABOVE_8(DX(mc68kcpu));
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t src = MASK_OUT_ABOVE_8(DX(mc68kcpu));
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -9538,10 +9538,10 @@ M68KMAKE_OP(sub, 8, re, .)
M68KMAKE_OP(sub, 16, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 src = MASK_OUT_ABOVE_16(DX(mc68kcpu));
- UINT32 dst = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t src = MASK_OUT_ABOVE_16(DX(mc68kcpu));
+ uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -9554,10 +9554,10 @@ M68KMAKE_OP(sub, 16, re, .)
M68KMAKE_OP(sub, 32, re, .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 src = DX(mc68kcpu);
- UINT32 dst = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t src = DX(mc68kcpu);
+ uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -9570,7 +9570,7 @@ M68KMAKE_OP(sub, 32, re, .)
M68KMAKE_OP(suba, 16, ., d)
{
- UINT32* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY(mc68kcpu)));
}
@@ -9578,7 +9578,7 @@ M68KMAKE_OP(suba, 16, ., d)
M68KMAKE_OP(suba, 16, ., a)
{
- UINT32* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY(mc68kcpu)));
}
@@ -9586,8 +9586,8 @@ M68KMAKE_OP(suba, 16, ., a)
M68KMAKE_OP(suba, 16, ., .)
{
- UINT32* r_dst = &AX(mc68kcpu);
- UINT32 src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
+ uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
*r_dst = MASK_OUT_ABOVE_32(*r_dst - src);
}
@@ -9595,7 +9595,7 @@ M68KMAKE_OP(suba, 16, ., .)
M68KMAKE_OP(suba, 32, ., d)
{
- UINT32* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst - DY(mc68kcpu));
}
@@ -9603,7 +9603,7 @@ M68KMAKE_OP(suba, 32, ., d)
M68KMAKE_OP(suba, 32, ., a)
{
- UINT32* r_dst = &AX(mc68kcpu);
+ uint32_t* r_dst = &AX(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst - AY(mc68kcpu));
}
@@ -9611,8 +9611,8 @@ M68KMAKE_OP(suba, 32, ., a)
M68KMAKE_OP(suba, 32, ., .)
{
- UINT32* r_dst = &AX(mc68kcpu);
- UINT32 src = M68KMAKE_GET_OPER_AY_32;
+ uint32_t* r_dst = &AX(mc68kcpu);
+ uint32_t src = M68KMAKE_GET_OPER_AY_32;
*r_dst = MASK_OUT_ABOVE_32(*r_dst - src);
}
@@ -9620,10 +9620,10 @@ M68KMAKE_OP(suba, 32, ., .)
M68KMAKE_OP(subi, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -9636,10 +9636,10 @@ M68KMAKE_OP(subi, 8, ., d)
M68KMAKE_OP(subi, 8, ., .)
{
- UINT32 src = OPER_I_8(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_8(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -9652,10 +9652,10 @@ M68KMAKE_OP(subi, 8, ., .)
M68KMAKE_OP(subi, 16, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -9668,10 +9668,10 @@ M68KMAKE_OP(subi, 16, ., d)
M68KMAKE_OP(subi, 16, ., .)
{
- UINT32 src = OPER_I_16(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 dst = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_16(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -9684,10 +9684,10 @@ M68KMAKE_OP(subi, 16, ., .)
M68KMAKE_OP(subi, 32, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -9700,10 +9700,10 @@ M68KMAKE_OP(subi, 32, ., d)
M68KMAKE_OP(subi, 32, ., .)
{
- UINT32 src = OPER_I_32(mc68kcpu);
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 dst = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t src = OPER_I_32(mc68kcpu);
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -9716,10 +9716,10 @@ M68KMAKE_OP(subi, 32, ., .)
M68KMAKE_OP(subq, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -9732,10 +9732,10 @@ M68KMAKE_OP(subq, 8, ., d)
M68KMAKE_OP(subq, 8, ., .)
{
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
@@ -9748,10 +9748,10 @@ M68KMAKE_OP(subq, 8, ., .)
M68KMAKE_OP(subq, 16, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -9764,7 +9764,7 @@ M68KMAKE_OP(subq, 16, ., d)
M68KMAKE_OP(subq, 16, ., a)
{
- UINT32* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst - (((((mc68kcpu)->ir >> 9) - 1) & 7) + 1));
}
@@ -9772,10 +9772,10 @@ M68KMAKE_OP(subq, 16, ., a)
M68KMAKE_OP(subq, 16, ., .)
{
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 ea = M68KMAKE_GET_EA_AY_16;
- UINT32 dst = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t ea = M68KMAKE_GET_EA_AY_16;
+ uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
@@ -9788,10 +9788,10 @@ M68KMAKE_OP(subq, 16, ., .)
M68KMAKE_OP(subq, 32, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 dst = *r_dst;
- UINT32 res = dst - src;
+ uint32_t* r_dst = &DY(mc68kcpu);
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t dst = *r_dst;
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -9804,7 +9804,7 @@ M68KMAKE_OP(subq, 32, ., d)
M68KMAKE_OP(subq, 32, ., a)
{
- UINT32* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY(mc68kcpu);
*r_dst = MASK_OUT_ABOVE_32(*r_dst - (((((mc68kcpu)->ir >> 9) - 1) & 7) + 1));
}
@@ -9812,10 +9812,10 @@ M68KMAKE_OP(subq, 32, ., a)
M68KMAKE_OP(subq, 32, ., .)
{
- UINT32 src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
- UINT32 ea = M68KMAKE_GET_EA_AY_32;
- UINT32 dst = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = dst - src;
+ uint32_t src = ((((mc68kcpu)->ir >> 9) - 1) & 7) + 1;
+ uint32_t ea = M68KMAKE_GET_EA_AY_32;
+ uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = dst - src;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
@@ -9828,10 +9828,10 @@ M68KMAKE_OP(subq, 32, ., .)
M68KMAKE_OP(subx, 8, rr, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_8(*r_dst);
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_8(*r_dst);
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -9846,10 +9846,10 @@ M68KMAKE_OP(subx, 8, rr, .)
M68KMAKE_OP(subx, 16, rr, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
- UINT32 dst = MASK_OUT_ABOVE_16(*r_dst);
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t dst = MASK_OUT_ABOVE_16(*r_dst);
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
@@ -9864,10 +9864,10 @@ M68KMAKE_OP(subx, 16, rr, .)
M68KMAKE_OP(subx, 32, rr, .)
{
- UINT32* r_dst = &DX(mc68kcpu);
- UINT32 src = DY(mc68kcpu);
- UINT32 dst = *r_dst;
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
+ uint32_t src = DY(mc68kcpu);
+ uint32_t dst = *r_dst;
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
@@ -9882,10 +9882,10 @@ M68KMAKE_OP(subx, 32, rr, .)
M68KMAKE_OP(subx, 8, mm, ax7)
{
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -9900,10 +9900,10 @@ M68KMAKE_OP(subx, 8, mm, ax7)
M68KMAKE_OP(subx, 8, mm, ay7)
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -9918,10 +9918,10 @@ M68KMAKE_OP(subx, 8, mm, ay7)
M68KMAKE_OP(subx, 8, mm, axy7)
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea = EA_A7_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea = EA_A7_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -9936,10 +9936,10 @@ M68KMAKE_OP(subx, 8, mm, axy7)
M68KMAKE_OP(subx, 8, mm, .)
{
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea = EA_AX_PD_8(mc68kcpu);
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea = EA_AX_PD_8(mc68kcpu);
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_8(res);
@@ -9954,10 +9954,10 @@ M68KMAKE_OP(subx, 8, mm, .)
M68KMAKE_OP(subx, 16, mm, .)
{
- UINT32 src = OPER_AY_PD_16(mc68kcpu);
- UINT32 ea = EA_AX_PD_16(mc68kcpu);
- UINT32 dst = m68ki_read_16((mc68kcpu), ea);
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_16(mc68kcpu);
+ uint32_t ea = EA_AX_PD_16(mc68kcpu);
+ uint32_t dst = m68ki_read_16((mc68kcpu), ea);
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_16(res);
@@ -9972,10 +9972,10 @@ M68KMAKE_OP(subx, 16, mm, .)
M68KMAKE_OP(subx, 32, mm, .)
{
- UINT32 src = OPER_AY_PD_32(mc68kcpu);
- UINT32 ea = EA_AX_PD_32(mc68kcpu);
- UINT32 dst = m68ki_read_32((mc68kcpu), ea);
- UINT32 res = dst - src - XFLAG_AS_1(mc68kcpu);
+ uint32_t src = OPER_AY_PD_32(mc68kcpu);
+ uint32_t ea = EA_AX_PD_32(mc68kcpu);
+ uint32_t dst = m68ki_read_32((mc68kcpu), ea);
+ uint32_t res = dst - src - XFLAG_AS_1(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SUB_32(src, dst, res);
@@ -9990,7 +9990,7 @@ M68KMAKE_OP(subx, 32, mm, .)
M68KMAKE_OP(swap, 32, ., .)
{
- UINT32* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY(mc68kcpu);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(*r_dst<<16);
*r_dst = (*r_dst>>16) | (mc68kcpu)->not_z_flag;
@@ -10004,7 +10004,7 @@ M68KMAKE_OP(swap, 32, ., .)
M68KMAKE_OP(tas, 8, ., d)
{
- UINT32* r_dst = &DY(mc68kcpu);
+ uint32_t* r_dst = &DY(mc68kcpu);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(*r_dst);
(mc68kcpu)->n_flag = NFLAG_8(*r_dst);
@@ -10016,8 +10016,8 @@ M68KMAKE_OP(tas, 8, ., d)
M68KMAKE_OP(tas, 8, ., .)
{
- UINT32 ea = M68KMAKE_GET_EA_AY_8;
- UINT32 dst = m68ki_read_8((mc68kcpu), ea);
+ uint32_t ea = M68KMAKE_GET_EA_AY_8;
+ uint32_t dst = m68ki_read_8((mc68kcpu), ea);
(mc68kcpu)->not_z_flag = dst;
(mc68kcpu)->n_flag = NFLAG_8(dst);
@@ -10164,7 +10164,7 @@ M68KMAKE_OP(trapv, 0, ., .)
M68KMAKE_OP(tst, 8, ., d)
{
- UINT32 res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
+ uint32_t res = MASK_OUT_ABOVE_8(DY(mc68kcpu));
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -10175,7 +10175,7 @@ M68KMAKE_OP(tst, 8, ., d)
M68KMAKE_OP(tst, 8, ., .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_8;
+ uint32_t res = M68KMAKE_GET_OPER_AY_8;
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -10188,7 +10188,7 @@ M68KMAKE_OP(tst, 8, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_PCDI_8(mc68kcpu);
+ uint32_t res = OPER_PCDI_8(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -10204,7 +10204,7 @@ M68KMAKE_OP(tst, 8, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_PCIX_8(mc68kcpu);
+ uint32_t res = OPER_PCIX_8(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -10220,7 +10220,7 @@ M68KMAKE_OP(tst, 8, ., i)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_I_8(mc68kcpu);
+ uint32_t res = OPER_I_8(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = res;
@@ -10234,7 +10234,7 @@ M68KMAKE_OP(tst, 8, ., i)
M68KMAKE_OP(tst, 16, ., d)
{
- UINT32 res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
+ uint32_t res = MASK_OUT_ABOVE_16(DY(mc68kcpu));
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -10247,7 +10247,7 @@ M68KMAKE_OP(tst, 16, ., a)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = MAKE_INT_16(AY(mc68kcpu));
+ uint32_t res = MAKE_INT_16(AY(mc68kcpu));
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -10261,7 +10261,7 @@ M68KMAKE_OP(tst, 16, ., a)
M68KMAKE_OP(tst, 16, ., .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_16;
+ uint32_t res = M68KMAKE_GET_OPER_AY_16;
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -10274,7 +10274,7 @@ M68KMAKE_OP(tst, 16, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_PCDI_16(mc68kcpu);
+ uint32_t res = OPER_PCDI_16(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -10290,7 +10290,7 @@ M68KMAKE_OP(tst, 16, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_PCIX_16(mc68kcpu);
+ uint32_t res = OPER_PCIX_16(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -10306,7 +10306,7 @@ M68KMAKE_OP(tst, 16, ., i)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_I_16(mc68kcpu);
+ uint32_t res = OPER_I_16(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = res;
@@ -10320,7 +10320,7 @@ M68KMAKE_OP(tst, 16, ., i)
M68KMAKE_OP(tst, 32, ., d)
{
- UINT32 res = DY(mc68kcpu);
+ uint32_t res = DY(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -10333,7 +10333,7 @@ M68KMAKE_OP(tst, 32, ., a)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = AY(mc68kcpu);
+ uint32_t res = AY(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -10347,7 +10347,7 @@ M68KMAKE_OP(tst, 32, ., a)
M68KMAKE_OP(tst, 32, ., .)
{
- UINT32 res = M68KMAKE_GET_OPER_AY_32;
+ uint32_t res = M68KMAKE_GET_OPER_AY_32;
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -10360,7 +10360,7 @@ M68KMAKE_OP(tst, 32, ., pcdi)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_PCDI_32(mc68kcpu);
+ uint32_t res = OPER_PCDI_32(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -10376,7 +10376,7 @@ M68KMAKE_OP(tst, 32, ., pcix)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_PCIX_32(mc68kcpu);
+ uint32_t res = OPER_PCIX_32(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -10392,7 +10392,7 @@ M68KMAKE_OP(tst, 32, ., i)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 res = OPER_I_32(mc68kcpu);
+ uint32_t res = OPER_I_32(mc68kcpu);
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = res;
@@ -10412,7 +10412,7 @@ M68KMAKE_OP(unlk, 32, ., a7)
M68KMAKE_OP(unlk, 32, ., .)
{
- UINT32* r_dst = &AY(mc68kcpu);
+ uint32_t* r_dst = &AY(mc68kcpu);
REG_A(mc68kcpu)[7] = *r_dst;
*r_dst = m68ki_pull_32(mc68kcpu);
@@ -10424,8 +10424,8 @@ M68KMAKE_OP(unpk, 16, rr, .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* Note: DX(mc68kcpu) and DY(mc68kcpu) are reversed in Motorola's docs */
- UINT32 src = DY(mc68kcpu);
- UINT32* r_dst = &DX(mc68kcpu);
+ uint32_t src = DY(mc68kcpu);
+ uint32_t* r_dst = &DX(mc68kcpu);
*r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu)) & 0xffff);
return;
@@ -10439,8 +10439,8 @@ M68KMAKE_OP(unpk, 16, mm, ax7)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* Note: AX and AY are reversed in Motorola's docs */
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea_dst;
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea_dst;
src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu);
ea_dst = EA_A7_PD_8(mc68kcpu);
@@ -10458,8 +10458,8 @@ M68KMAKE_OP(unpk, 16, mm, ay7)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* Note: AX and AY are reversed in Motorola's docs */
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea_dst;
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea_dst;
src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu);
ea_dst = EA_AX_PD_8(mc68kcpu);
@@ -10476,8 +10476,8 @@ M68KMAKE_OP(unpk, 16, mm, axy7)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- UINT32 src = OPER_A7_PD_8(mc68kcpu);
- UINT32 ea_dst;
+ uint32_t src = OPER_A7_PD_8(mc68kcpu);
+ uint32_t ea_dst;
src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu);
ea_dst = EA_A7_PD_8(mc68kcpu);
@@ -10495,8 +10495,8 @@ M68KMAKE_OP(unpk, 16, mm, .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* Note: AX and AY are reversed in Motorola's docs */
- UINT32 src = OPER_AY_PD_8(mc68kcpu);
- UINT32 ea_dst;
+ uint32_t src = OPER_AY_PD_8(mc68kcpu);
+ uint32_t ea_dst;
src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16(mc68kcpu);
ea_dst = EA_AX_PD_8(mc68kcpu);
@@ -10513,9 +10513,9 @@ M68KMAKE_OP(cinv, 32, ., .)
{
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
- UINT16 ir = mc68kcpu->ir;
- UINT8 cache = (ir >> 6) & 3;
-// UINT8 scope = (ir >> 3) & 3;
+ uint16_t ir = mc68kcpu->ir;
+ uint8_t cache = (ir >> 6) & 3;
+// uint8_t scope = (ir >> 3) & 3;
// mc68kcpu->logerror("68040 %s: pc=%08x ir=%04x cache=%d scope=%d register=%d\n", ir & 0x0020 ? "cpush" : "cinv", REG_PPC(mc68kcpu), ir, cache, scope, ir & 7);
switch (cache)
{
diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp
index b142337ae42..8bacd096a35 100644
--- a/src/devices/cpu/m68000/m68kcpu.cpp
+++ b/src/devices/cpu/m68000/m68kcpu.cpp
@@ -41,7 +41,7 @@ extern void m68881_mmu_ops(m68000_base_device *m68k);
/* ======================================================================== */
/* Used by shift & rotate instructions */
-const UINT8 m68ki_shift_8_table[65] =
+const uint8_t m68ki_shift_8_table[65] =
{
0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
@@ -50,7 +50,7 @@ const UINT8 m68ki_shift_8_table[65] =
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff
};
-const UINT16 m68ki_shift_16_table[65] =
+const uint16_t m68ki_shift_16_table[65] =
{
0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00,
0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff,
@@ -61,7 +61,7 @@ const UINT16 m68ki_shift_16_table[65] =
0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff
};
-const UINT32 m68ki_shift_32_table[65] =
+const uint32_t m68ki_shift_32_table[65] =
{
0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000,
0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000,
@@ -80,7 +80,7 @@ const UINT32 m68ki_shift_32_table[65] =
/* Number of clock cycles to use for exception processing.
* I used 4 for any vectors that are undocumented for processing times.
*/
-const UINT8 m68ki_exception_cycle_table[7][256] =
+const uint8_t m68ki_exception_cycle_table[7][256] =
{
{ /* 000 */
40, /* 0: Reset - Initial Stack Pointer */
@@ -595,7 +595,7 @@ const UINT8 m68ki_exception_cycle_table[7][256] =
},
};
-const UINT8 m68ki_ea_idx_cycle_table[64] =
+const uint8_t m68ki_ea_idx_cycle_table[64] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, /* ..01.000 no memory indirect, base nullptr */
@@ -637,9 +637,9 @@ const UINT8 m68ki_ea_idx_cycle_table[64] =
static void set_irq_line(m68000_base_device *m68k, int irqline, int state)
{
- UINT32 old_level = m68k->int_level;
- UINT32 vstate = m68k->virq_state;
- UINT32 blevel;
+ uint32_t old_level = m68k->int_level;
+ uint32_t vstate = m68k->virq_state;
+ uint32_t blevel;
if(state == ASSERT_LINE)
vstate |= 1 << irqline;
@@ -676,7 +676,7 @@ void m68000_base_device::postload()
static void m68k_cause_bus_error(m68000_base_device *m68k)
{
- UINT32 sr;
+ uint32_t sr;
sr = m68ki_init_exception(m68k);
@@ -712,9 +712,9 @@ bool m68000_base_device::memory_translate(address_spacenum space, int intention,
if ((space == AS_PROGRAM) && ((pmmu_enabled) || (CPU_TYPE_IS_040_PLUS(cpu_type))))
{
// FIXME: mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc
- UINT16 temp_mmu_tmp_sr = mmu_tmp_sr;
+ uint16_t temp_mmu_tmp_sr = mmu_tmp_sr;
int mode = s_flag ? FUNCTION_CODE_SUPERVISOR_PROGRAM : FUNCTION_CODE_USER_PROGRAM;
-// UINT32 va=address;
+// uint32_t va=address;
if (CPU_TYPE_IS_040_PLUS(cpu_type))
{
@@ -822,7 +822,7 @@ inline void m68000_base_device::cpu_execute(void)
run_mode = RUN_MODE_NORMAL;
// save CPU address registers values at start of instruction
int i;
- UINT32 tmp_dar[16];
+ uint32_t tmp_dar[16];
for (i = 15; i >= 0; i--)
{
@@ -842,7 +842,7 @@ inline void m68000_base_device::cpu_execute(void)
if (mmu_tmp_buserror_occurred)
{
- UINT32 sr;
+ uint32_t sr;
mmu_tmp_buserror_occurred = 0;
@@ -916,7 +916,7 @@ inline void m68000_base_device::cpu_execute(void)
void m68000_base_device::init_cpu_common(void)
{
- static UINT32 emulation_initialized = 0;
+ static uint32_t emulation_initialized = 0;
//this = device;//deviceparam;
program = &space(AS_PROGRAM);
@@ -1140,7 +1140,7 @@ void m68000_base_device::state_export(const device_state_entry &entry)
void m68000_base_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
- UINT16 sr;
+ uint16_t sr;
switch (entry.index())
{
@@ -1217,7 +1217,7 @@ void m68000_base_device::set_instruction_hook(read32_delegate ihook)
* 8-bit data memory interface
****************************************************************************/
-UINT16 m68000_base_device::m68008_read_immediate_16(offs_t address)
+uint16_t m68000_base_device::m68008_read_immediate_16(offs_t address)
{
return (m_odirect->read_byte(address) << 8) | (m_odirect->read_byte(address + 1));
}
@@ -1244,19 +1244,19 @@ void m68000_base_device::init8(address_space &space, address_space &ospace)
* 16-bit data memory interface
****************************************************************************/
-UINT16 m68000_base_device::read_immediate_16(offs_t address)
+uint16_t m68000_base_device::read_immediate_16(offs_t address)
{
return m_odirect->read_word((address), opcode_xor);
}
-UINT16 m68000_base_device::simple_read_immediate_16(offs_t address)
+uint16_t m68000_base_device::simple_read_immediate_16(offs_t address)
{
return m_odirect->read_word(address);
}
-void m68000_base_device::m68000_write_byte(offs_t address, UINT8 data)
+void m68000_base_device::m68000_write_byte(offs_t address, uint8_t data)
{
- static const UINT16 masks[] = {0xff00, 0x00ff};
+ static const uint16_t masks[] = {0xff00, 0x00ff};
m_space->write_word(address & ~1, data | (data << 8), masks[address & 1]);
}
@@ -1306,7 +1306,7 @@ void m68000_base_device::init32(address_space &space, address_space &ospace)
}
/* interface for 32-bit data bus with PMMU (68EC020, 68020) */
-UINT8 m68000_base_device::read_byte_32_mmu(offs_t address)
+uint8_t m68000_base_device::read_byte_32_mmu(offs_t address)
{
if (pmmu_enabled)
{
@@ -1319,7 +1319,7 @@ UINT8 m68000_base_device::read_byte_32_mmu(offs_t address)
return m_space->read_byte(address);
}
-void m68000_base_device::write_byte_32_mmu(offs_t address, UINT8 data)
+void m68000_base_device::write_byte_32_mmu(offs_t address, uint8_t data)
{
if (pmmu_enabled)
{
@@ -1332,7 +1332,7 @@ void m68000_base_device::write_byte_32_mmu(offs_t address, UINT8 data)
m_space->write_byte(address, data);
}
-UINT16 m68000_base_device::read_immediate_16_mmu(offs_t address)
+uint16_t m68000_base_device::read_immediate_16_mmu(offs_t address)
{
if (pmmu_enabled)
{
@@ -1346,19 +1346,19 @@ UINT16 m68000_base_device::read_immediate_16_mmu(offs_t address)
}
/* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */
-UINT16 m68000_base_device::readword_d32_mmu(offs_t address)
+uint16_t m68000_base_device::readword_d32_mmu(offs_t address)
{
- UINT16 result;
+ uint16_t result;
if (pmmu_enabled)
{
- UINT32 address0 = pmmu_translate_addr(this, address);
+ uint32_t address0 = pmmu_translate_addr(this, address);
if (mmu_tmp_buserror_occurred) {
return ~0;
} else if (WORD_ALIGNED(address)) {
return m_space->read_word(address0);
} else {
- UINT32 address1 = pmmu_translate_addr(this, address + 1);
+ uint32_t address1 = pmmu_translate_addr(this, address + 1);
if (mmu_tmp_buserror_occurred) {
return ~0;
} else {
@@ -1375,18 +1375,18 @@ UINT16 m68000_base_device::readword_d32_mmu(offs_t address)
}
/* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */
-void m68000_base_device::writeword_d32_mmu(offs_t address, UINT16 data)
+void m68000_base_device::writeword_d32_mmu(offs_t address, uint16_t data)
{
if (pmmu_enabled)
{
- UINT32 address0 = pmmu_translate_addr(this, address);
+ uint32_t address0 = pmmu_translate_addr(this, address);
if (mmu_tmp_buserror_occurred) {
return;
} else if (WORD_ALIGNED(address)) {
m_space->write_word(address0, data);
return;
} else {
- UINT32 address1 = pmmu_translate_addr(this, address + 1);
+ uint32_t address1 = pmmu_translate_addr(this, address + 1);
if (mmu_tmp_buserror_occurred) {
return;
} else {
@@ -1407,13 +1407,13 @@ void m68000_base_device::writeword_d32_mmu(offs_t address, UINT16 data)
}
/* potentially misaligned 32-bit reads with a 32-bit data bus (and 24-bit address bus) */
-UINT32 m68000_base_device::readlong_d32_mmu(offs_t address)
+uint32_t m68000_base_device::readlong_d32_mmu(offs_t address)
{
- UINT32 result;
+ uint32_t result;
if (pmmu_enabled)
{
- UINT32 address0 = pmmu_translate_addr(this, address);
+ uint32_t address0 = pmmu_translate_addr(this, address);
if (mmu_tmp_buserror_occurred) {
return ~0;
} else if ((address +3) & 0xfc) {
@@ -1422,15 +1422,15 @@ UINT32 m68000_base_device::readlong_d32_mmu(offs_t address)
} else if (DWORD_ALIGNED(address)) { // 0
return m_space->read_dword(address0);
} else {
- UINT32 address2 = pmmu_translate_addr(this, address+2);
+ uint32_t address2 = pmmu_translate_addr(this, address+2);
if (mmu_tmp_buserror_occurred) {
return ~0;
} else if (WORD_ALIGNED(address)) { // 2
result = m_space->read_word(address0) << 16;
return result | m_space->read_word(address2);
} else {
- UINT32 address1 = pmmu_translate_addr(this, address+1);
- UINT32 address3 = pmmu_translate_addr(this, address+3);
+ uint32_t address1 = pmmu_translate_addr(this, address+1);
+ uint32_t address3 = pmmu_translate_addr(this, address+3);
if (mmu_tmp_buserror_occurred) {
return ~0;
} else {
@@ -1455,11 +1455,11 @@ UINT32 m68000_base_device::readlong_d32_mmu(offs_t address)
}
/* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */
-void m68000_base_device::writelong_d32_mmu(offs_t address, UINT32 data)
+void m68000_base_device::writelong_d32_mmu(offs_t address, uint32_t data)
{
if (pmmu_enabled)
{
- UINT32 address0 = pmmu_translate_addr(this, address);
+ uint32_t address0 = pmmu_translate_addr(this, address);
if (mmu_tmp_buserror_occurred) {
return;
} else if ((address +3) & 0xfc) {
@@ -1469,7 +1469,7 @@ void m68000_base_device::writelong_d32_mmu(offs_t address, UINT32 data)
m_space->write_dword(address0, data);
return;
} else {
- UINT32 address2 = pmmu_translate_addr(this, address+2);
+ uint32_t address2 = pmmu_translate_addr(this, address+2);
if (mmu_tmp_buserror_occurred) {
return;
} else if (WORD_ALIGNED(address)) { // 2
@@ -1477,8 +1477,8 @@ void m68000_base_device::writelong_d32_mmu(offs_t address, UINT32 data)
m_space->write_word(address2, data);
return;
} else {
- UINT32 address1 = pmmu_translate_addr(this, address+1);
- UINT32 address3 = pmmu_translate_addr(this, address+3);
+ uint32_t address1 = pmmu_translate_addr(this, address+1);
+ uint32_t address3 = pmmu_translate_addr(this, address+3);
if (mmu_tmp_buserror_occurred) {
return;
} else {
@@ -1526,7 +1526,7 @@ void m68000_base_device::init32mmu(address_space &space, address_space &ospace)
/* interface for 32-bit data bus with PMMU (68EC020, 68020) */
-UINT8 m68000_base_device::read_byte_32_hmmu(offs_t address)
+uint8_t m68000_base_device::read_byte_32_hmmu(offs_t address)
{
if (hmmu_enabled)
{
@@ -1536,7 +1536,7 @@ UINT8 m68000_base_device::read_byte_32_hmmu(offs_t address)
return m_space->read_byte(address);
}
-void m68000_base_device::write_byte_32_hmmu(offs_t address, UINT8 data)
+void m68000_base_device::write_byte_32_hmmu(offs_t address, uint8_t data)
{
if (hmmu_enabled)
{
@@ -1546,7 +1546,7 @@ void m68000_base_device::write_byte_32_hmmu(offs_t address, UINT8 data)
m_space->write_byte(address, data);
}
-UINT16 m68000_base_device::read_immediate_16_hmmu(offs_t address)
+uint16_t m68000_base_device::read_immediate_16_hmmu(offs_t address)
{
if (hmmu_enabled)
{
@@ -1557,9 +1557,9 @@ UINT16 m68000_base_device::read_immediate_16_hmmu(offs_t address)
}
/* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */
-UINT16 m68000_base_device::readword_d32_hmmu(offs_t address)
+uint16_t m68000_base_device::readword_d32_hmmu(offs_t address)
{
- UINT16 result;
+ uint16_t result;
if (hmmu_enabled)
{
@@ -1573,7 +1573,7 @@ UINT16 m68000_base_device::readword_d32_hmmu(offs_t address)
}
/* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */
-void m68000_base_device::writeword_d32_hmmu(offs_t address, UINT16 data)
+void m68000_base_device::writeword_d32_hmmu(offs_t address, uint16_t data)
{
if (hmmu_enabled)
{
@@ -1590,9 +1590,9 @@ void m68000_base_device::writeword_d32_hmmu(offs_t address, UINT16 data)
}
/* potentially misaligned 32-bit reads with a 32-bit data bus (and 24-bit address bus) */
-UINT32 m68000_base_device::readlong_d32_hmmu(offs_t address)
+uint32_t m68000_base_device::readlong_d32_hmmu(offs_t address)
{
- UINT32 result;
+ uint32_t result;
if (hmmu_enabled)
{
@@ -1612,7 +1612,7 @@ UINT32 m68000_base_device::readlong_d32_hmmu(offs_t address)
}
/* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */
-void m68000_base_device::writelong_d32_hmmu(offs_t address, UINT32 data)
+void m68000_base_device::writelong_d32_hmmu(offs_t address, uint32_t data)
{
if (hmmu_enabled)
{
@@ -1660,7 +1660,7 @@ void m68000_base_device::set_reset_callback(write_line_delegate callback)
// fault_addr = address to indicate fault at
// rw = 0 for read, 1 for write
// fc = 3-bit function code of access (usually you'd just put what m68k_get_fc() returns here)
-void m68000_base_device::set_buserror_details(UINT32 fault_addr, UINT8 rw, UINT8 fc)
+void m68000_base_device::set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc)
{
aerr_address = fault_addr;
aerr_write_mode = rw;
@@ -1682,7 +1682,7 @@ void m68000_base_device::set_tas_write_callback(write8_delegate callback)
tas_write_callback = callback;
}
-UINT16 m68000_base_device::get_fc()
+uint16_t m68000_base_device::get_fc()
{
return mmu_tmp_fc;
}
@@ -1693,7 +1693,7 @@ UINT16 m68000_base_device::get_fc()
void m68000_base_device::define_state(void)
{
- UINT32 addrmask = (cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff;
+ uint32_t addrmask = (cpu_type & MASK_24BIT_SPACE) ? 0xffffff : 0xffffffff;
state_add(STATE_GENPC, "PC", pc).mask(addrmask).callimport();
state_add(STATE_GENPCBASE, "CURPC", ppc).mask(addrmask).callimport().noshow();
@@ -2178,33 +2178,33 @@ CPU_DISASSEMBLE( dasm_coldfire )
return m68k_disassemble_raw(buffer, pc, oprom, opram, M68K_CPU_TYPE_COLDFIRE);
}
-offs_t m68000_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
-offs_t m68000_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
-offs_t m68301_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
-offs_t m68008_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68008)(this, buffer, pc, oprom, opram, options); }
-offs_t m68008plcc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68008)(this, buffer, pc, oprom, opram, options); }
-offs_t m68010_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68010)(this, buffer, pc, oprom, opram, options); }
-offs_t m68ec020_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
-offs_t m68020_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
-offs_t m68020fpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
-offs_t m68020pmmu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
-offs_t m68020hmmu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
-offs_t m68ec030_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68ec030)(this, buffer, pc, oprom, opram, options); }
-offs_t m68030_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68030)(this, buffer, pc, oprom, opram, options); }
-offs_t m68ec040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68ec040)(this, buffer, pc, oprom, opram, options); }
-offs_t m68lc040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68lc040)(this, buffer, pc, oprom, opram, options); }
-offs_t m68040_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68040)(this, buffer, pc, oprom, opram, options); }
-offs_t scc68070_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
-offs_t fscpu32_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_fscpu32)(this, buffer, pc, oprom, opram, options); }
-offs_t mcf5206e_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { return CPU_DISASSEMBLE_NAME(dasm_coldfire)(this, buffer, pc, oprom, opram, options); }
+offs_t m68000_base_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
+offs_t m68000_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
+offs_t m68301_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
+offs_t m68008_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68008)(this, buffer, pc, oprom, opram, options); }
+offs_t m68008plcc_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68008)(this, buffer, pc, oprom, opram, options); }
+offs_t m68010_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68010)(this, buffer, pc, oprom, opram, options); }
+offs_t m68ec020_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
+offs_t m68020_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
+offs_t m68020fpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
+offs_t m68020pmmu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
+offs_t m68020hmmu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68020)(this, buffer, pc, oprom, opram, options); }
+offs_t m68ec030_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68ec030)(this, buffer, pc, oprom, opram, options); }
+offs_t m68030_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68030)(this, buffer, pc, oprom, opram, options); }
+offs_t m68ec040_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68ec040)(this, buffer, pc, oprom, opram, options); }
+offs_t m68lc040_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68lc040)(this, buffer, pc, oprom, opram, options); }
+offs_t m68040_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68040)(this, buffer, pc, oprom, opram, options); }
+offs_t scc68070_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_m68000)(this, buffer, pc, oprom, opram, options); }
+offs_t fscpu32_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_fscpu32)(this, buffer, pc, oprom, opram, options); }
+offs_t mcf5206e_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { return CPU_DISASSEMBLE_NAME(dasm_coldfire)(this, buffer, pc, oprom, opram, options); }
/* Service an interrupt request and start exception processing */
-void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, UINT32 int_level)
+void m68000_base_device::m68ki_exception_interrupt(m68000_base_device *m68k, uint32_t int_level)
{
- UINT32 vector;
- UINT32 sr;
- UINT32 new_pc;
+ uint32_t vector;
+ uint32_t sr;
+ uint32_t new_pc;
if(CPU_TYPE_IS_000(cpu_type))
{
@@ -2267,7 +2267,7 @@ const device_type M68K = &device_creator<m68000_base_device>;
// h6280_device - constructor
//-------------------------------------------------
-m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, M68K, "M68K", tag, owner, clock, "m68k", __FILE__),
m_program_config("program", ENDIANNESS_BIG, 16, 24),
m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 16, 24)
@@ -2278,8 +2278,8 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
-m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
+m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map)
@@ -2288,8 +2288,8 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
}
-m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, const char *shortname, const char *source)
+m68000_base_device::m68000_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits)
@@ -2504,12 +2504,12 @@ const device_type SCC68070 = &device_creator<scc68070_device>;
const device_type FSCPU32 = &device_creator<fscpu32_device>;
const device_type MCF5206E = &device_creator<mcf5206e_device>;
-m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68000", tag, owner, clock, M68000, 16,24, "m68000", __FILE__)
{
}
-m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+m68000_device::m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: m68000_base_device(mconfig, "M68000", tag, owner, clock, M68000, 16,24, shortname, source)
{
}
@@ -2519,8 +2519,8 @@ void m68000_device::device_start()
init_cpu_m68000();
}
-m68000_device::m68000_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
+m68000_device::m68000_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
: m68000_base_device(mconfig, name, tag, owner, clock, type, prg_data_width, prg_address_bits, internal_map, shortname, source)
{
}
@@ -2529,7 +2529,7 @@ m68000_device::m68000_device(const machine_config &mconfig, const char *name, co
-m68301_device::m68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68301_device::m68301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68301", tag, owner, clock, M68301, 16,24, "m68301", __FILE__)
{
}
@@ -2547,7 +2547,7 @@ void m68301_device::device_start()
/* m68008_device */
-m68008_device::m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68008_device::m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68008", tag, owner, clock, M68008, 8,20, "m68008", __FILE__)
{
}
@@ -2558,7 +2558,7 @@ void m68008_device::device_start()
}
-m68008plcc_device::m68008plcc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68008plcc_device::m68008plcc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68008PLCC", tag, owner, clock, M68008, 8,22, "m68008plcc", __FILE__)
{
}
@@ -2570,7 +2570,7 @@ void m68008plcc_device::device_start()
-m68010_device::m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68010_device::m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68010", tag, owner, clock, M68010, 16,24, "m68010", __FILE__)
{
}
@@ -2582,7 +2582,7 @@ void m68010_device::device_start()
-m68020_device::m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68020_device::m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68020", tag, owner, clock, M68020, 32,32, "m68020", __FILE__)
{
}
@@ -2593,7 +2593,7 @@ void m68020_device::device_start()
}
-m68020fpu_device::m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68020fpu_device::m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68020FPU", tag, owner, clock, M68020, 32,32, "m68020fpu", __FILE__)
{
}
@@ -2604,7 +2604,7 @@ void m68020fpu_device::device_start()
}
// 68020 with 68851 PMMU
-m68020pmmu_device::m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68020pmmu_device::m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68020PMMU", tag, owner, clock, M68020PMMU, 32,32, "m68020pmmu", __FILE__)
{
}
@@ -2629,7 +2629,7 @@ bool m68020hmmu_device::memory_translate(address_spacenum space, int intention,
// 68020 with Apple HMMU & 68881 FPU
// case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68khmmu); break;
-m68020hmmu_device::m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68020hmmu_device::m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68020HMMU", tag, owner, clock, M68020HMMU, 32,32, "m68020hmmu", __FILE__)
{
}
@@ -2640,7 +2640,7 @@ void m68020hmmu_device::device_start()
}
-m68ec020_device::m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68ec020_device::m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68EC020", tag, owner, clock, M68EC020, 32,24, "m68ec020", __FILE__)
{
}
@@ -2650,7 +2650,7 @@ void m68ec020_device::device_start()
init_cpu_m68ec020();
}
-m68030_device::m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68030_device::m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68030", tag, owner, clock, M68030, 32,32, "m68030", __FILE__)
{
}
@@ -2660,7 +2660,7 @@ void m68030_device::device_start()
init_cpu_m68030();
}
-m68ec030_device::m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68ec030_device::m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68EC030", tag, owner, clock, M68EC030, 32,32, "m68ec030", __FILE__)
{
}
@@ -2670,7 +2670,7 @@ void m68ec030_device::device_start()
init_cpu_m68ec030();
}
-m68040_device::m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68040_device::m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68040", tag, owner, clock, M68040, 32,32, "m68040", __FILE__)
{
}
@@ -2683,7 +2683,7 @@ void m68040_device::device_start()
-m68ec040_device::m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68ec040_device::m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68EC040", tag, owner, clock, M68EC040, 32,32, "m68ec040", __FILE__)
{
}
@@ -2695,7 +2695,7 @@ void m68ec040_device::device_start()
-m68lc040_device::m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m68lc040_device::m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "M68LC040", tag, owner, clock, M68LC040, 32,32, "m68lc040", __FILE__)
{
}
@@ -2706,7 +2706,7 @@ void m68lc040_device::device_start()
}
-scc68070_device::scc68070_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+scc68070_device::scc68070_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "SCC68070", tag, owner, clock, SCC68070, 16,32, "scc68070", __FILE__)
{
}
@@ -2717,13 +2717,13 @@ void scc68070_device::device_start()
}
-fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "Freescale CPU32 Core", tag, owner, clock, FSCPU32, 32,32, "fscpu32", __FILE__)
{
}
-fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
+fscpu32_device::fscpu32_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock,
+ const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map, const char *shortname, const char *source)
: m68000_base_device(mconfig, name, tag, owner, clock, type, prg_data_width, prg_address_bits, internal_map, shortname, source)
{
}
@@ -2736,7 +2736,7 @@ void fscpu32_device::device_start()
-mcf5206e_device::mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mcf5206e_device::mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m68000_base_device(mconfig, "MCF5206E", tag, owner, clock, MCF5206E, 32,32, "mcf5206e", __FILE__)
{
}
diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h
index 7860298988f..e452ece67ec 100644
--- a/src/devices/cpu/m68000/m68kcpu.h
+++ b/src/devices/cpu/m68000/m68kcpu.h
@@ -36,9 +36,9 @@ class m68000_base_device;
/* ======================================================================== */
/* Check for > 32bit sizes */
-#define MAKE_INT_8(A) (INT8)(A)
-#define MAKE_INT_16(A) (INT16)(A)
-#define MAKE_INT_32(A) (INT32)(A)
+#define MAKE_INT_8(A) (int8_t)(A)
+#define MAKE_INT_16(A) (int16_t)(A)
+#define MAKE_INT_32(A) (int32_t)(A)
/* ======================================================================== */
@@ -475,7 +475,7 @@ class m68000_base_device;
union fp_reg
{
- UINT64 i;
+ uint64_t i;
double f;
};
@@ -489,117 +489,117 @@ public:
-extern const UINT8 m68ki_shift_8_table[];
-extern const UINT16 m68ki_shift_16_table[];
-extern const UINT32 m68ki_shift_32_table[];
-extern const UINT8 m68ki_exception_cycle_table[][256];
-extern const UINT8 m68ki_ea_idx_cycle_table[];
+extern const uint8_t m68ki_shift_8_table[];
+extern const uint16_t m68ki_shift_16_table[];
+extern const uint32_t m68ki_shift_32_table[];
+extern const uint8_t m68ki_exception_cycle_table[][256];
+extern const uint8_t m68ki_ea_idx_cycle_table[];
/* Read data immediately after the program counter */
-static inline UINT32 m68ki_read_imm_16(m68000_base_device *m68k);
-static inline UINT32 m68ki_read_imm_32(m68000_base_device *m68k);
+static inline uint32_t m68ki_read_imm_16(m68000_base_device *m68k);
+static inline uint32_t m68ki_read_imm_32(m68000_base_device *m68k);
/* Read data with specific function code */
-static inline UINT32 m68ki_read_8_fc (m68000_base_device *m68k, UINT32 address, UINT32 fc);
-static inline UINT32 m68ki_read_16_fc (m68000_base_device *m68k, UINT32 address, UINT32 fc);
-static inline UINT32 m68ki_read_32_fc (m68000_base_device *m68k, UINT32 address, UINT32 fc);
+static inline uint32_t m68ki_read_8_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc);
+static inline uint32_t m68ki_read_16_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc);
+static inline uint32_t m68ki_read_32_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc);
/* Write data with specific function code */
-static inline void m68ki_write_8_fc (m68000_base_device *m68k, UINT32 address, UINT32 fc, UINT32 value);
-static inline void m68ki_write_16_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc, UINT32 value);
-static inline void m68ki_write_32_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc, UINT32 value);
-static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc, UINT32 value);
+static inline void m68ki_write_8_fc (m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value);
+static inline void m68ki_write_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value);
+static inline void m68ki_write_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value);
+static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value);
/* Indexed and PC-relative ea fetching */
-static inline UINT32 m68ki_get_ea_pcdi(m68000_base_device *m68k);
-static inline UINT32 m68ki_get_ea_pcix(m68000_base_device *m68k);
-static inline UINT32 m68ki_get_ea_ix(m68000_base_device *m68k, UINT32 An);
+static inline uint32_t m68ki_get_ea_pcdi(m68000_base_device *m68k);
+static inline uint32_t m68ki_get_ea_pcix(m68000_base_device *m68k);
+static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An);
/* Operand fetching */
-static inline UINT32 OPER_AY_AI_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_AI_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_AI_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_PI_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_PI_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_PI_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_PD_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_PD_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_PD_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_DI_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_DI_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_DI_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_IX_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_IX_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AY_IX_32(m68000_base_device *m68k);
-
-static inline UINT32 OPER_AX_AI_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_AI_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_AI_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_PI_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_PI_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_PI_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_PD_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_PD_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_PD_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_DI_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_DI_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_DI_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_IX_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_IX_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AX_IX_32(m68000_base_device *m68k);
-
-static inline UINT32 OPER_A7_PI_8(m68000_base_device *m68k);
-static inline UINT32 OPER_A7_PD_8(m68000_base_device *m68k);
-
-static inline UINT32 OPER_AW_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AW_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AW_32(m68000_base_device *m68k);
-static inline UINT32 OPER_AL_8(m68000_base_device *m68k);
-static inline UINT32 OPER_AL_16(m68000_base_device *m68k);
-static inline UINT32 OPER_AL_32(m68000_base_device *m68k);
-static inline UINT32 OPER_PCDI_8(m68000_base_device *m68k);
-static inline UINT32 OPER_PCDI_16(m68000_base_device *m68k);
-static inline UINT32 OPER_PCDI_32(m68000_base_device *m68k);
-static inline UINT32 OPER_PCIX_8(m68000_base_device *m68k);
-static inline UINT32 OPER_PCIX_16(m68000_base_device *m68k);
-static inline UINT32 OPER_PCIX_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_AI_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_AI_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_AI_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_PI_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_PI_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_PI_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_PD_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_PD_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_PD_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_DI_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_DI_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_DI_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_IX_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_IX_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AY_IX_32(m68000_base_device *m68k);
+
+static inline uint32_t OPER_AX_AI_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_AI_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_AI_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_PI_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_PI_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_PI_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_PD_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_PD_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_PD_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_DI_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_DI_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_DI_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_IX_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_IX_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AX_IX_32(m68000_base_device *m68k);
+
+static inline uint32_t OPER_A7_PI_8(m68000_base_device *m68k);
+static inline uint32_t OPER_A7_PD_8(m68000_base_device *m68k);
+
+static inline uint32_t OPER_AW_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AW_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AW_32(m68000_base_device *m68k);
+static inline uint32_t OPER_AL_8(m68000_base_device *m68k);
+static inline uint32_t OPER_AL_16(m68000_base_device *m68k);
+static inline uint32_t OPER_AL_32(m68000_base_device *m68k);
+static inline uint32_t OPER_PCDI_8(m68000_base_device *m68k);
+static inline uint32_t OPER_PCDI_16(m68000_base_device *m68k);
+static inline uint32_t OPER_PCDI_32(m68000_base_device *m68k);
+static inline uint32_t OPER_PCIX_8(m68000_base_device *m68k);
+static inline uint32_t OPER_PCIX_16(m68000_base_device *m68k);
+static inline uint32_t OPER_PCIX_32(m68000_base_device *m68k);
/* Stack operations */
-static inline void m68ki_push_16(m68000_base_device *m68k, UINT32 value);
-static inline void m68ki_push_32(m68000_base_device *m68k, UINT32 value);
-static inline UINT32 m68ki_pull_16(m68000_base_device *m68k);
-static inline UINT32 m68ki_pull_32(m68000_base_device *m68k);
+static inline void m68ki_push_16(m68000_base_device *m68k, uint32_t value);
+static inline void m68ki_push_32(m68000_base_device *m68k, uint32_t value);
+static inline uint32_t m68ki_pull_16(m68000_base_device *m68k);
+static inline uint32_t m68ki_pull_32(m68000_base_device *m68k);
/* Program flow operations */
-static inline void m68ki_jump(m68000_base_device *m68k, UINT32 new_pc);
-static inline void m68ki_jump_vector(m68000_base_device *m68k, UINT32 vector);
-static inline void m68ki_branch_8(m68000_base_device *m68k, UINT32 offset);
-static inline void m68ki_branch_16(m68000_base_device *m68k, UINT32 offset);
-static inline void m68ki_branch_32(m68000_base_device *m68k, UINT32 offset);
+static inline void m68ki_jump(m68000_base_device *m68k, uint32_t new_pc);
+static inline void m68ki_jump_vector(m68000_base_device *m68k, uint32_t vector);
+static inline void m68ki_branch_8(m68000_base_device *m68k, uint32_t offset);
+static inline void m68ki_branch_16(m68000_base_device *m68k, uint32_t offset);
+static inline void m68ki_branch_32(m68000_base_device *m68k, uint32_t offset);
/* Status register operations. */
-static inline void m68ki_set_s_flag(m68000_base_device *m68k, UINT32 value); /* Only bit 2 of value should be set (i.e. 4 or 0) */
-static inline void m68ki_set_sm_flag(m68000_base_device *m68k, UINT32 value); /* only bits 1 and 2 of value should be set */
-static inline void m68ki_set_ccr(m68000_base_device *m68k, UINT32 value); /* set the condition code register */
-static inline void m68ki_set_sr(m68000_base_device *m68k, UINT32 value); /* set the status register */
-static inline void m68ki_set_sr_noint(m68000_base_device *m68k, UINT32 value); /* set the status register */
+static inline void m68ki_set_s_flag(m68000_base_device *m68k, uint32_t value); /* Only bit 2 of value should be set (i.e. 4 or 0) */
+static inline void m68ki_set_sm_flag(m68000_base_device *m68k, uint32_t value); /* only bits 1 and 2 of value should be set */
+static inline void m68ki_set_ccr(m68000_base_device *m68k, uint32_t value); /* set the condition code register */
+static inline void m68ki_set_sr(m68000_base_device *m68k, uint32_t value); /* set the status register */
+static inline void m68ki_set_sr_noint(m68000_base_device *m68k, uint32_t value); /* set the status register */
/* Exception processing */
-static inline UINT32 m68ki_init_exception(m68000_base_device *m68k); /* Initial exception processing */
+static inline uint32_t m68ki_init_exception(m68000_base_device *m68k); /* Initial exception processing */
-static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, UINT32 pc, UINT32 sr); /* Stack various frame types */
-static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, UINT32 sr);
+static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, uint32_t pc, uint32_t sr); /* Stack various frame types */
+static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, uint32_t sr);
-static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, UINT32 pc, UINT32 sr, UINT32 vector);
-static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, UINT32 pc, UINT32 sr, UINT32 vector);
-static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, UINT32 sr, UINT32 vector);
-static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, UINT32 pc, UINT32 sr, UINT32 vector);
-static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address);
-static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address);
-static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address, bool in_mmu);
+static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector);
+static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector);
+static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, uint32_t sr, uint32_t vector);
+static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector);
+static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address);
+static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address);
+static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address, bool in_mmu);
-static inline void m68ki_exception_trap(m68000_base_device *m68k, UINT32 vector);
-static inline void m68ki_exception_trapN(m68000_base_device *m68k, UINT32 vector);
+static inline void m68ki_exception_trap(m68000_base_device *m68k, uint32_t vector);
+static inline void m68ki_exception_trapN(m68000_base_device *m68k, uint32_t vector);
static inline void m68ki_exception_trace(m68000_base_device *m68k);
static inline void m68ki_exception_privilege_violation(m68000_base_device *m68k);
static inline void m68ki_exception_1010(m68000_base_device *m68k);
@@ -676,20 +676,20 @@ static inline void m68ki_ic_clear(m68000_base_device *m68k)
// read immediate word using the instruction cache
-static inline UINT32 m68ki_ic_readimm16(m68000_base_device *m68k, UINT32 address)
+static inline uint32_t m68ki_ic_readimm16(m68000_base_device *m68k, uint32_t address)
{
if (m68k->cacr & M68K_CACR_EI)
{
// 68020 series I-cache (MC68020 User's Manual, Section 4 - On-Chip Cache Memory)
if (m68k->cpu_type & (CPU_TYPE_EC020 | CPU_TYPE_020))
{
- UINT32 tag = (address >> 8) | (m68k->s_flag ? 0x1000000 : 0);
+ uint32_t tag = (address >> 8) | (m68k->s_flag ? 0x1000000 : 0);
int idx = (address >> 2) & 0x3f; // 1-of-64 select
// do a cache fill if the line is invalid or the tags don't match
if ((!m68k->ic_valid[idx]) || (m68k->ic_address[idx] != tag))
{
- UINT32 data = m68k->read32(address & ~3);
+ uint32_t data = m68k->read32(address & ~3);
// printf("m68k: doing cache fill at %08x (tag %08x idx %d)\n", address, tag, idx);
@@ -725,9 +725,9 @@ static inline UINT32 m68ki_ic_readimm16(m68000_base_device *m68k, UINT32 address
/* Handles all immediate reads, does address error check, function code setting,
* and prefetching if they are enabled in m68kconf.h
*/
-static inline UINT32 m68ki_read_imm_16(m68000_base_device *m68k)
+static inline uint32_t m68ki_read_imm_16(m68000_base_device *m68k)
{
- UINT32 result;
+ uint32_t result;
m68k->mmu_tmp_fc = m68k->s_flag | FUNCTION_CODE_USER_PROGRAM;
m68k->mmu_tmp_rw = 1;
@@ -752,9 +752,9 @@ static inline UINT32 m68ki_read_imm_16(m68000_base_device *m68k)
return result;
}
-static inline UINT32 m68ki_read_imm_32(m68000_base_device *m68k)
+static inline uint32_t m68ki_read_imm_32(m68000_base_device *m68k)
{
- UINT32 temp_val;
+ uint32_t temp_val;
m68k->mmu_tmp_fc = m68k->s_flag | FUNCTION_CODE_USER_PROGRAM;
m68k->mmu_tmp_rw = 1;
@@ -789,13 +789,13 @@ static inline UINT32 m68ki_read_imm_32(m68000_base_device *m68k)
* These functions will also check for address error and set the function
* code if they are enabled in m68kconf.h.
*/
-static inline UINT32 m68ki_read_8_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc)
+static inline uint32_t m68ki_read_8_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc)
{
m68k->mmu_tmp_fc = fc;
m68k->mmu_tmp_rw = 1;
return m68k->/*memory.*/read8(address);
}
-static inline UINT32 m68ki_read_16_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc)
+static inline uint32_t m68ki_read_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc)
{
if (CPU_TYPE_IS_010_LESS(m68k->cpu_type))
{
@@ -805,7 +805,7 @@ static inline UINT32 m68ki_read_16_fc(m68000_base_device *m68k, UINT32 address,
m68k->mmu_tmp_rw = 1;
return m68k->/*memory.*/read16(address);
}
-static inline UINT32 m68ki_read_32_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc)
+static inline uint32_t m68ki_read_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc)
{
if (CPU_TYPE_IS_010_LESS(m68k->cpu_type))
{
@@ -816,13 +816,13 @@ static inline UINT32 m68ki_read_32_fc(m68000_base_device *m68k, UINT32 address,
return m68k->/*memory.*/read32(address);
}
-static inline void m68ki_write_8_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc, UINT32 value)
+static inline void m68ki_write_8_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value)
{
m68k->mmu_tmp_fc = fc;
m68k->mmu_tmp_rw = 0;
m68k->/*memory.*/write8(address, value);
}
-static inline void m68ki_write_16_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc, UINT32 value)
+static inline void m68ki_write_16_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value)
{
if (CPU_TYPE_IS_010_LESS(m68k->cpu_type))
{
@@ -832,7 +832,7 @@ static inline void m68ki_write_16_fc(m68000_base_device *m68k, UINT32 address, U
m68k->mmu_tmp_rw = 0;
m68k->/*memory.*/write16(address, value);
}
-static inline void m68ki_write_32_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc, UINT32 value)
+static inline void m68ki_write_32_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value)
{
if (CPU_TYPE_IS_010_LESS(m68k->cpu_type))
{
@@ -848,7 +848,7 @@ static inline void m68ki_write_32_fc(m68000_base_device *m68k, UINT32 address, U
* A real 68k first writes the high word to [address+2], and then writes the
* low word to [address].
*/
-static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, UINT32 address, UINT32 fc, UINT32 value)
+static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, uint32_t address, uint32_t fc, uint32_t value)
{
if (CPU_TYPE_IS_010_LESS(m68k->cpu_type))
{
@@ -866,14 +866,14 @@ static inline void m68ki_write_32_pd_fc(m68000_base_device *m68k, UINT32 address
/* The program counter relative addressing modes cause operands to be
* retrieved from program space, not data space.
*/
-static inline UINT32 m68ki_get_ea_pcdi(m68000_base_device *m68k)
+static inline uint32_t m68ki_get_ea_pcdi(m68000_base_device *m68k)
{
- UINT32 old_pc = REG_PC(m68k);
+ uint32_t old_pc = REG_PC(m68k);
return old_pc + MAKE_INT_16(m68ki_read_imm_16(m68k));
}
-static inline UINT32 m68ki_get_ea_pcix(m68000_base_device *m68k)
+static inline uint32_t m68ki_get_ea_pcix(m68000_base_device *m68k)
{
return m68ki_get_ea_ix(m68k, REG_PC(m68k));
}
@@ -920,13 +920,13 @@ static inline UINT32 m68ki_get_ea_pcix(m68000_base_device *m68k)
* 1 011 mem indir with long outer
* 1 100-111 reserved
*/
-static inline UINT32 m68ki_get_ea_ix(m68000_base_device *m68k, UINT32 An)
+static inline uint32_t m68ki_get_ea_ix(m68000_base_device *m68k, uint32_t An)
{
/* An = base register */
- UINT32 extension = m68ki_read_imm_16(m68k);
- UINT32 Xn = 0; /* Index register */
- UINT32 bd = 0; /* Base Displacement */
- UINT32 od = 0; /* Outer Displacement */
+ uint32_t extension = m68ki_read_imm_16(m68k);
+ uint32_t Xn = 0; /* Index register */
+ uint32_t bd = 0; /* Base Displacement */
+ uint32_t od = 0; /* Outer Displacement */
if(CPU_TYPE_IS_010_LESS(m68k->cpu_type))
{
@@ -993,78 +993,78 @@ static inline UINT32 m68ki_get_ea_ix(m68000_base_device *m68k, UINT32 An)
/* Fetch operands */
-static inline UINT32 OPER_AY_AI_8(m68000_base_device *m68k) {UINT32 ea = EA_AY_AI_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AY_AI_16(m68000_base_device *m68k) {UINT32 ea = EA_AY_AI_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AY_AI_32(m68000_base_device *m68k) {UINT32 ea = EA_AY_AI_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AY_PI_8(m68000_base_device *m68k) {UINT32 ea = EA_AY_PI_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AY_PI_16(m68000_base_device *m68k) {UINT32 ea = EA_AY_PI_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AY_PI_32(m68000_base_device *m68k) {UINT32 ea = EA_AY_PI_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AY_PD_8(m68000_base_device *m68k) {UINT32 ea = EA_AY_PD_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AY_PD_16(m68000_base_device *m68k) {UINT32 ea = EA_AY_PD_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AY_PD_32(m68000_base_device *m68k) {UINT32 ea = EA_AY_PD_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AY_DI_8(m68000_base_device *m68k) {UINT32 ea = EA_AY_DI_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AY_DI_16(m68000_base_device *m68k) {UINT32 ea = EA_AY_DI_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AY_DI_32(m68000_base_device *m68k) {UINT32 ea = EA_AY_DI_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AY_IX_8(m68000_base_device *m68k) {UINT32 ea = EA_AY_IX_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AY_IX_16(m68000_base_device *m68k) {UINT32 ea = EA_AY_IX_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AY_IX_32(m68000_base_device *m68k) {UINT32 ea = EA_AY_IX_32(m68k); return m68ki_read_32(m68k, ea);}
-
-static inline UINT32 OPER_AX_AI_8(m68000_base_device *m68k) {UINT32 ea = EA_AX_AI_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AX_AI_16(m68000_base_device *m68k) {UINT32 ea = EA_AX_AI_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AX_AI_32(m68000_base_device *m68k) {UINT32 ea = EA_AX_AI_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AX_PI_8(m68000_base_device *m68k) {UINT32 ea = EA_AX_PI_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AX_PI_16(m68000_base_device *m68k) {UINT32 ea = EA_AX_PI_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AX_PI_32(m68000_base_device *m68k) {UINT32 ea = EA_AX_PI_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AX_PD_8(m68000_base_device *m68k) {UINT32 ea = EA_AX_PD_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AX_PD_16(m68000_base_device *m68k) {UINT32 ea = EA_AX_PD_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AX_PD_32(m68000_base_device *m68k) {UINT32 ea = EA_AX_PD_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AX_DI_8(m68000_base_device *m68k) {UINT32 ea = EA_AX_DI_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AX_DI_16(m68000_base_device *m68k) {UINT32 ea = EA_AX_DI_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AX_DI_32(m68000_base_device *m68k) {UINT32 ea = EA_AX_DI_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AX_IX_8(m68000_base_device *m68k) {UINT32 ea = EA_AX_IX_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AX_IX_16(m68000_base_device *m68k) {UINT32 ea = EA_AX_IX_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AX_IX_32(m68000_base_device *m68k) {UINT32 ea = EA_AX_IX_32(m68k); return m68ki_read_32(m68k, ea);}
-
-static inline UINT32 OPER_A7_PI_8(m68000_base_device *m68k) {UINT32 ea = EA_A7_PI_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_A7_PD_8(m68000_base_device *m68k) {UINT32 ea = EA_A7_PD_8(m68k); return m68ki_read_8(m68k, ea); }
-
-static inline UINT32 OPER_AW_8(m68000_base_device *m68k) {UINT32 ea = EA_AW_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AW_16(m68000_base_device *m68k) {UINT32 ea = EA_AW_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AW_32(m68000_base_device *m68k) {UINT32 ea = EA_AW_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_AL_8(m68000_base_device *m68k) {UINT32 ea = EA_AL_8(m68k); return m68ki_read_8(m68k, ea); }
-static inline UINT32 OPER_AL_16(m68000_base_device *m68k) {UINT32 ea = EA_AL_16(m68k); return m68ki_read_16(m68k, ea);}
-static inline UINT32 OPER_AL_32(m68000_base_device *m68k) {UINT32 ea = EA_AL_32(m68k); return m68ki_read_32(m68k, ea);}
-static inline UINT32 OPER_PCDI_8(m68000_base_device *m68k) {UINT32 ea = EA_PCDI_8(m68k); return m68ki_read_pcrel_8(m68k, ea); }
-static inline UINT32 OPER_PCDI_16(m68000_base_device *m68k) {UINT32 ea = EA_PCDI_16(m68k); return m68ki_read_pcrel_16(m68k, ea);}
-static inline UINT32 OPER_PCDI_32(m68000_base_device *m68k) {UINT32 ea = EA_PCDI_32(m68k); return m68ki_read_pcrel_32(m68k, ea);}
-static inline UINT32 OPER_PCIX_8(m68000_base_device *m68k) {UINT32 ea = EA_PCIX_8(m68k); return m68ki_read_pcrel_8(m68k, ea); }
-static inline UINT32 OPER_PCIX_16(m68000_base_device *m68k) {UINT32 ea = EA_PCIX_16(m68k); return m68ki_read_pcrel_16(m68k, ea);}
-static inline UINT32 OPER_PCIX_32(m68000_base_device *m68k) {UINT32 ea = EA_PCIX_32(m68k); return m68ki_read_pcrel_32(m68k, ea);}
+static inline uint32_t OPER_AY_AI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AY_AI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AY_AI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_AI_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AY_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AY_PI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AY_PI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_PI_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AY_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AY_PD_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AY_PD_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_PD_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AY_DI_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AY_DI_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AY_DI_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_DI_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AY_IX_8(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AY_IX_16(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AY_IX_32(m68000_base_device *m68k) {uint32_t ea = EA_AY_IX_32(m68k); return m68ki_read_32(m68k, ea);}
+
+static inline uint32_t OPER_AX_AI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AX_AI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AX_AI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_AI_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AX_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AX_PI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AX_PI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_PI_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AX_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AX_PD_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AX_PD_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_PD_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AX_DI_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AX_DI_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AX_DI_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_DI_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AX_IX_8(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AX_IX_16(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AX_IX_32(m68000_base_device *m68k) {uint32_t ea = EA_AX_IX_32(m68k); return m68ki_read_32(m68k, ea);}
+
+static inline uint32_t OPER_A7_PI_8(m68000_base_device *m68k) {uint32_t ea = EA_A7_PI_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_A7_PD_8(m68000_base_device *m68k) {uint32_t ea = EA_A7_PD_8(m68k); return m68ki_read_8(m68k, ea); }
+
+static inline uint32_t OPER_AW_8(m68000_base_device *m68k) {uint32_t ea = EA_AW_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AW_16(m68000_base_device *m68k) {uint32_t ea = EA_AW_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AW_32(m68000_base_device *m68k) {uint32_t ea = EA_AW_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_AL_8(m68000_base_device *m68k) {uint32_t ea = EA_AL_8(m68k); return m68ki_read_8(m68k, ea); }
+static inline uint32_t OPER_AL_16(m68000_base_device *m68k) {uint32_t ea = EA_AL_16(m68k); return m68ki_read_16(m68k, ea);}
+static inline uint32_t OPER_AL_32(m68000_base_device *m68k) {uint32_t ea = EA_AL_32(m68k); return m68ki_read_32(m68k, ea);}
+static inline uint32_t OPER_PCDI_8(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_8(m68k); return m68ki_read_pcrel_8(m68k, ea); }
+static inline uint32_t OPER_PCDI_16(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_16(m68k); return m68ki_read_pcrel_16(m68k, ea);}
+static inline uint32_t OPER_PCDI_32(m68000_base_device *m68k) {uint32_t ea = EA_PCDI_32(m68k); return m68ki_read_pcrel_32(m68k, ea);}
+static inline uint32_t OPER_PCIX_8(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_8(m68k); return m68ki_read_pcrel_8(m68k, ea); }
+static inline uint32_t OPER_PCIX_16(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_16(m68k); return m68ki_read_pcrel_16(m68k, ea);}
+static inline uint32_t OPER_PCIX_32(m68000_base_device *m68k) {uint32_t ea = EA_PCIX_32(m68k); return m68ki_read_pcrel_32(m68k, ea);}
/* ---------------------------- Stack Functions --------------------------- */
/* Push/pull data from the stack */
-static inline void m68ki_push_16(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_push_16(m68000_base_device *m68k, uint32_t value)
{
REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 2);
m68ki_write_16(m68k, REG_SP(m68k), value);
}
-static inline void m68ki_push_32(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_push_32(m68000_base_device *m68k, uint32_t value)
{
REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) - 4);
m68ki_write_32(m68k, REG_SP(m68k), value);
}
-static inline UINT32 m68ki_pull_16(m68000_base_device *m68k)
+static inline uint32_t m68ki_pull_16(m68000_base_device *m68k)
{
REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 2);
return m68ki_read_16(m68k, REG_SP(m68k)-2);
}
-static inline UINT32 m68ki_pull_32(m68000_base_device *m68k)
+static inline uint32_t m68ki_pull_32(m68000_base_device *m68k)
{
REG_SP(m68k) = MASK_OUT_ABOVE_32(REG_SP(m68k) + 4);
return m68ki_read_32(m68k, REG_SP(m68k)-4);
@@ -1101,12 +1101,12 @@ static inline void m68ki_fake_pull_32(m68000_base_device *m68k)
* These functions will also call the pc_changed callback if it was enabled
* in m68kconf.h.
*/
-static inline void m68ki_jump(m68000_base_device *m68k, UINT32 new_pc)
+static inline void m68ki_jump(m68000_base_device *m68k, uint32_t new_pc)
{
REG_PC(m68k) = new_pc;
}
-static inline void m68ki_jump_vector(m68000_base_device *m68k, UINT32 vector)
+static inline void m68ki_jump_vector(m68000_base_device *m68k, uint32_t vector)
{
REG_PC(m68k) = (vector<<2) + m68k->vbr;
REG_PC(m68k) = m68ki_read_data_32(m68k, REG_PC(m68k));
@@ -1118,17 +1118,17 @@ static inline void m68ki_jump_vector(m68000_base_device *m68k, UINT32 vector)
* So far I've found no problems with not calling pc_changed for 8 or 16
* bit branches.
*/
-static inline void m68ki_branch_8(m68000_base_device *m68k, UINT32 offset)
+static inline void m68ki_branch_8(m68000_base_device *m68k, uint32_t offset)
{
REG_PC(m68k) += MAKE_INT_8(offset);
}
-static inline void m68ki_branch_16(m68000_base_device *m68k, UINT32 offset)
+static inline void m68ki_branch_16(m68000_base_device *m68k, uint32_t offset)
{
REG_PC(m68k) += MAKE_INT_16(offset);
}
-static inline void m68ki_branch_32(m68000_base_device *m68k, UINT32 offset)
+static inline void m68ki_branch_32(m68000_base_device *m68k, uint32_t offset)
{
REG_PC(m68k) += offset;
}
@@ -1140,7 +1140,7 @@ static inline void m68ki_branch_32(m68000_base_device *m68k, UINT32 offset)
/* Set the S flag and change the active stack pointer.
* Note that value MUST be 4 or 0.
*/
-static inline void m68ki_set_s_flag(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_set_s_flag(m68000_base_device *m68k, uint32_t value)
{
/* Backup the old stack pointer */
REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)] = REG_SP(m68k);
@@ -1153,7 +1153,7 @@ static inline void m68ki_set_s_flag(m68000_base_device *m68k, UINT32 value)
/* Set the S and M flags and change the active stack pointer.
* Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
*/
-static inline void m68ki_set_sm_flag(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_set_sm_flag(m68000_base_device *m68k, uint32_t value)
{
/* Backup the old stack pointer */
REG_SP_BASE(m68k)[m68k->s_flag | ((m68k->s_flag>>1) & m68k->m_flag)] = REG_SP(m68k);
@@ -1165,7 +1165,7 @@ static inline void m68ki_set_sm_flag(m68000_base_device *m68k, UINT32 value)
}
/* Set the S and M flags. Don't touch the stack pointer. */
-static inline void m68ki_set_sm_flag_nosp(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_set_sm_flag_nosp(m68000_base_device *m68k, uint32_t value)
{
/* Set the S and M flags */
m68k->s_flag = value & SFLAG_SET;
@@ -1174,7 +1174,7 @@ static inline void m68ki_set_sm_flag_nosp(m68000_base_device *m68k, UINT32 value
/* Set the condition code register */
-static inline void m68ki_set_ccr(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_set_ccr(m68000_base_device *m68k, uint32_t value)
{
m68k->x_flag = BIT_4(value) << 4;
m68k->n_flag = BIT_3(value) << 4;
@@ -1184,7 +1184,7 @@ static inline void m68ki_set_ccr(m68000_base_device *m68k, UINT32 value)
}
/* Set the status register but don't check for interrupts */
-static inline void m68ki_set_sr_noint(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_set_sr_noint(m68000_base_device *m68k, uint32_t value)
{
/* Mask out the "unimplemented" bits */
value &= m68k->sr_mask;
@@ -1200,7 +1200,7 @@ static inline void m68ki_set_sr_noint(m68000_base_device *m68k, UINT32 value)
/* Set the status register but don't check for interrupts nor
* change the stack pointer
*/
-static inline void m68ki_set_sr_noint_nosp(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_set_sr_noint_nosp(m68000_base_device *m68k, uint32_t value)
{
/* Mask out the "unimplemented" bits */
value &= m68k->sr_mask;
@@ -1214,7 +1214,7 @@ static inline void m68ki_set_sr_noint_nosp(m68000_base_device *m68k, UINT32 valu
}
/* Set the status register and check for interrupts */
-static inline void m68ki_set_sr(m68000_base_device *m68k, UINT32 value)
+static inline void m68ki_set_sr(m68000_base_device *m68k, uint32_t value)
{
m68ki_set_sr_noint(m68k, value);
m68ki_check_interrupts(m68k);
@@ -1224,10 +1224,10 @@ static inline void m68ki_set_sr(m68000_base_device *m68k, UINT32 value)
/* ------------------------- Exception Processing ------------------------- */
/* Initiate exception processing */
-static inline UINT32 m68ki_init_exception(m68000_base_device *m68k)
+static inline uint32_t m68ki_init_exception(m68000_base_device *m68k)
{
/* Save the old status register */
- UINT32 sr = m68ki_get_sr(m68k);
+ uint32_t sr = m68ki_get_sr(m68k);
/* Turn off trace flag, clear pending traces */
m68k->t1_flag = m68k->t0_flag = 0;
@@ -1239,7 +1239,7 @@ static inline UINT32 m68ki_init_exception(m68000_base_device *m68k)
}
/* 3 word stack frame (68000 only) */
-static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, UINT32 pc, UINT32 sr)
+static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, uint32_t pc, uint32_t sr)
{
m68ki_push_32(m68k, pc);
m68ki_push_16(m68k, sr);
@@ -1248,7 +1248,7 @@ static inline void m68ki_stack_frame_3word(m68000_base_device *m68k, UINT32 pc,
/* Format 0 stack frame.
* This is the standard stack frame for 68010+.
*/
-static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, UINT32 pc, UINT32 sr, UINT32 vector)
+static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector)
{
/* Stack a 3-word frame if we are 68000 */
if(m68k->cpu_type == CPU_TYPE_000 || m68k->cpu_type == CPU_TYPE_008)
@@ -1264,7 +1264,7 @@ static inline void m68ki_stack_frame_0000(m68000_base_device *m68k, UINT32 pc, U
/* Format 1 stack frame (68020).
* For 68020, this is the 4 word throwaway frame.
*/
-static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, UINT32 pc, UINT32 sr, UINT32 vector)
+static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector)
{
m68ki_push_16(m68k, 0x1000 | (vector<<2));
m68ki_push_32(m68k, pc);
@@ -1274,7 +1274,7 @@ static inline void m68ki_stack_frame_0001(m68000_base_device *m68k, UINT32 pc, U
/* Format 2 stack frame.
* This is used only by 68020 for trap exceptions.
*/
-static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, UINT32 sr, UINT32 vector)
+static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, uint32_t sr, uint32_t vector)
{
m68ki_push_32(m68k, REG_PPC(m68k));
m68ki_push_16(m68k, 0x2000 | (vector<<2));
@@ -1285,7 +1285,7 @@ static inline void m68ki_stack_frame_0010(m68000_base_device *m68k, UINT32 sr, U
/* Bus error stack frame (68000 only).
*/
-static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, UINT32 sr)
+static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, uint32_t sr)
{
m68ki_push_32(m68k, REG_PC(m68k));
m68ki_push_16(m68k, sr);
@@ -1302,7 +1302,7 @@ static inline void m68ki_stack_frame_buserr(m68000_base_device *m68k, UINT32 sr)
/* Format 8 stack frame (68010).
* 68010 only. This is the 29 word bus/address error frame.
*/
-static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, UINT32 pc, UINT32 sr, UINT32 vector)
+static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, uint32_t pc, uint32_t sr, uint32_t vector)
{
/* VERSION
* NUMBER
@@ -1356,7 +1356,7 @@ static inline void m68ki_stack_frame_1000(m68000_base_device *m68k, UINT32 pc, U
* if the error happens at an instruction boundary.
* PC stacked is address of next instruction.
*/
-static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address)
+static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address)
{
int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
int orig_fc = m68k->mmu_tmp_buserror_fc;
@@ -1408,7 +1408,7 @@ static inline void m68ki_stack_frame_1010(m68000_base_device *m68k, UINT32 sr, U
* if the error happens during instruction execution.
* PC stacked is address of instruction in progress.
*/
-static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address)
+static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address)
{
int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
int orig_fc = m68k->mmu_tmp_buserror_fc;
@@ -1482,7 +1482,7 @@ static inline void m68ki_stack_frame_1011(m68000_base_device *m68k, UINT32 sr, U
* This is used by the 68040 for bus fault and mmu trap
* 30 words
*/
-static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address, bool in_mmu)
+static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, uint32_t sr, uint32_t vector, uint32_t pc, uint32_t fault_address, bool in_mmu)
{
int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
int orig_fc = m68k->mmu_tmp_buserror_fc;
@@ -1525,9 +1525,9 @@ static inline void m68ki_stack_frame_0111(m68000_base_device *m68k, UINT32 sr, U
/* Used for Group 2 exceptions.
* These stack a type 2 frame on the 020.
*/
-static inline void m68ki_exception_trap(m68000_base_device *m68k, UINT32 vector)
+static inline void m68ki_exception_trap(m68000_base_device *m68k, uint32_t vector)
{
- UINT32 sr = m68ki_init_exception(m68k);
+ uint32_t sr = m68ki_init_exception(m68k);
if(CPU_TYPE_IS_010_LESS(m68k->cpu_type))
m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, vector);
@@ -1541,9 +1541,9 @@ static inline void m68ki_exception_trap(m68000_base_device *m68k, UINT32 vector)
}
/* Trap#n stacks a 0 frame but behaves like group2 otherwise */
-static inline void m68ki_exception_trapN(m68000_base_device *m68k, UINT32 vector)
+static inline void m68ki_exception_trapN(m68000_base_device *m68k, uint32_t vector)
{
- UINT32 sr = m68ki_init_exception(m68k);
+ uint32_t sr = m68ki_init_exception(m68k);
m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, vector);
m68ki_jump_vector(m68k, vector);
@@ -1554,7 +1554,7 @@ static inline void m68ki_exception_trapN(m68000_base_device *m68k, UINT32 vector
/* Exception for trace mode */
static inline void m68ki_exception_trace(m68000_base_device *m68k)
{
- UINT32 sr = m68ki_init_exception(m68k);
+ uint32_t sr = m68ki_init_exception(m68k);
if(CPU_TYPE_IS_010_LESS(m68k->cpu_type))
{
@@ -1579,7 +1579,7 @@ static inline void m68ki_exception_trace(m68000_base_device *m68k)
/* Exception for privilege violation */
static inline void m68ki_exception_privilege_violation(m68000_base_device *m68k)
{
- UINT32 sr = m68ki_init_exception(m68k);
+ uint32_t sr = m68ki_init_exception(m68k);
if(CPU_TYPE_IS_000(m68k->cpu_type))
{
@@ -1596,7 +1596,7 @@ static inline void m68ki_exception_privilege_violation(m68000_base_device *m68k)
/* Exception for A-Line instructions */
static inline void m68ki_exception_1010(m68000_base_device *m68k)
{
- UINT32 sr;
+ uint32_t sr;
sr = m68ki_init_exception(m68k);
m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_1010);
@@ -1609,7 +1609,7 @@ static inline void m68ki_exception_1010(m68000_base_device *m68k)
/* Exception for F-Line instructions */
static inline void m68ki_exception_1111(m68000_base_device *m68k)
{
- UINT32 sr;
+ uint32_t sr;
sr = m68ki_init_exception(m68k);
m68ki_stack_frame_0000(m68k, REG_PPC(m68k), sr, EXCEPTION_1111);
@@ -1622,7 +1622,7 @@ static inline void m68ki_exception_1111(m68000_base_device *m68k)
/* Exception for illegal instructions */
static inline void m68ki_exception_illegal(m68000_base_device *m68k)
{
- UINT32 sr;
+ uint32_t sr;
sr = m68ki_init_exception(m68k);
@@ -1641,7 +1641,7 @@ static inline void m68ki_exception_illegal(m68000_base_device *m68k)
/* Exception for format errror in RTE */
static inline void m68ki_exception_format_error(m68000_base_device *m68k)
{
- UINT32 sr = m68ki_init_exception(m68k);
+ uint32_t sr = m68ki_init_exception(m68k);
m68ki_stack_frame_0000(m68k, REG_PC(m68k), sr, EXCEPTION_FORMAT_ERROR);
m68ki_jump_vector(m68k, EXCEPTION_FORMAT_ERROR);
@@ -1652,7 +1652,7 @@ static inline void m68ki_exception_format_error(m68000_base_device *m68k)
/* Exception for address error */
static inline void m68ki_exception_address_error(m68000_base_device *m68k)
{
- UINT32 sr = m68ki_init_exception(m68k);
+ uint32_t sr = m68ki_init_exception(m68k);
/* If we were processing a bus error, address error, or reset,
* this is a catastrophic failure.
diff --git a/src/devices/cpu/m68000/m68kdasm.cpp b/src/devices/cpu/m68000/m68kdasm.cpp
index c48d128bc40..8f9e9987cb8 100644
--- a/src/devices/cpu/m68000/m68kdasm.cpp
+++ b/src/devices/cpu/m68000/m68kdasm.cpp
@@ -31,8 +31,8 @@
/* ======================================================================== */
/* unsigned int and int must be at least 32 bits wide */
-#undef UINT32
-#define UINT32 unsigned int
+#undef uint32_t
+#define uint32_t unsigned int
/* Bit Isolation Functions */
#define BIT_0(A) ((A) & 0x00000001)
@@ -127,14 +127,14 @@
/* ======================================================================== */
/* Read data at the PC and increment PC */
-UINT32 read_imm_8(void);
-UINT32 read_imm_16(void);
-UINT32 read_imm_32(void);
+uint32_t read_imm_8(void);
+uint32_t read_imm_16(void);
+uint32_t read_imm_32(void);
/* Read data at the PC but don't imcrement the PC */
-UINT32 peek_imm_8(void);
-UINT32 peek_imm_16(void);
-UINT32 peek_imm_32(void);
+uint32_t peek_imm_8(void);
+uint32_t peek_imm_16(void);
+uint32_t peek_imm_32(void);
/* make signed integers 100% portably */
static int make_int_8(int value);
@@ -142,20 +142,20 @@ static int make_int_16(int value);
static int make_int_32(int value);
/* make a string of a hex value */
-static char* make_signed_hex_str_8(UINT32 val);
-static char* make_signed_hex_str_16(UINT32 val);
-static char* make_signed_hex_str_32(UINT32 val);
+static char* make_signed_hex_str_8(uint32_t val);
+static char* make_signed_hex_str_16(uint32_t val);
+static char* make_signed_hex_str_32(uint32_t val);
/* make string of ea mode */
-static char* get_ea_mode_str(UINT32 instruction, UINT32 size);
+static char* get_ea_mode_str(uint32_t instruction, uint32_t size);
-char* get_ea_mode_str_8(UINT32 instruction);
-char* get_ea_mode_str_16(UINT32 instruction);
-char* get_ea_mode_str_32(UINT32 instruction);
+char* get_ea_mode_str_8(uint32_t instruction);
+char* get_ea_mode_str_16(uint32_t instruction);
+char* get_ea_mode_str_32(uint32_t instruction);
/* make string of immediate value */
-static char* get_imm_str_s(UINT32 size);
-static char* get_imm_str_u(UINT32 size);
+static char* get_imm_str_s(uint32_t size);
+static char* get_imm_str_u(uint32_t size);
char* get_imm_str_s8(void);
char* get_imm_str_s16(void);
@@ -163,16 +163,16 @@ char* get_imm_str_s32(void);
/* Stuff to build the opcode handler jump table */
static void build_opcode_table(void);
-static int valid_ea(UINT32 opcode, UINT32 mask);
+static int valid_ea(uint32_t opcode, uint32_t mask);
static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);
/* used to build opcode handler jump table */
struct opcode_struct
{
void (*opcode_handler)(void); /* handler function */
- UINT32 mask; /* mask on opcode */
- UINT32 match; /* what to match after masking */
- UINT32 ea_mask; /* what ea modes are allowed */
+ uint32_t mask; /* mask on opcode */
+ uint32_t match; /* what to match after masking */
+ uint32_t ea_mask; /* what ea modes are allowed */
};
@@ -188,17 +188,17 @@ static int g_initialized = 0;
static char g_dasm_str[100]; /* string to hold disassembly */
static char g_helper_str[100]; /* string to hold helpful info */
-static UINT32 g_cpu_pc; /* program counter */
-static UINT32 g_cpu_ir; /* instruction register */
-static UINT32 g_cpu_type;
-static UINT32 g_opcode_type;
+static uint32_t g_cpu_pc; /* program counter */
+static uint32_t g_cpu_ir; /* instruction register */
+static uint32_t g_cpu_type;
+static uint32_t g_opcode_type;
static const unsigned char* g_rawop;
-static UINT32 g_rawbasepc;
+static uint32_t g_rawbasepc;
/* used by ops like asr, ror, addq, etc */
-static const UINT32 g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
+static const uint32_t g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
-static const UINT32 g_5bit_data_table[32] =
+static const uint32_t g_5bit_data_table[32] =
{
32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
@@ -243,26 +243,26 @@ static const char *const g_mmucond[16] =
return; \
}
-static UINT32 dasm_read_imm_8(UINT32 advance)
+static uint32_t dasm_read_imm_8(uint32_t advance)
{
- UINT32 result;
+ uint32_t result;
result = g_rawop[g_cpu_pc + 1 - g_rawbasepc];
g_cpu_pc += advance;
return result;
}
-static UINT32 dasm_read_imm_16(UINT32 advance)
+static uint32_t dasm_read_imm_16(uint32_t advance)
{
- UINT32 result;
+ uint32_t result;
result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) |
g_rawop[g_cpu_pc + 1 - g_rawbasepc];
g_cpu_pc += advance;
return result;
}
-static UINT32 dasm_read_imm_32(UINT32 advance)
+static uint32_t dasm_read_imm_32(uint32_t advance)
{
- UINT32 result;
+ uint32_t result;
result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) |
(g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) |
(g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |
@@ -315,7 +315,7 @@ static int make_int_32(int value)
}
/* Get string representation of hex values */
-static char* make_signed_hex_str_8(UINT32 val)
+static char* make_signed_hex_str_8(uint32_t val)
{
static char str[20];
@@ -331,7 +331,7 @@ static char* make_signed_hex_str_8(UINT32 val)
return str;
}
-static char* make_signed_hex_str_16(UINT32 val)
+static char* make_signed_hex_str_16(uint32_t val)
{
static char str[20];
@@ -347,7 +347,7 @@ static char* make_signed_hex_str_16(UINT32 val)
return str;
}
-static char* make_signed_hex_str_32(UINT32 val)
+static char* make_signed_hex_str_32(uint32_t val)
{
static char str[20];
@@ -365,7 +365,7 @@ static char* make_signed_hex_str_32(UINT32 val)
/* make string of immediate value */
-static char* get_imm_str_s(UINT32 size)
+static char* get_imm_str_s(uint32_t size)
{
static char str[15];
if(size == 0)
@@ -377,7 +377,7 @@ static char* get_imm_str_s(UINT32 size)
return str;
}
-static char* get_imm_str_u(UINT32 size)
+static char* get_imm_str_u(uint32_t size)
{
static char str[15];
if(size == 0)
@@ -390,20 +390,20 @@ static char* get_imm_str_u(UINT32 size)
}
/* Make string of effective address mode */
-static char* get_ea_mode_str(UINT32 instruction, UINT32 size)
+static char* get_ea_mode_str(uint32_t instruction, uint32_t size)
{
static char b1[64];
static char b2[64];
static char* mode = b2;
- UINT32 extension;
- UINT32 base;
- UINT32 outer;
+ uint32_t extension;
+ uint32_t base;
+ uint32_t outer;
char base_reg[4];
char index_reg[8];
- UINT32 preindex;
- UINT32 postindex;
- UINT32 comma = 0;
- UINT32 temp_value;
+ uint32_t preindex;
+ uint32_t postindex;
+ uint32_t comma = 0;
+ uint32_t temp_value;
char invalid_mode = 0;
/* Switch buffers so we don't clobber on a double-call to this function */
@@ -953,19 +953,19 @@ static void d68000_asl_ea(void)
static void d68000_bcc_8(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));
}
static void d68000_bcc_16(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));
}
static void d68020_bcc_32(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
LIMIT_CPU_TYPES(M68020_PLUS);
sprintf(g_dasm_str, "b%-2s $%x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());
}
@@ -1000,7 +1000,7 @@ static void d68010_bkpt(void)
static void d68020_bfchg(void)
{
- UINT32 extension;
+ uint32_t extension;
char offset[3];
char width[3];
@@ -1021,7 +1021,7 @@ static void d68020_bfchg(void)
static void d68020_bfclr(void)
{
- UINT32 extension;
+ uint32_t extension;
char offset[3];
char width[3];
@@ -1042,7 +1042,7 @@ static void d68020_bfclr(void)
static void d68020_bfexts(void)
{
- UINT32 extension;
+ uint32_t extension;
char offset[3];
char width[3];
@@ -1063,7 +1063,7 @@ static void d68020_bfexts(void)
static void d68020_bfextu(void)
{
- UINT32 extension;
+ uint32_t extension;
char offset[3];
char width[3];
@@ -1084,7 +1084,7 @@ static void d68020_bfextu(void)
static void d68020_bfffo(void)
{
- UINT32 extension;
+ uint32_t extension;
char offset[3];
char width[3];
@@ -1105,7 +1105,7 @@ static void d68020_bfffo(void)
static void d68020_bfins(void)
{
- UINT32 extension;
+ uint32_t extension;
char offset[3];
char width[3];
@@ -1126,7 +1126,7 @@ static void d68020_bfins(void)
static void d68020_bfset(void)
{
- UINT32 extension;
+ uint32_t extension;
char offset[3];
char width[3];
@@ -1147,7 +1147,7 @@ static void d68020_bfset(void)
static void d68020_bftst(void)
{
- UINT32 extension;
+ uint32_t extension;
char offset[3];
char width[3];
@@ -1168,19 +1168,19 @@ static void d68020_bftst(void)
static void d68000_bra_8(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_8(g_cpu_ir));
}
static void d68000_bra_16(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_16(read_imm_16()));
}
static void d68020_bra_32(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
LIMIT_CPU_TYPES(M68020_PLUS);
sprintf(g_dasm_str, "bra $%x; (2+)", temp_pc + read_imm_32());
}
@@ -1198,21 +1198,21 @@ static void d68000_bset_s(void)
static void d68000_bsr_8(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_8(g_cpu_ir));
SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
}
static void d68000_bsr_16(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_16(read_imm_16()));
SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
}
static void d68020_bsr_32(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
LIMIT_CPU_TYPES(M68020_PLUS);
sprintf(g_dasm_str, "bsr $%x; (2+)", temp_pc + read_imm_32());
SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
@@ -1240,7 +1240,7 @@ static void d68020_callm(void)
static void d68020_cas_8(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
sprintf(g_dasm_str, "cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir));
@@ -1248,7 +1248,7 @@ static void d68020_cas_8(void)
static void d68020_cas_16(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
sprintf(g_dasm_str, "cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir));
@@ -1256,7 +1256,7 @@ static void d68020_cas_16(void)
static void d68020_cas_32(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
sprintf(g_dasm_str, "cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir));
@@ -1270,7 +1270,7 @@ f e d c b a 9 8 7 6 5 4 3 2 1 0
DARn2 0 0 0 Du2 0 0 0 Dc2
*/
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_32();
sprintf(g_dasm_str, "cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
@@ -1281,7 +1281,7 @@ f e d c b a 9 8 7 6 5 4 3 2 1 0
static void d68020_cas2_32(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_32();
sprintf(g_dasm_str, "cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
@@ -1305,7 +1305,7 @@ static void d68020_chk_32(void)
static void d68020_chk2_cmp2_8(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
sprintf(g_dasm_str, "%s.b %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
@@ -1313,7 +1313,7 @@ static void d68020_chk2_cmp2_8(void)
static void d68020_chk2_cmp2_16(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
sprintf(g_dasm_str, "%s.w %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
@@ -1321,7 +1321,7 @@ static void d68020_chk2_cmp2_16(void)
static void d68020_chk2_cmp2_32(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
sprintf(g_dasm_str, "%s.l %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
@@ -1475,8 +1475,8 @@ static void d68000_cmpm_32(void)
static void d68020_cpbcc_16(void)
{
- UINT32 extension;
- UINT32 new_pc = g_cpu_pc;
+ uint32_t extension;
+ uint32_t new_pc = g_cpu_pc;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
new_pc += make_int_16(read_imm_16());
@@ -1485,8 +1485,8 @@ static void d68020_cpbcc_16(void)
static void d68020_cpbcc_32(void)
{
- UINT32 extension;
- UINT32 new_pc = g_cpu_pc;
+ uint32_t extension;
+ uint32_t new_pc = g_cpu_pc;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
new_pc += read_imm_32();
@@ -1495,9 +1495,9 @@ static void d68020_cpbcc_32(void)
static void d68020_cpdbcc(void)
{
- UINT32 extension1;
- UINT32 extension2;
- UINT32 new_pc = g_cpu_pc;
+ uint32_t extension1;
+ uint32_t extension2;
+ uint32_t new_pc = g_cpu_pc;
LIMIT_CPU_TYPES(M68020_PLUS);
extension1 = read_imm_16();
extension2 = read_imm_16();
@@ -1539,8 +1539,8 @@ static void d68020_cpsave(void)
static void d68020_cpscc(void)
{
- UINT32 extension1;
- UINT32 extension2;
+ uint32_t extension1;
+ uint32_t extension2;
LIMIT_CPU_TYPES(M68020_PLUS);
extension1 = read_imm_16();
extension2 = read_imm_16();
@@ -1549,8 +1549,8 @@ static void d68020_cpscc(void)
static void d68020_cptrapcc_0(void)
{
- UINT32 extension1;
- UINT32 extension2;
+ uint32_t extension1;
+ uint32_t extension2;
LIMIT_CPU_TYPES(M68020_PLUS);
extension1 = read_imm_16();
extension2 = read_imm_16();
@@ -1559,8 +1559,8 @@ static void d68020_cptrapcc_0(void)
static void d68020_cptrapcc_16(void)
{
- UINT32 extension1;
- UINT32 extension2;
+ uint32_t extension1;
+ uint32_t extension2;
LIMIT_CPU_TYPES(M68020_PLUS);
extension1 = read_imm_16();
extension2 = read_imm_16();
@@ -1569,8 +1569,8 @@ static void d68020_cptrapcc_16(void)
static void d68020_cptrapcc_32(void)
{
- UINT32 extension1;
- UINT32 extension2;
+ uint32_t extension1;
+ uint32_t extension2;
LIMIT_CPU_TYPES(M68020_PLUS);
extension1 = read_imm_16();
extension2 = read_imm_16();
@@ -1601,14 +1601,14 @@ static void d68040_cpush(void)
static void d68000_dbra(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "dbra D%d, $%x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
}
static void d68000_dbcc(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "db%-2s D%d, $%x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
}
@@ -1625,7 +1625,7 @@ static void d68000_divu(void)
static void d68020_divl(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
@@ -1713,8 +1713,8 @@ static void d68020_extb_32(void)
static void d68881_ftrap(void)
{
- UINT16 w2, w3;
- UINT32 l2;
+ uint16_t w2, w3;
+ uint32_t l2;
LIMIT_CPU_TYPES(M68020_PLUS);
w2 = read_imm_16();
@@ -1745,7 +1745,7 @@ static void d68040_fpu(void)
};
char mnemonic[40];
- UINT32 w2, src, dst_reg;
+ uint32_t w2, src, dst_reg;
LIMIT_CPU_TYPES(M68020_PLUS);
w2 = read_imm_16();
@@ -2108,7 +2108,7 @@ static void d68000_move_to_usp(void)
static void d68010_movec(void)
{
- UINT32 extension;
+ uint32_t extension;
const char* reg_name;
const char* processor;
LIMIT_CPU_TYPES(M68010_PLUS);
@@ -2257,11 +2257,11 @@ static void d68010_movec(void)
static void d68000_movem_pd_16(void)
{
- UINT32 data = read_imm_16();
+ uint32_t data = read_imm_16();
char buffer[40];
- UINT32 first;
- UINT32 run_length;
- UINT32 i;
+ uint32_t first;
+ uint32_t run_length;
+ uint32_t i;
buffer[0] = 0;
for(i=0;i<8;i++)
@@ -2305,11 +2305,11 @@ static void d68000_movem_pd_16(void)
static void d68000_movem_pd_32(void)
{
- UINT32 data = read_imm_16();
+ uint32_t data = read_imm_16();
char buffer[40];
- UINT32 first;
- UINT32 run_length;
- UINT32 i;
+ uint32_t first;
+ uint32_t run_length;
+ uint32_t i;
buffer[0] = 0;
for(i=0;i<8;i++)
@@ -2353,11 +2353,11 @@ static void d68000_movem_pd_32(void)
static void d68000_movem_er_16(void)
{
- UINT32 data = read_imm_16();
+ uint32_t data = read_imm_16();
char buffer[40];
- UINT32 first;
- UINT32 run_length;
- UINT32 i;
+ uint32_t first;
+ uint32_t run_length;
+ uint32_t i;
buffer[0] = 0;
for(i=0;i<8;i++)
@@ -2401,11 +2401,11 @@ static void d68000_movem_er_16(void)
static void d68000_movem_er_32(void)
{
- UINT32 data = read_imm_16();
+ uint32_t data = read_imm_16();
char buffer[40];
- UINT32 first;
- UINT32 run_length;
- UINT32 i;
+ uint32_t first;
+ uint32_t run_length;
+ uint32_t i;
buffer[0] = 0;
for(i=0;i<8;i++)
@@ -2449,11 +2449,11 @@ static void d68000_movem_er_32(void)
static void d68000_movem_re_16(void)
{
- UINT32 data = read_imm_16();
+ uint32_t data = read_imm_16();
char buffer[40];
- UINT32 first;
- UINT32 run_length;
- UINT32 i;
+ uint32_t first;
+ uint32_t run_length;
+ uint32_t i;
buffer[0] = 0;
for(i=0;i<8;i++)
@@ -2497,11 +2497,11 @@ static void d68000_movem_re_16(void)
static void d68000_movem_re_32(void)
{
- UINT32 data = read_imm_16();
+ uint32_t data = read_imm_16();
char buffer[40];
- UINT32 first;
- UINT32 run_length;
- UINT32 i;
+ uint32_t first;
+ uint32_t run_length;
+ uint32_t i;
buffer[0] = 0;
for(i=0;i<8;i++)
@@ -2565,7 +2565,7 @@ static void d68000_movep_er_32(void)
static void d68010_moves_8(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68010_PLUS);
extension = read_imm_16();
if(BIT_B(extension))
@@ -2576,7 +2576,7 @@ static void d68010_moves_8(void)
static void d68010_moves_16(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68010_PLUS);
extension = read_imm_16();
if(BIT_B(extension))
@@ -2587,7 +2587,7 @@ static void d68010_moves_16(void)
static void d68010_moves_32(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68010_PLUS);
extension = read_imm_16();
if(BIT_B(extension))
@@ -2643,7 +2643,7 @@ static void d68000_mulu(void)
static void d68020_mull(void)
{
- UINT32 extension;
+ uint32_t extension;
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
@@ -3252,7 +3252,7 @@ static void d68020_unpk_mm(void)
static void d68851_p000(void)
{
char* str;
- UINT16 modes = read_imm_16();
+ uint16_t modes = read_imm_16();
// do this after fetching the second PMOVE word so we properly get the 3rd if necessary
str = get_ea_mode_str_32(g_cpu_ir);
@@ -3346,22 +3346,22 @@ static void d68851_p000(void)
static void d68851_pbcc16(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "pb%s %x", g_mmucond[g_cpu_ir&0xf], temp_pc + make_int_16(read_imm_16()));
}
static void d68851_pbcc32(void)
{
- UINT32 temp_pc = g_cpu_pc;
+ uint32_t temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "pb%s %x", g_mmucond[g_cpu_ir&0xf], temp_pc + make_int_32(read_imm_32()));
}
static void d68851_pdbcc(void)
{
- UINT32 temp_pc = g_cpu_pc;
- UINT16 modes = read_imm_16();
+ uint32_t temp_pc = g_cpu_pc;
+ uint16_t modes = read_imm_16();
sprintf(g_dasm_str, "pb%s %x", g_mmucond[modes&0xf], temp_pc + make_int_16(read_imm_16()));
}
@@ -3376,16 +3376,16 @@ static void d68851_p001(void)
static void d68040_fbcc_16()
{
LIMIT_CPU_TYPES(M68030_PLUS);
- UINT32 temp_pc = g_cpu_pc;
- INT16 disp = make_int_16(read_imm_16());
+ uint32_t temp_pc = g_cpu_pc;
+ int16_t disp = make_int_16(read_imm_16());
sprintf(g_dasm_str, "fb%-s $%x", g_cpcc[g_cpu_ir & 0x3f], temp_pc + disp);
}
static void d68040_fbcc_32()
{
LIMIT_CPU_TYPES(M68030_PLUS);
- UINT32 temp_pc = g_cpu_pc;
- UINT32 disp = read_imm_32();
+ uint32_t temp_pc = g_cpu_pc;
+ uint32_t disp = read_imm_32();
sprintf(g_dasm_str, "fb%-s $%x", g_cpcc[g_cpu_ir & 0x3f], temp_pc + disp);
}
@@ -3723,7 +3723,7 @@ static const opcode_struct g_opcode_info[] =
};
/* Check if opcode is using a valid ea mode */
-static int valid_ea(UINT32 opcode, UINT32 mask)
+static int valid_ea(uint32_t opcode, uint32_t mask)
{
if(mask == 0)
return 1;
@@ -3769,8 +3769,8 @@ static int valid_ea(UINT32 opcode, UINT32 mask)
/* Used by qsort */
static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr)
{
- UINT32 a = ((const opcode_struct*)aptr)->mask;
- UINT32 b = ((const opcode_struct*)bptr)->mask;
+ uint32_t a = ((const opcode_struct*)aptr)->mask;
+ uint32_t b = ((const opcode_struct*)bptr)->mask;
a = ((a & 0xAAAA) >> 1) + (a & 0x5555);
a = ((a & 0xCCCC) >> 2) + (a & 0x3333);
@@ -3788,8 +3788,8 @@ static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr)
/* build the opcode handler jump table */
static void build_opcode_table(void)
{
- UINT32 i;
- UINT32 opcode;
+ uint32_t i;
+ uint32_t opcode;
opcode_struct* ostruct;
opcode_struct opcode_info[ARRAY_LENGTH(g_opcode_info)];
diff --git a/src/devices/cpu/m68000/m68kfpu.hxx b/src/devices/cpu/m68000/m68kfpu.hxx
index 5c0d884311e..9c11acd5fb8 100644
--- a/src/devices/cpu/m68000/m68kfpu.hxx
+++ b/src/devices/cpu/m68000/m68kfpu.hxx
@@ -17,7 +17,7 @@
extern flag floatx80_is_nan( floatx80 a );
// masks for packed dwords, positive k-factor
-static const UINT32 pkmask2[18] =
+static const uint32_t pkmask2[18] =
{
0xffffffff, 0, 0xf0000000, 0xff000000, 0xfff00000, 0xffff0000,
0xfffff000, 0xffffff00, 0xfffffff0, 0xffffffff,
@@ -25,7 +25,7 @@ static const UINT32 pkmask2[18] =
0xffffffff, 0xffffffff, 0xffffffff
};
-static const UINT32 pkmask3[18] =
+static const uint32_t pkmask3[18] =
{
0xffffffff, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0xf0000000, 0xff000000, 0xfff00000, 0xffff0000,
@@ -34,7 +34,7 @@ static const UINT32 pkmask3[18] =
static inline double fx80_to_double(floatx80 fx)
{
- UINT64 d;
+ uint64_t d;
double *foo;
foo = (double *)&d;
@@ -46,17 +46,17 @@ static inline double fx80_to_double(floatx80 fx)
static inline floatx80 double_to_fx80(double in)
{
- UINT64 *d;
+ uint64_t *d;
- d = (UINT64 *)&in;
+ d = (uint64_t *)&in;
return float64_to_floatx80(*d);
}
-static inline floatx80 load_extended_float80(m68000_base_device *m68k, UINT32 ea)
+static inline floatx80 load_extended_float80(m68000_base_device *m68k, uint32_t ea)
{
- UINT32 d1,d2;
- UINT16 d3;
+ uint32_t d1,d2;
+ uint16_t d3;
floatx80 fp;
d3 = m68ki_read_16(m68k, ea);
@@ -64,12 +64,12 @@ static inline floatx80 load_extended_float80(m68000_base_device *m68k, UINT32 ea
d2 = m68ki_read_32(m68k, ea+8);
fp.high = d3;
- fp.low = ((UINT64)d1<<32) | (d2 & 0xffffffff);
+ fp.low = ((uint64_t)d1<<32) | (d2 & 0xffffffff);
return fp;
}
-static inline void store_extended_float80(m68000_base_device *m68k, UINT32 ea, floatx80 fpr)
+static inline void store_extended_float80(m68000_base_device *m68k, uint32_t ea, floatx80 fpr)
{
m68ki_write_16(m68k, ea+0, fpr.high);
m68ki_write_16(m68k, ea+2, 0);
@@ -77,9 +77,9 @@ static inline void store_extended_float80(m68000_base_device *m68k, UINT32 ea, f
m68ki_write_32(m68k, ea+8, fpr.low&0xffffffff);
}
-static inline floatx80 load_pack_float80(m68000_base_device *m68k, UINT32 ea)
+static inline floatx80 load_pack_float80(m68000_base_device *m68k, uint32_t ea)
{
- UINT32 dw1, dw2, dw3;
+ uint32_t dw1, dw2, dw3;
floatx80 result;
double tmp;
char str[128], *ch;
@@ -128,9 +128,9 @@ static inline floatx80 load_pack_float80(m68000_base_device *m68k, UINT32 ea)
return result;
}
-static inline void store_pack_float80(m68000_base_device *m68k, UINT32 ea, int k, floatx80 fpr)
+static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int k, floatx80 fpr)
{
- UINT32 dw1, dw2, dw3;
+ uint32_t dw1, dw2, dw3;
char str[128], *ch;
int i, j, exp;
@@ -262,9 +262,9 @@ static inline void store_pack_float80(m68000_base_device *m68k, UINT32 ea, int k
static inline void SET_CONDITION_CODES(m68000_base_device *m68k, floatx80 reg)
{
-// UINT64 *regi;
+// uint64_t *regi;
-// regi = (UINT64 *)&reg;
+// regi = (uint64_t *)&reg;
REG_FPSR(m68k) &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN);
@@ -355,7 +355,7 @@ static inline int TEST_CONDITION(m68000_base_device *m68k, int condition)
return r;
}
-static UINT8 READ_EA_8(m68000_base_device *m68k, int ea)
+static uint8_t READ_EA_8(m68000_base_device *m68k, int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -368,27 +368,27 @@ static UINT8 READ_EA_8(m68000_base_device *m68k, int ea)
}
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
return m68ki_read_8(m68k, ea);
}
case 3: // (An)+
{
- UINT32 ea = EA_AY_PI_8(m68k);
+ uint32_t ea = EA_AY_PI_8(m68k);
return m68ki_read_8(m68k, ea);
}
case 4: // -(An)
{
- UINT32 ea = EA_AY_PD_8(m68k);
+ uint32_t ea = EA_AY_PD_8(m68k);
return m68ki_read_8(m68k, ea);
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_8(m68k);
+ uint32_t ea = EA_AY_DI_8(m68k);
return m68ki_read_8(m68k, ea);
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_8(m68k);
+ uint32_t ea = EA_AY_IX_8(m68k);
return m68ki_read_8(m68k, ea);
}
case 7:
@@ -397,24 +397,24 @@ static UINT8 READ_EA_8(m68000_base_device *m68k, int ea)
{
case 0: // (xxx).W
{
- UINT32 ea = (UINT32)OPER_I_16(m68k);
+ uint32_t ea = (uint32_t)OPER_I_16(m68k);
return m68ki_read_8(m68k, ea);
}
case 1: // (xxx).L
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
return m68ki_read_8(m68k, ea);
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_8(m68k);
+ uint32_t ea = EA_PCDI_8(m68k);
return m68ki_read_8(m68k, ea);
}
case 3: // (PC) + (Xn) + d8
{
- UINT32 ea = EA_PCIX_8(m68k);
+ uint32_t ea = EA_PCIX_8(m68k);
return m68ki_read_8(m68k, ea);
}
case 4: // #<data>
@@ -431,7 +431,7 @@ static UINT8 READ_EA_8(m68000_base_device *m68k, int ea)
return 0;
}
-static UINT16 READ_EA_16(m68000_base_device *m68k, int ea)
+static uint16_t READ_EA_16(m68000_base_device *m68k, int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -440,31 +440,31 @@ static UINT16 READ_EA_16(m68000_base_device *m68k, int ea)
{
case 0: // Dn
{
- return (UINT16)(REG_D(m68k)[reg]);
+ return (uint16_t)(REG_D(m68k)[reg]);
}
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
return m68ki_read_16(m68k, ea);
}
case 3: // (An)+
{
- UINT32 ea = EA_AY_PI_16(m68k);
+ uint32_t ea = EA_AY_PI_16(m68k);
return m68ki_read_16(m68k, ea);
}
case 4: // -(An)
{
- UINT32 ea = EA_AY_PD_16(m68k);
+ uint32_t ea = EA_AY_PD_16(m68k);
return m68ki_read_16(m68k, ea);
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_16(m68k);
+ uint32_t ea = EA_AY_DI_16(m68k);
return m68ki_read_16(m68k, ea);
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_16(m68k);
+ uint32_t ea = EA_AY_IX_16(m68k);
return m68ki_read_16(m68k, ea);
}
case 7:
@@ -473,24 +473,24 @@ static UINT16 READ_EA_16(m68000_base_device *m68k, int ea)
{
case 0: // (xxx).W
{
- UINT32 ea = (UINT32)OPER_I_16(m68k);
+ uint32_t ea = (uint32_t)OPER_I_16(m68k);
return m68ki_read_16(m68k, ea);
}
case 1: // (xxx).L
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
return m68ki_read_16(m68k, ea);
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_16(m68k);
+ uint32_t ea = EA_PCDI_16(m68k);
return m68ki_read_16(m68k, ea);
}
case 3: // (PC) + (Xn) + d8
{
- UINT32 ea = EA_PCIX_16(m68k);
+ uint32_t ea = EA_PCIX_16(m68k);
return m68ki_read_16(m68k, ea);
}
case 4: // #<data>
@@ -508,7 +508,7 @@ static UINT16 READ_EA_16(m68000_base_device *m68k, int ea)
return 0;
}
-static UINT32 READ_EA_32(m68000_base_device *m68k, int ea)
+static uint32_t READ_EA_32(m68000_base_device *m68k, int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -521,27 +521,27 @@ static UINT32 READ_EA_32(m68000_base_device *m68k, int ea)
}
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
return m68ki_read_32(m68k, ea);
}
case 3: // (An)+
{
- UINT32 ea = EA_AY_PI_32(m68k);
+ uint32_t ea = EA_AY_PI_32(m68k);
return m68ki_read_32(m68k, ea);
}
case 4: // -(An)
{
- UINT32 ea = EA_AY_PD_32(m68k);
+ uint32_t ea = EA_AY_PD_32(m68k);
return m68ki_read_32(m68k, ea);
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_32(m68k);
+ uint32_t ea = EA_AY_DI_32(m68k);
return m68ki_read_32(m68k, ea);
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_32(m68k);
+ uint32_t ea = EA_AY_IX_32(m68k);
return m68ki_read_32(m68k, ea);
}
case 7:
@@ -550,24 +550,24 @@ static UINT32 READ_EA_32(m68000_base_device *m68k, int ea)
{
case 0: // (xxx).W
{
- UINT32 ea = (UINT32)OPER_I_16(m68k);
+ uint32_t ea = (uint32_t)OPER_I_16(m68k);
return m68ki_read_32(m68k, ea);
}
case 1: // (xxx).L
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
return m68ki_read_32(m68k, ea);
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_32(m68k);
+ uint32_t ea = EA_PCDI_32(m68k);
return m68ki_read_32(m68k, ea);
}
case 3: // (PC) + (Xn) + d8
{
- UINT32 ea = EA_PCIX_32(m68k);
+ uint32_t ea = EA_PCIX_32(m68k);
return m68ki_read_32(m68k, ea);
}
case 4: // #<data>
@@ -583,50 +583,50 @@ static UINT32 READ_EA_32(m68000_base_device *m68k, int ea)
return 0;
}
-static UINT64 READ_EA_64(m68000_base_device *m68k, int ea)
+static uint64_t READ_EA_64(m68000_base_device *m68k, int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
- UINT32 h1, h2;
+ uint32_t h1, h2;
switch (mode)
{
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
- return (UINT64)(h1) << 32 | (UINT64)(h2);
+ return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 3: // (An)+
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
REG_A(m68k)[reg] += 8;
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
- return (UINT64)(h1) << 32 | (UINT64)(h2);
+ return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 4: // -(An)
{
- UINT32 ea = REG_A(m68k)[reg]-8;
+ uint32_t ea = REG_A(m68k)[reg]-8;
REG_A(m68k)[reg] -= 8;
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
- return (UINT64)(h1) << 32 | (UINT64)(h2);
+ return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_32(m68k);
+ uint32_t ea = EA_AY_DI_32(m68k);
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
- return (UINT64)(h1) << 32 | (UINT64)(h2);
+ return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_32(m68k);
+ uint32_t ea = EA_AY_IX_32(m68k);
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
- return (UINT64)(h1) << 32 | (UINT64)(h2);
+ return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 7:
{
@@ -634,30 +634,30 @@ static UINT64 READ_EA_64(m68000_base_device *m68k, int ea)
{
case 1: // (xxx).L
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
- return (UINT64)(m68ki_read_32(m68k, ea)) << 32 | (UINT64)(m68ki_read_32(m68k, ea+4));
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
+ return (uint64_t)(m68ki_read_32(m68k, ea)) << 32 | (uint64_t)(m68ki_read_32(m68k, ea+4));
}
case 3: // (PC) + (Xn) + d8
{
- UINT32 ea = EA_PCIX_32(m68k);
+ uint32_t ea = EA_PCIX_32(m68k);
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
- return (UINT64)(h1) << 32 | (UINT64)(h2);
+ return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 4: // #<data>
{
h1 = OPER_I_32(m68k);
h2 = OPER_I_32(m68k);
- return (UINT64)(h1) << 32 | (UINT64)(h2);
+ return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_32(m68k);
+ uint32_t ea = EA_PCDI_32(m68k);
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
- return (UINT64)(h1) << 32 | (UINT64)(h2);
+ return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
@@ -680,21 +680,21 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea)
{
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
fpr = load_extended_float80(m68k, ea);
break;
}
case 3: // (An)+
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
REG_A(m68k)[reg] += 12;
fpr = load_extended_float80(m68k, ea);
break;
}
case 4: // -(An)
{
- UINT32 ea = REG_A(m68k)[reg]-12;
+ uint32_t ea = REG_A(m68k)[reg]-12;
REG_A(m68k)[reg] -= 12;
fpr = load_extended_float80(m68k, ea);
break;
@@ -702,14 +702,14 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea)
case 5: // (d16, An)
{
// FIXME: will fail for fmovem
- UINT32 ea = EA_AY_DI_32(m68k);
+ uint32_t ea = EA_AY_DI_32(m68k);
fpr = load_extended_float80(m68k, ea);
break;
}
case 6: // (An) + (Xn) + d8
{
// FIXME: will fail for fmovem
- UINT32 ea = EA_AY_IX_32(m68k);
+ uint32_t ea = EA_AY_IX_32(m68k);
fpr = load_extended_float80(m68k, ea);
break;
}
@@ -720,23 +720,23 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea)
{
case 1: // (xxx)
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
fpr = load_extended_float80(m68k, ea);
}
break;
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_32(m68k);
+ uint32_t ea = EA_PCDI_32(m68k);
fpr = load_extended_float80(m68k, ea);
}
break;
case 3: // (d16,PC,Dx.w)
{
- UINT32 ea = EA_PCIX_32(m68k);
+ uint32_t ea = EA_PCIX_32(m68k);
fpr = load_extended_float80(m68k, ea);
}
break;
@@ -764,14 +764,14 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea)
{
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
fpr = load_pack_float80(m68k, ea);
break;
}
case 3: // (An)+
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
REG_A(m68k)[reg] += 12;
fpr = load_pack_float80(m68k, ea);
break;
@@ -783,7 +783,7 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea)
{
case 3: // (d16,PC,Dx.w)
{
- UINT32 ea = EA_PCIX_32(m68k);
+ uint32_t ea = EA_PCIX_32(m68k);
fpr = load_pack_float80(m68k, ea);
}
break;
@@ -801,7 +801,7 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea)
return fpr;
}
-static void WRITE_EA_8(m68000_base_device *m68k, int ea, UINT8 data)
+static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -815,31 +815,31 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, UINT8 data)
}
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
m68ki_write_8(m68k, ea, data);
break;
}
case 3: // (An)+
{
- UINT32 ea = EA_AY_PI_8(m68k);
+ uint32_t ea = EA_AY_PI_8(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
case 4: // -(An)
{
- UINT32 ea = EA_AY_PD_8(m68k);
+ uint32_t ea = EA_AY_PD_8(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_8(m68k);
+ uint32_t ea = EA_AY_DI_8(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_8(m68k);
+ uint32_t ea = EA_AY_IX_8(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
@@ -849,15 +849,15 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, UINT8 data)
{
case 1: // (xxx).B
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
m68ki_write_8(m68k, ea, data);
break;
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_16(m68k);
+ uint32_t ea = EA_PCDI_16(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
@@ -869,7 +869,7 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, UINT8 data)
}
}
-static void WRITE_EA_16(m68000_base_device *m68k, int ea, UINT16 data)
+static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -883,31 +883,31 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, UINT16 data)
}
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
m68ki_write_16(m68k, ea, data);
break;
}
case 3: // (An)+
{
- UINT32 ea = EA_AY_PI_16(m68k);
+ uint32_t ea = EA_AY_PI_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
case 4: // -(An)
{
- UINT32 ea = EA_AY_PD_16(m68k);
+ uint32_t ea = EA_AY_PD_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_16(m68k);
+ uint32_t ea = EA_AY_DI_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_16(m68k);
+ uint32_t ea = EA_AY_IX_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
@@ -917,15 +917,15 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, UINT16 data)
{
case 1: // (xxx).W
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
m68ki_write_16(m68k, ea, data);
break;
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_16(m68k);
+ uint32_t ea = EA_PCDI_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
@@ -937,7 +937,7 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, UINT16 data)
}
}
-static void WRITE_EA_32(m68000_base_device *m68k, int ea, UINT32 data)
+static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -956,31 +956,31 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, UINT32 data)
}
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
m68ki_write_32(m68k, ea, data);
break;
}
case 3: // (An)+
{
- UINT32 ea = EA_AY_PI_32(m68k);
+ uint32_t ea = EA_AY_PI_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
case 4: // -(An)
{
- UINT32 ea = EA_AY_PD_32(m68k);
+ uint32_t ea = EA_AY_PD_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_32(m68k);
+ uint32_t ea = EA_AY_DI_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_32(m68k);
+ uint32_t ea = EA_AY_IX_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
@@ -990,21 +990,21 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, UINT32 data)
{
case 0: // (xxx).W
{
- UINT32 ea = OPER_I_16(m68k);
+ uint32_t ea = OPER_I_16(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
case 1: // (xxx).L
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
m68ki_write_32(m68k, ea, data);
break;
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_32(m68k);
+ uint32_t ea = EA_PCDI_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
@@ -1016,7 +1016,7 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, UINT32 data)
}
}
-static void WRITE_EA_64(m68000_base_device *m68k, int ea, UINT64 data)
+static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -1025,40 +1025,40 @@ static void WRITE_EA_64(m68000_base_device *m68k, int ea, UINT64 data)
{
case 2: // (An)
{
- UINT32 ea = REG_A(m68k)[reg];
- m68ki_write_32(m68k, ea, (UINT32)(data >> 32));
- m68ki_write_32(m68k, ea+4, (UINT32)(data));
+ uint32_t ea = REG_A(m68k)[reg];
+ m68ki_write_32(m68k, ea, (uint32_t)(data >> 32));
+ m68ki_write_32(m68k, ea+4, (uint32_t)(data));
break;
}
case 3: // (An)+
{
- UINT32 ea = REG_A(m68k)[reg];
+ uint32_t ea = REG_A(m68k)[reg];
REG_A(m68k)[reg] += 8;
- m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
- m68ki_write_32(m68k, ea+4, (UINT32)(data));
+ m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(m68k, ea+4, (uint32_t)(data));
break;
}
case 4: // -(An)
{
- UINT32 ea;
+ uint32_t ea;
REG_A(m68k)[reg] -= 8;
ea = REG_A(m68k)[reg];
- m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
- m68ki_write_32(m68k, ea+4, (UINT32)(data));
+ m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(m68k, ea+4, (uint32_t)(data));
break;
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_32(m68k);
- m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
- m68ki_write_32(m68k, ea+4, (UINT32)(data));
+ uint32_t ea = EA_AY_DI_32(m68k);
+ m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(m68k, ea+4, (uint32_t)(data));
break;
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_32(m68k);
- m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
- m68ki_write_32(m68k, ea+4, (UINT32)(data));
+ uint32_t ea = EA_AY_IX_32(m68k);
+ m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(m68k, ea+4, (uint32_t)(data));
break;
}
case 7:
@@ -1067,25 +1067,25 @@ static void WRITE_EA_64(m68000_base_device *m68k, int ea, UINT64 data)
{
case 1: // (xxx).L
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
- m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
- m68ki_write_32(m68k, ea+4, (UINT32)(data));
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
+ m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(m68k, ea+4, (uint32_t)(data));
break;
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_32(m68k);
- m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
- m68ki_write_32(m68k, ea+4, (UINT32)(data));
+ uint32_t ea = EA_PCDI_32(m68k);
+ m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(m68k, ea+4, (uint32_t)(data));
break;
}
default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (UINT32)(data >> 32), (UINT32)(data), REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (uint32_t)(data >> 32), (uint32_t)(data), REG_PC(m68k));
}
}
@@ -1098,7 +1098,7 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr)
{
case 2: // (An)
{
- UINT32 ea;
+ uint32_t ea;
ea = REG_A(m68k)[reg];
store_extended_float80(m68k, ea, fpr);
break;
@@ -1106,7 +1106,7 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr)
case 3: // (An)+
{
- UINT32 ea;
+ uint32_t ea;
ea = REG_A(m68k)[reg];
store_extended_float80(m68k, ea, fpr);
REG_A(m68k)[reg] += 12;
@@ -1115,7 +1115,7 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr)
case 4: // -(An)
{
- UINT32 ea;
+ uint32_t ea;
REG_A(m68k)[reg] -= 12;
ea = REG_A(m68k)[reg];
store_extended_float80(m68k, ea, fpr);
@@ -1142,7 +1142,7 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr)
{
case 2: // (An)
{
- UINT32 ea;
+ uint32_t ea;
ea = REG_A(m68k)[reg];
store_pack_float80(m68k, ea, k, fpr);
break;
@@ -1150,7 +1150,7 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr)
case 3: // (An)+
{
- UINT32 ea;
+ uint32_t ea;
ea = REG_A(m68k)[reg];
store_pack_float80(m68k, ea, k, fpr);
REG_A(m68k)[reg] += 12;
@@ -1159,7 +1159,7 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr)
case 4: // -(An)
{
- UINT32 ea;
+ uint32_t ea;
REG_A(m68k)[reg] -= 12;
ea = REG_A(m68k)[reg];
store_pack_float80(m68k, ea, k, fpr);
@@ -1177,7 +1177,7 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr)
}
}
-static void fpgen_rm_reg(m68000_base_device *m68k, UINT16 w2)
+static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2)
{
int ea = m68k->ir & 0x3f;
int rm = (w2 >> 14) & 0x1;
@@ -1194,13 +1194,13 @@ static void fpgen_rm_reg(m68000_base_device *m68k, UINT16 w2)
{
case 0: // Long-Word Integer
{
- INT32 d = READ_EA_32(m68k, ea);
+ int32_t d = READ_EA_32(m68k, ea);
source = int32_to_floatx80(d);
break;
}
case 1: // Single-precision Real
{
- UINT32 d = READ_EA_32(m68k, ea);
+ uint32_t d = READ_EA_32(m68k, ea);
source = float32_to_floatx80(d);
break;
}
@@ -1216,21 +1216,21 @@ static void fpgen_rm_reg(m68000_base_device *m68k, UINT16 w2)
}
case 4: // Word Integer
{
- INT16 d = READ_EA_16(m68k, ea);
- source = int32_to_floatx80((INT32)d);
+ int16_t d = READ_EA_16(m68k, ea);
+ source = int32_to_floatx80((int32_t)d);
break;
}
case 5: // Double-precision Real
{
- UINT64 d = READ_EA_64(m68k, ea);
+ uint64_t d = READ_EA_64(m68k, ea);
source = float64_to_floatx80(d);
break;
}
case 6: // Byte Integer
{
- INT8 d = READ_EA_8(m68k, ea);
- source = int32_to_floatx80((INT32)d);
+ int8_t d = READ_EA_8(m68k, ea);
+ source = int32_to_floatx80((int32_t)d);
break;
}
case 7: // FMOVECR load from constant ROM
@@ -1263,7 +1263,7 @@ static void fpgen_rm_reg(m68000_base_device *m68k, UINT16 w2)
break;
case 0xf: // 0.0
- source = int32_to_floatx80((INT32)0);
+ source = int32_to_floatx80((int32_t)0);
break;
case 0x30: // ln(2)
@@ -1277,26 +1277,26 @@ static void fpgen_rm_reg(m68000_base_device *m68k, UINT16 w2)
break;
case 0x32: // 1 (or 100? manuals are unclear, but 1 would make more sense)
- source = int32_to_floatx80((INT32)1);
+ source = int32_to_floatx80((int32_t)1);
break;
case 0x33: // 10^1
- source = int32_to_floatx80((INT32)10);
+ source = int32_to_floatx80((int32_t)10);
break;
case 0x34: // 10^2
- source = int32_to_floatx80((INT32)10*10);
+ source = int32_to_floatx80((int32_t)10*10);
break;
case 0x35: // 10^4
- source = int32_to_floatx80((INT32)1000*10);
+ source = int32_to_floatx80((int32_t)1000*10);
break;
case 0x36: // 1.0e8
- source = int32_to_floatx80((INT32)10000000*10);
+ source = int32_to_floatx80((int32_t)10000000*10);
break;
- case 0x37: // 1.0e16 - can't get the right precision from INT32 so go "direct" with constants from h/w
+ case 0x37: // 1.0e16 - can't get the right precision from int32_t so go "direct" with constants from h/w
source.high = 0x4034;
source.low = U64(0x8e1bc9bf04000000);
break;
@@ -1372,14 +1372,14 @@ static void fpgen_rm_reg(m68000_base_device *m68k, UINT16 w2)
}
case 0x01: // FINT
{
- INT32 temp;
+ int32_t temp;
temp = floatx80_to_int32(source);
REG_FP(m68k)[dst] = int32_to_floatx80(temp);
break;
}
case 0x03: // FINTRZ
{
- INT32 temp;
+ int32_t temp;
temp = floatx80_to_int32_round_to_zero(source);
REG_FP(m68k)[dst] = int32_to_floatx80(temp);
break;
@@ -1461,7 +1461,7 @@ static void fpgen_rm_reg(m68000_base_device *m68k, UINT16 w2)
}
case 0x1e: // FGETEXP
{
- INT16 temp2;
+ int16_t temp2;
temp2 = source.high; // get the exponent
temp2 -= 0x3fff; // take off the bias
@@ -1549,7 +1549,7 @@ static void fpgen_rm_reg(m68000_base_device *m68k, UINT16 w2)
}
}
-static void fmove_reg_mem(m68000_base_device *m68k, UINT16 w2)
+static void fmove_reg_mem(m68000_base_device *m68k, uint16_t w2)
{
int ea = m68k->ir & 0x3f;
int src = (w2 >> 7) & 0x7;
@@ -1560,13 +1560,13 @@ static void fmove_reg_mem(m68000_base_device *m68k, UINT16 w2)
{
case 0: // Long-Word Integer
{
- INT32 d = (INT32)floatx80_to_int32(REG_FP(m68k)[src]);
+ int32_t d = (int32_t)floatx80_to_int32(REG_FP(m68k)[src]);
WRITE_EA_32(m68k, ea, d);
break;
}
case 1: // Single-precision Real
{
- UINT32 d = floatx80_to_float32(REG_FP(m68k)[src]);
+ uint32_t d = floatx80_to_float32(REG_FP(m68k)[src]);
WRITE_EA_32(m68k, ea, d);
break;
}
@@ -1589,12 +1589,12 @@ static void fmove_reg_mem(m68000_base_device *m68k, UINT16 w2)
{
REG_FPSR(m68k) |= FPES_OE | FPAE_IOP;
}
- WRITE_EA_16(m68k, ea, (INT16)value);
+ WRITE_EA_16(m68k, ea, (int16_t)value);
break;
}
case 5: // Double-precision Real
{
- UINT64 d;
+ uint64_t d;
d = floatx80_to_float64(REG_FP(m68k)[src]);
@@ -1608,7 +1608,7 @@ static void fmove_reg_mem(m68000_base_device *m68k, UINT16 w2)
{
REG_FPSR(m68k) |= FPES_OE | FPAE_IOP;
}
- WRITE_EA_8(m68k, ea, (INT8) value);
+ WRITE_EA_8(m68k, ea, (int8_t) value);
break;
}
case 7: // Packed-decimal Real with Dynamic K-factor
@@ -1621,7 +1621,7 @@ static void fmove_reg_mem(m68000_base_device *m68k, UINT16 w2)
m68k->remaining_cycles -= 12;
}
-static void fmove_fpcr(m68000_base_device *m68k, UINT16 w2)
+static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2)
{
int ea = m68k->ir & 0x3f;
int dir = (w2 >> 13) & 0x1;
@@ -1630,7 +1630,7 @@ static void fmove_fpcr(m68000_base_device *m68k, UINT16 w2)
if ((mode == 5) || (mode == 6))
{
- UINT32 address = 0xffffffff; // force a bus error if this doesn't get assigned
+ uint32_t address = 0xffffffff; // force a bus error if this doesn't get assigned
if (mode == 5)
{
@@ -1721,7 +1721,7 @@ static void fmove_fpcr(m68000_base_device *m68k, UINT16 w2)
m68k->remaining_cycles -= 10;
}
-static void fmovem(m68000_base_device *m68k, UINT16 w2)
+static void fmovem(m68000_base_device *m68k, uint16_t w2)
{
int i;
int ea = m68k->ir & 0x3f;
@@ -1729,7 +1729,7 @@ static void fmovem(m68000_base_device *m68k, UINT16 w2)
int mode = (w2 >> 11) & 0x3;
int reglist = w2 & 0xff;
- UINT32 mem_addr = 0;
+ uint32_t mem_addr = 0;
switch (ea >> 3)
{
case 5: // (d16, An)
@@ -1838,7 +1838,7 @@ static void fmovem(m68000_base_device *m68k, UINT16 w2)
static void fscc(m68000_base_device *m68k)
{
int ea = m68k->ir & 0x3f;
- int condition = (INT16)(OPER_I_16(m68k));
+ int condition = (int16_t)(OPER_I_16(m68k));
WRITE_EA_8(m68k, ea, TEST_CONDITION(m68k, condition) ? 0xff : 0);
m68k->remaining_cycles -= 7; // ???
@@ -1846,10 +1846,10 @@ static void fscc(m68000_base_device *m68k)
static void fbcc16(m68000_base_device *m68k)
{
- INT32 offset;
+ int32_t offset;
int condition = m68k->ir & 0x3f;
- offset = (INT16)(OPER_I_16(m68k));
+ offset = (int16_t)(OPER_I_16(m68k));
// TODO: condition and jump!!!
if (TEST_CONDITION(m68k, condition))
@@ -1863,7 +1863,7 @@ static void fbcc16(m68000_base_device *m68k)
static void fbcc32(m68000_base_device *m68k)
{
- INT32 offset;
+ int32_t offset;
int condition = m68k->ir & 0x3f;
offset = OPER_I_32(m68k);
@@ -1887,7 +1887,7 @@ void m68040_fpu_op0(m68000_base_device *m68k)
{
case 0:
{
- UINT16 w2 = OPER_I_16(m68k);
+ uint16_t w2 = OPER_I_16(m68k);
switch ((w2 >> 13) & 0x7)
{
case 0x0: // FPU ALU FP, FP
@@ -1950,7 +1950,7 @@ void m68040_fpu_op0(m68000_base_device *m68k)
}
}
-static int perform_fsave(m68000_base_device *m68k, UINT32 addr, int inc)
+static int perform_fsave(m68000_base_device *m68k, uint32_t addr, int inc)
{
if(m68k->cpu_type & CPU_TYPE_040)
{
@@ -2010,7 +2010,7 @@ static void do_frestore_null(m68000_base_device *m68k)
m68k->fpu_just_reset = 1;
}
-static void m68040_do_fsave(m68000_base_device *m68k, UINT32 addr, int reg, int inc)
+static void m68040_do_fsave(m68000_base_device *m68k, uint32_t addr, int reg, int inc)
{
if (m68k->fpu_just_reset)
{
@@ -2025,10 +2025,10 @@ static void m68040_do_fsave(m68000_base_device *m68k, UINT32 addr, int reg, int
}
}
-static void m68040_do_frestore(m68000_base_device *m68k, UINT32 addr, int reg)
+static void m68040_do_frestore(m68000_base_device *m68k, uint32_t addr, int reg)
{
bool m40 = m68k->cpu_type & CPU_TYPE_040;
- UINT32 temp = m68ki_read_32(m68k, addr);
+ uint32_t temp = m68ki_read_32(m68k, addr);
// check for nullptr frame
if (temp & 0xff000000)
@@ -2068,7 +2068,7 @@ void m68040_fpu_op1(m68000_base_device *m68k)
int ea = m68k->ir & 0x3f;
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
- UINT32 addr;
+ uint32_t addr;
switch ((m68k->ir >> 6) & 0x3)
{
@@ -2177,7 +2177,7 @@ void m68040_fpu_op1(m68000_base_device *m68k)
void m68881_ftrap(m68000_base_device *m68k)
{
- UINT16 w2 = OPER_I_16(m68k);
+ uint16_t w2 = OPER_I_16(m68k);
// now check the condition
if (TEST_CONDITION(m68k, w2 & 0x3f))
diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h
index 7c3649c134b..d477b31f187 100644
--- a/src/devices/cpu/m68000/m68kmmu.h
+++ b/src/devices/cpu/m68000/m68kmmu.h
@@ -46,7 +46,7 @@
#define M68K_MMU_TC_SRE 0x02000000
/* decodes the effective address */
-static UINT32 DECODE_EA_32(m68000_base_device *m68k, int ea)
+static uint32_t DECODE_EA_32(m68000_base_device *m68k, int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -59,17 +59,17 @@ static UINT32 DECODE_EA_32(m68000_base_device *m68k, int ea)
}
case 3: // (An)+
{
- UINT32 ea = EA_AY_PI_32(m68k);
+ uint32_t ea = EA_AY_PI_32(m68k);
return ea;
}
case 5: // (d16, An)
{
- UINT32 ea = EA_AY_DI_32(m68k);
+ uint32_t ea = EA_AY_DI_32(m68k);
return ea;
}
case 6: // (An) + (Xn) + d8
{
- UINT32 ea = EA_AY_IX_32(m68k);
+ uint32_t ea = EA_AY_IX_32(m68k);
return ea;
}
case 7:
@@ -78,19 +78,19 @@ static UINT32 DECODE_EA_32(m68000_base_device *m68k, int ea)
{
case 0: // (xxx).W
{
- UINT32 ea = (UINT32)OPER_I_16(m68k);
+ uint32_t ea = (uint32_t)OPER_I_16(m68k);
return ea;
}
case 1: // (xxx).L
{
- UINT32 d1 = OPER_I_16(m68k);
- UINT32 d2 = OPER_I_16(m68k);
- UINT32 ea = (d1 << 16) | d2;
+ uint32_t d1 = OPER_I_16(m68k);
+ uint32_t d2 = OPER_I_16(m68k);
+ uint32_t ea = (d1 << 16) | d2;
return ea;
}
case 2: // (d16, PC)
{
- UINT32 ea = EA_PCDI_32(m68k);
+ uint32_t ea = EA_PCDI_32(m68k);
return ea;
}
default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
@@ -105,14 +105,14 @@ static UINT32 DECODE_EA_32(m68000_base_device *m68k, int ea)
/*
pmmu_atc_add: adds this address to the ATC
*/
-void pmmu_atc_add(m68000_base_device *m68k, UINT32 logical, UINT32 physical, int fc)
+void pmmu_atc_add(m68000_base_device *m68k, uint32_t logical, uint32_t physical, int fc)
{
int i, found;
// get page size (i.e. # of bits to ignore); is 10 for Apollo
int ps = (m68k->mmu_tc >> 20) & 0xf;
// Note: exact emulation would use (logical >> ps) << (ps-8)
- UINT32 atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24)| logical >> ps;
+ uint32_t atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24)| logical >> ps;
// first see if this is already in the cache
for (i = 0; i < MMU_ATC_ENTRIES; i++)
@@ -176,10 +176,10 @@ void pmmu_atc_flush(m68000_base_device *m68k)
}
-static inline UINT32 get_dt2_table_entry(m68000_base_device *m68k, UINT32 tptr, UINT8 ptest)
+static inline uint32_t get_dt2_table_entry(m68000_base_device *m68k, uint32_t tptr, uint8_t ptest)
{
- UINT32 tbl_entry = m68k->program->read_dword(tptr);
- UINT32 dt = tbl_entry & M68K_MMU_DF_DT;
+ uint32_t tbl_entry = m68k->program->read_dword(tptr);
+ uint32_t dt = tbl_entry & M68K_MMU_DF_DT;
m68k->mmu_tmp_sr |= tbl_entry & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0;
@@ -198,11 +198,11 @@ static inline UINT32 get_dt2_table_entry(m68000_base_device *m68k, UINT32 tptr,
return tbl_entry;
}
-static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr, UINT8 fc, UINT8 ptest)
+static inline uint32_t get_dt3_table_entry(m68000_base_device *m68k, uint32_t tptr, uint8_t fc, uint8_t ptest)
{
- UINT32 tbl_entry2 = m68k->program->read_dword(tptr);
- UINT32 tbl_entry = m68k->program->read_dword(tptr + 4);
- UINT32 dt = tbl_entry2 & M68K_MMU_DF_DT;
+ uint32_t tbl_entry2 = m68k->program->read_dword(tptr);
+ uint32_t tbl_entry = m68k->program->read_dword(tptr + 4);
+ uint32_t dt = tbl_entry2 & M68K_MMU_DF_DT;
m68k->mmu_tmp_sr |= ((tbl_entry2 & 0x0100) && !(fc & 4)) ? M68K_MMU_SR_SUPERVISOR_ONLY : 0;
m68k->mmu_tmp_sr |= tbl_entry2 & 0x0004 ? M68K_MMU_SR_WRITE_PROTECT : 0;
@@ -226,17 +226,17 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
/*
pmmu_translate_addr_with_fc: perform 68851/68030-style PMMU address translation
*/
-/*static inline*/ static UINT32 pmmu_translate_addr_with_fc(m68000_base_device *m68k, UINT32 addr_in, UINT8 fc, UINT8 ptest)
+/*static inline*/ static uint32_t pmmu_translate_addr_with_fc(m68000_base_device *m68k, uint32_t addr_in, uint8_t fc, uint8_t ptest)
{
- UINT32 addr_out, tbl_entry = 0, tamode = 0, tbmode = 0, tcmode = 0;
- UINT32 root_aptr, root_limit, tofs, ps, is, abits, bbits, cbits;
- UINT32 resolved, tptr, shift, last_entry_ptr;
+ uint32_t addr_out, tbl_entry = 0, tamode = 0, tbmode = 0, tcmode = 0;
+ uint32_t root_aptr, root_limit, tofs, ps, is, abits, bbits, cbits;
+ uint32_t resolved, tptr, shift, last_entry_ptr;
int i;
- UINT32 atc_tag;
+ uint32_t atc_tag;
// int verbose = 0;
-// static UINT32 pmmu_access_count = 0;
-// static UINT32 pmmu_atc_count = 0;
+// static uint32_t pmmu_access_count = 0;
+// static uint32_t pmmu_atc_count = 0;
resolved = 0;
addr_out = addr_in;
@@ -250,8 +250,8 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
if (m68k->mmu_tt0 & 0x8000)
{
// transparent translation register 0 enabled
- UINT32 address_base = m68k->mmu_tt0 & 0xff000000;
- UINT32 address_mask = ((m68k->mmu_tt0 << 8) & 0xff000000) ^ 0xff000000;
+ uint32_t address_base = m68k->mmu_tt0 & 0xff000000;
+ uint32_t address_mask = ((m68k->mmu_tt0 << 8) & 0xff000000) ^ 0xff000000;
if ((addr_in & address_mask) == address_base && (fc & ~m68k->mmu_tt0) == ((m68k->mmu_tt0 >> 4) & 7))
{
// printf("PMMU: pc=%x TT0 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m68k->ppc, fc, addr_in, address_mask, address_base);
@@ -262,8 +262,8 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
if (m68k->mmu_tt1 & 0x8000)
{
// transparent translation register 1 enabled
- UINT32 address_base = m68k->mmu_tt1 & 0xff000000;
- UINT32 address_mask = ((m68k->mmu_tt1 << 8) & 0xff000000) ^ 0xff000000;
+ uint32_t address_base = m68k->mmu_tt1 & 0xff000000;
+ uint32_t address_mask = ((m68k->mmu_tt1 << 8) & 0xff000000) ^ 0xff000000;
if ((addr_in & address_mask) == address_base && (fc & ~m68k->mmu_tt1) == ((m68k->mmu_tt1 >> 4) & 7))
{
// printf("PMMU: pc=%x TT1 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m68k->ppc, fc, addr_in, address_mask, address_base);
@@ -525,9 +525,9 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
// FC bits: 2 = supervisor, 1 = program, 0 = data
// the 68040 is a subset of the 68851 and 68030 PMMUs - the page table sizes are fixed, there is no early termination, etc, etc.
-/*static inline*/ static UINT32 pmmu_translate_addr_with_fc_040(m68000_base_device *m68k, UINT32 addr_in, UINT8 fc, UINT8 ptest)
+/*static inline*/ static uint32_t pmmu_translate_addr_with_fc_040(m68000_base_device *m68k, uint32_t addr_in, uint8_t fc, uint8_t ptest)
{
- UINT32 addr_out, tt0, tt1;
+ uint32_t addr_out, tt0, tt1;
addr_out = addr_in;
m68k->mmu_tmp_sr = 0;
@@ -554,7 +554,7 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
{
static int fcmask[4] = { 4, 4, 0, 0 };
static int fcmatch[4] = { 0, 4, 0, 0 };
- UINT32 mask = (tt0>>16) & 0xff;
+ uint32_t mask = (tt0>>16) & 0xff;
mask ^= 0xff;
mask <<= 24;
@@ -579,7 +579,7 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
{
static int fcmask[4] = { 4, 4, 0, 0 };
static int fcmatch[4] = { 0, 4, 0, 0 };
- UINT32 mask = (tt1>>16) & 0xff;
+ uint32_t mask = (tt1>>16) & 0xff;
mask ^= 0xff;
mask <<= 24;
@@ -602,11 +602,11 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
if (m68k->pmmu_enabled)
{
- UINT32 root_idx = (addr_in>>25) & 0x7f;
- UINT32 ptr_idx = (addr_in>>18) & 0x7f;
- UINT32 page_idx, page;
- UINT32 root_ptr, pointer_ptr, page_ptr;
- UINT32 root_entry, pointer_entry, page_entry;
+ uint32_t root_idx = (addr_in>>25) & 0x7f;
+ uint32_t ptr_idx = (addr_in>>18) & 0x7f;
+ uint32_t page_idx, page;
+ uint32_t root_ptr, pointer_ptr, page_ptr;
+ uint32_t root_entry, pointer_entry, page_entry;
// select supervisor or user root pointer
if (fc & 4)
@@ -809,9 +809,9 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
/*
pmmu_translate_addr: perform 68851/68030-style PMMU address translation
*/
-/*static inline*/ static UINT32 pmmu_translate_addr(m68000_base_device *m68k, UINT32 addr_in)
+/*static inline*/ static uint32_t pmmu_translate_addr(m68000_base_device *m68k, uint32_t addr_in)
{
- UINT32 addr_out;
+ uint32_t addr_out;
if (CPU_TYPE_IS_040_PLUS(m68k->cpu_type))
{
@@ -837,9 +837,9 @@ static inline UINT32 get_dt3_table_entry(m68000_base_device *m68k, UINT32 tptr,
void m68881_mmu_ops(m68000_base_device *m68k)
{
- UINT16 modes;
- UINT32 ea = m68k->ir & 0x3f;
- UINT64 temp64;
+ uint16_t modes;
+ uint32_t ea = m68k->ir & 0x3f;
+ uint64_t temp64;
// catch the 2 "weird" encodings up front (PBcc)
@@ -867,8 +867,8 @@ void m68881_mmu_ops(m68000_base_device *m68k)
if ((modes & 0xfde0) == 0x2000) // PLOAD
{
- UINT32 ltmp = DECODE_EA_32(m68k, ea);
- UINT32 ptmp;
+ uint32_t ltmp = DECODE_EA_32(m68k, ea);
+ uint32_t ptmp;
ptmp = ltmp;
if (m68k->pmmu_enabled)
@@ -910,9 +910,9 @@ void m68881_mmu_ops(m68000_base_device *m68k)
}
else if ((modes & 0xe000) == 0x8000) // PTEST
{
- UINT32 v_addr = DECODE_EA_32(m68k, ea);
- UINT32 p_addr;
- UINT32 fc = modes & 0x1f;
+ uint32_t v_addr = DECODE_EA_32(m68k, ea);
+ uint32_t p_addr;
+ uint32_t fc = modes & 0x1f;
switch (fc >> 3) {
case 0:
fc = fc == 0 ? m68k->sfc : m68k->dfc;
@@ -969,12 +969,12 @@ void m68881_mmu_ops(m68000_base_device *m68k)
break;
case 0x12: // supervisor root pointer
- WRITE_EA_64(m68k, ea, (UINT64)m68k->mmu_srp_limit<<32 | (UINT64)m68k->mmu_srp_aptr);
+ WRITE_EA_64(m68k, ea, (uint64_t)m68k->mmu_srp_limit<<32 | (uint64_t)m68k->mmu_srp_aptr);
// printf("PMMU: pc=%x PMOVE from SRP limit = %08x, aptr = %08x\n", REG_PPC(m68k), m68k->mmu_srp_limit, m68k->mmu_srp_aptr);
break;
case 0x13: // CPU root pointer
- WRITE_EA_64(m68k, ea, (UINT64)m68k->mmu_crp_limit<<32 | (UINT64)m68k->mmu_crp_aptr);
+ WRITE_EA_64(m68k, ea, (uint64_t)m68k->mmu_crp_limit<<32 | (uint64_t)m68k->mmu_crp_aptr);
// printf("PMMU: pc=%x PMOVE from CRP limit = %08x, aptr = %08x\n", REG_PPC(m68k), m68k->mmu_crp_limit, m68k->mmu_crp_aptr);
break;
@@ -990,7 +990,7 @@ void m68881_mmu_ops(m68000_base_device *m68k)
{
case 0:
{
- UINT32 temp = READ_EA_32(m68k, ea);
+ uint32_t temp = READ_EA_32(m68k, ea);
if (((modes>>10) & 7) == 2)
{
@@ -1057,7 +1057,7 @@ void m68881_mmu_ops(m68000_base_device *m68k)
if (m68k->cpu_type == CPU_TYPE_020)
{
// DomainOS on Apollo DN3000 will only reset this to 0
- UINT16 mmu_ac = READ_EA_16(m68k, ea);
+ uint16_t mmu_ac = READ_EA_16(m68k, ea);
if (mmu_ac != 0)
{
printf("680x0 PMMU: pc=%x PMOVE to mmu_ac=%08x\n",
@@ -1075,7 +1075,7 @@ void m68881_mmu_ops(m68000_base_device *m68k)
case 3: // MMU status
{
- UINT32 temp = READ_EA_32(m68k, ea);
+ uint32_t temp = READ_EA_32(m68k, ea);
printf("680x0: unsupported PMOVE %x to MMU status, PC %x\n", temp, m68k->pc);
}
break;
@@ -1111,9 +1111,9 @@ void m68881_mmu_ops(m68000_base_device *m68k)
/* Apple HMMU translation is much simpler */
-static inline UINT32 hmmu_translate_addr(m68000_base_device *m68k, UINT32 addr_in)
+static inline uint32_t hmmu_translate_addr(m68000_base_device *m68k, uint32_t addr_in)
{
- UINT32 addr_out;
+ uint32_t addr_out;
addr_out = addr_in;
diff --git a/src/devices/cpu/m6805/6805dasm.cpp b/src/devices/cpu/m6805/6805dasm.cpp
index 9471d976924..13425c5d148 100644
--- a/src/devices/cpu/m6805/6805dasm.cpp
+++ b/src/devices/cpu/m6805/6805dasm.cpp
@@ -163,8 +163,8 @@ static const char *const opcode_strings[0x0100] =
CPU_DISASSEMBLE( m6805 )
{
int code, bit;
- UINT16 ea;
- UINT32 flags = 0;
+ uint16_t ea;
+ uint32_t flags = 0;
code = oprom[0];
@@ -179,14 +179,14 @@ CPU_DISASSEMBLE( m6805 )
{
case _btr: /* bit test and relative branch */
bit = (code >> 1) & 7;
- sprintf (buffer, "%d,$%02X,$%03X", bit, opram[1], pc + 3 + (INT8)opram[2]);
+ sprintf (buffer, "%d,$%02X,$%03X", bit, opram[1], pc + 3 + (int8_t)opram[2]);
return 3 | flags | DASMFLAG_SUPPORTED;
case _bit: /* bit test */
bit = (code >> 1) & 7;
sprintf (buffer, "%d,$%03X", bit, opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
case _rel: /* relative */
- sprintf (buffer, "$%03X", pc + 2 + (INT8)opram[1]);
+ sprintf (buffer, "$%03X", pc + 2 + (int8_t)opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
case _imm: /* immediate */
sprintf (buffer, "#$%02X", opram[1]);
diff --git a/src/devices/cpu/m6805/6805ops.hxx b/src/devices/cpu/m6805/6805ops.hxx
index c6761982c96..93244876243 100644
--- a/src/devices/cpu/m6805/6805ops.hxx
+++ b/src/devices/cpu/m6805/6805ops.hxx
@@ -17,7 +17,7 @@ HNZC
#define OP_HANDLER(_name) void m6805_base_device::_name()
#define DERIVED_OP_HANDLER(_arch,_name) void _arch##_device::_name()
-#define OP_HANDLER_BIT(_name) void m6805_base_device::_name(UINT8 bit)
+#define OP_HANDLER_BIT(_name) void m6805_base_device::_name(uint8_t bit)
OP_HANDLER( illegal )
{
@@ -27,7 +27,7 @@ OP_HANDLER( illegal )
/* $00/$02/$04/$06/$08/$0A/$0C/$0E BRSET direct,relative ---- */
OP_HANDLER_BIT( brset )
{
- UINT8 t,r;
+ uint8_t t,r;
DIRBYTE(r);
IMMBYTE(t);
@@ -42,7 +42,7 @@ OP_HANDLER_BIT( brset )
/* $01/$03/$05/$07/$09/$0B/$0D/$0F BRCLR direct,relative ---- */
OP_HANDLER_BIT( brclr )
{
- UINT8 t,r;
+ uint8_t t,r;
DIRBYTE(r);
IMMBYTE(t);
@@ -57,7 +57,7 @@ OP_HANDLER_BIT( brclr )
/* $10/$12/$14/$16/$18/$1A/$1C/$1E BSET direct ---- */
OP_HANDLER_BIT( bset )
{
- UINT8 t,r;
+ uint8_t t,r;
DIRBYTE(t); r=t|bit;
WM(EAD,r);
}
@@ -65,7 +65,7 @@ OP_HANDLER_BIT( bset )
/* $11/$13/$15/$17/$19/$1B/$1D/$1F BCLR direct ---- */
OP_HANDLER_BIT( bclr)
{
- UINT8 t,r;
+ uint8_t t,r;
DIRBYTE(t); r=t&(~bit);
WM(EAD,r);
}
@@ -73,7 +73,7 @@ OP_HANDLER_BIT( bclr)
/* $20 BRA relative ---- */
OP_HANDLER( bra )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
PC+=SIGNED(t);
}
@@ -181,8 +181,8 @@ DERIVED_OP_HANDLER( hd63705, bih )
/* $30 NEG direct -*** */
OP_HANDLER( neg_di )
{
- UINT8 t;
- UINT16 r;
+ uint8_t t;
+ uint16_t r;
DIRBYTE(t);
r=-t;
CLR_NZC;
@@ -197,7 +197,7 @@ OP_HANDLER( neg_di )
/* $33 COM direct -**1 */
OP_HANDLER( com_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
t = ~t;
CLR_NZ;
@@ -209,7 +209,7 @@ OP_HANDLER( com_di )
/* $34 LSR direct -0** */
OP_HANDLER( lsr_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
CLR_NZC;
CC |= (t&0x01);
@@ -223,7 +223,7 @@ OP_HANDLER( lsr_di )
/* $36 ROR direct -*** */
OP_HANDLER( ror_di )
{
- UINT8 t,r;
+ uint8_t t,r;
DIRBYTE(t);
r = (CC & 0x01) << 7;
CLR_NZC;
@@ -236,7 +236,7 @@ OP_HANDLER( ror_di )
/* $37 ASR direct ?*** */
OP_HANDLER( asr_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
CLR_NZC; CC|=(t&0x01);
t>>=1; t|=((t&0x40)<<1);
@@ -247,8 +247,8 @@ OP_HANDLER( asr_di )
/* $38 LSL direct ?*** */
OP_HANDLER( lsl_di )
{
- UINT8 t;
- UINT16 r;
+ uint8_t t;
+ uint16_t r;
DIRBYTE(t);
r = t << 1;
CLR_NZC;
@@ -259,7 +259,7 @@ OP_HANDLER( lsl_di )
/* $39 ROL direct -*** */
OP_HANDLER( rol_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = CC & 0x01;
r |= t << 1;
@@ -271,7 +271,7 @@ OP_HANDLER( rol_di )
/* $3a DEC direct -**- */
OP_HANDLER( dec_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
--t;
CLR_NZ; SET_FLAGS8D(t);
@@ -283,7 +283,7 @@ OP_HANDLER( dec_di )
/* $3c INC direct -**- */
OP_HANDLER( inc_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
++t;
CLR_NZ; SET_FLAGS8I(t);
@@ -293,7 +293,7 @@ OP_HANDLER( inc_di )
/* $3d TST direct -**- */
OP_HANDLER( tst_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
CLR_NZ; SET_NZ8(t);
}
@@ -311,7 +311,7 @@ OP_HANDLER( clr_di )
/* $40 NEGA inherent ?*** */
OP_HANDLER( nega )
{
- UINT16 r;
+ uint16_t r;
r = -A;
CLR_NZC; SET_FLAGS8(0,A,r);
A = r;
@@ -344,7 +344,7 @@ OP_HANDLER( lsra )
/* $46 RORA inherent -*** */
OP_HANDLER( rora )
{
- UINT8 r;
+ uint8_t r;
r = (CC & 0x01) << 7;
CLR_NZC;
CC |= (A & 0x01);
@@ -365,7 +365,7 @@ OP_HANDLER( asra )
/* $48 LSLA inherent ?*** */
OP_HANDLER( lsla )
{
- UINT16 r;
+ uint16_t r;
r = A << 1;
CLR_NZC;
SET_FLAGS8(A,A,r);
@@ -375,7 +375,7 @@ OP_HANDLER( lsla )
/* $49 ROLA inherent -*** */
OP_HANDLER( rola )
{
- UINT16 t,r;
+ uint16_t t,r;
t = A;
r = CC & 0x01;
r |= t << 1;
@@ -422,7 +422,7 @@ OP_HANDLER( clra )
/* $50 NEGX inherent ?*** */
OP_HANDLER( negx )
{
- UINT16 r;
+ uint16_t r;
r = -X;
CLR_NZC;
SET_FLAGS8(0,X,r);
@@ -456,7 +456,7 @@ OP_HANDLER( lsrx )
/* $56 RORX inherent -*** */
OP_HANDLER( rorx )
{
- UINT8 r;
+ uint8_t r;
r = (CC & 0x01) << 7;
CLR_NZC;
CC |= (X & 0x01);
@@ -477,7 +477,7 @@ OP_HANDLER( asrx )
/* $58 ASLX inherent ?*** */
OP_HANDLER( aslx )
{
- UINT16 r;
+ uint16_t r;
r = X << 1;
CLR_NZC;
SET_FLAGS8(X,X,r);
@@ -487,7 +487,7 @@ OP_HANDLER( aslx )
/* $59 ROLX inherent -*** */
OP_HANDLER( rolx )
{
- UINT16 t,r;
+ uint16_t t,r;
t = X;
r = CC & 0x01;
r |= t<<1;
@@ -534,8 +534,8 @@ OP_HANDLER( clrx )
/* $60 NEG indexed, 1 byte offset -*** */
OP_HANDLER( neg_ix1 )
{
- UINT8 t;
- UINT16 r;
+ uint8_t t;
+ uint16_t r;
IDX1BYTE(t); r=-t;
CLR_NZC; SET_FLAGS8(0,t,r);
WM(EAD,r);
@@ -548,7 +548,7 @@ OP_HANDLER( neg_ix1 )
/* $63 COM indexed, 1 byte offset -**1 */
OP_HANDLER( com_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t); t = ~t;
CLR_NZ; SET_NZ8(t); SEC;
WM(EAD,t);
@@ -557,7 +557,7 @@ OP_HANDLER( com_ix1 )
/* $64 LSR indexed, 1 byte offset -0** */
OP_HANDLER( lsr_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t);
CLR_NZC;
CC |= (t & 0x01);
@@ -571,7 +571,7 @@ OP_HANDLER( lsr_ix1 )
/* $66 ROR indexed, 1 byte offset -*** */
OP_HANDLER( ror_ix1 )
{
- UINT8 t,r;
+ uint8_t t,r;
IDX1BYTE(t);
r = (CC & 0x01) << 7;
CLR_NZC;
@@ -584,7 +584,7 @@ OP_HANDLER( ror_ix1 )
/* $67 ASR indexed, 1 byte offset ?*** */
OP_HANDLER( asr_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t);
CLR_NZC; CC|=(t&0x01);
t>>=1; t|=((t&0x40)<<1);
@@ -595,8 +595,8 @@ OP_HANDLER( asr_ix1 )
/* $68 LSL indexed, 1 byte offset ?*** */
OP_HANDLER( lsl_ix1 )
{
- UINT8 t;
- UINT16 r;
+ uint8_t t;
+ uint16_t r;
IDX1BYTE(t);
r = t << 1;
CLR_NZC;
@@ -607,7 +607,7 @@ OP_HANDLER( lsl_ix1 )
/* $69 ROL indexed, 1 byte offset -*** */
OP_HANDLER( rol_ix1 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX1BYTE(t);
r = CC & 0x01;
r |= t << 1;
@@ -619,7 +619,7 @@ OP_HANDLER( rol_ix1 )
/* $6a DEC indexed, 1 byte offset -**- */
OP_HANDLER( dec_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t);
--t;
CLR_NZ; SET_FLAGS8D(t);
@@ -631,7 +631,7 @@ OP_HANDLER( dec_ix1 )
/* $6c INC indexed, 1 byte offset -**- */
OP_HANDLER( inc_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t);
++t;
CLR_NZ; SET_FLAGS8I(t);
@@ -641,7 +641,7 @@ OP_HANDLER( inc_ix1 )
/* $6d TST indexed, 1 byte offset -**- */
OP_HANDLER( tst_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t);
CLR_NZ; SET_NZ8(t);
}
@@ -659,8 +659,8 @@ OP_HANDLER( clr_ix1 )
/* $70 NEG indexed -*** */
OP_HANDLER( neg_ix )
{
- UINT8 t;
- UINT16 r;
+ uint8_t t;
+ uint16_t r;
IDXBYTE(t); r=-t;
CLR_NZC; SET_FLAGS8(0,t,r);
WM(EAD,r);
@@ -673,7 +673,7 @@ OP_HANDLER( neg_ix )
/* $73 COM indexed -**1 */
OP_HANDLER( com_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t); t = ~t;
CLR_NZ; SET_NZ8(t); SEC;
WM(EAD,t);
@@ -682,7 +682,7 @@ OP_HANDLER( com_ix )
/* $74 LSR indexed -0** */
OP_HANDLER( lsr_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
CLR_NZC;
CC |= (t & 0x01);
@@ -696,7 +696,7 @@ OP_HANDLER( lsr_ix )
/* $76 ROR indexed -*** */
OP_HANDLER( ror_ix )
{
- UINT8 t,r;
+ uint8_t t,r;
IDXBYTE(t);
r = (CC & 0x01) << 7;
CLR_NZC;
@@ -709,7 +709,7 @@ OP_HANDLER( ror_ix )
/* $77 ASR indexed ?*** */
OP_HANDLER( asr_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
CLR_NZC;
CC |= (t & 0x01);
@@ -721,8 +721,8 @@ OP_HANDLER( asr_ix )
/* $78 LSL indexed ?*** */
OP_HANDLER( lsl_ix )
{
- UINT8 t;
- UINT16 r;
+ uint8_t t;
+ uint16_t r;
IDXBYTE(t); r=t<<1;
CLR_NZC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -731,7 +731,7 @@ OP_HANDLER( lsl_ix )
/* $79 ROL indexed -*** */
OP_HANDLER( rol_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = CC & 0x01;
r |= t << 1;
@@ -743,7 +743,7 @@ OP_HANDLER( rol_ix )
/* $7a DEC indexed -**- */
OP_HANDLER( dec_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
--t;
CLR_NZ; SET_FLAGS8D(t);
@@ -755,7 +755,7 @@ OP_HANDLER( dec_ix )
/* $7c INC indexed -**- */
OP_HANDLER( inc_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
++t;
CLR_NZ; SET_FLAGS8I(t);
@@ -765,7 +765,7 @@ OP_HANDLER( inc_ix )
/* $7d TST indexed -**- */
OP_HANDLER( tst_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
CLR_NZ; SET_NZ8(t);
}
@@ -897,7 +897,7 @@ OP_HANDLER( txa )
/* $a0 SUBA immediate ?*** */
OP_HANDLER( suba_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = A - t;
CLR_NZC;
@@ -908,7 +908,7 @@ OP_HANDLER( suba_im )
/* $a1 CMPA immediate ?*** */
OP_HANDLER( cmpa_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = A - t;
CLR_NZC;
@@ -918,7 +918,7 @@ OP_HANDLER( cmpa_im )
/* $a2 SBCA immediate ?*** */
OP_HANDLER( sbca_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -929,7 +929,7 @@ OP_HANDLER( sbca_im )
/* $a3 CPX immediate -*** */
OP_HANDLER( cpx_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = X - t;
CLR_NZC;
@@ -939,7 +939,7 @@ OP_HANDLER( cpx_im )
/* $a4 ANDA immediate -**- */
OP_HANDLER( anda_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
A &= t;
CLR_NZ;
@@ -949,7 +949,7 @@ OP_HANDLER( anda_im )
/* $a5 BITA immediate -**- */
OP_HANDLER( bita_im )
{
- UINT8 t,r;
+ uint8_t t,r;
IMMBYTE(t);
r = A & t;
CLR_NZ;
@@ -969,7 +969,7 @@ OP_HANDLER( lda_im )
/* $a8 EORA immediate -**- */
OP_HANDLER( eora_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
A ^= t;
CLR_NZ;
@@ -979,7 +979,7 @@ OP_HANDLER( eora_im )
/* $a9 ADCA immediate **** */
OP_HANDLER( adca_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = A + t + (CC & 0x01);
CLR_HNZC;
@@ -991,7 +991,7 @@ OP_HANDLER( adca_im )
/* $aa ORA immediate -**- */
OP_HANDLER( ora_im )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
A |= t;
CLR_NZ;
@@ -1001,7 +1001,7 @@ OP_HANDLER( ora_im )
/* $ab ADDA immediate **** */
OP_HANDLER( adda_im )
{
- UINT16 t,r;
+ uint16_t t,r;
IMMBYTE(t);
r = A + t;
CLR_HNZC;
@@ -1015,7 +1015,7 @@ OP_HANDLER( adda_im )
/* $ad BSR ---- */
OP_HANDLER( bsr )
{
- UINT8 t;
+ uint8_t t;
IMMBYTE(t);
PUSHWORD(m_pc);
PC += SIGNED(t);
@@ -1034,7 +1034,7 @@ OP_HANDLER( ldx_im )
/* $b0 SUBA direct ?*** */
OP_HANDLER( suba_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = A - t;
CLR_NZC;
@@ -1045,7 +1045,7 @@ OP_HANDLER( suba_di )
/* $b1 CMPA direct ?*** */
OP_HANDLER( cmpa_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = A - t;
CLR_NZC;
@@ -1055,7 +1055,7 @@ OP_HANDLER( cmpa_di )
/* $b2 SBCA direct ?*** */
OP_HANDLER( sbca_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1066,7 +1066,7 @@ OP_HANDLER( sbca_di )
/* $b3 CPX direct -*** */
OP_HANDLER( cpx_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = X - t;
CLR_NZC;
@@ -1076,7 +1076,7 @@ OP_HANDLER( cpx_di )
/* $b4 ANDA direct -**- */
OP_HANDLER( anda_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
A &= t;
CLR_NZ;
@@ -1086,7 +1086,7 @@ OP_HANDLER( anda_di )
/* $b5 BITA direct -**- */
OP_HANDLER( bita_di )
{
- UINT8 t,r;
+ uint8_t t,r;
DIRBYTE(t);
r = A & t;
CLR_NZ;
@@ -1113,7 +1113,7 @@ OP_HANDLER( sta_di )
/* $b8 EORA direct -**- */
OP_HANDLER( eora_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
A ^= t;
CLR_NZ;
@@ -1123,7 +1123,7 @@ OP_HANDLER( eora_di )
/* $b9 ADCA direct **** */
OP_HANDLER( adca_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = A + t + (CC & 0x01);
CLR_HNZC;
@@ -1135,7 +1135,7 @@ OP_HANDLER( adca_di )
/* $ba ORA direct -**- */
OP_HANDLER( ora_di )
{
- UINT8 t;
+ uint8_t t;
DIRBYTE(t);
A |= t;
CLR_NZ;
@@ -1145,7 +1145,7 @@ OP_HANDLER( ora_di )
/* $bb ADDA direct **** */
OP_HANDLER( adda_di )
{
- UINT16 t,r;
+ uint16_t t,r;
DIRBYTE(t);
r = A + t;
CLR_HNZC;
@@ -1189,7 +1189,7 @@ OP_HANDLER( stx_di )
/* $c0 SUBA extended ?*** */
OP_HANDLER( suba_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A - t;
CLR_NZC;
@@ -1200,7 +1200,7 @@ OP_HANDLER( suba_ex )
/* $c1 CMPA extended ?*** */
OP_HANDLER( cmpa_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A - t;
CLR_NZC;
@@ -1210,7 +1210,7 @@ OP_HANDLER( cmpa_ex )
/* $c2 SBCA extended ?*** */
OP_HANDLER( sbca_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1221,7 +1221,7 @@ OP_HANDLER( sbca_ex )
/* $c3 CPX extended -*** */
OP_HANDLER( cpx_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = X - t;
CLR_NZC;
@@ -1231,7 +1231,7 @@ OP_HANDLER( cpx_ex )
/* $c4 ANDA extended -**- */
OP_HANDLER( anda_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
A &= t;
CLR_NZ;
@@ -1241,7 +1241,7 @@ OP_HANDLER( anda_ex )
/* $c5 BITA extended -**- */
OP_HANDLER( bita_ex )
{
- UINT8 t,r;
+ uint8_t t,r;
EXTBYTE(t);
r = A & t;
CLR_NZ;
@@ -1268,7 +1268,7 @@ OP_HANDLER( sta_ex )
/* $c8 EORA extended -**- */
OP_HANDLER( eora_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
A ^= t;
CLR_NZ;
@@ -1278,7 +1278,7 @@ OP_HANDLER( eora_ex )
/* $c9 ADCA extended **** */
OP_HANDLER( adca_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A + t + (CC & 0x01);
CLR_HNZC;
@@ -1290,7 +1290,7 @@ OP_HANDLER( adca_ex )
/* $ca ORA extended -**- */
OP_HANDLER( ora_ex )
{
- UINT8 t;
+ uint8_t t;
EXTBYTE(t);
A |= t;
CLR_NZ;
@@ -1300,7 +1300,7 @@ OP_HANDLER( ora_ex )
/* $cb ADDA extended **** */
OP_HANDLER( adda_ex )
{
- UINT16 t,r;
+ uint16_t t,r;
EXTBYTE(t);
r = A + t;
CLR_HNZC;
@@ -1344,7 +1344,7 @@ OP_HANDLER( stx_ex )
/* $d0 SUBA indexed, 2 byte offset ?*** */
OP_HANDLER( suba_ix2 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX2BYTE(t);
r = A - t;
CLR_NZC;
@@ -1355,7 +1355,7 @@ OP_HANDLER( suba_ix2 )
/* $d1 CMPA indexed, 2 byte offset ?*** */
OP_HANDLER( cmpa_ix2 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX2BYTE(t);
r = A - t;
CLR_NZC;
@@ -1365,7 +1365,7 @@ OP_HANDLER( cmpa_ix2 )
/* $d2 SBCA indexed, 2 byte offset ?*** */
OP_HANDLER( sbca_ix2 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX2BYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1376,7 +1376,7 @@ OP_HANDLER( sbca_ix2 )
/* $d3 CPX indexed, 2 byte offset -*** */
OP_HANDLER( cpx_ix2 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX2BYTE(t);
r = X - t;
CLR_NZC;
@@ -1386,7 +1386,7 @@ OP_HANDLER( cpx_ix2 )
/* $d4 ANDA indexed, 2 byte offset -**- */
OP_HANDLER( anda_ix2 )
{
- UINT8 t;
+ uint8_t t;
IDX2BYTE(t);
A &= t;
CLR_NZ;
@@ -1396,7 +1396,7 @@ OP_HANDLER( anda_ix2 )
/* $d5 BITA indexed, 2 byte offset -**- */
OP_HANDLER( bita_ix2 )
{
- UINT8 t,r;
+ uint8_t t,r;
IDX2BYTE(t);
r = A & t;
CLR_NZ;
@@ -1423,7 +1423,7 @@ OP_HANDLER( sta_ix2 )
/* $d8 EORA indexed, 2 byte offset -**- */
OP_HANDLER( eora_ix2 )
{
- UINT8 t;
+ uint8_t t;
IDX2BYTE(t);
A ^= t;
CLR_NZ;
@@ -1433,7 +1433,7 @@ OP_HANDLER( eora_ix2 )
/* $d9 ADCA indexed, 2 byte offset **** */
OP_HANDLER( adca_ix2 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX2BYTE(t);
r = A + t + (CC & 0x01);
CLR_HNZC;
@@ -1445,7 +1445,7 @@ OP_HANDLER( adca_ix2 )
/* $da ORA indexed, 2 byte offset -**- */
OP_HANDLER( ora_ix2 )
{
- UINT8 t;
+ uint8_t t;
IDX2BYTE(t);
A |= t;
CLR_NZ;
@@ -1455,7 +1455,7 @@ OP_HANDLER( ora_ix2 )
/* $db ADDA indexed, 2 byte offset **** */
OP_HANDLER( adda_ix2 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX2BYTE(t);
r = A + t;
CLR_HNZC;
@@ -1499,7 +1499,7 @@ OP_HANDLER( stx_ix2 )
/* $e0 SUBA indexed, 1 byte offset ?*** */
OP_HANDLER( suba_ix1 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX1BYTE(t);
r = A - t;
CLR_NZC;
@@ -1510,7 +1510,7 @@ OP_HANDLER( suba_ix1 )
/* $e1 CMPA indexed, 1 byte offset ?*** */
OP_HANDLER( cmpa_ix1 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX1BYTE(t);
r = A - t;
CLR_NZC;
@@ -1520,7 +1520,7 @@ OP_HANDLER( cmpa_ix1 )
/* $e2 SBCA indexed, 1 byte offset ?*** */
OP_HANDLER( sbca_ix1 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX1BYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1531,7 +1531,7 @@ OP_HANDLER( sbca_ix1 )
/* $e3 CPX indexed, 1 byte offset -*** */
OP_HANDLER( cpx_ix1 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX1BYTE(t);
r = X - t;
CLR_NZC;
@@ -1541,7 +1541,7 @@ OP_HANDLER( cpx_ix1 )
/* $e4 ANDA indexed, 1 byte offset -**- */
OP_HANDLER( anda_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t);
A &= t;
CLR_NZ;
@@ -1551,7 +1551,7 @@ OP_HANDLER( anda_ix1 )
/* $e5 BITA indexed, 1 byte offset -**- */
OP_HANDLER( bita_ix1 )
{
- UINT8 t,r;
+ uint8_t t,r;
IDX1BYTE(t);
r = A & t;
CLR_NZ;
@@ -1578,7 +1578,7 @@ OP_HANDLER( sta_ix1 )
/* $e8 EORA indexed, 1 byte offset -**- */
OP_HANDLER( eora_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t);
A ^= t;
CLR_NZ;
@@ -1588,7 +1588,7 @@ OP_HANDLER( eora_ix1 )
/* $e9 ADCA indexed, 1 byte offset **** */
OP_HANDLER( adca_ix1 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX1BYTE(t);
r = A + t + (CC & 0x01);
CLR_HNZC;
@@ -1600,7 +1600,7 @@ OP_HANDLER( adca_ix1 )
/* $ea ORA indexed, 1 byte offset -**- */
OP_HANDLER( ora_ix1 )
{
- UINT8 t;
+ uint8_t t;
IDX1BYTE(t);
A |= t;
CLR_NZ;
@@ -1610,7 +1610,7 @@ OP_HANDLER( ora_ix1 )
/* $eb ADDA indexed, 1 byte offset **** */
OP_HANDLER( adda_ix1 )
{
- UINT16 t,r;
+ uint16_t t,r;
IDX1BYTE(t);
r = A + t;
CLR_HNZC;
@@ -1654,7 +1654,7 @@ OP_HANDLER( stx_ix1 )
/* $f0 SUBA indexed ?*** */
OP_HANDLER( suba_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A - t;
CLR_NZC;
@@ -1665,7 +1665,7 @@ OP_HANDLER( suba_ix )
/* $f1 CMPA indexed ?*** */
OP_HANDLER( cmpa_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A - t;
CLR_NZC;
@@ -1675,7 +1675,7 @@ OP_HANDLER( cmpa_ix )
/* $f2 SBCA indexed ?*** */
OP_HANDLER( sbca_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1686,7 +1686,7 @@ OP_HANDLER( sbca_ix )
/* $f3 CPX indexed -*** */
OP_HANDLER( cpx_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = X - t;
CLR_NZC;
@@ -1696,7 +1696,7 @@ OP_HANDLER( cpx_ix )
/* $f4 ANDA indexed -**- */
OP_HANDLER( anda_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
A &= t;
CLR_NZ;
@@ -1706,7 +1706,7 @@ OP_HANDLER( anda_ix )
/* $f5 BITA indexed -**- */
OP_HANDLER( bita_ix )
{
- UINT8 t,r;
+ uint8_t t,r;
IDXBYTE(t);
r = A & t;
CLR_NZ;
@@ -1733,7 +1733,7 @@ OP_HANDLER( sta_ix )
/* $f8 EORA indexed -**- */
OP_HANDLER( eora_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
A ^= t;
CLR_NZ;
@@ -1743,7 +1743,7 @@ OP_HANDLER( eora_ix )
/* $f9 ADCA indexed **** */
OP_HANDLER( adca_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A + t + (CC & 0x01);
CLR_HNZC;
@@ -1755,7 +1755,7 @@ OP_HANDLER( adca_ix )
/* $fa ORA indexed -**- */
OP_HANDLER( ora_ix )
{
- UINT8 t;
+ uint8_t t;
IDXBYTE(t);
A |= t;
CLR_NZ;
@@ -1765,7 +1765,7 @@ OP_HANDLER( ora_ix )
/* $fb ADDA indexed **** */
OP_HANDLER( adda_ix )
{
- UINT16 t,r;
+ uint16_t t,r;
IDXBYTE(t);
r = A + t;
CLR_HNZC;
diff --git a/src/devices/cpu/m6805/m6805.cpp b/src/devices/cpu/m6805/m6805.cpp
index c95f45d32df..8e7b6b963f8 100644
--- a/src/devices/cpu/m6805/m6805.cpp
+++ b/src/devices/cpu/m6805/m6805.cpp
@@ -14,9 +14,9 @@
6809 Microcomputer Programming & Interfacing with Experiments"
by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc.
- System dependencies: UINT16 must be 16 bit unsigned int
- UINT8 must be 8 bit unsigned int
- UINT32 must be more than 16 bits
+ System dependencies: uint16_t must be 16 bit unsigned int
+ uint8_t must be 8 bit unsigned int
+ uint32_t must be more than 16 bits
arrays up to 65536 bytes must be supported
machine must be twos complement
@@ -111,12 +111,12 @@
/* macros for CC -- CC bits affected should be reset before calling */
#define SET_Z(a) if(!a)SEZ
-#define SET_Z8(a) SET_Z((UINT8)a)
+#define SET_Z8(a) SET_Z((uint8_t)a)
#define SET_N8(a) CC|=((a&0x80)>>5)
#define SET_H(a,b,r) CC|=((a^b^r)&0x10)
#define SET_C8(a) CC|=((a&0x100)>>8)
-const UINT8 m6805_base_device::m_flags8i[256]= /* increment */
+const uint8_t m6805_base_device::m_flags8i[256]= /* increment */
{
0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -136,7 +136,7 @@ const UINT8 m6805_base_device::m_flags8i[256]= /* increment */
0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04
};
-const UINT8 m6805_base_device::m_flags8d[256]= /* decrement */
+const uint8_t m6805_base_device::m_flags8d[256]= /* decrement */
{
0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -162,8 +162,8 @@ const UINT8 m6805_base_device::m_flags8d[256]= /* decrement */
#define SET_NZ8(a) {SET_N8(a); SET_Z(a);}
#define SET_FLAGS8(a,b,r) {SET_N8(r); SET_Z8(r); SET_C8(r);}
-/* for treating an unsigned UINT8 as a signed INT16 */
-#define SIGNED(b) ((INT16)(b & 0x80 ? b | 0xff00 : b))
+/* for treating an unsigned uint8_t as a signed int16_t */
+#define SIGNED(b) ((int16_t)(b & 0x80 ? b | 0xff00 : b))
/* Macros for addressing modes */
#define DIRECT EAD=0; IMMBYTE(m_ea.b.l)
@@ -195,10 +195,10 @@ const UINT8 m6805_base_device::m_flags8d[256]= /* decrement */
#define IDX1BYTE(b) {INDEXED1; b = RM(EAD);}
#define IDX2BYTE(b) {INDEXED2; b = RM(EAD);}
/* Macros for branch instructions */
-#define BRANCH(f) { UINT8 t; IMMBYTE(t); if(f) { PC += SIGNED(t); } }
+#define BRANCH(f) { uint8_t t; IMMBYTE(t); if(f) { PC += SIGNED(t); } }
/* what they say it is ... */
-const UINT8 m6805_base_device::m_cycles1[] =
+const uint8_t m6805_base_device::m_cycles1[] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ 10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,
@@ -223,7 +223,7 @@ const UINT8 m6805_base_device::m_cycles1[] =
/* pre-clear a PAIR union; clearing h2 and h3 only might be faster? */
#define CLEAR_PAIR(p) p->d = 0
-void m6805_base_device::rd_s_handler_b(UINT8 *b)
+void m6805_base_device::rd_s_handler_b(uint8_t *b)
{
SP_INC;
*b = RM( S );
@@ -238,7 +238,7 @@ void m6805_base_device::rd_s_handler_w(PAIR *p)
p->b.l = RM( S );
}
-void m6805_base_device::wr_s_handler_b(UINT8 *b)
+void m6805_base_device::wr_s_handler_b(uint8_t *b)
{
WM( S, *b );
SP_DEC;
@@ -252,7 +252,7 @@ void m6805_base_device::wr_s_handler_w(PAIR *p)
SP_DEC;
}
-void m6805_base_device::RM16(UINT32 addr, PAIR *p)
+void m6805_base_device::RM16(uint32_t addr, PAIR *p)
{
CLEAR_PAIR(p);
p->b.h = RM(addr);
@@ -409,7 +409,7 @@ void m6805_base_device::interrupt()
// m6809_base_device - constructor
//-------------------------------------------------
-m6805_base_device::m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, const device_type type, const char *name, UINT32 addr_width, const char *shortname, const char *source)
+m6805_base_device::m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, 8, addr_width)
{
@@ -518,7 +518,7 @@ void m6805_base_device::state_string_export(const device_state_entry &entry, std
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 m6805_base_device::disasm_min_opcode_bytes() const
+uint32_t m6805_base_device::disasm_min_opcode_bytes() const
{
return 1;
}
@@ -529,7 +529,7 @@ UINT32 m6805_base_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 m6805_base_device::disasm_max_opcode_bytes() const
+uint32_t m6805_base_device::disasm_max_opcode_bytes() const
{
return 3;
}
@@ -540,7 +540,7 @@ UINT32 m6805_base_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t m6805_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6805_base_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( m6805 );
return CPU_DISASSEMBLE_NAME(m6805)(this, buffer, pc, oprom, opram, options);
@@ -569,7 +569,7 @@ void m6805_device::execute_set_input(int inputnum, int state)
// clock into cycles per second
//-------------------------------------------------
-UINT64 m6805_base_device::execute_clocks_to_cycles(UINT64 clocks) const
+uint64_t m6805_base_device::execute_clocks_to_cycles(uint64_t clocks) const
{
return (clocks + 3) / 4;
}
@@ -580,7 +580,7 @@ UINT64 m6805_base_device::execute_clocks_to_cycles(UINT64 clocks) const
// count back to raw clocks
//-------------------------------------------------
-UINT64 m6805_base_device::execute_cycles_to_clocks(UINT64 cycles) const
+uint64_t m6805_base_device::execute_cycles_to_clocks(uint64_t cycles) const
{
return cycles * 4;
}
@@ -591,7 +591,7 @@ UINT64 m6805_base_device::execute_cycles_to_clocks(UINT64 cycles) const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 m6805_base_device::execute_min_cycles() const
+uint32_t m6805_base_device::execute_min_cycles() const
{
return 2;
}
@@ -602,7 +602,7 @@ UINT32 m6805_base_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 m6805_base_device::execute_max_cycles() const
+uint32_t m6805_base_device::execute_max_cycles() const
{
return 10;
}
@@ -613,7 +613,7 @@ UINT32 m6805_base_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 m6805_base_device::execute_input_lines() const
+uint32_t m6805_base_device::execute_input_lines() const
{
return 9;
}
@@ -622,7 +622,7 @@ UINT32 m6805_base_device::execute_input_lines() const
/* execute instructions on this CPU until icount expires */
void m6805_base_device::execute_run()
{
- UINT8 ireg;
+ uint8_t ireg;
S = SP_ADJUST( S ); /* Taken from CPU_SET_CONTEXT when pointer'afying */
diff --git a/src/devices/cpu/m6805/m6805.h b/src/devices/cpu/m6805/m6805.h
index 40fd8b3db9b..3b146d98ae1 100644
--- a/src/devices/cpu/m6805/m6805.h
+++ b/src/devices/cpu/m6805/m6805.h
@@ -26,7 +26,7 @@ class m6805_base_device : public cpu_device
{
public:
// construction/destruction
- m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, const device_type type, const char *name, UINT32 addr_width, const char *shortname, const char *source);
+ m6805_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, const char *name, uint32_t addr_width, const char *shortname, const char *source);
protected:
// device-level overrides
@@ -34,42 +34,42 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override = 0;
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override;
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override;
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
private:
// opcode/condition tables
- static const UINT8 m_flags8i[256];
- static const UINT8 m_flags8d[256];
- static const UINT8 m_cycles1[256];
+ static const uint8_t m_flags8i[256];
+ static const uint8_t m_flags8d[256];
+ static const uint8_t m_cycles1[256];
protected:
- void rd_s_handler_b(UINT8 *b);
+ void rd_s_handler_b(uint8_t *b);
void rd_s_handler_w(PAIR *p);
- void wr_s_handler_b(UINT8 *b);
+ void wr_s_handler_b(uint8_t *b);
void wr_s_handler_w(PAIR *p);
- void RM16(UINT32 addr, PAIR *p);
+ void RM16(uint32_t addr, PAIR *p);
- void brset(UINT8 bit);
- void brclr(UINT8 bit);
- void bset(UINT8 bit);
- void bclr(UINT8 bit);
+ void brset(uint8_t bit);
+ void brclr(uint8_t bit);
+ void bset(uint8_t bit);
+ void bclr(uint8_t bit);
void bra();
void brn();
@@ -267,15 +267,15 @@ protected:
// CPU registers
PAIR m_ea; /* effective address */
- UINT32 m_sp_mask; /* Stack pointer address mask */
- UINT32 m_sp_low; /* Stack pointer low water mark (or floor) */
+ uint32_t m_sp_mask; /* Stack pointer address mask */
+ uint32_t m_sp_low; /* Stack pointer low water mark (or floor) */
PAIR m_pc; /* Program counter */
PAIR m_s; /* Stack pointer */
- UINT8 m_a; /* Accumulator */
- UINT8 m_x; /* Index register */
- UINT8 m_cc; /* Condition codes */
+ uint8_t m_a; /* Accumulator */
+ uint8_t m_x; /* Index register */
+ uint8_t m_cc; /* Condition codes */
- UINT16 m_pending_interrupts; /* MB */
+ uint16_t m_pending_interrupts; /* MB */
int m_irq_state[9]; /* KW Additional lines for HD63705 */
int m_nmi_state;
@@ -294,7 +294,7 @@ class m6805_device : public m6805_base_device
{
public:
// construction/destruction
- m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6805_base_device(mconfig, tag, owner, clock, M6805, "M6805", 12, "m6805", __FILE__) { }
protected:
@@ -307,7 +307,7 @@ class m68hc05eg_device : public m6805_base_device
{
public:
// construction/destruction
- m68hc05eg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ m68hc05eg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6805_base_device(mconfig, tag, owner, clock, M68HC05EG, "M68HC05EG", 13, "m68hc05eg", __FILE__) { }
protected:
@@ -325,7 +325,7 @@ class m68705_device : public m6805_base_device
{
public:
// construction/destruction
- m68705_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ m68705_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6805_base_device(mconfig, tag, owner, clock, M68705, "M68705", 12, "m68705", __FILE__) { }
protected:
@@ -343,7 +343,7 @@ class hd63705_device : public m6805_base_device
{
public:
// construction/destruction
- hd63705_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ hd63705_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6805_base_device(mconfig, tag, owner, clock, HD63705, "HD63705", 16, "hd63705", __FILE__) { }
protected:
diff --git a/src/devices/cpu/m6809/6309dasm.cpp b/src/devices/cpu/m6809/6309dasm.cpp
index 47637e22472..16f4c3b1752 100644
--- a/src/devices/cpu/m6809/6309dasm.cpp
+++ b/src/devices/cpu/m6809/6309dasm.cpp
@@ -29,10 +29,10 @@
// Opcode structure
struct opcodeinfo
{
- UINT8 opcode; // 8-bit opcode value
- UINT8 length; // Opcode length in bytes
+ uint8_t opcode; // 8-bit opcode value
+ uint8_t length; // Opcode length in bytes
char name[6]; // Opcode name
- UINT8 mode; // Addressing mode
+ uint8_t mode; // Addressing mode
unsigned flags; // Disassembly flags
};
@@ -608,8 +608,8 @@ static const char *const tfm_s[] = { "%s+,%s+", "%s-,%s-", "%s+,%s", "%s,%s+" };
CPU_DISASSEMBLE( hd6309 )
{
- UINT8 opcode, mode, pb, pbm, reg;
- const UINT8 *operandarray;
+ uint8_t opcode, mode, pb, pbm, reg;
+ const uint8_t *operandarray;
unsigned int ea, flags;
int numoperands, offset, indirect;
@@ -712,12 +712,12 @@ CPU_DISASSEMBLE( hd6309 )
break;
case REL:
- offset = (INT8)operandarray[0];
+ offset = (int8_t)operandarray[0];
buffer += sprintf(buffer, "$%04X", (pc + offset) & 0xffff);
break;
case LREL:
- offset = (INT16)((operandarray[0] << 8) + operandarray[1]);
+ offset = (int16_t)((operandarray[0] << 8) + operandarray[1]);
buffer += sprintf(buffer, "$%04X", (pc + offset) & 0xffff);
break;
@@ -766,7 +766,7 @@ CPU_DISASSEMBLE( hd6309 )
buffer += sprintf(buffer, ",W");
break;
case 0x01:
- offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
+ offset = (int16_t)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%04X,W", (offset < 0) ? -offset : offset);
@@ -815,14 +815,14 @@ CPU_DISASSEMBLE( hd6309 )
break;
case 0x88: // (+/- 7 bit offset),R
- offset = (INT8)opram[p++];
+ offset = (int8_t)opram[p++];
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%02X,", (offset < 0) ? -offset : offset);
buffer += sprintf(buffer, "%s", hd6309_regs[reg]);
break;
case 0x89: // (+/- 15 bit offset),R
- offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
+ offset = (int16_t)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%04X,", (offset < 0) ? -offset : offset);
@@ -838,13 +838,13 @@ CPU_DISASSEMBLE( hd6309 )
break;
case 0x8c: // (+/- 7 bit offset),PC
- offset = (INT8)opram[p++];
+ offset = (int8_t)opram[p++];
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%02X,PC", (offset < 0) ? -offset : offset);
break;
case 0x8d: // (+/- 15 bit offset),PC
- offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
+ offset = (int16_t)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%04X,PC", (offset < 0) ? -offset : offset);
@@ -857,7 +857,7 @@ CPU_DISASSEMBLE( hd6309 )
case 0x8f: // address or operations relative to W
if (indirect)
{
- ea = (UINT16)((opram[p+0] << 8) + opram[p+1]);
+ ea = (uint16_t)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "$%04X", ea);
break;
@@ -870,7 +870,7 @@ CPU_DISASSEMBLE( hd6309 )
buffer += sprintf(buffer, ",W");
break;
case 0x01:
- offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
+ offset = (int16_t)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%04X,W", (offset < 0) ? -offset : offset);
diff --git a/src/devices/cpu/m6809/6809dasm.cpp b/src/devices/cpu/m6809/6809dasm.cpp
index b2f3f44a7bb..971abc9b2a8 100644
--- a/src/devices/cpu/m6809/6809dasm.cpp
+++ b/src/devices/cpu/m6809/6809dasm.cpp
@@ -25,10 +25,10 @@
// Opcode structure
struct opcodeinfo
{
- UINT8 opcode; // 8-bit opcode value
- UINT8 length; // Opcode length in bytes
+ uint8_t opcode; // 8-bit opcode value
+ uint8_t length; // Opcode length in bytes
char name[6]; // Opcode name
- UINT8 mode; // Addressing mode
+ uint8_t mode; // Addressing mode
unsigned flags; // Disassembly flags
};
@@ -368,8 +368,8 @@ static const char *const m6809_regs_te[16] =
CPU_DISASSEMBLE( m6809 )
{
- UINT8 opcode, mode, pb, pbm, reg;
- const UINT8 *operandarray;
+ uint8_t opcode, mode, pb, pbm, reg;
+ const uint8_t *operandarray;
unsigned int ea, flags;
int numoperands, offset, indirect;
int i, p = 0, page = 0, opcode_found;
@@ -467,12 +467,12 @@ CPU_DISASSEMBLE( m6809 )
break;
case REL:
- offset = (INT8)operandarray[0];
+ offset = (int8_t)operandarray[0];
buffer += sprintf(buffer, "$%04X", (pc + offset) & 0xffff);
break;
case LREL:
- offset = (INT16)((operandarray[0] << 8) + operandarray[1]);
+ offset = (int16_t)((operandarray[0] << 8) + operandarray[1]);
buffer += sprintf(buffer, "$%04X", (pc + offset) & 0xffff);
break;
@@ -532,14 +532,14 @@ CPU_DISASSEMBLE( m6809 )
break;
case 0x88: // (+/- 7 bit offset),R
- offset = (INT8)opram[p++];
+ offset = (int8_t)opram[p++];
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%02X,", (offset < 0) ? -offset : offset);
buffer += sprintf(buffer, "%s", m6809_regs[reg]);
break;
case 0x89: // (+/- 15 bit offset),R
- offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
+ offset = (int16_t)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%04X,", (offset < 0) ? -offset : offset);
@@ -555,13 +555,13 @@ CPU_DISASSEMBLE( m6809 )
break;
case 0x8c: // (+/- 7 bit offset),PC
- offset = (INT8)opram[p++];
+ offset = (int8_t)opram[p++];
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%02X,PC", (offset < 0) ? -offset : offset);
break;
case 0x8d: // (+/- 15 bit offset),PC
- offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
+ offset = (int16_t)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%04X,PC", (offset < 0) ? -offset : offset);
@@ -572,7 +572,7 @@ CPU_DISASSEMBLE( m6809 )
break;
case 0x8f: // address
- ea = (UINT16)((opram[p+0] << 8) + opram[p+1]);
+ ea = (uint16_t)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "$%04X", ea);
break;
diff --git a/src/devices/cpu/m6809/base6x09.ops b/src/devices/cpu/m6809/base6x09.ops
index c9fccad7d38..8a36ecf2b78 100644
--- a/src/devices/cpu/m6809/base6x09.ops
+++ b/src/devices/cpu/m6809/base6x09.ops
@@ -50,7 +50,7 @@ INTERRUPT_VECTOR:
NEG8:
@m_temp.b.l = read_operand();
- m_temp.b.l = set_flags(CC_NZVC, (UINT8)0, m_temp.b.l, -m_temp.b.l);
+ m_temp.b.l = set_flags(CC_NZVC, (uint8_t)0, m_temp.b.l, -m_temp.b.l);
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
@@ -59,7 +59,7 @@ COM8:
@m_temp.b.l = read_operand();
m_cc &= ~CC_V;
m_cc |= CC_C;
- m_temp.b.l = set_flags(CC_NZ, (UINT8) ~m_temp.b.l);
+ m_temp.b.l = set_flags(CC_NZ, (uint8_t) ~m_temp.b.l);
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
@@ -68,14 +68,14 @@ LSR8:
@m_temp.b.l = read_operand();
m_cc &= ~CC_C;
m_cc |= (m_temp.b.l & 1) ? CC_C : 0;
- m_temp.b.l = set_flags<UINT8>(CC_NZ, m_temp.b.l >> 1);
+ m_temp.b.l = set_flags<uint8_t>(CC_NZ, m_temp.b.l >> 1);
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
ROR8:
@m_temp.b.l = read_operand();
- m_temp.b.l = set_flags<UINT8>(CC_NZ, rotate_right(m_temp.b.l));
+ m_temp.b.l = set_flags<uint8_t>(CC_NZ, rotate_right(m_temp.b.l));
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
@@ -84,35 +84,35 @@ ASR8:
@m_temp.b.l = read_operand();
m_cc &= ~CC_NZC;
m_cc |= (m_temp.b.l & 1) ? CC_C : 0;
- m_temp.b.l = set_flags<UINT8>(CC_NZ, ((INT8) m_temp.b.l) >> 1);
+ m_temp.b.l = set_flags<uint8_t>(CC_NZ, ((int8_t) m_temp.b.l) >> 1);
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
ASL8:
@m_temp.b.l = read_operand();
- m_temp.b.l = set_flags<UINT8>(CC_NZVC, m_temp.b.l, m_temp.b.l, m_temp.b.l << 1);
+ m_temp.b.l = set_flags<uint8_t>(CC_NZVC, m_temp.b.l, m_temp.b.l, m_temp.b.l << 1);
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
ROL8:
@m_temp.b.l = read_operand();
- m_temp.b.l = set_flags<UINT8>(CC_NZV, m_temp.b.l, m_temp.b.l, rotate_left(m_temp.b.l));
+ m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, m_temp.b.l, rotate_left(m_temp.b.l));
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
DEC8:
@m_temp.b.l = read_operand();
- m_temp.b.l = set_flags<UINT8>(CC_NZV, m_temp.b.l, 1, m_temp.b.l - 1);
+ m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, 1, m_temp.b.l - 1);
@eat(hd6309_native_mode() && is_register_addressing_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
INC8:
@m_temp.b.l = read_operand();
- m_temp.b.l = set_flags<UINT8>(CC_NZV, m_temp.b.l, 1, m_temp.b.l + 1);
+ m_temp.b.l = set_flags<uint8_t>(CC_NZV, m_temp.b.l, 1, m_temp.b.l + 1);
@eat(hd6309_native_mode() && is_register_addressing_mode() ? 0 : 1);
@write_operand(m_temp.b.l);
return;
@@ -139,7 +139,7 @@ CLR8:
NEG16:
m_temp.b.h = read_operand(0);
m_temp.b.l = read_operand(1);
- m_temp.w = set_flags(CC_NZVC, (UINT16)0, m_temp.w, -m_temp.w);
+ m_temp.w = set_flags(CC_NZVC, (uint16_t)0, m_temp.w, -m_temp.w);
eat(hd6309_native_mode() ? 0 : 1);
write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -150,7 +150,7 @@ LSR16:
@m_temp.b.l = read_operand(1);
m_cc &= ~CC_C;
m_cc |= (m_temp.w & 1) ? CC_C : 0;
- m_temp.w = set_flags<UINT16>(CC_NZ, m_temp.w >> 1);
+ m_temp.w = set_flags<uint16_t>(CC_NZ, m_temp.w >> 1);
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -159,7 +159,7 @@ LSR16:
ROR16:
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- m_temp.w = set_flags<UINT16>(CC_NZ, rotate_right(m_temp.w));
+ m_temp.w = set_flags<uint16_t>(CC_NZ, rotate_right(m_temp.w));
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -170,7 +170,7 @@ ASR16:
@m_temp.b.l = read_operand(1);
m_cc &= ~CC_NZC;
m_cc |= (m_temp.w & 1) ? CC_C : 0;
- m_temp.w = set_flags<UINT16>(CC_NZ, ((INT16) m_temp.w) >> 1);
+ m_temp.w = set_flags<uint16_t>(CC_NZ, ((int16_t) m_temp.w) >> 1);
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -179,7 +179,7 @@ ASR16:
ASL16:
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- m_temp.w = set_flags<UINT16>(CC_NZVC, m_temp.w, m_temp.w, m_temp.w << 1);
+ m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, m_temp.w, m_temp.w << 1);
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -188,7 +188,7 @@ ASL16:
ROL16:
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- m_temp.w = set_flags<UINT16>(CC_NZV, rotate_left(m_temp.w));
+ m_temp.w = set_flags<uint16_t>(CC_NZV, rotate_left(m_temp.w));
@eat(hd6309_native_mode() ? 0 : 1);
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -197,7 +197,7 @@ ROL16:
DEC16:
m_temp.b.h = read_operand(0);
m_temp.b.l = read_operand(1);
- m_temp.w = set_flags<UINT16>(CC_NZVC, m_temp.w, 1, m_temp.w - 1);
+ m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, 1, m_temp.w - 1);
eat(hd6309_native_mode() ? 0 : 1);
write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -206,7 +206,7 @@ DEC16:
INC16:
m_temp.b.h = read_operand(0);
m_temp.b.l = read_operand(1);
- m_temp.w = set_flags<UINT16>(CC_NZVC, m_temp.w, 1, m_temp.w + 1);
+ m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, 1, m_temp.w + 1);
eat(hd6309_native_mode() ? 0 : 1);
write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -239,33 +239,33 @@ CMP8:
return;
SBC8:
- m_temp.w = (UINT16)read_operand() + (m_cc & CC_C ? 1 : 0);
+ m_temp.w = (uint16_t)read_operand() + (m_cc & CC_C ? 1 : 0);
regop8() = set_flags(CC_NZVC, regop8(), m_temp.b.l, regop8() - m_temp.w);
return;
AND8:
m_cc &= ~CC_V;
- regop8() = set_flags(CC_NZ, (UINT8)0, regop8(), regop8() & read_operand());
+ regop8() = set_flags(CC_NZ, (uint8_t)0, regop8(), regop8() & read_operand());
return;
BIT8:
m_cc &= ~CC_V;
- set_flags(CC_NZ, (UINT8)0, regop8(), regop8() & read_operand());
+ set_flags(CC_NZ, (uint8_t)0, regop8(), regop8() & read_operand());
return;
EOR8:
m_cc &= ~CC_V;
- regop8() = set_flags(CC_NZ, (UINT8)0, regop8(), regop8() ^ read_operand());
+ regop8() = set_flags(CC_NZ, (uint8_t)0, regop8(), regop8() ^ read_operand());
return;
ADC8:
- m_temp.w = (UINT16)read_operand() + (m_cc & CC_C ? 1 : 0);
+ m_temp.w = (uint16_t)read_operand() + (m_cc & CC_C ? 1 : 0);
regop8() = set_flags(add8_sets_h() ? CC_HNZVC : CC_NZVC, regop8(), m_temp.b.l, regop8() + m_temp.w);
return;
OR8:
m_cc &= ~CC_V;
- regop8() = set_flags(CC_NZ, (UINT8)0, regop8(), regop8() | read_operand());
+ regop8() = set_flags(CC_NZ, (uint8_t)0, regop8(), regop8() | read_operand());
return;
ADD8:
@@ -356,7 +356,7 @@ ANDCC:
return;
SEX:
- m_q.r.d = set_flags<UINT16>(CC_NZ, (INT8) m_q.r.b);
+ m_q.r.d = set_flags<uint16_t>(CC_NZ, (int8_t) m_q.r.b);
eat(hd6309_native_mode() ? 0 : 1);
return;
@@ -365,7 +365,7 @@ BRANCH:
eat(1);
if (branch_taken())
{
- m_pc.w += (INT8) m_temp.b.l;
+ m_pc.w += (int8_t) m_temp.b.l;
}
return;
@@ -382,14 +382,14 @@ LBRANCH:
BSR:
@m_temp.b.l = read_opcode_arg();
- m_ea.w = m_pc.w + (INT8) m_temp.b.l;
+ m_ea.w = m_pc.w + (int8_t) m_temp.b.l;
@eat(hd6309_native_mode() ? 2 : 3);
goto GOTO_SUBROUTINE;
LBSR:
@m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg();
- m_ea.w = m_pc.w + (INT16) m_temp.w;
+ m_ea.w = m_pc.w + (int16_t) m_temp.w;
@eat(hd6309_native_mode() ? 2 : 4);
goto GOTO_SUBROUTINE;
@@ -528,7 +528,7 @@ SOFTWARE_INTERRUPT:
goto INTERRUPT_VECTOR;
DIRECT:
- @set_ea(((UINT16)m_dp << 8) | read_opcode_arg());
+ @set_ea(((uint16_t)m_dp << 8) | read_opcode_arg());
@eat(hd6309_native_mode() ? 0 : 1);
return;
diff --git a/src/devices/cpu/m6809/hd6309.cpp b/src/devices/cpu/m6809/hd6309.cpp
index 213464d90dc..ef9ff98f4f2 100644
--- a/src/devices/cpu/m6809/hd6309.cpp
+++ b/src/devices/cpu/m6809/hd6309.cpp
@@ -19,9 +19,9 @@
6809 Microcomputer Programming & Interfacing with Experiments"
by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc.
- System dependencies: UINT16 must be 16 bit unsigned int
- UINT8 must be 8 bit unsigned int
- UINT32 must be more than 16 bits
+ System dependencies: uint16_t must be 16 bit unsigned int
+ uint8_t must be 8 bit unsigned int
+ uint32_t must be more than 16 bits
arrays up to 65536 bytes must be supported
machine must be twos complement
@@ -131,7 +131,7 @@ const device_type HD6309 = &device_creator<hd6309_device>;
// hd6309_device - constructor
//-------------------------------------------------
-hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+hd6309_device::hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6809_base_device(mconfig, "HD6309", tag, owner, clock, HD6309, 4, "hd6309", __FILE__),
m_md(0),
m_temp_im(0)
@@ -289,7 +289,7 @@ void hd6309_device::device_post_load()
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 hd6309_device::disasm_min_opcode_bytes() const
+uint32_t hd6309_device::disasm_min_opcode_bytes() const
{
return 1;
}
@@ -301,7 +301,7 @@ UINT32 hd6309_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 hd6309_device::disasm_max_opcode_bytes() const
+uint32_t hd6309_device::disasm_max_opcode_bytes() const
{
return 5;
}
@@ -313,7 +313,7 @@ UINT32 hd6309_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t hd6309_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t hd6309_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( hd6309 );
return CPU_DISASSEMBLE_NAME(hd6309)(this, buffer, pc, oprom, opram, options);
@@ -325,7 +325,7 @@ offs_t hd6309_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
// read_operand
//-------------------------------------------------
-inline UINT8 hd6309_device::read_operand()
+inline uint8_t hd6309_device::read_operand()
{
switch(m_addressing_mode)
{
@@ -344,7 +344,7 @@ inline UINT8 hd6309_device::read_operand()
// read_operand
//-------------------------------------------------
-inline UINT8 hd6309_device::read_operand(int ordinal)
+inline uint8_t hd6309_device::read_operand(int ordinal)
{
switch(m_addressing_mode)
{
@@ -368,7 +368,7 @@ inline UINT8 hd6309_device::read_operand(int ordinal)
// write_operand
//-------------------------------------------------
-inline void hd6309_device::write_operand(UINT8 data)
+inline void hd6309_device::write_operand(uint8_t data)
{
switch(m_addressing_mode)
{
@@ -387,7 +387,7 @@ inline void hd6309_device::write_operand(UINT8 data)
// write_operand
//-------------------------------------------------
-inline void hd6309_device::write_operand(int ordinal, UINT8 data)
+inline void hd6309_device::write_operand(int ordinal, uint8_t data)
{
switch(m_addressing_mode)
{
@@ -410,7 +410,7 @@ inline void hd6309_device::write_operand(int ordinal, UINT8 data)
// bittest_register
//-------------------------------------------------
-inline UINT8 &hd6309_device::bittest_register()
+inline uint8_t &hd6309_device::bittest_register()
{
switch(m_temp_im & 0xC0)
{
@@ -460,9 +460,9 @@ inline void hd6309_device::bittest_set(bool result)
// read_exgtfr_register
//-------------------------------------------------
-inline m6809_base_device::exgtfr_register hd6309_device::read_exgtfr_register(UINT8 reg)
+inline m6809_base_device::exgtfr_register hd6309_device::read_exgtfr_register(uint8_t reg)
{
- UINT16 value;
+ uint16_t value;
switch(reg & 0x0F)
{
@@ -474,20 +474,20 @@ inline m6809_base_device::exgtfr_register hd6309_device::read_exgtfr_register(UI
case 5: value = m_pc.w; break; // PC
case 6: value = m_q.r.w; break; // W
case 7: value = m_v.w; break; // V
- case 8: value = ((UINT16) m_q.r.a) << 8 | m_q.r.a; break; // A
- case 9: value = ((UINT16) m_q.r.b) << 8 | m_q.r.b; break; // B
- case 10: value = ((UINT16) m_cc) << 8 | m_cc; break; // CC
- case 11: value = ((UINT16) m_dp) << 8 | m_dp; break; // DP
+ case 8: value = ((uint16_t) m_q.r.a) << 8 | m_q.r.a; break; // A
+ case 9: value = ((uint16_t) m_q.r.b) << 8 | m_q.r.b; break; // B
+ case 10: value = ((uint16_t) m_cc) << 8 | m_cc; break; // CC
+ case 11: value = ((uint16_t) m_dp) << 8 | m_dp; break; // DP
case 12: value = 0; break; // 0
case 13: value = 0; break; // 0
- case 14: value = ((UINT16) m_q.r.e) << 8 | m_q.r.e; break; // E
- case 15: value = ((UINT16) m_q.r.f) << 8 | m_q.r.f; break; // F
+ case 14: value = ((uint16_t) m_q.r.e) << 8 | m_q.r.e; break; // E
+ case 15: value = ((uint16_t) m_q.r.f) << 8 | m_q.r.f; break; // F
default:
fatalerror("Should not reach here");
}
exgtfr_register result;
- result.byte_value = (UINT8)value;
+ result.byte_value = (uint8_t)value;
result.word_value = value;
return result;
}
@@ -498,7 +498,7 @@ inline m6809_base_device::exgtfr_register hd6309_device::read_exgtfr_register(UI
// write_exgtfr_register
//-------------------------------------------------
-inline void hd6309_device::write_exgtfr_register(UINT8 reg, m6809_base_device::exgtfr_register value)
+inline void hd6309_device::write_exgtfr_register(uint8_t reg, m6809_base_device::exgtfr_register value)
{
switch(reg & 0x0F)
{
@@ -510,14 +510,14 @@ inline void hd6309_device::write_exgtfr_register(UINT8 reg, m6809_base_device::e
case 5: m_pc.w = value.word_value; break; // PC
case 6: m_q.r.w = value.word_value; break; // W
case 7: m_v.w = value.word_value; break; // V
- case 8: m_q.r.a = (UINT8) (value.word_value >> 8); break; // A
- case 9: m_q.r.b = (UINT8) (value.word_value >> 0); break; // B
- case 10: m_cc = (UINT8) (value.word_value >> 0); break; // CC
- case 11: m_dp = (UINT8) (value.word_value >> 8); break; // DP
+ case 8: m_q.r.a = (uint8_t) (value.word_value >> 8); break; // A
+ case 9: m_q.r.b = (uint8_t) (value.word_value >> 0); break; // B
+ case 10: m_cc = (uint8_t) (value.word_value >> 0); break; // CC
+ case 11: m_dp = (uint8_t) (value.word_value >> 8); break; // DP
case 12: break; // 0
case 13: break; // 0
- case 14: m_q.r.e = (UINT8) (value.word_value >> 8); break; // E
- case 15: m_q.r.f = (UINT8) (value.word_value >> 0); break; // F
+ case 14: m_q.r.e = (uint8_t) (value.word_value >> 8); break; // E
+ case 15: m_q.r.f = (uint8_t) (value.word_value >> 0); break; // F
default:
fatalerror("Should not reach here");
}
@@ -529,7 +529,7 @@ inline void hd6309_device::write_exgtfr_register(UINT8 reg, m6809_base_device::e
// tfr_read
//-------------------------------------------------
-inline bool hd6309_device::tfr_read(UINT8 opcode, UINT8 arg, UINT8 &data)
+inline bool hd6309_device::tfr_read(uint8_t opcode, uint8_t arg, uint8_t &data)
{
PAIR16 *reg;
@@ -562,7 +562,7 @@ inline bool hd6309_device::tfr_read(UINT8 opcode, UINT8 arg, UINT8 &data)
// tfr_write
//-------------------------------------------------
-inline bool hd6309_device::tfr_write(UINT8 opcode, UINT8 arg, UINT8 data)
+inline bool hd6309_device::tfr_write(uint8_t opcode, uint8_t arg, uint8_t data)
{
PAIR16 *reg;
@@ -597,7 +597,7 @@ inline bool hd6309_device::tfr_write(UINT8 opcode, UINT8 arg, UINT8 data)
void hd6309_device::register_register_op()
{
- UINT8 operand = read_opcode_arg();
+ uint8_t operand = read_opcode_arg();
// if the 8/16 bit values are mismatched, we need to promote
bool promote = ((operand & 0x80) ? true : false) != ((operand & 0x08) ? true : false);
@@ -661,9 +661,9 @@ void hd6309_device::register_register_op()
void hd6309_device::muld()
{
- UINT32 result;
- result = ((INT16) m_q.r.d) * ((INT16) m_temp.w);
- m_q.q = (set_flags<UINT32>(CC_NZ, result));
+ uint32_t result;
+ result = ((int16_t) m_q.r.d) * ((int16_t) m_temp.w);
+ m_q.q = (set_flags<uint32_t>(CC_NZ, result));
m_cc &= ~CC_VC;
}
@@ -674,21 +674,21 @@ void hd6309_device::muld()
bool hd6309_device::divq()
{
- INT32 result;
+ int32_t result;
// check for divide by zero
if (m_temp.w == 0)
return false;
- INT32 q = m_q.q;
- INT32 old_q = q;
+ int32_t q = m_q.q;
+ int32_t old_q = q;
// do the divide/modulo
- result = q / (INT16) m_temp.w;
- m_q.r.d = q % (INT16) m_temp.w;
+ result = q / (int16_t) m_temp.w;
+ m_q.r.d = q % (int16_t) m_temp.w;
// set NZ condition codes
- m_q.r.w = set_flags<UINT16>(CC_NZ, result);
+ m_q.r.w = set_flags<uint16_t>(CC_NZ, result);
// set C condition code
if (m_q.r.w & 0x0001)
@@ -732,15 +732,15 @@ bool hd6309_device::divd()
if (m_temp.b.l == 0)
return false;
- INT16 old_d = m_q.r.d;
- INT16 result;
+ int16_t old_d = m_q.r.d;
+ int16_t result;
// do the divide/modulo
- result = ((INT16) m_q.r.d) / (INT8) m_temp.b.l;
- m_q.r.a = ((INT16) m_q.r.d) % (INT8) m_temp.b.l;
+ result = ((int16_t) m_q.r.d) / (int8_t) m_temp.b.l;
+ m_q.r.a = ((int16_t) m_q.r.d) % (int8_t) m_temp.b.l;
// set NZ condition codes
- m_q.r.b = set_flags<UINT8>(CC_NZ, result);
+ m_q.r.b = set_flags<uint8_t>(CC_NZ, result);
// set C condition code
if (m_q.r.b & 0x01)
@@ -756,7 +756,7 @@ bool hd6309_device::divd()
if ((result > 256 ) || (result < -255 ))
{
// hard overflow - division is aborted
- set_flags<UINT16>(CC_NZ, old_d);
+ set_flags<uint16_t>(CC_NZ, old_d);
m_q.r.d = abs(old_d);
}
}
diff --git a/src/devices/cpu/m6809/hd6309.h b/src/devices/cpu/m6809/hd6309.h
index 762dac4737b..852f03d2d0d 100644
--- a/src/devices/cpu/m6809/hd6309.h
+++ b/src/devices/cpu/m6809/hd6309.h
@@ -29,7 +29,7 @@ class hd6309_device : public m6809_base_device
{
public:
// construction/destruction
- hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -42,9 +42,9 @@ protected:
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual bool is_6809() override { return false; };
@@ -76,23 +76,23 @@ private:
// CPU registers
PAIR16 m_v;
- UINT8 m_md;
+ uint8_t m_md;
// other state
- UINT8 m_temp_im;
+ uint8_t m_temp_im;
// operand reading/writing
- UINT8 read_operand();
- UINT8 read_operand(int ordinal);
- void write_operand(UINT8 data);
- void write_operand(int ordinal, UINT8 data);
+ uint8_t read_operand();
+ uint8_t read_operand(int ordinal);
+ void write_operand(uint8_t data);
+ void write_operand(int ordinal, uint8_t data);
// interrupt registers
bool firq_saves_entire_state() { return m_md & 0x02; }
- UINT16 entire_state_registers() { return hd6309_native_mode() ? 0x3FF : 0xFF; }
+ uint16_t entire_state_registers() { return hd6309_native_mode() ? 0x3FF : 0xFF; }
// bit tests
- UINT8 &bittest_register();
+ uint8_t &bittest_register();
bool bittest_source();
bool bittest_dest();
void bittest_set(bool result);
@@ -106,10 +106,10 @@ private:
void set_e() { m_addressing_mode = ADDRESSING_MODE_REGISTER_E; }
void set_f() { m_addressing_mode = ADDRESSING_MODE_REGISTER_F; }
void set_w() { m_addressing_mode = ADDRESSING_MODE_REGISTER_W; }
- exgtfr_register read_exgtfr_register(UINT8 reg);
- void write_exgtfr_register(UINT8 reg, exgtfr_register value);
- bool tfr_read(UINT8 opcode, UINT8 arg, UINT8 &data);
- bool tfr_write(UINT8 opcode, UINT8 arg, UINT8 data);
+ exgtfr_register read_exgtfr_register(uint8_t reg);
+ void write_exgtfr_register(uint8_t reg, exgtfr_register value);
+ bool tfr_read(uint8_t opcode, uint8_t arg, uint8_t &data);
+ bool tfr_write(uint8_t opcode, uint8_t arg, uint8_t data);
bool add8_sets_h() { return (m_opcode & 0xFE) != 0x30; }
void register_register_op();
bool hd6309_native_mode() { return m_md & 0x01; }
diff --git a/src/devices/cpu/m6809/hd6309.ops b/src/devices/cpu/m6809/hd6309.ops
index db04e99d981..9752460175b 100644
--- a/src/devices/cpu/m6809/hd6309.ops
+++ b/src/devices/cpu/m6809/hd6309.ops
@@ -673,19 +673,19 @@ INDEXED:
case 0x05: case 0x25: case 0x45: case 0x65:
case 0x15: case 0x35: case 0x55: case 0x75:
- m_temp.w = ireg() + (INT8) m_q.r.b;
+ m_temp.w = ireg() + (int8_t) m_q.r.b;
eat(2);
break;
case 0x06: case 0x26: case 0x46: case 0x66:
case 0x16: case 0x36: case 0x56: case 0x76:
- m_temp.w = ireg() + (INT8) m_q.r.a;
+ m_temp.w = ireg() + (int8_t) m_q.r.a;
eat(2);
break;
case 0x08: case 0x28: case 0x48: case 0x68:
case 0x18: case 0x38: case 0x58: case 0x78:
- @m_temp.w = ireg() + (INT8) read_opcode_arg();
+ @m_temp.w = ireg() + (int8_t) read_opcode_arg();
eat(1);
break;
@@ -706,7 +706,7 @@ INDEXED:
case 0x0C: case 0x2C: case 0x4C: case 0x6C:
case 0x1C: case 0x3C: case 0x5C: case 0x7C:
@m_temp.b.l = read_opcode_arg();
- m_temp.w = m_pc.w + (INT8) m_temp.b.l;
+ m_temp.w = m_pc.w + (int8_t) m_temp.b.l;
eat(1);
break;
@@ -714,7 +714,7 @@ INDEXED:
case 0x1D: case 0x3D: case 0x5D: case 0x7D:
@m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg();
- m_temp.w = m_pc.w + (INT16) m_temp.w;
+ m_temp.w = m_pc.w + (int16_t) m_temp.w;
eat((hd6309_native_mode() && !(m_opcode & 0x10)) ? 2 : 4);
break;
@@ -727,14 +727,14 @@ INDEXED:
case 0x07: case 0x27: case 0x47: case 0x67:
case 0x17: case 0x37: case 0x57: case 0x77:
// 6309 specific mode
- m_temp.w = ireg() + (INT8) m_q.r.e;
+ m_temp.w = ireg() + (int8_t) m_q.r.e;
eat(2);
break;
case 0x0A: case 0x2A: case 0x4A: case 0x6A:
case 0x1A: case 0x3A: case 0x5A: case 0x7A:
// 6309 specific mode
- m_temp.w = ireg() + (INT8) m_q.r.f;
+ m_temp.w = ireg() + (int8_t) m_q.r.f;
eat(2);
break;
@@ -789,7 +789,7 @@ INDEXED:
else
{
// 5-bit offset
- m_temp.w = ireg() + (INT8) ((m_opcode & 0x0F) | (m_opcode & 0x10 ? 0xF0 : 0x00));
+ m_temp.w = ireg() + (int8_t) ((m_opcode & 0x0F) | (m_opcode & 0x10 ? 0xF0 : 0x00));
eat(2);
}
@set_ea(m_temp.w);
@@ -797,7 +797,7 @@ INDEXED:
EXG:
{
- UINT8 param = read_opcode_arg();
+ uint8_t param = read_opcode_arg();
exgtfr_register reg1 = read_exgtfr_register(param >> 4);
exgtfr_register reg2 = read_exgtfr_register(param >> 0);
write_exgtfr_register(param >> 4, reg2);
@@ -808,7 +808,7 @@ EXG:
TFR:
{
- UINT8 param = read_opcode_arg();
+ uint8_t param = read_opcode_arg();
exgtfr_register reg = read_exgtfr_register(param >> 4);
write_exgtfr_register(param >> 0, reg);
}
@@ -839,7 +839,7 @@ LDQ:
@m_q.r.b = read_operand(1);
@m_q.r.e = read_operand(2);
@m_q.r.f = read_operand(3);
- set_flags<UINT32>(CC_NZV, m_q.q);
+ set_flags<uint32_t>(CC_NZV, m_q.q);
return;
STQ:
@@ -847,13 +847,13 @@ STQ:
@write_operand(1, m_q.r.b);
@write_operand(2, m_q.r.e);
@write_operand(3, m_q.r.f);
- set_flags<UINT32>(CC_NZV, m_q.q);
+ set_flags<uint32_t>(CC_NZV, m_q.q);
return;
OIM:
@m_temp.b.l = read_operand();
m_cc &= ~CC_V;
- m_temp.b.l = set_flags(CC_NZ, (UINT8)0, m_temp.b.l, m_temp.b.l | m_temp_im);
+ m_temp.b.l = set_flags(CC_NZ, (uint8_t)0, m_temp.b.l, m_temp.b.l | m_temp_im);
@eat(1); // this is just a guess
@write_operand(m_temp.b.l);
return;
@@ -861,7 +861,7 @@ OIM:
AIM:
@m_temp.b.l = read_operand();
m_cc &= ~CC_V;
- m_temp.b.l = set_flags(CC_NZ, (UINT8)0, m_temp.b.l, m_temp.b.l & m_temp_im);
+ m_temp.b.l = set_flags(CC_NZ, (uint8_t)0, m_temp.b.l, m_temp.b.l & m_temp_im);
@eat(1); // this is just a guess
@write_operand(m_temp.b.l);
return;
@@ -869,7 +869,7 @@ AIM:
EIM:
@m_temp.b.l = read_operand();
m_cc &= ~CC_V;
- m_temp.b.l = set_flags(CC_NZ, (UINT8)0, m_temp.b.l, m_temp.b.l ^ m_temp_im);
+ m_temp.b.l = set_flags(CC_NZ, (uint8_t)0, m_temp.b.l, m_temp.b.l ^ m_temp_im);
@eat(1); // this is just a guess
@write_operand(m_temp.b.l);
return;
@@ -877,7 +877,7 @@ EIM:
TIM:
@m_temp.b.l = read_operand();
m_cc &= ~CC_V;
- m_temp.b.l = set_flags(CC_NZ, (UINT8)0, m_temp.b.l, m_temp.b.l & m_temp_im);
+ m_temp.b.l = set_flags(CC_NZ, (uint8_t)0, m_temp.b.l, m_temp.b.l & m_temp_im);
@eat(2); // this is just a guess
return;
@@ -926,7 +926,7 @@ COM16:
m_temp.b.l = read_operand(1);
m_cc &= ~CC_V;
m_cc |= CC_C;
- m_temp.w = set_flags(CC_NZ, (UINT16) ~m_temp.w);
+ m_temp.w = set_flags(CC_NZ, (uint16_t) ~m_temp.w);
eat(hd6309_native_mode() ? 0 : 1);
write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
@@ -950,28 +950,28 @@ AND16:
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
m_cc &= ~CC_V;
- regop16().w = set_flags(CC_NZ, (UINT16)0, regop16().w, regop16().w & m_temp.w);
+ regop16().w = set_flags(CC_NZ, (uint16_t)0, regop16().w, regop16().w & m_temp.w);
return;
BIT16:
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
m_cc &= ~CC_V;
- set_flags(CC_NZ, (UINT16)0, regop16().w, regop16().w & m_temp.w);
+ set_flags(CC_NZ, (uint16_t)0, regop16().w, regop16().w & m_temp.w);
return;
OR16:
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
m_cc &= ~CC_V;
- regop16().w = set_flags(CC_NZ, (UINT16)0, regop16().w, regop16().w | m_temp.w);
+ regop16().w = set_flags(CC_NZ, (uint16_t)0, regop16().w, regop16().w | m_temp.w);
return;
EOR16:
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
m_cc &= ~CC_V;
- regop16().w = set_flags(CC_NZ, (UINT16)0, regop16().w, regop16().w ^ m_temp.w);
+ regop16().w = set_flags(CC_NZ, (uint16_t)0, regop16().w, regop16().w ^ m_temp.w);
return;
PSHSW:
@@ -1079,7 +1079,7 @@ DIVD:
return;
SEXW:
- m_q.r.d = set_flags<UINT16>(CC_N, (m_q.r.w & 0x8000) ? 0xFFFF : 0x0000);
+ m_q.r.d = set_flags<uint16_t>(CC_N, (m_q.r.w & 0x8000) ? 0xFFFF : 0x0000);
if ((m_q.r.d == 0x0000) && (m_q.r.w == 0x0000))
m_cc |= CC_Z;
else
diff --git a/src/devices/cpu/m6809/konami.cpp b/src/devices/cpu/m6809/konami.cpp
index f8db9587678..8762d358635 100644
--- a/src/devices/cpu/m6809/konami.cpp
+++ b/src/devices/cpu/m6809/konami.cpp
@@ -18,9 +18,9 @@
6809 Microcomputer Programming & Interfacing with Experiments"
by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc.
- System dependencies: UINT16 must be 16 bit unsigned int
- UINT8 must be 8 bit unsigned int
- UINT32 must be more than 16 bits
+ System dependencies: uint16_t must be 16 bit unsigned int
+ uint8_t must be 8 bit unsigned int
+ uint32_t must be more than 16 bits
arrays up to 65536 bytes must be supported
machine must be twos complement
@@ -84,7 +84,7 @@ const device_type KONAMI = &device_creator<konami_cpu_device>;
// konami_cpu_device - constructor
//-------------------------------------------------
-konami_cpu_device::konami_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+konami_cpu_device::konami_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6809_base_device(mconfig, "KONAMI CPU", tag, owner, clock, KONAMI, 1, "konami_cpu", __FILE__),
m_set_lines(*this)
{
@@ -109,7 +109,7 @@ void konami_cpu_device::device_start()
// helper function
//-------------------------------------------------
-offs_t konami_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t konami_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( konami );
return CPU_DISASSEMBLE_NAME(konami)(this, buffer, pc, oprom, opram, options);
@@ -120,7 +120,7 @@ offs_t konami_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT
// read_operand
//-------------------------------------------------
-inline UINT8 konami_cpu_device::read_operand()
+inline uint8_t konami_cpu_device::read_operand()
{
return super::read_operand();
}
@@ -130,7 +130,7 @@ inline UINT8 konami_cpu_device::read_operand()
// read_operand
//-------------------------------------------------
-inline UINT8 konami_cpu_device::read_operand(int ordinal)
+inline uint8_t konami_cpu_device::read_operand(int ordinal)
{
switch(m_addressing_mode)
{
@@ -146,7 +146,7 @@ inline UINT8 konami_cpu_device::read_operand(int ordinal)
// write_operand
//-------------------------------------------------
-inline void konami_cpu_device::write_operand(UINT8 data)
+inline void konami_cpu_device::write_operand(uint8_t data)
{
super::write_operand(data);
}
@@ -157,7 +157,7 @@ inline void konami_cpu_device::write_operand(UINT8 data)
// write_operand
//-------------------------------------------------
-inline void konami_cpu_device::write_operand(int ordinal, UINT8 data)
+inline void konami_cpu_device::write_operand(int ordinal, uint8_t data)
{
switch(m_addressing_mode)
{
@@ -173,7 +173,7 @@ inline void konami_cpu_device::write_operand(int ordinal, UINT8 data)
// ireg
//-------------------------------------------------
-inline UINT16 &konami_cpu_device::ireg()
+inline uint16_t &konami_cpu_device::ireg()
{
switch(m_opcode & 0x70)
{
@@ -194,7 +194,7 @@ inline UINT16 &konami_cpu_device::ireg()
// read_exgtfr_register
//-------------------------------------------------
-inline m6809_base_device::exgtfr_register konami_cpu_device::read_exgtfr_register(UINT8 reg)
+inline m6809_base_device::exgtfr_register konami_cpu_device::read_exgtfr_register(uint8_t reg)
{
exgtfr_register result;
result.word_value = 0x00FF;
@@ -208,7 +208,7 @@ inline m6809_base_device::exgtfr_register konami_cpu_device::read_exgtfr_registe
case 4: result.word_value = m_s.w; break; // S
case 5: result.word_value = m_u.w; break; // U
}
- result.byte_value = (UINT8) result.word_value;
+ result.byte_value = (uint8_t) result.word_value;
return result;
}
@@ -217,7 +217,7 @@ inline m6809_base_device::exgtfr_register konami_cpu_device::read_exgtfr_registe
// write_exgtfr_register
//-------------------------------------------------
-inline void konami_cpu_device::write_exgtfr_register(UINT8 reg, m6809_base_device::exgtfr_register value)
+inline void konami_cpu_device::write_exgtfr_register(uint8_t reg, m6809_base_device::exgtfr_register value)
{
switch(reg & 0x07)
{
@@ -235,7 +235,7 @@ inline void konami_cpu_device::write_exgtfr_register(UINT8 reg, m6809_base_devic
// safe_shift_right
//-------------------------------------------------
-template<class T> T konami_cpu_device::safe_shift_right(T value, UINT32 shift)
+template<class T> T konami_cpu_device::safe_shift_right(T value, uint32_t shift)
{
T result;
@@ -254,7 +254,7 @@ template<class T> T konami_cpu_device::safe_shift_right(T value, UINT32 shift)
// safe_shift_right_unsigned
//-------------------------------------------------
-template<class T> T konami_cpu_device::safe_shift_right_unsigned(T value, UINT32 shift)
+template<class T> T konami_cpu_device::safe_shift_right_unsigned(T value, uint32_t shift)
{
T result;
@@ -270,7 +270,7 @@ template<class T> T konami_cpu_device::safe_shift_right_unsigned(T value, UINT32
// safe_shift_left
//-------------------------------------------------
-template<class T> T konami_cpu_device::safe_shift_left(T value, UINT32 shift)
+template<class T> T konami_cpu_device::safe_shift_left(T value, uint32_t shift)
{
T result;
@@ -292,14 +292,14 @@ inline void konami_cpu_device::lmul()
PAIR result;
// do the multiply
- result.d = (UINT32)m_x.w * m_y.w;
+ result.d = (uint32_t)m_x.w * m_y.w;
// set the result registers
m_x.w = result.w.h;
m_y.w = result.w.l;
// set Z flag
- set_flags<UINT32>(CC_Z, result.d);
+ set_flags<uint32_t>(CC_Z, result.d);
// set C flag
if (result.d & 0x8000)
@@ -315,8 +315,8 @@ inline void konami_cpu_device::lmul()
inline void konami_cpu_device::divx()
{
- UINT16 result;
- UINT8 remainder;
+ uint16_t result;
+ uint8_t remainder;
if (m_q.r.b != 0)
{
@@ -331,7 +331,7 @@ inline void konami_cpu_device::divx()
}
// set results and Z flag
- m_x.w = set_flags<UINT16>(CC_Z, result);
+ m_x.w = set_flags<uint16_t>(CC_Z, result);
m_q.r.b = remainder;
// set C flag
@@ -346,7 +346,7 @@ inline void konami_cpu_device::divx()
// set_lines
//-------------------------------------------------
-void konami_cpu_device::set_lines(UINT8 data)
+void konami_cpu_device::set_lines(uint8_t data)
{
if (!m_set_lines.isnull())
m_set_lines((offs_t)0, data);
diff --git a/src/devices/cpu/m6809/konami.h b/src/devices/cpu/m6809/konami.h
index 957a4c4d3e5..ca42bbfb666 100644
--- a/src/devices/cpu/m6809/konami.h
+++ b/src/devices/cpu/m6809/konami.h
@@ -33,7 +33,7 @@ class konami_cpu_device : public m6809_base_device
{
public:
// construction/destruction
- konami_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ konami_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration
template<class _Object> static devcb_base &set_line_callback(device_t &device, _Object object) { return downcast<konami_cpu_device &>(device).m_set_lines.set_callback(object); }
@@ -46,7 +46,7 @@ protected:
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
typedef m6809_base_device super;
@@ -55,23 +55,23 @@ private:
devcb_write8 m_set_lines;
// konami-specific addressing modes
- UINT16 &ireg();
- UINT8 read_operand();
- UINT8 read_operand(int ordinal);
- void write_operand(UINT8 data);
- void write_operand(int ordinal, UINT8 data);
- exgtfr_register read_exgtfr_register(UINT8 reg);
- void write_exgtfr_register(UINT8 reg, exgtfr_register value);
+ uint16_t &ireg();
+ uint8_t read_operand();
+ uint8_t read_operand(int ordinal);
+ void write_operand(uint8_t data);
+ void write_operand(int ordinal, uint8_t data);
+ exgtfr_register read_exgtfr_register(uint8_t reg);
+ void write_exgtfr_register(uint8_t reg, exgtfr_register value);
// instructions
void lmul();
void divx();
// miscellaneous
- template<class T> T safe_shift_right(T value, UINT32 shift);
- template<class T> T safe_shift_right_unsigned(T value, UINT32 shift);
- template<class T> T safe_shift_left(T value, UINT32 shift);
- void set_lines(UINT8 data);
+ template<class T> T safe_shift_right(T value, uint32_t shift);
+ template<class T> T safe_shift_right_unsigned(T value, uint32_t shift);
+ template<class T> T safe_shift_left(T value, uint32_t shift);
+ void set_lines(uint8_t data);
void execute_one();
};
diff --git a/src/devices/cpu/m6809/konami.ops b/src/devices/cpu/m6809/konami.ops
index f5a159621fc..d2df5273c00 100644
--- a/src/devices/cpu/m6809/konami.ops
+++ b/src/devices/cpu/m6809/konami.ops
@@ -372,7 +372,7 @@ INDEXED:
// postbyte offset
m_ea.w = ireg(); // need to do this now because ireg() might be PC
@m_temp.b.l = read_opcode_arg();
- m_temp.w = m_ea.w + (INT8) m_temp.b.l;
+ m_temp.w = m_ea.w + (int8_t) m_temp.b.l;
eat(1);
break;
@@ -381,7 +381,7 @@ INDEXED:
m_ea.w = ireg(); // need to do this now because ireg() might be PC
@m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg();
- m_temp.w = m_ea.w + (INT16) m_temp.w;
+ m_temp.w = m_ea.w + (int16_t) m_temp.w;
eat(2);
break;
@@ -397,19 +397,19 @@ INDEXED:
case 0xA0: case 0xB0: case 0xD0: case 0xE0: case 0xF0:
// relative to register A
- m_temp.w = ireg() + (INT8) m_q.r.a;
+ m_temp.w = ireg() + (int8_t) m_q.r.a;
@eat(1);
break;
case 0xA1: case 0xB1: case 0xD1: case 0xE1: case 0xF1:
// relative to register B
- m_temp.w = ireg() + (INT8) m_q.r.b;
+ m_temp.w = ireg() + (int8_t) m_q.r.b;
@eat(1);
break;
case 0xA7: case 0xB7: case 0xD7: case 0xE7: case 0xF7:
// relative to register D
- m_temp.w = ireg() + (INT16) m_q.r.d;
+ m_temp.w = ireg() + (int16_t) m_q.r.d;
@eat(4);
break;
@@ -434,7 +434,7 @@ INDEXED:
EXG:
{
// konami's EXG instruction differs enough from 6809 to fork the code
- UINT8 param = read_opcode_arg();
+ uint8_t param = read_opcode_arg();
exgtfr_register reg1 = read_exgtfr_register(param >> 0);
exgtfr_register reg2 = read_exgtfr_register(param >> 4);
write_exgtfr_register(param >> 0, reg2);
@@ -446,7 +446,7 @@ EXG:
TFR:
{
// konami's TFR instruction differs enough from 6809 to fork the code
- UINT8 param = read_opcode_arg();
+ uint8_t param = read_opcode_arg();
exgtfr_register reg = read_exgtfr_register(param >> 0);
write_exgtfr_register(param >> 4, reg);
}
@@ -499,14 +499,14 @@ BSET2:
DECXJNZ:
// not sure if this affects V?
- m_x.w = set_flags<UINT16>(CC_NZV, m_x.w, 1, m_x.w - 1);
+ m_x.w = set_flags<uint16_t>(CC_NZV, m_x.w, 1, m_x.w - 1);
@eat(1);
set_cond(cond_ne());
goto BRANCH;
DECBJNZ:
// not sure if this affects V?
- m_q.r.b = set_flags<UINT8>(CC_NZV, m_q.r.b, 1, m_q.r.b - 1);
+ m_q.r.b = set_flags<uint8_t>(CC_NZV, m_q.r.b, 1, m_q.r.b - 1);
@eat(1);
set_cond(cond_ne());
goto BRANCH;
@@ -521,7 +521,7 @@ LSRD:
else
m_cc &= ~CC_C;
- m_q.r.d = set_flags<UINT16>(CC_NZ, safe_shift_right_unsigned<UINT16>(m_q.r.d, m_temp.b.l));
+ m_q.r.d = set_flags<uint16_t>(CC_NZ, safe_shift_right_unsigned<uint16_t>(m_q.r.d, m_temp.b.l));
}
eat(1);
return;
@@ -536,7 +536,7 @@ ASLD:
else
m_cc &= ~CC_C;
- m_q.r.d = set_flags<UINT16>(CC_NZV, safe_shift_left<INT16>(m_q.r.d, m_temp.b.l));
+ m_q.r.d = set_flags<uint16_t>(CC_NZV, safe_shift_left<int16_t>(m_q.r.d, m_temp.b.l));
}
eat(1);
return;
@@ -551,7 +551,7 @@ ASRD:
else
m_cc &= ~CC_C;
- m_q.r.d = set_flags<UINT16>(CC_NZ, safe_shift_right<INT16>(m_q.r.d, m_temp.b.l));
+ m_q.r.d = set_flags<uint16_t>(CC_NZ, safe_shift_right<int16_t>(m_q.r.d, m_temp.b.l));
}
eat(1);
return;
@@ -561,7 +561,7 @@ ROLD:
// doing this as a loop is lame
while(m_temp.b.l--)
- m_temp.w = set_flags<UINT16>(CC_NZ, rotate_left(m_temp.w));
+ m_temp.w = set_flags<uint16_t>(CC_NZ, rotate_left(m_temp.w));
eat(1);
return;
@@ -571,14 +571,14 @@ RORD:
// doing this as a loop is lame
while(m_temp.b.l--)
- m_temp.w = set_flags<UINT16>(CC_NZ, rotate_right(m_temp.w));
+ m_temp.w = set_flags<uint16_t>(CC_NZ, rotate_right(m_temp.w));
eat(1);
return;
ABS8:
@m_temp.b.l = read_operand();
- m_temp.b.l = set_flags<UINT8>(CC_NZVC, 0, m_temp.b.l, ((INT8) m_temp.b.l) >= 0 ? m_temp.b.l : -m_temp.b.l);
+ m_temp.b.l = set_flags<uint8_t>(CC_NZVC, 0, m_temp.b.l, ((int8_t) m_temp.b.l) >= 0 ? m_temp.b.l : -m_temp.b.l);
@eat(1);
write_operand(m_temp.b.l);
return;
@@ -586,7 +586,7 @@ ABS8:
ABS16:
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- m_temp.w = set_flags<UINT16>(CC_NZVC, 0, m_temp.w, ((INT16) m_temp.w) >= 0 ? m_temp.w : -m_temp.w);
+ m_temp.w = set_flags<uint16_t>(CC_NZVC, 0, m_temp.w, ((int16_t) m_temp.w) >= 0 ? m_temp.w : -m_temp.w);
@eat(1);
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
diff --git a/src/devices/cpu/m6809/m6809.cpp b/src/devices/cpu/m6809/m6809.cpp
index 693480cd940..db0cbee9a3c 100644
--- a/src/devices/cpu/m6809/m6809.cpp
+++ b/src/devices/cpu/m6809/m6809.cpp
@@ -14,9 +14,9 @@
6809 Microcomputer Programming & Interfacing with Experiments"
by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc.
- System dependencies: UINT16 must be 16 bit unsigned int
- UINT8 must be 8 bit unsigned int
- UINT32 must be more than 16 bits
+ System dependencies: uint16_t must be 16 bit unsigned int
+ uint8_t must be 8 bit unsigned int
+ uint32_t must be more than 16 bits
arrays up to 65536 bytes must be supported
machine must be twos complement
@@ -111,7 +111,7 @@ const device_type M6809E = &device_creator<m6809e_device>;
// m6809_base_device - constructor
//-------------------------------------------------
-m6809_base_device::m6809_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock, const device_type type, int divider, const char *shortname, const char *source)
+m6809_base_device::m6809_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock, const device_type type, int divider, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_lic_func(*this),
m_program_config("program", ENDIANNESS_BIG, 8, 16),
@@ -351,7 +351,7 @@ void m6809_base_device::state_string_export(const device_state_entry &entry, std
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 m6809_base_device::disasm_min_opcode_bytes() const
+uint32_t m6809_base_device::disasm_min_opcode_bytes() const
{
return 1;
}
@@ -362,7 +362,7 @@ UINT32 m6809_base_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 m6809_base_device::disasm_max_opcode_bytes() const
+uint32_t m6809_base_device::disasm_max_opcode_bytes() const
{
return 5;
}
@@ -373,7 +373,7 @@ UINT32 m6809_base_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t m6809_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m6809_base_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( m6809 );
return CPU_DISASSEMBLE_NAME(m6809)(this, buffer, pc, oprom, opram, options);
@@ -389,7 +389,7 @@ offs_t m6809_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT
// clock into cycles per second
//-------------------------------------------------
-UINT64 m6809_base_device::execute_clocks_to_cycles(UINT64 clocks) const
+uint64_t m6809_base_device::execute_clocks_to_cycles(uint64_t clocks) const
{
return (clocks + m_clock_divider - 1) / m_clock_divider;
}
@@ -400,7 +400,7 @@ UINT64 m6809_base_device::execute_clocks_to_cycles(UINT64 clocks) const
// count back to raw clocks
//-------------------------------------------------
-UINT64 m6809_base_device::execute_cycles_to_clocks(UINT64 cycles) const
+uint64_t m6809_base_device::execute_cycles_to_clocks(uint64_t cycles) const
{
return cycles * m_clock_divider;
}
@@ -411,7 +411,7 @@ UINT64 m6809_base_device::execute_cycles_to_clocks(UINT64 cycles) const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 m6809_base_device::execute_min_cycles() const
+uint32_t m6809_base_device::execute_min_cycles() const
{
return 1;
}
@@ -422,7 +422,7 @@ UINT32 m6809_base_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 m6809_base_device::execute_max_cycles() const
+uint32_t m6809_base_device::execute_max_cycles() const
{
return 19;
}
@@ -433,7 +433,7 @@ UINT32 m6809_base_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 m6809_base_device::execute_input_lines() const
+uint32_t m6809_base_device::execute_input_lines() const
{
return 3;
}
@@ -490,7 +490,7 @@ const char *m6809_base_device::inputnum_string(int inputnum)
// read_exgtfr_register
//-------------------------------------------------
-m6809_base_device::exgtfr_register m6809_base_device::read_exgtfr_register(UINT8 reg)
+m6809_base_device::exgtfr_register m6809_base_device::read_exgtfr_register(uint8_t reg)
{
exgtfr_register result;
result.byte_value = 0xFF;
@@ -517,7 +517,7 @@ m6809_base_device::exgtfr_register m6809_base_device::read_exgtfr_register(UINT8
// write_exgtfr_register
//-------------------------------------------------
-void m6809_base_device::write_exgtfr_register(UINT8 reg, m6809_base_device::exgtfr_register value)
+void m6809_base_device::write_exgtfr_register(uint8_t reg, m6809_base_device::exgtfr_register value)
{
switch(reg & 0x0F)
{
@@ -573,23 +573,23 @@ void m6809_base_device::execute_run()
}
-UINT8 m6809_base_device::mi_default::read(UINT16 adr)
+uint8_t m6809_base_device::mi_default::read(uint16_t adr)
{
return m_program->read_byte(adr);
}
-UINT8 m6809_base_device::mi_default::read_opcode(UINT16 adr)
+uint8_t m6809_base_device::mi_default::read_opcode(uint16_t adr)
{
return m_sdirect->read_byte(adr);
}
-UINT8 m6809_base_device::mi_default::read_opcode_arg(UINT16 adr)
+uint8_t m6809_base_device::mi_default::read_opcode_arg(uint16_t adr)
{
return m_direct->read_byte(adr);
}
-void m6809_base_device::mi_default::write(UINT16 adr, UINT8 val)
+void m6809_base_device::mi_default::write(uint16_t adr, uint8_t val)
{
m_program->write_byte(adr, val);
}
@@ -600,7 +600,7 @@ void m6809_base_device::mi_default::write(UINT16 adr, UINT8 val)
// m6809_device
//-------------------------------------------------
-m6809_device::m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m6809_device::m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6809_base_device(mconfig, "M6809", tag, owner, clock, M6809, 1, "m6809", __FILE__)
{
}
@@ -611,7 +611,7 @@ m6809_device::m6809_device(const machine_config &mconfig, const char *tag, devic
// m6809e_device
//-------------------------------------------------
-m6809e_device::m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m6809e_device::m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6809_base_device(mconfig, "M6809E", tag, owner, clock, M6809E, 4, "m6809e", __FILE__)
{
}
diff --git a/src/devices/cpu/m6809/m6809.h b/src/devices/cpu/m6809/m6809.h
index d2124afc277..b9b6c365f35 100644
--- a/src/devices/cpu/m6809/m6809.h
+++ b/src/devices/cpu/m6809/m6809.h
@@ -32,7 +32,7 @@ class m6809_base_device : public cpu_device
{
public:
// construction/destruction
- m6809_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock, const device_type type, int divider, const char *shortname, const char *source);
+ m6809_base_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, uint32_t clock, const device_type type, int divider, const char *shortname, const char *source);
protected:
class memory_interface {
@@ -41,19 +41,19 @@ protected:
direct_read_data *m_direct, *m_sdirect;
virtual ~memory_interface() {}
- virtual UINT8 read(UINT16 adr) = 0;
- virtual UINT8 read_opcode(UINT16 adr) = 0;
- virtual UINT8 read_opcode_arg(UINT16 adr) = 0;
- virtual void write(UINT16 adr, UINT8 val) = 0;
+ virtual uint8_t read(uint16_t adr) = 0;
+ virtual uint8_t read_opcode(uint16_t adr) = 0;
+ virtual uint8_t read_opcode_arg(uint16_t adr) = 0;
+ virtual void write(uint16_t adr, uint8_t val) = 0;
};
class mi_default : public memory_interface {
public:
virtual ~mi_default() {}
- virtual UINT8 read(UINT16 adr) override;
- virtual UINT8 read_opcode(UINT16 adr) override;
- virtual UINT8 read_opcode_arg(UINT16 adr) override;
- virtual void write(UINT16 adr, UINT8 val) override;
+ virtual uint8_t read(uint16_t adr) override;
+ virtual uint8_t read_opcode(uint16_t adr) override;
+ virtual uint8_t read_opcode_arg(uint16_t adr) override;
+ virtual void write(uint16_t adr, uint8_t val) override;
};
// device-level overrides
@@ -63,21 +63,21 @@ protected:
virtual void device_post_load() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override;
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override;
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
@@ -98,8 +98,8 @@ protected:
// register transfer
struct exgtfr_register
{
- UINT8 byte_value;
- UINT16 word_value;
+ uint8_t byte_value;
+ uint16_t word_value;
};
// flag bits in the cc register
@@ -144,19 +144,19 @@ protected:
#ifdef LSB_FIRST
union
{
- struct { UINT8 f, e, b, a; };
- struct { UINT16 w, d; };
+ struct { uint8_t f, e, b, a; };
+ struct { uint16_t w, d; };
} r;
struct { PAIR16 w, d; } p;
#else
union
{
- struct { UINT8 a, b, e, f; };
- struct { UINT16 d, w; };
+ struct { uint8_t a, b, e, f; };
+ struct { uint16_t d, w; };
} r;
struct { PAIR16 d, w; } p;
#endif
- UINT32 q;
+ uint32_t q;
};
// Memory interface
@@ -168,13 +168,13 @@ protected:
M6809Q m_q; // accumulator a and b (plus e and f on 6309)
PAIR16 m_x, m_y; // index registers
PAIR16 m_u, m_s; // stack pointers
- UINT8 m_dp; // direct page register
- UINT8 m_cc;
+ uint8_t m_dp; // direct page register
+ uint8_t m_cc;
PAIR16 m_temp;
- UINT8 m_opcode;
+ uint8_t m_opcode;
// other internal state
- UINT8 * m_reg8;
+ uint8_t * m_reg8;
PAIR16 * m_reg16;
int m_reg;
bool m_nmi_line;
@@ -194,41 +194,41 @@ protected:
void eat_remaining();
// read a byte from given memory location
- inline UINT8 read_memory(UINT16 address) { eat(1); return m_mintf->read(address); }
+ inline uint8_t read_memory(uint16_t address) { eat(1); return m_mintf->read(address); }
// write a byte to given memory location
- inline void write_memory(UINT16 address, UINT8 data) { eat(1); m_mintf->write(address, data); }
+ inline void write_memory(uint16_t address, uint8_t data) { eat(1); m_mintf->write(address, data); }
// read_opcode() is like read_memory() except it is used for reading opcodes. In the case of a system
// with memory mapped I/O, this function can be used to greatly speed up emulation.
- inline UINT8 read_opcode(UINT16 address) { eat(1); return m_mintf->read_opcode(address); }
+ inline uint8_t read_opcode(uint16_t address) { eat(1); return m_mintf->read_opcode(address); }
// read_opcode_arg() is identical to read_opcode() except it is used for reading opcode arguments. This
// difference can be used to support systems that use different encoding mechanisms for opcodes
// and opcode arguments.
- inline UINT8 read_opcode_arg(UINT16 address) { eat(1); return m_mintf->read_opcode_arg(address); }
+ inline uint8_t read_opcode_arg(uint16_t address) { eat(1); return m_mintf->read_opcode_arg(address); }
// read_opcode() and bump the program counter
- inline UINT8 read_opcode() { return read_opcode(m_pc.w++); }
- inline UINT8 read_opcode_arg() { return read_opcode_arg(m_pc.w++); }
+ inline uint8_t read_opcode() { return read_opcode(m_pc.w++); }
+ inline uint8_t read_opcode_arg() { return read_opcode_arg(m_pc.w++); }
- // state stack - implemented as a UINT32
- void push_state(UINT8 state) { m_state = (m_state << 8) | state; }
- UINT8 pop_state() { UINT8 result = (UINT8) m_state; m_state >>= 8; return result; }
+ // state stack - implemented as a uint32_t
+ void push_state(uint8_t state) { m_state = (m_state << 8) | state; }
+ uint8_t pop_state() { uint8_t result = (uint8_t) m_state; m_state >>= 8; return result; }
void reset_state() { m_state = 0; }
// effective address reading/writing
- UINT8 read_ea() { return read_memory(m_ea.w); }
- void write_ea(UINT8 data) { write_memory(m_ea.w, data); }
- void set_ea(UINT16 ea) { m_ea.w = ea; m_addressing_mode = ADDRESSING_MODE_EA; }
- void set_ea_h(UINT8 ea_h) { m_ea.b.h = ea_h; }
- void set_ea_l(UINT8 ea_l) { m_ea.b.l = ea_l; m_addressing_mode = ADDRESSING_MODE_EA; }
+ uint8_t read_ea() { return read_memory(m_ea.w); }
+ void write_ea(uint8_t data) { write_memory(m_ea.w, data); }
+ void set_ea(uint16_t ea) { m_ea.w = ea; m_addressing_mode = ADDRESSING_MODE_EA; }
+ void set_ea_h(uint8_t ea_h) { m_ea.b.h = ea_h; }
+ void set_ea_l(uint8_t ea_l) { m_ea.b.l = ea_l; m_addressing_mode = ADDRESSING_MODE_EA; }
// operand reading/writing
- UINT8 read_operand();
- UINT8 read_operand(int ordinal);
- void write_operand(UINT8 data);
- void write_operand(int ordinal, UINT8 data);
+ uint8_t read_operand();
+ uint8_t read_operand(int ordinal);
+ void write_operand(uint8_t data);
+ void write_operand(int ordinal, uint8_t data);
// instructions
void daa();
@@ -237,25 +237,25 @@ protected:
// miscellaneous
void nop() { }
template<class T> T rotate_right(T value);
- template<class T> UINT32 rotate_left(T value);
+ template<class T> uint32_t rotate_left(T value);
void set_a() { m_addressing_mode = ADDRESSING_MODE_REGISTER_A; }
void set_b() { m_addressing_mode = ADDRESSING_MODE_REGISTER_B; }
void set_d() { m_addressing_mode = ADDRESSING_MODE_REGISTER_D; }
void set_imm() { m_addressing_mode = ADDRESSING_MODE_IMMEDIATE; }
- void set_regop8(UINT8 &reg) { m_reg8 = &reg; m_reg16 = nullptr; }
+ void set_regop8(uint8_t &reg) { m_reg8 = &reg; m_reg16 = nullptr; }
void set_regop16(PAIR16 &reg) { m_reg16 = &reg; m_reg8 = nullptr; }
- UINT8 &regop8() { assert(m_reg8 != nullptr); return *m_reg8; }
+ uint8_t &regop8() { assert(m_reg8 != nullptr); return *m_reg8; }
PAIR16 &regop16() { assert(m_reg16 != nullptr); return *m_reg16; }
bool is_register_register_op_16_bit() { return m_reg16 != nullptr; }
bool add8_sets_h() { return true; }
bool hd6309_native_mode() { return false; }
// index reg
- UINT16 &ireg();
+ uint16_t &ireg();
// flags
- template<class T> T set_flags(UINT8 mask, T a, T b, UINT32 r);
- template<class T> T set_flags(UINT8 mask, T r);
+ template<class T> T set_flags(uint8_t mask, T a, T b, uint32_t r);
+ template<class T> T set_flags(uint8_t mask, T r);
// branch conditions
inline bool cond_hi() { return !(m_cc & CC_ZC); } // BHI/BLS
@@ -270,15 +270,15 @@ protected:
// interrupt registers
bool firq_saves_entire_state() { return false; }
- UINT16 partial_state_registers() { return 0x81; }
- UINT16 entire_state_registers() { return 0xFF; }
+ uint16_t partial_state_registers() { return 0x81; }
+ uint16_t entire_state_registers() { return 0xFF; }
// miscellaneous
- inline exgtfr_register read_exgtfr_register(UINT8 reg);
- inline void write_exgtfr_register(UINT8 reg, exgtfr_register value);
+ inline exgtfr_register read_exgtfr_register(uint8_t reg);
+ inline void write_exgtfr_register(uint8_t reg, exgtfr_register value);
bool is_register_addressing_mode();
bool is_ea_addressing_mode() { return m_addressing_mode == ADDRESSING_MODE_EA; }
- UINT16 get_pending_interrupt();
+ uint16_t get_pending_interrupt();
void log_illegal();
private:
@@ -287,7 +287,7 @@ private:
const address_space_config m_sprogram_config;
// other state
- UINT32 m_state;
+ uint32_t m_state;
bool m_cond;
// incidentals
@@ -304,7 +304,7 @@ class m6809_device : public m6809_base_device
{
public:
// construction/destruction
- m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// ======================> m6809e_device
@@ -317,7 +317,7 @@ class m6809e_device : public m6809_base_device
{
public:
// construction/destruction
- m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_lic_cb(device_t &device, _Object object) { return downcast<m6809e_device &>(device).m_lic_func.set_callback(object); }
diff --git a/src/devices/cpu/m6809/m6809.ops b/src/devices/cpu/m6809/m6809.ops
index 7c554a3bac9..125be180ce5 100644
--- a/src/devices/cpu/m6809/m6809.ops
+++ b/src/devices/cpu/m6809/m6809.ops
@@ -479,19 +479,19 @@ INDEXED:
case 0x05: case 0x25: case 0x45: case 0x65:
case 0x15: case 0x35: case 0x55: case 0x75:
- m_temp.w = ireg() + (INT8) m_q.r.b;
+ m_temp.w = ireg() + (int8_t) m_q.r.b;
eat(2);
break;
case 0x06: case 0x26: case 0x46: case 0x66:
case 0x16: case 0x36: case 0x56: case 0x76:
- m_temp.w = ireg() + (INT8) m_q.r.a;
+ m_temp.w = ireg() + (int8_t) m_q.r.a;
eat(2);
break;
case 0x08: case 0x28: case 0x48: case 0x68:
case 0x18: case 0x38: case 0x58: case 0x78:
- @m_temp.w = ireg() + (INT8) read_opcode_arg();
+ @m_temp.w = ireg() + (int8_t) read_opcode_arg();
eat(1);
break;
@@ -512,7 +512,7 @@ INDEXED:
case 0x0C: case 0x2C: case 0x4C: case 0x6C:
case 0x1C: case 0x3C: case 0x5C: case 0x7C:
@m_temp.b.l = read_opcode_arg();
- m_temp.w = m_pc.w + (INT8) m_temp.b.l;
+ m_temp.w = m_pc.w + (int8_t) m_temp.b.l;
eat(1);
break;
@@ -520,7 +520,7 @@ INDEXED:
case 0x1D: case 0x3D: case 0x5D: case 0x7D:
@m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg();
- m_temp.w = m_pc.w + (INT16) m_temp.w;
+ m_temp.w = m_pc.w + (int16_t) m_temp.w;
eat(4);
break;
@@ -548,7 +548,7 @@ INDEXED:
else
{
// 5-bit offset
- m_temp.w = ireg() + (INT8) ((m_opcode & 0x0F) | (m_opcode & 0x10 ? 0xF0 : 0x00));
+ m_temp.w = ireg() + (int8_t) ((m_opcode & 0x0F) | (m_opcode & 0x10 ? 0xF0 : 0x00));
eat(2);
}
@set_ea(m_temp.w);
@@ -556,7 +556,7 @@ INDEXED:
EXG:
{
- UINT8 param = read_opcode_arg();
+ uint8_t param = read_opcode_arg();
exgtfr_register reg1 = read_exgtfr_register(param >> 4);
exgtfr_register reg2 = read_exgtfr_register(param >> 0);
write_exgtfr_register(param >> 4, reg2);
@@ -567,7 +567,7 @@ EXG:
TFR:
{
- UINT8 param = read_opcode_arg();
+ uint8_t param = read_opcode_arg();
exgtfr_register reg = read_exgtfr_register(param >> 4);
write_exgtfr_register(param >> 0, reg);
if ((param & 0x0F) == 4) {
diff --git a/src/devices/cpu/m6809/m6809inl.h b/src/devices/cpu/m6809/m6809inl.h
index 88c282319c2..71bd4f22ec9 100644
--- a/src/devices/cpu/m6809/m6809inl.h
+++ b/src/devices/cpu/m6809/m6809inl.h
@@ -40,12 +40,12 @@ inline ATTR_FORCE_INLINE T m6809_base_device::rotate_right(T value)
//-------------------------------------------------
template<class T>
-inline ATTR_FORCE_INLINE UINT32 m6809_base_device::rotate_left(T value)
+inline ATTR_FORCE_INLINE uint32_t m6809_base_device::rotate_left(T value)
{
T high_bit = ((T) 1) << (sizeof(T) * 8 - 1);
bool new_carry = (value & high_bit) ? true : false;
- UINT32 new_value = value;
+ uint32_t new_value = value;
new_value <<= 1;
if (m_cc & CC_C)
@@ -65,7 +65,7 @@ inline ATTR_FORCE_INLINE UINT32 m6809_base_device::rotate_left(T value)
// read_operand
//-------------------------------------------------
-inline ATTR_FORCE_INLINE UINT8 m6809_base_device::read_operand()
+inline ATTR_FORCE_INLINE uint8_t m6809_base_device::read_operand()
{
switch(m_addressing_mode)
{
@@ -82,7 +82,7 @@ inline ATTR_FORCE_INLINE UINT8 m6809_base_device::read_operand()
// read_operand
//-------------------------------------------------
-inline ATTR_FORCE_INLINE UINT8 m6809_base_device::read_operand(int ordinal)
+inline ATTR_FORCE_INLINE uint8_t m6809_base_device::read_operand(int ordinal)
{
switch(m_addressing_mode)
{
@@ -97,7 +97,7 @@ inline ATTR_FORCE_INLINE UINT8 m6809_base_device::read_operand(int ordinal)
// write_operand
//-------------------------------------------------
-inline ATTR_FORCE_INLINE void m6809_base_device::write_operand(UINT8 data)
+inline ATTR_FORCE_INLINE void m6809_base_device::write_operand(uint8_t data)
{
switch(m_addressing_mode)
{
@@ -114,7 +114,7 @@ inline ATTR_FORCE_INLINE void m6809_base_device::write_operand(UINT8 data)
// write_operand
//-------------------------------------------------
-inline ATTR_FORCE_INLINE void m6809_base_device::write_operand(int ordinal, UINT8 data)
+inline ATTR_FORCE_INLINE void m6809_base_device::write_operand(int ordinal, uint8_t data)
{
switch(m_addressing_mode)
{
@@ -131,9 +131,9 @@ inline ATTR_FORCE_INLINE void m6809_base_device::write_operand(int ordinal, UINT
inline ATTR_FORCE_INLINE void m6809_base_device::daa()
{
- UINT16 t, cf = 0;
- UINT8 msn = m_q.r.a & 0xF0;
- UINT8 lsn = m_q.r.a & 0x0F;
+ uint16_t t, cf = 0;
+ uint8_t msn = m_q.r.a & 0xF0;
+ uint8_t lsn = m_q.r.a & 0x0F;
// compute the carry
if (lsn > 0x09 || m_cc & CC_H) cf |= 0x06;
@@ -148,7 +148,7 @@ inline ATTR_FORCE_INLINE void m6809_base_device::daa()
m_cc |= CC_C;
// and put it back into A
- m_q.r.a = set_flags(CC_NZ, (UINT8) t);
+ m_q.r.a = set_flags(CC_NZ, (uint8_t) t);
}
@@ -159,7 +159,7 @@ inline ATTR_FORCE_INLINE void m6809_base_device::daa()
inline ATTR_FORCE_INLINE void m6809_base_device::mul()
{
// perform multiply
- UINT16 result = ((UINT16) m_q.r.a) * ((UINT16) m_q.r.b);
+ uint16_t result = ((uint16_t) m_q.r.a) * ((uint16_t) m_q.r.b);
// set result and Z flag
m_q.r.d = set_flags(CC_Z, result);
@@ -176,7 +176,7 @@ inline ATTR_FORCE_INLINE void m6809_base_device::mul()
// ireg
//-------------------------------------------------
-inline ATTR_FORCE_INLINE UINT16 &m6809_base_device::ireg()
+inline ATTR_FORCE_INLINE uint16_t &m6809_base_device::ireg()
{
switch(m_opcode & 0x60)
{
@@ -196,7 +196,7 @@ inline ATTR_FORCE_INLINE UINT16 &m6809_base_device::ireg()
//-------------------------------------------------
template<class T>
-inline T m6809_base_device::set_flags(UINT8 mask, T a, T b, UINT32 r)
+inline T m6809_base_device::set_flags(uint8_t mask, T a, T b, uint32_t r)
{
T hi_bit = (T) (1 << (sizeof(T) * 8 - 1));
@@ -220,7 +220,7 @@ inline T m6809_base_device::set_flags(UINT8 mask, T a, T b, UINT32 r)
//-------------------------------------------------
template<class T>
-inline T m6809_base_device::set_flags(UINT8 mask, T r)
+inline T m6809_base_device::set_flags(uint8_t mask, T r)
{
return set_flags(mask, (T)0, r, r);
}
@@ -233,7 +233,7 @@ inline T m6809_base_device::set_flags(UINT8 mask, T r)
inline void m6809_base_device::eat_remaining()
{
// we do this in order to be nice to people debugging
- UINT16 real_pc = m_pc.w;
+ uint16_t real_pc = m_pc.w;
eat(m_icount);
@@ -260,7 +260,7 @@ inline bool m6809_base_device::is_register_addressing_mode()
// get_pending_interrupt
//-------------------------------------------------
-inline UINT16 m6809_base_device::get_pending_interrupt()
+inline uint16_t m6809_base_device::get_pending_interrupt()
{
if (m_nmi_asserted)
return VECTOR_NMI;
diff --git a/src/devices/cpu/mb86233/mb86233.cpp b/src/devices/cpu/mb86233/mb86233.cpp
index cf4d0ff7da9..f8be4ec3af9 100644
--- a/src/devices/cpu/mb86233/mb86233.cpp
+++ b/src/devices/cpu/mb86233/mb86233.cpp
@@ -23,7 +23,7 @@
const device_type MB86233 = &device_creator<mb86233_cpu_device>;
-mb86233_cpu_device::mb86233_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb86233_cpu_device::mb86233_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, MB86233, "MB86233", tag, owner, clock, "mb86233", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, -2)
, m_data_config("data", ENDIANNESS_LITTLE, 32, 32, 0), m_pc(0), m_reps(0), m_pcsp(0), m_eb(0), m_shift(0), m_repcnt(0), m_sr(0),
@@ -37,7 +37,7 @@ mb86233_cpu_device::mb86233_cpu_device(const machine_config &mconfig, const char
}
-offs_t mb86233_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mb86233_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( mb86233 );
return CPU_DISASSEMBLE_NAME(mb86233)(this, buffer, pc, oprom, opram, options);
@@ -105,10 +105,10 @@ void mb86233_cpu_device::device_start()
if ( m_tablergn )
{
- m_Tables = (UINT32*) machine().root_device().memregion(m_tablergn)->base();
+ m_Tables = (uint32_t*) machine().root_device().memregion(m_tablergn)->base();
}
- memset( m_RAM, 0, 2 * 0x200 * sizeof(UINT32) );
+ memset( m_RAM, 0, 2 * 0x200 * sizeof(uint32_t) );
m_ARAM = &m_RAM[0];
m_BRAM = &m_RAM[0x200];
@@ -205,7 +205,7 @@ void mb86233_cpu_device::FLAGSF( float v )
GETSR() |= SIGN_FLAG;
}
-void mb86233_cpu_device::FLAGSI( UINT32 v )
+void mb86233_cpu_device::FLAGSI( uint32_t v )
{
GETSR() &= ~(ZERO_FLAG|SIGN_FLAG);
@@ -222,7 +222,7 @@ void mb86233_cpu_device::FLAGSI( UINT32 v )
Condition Codes
***************************************************************************/
-int mb86233_cpu_device::COND( UINT32 cond )
+int mb86233_cpu_device::COND( uint32_t cond )
{
switch( cond )
{
@@ -272,7 +272,7 @@ int mb86233_cpu_device::COND( UINT32 cond )
ALU
***************************************************************************/
-void mb86233_cpu_device::ALU( UINT32 alu)
+void mb86233_cpu_device::ALU( uint32_t alu)
{
float ftmp;
@@ -369,7 +369,7 @@ void mb86233_cpu_device::ALU( UINT32 alu)
//case 0: GETD().i = floor(GETD().f+0.5f); break;
//case 1: GETD().i = ceil(GETD().f); break;
case 2: GETD().i = floor(GETD().f); break; // Manx TT
- case 3: GETD().i = (INT32)GETD().f; break;
+ case 3: GETD().i = (int32_t)GETD().f; break;
default: popmessage("TGP uses D = int(D) with FPU control = %02x, contact MAMEdev",m_fpucontrol>>1); break;
}
@@ -438,7 +438,7 @@ void mb86233_cpu_device::ALU( UINT32 alu)
Memory Access
***************************************************************************/
-UINT32 mb86233_cpu_device::ScaleExp(unsigned int v,int scale)
+uint32_t mb86233_cpu_device::ScaleExp(unsigned int v,int scale)
{
int exp=(v>>23)&0xff;
exp+=scale;
@@ -447,17 +447,17 @@ UINT32 mb86233_cpu_device::ScaleExp(unsigned int v,int scale)
}
-UINT32 mb86233_cpu_device::GETEXTERNAL( UINT32 EB, UINT32 offset )
+uint32_t mb86233_cpu_device::GETEXTERNAL( uint32_t EB, uint32_t offset )
{
- UINT32 addr;
+ uint32_t addr;
if ( EB == 0 && offset >= 0x20 && offset <= 0x2f ) /* TGP Tables in ROM - FIXME - */
{
if(offset>=0x20 && offset<=0x23) //SIN from value at RAM(0x20) in 0x4000/PI steps
{
- UINT32 r;
- UINT32 value=GETEXTPORT()[0x20];
- UINT32 off;
+ uint32_t r;
+ uint32_t value=GETEXTPORT()[0x20];
+ uint32_t off;
value+=(offset-0x20)<<14;
off=value&0x3fff;
if((value&0x7fff)==0)
@@ -557,9 +557,9 @@ UINT32 mb86233_cpu_device::GETEXTERNAL( UINT32 EB, UINT32 offset )
if(offset==0x28)
{
- UINT32 offset=(GETEXTPORT()[0x28]>>10)&0x1fff;
- UINT32 value=m_Tables[offset*2+0x20000/4];
- UINT32 srcexp=(GETEXTPORT()[0x28]>>23)&0xff;
+ uint32_t offset=(GETEXTPORT()[0x28]>>10)&0x1fff;
+ uint32_t value=m_Tables[offset*2+0x20000/4];
+ uint32_t srcexp=(GETEXTPORT()[0x28]>>23)&0xff;
value&=0x7FFFFFFF;
@@ -567,9 +567,9 @@ UINT32 mb86233_cpu_device::GETEXTERNAL( UINT32 EB, UINT32 offset )
}
if(offset==0x29)
{
- UINT32 offset=(GETEXTPORT()[0x28]>>10)&0x1fff;
- UINT32 value=m_Tables[offset*2+(0x20000/4)+1];
- UINT32 srcexp=(GETEXTPORT()[0x28]>>23)&0xff;
+ uint32_t offset=(GETEXTPORT()[0x28]>>10)&0x1fff;
+ uint32_t value=m_Tables[offset*2+(0x20000/4)+1];
+ uint32_t srcexp=(GETEXTPORT()[0x28]>>23)&0xff;
value&=0x7FFFFFFF;
if(GETEXTPORT()[0x28]&(1<<31))
@@ -579,9 +579,9 @@ UINT32 mb86233_cpu_device::GETEXTERNAL( UINT32 EB, UINT32 offset )
}
if(offset==0x2a)
{
- UINT32 offset=((GETEXTPORT()[0x2a]>>11)&0x1fff)^0x1000;
- UINT32 value=m_Tables[offset*2+0x30000/4];
- UINT32 srcexp=(GETEXTPORT()[0x2a]>>24)&0x7f;
+ uint32_t offset=((GETEXTPORT()[0x2a]>>11)&0x1fff)^0x1000;
+ uint32_t value=m_Tables[offset*2+0x30000/4];
+ uint32_t srcexp=(GETEXTPORT()[0x2a]>>24)&0x7f;
value&=0x7FFFFFFF;
@@ -589,9 +589,9 @@ UINT32 mb86233_cpu_device::GETEXTERNAL( UINT32 EB, UINT32 offset )
}
if(offset==0x2b)
{
- UINT32 offset=((GETEXTPORT()[0x2a]>>11)&0x1fff)^0x1000;
- UINT32 value=m_Tables[offset*2+(0x30000/4)+1];
- UINT32 srcexp=(GETEXTPORT()[0x2a]>>24)&0x7f;
+ uint32_t offset=((GETEXTPORT()[0x2a]>>11)&0x1fff)^0x1000;
+ uint32_t value=m_Tables[offset*2+(0x30000/4)+1];
+ uint32_t srcexp=(GETEXTPORT()[0x2a]>>24)&0x7f;
value&=0x7FFFFFFF;
if(GETEXTPORT()[0x2a]&(1<<31))
@@ -608,9 +608,9 @@ UINT32 mb86233_cpu_device::GETEXTERNAL( UINT32 EB, UINT32 offset )
return RDMEM(addr);
}
-void mb86233_cpu_device::SETEXTERNAL( UINT32 EB, UINT32 offset, UINT32 value )
+void mb86233_cpu_device::SETEXTERNAL( uint32_t EB, uint32_t offset, uint32_t value )
{
- UINT32 addr;
+ uint32_t addr;
if ( EB == 0 && offset >= 0x20 && offset <= 0x2f ) /* TGP Tables in ROM - FIXME - */
{
@@ -641,9 +641,9 @@ void mb86233_cpu_device::SETEXTERNAL( UINT32 EB, UINT32 offset, UINT32 value )
Register Access
***************************************************************************/
-UINT32 mb86233_cpu_device::GETREGS( UINT32 reg, int source )
+uint32_t mb86233_cpu_device::GETREGS( uint32_t reg, int source )
{
- UINT32 mode = ( reg >> 6 ) & 0x07;
+ uint32_t mode = ( reg >> 6 ) & 0x07;
reg &= 0x3f;
@@ -725,7 +725,7 @@ UINT32 mb86233_cpu_device::GETREGS( UINT32 reg, int source )
}
else if ( mode == 2 ) /* Indexed */
{
- UINT32 addr = reg & 0x1f;
+ uint32_t addr = reg & 0x1f;
if ( source )
{
@@ -746,7 +746,7 @@ UINT32 mb86233_cpu_device::GETREGS( UINT32 reg, int source )
}
else if( mode == 6 ) /* Indexed with postop */
{
- UINT32 addr = 0;
+ uint32_t addr = 0;
if ( source )
{
@@ -789,7 +789,7 @@ UINT32 mb86233_cpu_device::GETREGS( UINT32 reg, int source )
//return 0;
}
-void mb86233_cpu_device::SETREGS( UINT32 reg, UINT32 val )
+void mb86233_cpu_device::SETREGS( uint32_t reg, uint32_t val )
{
int mode = ( reg >> 6) & 0x07;
@@ -903,9 +903,9 @@ void mb86233_cpu_device::SETREGS( UINT32 reg, UINT32 val )
Addressing Modes
***************************************************************************/
-UINT32 mb86233_cpu_device::INDIRECT( UINT32 reg, int source )
+uint32_t mb86233_cpu_device::INDIRECT( uint32_t reg, int source )
{
- UINT32 mode = ( reg >> 6 ) & 0x07;
+ uint32_t mode = ( reg >> 6 ) & 0x07;
if ( mode == 0 || mode == 1 || mode == 3 )
{
@@ -913,7 +913,7 @@ UINT32 mb86233_cpu_device::INDIRECT( UINT32 reg, int source )
}
else if ( mode == 2 )
{
- UINT32 addr = reg & 0x3f;
+ uint32_t addr = reg & 0x3f;
if ( source )
{
@@ -934,7 +934,7 @@ UINT32 mb86233_cpu_device::INDIRECT( UINT32 reg, int source )
}
else if ( mode == 6 || mode == 7 )
{
- UINT32 addr = 0;
+ uint32_t addr = 0;
if ( source )
{
@@ -992,8 +992,8 @@ void mb86233_cpu_device::execute_run()
{
while( m_icount > 0 )
{
- UINT32 val;
- UINT32 opcode;
+ uint32_t val;
+ uint32_t opcode;
debugger_instruction_hook(this, GETPC());
@@ -1005,10 +1005,10 @@ void mb86233_cpu_device::execute_run()
{
case 0x00: /* dual move */
{
- UINT32 r1 = opcode & 0x1ff;
- UINT32 r2 = ( opcode >> 9 ) & 0x7f;
- UINT32 alu = ( opcode >> 21 ) & 0x1f;
- UINT32 op = ( opcode >> 16 ) & 0x1f;
+ uint32_t r1 = opcode & 0x1ff;
+ uint32_t r2 = ( opcode >> 9 ) & 0x7f;
+ uint32_t alu = ( opcode >> 21 ) & 0x1f;
+ uint32_t op = ( opcode >> 16 ) & 0x1f;
ALU( alu );
@@ -1058,10 +1058,10 @@ void mb86233_cpu_device::execute_run()
case 0x7: /* LD/MOV */
{
- UINT32 r1 = opcode & 0x1ff;
- UINT32 r2 = ( opcode >> 9 ) & 0x7f;
- UINT32 alu = ( opcode >> 21 ) & 0x1f;
- UINT32 op = ( opcode >> 16 ) & 0x1f;
+ uint32_t r1 = opcode & 0x1ff;
+ uint32_t r2 = ( opcode >> 9 ) & 0x7f;
+ uint32_t alu = ( opcode >> 21 ) & 0x1f;
+ uint32_t op = ( opcode >> 16 ) & 0x1f;
switch( op )
{
@@ -1175,7 +1175,7 @@ void mb86233_cpu_device::execute_run()
case 0x1e: /* External->Reg */
{
- UINT32 offset;
+ uint32_t offset;
if ( (( r2 >> 6 ) & 7) == 1 )
{
@@ -1227,7 +1227,7 @@ void mb86233_cpu_device::execute_run()
case 0x17: /* External r2-> RAMInd r3 */
{
- UINT32 offset;
+ uint32_t offset;
offset = INDIRECT(r1,1);
@@ -1238,7 +1238,7 @@ void mb86233_cpu_device::execute_run()
break;
case 0x14:
{
- UINT32 offset;
+ uint32_t offset;
offset = INDIRECT(r1,1);
@@ -1256,7 +1256,7 @@ void mb86233_cpu_device::execute_run()
case 0x0d: /* CONTROL? */
{
- UINT32 sub = (opcode>>16) & 0xff;
+ uint32_t sub = (opcode>>16) & 0xff;
switch(sub)
{
@@ -1274,8 +1274,8 @@ void mb86233_cpu_device::execute_run()
case 0x0e: /* LDIMM24 */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ uint32_t sub = (opcode>>24) & 0x03;
+ uint32_t imm = opcode & 0xffffff;
/* sign extend 24->32 */
if ( imm & 0x800000 )
@@ -1304,14 +1304,14 @@ void mb86233_cpu_device::execute_run()
case 0x0f: /* REP/CLEAR/FLAGS */
{
- UINT32 alu = ( opcode >> 20 ) & 0x1f;
- UINT32 sub2 = ( opcode >> 16 ) & 0x0f;
+ uint32_t alu = ( opcode >> 20 ) & 0x1f;
+ uint32_t sub2 = ( opcode >> 16 ) & 0x0f;
ALU(alu);
if( sub2 == 0x00 ) /* CLEAR reg */
{
- UINT32 reg = opcode & 0x1f;
+ uint32_t reg = opcode & 0x1f;
switch( reg )
{
@@ -1330,7 +1330,7 @@ void mb86233_cpu_device::execute_run()
}
else if ( sub2 == 0x04 ) /* REP xxx */
{
- UINT32 sub3 = ( opcode >> 12 ) & 0x0f;
+ uint32_t sub3 = ( opcode >> 12 ) & 0x0f;
if ( sub3 == 0 )
{
@@ -1360,8 +1360,8 @@ void mb86233_cpu_device::execute_run()
case 0x10: /* LDIMM rx */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffff;
+ uint32_t sub = (opcode>>24) & 0x03;
+ uint32_t imm = opcode & 0xffff;
GETGPR(sub) = imm;
}
@@ -1369,8 +1369,8 @@ void mb86233_cpu_device::execute_run()
case 0x13: /* LDIMM r1x */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ uint32_t sub = (opcode>>24) & 0x03;
+ uint32_t imm = opcode & 0xffffff;
if ( sub == 0 ) /* R12 */
GETGPR(12) = imm;
@@ -1383,8 +1383,8 @@ void mb86233_cpu_device::execute_run()
case 0x14: /* LDIMM m,e */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ uint32_t sub = (opcode>>24) & 0x03;
+ uint32_t imm = opcode & 0xffffff;
if ( sub == 0 ) /* A */
{
@@ -1409,8 +1409,8 @@ void mb86233_cpu_device::execute_run()
case 0x15: /* LDIMM m,e */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ uint32_t sub = (opcode>>24) & 0x03;
+ uint32_t imm = opcode & 0xffffff;
if ( sub == 0 ) /* B.e again? */
{
@@ -1437,8 +1437,8 @@ void mb86233_cpu_device::execute_run()
case 0x16: /* LDIMM m,e */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ uint32_t sub = (opcode>>24) & 0x03;
+ uint32_t imm = opcode & 0xffffff;
if ( sub == 1 ) /* clear + D.m */
{
@@ -1463,8 +1463,8 @@ void mb86233_cpu_device::execute_run()
case 0x17: /* LDIMM special reg */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ uint32_t sub = (opcode>>24) & 0x03;
+ uint32_t imm = opcode & 0xffffff;
if ( sub == 0x03 )
{
@@ -1479,8 +1479,8 @@ void mb86233_cpu_device::execute_run()
case 0x18: /* LDIMM external reg */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ uint32_t sub = (opcode>>24) & 0x03;
+ uint32_t imm = opcode & 0xffffff;
if ( sub == 0x03 )
{
@@ -1495,8 +1495,8 @@ void mb86233_cpu_device::execute_run()
case 0x1d: //LDIMM to Rep regs
{
- UINT32 sub = (opcode>>24)&0x3;
- UINT32 imm = opcode&0xffffff;
+ uint32_t sub = (opcode>>24)&0x3;
+ uint32_t imm = opcode&0xffffff;
if(sub == 0x00)
{
GETREPCNT() = imm;
@@ -1510,9 +1510,9 @@ void mb86233_cpu_device::execute_run()
case 0x2f: /* Conditional Branches */
{
- UINT32 cond = ( opcode >> 20 ) & 0x1f;
- UINT32 subtype = ( opcode >> 16 ) & 0x0f;
- UINT32 data = opcode & 0xffff;
+ uint32_t cond = ( opcode >> 20 ) & 0x1f;
+ uint32_t subtype = ( opcode >> 16 ) & 0x0f;
+ uint32_t data = opcode & 0xffff;
if( COND( cond) )
{
@@ -1574,9 +1574,9 @@ void mb86233_cpu_device::execute_run()
case 0x3f: /* Inverse Conditional Branches */
{
- UINT32 cond = ( opcode >> 20 ) & 0x1f;
- UINT32 subtype = ( opcode >> 16 ) & 0x0f;
- UINT32 data = opcode & 0xffff;
+ uint32_t cond = ( opcode >> 20 ) & 0x1f;
+ uint32_t subtype = ( opcode >> 16 ) & 0x0f;
+ uint32_t data = opcode & 0xffff;
if( !COND( cond) )
{
diff --git a/src/devices/cpu/mb86233/mb86233.h b/src/devices/cpu/mb86233/mb86233.h
index 26fc5b3e9f6..b95d7948593 100644
--- a/src/devices/cpu/mb86233/mb86233.h
+++ b/src/devices/cpu/mb86233/mb86233.h
@@ -51,7 +51,7 @@ class mb86233_cpu_device : public cpu_device
{
public:
// construction/destruction
- mb86233_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb86233_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_fifo_read_cb(device_t &device, _Object object) { return downcast<mb86233_cpu_device &>(device).m_fifo_read_cb.set_callback(object); }
@@ -65,9 +65,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -77,9 +77,9 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -87,28 +87,28 @@ private:
union MB86233_REG
{
- INT32 i;
- UINT32 u;
+ int32_t i;
+ uint32_t u;
float f;
};
- UINT16 m_pc;
+ uint16_t m_pc;
MB86233_REG m_a;
MB86233_REG m_b;
MB86233_REG m_d;
MB86233_REG m_p;
- UINT16 m_reps;
- UINT16 m_pcs[4];
- UINT8 m_pcsp;
- UINT32 m_eb;
- UINT32 m_shift;
- UINT32 m_repcnt;
- UINT16 m_sr;
- UINT8 m_fpucontrol;
+ uint16_t m_reps;
+ uint16_t m_pcs[4];
+ uint8_t m_pcsp;
+ uint32_t m_eb;
+ uint32_t m_shift;
+ uint32_t m_repcnt;
+ uint16_t m_sr;
+ uint8_t m_fpucontrol;
- UINT32 m_gpr[16];
- UINT32 m_extport[0x30];
+ uint32_t m_gpr[16];
+ uint32_t m_extport[0x30];
address_space *m_program;
direct_read_data *m_direct;
@@ -122,20 +122,20 @@ private:
const char *m_tablergn;
/* internal RAM */
- UINT32 m_RAM[2 * 0x200];
- UINT32 *m_ARAM, *m_BRAM;
- UINT32 *m_Tables;
+ uint32_t m_RAM[2 * 0x200];
+ uint32_t *m_ARAM, *m_BRAM;
+ uint32_t *m_Tables;
void FLAGSF( float v );
- void FLAGSI( UINT32 v );
- int COND( UINT32 cond );
- void ALU( UINT32 alu);
- UINT32 ScaleExp(unsigned int v,int scale);
- UINT32 GETEXTERNAL( UINT32 EB, UINT32 offset );
- void SETEXTERNAL( UINT32 EB, UINT32 offset, UINT32 value );
- UINT32 GETREGS( UINT32 reg, int source );
- void SETREGS( UINT32 reg, UINT32 val );
- UINT32 INDIRECT( UINT32 reg, int source );
+ void FLAGSI( uint32_t v );
+ int COND( uint32_t cond );
+ void ALU( uint32_t alu);
+ uint32_t ScaleExp(unsigned int v,int scale);
+ uint32_t GETEXTERNAL( uint32_t EB, uint32_t offset );
+ void SETEXTERNAL( uint32_t EB, uint32_t offset, uint32_t value );
+ uint32_t GETREGS( uint32_t reg, int source );
+ void SETREGS( uint32_t reg, uint32_t val );
+ uint32_t INDIRECT( uint32_t reg, int source );
};
diff --git a/src/devices/cpu/mb86233/mb86233d.cpp b/src/devices/cpu/mb86233/mb86233d.cpp
index f75053c07ff..db830e7463d 100644
--- a/src/devices/cpu/mb86233/mb86233d.cpp
+++ b/src/devices/cpu/mb86233/mb86233d.cpp
@@ -47,7 +47,7 @@ static char * COND(unsigned int cond)
return buf;
}
-static char * REGS( UINT32 reg, int IsSource )
+static char * REGS( uint32_t reg, int IsSource )
{
static char bufs[4][256];
static int bufindex = 0;
@@ -194,7 +194,7 @@ static char * REGS( UINT32 reg, int IsSource )
return buf;
}
-static char * INDIRECT( UINT32 reg, int IsSource )
+static char * INDIRECT( uint32_t reg, int IsSource )
{
static char bufs[4][256];
static int bufindex = 0;
@@ -261,7 +261,7 @@ static char * INDIRECT( UINT32 reg, int IsSource )
}
-static char * ALU( UINT32 alu)
+static char * ALU( uint32_t alu)
{
static char bufs[4][256];
static int bufindex = 0;
@@ -375,19 +375,19 @@ static char * ALU( UINT32 alu)
return buf;
}
-static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
+static unsigned dasm_mb86233(char *buffer, uint32_t opcode )
{
char *p = buffer;
- UINT32 grp = ( opcode >> 26 ) & 0x3f;
+ uint32_t grp = ( opcode >> 26 ) & 0x3f;
switch( grp )
{
case 0x0: /* Dual move */
{
- UINT32 r1=opcode & 0x1ff;
- UINT32 r2=(opcode>>9) & 0x7f;
- UINT32 alu=(opcode>>21) & 0x1f;
- UINT32 op=(opcode>>16) & 0x1f;
+ uint32_t r1=opcode & 0x1ff;
+ uint32_t r2=(opcode>>9) & 0x7f;
+ uint32_t alu=(opcode>>21) & 0x1f;
+ uint32_t op=(opcode>>16) & 0x1f;
if ( alu != 0 )
p += sprintf(p, "%s, ", ALU(alu) );
@@ -419,10 +419,10 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x7: /* LD/MOV */
{
- UINT32 r1=opcode & 0x1ff;
- UINT32 r2=(opcode>>9) & 0x7f;
- UINT32 alu=(opcode>>21) & 0x1f;
- UINT32 op=(opcode>>16) & 0x1f;
+ uint32_t r1=opcode & 0x1ff;
+ uint32_t r2=(opcode>>9) & 0x7f;
+ uint32_t alu=(opcode>>21) & 0x1f;
+ uint32_t op=(opcode>>16) & 0x1f;
if ( alu != 0 )
{
@@ -541,7 +541,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x0e: /* Load 24 bit val */
{
- UINT32 sub=(opcode>>24)&0x3;
+ uint32_t sub=(opcode>>24)&0x3;
static const char regs[4] = { 'p', 'a', 'b', 'd' };
p += sprintf(p,"LDIMM24 0x%X->%c",opcode&0xffffff, regs[sub]);
@@ -550,8 +550,8 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x0f: /* repeat */
{
- UINT32 alu = ( opcode >> 20 ) & 0x1f;
- UINT32 sub2 = ( opcode >> 16 ) & 0x0f;
+ uint32_t alu = ( opcode >> 20 ) & 0x1f;
+ uint32_t sub2 = ( opcode >> 16 ) & 0x0f;
if ( alu != 0 )
p += sprintf(p, "%s, ", ALU(alu) );
@@ -584,8 +584,8 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x10:
{
- UINT32 dst=(opcode>>24)&0xf;
- UINT32 imm=(opcode)&0xFFFF;
+ uint32_t dst=(opcode>>24)&0xf;
+ uint32_t imm=(opcode)&0xFFFF;
if ( dst <= 3 )
p += sprintf(p,"LDIMM 0x%x->r%d",imm,dst);
@@ -596,7 +596,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x13:
{
- UINT32 sub = ( opcode >> 24 ) & 0x03;
+ uint32_t sub = ( opcode >> 24 ) & 0x03;
p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
@@ -608,7 +608,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x14:
{
- UINT32 sub = ( opcode >> 24 ) & 0x03;
+ uint32_t sub = ( opcode >> 24 ) & 0x03;
p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
@@ -621,7 +621,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x15:
{
- UINT32 sub = ( opcode >> 24 ) & 0x03;
+ uint32_t sub = ( opcode >> 24 ) & 0x03;
p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
@@ -634,7 +634,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x16:
{
- UINT32 sub = ( opcode >> 24 ) & 0x03;
+ uint32_t sub = ( opcode >> 24 ) & 0x03;
p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
@@ -646,7 +646,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x17:
{
- UINT32 sub = ( opcode >> 24 ) & 0x03;
+ uint32_t sub = ( opcode >> 24 ) & 0x03;
p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
@@ -657,7 +657,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x18:
{
- UINT32 sub = ( opcode >> 24 ) & 0x03;
+ uint32_t sub = ( opcode >> 24 ) & 0x03;
p += sprintf(p,"LDIMM24 0x%X->",opcode&0xffffff);
@@ -668,9 +668,9 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x2f:
{
- UINT32 cond = ( opcode >> 20 ) & 0x1f;
- UINT32 subtype = ( opcode >> 16 ) & 0x0f;
- UINT32 data = opcode & 0xffff;
+ uint32_t cond = ( opcode >> 20 ) & 0x1f;
+ uint32_t subtype = ( opcode >> 16 ) & 0x0f;
+ uint32_t data = opcode & 0xffff;
switch( subtype )
{
@@ -719,9 +719,9 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x3f:
{
- UINT32 cond = ( opcode >> 20 ) & 0x1f;
- UINT32 subtype = ( opcode >> 16 ) & 0x0f;
- UINT32 data = opcode & 0xffff;
+ uint32_t cond = ( opcode >> 20 ) & 0x1f;
+ uint32_t subtype = ( opcode >> 16 ) & 0x0f;
+ uint32_t data = opcode & 0xffff;
switch( subtype )
{
@@ -778,7 +778,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
CPU_DISASSEMBLE( mb86233 )
{
- UINT32 op = *(UINT32 *)oprom;
+ uint32_t op = *(uint32_t *)oprom;
op = little_endianize_int32(op);
return dasm_mb86233(buffer, op);
}
diff --git a/src/devices/cpu/mb86235/mb86235.cpp b/src/devices/cpu/mb86235/mb86235.cpp
index 9ab306bb96f..b765614d074 100644
--- a/src/devices/cpu/mb86235/mb86235.cpp
+++ b/src/devices/cpu/mb86235/mb86235.cpp
@@ -39,7 +39,7 @@ void mb86235_cpu_device::mb86235_illegal()
/* Execute cycles */
void mb86235_cpu_device::execute_run()
{
- UINT32 opcode;
+ uint32_t opcode;
do
{
@@ -102,7 +102,7 @@ void mb86235_cpu_device::execute_set_input(int irqline, int state)
}
#endif
-mb86235_cpu_device::mb86235_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb86235_cpu_device::mb86235_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, MB86235, "MB86235", tag, owner, clock, "mb86235", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 64, 32, -3)
{
@@ -123,7 +123,7 @@ void mb86235_cpu_device::state_string_export(const device_state_entry &entry, st
}
}
-offs_t mb86235_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mb86235_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( mb86235 );
return CPU_DISASSEMBLE_NAME(mb86235)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h
index 35f586c7290..7531607688c 100644
--- a/src/devices/cpu/mb86235/mb86235.h
+++ b/src/devices/cpu/mb86235/mb86235.h
@@ -24,7 +24,7 @@ class mb86235_cpu_device : public cpu_device
{
public:
// construction/destruction
- mb86235_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ mb86235_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
protected:
// device-level overrides
@@ -32,9 +32,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 7; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 7; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
//virtual void execute_set_input(int inputnum, int state);
@@ -45,15 +45,15 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 8; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 8; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
- UINT8 m_pc; /* registers */
- UINT8 m_flags; /* flags */
+ uint8_t m_pc; /* registers */
+ uint8_t m_flags; /* flags */
address_space *m_program;
int m_icount;
diff --git a/src/devices/cpu/mb86235/mb86235d.cpp b/src/devices/cpu/mb86235/mb86235d.cpp
index 640fef9bccf..9b5597cbfdd 100644
--- a/src/devices/cpu/mb86235/mb86235d.cpp
+++ b/src/devices/cpu/mb86235/mb86235d.cpp
@@ -114,12 +114,12 @@ static char* get_ea(int md, int arx, int ary, int disp)
return buffer;
}
-static char* dasm_alu_mul(UINT64 opcode, bool twoop)
+static char* dasm_alu_mul(uint64_t opcode, bool twoop)
{
static char buffer[80];
char *p = buffer;
- int ma = (opcode & ((UINT64)(1) << 41)) ? 1 : 0;
+ int ma = (opcode & ((uint64_t)(1) << 41)) ? 1 : 0;
int o = (opcode >> 42) & 0x1f;
int i2 = (opcode >> 47) & 0x1f;
int i1 = (opcode >> 52) & 0xf;
@@ -203,7 +203,7 @@ static char* dasm_alu_mul(UINT64 opcode, bool twoop)
int mi2 = (opcode >> 32) & 0x1f;
int mi1 = (opcode >> 37) & 0xf;
int mo = (opcode >> 27) & 0x1f;
- if (opcode & ((UINT64)(1) << 41))
+ if (opcode & ((uint64_t)(1) << 41))
p += sprintf(p, " : FMUL %s, %s, %s", mi1_field[mi1], mi2_field[mi2], mo_field[mo]);
else
p += sprintf(p, " : MUL %s, %s, %s", mi1_field[mi1], mi2_field[mi2], mo_field[mo]);
@@ -212,7 +212,7 @@ static char* dasm_alu_mul(UINT64 opcode, bool twoop)
{
if (ma == 0)
{
- if (opcode & ((UINT64)(1) << 56))
+ if (opcode & ((uint64_t)(1) << 56))
p += sprintf(p, "FMUL %s, %s, %s", mi1_field[i1], mi2_field[i2], mo_field[o]);
else
p += sprintf(p, "MUL %s, %s, %s", mi1_field[i1], mi2_field[i2], mo_field[o]);
@@ -222,7 +222,7 @@ static char* dasm_alu_mul(UINT64 opcode, bool twoop)
return buffer;
}
-static char* dasm_control(UINT32 pc, UINT64 opcode)
+static char* dasm_control(uint32_t pc, uint64_t opcode)
{
static char buffer[80];
char *p = buffer;
@@ -287,10 +287,10 @@ static char* dasm_control(UINT32 pc, UINT64 opcode)
p += sprintf(p, "DBLP %04X", pc + rel12);
break;
case 0x14:
- p += sprintf(p, "DBBC AR%d:%d, %04X", (UINT32)((opcode >> 13) & 7), (UINT32)((opcode >> 16) & 0xf), pc + rel12);
+ p += sprintf(p, "DBBC AR%d:%d, %04X", (uint32_t)((opcode >> 13) & 7), (uint32_t)((opcode >> 16) & 0xf), pc + rel12);
break;
case 0x15:
- p += sprintf(p, "DBBS AR%d:%d, %04X", (UINT32)((opcode >> 13) & 7), (UINT32)((opcode >> 16) & 0xf), pc + rel12);
+ p += sprintf(p, "DBBS AR%d:%d, %04X", (uint32_t)((opcode >> 13) & 7), (uint32_t)((opcode >> 16) & 0xf), pc + rel12);
break;
case 0x1b:
p += sprintf(p, "DRET");
@@ -343,7 +343,7 @@ static char* dasm_control(UINT32 pc, UINT64 opcode)
return buffer;
}
-static char* dasm_double_xfer1(UINT64 opcode)
+static char* dasm_double_xfer1(uint64_t opcode)
{
static char buffer[80];
char *p = buffer;
@@ -428,7 +428,7 @@ static char* dasm_double_xfer1(UINT64 opcode)
return buffer;
}
-static char* dasm_xfer1(UINT64 opcode)
+static char* dasm_xfer1(uint64_t opcode)
{
static char buffer[80];
char *p = buffer;
@@ -445,7 +445,7 @@ static char* dasm_xfer1(UINT64 opcode)
{
if (sr == 0x58)
{
- p += sprintf(p, "MOV1 #%03X, %s", (UINT32)(opcode & 0xfff), regname[dr]);
+ p += sprintf(p, "MOV1 #%03X, %s", (uint32_t)(opcode & 0xfff), regname[dr]);
}
else
{
@@ -527,7 +527,7 @@ static char* dasm_xfer1(UINT64 opcode)
return buffer;
}
-static char* double_xfer2_field(int sd, UINT32 field)
+static char* double_xfer2_field(int sd, uint32_t field)
{
static char buffer[40];
char *p = buffer;
@@ -600,7 +600,7 @@ static char* double_xfer2_field(int sd, UINT32 field)
return buffer;
}
-static char* dasm_double_xfer2(UINT64 opcode)
+static char* dasm_double_xfer2(uint64_t opcode)
{
static char buffer[80];
char *p = buffer;
@@ -648,7 +648,7 @@ static char* dasm_double_xfer2(UINT64 opcode)
return buffer;
}
-static char* dasm_xfer2(UINT64 opcode)
+static char* dasm_xfer2(uint64_t opcode)
{
static char buffer[80];
char *p = buffer;
@@ -668,7 +668,7 @@ static char* dasm_xfer2(UINT64 opcode)
{
if (sr == 0x58)
{
- p += sprintf(p, "MOV2 #%06X, %s", (UINT32)(opcode & 0xffffff), regname[dr]);
+ p += sprintf(p, "MOV2 #%06X, %s", (uint32_t)(opcode & 0xffffff), regname[dr]);
}
else
{
@@ -729,7 +729,7 @@ static char* dasm_xfer2(UINT64 opcode)
{
if (sr == 0x58)
{
- p += sprintf(p, "MOV4 #%06X, ICDTR%d", (UINT32)(opcode & 0xffffff), dr & 7);
+ p += sprintf(p, "MOV4 #%06X, ICDTR%d", (uint32_t)(opcode & 0xffffff), dr & 7);
}
else
{
@@ -760,12 +760,12 @@ static char* dasm_xfer2(UINT64 opcode)
return buffer;
}
-static char* dasm_xfer3(UINT64 opcode)
+static char* dasm_xfer3(uint64_t opcode)
{
static char buffer[80];
char *p = buffer;
- UINT32 imm = (UINT32)(opcode >> 27);
+ uint32_t imm = (uint32_t)(opcode >> 27);
int dr = (opcode >> 19) & 0x7f;
int disp = (opcode >> 7) & 0xfff;
int ary = (opcode >> 4) & 7;
@@ -790,7 +790,7 @@ static char* dasm_xfer3(UINT64 opcode)
return buffer;
}
-static unsigned dasm_mb86235(char *buffer, UINT32 pc, UINT64 opcode)
+static unsigned dasm_mb86235(char *buffer, uint32_t pc, uint64_t opcode)
{
char *p = buffer;
@@ -832,7 +832,7 @@ static unsigned dasm_mb86235(char *buffer, UINT32 pc, UINT64 opcode)
CPU_DISASSEMBLE( mb86235 )
{
- UINT64 op = *(UINT64*)oprom;
+ uint64_t op = *(uint64_t*)oprom;
op = little_endianize_int64(op);
return dasm_mb86235(buffer, pc, op);
diff --git a/src/devices/cpu/mb88xx/mb88dasm.cpp b/src/devices/cpu/mb88xx/mb88dasm.cpp
index 49bf547ccd4..eab49fd4bc8 100644
--- a/src/devices/cpu/mb88xx/mb88dasm.cpp
+++ b/src/devices/cpu/mb88xx/mb88dasm.cpp
@@ -16,8 +16,8 @@
CPU_DISASSEMBLE( mb88 )
{
unsigned startpc = pc;
- UINT8 op = oprom[pc++ - startpc];
- UINT8 arg = oprom[pc - startpc];
+ uint8_t op = oprom[pc++ - startpc];
+ uint8_t arg = oprom[pc - startpc];
switch( op )
{
diff --git a/src/devices/cpu/mb88xx/mb88xx.cpp b/src/devices/cpu/mb88xx/mb88xx.cpp
index 1f1a84217bf..2be8354d9f9 100644
--- a/src/devices/cpu/mb88xx/mb88xx.cpp
+++ b/src/devices/cpu/mb88xx/mb88xx.cpp
@@ -109,7 +109,7 @@ static ADDRESS_MAP_START(data_7bit, AS_DATA, 8, mb88_cpu_device)
ADDRESS_MAP_END
-mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, MB88, "MB88xx", tag, owner, clock, "mb88xx", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 11, 0)
, m_data_config("data", ENDIANNESS_BIG, 8, 7, 0)
@@ -119,7 +119,7 @@ mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, const char *tag,
}
-mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int program_width, int data_width)
+mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int program_width, int data_width)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 8, program_width, 0, ( (program_width == 9) ? ADDRESS_MAP_NAME(program_9bit) : (program_width == 10) ? ADDRESS_MAP_NAME(program_10bit) : ADDRESS_MAP_NAME(program_11bit) ) )
, m_data_config("data", ENDIANNESS_BIG, 8, data_width, 0, ( (data_width == 4) ? ADDRESS_MAP_NAME(data_4bit) : (data_width == 5) ? ADDRESS_MAP_NAME(data_5bit) : (data_width == 6) ? ADDRESS_MAP_NAME(data_6bit) : ADDRESS_MAP_NAME(data_7bit) ) )
@@ -128,42 +128,42 @@ mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type
{
}
-mb88201_cpu_device::mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb88201_cpu_device::mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mb88_cpu_device(mconfig, MB88201, "MB88201", tag, owner, clock, "mb88201", __FILE__, 9, 4)
{
}
-mb88202_cpu_device::mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb88202_cpu_device::mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mb88_cpu_device(mconfig, MB88202, "MB88202", tag, owner, clock, "mb88202", __FILE__, 10, 5)
{
}
-mb8841_cpu_device::mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb8841_cpu_device::mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mb88_cpu_device(mconfig, MB8841, "MB8841", tag, owner, clock, "mb8841", __FILE__, 11, 7)
{
}
-mb8842_cpu_device::mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb8842_cpu_device::mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mb88_cpu_device(mconfig, MB8842, "MB8842", tag, owner, clock, "mb8842", __FILE__, 11, 7)
{
}
-mb8843_cpu_device::mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb8843_cpu_device::mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mb88_cpu_device(mconfig, MB8843, "MB8843", tag, owner, clock, "mb8843", __FILE__, 10, 6)
{
}
-mb8844_cpu_device::mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb8844_cpu_device::mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mb88_cpu_device(mconfig, MB8844, "MB8844", tag, owner, clock, "mb8844", __FILE__, 10, 6)
{
}
-offs_t mb88_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mb88_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( mb88 );
return CPU_DISASSEMBLE_NAME(mb88)(this, buffer, pc, oprom, opram, options);
@@ -364,7 +364,7 @@ void mb88_cpu_device::execute_set_input(int inputnum, int state)
m_nf = (state != CLEAR_LINE) ? 1 : 0;
}
-void mb88_cpu_device::update_pio_enable( UINT8 newpio )
+void mb88_cpu_device::update_pio_enable( uint8_t newpio )
{
/* if the serial state has changed, configure the timer */
if ((m_pio ^ newpio) & 0x30)
@@ -460,7 +460,7 @@ void mb88_cpu_device::execute_run()
{
while (m_icount > 0)
{
- UINT8 opcode, arg, oc;
+ uint8_t opcode, arg, oc;
/* fetch the opcode */
debugger_instruction_hook(this, GETPC());
diff --git a/src/devices/cpu/mb88xx/mb88xx.h b/src/devices/cpu/mb88xx/mb88xx.h
index 3eae8a92427..911574ce092 100644
--- a/src/devices/cpu/mb88xx/mb88xx.h
+++ b/src/devices/cpu/mb88xx/mb88xx.h
@@ -64,11 +64,11 @@ class mb88_cpu_device : public cpu_device
{
public:
// construction/destruction
- mb88_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- mb88_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int program_width, int data_width);
+ mb88_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb88_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int program_width, int data_width);
// static configuration helpers
- static void set_pla(device_t &device, UINT8 *pla) { downcast<mb88_cpu_device &>(device).m_PLA = pla; }
+ static void set_pla(device_t &device, uint8_t *pla) { downcast<mb88_cpu_device &>(device).m_PLA = pla; }
DECLARE_WRITE_LINE_MEMBER( clock_w );
@@ -78,13 +78,13 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 3; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 3; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 6 - 1) / 6; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 6); }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 6 - 1) / 6; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 6); }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_DATA) ? &m_data_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ) ); }
@@ -95,48 +95,48 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
- UINT8 m_PC; /* Program Counter: 6 bits */
- UINT8 m_PA; /* Page Address: 4 bits */
- UINT16 m_SP[4]; /* Stack is 4*10 bit addresses deep, but we also use 3 top bits per address to store flags during irq */
- UINT8 m_SI; /* Stack index: 2 bits */
- UINT8 m_A; /* Accumulator: 4 bits */
- UINT8 m_X; /* Index X: 4 bits */
- UINT8 m_Y; /* Index Y: 4 bits */
- UINT8 m_st; /* State flag: 1 bit */
- UINT8 m_zf; /* Zero flag: 1 bit */
- UINT8 m_cf; /* Carry flag: 1 bit */
- UINT8 m_vf; /* Timer overflow flag: 1 bit */
- UINT8 m_sf; /* Serial Full/Empty flag: 1 bit */
- UINT8 m_nf; /* Interrupt flag: 1 bit */
+ uint8_t m_PC; /* Program Counter: 6 bits */
+ uint8_t m_PA; /* Page Address: 4 bits */
+ uint16_t m_SP[4]; /* Stack is 4*10 bit addresses deep, but we also use 3 top bits per address to store flags during irq */
+ uint8_t m_SI; /* Stack index: 2 bits */
+ uint8_t m_A; /* Accumulator: 4 bits */
+ uint8_t m_X; /* Index X: 4 bits */
+ uint8_t m_Y; /* Index Y: 4 bits */
+ uint8_t m_st; /* State flag: 1 bit */
+ uint8_t m_zf; /* Zero flag: 1 bit */
+ uint8_t m_cf; /* Carry flag: 1 bit */
+ uint8_t m_vf; /* Timer overflow flag: 1 bit */
+ uint8_t m_sf; /* Serial Full/Empty flag: 1 bit */
+ uint8_t m_nf; /* Interrupt flag: 1 bit */
/* Peripheral Control */
- UINT8 m_pio; /* Peripheral enable bits: 8 bits */
+ uint8_t m_pio; /* Peripheral enable bits: 8 bits */
/* Timer registers */
- UINT8 m_TH; /* Timer High: 4 bits */
- UINT8 m_TL; /* Timer Low: 4 bits */
- UINT8 m_TP; /* Timer Prescale: 6 bits? */
- UINT8 m_ctr; /* current external counter value */
+ uint8_t m_TH; /* Timer High: 4 bits */
+ uint8_t m_TL; /* Timer Low: 4 bits */
+ uint8_t m_TP; /* Timer Prescale: 6 bits? */
+ uint8_t m_ctr; /* current external counter value */
/* Serial registers */
- UINT8 m_SB; /* Serial buffer: 4 bits */
- UINT16 m_SBcount; /* number of bits received */
+ uint8_t m_SB; /* Serial buffer: 4 bits */
+ uint16_t m_SBcount; /* number of bits received */
emu_timer *m_serial;
/* PLA configuration */
- UINT8 * m_PLA;
+ uint8_t * m_PLA;
/* IRQ handling */
- UINT8 m_pending_interrupt;
+ uint8_t m_pending_interrupt;
address_space *m_program;
direct_read_data *m_direct;
@@ -145,12 +145,12 @@ private:
int m_icount;
// For the debugger
- UINT16 m_debugger_pc;
- UINT8 m_debugger_flags;
+ uint16_t m_debugger_pc;
+ uint8_t m_debugger_flags;
TIMER_CALLBACK_MEMBER( serial_timer );
int pla( int inA, int inB );
- void update_pio_enable( UINT8 newpio );
+ void update_pio_enable( uint8_t newpio );
void increment_timer();
void update_pio( int cycles );
@@ -161,7 +161,7 @@ class mb88201_cpu_device : public mb88_cpu_device
{
public:
// construction/destruction
- mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -169,7 +169,7 @@ class mb88202_cpu_device : public mb88_cpu_device
{
public:
// construction/destruction
- mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -177,7 +177,7 @@ class mb8841_cpu_device : public mb88_cpu_device
{
public:
// construction/destruction
- mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -185,7 +185,7 @@ class mb8842_cpu_device : public mb88_cpu_device
{
public:
// construction/destruction
- mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -193,7 +193,7 @@ class mb8843_cpu_device : public mb88_cpu_device
{
public:
// construction/destruction
- mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -201,7 +201,7 @@ class mb8844_cpu_device : public mb88_cpu_device
{
public:
// construction/destruction
- mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/mc68hc11/hc11dasm.cpp b/src/devices/cpu/mc68hc11/hc11dasm.cpp
index 2594634671f..a696c9069ad 100644
--- a/src/devices/cpu/mc68hc11/hc11dasm.cpp
+++ b/src/devices/cpu/mc68hc11/hc11dasm.cpp
@@ -1153,7 +1153,7 @@ static const M68HC11_OPCODE opcode_table_page4[256] =
/*****************************************************************************/
static char *output;
-static const UINT8 *rombase;
+static const uint8_t *rombase;
static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
{
@@ -1164,26 +1164,26 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
va_end(vl);
}
-static UINT8 fetch(void)
+static uint8_t fetch(void)
{
return *rombase++;
}
-static UINT16 fetch16(void)
+static uint16_t fetch16(void)
{
- UINT16 w;
+ uint16_t w;
w = (rombase[0] << 8) | rombase[1];
rombase+=2;
return w;
}
-static UINT32 decode_opcode(UINT32 pc, const M68HC11_OPCODE *op_table)
+static uint32_t decode_opcode(uint32_t pc, const M68HC11_OPCODE *op_table)
{
- UINT8 imm8, mask;
- INT8 rel8;
- UINT16 imm16;
- UINT8 op2;
- UINT32 flags = 0;
+ uint8_t imm8, mask;
+ int8_t rel8;
+ uint16_t imm16;
+ uint8_t op2;
+ uint32_t flags = 0;
if (!strcmp(op_table->mnemonic, "jsr") || !strcmp(op_table->mnemonic, "bsr"))
flags = DASMFLAG_STEP_OVER;
@@ -1286,8 +1286,8 @@ static UINT32 decode_opcode(UINT32 pc, const M68HC11_OPCODE *op_table)
CPU_DISASSEMBLE( hc11 )
{
- UINT32 flags;
- UINT8 opcode;
+ uint32_t flags;
+ uint8_t opcode;
output = buffer;
rombase = oprom;
diff --git a/src/devices/cpu/mc68hc11/hc11ops.hxx b/src/devices/cpu/mc68hc11/hc11ops.hxx
index cb71a839c2f..8aaac54c641 100644
--- a/src/devices/cpu/mc68hc11/hc11ops.hxx
+++ b/src/devices/cpu/mc68hc11/hc11ops.hxx
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde, Angelo Salese, hap
-#define SET_Z8(r) (m_ccr |= ((UINT8)r == 0) ? CC_Z : 0)
-#define SET_Z16(r) (m_ccr |= ((UINT16)r == 0) ? CC_Z : 0)
+#define SET_Z8(r) (m_ccr |= ((uint8_t)r == 0) ? CC_Z : 0)
+#define SET_Z16(r) (m_ccr |= ((uint16_t)r == 0) ? CC_Z : 0)
#define SET_N8(r) (m_ccr |= (r & 0x80) ? CC_N : 0)
#define SET_N16(r) (m_ccr |= (r & 0x8000) ? CC_N : 0)
#define SET_V_ADD8(r,s,d) (m_ccr |= (((r) ^ (s)) & ((r) ^ (d)) & 0x80) ? CC_V : 0)
@@ -37,25 +37,25 @@ void mc68hc11_cpu_device::SET_PC(int pc)
m_pc = pc;
}
-void mc68hc11_cpu_device::PUSH8(UINT8 value)
+void mc68hc11_cpu_device::PUSH8(uint8_t value)
{
WRITE8(m_sp--, value);
}
-void mc68hc11_cpu_device::PUSH16(UINT16 value)
+void mc68hc11_cpu_device::PUSH16(uint16_t value)
{
WRITE8(m_sp--, (value >> 0) & 0xff);
WRITE8(m_sp--, (value >> 8) & 0xff);
}
-UINT8 mc68hc11_cpu_device::POP8()
+uint8_t mc68hc11_cpu_device::POP8()
{
return READ8(++m_sp);
}
-UINT16 mc68hc11_cpu_device::POP16()
+uint16_t mc68hc11_cpu_device::POP16()
{
- UINT16 r = 0;
+ uint16_t r = 0;
r |= (READ8(++m_sp) << 8);
r |= (READ8(++m_sp) << 0);
return r;
@@ -68,14 +68,14 @@ UINT16 mc68hc11_cpu_device::POP16()
/* ABA 0x1B */
void HC11OP(aba)()
{
- UINT16 r = REG_A + REG_B;
+ uint16_t r = REG_A + REG_B;
CLEAR_HNZVC();
SET_H(r, REG_B, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, REG_B, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(2);
}
@@ -99,79 +99,79 @@ void HC11OP(aby)()
/* ADCA IMM 0x89 */
void HC11OP(adca_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t i = FETCH();
+ uint16_t r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(2);
}
/* ADCA DIR 0x99 */
void HC11OP(adca_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT16 r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint16_t r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(3);
}
/* ADCA EXT 0xB9 */
void HC11OP(adca_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(4);
}
/* ADCA IND, X 0xA9 */
void HC11OP(adca_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT16 r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint16_t r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(4);
}
/* ADCA IND, Y 0x18, 0xA9 */
void HC11OP(adca_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT16 r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint16_t r = REG_A + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(5);
}
@@ -179,79 +179,79 @@ void HC11OP(adca_indy)()
/* ADCB IMM 0xC9 */
void HC11OP(adcb_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t i = FETCH();
+ uint16_t r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(2);
}
/* ADCB DIR 0xD9 */
void HC11OP(adcb_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT16 r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint16_t r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(3);
}
/* ADCB EXT 0xF9 */
void HC11OP(adcb_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(4);
}
/* ADCB IND, X 0xE9 */
void HC11OP(adcb_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT16 r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint16_t r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(4);
}
/* ADCB IND, Y 0x18, 0xE9 */
void HC11OP(adcb_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT16 r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint16_t r = REG_B + i + ((m_ccr & CC_C) ? 1 : 0);
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(5);
}
@@ -259,79 +259,79 @@ void HC11OP(adcb_indy)()
/* ADDA IMM 0x8B */
void HC11OP(adda_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = REG_A + i;
+ uint8_t i = FETCH();
+ uint16_t r = REG_A + i;
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(2);
}
/* ADDA DIR 0x9B */
void HC11OP(adda_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT16 r = REG_A + i;
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint16_t r = REG_A + i;
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(3);
}
/* ADDA EXT 0xBB */
void HC11OP(adda_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = REG_A + i;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = REG_A + i;
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(4);
}
/* ADDA IND, X 0xAB */
void HC11OP(adda_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT16 r = REG_A + i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint16_t r = REG_A + i;
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(4);
}
/* ADDA IND, Y 0x18, 0xAB */
void HC11OP(adda_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT16 r = REG_A + i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint16_t r = REG_A + i;
CLEAR_HNZVC();
SET_H(r, i, REG_A);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(5);
}
@@ -339,79 +339,79 @@ void HC11OP(adda_indy)()
/* ADDB IMM 0xCB */
void HC11OP(addb_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = REG_B + i;
+ uint8_t i = FETCH();
+ uint16_t r = REG_B + i;
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(2);
}
/* ADDB DIR 0xDB */
void HC11OP(addb_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT16 r = REG_B + i;
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint16_t r = REG_B + i;
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(3);
}
/* ADDB EXT 0xFB */
void HC11OP(addb_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = REG_B + i;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = REG_B + i;
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(4);
}
/* ADDB IND, X 0xEB */
void HC11OP(addb_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT16 r = REG_B + i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint16_t r = REG_B + i;
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(4);
}
/* ADDB IND, Y 0x18, 0xEB */
void HC11OP(addb_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT16 r = REG_B + i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint16_t r = REG_B + i;
CLEAR_HNZVC();
SET_H(r, i, REG_B);
SET_N8(r);
SET_Z8(r);
SET_V_ADD8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(5);
}
@@ -419,74 +419,74 @@ void HC11OP(addb_indy)()
/* ADDD IMM 0xC3 */
void HC11OP(addd_imm)()
{
- UINT16 i = FETCH16();
- UINT32 r = REG_D + i;
+ uint16_t i = FETCH16();
+ uint32_t r = REG_D + i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_ADD16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(4);
}
/* ADDD DIR 0xD3 */
void HC11OP(addd_dir)()
{
- UINT8 d = FETCH();
- UINT16 i = READ16(d);
- UINT32 r = REG_D + i;
+ uint8_t d = FETCH();
+ uint16_t i = READ16(d);
+ uint32_t r = REG_D + i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_ADD16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(5);
}
/* ADDD EXT 0xF3 */
void HC11OP(addd_ext)()
{
- UINT16 adr = FETCH16();
- UINT16 i = READ16(adr);
- UINT32 r = REG_D + i;
+ uint16_t adr = FETCH16();
+ uint16_t i = READ16(adr);
+ uint32_t r = REG_D + i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_ADD16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(6);
}
/* ADDD IND, X 0xE3 */
void HC11OP(addd_indx)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_ix + offset);
- UINT32 r = REG_D + i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_ix + offset);
+ uint32_t r = REG_D + i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_ADD16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(6);
}
/* ADDD IND, Y 0x18, 0xE3 */
void HC11OP(addd_indy)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_iy + offset);
- UINT32 r = REG_D + i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_iy + offset);
+ uint32_t r = REG_D + i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_ADD16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(7);
}
@@ -494,7 +494,7 @@ void HC11OP(addd_indy)()
/* ANDA IMM 0x84 */
void HC11OP(anda_imm)()
{
- UINT8 i = FETCH();
+ uint8_t i = FETCH();
CLEAR_NZV();
REG_A &= i;
SET_N8(REG_A);
@@ -505,8 +505,8 @@ void HC11OP(anda_imm)()
/* ANDA DIR 0x94 */
void HC11OP(anda_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
CLEAR_NZV();
REG_A &= i;
SET_N8(REG_A);
@@ -517,8 +517,8 @@ void HC11OP(anda_dir)()
/* ANDA EXT 0xB4 */
void HC11OP(anda_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZV();
REG_A &= i;
SET_N8(REG_A);
@@ -529,8 +529,8 @@ void HC11OP(anda_ext)()
/* ANDA IND, X 0xA4 */
void HC11OP(anda_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZV();
REG_A &= i;
SET_N8(REG_A);
@@ -541,8 +541,8 @@ void HC11OP(anda_indx)()
/* ANDA IND, Y 0x18, 0xA4 */
void HC11OP(anda_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZV();
REG_A &= i;
SET_N8(REG_A);
@@ -554,7 +554,7 @@ void HC11OP(anda_indy)()
/* ANDB IMM 0xC4 */
void HC11OP(andb_imm)()
{
- UINT8 i = FETCH();
+ uint8_t i = FETCH();
CLEAR_NZV();
REG_B &= i;
SET_N8(REG_B);
@@ -565,8 +565,8 @@ void HC11OP(andb_imm)()
/* ANDB DIR 0xD4 */
void HC11OP(andb_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
CLEAR_NZV();
REG_B &= i;
SET_N8(REG_B);
@@ -577,8 +577,8 @@ void HC11OP(andb_dir)()
/* ANDB EXT 0xF4 */
void HC11OP(andb_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZV();
REG_B &= i;
SET_N8(REG_B);
@@ -589,8 +589,8 @@ void HC11OP(andb_ext)()
/* ANDB IND, X 0xE4 */
void HC11OP(andb_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZV();
REG_B &= i;
SET_N8(REG_B);
@@ -601,8 +601,8 @@ void HC11OP(andb_indx)()
/* ANDB IND, Y 0x18, 0xE4 */
void HC11OP(andb_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZV();
REG_B &= i;
SET_N8(REG_B);
@@ -613,10 +613,10 @@ void HC11OP(andb_indy)()
/* ASLA 0x48 */
void HC11OP(asla)()
{
- UINT16 r = REG_A << 1;
+ uint16_t r = REG_A << 1;
CLEAR_NZVC();
SET_C8(r);
- REG_A = (UINT16)(r);
+ REG_A = (uint16_t)(r);
SET_N8(REG_A);
SET_Z8(REG_A);
@@ -632,10 +632,10 @@ void HC11OP(asla)()
/* ASLB 0x58 */
void HC11OP(aslb)()
{
- UINT16 r = REG_B << 1;
+ uint16_t r = REG_B << 1;
CLEAR_NZVC();
SET_C8(r);
- REG_B = (UINT16)(r);
+ REG_B = (uint16_t)(r);
SET_N8(REG_B);
SET_Z8(REG_B);
@@ -651,9 +651,9 @@ void HC11OP(aslb)()
/* ASL EXT 0x78 */
void HC11OP(asl_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = i << 1;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = i << 1;
CLEAR_NZVC();
SET_C8(r);
WRITE8(adr, r);
@@ -672,8 +672,8 @@ void HC11OP(asl_ext)()
/* BITA IMM 0x85 */
void HC11OP(bita_imm)()
{
- UINT8 i = FETCH();
- UINT8 r = REG_A & i;
+ uint8_t i = FETCH();
+ uint8_t r = REG_A & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -683,9 +683,9 @@ void HC11OP(bita_imm)()
/* BITA DIR 0x95 */
void HC11OP(bita_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT8 r = REG_A & i;
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint8_t r = REG_A & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -695,9 +695,9 @@ void HC11OP(bita_dir)()
/* BITA EXT 0xB5 */
void HC11OP(bita_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT8 r = REG_A & i;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint8_t r = REG_A & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -707,9 +707,9 @@ void HC11OP(bita_ext)()
/* BITA IND, X 0xA5 */
void HC11OP(bita_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT8 r = REG_A & i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint8_t r = REG_A & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -719,9 +719,9 @@ void HC11OP(bita_indx)()
/* BITA IND, Y 0x18, 0xA5 */
void HC11OP(bita_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT8 r = REG_A & i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint8_t r = REG_A & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -732,8 +732,8 @@ void HC11OP(bita_indy)()
/* BITB IMM 0xC5 */
void HC11OP(bitb_imm)()
{
- UINT8 i = FETCH();
- UINT8 r = REG_B & i;
+ uint8_t i = FETCH();
+ uint8_t r = REG_B & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -743,9 +743,9 @@ void HC11OP(bitb_imm)()
/* BITB DIR 0xD5 */
void HC11OP(bitb_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT8 r = REG_B & i;
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint8_t r = REG_B & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -755,9 +755,9 @@ void HC11OP(bitb_dir)()
/* BITB EXT 0xF5 */
void HC11OP(bitb_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT8 r = REG_B & i;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint8_t r = REG_B & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -767,9 +767,9 @@ void HC11OP(bitb_ext)()
/* BITB IND, X 0xE5 */
void HC11OP(bitb_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT8 r = REG_B & i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint8_t r = REG_B & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -779,9 +779,9 @@ void HC11OP(bitb_indx)()
/* BITB IND, Y 0x18, 0xE5 */
void HC11OP(bitb_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT8 r = REG_B & i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint8_t r = REG_B & i;
CLEAR_NZV();
SET_N8(r);
SET_Z8(r);
@@ -791,7 +791,7 @@ void HC11OP(bitb_indy)()
/* BCC 0x24 */
void HC11OP(bcc)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if ((m_ccr & CC_C) == 0) /* Branch if C flag clear */
{
SET_PC(m_ppc + rel + 2);
@@ -802,9 +802,9 @@ void HC11OP(bcc)()
/* BCLR DIR 0x15 */
void HC11OP(bclr_dir)()
{
- UINT8 d = FETCH();
- UINT8 mask = FETCH();
- UINT8 r = READ8(d) & ~mask;
+ uint8_t d = FETCH();
+ uint8_t mask = FETCH();
+ uint8_t r = READ8(d) & ~mask;
WRITE8(d, r);
CLEAR_NZV();
SET_N8(r);
@@ -815,9 +815,9 @@ void HC11OP(bclr_dir)()
/* BCLR INDX 0x1d */
void HC11OP(bclr_indx)()
{
- UINT8 offset = FETCH();
- UINT8 mask = FETCH();
- UINT8 r = READ8(m_ix + offset) & ~mask;
+ uint8_t offset = FETCH();
+ uint8_t mask = FETCH();
+ uint8_t r = READ8(m_ix + offset) & ~mask;
WRITE8(m_ix + offset, r);
CLEAR_NZV();
SET_N8(r);
@@ -829,7 +829,7 @@ void HC11OP(bclr_indx)()
/* BCS 0x25 */
void HC11OP(bcs)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if (m_ccr & CC_C) /* Branch if C flag set */
{
SET_PC(m_ppc + rel + 2);
@@ -841,7 +841,7 @@ void HC11OP(bcs)()
/* BEQ 0x27 */
void HC11OP(beq)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if (m_ccr & CC_Z) /* Branch if Z flag set */
{
SET_PC(m_ppc + rel + 2);
@@ -853,7 +853,7 @@ void HC11OP(beq)()
/* BHI 0x22 */
void HC11OP(bhi)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if (((m_ccr & CC_C) == 0) && ((m_ccr & CC_Z) == 0)) /* Branch if C and Z flag clear */
{
SET_PC(m_ppc + rel + 2);
@@ -865,7 +865,7 @@ void HC11OP(bhi)()
/* BNE 0x26 */
void HC11OP(bne)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if ((m_ccr & CC_Z) == 0) /* Branch if Z flag clear */
{
SET_PC(m_ppc + rel + 2);
@@ -877,9 +877,9 @@ void HC11OP(bne)()
/* BLE 0x2F */
void HC11OP(ble)()
{
- UINT8 n = (m_ccr & CC_N) ? 1 : 0;
- UINT8 v = (m_ccr & CC_V) ? 1 : 0;
- INT8 rel = FETCH();
+ uint8_t n = (m_ccr & CC_N) ? 1 : 0;
+ uint8_t v = (m_ccr & CC_V) ? 1 : 0;
+ int8_t rel = FETCH();
if ((m_ccr & CC_Z) || (n ^ v)) /* Branch if Z flag set or (N ^ V) */
{
SET_PC(m_ppc + rel + 2);
@@ -890,7 +890,7 @@ void HC11OP(ble)()
/* BLS 0x23 */
void HC11OP(bls)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if (m_ccr & CC_C || m_ccr & CC_Z) /* Branch if C or Z flag set */
{
SET_PC(m_ppc + rel + 2);
@@ -901,7 +901,7 @@ void HC11OP(bls)()
/* BMI 0x2B */
void HC11OP(bmi)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if (m_ccr & CC_N) /* Branch if N flag set */
{
SET_PC(m_ppc + rel + 2);
@@ -912,7 +912,7 @@ void HC11OP(bmi)()
/* BPL 0x2A */
void HC11OP(bpl)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if ((m_ccr & CC_N) == 0) /* Branch if N flag clear */
{
SET_PC(m_ppc + rel + 2);
@@ -924,7 +924,7 @@ void HC11OP(bpl)()
/* BRA 0x20 */
void HC11OP(bra)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
SET_PC(m_ppc + rel + 2);
CYCLES(3);
}
@@ -932,10 +932,10 @@ void HC11OP(bra)()
/* BRCLR DIR 0x13 */
void HC11OP(brclr_dir)()
{
- UINT8 d = FETCH();
- UINT8 mask = FETCH();
- INT8 rel = FETCH();
- UINT8 i = READ8(d);
+ uint8_t d = FETCH();
+ uint8_t mask = FETCH();
+ int8_t rel = FETCH();
+ uint8_t i = READ8(d);
if ((i & mask) == 0)
{
@@ -949,10 +949,10 @@ void HC11OP(brclr_dir)()
/* BRCLR INDX 0x1F */
void HC11OP(brclr_indx)()
{
- UINT8 offset = FETCH();
- UINT8 mask = FETCH();
- INT8 rel = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t mask = FETCH();
+ int8_t rel = FETCH();
+ uint8_t i = READ8(m_ix + offset);
if ((i & mask) == 0)
{
@@ -965,10 +965,10 @@ void HC11OP(brclr_indx)()
/* BRSET DIR 0x12 */
void HC11OP(brset_dir)()
{
- UINT8 d = FETCH();
- UINT8 mask = FETCH();
- INT8 rel = FETCH();
- UINT8 i = READ8(d);
+ uint8_t d = FETCH();
+ uint8_t mask = FETCH();
+ int8_t rel = FETCH();
+ uint8_t i = READ8(d);
if(i & mask)
{
@@ -982,10 +982,10 @@ void HC11OP(brset_dir)()
/* BRSET INDX 0x1E */
void HC11OP(brset_indx)()
{
- UINT8 offset = FETCH();
- UINT8 mask = FETCH();
- INT8 rel = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t mask = FETCH();
+ int8_t rel = FETCH();
+ uint8_t i = READ8(m_ix + offset);
if ((~i & mask) == 0)
{
@@ -1007,9 +1007,9 @@ void HC11OP(brn)()
/* BSET DIR 0x14 */
void HC11OP(bset_dir)()
{
- UINT8 d = FETCH();
- UINT8 mask = FETCH();
- UINT8 r = READ8(d) | mask;
+ uint8_t d = FETCH();
+ uint8_t mask = FETCH();
+ uint8_t r = READ8(d) | mask;
WRITE8(d, r);
CLEAR_NZV();
SET_N8(r);
@@ -1020,9 +1020,9 @@ void HC11OP(bset_dir)()
/* BSET INDX 0x1c */
void HC11OP(bset_indx)()
{
- UINT8 offset = FETCH();
- UINT8 mask = FETCH();
- UINT8 r = READ8(m_ix + offset) | mask;
+ uint8_t offset = FETCH();
+ uint8_t mask = FETCH();
+ uint8_t r = READ8(m_ix + offset) | mask;
WRITE8(m_ix + offset, r);
CLEAR_NZV();
SET_N8(r);
@@ -1034,8 +1034,8 @@ void HC11OP(bset_indx)()
/* BSR 0x8D */
void HC11OP(bsr)()
{
- INT8 rel = FETCH();
- UINT16 rt_adr = m_pc;
+ int8_t rel = FETCH();
+ uint16_t rt_adr = m_pc;
PUSH16(rt_adr);
SET_PC(m_ppc + rel + 2);
CYCLES(6);
@@ -1044,7 +1044,7 @@ void HC11OP(bsr)()
/* BVC 0x28 */
void HC11OP(bvc)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if ((m_ccr & CC_V) == 0) /* Branch if V flag clear */
{
SET_PC(m_ppc + rel + 2);
@@ -1055,7 +1055,7 @@ void HC11OP(bvc)()
/* BVS 0x29 */
void HC11OP(bvs)()
{
- INT8 rel = FETCH();
+ int8_t rel = FETCH();
if (m_ccr & CC_V) /* Branch if V flag set */
{
SET_PC(m_ppc + rel + 2);
@@ -1066,7 +1066,7 @@ void HC11OP(bvs)()
/* CBA 0x11 */
void HC11OP(cba)()
{
- UINT16 r = REG_A - REG_B;
+ uint16_t r = REG_A - REG_B;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1112,7 +1112,7 @@ void HC11OP(clrb)()
/* CLR EXT 0x7F */
void HC11OP(clr_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
WRITE8(adr, 0);
CLEAR_NZVC();
SET_ZFLAG();
@@ -1122,7 +1122,7 @@ void HC11OP(clr_ext)()
/* CLR IND, X 0x6F */
void HC11OP(clr_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
WRITE8(m_ix + offset, 0);
CLEAR_NZVC();
SET_ZFLAG();
@@ -1132,7 +1132,7 @@ void HC11OP(clr_indx)()
/* CLR IND, Y 0x18, 0x6F */
void HC11OP(clr_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
WRITE8(m_iy + offset, 0);
CLEAR_NZVC();
SET_ZFLAG();
@@ -1151,8 +1151,8 @@ void HC11OP(clv)()
/* CMPA IMM 0x81 */
void HC11OP(cmpa_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = REG_A - i;
+ uint8_t i = FETCH();
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1164,9 +1164,9 @@ void HC11OP(cmpa_imm)()
/* CMPA DIR 0x91 */
void HC11OP(cmpa_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT16 r = REG_A - i;
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1178,9 +1178,9 @@ void HC11OP(cmpa_dir)()
/* CMPA EXT 0xB1 */
void HC11OP(cmpa_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = REG_A - i;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1192,9 +1192,9 @@ void HC11OP(cmpa_ext)()
/* CMPA IND, X 0xA1 */
void HC11OP(cmpa_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT16 r = REG_A - i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1206,9 +1206,9 @@ void HC11OP(cmpa_indx)()
/* CMPA IND, Y 0x18, 0xA1 */
void HC11OP(cmpa_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT16 r = REG_A - i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1221,8 +1221,8 @@ void HC11OP(cmpa_indy)()
/* CMPB IMM 0xC1 */
void HC11OP(cmpb_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = REG_B - i;
+ uint8_t i = FETCH();
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1234,9 +1234,9 @@ void HC11OP(cmpb_imm)()
/* CMPB DIR 0xD1 */
void HC11OP(cmpb_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT16 r = REG_B - i;
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1248,9 +1248,9 @@ void HC11OP(cmpb_dir)()
/* CMPB EXT 0xF1 */
void HC11OP(cmpb_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = REG_B - i;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1262,9 +1262,9 @@ void HC11OP(cmpb_ext)()
/* CMPB IND, X 0xE1 */
void HC11OP(cmpb_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT16 r = REG_B - i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1276,9 +1276,9 @@ void HC11OP(cmpb_indx)()
/* CMPB IND, Y 0x18, 0xE1 */
void HC11OP(cmpb_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT16 r = REG_B - i;
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1291,7 +1291,7 @@ void HC11OP(cmpb_indy)()
/* COMA , 0x43 */
void HC11OP(coma)()
{
- UINT16 r = 0xff - REG_A;
+ uint16_t r = 0xff - REG_A;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1304,7 +1304,7 @@ void HC11OP(coma)()
/* COMB , 0x53 */
void HC11OP(comb)()
{
- UINT16 r = 0xff - REG_B;
+ uint16_t r = 0xff - REG_B;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
@@ -1317,8 +1317,8 @@ void HC11OP(comb)()
/* CPD IMM 0x1A, 0x83 */
void HC11OP(cpd_imm)()
{
- UINT16 i = FETCH16();
- UINT32 r = REG_D - i;
+ uint16_t i = FETCH16();
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1330,9 +1330,9 @@ void HC11OP(cpd_imm)()
/* CPD DIR 0x1A, 0x93 */
void HC11OP(cpd_dir)()
{
- UINT8 d = FETCH();
- UINT16 i = READ16(d);
- UINT32 r = REG_D - i;
+ uint8_t d = FETCH();
+ uint16_t i = READ16(d);
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1344,9 +1344,9 @@ void HC11OP(cpd_dir)()
/* CPD EXT 0x1A, 0xB3 */
void HC11OP(cpd_ext)()
{
- UINT16 adr = FETCH16();
- UINT16 i = READ16(adr);
- UINT32 r = REG_D - i;
+ uint16_t adr = FETCH16();
+ uint16_t i = READ16(adr);
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1358,9 +1358,9 @@ void HC11OP(cpd_ext)()
/* CPD IND, X 0x1A, 0xA3 */
void HC11OP(cpd_indx)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_ix + offset);
- UINT32 r = REG_D - i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_ix + offset);
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1372,9 +1372,9 @@ void HC11OP(cpd_indx)()
/* CPD IND, Y 0xCD, 0xA3 */
void HC11OP(cpd_indy)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_iy + offset);
- UINT32 r = REG_D - i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_iy + offset);
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1387,8 +1387,8 @@ void HC11OP(cpd_indy)()
/* CPX IMM 0x8C */
void HC11OP(cpx_imm)()
{
- UINT16 i = FETCH16();
- UINT32 r = m_ix - i;
+ uint16_t i = FETCH16();
+ uint32_t r = m_ix - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1400,9 +1400,9 @@ void HC11OP(cpx_imm)()
/* CPX DIR 0x9C */
void HC11OP(cpx_dir)()
{
- UINT8 d = FETCH();
- UINT16 i = READ16(d);
- UINT32 r = m_ix - i;
+ uint8_t d = FETCH();
+ uint16_t i = READ16(d);
+ uint32_t r = m_ix - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1414,9 +1414,9 @@ void HC11OP(cpx_dir)()
/* CPX EXT 0xBC */
void HC11OP(cpx_ext)()
{
- UINT16 adr = FETCH16();
- UINT16 i = READ16(adr);
- UINT32 r = m_ix - i;
+ uint16_t adr = FETCH16();
+ uint16_t i = READ16(adr);
+ uint32_t r = m_ix - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1428,9 +1428,9 @@ void HC11OP(cpx_ext)()
/* CPX IND, X 0xAC */
void HC11OP(cpx_indx)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_ix + offset);
- UINT32 r = m_ix - i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_ix + offset);
+ uint32_t r = m_ix - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1442,9 +1442,9 @@ void HC11OP(cpx_indx)()
/* CPX IND, Y 0xCD, 0xAC */
void HC11OP(cpx_indy)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_iy + offset);
- UINT32 r = m_ix - i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_iy + offset);
+ uint32_t r = m_ix - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1456,8 +1456,8 @@ void HC11OP(cpx_indy)()
/* CPY IMM 0x18, 0x8C */
void HC11OP(cpy_imm)()
{
- UINT16 i = FETCH16();
- UINT32 r = m_iy - i;
+ uint16_t i = FETCH16();
+ uint32_t r = m_iy - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1469,9 +1469,9 @@ void HC11OP(cpy_imm)()
/* CPY DIR 0x18 0x9C */
void HC11OP(cpy_dir)()
{
- UINT8 d = FETCH();
- UINT16 i = READ16(d);
- UINT32 r = m_iy - i;
+ uint8_t d = FETCH();
+ uint16_t i = READ16(d);
+ uint32_t r = m_iy - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1483,9 +1483,9 @@ void HC11OP(cpy_dir)()
/* CPY EXT 0x18 0xBC */
void HC11OP(cpy_ext)()
{
- UINT16 adr = FETCH16();
- UINT16 i = READ16(adr);
- UINT32 r = m_iy - i;
+ uint16_t adr = FETCH16();
+ uint16_t i = READ16(adr);
+ uint32_t r = m_iy - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1497,9 +1497,9 @@ void HC11OP(cpy_ext)()
/* CPY IND, X 0x1A 0xAC */
void HC11OP(cpy_indx)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_ix + offset);
- UINT32 r = m_iy - i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_ix + offset);
+ uint32_t r = m_iy - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1511,9 +1511,9 @@ void HC11OP(cpy_indx)()
/* CPY IND, Y 0x18 0xAC */
void HC11OP(cpy_indy)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_iy + offset);
- UINT32 r = m_iy - i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_iy + offset);
+ uint32_t r = m_iy - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
@@ -1549,8 +1549,8 @@ void HC11OP(decb)()
/* DEC EXT 0x7A */
void HC11OP(dec_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZV();
if (i == 0x80)
@@ -1565,8 +1565,8 @@ void HC11OP(dec_ext)()
/* DEC INDX 0x6A */
void HC11OP(dec_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZV();
if (i == 0x80)
@@ -1581,8 +1581,8 @@ void HC11OP(dec_indx)()
/* DEC INDY 0x18 0x6A */
void HC11OP(dec_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZV();
if (i == 0x80)
@@ -1617,7 +1617,7 @@ void HC11OP(dey)()
/* EORA IMM 0x88 */
void HC11OP(eora_imm)()
{
- UINT8 i = FETCH();
+ uint8_t i = FETCH();
CLEAR_NZV();
REG_A ^= i;
SET_N8(REG_A);
@@ -1628,8 +1628,8 @@ void HC11OP(eora_imm)()
/* EORA DIR 0x98 */
void HC11OP(eora_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
CLEAR_NZV();
REG_A ^= i;
SET_N8(REG_A);
@@ -1640,8 +1640,8 @@ void HC11OP(eora_dir)()
/* EORA EXT 0xB8 */
void HC11OP(eora_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZV();
REG_A ^= i;
SET_N8(REG_A);
@@ -1652,8 +1652,8 @@ void HC11OP(eora_ext)()
/* EORA IND, X 0xA8 */
void HC11OP(eora_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZV();
REG_A ^= i;
SET_N8(REG_A);
@@ -1664,8 +1664,8 @@ void HC11OP(eora_indx)()
/* EORA IND, Y 0x18, 0xA8 */
void HC11OP(eora_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZV();
REG_A ^= i;
SET_N8(REG_A);
@@ -1677,7 +1677,7 @@ void HC11OP(eora_indy)()
/* EORB IMM 0xC8 */
void HC11OP(eorb_imm)()
{
- UINT8 i = FETCH();
+ uint8_t i = FETCH();
CLEAR_NZV();
REG_B ^= i;
SET_N8(REG_B);
@@ -1688,8 +1688,8 @@ void HC11OP(eorb_imm)()
/* EORB DIR 0xD8 */
void HC11OP(eorb_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
CLEAR_NZV();
REG_B ^= i;
SET_N8(REG_B);
@@ -1700,8 +1700,8 @@ void HC11OP(eorb_dir)()
/* EORB EXT 0xF8 */
void HC11OP(eorb_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZV();
REG_B ^= i;
SET_N8(REG_B);
@@ -1712,8 +1712,8 @@ void HC11OP(eorb_ext)()
/* EORB IND, X 0xE8 */
void HC11OP(eorb_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZV();
REG_B ^= i;
SET_N8(REG_B);
@@ -1724,8 +1724,8 @@ void HC11OP(eorb_indx)()
/* EORB IND, Y 0x18, 0xE8 */
void HC11OP(eorb_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZV();
REG_B ^= i;
SET_N8(REG_B);
@@ -1736,10 +1736,10 @@ void HC11OP(eorb_indy)()
/* IDIV 0x02 */
void HC11OP(idiv)()
{
- UINT16 numerator = REG_D;
- UINT16 denominator = m_ix;
- UINT16 remainder;
- UINT16 result;
+ uint16_t numerator = REG_D;
+ uint16_t denominator = m_ix;
+ uint16_t remainder;
+ uint16_t result;
CLEAR_ZVC();
if(denominator == 0) // divide by zero behaviour
@@ -1788,8 +1788,8 @@ void HC11OP(incb)()
/* INC EXT 0x7C */
void HC11OP(inc_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZV();
if (i == 0x7f)
@@ -1804,8 +1804,8 @@ void HC11OP(inc_ext)()
/* INC INDX 0x6C */
void HC11OP(inc_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZV();
if (i == 0x7f)
@@ -1821,8 +1821,8 @@ void HC11OP(inc_indx)()
/* INC INDY 0x18 0x6C */
void HC11OP(inc_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZV();
if (i == 0x7f)
@@ -1856,7 +1856,7 @@ void HC11OP(iny)()
/* JMP IND X 0x6E */
void HC11OP(jmp_indx)()
{
- UINT16 adr = FETCH();
+ uint16_t adr = FETCH();
SET_PC(m_ix + adr);
CYCLES(3);
}
@@ -1864,7 +1864,7 @@ void HC11OP(jmp_indx)()
/* JMP IND Y 0x18 0x6E */
void HC11OP(jmp_indy)()
{
- UINT16 adr = FETCH();
+ uint16_t adr = FETCH();
SET_PC(m_iy + adr);
CYCLES(4);
}
@@ -1872,7 +1872,7 @@ void HC11OP(jmp_indy)()
/* JMP EXT 0x7E */
void HC11OP(jmp_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
SET_PC(adr);
CYCLES(3);
}
@@ -1881,8 +1881,8 @@ void HC11OP(jmp_ext)()
/* JSR DIR 0x9D */
void HC11OP(jsr_dir)()
{
- UINT8 i = FETCH();
- UINT16 rt_adr = m_pc;
+ uint8_t i = FETCH();
+ uint16_t rt_adr = m_pc;
PUSH16(rt_adr);
SET_PC(i);
CYCLES(5);
@@ -1891,8 +1891,8 @@ void HC11OP(jsr_dir)()
/* JSR EXT 0xBD */
void HC11OP(jsr_ext)()
{
- UINT16 adr = FETCH16();
- UINT16 rt_adr = m_pc;
+ uint16_t adr = FETCH16();
+ uint16_t rt_adr = m_pc;
PUSH16(rt_adr);
SET_PC(adr);
CYCLES(6);
@@ -1901,8 +1901,8 @@ void HC11OP(jsr_ext)()
/* JSR IND, X 0xAD */
void HC11OP(jsr_indx)()
{
- UINT8 offset = FETCH();
- UINT16 rt_adr = m_pc;
+ uint8_t offset = FETCH();
+ uint16_t rt_adr = m_pc;
PUSH16(rt_adr);
SET_PC(m_ix + offset);
CYCLES(6);
@@ -1911,8 +1911,8 @@ void HC11OP(jsr_indx)()
/* JSR IND, Y 0x18, 0xAD */
void HC11OP(jsr_indy)()
{
- UINT8 offset = FETCH();
- UINT16 rt_adr = m_pc;
+ uint8_t offset = FETCH();
+ uint16_t rt_adr = m_pc;
PUSH16(rt_adr);
SET_PC(m_iy + offset);
CYCLES(6);
@@ -1932,7 +1932,7 @@ void HC11OP(ldaa_imm)()
/* LDAA DIR 0x96 */
void HC11OP(ldaa_dir)()
{
- UINT8 d = FETCH();
+ uint8_t d = FETCH();
CLEAR_NZV();
REG_A = READ8(d);
SET_N8(REG_A);
@@ -1943,7 +1943,7 @@ void HC11OP(ldaa_dir)()
/* LDAA EXT 0xB6 */
void HC11OP(ldaa_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
REG_A = READ8(adr);
SET_N8(REG_A);
@@ -1954,7 +1954,7 @@ void HC11OP(ldaa_ext)()
/* LDAA IND, X 0xA6 */
void HC11OP(ldaa_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
REG_A = READ8(m_ix + offset);
SET_N8(REG_A);
@@ -1965,7 +1965,7 @@ void HC11OP(ldaa_indx)()
/* LDAA IND, Y 0x18, 0xA6 */
void HC11OP(ldaa_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
REG_A = READ8(m_iy + offset);
SET_N8(REG_A);
@@ -1986,7 +1986,7 @@ void HC11OP(ldab_imm)()
/* LDAB DIR 0xD6 */
void HC11OP(ldab_dir)()
{
- UINT8 d = FETCH();
+ uint8_t d = FETCH();
CLEAR_NZV();
REG_B = READ8(d);
SET_N8(REG_B);
@@ -1997,7 +1997,7 @@ void HC11OP(ldab_dir)()
/* LDAB EXT 0xF6 */
void HC11OP(ldab_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
REG_B = READ8(adr);
SET_N8(REG_B);
@@ -2008,7 +2008,7 @@ void HC11OP(ldab_ext)()
/* LDAB IND, X 0xE6 */
void HC11OP(ldab_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
REG_B = READ8(m_ix + offset);
SET_N8(REG_B);
@@ -2019,7 +2019,7 @@ void HC11OP(ldab_indx)()
/* LDAB IND, Y 0x18, 0xE6 */
void HC11OP(ldab_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
REG_B = READ8(m_iy + offset);
SET_N8(REG_B);
@@ -2041,7 +2041,7 @@ void HC11OP(ldd_imm)()
/* LDD DIR 0xDC */
void HC11OP(ldd_dir)()
{
- UINT8 d = FETCH();
+ uint8_t d = FETCH();
CLEAR_NZV();
REG_D = READ16(d);
SET_N16(REG_D);
@@ -2052,7 +2052,7 @@ void HC11OP(ldd_dir)()
/* LDD EXT 0xFC */
void HC11OP(ldd_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
REG_D = READ16(adr);
SET_N16(REG_D);
@@ -2063,7 +2063,7 @@ void HC11OP(ldd_ext)()
/* LDD IND, X 0xEC */
void HC11OP(ldd_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
REG_D = READ16(m_ix + offset);
SET_N16(REG_D);
@@ -2074,7 +2074,7 @@ void HC11OP(ldd_indx)()
/* LDD IND, Y 0x18, 0xEC */
void HC11OP(ldd_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
REG_D = READ16(m_iy + offset);
SET_N16(REG_D);
@@ -2096,7 +2096,7 @@ void HC11OP(lds_imm)()
/* LDS DIR 0x9E */
void HC11OP(lds_dir)()
{
- UINT8 i = FETCH();
+ uint8_t i = FETCH();
CLEAR_NZV();
m_sp = READ16(i);
SET_N16(m_sp);
@@ -2107,7 +2107,7 @@ void HC11OP(lds_dir)()
/* LDS EXT 0xBE */
void HC11OP(lds_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
m_sp = READ16(adr);
SET_N16(m_sp);
@@ -2118,7 +2118,7 @@ void HC11OP(lds_ext)()
/* LDS IND, X 0xAE */
void HC11OP(lds_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
m_sp = READ16(m_ix + offset);
SET_N16(m_sp);
@@ -2129,7 +2129,7 @@ void HC11OP(lds_indx)()
/* LDS IND, Y 0x18, 0xAE */
void HC11OP(lds_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
m_sp = READ16(m_iy + offset);
SET_N16(m_sp);
@@ -2151,7 +2151,7 @@ void HC11OP(ldx_imm)()
/* LDX DIR 0xDE */
void HC11OP(ldx_dir)()
{
- UINT8 d = FETCH();
+ uint8_t d = FETCH();
CLEAR_NZV();
m_ix = READ16(d);
SET_N16(m_ix);
@@ -2162,7 +2162,7 @@ void HC11OP(ldx_dir)()
/* LDX EXT 0xFE */
void HC11OP(ldx_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
m_ix = READ16(adr);
SET_N16(m_ix);
@@ -2173,7 +2173,7 @@ void HC11OP(ldx_ext)()
/* LDX IND, X 0xEE */
void HC11OP(ldx_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
m_ix = READ16(m_ix + offset);
SET_N16(m_ix);
@@ -2184,7 +2184,7 @@ void HC11OP(ldx_indx)()
/* LDX IND, Y 0xCD, 0xEE */
void HC11OP(ldx_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
m_ix = READ16(m_iy + offset);
SET_N16(m_ix);
@@ -2206,7 +2206,7 @@ void HC11OP(ldy_imm)()
/* LDY DIR 0x18, 0xDE */
void HC11OP(ldy_dir)()
{
- UINT8 d = FETCH();
+ uint8_t d = FETCH();
CLEAR_NZV();
m_iy = READ16(d);
SET_N16(m_iy);
@@ -2217,7 +2217,7 @@ void HC11OP(ldy_dir)()
/* LDY EXT 0x18, 0xFE */
void HC11OP(ldy_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
m_iy = READ16(adr);
SET_N16(m_iy);
@@ -2228,7 +2228,7 @@ void HC11OP(ldy_ext)()
/* LDY IND, X 0x1A, 0xEE */
void HC11OP(ldy_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
m_iy = READ16(m_ix + offset);
SET_N16(m_iy);
@@ -2239,7 +2239,7 @@ void HC11OP(ldy_indx)()
/* LDY IND, Y 0x18, 0xEE */
void HC11OP(ldy_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
m_iy = READ16(m_iy + offset);
SET_N16(m_iy);
@@ -2250,10 +2250,10 @@ void HC11OP(ldy_indy)()
/* LSLD 0x05 */
void HC11OP(lsld)()
{
- UINT32 r = REG_D << 1;
+ uint32_t r = REG_D << 1;
CLEAR_NZVC();
SET_C16(r);
- REG_D = (UINT16)(r);
+ REG_D = (uint16_t)(r);
SET_N16(REG_D);
SET_Z16(REG_D);
@@ -2269,10 +2269,10 @@ void HC11OP(lsld)()
/* LSRA 0x44 */
void HC11OP(lsra)()
{
- UINT16 r = REG_A >> 1;
+ uint16_t r = REG_A >> 1;
CLEAR_NZVC();
m_ccr |= (REG_A & 1) ? CC_C : 0;
- REG_A = (UINT8)(r);
+ REG_A = (uint8_t)(r);
m_ccr |= ((m_ccr & CC_C)) ? CC_V : 0;
SET_Z8(REG_A);
@@ -2282,10 +2282,10 @@ void HC11OP(lsra)()
/* LSRB 0x54 */
void HC11OP(lsrb)()
{
- UINT16 r = REG_B >> 1;
+ uint16_t r = REG_B >> 1;
CLEAR_NZVC();
m_ccr |= (REG_B & 1) ? CC_C : 0;
- REG_B = (UINT8)(r);
+ REG_B = (uint8_t)(r);
m_ccr |= ((m_ccr & CC_C)) ? CC_V : 0;
SET_Z8(REG_B);
@@ -2295,10 +2295,10 @@ void HC11OP(lsrb)()
/* LSRD 0x04 */
void HC11OP(lsrd)()
{
- UINT32 r = REG_D >> 1;
+ uint32_t r = REG_D >> 1;
CLEAR_NZVC();
m_ccr |= (REG_D & 1) ? CC_C : 0;
- REG_D = (UINT16)(r);
+ REG_D = (uint16_t)(r);
m_ccr |= ((m_ccr & CC_C)) ? CC_V : 0;
SET_N16(REG_D);
@@ -2344,8 +2344,8 @@ void HC11OP(negb)()
/* NEG EXT 0x70 */
void HC11OP(neg_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = 0x00 - READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = 0x00 - READ8(adr);
CLEAR_NZVC();
SET_N8(i);
SET_Z8(i);
@@ -2359,8 +2359,8 @@ void HC11OP(neg_ext)()
/* NEG INDX 0x60 */
void HC11OP(neg_indx)()
{
- UINT16 offset = FETCH();
- UINT8 i = 0x00 - READ8(m_ix + offset);
+ uint16_t offset = FETCH();
+ uint8_t i = 0x00 - READ8(m_ix + offset);
CLEAR_NZVC();
SET_N8(i);
SET_Z8(i);
@@ -2374,8 +2374,8 @@ void HC11OP(neg_indx)()
/* NEG INDY 0x18 0x60 */
void HC11OP(neg_indy)()
{
- UINT16 offset = FETCH();
- UINT8 i = 0x00 - READ8(m_iy + offset);
+ uint16_t offset = FETCH();
+ uint8_t i = 0x00 - READ8(m_iy + offset);
CLEAR_NZVC();
SET_N8(i);
SET_Z8(i);
@@ -2402,7 +2402,7 @@ void HC11OP(psha)()
/* ORAA IMM 0x8A */
void HC11OP(oraa_imm)()
{
- UINT8 i = FETCH();
+ uint8_t i = FETCH();
CLEAR_NZV();
REG_A |= i;
SET_N8(REG_A);
@@ -2413,8 +2413,8 @@ void HC11OP(oraa_imm)()
/* ORAA DIR 0x9A */
void HC11OP(oraa_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
CLEAR_NZV();
REG_A |= i;
SET_N8(REG_A);
@@ -2425,8 +2425,8 @@ void HC11OP(oraa_dir)()
/* ORAA EXT 0xBA */
void HC11OP(oraa_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZV();
REG_A |= i;
SET_N8(REG_A);
@@ -2437,8 +2437,8 @@ void HC11OP(oraa_ext)()
/* ORAA IND, X 0xAA */
void HC11OP(oraa_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZV();
REG_A |= i;
SET_N8(REG_A);
@@ -2449,8 +2449,8 @@ void HC11OP(oraa_indx)()
/* ORAA IND, Y 0x18, 0xAA */
void HC11OP(oraa_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZV();
REG_A |= i;
SET_N8(REG_A);
@@ -2462,7 +2462,7 @@ void HC11OP(oraa_indy)()
/* ORAB IMM 0xCA */
void HC11OP(orab_imm)()
{
- UINT8 i = FETCH();
+ uint8_t i = FETCH();
CLEAR_NZV();
REG_B |= i;
SET_N8(REG_B);
@@ -2473,8 +2473,8 @@ void HC11OP(orab_imm)()
/* ORAB DIR 0xDA */
void HC11OP(orab_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
CLEAR_NZV();
REG_B |= i;
SET_N8(REG_B);
@@ -2485,8 +2485,8 @@ void HC11OP(orab_dir)()
/* ORAB EXT 0xFA */
void HC11OP(orab_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZV();
REG_B |= i;
SET_N8(REG_B);
@@ -2497,8 +2497,8 @@ void HC11OP(orab_ext)()
/* ORAB IND, X 0xEA */
void HC11OP(orab_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZV();
REG_B |= i;
SET_N8(REG_B);
@@ -2509,8 +2509,8 @@ void HC11OP(orab_indx)()
/* ORAB IND, Y 0x18, 0xEA */
void HC11OP(orab_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZV();
REG_B |= i;
SET_N8(REG_B);
@@ -2577,10 +2577,10 @@ void HC11OP(puly)()
/* ROLA 0x49 */
void HC11OP(rola)()
{
- UINT16 r = ((REG_A & 0x7f) << 1) | ((m_ccr & CC_C) ? 1 : 0);
+ uint16_t r = ((REG_A & 0x7f) << 1) | ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
m_ccr |= (REG_A & 0x80) ? CC_C : 0;
- REG_A = (UINT8)(r);
+ REG_A = (uint8_t)(r);
SET_N8(REG_A);
SET_Z8(REG_A);
@@ -2596,10 +2596,10 @@ void HC11OP(rola)()
/* ROLB 0x59 */
void HC11OP(rolb)()
{
- UINT16 r = ((REG_B & 0x7f) << 1) | ((m_ccr & CC_C) ? 1 : 0);
+ uint16_t r = ((REG_B & 0x7f) << 1) | ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
m_ccr |= (REG_B & 0x80) ? CC_C : 0;
- REG_B = (UINT8)(r);
+ REG_B = (uint8_t)(r);
SET_N8(REG_B);
SET_Z8(REG_B);
@@ -2615,9 +2615,9 @@ void HC11OP(rolb)()
/* ROL EXT 0x79 */
void HC11OP(rol_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 r = READ8(adr);
- UINT8 c = (r & 0x80);
+ uint16_t adr = FETCH16();
+ uint8_t r = READ8(adr);
+ uint8_t c = (r & 0x80);
r = ((r & 0x7f) << 1) | ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
m_ccr |= (c & 0x80) ? CC_C : 0;
@@ -2637,9 +2637,9 @@ void HC11OP(rol_ext)()
/* ROL INDX 0x69 */
void HC11OP(rol_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT8 c = (i & 0x80);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint8_t c = (i & 0x80);
i = ((i & 0x7f) << 1) | ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
m_ccr |= (c & 0x80) ? CC_C : 0;
@@ -2659,9 +2659,9 @@ void HC11OP(rol_indx)()
/* ROL INDY 0x18 0x69 */
void HC11OP(rol_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT8 c = (i & 0x80);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint8_t c = (i & 0x80);
i = ((i & 0x7f) << 1) | ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
m_ccr |= (c & 0x80) ? CC_C : 0;
@@ -2682,10 +2682,10 @@ void HC11OP(rol_indy)()
/* RORA 0x46 */
void HC11OP(rora)()
{
- UINT16 r = ((REG_A & 0xfe) >> 1) | ((m_ccr & CC_C) ? 0x80 : 0);
+ uint16_t r = ((REG_A & 0xfe) >> 1) | ((m_ccr & CC_C) ? 0x80 : 0);
CLEAR_NZVC();
m_ccr |= (REG_A & 1) ? CC_C : 0;
- REG_A = (UINT8)(r);
+ REG_A = (uint8_t)(r);
SET_N8(REG_A);
SET_Z8(REG_A);
@@ -2701,10 +2701,10 @@ void HC11OP(rora)()
/* RORB 0x56 */
void HC11OP(rorb)()
{
- UINT16 r = ((REG_B & 0xfe) >> 1) | ((m_ccr & CC_C) ? 0x80 : 0);
+ uint16_t r = ((REG_B & 0xfe) >> 1) | ((m_ccr & CC_C) ? 0x80 : 0);
CLEAR_NZVC();
m_ccr |= (REG_B & 1) ? CC_C : 0;
- REG_B = (UINT8)(r);
+ REG_B = (uint8_t)(r);
SET_N8(REG_B);
SET_Z8(REG_B);
@@ -2720,8 +2720,8 @@ void HC11OP(rorb)()
/* RTI 0x3B */
void HC11OP(rti)()
{
- UINT16 rt_adr;
- UINT8 x_flag = m_ccr & CC_X;
+ uint16_t rt_adr;
+ uint8_t x_flag = m_ccr & CC_X;
m_ccr = POP8();
if(x_flag == 0 && m_ccr & CC_X) //X flag cannot do a 0->1 transition with this instruction.
m_ccr &= ~CC_X;
@@ -2737,7 +2737,7 @@ void HC11OP(rti)()
/* RTS 0x39 */
void HC11OP(rts)()
{
- UINT16 rt_adr = POP16();
+ uint16_t rt_adr = POP16();
SET_PC(rt_adr);
CYCLES(5);
}
@@ -2746,13 +2746,13 @@ void HC11OP(rts)()
/* SBA 0x10 */
void HC11OP(sba)()
{
- UINT16 r = REG_A - REG_B;
+ uint16_t r = REG_A - REG_B;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, REG_B, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(2);
}
@@ -2760,88 +2760,88 @@ void HC11OP(sba)()
/* SBCA IMM 0x82 */
void HC11OP(sbca_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = (REG_A - i) - ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t i = FETCH();
+ uint16_t r = (REG_A - i) - ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(2);
}
/* SBCA IND, X 0xA2 */
void HC11OP(sbca_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT16 r = (REG_A - i) - ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint16_t r = (REG_A - i) - ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(4);
}
/* SBCA IND, Y 0x18, 0xA2 */
void HC11OP(sbca_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT16 r = (REG_A - i) - ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint16_t r = (REG_A - i) - ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(5);
}
/* SBCB IMM 0xC2 */
void HC11OP(sbcb_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = (REG_B - i) - ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t i = FETCH();
+ uint16_t r = (REG_B - i) - ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(2);
}
/* SBCB IND, X 0xE2 */
void HC11OP(sbcb_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
- UINT16 r = (REG_B - i) - ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
+ uint16_t r = (REG_B - i) - ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(4);
}
/* SBCB IND, Y 0x18, 0xE2 */
void HC11OP(sbcb_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
- UINT16 r = (REG_B - i) - ((m_ccr & CC_C) ? 1 : 0);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
+ uint16_t r = (REG_B - i) - ((m_ccr & CC_C) ? 1 : 0);
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(5);
}
@@ -2869,7 +2869,7 @@ void HC11OP(sev)()
/* STAA DIR 0x97 */
void HC11OP(staa_dir)()
{
- UINT8 d = FETCH();
+ uint8_t d = FETCH();
CLEAR_NZV();
SET_N8(REG_A);
SET_Z8(REG_A);
@@ -2880,7 +2880,7 @@ void HC11OP(staa_dir)()
/* STAA EXT 0xB7 */
void HC11OP(staa_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
SET_N8(REG_A);
SET_Z8(REG_A);
@@ -2891,7 +2891,7 @@ void HC11OP(staa_ext)()
/* STAA IND, X 0xA7 */
void HC11OP(staa_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
SET_N8(REG_A);
SET_Z8(REG_A);
@@ -2902,7 +2902,7 @@ void HC11OP(staa_indx)()
/* STAA IND, Y 0x18, 0xA7 */
void HC11OP(staa_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
SET_N8(REG_A);
SET_Z8(REG_A);
@@ -2913,7 +2913,7 @@ void HC11OP(staa_indy)()
/* STAB DIR 0xD7 */
void HC11OP(stab_dir)()
{
- UINT8 d = FETCH();
+ uint8_t d = FETCH();
CLEAR_NZV();
SET_N8(REG_B);
SET_Z8(REG_B);
@@ -2924,7 +2924,7 @@ void HC11OP(stab_dir)()
/* STAB EXT 0xF7 */
void HC11OP(stab_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
SET_N8(REG_B);
SET_Z8(REG_B);
@@ -2935,7 +2935,7 @@ void HC11OP(stab_ext)()
/* STAB IND, X 0xE7 */
void HC11OP(stab_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
SET_N8(REG_B);
SET_Z8(REG_B);
@@ -2946,7 +2946,7 @@ void HC11OP(stab_indx)()
/* STAB IND, Y 0x18, 0xE7 */
void HC11OP(stab_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
SET_N8(REG_B);
SET_Z8(REG_B);
@@ -2958,7 +2958,7 @@ void HC11OP(stab_indy)()
/* STD DIR 0xDD */
void HC11OP(std_dir)()
{
- UINT8 d = FETCH();
+ uint8_t d = FETCH();
CLEAR_NZV();
WRITE16(d, REG_D);
SET_N16(REG_D);
@@ -2969,7 +2969,7 @@ void HC11OP(std_dir)()
/* STD EXT 0xFD */
void HC11OP(std_ext)()
{
- UINT16 adr = FETCH16();
+ uint16_t adr = FETCH16();
CLEAR_NZV();
WRITE16(adr, REG_D);
SET_N16(REG_D);
@@ -2980,7 +2980,7 @@ void HC11OP(std_ext)()
/* STD IND, X 0xED */
void HC11OP(std_indx)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
WRITE16(m_ix + offset, REG_D);
SET_N16(REG_D);
@@ -2991,7 +2991,7 @@ void HC11OP(std_indx)()
/* STD IND, Y 0x18, 0xED */
void HC11OP(std_indy)()
{
- UINT8 offset = FETCH();
+ uint8_t offset = FETCH();
CLEAR_NZV();
WRITE16(m_iy + offset, REG_D);
SET_N16(REG_D);
@@ -3002,8 +3002,8 @@ void HC11OP(std_indy)()
/* STS DIR 0x9F */
void HC11OP(sts_dir)()
{
- UINT8 d = FETCH();
- UINT16 r = m_sp;
+ uint8_t d = FETCH();
+ uint16_t r = m_sp;
CLEAR_NZV();
WRITE8(d, (r & 0xff00) >> 8);
WRITE8(d + 1, (r & 0xff));
@@ -3016,8 +3016,8 @@ void HC11OP(sts_dir)()
/* STX DIR 0xDF */
void HC11OP(stx_dir)()
{
- UINT8 adr = FETCH();
- UINT16 r = m_ix;
+ uint8_t adr = FETCH();
+ uint16_t r = m_ix;
CLEAR_NZV();
WRITE8(adr, (r & 0xff00) >> 8);
WRITE8(adr + 1, (r & 0xff));
@@ -3029,8 +3029,8 @@ void HC11OP(stx_dir)()
/* STX EXT 0xFF */
void HC11OP(stx_ext)()
{
- UINT16 adr = FETCH16();
- UINT16 r = m_ix;
+ uint16_t adr = FETCH16();
+ uint16_t r = m_ix;
CLEAR_NZV();
WRITE8(adr, (r & 0xff00) >> 8);
WRITE8(adr + 1, (r & 0xff));
@@ -3043,8 +3043,8 @@ void HC11OP(stx_ext)()
/* STX INDX 0xEF */
void HC11OP(stx_indx)()
{
- UINT16 adr = FETCH();
- UINT16 r = m_ix;
+ uint16_t adr = FETCH();
+ uint16_t r = m_ix;
CLEAR_NZV();
WRITE8(m_ix + adr, (r & 0xff00) >> 8);
WRITE8(m_ix + adr + 1, (r & 0xff));
@@ -3057,8 +3057,8 @@ void HC11OP(stx_indx)()
/* STX INDY 0xCD 0xEF */
void HC11OP(stx_indy)()
{
- UINT16 adr = FETCH();
- UINT16 r = m_ix;
+ uint16_t adr = FETCH();
+ uint16_t r = m_ix;
CLEAR_NZV();
WRITE8(m_iy + adr, (r & 0xff00) >> 8);
WRITE8(m_iy + adr + 1, (r & 0xff));
@@ -3070,8 +3070,8 @@ void HC11OP(stx_indy)()
/* STY DIR 0x18 0xDF */
void HC11OP(sty_dir)()
{
- UINT8 adr = FETCH();
- UINT16 r = m_iy;
+ uint8_t adr = FETCH();
+ uint16_t r = m_iy;
CLEAR_NZV();
WRITE8(adr, (r & 0xff00) >> 8);
WRITE8(adr + 1, (r & 0xff));
@@ -3084,8 +3084,8 @@ void HC11OP(sty_dir)()
/* STY EXT 0x18 0xFF */
void HC11OP(sty_ext)()
{
- UINT16 adr = FETCH16();
- UINT16 r = m_iy;
+ uint16_t adr = FETCH16();
+ uint16_t r = m_iy;
CLEAR_NZV();
WRITE8(adr, (r & 0xff00) >> 8);
WRITE8(adr + 1, (r & 0xff));
@@ -3097,8 +3097,8 @@ void HC11OP(sty_ext)()
/* STY INDX 0x1A 0xEF */
void HC11OP(sty_indx)()
{
- UINT16 adr = FETCH();
- UINT16 r = m_iy;
+ uint16_t adr = FETCH();
+ uint16_t r = m_iy;
CLEAR_NZV();
WRITE8(m_ix + adr, (r & 0xff00) >> 8);
WRITE8(m_ix + adr + 1, (r & 0xff));
@@ -3110,8 +3110,8 @@ void HC11OP(sty_indx)()
/* STY INDY 0x18 0xEF */
void HC11OP(sty_indy)()
{
- UINT16 adr = FETCH();
- UINT16 r = m_iy;
+ uint16_t adr = FETCH();
+ uint16_t r = m_iy;
CLEAR_NZV();
WRITE8(m_iy + adr, (r & 0xff00) >> 8);
WRITE8(m_iy + adr + 1, (r & 0xff));
@@ -3145,14 +3145,14 @@ void HC11OP(stop)()
/* SUBA IMM 0x80 */
void HC11OP(suba_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = REG_A - i;
+ uint8_t i = FETCH();
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(2);
}
@@ -3160,15 +3160,15 @@ void HC11OP(suba_imm)()
/* SUBA DIR 0xd0 */
void HC11OP(suba_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT16 r = REG_A - i;
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(3);
}
@@ -3176,15 +3176,15 @@ void HC11OP(suba_dir)()
/* SUBA EXT 0xE0 */
void HC11OP(suba_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = REG_A - i;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(4);
}
@@ -3192,15 +3192,15 @@ void HC11OP(suba_ext)()
/* SUBA INDX 0xA0 */
void HC11OP(suba_indx)()
{
- UINT16 adr = FETCH();
- UINT8 i = READ8(m_ix + adr);
- UINT16 r = REG_A - i;
+ uint16_t adr = FETCH();
+ uint8_t i = READ8(m_ix + adr);
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(4);
}
@@ -3208,15 +3208,15 @@ void HC11OP(suba_indx)()
/* SUBA INDY 0x18 0xA0 */
void HC11OP(suba_indy)()
{
- UINT16 adr = FETCH();
- UINT8 i = READ8(m_iy + adr);
- UINT16 r = REG_A - i;
+ uint16_t adr = FETCH();
+ uint8_t i = READ8(m_iy + adr);
+ uint16_t r = REG_A - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_A);
SET_C8(r);
- REG_A = (UINT8)r;
+ REG_A = (uint8_t)r;
CYCLES(5);
}
@@ -3224,14 +3224,14 @@ void HC11OP(suba_indy)()
/* SUBB IMM 0xC0 */
void HC11OP(subb_imm)()
{
- UINT8 i = FETCH();
- UINT16 r = REG_B - i;
+ uint8_t i = FETCH();
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(2);
}
@@ -3239,15 +3239,15 @@ void HC11OP(subb_imm)()
/* SUBB DIR 0xD0 */
void HC11OP(subb_dir)()
{
- UINT8 d = FETCH();
- UINT8 i = READ8(d);
- UINT16 r = REG_B - i;
+ uint8_t d = FETCH();
+ uint8_t i = READ8(d);
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(3);
}
@@ -3255,15 +3255,15 @@ void HC11OP(subb_dir)()
/* SUBB EXT 0xF0 */
void HC11OP(subb_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
- UINT16 r = REG_B - i;
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(4);
}
@@ -3271,111 +3271,111 @@ void HC11OP(subb_ext)()
/* SUBB INDX 0xE0 */
void HC11OP(subb_indx)()
{
- UINT16 adr = FETCH();
- UINT8 i = READ8(m_ix + adr);
- UINT16 r = REG_B - i;
+ uint16_t adr = FETCH();
+ uint8_t i = READ8(m_ix + adr);
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(4);
}
/* SUBB INDY 0x18 0xE0 */
void HC11OP(subb_indy)()
{
- UINT16 adr = FETCH();
- UINT8 i = READ8(m_iy + adr);
- UINT16 r = REG_B - i;
+ uint16_t adr = FETCH();
+ uint8_t i = READ8(m_iy + adr);
+ uint16_t r = REG_B - i;
CLEAR_NZVC();
SET_N8(r);
SET_Z8(r);
SET_V_SUB8(r, i, REG_B);
SET_C8(r);
- REG_B = (UINT8)r;
+ REG_B = (uint8_t)r;
CYCLES(5);
}
/* SUBD IMM 0x83 */
void HC11OP(subd_imm)()
{
- UINT16 i = FETCH16();
- UINT32 r = REG_D - i;
+ uint16_t i = FETCH16();
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_SUB16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(4);
}
/* SUBD DIR 0x93 */
void HC11OP(subd_dir)()
{
- UINT8 d = FETCH();
- UINT16 i = READ16(d);
- UINT32 r = REG_D - i;
+ uint8_t d = FETCH();
+ uint16_t i = READ16(d);
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_SUB16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(5);
}
/* SUBD EXT 0xB3 */
void HC11OP(subd_ext)()
{
- UINT16 addr = FETCH16();
- UINT16 i = READ16(addr);
- UINT32 r = REG_D - i;
+ uint16_t addr = FETCH16();
+ uint16_t i = READ16(addr);
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_SUB16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(6);
}
/* SUBD INDX 0xA3 */
void HC11OP(subd_indx)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_ix + offset);
- UINT32 r = REG_D - i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_ix + offset);
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_SUB16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(6);
}
/* SUBD INDY 0x18 0xA3 */
void HC11OP(subd_indy)()
{
- UINT8 offset = FETCH();
- UINT16 i = READ16(m_iy + offset);
- UINT32 r = REG_D - i;
+ uint8_t offset = FETCH();
+ uint16_t i = READ16(m_iy + offset);
+ uint32_t r = REG_D - i;
CLEAR_NZVC();
SET_N16(r);
SET_Z16(r);
SET_V_SUB16(r, i, REG_D);
SET_C16(r);
- REG_D = (UINT16)r;
+ REG_D = (uint16_t)r;
CYCLES(7);
}
/* SWI 0x3F */
void HC11OP(swi)()
{
- UINT16 pc_vector;
+ uint16_t pc_vector;
//m_pc++;
PUSH16(m_pc);
PUSH16(m_iy);
@@ -3402,7 +3402,7 @@ void HC11OP(tab)()
/* TAP 0x06 */
void HC11OP(tap)()
{
- UINT8 x_flag = m_ccr & CC_X;
+ uint8_t x_flag = m_ccr & CC_X;
m_ccr = REG_A;
if(x_flag == 0 && m_ccr & CC_X) //X flag cannot do a 0->1 transition with this instruction.
m_ccr &= ~CC_X;
@@ -3462,8 +3462,8 @@ void HC11OP(tstb)()
/* TST EXT 0x7D */
void HC11OP(tst_ext)()
{
- UINT16 adr = FETCH16();
- UINT8 i = READ8(adr);
+ uint16_t adr = FETCH16();
+ uint8_t i = READ8(adr);
CLEAR_NZVC();
SET_N8(i);
SET_Z8(i);
@@ -3473,8 +3473,8 @@ void HC11OP(tst_ext)()
/* TST IND, X 0x6D */
void HC11OP(tst_indx)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_ix + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_ix + offset);
CLEAR_NZVC();
SET_N8(i);
SET_Z8(i);
@@ -3484,8 +3484,8 @@ void HC11OP(tst_indx)()
/* TST IND, Y 0x18, 0x6D */
void HC11OP(tst_indy)()
{
- UINT8 offset = FETCH();
- UINT8 i = READ8(m_iy + offset);
+ uint8_t offset = FETCH();
+ uint8_t i = READ8(m_iy + offset);
CLEAR_NZVC();
SET_N8(i);
SET_Z8(i);
@@ -3550,7 +3550,7 @@ void HC11OP(wai)()
/* XGDX 0x8F */
void HC11OP(xgdx)()
{
- UINT16 tmp = REG_D;
+ uint16_t tmp = REG_D;
REG_D = m_ix;
m_ix = tmp;
CYCLES(3);
@@ -3560,7 +3560,7 @@ void HC11OP(xgdx)()
/* XGDY 0x18, 0x8F */
void HC11OP(xgdy)()
{
- UINT16 tmp = REG_D;
+ uint16_t tmp = REG_D;
REG_D = m_iy;
m_iy = tmp;
CYCLES(4);
@@ -3570,19 +3570,19 @@ void HC11OP(xgdy)()
void HC11OP(page2)()
{
- UINT8 op2 = FETCH();
+ uint8_t op2 = FETCH();
(this->*hc11_optable_page2[op2])();
}
void HC11OP(page3)()
{
- UINT8 op2 = FETCH();
+ uint8_t op2 = FETCH();
(this->*hc11_optable_page3[op2])();
}
void HC11OP(page4)()
{
- UINT8 op2 = FETCH();
+ uint8_t op2 = FETCH();
(this->*hc11_optable_page4[op2])();
}
diff --git a/src/devices/cpu/mc68hc11/mc68hc11.cpp b/src/devices/cpu/mc68hc11/mc68hc11.cpp
index 4a3c3970be8..fe6f5988d73 100644
--- a/src/devices/cpu/mc68hc11/mc68hc11.cpp
+++ b/src/devices/cpu/mc68hc11/mc68hc11.cpp
@@ -42,7 +42,7 @@ static const int div_tab[4] = { 1, 4, 8, 16 };
const device_type MC68HC11 = &device_creator<mc68hc11_cpu_device>;
-mc68hc11_cpu_device::mc68hc11_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mc68hc11_cpu_device::mc68hc11_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, MC68HC11, "MC68HC11", tag, owner, clock, "mc68hc11", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0 )
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8, 0)
@@ -54,7 +54,7 @@ mc68hc11_cpu_device::mc68hc11_cpu_device(const machine_config &mconfig, const ch
}
-offs_t mc68hc11_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mc68hc11_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( hc11 );
return CPU_DISASSEMBLE_NAME(hc11)(this, buffer, pc, oprom, opram, options);
@@ -66,7 +66,7 @@ offs_t mc68hc11_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UI
/*****************************************************************************/
/* Internal registers */
-UINT8 mc68hc11_cpu_device::hc11_regs_r(UINT32 address)
+uint8_t mc68hc11_cpu_device::hc11_regs_r(uint32_t address)
{
int reg = address & 0xff;
@@ -180,7 +180,7 @@ UINT8 mc68hc11_cpu_device::hc11_regs_r(UINT32 address)
return 0; // Dummy
}
-void mc68hc11_cpu_device::hc11_regs_w(UINT32 address, UINT8 value)
+void mc68hc11_cpu_device::hc11_regs_w(uint32_t address, uint8_t value)
{
int reg = address & 0xff;
@@ -298,20 +298,20 @@ void mc68hc11_cpu_device::hc11_regs_w(UINT32 address, UINT8 value)
/*****************************************************************************/
-UINT8 mc68hc11_cpu_device::FETCH()
+uint8_t mc68hc11_cpu_device::FETCH()
{
return m_direct->read_byte(m_pc++);
}
-UINT16 mc68hc11_cpu_device::FETCH16()
+uint16_t mc68hc11_cpu_device::FETCH16()
{
- UINT16 w;
+ uint16_t w;
w = (m_direct->read_byte(m_pc) << 8) | (m_direct->read_byte(m_pc+1));
m_pc += 2;
return w;
}
-UINT8 mc68hc11_cpu_device::READ8(UINT32 address)
+uint8_t mc68hc11_cpu_device::READ8(uint32_t address)
{
if(address >= m_reg_position && address < m_reg_position+(m_has_extended_io ? 0x100 : 0x40))
{
@@ -324,7 +324,7 @@ UINT8 mc68hc11_cpu_device::READ8(UINT32 address)
return m_program->read_byte(address);
}
-void mc68hc11_cpu_device::WRITE8(UINT32 address, UINT8 value)
+void mc68hc11_cpu_device::WRITE8(uint32_t address, uint8_t value)
{
if(address >= m_reg_position && address < m_reg_position+(m_has_extended_io ? 0x100 : 0x40))
{
@@ -339,12 +339,12 @@ void mc68hc11_cpu_device::WRITE8(UINT32 address, UINT8 value)
m_program->write_byte(address, value);
}
-UINT16 mc68hc11_cpu_device::READ16(UINT32 address)
+uint16_t mc68hc11_cpu_device::READ16(uint32_t address)
{
return (READ8(address) << 8) | (READ8(address+1));
}
-void mc68hc11_cpu_device::WRITE16(UINT32 address, UINT16 value)
+void mc68hc11_cpu_device::WRITE16(uint32_t address, uint16_t value)
{
WRITE8(address+0, (value >> 8) & 0xff);
WRITE8(address+1, (value >> 0) & 0xff);
@@ -511,7 +511,7 @@ void mc68hc11_cpu_device::check_irq_lines()
{
if( m_irq_state[MC68HC11_IRQ_LINE]!=CLEAR_LINE && (!(m_ccr & CC_I)) )
{
- UINT16 pc_vector;
+ uint16_t pc_vector;
if(m_wait_state == 0)
{
@@ -533,12 +533,12 @@ void mc68hc11_cpu_device::check_irq_lines()
/* check timers here */
{
int divider = div_tab[m_pr & 3];
- UINT64 cur_time = total_cycles();
- UINT32 add = (cur_time - m_frc_base) / divider;
+ uint64_t cur_time = total_cycles();
+ uint32_t add = (cur_time - m_frc_base) / divider;
if (add > 0)
{
- for(UINT32 i=0;i<add;i++)
+ for(uint32_t i=0;i<add;i++)
{
m_tcnt++;
if(m_tcnt == m_toc1)
@@ -554,7 +554,7 @@ void mc68hc11_cpu_device::check_irq_lines()
if( m_irq_state[MC68HC11_TOC1_LINE]!=CLEAR_LINE && (!(m_ccr & CC_I)) && m_tmsk1 & 0x80)
{
- UINT16 pc_vector;
+ uint16_t pc_vector;
if(m_wait_state == 0)
{
@@ -587,7 +587,7 @@ void mc68hc11_cpu_device::execute_run()
{
while(m_icount > 0)
{
- UINT8 op;
+ uint8_t op;
check_irq_lines();
diff --git a/src/devices/cpu/mc68hc11/mc68hc11.h b/src/devices/cpu/mc68hc11/mc68hc11.h
index e6d4f3e21fe..7105a97f987 100644
--- a/src/devices/cpu/mc68hc11/mc68hc11.h
+++ b/src/devices/cpu/mc68hc11/mc68hc11.h
@@ -42,7 +42,7 @@ class mc68hc11_cpu_device : public cpu_device
{
public:
// construction/destruction
- mc68hc11_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mc68hc11_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// I/O enable flag
static void set_has_extended_io(device_t &device, int has_extended_io) { downcast<mc68hc11_cpu_device &>(device).m_has_extended_io = has_extended_io; }
@@ -56,10 +56,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 41; }
- virtual UINT32 execute_input_lines() const override { return 2; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 41; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -73,9 +73,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 5; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 5; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -84,27 +84,27 @@ private:
union {
struct {
#ifdef LSB_FIRST
- UINT8 b;
- UINT8 a;
+ uint8_t b;
+ uint8_t a;
#else
- UINT8 a;
- UINT8 b;
+ uint8_t a;
+ uint8_t b;
#endif
} d8;
- UINT16 d16;
+ uint16_t d16;
} m_d;
- UINT16 m_ix;
- UINT16 m_iy;
- UINT16 m_sp;
- UINT16 m_pc;
- UINT16 m_ppc;
- UINT8 m_ccr;
+ uint16_t m_ix;
+ uint16_t m_iy;
+ uint16_t m_sp;
+ uint16_t m_pc;
+ uint16_t m_ppc;
+ uint8_t m_ccr;
- UINT8 m_adctl;
+ uint8_t m_adctl;
int m_ad_channel;
- UINT8 m_irq_state[2];
+ uint8_t m_irq_state[2];
direct_read_data *m_direct;
address_space *m_program;
address_space *m_io;
@@ -112,23 +112,23 @@ private:
int m_ram_position;
int m_reg_position;
- std::vector<UINT8> m_internal_ram;
+ std::vector<uint8_t> m_internal_ram;
int m_has_extended_io; // extended I/O enable flag
int m_internal_ram_size;
int m_init_value;
- UINT8 m_wait_state;
- UINT8 m_stop_state;
+ uint8_t m_wait_state;
+ uint8_t m_stop_state;
- UINT8 m_tflg1;
- UINT8 m_tmsk1;
- UINT16 m_toc1;
- UINT16 m_tcnt;
-// UINT8 m_por;
- UINT8 m_pr;
+ uint8_t m_tflg1;
+ uint8_t m_tmsk1;
+ uint16_t m_toc1;
+ uint16_t m_tcnt;
+// uint8_t m_por;
+ uint8_t m_pr;
- UINT64 m_frc_base;
+ uint64_t m_frc_base;
typedef void (mc68hc11_cpu_device::*ophandler)();
struct hc11_opcode_list_struct
@@ -144,20 +144,20 @@ private:
ophandler hc11_optable_page3[256];
ophandler hc11_optable_page4[256];
- UINT8 hc11_regs_r(UINT32 address);
- void hc11_regs_w(UINT32 address, UINT8 value);
- UINT8 FETCH();
- UINT16 FETCH16();
- UINT8 READ8(UINT32 address);
- void WRITE8(UINT32 address, UINT8 value);
- UINT16 READ16(UINT32 address);
- void WRITE16(UINT32 address, UINT16 value);
+ uint8_t hc11_regs_r(uint32_t address);
+ void hc11_regs_w(uint32_t address, uint8_t value);
+ uint8_t FETCH();
+ uint16_t FETCH16();
+ uint8_t READ8(uint32_t address);
+ void WRITE8(uint32_t address, uint8_t value);
+ uint16_t READ16(uint32_t address);
+ void WRITE16(uint32_t address, uint16_t value);
void CYCLES(int cycles);
void SET_PC(int pc);
- void PUSH8(UINT8 value);
- void PUSH16(UINT16 value);
- UINT8 POP8();
- UINT16 POP16();
+ void PUSH8(uint8_t value);
+ void PUSH16(uint16_t value);
+ uint8_t POP8();
+ uint16_t POP16();
void hc11_aba();
void hc11_abx();
void hc11_aby();
diff --git a/src/devices/cpu/mcs48/mcs48.cpp b/src/devices/cpu/mcs48/mcs48.cpp
index b21cae01394..88b4185cf0a 100644
--- a/src/devices/cpu/mcs48/mcs48.cpp
+++ b/src/devices/cpu/mcs48/mcs48.cpp
@@ -200,7 +200,7 @@ static ADDRESS_MAP_START(data_8bit, AS_DATA, 8, mcs48_cpu_device)
ADDRESS_MAP_END
-mcs48_cpu_device::mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int rom_size, int ram_size, UINT8 feature_mask)
+mcs48_cpu_device::mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int rom_size, int ram_size, uint8_t feature_mask)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 12, 0
, ( ( rom_size == 1024 ) ? ADDRESS_MAP_NAME(program_10bit) : ( ( rom_size == 2048 ) ? ADDRESS_MAP_NAME(program_11bit) : ( ( rom_size == 4096 ) ? ADDRESS_MAP_NAME(program_12bit) : nullptr ) ) ))
@@ -223,115 +223,115 @@ mcs48_cpu_device::mcs48_cpu_device(const machine_config &mconfig, device_type ty
}
}
-i8021_device::i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8021_device::i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8021, "I8021", tag, owner, clock, "i8021", 1024, 64)
{
}
-i8022_device::i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8022_device::i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8022, "I8022", tag, owner, clock, "i8022", 2048, 128)
{
}
-i8035_device::i8035_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8035_device::i8035_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8035, "I8035", tag, owner, clock, "i8035", 0, 64)
{
}
-i8048_device::i8048_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8048_device::i8048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8048, "I8048", tag, owner, clock, "i8048", 1024, 64)
{
}
-i8648_device::i8648_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8648_device::i8648_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8648, "I8648", tag, owner, clock, "i8648", 1024, 64)
{
}
-i8748_device::i8748_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8748_device::i8748_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8748, "I8748", tag, owner, clock, "i8748", 1024, 64)
{
}
-i8039_device::i8039_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8039_device::i8039_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8039, "I8039", tag, owner, clock, "i8039", 0, 128)
{
}
-i8049_device::i8049_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8049_device::i8049_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8049, "I8049", tag, owner, clock, "i8049", 2048, 128)
{
}
-i8749_device::i8749_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8749_device::i8749_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8749, "I8749", tag, owner, clock, "i8749", 2048, 128)
{
}
-i8040_device::i8040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8040_device::i8040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8040, "I8040", tag, owner, clock, "i8040", 0, 256)
{
}
-i8050_device::i8050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8050_device::i8050_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, I8050, "I8050", tag, owner, clock, "i8050", 4096, 256)
{
}
-mb8884_device::mb8884_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb8884_device::mb8884_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, MB8884, "MB8884", tag, owner, clock, "mb8884", 0, 64)
{
}
-n7751_device::n7751_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+n7751_device::n7751_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, N7751, "N7751", tag, owner, clock, "n7751", 1024, 64)
{
}
-m58715_device::m58715_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m58715_device::m58715_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs48_cpu_device(mconfig, M58715, "M58715", tag, owner, clock, "m58715", 2048, 128)
{
}
-upi41_cpu_device::upi41_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int rom_size, int ram_size)
+upi41_cpu_device::upi41_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int rom_size, int ram_size)
: mcs48_cpu_device(mconfig, type, name, tag, owner, clock, shortname, rom_size, ram_size, UPI41_FEATURE)
{
}
-i8041_device::i8041_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8041_device::i8041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upi41_cpu_device(mconfig, I8041, "I8041", tag, owner, clock, "i8041", 1024, 128)
{
}
-i8741_device::i8741_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8741_device::i8741_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upi41_cpu_device(mconfig, I8741, "I8741", tag, owner, clock, "i8741", 1024, 128)
{
}
-i8042_device::i8042_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8042_device::i8042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upi41_cpu_device(mconfig, I8042, "I8042", tag, owner, clock, "i8042", 2048, 256)
{
}
-i8242_device::i8242_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8242_device::i8242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upi41_cpu_device(mconfig, I8242, "I8242", tag, owner, clock, "i8242", 2048, 256)
{
}
-i8742_device::i8742_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8742_device::i8742_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upi41_cpu_device(mconfig, I8742, "I8742", tag, owner, clock, "i8742", 2048, 256)
{
}
-offs_t mcs48_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mcs48_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( mcs48 );
return CPU_DISASSEMBLE_NAME(mcs48)(this, buffer, pc, oprom, opram, options);
}
-offs_t upi41_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t upi41_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( upi41 );
return CPU_DISASSEMBLE_NAME(upi41)(this, buffer, pc, oprom, opram, options);
@@ -345,7 +345,7 @@ offs_t upi41_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
opcode_fetch - fetch an opcode byte
-------------------------------------------------*/
-UINT8 mcs48_cpu_device::opcode_fetch()
+uint8_t mcs48_cpu_device::opcode_fetch()
{
return m_direct->read_byte(m_pc++);
}
@@ -356,7 +356,7 @@ UINT8 mcs48_cpu_device::opcode_fetch()
byte
-------------------------------------------------*/
-UINT8 mcs48_cpu_device::argument_fetch()
+uint8_t mcs48_cpu_device::argument_fetch()
{
return m_direct->read_byte(m_pc++);
}
@@ -369,7 +369,7 @@ UINT8 mcs48_cpu_device::argument_fetch()
void mcs48_cpu_device::update_regptr()
{
- m_regptr = (UINT8 *)m_data->get_write_ptr((m_psw & B_FLAG) ? 24 : 0);
+ m_regptr = (uint8_t *)m_data->get_write_ptr((m_psw & B_FLAG) ? 24 : 0);
}
@@ -380,7 +380,7 @@ void mcs48_cpu_device::update_regptr()
void mcs48_cpu_device::push_pc_psw()
{
- UINT8 sp = m_psw & 0x07;
+ uint8_t sp = m_psw & 0x07;
ram_w(8 + 2*sp, m_pc);
ram_w(9 + 2*sp, ((m_pc >> 8) & 0x0f) | (m_psw & 0xf0));
m_psw = (m_psw & 0xf8) | ((sp + 1) & 0x07);
@@ -394,7 +394,7 @@ void mcs48_cpu_device::push_pc_psw()
void mcs48_cpu_device::pull_pc_psw()
{
- UINT8 sp = (m_psw - 1) & 0x07;
+ uint8_t sp = (m_psw - 1) & 0x07;
m_pc = ram_r(8 + 2*sp);
m_pc |= ram_r(9 + 2*sp) << 8;
m_psw = ((m_pc >> 8) & 0xf0) | 0x08 | sp;
@@ -410,7 +410,7 @@ void mcs48_cpu_device::pull_pc_psw()
void mcs48_cpu_device::pull_pc()
{
- UINT8 sp = (m_psw - 1) & 0x07;
+ uint8_t sp = (m_psw - 1) & 0x07;
m_pc = ram_r(8 + 2*sp);
m_pc |= ram_r(9 + 2*sp) << 8;
m_pc &= 0xfff;
@@ -423,10 +423,10 @@ void mcs48_cpu_device::pull_pc()
instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_add(UINT8 dat)
+void mcs48_cpu_device::execute_add(uint8_t dat)
{
- UINT16 temp = m_a + dat;
- UINT16 temp4 = (m_a & 0x0f) + (dat & 0x0f);
+ uint16_t temp = m_a + dat;
+ uint16_t temp4 = (m_a & 0x0f) + (dat & 0x0f);
m_psw &= ~(C_FLAG | A_FLAG);
m_psw |= (temp4 << 2) & A_FLAG;
@@ -440,11 +440,11 @@ void mcs48_cpu_device::execute_add(UINT8 dat)
instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_addc(UINT8 dat)
+void mcs48_cpu_device::execute_addc(uint8_t dat)
{
- UINT8 carryin = (m_psw & C_FLAG) >> 7;
- UINT16 temp = m_a + dat + carryin;
- UINT16 temp4 = (m_a & 0x0f) + (dat & 0x0f) + carryin;
+ uint8_t carryin = (m_psw & C_FLAG) >> 7;
+ uint16_t temp = m_a + dat + carryin;
+ uint16_t temp4 = (m_a & 0x0f) + (dat & 0x0f) + carryin;
m_psw &= ~(C_FLAG | A_FLAG);
m_psw |= (temp4 << 2) & A_FLAG;
@@ -458,9 +458,9 @@ void mcs48_cpu_device::execute_addc(UINT8 dat)
instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_jmp(UINT16 address)
+void mcs48_cpu_device::execute_jmp(uint16_t address)
{
- UINT16 a11 = (m_irq_in_progress) ? 0 : m_a11;
+ uint16_t a11 = (m_irq_in_progress) ? 0 : m_a11;
m_pc = address | a11;
}
@@ -470,7 +470,7 @@ void mcs48_cpu_device::execute_jmp(UINT16 address)
instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_call(UINT16 address)
+void mcs48_cpu_device::execute_call(uint16_t address)
{
push_pc_psw();
execute_jmp(address);
@@ -482,9 +482,9 @@ void mcs48_cpu_device::execute_call(UINT16 address)
conditional jump instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_jcc(UINT8 result)
+void mcs48_cpu_device::execute_jcc(uint8_t result)
{
- UINT8 offset = argument_fetch();
+ uint8_t offset = argument_fetch();
if (result != 0)
m_pc = ((m_pc - 1) & 0xf00) | offset;
}
@@ -495,9 +495,9 @@ void mcs48_cpu_device::execute_jcc(UINT8 result)
code can directly affect
-------------------------------------------------*/
-UINT8 mcs48_cpu_device::p2_mask()
+uint8_t mcs48_cpu_device::p2_mask()
{
- UINT8 result = 0xff;
+ uint8_t result = 0xff;
if ((m_feature_mask & UPI41_FEATURE) == 0)
return result;
if (m_flags_enabled)
@@ -513,7 +513,7 @@ UINT8 mcs48_cpu_device::p2_mask()
the 8243 expander chip
-------------------------------------------------*/
-void mcs48_cpu_device::expander_operation(UINT8 operation, UINT8 port)
+void mcs48_cpu_device::expander_operation(uint8_t operation, uint8_t port)
{
/* put opcode/data on low 4 bits of P2 */
port_w(2, m_p2 = (m_p2 & 0xf0) | (operation << 2) | (port & 3));
@@ -803,7 +803,7 @@ OPHANDLER( orld_p7_a ) { expander_operation(MCS48_EXPANDER_OP_OR, 7); retur
OPHANDLER( outl_bus_a ) { bus_w(m_a); return 2; }
OPHANDLER( outl_p1_a ) { port_w(1, m_p1 = m_a); return 2; }
-OPHANDLER( outl_p2_a ) { UINT8 mask = p2_mask(); port_w(2, m_p2 = (m_p2 & ~mask) | (m_a & mask)); return 2; }
+OPHANDLER( outl_p2_a ) { uint8_t mask = p2_mask(); port_w(2, m_p2 = (m_p2 & ~mask) | (m_a & mask)); return 2; }
OPHANDLER( out_dbb_a )
{
/* copy to the DBBO and update the bit in STS */
@@ -828,10 +828,10 @@ OPHANDLER( retr )
}
OPHANDLER( rl_a ) { m_a = (m_a << 1) | (m_a >> 7); return 1; }
-OPHANDLER( rlc_a ) { UINT8 newc = m_a & C_FLAG; m_a = (m_a << 1) | (m_psw >> 7); m_psw = (m_psw & ~C_FLAG) | newc; return 1; }
+OPHANDLER( rlc_a ) { uint8_t newc = m_a & C_FLAG; m_a = (m_a << 1) | (m_psw >> 7); m_psw = (m_psw & ~C_FLAG) | newc; return 1; }
OPHANDLER( rr_a ) { m_a = (m_a >> 1) | (m_a << 7); return 1; }
-OPHANDLER( rrc_a ) { UINT8 newc = (m_a << 7) & C_FLAG; m_a = (m_a >> 1) | (m_psw & C_FLAG); m_psw = (m_psw & ~C_FLAG) | newc; return 1; }
+OPHANDLER( rrc_a ) { uint8_t newc = (m_a << 7) & C_FLAG; m_a = (m_a >> 1) | (m_psw & C_FLAG); m_psw = (m_psw & ~C_FLAG) | newc; return 1; }
OPHANDLER( sel_mb0 ) { m_a11 = 0x000; return 1; }
OPHANDLER( sel_mb1 ) { m_a11 = 0x800; return 1; }
@@ -846,19 +846,19 @@ OPHANDLER( strt_t ) { m_timecount_enabled = TIMER_ENABLED; m_prescaler =
OPHANDLER( swap_a ) { m_a = (m_a << 4) | (m_a >> 4); return 1; }
-OPHANDLER( xch_a_r0 ) { UINT8 tmp = m_a; m_a = R0; R0 = tmp; return 1; }
-OPHANDLER( xch_a_r1 ) { UINT8 tmp = m_a; m_a = R1; R1 = tmp; return 1; }
-OPHANDLER( xch_a_r2 ) { UINT8 tmp = m_a; m_a = R2; R2 = tmp; return 1; }
-OPHANDLER( xch_a_r3 ) { UINT8 tmp = m_a; m_a = R3; R3 = tmp; return 1; }
-OPHANDLER( xch_a_r4 ) { UINT8 tmp = m_a; m_a = R4; R4 = tmp; return 1; }
-OPHANDLER( xch_a_r5 ) { UINT8 tmp = m_a; m_a = R5; R5 = tmp; return 1; }
-OPHANDLER( xch_a_r6 ) { UINT8 tmp = m_a; m_a = R6; R6 = tmp; return 1; }
-OPHANDLER( xch_a_r7 ) { UINT8 tmp = m_a; m_a = R7; R7 = tmp; return 1; }
-OPHANDLER( xch_a_xr0 ) { UINT8 tmp = m_a; m_a = ram_r(R0); ram_w(R0, tmp); return 1; }
-OPHANDLER( xch_a_xr1 ) { UINT8 tmp = m_a; m_a = ram_r(R1); ram_w(R1, tmp); return 1; }
+OPHANDLER( xch_a_r0 ) { uint8_t tmp = m_a; m_a = R0; R0 = tmp; return 1; }
+OPHANDLER( xch_a_r1 ) { uint8_t tmp = m_a; m_a = R1; R1 = tmp; return 1; }
+OPHANDLER( xch_a_r2 ) { uint8_t tmp = m_a; m_a = R2; R2 = tmp; return 1; }
+OPHANDLER( xch_a_r3 ) { uint8_t tmp = m_a; m_a = R3; R3 = tmp; return 1; }
+OPHANDLER( xch_a_r4 ) { uint8_t tmp = m_a; m_a = R4; R4 = tmp; return 1; }
+OPHANDLER( xch_a_r5 ) { uint8_t tmp = m_a; m_a = R5; R5 = tmp; return 1; }
+OPHANDLER( xch_a_r6 ) { uint8_t tmp = m_a; m_a = R6; R6 = tmp; return 1; }
+OPHANDLER( xch_a_r7 ) { uint8_t tmp = m_a; m_a = R7; R7 = tmp; return 1; }
+OPHANDLER( xch_a_xr0 ) { uint8_t tmp = m_a; m_a = ram_r(R0); ram_w(R0, tmp); return 1; }
+OPHANDLER( xch_a_xr1 ) { uint8_t tmp = m_a; m_a = ram_r(R1); ram_w(R1, tmp); return 1; }
-OPHANDLER( xchd_a_xr0 ) { UINT8 oldram = ram_r(R0); ram_w(R0, (oldram & 0xf0) | (m_a & 0x0f)); m_a = (m_a & 0xf0) | (oldram & 0x0f); return 1; }
-OPHANDLER( xchd_a_xr1 ) { UINT8 oldram = ram_r(R1); ram_w(R1, (oldram & 0xf0) | (m_a & 0x0f)); m_a = (m_a & 0xf0) | (oldram & 0x0f); return 1; }
+OPHANDLER( xchd_a_xr0 ) { uint8_t oldram = ram_r(R0); ram_w(R0, (oldram & 0xf0) | (m_a & 0x0f)); m_a = (m_a & 0xf0) | (oldram & 0x0f); return 1; }
+OPHANDLER( xchd_a_xr1 ) { uint8_t oldram = ram_r(R1); ram_w(R1, (oldram & 0xf0) | (m_a & 0x0f)); m_a = (m_a & 0xf0) | (oldram & 0x0f); return 1; }
OPHANDLER( xrl_a_r0 ) { m_a ^= R0; return 1; }
OPHANDLER( xrl_a_r1 ) { m_a ^= R1; return 1; }
@@ -1108,7 +1108,7 @@ void mcs48_cpu_device::burn_cycles(int count)
/* if the timer is enabled, accumulate prescaler cycles */
if (m_timecount_enabled & TIMER_ENABLED)
{
- UINT8 oldtimer = m_timer;
+ uint8_t oldtimer = m_timer;
m_prescaler += count;
m_timer += m_prescaler >> 5;
m_prescaler &= 0x1f;
@@ -1212,8 +1212,8 @@ READ8_MEMBER( upi41_cpu_device::upi41_master_r )
TIMER_CALLBACK_MEMBER( upi41_cpu_device::master_callback )
{
- UINT8 a0 = (param >> 8) & 1;
- UINT8 data = param;
+ uint8_t a0 = (param >> 8) & 1;
+ uint8_t data = param;
/* data always goes to the input buffer */
m_dbbi = data;
diff --git a/src/devices/cpu/mcs48/mcs48.h b/src/devices/cpu/mcs48/mcs48.h
index 83f4d4bd4e0..81e5b85fc29 100644
--- a/src/devices/cpu/mcs48/mcs48.h
+++ b/src/devices/cpu/mcs48/mcs48.h
@@ -121,7 +121,7 @@ class mcs48_cpu_device : public cpu_device
{
public:
// construction/destruction
- mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int rom_size, int ram_size, UINT8 feature_mask = 0);
+ mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int rom_size, int ram_size, uint8_t feature_mask = 0);
protected:
// device-level overrides
@@ -129,12 +129,12 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 15 - 1) / 15; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 15); }
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 3; }
- virtual UINT32 execute_input_lines() const override { return 2; }
- virtual UINT32 execute_default_irq_vector() const override { return MCS48_INPUT_IRQ; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 15 - 1) / 15; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 15); }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 3; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_default_irq_vector() const override { return MCS48_INPUT_IRQ; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -150,42 +150,42 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
protected:
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
- UINT16 m_prevpc; /* 16-bit previous program counter */
- UINT16 m_pc; /* 16-bit program counter */
-
- UINT8 m_a; /* 8-bit accumulator */
- UINT8 * m_regptr; /* pointer to r0-r7 */
- UINT8 m_psw; /* 8-bit psw */
- UINT8 m_p1; /* 8-bit latched port 1 */
- UINT8 m_p2; /* 8-bit latched port 2 */
- UINT8 m_ea; /* 1-bit latched ea input */
- UINT8 m_timer; /* 8-bit timer */
- UINT8 m_prescaler; /* 5-bit timer prescaler */
- UINT8 m_t1_history; /* 8-bit history of the T1 input */
- UINT8 m_sts; /* 8-bit status register (UPI-41 only, except for F1) */
- UINT8 m_dbbi; /* 8-bit input data buffer (UPI-41 only) */
- UINT8 m_dbbo; /* 8-bit output data buffer (UPI-41 only) */
-
- UINT8 m_irq_state; /* TRUE if an IRQ is pending */
- UINT8 m_irq_in_progress; /* TRUE if an IRQ is in progress */
- UINT8 m_timer_overflow; /* TRUE on a timer overflow; cleared by taking interrupt */
- UINT8 m_timer_flag; /* TRUE on a timer overflow; cleared on JTF */
- UINT8 m_tirq_enabled; /* TRUE if the timer IRQ is enabled */
- UINT8 m_xirq_enabled; /* TRUE if the external IRQ is enabled */
- UINT8 m_timecount_enabled; /* bitmask of timer/counter enabled */
- UINT8 m_flags_enabled; /* TRUE if I/O flags have been enabled (UPI-41 only) */
- UINT8 m_dma_enabled; /* TRUE if DMA has been enabled (UPI-41 only) */
-
- UINT16 m_a11; /* A11 value, either 0x000 or 0x800 */
+ uint16_t m_prevpc; /* 16-bit previous program counter */
+ uint16_t m_pc; /* 16-bit program counter */
+
+ uint8_t m_a; /* 8-bit accumulator */
+ uint8_t * m_regptr; /* pointer to r0-r7 */
+ uint8_t m_psw; /* 8-bit psw */
+ uint8_t m_p1; /* 8-bit latched port 1 */
+ uint8_t m_p2; /* 8-bit latched port 2 */
+ uint8_t m_ea; /* 1-bit latched ea input */
+ uint8_t m_timer; /* 8-bit timer */
+ uint8_t m_prescaler; /* 5-bit timer prescaler */
+ uint8_t m_t1_history; /* 8-bit history of the T1 input */
+ uint8_t m_sts; /* 8-bit status register (UPI-41 only, except for F1) */
+ uint8_t m_dbbi; /* 8-bit input data buffer (UPI-41 only) */
+ uint8_t m_dbbo; /* 8-bit output data buffer (UPI-41 only) */
+
+ uint8_t m_irq_state; /* TRUE if an IRQ is pending */
+ uint8_t m_irq_in_progress; /* TRUE if an IRQ is in progress */
+ uint8_t m_timer_overflow; /* TRUE on a timer overflow; cleared by taking interrupt */
+ uint8_t m_timer_flag; /* TRUE on a timer overflow; cleared on JTF */
+ uint8_t m_tirq_enabled; /* TRUE if the timer IRQ is enabled */
+ uint8_t m_xirq_enabled; /* TRUE if the external IRQ is enabled */
+ uint8_t m_timecount_enabled; /* bitmask of timer/counter enabled */
+ uint8_t m_flags_enabled; /* TRUE if I/O flags have been enabled (UPI-41 only) */
+ uint8_t m_dma_enabled; /* TRUE if DMA has been enabled (UPI-41 only) */
+
+ uint16_t m_a11; /* A11 value, either 0x000 or 0x800 */
int m_icount;
@@ -195,27 +195,27 @@ protected:
address_space *m_data;
address_space *m_io;
- UINT8 m_feature_mask; /* processor feature flags */
- UINT16 m_int_rom_size; /* internal rom size */
+ uint8_t m_feature_mask; /* processor feature flags */
+ uint16_t m_int_rom_size; /* internal rom size */
- UINT8 m_rtemp; /* temporary for import/export */
+ uint8_t m_rtemp; /* temporary for import/export */
typedef int (mcs48_cpu_device::*mcs48_ophandler)();
static const mcs48_ophandler s_opcode_table[256];
- UINT8 opcode_fetch();
- UINT8 argument_fetch();
+ uint8_t opcode_fetch();
+ uint8_t argument_fetch();
void update_regptr();
void push_pc_psw();
void pull_pc_psw();
void pull_pc();
- void execute_add(UINT8 dat);
- void execute_addc(UINT8 dat);
- void execute_jmp(UINT16 address);
- void execute_call(UINT16 address);
- void execute_jcc(UINT8 result);
- UINT8 p2_mask();
- void expander_operation(UINT8 operation, UINT8 port);
+ void execute_add(uint8_t dat);
+ void execute_addc(uint8_t dat);
+ void execute_jmp(uint16_t address);
+ void execute_call(uint16_t address);
+ void execute_jcc(uint8_t result);
+ uint8_t p2_mask();
+ void expander_operation(uint8_t operation, uint8_t port);
int check_irqs();
void burn_cycles(int count);
@@ -478,108 +478,108 @@ class i8021_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 30 - 1) / 30; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 30); }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 30 - 1) / 30; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 30); }
};
class i8022_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 30 - 1) / 30; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 30); }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 30 - 1) / 30; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 30); }
};
class i8035_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8035_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8035_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8048_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8048_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8648_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8648_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8648_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8748_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8748_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8748_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8039_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8039_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8039_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8049_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8049_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8049_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8749_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8749_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8749_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8040_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8050_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8050_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class mb8884_device : public mcs48_cpu_device
{
public:
// construction/destruction
- mb8884_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb8884_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class n7751_device : public mcs48_cpu_device
{
public:
// construction/destruction
- n7751_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ n7751_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class m58715_device : public mcs48_cpu_device
{
public:
// construction/destruction
- m58715_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m58715_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -587,14 +587,14 @@ class upi41_cpu_device : public mcs48_cpu_device
{
public:
// construction/destruction
- upi41_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int rom_size, int ram_size);
+ upi41_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int rom_size, int ram_size);
/* functions for talking to the input/output buffers on the UPI41-class chips */
DECLARE_READ8_MEMBER(upi41_master_r);
DECLARE_WRITE8_MEMBER(upi41_master_w);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
TIMER_CALLBACK_MEMBER( master_callback );
};
@@ -603,35 +603,35 @@ class i8041_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8041_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8741_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8741_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8741_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8042_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8042_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8242_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8242_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8742_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8742_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8742_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/mcs48/mcs48dsm.cpp b/src/devices/cpu/mcs48/mcs48dsm.cpp
index dd63846ab57..15a74946ff0 100644
--- a/src/devices/cpu/mcs48/mcs48dsm.cpp
+++ b/src/devices/cpu/mcs48/mcs48dsm.cpp
@@ -12,10 +12,10 @@
#include "emu.h"
-static UINT32 common_dasm(device_t *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int upi41)
+static uint32_t common_dasm(device_t *device, char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int upi41)
{
- const UINT8 *startram = opram;
- UINT32 flags = 0;
+ const uint8_t *startram = opram;
+ uint32_t flags = 0;
opram++;
switch (*oprom++)
diff --git a/src/devices/cpu/mcs51/mcs51.cpp b/src/devices/cpu/mcs51/mcs51.cpp
index d90623369a3..19a6434a319 100644
--- a/src/devices/cpu/mcs51/mcs51.cpp
+++ b/src/devices/cpu/mcs51/mcs51.cpp
@@ -260,7 +260,7 @@ static ADDRESS_MAP_START(data_8bit, AS_DATA, 8, mcs51_cpu_device)
ADDRESS_MAP_END
-mcs51_cpu_device::mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features)
+mcs51_cpu_device::mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, uint8_t features)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0
, ( ( program_width == 12 ) ? ADDRESS_MAP_NAME(program_12bit) : ( ( program_width == 13 ) ? ADDRESS_MAP_NAME(program_13bit) : nullptr ) ))
@@ -286,91 +286,91 @@ mcs51_cpu_device::mcs51_cpu_device(const machine_config &mconfig, device_type ty
}
-i8031_device::i8031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8031_device::i8031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs51_cpu_device(mconfig, I8031, "I8031", tag, owner, clock, "i8031", 0, 7)
{
}
-i8051_device::i8051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8051_device::i8051_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs51_cpu_device(mconfig, I8051, "I8051", tag, owner, clock, "i8051", 12, 7)
{
}
-i8751_device::i8751_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8751_device::i8751_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs51_cpu_device(mconfig, I8751, "I8751", tag, owner, clock, "i8751", 12, 7)
{
}
-i8052_device::i8052_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features)
+i8052_device::i8052_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, uint8_t features)
: mcs51_cpu_device(mconfig, type, name, tag, owner, clock, shortname, program_width, data_width, features | FEATURE_I8052)
{
m_num_interrupts = 6;
}
-i8052_device::i8052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8052_device::i8052_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs51_cpu_device(mconfig, I8052, "I8052", tag, owner, clock, "i8052", 13, 8, FEATURE_I8052)
{
m_num_interrupts = 6;
}
-i8032_device::i8032_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8032_device::i8032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8052_device(mconfig, I8032, "I8032", tag, owner, clock, "i8032", 0, 8)
{
}
-i8752_device::i8752_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i8752_device::i8752_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8052_device(mconfig, I8752, "I8752", tag, owner, clock, "i8752", 13, 8)
{
}
-i80c31_device::i80c31_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i80c31_device::i80c31_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8052_device(mconfig, I80C31, "I80C31", tag, owner, clock, "i80c31", 0, 7)
{
}
-i80c51_device::i80c51_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features)
+i80c51_device::i80c51_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, uint8_t features)
: mcs51_cpu_device(mconfig, type, name, tag, owner, clock, shortname, program_width, data_width, features | FEATURE_CMOS)
{
}
-i80c51_device::i80c51_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i80c51_device::i80c51_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs51_cpu_device(mconfig, I80C51, "I80C51", tag, owner, clock, "i80c51", 12, 7)
{
}
-i87c51_device::i87c51_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i87c51_device::i87c51_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80c51_device(mconfig, I87C51, "I87C51", tag, owner, clock, "i87c51", 12, 7)
{
}
-i80c52_device::i80c52_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features)
+i80c52_device::i80c52_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, uint8_t features)
: i8052_device(mconfig, type, name, tag, owner, clock, shortname, program_width, data_width, features | FEATURE_I80C52 | FEATURE_CMOS)
{
}
-i80c52_device::i80c52_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i80c52_device::i80c52_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i8052_device(mconfig, I80C52, "I80C52", tag, owner, clock, "i80C52", 13, 8, FEATURE_I80C52 | FEATURE_CMOS)
{
}
-i80c32_device::i80c32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i80c32_device::i80c32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80c52_device(mconfig, I80C32, "I80C32", tag, owner, clock, "i80c32", 0, 8)
{
}
-i87c52_device::i87c52_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+i87c52_device::i87c52_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80c52_device(mconfig, I87C52, "I87C52", tag, owner, clock, "i87c52", 13, 8)
{
}
-at89c4051_device::at89c4051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+at89c4051_device::at89c4051_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: i80c51_device(mconfig, AT89C4051, "AT89C4051", tag, owner, clock, "at89c4051", 12, 7)
{
}
-ds5002fp_device::ds5002fp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ds5002fp_device::ds5002fp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs51_cpu_device(mconfig, DS5002FP, "DS5002FP", tag, owner, clock, "ds5002fp", 12, 7, FEATURE_DS5002FP | FEATURE_CMOS)
{
}
@@ -385,10 +385,10 @@ ds5002fp_device::ds5002fp_device(const machine_config &mconfig, const char *tag,
#define ROP_ARG(pc) m_direct->read_byte(pc)
/* Read a byte from External Code Memory (Usually Program Rom(s) Space) */
-#define CODEMEM_R(a) (UINT8)m_program->read_byte(a)
+#define CODEMEM_R(a) (uint8_t)m_program->read_byte(a)
/* Read/Write a byte from/to External Data Memory (Usually RAM or other I/O) */
-#define DATAMEM_R(a) (UINT8)m_io->read_byte(a)
+#define DATAMEM_R(a) (uint8_t)m_io->read_byte(a)
#define DATAMEM_W(a,v) m_io->write_byte(a, v)
/* Read/Write a byte from/to the Internal RAM */
@@ -398,8 +398,8 @@ ds5002fp_device::ds5002fp_device(const machine_config &mconfig, const char *tag,
/* Read/Write a byte from/to the Internal RAM indirectly */
/* (called from indirect addressing) */
-UINT8 mcs51_cpu_device::iram_iread(offs_t a) { return (a <= m_ram_mask) ? m_data->read_byte(a) : 0xff; }
-void mcs51_cpu_device::iram_iwrite(offs_t a, UINT8 d) { if (a <= m_ram_mask) m_data->write_byte(a, d); }
+uint8_t mcs51_cpu_device::iram_iread(offs_t a) { return (a <= m_ram_mask) ? m_data->read_byte(a) : 0xff; }
+void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m_data->write_byte(a, d); }
#define IRAM_IR(a) iram_iread(a)
#define IRAM_IW(a, d) iram_iwrite(a, d)
@@ -413,7 +413,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, UINT8 d) { if (a <= m_ram_mask) m_d
#define BIT_W(a,v) bit_address_w(a, v)
/* Input/Output a byte from given I/O port */
-#define IN(port) ((UINT8)m_io->read_byte(port))
+#define IN(port) ((uint8_t)m_io->read_byte(port))
#define OUT(port,value) m_io->write_byte(port,value)
@@ -434,10 +434,10 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, UINT8 d) { if (a <= m_ram_mask) m_d
#define ACC SFR_A(ADDR_ACC)
#define PSW SFR_A(ADDR_PSW)
-#define P0 ((const UINT8) SFR_A(ADDR_P0))
-#define P1 ((const UINT8) SFR_A(ADDR_P1))
-#define P2 ((const UINT8) SFR_A(ADDR_P2))
-#define P3 ((const UINT8) SFR_A(ADDR_P3))
+#define P0 ((const uint8_t) SFR_A(ADDR_P0))
+#define P1 ((const uint8_t) SFR_A(ADDR_P1))
+#define P2 ((const uint8_t) SFR_A(ADDR_P2))
+#define P3 ((const uint8_t) SFR_A(ADDR_P3))
#define SP SFR_A(ADDR_SP)
#define DPL SFR_A(ADDR_DPL)
@@ -728,14 +728,14 @@ void mcs51_cpu_device::clear_current_irq()
LOG(("New: %d %02x\n", m_cur_irq_prio, m_irq_active));
}
-UINT8 mcs51_cpu_device::r_acc() { return SFR_A(ADDR_ACC); }
+uint8_t mcs51_cpu_device::r_acc() { return SFR_A(ADDR_ACC); }
-UINT8 mcs51_cpu_device::r_psw() { return SFR_A(ADDR_PSW); }
+uint8_t mcs51_cpu_device::r_psw() { return SFR_A(ADDR_PSW); }
void mcs51_cpu_device::update_ptrs()
{
- m_internal_ram = (UINT8 *)m_data->get_write_ptr(0x00);
- m_sfr_ram = (UINT8 *)m_data->get_write_ptr(0x100);
+ m_internal_ram = (uint8_t *)m_data->get_write_ptr(0x00);
+ m_sfr_ram = (uint8_t *)m_data->get_write_ptr(0x100);
}
@@ -773,9 +773,9 @@ void mcs51_cpu_device::update_ptrs()
offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
{
/* Memory Range (RG1 and RG0 @ MCON and RPCTL registers) */
- static const UINT16 ds5002fp_ranges[4] = { 0x1fff, 0x3fff, 0x7fff, 0xffff };
+ static const uint16_t ds5002fp_ranges[4] = { 0x1fff, 0x3fff, 0x7fff, 0xffff };
/* Memory Partition Table (RG1 & RG0 @ MCON & RPCTL registers) */
- static const UINT32 ds5002fp_partitions[16] = {
+ static const uint32_t ds5002fp_partitions[16] = {
0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000,
0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000 };
@@ -800,12 +800,12 @@ offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
/* Internal ram read/write */
-UINT8 mcs51_cpu_device::iram_read(size_t offset)
+uint8_t mcs51_cpu_device::iram_read(size_t offset)
{
return (((offset) < 0x80) ? m_data->read_byte(offset) : sfr_read(offset));
}
-void mcs51_cpu_device::iram_write(size_t offset, UINT8 data)
+void mcs51_cpu_device::iram_write(size_t offset, uint8_t data)
{
if ((offset) < 0x80)
m_data->write_byte(offset, data);
@@ -816,7 +816,7 @@ void mcs51_cpu_device::iram_write(size_t offset, UINT8 data)
/*Push the current PC to the stack*/
void mcs51_cpu_device::push_pc()
{
- UINT8 tmpSP = SP+1; //Grab and Increment Stack Pointer
+ uint8_t tmpSP = SP+1; //Grab and Increment Stack Pointer
IRAM_IW(tmpSP, (PC & 0xff)); //Store low byte of PC to Internal Ram (Use IRAM_IW to store stack above 128 bytes)
tmpSP++; // ""
SP = tmpSP; // ""
@@ -826,7 +826,7 @@ void mcs51_cpu_device::push_pc()
/*Pop the current PC off the stack and into the pc*/
void mcs51_cpu_device::pop_pc()
{
- UINT8 tmpSP = SP; //Grab Stack Pointer
+ uint8_t tmpSP = SP; //Grab Stack Pointer
PC = (IRAM_IR(tmpSP--) & 0xff) << 8; //Store hi byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
PC = PC | IRAM_IR(tmpSP--); //Store lo byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
SP = tmpSP; //Decrement Stack Pointer
@@ -836,9 +836,9 @@ void mcs51_cpu_device::pop_pc()
void mcs51_cpu_device::set_parity()
{
//This flag will be set when the accumulator contains an odd # of bits set..
- UINT8 p = 0;
+ uint8_t p = 0;
int i;
- UINT8 a = ACC;
+ uint8_t a = ACC;
for (i=0; i<8; i++) { //Test for each of the 8 bits in the ACC!
p ^= (a & 1);
@@ -848,10 +848,10 @@ void mcs51_cpu_device::set_parity()
SET_P(p & 1);
}
-UINT8 mcs51_cpu_device::bit_address_r(UINT8 offset)
+uint8_t mcs51_cpu_device::bit_address_r(uint8_t offset)
{
- UINT8 word;
- UINT8 mask;
+ uint8_t word;
+ uint8_t mask;
int bit_pos;
int distance; /* distance between bit addressable words */
/* 1 for normal bits, 8 for sfr bit addresses */
@@ -875,12 +875,12 @@ UINT8 mcs51_cpu_device::bit_address_r(UINT8 offset)
}
-void mcs51_cpu_device::bit_address_w(UINT8 offset, UINT8 bit)
+void mcs51_cpu_device::bit_address_w(uint8_t offset, uint8_t bit)
{
int word;
- UINT8 mask;
+ uint8_t mask;
int bit_pos;
- UINT8 result;
+ uint8_t result;
int distance;
/* User defined bit addresses 0x20-0x2f (values are 0x0-0x7f) */
@@ -907,10 +907,10 @@ void mcs51_cpu_device::bit_address_w(UINT8 offset, UINT8 bit)
}
}
-void mcs51_cpu_device::do_add_flags(UINT8 a, UINT8 data, UINT8 c)
+void mcs51_cpu_device::do_add_flags(uint8_t a, uint8_t data, uint8_t c)
{
- UINT16 result = a+data+c;
- INT16 result1 = (INT8)a+(INT8)data+c;
+ uint16_t result = a+data+c;
+ int16_t result1 = (int8_t)a+(int8_t)data+c;
SET_CY((result & 0x100) >> 8);
result = (a&0x0f)+(data&0x0f)+c;
@@ -918,10 +918,10 @@ void mcs51_cpu_device::do_add_flags(UINT8 a, UINT8 data, UINT8 c)
SET_OV(result1 < -128 || result1 > 127);
}
-void mcs51_cpu_device::do_sub_flags(UINT8 a, UINT8 data, UINT8 c)
+void mcs51_cpu_device::do_sub_flags(uint8_t a, uint8_t data, uint8_t c)
{
- UINT16 result = a-(data+c);
- INT16 result1 = (INT8)a-(INT8)(data+c);
+ uint16_t result = a-(data+c);
+ int16_t result1 = (int8_t)a-(int8_t)(data+c);
SET_CY((result & 0x100) >> 8);
result = (a&0x0f)-((data&0x0f)+c);
@@ -1004,11 +1004,11 @@ void mcs51_cpu_device::transmit_receive(int source)
void mcs51_cpu_device::update_timer_t0(int cycles)
{
int mode = (GET_M0_1<<1) | GET_M0_0;
- UINT32 count;
+ uint32_t count;
if (GET_TR0)
{
- UINT32 delta;
+ uint32_t delta;
/* counter / external input */
delta = GET_CT0 ? m_t0_cnt : cycles;
@@ -1038,7 +1038,7 @@ void mcs51_cpu_device::update_timer_t0(int cycles)
TL0 = count & 0xff;
break;
case 2: /* 8 Bit Autoreload */
- count = ((UINT32) TL0) + delta;
+ count = ((uint32_t) TL0) + delta;
if ( count & 0xffffff00 ) /* Check for overflow */
{
SET_TF0(1);
@@ -1049,7 +1049,7 @@ void mcs51_cpu_device::update_timer_t0(int cycles)
break;
case 3:
/* Split Timer 1 */
- count = ((UINT32) TL0) + delta;
+ count = ((uint32_t) TL0) + delta;
if ( count & 0xffffff00 ) /* Check for overflow */
SET_TF0(1);
TL0 = count & 0xff; /* Update new values of the counter */
@@ -1062,7 +1062,7 @@ void mcs51_cpu_device::update_timer_t0(int cycles)
{
case 3:
/* Split Timer 2 */
- count = ((UINT32) TH0) + cycles; /* No gate control or counting !*/
+ count = ((uint32_t) TH0) + cycles; /* No gate control or counting !*/
if ( count & 0xffffff00 ) /* Check for overflow */
SET_TF1(1);
TH0 = count & 0xff; /* Update new values of the counter */
@@ -1089,16 +1089,16 @@ switching it into or out of Mode 3 or it can be assigned as a baud rate generato
void mcs51_cpu_device::update_timer_t1(int cycles)
{
- UINT8 mode = (GET_M1_1<<1) | GET_M1_0;
- UINT8 mode_0 = (GET_M0_1<<1) | GET_M0_0;
- UINT32 count;
+ uint8_t mode = (GET_M1_1<<1) | GET_M1_0;
+ uint8_t mode_0 = (GET_M0_1<<1) | GET_M0_0;
+ uint32_t count;
if (mode_0 != 3)
{
if (GET_TR1)
{
- UINT32 delta;
- UINT32 overflow = 0;
+ uint32_t delta;
+ uint32_t overflow = 0;
/* counter / external input */
delta = GET_CT1 ? m_t1_cnt : cycles;
@@ -1126,7 +1126,7 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
TL1 = count & 0xff;
break;
case 2: /* 8 Bit Autoreload */
- count = ((UINT32) TL1) + delta;
+ count = ((uint32_t) TL1) + delta;
overflow = count & 0xffffff00; /* Check for overflow */
if ( overflow )
{
@@ -1148,8 +1148,8 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
}
else
{
- UINT32 delta;
- UINT32 overflow = 0;
+ uint32_t delta;
+ uint32_t overflow = 0;
delta = cycles;
/* taken, reset */
@@ -1170,7 +1170,7 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
TL1 = count & 0xff;
break;
case 2: /* 8 Bit Autoreload */
- count = ((UINT32) TL1) + delta;
+ count = ((uint32_t) TL1) + delta;
overflow = count & 0xffffff00; /* Check for overflow */
if ( overflow )
{
@@ -1197,7 +1197,7 @@ void mcs51_cpu_device::update_timer_t2(int cycles)
int mode = ((GET_TCLK | GET_RCLK) << 1) | GET_CP;
int delta = GET_CT2 ? m_t2_cnt : (mode & 2) ? cycles * (12/2) : cycles;
- UINT32 count = ((TH2<<8) | TL2) + delta;
+ uint32_t count = ((TH2<<8) | TL2) + delta;
m_t2_cnt = 0;
switch (mode)
@@ -1260,7 +1260,7 @@ void mcs51_cpu_device::update_timers(int cycles)
//Set up to transmit data out of serial port
//NOTE: Enable Serial Port Interrupt bit is NOT required to send/receive data!
-void mcs51_cpu_device::serial_transmit(UINT8 data)
+void mcs51_cpu_device::serial_transmit(uint8_t data)
{
int mode = (GET_SM0<<1) | GET_SM1;
@@ -1315,7 +1315,7 @@ void mcs51_cpu_device::update_serial(int cycles)
}
/* Check and update status of serial port */
-void mcs51_cpu_device::update_irq_prio(UINT8 ipl, UINT8 iph)
+void mcs51_cpu_device::update_irq_prio(uint8_t ipl, uint8_t iph)
{
int i;
for (i=0; i<8; i++)
@@ -1327,12 +1327,12 @@ void mcs51_cpu_device::update_irq_prio(UINT8 ipl, UINT8 iph)
OPCODES
***************************************************************************/
-#define OPHANDLER( _name ) void mcs51_cpu_device::_name (UINT8 r)
+#define OPHANDLER( _name ) void mcs51_cpu_device::_name (uint8_t r)
#include "mcs51ops.hxx"
-void mcs51_cpu_device::execute_op(UINT8 op)
+void mcs51_cpu_device::execute_op(uint8_t op)
{
if (m_recalc_parity)
{
@@ -1658,7 +1658,7 @@ void mcs51_cpu_device::execute_op(UINT8 op)
***************************************************************************/
/* # of oscilations each opcode requires*/
-const UINT8 mcs51_cpu_device::mcs51_cycles[256] = {
+const uint8_t mcs51_cpu_device::mcs51_cycles[256] = {
1,2,2,1,1,1,1,1,1,1,1,1,1,1,1,1,
2,2,2,1,1,1,1,1,1,1,1,1,1,1,1,1,
2,2,2,1,1,1,1,1,1,1,1,1,1,1,1,1,
@@ -1696,10 +1696,10 @@ const UINT8 mcs51_cpu_device::mcs51_cycles[256] = {
**********************************************************************************/
void mcs51_cpu_device::check_irqs()
{
- UINT8 ints = (GET_IE0 | (GET_TF0<<1) | (GET_IE1<<2) | (GET_TF1<<3)
+ uint8_t ints = (GET_IE0 | (GET_TF0<<1) | (GET_IE1<<2) | (GET_TF1<<3)
| ((GET_RI|GET_TI)<<4));
- UINT8 int_vec = 0;
- UINT8 int_mask;
+ uint8_t int_vec = 0;
+ uint8_t int_mask;
int priority_request = -1;
int i;
@@ -1843,9 +1843,9 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
* for at least one cycle (12 states)
*
*/
- UINT32 new_state = (m_last_line_state & ~(1 << irqline)) | ((state != CLEAR_LINE) << irqline);
+ uint32_t new_state = (m_last_line_state & ~(1 << irqline)) | ((state != CLEAR_LINE) << irqline);
/* detect 0->1 transistions */
- UINT32 tr_state = (~m_last_line_state) & new_state;
+ uint32_t tr_state = (~m_last_line_state) & new_state;
switch( irqline )
{
@@ -1948,7 +1948,7 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
/* Execute cycles - returns number of cycles actually run */
void mcs51_cpu_device::execute_run()
{
- UINT8 op;
+ uint8_t op;
update_ptrs();
@@ -2013,7 +2013,7 @@ void mcs51_cpu_device::execute_run()
* MCS51/8051 Section
****************************************************************************/
-void mcs51_cpu_device::sfr_write(size_t offset, UINT8 data)
+void mcs51_cpu_device::sfr_write(size_t offset, uint8_t data)
{
/* update register */
assert(offset >= 0x80 && offset <= 0xff);
@@ -2045,14 +2045,14 @@ void mcs51_cpu_device::sfr_write(size_t offset, UINT8 data)
case ADDR_SCON:
break;
default:
- LOG(("mcs51 '%s': attemping to write to an invalid/non-implemented SFR address: %x at 0x%04x, data=%x\n", tag(), (UINT32)offset,PC,data));
+ LOG(("mcs51 '%s': attemping to write to an invalid/non-implemented SFR address: %x at 0x%04x, data=%x\n", tag(), (uint32_t)offset,PC,data));
/* no write in this case according to manual */
return;
}
m_data->write_byte((size_t)offset | 0x100, data);
}
-UINT8 mcs51_cpu_device::sfr_read(size_t offset)
+uint8_t mcs51_cpu_device::sfr_read(size_t offset)
{
assert(offset >= 0x80 && offset <= 0xff);
@@ -2085,7 +2085,7 @@ UINT8 mcs51_cpu_device::sfr_read(size_t offset)
return m_data->read_byte((size_t) offset | 0x100);
/* Illegal or non-implemented sfr */
default:
- LOG(("mcs51 '%s': attemping to read an invalid/non-implemented SFR address: %x at 0x%04x\n", tag(), (UINT32)offset,PC));
+ LOG(("mcs51 '%s': attemping to read an invalid/non-implemented SFR address: %x at 0x%04x\n", tag(), (uint32_t)offset,PC));
/* according to the manual, the read may return random bits */
return 0xff;
}
@@ -2314,7 +2314,7 @@ void mcs51_cpu_device::device_reset()
* 8052 Section
****************************************************************************/
-void i8052_device::sfr_write(size_t offset, UINT8 data)
+void i8052_device::sfr_write(size_t offset, uint8_t data)
{
switch (offset)
{
@@ -2332,7 +2332,7 @@ void i8052_device::sfr_write(size_t offset, UINT8 data)
}
}
-UINT8 i8052_device::sfr_read(size_t offset)
+uint8_t i8052_device::sfr_read(size_t offset)
{
switch (offset)
{
@@ -2353,7 +2353,7 @@ UINT8 i8052_device::sfr_read(size_t offset)
* 80C52 Section
****************************************************************************/
-void i80c52_device::sfr_write(size_t offset, UINT8 data)
+void i80c52_device::sfr_write(size_t offset, uint8_t data)
{
switch (offset)
{
@@ -2375,7 +2375,7 @@ void i80c52_device::sfr_write(size_t offset, UINT8 data)
m_data->write_byte((size_t) offset | 0x100, data);
}
-UINT8 i80c52_device::sfr_read(size_t offset)
+uint8_t i80c52_device::sfr_read(size_t offset)
{
switch (offset)
{
@@ -2398,9 +2398,9 @@ UINT8 i80c52_device::sfr_read(size_t offset)
#define DS5_LOGW(a, d) LOG(("ds5002fp '%s': write to " # a " register at 0x%04x, data=%x\n", tag(), PC, d))
#define DS5_LOGR(a, d) LOG(("ds5002fp '%s': read from " # a " register at 0x%04x\n", tag(), PC))
-UINT8 mcs51_cpu_device::ds5002fp_protected(size_t offset, UINT8 data, UINT8 ta_mask, UINT8 mask)
+uint8_t mcs51_cpu_device::ds5002fp_protected(size_t offset, uint8_t data, uint8_t ta_mask, uint8_t mask)
{
- UINT8 is_timed_access;
+ uint8_t is_timed_access;
is_timed_access = (m_ds5002fp.ta_window > 0) && (TA == 0x55);
if (is_timed_access)
@@ -2411,7 +2411,7 @@ UINT8 mcs51_cpu_device::ds5002fp_protected(size_t offset, UINT8 data, UINT8 ta_m
return (m_sfr_ram[offset] & (~mask)) | (data & mask);
}
-void ds5002fp_device::sfr_write(size_t offset, UINT8 data)
+void ds5002fp_device::sfr_write(size_t offset, uint8_t data)
{
switch (offset)
{
@@ -2440,7 +2440,7 @@ void ds5002fp_device::sfr_write(size_t offset, UINT8 data)
m_data->write_byte((size_t) offset | 0x100, data);
}
-UINT8 ds5002fp_device::sfr_read(size_t offset)
+uint8_t ds5002fp_device::sfr_read(size_t offset)
{
switch (offset)
{
@@ -2462,42 +2462,42 @@ UINT8 ds5002fp_device::sfr_read(size_t offset)
}
-offs_t mcs51_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mcs51_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i8051 );
return CPU_DISASSEMBLE_NAME(i8051)(this, buffer, pc, oprom, opram, options);
}
-offs_t i8052_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i8052_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i8052 );
return CPU_DISASSEMBLE_NAME(i8052)(this, buffer, pc, oprom, opram, options);
}
-offs_t i80c31_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i80c31_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i80c51 );
return CPU_DISASSEMBLE_NAME(i80c51)(this, buffer, pc, oprom, opram, options);
}
-offs_t i80c51_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i80c51_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i80c51 );
return CPU_DISASSEMBLE_NAME(i80c51)(this, buffer, pc, oprom, opram, options);
}
-offs_t i80c52_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i80c52_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( i80c52 );
return CPU_DISASSEMBLE_NAME(i80c52)(this, buffer, pc, oprom, opram, options);
}
-offs_t ds5002fp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ds5002fp_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( ds5002fp );
return CPU_DISASSEMBLE_NAME(ds5002fp)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/mcs51/mcs51.h b/src/devices/cpu/mcs51/mcs51.h
index 7e9453b61fb..970ee46b531 100644
--- a/src/devices/cpu/mcs51/mcs51.h
+++ b/src/devices/cpu/mcs51/mcs51.h
@@ -84,10 +84,10 @@ class mcs51_cpu_device : public cpu_device
{
public:
// construction/destruction
- mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features = 0);
+ mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, uint8_t features = 0);
// configuration helpers
- static void set_port_forced_input(device_t &device, UINT8 port, UINT8 forced_input) { downcast<mcs51_cpu_device &>(device).m_forced_inputs[port] = forced_input; }
+ static void set_port_forced_input(device_t &device, uint8_t port, uint8_t forced_input) { downcast<mcs51_cpu_device &>(device).m_forced_inputs[port] = forced_input; }
template<class _Object> static devcb_base & set_serial_rx_cb(device_t &device, _Object object) { return downcast<mcs51_cpu_device &>(device).m_serial_rx_cb.set_callback(object); }
template<class _Object> static devcb_base & set_serial_tx_cb(device_t &device, _Object object) { return downcast<mcs51_cpu_device &>(device).m_serial_tx_cb.set_callback(object); }
@@ -97,12 +97,12 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 12 - 1) / 12; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 12); }
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 20; }
- virtual UINT32 execute_input_lines() const override { return 6; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 12 - 1) / 12; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 12); }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 20; }
+ virtual uint32_t execute_input_lines() const override { return 6; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -118,9 +118,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 5; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 5; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
protected:
address_space_config m_program_config;
@@ -128,46 +128,46 @@ protected:
address_space_config m_io_config;
//Internal stuff
- UINT16 m_ppc; //previous pc
- UINT16 m_pc; //current pc
- UINT16 m_features; //features of this cpu
- UINT8 m_rwm; //Signals that the current instruction is a read/write/modify instruction
+ uint16_t m_ppc; //previous pc
+ uint16_t m_pc; //current pc
+ uint16_t m_features; //features of this cpu
+ uint8_t m_rwm; //Signals that the current instruction is a read/write/modify instruction
int m_inst_cycles; /* cycles for the current instruction */
int m_ram_mask; /* second ram bank for indirect access available ? */
int m_num_interrupts; /* number of interrupts supported */
int m_recalc_parity; /* recalculate parity before next instruction */
- UINT32 m_last_line_state; /* last state of input lines line */
+ uint32_t m_last_line_state; /* last state of input lines line */
int m_t0_cnt; /* number of 0->1 transistions on T0 line */
int m_t1_cnt; /* number of 0->1 transistions on T1 line */
int m_t2_cnt; /* number of 0->1 transistions on T2 line */
int m_t2ex_cnt; /* number of 0->1 transistions on T2EX line */
int m_cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
- UINT8 m_irq_active; /* mask which irq levels are serviced */
- UINT8 m_irq_prio[8]; /* interrupt priority */
+ uint8_t m_irq_active; /* mask which irq levels are serviced */
+ uint8_t m_irq_prio[8]; /* interrupt priority */
- UINT8 m_forced_inputs[4]; /* allow read even if configured as output */
+ uint8_t m_forced_inputs[4]; /* allow read even if configured as output */
int m_icount;
struct mcs51_uart
{
- UINT8 data_out; //Data to send out
- UINT8 bits_to_send; //How many bits left to send when transmitting out the serial port
+ uint8_t data_out; //Data to send out
+ uint8_t bits_to_send; //How many bits left to send when transmitting out the serial port
int smod_div; /* signal divided by 2^SMOD */
int rx_clk; /* rx clock */
int tx_clk; /* tx clock */
- UINT8 delay_cycles; //Gross Hack;
+ uint8_t delay_cycles; //Gross Hack;
} m_uart; /* internal uart */
/* Internal Ram */
- UINT8 *m_internal_ram; /* 128 RAM (8031/51) + 128 RAM in second bank (8032/52) */
- UINT8 *m_sfr_ram; /* 128 SFR - these are in 0x80 - 0xFF */
+ uint8_t *m_internal_ram; /* 128 RAM (8031/51) + 128 RAM in second bank (8032/52) */
+ uint8_t *m_sfr_ram; /* 128 SFR - these are in 0x80 - 0xFF */
/* SFR Callbacks */
- virtual void sfr_write(size_t offset, UINT8 data);
- virtual UINT8 sfr_read(size_t offset);
+ virtual void sfr_write(size_t offset, uint8_t data);
+ virtual uint8_t sfr_read(size_t offset);
/* Memory spaces */
address_space *m_program;
@@ -181,161 +181,161 @@ protected:
/* DS5002FP */
struct {
- UINT8 previous_ta; /* Previous Timed Access value */
- UINT8 ta_window; /* Limed Access window */
- UINT8 range; /* Memory Range */
+ uint8_t previous_ta; /* Previous Timed Access value */
+ uint8_t ta_window; /* Limed Access window */
+ uint8_t range; /* Memory Range */
/* Bootstrap Configuration */
- UINT8 mcon; /* bootstrap loader MCON register */
- UINT8 rpctl; /* bootstrap loader RPCTL register */
- UINT8 crc; /* bootstrap loader CRC register */
+ uint8_t mcon; /* bootstrap loader MCON register */
+ uint8_t rpctl; /* bootstrap loader RPCTL register */
+ uint8_t crc; /* bootstrap loader CRC register */
} m_ds5002fp;
// for the debugger
- UINT8 m_rtemp;
+ uint8_t m_rtemp;
- static const UINT8 mcs51_cycles[256];
+ static const uint8_t mcs51_cycles[256];
- UINT8 iram_iread(offs_t a);
- void iram_iwrite(offs_t a, UINT8 d);
+ uint8_t iram_iread(offs_t a);
+ void iram_iwrite(offs_t a, uint8_t d);
void clear_current_irq();
- UINT8 r_acc();
- UINT8 r_psw();
+ uint8_t r_acc();
+ uint8_t r_psw();
void update_ptrs();
offs_t external_ram_iaddr(offs_t offset, offs_t mem_mask);
- UINT8 iram_read(size_t offset);
- void iram_write(size_t offset, UINT8 data);
+ uint8_t iram_read(size_t offset);
+ void iram_write(size_t offset, uint8_t data);
void push_pc();
void pop_pc();
void set_parity();
- UINT8 bit_address_r(UINT8 offset);
- void bit_address_w(UINT8 offset, UINT8 bit);
- void do_add_flags(UINT8 a, UINT8 data, UINT8 c);
- void do_sub_flags(UINT8 a, UINT8 data, UINT8 c);
+ uint8_t bit_address_r(uint8_t offset);
+ void bit_address_w(uint8_t offset, uint8_t bit);
+ void do_add_flags(uint8_t a, uint8_t data, uint8_t c);
+ void do_sub_flags(uint8_t a, uint8_t data, uint8_t c);
void transmit_receive(int source);
void update_timer_t0(int cycles);
void update_timer_t1(int cycles);
void update_timer_t2(int cycles);
void update_timers(int cycles);
- void serial_transmit(UINT8 data);
+ void serial_transmit(uint8_t data);
void serial_receive();
void update_serial(int cycles);
- void update_irq_prio(UINT8 ipl, UINT8 iph);
- void execute_op(UINT8 op);
+ void update_irq_prio(uint8_t ipl, uint8_t iph);
+ void execute_op(uint8_t op);
void check_irqs();
void burn_cycles(int cycles);
- void acall(UINT8 r);
- void add_a_byte(UINT8 r);
- void add_a_mem(UINT8 r);
- void add_a_ir(UINT8 r);
- void add_a_r(UINT8 r);
- void addc_a_byte(UINT8 r);
- void addc_a_mem(UINT8 r);
- void addc_a_ir(UINT8 r);
- void addc_a_r(UINT8 r);
- void ajmp(UINT8 r);
- void anl_mem_a(UINT8 r);
- void anl_mem_byte(UINT8 r);
- void anl_a_byte(UINT8 r);
- void anl_a_mem(UINT8 r);
- void anl_a_ir(UINT8 r);
- void anl_a_r(UINT8 r);
- void anl_c_bitaddr(UINT8 r);
- void anl_c_nbitaddr(UINT8 r);
- void cjne_a_byte(UINT8 r);
- void cjne_a_mem(UINT8 r);
- void cjne_ir_byte(UINT8 r);
- void cjne_r_byte(UINT8 r);
- void clr_bitaddr(UINT8 r);
- void clr_c(UINT8 r);
- void clr_a(UINT8 r);
- void cpl_bitaddr(UINT8 r);
- void cpl_c(UINT8 r);
- void cpl_a(UINT8 r);
- void da_a(UINT8 r);
- void dec_a(UINT8 r);
- void dec_mem(UINT8 r);
- void dec_ir(UINT8 r);
- void dec_r(UINT8 r);
- void div_ab(UINT8 r);
- void djnz_mem(UINT8 r);
- void djnz_r(UINT8 r);
- void inc_a(UINT8 r);
- void inc_mem(UINT8 r);
- void inc_ir(UINT8 r);
- void inc_r(UINT8 r);
- void inc_dptr(UINT8 r);
- void jb(UINT8 r);
- void jbc(UINT8 r);
- void jc(UINT8 r);
- void jmp_iadptr(UINT8 r);
- void jnb(UINT8 r);
- void jnc(UINT8 r);
- void jnz(UINT8 r);
- void jz(UINT8 r);
- void lcall(UINT8 r);
- void ljmp(UINT8 r);
- void mov_a_byte(UINT8 r);
- void mov_a_mem(UINT8 r);
- void mov_a_ir(UINT8 r);
- void mov_a_r(UINT8 r);
- void mov_mem_byte(UINT8 r);
- void mov_mem_mem(UINT8 r);
- void mov_ir_byte(UINT8 r);
- void mov_r_byte(UINT8 r);
- void mov_mem_ir(UINT8 r);
- void mov_mem_r(UINT8 r);
- void mov_dptr_byte(UINT8 r);
- void mov_bitaddr_c(UINT8 r);
- void mov_ir_mem(UINT8 r);
- void mov_r_mem(UINT8 r);
- void mov_mem_a(UINT8 r);
- void mov_ir_a(UINT8 r);
- void mov_r_a(UINT8 r);
- void movc_a_iapc(UINT8 r);
- void mov_c_bitaddr(UINT8 r);
- void movc_a_iadptr(UINT8 r);
- void movx_a_idptr(UINT8 r);
- void movx_a_ir(UINT8 r);
- void movx_idptr_a(UINT8 r);
- void movx_ir_a(UINT8 r);
- void mul_ab(UINT8 r);
- void nop(UINT8 r);
- void orl_mem_a(UINT8 r);
- void orl_mem_byte(UINT8 r);
- void orl_a_byte(UINT8 r);
- void orl_a_mem(UINT8 r);
- void orl_a_ir(UINT8 r);
- void orl_a_r(UINT8 r);
- void orl_c_bitaddr(UINT8 r);
- void orl_c_nbitaddr(UINT8 r);
- void pop(UINT8 r);
- void push(UINT8 r);
- void ret(UINT8 r);
- void reti(UINT8 r);
- void rl_a(UINT8 r);
- void rlc_a(UINT8 r);
- void rr_a(UINT8 r);
- void rrc_a(UINT8 r);
- void setb_c(UINT8 r);
- void setb_bitaddr(UINT8 r);
- void sjmp(UINT8 r);
- void subb_a_byte(UINT8 r);
- void subb_a_mem(UINT8 r);
- void subb_a_ir(UINT8 r);
- void subb_a_r(UINT8 r);
- void swap_a(UINT8 r);
- void xch_a_mem(UINT8 r);
- void xch_a_ir(UINT8 r);
- void xch_a_r(UINT8 r);
- void xchd_a_ir(UINT8 r);
- void xrl_mem_a(UINT8 r);
- void xrl_mem_byte(UINT8 r);
- void xrl_a_byte(UINT8 r);
- void xrl_a_mem(UINT8 r);
- void xrl_a_ir(UINT8 r);
- void xrl_a_r(UINT8 r);
- void illegal(UINT8 r);
- UINT8 ds5002fp_protected(size_t offset, UINT8 data, UINT8 ta_mask, UINT8 mask);
+ void acall(uint8_t r);
+ void add_a_byte(uint8_t r);
+ void add_a_mem(uint8_t r);
+ void add_a_ir(uint8_t r);
+ void add_a_r(uint8_t r);
+ void addc_a_byte(uint8_t r);
+ void addc_a_mem(uint8_t r);
+ void addc_a_ir(uint8_t r);
+ void addc_a_r(uint8_t r);
+ void ajmp(uint8_t r);
+ void anl_mem_a(uint8_t r);
+ void anl_mem_byte(uint8_t r);
+ void anl_a_byte(uint8_t r);
+ void anl_a_mem(uint8_t r);
+ void anl_a_ir(uint8_t r);
+ void anl_a_r(uint8_t r);
+ void anl_c_bitaddr(uint8_t r);
+ void anl_c_nbitaddr(uint8_t r);
+ void cjne_a_byte(uint8_t r);
+ void cjne_a_mem(uint8_t r);
+ void cjne_ir_byte(uint8_t r);
+ void cjne_r_byte(uint8_t r);
+ void clr_bitaddr(uint8_t r);
+ void clr_c(uint8_t r);
+ void clr_a(uint8_t r);
+ void cpl_bitaddr(uint8_t r);
+ void cpl_c(uint8_t r);
+ void cpl_a(uint8_t r);
+ void da_a(uint8_t r);
+ void dec_a(uint8_t r);
+ void dec_mem(uint8_t r);
+ void dec_ir(uint8_t r);
+ void dec_r(uint8_t r);
+ void div_ab(uint8_t r);
+ void djnz_mem(uint8_t r);
+ void djnz_r(uint8_t r);
+ void inc_a(uint8_t r);
+ void inc_mem(uint8_t r);
+ void inc_ir(uint8_t r);
+ void inc_r(uint8_t r);
+ void inc_dptr(uint8_t r);
+ void jb(uint8_t r);
+ void jbc(uint8_t r);
+ void jc(uint8_t r);
+ void jmp_iadptr(uint8_t r);
+ void jnb(uint8_t r);
+ void jnc(uint8_t r);
+ void jnz(uint8_t r);
+ void jz(uint8_t r);
+ void lcall(uint8_t r);
+ void ljmp(uint8_t r);
+ void mov_a_byte(uint8_t r);
+ void mov_a_mem(uint8_t r);
+ void mov_a_ir(uint8_t r);
+ void mov_a_r(uint8_t r);
+ void mov_mem_byte(uint8_t r);
+ void mov_mem_mem(uint8_t r);
+ void mov_ir_byte(uint8_t r);
+ void mov_r_byte(uint8_t r);
+ void mov_mem_ir(uint8_t r);
+ void mov_mem_r(uint8_t r);
+ void mov_dptr_byte(uint8_t r);
+ void mov_bitaddr_c(uint8_t r);
+ void mov_ir_mem(uint8_t r);
+ void mov_r_mem(uint8_t r);
+ void mov_mem_a(uint8_t r);
+ void mov_ir_a(uint8_t r);
+ void mov_r_a(uint8_t r);
+ void movc_a_iapc(uint8_t r);
+ void mov_c_bitaddr(uint8_t r);
+ void movc_a_iadptr(uint8_t r);
+ void movx_a_idptr(uint8_t r);
+ void movx_a_ir(uint8_t r);
+ void movx_idptr_a(uint8_t r);
+ void movx_ir_a(uint8_t r);
+ void mul_ab(uint8_t r);
+ void nop(uint8_t r);
+ void orl_mem_a(uint8_t r);
+ void orl_mem_byte(uint8_t r);
+ void orl_a_byte(uint8_t r);
+ void orl_a_mem(uint8_t r);
+ void orl_a_ir(uint8_t r);
+ void orl_a_r(uint8_t r);
+ void orl_c_bitaddr(uint8_t r);
+ void orl_c_nbitaddr(uint8_t r);
+ void pop(uint8_t r);
+ void push(uint8_t r);
+ void ret(uint8_t r);
+ void reti(uint8_t r);
+ void rl_a(uint8_t r);
+ void rlc_a(uint8_t r);
+ void rr_a(uint8_t r);
+ void rrc_a(uint8_t r);
+ void setb_c(uint8_t r);
+ void setb_bitaddr(uint8_t r);
+ void sjmp(uint8_t r);
+ void subb_a_byte(uint8_t r);
+ void subb_a_mem(uint8_t r);
+ void subb_a_ir(uint8_t r);
+ void subb_a_r(uint8_t r);
+ void swap_a(uint8_t r);
+ void xch_a_mem(uint8_t r);
+ void xch_a_ir(uint8_t r);
+ void xch_a_r(uint8_t r);
+ void xchd_a_ir(uint8_t r);
+ void xrl_mem_a(uint8_t r);
+ void xrl_mem_byte(uint8_t r);
+ void xrl_a_byte(uint8_t r);
+ void xrl_a_mem(uint8_t r);
+ void xrl_a_ir(uint8_t r);
+ void xrl_a_r(uint8_t r);
+ void illegal(uint8_t r);
+ uint8_t ds5002fp_protected(size_t offset, uint8_t data, uint8_t ta_mask, uint8_t mask);
};
@@ -367,21 +367,21 @@ class i8031_device : public mcs51_cpu_device
{
public:
// construction/destruction
- i8031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8051_device : public mcs51_cpu_device
{
public:
// construction/destruction
- i8051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8051_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8751_device : public mcs51_cpu_device
{
public:
// construction/destruction
- i8751_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8751_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -389,39 +389,39 @@ class i8052_device : public mcs51_cpu_device
{
public:
// construction/destruction
- i8052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- i8052_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features = 0);
+ i8052_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8052_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, uint8_t features = 0);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
/* SFR Callbacks */
- virtual void sfr_write(size_t offset, UINT8 data) override;
- virtual UINT8 sfr_read(size_t offset) override;
+ virtual void sfr_write(size_t offset, uint8_t data) override;
+ virtual uint8_t sfr_read(size_t offset) override;
};
class i8032_device : public i8052_device
{
public:
// construction/destruction
- i8032_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i8752_device : public i8052_device
{
public:
// construction/destruction
- i8752_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i8752_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i80c31_device : public i8052_device
{
public:
// construction/destruction
- i80c31_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i80c31_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
@@ -429,18 +429,18 @@ class i80c51_device : public mcs51_cpu_device
{
public:
// construction/destruction
- i80c51_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- i80c51_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features = 0);
+ i80c51_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i80c51_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, uint8_t features = 0);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class i87c51_device : public i80c51_device
{
public:
// construction/destruction
- i87c51_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i87c51_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -448,36 +448,36 @@ class i80c52_device : public i8052_device
{
public:
// construction/destruction
- i80c52_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- i80c52_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, UINT8 features = 0);
+ i80c52_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i80c52_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, uint8_t features = 0);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
/* SFR Callbacks */
- virtual void sfr_write(size_t offset, UINT8 data) override;
- virtual UINT8 sfr_read(size_t offset) override;
+ virtual void sfr_write(size_t offset, uint8_t data) override;
+ virtual uint8_t sfr_read(size_t offset) override;
};
class i80c32_device : public i80c52_device
{
public:
// construction/destruction
- i80c32_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i80c32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class i87c52_device : public i80c52_device
{
public:
// construction/destruction
- i87c52_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ i87c52_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class at89c4051_device : public i80c51_device
{
public:
// construction/destruction
- at89c4051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ at89c4051_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
/*
@@ -505,18 +505,18 @@ class ds5002fp_device : public mcs51_cpu_device
{
public:
// construction/destruction
- ds5002fp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ds5002fp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- static void set_mcon(device_t &device, UINT8 mcon) { downcast<ds5002fp_device &>(device).m_ds5002fp.mcon = mcon; }
- static void set_rpctl(device_t &device, UINT8 rpctl) { downcast<ds5002fp_device &>(device).m_ds5002fp.rpctl = rpctl; }
- static void set_crc(device_t &device, UINT8 crc) { downcast<ds5002fp_device &>(device).m_ds5002fp.crc = crc; }
+ static void set_mcon(device_t &device, uint8_t mcon) { downcast<ds5002fp_device &>(device).m_ds5002fp.mcon = mcon; }
+ static void set_rpctl(device_t &device, uint8_t rpctl) { downcast<ds5002fp_device &>(device).m_ds5002fp.rpctl = rpctl; }
+ static void set_crc(device_t &device, uint8_t crc) { downcast<ds5002fp_device &>(device).m_ds5002fp.crc = crc; }
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
/* SFR Callbacks */
- virtual void sfr_write(size_t offset, UINT8 data) override;
- virtual UINT8 sfr_read(size_t offset) override;
+ virtual void sfr_write(size_t offset, uint8_t data) override;
+ virtual uint8_t sfr_read(size_t offset) override;
};
diff --git a/src/devices/cpu/mcs51/mcs51dasm.cpp b/src/devices/cpu/mcs51/mcs51dasm.cpp
index 7e95aac2af6..83936dbab2a 100644
--- a/src/devices/cpu/mcs51/mcs51dasm.cpp
+++ b/src/devices/cpu/mcs51/mcs51dasm.cpp
@@ -271,7 +271,7 @@ static void init_mem_names(int feature_set, const char **mem_names)
}
-static const char *get_data_address( const char **mem_names, UINT8 arg )
+static const char *get_data_address( const char **mem_names, uint8_t arg )
{
static char buffer_array[4][32];
static int whichbuf;
@@ -284,7 +284,7 @@ static const char *get_data_address( const char **mem_names, UINT8 arg )
return buffer;
}
-static const char *get_bit_address( const char **mem_names, UINT8 arg )
+static const char *get_bit_address( const char **mem_names, uint8_t arg )
{
static char buffer[32];
@@ -315,14 +315,14 @@ static const char *get_bit_address( const char **mem_names, UINT8 arg )
/*Just display the actual memory address for data & bit address access*/
-static const char *get_data_address( UINT8 arg )
+static const char *get_data_address( uint8_t arg )
{
static char buffer[32];
sprintf(buffer,"$%02X",arg);
return buffer;
}
-static const char *get_bit_address( UINT8 arg )
+static const char *get_bit_address( uint8_t arg )
{
static char buffer[32];
sprintf(buffer,"$%02X",arg);
@@ -331,14 +331,14 @@ static const char *get_bit_address( UINT8 arg )
#endif
-static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const uint8_t *oprom, const uint8_t *opram)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
unsigned PC = pc;
const char *sym, *sym2;
- UINT8 op, data;
- UINT16 addr;
- INT8 rel;
+ uint8_t op, data;
+ uint16_t addr;
+ int8_t rel;
op = oprom[PC++ - pc];
switch( op )
diff --git a/src/devices/cpu/mcs51/mcs51ops.hxx b/src/devices/cpu/mcs51/mcs51ops.hxx
index 0c1dec682ef..e3b89fe2d15 100644
--- a/src/devices/cpu/mcs51/mcs51ops.hxx
+++ b/src/devices/cpu/mcs51/mcs51ops.hxx
@@ -9,7 +9,7 @@
//ACALL code addr /* 1: aaa1 0001 */
OPHANDLER( acall )
{
- UINT8 addr = ROP_ARG(PC++); //Grab code address byte
+ uint8_t addr = ROP_ARG(PC++); //Grab code address byte
PUSH_PC(); //Save PC to the stack
//Thanks Gerrit for help with this! :)
PC = (PC & 0xf800) | ((r & 0xe0) << 3) | addr;
@@ -18,8 +18,8 @@ OPHANDLER( acall )
//ADD A, #data /* 1: 0010 0100 */
OPHANDLER( add_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 result = ACC + data; //Add data to accumulator
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t result = ACC + data; //Add data to accumulator
DO_ADD_FLAGS(ACC,data,0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -27,9 +27,9 @@ OPHANDLER( add_a_byte )
//ADD A, data addr /* 1: 0010 0101 */
OPHANDLER( add_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- UINT8 result = ACC + data; //Add data to accumulator
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ uint8_t result = ACC + data; //Add data to accumulator
DO_ADD_FLAGS(ACC,data,0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -37,8 +37,8 @@ OPHANDLER( add_a_mem )
//ADD A, @R0/@R1 /* 1: 0010 011i */
OPHANDLER( add_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- UINT8 result = ACC + data; //Add data to accumulator
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ uint8_t result = ACC + data; //Add data to accumulator
DO_ADD_FLAGS(ACC,data,0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -46,8 +46,8 @@ OPHANDLER( add_a_ir )
//ADD A, R0 to R7 /* 1: 0010 1rrr */
OPHANDLER( add_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- UINT8 result = ACC + data; //Add data to accumulator
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ uint8_t result = ACC + data; //Add data to accumulator
DO_ADD_FLAGS(ACC,data,0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -55,8 +55,8 @@ OPHANDLER( add_a_r )
//ADDC A, #data /* 1: 0011 0100 */
OPHANDLER( addc_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -64,9 +64,9 @@ OPHANDLER( addc_a_byte )
//ADDC A, data addr /* 1: 0011 0101 */
OPHANDLER( addc_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -74,8 +74,8 @@ OPHANDLER( addc_a_mem )
//ADDC A, @R0/@R1 /* 1: 0011 011i */
OPHANDLER( addc_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -83,8 +83,8 @@ OPHANDLER( addc_a_ir )
//ADDC A, R0 to R7 /* 1: 0011 1rrr */
OPHANDLER( addc_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -92,7 +92,7 @@ OPHANDLER( addc_a_r )
//AJMP code addr /* 1: aaa0 0001 */
OPHANDLER( ajmp )
{
- UINT8 addr = ROP_ARG(PC++); //Grab code address byte
+ uint8_t addr = ROP_ARG(PC++); //Grab code address byte
//Thanks Gerrit for help with this! :)
PC = (PC & 0xf800) | ((r & 0xe0) << 3) | addr;
}
@@ -100,46 +100,46 @@ OPHANDLER( ajmp )
//ANL data addr, A /* 1: 0101 0010 */
OPHANDLER( anl_mem_a )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,data & ACC); //Set data address value to it's value Logical AND with ACC
}
//ANL data addr, #data /* 1: 0101 0011 */
OPHANDLER( anl_mem_byte )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 srcdata = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t srcdata = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,srcdata & data); //Set data address value to it's value Logical AND with Data
}
//ANL A, #data /* 1: 0101 0100 */
OPHANDLER( anl_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
+ uint8_t data = ROP_ARG(PC++); //Grab data
SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, data addr /* 1: 0101 0101 */
OPHANDLER( anl_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, @RO/@R1 /* 1: 0101 011i */
OPHANDLER( anl_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, RO to R7 /* 1: 0101 1rrr */
OPHANDLER( anl_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
@@ -147,8 +147,8 @@ OPHANDLER( anl_a_r )
OPHANDLER( anl_c_bitaddr )
{
int cy = GET_CY;
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 bit = BIT_R(addr); //Grab bit data from bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t bit = BIT_R(addr); //Grab bit data from bit address
SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Bit
}
@@ -156,8 +156,8 @@ OPHANDLER( anl_c_bitaddr )
OPHANDLER( anl_c_nbitaddr )
{
int cy = GET_CY;
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 bit = BIT_R(addr); //Grab bit data from bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t bit = BIT_R(addr); //Grab bit data from bit address
bit = ((~bit)&1); //Complement bit
SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
}
@@ -165,8 +165,8 @@ OPHANDLER( anl_c_nbitaddr )
//CJNE A, #data, code addr /* 1: 1011 0100 */
OPHANDLER( cjne_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(ACC != data) //Jump if values are not equal
{
@@ -180,9 +180,9 @@ OPHANDLER( cjne_a_byte )
//CJNE A, data addr, code addr /* 1: 1011 0101 */
OPHANDLER( cjne_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- UINT8 data = IRAM_R(addr); //Pull value from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t data = IRAM_R(addr); //Pull value from data address
if(ACC != data) //Jump if values are not equal
{
@@ -196,9 +196,9 @@ OPHANDLER( cjne_a_mem )
//CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
OPHANDLER( cjne_ir_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- UINT8 srcdata = IRAM_IR(R_REG(r)); //Grab value pointed to by R0 or R1
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t srcdata = IRAM_IR(R_REG(r)); //Grab value pointed to by R0 or R1
if(srcdata != data) //Jump if values are not equal
{
@@ -212,9 +212,9 @@ OPHANDLER( cjne_ir_byte )
//CJNE R0 to R7, #data, code addr /* 1: 1011 1rrr */
OPHANDLER( cjne_r_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- UINT8 srcdata = R_REG(r); //Grab value of R0 - R7
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t srcdata = R_REG(r); //Grab value of R0 - R7
if(srcdata != data) //Jump if values are not equal
{
@@ -228,7 +228,7 @@ OPHANDLER( cjne_r_byte )
//CLR bit addr /* 1: 1100 0010 */
OPHANDLER( clr_bitaddr )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
BIT_W(addr,0); //Clear bit at specified bit address
}
@@ -247,22 +247,22 @@ OPHANDLER( clr_a )
//CPL bit addr /* 1: 1011 0010 */
OPHANDLER( cpl_bitaddr )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 data = (~BIT_R(addr))&1;
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t data = (~BIT_R(addr))&1;
BIT_W(addr,data); //Complement bit at specified bit address
}
//CPL C /* 1: 1011 0011 */
OPHANDLER( cpl_c )
{
- UINT8 bit = (~GET_CY)&1; //Complement Carry Flag
+ uint8_t bit = (~GET_CY)&1; //Complement Carry Flag
SET_CY(bit);
}
//CPL A /* 1: 1111 0100 */
OPHANDLER( cpl_a )
{
- UINT8 data = ((~ACC)&0xff);
+ uint8_t data = ((~ACC)&0xff);
SET_ACC(data); //Complement Accumulator
}
@@ -277,7 +277,7 @@ OPHANDLER( da_a )
If the carry is set, OR the four high bits 4-7 exceed nine, six is added to the value of these bits.
The carry flag will be set if the result is > 0x99, but not cleared otherwise */
- UINT16 new_acc = ACC & 0xff;
+ uint16_t new_acc = ACC & 0xff;
if(GET_AC || (new_acc & 0x0f) > 0x09)
new_acc += 0x06;
if(GET_CY || ((new_acc & 0xf0) > 0x90) || (new_acc & ~0xff))
@@ -296,15 +296,15 @@ OPHANDLER( dec_a )
//DEC data addr /* 1: 0001 0101 */
OPHANDLER( dec_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr);
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr);
IRAM_W(addr,data-1);
}
//DEC @R0/@R1 /* 1: 0001 011i */
OPHANDLER( dec_ir )
{
- UINT8 data = IRAM_IR(R_REG(r));
+ uint8_t data = IRAM_IR(R_REG(r));
IRAM_W(R_REG(r),data-1);
}
@@ -340,8 +340,8 @@ OPHANDLER( div_ab )
//DJNZ data addr, code addr /* 1: 1101 0101 */
OPHANDLER( djnz_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
IRAM_W(addr,IRAM_R(addr) - 1); //Decrement value contained at data address
if(IRAM_R(addr) != 0) //Branch if contents of data address is not 0
{
@@ -352,7 +352,7 @@ OPHANDLER( djnz_mem )
//DJNZ R0 to R7,code addr /* 1: 1101 1rrr */
OPHANDLER( djnz_r )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
SET_REG(r ,R_REG(r) - 1); //Decrement value
if(R_REG(r) != 0) //Branch if contents of R0 - R7 is not 0
{
@@ -369,37 +369,37 @@ OPHANDLER( inc_a )
//INC data addr /* 1: 0000 0101 */
OPHANDLER( inc_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr);
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr);
IRAM_W(addr,data+1);
}
//INC @R0/@R1 /* 1: 0000 011i */
OPHANDLER( inc_ir )
{
- UINT8 data = IRAM_IR(R_REG(r));
+ uint8_t data = IRAM_IR(R_REG(r));
IRAM_W(R_REG(r),data+1);
}
//INC R0 to R7 /* 1: 0000 1rrr */
OPHANDLER( inc_r )
{
- UINT8 data = R_REG(r);
+ uint8_t data = R_REG(r);
SET_REG(r, data + 1);
}
//INC DPTR /* 1: 1010 0011 */
OPHANDLER( inc_dptr )
{
- UINT16 dptr = (DPTR)+1;
+ uint16_t dptr = (DPTR)+1;
SET_DPTR(dptr);
}
//JB bit addr, code addr /* 1: 0010 0000 */
OPHANDLER( jb )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(BIT_R(addr)) //If bit set at specified bit address, jump
{
PC = PC + rel_addr;
@@ -409,8 +409,8 @@ OPHANDLER( jb )
//JBC bit addr, code addr /* 1: 0001 0000 */
OPHANDLER( jbc )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(BIT_R(addr)) { //If bit set at specified bit address, jump
PC = PC + rel_addr;
BIT_W(addr,0); //Clear Bit also
@@ -420,7 +420,7 @@ OPHANDLER( jbc )
//JC code addr /* 1: 0100 0000 */
OPHANDLER( jc )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(GET_CY) //Jump if Carry Flag Set
{
PC = PC + rel_addr;
@@ -436,8 +436,8 @@ OPHANDLER( jmp_iadptr )
//JNB bit addr, code addr /* 1: 0011 0000 */
OPHANDLER( jnb )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(!BIT_R(addr)) //If bit NOT set at specified bit address, jump
{
PC = PC + rel_addr;
@@ -447,7 +447,7 @@ OPHANDLER( jnb )
//JNC code addr /* 1: 0101 0000 */
OPHANDLER( jnc )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(!GET_CY) //Jump if Carry Flag not set
{
PC = PC + rel_addr;
@@ -457,7 +457,7 @@ OPHANDLER( jnc )
//JNZ code addr /* 1: 0111 0000 */
OPHANDLER( jnz )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(ACC != 0) //Branch if ACC is not 0
{
PC = PC+rel_addr;
@@ -467,7 +467,7 @@ OPHANDLER( jnz )
//JZ code addr /* 1: 0110 0000 */
OPHANDLER( jz )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(ACC == 0) //Branch if ACC is 0
{
PC = PC+rel_addr;
@@ -477,33 +477,33 @@ OPHANDLER( jz )
//LCALL code addr /* 1: 0001 0010 */
OPHANDLER( lcall )
{
- UINT8 addr_hi, addr_lo;
+ uint8_t addr_hi, addr_lo;
addr_hi = ROP_ARG(PC++);
addr_lo = ROP_ARG(PC++);
PUSH_PC();
- PC = (UINT16)((addr_hi<<8) | addr_lo);
+ PC = (uint16_t)((addr_hi<<8) | addr_lo);
}
//LJMP code addr /* 1: 0000 0010 */
OPHANDLER( ljmp )
{
- UINT8 addr_hi, addr_lo;
+ uint8_t addr_hi, addr_lo;
addr_hi = ROP_ARG(PC++);
addr_lo = ROP_ARG(PC++);
- PC = (UINT16)((addr_hi<<8) | addr_lo);
+ PC = (uint16_t)((addr_hi<<8) | addr_lo);
}
//MOV A, #data /* 1: 0111 0100 */
OPHANDLER( mov_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
+ uint8_t data = ROP_ARG(PC++); //Grab data
SET_ACC(data); //Store data to ACC
}
//MOV A, data addr /* 1: 1110 0101 */
OPHANDLER( mov_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
SET_ACC(IRAM_R(addr)); //Store contents of data address to ACC
}
@@ -522,8 +522,8 @@ OPHANDLER( mov_a_r )
//MOV data addr, #data /* 1: 0111 0101 */
OPHANDLER( mov_mem_byte )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = ROP_ARG(PC++); //Grab data
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = ROP_ARG(PC++); //Grab data
IRAM_W(addr,data); //Store data to data address location
}
@@ -531,7 +531,7 @@ OPHANDLER( mov_mem_byte )
OPHANDLER( mov_mem_mem )
{
//1st address is src, 2nd is dst, but the mov command works as mov dst,src)
- UINT8 src,dst;
+ uint8_t src,dst;
src = ROP_ARG(PC++); //Grab source data address
dst = ROP_ARG(PC++); //Grab destination data address
IRAM_W(dst,IRAM_R(src)); //Read source address contents and store to destination address
@@ -540,65 +540,65 @@ OPHANDLER( mov_mem_mem )
//MOV @R0/@R1, #data /* 1: 0111 011i */
OPHANDLER( mov_ir_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
+ uint8_t data = ROP_ARG(PC++); //Grab data
IRAM_IW(R_REG(r),data); //Store data to address pointed by R0 or R1
}
//MOV R0 to R7, #data /* 1: 0111 1rrr */
OPHANDLER( mov_r_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
+ uint8_t data = ROP_ARG(PC++); //Grab data
SET_REG(r, data); //Store to R0 - R7
}
//MOV data addr, @R0/@R1 /* 1: 1000 011i */
OPHANDLER( mov_mem_ir )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr,IRAM_IR(R_REG(r))); //Store contents pointed to by R0 or R1 to data address
}
//MOV data addr,R0 to R7 /* 1: 1000 1rrr */
OPHANDLER( mov_mem_r )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr,R_REG(r)); //Store contents of R0 - R7 to data address
}
//MOV DPTR, #data16 /* 1: 1001 0000 */
OPHANDLER( mov_dptr_byte )
{
- UINT8 data_hi, data_lo;
+ uint8_t data_hi, data_lo;
data_hi = ROP_ARG(PC++); //Grab hi byte
data_lo = ROP_ARG(PC++); //Grab lo byte
- SET_DPTR((UINT16)((data_hi<<8)|data_lo)); //Store to DPTR
+ SET_DPTR((uint16_t)((data_hi<<8)|data_lo)); //Store to DPTR
}
//MOV bit addr, C /* 1: 1001 0010 */
OPHANDLER( mov_bitaddr_c )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
BIT_W(addr,GET_CY); //Store Carry Flag to Bit Address
}
//MOV @R0/@R1, data addr /* 1: 1010 011i */
OPHANDLER( mov_ir_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
IRAM_IW(R_REG(r),IRAM_R(addr)); //Store data from data address to address pointed to by R0 or R1
}
//MOV R0 to R7, data addr /* 1: 1010 1rrr */
OPHANDLER( mov_r_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
SET_REG(r, IRAM_R(addr)); //Store to R0 - R7
}
//MOV data addr, A /* 1: 1111 0101 */
OPHANDLER( mov_mem_a )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr,ACC); //Store A to data address
}
@@ -617,7 +617,7 @@ OPHANDLER( mov_r_a )
//MOVC A, @A + PC /* 1: 1000 0011 */
OPHANDLER( movc_a_iapc )
{
- UINT8 data;
+ uint8_t data;
data = CODEMEM_R(ACC+PC); //Move a byte from CODE(Program) Memory and store to ACC
SET_ACC(data);
}
@@ -625,14 +625,14 @@ OPHANDLER( movc_a_iapc )
//MOV C, bit addr /* 1: 1010 0010 */
OPHANDLER( mov_c_bitaddr )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
SET_CY( (BIT_R(addr)) ); //Store Bit from Bit Address to Carry Flag
}
//MOVC A, @A + DPTR /* 1: 1001 0011 */
OPHANDLER( movc_a_iadptr )
{
- UINT8 data;
+ uint8_t data;
data = CODEMEM_R(ACC + DPTR); //Move a byte from CODE(Program) Memory and store to ACC
SET_ACC(data);
}
@@ -641,9 +641,9 @@ OPHANDLER( movc_a_iadptr )
//(Move External Ram 16 bit address to A)
OPHANDLER( movx_a_idptr )
{
-// UINT8 byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
- UINT32 addr = ERAM_ADDR(DPTR, 0xFFFF);
- UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
+// uint8_t byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
+ uint32_t addr = ERAM_ADDR(DPTR, 0xFFFF);
+ uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
SET_ACC(byte); //Store to ACC
}
@@ -651,8 +651,8 @@ OPHANDLER( movx_a_idptr )
//(Move External Ram 8 bit address to A)
OPHANDLER( movx_a_ir )
{
- UINT32 addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
- UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
+ uint32_t addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
+ uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
SET_ACC(byte); //Store to ACC
}
@@ -661,7 +661,7 @@ OPHANDLER( movx_a_ir )
OPHANDLER( movx_idptr_a )
{
// DATAMEM_W(R_DPTR, ACC); //Store ACC to External DATA memory address pointed to by DPTR
- UINT32 addr = ERAM_ADDR(DPTR, 0xFFFF);
+ uint32_t addr = ERAM_ADDR(DPTR, 0xFFFF);
DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address pointed to by DPTR
}
@@ -669,17 +669,17 @@ OPHANDLER( movx_idptr_a )
//(Move A to External Ram 8 bit address)
OPHANDLER( movx_ir_a )
{
- UINT32 addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
+ uint32_t addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address
}
//MUL AB /* 1: 1010 0100 */
OPHANDLER( mul_ab )
{
- UINT16 result = ACC * B;
+ uint16_t result = ACC * B;
//A gets lo bits, B gets hi bits of result
- B = (UINT8) ((result & 0xFF00) >> 8);
- SET_ACC((UINT8)(result & 0x00FF));
+ B = (uint8_t) ((result & 0xFF00) >> 8);
+ SET_ACC((uint8_t)(result & 0x00FF));
//Set flags
SET_OV( ((result & 0x100) >> 8) ); //Set/Clear Overflow Flag if result > 255
SET_CY(0); //Carry Flag always cleared
@@ -693,46 +693,46 @@ OPHANDLER( nop )
//ORL data addr, A /* 1: 0100 0010 */
OPHANDLER( orl_mem_a )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,data | ACC); //Set data address value to it's value Logical OR with ACC
}
//ORL data addr, #data /* 1: 0100 0011 */
OPHANDLER( orl_mem_byte )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 srcdata = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t srcdata = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,srcdata | data); //Set data address value to it's value Logical OR with Data
}
//ORL A, #data /* 1: 0100 0100 */
OPHANDLER( orl_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
+ uint8_t data = ROP_ARG(PC++); //Grab data
SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, data addr /* 1: 0100 0101 */
OPHANDLER( orl_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, @RO/@R1 /* 1: 0100 011i */
OPHANDLER( orl_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, RO to R7 /* 1: 0100 1rrr */
OPHANDLER( orl_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
@@ -740,8 +740,8 @@ OPHANDLER( orl_a_r )
OPHANDLER( orl_c_bitaddr )
{
int cy = GET_CY;
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 bit = BIT_R(addr); //Grab bit data from bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t bit = BIT_R(addr); //Grab bit data from bit address
SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Bit
}
@@ -749,8 +749,8 @@ OPHANDLER( orl_c_bitaddr )
OPHANDLER( orl_c_nbitaddr )
{
int cy = GET_CY;
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 bit = BIT_R(addr); //Grab bit data from bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t bit = BIT_R(addr); //Grab bit data from bit address
bit = ((~bit)&1); //Complement bit
SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
}
@@ -758,7 +758,7 @@ OPHANDLER( orl_c_nbitaddr )
//POP data addr /* 1: 1101 0000 */
OPHANDLER( pop )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr, IRAM_IR(SP)); //Store to contents of data addr, data pointed to by Stack - IRAM_IR needed to access upper 128 bytes of stack
//IRAM_IW(addr, IRAM_IR(R_SP)); //Store to contents of data addr, data pointed to by Stack - doesn't work, sfr's are not restored this way and it's not an indirect access anyway
SP = SP-1; //Decrement SP
@@ -767,8 +767,8 @@ OPHANDLER( pop )
//PUSH data addr /* 1: 1100 0000 */
OPHANDLER( push )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 tmpSP = SP+1; //Grab and Increment Stack Pointer
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t tmpSP = SP+1; //Grab and Increment Stack Pointer
SP = tmpSP; // ""
IRAM_IW(tmpSP, IRAM_R(addr)); //Store to stack contents of data address - IRAM_IW needed to store to upper 128 bytes of stack, however, can't use IRAM_IR because that won't store the sfrs and it's not an indirect access anyway
}
@@ -833,22 +833,22 @@ OPHANDLER( setb_c )
//SETB bit addr /* 1: 1101 0010 */
OPHANDLER( setb_bitaddr )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
BIT_W(addr,1); //Set Bit at Bit Address
}
//SJMP code addr /* 1: 1000 0000 */
OPHANDLER( sjmp )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
PC = PC + rel_addr; //Update PC
}
//SUBB A, #data /* 1: 1001 0100 */
OPHANDLER( subb_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
@@ -857,9 +857,9 @@ OPHANDLER( subb_a_byte )
//SUBB A, data addr /* 1: 1001 0101 */
OPHANDLER( subb_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -867,8 +867,8 @@ OPHANDLER( subb_a_mem )
//SUBB A, @R0/@R1 /* 1: 1001 011i */
OPHANDLER( subb_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -876,8 +876,8 @@ OPHANDLER( subb_a_ir )
//SUBB A, R0 to R7 /* 1: 1001 1rrr */
OPHANDLER( subb_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -885,7 +885,7 @@ OPHANDLER( subb_a_r )
//SWAP A /* 1: 1100 0100 */
OPHANDLER( swap_a )
{
- UINT8 a_nib_lo, a_nib_hi;
+ uint8_t a_nib_lo, a_nib_hi;
a_nib_hi = (ACC & 0x0f) << 4; //Grab lo byte of ACC and move to hi
a_nib_lo = (ACC & 0xf0) >> 4; //Grab hi byte of ACC and move to lo
SET_ACC( a_nib_hi | a_nib_lo);
@@ -894,9 +894,9 @@ OPHANDLER( swap_a )
//XCH A, data addr /* 1: 1100 0101 */
OPHANDLER( xch_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data
- UINT8 oldACC = ACC; //Hold value of ACC
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data
+ uint8_t oldACC = ACC; //Hold value of ACC
SET_ACC(data); //Sets ACC to data
IRAM_W(addr,oldACC); //Sets data address to old value of ACC
}
@@ -904,8 +904,8 @@ OPHANDLER( xch_a_mem )
//XCH A, @RO/@R1 /* 1: 1100 011i */
OPHANDLER( xch_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
- UINT8 oldACC = ACC; //Hold value of ACC
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
+ uint8_t oldACC = ACC; //Hold value of ACC
SET_ACC(data); //Sets ACC to data
IRAM_W(R_REG(r),oldACC); //Sets data address to old value of ACC
}
@@ -913,8 +913,8 @@ OPHANDLER( xch_a_ir )
//XCH A, RO to R7 /* 1: 1100 1rrr */
OPHANDLER( xch_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0-R7
- UINT8 oldACC = ACC; //Hold value of ACC
+ uint8_t data = R_REG(r); //Grab data from R0-R7
+ uint8_t oldACC = ACC; //Hold value of ACC
SET_ACC(data); //Sets ACC to data
SET_REG(r, oldACC); //Sets data address to old value of ACC
}
@@ -922,7 +922,7 @@ OPHANDLER( xch_a_r )
//XCHD A, @R0/@R1 /* 1: 1101 011i */
OPHANDLER( xchd_a_ir )
{
- UINT8 acc, ir_data;
+ uint8_t acc, ir_data;
ir_data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
acc = ACC; //Grab ACC value
SET_ACC( (acc & 0xf0) | (ir_data & 0x0f) ); //Set ACC to lower nibble of data pointed to by R0 or R1
@@ -932,46 +932,46 @@ OPHANDLER( xchd_a_ir )
//XRL data addr, A /* 1: 0110 0010 */
OPHANDLER( xrl_mem_a )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,data ^ ACC); //Set data address value to it's value Logical XOR with ACC
}
//XRL data addr, #data /* 1: 0110 0011 */
OPHANDLER( xrl_mem_byte )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 srcdata = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t srcdata = IRAM_R(addr); //Grab data from data address
IRAM_W(addr,srcdata ^ data); //Set data address value to it's value Logical XOR with Data
}
//XRL A, #data /* 1: 0110 0100 */
OPHANDLER( xrl_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
+ uint8_t data = ROP_ARG(PC++); //Grab data
SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, data addr /* 1: 0110 0101 */
OPHANDLER( xrl_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, @R0/@R1 /* 1: 0110 011i */
OPHANDLER( xrl_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, R0 to R7 /* 1: 0110 1rrr */
OPHANDLER( xrl_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
diff --git a/src/devices/cpu/mcs96/i8x9x.cpp b/src/devices/cpu/mcs96/i8x9x.cpp
index a0616c0b223..f75fdec4f8c 100644
--- a/src/devices/cpu/mcs96/i8x9x.cpp
+++ b/src/devices/cpu/mcs96/i8x9x.cpp
@@ -11,14 +11,14 @@
#include "emu.h"
#include "i8x9x.h"
-i8x9x_device::i8x9x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+i8x9x_device::i8x9x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
mcs96_device(mconfig, type, name, tag, owner, clock, 8, "i8x9x", __FILE__),
io_config("io", ENDIANNESS_LITTLE, 16, 16, -1), io(nullptr), base_timer2(0), ad_done(0), hso_command(0), ad_command(0), hso_time(0), ad_result(0),
ios0(0), ios1(0), ioc0(0), ioc1(0), sbuf(0), sp_stat(0), serial_send_buf(0), serial_send_timer(0)
{
}
-offs_t i8x9x_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i8x9x_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disasm_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
@@ -67,14 +67,14 @@ void i8x9x_device::commit_hso_cam()
hso_cam_hold.time = hso_time;
}
-void i8x9x_device::ad_start(UINT64 current_time)
+void i8x9x_device::ad_start(uint64_t current_time)
{
ad_result = (io->read_word(2*((ad_command & 7) + A0)) << 6) | 8 | (ad_command & 7);
ad_done = current_time + 88;
internal_update(current_time);
}
-void i8x9x_device::serial_send(UINT8 data)
+void i8x9x_device::serial_send(uint8_t data)
{
serial_send_buf = data;
serial_send_timer = total_cycles() + 9600;
@@ -89,7 +89,7 @@ void i8x9x_device::serial_send_done()
check_irq();
}
-void i8x9x_device::io_w8(UINT8 adr, UINT8 data)
+void i8x9x_device::io_w8(uint8_t adr, uint8_t data)
{
switch(adr) {
case 0x02:
@@ -154,7 +154,7 @@ void i8x9x_device::io_w8(UINT8 adr, UINT8 data)
return;
}
-void i8x9x_device::io_w16(UINT8 adr, UINT16 data)
+void i8x9x_device::io_w16(uint8_t adr, uint16_t data)
{
switch(adr) {
case 0:
@@ -171,7 +171,7 @@ void i8x9x_device::io_w16(UINT8 adr, UINT16 data)
return;
}
-UINT8 i8x9x_device::io_r8(UINT8 adr)
+uint8_t i8x9x_device::io_r8(uint8_t adr)
{
switch(adr) {
case 0x00:
@@ -224,7 +224,7 @@ UINT8 i8x9x_device::io_r8(UINT8 adr)
case 0x10:
return io->read_word(P2*2);
case 0x11: {
- UINT8 res = sp_stat;
+ uint8_t res = sp_stat;
sp_stat &= 0x80;
logerror("%s: read sp stat %02x (%04x)\n", tag(), res, PPC);
return res;
@@ -233,7 +233,7 @@ UINT8 i8x9x_device::io_r8(UINT8 adr)
logerror("%s: read ios 0 %02x (%04x)\n", tag(), ios0, PPC);
return ios0;
case 0x16: {
- UINT8 res = ios1;
+ uint8_t res = ios1;
ios1 = ios1 & 0xc0;
return res;
}
@@ -243,7 +243,7 @@ UINT8 i8x9x_device::io_r8(UINT8 adr)
}
}
-UINT16 i8x9x_device::io_r16(UINT8 adr)
+uint16_t i8x9x_device::io_r16(uint8_t adr)
{
switch(adr) {
case 0x00:
@@ -267,7 +267,7 @@ void i8x9x_device::do_exec_partial()
{
}
-void i8x9x_device::serial_w(UINT8 val)
+void i8x9x_device::serial_w(uint8_t val)
{
sbuf = val;
sp_stat |= 0x40;
@@ -275,24 +275,24 @@ void i8x9x_device::serial_w(UINT8 val)
check_irq();
}
-UINT16 i8x9x_device::timer_value(int timer, UINT64 current_time) const
+uint16_t i8x9x_device::timer_value(int timer, uint64_t current_time) const
{
if(timer == 2)
current_time -= base_timer2;
return current_time >> 3;
}
-UINT64 i8x9x_device::timer_time_until(int timer, UINT64 current_time, UINT16 timer_value) const
+uint64_t i8x9x_device::timer_time_until(int timer, uint64_t current_time, uint16_t timer_value) const
{
- UINT64 timer_base = timer == 2 ? base_timer2 : 0;
- UINT64 delta = (current_time - timer_base) >> 3;
- UINT32 tdelta = UINT16(timer_value - delta);
+ uint64_t timer_base = timer == 2 ? base_timer2 : 0;
+ uint64_t delta = (current_time - timer_base) >> 3;
+ uint32_t tdelta = uint16_t(timer_value - delta);
if(!tdelta)
tdelta = 0x10000;
return timer_base + ((delta + tdelta) << 3);
}
-void i8x9x_device::trigger_cam(int id, UINT64 current_time)
+void i8x9x_device::trigger_cam(int id, uint64_t current_time)
{
hso_cam_entry &cam = hso_info[id];
cam.active = false;
@@ -309,15 +309,15 @@ void i8x9x_device::trigger_cam(int id, UINT64 current_time)
}
}
-void i8x9x_device::internal_update(UINT64 current_time)
+void i8x9x_device::internal_update(uint64_t current_time)
{
- UINT16 current_timer1 = timer_value(1, current_time);
- UINT16 current_timer2 = timer_value(2, current_time);
+ uint16_t current_timer1 = timer_value(1, current_time);
+ uint16_t current_timer2 = timer_value(2, current_time);
for(int i=0; i<8; i++)
if(hso_info[i].active) {
- UINT8 cmd = hso_info[i].command;
- UINT16 t = hso_info[i].time;
+ uint8_t cmd = hso_info[i].command;
+ uint16_t t = hso_info[i].time;
if(((cmd & 0x40) && t == current_timer2) ||
(!(cmd & 0x40) && t == current_timer1)) {
if(cmd != 0x18 && cmd != 0x19)
@@ -335,7 +335,7 @@ void i8x9x_device::internal_update(UINT64 current_time)
if(current_time == serial_send_timer)
serial_send_done();
- UINT64 event_time = 0;
+ uint64_t event_time = 0;
for(int i=0; i<8; i++) {
if(!hso_info[i].active && hso_cam_hold.active) {
hso_info[i] = hso_cam_hold;
@@ -343,7 +343,7 @@ void i8x9x_device::internal_update(UINT64 current_time)
logerror("%s: hso cam %02x %04x in slot %d from hold\n", tag(), hso_cam_hold.command, hso_cam_hold.time, i);
}
if(hso_info[i].active) {
- UINT64 new_time = timer_time_until(hso_info[i].command & 0x40 ? 2 : 1, current_time, hso_info[i].time);
+ uint64_t new_time = timer_time_until(hso_info[i].command & 0x40 ? 2 : 1, current_time, hso_info[i].time);
if(!event_time || new_time < event_time)
event_time = new_time;
}
@@ -358,12 +358,12 @@ void i8x9x_device::internal_update(UINT64 current_time)
recompute_bcount(event_time);
}
-c8095_device::c8095_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+c8095_device::c8095_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
i8x9x_device(mconfig, C8095, "C8095", tag, owner, clock, "c8095", __FILE__)
{
}
-p8098_device::p8098_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+p8098_device::p8098_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
i8x9x_device(mconfig, P8098, "P8098", tag, owner, clock, "p8098", __FILE__)
{
}
diff --git a/src/devices/cpu/mcs96/i8x9x.h b/src/devices/cpu/mcs96/i8x9x.h
index f71dc2f6b24..099618e94f1 100644
--- a/src/devices/cpu/mcs96/i8x9x.h
+++ b/src/devices/cpu/mcs96/i8x9x.h
@@ -21,9 +21,9 @@ public:
P0, P1, P2
};
- i8x9x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ i8x9x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
- void serial_w(UINT8 val);
+ void serial_w(uint8_t val);
protected:
virtual void device_start() override;
@@ -32,14 +32,14 @@ protected:
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
- virtual void internal_update(UINT64 current_time) override;
- virtual void io_w8(UINT8 adr, UINT8 data) override;
- virtual void io_w16(UINT8 adr, UINT16 data) override;
- virtual UINT8 io_r8(UINT8 adr) override;
- virtual UINT16 io_r16(UINT8 adr) override;
+ virtual void internal_update(uint64_t current_time) override;
+ virtual void io_w8(uint8_t adr, uint8_t data) override;
+ virtual void io_w16(uint8_t adr, uint16_t data) override;
+ virtual uint8_t io_r8(uint8_t adr) override;
+ virtual uint16_t io_r16(uint8_t adr) override;
private:
enum {
@@ -55,8 +55,8 @@ private:
struct hso_cam_entry {
bool active;
- UINT8 command;
- UINT16 time;
+ uint8_t command;
+ uint16_t time;
};
address_space_config io_config;
@@ -65,31 +65,31 @@ private:
hso_cam_entry hso_info[8];
hso_cam_entry hso_cam_hold;
- UINT64 base_timer2, ad_done;
- UINT8 hso_command, ad_command;
- UINT16 hso_time, ad_result;
- UINT8 ios0, ios1, ioc0, ioc1;
- UINT8 sbuf, sp_stat;
- UINT8 serial_send_buf;
- UINT64 serial_send_timer;
+ uint64_t base_timer2, ad_done;
+ uint8_t hso_command, ad_command;
+ uint16_t hso_time, ad_result;
+ uint8_t ios0, ios1, ioc0, ioc1;
+ uint8_t sbuf, sp_stat;
+ uint8_t serial_send_buf;
+ uint64_t serial_send_timer;
- UINT16 timer_value(int timer, UINT64 current_time) const;
- UINT64 timer_time_until(int timer, UINT64 current_time, UINT16 timer_value) const;
+ uint16_t timer_value(int timer, uint64_t current_time) const;
+ uint64_t timer_time_until(int timer, uint64_t current_time, uint16_t timer_value) const;
void commit_hso_cam();
- void trigger_cam(int id, UINT64 current_time);
- void ad_start(UINT64 current_time);
- void serial_send(UINT8 data);
+ void trigger_cam(int id, uint64_t current_time);
+ void ad_start(uint64_t current_time);
+ void serial_send(uint8_t data);
void serial_send_done();
};
class c8095_device : public i8x9x_device {
public:
- c8095_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ c8095_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class p8098_device : public i8x9x_device {
public:
- p8098_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ p8098_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type C8095;
diff --git a/src/devices/cpu/mcs96/i8xc196.cpp b/src/devices/cpu/mcs96/i8xc196.cpp
index ee1bcc229ce..5d814f7e272 100644
--- a/src/devices/cpu/mcs96/i8xc196.cpp
+++ b/src/devices/cpu/mcs96/i8xc196.cpp
@@ -11,17 +11,17 @@
#include "emu.h"
#include "i8xc196.h"
-i8xc196_device::i8xc196_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+i8xc196_device::i8xc196_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
mcs96_device(mconfig, type, name, tag, owner, clock, 16, shortname, source)
{
}
-offs_t i8xc196_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t i8xc196_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return disasm_generic(buffer, pc, oprom, opram, options, disasm_entries);
}
-void i8xc196_device::io_w8(UINT8 adr, UINT8 data)
+void i8xc196_device::io_w8(uint8_t adr, uint8_t data)
{
switch(adr) {
case 0:
@@ -34,7 +34,7 @@ void i8xc196_device::io_w8(UINT8 adr, UINT8 data)
return;
}
-void i8xc196_device::io_w16(UINT8 adr, UINT16 data)
+void i8xc196_device::io_w16(uint8_t adr, uint16_t data)
{
switch(adr) {
case 0:
@@ -47,7 +47,7 @@ void i8xc196_device::io_w16(UINT8 adr, UINT16 data)
return;
}
-UINT8 i8xc196_device::io_r8(UINT8 adr)
+uint8_t i8xc196_device::io_r8(uint8_t adr)
{
switch(adr) {
case 0x00:
@@ -55,16 +55,16 @@ UINT8 i8xc196_device::io_r8(UINT8 adr)
case 0x01:
return 0x00;
}
- UINT8 data = 0x00;
+ uint8_t data = 0x00;
logerror("%s: io_r8 %02x, %02x (%04x)\n", tag(), adr, data, PPC);
return data;
}
-UINT16 i8xc196_device::io_r16(UINT8 adr)
+uint16_t i8xc196_device::io_r16(uint8_t adr)
{
if(adr < 2)
return 0x0000;
- UINT16 data = 0x0000;
+ uint16_t data = 0x0000;
logerror("%s: io_r16 %02x, %04x (%04x)\n", tag(), adr, data, PPC);
return data;
}
diff --git a/src/devices/cpu/mcs96/i8xc196.h b/src/devices/cpu/mcs96/i8xc196.h
index 746224a39f7..eeaf580aa64 100644
--- a/src/devices/cpu/mcs96/i8xc196.h
+++ b/src/devices/cpu/mcs96/i8xc196.h
@@ -15,18 +15,18 @@
class i8xc196_device : public mcs96_device {
public:
- i8xc196_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ i8xc196_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
static const disasm_entry disasm_entries[0x100];
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
- virtual void io_w8(UINT8 adr, UINT8 data) override;
- virtual void io_w16(UINT8 adr, UINT16 data) override;
- virtual UINT8 io_r8(UINT8 adr) override;
- virtual UINT16 io_r16(UINT8 adr) override;
+ virtual void io_w8(uint8_t adr, uint8_t data) override;
+ virtual void io_w16(uint8_t adr, uint16_t data) override;
+ virtual uint8_t io_r8(uint8_t adr) override;
+ virtual uint16_t io_r16(uint8_t adr) override;
#define O(o) void o ## _196_full(); void o ## _196_partial()
diff --git a/src/devices/cpu/mcs96/mcs96.cpp b/src/devices/cpu/mcs96/mcs96.cpp
index 4e30df62c07..1711caaec32 100644
--- a/src/devices/cpu/mcs96/mcs96.cpp
+++ b/src/devices/cpu/mcs96/mcs96.cpp
@@ -12,7 +12,7 @@
#include "debugger.h"
#include "mcs96.h"
-mcs96_device::mcs96_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int data_width, const char *shortname, const char *source) :
+mcs96_device::mcs96_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int data_width, const char *shortname, const char *source) :
cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
program_config("program", ENDIANNESS_LITTLE, data_width, 16), program(nullptr), direct(nullptr), icount(0), bcount(0), inst_state(0), cycles_scaling(0), pending_irq(0),
PC(0), PPC(0), PSW(0), OP1(0), OP2(0), OP3(0), OPI(0), TMP(0), irq_requested(false)
@@ -51,22 +51,22 @@ void mcs96_device::device_reset()
inst_state = STATE_FETCH;
}
-UINT32 mcs96_device::execute_min_cycles() const
+uint32_t mcs96_device::execute_min_cycles() const
{
return 4;
}
-UINT32 mcs96_device::execute_max_cycles() const
+uint32_t mcs96_device::execute_max_cycles() const
{
return 33;
}
-UINT32 mcs96_device::execute_input_lines() const
+uint32_t mcs96_device::execute_input_lines() const
{
return 1;
}
-void mcs96_device::recompute_bcount(UINT64 event_time)
+void mcs96_device::recompute_bcount(uint64_t event_time)
{
if(!event_time || event_time >= total_cycles() + icount) {
bcount = 0;
@@ -153,7 +153,7 @@ void mcs96_device::state_string_export(const device_state_entry &entry, std::str
}
}
-std::string mcs96_device::regname(UINT8 reg)
+std::string mcs96_device::regname(uint8_t reg)
{
char res[32];
switch(reg) {
@@ -172,7 +172,7 @@ std::string mcs96_device::regname(UINT8 reg)
return res;
}
-offs_t mcs96_device::disasm_generic(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options, const disasm_entry *entries)
+offs_t mcs96_device::disasm_generic(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options, const disasm_entry *entries)
{
bool prefix_fe = false;
int off = 0;
@@ -183,7 +183,7 @@ offs_t mcs96_device::disasm_generic(char *buffer, offs_t pc, const UINT8 *oprom,
oprom++;
}
const disasm_entry &e = entries[oprom[0]];
- UINT32 flags = e.flags | DASMFLAG_SUPPORTED;
+ uint32_t flags = e.flags | DASMFLAG_SUPPORTED;
buffer += sprintf(buffer, "%s", prefix_fe ? e.opcode_fe : e.opcode);
switch(e.mode) {
@@ -413,17 +413,17 @@ offs_t mcs96_device::disasm_generic(char *buffer, offs_t pc, const UINT8 *oprom,
return flags+off;
}
-UINT32 mcs96_device::disasm_min_opcode_bytes() const
+uint32_t mcs96_device::disasm_min_opcode_bytes() const
{
return 1;
}
-UINT32 mcs96_device::disasm_max_opcode_bytes() const
+uint32_t mcs96_device::disasm_max_opcode_bytes() const
{
return 7;
}
-void mcs96_device::io_w8(UINT8 adr, UINT8 data)
+void mcs96_device::io_w8(uint8_t adr, uint8_t data)
{
switch(adr) {
case 0x02:
@@ -478,7 +478,7 @@ void mcs96_device::io_w8(UINT8 adr, UINT8 data)
return;
}
-void mcs96_device::io_w16(UINT8 adr, UINT16 data)
+void mcs96_device::io_w16(uint8_t adr, uint16_t data)
{
switch(adr) {
case 0:
@@ -494,7 +494,7 @@ void mcs96_device::io_w16(UINT8 adr, UINT16 data)
return;
}
-UINT8 mcs96_device::io_r8(UINT8 adr)
+uint8_t mcs96_device::io_r8(uint8_t adr)
{
switch(adr) {
case 0x00:
@@ -504,26 +504,26 @@ UINT8 mcs96_device::io_r8(UINT8 adr)
case 0x08:
return PSW;
}
- UINT8 data = 0x00;
+ uint8_t data = 0x00;
logerror("%s: io_r8 %02x, %02x (%04x)\n", tag(), adr, data, PPC);
return data;
}
-UINT16 mcs96_device::io_r16(UINT8 adr)
+uint16_t mcs96_device::io_r16(uint8_t adr)
{
if(adr < 2)
return 0x0000;
- UINT16 data = 0x0000;
+ uint16_t data = 0x0000;
logerror("%s: io_r16 %02x, %04x (%04x)\n", tag(), adr, data, PPC);
return data;
}
-void mcs96_device::reg_w8(UINT8 adr, UINT8 data)
+void mcs96_device::reg_w8(uint8_t adr, uint8_t data)
{
if(adr < 0x18)
io_w8(adr, data);
else {
- UINT16 &r = R[(adr - 0x18) >> 1];
+ uint16_t &r = R[(adr - 0x18) >> 1];
if(adr & 0x01)
r = (r & 0x00ff) | (data << 8);
else
@@ -531,7 +531,7 @@ void mcs96_device::reg_w8(UINT8 adr, UINT8 data)
}
}
-void mcs96_device::reg_w16(UINT8 adr, UINT16 data)
+void mcs96_device::reg_w16(uint8_t adr, uint16_t data)
{
adr &= 0xfe;
if(adr < 0x18)
@@ -540,19 +540,19 @@ void mcs96_device::reg_w16(UINT8 adr, UINT16 data)
R[(adr-0x18) >> 1] = data;
}
-UINT8 mcs96_device::reg_r8(UINT8 adr)
+uint8_t mcs96_device::reg_r8(uint8_t adr)
{
if(adr < 0x18)
return io_r8(adr);
- UINT16 data = R[(adr - 0x18) >> 1];
+ uint16_t data = R[(adr - 0x18) >> 1];
if(adr & 0x01)
return data >> 8;
else
return data;
}
-UINT16 mcs96_device::reg_r16(UINT8 adr)
+uint16_t mcs96_device::reg_r16(uint8_t adr)
{
adr &= 0xfe;
if(adr < 0x18)
@@ -561,12 +561,12 @@ UINT16 mcs96_device::reg_r16(UINT8 adr)
return R[(adr-0x18) >> 1];
}
-void mcs96_device::any_w8(UINT16 adr, UINT8 data)
+void mcs96_device::any_w8(uint16_t adr, uint8_t data)
{
if(adr < 0x18)
io_w8(adr, data);
else if(adr < 0x100) {
- UINT16 &r = R[(adr - 0x18) >> 1];
+ uint16_t &r = R[(adr - 0x18) >> 1];
if(adr & 0x01)
r = (r & 0x00ff) | (data << 8);
else
@@ -575,7 +575,7 @@ void mcs96_device::any_w8(UINT16 adr, UINT8 data)
program->write_byte(adr, data);
}
-void mcs96_device::any_w16(UINT16 adr, UINT16 data)
+void mcs96_device::any_w16(uint16_t adr, uint16_t data)
{
adr &= 0xfffe;
if(adr < 0x18)
@@ -586,12 +586,12 @@ void mcs96_device::any_w16(UINT16 adr, UINT16 data)
program->write_word(adr, data);
}
-UINT8 mcs96_device::any_r8(UINT16 adr)
+uint8_t mcs96_device::any_r8(uint16_t adr)
{
if(adr < 0x18)
return io_r8(adr);
else if(adr < 0x100) {
- UINT16 data = R[(adr - 0x18) >> 1];
+ uint16_t data = R[(adr - 0x18) >> 1];
if(adr & 0x01)
return data >> 8;
else
@@ -600,7 +600,7 @@ UINT8 mcs96_device::any_r8(UINT16 adr)
return program->read_byte(adr);
}
-UINT16 mcs96_device::any_r16(UINT16 adr)
+uint16_t mcs96_device::any_r16(uint16_t adr)
{
adr &= 0xfffe;
if(adr < 0x18)
@@ -611,13 +611,13 @@ UINT16 mcs96_device::any_r16(UINT16 adr)
return program->read_word(adr);
}
-UINT8 mcs96_device::do_addb(UINT8 v1, UINT8 v2)
+uint8_t mcs96_device::do_addb(uint8_t v1, uint8_t v2)
{
- UINT16 sum = v1+v2;
+ uint16_t sum = v1+v2;
PSW &= ~(F_Z|F_N|F_C|F_V);
- if(!UINT8(sum))
+ if(!uint8_t(sum))
PSW |= F_Z;
- else if(INT8(sum) < 0)
+ else if(int8_t(sum) < 0)
PSW |= F_N;
if(~(v1^v2) & (v1^sum) & 0x80)
PSW |= F_V|F_VT;
@@ -626,13 +626,13 @@ UINT8 mcs96_device::do_addb(UINT8 v1, UINT8 v2)
return sum;
}
-UINT16 mcs96_device::do_add(UINT16 v1, UINT16 v2)
+uint16_t mcs96_device::do_add(uint16_t v1, uint16_t v2)
{
- UINT32 sum = v1+v2;
+ uint32_t sum = v1+v2;
PSW &= ~(F_Z|F_N|F_C|F_V);
- if(!UINT16(sum))
+ if(!uint16_t(sum))
PSW |= F_Z;
- else if(INT16(sum) < 0)
+ else if(int16_t(sum) < 0)
PSW |= F_N;
if(~(v1^v2) & (v1^sum) & 0x8000)
PSW |= F_V|F_VT;
@@ -641,13 +641,13 @@ UINT16 mcs96_device::do_add(UINT16 v1, UINT16 v2)
return sum;
}
-UINT8 mcs96_device::do_subb(UINT8 v1, UINT8 v2)
+uint8_t mcs96_device::do_subb(uint8_t v1, uint8_t v2)
{
- UINT16 diff = v1 - v2;
+ uint16_t diff = v1 - v2;
PSW &= ~(F_N|F_V|F_Z|F_C);
- if(!UINT8(diff))
+ if(!uint8_t(diff))
PSW |= F_Z;
- else if(INT8(diff) < 0)
+ else if(int8_t(diff) < 0)
PSW |= F_N;
if((v1^v2) & (v1^diff) & 0x80)
PSW |= F_V;
@@ -656,13 +656,13 @@ UINT8 mcs96_device::do_subb(UINT8 v1, UINT8 v2)
return diff;
}
-UINT16 mcs96_device::do_sub(UINT16 v1, UINT16 v2)
+uint16_t mcs96_device::do_sub(uint16_t v1, uint16_t v2)
{
- UINT32 diff = v1 - v2;
+ uint32_t diff = v1 - v2;
PSW &= ~(F_N|F_V|F_Z|F_C);
- if(!UINT16(diff))
+ if(!uint16_t(diff))
PSW |= F_Z;
- else if(INT16(diff) < 0)
+ else if(int16_t(diff) < 0)
PSW |= F_N;
if((v1^v2) & (v1^diff) & 0x8000)
PSW |= F_V;
@@ -671,13 +671,13 @@ UINT16 mcs96_device::do_sub(UINT16 v1, UINT16 v2)
return diff;
}
-UINT8 mcs96_device::do_addcb(UINT8 v1, UINT8 v2)
+uint8_t mcs96_device::do_addcb(uint8_t v1, uint8_t v2)
{
- UINT16 sum = v1+v2+(PSW & F_C ? 1 : 0);
+ uint16_t sum = v1+v2+(PSW & F_C ? 1 : 0);
PSW &= ~(F_Z|F_N|F_C|F_V);
- if(!UINT8(sum))
+ if(!uint8_t(sum))
PSW |= F_Z;
- else if(INT8(sum) < 0)
+ else if(int8_t(sum) < 0)
PSW |= F_N;
if(~(v1^v2) & (v1^sum) & 0x80)
PSW |= F_V|F_VT;
@@ -686,13 +686,13 @@ UINT8 mcs96_device::do_addcb(UINT8 v1, UINT8 v2)
return sum;
}
-UINT16 mcs96_device::do_addc(UINT16 v1, UINT16 v2)
+uint16_t mcs96_device::do_addc(uint16_t v1, uint16_t v2)
{
- UINT32 sum = v1+v2+(PSW & F_C ? 1 : 0);
+ uint32_t sum = v1+v2+(PSW & F_C ? 1 : 0);
PSW &= ~(F_Z|F_N|F_C|F_V);
- if(!UINT16(sum))
+ if(!uint16_t(sum))
PSW |= F_Z;
- else if(INT16(sum) < 0)
+ else if(int16_t(sum) < 0)
PSW |= F_N;
if(~(v1^v2) & (v1^sum) & 0x8000)
PSW |= F_V|F_VT;
@@ -701,13 +701,13 @@ UINT16 mcs96_device::do_addc(UINT16 v1, UINT16 v2)
return sum;
}
-UINT8 mcs96_device::do_subcb(UINT8 v1, UINT8 v2)
+uint8_t mcs96_device::do_subcb(uint8_t v1, uint8_t v2)
{
- UINT16 diff = v1 - v2 - (PSW & F_C ? 0 : 1);
+ uint16_t diff = v1 - v2 - (PSW & F_C ? 0 : 1);
PSW &= ~(F_N|F_V|F_Z|F_C);
- if(!UINT8(diff))
+ if(!uint8_t(diff))
PSW |= F_Z;
- else if(INT8(diff) < 0)
+ else if(int8_t(diff) < 0)
PSW |= F_N;
if((v1^v2) & (v1^diff) & 0x80)
PSW |= F_V;
@@ -716,13 +716,13 @@ UINT8 mcs96_device::do_subcb(UINT8 v1, UINT8 v2)
return diff;
}
-UINT16 mcs96_device::do_subc(UINT16 v1, UINT16 v2)
+uint16_t mcs96_device::do_subc(uint16_t v1, uint16_t v2)
{
- UINT32 diff = v1 - v2 - (PSW & F_C ? 0 : 1);
+ uint32_t diff = v1 - v2 - (PSW & F_C ? 0 : 1);
PSW &= ~(F_N|F_V|F_Z|F_C);
- if(!UINT16(diff))
+ if(!uint16_t(diff))
PSW |= F_Z;
- else if(INT16(diff) < 0)
+ else if(int16_t(diff) < 0)
PSW |= F_N;
if((v1^v2) & (v1^diff) & 0x8000)
PSW |= F_V;
@@ -731,21 +731,21 @@ UINT16 mcs96_device::do_subc(UINT16 v1, UINT16 v2)
return diff;
}
-void mcs96_device::set_nz8(UINT8 v)
+void mcs96_device::set_nz8(uint8_t v)
{
PSW &= ~(F_N|F_V|F_Z|F_C);
if(!v)
PSW |= F_Z;
- else if(INT8(v) < 0)
+ else if(int8_t(v) < 0)
PSW |= F_N;
}
-void mcs96_device::set_nz16(UINT16 v)
+void mcs96_device::set_nz16(uint16_t v)
{
PSW &= ~(F_N|F_V|F_Z|F_C);
if(!v)
PSW |= F_Z;
- else if(INT16(v) < 0)
+ else if(int16_t(v) < 0)
PSW |= F_N;
}
diff --git a/src/devices/cpu/mcs96/mcs96.h b/src/devices/cpu/mcs96/mcs96.h
index 0111361899c..2f372cdab5b 100644
--- a/src/devices/cpu/mcs96/mcs96.h
+++ b/src/devices/cpu/mcs96/mcs96.h
@@ -17,7 +17,7 @@ public:
EXINT_LINE = 1
};
- mcs96_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int data_width, const char *shortname, const char *source);
+ mcs96_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int data_width, const char *shortname, const char *source);
protected:
enum {
@@ -73,9 +73,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -88,61 +88,61 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_generic(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options, const disasm_entry *entries);
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_generic(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options, const disasm_entry *entries);
address_space_config program_config;
address_space *program;
direct_read_data *direct;
int icount, bcount, inst_state, cycles_scaling;
- UINT8 pending_irq;
- UINT16 PC, PPC, PSW;
- UINT16 OP1;
- UINT8 OP2, OP3, OPI;
- UINT32 TMP;
- UINT16 R[0x74];
+ uint8_t pending_irq;
+ uint16_t PC, PPC, PSW;
+ uint16_t OP1;
+ uint8_t OP2, OP3, OPI;
+ uint32_t TMP;
+ uint16_t R[0x74];
bool irq_requested;
virtual void do_exec_full() = 0;
virtual void do_exec_partial() = 0;
- virtual void internal_update(UINT64 current_time) = 0;
- virtual void io_w8(UINT8 adr, UINT8 data) = 0;
- virtual void io_w16(UINT8 adr, UINT16 data) = 0;
- virtual UINT8 io_r8(UINT8 adr) = 0;
- virtual UINT16 io_r16(UINT8 adr) = 0;
+ virtual void internal_update(uint64_t current_time) = 0;
+ virtual void io_w8(uint8_t adr, uint8_t data) = 0;
+ virtual void io_w16(uint8_t adr, uint16_t data) = 0;
+ virtual uint8_t io_r8(uint8_t adr) = 0;
+ virtual uint16_t io_r16(uint8_t adr) = 0;
- void recompute_bcount(UINT64 event_time);
- static std::string regname(UINT8 reg);
+ void recompute_bcount(uint64_t event_time);
+ static std::string regname(uint8_t reg);
inline void next(int cycles) { icount -= cycles_scaling*cycles; inst_state = STATE_FETCH; }
inline void next_noirq(int cycles) { icount -= cycles_scaling*cycles; inst_state = STATE_FETCH_NOIRQ; }
void check_irq();
- inline UINT8 read_pc() { return direct->read_byte(PC++); }
+ inline uint8_t read_pc() { return direct->read_byte(PC++); }
- void reg_w8(UINT8 adr, UINT8 data);
- void reg_w16(UINT8 adr, UINT16 data);
- void any_w8(UINT16 adr, UINT8 data);
- void any_w16(UINT16 adr, UINT16 data);
+ void reg_w8(uint8_t adr, uint8_t data);
+ void reg_w16(uint8_t adr, uint16_t data);
+ void any_w8(uint16_t adr, uint8_t data);
+ void any_w16(uint16_t adr, uint16_t data);
- UINT8 reg_r8(UINT8 adr);
- UINT16 reg_r16(UINT8 adr);
- UINT8 any_r8(UINT16 adr);
- UINT16 any_r16(UINT16 adr);
+ uint8_t reg_r8(uint8_t adr);
+ uint16_t reg_r16(uint8_t adr);
+ uint8_t any_r8(uint16_t adr);
+ uint16_t any_r16(uint16_t adr);
- UINT8 do_addb(UINT8 v1, UINT8 v2);
- UINT16 do_add(UINT16 v1, UINT16 v2);
- UINT8 do_subb(UINT8 v1, UINT8 v2);
- UINT16 do_sub(UINT16 v1, UINT16 v2);
+ uint8_t do_addb(uint8_t v1, uint8_t v2);
+ uint16_t do_add(uint16_t v1, uint16_t v2);
+ uint8_t do_subb(uint8_t v1, uint8_t v2);
+ uint16_t do_sub(uint16_t v1, uint16_t v2);
- UINT8 do_addcb(UINT8 v1, UINT8 v2);
- UINT16 do_addc(UINT16 v1, UINT16 v2);
- UINT8 do_subcb(UINT8 v1, UINT8 v2);
- UINT16 do_subc(UINT16 v1, UINT16 v2);
+ uint8_t do_addcb(uint8_t v1, uint8_t v2);
+ uint16_t do_addc(uint16_t v1, uint16_t v2);
+ uint8_t do_subcb(uint8_t v1, uint8_t v2);
+ uint16_t do_subc(uint16_t v1, uint16_t v2);
- void set_nz8(UINT8 v);
- void set_nz16(UINT16 v);
+ void set_nz8(uint8_t v);
+ void set_nz16(uint16_t v);
#define O(o) void o ## _full(); void o ## _partial()
diff --git a/src/devices/cpu/mcs96/mcs96ops.lst b/src/devices/cpu/mcs96/mcs96ops.lst
index 3c2516ae54a..062b70706bf 100644
--- a/src/devices/cpu/mcs96/mcs96ops.lst
+++ b/src/devices/cpu/mcs96/mcs96ops.lst
@@ -37,7 +37,7 @@ fetch_noirq
inst_state = OP1;
eadr rel8
- OP1 = INT8(read_pc());
+ OP1 = int8_t(read_pc());
eadr rel11
OP1 = read_pc();
@@ -51,11 +51,11 @@ eadr rel16
eadr rrel8
OP2 = read_pc();
- OP1 = INT8(read_pc());
+ OP1 = int8_t(read_pc());
eadr brrel8
OP2 = read_pc();
- OP1 = INT8(read_pc());
+ OP1 = int8_t(read_pc());
eadr direct_1
OP1 = read_pc();
@@ -134,7 +134,7 @@ eadr indexed_1
OPI &= 0xfe;
OP1 |= read_pc() << 8;
} else
- OP1 = INT8(OP1);
+ OP1 = int8_t(OP1);
if(OPI) {
OP1 += reg_r16(OPI);
}
@@ -196,7 +196,7 @@ macro post_indexed $cycles1 $cycles2
06 ext direct_1
OP1 &= 0xfc;
- TMP = INT16(reg_r16(OP1));
+ TMP = int16_t(reg_r16(OP1));
set_nz16(TMP);
reg_w16(OP1+2, TMP >> 16);
next(4);
@@ -216,10 +216,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 16 && (TMP & (0x0001 << (OP1-1))))
PSW |= F_C;
- TMP = UINT16(TMP) >> OP1;
+ TMP = uint16_t(TMP) >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT16(TMP) < 0)
+ else if(int16_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -234,10 +234,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 16 && (TMP & (0x8000 >> (OP1-1))))
PSW |= F_C;
- TMP = UINT16(TMP << OP1);
+ TMP = uint16_t(TMP << OP1);
if(!TMP)
PSW |= F_Z;
- else if(INT16(TMP) < 0)
+ else if(int16_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -252,10 +252,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 16 && (TMP & (0x0001 << (OP1-1))))
PSW |= F_C;
- TMP = INT16(TMP) >> OP1;
+ TMP = int16_t(TMP) >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT16(TMP) < 0)
+ else if(int16_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -275,7 +275,7 @@ macro post_indexed $cycles1 $cycles2
TMP = TMP >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT32(TMP) < 0)
+ else if(int32_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -296,7 +296,7 @@ macro post_indexed $cycles1 $cycles2
TMP = TMP << OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT32(TMP) < 0)
+ else if(int32_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -314,10 +314,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && (TMP & (0x00000001 << (OP1-1))))
PSW |= F_C;
- TMP = INT32(TMP) >> OP1;
+ TMP = int32_t(TMP) >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT32(TMP) < 0)
+ else if(int32_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -327,7 +327,7 @@ macro post_indexed $cycles1 $cycles2
OP2 &= 0xfc;
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2) << 16;
- for(OP3 = 0; OP3 < 31 && INT32(TMP) >= 0; OP3++);
+ for(OP3 = 0; OP3 < 31 && int32_t(TMP) >= 0; OP3++);
PSW &= ~(F_Z|F_N|F_C);
if(!TMP)
PSW |= F_Z;
@@ -360,7 +360,7 @@ macro post_indexed $cycles1 $cycles2
16 extb direct_1
OP1 &= 0xfe;
- TMP = INT8(reg_r8(OP1));
+ TMP = int8_t(reg_r8(OP1));
set_nz8(TMP);
reg_w16(OP1, TMP);
next(4);
@@ -380,10 +380,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 8 && (TMP & (0x01 << (OP1-1))))
PSW |= F_C;
- TMP = UINT8(TMP) >> OP1;
+ TMP = uint8_t(TMP) >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT8(TMP) < 0)
+ else if(int8_t(TMP) < 0)
PSW |= F_N;
reg_w8(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -398,10 +398,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 8 && (TMP & (0x80 >> (OP1-1))))
PSW |= F_C;
- TMP = UINT8(TMP << OP1);
+ TMP = uint8_t(TMP << OP1);
if(!TMP)
PSW |= F_Z;
- else if(INT8(TMP) < 0)
+ else if(int8_t(TMP) < 0)
PSW |= F_N;
reg_w8(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -416,10 +416,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 8 && (TMP & (0x01 << (OP1-1))))
PSW |= F_C;
- TMP = UINT8(INT8(TMP) >> OP1);
+ TMP = uint8_t(int8_t(TMP) >> OP1);
if(!TMP)
PSW |= F_Z;
- else if(INT8(TMP) < 0)
+ else if(int8_t(TMP) < 0)
PSW |= F_N;
reg_w8(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -560,14 +560,14 @@ macro post_indexed $cycles1 $cycles2
fe4c mul direct_3
TMP = reg_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
OP3 &= 0xfc;
reg_w16(OP3, TMP);
reg_w16(OP3+2, TMP >> 16);
next(30);
fe4d mul immed_3w
- TMP = INT16(OP1) * INT16(reg_r16(OP2));
+ TMP = int16_t(OP1) * int16_t(reg_r16(OP2));
OP3 &= 0xfc;
reg_w16(OP3, TMP);
reg_w16(OP3+2, TMP >> 16);
@@ -575,7 +575,7 @@ fe4d mul immed_3w
fe4e mul indirect_3
TMP = any_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
OP3 &= 0xfc;
reg_w16(OP3, TMP);
reg_w16(OP3+2, TMP >> 16);
@@ -583,7 +583,7 @@ fe4e mul indirect_3
fe4f mul indexed_3
TMP = any_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
OP3 &= 0xfc;
reg_w16(OP3, TMP);
reg_w16(OP3+2, TMP >> 16);
@@ -687,24 +687,24 @@ fe4f mul indexed_3
fe5c mulb direct_3
TMP = reg_r8(OP1);
- TMP = INT8(reg_r8(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r8(OP2)) * int8_t(TMP);
reg_w16(OP3, TMP);
next(22);
fe5d mulb immed_3b
- TMP = INT8(OP1) * INT8(reg_r8(OP2));
+ TMP = int8_t(OP1) * int8_t(reg_r8(OP2));
reg_w16(OP3, TMP);
next(22);
fe5e mulb indirect_3
TMP = any_r8(OP1);
- TMP = INT8(reg_r8(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r8(OP2)) * int8_t(TMP);
reg_w16(OP3, TMP);
post_indirect 1 24 25 // +5 when external
fe5f mulb indexed_3
TMP = any_r8(OP1);
- TMP = INT8(reg_r8(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r8(OP2)) * int8_t(TMP);
reg_w16(OP3, TMP);
post_indexed 24 25 // +5 when external
@@ -815,14 +815,14 @@ fe5f mulb indexed_3
fe6c mul direct_2
OP2 &= 0xfc;
TMP = reg_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
next(29);
fe6d mul immed_2w
OP2 &= 0xfc;
- TMP = INT16(OP1) * INT16(reg_r16(OP2));
+ TMP = int16_t(OP1) * int16_t(reg_r16(OP2));
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
next(30);
@@ -830,7 +830,7 @@ fe6d mul immed_2w
fe6e mul indirect_2
OP2 &= 0xfc;
TMP = any_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
post_indirect 2 31 32 // +5 when external
@@ -838,7 +838,7 @@ fe6e mul indirect_2
fe6f mul indexed_2
OP2 &= 0xfc;
TMP = any_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
post_indexed 31 32 // +5 when external
@@ -946,27 +946,27 @@ fe6f mul indexed_2
fe7c mulb direct_2
OP2 &= 0xfe;
TMP = reg_r8(OP1);
- TMP = INT8(reg_r16(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r16(OP2)) * int8_t(TMP);
reg_w16(OP2, TMP);
next(21);
fe7d mulb immed_2b
OP2 &= 0xfe;
- TMP = INT8(OP1) * INT8(reg_r8(OP2));
+ TMP = int8_t(OP1) * int8_t(reg_r8(OP2));
reg_w16(OP2, TMP);
next(21);
fe7e mulb indirect_2
OP2 &= 0xfe;
TMP = any_r8(OP1);
- TMP = INT8(reg_r8(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r8(OP2)) * int8_t(TMP);
reg_w16(OP2, TMP);
post_indirect 1 23 24 // +5 when external
fe7f mulb indexed_2
OP2 &= 0xfe;
TMP = any_r16(OP1);
- TMP = INT8(reg_r16(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r16(OP2)) * int8_t(TMP);
reg_w16(OP2, TMP);
post_indexed 23 24 // +5 when external
@@ -1050,7 +1050,7 @@ fe7f mulb indexed_2
if(OP1) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- UINT32 TMP2 = TMP / OP1;
+ uint32_t TMP2 = TMP / OP1;
if(TMP2 > 65535)
PSW |= F_V|F_VT;
TMP = TMP % OP1;
@@ -1066,7 +1066,7 @@ fe7f mulb indexed_2
if(OP1) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- UINT32 TMP2 = TMP / OP1;
+ uint32_t TMP2 = TMP / OP1;
if(TMP2 > 65535)
PSW |= F_V|F_VT;
TMP = TMP % OP1;
@@ -1079,11 +1079,11 @@ fe7f mulb indexed_2
8e divu indirect_2
OP2 &= 0xfc;
PSW &= ~F_V;
- UINT32 d = any_r16(OP1);
+ uint32_t d = any_r16(OP1);
if(d) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- UINT32 TMP2 = TMP / d;
+ uint32_t TMP2 = TMP / d;
if(TMP2 > 65535)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1096,11 +1096,11 @@ fe7f mulb indexed_2
8f divu indexed_2
OP2 &= 0xfc;
PSW &= ~F_V;
- UINT32 d = any_r16(OP1);
+ uint32_t d = any_r16(OP1);
if(d) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- UINT32 TMP2 = TMP / d;
+ uint32_t TMP2 = TMP / d;
if(TMP2 > 65535)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1117,10 +1117,10 @@ fe8c div direct_2
if(OP1) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- INT32 TMP2 = INT32(TMP) / INT16(OP1);
+ int32_t TMP2 = int32_t(TMP) / int16_t(OP1);
if(TMP2 > 32767 || TMP2 < -32768)
PSW |= F_V|F_VT;
- TMP = TMP % INT16(OP1);
+ TMP = TMP % int16_t(OP1);
TMP = (TMP2 & 0xffff) | ((TMP & 0xffff) << 16);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -1133,10 +1133,10 @@ fe8d div immed_2w
if(OP1) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- INT32 TMP2 = INT32(TMP) / INT16(OP1);
+ int32_t TMP2 = int32_t(TMP) / int16_t(OP1);
if(TMP2 > 32767 || TMP2 < -32768)
PSW |= F_V|F_VT;
- TMP = TMP % INT16(OP1);
+ TMP = TMP % int16_t(OP1);
TMP = (TMP2 & 0xffff) | ((TMP & 0xffff) << 16);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -1146,11 +1146,11 @@ fe8d div immed_2w
fe8e div indirect_2
OP2 &= 0xfc;
PSW &= ~F_V;
- INT32 d = INT16(any_r16(OP1));
+ int32_t d = int16_t(any_r16(OP1));
if(d) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- INT32 TMP2 = INT32(TMP) / d;
+ int32_t TMP2 = int32_t(TMP) / d;
if(TMP2 > 32767 || TMP2 < -32768)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1163,11 +1163,11 @@ fe8e div indirect_2
fe8f div indexed_2
OP2 &= 0xfc;
PSW &= ~F_V;
- INT32 d = INT16(any_r16(OP1));
+ int32_t d = int16_t(any_r16(OP1));
if(d) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- INT32 TMP2 = INT32(TMP) / d;
+ int32_t TMP2 = int32_t(TMP) / d;
if(TMP2 > 32767 || TMP2 < -32768)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1255,7 +1255,7 @@ fe8f div indexed_2
OP1 = reg_r8(OP1);
if(OP1) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = TMP / OP1;
+ uint32_t TMP2 = TMP / OP1;
if(TMP2 > 255)
PSW |= F_V|F_VT;
TMP = TMP % OP1;
@@ -1268,7 +1268,7 @@ fe8f div indexed_2
PSW &= ~F_V;
if(OP1) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = TMP / OP1;
+ uint32_t TMP2 = TMP / OP1;
if(TMP2 > 255)
PSW |= F_V|F_VT;
TMP = TMP % OP1;
@@ -1279,10 +1279,10 @@ fe8f div indexed_2
9e divub indirect_2
PSW &= ~F_V;
- UINT32 d = any_r8(OP1);
+ uint32_t d = any_r8(OP1);
if(d) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = TMP / d;
+ uint32_t TMP2 = TMP / d;
if(TMP2 > 255)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1293,10 +1293,10 @@ fe8f div indexed_2
9f divub indexed_2
PSW &= ~F_V;
- UINT32 d = any_r8(OP1);
+ uint32_t d = any_r8(OP1);
if(d) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = TMP / d;
+ uint32_t TMP2 = TMP / d;
if(TMP2 > 255)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1310,10 +1310,10 @@ fe9c divb direct_2
OP1 = reg_r8(OP1);
if(OP1) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = INT16(TMP) / INT8(OP1);
- if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
+ uint32_t TMP2 = int16_t(TMP) / int8_t(OP1);
+ if(int16_t(TMP2) > 127 || int16_t(TMP2) < -128)
PSW |= F_V|F_VT;
- TMP = INT16(TMP) % INT8(OP1);
+ TMP = int16_t(TMP) % int8_t(OP1);
TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
reg_w16(OP2, TMP);
}
@@ -1323,10 +1323,10 @@ fe9d divb immed_2b
PSW &= ~F_V;
if(OP1) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = INT16(TMP) / INT8(OP1);
- if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
+ uint32_t TMP2 = int16_t(TMP) / int8_t(OP1);
+ if(int16_t(TMP2) > 127 || int16_t(TMP2) < -128)
PSW |= F_V|F_VT;
- TMP = INT16(TMP) % INT8(OP1);
+ TMP = int16_t(TMP) % int8_t(OP1);
TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
reg_w16(OP2, TMP);
}
@@ -1334,13 +1334,13 @@ fe9d divb immed_2b
fe9e divb indirect_2
PSW &= ~F_V;
- INT32 d = INT8(any_r8(OP1));
+ int32_t d = int8_t(any_r8(OP1));
if(d) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = INT16(TMP) / d;
- if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
+ uint32_t TMP2 = int16_t(TMP) / d;
+ if(int16_t(TMP2) > 127 || int16_t(TMP2) < -128)
PSW |= F_V|F_VT;
- TMP = INT16(TMP) % d;
+ TMP = int16_t(TMP) % d;
TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
reg_w16(OP2, TMP);
}
@@ -1348,13 +1348,13 @@ fe9e divb indirect_2
fe9f divb indexed_2
PSW &= ~F_V;
- INT32 d = INT8(any_r8(OP1));
+ int32_t d = int8_t(any_r8(OP1));
if(d) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = INT16(TMP) / d;
- if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
+ uint32_t TMP2 = int16_t(TMP) / d;
+ if(int16_t(TMP2) > 127 || int16_t(TMP2) < -128)
PSW |= F_V|F_VT;
- TMP = INT16(TMP) % d;
+ TMP = int16_t(TMP) % d;
TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
reg_w16(OP2, TMP);
}
@@ -1423,19 +1423,19 @@ ab subc indexed_2
post_indexed 6 7 // +5 when external
ac ldbze direct_2
- reg_w16(OP2, UINT8(reg_r8(OP1)));
+ reg_w16(OP2, uint8_t(reg_r8(OP1)));
next(4);
ad ldbze immed_2b
- reg_w16(OP2, UINT8(OP1));
+ reg_w16(OP2, uint8_t(OP1));
next(4);
ae ldbze indirect_2
- reg_w16(OP2, UINT8(any_r8(OP1)));
+ reg_w16(OP2, uint8_t(any_r8(OP1)));
post_indirect 1 6 7 // +5 when external
af ldbze indexed_2
- reg_w16(OP2, UINT8(any_r8(OP1)));
+ reg_w16(OP2, uint8_t(any_r8(OP1)));
post_indexed 6 7 // +5 when external
b0 ldb direct_2
@@ -1501,19 +1501,19 @@ bb subcb indexed_2
post_indexed 6 7 // +5 when external
bc ldbse direct_2
- reg_w16(OP2, INT8(reg_r8(OP1)));
+ reg_w16(OP2, int8_t(reg_r8(OP1)));
next(4);
bd ldbse immed_2b
- reg_w16(OP2, INT8(OP1));
+ reg_w16(OP2, int8_t(OP1));
next(4);
be ldbse indirect_2
- reg_w16(OP2, INT8(any_r8(OP1)));
+ reg_w16(OP2, int8_t(any_r8(OP1)));
post_indirect 1 6 7 // +5 when external
bf ldbse indexed_2
- reg_w16(OP2, INT8(any_r8(OP1)));
+ reg_w16(OP2, int8_t(any_r8(OP1)));
post_indexed 6 7 // +5 when external
c0 st direct_2
@@ -1752,7 +1752,7 @@ df je rel8
e0 djnz rrel8
TMP = reg_r8(OP2);
- TMP = UINT8(TMP-1);
+ TMP = uint8_t(TMP-1);
reg_w8(OP2, TMP);
if(TMP) {
PC += OP1;
diff --git a/src/devices/cpu/melps4/m58846.cpp b/src/devices/cpu/melps4/m58846.cpp
index c109c28b446..b96f479fdd9 100644
--- a/src/devices/cpu/melps4/m58846.cpp
+++ b/src/devices/cpu/melps4/m58846.cpp
@@ -24,13 +24,13 @@ ADDRESS_MAP_END
// device definitions
-m58846_device::m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+m58846_device::m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: melps4_cpu_device(mconfig, M58846, "M58846", tag, owner, clock, 11, ADDRESS_MAP_NAME(program_2kx9), 7, ADDRESS_MAP_NAME(data_128x4), 12 /* number of D pins */, 2 /* subroutine page */, 1 /* interrupt page */, "m58846", __FILE__), m_timer(nullptr)
{ }
// disasm
-offs_t m58846_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t m58846_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(m58846);
return CPU_DISASSEMBLE_NAME(m58846)(this, buffer, pc, oprom, opram, options);
@@ -99,7 +99,7 @@ void m58846_device::device_timer(emu_timer &timer, device_timer_id id, int param
reset_timer();
}
-void m58846_device::write_v(UINT8 data)
+void m58846_device::write_v(uint8_t data)
{
// d0: enable timer 1 irq
// d1: enable timer 2 irq? (TODO)
diff --git a/src/devices/cpu/melps4/m58846.h b/src/devices/cpu/melps4/m58846.h
index 9d56cf9e216..0e754b1eafb 100644
--- a/src/devices/cpu/melps4/m58846.h
+++ b/src/devices/cpu/melps4/m58846.h
@@ -17,7 +17,7 @@
class m58846_device : public melps4_cpu_device
{
public:
- m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -28,11 +28,11 @@ protected:
virtual void execute_one() override;
// device_disasm_interface overrides
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// timers
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
- virtual void write_v(UINT8 data) override;
+ virtual void write_v(uint8_t data) override;
emu_timer *m_timer;
void reset_timer();
diff --git a/src/devices/cpu/melps4/melps4.cpp b/src/devices/cpu/melps4/melps4.cpp
index a3f204e3ada..d1cd36cda32 100644
--- a/src/devices/cpu/melps4/melps4.cpp
+++ b/src/devices/cpu/melps4/melps4.cpp
@@ -247,7 +247,7 @@ void melps4_cpu_device::device_reset()
// i/o handling
//-------------------------------------------------
-UINT8 melps4_cpu_device::read_gen_port(int port)
+uint8_t melps4_cpu_device::read_gen_port(int port)
{
// input generic port
switch (port)
@@ -264,7 +264,7 @@ UINT8 melps4_cpu_device::read_gen_port(int port)
return 0;
}
-void melps4_cpu_device::write_gen_port(int port, UINT8 data)
+void melps4_cpu_device::write_gen_port(int port, uint8_t data)
{
// output generic port
switch (port)
@@ -293,7 +293,7 @@ int melps4_cpu_device::read_d_pin(int bit)
{
// read port D, return state of selected pin
bit &= 0xf;
- UINT16 d = (m_port_d | m_read_d(bit, 0xffff)) & m_d_mask;
+ uint16_t d = (m_port_d | m_read_d(bit, 0xffff)) & m_d_mask;
return d >> bit & 1;
}
diff --git a/src/devices/cpu/melps4/melps4.h b/src/devices/cpu/melps4/melps4.h
index b0aa67fd6d4..d7668d35fb6 100644
--- a/src/devices/cpu/melps4/melps4.h
+++ b/src/devices/cpu/melps4/melps4.h
@@ -101,7 +101,7 @@ class melps4_cpu_device : public cpu_device
{
public:
// construction/destruction
- melps4_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, UINT8 sm_page, UINT8 int_page, const char *shortname, const char *source)
+ melps4_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, uint8_t sm_page, uint8_t int_page, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 16, prgwidth, -1, program)
, m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data)
@@ -145,11 +145,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 6 - 1) / 6; } // 6 t-states per machine cycle
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 6); } // "
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1+1; } // max opcode cycles + interrupt duration
- virtual UINT32 execute_input_lines() const override { return 3; } // up to 3 (some internal)
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 6 - 1) / 6; } // 6 t-states per machine cycle
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 6); } // "
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1+1; } // max opcode cycles + interrupt duration
+ virtual uint32_t execute_input_lines() const override { return 3; } // up to 3 (some internal)
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
virtual void execute_one();
@@ -158,8 +158,8 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : nullptr); }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
address_space_config m_program_config;
@@ -177,32 +177,32 @@ protected:
int m_d_pins; // number of D port pins and bitmask: 11 on '40,'41,'42,'44, 8 on '43, 12 on '45,'46, 16 on '47
int m_d_mask; // "
- UINT8 m_sm_page; // subroutine default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
- UINT8 m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
- UINT8 m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
- UINT16 m_sp_mask; // SP opcode location(middle 4 bits): 7 on '40 to '46, 3 on '47
- UINT16 m_ba_op; // BA opcode location: 1 on '40 to '46, N/A on '47
- UINT8 m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42
+ uint8_t m_sm_page; // subroutine default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
+ uint8_t m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
+ uint8_t m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
+ uint16_t m_sp_mask; // SP opcode location(middle 4 bits): 7 on '40 to '46, 3 on '47
+ uint16_t m_ba_op; // BA opcode location: 1 on '40 to '46, N/A on '47
+ uint8_t m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42
// internal state, misc regs
- UINT16 m_pc; // program counter (11 or 10-bit)
- UINT16 m_prev_pc;
- UINT16 m_stack[12]; // callstack (SK0-SKx, same size as PC)
- UINT16 m_op;
- UINT16 m_prev_op;
- UINT8 m_bitmask; // opcode bit argument
-
- UINT16 m_port_d; // last written port data
- UINT8 m_port_s; // "
- UINT8 m_port_f; // "
- UINT8 m_port_t; // "
+ uint16_t m_pc; // program counter (11 or 10-bit)
+ uint16_t m_prev_pc;
+ uint16_t m_stack[12]; // callstack (SK0-SKx, same size as PC)
+ uint16_t m_op;
+ uint16_t m_prev_op;
+ uint8_t m_bitmask; // opcode bit argument
+
+ uint16_t m_port_d; // last written port data
+ uint8_t m_port_s; // "
+ uint8_t m_port_f; // "
+ uint8_t m_port_t; // "
bool m_sm, m_sms; // subroutine mode flag + irq stack
bool m_ba_flag; // temp flag indicates BA opcode was executed
- UINT8 m_sp_param; // temp register holding SP opcode parameter
- UINT8 m_cps; // DP,CY or DP',CY' selected
+ uint8_t m_sp_param; // temp register holding SP opcode parameter
+ uint8_t m_cps; // DP,CY or DP',CY' selected
bool m_skip; // skip next opcode
- UINT8 m_inte; // interrupt enable flag
+ uint8_t m_inte; // interrupt enable flag
int m_intp; // external interrupt polarity ('40 to '44)
bool m_irqflag[3]; // irq flags: exf, 1f, 2f (external, timer 1, timer 2)
int m_int_state; // INT pin state
@@ -210,24 +210,24 @@ protected:
bool m_prohibit_irq; // interrupt is prohibited during certain opcodes
bool m_possible_irq; // indicate that irq needs to be rechecked
- UINT8 m_tmr_count[2]; // timer active count
- UINT8 m_tmr_reload; // timer(2) auto reload
+ uint8_t m_tmr_count[2]; // timer active count
+ uint8_t m_tmr_reload; // timer(2) auto reload
bool m_tmr_irq_enabled[2];
// work registers (unless specified, each is 4-bit)
- UINT8 m_a; // accumulator
- UINT8 m_b; // generic
- UINT8 m_e; // 8-bit register, hold data for S output
- UINT8 m_y, m_y2; // RAM index Y, Y' (Z.XX.YYYY is DP aka Data Pointer)
- UINT8 m_x, m_x2; // RAM index X, X', 2-bit
- UINT8 m_z, m_z2; // RAM index Z, Z', 1-bit, optional
- UINT8 m_cy, m_cy2; // carry flag(s)
-
- UINT8 m_h; // A/D converter H or generic
- UINT8 m_l; // A/D converter L or generic
- UINT8 m_c; // A/D converter counter
- UINT8 m_v; // timer control V
- UINT8 m_w; // timer control W
+ uint8_t m_a; // accumulator
+ uint8_t m_b; // generic
+ uint8_t m_e; // 8-bit register, hold data for S output
+ uint8_t m_y, m_y2; // RAM index Y, Y' (Z.XX.YYYY is DP aka Data Pointer)
+ uint8_t m_x, m_x2; // RAM index X, X', 2-bit
+ uint8_t m_z, m_z2; // RAM index Z, Z', 1-bit, optional
+ uint8_t m_cy, m_cy2; // carry flag(s)
+
+ uint8_t m_h; // A/D converter H or generic
+ uint8_t m_l; // A/D converter L or generic
+ uint8_t m_c; // A/D converter counter
+ uint8_t m_v; // timer control V
+ uint8_t m_w; // timer control W
// i/o handlers
devcb_read16 m_read_k;
@@ -243,19 +243,19 @@ protected:
devcb_write_line m_write_t;
virtual void write_t_in(int state) { m_t_in_state = state; }
- virtual void write_v(UINT8 data) { m_v = data; }
- virtual void write_w(UINT8 data) { m_w = data; }
+ virtual void write_v(uint8_t data) { m_v = data; }
+ virtual void write_w(uint8_t data) { m_w = data; }
virtual void do_interrupt(int which);
virtual void check_interrupt();
- UINT8 read_gen_port(int port);
- void write_gen_port(int port, UINT8 data);
+ uint8_t read_gen_port(int port);
+ void write_gen_port(int port, uint8_t data);
int read_d_pin(int bit);
void write_d_pin(int bit, int state);
// misc internal helpers
- UINT8 ram_r();
- void ram_w(UINT8 data);
+ uint8_t ram_r();
+ void ram_w(uint8_t data);
void pop_pc();
void push_pc();
diff --git a/src/devices/cpu/melps4/melps4d.cpp b/src/devices/cpu/melps4/melps4d.cpp
index 4c2ca2fd9d4..5d6981ec25e 100644
--- a/src/devices/cpu/melps4/melps4d.cpp
+++ b/src/devices/cpu/melps4/melps4d.cpp
@@ -46,7 +46,7 @@ static const char *const em_name[] =
};
// number of bits per opcode parameter
-static const UINT8 em_bits[] =
+static const uint8_t em_bits[] =
{
0,
0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -64,7 +64,7 @@ static const UINT8 em_bits[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 em_flags[] =
+static const uint32_t em_flags[] =
{
0,
0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -83,7 +83,7 @@ static const UINT32 em_flags[] =
// M58846 disasm
-static const UINT8 m58846_opmap[0xc0] =
+static const uint8_t m58846_opmap[0xc0] =
{
// 0 1 2 3 4 5 6 7 8 9 A B C D E F
em_NOP, em_BA, em_INY, em_DEY, em_DI, em_EI, em_RU, em_SU, 0, em_TABE, em_AM, em_OSE, em_TYA, 0, 0, em_CMA, // 0x
@@ -102,11 +102,11 @@ static const UINT8 m58846_opmap[0xc0] =
CPU_DISASSEMBLE(m58846)
{
- UINT16 op = (oprom[0] | oprom[1] << 8) & 0x1ff;
+ uint16_t op = (oprom[0] | oprom[1] << 8) & 0x1ff;
char *dst = buffer;
// get opcode
- UINT8 instr;
+ uint8_t instr;
if (op >= 0x180)
instr = em_B;
else if (op >= 0x100)
@@ -119,18 +119,18 @@ CPU_DISASSEMBLE(m58846)
dst += sprintf(dst, "%-6s", em_name[instr]);
// get immediate param
- UINT8 bits = em_bits[instr];
+ uint8_t bits = em_bits[instr];
// special case for LXY x,y
if (instr == em_LXY)
{
- UINT8 x = op >> 4 & 3;
- UINT8 y = op & 0xf;
+ uint8_t x = op >> 4 & 3;
+ uint8_t y = op & 0xf;
dst += sprintf(dst, " %d,%d", x, y);
}
else if (bits > 0)
{
- UINT8 param = op & ((1 << bits) - 1);
+ uint8_t param = op & ((1 << bits) - 1);
if (bits > 4)
dst += sprintf(dst, " $%02X", param);
else
diff --git a/src/devices/cpu/melps4/melps4op.cpp b/src/devices/cpu/melps4/melps4op.cpp
index 4f77764a66b..44d17ae2d4c 100644
--- a/src/devices/cpu/melps4/melps4op.cpp
+++ b/src/devices/cpu/melps4/melps4op.cpp
@@ -8,15 +8,15 @@
// internal helpers
-inline UINT8 melps4_cpu_device::ram_r()
+inline uint8_t melps4_cpu_device::ram_r()
{
- UINT8 address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
+ uint8_t address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
return m_data->read_byte(address) & 0xf;
}
-inline void melps4_cpu_device::ram_w(UINT8 data)
+inline void melps4_cpu_device::ram_w(uint8_t data)
{
- UINT8 address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
+ uint8_t address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
m_data->write_byte(address, data & 0xf);
}
@@ -134,7 +134,7 @@ void melps4_cpu_device::op_lcps()
m_cps = m_op & 1;
// swap registers
- UINT8 x, y, z, cy;
+ uint8_t x, y, z, cy;
x = m_x;
y = m_y;
z = m_z;
@@ -171,7 +171,7 @@ void melps4_cpu_device::op_tam()
void melps4_cpu_device::op_xam()
{
// XAM j: exchange RAM with A, xor X with j
- UINT8 a = m_a;
+ uint8_t a = m_a;
m_a = ram_r();
ram_w(a);
m_x ^= m_op & 3;
@@ -227,7 +227,7 @@ void melps4_cpu_device::op_amcs()
void melps4_cpu_device::op_a()
{
// A n: add immediate to A, skip next on no carry (except when n=6)
- UINT8 n = m_op & 0xf;
+ uint8_t n = m_op & 0xf;
m_a += n;
m_skip = !(m_a & 0x10 || n == 6);
m_a &= 0xf;
@@ -260,7 +260,7 @@ void melps4_cpu_device::op_cma()
void melps4_cpu_device::op_rl()
{
// RL(undocumented): rotate A left through carry
- UINT8 c = m_a >> 3 & 1;
+ uint8_t c = m_a >> 3 & 1;
m_a = (m_a << 1 | m_cy) & 0xf;
m_cy = c;
}
@@ -268,7 +268,7 @@ void melps4_cpu_device::op_rl()
void melps4_cpu_device::op_rr()
{
// RR(undocumented): rotate A right through carry
- UINT8 c = m_a & 1;
+ uint8_t c = m_a & 1;
m_a = m_a >> 1 | m_cy << 3;
m_cy = c;
}
@@ -333,7 +333,7 @@ void melps4_cpu_device::op_taj()
void melps4_cpu_device::op_xal()
{
// XAL: exchange A with L
- UINT8 a = m_a;
+ uint8_t a = m_a;
m_a = m_l;
m_l = a;
}
@@ -341,7 +341,7 @@ void melps4_cpu_device::op_xal()
void melps4_cpu_device::op_xah()
{
// XAH: exchange A with H
- UINT8 a = m_a;
+ uint8_t a = m_a;
m_a = m_h;
m_h = a;
}
@@ -362,7 +362,7 @@ void melps4_cpu_device::op_dec()
void melps4_cpu_device::op_shl()
{
// SHL: set bit in L or H designated by C
- UINT8 mask = 1 << (m_c & 3);
+ uint8_t mask = 1 << (m_c & 3);
if (m_c & 4)
m_h |= mask;
else
@@ -372,7 +372,7 @@ void melps4_cpu_device::op_shl()
void melps4_cpu_device::op_rhl()
{
// RHL: reset bit in L or H designated by C
- UINT8 mask = 1 << (m_c & 3);
+ uint8_t mask = 1 << (m_c & 3);
if (m_c & 4)
m_h &= ~mask;
else
@@ -498,7 +498,7 @@ void melps4_cpu_device::op_b()
// - short call: subroutine page
// - short jump: current page, or sub. page + 1 when in sub. mode
// - long jump/call(B/BM preceded by SP): temp SP register
- UINT8 page = m_pc >> 7;
+ uint8_t page = m_pc >> 7;
if ((m_prev_op & ~0xf) == m_sp_mask)
{
m_sm = false;
diff --git a/src/devices/cpu/minx/minx.cpp b/src/devices/cpu/minx/minx.cpp
index f5bcc222d1d..4ec4a344371 100644
--- a/src/devices/cpu/minx/minx.cpp
+++ b/src/devices/cpu/minx/minx.cpp
@@ -75,20 +75,20 @@ TODO:
const device_type MINX = &device_creator<minx_cpu_device>;
-minx_cpu_device::minx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+minx_cpu_device::minx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, MINX, "Nintendo Minx", tag, owner, clock, "minx", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 24, 0)
{
}
-UINT16 minx_cpu_device::rd16( UINT32 offset )
+uint16_t minx_cpu_device::rd16( uint32_t offset )
{
return RD( offset ) | ( RD( offset + 1 ) << 8 );
}
-void minx_cpu_device::wr16( UINT32 offset, UINT16 data )
+void minx_cpu_device::wr16( uint32_t offset, uint16_t data )
{
WR( offset, ( data & 0x00FF ) );
WR( offset + 1, ( data >> 8 ) );
@@ -156,17 +156,17 @@ void minx_cpu_device::device_reset()
}
-UINT8 minx_cpu_device::rdop()
+uint8_t minx_cpu_device::rdop()
{
- UINT8 op = RD( GET_MINX_PC );
+ uint8_t op = RD( GET_MINX_PC );
m_PC++;
return op;
}
-UINT16 minx_cpu_device::rdop16()
+uint16_t minx_cpu_device::rdop16()
{
- UINT16 op = rdop();
+ uint16_t op = rdop();
op = op | ( rdop() << 8 );
return op;
}
@@ -228,7 +228,7 @@ void minx_cpu_device::execute_set_input(int inputnum, int state)
}
-offs_t minx_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t minx_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( minx );
return CPU_DISASSEMBLE_NAME(minx)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/minx/minx.h b/src/devices/cpu/minx/minx.h
index a31db6ab7a0..ca0c18692ff 100644
--- a/src/devices/cpu/minx/minx.h
+++ b/src/devices/cpu/minx/minx.h
@@ -18,7 +18,7 @@ class minx_cpu_device : public cpu_device
{
public:
// construction/destruction
- minx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ minx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -26,9 +26,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 4; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 4; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -39,70 +39,70 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 5; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 5; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
- UINT16 m_PC;
- UINT16 m_SP;
- UINT16 m_BA;
- UINT16 m_HL;
- UINT16 m_X;
- UINT16 m_Y;
- UINT8 m_U;
- UINT8 m_V;
- UINT8 m_F;
- UINT8 m_E;
- UINT8 m_N;
- UINT8 m_I;
- UINT8 m_XI;
- UINT8 m_YI;
- UINT8 m_halted;
- UINT8 m_interrupt_pending;
+ uint16_t m_PC;
+ uint16_t m_SP;
+ uint16_t m_BA;
+ uint16_t m_HL;
+ uint16_t m_X;
+ uint16_t m_Y;
+ uint8_t m_U;
+ uint8_t m_V;
+ uint8_t m_F;
+ uint8_t m_E;
+ uint8_t m_N;
+ uint8_t m_I;
+ uint8_t m_XI;
+ uint8_t m_YI;
+ uint8_t m_halted;
+ uint8_t m_interrupt_pending;
address_space *m_program;
int m_icount;
// For debugger
- UINT32 m_curpc;
- UINT16 m_flags;
-
- UINT16 rd16( UINT32 offset );
- void wr16( UINT32 offset, UINT16 data );
- UINT8 rdop();
- UINT16 rdop16();
- UINT8 ADD8( UINT8 arg1, UINT8 arg2 );
- UINT16 ADD16( UINT16 arg1, UINT16 arg2 );
- UINT8 ADDC8( UINT8 arg1, UINT8 arg2 );
- UINT16 ADDC16( UINT16 arg1, UINT16 arg2 );
- UINT8 INC8( UINT8 arg );
- UINT16 INC16( UINT16 arg );
- UINT8 SUB8( UINT8 arg1, UINT8 arg2 );
- UINT16 SUB16( UINT16 arg1, UINT16 arg2 );
- UINT8 SUBC8( UINT8 arg1, UINT8 arg2 );
- UINT16 SUBC16( UINT16 arg1, UINT16 arg2 );
- UINT8 DEC8( UINT8 arg );
- UINT16 DEC16( UINT16 arg );
- UINT8 AND8( UINT8 arg1, UINT8 arg2 );
- UINT8 OR8( UINT8 arg1, UINT8 arg2 );
- UINT8 XOR8( UINT8 arg1, UINT8 arg2 );
- UINT8 NOT8( UINT8 arg );
- UINT8 NEG8( UINT8 arg );
- UINT8 SAL8( UINT8 arg );
- UINT8 SAR8( UINT8 arg );
- UINT8 SHL8( UINT8 arg );
- UINT8 SHR8( UINT8 arg );
- UINT8 ROLC8( UINT8 arg );
- UINT8 RORC8( UINT8 arg );
- UINT8 ROL8( UINT8 arg );
- UINT8 ROR8( UINT8 arg );
- void PUSH8( UINT8 arg );
- void PUSH16( UINT16 arg );
- UINT8 POP8();
- UINT16 POP16();
- void JMP( UINT16 arg );
- void CALL( UINT16 arg );
+ uint32_t m_curpc;
+ uint16_t m_flags;
+
+ uint16_t rd16( uint32_t offset );
+ void wr16( uint32_t offset, uint16_t data );
+ uint8_t rdop();
+ uint16_t rdop16();
+ uint8_t ADD8( uint8_t arg1, uint8_t arg2 );
+ uint16_t ADD16( uint16_t arg1, uint16_t arg2 );
+ uint8_t ADDC8( uint8_t arg1, uint8_t arg2 );
+ uint16_t ADDC16( uint16_t arg1, uint16_t arg2 );
+ uint8_t INC8( uint8_t arg );
+ uint16_t INC16( uint16_t arg );
+ uint8_t SUB8( uint8_t arg1, uint8_t arg2 );
+ uint16_t SUB16( uint16_t arg1, uint16_t arg2 );
+ uint8_t SUBC8( uint8_t arg1, uint8_t arg2 );
+ uint16_t SUBC16( uint16_t arg1, uint16_t arg2 );
+ uint8_t DEC8( uint8_t arg );
+ uint16_t DEC16( uint16_t arg );
+ uint8_t AND8( uint8_t arg1, uint8_t arg2 );
+ uint8_t OR8( uint8_t arg1, uint8_t arg2 );
+ uint8_t XOR8( uint8_t arg1, uint8_t arg2 );
+ uint8_t NOT8( uint8_t arg );
+ uint8_t NEG8( uint8_t arg );
+ uint8_t SAL8( uint8_t arg );
+ uint8_t SAR8( uint8_t arg );
+ uint8_t SHL8( uint8_t arg );
+ uint8_t SHR8( uint8_t arg );
+ uint8_t ROLC8( uint8_t arg );
+ uint8_t RORC8( uint8_t arg );
+ uint8_t ROL8( uint8_t arg );
+ uint8_t ROR8( uint8_t arg );
+ void PUSH8( uint8_t arg );
+ void PUSH16( uint16_t arg );
+ uint8_t POP8();
+ uint16_t POP16();
+ void JMP( uint16_t arg );
+ void CALL( uint16_t arg );
void execute_one();
void execute_one_ce();
diff --git a/src/devices/cpu/minx/minxd.cpp b/src/devices/cpu/minx/minxd.cpp
index 31f4a1f51d7..73001e9ec90 100644
--- a/src/devices/cpu/minx/minxd.cpp
+++ b/src/devices/cpu/minx/minxd.cpp
@@ -79,7 +79,7 @@ static const char *const s_mnemonic[] = {
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] = {
+static const uint32_t s_flags[] = {
0, 0, 0, 0, 0, 0, _OVER, _OVER, _OVER, _OVER, _OVER,
_OVER, _OVER, _OVER, _OVER, _OVER, _OVER, _OVER, _OVER,
_OVER, _OVER, _OVER, _OVER, _OVER, _OVER, _OVER, _OVER,
@@ -94,9 +94,9 @@ static const UINT32 s_flags[] = {
};
struct minxdasm {
- UINT8 mnemonic;
- UINT8 argument1;
- UINT8 argument2;
+ uint8_t mnemonic;
+ uint8_t argument1;
+ uint8_t argument2;
};
static const minxdasm mnemonic[256] = {
@@ -423,9 +423,9 @@ case OP1: dst += sprintf( dst, "%c$%02X", fill, op1 ); break;
CPU_DISASSEMBLE( minx )
{
const minxdasm *instr;
- UINT8 op, op1;
- INT8 ofs8;
- UINT16 ea;
+ uint8_t op, op1;
+ int8_t ofs8;
+ uint16_t ea;
int pos = 0;
char *dst = buffer;
diff --git a/src/devices/cpu/minx/minxfunc.h b/src/devices/cpu/minx/minxfunc.h
index 45478bc6667..adcc2d93641 100644
--- a/src/devices/cpu/minx/minxfunc.h
+++ b/src/devices/cpu/minx/minxfunc.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Wilbert Pol
-UINT8 minx_cpu_device::ADD8( UINT8 arg1, UINT8 arg2 )
+uint8_t minx_cpu_device::ADD8( uint8_t arg1, uint8_t arg2 )
{
- UINT32 res = arg1 + arg2;
+ uint32_t res = arg1 + arg2;
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ^ 0x80 ) & ( arg2 ^ res ) & 0x80 ) ? FLAG_O : 0 )
@@ -13,9 +13,9 @@ UINT8 minx_cpu_device::ADD8( UINT8 arg1, UINT8 arg2 )
}
-UINT16 minx_cpu_device::ADD16( UINT16 arg1, UINT16 arg2 )
+uint16_t minx_cpu_device::ADD16( uint16_t arg1, uint16_t arg2 )
{
- UINT32 res = arg1 + arg2;
+ uint32_t res = arg1 + arg2;
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x8000 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ^ 0x8000 ) & ( arg2 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
@@ -26,9 +26,9 @@ UINT16 minx_cpu_device::ADD16( UINT16 arg1, UINT16 arg2 )
}
-UINT8 minx_cpu_device::ADDC8( UINT8 arg1, UINT8 arg2 )
+uint8_t minx_cpu_device::ADDC8( uint8_t arg1, uint8_t arg2 )
{
- UINT32 res = arg1 + arg2 + ( ( m_F & FLAG_C ) ? 1 : 0 );
+ uint32_t res = arg1 + arg2 + ( ( m_F & FLAG_C ) ? 1 : 0 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ^ 0x80 ) & ( arg2 ^ res ) & 0x80 ) ? FLAG_O : 0 )
@@ -39,9 +39,9 @@ UINT8 minx_cpu_device::ADDC8( UINT8 arg1, UINT8 arg2 )
}
-UINT16 minx_cpu_device::ADDC16( UINT16 arg1, UINT16 arg2 )
+uint16_t minx_cpu_device::ADDC16( uint16_t arg1, uint16_t arg2 )
{
- UINT32 res = arg1 + arg2 + ( ( m_F & FLAG_C ) ? 1 : 0 );
+ uint32_t res = arg1 + arg2 + ( ( m_F & FLAG_C ) ? 1 : 0 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x8000 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ^ 0x8000 ) & ( arg2 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
@@ -52,10 +52,10 @@ UINT16 minx_cpu_device::ADDC16( UINT16 arg1, UINT16 arg2 )
}
-UINT8 minx_cpu_device::INC8( UINT8 arg )
+uint8_t minx_cpu_device::INC8( uint8_t arg )
{
- UINT8 old_F = m_F;
- UINT8 res = ADD8( arg, 1 );
+ uint8_t old_F = m_F;
+ uint8_t res = ADD8( arg, 1 );
m_F = ( old_F & ~ ( FLAG_Z ) )
| ( ( res ) ? 0 : FLAG_Z )
;
@@ -63,10 +63,10 @@ UINT8 minx_cpu_device::INC8( UINT8 arg )
}
-UINT16 minx_cpu_device::INC16( UINT16 arg )
+uint16_t minx_cpu_device::INC16( uint16_t arg )
{
- UINT8 old_F = m_F;
- UINT16 res = ADD16( arg, 1 );
+ uint8_t old_F = m_F;
+ uint16_t res = ADD16( arg, 1 );
m_F = ( old_F & ~ ( FLAG_Z ) )
| ( ( res ) ? 0 : FLAG_Z )
;
@@ -74,9 +74,9 @@ UINT16 minx_cpu_device::INC16( UINT16 arg )
}
-UINT8 minx_cpu_device::SUB8( UINT8 arg1, UINT8 arg2 )
+uint8_t minx_cpu_device::SUB8( uint8_t arg1, uint8_t arg2 )
{
- UINT32 res = arg1 - arg2;
+ uint32_t res = arg1 - arg2;
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x80 ) ? FLAG_O : 0 )
@@ -87,9 +87,9 @@ UINT8 minx_cpu_device::SUB8( UINT8 arg1, UINT8 arg2 )
}
-UINT16 minx_cpu_device::SUB16( UINT16 arg1, UINT16 arg2 )
+uint16_t minx_cpu_device::SUB16( uint16_t arg1, uint16_t arg2 )
{
- UINT32 res = arg1 - arg2;
+ uint32_t res = arg1 - arg2;
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x8000 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
@@ -100,9 +100,9 @@ UINT16 minx_cpu_device::SUB16( UINT16 arg1, UINT16 arg2 )
}
-UINT8 minx_cpu_device::SUBC8( UINT8 arg1, UINT8 arg2 )
+uint8_t minx_cpu_device::SUBC8( uint8_t arg1, uint8_t arg2 )
{
- UINT32 res = arg1 - arg2 - ( ( m_F & FLAG_C ) ? 1 : 0 );
+ uint32_t res = arg1 - arg2 - ( ( m_F & FLAG_C ) ? 1 : 0 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x80 ) ? FLAG_O : 0 )
@@ -113,9 +113,9 @@ UINT8 minx_cpu_device::SUBC8( UINT8 arg1, UINT8 arg2 )
}
-UINT16 minx_cpu_device::SUBC16( UINT16 arg1, UINT16 arg2 )
+uint16_t minx_cpu_device::SUBC16( uint16_t arg1, uint16_t arg2 )
{
- UINT32 res = arg1 - arg2 - ( ( m_F & FLAG_C ) ? 1 : 0 );
+ uint32_t res = arg1 - arg2 - ( ( m_F & FLAG_C ) ? 1 : 0 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x8000 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
@@ -126,10 +126,10 @@ UINT16 minx_cpu_device::SUBC16( UINT16 arg1, UINT16 arg2 )
}
-UINT8 minx_cpu_device::DEC8( UINT8 arg )
+uint8_t minx_cpu_device::DEC8( uint8_t arg )
{
- UINT8 old_F = m_F;
- UINT8 res = SUB8( arg, 1 );
+ uint8_t old_F = m_F;
+ uint8_t res = SUB8( arg, 1 );
m_F = ( old_F & ~ ( FLAG_Z ) )
| ( ( res ) ? 0 : FLAG_Z )
;
@@ -137,10 +137,10 @@ UINT8 minx_cpu_device::DEC8( UINT8 arg )
}
-UINT16 minx_cpu_device::DEC16( UINT16 arg )
+uint16_t minx_cpu_device::DEC16( uint16_t arg )
{
- UINT8 old_F = m_F;
- UINT16 res = SUB16( arg, 1 );
+ uint8_t old_F = m_F;
+ uint16_t res = SUB16( arg, 1 );
m_F = ( old_F & ~ ( FLAG_Z ) )
| ( ( res ) ? 0 : FLAG_Z )
;
@@ -148,9 +148,9 @@ UINT16 minx_cpu_device::DEC16( UINT16 arg )
}
-UINT8 minx_cpu_device::AND8( UINT8 arg1, UINT8 arg2 )
+uint8_t minx_cpu_device::AND8( uint8_t arg1, uint8_t arg2 )
{
- UINT8 res = arg1 & arg2;
+ uint8_t res = arg1 & arg2;
m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( res ) ? 0 : FLAG_Z )
@@ -159,9 +159,9 @@ UINT8 minx_cpu_device::AND8( UINT8 arg1, UINT8 arg2 )
}
-UINT8 minx_cpu_device::OR8( UINT8 arg1, UINT8 arg2 )
+uint8_t minx_cpu_device::OR8( uint8_t arg1, uint8_t arg2 )
{
- UINT8 res = arg1 | arg2;
+ uint8_t res = arg1 | arg2;
m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( res ) ? 0 : FLAG_Z )
@@ -170,9 +170,9 @@ UINT8 minx_cpu_device::OR8( UINT8 arg1, UINT8 arg2 )
}
-UINT8 minx_cpu_device::XOR8( UINT8 arg1, UINT8 arg2 )
+uint8_t minx_cpu_device::XOR8( uint8_t arg1, uint8_t arg2 )
{
- UINT8 res = arg1 ^ arg2;
+ uint8_t res = arg1 ^ arg2;
m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( res ) ? 0 : FLAG_Z )
@@ -181,9 +181,9 @@ UINT8 minx_cpu_device::XOR8( UINT8 arg1, UINT8 arg2 )
}
-UINT8 minx_cpu_device::NOT8( UINT8 arg )
+uint8_t minx_cpu_device::NOT8( uint8_t arg )
{
- UINT8 res = ~arg;
+ uint8_t res = ~arg;
m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( res ) ? 0 : FLAG_Z )
@@ -192,9 +192,9 @@ UINT8 minx_cpu_device::NOT8( UINT8 arg )
}
-UINT8 minx_cpu_device::NEG8( UINT8 arg )
+uint8_t minx_cpu_device::NEG8( uint8_t arg )
{
- UINT8 res = -arg;
+ uint8_t res = -arg;
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( res ) ? 0 : FLAG_Z )
@@ -203,9 +203,9 @@ UINT8 minx_cpu_device::NEG8( UINT8 arg )
}
-UINT8 minx_cpu_device::SAL8( UINT8 arg )
+uint8_t minx_cpu_device::SAL8( uint8_t arg )
{
- UINT16 res = arg << 1;
+ uint16_t res = arg << 1;
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( arg != 0 && res == 0 ) ? FLAG_O : 0 )
@@ -216,9 +216,9 @@ UINT8 minx_cpu_device::SAL8( UINT8 arg )
}
-UINT8 minx_cpu_device::SAR8( UINT8 arg )
+uint8_t minx_cpu_device::SAR8( uint8_t arg )
{
- UINT16 res = ( arg >> 1 ) | ( arg & 0x80 );
+ uint16_t res = ( arg >> 1 ) | ( arg & 0x80 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( arg != 0x80 && res == 0x80 ) ? FLAG_O : 0 )
@@ -229,9 +229,9 @@ UINT8 minx_cpu_device::SAR8( UINT8 arg )
}
-UINT8 minx_cpu_device::SHL8( UINT8 arg )
+uint8_t minx_cpu_device::SHL8( uint8_t arg )
{
- UINT16 res = arg << 1;
+ uint16_t res = arg << 1;
m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( arg & 0x80 ) ? FLAG_C : 0 )
@@ -241,9 +241,9 @@ UINT8 minx_cpu_device::SHL8( UINT8 arg )
}
-UINT8 minx_cpu_device::SHR8( UINT8 arg )
+uint8_t minx_cpu_device::SHR8( uint8_t arg )
{
- UINT16 res = arg >> 1;
+ uint16_t res = arg >> 1;
m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( arg & 0x01 ) ? FLAG_C : 0 )
@@ -253,9 +253,9 @@ UINT8 minx_cpu_device::SHR8( UINT8 arg )
}
-UINT8 minx_cpu_device::ROLC8( UINT8 arg )
+uint8_t minx_cpu_device::ROLC8( uint8_t arg )
{
- UINT16 res = ( arg << 1 ) | ( ( m_F & FLAG_C ) ? 1 : 0 );
+ uint16_t res = ( arg << 1 ) | ( ( m_F & FLAG_C ) ? 1 : 0 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( arg & 0x80 ) ? FLAG_C : 0 )
@@ -265,9 +265,9 @@ UINT8 minx_cpu_device::ROLC8( UINT8 arg )
}
-UINT8 minx_cpu_device::RORC8( UINT8 arg )
+uint8_t minx_cpu_device::RORC8( uint8_t arg )
{
- UINT16 res = ( arg >> 1 ) | ( ( m_F & FLAG_C ) ? 0x80 : 0 );
+ uint16_t res = ( arg >> 1 ) | ( ( m_F & FLAG_C ) ? 0x80 : 0 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( arg & 0x01 ) ? FLAG_C : 0 )
@@ -277,9 +277,9 @@ UINT8 minx_cpu_device::RORC8( UINT8 arg )
}
-UINT8 minx_cpu_device::ROL8( UINT8 arg )
+uint8_t minx_cpu_device::ROL8( uint8_t arg )
{
- UINT16 res = ( arg << 1 ) | ( ( arg & 0x80 ) ? 1 : 0 );
+ uint16_t res = ( arg << 1 ) | ( ( arg & 0x80 ) ? 1 : 0 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( arg & 0x80 ) ? FLAG_C : 0 )
@@ -289,9 +289,9 @@ UINT8 minx_cpu_device::ROL8( UINT8 arg )
}
-UINT8 minx_cpu_device::ROR8( UINT8 arg )
+uint8_t minx_cpu_device::ROR8( uint8_t arg )
{
- UINT16 res = ( arg >> 1 ) | ( ( arg & 0x01 ) ? 0x80 : 0 );
+ uint16_t res = ( arg >> 1 ) | ( ( arg & 0x01 ) ? 0x80 : 0 );
m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( arg & 0x01 ) ? FLAG_C : 0 )
@@ -301,42 +301,42 @@ UINT8 minx_cpu_device::ROR8( UINT8 arg )
}
-void minx_cpu_device::PUSH8( UINT8 arg )
+void minx_cpu_device::PUSH8( uint8_t arg )
{
m_SP = m_SP - 1;
WR( m_SP, arg );
}
-void minx_cpu_device::PUSH16( UINT16 arg )
+void minx_cpu_device::PUSH16( uint16_t arg )
{
PUSH8( arg >> 8 );
PUSH8( arg & 0x00FF );
}
-UINT8 minx_cpu_device::POP8()
+uint8_t minx_cpu_device::POP8()
{
- UINT8 res = RD( m_SP );
+ uint8_t res = RD( m_SP );
m_SP = m_SP + 1;
return res;
}
-UINT16 minx_cpu_device::POP16()
+uint16_t minx_cpu_device::POP16()
{
return POP8() | ( POP8() << 8 );
}
-void minx_cpu_device::JMP( UINT16 arg )
+void minx_cpu_device::JMP( uint16_t arg )
{
m_V = m_U;
m_PC = arg;
}
-void minx_cpu_device::CALL( UINT16 arg )
+void minx_cpu_device::CALL( uint16_t arg )
{
PUSH8( m_V );
PUSH16( m_PC );
@@ -344,21 +344,21 @@ void minx_cpu_device::CALL( UINT16 arg )
}
-#define AD1_IHL UINT32 addr1 = ( m_I << 16 ) | m_HL
-#define AD1_IN8 UINT32 addr1 = ( m_I << 16 ) | ( m_N << 8 ) | rdop()
-#define AD1_I16 UINT32 addr1 = ( m_I << 16 ) | rdop16()
-#define AD1_XIX UINT32 addr1 = ( m_XI << 16 ) | m_X
-#define AD1_YIY UINT32 addr1 = ( m_YI << 16 ) | m_Y
-#define AD1_X8 UINT32 addr1 = ( m_XI << 16 ) | ( m_X + rdop() )
-#define AD1_Y8 UINT32 addr1 = ( m_YI << 16 ) | ( m_Y + rdop() )
-#define AD1_XL UINT32 addr1 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
-#define AD1_YL UINT32 addr1 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )
-#define AD2_IHL UINT32 addr2 = ( m_I << 16 ) | m_HL
-#define AD2_IN8 UINT32 addr2 = ( m_I << 16 ) | ( m_N << 8 ) | rdop()
-#define AD2_I16 UINT32 addr2 = ( m_I << 16 ) | rdop(); addr2 |= ( rdop() << 8 )
-#define AD2_XIX UINT32 addr2 = ( m_XI << 16 ) | m_X
-#define AD2_YIY UINT32 addr2 = ( m_YI << 16 ) | m_Y
-#define AD2_X8 UINT32 addr2 = ( m_XI << 16 ) | ( m_X + rdop() )
-#define AD2_Y8 UINT32 addr2 = ( m_YI << 16 ) | ( m_Y + rdop() )
-#define AD2_XL UINT32 addr2 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
-#define AD2_YL UINT32 addr2 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )
+#define AD1_IHL uint32_t addr1 = ( m_I << 16 ) | m_HL
+#define AD1_IN8 uint32_t addr1 = ( m_I << 16 ) | ( m_N << 8 ) | rdop()
+#define AD1_I16 uint32_t addr1 = ( m_I << 16 ) | rdop16()
+#define AD1_XIX uint32_t addr1 = ( m_XI << 16 ) | m_X
+#define AD1_YIY uint32_t addr1 = ( m_YI << 16 ) | m_Y
+#define AD1_X8 uint32_t addr1 = ( m_XI << 16 ) | ( m_X + rdop() )
+#define AD1_Y8 uint32_t addr1 = ( m_YI << 16 ) | ( m_Y + rdop() )
+#define AD1_XL uint32_t addr1 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
+#define AD1_YL uint32_t addr1 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )
+#define AD2_IHL uint32_t addr2 = ( m_I << 16 ) | m_HL
+#define AD2_IN8 uint32_t addr2 = ( m_I << 16 ) | ( m_N << 8 ) | rdop()
+#define AD2_I16 uint32_t addr2 = ( m_I << 16 ) | rdop(); addr2 |= ( rdop() << 8 )
+#define AD2_XIX uint32_t addr2 = ( m_XI << 16 ) | m_X
+#define AD2_YIY uint32_t addr2 = ( m_YI << 16 ) | m_Y
+#define AD2_X8 uint32_t addr2 = ( m_XI << 16 ) | ( m_X + rdop() )
+#define AD2_Y8 uint32_t addr2 = ( m_YI << 16 ) | ( m_Y + rdop() )
+#define AD2_XL uint32_t addr2 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
+#define AD2_YL uint32_t addr2 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )
diff --git a/src/devices/cpu/minx/minxopce.h b/src/devices/cpu/minx/minxopce.h
index ec0198273e3..2d44decf802 100644
--- a/src/devices/cpu/minx/minxopce.h
+++ b/src/devices/cpu/minx/minxopce.h
@@ -3,7 +3,7 @@
void minx_cpu_device::execute_one_ce()
{
- const UINT8 opcode = rdop();
+ const uint8_t opcode = rdop();
switch (opcode)
{
@@ -469,70 +469,70 @@ void minx_cpu_device::execute_one_ce()
case 0xDF: { /* illegal operation? */ }
break;
- case 0xE0: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE0: { int8_t d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE1: { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE1: { int8_t d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE2: { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE2: { int8_t d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE3: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE3: { int8_t d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE4: { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE4: { int8_t d8 = rdop(); if ( ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE5: { int8_t d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE6: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE6: { int8_t d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE7: { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE7: { int8_t d8 = rdop(); if ( ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE8: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE8: { int8_t d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE9: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE9: { int8_t d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xEA: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xEA: { int8_t d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xEB: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xEB: { int8_t d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xEC: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xEC: { int8_t d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xED: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xED: { int8_t d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xEE: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xEE: { int8_t d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xEF: { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xEF: { int8_t d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xF0: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF0: { int8_t d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xF1: { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF1: { int8_t d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xF2: { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF2: { int8_t d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xF3: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { CALL( m_PC + d8 - 1 ); } }
+ case 0xF3: { int8_t d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { CALL( m_PC + d8 - 1 ); } }
break;
- case 0xF4: { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF4: { int8_t d8 = rdop(); if ( ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xF5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF5: { int8_t d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xF6: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF6: { int8_t d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xF7: { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF7: { int8_t d8 = rdop(); if ( ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xF8: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF8: { int8_t d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xF9: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xF9: { int8_t d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xFA: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xFA: { int8_t d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xFB: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xFB: { int8_t d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xFC: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xFC: { int8_t d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xFD: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xFD: { int8_t d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xFE: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xFE: { int8_t d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xFF: { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xFF: { int8_t d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
}
diff --git a/src/devices/cpu/minx/minxopcf.h b/src/devices/cpu/minx/minxopcf.h
index f81d991304a..adaf357784a 100644
--- a/src/devices/cpu/minx/minxopcf.h
+++ b/src/devices/cpu/minx/minxopcf.h
@@ -3,7 +3,7 @@
void minx_cpu_device::execute_one_cf()
{
- const UINT8 opcode = rdop();
+ const uint8_t opcode = rdop();
switch (opcode)
{
@@ -238,21 +238,21 @@ void minx_cpu_device::execute_one_cf()
case 0x6F: { /* illegal instruction? */ }
break;
- case 0x70: { UINT8 ofs8 = rdop(); m_BA = rd16( m_SP + ofs8 ); }
+ case 0x70: { uint8_t ofs8 = rdop(); m_BA = rd16( m_SP + ofs8 ); }
break;
- case 0x71: { UINT8 ofs8 = rdop(); m_HL = rd16( m_SP + ofs8 ); }
+ case 0x71: { uint8_t ofs8 = rdop(); m_HL = rd16( m_SP + ofs8 ); }
break;
- case 0x72: { UINT8 ofs8 = rdop(); m_X = rd16( m_SP + ofs8 ); }
+ case 0x72: { uint8_t ofs8 = rdop(); m_X = rd16( m_SP + ofs8 ); }
break;
- case 0x73: { UINT8 ofs8 = rdop(); m_Y = rd16( m_SP + ofs8 ); }
+ case 0x73: { uint8_t ofs8 = rdop(); m_Y = rd16( m_SP + ofs8 ); }
break;
- case 0x74: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_BA ); }
+ case 0x74: { uint8_t ofs8 = rdop(); wr16( m_SP + ofs8, m_BA ); }
break;
- case 0x75: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_HL ); }
+ case 0x75: { uint8_t ofs8 = rdop(); wr16( m_SP + ofs8, m_HL ); }
break;
- case 0x76: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_X ); }
+ case 0x76: { uint8_t ofs8 = rdop(); wr16( m_SP + ofs8, m_X ); }
break;
- case 0x77: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_Y ); }
+ case 0x77: { uint8_t ofs8 = rdop(); wr16( m_SP + ofs8, m_Y ); }
break;
case 0x78: { AD2_I16; m_SP = rd16( addr2 ); }
break;
diff --git a/src/devices/cpu/minx/minxops.h b/src/devices/cpu/minx/minxops.h
index b19e733deb2..9a5829d3841 100644
--- a/src/devices/cpu/minx/minxops.h
+++ b/src/devices/cpu/minx/minxops.h
@@ -3,7 +3,7 @@
void minx_cpu_device::execute_one()
{
- const UINT8 opcode = rdop();
+ const uint8_t opcode = rdop();
switch (opcode)
{
@@ -370,21 +370,21 @@ void minx_cpu_device::execute_one()
case 0xAF: { m_F = POP8(); }
break;
- case 0xB0: { UINT8 op = rdop(); m_BA = ( m_BA & 0xFF00 ) | op; }
+ case 0xB0: { uint8_t op = rdop(); m_BA = ( m_BA & 0xFF00 ) | op; }
break;
- case 0xB1: { UINT8 op = rdop(); m_BA = ( m_BA & 0x00FF ) | ( op << 8 ); }
+ case 0xB1: { uint8_t op = rdop(); m_BA = ( m_BA & 0x00FF ) | ( op << 8 ); }
break;
- case 0xB2: { UINT8 op = rdop(); m_HL = ( m_HL & 0xFF00 ) | op; }
+ case 0xB2: { uint8_t op = rdop(); m_HL = ( m_HL & 0xFF00 ) | op; }
break;
- case 0xB3: { UINT8 op = rdop(); m_HL = ( m_HL & 0x00FF ) | ( op << 8 ); }
+ case 0xB3: { uint8_t op = rdop(); m_HL = ( m_HL & 0x00FF ) | ( op << 8 ); }
break;
- case 0xB4: { UINT8 op = rdop(); m_N = op; }
+ case 0xB4: { uint8_t op = rdop(); m_N = op; }
break;
- case 0xB5: { AD1_IHL; UINT8 op = rdop(); WR( addr1, op); }
+ case 0xB5: { AD1_IHL; uint8_t op = rdop(); WR( addr1, op); }
break;
- case 0xB6: { AD1_XIX; UINT8 op = rdop(); WR( addr1, op ); }
+ case 0xB6: { AD1_XIX; uint8_t op = rdop(); WR( addr1, op ); }
break;
- case 0xB7: { AD1_YIY; UINT8 op = rdop(); WR( addr1, op ); }
+ case 0xB7: { AD1_YIY; uint8_t op = rdop(); WR( addr1, op ); }
break;
case 0xB8: { AD2_I16; m_BA = rd16( addr2 ); }
break;
@@ -419,17 +419,17 @@ void minx_cpu_device::execute_one()
break;
case 0xC7: { m_Y = rdop16(); }
break;
- case 0xC8: { UINT16 t = m_BA; m_BA = m_HL; m_HL = t; }
+ case 0xC8: { uint16_t t = m_BA; m_BA = m_HL; m_HL = t; }
break;
- case 0xC9: { UINT16 t = m_BA; m_BA = m_X; m_X = t; }
+ case 0xC9: { uint16_t t = m_BA; m_BA = m_X; m_X = t; }
break;
- case 0xCA: { UINT16 t = m_BA; m_BA = m_Y; m_Y = t; }
+ case 0xCA: { uint16_t t = m_BA; m_BA = m_Y; m_Y = t; }
break;
- case 0xCB: { UINT16 t = m_BA; m_BA = m_SP; m_SP = t; }
+ case 0xCB: { uint16_t t = m_BA; m_BA = m_SP; m_SP = t; }
break;
case 0xCC: { m_BA = ( m_BA >> 8 ) | ( ( m_BA & 0x00FF ) << 8 ); }
break;
- case 0xCD: { UINT8 t; AD2_IHL; t = RD( addr2 ); WR( addr2, ( m_BA & 0x00FF ) ); m_BA = ( m_BA & 0xFF00 ) | t; }
+ case 0xCD: { uint8_t t; AD2_IHL; t = RD( addr2 ); WR( addr2, ( m_BA & 0x00FF ) ); m_BA = ( m_BA & 0xFF00 ) | t; }
break;
case 0xCE: { execute_one_ce(); }
break;
@@ -469,54 +469,54 @@ void minx_cpu_device::execute_one()
case 0xDF: { m_BA = ( ( m_BA & 0x0080 ) ? 0xFF00 : 0x0000 ) | ( m_BA & 0x000F ); }
break;
- case 0xE0: { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xE0: { int8_t d8 = rdop(); if ( m_F & FLAG_C ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xE1: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d8- 1 ); m_icount -= 12; } }
+ case 0xE1: { int8_t d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d8- 1 ); m_icount -= 12; } }
break;
- case 0xE2: { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xE2: { int8_t d8 = rdop(); if ( m_F & FLAG_Z ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xE3: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ case 0xE3: { int8_t d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
break;
- case 0xE4: { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE4: { int8_t d8 = rdop(); if ( m_F & FLAG_C ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE5: { int8_t d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE6: { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE6: { int8_t d8 = rdop(); if ( m_F & FLAG_Z ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE7: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xE7: { int8_t d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d8 - 1 ); } }
break;
- case 0xE8: { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
+ case 0xE8: { uint16_t d16 = rdop16(); if ( m_F & FLAG_C ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
break;
- case 0xE9: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
+ case 0xE9: { uint16_t d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
break;
- case 0xEA: { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
+ case 0xEA: { uint16_t d16 = rdop16(); if ( m_F & FLAG_Z ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
break;
- case 0xEB: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
+ case 0xEB: { uint16_t d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
break;
- case 0xEC: { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { JMP( m_PC + d16 - 1 ); } }
+ case 0xEC: { uint16_t d16 = rdop16(); if ( m_F & FLAG_C ) { JMP( m_PC + d16 - 1 ); } }
break;
- case 0xED: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d16 - 1 ); } }
+ case 0xED: { uint16_t d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d16 - 1 ); } }
break;
- case 0xEE: { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { JMP( m_PC + d16 - 1 ); } }
+ case 0xEE: { uint16_t d16 = rdop16(); if ( m_F & FLAG_Z ) { JMP( m_PC + d16 - 1 ); } }
break;
- case 0xEF: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d16 - 1 ); } }
+ case 0xEF: { uint16_t d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d16 - 1 ); } }
break;
- case 0xF0: { INT8 d8 = rdop(); CALL( m_PC + d8 - 1 ); }
+ case 0xF0: { int8_t d8 = rdop(); CALL( m_PC + d8 - 1 ); }
break;
- case 0xF1: { INT8 d8 = rdop(); JMP( m_PC + d8 - 1 ); }
+ case 0xF1: { int8_t d8 = rdop(); JMP( m_PC + d8 - 1 ); }
break;
- case 0xF2: { UINT16 d16 = rdop16(); CALL( m_PC + d16 - 1 ); }
+ case 0xF2: { uint16_t d16 = rdop16(); CALL( m_PC + d16 - 1 ); }
break;
- case 0xF3: { UINT16 d16 = rdop16(); JMP( m_PC + d16 - 1 ); }
+ case 0xF3: { uint16_t d16 = rdop16(); JMP( m_PC + d16 - 1 ); }
break;
case 0xF4: { JMP( m_HL ); }
break;
- case 0xF5: { INT8 d8 = rdop(); m_BA = m_BA - 0x0100; if ( m_BA & 0xFF00 ) { JMP( m_PC + d8 - 1 ); } }
+ case 0xF5: { int8_t d8 = rdop(); m_BA = m_BA - 0x0100; if ( m_BA & 0xFF00 ) { JMP( m_PC + d8 - 1 ); } }
break;
case 0xF6: { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x00F0 ) >> 4 ) | ( ( m_BA & 0x000F ) << 4 ); }
break;
- case 0xF7: { UINT8 d; AD1_IHL; d = RD( addr1 ); WR( addr1, ( ( d & 0xF0 ) >> 4 ) | ( ( d & 0x0F ) << 4 ) ); }
+ case 0xF7: { uint8_t d; AD1_IHL; d = RD( addr1 ); WR( addr1, ( ( d & 0xF0 ) >> 4 ) | ( ( d & 0x0F ) << 4 ) ); }
break;
case 0xF8: { m_PC = POP16(); m_V = POP8(); m_U = m_V; }
break;
@@ -526,9 +526,9 @@ void minx_cpu_device::execute_one()
break;
case 0xFB: { AD1_I16; CALL( rd16( addr1 ) ); }
break;
- case 0xFC: { UINT8 i = rdop() & 0xFE; CALL( rd16( i ) ); PUSH8( m_F ); }
+ case 0xFC: { uint8_t i = rdop() & 0xFE; CALL( rd16( i ) ); PUSH8( m_F ); }
break;
- case 0xFD: { UINT8 i = rdop() & 0xFE; JMP( rd16( i ) ); /* PUSH8( m_F );?? */ }
+ case 0xFD: { uint8_t i = rdop() & 0xFE; JMP( rd16( i ) ); /* PUSH8( m_F );?? */ }
break;
case 0xFE: { /* illegal operation? */ }
break;
diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp
index d146b70863d..fd174f6dccb 100644
--- a/src/devices/cpu/mips/mips3.cpp
+++ b/src/devices/cpu/mips/mips3.cpp
@@ -20,9 +20,9 @@
HELPER MACROS
***************************************************************************/
-#define RSVAL32 ((UINT32)m_core->r[RSREG])
-#define RTVAL32 ((UINT32)m_core->r[RTREG])
-#define RDVAL32 ((UINT32)m_core->r[RDREG])
+#define RSVAL32 ((uint32_t)m_core->r[RSREG])
+#define RTVAL32 ((uint32_t)m_core->r[RTREG])
+#define RDVAL32 ((uint32_t)m_core->r[RDREG])
#define RSVAL64 (m_core->r[RSREG])
#define RTVAL64 (m_core->r[RTREG])
@@ -32,8 +32,8 @@
#define FTVALS_FR0 (((float *)&m_core->cpr[1][FTREG])[BYTE_XOR_LE(0)])
#define FSVALS_FR0 (((float *)&m_core->cpr[1][FSREG])[BYTE_XOR_LE(0)])
#define FDVALS_FR0 (((float *)&m_core->cpr[1][FDREG])[BYTE_XOR_LE(0)])
-#define FSVALW_FR0 (((UINT32 *)&m_core->cpr[1][FSREG])[BYTE_XOR_LE(0)])
-#define FDVALW_FR0 (((UINT32 *)&m_core->cpr[1][FDREG])[BYTE_XOR_LE(0)])
+#define FSVALW_FR0 (((uint32_t *)&m_core->cpr[1][FSREG])[BYTE_XOR_LE(0)])
+#define FDVALW_FR0 (((uint32_t *)&m_core->cpr[1][FDREG])[BYTE_XOR_LE(0)])
#define LFRVALD_FR0 (u2d(get_cop1_reg64(FRREG)))
#define LFTVALD_FR0 (u2d(get_cop1_reg64(FTREG)))
@@ -53,24 +53,24 @@
#define FTVALS_FR1 (((float *)&m_core->cpr[1][FTREG])[BYTE_XOR_LE(0)])
#define FSVALS_FR1 (((float *)&m_core->cpr[1][FSREG])[BYTE_XOR_LE(0)])
#define FDVALS_FR1 (((float *)&m_core->cpr[1][FDREG])[BYTE_XOR_LE(0)])
-#define FSVALW_FR1 (((UINT32 *)&m_core->cpr[1][FSREG])[BYTE_XOR_LE(0)])
-#define FDVALW_FR1 (((UINT32 *)&m_core->cpr[1][FDREG])[BYTE_XOR_LE(0)])
+#define FSVALW_FR1 (((uint32_t *)&m_core->cpr[1][FSREG])[BYTE_XOR_LE(0)])
+#define FDVALW_FR1 (((uint32_t *)&m_core->cpr[1][FDREG])[BYTE_XOR_LE(0)])
#define FRVALD_FR1 (*(double *)&m_core->cpr[1][FRREG])
#define FTVALD_FR1 (*(double *)&m_core->cpr[1][FTREG])
#define FSVALD_FR1 (*(double *)&m_core->cpr[1][FSREG])
#define FDVALD_FR1 (*(double *)&m_core->cpr[1][FDREG])
-#define FSVALL_FR1 (*(UINT64 *)&m_core->cpr[1][FSREG])
-#define FDVALL_FR1 (*(UINT64 *)&m_core->cpr[1][FDREG])
+#define FSVALL_FR1 (*(uint64_t *)&m_core->cpr[1][FSREG])
+#define FDVALL_FR1 (*(uint64_t *)&m_core->cpr[1][FDREG])
#define ADDPC(x) m_nextpc = m_core->pc + ((x) << 2)
#define ABSPC(x) m_nextpc = (m_core->pc & 0xf0000000) | ((x) << 2)
-#define ABSPCL(x,l) { m_nextpc = (m_core->pc & 0xf0000000) | ((x) << 2); m_core->r[l] = (INT32)(m_core->pc + 4); }
+#define ABSPCL(x,l) { m_nextpc = (m_core->pc & 0xf0000000) | ((x) << 2); m_core->r[l] = (int32_t)(m_core->pc + 4); }
#define SETPC(x) m_nextpc = (x)
-#define SETPCL(x,l) { m_nextpc = (x); m_core->r[l] = (INT32)(m_core->pc + 4); }
+#define SETPCL(x,l) { m_nextpc = (x); m_core->r[l] = (int32_t)(m_core->pc + 4); }
-#define HIVAL (UINT32)m_core->r[REG_HI]
-#define LOVAL (UINT32)m_core->r[REG_LO]
+#define HIVAL (uint32_t)m_core->r[REG_HI]
+#define LOVAL (uint32_t)m_core->r[REG_LO]
#define HIVAL64 m_core->r[REG_HI]
#define LOVAL64 m_core->r[REG_LO]
#define SR m_core->cpr[0][COP0_Status]
@@ -87,10 +87,10 @@
-static const UINT8 fcc_shift[8] = { 23, 25, 26, 27, 28, 29, 30, 31 };
+static const uint8_t fcc_shift[8] = { 23, 25, 26, 27, 28, 29, 30, 31 };
/* lookup table for FP modes */
-static const UINT8 fpmode_source[4] =
+static const uint8_t fpmode_source[4] =
{
uml::ROUND_ROUND,
uml::ROUND_TRUNC,
@@ -124,7 +124,7 @@ const device_type RM7000LE = &device_creator<rm7000le_device>;
// VR4300 and VR5432 have 4 fewer PFN bits, and only 32 TLB entries
-mips3_device::mips3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, mips3_flavor flavor, endianness_t endianness)
+mips3_device::mips3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, mips3_flavor flavor, endianness_t endianness)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, device_vtlb_interface(mconfig, *this, AS_PROGRAM)
, m_program_config("program", endianness, 32, 32, 0, 32, MIPS3_MIN_PAGE_SHIFT)
@@ -217,7 +217,7 @@ void mips3_device::device_stop()
void mips3_device::generate_exception(int exception, int backup)
{
- UINT32 offset = 0x180;
+ uint32_t offset = 0x180;
/*
useful for catching exceptions:
@@ -269,7 +269,7 @@ void mips3_device::generate_exception(int exception, int backup)
/* most exceptions go to offset 0x180, except for TLB stuff */
if (exception >= EXCEPTION_TLBMOD && exception <= EXCEPTION_TLBSTORE)
{
- osd_printf_debug("TLB miss @ %08X\n", (UINT32)m_core->cpr[0][COP0_BadVAddr]);
+ osd_printf_debug("TLB miss @ %08X\n", (uint32_t)m_core->cpr[0][COP0_BadVAddr]);
}
m_core->pc += offset;
@@ -277,7 +277,7 @@ void mips3_device::generate_exception(int exception, int backup)
useful for tracking interrupts
if ((CAUSE & 0x7f) == 0)
- logerror("Took interrupt -- Cause = %08X, PC = %08X\n", (UINT32)CAUSE, m_core->pc);
+ logerror("Took interrupt -- Cause = %08X, PC = %08X\n", (uint32_t)CAUSE, m_core->pc);
*/
}
@@ -294,7 +294,7 @@ void mips3_device::generate_tlb_exception(int exception, offs_t address)
}
-void mips3_device::invalid_instruction(UINT32 op)
+void mips3_device::invalid_instruction(uint32_t op)
{
generate_exception(EXCEPTION_INVALIDOP, 1);
}
@@ -337,7 +337,7 @@ void mips3_device::device_start()
/* allocate a timer for the compare interrupt */
m_compare_int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mips3_device::compare_int_callback), this));
- UINT32 flags = 0;
+ uint32_t flags = 0;
/* initialize the UML generator */
m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, flags, 8, 32, 2);
@@ -963,10 +963,10 @@ bool mips3_device::memory_translate(address_spacenum spacenum, int intention, of
}
-offs_t mips3_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mips3_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
- extern unsigned dasmmips3(char *, unsigned, UINT32);
- UINT32 op = *(UINT32 *)oprom;
+ extern unsigned dasmmips3(char *, unsigned, uint32_t);
+ uint32_t op = *(uint32_t *)oprom;
if (m_bigendian)
op = big_endianize_int32(op);
else
@@ -980,12 +980,12 @@ offs_t mips3_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
TLB HANDLING
***************************************************************************/
-inline bool mips3_device::RBYTE(offs_t address, UINT32 *result)
+inline bool mips3_device::RBYTE(offs_t address, uint32_t *result)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_READ_ALLOWED)
{
- const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
+ const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
if (tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end)
@@ -1013,12 +1013,12 @@ inline bool mips3_device::RBYTE(offs_t address, UINT32 *result)
return true;
}
-inline bool mips3_device::RHALF(offs_t address, UINT32 *result)
+inline bool mips3_device::RHALF(offs_t address, uint32_t *result)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_READ_ALLOWED)
{
- const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
+ const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
if (tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end)
@@ -1046,12 +1046,12 @@ inline bool mips3_device::RHALF(offs_t address, UINT32 *result)
return true;
}
-inline bool mips3_device::RWORD(offs_t address, UINT32 *result)
+inline bool mips3_device::RWORD(offs_t address, uint32_t *result)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_READ_ALLOWED)
{
- const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
+ const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
if (tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end)
@@ -1079,9 +1079,9 @@ inline bool mips3_device::RWORD(offs_t address, UINT32 *result)
return true;
}
-inline bool mips3_device::RWORD_MASKED(offs_t address, UINT32 *result, UINT32 mem_mask)
+inline bool mips3_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_READ_ALLOWED)
{
*result = (*m_memory.read_dword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), mem_mask);
@@ -1102,9 +1102,9 @@ inline bool mips3_device::RWORD_MASKED(offs_t address, UINT32 *result, UINT32 me
return true;
}
-inline bool mips3_device::RDOUBLE(offs_t address, UINT64 *result)
+inline bool mips3_device::RDOUBLE(offs_t address, uint64_t *result)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_READ_ALLOWED)
{
*result = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff));
@@ -1125,9 +1125,9 @@ inline bool mips3_device::RDOUBLE(offs_t address, UINT64 *result)
return true;
}
-inline bool mips3_device::RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64 mem_mask)
+inline bool mips3_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_READ_ALLOWED)
{
*result = (*m_memory.read_qword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), mem_mask);
@@ -1148,12 +1148,12 @@ inline bool mips3_device::RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64
return true;
}
-inline void mips3_device::WBYTE(offs_t address, UINT8 data)
+inline void mips3_device::WBYTE(offs_t address, uint8_t data)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_WRITE_ALLOWED)
{
- const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
+ const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
if (m_fastram[ramnum].readonly == TRUE || tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end)
@@ -1182,12 +1182,12 @@ inline void mips3_device::WBYTE(offs_t address, UINT8 data)
}
}
-inline void mips3_device::WHALF(offs_t address, UINT16 data)
+inline void mips3_device::WHALF(offs_t address, uint16_t data)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_WRITE_ALLOWED)
{
- const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
+ const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
if (m_fastram[ramnum].readonly == TRUE || tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end)
@@ -1216,12 +1216,12 @@ inline void mips3_device::WHALF(offs_t address, UINT16 data)
}
}
-inline void mips3_device::WWORD(offs_t address, UINT32 data)
+inline void mips3_device::WWORD(offs_t address, uint32_t data)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_WRITE_ALLOWED)
{
- const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
+ const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
if (m_fastram[ramnum].readonly == TRUE || tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end)
@@ -1250,9 +1250,9 @@ inline void mips3_device::WWORD(offs_t address, UINT32 data)
}
}
-inline void mips3_device::WWORD_MASKED(offs_t address, UINT32 data, UINT32 mem_mask)
+inline void mips3_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_WRITE_ALLOWED)
{
(*m_memory.write_dword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data, mem_mask);
@@ -1274,9 +1274,9 @@ inline void mips3_device::WWORD_MASKED(offs_t address, UINT32 data, UINT32 mem_m
}
}
-inline void mips3_device::WDOUBLE(offs_t address, UINT64 data)
+inline void mips3_device::WDOUBLE(offs_t address, uint64_t data)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_WRITE_ALLOWED)
{
(*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data);
@@ -1298,9 +1298,9 @@ inline void mips3_device::WDOUBLE(offs_t address, UINT64 data)
}
}
-inline void mips3_device::WDOUBLE_MASKED(offs_t address, UINT64 data, UINT64 mem_mask)
+inline void mips3_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
{
- const UINT32 tlbval = vtlb_table()[address >> 12];
+ const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & VTLB_WRITE_ALLOWED)
{
(*m_memory.write_qword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data, mem_mask);
@@ -1328,7 +1328,7 @@ inline void mips3_device::WDOUBLE_MASKED(offs_t address, UINT64 data, UINT64 mem
COP0 (SYSTEM) EXECUTION HANDLING
***************************************************************************/
-UINT64 mips3_device::get_cop0_reg(int idx)
+uint64_t mips3_device::get_cop0_reg(int idx)
{
if (idx == COP0_Count)
{
@@ -1338,7 +1338,7 @@ UINT64 mips3_device::get_cop0_reg(int idx)
m_core->icount -= MIPS3_COUNT_READ_CYCLES;
else
m_core->icount = 0;
- return (UINT32)((total_cycles() - m_core->count_zero_time) / 2);
+ return (uint32_t)((total_cycles() - m_core->count_zero_time) / 2);
}
else if (idx == COP0_Cause)
{
@@ -1361,7 +1361,7 @@ UINT64 mips3_device::get_cop0_reg(int idx)
return m_core->cpr[0][idx];
}
-void mips3_device::set_cop0_reg(int idx, UINT64 val)
+void mips3_device::set_cop0_reg(int idx, uint64_t val)
{
switch (idx)
{
@@ -1382,7 +1382,7 @@ void mips3_device::set_cop0_reg(int idx, UINT64 val)
case COP0_Status:
{
/* update interrupts and cycle counting */
- UINT32 diff = m_core->cpr[0][idx] ^ val;
+ uint32_t diff = m_core->cpr[0][idx] ^ val;
// if (val & 0xe0)
// fatalerror("System set 64-bit addressing mode, SR=%08X\n", val);
m_core->cpr[0][idx] = val;
@@ -1394,7 +1394,7 @@ void mips3_device::set_cop0_reg(int idx, UINT64 val)
case COP0_Count:
m_core->cpr[0][idx] = val;
- m_core->count_zero_time = total_cycles() - ((UINT64)(UINT32)val * 2);
+ m_core->count_zero_time = total_cycles() - ((uint64_t)(uint32_t)val * 2);
mips3com_update_cycle_counting();
break;
@@ -1428,17 +1428,17 @@ void mips3_device::set_cop0_reg(int idx, UINT64 val)
}
}
-inline UINT64 mips3_device::get_cop0_creg(int idx)
+inline uint64_t mips3_device::get_cop0_creg(int idx)
{
return m_core->ccr[0][idx];
}
-inline void mips3_device::set_cop0_creg(int idx, UINT64 val)
+inline void mips3_device::set_cop0_creg(int idx, uint64_t val)
{
m_core->ccr[0][idx] = val;
}
-void mips3_device::handle_cop0(UINT32 op)
+void mips3_device::handle_cop0(uint32_t op)
{
if ((SR & SR_KSU_MASK) != SR_KSU_KERNEL && !(SR & SR_COP0))
{
@@ -1449,9 +1449,9 @@ void mips3_device::handle_cop0(UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop0_reg(RDREG); break;
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop0_reg(RDREG); break;
case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop0_reg(RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop0_creg(RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop0_creg(RDREG); break;
case 0x04: /* MTCz */ set_cop0_reg(RDREG, RTVAL32); break;
case 0x05: /* DMTCz */ set_cop0_reg(RDREG, RTVAL64); break;
case 0x06: /* CTCz */ set_cop0_creg(RDREG, RTVAL32); break;
@@ -1515,42 +1515,42 @@ void mips3_device::handle_cop0(UINT32 op)
COP1 (FPU) EXECUTION HANDLING
***************************************************************************/
-inline UINT32 mips3_device::get_cop1_reg32(int idx)
+inline uint32_t mips3_device::get_cop1_reg32(int idx)
{
return m_core->cpr[1][idx];
}
-inline UINT64 mips3_device::get_cop1_reg64(int idx)
+inline uint64_t mips3_device::get_cop1_reg64(int idx)
{
if (IS_FR0)
- return (UINT64(((UINT32 *)&m_core->cpr[1][(idx&0x1E) + 1])[BYTE_XOR_LE(0)])) << 32
- | (UINT64(((UINT32 *)&m_core->cpr[1][idx&0x1E])[BYTE_XOR_LE(0)]));
+ return (uint64_t(((uint32_t *)&m_core->cpr[1][(idx&0x1E) + 1])[BYTE_XOR_LE(0)])) << 32
+ | (uint64_t(((uint32_t *)&m_core->cpr[1][idx&0x1E])[BYTE_XOR_LE(0)]));
else
return m_core->cpr[1][idx];
}
-inline void mips3_device::set_cop1_reg32(int idx, UINT32 val)
+inline void mips3_device::set_cop1_reg32(int idx, uint32_t val)
{
m_core->cpr[1][idx] = val;
}
-inline void mips3_device::set_cop1_reg64(int idx, UINT64 val)
+inline void mips3_device::set_cop1_reg64(int idx, uint64_t val)
{
if (IS_FR0)
{
- ((UINT32 *)&m_core->cpr[1][idx&0x1E])[BYTE_XOR_LE(0)] = val & 0xFFFFFFFF;
- ((UINT32 *)&m_core->cpr[1][(idx&0x1E) + 1])[BYTE_XOR_LE(0)] = val >> 32;
+ ((uint32_t *)&m_core->cpr[1][idx&0x1E])[BYTE_XOR_LE(0)] = val & 0xFFFFFFFF;
+ ((uint32_t *)&m_core->cpr[1][(idx&0x1E) + 1])[BYTE_XOR_LE(0)] = val >> 32;
}
else
{
m_core->cpr[1][idx] = val;
}
}
-inline UINT64 mips3_device::get_cop1_creg(int idx)
+inline uint64_t mips3_device::get_cop1_creg(int idx)
{
if (idx == 31)
{
- UINT32 result = m_core->ccr[1][31] & ~0xfe800000;
+ uint32_t result = m_core->ccr[1][31] & ~0xfe800000;
int i;
for (i = 0; i < 8; i++)
@@ -1561,7 +1561,7 @@ inline UINT64 mips3_device::get_cop1_creg(int idx)
return m_core->ccr[1][idx];
}
-inline void mips3_device::set_cop1_creg(int idx, UINT64 val)
+inline void mips3_device::set_cop1_creg(int idx, uint64_t val)
{
m_core->ccr[1][idx] = val;
if (idx == 31)
@@ -1573,7 +1573,7 @@ inline void mips3_device::set_cop1_creg(int idx, UINT64 val)
}
}
-void mips3_device::handle_cop1_fr0(UINT32 op)
+void mips3_device::handle_cop1_fr0(uint32_t op)
{
double dtemp;
@@ -1588,9 +1588,9 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_reg32(RDREG); break;
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop1_reg32(RDREG); break;
case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop1_reg64(RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_creg(RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop1_creg(RDREG); break;
case 0x04: /* MTCz */ set_cop1_reg32(RDREG, RTVAL32); break;
case 0x05: /* DMTCz */ set_cop1_reg64(RDREG, RTVAL64); break;
case 0x06: /* CTCz */ set_cop1_creg(RDREG, RTVAL32); break;
@@ -1670,7 +1670,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
temp = ceil(temp - 0.5);
else
temp = floor(temp + 0.5);
- SFDVALL_FR0((INT64)temp);
+ SFDVALL_FR0((int64_t)temp);
}
else /* ROUND.L.D */
{
@@ -1679,7 +1679,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
temp = ceil(temp - 0.5);
else
temp = floor(temp + 0.5);
- SFDVALL_FR0((INT64)temp);
+ SFDVALL_FR0((int64_t)temp);
}
break;
@@ -1691,7 +1691,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
temp = ceil(temp);
else
temp = floor(temp);
- SFDVALL_FR0((INT64)temp);
+ SFDVALL_FR0((int64_t)temp);
}
else /* TRUNC.L.D */
{
@@ -1700,7 +1700,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
temp = ceil(temp);
else
temp = floor(temp);
- SFDVALL_FR0((INT64)temp);
+ SFDVALL_FR0((int64_t)temp);
}
break;
@@ -1709,7 +1709,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
dtemp = ceil(FSVALS_FR0);
else /* CEIL.L.D */
dtemp = ceil(LFSVALD_FR0);
- SFDVALL_FR0((INT64)dtemp);
+ SFDVALL_FR0((int64_t)dtemp);
break;
case 0x0b:
@@ -1717,7 +1717,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
dtemp = floor(FSVALS_FR0);
else /* FLOOR.L.D */
dtemp = floor(LFSVALD_FR0);
- SFDVALL_FR0((INT64)dtemp);
+ SFDVALL_FR0((int64_t)dtemp);
break;
case 0x0c:
@@ -1728,7 +1728,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
dtemp = ceil(dtemp - 0.5);
else
dtemp = floor(dtemp + 0.5);
- FDVALW_FR0 = (INT32)dtemp;
+ FDVALW_FR0 = (int32_t)dtemp;
}
else /* ROUND.W.D */
{
@@ -1737,7 +1737,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
dtemp = ceil(dtemp - 0.5);
else
dtemp = floor(dtemp + 0.5);
- FDVALW_FR0 = (INT32)dtemp;
+ FDVALW_FR0 = (int32_t)dtemp;
}
break;
@@ -1749,7 +1749,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
dtemp = ceil(dtemp);
else
dtemp = floor(dtemp);
- FDVALW_FR0 = (INT32)dtemp;
+ FDVALW_FR0 = (int32_t)dtemp;
}
else /* TRUNC.W.D */
{
@@ -1758,7 +1758,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
dtemp = ceil(dtemp);
else
dtemp = floor(dtemp);
- FDVALW_FR0 = (INT32)dtemp;
+ FDVALW_FR0 = (int32_t)dtemp;
}
break;
@@ -1767,7 +1767,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
dtemp = ceil(FSVALS_FR0);
else /* CEIL.W.D */
dtemp = ceil(LFSVALD_FR0);
- FDVALW_FR0 = (INT32)dtemp;
+ FDVALW_FR0 = (int32_t)dtemp;
break;
case 0x0f:
@@ -1775,7 +1775,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
dtemp = floor(FSVALS_FR0);
else /* FLOOR.W.D */
dtemp = floor(LFSVALD_FR0);
- FDVALW_FR0 = (INT32)dtemp;
+ FDVALW_FR0 = (int32_t)dtemp;
break;
case 0x11: /* R5000 */
@@ -1826,9 +1826,9 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
if (IS_INTEGRAL(op))
{
if (IS_SINGLE(op)) /* CVT.S.W */
- FDVALS_FR0 = (INT32)FSVALW_FR0;
+ FDVALS_FR0 = (int32_t)FSVALW_FR0;
else /* CVT.S.L */
- FDVALS_FR0 = (INT64)LFSVALL_FR0;
+ FDVALS_FR0 = (int64_t)LFSVALL_FR0;
}
else /* CVT.S.D */
FDVALS_FR0 = LFSVALD_FR0;
@@ -1838,9 +1838,9 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
if (IS_INTEGRAL(op))
{
if (IS_SINGLE(op)) /* CVT.D.W */
- SFDVALD_FR0((INT32)FSVALW_FR0);
+ SFDVALD_FR0((int32_t)FSVALW_FR0);
else /* CVT.D.L */
- SFDVALD_FR0((INT64)LFSVALL_FR0);
+ SFDVALD_FR0((int64_t)LFSVALL_FR0);
}
else /* CVT.D.S */
SFDVALD_FR0(FSVALS_FR0);
@@ -1848,16 +1848,16 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
case 0x24:
if (IS_SINGLE(op)) /* CVT.W.S */
- FDVALW_FR0 = (INT32)FSVALS_FR0;
+ FDVALW_FR0 = (int32_t)FSVALS_FR0;
else
- FDVALW_FR0 = (INT32)LFSVALD_FR0;
+ FDVALW_FR0 = (int32_t)LFSVALD_FR0;
break;
case 0x25:
if (IS_SINGLE(op)) /* CVT.L.S */
- SFDVALL_FR0((INT64)FSVALS_FR0);
+ SFDVALL_FR0((int64_t)FSVALS_FR0);
else /* CVT.L.D */
- SFDVALL_FR0((INT64)LFSVALD_FR0);
+ SFDVALL_FR0((int64_t)LFSVALD_FR0);
break;
case 0x30:
@@ -1933,7 +1933,7 @@ void mips3_device::handle_cop1_fr0(UINT32 op)
}
-void mips3_device::handle_cop1_fr1(UINT32 op)
+void mips3_device::handle_cop1_fr1(uint32_t op)
{
double dtemp;
@@ -1948,9 +1948,9 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_reg32(RDREG); break;
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop1_reg32(RDREG); break;
case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop1_reg64(RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_creg(RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop1_creg(RDREG); break;
case 0x04: /* MTCz */ set_cop1_reg32(RDREG, RTVAL32); break;
case 0x05: /* DMTCz */ set_cop1_reg64(RDREG, RTVAL64); break;
case 0x06: /* CTCz */ set_cop1_creg(RDREG, RTVAL32); break;
@@ -2030,7 +2030,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
temp = ceil(temp - 0.5);
else
temp = floor(temp + 0.5);
- FDVALL_FR1 = (INT64)temp;
+ FDVALL_FR1 = (int64_t)temp;
}
else /* ROUND.L.D */
{
@@ -2039,7 +2039,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
temp = ceil(temp - 0.5);
else
temp = floor(temp + 0.5);
- FDVALL_FR1 = (INT64)temp;
+ FDVALL_FR1 = (int64_t)temp;
}
break;
@@ -2051,7 +2051,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
temp = ceil(temp);
else
temp = floor(temp);
- FDVALL_FR1 = (INT64)temp;
+ FDVALL_FR1 = (int64_t)temp;
}
else /* TRUNC.L.D */
{
@@ -2060,7 +2060,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
temp = ceil(temp);
else
temp = floor(temp);
- FDVALL_FR1 = (INT64)temp;
+ FDVALL_FR1 = (int64_t)temp;
}
break;
@@ -2069,7 +2069,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
dtemp = ceil(FSVALS_FR1);
else /* CEIL.L.D */
dtemp = ceil(FSVALD_FR1);
- FDVALL_FR1 = (INT64)dtemp;
+ FDVALL_FR1 = (int64_t)dtemp;
break;
case 0x0b:
@@ -2077,7 +2077,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
dtemp = floor(FSVALS_FR1);
else /* FLOOR.L.D */
dtemp = floor(FSVALD_FR1);
- FDVALL_FR1 = (INT64)dtemp;
+ FDVALL_FR1 = (int64_t)dtemp;
break;
case 0x0c:
@@ -2088,7 +2088,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
dtemp = ceil(dtemp - 0.5);
else
dtemp = floor(dtemp + 0.5);
- FDVALW_FR1 = (INT32)dtemp;
+ FDVALW_FR1 = (int32_t)dtemp;
}
else /* ROUND.W.D */
{
@@ -2097,7 +2097,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
dtemp = ceil(dtemp - 0.5);
else
dtemp = floor(dtemp + 0.5);
- FDVALW_FR1 = (INT32)dtemp;
+ FDVALW_FR1 = (int32_t)dtemp;
}
break;
@@ -2109,7 +2109,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
dtemp = ceil(dtemp);
else
dtemp = floor(dtemp);
- FDVALW_FR1 = (INT32)dtemp;
+ FDVALW_FR1 = (int32_t)dtemp;
}
else /* TRUNC.W.D */
{
@@ -2118,7 +2118,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
dtemp = ceil(dtemp);
else
dtemp = floor(dtemp);
- FDVALW_FR1 = (INT32)dtemp;
+ FDVALW_FR1 = (int32_t)dtemp;
}
break;
@@ -2127,7 +2127,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
dtemp = ceil(FSVALS_FR1);
else /* CEIL.W.D */
dtemp = ceil(FSVALD_FR1);
- FDVALW_FR1 = (INT32)dtemp;
+ FDVALW_FR1 = (int32_t)dtemp;
break;
case 0x0f:
@@ -2135,7 +2135,7 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
dtemp = floor(FSVALS_FR1);
else /* FLOOR.W.D */
dtemp = floor(FSVALD_FR1);
- FDVALW_FR1 = (INT32)dtemp;
+ FDVALW_FR1 = (int32_t)dtemp;
break;
case 0x11: /* R5000 */
@@ -2186,9 +2186,9 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
if (IS_INTEGRAL(op))
{
if (IS_SINGLE(op)) /* CVT.S.W */
- FDVALS_FR1 = (INT32)FSVALW_FR1;
+ FDVALS_FR1 = (int32_t)FSVALW_FR1;
else /* CVT.S.L */
- FDVALS_FR1 = (INT64)FSVALL_FR1;
+ FDVALS_FR1 = (int64_t)FSVALL_FR1;
}
else /* CVT.S.D */
FDVALS_FR1 = FSVALD_FR1;
@@ -2198,9 +2198,9 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
if (IS_INTEGRAL(op))
{
if (IS_SINGLE(op)) /* CVT.D.W */
- FDVALD_FR1 = (INT32)FSVALW_FR1;
+ FDVALD_FR1 = (int32_t)FSVALW_FR1;
else /* CVT.D.L */
- FDVALD_FR1 = (INT64)FSVALL_FR1;
+ FDVALD_FR1 = (int64_t)FSVALL_FR1;
}
else /* CVT.D.S */
FDVALD_FR1 = FSVALS_FR1;
@@ -2208,16 +2208,16 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
case 0x24:
if (IS_SINGLE(op)) /* CVT.W.S */
- FDVALW_FR1 = (INT32)FSVALS_FR1;
+ FDVALW_FR1 = (int32_t)FSVALS_FR1;
else
- FDVALW_FR1 = (INT32)FSVALD_FR1;
+ FDVALW_FR1 = (int32_t)FSVALD_FR1;
break;
case 0x25:
if (IS_SINGLE(op)) /* CVT.L.S */
- FDVALL_FR1 = (INT64)FSVALS_FR1;
+ FDVALL_FR1 = (int64_t)FSVALS_FR1;
else /* CVT.L.D */
- FDVALL_FR1 = (INT64)FSVALD_FR1;
+ FDVALL_FR1 = (int64_t)FSVALD_FR1;
break;
case 0x30:
@@ -2298,10 +2298,10 @@ void mips3_device::handle_cop1_fr1(UINT32 op)
COP1X (FPU EXTRA) EXECUTION HANDLING
***************************************************************************/
-void mips3_device::handle_cop1x_fr0(UINT32 op)
+void mips3_device::handle_cop1x_fr0(uint32_t op)
{
- UINT64 temp64;
- UINT32 temp;
+ uint64_t temp64;
+ uint32_t temp;
if (!(SR & SR_COP1))
{
@@ -2377,10 +2377,10 @@ void mips3_device::handle_cop1x_fr0(UINT32 op)
}
}
-void mips3_device::handle_cop1x_fr1(UINT32 op)
+void mips3_device::handle_cop1x_fr1(uint32_t op)
{
- UINT64 temp64;
- UINT32 temp;
+ uint64_t temp64;
+ uint32_t temp;
if (!(SR & SR_COP1))
{
@@ -2462,27 +2462,27 @@ void mips3_device::handle_cop1x_fr1(UINT32 op)
COP2 (CUSTOM) EXECUTION HANDLING
***************************************************************************/
-inline UINT64 mips3_device::get_cop2_reg(int idx)
+inline uint64_t mips3_device::get_cop2_reg(int idx)
{
return m_core->cpr[2][idx];
}
-inline void mips3_device::set_cop2_reg(int idx, UINT64 val)
+inline void mips3_device::set_cop2_reg(int idx, uint64_t val)
{
m_core->cpr[2][idx] = val;
}
-inline UINT64 mips3_device::get_cop2_creg(int idx)
+inline uint64_t mips3_device::get_cop2_creg(int idx)
{
return m_core->ccr[2][idx];
}
-inline void mips3_device::set_cop2_creg(int idx, UINT64 val)
+inline void mips3_device::set_cop2_creg(int idx, uint64_t val)
{
m_core->ccr[2][idx] = val;
}
-void mips3_device::handle_cop2(UINT32 op)
+void mips3_device::handle_cop2(uint32_t op)
{
if (!(SR & SR_COP2))
{
@@ -2493,9 +2493,9 @@ void mips3_device::handle_cop2(UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop2_reg(RDREG); break;
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_reg(RDREG); break;
case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop2_reg(RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop2_creg(RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_creg(RDREG); break;
case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break;
case 0x05: /* DMTCz */ set_cop2_reg(RDREG, RTVAL64); break;
case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break;
@@ -2535,39 +2535,39 @@ void mips3_device::handle_cop2(UINT32 op)
CORE EXECUTION LOOP
***************************************************************************/
-void mips3_device::handle_regimm(UINT32 op)
+void mips3_device::handle_regimm(uint32_t op)
{
switch (RTREG)
{
- case 0x00: /* BLTZ */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); break;
- case 0x01: /* BGEZ */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); break;
- case 0x02: /* BLTZL */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
- case 0x03: /* BGEZL */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
- case 0x08: /* TGEI */ if ((INT64)RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x00: /* BLTZ */ if ((int64_t)RSVAL64 < 0) ADDPC(SIMMVAL); break;
+ case 0x01: /* BGEZ */ if ((int64_t)RSVAL64 >= 0) ADDPC(SIMMVAL); break;
+ case 0x02: /* BLTZL */ if ((int64_t)RSVAL64 < 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
+ case 0x03: /* BGEZL */ if ((int64_t)RSVAL64 >= 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
+ case 0x08: /* TGEI */ if ((int64_t)RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x09: /* TGEIU */ if (RSVAL64 >= UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x0a: /* TLTI */ if ((INT64)RSVAL64 < SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x0a: /* TLTI */ if ((int64_t)RSVAL64 < SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x0b: /* TLTIU */ if (RSVAL64 >= UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x0c: /* TEQI */ if (RSVAL64 == UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x0e: /* TNEI */ if (RSVAL64 != UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x10: /* BLTZAL */ m_core->r[31] = (INT32)(m_core->pc + 4); if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); break;
- case 0x11: /* BGEZAL */ m_core->r[31] = (INT32)(m_core->pc + 4); if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); break;
- case 0x12: /* BLTZALL */ m_core->r[31] = (INT32)(m_core->pc + 4); if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
- case 0x13: /* BGEZALL */ m_core->r[31] = (INT32)(m_core->pc + 4); if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
+ case 0x10: /* BLTZAL */ m_core->r[31] = (int32_t)(m_core->pc + 4); if ((int64_t)RSVAL64 < 0) ADDPC(SIMMVAL); break;
+ case 0x11: /* BGEZAL */ m_core->r[31] = (int32_t)(m_core->pc + 4); if ((int64_t)RSVAL64 >= 0) ADDPC(SIMMVAL); break;
+ case 0x12: /* BLTZALL */ m_core->r[31] = (int32_t)(m_core->pc + 4); if ((int64_t)RSVAL64 < 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
+ case 0x13: /* BGEZALL */ m_core->r[31] = (int32_t)(m_core->pc + 4); if ((int64_t)RSVAL64 >= 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
default: /* ??? */ invalid_instruction(op); break;
}
}
-void mips3_device::handle_special(UINT32 op)
+void mips3_device::handle_special(uint32_t op)
{
switch (op & 63)
{
- case 0x00: /* SLL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << SHIFT); break;
+ case 0x00: /* SLL */ if (RDREG) RDVAL64 = (int32_t)(RTVAL32 << SHIFT); break;
case 0x01: /* MOVF - R5000*/if (RDREG && GET_FCC((op >> 18) & 7) == ((op >> 16) & 1)) RDVAL64 = RSVAL64; break;
- case 0x02: /* SRL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> SHIFT); break;
- case 0x03: /* SRA */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> SHIFT; break;
- case 0x04: /* SLLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << (RSVAL32 & 31)); break;
- case 0x06: /* SRLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> (RSVAL32 & 31)); break;
- case 0x07: /* SRAV */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> (RSVAL32 & 31); break;
+ case 0x02: /* SRL */ if (RDREG) RDVAL64 = (int32_t)(RTVAL32 >> SHIFT); break;
+ case 0x03: /* SRA */ if (RDREG) RDVAL64 = (int32_t)RTVAL32 >> SHIFT; break;
+ case 0x04: /* SLLV */ if (RDREG) RDVAL64 = (int32_t)(RTVAL32 << (RSVAL32 & 31)); break;
+ case 0x06: /* SRLV */ if (RDREG) RDVAL64 = (int32_t)(RTVAL32 >> (RSVAL32 & 31)); break;
+ case 0x07: /* SRAV */ if (RDREG) RDVAL64 = (int32_t)RTVAL32 >> (RSVAL32 & 31); break;
case 0x08: /* JR */ SETPC(RSVAL32); break;
case 0x09: /* JALR */ SETPCL(RSVAL32,RDREG); break;
case 0x0a: /* MOVZ - R5000 */if (RTVAL64 == 0) { if (RDREG) RDVAL64 = RSVAL64; } break;
@@ -2581,76 +2581,76 @@ void mips3_device::handle_special(UINT32 op)
case 0x13: /* MTLO */ LOVAL64 = RSVAL64; break;
case 0x14: /* DSLLV */ if (RDREG) RDVAL64 = RTVAL64 << (RSVAL32 & 63); break;
case 0x16: /* DSRLV */ if (RDREG) RDVAL64 = RTVAL64 >> (RSVAL32 & 63); break;
- case 0x17: /* DSRAV */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (RSVAL32 & 63); break;
+ case 0x17: /* DSRAV */ if (RDREG) RDVAL64 = (int64_t)RTVAL64 >> (RSVAL32 & 63); break;
case 0x18: /* MULT */
{
- UINT64 temp64 = (INT64)(INT32)RSVAL32 * (INT64)(INT32)RTVAL32;
- LOVAL64 = (INT32)temp64;
- HIVAL64 = (INT32)(temp64 >> 32);
+ uint64_t temp64 = (int64_t)(int32_t)RSVAL32 * (int64_t)(int32_t)RTVAL32;
+ LOVAL64 = (int32_t)temp64;
+ HIVAL64 = (int32_t)(temp64 >> 32);
m_core->icount -= 3;
break;
}
case 0x19: /* MULTU */
{
- UINT64 temp64 = (UINT64)RSVAL32 * (UINT64)RTVAL32;
- LOVAL64 = (INT32)temp64;
- HIVAL64 = (INT32)(temp64 >> 32);
+ uint64_t temp64 = (uint64_t)RSVAL32 * (uint64_t)RTVAL32;
+ LOVAL64 = (int32_t)temp64;
+ HIVAL64 = (int32_t)(temp64 >> 32);
m_core->icount -= 3;
break;
}
case 0x1a: /* DIV */
if (RTVAL32)
{
- LOVAL64 = (INT32)((INT32)RSVAL32 / (INT32)RTVAL32);
- HIVAL64 = (INT32)((INT32)RSVAL32 % (INT32)RTVAL32);
+ LOVAL64 = (int32_t)((int32_t)RSVAL32 / (int32_t)RTVAL32);
+ HIVAL64 = (int32_t)((int32_t)RSVAL32 % (int32_t)RTVAL32);
}
m_core->icount -= 35;
break;
case 0x1b: /* DIVU */
if (RTVAL32)
{
- LOVAL64 = (INT32)(RSVAL32 / RTVAL32);
- HIVAL64 = (INT32)(RSVAL32 % RTVAL32);
+ LOVAL64 = (int32_t)(RSVAL32 / RTVAL32);
+ HIVAL64 = (int32_t)(RSVAL32 % RTVAL32);
}
m_core->icount -= 35;
break;
case 0x1c: /* DMULT */
{
- INT64 rshi = (INT32)(RSVAL64 >> 32);
- INT64 rthi = (INT32)(RTVAL64 >> 32);
- INT64 rslo = (UINT32)RSVAL64;
- INT64 rtlo = (UINT32)RTVAL64;
- INT64 mid_prods = (rshi * rtlo) + (rslo * rthi);
- UINT64 lo_prod = (rslo * rtlo);
- INT64 hi_prod = (rshi * rthi);
+ int64_t rshi = (int32_t)(RSVAL64 >> 32);
+ int64_t rthi = (int32_t)(RTVAL64 >> 32);
+ int64_t rslo = (uint32_t)RSVAL64;
+ int64_t rtlo = (uint32_t)RTVAL64;
+ int64_t mid_prods = (rshi * rtlo) + (rslo * rthi);
+ uint64_t lo_prod = (rslo * rtlo);
+ int64_t hi_prod = (rshi * rthi);
mid_prods += lo_prod >> 32;
HIVAL64 = hi_prod + (mid_prods >> 32);
- LOVAL64 = (UINT32)lo_prod + (mid_prods << 32);
+ LOVAL64 = (uint32_t)lo_prod + (mid_prods << 32);
m_core->icount -= 7;
break;
}
case 0x1d: /* DMULTU */
{
- UINT64 rshi = (INT32)(RSVAL64 >> 32);
- UINT64 rthi = (INT32)(RTVAL64 >> 32);
- UINT64 rslo = (UINT32)RSVAL64;
- UINT64 rtlo = (UINT32)RTVAL64;
- UINT64 mid_prods = (rshi * rtlo) + (rslo * rthi);
- UINT64 lo_prod = (rslo * rtlo);
- UINT64 hi_prod = (rshi * rthi);
+ uint64_t rshi = (int32_t)(RSVAL64 >> 32);
+ uint64_t rthi = (int32_t)(RTVAL64 >> 32);
+ uint64_t rslo = (uint32_t)RSVAL64;
+ uint64_t rtlo = (uint32_t)RTVAL64;
+ uint64_t mid_prods = (rshi * rtlo) + (rslo * rthi);
+ uint64_t lo_prod = (rslo * rtlo);
+ uint64_t hi_prod = (rshi * rthi);
mid_prods += lo_prod >> 32;
HIVAL64 = hi_prod + (mid_prods >> 32);
- LOVAL64 = (UINT32)lo_prod + (mid_prods << 32);
+ LOVAL64 = (uint32_t)lo_prod + (mid_prods << 32);
m_core->icount -= 7;
break;
}
case 0x1e: /* DDIV */
if (RTVAL64)
{
- LOVAL64 = (INT64)RSVAL64 / (INT64)RTVAL64;
- HIVAL64 = (INT64)RSVAL64 % (INT64)RTVAL64;
+ LOVAL64 = (int64_t)RSVAL64 / (int64_t)RTVAL64;
+ HIVAL64 = (int64_t)RSVAL64 % (int64_t)RTVAL64;
}
m_core->icount -= 67;
break;
@@ -2664,20 +2664,20 @@ void mips3_device::handle_special(UINT32 op)
break;
case 0x20: /* ADD */
if (ENABLE_OVERFLOWS && RSVAL32 > ~RTVAL32) generate_exception(EXCEPTION_OVERFLOW, 1);
- else if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32);
+ else if (RDREG) RDVAL64 = (int32_t)(RSVAL32 + RTVAL32);
break;
- case 0x21: /* ADDU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32); break;
+ case 0x21: /* ADDU */ if (RDREG) RDVAL64 = (int32_t)(RSVAL32 + RTVAL32); break;
case 0x22: /* SUB */
if (ENABLE_OVERFLOWS && RSVAL32 < RTVAL32) generate_exception(EXCEPTION_OVERFLOW, 1);
- else if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32);
+ else if (RDREG) RDVAL64 = (int32_t)(RSVAL32 - RTVAL32);
break;
- case 0x23: /* SUBU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32); break;
+ case 0x23: /* SUBU */ if (RDREG) RDVAL64 = (int32_t)(RSVAL32 - RTVAL32); break;
case 0x24: /* AND */ if (RDREG) RDVAL64 = RSVAL64 & RTVAL64; break;
case 0x25: /* OR */ if (RDREG) RDVAL64 = RSVAL64 | RTVAL64; break;
case 0x26: /* XOR */ if (RDREG) RDVAL64 = RSVAL64 ^ RTVAL64; break;
case 0x27: /* NOR */ if (RDREG) RDVAL64 = ~(RSVAL64 | RTVAL64); break;
- case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (INT64)RSVAL64 < (INT64)RTVAL64; break;
- case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (UINT64)RSVAL64 < (UINT64)RTVAL64; break;
+ case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (int64_t)RSVAL64 < (int64_t)RTVAL64; break;
+ case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (uint64_t)RSVAL64 < (uint64_t)RTVAL64; break;
case 0x2c: /* DADD */
if (ENABLE_OVERFLOWS && RSVAL64 > ~RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1);
else if (RDREG) RDVAL64 = RSVAL64 + RTVAL64;
@@ -2688,23 +2688,23 @@ void mips3_device::handle_special(UINT32 op)
else if (RDREG) RDVAL64 = RSVAL64 - RTVAL64;
break;
case 0x2f: /* DSUBU */ if (RDREG) RDVAL64 = RSVAL64 - RTVAL64; break;
- case 0x30: /* TGE */ if ((INT64)RSVAL64 >= (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x30: /* TGE */ if ((int64_t)RSVAL64 >= (int64_t)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x31: /* TGEU */ if (RSVAL64 >= RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x32: /* TLT */ if ((INT64)RSVAL64 < (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x32: /* TLT */ if ((int64_t)RSVAL64 < (int64_t)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x33: /* TLTU */ if (RSVAL64 < RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x34: /* TEQ */ if (RSVAL64 == RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x36: /* TNE */ if (RSVAL64 != RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
case 0x38: /* DSLL */ if (RDREG) RDVAL64 = RTVAL64 << SHIFT; break;
case 0x3a: /* DSRL */ if (RDREG) RDVAL64 = RTVAL64 >> SHIFT; break;
- case 0x3b: /* DSRA */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> SHIFT; break;
+ case 0x3b: /* DSRA */ if (RDREG) RDVAL64 = (int64_t)RTVAL64 >> SHIFT; break;
case 0x3c: /* DSLL32 */ if (RDREG) RDVAL64 = RTVAL64 << (SHIFT + 32); break;
case 0x3e: /* DSRL32 */ if (RDREG) RDVAL64 = RTVAL64 >> (SHIFT + 32); break;
- case 0x3f: /* DSRA32 */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (SHIFT + 32); break;
+ case 0x3f: /* DSRA32 */ if (RDREG) RDVAL64 = (int64_t)RTVAL64 >> (SHIFT + 32); break;
default: /* ??? */ invalid_instruction(op); break;
}
}
-void mips3_device::burn_cycles(INT32 cycles)
+void mips3_device::burn_cycles(int32_t cycles)
{
execute_burn(cycles);
}
@@ -2758,9 +2758,9 @@ void mips3_device::execute_run()
/* core execution loop */
do
{
- UINT32 op;
- UINT64 temp64 = 0;
- UINT32 temp;
+ uint32_t op;
+ uint64_t temp64 = 0;
+ uint32_t temp;
/* debugging */
m_ppc = m_core->pc;
@@ -2802,19 +2802,19 @@ void mips3_device::execute_run()
case 0x03: /* JAL */ ABSPCL(LIMMVAL,31); break;
case 0x04: /* BEQ */ if (RSVAL64 == RTVAL64) ADDPC(SIMMVAL); break;
case 0x05: /* BNE */ if (RSVAL64 != RTVAL64) ADDPC(SIMMVAL); break;
- case 0x06: /* BLEZ */ if ((INT64)RSVAL64 <= 0) ADDPC(SIMMVAL); break;
- case 0x07: /* BGTZ */ if ((INT64)RSVAL64 > 0) ADDPC(SIMMVAL); break;
+ case 0x06: /* BLEZ */ if ((int64_t)RSVAL64 <= 0) ADDPC(SIMMVAL); break;
+ case 0x07: /* BGTZ */ if ((int64_t)RSVAL64 > 0) ADDPC(SIMMVAL); break;
case 0x08: /* ADDI */
if (ENABLE_OVERFLOWS && RSVAL32 > ~SIMMVAL) generate_exception(EXCEPTION_OVERFLOW, 1);
- else if (RTREG) RTVAL64 = (INT32)(RSVAL32 + SIMMVAL);
+ else if (RTREG) RTVAL64 = (int32_t)(RSVAL32 + SIMMVAL);
break;
- case 0x09: /* ADDIU */ if (RTREG) RTVAL64 = (INT32)(RSVAL32 + SIMMVAL); break;
- case 0x0a: /* SLTI */ if (RTREG) RTVAL64 = (INT64)RSVAL64 < (INT64)SIMMVAL; break;
- case 0x0b: /* SLTIU */ if (RTREG) RTVAL64 = (UINT64)RSVAL64 < (UINT64)SIMMVAL; break;
+ case 0x09: /* ADDIU */ if (RTREG) RTVAL64 = (int32_t)(RSVAL32 + SIMMVAL); break;
+ case 0x0a: /* SLTI */ if (RTREG) RTVAL64 = (int64_t)RSVAL64 < (int64_t)SIMMVAL; break;
+ case 0x0b: /* SLTIU */ if (RTREG) RTVAL64 = (uint64_t)RSVAL64 < (uint64_t)SIMMVAL; break;
case 0x0c: /* ANDI */ if (RTREG) RTVAL64 = RSVAL64 & UIMMVAL; break;
case 0x0d: /* ORI */ if (RTREG) RTVAL64 = RSVAL64 | UIMMVAL; break;
case 0x0e: /* XORI */ if (RTREG) RTVAL64 = RSVAL64 ^ UIMMVAL; break;
- case 0x0f: /* LUI */ if (RTREG) RTVAL64 = (INT32)(UIMMVAL << 16); break;
+ case 0x0f: /* LUI */ if (RTREG) RTVAL64 = (int32_t)(UIMMVAL << 16); break;
case 0x10: /* COP0 */ handle_cop0(op); break;
case 0x11: /* COP1 */
if (IS_FR0)
@@ -2831,33 +2831,33 @@ void mips3_device::execute_run()
break;
case 0x14: /* BEQL */ if (RSVAL64 == RTVAL64) ADDPC(SIMMVAL); else m_core->pc += 4; break;
case 0x15: /* BNEL */ if (RSVAL64 != RTVAL64) ADDPC(SIMMVAL); else m_core->pc += 4; break;
- case 0x16: /* BLEZL */ if ((INT64)RSVAL64 <= 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
- case 0x17: /* BGTZL */ if ((INT64)RSVAL64 > 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
+ case 0x16: /* BLEZL */ if ((int64_t)RSVAL64 <= 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
+ case 0x17: /* BGTZL */ if ((int64_t)RSVAL64 > 0) ADDPC(SIMMVAL); else m_core->pc += 4; break;
case 0x18: /* DADDI */
- if (ENABLE_OVERFLOWS && (INT64)RSVAL64 > ~SIMMVAL) generate_exception(EXCEPTION_OVERFLOW, 1);
- else if (RTREG) RTVAL64 = RSVAL64 + (INT64)SIMMVAL;
+ if (ENABLE_OVERFLOWS && (int64_t)RSVAL64 > ~SIMMVAL) generate_exception(EXCEPTION_OVERFLOW, 1);
+ else if (RTREG) RTVAL64 = RSVAL64 + (int64_t)SIMMVAL;
break;
- case 0x19: /* DADDIU */ if (RTREG) RTVAL64 = RSVAL64 + (UINT64)SIMMVAL; break;
+ case 0x19: /* DADDIU */ if (RTREG) RTVAL64 = RSVAL64 + (uint64_t)SIMMVAL; break;
case 0x1a: /* LDL */ (this->*m_ldl)(op); break;
case 0x1b: /* LDR */ (this->*m_ldr)(op); break;
case 0x1c: /* IDT-specific opcodes: mad/madu/mul on R4640/4650, msub on RC32364 */
switch (op & 0x1f)
{
case 2: /* MUL */
- RDVAL64 = (INT32)((INT32)RSVAL32 * (INT32)RTVAL32);
+ RDVAL64 = (int32_t)((int32_t)RSVAL32 * (int32_t)RTVAL32);
m_core->icount -= 3;
break;
default: invalid_instruction(op);
}
break;
- case 0x20: /* LB */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT8)temp; break;
- case 0x21: /* LH */ if (RHALF(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT16)temp; break;
+ case 0x20: /* LB */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (int8_t)temp; break;
+ case 0x21: /* LH */ if (RHALF(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (int16_t)temp; break;
case 0x22: /* LWL */ (this->*m_lwl)(op); break;
- case 0x23: /* LW */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT32)temp; break;
- case 0x24: /* LBU */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT8)temp; break;
- case 0x25: /* LHU */ if (RHALF(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT16)temp; break;
+ case 0x23: /* LW */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (int32_t)temp; break;
+ case 0x24: /* LBU */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (uint8_t)temp; break;
+ case 0x25: /* LHU */ if (RHALF(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (uint16_t)temp; break;
case 0x26: /* LWR */ (this->*m_lwr)(op); break;
- case 0x27: /* LWU */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT32)temp; break;
+ case 0x27: /* LWU */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (uint32_t)temp; break;
case 0x28: /* SB */ WBYTE(SIMMVAL+RSVAL32, RTVAL32); break;
case 0x29: /* SH */ WHALF(SIMMVAL+RSVAL32, RTVAL32); break;
case 0x2a: /* SWL */ (this->*m_swl)(op); break;
@@ -2866,7 +2866,7 @@ void mips3_device::execute_run()
case 0x2d: /* SDR */ (this->*m_sdr)(op); break;
case 0x2e: /* SWR */ (this->*m_swr)(op); break;
case 0x2f: /* CACHE */ /* effective no-op */ break;
- case 0x30: /* LL */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT32)temp; m_ll_value = RTVAL32; break;
+ case 0x30: /* LL */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (uint32_t)temp; m_ll_value = RTVAL32; break;
case 0x31: /* LWC1 */
if (!(SR & SR_COP1))
{
@@ -2897,11 +2897,11 @@ void mips3_device::execute_run()
if (temp == m_ll_value)
{
WWORD(SIMMVAL+RSVAL32, RTVAL32);
- RTVAL64 = (UINT32)1;
+ RTVAL64 = (uint32_t)1;
}
else
{
- RTVAL64 = (UINT32)0;
+ RTVAL64 = (uint32_t)0;
}
}
break;
@@ -2958,156 +2958,156 @@ void mips3_device::execute_run()
COMPLEX OPCODE IMPLEMENTATIONS
***************************************************************************/
-void mips3_device::lwl_be(UINT32 op)
+void mips3_device::lwl_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 3);
- UINT32 mask = 0xffffffffUL << shift;
- UINT32 temp;
+ uint32_t mask = 0xffffffffUL << shift;
+ uint32_t temp;
if (RWORD_MASKED(offs & ~3, &temp, mask >> shift) && RTREG)
- RTVAL64 = (INT32)((RTVAL32 & ~mask) | (temp << shift));
+ RTVAL64 = (int32_t)((RTVAL32 & ~mask) | (temp << shift));
}
-void mips3_device::lwr_be(UINT32 op)
+void mips3_device::lwr_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 3);
- UINT32 mask = 0xffffffffUL >> shift;
- UINT32 temp;
+ uint32_t mask = 0xffffffffUL >> shift;
+ uint32_t temp;
if (RWORD_MASKED(offs & ~3, &temp, mask << shift) && RTREG)
- RTVAL64 = (INT32)((RTVAL32 & ~mask) | (temp >> shift));
+ RTVAL64 = (int32_t)((RTVAL32 & ~mask) | (temp >> shift));
}
-void mips3_device::ldl_be(UINT32 op)
+void mips3_device::ldl_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 7);
- UINT64 mask = U64(0xffffffffffffffff) << shift;
- UINT64 temp;
+ uint64_t mask = U64(0xffffffffffffffff) << shift;
+ uint64_t temp;
if (RDOUBLE_MASKED(offs & ~7, &temp, mask >> shift) && RTREG)
RTVAL64 = (RTVAL64 & ~mask) | (temp << shift);
}
-void mips3_device::ldr_be(UINT32 op)
+void mips3_device::ldr_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 7);
- UINT64 mask = U64(0xffffffffffffffff) >> shift;
- UINT64 temp;
+ uint64_t mask = U64(0xffffffffffffffff) >> shift;
+ uint64_t temp;
if (RDOUBLE_MASKED(offs & ~7, &temp, mask << shift) && RTREG)
RTVAL64 = (RTVAL64 & ~mask) | (temp >> shift);
}
-void mips3_device::swl_be(UINT32 op)
+void mips3_device::swl_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 3);
- UINT32 mask = 0xffffffffUL >> shift;
+ uint32_t mask = 0xffffffffUL >> shift;
WWORD_MASKED(offs & ~3, RTVAL32 >> shift, mask);
}
-void mips3_device::swr_be(UINT32 op)
+void mips3_device::swr_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 3);
- UINT32 mask = 0xffffffffUL << shift;
+ uint32_t mask = 0xffffffffUL << shift;
WWORD_MASKED(offs & ~3, RTVAL32 << shift, mask);
}
-void mips3_device::sdl_be(UINT32 op)
+void mips3_device::sdl_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 7);
- UINT64 mask = U64(0xffffffffffffffff) >> shift;
+ uint64_t mask = U64(0xffffffffffffffff) >> shift;
WDOUBLE_MASKED(offs & ~7, RTVAL64 >> shift, mask);
}
-void mips3_device::sdr_be(UINT32 op)
+void mips3_device::sdr_be(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 7);
- UINT64 mask = U64(0xffffffffffffffff) << shift;
+ uint64_t mask = U64(0xffffffffffffffff) << shift;
WDOUBLE_MASKED(offs & ~7, RTVAL64 << shift, mask);
}
-void mips3_device::lwl_le(UINT32 op)
+void mips3_device::lwl_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 3);
- UINT32 mask = 0xffffffffUL << shift;
- UINT32 temp;
+ uint32_t mask = 0xffffffffUL << shift;
+ uint32_t temp;
if (RWORD_MASKED(offs & ~3, &temp, mask >> shift) && RTREG)
- RTVAL64 = (INT32)((RTVAL32 & ~mask) | (temp << shift));
+ RTVAL64 = (int32_t)((RTVAL32 & ~mask) | (temp << shift));
}
-void mips3_device::lwr_le(UINT32 op)
+void mips3_device::lwr_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 3);
- UINT32 mask = 0xffffffffUL >> shift;
- UINT32 temp;
+ uint32_t mask = 0xffffffffUL >> shift;
+ uint32_t temp;
if (RWORD_MASKED(offs & ~3, &temp, mask << shift) && RTREG)
- RTVAL64 = (INT32)((RTVAL32 & ~mask) | (temp >> shift));
+ RTVAL64 = (int32_t)((RTVAL32 & ~mask) | (temp >> shift));
}
-void mips3_device::ldl_le(UINT32 op)
+void mips3_device::ldl_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 7);
- UINT64 mask = U64(0xffffffffffffffff) << shift;
- UINT64 temp;
+ uint64_t mask = U64(0xffffffffffffffff) << shift;
+ uint64_t temp;
if (RDOUBLE_MASKED(offs & ~7, &temp, mask >> shift) && RTREG)
RTVAL64 = (RTVAL64 & ~mask) | (temp << shift);
}
-void mips3_device::ldr_le(UINT32 op)
+void mips3_device::ldr_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 7);
- UINT64 mask = U64(0xffffffffffffffff) >> shift;
- UINT64 temp;
+ uint64_t mask = U64(0xffffffffffffffff) >> shift;
+ uint64_t temp;
if (RDOUBLE_MASKED(offs & ~7, &temp, mask << shift) && RTREG)
RTVAL64 = (RTVAL64 & ~mask) | (temp >> shift);
}
-void mips3_device::swl_le(UINT32 op)
+void mips3_device::swl_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 3);
- UINT32 mask = 0xffffffffUL >> shift;
+ uint32_t mask = 0xffffffffUL >> shift;
WWORD_MASKED(offs & ~3, RTVAL32 >> shift, mask);
}
-void mips3_device::swr_le(UINT32 op)
+void mips3_device::swr_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 3);
- UINT32 mask = 0xffffffffUL << shift;
+ uint32_t mask = 0xffffffffUL << shift;
WWORD_MASKED(offs & ~3, RTVAL32 << shift, mask);
}
-void mips3_device::sdl_le(UINT32 op)
+void mips3_device::sdl_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (~offs & 7);
- UINT64 mask = U64(0xffffffffffffffff) >> shift;
+ uint64_t mask = U64(0xffffffffffffffff) >> shift;
WDOUBLE_MASKED(offs & ~7, RTVAL64 >> shift, mask);
}
-void mips3_device::sdr_le(UINT32 op)
+void mips3_device::sdr_le(uint32_t op)
{
offs_t offs = SIMMVAL + RSVAL32;
int shift = 8 * (offs & 7);
- UINT64 mask = U64(0xffffffffffffffff) << shift;
+ uint64_t mask = U64(0xffffffffffffffff) << shift;
WDOUBLE_MASKED(offs & ~7, RTVAL64 << shift, mask);
}
diff --git a/src/devices/cpu/mips/mips3.h b/src/devices/cpu/mips/mips3.h
index fff9044f472..247b21bd993 100644
--- a/src/devices/cpu/mips/mips3.h
+++ b/src/devices/cpu/mips/mips3.h
@@ -217,17 +217,17 @@ enum
/* MIPS3 TLB entry */
struct mips3_tlb_entry
{
- UINT64 page_mask;
- UINT64 entry_hi;
- UINT64 entry_lo[2];
+ uint64_t page_mask;
+ uint64_t entry_hi;
+ uint64_t entry_lo[2];
};
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- UINT8 checksoftints; /* need to check software interrupts before next instruction */
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
+ uint8_t checksoftints; /* need to check software interrupts before next instruction */
uml::code_label labelnum; /* index for local labels */
};
@@ -269,19 +269,19 @@ protected:
public:
// construction/destruction
- mips3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, mips3_flavor flavor, endianness_t endiannes);
+ mips3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, mips3_flavor flavor, endianness_t endiannes);
static void set_icache_size(device_t &device, size_t icache_size) { downcast<mips3_device &>(device).c_icache_size = icache_size; }
static void set_dcache_size(device_t &device, size_t dcache_size) { downcast<mips3_device &>(device).c_dcache_size = dcache_size; }
- static void set_system_clock(device_t &device, UINT32 system_clock) { downcast<mips3_device &>(device).c_system_clock = system_clock; }
+ static void set_system_clock(device_t &device, uint32_t system_clock) { downcast<mips3_device &>(device).c_system_clock = system_clock; }
TIMER_CALLBACK_MEMBER(compare_int_callback);
- void add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base);
- void clear_fastram(UINT32 select_start);
- void mips3drc_set_options(UINT32 options);
- void mips3drc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles);
- void burn_cycles(INT32 cycles);
+ void add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base);
+ void clear_fastram(uint32_t select_start);
+ void mips3drc_set_options(uint32_t options);
+ void mips3drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles);
+ void burn_cycles(int32_t cycles);
protected:
// device-level overrides
@@ -290,12 +290,12 @@ protected:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 40; }
- virtual UINT32 execute_input_lines() const override { return 6; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 40; }
+ virtual uint32_t execute_input_lines() const override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual void execute_burn(INT32 cycles) override { m_totalcycles += cycles; }
+ virtual void execute_burn(int32_t cycles) override { m_totalcycles += cycles; }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
@@ -306,35 +306,35 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
struct internal_mips3_state
{
/* core registers */
- UINT32 pc;
+ uint32_t pc;
int icount;
- UINT64 r[35];
+ uint64_t r[35];
/* COP registers */
- UINT64 cpr[3][32];
- UINT64 ccr[3][32];
- UINT32 llbit;
+ uint64_t cpr[3][32];
+ uint64_t ccr[3][32];
+ uint32_t llbit;
- UINT32 mode; /* current global mode */
+ uint32_t mode; /* current global mode */
/* parameters for subroutines */
- UINT64 numcycles; /* return value from gettotalcycles */
+ uint64_t numcycles; /* return value from gettotalcycles */
const char * format; /* format string for print_debug */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
+ uint32_t arg0; /* print_debug argument 1 */
+ uint32_t arg1; /* print_debug argument 2 */
- UINT64 count_zero_time;
- UINT32 compare_armed;
- UINT32 jmpdest; /* destination jump target */
+ uint64_t count_zero_time;
+ uint32_t compare_armed;
+ uint32_t jmpdest; /* destination jump target */
};
@@ -345,19 +345,19 @@ private:
internal_mips3_state *m_core;
/* internal stuff */
- UINT32 m_ppc;
- UINT32 m_nextpc;
- UINT32 m_pcbase;
- UINT8 m_cf[4][8];
+ uint32_t m_ppc;
+ uint32_t m_nextpc;
+ uint32_t m_pcbase;
+ uint8_t m_cf[4][8];
bool m_delayslot;
int m_op;
int m_interrupt_cycles;
- UINT32 m_ll_value;
- UINT64 m_lld_value;
- UINT32 m_badcop_value;
+ uint32_t m_ll_value;
+ uint64_t m_lld_value;
+ uint32_t m_badcop_value;
/* endian-dependent load/store */
- typedef void (mips3_device::*loadstore_func)(UINT32 op);
+ typedef void (mips3_device::*loadstore_func)(uint32_t op);
loadstore_func m_lwl;
loadstore_func m_lwr;
loadstore_func m_swl;
@@ -369,18 +369,18 @@ private:
address_space *m_program;
direct_read_data *m_direct;
- UINT32 c_system_clock;
- UINT32 m_cpu_clock;
+ uint32_t c_system_clock;
+ uint32_t m_cpu_clock;
emu_timer * m_compare_int_timer;
/* derived info based on flavor */
- UINT32 m_pfnmask;
- UINT8 m_tlbentries;
+ uint32_t m_pfnmask;
+ uint8_t m_tlbentries;
/* memory accesses */
bool m_bigendian;
- UINT32 m_byte_xor;
- UINT32 m_word_xor;
+ uint32_t m_byte_xor;
+ uint32_t m_word_xor;
data_accessors m_memory;
/* cache memory */
@@ -391,31 +391,31 @@ private:
mips3_tlb_entry m_tlb[MIPS3_MAX_TLB_ENTRIES];
/* fast RAM */
- UINT32 m_fastram_select;
+ uint32_t m_fastram_select;
struct
{
offs_t start; /* start of the RAM block */
offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
+ uint8_t readonly; /* TRUE if read-only */
void * base; /* base in memory where the RAM lives */
- UINT8 * offset_base8; /* base in memory where the RAM lives, 8-bit pointer, with the start offset pre-applied */
- UINT16 * offset_base16; /* base in memory where the RAM lives, 16-bit pointer, with the start offset pre-applied */
- UINT32 * offset_base32; /* base in memory where the RAM lives, 32-bit pointer, with the start offset pre-applied */
+ uint8_t * offset_base8; /* base in memory where the RAM lives, 8-bit pointer, with the start offset pre-applied */
+ uint16_t * offset_base16; /* base in memory where the RAM lives, 16-bit pointer, with the start offset pre-applied */
+ uint32_t * offset_base32; /* base in memory where the RAM lives, 32-bit pointer, with the start offset pre-applied */
} m_fastram[MIPS3_MAX_FASTRAM];
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
/* core state */
drc_cache m_cache; /* pointer to the DRC code cache */
std::unique_ptr<drcuml_state> m_drcuml; /* DRC UML generator state */
std::unique_ptr<mips3_frontend> m_drcfe; /* pointer to the DRC front-end state */
- UINT32 m_drcoptions; /* configurable DRC options */
+ uint32_t m_drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 m_cache_dirty; /* true if we need to flush the cache */
+ uint8_t m_cache_dirty; /* true if we need to flush the cache */
/* tables */
- UINT8 m_fpmode[4]; /* FPU mode table */
+ uint8_t m_fpmode[4]; /* FPU mode table */
/* register mappings */
uml::parameter m_regmap[34]; /* parameter to register mappings for all 32 integer registers */
@@ -442,19 +442,19 @@ private:
uml::code_handle * m_exception_norecover[18/*EXCEPTION_COUNT*/]; /* array of no-recover exception handlers */
/* hotspots */
- UINT32 m_hotspot_select;
+ uint32_t m_hotspot_select;
struct
{
offs_t pc; /* PC to consider */
- UINT32 opcode; /* required opcode at that PC */
- UINT32 cycles; /* number of cycles to eat when hit */
+ uint32_t opcode; /* required opcode at that PC */
+ uint32_t cycles; /* number of cycles to eat when hit */
} m_hotspot[MIPS3_MAX_HOTSPOTS];
bool m_isdrc;
void generate_exception(int exception, int backup);
void generate_tlb_exception(int exception, offs_t address);
- void invalid_instruction(UINT32 op);
+ void invalid_instruction(uint32_t op);
void check_irqs();
public:
void mips3com_update_cycle_counting();
@@ -464,71 +464,71 @@ public:
void mips3com_tlbwr();
void mips3com_tlbp();
private:
- UINT32 compute_config_register();
- UINT32 compute_prid_register();
+ uint32_t compute_config_register();
+ uint32_t compute_prid_register();
void tlb_map_entry(int tlbindex);
void tlb_write_common(int tlbindex);
- bool RBYTE(offs_t address, UINT32 *result);
- bool RHALF(offs_t address, UINT32 *result);
- bool RWORD(offs_t address, UINT32 *result);
- bool RWORD_MASKED(offs_t address, UINT32 *result, UINT32 mem_mask);
- bool RDOUBLE(offs_t address, UINT64 *result);
- bool RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64 mem_mask);
- void WBYTE(offs_t address, UINT8 data);
- void WHALF(offs_t address, UINT16 data);
- void WWORD(offs_t address, UINT32 data);
- void WWORD_MASKED(offs_t address, UINT32 data, UINT32 mem_mask);
- void WDOUBLE(offs_t address, UINT64 data);
- void WDOUBLE_MASKED(offs_t address, UINT64 data, UINT64 mem_mask);
-
- UINT64 get_cop0_reg(int idx);
- void set_cop0_reg(int idx, UINT64 val);
- UINT64 get_cop0_creg(int idx);
- void set_cop0_creg(int idx, UINT64 val);
- void handle_cop0(UINT32 op);
-
- UINT32 get_cop1_reg32(int idx);
- UINT64 get_cop1_reg64(int idx);
- void set_cop1_reg32(int idx, UINT32 val);
- void set_cop1_reg64(int idx, UINT64 val);
- UINT64 get_cop1_creg(int idx);
- void set_cop1_creg(int idx, UINT64 val);
- void handle_cop1_fr0(UINT32 op);
- void handle_cop1_fr1(UINT32 op);
- void handle_cop1x_fr0(UINT32 op);
- void handle_cop1x_fr1(UINT32 op);
-
- UINT64 get_cop2_reg(int idx);
- void set_cop2_reg(int idx, UINT64 val);
- UINT64 get_cop2_creg(int idx);
- void set_cop2_creg(int idx, UINT64 val);
- void handle_cop2(UINT32 op);
-
- void handle_special(UINT32 op);
- void handle_regimm(UINT32 op);
-
- void lwl_be(UINT32 op);
- void lwr_be(UINT32 op);
- void ldl_be(UINT32 op);
- void ldr_be(UINT32 op);
- void swl_be(UINT32 op);
- void swr_be(UINT32 op);
- void sdl_be(UINT32 op);
- void sdr_be(UINT32 op);
- void lwl_le(UINT32 op);
- void lwr_le(UINT32 op);
- void ldl_le(UINT32 op);
- void ldr_le(UINT32 op);
- void swl_le(UINT32 op);
- void swr_le(UINT32 op);
- void sdl_le(UINT32 op);
- void sdr_le(UINT32 op);
+ bool RBYTE(offs_t address, uint32_t *result);
+ bool RHALF(offs_t address, uint32_t *result);
+ bool RWORD(offs_t address, uint32_t *result);
+ bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask);
+ bool RDOUBLE(offs_t address, uint64_t *result);
+ bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask);
+ void WBYTE(offs_t address, uint8_t data);
+ void WHALF(offs_t address, uint16_t data);
+ void WWORD(offs_t address, uint32_t data);
+ void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask);
+ void WDOUBLE(offs_t address, uint64_t data);
+ void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask);
+
+ uint64_t get_cop0_reg(int idx);
+ void set_cop0_reg(int idx, uint64_t val);
+ uint64_t get_cop0_creg(int idx);
+ void set_cop0_creg(int idx, uint64_t val);
+ void handle_cop0(uint32_t op);
+
+ uint32_t get_cop1_reg32(int idx);
+ uint64_t get_cop1_reg64(int idx);
+ void set_cop1_reg32(int idx, uint32_t val);
+ void set_cop1_reg64(int idx, uint64_t val);
+ uint64_t get_cop1_creg(int idx);
+ void set_cop1_creg(int idx, uint64_t val);
+ void handle_cop1_fr0(uint32_t op);
+ void handle_cop1_fr1(uint32_t op);
+ void handle_cop1x_fr0(uint32_t op);
+ void handle_cop1x_fr1(uint32_t op);
+
+ uint64_t get_cop2_reg(int idx);
+ void set_cop2_reg(int idx, uint64_t val);
+ uint64_t get_cop2_creg(int idx);
+ void set_cop2_creg(int idx, uint64_t val);
+ void handle_cop2(uint32_t op);
+
+ void handle_special(uint32_t op);
+ void handle_regimm(uint32_t op);
+
+ void lwl_be(uint32_t op);
+ void lwr_be(uint32_t op);
+ void ldl_be(uint32_t op);
+ void ldr_be(uint32_t op);
+ void swl_be(uint32_t op);
+ void swr_be(uint32_t op);
+ void sdl_be(uint32_t op);
+ void sdr_be(uint32_t op);
+ void lwl_le(uint32_t op);
+ void lwr_le(uint32_t op);
+ void ldl_le(uint32_t op);
+ void ldr_le(uint32_t op);
+ void swl_le(uint32_t op);
+ void swr_le(uint32_t op);
+ void sdl_le(uint32_t op);
+ void sdr_le(uint32_t op);
void load_fast_iregs(drcuml_block *block);
void save_fast_iregs(drcuml_block *block);
void code_flush_cache();
- void code_compile_block(UINT8 mode, offs_t pc);
+ void code_compile_block(uint8_t mode, offs_t pc);
public:
void func_get_cycles();
void func_printf_exception();
@@ -540,29 +540,29 @@ private:
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_tlb_mismatch();
- void static_generate_exception(UINT8 exception, int recover, const char *name);
+ void static_generate_exception(uint8_t exception, int recover, const char *name);
void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle **handleptr);
void generate_update_mode(drcuml_block *block);
void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, int allow_exception);
void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 linkreg);
+ void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg);
int generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_idt(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- int generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 reg);
- int generate_get_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 reg);
+ int generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg);
+ int generate_get_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg);
int generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_cop1_fr0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_cop1_fr1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_get_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param);
- void generate_get_cop1_reg64_d2i(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param);
- void generate_set_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param);
- void generate_set_cop1_reg64_i2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param);
+ void generate_get_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param);
+ void generate_get_cop1_reg64_d2i(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param);
+ void generate_set_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param);
+ void generate_set_cop1_reg64_i2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param);
int generate_cop1x_fr0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_cop1x_fr1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
@@ -570,9 +570,9 @@ private:
void check_cop1_access(drcuml_block *block);
void generate_badcop(drcuml_block *block, const int cop);
- void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op);
- const char *log_desc_flags_to_string(UINT32 flags);
- void log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist);
+ void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
+ const char *log_desc_flags_to_string(uint32_t flags);
+ void log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent);
};
@@ -582,7 +582,7 @@ class vr4300be_device : public mips3_device
{
public:
// construction/destruction
- vr4300be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ vr4300be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, VR4300BE, "VR4300 (big)", tag, owner, clock, "vr4300be", MIPS3_TYPE_VR4300, ENDIANNESS_BIG)
{ }
};
@@ -591,7 +591,7 @@ class vr4300le_device : public mips3_device
{
public:
// construction/destruction
- vr4300le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ vr4300le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, VR4300LE, "VR4300 (little)", tag, owner, clock, "vr4300le", MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE)
{ }
};
@@ -600,7 +600,7 @@ class vr4310be_device : public mips3_device
{
public:
// construction/destruction
- vr4310be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ vr4310be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, VR4310BE, "VR4310 (big)", tag, owner, clock, "vr4310be", MIPS3_TYPE_VR4300, ENDIANNESS_BIG)
{ }
};
@@ -609,7 +609,7 @@ class vr4310le_device : public mips3_device
{
public:
// construction/destruction
- vr4310le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ vr4310le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, VR4310LE, "VR4310 (little)", tag, owner, clock, "vr4310le", MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE)
{ }
};
@@ -618,7 +618,7 @@ class r4600be_device : public mips3_device
{
public:
// construction/destruction
- r4600be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ r4600be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, R4600BE, "R4600 (big)", tag, owner, clock, "r4600be", MIPS3_TYPE_R4600, ENDIANNESS_BIG)
{ }
};
@@ -627,7 +627,7 @@ class r4600le_device : public mips3_device
{
public:
// construction/destruction
- r4600le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ r4600le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, R4600LE, "R4600 (little)", tag, owner, clock, "r4600le", MIPS3_TYPE_R4600, ENDIANNESS_LITTLE)
{ }
};
@@ -636,7 +636,7 @@ class r4650be_device : public mips3_device
{
public:
// construction/destruction
- r4650be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ r4650be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, R4650BE, "IDT R4650 (big)", tag, owner, clock, "r4650be", MIPS3_TYPE_R4650, ENDIANNESS_BIG)
{ }
};
@@ -645,7 +645,7 @@ class r4650le_device : public mips3_device
{
public:
// construction/destruction
- r4650le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ r4650le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, R4650LE, "IDT R4650 (little)", tag, owner, clock, "r4650le", MIPS3_TYPE_R4650, ENDIANNESS_LITTLE)
{ }
};
@@ -654,7 +654,7 @@ class r4700be_device : public mips3_device
{
public:
// construction/destruction
- r4700be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ r4700be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, R4700BE, "R4700 (big)", tag, owner, clock, "r4700be", MIPS3_TYPE_R4700, ENDIANNESS_BIG)
{ }
};
@@ -663,7 +663,7 @@ class r4700le_device : public mips3_device
{
public:
// construction/destruction
- r4700le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ r4700le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, R4700LE, "R4700 (little)", tag, owner, clock, "r4700le", MIPS3_TYPE_R4700, ENDIANNESS_LITTLE)
{ }
};
@@ -672,7 +672,7 @@ class r5000be_device : public mips3_device
{
public:
// construction/destruction
- r5000be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ r5000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, R5000BE, "R5000 (big)", tag, owner, clock, "r5000be", MIPS3_TYPE_R5000, ENDIANNESS_BIG)
{ }
};
@@ -681,7 +681,7 @@ class r5000le_device : public mips3_device
{
public:
// construction/destruction
- r5000le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ r5000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, R5000LE, "R5000 (little)", tag, owner, clock, "r5000le", MIPS3_TYPE_R5000, ENDIANNESS_LITTLE)
{ }
};
@@ -690,7 +690,7 @@ class qed5271be_device : public mips3_device
{
public:
// construction/destruction
- qed5271be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ qed5271be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, QED5271BE, "QED5271 (big)", tag, owner, clock, "qed5271be", MIPS3_TYPE_QED5271, ENDIANNESS_BIG)
{ }
};
@@ -699,7 +699,7 @@ class qed5271le_device : public mips3_device
{
public:
// construction/destruction
- qed5271le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ qed5271le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, QED5271LE, "QED5271 (little)", tag, owner, clock, "qed5271le", MIPS3_TYPE_QED5271, ENDIANNESS_LITTLE)
{ }
};
@@ -708,7 +708,7 @@ class rm7000be_device : public mips3_device
{
public:
// construction/destruction
- rm7000be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ rm7000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, RM7000BE, "RM7000 (big)", tag, owner, clock, "rm7000be", MIPS3_TYPE_RM7000, ENDIANNESS_BIG)
{ }
};
@@ -717,7 +717,7 @@ class rm7000le_device : public mips3_device
{
public:
// construction/destruction
- rm7000le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ rm7000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mips3_device(mconfig, RM7000LE, "RM7000 (little)", tag, owner, clock, "rm7000le", MIPS3_TYPE_RM7000, ENDIANNESS_LITTLE)
{ }
};
@@ -728,7 +728,7 @@ class mips3_frontend : public drc_frontend
{
public:
// construction/destruction
- mips3_frontend(mips3_device *mips3, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
+ mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
protected:
// required overrides
@@ -736,13 +736,13 @@ protected:
private:
// internal helpers
- bool describe_special(UINT32 op, opcode_desc &desc);
- bool describe_regimm(UINT32 op, opcode_desc &desc);
- bool describe_idt(UINT32 op, opcode_desc &desc);
- bool describe_cop0(UINT32 op, opcode_desc &desc);
- bool describe_cop1(UINT32 op, opcode_desc &desc);
- bool describe_cop1x(UINT32 op, opcode_desc &desc);
- bool describe_cop2(UINT32 op, opcode_desc &desc);
+ bool describe_special(uint32_t op, opcode_desc &desc);
+ bool describe_regimm(uint32_t op, opcode_desc &desc);
+ bool describe_idt(uint32_t op, opcode_desc &desc);
+ bool describe_cop0(uint32_t op, opcode_desc &desc);
+ bool describe_cop1(uint32_t op, opcode_desc &desc);
+ bool describe_cop1x(uint32_t op, opcode_desc &desc);
+ bool describe_cop2(uint32_t op, opcode_desc &desc);
// internal state
mips3_device *m_mips3;
diff --git a/src/devices/cpu/mips/mips3com.cpp b/src/devices/cpu/mips/mips3com.cpp
index 48b9a4ece76..8da695c4833 100644
--- a/src/devices/cpu/mips/mips3com.cpp
+++ b/src/devices/cpu/mips/mips3com.cpp
@@ -29,7 +29,7 @@ static void tlb_entry_log_half(mips3_tlb_entry *entry, int tlbindex, int which);
TLB entry matches the provided ASID
-------------------------------------------------*/
-static inline int tlb_entry_matches_asid(const mips3_tlb_entry *entry, UINT8 asid)
+static inline int tlb_entry_matches_asid(const mips3_tlb_entry *entry, uint8_t asid)
{
return (entry->entry_hi & 0xff) == asid;
}
@@ -72,11 +72,11 @@ void mips3_device::mips3com_update_cycle_counting()
/* modify the timer to go off */
if (m_core->compare_armed)
{
- UINT32 count = (total_cycles() - m_core->count_zero_time) / 2;
- UINT32 compare = m_core->cpr[0][COP0_Compare];
- UINT32 delta = compare - count;
+ uint32_t count = (total_cycles() - m_core->count_zero_time) / 2;
+ uint32_t compare = m_core->cpr[0][COP0_Compare];
+ uint32_t delta = compare - count;
m_core->compare_armed = 0;
- attotime newtime = cycles_to_attotime((UINT64)delta * 2);
+ attotime newtime = cycles_to_attotime((uint64_t)delta * 2);
m_compare_int_timer->adjust(newtime);
return;
}
@@ -108,7 +108,7 @@ void mips3_device::mips3com_asid_changed()
void mips3_device::mips3com_tlbr()
{
- UINT32 tlbindex = m_core->cpr[0][COP0_Index] & 0x3f;
+ uint32_t tlbindex = m_core->cpr[0][COP0_Index] & 0x3f;
/* only handle entries within the TLB */
if (tlbindex < m_tlbentries)
@@ -141,9 +141,9 @@ void mips3_device::mips3com_tlbwi()
void mips3_device::mips3com_tlbwr()
{
- UINT32 wired = m_core->cpr[0][COP0_Wired] & 0x3f;
- UINT32 unwired = m_tlbentries - wired;
- UINT32 tlbindex = m_tlbentries - 1;
+ uint32_t wired = m_core->cpr[0][COP0_Wired] & 0x3f;
+ uint32_t unwired = m_tlbentries - wired;
+ uint32_t tlbindex = m_tlbentries - 1;
/* "random" is based off of the current cycle counting through the non-wired pages */
if (unwired > 0)
@@ -160,13 +160,13 @@ void mips3_device::mips3com_tlbwr()
void mips3_device::mips3com_tlbp()
{
- UINT32 tlbindex;
+ uint32_t tlbindex;
/* iterate over TLB entries */
for (tlbindex = 0; tlbindex < m_tlbentries; tlbindex++)
{
mips3_tlb_entry *entry = &m_tlb[tlbindex];
- UINT64 mask = ~((entry->page_mask >> 13) & 0xfff) << 13;
+ uint64_t mask = ~((entry->page_mask >> 13) & 0xfff) << 13;
/* if the relevant bits of EntryHi match the relevant bits of the TLB */
if ((entry->entry_hi & mask) == (m_core->cpr[0][COP0_EntryHi] & mask))
@@ -207,10 +207,10 @@ TIMER_CALLBACK_MEMBER( mips3_device::compare_int_callback )
of the config register
-------------------------------------------------*/
-UINT32 mips3_device::compute_config_register()
+uint32_t mips3_device::compute_config_register()
{
/* set the cache line size to 32 bytes */
- UINT32 configreg = 0x00026030;
+ uint32_t configreg = 0x00026030;
int divisor;
// NEC VR series does not use a 100% compatible COP0/TLB implementation
@@ -280,7 +280,7 @@ UINT32 mips3_device::compute_config_register()
of the PRId register
-------------------------------------------------*/
-UINT32 mips3_device::compute_prid_register()
+uint32_t mips3_device::compute_prid_register()
{
switch (m_flavor)
{
@@ -318,7 +318,7 @@ void mips3_device::tlb_map_entry(int tlbindex)
{
int current_asid = m_core->cpr[0][COP0_EntryHi] & 0xff;
mips3_tlb_entry *entry = &m_tlb[tlbindex];
- UINT32 count, vpn;
+ uint32_t count, vpn;
int which;
/* the ASID doesn't match the current ASID, and if the page isn't global, unmap it from the TLB */
@@ -344,10 +344,10 @@ void mips3_device::tlb_map_entry(int tlbindex)
/* loop over both the even and odd pages */
for (which = 0; which < 2; which++)
{
- UINT32 effvpn = vpn + count * which;
- UINT64 lo = entry->entry_lo[which];
- UINT32 pfn;
- UINT32 flags = 0;
+ uint32_t effvpn = vpn + count * which;
+ uint64_t lo = entry->entry_lo[which];
+ uint32_t pfn;
+ uint32_t flags = 0;
/* compute physical page index */
pfn = (lo >> 6) & m_pfnmask;
@@ -412,21 +412,21 @@ static void tlb_entry_log_half(mips3_tlb_entry *entry, int tlbindex, int which)
{
if (PRINTF_TLB)
{
- UINT64 hi = entry->entry_hi;
- UINT64 lo = entry->entry_lo[which];
- UINT32 vpn = (((hi >> 13) & 0x07ffffff) << 1);
- UINT32 asid = hi & 0xff;
- UINT32 r = (hi >> 62) & 3;
- UINT32 pfn = (lo >> 6) & 0x00ffffff;
- UINT32 c = (lo >> 3) & 7;
- UINT32 pagesize = (((entry->page_mask >> 13) & 0xfff) + 1) << MIPS3_MIN_PAGE_SHIFT;
- UINT64 vaddr = (UINT64)vpn * MIPS3_MIN_PAGE_SIZE;
- UINT64 paddr = (UINT64)pfn * MIPS3_MIN_PAGE_SIZE;
+ uint64_t hi = entry->entry_hi;
+ uint64_t lo = entry->entry_lo[which];
+ uint32_t vpn = (((hi >> 13) & 0x07ffffff) << 1);
+ uint32_t asid = hi & 0xff;
+ uint32_t r = (hi >> 62) & 3;
+ uint32_t pfn = (lo >> 6) & 0x00ffffff;
+ uint32_t c = (lo >> 3) & 7;
+ uint32_t pagesize = (((entry->page_mask >> 13) & 0xfff) + 1) << MIPS3_MIN_PAGE_SHIFT;
+ uint64_t vaddr = (uint64_t)vpn * MIPS3_MIN_PAGE_SIZE;
+ uint64_t paddr = (uint64_t)pfn * MIPS3_MIN_PAGE_SIZE;
vaddr += pagesize * which;
printf("index=%08X pagesize=%08X vaddr=%08X%08X paddr=%08X%08X asid=%02X r=%X c=%X dvg=%c%c%c\n",
- tlbindex, pagesize, (UINT32)(vaddr >> 32), (UINT32)vaddr, (UINT32)(paddr >> 32), (UINT32)paddr,
+ tlbindex, pagesize, (uint32_t)(vaddr >> 32), (uint32_t)vaddr, (uint32_t)(paddr >> 32), (uint32_t)paddr,
asid, r, c, (lo & 4) ? 'd' : '.', (lo & 2) ? 'v' : '.', (lo & 1) ? 'g' : '.');
}
}
diff --git a/src/devices/cpu/mips/mips3com.h b/src/devices/cpu/mips/mips3com.h
index 20facae78d0..677289a7763 100644
--- a/src/devices/cpu/mips/mips3com.h
+++ b/src/devices/cpu/mips/mips3com.h
@@ -59,7 +59,7 @@
-#define LOPTR(x) ((UINT32 *)(x) + NATIVE_ENDIAN_VALUE_LE_BE(0,1))
+#define LOPTR(x) ((uint32_t *)(x) + NATIVE_ENDIAN_VALUE_LE_BE(0,1))
/***************************************************************************
@@ -182,8 +182,8 @@
#define IS_FLOAT(o) (((o) & (1 << 23)) == 0)
#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0)
-#define SIMMVAL ((INT16)op)
-#define UIMMVAL ((UINT16)op)
+#define SIMMVAL ((int16_t)op)
+#define UIMMVAL ((uint16_t)op)
#define LIMMVAL (op & 0x03ffffff)
diff --git a/src/devices/cpu/mips/mips3drc.cpp b/src/devices/cpu/mips/mips3drc.cpp
index e3156b53f10..4d1de76e309 100644
--- a/src/devices/cpu/mips/mips3drc.cpp
+++ b/src/devices/cpu/mips/mips3drc.cpp
@@ -31,7 +31,7 @@
#include "cpu/drcuml.h"
#include "cpu/drcumlsh.h"
-extern unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op);
+extern unsigned dasmmips3(char *buffer, unsigned pc, uint32_t op);
using namespace uml;
@@ -79,7 +79,7 @@ using namespace uml;
#define FDVALD_FR1 mem((double *)&m_core->cpr[1][FDREG])
#define FCCSHIFT(which) fcc_shift[(m_flavor < MIPS3_TYPE_MIPS_IV) ? 0 : ((which) & 7)]
-#define FCCMASK(which) ((UINT32)(1 << FCCSHIFT(which)))
+#define FCCMASK(which) ((uint32_t)(1 << FCCSHIFT(which)))
@@ -97,7 +97,7 @@ static void cfunc_printf_probe(void *param);
***************************************************************************/
/* bit indexes for various FCCs */
-static const UINT8 fcc_shift[8] = { 23, 25, 26, 27, 28, 29, 30, 31 };
+static const uint8_t fcc_shift[8] = { 23, 25, 26, 27, 28, 29, 30, 31 };
/***************************************************************************
@@ -109,7 +109,7 @@ static const UINT8 fcc_shift[8] = { 23, 25, 26, 27, 28, 29, 30, 31 };
descriptor
-------------------------------------------------*/
-static inline UINT32 epc(const opcode_desc *desc)
+static inline uint32_t epc(const opcode_desc *desc)
{
return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc;
}
@@ -166,7 +166,7 @@ inline void mips3_device::save_fast_iregs(drcuml_block *block)
mips3drc_set_options - configure DRC options
-------------------------------------------------*/
-void mips3_device::mips3drc_set_options(UINT32 options)
+void mips3_device::mips3drc_set_options(uint32_t options)
{
if (!allow_drc()) return;
m_drcoptions = options;
@@ -176,7 +176,7 @@ void mips3_device::mips3drc_set_options(UINT32 options)
mips3drc_clears_fastram - clears fastram
region starting at index select_start
-------------------------------------------------*/
-void mips3_device::clear_fastram(UINT32 select_start)
+void mips3_device::clear_fastram(uint32_t select_start)
{
for (int i=select_start; i<MIPS3_MAX_FASTRAM; i++) {
m_fastram[i].start = 0;
@@ -194,7 +194,7 @@ void mips3_device::clear_fastram(UINT32 select_start)
region
-------------------------------------------------*/
-void mips3_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base)
+void mips3_device::add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
{
if (m_fastram_select < ARRAY_LENGTH(m_fastram))
{
@@ -202,9 +202,9 @@ void mips3_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, void *b
m_fastram[m_fastram_select].end = end;
m_fastram[m_fastram_select].readonly = readonly;
m_fastram[m_fastram_select].base = base;
- m_fastram[m_fastram_select].offset_base8 = (UINT8*)base - start;
- m_fastram[m_fastram_select].offset_base16 = (UINT16*)((UINT8*)base - start);
- m_fastram[m_fastram_select].offset_base32 = (UINT32*)((UINT8*)base - start);
+ m_fastram[m_fastram_select].offset_base8 = (uint8_t*)base - start;
+ m_fastram[m_fastram_select].offset_base16 = (uint16_t*)((uint8_t*)base - start);
+ m_fastram[m_fastram_select].offset_base32 = (uint32_t*)((uint8_t*)base - start);
m_fastram_select++;
}
}
@@ -214,7 +214,7 @@ void mips3_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, void *b
mips3drc_add_hotspot - add a new hotspot
-------------------------------------------------*/
-void mips3_device::mips3drc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles)
+void mips3_device::mips3drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles)
{
if (!allow_drc()) return;
if (m_hotspot_select < ARRAY_LENGTH(m_hotspot))
@@ -298,7 +298,7 @@ void mips3_device::code_flush_cache()
given mode at the specified pc
-------------------------------------------------*/
-void mips3_device::code_compile_block(UINT8 mode, offs_t pc)
+void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
{
drcuml_state *drcuml = m_drcuml.get();
compiler_state compiler = { 0 };
@@ -327,7 +327,7 @@ void mips3_device::code_compile_block(UINT8 mode, offs_t pc)
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
const opcode_desc *curdesc;
- UINT32 nextpc;
+ uint32_t nextpc;
/* add a code log entry */
if (drcuml->logging())
@@ -463,7 +463,7 @@ static void cfunc_get_cycles(void *param)
void mips3_device::func_printf_exception()
{
- printf("Exception: EPC=%08X Cause=%08X BadVAddr=%08X Jmp=%08X\n", (UINT32)m_core->cpr[0][COP0_EPC], (UINT32)m_core->cpr[0][COP0_Cause], (UINT32)m_core->cpr[0][COP0_BadVAddr], m_core->pc);
+ printf("Exception: EPC=%08X Cause=%08X BadVAddr=%08X Jmp=%08X\n", (uint32_t)m_core->cpr[0][COP0_EPC], (uint32_t)m_core->cpr[0][COP0_Cause], (uint32_t)m_core->cpr[0][COP0_BadVAddr], m_core->pc);
func_printf_probe();
}
@@ -497,47 +497,47 @@ void mips3_device::func_printf_probe()
{
printf(" PC=%08X r1=%08X%08X r2=%08X%08X r3=%08X%08X\n",
m_core->pc,
- (UINT32)(m_core->r[1] >> 32), (UINT32)m_core->r[1],
- (UINT32)(m_core->r[2] >> 32), (UINT32)m_core->r[2],
- (UINT32)(m_core->r[3] >> 32), (UINT32)m_core->r[3]);
+ (uint32_t)(m_core->r[1] >> 32), (uint32_t)m_core->r[1],
+ (uint32_t)(m_core->r[2] >> 32), (uint32_t)m_core->r[2],
+ (uint32_t)(m_core->r[3] >> 32), (uint32_t)m_core->r[3]);
printf(" r4=%08X%08X r5=%08X%08X r6=%08X%08X r7=%08X%08X\n",
- (UINT32)(m_core->r[4] >> 32), (UINT32)m_core->r[4],
- (UINT32)(m_core->r[5] >> 32), (UINT32)m_core->r[5],
- (UINT32)(m_core->r[6] >> 32), (UINT32)m_core->r[6],
- (UINT32)(m_core->r[7] >> 32), (UINT32)m_core->r[7]);
+ (uint32_t)(m_core->r[4] >> 32), (uint32_t)m_core->r[4],
+ (uint32_t)(m_core->r[5] >> 32), (uint32_t)m_core->r[5],
+ (uint32_t)(m_core->r[6] >> 32), (uint32_t)m_core->r[6],
+ (uint32_t)(m_core->r[7] >> 32), (uint32_t)m_core->r[7]);
printf(" r8=%08X%08X r9=%08X%08X r10=%08X%08X r11=%08X%08X\n",
- (UINT32)(m_core->r[8] >> 32), (UINT32)m_core->r[8],
- (UINT32)(m_core->r[9] >> 32), (UINT32)m_core->r[9],
- (UINT32)(m_core->r[10] >> 32), (UINT32)m_core->r[10],
- (UINT32)(m_core->r[11] >> 32), (UINT32)m_core->r[11]);
+ (uint32_t)(m_core->r[8] >> 32), (uint32_t)m_core->r[8],
+ (uint32_t)(m_core->r[9] >> 32), (uint32_t)m_core->r[9],
+ (uint32_t)(m_core->r[10] >> 32), (uint32_t)m_core->r[10],
+ (uint32_t)(m_core->r[11] >> 32), (uint32_t)m_core->r[11]);
printf("r12=%08X%08X r13=%08X%08X r14=%08X%08X r15=%08X%08X\n",
- (UINT32)(m_core->r[12] >> 32), (UINT32)m_core->r[12],
- (UINT32)(m_core->r[13] >> 32), (UINT32)m_core->r[13],
- (UINT32)(m_core->r[14] >> 32), (UINT32)m_core->r[14],
- (UINT32)(m_core->r[15] >> 32), (UINT32)m_core->r[15]);
+ (uint32_t)(m_core->r[12] >> 32), (uint32_t)m_core->r[12],
+ (uint32_t)(m_core->r[13] >> 32), (uint32_t)m_core->r[13],
+ (uint32_t)(m_core->r[14] >> 32), (uint32_t)m_core->r[14],
+ (uint32_t)(m_core->r[15] >> 32), (uint32_t)m_core->r[15]);
printf("r16=%08X%08X r17=%08X%08X r18=%08X%08X r19=%08X%08X\n",
- (UINT32)(m_core->r[16] >> 32), (UINT32)m_core->r[16],
- (UINT32)(m_core->r[17] >> 32), (UINT32)m_core->r[17],
- (UINT32)(m_core->r[18] >> 32), (UINT32)m_core->r[18],
- (UINT32)(m_core->r[19] >> 32), (UINT32)m_core->r[19]);
+ (uint32_t)(m_core->r[16] >> 32), (uint32_t)m_core->r[16],
+ (uint32_t)(m_core->r[17] >> 32), (uint32_t)m_core->r[17],
+ (uint32_t)(m_core->r[18] >> 32), (uint32_t)m_core->r[18],
+ (uint32_t)(m_core->r[19] >> 32), (uint32_t)m_core->r[19]);
printf("r20=%08X%08X r21=%08X%08X r22=%08X%08X r23=%08X%08X\n",
- (UINT32)(m_core->r[20] >> 32), (UINT32)m_core->r[20],
- (UINT32)(m_core->r[21] >> 32), (UINT32)m_core->r[21],
- (UINT32)(m_core->r[22] >> 32), (UINT32)m_core->r[22],
- (UINT32)(m_core->r[23] >> 32), (UINT32)m_core->r[23]);
+ (uint32_t)(m_core->r[20] >> 32), (uint32_t)m_core->r[20],
+ (uint32_t)(m_core->r[21] >> 32), (uint32_t)m_core->r[21],
+ (uint32_t)(m_core->r[22] >> 32), (uint32_t)m_core->r[22],
+ (uint32_t)(m_core->r[23] >> 32), (uint32_t)m_core->r[23]);
printf("r24=%08X%08X r25=%08X%08X r26=%08X%08X r27=%08X%08X\n",
- (UINT32)(m_core->r[24] >> 32), (UINT32)m_core->r[24],
- (UINT32)(m_core->r[25] >> 32), (UINT32)m_core->r[25],
- (UINT32)(m_core->r[26] >> 32), (UINT32)m_core->r[26],
- (UINT32)(m_core->r[27] >> 32), (UINT32)m_core->r[27]);
+ (uint32_t)(m_core->r[24] >> 32), (uint32_t)m_core->r[24],
+ (uint32_t)(m_core->r[25] >> 32), (uint32_t)m_core->r[25],
+ (uint32_t)(m_core->r[26] >> 32), (uint32_t)m_core->r[26],
+ (uint32_t)(m_core->r[27] >> 32), (uint32_t)m_core->r[27]);
printf("r28=%08X%08X r29=%08X%08X r30=%08X%08X r31=%08X%08X\n",
- (UINT32)(m_core->r[28] >> 32), (UINT32)m_core->r[28],
- (UINT32)(m_core->r[29] >> 32), (UINT32)m_core->r[29],
- (UINT32)(m_core->r[30] >> 32), (UINT32)m_core->r[30],
- (UINT32)(m_core->r[31] >> 32), (UINT32)m_core->r[31]);
+ (uint32_t)(m_core->r[28] >> 32), (uint32_t)m_core->r[28],
+ (uint32_t)(m_core->r[29] >> 32), (uint32_t)m_core->r[29],
+ (uint32_t)(m_core->r[30] >> 32), (uint32_t)m_core->r[30],
+ (uint32_t)(m_core->r[31] >> 32), (uint32_t)m_core->r[31]);
printf(" hi=%08X%08X lo=%08X%08X\n",
- (UINT32)(m_core->r[REG_HI] >> 32), (UINT32)m_core->r[REG_HI],
- (UINT32)(m_core->r[REG_LO] >> 32), (UINT32)m_core->r[REG_LO]);
+ (uint32_t)(m_core->r[REG_HI] >> 32), (uint32_t)m_core->r[REG_HI],
+ (uint32_t)(m_core->r[REG_LO] >> 32), (uint32_t)m_core->r[REG_LO]);
}
static void cfunc_printf_probe(void *param)
@@ -552,7 +552,7 @@ static void cfunc_printf_probe(void *param)
void mips3_device::func_unimplemented()
{
- UINT32 opcode = m_core->arg0;
+ uint32_t opcode = m_core->arg0;
fatalerror("PC=%08X: Unimplemented op %08X (%02X,%02X)\n", m_core->pc, opcode, opcode >> 26, opcode & 0x3f);
}
@@ -719,11 +719,11 @@ void mips3_device::static_generate_tlb_mismatch()
exception handler
-------------------------------------------------*/
-void mips3_device::static_generate_exception(UINT8 exception, int recover, const char *name)
+void mips3_device::static_generate_exception(uint8_t exception, int recover, const char *name)
{
code_handle *&exception_handle = recover ? m_exception[exception] : m_exception_norecover[exception];
drcuml_state *drcuml = m_drcuml.get();
- UINT32 offset = 0x180;
+ uint32_t offset = 0x180;
code_label next = 1;
code_label skip = 2;
drcuml_block *block;
@@ -868,8 +868,8 @@ void mips3_device::static_generate_memory_accessor(int mode, int size, int iswri
for (ramnum = 0; ramnum < MIPS3_MAX_FASTRAM; ramnum++)
if (m_fastram[ramnum].base != nullptr && (!iswrite || !m_fastram[ramnum].readonly))
{
- void *fastbase = (UINT8 *)m_fastram[ramnum].base - m_fastram[ramnum].start;
- UINT32 skip = label++;
+ void *fastbase = (uint8_t *)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ uint32_t skip = label++;
if (m_fastram[ramnum].end != 0xffffffff)
{
UML_CMP(block, I0, m_fastram[ramnum].end); // cmp i0,end
@@ -1114,7 +1114,7 @@ void mips3_device::generate_checksum_block(drcuml_block *block, compiler_state *
{
if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP))
{
- UINT32 sum = seqhead->opptr.l[0];
+ uint32_t sum = seqhead->opptr.l[0];
void *base = m_direct->read_ptr(seqhead->physpc);
UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
@@ -1146,7 +1146,7 @@ void mips3_device::generate_checksum_block(drcuml_block *block, compiler_state *
UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc
}
#else
- UINT32 sum = 0;
+ uint32_t sum = 0;
void *base = m_direct->read_ptr(seqhead->physpc);
UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
sum += seqhead->opptr.l[0];
@@ -1299,10 +1299,10 @@ void mips3_device::generate_sequence_instruction(drcuml_block *block, compiler_s
generate_delay_slot_and_branch
------------------------------------------------------------------*/
-void mips3_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 linkreg)
+void mips3_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg)
{
compiler_state compiler_temp = *compiler;
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
/* fetch the target register if dynamic, in case it is modified by the delay slot */
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
@@ -1314,7 +1314,7 @@ void mips3_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_
/* set the link if needed -- before the delay slot */
if (linkreg != 0)
{
- UML_DMOV(block, R64(linkreg), (INT32)(desc->pc + 8)); // dmov <linkreg>,desc->pc + 8
+ UML_DMOV(block, R64(linkreg), (int32_t)(desc->pc + 8)); // dmov <linkreg>,desc->pc + 8
}
/* compile the delay slot using temporary compiler state */
@@ -1356,8 +1356,8 @@ void mips3_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_
int mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = op >> 26;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = op >> 26;
code_label skip;
switch (opswitch)
@@ -1624,12 +1624,12 @@ int mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
UML_AND(block, I0, I0, ~7); // and i0,i0,~7
if (!m_bigendian)
UML_XOR(block, I1, I1, 0x38); // xor i1,i1,0x38
- UML_DSHR(block, I2, (UINT64)~0, I1); // dshr i2,~0,i1
+ UML_DSHR(block, I2, (uint64_t)~0, I1); // dshr i2,~0,i1
UML_CALLH(block, *m_read64mask[m_core->mode >> 1]);
// callh read64mask
if (RTREG != 0)
{
- UML_DSHL(block, I2, (UINT64)~0, I1); // dshl i2,~0,i1
+ UML_DSHL(block, I2, (uint64_t)~0, I1); // dshl i2,~0,i1
UML_DROLINS(block, R64(RTREG), I0, I1, I2); // drolins <rtreg>,i0,i1,i2
}
if (!in_delay_slot)
@@ -1642,11 +1642,11 @@ int mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
UML_AND(block, I0, I0, ~7); // and i0,i0,~7
if (m_bigendian)
UML_XOR(block, I1, I1, 0x38); // xor i1,i1,0x38
- UML_DSHL(block, I2, (UINT64)~0, I1); // dshl i2,~0,i1
+ UML_DSHL(block, I2, (uint64_t)~0, I1); // dshl i2,~0,i1
UML_CALLH(block, *m_read64mask[m_core->mode >> 1]); // callh read64mask
if (RTREG != 0)
{
- UML_DSHR(block, I2, (UINT64)~0, I1); // dshr i2,~0,i1
+ UML_DSHR(block, I2, (uint64_t)~0, I1); // dshr i2,~0,i1
UML_SUB(block, I1, 64, I1); // sub i1,64,i1
UML_DROLINS(block, R64(RTREG), I0, I1, I2); // drolins <rtreg>,i0,i1,i2
}
@@ -1784,7 +1784,7 @@ int mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
if (!m_bigendian)
UML_XOR(block, I3, I3, 0x38); // xor i3,i3,0x38
- UML_DSHR(block, I2, (UINT64)~0, I3); // dshr i2,~0,i3
+ UML_DSHR(block, I2, (uint64_t)~0, I3); // dshr i2,~0,i3
UML_DSHR(block, I1, I1, I3); // dshr i1,i1,i3
UML_CALLH(block, *m_write64mask[m_core->mode >> 1]);// callh write64mask
@@ -1799,7 +1799,7 @@ int mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
if (m_bigendian)
UML_XOR(block, I3, I3, 0x38); // xor i3,i3,0x38
- UML_DSHL(block, I2, (UINT64)~0, I3); // dshl i2,~0,i3
+ UML_DSHL(block, I2, (uint64_t)~0, I3); // dshl i2,~0,i3
UML_DSHL(block, I1, I1, I3); // dshl i1,i1,i3
UML_CALLH(block, *m_write64mask[m_core->mode >> 1]);// callh write64mask
@@ -1889,8 +1889,8 @@ int mips3_device::generate_opcode(drcuml_block *block, compiler_state *compiler,
int mips3_device::generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = op & 63;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = op & 63;
switch (opswitch)
{
@@ -2138,7 +2138,7 @@ int mips3_device::generate_special(drcuml_block *block, compiler_state *compiler
if (RDREG != 0)
{
UML_DOR(block, I0, R64(RSREG), R64(RTREG)); // dor i0,<rsreg>,<rtreg>
- UML_DXOR(block, R64(RDREG), I0, (UINT64)~0); // dxor <rdreg>,i0,~0
+ UML_DXOR(block, R64(RDREG), I0, (uint64_t)~0); // dxor <rdreg>,i0,~0
}
return TRUE;
@@ -2282,8 +2282,8 @@ int mips3_device::generate_special(drcuml_block *block, compiler_state *compiler
int mips3_device::generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = RTREG;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = RTREG;
code_label skip;
switch (opswitch)
@@ -2294,7 +2294,7 @@ int mips3_device::generate_regimm(drcuml_block *block, compiler_state *compiler,
case 0x12: /* BLTZALL */
if (opswitch & 0x10)
{
- UML_DMOV(block, R64(31), (INT32)(desc->pc + 8));
+ UML_DMOV(block, R64(31), (int32_t)(desc->pc + 8));
}
if (RSREG != 0)
{
@@ -2312,7 +2312,7 @@ int mips3_device::generate_regimm(drcuml_block *block, compiler_state *compiler,
case 0x13: /* BGEZALL */
if (opswitch & 0x10)
{
- UML_DMOV(block, R64(31), (INT32)(desc->pc + 8));
+ UML_DMOV(block, R64(31), (int32_t)(desc->pc + 8));
}
if (RSREG != 0)
@@ -2369,8 +2369,8 @@ int mips3_device::generate_regimm(drcuml_block *block, compiler_state *compiler,
int mips3_device::generate_idt(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = op & 0x1f;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = op & 0x1f;
/* only enabled on IDT processors */
if (m_flavor != MIPS3_TYPE_R4650)
@@ -2417,7 +2417,7 @@ int mips3_device::generate_idt(drcuml_block *block, compiler_state *compiler, co
handle special COP0 registers
-------------------------------------------------*/
-int mips3_device::generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 reg)
+int mips3_device::generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
code_label link;
@@ -2491,7 +2491,7 @@ int mips3_device::generate_set_cop0_reg(drcuml_block *block, compiler_state *com
read special COP0 registers
-------------------------------------------------*/
-int mips3_device::generate_get_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 reg)
+int mips3_device::generate_get_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg)
{
code_label link1, link2;
@@ -2559,8 +2559,8 @@ void mips3_device::check_cop0_access(drcuml_block *block)
int mips3_device::generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = RSREG;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = RSREG;
int skip;
/* generate an exception if COP0 is disabled unless we are in kernel mode */
@@ -2691,7 +2691,7 @@ void mips3_device::check_cop1_access(drcuml_block *block)
}
}
-void mips3_device::generate_get_cop1_reg64_d2i(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param)
+void mips3_device::generate_get_cop1_reg64_d2i(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param)
{
if ((m_core->mode & 1) == 0)
{
@@ -2707,7 +2707,7 @@ void mips3_device::generate_get_cop1_reg64_d2i(drcuml_block *block, compiler_sta
}
}
-void mips3_device::generate_get_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param)
+void mips3_device::generate_get_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param)
{
if ((m_core->mode & 1) == 0)
{
@@ -2723,7 +2723,7 @@ void mips3_device::generate_get_cop1_reg64(drcuml_block *block, compiler_state *
}
}
-void mips3_device::generate_set_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param)
+void mips3_device::generate_set_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param)
{
if ((m_core->mode & 1) == 0)
{
@@ -2740,7 +2740,7 @@ void mips3_device::generate_set_cop1_reg64(drcuml_block *block, compiler_state *
}
}
-void mips3_device::generate_set_cop1_reg64_i2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param)
+void mips3_device::generate_set_cop1_reg64_i2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param)
{
if ((m_core->mode & 1) == 0)
{
@@ -2763,7 +2763,7 @@ void mips3_device::generate_set_cop1_reg64_i2d(drcuml_block *block, compiler_sta
int mips3_device::generate_cop1_fr0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
code_label skip;
condition_t condition;
@@ -3349,7 +3349,7 @@ int mips3_device::generate_cop1_fr0(drcuml_block *block, compiler_state *compile
int mips3_device::generate_cop1_fr1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
code_label skip;
condition_t condition;
@@ -3732,7 +3732,7 @@ int mips3_device::generate_cop1_fr1(drcuml_block *block, compiler_state *compile
int mips3_device::generate_cop1x_fr0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
check_cop1_access(block);
@@ -3845,7 +3845,7 @@ int mips3_device::generate_cop1x_fr0(drcuml_block *block, compiler_state *compil
int mips3_device::generate_cop1x_fr1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
check_cop1_access(block);
@@ -3945,7 +3945,7 @@ int mips3_device::generate_cop1x_fr1(drcuml_block *block, compiler_state *compil
including disassembly of a MIPS instruction
-------------------------------------------------*/
-void mips3_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op)
+void mips3_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
{
if (m_drcuml->logging())
{
@@ -3962,7 +3962,7 @@ void mips3_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32
flags
-------------------------------------------------*/
-const char *mips3_device::log_desc_flags_to_string(UINT32 flags)
+const char *mips3_device::log_desc_flags_to_string(uint32_t flags)
{
static char tempbuf[30];
char *dest = tempbuf;
@@ -4016,7 +4016,7 @@ const char *mips3_device::log_desc_flags_to_string(UINT32 flags)
log_register_list - log a list of GPR registers
-------------------------------------------------*/
-void mips3_device::log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist)
+void mips3_device::log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist)
{
int count = 0;
int regnum;
diff --git a/src/devices/cpu/mips/mips3dsm.cpp b/src/devices/cpu/mips/mips3dsm.cpp
index 0eca3d73c54..8c9442f05ff 100644
--- a/src/devices/cpu/mips/mips3dsm.cpp
+++ b/src/devices/cpu/mips/mips3dsm.cpp
@@ -101,7 +101,7 @@ static const char *const ccreg[4][32] =
CODE CODE
***************************************************************************/
-static inline char *signed_16bit(INT16 val)
+static inline char *signed_16bit(int16_t val)
{
static char temp[10];
if (val < 0)
@@ -111,11 +111,11 @@ static inline char *signed_16bit(INT16 val)
return temp;
}
-static UINT32 dasm_cop0(UINT32 pc, UINT32 op, char *buffer)
+static uint32_t dasm_cop0(uint32_t pc, uint32_t op, char *buffer)
{
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch ((op >> 21) & 31)
{
@@ -128,8 +128,8 @@ static UINT32 dasm_cop0(UINT32 pc, UINT32 op, char *buffer)
case 0x08: /* BC */
switch (rt)
{
- case 0x00: sprintf(buffer, "bc0f $%08x", pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bc0t $%08x", pc + 4 + ((INT16)op << 2)); break;
+ case 0x00: sprintf(buffer, "bc0f $%08x", pc + 4 + ((int16_t)op << 2)); break;
+ case 0x01: sprintf(buffer, "bc0t $%08x", pc + 4 + ((int16_t)op << 2)); break;
case 0x02: sprintf(buffer, "bc0fl [invalid]"); break;
case 0x03: sprintf(buffer, "bc0tl [invalid]"); break;
default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
@@ -167,7 +167,7 @@ static UINT32 dasm_cop0(UINT32 pc, UINT32 op, char *buffer)
return flags;
}
-static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
+static uint32_t dasm_cop1(uint32_t pc, uint32_t op, char *buffer)
{
static const char *const format_table[] =
{
@@ -180,7 +180,7 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
int fd = (op >> 6) & 31;
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch ((op >> 21) & 31)
{
@@ -193,10 +193,10 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
case 0x08: /* BC */
switch (rt & 3)
{
- case 0x00: sprintf(buffer, "bc1f $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
- case 0x01: sprintf(buffer, "bc1t $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
- case 0x02: sprintf(buffer, "bc1fl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x03: sprintf(buffer, "bc1tl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x00: sprintf(buffer, "bc1f $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); break;
+ case 0x01: sprintf(buffer, "bc1t $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); break;
+ case 0x02: sprintf(buffer, "bc1fl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x03: sprintf(buffer, "bc1tl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
}
break;
default: /* COP */
@@ -250,7 +250,7 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
return flags;
}
-static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
+static uint32_t dasm_cop1x(uint32_t pc, uint32_t op, char *buffer)
{
static const char *const format3_table[] =
{
@@ -264,7 +264,7 @@ static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
int rs = (op >> 21) & 31;
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch (op & 0x3f)
{
@@ -310,11 +310,11 @@ static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
return flags;
}
-static UINT32 dasm_cop2(UINT32 pc, UINT32 op, char *buffer)
+static uint32_t dasm_cop2(uint32_t pc, uint32_t op, char *buffer)
{
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch ((op >> 21) & 31)
{
@@ -327,8 +327,8 @@ static UINT32 dasm_cop2(UINT32 pc, UINT32 op, char *buffer)
case 0x08: /* BC */
switch (rt)
{
- case 0x00: sprintf(buffer, "bc2f $%08x", pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bc2t $%08x", pc + 4 + ((INT16)op << 2)); break;
+ case 0x00: sprintf(buffer, "bc2f $%08x", pc + 4 + ((int16_t)op << 2)); break;
+ case 0x01: sprintf(buffer, "bc2t $%08x", pc + 4 + ((int16_t)op << 2)); break;
case 0x02: sprintf(buffer, "bc2fl [invalid]"); break;
case 0x03: sprintf(buffer, "bc2tl [invalid]"); break;
default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
@@ -357,13 +357,13 @@ static UINT32 dasm_cop2(UINT32 pc, UINT32 op, char *buffer)
return flags;
}
-unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op)
+unsigned dasmmips3(char *buffer, unsigned pc, uint32_t op)
{
int rs = (op >> 21) & 31;
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
int shift = (op >> 6) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch (op >> 26)
{
@@ -441,20 +441,20 @@ unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op)
case 0x01: /* REGIMM */
switch ((op >> 16) & 31)
{
- case 0x00: sprintf(buffer, "bltz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bgez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x02: sprintf(buffer, "bltzl %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x03: sprintf(buffer, "bgezl %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x00: sprintf(buffer, "bltz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x01: sprintf(buffer, "bgez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x02: sprintf(buffer, "bltzl %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x03: sprintf(buffer, "bgezl %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
case 0x08: sprintf(buffer, "tgei %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
case 0x09: sprintf(buffer, "tgeiu %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
case 0x0a: sprintf(buffer, "tlti %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
case 0x0b: sprintf(buffer, "tltiu %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
case 0x0c: sprintf(buffer, "teqi %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
case 0x0e: sprintf(buffer, "tnei %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
- case 0x10: sprintf(buffer, "bltzal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x11: sprintf(buffer, "bgezal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x12: sprintf(buffer, "bltzall %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x13: sprintf(buffer, "bgezall %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x10: sprintf(buffer, "bltzal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x11: sprintf(buffer, "bgezal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x12: sprintf(buffer, "bltzall %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x13: sprintf(buffer, "bgezall %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
@@ -462,29 +462,29 @@ unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op)
case 0x02: sprintf(buffer, "j $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break;
case 0x03: sprintf(buffer, "jal $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
case 0x04: if (rs == 0 && rt == 0)
- sprintf(buffer, "b $%08x", pc + 4 + ((INT16)op << 2));
+ sprintf(buffer, "b $%08x", pc + 4 + ((int16_t)op << 2));
else
- sprintf(buffer, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));
+ sprintf(buffer, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
break;
- case 0x05: sprintf(buffer, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x06: sprintf(buffer, "blez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x07: sprintf(buffer, "bgtz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x05: sprintf(buffer, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
+ case 0x06: sprintf(buffer, "blez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x07: sprintf(buffer, "bgtz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
case 0x08: sprintf(buffer, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x09: sprintf(buffer, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x0a: sprintf(buffer, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x0b: sprintf(buffer, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0c: sprintf(buffer, "andi %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0d: sprintf(buffer, "ori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0e: sprintf(buffer, "xori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0f: sprintf(buffer, "lui %s,$%04x", reg[rt], (UINT16)op); break;
+ case 0x0c: sprintf(buffer, "andi %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0d: sprintf(buffer, "ori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0e: sprintf(buffer, "xori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0f: sprintf(buffer, "lui %s,$%04x", reg[rt], (uint16_t)op); break;
case 0x10: flags = dasm_cop0(pc, op, buffer); break;
case 0x11: flags = dasm_cop1(pc, op, buffer); break;
case 0x12: flags = dasm_cop2(pc, op, buffer); break;
case 0x13: flags = dasm_cop1x(pc, op, buffer); break;
- case 0x14: sprintf(buffer, "beql %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x15: sprintf(buffer, "bnel %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x16: sprintf(buffer, "blezl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x17: sprintf(buffer, "bgtzl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
+ case 0x14: sprintf(buffer, "beql %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
+ case 0x15: sprintf(buffer, "bnel %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
+ case 0x16: sprintf(buffer, "blezl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
+ case 0x17: sprintf(buffer, "bgtzl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
case 0x18: sprintf(buffer, "daddi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x19: sprintf(buffer, "daddiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x1a: sprintf(buffer, "ldl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
@@ -538,7 +538,7 @@ unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op)
CPU_DISASSEMBLE( mips3be )
{
- UINT32 op = *(UINT32 *)oprom;
+ uint32_t op = *(uint32_t *)oprom;
op = big_endianize_int32(op);
return dasmmips3(buffer, pc, op);
}
@@ -546,7 +546,7 @@ CPU_DISASSEMBLE( mips3be )
CPU_DISASSEMBLE( mips3le )
{
- UINT32 op = *(UINT32 *)oprom;
+ uint32_t op = *(uint32_t *)oprom;
op = little_endianize_int32(op);
return dasmmips3(buffer, pc, op);
}
diff --git a/src/devices/cpu/mips/mips3fe.cpp b/src/devices/cpu/mips/mips3fe.cpp
index 42055c39e24..a530d026c75 100644
--- a/src/devices/cpu/mips/mips3fe.cpp
+++ b/src/devices/cpu/mips/mips3fe.cpp
@@ -21,7 +21,7 @@
// mips3_frontend - constructor
//-------------------------------------------------
-mips3_frontend::mips3_frontend(mips3_device *mips3, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
+mips3_frontend::mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
: drc_frontend(*mips3, window_start, window_end, max_sequence),
m_mips3(mips3)
{
@@ -35,7 +35,7 @@ mips3_frontend::mips3_frontend(mips3_device *mips3, UINT32 window_start, UINT32
bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
- UINT32 op, opswitch;
+ uint32_t op, opswitch;
// compute the physical PC
assert((desc.physpc & 3) == 0);
@@ -230,7 +230,7 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
// single instruction in the 'special' group
//-------------------------------------------------
-bool mips3_frontend::describe_special(UINT32 op, opcode_desc &desc)
+bool mips3_frontend::describe_special(uint32_t op, opcode_desc &desc)
{
switch (op & 63)
{
@@ -381,7 +381,7 @@ bool mips3_frontend::describe_special(UINT32 op, opcode_desc &desc)
// single instruction in the 'regimm' group
//-------------------------------------------------
-bool mips3_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
+bool mips3_frontend::describe_regimm(uint32_t op, opcode_desc &desc)
{
switch (RTREG)
{
@@ -438,7 +438,7 @@ bool mips3_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
// instruction in the IDT-specific group
//-------------------------------------------------
-bool mips3_frontend::describe_idt(UINT32 op, opcode_desc &desc)
+bool mips3_frontend::describe_idt(uint32_t op, opcode_desc &desc)
{
// only on the R4650
if (m_mips3->m_flavor != mips3_device::MIPS3_TYPE_R4650)
@@ -469,7 +469,7 @@ bool mips3_frontend::describe_idt(UINT32 op, opcode_desc &desc)
// single instruction in the COP0 group
//-------------------------------------------------
-bool mips3_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
+bool mips3_frontend::describe_cop0(uint32_t op, opcode_desc &desc)
{
// any COP0 instruction can potentially cause an exception
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
@@ -544,7 +544,7 @@ bool mips3_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
// single instruction in the COP1 group
//-------------------------------------------------
-bool mips3_frontend::describe_cop1(UINT32 op, opcode_desc &desc)
+bool mips3_frontend::describe_cop1(uint32_t op, opcode_desc &desc)
{
// any COP1 instruction can potentially cause an exception
// desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
@@ -662,7 +662,7 @@ bool mips3_frontend::describe_cop1(UINT32 op, opcode_desc &desc)
// single instruction in the COP1X group
//-------------------------------------------------
-bool mips3_frontend::describe_cop1x(UINT32 op, opcode_desc &desc)
+bool mips3_frontend::describe_cop1x(uint32_t op, opcode_desc &desc)
{
// any COP1 instruction can potentially cause an exception
// desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
@@ -705,7 +705,7 @@ bool mips3_frontend::describe_cop1x(UINT32 op, opcode_desc &desc)
// single instruction in the COP2 group
//-------------------------------------------------
-bool mips3_frontend::describe_cop2(UINT32 op, opcode_desc &desc)
+bool mips3_frontend::describe_cop2(uint32_t op, opcode_desc &desc)
{
// any COP2 instruction can potentially cause an exception
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
diff --git a/src/devices/cpu/mips/r3000.cpp b/src/devices/cpu/mips/r3000.cpp
index 9eec18d9de2..2e37da309a0 100644
--- a/src/devices/cpu/mips/r3000.cpp
+++ b/src/devices/cpu/mips/r3000.cpp
@@ -86,8 +86,8 @@
#define RTVAL m_r[RTREG]
#define RDVAL m_r[RDREG]
-#define SIMMVAL ((INT16)m_op)
-#define UIMMVAL ((UINT16)m_op)
+#define SIMMVAL ((int16_t)m_op)
+#define UIMMVAL ((uint16_t)m_op)
#define LIMMVAL (m_op & 0x03ffffff)
#define ADDPC(x) do { m_nextpc = m_pc + ((x) << 2); } while (0)
@@ -124,7 +124,7 @@ const device_type R3081 = &device_creator<r3081_device>;
// r3000_device - constructor
//-------------------------------------------------
-r3000_device::r3000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, chip_type chiptype, const char *shortname, const char *source)
+r3000_device::r3000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, chip_type chiptype, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config_be("program", ENDIANNESS_BIG, 32, 29),
m_program_config_le("program", ENDIANNESS_LITTLE, 32, 29),
@@ -169,7 +169,7 @@ r3000_device::~r3000_device()
// r3041_device - constructor
//-------------------------------------------------
-r3041_device::r3041_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+r3041_device::r3041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: r3000_device(mconfig, R3041, "R3041", tag, owner, clock, CHIP_TYPE_R3041, "r3041", __FILE__) { }
@@ -177,7 +177,7 @@ r3041_device::r3041_device(const machine_config &mconfig, const char *tag, devic
// r3051_device - constructor
//-------------------------------------------------
-r3051_device::r3051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+r3051_device::r3051_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: r3000_device(mconfig, R3051, "R3051", tag, owner, clock, CHIP_TYPE_R3051, "r3051", __FILE__) { }
@@ -185,7 +185,7 @@ r3051_device::r3051_device(const machine_config &mconfig, const char *tag, devic
// r3052_device - constructor
//-------------------------------------------------
-r3052_device::r3052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+r3052_device::r3052_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: r3000_device(mconfig, R3052, "R3052", tag, owner, clock, CHIP_TYPE_R3052, "r3052", __FILE__) { }
@@ -193,7 +193,7 @@ r3052_device::r3052_device(const machine_config &mconfig, const char *tag, devic
// r3071_device - constructor
//-------------------------------------------------
-r3071_device::r3071_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+r3071_device::r3071_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: r3000_device(mconfig, R3071, "R3071", tag, owner, clock, CHIP_TYPE_R3071, "r3071", __FILE__) { }
@@ -201,7 +201,7 @@ r3071_device::r3071_device(const machine_config &mconfig, const char *tag, devic
// r3081_device - constructor
//-------------------------------------------------
-r3081_device::r3081_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+r3081_device::r3081_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: r3000_device(mconfig, R3081, "R3081", tag, owner, clock, CHIP_TYPE_R3081, "r3081", __FILE__) { }
@@ -458,7 +458,7 @@ void r3000_device::state_string_export(const device_state_entry &entry, std::str
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 r3000_device::disasm_min_opcode_bytes() const
+uint32_t r3000_device::disasm_min_opcode_bytes() const
{
return 4;
}
@@ -469,7 +469,7 @@ UINT32 r3000_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 r3000_device::disasm_max_opcode_bytes() const
+uint32_t r3000_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -480,7 +480,7 @@ UINT32 r3000_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t r3000_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t r3000_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( r3000le );
extern CPU_DISASSEMBLE( r3000be );
@@ -496,37 +496,37 @@ offs_t r3000_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
MEMORY ACCESSORS
***************************************************************************/
-inline UINT32 r3000_device::readop(offs_t pc)
+inline uint32_t r3000_device::readop(offs_t pc)
{
return m_direct->read_dword(pc);
}
-UINT8 r3000_device::readmem(offs_t offset)
+uint8_t r3000_device::readmem(offs_t offset)
{
return m_program->read_byte(offset);
}
-UINT16 r3000_device::readmem_word(offs_t offset)
+uint16_t r3000_device::readmem_word(offs_t offset)
{
return m_program->read_word(offset);
}
-UINT32 r3000_device::readmem_dword(offs_t offset)
+uint32_t r3000_device::readmem_dword(offs_t offset)
{
return m_program->read_dword(offset);
}
-void r3000_device::writemem(offs_t offset, UINT8 data)
+void r3000_device::writemem(offs_t offset, uint8_t data)
{
m_program->write_byte(offset, data);
}
-void r3000_device::writemem_word(offs_t offset, UINT16 data)
+void r3000_device::writemem_word(offs_t offset, uint16_t data)
{
m_program->write_word(offset, data);
}
-void r3000_device::writemem_dword(offs_t offset, UINT32 data)
+void r3000_device::writemem_dword(offs_t offset, uint32_t data)
{
m_program->write_dword(offset, data);
}
@@ -536,43 +536,43 @@ void r3000_device::writemem_dword(offs_t offset, UINT32 data)
BIG ENDIAN CACHE I/O
***************************************************************************/
-UINT8 r3000_device::readcache_be(offs_t offset)
+uint8_t r3000_device::readcache_be(offs_t offset)
{
offset &= 0x1fffffff;
return (offset * 4 < m_cache_size) ? m_cache[BYTE4_XOR_BE(offset)] : 0xff;
}
-UINT16 r3000_device::readcache_be_word(offs_t offset)
+uint16_t r3000_device::readcache_be_word(offs_t offset)
{
offset &= 0x1fffffff;
- return (offset * 4 < m_cache_size) ? *(UINT16 *)&m_cache[WORD_XOR_BE(offset)] : 0xffff;
+ return (offset * 4 < m_cache_size) ? *(uint16_t *)&m_cache[WORD_XOR_BE(offset)] : 0xffff;
}
-UINT32 r3000_device::readcache_be_dword(offs_t offset)
+uint32_t r3000_device::readcache_be_dword(offs_t offset)
{
offset &= 0x1fffffff;
- return (offset * 4 < m_cache_size) ? *(UINT32 *)&m_cache[offset] : 0xffffffff;
+ return (offset * 4 < m_cache_size) ? *(uint32_t *)&m_cache[offset] : 0xffffffff;
}
-void r3000_device::writecache_be(offs_t offset, UINT8 data)
+void r3000_device::writecache_be(offs_t offset, uint8_t data)
{
offset &= 0x1fffffff;
if (offset * 4 < m_cache_size) m_cache[BYTE4_XOR_BE(offset)] = data;
}
-void r3000_device::writecache_be_word(offs_t offset, UINT16 data)
+void r3000_device::writecache_be_word(offs_t offset, uint16_t data)
{
offset &= 0x1fffffff;
- if (offset * 4 < m_cache_size) *(UINT16 *)&m_cache[WORD_XOR_BE(offset)] = data;
+ if (offset * 4 < m_cache_size) *(uint16_t *)&m_cache[WORD_XOR_BE(offset)] = data;
}
-void r3000_device::writecache_be_dword(offs_t offset, UINT32 data)
+void r3000_device::writecache_be_dword(offs_t offset, uint32_t data)
{
offset &= 0x1fffffff;
- if (offset * 4 < m_cache_size) *(UINT32 *)&m_cache[offset] = data;
+ if (offset * 4 < m_cache_size) *(uint32_t *)&m_cache[offset] = data;
}
-UINT8 r3000_device::readcache_le(offs_t offset)
+uint8_t r3000_device::readcache_le(offs_t offset)
{
offset &= 0x1fffffff;
return (offset * 4 < m_cache_size) ? m_cache[BYTE4_XOR_LE(offset)] : 0xff;
@@ -583,34 +583,34 @@ UINT8 r3000_device::readcache_le(offs_t offset)
LITTLE ENDIAN CACHE I/O
***************************************************************************/
-UINT16 r3000_device::readcache_le_word(offs_t offset)
+uint16_t r3000_device::readcache_le_word(offs_t offset)
{
offset &= 0x1fffffff;
- return (offset * 4 < m_cache_size) ? *(UINT16 *)&m_cache[WORD_XOR_LE(offset)] : 0xffff;
+ return (offset * 4 < m_cache_size) ? *(uint16_t *)&m_cache[WORD_XOR_LE(offset)] : 0xffff;
}
-UINT32 r3000_device::readcache_le_dword(offs_t offset)
+uint32_t r3000_device::readcache_le_dword(offs_t offset)
{
offset &= 0x1fffffff;
- return (offset * 4 < m_cache_size) ? *(UINT32 *)&m_cache[offset] : 0xffffffff;
+ return (offset * 4 < m_cache_size) ? *(uint32_t *)&m_cache[offset] : 0xffffffff;
}
-void r3000_device::writecache_le(offs_t offset, UINT8 data)
+void r3000_device::writecache_le(offs_t offset, uint8_t data)
{
offset &= 0x1fffffff;
if (offset * 4 < m_cache_size) m_cache[BYTE4_XOR_LE(offset)] = data;
}
-void r3000_device::writecache_le_word(offs_t offset, UINT16 data)
+void r3000_device::writecache_le_word(offs_t offset, uint16_t data)
{
offset &= 0x1fffffff;
- if (offset * 4 < m_cache_size) *(UINT16 *)&m_cache[WORD_XOR_LE(offset)] = data;
+ if (offset * 4 < m_cache_size) *(uint16_t *)&m_cache[WORD_XOR_LE(offset)] = data;
}
-void r3000_device::writecache_le_dword(offs_t offset, UINT32 data)
+void r3000_device::writecache_le_dword(offs_t offset, uint32_t data)
{
offset &= 0x1fffffff;
- if (offset * 4 < m_cache_size) *(UINT32 *)&m_cache[offset] = data;
+ if (offset * 4 < m_cache_size) *(uint32_t *)&m_cache[offset] = data;
}
@@ -680,12 +680,12 @@ void r3000_device::set_irq_line(int irqline, int state)
COP0 (SYSTEM) EXECUTION HANDLING
***************************************************************************/
-inline UINT32 r3000_device::get_cop0_reg(int idx)
+inline uint32_t r3000_device::get_cop0_reg(int idx)
{
return m_cpr[0][idx];
}
-inline void r3000_device::set_cop0_reg(int idx, UINT32 val)
+inline void r3000_device::set_cop0_reg(int idx, uint32_t val)
{
if (idx == COP0_Cause)
{
@@ -696,8 +696,8 @@ inline void r3000_device::set_cop0_reg(int idx, UINT32 val)
}
else if (idx == COP0_Status)
{
- UINT32 oldsr = m_cpr[0][idx];
- UINT32 diff = oldsr ^ val;
+ uint32_t oldsr = m_cpr[0][idx];
+ uint32_t diff = oldsr ^ val;
// handle cache isolation
if (diff & SR_IsC)
@@ -725,12 +725,12 @@ inline void r3000_device::set_cop0_reg(int idx, UINT32 val)
m_cpr[0][idx] = val;
}
-inline UINT32 r3000_device::get_cop0_creg(int idx)
+inline uint32_t r3000_device::get_cop0_creg(int idx)
{
return m_ccr[0][idx];
}
-inline void r3000_device::set_cop0_creg(int idx, UINT32 val)
+inline void r3000_device::set_cop0_creg(int idx, uint32_t val)
{
m_ccr[0][idx] = val;
}
@@ -792,22 +792,22 @@ inline void r3000_device::handle_cop0()
COP1 (FPU) EXECUTION HANDLING
***************************************************************************/
-inline UINT32 r3000_device::get_cop1_reg(int idx)
+inline uint32_t r3000_device::get_cop1_reg(int idx)
{
return m_cpr[1][idx];
}
-inline void r3000_device::set_cop1_reg(int idx, UINT32 val)
+inline void r3000_device::set_cop1_reg(int idx, uint32_t val)
{
m_cpr[1][idx] = val;
}
-inline UINT32 r3000_device::get_cop1_creg(int idx)
+inline uint32_t r3000_device::get_cop1_creg(int idx)
{
return m_ccr[1][idx];
}
-inline void r3000_device::set_cop1_creg(int idx, UINT32 val)
+inline void r3000_device::set_cop1_creg(int idx, uint32_t val)
{
m_ccr[1][idx] = val;
}
@@ -860,22 +860,22 @@ inline void r3000_device::handle_cop1()
COP2 (CUSTOM) EXECUTION HANDLING
***************************************************************************/
-inline UINT32 r3000_device::get_cop2_reg(int idx)
+inline uint32_t r3000_device::get_cop2_reg(int idx)
{
return m_cpr[2][idx];
}
-inline void r3000_device::set_cop2_reg(int idx, UINT32 val)
+inline void r3000_device::set_cop2_reg(int idx, uint32_t val)
{
m_cpr[2][idx] = val;
}
-inline UINT32 r3000_device::get_cop2_creg(int idx)
+inline uint32_t r3000_device::get_cop2_creg(int idx)
{
return m_ccr[2][idx];
}
-inline void r3000_device::set_cop2_creg(int idx, UINT32 val)
+inline void r3000_device::set_cop2_creg(int idx, uint32_t val)
{
m_ccr[2][idx] = val;
}
@@ -926,22 +926,22 @@ inline void r3000_device::handle_cop2()
COP3 (CUSTOM) EXECUTION HANDLING
***************************************************************************/
-inline UINT32 r3000_device::get_cop3_reg(int idx)
+inline uint32_t r3000_device::get_cop3_reg(int idx)
{
return m_cpr[3][idx];
}
-inline void r3000_device::set_cop3_reg(int idx, UINT32 val)
+inline void r3000_device::set_cop3_reg(int idx, uint32_t val)
{
m_cpr[3][idx] = val;
}
-inline UINT32 r3000_device::get_cop3_creg(int idx)
+inline uint32_t r3000_device::get_cop3_creg(int idx)
{
return m_ccr[3][idx];
}
-inline void r3000_device::set_cop3_creg(int idx, UINT32 val)
+inline void r3000_device::set_cop3_creg(int idx, uint32_t val)
{
m_ccr[3][idx] = val;
}
@@ -997,7 +997,7 @@ inline void r3000_device::handle_cop3()
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 r3000_device::execute_min_cycles() const
+uint32_t r3000_device::execute_min_cycles() const
{
return 1;
}
@@ -1008,7 +1008,7 @@ UINT32 r3000_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 r3000_device::execute_max_cycles() const
+uint32_t r3000_device::execute_max_cycles() const
{
return 40;
}
@@ -1019,7 +1019,7 @@ UINT32 r3000_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 r3000_device::execute_input_lines() const
+uint32_t r3000_device::execute_input_lines() const
{
return 6;
}
@@ -1051,7 +1051,7 @@ void r3000_device::execute_run()
// core execution loop
do
{
- UINT64 temp64;
+ uint64_t temp64;
int temp;
// debugging
@@ -1078,10 +1078,10 @@ void r3000_device::execute_run()
{
case 0x00: /* SLL */ if (RDREG) RDVAL = RTVAL << SHIFT; break;
case 0x02: /* SRL */ if (RDREG) RDVAL = RTVAL >> SHIFT; break;
- case 0x03: /* SRA */ if (RDREG) RDVAL = (INT32)RTVAL >> SHIFT; break;
+ case 0x03: /* SRA */ if (RDREG) RDVAL = (int32_t)RTVAL >> SHIFT; break;
case 0x04: /* SLLV */ if (RDREG) RDVAL = RTVAL << (RSVAL & 31); break;
case 0x06: /* SRLV */ if (RDREG) RDVAL = RTVAL >> (RSVAL & 31); break;
- case 0x07: /* SRAV */ if (RDREG) RDVAL = (INT32)RTVAL >> (RSVAL & 31); break;
+ case 0x07: /* SRAV */ if (RDREG) RDVAL = (int32_t)RTVAL >> (RSVAL & 31); break;
case 0x08: /* JR */ SETPC(RSVAL); break;
case 0x09: /* JALR */ SETPCL(RSVAL, RDREG); break;
case 0x0c: /* SYSCALL */ generate_exception(EXCEPTION_SYSCALL); break;
@@ -1092,22 +1092,22 @@ void r3000_device::execute_run()
case 0x12: /* MFLO */ if (RDREG) RDVAL = m_lo; break;
case 0x13: /* MTLO */ m_lo = RSVAL; break;
case 0x18: /* MULT */
- temp64 = (INT64)(INT32)RSVAL * (INT64)(INT32)RTVAL;
- m_lo = (UINT32)temp64;
- m_hi = (UINT32)(temp64 >> 32);
+ temp64 = (int64_t)(int32_t)RSVAL * (int64_t)(int32_t)RTVAL;
+ m_lo = (uint32_t)temp64;
+ m_hi = (uint32_t)(temp64 >> 32);
m_icount -= 11;
break;
case 0x19: /* MULTU */
- temp64 = (UINT64)RSVAL * (UINT64)RTVAL;
- m_lo = (UINT32)temp64;
- m_hi = (UINT32)(temp64 >> 32);
+ temp64 = (uint64_t)RSVAL * (uint64_t)RTVAL;
+ m_lo = (uint32_t)temp64;
+ m_hi = (uint32_t)(temp64 >> 32);
m_icount -= 11;
break;
case 0x1a: /* DIV */
if (RTVAL)
{
- m_lo = (INT32)RSVAL / (INT32)RTVAL;
- m_hi = (INT32)RSVAL % (INT32)RTVAL;
+ m_lo = (int32_t)RSVAL / (int32_t)RTVAL;
+ m_hi = (int32_t)RSVAL % (int32_t)RTVAL;
}
m_icount -= 34;
break;
@@ -1133,8 +1133,8 @@ void r3000_device::execute_run()
case 0x25: /* OR */ if (RDREG) RDVAL = RSVAL | RTVAL; break;
case 0x26: /* XOR */ if (RDREG) RDVAL = RSVAL ^ RTVAL; break;
case 0x27: /* NOR */ if (RDREG) RDVAL = ~(RSVAL | RTVAL); break;
- case 0x2a: /* SLT */ if (RDREG) RDVAL = (INT32)RSVAL < (INT32)RTVAL; break;
- case 0x2b: /* SLTU */ if (RDREG) RDVAL = (UINT32)RSVAL < (UINT32)RTVAL; break;
+ case 0x2a: /* SLT */ if (RDREG) RDVAL = (int32_t)RSVAL < (int32_t)RTVAL; break;
+ case 0x2b: /* SLTU */ if (RDREG) RDVAL = (uint32_t)RSVAL < (uint32_t)RTVAL; break;
case 0x30: /* TEQ */ invalid_instruction(); break;
case 0x31: /* TGEU */ invalid_instruction(); break;
case 0x32: /* TLT */ invalid_instruction(); break;
@@ -1148,8 +1148,8 @@ void r3000_device::execute_run()
case 0x01: /* REGIMM */
switch (RTREG)
{
- case 0x00: /* BLTZ */ if ((INT32)RSVAL < 0) ADDPC(SIMMVAL); break;
- case 0x01: /* BGEZ */ if ((INT32)RSVAL >= 0) ADDPC(SIMMVAL); break;
+ case 0x00: /* BLTZ */ if ((int32_t)RSVAL < 0) ADDPC(SIMMVAL); break;
+ case 0x01: /* BGEZ */ if ((int32_t)RSVAL >= 0) ADDPC(SIMMVAL); break;
case 0x02: /* BLTZL */ invalid_instruction(); break;
case 0x03: /* BGEZL */ invalid_instruction(); break;
case 0x08: /* TGEI */ invalid_instruction(); break;
@@ -1158,8 +1158,8 @@ void r3000_device::execute_run()
case 0x0b: /* TLTIU */ invalid_instruction(); break;
case 0x0c: /* TEQI */ invalid_instruction(); break;
case 0x0e: /* TNEI */ invalid_instruction(); break;
- case 0x10: /* BLTZAL */ if ((INT32)RSVAL < 0) ADDPCL(SIMMVAL,31); break;
- case 0x11: /* BGEZAL */ if ((INT32)RSVAL >= 0) ADDPCL(SIMMVAL,31); break;
+ case 0x10: /* BLTZAL */ if ((int32_t)RSVAL < 0) ADDPCL(SIMMVAL,31); break;
+ case 0x11: /* BGEZAL */ if ((int32_t)RSVAL >= 0) ADDPCL(SIMMVAL,31); break;
case 0x12: /* BLTZALL */ invalid_instruction(); break;
case 0x13: /* BGEZALL */ invalid_instruction(); break;
default: /* ??? */ invalid_instruction(); break;
@@ -1170,15 +1170,15 @@ void r3000_device::execute_run()
case 0x03: /* JAL */ ABSPCL(LIMMVAL,31); break;
case 0x04: /* BEQ */ if (RSVAL == RTVAL) ADDPC(SIMMVAL); break;
case 0x05: /* BNE */ if (RSVAL != RTVAL) ADDPC(SIMMVAL); break;
- case 0x06: /* BLEZ */ if ((INT32)RSVAL <= 0) ADDPC(SIMMVAL); break;
- case 0x07: /* BGTZ */ if ((INT32)RSVAL > 0) ADDPC(SIMMVAL); break;
+ case 0x06: /* BLEZ */ if ((int32_t)RSVAL <= 0) ADDPC(SIMMVAL); break;
+ case 0x07: /* BGTZ */ if ((int32_t)RSVAL > 0) ADDPC(SIMMVAL); break;
case 0x08: /* ADDI */
if (ENABLE_OVERFLOWS && RSVAL > ~SIMMVAL) generate_exception(EXCEPTION_OVERFLOW);
else if (RTREG) RTVAL = RSVAL + SIMMVAL;
break;
case 0x09: /* ADDIU */ if (RTREG) RTVAL = RSVAL + SIMMVAL; break;
- case 0x0a: /* SLTI */ if (RTREG) RTVAL = (INT32)RSVAL < (INT32)SIMMVAL; break;
- case 0x0b: /* SLTIU */ if (RTREG) RTVAL = (UINT32)RSVAL < (UINT32)SIMMVAL; break;
+ case 0x0a: /* SLTI */ if (RTREG) RTVAL = (int32_t)RSVAL < (int32_t)SIMMVAL; break;
+ case 0x0b: /* SLTIU */ if (RTREG) RTVAL = (uint32_t)RSVAL < (uint32_t)SIMMVAL; break;
case 0x0c: /* ANDI */ if (RTREG) RTVAL = RSVAL & UIMMVAL; break;
case 0x0d: /* ORI */ if (RTREG) RTVAL = RSVAL | UIMMVAL; break;
case 0x0e: /* XORI */ if (RTREG) RTVAL = RSVAL ^ UIMMVAL; break;
@@ -1191,12 +1191,12 @@ void r3000_device::execute_run()
case 0x15: /* BNEL */ invalid_instruction(); break;
case 0x16: /* BLEZL */ invalid_instruction(); break;
case 0x17: /* BGTZL */ invalid_instruction(); break;
- case 0x20: /* LB */ temp = RBYTE(SIMMVAL+RSVAL); if (RTREG) RTVAL = (INT8)temp; break;
- case 0x21: /* LH */ temp = RWORD(SIMMVAL+RSVAL); if (RTREG) RTVAL = (INT16)temp; break;
+ case 0x20: /* LB */ temp = RBYTE(SIMMVAL+RSVAL); if (RTREG) RTVAL = (int8_t)temp; break;
+ case 0x21: /* LH */ temp = RWORD(SIMMVAL+RSVAL); if (RTREG) RTVAL = (int16_t)temp; break;
case 0x22: /* LWL */ (*this.*m_lwl)(); break;
case 0x23: /* LW */ temp = RLONG(SIMMVAL+RSVAL); if (RTREG) RTVAL = temp; break;
- case 0x24: /* LBU */ temp = RBYTE(SIMMVAL+RSVAL); if (RTREG) RTVAL = (UINT8)temp; break;
- case 0x25: /* LHU */ temp = RWORD(SIMMVAL+RSVAL); if (RTREG) RTVAL = (UINT16)temp; break;
+ case 0x24: /* LBU */ temp = RBYTE(SIMMVAL+RSVAL); if (RTREG) RTVAL = (uint8_t)temp; break;
+ case 0x25: /* LHU */ temp = RWORD(SIMMVAL+RSVAL); if (RTREG) RTVAL = (uint16_t)temp; break;
case 0x26: /* LWR */ (*this.*m_lwr)(); break;
case 0x28: /* SB */ WBYTE(SIMMVAL+RSVAL, RTVAL); break;
case 0x29: /* SH */ WWORD(SIMMVAL+RSVAL, RTVAL); break;
@@ -1238,7 +1238,7 @@ void r3000_device::execute_run()
void r3000_device::lwl_be()
{
offs_t offs = SIMMVAL + RSVAL;
- UINT32 temp = RLONG(offs & ~3);
+ uint32_t temp = RLONG(offs & ~3);
if (RTREG)
{
if (!(offs & 3)) RTVAL = temp;
@@ -1253,7 +1253,7 @@ void r3000_device::lwl_be()
void r3000_device::lwr_be()
{
offs_t offs = SIMMVAL + RSVAL;
- UINT32 temp = RLONG(offs & ~3);
+ uint32_t temp = RLONG(offs & ~3);
if (RTREG)
{
if ((offs & 3) == 3) RTVAL = temp;
@@ -1271,7 +1271,7 @@ void r3000_device::swl_be()
if (!(offs & 3)) WLONG(offs, RTVAL);
else
{
- UINT32 temp = RLONG(offs & ~3);
+ uint32_t temp = RLONG(offs & ~3);
int shift = 8 * (offs & 3);
WLONG(offs & ~3, (temp & (0xffffff00 << (24 - shift))) | (RTVAL >> shift));
}
@@ -1284,7 +1284,7 @@ void r3000_device::swr_be()
if ((offs & 3) == 3) WLONG(offs & ~3, RTVAL);
else
{
- UINT32 temp = RLONG(offs & ~3);
+ uint32_t temp = RLONG(offs & ~3);
int shift = 8 * (offs & 3);
WLONG(offs & ~3, (temp & (0x00ffffff >> shift)) | (RTVAL << (24 - shift)));
}
@@ -1295,7 +1295,7 @@ void r3000_device::swr_be()
void r3000_device::lwl_le()
{
offs_t offs = SIMMVAL + RSVAL;
- UINT32 temp = RLONG(offs & ~3);
+ uint32_t temp = RLONG(offs & ~3);
if (RTREG)
{
if (!(offs & 3)) RTVAL = temp;
@@ -1310,7 +1310,7 @@ void r3000_device::lwl_le()
void r3000_device::lwr_le()
{
offs_t offs = SIMMVAL + RSVAL;
- UINT32 temp = RLONG(offs & ~3);
+ uint32_t temp = RLONG(offs & ~3);
if (RTREG)
{
if ((offs & 3) == 3) RTVAL = temp;
@@ -1328,7 +1328,7 @@ void r3000_device::swl_le()
if (!(offs & 3)) WLONG(offs, RTVAL);
else
{
- UINT32 temp = RLONG(offs & ~3);
+ uint32_t temp = RLONG(offs & ~3);
int shift = 8 * (offs & 3);
WLONG(offs & ~3, (temp & (0x00ffffff >> (24 - shift))) | (RTVAL << shift));
}
@@ -1340,7 +1340,7 @@ void r3000_device::swr_le()
if ((offs & 3) == 3) WLONG(offs & ~3, RTVAL);
else
{
- UINT32 temp = RLONG(offs & ~3);
+ uint32_t temp = RLONG(offs & ~3);
int shift = 8 * (offs & 3);
WLONG(offs & ~3, (temp & (0xffffff00 << shift)) | (RTVAL >> (24 - shift)));
}
diff --git a/src/devices/cpu/mips/r3000.h b/src/devices/cpu/mips/r3000.h
index a7541eaab85..138e6fc2a6f 100644
--- a/src/devices/cpu/mips/r3000.h
+++ b/src/devices/cpu/mips/r3000.h
@@ -77,7 +77,7 @@ protected:
};
// construction/destruction
- r3000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, chip_type chiptype, const char *shortname, const char *source);
+ r3000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, chip_type chiptype, const char *shortname, const char *source);
virtual ~r3000_device();
public:
@@ -114,9 +114,9 @@ protected:
virtual void device_post_load() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -129,42 +129,42 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// memory accessors
struct r3000_data_accessors
{
- UINT8 (r3000_device::*m_read_byte)(offs_t byteaddress);
- UINT16 (r3000_device::*m_read_word)(offs_t byteaddress);
- UINT32 (r3000_device::*m_read_dword)(offs_t byteaddress);
- void (r3000_device::*m_write_byte)(offs_t byteaddress, UINT8 data);
- void (r3000_device::*m_write_word)(offs_t byteaddress, UINT16 data);
- void (r3000_device::*m_write_dword)(offs_t byteaddress, UINT32 data);
+ uint8_t (r3000_device::*m_read_byte)(offs_t byteaddress);
+ uint16_t (r3000_device::*m_read_word)(offs_t byteaddress);
+ uint32_t (r3000_device::*m_read_dword)(offs_t byteaddress);
+ void (r3000_device::*m_write_byte)(offs_t byteaddress, uint8_t data);
+ void (r3000_device::*m_write_word)(offs_t byteaddress, uint16_t data);
+ void (r3000_device::*m_write_dword)(offs_t byteaddress, uint32_t data);
};
- UINT32 readop(offs_t pc);
- UINT8 readmem(offs_t offset);
- UINT16 readmem_word(offs_t offset);
- UINT32 readmem_dword(offs_t offset);
- void writemem(offs_t offset, UINT8 data);
- void writemem_word(offs_t offset, UINT16 data);
- void writemem_dword(offs_t offset, UINT32 data);
-
- UINT8 readcache_be(offs_t offset);
- UINT16 readcache_be_word(offs_t offset);
- UINT32 readcache_be_dword(offs_t offset);
- void writecache_be(offs_t offset, UINT8 data);
- void writecache_be_word(offs_t offset, UINT16 data);
- void writecache_be_dword(offs_t offset, UINT32 data);
-
- UINT8 readcache_le(offs_t offset);
- UINT16 readcache_le_word(offs_t offset);
- UINT32 readcache_le_dword(offs_t offset);
- void writecache_le(offs_t offset, UINT8 data);
- void writecache_le_word(offs_t offset, UINT16 data);
- void writecache_le_dword(offs_t offset, UINT32 data);
+ uint32_t readop(offs_t pc);
+ uint8_t readmem(offs_t offset);
+ uint16_t readmem_word(offs_t offset);
+ uint32_t readmem_dword(offs_t offset);
+ void writemem(offs_t offset, uint8_t data);
+ void writemem_word(offs_t offset, uint16_t data);
+ void writemem_dword(offs_t offset, uint32_t data);
+
+ uint8_t readcache_be(offs_t offset);
+ uint16_t readcache_be_word(offs_t offset);
+ uint32_t readcache_be_dword(offs_t offset);
+ void writecache_be(offs_t offset, uint8_t data);
+ void writecache_be_word(offs_t offset, uint16_t data);
+ void writecache_be_dword(offs_t offset, uint32_t data);
+
+ uint8_t readcache_le(offs_t offset);
+ uint16_t readcache_le_word(offs_t offset);
+ uint32_t readcache_le_dword(offs_t offset);
+ void writecache_le(offs_t offset, uint8_t data);
+ void writecache_le_word(offs_t offset, uint16_t data);
+ void writecache_le_dword(offs_t offset, uint32_t data);
// interrupts
void generate_exception(int exception);
@@ -173,28 +173,28 @@ protected:
void invalid_instruction();
// instructions
- UINT32 get_cop0_reg(int idx);
- void set_cop0_reg(int idx, UINT32 val);
- UINT32 get_cop0_creg(int idx);
- void set_cop0_creg(int idx, UINT32 val);
+ uint32_t get_cop0_reg(int idx);
+ void set_cop0_reg(int idx, uint32_t val);
+ uint32_t get_cop0_creg(int idx);
+ void set_cop0_creg(int idx, uint32_t val);
void handle_cop0();
- UINT32 get_cop1_reg(int idx);
- void set_cop1_reg(int idx, UINT32 val);
- UINT32 get_cop1_creg(int idx);
- void set_cop1_creg(int idx, UINT32 val);
+ uint32_t get_cop1_reg(int idx);
+ void set_cop1_reg(int idx, uint32_t val);
+ uint32_t get_cop1_creg(int idx);
+ void set_cop1_creg(int idx, uint32_t val);
void handle_cop1();
- UINT32 get_cop2_reg(int idx);
- void set_cop2_reg(int idx, UINT32 val);
- UINT32 get_cop2_creg(int idx);
- void set_cop2_creg(int idx, UINT32 val);
+ uint32_t get_cop2_reg(int idx);
+ void set_cop2_reg(int idx, uint32_t val);
+ uint32_t get_cop2_creg(int idx);
+ void set_cop2_creg(int idx, uint32_t val);
void handle_cop2();
- UINT32 get_cop3_reg(int idx);
- void set_cop3_reg(int idx, UINT32 val);
- UINT32 get_cop3_creg(int idx);
- void set_cop3_creg(int idx, UINT32 val);
+ uint32_t get_cop3_reg(int idx);
+ void set_cop3_reg(int idx, uint32_t val);
+ uint32_t get_cop3_creg(int idx);
+ void set_cop3_creg(int idx, uint32_t val);
void handle_cop3();
// complex opcodes
@@ -220,19 +220,19 @@ protected:
endianness_t m_endianness;
// core registers
- UINT32 m_pc;
- UINT32 m_nextpc;
- UINT32 m_hi;
- UINT32 m_lo;
- UINT32 m_r[32];
+ uint32_t m_pc;
+ uint32_t m_nextpc;
+ uint32_t m_hi;
+ uint32_t m_lo;
+ uint32_t m_r[32];
// COP registers
- UINT32 m_cpr[4][32];
- UINT32 m_ccr[4][32];
+ uint32_t m_cpr[4][32];
+ uint32_t m_ccr[4][32];
// internal stuff
- UINT32 m_ppc;
- UINT32 m_op;
+ uint32_t m_ppc;
+ uint32_t m_op;
int m_icount;
int m_interrupt_cycles;
@@ -248,9 +248,9 @@ protected:
r3000_data_accessors m_cache_hand;
// cache memory
- UINT32 * m_cache;
- std::vector<UINT32> m_icache;
- std::vector<UINT32> m_dcache;
+ uint32_t * m_cache;
+ std::vector<uint32_t> m_icache;
+ std::vector<uint32_t> m_dcache;
size_t m_cache_size;
size_t m_icache_size;
size_t m_dcache_size;
@@ -268,7 +268,7 @@ protected:
class r3041_device : public r3000_device
{
public:
- r3041_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ r3041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -277,7 +277,7 @@ public:
class r3051_device : public r3000_device
{
public:
- r3051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ r3051_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -286,7 +286,7 @@ public:
class r3052_device : public r3000_device
{
public:
- r3052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ r3052_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -295,7 +295,7 @@ public:
class r3071_device : public r3000_device
{
public:
- r3071_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ r3071_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -304,7 +304,7 @@ public:
class r3081_device : public r3000_device
{
public:
- r3081_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ r3081_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/mips/r3kdasm.cpp b/src/devices/cpu/mips/r3kdasm.cpp
index 01cf1ad7599..af74627865d 100644
--- a/src/devices/cpu/mips/r3kdasm.cpp
+++ b/src/devices/cpu/mips/r3kdasm.cpp
@@ -82,7 +82,7 @@ static const char *const ccreg[4][32] =
CODE CODE
***************************************************************************/
-static inline char *signed_16bit(INT16 val)
+static inline char *signed_16bit(int16_t val)
{
static char temp[10];
if (val < 0)
@@ -92,11 +92,11 @@ static inline char *signed_16bit(INT16 val)
return temp;
}
-static UINT32 dasm_cop(UINT32 pc, int cop, UINT32 op, char *buffer)
+static uint32_t dasm_cop(uint32_t pc, int cop, uint32_t op, char *buffer)
{
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch ((op >> 21) & 31)
{
@@ -107,8 +107,8 @@ static UINT32 dasm_cop(UINT32 pc, int cop, UINT32 op, char *buffer)
case 0x08: /* BC */
switch (rt)
{
- case 0x00: sprintf(buffer, "bc%df $%08x", cop, pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bc%dt $%08x", cop, pc + 4 + ((INT16)op << 2)); break;
+ case 0x00: sprintf(buffer, "bc%df $%08x", cop, pc + 4 + ((int16_t)op << 2)); break;
+ case 0x01: sprintf(buffer, "bc%dt $%08x", cop, pc + 4 + ((int16_t)op << 2)); break;
case 0x02: sprintf(buffer, "bc%dfl [invalid]", cop); break;
case 0x03: sprintf(buffer, "bc%dtl [invalid]", cop); break;
default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
@@ -152,7 +152,7 @@ static UINT32 dasm_cop(UINT32 pc, int cop, UINT32 op, char *buffer)
return flags;
}
-static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
+static uint32_t dasm_cop1(uint32_t pc, uint32_t op, char *buffer)
{
static const char *const format_table[] =
{
@@ -165,7 +165,7 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
int fd = (op >> 6) & 31;
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch ((op >> 21) & 31)
{
@@ -178,10 +178,10 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
case 0x08: /* BC */
switch (rt & 3)
{
- case 0x00: sprintf(buffer, "bc1f $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
- case 0x01: sprintf(buffer, "bc1t $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
- case 0x02: sprintf(buffer, "bc1fl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x03: sprintf(buffer, "bc1tl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x00: sprintf(buffer, "bc1f $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); break;
+ case 0x01: sprintf(buffer, "bc1t $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); break;
+ case 0x02: sprintf(buffer, "bc1fl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x03: sprintf(buffer, "bc1tl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
}
break;
default: /* COP */
@@ -235,13 +235,13 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
return flags;
}
-static unsigned dasmr3k(char *buffer, unsigned pc, UINT32 op)
+static unsigned dasmr3k(char *buffer, unsigned pc, uint32_t op)
{
int rs = (op >> 21) & 31;
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
int shift = (op >> 6) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch (op >> 26)
{
@@ -299,8 +299,8 @@ static unsigned dasmr3k(char *buffer, unsigned pc, UINT32 op)
case 0x01: /* REGIMM */
switch ((op >> 16) & 31)
{
- case 0x00: sprintf(buffer, "bltz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bgez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x00: sprintf(buffer, "bltz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x01: sprintf(buffer, "bgez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
case 0x02: sprintf(buffer, "bltzl [invalid]"); break;
case 0x03: sprintf(buffer, "bgezl [invalid]"); break;
case 0x08: sprintf(buffer, "tgei [invalid]"); break;
@@ -309,8 +309,8 @@ static unsigned dasmr3k(char *buffer, unsigned pc, UINT32 op)
case 0x0b: sprintf(buffer, "tltiu [invalid]"); break;
case 0x0c: sprintf(buffer, "teqi [invalid]"); break;
case 0x0e: sprintf(buffer, "tnei [invalid]"); break;
- case 0x10: sprintf(buffer, "bltzal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x11: sprintf(buffer, "bgezal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x10: sprintf(buffer, "bltzal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x11: sprintf(buffer, "bgezal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
case 0x12: sprintf(buffer, "bltzall [invalid]"); break;
case 0x13: sprintf(buffer, "bgezall [invalid]"); break;
default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
@@ -320,21 +320,21 @@ static unsigned dasmr3k(char *buffer, unsigned pc, UINT32 op)
case 0x02: sprintf(buffer, "j $%08x", (pc & 0xf0000000) | ((op & 0x0fffffff) << 2)); break;
case 0x03: sprintf(buffer, "jal $%08x", (pc & 0xf0000000) | ((op & 0x0fffffff) << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
case 0x04: if (rs == 0 && rt == 0)
- sprintf(buffer, "b $%08x", pc + 4 + ((INT16)op << 2));
+ sprintf(buffer, "b $%08x", pc + 4 + ((int16_t)op << 2));
else
- sprintf(buffer, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));
+ sprintf(buffer, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
break;
- case 0x05: sprintf(buffer, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x06: sprintf(buffer, "blez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x07: sprintf(buffer, "bgtz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x05: sprintf(buffer, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
+ case 0x06: sprintf(buffer, "blez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x07: sprintf(buffer, "bgtz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
case 0x08: sprintf(buffer, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x09: sprintf(buffer, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x0a: sprintf(buffer, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x0b: sprintf(buffer, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0c: sprintf(buffer, "andi %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0d: sprintf(buffer, "ori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0e: sprintf(buffer, "xori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0f: sprintf(buffer, "lui %s,$%04x", reg[rt], (UINT16)op); break;
+ case 0x0c: sprintf(buffer, "andi %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0d: sprintf(buffer, "ori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0e: sprintf(buffer, "xori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0f: sprintf(buffer, "lui %s,$%04x", reg[rt], (uint16_t)op); break;
case 0x10: flags = dasm_cop(pc, 0, op, buffer); break;
case 0x11: flags = dasm_cop1(pc, op, buffer); break;
case 0x12: flags = dasm_cop(pc, 2, op, buffer); break;
@@ -380,7 +380,7 @@ static unsigned dasmr3k(char *buffer, unsigned pc, UINT32 op)
CPU_DISASSEMBLE( r3000be )
{
- UINT32 op = *(UINT32 *)oprom;
+ uint32_t op = *(uint32_t *)oprom;
op = big_endianize_int32(op);
return dasmr3k(buffer, pc, op);
}
@@ -388,7 +388,7 @@ CPU_DISASSEMBLE( r3000be )
CPU_DISASSEMBLE( r3000le )
{
- UINT32 op = *(UINT32 *)oprom;
+ uint32_t op = *(uint32_t *)oprom;
op = little_endianize_int32(op);
return dasmr3k(buffer, pc, op);
}
diff --git a/src/devices/cpu/mn10200/mn10200.cpp b/src/devices/cpu/mn10200/mn10200.cpp
index 604b73c0cbf..6f43d7f3f13 100644
--- a/src/devices/cpu/mn10200/mn10200.cpp
+++ b/src/devices/cpu/mn10200/mn10200.cpp
@@ -45,7 +45,7 @@ ADDRESS_MAP_END
// device definitions
-mn1020012a_device::mn1020012a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mn1020012a_device::mn1020012a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mn10200_device(mconfig, MN1020012A, "MN1020012A", tag, owner, clock, ADDRESS_MAP_NAME(mn1020012a_internal_map), "mn1020012a", __FILE__)
{ }
@@ -72,7 +72,7 @@ void mn10200_device::state_string_export(const device_state_entry &entry, std::s
}
}
-offs_t mn10200_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mn10200_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( mn10200 );
return CPU_DISASSEMBLE_NAME(mn10200)(this, buffer, pc, oprom, opram, options);
@@ -328,7 +328,7 @@ void mn10200_device::check_ext_irq()
void mn10200_device::execute_set_input(int irqnum, int state)
{
// take an external IRQ
- assert(((UINT32)irqnum) < MN10200_MAX_EXT_IRQ);
+ assert(((uint32_t)irqnum) < MN10200_MAX_EXT_IRQ);
int pin = state ? 0 : 1;
int old = m_p4 >> irqnum & 1;
@@ -449,15 +449,15 @@ TIMER_CALLBACK_MEMBER( mn10200_device::simple_timer_cb )
// opcode helpers
//-------------------------------------------------
-void mn10200_device::illegal(UINT8 prefix, UINT8 op)
+void mn10200_device::illegal(uint8_t prefix, uint8_t op)
{
logerror("MN10200: illegal opcode %x %x @ PC=%x\n", prefix, op, m_pc);
m_nmicr |= 2;
}
-UINT32 mn10200_device::do_add(UINT32 a, UINT32 b, UINT32 c)
+uint32_t mn10200_device::do_add(uint32_t a, uint32_t b, uint32_t c)
{
- UINT32 r = (a & 0xffffff) + (b & 0xffffff) + c;
+ uint32_t r = (a & 0xffffff) + (b & 0xffffff) + c;
m_psw &= 0xff00;
if ((a^r) & (b^r) & 0x00800000)
@@ -480,9 +480,9 @@ UINT32 mn10200_device::do_add(UINT32 a, UINT32 b, UINT32 c)
return r;
}
-UINT32 mn10200_device::do_sub(UINT32 a, UINT32 b, UINT32 c)
+uint32_t mn10200_device::do_sub(uint32_t a, uint32_t b, uint32_t c)
{
- UINT32 r = (a & 0xffffff) - (b & 0xffffff) - c;
+ uint32_t r = (a & 0xffffff) - (b & 0xffffff) - c;
m_psw &= 0xff00;
if ((a^b) & (a^r) & 0x00800000)
@@ -505,7 +505,7 @@ UINT32 mn10200_device::do_sub(UINT32 a, UINT32 b, UINT32 c)
return r;
}
-void mn10200_device::test_nz16(UINT16 v)
+void mn10200_device::test_nz16(uint16_t v)
{
m_psw &= 0xfff0;
if (v & 0x8000)
@@ -514,7 +514,7 @@ void mn10200_device::test_nz16(UINT16 v)
m_psw |= FLAG_ZF;
}
-void mn10200_device::do_jsr(UINT32 to, UINT32 ret)
+void mn10200_device::do_jsr(uint32_t to, uint32_t ret)
{
m_a[3] -= 4;
write_mem24(m_a[3], ret);
@@ -526,7 +526,7 @@ void mn10200_device::do_branch(int condition)
if (condition)
{
m_cycles -= 1;
- change_pc(m_pc + (INT8)read_arg8(m_pc));
+ change_pc(m_pc + (int8_t)read_arg8(m_pc));
}
}
@@ -550,7 +550,7 @@ void mn10200_device::execute_run()
debugger_instruction_hook(this, m_pc);
m_cycles -= 1;
- UINT8 op = read_arg8(m_pc);
+ uint8_t op = read_arg8(m_pc);
m_pc += 1;
// main opcodes
@@ -571,7 +571,7 @@ void mn10200_device::execute_run()
// mov (an), dm
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- m_d[op&3] = (INT16)read_mem16(m_a[op>>2&3]);
+ m_d[op&3] = (int16_t)read_mem16(m_a[op>>2&3]);
break;
// movbu (an), dm
@@ -583,7 +583,7 @@ void mn10200_device::execute_run()
// mov dm, (d8, an)
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
- write_mem16((m_a[op>>2&3] + (INT8)read_arg8(m_pc)), m_d[op&3]);
+ write_mem16((m_a[op>>2&3] + (int8_t)read_arg8(m_pc)), m_d[op&3]);
m_pc += 1;
break;
@@ -591,14 +591,14 @@ void mn10200_device::execute_run()
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
m_cycles -= 1;
- write_mem24((m_a[op>>2&3] + (INT8)read_arg8(m_pc)), m_a[op&3]);
+ write_mem24((m_a[op>>2&3] + (int8_t)read_arg8(m_pc)), m_a[op&3]);
m_pc += 1;
break;
// mov (d8, an), dm
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
- m_d[op&3] = (INT16)read_mem16(m_a[op>>2&3] + (INT8)read_arg8(m_pc));
+ m_d[op&3] = (int16_t)read_mem16(m_a[op>>2&3] + (int8_t)read_arg8(m_pc));
m_pc += 1;
break;
@@ -606,7 +606,7 @@ void mn10200_device::execute_run()
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
m_cycles -= 1;
- m_a[op&3] = read_mem24(m_a[op>>2&3] + (INT8)read_arg8(m_pc));
+ m_a[op&3] = read_mem24(m_a[op>>2&3] + (int8_t)read_arg8(m_pc));
m_pc += 1;
break;
@@ -618,7 +618,7 @@ void mn10200_device::execute_run()
// mov imm8, dn
case 0x80: case 0x85: case 0x8a: case 0x8f:
- m_d[op&3] = (INT8)read_arg8(m_pc);
+ m_d[op&3] = (int8_t)read_arg8(m_pc);
m_pc += 1;
break;
@@ -636,22 +636,22 @@ void mn10200_device::execute_run()
// extx dn
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
- m_d[op&3] = (INT16)m_d[op&3];
+ m_d[op&3] = (int16_t)m_d[op&3];
break;
// extxu dn
case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- m_d[op&3] = (UINT16)m_d[op&3];
+ m_d[op&3] = (uint16_t)m_d[op&3];
break;
// extxb dn
case 0xb8: case 0xb9: case 0xba: case 0xbb:
- m_d[op&3] = (INT8)m_d[op&3];
+ m_d[op&3] = (int8_t)m_d[op&3];
break;
// extxbu dn
case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- m_d[op&3] = (UINT8)m_d[op&3];
+ m_d[op&3] = (uint8_t)m_d[op&3];
break;
// mov dn, (abs16)
@@ -668,7 +668,7 @@ void mn10200_device::execute_run()
// mov (abs16), dn
case 0xc8: case 0xc9: case 0xca: case 0xcb:
- m_d[op&3] = (INT16)read_mem16(read_arg16(m_pc));
+ m_d[op&3] = (int16_t)read_mem16(read_arg16(m_pc));
m_pc += 2;
break;
@@ -680,19 +680,19 @@ void mn10200_device::execute_run()
// add imm8, an
case 0xd0: case 0xd1: case 0xd2: case 0xd3:
- m_a[op&3] = do_add(m_a[op&3], (INT8)read_arg8(m_pc));
+ m_a[op&3] = do_add(m_a[op&3], (int8_t)read_arg8(m_pc));
m_pc += 1;
break;
// add imm8, dn
case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- m_d[op&3] = do_add(m_d[op&3], (INT8)read_arg8(m_pc));
+ m_d[op&3] = do_add(m_d[op&3], (int8_t)read_arg8(m_pc));
m_pc += 1;
break;
// cmp imm8, dn
case 0xd8: case 0xd9: case 0xda: case 0xdb:
- do_sub(m_d[op&3], (INT8)read_arg8(m_pc));
+ do_sub(m_d[op&3], (int8_t)read_arg8(m_pc));
m_pc += 1;
break;
@@ -789,20 +789,20 @@ void mn10200_device::execute_run()
// mov imm16, dn
case 0xf8: case 0xf9: case 0xfa: case 0xfb:
- m_d[op&3] = (INT16)read_arg16(m_pc);
+ m_d[op&3] = (int16_t)read_arg16(m_pc);
m_pc += 2;
break;
// jmp label16
case 0xfc:
m_cycles -= 1;
- change_pc(m_pc + 2 + (INT16)read_arg16(m_pc));
+ change_pc(m_pc + 2 + (int16_t)read_arg16(m_pc));
break;
// jsr label16
case 0xfd:
m_cycles -= 3;
- do_jsr(m_pc + 2 + (INT16)read_arg16(m_pc), m_pc + 2);
+ do_jsr(m_pc + 2 + (int16_t)read_arg16(m_pc), m_pc + 2);
break;
// rts
@@ -844,7 +844,7 @@ void mn10200_device::execute_run()
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
{
m_cycles -= 3;
- UINT8 v = read_mem8(m_a[op>>2&3]);
+ uint8_t v = read_mem8(m_a[op>>2&3]);
test_nz16(v & m_d[op&3]);
write_mem8(m_a[op>>2&3], v | m_d[op&3]);
break;
@@ -855,7 +855,7 @@ void mn10200_device::execute_run()
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
{
m_cycles -= 3;
- UINT8 v = read_mem8(m_a[op>>2&3]);
+ uint8_t v = read_mem8(m_a[op>>2&3]);
test_nz16(v & m_d[op&3]);
write_mem8(m_a[op>>2&3], v & ~m_d[op&3]);
break;
@@ -870,7 +870,7 @@ void mn10200_device::execute_run()
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
- m_d[op&3] = (INT8)read_mem8(m_a[op>>2&3] + m_d[op>>4&3]);
+ m_d[op&3] = (int8_t)read_mem8(m_a[op>>2&3] + m_d[op>>4&3]);
break;
// movbu (di, an), dm
@@ -922,7 +922,7 @@ void mn10200_device::execute_run()
// mov (di, an), dm
case 0x40:
- m_d[op&3] = (INT16)read_mem16(m_a[op>>2&3] + m_d[op>>4&3]);
+ m_d[op&3] = (int16_t)read_mem16(m_a[op>>2&3] + m_d[op>>4&3]);
break;
// mov am, (di, an)
@@ -991,7 +991,7 @@ void mn10200_device::execute_run()
// addc dn, dm
case 0x80:
{
- UINT16 mask0 = ~FLAG_ZF | (m_psw & FLAG_ZF);
+ uint16_t mask0 = ~FLAG_ZF | (m_psw & FLAG_ZF);
m_d[op&3] = do_add(m_d[op&3], m_d[op>>2&3], (m_psw & FLAG_CF) ? 1 : 0);
m_psw &= mask0; // ZF can only be set if it was set before the operation
break;
@@ -1000,7 +1000,7 @@ void mn10200_device::execute_run()
// subc dn, dm
case 0x90:
{
- UINT16 mask0 = ~FLAG_ZF | (m_psw & FLAG_ZF);
+ uint16_t mask0 = ~FLAG_ZF | (m_psw & FLAG_ZF);
m_d[op&3] = do_sub(m_d[op&3], m_d[op>>2&3], (m_psw & FLAG_CF) ? 1 : 0);
m_psw &= mask0; // ZF can only be set if it was set before the operation
break;
@@ -1064,7 +1064,7 @@ void mn10200_device::execute_run()
// rol dn
case 0x30: case 0x31: case 0x32: case 0x33:
{
- UINT32 d = m_d[op&3];
+ uint32_t d = m_d[op&3];
test_nz16(m_d[op&3] = (d & 0xff0000) | ((d << 1) & 0x00fffe) | ((m_psw & FLAG_CF) ? 1 : 0));
if (d & 0x8000)
m_psw |= FLAG_CF;
@@ -1074,7 +1074,7 @@ void mn10200_device::execute_run()
// ror dn
case 0x34: case 0x35: case 0x36: case 0x37:
{
- UINT32 d = m_d[op&3];
+ uint32_t d = m_d[op&3];
test_nz16(m_d[op&3] = (d & 0xff0000) | ((d >> 1) & 0x007fff) | ((m_psw & FLAG_CF) ? 0x8000 : 0));
if (d & 1)
m_psw |= FLAG_CF;
@@ -1084,7 +1084,7 @@ void mn10200_device::execute_run()
// asr dn
case 0x38: case 0x39: case 0x3a: case 0x3b:
{
- UINT32 d = m_d[op&3];
+ uint32_t d = m_d[op&3];
test_nz16(m_d[op&3] = (d & 0xff8000) | ((d >> 1) & 0x007fff));
if (d & 1)
m_psw |= FLAG_CF;
@@ -1094,7 +1094,7 @@ void mn10200_device::execute_run()
// lsr dn
case 0x3c: case 0x3d: case 0x3e: case 0x3f:
{
- UINT32 d = m_d[op&3];
+ uint32_t d = m_d[op&3];
test_nz16(m_d[op&3] = (d & 0xff0000) | ((d >> 1) & 0x007fff));
if (d & 1)
m_psw |= FLAG_CF;
@@ -1106,7 +1106,7 @@ void mn10200_device::execute_run()
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
{
m_cycles -= 10;
- UINT32 res = ((INT16)m_d[op&3]) * ((INT16)m_d[op>>2&3]);
+ uint32_t res = ((int16_t)m_d[op&3]) * ((int16_t)m_d[op>>2&3]);
m_d[op&3] = res & 0xffffff;
m_psw &= 0xff00; // f4 is undefined
if (res & 0x80000000)
@@ -1122,7 +1122,7 @@ void mn10200_device::execute_run()
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
{
m_cycles -= 10;
- UINT32 res = ((UINT16)m_d[op&3]) * ((UINT16)m_d[op>>2&3]);
+ uint32_t res = ((uint16_t)m_d[op&3]) * ((uint16_t)m_d[op>>2&3]);
m_d[op&3] = res & 0xffffff;
m_psw &= 0xff00; // f4 is undefined
if (res & 0x80000000)
@@ -1137,12 +1137,12 @@ void mn10200_device::execute_run()
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
{
- UINT32 n, d, q, r;
+ uint32_t n, d, q, r;
m_cycles -= 11;
m_psw &= 0xff00; // f7 may be undefined
- n = (m_mdr << 16) | (UINT16)m_d[op&3];
- d = (UINT16)m_d[op>>2&3];
+ n = (m_mdr << 16) | (uint16_t)m_d[op&3];
+ d = (uint16_t)m_d[op>>2&3];
if (d == 0)
{
// divide by 0
@@ -1308,7 +1308,7 @@ void mn10200_device::execute_run()
// mov (d24, an), dm
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
- m_d[op&3] = (INT16)read_mem16(m_a[op>>2&3] + read_arg24(m_pc));
+ m_d[op&3] = (int16_t)read_mem16(m_a[op>>2&3] + read_arg24(m_pc));
break;
// movbu (d24, an), dm
@@ -1320,7 +1320,7 @@ void mn10200_device::execute_run()
// movb (d24, an), dm
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- m_d[op&3] = (INT8)read_mem8(m_a[op>>2&3] + read_arg24(m_pc));
+ m_d[op&3] = (int8_t)read_mem8(m_a[op>>2&3] + read_arg24(m_pc));
break;
// movx (d24, an), dm
@@ -1332,12 +1332,12 @@ void mn10200_device::execute_run()
// mov (abs24), dn
case 0xc0: case 0xc1: case 0xc2: case 0xc3:
- m_d[op&3] = (INT16)read_mem16(read_arg24(m_pc));
+ m_d[op&3] = (int16_t)read_mem16(read_arg24(m_pc));
break;
// movb (abs24), dn
case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- m_d[op&3] = (INT8)read_mem8(read_arg24(m_pc));
+ m_d[op&3] = (int8_t)read_mem8(read_arg24(m_pc));
break;
// movbu (abs24), dn
@@ -1405,39 +1405,39 @@ void mn10200_device::execute_run()
// addnf imm8, an
case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- m_a[op&3] = m_a[op&3] + (INT8)read_arg8(m_pc);
+ m_a[op&3] = m_a[op&3] + (int8_t)read_arg8(m_pc);
break;
// movb dm, (d8, an)
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- write_mem8(m_a[op>>2&3] + (INT8)read_arg8(m_pc), m_d[op&3]);
+ write_mem8(m_a[op>>2&3] + (int8_t)read_arg8(m_pc), m_d[op&3]);
break;
// movb (d8, an), dm
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- m_d[op&3] = (INT8)read_mem8(m_a[op>>2&3] + (INT8)read_arg8(m_pc));
+ m_d[op&3] = (int8_t)read_mem8(m_a[op>>2&3] + (int8_t)read_arg8(m_pc));
break;
// movbu (d8, an), dm
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
- m_d[op&3] = read_mem8(m_a[op>>2&3] + (INT8)read_arg8(m_pc));
+ m_d[op&3] = read_mem8(m_a[op>>2&3] + (int8_t)read_arg8(m_pc));
break;
// movx dm, (d8, an)
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
m_cycles -= 1;
- write_mem24(m_a[op>>2&3] + (INT8)read_arg8(m_pc), m_d[op&3]);
+ write_mem24(m_a[op>>2&3] + (int8_t)read_arg8(m_pc), m_d[op&3]);
break;
// movx (d8, an), dm
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
m_cycles -= 1;
- m_d[op&3] = read_mem24(m_a[op>>2&3] + (INT8)read_arg8(m_pc));
+ m_d[op&3] = read_mem24(m_a[op>>2&3] + (int8_t)read_arg8(m_pc));
break;
// bltx label8
@@ -1560,12 +1560,12 @@ void mn10200_device::execute_run()
// add imm16, an
case 0x08: case 0x09: case 0x0a: case 0x0b:
- m_a[op&3] = do_add(m_a[op&3], (INT16)read_arg16(m_pc));
+ m_a[op&3] = do_add(m_a[op&3], (int16_t)read_arg16(m_pc));
break;
// sub imm16, an
case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- m_a[op&3] = do_sub(m_a[op&3], (INT16)read_arg16(m_pc));
+ m_a[op&3] = do_sub(m_a[op&3], (int16_t)read_arg16(m_pc));
break;
// and imm16, psw
@@ -1583,12 +1583,12 @@ void mn10200_device::execute_run()
// add imm16, dn
case 0x18: case 0x19: case 0x1a: case 0x1b:
- m_d[op&3] = do_add(m_d[op&3], (INT16)read_arg16(m_pc));
+ m_d[op&3] = do_add(m_d[op&3], (int16_t)read_arg16(m_pc));
break;
// sub imm16, dn
case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- m_d[op&3] = do_sub(m_d[op&3], (INT16)read_arg16(m_pc));
+ m_d[op&3] = do_sub(m_d[op&3], (int16_t)read_arg16(m_pc));
break;
// mov an, (abs16)
@@ -1610,7 +1610,7 @@ void mn10200_device::execute_run()
// cmp imm16, dn
case 0x48: case 0x49: case 0x4a: case 0x4b:
- do_sub(m_d[op&3], (INT16)read_arg16(m_pc));
+ do_sub(m_d[op&3], (int16_t)read_arg16(m_pc));
break;
// xor imm16, dn
@@ -1621,59 +1621,59 @@ void mn10200_device::execute_run()
// movbu (d16, an), dm
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
- m_d[op&3] = read_mem8(m_a[op>>2&3] + (INT16)read_arg16(m_pc));
+ m_d[op&3] = read_mem8(m_a[op>>2&3] + (int16_t)read_arg16(m_pc));
break;
// movx dm, (d16, an)
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
m_cycles -= 1;
- write_mem24(m_a[op>>2&3] + (INT16)read_arg16(m_pc), m_d[op&3]);
+ write_mem24(m_a[op>>2&3] + (int16_t)read_arg16(m_pc), m_d[op&3]);
break;
// movx (d16, an), dm
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
m_cycles -= 1;
- m_d[op&3] = read_mem24(m_a[op>>2&3] + (INT16)read_arg16(m_pc));
+ m_d[op&3] = read_mem24(m_a[op>>2&3] + (int16_t)read_arg16(m_pc));
break;
// mov dm, (d16, an)
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
- write_mem16(m_a[op>>2&3] + (INT16)read_arg16(m_pc), m_d[op&3]);
+ write_mem16(m_a[op>>2&3] + (int16_t)read_arg16(m_pc), m_d[op&3]);
break;
// movb dm, (d16, an)
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f:
- write_mem8(m_a[op>>2&3] + (INT16)read_arg16(m_pc), m_d[op&3]);
+ write_mem8(m_a[op>>2&3] + (int16_t)read_arg16(m_pc), m_d[op&3]);
break;
// mov am, (d16, an)
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
m_cycles -= 1;
- write_mem24(m_a[op>>2&3] + (INT16)read_arg16(m_pc), m_a[op&3]);
+ write_mem24(m_a[op>>2&3] + (int16_t)read_arg16(m_pc), m_a[op&3]);
break;
// mov (d16, an), am
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
m_cycles -= 1;
- m_a[op&3] = read_mem24(m_a[op>>2&3] + (INT16)read_arg16(m_pc));
+ m_a[op&3] = read_mem24(m_a[op>>2&3] + (int16_t)read_arg16(m_pc));
break;
// mov (d16, an), dm
case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
- m_d[op&3] = (INT16)read_mem16(m_a[op>>2&3] + (INT16)read_arg16(m_pc));
+ m_d[op&3] = (int16_t)read_mem16(m_a[op>>2&3] + (int16_t)read_arg16(m_pc));
break;
// movb (d16, an), dm
case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
- m_d[op&3] = (INT8)read_mem8(m_a[op>>2&3] + (INT16)read_arg16(m_pc));
+ m_d[op&3] = (int8_t)read_mem8(m_a[op>>2&3] + (int16_t)read_arg16(m_pc));
break;
default:
diff --git a/src/devices/cpu/mn10200/mn10200.h b/src/devices/cpu/mn10200/mn10200.h
index 38073fb8e27..100eb03a2b8 100644
--- a/src/devices/cpu/mn10200/mn10200.h
+++ b/src/devices/cpu/mn10200/mn10200.h
@@ -46,7 +46,7 @@ class mn10200_device : public cpu_device
{
public:
// construction/destruction
- mn10200_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor program, const char *shortname, const char *source)
+ mn10200_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, program), m_program(nullptr)
, m_read_port0(*this), m_read_port1(*this), m_read_port2(*this), m_read_port3(*this), m_read_port4(*this)
@@ -76,11 +76,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; } // internal /2 divider
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); } // internal /2 divider
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 13+7; } // max opcode cycles + interrupt duration
- virtual UINT32 execute_input_lines() const override { return 4; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; } // internal /2 divider
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); } // internal /2 divider
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 13+7; } // max opcode cycles + interrupt duration
+ virtual uint32_t execute_input_lines() const override { return 4; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -91,9 +91,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 7; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 7; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -106,24 +106,24 @@ private:
int m_cycles;
// The UINT32s are really UINT24
- UINT32 m_pc;
- UINT32 m_d[4];
- UINT32 m_a[4];
- UINT16 m_psw;
- UINT16 m_mdr;
+ uint32_t m_pc;
+ uint32_t m_d[4];
+ uint32_t m_a[4];
+ uint16_t m_psw;
+ uint16_t m_mdr;
// interrupts
void take_irq(int level, int group);
void check_irq();
void check_ext_irq();
- UINT8 m_icrl[MN10200_NUM_IRQ_GROUPS];
- UINT8 m_icrh[MN10200_NUM_IRQ_GROUPS];
+ uint8_t m_icrl[MN10200_NUM_IRQ_GROUPS];
+ uint8_t m_icrh[MN10200_NUM_IRQ_GROUPS];
- UINT8 m_nmicr;
- UINT8 m_iagr;
- UINT8 m_extmdl;
- UINT8 m_extmdh;
+ uint8_t m_nmicr;
+ uint8_t m_iagr;
+ uint8_t m_extmdl;
+ uint8_t m_extmdh;
bool m_possible_irq;
// timers
@@ -137,70 +137,70 @@ private:
struct
{
- UINT8 mode;
- UINT8 base;
- UINT8 cur;
+ uint8_t mode;
+ uint8_t base;
+ uint8_t cur;
} m_simple_timer[MN10200_NUM_TIMERS_8BIT];
struct
{
- UINT8 mode;
- UINT8 base;
- UINT8 cur;
+ uint8_t mode;
+ uint8_t base;
+ uint8_t cur;
} m_prescaler[MN10200_NUM_PRESCALERS];
// dma
struct
{
- UINT32 adr;
- UINT32 count;
- UINT16 iadr;
- UINT8 ctrll;
- UINT8 ctrlh;
- UINT8 irq;
+ uint32_t adr;
+ uint32_t count;
+ uint16_t iadr;
+ uint8_t ctrll;
+ uint8_t ctrlh;
+ uint8_t irq;
} m_dma[8];
// serial
struct
{
- UINT8 ctrll;
- UINT8 ctrlh;
- UINT8 buf;
+ uint8_t ctrll;
+ uint8_t ctrlh;
+ uint8_t buf;
} m_serial[2];
// ports
- UINT8 m_pplul;
- UINT8 m_ppluh;
- UINT8 m_p3md;
- UINT8 m_p4;
+ uint8_t m_pplul;
+ uint8_t m_ppluh;
+ uint8_t m_p3md;
+ uint8_t m_p4;
struct
{
- UINT8 out;
- UINT8 dir;
+ uint8_t out;
+ uint8_t dir;
} m_port[4];
// internal read/write
- inline UINT8 read_arg8(UINT32 address) { return m_program->read_byte(address); }
- inline UINT16 read_arg16(UINT32 address) { return m_program->read_byte(address) | m_program->read_byte(address + 1) << 8; }
- inline UINT32 read_arg24(UINT32 address) { return m_program->read_byte(address) | m_program->read_byte(address + 1) << 8 | m_program->read_byte(address + 2) << 16; }
+ inline uint8_t read_arg8(uint32_t address) { return m_program->read_byte(address); }
+ inline uint16_t read_arg16(uint32_t address) { return m_program->read_byte(address) | m_program->read_byte(address + 1) << 8; }
+ inline uint32_t read_arg24(uint32_t address) { return m_program->read_byte(address) | m_program->read_byte(address + 1) << 8 | m_program->read_byte(address + 2) << 16; }
- inline UINT8 read_mem8(UINT32 address) { return m_program->read_byte(address); }
- inline UINT16 read_mem16(UINT32 address) { return m_program->read_word(address & ~1); }
- inline UINT32 read_mem24(UINT32 address) { return m_program->read_word(address & ~1) | m_program->read_byte((address & ~1) + 2) << 16; }
+ inline uint8_t read_mem8(uint32_t address) { return m_program->read_byte(address); }
+ inline uint16_t read_mem16(uint32_t address) { return m_program->read_word(address & ~1); }
+ inline uint32_t read_mem24(uint32_t address) { return m_program->read_word(address & ~1) | m_program->read_byte((address & ~1) + 2) << 16; }
- inline void write_mem8(UINT32 address, UINT8 data) { m_program->write_byte(address, data); }
- inline void write_mem16(UINT32 address, UINT16 data) { m_program->write_word(address & ~1, data); }
- inline void write_mem24(UINT32 address, UINT32 data) { m_program->write_word(address & ~1, data); m_program->write_byte((address & ~1) + 2, data >> 16); }
+ inline void write_mem8(uint32_t address, uint8_t data) { m_program->write_byte(address, data); }
+ inline void write_mem16(uint32_t address, uint16_t data) { m_program->write_word(address & ~1, data); }
+ inline void write_mem24(uint32_t address, uint32_t data) { m_program->write_word(address & ~1, data); m_program->write_byte((address & ~1) + 2, data >> 16); }
- inline void change_pc(UINT32 pc) { m_pc = pc & 0xffffff; }
+ inline void change_pc(uint32_t pc) { m_pc = pc & 0xffffff; }
// opcode helpers
- void illegal(UINT8 prefix, UINT8 op);
- UINT32 do_add(UINT32 a, UINT32 b, UINT32 c = 0);
- UINT32 do_sub(UINT32 a, UINT32 b, UINT32 c = 0);
- void test_nz16(UINT16 v);
- void do_jsr(UINT32 to, UINT32 ret);
+ void illegal(uint8_t prefix, uint8_t op);
+ uint32_t do_add(uint32_t a, uint32_t b, uint32_t c = 0);
+ uint32_t do_sub(uint32_t a, uint32_t b, uint32_t c = 0);
+ void test_nz16(uint16_t v);
+ void do_jsr(uint32_t to, uint32_t ret);
void do_branch(int condition = 1);
};
@@ -208,7 +208,7 @@ private:
class mn1020012a_device : public mn10200_device
{
public:
- mn1020012a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mn1020012a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/mn10200/mn102dis.cpp b/src/devices/cpu/mn10200/mn102dis.cpp
index c3b09b0ed93..8a03ea5dec8 100644
--- a/src/devices/cpu/mn10200/mn102dis.cpp
+++ b/src/devices/cpu/mn10200/mn102dis.cpp
@@ -8,55 +8,55 @@
#include <stdio.h>
-static const UINT8 *sOpROM; // current opROM pointer
-static UINT32 sBasePC;
+static const uint8_t *sOpROM; // current opROM pointer
+static uint32_t sBasePC;
-static UINT8 program_read_byte(offs_t pc)
+static uint8_t program_read_byte(offs_t pc)
{
return sOpROM[pc - sBasePC];
}
-static UINT32 r16u(offs_t pc)
+static uint32_t r16u(offs_t pc)
{
return sOpROM[pc - sBasePC] | (sOpROM[pc - sBasePC + 1]<<8);
}
-static INT32 r16s(offs_t pc)
+static int32_t r16s(offs_t pc)
{
- return (INT16)(sOpROM[pc - sBasePC] | (sOpROM[pc - sBasePC + 1]<<8));
+ return (int16_t)(sOpROM[pc - sBasePC] | (sOpROM[pc - sBasePC + 1]<<8));
}
-static UINT32 r24u(offs_t pc)
+static uint32_t r24u(offs_t pc)
{
return sOpROM[pc - sBasePC] | (sOpROM[pc - sBasePC + 1]<<8) | (sOpROM[pc - sBasePC + 2]<<16);
}
-static INT32 r24s(offs_t pc)
+static int32_t r24s(offs_t pc)
{
- return sOpROM[pc - sBasePC] | (sOpROM[pc - sBasePC + 1]<<8) | ((INT8)sOpROM[pc - sBasePC + 2]<<16);
+ return sOpROM[pc - sBasePC] | (sOpROM[pc - sBasePC + 1]<<8) | ((int8_t)sOpROM[pc - sBasePC + 2]<<16);
}
-static const char *i8str(INT8 v)
+static const char *i8str(int8_t v)
{
static char res[0x10];
if(v>=0)
sprintf(res, "$%x", v);
else
- sprintf(res, "-$%x", (UINT8)(-v));
+ sprintf(res, "-$%x", (uint8_t)(-v));
return res;
}
-static const char *i16str(INT16 v)
+static const char *i16str(int16_t v)
{
static char res[0x10];
if(v>=0)
sprintf(res, "$%x", v);
else
- sprintf(res, "-$%x", (UINT16)(-v));
+ sprintf(res, "-$%x", (uint16_t)(-v));
return res;
}
-static const char *i24str(INT32 v)
+static const char *i24str(int32_t v)
{
static char res[0x10];
if(v>=0)
@@ -67,9 +67,9 @@ static const char *i24str(INT32 v)
}
-static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
+static int mn102_disassemble(char *buffer, uint32_t pc, const uint8_t *oprom)
{
- UINT8 opcode;
+ uint8_t opcode;
sOpROM = oprom;
sBasePC = pc;
@@ -185,47 +185,47 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
return 3;
case 0xe0:
- sprintf(buffer, "blt $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "blt $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe1:
- sprintf(buffer, "bgt $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "bgt $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe2:
- sprintf(buffer, "bge $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "bge $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe3:
- sprintf(buffer, "ble $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "ble $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe4:
- sprintf(buffer, "bcs $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "bcs $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe5:
- sprintf(buffer, "bhi $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "bhi $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe6:
- sprintf(buffer, "bcc $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "bcc $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe7:
- sprintf(buffer, "bls $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "bls $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe8:
- sprintf(buffer, "beq $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "beq $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xe9:
- sprintf(buffer, "bne $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "bne $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xea:
- sprintf(buffer, "bra $%x", (pc+2+(INT8)program_read_byte(pc+1)) & 0xffffff);
+ sprintf(buffer, "bra $%x", (pc+2+(int8_t)program_read_byte(pc+1)) & 0xffffff);
return 2;
case 0xeb:
@@ -470,12 +470,12 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
{
case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
sprintf(buffer, "tbz ($%x) %d, $%x", r24u(pc+3), opcode & 7,
- (pc+7+(INT8)program_read_byte(pc+6)) & 0xffffff);
+ (pc+7+(int8_t)program_read_byte(pc+6)) & 0xffffff);
return 7;
case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
sprintf(buffer, "tbnz ($%x) %d, $%x", r24u(pc+3), opcode & 7,
- (pc+7+(INT8)program_read_byte(pc+6)) & 0xffffff);
+ (pc+7+(int8_t)program_read_byte(pc+6)) & 0xffffff);
return 7;
case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
@@ -497,7 +497,7 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
sprintf(buffer, "tbz (%s, a%d) %d, $%x", i8str(program_read_byte(pc+3)), 2+((opcode>>3)&1), opcode & 7,
- (pc+5+(INT8)program_read_byte(pc+4)) & 0xffffff);
+ (pc+5+(int8_t)program_read_byte(pc+4)) & 0xffffff);
return 5;
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
@@ -508,7 +508,7 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
sprintf(buffer, "tbnz (%s, a%d) %d, $%x", i8str(program_read_byte(pc+3)), 2+((opcode>>3)&1), opcode & 7,
- (pc+5+(INT8)program_read_byte(pc+4)) & 0xffffff);
+ (pc+5+(int8_t)program_read_byte(pc+4)) & 0xffffff);
return 5;
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
@@ -707,7 +707,7 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
{
- UINT8 opcode2 = program_read_byte(pc+2);
+ uint8_t opcode2 = program_read_byte(pc+2);
switch(opcode2)
{
case 0x00:
@@ -731,7 +731,7 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
{
- UINT8 opcode2 = program_read_byte(pc+2);
+ uint8_t opcode2 = program_read_byte(pc+2);
switch(opcode2)
{
case 0x10:
@@ -751,7 +751,7 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
sprintf(buffer, "tbz (%s, a%d) %d, $%x", i8str(program_read_byte(pc+2)), (opcode>>3)&1, opcode & 7,
- (pc+4+(INT8)program_read_byte(pc+3)) & 0xffffff);
+ (pc+4+(int8_t)program_read_byte(pc+3)) & 0xffffff);
return 4;
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
@@ -762,7 +762,7 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
sprintf(buffer, "tbnz (%s, a%d) %d, $%x", i8str(program_read_byte(pc+2)), (opcode>>3)&1, opcode & 7,
- (pc+4+(INT8)program_read_byte(pc+3)) & 0xffffff);
+ (pc+4+(int8_t)program_read_byte(pc+3)) & 0xffffff);
return 4;
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
@@ -772,12 +772,12 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
sprintf(buffer, "tbz ($%x) %d, $%x", r16u(pc+2), opcode & 7,
- (pc+5+(INT8)program_read_byte(pc+4)) & 0xffffff);
+ (pc+5+(int8_t)program_read_byte(pc+4)) & 0xffffff);
return 5;
case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
sprintf(buffer, "tbnz ($%x) %d, $%x", r16u(pc+2), opcode & 7,
- (pc+5+(INT8)program_read_byte(pc+4)) & 0xffffff);
+ (pc+5+(int8_t)program_read_byte(pc+4)) & 0xffffff);
return 5;
case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
@@ -789,64 +789,64 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
return 4;
case 0xe0:
- sprintf(buffer, "bltx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bltx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe1:
- sprintf(buffer, "bgtx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bgtx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe2:
- sprintf(buffer, "bgex $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bgex $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe3:
- sprintf(buffer, "blex $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "blex $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe4:
- sprintf(buffer, "bcsx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bcsx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe5:
- sprintf(buffer, "bhix $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bhix $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe6:
- sprintf(buffer, "bccx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bccx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe7:
- sprintf(buffer, "blsx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "blsx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe8:
- sprintf(buffer, "beqx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "beqx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xe9:
- sprintf(buffer, "bnex $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bnex $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xec:
- sprintf(buffer, "bvcx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bvcx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xed:
- sprintf(buffer, "bvsx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bvsx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xee:
- sprintf(buffer, "bncx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bncx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xef:
- sprintf(buffer, "bnsx $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bnsx $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7:
{
- UINT8 opcode2 = program_read_byte(pc+2);
+ uint8_t opcode2 = program_read_byte(pc+2);
switch(opcode2)
{
case 0x04:
@@ -871,19 +871,19 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
}
case 0xfc:
- sprintf(buffer, "bvc $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bvc $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xfd:
- sprintf(buffer, "bvs $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bvs $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xfe:
- sprintf(buffer, "bnc $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bnc $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
case 0xff:
- sprintf(buffer, "bns $%x", (pc+3+(INT8)program_read_byte(pc+2)) & 0xffffff);
+ sprintf(buffer, "bns $%x", (pc+3+(int8_t)program_read_byte(pc+2)) & 0xffffff);
return 3;
default:
diff --git a/src/devices/cpu/nec/nec.cpp b/src/devices/cpu/nec/nec.cpp
index 6738a89f467..33c68acbd69 100644
--- a/src/devices/cpu/nec/nec.cpp
+++ b/src/devices/cpu/nec/nec.cpp
@@ -107,10 +107,10 @@
#include "emu.h"
#include "debugger.h"
-typedef UINT8 BOOLEAN;
-typedef UINT8 BYTE;
-typedef UINT16 WORD;
-typedef UINT32 DWORD;
+typedef uint8_t BOOLEAN;
+typedef uint8_t BYTE;
+typedef uint16_t WORD;
+typedef uint32_t DWORD;
#include "nec.h"
#include "necpriv.h"
@@ -122,7 +122,7 @@ const device_type V33A =&device_creator<v33a_device>;
-nec_common_device::nec_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool is_16bit, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type)
+nec_common_device::nec_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, bool is_16bit, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, is_16bit ? 16 : 8, 20, 0)
, m_io_config("io", ENDIANNESS_LITTLE, is_16bit ? 16 : 8, 16, 0)
@@ -134,13 +134,13 @@ nec_common_device::nec_common_device(const machine_config &mconfig, device_type
}
-v20_device::v20_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v20_device::v20_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: nec_common_device(mconfig, V20, "V20", tag, owner, clock, "v20", __FILE__, false, 0, 4, 4, V20_TYPE)
{
}
-v30_device::v30_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v30_device::v30_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: nec_common_device(mconfig, V30, "V30", tag, owner, clock, "v30", __FILE__, true, BYTE_XOR_LE(0), 6, 2, V30_TYPE)
{
}
@@ -149,19 +149,19 @@ v30_device::v30_device(const machine_config &mconfig, const char *tag, device_t
/* FIXME: Need information about prefetch size and cycles for V33.
* complete guess below, nbbatman will not work
* properly without. */
-v33_device::v33_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v33_device::v33_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: nec_common_device(mconfig, V33, "V33", tag, owner, clock, "v33", __FILE__, true, BYTE_XOR_LE(0), 6, 1, V33_TYPE)
{
}
-v33a_device::v33a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v33a_device::v33a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: nec_common_device(mconfig, V33A, "V33A", tag, owner, clock, "v33A", __FILE__, true, BYTE_XOR_LE(0), 6, 1, V33_TYPE)
{
}
-offs_t nec_common_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t nec_common_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( nec );
return CPU_DISASSEMBLE_NAME(nec)(this, buffer, pc, oprom, opram, options);
@@ -207,15 +207,15 @@ void nec_common_device::do_prefetch(int previous_ICount)
}
-UINT8 nec_common_device::fetch()
+uint8_t nec_common_device::fetch()
{
prefetch();
return m_direct->read_byte((Sreg(PS)<<4)+m_ip++, m_fetch_xor);
}
-UINT16 nec_common_device::fetchword()
+uint16_t nec_common_device::fetchword()
{
- UINT16 r = FETCH();
+ uint16_t r = FETCH();
r |= (FETCH()<<8);
return r;
}
@@ -225,9 +225,9 @@ UINT16 nec_common_device::fetchword()
#include "necea.h"
#include "necmodrm.h"
-static UINT8 parity_table[256];
+static uint8_t parity_table[256];
-UINT8 nec_common_device::fetchop()
+uint8_t nec_common_device::fetchop()
{
prefetch();
return m_direct->read_byte(( Sreg(PS)<<4)+m_ip++, m_fetch_xor);
@@ -269,7 +269,7 @@ void nec_common_device::device_reset()
void nec_common_device::nec_interrupt(unsigned int_num, int/*INTSOURCES*/ source)
{
- UINT32 dest_seg, dest_off;
+ uint32_t dest_seg, dest_off;
i_pushf();
m_TF = m_IF = 0;
@@ -304,7 +304,7 @@ void nec_common_device::external_int()
{
/* the actual vector is retrieved after pushing flags */
/* and clearing the IF */
- nec_interrupt((UINT32)-1, INT_IRQ);
+ nec_interrupt((uint32_t)-1, INT_IRQ);
m_irq_state = CLEAR_LINE;
m_pending_irq &= ~INT_IRQ;
}
@@ -440,7 +440,7 @@ void nec_common_device::device_start()
void nec_common_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
- UINT16 flags = CompressFlags();
+ uint16_t flags = CompressFlags();
switch (entry.index())
{
diff --git a/src/devices/cpu/nec/nec.h b/src/devices/cpu/nec/nec.h
index c0c1fa82327..5d696eb417b 100644
--- a/src/devices/cpu/nec/nec.h
+++ b/src/devices/cpu/nec/nec.h
@@ -23,7 +23,7 @@ class nec_common_device : public cpu_device
{
public:
// construction/destruction
- nec_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, bool is_16bit, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type);
+ nec_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, bool is_16bit, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type);
protected:
// device-level overrides
@@ -31,10 +31,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 80; }
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xff; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 80; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -47,9 +47,9 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -58,66 +58,66 @@ private:
/* NEC registers */
union necbasicregs
{ /* eight general registers */
- UINT16 w[8]; /* viewed as 16 bits registers */
- UINT8 b[16]; /* or as 8 bit registers */
+ uint16_t w[8]; /* viewed as 16 bits registers */
+ uint8_t b[16]; /* or as 8 bit registers */
};
necbasicregs m_regs;
offs_t m_fetch_xor;
- UINT16 m_sregs[4];
+ uint16_t m_sregs[4];
- UINT16 m_ip;
+ uint16_t m_ip;
/* PSW flags */
- INT32 m_SignVal;
- UINT32 m_AuxVal; /* 0 or non-0 valued flags */
- UINT32 m_OverVal;
- UINT32 m_ZeroVal;
- UINT32 m_CarryVal;
- UINT32 m_ParityVal;
- UINT8 m_TF; /* 0 or 1 valued flags */
- UINT8 m_IF;
- UINT8 m_DF;
- UINT8 m_MF;
+ int32_t m_SignVal;
+ uint32_t m_AuxVal; /* 0 or non-0 valued flags */
+ uint32_t m_OverVal;
+ uint32_t m_ZeroVal;
+ uint32_t m_CarryVal;
+ uint32_t m_ParityVal;
+ uint8_t m_TF; /* 0 or 1 valued flags */
+ uint8_t m_IF;
+ uint8_t m_DF;
+ uint8_t m_MF;
/* interrupt related */
- UINT32 m_pending_irq;
- UINT32 m_nmi_state;
- UINT32 m_irq_state;
- UINT32 m_poll_state;
- UINT8 m_no_interrupt;
- UINT8 m_halted;
+ uint32_t m_pending_irq;
+ uint32_t m_nmi_state;
+ uint32_t m_irq_state;
+ uint32_t m_poll_state;
+ uint8_t m_no_interrupt;
+ uint8_t m_halted;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
int m_icount;
- UINT8 m_prefetch_size;
- UINT8 m_prefetch_cycles;
- INT8 m_prefetch_count;
- UINT8 m_prefetch_reset;
- UINT32 m_chip_type;
+ uint8_t m_prefetch_size;
+ uint8_t m_prefetch_cycles;
+ int8_t m_prefetch_count;
+ uint8_t m_prefetch_reset;
+ uint32_t m_chip_type;
- UINT32 m_prefix_base; /* base address of the latest prefix segment */
- UINT8 m_seg_prefix; /* prefix segment indicator */
+ uint32_t m_prefix_base; /* base address of the latest prefix segment */
+ uint8_t m_seg_prefix; /* prefix segment indicator */
- UINT32 m_EA;
- UINT16 m_EO;
- UINT16 m_E16;
+ uint32_t m_EA;
+ uint16_t m_EO;
+ uint16_t m_E16;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
typedef void (nec_common_device::*nec_ophandler)();
- typedef UINT32 (nec_common_device::*nec_eahandler)();
+ typedef uint32_t (nec_common_device::*nec_eahandler)();
static const nec_ophandler s_nec_instruction[256];
static const nec_eahandler s_GetEA[192];
inline void prefetch();
void do_prefetch(int previous_ICount);
- inline UINT8 fetch();
- inline UINT16 fetchword();
- UINT8 fetchop();
+ inline uint8_t fetch();
+ inline uint16_t fetchword();
+ uint8_t fetchop();
void nec_interrupt(unsigned int_num, int source);
void nec_trap();
void external_int();
@@ -369,57 +369,57 @@ union necbasicregs
void i_ffpre();
void i_wait();
- UINT32 EA_000();
- UINT32 EA_001();
- UINT32 EA_002();
- UINT32 EA_003();
- UINT32 EA_004();
- UINT32 EA_005();
- UINT32 EA_006();
- UINT32 EA_007();
- UINT32 EA_100();
- UINT32 EA_101();
- UINT32 EA_102();
- UINT32 EA_103();
- UINT32 EA_104();
- UINT32 EA_105();
- UINT32 EA_106();
- UINT32 EA_107();
- UINT32 EA_200();
- UINT32 EA_201();
- UINT32 EA_202();
- UINT32 EA_203();
- UINT32 EA_204();
- UINT32 EA_205();
- UINT32 EA_206();
- UINT32 EA_207();
+ uint32_t EA_000();
+ uint32_t EA_001();
+ uint32_t EA_002();
+ uint32_t EA_003();
+ uint32_t EA_004();
+ uint32_t EA_005();
+ uint32_t EA_006();
+ uint32_t EA_007();
+ uint32_t EA_100();
+ uint32_t EA_101();
+ uint32_t EA_102();
+ uint32_t EA_103();
+ uint32_t EA_104();
+ uint32_t EA_105();
+ uint32_t EA_106();
+ uint32_t EA_107();
+ uint32_t EA_200();
+ uint32_t EA_201();
+ uint32_t EA_202();
+ uint32_t EA_203();
+ uint32_t EA_204();
+ uint32_t EA_205();
+ uint32_t EA_206();
+ uint32_t EA_207();
};
class v20_device : public nec_common_device
{
public:
- v20_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v20_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class v30_device : public nec_common_device
{
public:
- v30_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v30_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class v33_device : public nec_common_device
{
public:
- v33_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v33_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class v33a_device : public nec_common_device
{
public:
- v33a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v33a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/nec/necdasm.cpp b/src/devices/cpu/nec/necdasm.cpp
index cd326436fd4..1b80daf4eda 100644
--- a/src/devices/cpu/nec/necdasm.cpp
+++ b/src/devices/cpu/nec/necdasm.cpp
@@ -9,7 +9,7 @@
#include "emu.h"
-static const UINT8 *Iconfig;
+static const uint8_t *Iconfig;
enum
{
@@ -67,10 +67,10 @@ enum
struct NEC_I386_OPCODE {
char mnemonic[32];
- UINT32 flags;
- UINT32 param1;
- UINT32 param2;
- UINT32 param3;
+ uint32_t flags;
+ uint32_t param1;
+ uint32_t param2;
+ uint32_t param3;
offs_t dasm_flags;
};
@@ -79,8 +79,8 @@ struct NEC_GROUP_OP {
const NEC_I386_OPCODE *opcode;
};
-static const UINT8 *opcode_ptr;
-static const UINT8 *opcode_ptr_base;
+static const uint8_t *opcode_ptr;
+static const uint8_t *opcode_ptr_base;
static const NEC_I386_OPCODE necv_opcode_table1[256] =
{
@@ -864,9 +864,9 @@ static const char *const nec_sfreg[256] =
"???", "???", "???", "???", "ispr", "???", "???", "idb"
};
-static UINT32 pc;
-static UINT8 modrm;
-static UINT32 segment;
+static uint32_t pc;
+static uint8_t modrm;
+static uint32_t segment;
static offs_t dasm_flags;
static char modrm_string[256];
@@ -875,7 +875,7 @@ static char modrm_string[256];
#define MAX_LENGTH 8
-static inline UINT8 FETCH(void)
+static inline uint8_t FETCH(void)
{
if ((opcode_ptr - opcode_ptr_base) + 1 > MAX_LENGTH)
return 0xff;
@@ -884,9 +884,9 @@ static inline UINT8 FETCH(void)
}
#if 0
-static inline UINT16 FETCH16(void)
+static inline uint16_t FETCH16(void)
{
- UINT16 d;
+ uint16_t d;
if ((opcode_ptr - opcode_ptr_base) + 2 > MAX_LENGTH)
return 0xffff;
d = opcode_ptr[0] | (opcode_ptr[1] << 8);
@@ -896,7 +896,7 @@ static inline UINT16 FETCH16(void)
}
#endif
-static inline UINT8 FETCHD(void)
+static inline uint8_t FETCHD(void)
{
if ((opcode_ptr - opcode_ptr_base) + 1 > MAX_LENGTH)
return 0xff;
@@ -904,9 +904,9 @@ static inline UINT8 FETCHD(void)
return *opcode_ptr++;
}
-static inline UINT16 FETCHD16(void)
+static inline uint16_t FETCHD16(void)
{
- UINT16 d;
+ uint16_t d;
if ((opcode_ptr - opcode_ptr_base) + 2 > MAX_LENGTH)
return 0xffff;
d = opcode_ptr[0] | (opcode_ptr[1] << 8);
@@ -915,7 +915,7 @@ static inline UINT16 FETCHD16(void)
return d;
}
-static char *hexstring(UINT32 value, int digits)
+static char *hexstring(uint32_t value, int digits)
{
static char buffer[20];
buffer[0] = '0';
@@ -926,7 +926,7 @@ static char *hexstring(UINT32 value, int digits)
return (buffer[1] >= '0' && buffer[1] <= '9') ? &buffer[1] : &buffer[0];
}
-static char *shexstring(UINT32 value, int digits, int always)
+static char *shexstring(uint32_t value, int digits, int always)
{
static char buffer[20];
if (value >= 0x80000000)
@@ -940,9 +940,9 @@ static char *shexstring(UINT32 value, int digits, int always)
static void handle_modrm(char* s)
{
- INT8 disp8;
- INT16 disp16;
- UINT8 mod, rm;
+ int8_t disp8;
+ int16_t disp16;
+ uint8_t mod, rm;
modrm = FETCHD();
mod = (modrm >> 6) & 0x3;
@@ -971,7 +971,7 @@ static void handle_modrm(char* s)
case 6:
if( mod == 0 ) {
disp16 = FETCHD16();
- s += sprintf( s, "%s", hexstring((unsigned) (UINT16) disp16, 0) );
+ s += sprintf( s, "%s", hexstring((unsigned) (uint16_t) disp16, 0) );
} else {
s += sprintf( s, "bp" );
}
@@ -980,22 +980,22 @@ static void handle_modrm(char* s)
}
if( mod == 1 ) {
disp8 = FETCHD();
- s += sprintf( s, "%s", shexstring((INT32)disp8, 0, TRUE) );
+ s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, TRUE) );
} else if( mod == 2 ) {
disp16 = FETCHD16();
- s += sprintf( s, "%s", shexstring((INT32)disp16, 0, TRUE) );
+ s += sprintf( s, "%s", shexstring((int32_t)disp16, 0, TRUE) );
}
s += sprintf( s, "]" );
}
-static char* handle_param(char* s, UINT32 param)
+static char* handle_param(char* s, uint32_t param)
{
- UINT8 i8;
- UINT16 i16;
- UINT16 ptr;
- UINT32 addr;
- INT8 d8;
- INT16 d16;
+ uint8_t i8;
+ uint16_t i16;
+ uint16_t ptr;
+ uint32_t addr;
+ int8_t d8;
+ int16_t d16;
switch(param)
{
@@ -1049,17 +1049,17 @@ static char* handle_param(char* s, UINT32 param)
case PARAM_I8:
i8 = FETCHD();
- s += sprintf( s, "%s", shexstring((INT8)i8, 0, FALSE) );
+ s += sprintf( s, "%s", shexstring((int8_t)i8, 0, FALSE) );
break;
case PARAM_I16:
i16 = FETCHD16();
- s += sprintf( s, "%s", shexstring((INT16)i16, 0, FALSE) );
+ s += sprintf( s, "%s", shexstring((int16_t)i16, 0, FALSE) );
break;
case PARAM_UI8:
i8 = FETCHD();
- s += sprintf( s, "%s", shexstring((UINT8)i8, 0, FALSE) );
+ s += sprintf( s, "%s", shexstring((uint8_t)i8, 0, FALSE) );
break;
case PARAM_IMM:
@@ -1132,7 +1132,7 @@ static char* handle_param(char* s, UINT32 param)
return s;
}
-static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
+static void handle_fpu(char *s, uint8_t op1, uint8_t op2)
{
switch (op1 & 0x7)
{
@@ -1507,10 +1507,10 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
}
}
-static void decode_opcode(char *s, const NEC_I386_OPCODE *op, UINT8 op1 )
+static void decode_opcode(char *s, const NEC_I386_OPCODE *op, uint8_t op1 )
{
int i;
- UINT8 op2;
+ uint8_t op2;
switch( op->flags )
{
@@ -1579,9 +1579,9 @@ handle_unknown:
sprintf(s, "???");
}
-int necv_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom, const UINT8 *decryption_table)
+int necv_dasm_one(char *buffer, uint32_t eip, const uint8_t *oprom, const uint8_t *decryption_table)
{
- UINT8 op;
+ uint8_t op;
Iconfig = decryption_table;
opcode_ptr = opcode_ptr_base = oprom;
diff --git a/src/devices/cpu/nec/necea.h b/src/devices/cpu/nec/necea.h
index 2633637304a..1a20c0cdf54 100644
--- a/src/devices/cpu/nec/necea.h
+++ b/src/devices/cpu/nec/necea.h
@@ -1,32 +1,32 @@
// license:BSD-3-Clause
// copyright-holders:Bryan McPhail
-UINT32 nec_common_device::EA_000() { m_EO=Wreg(BW)+Wreg(IX); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_001() { m_EO=Wreg(BW)+Wreg(IY); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_002() { m_EO=Wreg(BP)+Wreg(IX); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_003() { m_EO=Wreg(BP)+Wreg(IY); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_004() { m_EO=Wreg(IX); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_005() { m_EO=Wreg(IY); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_006() { m_EO=FETCH(); m_EO+=FETCH()<<8; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_007() { m_EO=Wreg(BW); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_000() { m_EO=Wreg(BW)+Wreg(IX); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_001() { m_EO=Wreg(BW)+Wreg(IY); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_002() { m_EO=Wreg(BP)+Wreg(IX); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_003() { m_EO=Wreg(BP)+Wreg(IY); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_004() { m_EO=Wreg(IX); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_005() { m_EO=Wreg(IY); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_006() { m_EO=FETCH(); m_EO+=FETCH()<<8; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_007() { m_EO=Wreg(BW); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_100() { m_EO=(Wreg(BW)+Wreg(IX)+(INT8)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_101() { m_EO=(Wreg(BW)+Wreg(IY)+(INT8)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_102() { m_EO=(Wreg(BP)+Wreg(IX)+(INT8)FETCH()); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_103() { m_EO=(Wreg(BP)+Wreg(IY)+(INT8)FETCH()); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_104() { m_EO=(Wreg(IX)+(INT8)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_105() { m_EO=(Wreg(IY)+(INT8)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_106() { m_EO=(Wreg(BP)+(INT8)FETCH()); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_107() { m_EO=(Wreg(BW)+(INT8)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_100() { m_EO=(Wreg(BW)+Wreg(IX)+(int8_t)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_101() { m_EO=(Wreg(BW)+Wreg(IY)+(int8_t)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_102() { m_EO=(Wreg(BP)+Wreg(IX)+(int8_t)FETCH()); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_103() { m_EO=(Wreg(BP)+Wreg(IY)+(int8_t)FETCH()); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_104() { m_EO=(Wreg(IX)+(int8_t)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_105() { m_EO=(Wreg(IY)+(int8_t)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_106() { m_EO=(Wreg(BP)+(int8_t)FETCH()); m_EA=DefaultBase(SS)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_107() { m_EO=(Wreg(BW)+(int8_t)FETCH()); m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_200() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BW)+Wreg(IX)+(INT16)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_201() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BW)+Wreg(IY)+(INT16)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_202() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BP)+Wreg(IX)+(INT16)m_E16; m_EA=DefaultBase(SS)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_203() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BP)+Wreg(IY)+(INT16)m_E16; m_EA=DefaultBase(SS)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_204() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(IX)+(INT16)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_205() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(IY)+(INT16)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_206() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BP)+(INT16)m_E16; m_EA=DefaultBase(SS)+m_EO; return m_EA; }
-UINT32 nec_common_device::EA_207() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BW)+(INT16)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_200() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BW)+Wreg(IX)+(int16_t)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_201() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BW)+Wreg(IY)+(int16_t)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_202() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BP)+Wreg(IX)+(int16_t)m_E16; m_EA=DefaultBase(SS)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_203() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BP)+Wreg(IY)+(int16_t)m_E16; m_EA=DefaultBase(SS)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_204() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(IX)+(int16_t)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_205() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(IY)+(int16_t)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_206() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BP)+(int16_t)m_E16; m_EA=DefaultBase(SS)+m_EO; return m_EA; }
+uint32_t nec_common_device::EA_207() { m_E16=FETCH(); m_E16+=FETCH()<<8; m_EO=Wreg(BW)+(int16_t)m_E16; m_EA=DefaultBase(DS0)+m_EO; return m_EA; }
const nec_common_device::nec_eahandler nec_common_device::s_GetEA[192]=
{
diff --git a/src/devices/cpu/nec/necinstr.hxx b/src/devices/cpu/nec/necinstr.hxx
index 9fc2d9cef5f..bcb56273eaa 100644
--- a/src/devices/cpu/nec/necinstr.hxx
+++ b/src/devices/cpu/nec/necinstr.hxx
@@ -18,7 +18,7 @@ OP( 0x0b, i_or_r16w ) { DEF_r16w; ORW; RegWord(ModRM)=dst; CLKR(15,
OP( 0x0c, i_or_ald8 ) { DEF_ald8; ORB; Breg(AL)=dst; CLKS(4,4,2); }
OP( 0x0d, i_or_axd16 ) { DEF_axd16; ORW; Wreg(AW)=dst; CLKS(4,4,2); }
OP( 0x0e, i_push_cs ) { PUSH(Sreg(PS)); CLKS(12,8,3); }
-OP( 0x0f, i_pre_nec ) { UINT32 ModRM, tmp, tmp2;
+OP( 0x0f, i_pre_nec ) { uint32_t ModRM, tmp, tmp2;
switch (FETCH()) {
case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = Breg(CL) & 0x7; m_ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; m_CarryVal=m_OverVal=0; break; /* Test */
case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = Breg(CL) & 0xf; m_ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; m_CarryVal=m_OverVal=0; break; /* Test */
@@ -167,7 +167,7 @@ OP( 0x61, i_popa ) {
CLKS(75,43,22);
}
OP( 0x62, i_chkind ) {
- UINT32 low,high,tmp;
+ uint32_t low,high,tmp;
GetModRM;
low = GetRMWord(ModRM);
high= GetnextRMWord;
@@ -178,7 +178,7 @@ OP( 0x62, i_chkind ) {
m_icount-=20;
logerror("%06x: bound %04x high %04x low %04x tmp\n",PC(),high,low,tmp);
}
-OP( 0x64, i_repnc ) { UINT32 next = fetchop(); UINT16 c = Wreg(CW);
+OP( 0x64, i_repnc ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
switch(next) { /* Segments */
case 0x26: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
case 0x2e: m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
@@ -206,7 +206,7 @@ OP( 0x64, i_repnc ) { UINT32 next = fetchop(); UINT16 c = Wreg(CW);
m_seg_prefix=FALSE;
}
-OP( 0x65, i_repc ) { UINT32 next = fetchop(); UINT16 c = Wreg(CW);
+OP( 0x65, i_repc ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
switch(next) { /* Segments */
case 0x26: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
case 0x2e: m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
@@ -234,10 +234,10 @@ OP( 0x65, i_repc ) { UINT32 next = fetchop(); UINT16 c = Wreg(CW);
m_seg_prefix=FALSE;
}
-OP( 0x68, i_push_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(tmp); CLKW(12,12,5,12,8,5,Wreg(SP)); }
-OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; tmp = FETCHWORD(); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); m_CarryVal = m_OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; m_icount-=(ModRM >=0xc0 )?38:47;}
-OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH())); PUSH(tmp); CLKW(11,11,5,11,7,3,Wreg(SP)); }
-OP( 0x6b, i_imul_d8 ) { UINT32 src2; DEF_r16w; src2= (WORD)((INT16)((INT8)FETCH())); dst = (INT32)((INT16)src)*(INT32)((INT16)src2); m_CarryVal = m_OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; m_icount-=(ModRM >=0xc0 )?31:39; }
+OP( 0x68, i_push_d16 ) { uint32_t tmp; tmp = FETCHWORD(); PUSH(tmp); CLKW(12,12,5,12,8,5,Wreg(SP)); }
+OP( 0x69, i_imul_d16 ) { uint32_t tmp; DEF_r16w; tmp = FETCHWORD(); dst = (int32_t)((int16_t)src)*(int32_t)((int16_t)tmp); m_CarryVal = m_OverVal = (((int32_t)dst) >> 15 != 0) && (((int32_t)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; m_icount-=(ModRM >=0xc0 )?38:47;}
+OP( 0x6a, i_push_d8 ) { uint32_t tmp = (WORD)((int16_t)((int8_t)FETCH())); PUSH(tmp); CLKW(11,11,5,11,7,3,Wreg(SP)); }
+OP( 0x6b, i_imul_d8 ) { uint32_t src2; DEF_r16w; src2= (WORD)((int16_t)((int8_t)FETCH())); dst = (int32_t)((int16_t)src)*(int32_t)((int16_t)src2); m_CarryVal = m_OverVal = (((int32_t)dst) >> 15 != 0) && (((int32_t)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; m_icount-=(ModRM >=0xc0 )?31:39; }
OP( 0x6c, i_insb ) { PutMemB(DS1,Wreg(IY),read_port_byte(Wreg(DW))); Wreg(IY)+= -2 * m_DF + 1; CLK(8); }
OP( 0x6d, i_insw ) { PutMemW(DS1,Wreg(IY),read_port_word(Wreg(DW))); Wreg(IY)+= -4 * m_DF + 2; CLKS(18,10,8); }
OP( 0x6e, i_outsb ) { write_port_byte(Wreg(DW),GetMemB(DS0,Wreg(IX))); Wreg(IX)+= -2 * m_DF + 1; CLK(8); }
@@ -260,7 +260,7 @@ OP( 0x7d, i_jnl ) { JMP((ZF)||(SF==OF)); CLKS(4,4,3); }
OP( 0x7e, i_jle ) { JMP((ZF)||(SF!=OF)); CLKS(4,4,3); }
OP( 0x7f, i_jnle ) { JMP((SF==OF)&&(!ZF)); CLKS(4,4,3); }
-OP( 0x80, i_80pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = FETCH();
+OP( 0x80, i_80pre ) { uint32_t dst, src; GetModRM; dst = GetRMByte(ModRM); src = FETCH();
if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKS(13,13,6) else CLKS(18,18,7)
switch (ModRM & 0x38) {
case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
@@ -274,7 +274,7 @@ OP( 0x80, i_80pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src =
}
}
-OP( 0x81, i_81pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = FETCH(); src+= (FETCH() << 8);
+OP( 0x81, i_81pre ) { uint32_t dst, src; GetModRM; dst = GetRMWord(ModRM); src = FETCH(); src+= (FETCH() << 8);
if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKW(17,17,8,17,13,6,m_EA) else CLKW(26,26,11,26,18,7,m_EA)
switch (ModRM & 0x38) {
case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
@@ -288,7 +288,7 @@ OP( 0x81, i_81pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src =
}
}
-OP( 0x82, i_82pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = (BYTE)((INT8)FETCH());
+OP( 0x82, i_82pre ) { uint32_t dst, src; GetModRM; dst = GetRMByte(ModRM); src = (BYTE)((int8_t)FETCH());
if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKS(13,13,6) else CLKS(18,18,7)
switch (ModRM & 0x38) {
case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
@@ -302,7 +302,7 @@ OP( 0x82, i_82pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src =
}
}
-OP( 0x83, i_83pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = (WORD)((INT16)((INT8)FETCH()));
+OP( 0x83, i_83pre ) { uint32_t dst, src; GetModRM; dst = GetRMWord(ModRM); src = (WORD)((int16_t)((int8_t)FETCH()));
if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKW(17,17,8,17,13,6,m_EA) else CLKW(26,26,11,26,18,7,m_EA)
switch (ModRM & 0x38) {
case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
@@ -321,10 +321,10 @@ OP( 0x85, i_test_wr16 ) { DEF_wr16; ANDW; CLKR(14,14,8,14,10,6,2,m_EA); }
OP( 0x86, i_xchg_br8 ) { DEF_br8; RegByte(ModRM)=dst; PutbackRMByte(ModRM,src); CLKM(3,3,3,16,18,8); }
OP( 0x87, i_xchg_wr16 ) { DEF_wr16; RegWord(ModRM)=dst; PutbackRMWord(ModRM,src); CLKR(24,24,12,24,16,8,3,m_EA); }
-OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLKM(2,2,2,9,9,3); }
-OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLKR(13,13,5,13,9,3,2,m_EA); }
-OP( 0x8a, i_mov_r8b ) { UINT8 src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLKM(2,2,2,11,11,5); }
-OP( 0x8b, i_mov_r16w ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); RegWord(ModRM)=src; CLKR(15,15,7,15,11,5,2,m_EA); }
+OP( 0x88, i_mov_br8 ) { uint8_t src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLKM(2,2,2,9,9,3); }
+OP( 0x89, i_mov_wr16 ) { uint16_t src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLKR(13,13,5,13,9,3,2,m_EA); }
+OP( 0x8a, i_mov_r8b ) { uint8_t src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLKM(2,2,2,11,11,5); }
+OP( 0x8b, i_mov_r16w ) { uint16_t src; GetModRM; src = GetRMWord(ModRM); RegWord(ModRM)=src; CLKR(15,15,7,15,11,5,2,m_EA); }
OP( 0x8c, i_mov_wsreg ) { GetModRM;
switch (ModRM & 0x38) {
case 0x00: PutRMWord(ModRM,Sreg(DS1)); CLKR(14,14,5,14,10,3,2,m_EA); break;
@@ -334,8 +334,8 @@ OP( 0x8c, i_mov_wsreg ) { GetModRM;
default: logerror("%06x: MOV Sreg - Invalid register\n",PC());
}
}
-OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH(); (void)(this->*s_GetEA[ModRM])(); RegWord(ModRM)=m_EO; CLKS(4,4,2); }
-OP( 0x8e, i_mov_sregw ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); CLKR(15,15,7,15,11,5,2,m_EA);
+OP( 0x8d, i_lea ) { uint16_t ModRM = FETCH(); (void)(this->*s_GetEA[ModRM])(); RegWord(ModRM)=m_EO; CLKS(4,4,2); }
+OP( 0x8e, i_mov_sregw ) { uint16_t src; GetModRM; src = GetRMWord(ModRM); CLKR(15,15,7,15,11,5,2,m_EA);
switch (ModRM & 0x38) {
case 0x00: Sreg(DS1) = src; break; /* mov es,ew */
case 0x08: Sreg(PS) = src; break; /* mov cs,ew */
@@ -345,7 +345,7 @@ OP( 0x8e, i_mov_sregw ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); CLKR(15,
}
m_no_interrupt=1;
}
-OP( 0x8f, i_popw ) { UINT16 tmp; GetModRM; POP(tmp); PutRMWord(ModRM,tmp); m_icount-=21; }
+OP( 0x8f, i_popw ) { uint16_t tmp; GetModRM; POP(tmp); PutRMWord(ModRM,tmp); m_icount-=21; }
OP( 0x90, i_nop ) { CLK(3); /* { if (m_MF == 0) printf("90 -> %06x: \n",PC()); } */ }
OP( 0x91, i_xchg_axcx ) { XchgAWReg(CW); CLK(3); }
OP( 0x92, i_xchg_axdx ) { XchgAWReg(DW); CLK(3); }
@@ -357,21 +357,21 @@ OP( 0x97, i_xchg_axdi ) { XchgAWReg(IY); CLK(3); }
OP( 0x98, i_cbw ) { Breg(AH) = (Breg(AL) & 0x80) ? 0xff : 0; CLK(2); }
OP( 0x99, i_cwd ) { Wreg(DW) = (Breg(AH) & 0x80) ? 0xffff : 0; CLK(4); }
-OP( 0x9a, i_call_far ) { UINT32 tmp, tmp2; tmp = FETCHWORD(); tmp2 = FETCHWORD(); PUSH(Sreg(PS)); PUSH(m_ip); m_ip = (WORD)tmp; Sreg(PS) = (WORD)tmp2; CHANGE_PC; CLKW(29,29,13,29,21,9,Wreg(SP)); }
+OP( 0x9a, i_call_far ) { uint32_t tmp, tmp2; tmp = FETCHWORD(); tmp2 = FETCHWORD(); PUSH(Sreg(PS)); PUSH(m_ip); m_ip = (WORD)tmp; Sreg(PS) = (WORD)tmp2; CHANGE_PC; CLKW(29,29,13,29,21,9,Wreg(SP)); }
OP( 0x9b, i_wait ) { if (!m_poll_state) m_ip--; CLK(5); }
-OP( 0x9c, i_pushf ) { UINT16 tmp = CompressFlags(); PUSH( tmp ); CLKS(12,8,3); }
-OP( 0x9d, i_popf ) { UINT32 tmp; POP(tmp); ExpandFlags(tmp); CLKS(12,8,5); if (m_TF) nec_trap(); }
-OP( 0x9e, i_sahf ) { UINT32 tmp = (CompressFlags() & 0xff00) | (Breg(AH) & 0xd5); ExpandFlags(tmp); CLKS(3,3,2); }
+OP( 0x9c, i_pushf ) { uint16_t tmp = CompressFlags(); PUSH( tmp ); CLKS(12,8,3); }
+OP( 0x9d, i_popf ) { uint32_t tmp; POP(tmp); ExpandFlags(tmp); CLKS(12,8,5); if (m_TF) nec_trap(); }
+OP( 0x9e, i_sahf ) { uint32_t tmp = (CompressFlags() & 0xff00) | (Breg(AH) & 0xd5); ExpandFlags(tmp); CLKS(3,3,2); }
OP( 0x9f, i_lahf ) { Breg(AH) = CompressFlags() & 0xff; CLKS(3,3,2); }
-OP( 0xa0, i_mov_aldisp ) { UINT32 addr; addr = FETCHWORD(); Breg(AL) = GetMemB(DS0, addr); CLKS(10,10,5); }
-OP( 0xa1, i_mov_axdisp ) { UINT32 addr; addr = FETCHWORD(); Wreg(AW) = GetMemW(DS0, addr); CLKW(14,14,7,14,10,5,addr); }
-OP( 0xa2, i_mov_dispal ) { UINT32 addr; addr = FETCHWORD(); PutMemB(DS0, addr, Breg(AL)); CLKS(9,9,3); }
-OP( 0xa3, i_mov_dispax ) { UINT32 addr; addr = FETCHWORD(); PutMemW(DS0, addr, Wreg(AW)); CLKW(13,13,5,13,9,3,addr); }
-OP( 0xa4, i_movsb ) { UINT32 tmp = GetMemB(DS0,Wreg(IX)); PutMemB(DS1,Wreg(IY), tmp); Wreg(IY) += -2 * m_DF + 1; Wreg(IX) += -2 * m_DF + 1; CLKS(8,8,6); }
-OP( 0xa5, i_movsw ) { UINT32 tmp = GetMemW(DS0,Wreg(IX)); PutMemW(DS1,Wreg(IY), tmp); Wreg(IY) += -4 * m_DF + 2; Wreg(IX) += -4 * m_DF + 2; CLKS(16,16,10); }
-OP( 0xa6, i_cmpsb ) { UINT32 src = GetMemB(DS1, Wreg(IY)); UINT32 dst = GetMemB(DS0, Wreg(IX)); SUBB; Wreg(IY) += -2 * m_DF + 1; Wreg(IX) += -2 * m_DF + 1; CLKS(14,14,14); }
-OP( 0xa7, i_cmpsw ) { UINT32 src = GetMemW(DS1, Wreg(IY)); UINT32 dst = GetMemW(DS0, Wreg(IX)); SUBW; Wreg(IY) += -4 * m_DF + 2; Wreg(IX) += -4 * m_DF + 2; CLKS(14,14,14); }
+OP( 0xa0, i_mov_aldisp ) { uint32_t addr; addr = FETCHWORD(); Breg(AL) = GetMemB(DS0, addr); CLKS(10,10,5); }
+OP( 0xa1, i_mov_axdisp ) { uint32_t addr; addr = FETCHWORD(); Wreg(AW) = GetMemW(DS0, addr); CLKW(14,14,7,14,10,5,addr); }
+OP( 0xa2, i_mov_dispal ) { uint32_t addr; addr = FETCHWORD(); PutMemB(DS0, addr, Breg(AL)); CLKS(9,9,3); }
+OP( 0xa3, i_mov_dispax ) { uint32_t addr; addr = FETCHWORD(); PutMemW(DS0, addr, Wreg(AW)); CLKW(13,13,5,13,9,3,addr); }
+OP( 0xa4, i_movsb ) { uint32_t tmp = GetMemB(DS0,Wreg(IX)); PutMemB(DS1,Wreg(IY), tmp); Wreg(IY) += -2 * m_DF + 1; Wreg(IX) += -2 * m_DF + 1; CLKS(8,8,6); }
+OP( 0xa5, i_movsw ) { uint32_t tmp = GetMemW(DS0,Wreg(IX)); PutMemW(DS1,Wreg(IY), tmp); Wreg(IY) += -4 * m_DF + 2; Wreg(IX) += -4 * m_DF + 2; CLKS(16,16,10); }
+OP( 0xa6, i_cmpsb ) { uint32_t src = GetMemB(DS1, Wreg(IY)); uint32_t dst = GetMemB(DS0, Wreg(IX)); SUBB; Wreg(IY) += -2 * m_DF + 1; Wreg(IX) += -2 * m_DF + 1; CLKS(14,14,14); }
+OP( 0xa7, i_cmpsw ) { uint32_t src = GetMemW(DS1, Wreg(IY)); uint32_t dst = GetMemW(DS0, Wreg(IX)); SUBW; Wreg(IY) += -4 * m_DF + 2; Wreg(IX) += -4 * m_DF + 2; CLKS(14,14,14); }
OP( 0xa8, i_test_ald8 ) { DEF_ald8; ANDB; CLKS(4,4,2); }
OP( 0xa9, i_test_axd16 ) { DEF_axd16; ANDW; CLKS(4,4,2); }
@@ -379,8 +379,8 @@ OP( 0xaa, i_stosb ) { PutMemB(DS1,Wreg(IY),Breg(AL)); Wreg(IY) += -2 * m_D
OP( 0xab, i_stosw ) { PutMemW(DS1,Wreg(IY),Wreg(AW)); Wreg(IY) += -4 * m_DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
OP( 0xac, i_lodsb ) { Breg(AL) = GetMemB(DS0,Wreg(IX)); Wreg(IX) += -2 * m_DF + 1; CLKS(4,4,3); }
OP( 0xad, i_lodsw ) { Wreg(AW) = GetMemW(DS0,Wreg(IX)); Wreg(IX) += -4 * m_DF + 2; CLKW(8,8,5,8,4,3,Wreg(IX)); }
-OP( 0xae, i_scasb ) { UINT32 src = GetMemB(DS1, Wreg(IY)); UINT32 dst = Breg(AL); SUBB; Wreg(IY) += -2 * m_DF + 1; CLKS(4,4,3); }
-OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(DS1, Wreg(IY)); UINT32 dst = Wreg(AW); SUBW; Wreg(IY) += -4 * m_DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
+OP( 0xae, i_scasb ) { uint32_t src = GetMemB(DS1, Wreg(IY)); uint32_t dst = Breg(AL); SUBB; Wreg(IY) += -2 * m_DF + 1; CLKS(4,4,3); }
+OP( 0xaf, i_scasw ) { uint32_t src = GetMemW(DS1, Wreg(IY)); uint32_t dst = Wreg(AW); SUBW; Wreg(IY) += -4 * m_DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
OP( 0xb0, i_mov_ald8 ) { Breg(AL) = FETCH(); CLKS(4,4,2); }
OP( 0xb1, i_mov_cld8 ) { Breg(CL) = FETCH(); CLKS(4,4,2); }
@@ -401,7 +401,7 @@ OP( 0xbe, i_mov_sid16 ) { Wreg(IX) = FETCHWORD(); CLKS(4,4,2); }
OP( 0xbf, i_mov_did16 ) { Wreg(IY) = FETCHWORD(); CLKS(4,4,2); }
OP( 0xc0, i_rotshft_bd8 ) {
- UINT32 src, dst; UINT8 c;
+ uint32_t src, dst; uint8_t c;
GetModRM; src = (unsigned)GetRMByte(ModRM); dst=src;
c=FETCH();
CLKM(7,7,2,19,19,6);
@@ -418,7 +418,7 @@ OP( 0xc0, i_rotshft_bd8 ) {
}
OP( 0xc1, i_rotshft_wd8 ) {
- UINT32 src, dst; UINT8 c;
+ uint32_t src, dst; uint8_t c;
GetModRM; src = (unsigned)GetRMWord(ModRM); dst=src;
c=FETCH();
CLKM(7,7,2,27,19,6);
@@ -434,7 +434,7 @@ OP( 0xc1, i_rotshft_wd8 ) {
}
}
-OP( 0xc2, i_ret_d16 ) { UINT32 count = FETCH(); count += FETCH() << 8; POP(m_ip); Wreg(SP)+=count; CHANGE_PC; CLKS(24,24,10); }
+OP( 0xc2, i_ret_d16 ) { uint32_t count = FETCH(); count += FETCH() << 8; POP(m_ip); Wreg(SP)+=count; CHANGE_PC; CLKS(24,24,10); }
OP( 0xc3, i_ret ) { POP(m_ip); CHANGE_PC; CLKS(19,19,10); }
OP( 0xc4, i_les_dw ) { GetModRM; WORD tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; Sreg(DS1) = GetnextRMWord; CLKW(26,26,14,26,18,10,m_EA); }
OP( 0xc5, i_lds_dw ) { GetModRM; WORD tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; Sreg(DS0) = GetnextRMWord; CLKW(26,26,14,26,18,10,m_EA); }
@@ -442,8 +442,8 @@ OP( 0xc6, i_mov_bd8 ) { GetModRM; PutImmRMByte(ModRM); m_icount-=(ModRM >=0xc0
OP( 0xc7, i_mov_wd16 ) { GetModRM; PutImmRMWord(ModRM); m_icount-=(ModRM >=0xc0 )?4:15; }
OP( 0xc8, i_enter ) {
- UINT32 nb = FETCH();
- UINT32 i,level;
+ uint32_t nb = FETCH();
+ uint32_t i,level;
m_icount-=23;
nb += FETCH() << 8;
@@ -462,7 +462,7 @@ OP( 0xc9, i_leave ) {
POP(Wreg(BP));
m_icount-=8;
}
-OP( 0xca, i_retf_d16 ) { UINT32 count = FETCH(); count += FETCH() << 8; POP(m_ip); POP(Sreg(PS)); Wreg(SP)+=count; CHANGE_PC; CLKS(32,32,16); }
+OP( 0xca, i_retf_d16 ) { uint32_t count = FETCH(); count += FETCH() << 8; POP(m_ip); POP(Sreg(PS)); Wreg(SP)+=count; CHANGE_PC; CLKS(32,32,16); }
OP( 0xcb, i_retf ) { POP(m_ip); POP(Sreg(PS)); CHANGE_PC; CLKS(29,29,16); }
OP( 0xcc, i_int3 ) { nec_interrupt(3, BRK); CLKS(50,50,24); }
OP( 0xcd, i_int ) { nec_interrupt(FETCH(), BRK); CLKS(50,50,24); }
@@ -470,7 +470,7 @@ OP( 0xce, i_into ) { if (OF) { nec_interrupt(NEC_BRKV_VECTOR, BRK); CLKS(52
OP( 0xcf, i_iret ) { POP(m_ip); POP(Sreg(PS)); i_popf(); CHANGE_PC; CLKS(39,39,19); }
OP( 0xd0, i_rotshft_b ) {
- UINT32 src, dst; GetModRM; src = (UINT32)GetRMByte(ModRM); dst=src;
+ uint32_t src, dst; GetModRM; src = (uint32_t)GetRMByte(ModRM); dst=src;
CLKM(6,6,2,16,16,7);
switch (ModRM & 0x38) {
case 0x00: ROL_BYTE; PutbackRMByte(ModRM,(BYTE)dst); m_OverVal = (src^dst)&0x80; break;
@@ -485,7 +485,7 @@ OP( 0xd0, i_rotshft_b ) {
}
OP( 0xd1, i_rotshft_w ) {
- UINT32 src, dst; GetModRM; src = (UINT32)GetRMWord(ModRM); dst=src;
+ uint32_t src, dst; GetModRM; src = (uint32_t)GetRMWord(ModRM); dst=src;
CLKM(6,6,2,24,16,7);
switch (ModRM & 0x38) {
case 0x00: ROL_WORD; PutbackRMWord(ModRM,(WORD)dst); m_OverVal = (src^dst)&0x8000; break;
@@ -500,7 +500,7 @@ OP( 0xd1, i_rotshft_w ) {
}
OP( 0xd2, i_rotshft_bcl ) {
- UINT32 src, dst; UINT8 c; GetModRM; src = (UINT32)GetRMByte(ModRM); dst=src;
+ uint32_t src, dst; uint8_t c; GetModRM; src = (uint32_t)GetRMByte(ModRM); dst=src;
c=Breg(CL);
CLKM(7,7,2,19,19,6);
if (c) switch (ModRM & 0x38) {
@@ -516,7 +516,7 @@ OP( 0xd2, i_rotshft_bcl ) {
}
OP( 0xd3, i_rotshft_wcl ) {
- UINT32 src, dst; UINT8 c; GetModRM; src = (UINT32)GetRMWord(ModRM); dst=src;
+ uint32_t src, dst; uint8_t c; GetModRM; src = (uint32_t)GetRMWord(ModRM); dst=src;
c=Breg(CL);
CLKM(7,7,2,27,19,6);
if (c) switch (ModRM & 0x38) {
@@ -534,29 +534,29 @@ OP( 0xd3, i_rotshft_wcl ) {
OP( 0xd4, i_aam ) { FETCH(); Breg(AH) = Breg(AL) / 10; Breg(AL) %= 10; SetSZPF_Word(Wreg(AW)); CLKS(15,15,12); }
OP( 0xd5, i_aad ) { FETCH(); Breg(AL) = Breg(AH) * 10 + Breg(AL); Breg(AH) = 0; SetSZPF_Byte(Breg(AL)); CLKS(7,7,8); }
OP( 0xd6, i_setalc ) { Breg(AL) = (CF)?0xff:0x00; m_icount-=3; logerror("%06x: Undefined opcode (SETALC)\n",PC()); }
-OP( 0xd7, i_trans ) { UINT32 dest = (Wreg(BW)+Breg(AL))&0xffff; Breg(AL) = GetMemB(DS0, dest); CLKS(9,9,5); }
+OP( 0xd7, i_trans ) { uint32_t dest = (Wreg(BW)+Breg(AL))&0xffff; Breg(AL) = GetMemB(DS0, dest); CLKS(9,9,5); }
OP( 0xd8, i_fpo ) { GetModRM; GetRMByte(ModRM); m_icount-=2; logerror("%06x: Unimplemented floating point control %04x\n",PC(),ModRM); }
-OP( 0xe0, i_loopne ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if (!ZF && Wreg(CW)) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(14,14,6); } else CLKS(5,5,3); }
-OP( 0xe1, i_loope ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if ( ZF && Wreg(CW)) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(14,14,6); } else CLKS(5,5,3); }
-OP( 0xe2, i_loop ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if (Wreg(CW)) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(13,13,6); } else CLKS(5,5,3); }
-OP( 0xe3, i_jcxz ) { INT8 disp = (INT8)FETCH(); if (Wreg(CW) == 0) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(13,13,6); } else CLKS(5,5,3); }
-OP( 0xe4, i_inal ) { UINT8 port = FETCH(); Breg(AL) = read_port_byte(port); CLKS(9,9,5); }
-OP( 0xe5, i_inax ) { UINT8 port = FETCH(); Wreg(AW) = read_port_word(port); CLKW(13,13,7,13,9,5,port); }
-OP( 0xe6, i_outal ) { UINT8 port = FETCH(); write_port_byte(port, Breg(AL)); CLKS(8,8,3); }
-OP( 0xe7, i_outax ) { UINT8 port = FETCH(); write_port_word(port, Wreg(AW)); CLKW(12,12,5,12,8,3,port); }
-
-OP( 0xe8, i_call_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(m_ip); m_ip = (WORD)(m_ip+(INT16)tmp); CHANGE_PC; m_icount-=24; }
-OP( 0xe9, i_jmp_d16 ) { UINT32 tmp; tmp = FETCHWORD(); m_ip = (WORD)(m_ip+(INT16)tmp); CHANGE_PC; m_icount-=15; }
-OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; tmp = FETCHWORD(); tmp1 = FETCHWORD(); Sreg(PS) = (WORD)tmp1; m_ip = (WORD)tmp; CHANGE_PC; m_icount-=27; }
-OP( 0xeb, i_jmp_d8 ) { int tmp = (int)((INT8)FETCH()); m_icount-=12; m_ip = (WORD)(m_ip+tmp); }
+OP( 0xe0, i_loopne ) { int8_t disp = (int8_t)FETCH(); Wreg(CW)--; if (!ZF && Wreg(CW)) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(14,14,6); } else CLKS(5,5,3); }
+OP( 0xe1, i_loope ) { int8_t disp = (int8_t)FETCH(); Wreg(CW)--; if ( ZF && Wreg(CW)) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(14,14,6); } else CLKS(5,5,3); }
+OP( 0xe2, i_loop ) { int8_t disp = (int8_t)FETCH(); Wreg(CW)--; if (Wreg(CW)) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(13,13,6); } else CLKS(5,5,3); }
+OP( 0xe3, i_jcxz ) { int8_t disp = (int8_t)FETCH(); if (Wreg(CW) == 0) { m_ip = (WORD)(m_ip+disp); /*CHANGE_PC;*/ CLKS(13,13,6); } else CLKS(5,5,3); }
+OP( 0xe4, i_inal ) { uint8_t port = FETCH(); Breg(AL) = read_port_byte(port); CLKS(9,9,5); }
+OP( 0xe5, i_inax ) { uint8_t port = FETCH(); Wreg(AW) = read_port_word(port); CLKW(13,13,7,13,9,5,port); }
+OP( 0xe6, i_outal ) { uint8_t port = FETCH(); write_port_byte(port, Breg(AL)); CLKS(8,8,3); }
+OP( 0xe7, i_outax ) { uint8_t port = FETCH(); write_port_word(port, Wreg(AW)); CLKW(12,12,5,12,8,3,port); }
+
+OP( 0xe8, i_call_d16 ) { uint32_t tmp; tmp = FETCHWORD(); PUSH(m_ip); m_ip = (WORD)(m_ip+(int16_t)tmp); CHANGE_PC; m_icount-=24; }
+OP( 0xe9, i_jmp_d16 ) { uint32_t tmp; tmp = FETCHWORD(); m_ip = (WORD)(m_ip+(int16_t)tmp); CHANGE_PC; m_icount-=15; }
+OP( 0xea, i_jmp_far ) { uint32_t tmp,tmp1; tmp = FETCHWORD(); tmp1 = FETCHWORD(); Sreg(PS) = (WORD)tmp1; m_ip = (WORD)tmp; CHANGE_PC; m_icount-=27; }
+OP( 0xeb, i_jmp_d8 ) { int tmp = (int)((int8_t)FETCH()); m_icount-=12; m_ip = (WORD)(m_ip+tmp); }
OP( 0xec, i_inaldx ) { Breg(AL) = read_port_byte(Wreg(DW)); CLKS(8,8,5);}
OP( 0xed, i_inaxdx ) { Wreg(AW) = read_port_word(Wreg(DW)); CLKW(12,12,7,12,8,5,Wreg(DW)); }
OP( 0xee, i_outdxal ) { write_port_byte(Wreg(DW), Breg(AL)); CLKS(8,8,3); }
OP( 0xef, i_outdxax ) { write_port_word(Wreg(DW), Wreg(AW)); CLKW(12,12,5,12,8,3,Wreg(DW)); }
OP( 0xf0, i_lock ) { logerror("%06x: Warning - BUSLOCK\n",PC()); m_no_interrupt=1; CLK(2); }
-OP( 0xf2, i_repne ) { UINT32 next = fetchop(); UINT16 c = Wreg(CW);
+OP( 0xf2, i_repne ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
switch(next) { /* Segments */
case 0x26: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
case 0x2e: m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
@@ -583,7 +583,7 @@ OP( 0xf2, i_repne ) { UINT32 next = fetchop(); UINT16 c = Wreg(CW);
}
m_seg_prefix=FALSE;
}
-OP( 0xf3, i_repe ) { UINT32 next = fetchop(); UINT16 c = Wreg(CW);
+OP( 0xf3, i_repe ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
switch(next) { /* Segments */
case 0x26: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
case 0x2e: m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
@@ -612,7 +612,7 @@ OP( 0xf3, i_repe ) { UINT32 next = fetchop(); UINT16 c = Wreg(CW);
}
OP( 0xf4, i_hlt ) { logerror("%06x: HALT\n",PC()); m_halted=1; m_icount=0; }
OP( 0xf5, i_cmc ) { m_CarryVal = !CF; CLK(2); }
-OP( 0xf6, i_f6pre ) { UINT32 tmp; UINT32 uresult,uresult2; INT32 result,result2;
+OP( 0xf6, i_f6pre ) { uint32_t tmp; uint32_t uresult,uresult2; int32_t result,result2;
GetModRM; tmp = GetRMByte(ModRM);
switch (ModRM & 0x38) {
case 0x00: tmp &= FETCH(); m_CarryVal = m_OverVal = 0; SetSZPF_Byte(tmp); m_icount-=(ModRM >=0xc0 )?4:11; break; /* TEST */
@@ -620,21 +620,21 @@ OP( 0xf6, i_f6pre ) { UINT32 tmp; UINT32 uresult,uresult2; INT32 result,result2;
case 0x10: PutbackRMByte(ModRM,~tmp); m_icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */
case 0x18: m_CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Byte(tmp); PutbackRMByte(ModRM,tmp&0xff); m_icount-=(ModRM >=0xc0 )?2:16; break; /* NEG */
case 0x20: uresult = Breg(AL)*tmp; Wreg(AW)=(WORD)uresult; m_CarryVal=m_OverVal=(Breg(AH)!=0); m_icount-=(ModRM >=0xc0 )?30:36; break; /* MULU */
- case 0x28: result = (INT16)((INT8)Breg(AL))*(INT16)((INT8)tmp); Wreg(AW)=(WORD)result; m_CarryVal=m_OverVal=(Breg(AH)!=0); m_icount-=(ModRM >=0xc0 )?30:36; break; /* MUL */
+ case 0x28: result = (int16_t)((int8_t)Breg(AL))*(int16_t)((int8_t)tmp); Wreg(AW)=(WORD)result; m_CarryVal=m_OverVal=(Breg(AH)!=0); m_icount-=(ModRM >=0xc0 )?30:36; break; /* MUL */
case 0x30: if (tmp) { DIVUB; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); m_icount-=(ModRM >=0xc0 )?43:53; break;
case 0x38: if (tmp) { DIVB; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); m_icount-=(ModRM >=0xc0 )?43:53; break;
}
}
-OP( 0xf7, i_f7pre ) { UINT32 tmp,tmp2; UINT32 uresult,uresult2; INT32 result,result2;
+OP( 0xf7, i_f7pre ) { uint32_t tmp,tmp2; uint32_t uresult,uresult2; int32_t result,result2;
GetModRM; tmp = GetRMWord(ModRM);
switch (ModRM & 0x38) {
case 0x00: tmp2 = FETCHWORD(); tmp &= tmp2; m_CarryVal = m_OverVal = 0; SetSZPF_Word(tmp); m_icount-=(ModRM >=0xc0 )?4:11; break; /* TEST */
case 0x08: logerror("%06x: Undefined opcode 0xf7 0x08\n",PC()); break;
case 0x10: PutbackRMWord(ModRM,~tmp); m_icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */
case 0x18: m_CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Word(tmp); PutbackRMWord(ModRM,tmp&0xffff); m_icount-=(ModRM >=0xc0 )?2:16; break; /* NEG */
- case 0x20: uresult = Wreg(AW)*tmp; Wreg(AW)=uresult&0xffff; Wreg(DW)=((UINT32)uresult)>>16; m_CarryVal=m_OverVal=(Wreg(DW)!=0); m_icount-=(ModRM >=0xc0 )?30:36; break; /* MULU */
- case 0x28: result = (INT32)((INT16)Wreg(AW))*(INT32)((INT16)tmp); Wreg(AW)=result&0xffff; Wreg(DW)=result>>16; m_CarryVal=m_OverVal=(Wreg(DW)!=0); m_icount-=(ModRM >=0xc0 )?30:36; break; /* MUL */
+ case 0x20: uresult = Wreg(AW)*tmp; Wreg(AW)=uresult&0xffff; Wreg(DW)=((uint32_t)uresult)>>16; m_CarryVal=m_OverVal=(Wreg(DW)!=0); m_icount-=(ModRM >=0xc0 )?30:36; break; /* MULU */
+ case 0x28: result = (int32_t)((int16_t)Wreg(AW))*(int32_t)((int16_t)tmp); Wreg(AW)=result&0xffff; Wreg(DW)=result>>16; m_CarryVal=m_OverVal=(Wreg(DW)!=0); m_icount-=(ModRM >=0xc0 )?30:36; break; /* MUL */
case 0x30: if (tmp) { DIVUW; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); m_icount-=(ModRM >=0xc0 )?43:53; break;
case 0x38: if (tmp) { DIVW; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); m_icount-=(ModRM >=0xc0 )?43:53; break;
}
@@ -646,14 +646,14 @@ OP( 0xfa, i_di ) { SetIF(0); CLK(2); }
OP( 0xfb, i_ei ) { SetIF(1); CLK(2); }
OP( 0xfc, i_cld ) { SetDF(0); CLK(2); }
OP( 0xfd, i_std ) { SetDF(1); CLK(2); }
-OP( 0xfe, i_fepre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMByte(ModRM);
+OP( 0xfe, i_fepre ) { uint32_t tmp, tmp1; GetModRM; tmp=GetRMByte(ModRM);
switch(ModRM & 0x38) {
case 0x00: tmp1 = tmp+1; m_OverVal = (tmp==0x7f); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(2,2,2,16,16,7); break; /* INC */
case 0x08: tmp1 = tmp-1; m_OverVal = (tmp==0x80); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(2,2,2,16,16,7); break; /* DEC */
default: logerror("%06x: FE Pre with unimplemented mod\n",PC());
}
}
-OP( 0xff, i_ffpre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMWord(ModRM);
+OP( 0xff, i_ffpre ) { uint32_t tmp, tmp1; GetModRM; tmp=GetRMWord(ModRM);
switch(ModRM & 0x38) {
case 0x00: tmp1 = tmp+1; m_OverVal = (tmp==0x7fff); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(2,2,2,24,16,7); break; /* INC */
case 0x08: tmp1 = tmp-1; m_OverVal = (tmp==0x8000); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(2,2,2,24,16,7); break; /* DEC */
diff --git a/src/devices/cpu/nec/necmacro.h b/src/devices/cpu/nec/necmacro.h
index a6091f34eba..c97f487cc2c 100644
--- a/src/devices/cpu/nec/necmacro.h
+++ b/src/devices/cpu/nec/necmacro.h
@@ -14,19 +14,19 @@
#define SetZF(x) (m_ZeroVal = (x))
#define SetPF(x) (m_ParityVal = (x))
-#define SetSZPF_Byte(x) (m_SignVal=m_ZeroVal=m_ParityVal=(INT8)(x))
-#define SetSZPF_Word(x) (m_SignVal=m_ZeroVal=m_ParityVal=(INT16)(x))
+#define SetSZPF_Byte(x) (m_SignVal=m_ZeroVal=m_ParityVal=(int8_t)(x))
+#define SetSZPF_Word(x) (m_SignVal=m_ZeroVal=m_ParityVal=(int16_t)(x))
#define SetOFW_Add(x,y,z) (m_OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
#define SetOFB_Add(x,y,z) (m_OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
#define SetOFW_Sub(x,y,z) (m_OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
#define SetOFB_Sub(x,y,z) (m_OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
-#define ADDB { UINT32 res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
-#define ADDW { UINT32 res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
+#define ADDB { uint32_t res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
+#define ADDW { uint32_t res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
-#define SUBB { UINT32 res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
-#define SUBW { UINT32 res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
+#define SUBB { uint32_t res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
+#define SUBW { uint32_t res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
#define ORB dst|=src; m_CarryVal=m_OverVal=m_AuxVal=0; SetSZPF_Byte(dst)
#define ORW dst|=src; m_CarryVal=m_OverVal=m_AuxVal=0; SetSZPF_Word(dst)
@@ -56,10 +56,10 @@
#define JMP(flag) \
int tmp; \
EMPTY_PREFETCH(); \
- tmp = (int)((INT8)FETCH()); \
+ tmp = (int)((int8_t)FETCH()); \
if (flag) \
{ \
- static const UINT8 table[3]={3,10,10}; \
+ static const uint8_t table[3]={3,10,10}; \
m_ip = (WORD)(m_ip+tmp); \
m_icount-=table[m_chip_type/8]; \
CHANGE_PC; \
@@ -69,7 +69,7 @@
#define ADJ4(param1,param2) \
if (AF || ((Breg(AL) & 0xf) > 9)) \
{ \
- UINT16 tmp; \
+ uint16_t tmp; \
tmp = Breg(AL) + param1; \
Breg(AL) = tmp; \
m_AuxVal = 1; \
@@ -141,8 +141,8 @@
#define SHL_WORD(c) m_icount-=c; dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
#define SHR_BYTE(c) m_icount-=c; dst >>= c-1; m_CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
#define SHR_WORD(c) m_icount-=c; dst >>= c-1; m_CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
-#define SHRA_BYTE(c) m_icount-=c; dst = ((INT8)dst) >> (c-1); m_CarryVal = dst & 0x1; dst = ((INT8)((BYTE)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
-#define SHRA_WORD(c) m_icount-=c; dst = ((INT16)dst) >> (c-1); m_CarryVal = dst & 0x1; dst = ((INT16)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
+#define SHRA_BYTE(c) m_icount-=c; dst = ((int8_t)dst) >> (c-1); m_CarryVal = dst & 0x1; dst = ((int8_t)((BYTE)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
+#define SHRA_WORD(c) m_icount-=c; dst = ((int16_t)dst) >> (c-1); m_CarryVal = dst & 0x1; dst = ((int16_t)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
#define DIVUB \
uresult = Wreg(AW); \
@@ -155,9 +155,9 @@
}
#define DIVB \
- result = (INT16)Wreg(AW); \
- result2 = result % (INT16)((INT8)tmp); \
- if ((result /= (INT16)((INT8)tmp)) > 0xff) { \
+ result = (int16_t)Wreg(AW); \
+ result2 = result % (int16_t)((int8_t)tmp); \
+ if ((result /= (int16_t)((int8_t)tmp)) > 0xff) { \
nec_interrupt(NEC_DIVIDE_VECTOR, BRK); break; \
} else { \
Breg(AL) = result; \
@@ -165,7 +165,7 @@
}
#define DIVUW \
- uresult = (((UINT32)Wreg(DW)) << 16) | Wreg(AW);\
+ uresult = (((uint32_t)Wreg(DW)) << 16) | Wreg(AW);\
uresult2 = uresult % tmp; \
if ((uresult /= tmp) > 0xffff) { \
nec_interrupt(NEC_DIVIDE_VECTOR, BRK); break; \
@@ -175,9 +175,9 @@
}
#define DIVW \
- result = ((UINT32)Wreg(DW) << 16) + Wreg(AW); \
- result2 = result % (INT32)((INT16)tmp); \
- if ((result /= (INT32)((INT16)tmp)) > 0xffff) { \
+ result = ((uint32_t)Wreg(DW) << 16) + Wreg(AW); \
+ result2 = result % (int32_t)((int16_t)tmp); \
+ if ((result /= (int32_t)((int16_t)tmp)) > 0xffff) { \
nec_interrupt(NEC_DIVIDE_VECTOR, BRK); break; \
} else { \
Wreg(AW)=result; \
@@ -189,7 +189,7 @@
int count = (Breg(CL)+1)/2; \
unsigned di = Wreg(IY); \
unsigned si = Wreg(IX); \
- static const UINT8 table[3]={18,19,19}; \
+ static const uint8_t table[3]={18,19,19}; \
if (m_seg_prefix) logerror("%06x: Warning: seg_prefix defined for add4s\n",PC()); \
m_ZeroVal = m_CarryVal = 0; \
for (i=0;i<count;i++) { \
@@ -214,7 +214,7 @@
int i,v1,v2,result; \
unsigned di = Wreg(IY); \
unsigned si = Wreg(IX); \
- static const UINT8 table[3]={18,19,19}; \
+ static const uint8_t table[3]={18,19,19}; \
if (m_seg_prefix) logerror("%06x: Warning: seg_prefix defined for sub4s\n",PC()); \
m_ZeroVal = m_CarryVal = 0; \
for (i=0;i<count;i++) { \
@@ -244,7 +244,7 @@
int i,v1,v2,result; \
unsigned di = Wreg(IY); \
unsigned si = Wreg(IX); \
- static const UINT8 table[3]={14,19,19}; \
+ static const uint8_t table[3]={14,19,19}; \
if (m_seg_prefix) logerror("%06x: Warning: seg_prefix defined for cmp4s\n",PC()); \
m_ZeroVal = m_CarryVal = 0; \
for (i=0;i<count;i++) { \
diff --git a/src/devices/cpu/nec/necmodrm.h b/src/devices/cpu/nec/necmodrm.h
index 8afc0240a78..2bc3afdfd28 100644
--- a/src/devices/cpu/nec/necmodrm.h
+++ b/src/devices/cpu/nec/necmodrm.h
@@ -77,30 +77,30 @@ static struct {
}
#define DEF_br8 \
- UINT32 ModRM = FETCH(),src,dst; \
+ uint32_t ModRM = FETCH(),src,dst; \
src = RegByte(ModRM); \
dst = GetRMByte(ModRM)
#define DEF_wr16 \
- UINT32 ModRM = FETCH(),src,dst; \
+ uint32_t ModRM = FETCH(),src,dst; \
src = RegWord(ModRM); \
dst = GetRMWord(ModRM)
#define DEF_r8b \
- UINT32 ModRM = FETCH(),src,dst; \
+ uint32_t ModRM = FETCH(),src,dst; \
dst = RegByte(ModRM); \
src = GetRMByte(ModRM)
#define DEF_r16w \
- UINT32 ModRM = FETCH(),src,dst; \
+ uint32_t ModRM = FETCH(),src,dst; \
dst = RegWord(ModRM); \
src = GetRMWord(ModRM)
#define DEF_ald8 \
- UINT32 src = FETCH(); \
- UINT32 dst = Breg(AL)
+ uint32_t src = FETCH(); \
+ uint32_t dst = Breg(AL)
#define DEF_axd16 \
- UINT32 src = FETCH(); \
- UINT32 dst = Wreg(AW); \
+ uint32_t src = FETCH(); \
+ uint32_t dst = Wreg(AW); \
src += (FETCH() << 8)
diff --git a/src/devices/cpu/nec/necpriv.h b/src/devices/cpu/nec/necpriv.h
index bee9426cf8d..96998bd0f4e 100644
--- a/src/devices/cpu/nec/necpriv.h
+++ b/src/devices/cpu/nec/necpriv.h
@@ -91,7 +91,7 @@ enum BREGS {
#define PUSH(val) { Wreg(SP) -= 2; write_mem_word(((Sreg(SS)<<4)+Wreg(SP)), val); }
#define POP(var) { Wreg(SP) += 2; var = read_mem_word(((Sreg(SS)<<4) + ((Wreg(SP)-2) & 0xffff))); }
-#define GetModRM UINT32 ModRM=FETCH()
+#define GetModRM uint32_t ModRM=FETCH()
/* Cycle count macros:
CLK - cycle count is the same on all processors
@@ -106,10 +106,10 @@ enum BREGS {
*/
#define CLK(all) m_icount-=all
-#define CLKS(v20,v30,v33) { const UINT32 ccount=(v20<<16)|(v30<<8)|v33; m_icount-=(ccount>>m_chip_type)&0x7f; }
-#define CLKW(v20o,v30o,v33o,v20e,v30e,v33e,addr) { const UINT32 ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; m_icount-=(addr&1)?((ocount>>m_chip_type)&0x7f):((ecount>>m_chip_type)&0x7f); }
-#define CLKM(v20,v30,v33,v20m,v30m,v33m) { const UINT32 ccount=(v20<<16)|(v30<<8)|v33, mcount=(v20m<<16)|(v30m<<8)|v33m; m_icount-=( ModRM >=0xc0 )?((ccount>>m_chip_type)&0x7f):((mcount>>m_chip_type)&0x7f); }
-#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall,addr) { const UINT32 ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; if (ModRM >=0xc0) m_icount-=vall; else m_icount-=(addr&1)?((ocount>>m_chip_type)&0x7f):((ecount>>m_chip_type)&0x7f); }
+#define CLKS(v20,v30,v33) { const uint32_t ccount=(v20<<16)|(v30<<8)|v33; m_icount-=(ccount>>m_chip_type)&0x7f; }
+#define CLKW(v20o,v30o,v33o,v20e,v30e,v33e,addr) { const uint32_t ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; m_icount-=(addr&1)?((ocount>>m_chip_type)&0x7f):((ecount>>m_chip_type)&0x7f); }
+#define CLKM(v20,v30,v33,v20m,v30m,v33m) { const uint32_t ccount=(v20<<16)|(v30<<8)|v33, mcount=(v20m<<16)|(v30m<<8)|v33m; m_icount-=( ModRM >=0xc0 )?((ccount>>m_chip_type)&0x7f):((mcount>>m_chip_type)&0x7f); }
+#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall,addr) { const uint32_t ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; if (ModRM >=0xc0) m_icount-=vall; else m_icount-=(addr&1)?((ocount>>m_chip_type)&0x7f):((ecount>>m_chip_type)&0x7f); }
/************************************************************************/
#define CompressFlags() (WORD)(int(CF) | 0x02 | (int(PF) << 2) | (int(AF) << 4) | (int(ZF) << 6) \
diff --git a/src/devices/cpu/nec/v25.cpp b/src/devices/cpu/nec/v25.cpp
index f67897dd3d2..6c19555718c 100644
--- a/src/devices/cpu/nec/v25.cpp
+++ b/src/devices/cpu/nec/v25.cpp
@@ -37,10 +37,10 @@
#include "emu.h"
#include "debugger.h"
-typedef UINT8 BOOLEAN;
-typedef UINT8 BYTE;
-typedef UINT16 WORD;
-typedef UINT32 DWORD;
+typedef uint8_t BOOLEAN;
+typedef uint8_t BYTE;
+typedef uint16_t WORD;
+typedef uint32_t DWORD;
#include "v25.h"
#include "v25priv.h"
@@ -49,7 +49,7 @@ const device_type V25 = &device_creator<v25_device>;
const device_type V35 = &device_creator<v35_device>;
-v25_common_device::v25_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, bool is_16bit, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type)
+v25_common_device::v25_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, bool is_16bit, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, is_16bit ? 16 : 8, 20, 0)
, m_io_config("io", ENDIANNESS_LITTLE, is_16bit ? 16 : 8, 16, 0)
@@ -70,13 +70,13 @@ v25_common_device::v25_common_device(const machine_config &mconfig, device_type
}
-v25_device::v25_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v25_device::v25_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: v25_common_device(mconfig, V25, "V25", tag, owner, clock, "v25", false, 0, 4, 4, V20_TYPE)
{
}
-v35_device::v35_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v35_device::v35_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: v25_common_device(mconfig, V35, "V35", tag, owner, clock, "v35", true, BYTE_XOR_LE(0), 6, 2, V30_TYPE)
{
}
@@ -126,15 +126,15 @@ void v25_common_device::do_prefetch(int previous_ICount)
}
-UINT8 v25_common_device::fetch()
+uint8_t v25_common_device::fetch()
{
prefetch();
return m_direct->read_byte((Sreg(PS)<<4)+m_ip++, m_fetch_xor);
}
-UINT16 v25_common_device::fetchword()
+uint16_t v25_common_device::fetchword()
{
- UINT16 r = FETCH();
+ uint16_t r = FETCH();
r |= (FETCH()<<8);
return r;
}
@@ -146,11 +146,11 @@ UINT16 v25_common_device::fetchword()
#include "necea.h"
#include "necmodrm.h"
-static UINT8 parity_table[256];
+static uint8_t parity_table[256];
-UINT8 v25_common_device::fetchop()
+uint8_t v25_common_device::fetchop()
{
- UINT8 ret;
+ uint8_t ret;
prefetch();
ret = m_direct->read_byte(( Sreg(PS)<<4)+m_ip++, m_fetch_xor);
@@ -230,7 +230,7 @@ void v25_common_device::device_reset()
void v25_common_device::nec_interrupt(unsigned int_num, int /*INTSOURCES*/ source)
{
- UINT32 dest_seg, dest_off;
+ uint32_t dest_seg, dest_off;
i_pushf();
m_TF = m_IF = 0;
@@ -358,7 +358,7 @@ void v25_common_device::external_int()
{
/* the actual vector is retrieved after pushing flags */
/* and clearing the IF */
- nec_interrupt((UINT32)-1, INT_IRQ);
+ nec_interrupt((uint32_t)-1, INT_IRQ);
m_irq_state = CLEAR_LINE;
m_pending_irq &= ~INT_IRQ;
}
@@ -411,9 +411,9 @@ void v25_common_device::execute_set_input(int irqline, int state)
}
}
-offs_t v25_common_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t v25_common_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
- extern int necv_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom, const UINT8 *decryption_table);
+ extern int necv_dasm_one(char *buffer, uint32_t eip, const uint8_t *oprom, const uint8_t *decryption_table);
return necv_dasm_one(buffer, pc, oprom, m_v25v35_decryptiontable);
}
@@ -544,7 +544,7 @@ void v25_common_device::device_start()
void v25_common_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
- UINT16 flags = CompressFlags();
+ uint16_t flags = CompressFlags();
switch (entry.index())
{
diff --git a/src/devices/cpu/nec/v25.h b/src/devices/cpu/nec/v25.h
index f170ad03b8f..28815e16609 100644
--- a/src/devices/cpu/nec/v25.h
+++ b/src/devices/cpu/nec/v25.h
@@ -49,10 +49,10 @@ class v25_common_device : public cpu_device
{
public:
// construction/destruction
- v25_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, bool is_16bit, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type);
+ v25_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, bool is_16bit, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type);
// static configuration helpers
- static void set_decryption_table(device_t &device, const UINT8 *decryption_table) { downcast<v25_common_device &>(device).m_v25v35_decryptiontable = decryption_table; }
+ static void set_decryption_table(device_t &device, const uint8_t *decryption_table) { downcast<v25_common_device &>(device).m_v25v35_decryptiontable = decryption_table; }
template<class _Object> static devcb_base & set_pt_in_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_pt_in.set_callback(object); }
template<class _Object> static devcb_base & set_p0_in_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_p0_in.set_callback(object); }
@@ -72,12 +72,12 @@ protected:
virtual void device_post_load() override { notify_clock_changed(); }
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return clocks / m_PCK; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return cycles * m_PCK; }
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 80; }
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xff; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return clocks / m_PCK; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return cycles * m_PCK; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 80; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -90,9 +90,9 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -101,43 +101,43 @@ private:
/* internal RAM and register banks */
union internalram
{
- UINT16 w[128];
- UINT8 b[256];
+ uint16_t w[128];
+ uint8_t b[256];
};
internalram m_ram;
offs_t m_fetch_xor;
- UINT16 m_ip;
+ uint16_t m_ip;
/* PSW flags */
- INT32 m_SignVal;
- UINT32 m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
- UINT8 m_IBRK, m_F0, m_F1, m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */
- UINT8 m_RBW, m_RBB; /* current register bank base, preshifted for word and byte registers */
+ int32_t m_SignVal;
+ uint32_t m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
+ uint8_t m_IBRK, m_F0, m_F1, m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */
+ uint8_t m_RBW, m_RBB; /* current register bank base, preshifted for word and byte registers */
/* interrupt related */
- UINT32 m_pending_irq;
- UINT32 m_unmasked_irq;
- UINT32 m_bankswitch_irq;
- UINT8 m_priority_inttu, m_priority_intd, m_priority_intp, m_priority_ints0, m_priority_ints1;
- UINT8 m_IRQS, m_ISPR;
- UINT32 m_nmi_state;
- UINT32 m_irq_state;
- UINT32 m_poll_state;
- UINT32 m_mode_state;
- UINT32 m_intp_state[3];
- UINT8 m_no_interrupt;
- UINT8 m_halted;
+ uint32_t m_pending_irq;
+ uint32_t m_unmasked_irq;
+ uint32_t m_bankswitch_irq;
+ uint8_t m_priority_inttu, m_priority_intd, m_priority_intp, m_priority_ints0, m_priority_ints1;
+ uint8_t m_IRQS, m_ISPR;
+ uint32_t m_nmi_state;
+ uint32_t m_irq_state;
+ uint32_t m_poll_state;
+ uint32_t m_mode_state;
+ uint32_t m_intp_state[3];
+ uint8_t m_no_interrupt;
+ uint8_t m_halted;
/* timer related */
- UINT16 m_TM0, m_MD0, m_TM1, m_MD1;
- UINT8 m_TMC0, m_TMC1;
+ uint16_t m_TM0, m_MD0, m_TM1, m_MD1;
+ uint8_t m_TMC0, m_TMC1;
emu_timer *m_timers[4];
/* system control */
- UINT8 m_RAMEN, m_TB, m_PCK; /* PRC register */
- UINT32 m_IDB;
+ uint8_t m_RAMEN, m_TB, m_PCK; /* PRC register */
+ uint32_t m_IDB;
address_space *m_program;
direct_read_data *m_direct;
@@ -154,47 +154,47 @@ union internalram
devcb_write8 m_p1_out;
devcb_write8 m_p2_out;
- UINT8 m_prefetch_size;
- UINT8 m_prefetch_cycles;
- INT8 m_prefetch_count;
- UINT8 m_prefetch_reset;
- UINT32 m_chip_type;
+ uint8_t m_prefetch_size;
+ uint8_t m_prefetch_cycles;
+ int8_t m_prefetch_count;
+ uint8_t m_prefetch_reset;
+ uint32_t m_chip_type;
- UINT32 m_prefix_base; /* base address of the latest prefix segment */
- UINT8 m_seg_prefix; /* prefix segment indicator */
+ uint32_t m_prefix_base; /* base address of the latest prefix segment */
+ uint8_t m_seg_prefix; /* prefix segment indicator */
- UINT32 m_EA;
- UINT16 m_EO;
- UINT16 m_E16;
+ uint32_t m_EA;
+ uint16_t m_EO;
+ uint16_t m_E16;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
- const UINT8 *m_v25v35_decryptiontable; // internal decryption table
+ const uint8_t *m_v25v35_decryptiontable; // internal decryption table
typedef void (v25_common_device::*nec_ophandler)();
- typedef UINT32 (v25_common_device::*nec_eahandler)();
+ typedef uint32_t (v25_common_device::*nec_eahandler)();
static const nec_ophandler s_nec_instruction[256];
static const nec_eahandler s_GetEA[192];
inline void prefetch();
void do_prefetch(int previous_ICount);
- inline UINT8 fetch();
- inline UINT16 fetchword();
- inline UINT8 fetchop();
+ inline uint8_t fetch();
+ inline uint16_t fetchword();
+ inline uint8_t fetchop();
void nec_interrupt(unsigned int_num, int /*INTSOURCES*/ source);
void nec_bankswitch(unsigned bank_num);
void nec_trap();
void external_int();
- UINT8 read_irqcontrol(int /*INTSOURCES*/ source, UINT8 priority);
- UINT8 read_sfr(unsigned o);
- UINT16 read_sfr_word(unsigned o);
- void write_irqcontrol(int /*INTSOURCES*/ source, UINT8 d);
- void write_sfr(unsigned o, UINT8 d);
- void write_sfr_word(unsigned o, UINT16 d);
- UINT8 v25_read_byte(unsigned a);
- UINT16 v25_read_word(unsigned a);
- void v25_write_byte(unsigned a, UINT8 d);
- void v25_write_word(unsigned a, UINT16 d);
+ uint8_t read_irqcontrol(int /*INTSOURCES*/ source, uint8_t priority);
+ uint8_t read_sfr(unsigned o);
+ uint16_t read_sfr_word(unsigned o);
+ void write_irqcontrol(int /*INTSOURCES*/ source, uint8_t d);
+ void write_sfr(unsigned o, uint8_t d);
+ void write_sfr_word(unsigned o, uint16_t d);
+ uint8_t v25_read_byte(unsigned a);
+ uint16_t v25_read_word(unsigned a);
+ void v25_write_byte(unsigned a, uint8_t d);
+ void v25_write_word(unsigned a, uint16_t d);
void i_add_br8();
void i_add_wr16();
@@ -446,44 +446,44 @@ union internalram
void i_brkn();
void i_brks();
- UINT32 EA_000();
- UINT32 EA_001();
- UINT32 EA_002();
- UINT32 EA_003();
- UINT32 EA_004();
- UINT32 EA_005();
- UINT32 EA_006();
- UINT32 EA_007();
- UINT32 EA_100();
- UINT32 EA_101();
- UINT32 EA_102();
- UINT32 EA_103();
- UINT32 EA_104();
- UINT32 EA_105();
- UINT32 EA_106();
- UINT32 EA_107();
- UINT32 EA_200();
- UINT32 EA_201();
- UINT32 EA_202();
- UINT32 EA_203();
- UINT32 EA_204();
- UINT32 EA_205();
- UINT32 EA_206();
- UINT32 EA_207();
+ uint32_t EA_000();
+ uint32_t EA_001();
+ uint32_t EA_002();
+ uint32_t EA_003();
+ uint32_t EA_004();
+ uint32_t EA_005();
+ uint32_t EA_006();
+ uint32_t EA_007();
+ uint32_t EA_100();
+ uint32_t EA_101();
+ uint32_t EA_102();
+ uint32_t EA_103();
+ uint32_t EA_104();
+ uint32_t EA_105();
+ uint32_t EA_106();
+ uint32_t EA_107();
+ uint32_t EA_200();
+ uint32_t EA_201();
+ uint32_t EA_202();
+ uint32_t EA_203();
+ uint32_t EA_204();
+ uint32_t EA_205();
+ uint32_t EA_206();
+ uint32_t EA_207();
};
class v25_device : public v25_common_device
{
public:
- v25_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v25_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class v35_device : public v25_common_device
{
public:
- v35_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v35_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/nec/v25instr.hxx b/src/devices/cpu/nec/v25instr.hxx
index bd11b0626a8..881f2044aae 100644
--- a/src/devices/cpu/nec/v25instr.hxx
+++ b/src/devices/cpu/nec/v25instr.hxx
@@ -42,7 +42,7 @@
} \
}
-OP( 0x0f, i_pre_v25 ) { UINT32 ModRM, tmp, tmp2;
+OP( 0x0f, i_pre_v25 ) { uint32_t ModRM, tmp, tmp2;
switch (FETCH()) {
case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = Breg(CL) & 0x7; m_ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; m_CarryVal=m_OverVal=0; break; /* Test */
case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = Breg(CL) & 0xf; m_ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; m_CarryVal=m_OverVal=0; break; /* Test */
diff --git a/src/devices/cpu/nec/v25priv.h b/src/devices/cpu/nec/v25priv.h
index 19e8fcb7171..3fe8ae9cee3 100644
--- a/src/devices/cpu/nec/v25priv.h
+++ b/src/devices/cpu/nec/v25priv.h
@@ -148,7 +148,7 @@ enum BREGS {
#define PUSH(val) { Wreg(SP) -= 2; write_mem_word(((Sreg(SS)<<4)+Wreg(SP)), val); }
#define POP(var) { Wreg(SP) += 2; var = read_mem_word(((Sreg(SS)<<4) + ((Wreg(SP)-2) & 0xffff))); }
-#define GetModRM UINT32 ModRM=FETCH()
+#define GetModRM uint32_t ModRM=FETCH()
/* Cycle count macros:
CLK - cycle count is the same on all processors
@@ -163,10 +163,10 @@ enum BREGS {
*/
#define CLK(all) m_icount-=all
-#define CLKS(v20,v30,v33) { const UINT32 ccount=(v20<<16)|(v30<<8)|v33; m_icount-=(ccount>>m_chip_type)&0x7f; }
-#define CLKW(v20o,v30o,v33o,v20e,v30e,v33e,addr) { const UINT32 ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; m_icount-=(addr&1)?((ocount>>m_chip_type)&0x7f):((ecount>>m_chip_type)&0x7f); }
-#define CLKM(v20,v30,v33,v20m,v30m,v33m) { const UINT32 ccount=(v20<<16)|(v30<<8)|v33, mcount=(v20m<<16)|(v30m<<8)|v33m; m_icount-=( ModRM >=0xc0 )?((ccount>>m_chip_type)&0x7f):((mcount>>m_chip_type)&0x7f); }
-#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall,addr) { const UINT32 ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; if (ModRM >=0xc0) m_icount-=vall; else m_icount-=(addr&1)?((ocount>>m_chip_type)&0x7f):((ecount>>m_chip_type)&0x7f); }
+#define CLKS(v20,v30,v33) { const uint32_t ccount=(v20<<16)|(v30<<8)|v33; m_icount-=(ccount>>m_chip_type)&0x7f; }
+#define CLKW(v20o,v30o,v33o,v20e,v30e,v33e,addr) { const uint32_t ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; m_icount-=(addr&1)?((ocount>>m_chip_type)&0x7f):((ecount>>m_chip_type)&0x7f); }
+#define CLKM(v20,v30,v33,v20m,v30m,v33m) { const uint32_t ccount=(v20<<16)|(v30<<8)|v33, mcount=(v20m<<16)|(v30m<<8)|v33m; m_icount-=( ModRM >=0xc0 )?((ccount>>m_chip_type)&0x7f):((mcount>>m_chip_type)&0x7f); }
+#define CLKR(v20o,v30o,v33o,v20e,v30e,v33e,vall,addr) { const uint32_t ocount=(v20o<<16)|(v30o<<8)|v33o, ecount=(v20e<<16)|(v30e<<8)|v33e; if (ModRM >=0xc0) m_icount-=vall; else m_icount-=(addr&1)?((ocount>>m_chip_type)&0x7f):((ecount>>m_chip_type)&0x7f); }
/************************************************************************/
#define CompressFlags() (WORD)(CF | (m_IBRK << 1) | (PF << 2) | (m_F0 << 3) | (AF << 4) \
diff --git a/src/devices/cpu/nec/v25sfr.cpp b/src/devices/cpu/nec/v25sfr.cpp
index ea80ca4aa1f..788ab419b29 100644
--- a/src/devices/cpu/nec/v25sfr.cpp
+++ b/src/devices/cpu/nec/v25sfr.cpp
@@ -10,7 +10,7 @@
#include "v25.h"
#include "v25priv.h"
-UINT8 v25_common_device::read_irqcontrol(int /*INTSOURCES*/ source, UINT8 priority)
+uint8_t v25_common_device::read_irqcontrol(int /*INTSOURCES*/ source, uint8_t priority)
{
return (((m_pending_irq & source) ? 0x80 : 0x00)
| ((m_unmasked_irq & source) ? 0x00 : 0x40)
@@ -18,9 +18,9 @@ UINT8 v25_common_device::read_irqcontrol(int /*INTSOURCES*/ source, UINT8 priori
| priority);
}
-UINT8 v25_common_device::read_sfr(unsigned o)
+uint8_t v25_common_device::read_sfr(unsigned o)
{
- UINT8 ret;
+ uint8_t ret;
switch(o)
{
@@ -109,9 +109,9 @@ UINT8 v25_common_device::read_sfr(unsigned o)
return ret;
}
-UINT16 v25_common_device::read_sfr_word(unsigned o)
+uint16_t v25_common_device::read_sfr_word(unsigned o)
{
- UINT16 ret;
+ uint16_t ret;
switch(o)
{
@@ -137,7 +137,7 @@ UINT16 v25_common_device::read_sfr_word(unsigned o)
return ret;
}
-void v25_common_device::write_irqcontrol(int /*INTSOURCES*/ source, UINT8 d)
+void v25_common_device::write_irqcontrol(int /*INTSOURCES*/ source, uint8_t d)
{
if(d & 0x80)
m_pending_irq |= source;
@@ -158,7 +158,7 @@ void v25_common_device::write_irqcontrol(int /*INTSOURCES*/ source, UINT8 d)
m_bankswitch_irq &= ~source;
}
-void v25_common_device::write_sfr(unsigned o, UINT8 d)
+void v25_common_device::write_sfr(unsigned o, uint8_t d)
{
int tmp;
attotime time;
@@ -284,7 +284,7 @@ void v25_common_device::write_sfr(unsigned o, UINT8 d)
}
}
-void v25_common_device::write_sfr_word(unsigned o, UINT16 d)
+void v25_common_device::write_sfr_word(unsigned o, uint16_t d)
{
switch(o)
{
@@ -306,7 +306,7 @@ void v25_common_device::write_sfr_word(unsigned o, UINT16 d)
}
}
-UINT8 v25_common_device::v25_read_byte(unsigned a)
+uint8_t v25_common_device::v25_read_byte(unsigned a)
{
if((a & 0xFFE00) == m_IDB || a == 0xFFFFF)
{
@@ -322,7 +322,7 @@ UINT8 v25_common_device::v25_read_byte(unsigned a)
return m_program->read_byte(a);
}
-UINT16 v25_common_device::v25_read_word(unsigned a)
+uint16_t v25_common_device::v25_read_word(unsigned a)
{
if( a & 1 )
return (v25_read_byte(a) | (v25_read_byte(a + 1) << 8));
@@ -344,7 +344,7 @@ UINT16 v25_common_device::v25_read_word(unsigned a)
return m_program->read_word(a);
}
-void v25_common_device::v25_write_byte(unsigned a, UINT8 d)
+void v25_common_device::v25_write_byte(unsigned a, uint8_t d)
{
if((a & 0xFFE00) == m_IDB || a == 0xFFFFF)
{
@@ -366,7 +366,7 @@ void v25_common_device::v25_write_byte(unsigned a, UINT8 d)
m_program->write_byte(a, d);
}
-void v25_common_device::v25_write_word(unsigned a, UINT16 d)
+void v25_common_device::v25_write_word(unsigned a, uint16_t d)
{
if( a & 1 )
{
diff --git a/src/devices/cpu/nec/v53.cpp b/src/devices/cpu/nec/v53.cpp
index 23e0dec6991..8ae50d4595e 100644
--- a/src/devices/cpu/nec/v53.cpp
+++ b/src/devices/cpu/nec/v53.cpp
@@ -234,7 +234,7 @@ void v53_base_device::install_peripheral_io()
if (m_OPSEL & 0x01) // DMA Unit available
{
- UINT16 base = (m_OPHA << 8) | m_DULA;
+ uint16_t base = (m_OPHA << 8) | m_DULA;
base &= 0xfffe;
if (m_SCTL & 0x02) // uPD71037 mode
@@ -254,7 +254,7 @@ void v53_base_device::install_peripheral_io()
if (m_OPSEL & 0x02) // Interupt Control Unit available
{
- UINT16 base = (m_OPHA << 8) | m_IULA;
+ uint16_t base = (m_OPHA << 8) | m_IULA;
base &= 0xfffe;
if (IOAG) // 8-bit
@@ -268,7 +268,7 @@ void v53_base_device::install_peripheral_io()
if (m_OPSEL & 0x04) // Timer Control Unit available
{
- UINT16 base = (m_OPHA << 8) | m_TULA;
+ uint16_t base = (m_OPHA << 8) | m_TULA;
//printf("installing TCU to %04x\n", base);
base &= 0xfffe;
@@ -286,7 +286,7 @@ void v53_base_device::install_peripheral_io()
if (m_OPSEL & 0x08) // Serial Control Unit available
{
- UINT16 base = (m_OPHA << 8) | m_SULA;
+ uint16_t base = (m_OPHA << 8) | m_SULA;
base &= 0xfffe;
if (IOAG) // 8-bit
@@ -526,7 +526,7 @@ machine_config_constructor v53_base_device::device_mconfig_additions() const
}
-v53_base_device::v53_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type)
+v53_base_device::v53_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type)
: nec_common_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__, true, fetch_xor, prefetch_size, prefetch_cycles, chip_type),
m_io_space_config( "io", ENDIANNESS_LITTLE, 16, 16, 0, ADDRESS_MAP_NAME( v53_internal_port_map ) ),
m_v53tcu(*this, "pit"),
@@ -566,13 +566,13 @@ v53_base_device::v53_base_device(const machine_config &mconfig, device_type type
}
-v53_device::v53_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v53_device::v53_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: v53_base_device(mconfig, V53, "V53", tag, owner, clock, "v53", BYTE_XOR_LE(0), 6, 1, V33_TYPE)
{
}
-v53a_device::v53a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v53a_device::v53a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: v53_base_device(mconfig, V53A, "V53A", tag, owner, clock, "v53a", BYTE_XOR_LE(0), 6, 1, V33_TYPE)
{
}
diff --git a/src/devices/cpu/nec/v53.h b/src/devices/cpu/nec/v53.h
index 6afdd1c4f39..2f1f58d8361 100644
--- a/src/devices/cpu/nec/v53.h
+++ b/src/devices/cpu/nec/v53.h
@@ -107,7 +107,7 @@
class v53_base_device : public nec_common_device
{
public:
- v53_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type);
+ v53_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type);
DECLARE_WRITE8_MEMBER(BSEL_w);
DECLARE_WRITE8_MEMBER(BADR_w);
@@ -131,19 +131,19 @@ public:
DECLARE_WRITE8_MEMBER(OPSEL_w);
DECLARE_WRITE8_MEMBER(SCTL_w);
- UINT8 m_SCTL;
- UINT8 m_OPSEL;
+ uint8_t m_SCTL;
+ uint8_t m_OPSEL;
- UINT8 m_SULA;
- UINT8 m_TULA;
- UINT8 m_IULA;
- UINT8 m_DULA;
- UINT8 m_OPHA;
+ uint8_t m_SULA;
+ uint8_t m_TULA;
+ uint8_t m_IULA;
+ uint8_t m_DULA;
+ uint8_t m_OPHA;
// SCU
DECLARE_READ8_MEMBER(scu_simk_r);
DECLARE_WRITE8_MEMBER(scu_simk_w);
- UINT8 m_simk;
+ uint8_t m_simk;
template<class _Object> static devcb_base &set_txd_handler(device_t &device, _Object object) { return downcast<v53_base_device &>(device).m_txd_handler.set_callback(object); }
template<class _Object> static devcb_base &set_dtr_handler(device_t &device, _Object object) { return downcast<v53_base_device &>(device).m_dtr_handler.set_callback(object); }
template<class _Object> static devcb_base &set_rts_handler(device_t &device, _Object object) { return downcast<v53_base_device &>(device).m_rts_handler.set_callback(object); }
@@ -296,13 +296,13 @@ protected:
class v53_device : public v53_base_device
{
public:
- v53_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v53_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class v53a_device : public v53_base_device
{
public:
- v53a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v53a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
extern const device_type V53;
diff --git a/src/devices/cpu/patinhofeio/patinho_feio.cpp b/src/devices/cpu/patinhofeio/patinho_feio.cpp
index d0d45db77ee..ceeab59fcc4 100644
--- a/src/devices/cpu/patinhofeio/patinho_feio.cpp
+++ b/src/devices/cpu/patinhofeio/patinho_feio.cpp
@@ -32,7 +32,7 @@
#define ADDRESS_MASK_4K 0xFFF
#define INCREMENT_PC_4K (PC = (PC+1) & ADDRESS_MASK_4K)
-void patinho_feio_cpu_device::set_flag(UINT8 flag, bool state){
+void patinho_feio_cpu_device::set_flag(uint8_t flag, bool state){
if (state){
FLAGS |= flag;
} else {
@@ -56,7 +56,7 @@ static ADDRESS_MAP_START(prog_8bit, AS_PROGRAM, 8, patinho_feio_cpu_device)
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("internalram")
ADDRESS_MAP_END
-patinho_feio_cpu_device::patinho_feio_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+patinho_feio_cpu_device::patinho_feio_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, PATINHO_FEIO, "PATINHO FEIO", tag, owner, clock, "patinho_feio_cpu", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 8, 12, 0, ADDRESS_MAP_NAME(prog_8bit)),
m_icount(0),
@@ -69,7 +69,7 @@ patinho_feio_cpu_device::patinho_feio_cpu_device(const machine_config &mconfig,
{
}
-UINT16 patinho_feio_cpu_device::read_panel_keys_register(){
+uint16_t patinho_feio_cpu_device::read_panel_keys_register(){
if (!m_rc_read_cb.isnull())
m_rc = m_rc_read_cb(0);
else
@@ -78,7 +78,7 @@ UINT16 patinho_feio_cpu_device::read_panel_keys_register(){
return m_rc;
}
-void patinho_feio_cpu_device::transfer_byte_from_external_device(UINT8 channel, UINT8 data){
+void patinho_feio_cpu_device::transfer_byte_from_external_device(uint8_t channel, uint8_t data){
m_iodev_incoming_byte[channel] = data;
m_iodev_status[channel] = IODEV_READY;
m_iodev_control[channel] = NO_REQUEST;
@@ -171,7 +171,7 @@ void patinho_feio_cpu_device::execute_run() {
if (!m_run){
if (!m_buttons_read_cb.isnull()){
- UINT16 buttons = m_buttons_read_cb(0);
+ uint16_t buttons = m_buttons_read_cb(0);
if (buttons & BUTTON_PARTIDA){
/* "startup" button */
switch (m_mode){
@@ -230,8 +230,8 @@ void patinho_feio_cpu_device::execute_instruction()
case 0xD8:
//SOMI="Soma Imediato":
// Add an immediate into the accumulator
- set_flag(V, ((((INT16) ACC) + ((INT16) READ_BYTE_PATINHO(PC))) >> 8));
- set_flag(T, ((((INT8) (ACC & 0x7F)) + ((INT8) (READ_BYTE_PATINHO(PC) & 0x7F))) >> 7) == V);
+ set_flag(V, ((((int16_t) ACC) + ((int16_t) READ_BYTE_PATINHO(PC))) >> 8));
+ set_flag(T, ((((int8_t) (ACC & 0x7F)) + ((int8_t) (READ_BYTE_PATINHO(PC) & 0x7F))) >> 7) == V);
ACC += READ_BYTE_PATINHO(PC);
INCREMENT_PC_4K;
return;
@@ -775,7 +775,7 @@ void patinho_feio_cpu_device::execute_instruction()
printf("unimplemented opcode: 0x%02X\n", m_opcode);
}
-offs_t patinho_feio_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t patinho_feio_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( patinho_feio );
return CPU_DISASSEMBLE_NAME(patinho_feio)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/patinhofeio/patinhofeio_cpu.h b/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
index 122211bc35a..b10d3b7f0b1 100644
--- a/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
+++ b/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
@@ -51,7 +51,7 @@ enum
class patinho_feio_cpu_device : public cpu_device {
public:
// construction/destruction
- patinho_feio_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ patinho_feio_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
template<class _Object> static devcb_base &set_rc_read_callback(device_t &device, _Object object) { return downcast<patinho_feio_cpu_device &>(device).m_rc_read_cb.set_callback(object); }
template<class _Object> static devcb_base &set_buttons_read_callback(device_t &device, _Object object) { return downcast<patinho_feio_cpu_device &>(device).m_buttons_read_cb.set_callback(object); }
@@ -59,14 +59,14 @@ public:
template<class _Object> static devcb_base &set_iodev_write_callback(device_t &device, int devnumber, _Object object) { return downcast<patinho_feio_cpu_device &>(device).m_iodev_write_cb[devnumber].set_callback(object); }
template<class _Object> static devcb_base &set_iodev_status_callback(device_t &device, int devnumber, _Object object) { return downcast<patinho_feio_cpu_device &>(device).m_iodev_status_cb[devnumber].set_callback(object); }
- void transfer_byte_from_external_device(UINT8 channel, UINT8 data);
- void set_iodev_status(UINT8 channel, bool status) {
+ void transfer_byte_from_external_device(uint8_t channel, uint8_t data);
+ void set_iodev_status(uint8_t channel, bool status) {
m_iodev_status[channel] = status;
}
protected:
virtual void execute_run() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
@@ -97,10 +97,10 @@ protected:
bool m_iodev_status[16];
/* 8-bit registers for receiving data from peripherals */
- UINT8 m_iodev_incoming_byte[16];
+ uint8_t m_iodev_incoming_byte[16];
/* 8-bit registers for sending data to peripherals */
- UINT8 m_iodev_outgoing_byte[16];
+ uint8_t m_iodev_outgoing_byte[16];
int m_flags;
// V = "Vai um" (Carry flag)
@@ -116,27 +116,27 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
private:
void execute_instruction();
void compute_effective_address(unsigned int addr);
- void set_flag(UINT8 flag, bool state);
- UINT16 read_panel_keys_register();
+ void set_flag(uint8_t flag, bool state);
+ uint16_t read_panel_keys_register();
devcb_read16 m_rc_read_cb;
devcb_read16 m_buttons_read_cb;
devcb_read8 m_iodev_read_cb[16];
devcb_write8 m_iodev_write_cb[16];
devcb_read8 m_iodev_status_cb[16];
- UINT8 m_mode;
+ uint8_t m_mode;
};
extern const device_type PATINHO_FEIO;
diff --git a/src/devices/cpu/pdp1/pdp1.cpp b/src/devices/cpu/pdp1/pdp1.cpp
index ded99a2d80d..ef7e5524399 100644
--- a/src/devices/cpu/pdp1/pdp1.cpp
+++ b/src/devices/cpu/pdp1/pdp1.cpp
@@ -380,7 +380,7 @@
const device_type PDP1 = &device_creator<pdp1_device>;
-pdp1_device::pdp1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pdp1_device::pdp1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, PDP1, "PDP1", tag, owner, clock, "pdp1_cpu", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 18, 0)
{
@@ -412,7 +412,7 @@ void pdp1_device::device_config_complete()
}
-offs_t pdp1_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t pdp1_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( pdp1 );
return CPU_DISASSEMBLE_NAME(pdp1)(this, buffer, pc, oprom, opram, options);
@@ -772,7 +772,7 @@ void pdp1_device::device_reset()
except cal and jda, and with the addition of jmp and jsp)
* 2 for memory reference instructions
*/
-static const UINT8 instruction_kind[32] =
+static const uint8_t instruction_kind[32] =
{
/* and ior xor xct cal/jda */
0, 3, 3, 3, 3, 0, 0, 2,
diff --git a/src/devices/cpu/pdp1/pdp1.h b/src/devices/cpu/pdp1/pdp1.h
index f6d742a2a4e..a17c2d37858 100644
--- a/src/devices/cpu/pdp1/pdp1.h
+++ b/src/devices/cpu/pdp1/pdp1.h
@@ -79,7 +79,7 @@ class pdp1_device : public cpu_device
{
public:
// construction/destruction
- pdp1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pdp1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
static void static_set_reset_param(device_t &device, const pdp1_reset_param_t *param) { downcast<pdp1_device &>(device).m_reset_param = param; }
@@ -97,9 +97,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 5; }
- virtual UINT32 execute_max_cycles() const override { return 31; }
- virtual UINT32 execute_input_lines() const override { return 16; }
+ virtual uint32_t execute_min_cycles() const override { return 5; }
+ virtual uint32_t execute_max_cycles() const override { return 31; }
+ virtual uint32_t execute_input_lines() const override { return 16; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -112,15 +112,15 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
/* processor registers */
- UINT32 m_pc; /* program counter (12, 15 or 16 bits) */
+ uint32_t m_pc; /* program counter (12, 15 or 16 bits) */
int m_ir; /* basic operation code of current instruction (5 bits) */
int m_mb; /* memory buffer (used for holding the current instruction only) (18 bits) */
int m_ma; /* memory address (12, 15 or 16 bits) */
@@ -153,11 +153,11 @@ private:
unsigned int m_ios; /* i-o synchronizer: set on i-o operation completion */
/* sequence break system */
- UINT16 m_irq_state; /* mirrors the state of the interrupt pins */
- UINT16 m_b1; /* interrupt enable */
- UINT16 m_b2; /* interrupt pulse request pending - asynchronous with computer operation (set by pulses on irq_state, cleared when interrupt is taken) */
- /*UINT16 m_b3;*/ /* interrupt request pending - synchronous with computer operation (logical or of irq_state and b2???) */
- UINT16 m_b4; /* interrupt in progress */
+ uint16_t m_irq_state; /* mirrors the state of the interrupt pins */
+ uint16_t m_b1; /* interrupt enable */
+ uint16_t m_b2; /* interrupt pulse request pending - asynchronous with computer operation (set by pulses on irq_state, cleared when interrupt is taken) */
+ /*uint16_t m_b3;*/ /* interrupt request pending - synchronous with computer operation (logical or of irq_state and b2???) */
+ uint16_t m_b4; /* interrupt in progress */
/* additional emulator state variables */
int m_rim_step; /* current step in rim execution */
@@ -187,7 +187,7 @@ private:
address_space *m_program;
int m_icount;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
void field_interrupt();
void execute_instruction();
diff --git a/src/devices/cpu/pdp1/tx0.cpp b/src/devices/cpu/pdp1/tx0.cpp
index 1f6ee61e6cd..25830f4cbb5 100644
--- a/src/devices/cpu/pdp1/tx0.cpp
+++ b/src/devices/cpu/pdp1/tx0.cpp
@@ -44,7 +44,7 @@ const device_type TX0_8KW = &device_creator<tx0_8kw_device>;
const device_type TX0_64KW = &device_creator<tx0_64kw_device>;
-tx0_device::tx0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int addr_bits, int address_mask, int ir_mask)
+tx0_device::tx0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int addr_bits, int address_mask, int ir_mask)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 32, addr_bits , -2), m_mbr(0), m_ac(0), m_mar(0), m_pc(0), m_ir(0), m_lr(0), m_xr(0), m_pf(0), m_tbr(0), m_tac(0), m_cm_sel(0),
m_lr_sel(0), m_gbl_cm_sel(0), m_stop_cyc0(0), m_stop_cyc1(0), m_run(0), m_rim(0), m_cycle(0), m_ioh(0), m_ios(0), m_rim_step(0)
@@ -64,13 +64,13 @@ tx0_device::tx0_device(const machine_config &mconfig, device_type type, const ch
m_program_config.m_is_octal = true;
}
-tx0_8kw_device::tx0_8kw_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tx0_8kw_device::tx0_8kw_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tx0_device(mconfig, TX0_8KW, "TX-0 8KW", tag, owner, clock, "tx0_8w_cpu", __FILE__, 13, ADDRESS_MASK_8KW, 037)
{
}
-tx0_64kw_device::tx0_64kw_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tx0_64kw_device::tx0_64kw_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tx0_device(mconfig, TX0_64KW, "TX-0 64KW", tag, owner, clock, "tx0_64kw_cpu", __FILE__, 16, ADDRESS_MASK_64KW, 03)
{
}
@@ -1068,14 +1068,14 @@ void tx0_device::io_complete()
}
-offs_t tx0_8kw_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tx0_8kw_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tx0_8kw );
return CPU_DISASSEMBLE_NAME(tx0_8kw)(this, buffer, pc, oprom, opram, options);
}
-offs_t tx0_64kw_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tx0_64kw_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tx0_64kw );
return CPU_DISASSEMBLE_NAME(tx0_64kw)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/pdp1/tx0.h b/src/devices/cpu/pdp1/tx0.h
index 73d7d7705f1..3893cd88e27 100644
--- a/src/devices/cpu/pdp1/tx0.h
+++ b/src/devices/cpu/pdp1/tx0.h
@@ -38,7 +38,7 @@ class tx0_device : public cpu_device
{
public:
// construction/destruction
- tx0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int addr_bits, int address_mask, int ir_mask);
+ tx0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int addr_bits, int address_mask, int ir_mask);
// static configuration helpers
template<class _Object> static devcb_base &set_cpy_cb(device_t &device, _Object object) { return downcast<tx0_device &>(device).m_cpy_handler.set_callback(object); }
@@ -61,15 +61,15 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 3; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 3; }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
protected:
address_space_config m_program_config;
@@ -88,8 +88,8 @@ protected:
int m_tbr; /* toggle switch buffer register (18 bits) */
int m_tac; /* toggle switch accumulator (18 bits) */
int m_tss[16]; /* toggle switch storage (18 bits * 16) */
- UINT16 m_cm_sel; /* individual cm select (1 bit * 16) */
- UINT16 m_lr_sel; /* individual lr select (1 bit * 16) */
+ uint16_t m_cm_sel; /* individual cm select (1 bit * 16) */
+ uint16_t m_lr_sel; /* individual lr select (1 bit * 16) */
unsigned int m_gbl_cm_sel;/* global cm select (1 bit) */
unsigned int m_stop_cyc0; /* stop on cycle 0 */
unsigned int m_stop_cyc1; /* stop on cycle 1 */
@@ -147,11 +147,11 @@ class tx0_8kw_device : public tx0_device
{
public:
// construction/destruction
- tx0_8kw_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ tx0_8kw_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
protected:
virtual void execute_run() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
void execute_instruction_8kw();
@@ -162,11 +162,11 @@ class tx0_64kw_device : public tx0_device
{
public:
// construction/destruction
- tx0_64kw_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ tx0_64kw_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
protected:
virtual void execute_run() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
void execute_instruction_64kw();
diff --git a/src/devices/cpu/pdp8/pdp8.cpp b/src/devices/cpu/pdp8/pdp8.cpp
index 747bea2ffb9..8946932b147 100644
--- a/src/devices/cpu/pdp8/pdp8.cpp
+++ b/src/devices/cpu/pdp8/pdp8.cpp
@@ -50,7 +50,7 @@ const device_type PDP8CPU = &device_creator<pdp8_device>;
// pdp8_device - constructor
//-------------------------------------------------
-pdp8_device::pdp8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pdp8_device::pdp8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, PDP8CPU, "PDP8CPU", tag, owner, clock, "pdp8_cpu", __FILE__),
m_program_config("program", ENDIANNESS_BIG, 12, 12),
m_pc(0),
@@ -152,7 +152,7 @@ void pdp8_device::state_string_export(const device_state_entry &entry, std::stri
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 pdp8_device::disasm_min_opcode_bytes() const
+uint32_t pdp8_device::disasm_min_opcode_bytes() const
{
return 2;
}
@@ -163,7 +163,7 @@ UINT32 pdp8_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 pdp8_device::disasm_max_opcode_bytes() const
+uint32_t pdp8_device::disasm_max_opcode_bytes() const
{
return 2;
}
@@ -174,7 +174,7 @@ UINT32 pdp8_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t pdp8_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t pdp8_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( pdp8 );
return CPU_DISASSEMBLE_NAME(pdp8)(this, buffer, pc, oprom, opram, options);
@@ -190,7 +190,7 @@ offs_t pdp8_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 pdp8_device::execute_min_cycles() const
+uint32_t pdp8_device::execute_min_cycles() const
{
return 1; // TODO
}
@@ -201,7 +201,7 @@ UINT32 pdp8_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 pdp8_device::execute_max_cycles() const
+uint32_t pdp8_device::execute_max_cycles() const
{
return 3; // TODO
}
@@ -212,7 +212,7 @@ UINT32 pdp8_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 pdp8_device::execute_input_lines() const
+uint32_t pdp8_device::execute_input_lines() const
{
return 0; // TODO
}
@@ -242,7 +242,7 @@ void pdp8_device::execute_run()
debugger_instruction_hook(this, m_pc);
- UINT16 op = m_program->read_word(m_pc);
+ uint16_t op = m_program->read_word(m_pc);
--m_icount;
}
diff --git a/src/devices/cpu/pdp8/pdp8.h b/src/devices/cpu/pdp8/pdp8.h
index 66f04682d7e..55958cb2029 100644
--- a/src/devices/cpu/pdp8/pdp8.h
+++ b/src/devices/cpu/pdp8/pdp8.h
@@ -22,7 +22,7 @@ class pdp8_device : public cpu_device
{
public:
// construction/destruction
- pdp8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pdp8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override;
@@ -30,9 +30,9 @@ public:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -40,9 +40,9 @@ public:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -73,13 +73,13 @@ public:
};
private:
// CPU registers
- UINT16 m_pc;
- UINT16 m_ac;
- UINT16 m_mb;
- UINT16 m_ma;
- UINT16 m_sr;
- UINT8 m_l;
- UINT8 m_ir;
+ uint16_t m_pc;
+ uint16_t m_ac;
+ uint16_t m_mb;
+ uint16_t m_ma;
+ uint16_t m_sr;
+ uint8_t m_l;
+ uint8_t m_ir;
bool m_halt;
// other internal states
diff --git a/src/devices/cpu/pdp8/pdp8dasm.cpp b/src/devices/cpu/pdp8/pdp8dasm.cpp
index 01dc3621ffa..cfaadfb78e3 100644
--- a/src/devices/cpu/pdp8/pdp8dasm.cpp
+++ b/src/devices/cpu/pdp8/pdp8dasm.cpp
@@ -10,12 +10,12 @@
static char *output;
-offs_t pdp8_dasm_one(char *buffer, offs_t pc, UINT16 op)
+offs_t pdp8_dasm_one(char *buffer, offs_t pc, uint16_t op)
{
- UINT8 opcode = (op >> 011) & 07;
- UINT16 current_page = pc & 07600;
- UINT16 zero_addr = op & 0177;
- UINT16 current_addr = current_page | zero_addr;
+ uint8_t opcode = (op >> 011) & 07;
+ uint16_t current_page = pc & 07600;
+ uint16_t zero_addr = op & 0177;
+ uint16_t current_addr = current_page | zero_addr;
bool indirect = (op & 0400) ? true : false;
bool zero_page = (op & 0200) ? false : true;
@@ -168,7 +168,7 @@ offs_t pdp8_dasm_one(char *buffer, offs_t pc, UINT16 op)
CPU_DISASSEMBLE( pdp8 )
{
- UINT16 op = (*(UINT8 *)(opram + 0) << 8) |
- (*(UINT8 *)(opram + 1) << 0);
+ uint16_t op = (*(uint8_t *)(opram + 0) << 8) |
+ (*(uint8_t *)(opram + 1) << 0);
return pdp8_dasm_one(buffer, pc, op);
}
diff --git a/src/devices/cpu/pic16c5x/16c5xdsm.cpp b/src/devices/cpu/pic16c5x/16c5xdsm.cpp
index d3fdab5af8d..b7bc3c5da72 100644
--- a/src/devices/cpu/pic16c5x/16c5xdsm.cpp
+++ b/src/devices/cpu/pic16c5x/16c5xdsm.cpp
@@ -26,8 +26,8 @@
#include "emu.h"
#include <ctype.h>
-static const UINT8 *rombase;
-static const UINT8 *rambase;
+static const uint8_t *rombase;
+static const uint8_t *rambase;
static offs_t pcbase;
#define READOP16(A) (rombase[(A) - pcbase] | (rombase[(A) + 1 - pcbase] << 8))
#define READARG16(A) (rambase[(A) - pcbase] | (rambase[(A) + 1 - pcbase] << 8))
@@ -135,7 +135,7 @@ static void InitDasm16C5x(void)
fatalerror("not enough bits in encoding '%s %s' %d\n",
ops[0],ops[1],bit);
}
- while (isspace((UINT8)*p)) p++;
+ while (isspace((uint8_t)*p)) p++;
if (*p) Op[i].extcode = *p;
Op[i].bits = bits;
Op[i].mask = mask;
@@ -159,7 +159,7 @@ CPU_DISASSEMBLE( pic16c5x )
int bit;
//char *buffertmp;
const char *cp; /* character pointer in OpFormats */
- UINT32 flags = 0;
+ uint32_t flags = 0;
rombase = oprom;
rambase = opram;
diff --git a/src/devices/cpu/pic16c5x/pic16c5x.cpp b/src/devices/cpu/pic16c5x/pic16c5x.cpp
index 3a4193db730..48a683eaed7 100644
--- a/src/devices/cpu/pic16c5x/pic16c5x.cpp
+++ b/src/devices/cpu/pic16c5x/pic16c5x.cpp
@@ -106,7 +106,7 @@ static ADDRESS_MAP_START( pic16c5x_ram_7, AS_DATA, 8, pic16c5x_device )
ADDRESS_MAP_END
-pic16c5x_device::pic16c5x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, int picmodel)
+pic16c5x_device::pic16c5x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, int picmodel)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, program_width, -1
, ( ( program_width == 9 ) ? ADDRESS_MAP_NAME(pic16c5x_rom_9) : ( ( program_width == 10 ) ? ADDRESS_MAP_NAME(pic16c5x_rom_10) : ADDRESS_MAP_NAME(pic16c5x_rom_11) )))
@@ -127,33 +127,33 @@ pic16c5x_device::pic16c5x_device(const machine_config &mconfig, device_type type
}
-pic16c54_device::pic16c54_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c54_device::pic16c54_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c5x_device(mconfig, PIC16C54, "PIC16C54", tag, owner, clock, "pic16c54", 9, 5, 0x16C54)
{
}
-pic16c55_device::pic16c55_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c55_device::pic16c55_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c5x_device(mconfig, PIC16C55, "PIC16C55", tag, owner, clock, "pic16c55", 9, 5, 0x16C55)
{
}
-pic16c56_device::pic16c56_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c56_device::pic16c56_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c5x_device(mconfig, PIC16C56, "PIC16C56", tag, owner, clock, "pic16c56", 10, 5, 0x16C56)
{
}
-pic16c57_device::pic16c57_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c57_device::pic16c57_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c5x_device(mconfig, PIC16C57, "PIC16C57", tag, owner, clock, "pic16c57", 11, 7, 0x16C57)
{
}
-pic16c58_device::pic16c58_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c58_device::pic16c58_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c5x_device(mconfig, PIC16C58, "PIC16C58", tag, owner, clock, "pic16c58", 11, 7, 0x16C58)
{
}
-offs_t pic16c5x_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t pic16c5x_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( pic16c5x );
return CPU_DISASSEMBLE_NAME(pic16c5x)(this, buffer, pc, oprom, opram, options);
@@ -162,13 +162,13 @@ offs_t pic16c5x_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
void pic16c5x_device::update_internalram_ptr()
{
- m_internalram = (UINT8 *)m_data->get_write_ptr(0x00);
+ m_internalram = (uint8_t *)m_data->get_write_ptr(0x00);
}
#define PIC16C5x_RDOP(A) (m_direct->read_word((A)<<1))
-#define PIC16C5x_RAM_RDMEM(A) ((UINT8)m_data->read_byte(A))
+#define PIC16C5x_RAM_RDMEM(A) ((uint8_t)m_data->read_byte(A))
#define PIC16C5x_RAM_WRMEM(A,V) (m_data->write_byte(A,V))
#define M_RDRAM(A) (((A) < 8) ? m_internalram[A] : PIC16C5x_RAM_RDMEM(A))
@@ -240,7 +240,7 @@ void pic16c5x_device::update_internalram_ptr()
* Shortcuts
************************************************************************/
-#define CLR(flagreg, flag) ( flagreg &= (UINT8)(~flag) )
+#define CLR(flagreg, flag) ( flagreg &= (uint8_t)(~flag) )
#define SET(flagreg, flag) ( flagreg |= flag )
@@ -259,7 +259,7 @@ void pic16c5x_device::CALCULATE_Z_FLAG()
void pic16c5x_device::CALCULATE_ADD_CARRY()
{
- if ((UINT8)(m_old_data) > (UINT8)(m_ALU)) {
+ if ((uint8_t)(m_old_data) > (uint8_t)(m_ALU)) {
SET(STATUS, C_FLAG);
}
else {
@@ -269,7 +269,7 @@ void pic16c5x_device::CALCULATE_ADD_CARRY()
void pic16c5x_device::CALCULATE_ADD_DIGITCARRY()
{
- if (((UINT8)(m_old_data) & 0x0f) > ((UINT8)(m_ALU) & 0x0f)) {
+ if (((uint8_t)(m_old_data) & 0x0f) > ((uint8_t)(m_ALU) & 0x0f)) {
SET(STATUS, DC_FLAG);
}
else {
@@ -279,7 +279,7 @@ void pic16c5x_device::CALCULATE_ADD_DIGITCARRY()
void pic16c5x_device::CALCULATE_SUB_CARRY()
{
- if ((UINT8)(m_old_data) < (UINT8)(m_ALU)) {
+ if ((uint8_t)(m_old_data) < (uint8_t)(m_ALU)) {
CLR(STATUS, C_FLAG);
}
else {
@@ -289,7 +289,7 @@ void pic16c5x_device::CALCULATE_SUB_CARRY()
void pic16c5x_device::CALCULATE_SUB_DIGITCARRY()
{
- if (((UINT8)(m_old_data) & 0x0f) < ((UINT8)(m_ALU) & 0x0f)) {
+ if (((uint8_t)(m_old_data) & 0x0f) < ((uint8_t)(m_ALU) & 0x0f)) {
CLR(STATUS, DC_FLAG);
}
else {
@@ -299,13 +299,13 @@ void pic16c5x_device::CALCULATE_SUB_DIGITCARRY()
-UINT16 pic16c5x_device::POP_STACK()
+uint16_t pic16c5x_device::POP_STACK()
{
- UINT16 data = m_STACK[1];
+ uint16_t data = m_STACK[1];
m_STACK[1] = m_STACK[0];
return (data & ADDR_MASK);
}
-void pic16c5x_device::PUSH_STACK(UINT16 data)
+void pic16c5x_device::PUSH_STACK(uint16_t data)
{
m_STACK[0] = m_STACK[1];
m_STACK[1] = (data & ADDR_MASK);
@@ -313,9 +313,9 @@ void pic16c5x_device::PUSH_STACK(UINT16 data)
-UINT8 pic16c5x_device::GET_REGFILE(offs_t addr) /* Read from internal memory */
+uint8_t pic16c5x_device::GET_REGFILE(offs_t addr) /* Read from internal memory */
{
- UINT8 data;
+ uint8_t data;
if (addr == 0) { /* Indirect addressing */
addr = (FSR & m_picRAMmask);
@@ -332,21 +332,21 @@ UINT8 pic16c5x_device::GET_REGFILE(offs_t addr) /* Read from internal memory */
case 00: /* Not an actual register, so return 0 */
data = 0;
break;
- case 04: data = (FSR | (UINT8)(~m_picRAMmask));
+ case 04: data = (FSR | (uint8_t)(~m_picRAMmask));
break;
case 05: data = m_read_a(PIC16C5x_PORTA, 0xff);
data &= m_TRISA;
- data |= ((UINT8)(~m_TRISA) & PORTA);
+ data |= ((uint8_t)(~m_TRISA) & PORTA);
data &= 0x0f; /* 4-bit port (only lower 4 bits used) */
break;
case 06: data = m_read_b(PIC16C5x_PORTB, 0xff);
data &= m_TRISB;
- data |= ((UINT8)(~m_TRISB) & PORTB);
+ data |= ((uint8_t)(~m_TRISB) & PORTB);
break;
case 07: if ((m_picmodel == 0x16C55) || (m_picmodel == 0x16C57)) {
data = m_read_c(PIC16C5x_PORTC, 0xff);
data &= m_TRISC;
- data |= ((UINT8)(~m_TRISC) & PORTC);
+ data |= ((uint8_t)(~m_TRISC) & PORTC);
}
else { /* PIC16C54, PIC16C56, PIC16C58 */
data = M_RDRAM(addr);
@@ -358,7 +358,7 @@ UINT8 pic16c5x_device::GET_REGFILE(offs_t addr) /* Read from internal memory */
return data;
}
-void pic16c5x_device::STORE_REGFILE(offs_t addr, UINT8 data) /* Write to internal memory */
+void pic16c5x_device::STORE_REGFILE(offs_t addr, uint8_t data) /* Write to internal memory */
{
if (addr == 0) { /* Indirect addressing */
addr = (FSR & m_picRAMmask);
@@ -381,19 +381,19 @@ void pic16c5x_device::STORE_REGFILE(offs_t addr, UINT8 data) /* Write to inte
case 02: PCL = data;
m_PC = ((STATUS & PA_REG) << 4) | data;
break;
- case 03: STATUS &= (UINT8)(~PA_REG); STATUS |= (data & PA_REG);
+ case 03: STATUS &= (uint8_t)(~PA_REG); STATUS |= (data & PA_REG);
break;
- case 04: FSR = (data | (UINT8)(~m_picRAMmask));
+ case 04: FSR = (data | (uint8_t)(~m_picRAMmask));
break;
case 05: data &= 0x0f; /* 4-bit port (only lower 4 bits used) */
- m_write_a(PIC16C5x_PORTA, data & (UINT8)(~m_TRISA), 0xff);
+ m_write_a(PIC16C5x_PORTA, data & (uint8_t)(~m_TRISA), 0xff);
PORTA = data;
break;
- case 06: m_write_b(PIC16C5x_PORTB, data & (UINT8)(~m_TRISB), 0xff);
+ case 06: m_write_b(PIC16C5x_PORTB, data & (uint8_t)(~m_TRISB), 0xff);
PORTB = data;
break;
case 07: if ((m_picmodel == 0x16C55) || (m_picmodel == 0x16C57)) {
- m_write_c(PIC16C5x_PORTC, data & (UINT8)(~m_TRISC), 0xff);
+ m_write_c(PIC16C5x_PORTC, data & (uint8_t)(~m_TRISC), 0xff);
PORTC = data;
}
else { /* PIC16C54, PIC16C56, PIC16C58 */
@@ -406,7 +406,7 @@ void pic16c5x_device::STORE_REGFILE(offs_t addr, UINT8 data) /* Write to inte
}
-void pic16c5x_device::STORE_RESULT(offs_t addr, UINT8 data)
+void pic16c5x_device::STORE_RESULT(offs_t addr, uint8_t data)
{
if (m_opcode.b.l & 0x20)
{
@@ -521,7 +521,7 @@ void pic16c5x_device::clrwdt()
void pic16c5x_device::comf()
{
- m_ALU = (UINT8)(~(GET_REGFILE(ADDR)));
+ m_ALU = (uint8_t)(~(GET_REGFILE(ADDR)));
STORE_RESULT(ADDR, m_ALU);
CALCULATE_Z_FLAG();
}
@@ -669,12 +669,12 @@ void pic16c5x_device::tris()
switch(m_opcode.b.l & 0x7)
{
case 05: if (m_TRISA == m_W) break;
- else { m_TRISA = m_W | 0xf0; m_write_a(PIC16C5x_PORTA, PORTA & (UINT8)(~m_TRISA) & 0x0f, 0xff); break; }
+ else { m_TRISA = m_W | 0xf0; m_write_a(PIC16C5x_PORTA, PORTA & (uint8_t)(~m_TRISA) & 0x0f, 0xff); break; }
case 06: if (m_TRISB == m_W) break;
- else { m_TRISB = m_W; m_write_b(PIC16C5x_PORTB, PORTB & (UINT8)(~m_TRISB), 0xff); break; }
+ else { m_TRISB = m_W; m_write_b(PIC16C5x_PORTB, PORTB & (uint8_t)(~m_TRISB), 0xff); break; }
case 07: if ((m_picmodel == 0x16C55) || (m_picmodel == 0x16C57)) {
if (m_TRISC == m_W) break;
- else { m_TRISC = m_W; m_write_c(PIC16C5x_PORTC, PORTC & (UINT8)(~m_TRISC), 0xff); break; }
+ else { m_TRISC = m_W; m_write_c(PIC16C5x_PORTC, PORTC & (uint8_t)(~m_TRISC), 0xff); break; }
}
else {
illegal(); break;
@@ -890,7 +890,7 @@ void pic16c5x_device::state_import(const device_state_entry &entry)
PORTC = m_debugger_temp;
break;
case PIC16C5x_FSR:
- FSR = ((m_debugger_temp & m_picRAMmask) | (UINT8)(~m_picRAMmask));
+ FSR = ((m_debugger_temp & m_picRAMmask) | (uint8_t)(~m_picRAMmask));
break;
case PIC16C5x_PSCL:
m_prescaler = m_debugger_temp;
@@ -918,7 +918,7 @@ void pic16c5x_device::state_export(const device_state_entry &entry)
m_debugger_temp = PORTC;
break;
case PIC16C5x_FSR:
- m_debugger_temp = ((FSR) & m_picRAMmask) | (UINT8)(~m_picRAMmask);
+ m_debugger_temp = ((FSR) & m_picRAMmask) | (uint8_t)(~m_picRAMmask);
break;
}
}
@@ -961,7 +961,7 @@ void pic16c5x_device::pic16c5x_reset_regs()
m_TRISC = 0xff;
m_OPTION = (T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG);
PCL = 0xff;
- FSR |= (UINT8)(~m_picRAMmask);
+ FSR |= (uint8_t)(~m_picRAMmask);
PORTA &= 0x0f;
m_prescaler = 0;
m_delay_timer = 0;
@@ -975,7 +975,7 @@ void pic16c5x_device::pic16c5x_soft_reset()
pic16c5x_reset_regs();
}
-void pic16c5x_device::pic16c5x_set_config(UINT16 data)
+void pic16c5x_device::pic16c5x_set_config(uint16_t data)
{
logerror("Writing %04x to the PIC16C5x config register\n",data);
m_temp_config = data;
@@ -1005,7 +1005,7 @@ void pic16c5x_device::pic16c5x_update_watchdog(int counts)
if ((m_opcode.w.l != 3) && (m_opcode.w.l != 4))
{
- UINT16 old_WDT = m_WDT;
+ uint16_t old_WDT = m_WDT;
m_WDT -= counts;
@@ -1057,7 +1057,7 @@ void pic16c5x_device::pic16c5x_update_timer(int counts)
void pic16c5x_device::execute_run()
{
- UINT8 T0_in;
+ uint8_t T0_in;
update_internalram_ptr();
diff --git a/src/devices/cpu/pic16c5x/pic16c5x.h b/src/devices/cpu/pic16c5x/pic16c5x.h
index c3d2480fd86..0ff240d9f8e 100644
--- a/src/devices/cpu/pic16c5x/pic16c5x.h
+++ b/src/devices/cpu/pic16c5x/pic16c5x.h
@@ -64,7 +64,7 @@ class pic16c5x_device : public cpu_device
{
public:
// construction/destruction
- pic16c5x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int data_width, int picmodel);
+ pic16c5x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int data_width, int picmodel);
// static configuration helpers
template<class _Object> static devcb_base &set_read_a_callback(device_t &device, _Object object) { return downcast<pic16c5x_device &>(device).m_read_a.set_callback(object); }
@@ -82,10 +82,10 @@ public:
* during ROM programming, so should be called in the driver INIT, with
* the value if known (available in HEX dumps of the ROM).
*/
- void pic16c5x_set_config(UINT16 data);
+ void pic16c5x_set_config(uint16_t data);
// or with a macro
- static void set_config_static(device_t &device, UINT16 data) { downcast<pic16c5x_device &>(device).m_temp_config = data; }
+ static void set_config_static(device_t &device, uint16_t data) { downcast<pic16c5x_device &>(device).m_temp_config = data; }
protected:
// device-level overrides
@@ -100,12 +100,12 @@ protected:
* times. (Each instruction cycle passes through 4 machine states). This
* is handled by the cpu execution engine.
*/
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); }
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -120,38 +120,38 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
address_space_config m_data_config;
/******************** CPU Internal Registers *******************/
- UINT16 m_PC;
- UINT16 m_PREVPC; /* previous program counter */
- UINT8 m_W;
- UINT8 m_OPTION;
- UINT16 m_CONFIG;
- UINT8 m_ALU;
- UINT16 m_WDT;
- UINT8 m_TRISA;
- UINT8 m_TRISB;
- UINT8 m_TRISC;
- UINT16 m_STACK[2];
- UINT16 m_prescaler; /* Note: this is really an 8-bit register */
+ uint16_t m_PC;
+ uint16_t m_PREVPC; /* previous program counter */
+ uint8_t m_W;
+ uint8_t m_OPTION;
+ uint16_t m_CONFIG;
+ uint8_t m_ALU;
+ uint16_t m_WDT;
+ uint8_t m_TRISA;
+ uint8_t m_TRISB;
+ uint8_t m_TRISC;
+ uint16_t m_STACK[2];
+ uint16_t m_prescaler; /* Note: this is really an 8-bit register */
PAIR m_opcode;
- UINT8 *m_internalram;
+ uint8_t *m_internalram;
int m_icount;
int m_reset_vector;
int m_picmodel;
int m_delay_timer;
- UINT16 m_temp_config;
- UINT8 m_old_T0;
- INT8 m_old_data;
- UINT8 m_picRAMmask;
+ uint16_t m_temp_config;
+ uint8_t m_old_T0;
+ int8_t m_old_data;
+ uint8_t m_picRAMmask;
int m_inst_cycles;
address_space *m_program;
@@ -174,7 +174,7 @@ private:
typedef void (pic16c5x_device::*pic16c5x_ophandler)();
struct pic16c5x_opcode
{
- UINT8 cycles;
+ uint8_t cycles;
pic16c5x_ophandler function;
};
static const pic16c5x_opcode s_opcode_main[256];
@@ -186,11 +186,11 @@ private:
void CALCULATE_ADD_DIGITCARRY();
void CALCULATE_SUB_CARRY();
void CALCULATE_SUB_DIGITCARRY();
- UINT16 POP_STACK();
- void PUSH_STACK(UINT16 data);
- UINT8 GET_REGFILE(offs_t addr);
- void STORE_REGFILE(offs_t addr, UINT8 data);
- void STORE_RESULT(offs_t addr, UINT8 data);
+ uint16_t POP_STACK();
+ void PUSH_STACK(uint16_t data);
+ uint8_t GET_REGFILE(offs_t addr);
+ void STORE_REGFILE(offs_t addr, uint8_t data);
+ void STORE_RESULT(offs_t addr, uint8_t data);
void illegal();
void addwf();
void andwf();
@@ -237,7 +237,7 @@ class pic16c54_device : public pic16c5x_device
{
public:
// construction/destruction
- pic16c54_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c54_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -245,7 +245,7 @@ class pic16c55_device : public pic16c5x_device
{
public:
// construction/destruction
- pic16c55_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c55_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -253,7 +253,7 @@ class pic16c56_device : public pic16c5x_device
{
public:
// construction/destruction
- pic16c56_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c56_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -261,7 +261,7 @@ class pic16c57_device : public pic16c5x_device
{
public:
// construction/destruction
- pic16c57_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c57_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -269,7 +269,7 @@ class pic16c58_device : public pic16c5x_device
{
public:
// construction/destruction
- pic16c58_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c58_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
#endif /* __PIC16C5X_H__ */
diff --git a/src/devices/cpu/pic16c62x/16c62xdsm.cpp b/src/devices/cpu/pic16c62x/16c62xdsm.cpp
index bd1772f764b..580e7ea88c8 100644
--- a/src/devices/cpu/pic16c62x/16c62xdsm.cpp
+++ b/src/devices/cpu/pic16c62x/16c62xdsm.cpp
@@ -29,8 +29,8 @@
#include "emu.h"
#include <ctype.h>
-static const UINT8 *rombase;
-static const UINT8 *rambase;
+static const uint8_t *rombase;
+static const uint8_t *rambase;
static offs_t pcbase;
#define READOP16(A) (rombase[(A) - pcbase] | (rombase[(A) + 1 - pcbase] << 8))
#define READARG16(A) (rambase[(A) - pcbase] | (rambase[(A) + 1 - pcbase] << 8))
@@ -146,7 +146,7 @@ static void InitDasm16C5x(void)
fatalerror("not enough bits in encoding '%s %s' %d\n",
ops[0],ops[1],bit);
}
- while (isspace((UINT8)*p)) p++;
+ while (isspace((uint8_t)*p)) p++;
if (*p) Op[i].extcode = *p;
Op[i].bits = bits;
Op[i].mask = mask;
@@ -170,7 +170,7 @@ CPU_DISASSEMBLE( pic16c62x )
int bit;
//char *buffertmp;
const char *cp; /* character pointer in OpFormats */
- UINT32 flags = 0;
+ uint32_t flags = 0;
rombase = oprom;
rambase = opram;
diff --git a/src/devices/cpu/pic16c62x/pic16c62x.cpp b/src/devices/cpu/pic16c62x/pic16c62x.cpp
index baf29483185..a3b3c270690 100644
--- a/src/devices/cpu/pic16c62x/pic16c62x.cpp
+++ b/src/devices/cpu/pic16c62x/pic16c62x.cpp
@@ -113,7 +113,7 @@ static ADDRESS_MAP_START( pic16c62xa_ram, AS_DATA, 8, pic16c62x_device )
ADDRESS_MAP_END
-pic16c62x_device::pic16c62x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int picmodel)
+pic16c62x_device::pic16c62x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int picmodel)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, program_width, -1
, ( ( program_width == 9 ) ? ADDRESS_MAP_NAME(pic16c62x_rom_9) : ( ( program_width == 10 ) ? ADDRESS_MAP_NAME(pic16c62x_rom_10) : ADDRESS_MAP_NAME(pic16c62x_rom_11) )))
@@ -127,38 +127,38 @@ pic16c62x_device::pic16c62x_device(const machine_config &mconfig, device_type ty
}
-pic16c620_device::pic16c620_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c620_device::pic16c620_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c62x_device(mconfig, PIC16C620, "PIC16C620", tag, owner, clock, "pic16c620", 9, 0x16C620)
{
}
-pic16c620a_device::pic16c620a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c620a_device::pic16c620a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c62x_device(mconfig, PIC16C620A, "PIC16C620A", tag, owner, clock, "pic16c620a", 9, 0x16C620A)
{
}
-pic16c621_device::pic16c621_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c621_device::pic16c621_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c62x_device(mconfig, PIC16C621, "PIC16C621", tag, owner, clock, "pic16c621", 9, 0x16C621)
{
}
-pic16c621a_device::pic16c621a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c621a_device::pic16c621a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c62x_device(mconfig, PIC16C621A, "PIC16C621A", tag, owner, clock, "pic16c621a", 9, 0x16C621A)
{
}
-pic16c622_device::pic16c622_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c622_device::pic16c622_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c62x_device(mconfig, PIC16C622, "PIC16C622", tag, owner, clock, "pic16c622", 9, 0x16C622)
{
}
-pic16c622a_device::pic16c622a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pic16c622a_device::pic16c622a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pic16c62x_device(mconfig, PIC16C622A, "PIC16C622A", tag, owner, clock, "pic16c622a", 9, 0x16C622A)
{
}
-offs_t pic16c62x_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t pic16c62x_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( pic16c62x );
return CPU_DISASSEMBLE_NAME(pic16c62x)(this, buffer, pc, oprom, opram, options);
@@ -167,13 +167,13 @@ offs_t pic16c62x_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
void pic16c62x_device::update_internalram_ptr()
{
- m_internalram = (UINT8 *)m_data->get_write_ptr(0x00);
+ m_internalram = (uint8_t *)m_data->get_write_ptr(0x00);
}
#define PIC16C62x_RDOP(A) (m_direct->read_word((A)<<1))
-#define PIC16C62x_RAM_RDMEM(A) ((UINT8)m_data->read_byte(A))
+#define PIC16C62x_RAM_RDMEM(A) ((uint8_t)m_data->read_byte(A))
#define PIC16C62x_RAM_WRMEM(A,V) (m_data->write_byte(A,V))
-#define PIC16C62x_In(Port) ((UINT8)m_io->read_byte((Port)))
+#define PIC16C62x_In(Port) ((uint8_t)m_io->read_byte((Port)))
#define PIC16C62x_Out(Port,Value) (m_io->write_byte((Port),Value))
/************ Read the state of the T0 Clock input signal ************/
#define PIC16C62x_T0_In (m_io->read_byte(PIC16C62x_T0) >> 4)
@@ -255,7 +255,7 @@ void pic16c62x_device::update_internalram_ptr()
* Shortcuts
************************************************************************/
-#define CLR(flagreg, flag) ( flagreg &= (UINT8)(~flag) )
+#define CLR(flagreg, flag) ( flagreg &= (uint8_t)(~flag) )
#define SET(flagreg, flag) ( flagreg |= flag )
@@ -274,7 +274,7 @@ void pic16c62x_device::CALCULATE_Z_FLAG()
void pic16c62x_device::CALCULATE_ADD_CARRY()
{
- if ((UINT8)(m_old_data) > (UINT8)(m_ALU)) {
+ if ((uint8_t)(m_old_data) > (uint8_t)(m_ALU)) {
SET(STATUS, C_FLAG);
}
else {
@@ -284,7 +284,7 @@ void pic16c62x_device::CALCULATE_ADD_CARRY()
void pic16c62x_device::CALCULATE_ADD_DIGITCARRY()
{
- if (((UINT8)(m_old_data) & 0x0f) > ((UINT8)(m_ALU) & 0x0f)) {
+ if (((uint8_t)(m_old_data) & 0x0f) > ((uint8_t)(m_ALU) & 0x0f)) {
SET(STATUS, DC_FLAG);
}
else {
@@ -294,7 +294,7 @@ void pic16c62x_device::CALCULATE_ADD_DIGITCARRY()
void pic16c62x_device::CALCULATE_SUB_CARRY()
{
- if ((UINT8)(m_old_data) < (UINT8)(m_ALU)) {
+ if ((uint8_t)(m_old_data) < (uint8_t)(m_ALU)) {
CLR(STATUS, C_FLAG);
}
else {
@@ -304,7 +304,7 @@ void pic16c62x_device::CALCULATE_SUB_CARRY()
void pic16c62x_device::CALCULATE_SUB_DIGITCARRY()
{
- if (((UINT8)(m_old_data) & 0x0f) < ((UINT8)(m_ALU) & 0x0f)) {
+ if (((uint8_t)(m_old_data) & 0x0f) < ((uint8_t)(m_ALU) & 0x0f)) {
CLR(STATUS, DC_FLAG);
}
else {
@@ -313,9 +313,9 @@ void pic16c62x_device::CALCULATE_SUB_DIGITCARRY()
}
-UINT16 pic16c62x_device::POP_STACK()
+uint16_t pic16c62x_device::POP_STACK()
{
- UINT16 data = m_STACK[7];
+ uint16_t data = m_STACK[7];
m_STACK[7] = m_STACK[6];
m_STACK[6] = m_STACK[5];
m_STACK[5] = m_STACK[4];
@@ -325,7 +325,7 @@ UINT16 pic16c62x_device::POP_STACK()
m_STACK[1] = m_STACK[0];
return (data & ADDR_MASK);
}
-void pic16c62x_device::PUSH_STACK(UINT16 data)
+void pic16c62x_device::PUSH_STACK(uint16_t data)
{
m_STACK[0] = m_STACK[1];
m_STACK[1] = m_STACK[2];
@@ -339,9 +339,9 @@ void pic16c62x_device::PUSH_STACK(UINT16 data)
-UINT8 pic16c62x_device::GET_REGFILE(offs_t addr) /* Read from internal memory */
+uint8_t pic16c62x_device::GET_REGFILE(offs_t addr) /* Read from internal memory */
{
- UINT8 data;
+ uint8_t data;
if (addr == 0) { /* Indirect addressing */
addr = (FSR & m_picRAMmask);
@@ -362,16 +362,16 @@ UINT8 pic16c62x_device::GET_REGFILE(offs_t addr) /* Read from internal memory
data = M_RDRAM(addr & 0x7f);
break;
case 0x84:
- case 0x04: data = (FSR | (UINT8)(~m_picRAMmask));
+ case 0x04: data = (FSR | (uint8_t)(~m_picRAMmask));
break;
case 0x05: data = P_IN(0);
data &= m_TRISA;
- data |= ((UINT8)(~m_TRISA) & PORTA);
+ data |= ((uint8_t)(~m_TRISA) & PORTA);
data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
break;
case 0x06: data = P_IN(1);
data &= m_TRISB;
- data |= ((UINT8)(~m_TRISB) & PORTB);
+ data |= ((uint8_t)(~m_TRISB) & PORTB);
break;
case 0x8a:
case 0x0a: data = m_PCLATH;
@@ -388,7 +388,7 @@ UINT8 pic16c62x_device::GET_REGFILE(offs_t addr) /* Read from internal memory
return data;
}
-void pic16c62x_device::STORE_REGFILE(offs_t addr, UINT8 data) /* Write to internal memory */
+void pic16c62x_device::STORE_REGFILE(offs_t addr, uint8_t data) /* Write to internal memory */
{
if (addr == 0) { /* Indirect addressing */
addr = (FSR & m_picRAMmask);
@@ -408,15 +408,15 @@ void pic16c62x_device::STORE_REGFILE(offs_t addr, UINT8 data) /* Write to inte
m_PC = (m_PCLATH << 8) | data;
break;
case 0x83:
- case 0x03: STATUS &= (UINT8)(~(IRP_FLAG|RP1_FLAG|RP0_FLAG)); STATUS |= (data & (IRP_FLAG|RP1_FLAG|RP0_FLAG));
+ case 0x03: STATUS &= (uint8_t)(~(IRP_FLAG|RP1_FLAG|RP0_FLAG)); STATUS |= (data & (IRP_FLAG|RP1_FLAG|RP0_FLAG));
break;
case 0x84:
- case 0x04: FSR = (data | (UINT8)(~m_picRAMmask));
+ case 0x04: FSR = (data | (uint8_t)(~m_picRAMmask));
break;
case 0x05: data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
- P_OUT(0,data & (UINT8)(~m_TRISA)); PORTA = data;
+ P_OUT(0,data & (uint8_t)(~m_TRISA)); PORTA = data;
break;
- case 0x06: P_OUT(1,data & (UINT8)(~m_TRISB)); PORTB = data;
+ case 0x06: P_OUT(1,data & (uint8_t)(~m_TRISB)); PORTB = data;
break;
case 0x8a:
case 0x0a:
@@ -433,7 +433,7 @@ void pic16c62x_device::STORE_REGFILE(offs_t addr, UINT8 data) /* Write to inte
{
m_TRISA = data | 0xf0;
P_OUT(2,m_TRISA);
- P_OUT(0,PORTA & (UINT8)(~m_TRISA) & 0x0f);
+ P_OUT(0,PORTA & (uint8_t)(~m_TRISA) & 0x0f);
M_WRTRAM(addr, data);
}
break;
@@ -441,7 +441,7 @@ void pic16c62x_device::STORE_REGFILE(offs_t addr, UINT8 data) /* Write to inte
{
m_TRISB = data;
P_OUT(3,m_TRISB);
- P_OUT(1,PORTB & (UINT8)(~m_TRISB));
+ P_OUT(1,PORTB & (uint8_t)(~m_TRISB));
M_WRTRAM(addr, data);
}
break;
@@ -451,7 +451,7 @@ void pic16c62x_device::STORE_REGFILE(offs_t addr, UINT8 data) /* Write to inte
}
-void pic16c62x_device::STORE_RESULT(offs_t addr, UINT8 data)
+void pic16c62x_device::STORE_RESULT(offs_t addr, uint8_t data)
{
if (m_opcode.b.l & 0x80)
{
@@ -575,7 +575,7 @@ void pic16c62x_device::clrwdt()
void pic16c62x_device::comf()
{
- m_ALU = (UINT8)(~(GET_REGFILE(ADDR)));
+ m_ALU = (uint8_t)(~(GET_REGFILE(ADDR)));
STORE_RESULT(ADDR, m_ALU);
CALCULATE_Z_FLAG();
}
@@ -960,7 +960,7 @@ void pic16c62x_device::state_import(const device_state_entry &entry)
PORTB = m_debugger_temp;
break;
case PIC16C62x_FSR:
- FSR = ((m_debugger_temp & m_picRAMmask) | (UINT8)(~m_picRAMmask));
+ FSR = ((m_debugger_temp & m_picRAMmask) | (uint8_t)(~m_picRAMmask));
break;
case PIC16C62x_PSCL:
m_prescaler = m_debugger_temp;
@@ -985,7 +985,7 @@ void pic16c62x_device::state_export(const device_state_entry &entry)
m_debugger_temp = PORTB;
break;
case PIC16C62x_FSR:
- m_debugger_temp = ((FSR) & m_picRAMmask) | (UINT8)(~m_picRAMmask);
+ m_debugger_temp = ((FSR) & m_picRAMmask) | (uint8_t)(~m_picRAMmask);
break;
}
}
@@ -1027,7 +1027,7 @@ void pic16c62x_device::pic16c62x_reset_regs()
m_OPTION = 0xff;
STATUS = 0x18;
PCL = 0;
- FSR |= (UINT8)(~m_picRAMmask);
+ FSR |= (uint8_t)(~m_picRAMmask);
PORTA = 0;
m_prescaler = 0;
m_delay_timer = 0;
@@ -1067,7 +1067,7 @@ void pic16c62x_device::pic16c62x_update_watchdog(int counts)
if ((m_opcode.w.l != 0x64) && (m_opcode.w.l != 0x63))
{
- UINT16 old_WDT = m_WDT;
+ uint16_t old_WDT = m_WDT;
m_WDT -= counts;
@@ -1119,7 +1119,7 @@ void pic16c62x_device::pic16c62x_update_timer(int counts)
void pic16c62x_device::execute_run()
{
- UINT8 T0_in;
+ uint8_t T0_in;
update_internalram_ptr();
diff --git a/src/devices/cpu/pic16c62x/pic16c62x.h b/src/devices/cpu/pic16c62x/pic16c62x.h
index 7e8af51ca40..7321296cc9d 100644
--- a/src/devices/cpu/pic16c62x/pic16c62x.h
+++ b/src/devices/cpu/pic16c62x/pic16c62x.h
@@ -55,19 +55,19 @@ class pic16c62x_device : public cpu_device
{
public:
// construction/destruction
- pic16c62x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int program_width, int picmodel);
+ pic16c62x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int program_width, int picmodel);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); }
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -82,9 +82,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -92,29 +92,29 @@ private:
address_space_config m_io_config;
/******************** CPU Internal Registers *******************/
- UINT16 m_PC;
- UINT16 m_PREVPC; /* previous program counter */
- UINT8 m_W;
- UINT8 m_PCLATH; /* 0a,8a */
- UINT8 m_OPTION; /* 81 */
- UINT16 m_CONFIG;
- UINT8 m_ALU;
- UINT16 m_WDT;
- UINT8 m_TRISA; /* 85 */
- UINT8 m_TRISB; /* 86 */
- UINT16 m_STACK[8];
- UINT16 m_prescaler; /* Note: this is really an 8-bit register */
+ uint16_t m_PC;
+ uint16_t m_PREVPC; /* previous program counter */
+ uint8_t m_W;
+ uint8_t m_PCLATH; /* 0a,8a */
+ uint8_t m_OPTION; /* 81 */
+ uint16_t m_CONFIG;
+ uint8_t m_ALU;
+ uint16_t m_WDT;
+ uint8_t m_TRISA; /* 85 */
+ uint8_t m_TRISB; /* 86 */
+ uint16_t m_STACK[8];
+ uint16_t m_prescaler; /* Note: this is really an 8-bit register */
PAIR m_opcode;
- UINT8 *m_internalram;
+ uint8_t *m_internalram;
int m_icount;
int m_reset_vector;
int m_picmodel;
int m_delay_timer;
- UINT16 m_temp_config;
- UINT8 m_old_T0;
- INT8 m_old_data;
- UINT8 m_picRAMmask;
+ uint16_t m_temp_config;
+ uint8_t m_old_T0;
+ int8_t m_old_data;
+ uint8_t m_picRAMmask;
int m_inst_cycles;
address_space *m_program;
@@ -129,7 +129,7 @@ private:
typedef void (pic16c62x_device::*pic16c62x_ophandler)();
struct pic16c62x_opcode
{
- UINT8 cycles;
+ uint8_t cycles;
pic16c62x_ophandler function;
};
pic16c62x_opcode m_opcode_table[16384];
@@ -139,7 +139,7 @@ private:
{
char *format;
pic16c62x_ophandler function;
- UINT8 cycles;
+ uint8_t cycles;
};
static const pic16c62x_instruction s_instructiontable[];
@@ -149,11 +149,11 @@ private:
void CALCULATE_ADD_DIGITCARRY();
void CALCULATE_SUB_CARRY();
void CALCULATE_SUB_DIGITCARRY();
- UINT16 POP_STACK();
- void PUSH_STACK(UINT16 data);
- UINT8 GET_REGFILE(offs_t addr);
- void STORE_REGFILE(offs_t addr, UINT8 data);
- void STORE_RESULT(offs_t addr, UINT8 data);
+ uint16_t POP_STACK();
+ void PUSH_STACK(uint16_t data);
+ uint8_t GET_REGFILE(offs_t addr);
+ void STORE_REGFILE(offs_t addr, uint8_t data);
+ void STORE_RESULT(offs_t addr, uint8_t data);
void illegal();
void addwf();
void addlw();
@@ -206,14 +206,14 @@ class pic16c620_device : public pic16c62x_device
{
public:
// construction/destruction
- pic16c620_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c620_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class pic16c620a_device : public pic16c62x_device
{
public:
// construction/destruction
- pic16c620a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c620a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
/*
@@ -221,35 +221,35 @@ class pic16cr620a_device : public pic16c62x_device
{
public:
// construction/destruction
- pic16cr620a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16cr620a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
}*/
class pic16c621_device : public pic16c62x_device
{
public:
// construction/destruction
- pic16c621_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c621_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class pic16c621a_device : public pic16c62x_device
{
public:
// construction/destruction
- pic16c621a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c621a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class pic16c622_device : public pic16c62x_device
{
public:
// construction/destruction
- pic16c622_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c622_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class pic16c622a_device : public pic16c62x_device
{
public:
// construction/destruction
- pic16c622a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pic16c622a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/powerpc/ppc.h b/src/devices/cpu/powerpc/ppc.h
index 3ebb74d1227..0951dfb6b56 100644
--- a/src/devices/cpu/powerpc/ppc.h
+++ b/src/devices/cpu/powerpc/ppc.h
@@ -211,15 +211,15 @@ protected:
public:
// construction/destruction
- ppc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int address_bits, int data_bits, powerpc_flavor flavor, UINT32 cap, UINT32 tb_divisor, address_map_constructor internal_map);
+ ppc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int address_bits, int data_bits, powerpc_flavor flavor, uint32_t cap, uint32_t tb_divisor, address_map_constructor internal_map);
- static void set_bus_frequency(device_t &device, UINT32 bus_frequency) { downcast<ppc_device &>(device).c_bus_frequency = bus_frequency; }
+ static void set_bus_frequency(device_t &device, uint32_t bus_frequency) { downcast<ppc_device &>(device).c_bus_frequency = bus_frequency; }
void ppc_set_dcstore_callback(write32_delegate callback);
- void ppcdrc_set_options(UINT32 options);
- void ppcdrc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base);
- void ppcdrc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles);
+ void ppcdrc_set_options(uint32_t options);
+ void ppcdrc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base);
+ void ppcdrc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles);
TIMER_CALLBACK_MEMBER(decrementer_int_callback);
TIMER_CALLBACK_MEMBER(ppc4xx_buffered_dma_callback);
@@ -251,9 +251,9 @@ protected:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 40; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 40; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -267,9 +267,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
/* exception types */
enum
@@ -295,36 +295,36 @@ protected:
address_space_config m_program_config;
address_space *m_program;
- UINT32 c_bus_frequency;
+ uint32_t c_bus_frequency;
struct internal_ppc_state
{
- UINT32 pc;
- UINT32 r[32];
+ uint32_t pc;
+ uint32_t r[32];
double f[32];
- UINT32 cr[8];
- UINT32 fpscr;
- UINT32 msr;
- UINT32 xerso;
- UINT32 sr[16];
- UINT32 spr[1024];
+ uint32_t cr[8];
+ uint32_t fpscr;
+ uint32_t msr;
+ uint32_t xerso;
+ uint32_t sr[16];
+ uint32_t spr[1024];
int icount;
- UINT32 mode; /* current global mode */
- UINT32 irq_pending;
+ uint32_t mode; /* current global mode */
+ uint32_t irq_pending;
/* parameters for calls */
- UINT32 param0;
- UINT32 param1;
+ uint32_t param0;
+ uint32_t param1;
/* PowerPC 603-specific state */
- UINT32 mmu603_cmp;
- UINT32 mmu603_hash[2];
- UINT32 mmu603_r[4];
+ uint32_t mmu603_cmp;
+ uint32_t mmu603_hash[2];
+ uint32_t mmu603_r[4];
/* parameters for subroutines */
- UINT32 tempaddr; /* temporary address storage */
+ uint32_t tempaddr; /* temporary address storage */
drcuml_ireg tempdata; /* temporary data storage */
- UINT32 updateaddr; /* update address storage */
- UINT32 swcount; /* counter for sw instructions */
+ uint32_t updateaddr; /* update address storage */
+ uint32_t swcount; /* counter for sw instructions */
const char * format; /* format string for printing */
- UINT32 arg0; /* print_debug argument 1 */
+ uint32_t arg0; /* print_debug argument 1 */
double fp0; /* floating point 0 */
};
@@ -335,82 +335,82 @@ protected:
int m_ppc_dec_trigger_cycle;
int m_bus_freq_multiplier;
- UINT32 m_npc;
- UINT32 m_dcr[256];
-
- UINT32 m_lr;
- UINT32 m_ctr;
- UINT32 m_xer;
- UINT32 m_pvr;
- UINT32 m_srr0;
- UINT32 m_srr1;
- UINT32 m_srr2;
- UINT32 m_srr3;
- UINT32 m_hid0;
- UINT32 m_hid1;
- UINT32 m_hid2;
- UINT32 m_sdr1;
- UINT32 m_sprg[4];
-
- UINT32 m_dsisr;
- UINT32 m_dar;
- UINT32 m_ear;
- UINT32 m_dmiss;
- UINT32 m_dcmp;
- UINT32 m_hash1;
- UINT32 m_hash2;
- UINT32 m_imiss;
- UINT32 m_icmp;
- UINT32 m_rpa;
+ uint32_t m_npc;
+ uint32_t m_dcr[256];
+
+ uint32_t m_lr;
+ uint32_t m_ctr;
+ uint32_t m_xer;
+ uint32_t m_pvr;
+ uint32_t m_srr0;
+ uint32_t m_srr1;
+ uint32_t m_srr2;
+ uint32_t m_srr3;
+ uint32_t m_hid0;
+ uint32_t m_hid1;
+ uint32_t m_hid2;
+ uint32_t m_sdr1;
+ uint32_t m_sprg[4];
+
+ uint32_t m_dsisr;
+ uint32_t m_dar;
+ uint32_t m_ear;
+ uint32_t m_dmiss;
+ uint32_t m_dcmp;
+ uint32_t m_hash1;
+ uint32_t m_hash2;
+ uint32_t m_imiss;
+ uint32_t m_icmp;
+ uint32_t m_rpa;
struct BATENT {
- UINT32 u;
- UINT32 l;
+ uint32_t u;
+ uint32_t l;
};
BATENT m_ibat[4];
BATENT m_dbat[4];
- UINT32 m_evpr;
- UINT32 m_exier;
- UINT32 m_exisr;
- UINT32 m_bear;
- UINT32 m_besr;
- UINT32 m_iocr;
- UINT32 m_br[8];
- UINT32 m_iabr;
- UINT32 m_esr;
- UINT32 m_iccr;
- UINT32 m_dccr;
- UINT32 m_pit;
- UINT32 m_pit_counter;
- UINT32 m_pit_int_enable;
- UINT32 m_tsr;
- UINT32 m_dbsr;
- UINT32 m_sgr;
- UINT32 m_pid;
- UINT32 m_pbl1;
- UINT32 m_pbl2;
- UINT32 m_pbu1;
- UINT32 m_pbu2;
- UINT32 m_fit_bit;
- UINT32 m_fit_int_enable;
- UINT32 m_wdt_bit;
- UINT32 m_wdt_int_enable;
- UINT32 m_dac1;
- UINT32 m_dac2;
- UINT32 m_iac1;
- UINT32 m_iac2;
+ uint32_t m_evpr;
+ uint32_t m_exier;
+ uint32_t m_exisr;
+ uint32_t m_bear;
+ uint32_t m_besr;
+ uint32_t m_iocr;
+ uint32_t m_br[8];
+ uint32_t m_iabr;
+ uint32_t m_esr;
+ uint32_t m_iccr;
+ uint32_t m_dccr;
+ uint32_t m_pit;
+ uint32_t m_pit_counter;
+ uint32_t m_pit_int_enable;
+ uint32_t m_tsr;
+ uint32_t m_dbsr;
+ uint32_t m_sgr;
+ uint32_t m_pid;
+ uint32_t m_pbl1;
+ uint32_t m_pbl2;
+ uint32_t m_pbu1;
+ uint32_t m_pbu2;
+ uint32_t m_fit_bit;
+ uint32_t m_fit_int_enable;
+ uint32_t m_wdt_bit;
+ uint32_t m_wdt_int_enable;
+ uint32_t m_dac1;
+ uint32_t m_dac2;
+ uint32_t m_iac1;
+ uint32_t m_iac2;
struct SPU_REGS {
- UINT8 spls;
- UINT8 sphs;
- UINT16 brd;
- UINT8 spctl;
- UINT8 sprc;
- UINT8 sptc;
- UINT8 sprb;
- UINT8 sptb;
+ uint8_t spls;
+ uint8_t sphs;
+ uint16_t brd;
+ uint8_t spctl;
+ uint8_t sprc;
+ uint8_t sptc;
+ uint8_t sprb;
+ uint8_t sptb;
emu_timer *rx_timer;
emu_timer *tx_timer;
};
@@ -418,33 +418,33 @@ protected:
SPU_REGS m_spu_old;
struct DMA_REGS {
- UINT32 cr;
- UINT32 da;
- UINT32 sa;
- UINT32 ct;
- UINT32 cc;
+ uint32_t cr;
+ uint32_t da;
+ uint32_t sa;
+ uint32_t ct;
+ uint32_t cc;
};
DMA_REGS m_dma[4];
- UINT32 m_dmasr;
+ uint32_t m_dmasr;
int m_reserved;
- UINT32 m_reserved_address;
+ uint32_t m_reserved_address;
int m_interrupt_pending;
- UINT64 m_tb; /* 56-bit timebase register */
+ uint64_t m_tb; /* 56-bit timebase register */
// STUFF added for the 6xx series
- UINT32 m_dec, m_dec_frac;
+ uint32_t m_dec, m_dec_frac;
union FPR {
- UINT64 id;
+ uint64_t id;
double fd;
};
union FPR32 {
- UINT32 i;
+ uint32_t i;
float f;
};
@@ -454,30 +454,30 @@ protected:
int m_is602;
/* PowerPC 602 specific registers */
- UINT32 m_lt;
- UINT32 m_sp;
- UINT32 m_tcr;
- UINT32 m_ibr;
- UINT32 m_esasrr;
- UINT32 m_sebr;
- UINT32 m_ser;
+ uint32_t m_lt;
+ uint32_t m_sp;
+ uint32_t m_tcr;
+ uint32_t m_ibr;
+ uint32_t m_esasrr;
+ uint32_t m_sebr;
+ uint32_t m_ser;
/* architectural distinctions */
powerpc_flavor m_flavor;
- UINT32 m_cap;
- UINT8 m_cache_line_size;
- UINT32 m_tb_divisor;
+ uint32_t m_cap;
+ uint8_t m_cache_line_size;
+ uint32_t m_tb_divisor;
/* PowerPC 4xx-specific state */
/* PowerPC 4XX-specific serial port state */
struct ppc4xx_spu_state
{
- UINT8 regs[9];
- UINT8 txbuf;
- UINT8 rxbuf;
+ uint8_t regs[9];
+ uint8_t txbuf;
+ uint8_t rxbuf;
emu_timer * timer;
- UINT8 rxbuffer[256];
- UINT32 rxin, rxout;
+ uint8_t rxbuffer[256];
+ uint32_t rxin, rxout;
write8_delegate tx_cb;
};
@@ -485,18 +485,18 @@ protected:
emu_timer * m_fit_timer;
emu_timer * m_pit_timer;
emu_timer * m_wdog_timer;
- UINT32 m_pit_reload;
- UINT32 m_irqstate;
+ uint32_t m_pit_reload;
+ uint32_t m_irqstate;
emu_timer * m_buffered_dma_timer[4];
int m_buffered_dma_rate[4];
/* internal stuff */
direct_read_data *m_direct;
offs_t m_codexor;
- UINT32 m_system_clock;
- UINT32 m_cpu_clock;
- UINT64 m_tb_zero_cycles;
- UINT64 m_dec_zero_cycles;
+ uint32_t m_system_clock;
+ uint32_t m_cpu_clock;
+ uint64_t m_tb_zero_cycles;
+ uint64_t m_dec_zero_cycles;
emu_timer * m_decrementer_int_timer;
read32_delegate m_dcr_read_func;
@@ -511,45 +511,45 @@ protected:
#ifdef PPC_H_INCLUDED_FROM_PPC_C
jmp_buf m_exception_jmpbuf;
#endif
- UINT8 (*m_ppcread8)(address_space &space, offs_t address);
- UINT16 (*m_ppcread16)(address_space &space, offs_t address);
- UINT32 (*m_ppcread32)(address_space &space, offs_t address);
- UINT64 (*m_ppcread64)(address_space &space, offs_t address);
- void (*m_ppcwrite8)(address_space &space, offs_t address, UINT8 data);
- void (*m_ppcwrite16)(address_space &space, offs_t address, UINT16 data);
- void (*m_ppcwrite32)(address_space &space, offs_t address, UINT32 data);
- void (*m_ppcwrite64)(address_space &space, offs_t address, UINT64 data);
- UINT16 (*m_ppcread16_unaligned)(address_space &space, offs_t address);
- UINT32 (*m_ppcread32_unaligned)(address_space &space, offs_t address);
- UINT64 (*m_ppcread64_unaligned)(address_space &space, offs_t address);
- void (*m_ppcwrite16_unaligned)(address_space &space, offs_t address, UINT16 data);
- void (*m_ppcwrite32_unaligned)(address_space &space, offs_t address, UINT32 data);
- void (*m_ppcwrite64_unaligned)(address_space &space, offs_t address, UINT64 data);
-
- void (*m_optable19[1024])(UINT32);
- void (*m_optable31[1024])(UINT32);
- void (*m_optable59[1024])(UINT32);
- void (*m_optable63[1024])(UINT32);
- void (*m_optable[64])(UINT32);
+ uint8_t (*m_ppcread8)(address_space &space, offs_t address);
+ uint16_t (*m_ppcread16)(address_space &space, offs_t address);
+ uint32_t (*m_ppcread32)(address_space &space, offs_t address);
+ uint64_t (*m_ppcread64)(address_space &space, offs_t address);
+ void (*m_ppcwrite8)(address_space &space, offs_t address, uint8_t data);
+ void (*m_ppcwrite16)(address_space &space, offs_t address, uint16_t data);
+ void (*m_ppcwrite32)(address_space &space, offs_t address, uint32_t data);
+ void (*m_ppcwrite64)(address_space &space, offs_t address, uint64_t data);
+ uint16_t (*m_ppcread16_unaligned)(address_space &space, offs_t address);
+ uint32_t (*m_ppcread32_unaligned)(address_space &space, offs_t address);
+ uint64_t (*m_ppcread64_unaligned)(address_space &space, offs_t address);
+ void (*m_ppcwrite16_unaligned)(address_space &space, offs_t address, uint16_t data);
+ void (*m_ppcwrite32_unaligned)(address_space &space, offs_t address, uint32_t data);
+ void (*m_ppcwrite64_unaligned)(address_space &space, offs_t address, uint64_t data);
+
+ void (*m_optable19[1024])(uint32_t);
+ void (*m_optable31[1024])(uint32_t);
+ void (*m_optable59[1024])(uint32_t);
+ void (*m_optable63[1024])(uint32_t);
+ void (*m_optable[64])(uint32_t);
/* core state */
drc_cache m_cache; /* pointer to the DRC code cache */
std::unique_ptr<drcuml_state> m_drcuml; /* DRC UML generator state */
std::unique_ptr<ppc_frontend> m_drcfe; /* pointer to the DRC front-end state */
- UINT32 m_drcoptions; /* configurable DRC options */
+ uint32_t m_drcoptions; /* configurable DRC options */
/* parameters for subroutines */
- UINT32 m_arg1; /* print_debug argument 2 */
+ uint32_t m_arg1; /* print_debug argument 2 */
/* tables */
- UINT8 m_fpmode[4]; /* FPU mode table */
- UINT8 m_sz_cr_table[32]; /* SZ CR table */
- UINT8 m_cmp_cr_table[32]; /* CMP CR table */
- UINT8 m_cmpl_cr_table[32]; /* CMPL CR table */
- UINT8 m_fcmp_cr_table[32]; /* FCMP CR table */
+ uint8_t m_fpmode[4]; /* FPU mode table */
+ uint8_t m_sz_cr_table[32]; /* SZ CR table */
+ uint8_t m_cmp_cr_table[32]; /* CMP CR table */
+ uint8_t m_cmpl_cr_table[32]; /* CMPL CR table */
+ uint8_t m_fcmp_cr_table[32]; /* FCMP CR table */
/* internal stuff */
- UINT8 m_cache_dirty; /* true if we need to flush the cache */
+ uint8_t m_cache_dirty; /* true if we need to flush the cache */
/* register mappings */
uml::parameter m_regmap[32]; /* parameter to register mappings for all 32 integer registers */
@@ -588,11 +588,11 @@ protected:
{
offs_t start; /* start of the RAM block */
offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
+ uint8_t readonly; /* TRUE if read-only */
void * base; /* base in memory where the RAM lives */
};
- UINT32 m_fastram_select;
+ uint32_t m_fastram_select;
fast_ram_info m_fastram[PPC_MAX_FASTRAM];
/* hotspots */
@@ -600,57 +600,57 @@ protected:
struct hotspot_info
{
offs_t pc; /* PC to consider */
- UINT32 opcode; /* required opcode at that PC */
- UINT32 cycles; /* number of cycles to eat when hit */
+ uint32_t opcode; /* required opcode at that PC */
+ uint32_t cycles; /* number of cycles to eat when hit */
};
- UINT32 m_hotspot_select;
+ uint32_t m_hotspot_select;
hotspot_info m_hotspot[PPC_MAX_HOTSPOTS];
- UINT64 m_debugger_temp;
+ uint64_t m_debugger_temp;
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- UINT8 checksoftints; /* need to check software interrupts before next instruction */
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
+ uint8_t checksoftints; /* need to check software interrupts before next instruction */
uml::code_label labelnum; /* index for local labels */
};
- UINT32 get_cr();
- void set_cr(UINT32 value);
- UINT32 get_xer();
- void set_xer(UINT32 value);
- UINT64 get_timebase();
- void set_timebase(UINT64 newtb);
- UINT32 get_decrementer();
- void set_decrementer(UINT32 newdec);
- UINT32 ppccom_translate_address_internal(int intention, offs_t &address);
- void ppc4xx_set_irq_line(UINT32 bitmask, int state);
- int ppc4xx_get_irq_line(UINT32 bitmask);
+ uint32_t get_cr();
+ void set_cr(uint32_t value);
+ uint32_t get_xer();
+ void set_xer(uint32_t value);
+ uint64_t get_timebase();
+ void set_timebase(uint64_t newtb);
+ uint32_t get_decrementer();
+ void set_decrementer(uint32_t newdec);
+ uint32_t ppccom_translate_address_internal(int intention, offs_t &address);
+ void ppc4xx_set_irq_line(uint32_t bitmask, int state);
+ int ppc4xx_get_irq_line(uint32_t bitmask);
void ppc4xx_dma_update_irq_states();
int ppc4xx_dma_decrement_count(int dmachan);
- int ppc4xx_dma_fetch_transmit_byte(int dmachan, UINT8 *byte);
- int ppc4xx_dma_handle_receive_byte(int dmachan, UINT8 byte);
+ int ppc4xx_dma_fetch_transmit_byte(int dmachan, uint8_t *byte);
+ int ppc4xx_dma_handle_receive_byte(int dmachan, uint8_t byte);
void ppc4xx_dma_exec(int dmachan);
void ppc4xx_spu_update_irq_states();
- void ppc4xx_spu_rx_data(UINT8 data);
+ void ppc4xx_spu_rx_data(uint8_t data);
void ppc4xx_spu_timer_reset();
void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name);
void load_fast_iregs(drcuml_block *block);
void save_fast_iregs(drcuml_block *block);
void load_fast_fregs(drcuml_block *block);
void save_fast_fregs(drcuml_block *block);
- UINT32 compute_rlw_mask(UINT8 mb, UINT8 me);
- UINT32 compute_crf_mask(UINT8 crm);
- UINT32 compute_spr(UINT32 spr);
+ uint32_t compute_rlw_mask(uint8_t mb, uint8_t me);
+ uint32_t compute_crf_mask(uint8_t crm);
+ uint32_t compute_spr(uint32_t spr);
void code_flush_cache();
- void code_compile_block(UINT8 mode, offs_t pc);
+ void code_compile_block(uint8_t mode, offs_t pc);
void static_generate_entry_point();
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_tlb_mismatch();
- void static_generate_exception(UINT8 exception, int recover, const char *name);
+ void static_generate_exception(uint8_t exception, int recover, const char *name);
void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle *&handleptr, uml::code_handle *masked);
void static_generate_swap_tgpr();
void static_generate_lsw_entries(int mode);
@@ -659,19 +659,19 @@ protected:
void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, int allow_exception);
void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_compute_flags(drcuml_block *block, const opcode_desc *desc, int updatecr, UINT32 xermask, int invertcarry);
- void generate_shift_flags(drcuml_block *block, const opcode_desc *desc, UINT32 op);
+ void generate_compute_flags(drcuml_block *block, const opcode_desc *desc, int updatecr, uint32_t xermask, int invertcarry);
+ void generate_shift_flags(drcuml_block *block, const opcode_desc *desc, uint32_t op);
void generate_fp_flags(drcuml_block *block, const opcode_desc *desc, int updatefprf);
- void generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int source, UINT8 link);
- void generate_branch_bo(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 bo, UINT32 bi, int source, int link);
+ void generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int source, uint8_t link);
+ void generate_branch_bo(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t bo, uint32_t bi, int source, int link);
int generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_instruction_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_instruction_1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_instruction_3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_instruction_3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op);
- const char *log_desc_flags_to_string(UINT32 flags);
- void log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist);
+ void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
+ const char *log_desc_flags_to_string(uint32_t flags);
+ void log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent);
};
@@ -680,79 +680,79 @@ protected:
//class ppc403_device : public ppc_device
//{
//public:
-// ppc403_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+// ppc403_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
//
//protected:
-// virtual UINT32 execute_input_lines() const { return 8; }
+// virtual uint32_t execute_input_lines() const { return 8; }
//};
//
//
//class ppc405_device : public ppc_device
//{
//public:
-// ppc405_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+// ppc405_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
//
//protected:
-// virtual UINT32 execute_input_lines() const { return 8; }
+// virtual uint32_t execute_input_lines() const { return 8; }
//};
class ppc603_device : public ppc_device
{
public:
- ppc603_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc603_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class ppc603e_device : public ppc_device
{
public:
- ppc603e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc603e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class ppc603r_device : public ppc_device
{
public:
- ppc603r_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc603r_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class ppc602_device : public ppc_device
{
public:
- ppc602_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc602_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class mpc8240_device : public ppc_device
{
public:
- mpc8240_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mpc8240_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class ppc601_device : public ppc_device
{
public:
- ppc601_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc601_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class ppc604_device : public ppc_device
{
public:
- ppc604_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc604_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class ppc4xx_device : public ppc_device
{
public:
- ppc4xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, powerpc_flavor flavor, UINT32 cap, UINT32 tb_divisor);
+ ppc4xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, powerpc_flavor flavor, uint32_t cap, uint32_t tb_divisor);
void ppc4xx_spu_set_tx_handler(write8_delegate callback);
- void ppc4xx_spu_receive_byte(UINT8 byteval);
+ void ppc4xx_spu_receive_byte(uint8_t byteval);
void ppc4xx_set_dma_read_handler(int channel, read32_delegate callback, int rate);
void ppc4xx_set_dma_write_handler(int channel, write32_delegate callback, int rate);
@@ -763,7 +763,7 @@ public:
DECLARE_WRITE8_MEMBER( ppc4xx_spu_w );
protected:
- virtual UINT32 execute_input_lines() const override { return 5; }
+ virtual uint32_t execute_input_lines() const override { return 5; }
virtual void execute_set_input(int inputnum, int state) override;
};
@@ -771,21 +771,21 @@ protected:
class ppc403ga_device : public ppc4xx_device
{
public:
- ppc403ga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc403ga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class ppc403gcx_device : public ppc4xx_device
{
public:
- ppc403gcx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc403gcx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class ppc405gp_device : public ppc4xx_device
{
public:
- ppc405gp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ppc405gp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/powerpc/ppc_dasm.cpp b/src/devices/cpu/powerpc/ppc_dasm.cpp
index 25a79140193..28d8b5ce480 100644
--- a/src/devices/cpu/powerpc/ppc_dasm.cpp
+++ b/src/devices/cpu/powerpc/ppc_dasm.cpp
@@ -107,8 +107,8 @@ enum
struct IDESCR
{
char mnem[32]; // mnemonic
- UINT32 match; // bit pattern of instruction after it has been masked
- UINT32 mask; // mask of variable fields (AND with ~mask to compare w/
+ uint32_t match; // bit pattern of instruction after it has been masked
+ uint32_t mask; // mask of variable fields (AND with ~mask to compare w/
// bit pattern to determine a match)
int format; // operand format
int flags; // flags
@@ -529,13 +529,13 @@ static void DCR(char *dest, int dcr_field)
* unsigned 16-bit integer.
*/
-static void DecodeSigned16(char *outbuf, UINT32 op, int do_unsigned)
+static void DecodeSigned16(char *outbuf, uint32_t op, int do_unsigned)
{
- INT16 s;
+ int16_t s;
s = G_SIMM(op);
if (do_unsigned) // sign extend to unsigned 32-bits
- sprintf(outbuf, "0x%04X", (UINT32) s);
+ sprintf(outbuf, "0x%04X", (uint32_t) s);
else // print as signed 16 bits
{
if (s < 0)
@@ -554,9 +554,9 @@ static void DecodeSigned16(char *outbuf, UINT32 op, int do_unsigned)
* Generate a mask from bit MB through ME (PPC-style backwards bit numbering.)
*/
-static UINT32 Mask(int mb, int me)
+static uint32_t Mask(int mb, int me)
{
- UINT32 i, mask;
+ uint32_t i, mask;
mb &= 31;
me &= 31;
@@ -582,7 +582,7 @@ static UINT32 Mask(int mb, int me)
*/
#if 0
-static int Check(UINT32 op, int flags)
+static int Check(uint32_t op, int flags)
{
int nb, rt, ra;
@@ -644,9 +644,9 @@ static int Check(UINT32 op, int flags)
* otherwise 0 to indicate disassembly should carry on as normal.
*/
-static int Simplified(UINT32 op, UINT32 vpc, char *signed16, char *mnem, char *oprs)
+static int Simplified(uint32_t op, uint32_t vpc, char *signed16, char *mnem, char *oprs)
{
- UINT32 value, disp;
+ uint32_t value, disp;
value = G_SIMM(op); // value is fully sign-extended SIMM field
if (value & 0x8000)
@@ -835,10 +835,10 @@ static int Simplified(UINT32 op, UINT32 vpc, char *signed16, char *mnem, char *o
return 1;
}
-offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
+offs_t ppc_dasm_one(char *buffer, uint32_t pc, uint32_t op)
{
char signed16[12];
- UINT32 disp;
+ uint32_t disp;
int i,j;
char mnem[200];
char oprs[200];
@@ -1022,7 +1022,7 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
if (G_RA(op))
sprintf(oprs, "r%d,%s(r%d)", G_RT(op), signed16, G_RA(op));
else
- sprintf(oprs, "r%d,0x%08X", G_RT(op), (UINT32) ((INT16) G_D(op)));
+ sprintf(oprs, "r%d,0x%08X", G_RT(op), (uint32_t) ((int16_t) G_D(op)));
break;
case F_RT_D_RA:
@@ -1033,7 +1033,7 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
if (G_RA(op))
sprintf(oprs, "f%d,%s(r%d)", G_RT(op), signed16, G_RA(op));
else
- sprintf(oprs, "f%d,0x%08X", G_RT(op), (UINT32) ((INT16) G_D(op)));
+ sprintf(oprs, "f%d,0x%08X", G_RT(op), (uint32_t) ((int16_t) G_D(op)));
break;
case F_FRT_D_RA:
@@ -1171,7 +1171,7 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
CPU_DISASSEMBLE( powerpc )
{
- UINT32 op = *(UINT32 *)oprom;
+ uint32_t op = *(uint32_t *)oprom;
op = big_endianize_int32(op);
return ppc_dasm_one(buffer, pc, op);
}
diff --git a/src/devices/cpu/powerpc/ppccom.cpp b/src/devices/cpu/powerpc/ppccom.cpp
index 42ba5708713..206535148ca 100644
--- a/src/devices/cpu/powerpc/ppccom.cpp
+++ b/src/devices/cpu/powerpc/ppccom.cpp
@@ -38,7 +38,7 @@
***************************************************************************/
/* lookup table for FP modes */
-static const UINT8 fpmode_source[4] =
+static const uint8_t fpmode_source[4] =
{
uml::ROUND_ROUND,
uml::ROUND_TRUNC,
@@ -47,7 +47,7 @@ static const UINT8 fpmode_source[4] =
};
/* flag lookup table for SZ */
-static const UINT8 sz_cr_table_source[32] =
+static const uint8_t sz_cr_table_source[32] =
{
/* ..... */ 0x4,
/* ....C */ 0x4,
@@ -84,7 +84,7 @@ static const UINT8 sz_cr_table_source[32] =
};
/* flag lookup table for CMP */
-static const UINT8 cmp_cr_table_source[32] =
+static const uint8_t cmp_cr_table_source[32] =
{
/* ..... */ 0x4,
/* ....C */ 0x4,
@@ -121,7 +121,7 @@ static const UINT8 cmp_cr_table_source[32] =
};
/* flag lookup table for CMPL */
-static const UINT8 cmpl_cr_table_source[32] =
+static const uint8_t cmpl_cr_table_source[32] =
{
/* ..... */ 0x4,
/* ....C */ 0x8,
@@ -158,7 +158,7 @@ static const UINT8 cmpl_cr_table_source[32] =
};
/* flag lookup table for FCMP */
-static const UINT8 fcmp_cr_table_source[32] =
+static const uint8_t fcmp_cr_table_source[32] =
{
/* ..... */ 0x4,
/* ....C */ 0x8,
@@ -207,7 +207,7 @@ const device_type PPC403GCX = &device_creator<ppc403gcx_device>;
const device_type PPC405GP = &device_creator<ppc405gp_device>;
-ppc_device::ppc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, int address_bits, int data_bits, powerpc_flavor flavor, UINT32 cap, UINT32 tb_divisor, address_map_constructor internal_map)
+ppc_device::ppc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, int address_bits, int data_bits, powerpc_flavor flavor, uint32_t cap, uint32_t tb_divisor, address_map_constructor internal_map)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, device_vtlb_interface(mconfig, *this, AS_PROGRAM)
, m_program_config("program", ENDIANNESS_BIG, data_bits, address_bits, 0, internal_map)
@@ -231,47 +231,47 @@ ppc_device::ppc_device(const machine_config &mconfig, device_type type, const ch
set_vtlb_fixed_entries(PPC603_FIXED_TLB_ENTRIES);
}
-//ppc403_device::ppc403_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+//ppc403_device::ppc403_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
// : ppc_device(mconfig, PPC403, "PPC403", tag, owner, clock, "ppc403", 32?, 64?)
//{
//}
//
-//ppc405_device::ppc405_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+//ppc405_device::ppc405_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
// : ppc_device(mconfig, PPC405, "PPC405", tag, owner, clock, "ppc405", 32?, 64?)
//{
//}
-ppc603_device::ppc603_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc603_device::ppc603_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc_device(mconfig, PPC603, "PowerPC 603", tag, owner, clock, "ppc603", 32, 64, PPC_MODEL_603, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, nullptr)
{
}
-ppc603e_device::ppc603e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc603e_device::ppc603e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc_device(mconfig, PPC603E, "PowerPC 603e", tag, owner, clock, "ppc603e", 32, 64, PPC_MODEL_603E, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, nullptr)
{
}
-ppc603r_device::ppc603r_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc603r_device::ppc603r_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc_device(mconfig, PPC603R, "PowerPC 603R", tag, owner, clock, "ppc603r", 32, 64, PPC_MODEL_603R, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, nullptr)
{
}
-ppc602_device::ppc602_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc602_device::ppc602_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc_device(mconfig, PPC602, "PowerPC 602", tag, owner, clock, "ppc602", 32, 64, PPC_MODEL_602, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4, nullptr)
{
}
-mpc8240_device::mpc8240_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mpc8240_device::mpc8240_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc_device(mconfig, MPC8240, "PowerPC MPC8240", tag, owner, clock, "mpc8240", 32, 64, PPC_MODEL_MPC8240, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_603_MMU, 4/* unknown */, nullptr)
{
}
-ppc601_device::ppc601_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc601_device::ppc601_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc_device(mconfig, PPC601, "PowerPC 601", tag, owner, clock, "ppc601", 32, 64, PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_MFIOC | PPCCAP_601BAT, 0/* no TB */, nullptr)
{
}
-ppc604_device::ppc604_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc604_device::ppc604_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc_device(mconfig, PPC604, "PowerPC 604", tag, owner, clock, "ppc604", 32, 64, PPC_MODEL_604, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_604_MMU, 4, nullptr)
{
}
@@ -280,22 +280,22 @@ static ADDRESS_MAP_START( internal_ppc4xx, AS_PROGRAM, 32, ppc4xx_device )
AM_RANGE(0x40000000, 0x4000000f) AM_READWRITE8(ppc4xx_spu_r, ppc4xx_spu_w, 0xffffffff)
ADDRESS_MAP_END
-ppc4xx_device::ppc4xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, powerpc_flavor flavor, UINT32 cap, UINT32 tb_divisor)
+ppc4xx_device::ppc4xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, powerpc_flavor flavor, uint32_t cap, uint32_t tb_divisor)
: ppc_device(mconfig, type, name, tag, owner, clock, shortname, 31, 32, flavor, cap, tb_divisor, ADDRESS_MAP_NAME(internal_ppc4xx))
{
}
-ppc403ga_device::ppc403ga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc403ga_device::ppc403ga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc4xx_device(mconfig, PPC403GA, "PowerPC 403GA", tag, owner, clock, "ppc403ga", PPC_MODEL_403GA, PPCCAP_4XX, 1)
{
}
-ppc403gcx_device::ppc403gcx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc403gcx_device::ppc403gcx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc4xx_device(mconfig, PPC403GCX, "PowerPC 403GCX", tag, owner, clock, "ppc403gcx", PPC_MODEL_403GCX, PPCCAP_4XX, 1)
{
}
-ppc405gp_device::ppc405gp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ppc405gp_device::ppc405gp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc4xx_device(mconfig, PPC405GP, "PowerPC 405GP", tag, owner, clock, "ppc405gp", PPC_MODEL_405GP, PPCCAP_4XX | PPCCAP_VEA, 1)
{
}
@@ -311,7 +311,7 @@ ppc405gp_device::ppc405gp_device(const machine_config &mconfig, const char *tag,
of access and the protection bits
-------------------------------------------------*/
-static inline int page_access_allowed(int transtype, UINT8 key, UINT8 protbits)
+static inline int page_access_allowed(int transtype, uint8_t key, uint8_t protbits)
{
if (key == 0)
return (transtype == TRANSLATE_WRITE) ? (protbits != 3) : TRUE;
@@ -324,7 +324,7 @@ static inline int page_access_allowed(int transtype, UINT8 key, UINT8 protbits)
get_cr - return the current CR value
-------------------------------------------------*/
-inline UINT32 ppc_device::get_cr()
+inline uint32_t ppc_device::get_cr()
{
return ((m_core->cr[0] & 0x0f) << 28) |
((m_core->cr[1] & 0x0f) << 24) |
@@ -341,7 +341,7 @@ inline UINT32 ppc_device::get_cr()
set_cr - set the current CR value
-------------------------------------------------*/
-inline void ppc_device::set_cr(UINT32 value)
+inline void ppc_device::set_cr(uint32_t value)
{
m_core->cr[0] = value >> 28;
m_core->cr[1] = value >> 24;
@@ -358,7 +358,7 @@ inline void ppc_device::set_cr(UINT32 value)
get_xer - return the current XER value
-------------------------------------------------*/
-inline UINT32 ppc_device::get_xer()
+inline uint32_t ppc_device::get_xer()
{
return m_core->spr[SPR_XER] | (m_core->xerso << 31);
}
@@ -368,7 +368,7 @@ inline UINT32 ppc_device::get_xer()
set_xer - set the current XER value
-------------------------------------------------*/
-inline void ppc_device::set_xer(UINT32 value)
+inline void ppc_device::set_xer(uint32_t value)
{
m_core->spr[SPR_XER] = value & ~XER_SO;
m_core->xerso = value >> 31;
@@ -380,7 +380,7 @@ inline void ppc_device::set_xer(UINT32 value)
value
-------------------------------------------------*/
-inline UINT64 ppc_device::get_timebase()
+inline uint64_t ppc_device::get_timebase()
{
if (!m_tb_divisor)
{
@@ -395,7 +395,7 @@ inline UINT64 ppc_device::get_timebase()
set_timebase - set the timebase
-------------------------------------------------*/
-inline void ppc_device::set_timebase(UINT64 newtb)
+inline void ppc_device::set_timebase(uint64_t newtb)
{
m_tb_zero_cycles = total_cycles() - newtb * m_tb_divisor;
}
@@ -406,10 +406,10 @@ inline void ppc_device::set_timebase(UINT64 newtb)
decrementer value
-------------------------------------------------*/
-inline UINT32 ppc_device::get_decrementer()
+inline uint32_t ppc_device::get_decrementer()
{
- INT64 cycles_until_zero = m_dec_zero_cycles - total_cycles();
- cycles_until_zero = std::max<INT64>(cycles_until_zero, 0);
+ int64_t cycles_until_zero = m_dec_zero_cycles - total_cycles();
+ cycles_until_zero = std::max<int64_t>(cycles_until_zero, 0);
if (!m_tb_divisor)
{
@@ -424,10 +424,10 @@ inline UINT32 ppc_device::get_decrementer()
set_decrementer - set the decremeter
-------------------------------------------------*/
-inline void ppc_device::set_decrementer(UINT32 newdec)
+inline void ppc_device::set_decrementer(uint32_t newdec)
{
- UINT64 cycles_until_done = ((UINT64)newdec + 1) * m_tb_divisor;
- UINT32 curdec = get_decrementer();
+ uint64_t cycles_until_done = ((uint64_t)newdec + 1) * m_tb_divisor;
+ uint32_t curdec = get_decrementer();
if (!m_tb_divisor)
{
@@ -436,16 +436,16 @@ inline void ppc_device::set_decrementer(UINT32 newdec)
if (PRINTF_DECREMENTER)
{
- UINT64 total = total_cycles();
+ uint64_t total = total_cycles();
osd_printf_debug("set_decrementer: olddec=%08X newdec=%08X divisor=%d totalcyc=%08X%08X timer=%08X%08X\n",
curdec, newdec, m_tb_divisor,
- (UINT32)(total >> 32), (UINT32)total, (UINT32)(cycles_until_done >> 32), (UINT32)cycles_until_done);
+ (uint32_t)(total >> 32), (uint32_t)total, (uint32_t)(cycles_until_done >> 32), (uint32_t)cycles_until_done);
}
m_dec_zero_cycles = total_cycles() + cycles_until_done;
m_decrementer_int_timer->adjust(cycles_to_attotime(cycles_until_done));
- if ((INT32)curdec >= 0 && (INT32)newdec < 0)
+ if ((int32_t)curdec >= 0 && (int32_t)newdec < 0)
m_core->irq_pending |= 0x02;
}
@@ -457,7 +457,7 @@ inline void ppc_device::set_decrementer(UINT32 newdec)
static inline int is_nan_double(double x)
{
- UINT64 xi = *(UINT64*)&x;
+ uint64_t xi = *(uint64_t*)&x;
return( ((xi & DOUBLE_EXP) == DOUBLE_EXP) &&
((xi & DOUBLE_FRAC) != DOUBLE_ZERO) );
}
@@ -471,7 +471,7 @@ static inline int is_nan_double(double x)
static inline int is_qnan_double(double x)
{
- UINT64 xi = *(UINT64*)&x;
+ uint64_t xi = *(uint64_t*)&x;
return( ((xi & DOUBLE_EXP) == DOUBLE_EXP) &&
((xi & U64(0x0007fffffffffff)) == U64(0x000000000000000)) &&
((xi & U64(0x000800000000000)) == U64(0x000800000000000)) );
@@ -486,7 +486,7 @@ static inline int is_qnan_double(double x)
static inline int is_snan_double(double x)
{
- UINT64 xi = *(UINT64*)&x;
+ uint64_t xi = *(uint64_t*)&x;
return( ((xi & DOUBLE_EXP) == DOUBLE_EXP) &&
((xi & DOUBLE_FRAC) != DOUBLE_ZERO) &&
((xi & U64(0x0008000000000000)) == DOUBLE_ZERO) );
@@ -501,7 +501,7 @@ static inline int is_snan_double(double x)
static inline int is_infinity_double(double x)
{
- UINT64 xi = *(UINT64*)&x;
+ uint64_t xi = *(uint64_t*)&x;
return( ((xi & DOUBLE_EXP) == DOUBLE_EXP) &&
((xi & DOUBLE_FRAC) == DOUBLE_ZERO) );
}
@@ -514,8 +514,8 @@ static inline int is_infinity_double(double x)
static inline int is_normalized_double(double x)
{
- UINT64 exp;
- UINT64 xi = *(UINT64*)&x;
+ uint64_t exp;
+ uint64_t xi = *(uint64_t*)&x;
exp = (xi & DOUBLE_EXP) >> 52;
return (exp >= 1) && (exp <= 2046);
@@ -529,7 +529,7 @@ static inline int is_normalized_double(double x)
static inline int is_denormalized_double(double x)
{
- UINT64 xi = *(UINT64*)&x;
+ uint64_t xi = *(uint64_t*)&x;
return( ((xi & DOUBLE_EXP) == 0) &&
((xi & DOUBLE_FRAC) != DOUBLE_ZERO) );
}
@@ -541,7 +541,7 @@ static inline int is_denormalized_double(double x)
static inline int sign_double(double x)
{
- UINT64 xi = *(UINT64*)&x;
+ uint64_t xi = *(uint64_t*)&x;
return ((xi & DOUBLE_SIGN) != 0);
}
@@ -883,7 +883,7 @@ void ppc_device::device_start()
m_icountptr = &m_core->icount;
- UINT32 flags = 0;
+ uint32_t flags = 0;
/* initialize the UML generator */
m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, flags, 8, 32, 2);
@@ -988,7 +988,7 @@ void ppc_device::state_export(const device_state_entry &entry)
break;
case PPC_TBL:
- m_debugger_temp = (UINT32)get_timebase();
+ m_debugger_temp = (uint32_t)get_timebase();
break;
case PPC_DEC:
@@ -1014,7 +1014,7 @@ void ppc_device::state_import(const device_state_entry &entry)
break;
case PPC_TBH:
- set_timebase((get_timebase() & ~U64(0x00000000ffffffff)) | ((UINT64)(m_debugger_temp & 0x00ffffff) << 32));
+ set_timebase((get_timebase() & ~U64(0x00000000ffffffff)) | ((uint64_t)(m_debugger_temp & 0x00ffffff) << 32));
break;
case PPC_DEC:
@@ -1232,10 +1232,10 @@ void ppc_device::device_reset()
CPU
-------------------------------------------------*/
-offs_t ppc_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ppc_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
- extern offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op);
- UINT32 op = *(UINT32 *)oprom;
+ extern offs_t ppc_dasm_one(char *buffer, uint32_t pc, uint32_t op);
+ uint32_t op = *(uint32_t *)oprom;
op = big_endianize_int32(op);
return ppc_dasm_one(buffer, pc, op);
}
@@ -1266,13 +1266,13 @@ void ppc_device::ppccom_dcstore_callback()
filling
-------------------------------------------------*/
-UINT32 ppc_device::ppccom_translate_address_internal(int intention, offs_t &address)
+uint32_t ppc_device::ppccom_translate_address_internal(int intention, offs_t &address)
{
int transpriv = ((intention & TRANSLATE_USER_MASK) == 0); // 1 for supervisor, 0 for user
int transtype = intention & TRANSLATE_TYPE_MASK;
offs_t hash, hashbase, hashmask;
int batbase, batnum, hashnum;
- UINT32 segreg;
+ uint32_t segreg;
/* 4xx case: "TLB" really just caches writes and checks compare registers */
if (m_cap & PPCCAP_4XX)
@@ -1309,8 +1309,8 @@ UINT32 ppc_device::ppccom_translate_address_internal(int intention, offs_t &addr
{
for (batnum = 0; batnum < 4; batnum++)
{
- UINT32 upper = m_core->spr[SPROEA_IBAT0U + 2*batnum + 0];
- UINT32 lower = m_core->spr[SPROEA_IBAT0U + 2*batnum + 1];
+ uint32_t upper = m_core->spr[SPROEA_IBAT0U + 2*batnum + 0];
+ uint32_t lower = m_core->spr[SPROEA_IBAT0U + 2*batnum + 1];
int privbit = ((intention & TRANSLATE_USER_MASK) == 0) ? 3 : 2;
// printf("bat %d upper = %08x privbit %d\n", batnum, upper, privbit);
@@ -1318,9 +1318,9 @@ UINT32 ppc_device::ppccom_translate_address_internal(int intention, offs_t &addr
// is this pair valid?
if (lower & 0x40)
{
- UINT32 mask = ((lower & 0x3f) << 17) ^ 0xfffe0000;
- UINT32 addrout;
- UINT32 key = (upper >> privbit) & 1;
+ uint32_t mask = ((lower & 0x3f) << 17) ^ 0xfffe0000;
+ uint32_t addrout;
+ uint32_t key = (upper >> privbit) & 1;
/* check for a hit against this bucket */
if ((address & mask) == (upper & mask))
@@ -1345,17 +1345,17 @@ UINT32 ppc_device::ppccom_translate_address_internal(int intention, offs_t &addr
for (batnum = 0; batnum < 4; batnum++)
{
- UINT32 upper = m_core->spr[batbase + 2*batnum + 0];
+ uint32_t upper = m_core->spr[batbase + 2*batnum + 0];
/* check user/supervisor valid bit */
if ((upper >> transpriv) & 0x01)
{
- UINT32 mask = (~upper << 15) & 0xfffe0000;
+ uint32_t mask = (~upper << 15) & 0xfffe0000;
/* check for a hit against this bucket */
if ((address & mask) == (upper & mask))
{
- UINT32 lower = m_core->spr[batbase + 2*batnum + 1];
+ uint32_t lower = m_core->spr[batbase + 2*batnum + 1];
/* verify protection; if we fail, return false and indicate a protection violation */
if (!page_access_allowed(transtype, 1, lower & 3))
@@ -1398,7 +1398,7 @@ UINT32 ppc_device::ppccom_translate_address_internal(int intention, offs_t &addr
/* if we're simulating the 603 MMU, fill in the data and stop here */
if (m_cap & PPCCAP_603_MMU)
{
- UINT32 entry = vtlb_table()[address >> 12];
+ uint32_t entry = vtlb_table()[address >> 12];
m_core->mmu603_cmp = 0x80000000 | ((segreg & 0xffffff) << 7) | (0 << 6) | ((address >> 22) & 0x3f);
m_core->mmu603_hash[0] = hashbase | ((hash << 6) & hashmask);
m_core->mmu603_hash[1] = hashbase | ((~hash << 6) & hashmask);
@@ -1414,19 +1414,19 @@ UINT32 ppc_device::ppccom_translate_address_internal(int intention, offs_t &addr
for (hashnum = 0; hashnum < 2; hashnum++)
{
offs_t ptegaddr = hashbase | ((hash << 6) & hashmask);
- UINT32 *ptegptr = (UINT32 *)m_program->get_read_ptr(ptegaddr);
+ uint32_t *ptegptr = (uint32_t *)m_program->get_read_ptr(ptegaddr);
/* should only have valid memory here, but make sure */
if (ptegptr != nullptr)
{
- UINT32 targetupper = 0x80000000 | ((segreg & 0xffffff) << 7) | (hashnum << 6) | ((address >> 22) & 0x3f);
+ uint32_t targetupper = 0x80000000 | ((segreg & 0xffffff) << 7) | (hashnum << 6) | ((address >> 22) & 0x3f);
int ptenum;
/* scan PTEs */
for (ptenum = 0; ptenum < 8; ptenum++)
if (ptegptr[BYTE_XOR_BE(ptenum * 2)] == targetupper)
{
- UINT32 pteglower = ptegptr[BYTE_XOR_BE(ptenum * 2 + 1)];
+ uint32_t pteglower = ptegptr[BYTE_XOR_BE(ptenum * 2 + 1)];
/* verify protection; if we fail, return false and indicate a protection violation */
if (!page_access_allowed(transtype, (segreg >> (29 + transpriv)) & 1, pteglower & 3))
@@ -1527,7 +1527,7 @@ void ppc_device::ppccom_execute_tlbia()
void ppc_device::ppccom_execute_tlbl()
{
- UINT32 address = m_core->param0;
+ uint32_t address = m_core->param0;
int isitlb = m_core->param1;
vtlb_entry flags;
int entrynum;
@@ -1767,7 +1767,7 @@ void ppc_device::ppccom_execute_mtspr()
set_timebase((get_timebase() & ~U64(0xffffffff00000000)) | m_core->param1);
return;
case SPR603_TBU_W:
- set_timebase((get_timebase() & ~U64(0x00000000ffffffff)) | ((UINT64)m_core->param1 << 32));
+ set_timebase((get_timebase() & ~U64(0x00000000ffffffff)) | ((uint64_t)m_core->param1 << 32));
return;
}
}
@@ -1775,7 +1775,7 @@ void ppc_device::ppccom_execute_mtspr()
/* handle 4XX SPRs */
if (m_cap & PPCCAP_4XX)
{
- UINT32 oldval = m_core->spr[m_core->param0];
+ uint32_t oldval = m_core->spr[m_core->param0];
switch (m_core->param0)
{
/* write-through no-ops */
@@ -1826,7 +1826,7 @@ void ppc_device::ppccom_execute_mtspr()
set_timebase((get_timebase() & ~U64(0x00ffffff00000000)) | m_core->param1);
return;
case SPR4XX_TBHI:
- set_timebase((get_timebase() & ~U64(0x00000000ffffffff)) | ((UINT64)(m_core->param1 & 0x00ffffff) << 32));
+ set_timebase((get_timebase() & ~U64(0x00000000ffffffff)) | ((uint64_t)(m_core->param1 & 0x00ffffff) << 32));
return;
}
}
@@ -1905,7 +1905,7 @@ void ppc_device::ppccom_execute_mfdcr()
void ppc_device::ppccom_execute_mtdcr()
{
- UINT8 oldval;
+ uint8_t oldval;
/* handle various DCRs */
switch (m_core->param0)
@@ -2000,7 +2000,7 @@ void ppc_device::ppccom_execute_mtdcr()
void ppc_device::ppccom_update_fprf()
{
- UINT32 fprf;
+ uint32_t fprf;
double f = m_core->f[m_core->param0];
if (is_qnan_double(f))
@@ -2052,13 +2052,13 @@ void ppc_device::ppccom_update_fprf()
TIMER_CALLBACK_MEMBER( ppc_device::decrementer_int_callback )
{
- UINT64 cycles_until_next;
+ uint64_t cycles_until_next;
/* set the decrementer IRQ state */
m_core->irq_pending |= 0x02;
/* advance by another full rev */
- m_dec_zero_cycles += (UINT64)m_tb_divisor << 32;
+ m_dec_zero_cycles += (uint64_t)m_tb_divisor << 32;
cycles_until_next = m_dec_zero_cycles - total_cycles();
m_decrementer_int_timer->adjust(cycles_to_attotime(cycles_until_next));
}
@@ -2121,10 +2121,10 @@ void ppc4xx_device::execute_set_input(int inputnum, int state)
IRQ line management
-------------------------------------------------*/
-void ppc_device::ppc4xx_set_irq_line(UINT32 bitmask, int state)
+void ppc_device::ppc4xx_set_irq_line(uint32_t bitmask, int state)
{
- UINT32 oldstate = m_irqstate;
- UINT32 levelmask;
+ uint32_t oldstate = m_irqstate;
+ uint32_t levelmask;
/* set or clear the appropriate bit */
if (state != CLEAR_LINE)
@@ -2161,7 +2161,7 @@ void ppc_device::ppc4xx_set_irq_line(UINT32 bitmask, int state)
IRQ line state getter
-------------------------------------------------*/
-int ppc_device::ppc4xx_get_irq_line(UINT32 bitmask)
+int ppc_device::ppc4xx_get_irq_line(uint32_t bitmask)
{
return (m_irqstate & bitmask) ? ASSERT_LINE : CLEAR_LINE;
}
@@ -2215,7 +2215,7 @@ void ppc_device::ppc4xx_dma_update_irq_states()
int ppc_device::ppc4xx_dma_decrement_count(int dmachan)
{
- UINT32 *dmaregs = &m_dcr[8 * dmachan];
+ uint32_t *dmaregs = &m_dcr[8 * dmachan];
/* decrement the counter */
dmaregs[DCR4XX_DMACT0]--;
@@ -2246,11 +2246,11 @@ int ppc_device::ppc4xx_dma_decrement_count(int dmachan)
ppc4xx_dma_update_irq_states();
- INT64 numdata = dmaregs[DCR4XX_DMACT0];
+ int64_t numdata = dmaregs[DCR4XX_DMACT0];
if (numdata == 0)
numdata = 65536;
- INT64 time = (numdata * 1000000) / m_buffered_dma_rate[dmachan];
+ int64_t time = (numdata * 1000000) / m_buffered_dma_rate[dmachan];
m_buffered_dma_timer[dmachan]->adjust(attotime::from_usec(time), dmachan);
}
@@ -2276,10 +2276,10 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
{
int dmachan = param;
- static const UINT8 dma_transfer_width[4] = { 1, 2, 4, 16 };
- UINT32 *dmaregs = &m_dcr[8 * dmachan];
- INT32 destinc;
- UINT8 width;
+ static const uint8_t dma_transfer_width[4] = { 1, 2, 4, 16 };
+ uint32_t *dmaregs = &m_dcr[8 * dmachan];
+ int32_t destinc;
+ uint8_t width;
width = dma_transfer_width[(dmaregs[DCR4XX_DMACR0] & PPC4XX_DMACR_PW_MASK) >> 26];
destinc = (dmaregs[DCR4XX_DMACR0] & PPC4XX_DMACR_DAI) ? width : 0;
@@ -2294,7 +2294,7 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
case 1:
do
{
- UINT8 data = 0;
+ uint8_t data = 0;
if (!m_ext_dma_read_cb[dmachan].isnull())
data = (m_ext_dma_read_cb[dmachan])(*m_program, 1, 0xffffffff);
m_program->write_byte(dmaregs[DCR4XX_DMADA0], data);
@@ -2306,7 +2306,7 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
case 2:
do
{
- UINT16 data = 0;
+ uint16_t data = 0;
if (!m_ext_dma_read_cb[dmachan].isnull())
data = (m_ext_dma_read_cb[dmachan])(*m_program, 2, 0xffffffff);
m_program->write_word(dmaregs[DCR4XX_DMADA0], data);
@@ -2318,7 +2318,7 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
case 4:
do
{
- UINT32 data = 0;
+ uint32_t data = 0;
if (!m_ext_dma_read_cb[dmachan].isnull())
data = (m_ext_dma_read_cb[dmachan])(*m_program, 4, 0xffffffff);
m_program->write_dword(dmaregs[DCR4XX_DMADA0], data);
@@ -2338,7 +2338,7 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
case 1:
do
{
- UINT8 data = m_program->read_byte(dmaregs[DCR4XX_DMADA0]);
+ uint8_t data = m_program->read_byte(dmaregs[DCR4XX_DMADA0]);
if (!m_ext_dma_write_cb[dmachan].isnull())
(m_ext_dma_write_cb[dmachan])(*m_program, 1, data, 0xffffffff);
dmaregs[DCR4XX_DMADA0] += destinc;
@@ -2349,7 +2349,7 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
case 2:
do
{
- UINT16 data = m_program->read_word(dmaregs[DCR4XX_DMADA0]);
+ uint16_t data = m_program->read_word(dmaregs[DCR4XX_DMADA0]);
if (!m_ext_dma_write_cb[dmachan].isnull())
(m_ext_dma_write_cb[dmachan])(*m_program, 2, data, 0xffffffff);
dmaregs[DCR4XX_DMADA0] += destinc;
@@ -2360,7 +2360,7 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
case 4:
do
{
- UINT32 data = m_program->read_dword(dmaregs[DCR4XX_DMADA0]);
+ uint32_t data = m_program->read_dword(dmaregs[DCR4XX_DMADA0]);
if (!m_ext_dma_write_cb[dmachan].isnull())
(m_ext_dma_write_cb[dmachan])(*m_program, 4, data, 0xffffffff);
dmaregs[DCR4XX_DMADA0] += destinc;
@@ -2376,9 +2376,9 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_buffered_dma_callback )
to send to a peripheral
-------------------------------------------------*/
-int ppc_device::ppc4xx_dma_fetch_transmit_byte(int dmachan, UINT8 *byte)
+int ppc_device::ppc4xx_dma_fetch_transmit_byte(int dmachan, uint8_t *byte)
{
- UINT32 *dmaregs = &m_dcr[8 * dmachan];
+ uint32_t *dmaregs = &m_dcr[8 * dmachan];
/* if the channel is not enabled, fail */
if (!(dmaregs[DCR4XX_DMACR0] & PPC4XX_DMACR_CE))
@@ -2400,9 +2400,9 @@ int ppc_device::ppc4xx_dma_fetch_transmit_byte(int dmachan, UINT8 *byte)
transmitted by a peripheral
-------------------------------------------------*/
-int ppc_device::ppc4xx_dma_handle_receive_byte(int dmachan, UINT8 byte)
+int ppc_device::ppc4xx_dma_handle_receive_byte(int dmachan, uint8_t byte)
{
- UINT32 *dmaregs = &m_dcr[8 * dmachan];
+ uint32_t *dmaregs = &m_dcr[8 * dmachan];
/* if the channel is not enabled, fail */
if (!(dmaregs[DCR4XX_DMACR0] & PPC4XX_DMACR_CE))
@@ -2426,10 +2426,10 @@ int ppc_device::ppc4xx_dma_handle_receive_byte(int dmachan, UINT8 byte)
void ppc_device::ppc4xx_dma_exec(int dmachan)
{
- static const UINT8 dma_transfer_width[4] = { 1, 2, 4, 16 };
- UINT32 *dmaregs = &m_dcr[8 * dmachan];
- INT32 destinc, srcinc;
- UINT8 width;
+ static const uint8_t dma_transfer_width[4] = { 1, 2, 4, 16 };
+ uint32_t *dmaregs = &m_dcr[8 * dmachan];
+ int32_t destinc, srcinc;
+ uint8_t width;
/* skip if not enabled */
if (!(dmaregs[DCR4XX_DMACR0] & PPC4XX_DMACR_CE))
@@ -2448,11 +2448,11 @@ void ppc_device::ppc4xx_dma_exec(int dmachan)
{
/* buffered DMA with external peripheral */
- INT64 numdata = dmaregs[DCR4XX_DMACT0];
+ int64_t numdata = dmaregs[DCR4XX_DMACT0];
if (numdata == 0)
numdata = 65536;
- INT64 time;
+ int64_t time;
if (numdata > 100)
{
time = (numdata * 1000000) / m_buffered_dma_rate[dmachan];
@@ -2548,9 +2548,9 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_fit_callback )
/* update ourself for the next interval if we are enabled */
if (m_core->spr[SPR4XX_TCR] & PPC4XX_TCR_FIE)
{
- UINT32 timebase = get_timebase();
- UINT32 interval = 0x200 << (4 * ((m_core->spr[SPR4XX_TCR] & PPC4XX_TCR_FP_MASK) >> 24));
- UINT32 target = (timebase + interval) & ~(interval - 1);
+ uint32_t timebase = get_timebase();
+ uint32_t interval = 0x200 << (4 * ((m_core->spr[SPR4XX_TCR] & PPC4XX_TCR_FP_MASK) >> 24));
+ uint32_t target = (timebase + interval) & ~(interval - 1);
m_fit_timer->adjust(cycles_to_attotime((target + 1 - timebase) / m_tb_divisor), TRUE);
}
@@ -2577,9 +2577,9 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_pit_callback )
forced to update, or we are in auto-reload mode */
if ((m_core->spr[SPR4XX_TCR] & PPC4XX_TCR_PIE) && m_pit_reload != 0 && (!param || (m_core->spr[SPR4XX_TCR] & PPC4XX_TCR_ARE)))
{
- UINT32 timebase = get_timebase();
- UINT32 interval = m_pit_reload;
- UINT32 target = timebase + interval;
+ uint32_t timebase = get_timebase();
+ uint32_t interval = m_pit_reload;
+ uint32_t target = timebase + interval;
m_pit_timer->adjust(cycles_to_attotime((target + 1 - timebase) / m_tb_divisor), TRUE);
}
@@ -2626,9 +2626,9 @@ void ppc_device::ppc4xx_spu_update_irq_states()
ppc4xx_spu_rx_data - serial port data receive
-------------------------------------------------*/
-void ppc_device::ppc4xx_spu_rx_data(UINT8 data)
+void ppc_device::ppc4xx_spu_rx_data(uint8_t data)
{
- UINT32 new_rxin;
+ uint32_t new_rxin;
/* fail if we are going to overflow */
new_rxin = (m_spu.rxin + 1) % ARRAY_LENGTH(m_spu.rxbuffer);
@@ -2648,7 +2648,7 @@ void ppc_device::ppc4xx_spu_rx_data(UINT8 data)
void ppc_device::ppc4xx_spu_timer_reset()
{
- UINT8 enabled = (m_spu.regs[SPU4XX_RX_COMMAND] | m_spu.regs[SPU4XX_TX_COMMAND]) & 0x80;
+ uint8_t enabled = (m_spu.regs[SPU4XX_RX_COMMAND] | m_spu.regs[SPU4XX_TX_COMMAND]) & 0x80;
/* if we're enabled, reset at the current baud rate */
if (enabled)
@@ -2706,7 +2706,7 @@ TIMER_CALLBACK_MEMBER( ppc_device::ppc4xx_spu_callback )
if (m_spu.rxout != m_spu.rxin)
{
int operation = (m_spu.regs[SPU4XX_RX_COMMAND] >> 5) & 3;
- UINT8 rxbyte;
+ uint8_t rxbyte;
/* consume the byte and advance the out pointer */
rxbyte = m_spu.rxbuffer[m_spu.rxout];
@@ -2743,7 +2743,7 @@ updateirq:
READ8_MEMBER( ppc4xx_device::ppc4xx_spu_r )
{
- UINT8 result = 0xff;
+ uint8_t result = 0xff;
switch (offset)
{
@@ -2769,7 +2769,7 @@ READ8_MEMBER( ppc4xx_device::ppc4xx_spu_r )
WRITE8_MEMBER( ppc4xx_device::ppc4xx_spu_w )
{
- UINT8 oldstate, newstate;
+ uint8_t oldstate, newstate;
if (PRINTF_SPU)
printf("spu_w(%d) = %02X\n", offset, data);
@@ -2841,7 +2841,7 @@ void ppc4xx_device::ppc4xx_spu_set_tx_handler(write8_delegate callback)
specific serial byte receive
-------------------------------------------------*/
-void ppc4xx_device::ppc4xx_spu_receive_byte(UINT8 byteval)
+void ppc4xx_device::ppc4xx_spu_receive_byte(uint8_t byteval)
{
ppc4xx_spu_rx_data(byteval);
}
diff --git a/src/devices/cpu/powerpc/ppccom.h b/src/devices/cpu/powerpc/ppccom.h
index b978aa4101b..45c75169136 100644
--- a/src/devices/cpu/powerpc/ppccom.h
+++ b/src/devices/cpu/powerpc/ppccom.h
@@ -429,11 +429,11 @@ enum
* in with the passed value.
*/
-#define D_OP(op) (UINT32)((op & 0x3f) << 26)
-#define D_XO(xo) (UINT32)((xo & 0x3ff) << 1)
-#define D_RT(r) (UINT32)((r & 0x1f) << (31 - 10))
-#define D_RA(r) (UINT32)((r & 0x1f) << (31 - 15))
-#define D_UIMM(u) (UINT32)(u & 0xffff)
+#define D_OP(op) (uint32_t)((op & 0x3f) << 26)
+#define D_XO(xo) (uint32_t)((xo & 0x3ff) << 1)
+#define D_RT(r) (uint32_t)((r & 0x1f) << (31 - 10))
+#define D_RA(r) (uint32_t)((r & 0x1f) << (31 - 15))
+#define D_UIMM(u) (uint32_t)(u & 0xffff)
/*
* Macros to Get Field Values
diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp
index 47a8742a0af..837e23e4bd6 100644
--- a/src/devices/cpu/powerpc/ppcdrc.cpp
+++ b/src/devices/cpu/powerpc/ppcdrc.cpp
@@ -25,7 +25,7 @@
using namespace uml;
-extern offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op);
+extern offs_t ppc_dasm_one(char *buffer, uint32_t pc, uint32_t op);
@@ -176,7 +176,7 @@ void ppc_device::save_fast_fregs(drcuml_block *block)
for an rlw* instruction
-------------------------------------------------*/
-inline UINT32 ppc_device::compute_rlw_mask(UINT8 mb, UINT8 me)
+inline uint32_t ppc_device::compute_rlw_mask(uint8_t mb, uint8_t me)
{
if (mb <= me)
return (0xffffffff >> mb) & (0xffffffff << (31 - me));
@@ -190,9 +190,9 @@ inline UINT32 ppc_device::compute_rlw_mask(UINT8 mb, UINT8 me)
for a mtcrf/mfcrf instruction
-------------------------------------------------*/
-inline UINT32 ppc_device::compute_crf_mask(UINT8 crm)
+inline uint32_t ppc_device::compute_crf_mask(uint8_t crm)
{
- UINT32 mask = 0;
+ uint32_t mask = 0;
if (crm & 0x80) mask |= 0xf0000000;
if (crm & 0x40) mask |= 0x0f000000;
if (crm & 0x20) mask |= 0x00f00000;
@@ -210,7 +210,7 @@ inline UINT32 ppc_device::compute_crf_mask(UINT8 crm)
SPR field of an opcode
-------------------------------------------------*/
-inline UINT32 ppc_device::compute_spr(UINT32 spr)
+inline uint32_t ppc_device::compute_spr(uint32_t spr)
{
return ((spr >> 5) | (spr << 5)) & 0x3ff;
}
@@ -257,7 +257,7 @@ void ppc_device::execute_run()
ppcdrc_set_options - configure DRC options
-------------------------------------------------*/
-void ppc_device::ppcdrc_set_options(UINT32 options)
+void ppc_device::ppcdrc_set_options(uint32_t options)
{
m_drcoptions = options;
}
@@ -268,7 +268,7 @@ void ppc_device::ppcdrc_set_options(UINT32 options)
region
-------------------------------------------------*/
-void ppc_device::ppcdrc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base)
+void ppc_device::ppcdrc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
{
if (m_fastram_select < ARRAY_LENGTH(m_fastram))
{
@@ -285,7 +285,7 @@ void ppc_device::ppcdrc_add_fastram(offs_t start, offs_t end, UINT8 readonly, vo
ppcdrc_add_hotspot - add a new hotspot
-------------------------------------------------*/
-void ppc_device::ppcdrc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles)
+void ppc_device::ppcdrc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles)
{
if (m_hotspot_select < ARRAY_LENGTH(m_hotspot))
{
@@ -378,7 +378,7 @@ void ppc_device::code_flush_cache()
given mode at the specified pc
-------------------------------------------------*/
-void ppc_device::code_compile_block(UINT8 mode, offs_t pc)
+void ppc_device::code_compile_block(uint8_t mode, offs_t pc)
{
compiler_state compiler = { 0 };
const opcode_desc *seqhead, *seqlast;
@@ -405,7 +405,7 @@ void ppc_device::code_compile_block(UINT8 mode, offs_t pc)
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
const opcode_desc *curdesc;
- UINT32 nextpc;
+ uint32_t nextpc;
/* add a code log entry */
if (m_drcuml->logging())
@@ -568,7 +568,7 @@ static void cfunc_unimplemented(void *param)
void ppc_device::ppc_cfunc_unimplemented()
{
- UINT32 opcode = m_core->arg0;
+ uint32_t opcode = m_core->arg0;
fatalerror("PC=%08X: Unimplemented op %08X\n", m_core->pc, opcode);
}
@@ -807,10 +807,10 @@ void ppc_device::static_generate_tlb_mismatch()
exception handler
-------------------------------------------------*/
-void ppc_device::static_generate_exception(UINT8 exception, int recover, const char *name)
+void ppc_device::static_generate_exception(uint8_t exception, int recover, const char *name)
{
code_handle *&exception_handle = recover ? m_exception[exception] : m_exception_norecover[exception];
- UINT32 vector = exception << 8;
+ uint32_t vector = exception << 8;
code_label label = 1;
drcuml_block *block;
@@ -838,8 +838,8 @@ void ppc_device::static_generate_exception(UINT8 exception, int recover, const c
/* OEA handling of SRR exceptions */
if (m_cap & PPCCAP_OEA)
{
- UINT32 msrandmask = MSROEA_POW | MSR_EE | MSR_PR | MSROEA_FP | MSROEA_FE0 | MSROEA_SE | MSROEA_BE | MSROEA_FE1 | MSROEA_IR | MSROEA_DR | MSROEA_RI | MSR_LE;
- UINT32 msrormask = 0;
+ uint32_t msrandmask = MSROEA_POW | MSR_EE | MSR_PR | MSROEA_FP | MSROEA_FE0 | MSROEA_SE | MSROEA_BE | MSROEA_FE1 | MSROEA_IR | MSROEA_DR | MSROEA_RI | MSR_LE;
+ uint32_t msrormask = 0;
/* check registers to see the real source of our exception (EI exceptions only) */
UML_MOV(block, I3, vector); // mov i3,vector
@@ -1048,7 +1048,7 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
{
UML_SHR(block, I3, I0, 12); // shr i3,i0,12
UML_LOAD(block, I3, (void *)vtlb_table(), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword
- UML_TEST(block, I3, (UINT64)1 << translate_type); // test i3,1 << translate_type
+ UML_TEST(block, I3, (uint64_t)1 << translate_type); // test i3,1 << translate_type
UML_JMPc(block, COND_Z, tlbmiss = label++); // jmp tlbmiss,z
UML_LABEL(block, tlbreturn = label++); // tlbreturn:
UML_ROLINS(block, I0, I3, 0, 0xfffff000); // rolins i0,i3,0,0xfffff000
@@ -1061,8 +1061,8 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
for (ramnum = 0; ramnum < PPC_MAX_FASTRAM; ramnum++)
if (m_fastram[ramnum].base != nullptr && (!iswrite || !m_fastram[ramnum].readonly))
{
- void *fastbase = (UINT8 *)m_fastram[ramnum].base - m_fastram[ramnum].start;
- UINT32 skip = label++;
+ void *fastbase = (uint8_t *)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ uint32_t skip = label++;
if (m_fastram[ramnum].end != 0xffffffff)
{
@@ -1365,7 +1365,7 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
UML_CALLC(block, (c_function)cfunc_ppccom_tlb_fill, this); // callc tlbfill,ppc
UML_SHR(block, I3, I0, 12); // shr i3,i0,12
UML_LOAD(block, I3, (void *)vtlb_table(), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword
- UML_TEST(block, I3, (UINT64)1 << translate_type); // test i3,1 << translate_type
+ UML_TEST(block, I3, (uint64_t)1 << translate_type); // test i3,1 << translate_type
UML_JMPc(block, COND_NZ, tlbreturn); // jmp tlbreturn,nz
/* 4XX case: protection exception */
@@ -1641,7 +1641,7 @@ void ppc_device::generate_checksum_block(drcuml_block *block, compiler_state *co
UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); // exne nocode,seqhead->pc
}
#else
- UINT32 sum = 0;
+ uint32_t sum = 0;
void *base = m_direct->read_ptr(seqhead->physpc, m_codexor);
UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword
sum += seqhead->opptr.l[0];
@@ -1788,9 +1788,9 @@ void ppc_device::generate_sequence_instruction(drcuml_block *block, compiler_sta
generate_compute_flags - compute CR0 and/or XER flags
------------------------------------------------------------------*/
-void ppc_device::generate_compute_flags(drcuml_block *block, const opcode_desc *desc, int updatecr, UINT32 xermask, int invertcarry)
+void ppc_device::generate_compute_flags(drcuml_block *block, const opcode_desc *desc, int updatecr, uint32_t xermask, int invertcarry)
{
- UINT32 xerflags;
+ uint32_t xerflags;
/* modify inputs based on required flags */
if (!DISABLE_FLAG_OPTIMIZATIONS)
@@ -1859,7 +1859,7 @@ void ppc_device::generate_compute_flags(drcuml_block *block, const opcode_desc *
generate_shift_flags - compute S/Z flags for shifts
-------------------------------------------------------*/
-void ppc_device::generate_shift_flags(drcuml_block *block, const opcode_desc *desc, UINT32 op)
+void ppc_device::generate_shift_flags(drcuml_block *block, const opcode_desc *desc, uint32_t op)
{
UML_CMP(block, R32(G_RA(op)), 0); // cmp ra, #0
UML_SETc(block, COND_Z, I1); // set Z, i1
@@ -1896,10 +1896,10 @@ void ppc_device::generate_fp_flags(drcuml_block *block, const opcode_desc *desc,
branch
-------------------------------------------------*/
-void ppc_device::generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int source, UINT8 link)
+void ppc_device::generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int source, uint8_t link)
{
compiler_state compiler_temp = *compiler;
- UINT32 *srcptr = &m_core->spr[source];
+ uint32_t *srcptr = &m_core->spr[source];
/* set the link if needed */
if (link)
@@ -1941,7 +1941,7 @@ void ppc_device::generate_branch(drcuml_block *block, compiler_state *compiler,
branch based on the BO and BI fields
-------------------------------------------------*/
-void ppc_device::generate_branch_bo(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 bo, UINT32 bi, int source, int link)
+void ppc_device::generate_branch_bo(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t bo, uint32_t bi, int source, int link)
{
int skip = compiler->labelnum++;
@@ -1967,8 +1967,8 @@ void ppc_device::generate_branch_bo(drcuml_block *block, compiler_state *compile
int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 opswitch = op >> 26;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t opswitch = op >> 26;
switch (opswitch)
{
@@ -1979,7 +1979,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return FALSE;
case 0x03: /* TWI */
- UML_CMP(block, R32(G_RA(op)), (INT16)G_SIMM(op)); // cmp ra,simm
+ UML_CMP(block, R32(G_RA(op)), (int16_t)G_SIMM(op)); // cmp ra,simm
if (G_TO(op) & 0x10)
UML_EXHc(block, COND_L, *m_exception[EXCEPTION_PROGRAM], 0x20000);// exh program,0x20000,l
if (G_TO(op) & 0x08)
@@ -1993,12 +1993,12 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x07: /* MULLI */
- UML_MULS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), (INT16)G_SIMM(op));
+ UML_MULS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), (int16_t)G_SIMM(op));
// muls rd,rd,ra,simm
return TRUE;
case 0x0e: /* ADDI */
- UML_ADD(block, R32(G_RD(op)), R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
+ UML_ADD(block, R32(G_RD(op)), R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add rd,ra,simm
return TRUE;
case 0x0f: /* ADDIS */
@@ -2013,24 +2013,24 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x0b: /* CMPI */
- UML_CMP(block, R32(G_RA(op)), (INT16)G_SIMM(op)); // cmp ra,uimm
+ UML_CMP(block, R32(G_RA(op)), (int16_t)G_SIMM(op)); // cmp ra,uimm
UML_GETFLGS(block, I0, FLAG_Z | FLAG_V | FLAG_C | FLAG_S); // getflgs i0,zvcs
UML_LOAD(block, I0, m_cmp_cr_table, I0, SIZE_BYTE, SCALE_x1);// load i0,cmp_cr_table,i0,byte
UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
return TRUE;
case 0x08: /* SUBFIC */
- UML_SUB(block, R32(G_RD(op)), (INT16)G_SIMM(op), R32(G_RA(op))); // sub rd,simm,ra
+ UML_SUB(block, R32(G_RD(op)), (int16_t)G_SIMM(op), R32(G_RA(op))); // sub rd,simm,ra
generate_compute_flags(block, desc, FALSE, XER_CA, TRUE); // <update flags>
return TRUE;
case 0x0c: /* ADDIC */
- UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
+ UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), (int16_t)G_SIMM(op)); // add rd,ra,simm
generate_compute_flags(block, desc, FALSE, XER_CA, FALSE); // <update flags>
return TRUE;
case 0x0d: /* ADDIC. */
- UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
+ UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), (int16_t)G_SIMM(op)); // add rd,ra,simm
generate_compute_flags(block, desc, TRUE, XER_CA, FALSE); // <update flags>
return TRUE;
@@ -2101,7 +2101,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return generate_instruction_1f(block, compiler, desc); // <group1f>
case 0x22: /* LBZ */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_read8[m_core->mode]); // callh read8
UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
@@ -2109,7 +2109,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x28: /* LHZ */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_read16[m_core->mode]); // callh read16
UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
@@ -2117,7 +2117,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x2a: /* LHA */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_read16[m_core->mode]); // callh read16
UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
@@ -2125,7 +2125,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x20: /* LWZ */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_read32[m_core->mode]); // callh read32
UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
@@ -2133,7 +2133,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x23: /* LBZU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
UML_CALLH(block, *m_read8[m_core->mode]); // callh read8
@@ -2143,7 +2143,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x29: /* LHZU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
UML_CALLH(block, *m_read16[m_core->mode]); // callh read16
@@ -2153,7 +2153,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x2b: /* LHAU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
UML_CALLH(block, *m_read16[m_core->mode]); // callh read16
@@ -2163,7 +2163,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x21: /* LWZU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
UML_CALLH(block, *m_read32[m_core->mode]); // callh read32
@@ -2173,7 +2173,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x26: /* STB */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_write8[m_core->mode]); // callh write8
@@ -2181,7 +2181,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x2c: /* STH */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs,0xffff
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_write16[m_core->mode]); // callh write16
@@ -2189,7 +2189,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x24: /* STW */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_write32[m_core->mode]); // callh write32
@@ -2197,7 +2197,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x27: /* STBU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
@@ -2207,7 +2207,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x2d: /* STHU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs,0xffff
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
@@ -2217,7 +2217,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x25: /* STWU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
@@ -2231,7 +2231,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
UML_MOV(block, mem(&m_core->tempaddr), R32Z(G_RA(op))); // mov [tempaddr],ra
for (int regnum = G_RD(op); regnum < 32; regnum++)
{
- UML_ADD(block, I0, mem(&m_core->tempaddr), (INT16)G_SIMM(op) + 4 * (regnum - G_RD(op)));
+ UML_ADD(block, I0, mem(&m_core->tempaddr), (int16_t)G_SIMM(op) + 4 * (regnum - G_RD(op)));
// add i0,[tempaddr],simm + 4*(regnum-rd)
UML_CALLH(block, *m_read32align[m_core->mode]); // callh read32align
UML_MOV(block, R32(regnum), I0); // mov regnum,i0
@@ -2244,7 +2244,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
UML_MOV(block, mem(&m_core->tempaddr), R32Z(G_RA(op))); // mov [tempaddr],ra
for (int regnum = G_RS(op); regnum < 32; regnum++)
{
- UML_ADD(block, I0, mem(&m_core->tempaddr), (INT16)G_SIMM(op) + 4 * (regnum - G_RS(op)));
+ UML_ADD(block, I0, mem(&m_core->tempaddr), (int16_t)G_SIMM(op) + 4 * (regnum - G_RS(op)));
// add i0,[tempaddr],simm + 4*(regnum-rs)
UML_MOV(block, I1, R32(regnum)); // mov i1,regnum
UML_CALLH(block, *m_write32align[m_core->mode]); // callh write32align
@@ -2253,7 +2253,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x30: /* LFS */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_read32[m_core->mode]); // callh read32
UML_FSCOPYI(block, F0, I0); // fscopyi f0,i0
@@ -2262,7 +2262,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x32: /* LFD */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_read64[m_core->mode]); // callh read64
UML_FDCOPYI(block, F64(G_RD(op)), I0); // fdcopyi fd,i0
@@ -2270,7 +2270,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x31: /* LFSU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
UML_CALLH(block, *m_read32[m_core->mode]); // callh read32
@@ -2281,7 +2281,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x33: /* LFDU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
UML_CALLH(block, *m_read64[m_core->mode]); // callh read64
@@ -2291,7 +2291,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x34: /* STFS */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_FSFRFLT(block, F0, F64(G_RS(op)), SIZE_QWORD); // fsfrflt f0,fs,qword
UML_ICOPYFS(block, I1, F0); // icopyfs i1,f0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
@@ -2300,7 +2300,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x36: /* STFD */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_ICOPYFD(block, I1, F64(G_RS(op))); // icopyfd i1,fs
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
UML_CALLH(block, *m_write64[m_core->mode]); // callh write64
@@ -2308,7 +2308,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x35: /* STFSU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_FSFRFLT(block, F0, F64(G_RS(op)), SIZE_QWORD); // fsfrflt f0,fs,qword
UML_ICOPYFS(block, I1, F0); // icopyfs i1,f0
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
@@ -2319,7 +2319,7 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 0x37: /* STFDU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_ADD(block, I0, R32(G_RA(op)), (int16_t)G_SIMM(op)); // add i0,ra,simm
UML_ICOPYFD(block, I1, F64(G_RS(op))); // icopyfd i1,fs
UML_MOV(block, mem(&m_core->updateaddr), I0); // mov [updateaddr],i0
UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
@@ -2346,8 +2346,8 @@ int ppc_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
int ppc_device::generate_instruction_13(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 opswitch = (op >> 1) & 0x3ff;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t opswitch = (op >> 1) & 0x3ff;
switch (opswitch)
{
@@ -2483,8 +2483,8 @@ int ppc_device::generate_instruction_13(drcuml_block *block, compiler_state *com
int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 opswitch = (op >> 1) & 0x3ff;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t opswitch = (op >> 1) & 0x3ff;
int item;
switch (opswitch)
@@ -2564,7 +2564,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com
case 0x0ea: /* ADDMEx */
case 0x2ea: /* ADDMEOx */
UML_CARRY(block, SPR32(SPR_XER), 29); // carry [xer],XER_CA
- UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), (UINT32)-1); // addc rd,ra,-1
+ UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), (uint32_t)-1); // addc rd,ra,-1
generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
// <update flags>
return TRUE;
@@ -2605,7 +2605,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com
case 0x2e8: /* SUBFMEOx */
UML_XOR(block, I0, SPR32(SPR_XER), XER_CA); // xor i0,[xer],XER_CA
UML_CARRY(block, I0, 29); // carry i0,XER_CA
- UML_SUBB(block, R32(G_RD(op)), (UINT32)-1, R32(G_RA(op))); // subc rd,-1,ra
+ UML_SUBB(block, R32(G_RD(op)), (uint32_t)-1, R32(G_RA(op))); // subc rd,-1,ra
generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
// <update flags>
return TRUE;
@@ -3283,7 +3283,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com
case 0x153: /* MFSPR */
{
- UINT32 spr = compute_spr(G_SPR(op));
+ uint32_t spr = compute_spr(G_SPR(op));
if (spr == SPR_LR || spr == SPR_CTR || (spr >= SPROEA_SPRG0 && spr <= SPROEA_SPRG3))
UML_MOV(block, R32(G_RD(op)), SPR32(spr)); // mov rd,spr
else if (spr == SPR_XER)
@@ -3314,7 +3314,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com
case 0x173: /* MFTB */
{
- UINT32 tbr = compute_spr(G_SPR(op));
+ uint32_t tbr = compute_spr(G_SPR(op));
if (tbr != SPRVEA_TBL_R && tbr != SPRVEA_TBU_R)
return FALSE;
generate_update_cycles(block, compiler, desc->pc, TRUE); // <update cycles>
@@ -3350,7 +3350,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com
case 0x1d3: /* MTSPR */
{
- UINT32 spr = compute_spr(G_SPR(op));
+ uint32_t spr = compute_spr(G_SPR(op));
if (spr == SPR_LR || spr == SPR_CTR || (spr >= SPROEA_SPRG0 && spr <= SPROEA_SPRG3))
UML_MOV(block, SPR32(spr), R32(G_RS(op))); // mov spr,rs
else if (spr == SPR_XER)
@@ -3406,7 +3406,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com
case 0x143: /* MFDCR */
{
- UINT32 spr = compute_spr(G_SPR(op));
+ uint32_t spr = compute_spr(G_SPR(op));
assert(m_cap & PPCCAP_4XX);
generate_update_cycles(block, compiler, desc->pc, TRUE); // <update cycles>
UML_MOV(block, mem(&m_core->param0), spr); // mov [param0],spr
@@ -3417,7 +3417,7 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com
case 0x1c3: /* MTDCR */
{
- UINT32 spr = compute_spr(G_SPR(op));
+ uint32_t spr = compute_spr(G_SPR(op));
assert(m_cap & PPCCAP_4XX);
generate_update_cycles(block, compiler, desc->pc, TRUE); // <update cycles>
UML_MOV(block, mem(&m_core->param0), spr); // mov [param0],spr
@@ -3464,8 +3464,8 @@ int ppc_device::generate_instruction_1f(drcuml_block *block, compiler_state *com
int ppc_device::generate_instruction_3b(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 opswitch = (op >> 1) & 0x1f;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t opswitch = (op >> 1) & 0x1f;
switch (opswitch)
{
@@ -3572,8 +3572,8 @@ int ppc_device::generate_instruction_3b(drcuml_block *block, compiler_state *com
int ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT32 opswitch = (op >> 1) & 0x3ff;
+ uint32_t op = desc->opptr.l[0];
+ uint32_t opswitch = (op >> 1) & 0x3ff;
if (opswitch & 0x10)
{
@@ -3745,7 +3745,7 @@ int ppc_device::generate_instruction_3f(drcuml_block *block, compiler_state *com
including disassembly of a PowerPC instruction
-------------------------------------------------*/
-void ppc_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op)
+void ppc_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
{
char buffer[100];
if (m_drcuml->logging())
@@ -3762,7 +3762,7 @@ void ppc_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 o
flags
-------------------------------------------------*/
-const char *ppc_device::log_desc_flags_to_string(UINT32 flags)
+const char *ppc_device::log_desc_flags_to_string(uint32_t flags)
{
static char tempbuf[30];
char *dest = tempbuf;
@@ -3816,7 +3816,7 @@ const char *ppc_device::log_desc_flags_to_string(UINT32 flags)
log_register_list - log a list of GPR registers
-------------------------------------------------*/
-void ppc_device::log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist)
+void ppc_device::log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist)
{
static const char *const crtext[4] = { "lt", "gt", "eq", "so" };
int count = 0;
diff --git a/src/devices/cpu/powerpc/ppcfe.cpp b/src/devices/cpu/powerpc/ppcfe.cpp
index 2ebf682ed4c..956fad03374 100644
--- a/src/devices/cpu/powerpc/ppcfe.cpp
+++ b/src/devices/cpu/powerpc/ppcfe.cpp
@@ -56,7 +56,7 @@
// ppc_frontend - constructor
//-------------------------------------------------
-ppc_frontend::ppc_frontend(ppc_device *ppc, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
+ppc_frontend::ppc_frontend(ppc_device *ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
: drc_frontend(*ppc, window_start, window_end, max_sequence),
m_ppc(ppc)
{
@@ -70,7 +70,7 @@ ppc_frontend::ppc_frontend(ppc_device *ppc, UINT32 window_start, UINT32 window_e
bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
- UINT32 op, opswitch;
+ uint32_t op, opswitch;
int regnum;
// compute the physical PC
@@ -166,7 +166,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
- desc.targetpc = (INT16)(G_BD(op) << 2) + ((op & M_AA) ? 0 : desc.pc);
+ desc.targetpc = (int16_t)(G_BD(op) << 2) + ((op & M_AA) ? 0 : desc.pc);
if (desc.targetpc == desc.pc && desc.cycles == 0)
desc.cycles = 1;
return true;
@@ -187,7 +187,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
if (op & M_LK)
LR_MODIFIED(desc);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
- desc.targetpc = ((INT32)(G_LI(op) << 8) >> 6) + ((op & M_AA) ? 0 : desc.pc);
+ desc.targetpc = ((int32_t)(G_LI(op) << 8) >> 6) + ((op & M_AA) ? 0 : desc.pc);
// branch folding
if (desc.targetpc != desc.pc)
desc.cycles = 0;
@@ -362,9 +362,9 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
0x13 group
-------------------------------------------------*/
-bool ppc_frontend::describe_13(UINT32 op, opcode_desc &desc, const opcode_desc *prev)
+bool ppc_frontend::describe_13(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
{
- UINT32 opswitch = (op >> 1) & 0x3ff;
+ uint32_t opswitch = (op >> 1) & 0x3ff;
switch (opswitch)
{
@@ -463,9 +463,9 @@ bool ppc_frontend::describe_13(UINT32 op, opcode_desc &desc, const opcode_desc *
0x1f group
-------------------------------------------------*/
-bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *prev)
+bool ppc_frontend::describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
{
- UINT32 opswitch = (op >> 1) & 0x3ff;
+ uint32_t opswitch = (op >> 1) & 0x3ff;
int spr, regnum;
switch (opswitch)
@@ -1162,9 +1162,9 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
0x3b group
-------------------------------------------------*/
-bool ppc_frontend::describe_3b(UINT32 op, opcode_desc &desc, const opcode_desc *prev)
+bool ppc_frontend::describe_3b(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
{
- UINT32 opswitch = (op >> 1) & 0x1f;
+ uint32_t opswitch = (op >> 1) & 0x1f;
if (!(m_ppc->m_cap & PPCCAP_FPU))
return false;
@@ -1238,9 +1238,9 @@ bool ppc_frontend::describe_3b(UINT32 op, opcode_desc &desc, const opcode_desc *
0x3f group
-------------------------------------------------*/
-bool ppc_frontend::describe_3f(UINT32 op, opcode_desc &desc, const opcode_desc *prev)
+bool ppc_frontend::describe_3f(uint32_t op, opcode_desc &desc, const opcode_desc *prev)
{
- UINT32 opswitch = (op >> 1) & 0x3ff;
+ uint32_t opswitch = (op >> 1) & 0x3ff;
if (!(m_ppc->m_cap & PPCCAP_FPU))
return false;
diff --git a/src/devices/cpu/powerpc/ppcfe.h b/src/devices/cpu/powerpc/ppcfe.h
index 51a4bb86906..697cd9b2438 100644
--- a/src/devices/cpu/powerpc/ppcfe.h
+++ b/src/devices/cpu/powerpc/ppcfe.h
@@ -49,7 +49,7 @@ class ppc_frontend : public drc_frontend
{
public:
// construction/destruction
- ppc_frontend(ppc_device *ppc, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
+ ppc_frontend(ppc_device *ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
protected:
// required overrides
@@ -57,17 +57,17 @@ protected:
private:
// inlines
- UINT32 compute_spr(UINT32 spr) const { return ((spr >> 5) | (spr << 5)) & 0x3ff; }
+ uint32_t compute_spr(uint32_t spr) const { return ((spr >> 5) | (spr << 5)) & 0x3ff; }
bool is_403_class() const { return (m_ppc->m_flavor == ppc_device::PPC_MODEL_403GA || m_ppc->m_flavor == ppc_device::PPC_MODEL_403GB || m_ppc->m_flavor == ppc_device::PPC_MODEL_403GC || m_ppc->m_flavor == ppc_device::PPC_MODEL_403GCX || m_ppc->m_flavor == ppc_device::PPC_MODEL_405GP); }
bool is_601_class() const { return (m_ppc->m_flavor == ppc_device::PPC_MODEL_601); }
bool is_602_class() const { return (m_ppc->m_flavor == ppc_device::PPC_MODEL_602); }
bool is_603_class() const { return (m_ppc->m_flavor == ppc_device::PPC_MODEL_603 || m_ppc->m_flavor == ppc_device::PPC_MODEL_603E || m_ppc->m_flavor == ppc_device::PPC_MODEL_603EV || m_ppc->m_flavor == ppc_device::PPC_MODEL_603R); }
// internal helpers
- bool describe_13(UINT32 op, opcode_desc &desc, const opcode_desc *prev);
- bool describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *prev);
- bool describe_3b(UINT32 op, opcode_desc &desc, const opcode_desc *prev);
- bool describe_3f(UINT32 op, opcode_desc &desc, const opcode_desc *prev);
+ bool describe_13(uint32_t op, opcode_desc &desc, const opcode_desc *prev);
+ bool describe_1f(uint32_t op, opcode_desc &desc, const opcode_desc *prev);
+ bool describe_3b(uint32_t op, opcode_desc &desc, const opcode_desc *prev);
+ bool describe_3f(uint32_t op, opcode_desc &desc, const opcode_desc *prev);
// internal state
ppc_device *m_ppc;
diff --git a/src/devices/cpu/pps4/pps4.cpp b/src/devices/cpu/pps4/pps4.cpp
index 7581097f2fa..a8f0a08e5cc 100644
--- a/src/devices/cpu/pps4/pps4.cpp
+++ b/src/devices/cpu/pps4/pps4.cpp
@@ -70,7 +70,7 @@
const device_type PPS4 = &device_creator<pps4_device>;
-pps4_device::pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+pps4_device::pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, PPS4, "PPS4", tag, owner, clock, "pps4", __FILE__ )
, m_program_config("program", ENDIANNESS_LITTLE, 8, 12)
, m_data_config("data", ENDIANNESS_LITTLE, 8, 12) // 4bit RAM
@@ -82,9 +82,9 @@ pps4_device::pps4_device(const machine_config &mconfig, const char *tag, device_
* @brief pps4_device::M Return the memory at address B
* @return ROM/RAM(B)
*/
-UINT8 pps4_device::M()
+uint8_t pps4_device::M()
{
- UINT8 ret = m_data->read_byte(m_B & ~m_SAG);
+ uint8_t ret = m_data->read_byte(m_B & ~m_SAG);
m_SAG = 0;
return ret;
}
@@ -94,13 +94,13 @@ UINT8 pps4_device::M()
* @brief pps4_device::W Write to the memory address at B
* @return ROM/RAM(B)
*/
-void pps4_device::W(UINT8 data)
+void pps4_device::W(uint8_t data)
{
m_data->write_byte(m_B & ~m_SAG, data);
m_SAG = 0;
}
-offs_t pps4_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t pps4_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( pps4 );
return CPU_DISASSEMBLE_NAME(pps4)(this, buffer, pc, oprom, opram, options);
@@ -113,9 +113,9 @@ offs_t pps4_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
* program counter is incremented. The icount is decremented.
* @return m_I the next opcode
*/
-inline UINT8 pps4_device::ROP()
+inline uint8_t pps4_device::ROP()
{
- const UINT8 op = m_direct->read_byte(m_P & 0xFFF);
+ const uint8_t op = m_direct->read_byte(m_P & 0xFFF);
m_Ip = m_I1; // save previous opcode
m_P = (m_P + 1) & 0xFFF;
m_icount -= 1;
@@ -129,9 +129,9 @@ inline UINT8 pps4_device::ROP()
* icount is decremented.
* @return m_I2 the next argument
*/
-inline UINT8 pps4_device::ARG()
+inline uint8_t pps4_device::ARG()
{
- const UINT8 arg = m_direct->read_byte(m_P & 0xFFF);
+ const uint8_t arg = m_direct->read_byte(m_P & 0xFFF);
m_P = (m_P + 1) & 0xFFF;
m_icount -= 1;
return arg;
@@ -265,7 +265,7 @@ void pps4_device::iADCSK()
*/
void pps4_device::iADI()
{
- const UINT8 imm = ~m_I1 & 15;
+ const uint8_t imm = ~m_I1 & 15;
m_A = m_A + imm;
m_Skip = (m_A >> 4) & 1;
m_A = m_A & 15;
@@ -490,7 +490,7 @@ void pps4_device::iRF2()
*/
void pps4_device::iLD()
{
- const UINT16 i3c = ~m_I1 & 7;
+ const uint16_t i3c = ~m_I1 & 7;
m_A = M();
m_B = m_B ^ (i3c << 4);
}
@@ -513,8 +513,8 @@ void pps4_device::iLD()
*/
void pps4_device::iEX()
{
- const UINT16 i3c = ~m_I1 & 7;
- const UINT8 mem = M();
+ const uint16_t i3c = ~m_I1 & 7;
+ const uint8_t mem = M();
W(m_A);
m_A = mem;
m_B = m_B ^ (i3c << 4);
@@ -542,9 +542,9 @@ void pps4_device::iEX()
*/
void pps4_device::iEXD()
{
- const UINT8 i3c = ~m_I1 & 7;
- const UINT8 mem = M();
- UINT8 bl = m_B & 15;
+ const uint8_t i3c = ~m_I1 & 7;
+ const uint8_t mem = M();
+ uint8_t bl = m_B & 15;
W(m_A);
m_A = mem;
m_B = m_B ^ (i3c << 4);
@@ -696,7 +696,7 @@ void pps4_device::iLBUA()
void pps4_device::iXABL()
{
// swap A and BL
- UINT8 bl = m_B & 15;
+ uint8_t bl = m_B & 15;
m_B = (m_B & ~15) | m_A;
m_A = bl;
}
@@ -717,7 +717,7 @@ void pps4_device::iXABL()
void pps4_device::iXBMX()
{
// swap X and BM
- const UINT8 bm = (m_B >> 4) & 15;
+ const uint8_t bm = (m_B >> 4) & 15;
m_B = (m_B & ~(15 << 4)) | (m_X << 4);
m_X = bm;
}
@@ -786,7 +786,7 @@ void pps4_device::iXS()
*/
void pps4_device::iCYS()
{
- const UINT16 sa = (m_SA >> 4) | (m_A << 8);
+ const uint16_t sa = (m_SA >> 4) | (m_A << 8);
m_A = m_SA & 15;
m_SA = sa;
}
@@ -893,7 +893,7 @@ void pps4_device::iLBL()
*/
void pps4_device::iINCB()
{
- UINT8 bl = m_B & 15;
+ uint8_t bl = m_B & 15;
bl = (bl + 1) & 15;
if (0 == bl) {
LOG(("%s: skip BL=%x\n", __FUNCTION__, bl));
@@ -919,7 +919,7 @@ void pps4_device::iINCB()
*/
void pps4_device::iDECB()
{
- UINT8 bl = m_B & 15;
+ uint8_t bl = m_B & 15;
bl = (bl - 1) & 15;
if (15 == bl) {
LOG(("%s: skip BL=%x\n", __FUNCTION__, bl));
@@ -945,7 +945,7 @@ void pps4_device::iDECB()
*/
void pps4_device::iT()
{
- const UINT16 p = (m_P & ~63) | (m_I1 & 63);
+ const uint16_t p = (m_P & ~63) | (m_I1 & 63);
LOG(("%s: P=%03x I=%02x -> P=%03x\n", __FUNCTION__, m_P, m_I1, p));
m_P = p;
}
@@ -1084,8 +1084,8 @@ void pps4_device::iSKZ()
*/
void pps4_device::iSKBI()
{
- const UINT8 i4 = m_I1 & 15;
- const UINT8 bl = m_B & 15;
+ const uint8_t i4 = m_I1 & 15;
+ const uint8_t bl = m_B & 15;
m_Skip = bl == i4 ? 1 : 0;
}
@@ -1195,7 +1195,7 @@ void pps4_device::iRTNSK()
*/
void pps4_device::iIOL()
{
- UINT8 ac = ((m_B & 15) << 4) | (~m_A & 15);
+ uint8_t ac = ((m_B & 15) << 4) | (~m_A & 15);
m_I2 = ARG();
m_io->write_byte(m_I2, ac);
LOG(("%s: port:%02x <- %x\n", __FUNCTION__, m_I2, ac));
diff --git a/src/devices/cpu/pps4/pps4.h b/src/devices/cpu/pps4/pps4.h
index 4fee82b9328..224060efee1 100644
--- a/src/devices/cpu/pps4/pps4.h
+++ b/src/devices/cpu/pps4/pps4.h
@@ -38,7 +38,7 @@ class pps4_device : public cpu_device
{
public:
// construction/destruction
- pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -46,10 +46,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 3; }
- virtual UINT32 execute_input_lines() const override { return 0; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 3; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -62,9 +62,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -77,32 +77,32 @@ private:
address_space *m_io;
int m_icount;
- UINT8 m_A; //!< Accumulator A(4:1)
- UINT8 m_X; //!< X register X(4:1)
- UINT16 m_P; //!< program counter P(12:1)
- UINT16 m_SA; //!< Shift register SA(12:1)
- UINT16 m_SB; //!< Shift register SB(12:1)
- UINT8 m_Skip; //!< Skip next instruction
- UINT16 m_SAG; //!< Special address generation mask
- UINT16 m_B; //!< B register B(12:1) (BL, BM and BH)
- UINT8 m_C; //!< Carry flip-flop
- UINT8 m_FF1; //!< Flip-flop 1
- UINT8 m_FF2; //!< Flip-flop 2
- UINT8 m_I1; //!< Most recent instruction I(8:1)
- UINT8 m_I2; //!< Most recent parameter I2(8:1)
- UINT8 m_Ip; //!< Previous instruction I(8:1)
+ uint8_t m_A; //!< Accumulator A(4:1)
+ uint8_t m_X; //!< X register X(4:1)
+ uint16_t m_P; //!< program counter P(12:1)
+ uint16_t m_SA; //!< Shift register SA(12:1)
+ uint16_t m_SB; //!< Shift register SB(12:1)
+ uint8_t m_Skip; //!< Skip next instruction
+ uint16_t m_SAG; //!< Special address generation mask
+ uint16_t m_B; //!< B register B(12:1) (BL, BM and BH)
+ uint8_t m_C; //!< Carry flip-flop
+ uint8_t m_FF1; //!< Flip-flop 1
+ uint8_t m_FF2; //!< Flip-flop 2
+ uint8_t m_I1; //!< Most recent instruction I(8:1)
+ uint8_t m_I2; //!< Most recent parameter I2(8:1)
+ uint8_t m_Ip; //!< Previous instruction I(8:1)
//! return memory at address B(12:1)
- inline UINT8 M();
+ inline uint8_t M();
//! write to memory at address B(12:1)
- inline void W(UINT8 data);
+ inline void W(uint8_t data);
//! return the next opcode (also in m_I)
- inline UINT8 ROP();
+ inline uint8_t ROP();
//! return the next argument (also in m_I2)
- inline UINT8 ARG();
+ inline uint8_t ARG();
void iAD(); //!< Add
void iADC(); //!< Add with carry-in
diff --git a/src/devices/cpu/pps4/pps4dasm.cpp b/src/devices/cpu/pps4/pps4dasm.cpp
index cc7f3f488ae..410f7986a60 100644
--- a/src/devices/cpu/pps4/pps4dasm.cpp
+++ b/src/devices/cpu/pps4/pps4dasm.cpp
@@ -93,7 +93,7 @@ static const char *token_str[t_COUNT] = {
"sag" /* special address generation */
};
-static const UINT16 table[] = {
+static const uint16_t table[] = {
/* 00 */ t_LBL | t_I8c,
/* 01 */ t_TML | t_I4 | t_I8,
/* 02 */ t_TML | t_I4 | t_I8,
@@ -369,10 +369,10 @@ static const UINT16 table[] = {
CPU_DISASSEMBLE( pps4 )
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
unsigned PC = pc;
- UINT8 op = OP(pc++);
- UINT32 tok = table[op];
+ uint8_t op = OP(pc++);
+ uint32_t tok = table[op];
char *dst = nullptr;
if (0 == (tok & t_MASK)) {
@@ -383,53 +383,53 @@ CPU_DISASSEMBLE( pps4 )
if (tok & t_I3c) {
// 3 bit immediate, complemented
- UINT8 i = ~op & 7;
+ uint8_t i = ~op & 7;
if (0 != i) // only print if non-zero
dst += sprintf(dst, "%x", i);
}
if (tok & t_I4) {
// 4 bit immediate
- UINT8 i = op & 15;
+ uint8_t i = op & 15;
dst += sprintf(dst, "%x", i);
}
if (tok & t_I4c) {
// 4 bit immediate, complemented
- UINT8 i = ~op & 15;
+ uint8_t i = ~op & 15;
dst += sprintf(dst, "%x", i);
}
if (tok & t_I4p) {
// 4 bit immediate offset into page 3
- UINT8 i = op & 15;
+ uint8_t i = op & 15;
dst += sprintf(dst, "[%x]", 0x0c0 | i);
}
if (tok & t_I6p) {
// 6 bit immediate offset into current page
- UINT8 i = op & 63;
+ uint8_t i = op & 63;
dst += sprintf(dst, "%x", (PC & ~63) | i);
}
if (tok & t_I6i) {
// 6 bit immediate offset into page 3
- UINT16 i6p3 = (3 << 6) | (op & 63);
+ uint16_t i6p3 = (3 << 6) | (op & 63);
// 8 bit absolute offset at 0x0100
- UINT16 addr = (1 << 8) | 0; // ROM[ip3] can't be reached!?
+ uint16_t addr = (1 << 8) | 0; // ROM[ip3] can't be reached!?
(void)addr; // avoid unused variable warning
dst += sprintf(dst, "[%x]", i6p3);
}
if (tok & t_I8) {
// 8 bit immediate I/O port address
- UINT8 arg = ARG(pc++);
+ uint8_t arg = ARG(pc++);
dst += sprintf(dst, "%02x", arg);
}
if (tok & t_I8c) {
// 8 bit immediate offset into page
- UINT16 arg = ~ARG(pc++) & 255;
+ uint16_t arg = ~ARG(pc++) & 255;
dst += sprintf(dst, "%02x", arg);
}
diff --git a/src/devices/cpu/psx/dismips.cpp b/src/devices/cpu/psx/dismips.cpp
index fa00556071b..bfbc3428c94 100644
--- a/src/devices/cpu/psx/dismips.cpp
+++ b/src/devices/cpu/psx/dismips.cpp
@@ -11,29 +11,29 @@
#include "psx.h"
extern CPU_DISASSEMBLE( r3000le );
-extern unsigned dasmmips3(char *,unsigned, UINT32);
+extern unsigned dasmmips3(char *,unsigned, uint32_t);
static struct
{
- UINT8 id[ 8 ];
- UINT32 text; /* SCE only */
- UINT32 data; /* SCE only */
- UINT32 pc0;
- UINT32 gp0; /* SCE only */
- UINT32 t_addr;
- UINT32 t_size;
- UINT32 d_addr; /* SCE only */
- UINT32 d_size; /* SCE only */
- UINT32 b_addr; /* SCE only */
- UINT32 b_size; /* SCE only */
- UINT32 s_addr;
- UINT32 s_size;
- UINT32 SavedSP;
- UINT32 SavedFP;
- UINT32 SavedGP;
- UINT32 SavedRA;
- UINT32 SavedS0;
- UINT8 dummy[ 0x800 - 76 ];
+ uint8_t id[ 8 ];
+ uint32_t text; /* SCE only */
+ uint32_t data; /* SCE only */
+ uint32_t pc0;
+ uint32_t gp0; /* SCE only */
+ uint32_t t_addr;
+ uint32_t t_size;
+ uint32_t d_addr; /* SCE only */
+ uint32_t d_size; /* SCE only */
+ uint32_t b_addr; /* SCE only */
+ uint32_t b_size; /* SCE only */
+ uint32_t s_addr;
+ uint32_t s_size;
+ uint32_t SavedSP;
+ uint32_t SavedFP;
+ uint32_t SavedGP;
+ uint32_t SavedRA;
+ uint32_t SavedS0;
+ uint8_t dummy[ 0x800 - 76 ];
} m_psxexe_header;
#define FORMAT_BIN ( 0 )
@@ -43,9 +43,9 @@ static struct
#define CPU_R3000 ( 1 )
#define CPU_R4000 ( 2 )
-static UINT8 *filebuf;
-static UINT32 offset;
-static UINT8 order[] = { 0, 1, 2, 3 };
+static uint8_t *filebuf;
+static uint32_t offset;
+static uint8_t order[] = { 0, 1, 2, 3 };
static const char *const Options[]=
{
@@ -70,19 +70,19 @@ static void usage (void)
int main( int argc, char *argv[] )
{
FILE *f;
- UINT8 i;
- UINT8 j;
- UINT8 n;
- UINT8 p;
- UINT32 begin;
- UINT32 end;
- UINT32 filelen;
- UINT32 len;
- UINT32 pc;
+ uint8_t i;
+ uint8_t j;
+ uint8_t n;
+ uint8_t p;
+ uint32_t begin;
+ uint32_t end;
+ uint32_t filelen;
+ uint32_t len;
+ uint32_t pc;
char buffer[ 80 ];
char *filename;
- UINT32 format;
- UINT32 cpu;
+ uint32_t format;
+ uint32_t cpu;
filename = nullptr;
begin = 0;
@@ -255,7 +255,7 @@ int main( int argc, char *argv[] )
fseek (f,begin,SEEK_SET);
len=(filelen>end)? (end-begin+1):(filelen-begin);
- filebuf=(UINT8 *)malloc(len+16);
+ filebuf=(uint8_t *)malloc(len+16);
if (!filebuf)
{
printf ("Memory allocation error\n");
@@ -275,10 +275,10 @@ int main( int argc, char *argv[] )
pc = 0;
while( pc < len )
{
- UINT8 op0 = filebuf[ pc + order[ 0 ] ];
- UINT8 op1 = filebuf[ pc + order[ 1 ] ];
- UINT8 op2 = filebuf[ pc + order[ 2 ] ];
- UINT8 op3 = filebuf[ pc + order[ 3 ] ];
+ uint8_t op0 = filebuf[ pc + order[ 0 ] ];
+ uint8_t op1 = filebuf[ pc + order[ 1 ] ];
+ uint8_t op2 = filebuf[ pc + order[ 2 ] ];
+ uint8_t op3 = filebuf[ pc + order[ 3 ] ];
filebuf[ pc + 0 ] = op0;
filebuf[ pc + 1 ] = op1;
filebuf[ pc + 2 ] = op2;
@@ -299,15 +299,15 @@ int main( int argc, char *argv[] )
{
cpu_device *device = nullptr;
int options = 0;
- UINT8 *opram = filebuf + pc;
- UINT8 *oprom = opram;
+ uint8_t *opram = filebuf + pc;
+ uint8_t *oprom = opram;
i = CPU_DISASSEMBLE_CALL( r3000le );
}
break;
case CPU_R4000:
{
- UINT8 *opram = filebuf + pc;
- UINT32 op = ( opram[ 3 ] << 24 ) | ( opram[ 2 ] << 16 ) | ( opram[ 1 ] << 8 ) | ( opram[ 0 ] << 0 );
+ uint8_t *opram = filebuf + pc;
+ uint32_t op = ( opram[ 3 ] << 24 ) | ( opram[ 2 ] << 16 ) | ( opram[ 1 ] << 8 ) | ( opram[ 0 ] << 0 );
i = dasmmips3( buffer, pc + offset, op );
}
break;
diff --git a/src/devices/cpu/psx/dma.cpp b/src/devices/cpu/psx/dma.cpp
index f2f048c39ff..6a382689f40 100644
--- a/src/devices/cpu/psx/dma.cpp
+++ b/src/devices/cpu/psx/dma.cpp
@@ -27,7 +27,7 @@ static inline void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, c
const device_type PSX_DMA = &device_creator<psxdma_device>;
-psxdma_device::psxdma_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+psxdma_device::psxdma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, PSX_DMA, "Sony PSX DMA", tag, owner, clock, "psxdma", __FILE__), m_ram( ), m_ramsize(0), m_dpcp(0), m_dicr(0),
m_irq_handler(*this)
{
@@ -77,7 +77,7 @@ void psxdma_device::device_start()
save_item( NAME(m_dicr) );
}
-void psxdma_device::dma_start_timer( int index, UINT32 n_ticks )
+void psxdma_device::dma_start_timer( int index, uint32_t n_ticks )
{
psx_dma_channel *dma = &m_channel[ index ];
@@ -135,11 +135,11 @@ void psxdma_device::dma_finished( int index )
if( dma->n_channelcontrol == 0x01000401 && index == 2 )
{
- UINT32 n_size;
- UINT32 n_total;
- UINT32 n_address = ( dma->n_base & 0xffffff );
- UINT32 n_adrmask = m_ramsize - 1;
- UINT32 n_nextaddress;
+ uint32_t n_size;
+ uint32_t n_total;
+ uint32_t n_address = ( dma->n_base & 0xffffff );
+ uint32_t n_adrmask = m_ramsize - 1;
+ uint32_t n_nextaddress;
if( n_address != 0xffffff )
{
@@ -233,10 +233,10 @@ WRITE32_MEMBER( psxdma_device::write )
dma->n_channelcontrol = data;
if( ( dma->n_channelcontrol & ( 1L << 0x18 ) ) != 0 && ( m_dpcp & ( 1 << ( 3 + ( index * 4 ) ) ) ) != 0 )
{
- INT32 n_size;
- UINT32 n_address;
- UINT32 n_nextaddress;
- UINT32 n_adrmask;
+ int32_t n_size;
+ uint32_t n_address;
+ uint32_t n_nextaddress;
+ uint32_t n_adrmask;
n_adrmask = m_ramsize - 1;
@@ -244,7 +244,7 @@ WRITE32_MEMBER( psxdma_device::write )
n_size = dma->n_blockcontrol;
if( ( dma->n_channelcontrol & 0x200 ) != 0 )
{
- UINT32 n_ba;
+ uint32_t n_ba;
n_ba = dma->n_blockcontrol >> 16;
if( n_ba == 0 )
{
diff --git a/src/devices/cpu/psx/dma.h b/src/devices/cpu/psx/dma.h
index e241dfac9ac..6a39a29ca5e 100644
--- a/src/devices/cpu/psx/dma.h
+++ b/src/devices/cpu/psx/dma.h
@@ -19,25 +19,25 @@ extern const device_type PSX_DMA;
#define MCFG_PSX_DMA_IRQ_HANDLER(_devcb) \
devcb = &psxdma_device::set_irq_handler(*device, DEVCB_##_devcb);
-typedef delegate<void (UINT32 *, UINT32, INT32)> psx_dma_read_delegate;
-typedef delegate<void (UINT32 *, UINT32, INT32)> psx_dma_write_delegate;
+typedef delegate<void (uint32_t *, uint32_t, int32_t)> psx_dma_read_delegate;
+typedef delegate<void (uint32_t *, uint32_t, int32_t)> psx_dma_write_delegate;
struct psx_dma_channel
{
- UINT32 n_base;
- UINT32 n_blockcontrol;
- UINT32 n_channelcontrol;
+ uint32_t n_base;
+ uint32_t n_blockcontrol;
+ uint32_t n_channelcontrol;
emu_timer *timer;
psx_dma_read_delegate fn_read;
psx_dma_write_delegate fn_write;
- UINT32 n_ticks;
- UINT32 b_running;
+ uint32_t n_ticks;
+ uint32_t b_running;
};
class psxdma_device : public device_t
{
public:
- psxdma_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ psxdma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_irq_handler(device_t &device, _Object object) { return downcast<psxdma_device &>(device).m_irq_handler.set_callback(object); }
@@ -48,7 +48,7 @@ public:
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ32_MEMBER( read );
- UINT32 *m_ram;
+ uint32_t *m_ram;
size_t m_ramsize;
protected:
@@ -58,15 +58,15 @@ protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
private:
- void dma_start_timer( int n_channel, UINT32 n_ticks );
+ void dma_start_timer( int n_channel, uint32_t n_ticks );
void dma_stop_timer( int n_channel );
void dma_timer_adjust( int n_channel );
void dma_interrupt_update();
void dma_finished( int n_channel );
psx_dma_channel m_channel[7];
- UINT32 m_dpcp;
- UINT32 m_dicr;
+ uint32_t m_dpcp;
+ uint32_t m_dicr;
devcb_write_line m_irq_handler;
};
diff --git a/src/devices/cpu/psx/gte.cpp b/src/devices/cpu/psx/gte.cpp
index fb3352737db..cec3214cb47 100644
--- a/src/devices/cpu/psx/gte.cpp
+++ b/src/devices/cpu/psx/gte.cpp
@@ -11,7 +11,7 @@
#include "gte.h"
#if 0
-void ATTR_PRINTF(2,3) GTELOG( UINT32 pc, const char *a, ...)
+void ATTR_PRINTF(2,3) GTELOG( uint32_t pc, const char *a, ...)
{
va_list va;
char s_text[ 1024 ];
@@ -21,7 +21,7 @@ void ATTR_PRINTF(2,3) GTELOG( UINT32 pc, const char *a, ...)
logerror( "%08x: GTE: %s\n", pc, s_text );
}
#else
-static inline void ATTR_PRINTF(2,3) GTELOG( UINT32 pc, const char *a, ...) {}
+static inline void ATTR_PRINTF(2,3) GTELOG( uint32_t pc, const char *a, ...) {}
#endif
@@ -145,9 +145,9 @@ static inline void ATTR_PRINTF(2,3) GTELOG( UINT32 pc, const char *a, ...) {}
#define CV2( n ) ( n < 3 ? m_cp2cr[ ( n << 3 ) + 6 ].sd : 0 )
#define CV3( n ) ( n < 3 ? m_cp2cr[ ( n << 3 ) + 7 ].sd : 0 )
-static UINT32 gte_leadingzerocount( UINT32 lzcs )
+static uint32_t gte_leadingzerocount( uint32_t lzcs )
{
- UINT32 lzcr = 0;
+ uint32_t lzcr = 0;
if( ( lzcs & 0x80000000 ) == 0 )
{
@@ -163,7 +163,7 @@ static UINT32 gte_leadingzerocount( UINT32 lzcs )
return lzcr;
}
-INT32 gte::LIM( INT32 value, INT32 max, INT32 min, UINT32 flag )
+int32_t gte::LIM( int32_t value, int32_t max, int32_t min, uint32_t flag )
{
if( value > max )
{
@@ -178,7 +178,7 @@ INT32 gte::LIM( INT32 value, INT32 max, INT32 min, UINT32 flag )
return value;
}
-UINT32 gte::getcp2dr( UINT32 pc, int reg )
+uint32_t gte::getcp2dr( uint32_t pc, int reg )
{
switch( reg )
{
@@ -189,7 +189,7 @@ UINT32 gte::getcp2dr( UINT32 pc, int reg )
case 9:
case 10:
case 11:
- m_cp2dr[ reg ].d = (INT32)m_cp2dr[ reg ].sw.l;
+ m_cp2dr[ reg ].d = (int32_t)m_cp2dr[ reg ].sw.l;
break;
case 7:
@@ -197,7 +197,7 @@ UINT32 gte::getcp2dr( UINT32 pc, int reg )
case 17:
case 18:
case 19:
- m_cp2dr[ reg ].d = (UINT32)m_cp2dr[ reg ].w.l;
+ m_cp2dr[ reg ].d = (uint32_t)m_cp2dr[ reg ].w.l;
break;
case 15:
@@ -214,7 +214,7 @@ UINT32 gte::getcp2dr( UINT32 pc, int reg )
return m_cp2dr[ reg ].d;
}
-void gte::setcp2dr( UINT32 pc, int reg, UINT32 value )
+void gte::setcp2dr( uint32_t pc, int reg, uint32_t value )
{
GTELOG( pc, "set CP2DR%u=%08x", reg, value );
@@ -243,14 +243,14 @@ void gte::setcp2dr( UINT32 pc, int reg, UINT32 value )
m_cp2dr[ reg ].d = value;
}
-UINT32 gte::getcp2cr( UINT32 pc, int reg )
+uint32_t gte::getcp2cr( uint32_t pc, int reg )
{
GTELOG( pc, "get CP2CR%u=%08x", reg, m_cp2cr[ reg ].d );
return m_cp2cr[ reg ].d;
}
-void gte::setcp2cr( UINT32 pc, int reg, UINT32 value )
+void gte::setcp2cr( uint32_t pc, int reg, uint32_t value )
{
GTELOG( pc, "set CP2CR%u=%08x", reg, value );
@@ -263,7 +263,7 @@ void gte::setcp2cr( UINT32 pc, int reg, UINT32 value )
case 27:
case 29:
case 30:
- value = (INT32)(INT16) value;
+ value = (int32_t)(int16_t) value;
break;
case 31:
@@ -278,7 +278,7 @@ void gte::setcp2cr( UINT32 pc, int reg, UINT32 value )
m_cp2cr[ reg ].d = value;
}
-static inline INT64 gte_shift( INT64 a, int sf )
+static inline int64_t gte_shift( int64_t a, int sf )
{
if( sf > 0 )
{
@@ -292,7 +292,7 @@ static inline INT64 gte_shift( INT64 a, int sf )
return a;
}
-INT32 gte::BOUNDS( int44 value, int max_flag, int min_flag )
+int32_t gte::BOUNDS( int44 value, int max_flag, int min_flag )
{
if( value.positive_overflow() )
{
@@ -307,11 +307,11 @@ INT32 gte::BOUNDS( int44 value, int max_flag, int min_flag )
return gte_shift( value.value(), m_sf );
}
-static inline UINT32 gte_divide( UINT16 numerator, UINT16 denominator )
+static inline uint32_t gte_divide( uint16_t numerator, uint16_t denominator )
{
if( numerator < ( denominator * 2 ) )
{
- static UINT8 table[] =
+ static uint8_t table[] =
{
0xff, 0xfd, 0xfb, 0xf9, 0xf7, 0xf5, 0xf3, 0xf1, 0xef, 0xee, 0xec, 0xea, 0xe8, 0xe6, 0xe4, 0xe3,
0xe1, 0xdf, 0xdd, 0xdc, 0xda, 0xd8, 0xd6, 0xd5, 0xd3, 0xd1, 0xd0, 0xce, 0xcd, 0xcb, 0xc9, 0xc8,
@@ -337,9 +337,9 @@ static inline UINT32 gte_divide( UINT16 numerator, UINT16 denominator )
int r1 = ( denominator << shift ) & 0x7fff;
int r2 = table[ ( ( r1 + 0x40 ) >> 7 ) ] + 0x101;
int r3 = ( ( 0x80 - ( r2 * ( r1 + 0x8000 ) ) ) >> 8 ) & 0x1ffff;
- UINT32 reciprocal = ( ( r2 * r3 ) + 0x80 ) >> 8;
+ uint32_t reciprocal = ( ( r2 * r3 ) + 0x80 ) >> 8;
- return (UINT32)( ( ( (UINT64) reciprocal * ( numerator << shift ) ) + 0x8000 ) >> 16 );
+ return (uint32_t)( ( ( (uint64_t) reciprocal * ( numerator << shift ) ) + 0x8000 ) >> 16 );
}
return 0xffffffff;
@@ -347,17 +347,17 @@ static inline UINT32 gte_divide( UINT16 numerator, UINT16 denominator )
/* Setting bits 12 & 19-22 in FLAG does not set bit 31 */
-INT32 gte::A1( int44 a ) { m_mac1 = a.value(); return BOUNDS( a, ( 1 << 31 ) | ( 1 << 30 ), ( 1 << 31 ) | ( 1 << 27 ) ); }
-INT32 gte::A2( int44 a ) { m_mac2 = a.value(); return BOUNDS( a, ( 1 << 31 ) | ( 1 << 29 ), ( 1 << 31 ) | ( 1 << 26 ) ); }
-INT32 gte::A3( int44 a ) { m_mac3 = a.value(); return BOUNDS( a, ( 1 << 31 ) | ( 1 << 28 ), ( 1 << 31 ) | ( 1 << 25 ) ); }
-INT32 gte::Lm_B1( INT32 a, int lm ) { return LIM( a, 0x7fff, -0x8000 * !lm, ( 1 << 31 ) | ( 1 << 24 ) ); }
-INT32 gte::Lm_B2( INT32 a, int lm ) { return LIM( a, 0x7fff, -0x8000 * !lm, ( 1 << 31 ) | ( 1 << 23 ) ); }
-INT32 gte::Lm_B3( INT32 a, int lm ) { return LIM( a, 0x7fff, -0x8000 * !lm, ( 1 << 22 ) ); }
+int32_t gte::A1( int44 a ) { m_mac1 = a.value(); return BOUNDS( a, ( 1 << 31 ) | ( 1 << 30 ), ( 1 << 31 ) | ( 1 << 27 ) ); }
+int32_t gte::A2( int44 a ) { m_mac2 = a.value(); return BOUNDS( a, ( 1 << 31 ) | ( 1 << 29 ), ( 1 << 31 ) | ( 1 << 26 ) ); }
+int32_t gte::A3( int44 a ) { m_mac3 = a.value(); return BOUNDS( a, ( 1 << 31 ) | ( 1 << 28 ), ( 1 << 31 ) | ( 1 << 25 ) ); }
+int32_t gte::Lm_B1( int32_t a, int lm ) { return LIM( a, 0x7fff, -0x8000 * !lm, ( 1 << 31 ) | ( 1 << 24 ) ); }
+int32_t gte::Lm_B2( int32_t a, int lm ) { return LIM( a, 0x7fff, -0x8000 * !lm, ( 1 << 31 ) | ( 1 << 23 ) ); }
+int32_t gte::Lm_B3( int32_t a, int lm ) { return LIM( a, 0x7fff, -0x8000 * !lm, ( 1 << 22 ) ); }
-INT32 gte::Lm_B3_sf( INT64 value, int sf, int lm )
+int32_t gte::Lm_B3_sf( int64_t value, int sf, int lm )
{
- INT32 value_sf = gte_shift( value, sf );
- INT32 value_12 = gte_shift( value, 1 );
+ int32_t value_sf = gte_shift( value, sf );
+ int32_t value_12 = gte_shift( value, 1 );
int max = 0x7fff;
int min = 0;
if( lm == 0 )
@@ -382,12 +382,12 @@ INT32 gte::Lm_B3_sf( INT64 value, int sf, int lm )
return value_sf;
}
-INT32 gte::Lm_C1( INT32 a ) { return LIM( a, 0x00ff, 0x0000, ( 1 << 21 ) ); }
-INT32 gte::Lm_C2( INT32 a ) { return LIM( a, 0x00ff, 0x0000, ( 1 << 20 ) ); }
-INT32 gte::Lm_C3( INT32 a ) { return LIM( a, 0x00ff, 0x0000, ( 1 << 19 ) ); }
-INT32 gte::Lm_D( INT64 a, int sf ) { return LIM( gte_shift( a, sf ), 0xffff, 0x0000, ( 1 << 31 ) | ( 1 << 18 ) ); }
+int32_t gte::Lm_C1( int32_t a ) { return LIM( a, 0x00ff, 0x0000, ( 1 << 21 ) ); }
+int32_t gte::Lm_C2( int32_t a ) { return LIM( a, 0x00ff, 0x0000, ( 1 << 20 ) ); }
+int32_t gte::Lm_C3( int32_t a ) { return LIM( a, 0x00ff, 0x0000, ( 1 << 19 ) ); }
+int32_t gte::Lm_D( int64_t a, int sf ) { return LIM( gte_shift( a, sf ), 0xffff, 0x0000, ( 1 << 31 ) | ( 1 << 18 ) ); }
-UINT32 gte::Lm_E( UINT32 result )
+uint32_t gte::Lm_E( uint32_t result )
{
if( result == 0xffffffff )
{
@@ -403,7 +403,7 @@ UINT32 gte::Lm_E( UINT32 result )
return result;
}
-INT64 gte::F( INT64 a )
+int64_t gte::F( int64_t a )
{
m_mac0 = a;
@@ -412,7 +412,7 @@ INT64 gte::F( INT64 a )
FLAG |= ( 1 << 31 ) | ( 1 << 16 );
}
- if( a < (INT32) -0x80000000 )
+ if( a < (int32_t) -0x80000000 )
{
FLAG |= ( 1 << 31 ) | ( 1 << 15 );
}
@@ -420,7 +420,7 @@ INT64 gte::F( INT64 a )
return a;
}
-INT32 gte::Lm_G1( INT64 a )
+int32_t gte::Lm_G1( int64_t a )
{
if( a > 0x3ff )
{
@@ -437,7 +437,7 @@ INT32 gte::Lm_G1( INT64 a )
return a;
}
-INT32 gte::Lm_G2( INT64 a )
+int32_t gte::Lm_G2( int64_t a )
{
if( a > 0x3ff )
{
@@ -454,10 +454,10 @@ INT32 gte::Lm_G2( INT64 a )
return a;
}
-INT32 gte::Lm_H( INT64 value, int sf )
+int32_t gte::Lm_H( int64_t value, int sf )
{
- INT64 value_sf = gte_shift( value, sf );
- INT32 value_12 = gte_shift( value, 1 );
+ int64_t value_sf = gte_shift( value, sf );
+ int32_t value_12 = gte_shift( value, 1 );
int max = 0x1000;
int min = 0x0000;
@@ -479,13 +479,13 @@ INT32 gte::Lm_H( INT64 value, int sf )
return value_12;
}
-int gte::docop2( UINT32 pc, int gteop )
+int gte::docop2( uint32_t pc, int gteop )
{
int v;
int lm;
int cv;
int mx;
- INT32 h_over_sz3 = 0;
+ int32_t h_over_sz3 = 0;
lm = GTE_LM( gteop );
m_sf = GTE_SF( gteop );
@@ -498,9 +498,9 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x01:
GTELOG( pc, "%08x RTPS", gteop );
- MAC1 = A1( int44( (INT64) TRX << 12 ) + ( R11 * VX0 ) + ( R12 * VY0 ) + ( R13 * VZ0 ) );
- MAC2 = A2( int44( (INT64) TRY << 12 ) + ( R21 * VX0 ) + ( R22 * VY0 ) + ( R23 * VZ0 ) );
- MAC3 = A3( int44( (INT64) TRZ << 12 ) + ( R31 * VX0 ) + ( R32 * VY0 ) + ( R33 * VZ0 ) );
+ MAC1 = A1( int44( (int64_t) TRX << 12 ) + ( R11 * VX0 ) + ( R12 * VY0 ) + ( R13 * VZ0 ) );
+ MAC2 = A2( int44( (int64_t) TRY << 12 ) + ( R21 * VX0 ) + ( R22 * VY0 ) + ( R23 * VZ0 ) );
+ MAC3 = A3( int44( (int64_t) TRZ << 12 ) + ( R31 * VX0 ) + ( R32 * VY0 ) + ( R33 * VZ0 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3_sf( m_mac3, m_sf, lm );
@@ -511,24 +511,24 @@ int gte::docop2( UINT32 pc, int gteop )
h_over_sz3 = Lm_E( gte_divide( H, SZ3 ) );
SXY0 = SXY1;
SXY1 = SXY2;
- SX2 = Lm_G1( F( (INT64) OFX + ( (INT64) IR1 * h_over_sz3 ) ) >> 16 );
- SY2 = Lm_G2( F( (INT64) OFY + ( (INT64) IR2 * h_over_sz3 ) ) >> 16 );
- MAC0 = F( (INT64) DQB + ( (INT64) DQA * h_over_sz3 ) );
+ SX2 = Lm_G1( F( (int64_t) OFX + ( (int64_t) IR1 * h_over_sz3 ) ) >> 16 );
+ SY2 = Lm_G2( F( (int64_t) OFY + ( (int64_t) IR2 * h_over_sz3 ) ) >> 16 );
+ MAC0 = F( (int64_t) DQB + ( (int64_t) DQA * h_over_sz3 ) );
IR0 = Lm_H( m_mac0, 1 );
return 1;
case 0x06:
GTELOG( pc, "%08x NCLIP", gteop );
- MAC0 = F( (INT64) ( SX0 * SY1 ) + ( SX1 * SY2 ) + ( SX2 * SY0 ) - ( SX0 * SY2 ) - ( SX1 * SY0 ) - ( SX2 * SY1 ) );
+ MAC0 = F( (int64_t) ( SX0 * SY1 ) + ( SX1 * SY2 ) + ( SX2 * SY0 ) - ( SX0 * SY2 ) - ( SX1 * SY0 ) - ( SX2 * SY1 ) );
return 1;
case 0x0c:
GTELOG( pc, "%08x OP", gteop );
- MAC1 = A1( (INT64) ( R22 * IR3 ) - ( R33 * IR2 ) );
- MAC2 = A2( (INT64) ( R33 * IR1 ) - ( R11 * IR3 ) );
- MAC3 = A3( (INT64) ( R11 * IR2 ) - ( R22 * IR1 ) );
+ MAC1 = A1( (int64_t) ( R22 * IR3 ) - ( R33 * IR2 ) );
+ MAC2 = A2( (int64_t) ( R33 * IR1 ) - ( R11 * IR3 ) );
+ MAC3 = A3( (int64_t) ( R11 * IR2 ) - ( R22 * IR1 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -537,9 +537,9 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x10:
GTELOG( pc, "%08x DPCS", gteop );
- MAC1 = A1( ( R << 16 ) + ( IR0 * Lm_B1( A1( ( (INT64) RFC << 12 ) - ( R << 16 ) ), 0 ) ) );
- MAC2 = A2( ( G << 16 ) + ( IR0 * Lm_B2( A2( ( (INT64) GFC << 12 ) - ( G << 16 ) ), 0 ) ) );
- MAC3 = A3( ( B << 16 ) + ( IR0 * Lm_B3( A3( ( (INT64) BFC << 12 ) - ( B << 16 ) ), 0 ) ) );
+ MAC1 = A1( ( R << 16 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( R << 16 ) ), 0 ) ) );
+ MAC2 = A2( ( G << 16 ) + ( IR0 * Lm_B2( A2( ( (int64_t) GFC << 12 ) - ( G << 16 ) ), 0 ) ) );
+ MAC3 = A3( ( B << 16 ) + ( IR0 * Lm_B3( A3( ( (int64_t) BFC << 12 ) - ( B << 16 ) ), 0 ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -554,9 +554,9 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x11:
GTELOG( pc, "%08x INTPL", gteop );
- MAC1 = A1( ( IR1 << 12 ) + ( IR0 * Lm_B1( A1( ( (INT64) RFC << 12 ) - ( IR1 << 12 ) ), 0 ) ) );
- MAC2 = A2( ( IR2 << 12 ) + ( IR0 * Lm_B2( A2( ( (INT64) GFC << 12 ) - ( IR2 << 12 ) ), 0 ) ) );
- MAC3 = A3( ( IR3 << 12 ) + ( IR0 * Lm_B3( A3( ( (INT64) BFC << 12 ) - ( IR3 << 12 ) ), 0 ) ) );
+ MAC1 = A1( ( IR1 << 12 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( IR1 << 12 ) ), 0 ) ) );
+ MAC2 = A2( ( IR2 << 12 ) + ( IR0 * Lm_B2( A2( ( (int64_t) GFC << 12 ) - ( IR2 << 12 ) ), 0 ) ) );
+ MAC3 = A3( ( IR3 << 12 ) + ( IR0 * Lm_B3( A3( ( (int64_t) BFC << 12 ) - ( IR3 << 12 ) ), 0 ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -578,18 +578,18 @@ int gte::docop2( UINT32 pc, int gteop )
switch( cv )
{
case 2:
- MAC1 = A1( (INT64) ( MX12( mx ) * VY( v ) ) + ( MX13( mx ) * VZ( v ) ) );
- MAC2 = A2( (INT64) ( MX22( mx ) * VY( v ) ) + ( MX23( mx ) * VZ( v ) ) );
- MAC3 = A3( (INT64) ( MX32( mx ) * VY( v ) ) + ( MX33( mx ) * VZ( v ) ) );
- Lm_B1( A1( ( (INT64) CV1( cv ) << 12 ) + ( MX11( mx ) * VX( v ) ) ), 0 );
- Lm_B2( A2( ( (INT64) CV2( cv ) << 12 ) + ( MX21( mx ) * VX( v ) ) ), 0 );
- Lm_B3( A3( ( (INT64) CV3( cv ) << 12 ) + ( MX31( mx ) * VX( v ) ) ), 0 );
+ MAC1 = A1( (int64_t) ( MX12( mx ) * VY( v ) ) + ( MX13( mx ) * VZ( v ) ) );
+ MAC2 = A2( (int64_t) ( MX22( mx ) * VY( v ) ) + ( MX23( mx ) * VZ( v ) ) );
+ MAC3 = A3( (int64_t) ( MX32( mx ) * VY( v ) ) + ( MX33( mx ) * VZ( v ) ) );
+ Lm_B1( A1( ( (int64_t) CV1( cv ) << 12 ) + ( MX11( mx ) * VX( v ) ) ), 0 );
+ Lm_B2( A2( ( (int64_t) CV2( cv ) << 12 ) + ( MX21( mx ) * VX( v ) ) ), 0 );
+ Lm_B3( A3( ( (int64_t) CV3( cv ) << 12 ) + ( MX31( mx ) * VX( v ) ) ), 0 );
break;
default:
- MAC1 = A1( int44( (INT64) CV1( cv ) << 12 ) + ( MX11( mx ) * VX( v ) ) + ( MX12( mx ) * VY( v ) ) + ( MX13( mx ) * VZ( v ) ) );
- MAC2 = A2( int44( (INT64) CV2( cv ) << 12 ) + ( MX21( mx ) * VX( v ) ) + ( MX22( mx ) * VY( v ) ) + ( MX23( mx ) * VZ( v ) ) );
- MAC3 = A3( int44( (INT64) CV3( cv ) << 12 ) + ( MX31( mx ) * VX( v ) ) + ( MX32( mx ) * VY( v ) ) + ( MX33( mx ) * VZ( v ) ) );
+ MAC1 = A1( int44( (int64_t) CV1( cv ) << 12 ) + ( MX11( mx ) * VX( v ) ) + ( MX12( mx ) * VY( v ) ) + ( MX13( mx ) * VZ( v ) ) );
+ MAC2 = A2( int44( (int64_t) CV2( cv ) << 12 ) + ( MX21( mx ) * VX( v ) ) + ( MX22( mx ) * VY( v ) ) + ( MX23( mx ) * VZ( v ) ) );
+ MAC3 = A3( int44( (int64_t) CV3( cv ) << 12 ) + ( MX31( mx ) * VX( v ) ) + ( MX32( mx ) * VY( v ) ) + ( MX33( mx ) * VZ( v ) ) );
break;
}
@@ -601,21 +601,21 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x13:
GTELOG( pc, "%08x NCDS", gteop );
- MAC1 = A1( (INT64) ( L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) );
- MAC2 = A2( (INT64) ( L21 * VX0 ) + ( L22 * VY0 ) + ( L23 * VZ0 ) );
- MAC3 = A3( (INT64) ( L31 * VX0 ) + ( L32 * VY0 ) + ( L33 * VZ0 ) );
+ MAC1 = A1( (int64_t) ( L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) );
+ MAC2 = A2( (int64_t) ( L21 * VX0 ) + ( L22 * VY0 ) + ( L23 * VZ0 ) );
+ MAC3 = A3( (int64_t) ( L31 * VX0 ) + ( L32 * VY0 ) + ( L33 * VZ0 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( int44( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
- MAC2 = A2( int44( (INT64) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
- MAC3 = A3( int44( (INT64) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
+ MAC1 = A1( int44( (int64_t) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
+ MAC2 = A2( int44( (int64_t) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
+ MAC3 = A3( int44( (int64_t) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( ( ( R << 4 ) * IR1 ) + ( IR0 * Lm_B1( A1( ( (INT64) RFC << 12 ) - ( ( R << 4 ) * IR1 ) ), 0 ) ) );
- MAC2 = A2( ( ( G << 4 ) * IR2 ) + ( IR0 * Lm_B2( A2( ( (INT64) GFC << 12 ) - ( ( G << 4 ) * IR2 ) ), 0 ) ) );
- MAC3 = A3( ( ( B << 4 ) * IR3 ) + ( IR0 * Lm_B3( A3( ( (INT64) BFC << 12 ) - ( ( B << 4 ) * IR3 ) ), 0 ) ) );
+ MAC1 = A1( ( ( R << 4 ) * IR1 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( ( R << 4 ) * IR1 ) ), 0 ) ) );
+ MAC2 = A2( ( ( G << 4 ) * IR2 ) + ( IR0 * Lm_B2( A2( ( (int64_t) GFC << 12 ) - ( ( G << 4 ) * IR2 ) ), 0 ) ) );
+ MAC3 = A3( ( ( B << 4 ) * IR3 ) + ( IR0 * Lm_B3( A3( ( (int64_t) BFC << 12 ) - ( ( B << 4 ) * IR3 ) ), 0 ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -630,15 +630,15 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x14:
GTELOG( pc, "%08x CDP", gteop );
- MAC1 = A1( int44( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
- MAC2 = A2( int44( (INT64) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
- MAC3 = A3( int44( (INT64) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
+ MAC1 = A1( int44( (int64_t) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
+ MAC2 = A2( int44( (int64_t) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
+ MAC3 = A3( int44( (int64_t) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( ( ( R << 4 ) * IR1 ) + ( IR0 * Lm_B1( A1( ( (INT64) RFC << 12 ) - ( ( R << 4 ) * IR1 ) ), 0 ) ) );
- MAC2 = A2( ( ( G << 4 ) * IR2 ) + ( IR0 * Lm_B2( A2( ( (INT64) GFC << 12 ) - ( ( G << 4 ) * IR2 ) ), 0 ) ) );
- MAC3 = A3( ( ( B << 4 ) * IR3 ) + ( IR0 * Lm_B3( A3( ( (INT64) BFC << 12 ) - ( ( B << 4 ) * IR3 ) ), 0 ) ) );
+ MAC1 = A1( ( ( R << 4 ) * IR1 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( ( R << 4 ) * IR1 ) ), 0 ) ) );
+ MAC2 = A2( ( ( G << 4 ) * IR2 ) + ( IR0 * Lm_B2( A2( ( (int64_t) GFC << 12 ) - ( ( G << 4 ) * IR2 ) ), 0 ) ) );
+ MAC3 = A3( ( ( B << 4 ) * IR3 ) + ( IR0 * Lm_B3( A3( ( (int64_t) BFC << 12 ) - ( ( B << 4 ) * IR3 ) ), 0 ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -655,21 +655,21 @@ int gte::docop2( UINT32 pc, int gteop )
for( v = 0; v < 3; v++ )
{
- MAC1 = A1( (INT64) ( L11 * VX( v ) ) + ( L12 * VY( v ) ) + ( L13 * VZ( v ) ) );
- MAC2 = A2( (INT64) ( L21 * VX( v ) ) + ( L22 * VY( v ) ) + ( L23 * VZ( v ) ) );
- MAC3 = A3( (INT64) ( L31 * VX( v ) ) + ( L32 * VY( v ) ) + ( L33 * VZ( v ) ) );
+ MAC1 = A1( (int64_t) ( L11 * VX( v ) ) + ( L12 * VY( v ) ) + ( L13 * VZ( v ) ) );
+ MAC2 = A2( (int64_t) ( L21 * VX( v ) ) + ( L22 * VY( v ) ) + ( L23 * VZ( v ) ) );
+ MAC3 = A3( (int64_t) ( L31 * VX( v ) ) + ( L32 * VY( v ) ) + ( L33 * VZ( v ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( int44( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
- MAC2 = A2( int44( (INT64) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
- MAC3 = A3( int44( (INT64) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
+ MAC1 = A1( int44( (int64_t) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
+ MAC2 = A2( int44( (int64_t) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
+ MAC3 = A3( int44( (int64_t) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( ( ( R << 4 ) * IR1 ) + ( IR0 * Lm_B1( A1( ( (INT64) RFC << 12 ) - ( ( R << 4 ) * IR1 ) ), 0 ) ) );
- MAC2 = A2( ( ( G << 4 ) * IR2 ) + ( IR0 * Lm_B2( A2( ( (INT64) GFC << 12 ) - ( ( G << 4 ) * IR2 ) ), 0 ) ) );
- MAC3 = A3( ( ( B << 4 ) * IR3 ) + ( IR0 * Lm_B3( A3( ( (INT64) BFC << 12 ) - ( ( B << 4 ) * IR3 ) ), 0 ) ) );
+ MAC1 = A1( ( ( R << 4 ) * IR1 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( ( R << 4 ) * IR1 ) ), 0 ) ) );
+ MAC2 = A2( ( ( G << 4 ) * IR2 ) + ( IR0 * Lm_B2( A2( ( (int64_t) GFC << 12 ) - ( ( G << 4 ) * IR2 ) ), 0 ) ) );
+ MAC3 = A3( ( ( B << 4 ) * IR3 ) + ( IR0 * Lm_B3( A3( ( (int64_t) BFC << 12 ) - ( ( B << 4 ) * IR3 ) ), 0 ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -685,15 +685,15 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x1b:
GTELOG( pc, "%08x NCCS", gteop );
- MAC1 = A1( (INT64) ( L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) );
- MAC2 = A2( (INT64) ( L21 * VX0 ) + ( L22 * VY0 ) + ( L23 * VZ0 ) );
- MAC3 = A3( (INT64) ( L31 * VX0 ) + ( L32 * VY0 ) + ( L33 * VZ0 ) );
+ MAC1 = A1( (int64_t) ( L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) );
+ MAC2 = A2( (int64_t) ( L21 * VX0 ) + ( L22 * VY0 ) + ( L23 * VZ0 ) );
+ MAC3 = A3( (int64_t) ( L31 * VX0 ) + ( L32 * VY0 ) + ( L33 * VZ0 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( int44( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
- MAC2 = A2( int44( (INT64) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
- MAC3 = A3( int44( (INT64) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
+ MAC1 = A1( int44( (int64_t) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
+ MAC2 = A2( int44( (int64_t) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
+ MAC3 = A3( int44( (int64_t) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -714,9 +714,9 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x1c:
GTELOG( pc, "%08x CC", gteop );
- MAC1 = A1( int44( ( (INT64) RBK ) << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
- MAC2 = A2( int44( ( (INT64) GBK ) << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
- MAC3 = A3( int44( ( (INT64) BBK ) << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
+ MAC1 = A1( int44( ( (int64_t) RBK ) << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
+ MAC2 = A2( int44( ( (int64_t) GBK ) << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
+ MAC3 = A3( int44( ( (int64_t) BBK ) << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -737,15 +737,15 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x1e:
GTELOG( pc, "%08x NCS", gteop );
- MAC1 = A1( (INT64) ( L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) );
- MAC2 = A2( (INT64) ( L21 * VX0 ) + ( L22 * VY0 ) + ( L23 * VZ0 ) );
- MAC3 = A3( (INT64) ( L31 * VX0 ) + ( L32 * VY0 ) + ( L33 * VZ0 ) );
+ MAC1 = A1( (int64_t) ( L11 * VX0 ) + ( L12 * VY0 ) + ( L13 * VZ0 ) );
+ MAC2 = A2( (int64_t) ( L21 * VX0 ) + ( L22 * VY0 ) + ( L23 * VZ0 ) );
+ MAC3 = A3( (int64_t) ( L31 * VX0 ) + ( L32 * VY0 ) + ( L33 * VZ0 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( int44( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
- MAC2 = A2( int44( (INT64) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
- MAC3 = A3( int44( (INT64) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
+ MAC1 = A1( int44( (int64_t) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
+ MAC2 = A2( int44( (int64_t) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
+ MAC3 = A3( int44( (int64_t) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -762,15 +762,15 @@ int gte::docop2( UINT32 pc, int gteop )
for( v = 0; v < 3; v++ )
{
- MAC1 = A1( (INT64) ( L11 * VX( v ) ) + ( L12 * VY( v ) ) + ( L13 * VZ( v ) ) );
- MAC2 = A2( (INT64) ( L21 * VX( v ) ) + ( L22 * VY( v ) ) + ( L23 * VZ( v ) ) );
- MAC3 = A3( (INT64) ( L31 * VX( v ) ) + ( L32 * VY( v ) ) + ( L33 * VZ( v ) ) );
+ MAC1 = A1( (int64_t) ( L11 * VX( v ) ) + ( L12 * VY( v ) ) + ( L13 * VZ( v ) ) );
+ MAC2 = A2( (int64_t) ( L21 * VX( v ) ) + ( L22 * VY( v ) ) + ( L23 * VZ( v ) ) );
+ MAC3 = A3( (int64_t) ( L31 * VX( v ) ) + ( L32 * VY( v ) ) + ( L33 * VZ( v ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( int44( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
- MAC2 = A2( int44( (INT64) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
- MAC3 = A3( int44( (INT64) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
+ MAC1 = A1( int44( (int64_t) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
+ MAC2 = A2( int44( (int64_t) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
+ MAC3 = A3( int44( (int64_t) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -798,9 +798,9 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x29:
GTELOG( pc, "%08x DPCL", gteop );
- MAC1 = A1( ( ( R << 4 ) * IR1 ) + ( IR0 * Lm_B1( A1( ( (INT64) RFC << 12 ) - ( ( R << 4 ) * IR1 ) ), 0 ) ) );
- MAC2 = A2( ( ( G << 4 ) * IR2 ) + ( IR0 * Lm_B2( A2( ( (INT64) GFC << 12 ) - ( ( G << 4 ) * IR2 ) ), 0 ) ) );
- MAC3 = A3( ( ( B << 4 ) * IR3 ) + ( IR0 * Lm_B3( A3( ( (INT64) BFC << 12 ) - ( ( B << 4 ) * IR3 ) ), 0 ) ) );
+ MAC1 = A1( ( ( R << 4 ) * IR1 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( ( R << 4 ) * IR1 ) ), 0 ) ) );
+ MAC2 = A2( ( ( G << 4 ) * IR2 ) + ( IR0 * Lm_B2( A2( ( (int64_t) GFC << 12 ) - ( ( G << 4 ) * IR2 ) ), 0 ) ) );
+ MAC3 = A3( ( ( B << 4 ) * IR3 ) + ( IR0 * Lm_B3( A3( ( (int64_t) BFC << 12 ) - ( ( B << 4 ) * IR3 ) ), 0 ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -817,9 +817,9 @@ int gte::docop2( UINT32 pc, int gteop )
for( v = 0; v < 3; v++ )
{
- MAC1 = A1( ( R0 << 16 ) + ( IR0 * Lm_B1( A1( ( (INT64) RFC << 12 ) - ( R0 << 16 ) ), 0 ) ) );
- MAC2 = A2( ( G0 << 16 ) + ( IR0 * Lm_B2( A2( ( (INT64) GFC << 12 ) - ( G0 << 16 ) ), 0 ) ) );
- MAC3 = A3( ( B0 << 16 ) + ( IR0 * Lm_B3( A3( ( (INT64) BFC << 12 ) - ( B0 << 16 ) ), 0 ) ) );
+ MAC1 = A1( ( R0 << 16 ) + ( IR0 * Lm_B1( A1( ( (int64_t) RFC << 12 ) - ( R0 << 16 ) ), 0 ) ) );
+ MAC2 = A2( ( G0 << 16 ) + ( IR0 * Lm_B2( A2( ( (int64_t) GFC << 12 ) - ( G0 << 16 ) ), 0 ) ) );
+ MAC3 = A3( ( B0 << 16 ) + ( IR0 * Lm_B3( A3( ( (int64_t) BFC << 12 ) - ( B0 << 16 ) ), 0 ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
@@ -835,14 +835,14 @@ int gte::docop2( UINT32 pc, int gteop )
case 0x2d:
GTELOG( pc, "%08x AVSZ3", gteop );
- MAC0 = F( (INT64) ( ZSF3 * SZ1 ) + ( ZSF3 * SZ2 ) + ( ZSF3 * SZ3 ) );
+ MAC0 = F( (int64_t) ( ZSF3 * SZ1 ) + ( ZSF3 * SZ2 ) + ( ZSF3 * SZ3 ) );
OTZ = Lm_D( m_mac0, 1 );
return 1;
case 0x2e:
GTELOG( pc, "%08x AVSZ4", gteop );
- MAC0 = F( (INT64) ( ZSF4 * SZ0 ) + ( ZSF4 * SZ1 ) + ( ZSF4 * SZ2 ) + ( ZSF4 * SZ3 ) );
+ MAC0 = F( (int64_t) ( ZSF4 * SZ0 ) + ( ZSF4 * SZ1 ) + ( ZSF4 * SZ2 ) + ( ZSF4 * SZ3 ) );
OTZ = Lm_D( m_mac0, 1 );
return 1;
@@ -851,9 +851,9 @@ int gte::docop2( UINT32 pc, int gteop )
for( v = 0; v < 3; v++ )
{
- MAC1 = A1( int44( (INT64) TRX << 12 ) + ( R11 * VX( v ) ) + ( R12 * VY( v ) ) + ( R13 * VZ( v ) ) );
- MAC2 = A2( int44( (INT64) TRY << 12 ) + ( R21 * VX( v ) ) + ( R22 * VY( v ) ) + ( R23 * VZ( v ) ) );
- MAC3 = A3( int44( (INT64) TRZ << 12 ) + ( R31 * VX( v ) ) + ( R32 * VY( v ) ) + ( R33 * VZ( v ) ) );
+ MAC1 = A1( int44( (int64_t) TRX << 12 ) + ( R11 * VX( v ) ) + ( R12 * VY( v ) ) + ( R13 * VZ( v ) ) );
+ MAC2 = A2( int44( (int64_t) TRY << 12 ) + ( R21 * VX( v ) ) + ( R22 * VY( v ) ) + ( R23 * VZ( v ) ) );
+ MAC3 = A3( int44( (int64_t) TRZ << 12 ) + ( R31 * VX( v ) ) + ( R32 * VY( v ) ) + ( R33 * VZ( v ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3_sf( m_mac3, m_sf, lm );
@@ -864,11 +864,11 @@ int gte::docop2( UINT32 pc, int gteop )
h_over_sz3 = Lm_E( gte_divide( H, SZ3 ) );
SXY0 = SXY1;
SXY1 = SXY2;
- SX2 = Lm_G1( F( (INT64) OFX + ( (INT64) IR1 * h_over_sz3 ) ) >> 16 );
- SY2 = Lm_G2( F( (INT64) OFY + ( (INT64) IR2 * h_over_sz3 ) ) >> 16 );
+ SX2 = Lm_G1( F( (int64_t) OFX + ( (int64_t) IR1 * h_over_sz3 ) ) >> 16 );
+ SY2 = Lm_G2( F( (int64_t) OFY + ( (int64_t) IR2 * h_over_sz3 ) ) >> 16 );
}
- MAC0 = F( (INT64) DQB + ( (INT64) DQA * h_over_sz3 ) );
+ MAC0 = F( (int64_t) DQB + ( (int64_t) DQA * h_over_sz3 ) );
IR0 = Lm_H( m_mac0, 1 );
return 1;
@@ -911,15 +911,15 @@ int gte::docop2( UINT32 pc, int gteop )
for( v = 0; v < 3; v++ )
{
- MAC1 = A1( (INT64) ( L11 * VX( v ) ) + ( L12 * VY( v ) ) + ( L13 * VZ( v ) ) );
- MAC2 = A2( (INT64) ( L21 * VX( v ) ) + ( L22 * VY( v ) ) + ( L23 * VZ( v ) ) );
- MAC3 = A3( (INT64) ( L31 * VX( v ) ) + ( L32 * VY( v ) ) + ( L33 * VZ( v ) ) );
+ MAC1 = A1( (int64_t) ( L11 * VX( v ) ) + ( L12 * VY( v ) ) + ( L13 * VZ( v ) ) );
+ MAC2 = A2( (int64_t) ( L21 * VX( v ) ) + ( L22 * VY( v ) ) + ( L23 * VZ( v ) ) );
+ MAC3 = A3( (int64_t) ( L31 * VX( v ) ) + ( L32 * VY( v ) ) + ( L33 * VZ( v ) ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
- MAC1 = A1( int44( (INT64) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
- MAC2 = A2( int44( (INT64) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
- MAC3 = A3( int44( (INT64) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
+ MAC1 = A1( int44( (int64_t) RBK << 12 ) + ( LR1 * IR1 ) + ( LR2 * IR2 ) + ( LR3 * IR3 ) );
+ MAC2 = A2( int44( (int64_t) GBK << 12 ) + ( LG1 * IR1 ) + ( LG2 * IR2 ) + ( LG3 * IR3 ) );
+ MAC3 = A3( int44( (int64_t) BBK << 12 ) + ( LB1 * IR1 ) + ( LB2 * IR2 ) + ( LB3 * IR3 ) );
IR1 = Lm_B1( MAC1, lm );
IR2 = Lm_B2( MAC2, lm );
IR3 = Lm_B3( MAC3, lm );
diff --git a/src/devices/cpu/psx/gte.h b/src/devices/cpu/psx/gte.h
index 3a1ef18ba2d..9402c302035 100644
--- a/src/devices/cpu/psx/gte.h
+++ b/src/devices/cpu/psx/gte.h
@@ -31,33 +31,33 @@ public:
PAIR m_cp2cr[ 32 ];
PAIR m_cp2dr[ 32 ];
- UINT32 getcp2dr( UINT32 pc, int reg );
- void setcp2dr( UINT32 pc, int reg, UINT32 value );
- UINT32 getcp2cr( UINT32 pc, int reg );
- void setcp2cr( UINT32 pc, int reg, UINT32 value );
- int docop2( UINT32 pc, int gteop );
+ uint32_t getcp2dr( uint32_t pc, int reg );
+ void setcp2dr( uint32_t pc, int reg, uint32_t value );
+ uint32_t getcp2cr( uint32_t pc, int reg );
+ void setcp2cr( uint32_t pc, int reg, uint32_t value );
+ int docop2( uint32_t pc, int gteop );
protected:
class int44
{
public:
- int44( INT64 value ) :
+ int44( int64_t value ) :
m_value( value ),
m_positive_overflow( value > S64( 0x7ffffffffff ) ),
m_negative_overflow( value < S64( -0x80000000000 ) )
{
}
- int44( INT64 value, bool positive_overflow, bool negative_overflow ) :
+ int44( int64_t value, bool positive_overflow, bool negative_overflow ) :
m_value( value ),
m_positive_overflow( positive_overflow ),
m_negative_overflow( negative_overflow )
{
}
- int44 operator+( INT64 add )
+ int44 operator+( int64_t add )
{
- INT64 value = ( ( m_value + add ) << 20 ) >> 20;
+ int64_t value = ( ( m_value + add ) << 20 ) >> 20;
return int44( value,
m_positive_overflow || ( value < 0 && m_value >= 0 && add >= 0 ),
@@ -74,41 +74,41 @@ protected:
return m_negative_overflow;
}
- INT64 value()
+ int64_t value()
{
return m_value;
}
private:
- INT64 m_value;
+ int64_t m_value;
bool m_positive_overflow;
bool m_negative_overflow;
};
- INT32 LIM( INT32 value, INT32 max, INT32 min, UINT32 flag );
- INT32 BOUNDS( int44 a, int max_flag, int min_flag );
- INT32 A1( int44 a );
- INT32 A2( int44 a );
- INT32 A3( int44 a );
- INT32 Lm_B1( INT32 a, int lm );
- INT32 Lm_B2( INT32 a, int lm );
- INT32 Lm_B3( INT32 a, int lm );
- INT32 Lm_B3_sf( INT64 value, int sf, int lm );
- INT32 Lm_C1( INT32 a );
- INT32 Lm_C2( INT32 a );
- INT32 Lm_C3( INT32 a );
- INT32 Lm_D( INT64 a, int sf );
- UINT32 Lm_E( UINT32 result );
- INT64 F( INT64 a );
- INT32 Lm_G1( INT64 a );
- INT32 Lm_G2( INT64 a );
- INT32 Lm_H( INT64 value, int sf );
+ int32_t LIM( int32_t value, int32_t max, int32_t min, uint32_t flag );
+ int32_t BOUNDS( int44 a, int max_flag, int min_flag );
+ int32_t A1( int44 a );
+ int32_t A2( int44 a );
+ int32_t A3( int44 a );
+ int32_t Lm_B1( int32_t a, int lm );
+ int32_t Lm_B2( int32_t a, int lm );
+ int32_t Lm_B3( int32_t a, int lm );
+ int32_t Lm_B3_sf( int64_t value, int sf, int lm );
+ int32_t Lm_C1( int32_t a );
+ int32_t Lm_C2( int32_t a );
+ int32_t Lm_C3( int32_t a );
+ int32_t Lm_D( int64_t a, int sf );
+ uint32_t Lm_E( uint32_t result );
+ int64_t F( int64_t a );
+ int32_t Lm_G1( int64_t a );
+ int32_t Lm_G2( int64_t a );
+ int32_t Lm_H( int64_t value, int sf );
int m_sf;
- INT64 m_mac0;
- INT64 m_mac1;
- INT64 m_mac2;
- INT64 m_mac3;
+ int64_t m_mac0;
+ int64_t m_mac1;
+ int64_t m_mac2;
+ int64_t m_mac3;
};
#endif
diff --git a/src/devices/cpu/psx/irq.cpp b/src/devices/cpu/psx/irq.cpp
index 4a2293d758c..50ed189abc5 100644
--- a/src/devices/cpu/psx/irq.cpp
+++ b/src/devices/cpu/psx/irq.cpp
@@ -29,7 +29,7 @@ static inline void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, c
const device_type PSX_IRQ = &device_creator<psxirq_device>;
-psxirq_device::psxirq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+psxirq_device::psxirq_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, PSX_IRQ, "Sony PSX IRQ", tag, owner, clock, "psxirq", __FILE__), n_irqdata(0), n_irqmask(0),
m_irq_handler(*this)
{
@@ -56,7 +56,7 @@ void psxirq_device::device_start()
save_item( NAME( n_irqmask ) );
}
-void psxirq_device::set( UINT32 bitmask )
+void psxirq_device::set( uint32_t bitmask )
{
verboselog( *this, 2, "psx_irq_set %08x\n", bitmask );
n_irqdata |= bitmask;
diff --git a/src/devices/cpu/psx/irq.h b/src/devices/cpu/psx/irq.h
index 69e95207230..7cc83e8cfb3 100644
--- a/src/devices/cpu/psx/irq.h
+++ b/src/devices/cpu/psx/irq.h
@@ -22,7 +22,7 @@ extern const device_type PSX_IRQ;
class psxirq_device : public device_t
{
public:
- psxirq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ psxirq_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_irq_handler(device_t &device, _Object object) { return downcast<psxirq_device &>(device).m_irq_handler.set_callback(object); }
@@ -49,10 +49,10 @@ protected:
private:
void psx_irq_update( void );
- void set( UINT32 bitmask );
+ void set( uint32_t bitmask );
- UINT32 n_irqdata;
- UINT32 n_irqmask;
+ uint32_t n_irqdata;
+ uint32_t n_irqmask;
devcb_write_line m_irq_handler;
};
diff --git a/src/devices/cpu/psx/mdec.cpp b/src/devices/cpu/psx/mdec.cpp
index 3c0148525d5..c91c50d1d43 100644
--- a/src/devices/cpu/psx/mdec.cpp
+++ b/src/devices/cpu/psx/mdec.cpp
@@ -30,7 +30,7 @@ static inline void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, c
const device_type PSX_MDEC = &device_creator<psxmdec_device>;
-psxmdec_device::psxmdec_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+psxmdec_device::psxmdec_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, PSX_MDEC, "Sony PSX MDEC", tag, owner, clock, "psxmdec", __FILE__), n_decoded(0), n_offset(0), n_0_command(0), n_0_address(0), n_0_size(0), n_1_command(0), n_1_status(0)
{
}
@@ -83,18 +83,18 @@ void psxmdec_device::device_start()
}
#ifdef UNUSED_FUNCTION
-static inline void psxwriteword( UINT32 *p_n_psxram, UINT32 n_address, UINT16 n_data )
+static inline void psxwriteword( uint32_t *p_n_psxram, uint32_t n_address, uint16_t n_data )
{
- *( (UINT16 *)( (UINT8 *)p_n_psxram + WORD_XOR_LE( n_address ) ) ) = n_data;
+ *( (uint16_t *)( (uint8_t *)p_n_psxram + WORD_XOR_LE( n_address ) ) ) = n_data;
}
#endif
-static inline UINT16 psxreadword( UINT32 *p_n_psxram, UINT32 n_address )
+static inline uint16_t psxreadword( uint32_t *p_n_psxram, uint32_t n_address )
{
- return *( (UINT16 *)( (UINT8 *)p_n_psxram + WORD_XOR_LE( n_address ) ) );
+ return *( (uint16_t *)( (uint8_t *)p_n_psxram + WORD_XOR_LE( n_address ) ) );
}
-static const UINT32 m_p_n_mdec_zigzag[ DCTSIZE2 ] =
+static const uint32_t m_p_n_mdec_zigzag[ DCTSIZE2 ] =
{
0, 1, 8, 16, 9, 2, 3, 10,
17, 24, 32, 25, 18, 11, 4, 5,
@@ -108,11 +108,11 @@ static const UINT32 m_p_n_mdec_zigzag[ DCTSIZE2 ] =
void psxmdec_device::mdec_cos_precalc()
{
- UINT32 n_x;
- UINT32 n_y;
- UINT32 n_u;
- UINT32 n_v;
- INT32 *p_n_precalc = p_n_cos_precalc;
+ uint32_t n_x;
+ uint32_t n_y;
+ uint32_t n_u;
+ uint32_t n_v;
+ int32_t *p_n_precalc = p_n_cos_precalc;
for( n_y = 0; n_y < 8; n_y++ )
{
@@ -131,18 +131,18 @@ void psxmdec_device::mdec_cos_precalc()
}
}
-void psxmdec_device::mdec_idct( INT32 *p_n_src, INT32 *p_n_dst )
+void psxmdec_device::mdec_idct( int32_t *p_n_src, int32_t *p_n_dst )
{
- INT32 *p_n_precalc = p_n_cos_precalc;
+ int32_t *p_n_precalc = p_n_cos_precalc;
- for( UINT32 n_yx = 0; n_yx < DCTSIZE2; n_yx++ )
+ for( uint32_t n_yx = 0; n_yx < DCTSIZE2; n_yx++ )
{
- INT32 p_n_z[ 8 ];
- INT32 *p_n_data = p_n_src;
+ int32_t p_n_z[ 8 ];
+ int32_t *p_n_data = p_n_src;
memset( p_n_z, 0, sizeof( p_n_z ) );
- for( UINT32 n_vu = 0; n_vu < DCTSIZE2 / 8; n_vu++ )
+ for( uint32_t n_vu = 0; n_vu < DCTSIZE2 / 8; n_vu++ )
{
p_n_z[ 0 ] += p_n_data[ 0 ] * p_n_precalc[ 0 ];
p_n_z[ 1 ] += p_n_data[ 1 ] * p_n_precalc[ 1 ];
@@ -161,29 +161,29 @@ void psxmdec_device::mdec_idct( INT32 *p_n_src, INT32 *p_n_dst )
}
}
-static inline UINT16 mdec_unpack_run( UINT16 n_packed )
+static inline uint16_t mdec_unpack_run( uint16_t n_packed )
{
return n_packed >> 10;
}
-static inline INT32 mdec_unpack_val( UINT16 n_packed )
+static inline int32_t mdec_unpack_val( uint16_t n_packed )
{
- return ( ( (INT32)n_packed ) << 22 ) >> 22;
+ return ( ( (int32_t)n_packed ) << 22 ) >> 22;
}
-UINT32 psxmdec_device::mdec_unpack( UINT32 *p_n_psxram, UINT32 n_address )
+uint32_t psxmdec_device::mdec_unpack( uint32_t *p_n_psxram, uint32_t n_address )
{
- UINT8 n_z;
- INT32 n_qscale;
- UINT16 n_packed;
- INT32 *p_n_block;
- INT32 p_n_unpacked[ 64 ];
- INT32 *p_n_q;
+ uint8_t n_z;
+ int32_t n_qscale;
+ uint16_t n_packed;
+ int32_t *p_n_block;
+ int32_t p_n_unpacked[ 64 ];
+ int32_t *p_n_q;
p_n_q = p_n_quantize_uv;
p_n_block = m_p_n_unpacked;
- for( UINT32 n_block = 0; n_block < 6; n_block++ )
+ for( uint32_t n_block = 0; n_block < 6; n_block++ )
{
memset( p_n_unpacked, 0, sizeof( p_n_unpacked ) );
@@ -224,42 +224,42 @@ UINT32 psxmdec_device::mdec_unpack( UINT32 *p_n_psxram, UINT32 n_address )
return n_address;
}
-static inline INT32 mdec_cr_to_r( INT32 n_cr )
+static inline int32_t mdec_cr_to_r( int32_t n_cr )
{
return ( 1435 * n_cr ) >> 10;
}
-static inline INT32 mdec_cr_to_g( INT32 n_cr )
+static inline int32_t mdec_cr_to_g( int32_t n_cr )
{
return ( -731 * n_cr ) >> 10;
}
-static inline INT32 mdec_cb_to_g( INT32 n_cb )
+static inline int32_t mdec_cb_to_g( int32_t n_cb )
{
return ( -351 * n_cb ) >> 10;
}
-static inline INT32 mdec_cb_to_b( INT32 n_cb )
+static inline int32_t mdec_cb_to_b( int32_t n_cb )
{
return ( 1814 * n_cb ) >> 10;
}
-UINT16 psxmdec_device::mdec_clamp_r5( INT32 n_r ) const
+uint16_t psxmdec_device::mdec_clamp_r5( int32_t n_r ) const
{
return p_n_r5[ n_r + 128 + 256 ];
}
-UINT16 psxmdec_device::mdec_clamp_g5( INT32 n_g ) const
+uint16_t psxmdec_device::mdec_clamp_g5( int32_t n_g ) const
{
return p_n_g5[ n_g + 128 + 256 ];
}
-UINT16 psxmdec_device::mdec_clamp_b5( INT32 n_b ) const
+uint16_t psxmdec_device::mdec_clamp_b5( int32_t n_b ) const
{
return p_n_b5[ n_b + 128 + 256 ];
}
-void psxmdec_device::mdec_makergb15( UINT32 n_address, INT32 n_r, INT32 n_g, INT32 n_b, INT32 *p_n_y, UINT16 n_stp )
+void psxmdec_device::mdec_makergb15( uint32_t n_address, int32_t n_r, int32_t n_g, int32_t n_b, int32_t *p_n_y, uint16_t n_stp )
{
p_n_output[ WORD_XOR_LE( n_address + 0 ) / 2 ] = n_stp |
mdec_clamp_r5( p_n_y[ 0 ] + n_r ) |
@@ -274,18 +274,18 @@ void psxmdec_device::mdec_makergb15( UINT32 n_address, INT32 n_r, INT32 n_g, INT
void psxmdec_device::mdec_yuv2_to_rgb15( void )
{
- INT32 n_r;
- INT32 n_g;
- INT32 n_b;
- INT32 n_cb;
- INT32 n_cr;
- INT32 *p_n_cb;
- INT32 *p_n_cr;
- INT32 *p_n_y;
- UINT32 n_x;
- UINT32 n_y;
- UINT32 n_z;
- UINT16 n_stp;
+ int32_t n_r;
+ int32_t n_g;
+ int32_t n_b;
+ int32_t n_cb;
+ int32_t n_cr;
+ int32_t *p_n_cb;
+ int32_t *p_n_cr;
+ int32_t *p_n_y;
+ uint32_t n_x;
+ uint32_t n_y;
+ uint32_t n_z;
+ uint16_t n_stp;
int n_address = 0;
if( ( n_0_command & ( 1L << 25 ) ) != 0 )
@@ -340,12 +340,12 @@ void psxmdec_device::mdec_yuv2_to_rgb15( void )
n_decoded = ( 16 * 16 ) / 2;
}
-UINT16 psxmdec_device::mdec_clamp8( INT32 n_r ) const
+uint16_t psxmdec_device::mdec_clamp8( int32_t n_r ) const
{
return p_n_clamp8[ n_r + 128 + 256 ];
}
-void psxmdec_device::mdec_makergb24( UINT32 n_address, INT32 n_r, INT32 n_g, INT32 n_b, INT32 *p_n_y, UINT32 n_stp )
+void psxmdec_device::mdec_makergb24( uint32_t n_address, int32_t n_r, int32_t n_g, int32_t n_b, int32_t *p_n_y, uint32_t n_stp )
{
p_n_output[ WORD_XOR_LE( n_address + 0 ) / 2 ] = ( mdec_clamp8( p_n_y[ 0 ] + n_g ) << 8 ) | mdec_clamp8( p_n_y[ 0 ] + n_r );
p_n_output[ WORD_XOR_LE( n_address + 2 ) / 2 ] = ( mdec_clamp8( p_n_y[ 1 ] + n_r ) << 8 ) | mdec_clamp8( p_n_y[ 0 ] + n_b );
@@ -354,18 +354,18 @@ void psxmdec_device::mdec_makergb24( UINT32 n_address, INT32 n_r, INT32 n_g, INT
void psxmdec_device::mdec_yuv2_to_rgb24( void )
{
- INT32 n_r;
- INT32 n_g;
- INT32 n_b;
- INT32 n_cb;
- INT32 n_cr;
- INT32 *p_n_cb;
- INT32 *p_n_cr;
- INT32 *p_n_y;
- UINT32 n_x;
- UINT32 n_y;
- UINT32 n_z;
- UINT32 n_stp;
+ int32_t n_r;
+ int32_t n_g;
+ int32_t n_b;
+ int32_t n_cb;
+ int32_t n_cr;
+ int32_t *p_n_cb;
+ int32_t *p_n_cr;
+ int32_t *p_n_y;
+ uint32_t n_x;
+ uint32_t n_y;
+ uint32_t n_z;
+ uint32_t n_stp;
int n_address = 0;
if( ( n_0_command & ( 1L << 25 ) ) != 0 )
@@ -420,7 +420,7 @@ void psxmdec_device::mdec_yuv2_to_rgb24( void )
n_decoded = ( 24 * 16 ) / 2;
}
-void psxmdec_device::dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
+void psxmdec_device::dma_write( uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size )
{
int n_index;
@@ -463,8 +463,8 @@ void psxmdec_device::dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_si
n_index = 0;
while( n_size > 0 )
{
- p_n_cos[ n_index + 0 ] = (INT16)( ( p_n_psxram[ n_address / 4 ] >> 0 ) & 0xffff );
- p_n_cos[ n_index + 1 ] = (INT16)( ( p_n_psxram[ n_address / 4 ] >> 16 ) & 0xffff );
+ p_n_cos[ n_index + 0 ] = (int16_t)( ( p_n_psxram[ n_address / 4 ] >> 0 ) & 0xffff );
+ p_n_cos[ n_index + 1 ] = (int16_t)( ( p_n_psxram[ n_address / 4 ] >> 16 ) & 0xffff );
n_index += 2;
n_address += 4;
n_size--;
@@ -477,10 +477,10 @@ void psxmdec_device::dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_si
}
}
-void psxmdec_device::dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
+void psxmdec_device::dma_read( uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size )
{
- UINT32 n_this;
- UINT32 n_nextaddress;
+ uint32_t n_this;
+ uint32_t n_nextaddress;
verboselog( *this, 2, "mdec1_read( %08x, %08x )\n", n_address, n_size );
if( ( n_0_command & ( 1L << 29 ) ) != 0 && n_0_size != 0 )
@@ -523,7 +523,7 @@ void psxmdec_device::dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_siz
}
n_decoded -= n_this;
- memcpy( (UINT8 *)p_n_psxram + n_address, (UINT8 *)p_n_output + n_offset, n_this * 4 );
+ memcpy( (uint8_t *)p_n_psxram + n_address, (uint8_t *)p_n_output + n_offset, n_this * 4 );
n_offset += n_this * 4;
n_address += n_this * 4;
n_size -= n_this;
diff --git a/src/devices/cpu/psx/mdec.h b/src/devices/cpu/psx/mdec.h
index e3065bacb95..7b237a51145 100644
--- a/src/devices/cpu/psx/mdec.h
+++ b/src/devices/cpu/psx/mdec.h
@@ -24,13 +24,13 @@ extern const device_type PSX_MDEC;
class psxmdec_device : public device_t
{
public:
- psxmdec_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ psxmdec_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ32_MEMBER( read );
- void dma_write( UINT32 *ram, UINT32 n_address, INT32 n_size );
- void dma_read( UINT32 *ram, UINT32 n_address, INT32 n_size );
+ void dma_write( uint32_t *ram, uint32_t n_address, int32_t n_size );
+ void dma_read( uint32_t *ram, uint32_t n_address, int32_t n_size );
protected:
virtual void device_start() override;
@@ -39,38 +39,38 @@ protected:
private:
void mdec_cos_precalc();
- void mdec_idct( INT32 *p_n_src, INT32 *p_n_dst );
- UINT32 mdec_unpack( UINT32 *ram, UINT32 n_address );
- UINT16 mdec_clamp_r5( INT32 n_r ) const;
- UINT16 mdec_clamp_g5( INT32 n_g ) const;
- UINT16 mdec_clamp_b5( INT32 n_b ) const;
- UINT16 mdec_clamp8( INT32 n_r ) const;
+ void mdec_idct( int32_t *p_n_src, int32_t *p_n_dst );
+ uint32_t mdec_unpack( uint32_t *ram, uint32_t n_address );
+ uint16_t mdec_clamp_r5( int32_t n_r ) const;
+ uint16_t mdec_clamp_g5( int32_t n_g ) const;
+ uint16_t mdec_clamp_b5( int32_t n_b ) const;
+ uint16_t mdec_clamp8( int32_t n_r ) const;
void mdec_yuv2_to_rgb15( void );
void mdec_yuv2_to_rgb24( void );
- void mdec_makergb15( UINT32 n_address, INT32 n_r, INT32 n_g, INT32 n_b, INT32 *p_n_y, UINT16 n_stp );
- void mdec_makergb24( UINT32 n_address, INT32 n_r, INT32 n_g, INT32 n_b, INT32 *p_n_y, UINT32 n_stp );
-
- UINT32 n_decoded;
- UINT32 n_offset;
- UINT16 p_n_output[ 24 * 16 ];
-
- INT32 p_n_quantize_y[ DCTSIZE2 ];
- INT32 p_n_quantize_uv[ DCTSIZE2 ];
- INT32 p_n_cos[ DCTSIZE2 ];
- INT32 p_n_cos_precalc[ DCTSIZE2 * DCTSIZE2 ];
-
- UINT32 n_0_command;
- UINT32 n_0_address;
- UINT32 n_0_size;
- UINT32 n_1_command;
- UINT32 n_1_status;
-
- UINT16 p_n_clamp8[ 256 * 3 ];
- UINT16 p_n_r5[ 256 * 3 ];
- UINT16 p_n_g5[ 256 * 3 ];
- UINT16 p_n_b5[ 256 * 3 ];
-
- INT32 m_p_n_unpacked[ DCTSIZE2 * 6 * 2 ];
+ void mdec_makergb15( uint32_t n_address, int32_t n_r, int32_t n_g, int32_t n_b, int32_t *p_n_y, uint16_t n_stp );
+ void mdec_makergb24( uint32_t n_address, int32_t n_r, int32_t n_g, int32_t n_b, int32_t *p_n_y, uint32_t n_stp );
+
+ uint32_t n_decoded;
+ uint32_t n_offset;
+ uint16_t p_n_output[ 24 * 16 ];
+
+ int32_t p_n_quantize_y[ DCTSIZE2 ];
+ int32_t p_n_quantize_uv[ DCTSIZE2 ];
+ int32_t p_n_cos[ DCTSIZE2 ];
+ int32_t p_n_cos_precalc[ DCTSIZE2 * DCTSIZE2 ];
+
+ uint32_t n_0_command;
+ uint32_t n_0_address;
+ uint32_t n_0_size;
+ uint32_t n_1_command;
+ uint32_t n_1_status;
+
+ uint16_t p_n_clamp8[ 256 * 3 ];
+ uint16_t p_n_r5[ 256 * 3 ];
+ uint16_t p_n_g5[ 256 * 3 ];
+ uint16_t p_n_b5[ 256 * 3 ];
+
+ int32_t m_p_n_unpacked[ DCTSIZE2 * 6 * 2 ];
};
#endif
diff --git a/src/devices/cpu/psx/psx.cpp b/src/devices/cpu/psx/psx.cpp
index 9d4ff93c7f3..9584c58eb27 100644
--- a/src/devices/cpu/psx/psx.cpp
+++ b/src/devices/cpu/psx/psx.cpp
@@ -172,7 +172,7 @@ const device_type CXD8661R = &device_creator<cxd8661r_device>;
const device_type CXD8606BQ = &device_creator<cxd8606bq_device>;
const device_type CXD8606CQ = &device_creator<cxd8606cq_device>;
-static const UINT32 mtc0_writemask[]=
+static const uint32_t mtc0_writemask[]=
{
0x00000000, /* !INDEX */
0x00000000, /* !RANDOM */
@@ -217,7 +217,7 @@ WRITE32_MEMBER( psxcpu_device::exp_base_w )
m_exp_base = 0x1f000000 | ( m_exp_base & 0xffffff );
}
-UINT32 psxcpu_device::exp_base()
+uint32_t psxcpu_device::exp_base()
{
return m_exp_base;
}
@@ -241,7 +241,7 @@ READ32_MEMBER( psxcpu_device::ram_config_r )
WRITE32_MEMBER( psxcpu_device::ram_config_w )
{
- UINT32 old = m_ram_config;
+ uint32_t old = m_ram_config;
COMBINE_DATA( &m_ram_config ); // TODO: check byte writes
@@ -258,7 +258,7 @@ READ32_MEMBER( psxcpu_device::rom_config_r )
WRITE32_MEMBER( psxcpu_device::rom_config_w )
{
- UINT32 old = m_rom_config;
+ uint32_t old = m_rom_config;
COMBINE_DATA( &m_rom_config ); // TODO: check byte writes
@@ -287,7 +287,7 @@ READ32_MEMBER( psxcpu_device::biu_r )
WRITE32_MEMBER( psxcpu_device::biu_w )
{
- UINT32 old = m_biu;
+ uint32_t old = m_biu;
COMBINE_DATA( &m_biu ); // TODO: check byte writes
@@ -303,15 +303,15 @@ void psxcpu_device::stop()
debugger_instruction_hook( this, m_pc );
}
-UINT32 psxcpu_device::cache_readword( UINT32 offset )
+uint32_t psxcpu_device::cache_readword( uint32_t offset )
{
- UINT32 data = 0;
+ uint32_t data = 0;
if( ( m_biu & BIU_TAG ) != 0 )
{
if( ( m_biu & BIU_IS1 ) != 0 )
{
- UINT32 tag = m_icacheTag[ ( offset / 16 ) % ( ICACHE_ENTRIES / 4 ) ];
+ uint32_t tag = m_icacheTag[ ( offset / 16 ) % ( ICACHE_ENTRIES / 4 ) ];
data |= tag & TAG_VALID;
if( ( ( tag ^ offset ) & TAG_MATCH_MASK ) == 0 )
@@ -339,7 +339,7 @@ UINT32 psxcpu_device::cache_readword( UINT32 offset )
return data;
}
-void psxcpu_device::cache_writeword( UINT32 offset, UINT32 data )
+void psxcpu_device::cache_writeword( uint32_t offset, uint32_t data )
{
if( ( m_biu & BIU_TAG ) != 0 )
{
@@ -369,7 +369,7 @@ void psxcpu_device::cache_writeword( UINT32 offset, UINT32 data )
}
}
-UINT8 psxcpu_device::readbyte( UINT32 address )
+uint8_t psxcpu_device::readbyte( uint32_t address )
{
if( m_bus_attached )
{
@@ -379,7 +379,7 @@ UINT8 psxcpu_device::readbyte( UINT32 address )
return cache_readword( address ) >> ( ( address & 3 ) * 8 );
}
-UINT16 psxcpu_device::readhalf( UINT32 address )
+uint16_t psxcpu_device::readhalf( uint32_t address )
{
if( m_bus_attached )
{
@@ -389,7 +389,7 @@ UINT16 psxcpu_device::readhalf( UINT32 address )
return cache_readword( address ) >> ( ( address & 2 ) * 8 );
}
-UINT32 psxcpu_device::readword( UINT32 address )
+uint32_t psxcpu_device::readword( uint32_t address )
{
if( m_bus_attached )
{
@@ -399,7 +399,7 @@ UINT32 psxcpu_device::readword( UINT32 address )
return cache_readword( address );
}
-UINT32 psxcpu_device::readword_masked( UINT32 address, UINT32 mask )
+uint32_t psxcpu_device::readword_masked( uint32_t address, uint32_t mask )
{
if( m_bus_attached )
{
@@ -409,7 +409,7 @@ UINT32 psxcpu_device::readword_masked( UINT32 address, UINT32 mask )
return cache_readword( address );
}
-void psxcpu_device::writeword( UINT32 address, UINT32 data )
+void psxcpu_device::writeword( uint32_t address, uint32_t data )
{
if( m_bus_attached )
{
@@ -421,7 +421,7 @@ void psxcpu_device::writeword( UINT32 address, UINT32 data )
}
}
-void psxcpu_device::writeword_masked( UINT32 address, UINT32 data, UINT32 mask )
+void psxcpu_device::writeword_masked( uint32_t address, uint32_t data, uint32_t mask )
{
if( m_bus_attached )
{
@@ -750,7 +750,7 @@ static const struct
{ 0x00, 0x00, nullptr }
};
-UINT32 psxcpu_device::log_bioscall_parameter( int parm )
+uint32_t psxcpu_device::log_bioscall_parameter( int parm )
{
if( parm < 4 )
{
@@ -763,7 +763,7 @@ UINT32 psxcpu_device::log_bioscall_parameter( int parm )
const char *psxcpu_device::log_bioscall_string( int parm )
{
int pos;
- UINT32 address;
+ uint32_t address;
static char string[ 1024 ];
address = log_bioscall_parameter( parm );
@@ -777,7 +777,7 @@ const char *psxcpu_device::log_bioscall_string( int parm )
for( ;; )
{
- UINT8 c = readbyte( address );
+ uint8_t c = readbyte( address );
if( c == 0 )
{
break;
@@ -872,7 +872,7 @@ void psxcpu_device::log_bioscall()
{
while( nbytes > 0 )
{
- UINT8 c = readbyte( buffer );
+ uint8_t c = readbyte( buffer );
putchar( c );
nbytes--;
buffer++;
@@ -959,13 +959,13 @@ void psxcpu_device::log_bioscall()
{
if( parm > 0 )
{
- UINT32 format = log_bioscall_parameter( parm - 1 );
+ uint32_t format = log_bioscall_parameter( parm - 1 );
const char *parmstr = nullptr;
int percent = 0;
for( ;; )
{
- UINT8 c = readbyte( format );
+ uint8_t c = readbyte( format );
if( c == 0 )
{
break;
@@ -1172,7 +1172,7 @@ void psxcpu_device::multiplier_update()
{
case MULTIPLIER_OPERATION_MULT:
{
- INT64 result = mul_32x32( (INT32)m_multiplier_operand1, (INT32)m_multiplier_operand2 );
+ int64_t result = mul_32x32( (int32_t)m_multiplier_operand1, (int32_t)m_multiplier_operand2 );
m_lo = extract_64lo( result );
m_hi = extract_64hi( result );
}
@@ -1180,7 +1180,7 @@ void psxcpu_device::multiplier_update()
case MULTIPLIER_OPERATION_MULTU:
{
- UINT64 result = mulu_32x32( m_multiplier_operand1, m_multiplier_operand2 );
+ uint64_t result = mulu_32x32( m_multiplier_operand1, m_multiplier_operand2 );
m_lo = extract_64lo( result );
m_hi = extract_64hi( result );
}
@@ -1194,7 +1194,7 @@ void psxcpu_device::multiplier_update()
}
else if( m_multiplier_operand2 == 0 )
{
- if( (INT32)m_multiplier_operand1 < 0 )
+ if( (int32_t)m_multiplier_operand1 < 0 )
{
m_lo = 1;
}
@@ -1207,8 +1207,8 @@ void psxcpu_device::multiplier_update()
}
else
{
- m_lo = (INT32)m_multiplier_operand1 / (INT32)m_multiplier_operand2;
- m_hi = (INT32)m_multiplier_operand1 % (INT32)m_multiplier_operand2;
+ m_lo = (int32_t)m_multiplier_operand1 / (int32_t)m_multiplier_operand2;
+ m_hi = (int32_t)m_multiplier_operand1 % (int32_t)m_multiplier_operand2;
}
break;
@@ -1229,7 +1229,7 @@ void psxcpu_device::multiplier_update()
m_multiplier_operation = MULTIPLIER_OPERATION_IDLE;
}
-UINT32 psxcpu_device::get_hi()
+uint32_t psxcpu_device::get_hi()
{
if( m_multiplier_operation != MULTIPLIER_OPERATION_IDLE )
{
@@ -1239,7 +1239,7 @@ UINT32 psxcpu_device::get_hi()
return m_hi;
}
-UINT32 psxcpu_device::get_lo()
+uint32_t psxcpu_device::get_lo()
{
if( m_multiplier_operation != MULTIPLIER_OPERATION_IDLE )
{
@@ -1363,8 +1363,8 @@ void psxcpu_device::update_ram_config()
break;
}
- UINT32 ram_size = m_ram->size();
- UINT8 *pointer = m_ram->pointer();
+ uint32_t ram_size = m_ram->size();
+ uint8_t *pointer = m_ram->pointer();
if( ram_size > window_size )
{
@@ -1398,8 +1398,8 @@ void psxcpu_device::update_rom_config()
window_size = max_window_size;
}
- UINT32 rom_size = m_rom->bytes();
- UINT8 *pointer = m_rom->base();
+ uint32_t rom_size = m_rom->bytes();
+ uint8_t *pointer = m_rom->base();
if( rom_size > window_size )
{
@@ -1470,7 +1470,7 @@ void psxcpu_device::fetch_next_op()
{
if( m_delayr == PSXCPU_DELAYR_PC )
{
- UINT32 safepc = m_delayv & ~m_bad_word_address_mask;
+ uint32_t safepc = m_delayv & ~m_bad_word_address_mask;
m_op = m_direct->read_dword( safepc );
}
@@ -1509,7 +1509,7 @@ int psxcpu_device::advance_pc()
return 1;
}
-void psxcpu_device::load( UINT32 reg, UINT32 value )
+void psxcpu_device::load( uint32_t reg, uint32_t value )
{
advance_pc();
@@ -1519,7 +1519,7 @@ void psxcpu_device::load( UINT32 reg, UINT32 value )
}
}
-void psxcpu_device::delayed_load( UINT32 reg, UINT32 value )
+void psxcpu_device::delayed_load( uint32_t reg, uint32_t value )
{
if( m_delayr == reg )
{
@@ -1533,7 +1533,7 @@ void psxcpu_device::delayed_load( UINT32 reg, UINT32 value )
m_delayv = value;
}
-void psxcpu_device::branch( UINT32 address )
+void psxcpu_device::branch( uint32_t address )
{
advance_pc();
@@ -1565,7 +1565,7 @@ void psxcpu_device::unconditional_branch()
m_delayv = ( m_pc & 0xf0000000 ) + ( INS_TARGET( m_op ) << 2 );
}
-void psxcpu_device::common_exception( int exception, UINT32 romOffset, UINT32 ramOffset )
+void psxcpu_device::common_exception( int exception, uint32_t romOffset, uint32_t ramOffset )
{
int cause = ( exception << 2 ) | ( ( ( m_op >> 26 ) & 3 ) << 28 );
@@ -1658,19 +1658,19 @@ void psxcpu_device::store_bus_error_exception()
common_exception( EXC_DBE, 0xbfc00180, 0x80000080 );
}
-void psxcpu_device::load_bad_address( UINT32 address )
+void psxcpu_device::load_bad_address( uint32_t address )
{
m_cp0r[ CP0_BADA ] = address;
exception( EXC_ADEL );
}
-void psxcpu_device::store_bad_address( UINT32 address )
+void psxcpu_device::store_bad_address( uint32_t address )
{
m_cp0r[ CP0_BADA ] = address;
exception( EXC_ADES );
}
-int psxcpu_device::data_address_breakpoint( int dcic_rw, int dcic_status, UINT32 address )
+int psxcpu_device::data_address_breakpoint( int dcic_rw, int dcic_status, uint32_t address )
{
if( address < 0x1f000000 || address > 0x1fffffff )
{
@@ -1694,12 +1694,12 @@ int psxcpu_device::data_address_breakpoint( int dcic_rw, int dcic_status, UINT32
return 0;
}
-int psxcpu_device::load_data_address_breakpoint( UINT32 address )
+int psxcpu_device::load_data_address_breakpoint( uint32_t address )
{
return data_address_breakpoint( DCIC_DR | DCIC_DAE, DCIC_DB | DCIC_DA | DCIC_R, address );
}
-int psxcpu_device::store_data_address_breakpoint( UINT32 address )
+int psxcpu_device::store_data_address_breakpoint( uint32_t address )
{
return data_address_breakpoint( DCIC_DW | DCIC_DAE, DCIC_DB | DCIC_DA | DCIC_W, address );
}
@@ -1747,7 +1747,7 @@ ADDRESS_MAP_END
// psxcpu_device - constructor
//-------------------------------------------------
-psxcpu_device::psxcpu_device( const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source ) :
+psxcpu_device::psxcpu_device( const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source ) :
cpu_device( mconfig, type, name, tag, owner, clock, shortname, source ),
m_program_config( "program", ENDIANNESS_LITTLE, 32, 32, 0, ADDRESS_MAP_NAME( psxcpu_internal_map ) ),
m_gpu_read_handler( *this ),
@@ -1761,32 +1761,32 @@ psxcpu_device::psxcpu_device( const machine_config &mconfig, device_type type, c
m_disable_rom_berr = false;
}
-cxd8530aq_device::cxd8530aq_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
+cxd8530aq_device::cxd8530aq_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8661R, "CXD8530AQ", tag, owner, clock, "cxd8530aq", __FILE__ )
{
}
-cxd8530bq_device::cxd8530bq_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
+cxd8530bq_device::cxd8530bq_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8661R, "CXD8530BQ", tag, owner, clock, "cxd8530bq", __FILE__ )
{
}
-cxd8530cq_device::cxd8530cq_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
+cxd8530cq_device::cxd8530cq_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8661R, "CXD8530CQ", tag, owner, clock, "cxd8530cq", __FILE__ )
{
}
-cxd8661r_device::cxd8661r_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
+cxd8661r_device::cxd8661r_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8661R, "CXD8661R", tag, owner, clock, "cxd8661r", __FILE__ )
{
}
-cxd8606bq_device::cxd8606bq_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
+cxd8606bq_device::cxd8606bq_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8606BQ, "CXD8606BQ", tag, owner, clock, "cxd8606bq", __FILE__ )
{
}
-cxd8606cq_device::cxd8606cq_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
+cxd8606cq_device::cxd8606cq_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
: psxcpu_device( mconfig, CXD8606CQ, "CXD8606CQ", tag, owner, clock, "cxd8606cq", __FILE__ )
{
}
@@ -1968,7 +1968,7 @@ void psxcpu_device::device_reset()
/// TODO: get dma to access ram through the memory map?
psxdma_device *psxdma = subdevice<psxdma_device>( "dma" );
- psxdma->m_ram = (UINT32 *)m_ram->pointer();
+ psxdma->m_ram = (uint32_t *)m_ram->pointer();
psxdma->m_ramsize = m_ram->size();
m_delayr = 0;
@@ -2052,13 +2052,13 @@ void psxcpu_device::state_string_export( const device_state_entry &entry, std::s
// helper function
//-------------------------------------------------
-offs_t psxcpu_device::disasm_disassemble( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options )
+offs_t psxcpu_device::disasm_disassemble( char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options )
{
return DasmPSXCPU( this, buffer, pc, opram );
}
-UINT32 psxcpu_device::get_register_from_pipeline( int reg )
+uint32_t psxcpu_device::get_register_from_pipeline( int reg )
{
if( m_delayr == reg )
{
@@ -2082,7 +2082,7 @@ int psxcpu_device::cop0_usable()
void psxcpu_device::lwc( int cop, int sr_cu )
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = load_data_address_breakpoint( address );
if( ( m_cp0r[ CP0_SR ] & sr_cu ) == 0 )
@@ -2099,7 +2099,7 @@ void psxcpu_device::lwc( int cop, int sr_cu )
}
else
{
- UINT32 data = readword( address );
+ uint32_t data = readword( address );
if( m_berr )
{
@@ -2135,7 +2135,7 @@ void psxcpu_device::lwc( int cop, int sr_cu )
void psxcpu_device::swc( int cop, int sr_cu )
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = store_data_address_breakpoint( address );
if( ( m_cp0r[ CP0_SR ] & sr_cu ) == 0 )
@@ -2148,7 +2148,7 @@ void psxcpu_device::swc( int cop, int sr_cu )
}
else
{
- UINT32 data = 0;
+ uint32_t data = 0;
switch( cop )
{
@@ -2239,7 +2239,7 @@ void psxcpu_device::bc( int cop, int sr_cu, int condition )
void psxcpu_device::execute_set_input( int inputnum, int state )
{
- UINT32 ip;
+ uint32_t ip;
switch( inputnum )
{
@@ -2315,7 +2315,7 @@ void psxcpu_device::execute_run()
break;
case FUNCT_SRA:
- load( INS_RD( m_op ), (INT32)m_r[ INS_RT( m_op ) ] >> INS_SHAMT( m_op ) );
+ load( INS_RD( m_op ), (int32_t)m_r[ INS_RT( m_op ) ] >> INS_SHAMT( m_op ) );
break;
case FUNCT_SLLV:
@@ -2327,7 +2327,7 @@ void psxcpu_device::execute_run()
break;
case FUNCT_SRAV:
- load( INS_RD( m_op ), (INT32)m_r[ INS_RT( m_op ) ] >> ( m_r[ INS_RS( m_op ) ] & 31 ) );
+ load( INS_RD( m_op ), (int32_t)m_r[ INS_RT( m_op ) ] >> ( m_r[ INS_RS( m_op ) ] & 31 ) );
break;
case FUNCT_JR:
@@ -2391,8 +2391,8 @@ void psxcpu_device::execute_run()
case FUNCT_ADD:
{
- UINT32 result = m_r[ INS_RS( m_op ) ] + m_r[ INS_RT( m_op ) ];
- if( (INT32)( ~( m_r[ INS_RS( m_op ) ] ^ m_r[ INS_RT( m_op ) ] ) & ( m_r[ INS_RS( m_op ) ] ^ result ) ) < 0 )
+ uint32_t result = m_r[ INS_RS( m_op ) ] + m_r[ INS_RT( m_op ) ];
+ if( (int32_t)( ~( m_r[ INS_RS( m_op ) ] ^ m_r[ INS_RT( m_op ) ] ) & ( m_r[ INS_RS( m_op ) ] ^ result ) ) < 0 )
{
exception( EXC_OVF );
}
@@ -2409,8 +2409,8 @@ void psxcpu_device::execute_run()
case FUNCT_SUB:
{
- UINT32 result = m_r[ INS_RS( m_op ) ] - m_r[ INS_RT( m_op ) ];
- if( (INT32)( ( m_r[ INS_RS( m_op ) ] ^ m_r[ INS_RT( m_op ) ] ) & ( m_r[ INS_RS( m_op ) ] ^ result ) ) < 0 )
+ uint32_t result = m_r[ INS_RS( m_op ) ] - m_r[ INS_RT( m_op ) ];
+ if( (int32_t)( ( m_r[ INS_RS( m_op ) ] ^ m_r[ INS_RT( m_op ) ] ) & ( m_r[ INS_RS( m_op ) ] ^ result ) ) < 0 )
{
exception( EXC_OVF );
}
@@ -2442,7 +2442,7 @@ void psxcpu_device::execute_run()
break;
case FUNCT_SLT:
- load( INS_RD( m_op ), (INT32)m_r[ INS_RS( m_op ) ] < (INT32)m_r[ INS_RT( m_op ) ] );
+ load( INS_RD( m_op ), (int32_t)m_r[ INS_RS( m_op ) ] < (int32_t)m_r[ INS_RT( m_op ) ] );
break;
case FUNCT_SLTU:
@@ -2459,7 +2459,7 @@ void psxcpu_device::execute_run()
switch( INS_RT_REGIMM( m_op ) )
{
case RT_BLTZ:
- conditional_branch( (INT32)m_r[ INS_RS( m_op ) ] < 0 );
+ conditional_branch( (int32_t)m_r[ INS_RS( m_op ) ] < 0 );
if( INS_RT( m_op ) == RT_BLTZAL )
{
@@ -2468,7 +2468,7 @@ void psxcpu_device::execute_run()
break;
case RT_BGEZ:
- conditional_branch( (INT32)m_r[ INS_RS( m_op ) ] >= 0 );
+ conditional_branch( (int32_t)m_r[ INS_RS( m_op ) ] >= 0 );
if( INS_RT( m_op ) == RT_BGEZAL )
{
@@ -2496,18 +2496,18 @@ void psxcpu_device::execute_run()
break;
case OP_BLEZ:
- conditional_branch( (INT32)m_r[ INS_RS( m_op ) ] < 0 || m_r[ INS_RS( m_op ) ] == m_r[ INS_RT( m_op ) ] );
+ conditional_branch( (int32_t)m_r[ INS_RS( m_op ) ] < 0 || m_r[ INS_RS( m_op ) ] == m_r[ INS_RT( m_op ) ] );
break;
case OP_BGTZ:
- conditional_branch( (INT32)m_r[ INS_RS( m_op ) ] >= 0 && m_r[ INS_RS( m_op ) ] != m_r[ INS_RT( m_op ) ] );
+ conditional_branch( (int32_t)m_r[ INS_RS( m_op ) ] >= 0 && m_r[ INS_RS( m_op ) ] != m_r[ INS_RT( m_op ) ] );
break;
case OP_ADDI:
{
- UINT32 immediate = PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
- UINT32 result = m_r[ INS_RS( m_op ) ] + immediate;
- if( (INT32)( ~( m_r[ INS_RS( m_op ) ] ^ immediate ) & ( m_r[ INS_RS( m_op ) ] ^ result ) ) < 0 )
+ uint32_t immediate = PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t result = m_r[ INS_RS( m_op ) ] + immediate;
+ if( (int32_t)( ~( m_r[ INS_RS( m_op ) ] ^ immediate ) & ( m_r[ INS_RS( m_op ) ] ^ result ) ) < 0 )
{
exception( EXC_OVF );
}
@@ -2523,11 +2523,11 @@ void psxcpu_device::execute_run()
break;
case OP_SLTI:
- load( INS_RT( m_op ), (INT32)m_r[ INS_RS( m_op ) ] < PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) ) );
+ load( INS_RT( m_op ), (int32_t)m_r[ INS_RS( m_op ) ] < PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) ) );
break;
case OP_SLTIU:
- load( INS_RT( m_op ), m_r[ INS_RS( m_op ) ] < (UINT32)PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) ) );
+ load( INS_RT( m_op ), m_r[ INS_RS( m_op ) ] < (uint32_t)PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) ) );
break;
case OP_ANDI:
@@ -2595,7 +2595,7 @@ void psxcpu_device::execute_run()
{
if( cop0_usable() )
{
- UINT32 data = ( m_cp0r[ reg ] & ~mtc0_writemask[ reg ] ) |
+ uint32_t data = ( m_cp0r[ reg ] & ~mtc0_writemask[ reg ] ) |
( m_r[ INS_RT( m_op ) ] & mtc0_writemask[ reg ] );
advance_pc();
@@ -2824,7 +2824,7 @@ void psxcpu_device::execute_run()
case OP_LB:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = load_data_address_breakpoint( address );
if( ( address & m_bad_byte_address_mask ) != 0 )
@@ -2837,7 +2837,7 @@ void psxcpu_device::execute_run()
}
else
{
- UINT32 data = PSXCPU_BYTE_EXTEND( readbyte( address ) );
+ uint32_t data = PSXCPU_BYTE_EXTEND( readbyte( address ) );
if( m_berr )
{
@@ -2853,7 +2853,7 @@ void psxcpu_device::execute_run()
case OP_LH:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = load_data_address_breakpoint( address );
if( ( address & m_bad_half_address_mask ) != 0 )
@@ -2866,7 +2866,7 @@ void psxcpu_device::execute_run()
}
else
{
- UINT32 data = PSXCPU_WORD_EXTEND( readhalf( address ) );
+ uint32_t data = PSXCPU_WORD_EXTEND( readhalf( address ) );
if( m_berr )
{
@@ -2882,7 +2882,7 @@ void psxcpu_device::execute_run()
case OP_LWL:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int load_type = address & 3;
int breakpoint;
@@ -2899,7 +2899,7 @@ void psxcpu_device::execute_run()
}
else
{
- UINT32 data = get_register_from_pipeline( INS_RT( m_op ) );
+ uint32_t data = get_register_from_pipeline( INS_RT( m_op ) );
switch( load_type )
{
@@ -2934,7 +2934,7 @@ void psxcpu_device::execute_run()
case OP_LW:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = load_data_address_breakpoint( address );
if( ( address & m_bad_word_address_mask ) != 0 )
@@ -2947,7 +2947,7 @@ void psxcpu_device::execute_run()
}
else
{
- UINT32 data = readword( address );
+ uint32_t data = readword( address );
if( m_berr )
{
@@ -2963,7 +2963,7 @@ void psxcpu_device::execute_run()
case OP_LBU:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = load_data_address_breakpoint( address );
if( ( address & m_bad_byte_address_mask ) != 0 )
@@ -2976,7 +2976,7 @@ void psxcpu_device::execute_run()
}
else
{
- UINT32 data = readbyte( address );
+ uint32_t data = readbyte( address );
if( m_berr )
{
@@ -2992,7 +2992,7 @@ void psxcpu_device::execute_run()
case OP_LHU:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = load_data_address_breakpoint( address );
if( ( address & m_bad_half_address_mask ) != 0 )
@@ -3005,7 +3005,7 @@ void psxcpu_device::execute_run()
}
else
{
- UINT32 data = readhalf( address );
+ uint32_t data = readhalf( address );
if( m_berr )
{
@@ -3021,7 +3021,7 @@ void psxcpu_device::execute_run()
case OP_LWR:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = load_data_address_breakpoint( address );
if( ( address & m_bad_byte_address_mask ) != 0 )
@@ -3034,7 +3034,7 @@ void psxcpu_device::execute_run()
}
else
{
- UINT32 data = get_register_from_pipeline( INS_RT( m_op ) );
+ uint32_t data = get_register_from_pipeline( INS_RT( m_op ) );
switch( address & 3 )
{
@@ -3069,7 +3069,7 @@ void psxcpu_device::execute_run()
case OP_SB:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = store_data_address_breakpoint( address );
if( ( address & m_bad_byte_address_mask ) != 0 )
@@ -3099,7 +3099,7 @@ void psxcpu_device::execute_run()
case OP_SH:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = store_data_address_breakpoint( address );
if( ( address & m_bad_half_address_mask ) != 0 )
@@ -3129,7 +3129,7 @@ void psxcpu_device::execute_run()
case OP_SWL:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int save_type = address & 3;
int breakpoint;
@@ -3179,7 +3179,7 @@ void psxcpu_device::execute_run()
case OP_SW:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = store_data_address_breakpoint( address );
if( ( address & m_bad_word_address_mask ) != 0 )
@@ -3208,7 +3208,7 @@ void psxcpu_device::execute_run()
case OP_SWR:
{
- UINT32 address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
+ uint32_t address = m_r[ INS_RS( m_op ) ] + PSXCPU_WORD_EXTEND( INS_IMMEDIATE( m_op ) );
int breakpoint = store_data_address_breakpoint( address );
if( ( address & m_bad_byte_address_mask ) != 0 )
@@ -3296,30 +3296,30 @@ void psxcpu_device::execute_run()
} while( m_icount > 0 );
}
-UINT32 psxcpu_device::getcp1dr( int reg )
+uint32_t psxcpu_device::getcp1dr( int reg )
{
/* if a mtc/ctc precedes then this will get the value moved (which cop1 register is irrelevant). */
/* if a mfc/cfc follows then it will get the same value as this one. */
return m_program->read_dword( m_pc + 4 );
}
-void psxcpu_device::setcp1dr( int reg, UINT32 value )
+void psxcpu_device::setcp1dr( int reg, uint32_t value )
{
}
-UINT32 psxcpu_device::getcp1cr( int reg )
+uint32_t psxcpu_device::getcp1cr( int reg )
{
/* if a mtc/ctc precedes then this will get the value moved (which cop1 register is irrelevant). */
/* if a mfc/cfc follows then it will get the same value as this one. */
return m_program->read_dword( m_pc + 4 );
}
-void psxcpu_device::setcp1cr( int reg, UINT32 value )
+void psxcpu_device::setcp1cr( int reg, uint32_t value )
{
}
-UINT32 psxcpu_device::getcp3dr( int reg )
+uint32_t psxcpu_device::getcp3dr( int reg )
{
/* if you have mtc/ctc with an mfc/cfc directly afterwards then you get the value that was moved. */
/* if you have an lwc with an mfc/cfc somewhere after it then you get the value that is loaded */
@@ -3327,11 +3327,11 @@ UINT32 psxcpu_device::getcp3dr( int reg )
return m_program->read_dword( m_pc + 4 );
}
-void psxcpu_device::setcp3dr( int reg, UINT32 value )
+void psxcpu_device::setcp3dr( int reg, uint32_t value )
{
}
-UINT32 psxcpu_device::getcp3cr( int reg )
+uint32_t psxcpu_device::getcp3cr( int reg )
{
/* if you have mtc/ctc with an mfc/cfc directly afterwards then you get the value that was moved. */
/* if you have an lwc with an mfc/cfc somewhere after it then you get the value that is loaded */
@@ -3339,7 +3339,7 @@ UINT32 psxcpu_device::getcp3cr( int reg )
return m_program->read_dword( m_pc + 4 );
}
-void psxcpu_device::setcp3cr( int reg, UINT32 value )
+void psxcpu_device::setcp3cr( int reg, uint32_t value )
{
}
diff --git a/src/devices/cpu/psx/psx.h b/src/devices/cpu/psx/psx.h
index 98b15819f32..f08eedffc3a 100644
--- a/src/devices/cpu/psx/psx.h
+++ b/src/devices/cpu/psx/psx.h
@@ -140,10 +140,10 @@ class psxcpu_state
public:
virtual ~psxcpu_state() {};
- virtual UINT32 pc() = 0;
- virtual UINT32 delayr() = 0;
- virtual UINT32 delayv() = 0;
- virtual UINT32 r(int i) = 0;
+ virtual uint32_t pc() = 0;
+ virtual uint32_t delayr() = 0;
+ virtual uint32_t delayv() = 0;
+ virtual uint32_t r(int i) = 0;
};
// ======================> psxcpu_device
@@ -167,7 +167,7 @@ public:
DECLARE_WRITE32_MEMBER( berr_w );
DECLARE_READ32_MEMBER( berr_r );
- UINT32 exp_base();
+ uint32_t exp_base();
DECLARE_WRITE32_MEMBER( exp_base_w );
DECLARE_READ32_MEMBER( exp_base_r );
@@ -200,7 +200,7 @@ public:
void set_disable_rom_berr(bool mode);
protected:
- psxcpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ psxcpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// device-level overrides
virtual void device_start() override;
@@ -209,11 +209,11 @@ protected:
virtual machine_config_constructor device_mconfig_additions() const override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 40; }
- virtual UINT32 execute_input_lines() const override { return 6; }
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return ( clocks + 3 ) / 4; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return cycles * 4; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 40; }
+ virtual uint32_t execute_input_lines() const override { return 6; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return ( clocks + 3 ) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return cycles * 4; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -225,19 +225,19 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// CPU registers
- UINT32 m_pc;
- UINT32 m_r[ 32 ];
- UINT32 m_cp0r[ 16 ];
- UINT32 m_hi;
- UINT32 m_lo;
+ uint32_t m_pc;
+ uint32_t m_r[ 32 ];
+ uint32_t m_cp0r[ 16 ];
+ uint32_t m_hi;
+ uint32_t m_lo;
// internal stuff
- UINT32 m_op;
+ uint32_t m_op;
// address spaces
const address_space_config m_program_config;
@@ -246,36 +246,36 @@ protected:
// other internal states
int m_icount;
- UINT32 m_com_delay;
- UINT32 m_delayv;
- UINT32 m_delayr;
- UINT32 m_berr;
- UINT32 m_biu;
- UINT32 m_icacheTag[ ICACHE_ENTRIES / 4 ];
- UINT32 m_icache[ ICACHE_ENTRIES ];
- UINT32 m_dcache[ DCACHE_ENTRIES ];
+ uint32_t m_com_delay;
+ uint32_t m_delayv;
+ uint32_t m_delayr;
+ uint32_t m_berr;
+ uint32_t m_biu;
+ uint32_t m_icacheTag[ ICACHE_ENTRIES / 4 ];
+ uint32_t m_icache[ ICACHE_ENTRIES ];
+ uint32_t m_dcache[ DCACHE_ENTRIES ];
int m_multiplier_operation;
- UINT32 m_multiplier_operand1;
- UINT32 m_multiplier_operand2;
+ uint32_t m_multiplier_operand1;
+ uint32_t m_multiplier_operand2;
int m_bus_attached;
- UINT32 m_bad_byte_address_mask;
- UINT32 m_bad_half_address_mask;
- UINT32 m_bad_word_address_mask;
- UINT32 m_exp_base;
- UINT32 m_exp_config;
- UINT32 m_ram_config;
- UINT32 m_rom_config;
+ uint32_t m_bad_byte_address_mask;
+ uint32_t m_bad_half_address_mask;
+ uint32_t m_bad_word_address_mask;
+ uint32_t m_exp_base;
+ uint32_t m_exp_config;
+ uint32_t m_ram_config;
+ uint32_t m_rom_config;
void stop();
- UINT32 cache_readword( UINT32 offset );
- void cache_writeword( UINT32 offset, UINT32 data );
- UINT8 readbyte( UINT32 address );
- UINT16 readhalf( UINT32 address );
- UINT32 readword( UINT32 address );
- UINT32 readword_masked( UINT32 address, UINT32 mask );
- void writeword( UINT32 address, UINT32 data );
- void writeword_masked( UINT32 address, UINT32 data, UINT32 mask );
- UINT32 log_bioscall_parameter( int parm );
+ uint32_t cache_readword( uint32_t offset );
+ void cache_writeword( uint32_t offset, uint32_t data );
+ uint8_t readbyte( uint32_t address );
+ uint16_t readhalf( uint32_t address );
+ uint32_t readword( uint32_t address );
+ uint32_t readword_masked( uint32_t address, uint32_t mask );
+ void writeword( uint32_t address, uint32_t data );
+ void writeword_masked( uint32_t address, uint32_t data, uint32_t mask );
+ uint32_t log_bioscall_parameter( int parm );
const char *log_bioscall_string( int parm );
const char *log_bioscall_hex( int parm );
const char *log_bioscall_char( int parm );
@@ -289,8 +289,8 @@ protected:
void funct_div();
void funct_divu();
void multiplier_update();
- UINT32 get_hi();
- UINT32 get_lo();
+ uint32_t get_hi();
+ uint32_t get_lo();
int execute_unstoppable_instructions( int executeCop2 );
void update_address_masks();
void update_scratchpad();
@@ -301,37 +301,37 @@ protected:
void set_pc( unsigned pc );
void fetch_next_op();
int advance_pc();
- void load( UINT32 reg, UINT32 value );
- void delayed_load( UINT32 reg, UINT32 value );
- void branch( UINT32 address );
+ void load( uint32_t reg, uint32_t value );
+ void delayed_load( uint32_t reg, uint32_t value );
+ void branch( uint32_t address );
void conditional_branch( int takeBranch );
void unconditional_branch();
- void common_exception( int exception, UINT32 romOffset, UINT32 ramOffset );
+ void common_exception( int exception, uint32_t romOffset, uint32_t ramOffset );
void exception( int exception );
void breakpoint_exception();
void fetch_bus_error_exception();
void load_bus_error_exception();
void store_bus_error_exception();
- void load_bad_address( UINT32 address );
- void store_bad_address( UINT32 address );
- int data_address_breakpoint( int dcic_rw, int dcic_status, UINT32 address );
- int load_data_address_breakpoint( UINT32 address );
- int store_data_address_breakpoint( UINT32 address );
+ void load_bad_address( uint32_t address );
+ void store_bad_address( uint32_t address );
+ int data_address_breakpoint( int dcic_rw, int dcic_status, uint32_t address );
+ int load_data_address_breakpoint( uint32_t address );
+ int store_data_address_breakpoint( uint32_t address );
- UINT32 get_register_from_pipeline( int reg );
+ uint32_t get_register_from_pipeline( int reg );
int cop0_usable();
void lwc( int cop, int sr_cu );
void swc( int cop, int sr_cu );
void bc( int cop, int sr_cu, int condition );
- UINT32 getcp1dr( int reg );
- void setcp1dr( int reg, UINT32 value );
- UINT32 getcp1cr( int reg );
- void setcp1cr( int reg, UINT32 value );
- UINT32 getcp3dr( int reg );
- void setcp3dr( int reg, UINT32 value );
- UINT32 getcp3cr( int reg );
- void setcp3cr( int reg, UINT32 value );
+ uint32_t getcp1dr( int reg );
+ void setcp1dr( int reg, uint32_t value );
+ uint32_t getcp1cr( int reg );
+ void setcp1cr( int reg, uint32_t value );
+ uint32_t getcp3dr( int reg );
+ void setcp3dr( int reg, uint32_t value );
+ uint32_t getcp3cr( int reg );
+ void setcp3cr( int reg, uint32_t value );
gte m_gte;
@@ -347,52 +347,52 @@ protected:
private:
// disassembler interface
- virtual UINT32 pc() override { return m_pc; }
- virtual UINT32 delayr() override { return m_delayr; }
- virtual UINT32 delayv() override { return m_delayv; }
- virtual UINT32 r(int i) override { return m_r[ i ]; }
+ virtual uint32_t pc() override { return m_pc; }
+ virtual uint32_t delayr() override { return m_delayr; }
+ virtual uint32_t delayv() override { return m_delayv; }
+ virtual uint32_t r(int i) override { return m_r[ i ]; }
};
class cxd8530aq_device : public psxcpu_device
{
public:
// construction/destruction
- cxd8530aq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cxd8530aq_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class cxd8530bq_device : public psxcpu_device
{
public:
// construction/destruction
- cxd8530bq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cxd8530bq_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class cxd8530cq_device : public psxcpu_device
{
public:
// construction/destruction
- cxd8530cq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cxd8530cq_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class cxd8661r_device : public psxcpu_device
{
public:
// construction/destruction
- cxd8661r_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cxd8661r_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class cxd8606bq_device : public psxcpu_device
{
public:
// construction/destruction
- cxd8606bq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cxd8606bq_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class cxd8606cq_device : public psxcpu_device
{
public:
// construction/destruction
- cxd8606cq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ cxd8606cq_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// device type definition
@@ -408,8 +408,8 @@ extern const device_type CXD8606CQ;
#define PSXCPU_DELAYR_PC ( 32 )
#define PSXCPU_DELAYR_NOTPC ( 33 )
-#define PSXCPU_BYTE_EXTEND( a ) ( (INT32)(INT8)a )
-#define PSXCPU_WORD_EXTEND( a ) ( (INT32)(INT16)a )
+#define PSXCPU_BYTE_EXTEND( a ) ( (int32_t)(int8_t)a )
+#define PSXCPU_WORD_EXTEND( a ) ( (int32_t)(int16_t)a )
#define INS_OP( op ) ( ( op >> 26 ) & 63 )
#define INS_RS( op ) ( ( op >> 21 ) & 31 )
@@ -522,6 +522,6 @@ extern const device_type CXD8606CQ;
#define CF_TLBP ( 8 )
#define CF_RFE ( 16 )
-extern unsigned DasmPSXCPU( psxcpu_state *state, char *buffer, UINT32 pc, const UINT8 *opram );
+extern unsigned DasmPSXCPU( psxcpu_state *state, char *buffer, uint32_t pc, const uint8_t *opram );
#endif /* __PSXCPU_H__ */
diff --git a/src/devices/cpu/psx/psxdasm.cpp b/src/devices/cpu/psx/psxdasm.cpp
index bfa1c546835..1eea78c11a3 100644
--- a/src/devices/cpu/psx/psxdasm.cpp
+++ b/src/devices/cpu/psx/psxdasm.cpp
@@ -9,7 +9,7 @@
#include "psx.h"
#include "gte.h"
-static char *make_signed_hex_str_16( UINT32 value )
+static char *make_signed_hex_str_16( uint32_t value )
{
static char s_hex[ 20 ];
@@ -122,23 +122,23 @@ static const char *const s_gtelm[] =
" lm=s16", " lm=u15"
};
-static char *effective_address( psxcpu_state *state, UINT32 pc, UINT32 op )
+static char *effective_address( psxcpu_state *state, uint32_t pc, uint32_t op )
{
static char s_address[ 30 ];
if( state != nullptr && state->pc() == pc )
{
sprintf( s_address, "%s(%s) ; 0x%08x", make_signed_hex_str_16( INS_IMMEDIATE( op ) ), s_cpugenreg[ INS_RS( op ) ],
- (UINT32)( state->r( INS_RS( op ) ) + (INT16)INS_IMMEDIATE( op ) ) );
+ (uint32_t)( state->r( INS_RS( op ) ) + (int16_t)INS_IMMEDIATE( op ) ) );
return s_address;
}
sprintf( s_address, "%s(%s)", make_signed_hex_str_16( INS_IMMEDIATE( op ) ), s_cpugenreg[ INS_RS( op ) ] );
return s_address;
}
-static UINT32 relative_address( psxcpu_state *state, UINT32 pc, UINT32 op )
+static uint32_t relative_address( psxcpu_state *state, uint32_t pc, uint32_t op )
{
- UINT32 nextpc = pc + 4;
+ uint32_t nextpc = pc + 4;
if( state != nullptr && state->pc() == pc && state->delayr() == PSXCPU_DELAYR_PC )
{
nextpc = state->delayv();
@@ -147,9 +147,9 @@ static UINT32 relative_address( psxcpu_state *state, UINT32 pc, UINT32 op )
return nextpc + ( PSXCPU_WORD_EXTEND( INS_IMMEDIATE( op ) ) << 2 );
}
-static UINT32 jump_address( psxcpu_state *state, UINT32 pc, UINT32 op )
+static uint32_t jump_address( psxcpu_state *state, uint32_t pc, uint32_t op )
{
- UINT32 nextpc = pc + 4;
+ uint32_t nextpc = pc + 4;
if( state != nullptr && state->pc() == pc && state->delayr() == PSXCPU_DELAYR_PC )
{
nextpc = state->delayv();
@@ -157,15 +157,15 @@ static UINT32 jump_address( psxcpu_state *state, UINT32 pc, UINT32 op )
return ( nextpc & 0xf0000000 ) + ( INS_TARGET( op ) << 2 );
}
-static UINT32 fetch_op( const UINT8 *opram )
+static uint32_t fetch_op( const uint8_t *opram )
{
return ( opram[ 3 ] << 24 ) | ( opram[ 2 ] << 16 ) | ( opram[ 1 ] << 8 ) | ( opram[ 0 ] << 0 );
}
-static char *upper_address( UINT32 op, const UINT8 *opram )
+static char *upper_address( uint32_t op, const uint8_t *opram )
{
static char s_address[ 20 ];
- UINT32 nextop = fetch_op( opram );
+ uint32_t nextop = fetch_op( opram );
if( INS_OP( nextop ) == OP_ORI && INS_RT( op ) == INS_RS( nextop ) )
{
@@ -173,7 +173,7 @@ static char *upper_address( UINT32 op, const UINT8 *opram )
}
else if( INS_OP( nextop ) == OP_ADDIU && INS_RT( op ) == INS_RS( nextop ) )
{
- sprintf( s_address, "$%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) + (INT16) INS_IMMEDIATE( nextop ) );
+ sprintf( s_address, "$%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) + (int16_t) INS_IMMEDIATE( nextop ) );
}
else
{
@@ -183,11 +183,11 @@ static char *upper_address( UINT32 op, const UINT8 *opram )
return s_address;
}
-unsigned DasmPSXCPU( psxcpu_state *state, char *buffer, UINT32 pc, const UINT8 *opram )
+unsigned DasmPSXCPU( psxcpu_state *state, char *buffer, uint32_t pc, const uint8_t *opram )
{
- UINT32 op;
- const UINT8 *oldopram;
- UINT32 flags = 0;
+ uint32_t op;
+ const uint8_t *oldopram;
+ uint32_t flags = 0;
oldopram = opram;
op = fetch_op( opram );
diff --git a/src/devices/cpu/psx/rcnt.cpp b/src/devices/cpu/psx/rcnt.cpp
index f3e34a7cff8..c54af348ade 100644
--- a/src/devices/cpu/psx/rcnt.cpp
+++ b/src/devices/cpu/psx/rcnt.cpp
@@ -26,7 +26,7 @@ static inline void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, c
const device_type PSX_RCNT = &device_creator<psxrcnt_device>;
-psxrcnt_device::psxrcnt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+psxrcnt_device::psxrcnt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, PSX_RCNT, "Sony PSX RCNT", tag, owner, clock, "psxrcnt", __FILE__),
m_irq0_handler(*this),
m_irq1_handler(*this),
@@ -118,7 +118,7 @@ READ32_MEMBER( psxrcnt_device::read )
{
int n_counter = offset / 4;
psx_root *root = &root_counter[ n_counter ];
- UINT32 data;
+ uint32_t data;
switch( offset % 4 )
{
@@ -139,7 +139,7 @@ READ32_MEMBER( psxrcnt_device::read )
return data;
}
-UINT64 psxrcnt_device::gettotalcycles( void )
+uint64_t psxrcnt_device::gettotalcycles( void )
{
/* TODO: should return the start of the current tick. */
return ((cpu_device *)owner())->total_cycles() * 2;
@@ -165,7 +165,7 @@ int psxrcnt_device::root_divider( int n_counter )
return 1;
}
-UINT16 psxrcnt_device::root_current( int n_counter )
+uint16_t psxrcnt_device::root_current( int n_counter )
{
psx_root *root = &root_counter[ n_counter ];
@@ -175,7 +175,7 @@ UINT16 psxrcnt_device::root_current( int n_counter )
}
else
{
- UINT64 n_current;
+ uint64_t n_current;
n_current = gettotalcycles() - root->n_start;
n_current /= root_divider( n_counter );
n_current += root->n_count;
diff --git a/src/devices/cpu/psx/rcnt.h b/src/devices/cpu/psx/rcnt.h
index b3b610ed8a8..69af108c44d 100644
--- a/src/devices/cpu/psx/rcnt.h
+++ b/src/devices/cpu/psx/rcnt.h
@@ -34,16 +34,16 @@ extern const device_type PSX_RCNT;
struct psx_root
{
emu_timer *timer;
- UINT16 n_count;
- UINT16 n_mode;
- UINT16 n_target;
- UINT64 n_start;
+ uint16_t n_count;
+ uint16_t n_mode;
+ uint16_t n_target;
+ uint64_t n_start;
};
class psxrcnt_device : public device_t
{
public:
- psxrcnt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ psxrcnt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_irq0_handler(device_t &device, _Object object) { return downcast<psxrcnt_device &>(device).m_irq0_handler.set_callback(object); }
@@ -62,9 +62,9 @@ protected:
private:
psx_root root_counter[ 3 ];
- UINT64 gettotalcycles( void );
+ uint64_t gettotalcycles( void );
int root_divider( int n_counter );
- UINT16 root_current( int n_counter );
+ uint16_t root_current( int n_counter );
int root_target( int n_counter );
void root_timer_adjust( int n_counter );
diff --git a/src/devices/cpu/psx/sio.cpp b/src/devices/cpu/psx/sio.cpp
index ba057dd01e1..e3fe2924ea5 100644
--- a/src/devices/cpu/psx/sio.cpp
+++ b/src/devices/cpu/psx/sio.cpp
@@ -27,17 +27,17 @@ static inline void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, c
const device_type PSX_SIO0 = &device_creator<psxsio0_device>;
const device_type PSX_SIO1 = &device_creator<psxsio1_device>;
-psxsio0_device::psxsio0_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+psxsio0_device::psxsio0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
psxsio_device(mconfig, PSX_SIO0, "Sony PSX SIO-0", tag, owner, clock, "psxsio0", __FILE__)
{
}
-psxsio1_device::psxsio1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+psxsio1_device::psxsio1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
psxsio_device(mconfig, PSX_SIO1, "Sony PSX SIO-1", tag, owner, clock, "psxsio1", __FILE__)
{
}
-psxsio_device::psxsio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+psxsio_device::psxsio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
m_status(SIO_STATUS_TX_EMPTY | SIO_STATUS_TX_RDY), m_mode(0), m_control(0), m_baud(0),
m_rxd(1), m_tx_data(0), m_rx_data(0), m_tx_shift(0), m_rx_shift(0), m_tx_bits(0), m_rx_bits(0), m_timer(nullptr),
@@ -286,7 +286,7 @@ WRITE32_MEMBER( psxsio_device::write )
READ32_MEMBER( psxsio_device::read )
{
- UINT32 data;
+ uint32_t data;
switch( offset % 4 )
{
diff --git a/src/devices/cpu/psx/sio.h b/src/devices/cpu/psx/sio.h
index 93d8428bc9e..d8516b799e2 100644
--- a/src/devices/cpu/psx/sio.h
+++ b/src/devices/cpu/psx/sio.h
@@ -52,7 +52,7 @@ extern const device_type PSX_SIO1;
class psxsio_device : public device_t
{
public:
- psxsio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ psxsio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// static configuration helpers
template<class _Object> static devcb_base &set_irq_handler(device_t &device, _Object object) { return downcast<psxsio_device &>(device).m_irq_handler.set_callback(object); }
@@ -77,17 +77,17 @@ private:
void sio_interrupt();
void sio_timer_adjust();
- UINT32 m_status;
- UINT32 m_mode;
- UINT32 m_control;
- UINT32 m_baud;
+ uint32_t m_status;
+ uint32_t m_mode;
+ uint32_t m_control;
+ uint32_t m_baud;
int m_rxd;
- UINT32 m_tx_data;
- UINT32 m_rx_data;
- UINT32 m_tx_shift;
- UINT32 m_rx_shift;
- UINT32 m_tx_bits;
- UINT32 m_rx_bits;
+ uint32_t m_tx_data;
+ uint32_t m_rx_data;
+ uint32_t m_tx_shift;
+ uint32_t m_rx_shift;
+ uint32_t m_tx_bits;
+ uint32_t m_rx_bits;
emu_timer *m_timer;
@@ -101,13 +101,13 @@ private:
class psxsio0_device : public psxsio_device
{
public:
- psxsio0_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ psxsio0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class psxsio1_device : public psxsio_device
{
public:
- psxsio1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ psxsio1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
#endif
diff --git a/src/devices/cpu/rsp/rsp.cpp b/src/devices/cpu/rsp/rsp.cpp
index b3ddbda9686..98cef6ff670 100644
--- a/src/devices/cpu/rsp/rsp.cpp
+++ b/src/devices/cpu/rsp/rsp.cpp
@@ -23,20 +23,20 @@ const device_type RSP = &device_creator<rsp_device>;
#define RSP_TEST_SYNC 0
#define PRINT_VECREG(x) osd_printf_debug("V%d: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X\n", (x), \
- (UINT16)VREG_S((x),0), (UINT16)VREG_S((x),1), \
- (UINT16)VREG_S((x),2), (UINT16)VREG_S((x),3), \
- (UINT16)VREG_S((x),4), (UINT16)VREG_S((x),5), \
- (UINT16)VREG_S((x),6), (UINT16)VREG_S((x),7))
+ (uint16_t)VREG_S((x),0), (uint16_t)VREG_S((x),1), \
+ (uint16_t)VREG_S((x),2), (uint16_t)VREG_S((x),3), \
+ (uint16_t)VREG_S((x),4), (uint16_t)VREG_S((x),5), \
+ (uint16_t)VREG_S((x),6), (uint16_t)VREG_S((x),7))
#define PRINT_ACCUM(x) osd_printf_debug("A%d: %08X|%08X\n", (x), \
- (UINT32)( ( ACCUM(x) >> 32 ) & 0x00000000ffffffff ), \
- (UINT32)( ACCUM(x) & 0x00000000ffffffff ))
+ (uint32_t)( ( ACCUM(x) >> 32 ) & 0x00000000ffffffff ), \
+ (uint32_t)( ACCUM(x) & 0x00000000ffffffff ))
-extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
+extern offs_t rsp_dasm_one(char *buffer, offs_t pc, uint32_t op);
-#define SIMM16 ((INT32)(INT16)(op))
-#define UIMM16 ((UINT16)(op))
+#define SIMM16 ((int32_t)(int16_t)(op))
+#define UIMM16 ((uint16_t)(op))
#define UIMM26 (op & 0x03ffffff)
#define RSVAL (m_rsp_state->r[RSREG])
@@ -98,7 +98,7 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
#define CACHE_SIZE (32 * 1024 * 1024)
-rsp_device::rsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+rsp_device::rsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, RSP, "RSP", tag, owner, clock, "rsp", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 32)
, m_cache(CACHE_SIZE + sizeof(internal_rsp_state))
@@ -141,36 +141,36 @@ rsp_device::rsp_device(const machine_config &mconfig, const char *tag, device_t
{
}
-offs_t rsp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t rsp_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( rsp );
return CPU_DISASSEMBLE_NAME( rsp )(this, buffer, pc, oprom, opram, options);
}
-void rsp_device::rsp_add_imem(UINT32 *base)
+void rsp_device::rsp_add_imem(uint32_t *base)
{
m_imem32 = base;
- m_imem16 = (UINT16*)base;
- m_imem8 = (UINT8*)base;
+ m_imem16 = (uint16_t*)base;
+ m_imem8 = (uint8_t*)base;
}
-void rsp_device::rsp_add_dmem(UINT32 *base)
+void rsp_device::rsp_add_dmem(uint32_t *base)
{
m_dmem32 = base;
- m_dmem16 = (UINT16*)base;
- m_dmem8 = (UINT8*)base;
+ m_dmem16 = (uint16_t*)base;
+ m_dmem8 = (uint8_t*)base;
}
-UINT8 rsp_device::DM_READ8(UINT32 address)
+uint8_t rsp_device::DM_READ8(uint32_t address)
{
- UINT8 ret = m_dmem8[BYTE4_XOR_BE(address & 0xfff)];
+ uint8_t ret = m_dmem8[BYTE4_XOR_BE(address & 0xfff)];
//printf("R8:%08x=%02x\n", address, ret);
return ret;
}
-UINT16 rsp_device::DM_READ16(UINT32 address)
+uint16_t rsp_device::DM_READ16(uint32_t address)
{
- UINT16 ret;
+ uint16_t ret;
address &= 0xfff;
ret = m_dmem8[BYTE4_XOR_BE(address)] << 8;
ret |= m_dmem8[BYTE4_XOR_BE(address + 1)];
@@ -178,9 +178,9 @@ UINT16 rsp_device::DM_READ16(UINT32 address)
return ret;
}
-UINT32 rsp_device::DM_READ32(UINT32 address)
+uint32_t rsp_device::DM_READ32(uint32_t address)
{
- UINT32 ret;
+ uint32_t ret;
address &= 0xfff;
ret = m_dmem8[BYTE4_XOR_BE(address)] << 24;
ret |= m_dmem8[BYTE4_XOR_BE(address + 1)] << 16;
@@ -190,14 +190,14 @@ UINT32 rsp_device::DM_READ32(UINT32 address)
return ret;
}
-void rsp_device::DM_WRITE8(UINT32 address, UINT8 data)
+void rsp_device::DM_WRITE8(uint32_t address, uint8_t data)
{
address &= 0xfff;
m_dmem8[BYTE4_XOR_BE(address)] = data;
//printf("W8:%08x=%02x\n", address, data);
}
-void rsp_device::DM_WRITE16(UINT32 address, UINT16 data)
+void rsp_device::DM_WRITE16(uint32_t address, uint16_t data)
{
address &= 0xfff;
m_dmem8[BYTE4_XOR_BE(address)] = data >> 8;
@@ -205,7 +205,7 @@ void rsp_device::DM_WRITE16(UINT32 address, UINT16 data)
//printf("W16:%08x=%04x\n", address, data);
}
-void rsp_device::DM_WRITE32(UINT32 address, UINT32 data)
+void rsp_device::DM_WRITE32(uint32_t address, uint32_t data)
{
address &= 0xfff;
m_dmem8[BYTE4_XOR_BE(address)] = data >> 24;
@@ -215,18 +215,18 @@ void rsp_device::DM_WRITE32(UINT32 address, UINT32 data)
//printf("W32:%08x=%08x\n", address, data);
}
-UINT8 rsp_device::READ8(UINT32 address)
+uint8_t rsp_device::READ8(uint32_t address)
{
- UINT8 ret;
+ uint8_t ret;
address &= 0xfff;
ret = m_program->read_byte(address);
//printf("R8:%08x=%02x\n", address, ret);
return ret;
}
-UINT16 rsp_device::READ16(UINT32 address)
+uint16_t rsp_device::READ16(uint32_t address)
{
- UINT16 ret;
+ uint16_t ret;
address &= 0xfff;
ret = (m_program->read_byte(address) << 8) | (m_program->read_byte(address + 1) & 0xff);
@@ -235,9 +235,9 @@ UINT16 rsp_device::READ16(UINT32 address)
return ret;
}
-UINT32 rsp_device::READ32(UINT32 address)
+uint32_t rsp_device::READ32(uint32_t address)
{
- UINT32 ret;
+ uint32_t ret;
address &= 0xfff;
ret = (m_program->read_byte(address) << 24) |
@@ -249,14 +249,14 @@ UINT32 rsp_device::READ32(UINT32 address)
return ret;
}
-void rsp_device::WRITE8(UINT32 address, UINT8 data)
+void rsp_device::WRITE8(uint32_t address, uint8_t data)
{
address &= 0xfff;
m_program->write_byte(address, data);
//printf("W8:%08x=%02x\n", address, data);
}
-void rsp_device::WRITE16(UINT32 address, UINT16 data)
+void rsp_device::WRITE16(uint32_t address, uint16_t data)
{
address &= 0xfff;
@@ -265,7 +265,7 @@ void rsp_device::WRITE16(UINT32 address, UINT16 data)
//printf("W16:%08x=%04x\n", address, data);
}
-void rsp_device::WRITE32(UINT32 address, UINT32 data)
+void rsp_device::WRITE32(uint32_t address, uint32_t data)
{
address &= 0xfff;
@@ -278,7 +278,7 @@ void rsp_device::WRITE32(UINT32 address, UINT32 data)
/*****************************************************************************/
-UINT32 rsp_device::get_cop0_reg(int reg)
+uint32_t rsp_device::get_cop0_reg(int reg)
{
reg &= 0xf;
if (reg < 8)
@@ -293,7 +293,7 @@ UINT32 rsp_device::get_cop0_reg(int reg)
return 0;
}
-void rsp_device::set_cop0_reg(int reg, UINT32 data)
+void rsp_device::set_cop0_reg(int reg, uint32_t data)
{
reg &= 0xf;
if (reg < 8)
@@ -306,7 +306,7 @@ void rsp_device::set_cop0_reg(int reg, UINT32 data)
}
}
-void rsp_device::unimplemented_opcode(UINT32 op)
+void rsp_device::unimplemented_opcode(uint32_t op)
{
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
@@ -324,7 +324,7 @@ void rsp_device::unimplemented_opcode(UINT32 op)
for (i=0; i < 0x1000; i+=4)
{
- UINT32 opcode = ROPCODE(0x04001000 + i);
+ uint32_t opcode = ROPCODE(0x04001000 + i);
rsp_dasm_one(string, 0x04001000 + i, opcode);
fprintf(dasm, "%08X: %08X %s\n", 0x04001000 + i, opcode, string);
}
@@ -392,7 +392,7 @@ void rsp_device::device_start()
m_step_count = 0;
/* initialize the UML generator */
- UINT32 drc_flags = 0;
+ uint32_t drc_flags = 0;
m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, drc_flags, 8, 32, 2);
/* add symbols for our stuff */
@@ -563,7 +563,7 @@ void rsp_device::device_stop()
for (i=0; i < 0x1000; i+=4)
{
- UINT32 opcode = ROPCODE(0x04001000 + i);
+ uint32_t opcode = ROPCODE(0x04001000 + i);
rsp_dasm_one(string, 0x04001000 + i, opcode);
fprintf(dasm, "%08X: %08X %s\n", 0x04001000 + i, opcode, string);
}
@@ -623,7 +623,7 @@ void rsp_device::execute_run()
m_ppc = m_rsp_state->pc;
debugger_instruction_hook(this, m_rsp_state->pc);
- UINT32 op = ROPCODE(m_rsp_state->pc);
+ uint32_t op = ROPCODE(m_rsp_state->pc);
if (m_nextpc != ~0)
{
m_rsp_state->pc = m_nextpc;
@@ -640,12 +640,12 @@ void rsp_device::execute_run()
{
switch (op & 0x3f)
{
- case 0x00: /* SLL */ if (RDREG) RDVAL = (UINT32)RTVAL << SHIFT; break;
- case 0x02: /* SRL */ if (RDREG) RDVAL = (UINT32)RTVAL >> SHIFT; break;
- case 0x03: /* SRA */ if (RDREG) RDVAL = (INT32)RTVAL >> SHIFT; break;
- case 0x04: /* SLLV */ if (RDREG) RDVAL = (UINT32)RTVAL << (RSVAL & 0x1f); break;
- case 0x06: /* SRLV */ if (RDREG) RDVAL = (UINT32)RTVAL >> (RSVAL & 0x1f); break;
- case 0x07: /* SRAV */ if (RDREG) RDVAL = (INT32)RTVAL >> (RSVAL & 0x1f); break;
+ case 0x00: /* SLL */ if (RDREG) RDVAL = (uint32_t)RTVAL << SHIFT; break;
+ case 0x02: /* SRL */ if (RDREG) RDVAL = (uint32_t)RTVAL >> SHIFT; break;
+ case 0x03: /* SRA */ if (RDREG) RDVAL = (int32_t)RTVAL >> SHIFT; break;
+ case 0x04: /* SLLV */ if (RDREG) RDVAL = (uint32_t)RTVAL << (RSVAL & 0x1f); break;
+ case 0x06: /* SRLV */ if (RDREG) RDVAL = (uint32_t)RTVAL >> (RSVAL & 0x1f); break;
+ case 0x07: /* SRAV */ if (RDREG) RDVAL = (int32_t)RTVAL >> (RSVAL & 0x1f); break;
case 0x08: /* JR */ JUMP_PC(RSVAL); break;
case 0x09: /* JALR */ JUMP_PC_L(RSVAL, RDREG); break;
case 0x0d: /* BREAK */
@@ -654,16 +654,16 @@ void rsp_device::execute_run()
m_rsp_state->icount = std::min(m_rsp_state->icount, 1);
break;
}
- case 0x20: /* ADD */ if (RDREG) RDVAL = (INT32)(RSVAL + RTVAL); break;
- case 0x21: /* ADDU */ if (RDREG) RDVAL = (INT32)(RSVAL + RTVAL); break;
- case 0x22: /* SUB */ if (RDREG) RDVAL = (INT32)(RSVAL - RTVAL); break;
- case 0x23: /* SUBU */ if (RDREG) RDVAL = (INT32)(RSVAL - RTVAL); break;
+ case 0x20: /* ADD */ if (RDREG) RDVAL = (int32_t)(RSVAL + RTVAL); break;
+ case 0x21: /* ADDU */ if (RDREG) RDVAL = (int32_t)(RSVAL + RTVAL); break;
+ case 0x22: /* SUB */ if (RDREG) RDVAL = (int32_t)(RSVAL - RTVAL); break;
+ case 0x23: /* SUBU */ if (RDREG) RDVAL = (int32_t)(RSVAL - RTVAL); break;
case 0x24: /* AND */ if (RDREG) RDVAL = RSVAL & RTVAL; break;
case 0x25: /* OR */ if (RDREG) RDVAL = RSVAL | RTVAL; break;
case 0x26: /* XOR */ if (RDREG) RDVAL = RSVAL ^ RTVAL; break;
case 0x27: /* NOR */ if (RDREG) RDVAL = ~(RSVAL | RTVAL); break;
- case 0x2a: /* SLT */ if (RDREG) RDVAL = (INT32)RSVAL < (INT32)RTVAL; break;
- case 0x2b: /* SLTU */ if (RDREG) RDVAL = (UINT32)RSVAL < (UINT32)RTVAL; break;
+ case 0x2a: /* SLT */ if (RDREG) RDVAL = (int32_t)RSVAL < (int32_t)RTVAL; break;
+ case 0x2b: /* SLTU */ if (RDREG) RDVAL = (uint32_t)RSVAL < (uint32_t)RTVAL; break;
default: unimplemented_opcode(op); break;
}
break;
@@ -673,10 +673,10 @@ void rsp_device::execute_run()
{
switch (RTREG)
{
- case 0x00: /* BLTZ */ if ((INT32)(RSVAL) < 0) JUMP_REL(SIMM16); break;
- case 0x01: /* BGEZ */ if ((INT32)(RSVAL) >= 0) JUMP_REL(SIMM16); break;
- case 0x10: /* BLTZAL */ if ((INT32)(RSVAL) < 0) JUMP_REL_L(SIMM16, 31); break;
- case 0x11: /* BGEZAL */ if ((INT32)(RSVAL) >= 0) JUMP_REL_L(SIMM16, 31); break;
+ case 0x00: /* BLTZ */ if ((int32_t)(RSVAL) < 0) JUMP_REL(SIMM16); break;
+ case 0x01: /* BGEZ */ if ((int32_t)(RSVAL) >= 0) JUMP_REL(SIMM16); break;
+ case 0x10: /* BLTZAL */ if ((int32_t)(RSVAL) < 0) JUMP_REL_L(SIMM16, 31); break;
+ case 0x11: /* BGEZAL */ if ((int32_t)(RSVAL) >= 0) JUMP_REL_L(SIMM16, 31); break;
default: unimplemented_opcode(op); break;
}
break;
@@ -686,12 +686,12 @@ void rsp_device::execute_run()
case 0x03: /* JAL */ JUMP_ABS_L(UIMM26, 31); break;
case 0x04: /* BEQ */ if (RSVAL == RTVAL) JUMP_REL(SIMM16); break;
case 0x05: /* BNE */ if (RSVAL != RTVAL) JUMP_REL(SIMM16); break;
- case 0x06: /* BLEZ */ if ((INT32)RSVAL <= 0) JUMP_REL(SIMM16); break;
- case 0x07: /* BGTZ */ if ((INT32)RSVAL > 0) JUMP_REL(SIMM16); break;
- case 0x08: /* ADDI */ if (RTREG) RTVAL = (INT32)(RSVAL + SIMM16); break;
- case 0x09: /* ADDIU */ if (RTREG) RTVAL = (INT32)(RSVAL + SIMM16); break;
- case 0x0a: /* SLTI */ if (RTREG) RTVAL = (INT32)(RSVAL) < ((INT32)SIMM16); break;
- case 0x0b: /* SLTIU */ if (RTREG) RTVAL = (UINT32)(RSVAL) < (UINT32)((INT32)SIMM16); break;
+ case 0x06: /* BLEZ */ if ((int32_t)RSVAL <= 0) JUMP_REL(SIMM16); break;
+ case 0x07: /* BGTZ */ if ((int32_t)RSVAL > 0) JUMP_REL(SIMM16); break;
+ case 0x08: /* ADDI */ if (RTREG) RTVAL = (int32_t)(RSVAL + SIMM16); break;
+ case 0x09: /* ADDIU */ if (RTREG) RTVAL = (int32_t)(RSVAL + SIMM16); break;
+ case 0x0a: /* SLTI */ if (RTREG) RTVAL = (int32_t)(RSVAL) < ((int32_t)SIMM16); break;
+ case 0x0b: /* SLTIU */ if (RTREG) RTVAL = (uint32_t)(RSVAL) < (uint32_t)((int32_t)SIMM16); break;
case 0x0c: /* ANDI */ if (RTREG) RTVAL = RSVAL & UIMM16; break;
case 0x0d: /* ORI */ if (RTREG) RTVAL = RSVAL | UIMM16; break;
case 0x0e: /* XORI */ if (RTREG) RTVAL = RSVAL ^ UIMM16; break;
@@ -714,11 +714,11 @@ void rsp_device::execute_run()
break;
}
- case 0x20: /* LB */ if (RTREG) RTVAL = (INT32)(INT8)READ8(RSVAL + SIMM16); break;
- case 0x21: /* LH */ if (RTREG) RTVAL = (INT32)(INT16)READ16(RSVAL + SIMM16); break;
+ case 0x20: /* LB */ if (RTREG) RTVAL = (int32_t)(int8_t)READ8(RSVAL + SIMM16); break;
+ case 0x21: /* LH */ if (RTREG) RTVAL = (int32_t)(int16_t)READ16(RSVAL + SIMM16); break;
case 0x23: /* LW */ if (RTREG) RTVAL = READ32(RSVAL + SIMM16); break;
- case 0x24: /* LBU */ if (RTREG) RTVAL = (UINT8)READ8(RSVAL + SIMM16); break;
- case 0x25: /* LHU */ if (RTREG) RTVAL = (UINT16)READ16(RSVAL + SIMM16); break;
+ case 0x24: /* LBU */ if (RTREG) RTVAL = (uint8_t)READ8(RSVAL + SIMM16); break;
+ case 0x25: /* LHU */ if (RTREG) RTVAL = (uint16_t)READ16(RSVAL + SIMM16); break;
case 0x28: /* SB */ WRITE8(RSVAL + SIMM16, RTVAL); break;
case 0x29: /* SH */ WRITE16(RSVAL + SIMM16, RTVAL); break;
case 0x2b: /* SW */ WRITE32(RSVAL + SIMM16, RTVAL); break;
@@ -735,7 +735,7 @@ void rsp_device::execute_run()
if (LOG_INSTRUCTION_EXECUTION)
{
int i, l;
- static UINT32 prev_regs[32];
+ static uint32_t prev_regs[32];
char string[200];
rsp_dasm_one(string, m_ppc, op);
diff --git a/src/devices/cpu/rsp/rsp.h b/src/devices/cpu/rsp/rsp.h
index 93215bd0649..a00feb1c03b 100644
--- a/src/devices/cpu/rsp/rsp.h
+++ b/src/devices/cpu/rsp/rsp.h
@@ -88,8 +88,8 @@ enum
#define IS_FLOAT(o) (((o) & (1 << 23)) == 0)
#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0)
-#define SIMMVAL ((INT16)op)
-#define UIMMVAL ((UINT16)op)
+#define SIMMVAL ((int16_t)op)
+#define UIMMVAL ((uint16_t)op)
#define LIMMVAL (op & 0x03ffffff)
#define RSP_STATUS_HALT 0x0001
@@ -137,7 +137,7 @@ class rsp_device : public cpu_device
public:
// construction/destruction
- rsp_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ rsp_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
void resolve_cb();
template<class _Object> static devcb_base &static_set_dp_reg_r_callback(device_t &device, _Object object) { return downcast<rsp_device &>(device).m_dp_reg_r_func.set_callback(object); }
@@ -147,9 +147,9 @@ public:
template<class _Object> static devcb_base &static_set_status_callback(device_t &device, _Object object) { return downcast<rsp_device &>(device).m_sp_set_status_func.set_callback(object); }
void rspdrc_flush_drc_cache();
- void rspdrc_set_options(UINT32 options);
- void rsp_add_dmem(UINT32 *base);
- void rsp_add_imem(UINT32 *base);
+ void rspdrc_set_options(uint32_t options);
+ void rsp_add_dmem(uint32_t *base);
+ void rsp_add_imem(uint32_t *base);
void ccfunc_read8();
void ccfunc_read16();
@@ -162,7 +162,7 @@ public:
void ccfunc_sp_set_status_cb();
void ccfunc_unimplemented();
- UINT8* get_dmem() { return m_dmem8; }
+ uint8_t* get_dmem() { return m_dmem8; }
protected:
// device-level overrides
@@ -171,10 +171,10 @@ protected:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override { }
@@ -187,18 +187,18 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- void unimplemented_opcode(UINT32 op);
+ void unimplemented_opcode(uint32_t op);
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- UINT8 checksoftints; /* need to check software interrupts before next instruction */
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
+ uint8_t checksoftints; /* need to check software interrupts before next instruction */
uml::code_label labelnum; /* index for local labels */
};
@@ -210,7 +210,7 @@ private:
{
offs_t start; /* start of the RAM block */
offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
+ uint8_t readonly; /* TRUE if read-only */
void * base; /* base in memory where the RAM lives */
};
@@ -218,16 +218,16 @@ private:
drc_cache m_cache; /* pointer to the DRC code cache */
std::unique_ptr<drcuml_state> m_drcuml; /* DRC UML generator state */
std::unique_ptr<rsp_frontend> m_drcfe; /* pointer to the DRC front-end state */
- UINT32 m_drcoptions; /* configurable DRC options */
+ uint32_t m_drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 m_cache_dirty; /* true if we need to flush the cache */
+ uint8_t m_cache_dirty; /* true if we need to flush the cache */
/* parameters for subroutines */
- UINT64 m_numcycles; /* return value from gettotalcycles */
+ uint64_t m_numcycles; /* return value from gettotalcycles */
const char * m_format; /* format string for print_debug */
- UINT32 m_arg2; /* print_debug argument 3 */
- UINT32 m_arg3; /* print_debug argument 4 */
+ uint32_t m_arg2; /* print_debug argument 3 */
+ uint32_t m_arg3; /* print_debug argument 4 */
/* register mappings */
uml::parameter m_regmap[34]; /* parameter to register mappings for all 32 integer registers */
@@ -245,11 +245,11 @@ private:
struct internal_rsp_state
{
- UINT32 pc;
- UINT32 r[35];
- UINT32 arg0;
- UINT32 arg1;
- UINT32 jmpdest;
+ uint32_t pc;
+ uint32_t r[35];
+ uint32_t arg0;
+ uint32_t arg1;
+ uint32_t jmpdest;
int icount;
};
@@ -257,11 +257,11 @@ private:
FILE *m_exec_output;
- UINT32 m_sr;
- UINT32 m_step_count;
+ uint32_t m_sr;
+ uint32_t m_step_count;
- UINT32 m_ppc;
- UINT32 m_nextpc;
+ uint32_t m_ppc;
+ uint32_t m_nextpc;
address_space *m_program;
protected:
@@ -270,15 +270,15 @@ protected:
private:
std::unique_ptr<rsp_cop2> m_cop2;
- UINT32 *m_dmem32;
- UINT16 *m_dmem16;
- UINT8 *m_dmem8;
+ uint32_t *m_dmem32;
+ uint16_t *m_dmem16;
+ uint8_t *m_dmem8;
- UINT32 *m_imem32;
- UINT16 *m_imem16;
- UINT8 *m_imem8;
+ uint32_t *m_imem32;
+ uint16_t *m_imem16;
+ uint8_t *m_imem8;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
bool m_isdrc;
devcb_read32 m_dp_reg_r_func;
@@ -287,22 +287,22 @@ private:
devcb_write32 m_sp_reg_w_func;
devcb_write32 m_sp_set_status_func;
- UINT8 READ8(UINT32 address);
- UINT16 READ16(UINT32 address);
- UINT32 READ32(UINT32 address);
- void WRITE8(UINT32 address, UINT8 data);
- void WRITE16(UINT32 address, UINT16 data);
- void WRITE32(UINT32 address, UINT32 data);
- UINT32 get_cop0_reg(int reg);
- void set_cop0_reg(int reg, UINT32 data);
+ uint8_t READ8(uint32_t address);
+ uint16_t READ16(uint32_t address);
+ uint32_t READ32(uint32_t address);
+ void WRITE8(uint32_t address, uint8_t data);
+ void WRITE16(uint32_t address, uint16_t data);
+ void WRITE32(uint32_t address, uint32_t data);
+ uint32_t get_cop0_reg(int reg);
+ void set_cop0_reg(int reg, uint32_t data);
void load_fast_iregs(drcuml_block *block);
void save_fast_iregs(drcuml_block *block);
- UINT8 DM_READ8(UINT32 address);
- UINT16 DM_READ16(UINT32 address);
- UINT32 DM_READ32(UINT32 address);
- void DM_WRITE8(UINT32 address, UINT8 data);
- void DM_WRITE16(UINT32 address, UINT16 data);
- void DM_WRITE32(UINT32 address, UINT32 data);
+ uint8_t DM_READ8(uint32_t address);
+ uint16_t DM_READ16(uint32_t address);
+ uint32_t DM_READ32(uint32_t address);
+ void DM_WRITE8(uint32_t address, uint8_t data);
+ void DM_WRITE16(uint32_t address, uint16_t data);
+ void DM_WRITE32(uint32_t address, uint32_t data);
void rspcom_init();
void execute_run_drc();
void code_flush_cache();
@@ -314,13 +314,13 @@ private:
void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, int allow_exception);
void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 linkreg);
+ void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg);
void generate_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
int generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op);
+ void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
};
diff --git a/src/devices/cpu/rsp/rsp_dasm.cpp b/src/devices/cpu/rsp/rsp_dasm.cpp
index b430a43a75d..a16c3f1691c 100644
--- a/src/devices/cpu/rsp/rsp_dasm.cpp
+++ b/src/devices/cpu/rsp/rsp_dasm.cpp
@@ -57,10 +57,10 @@ static const char *const element2[16] =
"00000000", "11111111", "22222222", "33333333", "44444444", "55555555", "66666666", "77777777"
};
-static inline char *signed_imm16(UINT32 op)
+static inline char *signed_imm16(uint32_t op)
{
static char temp[10];
- INT16 value = op & 0xffff;
+ int16_t value = op & 0xffff;
if (value < 0)
{
@@ -85,7 +85,7 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
va_end(vl);
}
-static void disasm_cop0(UINT32 op)
+static void disasm_cop0(uint32_t op)
{
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
@@ -99,7 +99,7 @@ static void disasm_cop0(UINT32 op)
}
}
-static void disasm_cop2(UINT32 op)
+static void disasm_cop2(uint32_t op)
{
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
@@ -186,7 +186,7 @@ static void disasm_cop2(UINT32 op)
}
}
-static void disasm_lwc2(UINT32 op)
+static void disasm_lwc2(uint32_t op)
{
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
@@ -213,7 +213,7 @@ static void disasm_lwc2(UINT32 op)
}
}
-static void disasm_swc2(UINT32 op)
+static void disasm_swc2(uint32_t op)
{
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
@@ -240,13 +240,13 @@ static void disasm_swc2(UINT32 op)
}
}
-offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op)
+offs_t rsp_dasm_one(char *buffer, offs_t pc, uint32_t op)
{
int rs = (op >> 21) & 31;
int rt = (op >> 16) & 31;
int rd = (op >> 11) & 31;
int shift = (op >> 6) & 31;
- UINT32 flags = 0;
+ uint32_t flags = 0;
output = buffer;
@@ -308,10 +308,10 @@ offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op)
{
switch ((op >> 16) & 0x1f)
{
- case 0x00: print("bltz %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x01: print("bgez %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x10: print("bltzal %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x11: print("bgezal %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x00: print("bltz %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x01: print("bgez %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x10: print("bltzal %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ case 0x11: print("bgezal %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
default: print("???"); break;
}
@@ -320,18 +320,18 @@ offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op)
case 0x02: print("j $%08X", (op & 0x03ffffff) << 2); break;
case 0x03: print("jal $%08X", (op & 0x03ffffff) << 2); break;
- case 0x04: print("beq %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((INT16)(op) << 2)); break;
- case 0x05: print("bne %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((INT16)(op) << 2)); break;
- case 0x06: print("blez %s, $%08X", reg[rs], pc + 4 + ((INT16)(op) << 2)); break;
- case 0x07: print("bgtz %s, $%08X", reg[rs], pc + 4 + ((INT16)(op) << 2)); break;
+ case 0x04: print("beq %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); break;
+ case 0x05: print("bne %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); break;
+ case 0x06: print("blez %s, $%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); break;
+ case 0x07: print("bgtz %s, $%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); break;
case 0x08: print("addi %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
case 0x09: print("addiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
case 0x0a: print("slti %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
case 0x0b: print("sltiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
- case 0x0c: print("andi %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
- case 0x0d: print("ori %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
- case 0x0e: print("xori %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
- case 0x0f: print("lui %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
+ case 0x0c: print("andi %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
+ case 0x0d: print("ori %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
+ case 0x0e: print("xori %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
+ case 0x0f: print("lui %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
case 0x10: disasm_cop0(op); break;
case 0x12: disasm_cop2(op); break;
@@ -358,7 +358,7 @@ offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op)
CPU_DISASSEMBLE( rsp )
{
- UINT32 op = *(UINT32 *)opram;
+ uint32_t op = *(uint32_t *)opram;
op = big_endianize_int32(op);
return rsp_dasm_one(buffer, pc, op);
}
diff --git a/src/devices/cpu/rsp/rspcp2.cpp b/src/devices/cpu/rsp/rspcp2.cpp
index ae5d2ade7e5..1c77230cda4 100644
--- a/src/devices/cpu/rsp/rspcp2.cpp
+++ b/src/devices/cpu/rsp/rspcp2.cpp
@@ -213,18 +213,18 @@ const rsp_cop2::vec_helpers_t rsp_cop2::m_vec_helpers = {
#if !(defined(__SSSE3__) || defined(_MSC_VER))
// TODO: Highly optimized. More of a stopgap measure.
-static inline rsp_vec_t sse2_pshufb(rsp_vec_t v, const UINT16 *keys)
+static inline rsp_vec_t sse2_pshufb(rsp_vec_t v, const uint16_t *keys)
{
- UINT8 dest[16];
- UINT8 temp[16];
+ uint8_t dest[16];
+ uint8_t temp[16];
_mm_storeu_si128((rsp_vec_t *) temp, v);
- for (UINT32 j = 0; j < 8; j++)
+ for (uint32_t j = 0; j < 8; j++)
{
- UINT16 key = keys[j];
- UINT8 key_hi = key >> 8;
- UINT8 key_lo = key >> 0;
+ uint16_t key = keys[j];
+ uint8_t key_hi = key >> 8;
+ uint8_t key_lo = key >> 0;
dest[(j << 1) + 1] = key_hi == 0x80 ? 0x00 : temp[key_hi];
dest[(j << 1) + 0] = key_lo == 0x80 ? 0x00 : temp[key_lo];
@@ -233,25 +233,25 @@ static inline rsp_vec_t sse2_pshufb(rsp_vec_t v, const UINT16 *keys)
return _mm_loadu_si128((rsp_vec_t *) dest);
}
-rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const UINT16* src, UINT32 element)
+rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const uint16_t* src, uint32_t element)
{
if (element >= 8) // element => 0w ... 7w
{
- UINT16 word_lo;
+ uint16_t word_lo;
memcpy(&word_lo, src + (element - 8), sizeof(word_lo));
- UINT64 dword = word_lo | ((UINT32) word_lo << 16);
+ uint64_t dword = word_lo | ((uint32_t) word_lo << 16);
return _mm_shuffle_epi32(_mm_loadl_epi64((rsp_vec_t*) &dword), _MM_SHUFFLE(0,0,0,0));
}
else if (element >= 4) // element => 0h ... 3h
{
- UINT16 word_lo;
- UINT16 word_hi;
+ uint16_t word_lo;
+ uint16_t word_hi;
memcpy(&word_hi, src + element - 0, sizeof(word_hi));
memcpy(&word_lo, src + element - 4, sizeof(word_lo));
- UINT64 dword = word_lo | ((UINT32) word_hi << 16);
+ uint64_t dword = word_lo | ((uint32_t) word_hi << 16);
rsp_vec_t v = _mm_loadl_epi64((rsp_vec_t*) &dword);
v = _mm_shufflelo_epi16(v, _MM_SHUFFLE(1,1,0,0));
@@ -277,7 +277,7 @@ rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const UINT16* src, UINT32 eleme
return vec_load_unshuffled_operand(src);
}
#else
-rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const UINT16* src, UINT32 element)
+rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const uint16_t* src, uint32_t element)
{
rsp_vec_t operand = _mm_load_si128((rsp_vec_t*) src);
rsp_vec_t key = _mm_load_si128((rsp_vec_t*) m_vec_helpers.shuffle_keys[element]);
@@ -294,16 +294,16 @@ rsp_vec_t rsp_cop2::vec_load_and_shuffle_operand(const UINT16* src, UINT32 eleme
// wraparound. Do we just discard the data, as below, or does the
// data effectively get rotated around the edge of the vector?
//
-void rsp_cop2::vec_load_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_vec_t reg, rsp_vec_t dqm)
+void rsp_cop2::vec_load_group1(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm)
{
- UINT32 offset = addr & 0x7;
- UINT32 ror = offset - element;
+ uint32_t offset = addr & 0x7;
+ uint32_t ror = offset - element;
// Always load in 8-byte chunks to emulate wraparound.
rsp_vec_t data;
if (offset) {
- UINT32 aligned_addr_lo = addr & ~0x7;
- UINT32 aligned_addr_hi = (aligned_addr_lo + 8) & 0xFFF;
+ uint32_t aligned_addr_lo = addr & ~0x7;
+ uint32_t aligned_addr_hi = (aligned_addr_lo + 8) & 0xFFF;
data = _mm_loadl_epi64((rsp_vec_t *) (m_rsp.get_dmem() + aligned_addr_lo));
rsp_vec_t temp = _mm_loadl_epi64((rsp_vec_t *) (m_rsp.get_dmem() + aligned_addr_hi));
@@ -351,15 +351,15 @@ void rsp_cop2::vec_load_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
//
// TODO: Reverse-engineer what happens when element != 0.
//
-void rsp_cop2::vec_load_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
- UINT32 offset = addr & 0x7;
+void rsp_cop2::vec_load_group2(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
+ uint32_t offset = addr & 0x7;
rsp_vec_t data;
// Always load in 8-byte chunks to emulate wraparound.
if (offset) {
- UINT32 aligned_addr_lo = addr & ~0x7;
- UINT32 aligned_addr_hi = (aligned_addr_lo + 8) & 0xFFF;
- UINT64 datalow, datahigh;
+ uint32_t aligned_addr_lo = addr & ~0x7;
+ uint32_t aligned_addr_hi = (aligned_addr_lo + 8) & 0xFFF;
+ uint64_t datalow, datahigh;
memcpy(&datalow, m_rsp.get_dmem() + aligned_addr_lo, sizeof(datalow));
memcpy(&datahigh, m_rsp.get_dmem() + aligned_addr_hi, sizeof(datahigh));
@@ -399,15 +399,15 @@ void rsp_cop2::vec_load_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
// must wraparound (i.e., the address offset is small, starting
// element is large).
//
-void rsp_cop2::vec_load_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type)
+void rsp_cop2::vec_load_group4(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type)
{
- UINT32 aligned_addr = addr & 0xFF0;
- UINT32 offset = addr & 0xF;
- static UINT32 call_count = 0;
+ uint32_t aligned_addr = addr & 0xFF0;
+ uint32_t offset = addr & 0xF;
+ static uint32_t call_count = 0;
rsp_vec_t data = _mm_load_si128((rsp_vec_t *) (m_rsp.get_dmem() + aligned_addr));
- UINT32 ror;
+ uint32_t ror;
if (request_type == RSP_MEM_REQUEST_QUAD)
{
ror = 16 - element + offset;
@@ -451,10 +451,10 @@ void rsp_cop2::vec_load_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_ve
// must wraparound. Do we just stop storing the data, or do we
// continue storing from the front of the vector, as below?
//
-void rsp_cop2::vec_store_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_vec_t reg, rsp_vec_t dqm)
+void rsp_cop2::vec_store_group1(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm)
{
- UINT32 offset = addr & 0x7;
- UINT32 ror = element - offset;
+ uint32_t offset = addr & 0x7;
+ uint32_t ror = element - offset;
// Shift the DQM up to the point where we mux in the data.
#if !(defined(__SSSE3__) || defined(_MSC_VER))
@@ -476,8 +476,8 @@ void rsp_cop2::vec_store_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_v
rsp_vec_t data;
if (offset)
{
- UINT32 aligned_addr_lo = addr & ~0x7;
- UINT32 aligned_addr_hi = (aligned_addr_lo + 8) & 0xFFF;
+ uint32_t aligned_addr_lo = addr & ~0x7;
+ uint32_t aligned_addr_hi = (aligned_addr_lo + 8) & 0xFFF;
data = _mm_loadl_epi64((rsp_vec_t *) (m_rsp.get_dmem() + aligned_addr_lo));
rsp_vec_t temp = _mm_loadl_epi64((rsp_vec_t *) (m_rsp.get_dmem() + aligned_addr_hi));
@@ -525,7 +525,7 @@ void rsp_cop2::vec_store_group1(UINT32 addr, UINT32 element, UINT16 *regp, rsp_v
//
// TODO: Reverse-engineer what happens when element != 0.
//
-void rsp_cop2::vec_store_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
+void rsp_cop2::vec_store_group2(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
// "Pack" the data.
if (request_type != RSP_MEM_REQUEST_PACK)
{
@@ -550,10 +550,10 @@ void rsp_cop2::vec_store_group2(UINT32 addr, UINT32 element, UINT16 *regp, rsp_v
// SSE3+ accelerated stores for group IV. Byteswap 2-byte little-endian
// vector back to big-endian. Stop storing at quadword boundaries.
//
-void rsp_cop2::vec_store_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
- UINT32 aligned_addr = addr & 0xFF0;
- UINT32 offset = addr & 0xF;
- UINT32 rol = offset;
+void rsp_cop2::vec_store_group4(uint32_t addr, uint32_t element, uint16_t *regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type) {
+ uint32_t aligned_addr = addr & 0xFF0;
+ uint32_t offset = addr & 0xF;
+ uint32_t rol = offset;
rsp_vec_t data = _mm_load_si128((rsp_vec_t *) (m_rsp.get_dmem() + aligned_addr));
@@ -587,7 +587,7 @@ void rsp_cop2::vec_store_group4(UINT32 addr, UINT32 element, UINT16 *regp, rsp_v
}
#endif
-extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
+extern offs_t rsp_dasm_one(char *buffer, offs_t pc, uint32_t op);
/***************************************************************************
Helpful Defines
@@ -607,7 +607,7 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
#define VREG_L(reg, offset) m_v[(reg)].l[(offset)]
#define R_VREG_B(reg, offset) m_v[(reg)].b[(offset)^1]
-#define R_VREG_S(reg, offset) (INT16)m_v[(reg)].s[(offset)]
+#define R_VREG_S(reg, offset) (int16_t)m_v[(reg)].s[(offset)]
#define R_VREG_L(reg, offset) m_v[(reg)].l[(offset)]
#define W_VREG_B(reg, offset, val) (m_v[(reg)].b[(offset)^1] = val)
@@ -623,10 +623,10 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
#define CLIP2 4
#define ACCUM(x) m_accum[x].q
-#define ACCUM_H(x) (UINT16)m_accum[x].w[3]
-#define ACCUM_M(x) (UINT16)m_accum[x].w[2]
-#define ACCUM_L(x) (UINT16)m_accum[x].w[1]
-#define ACCUM_LL(x) (UINT16)m_accum[x].w[0]
+#define ACCUM_H(x) (uint16_t)m_accum[x].w[3]
+#define ACCUM_M(x) (uint16_t)m_accum[x].w[2]
+#define ACCUM_L(x) (uint16_t)m_accum[x].w[1]
+#define ACCUM_LL(x) (uint16_t)m_accum[x].w[0]
#define SET_ACCUM_H(v, x) m_accum[x].w[3] = v;
#define SET_ACCUM_M(v, x) m_accum[x].w[2] = v;
@@ -751,100 +751,100 @@ void rsp_cop2::state_string_export(const int index, std::string &str) const
switch (index)
{
case RSP_V0:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 0, 0), (UINT16)VREG_S( 0, 1), (UINT16)VREG_S( 0, 2), (UINT16)VREG_S( 0, 3), (UINT16)VREG_S( 0, 4), (UINT16)VREG_S( 0, 5), (UINT16)VREG_S( 0, 6), (UINT16)VREG_S( 0, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 0, 0), (uint16_t)VREG_S( 0, 1), (uint16_t)VREG_S( 0, 2), (uint16_t)VREG_S( 0, 3), (uint16_t)VREG_S( 0, 4), (uint16_t)VREG_S( 0, 5), (uint16_t)VREG_S( 0, 6), (uint16_t)VREG_S( 0, 7));
break;
case RSP_V1:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 1, 0), (UINT16)VREG_S( 1, 1), (UINT16)VREG_S( 1, 2), (UINT16)VREG_S( 1, 3), (UINT16)VREG_S( 1, 4), (UINT16)VREG_S( 1, 5), (UINT16)VREG_S( 1, 6), (UINT16)VREG_S( 1, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 1, 0), (uint16_t)VREG_S( 1, 1), (uint16_t)VREG_S( 1, 2), (uint16_t)VREG_S( 1, 3), (uint16_t)VREG_S( 1, 4), (uint16_t)VREG_S( 1, 5), (uint16_t)VREG_S( 1, 6), (uint16_t)VREG_S( 1, 7));
break;
case RSP_V2:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 2, 0), (UINT16)VREG_S( 2, 1), (UINT16)VREG_S( 2, 2), (UINT16)VREG_S( 2, 3), (UINT16)VREG_S( 2, 4), (UINT16)VREG_S( 2, 5), (UINT16)VREG_S( 2, 6), (UINT16)VREG_S( 2, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 2, 0), (uint16_t)VREG_S( 2, 1), (uint16_t)VREG_S( 2, 2), (uint16_t)VREG_S( 2, 3), (uint16_t)VREG_S( 2, 4), (uint16_t)VREG_S( 2, 5), (uint16_t)VREG_S( 2, 6), (uint16_t)VREG_S( 2, 7));
break;
case RSP_V3:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 3, 0), (UINT16)VREG_S( 3, 1), (UINT16)VREG_S( 3, 2), (UINT16)VREG_S( 3, 3), (UINT16)VREG_S( 3, 4), (UINT16)VREG_S( 3, 5), (UINT16)VREG_S( 3, 6), (UINT16)VREG_S( 3, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 3, 0), (uint16_t)VREG_S( 3, 1), (uint16_t)VREG_S( 3, 2), (uint16_t)VREG_S( 3, 3), (uint16_t)VREG_S( 3, 4), (uint16_t)VREG_S( 3, 5), (uint16_t)VREG_S( 3, 6), (uint16_t)VREG_S( 3, 7));
break;
case RSP_V4:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 4, 0), (UINT16)VREG_S( 4, 1), (UINT16)VREG_S( 4, 2), (UINT16)VREG_S( 4, 3), (UINT16)VREG_S( 4, 4), (UINT16)VREG_S( 4, 5), (UINT16)VREG_S( 4, 6), (UINT16)VREG_S( 4, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 4, 0), (uint16_t)VREG_S( 4, 1), (uint16_t)VREG_S( 4, 2), (uint16_t)VREG_S( 4, 3), (uint16_t)VREG_S( 4, 4), (uint16_t)VREG_S( 4, 5), (uint16_t)VREG_S( 4, 6), (uint16_t)VREG_S( 4, 7));
break;
case RSP_V5:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 5, 0), (UINT16)VREG_S( 5, 1), (UINT16)VREG_S( 5, 2), (UINT16)VREG_S( 5, 3), (UINT16)VREG_S( 5, 4), (UINT16)VREG_S( 5, 5), (UINT16)VREG_S( 5, 6), (UINT16)VREG_S( 5, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 5, 0), (uint16_t)VREG_S( 5, 1), (uint16_t)VREG_S( 5, 2), (uint16_t)VREG_S( 5, 3), (uint16_t)VREG_S( 5, 4), (uint16_t)VREG_S( 5, 5), (uint16_t)VREG_S( 5, 6), (uint16_t)VREG_S( 5, 7));
break;
case RSP_V6:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 6, 0), (UINT16)VREG_S( 6, 1), (UINT16)VREG_S( 6, 2), (UINT16)VREG_S( 6, 3), (UINT16)VREG_S( 6, 4), (UINT16)VREG_S( 6, 5), (UINT16)VREG_S( 6, 6), (UINT16)VREG_S( 6, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 6, 0), (uint16_t)VREG_S( 6, 1), (uint16_t)VREG_S( 6, 2), (uint16_t)VREG_S( 6, 3), (uint16_t)VREG_S( 6, 4), (uint16_t)VREG_S( 6, 5), (uint16_t)VREG_S( 6, 6), (uint16_t)VREG_S( 6, 7));
break;
case RSP_V7:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 7, 0), (UINT16)VREG_S( 7, 1), (UINT16)VREG_S( 7, 2), (UINT16)VREG_S( 7, 3), (UINT16)VREG_S( 7, 4), (UINT16)VREG_S( 7, 5), (UINT16)VREG_S( 7, 6), (UINT16)VREG_S( 7, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 7, 0), (uint16_t)VREG_S( 7, 1), (uint16_t)VREG_S( 7, 2), (uint16_t)VREG_S( 7, 3), (uint16_t)VREG_S( 7, 4), (uint16_t)VREG_S( 7, 5), (uint16_t)VREG_S( 7, 6), (uint16_t)VREG_S( 7, 7));
break;
case RSP_V8:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 8, 0), (UINT16)VREG_S( 8, 1), (UINT16)VREG_S( 8, 2), (UINT16)VREG_S( 8, 3), (UINT16)VREG_S( 8, 4), (UINT16)VREG_S( 8, 5), (UINT16)VREG_S( 8, 6), (UINT16)VREG_S( 8, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 8, 0), (uint16_t)VREG_S( 8, 1), (uint16_t)VREG_S( 8, 2), (uint16_t)VREG_S( 8, 3), (uint16_t)VREG_S( 8, 4), (uint16_t)VREG_S( 8, 5), (uint16_t)VREG_S( 8, 6), (uint16_t)VREG_S( 8, 7));
break;
case RSP_V9:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 9, 0), (UINT16)VREG_S( 9, 1), (UINT16)VREG_S( 9, 2), (UINT16)VREG_S( 9, 3), (UINT16)VREG_S( 9, 4), (UINT16)VREG_S( 9, 5), (UINT16)VREG_S( 9, 6), (UINT16)VREG_S( 9, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 9, 0), (uint16_t)VREG_S( 9, 1), (uint16_t)VREG_S( 9, 2), (uint16_t)VREG_S( 9, 3), (uint16_t)VREG_S( 9, 4), (uint16_t)VREG_S( 9, 5), (uint16_t)VREG_S( 9, 6), (uint16_t)VREG_S( 9, 7));
break;
case RSP_V10:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(10, 0), (UINT16)VREG_S(10, 1), (UINT16)VREG_S(10, 2), (UINT16)VREG_S(10, 3), (UINT16)VREG_S(10, 4), (UINT16)VREG_S(10, 5), (UINT16)VREG_S(10, 6), (UINT16)VREG_S(10, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(10, 0), (uint16_t)VREG_S(10, 1), (uint16_t)VREG_S(10, 2), (uint16_t)VREG_S(10, 3), (uint16_t)VREG_S(10, 4), (uint16_t)VREG_S(10, 5), (uint16_t)VREG_S(10, 6), (uint16_t)VREG_S(10, 7));
break;
case RSP_V11:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(11, 0), (UINT16)VREG_S(11, 1), (UINT16)VREG_S(11, 2), (UINT16)VREG_S(11, 3), (UINT16)VREG_S(11, 4), (UINT16)VREG_S(11, 5), (UINT16)VREG_S(11, 6), (UINT16)VREG_S(11, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(11, 0), (uint16_t)VREG_S(11, 1), (uint16_t)VREG_S(11, 2), (uint16_t)VREG_S(11, 3), (uint16_t)VREG_S(11, 4), (uint16_t)VREG_S(11, 5), (uint16_t)VREG_S(11, 6), (uint16_t)VREG_S(11, 7));
break;
case RSP_V12:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(12, 0), (UINT16)VREG_S(12, 1), (UINT16)VREG_S(12, 2), (UINT16)VREG_S(12, 3), (UINT16)VREG_S(12, 4), (UINT16)VREG_S(12, 5), (UINT16)VREG_S(12, 6), (UINT16)VREG_S(12, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(12, 0), (uint16_t)VREG_S(12, 1), (uint16_t)VREG_S(12, 2), (uint16_t)VREG_S(12, 3), (uint16_t)VREG_S(12, 4), (uint16_t)VREG_S(12, 5), (uint16_t)VREG_S(12, 6), (uint16_t)VREG_S(12, 7));
break;
case RSP_V13:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(13, 0), (UINT16)VREG_S(13, 1), (UINT16)VREG_S(13, 2), (UINT16)VREG_S(13, 3), (UINT16)VREG_S(13, 4), (UINT16)VREG_S(13, 5), (UINT16)VREG_S(13, 6), (UINT16)VREG_S(13, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(13, 0), (uint16_t)VREG_S(13, 1), (uint16_t)VREG_S(13, 2), (uint16_t)VREG_S(13, 3), (uint16_t)VREG_S(13, 4), (uint16_t)VREG_S(13, 5), (uint16_t)VREG_S(13, 6), (uint16_t)VREG_S(13, 7));
break;
case RSP_V14:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(14, 0), (UINT16)VREG_S(14, 1), (UINT16)VREG_S(14, 2), (UINT16)VREG_S(14, 3), (UINT16)VREG_S(14, 4), (UINT16)VREG_S(14, 5), (UINT16)VREG_S(14, 6), (UINT16)VREG_S(14, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(14, 0), (uint16_t)VREG_S(14, 1), (uint16_t)VREG_S(14, 2), (uint16_t)VREG_S(14, 3), (uint16_t)VREG_S(14, 4), (uint16_t)VREG_S(14, 5), (uint16_t)VREG_S(14, 6), (uint16_t)VREG_S(14, 7));
break;
case RSP_V15:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(15, 0), (UINT16)VREG_S(15, 1), (UINT16)VREG_S(15, 2), (UINT16)VREG_S(15, 3), (UINT16)VREG_S(15, 4), (UINT16)VREG_S(15, 5), (UINT16)VREG_S(15, 6), (UINT16)VREG_S(15, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(15, 0), (uint16_t)VREG_S(15, 1), (uint16_t)VREG_S(15, 2), (uint16_t)VREG_S(15, 3), (uint16_t)VREG_S(15, 4), (uint16_t)VREG_S(15, 5), (uint16_t)VREG_S(15, 6), (uint16_t)VREG_S(15, 7));
break;
case RSP_V16:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(16, 0), (UINT16)VREG_S(16, 1), (UINT16)VREG_S(16, 2), (UINT16)VREG_S(16, 3), (UINT16)VREG_S(16, 4), (UINT16)VREG_S(16, 5), (UINT16)VREG_S(16, 6), (UINT16)VREG_S(16, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(16, 0), (uint16_t)VREG_S(16, 1), (uint16_t)VREG_S(16, 2), (uint16_t)VREG_S(16, 3), (uint16_t)VREG_S(16, 4), (uint16_t)VREG_S(16, 5), (uint16_t)VREG_S(16, 6), (uint16_t)VREG_S(16, 7));
break;
case RSP_V17:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(17, 0), (UINT16)VREG_S(17, 1), (UINT16)VREG_S(17, 2), (UINT16)VREG_S(17, 3), (UINT16)VREG_S(17, 4), (UINT16)VREG_S(17, 5), (UINT16)VREG_S(17, 6), (UINT16)VREG_S(17, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(17, 0), (uint16_t)VREG_S(17, 1), (uint16_t)VREG_S(17, 2), (uint16_t)VREG_S(17, 3), (uint16_t)VREG_S(17, 4), (uint16_t)VREG_S(17, 5), (uint16_t)VREG_S(17, 6), (uint16_t)VREG_S(17, 7));
break;
case RSP_V18:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(18, 0), (UINT16)VREG_S(18, 1), (UINT16)VREG_S(18, 2), (UINT16)VREG_S(18, 3), (UINT16)VREG_S(18, 4), (UINT16)VREG_S(18, 5), (UINT16)VREG_S(18, 6), (UINT16)VREG_S(18, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(18, 0), (uint16_t)VREG_S(18, 1), (uint16_t)VREG_S(18, 2), (uint16_t)VREG_S(18, 3), (uint16_t)VREG_S(18, 4), (uint16_t)VREG_S(18, 5), (uint16_t)VREG_S(18, 6), (uint16_t)VREG_S(18, 7));
break;
case RSP_V19:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(19, 0), (UINT16)VREG_S(19, 1), (UINT16)VREG_S(19, 2), (UINT16)VREG_S(19, 3), (UINT16)VREG_S(19, 4), (UINT16)VREG_S(19, 5), (UINT16)VREG_S(19, 6), (UINT16)VREG_S(19, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(19, 0), (uint16_t)VREG_S(19, 1), (uint16_t)VREG_S(19, 2), (uint16_t)VREG_S(19, 3), (uint16_t)VREG_S(19, 4), (uint16_t)VREG_S(19, 5), (uint16_t)VREG_S(19, 6), (uint16_t)VREG_S(19, 7));
break;
case RSP_V20:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(20, 0), (UINT16)VREG_S(20, 1), (UINT16)VREG_S(20, 2), (UINT16)VREG_S(20, 3), (UINT16)VREG_S(20, 4), (UINT16)VREG_S(20, 5), (UINT16)VREG_S(20, 6), (UINT16)VREG_S(20, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(20, 0), (uint16_t)VREG_S(20, 1), (uint16_t)VREG_S(20, 2), (uint16_t)VREG_S(20, 3), (uint16_t)VREG_S(20, 4), (uint16_t)VREG_S(20, 5), (uint16_t)VREG_S(20, 6), (uint16_t)VREG_S(20, 7));
break;
case RSP_V21:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(21, 0), (UINT16)VREG_S(21, 1), (UINT16)VREG_S(21, 2), (UINT16)VREG_S(21, 3), (UINT16)VREG_S(21, 4), (UINT16)VREG_S(21, 5), (UINT16)VREG_S(21, 6), (UINT16)VREG_S(21, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(21, 0), (uint16_t)VREG_S(21, 1), (uint16_t)VREG_S(21, 2), (uint16_t)VREG_S(21, 3), (uint16_t)VREG_S(21, 4), (uint16_t)VREG_S(21, 5), (uint16_t)VREG_S(21, 6), (uint16_t)VREG_S(21, 7));
break;
case RSP_V22:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(22, 0), (UINT16)VREG_S(22, 1), (UINT16)VREG_S(22, 2), (UINT16)VREG_S(22, 3), (UINT16)VREG_S(22, 4), (UINT16)VREG_S(22, 5), (UINT16)VREG_S(22, 6), (UINT16)VREG_S(22, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(22, 0), (uint16_t)VREG_S(22, 1), (uint16_t)VREG_S(22, 2), (uint16_t)VREG_S(22, 3), (uint16_t)VREG_S(22, 4), (uint16_t)VREG_S(22, 5), (uint16_t)VREG_S(22, 6), (uint16_t)VREG_S(22, 7));
break;
case RSP_V23:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(23, 0), (UINT16)VREG_S(23, 1), (UINT16)VREG_S(23, 2), (UINT16)VREG_S(23, 3), (UINT16)VREG_S(23, 4), (UINT16)VREG_S(23, 5), (UINT16)VREG_S(23, 6), (UINT16)VREG_S(23, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(23, 0), (uint16_t)VREG_S(23, 1), (uint16_t)VREG_S(23, 2), (uint16_t)VREG_S(23, 3), (uint16_t)VREG_S(23, 4), (uint16_t)VREG_S(23, 5), (uint16_t)VREG_S(23, 6), (uint16_t)VREG_S(23, 7));
break;
case RSP_V24:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(24, 0), (UINT16)VREG_S(24, 1), (UINT16)VREG_S(24, 2), (UINT16)VREG_S(24, 3), (UINT16)VREG_S(24, 4), (UINT16)VREG_S(24, 5), (UINT16)VREG_S(24, 6), (UINT16)VREG_S(24, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(24, 0), (uint16_t)VREG_S(24, 1), (uint16_t)VREG_S(24, 2), (uint16_t)VREG_S(24, 3), (uint16_t)VREG_S(24, 4), (uint16_t)VREG_S(24, 5), (uint16_t)VREG_S(24, 6), (uint16_t)VREG_S(24, 7));
break;
case RSP_V25:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(25, 0), (UINT16)VREG_S(25, 1), (UINT16)VREG_S(25, 2), (UINT16)VREG_S(25, 3), (UINT16)VREG_S(25, 4), (UINT16)VREG_S(25, 5), (UINT16)VREG_S(25, 6), (UINT16)VREG_S(25, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(25, 0), (uint16_t)VREG_S(25, 1), (uint16_t)VREG_S(25, 2), (uint16_t)VREG_S(25, 3), (uint16_t)VREG_S(25, 4), (uint16_t)VREG_S(25, 5), (uint16_t)VREG_S(25, 6), (uint16_t)VREG_S(25, 7));
break;
case RSP_V26:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(26, 0), (UINT16)VREG_S(26, 1), (UINT16)VREG_S(26, 2), (UINT16)VREG_S(26, 3), (UINT16)VREG_S(26, 4), (UINT16)VREG_S(26, 5), (UINT16)VREG_S(26, 6), (UINT16)VREG_S(26, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(26, 0), (uint16_t)VREG_S(26, 1), (uint16_t)VREG_S(26, 2), (uint16_t)VREG_S(26, 3), (uint16_t)VREG_S(26, 4), (uint16_t)VREG_S(26, 5), (uint16_t)VREG_S(26, 6), (uint16_t)VREG_S(26, 7));
break;
case RSP_V27:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(27, 0), (UINT16)VREG_S(27, 1), (UINT16)VREG_S(27, 2), (UINT16)VREG_S(27, 3), (UINT16)VREG_S(27, 4), (UINT16)VREG_S(27, 5), (UINT16)VREG_S(27, 6), (UINT16)VREG_S(27, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(27, 0), (uint16_t)VREG_S(27, 1), (uint16_t)VREG_S(27, 2), (uint16_t)VREG_S(27, 3), (uint16_t)VREG_S(27, 4), (uint16_t)VREG_S(27, 5), (uint16_t)VREG_S(27, 6), (uint16_t)VREG_S(27, 7));
break;
case RSP_V28:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(28, 0), (UINT16)VREG_S(28, 1), (UINT16)VREG_S(28, 2), (UINT16)VREG_S(28, 3), (UINT16)VREG_S(28, 4), (UINT16)VREG_S(28, 5), (UINT16)VREG_S(28, 6), (UINT16)VREG_S(28, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(28, 0), (uint16_t)VREG_S(28, 1), (uint16_t)VREG_S(28, 2), (uint16_t)VREG_S(28, 3), (uint16_t)VREG_S(28, 4), (uint16_t)VREG_S(28, 5), (uint16_t)VREG_S(28, 6), (uint16_t)VREG_S(28, 7));
break;
case RSP_V29:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(29, 0), (UINT16)VREG_S(29, 1), (UINT16)VREG_S(29, 2), (UINT16)VREG_S(29, 3), (UINT16)VREG_S(29, 4), (UINT16)VREG_S(29, 5), (UINT16)VREG_S(29, 6), (UINT16)VREG_S(29, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(29, 0), (uint16_t)VREG_S(29, 1), (uint16_t)VREG_S(29, 2), (uint16_t)VREG_S(29, 3), (uint16_t)VREG_S(29, 4), (uint16_t)VREG_S(29, 5), (uint16_t)VREG_S(29, 6), (uint16_t)VREG_S(29, 7));
break;
case RSP_V30:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(30, 0), (UINT16)VREG_S(30, 1), (UINT16)VREG_S(30, 2), (UINT16)VREG_S(30, 3), (UINT16)VREG_S(30, 4), (UINT16)VREG_S(30, 5), (UINT16)VREG_S(30, 6), (UINT16)VREG_S(30, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(30, 0), (uint16_t)VREG_S(30, 1), (uint16_t)VREG_S(30, 2), (uint16_t)VREG_S(30, 3), (uint16_t)VREG_S(30, 4), (uint16_t)VREG_S(30, 5), (uint16_t)VREG_S(30, 6), (uint16_t)VREG_S(30, 7));
break;
case RSP_V31:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(31, 0), (UINT16)VREG_S(31, 1), (UINT16)VREG_S(31, 2), (UINT16)VREG_S(31, 3), (UINT16)VREG_S(31, 4), (UINT16)VREG_S(31, 5), (UINT16)VREG_S(31, 6), (UINT16)VREG_S(31, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(31, 0), (uint16_t)VREG_S(31, 1), (uint16_t)VREG_S(31, 2), (uint16_t)VREG_S(31, 3), (uint16_t)VREG_S(31, 4), (uint16_t)VREG_S(31, 5), (uint16_t)VREG_S(31, 6), (uint16_t)VREG_S(31, 7));
break;
}
}
@@ -853,12 +853,12 @@ void rsp_cop2::state_string_export(const int index, std::string &str) const
Vector Load Instructions
***************************************************************************/
-void rsp_cop2::handle_lwc2(UINT32 op)
+void rsp_cop2::handle_lwc2(uint32_t op)
{
int base = (op >> 21) & 0x1f;
#if !USE_SIMD
int i, end;
- UINT32 ea;
+ uint32_t ea;
int dest = (op >> 16) & 0x1f;
int index = (op >> 7) & 0xf;
int offset = (op & 0x7f);
@@ -1157,24 +1157,24 @@ void rsp_cop2::handle_lwc2(UINT32 op)
//printf("LTV ");
#if 0
#else
- INT32 index = (op >> 7) & 0xf;
- INT32 offset = (op & 0x7f);
+ int32_t index = (op >> 7) & 0xf;
+ int32_t offset = (op & 0x7f);
if (offset & 0x40)
offset |= 0xffffffc0;
- INT32 vs = (op >> 16) & 0x1f;
- INT32 ve = vs + 8;
+ int32_t vs = (op >> 16) & 0x1f;
+ int32_t ve = vs + 8;
if (ve > 32)
ve = 32;
- INT32 element;
+ int32_t element;
if (index & 1) fatalerror("RSP: LTV: index = %d\n", index);
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
ea = ((ea + 8) & ~0xf) + (index & 1);
- for (INT32 i = vs; i < ve; i++)
+ for (int32_t i = vs; i < ve; i++)
{
element = ((8 - (index >> 1) + (i-vs)) << 1);
VREG_B(i, (element & 0xf)) = m_rsp.READ8(ea);
@@ -1200,13 +1200,13 @@ void rsp_cop2::handle_lwc2(UINT32 op)
Vector Store Instructions
***************************************************************************/
-void rsp_cop2::handle_swc2(UINT32 op)
+void rsp_cop2::handle_swc2(uint32_t op)
{
int base = (op >> 21) & 0x1f;
#if !USE_SIMD
int i, end;
int eaoffset;
- UINT32 ea;
+ uint32_t ea;
int dest = (op >> 16) & 0x1f;
int index = (op >> 7) & 0xf;
int offset = (op & 0x7f);
@@ -1449,7 +1449,7 @@ void rsp_cop2::handle_swc2(UINT32 op)
for (i=0; i < 8; i++)
{
- UINT8 d = ((VREG_B(dest, ((index + (i << 1) + 0) & 0xf))) << 1) |
+ uint8_t d = ((VREG_B(dest, ((index + (i << 1) + 0) & 0xf))) << 1) |
((VREG_B(dest, ((index + (i << 1) + 1) & 0xf))) >> 7);
m_rsp.WRITE8(ea, d);
@@ -1531,24 +1531,24 @@ void rsp_cop2::handle_swc2(UINT32 op)
//printf("STV ");
#if 0
#else
- INT32 index = (op >> 7) & 0xf;
- INT32 offset = (op & 0x7f);
+ int32_t index = (op >> 7) & 0xf;
+ int32_t offset = (op & 0x7f);
if (offset & 0x40)
offset |= 0xffffffc0;
- INT32 vs = (op >> 16) & 0x1f;
- INT32 ve = vs + 8;
+ int32_t vs = (op >> 16) & 0x1f;
+ int32_t ve = vs + 8;
if (ve > 32)
ve = 32;
- INT32 element = 8 - (index >> 1);
+ int32_t element = 8 - (index >> 1);
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
- INT32 eaoffset = (ea & 0xf) + (element * 2);
+ int32_t eaoffset = (ea & 0xf) + (element * 2);
ea &= ~0xf;
- for (INT32 i = vs; i < ve; i++)
+ for (int32_t i = vs; i < ve; i++)
{
m_rsp.WRITE16(ea + (eaoffset & 0xf), VREG_S(i, element & 0x7));
eaoffset += 2;
@@ -1571,17 +1571,17 @@ void rsp_cop2::handle_swc2(UINT32 op)
Vector Accumulator Helpers
***************************************************************************/
-UINT16 rsp_cop2::SATURATE_ACCUM(int accum, int slice, UINT16 negative, UINT16 positive)
+uint16_t rsp_cop2::SATURATE_ACCUM(int accum, int slice, uint16_t negative, uint16_t positive)
{
- if ((INT16)ACCUM_H(accum) < 0)
+ if ((int16_t)ACCUM_H(accum) < 0)
{
- if ((UINT16)(ACCUM_H(accum)) != 0xffff)
+ if ((uint16_t)(ACCUM_H(accum)) != 0xffff)
{
return negative;
}
else
{
- if ((INT16)ACCUM_M(accum) >= 0)
+ if ((int16_t)ACCUM_M(accum) >= 0)
{
return negative;
}
@@ -1600,13 +1600,13 @@ UINT16 rsp_cop2::SATURATE_ACCUM(int accum, int slice, UINT16 negative, UINT16 po
}
else
{
- if ((UINT16)(ACCUM_H(accum)) != 0)
+ if ((uint16_t)(ACCUM_H(accum)) != 0)
{
return positive;
}
else
{
- if ((INT16)ACCUM_M(accum) < 0)
+ if ((int16_t)ACCUM_M(accum) < 0)
{
return positive;
}
@@ -1631,7 +1631,7 @@ UINT16 rsp_cop2::SATURATE_ACCUM(int accum, int slice, UINT16 negative, UINT16 po
Vector Opcodes
***************************************************************************/
-void rsp_cop2::handle_vector_ops(UINT32 op)
+void rsp_cop2::handle_vector_ops(uint32_t op)
{
#if !USE_SIMD
int i;
@@ -1656,7 +1656,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MULF ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -1670,8 +1670,8 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
if (s1 == -32768 && s2 == -32768)
{
@@ -1683,11 +1683,11 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
}
else
{
- INT64 r = s1 * s2 * 2;
+ int64_t r = s1 * s2 * 2;
r += 0x8000; // rounding ?
SET_ACCUM_H((r < 0) ? 0xffff : 0, i); // sign-extend to 48-bit
- SET_ACCUM_M((INT16)(r >> 16), i);
- SET_ACCUM_L((UINT16)(r), i);
+ SET_ACCUM_M((int16_t)(r >> 16), i);
+ SET_ACCUM_L((uint16_t)(r), i);
m_vres[i] = ACCUM_M(i);
}
}
@@ -1708,7 +1708,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MULU ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -1722,21 +1722,21 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT64 r = s1 * s2 * 2;
+ int64_t r = s1 * s2 * 2;
r += 0x8000; // rounding ?
- SET_ACCUM_H((UINT16)(r >> 32), i);
- SET_ACCUM_M((UINT16)(r >> 16), i);
- SET_ACCUM_L((UINT16)(r), i);
+ SET_ACCUM_H((uint16_t)(r >> 32), i);
+ SET_ACCUM_M((uint16_t)(r >> 16), i);
+ SET_ACCUM_L((uint16_t)(r), i);
if (r < 0)
{
m_vres[i] = 0;
}
- else if (((INT16)(ACCUM_H(i)) ^ (INT16)(ACCUM_M(i))) < 0)
+ else if (((int16_t)(ACCUM_H(i)) ^ (int16_t)(ACCUM_M(i))) < 0)
{
m_vres[i] = -1;
}
@@ -1764,7 +1764,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MUDL ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -1782,13 +1782,13 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- UINT32 s1 = (UINT32)(UINT16)VREG_S(VS1REG, i);
- UINT32 s2 = (UINT32)(UINT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- UINT32 r = s1 * s2;
+ uint32_t s1 = (uint32_t)(uint16_t)VREG_S(VS1REG, i);
+ uint32_t s2 = (uint32_t)(uint16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ uint32_t r = s1 * s2;
SET_ACCUM_H(0, i);
SET_ACCUM_M(0, i);
- SET_ACCUM_L((UINT16)(r >> 16), i);
+ SET_ACCUM_L((uint16_t)(r >> 16), i);
m_vres[i] = ACCUM_L(i);
}
@@ -1811,7 +1811,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MUDM ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -1829,13 +1829,13 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (UINT16)VREG_S(VS2REG, VEC_EL_2(EL, i)); // not sign-extended
- INT32 r = s1 * s2;
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (uint16_t)VREG_S(VS2REG, VEC_EL_2(EL, i)); // not sign-extended
+ int32_t r = s1 * s2;
SET_ACCUM_H((r < 0) ? 0xffff : 0, i); // sign-extend to 48-bit
- SET_ACCUM_M((INT16)(r >> 16), i);
- SET_ACCUM_L((UINT16)(r), i);
+ SET_ACCUM_M((int16_t)(r >> 16), i);
+ SET_ACCUM_L((uint16_t)(r), i);
m_vres[i] = ACCUM_M(i);
}
@@ -1859,7 +1859,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MUDN ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo = read_acc_lo(acc);
rsp_vec_t acc_mid = read_acc_mid(acc);
rsp_vec_t acc_hi = read_acc_hi(acc);
@@ -1875,13 +1875,13 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT32 s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 r = s1 * s2;
+ int32_t s1 = (uint16_t)VREG_S(VS1REG, i); // not sign-extended
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t r = s1 * s2;
SET_ACCUM_H((r < 0) ? 0xffff : 0, i); // sign-extend to 48-bit
- SET_ACCUM_M((INT16)(r >> 16), i);
- SET_ACCUM_L((UINT16)(r), i);
+ SET_ACCUM_M((int16_t)(r >> 16), i);
+ SET_ACCUM_L((uint16_t)(r), i);
m_vres[i] = ACCUM_L(i);
}
@@ -1904,7 +1904,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MUDH ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -1922,17 +1922,17 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 r = s1 * s2;
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t r = s1 * s2;
- SET_ACCUM_H((INT16)(r >> 16), i);
- SET_ACCUM_M((UINT16)(r), i);
+ SET_ACCUM_H((int16_t)(r >> 16), i);
+ SET_ACCUM_M((uint16_t)(r), i);
SET_ACCUM_L(0, i);
if (r < -32768) r = -32768;
if (r > 32767) r = 32767;
- m_vres[i] = (INT16)(r);
+ m_vres[i] = (int16_t)(r);
}
WRITEBACK_RESULT();
#endif
@@ -1952,7 +1952,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MACF ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -1970,21 +1970,21 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 r = s1 * s2;
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t r = s1 * s2;
- UINT64 q = (UINT64)(UINT16)ACCUM_LL(i);
- q |= (((UINT64)(UINT16)ACCUM_L(i)) << 16);
- q |= (((UINT64)(UINT16)ACCUM_M(i)) << 32);
- q |= (((UINT64)(UINT16)ACCUM_H(i)) << 48);
+ uint64_t q = (uint64_t)(uint16_t)ACCUM_LL(i);
+ q |= (((uint64_t)(uint16_t)ACCUM_L(i)) << 16);
+ q |= (((uint64_t)(uint16_t)ACCUM_M(i)) << 32);
+ q |= (((uint64_t)(uint16_t)ACCUM_H(i)) << 48);
- q += (INT64)(r) << 17;
+ q += (int64_t)(r) << 17;
- SET_ACCUM_LL((UINT16)q, i);
- SET_ACCUM_L((UINT16)(q >> 16), i);
- SET_ACCUM_M((UINT16)(q >> 32), i);
- SET_ACCUM_H((UINT16)(q >> 48), i);
+ SET_ACCUM_LL((uint16_t)q, i);
+ SET_ACCUM_L((uint16_t)(q >> 16), i);
+ SET_ACCUM_M((uint16_t)(q >> 32), i);
+ SET_ACCUM_H((uint16_t)(q >> 48), i);
m_vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
}
@@ -2003,7 +2003,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MACU ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -2021,17 +2021,17 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i = 0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 r1 = s1 * s2;
- UINT32 r2 = (UINT16)ACCUM_L(i) + ((UINT16)(r1) * 2);
- UINT32 r3 = (UINT16)ACCUM_M(i) + (UINT16)((r1 >> 16) * 2) + (UINT16)(r2 >> 16);
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t r1 = s1 * s2;
+ uint32_t r2 = (uint16_t)ACCUM_L(i) + ((uint16_t)(r1) * 2);
+ uint32_t r3 = (uint16_t)ACCUM_M(i) + (uint16_t)((r1 >> 16) * 2) + (uint16_t)(r2 >> 16);
- SET_ACCUM_L((UINT16)(r2), i);
- SET_ACCUM_M((UINT16)(r3), i);
- SET_ACCUM_H(ACCUM_H(i) + (UINT16)(r3 >> 16) + (UINT16)(r1 >> 31), i);
+ SET_ACCUM_L((uint16_t)(r2), i);
+ SET_ACCUM_M((uint16_t)(r3), i);
+ SET_ACCUM_H(ACCUM_H(i) + (uint16_t)(r3 >> 16) + (uint16_t)(r1 >> 31), i);
- if ((INT16)ACCUM_H(i) < 0)
+ if ((int16_t)ACCUM_H(i) < 0)
{
m_vres[i] = 0;
}
@@ -2043,7 +2043,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
}
else
{
- if ((INT16)ACCUM_M(i) < 0)
+ if ((int16_t)ACCUM_M(i) < 0)
{
m_vres[i] = 0xffff;
}
@@ -2073,7 +2073,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MADL ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -2091,15 +2091,15 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i = 0; i < 8; i++)
{
- UINT32 s1 = (UINT32)(UINT16)VREG_S(VS1REG, i);
- UINT32 s2 = (UINT32)(UINT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- UINT32 r1 = s1 * s2;
- UINT32 r2 = (UINT16)ACCUM_L(i) + (r1 >> 16);
- UINT32 r3 = (UINT16)ACCUM_M(i) + (r2 >> 16);
+ uint32_t s1 = (uint32_t)(uint16_t)VREG_S(VS1REG, i);
+ uint32_t s2 = (uint32_t)(uint16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ uint32_t r1 = s1 * s2;
+ uint32_t r2 = (uint16_t)ACCUM_L(i) + (r1 >> 16);
+ uint32_t r3 = (uint16_t)ACCUM_M(i) + (r2 >> 16);
- SET_ACCUM_L((UINT16)(r2), i);
- SET_ACCUM_M((UINT16)(r3), i);
- SET_ACCUM_H(ACCUM_H(i) + (INT16)(r3 >> 16), i);
+ SET_ACCUM_L((uint16_t)(r2), i);
+ SET_ACCUM_M((uint16_t)(r3), i);
+ SET_ACCUM_H(ACCUM_H(i) + (int16_t)(r3 >> 16), i);
m_vres[i] = SATURATE_ACCUM(i, 0, 0x0000, 0xffff);
}
@@ -2122,7 +2122,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MADM ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -2140,16 +2140,16 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- UINT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- UINT32 s2 = (UINT16)VREG_S(VS2REG, VEC_EL_2(EL, i)); // not sign-extended
- UINT32 r1 = s1 * s2;
- UINT32 r2 = (UINT16)ACCUM_L(i) + (UINT16)(r1);
- UINT32 r3 = (UINT16)ACCUM_M(i) + (r1 >> 16) + (r2 >> 16);
-
- SET_ACCUM_L((UINT16)(r2), i);
- SET_ACCUM_M((UINT16)(r3), i);
- SET_ACCUM_H(ACCUM_H(i) + (UINT16)(r3 >> 16), i);
- if ((INT32)(r1) < 0)
+ uint32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ uint32_t s2 = (uint16_t)VREG_S(VS2REG, VEC_EL_2(EL, i)); // not sign-extended
+ uint32_t r1 = s1 * s2;
+ uint32_t r2 = (uint16_t)ACCUM_L(i) + (uint16_t)(r1);
+ uint32_t r3 = (uint16_t)ACCUM_M(i) + (r1 >> 16) + (r2 >> 16);
+
+ SET_ACCUM_L((uint16_t)(r2), i);
+ SET_ACCUM_M((uint16_t)(r3), i);
+ SET_ACCUM_H(ACCUM_H(i) + (uint16_t)(r3 >> 16), i);
+ if ((int32_t)(r1) < 0)
SET_ACCUM_H(ACCUM_H(i) - 1, i);
m_vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
@@ -2173,7 +2173,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MADN ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -2191,19 +2191,19 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT32 s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t s1 = (uint16_t)VREG_S(VS1REG, i); // not sign-extended
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
- UINT64 q = (UINT64)ACCUM_LL(i);
- q |= (((UINT64)ACCUM_L(i)) << 16);
- q |= (((UINT64)ACCUM_M(i)) << 32);
- q |= (((UINT64)ACCUM_H(i)) << 48);
- q += (INT64)(s1*s2) << 16;
+ uint64_t q = (uint64_t)ACCUM_LL(i);
+ q |= (((uint64_t)ACCUM_L(i)) << 16);
+ q |= (((uint64_t)ACCUM_M(i)) << 32);
+ q |= (((uint64_t)ACCUM_H(i)) << 48);
+ q += (int64_t)(s1*s2) << 16;
- SET_ACCUM_LL((UINT16)q, i);
- SET_ACCUM_L((UINT16)(q >> 16), i);
- SET_ACCUM_M((UINT16)(q >> 32), i);
- SET_ACCUM_H((UINT16)(q >> 48), i);
+ SET_ACCUM_LL((uint16_t)q, i);
+ SET_ACCUM_L((uint16_t)(q >> 16), i);
+ SET_ACCUM_M((uint16_t)(q >> 32), i);
+ SET_ACCUM_H((uint16_t)(q >> 48), i);
m_vres[i] = SATURATE_ACCUM(i, 0, 0x0000, 0xffff);
}
@@ -2227,7 +2227,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MADH ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t acc_lo, acc_mid, acc_hi;
acc_lo = read_acc_lo(acc);
@@ -2245,15 +2245,15 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i = 0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 accum = (UINT32)(UINT16)ACCUM_M(i);
- accum |= ((UINT32)((UINT16)ACCUM_H(i))) << 16;
+ int32_t accum = (uint32_t)(uint16_t)ACCUM_M(i);
+ accum |= ((uint32_t)((uint16_t)ACCUM_H(i))) << 16;
accum += s1 * s2;
- SET_ACCUM_H((UINT16)(accum >> 16), i);
- SET_ACCUM_M((UINT16)accum, i);
+ SET_ACCUM_H((uint16_t)(accum >> 16), i);
+ SET_ACCUM_M((uint16_t)accum, i);
m_vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
}
@@ -2278,7 +2278,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("ADD ");
#if USE_SIMD
rsp_vec_t acc_lo;
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t carry = read_vco_lo(m_flags[RSP_VCO].s);
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -2292,15 +2292,15 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 r = s1 + s2 + (CARRY_FLAG(i) != 0 ? 1 : 0);
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t r = s1 + s2 + (CARRY_FLAG(i) != 0 ? 1 : 0);
- SET_ACCUM_L((INT16)(r), i);
+ SET_ACCUM_L((int16_t)(r), i);
if (r > 32767) r = 32767;
if (r < -32768) r = -32768;
- m_vres[i] = (INT16)(r);
+ m_vres[i] = (int16_t)(r);
}
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
@@ -2324,7 +2324,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("SUB ");
#if USE_SIMD
rsp_vec_t acc_lo;
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t carry = read_vco_lo(m_flags[RSP_VCO].s);
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -2338,16 +2338,16 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i = 0; i < 8; i++)
{
- INT32 s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- INT32 s2 = (INT32)(INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 r = s1 - s2 - (CARRY_FLAG(i) != 0 ? 1 : 0);
+ int32_t s1 = (int32_t)(int16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (int32_t)(int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t r = s1 - s2 - (CARRY_FLAG(i) != 0 ? 1 : 0);
- SET_ACCUM_L((INT16)(r), i);
+ SET_ACCUM_L((int16_t)(r), i);
if (r > 32767) r = 32767;
if (r < -32768) r = -32768;
- m_vres[i] = (INT16)(r);
+ m_vres[i] = (int16_t)(r);
}
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
@@ -2370,7 +2370,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("ABS ");
#if USE_SIMD
rsp_vec_t acc_lo;
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
rsp_vec_t vt_shuffle = vec_load_and_shuffle_operand(m_v[VS2REG].s, EL);
@@ -2381,8 +2381,8 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i=0; i < 8; i++)
{
- INT16 s1 = (INT16)VREG_S(VS1REG, i);
- INT16 s2 = (INT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int16_t s1 = (int16_t)VREG_S(VS1REG, i);
+ int16_t s2 = (int16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
if (s1 < 0)
{
@@ -2425,7 +2425,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("ADDC ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t sn;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -2442,12 +2442,12 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
for (i=0; i < 8; i++)
{
- INT32 s1 = (UINT32)(UINT16)VREG_S(VS1REG, i);
- INT32 s2 = (UINT32)(UINT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 r = s1 + s2;
+ int32_t s1 = (uint32_t)(uint16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (uint32_t)(uint16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t r = s1 + s2;
- m_vres[i] = (INT16)(r);
- SET_ACCUM_L((INT16)(r), i);
+ m_vres[i] = (int16_t)(r);
+ SET_ACCUM_L((int16_t)(r), i);
if (r & 0xffff0000)
{
@@ -2473,7 +2473,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("SUBC ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t eq, sn;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -2490,14 +2490,14 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
for (i=0; i < 8; i++)
{
- INT32 s1 = (UINT32)(UINT16)VREG_S(VS1REG, i);
- INT32 s2 = (UINT32)(UINT16)VREG_S(VS2REG, VEC_EL_2(EL, i));
- INT32 r = s1 - s2;
+ int32_t s1 = (uint32_t)(uint16_t)VREG_S(VS1REG, i);
+ int32_t s2 = (uint32_t)(uint16_t)VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int32_t r = s1 - s2;
- m_vres[i] = (INT16)(r);
- SET_ACCUM_L((UINT16)(r), i);
+ m_vres[i] = (int16_t)(r);
+ SET_ACCUM_L((uint16_t)(r), i);
- if ((UINT16)(r) != 0)
+ if ((uint16_t)(r) != 0)
{
SET_ZERO_FLAG(i);
}
@@ -2523,7 +2523,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("SAW ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
switch (EL)
{
case 8:
@@ -2588,7 +2588,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("LT ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t le;
rsp_vec_t eq = read_vco_hi(m_flags[RSP_VCO].s);
@@ -2610,7 +2610,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
for (i=0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
s1 = VREG_S(VS1REG, i);
s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
if (s1 < s2)
@@ -2657,7 +2657,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("EQ ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t le;
rsp_vec_t eq = read_vco_hi(m_flags[RSP_VCO].s);
@@ -2679,8 +2679,8 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
for (i = 0; i < 8; i++)
{
- INT16 s1 = VREG_S(VS1REG, i);
- INT16 s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int16_t s1 = VREG_S(VS1REG, i);
+ int16_t s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
if ((s1 == s2) && ZERO_FLAG(i) == 0)
{
@@ -2714,7 +2714,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("NE ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t le;
rsp_vec_t eq = read_vco_hi(m_flags[RSP_VCO].s);
@@ -2736,8 +2736,8 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
for (i = 0; i < 8; i++)
{
- INT16 s1 = VREG_S(VS1REG, i);
- INT16 s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int16_t s1 = VREG_S(VS1REG, i);
+ int16_t s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
if (s1 != s2 || ZERO_FLAG(i) != 0)
{
@@ -2772,7 +2772,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("GE ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t le;
rsp_vec_t eq = read_vco_hi(m_flags[RSP_VCO].s);
@@ -2794,8 +2794,8 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
for (i=0; i < 8; i++)
{
- INT16 s1 = VREG_S(VS1REG, i);
- INT16 s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int16_t s1 = VREG_S(VS1REG, i);
+ int16_t s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
if ((s1 == s2 && (ZERO_FLAG(i) == 0 || CARRY_FLAG(i) == 0)) || s1 > s2)
{
@@ -2829,7 +2829,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("CL ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t ge = read_vcc_hi(m_flags[RSP_VCC].s);
rsp_vec_t le = read_vcc_lo(m_flags[RSP_VCC].s);
@@ -2850,8 +2850,8 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#else
for (i = 0; i < 8; i++)
{
- INT16 s1 = VREG_S(VS1REG, i);
- INT16 s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int16_t s1 = VREG_S(VS1REG, i);
+ int16_t s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
if (CARRY_FLAG(i) != 0) // vco_lo
{
@@ -2859,7 +2859,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
{
if (COMPARE_FLAG(i) != 0) // vcc_lo
{
- SET_ACCUM_L(-(UINT16)s2, i);
+ SET_ACCUM_L(-(uint16_t)s2, i);
}
else
{
@@ -2870,27 +2870,27 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
{
if (CLIP1_FLAG(i) != 0) // vce
{
- if (((UINT32)(UINT16)(s1) + (UINT32)(UINT16)(s2)) > 0x10000)
+ if (((uint32_t)(uint16_t)(s1) + (uint32_t)(uint16_t)(s2)) > 0x10000)
{
SET_ACCUM_L(s1, i);
CLEAR_COMPARE_FLAG(i);
}
else
{
- SET_ACCUM_L(-((UINT16)s2), i);
+ SET_ACCUM_L(-((uint16_t)s2), i);
SET_COMPARE_FLAG(i);
}
}
else
{
- if (((UINT32)(UINT16)(s1) + (UINT32)(UINT16)(s2)) != 0)
+ if (((uint32_t)(uint16_t)(s1) + (uint32_t)(uint16_t)(s2)) != 0)
{
SET_ACCUM_L(s1, i);
CLEAR_COMPARE_FLAG(i);
}
else
{
- SET_ACCUM_L(-((UINT16)s2), i);
+ SET_ACCUM_L(-((uint16_t)s2), i);
SET_COMPARE_FLAG(i);
}
}
@@ -2911,7 +2911,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
}
else
{
- if (((INT32)(UINT16)s1 - (INT32)(UINT16)s2) >= 0)
+ if (((int32_t)(uint16_t)s1 - (int32_t)(uint16_t)s2) >= 0)
{
SET_ACCUM_L(s2, i);
SET_CLIP2_FLAG(i);
@@ -2946,7 +2946,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("CH ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t ge, le, sign, eq, vce;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -2966,12 +2966,12 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
CLEAR_CLIP1_FLAGS();
CLEAR_ZERO_FLAGS();
CLEAR_CLIP2_FLAGS();
- UINT32 vce;
+ uint32_t vce;
for (i=0; i < 8; i++)
{
- INT16 s1 = VREG_S(VS1REG, i);
- INT16 s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int16_t s1 = VREG_S(VS1REG, i);
+ int16_t s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
if ((s1 ^ s2) < 0)
{
@@ -2985,7 +2985,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
if (s1 + s2 <= 0)
{
SET_COMPARE_FLAG(i);
- m_vres[i] = -((UINT16)s2);
+ m_vres[i] = -((uint16_t)s2);
}
else
{
@@ -3049,7 +3049,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("CR ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t ge, le;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -3072,10 +3072,10 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
for (i=0; i < 8; i++)
{
- INT16 s1 = VREG_S(VS1REG, i);
- INT16 s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
+ int16_t s1 = VREG_S(VS1REG, i);
+ int16_t s2 = VREG_S(VS2REG, VEC_EL_2(EL, i));
- if ((INT16)(s1 ^ s2) < 0)
+ if ((int16_t)(s1 ^ s2) < 0)
{
if (s2 < 0)
{
@@ -3083,7 +3083,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
}
if ((s1 + s2) <= 0)
{
- SET_ACCUM_L(~((UINT16)s2), i);
+ SET_ACCUM_L(~((uint16_t)s2), i);
SET_COMPARE_FLAG(i);
}
else
@@ -3127,7 +3127,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("MRG ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t le = read_vcc_lo(m_flags[RSP_VCC].s);
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
@@ -3168,7 +3168,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("AND ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
rsp_vec_t vt_shuffle = vec_load_and_shuffle_operand(m_v[VS2REG].s, EL);
@@ -3198,7 +3198,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("NAND ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
rsp_vec_t vt_shuffle = vec_load_and_shuffle_operand(m_v[VS2REG].s, EL);
@@ -3228,7 +3228,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("OR ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
rsp_vec_t vt_shuffle = vec_load_and_shuffle_operand(m_v[VS2REG].s, EL);
@@ -3258,7 +3258,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("NOR ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
rsp_vec_t vt_shuffle = vec_load_and_shuffle_operand(m_v[VS2REG].s, EL);
@@ -3288,7 +3288,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("XOR ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
rsp_vec_t vt_shuffle = vec_load_and_shuffle_operand(m_v[VS2REG].s, EL);
@@ -3318,7 +3318,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
//printf("NXOR ");
#if USE_SIMD
- UINT16 *acc = m_acc.s;
+ uint16_t *acc = m_acc.s;
rsp_vec_t vs = vec_load_unshuffled_operand(m_v[VS1REG].s);
rsp_vec_t vt_shuffle = vec_load_and_shuffle_operand(m_v[VS2REG].s, EL);
@@ -3351,15 +3351,15 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
- INT32 dp = op & m_dp_flag;
+ int32_t dp = op & m_dp_flag;
m_dp_flag = 0;
m_v[VDREG].v = vec_vrcp_vrsq(op, dp, VS2REG, EL, VDREG, VS1REG);
#else
- INT32 shifter = 0;
+ int32_t shifter = 0;
- INT32 rec = (INT16)(VREG_S(VS2REG, EL & 7));
- INT32 datainput = (rec < 0) ? (-rec) : rec;
+ int32_t rec = (int16_t)(VREG_S(VS2REG, EL & 7));
+ int32_t datainput = (rec < 0) ? (-rec) : rec;
if (datainput)
{
for (i = 0; i < 32; i++)
@@ -3376,9 +3376,9 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
shifter = 0x10;
}
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
+ int32_t address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ int32_t fetchval = rsp_divtable[address];
+ int32_t temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
if (rec < 0)
{
temp = ~temp;
@@ -3396,7 +3396,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
m_reciprocal_res = rec;
m_dp_allowed = 0;
- VREG_S(VDREG, VS1REG & 7) = (UINT16)(rec & 0xffff);
+ VREG_S(VDREG, VS1REG & 7) = (uint16_t)(rec & 0xffff);
for (i = 0; i < 8; i++)
{
@@ -3422,15 +3422,15 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
- INT32 dp = op & m_dp_flag;
+ int32_t dp = op & m_dp_flag;
m_dp_flag = 0;
m_v[VDREG].v = vec_vrcp_vrsq(op, dp, VS2REG, EL, VDREG, VS1REG);
#else
- INT32 shifter = 0;
+ int32_t shifter = 0;
- INT32 rec = (INT16)VREG_S(VS2REG, EL & 7);
- INT32 datainput = rec;
+ int32_t rec = (int16_t)VREG_S(VS2REG, EL & 7);
+ int32_t datainput = rec;
if (m_dp_allowed)
{
@@ -3466,9 +3466,9 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
}
}
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
+ int32_t address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ int32_t fetchval = rsp_divtable[address];
+ int32_t temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
temp ^= rec >> 31;
if (!rec)
@@ -3484,7 +3484,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
m_reciprocal_res = rec;
m_dp_allowed = 0;
- VREG_S(VDREG, VS1REG & 7) = (UINT16)(rec & 0xffff);
+ VREG_S(VDREG, VS1REG & 7) = (uint16_t)(rec & 0xffff);
for (i = 0; i < 8; i++)
{
@@ -3521,7 +3521,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
}
- VREG_S(VDREG, VS1REG & 7) = (INT16)(m_reciprocal_res >> 16);
+ VREG_S(VDREG, VS1REG & 7) = (int16_t)(m_reciprocal_res >> 16);
#endif
//
@@ -3565,15 +3565,15 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
- INT32 dp = op & m_dp_flag;
+ int32_t dp = op & m_dp_flag;
m_dp_flag = 0;
m_v[VDREG].v = vec_vrcp_vrsq(op, dp, VS2REG, EL, VDREG, VS1REG);
#else
- INT32 shifter = 0;
+ int32_t shifter = 0;
- INT32 rec = (INT16)(VREG_S(VS2REG, EL & 7));
- INT32 datainput = (rec < 0) ? (-rec) : rec;
+ int32_t rec = (int16_t)(VREG_S(VS2REG, EL & 7));
+ int32_t datainput = (rec < 0) ? (-rec) : rec;
if (datainput)
{
for (i = 0; i < 32; i++)
@@ -3590,11 +3590,11 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
shifter = 0x10;
}
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ int32_t address = ((datainput << shifter) & 0x7fc00000) >> 22;
address = ((address | 0x200) & 0x3fe) | (shifter & 1);
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
+ int32_t fetchval = rsp_divtable[address];
+ int32_t temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
if (rec < 0)
{
temp = ~temp;
@@ -3612,7 +3612,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
m_reciprocal_res = rec;
m_dp_allowed = 0;
- VREG_S(VDREG, VS1REG & 7) = (UINT16)(rec & 0xffff);
+ VREG_S(VDREG, VS1REG & 7) = (uint16_t)(rec & 0xffff);
for (i = 0; i < 8; i++)
{
@@ -3637,14 +3637,14 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
#if USE_SIMD
write_acc_lo(m_acc.s, vec_load_and_shuffle_operand(m_v[VS2REG].s, EL));
- INT32 dp = op & m_dp_flag;
+ int32_t dp = op & m_dp_flag;
m_dp_flag = 0;
m_v[VDREG].v = vec_vrcp_vrsq(op, dp, VS2REG, EL, VDREG, VS1REG);
#else
- INT32 shifter = 0;
- INT32 rec = (INT16)VREG_S(VS2REG, EL & 7);
- INT32 datainput = rec;
+ int32_t shifter = 0;
+ int32_t rec = (int16_t)VREG_S(VS2REG, EL & 7);
+ int32_t datainput = rec;
if (m_dp_allowed)
{
@@ -3682,11 +3682,11 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
}
}
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ int32_t address = ((datainput << shifter) & 0x7fc00000) >> 22;
address = ((address | 0x200) & 0x3fe) | (shifter & 1);
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
+ int32_t fetchval = rsp_divtable[address];
+ int32_t temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
temp ^= rec >> 31;
if (!rec)
@@ -3702,7 +3702,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
m_reciprocal_res = rec;
m_dp_allowed = 0;
- VREG_S(VDREG, VS1REG & 7) = (UINT16)(rec & 0xffff);
+ VREG_S(VDREG, VS1REG & 7) = (uint16_t)(rec & 0xffff);
for (i = 0; i < 8; i++)
{
@@ -3739,7 +3739,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
SET_ACCUM_L(VREG_S(VS2REG, VEC_EL_2(EL, i)), i);
}
- VREG_S(VDREG, VS1REG & 7) = (INT16)(m_reciprocal_res >> 16); // store high part
+ VREG_S(VDREG, VS1REG & 7) = (int16_t)(m_reciprocal_res >> 16); // store high part
#endif
//
break;
@@ -3766,7 +3766,7 @@ void rsp_cop2::handle_vector_ops(UINT32 op)
Vector Flag Reading/Writing
***************************************************************************/
-void rsp_cop2::handle_cop2(UINT32 op)
+void rsp_cop2::handle_cop2(uint32_t op)
{
switch ((op >> 21) & 0x1f)
{
@@ -3779,9 +3779,9 @@ void rsp_cop2::handle_cop2(UINT32 op)
//
//printf("MFC2 ");
int el = (op >> 7) & 0xf;
- UINT16 b1 = VREG_B(RDREG, (el+0) & 0xf);
- UINT16 b2 = VREG_B(RDREG, (el+1) & 0xf);
- if (RTREG) RTVAL = (INT32)(INT16)((b1 << 8) | (b2));
+ uint16_t b1 = VREG_B(RDREG, (el+0) & 0xf);
+ uint16_t b2 = VREG_B(RDREG, (el+1) & 0xf);
+ if (RTREG) RTVAL = (int32_t)(int16_t)((b1 << 8) | (b2));
break;
}
@@ -3796,7 +3796,7 @@ void rsp_cop2::handle_cop2(UINT32 op)
if (RTREG)
{
#if USE_SIMD
- INT32 src = RDREG & 3;
+ int32_t src = RDREG & 3;
if (src == 3) {
src = 2;
}
@@ -3885,14 +3885,14 @@ void rsp_cop2::handle_cop2(UINT32 op)
case 0:
case 1:
case 2:
- UINT16 r0 = (RTVAL & (1 << 0)) ? 0xffff : 0;
- UINT16 r1 = (RTVAL & (1 << 1)) ? 0xffff : 0;
- UINT16 r2 = (RTVAL & (1 << 2)) ? 0xffff : 0;
- UINT16 r3 = (RTVAL & (1 << 3)) ? 0xffff : 0;
- UINT16 r4 = (RTVAL & (1 << 4)) ? 0xffff : 0;
- UINT16 r5 = (RTVAL & (1 << 5)) ? 0xffff : 0;
- UINT16 r6 = (RTVAL & (1 << 6)) ? 0xffff : 0;
- UINT16 r7 = (RTVAL & (1 << 7)) ? 0xffff : 0;
+ uint16_t r0 = (RTVAL & (1 << 0)) ? 0xffff : 0;
+ uint16_t r1 = (RTVAL & (1 << 1)) ? 0xffff : 0;
+ uint16_t r2 = (RTVAL & (1 << 2)) ? 0xffff : 0;
+ uint16_t r3 = (RTVAL & (1 << 3)) ? 0xffff : 0;
+ uint16_t r4 = (RTVAL & (1 << 4)) ? 0xffff : 0;
+ uint16_t r5 = (RTVAL & (1 << 5)) ? 0xffff : 0;
+ uint16_t r6 = (RTVAL & (1 << 6)) ? 0xffff : 0;
+ uint16_t r7 = (RTVAL & (1 << 7)) ? 0xffff : 0;
m_flags[RDREG].__align[0] = _mm_set_epi16(r7, r6, r5, r4, r3, r2, r1, r0);
r0 = (RTVAL & (1 << 8)) ? 0xffff : 0;
r1 = (RTVAL & (1 << 9)) ? 0xffff : 0;
@@ -3980,17 +3980,17 @@ void rsp_cop2::handle_cop2(UINT32 op)
inline void rsp_cop2::mfc2()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int el = (op >> 7) & 0xf;
- UINT16 b1 = VREG_B(VS1REG, (el+0) & 0xf);
- UINT16 b2 = VREG_B(VS1REG, (el+1) & 0xf);
- if (RTREG) RTVAL = (INT32)(INT16)((b1 << 8) | (b2));
+ uint16_t b1 = VREG_B(VS1REG, (el+0) & 0xf);
+ uint16_t b2 = VREG_B(VS1REG, (el+1) & 0xf);
+ if (RTREG) RTVAL = (int32_t)(int16_t)((b1 << 8) | (b2));
}
inline void rsp_cop2::cfc2()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
if (RTREG)
{
switch(RDREG)
@@ -4049,7 +4049,7 @@ inline void rsp_cop2::cfc2()
inline void rsp_cop2::mtc2()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int el = (op >> 7) & 0xf;
VREG_B(VS1REG, (el+0) & 0xf) = (RTVAL >> 8) & 0xff;
VREG_B(VS1REG, (el+1) & 0xf) = (RTVAL >> 0) & 0xff;
@@ -4057,7 +4057,7 @@ inline void rsp_cop2::mtc2()
inline void rsp_cop2::ctc2()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
switch(RDREG)
{
case 0:
@@ -4163,14 +4163,14 @@ void rsp_cop2::log_instruction_execution()
if (m_v[i].d[0] != prev_vecs[i].d[0] || m_v[i].d[1] != prev_vecs[i].d[1])
{
fprintf(m_rsp.m_exec_output, "V%d: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X ", i,
- (UINT16)VREG_S(i,0), (UINT16)VREG_S(i,1), (UINT16)VREG_S(i,2), (UINT16)VREG_S(i,3), (UINT16)VREG_S(i,4), (UINT16)VREG_S(i,5), (UINT16)VREG_S(i,6), (UINT16)VREG_S(i,7));
+ (uint16_t)VREG_S(i,0), (uint16_t)VREG_S(i,1), (uint16_t)VREG_S(i,2), (uint16_t)VREG_S(i,3), (uint16_t)VREG_S(i,4), (uint16_t)VREG_S(i,5), (uint16_t)VREG_S(i,6), (uint16_t)VREG_S(i,7));
}
prev_vecs[i].d[0] = m_v[i].d[0];
prev_vecs[i].d[1] = m_v[i].d[1];
}
}
-void rsp_cop2::dump(UINT32 op)
+void rsp_cop2::dump(uint32_t op)
{
printf("%08x ", op);
for (int i = 0; i < 32; i++)
@@ -4207,7 +4207,7 @@ void rsp_cop2::dump(UINT32 op)
void rsp_cop2::dump_dmem()
{
- UINT8* dmem = m_rsp.get_dmem();
+ uint8_t* dmem = m_rsp.get_dmem();
printf("\n");
for (int i = 0; i < 0x1000; i += 32)
{
diff --git a/src/devices/cpu/rsp/rspcp2.h b/src/devices/cpu/rsp/rspcp2.h
index 9eb0bb37fdc..5f477963940 100644
--- a/src/devices/cpu/rsp/rspcp2.h
+++ b/src/devices/cpu/rsp/rspcp2.h
@@ -56,10 +56,10 @@ typedef __m128i rsp_vec_t;
union VECTOR_REG
{
- UINT64 d[2];
- UINT32 l[4];
- UINT16 s[8];
- UINT8 b[16];
+ uint64_t d[2];
+ uint32_t l[4];
+ uint16_t s[8];
+ uint8_t b[16];
#if USE_SIMD
rsp_vec_t v;
#endif
@@ -67,9 +67,9 @@ union VECTOR_REG
union ACCUMULATOR_REG
{
- UINT64 q;
- UINT32 l[2];
- UINT16 w[4];
+ uint64_t q;
+ uint32_t l[2];
+ uint16_t w[4];
};
struct compiler_state;
@@ -163,29 +163,29 @@ public:
virtual void mtc2();
virtual void ctc2();
- virtual void handle_cop2(UINT32 op);
+ virtual void handle_cop2(uint32_t op);
void log_instruction_execution();
virtual void cfunc_unimplemented_opcode() { }
- void dump(UINT32 op);
+ void dump(uint32_t op);
void dump_dmem();
protected:
virtual int generate_vector_opcode(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc) { return TRUE; }
- UINT16 SATURATE_ACCUM(int accum, int slice, UINT16 negative, UINT16 positive);
+ uint16_t SATURATE_ACCUM(int accum, int slice, uint16_t negative, uint16_t positive);
// Data that needs to be stored close to the generated DRC code
struct internal_rspcop2_state
{
- UINT32 op;
+ uint32_t op;
};
internal_rspcop2_state *m_rspcop2_state;
rsp_device& m_rsp;
running_machine& m_machine;
- UINT32 m_vres[8]; /* used for temporary vector results */
+ uint32_t m_vres[8]; /* used for temporary vector results */
#if USE_SIMD
__align16 VECTOR_REG m_v[32];
@@ -193,11 +193,11 @@ protected:
VECTOR_REG m_v[32];
#endif
ACCUMULATOR_REG m_accum[8];
- UINT16 m_vflag[6][8];
+ uint16_t m_vflag[6][8];
- INT32 m_reciprocal_res;
- UINT32 m_reciprocal_high;
- INT32 m_dp_allowed;
+ int32_t m_reciprocal_res;
+ uint32_t m_reciprocal_high;
+ int32_t m_dp_allowed;
#if USE_SIMD
enum rsp_flags_t {
@@ -226,60 +226,60 @@ protected:
union aligned_rsp_1vect_t {
rsp_vec_t __align;
- UINT16 s[8];
+ uint16_t s[8];
};
union aligned_rsp_2vect_t {
rsp_vec_t __align[2];
- UINT16 s[16];
+ uint16_t s[16];
};
union aligned_rsp_3vect_t {
rsp_vec_t __align[3];
- UINT16 s[24];
+ uint16_t s[24];
};
__align16 aligned_rsp_1vect_t m_vdqm;
__align16 aligned_rsp_2vect_t m_flags[3];
__align16 aligned_rsp_3vect_t m_acc;
- UINT32 m_dp_flag;
+ uint32_t m_dp_flag;
typedef struct
{
rsp_vec_t dummy_for_alignment;
- const UINT16 logic_mask[2][8];
- const UINT16 vrsq_mask_table[8][8];
- const UINT16 shuffle_keys[16][8];
- const UINT16 sll_b2l_keys[16][8];
- const UINT16 sll_l2b_keys[16][8];
- const UINT16 srl_b2l_keys[16][8];
- const UINT16 ror_b2l_keys[16][8];
- const UINT16 rol_l2b_keys[16][8];
- const UINT16 ror_l2b_keys[16][8];
- const UINT16 qr_lut[16][8];
- const UINT16 bdls_lut[4][4];
- const UINT16 word_reverse[8];
+ const uint16_t logic_mask[2][8];
+ const uint16_t vrsq_mask_table[8][8];
+ const uint16_t shuffle_keys[16][8];
+ const uint16_t sll_b2l_keys[16][8];
+ const uint16_t sll_l2b_keys[16][8];
+ const uint16_t srl_b2l_keys[16][8];
+ const uint16_t ror_b2l_keys[16][8];
+ const uint16_t rol_l2b_keys[16][8];
+ const uint16_t ror_l2b_keys[16][8];
+ const uint16_t qr_lut[16][8];
+ const uint16_t bdls_lut[4][4];
+ const uint16_t word_reverse[8];
} vec_helpers_t;
static const vec_helpers_t m_vec_helpers;
- rsp_vec_t vec_load_and_shuffle_operand(const UINT16* src, UINT32 element);
- static inline UINT32 sign_extend_6(INT32 i) {
+ rsp_vec_t vec_load_and_shuffle_operand(const uint16_t* src, uint32_t element);
+ static inline uint32_t sign_extend_6(int32_t i) {
return ((i << (32 - 7)) >> (32 - 7)) & 0xfff;
}
static inline rsp_vec_t vec_load_unshuffled_operand(const void* src)
{
return _mm_load_si128((rsp_vec_t*) src);
}
- static inline void vec_write_operand(UINT16* dest, rsp_vec_t src)
+ static inline void vec_write_operand(uint16_t* dest, rsp_vec_t src)
{
_mm_store_si128((rsp_vec_t*) dest, src);
}
- static inline rsp_vec_t read_acc_lo(const UINT16* acc)
+ static inline rsp_vec_t read_acc_lo(const uint16_t* acc)
{
return vec_load_unshuffled_operand(acc + sizeof(rsp_vec_t));
}
- static inline rsp_vec_t read_acc_mid(const UINT16* acc)
+ static inline rsp_vec_t read_acc_mid(const uint16_t* acc)
{
return vec_load_unshuffled_operand(acc + (sizeof(rsp_vec_t) >> 1));
}
@@ -287,60 +287,60 @@ protected:
{
return vec_load_unshuffled_operand(acc);
}
- static inline rsp_vec_t read_vcc_lo(const UINT16 *vcc)
+ static inline rsp_vec_t read_vcc_lo(const uint16_t *vcc)
{
return vec_load_unshuffled_operand(vcc + (sizeof(rsp_vec_t) >> 1));
}
- static inline rsp_vec_t read_vcc_hi(const UINT16 *vcc)
+ static inline rsp_vec_t read_vcc_hi(const uint16_t *vcc)
{
return vec_load_unshuffled_operand(vcc);
}
- static inline rsp_vec_t read_vco_lo(const UINT16 *vco)
+ static inline rsp_vec_t read_vco_lo(const uint16_t *vco)
{
return vec_load_unshuffled_operand(vco + (sizeof(rsp_vec_t) >> 1));
}
- static inline rsp_vec_t read_vco_hi(const UINT16 *vco)
+ static inline rsp_vec_t read_vco_hi(const uint16_t *vco)
{
return vec_load_unshuffled_operand(vco);
}
- static inline rsp_vec_t read_vce(const UINT16 *vce)
+ static inline rsp_vec_t read_vce(const uint16_t *vce)
{
return vec_load_unshuffled_operand(vce + (sizeof(rsp_vec_t) >> 1));
}
- static inline void write_acc_lo(UINT16 *acc, rsp_vec_t acc_lo)
+ static inline void write_acc_lo(uint16_t *acc, rsp_vec_t acc_lo)
{
return vec_write_operand(acc + sizeof(rsp_vec_t), acc_lo);
}
- static inline void write_acc_mid(UINT16 *acc, rsp_vec_t acc_mid)
+ static inline void write_acc_mid(uint16_t *acc, rsp_vec_t acc_mid)
{
return vec_write_operand(acc + (sizeof(rsp_vec_t) >> 1), acc_mid);
}
- static inline void write_acc_hi(UINT16 *acc, rsp_vec_t acc_hi)
+ static inline void write_acc_hi(uint16_t *acc, rsp_vec_t acc_hi)
{
return vec_write_operand(acc, acc_hi);
}
- static inline void write_vcc_lo(UINT16 *vcc, rsp_vec_t vcc_lo)
+ static inline void write_vcc_lo(uint16_t *vcc, rsp_vec_t vcc_lo)
{
return vec_write_operand(vcc + (sizeof(rsp_vec_t) >> 1), vcc_lo);
}
- static inline void write_vcc_hi(UINT16 *vcc, rsp_vec_t vcc_hi)
+ static inline void write_vcc_hi(uint16_t *vcc, rsp_vec_t vcc_hi)
{
return vec_write_operand(vcc, vcc_hi);
}
- static inline void write_vco_lo(UINT16 *vcc, rsp_vec_t vco_lo)
+ static inline void write_vco_lo(uint16_t *vcc, rsp_vec_t vco_lo)
{
return vec_write_operand(vcc + (sizeof(rsp_vec_t) >> 1), vco_lo);
}
- static inline void write_vco_hi(UINT16 *vcc, rsp_vec_t vco_hi)
+ static inline void write_vco_hi(uint16_t *vcc, rsp_vec_t vco_hi)
{
return vec_write_operand(vcc, vco_hi);
}
- static inline void write_vce(UINT16 *vce, rsp_vec_t vce_r)
+ static inline void write_vce(uint16_t *vce, rsp_vec_t vce_r)
{
return vec_write_operand(vce + (sizeof(rsp_vec_t) >> 1), vce_r);
}
- static inline INT16 get_flags(const UINT16 *flags)
+ static inline int16_t get_flags(const uint16_t *flags)
{
return _mm_movemask_epi8(_mm_packs_epi16(_mm_load_si128((rsp_vec_t*) (flags + (sizeof(rsp_vec_t) >> 1))), _mm_load_si128((rsp_vec_t*) flags)));
}
@@ -350,12 +350,12 @@ protected:
return _mm_setzero_si128();
}
- void vec_load_group1(UINT32 addr, UINT32 element, UINT16* regp, rsp_vec_t reg, rsp_vec_t dqm);
- void vec_load_group2(UINT32 addr, UINT32 element, UINT16* regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type);
- void vec_load_group4(UINT32 addr, UINT32 element, UINT16* regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type);
- void vec_store_group1(UINT32 addr, UINT32 element, UINT16* regp, rsp_vec_t reg, rsp_vec_t dqm);
- void vec_store_group2(UINT32 addr, UINT32 element, UINT16* regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type);
- void vec_store_group4(UINT32 addr, UINT32 element, UINT16* regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type);
+ void vec_load_group1(uint32_t addr, uint32_t element, uint16_t* regp, rsp_vec_t reg, rsp_vec_t dqm);
+ void vec_load_group2(uint32_t addr, uint32_t element, uint16_t* regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type);
+ void vec_load_group4(uint32_t addr, uint32_t element, uint16_t* regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type);
+ void vec_store_group1(uint32_t addr, uint32_t element, uint16_t* regp, rsp_vec_t reg, rsp_vec_t dqm);
+ void vec_store_group2(uint32_t addr, uint32_t element, uint16_t* regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type);
+ void vec_store_group4(uint32_t addr, uint32_t element, uint16_t* regp, rsp_vec_t reg, rsp_vec_t dqm, rsp_mem_request_type request_type);
#include "clamp.h"
#include "vabs.h"
@@ -385,12 +385,12 @@ protected:
#endif
private:
- void handle_lwc2(UINT32 op);
- void handle_swc2(UINT32 op);
- void handle_vector_ops(UINT32 op);
+ void handle_lwc2(uint32_t op);
+ void handle_swc2(uint32_t op);
+ void handle_vector_ops(uint32_t op);
- UINT32 m_div_in;
- UINT32 m_div_out;
+ uint32_t m_div_in;
+ uint32_t m_div_out;
};
#endif /* __RSPCP2_H__ */
diff --git a/src/devices/cpu/rsp/rspcp2d.cpp b/src/devices/cpu/rsp/rspcp2d.cpp
index cdcfb175f47..7efb3f34b12 100644
--- a/src/devices/cpu/rsp/rspcp2d.cpp
+++ b/src/devices/cpu/rsp/rspcp2d.cpp
@@ -19,7 +19,7 @@
using namespace uml;
-extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
+extern offs_t rsp_dasm_one(char *buffer, offs_t pc, uint32_t op);
/***************************************************************************
Helpful Defines
@@ -36,7 +36,7 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
#define VREG_B(reg, offset) m_v[(reg)].b[(offset)^1]
#define W_VREG_S(reg, offset) m_v[(reg)].s[(offset)]
-#define VREG_S(reg, offset) (INT16)m_v[(reg)].s[(offset)]
+#define VREG_S(reg, offset) (int16_t)m_v[(reg)].s[(offset)]
#define VEC_EL_2(x,z) (vector_elements_2[(x)][(z)])
@@ -53,10 +53,10 @@ static void cfunc_cfc2(void *param);
static void cfunc_mtc2(void *param);
static void cfunc_ctc2(void *param);
-#define ACCUM_H(x) (UINT16)m_accum[x].w[3]
-#define ACCUM_M(x) (UINT16)m_accum[x].w[2]
-#define ACCUM_L(x) (UINT16)m_accum[x].w[1]
-#define ACCUM_LL(x) (UINT16)m_accum[x].w[0]
+#define ACCUM_H(x) (uint16_t)m_accum[x].w[3]
+#define ACCUM_M(x) (uint16_t)m_accum[x].w[2]
+#define ACCUM_L(x) (uint16_t)m_accum[x].w[1]
+#define ACCUM_LL(x) (uint16_t)m_accum[x].w[0]
#define ACCUM(x) m_accum[x].q
#define SET_ACCUM_H(v, x) m_accum[x].w[3] = v;
@@ -132,7 +132,7 @@ static const int vector_elements_2[16][8] =
void rsp_cop2_drc::cfunc_unimplemented_opcode()
{
- const UINT32 ppc = m_rsp.m_ppc;
+ const uint32_t ppc = m_rsp.m_ppc;
if ((m_machine.debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
char string[200];
@@ -152,100 +152,100 @@ void rsp_cop2_drc::state_string_export(const int index, std::string &str) const
switch (index)
{
case RSP_V0:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 0, 0), (UINT16)VREG_S( 0, 1), (UINT16)VREG_S( 0, 2), (UINT16)VREG_S( 0, 3), (UINT16)VREG_S( 0, 4), (UINT16)VREG_S( 0, 5), (UINT16)VREG_S( 0, 6), (UINT16)VREG_S( 0, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 0, 0), (uint16_t)VREG_S( 0, 1), (uint16_t)VREG_S( 0, 2), (uint16_t)VREG_S( 0, 3), (uint16_t)VREG_S( 0, 4), (uint16_t)VREG_S( 0, 5), (uint16_t)VREG_S( 0, 6), (uint16_t)VREG_S( 0, 7));
break;
case RSP_V1:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 1, 0), (UINT16)VREG_S( 1, 1), (UINT16)VREG_S( 1, 2), (UINT16)VREG_S( 1, 3), (UINT16)VREG_S( 1, 4), (UINT16)VREG_S( 1, 5), (UINT16)VREG_S( 1, 6), (UINT16)VREG_S( 1, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 1, 0), (uint16_t)VREG_S( 1, 1), (uint16_t)VREG_S( 1, 2), (uint16_t)VREG_S( 1, 3), (uint16_t)VREG_S( 1, 4), (uint16_t)VREG_S( 1, 5), (uint16_t)VREG_S( 1, 6), (uint16_t)VREG_S( 1, 7));
break;
case RSP_V2:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 2, 0), (UINT16)VREG_S( 2, 1), (UINT16)VREG_S( 2, 2), (UINT16)VREG_S( 2, 3), (UINT16)VREG_S( 2, 4), (UINT16)VREG_S( 2, 5), (UINT16)VREG_S( 2, 6), (UINT16)VREG_S( 2, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 2, 0), (uint16_t)VREG_S( 2, 1), (uint16_t)VREG_S( 2, 2), (uint16_t)VREG_S( 2, 3), (uint16_t)VREG_S( 2, 4), (uint16_t)VREG_S( 2, 5), (uint16_t)VREG_S( 2, 6), (uint16_t)VREG_S( 2, 7));
break;
case RSP_V3:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 3, 0), (UINT16)VREG_S( 3, 1), (UINT16)VREG_S( 3, 2), (UINT16)VREG_S( 3, 3), (UINT16)VREG_S( 3, 4), (UINT16)VREG_S( 3, 5), (UINT16)VREG_S( 3, 6), (UINT16)VREG_S( 3, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 3, 0), (uint16_t)VREG_S( 3, 1), (uint16_t)VREG_S( 3, 2), (uint16_t)VREG_S( 3, 3), (uint16_t)VREG_S( 3, 4), (uint16_t)VREG_S( 3, 5), (uint16_t)VREG_S( 3, 6), (uint16_t)VREG_S( 3, 7));
break;
case RSP_V4:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 4, 0), (UINT16)VREG_S( 4, 1), (UINT16)VREG_S( 4, 2), (UINT16)VREG_S( 4, 3), (UINT16)VREG_S( 4, 4), (UINT16)VREG_S( 4, 5), (UINT16)VREG_S( 4, 6), (UINT16)VREG_S( 4, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 4, 0), (uint16_t)VREG_S( 4, 1), (uint16_t)VREG_S( 4, 2), (uint16_t)VREG_S( 4, 3), (uint16_t)VREG_S( 4, 4), (uint16_t)VREG_S( 4, 5), (uint16_t)VREG_S( 4, 6), (uint16_t)VREG_S( 4, 7));
break;
case RSP_V5:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 5, 0), (UINT16)VREG_S( 5, 1), (UINT16)VREG_S( 5, 2), (UINT16)VREG_S( 5, 3), (UINT16)VREG_S( 5, 4), (UINT16)VREG_S( 5, 5), (UINT16)VREG_S( 5, 6), (UINT16)VREG_S( 5, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 5, 0), (uint16_t)VREG_S( 5, 1), (uint16_t)VREG_S( 5, 2), (uint16_t)VREG_S( 5, 3), (uint16_t)VREG_S( 5, 4), (uint16_t)VREG_S( 5, 5), (uint16_t)VREG_S( 5, 6), (uint16_t)VREG_S( 5, 7));
break;
case RSP_V6:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 6, 0), (UINT16)VREG_S( 6, 1), (UINT16)VREG_S( 6, 2), (UINT16)VREG_S( 6, 3), (UINT16)VREG_S( 6, 4), (UINT16)VREG_S( 6, 5), (UINT16)VREG_S( 6, 6), (UINT16)VREG_S( 6, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 6, 0), (uint16_t)VREG_S( 6, 1), (uint16_t)VREG_S( 6, 2), (uint16_t)VREG_S( 6, 3), (uint16_t)VREG_S( 6, 4), (uint16_t)VREG_S( 6, 5), (uint16_t)VREG_S( 6, 6), (uint16_t)VREG_S( 6, 7));
break;
case RSP_V7:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 7, 0), (UINT16)VREG_S( 7, 1), (UINT16)VREG_S( 7, 2), (UINT16)VREG_S( 7, 3), (UINT16)VREG_S( 7, 4), (UINT16)VREG_S( 7, 5), (UINT16)VREG_S( 7, 6), (UINT16)VREG_S( 7, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 7, 0), (uint16_t)VREG_S( 7, 1), (uint16_t)VREG_S( 7, 2), (uint16_t)VREG_S( 7, 3), (uint16_t)VREG_S( 7, 4), (uint16_t)VREG_S( 7, 5), (uint16_t)VREG_S( 7, 6), (uint16_t)VREG_S( 7, 7));
break;
case RSP_V8:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 8, 0), (UINT16)VREG_S( 8, 1), (UINT16)VREG_S( 8, 2), (UINT16)VREG_S( 8, 3), (UINT16)VREG_S( 8, 4), (UINT16)VREG_S( 8, 5), (UINT16)VREG_S( 8, 6), (UINT16)VREG_S( 8, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 8, 0), (uint16_t)VREG_S( 8, 1), (uint16_t)VREG_S( 8, 2), (uint16_t)VREG_S( 8, 3), (uint16_t)VREG_S( 8, 4), (uint16_t)VREG_S( 8, 5), (uint16_t)VREG_S( 8, 6), (uint16_t)VREG_S( 8, 7));
break;
case RSP_V9:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S( 9, 0), (UINT16)VREG_S( 9, 1), (UINT16)VREG_S( 9, 2), (UINT16)VREG_S( 9, 3), (UINT16)VREG_S( 9, 4), (UINT16)VREG_S( 9, 5), (UINT16)VREG_S( 9, 6), (UINT16)VREG_S( 9, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S( 9, 0), (uint16_t)VREG_S( 9, 1), (uint16_t)VREG_S( 9, 2), (uint16_t)VREG_S( 9, 3), (uint16_t)VREG_S( 9, 4), (uint16_t)VREG_S( 9, 5), (uint16_t)VREG_S( 9, 6), (uint16_t)VREG_S( 9, 7));
break;
case RSP_V10:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(10, 0), (UINT16)VREG_S(10, 1), (UINT16)VREG_S(10, 2), (UINT16)VREG_S(10, 3), (UINT16)VREG_S(10, 4), (UINT16)VREG_S(10, 5), (UINT16)VREG_S(10, 6), (UINT16)VREG_S(10, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(10, 0), (uint16_t)VREG_S(10, 1), (uint16_t)VREG_S(10, 2), (uint16_t)VREG_S(10, 3), (uint16_t)VREG_S(10, 4), (uint16_t)VREG_S(10, 5), (uint16_t)VREG_S(10, 6), (uint16_t)VREG_S(10, 7));
break;
case RSP_V11:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(11, 0), (UINT16)VREG_S(11, 1), (UINT16)VREG_S(11, 2), (UINT16)VREG_S(11, 3), (UINT16)VREG_S(11, 4), (UINT16)VREG_S(11, 5), (UINT16)VREG_S(11, 6), (UINT16)VREG_S(11, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(11, 0), (uint16_t)VREG_S(11, 1), (uint16_t)VREG_S(11, 2), (uint16_t)VREG_S(11, 3), (uint16_t)VREG_S(11, 4), (uint16_t)VREG_S(11, 5), (uint16_t)VREG_S(11, 6), (uint16_t)VREG_S(11, 7));
break;
case RSP_V12:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(12, 0), (UINT16)VREG_S(12, 1), (UINT16)VREG_S(12, 2), (UINT16)VREG_S(12, 3), (UINT16)VREG_S(12, 4), (UINT16)VREG_S(12, 5), (UINT16)VREG_S(12, 6), (UINT16)VREG_S(12, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(12, 0), (uint16_t)VREG_S(12, 1), (uint16_t)VREG_S(12, 2), (uint16_t)VREG_S(12, 3), (uint16_t)VREG_S(12, 4), (uint16_t)VREG_S(12, 5), (uint16_t)VREG_S(12, 6), (uint16_t)VREG_S(12, 7));
break;
case RSP_V13:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(13, 0), (UINT16)VREG_S(13, 1), (UINT16)VREG_S(13, 2), (UINT16)VREG_S(13, 3), (UINT16)VREG_S(13, 4), (UINT16)VREG_S(13, 5), (UINT16)VREG_S(13, 6), (UINT16)VREG_S(13, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(13, 0), (uint16_t)VREG_S(13, 1), (uint16_t)VREG_S(13, 2), (uint16_t)VREG_S(13, 3), (uint16_t)VREG_S(13, 4), (uint16_t)VREG_S(13, 5), (uint16_t)VREG_S(13, 6), (uint16_t)VREG_S(13, 7));
break;
case RSP_V14:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(14, 0), (UINT16)VREG_S(14, 1), (UINT16)VREG_S(14, 2), (UINT16)VREG_S(14, 3), (UINT16)VREG_S(14, 4), (UINT16)VREG_S(14, 5), (UINT16)VREG_S(14, 6), (UINT16)VREG_S(14, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(14, 0), (uint16_t)VREG_S(14, 1), (uint16_t)VREG_S(14, 2), (uint16_t)VREG_S(14, 3), (uint16_t)VREG_S(14, 4), (uint16_t)VREG_S(14, 5), (uint16_t)VREG_S(14, 6), (uint16_t)VREG_S(14, 7));
break;
case RSP_V15:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(15, 0), (UINT16)VREG_S(15, 1), (UINT16)VREG_S(15, 2), (UINT16)VREG_S(15, 3), (UINT16)VREG_S(15, 4), (UINT16)VREG_S(15, 5), (UINT16)VREG_S(15, 6), (UINT16)VREG_S(15, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(15, 0), (uint16_t)VREG_S(15, 1), (uint16_t)VREG_S(15, 2), (uint16_t)VREG_S(15, 3), (uint16_t)VREG_S(15, 4), (uint16_t)VREG_S(15, 5), (uint16_t)VREG_S(15, 6), (uint16_t)VREG_S(15, 7));
break;
case RSP_V16:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(16, 0), (UINT16)VREG_S(16, 1), (UINT16)VREG_S(16, 2), (UINT16)VREG_S(16, 3), (UINT16)VREG_S(16, 4), (UINT16)VREG_S(16, 5), (UINT16)VREG_S(16, 6), (UINT16)VREG_S(16, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(16, 0), (uint16_t)VREG_S(16, 1), (uint16_t)VREG_S(16, 2), (uint16_t)VREG_S(16, 3), (uint16_t)VREG_S(16, 4), (uint16_t)VREG_S(16, 5), (uint16_t)VREG_S(16, 6), (uint16_t)VREG_S(16, 7));
break;
case RSP_V17:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(17, 0), (UINT16)VREG_S(17, 1), (UINT16)VREG_S(17, 2), (UINT16)VREG_S(17, 3), (UINT16)VREG_S(17, 4), (UINT16)VREG_S(17, 5), (UINT16)VREG_S(17, 6), (UINT16)VREG_S(17, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(17, 0), (uint16_t)VREG_S(17, 1), (uint16_t)VREG_S(17, 2), (uint16_t)VREG_S(17, 3), (uint16_t)VREG_S(17, 4), (uint16_t)VREG_S(17, 5), (uint16_t)VREG_S(17, 6), (uint16_t)VREG_S(17, 7));
break;
case RSP_V18:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(18, 0), (UINT16)VREG_S(18, 1), (UINT16)VREG_S(18, 2), (UINT16)VREG_S(18, 3), (UINT16)VREG_S(18, 4), (UINT16)VREG_S(18, 5), (UINT16)VREG_S(18, 6), (UINT16)VREG_S(18, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(18, 0), (uint16_t)VREG_S(18, 1), (uint16_t)VREG_S(18, 2), (uint16_t)VREG_S(18, 3), (uint16_t)VREG_S(18, 4), (uint16_t)VREG_S(18, 5), (uint16_t)VREG_S(18, 6), (uint16_t)VREG_S(18, 7));
break;
case RSP_V19:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(19, 0), (UINT16)VREG_S(19, 1), (UINT16)VREG_S(19, 2), (UINT16)VREG_S(19, 3), (UINT16)VREG_S(19, 4), (UINT16)VREG_S(19, 5), (UINT16)VREG_S(19, 6), (UINT16)VREG_S(19, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(19, 0), (uint16_t)VREG_S(19, 1), (uint16_t)VREG_S(19, 2), (uint16_t)VREG_S(19, 3), (uint16_t)VREG_S(19, 4), (uint16_t)VREG_S(19, 5), (uint16_t)VREG_S(19, 6), (uint16_t)VREG_S(19, 7));
break;
case RSP_V20:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(20, 0), (UINT16)VREG_S(20, 1), (UINT16)VREG_S(20, 2), (UINT16)VREG_S(20, 3), (UINT16)VREG_S(20, 4), (UINT16)VREG_S(20, 5), (UINT16)VREG_S(20, 6), (UINT16)VREG_S(20, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(20, 0), (uint16_t)VREG_S(20, 1), (uint16_t)VREG_S(20, 2), (uint16_t)VREG_S(20, 3), (uint16_t)VREG_S(20, 4), (uint16_t)VREG_S(20, 5), (uint16_t)VREG_S(20, 6), (uint16_t)VREG_S(20, 7));
break;
case RSP_V21:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(21, 0), (UINT16)VREG_S(21, 1), (UINT16)VREG_S(21, 2), (UINT16)VREG_S(21, 3), (UINT16)VREG_S(21, 4), (UINT16)VREG_S(21, 5), (UINT16)VREG_S(21, 6), (UINT16)VREG_S(21, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(21, 0), (uint16_t)VREG_S(21, 1), (uint16_t)VREG_S(21, 2), (uint16_t)VREG_S(21, 3), (uint16_t)VREG_S(21, 4), (uint16_t)VREG_S(21, 5), (uint16_t)VREG_S(21, 6), (uint16_t)VREG_S(21, 7));
break;
case RSP_V22:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(22, 0), (UINT16)VREG_S(22, 1), (UINT16)VREG_S(22, 2), (UINT16)VREG_S(22, 3), (UINT16)VREG_S(22, 4), (UINT16)VREG_S(22, 5), (UINT16)VREG_S(22, 6), (UINT16)VREG_S(22, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(22, 0), (uint16_t)VREG_S(22, 1), (uint16_t)VREG_S(22, 2), (uint16_t)VREG_S(22, 3), (uint16_t)VREG_S(22, 4), (uint16_t)VREG_S(22, 5), (uint16_t)VREG_S(22, 6), (uint16_t)VREG_S(22, 7));
break;
case RSP_V23:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(23, 0), (UINT16)VREG_S(23, 1), (UINT16)VREG_S(23, 2), (UINT16)VREG_S(23, 3), (UINT16)VREG_S(23, 4), (UINT16)VREG_S(23, 5), (UINT16)VREG_S(23, 6), (UINT16)VREG_S(23, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(23, 0), (uint16_t)VREG_S(23, 1), (uint16_t)VREG_S(23, 2), (uint16_t)VREG_S(23, 3), (uint16_t)VREG_S(23, 4), (uint16_t)VREG_S(23, 5), (uint16_t)VREG_S(23, 6), (uint16_t)VREG_S(23, 7));
break;
case RSP_V24:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(24, 0), (UINT16)VREG_S(24, 1), (UINT16)VREG_S(24, 2), (UINT16)VREG_S(24, 3), (UINT16)VREG_S(24, 4), (UINT16)VREG_S(24, 5), (UINT16)VREG_S(24, 6), (UINT16)VREG_S(24, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(24, 0), (uint16_t)VREG_S(24, 1), (uint16_t)VREG_S(24, 2), (uint16_t)VREG_S(24, 3), (uint16_t)VREG_S(24, 4), (uint16_t)VREG_S(24, 5), (uint16_t)VREG_S(24, 6), (uint16_t)VREG_S(24, 7));
break;
case RSP_V25:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(25, 0), (UINT16)VREG_S(25, 1), (UINT16)VREG_S(25, 2), (UINT16)VREG_S(25, 3), (UINT16)VREG_S(25, 4), (UINT16)VREG_S(25, 5), (UINT16)VREG_S(25, 6), (UINT16)VREG_S(25, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(25, 0), (uint16_t)VREG_S(25, 1), (uint16_t)VREG_S(25, 2), (uint16_t)VREG_S(25, 3), (uint16_t)VREG_S(25, 4), (uint16_t)VREG_S(25, 5), (uint16_t)VREG_S(25, 6), (uint16_t)VREG_S(25, 7));
break;
case RSP_V26:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(26, 0), (UINT16)VREG_S(26, 1), (UINT16)VREG_S(26, 2), (UINT16)VREG_S(26, 3), (UINT16)VREG_S(26, 4), (UINT16)VREG_S(26, 5), (UINT16)VREG_S(26, 6), (UINT16)VREG_S(26, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(26, 0), (uint16_t)VREG_S(26, 1), (uint16_t)VREG_S(26, 2), (uint16_t)VREG_S(26, 3), (uint16_t)VREG_S(26, 4), (uint16_t)VREG_S(26, 5), (uint16_t)VREG_S(26, 6), (uint16_t)VREG_S(26, 7));
break;
case RSP_V27:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(27, 0), (UINT16)VREG_S(27, 1), (UINT16)VREG_S(27, 2), (UINT16)VREG_S(27, 3), (UINT16)VREG_S(27, 4), (UINT16)VREG_S(27, 5), (UINT16)VREG_S(27, 6), (UINT16)VREG_S(27, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(27, 0), (uint16_t)VREG_S(27, 1), (uint16_t)VREG_S(27, 2), (uint16_t)VREG_S(27, 3), (uint16_t)VREG_S(27, 4), (uint16_t)VREG_S(27, 5), (uint16_t)VREG_S(27, 6), (uint16_t)VREG_S(27, 7));
break;
case RSP_V28:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(28, 0), (UINT16)VREG_S(28, 1), (UINT16)VREG_S(28, 2), (UINT16)VREG_S(28, 3), (UINT16)VREG_S(28, 4), (UINT16)VREG_S(28, 5), (UINT16)VREG_S(28, 6), (UINT16)VREG_S(28, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(28, 0), (uint16_t)VREG_S(28, 1), (uint16_t)VREG_S(28, 2), (uint16_t)VREG_S(28, 3), (uint16_t)VREG_S(28, 4), (uint16_t)VREG_S(28, 5), (uint16_t)VREG_S(28, 6), (uint16_t)VREG_S(28, 7));
break;
case RSP_V29:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(29, 0), (UINT16)VREG_S(29, 1), (UINT16)VREG_S(29, 2), (UINT16)VREG_S(29, 3), (UINT16)VREG_S(29, 4), (UINT16)VREG_S(29, 5), (UINT16)VREG_S(29, 6), (UINT16)VREG_S(29, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(29, 0), (uint16_t)VREG_S(29, 1), (uint16_t)VREG_S(29, 2), (uint16_t)VREG_S(29, 3), (uint16_t)VREG_S(29, 4), (uint16_t)VREG_S(29, 5), (uint16_t)VREG_S(29, 6), (uint16_t)VREG_S(29, 7));
break;
case RSP_V30:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(30, 0), (UINT16)VREG_S(30, 1), (UINT16)VREG_S(30, 2), (UINT16)VREG_S(30, 3), (UINT16)VREG_S(30, 4), (UINT16)VREG_S(30, 5), (UINT16)VREG_S(30, 6), (UINT16)VREG_S(30, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(30, 0), (uint16_t)VREG_S(30, 1), (uint16_t)VREG_S(30, 2), (uint16_t)VREG_S(30, 3), (uint16_t)VREG_S(30, 4), (uint16_t)VREG_S(30, 5), (uint16_t)VREG_S(30, 6), (uint16_t)VREG_S(30, 7));
break;
case RSP_V31:
- str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (UINT16)VREG_S(31, 0), (UINT16)VREG_S(31, 1), (UINT16)VREG_S(31, 2), (UINT16)VREG_S(31, 3), (UINT16)VREG_S(31, 4), (UINT16)VREG_S(31, 5), (UINT16)VREG_S(31, 6), (UINT16)VREG_S(31, 7));
+ str = string_format("%04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X", (uint16_t)VREG_S(31, 0), (uint16_t)VREG_S(31, 1), (uint16_t)VREG_S(31, 2), (uint16_t)VREG_S(31, 3), (uint16_t)VREG_S(31, 4), (uint16_t)VREG_S(31, 5), (uint16_t)VREG_S(31, 6), (uint16_t)VREG_S(31, 7));
break;
}
}
@@ -266,9 +266,9 @@ void rsp_cop2_drc::state_string_export(const int index, std::string &str) const
void rsp_cop2_drc::lbv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
- UINT32 ea;
+ uint32_t ea;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -299,7 +299,7 @@ static void cfunc_lbv(void *param)
void rsp_cop2_drc::lsv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xe;
@@ -309,7 +309,7 @@ void rsp_cop2_drc::lsv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 2) : (offset * 2);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 2) : (offset * 2);
int end = index + 2;
for (int i = index; i < end; i++)
{
@@ -335,8 +335,8 @@ static void cfunc_lsv(void *param)
void rsp_cop2_drc::llv()
{
- UINT32 op = m_rspcop2_state->op;
- UINT32 ea;
+ uint32_t op = m_rspcop2_state->op;
+ uint32_t ea;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xc;
@@ -374,8 +374,8 @@ static void cfunc_llv(void *param)
void rsp_cop2_drc::ldv()
{
- UINT32 op = m_rspcop2_state->op;
- UINT32 ea;
+ uint32_t op = m_rspcop2_state->op;
+ uint32_t ea;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0x8;
@@ -413,7 +413,7 @@ static void cfunc_ldv(void *param)
void rsp_cop2_drc::lqv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int offset = (op & 0x7f);
@@ -422,7 +422,7 @@ void rsp_cop2_drc::lqv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
int end = 16 - (ea & 0xf);
if (end > 16) end = 16;
@@ -451,7 +451,7 @@ static void cfunc_lqv(void *param)
void rsp_cop2_drc::lrv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -461,7 +461,7 @@ void rsp_cop2_drc::lrv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
index = 16 - ((ea & 0xf) - index);
ea &= ~0xf;
@@ -490,7 +490,7 @@ static void cfunc_lrv(void *param)
void rsp_cop2_drc::lpv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -500,7 +500,7 @@ void rsp_cop2_drc::lpv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
for (int i = 0; i < 8; i++)
{
@@ -525,7 +525,7 @@ static void cfunc_lpv(void *param)
void rsp_cop2_drc::luv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -535,7 +535,7 @@ void rsp_cop2_drc::luv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
for (int i = 0; i < 8; i++)
{
@@ -560,7 +560,7 @@ static void cfunc_luv(void *param)
void rsp_cop2_drc::lhv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -570,7 +570,7 @@ void rsp_cop2_drc::lhv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
for (int i = 0; i < 8; i++)
{
@@ -594,7 +594,7 @@ static void cfunc_lhv(void *param)
void rsp_cop2_drc::lfv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -604,7 +604,7 @@ void rsp_cop2_drc::lfv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
// not sure what happens if 16-byte boundary is crossed...
@@ -635,7 +635,7 @@ static void cfunc_lfv(void *param)
void rsp_cop2_drc::lwv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -645,7 +645,7 @@ void rsp_cop2_drc::lwv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
int end = (16 - index) + 16;
for (int i = (16 - index); i < end; i++)
@@ -672,7 +672,7 @@ static void cfunc_lwv(void *param)
void rsp_cop2_drc::ltv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -689,7 +689,7 @@ void rsp_cop2_drc::ltv()
int element;
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
ea = ((ea + 8) & ~0xf) + (index & 1);
for (int i = vs; i < ve; i++)
@@ -709,7 +709,7 @@ static void cfunc_ltv(void *param)
int rsp_cop2_drc::generate_lwc2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
int offset = (op & 0x7f);
if (offset & 0x40)
{
@@ -799,7 +799,7 @@ int rsp_cop2_drc::generate_lwc2(drcuml_block *block, rsp_device::compiler_state
void rsp_cop2_drc::sbv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -809,7 +809,7 @@ void rsp_cop2_drc::sbv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + offset : offset;
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + offset : offset;
m_rsp.DM_WRITE8(ea, VREG_B(dest, index));
}
@@ -830,7 +830,7 @@ static void cfunc_sbv(void *param)
void rsp_cop2_drc::ssv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -840,7 +840,7 @@ void rsp_cop2_drc::ssv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 2) : (offset * 2);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 2) : (offset * 2);
int end = index + 2;
for (int i = index; i < end; i++)
@@ -867,7 +867,7 @@ static void cfunc_ssv(void *param)
void rsp_cop2_drc::slv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -877,7 +877,7 @@ void rsp_cop2_drc::slv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 4) : (offset * 4);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 4) : (offset * 4);
int end = index + 4;
for (int i = index; i < end; i++)
@@ -904,7 +904,7 @@ static void cfunc_slv(void *param)
void rsp_cop2_drc::sdv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0x8;
@@ -913,7 +913,7 @@ void rsp_cop2_drc::sdv()
{
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
int end = index + 8;
for (int i = index; i < end; i++)
@@ -940,7 +940,7 @@ static void cfunc_sdv(void *param)
void rsp_cop2_drc::sqv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -950,7 +950,7 @@ void rsp_cop2_drc::sqv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
int end = index + (16 - (ea & 0xf));
for (int i=index; i < end; i++)
{
@@ -976,7 +976,7 @@ static void cfunc_sqv(void *param)
void rsp_cop2_drc::srv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -986,7 +986,7 @@ void rsp_cop2_drc::srv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
int end = index + (ea & 0xf);
int o = (16 - (ea & 0xf)) & 0xf;
@@ -1016,7 +1016,7 @@ static void cfunc_srv(void *param)
void rsp_cop2_drc::spv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -1026,7 +1026,7 @@ void rsp_cop2_drc::spv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
int end = index + 8;
for (int i=index; i < end; i++)
{
@@ -1059,7 +1059,7 @@ static void cfunc_spv(void *param)
void rsp_cop2_drc::suv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -1069,7 +1069,7 @@ void rsp_cop2_drc::suv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 8) : (offset * 8);
int end = index + 8;
for (int i=index; i < end; i++)
{
@@ -1102,7 +1102,7 @@ static void cfunc_suv(void *param)
void rsp_cop2_drc::shv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -1112,11 +1112,11 @@ void rsp_cop2_drc::shv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
for (int i=0; i < 8; i++)
{
int element = index + (i << 1);
- UINT8 d = (VREG_B(dest, (element & 0xf)) << 1) |
+ uint8_t d = (VREG_B(dest, (element & 0xf)) << 1) |
(VREG_B(dest, ((element + 1) & 0xf)) >> 7);
m_rsp.DM_WRITE8(ea, d);
ea += 2;
@@ -1140,7 +1140,7 @@ static void cfunc_shv(void *param)
void rsp_cop2_drc::sfv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -1150,7 +1150,7 @@ void rsp_cop2_drc::sfv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
int eaoffset = ea & 0xf;
ea &= ~0xf;
@@ -1181,7 +1181,7 @@ static void cfunc_sfv(void *param)
void rsp_cop2_drc::swv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -1191,7 +1191,7 @@ void rsp_cop2_drc::swv()
offset |= 0xffffffc0;
}
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
int eaoffset = ea & 0xf;
ea &= ~0xf;
@@ -1220,7 +1220,7 @@ static void cfunc_swv(void *param)
void rsp_cop2_drc::stv()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int dest = (op >> 16) & 0x1f;
int base = (op >> 21) & 0x1f;
int index = (op >> 7) & 0xf;
@@ -1240,7 +1240,7 @@ void rsp_cop2_drc::stv()
int element = 8 - (index >> 1);
- UINT32 ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
+ uint32_t ea = (base) ? m_rsp.m_rsp_state->r[base] + (offset * 16) : (offset * 16);
int eaoffset = (ea & 0xf) + (element * 2);
ea &= ~0xf;
@@ -1259,7 +1259,7 @@ static void cfunc_stv(void *param)
int rsp_cop2_drc::generate_swc2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
int offset = (op & 0x7f);
if (offset & 0x40)
{
@@ -1356,11 +1356,11 @@ void rsp_cop2_drc::vmulf()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
if (s1 == -32768 && s2 == -32768)
{
@@ -1370,7 +1370,7 @@ void rsp_cop2_drc::vmulf()
}
else
{
- ACCUM(i) = (INT64)(s1 * s2 * 2 + 0x8000) << 16; // rounding?
+ ACCUM(i) = (int64_t)(s1 * s2 * 2 + 0x8000) << 16; // rounding?
m_vres[i] = ACCUM_M(i);
}
}
@@ -1397,13 +1397,13 @@ void rsp_cop2_drc::vmulu()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
- INT64 r = s1 * s2 * 2 + 0x8000; // rounding?
+ int64_t r = s1 * s2 * 2 + 0x8000; // rounding?
ACCUM(i) = r << 16;
@@ -1411,7 +1411,7 @@ void rsp_cop2_drc::vmulu()
{
m_vres[i] = 0;
}
- else if (((INT16)(ACCUM_H(i)) ^ (INT16)(ACCUM_M(i))) < 0)
+ else if (((int16_t)(ACCUM_H(i)) ^ (int16_t)(ACCUM_M(i))) < 0)
{
m_vres[i] = -1;
}
@@ -1446,11 +1446,11 @@ void rsp_cop2_drc::vmudl()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- UINT32 s1 = (UINT32)(UINT16)w1;
- UINT32 s2 = (UINT32)(UINT16)w2;
+ uint32_t s1 = (uint32_t)(uint16_t)w1;
+ uint32_t s2 = (uint32_t)(uint16_t)w2;
ACCUM(i) = s1 * s2;
@@ -1482,13 +1482,13 @@ void rsp_cop2_drc::vmudm()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (UINT16)w2;
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (uint16_t)w2;
- ACCUM(i) = (INT64)(s1 * s2) << 16;
+ ACCUM(i) = (int64_t)(s1 * s2) << 16;
m_vres[i] = ACCUM_M(i);
}
@@ -1518,17 +1518,17 @@ void rsp_cop2_drc::vmudn()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (UINT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ int32_t s1 = (uint16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
- INT32 r = s1 * s2;
+ int32_t r = s1 * s2;
- ACCUM(i) = (INT64)(s1 * s2) << 16;
+ ACCUM(i) = (int64_t)(s1 * s2) << 16;
- m_vres[i] = (UINT16)(r);
+ m_vres[i] = (uint16_t)(r);
}
WRITEBACK_RESULT();
}
@@ -1556,19 +1556,19 @@ void rsp_cop2_drc::vmudh()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
- INT32 r = s1 * s2;
+ int32_t r = s1 * s2;
- ACCUM(i) = (INT64)r << 32;
+ ACCUM(i) = (int64_t)r << 32;
if (r < -32768) r = -32768;
if (r > 32767) r = 32767;
- m_vres[i] = (INT16)(r);
+ m_vres[i] = (int16_t)(r);
}
WRITEBACK_RESULT();
}
@@ -1593,13 +1593,13 @@ void rsp_cop2_drc::vmacf()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
- ACCUM(i) += (INT64)(s1 * s2 * 2) << 16;
+ ACCUM(i) += (int64_t)(s1 * s2 * 2) << 16;
m_vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
}
@@ -1626,15 +1626,15 @@ void rsp_cop2_drc::vmacu()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
- ACCUM(i) += (INT64)(s1 * s2 * 2) << 16;
+ ACCUM(i) += (int64_t)(s1 * s2 * 2) << 16;
- if ((INT16)ACCUM_H(i) < 0)
+ if ((int16_t)ACCUM_H(i) < 0)
{
m_vres[i] = 0;
}
@@ -1642,13 +1642,13 @@ void rsp_cop2_drc::vmacu()
{
if (ACCUM_H(i) != 0)
{
- m_vres[i] = (INT16)0xffff;
+ m_vres[i] = (int16_t)0xffff;
}
else
{
- if ((INT16)ACCUM_M(i) < 0)
+ if ((int16_t)ACCUM_M(i) < 0)
{
- m_vres[i] = (INT16)0xffff;
+ m_vres[i] = (int16_t)0xffff;
}
else
{
@@ -1683,11 +1683,11 @@ void rsp_cop2_drc::vmadl()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- UINT32 s1 = w1;
- UINT32 s2 = w2;
+ uint32_t s1 = w1;
+ uint32_t s2 = w2;
ACCUM(i) += (s1 * s2) & 0xffff0000;
@@ -1711,13 +1711,13 @@ void rsp_cop2_drc::vmadm()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- UINT32 s1 = (INT32)(INT16)w1;
- UINT32 s2 = (UINT16)w2;
+ uint32_t s1 = (int32_t)(int16_t)w1;
+ uint32_t s2 = (uint16_t)w2;
- ACCUM(i) += (INT64)(INT32)(s1 * s2) << 16;
+ ACCUM(i) += (int64_t)(int32_t)(s1 * s2) << 16;
m_vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
}
@@ -1739,13 +1739,13 @@ void rsp_cop2_drc::vmadn()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (UINT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ int32_t s1 = (uint16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
- ACCUM(i) += (INT64)(s1 * s2) << 16;
+ ACCUM(i) += (int64_t)(s1 * s2) << 16;
m_vres[i] = SATURATE_ACCUM(i, 0, 0x0000, 0xffff);
}
@@ -1775,13 +1775,13 @@ void rsp_cop2_drc::vmadh()
for (int i = 0; i < 8; i++)
{
- INT16 w1, w2;
+ int16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
- ACCUM(i) += (INT64)(s1 * s2) << 32;
+ ACCUM(i) += (int64_t)(s1 * s2) << 32;
m_vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
}
@@ -1808,18 +1808,18 @@ void rsp_cop2_drc::vadd()
for (int i = 0; i < 8; i++)
{
- INT16 w1, w2;
+ int16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
- INT32 r = s1 + s2 + (((CARRY_FLAG(i)) != 0) ? 1 : 0);
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
+ int32_t r = s1 + s2 + (((CARRY_FLAG(i)) != 0) ? 1 : 0);
- SET_ACCUM_L((INT16)(r), i);
+ SET_ACCUM_L((int16_t)(r), i);
if (r > 32767) r = 32767;
if (r < -32768) r = -32768;
- m_vres[i] = (INT16)(r);
+ m_vres[i] = (int16_t)(r);
}
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
@@ -1848,19 +1848,19 @@ void rsp_cop2_drc::vsub()
for (int i = 0; i < 8; i++)
{
- INT16 w1, w2;
+ int16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (INT32)(INT16)w1;
- INT32 s2 = (INT32)(INT16)w2;
- INT32 r = s1 - s2 - (((CARRY_FLAG(i)) != 0) ? 1 : 0);
+ int32_t s1 = (int32_t)(int16_t)w1;
+ int32_t s2 = (int32_t)(int16_t)w2;
+ int32_t r = s1 - s2 - (((CARRY_FLAG(i)) != 0) ? 1 : 0);
- SET_ACCUM_L((INT16)(r), i);
+ SET_ACCUM_L((int16_t)(r), i);
if (r > 32767) r = 32767;
if (r < -32768) r = -32768;
- m_vres[i] = (INT16)(r);
+ m_vres[i] = (int16_t)(r);
}
CLEAR_ZERO_FLAGS();
CLEAR_CARRY_FLAGS();
@@ -1888,7 +1888,7 @@ void rsp_cop2_drc::vabs()
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
@@ -1942,15 +1942,15 @@ void rsp_cop2_drc::vaddc()
for (int i = 0; i < 8; i++)
{
- INT16 w1, w2;
+ int16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (UINT32)(UINT16)w1;
- INT32 s2 = (UINT32)(UINT16)w2;
- INT32 r = s1 + s2;
+ int32_t s1 = (uint32_t)(uint16_t)w1;
+ int32_t s2 = (uint32_t)(uint16_t)w2;
+ int32_t r = s1 + s2;
- m_vres[i] = (INT16)(r);
- SET_ACCUM_L((INT16)r, i);
+ m_vres[i] = (int16_t)(r);
+ SET_ACCUM_L((int16_t)r, i);
if (r & 0xffff0000)
{
@@ -1985,17 +1985,17 @@ void rsp_cop2_drc::vsubc()
for (int i = 0; i < 8; i++)
{
- INT16 w1, w2;
+ int16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- INT32 s1 = (UINT32)(UINT16)w1;
- INT32 s2 = (UINT32)(UINT16)w2;
- INT32 r = s1 - s2;
+ int32_t s1 = (uint32_t)(uint16_t)w1;
+ int32_t s2 = (uint32_t)(uint16_t)w2;
+ int32_t r = s1 - s2;
- m_vres[i] = (INT16)(r);
- SET_ACCUM_L((UINT16)r, i);
+ m_vres[i] = (int16_t)(r);
+ SET_ACCUM_L((uint16_t)r, i);
- if ((UINT16)(r) != 0)
+ if ((uint16_t)(r) != 0)
{
SET_ZERO_FLAG(i);
}
@@ -2029,17 +2029,17 @@ void rsp_cop2_drc::vaddb()
for (int i = 0; i < 8; i++)
{
- UINT16 w1, w2;
+ uint16_t w1, w2;
GET_VS1(w1, i);
GET_VS2(w2, i);
- UINT8 hb1 = w1 >> 8;
- UINT8 lb1 = w1 & 0xff;
- UINT8 hb2 = w2 >> 8;
- UINT8 lb2 = w2 & 0xff;
+ uint8_t hb1 = w1 >> 8;
+ uint8_t lb1 = w1 & 0xff;
+ uint8_t hb2 = w2 >> 8;
+ uint8_t lb2 = w2 & 0xff;
- UINT16 hs = hb1 + hb2 + round;
- UINT16 ls = lb1 + lb2 + round;
+ uint16_t hs = hb1 + hb2 + round;
+ uint16_t ls = lb1 + lb2 + round;
SET_ACCUM_L((hs << 8) | ls, i);
@@ -2137,7 +2137,7 @@ void rsp_cop2_drc::vlt()
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
@@ -2195,7 +2195,7 @@ void rsp_cop2_drc::veq()
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
@@ -2242,7 +2242,7 @@ void rsp_cop2_drc::vne()
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
@@ -2289,7 +2289,7 @@ void rsp_cop2_drc::vge()
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
if ((s1 == s2 && (ZERO_FLAG(i) == 0 || CARRY_FLAG(i) == 0)) || s1 > s2)
@@ -2331,7 +2331,7 @@ void rsp_cop2_drc::vcl()
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
@@ -2341,7 +2341,7 @@ void rsp_cop2_drc::vcl()
{
if (COMPARE_FLAG(i) != 0)
{
- SET_ACCUM_L(-(UINT16)s2, i);
+ SET_ACCUM_L(-(uint16_t)s2, i);
}
else
{
@@ -2352,27 +2352,27 @@ void rsp_cop2_drc::vcl()
{
if (CLIP1_FLAG(i) != 0)
{
- if (((UINT32)(UINT16)(s1) + (UINT32)(UINT16)(s2)) > 0x10000)
+ if (((uint32_t)(uint16_t)(s1) + (uint32_t)(uint16_t)(s2)) > 0x10000)
{
SET_ACCUM_L(s1, i);
CLEAR_COMPARE_FLAG(i);
}
else
{
- SET_ACCUM_L(-((UINT16)s2), i);
+ SET_ACCUM_L(-((uint16_t)s2), i);
SET_COMPARE_FLAG(i);
}
}
else
{
- if (((UINT32)(UINT16)(s1) + (UINT32)(UINT16)(s2)) != 0)
+ if (((uint32_t)(uint16_t)(s1) + (uint32_t)(uint16_t)(s2)) != 0)
{
SET_ACCUM_L(s1, i);
CLEAR_COMPARE_FLAG(i);
}
else
{
- SET_ACCUM_L(-((UINT16)s2), i);
+ SET_ACCUM_L(-((uint16_t)s2), i);
SET_COMPARE_FLAG(i);
}
}
@@ -2393,7 +2393,7 @@ void rsp_cop2_drc::vcl()
}
else
{
- if (((INT32)(UINT16)s1 - (INT32)(UINT16)s2) >= 0)
+ if (((int32_t)(uint16_t)s1 - (int32_t)(uint16_t)s2) >= 0)
{
SET_ACCUM_L(s2, i);
SET_CLIP2_FLAG(i);
@@ -2438,10 +2438,10 @@ void rsp_cop2_drc::vch()
CLEAR_ZERO_FLAGS();
CLEAR_CLIP2_FLAGS();
- UINT32 vce;
+ uint32_t vce;
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
@@ -2457,7 +2457,7 @@ void rsp_cop2_drc::vch()
if ((s1 + s2) <= 0)
{
SET_COMPARE_FLAG(i);
- m_vres[i] = -((UINT16)s2);
+ m_vres[i] = -((uint16_t)s2);
}
else
{
@@ -2527,11 +2527,11 @@ void rsp_cop2_drc::vcr()
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
- if ((INT16)(s1 ^ s2) < 0)
+ if ((int16_t)(s1 ^ s2) < 0)
{
if (s2 < 0)
{
@@ -2539,7 +2539,7 @@ void rsp_cop2_drc::vcr()
}
if ((s1 + s2) <= 0)
{
- SET_ACCUM_L(~((UINT16)s2), i);
+ SET_ACCUM_L(~((uint16_t)s2), i);
SET_COMPARE_FLAG(i);
}
else
@@ -2590,7 +2590,7 @@ void rsp_cop2_drc::vmrg()
for (int i = 0; i < 8; i++)
{
- INT16 s1, s2;
+ int16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
if (COMPARE_FLAG(i) != 0)
@@ -2628,7 +2628,7 @@ void rsp_cop2_drc::vand()
for (int i = 0; i < 8; i++)
{
- UINT16 s1, s2;
+ uint16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
m_vres[i] = s1 & s2;
@@ -2658,7 +2658,7 @@ void rsp_cop2_drc::vnand()
for (int i = 0; i < 8; i++)
{
- UINT16 s1, s2;
+ uint16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
m_vres[i] = ~((s1 & s2));
@@ -2688,7 +2688,7 @@ void rsp_cop2_drc::vor()
for (int i = 0; i < 8; i++)
{
- UINT16 s1, s2;
+ uint16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
m_vres[i] = s1 | s2;
@@ -2718,7 +2718,7 @@ void rsp_cop2_drc::vnor()
for (int i = 0; i < 8; i++)
{
- UINT16 s1, s2;
+ uint16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
m_vres[i] = ~(s1 | s2);
@@ -2748,7 +2748,7 @@ void rsp_cop2_drc::vxor()
for (int i = 0; i < 8; i++)
{
- UINT16 s1, s2;
+ uint16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
m_vres[i] = s1 ^ s2;
@@ -2778,7 +2778,7 @@ void rsp_cop2_drc::vnxor()
for (int i = 0; i < 8; i++)
{
- UINT16 s1, s2;
+ uint16_t s1, s2;
GET_VS1(s1, i);
GET_VS2(s2, i);
m_vres[i] = ~(s1 ^ s2);
@@ -2806,9 +2806,9 @@ void rsp_cop2_drc::vrcp()
{
CACHE_VALUES();
- INT32 shifter = 0;
- INT32 rec = (INT16)(VREG_S(vs2reg, el & 7));
- INT32 datainput = (rec < 0) ? (-rec) : rec;
+ int32_t shifter = 0;
+ int32_t rec = (int16_t)(VREG_S(vs2reg, el & 7));
+ int32_t datainput = (rec < 0) ? (-rec) : rec;
if (datainput)
{
for (int i = 0; i < 32; i++)
@@ -2825,9 +2825,9 @@ void rsp_cop2_drc::vrcp()
shifter = 0x10;
}
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
+ int32_t address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ int32_t fetchval = rsp_divtable[address];
+ int32_t temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
if (rec < 0)
{
temp = ~temp;
@@ -2845,7 +2845,7 @@ void rsp_cop2_drc::vrcp()
m_reciprocal_res = rec;
m_dp_allowed = 0;
- W_VREG_S(vdreg, vs1reg & 7) = (UINT16)rec;
+ W_VREG_S(vdreg, vs1reg & 7) = (uint16_t)rec;
for (int i = 0; i < 8; i++)
{
SET_ACCUM_L(VREG_S(vs2reg, VEC_EL_2(el, i)), i);
@@ -2871,9 +2871,9 @@ void rsp_cop2_drc::vrcpl()
{
CACHE_VALUES();
- INT32 shifter = 0;
- INT32 rec = (INT16)VREG_S(vs2reg, el & 7);
- INT32 datainput = rec;
+ int32_t shifter = 0;
+ int32_t rec = (int16_t)VREG_S(vs2reg, el & 7);
+ int32_t datainput = rec;
if (m_dp_allowed)
{
@@ -2911,9 +2911,9 @@ void rsp_cop2_drc::vrcpl()
}
}
- UINT32 address = (datainput << shifter) >> 22;
- INT32 fetchval = rsp_divtable[address & 0x1ff];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
+ uint32_t address = (datainput << shifter) >> 22;
+ int32_t fetchval = rsp_divtable[address & 0x1ff];
+ int32_t temp = (0x40000000 | (fetchval << 14)) >> ((~shifter) & 0x1f);
temp ^= rec >> 31;
if (!rec)
@@ -2929,7 +2929,7 @@ void rsp_cop2_drc::vrcpl()
m_reciprocal_res = rec;
m_dp_allowed = 0;
- W_VREG_S(vdreg, vs1reg & 7) = (UINT16)rec;
+ W_VREG_S(vdreg, vs1reg & 7) = (uint16_t)rec;
for (int i = 0; i < 8; i++)
{
@@ -2964,7 +2964,7 @@ void rsp_cop2_drc::vrcph()
SET_ACCUM_L(VREG_S(vs2reg, VEC_EL_2(el, i)), i);
}
- W_VREG_S(vdreg, vs1reg & 7) = (INT16)(m_reciprocal_res >> 16);
+ W_VREG_S(vdreg, vs1reg & 7) = (int16_t)(m_reciprocal_res >> 16);
}
static void cfunc_vrcph(void *param)
@@ -3012,9 +3012,9 @@ void rsp_cop2_drc::vrsq()
{
CACHE_VALUES();
- INT32 shifter = 0;
- INT32 rec = (INT16)VREG_S(vs2reg, el & 7);
- INT32 datainput = (rec < 0) ? (-rec) : (rec);
+ int32_t shifter = 0;
+ int32_t rec = (int16_t)VREG_S(vs2reg, el & 7);
+ int32_t datainput = (rec < 0) ? (-rec) : (rec);
if (rec < 0)
{
@@ -3044,11 +3044,11 @@ void rsp_cop2_drc::vrsq()
shifter = 0;
}
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ int32_t address = ((datainput << shifter) & 0x7fc00000) >> 22;
address = ((address | 0x200) & 0x3fe) | (shifter & 1);
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
+ int32_t fetchval = rsp_divtable[address];
+ int32_t temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
if (rec < 0)
{
temp = ~temp;
@@ -3117,7 +3117,7 @@ void rsp_cop2_drc::vrsq()
}
rec = temp;
- W_VREG_S(vdreg, vs1reg & 7) = (UINT16)rec;
+ W_VREG_S(vdreg, vs1reg & 7) = (uint16_t)rec;
for (int i = 0; i < 8; i++)
{
SET_ACCUM_L(VREG_S(vs2reg, VEC_EL_2(el, i)), i);
@@ -3143,9 +3143,9 @@ void rsp_cop2_drc::vrsql()
{
CACHE_VALUES();
- INT32 shifter = 0;
- INT32 rec = (INT16)VREG_S(vs2reg, el & 7);
- INT32 datainput = rec;
+ int32_t shifter = 0;
+ int32_t rec = (int16_t)VREG_S(vs2reg, el & 7);
+ int32_t datainput = rec;
if (m_dp_allowed)
{
@@ -3183,11 +3183,11 @@ void rsp_cop2_drc::vrsql()
}
}
- INT32 address = ((datainput << shifter) & 0x7fc00000) >> 22;
+ int32_t address = ((datainput << shifter) & 0x7fc00000) >> 22;
address = ((address | 0x200) & 0x3fe) | (shifter & 1);
- INT32 fetchval = rsp_divtable[address];
- INT32 temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
+ int32_t fetchval = rsp_divtable[address];
+ int32_t temp = (0x40000000 | (fetchval << 14)) >> (((~shifter) & 0x1f) >> 1);
temp ^= rec >> 31;
if (!rec)
@@ -3203,7 +3203,7 @@ void rsp_cop2_drc::vrsql()
m_reciprocal_res = rec;
m_dp_allowed = 0;
- W_VREG_S(vdreg, vs1reg & 7) = (UINT16)(rec & 0xffff);
+ W_VREG_S(vdreg, vs1reg & 7) = (uint16_t)(rec & 0xffff);
for (int i = 0; i < 8; i++)
{
SET_ACCUM_L(VREG_S(vs2reg, VEC_EL_2(el, i)), i);
@@ -3237,7 +3237,7 @@ void rsp_cop2_drc::vrsqh()
SET_ACCUM_L(VREG_S(vs2reg, VEC_EL_2(el, i)), i);
}
- W_VREG_S(vdreg, vs1reg & 7) = (INT16)(m_reciprocal_res >> 16); // store high part
+ W_VREG_S(vdreg, vs1reg & 7) = (int16_t)(m_reciprocal_res >> 16); // store high part
}
static void cfunc_vrsqh(void *param)
@@ -3253,7 +3253,7 @@ static void cfunc_vrsqh(void *param)
int rsp_cop2_drc::generate_vector_opcode(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
// Opcode legend:
// E = VS2 element type
// S = VS1, Source vector 1
@@ -3495,12 +3495,12 @@ int rsp_cop2_drc::generate_vector_opcode(drcuml_block *block, rsp_device::compil
void rsp_cop2_drc::mfc2()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int el = (op >> 7) & 0xf;
- UINT16 b1 = VREG_B(VS1REG, (el+0) & 0xf);
- UINT16 b2 = VREG_B(VS1REG, (el+1) & 0xf);
- if (RTREG) RTVAL = (INT32)(INT16)((b1 << 8) | (b2));
+ uint16_t b1 = VREG_B(VS1REG, (el+0) & 0xf);
+ uint16_t b2 = VREG_B(VS1REG, (el+1) & 0xf);
+ if (RTREG) RTVAL = (int32_t)(int16_t)((b1 << 8) | (b2));
}
static void cfunc_mfc2(void *param)
@@ -3510,7 +3510,7 @@ static void cfunc_mfc2(void *param)
void rsp_cop2_drc::cfc2()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
if (RTREG)
{
switch(RDREG)
@@ -3575,7 +3575,7 @@ static void cfunc_cfc2(void *param)
void rsp_cop2_drc::mtc2()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
int el = (op >> 7) & 0xf;
VREG_B(VS1REG, (el+0) & 0xf) = (RTVAL >> 8) & 0xff;
VREG_B(VS1REG, (el+1) & 0xf) = (RTVAL >> 0) & 0xff;
@@ -3589,7 +3589,7 @@ static void cfunc_mtc2(void *param)
void rsp_cop2_drc::ctc2()
{
- UINT32 op = m_rspcop2_state->op;
+ uint32_t op = m_rspcop2_state->op;
switch(RDREG)
{
case 0:
@@ -3697,8 +3697,8 @@ static void cfunc_ctc2(void *param)
int rsp_cop2_drc::generate_cop2(drcuml_block *block, rsp_device::compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = RSREG;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = RSREG;
switch (opswitch)
{
diff --git a/src/devices/cpu/rsp/rspdiv.h b/src/devices/cpu/rsp/rspdiv.h
index 67e4afacd01..0a63fc4e3ee 100644
--- a/src/devices/cpu/rsp/rspdiv.h
+++ b/src/devices/cpu/rsp/rspdiv.h
@@ -1,6 +1,6 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
-static const UINT16 rsp_divtable[1024] =
+static const uint16_t rsp_divtable[1024] =
{
0xffff,
0xff00,
diff --git a/src/devices/cpu/rsp/rspdrc.cpp b/src/devices/cpu/rsp/rspdrc.cpp
index f6d15435b7f..9849c07a71f 100644
--- a/src/devices/cpu/rsp/rspdrc.cpp
+++ b/src/devices/cpu/rsp/rspdrc.cpp
@@ -31,7 +31,7 @@ using namespace uml;
CPU_DISASSEMBLE( rsp );
-extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
+extern offs_t rsp_dasm_one(char *buffer, offs_t pc, uint32_t op);
/***************************************************************************
CONSTANTS
@@ -64,7 +64,7 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
descriptor
-------------------------------------------------*/
-static inline UINT32 epc(const opcode_desc *desc)
+static inline uint32_t epc(const opcode_desc *desc)
{
return ((desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc) | 0x1000;
}
@@ -181,7 +181,7 @@ static void cfunc_write32(void *param)
rspdrc_set_options - configure DRC options
-------------------------------------------------*/
-void rsp_device::rspdrc_set_options(UINT32 options)
+void rsp_device::rspdrc_set_options(uint32_t options)
{
if (!allow_drc()) return;
m_drcoptions = options;
@@ -221,7 +221,7 @@ static void cfunc_get_cop0_reg(void *param)
inline void rsp_device::ccfunc_set_cop0_reg()
{
int reg = m_rsp_state->arg0;
- UINT32 data = m_rsp_state->arg1;
+ uint32_t data = m_rsp_state->arg1;
if (reg >= 0 && reg < 8)
{
@@ -374,7 +374,7 @@ void rsp_device::code_compile_block(offs_t pc)
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
const opcode_desc *curdesc;
- UINT32 nextpc;
+ uint32_t nextpc;
/* add a code log entry */
if (drcuml->logging())
@@ -458,7 +458,7 @@ void rsp_device::code_compile_block(offs_t pc)
inline void rsp_device::ccfunc_unimplemented()
{
- UINT32 opcode = m_rsp_state->arg0;
+ uint32_t opcode = m_rsp_state->arg0;
fatalerror("PC=%08X: Unimplemented op %08X (%02X,%02X)\n", m_rsp_state->pc, opcode, opcode >> 26, opcode & 0x3f);
}
@@ -667,7 +667,7 @@ void rsp_device::generate_checksum_block(drcuml_block *block, compiler_state *co
{
if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP))
{
- UINT32 sum = seqhead->opptr.l[0];
+ uint32_t sum = seqhead->opptr.l[0];
void *base = m_direct->read_ptr(seqhead->physpc | 0x1000);
UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
@@ -689,7 +689,7 @@ void rsp_device::generate_checksum_block(drcuml_block *block, compiler_state *co
/* full verification; sum up everything */
else
{
- UINT32 sum = 0;
+ uint32_t sum = 0;
void *base = m_direct->read_ptr(seqhead->physpc | 0x1000);
UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
sum += seqhead->opptr.l[0];
@@ -800,10 +800,10 @@ void rsp_device::generate_branch(drcuml_block *block, compiler_state *compiler,
generate_delay_slot_and_branch
------------------------------------------------------------------*/
-void rsp_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 linkreg)
+void rsp_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg)
{
compiler_state compiler_temp = *compiler;
- UINT32 op = desc->opptr.l[0];
+ uint32_t op = desc->opptr.l[0];
/* fetch the target register if dynamic, in case it is modified by the delay slot */
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
@@ -815,7 +815,7 @@ void rsp_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_st
/* set the link if needed -- before the delay slot */
if (linkreg != 0)
{
- UML_MOV(block, R32(linkreg), (INT32)(desc->pc + 8)); // mov <linkreg>,desc->pc + 8
+ UML_MOV(block, R32(linkreg), (int32_t)(desc->pc + 8)); // mov <linkreg>,desc->pc + 8
}
/* compile the delay slot using temporary compiler state */
@@ -835,8 +835,8 @@ void rsp_device::generate_delay_slot_and_branch(drcuml_block *block, compiler_st
int rsp_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = op >> 26;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = op >> 26;
code_label skip;
switch (opswitch)
@@ -1045,8 +1045,8 @@ int rsp_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
int rsp_device::generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = op & 63;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = op & 63;
//code_label skip;
switch (opswitch)
@@ -1140,7 +1140,7 @@ int rsp_device::generate_special(drcuml_block *block, compiler_state *compiler,
if (RDREG != 0)
{
UML_OR(block, I0, R32(RSREG), R32(RTREG)); // dor i0,<rsreg>,<rtreg>
- UML_XOR(block, R32(RDREG), I0, (UINT64)~0); // dxor <rdreg>,i0,~0
+ UML_XOR(block, R32(RDREG), I0, (uint64_t)~0); // dxor <rdreg>,i0,~0
}
return TRUE;
@@ -1200,8 +1200,8 @@ int rsp_device::generate_special(drcuml_block *block, compiler_state *compiler,
int rsp_device::generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = RTREG;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = RTREG;
code_label skip;
switch (opswitch)
@@ -1243,8 +1243,8 @@ int rsp_device::generate_regimm(drcuml_block *block, compiler_state *compiler, c
int rsp_device::generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT32 op = desc->opptr.l[0];
- UINT8 opswitch = RSREG;
+ uint32_t op = desc->opptr.l[0];
+ uint8_t opswitch = RSREG;
switch (opswitch)
{
@@ -1281,7 +1281,7 @@ int rsp_device::generate_cop0(drcuml_block *block, compiler_state *compiler, con
including disassembly of a RSP instruction
-------------------------------------------------*/
-void rsp_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op)
+void rsp_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
{
if (m_drcuml->logging())
{
diff --git a/src/devices/cpu/rsp/rspfe.cpp b/src/devices/cpu/rsp/rspfe.cpp
index 7a80fb6347b..c86ed6f5298 100644
--- a/src/devices/cpu/rsp/rspfe.cpp
+++ b/src/devices/cpu/rsp/rspfe.cpp
@@ -20,7 +20,7 @@
// rsp_frontend - constructor
//-------------------------------------------------
-rsp_frontend::rsp_frontend(rsp_device &rsp, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
+rsp_frontend::rsp_frontend(rsp_device &rsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
: drc_frontend(rsp, window_start, window_end, max_sequence),
m_rsp(rsp)
{
@@ -34,7 +34,7 @@ rsp_frontend::rsp_frontend(rsp_device &rsp, UINT32 window_start, UINT32 window_e
bool rsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
- UINT32 op, opswitch;
+ uint32_t op, opswitch;
// fetch the opcode
op = desc.opptr.l[0] = m_rsp.m_direct->read_dword(desc.physpc | 0x1000);
@@ -157,7 +157,7 @@ bool rsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
// single instruction in the 'special' group
//-------------------------------------------------
-bool rsp_frontend::describe_special(UINT32 op, opcode_desc &desc)
+bool rsp_frontend::describe_special(uint32_t op, opcode_desc &desc)
{
switch (op & 63)
{
@@ -219,7 +219,7 @@ bool rsp_frontend::describe_special(UINT32 op, opcode_desc &desc)
// single instruction in the 'regimm' group
//-------------------------------------------------
-bool rsp_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
+bool rsp_frontend::describe_regimm(uint32_t op, opcode_desc &desc)
{
switch (RTREG)
{
@@ -262,7 +262,7 @@ bool rsp_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
// single instruction in the COP0 group
//-------------------------------------------------
-bool rsp_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
+bool rsp_frontend::describe_cop0(uint32_t op, opcode_desc &desc)
{
switch (RSREG)
{
@@ -287,7 +287,7 @@ bool rsp_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
// single instruction in the COP2 group
//-------------------------------------------------
-bool rsp_frontend::describe_cop2(UINT32 op, opcode_desc &desc)
+bool rsp_frontend::describe_cop2(uint32_t op, opcode_desc &desc)
{
switch (RSREG)
{
diff --git a/src/devices/cpu/rsp/rspfe.h b/src/devices/cpu/rsp/rspfe.h
index 52f5a64243e..d292d9f4225 100644
--- a/src/devices/cpu/rsp/rspfe.h
+++ b/src/devices/cpu/rsp/rspfe.h
@@ -34,7 +34,7 @@ class rsp_frontend : public drc_frontend
{
public:
// construction/destruction
- rsp_frontend(rsp_device &rsp, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
+ rsp_frontend(rsp_device &rsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
protected:
// required overrides
@@ -42,10 +42,10 @@ protected:
private:
// internal helpers
- bool describe_special(UINT32 op, opcode_desc &desc);
- bool describe_regimm(UINT32 op, opcode_desc &desc);
- bool describe_cop0(UINT32 op, opcode_desc &desc);
- bool describe_cop2(UINT32 op, opcode_desc &desc);
+ bool describe_special(uint32_t op, opcode_desc &desc);
+ bool describe_regimm(uint32_t op, opcode_desc &desc);
+ bool describe_cop0(uint32_t op, opcode_desc &desc);
+ bool describe_cop2(uint32_t op, opcode_desc &desc);
// internal state
rsp_device &m_rsp;
diff --git a/src/devices/cpu/rsp/vand.h b/src/devices/cpu/rsp/vand.h
index 4349227fdd3..8f638330e2a 100644
--- a/src/devices/cpu/rsp/vand.h
+++ b/src/devices/cpu/rsp/vand.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vand_vnand(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt) {
+inline rsp_vec_t vec_vand_vnand(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt) {
rsp_vec_t vmask = _mm_load_si128((rsp_vec_t *) m_vec_helpers.logic_mask[iw & 0x1]);
rsp_vec_t vd = _mm_and_si128(vs, vt);
diff --git a/src/devices/cpu/rsp/vcmp.h b/src/devices/cpu/rsp/vcmp.h
index 7ae4dc4c444..7838322d26e 100644
--- a/src/devices/cpu/rsp/vcmp.h
+++ b/src/devices/cpu/rsp/vcmp.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_veq_vge_vlt_vne(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *le, rsp_vec_t eq, rsp_vec_t sign)
+inline rsp_vec_t vec_veq_vge_vlt_vne(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *le, rsp_vec_t eq, rsp_vec_t sign)
{
rsp_vec_t equal = _mm_cmpeq_epi16(vs, vt);
diff --git a/src/devices/cpu/rsp/vdivh.h b/src/devices/cpu/rsp/vdivh.h
index 286aa8a3ca7..5bd4093f6b4 100644
--- a/src/devices/cpu/rsp/vdivh.h
+++ b/src/devices/cpu/rsp/vdivh.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vdivh(UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
+inline rsp_vec_t vec_vdivh(uint32_t src, uint32_t e, uint32_t dest, uint32_t de)
{
// Get the element from VT.
m_div_in = m_v[src].s[e & 0x7];
diff --git a/src/devices/cpu/rsp/vldst.h b/src/devices/cpu/rsp/vldst.h
index 4a38af029d4..fadc8be63c0 100644
--- a/src/devices/cpu/rsp/vldst.h
+++ b/src/devices/cpu/rsp/vldst.h
@@ -2,14 +2,14 @@
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
// LBV, LDV, LLV, LSV, SBV, SDV, SLV, SSV
-inline void vec_lbdlsv_sbdlsv(UINT32 iw, UINT32 rs)
+inline void vec_lbdlsv_sbdlsv(uint32_t iw, uint32_t rs)
{
- const UINT32 shift_and_idx = (iw >> 11) & 0x3;
+ const uint32_t shift_and_idx = (iw >> 11) & 0x3;
rsp_vec_t dqm = _mm_loadl_epi64((rsp_vec_t *) (m_vec_helpers.bdls_lut[shift_and_idx]));
- const UINT32 addr = (rs + (sign_extend_6(iw) << shift_and_idx)) & 0xfff;
- const UINT32 element = (iw >> 7) & 0xf;
- UINT16* regp = m_v[(iw >> 16) & 0x1f].s;
+ const uint32_t addr = (rs + (sign_extend_6(iw) << shift_and_idx)) & 0xfff;
+ const uint32_t element = (iw >> 7) & 0xf;
+ uint16_t* regp = m_v[(iw >> 16) & 0x1f].s;
if (iw >> 29 & 0x1)
{
@@ -22,7 +22,7 @@ inline void vec_lbdlsv_sbdlsv(UINT32 iw, UINT32 rs)
}
// LPV, LUV, SPV, SUV
-inline void vec_lfhpuv_sfhpuv(UINT32 iw, UINT32 rs)
+inline void vec_lfhpuv_sfhpuv(uint32_t iw, uint32_t rs)
{
static const enum rsp_mem_request_type fhpu_type_lut[4] = {
RSP_MEM_REQUEST_PACK,
@@ -31,9 +31,9 @@ inline void vec_lfhpuv_sfhpuv(UINT32 iw, UINT32 rs)
RSP_MEM_REQUEST_FOURTH
};
- const UINT32 addr = (rs + (sign_extend_6(iw) << 3)) & 0xfff;
- const UINT32 element = (iw >> 7) & 0xf;
- UINT16* regp = m_v[(iw >> 16) & 0x1f].s;
+ const uint32_t addr = (rs + (sign_extend_6(iw) << 3)) & 0xfff;
+ const uint32_t element = (iw >> 7) & 0xf;
+ uint16_t* regp = m_v[(iw >> 16) & 0x1f].s;
rsp_mem_request_type request_type = fhpu_type_lut[((iw >> 11) & 0x1f) - 6];
if ((iw >> 29) & 0x1)
@@ -47,13 +47,13 @@ inline void vec_lfhpuv_sfhpuv(UINT32 iw, UINT32 rs)
}
// LQV, LRV, SQV, SRV
-inline void vec_lqrv_sqrv(UINT32 iw, UINT32 rs)
+inline void vec_lqrv_sqrv(uint32_t iw, uint32_t rs)
{
rs &= 0xfff;
- const UINT32 addr = rs + (sign_extend_6(iw) << 4);
- const UINT32 element = (iw >> 7) & 0xf;
- UINT16* regp = m_v[(iw >> 16) & 0x1f].s;
+ const uint32_t addr = rs + (sign_extend_6(iw) << 4);
+ const uint32_t element = (iw >> 7) & 0xf;
+ uint16_t* regp = m_v[(iw >> 16) & 0x1f].s;
memcpy(m_vdqm.s, m_vec_helpers.qr_lut[addr & 0xf], sizeof(m_vdqm.s));
diff --git a/src/devices/cpu/rsp/vmac.h b/src/devices/cpu/rsp/vmac.h
index ecf921a261c..ade43511daa 100644
--- a/src/devices/cpu/rsp/vmac.h
+++ b/src/devices/cpu/rsp/vmac.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vmacf_vmacu(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_mid, rsp_vec_t *acc_hi)
+inline rsp_vec_t vec_vmacf_vmacu(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_mid, rsp_vec_t *acc_hi)
{
// Get the product and shift it over
// being sure to save the carries.
diff --git a/src/devices/cpu/rsp/vmov.h b/src/devices/cpu/rsp/vmov.h
index 10a7b1df85f..59e02e8b118 100644
--- a/src/devices/cpu/rsp/vmov.h
+++ b/src/devices/cpu/rsp/vmov.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vmov(UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
+inline rsp_vec_t vec_vmov(uint32_t src, uint32_t e, uint32_t dest, uint32_t de)
{
// Get the element from VT and write out the upper part of the result.
m_v[dest].s[de & 0x7] = m_v[src].s[e & 0x7];
diff --git a/src/devices/cpu/rsp/vmul.h b/src/devices/cpu/rsp/vmul.h
index c8bfc1bbb14..dc09e81768a 100644
--- a/src/devices/cpu/rsp/vmul.h
+++ b/src/devices/cpu/rsp/vmul.h
@@ -5,7 +5,7 @@
// TODO: CHECK ME.
//
-inline rsp_vec_t vec_vmulf_vmulu(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
+inline rsp_vec_t vec_vmulf_vmulu(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
{
rsp_vec_t lo = _mm_mullo_epi16(vs, vt);
rsp_vec_t round = _mm_cmpeq_epi16(zero, zero);
diff --git a/src/devices/cpu/rsp/vmulh.h b/src/devices/cpu/rsp/vmulh.h
index aaccf9d41b3..6265961f5a0 100644
--- a/src/devices/cpu/rsp/vmulh.h
+++ b/src/devices/cpu/rsp/vmulh.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vmadh_vmudh(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
+inline rsp_vec_t vec_vmadh_vmudh(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
{
rsp_vec_t lo = _mm_mullo_epi16(vs, vt);
rsp_vec_t hi = _mm_mulhi_epi16(vs, vt);
diff --git a/src/devices/cpu/rsp/vmull.h b/src/devices/cpu/rsp/vmull.h
index 2052d537aa8..e54399b01da 100644
--- a/src/devices/cpu/rsp/vmull.h
+++ b/src/devices/cpu/rsp/vmull.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vmadl_vmudl(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
+inline rsp_vec_t vec_vmadl_vmudl(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
{
rsp_vec_t hi = _mm_mulhi_epu16(vs, vt);
diff --git a/src/devices/cpu/rsp/vmulm.h b/src/devices/cpu/rsp/vmulm.h
index 0319a2f6dcc..df76833ed0c 100644
--- a/src/devices/cpu/rsp/vmulm.h
+++ b/src/devices/cpu/rsp/vmulm.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vmadm_vmudm(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
+inline rsp_vec_t vec_vmadm_vmudm(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
{
rsp_vec_t lo = _mm_mullo_epi16(vs, vt);
rsp_vec_t hi = _mm_mulhi_epu16(vs, vt);
diff --git a/src/devices/cpu/rsp/vmuln.h b/src/devices/cpu/rsp/vmuln.h
index b9e012622fc..07453b631a8 100644
--- a/src/devices/cpu/rsp/vmuln.h
+++ b/src/devices/cpu/rsp/vmuln.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vmadn_vmudn(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
+inline rsp_vec_t vec_vmadn_vmudn(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt, rsp_vec_t zero, rsp_vec_t *acc_lo, rsp_vec_t *acc_md, rsp_vec_t *acc_hi)
{
rsp_vec_t lo = _mm_mullo_epi16(vs, vt);
rsp_vec_t hi = _mm_mulhi_epu16(vs, vt);
diff --git a/src/devices/cpu/rsp/vor.h b/src/devices/cpu/rsp/vor.h
index 9f946df7ca9..07cbb57164c 100644
--- a/src/devices/cpu/rsp/vor.h
+++ b/src/devices/cpu/rsp/vor.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vor_vnor(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt)
+inline rsp_vec_t vec_vor_vnor(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt)
{
rsp_vec_t vmask = _mm_load_si128((rsp_vec_t *) m_vec_helpers.logic_mask[iw & 0x1]);
diff --git a/src/devices/cpu/rsp/vrcpsq.h b/src/devices/cpu/rsp/vrcpsq.h
index 930d8237853..4897e536193 100644
--- a/src/devices/cpu/rsp/vrcpsq.h
+++ b/src/devices/cpu/rsp/vrcpsq.h
@@ -1,17 +1,17 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vrcp_vrsq(UINT32 iw, INT32 dp, UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
+inline rsp_vec_t vec_vrcp_vrsq(uint32_t iw, int32_t dp, uint32_t src, uint32_t e, uint32_t dest, uint32_t de)
{
// Get the element from VT.
- INT16 vt = m_v[src].s[e & 0x7];
+ int16_t vt = m_v[src].s[e & 0x7];
- UINT32 dp_input = ((UINT32) m_div_in << 16) | (UINT16) vt;
- UINT32 sp_input = vt;
+ uint32_t dp_input = ((uint32_t) m_div_in << 16) | (uint16_t) vt;
+ uint32_t sp_input = vt;
- INT32 input = (dp) ? dp_input : sp_input;
- INT32 input_mask = input >> 31;
- INT32 data = input ^ input_mask;
+ int32_t input = (dp) ? dp_input : sp_input;
+ int32_t input_mask = input >> 31;
+ int32_t data = input ^ input_mask;
if (input > -32768)
{
@@ -19,7 +19,7 @@ inline rsp_vec_t vec_vrcp_vrsq(UINT32 iw, INT32 dp, UINT32 src, UINT32 e, UINT32
}
// Handle edge cases.
- INT32 result;
+ int32_t result;
if (data == 0)
{
result = 0x7fffffff;
@@ -30,8 +30,8 @@ inline rsp_vec_t vec_vrcp_vrsq(UINT32 iw, INT32 dp, UINT32 src, UINT32 e, UINT32
}
else // Main case: compute the reciprocal.
{
- UINT32 shift = count_leading_zeros(data);
- UINT32 idx = (((UINT64) data << shift) & 0x7FC00000) >> 22;
+ uint32_t shift = count_leading_zeros(data);
+ uint32_t idx = (((uint64_t) data << shift) & 0x7FC00000) >> 22;
if (iw & 0x4) // VRSQ
{
diff --git a/src/devices/cpu/rsp/vrsq.h b/src/devices/cpu/rsp/vrsq.h
index f657bc42554..d4bdb190fec 100644
--- a/src/devices/cpu/rsp/vrsq.h
+++ b/src/devices/cpu/rsp/vrsq.h
@@ -1,17 +1,17 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-rsp_vec_t vec_vrsq(INT32 dp, UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
+rsp_vec_t vec_vrsq(int32_t dp, uint32_t src, uint32_t e, uint32_t dest, uint32_t de)
{
// Get the element from VT.
- INT16 vt = m_v[src].s[e & 0x7];
+ int16_t vt = m_v[src].s[e & 0x7];
- UINT32 dp_input = ((UINT32) m_div_in << 16) | (UINT16) vt;
- UINT32 sp_input = vt;
+ uint32_t dp_input = ((uint32_t) m_div_in << 16) | (uint16_t) vt;
+ uint32_t sp_input = vt;
- INT32 input = (dp) ? dp_input : sp_input;
- INT32 input_mask = input >> 31;
- INT32 data = input ^ input_mask;
+ int32_t input = (dp) ? dp_input : sp_input;
+ int32_t input_mask = input >> 31;
+ int32_t data = input ^ input_mask;
if (input > -32768)
{
@@ -19,7 +19,7 @@ rsp_vec_t vec_vrsq(INT32 dp, UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
}
// Handle edge cases.
- INT32 result;
+ int32_t result;
if (data == 0)
{
result = 0x7fffffff;
@@ -30,9 +30,9 @@ rsp_vec_t vec_vrsq(INT32 dp, UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
}
else // Main case: compute the reciprocal.
{
- UINT32 shift = count_leading_zeros(data);
+ uint32_t shift = count_leading_zeros(data);
- UINT32 idx = (((UINT64) data << shift) & 0x7fc00000) >> 22;
+ uint32_t idx = (((uint64_t) data << shift) & 0x7fc00000) >> 22;
idx = ((idx | 0x200) & 0x3fe) | (shift % 2);
result = rsp_divtable[idx];
@@ -47,9 +47,9 @@ rsp_vec_t vec_vrsq(INT32 dp, UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
return vec_load_unshuffled_operand(m_v[dest].s);
}
-rsp_vec_t vec_vrsqh(UINT32 src, UINT32 e, UINT32 dest, UINT32 de)
+rsp_vec_t vec_vrsqh(uint32_t src, uint32_t e, uint32_t dest, uint32_t de)
{
- INT16 elements[8];
+ int16_t elements[8];
// Get the element from VT.
memcpy(elements, &m_v[src], sizeof(rsp_vec_t));
diff --git a/src/devices/cpu/rsp/vxor.h b/src/devices/cpu/rsp/vxor.h
index b11e1b96bc1..9f7f62853c5 100644
--- a/src/devices/cpu/rsp/vxor.h
+++ b/src/devices/cpu/rsp/vxor.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Tyler J. Stachecki,Ryan Holtz
-inline rsp_vec_t vec_vxor_vnxor(UINT32 iw, rsp_vec_t vs, rsp_vec_t vt)
+inline rsp_vec_t vec_vxor_vnxor(uint32_t iw, rsp_vec_t vs, rsp_vec_t vt)
{
rsp_vec_t vmask = _mm_load_si128((rsp_vec_t *) m_vec_helpers.logic_mask[iw & 0x1]);
diff --git a/src/devices/cpu/s2650/2650dasm.cpp b/src/devices/cpu/s2650/2650dasm.cpp
index a7bd56d406d..9540224e39f 100644
--- a/src/devices/cpu/s2650/2650dasm.cpp
+++ b/src/devices/cpu/s2650/2650dasm.cpp
@@ -11,7 +11,7 @@
#include "emu.h"
-static const UINT8 *rambase;
+static const uint8_t *rambase;
static offs_t pcbase;
#define readarg(A) (rambase[(A) - pcbase])
@@ -223,7 +223,7 @@ static char *ADR(int pc)
/* disassemble one instruction at PC into buff. return byte size of instr */
CPU_DISASSEMBLE( s2650 )
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
int PC = pc;
int op = oprom[0];
int rv = op & 3;
diff --git a/src/devices/cpu/s2650/s2650.cpp b/src/devices/cpu/s2650/s2650.cpp
index 1071d896350..6844a1ee510 100644
--- a/src/devices/cpu/s2650/s2650.cpp
+++ b/src/devices/cpu/s2650/s2650.cpp
@@ -29,7 +29,7 @@
const device_type S2650 = &device_creator<s2650_device>;
-s2650_device::s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+s2650_device::s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, S2650, "S2650", tag, owner, clock, "s2650", __FILE__ )
, m_program_config("program", ENDIANNESS_LITTLE, 8, 15)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 9)
@@ -42,7 +42,7 @@ s2650_device::s2650_device(const machine_config &mconfig, const char *tag, devic
}
-offs_t s2650_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t s2650_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( s2650 );
return CPU_DISASSEMBLE_NAME(s2650)(this, buffer, pc, oprom, opram, options);
@@ -50,7 +50,7 @@ offs_t s2650_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
/* condition code changes for a byte */
-static const UINT8 ccc[0x200] = {
+static const uint8_t ccc[0x200] = {
0x00,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
@@ -148,21 +148,21 @@ static const int S2650_relative[0x100] =
***************************************************************/
#define RDMEM(addr) m_program->read_byte(addr)
-inline void s2650_device::set_psu(UINT8 new_val)
+inline void s2650_device::set_psu(uint8_t new_val)
{
- UINT8 old = m_psu;
+ uint8_t old = m_psu;
m_psu = new_val;
if ((new_val ^ old) & FO)
m_flag_handler((new_val & FO) ? 1 : 0);
}
-inline UINT8 s2650_device::get_sp()
+inline uint8_t s2650_device::get_sp()
{
return (m_psu & SP);
}
-inline void s2650_device::set_sp(UINT8 new_sp)
+inline void s2650_device::set_sp(uint8_t new_sp)
{
m_psu = (m_psu & ~SP) | (new_sp & SP);
}
@@ -230,9 +230,9 @@ inline int s2650_device::check_irq_line()
* ROP
* read next opcode
***************************************************************/
-inline UINT8 s2650_device::ROP()
+inline uint8_t s2650_device::ROP()
{
- UINT8 result = m_direct->read_byte(m_page + m_iar);
+ uint8_t result = m_direct->read_byte(m_page + m_iar);
m_iar = (m_iar + 1) & PMSK;
return result;
}
@@ -241,9 +241,9 @@ inline UINT8 s2650_device::ROP()
* ARG
* read next opcode argument
***************************************************************/
-inline UINT8 s2650_device::ARG()
+inline uint8_t s2650_device::ARG()
{
- UINT8 result = m_direct->read_byte(m_page + m_iar);
+ uint8_t result = m_direct->read_byte(m_page + m_iar);
m_iar = (m_iar + 1) & PMSK;
return result;
}
@@ -254,7 +254,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define _REL_EA(page) \
{ \
- UINT8 hr = ARG(); /* get 'holding register' */ \
+ uint8_t hr = ARG(); /* get 'holding register' */ \
/* build effective address within current 8K page */ \
m_ea = page + ((m_iar + S2650_relative[hr]) & PMSK); \
if (hr & 0x80) { /* indirect bit set ? */ \
@@ -273,7 +273,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define _REL_ZERO(page) \
{ \
- UINT8 hr = ARG(); /* get 'holding register' */ \
+ uint8_t hr = ARG(); /* get 'holding register' */ \
/* build effective address from 0 */ \
m_ea = (S2650_relative[hr] & PMSK); \
if (hr & 0x80) { /* indirect bit set ? */ \
@@ -292,7 +292,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define _ABS_EA() \
{ \
- UINT8 hr, dr; \
+ uint8_t hr, dr; \
hr = ARG(); /* get 'holding register' */ \
dr = ARG(); /* get 'data bus register' */ \
/* build effective address within current 8K page */ \
@@ -334,7 +334,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define _BRA_EA() \
{ \
- UINT8 hr, dr; \
+ uint8_t hr, dr; \
hr = ARG(); /* get 'holding register' */ \
dr = ARG(); /* get 'data bus register' */ \
/* build address in 32K address space */ \
@@ -357,7 +357,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define SWAP_REGS \
{ \
- UINT8 tmp; \
+ uint8_t tmp; \
tmp = m_reg[1]; \
m_reg[1] = m_reg[4]; \
m_reg[4] = tmp; \
@@ -568,10 +568,10 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_ADD(dest,_source) \
{ \
- UINT8 source = _source; \
- UINT8 before = dest; \
+ uint8_t source = _source; \
+ uint8_t before = dest; \
/* add source; carry only if WC is set */ \
- UINT16 res = dest + source + ((m_psl >> 3) & m_psl & C); \
+ uint16_t res = dest + source + ((m_psl >> 3) & m_psl & C); \
m_psl &= ~(C | OVF | IDC); \
if(res & 0x100) m_psl |= C; \
dest = res & 0xff; \
@@ -586,10 +586,10 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_SUB(dest,_source) \
{ \
- UINT8 source = _source; \
- UINT8 before = dest; \
+ uint8_t source = _source; \
+ uint8_t before = dest; \
/* subtract source; borrow only if WC is set */ \
- UINT16 res = dest - source - ((m_psl >> 3) & (m_psl ^ C) & C); \
+ uint16_t res = dest - source - ((m_psl >> 3) & (m_psl ^ C) & C); \
m_psl &= ~(C | OVF | IDC); \
if((res & 0x100)==0) m_psl |= C; \
dest = res & 0xff; \
@@ -606,8 +606,8 @@ inline UINT8 s2650_device::ARG()
{ \
int d; \
m_psl &= ~CC; \
- if (m_psl & COM) d = (UINT8)reg - (UINT8)val; \
- else d = (INT8)reg - (INT8)val; \
+ if (m_psl & COM) d = (uint8_t)reg - (uint8_t)val; \
+ else d = (int8_t)reg - (int8_t)val; \
if( d < 0 ) m_psl |= 0x80; \
else \
if( d > 0 ) m_psl |= 0x40; \
@@ -630,10 +630,10 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_RRL(dest) \
{ \
- UINT8 before = dest; \
+ uint8_t before = dest; \
if( m_psl & WC ) \
{ \
- UINT8 c = m_psl & C; \
+ uint8_t c = m_psl & C; \
m_psl &= ~(C + IDC); \
dest = (before << 1) | c; \
m_psl |= (before >> 7) + (dest & IDC); \
@@ -653,10 +653,10 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_RRR(dest) \
{ \
- UINT8 before = dest; \
+ uint8_t before = dest; \
if (m_psl & WC) \
{ \
- UINT8 c = m_psl & C; \
+ uint8_t c = m_psl & C; \
m_psl &= ~(C + IDC); \
dest = (before >> 1) | (c << 7); \
m_psl |= (before & C) + (dest & IDC); \
@@ -694,7 +694,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_CPSU() \
{ \
- UINT8 cpsu = ARG(); \
+ uint8_t cpsu = ARG(); \
set_psu(m_psu & ~cpsu); \
m_icount -= check_irq_line(); \
}
@@ -705,7 +705,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_CPSL() \
{ \
- UINT8 cpsl = ARG(); \
+ uint8_t cpsl = ARG(); \
/* select other register set now ? */ \
if( (cpsl & RS) && (m_psl & RS) ) \
SWAP_REGS; \
@@ -719,7 +719,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_PPSU() \
{ \
- UINT8 ppsu = (ARG() & ~PSU34) & ~SI; \
+ uint8_t ppsu = (ARG() & ~PSU34) & ~SI; \
set_psu(m_psu | ppsu); \
}
@@ -729,7 +729,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_PPSL() \
{ \
- UINT8 ppsl = ARG(); \
+ uint8_t ppsl = ARG(); \
/* select 2nd register set now ? */ \
if ((ppsl & RS) && !(m_psl & RS)) \
SWAP_REGS; \
@@ -742,8 +742,8 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_TPSU() \
{ \
- UINT8 tpsu = ARG(); \
- UINT8 rpsu = (m_psu | (m_io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
+ uint8_t tpsu = ARG(); \
+ uint8_t rpsu = (m_psu | (m_io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
m_psl &= ~CC; \
if( (rpsu & tpsu) != tpsu ) \
m_psl |= 0x80; \
@@ -755,7 +755,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_TPSL() \
{ \
- UINT8 tpsl = ARG(); \
+ uint8_t tpsl = ARG(); \
if( (m_psl & tpsl) != tpsl ) \
m_psl = (m_psl & ~CC) | 0x80; \
else \
@@ -768,7 +768,7 @@ inline UINT8 s2650_device::ARG()
***************************************************************/
#define M_TMI(value) \
{ \
- UINT8 tmi = ARG(); \
+ uint8_t tmi = ARG(); \
m_psl &= ~CC; \
if( (value & tmi) != tmi ) \
m_psl |= 0x80; \
diff --git a/src/devices/cpu/s2650/s2650.h b/src/devices/cpu/s2650/s2650.h
index 9448d203733..8b7f36479f3 100644
--- a/src/devices/cpu/s2650/s2650.h
+++ b/src/devices/cpu/s2650/s2650.h
@@ -38,7 +38,7 @@ class s2650_device : public cpu_device
{
public:
// construction/destruction
- s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_flag_handler(device_t &device, _Object object) { return downcast<s2650_device &>(device).m_flag_handler.set_callback(object); }
@@ -50,10 +50,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 5; }
- virtual UINT32 execute_max_cycles() const override { return 13; }
- virtual UINT32 execute_input_lines() const override { return 2; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 5; }
+ virtual uint32_t execute_max_cycles() const override { return 13; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -69,9 +69,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 3; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 3; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -80,18 +80,18 @@ private:
devcb_write_line m_flag_handler;
devcb_write_line m_intack_handler;
- UINT16 m_ppc; /* previous program counter (page + iar) */
- UINT16 m_page; /* 8K page select register (A14..A13) */
- UINT16 m_iar; /* instruction address register (A12..A0) */
- UINT16 m_ea; /* effective address (A14..A0) */
- UINT8 m_psl; /* processor status lower */
- UINT8 m_psu; /* processor status upper */
- UINT8 m_r; /* absolute addressing dst/src register */
- UINT8 m_reg[7]; /* 7 general purpose registers */
- UINT8 m_halt; /* 1 if cpu is halted */
- UINT8 m_ir; /* instruction register */
- UINT16 m_ras[8]; /* 8 return address stack entries */
- UINT8 m_irq_state;
+ uint16_t m_ppc; /* previous program counter (page + iar) */
+ uint16_t m_page; /* 8K page select register (A14..A13) */
+ uint16_t m_iar; /* instruction address register (A12..A0) */
+ uint16_t m_ea; /* effective address (A14..A0) */
+ uint8_t m_psl; /* processor status lower */
+ uint8_t m_psu; /* processor status upper */
+ uint8_t m_r; /* absolute addressing dst/src register */
+ uint8_t m_reg[7]; /* 7 general purpose registers */
+ uint8_t m_halt; /* 1 if cpu is halted */
+ uint8_t m_ir; /* instruction register */
+ uint16_t m_ras[8]; /* 8 return address stack entries */
+ uint8_t m_irq_state;
int m_icount;
address_space *m_program;
@@ -99,14 +99,14 @@ private:
address_space *m_io;
// For debugger
- UINT16 m_debugger_temp;
+ uint16_t m_debugger_temp;
- inline void set_psu(UINT8 new_val);
- inline UINT8 get_sp();
- inline void set_sp(UINT8 new_sp);
+ inline void set_psu(uint8_t new_val);
+ inline uint8_t get_sp();
+ inline void set_sp(uint8_t new_sp);
inline int check_irq_line();
- inline UINT8 ROP();
- inline UINT8 ARG();
+ inline uint8_t ROP();
+ inline uint8_t ARG();
void s2650_set_flag(int state);
int s2650_get_flag();
void s2650_set_sense(int state);
diff --git a/src/devices/cpu/saturn/satops.hxx b/src/devices/cpu/saturn/satops.hxx
index 8f7420584e3..3d279da8e2f 100644
--- a/src/devices/cpu/saturn/satops.hxx
+++ b/src/devices/cpu/saturn/satops.hxx
@@ -7,7 +7,7 @@
int saturn_device::READ_OP()
{
- UINT8 data;
+ uint8_t data;
m_icount-=3;
data=m_direct->read_byte(m_pc);
saturn_assert(data<0x10);
@@ -17,7 +17,7 @@ int saturn_device::READ_OP()
int saturn_device::READ_OP_ARG()
{
- UINT8 data;
+ uint8_t data;
m_icount-=3;
data=m_direct->read_byte(m_pc);
saturn_assert(data<0x10);
@@ -32,9 +32,9 @@ int saturn_device::READ_OP_ARG8()
return n0|(n1<<4);
}
-INT8 saturn_device::READ_OP_DIS8()
+int8_t saturn_device::READ_OP_DIS8()
{
- return (INT8)READ_OP_ARG8();
+ return (int8_t)READ_OP_ARG8();
}
int saturn_device::READ_OP_ARG12()
@@ -61,9 +61,9 @@ int saturn_device::READ_OP_ARG16()
return n0|(n1<<4)|(n2<<8)|(n3<<12);
}
-INT16 saturn_device::READ_OP_DIS16()
+int16_t saturn_device::READ_OP_DIS16()
{
- return (INT16)READ_OP_ARG16();
+ return (int16_t)READ_OP_ARG16();
}
int saturn_device::READ_OP_ARG20()
@@ -76,9 +76,9 @@ int saturn_device::READ_OP_ARG20()
return n0|(n1<<4)|(n2<<8)|(n3<<12)|(n4<<16);
}
-int saturn_device::READ_NIBBLE(UINT32 adr)
+int saturn_device::READ_NIBBLE(uint32_t adr)
{
- UINT8 data;
+ uint8_t data;
m_icount-=3;
data=m_program->read_byte(adr&0xfffff);
saturn_assert(data<0x10);
@@ -86,14 +86,14 @@ int saturn_device::READ_NIBBLE(UINT32 adr)
return data;
}
-int saturn_device::READ_8(UINT32 adr)
+int saturn_device::READ_8(uint32_t adr)
{
int n0=READ_NIBBLE(adr);
int n1=READ_NIBBLE(adr+1);
return n0|(n1<<4);
}
-int saturn_device::READ_12(UINT32 adr)
+int saturn_device::READ_12(uint32_t adr)
{
int n0=READ_NIBBLE(adr);
int n1=READ_NIBBLE(adr+1);
@@ -101,7 +101,7 @@ int saturn_device::READ_12(UINT32 adr)
return n0|(n1<<4)|(n2<<8);
}
-int saturn_device::READ_16(UINT32 adr)
+int saturn_device::READ_16(uint32_t adr)
{
int n0=READ_NIBBLE(adr);
int n1=READ_NIBBLE(adr+1);
@@ -110,7 +110,7 @@ int saturn_device::READ_16(UINT32 adr)
return n0|(n1<<4)|(n2<<8)|(n3<<12);
}
-int saturn_device::READ_20(UINT32 adr)
+int saturn_device::READ_20(uint32_t adr)
{
int n0=READ_NIBBLE(adr);
int n1=READ_NIBBLE(adr+1);
@@ -120,7 +120,7 @@ int saturn_device::READ_20(UINT32 adr)
return n0|(n1<<4)|(n2<<8)|(n3<<12)|(n4<<16);
}
-void saturn_device::WRITE_NIBBLE(UINT32 adr, UINT8 nib)
+void saturn_device::WRITE_NIBBLE(uint32_t adr, uint8_t nib)
{
m_icount-=3;
saturn_assert(nib<0x10);
@@ -186,15 +186,15 @@ void saturn_device::S64_WRITE_A(int r, int v)
-UINT32 saturn_device::saturn_pop()
+uint32_t saturn_device::saturn_pop()
{
- UINT32 temp=m_rstk[0];
+ uint32_t temp=m_rstk[0];
memmove(m_rstk, m_rstk+1, sizeof(m_rstk)-sizeof(m_rstk[0]));
m_rstk[7]=0;
return temp;
}
-void saturn_device::saturn_push(UINT32 adr)
+void saturn_device::saturn_push(uint32_t adr)
{
memmove(m_rstk+1, m_rstk, sizeof(m_rstk)-sizeof(m_rstk[0]));
m_rstk[0]=adr;
@@ -806,7 +806,7 @@ void saturn_device::saturn_clear(int reg, int begin, int count)
void saturn_device::saturn_exchange(int left, int begin, int count, int right)
{
int i;
- UINT8 temp;
+ uint8_t temp;
saturn_assert(left>=0 && left<9);
saturn_assert(right>=0 && right<9);
saturn_assert(begin>=0 && count>0 && begin+count<=16);
@@ -859,7 +859,7 @@ void saturn_device::saturn_add(int reg, int begin, int count, int right)
}
}
-void saturn_device::saturn_add_const(int reg, int begin, int count, UINT8 right)
+void saturn_device::saturn_add_const(int reg, int begin, int count, uint8_t right)
{
int i, t;
int base=m_decimal?10:16;
diff --git a/src/devices/cpu/saturn/saturn.cpp b/src/devices/cpu/saturn/saturn.cpp
index 159d2ecd037..3f3f05b05bd 100644
--- a/src/devices/cpu/saturn/saturn.cpp
+++ b/src/devices/cpu/saturn/saturn.cpp
@@ -42,7 +42,7 @@
const device_type SATURN = &device_creator<saturn_device>;
-saturn_device::saturn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+saturn_device::saturn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SATURN, "HP Saturn", tag, owner, clock, "saturn_cpu", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
, m_out_func(*this)
@@ -58,7 +58,7 @@ saturn_device::saturn_device(const machine_config &mconfig, const char *tag, dev
}
-offs_t saturn_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t saturn_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( saturn );
return CPU_DISASSEMBLE_NAME(saturn)(this, buffer, pc, oprom, opram, options);
@@ -394,7 +394,7 @@ void saturn_device::execute_set_input(int inputnum, int state)
}
-void saturn_device::IntReg64(Saturn64 r, INT64 d)
+void saturn_device::IntReg64(Saturn64 r, int64_t d)
{
int i;
for (i=0; i<16; i++)
@@ -402,11 +402,11 @@ void saturn_device::IntReg64(Saturn64 r, INT64 d)
}
-INT64 saturn_device::Reg64Int(Saturn64 r)
+int64_t saturn_device::Reg64Int(Saturn64 r)
{
- INT64 x = 0;
+ int64_t x = 0;
int i;
for (i=0; i<16; i++)
- x |= (INT64) r[i] << (4*i);
+ x |= (int64_t) r[i] << (4*i);
return x;
}
diff --git a/src/devices/cpu/saturn/saturn.h b/src/devices/cpu/saturn/saturn.h
index 28de3e41910..c12dfd98418 100644
--- a/src/devices/cpu/saturn/saturn.h
+++ b/src/devices/cpu/saturn/saturn.h
@@ -76,7 +76,7 @@ class saturn_device : public cpu_device
{
public:
// construction/destruction
- saturn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ saturn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_out_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_out_func.set_callback(object); }
@@ -94,9 +94,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 2; }
- virtual UINT32 execute_max_cycles() const override { return 21; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 21; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -109,9 +109,9 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 20; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 20; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -126,60 +126,60 @@ private:
devcb_write_line m_rsi_func;
// 64 bit, unpacked (one nibble per byte)
-typedef UINT8 Saturn64[16];
+typedef uint8_t Saturn64[16];
Saturn64 m_reg[9]; //r0,r1,r2,r3,r4,a,b,c,d
- UINT32 m_d[2], m_pc, m_oldpc, m_rstk[8]; // 20 bit, packed addresses
+ uint32_t m_d[2], m_pc, m_oldpc, m_rstk[8]; // 20 bit, packed addresses
- UINT8 m_p; // 4 bit pointer
+ uint8_t m_p; // 4 bit pointer
- UINT16 m_out; // 12 bit (packed)
- UINT8 m_carry, m_decimal;
- UINT16 m_st; // status 16 bit
+ uint16_t m_out; // 12 bit (packed)
+ uint8_t m_carry, m_decimal;
+ uint16_t m_st; // status 16 bit
- UINT8 m_hst; // hardware status 4 bit
+ uint8_t m_hst; // hardware status 4 bit
- UINT8 m_nmi_state;
- UINT8 m_irq_state;
- UINT8 m_irq_enable; /* INTON / INTOFF */
- UINT8 m_in_irq; /* already servicing IRQ */
- UINT8 m_pending_irq; /* IRQ is pending */
- UINT8 m_sleeping; /* low-consumption state */
+ uint8_t m_nmi_state;
+ uint8_t m_irq_state;
+ uint8_t m_irq_enable; /* INTON / INTOFF */
+ uint8_t m_in_irq; /* already servicing IRQ */
+ uint8_t m_pending_irq; /* IRQ is pending */
+ uint8_t m_sleeping; /* low-consumption state */
int m_monitor_id;
int m_monitor_in;
address_space *m_program;
direct_read_data *m_direct;
int m_icount;
- INT64 m_debugger_temp;
+ int64_t m_debugger_temp;
void saturn_take_irq();
- void IntReg64(Saturn64 r, INT64 d);
- INT64 Reg64Int(Saturn64 r);
+ void IntReg64(Saturn64 r, int64_t d);
+ int64_t Reg64Int(Saturn64 r);
inline int READ_OP();
inline int READ_OP_ARG();
inline int READ_OP_ARG8();
- inline INT8 READ_OP_DIS8();
+ inline int8_t READ_OP_DIS8();
inline int READ_OP_ARG12();
inline int READ_OP_DIS12();
inline int READ_OP_ARG16();
- inline INT16 READ_OP_DIS16();
+ inline int16_t READ_OP_DIS16();
inline int READ_OP_ARG20();
- inline int READ_NIBBLE(UINT32 adr);
- inline int READ_8(UINT32 adr);
- inline int READ_12(UINT32 adr);
- inline int READ_16(UINT32 adr);
- inline int READ_20(UINT32 adr);
- inline void WRITE_NIBBLE(UINT32 adr, UINT8 nib);
+ inline int READ_NIBBLE(uint32_t adr);
+ inline int READ_8(uint32_t adr);
+ inline int READ_12(uint32_t adr);
+ inline int READ_16(uint32_t adr);
+ inline int READ_20(uint32_t adr);
+ inline void WRITE_NIBBLE(uint32_t adr, uint8_t nib);
inline int S64_READ_X(int r);
inline int S64_READ_WORD(int r);
inline int S64_READ_A(int r);
inline void S64_WRITE_X(int r, int v);
inline void S64_WRITE_WORD(int r, int v);
inline void S64_WRITE_A(int r, int v);
- inline UINT32 saturn_pop();
- inline void saturn_push(UINT32 adr);
+ inline uint32_t saturn_pop();
+ inline void saturn_push(uint32_t adr);
inline void saturn_interrupt_on();
inline void saturn_interrupt_off();
inline void saturn_reset_interrupt();
@@ -258,7 +258,7 @@ typedef UINT8 Saturn64[16];
inline void saturn_exchange(int left, int begin, int count, int right);
inline void saturn_copy(int dest, int begin, int count, int src);
inline void saturn_add(int reg, int begin, int count, int right);
- inline void saturn_add_const(int reg, int begin, int count, UINT8 right);
+ inline void saturn_add_const(int reg, int begin, int count, uint8_t right);
inline void saturn_sub(int reg, int begin, int count, int right);
inline void saturn_sub_const(int reg, int begin, int count, int right);
inline void saturn_sub2(int reg, int begin, int count, int right);
diff --git a/src/devices/cpu/saturn/saturnds.cpp b/src/devices/cpu/saturn/saturnds.cpp
index 5b6adcf0c24..e41be2a2d7f 100644
--- a/src/devices/cpu/saturn/saturnds.cpp
+++ b/src/devices/cpu/saturn/saturnds.cpp
@@ -45,13 +45,13 @@ static const char *const adr_a[]=
static const char number_2_hex[]=
{ '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'a', 'b', 'c', 'd', 'e', 'f' };
-#define SATURN_PEEKOP_DIS8(v) v = (INT8)( oprom[pos] | ( oprom[pos+1] << 4 ) ); pos+= 2;
+#define SATURN_PEEKOP_DIS8(v) v = (int8_t)( oprom[pos] | ( oprom[pos+1] << 4 ) ); pos+= 2;
#define SATURN_PEEKOP_DIS12(v) v = oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ); \
pos += 3; \
if ( v & 0x0800 ) v = -0x1000 + v;
-#define SATURN_PEEKOP_DIS16(v) v = (INT16)( oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ) | ( oprom[pos+3] << 12 ) ); pos += 4;
+#define SATURN_PEEKOP_DIS16(v) v = (int16_t)( oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ) | ( oprom[pos+3] << 12 ) ); pos += 4;
#define SATURN_PEEKOP_ADR(v) v = oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ) | ( oprom[pos+3] << 12 ) | ( oprom[pos+4] << 16 ); pos += 5;
diff --git a/src/devices/cpu/sc61860/sc61860.cpp b/src/devices/cpu/sc61860/sc61860.cpp
index 7491412d74d..e22bc422270 100644
--- a/src/devices/cpu/sc61860/sc61860.cpp
+++ b/src/devices/cpu/sc61860/sc61860.cpp
@@ -49,7 +49,7 @@
const device_type SC61860 = &device_creator<sc61860_device>;
-sc61860_device::sc61860_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sc61860_device::sc61860_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SC61860, "SC61860", tag, owner, clock, "sc61860", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0)
, m_reset(*this)
@@ -64,14 +64,14 @@ sc61860_device::sc61860_device(const machine_config &mconfig, const char *tag, d
}
-offs_t sc61860_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sc61860_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( sc61860 );
return CPU_DISASSEMBLE_NAME(sc61860)(this, buffer, pc, oprom, opram, options);
}
-UINT8 *sc61860_device::internal_ram()
+uint8_t *sc61860_device::internal_ram()
{
return m_ram;
}
diff --git a/src/devices/cpu/sc61860/sc61860.h b/src/devices/cpu/sc61860/sc61860.h
index 855d0d91e21..d8f993a60f4 100644
--- a/src/devices/cpu/sc61860/sc61860.h
+++ b/src/devices/cpu/sc61860/sc61860.h
@@ -72,7 +72,7 @@ class sc61860_device : public cpu_device
{
public:
// construction/destruction
- sc61860_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sc61860_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_reset_cb(device_t &device, _Object object) { return downcast<sc61860_device &>(device).m_reset.set_callback(object); }
@@ -85,7 +85,7 @@ public:
template<class _Object> static devcb_base &set_outc_cb(device_t &device, _Object object) { return downcast<sc61860_device &>(device).m_outc.set_callback(object); }
/* this is though for power on/off of the sharps */
- UINT8 *internal_ram();
+ uint8_t *internal_ram();
TIMER_CALLBACK_MEMBER(sc61860_2ms_tick);
@@ -95,9 +95,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 2; }
- virtual UINT32 execute_max_cycles() const override { return 4; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 4; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -109,9 +109,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -125,11 +125,11 @@ private:
devcb_write8 m_outb;
devcb_write8 m_outc;
- UINT8 m_p, m_q, m_r; //7 bits only?
+ uint8_t m_p, m_q, m_r; //7 bits only?
- UINT8 m_c; // port c, used for HLT.
- UINT8 m_d, m_h;
- UINT16 m_oldpc, m_pc, m_dp;
+ uint8_t m_c; // port c, used for HLT.
+ uint8_t m_d, m_h;
+ uint16_t m_oldpc, m_pc, m_dp;
int m_carry, m_zero;
@@ -138,23 +138,23 @@ private:
address_space *m_program;
direct_read_data *m_direct;
int m_icount;
- UINT8 m_ram[0x100]; // internal special ram, should be 0x60, 0x100 to avoid memory corruption for now
-
- UINT32 m_debugger_temp;
-
- inline UINT8 READ_OP();
- inline UINT8 READ_OP_ARG();
- inline UINT16 READ_OP_ARG_WORD();
- inline UINT8 READ_BYTE(UINT16 adr);
- inline void WRITE_BYTE(UINT16 a, UINT8 v);
- inline UINT8 READ_RAM(int r);
- inline void WRITE_RAM(int r, UINT8 v);
- inline void PUSH(UINT8 v);
- inline UINT8 POP();
- inline void sc61860_load_imm(int r, UINT8 v);
+ uint8_t m_ram[0x100]; // internal special ram, should be 0x60, 0x100 to avoid memory corruption for now
+
+ uint32_t m_debugger_temp;
+
+ inline uint8_t READ_OP();
+ inline uint8_t READ_OP_ARG();
+ inline uint16_t READ_OP_ARG_WORD();
+ inline uint8_t READ_BYTE(uint16_t adr);
+ inline void WRITE_BYTE(uint16_t a, uint8_t v);
+ inline uint8_t READ_RAM(int r);
+ inline void WRITE_RAM(int r, uint8_t v);
+ inline void PUSH(uint8_t v);
+ inline uint8_t POP();
+ inline void sc61860_load_imm(int r, uint8_t v);
inline void sc61860_load();
- inline void sc61860_load_imm_p(UINT8 v);
- inline void sc61860_load_imm_q(UINT8 v);
+ inline void sc61860_load_imm_p(uint8_t v);
+ inline void sc61860_load_imm_q(uint8_t v);
inline void sc61860_load_r();
inline void sc61860_load_ext(int r);
inline void sc61860_load_dp();
@@ -164,11 +164,11 @@ private:
inline void sc61860_store_r();
inline void sc61860_store_ext(int r);
inline void sc61860_exam(int a, int b);
- inline void sc61860_test(int reg, UINT8 value);
+ inline void sc61860_test(int reg, uint8_t value);
inline void sc61860_test_ext();
- inline void sc61860_and(int reg, UINT8 value);
+ inline void sc61860_and(int reg, uint8_t value);
inline void sc61860_and_ext();
- inline void sc61860_or(int reg, UINT8 value);
+ inline void sc61860_or(int reg, uint8_t value);
inline void sc61860_or_ext();
inline void sc61860_rotate_right();
inline void sc61860_rotate_left();
@@ -177,18 +177,18 @@ private:
inline void sc61860_inc_p();
inline void sc61860_dec(int reg);
inline void sc61860_dec_p();
- inline void sc61860_add(int reg, UINT8 value);
+ inline void sc61860_add(int reg, uint8_t value);
inline void sc61860_add_carry();
inline void sc61860_add_word();
- inline void sc61860_sub(int reg, UINT8 value);
+ inline void sc61860_sub(int reg, uint8_t value);
inline void sc61860_sub_carry();
inline void sc61860_sub_word();
- inline void sc61860_cmp(int reg, UINT8 value);
+ inline void sc61860_cmp(int reg, uint8_t value);
inline void sc61860_pop();
inline void sc61860_push();
inline void sc61860_prepare_table_call();
inline void sc61860_execute_table_call();
- inline void sc61860_call(UINT16 adr);
+ inline void sc61860_call(uint16_t adr);
inline void sc61860_return();
inline void sc61860_jump(int yes);
inline void sc61860_jump_rel_plus(int yes);
diff --git a/src/devices/cpu/sc61860/scdasm.cpp b/src/devices/cpu/sc61860/scdasm.cpp
index ad35c1f2f1b..c49ad9c77b4 100644
--- a/src/devices/cpu/sc61860/scdasm.cpp
+++ b/src/devices/cpu/sc61860/scdasm.cpp
@@ -154,10 +154,10 @@ static const struct { const char *mnemonic; Adr adr; } table[]={
CPU_DISASSEMBLE( sc61860 )
{
- const UINT8 *base_oprom = oprom;
+ const uint8_t *base_oprom = oprom;
int oper=*(oprom++);
int t;
- UINT16 adr;
+ uint16_t adr;
switch(oper&0xc0) {
case 0x80:
diff --git a/src/devices/cpu/sc61860/scops.hxx b/src/devices/cpu/sc61860/scops.hxx
index 7bc5b05c987..55c0d72d8ef 100644
--- a/src/devices/cpu/sc61860/scops.hxx
+++ b/src/devices/cpu/sc61860/scops.hxx
@@ -16,57 +16,57 @@
*
*****************************************************************************/
-UINT8 sc61860_device::READ_OP()
+uint8_t sc61860_device::READ_OP()
{
return m_direct->read_byte(m_pc++);
}
-UINT8 sc61860_device::READ_OP_ARG()
+uint8_t sc61860_device::READ_OP_ARG()
{
return m_direct->read_byte(m_pc++);
}
-UINT16 sc61860_device::READ_OP_ARG_WORD()
+uint16_t sc61860_device::READ_OP_ARG_WORD()
{
- UINT16 t=m_direct->read_byte(m_pc++)<<8;
+ uint16_t t=m_direct->read_byte(m_pc++)<<8;
t|=m_direct->read_byte(m_pc++);
return t;
}
-UINT8 sc61860_device::READ_BYTE(UINT16 adr)
+uint8_t sc61860_device::READ_BYTE(uint16_t adr)
{
return m_program->read_byte(adr);
}
-void sc61860_device::WRITE_BYTE(UINT16 a, UINT8 v)
+void sc61860_device::WRITE_BYTE(uint16_t a, uint8_t v)
{
m_program->write_byte(a, v);
}
-UINT8 sc61860_device::READ_RAM(int r)
+uint8_t sc61860_device::READ_RAM(int r)
{
return m_ram[r];
}
-void sc61860_device::WRITE_RAM(int r, UINT8 v)
+void sc61860_device::WRITE_RAM(int r, uint8_t v)
{
m_ram[r] = v;
}
-void sc61860_device::PUSH(UINT8 v)
+void sc61860_device::PUSH(uint8_t v)
{
m_r--;
WRITE_RAM(m_r, v);
}
-UINT8 sc61860_device::POP()
+uint8_t sc61860_device::POP()
{
- UINT8 t = READ_RAM(m_r);
+ uint8_t t = READ_RAM(m_r);
m_r++;
return t;
}
-void sc61860_device::sc61860_load_imm(int r, UINT8 v)
+void sc61860_device::sc61860_load_imm(int r, uint8_t v)
{
WRITE_RAM(r, v);
}
@@ -76,12 +76,12 @@ void sc61860_device::sc61860_load()
WRITE_RAM(A, READ_RAM(m_p));
}
-void sc61860_device::sc61860_load_imm_p(UINT8 v)
+void sc61860_device::sc61860_load_imm_p(uint8_t v)
{
m_p=v&0x7f;
}
-void sc61860_device::sc61860_load_imm_q(UINT8 v)
+void sc61860_device::sc61860_load_imm_q(uint8_t v)
{
m_q=v&0x7f;
}
@@ -128,12 +128,12 @@ void sc61860_device::sc61860_store_ext(int r)
void sc61860_device::sc61860_exam(int a, int b)
{
- UINT8 t = READ_RAM(a);
+ uint8_t t = READ_RAM(a);
WRITE_RAM(a, READ_RAM(b));
WRITE_RAM(b, t);
}
-void sc61860_device::sc61860_test(int reg, UINT8 value)
+void sc61860_device::sc61860_test(int reg, uint8_t value)
{
m_zero=(READ_RAM(reg) & value)==0;
}
@@ -143,30 +143,30 @@ void sc61860_device::sc61860_test_ext()
m_zero=(READ_BYTE(m_dp)&READ_OP_ARG())==0;
}
-void sc61860_device::sc61860_and(int reg, UINT8 value)
+void sc61860_device::sc61860_and(int reg, uint8_t value)
{
- UINT8 t = READ_RAM(reg) & value;
+ uint8_t t = READ_RAM(reg) & value;
WRITE_RAM(reg, t);
m_zero=t==0;
}
void sc61860_device::sc61860_and_ext()
{
- UINT8 t = READ_BYTE(m_dp) & READ_OP_ARG();
+ uint8_t t = READ_BYTE(m_dp) & READ_OP_ARG();
m_zero=t==0;
WRITE_BYTE(m_dp, t);
}
-void sc61860_device::sc61860_or(int reg, UINT8 value)
+void sc61860_device::sc61860_or(int reg, uint8_t value)
{
- UINT8 t = READ_RAM(reg) | value;
+ uint8_t t = READ_RAM(reg) | value;
WRITE_RAM(reg, t);
m_zero=t==0;
}
void sc61860_device::sc61860_or_ext()
{
- UINT8 t=READ_BYTE(m_dp)|READ_OP_ARG();
+ uint8_t t=READ_BYTE(m_dp)|READ_OP_ARG();
m_zero=t==0;
WRITE_BYTE(m_dp, t);
}
@@ -196,7 +196,7 @@ void sc61860_device::sc61860_swap()
// q=reg sideeffect
void sc61860_device::sc61860_inc(int reg)
{
- UINT8 t = READ_RAM(reg) + 1;
+ uint8_t t = READ_RAM(reg) + 1;
m_q=reg;
WRITE_RAM(reg, t);
m_zero=t==0;
@@ -211,7 +211,7 @@ void sc61860_device::sc61860_inc_p()
// q=reg sideeffect
void sc61860_device::sc61860_dec(int reg)
{
- UINT8 t = READ_RAM(reg) - 1;
+ uint8_t t = READ_RAM(reg) - 1;
m_q=reg;
WRITE_RAM(reg, t);
m_zero=t==0;
@@ -223,7 +223,7 @@ void sc61860_device::sc61860_dec_p()
m_p--;
}
-void sc61860_device::sc61860_add(int reg, UINT8 value)
+void sc61860_device::sc61860_add(int reg, uint8_t value)
{
int t = READ_RAM(reg) + value;
WRITE_RAM(reg, t);
@@ -254,7 +254,7 @@ void sc61860_device::sc61860_add_word()
}
-void sc61860_device::sc61860_sub(int reg, UINT8 value)
+void sc61860_device::sc61860_sub(int reg, uint8_t value)
{
int t = READ_RAM(reg) - value;
WRITE_RAM(reg, t);
@@ -285,7 +285,7 @@ void sc61860_device::sc61860_sub_word()
m_carry=t2<0;
}
-void sc61860_device::sc61860_cmp(int reg, UINT8 value)
+void sc61860_device::sc61860_cmp(int reg, uint8_t value)
{
int t = READ_RAM(reg) - value;
m_zero=t==0;
@@ -327,7 +327,7 @@ void sc61860_device::sc61860_execute_table_call()
}
-void sc61860_device::sc61860_call(UINT16 adr)
+void sc61860_device::sc61860_call(uint16_t adr)
{
PUSH(m_pc>>8);
PUSH(m_pc&0xff);
@@ -336,14 +336,14 @@ void sc61860_device::sc61860_call(UINT16 adr)
void sc61860_device::sc61860_return()
{
- UINT16 t=POP();
+ uint16_t t=POP();
t|=POP()<<8;
m_pc=t;
}
void sc61860_device::sc61860_jump(int yes)
{
- UINT16 adr = READ_OP_ARG_WORD();
+ uint16_t adr = READ_OP_ARG_WORD();
if (yes) {
m_pc=adr;
}
@@ -351,7 +351,7 @@ void sc61860_device::sc61860_jump(int yes)
void sc61860_device::sc61860_jump_rel_plus(int yes)
{
- UINT16 adr = m_pc + READ_OP_ARG();
+ uint16_t adr = m_pc + READ_OP_ARG();
if (yes) {
m_pc=adr;
m_icount-=3;
@@ -360,7 +360,7 @@ void sc61860_device::sc61860_jump_rel_plus(int yes)
void sc61860_device::sc61860_jump_rel_minus(int yes)
{
- UINT16 adr = m_pc - READ_OP_ARG();
+ uint16_t adr = m_pc - READ_OP_ARG();
if (yes) {
m_pc=adr;
m_icount-=3;
@@ -369,8 +369,8 @@ void sc61860_device::sc61860_jump_rel_minus(int yes)
void sc61860_device::sc61860_loop()
{
- UINT16 adr = m_pc - READ_OP_ARG();
- UINT8 t = READ_RAM(m_r) - 1;
+ uint16_t adr = m_pc - READ_OP_ARG();
+ uint8_t t = READ_RAM(m_r) - 1;
WRITE_RAM(m_r, t);
m_zero=t==0;
m_carry=t==0xff;
@@ -482,7 +482,7 @@ void sc61860_device::sc61860_test_special()
// p-=I+1 sideeffect
void sc61860_device::sc61860_add_bcd_a()
{
- UINT8 help = READ_RAM(A);
+ uint8_t help = READ_RAM(A);
int i, hlp, hlp1 = 0;
m_zero=1;
for (i=0; i <= READ_RAM(I); i++) {
@@ -529,7 +529,7 @@ void sc61860_device::sc61860_add_bcd()
// p-=I+1 sideeffect
void sc61860_device::sc61860_sub_bcd_a()
{
- UINT8 help = READ_RAM(A);
+ uint8_t help = READ_RAM(A);
int i, hlp, hlp1 = 0;
m_zero=1;
for (i=0; i <= READ_RAM(I); i++) {
@@ -601,8 +601,8 @@ void sc61860_device::sc61860_shift_right_nibble()
// q=reg+1 sideeffect
void sc61860_device::sc61860_inc_load_dp(int reg)
{
- UINT8 t = READ_RAM(reg) + 1;
- UINT8 t2 = READ_RAM(reg + 1);
+ uint8_t t = READ_RAM(reg) + 1;
+ uint8_t t2 = READ_RAM(reg + 1);
WRITE_RAM(reg, t);
if (t == 0) { t2++; WRITE_RAM(reg + 1, t2); }
m_dp=t|(t2<<8);
@@ -612,8 +612,8 @@ void sc61860_device::sc61860_inc_load_dp(int reg)
// q=reg+1 sideeffect
void sc61860_device::sc61860_dec_load_dp(int reg)
{
- UINT8 t = READ_RAM(reg) - 1;
- UINT8 t2 = READ_RAM(reg + 1);
+ uint8_t t = READ_RAM(reg) - 1;
+ uint8_t t2 = READ_RAM(reg + 1);
WRITE_RAM(reg, t);
if (t == 0xff) { t2--; WRITE_RAM(reg + 1, t2); }
m_dp=t|(t2<<8);
@@ -697,7 +697,7 @@ void sc61860_device::sc61860_copy_int(int count)
{
int i;
for (i=0; i<=count; i++) {
- UINT8 t = READ_BYTE((READ_RAM(A)|(READ_RAM(B)<<8))); /* internal rom! */
+ uint8_t t = READ_BYTE((READ_RAM(A)|(READ_RAM(B)<<8))); /* internal rom! */
WRITE_RAM(m_p, t);
m_p++;
if (i!=count) {
@@ -715,7 +715,7 @@ void sc61860_device::sc61860_copy_int(int count)
void sc61860_device::sc61860_exchange(int count)
{
int i;
- UINT8 t;
+ uint8_t t;
for (i=0; i<=count; i++) {
t = READ_RAM(m_p);
WRITE_RAM(m_p, READ_RAM(m_q));
@@ -729,7 +729,7 @@ void sc61860_device::sc61860_exchange(int count)
void sc61860_device::sc61860_exchange_ext(int count)
{
int i;
- UINT8 t;
+ uint8_t t;
for (i=0; i<=count; i++) {
t = READ_RAM(m_p);
WRITE_RAM(m_p, READ_BYTE(m_dp));
@@ -750,7 +750,7 @@ void sc61860_device::sc61860_wait_x(int level)
if (!m_x.isnull()) {
for (c=READ_RAM(I); c>=0; c--) {
- UINT8 t = (READ_RAM(m_p)+1)&0x7f;
+ uint8_t t = (READ_RAM(m_p)+1)&0x7f;
WRITE_RAM(m_p, t);
m_zero=m_x();
m_icount-=4;
diff --git a/src/devices/cpu/scmp/scmp.cpp b/src/devices/cpu/scmp/scmp.cpp
index 2671dc9cf5a..04f7023ac62 100644
--- a/src/devices/cpu/scmp/scmp.cpp
+++ b/src/devices/cpu/scmp/scmp.cpp
@@ -21,7 +21,7 @@ const device_type SCMP = &device_creator<scmp_device>;
const device_type INS8060 = &device_creator<ins8060_device>;
-scmp_device::scmp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+scmp_device::scmp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SCMP, "INS 8050 SC/MP", tag, owner, clock, "ins8050", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0), m_AC(0), m_ER(0), m_SR(0), m_program(nullptr), m_direct(nullptr), m_icount(0)
, m_flag_out_func(*this)
@@ -34,7 +34,7 @@ scmp_device::scmp_device(const machine_config &mconfig, const char *tag, device_
}
-scmp_device::scmp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+scmp_device::scmp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0), m_AC(0), m_ER(0), m_SR(0), m_program(nullptr), m_direct(nullptr), m_icount(0)
, m_flag_out_func(*this)
@@ -47,52 +47,52 @@ scmp_device::scmp_device(const machine_config &mconfig, device_type type, const
}
-ins8060_device::ins8060_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ins8060_device::ins8060_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: scmp_device(mconfig, INS8060, "INS 8060 SC/MP II", tag, owner, clock, "ins8060", __FILE__)
{
}
-offs_t scmp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t scmp_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( scmp );
return CPU_DISASSEMBLE_NAME(scmp)(this, buffer, pc, oprom, opram, options);
}
-UINT16 scmp_device::ADD12(UINT16 addr, INT8 val)
+uint16_t scmp_device::ADD12(uint16_t addr, int8_t val)
{
return ((addr + val) & 0x0fff) | (addr & 0xf000);
}
-UINT8 scmp_device::ROP()
+uint8_t scmp_device::ROP()
{
- UINT16 pc = m_PC.w.l;
+ uint16_t pc = m_PC.w.l;
m_PC.w.l = ADD12(m_PC.w.l,1);
return m_direct->read_byte( pc);
}
-UINT8 scmp_device::ARG()
+uint8_t scmp_device::ARG()
{
- UINT16 pc = m_PC.w.l;
+ uint16_t pc = m_PC.w.l;
m_PC.w.l = ADD12(m_PC.w.l,1);
return m_direct->read_byte(pc);
}
-UINT8 scmp_device::RM(UINT32 a)
+uint8_t scmp_device::RM(uint32_t a)
{
return m_program->read_byte(a);
}
-void scmp_device::WM(UINT32 a, UINT8 v)
+void scmp_device::WM(uint32_t a, uint8_t v)
{
m_program->write_byte(a, v);
}
-void scmp_device::illegal(UINT8 opcode)
+void scmp_device::illegal(uint8_t opcode)
{
#if VERBOSE
- UINT16 pc = m_PC.w.l;
+ uint16_t pc = m_PC.w.l;
LOG(("SC/MP illegal instruction %04X $%02X\n", pc-1, opcode));
#endif
}
@@ -108,10 +108,10 @@ PAIR *scmp_device::GET_PTR_REG(int num)
}
}
-void scmp_device::BIN_ADD(UINT8 val)
+void scmp_device::BIN_ADD(uint8_t val)
{
- UINT16 tmp = m_AC + val + ((m_SR >> 7) & 1);
- UINT8 ov = (((m_AC & 0x80)==(val & 0x80)) && ((m_AC & 0x80)!=(tmp & 0x80))) ? 0x40 : 0x00;
+ uint16_t tmp = m_AC + val + ((m_SR >> 7) & 1);
+ uint8_t ov = (((m_AC & 0x80)==(val & 0x80)) && ((m_AC & 0x80)!=(tmp & 0x80))) ? 0x40 : 0x00;
m_AC = tmp & 0xff;
m_SR &= 0x3f; // clear CY/L and OV flag
@@ -119,28 +119,28 @@ void scmp_device::BIN_ADD(UINT8 val)
m_SR |= ov;
}
-void scmp_device::DEC_ADD(UINT8 val)
+void scmp_device::DEC_ADD(uint8_t val)
{
- UINT16 tmp = m_AC + val + ((m_SR >> 7) & 1);
+ uint16_t tmp = m_AC + val + ((m_SR >> 7) & 1);
if ((tmp & 0x0f) > 9) tmp +=6;
m_AC = tmp % 0xa0;
m_SR &= 0x7f; // clear CY/L flag
m_SR |= (tmp > 0x99) ? 0x80 : 0x00;
}
-UINT16 scmp_device::GET_ADDR(UINT8 code)
+uint16_t scmp_device::GET_ADDR(uint8_t code)
{
- UINT16 addr;
- INT8 offset;
- UINT16 retVal = 0;
- UINT16 ptr = GET_PTR_REG(code & 0x03)->w.l;
+ uint16_t addr;
+ int8_t offset;
+ uint16_t retVal = 0;
+ uint16_t ptr = GET_PTR_REG(code & 0x03)->w.l;
- UINT8 arg = ARG();
+ uint8_t arg = ARG();
if (arg == 0x80) {
offset = m_ER;
} else {
if (arg & 0x80) {
- offset = (INT8)arg;
+ offset = (int8_t)arg;
} else {
offset = arg;
}
@@ -172,8 +172,8 @@ UINT16 scmp_device::GET_ADDR(UINT8 code)
void scmp_device::execute_one(int opcode)
{
- UINT8 tmp;
- UINT8 ptr = opcode & 3;
+ uint8_t tmp;
+ uint8_t ptr = opcode & 3;
if (BIT(opcode,7)) {
// two bytes instructions
switch (opcode)
@@ -231,7 +231,7 @@ void scmp_device::execute_one(int opcode)
case 0xa8 : case 0xa9 : case 0xaa : case 0xab :
// IDL
{
- UINT16 addr = GET_ADDR(opcode);
+ uint16_t addr = GET_ADDR(opcode);
m_icount -= 22;
m_AC = RM(addr) + 1;
WM(addr,m_AC);
@@ -240,7 +240,7 @@ void scmp_device::execute_one(int opcode)
case 0xb8 : case 0xb9 : case 0xba : case 0xbb :
// DLD
{
- UINT16 addr = GET_ADDR(opcode);
+ uint16_t addr = GET_ADDR(opcode);
m_icount -= 22;
m_AC = RM(addr) - 1;
WM(addr,m_AC);
@@ -278,14 +278,14 @@ void scmp_device::execute_one(int opcode)
// Transfer Instructions
case 0x90 : case 0x91 : case 0x92 : case 0x93 :// JMP
m_icount -= 11;
- m_PC.w.l = ADD12(GET_PTR_REG(ptr)->w.l,(INT8)ARG());
+ m_PC.w.l = ADD12(GET_PTR_REG(ptr)->w.l,(int8_t)ARG());
break;
case 0x94 : case 0x95 : case 0x96 : case 0x97 :
// JP
m_icount -= 9;
tmp = ARG();
if (!(m_AC & 0x80)) {
- m_PC.w.l = ADD12(GET_PTR_REG(ptr)->w.l,(INT8)tmp);
+ m_PC.w.l = ADD12(GET_PTR_REG(ptr)->w.l,(int8_t)tmp);
m_icount -= 2;
}
break;
@@ -294,7 +294,7 @@ void scmp_device::execute_one(int opcode)
m_icount -= 9;
tmp = ARG();
if (!m_AC) {
- m_PC.w.l = ADD12(GET_PTR_REG(ptr)->w.l,(INT8)tmp);
+ m_PC.w.l = ADD12(GET_PTR_REG(ptr)->w.l,(int8_t)tmp);
m_icount -= 2;
}
break;
@@ -303,14 +303,14 @@ void scmp_device::execute_one(int opcode)
m_icount -= 9;
tmp = ARG();
if (m_AC) {
- m_PC.w.l = ADD12(GET_PTR_REG(ptr)->w.l,(INT8)tmp);
+ m_PC.w.l = ADD12(GET_PTR_REG(ptr)->w.l,(int8_t)tmp);
m_icount -= 2;
}
break;
// Double-Byte Miscellaneous Instructions
case 0x8f: // DLY
tmp = ARG();
- m_icount -= 13 + (m_AC * 2) + (((UINT32)tmp) << 1) + (((UINT32)tmp) << 9);
+ m_icount -= 13 + (m_AC * 2) + (((uint32_t)tmp) << 1) + (((uint32_t)tmp) << 9);
m_AC = 0xff;
break;
// Others are illegal
@@ -374,7 +374,7 @@ void scmp_device::execute_one(int opcode)
case 0x3c: case 0x3d :case 0x3e: case 0x3f:
// XPPC
{
- UINT16 tmp16 = ADD12(m_PC.w.l,-1); // Since PC is incremented we need to fix it
+ uint16_t tmp16 = ADD12(m_PC.w.l,-1); // Since PC is incremented we need to fix it
m_icount -= 7;
m_PC.w.l = GET_PTR_REG(ptr)->w.l;
GET_PTR_REG(ptr)->w.l = tmp16;
@@ -459,7 +459,7 @@ void scmp_device::execute_one(int opcode)
***************************************************************************/
void scmp_device::take_interrupt()
{
- UINT16 tmp = ADD12(m_PC.w.l,-1); // We fix PC so at return it goes to current location
+ uint16_t tmp = ADD12(m_PC.w.l,-1); // We fix PC so at return it goes to current location
m_SR &= 0xf7; // clear IE flag
m_icount -= 8; // assumption
diff --git a/src/devices/cpu/scmp/scmp.h b/src/devices/cpu/scmp/scmp.h
index 11aec711060..5e115f778b1 100644
--- a/src/devices/cpu/scmp/scmp.h
+++ b/src/devices/cpu/scmp/scmp.h
@@ -27,8 +27,8 @@ class scmp_device : public cpu_device
{
public:
// construction/destruction
- scmp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- scmp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ scmp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ scmp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// static configuration helpers
template<class _Object> static devcb_base &set_flag_out_cb(device_t &device, _Object object) { return downcast<scmp_device &>(device).m_flag_out_func.set_callback(object); }
@@ -44,9 +44,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 5; }
- virtual UINT32 execute_max_cycles() const override { return 131593; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 5; }
+ virtual uint32_t execute_max_cycles() const override { return 131593; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -56,9 +56,9 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -67,9 +67,9 @@ private:
PAIR m_P1;
PAIR m_P2;
PAIR m_P3;
- UINT8 m_AC;
- UINT8 m_ER;
- UINT8 m_SR;
+ uint8_t m_AC;
+ uint8_t m_ER;
+ uint8_t m_SR;
address_space *m_program;
direct_read_data *m_direct;
@@ -82,16 +82,16 @@ private:
devcb_read_line m_senseb_func;
devcb_write_line m_halt_func;
- inline UINT16 ADD12(UINT16 addr, INT8 val);
- inline UINT8 ROP();
- inline UINT8 ARG();
- inline UINT8 RM(UINT32 a);
- inline void WM(UINT32 a, UINT8 v);
- inline void illegal(UINT8 opcode);
+ inline uint16_t ADD12(uint16_t addr, int8_t val);
+ inline uint8_t ROP();
+ inline uint8_t ARG();
+ inline uint8_t RM(uint32_t a);
+ inline void WM(uint32_t a, uint8_t v);
+ inline void illegal(uint8_t opcode);
inline PAIR *GET_PTR_REG(int num);
- inline void BIN_ADD(UINT8 val);
- inline void DEC_ADD(UINT8 val);
- inline UINT16 GET_ADDR(UINT8 code);
+ inline void BIN_ADD(uint8_t val);
+ inline void DEC_ADD(uint8_t val);
+ inline uint16_t GET_ADDR(uint8_t code);
void execute_one(int opcode);
void take_interrupt();
@@ -102,11 +102,11 @@ class ins8060_device : public scmp_device
{
public:
// construction/destruction
- ins8060_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ins8060_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); }
};
diff --git a/src/devices/cpu/scmp/scmpdasm.cpp b/src/devices/cpu/scmp/scmpdasm.cpp
index f8bcc491ce4..07ddec17e67 100644
--- a/src/devices/cpu/scmp/scmpdasm.cpp
+++ b/src/devices/cpu/scmp/scmpdasm.cpp
@@ -16,14 +16,14 @@
CPU_DISASSEMBLE( scmp )
{
unsigned PC = pc;
- UINT8 op = OP(pc++);
- UINT8 ptr = op & 3;
+ uint8_t op = OP(pc++);
+ uint8_t ptr = op & 3;
if (BIT(op,7)) {
// two bytes instructions
char as[10];
char aspr[10];
- UINT8 arg = ARG(pc); pc++;
+ uint8_t arg = ARG(pc); pc++;
if (arg==0x80) {
sprintf(as,"E");
} else {
diff --git a/src/devices/cpu/score/score.cpp b/src/devices/cpu/score/score.cpp
index f9ae1e5d291..cafaf73eaa0 100644
--- a/src/devices/cpu/score/score.cpp
+++ b/src/devices/cpu/score/score.cpp
@@ -52,7 +52,7 @@ const score7_cpu_device::op_handler score7_cpu_device::s_opcode16_table[8] =
// score7_cpu_device - constructor
//-------------------------------------------------
-score7_cpu_device::score7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+score7_cpu_device::score7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SCORE7, "S+core 7", tag, owner, clock, "score7", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0),
m_pc(0),
@@ -173,7 +173,7 @@ void score7_cpu_device::execute_run()
check_irq();
- UINT32 op = fetch();
+ uint32_t op = fetch();
switch(((op>>30) & 2) | ((op>>15) & 1))
{
@@ -231,7 +231,7 @@ void score7_cpu_device::execute_set_input(int inputnum, int state)
//**************************************************************************
-bool score7_cpu_device::check_condition_branch(UINT8 bc)
+bool score7_cpu_device::check_condition_branch(uint8_t bc)
{
if ((bc & 0x0f) == 14) // CNT>0, CNT--
{
@@ -246,7 +246,7 @@ bool score7_cpu_device::check_condition_branch(UINT8 bc)
return check_condition(bc);
}
-bool score7_cpu_device::check_condition(UINT8 bc)
+bool score7_cpu_device::check_condition(uint8_t bc)
{
switch(bc & 0x0f)
{
@@ -271,44 +271,44 @@ bool score7_cpu_device::check_condition(UINT8 bc)
return false;
}
-INT32 score7_cpu_device::sign_extend(UINT32 data, UINT8 len)
+int32_t score7_cpu_device::sign_extend(uint32_t data, uint8_t len)
{
data &= (1 << len) - 1;
- UINT32 sign = 1 << (len - 1);
+ uint32_t sign = 1 << (len - 1);
return (data ^ sign) - sign;
}
-UINT32 score7_cpu_device::fetch()
+uint32_t score7_cpu_device::fetch()
{
return m_direct->read_dword(m_pc & ~3);
}
-UINT8 score7_cpu_device::read_byte(offs_t offset)
+uint8_t score7_cpu_device::read_byte(offs_t offset)
{
return m_program->read_byte(offset);
}
-UINT16 score7_cpu_device::read_word(offs_t offset)
+uint16_t score7_cpu_device::read_word(offs_t offset)
{
return m_program->read_word(offset & ~1);
}
-UINT32 score7_cpu_device::read_dword(offs_t offset)
+uint32_t score7_cpu_device::read_dword(offs_t offset)
{
return m_program->read_dword(offset & ~3);
}
-void score7_cpu_device::write_byte(offs_t offset, UINT8 data)
+void score7_cpu_device::write_byte(offs_t offset, uint8_t data)
{
m_program->write_byte(offset, data);
}
-void score7_cpu_device::write_word(offs_t offset, UINT16 data)
+void score7_cpu_device::write_word(offs_t offset, uint16_t data)
{
m_program->write_word(offset & ~1, data);
}
-void score7_cpu_device::write_dword(offs_t offset, UINT32 data)
+void score7_cpu_device::write_dword(offs_t offset, uint32_t data)
{
m_program->write_dword(offset & ~3, data);
}
@@ -330,7 +330,7 @@ void score7_cpu_device::check_irq()
}
}
-void score7_cpu_device::gen_exception(int cause, UINT32 param)
+void score7_cpu_device::gen_exception(int cause, uint32_t param)
{
debugger_exception_hook(this, cause);
@@ -376,11 +376,11 @@ void score7_cpu_device::gen_exception(int cause, UINT32 param)
void score7_cpu_device::op_specialform()
{
- UINT8 ra = GET_S_RA(m_op);
- UINT8 rb = GET_S_RB(m_op);
- UINT8 rd = GET_S_RD(m_op);
- UINT8 cu = GET_S_CU(m_op);
- UINT32 r;
+ uint8_t ra = GET_S_RA(m_op);
+ uint8_t rb = GET_S_RB(m_op);
+ uint8_t rd = GET_S_RD(m_op);
+ uint8_t cu = GET_S_CU(m_op);
+ uint32_t r;
switch(GET_S_FUNC6(m_op))
{
@@ -599,18 +599,18 @@ void score7_cpu_device::op_specialform()
break;
case 0x20: // mul
{
- INT64 a = (INT32)m_gpr[ra];
- INT64 b = (INT32)m_gpr[rb];
- UINT64 d = a * b;
+ int64_t a = (int32_t)m_gpr[ra];
+ int64_t b = (int32_t)m_gpr[rb];
+ uint64_t d = a * b;
REG_CEL = d & 0xffffffff;
REG_CEH = (d >> 32) & 0xffffffff;
break;
}
case 0x21: // mulu
{
- UINT64 a = (UINT32)m_gpr[ra];
- UINT64 b = (UINT32)m_gpr[rb];
- UINT64 d = a * b;
+ uint64_t a = (uint32_t)m_gpr[ra];
+ uint64_t b = (uint32_t)m_gpr[rb];
+ uint64_t d = a * b;
REG_CEL = d & 0xffffffff;
REG_CEH = (d >> 32) & 0xffffffff;
break;
@@ -618,8 +618,8 @@ void score7_cpu_device::op_specialform()
case 0x22: // div
if (m_gpr[rb])
{
- INT32 a = (INT32)m_gpr[ra];
- INT32 b = (INT32)m_gpr[rb];
+ int32_t a = (int32_t)m_gpr[ra];
+ int32_t b = (int32_t)m_gpr[rb];
REG_CEL = a / b;
REG_CEH = a % b;
}
@@ -631,8 +631,8 @@ void score7_cpu_device::op_specialform()
case 0x23: // divu
if (m_gpr[rb])
{
- UINT32 a = (UINT32)m_gpr[ra];
- UINT32 b = (UINT32)m_gpr[rb];
+ uint32_t a = (uint32_t)m_gpr[ra];
+ uint32_t b = (uint32_t)m_gpr[rb];
REG_CEL = a / b;
REG_CEH = a % b;
}
@@ -754,11 +754,11 @@ void score7_cpu_device::op_specialform()
void score7_cpu_device::op_iform1()
{
- UINT8 rd = GET_I_RD(m_op);
- UINT32 imm16 = GET_I_IMM16(m_op);
- INT32 simm16 = sign_extend(imm16, 16);
- UINT8 cu = GET_I_CU(m_op);
- UINT32 r;
+ uint8_t rd = GET_I_RD(m_op);
+ uint32_t imm16 = GET_I_IMM16(m_op);
+ int32_t simm16 = sign_extend(imm16, 16);
+ uint8_t cu = GET_I_CU(m_op);
+ uint32_t r;
switch(GET_I_FUNC3(m_op))
{
@@ -768,8 +768,8 @@ void score7_cpu_device::op_iform1()
{
CHECK_Z(r);
CHECK_N(r);
- CHECK_V_ADD(m_gpr[rd], (UINT32)simm16, r);
- CHECK_C_ADD(m_gpr[rd], (UINT32)simm16);
+ CHECK_V_ADD(m_gpr[rd], (uint32_t)simm16, r);
+ CHECK_C_ADD(m_gpr[rd], (uint32_t)simm16);
}
m_gpr[rd] = r;
break;
@@ -779,8 +779,8 @@ void score7_cpu_device::op_iform1()
r = m_gpr[rd] - simm16;
CHECK_Z(r);
CHECK_N(r);
- CHECK_V_SUB(m_gpr[rd], (UINT32)simm16, r);
- CHECK_C_SUB(m_gpr[rd], (UINT32)simm16);
+ CHECK_V_SUB(m_gpr[rd], (uint32_t)simm16, r);
+ CHECK_C_SUB(m_gpr[rd], (uint32_t)simm16);
}
break;
case 4: // andi
@@ -817,8 +817,8 @@ void score7_cpu_device::op_jump()
void score7_cpu_device::op_rixform1()
{
- UINT8 ra = GET_RIX_RA(m_op);
- UINT8 rd = GET_RIX_RD(m_op);
+ uint8_t ra = GET_RIX_RA(m_op);
+ uint8_t rd = GET_RIX_RD(m_op);
// pre-increment
m_gpr[ra] += sign_extend(GET_RIX_IMM12(m_op), 12);
@@ -856,7 +856,7 @@ void score7_cpu_device::op_branch()
{
if (check_condition_branch(GET_BC_BC(m_op)))
{
- INT32 disp = sign_extend(GET_BC_DISP19(m_op), 19) << 1;
+ int32_t disp = sign_extend(GET_BC_DISP19(m_op), 19) << 1;
if (GET_BC_LK(m_op))
REG_LNK = m_pc;
@@ -866,11 +866,11 @@ void score7_cpu_device::op_branch()
void score7_cpu_device::op_iform2()
{
- UINT8 rd = GET_I_RD(m_op);
- UINT32 imm16 = GET_I_IMM16(m_op) << 16;
- INT32 simm16 = (INT32)imm16;
- UINT8 cu = GET_I_CU(m_op);
- UINT32 r;
+ uint8_t rd = GET_I_RD(m_op);
+ uint32_t imm16 = GET_I_IMM16(m_op) << 16;
+ int32_t simm16 = (int32_t)imm16;
+ uint8_t cu = GET_I_CU(m_op);
+ uint32_t r;
switch(GET_I_FUNC3(m_op))
{
@@ -925,8 +925,8 @@ void score7_cpu_device::op_crform()
if ((REG_PSR & 0x08) && !(REG_PSR & 0x10000000))
return;
- UINT8 cr = GET_CR_CR(m_op);
- UINT8 rd = GET_CR_RD(m_op);
+ uint8_t cr = GET_CR_CR(m_op);
+ uint8_t rd = GET_CR_RD(m_op);
switch(GET_CR_OP(m_op))
{
@@ -951,8 +951,8 @@ void score7_cpu_device::op_crform()
void score7_cpu_device::op_rixform2()
{
- UINT8 ra = GET_RIX_RA(m_op);
- UINT8 rd = GET_RIX_RD(m_op);
+ uint8_t ra = GET_RIX_RA(m_op);
+ uint8_t rd = GET_RIX_RD(m_op);
switch(GET_RIX_FUNC3(m_op))
{
@@ -988,27 +988,27 @@ void score7_cpu_device::op_rixform2()
void score7_cpu_device::op_addri()
{
- UINT8 ra = GET_RI_RA(m_op);
- UINT8 rd = GET_RI_RD(m_op);
- INT32 simm14 = sign_extend(GET_RI_IMM14(m_op), 14);
- UINT8 cu = GET_RI_CU(m_op);
+ uint8_t ra = GET_RI_RA(m_op);
+ uint8_t rd = GET_RI_RD(m_op);
+ int32_t simm14 = sign_extend(GET_RI_IMM14(m_op), 14);
+ uint8_t cu = GET_RI_CU(m_op);
- UINT32 r = m_gpr[ra] + simm14;
+ uint32_t r = m_gpr[ra] + simm14;
if (cu)
{
CHECK_Z(r);
CHECK_N(r);
- CHECK_V_ADD(m_gpr[ra], (UINT32)simm14, r);
- CHECK_C_ADD(m_gpr[ra], (UINT32)simm14);
+ CHECK_V_ADD(m_gpr[ra], (uint32_t)simm14, r);
+ CHECK_C_ADD(m_gpr[ra], (uint32_t)simm14);
}
m_gpr[rd] = r;
}
void score7_cpu_device::op_andri()
{
- UINT8 ra = GET_RI_RA(m_op);
- UINT8 rd = GET_RI_RD(m_op);
- UINT32 imm14 = GET_RI_IMM14(m_op);
+ uint8_t ra = GET_RI_RA(m_op);
+ uint8_t rd = GET_RI_RD(m_op);
+ uint32_t imm14 = GET_RI_IMM14(m_op);
m_gpr[rd] = m_gpr[ra] & imm14;
@@ -1021,9 +1021,9 @@ void score7_cpu_device::op_andri()
void score7_cpu_device::op_orri()
{
- UINT8 ra = GET_RI_RA(m_op);
- UINT8 rd = GET_RI_RD(m_op);
- UINT32 imm14 = GET_RI_IMM14(m_op);
+ uint8_t ra = GET_RI_RA(m_op);
+ uint8_t rd = GET_RI_RD(m_op);
+ uint32_t imm14 = GET_RI_IMM14(m_op);
m_gpr[rd] = m_gpr[ra] | imm14;
@@ -1036,72 +1036,72 @@ void score7_cpu_device::op_orri()
void score7_cpu_device::op_lw()
{
- UINT8 rd = GET_LS_RD(m_op);
- UINT8 ra = GET_LS_RA(m_op);
- INT32 simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
+ uint8_t rd = GET_LS_RD(m_op);
+ uint8_t ra = GET_LS_RA(m_op);
+ int32_t simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
m_gpr[rd] = read_dword(m_gpr[ra] + simm15);
}
void score7_cpu_device::op_lh()
{
- UINT8 rd = GET_LS_RD(m_op);
- UINT8 ra = GET_LS_RA(m_op);
- INT32 simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
+ uint8_t rd = GET_LS_RD(m_op);
+ uint8_t ra = GET_LS_RA(m_op);
+ int32_t simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
m_gpr[rd] = sign_extend(read_word(m_gpr[ra] + simm15), 16);
}
void score7_cpu_device::op_lhu()
{
- UINT8 rd = GET_LS_RD(m_op);
- UINT8 ra = GET_LS_RA(m_op);
- INT32 simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
+ uint8_t rd = GET_LS_RD(m_op);
+ uint8_t ra = GET_LS_RA(m_op);
+ int32_t simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
m_gpr[rd] = read_word(m_gpr[ra] + simm15);
}
void score7_cpu_device::op_lb()
{
- UINT8 rd = GET_LS_RD(m_op);
- UINT8 ra = GET_LS_RA(m_op);
- INT32 simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
+ uint8_t rd = GET_LS_RD(m_op);
+ uint8_t ra = GET_LS_RA(m_op);
+ int32_t simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
m_gpr[rd] = sign_extend(read_byte(m_gpr[ra] + simm15), 8);
}
void score7_cpu_device::op_sw()
{
- UINT8 rd = GET_LS_RD(m_op);
- UINT8 ra = GET_LS_RA(m_op);
- INT32 simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
+ uint8_t rd = GET_LS_RD(m_op);
+ uint8_t ra = GET_LS_RA(m_op);
+ int32_t simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
write_dword(m_gpr[ra] + simm15, m_gpr[rd]);
}
void score7_cpu_device::op_sh()
{
- UINT8 rd = GET_LS_RD(m_op);
- UINT8 ra = GET_LS_RA(m_op);
- INT32 simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
+ uint8_t rd = GET_LS_RD(m_op);
+ uint8_t ra = GET_LS_RA(m_op);
+ int32_t simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
write_word(m_gpr[ra] + simm15, m_gpr[rd] & 0xffff);
}
void score7_cpu_device::op_lbu()
{
- UINT8 rd = GET_LS_RD(m_op);
- UINT8 ra = GET_LS_RA(m_op);
- INT32 simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
+ uint8_t rd = GET_LS_RD(m_op);
+ uint8_t ra = GET_LS_RA(m_op);
+ int32_t simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
m_gpr[rd] = read_byte(m_gpr[ra] + simm15);
}
void score7_cpu_device::op_sb()
{
- UINT8 rd = GET_LS_RD(m_op);
- UINT8 ra = GET_LS_RA(m_op);
- INT32 simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
+ uint8_t rd = GET_LS_RD(m_op);
+ uint8_t ra = GET_LS_RA(m_op);
+ int32_t simm15 = sign_extend(GET_LS_IMM15(m_op), 15);
write_byte(m_gpr[ra] + simm15, m_gpr[rd] & 0xff);
}
@@ -1123,8 +1123,8 @@ void score7_cpu_device::op_cenew()
void score7_cpu_device::op_rform1()
{
- UINT8 rd = GET_R_RD(m_op);
- UINT8 ra = GET_R_RA(m_op);
+ uint8_t rd = GET_R_RD(m_op);
+ uint8_t ra = GET_R_RA(m_op);
switch(GET_R_FUNC4(m_op))
{
@@ -1160,9 +1160,9 @@ void score7_cpu_device::op_rform1()
void score7_cpu_device::op_rform2()
{
- UINT8 rd = GET_R_RD(m_op);
- UINT8 ra = GET_R_RA(m_op);
- UINT32 r;
+ uint8_t rd = GET_R_RD(m_op);
+ uint8_t ra = GET_R_RA(m_op);
+ uint32_t r;
switch(GET_R_FUNC4(m_op))
{
@@ -1266,8 +1266,8 @@ void score7_cpu_device::op_ldiu()
void score7_cpu_device::op_iform1a()
{
- UINT8 rd = GET_I16_RD(m_op);
- UINT8 imm5 = GET_I16_IMM5(m_op);
+ uint8_t rd = GET_I16_RD(m_op);
+ uint8_t imm5 = GET_I16_IMM5(m_op);
switch(GET_I16_FUNC3(m_op))
{
@@ -1308,8 +1308,8 @@ void score7_cpu_device::op_iform1a()
void score7_cpu_device::op_iform1b()
{
- UINT8 rd = GET_I16_RD(m_op);
- UINT16 imm5 = GET_I16_IMM5(m_op);
+ uint8_t rd = GET_I16_RD(m_op);
+ uint16_t imm5 = GET_I16_IMM5(m_op);
switch(GET_I16_FUNC3(m_op))
{
diff --git a/src/devices/cpu/score/score.h b/src/devices/cpu/score/score.h
index ba7058196f8..be2456f3f59 100644
--- a/src/devices/cpu/score/score.h
+++ b/src/devices/cpu/score/score.h
@@ -33,16 +33,16 @@ class score7_cpu_device : public cpu_device
{
public:
// construction/destruction
- score7_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ score7_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 64; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 64; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -53,28 +53,28 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
// helpers
- bool check_condition_branch(UINT8 bc);
- bool check_condition(UINT8 bc);
- INT32 sign_extend(UINT32 data, UINT8 len);
- UINT32 fetch();
- UINT8 read_byte(offs_t offset);
- UINT16 read_word(offs_t offset);
- UINT32 read_dword(offs_t offset);
- void write_byte(offs_t offset, UINT8 data);
- void write_word(offs_t offset, UINT16 data);
- void write_dword(offs_t offset, UINT32 data);
+ bool check_condition_branch(uint8_t bc);
+ bool check_condition(uint8_t bc);
+ int32_t sign_extend(uint32_t data, uint8_t len);
+ uint32_t fetch();
+ uint8_t read_byte(offs_t offset);
+ uint16_t read_word(offs_t offset);
+ uint32_t read_dword(offs_t offset);
+ void write_byte(offs_t offset, uint8_t data);
+ void write_word(offs_t offset, uint16_t data);
+ void write_dword(offs_t offset, uint32_t data);
void check_irq();
- void gen_exception(int cause, UINT32 param = 0);
+ void gen_exception(int cause, uint32_t param = 0);
- offs_t disasm(char *buffer, offs_t pc, UINT32 opcode);
- char *disasm32(char *buffer, offs_t pc, UINT32 opcode);
- char *disasm16(char *buffer, offs_t pc, UINT16 opcode);
+ offs_t disasm(char *buffer, offs_t pc, uint32_t opcode);
+ char *disasm32(char *buffer, offs_t pc, uint32_t opcode);
+ char *disasm16(char *buffer, offs_t pc, uint16_t opcode);
void unemulated_op(const char * op);
// 32-bit opcodes
@@ -117,13 +117,13 @@ private:
// internal state
int m_icount;
- UINT32 m_pc;
- UINT32 m_ppc;
- UINT32 m_op;
- UINT32 m_gpr[0x20];
- UINT32 m_cr[0x20];
- UINT32 m_sr[3];
- UINT32 m_ce[2];
+ uint32_t m_pc;
+ uint32_t m_ppc;
+ uint32_t m_op;
+ uint32_t m_gpr[0x20];
+ uint32_t m_cr[0x20];
+ uint32_t m_sr[3];
+ uint32_t m_ce[2];
bool m_pending_interrupt[64];
// opcodes tables
diff --git a/src/devices/cpu/score/scoredsm.cpp b/src/devices/cpu/score/scoredsm.cpp
index 9537278f883..0ca0ff77b5e 100644
--- a/src/devices/cpu/score/scoredsm.cpp
+++ b/src/devices/cpu/score/scoredsm.cpp
@@ -23,15 +23,15 @@ const char *const score7_cpu_device::m_i1b_op[8] = { "lwp", "lhp", "", "lbup",
const char *const score7_cpu_device::m_cr_op[2] = { "mtcr", "mfcr" };
-char *score7_cpu_device::disasm32(char *buffer, offs_t pc, UINT32 opcode)
+char *score7_cpu_device::disasm32(char *buffer, offs_t pc, uint32_t opcode)
{
switch((opcode >> 25) & 0x1f)
{
case 0x00: // Special-form
{
- UINT8 ra = GET_S_RA(opcode);
- UINT8 rb = GET_S_RB(opcode);
- UINT8 rd = GET_S_RD(opcode);
+ uint8_t ra = GET_S_RA(opcode);
+ uint8_t rb = GET_S_RB(opcode);
+ uint8_t rd = GET_S_RD(opcode);
const char *cu = GET_S_CU(opcode) ? ".c": "";
const char *lk = GET_S_LK(opcode) ? "l": "";
@@ -180,14 +180,14 @@ char *score7_cpu_device::disasm32(char *buffer, offs_t pc, UINT32 opcode)
return buffer;
}
-char *score7_cpu_device::disasm16(char *buffer, offs_t pc, UINT16 opcode)
+char *score7_cpu_device::disasm16(char *buffer, offs_t pc, uint16_t opcode)
{
switch((opcode >> 12) & 0x07)
{
case 0x00: // R-form-1
{
- UINT8 rd = GET_R_RD(opcode);
- UINT8 ra = GET_R_RA(opcode);
+ uint8_t rd = GET_R_RD(opcode);
+ uint8_t ra = GET_R_RA(opcode);
switch(GET_R_FUNC4(opcode))
{
@@ -256,9 +256,9 @@ char *score7_cpu_device::disasm16(char *buffer, offs_t pc, UINT16 opcode)
return buffer;
}
-offs_t score7_cpu_device::disasm(char *buffer, offs_t pc, UINT32 opcode)
+offs_t score7_cpu_device::disasm(char *buffer, offs_t pc, uint32_t opcode)
{
- UINT8 p = (pc & 0x02) ? 0 : (((opcode>>30) & 2) | ((opcode>>15) & 1));
+ uint8_t p = (pc & 0x02) ? 0 : (((opcode>>30) & 2) | ((opcode>>15) & 1));
switch(p)
{
@@ -286,9 +286,9 @@ offs_t score7_cpu_device::disasm(char *buffer, offs_t pc, UINT32 opcode)
// helper function
//-------------------------------------------------
-offs_t score7_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t score7_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
- UINT32 opcode = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
+ uint32_t opcode = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
return disasm(buffer, pc, opcode);
}
diff --git a/src/devices/cpu/score/scorem.h b/src/devices/cpu/score/scorem.h
index 0f809e817fe..c9752d59ff8 100644
--- a/src/devices/cpu/score/scorem.h
+++ b/src/devices/cpu/score/scorem.h
@@ -91,11 +91,11 @@
#define SET_T(f) if (f) REG_CR |= FLAG_T; else REG_CR &= ~FLAG_T;
#define CHECK_Z(r) SET_Z((r)==0)
-#define CHECK_N(r) SET_N((INT32)(r) < 0)
+#define CHECK_N(r) SET_N((int32_t)(r) < 0)
#define CHECK_C_ADD(a,b) SET_C((a) > (0xffffffffu - (b)))
#define CHECK_C_SUB(a,b) SET_C((a) >= (b))
-#define CHECK_V_ADD(a,b,d) SET_V((INT32)(((a) ^ (d)) & ((b) ^ (d))) < 0)
-#define CHECK_V_SUB(a,b,d) SET_V((INT32)(((a) ^ (b)) & ((a) ^ (d))) < 0)
+#define CHECK_V_ADD(a,b,d) SET_V((int32_t)(((a) ^ (d)) & ((b) ^ (d))) < 0)
+#define CHECK_V_SUB(a,b,d) SET_V((int32_t)(((a) ^ (b)) & ((a) ^ (d))) < 0)
// registers
diff --git a/src/devices/cpu/scudsp/scudsp.cpp b/src/devices/cpu/scudsp/scudsp.cpp
index d4e393c8ac3..24880437d21 100644
--- a/src/devices/cpu/scudsp/scudsp.cpp
+++ b/src/devices/cpu/scudsp/scudsp.cpp
@@ -128,7 +128,7 @@ const device_type SCUDSP = &device_creator<scudsp_cpu_device>;
#define scudsp_readmem(A,MD) m_data->read_dword((A | (MD << 6)) << 2)
#define scudsp_writemem(A,MD,B) m_data->write_dword((A | (MD << 6)) << 2, B)
-UINT32 scudsp_cpu_device::scudsp_get_source_mem_reg_value( UINT32 mode )
+uint32_t scudsp_cpu_device::scudsp_get_source_mem_reg_value( uint32_t mode )
{
if ( mode < 0x8 )
{
@@ -139,17 +139,17 @@ UINT32 scudsp_cpu_device::scudsp_get_source_mem_reg_value( UINT32 mode )
switch( mode )
{
case 0x9:
- return (UINT32)((m_alu & U64(0x00000000ffffffff)) >> 0);
+ return (uint32_t)((m_alu & U64(0x00000000ffffffff)) >> 0);
case 0xA:
- return (UINT32)((m_alu & U64(0x0000ffffffff0000)) >> 16);
+ return (uint32_t)((m_alu & U64(0x0000ffffffff0000)) >> 16);
}
}
return 0;
}
-UINT32 scudsp_cpu_device::scudsp_get_source_mem_value(UINT8 mode)
+uint32_t scudsp_cpu_device::scudsp_get_source_mem_value(uint8_t mode)
{
- UINT32 value = 0;
+ uint32_t value = 0;
switch( mode )
{
@@ -186,7 +186,7 @@ UINT32 scudsp_cpu_device::scudsp_get_source_mem_value(UINT8 mode)
return value;
}
-void scudsp_cpu_device::scudsp_set_dest_mem_reg( UINT32 mode, UINT32 value )
+void scudsp_cpu_device::scudsp_set_dest_mem_reg( uint32_t mode, uint32_t value )
{
switch( mode )
{
@@ -244,7 +244,7 @@ void scudsp_cpu_device::scudsp_set_dest_mem_reg( UINT32 mode, UINT32 value )
}
}
-void scudsp_cpu_device::scudsp_set_dest_mem_reg_2( UINT32 mode, UINT32 value )
+void scudsp_cpu_device::scudsp_set_dest_mem_reg_2( uint32_t mode, uint32_t value )
{
if ( mode < 0xb )
{
@@ -263,9 +263,9 @@ void scudsp_cpu_device::scudsp_set_dest_mem_reg_2( UINT32 mode, UINT32 value )
}
}
-UINT32 scudsp_cpu_device::scudsp_compute_condition( UINT32 condition )
+uint32_t scudsp_cpu_device::scudsp_compute_condition( uint32_t condition )
{
- UINT32 result = 0;
+ uint32_t result = 0;
switch( condition & 0xf )
{
@@ -293,7 +293,7 @@ UINT32 scudsp_cpu_device::scudsp_compute_condition( UINT32 condition )
return result;
}
-void scudsp_cpu_device::scudsp_set_dest_dma_mem( UINT32 memcode, UINT32 value, UINT32 counter )
+void scudsp_cpu_device::scudsp_set_dest_dma_mem( uint32_t memcode, uint32_t value, uint32_t counter )
{
if ( memcode < 4 )
{
@@ -321,7 +321,7 @@ void scudsp_cpu_device::scudsp_set_dest_dma_mem( UINT32 memcode, UINT32 value, U
}
}
-UINT32 scudsp_cpu_device::scudsp_get_mem_source_dma( UINT32 memcode, UINT32 counter )
+uint32_t scudsp_cpu_device::scudsp_get_mem_source_dma( uint32_t memcode, uint32_t counter )
{
switch( memcode & 0x3 )
{
@@ -345,7 +345,7 @@ READ32_MEMBER( scudsp_cpu_device::program_control_r )
WRITE32_MEMBER( scudsp_cpu_device::program_control_w )
{
- UINT32 oldval, newval;
+ uint32_t oldval, newval;
oldval = (m_flags & 0xffffff00) | (m_pc & 0xff);
newval = oldval;
@@ -382,7 +382,7 @@ WRITE32_MEMBER( scudsp_cpu_device::ram_address_control_w )
READ32_MEMBER( scudsp_cpu_device::ram_address_r )
{
- UINT32 data;
+ uint32_t data;
data = scudsp_get_source_mem_value( ((m_ra & 0xc0) >> 6) + 4 );
@@ -394,10 +394,10 @@ WRITE32_MEMBER( scudsp_cpu_device::ram_address_w )
scudsp_set_dest_mem_reg( (m_ra & 0xc0) >> 6, data );
}
-void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
+void scudsp_cpu_device::scudsp_operation(uint32_t opcode)
{
- INT64 i1,i2;
- INT32 i3;
+ int64_t i1,i2;
+ int32_t i3;
int update_ct[4] = {0,0,0,0};
int dsp_mem;
@@ -409,14 +409,14 @@ void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
break;
case 0x1: /* AND */
i3 = m_acl.si & m_pl.si;
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
SET_Z(i3 == 0);
SET_C(0);
SET_S(i3 < 0);
break;
case 0x2: /* OR */
i3 = m_acl.si | m_pl.si;
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
SET_C(0);
SET_S(i3 < 0);
/* TODO: Croc and some early Psygnosis games wants Z to be 1 when the result of this one is negative.
@@ -427,14 +427,14 @@ void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
break;
case 0x3: /* XOR */
i3 = m_acl.si ^ m_pl.si;
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
SET_Z(i3 == 0);
SET_C(0);
SET_S(i3 < 0);
break;
case 0x4: /* ADD */
i3 = m_acl.si + m_pl.si;
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
//SET_Z(i3 == 0);
SET_Z( (i3 & S64(0xffffffffffff)) == 0 );
//SET_S(i3 < 0);
@@ -444,15 +444,15 @@ void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
break;
case 0x5: /* SUB */
i3 = m_acl.si - m_pl.si;
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
SET_Z(i3 == 0);
SET_C(i3 & S64(0x100000000));
SET_S(i3 < 0);
SET_V(((m_pl.si) ^ (m_acl.si)) & ((m_pl.si) ^ (i3)) & 0x80000000);
break;
case 0x6: /* AD2 */
- i1 = concat_64((INT32)m_ph.si,m_pl.si);
- i2 = concat_64((INT32)m_ach.si,m_acl.si);
+ i1 = concat_64((int32_t)m_ph.si,m_pl.si);
+ i2 = concat_64((int32_t)m_ach.si,m_acl.si);
m_alu = i1 + i2;
SET_Z((m_alu & S64(0xffffffffffff)) == 0);
SET_S((m_alu & S64(0x800000000000)) > 0);
@@ -464,28 +464,28 @@ void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
break;
case 0x8: /* SR */
i3 = (m_acl.si >> 1) | (m_acl.si & 0x80000000);/*MSB does not change*/
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
SET_Z(i3 == 0);
SET_S(i3 < 0);
SET_C(m_acl.ui & 0x80000000);
break;
case 0x9: /* RR */
i3 = ((m_acl.ui >> 1) & 0x7fffffff) | ((m_acl.ui << 31) & 0x80000000);
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
SET_Z( i3 == 0 );
SET_S( i3 < 0 );
SET_C( m_acl.ui & 0x1 );
break;
case 0xa: /* SL */
i3 = m_acl.si << 1;
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
SET_Z( i3 == 0 );
SET_S( i3 < 0 );
SET_C( m_acl.ui & 0x80000000 );
break;
case 0xB: /* RL */
i3 = ((m_acl.si << 1) & 0xfffffffe) | ((m_acl.si >> 31) & 0x1);
- m_alu = (UINT64)(UINT32)i3;
+ m_alu = (uint64_t)(uint32_t)i3;
SET_Z( i3 == 0 );
SET_S( i3 < 0 );
SET_C( m_acl.ui & 0x80000000 );
@@ -523,8 +523,8 @@ void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
case 0x1: /* NOP ? */
break;
case 0x2: /* MOV MUL,P */
- m_ph.ui = (UINT16)((m_mul & U64(0x0000ffff00000000)) >> 32);
- m_pl.ui = (UINT32)((m_mul & U64(0x00000000ffffffff)) >> 0);
+ m_ph.ui = (uint16_t)((m_mul & U64(0x0000ffff00000000)) >> 32);
+ m_pl.ui = (uint32_t)((m_mul & U64(0x00000000ffffffff)) >> 0);
break;
case 0x3: /* MOV [s],P */
dsp_mem = (opcode & 0x700000) >> 20;
@@ -560,8 +560,8 @@ void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
m_ach.ui = 0;
break;
case 0x2: /* MOV ALU,A */
- m_ach.ui = (UINT16)((m_alu & U64(0x0000ffff00000000)) >> 32);
- m_acl.ui = (UINT32)((m_alu & U64(0x00000000ffffffff)) >> 0);
+ m_ach.ui = (uint16_t)((m_alu & U64(0x0000ffff00000000)) >> 32);
+ m_acl.ui = (uint32_t)((m_alu & U64(0x00000000ffffffff)) >> 0);
break;
case 0x3: /* MOV [s], A */
dsp_mem = (opcode & 0x1C000 ) >> 14;
@@ -588,7 +588,7 @@ void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
case 0x0: /* NOP */
break;
case 0x1: /* MOV SImm,[d] */
- scudsp_set_dest_mem_reg( (opcode & 0xf00) >> 8, (INT32)(INT8)(opcode & 0xff) );
+ scudsp_set_dest_mem_reg( (opcode & 0xf00) >> 8, (int32_t)(int8_t)(opcode & 0xff) );
break;
case 0x2:
/* ??? */
@@ -601,9 +601,9 @@ void scudsp_cpu_device::scudsp_operation(UINT32 opcode)
m_icount -= 1;
}
-void scudsp_cpu_device::scudsp_move_immediate( UINT32 opcode )
+void scudsp_cpu_device::scudsp_move_immediate( uint32_t opcode )
{
- UINT32 value;
+ uint32_t value;
if ( opcode & 0x2000000 )
{
@@ -623,12 +623,12 @@ void scudsp_cpu_device::scudsp_move_immediate( UINT32 opcode )
m_icount -= 1;
}
-void scudsp_cpu_device::scudsp_dma( UINT32 opcode )
+void scudsp_cpu_device::scudsp_dma( uint32_t opcode )
{
- UINT8 hold = (opcode & 0x4000) >> 14;
- UINT32 add = (opcode & 0x38000) >> 15;
- UINT32 dir_from_D0 = (opcode & 0x1000 ) >> 12;
- UINT32 dsp_mem = (opcode & 0x300) >> 8;
+ uint8_t hold = (opcode & 0x4000) >> 14;
+ uint32_t add = (opcode & 0x38000) >> 15;
+ uint32_t dir_from_D0 = (opcode & 0x1000 ) >> 12;
+ uint32_t dsp_mem = (opcode & 0x300) >> 8;
T0F_1;
@@ -676,7 +676,7 @@ void scudsp_cpu_device::scudsp_dma( UINT32 opcode )
/* HACK ALERT: It looks like that scheduling craps out the m_dma parameters, why this happens I don't know ... */
#if INSTA_DMA
{
- UINT32 data;
+ uint32_t data;
if ( m_dma.dir == 0 )
{
for(m_dma.count = 0;m_dma.count < m_dma.size; m_dma.count++)
@@ -726,7 +726,7 @@ void scudsp_cpu_device::scudsp_dma( UINT32 opcode )
m_icount -= 1;
}
-void scudsp_cpu_device::scudsp_jump( UINT32 opcode )
+void scudsp_cpu_device::scudsp_jump( uint32_t opcode )
{
if ( opcode & 0x3f80000 )
{
@@ -745,7 +745,7 @@ void scudsp_cpu_device::scudsp_jump( UINT32 opcode )
m_icount -= 1;
}
-void scudsp_cpu_device::scudsp_loop(UINT32 opcode)
+void scudsp_cpu_device::scudsp_loop(uint32_t opcode)
{
if ( opcode & 0x8000000 )
{
@@ -770,7 +770,7 @@ void scudsp_cpu_device::scudsp_loop(UINT32 opcode)
m_icount -= 1;
}
-void scudsp_cpu_device::scudsp_end(UINT32 opcode)
+void scudsp_cpu_device::scudsp_end(uint32_t opcode)
{
if(opcode & 0x08000000)
{
@@ -784,7 +784,7 @@ void scudsp_cpu_device::scudsp_end(UINT32 opcode)
m_icount -= 1;
}
-void scudsp_cpu_device::scudsp_illegal(UINT32 opcode)
+void scudsp_cpu_device::scudsp_illegal(uint32_t opcode)
{
fatalerror("scudsp illegal opcode at 0x%04x\n", m_pc);
m_icount -= 1;
@@ -792,7 +792,7 @@ void scudsp_cpu_device::scudsp_illegal(UINT32 opcode)
void scudsp_cpu_device::scudsp_exec_dma()
{
- UINT32 data;
+ uint32_t data;
if ( m_dma.dir == 0 )
{
data = (m_in_dma_cb(m_dma.src)<<16) | m_in_dma_cb(m_dma.src+2);
@@ -833,7 +833,7 @@ void scudsp_cpu_device::scudsp_exec_dma()
/* Execute cycles */
void scudsp_cpu_device::execute_run()
{
- UINT32 opcode;
+ uint32_t opcode;
do
{
@@ -884,7 +884,7 @@ void scudsp_cpu_device::execute_run()
if ( m_update_mul == 1 )
{
- m_mul = (INT64)m_rx.si * (INT64)m_ry.si;
+ m_mul = (int64_t)m_rx.si * (int64_t)m_ry.si;
m_update_mul = 0;
}
@@ -1000,7 +1000,7 @@ void scudsp_cpu_device::execute_set_input(int irqline, int state)
}
}
-scudsp_cpu_device::scudsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+scudsp_cpu_device::scudsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SCUDSP, "SCUDSP", tag, owner, clock, "scudsp", __FILE__)
, m_out_irq_cb(*this)
, m_in_dma_cb(*this)
@@ -1033,7 +1033,7 @@ void scudsp_cpu_device::state_string_export(const device_state_entry &entry, std
}
-offs_t scudsp_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t scudsp_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( scudsp );
return CPU_DISASSEMBLE_NAME(scudsp)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/scudsp/scudsp.h b/src/devices/cpu/scudsp/scudsp.h
index a5827b05e41..423cf1df2f0 100644
--- a/src/devices/cpu/scudsp/scudsp.h
+++ b/src/devices/cpu/scudsp/scudsp.h
@@ -49,20 +49,20 @@ enum
#define SCUDSP_RESET INPUT_LINE_RESET /* Non-Maskable */
union SCUDSPREG32 {
- INT32 si;
- UINT32 ui;
+ int32_t si;
+ uint32_t ui;
};
union SCUDSPREG16 {
- INT16 si;
- UINT16 ui;
+ int16_t si;
+ uint16_t ui;
};
class scudsp_cpu_device : public cpu_device
{
public:
// construction/destruction
- scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
template<class _Object> static devcb_base &set_out_irq_callback(device_t &device, _Object object) { return downcast<scudsp_cpu_device &>(device).m_out_irq_cb.set_callback(object); }
template<class _Object> static devcb_base &set_in_dma_callback(device_t &device, _Object object) { return downcast<scudsp_cpu_device &>(device).m_in_dma_cb.set_callback(object); }
@@ -86,9 +86,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 7; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 7; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -99,9 +99,9 @@ protected:
void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
devcb_write_line m_out_irq_cb;
devcb_read16 m_in_dma_cb;
@@ -111,47 +111,47 @@ private:
address_space_config m_program_config;
address_space_config m_data_config;
- UINT8 m_pc; /* registers */
- UINT32 m_flags; /* flags */
- UINT8 m_ra;
- UINT8 m_ct0,m_ct1,m_ct2,m_ct3;
- UINT8 m_delay; /* Delay */
- UINT8 m_top; /*Jump Command memory*/
- UINT16 m_lop; /*Counter Register*/ /*12-bits*/
+ uint8_t m_pc; /* registers */
+ uint32_t m_flags; /* flags */
+ uint8_t m_ra;
+ uint8_t m_ct0,m_ct1,m_ct2,m_ct3;
+ uint8_t m_delay; /* Delay */
+ uint8_t m_top; /*Jump Command memory*/
+ uint16_t m_lop; /*Counter Register*/ /*12-bits*/
SCUDSPREG32 m_rx; /*X-Bus register*/
- INT64 m_mul; /*Multiplier register*//*48-bits*/
+ int64_t m_mul; /*Multiplier register*//*48-bits*/
SCUDSPREG32 m_ry; /*Y-Bus register*/
- INT64 m_alu; /*ALU register*/ /*48-bits*/
+ int64_t m_alu; /*ALU register*/ /*48-bits*/
SCUDSPREG16 m_ph; /*ALU high register*/
SCUDSPREG32 m_pl; /*ALU low register*/
SCUDSPREG16 m_ach; /*ALU external high register*/
SCUDSPREG32 m_acl; /*ALU external low register*/
- UINT32 m_ra0,m_wa0; /*DSP DMA registers*/
+ uint32_t m_ra0,m_wa0; /*DSP DMA registers*/
struct{
- UINT32 src, dst;
- UINT16 add;
- UINT16 size, update, ex, dir, count;
+ uint32_t src, dst;
+ uint16_t add;
+ uint16_t size, update, ex, dir, count;
}m_dma;
address_space *m_program;
address_space *m_data;
int m_icount;
- UINT8 m_update_mul;
-
- UINT32 scudsp_get_source_mem_reg_value( UINT32 mode );
- UINT32 scudsp_get_source_mem_value(UINT8 mode);
- void scudsp_set_dest_mem_reg( UINT32 mode, UINT32 value );
- void scudsp_set_dest_mem_reg_2( UINT32 mode, UINT32 value );
- UINT32 scudsp_compute_condition( UINT32 condition );
- UINT32 scudsp_get_mem_source_dma( UINT32 memcode, UINT32 counter );
- void scudsp_set_dest_dma_mem( UINT32 memcode, UINT32 value, UINT32 counter );
-
- void scudsp_illegal(UINT32 opcode);
- void scudsp_operation(UINT32 opcode);
- void scudsp_move_immediate(UINT32 opcode);
- void scudsp_dma(UINT32 opcode);
- void scudsp_jump(UINT32 opcode);
- void scudsp_loop(UINT32 opcode);
- void scudsp_end(UINT32 opcode);
+ uint8_t m_update_mul;
+
+ uint32_t scudsp_get_source_mem_reg_value( uint32_t mode );
+ uint32_t scudsp_get_source_mem_value(uint8_t mode);
+ void scudsp_set_dest_mem_reg( uint32_t mode, uint32_t value );
+ void scudsp_set_dest_mem_reg_2( uint32_t mode, uint32_t value );
+ uint32_t scudsp_compute_condition( uint32_t condition );
+ uint32_t scudsp_get_mem_source_dma( uint32_t memcode, uint32_t counter );
+ void scudsp_set_dest_dma_mem( uint32_t memcode, uint32_t value, uint32_t counter );
+
+ void scudsp_illegal(uint32_t opcode);
+ void scudsp_operation(uint32_t opcode);
+ void scudsp_move_immediate(uint32_t opcode);
+ void scudsp_dma(uint32_t opcode);
+ void scudsp_jump(uint32_t opcode);
+ void scudsp_loop(uint32_t opcode);
+ void scudsp_end(uint32_t opcode);
void scudsp_exec_dma();
};
diff --git a/src/devices/cpu/scudsp/scudspdasm.cpp b/src/devices/cpu/scudsp/scudspdasm.cpp
index d5e79a2cbd7..007e55f6e67 100644
--- a/src/devices/cpu/scudsp/scudspdasm.cpp
+++ b/src/devices/cpu/scudsp/scudspdasm.cpp
@@ -135,7 +135,7 @@ static const char *const DMA_Command[] =
};
-static void scudsp_dasm_prefix( const char* format, char* buffer, UINT32 *data )
+static void scudsp_dasm_prefix( const char* format, char* buffer, uint32_t *data )
{
for ( ; *format; format++ )
{
@@ -239,12 +239,12 @@ static void scudsp_dasm_prefix( const char* format, char* buffer, UINT32 *data )
CPU_DISASSEMBLE( scudsp )
{
- UINT32 op = oprom[0]<<24|oprom[1]<<16|oprom[2]<<8|oprom[3]<<0;
+ uint32_t op = oprom[0]<<24|oprom[1]<<16|oprom[2]<<8|oprom[3]<<0;
unsigned size = 1;
// const char *sym, *sym2;
char *my_buffer = buffer;
char temp_buffer[64];
- UINT32 data[4];
+ uint32_t data[4];
switch( op >> 30 )
{
diff --git a/src/devices/cpu/se3208/se3208.cpp b/src/devices/cpu/se3208/se3208.cpp
index 8889d1def61..aea03b94669 100644
--- a/src/devices/cpu/se3208/se3208.cpp
+++ b/src/devices/cpu/se3208/se3208.cpp
@@ -36,7 +36,7 @@
#define SEX(bits,val) ((val)&(1<<(bits-1))?((val)|(~((1<<bits)-1))):(val&((1<<bits)-1)))
//Precompute the instruction decoding in a big table
-#define INST(a) void se3208_device::a(UINT16 Opcode)
+#define INST(a) void se3208_device::a(uint16_t Opcode)
// officeye and donghaer perform unaligned DWORD accesses, allowing them to happen causes the games to malfunction.
// are such accesses simply illegal, be handled in a different way, or simply not be happening in the first place?
@@ -45,14 +45,14 @@
const device_type SE3208 = &device_creator<se3208_device>;
-se3208_device::se3208_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+se3208_device::se3208_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SE3208, "SE3208", tag, owner, clock, "se3208", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0), m_PC(0), m_SR(0), m_SP(0), m_ER(0), m_PPC(0), m_program(nullptr), m_direct(nullptr), m_IRQ(0), m_NMI(0), m_icount(0)
{
}
-UINT32 se3208_device::read_dword_unaligned(address_space &space, UINT32 address)
+uint32_t se3208_device::read_dword_unaligned(address_space &space, uint32_t address)
{
if (DWORD_ALIGNED(address))
return space.read_dword(address);
@@ -67,7 +67,7 @@ UINT32 se3208_device::read_dword_unaligned(address_space &space, UINT32 address)
}
}
-UINT16 se3208_device::read_word_unaligned(address_space &space, UINT32 address)
+uint16_t se3208_device::read_word_unaligned(address_space &space, uint32_t address)
{
if (!WORD_ALIGNED(address))
return space.read_byte(address) | space.read_byte(address+1)<<8;
@@ -75,7 +75,7 @@ UINT16 se3208_device::read_word_unaligned(address_space &space, UINT32 address)
return space.read_word(address);
}
-void se3208_device::write_dword_unaligned(address_space &space, UINT32 address, UINT32 data)
+void se3208_device::write_dword_unaligned(address_space &space, uint32_t address, uint32_t data)
{
if (DWORD_ALIGNED(address))
space.write_dword(address, data);
@@ -92,7 +92,7 @@ void se3208_device::write_dword_unaligned(address_space &space, UINT32 address,
}
-void se3208_device::write_word_unaligned(address_space &space, UINT32 address, UINT16 data)
+void se3208_device::write_word_unaligned(address_space &space, uint32_t address, uint16_t data)
{
if (!WORD_ALIGNED(address))
{
@@ -106,41 +106,41 @@ void se3208_device::write_word_unaligned(address_space &space, UINT32 address, U
}
-UINT8 se3208_device::SE3208_Read8(UINT32 addr)
+uint8_t se3208_device::SE3208_Read8(uint32_t addr)
{
return m_program->read_byte(addr);
}
-UINT16 se3208_device::SE3208_Read16(UINT32 addr)
+uint16_t se3208_device::SE3208_Read16(uint32_t addr)
{
return read_word_unaligned(*m_program,addr);
}
-UINT32 se3208_device::SE3208_Read32(UINT32 addr)
+uint32_t se3208_device::SE3208_Read32(uint32_t addr)
{
return read_dword_unaligned(*m_program,addr);
}
-void se3208_device::SE3208_Write8(UINT32 addr,UINT8 val)
+void se3208_device::SE3208_Write8(uint32_t addr,uint8_t val)
{
m_program->write_byte(addr,val);
}
-void se3208_device::SE3208_Write16(UINT32 addr,UINT16 val)
+void se3208_device::SE3208_Write16(uint32_t addr,uint16_t val)
{
write_word_unaligned(*m_program,addr,val);
}
-void se3208_device::SE3208_Write32(UINT32 addr,UINT32 val)
+void se3208_device::SE3208_Write32(uint32_t addr,uint32_t val)
{
write_dword_unaligned(*m_program,addr,val);
}
-UINT32 se3208_device::AddWithFlags(UINT32 a,UINT32 b)
+uint32_t se3208_device::AddWithFlags(uint32_t a,uint32_t b)
{
- UINT32 r=a+b;
+ uint32_t r=a+b;
CLRFLAG(FLAG_Z|FLAG_C|FLAG_V|FLAG_S);
if(!r)
SETFLAG(FLAG_Z);
@@ -153,9 +153,9 @@ UINT32 se3208_device::AddWithFlags(UINT32 a,UINT32 b)
return r;
}
-UINT32 se3208_device::SubWithFlags(UINT32 a,UINT32 b) //a-b
+uint32_t se3208_device::SubWithFlags(uint32_t a,uint32_t b) //a-b
{
- UINT32 r=a-b;
+ uint32_t r=a-b;
CLRFLAG(FLAG_Z|FLAG_C|FLAG_V|FLAG_S);
if(!r)
SETFLAG(FLAG_Z);
@@ -168,10 +168,10 @@ UINT32 se3208_device::SubWithFlags(UINT32 a,UINT32 b) //a-b
return r;
}
-UINT32 se3208_device::AdcWithFlags(UINT32 a,UINT32 b)
+uint32_t se3208_device::AdcWithFlags(uint32_t a,uint32_t b)
{
- UINT32 C=(m_SR&FLAG_C)?1:0;
- UINT32 r=a+b+C;
+ uint32_t C=(m_SR&FLAG_C)?1:0;
+ uint32_t r=a+b+C;
CLRFLAG(FLAG_Z|FLAG_C|FLAG_V|FLAG_S);
if(!r)
SETFLAG(FLAG_Z);
@@ -185,10 +185,10 @@ UINT32 se3208_device::AdcWithFlags(UINT32 a,UINT32 b)
}
-UINT32 se3208_device::SbcWithFlags(UINT32 a,UINT32 b)
+uint32_t se3208_device::SbcWithFlags(uint32_t a,uint32_t b)
{
- UINT32 C=(m_SR&FLAG_C)?1:0;
- UINT32 r=a-b-C;
+ uint32_t C=(m_SR&FLAG_C)?1:0;
+ uint32_t r=a-b-C;
CLRFLAG(FLAG_Z|FLAG_C|FLAG_V|FLAG_S);
if(!r)
SETFLAG(FLAG_Z);
@@ -201,21 +201,21 @@ UINT32 se3208_device::SbcWithFlags(UINT32 a,UINT32 b)
return r;
}
-UINT32 se3208_device::MulWithFlags(UINT32 a,UINT32 b)
+uint32_t se3208_device::MulWithFlags(uint32_t a,uint32_t b)
{
- INT64 r=(INT64) a*(INT64) b;
+ int64_t r=(int64_t) a*(int64_t) b;
CLRFLAG(FLAG_V);
if(r>>32)
SETFLAG(FLAG_V);
- return (UINT32) (r&0xffffffff);
+ return (uint32_t) (r&0xffffffff);
}
-UINT32 se3208_device::NegWithFlags(UINT32 a)
+uint32_t se3208_device::NegWithFlags(uint32_t a)
{
return SubWithFlags(0,a);
}
-UINT32 se3208_device::AsrWithFlags(UINT32 Val, UINT8 By)
+uint32_t se3208_device::AsrWithFlags(uint32_t Val, uint8_t By)
{
signed int v=(signed int) Val;
v>>=By;
@@ -226,12 +226,12 @@ UINT32 se3208_device::AsrWithFlags(UINT32 Val, UINT8 By)
SETFLAG(FLAG_S);
if(Val&(1<<(By-1)))
SETFLAG(FLAG_C);
- return (UINT32) v;
+ return (uint32_t) v;
}
-UINT32 se3208_device::LsrWithFlags(UINT32 Val, UINT8 By)
+uint32_t se3208_device::LsrWithFlags(uint32_t Val, uint8_t By)
{
- UINT32 v=Val;
+ uint32_t v=Val;
v>>=By;
CLRFLAG(FLAG_Z|FLAG_C|FLAG_V|FLAG_S);
if(!v)
@@ -243,9 +243,9 @@ UINT32 se3208_device::LsrWithFlags(UINT32 Val, UINT8 By)
return v;
}
-UINT32 se3208_device::AslWithFlags(UINT32 Val, UINT8 By)
+uint32_t se3208_device::AslWithFlags(uint32_t Val, uint8_t By)
{
- UINT32 v=Val;
+ uint32_t v=Val;
v<<=By;
CLRFLAG(FLAG_Z|FLAG_C|FLAG_V|FLAG_S);
if(!v)
@@ -265,10 +265,10 @@ INST(INVALIDOP)
INST(LDB)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
- UINT32 Val;
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Val;
if(Index)
Index=m_R[Index];
@@ -286,9 +286,9 @@ INST(LDB)
INST(STB)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
if(Index)
Index=m_R[Index];
@@ -305,10 +305,10 @@ INST(STB)
INST(LDS)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
- UINT32 Val;
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Val;
Offset<<=1;
@@ -328,9 +328,9 @@ INST(LDS)
INST(STS)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=1;
@@ -349,9 +349,9 @@ INST(STS)
INST(LD)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=2;
@@ -370,9 +370,9 @@ INST(LD)
INST(ST)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=2;
@@ -391,10 +391,10 @@ INST(ST)
INST(LDBU)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
- UINT32 Val;
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Val;
if(Index)
Index=m_R[Index];
@@ -412,10 +412,10 @@ INST(LDBU)
INST(LDSU)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
- UINT32 Val;
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Val;
Offset<<=1;
@@ -436,7 +436,7 @@ INST(LDSU)
INST(LERI)
{
- UINT32 Imm=EXTRACT(Opcode,0,13);
+ uint32_t Imm=EXTRACT(Opcode,0,13);
if(TESTFLAG(FLAG_E))
m_ER=(EXTRACT(m_ER,0,17)<<14)|Imm;
else
@@ -448,9 +448,9 @@ INST(LERI)
INST(LDSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Index=m_SP;
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Index=m_SP;
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=2;
@@ -464,9 +464,9 @@ INST(LDSP)
INST(STSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Index=m_SP;
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Index=m_SP;
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=2;
@@ -478,22 +478,22 @@ INST(STSP)
CLRFLAG(FLAG_E);
}
-void se3208_device::PushVal(UINT32 Val)
+void se3208_device::PushVal(uint32_t Val)
{
m_SP-=4;
SE3208_Write32(m_SP,Val);
}
-UINT32 se3208_device::PopVal()
+uint32_t se3208_device::PopVal()
{
- UINT32 Val=SE3208_Read32(m_SP);
+ uint32_t Val=SE3208_Read32(m_SP);
m_SP+=4;
return Val;
}
INST(PUSH)
{
- UINT32 Set=EXTRACT(Opcode,0,10);
+ uint32_t Set=EXTRACT(Opcode,0,10);
if(Set&(1<<10))
PushVal(m_PC);
if(Set&(1<<9))
@@ -520,7 +520,7 @@ INST(PUSH)
INST(POP)
{
- UINT32 Set=EXTRACT(Opcode,0,10);
+ uint32_t Set=EXTRACT(Opcode,0,10);
if(Set&(1<<0))
m_R[0]=PopVal();
if(Set&(1<<1))
@@ -549,8 +549,8 @@ INST(POP)
INST(LEATOSP)
{
- UINT32 Offset=EXTRACT(Opcode,9,12);
- UINT32 Index=EXTRACT(Opcode,3,5);
+ uint32_t Offset=EXTRACT(Opcode,9,12);
+ uint32_t Index=EXTRACT(Opcode,3,5);
if(Index)
Index=m_R[Index];
@@ -569,8 +569,8 @@ INST(LEATOSP)
INST(LEAFROMSP)
{
- UINT32 Offset=EXTRACT(Opcode,9,12);
- UINT32 Index=EXTRACT(Opcode,3,5);
+ uint32_t Offset=EXTRACT(Opcode,9,12);
+ uint32_t Index=EXTRACT(Opcode,3,5);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,27)<<4)|(Offset&0xf);
@@ -584,7 +584,7 @@ INST(LEAFROMSP)
INST(LEASPTOSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
Offset<<=2;
@@ -600,16 +600,16 @@ INST(LEASPTOSP)
INST(MOV)
{
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,9,11);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,9,11);
m_R[Dst]=m_R[Src];
}
INST(LDI)
{
- UINT32 Dst=EXTRACT(Opcode,8,10);
- UINT32 Imm=EXTRACT(Opcode,0,7);
+ uint32_t Dst=EXTRACT(Opcode,8,10);
+ uint32_t Imm=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -623,10 +623,10 @@ INST(LDI)
INST(LDBSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 Index=m_SP;
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
- UINT32 Val;
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t Index=m_SP;
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Val;
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,27)<<4)|(Offset&0xf);
@@ -639,9 +639,9 @@ INST(LDBSP)
INST(STBSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 Index=m_SP;
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t Index=m_SP;
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,27)<<4)|(Offset&0xf);
@@ -653,10 +653,10 @@ INST(STBSP)
INST(LDSSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 Index=m_SP;
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
- UINT32 Val;
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t Index=m_SP;
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Val;
Offset<<=1;
@@ -671,9 +671,9 @@ INST(LDSSP)
INST(STSSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 Index=m_SP;
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t Index=m_SP;
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
Offset<<=1;
@@ -687,10 +687,10 @@ INST(STSSP)
INST(LDBUSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 Index=m_SP;
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
- UINT32 Val;
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t Index=m_SP;
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Val;
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,27)<<4)|(Offset&0xf);
@@ -703,10 +703,10 @@ INST(LDBUSP)
INST(LDSUSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 Index=m_SP;
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
- UINT32 Val;
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t Index=m_SP;
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Val;
Offset<<=1;
@@ -721,9 +721,9 @@ INST(LDSUSP)
INST(ADDI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -737,9 +737,9 @@ INST(ADDI)
INST(SUBI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -753,9 +753,9 @@ INST(SUBI)
INST(ADCI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -769,9 +769,9 @@ INST(ADCI)
INST(SBCI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -785,9 +785,9 @@ INST(SBCI)
INST(ANDI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -805,9 +805,9 @@ INST(ANDI)
INST(ORI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -825,9 +825,9 @@ INST(ORI)
INST(XORI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -845,8 +845,8 @@ INST(XORI)
INST(CMPI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -860,9 +860,9 @@ INST(CMPI)
INST(TSTI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst;
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(m_ER,0,27)<<4)|(Imm&0xf);
@@ -880,45 +880,45 @@ INST(TSTI)
INST(ADD)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
m_R[Dst]=AddWithFlags(m_R[Src1],m_R[Src2]);
}
INST(SUB)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
m_R[Dst]=SubWithFlags(m_R[Src1],m_R[Src2]);
}
INST(ADC)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
m_R[Dst]=AdcWithFlags(m_R[Src1],m_R[Src2]);
}
INST(SBC)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
m_R[Dst]=SbcWithFlags(m_R[Src1],m_R[Src2]);
}
INST(AND)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
m_R[Dst]=m_R[Src1]&m_R[Src2];
@@ -931,9 +931,9 @@ INST(AND)
INST(OR)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
m_R[Dst]=m_R[Src1]|m_R[Src2];
@@ -947,9 +947,9 @@ INST(OR)
INST(XOR)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
m_R[Dst]=m_R[Src1]^m_R[Src2];
@@ -963,17 +963,17 @@ INST(XOR)
INST(CMP)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
SubWithFlags(m_R[Src1],m_R[Src2]);
}
INST(TST)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst;
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst;
Dst=m_R[Src1]&m_R[Src2];
@@ -986,9 +986,9 @@ INST(TST)
INST(MULS)
{
- UINT32 Src2=EXTRACT(Opcode,6,8);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,6,8);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
m_R[Dst]=MulWithFlags(m_R[Src1],m_R[Src2]);
@@ -997,15 +997,15 @@ INST(MULS)
INST(NEG)
{
- UINT32 Dst=EXTRACT(Opcode,9,11);
- UINT32 Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,9,11);
+ uint32_t Src=EXTRACT(Opcode,3,5);
m_R[Dst]=NegWithFlags(m_R[Src]);
}
INST(CALL)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1020,7 +1020,7 @@ INST(CALL)
INST(JV)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1039,7 +1039,7 @@ INST(JV)
INST(JNV)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1057,7 +1057,7 @@ INST(JNV)
INST(JC)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1075,7 +1075,7 @@ INST(JC)
INST(JNC)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1093,7 +1093,7 @@ INST(JNC)
INST(JP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1111,7 +1111,7 @@ INST(JP)
INST(JM)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1129,7 +1129,7 @@ INST(JM)
INST(JNZ)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1147,7 +1147,7 @@ INST(JNZ)
INST(JZ)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1165,9 +1165,9 @@ INST(JZ)
INST(JGE)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 S=TESTFLAG(FLAG_S)?1:0;
- UINT32 V=TESTFLAG(FLAG_V)?1:0;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t S=TESTFLAG(FLAG_S)?1:0;
+ uint32_t V=TESTFLAG(FLAG_V)?1:0;
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1185,9 +1185,9 @@ INST(JGE)
INST(JLE)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 S=TESTFLAG(FLAG_S)?1:0;
- UINT32 V=TESTFLAG(FLAG_V)?1:0;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t S=TESTFLAG(FLAG_S)?1:0;
+ uint32_t V=TESTFLAG(FLAG_V)?1:0;
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1204,7 +1204,7 @@ INST(JLE)
INST(JHI)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1222,7 +1222,7 @@ INST(JHI)
INST(JLS)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1240,9 +1240,9 @@ INST(JLS)
INST(JGT)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 S=TESTFLAG(FLAG_S)?1:0;
- UINT32 V=TESTFLAG(FLAG_V)?1:0;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t S=TESTFLAG(FLAG_S)?1:0;
+ uint32_t V=TESTFLAG(FLAG_V)?1:0;
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1260,9 +1260,9 @@ INST(JGT)
INST(JLT)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 S=TESTFLAG(FLAG_S)?1:0;
- UINT32 V=TESTFLAG(FLAG_V)?1:0;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t S=TESTFLAG(FLAG_S)?1:0;
+ uint32_t V=TESTFLAG(FLAG_V)?1:0;
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1282,7 +1282,7 @@ INST(JLT)
INST(JMP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(m_ER,0,22)<<8)|Offset;
@@ -1298,7 +1298,7 @@ INST(JMP)
INST(JR)
{
- UINT32 Src=EXTRACT(Opcode,0,3);
+ uint32_t Src=EXTRACT(Opcode,0,3);
m_PC=m_R[Src]-2;
@@ -1307,7 +1307,7 @@ INST(JR)
INST(CALLR)
{
- UINT32 Src=EXTRACT(Opcode,0,3);
+ uint32_t Src=EXTRACT(Opcode,0,3);
PushVal(m_PC+2);
m_PC=m_R[Src]-2;
@@ -1316,10 +1316,10 @@ INST(CALLR)
INST(ASR)
{
- UINT32 CS=Opcode&(1<<10);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm=EXTRACT(Opcode,5,9);
- UINT32 Cnt=EXTRACT(Opcode,5,7);
+ uint32_t CS=Opcode&(1<<10);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,5,9);
+ uint32_t Cnt=EXTRACT(Opcode,5,7);
if(CS)
m_R[Dst]=AsrWithFlags(m_R[Dst],m_R[Cnt]&0x1f);
@@ -1331,10 +1331,10 @@ INST(ASR)
INST(LSR)
{
- UINT32 CS=Opcode&(1<<10);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm=EXTRACT(Opcode,5,9);
- UINT32 Cnt=EXTRACT(Opcode,5,7);
+ uint32_t CS=Opcode&(1<<10);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,5,9);
+ uint32_t Cnt=EXTRACT(Opcode,5,7);
if(CS)
m_R[Dst]=LsrWithFlags(m_R[Dst],m_R[Cnt]&0x1f);
@@ -1346,10 +1346,10 @@ INST(LSR)
INST(ASL)
{
- UINT32 CS=Opcode&(1<<10);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm=EXTRACT(Opcode,5,9);
- UINT32 Cnt=EXTRACT(Opcode,5,7);
+ uint32_t CS=Opcode&(1<<10);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,5,9);
+ uint32_t Cnt=EXTRACT(Opcode,5,7);
if(CS)
m_R[Dst]=AslWithFlags(m_R[Dst],m_R[Cnt]&0x1f);
@@ -1361,8 +1361,8 @@ INST(ASL)
INST(EXTB)
{
- UINT32 Dst=EXTRACT(Opcode,0,3);
- UINT32 Val=m_R[Dst];
+ uint32_t Dst=EXTRACT(Opcode,0,3);
+ uint32_t Val=m_R[Dst];
m_R[Dst]=SEX8(Val);
@@ -1376,8 +1376,8 @@ INST(EXTB)
INST(EXTS)
{
- UINT32 Dst=EXTRACT(Opcode,0,3);
- UINT32 Val=m_R[Dst];
+ uint32_t Dst=EXTRACT(Opcode,0,3);
+ uint32_t Val=m_R[Dst];
m_R[Dst]=SEX16(Val);
@@ -1390,21 +1390,21 @@ INST(EXTS)
INST(SET)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
m_SR|=(1<<Imm);
}
INST(CLR)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
m_SR&=~(1<<Imm);
}
INST(SWI)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
if(!TESTFLAG(FLAG_ENI))
return;
@@ -1418,33 +1418,33 @@ INST(SWI)
INST(HALT)
{
-// UINT32 Imm=EXTRACT(Opcode,0,3);
+// uint32_t Imm=EXTRACT(Opcode,0,3);
// DEBUGMESSAGE("HALT\t0x%x",Imm);
}
INST(MVTC)
{
-// UINT32 Imm=EXTRACT(Opcode,0,3);
+// uint32_t Imm=EXTRACT(Opcode,0,3);
// DEBUGMESSAGE("MVTC\t%%R0,%%CR%d",Imm);
}
INST(MVFC)
{
-// UINT32 Imm=EXTRACT(Opcode,0,3);
+// uint32_t Imm=EXTRACT(Opcode,0,3);
// DEBUGMESSAGE("MVFC\t%%CR0%d,%%R0",Imm);
}
-se3208_device::_OP se3208_device::DecodeOp(UINT16 Opcode)
+se3208_device::_OP se3208_device::DecodeOp(uint16_t Opcode)
{
switch(EXTRACT(Opcode,14,15))
{
case 0x0:
{
- UINT8 Op=EXTRACT(Opcode,11,13);
+ uint8_t Op=EXTRACT(Opcode,11,13);
switch(Op)
{
case 0x0:
@@ -1750,7 +1750,7 @@ void se3208_device::execute_run()
{
do
{
- UINT16 Opcode=m_direct->read_word(m_PC, WORD_XOR_LE(0));
+ uint16_t Opcode=m_direct->read_word(m_PC, WORD_XOR_LE(0));
m_PPC = m_PC;
debugger_instruction_hook(this, m_PC);
@@ -1838,7 +1838,7 @@ void se3208_device::execute_set_input( int line, int state )
m_IRQ=state;
}
-offs_t se3208_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t se3208_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( se3208 );
return CPU_DISASSEMBLE_NAME(se3208)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/se3208/se3208.h b/src/devices/cpu/se3208/se3208.h
index fbed0d6452b..a4fac45e1dd 100644
--- a/src/devices/cpu/se3208/se3208.h
+++ b/src/devices/cpu/se3208/se3208.h
@@ -14,7 +14,7 @@ class se3208_device : public cpu_device
{
public:
// construction/destruction
- se3208_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ se3208_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -22,9 +22,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -35,131 +35,131 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
//GPR
- UINT32 m_R[8];
+ uint32_t m_R[8];
//SPR
- UINT32 m_PC;
- UINT32 m_SR;
- UINT32 m_SP;
- UINT32 m_ER;
- UINT32 m_PPC;
+ uint32_t m_PC;
+ uint32_t m_SR;
+ uint32_t m_SP;
+ uint32_t m_ER;
+ uint32_t m_PPC;
address_space *m_program;
direct_read_data *m_direct;
- UINT8 m_IRQ;
- UINT8 m_NMI;
+ uint8_t m_IRQ;
+ uint8_t m_NMI;
int m_icount;
- inline UINT32 read_dword_unaligned(address_space &space, UINT32 address);
- inline UINT16 read_word_unaligned(address_space &space, UINT32 address);
- inline void write_dword_unaligned(address_space &space, UINT32 address, UINT32 data);
- inline void write_word_unaligned(address_space &space, UINT32 address, UINT16 data);
- inline UINT8 SE3208_Read8(UINT32 addr);
- inline UINT16 SE3208_Read16(UINT32 addr);
- inline UINT32 SE3208_Read32(UINT32 addr);
- inline void SE3208_Write8(UINT32 addr,UINT8 val);
- inline void SE3208_Write16(UINT32 addr,UINT16 val);
- inline void SE3208_Write32(UINT32 addr,UINT32 val);
- inline UINT32 AddWithFlags(UINT32 a,UINT32 b);
- inline UINT32 SubWithFlags(UINT32 a,UINT32 b);
- inline UINT32 AdcWithFlags(UINT32 a,UINT32 b);
- inline UINT32 SbcWithFlags(UINT32 a,UINT32 b);
- inline UINT32 MulWithFlags(UINT32 a,UINT32 b);
- inline UINT32 NegWithFlags(UINT32 a);
- inline UINT32 AsrWithFlags(UINT32 Val, UINT8 By);
- inline UINT32 LsrWithFlags(UINT32 Val, UINT8 By);
- inline UINT32 AslWithFlags(UINT32 Val, UINT8 By);
- inline void PushVal(UINT32 Val);
- inline UINT32 PopVal();
-
- typedef void (se3208_device::*_OP)(UINT16 Opcode);
+ inline uint32_t read_dword_unaligned(address_space &space, uint32_t address);
+ inline uint16_t read_word_unaligned(address_space &space, uint32_t address);
+ inline void write_dword_unaligned(address_space &space, uint32_t address, uint32_t data);
+ inline void write_word_unaligned(address_space &space, uint32_t address, uint16_t data);
+ inline uint8_t SE3208_Read8(uint32_t addr);
+ inline uint16_t SE3208_Read16(uint32_t addr);
+ inline uint32_t SE3208_Read32(uint32_t addr);
+ inline void SE3208_Write8(uint32_t addr,uint8_t val);
+ inline void SE3208_Write16(uint32_t addr,uint16_t val);
+ inline void SE3208_Write32(uint32_t addr,uint32_t val);
+ inline uint32_t AddWithFlags(uint32_t a,uint32_t b);
+ inline uint32_t SubWithFlags(uint32_t a,uint32_t b);
+ inline uint32_t AdcWithFlags(uint32_t a,uint32_t b);
+ inline uint32_t SbcWithFlags(uint32_t a,uint32_t b);
+ inline uint32_t MulWithFlags(uint32_t a,uint32_t b);
+ inline uint32_t NegWithFlags(uint32_t a);
+ inline uint32_t AsrWithFlags(uint32_t Val, uint8_t By);
+ inline uint32_t LsrWithFlags(uint32_t Val, uint8_t By);
+ inline uint32_t AslWithFlags(uint32_t Val, uint8_t By);
+ inline void PushVal(uint32_t Val);
+ inline uint32_t PopVal();
+
+ typedef void (se3208_device::*_OP)(uint16_t Opcode);
_OP OpTable[0x10000];
- void INVALIDOP(UINT16 Opcode);
- void LDB(UINT16 Opcode);
- void STB(UINT16 Opcode);
- void LDS(UINT16 Opcode);
- void STS(UINT16 Opcode);
- void LD(UINT16 Opcode);
- void ST(UINT16 Opcode);
- void LDBU(UINT16 Opcode);
- void LDSU(UINT16 Opcode);
- void LERI(UINT16 Opcode);
- void LDSP(UINT16 Opcode);
- void STSP(UINT16 Opcode);
- void PUSH(UINT16 Opcode);
- void POP(UINT16 Opcode);
- void LEATOSP(UINT16 Opcode);
- void LEAFROMSP(UINT16 Opcode);
- void LEASPTOSP(UINT16 Opcode);
- void MOV(UINT16 Opcode);
- void LDI(UINT16 Opcode);
- void LDBSP(UINT16 Opcode);
- void STBSP(UINT16 Opcode);
- void LDSSP(UINT16 Opcode);
- void STSSP(UINT16 Opcode);
- void LDBUSP(UINT16 Opcode);
- void LDSUSP(UINT16 Opcode);
- void ADDI(UINT16 Opcode);
- void SUBI(UINT16 Opcode);
- void ADCI(UINT16 Opcode);
- void SBCI(UINT16 Opcode);
- void ANDI(UINT16 Opcode);
- void ORI(UINT16 Opcode);
- void XORI(UINT16 Opcode);
- void CMPI(UINT16 Opcode);
- void TSTI(UINT16 Opcode);
- void ADD(UINT16 Opcode);
- void SUB(UINT16 Opcode);
- void ADC(UINT16 Opcode);
- void SBC(UINT16 Opcode);
- void AND(UINT16 Opcode);
- void OR(UINT16 Opcode);
- void XOR(UINT16 Opcode);
- void CMP(UINT16 Opcode);
- void TST(UINT16 Opcode);
- void MULS(UINT16 Opcode);
- void NEG(UINT16 Opcode);
- void CALL(UINT16 Opcode);
- void JV(UINT16 Opcode);
- void JNV(UINT16 Opcode);
- void JC(UINT16 Opcode);
- void JNC(UINT16 Opcode);
- void JP(UINT16 Opcode);
- void JM(UINT16 Opcode);
- void JNZ(UINT16 Opcode);
- void JZ(UINT16 Opcode);
- void JGE(UINT16 Opcode);
- void JLE(UINT16 Opcode);
- void JHI(UINT16 Opcode);
- void JLS(UINT16 Opcode);
- void JGT(UINT16 Opcode);
- void JLT(UINT16 Opcode);
- void JMP(UINT16 Opcode);
- void JR(UINT16 Opcode);
- void CALLR(UINT16 Opcode);
- void ASR(UINT16 Opcode);
- void LSR(UINT16 Opcode);
- void ASL(UINT16 Opcode);
- void EXTB(UINT16 Opcode);
- void EXTS(UINT16 Opcode);
- void SET(UINT16 Opcode);
- void CLR(UINT16 Opcode);
- void SWI(UINT16 Opcode);
- void HALT(UINT16 Opcode);
- void MVTC(UINT16 Opcode);
- void MVFC(UINT16 Opcode);
+ void INVALIDOP(uint16_t Opcode);
+ void LDB(uint16_t Opcode);
+ void STB(uint16_t Opcode);
+ void LDS(uint16_t Opcode);
+ void STS(uint16_t Opcode);
+ void LD(uint16_t Opcode);
+ void ST(uint16_t Opcode);
+ void LDBU(uint16_t Opcode);
+ void LDSU(uint16_t Opcode);
+ void LERI(uint16_t Opcode);
+ void LDSP(uint16_t Opcode);
+ void STSP(uint16_t Opcode);
+ void PUSH(uint16_t Opcode);
+ void POP(uint16_t Opcode);
+ void LEATOSP(uint16_t Opcode);
+ void LEAFROMSP(uint16_t Opcode);
+ void LEASPTOSP(uint16_t Opcode);
+ void MOV(uint16_t Opcode);
+ void LDI(uint16_t Opcode);
+ void LDBSP(uint16_t Opcode);
+ void STBSP(uint16_t Opcode);
+ void LDSSP(uint16_t Opcode);
+ void STSSP(uint16_t Opcode);
+ void LDBUSP(uint16_t Opcode);
+ void LDSUSP(uint16_t Opcode);
+ void ADDI(uint16_t Opcode);
+ void SUBI(uint16_t Opcode);
+ void ADCI(uint16_t Opcode);
+ void SBCI(uint16_t Opcode);
+ void ANDI(uint16_t Opcode);
+ void ORI(uint16_t Opcode);
+ void XORI(uint16_t Opcode);
+ void CMPI(uint16_t Opcode);
+ void TSTI(uint16_t Opcode);
+ void ADD(uint16_t Opcode);
+ void SUB(uint16_t Opcode);
+ void ADC(uint16_t Opcode);
+ void SBC(uint16_t Opcode);
+ void AND(uint16_t Opcode);
+ void OR(uint16_t Opcode);
+ void XOR(uint16_t Opcode);
+ void CMP(uint16_t Opcode);
+ void TST(uint16_t Opcode);
+ void MULS(uint16_t Opcode);
+ void NEG(uint16_t Opcode);
+ void CALL(uint16_t Opcode);
+ void JV(uint16_t Opcode);
+ void JNV(uint16_t Opcode);
+ void JC(uint16_t Opcode);
+ void JNC(uint16_t Opcode);
+ void JP(uint16_t Opcode);
+ void JM(uint16_t Opcode);
+ void JNZ(uint16_t Opcode);
+ void JZ(uint16_t Opcode);
+ void JGE(uint16_t Opcode);
+ void JLE(uint16_t Opcode);
+ void JHI(uint16_t Opcode);
+ void JLS(uint16_t Opcode);
+ void JGT(uint16_t Opcode);
+ void JLT(uint16_t Opcode);
+ void JMP(uint16_t Opcode);
+ void JR(uint16_t Opcode);
+ void CALLR(uint16_t Opcode);
+ void ASR(uint16_t Opcode);
+ void LSR(uint16_t Opcode);
+ void ASL(uint16_t Opcode);
+ void EXTB(uint16_t Opcode);
+ void EXTS(uint16_t Opcode);
+ void SET(uint16_t Opcode);
+ void CLR(uint16_t Opcode);
+ void SWI(uint16_t Opcode);
+ void HALT(uint16_t Opcode);
+ void MVTC(uint16_t Opcode);
+ void MVFC(uint16_t Opcode);
void BuildTable(void);
- _OP DecodeOp(UINT16 Opcode);
+ _OP DecodeOp(uint16_t Opcode);
void SE3208_NMI();
void SE3208_Interrupt();
diff --git a/src/devices/cpu/se3208/se3208dis.cpp b/src/devices/cpu/se3208/se3208dis.cpp
index 9de811f846a..3640f0193b4 100644
--- a/src/devices/cpu/se3208/se3208dis.cpp
+++ b/src/devices/cpu/se3208/se3208dis.cpp
@@ -7,9 +7,9 @@
static struct
{
- UINT32 PC;
- UINT32 SR;
- UINT32 ER;
+ uint32_t PC;
+ uint32_t SR;
+ uint32_t ER;
} Context;
#define FLAG_E 0x0800
@@ -25,8 +25,8 @@ static struct
#define ZEX16(val) ((val)&0xFFFF)
#define SEX(bits,val) ((val)&(1<<(bits-1))?((val)|(~((1<<bits)-1))):(val&((1<<bits)-1)))
-typedef UINT32 (*_OP)(UINT16 Opcode,char *dst);
-#define INST(a) static UINT32 a(UINT16 Opcode,char *dst)
+typedef uint32_t (*_OP)(uint16_t Opcode,char *dst);
+#define INST(a) static uint32_t a(uint16_t Opcode,char *dst)
INST(INVALIDOP)
@@ -37,9 +37,9 @@ INST(INVALIDOP)
INST(LDB)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(Context.ER,0,27)<<4)|(Offset&0xf);
@@ -55,9 +55,9 @@ INST(LDB)
INST(STB)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(Context.ER,0,27)<<4)|(Offset&0xf);
@@ -73,9 +73,9 @@ INST(STB)
INST(LDS)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=1;
@@ -93,9 +93,9 @@ INST(LDS)
INST(STS)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=1;
@@ -113,9 +113,9 @@ INST(STS)
INST(LD)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=2;
@@ -133,9 +133,9 @@ INST(LD)
INST(ST)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=2;
@@ -153,9 +153,9 @@ INST(ST)
INST(LDBU)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(Context.ER,0,27)<<4)|(Offset&0xf);
@@ -171,9 +171,9 @@ INST(LDBU)
INST(LDSU)
{
- UINT32 Offset=EXTRACT(Opcode,0,4);
- UINT32 Index=EXTRACT(Opcode,5,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,4);
+ uint32_t Index=EXTRACT(Opcode,5,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=1;
@@ -192,7 +192,7 @@ INST(LDSU)
INST(LERI)
{
- UINT32 Imm=EXTRACT(Opcode,0,13);
+ uint32_t Imm=EXTRACT(Opcode,0,13);
if(TESTFLAG(FLAG_E))
Context.ER=(EXTRACT(Context.ER,0,17)<<14)|Imm;
@@ -208,8 +208,8 @@ INST(LERI)
INST(LDSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=2;
@@ -224,8 +224,8 @@ INST(LDSP)
INST(STSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 SrcDst=EXTRACT(Opcode,8,10);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t SrcDst=EXTRACT(Opcode,8,10);
Offset<<=2;
@@ -240,7 +240,7 @@ INST(STSP)
INST(PUSH)
{
- UINT32 Set=EXTRACT(Opcode,0,10);
+ uint32_t Set=EXTRACT(Opcode,0,10);
char str[1024];
strcpy(str,"PUSH ");
if(Set&(1<<10))
@@ -272,7 +272,7 @@ INST(PUSH)
INST(POP)
{
- UINT32 Set=EXTRACT(Opcode,0,10);
+ uint32_t Set=EXTRACT(Opcode,0,10);
char str[1024];
int Ret=0;
strcpy(str,"POP ");
@@ -311,8 +311,8 @@ INST(POP)
INST(LEATOSP)
{
- UINT32 Offset=EXTRACT(Opcode,9,12);
- UINT32 Index=EXTRACT(Opcode,3,5);
+ uint32_t Offset=EXTRACT(Opcode,9,12);
+ uint32_t Index=EXTRACT(Opcode,3,5);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(Context.ER,0,27)<<4)|(Offset&0xf);
@@ -330,8 +330,8 @@ INST(LEATOSP)
INST(LEAFROMSP)
{
- UINT32 Offset=EXTRACT(Opcode,9,12);
- UINT32 Index=EXTRACT(Opcode,3,5);
+ uint32_t Offset=EXTRACT(Opcode,9,12);
+ uint32_t Index=EXTRACT(Opcode,3,5);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(Context.ER,0,27)<<4)|(Offset&0xf);
@@ -346,7 +346,7 @@ INST(LEAFROMSP)
INST(LEASPTOSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset=EXTRACT(Opcode,0,7);
Offset<<=2;
@@ -364,8 +364,8 @@ INST(LEASPTOSP)
INST(MOV)
{
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,9,11);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,9,11);
if(Src==0 && Dst==0)
sprintf(dst,"NOP");
@@ -376,8 +376,8 @@ INST(MOV)
INST(LDI)
{
- UINT32 Dst=EXTRACT(Opcode,8,10);
- UINT32 Imm=EXTRACT(Opcode,0,7);
+ uint32_t Dst=EXTRACT(Opcode,8,10);
+ uint32_t Imm=EXTRACT(Opcode,0,7);
if(TESTFLAG(FLAG_E))
Imm=(EXTRACT(Context.ER,0,27)<<4)|(Imm&0xf);
@@ -392,8 +392,8 @@ INST(LDI)
INST(LDBSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(Context.ER,0,27)<<4)|(Offset&0xf);
@@ -406,8 +406,8 @@ INST(LDBSP)
INST(STBSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(Context.ER,0,27)<<4)|(Offset&0xf);
@@ -420,8 +420,8 @@ INST(STBSP)
INST(LDSSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
Offset<<=1;
@@ -436,8 +436,8 @@ INST(LDSSP)
INST(STSSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
Offset<<=1;
@@ -452,8 +452,8 @@ INST(STSSP)
INST(LDBUSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
if(TESTFLAG(FLAG_E))
Offset=(EXTRACT(Context.ER,0,27)<<4)|(Offset&0xf);
@@ -466,8 +466,8 @@ INST(LDBUSP)
INST(LDSUSP)
{
- UINT32 Offset=EXTRACT(Opcode,0,3);
- UINT32 SrcDst=EXTRACT(Opcode,4,6);
+ uint32_t Offset=EXTRACT(Opcode,0,3);
+ uint32_t SrcDst=EXTRACT(Opcode,4,6);
Offset<<=1;
@@ -482,10 +482,10 @@ INST(LDSUSP)
INST(ADDI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -500,10 +500,10 @@ INST(ADDI)
INST(SUBI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -519,10 +519,10 @@ INST(SUBI)
INST(ADCI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -537,10 +537,10 @@ INST(ADCI)
INST(SBCI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -555,10 +555,10 @@ INST(SBCI)
INST(ANDI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -573,10 +573,10 @@ INST(ANDI)
INST(ORI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -591,10 +591,10 @@ INST(ORI)
INST(XORI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -609,9 +609,9 @@ INST(XORI)
INST(CMPI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -626,9 +626,9 @@ INST(CMPI)
INST(TSTI)
{
- UINT32 Imm=EXTRACT(Opcode,9,12);
- UINT32 Src=EXTRACT(Opcode,3,5);
- UINT32 Imm2=Imm;
+ uint32_t Imm=EXTRACT(Opcode,9,12);
+ uint32_t Src=EXTRACT(Opcode,3,5);
+ uint32_t Imm2=Imm;
if(TESTFLAG(FLAG_E))
Imm2=(EXTRACT(Context.ER,0,27)<<4)|(Imm2&0xf);
@@ -643,9 +643,9 @@ INST(TSTI)
INST(ADD)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
sprintf(dst,"ADD %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
return 0;
@@ -653,9 +653,9 @@ INST(ADD)
INST(SUB)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
sprintf(dst,"SUB %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
return 0;
@@ -663,9 +663,9 @@ INST(SUB)
INST(ADC)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
sprintf(dst,"ADC %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
return 0;
@@ -673,9 +673,9 @@ INST(ADC)
INST(SBC)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
sprintf(dst,"SBC %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
return 0;
@@ -683,9 +683,9 @@ INST(SBC)
INST(AND)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
sprintf(dst,"AND %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
return 0;
@@ -693,9 +693,9 @@ INST(AND)
INST(OR)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
sprintf(dst,"OR %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
return 0;
@@ -703,9 +703,9 @@ INST(OR)
INST(XOR)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
sprintf(dst,"XOR %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
return 0;
@@ -713,8 +713,8 @@ INST(XOR)
INST(CMP)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
sprintf(dst,"CMP %%SR%d,%%SR%d",Src1,Src2);
return 0;
@@ -722,8 +722,8 @@ INST(CMP)
INST(TST)
{
- UINT32 Src2=EXTRACT(Opcode,9,11);
- UINT32 Src1=EXTRACT(Opcode,3,5);
+ uint32_t Src2=EXTRACT(Opcode,9,11);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
sprintf(dst,"TST %%SR%d,%%SR%d",Src1,Src2);
return 0;
@@ -731,9 +731,9 @@ INST(TST)
INST(MULS)
{
- UINT32 Src2=EXTRACT(Opcode,6,8);
- UINT32 Src1=EXTRACT(Opcode,3,5);
- UINT32 Dst=EXTRACT(Opcode,0,2);
+ uint32_t Src2=EXTRACT(Opcode,6,8);
+ uint32_t Src1=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
sprintf(dst,"MUL %%SR%d,%%SR%d,%%DR%d",Src1,Src2,Dst);
@@ -743,8 +743,8 @@ INST(MULS)
INST(NEG)
{
- UINT32 Dst=EXTRACT(Opcode,9,11);
- UINT32 Src=EXTRACT(Opcode,3,5);
+ uint32_t Dst=EXTRACT(Opcode,9,11);
+ uint32_t Src=EXTRACT(Opcode,3,5);
sprintf(dst,"NEG %%SR%d,%%DR%d",Src,Dst);
return 0;
@@ -752,8 +752,8 @@ INST(NEG)
INST(CALL)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -768,8 +768,8 @@ INST(CALL)
INST(JV)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -784,8 +784,8 @@ INST(JV)
INST(JNV)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -800,8 +800,8 @@ INST(JNV)
INST(JC)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -816,8 +816,8 @@ INST(JC)
INST(JNC)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -832,8 +832,8 @@ INST(JNC)
INST(JP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -848,8 +848,8 @@ INST(JP)
INST(JM)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -864,8 +864,8 @@ INST(JM)
INST(JNZ)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -880,8 +880,8 @@ INST(JNZ)
INST(JZ)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -896,8 +896,8 @@ INST(JZ)
INST(JGE)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -912,8 +912,8 @@ INST(JGE)
INST(JLE)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -928,8 +928,8 @@ INST(JLE)
INST(JHI)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -944,8 +944,8 @@ INST(JHI)
INST(JLS)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -960,8 +960,8 @@ INST(JLS)
INST(JGT)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -976,8 +976,8 @@ INST(JGT)
INST(JLT)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -994,8 +994,8 @@ INST(JLT)
INST(JMP)
{
- UINT32 Offset=EXTRACT(Opcode,0,7);
- UINT32 Offset2;
+ uint32_t Offset=EXTRACT(Opcode,0,7);
+ uint32_t Offset2;
if(TESTFLAG(FLAG_E))
Offset2=(EXTRACT(Context.ER,0,22)<<8)|Offset;
@@ -1010,7 +1010,7 @@ INST(JMP)
INST(JR)
{
- UINT32 Src=EXTRACT(Opcode,0,3);
+ uint32_t Src=EXTRACT(Opcode,0,3);
sprintf(dst,"JR %%R%d",Src);
@@ -1020,7 +1020,7 @@ INST(JR)
INST(CALLR)
{
- UINT32 Src=EXTRACT(Opcode,0,3);
+ uint32_t Src=EXTRACT(Opcode,0,3);
sprintf(dst,"CALLR %%R%d",Src);
@@ -1030,10 +1030,10 @@ INST(CALLR)
INST(ASR)
{
- UINT32 CS=Opcode&(1<<10);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm=EXTRACT(Opcode,5,9);
- UINT32 Cnt=EXTRACT(Opcode,5,7);
+ uint32_t CS=Opcode&(1<<10);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,5,9);
+ uint32_t Cnt=EXTRACT(Opcode,5,7);
if(CS)
sprintf(dst,"ASR %%R%d,%%R%d",Cnt,Dst);
@@ -1046,10 +1046,10 @@ INST(ASR)
INST(LSR)
{
- UINT32 CS=Opcode&(1<<10);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm=EXTRACT(Opcode,5,9);
- UINT32 Cnt=EXTRACT(Opcode,5,7);
+ uint32_t CS=Opcode&(1<<10);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,5,9);
+ uint32_t Cnt=EXTRACT(Opcode,5,7);
if(CS)
sprintf(dst,"LSR %%R%d,%%R%d",Cnt,Dst);
@@ -1062,10 +1062,10 @@ INST(LSR)
INST(ASL)
{
- UINT32 CS=Opcode&(1<<10);
- UINT32 Dst=EXTRACT(Opcode,0,2);
- UINT32 Imm=EXTRACT(Opcode,5,9);
- UINT32 Cnt=EXTRACT(Opcode,5,7);
+ uint32_t CS=Opcode&(1<<10);
+ uint32_t Dst=EXTRACT(Opcode,0,2);
+ uint32_t Imm=EXTRACT(Opcode,5,9);
+ uint32_t Cnt=EXTRACT(Opcode,5,7);
if(CS)
sprintf(dst,"ASL %%R%d,%%R%d",Cnt,Dst);
@@ -1078,7 +1078,7 @@ INST(ASL)
INST(EXTB)
{
- UINT32 Dst=EXTRACT(Opcode,0,3);
+ uint32_t Dst=EXTRACT(Opcode,0,3);
sprintf(dst,"EXTB %%R%d",Dst);
@@ -1088,7 +1088,7 @@ INST(EXTB)
INST(EXTS)
{
- UINT32 Dst=EXTRACT(Opcode,0,3);
+ uint32_t Dst=EXTRACT(Opcode,0,3);
sprintf(dst,"EXTS %%R%d",Dst);
@@ -1098,7 +1098,7 @@ INST(EXTS)
INST(SET)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
sprintf(dst,"SET 0x%x",Imm);
return 0;
@@ -1106,7 +1106,7 @@ INST(SET)
INST(CLR)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
sprintf(dst,"CLR 0x%x",Imm);
return 0;
@@ -1114,7 +1114,7 @@ INST(CLR)
INST(SWI)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
sprintf(dst,"SWI 0x%x",Imm);
return 0;
@@ -1122,7 +1122,7 @@ INST(SWI)
INST(HALT)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
sprintf(dst,"HALT 0x%x",Imm);
return 0;
@@ -1130,7 +1130,7 @@ INST(HALT)
INST(MVTC)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
sprintf(dst,"MVTC %%R0,%%CR%d",Imm);
return 0;
@@ -1138,19 +1138,19 @@ INST(MVTC)
INST(MVFC)
{
- UINT32 Imm=EXTRACT(Opcode,0,3);
+ uint32_t Imm=EXTRACT(Opcode,0,3);
sprintf(dst,"MVFC %%CR0%d,%%R0",Imm);
return 0;
}
-static _OP DecodeOp(UINT16 Opcode)
+static _OP DecodeOp(uint16_t Opcode)
{
switch(EXTRACT(Opcode,14,15))
{
case 0x0:
{
- UINT8 Op=EXTRACT(Opcode,11,13);
+ uint8_t Op=EXTRACT(Opcode,11,13);
switch(Op)
{
case 0x0:
@@ -1402,7 +1402,7 @@ static _OP DecodeOp(UINT16 Opcode)
CPU_DISASSEMBLE( se3208 )
{
- UINT16 Opcode;
+ uint16_t Opcode;
CLRFLAG(FLAG_E);
Context.ER=0;
diff --git a/src/devices/cpu/sh2/sh2.cpp b/src/devices/cpu/sh2/sh2.cpp
index 140f59929d1..415d9cd9645 100644
--- a/src/devices/cpu/sh2/sh2.cpp
+++ b/src/devices/cpu/sh2/sh2.cpp
@@ -69,7 +69,7 @@
20010207 Sylvain Glaize (mokona@puupuu.org)
- - Bug fix in void MOVBM(UINT32 m, UINT32 n) (see comment)
+ - Bug fix in void MOVBM(uint32_t m, uint32_t n) (see comment)
- Support of full 32 bit addressing (RB, RW, RL and WB, WW, WL functions)
reason : when the two high bits of the address are set, access is
done directly in the cache data array. The SUPER KANEKO NOVA SYSTEM
@@ -169,7 +169,7 @@ static ADDRESS_MAP_START( sh7032_map, AS_PROGRAM, 32, sh1_device )
AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
ADDRESS_MAP_END
-sh2_device::sh2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh2_device::sh2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SH2, "SH-2", tag, owner, clock, "sh2", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 32, 0, ADDRESS_MAP_NAME(sh7604_map))
, m_decrypted_program_config("decrypted_opcodes", ENDIANNESS_BIG, 32, 32, 0)
@@ -202,7 +202,7 @@ void sh2_device::device_stop()
}
-sh2_device::sh2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int cpu_type, address_map_constructor internal_map, int addrlines )
+sh2_device::sh2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int cpu_type, address_map_constructor internal_map, int addrlines )
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 32, addrlines, 0, internal_map)
, m_decrypted_program_config("decrypted_opcodes", ENDIANNESS_BIG, 32, addrlines, 0)
@@ -228,12 +228,12 @@ sh2_device::sh2_device(const machine_config &mconfig, device_type type, const ch
m_isdrc = allow_drc();
}
-sh2a_device::sh2a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh2a_device::sh2a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sh2_device(mconfig, SH1, "SH-2A", tag, owner, clock, "sh2a", __FILE__, CPU_TYPE_SH2, ADDRESS_MAP_NAME(sh7021_map), 28 )
{
}
-sh1_device::sh1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh1_device::sh1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sh2_device(mconfig, SH1, "SH-1", tag, owner, clock, "sh1", __FILE__, CPU_TYPE_SH1, ADDRESS_MAP_NAME(sh7032_map), 28 )
{
}
@@ -248,7 +248,7 @@ const address_space_config *sh2_device::memory_space_config(address_spacenum spa
}
}
-offs_t sh2_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sh2_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( sh2 );
return CPU_DISASSEMBLE_NAME( sh2 )(this, buffer, pc, oprom, opram, options);
@@ -262,7 +262,7 @@ offs_t sh2_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opro
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-UINT8 sh2_device::RB(offs_t A)
+uint8_t sh2_device::RB(offs_t A)
{
if((A & 0xf0000000) == 0 || (A & 0xf0000000) == 0x20000000)
return m_program->read_byte(A & AM);
@@ -270,7 +270,7 @@ UINT8 sh2_device::RB(offs_t A)
return m_program->read_byte(A);
}
-UINT16 sh2_device::RW(offs_t A)
+uint16_t sh2_device::RW(offs_t A)
{
if((A & 0xf0000000) == 0 || (A & 0xf0000000) == 0x20000000)
return m_program->read_word(A & AM);
@@ -278,7 +278,7 @@ UINT16 sh2_device::RW(offs_t A)
return m_program->read_word(A);
}
-UINT32 sh2_device::RL(offs_t A)
+uint32_t sh2_device::RL(offs_t A)
{
/* 0x20000000 no Cache */
/* 0x00000000 read thru Cache if CE bit is 1 */
@@ -288,7 +288,7 @@ UINT32 sh2_device::RL(offs_t A)
return m_program->read_dword(A);
}
-void sh2_device::WB(offs_t A, UINT8 V)
+void sh2_device::WB(offs_t A, uint8_t V)
{
if((A & 0xf0000000) == 0 || (A & 0xf0000000) == 0x20000000)
{
@@ -299,7 +299,7 @@ void sh2_device::WB(offs_t A, UINT8 V)
m_program->write_byte(A,V);
}
-void sh2_device::WW(offs_t A, UINT16 V)
+void sh2_device::WW(offs_t A, uint16_t V)
{
if((A & 0xf0000000) == 0 || (A & 0xf0000000) == 0x20000000)
{
@@ -310,7 +310,7 @@ void sh2_device::WW(offs_t A, UINT16 V)
m_program->write_word(A,V);
}
-void sh2_device::WL(offs_t A, UINT32 V)
+void sh2_device::WL(offs_t A, uint32_t V)
{
if((A & 0xf0000000) == 0 || (A & 0xf0000000) == 0x20000000)
{
@@ -327,7 +327,7 @@ void sh2_device::WL(offs_t A, UINT32 V)
* 0011 nnnn mmmm 1100 1 -
* ADD Rm,Rn
*/
-void sh2_device::ADD(UINT32 m, UINT32 n)
+void sh2_device::ADD(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] += m_sh2_state->r[m];
}
@@ -336,18 +336,18 @@ void sh2_device::ADD(UINT32 m, UINT32 n)
* 0111 nnnn iiii iiii 1 -
* ADD #imm,Rn
*/
-void sh2_device::ADDI(UINT32 i, UINT32 n)
+void sh2_device::ADDI(uint32_t i, uint32_t n)
{
- m_sh2_state->r[n] += (INT32)(INT16)(INT8)i;
+ m_sh2_state->r[n] += (int32_t)(int16_t)(int8_t)i;
}
/* code cycles t-bit
* 0011 nnnn mmmm 1110 1 carry
* ADDC Rm,Rn
*/
-void sh2_device::ADDC(UINT32 m, UINT32 n)
+void sh2_device::ADDC(uint32_t m, uint32_t n)
{
- UINT32 tmp0, tmp1;
+ uint32_t tmp0, tmp1;
tmp1 = m_sh2_state->r[n] + m_sh2_state->r[m];
tmp0 = m_sh2_state->r[n];
@@ -364,21 +364,21 @@ void sh2_device::ADDC(UINT32 m, UINT32 n)
* 0011 nnnn mmmm 1111 1 overflow
* ADDV Rm,Rn
*/
-void sh2_device::ADDV(UINT32 m, UINT32 n)
+void sh2_device::ADDV(uint32_t m, uint32_t n)
{
- INT32 dest, src, ans;
+ int32_t dest, src, ans;
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) m_sh2_state->r[m] >= 0)
+ if ((int32_t) m_sh2_state->r[m] >= 0)
src = 0;
else
src = 1;
src += dest;
m_sh2_state->r[n] += m_sh2_state->r[m];
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
ans = 0;
else
ans = 1;
@@ -398,7 +398,7 @@ void sh2_device::ADDV(UINT32 m, UINT32 n)
* 0010 nnnn mmmm 1001 1 -
* AND Rm,Rn
*/
-void sh2_device::AND(UINT32 m, UINT32 n)
+void sh2_device::AND(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] &= m_sh2_state->r[m];
}
@@ -408,7 +408,7 @@ void sh2_device::AND(UINT32 m, UINT32 n)
* 1100 1001 iiii iiii 1 -
* AND #imm,R0
*/
-void sh2_device::ANDI(UINT32 i)
+void sh2_device::ANDI(uint32_t i)
{
m_sh2_state->r[0] &= i;
}
@@ -417,9 +417,9 @@ void sh2_device::ANDI(UINT32 i)
* 1100 1101 iiii iiii 1 -
* AND.B #imm,@(R0,GBR)
*/
-void sh2_device::ANDM(UINT32 i)
+void sh2_device::ANDM(uint32_t i)
{
- UINT32 temp;
+ uint32_t temp;
m_sh2_state->ea = m_sh2_state->gbr + m_sh2_state->r[0];
temp = i & RB( m_sh2_state->ea );
@@ -431,11 +431,11 @@ void sh2_device::ANDM(UINT32 i)
* 1000 1011 dddd dddd 3/1 -
* BF disp8
*/
-void sh2_device::BF(UINT32 d)
+void sh2_device::BF(uint32_t d)
{
if ((m_sh2_state->sr & T) == 0)
{
- INT32 disp = ((INT32)d << 24) >> 24;
+ int32_t disp = ((int32_t)d << 24) >> 24;
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->icount -= 2;
}
@@ -445,11 +445,11 @@ void sh2_device::BF(UINT32 d)
* 1000 1111 dddd dddd 3/1 -
* BFS disp8
*/
-void sh2_device::BFS(UINT32 d)
+void sh2_device::BFS(uint32_t d)
{
if ((m_sh2_state->sr & T) == 0)
{
- INT32 disp = ((INT32)d << 24) >> 24;
+ int32_t disp = ((int32_t)d << 24) >> 24;
m_delay = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->icount--;
}
@@ -459,14 +459,14 @@ void sh2_device::BFS(UINT32 d)
* 1010 dddd dddd dddd 2 -
* BRA disp12
*/
-void sh2_device::BRA(UINT32 d)
+void sh2_device::BRA(uint32_t d)
{
- INT32 disp = ((INT32)d << 20) >> 20;
+ int32_t disp = ((int32_t)d << 20) >> 20;
#if BUSY_LOOP_HACKS
if (disp == -2)
{
- UINT32 next_opcode = RW(m_sh2_state->pc & AM);
+ uint32_t next_opcode = RW(m_sh2_state->pc & AM);
/* BRA $
* NOP
*/
@@ -482,7 +482,7 @@ void sh2_device::BRA(UINT32 d)
* 0000 mmmm 0010 0011 2 -
* BRAF Rm
*/
-void sh2_device::BRAF(UINT32 m)
+void sh2_device::BRAF(uint32_t m)
{
m_delay = m_sh2_state->pc + m_sh2_state->r[m] + 2;
m_sh2_state->icount--;
@@ -492,9 +492,9 @@ void sh2_device::BRAF(UINT32 m)
* 1011 dddd dddd dddd 2 -
* BSR disp12
*/
-void sh2_device::BSR(UINT32 d)
+void sh2_device::BSR(uint32_t d)
{
- INT32 disp = ((INT32)d << 20) >> 20;
+ int32_t disp = ((int32_t)d << 20) >> 20;
m_sh2_state->pr = m_sh2_state->pc + 2;
m_delay = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
@@ -505,7 +505,7 @@ void sh2_device::BSR(UINT32 d)
* 0000 mmmm 0000 0011 2 -
* BSRF Rm
*/
-void sh2_device::BSRF(UINT32 m)
+void sh2_device::BSRF(uint32_t m)
{
m_sh2_state->pr = m_sh2_state->pc + 2;
m_delay = m_sh2_state->pc + m_sh2_state->r[m] + 2;
@@ -516,11 +516,11 @@ void sh2_device::BSRF(UINT32 m)
* 1000 1001 dddd dddd 3/1 -
* BT disp8
*/
-void sh2_device::BT(UINT32 d)
+void sh2_device::BT(uint32_t d)
{
if ((m_sh2_state->sr & T) != 0)
{
- INT32 disp = ((INT32)d << 24) >> 24;
+ int32_t disp = ((int32_t)d << 24) >> 24;
m_sh2_state->pc = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->icount -= 2;
}
@@ -530,11 +530,11 @@ void sh2_device::BT(UINT32 d)
* 1000 1101 dddd dddd 2/1 -
* BTS disp8
*/
-void sh2_device::BTS(UINT32 d)
+void sh2_device::BTS(uint32_t d)
{
if ((m_sh2_state->sr & T) != 0)
{
- INT32 disp = ((INT32)d << 24) >> 24;
+ int32_t disp = ((int32_t)d << 24) >> 24;
m_delay = m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
m_sh2_state->icount--;
}
@@ -563,7 +563,7 @@ void sh2_device::CLRT()
* 0011 nnnn mmmm 0000 1 comparison result
* CMP_EQ Rm,Rn
*/
-void sh2_device::CMPEQ(UINT32 m, UINT32 n)
+void sh2_device::CMPEQ(uint32_t m, uint32_t n)
{
if (m_sh2_state->r[n] == m_sh2_state->r[m])
m_sh2_state->sr |= T;
@@ -575,9 +575,9 @@ void sh2_device::CMPEQ(UINT32 m, UINT32 n)
* 0011 nnnn mmmm 0011 1 comparison result
* CMP_GE Rm,Rn
*/
-void sh2_device::CMPGE(UINT32 m, UINT32 n)
+void sh2_device::CMPGE(uint32_t m, uint32_t n)
{
- if ((INT32) m_sh2_state->r[n] >= (INT32) m_sh2_state->r[m])
+ if ((int32_t) m_sh2_state->r[n] >= (int32_t) m_sh2_state->r[m])
m_sh2_state->sr |= T;
else
m_sh2_state->sr &= ~T;
@@ -587,9 +587,9 @@ void sh2_device::CMPGE(UINT32 m, UINT32 n)
* 0011 nnnn mmmm 0111 1 comparison result
* CMP_GT Rm,Rn
*/
-void sh2_device::CMPGT(UINT32 m, UINT32 n)
+void sh2_device::CMPGT(uint32_t m, uint32_t n)
{
- if ((INT32) m_sh2_state->r[n] > (INT32) m_sh2_state->r[m])
+ if ((int32_t) m_sh2_state->r[n] > (int32_t) m_sh2_state->r[m])
m_sh2_state->sr |= T;
else
m_sh2_state->sr &= ~T;
@@ -599,9 +599,9 @@ void sh2_device::CMPGT(UINT32 m, UINT32 n)
* 0011 nnnn mmmm 0110 1 comparison result
* CMP_HI Rm,Rn
*/
-void sh2_device::CMPHI(UINT32 m, UINT32 n)
+void sh2_device::CMPHI(uint32_t m, uint32_t n)
{
- if ((UINT32) m_sh2_state->r[n] > (UINT32) m_sh2_state->r[m])
+ if ((uint32_t) m_sh2_state->r[n] > (uint32_t) m_sh2_state->r[m])
m_sh2_state->sr |= T;
else
m_sh2_state->sr &= ~T;
@@ -611,9 +611,9 @@ void sh2_device::CMPHI(UINT32 m, UINT32 n)
* 0011 nnnn mmmm 0010 1 comparison result
* CMP_HS Rm,Rn
*/
-void sh2_device::CMPHS(UINT32 m, UINT32 n)
+void sh2_device::CMPHS(uint32_t m, uint32_t n)
{
- if ((UINT32) m_sh2_state->r[n] >= (UINT32) m_sh2_state->r[m])
+ if ((uint32_t) m_sh2_state->r[n] >= (uint32_t) m_sh2_state->r[m])
m_sh2_state->sr |= T;
else
m_sh2_state->sr &= ~T;
@@ -624,9 +624,9 @@ void sh2_device::CMPHS(UINT32 m, UINT32 n)
* 0100 nnnn 0001 0101 1 comparison result
* CMP_PL Rn
*/
-void sh2_device::CMPPL(UINT32 n)
+void sh2_device::CMPPL(uint32_t n)
{
- if ((INT32) m_sh2_state->r[n] > 0)
+ if ((int32_t) m_sh2_state->r[n] > 0)
m_sh2_state->sr |= T;
else
m_sh2_state->sr &= ~T;
@@ -636,9 +636,9 @@ void sh2_device::CMPPL(UINT32 n)
* 0100 nnnn 0001 0001 1 comparison result
* CMP_PZ Rn
*/
-void sh2_device::CMPPZ(UINT32 n)
+void sh2_device::CMPPZ(uint32_t n)
{
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
m_sh2_state->sr |= T;
else
m_sh2_state->sr &= ~T;
@@ -648,10 +648,10 @@ void sh2_device::CMPPZ(UINT32 n)
* 0010 nnnn mmmm 1100 1 comparison result
* CMP_STR Rm,Rn
*/
-void sh2_device::CMPSTR(UINT32 m, UINT32 n)
+void sh2_device::CMPSTR(uint32_t m, uint32_t n)
{
- UINT32 temp;
- INT32 HH, HL, LH, LL;
+ uint32_t temp;
+ int32_t HH, HL, LH, LL;
temp = m_sh2_state->r[n] ^ m_sh2_state->r[m];
HH = (temp >> 24) & 0xff;
HL = (temp >> 16) & 0xff;
@@ -668,9 +668,9 @@ void sh2_device::CMPSTR(UINT32 m, UINT32 n)
* 1000 1000 iiii iiii 1 comparison result
* CMP/EQ #imm,R0
*/
-void sh2_device::CMPIM(UINT32 i)
+void sh2_device::CMPIM(uint32_t i)
{
- UINT32 imm = (UINT32)(INT32)(INT16)(INT8)i;
+ uint32_t imm = (uint32_t)(int32_t)(int16_t)(int8_t)i;
if (m_sh2_state->r[0] == imm)
m_sh2_state->sr |= T;
@@ -682,7 +682,7 @@ void sh2_device::CMPIM(UINT32 i)
* 0010 nnnn mmmm 0111 1 calculation result
* DIV0S Rm,Rn
*/
-void sh2_device::DIV0S(UINT32 m, UINT32 n)
+void sh2_device::DIV0S(uint32_t m, uint32_t n)
{
if ((m_sh2_state->r[n] & 0x80000000) == 0)
m_sh2_state->sr &= ~Q;
@@ -711,10 +711,10 @@ void sh2_device::DIV0U()
* 0011 nnnn mmmm 0100 1 calculation result
* DIV1 Rm,Rn
*/
-void sh2_device::DIV1(UINT32 m, UINT32 n)
+void sh2_device::DIV1(uint32_t m, uint32_t n)
{
- UINT32 tmp0;
- UINT32 old_q;
+ uint32_t tmp0;
+ uint32_t old_q;
old_q = m_sh2_state->sr & Q;
if (0x80000000 & m_sh2_state->r[n])
@@ -803,24 +803,24 @@ void sh2_device::DIV1(UINT32 m, UINT32 n)
}
/* DMULS.L Rm,Rn */
-void sh2_device::DMULS(UINT32 m, UINT32 n)
+void sh2_device::DMULS(uint32_t m, uint32_t n)
{
- UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
- UINT32 temp0, temp1, temp2, temp3;
- INT32 tempm, tempn, fnLmL;
+ uint32_t RnL, RnH, RmL, RmH, Res0, Res1, Res2;
+ uint32_t temp0, temp1, temp2, temp3;
+ int32_t tempm, tempn, fnLmL;
- tempn = (INT32) m_sh2_state->r[n];
- tempm = (INT32) m_sh2_state->r[m];
+ tempn = (int32_t) m_sh2_state->r[n];
+ tempm = (int32_t) m_sh2_state->r[m];
if (tempn < 0)
tempn = 0 - tempn;
if (tempm < 0)
tempm = 0 - tempm;
- if ((INT32) (m_sh2_state->r[n] ^ m_sh2_state->r[m]) < 0)
+ if ((int32_t) (m_sh2_state->r[n] ^ m_sh2_state->r[m]) < 0)
fnLmL = -1;
else
fnLmL = 0;
- temp1 = (UINT32) tempn;
- temp2 = (UINT32) tempm;
+ temp1 = (uint32_t) tempn;
+ temp2 = (uint32_t) tempm;
RnL = temp1 & 0x0000ffff;
RnH = (temp1 >> 16) & 0x0000ffff;
RmL = temp2 & 0x0000ffff;
@@ -852,10 +852,10 @@ void sh2_device::DMULS(UINT32 m, UINT32 n)
}
/* DMULU.L Rm,Rn */
-void sh2_device::DMULU(UINT32 m, UINT32 n)
+void sh2_device::DMULU(uint32_t m, uint32_t n)
{
- UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
- UINT32 temp0, temp1, temp2, temp3;
+ uint32_t RnL, RnH, RmL, RmH, Res0, Res1, Res2;
+ uint32_t temp0, temp1, temp2, temp3;
RnL = m_sh2_state->r[n] & 0x0000ffff;
RnH = (m_sh2_state->r[n] >> 16) & 0x0000ffff;
@@ -880,7 +880,7 @@ void sh2_device::DMULU(UINT32 m, UINT32 n)
}
/* DT Rn */
-void sh2_device::DT(UINT32 n)
+void sh2_device::DT(uint32_t n)
{
m_sh2_state->r[n]--;
if (m_sh2_state->r[n] == 0)
@@ -889,7 +889,7 @@ void sh2_device::DT(UINT32 n)
m_sh2_state->sr &= ~T;
#if BUSY_LOOP_HACKS
{
- UINT32 next_opcode = RW(m_sh2_state->pc & AM);
+ uint32_t next_opcode = RW(m_sh2_state->pc & AM);
/* DT Rn
* BF $-2
*/
@@ -906,25 +906,25 @@ void sh2_device::DT(UINT32 n)
}
/* EXTS.B Rm,Rn */
-void sh2_device::EXTSB(UINT32 m, UINT32 n)
+void sh2_device::EXTSB(uint32_t m, uint32_t n)
{
- m_sh2_state->r[n] = ((INT32)m_sh2_state->r[m] << 24) >> 24;
+ m_sh2_state->r[n] = ((int32_t)m_sh2_state->r[m] << 24) >> 24;
}
/* EXTS.W Rm,Rn */
-void sh2_device::EXTSW(UINT32 m, UINT32 n)
+void sh2_device::EXTSW(uint32_t m, uint32_t n)
{
- m_sh2_state->r[n] = ((INT32)m_sh2_state->r[m] << 16) >> 16;
+ m_sh2_state->r[n] = ((int32_t)m_sh2_state->r[m] << 16) >> 16;
}
/* EXTU.B Rm,Rn */
-void sh2_device::EXTUB(UINT32 m, UINT32 n)
+void sh2_device::EXTUB(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->r[m] & 0x000000ff;
}
/* EXTU.W Rm,Rn */
-void sh2_device::EXTUW(UINT32 m, UINT32 n)
+void sh2_device::EXTUW(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->r[m] & 0x0000ffff;
}
@@ -947,14 +947,14 @@ void sh2_device::ILLEGAL()
/* JMP @Rm */
-void sh2_device::JMP(UINT32 m)
+void sh2_device::JMP(uint32_t m)
{
m_delay = m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->icount--;
}
/* JSR @Rm */
-void sh2_device::JSR(UINT32 m)
+void sh2_device::JSR(uint32_t m)
{
m_sh2_state->pr = m_sh2_state->pc + 2;
m_delay = m_sh2_state->ea = m_sh2_state->r[m];
@@ -963,26 +963,26 @@ void sh2_device::JSR(UINT32 m)
/* LDC Rm,SR */
-void sh2_device::LDCSR(UINT32 m)
+void sh2_device::LDCSR(uint32_t m)
{
m_sh2_state->sr = m_sh2_state->r[m] & FLAGS;
m_test_irq = 1;
}
/* LDC Rm,GBR */
-void sh2_device::LDCGBR(UINT32 m)
+void sh2_device::LDCGBR(uint32_t m)
{
m_sh2_state->gbr = m_sh2_state->r[m];
}
/* LDC Rm,VBR */
-void sh2_device::LDCVBR(UINT32 m)
+void sh2_device::LDCVBR(uint32_t m)
{
m_sh2_state->vbr = m_sh2_state->r[m];
}
/* LDC.L @Rm+,SR */
-void sh2_device::LDCMSR(UINT32 m)
+void sh2_device::LDCMSR(uint32_t m)
{
m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->sr = RL( m_sh2_state->ea ) & FLAGS;
@@ -992,7 +992,7 @@ void sh2_device::LDCMSR(UINT32 m)
}
/* LDC.L @Rm+,GBR */
-void sh2_device::LDCMGBR(UINT32 m)
+void sh2_device::LDCMGBR(uint32_t m)
{
m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->gbr = RL( m_sh2_state->ea );
@@ -1001,7 +1001,7 @@ void sh2_device::LDCMGBR(UINT32 m)
}
/* LDC.L @Rm+,VBR */
-void sh2_device::LDCMVBR(UINT32 m)
+void sh2_device::LDCMVBR(uint32_t m)
{
m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->vbr = RL( m_sh2_state->ea );
@@ -1010,25 +1010,25 @@ void sh2_device::LDCMVBR(UINT32 m)
}
/* LDS Rm,MACH */
-void sh2_device::LDSMACH(UINT32 m)
+void sh2_device::LDSMACH(uint32_t m)
{
m_sh2_state->mach = m_sh2_state->r[m];
}
/* LDS Rm,MACL */
-void sh2_device::LDSMACL(UINT32 m)
+void sh2_device::LDSMACL(uint32_t m)
{
m_sh2_state->macl = m_sh2_state->r[m];
}
/* LDS Rm,PR */
-void sh2_device::LDSPR(UINT32 m)
+void sh2_device::LDSPR(uint32_t m)
{
m_sh2_state->pr = m_sh2_state->r[m];
}
/* LDS.L @Rm+,MACH */
-void sh2_device::LDSMMACH(UINT32 m)
+void sh2_device::LDSMMACH(uint32_t m)
{
m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->mach = RL( m_sh2_state->ea );
@@ -1036,7 +1036,7 @@ void sh2_device::LDSMMACH(UINT32 m)
}
/* LDS.L @Rm+,MACL */
-void sh2_device::LDSMMACL(UINT32 m)
+void sh2_device::LDSMMACL(uint32_t m)
{
m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->macl = RL( m_sh2_state->ea );
@@ -1044,7 +1044,7 @@ void sh2_device::LDSMMACL(UINT32 m)
}
/* LDS.L @Rm+,PR */
-void sh2_device::LDSMPR(UINT32 m)
+void sh2_device::LDSMPR(uint32_t m)
{
m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->pr = RL( m_sh2_state->ea );
@@ -1052,17 +1052,17 @@ void sh2_device::LDSMPR(UINT32 m)
}
/* MAC.L @Rm+,@Rn+ */
-void sh2_device::MAC_L(UINT32 m, UINT32 n)
+void sh2_device::MAC_L(uint32_t m, uint32_t n)
{
- UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
- UINT32 temp0, temp1, temp2, temp3;
- INT32 tempm, tempn, fnLmL;
+ uint32_t RnL, RnH, RmL, RmH, Res0, Res1, Res2;
+ uint32_t temp0, temp1, temp2, temp3;
+ int32_t tempm, tempn, fnLmL;
- tempn = (INT32) RL( m_sh2_state->r[n] );
+ tempn = (int32_t) RL( m_sh2_state->r[n] );
m_sh2_state->r[n] += 4;
- tempm = (INT32) RL( m_sh2_state->r[m] );
+ tempm = (int32_t) RL( m_sh2_state->r[m] );
m_sh2_state->r[m] += 4;
- if ((INT32) (tempn ^ tempm) < 0)
+ if ((int32_t) (tempn ^ tempm) < 0)
fnLmL = -1;
else
fnLmL = 0;
@@ -1070,8 +1070,8 @@ void sh2_device::MAC_L(UINT32 m, UINT32 n)
tempn = 0 - tempn;
if (tempm < 0)
tempm = 0 - tempm;
- temp1 = (UINT32) tempn;
- temp2 = (UINT32) tempm;
+ temp1 = (uint32_t) tempn;
+ temp2 = (uint32_t) tempm;
RnL = temp1 & 0x0000ffff;
RnH = (temp1 >> 16) & 0x0000ffff;
RmL = temp2 & 0x0000ffff;
@@ -1103,12 +1103,12 @@ void sh2_device::MAC_L(UINT32 m, UINT32 n)
if (m_sh2_state->macl > Res0)
Res2++;
Res2 += (m_sh2_state->mach & 0x0000ffff);
- if (((INT32) Res2 < 0) && (Res2 < 0xffff8000))
+ if (((int32_t) Res2 < 0) && (Res2 < 0xffff8000))
{
Res2 = 0x00008000;
Res0 = 0x00000000;
}
- else if (((INT32) Res2 > 0) && (Res2 > 0x00007fff))
+ else if (((int32_t) Res2 > 0) && (Res2 > 0x00007fff))
{
Res2 = 0x00007fff;
Res0 = 0xffffffff;
@@ -1129,22 +1129,22 @@ void sh2_device::MAC_L(UINT32 m, UINT32 n)
}
/* MAC.W @Rm+,@Rn+ */
-void sh2_device::MAC_W(UINT32 m, UINT32 n)
+void sh2_device::MAC_W(uint32_t m, uint32_t n)
{
- INT32 tempm, tempn, dest, src, ans;
- UINT32 templ;
+ int32_t tempm, tempn, dest, src, ans;
+ uint32_t templ;
- tempn = (INT32) RW( m_sh2_state->r[n] );
+ tempn = (int32_t) RW( m_sh2_state->r[n] );
m_sh2_state->r[n] += 2;
- tempm = (INT32) RW( m_sh2_state->r[m] );
+ tempm = (int32_t) RW( m_sh2_state->r[m] );
m_sh2_state->r[m] += 2;
templ = m_sh2_state->macl;
- tempm = ((INT32) (short) tempn * (INT32) (short) tempm);
- if ((INT32) m_sh2_state->macl >= 0)
+ tempm = ((int32_t) (short) tempn * (int32_t) (short) tempm);
+ if ((int32_t) m_sh2_state->macl >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) tempm >= 0)
+ if ((int32_t) tempm >= 0)
{
src = 0;
tempn = 0;
@@ -1156,7 +1156,7 @@ void sh2_device::MAC_W(UINT32 m, UINT32 n)
}
src += dest;
m_sh2_state->macl += tempm;
- if ((INT32) m_sh2_state->macl >= 0)
+ if ((int32_t) m_sh2_state->macl >= 0)
ans = 0;
else
ans = 1;
@@ -1181,99 +1181,99 @@ void sh2_device::MAC_W(UINT32 m, UINT32 n)
}
/* MOV Rm,Rn */
-void sh2_device::MOV(UINT32 m, UINT32 n)
+void sh2_device::MOV(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->r[m];
}
/* MOV.B Rm,@Rn */
-void sh2_device::MOVBS(UINT32 m, UINT32 n)
+void sh2_device::MOVBS(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[n];
WB( m_sh2_state->ea, m_sh2_state->r[m] & 0x000000ff);
}
/* MOV.W Rm,@Rn */
-void sh2_device::MOVWS(UINT32 m, UINT32 n)
+void sh2_device::MOVWS(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[n];
WW( m_sh2_state->ea, m_sh2_state->r[m] & 0x0000ffff);
}
/* MOV.L Rm,@Rn */
-void sh2_device::MOVLS(UINT32 m, UINT32 n)
+void sh2_device::MOVLS(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[n];
WL( m_sh2_state->ea, m_sh2_state->r[m] );
}
/* MOV.B @Rm,Rn */
-void sh2_device::MOVBL(UINT32 m, UINT32 n)
+void sh2_device::MOVBL(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[m];
- m_sh2_state->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( m_sh2_state->ea );
+ m_sh2_state->r[n] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_sh2_state->ea );
}
/* MOV.W @Rm,Rn */
-void sh2_device::MOVWL(UINT32 m, UINT32 n)
+void sh2_device::MOVWL(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[m];
- m_sh2_state->r[n] = (UINT32)(INT32)(INT16) RW( m_sh2_state->ea );
+ m_sh2_state->r[n] = (uint32_t)(int32_t)(int16_t) RW( m_sh2_state->ea );
}
/* MOV.L @Rm,Rn */
-void sh2_device::MOVLL(UINT32 m, UINT32 n)
+void sh2_device::MOVLL(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[m];
m_sh2_state->r[n] = RL( m_sh2_state->ea );
}
/* MOV.B Rm,@-Rn */
-void sh2_device::MOVBM(UINT32 m, UINT32 n)
+void sh2_device::MOVBM(uint32_t m, uint32_t n)
{
/* SMG : bug fix, was reading m_sh2_state->r[n] */
- UINT32 data = m_sh2_state->r[m] & 0x000000ff;
+ uint32_t data = m_sh2_state->r[m] & 0x000000ff;
m_sh2_state->r[n] -= 1;
WB( m_sh2_state->r[n], data );
}
/* MOV.W Rm,@-Rn */
-void sh2_device::MOVWM(UINT32 m, UINT32 n)
+void sh2_device::MOVWM(uint32_t m, uint32_t n)
{
- UINT32 data = m_sh2_state->r[m] & 0x0000ffff;
+ uint32_t data = m_sh2_state->r[m] & 0x0000ffff;
m_sh2_state->r[n] -= 2;
WW( m_sh2_state->r[n], data );
}
/* MOV.L Rm,@-Rn */
-void sh2_device::MOVLM(UINT32 m, UINT32 n)
+void sh2_device::MOVLM(uint32_t m, uint32_t n)
{
- UINT32 data = m_sh2_state->r[m];
+ uint32_t data = m_sh2_state->r[m];
m_sh2_state->r[n] -= 4;
WL( m_sh2_state->r[n], data );
}
/* MOV.B @Rm+,Rn */
-void sh2_device::MOVBP(UINT32 m, UINT32 n)
+void sh2_device::MOVBP(uint32_t m, uint32_t n)
{
- m_sh2_state->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( m_sh2_state->r[m] );
+ m_sh2_state->r[n] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_sh2_state->r[m] );
if (n != m)
m_sh2_state->r[m] += 1;
}
/* MOV.W @Rm+,Rn */
-void sh2_device::MOVWP(UINT32 m, UINT32 n)
+void sh2_device::MOVWP(uint32_t m, uint32_t n)
{
- m_sh2_state->r[n] = (UINT32)(INT32)(INT16) RW( m_sh2_state->r[m] );
+ m_sh2_state->r[n] = (uint32_t)(int32_t)(int16_t) RW( m_sh2_state->r[m] );
if (n != m)
m_sh2_state->r[m] += 2;
}
/* MOV.L @Rm+,Rn */
-void sh2_device::MOVLP(UINT32 m, UINT32 n)
+void sh2_device::MOVLP(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] = RL( m_sh2_state->r[m] );
if (n != m)
@@ -1281,208 +1281,208 @@ void sh2_device::MOVLP(UINT32 m, UINT32 n)
}
/* MOV.B Rm,@(R0,Rn) */
-void sh2_device::MOVBS0(UINT32 m, UINT32 n)
+void sh2_device::MOVBS0(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[n] + m_sh2_state->r[0];
WB( m_sh2_state->ea, m_sh2_state->r[m] & 0x000000ff );
}
/* MOV.W Rm,@(R0,Rn) */
-void sh2_device::MOVWS0(UINT32 m, UINT32 n)
+void sh2_device::MOVWS0(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[n] + m_sh2_state->r[0];
WW( m_sh2_state->ea, m_sh2_state->r[m] & 0x0000ffff );
}
/* MOV.L Rm,@(R0,Rn) */
-void sh2_device::MOVLS0(UINT32 m, UINT32 n)
+void sh2_device::MOVLS0(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[n] + m_sh2_state->r[0];
WL( m_sh2_state->ea, m_sh2_state->r[m] );
}
/* MOV.B @(R0,Rm),Rn */
-void sh2_device::MOVBL0(UINT32 m, UINT32 n)
+void sh2_device::MOVBL0(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[m] + m_sh2_state->r[0];
- m_sh2_state->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( m_sh2_state->ea );
+ m_sh2_state->r[n] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_sh2_state->ea );
}
/* MOV.W @(R0,Rm),Rn */
-void sh2_device::MOVWL0(UINT32 m, UINT32 n)
+void sh2_device::MOVWL0(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[m] + m_sh2_state->r[0];
- m_sh2_state->r[n] = (UINT32)(INT32)(INT16) RW( m_sh2_state->ea );
+ m_sh2_state->r[n] = (uint32_t)(int32_t)(int16_t) RW( m_sh2_state->ea );
}
/* MOV.L @(R0,Rm),Rn */
-void sh2_device::MOVLL0(UINT32 m, UINT32 n)
+void sh2_device::MOVLL0(uint32_t m, uint32_t n)
{
m_sh2_state->ea = m_sh2_state->r[m] + m_sh2_state->r[0];
m_sh2_state->r[n] = RL( m_sh2_state->ea );
}
/* MOV #imm,Rn */
-void sh2_device::MOVI(UINT32 i, UINT32 n)
+void sh2_device::MOVI(uint32_t i, uint32_t n)
{
- m_sh2_state->r[n] = (UINT32)(INT32)(INT16)(INT8) i;
+ m_sh2_state->r[n] = (uint32_t)(int32_t)(int16_t)(int8_t) i;
}
/* MOV.W @(disp8,PC),Rn */
-void sh2_device::MOVWI(UINT32 d, UINT32 n)
+void sh2_device::MOVWI(uint32_t d, uint32_t n)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = m_sh2_state->pc + disp * 2 + 2;
- m_sh2_state->r[n] = (UINT32)(INT32)(INT16) RW( m_sh2_state->ea );
+ m_sh2_state->r[n] = (uint32_t)(int32_t)(int16_t) RW( m_sh2_state->ea );
}
/* MOV.L @(disp8,PC),Rn */
-void sh2_device::MOVLI(UINT32 d, UINT32 n)
+void sh2_device::MOVLI(uint32_t d, uint32_t n)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = ((m_sh2_state->pc + 2) & ~3) + disp * 4;
m_sh2_state->r[n] = RL( m_sh2_state->ea );
}
/* MOV.B @(disp8,GBR),R0 */
-void sh2_device::MOVBLG(UINT32 d)
+void sh2_device::MOVBLG(uint32_t d)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = m_sh2_state->gbr + disp;
- m_sh2_state->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( m_sh2_state->ea );
+ m_sh2_state->r[0] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_sh2_state->ea );
}
/* MOV.W @(disp8,GBR),R0 */
-void sh2_device::MOVWLG(UINT32 d)
+void sh2_device::MOVWLG(uint32_t d)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = m_sh2_state->gbr + disp * 2;
- m_sh2_state->r[0] = (INT32)(INT16) RW( m_sh2_state->ea );
+ m_sh2_state->r[0] = (int32_t)(int16_t) RW( m_sh2_state->ea );
}
/* MOV.L @(disp8,GBR),R0 */
-void sh2_device::MOVLLG(UINT32 d)
+void sh2_device::MOVLLG(uint32_t d)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = m_sh2_state->gbr + disp * 4;
m_sh2_state->r[0] = RL( m_sh2_state->ea );
}
/* MOV.B R0,@(disp8,GBR) */
-void sh2_device::MOVBSG(UINT32 d)
+void sh2_device::MOVBSG(uint32_t d)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = m_sh2_state->gbr + disp;
WB( m_sh2_state->ea, m_sh2_state->r[0] & 0x000000ff );
}
/* MOV.W R0,@(disp8,GBR) */
-void sh2_device::MOVWSG(UINT32 d)
+void sh2_device::MOVWSG(uint32_t d)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = m_sh2_state->gbr + disp * 2;
WW( m_sh2_state->ea, m_sh2_state->r[0] & 0x0000ffff );
}
/* MOV.L R0,@(disp8,GBR) */
-void sh2_device::MOVLSG(UINT32 d)
+void sh2_device::MOVLSG(uint32_t d)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = m_sh2_state->gbr + disp * 4;
WL( m_sh2_state->ea, m_sh2_state->r[0] );
}
/* MOV.B R0,@(disp4,Rn) */
-void sh2_device::MOVBS4(UINT32 d, UINT32 n)
+void sh2_device::MOVBS4(uint32_t d, uint32_t n)
{
- UINT32 disp = d & 0x0f;
+ uint32_t disp = d & 0x0f;
m_sh2_state->ea = m_sh2_state->r[n] + disp;
WB( m_sh2_state->ea, m_sh2_state->r[0] & 0x000000ff );
}
/* MOV.W R0,@(disp4,Rn) */
-void sh2_device::MOVWS4(UINT32 d, UINT32 n)
+void sh2_device::MOVWS4(uint32_t d, uint32_t n)
{
- UINT32 disp = d & 0x0f;
+ uint32_t disp = d & 0x0f;
m_sh2_state->ea = m_sh2_state->r[n] + disp * 2;
WW( m_sh2_state->ea, m_sh2_state->r[0] & 0x0000ffff );
}
/* MOV.L Rm,@(disp4,Rn) */
-void sh2_device::MOVLS4(UINT32 m, UINT32 d, UINT32 n)
+void sh2_device::MOVLS4(uint32_t m, uint32_t d, uint32_t n)
{
- UINT32 disp = d & 0x0f;
+ uint32_t disp = d & 0x0f;
m_sh2_state->ea = m_sh2_state->r[n] + disp * 4;
WL( m_sh2_state->ea, m_sh2_state->r[m] );
}
/* MOV.B @(disp4,Rm),R0 */
-void sh2_device::MOVBL4(UINT32 m, UINT32 d)
+void sh2_device::MOVBL4(uint32_t m, uint32_t d)
{
- UINT32 disp = d & 0x0f;
+ uint32_t disp = d & 0x0f;
m_sh2_state->ea = m_sh2_state->r[m] + disp;
- m_sh2_state->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( m_sh2_state->ea );
+ m_sh2_state->r[0] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_sh2_state->ea );
}
/* MOV.W @(disp4,Rm),R0 */
-void sh2_device::MOVWL4(UINT32 m, UINT32 d)
+void sh2_device::MOVWL4(uint32_t m, uint32_t d)
{
- UINT32 disp = d & 0x0f;
+ uint32_t disp = d & 0x0f;
m_sh2_state->ea = m_sh2_state->r[m] + disp * 2;
- m_sh2_state->r[0] = (UINT32)(INT32)(INT16) RW( m_sh2_state->ea );
+ m_sh2_state->r[0] = (uint32_t)(int32_t)(int16_t) RW( m_sh2_state->ea );
}
/* MOV.L @(disp4,Rm),Rn */
-void sh2_device::MOVLL4(UINT32 m, UINT32 d, UINT32 n)
+void sh2_device::MOVLL4(uint32_t m, uint32_t d, uint32_t n)
{
- UINT32 disp = d & 0x0f;
+ uint32_t disp = d & 0x0f;
m_sh2_state->ea = m_sh2_state->r[m] + disp * 4;
m_sh2_state->r[n] = RL( m_sh2_state->ea );
}
/* MOVA @(disp8,PC),R0 */
-void sh2_device::MOVA(UINT32 d)
+void sh2_device::MOVA(uint32_t d)
{
- UINT32 disp = d & 0xff;
+ uint32_t disp = d & 0xff;
m_sh2_state->ea = ((m_sh2_state->pc + 2) & ~3) + disp * 4;
m_sh2_state->r[0] = m_sh2_state->ea;
}
/* MOVT Rn */
-void sh2_device::MOVT(UINT32 n)
+void sh2_device::MOVT(uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->sr & T;
}
/* MUL.L Rm,Rn */
-void sh2_device::MULL(UINT32 m, UINT32 n)
+void sh2_device::MULL(uint32_t m, uint32_t n)
{
m_sh2_state->macl = m_sh2_state->r[n] * m_sh2_state->r[m];
m_sh2_state->icount--;
}
/* MULS Rm,Rn */
-void sh2_device::MULS(UINT32 m, UINT32 n)
+void sh2_device::MULS(uint32_t m, uint32_t n)
{
- m_sh2_state->macl = (INT16) m_sh2_state->r[n] * (INT16) m_sh2_state->r[m];
+ m_sh2_state->macl = (int16_t) m_sh2_state->r[n] * (int16_t) m_sh2_state->r[m];
}
/* MULU Rm,Rn */
-void sh2_device::MULU(UINT32 m, UINT32 n)
+void sh2_device::MULU(uint32_t m, uint32_t n)
{
- m_sh2_state->macl = (UINT16) m_sh2_state->r[n] * (UINT16) m_sh2_state->r[m];
+ m_sh2_state->macl = (uint16_t) m_sh2_state->r[n] * (uint16_t) m_sh2_state->r[m];
}
/* NEG Rm,Rn */
-void sh2_device::NEG(UINT32 m, UINT32 n)
+void sh2_device::NEG(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] = 0 - m_sh2_state->r[m];
}
/* NEGC Rm,Rn */
-void sh2_device::NEGC(UINT32 m, UINT32 n)
+void sh2_device::NEGC(uint32_t m, uint32_t n)
{
- UINT32 temp;
+ uint32_t temp;
temp = m_sh2_state->r[m];
m_sh2_state->r[n] = -temp - (m_sh2_state->sr & T);
@@ -1498,27 +1498,27 @@ void sh2_device::NOP(void)
}
/* NOT Rm,Rn */
-void sh2_device::NOT(UINT32 m, UINT32 n)
+void sh2_device::NOT(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] = ~m_sh2_state->r[m];
}
/* OR Rm,Rn */
-void sh2_device::OR(UINT32 m, UINT32 n)
+void sh2_device::OR(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] |= m_sh2_state->r[m];
}
/* OR #imm,R0 */
-void sh2_device::ORI(UINT32 i)
+void sh2_device::ORI(uint32_t i)
{
m_sh2_state->r[0] |= i;
}
/* OR.B #imm,@(R0,GBR) */
-void sh2_device::ORM(UINT32 i)
+void sh2_device::ORM(uint32_t i)
{
- UINT32 temp;
+ uint32_t temp;
m_sh2_state->ea = m_sh2_state->gbr + m_sh2_state->r[0];
temp = RB( m_sh2_state->ea );
@@ -1528,9 +1528,9 @@ void sh2_device::ORM(UINT32 i)
}
/* ROTCL Rn */
-void sh2_device::ROTCL(UINT32 n)
+void sh2_device::ROTCL(uint32_t n)
{
- UINT32 temp;
+ uint32_t temp;
temp = (m_sh2_state->r[n] >> 31) & T;
m_sh2_state->r[n] = (m_sh2_state->r[n] << 1) | (m_sh2_state->sr & T);
@@ -1538,9 +1538,9 @@ void sh2_device::ROTCL(UINT32 n)
}
/* ROTCR Rn */
-void sh2_device::ROTCR(UINT32 n)
+void sh2_device::ROTCR(uint32_t n)
{
- UINT32 temp;
+ uint32_t temp;
temp = (m_sh2_state->sr & T) << 31;
if (m_sh2_state->r[n] & T)
m_sh2_state->sr |= T;
@@ -1550,14 +1550,14 @@ void sh2_device::ROTCR(UINT32 n)
}
/* ROTL Rn */
-void sh2_device::ROTL(UINT32 n)
+void sh2_device::ROTL(uint32_t n)
{
m_sh2_state->sr = (m_sh2_state->sr & ~T) | ((m_sh2_state->r[n] >> 31) & T);
m_sh2_state->r[n] = (m_sh2_state->r[n] << 1) | (m_sh2_state->r[n] >> 31);
}
/* ROTR Rn */
-void sh2_device::ROTR(UINT32 n)
+void sh2_device::ROTR(uint32_t n)
{
m_sh2_state->sr = (m_sh2_state->sr & ~T) | (m_sh2_state->r[n] & T);
m_sh2_state->r[n] = (m_sh2_state->r[n] >> 1) | (m_sh2_state->r[n] << 31);
@@ -1590,65 +1590,65 @@ void sh2_device::SETT()
}
/* SHAL Rn (same as SHLL) */
-void sh2_device::SHAL(UINT32 n)
+void sh2_device::SHAL(uint32_t n)
{
m_sh2_state->sr = (m_sh2_state->sr & ~T) | ((m_sh2_state->r[n] >> 31) & T);
m_sh2_state->r[n] <<= 1;
}
/* SHAR Rn */
-void sh2_device::SHAR(UINT32 n)
+void sh2_device::SHAR(uint32_t n)
{
m_sh2_state->sr = (m_sh2_state->sr & ~T) | (m_sh2_state->r[n] & T);
- m_sh2_state->r[n] = (UINT32)((INT32)m_sh2_state->r[n] >> 1);
+ m_sh2_state->r[n] = (uint32_t)((int32_t)m_sh2_state->r[n] >> 1);
}
/* SHLL Rn (same as SHAL) */
-void sh2_device::SHLL(UINT32 n)
+void sh2_device::SHLL(uint32_t n)
{
m_sh2_state->sr = (m_sh2_state->sr & ~T) | ((m_sh2_state->r[n] >> 31) & T);
m_sh2_state->r[n] <<= 1;
}
/* SHLL2 Rn */
-void sh2_device::SHLL2(UINT32 n)
+void sh2_device::SHLL2(uint32_t n)
{
m_sh2_state->r[n] <<= 2;
}
/* SHLL8 Rn */
-void sh2_device::SHLL8(UINT32 n)
+void sh2_device::SHLL8(uint32_t n)
{
m_sh2_state->r[n] <<= 8;
}
/* SHLL16 Rn */
-void sh2_device::SHLL16(UINT32 n)
+void sh2_device::SHLL16(uint32_t n)
{
m_sh2_state->r[n] <<= 16;
}
/* SHLR Rn */
-void sh2_device::SHLR(UINT32 n)
+void sh2_device::SHLR(uint32_t n)
{
m_sh2_state->sr = (m_sh2_state->sr & ~T) | (m_sh2_state->r[n] & T);
m_sh2_state->r[n] >>= 1;
}
/* SHLR2 Rn */
-void sh2_device::SHLR2(UINT32 n)
+void sh2_device::SHLR2(uint32_t n)
{
m_sh2_state->r[n] >>= 2;
}
/* SHLR8 Rn */
-void sh2_device::SHLR8(UINT32 n)
+void sh2_device::SHLR8(uint32_t n)
{
m_sh2_state->r[n] >>= 8;
}
/* SHLR16 Rn */
-void sh2_device::SHLR16(UINT32 n)
+void sh2_device::SHLR16(uint32_t n)
{
m_sh2_state->r[n] >>= 16;
}
@@ -1667,25 +1667,25 @@ void sh2_device::SLEEP()
}
/* STC SR,Rn */
-void sh2_device::STCSR(UINT32 n)
+void sh2_device::STCSR(uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->sr;
}
/* STC GBR,Rn */
-void sh2_device::STCGBR(UINT32 n)
+void sh2_device::STCGBR(uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->gbr;
}
/* STC VBR,Rn */
-void sh2_device::STCVBR(UINT32 n)
+void sh2_device::STCVBR(uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->vbr;
}
/* STC.L SR,@-Rn */
-void sh2_device::STCMSR(UINT32 n)
+void sh2_device::STCMSR(uint32_t n)
{
m_sh2_state->r[n] -= 4;
m_sh2_state->ea = m_sh2_state->r[n];
@@ -1694,7 +1694,7 @@ void sh2_device::STCMSR(UINT32 n)
}
/* STC.L GBR,@-Rn */
-void sh2_device::STCMGBR(UINT32 n)
+void sh2_device::STCMGBR(uint32_t n)
{
m_sh2_state->r[n] -= 4;
m_sh2_state->ea = m_sh2_state->r[n];
@@ -1703,7 +1703,7 @@ void sh2_device::STCMGBR(UINT32 n)
}
/* STC.L VBR,@-Rn */
-void sh2_device::STCMVBR(UINT32 n)
+void sh2_device::STCMVBR(uint32_t n)
{
m_sh2_state->r[n] -= 4;
m_sh2_state->ea = m_sh2_state->r[n];
@@ -1712,25 +1712,25 @@ void sh2_device::STCMVBR(UINT32 n)
}
/* STS MACH,Rn */
-void sh2_device::STSMACH(UINT32 n)
+void sh2_device::STSMACH(uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->mach;
}
/* STS MACL,Rn */
-void sh2_device::STSMACL(UINT32 n)
+void sh2_device::STSMACL(uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->macl;
}
/* STS PR,Rn */
-void sh2_device::STSPR(UINT32 n)
+void sh2_device::STSPR(uint32_t n)
{
m_sh2_state->r[n] = m_sh2_state->pr;
}
/* STS.L MACH,@-Rn */
-void sh2_device::STSMMACH(UINT32 n)
+void sh2_device::STSMMACH(uint32_t n)
{
m_sh2_state->r[n] -= 4;
m_sh2_state->ea = m_sh2_state->r[n];
@@ -1738,7 +1738,7 @@ void sh2_device::STSMMACH(UINT32 n)
}
/* STS.L MACL,@-Rn */
-void sh2_device::STSMMACL(UINT32 n)
+void sh2_device::STSMMACL(uint32_t n)
{
m_sh2_state->r[n] -= 4;
m_sh2_state->ea = m_sh2_state->r[n];
@@ -1746,7 +1746,7 @@ void sh2_device::STSMMACL(UINT32 n)
}
/* STS.L PR,@-Rn */
-void sh2_device::STSMPR(UINT32 n)
+void sh2_device::STSMPR(uint32_t n)
{
m_sh2_state->r[n] -= 4;
m_sh2_state->ea = m_sh2_state->r[n];
@@ -1754,15 +1754,15 @@ void sh2_device::STSMPR(UINT32 n)
}
/* SUB Rm,Rn */
-void sh2_device::SUB(UINT32 m, UINT32 n)
+void sh2_device::SUB(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] -= m_sh2_state->r[m];
}
/* SUBC Rm,Rn */
-void sh2_device::SUBC(UINT32 m, UINT32 n)
+void sh2_device::SUBC(uint32_t m, uint32_t n)
{
- UINT32 tmp0, tmp1;
+ uint32_t tmp0, tmp1;
tmp1 = m_sh2_state->r[n] - m_sh2_state->r[m];
tmp0 = m_sh2_state->r[n];
@@ -1776,21 +1776,21 @@ void sh2_device::SUBC(UINT32 m, UINT32 n)
}
/* SUBV Rm,Rn */
-void sh2_device::SUBV(UINT32 m, UINT32 n)
+void sh2_device::SUBV(uint32_t m, uint32_t n)
{
- INT32 dest, src, ans;
+ int32_t dest, src, ans;
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) m_sh2_state->r[m] >= 0)
+ if ((int32_t) m_sh2_state->r[m] >= 0)
src = 0;
else
src = 1;
src += dest;
m_sh2_state->r[n] -= m_sh2_state->r[m];
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
ans = 0;
else
ans = 1;
@@ -1807,9 +1807,9 @@ void sh2_device::SUBV(UINT32 m, UINT32 n)
}
/* SWAP.B Rm,Rn */
-void sh2_device::SWAPB(UINT32 m, UINT32 n)
+void sh2_device::SWAPB(uint32_t m, uint32_t n)
{
- UINT32 temp0, temp1;
+ uint32_t temp0, temp1;
temp0 = m_sh2_state->r[m] & 0xffff0000;
temp1 = (m_sh2_state->r[m] & 0x000000ff) << 8;
@@ -1818,18 +1818,18 @@ void sh2_device::SWAPB(UINT32 m, UINT32 n)
}
/* SWAP.W Rm,Rn */
-void sh2_device::SWAPW(UINT32 m, UINT32 n)
+void sh2_device::SWAPW(uint32_t m, uint32_t n)
{
- UINT32 temp;
+ uint32_t temp;
temp = (m_sh2_state->r[m] >> 16) & 0x0000ffff;
m_sh2_state->r[n] = (m_sh2_state->r[m] << 16) | temp;
}
/* TAS.B @Rn */
-void sh2_device::TAS(UINT32 n)
+void sh2_device::TAS(uint32_t n)
{
- UINT32 temp;
+ uint32_t temp;
m_sh2_state->ea = m_sh2_state->r[n];
/* Bus Lock enable */
temp = RB( m_sh2_state->ea );
@@ -1844,9 +1844,9 @@ void sh2_device::TAS(UINT32 n)
}
/* TRAPA #imm */
-void sh2_device::TRAPA(UINT32 i)
+void sh2_device::TRAPA(uint32_t i)
{
- UINT32 imm = i & 0xff;
+ uint32_t imm = i & 0xff;
m_sh2_state->ea = m_sh2_state->vbr + imm * 4;
@@ -1861,7 +1861,7 @@ void sh2_device::TRAPA(UINT32 i)
}
/* TST Rm,Rn */
-void sh2_device::TST(UINT32 m, UINT32 n)
+void sh2_device::TST(uint32_t m, uint32_t n)
{
if ((m_sh2_state->r[n] & m_sh2_state->r[m]) == 0)
m_sh2_state->sr |= T;
@@ -1870,9 +1870,9 @@ void sh2_device::TST(UINT32 m, UINT32 n)
}
/* TST #imm,R0 */
-void sh2_device::TSTI(UINT32 i)
+void sh2_device::TSTI(uint32_t i)
{
- UINT32 imm = i & 0xff;
+ uint32_t imm = i & 0xff;
if ((imm & m_sh2_state->r[0]) == 0)
m_sh2_state->sr |= T;
@@ -1881,9 +1881,9 @@ void sh2_device::TSTI(UINT32 i)
}
/* TST.B #imm,@(R0,GBR) */
-void sh2_device::TSTM(UINT32 i)
+void sh2_device::TSTM(uint32_t i)
{
- UINT32 imm = i & 0xff;
+ uint32_t imm = i & 0xff;
m_sh2_state->ea = m_sh2_state->gbr + m_sh2_state->r[0];
if ((imm & RB( m_sh2_state->ea )) == 0)
@@ -1894,23 +1894,23 @@ void sh2_device::TSTM(UINT32 i)
}
/* XOR Rm,Rn */
-void sh2_device::XOR(UINT32 m, UINT32 n)
+void sh2_device::XOR(uint32_t m, uint32_t n)
{
m_sh2_state->r[n] ^= m_sh2_state->r[m];
}
/* XOR #imm,R0 */
-void sh2_device::XORI(UINT32 i)
+void sh2_device::XORI(uint32_t i)
{
- UINT32 imm = i & 0xff;
+ uint32_t imm = i & 0xff;
m_sh2_state->r[0] ^= imm;
}
/* XOR.B #imm,@(R0,GBR) */
-void sh2_device::XORM(UINT32 i)
+void sh2_device::XORM(uint32_t i)
{
- UINT32 imm = i & 0xff;
- UINT32 temp;
+ uint32_t imm = i & 0xff;
+ uint32_t temp;
m_sh2_state->ea = m_sh2_state->gbr + m_sh2_state->r[0];
temp = RB( m_sh2_state->ea );
@@ -1920,9 +1920,9 @@ void sh2_device::XORM(UINT32 i)
}
/* XTRCT Rm,Rn */
-void sh2_device::XTRCT(UINT32 m, UINT32 n)
+void sh2_device::XTRCT(uint32_t m, uint32_t n)
{
- UINT32 temp;
+ uint32_t temp;
temp = (m_sh2_state->r[m] << 16) & 0xffff0000;
m_sh2_state->r[n] = (m_sh2_state->r[n] >> 16) & 0x0000ffff;
@@ -1933,7 +1933,7 @@ void sh2_device::XTRCT(UINT32 m, UINT32 n)
* OPCODE DISPATCHERS
*****************************************************************************/
-void sh2_device::op0000(UINT16 opcode)
+void sh2_device::op0000(uint16_t opcode)
{
switch (opcode & 0x3F)
{
@@ -2010,12 +2010,12 @@ void sh2_device::op0000(UINT16 opcode)
}
}
-void sh2_device::op0001(UINT16 opcode)
+void sh2_device::op0001(uint16_t opcode)
{
MOVLS4(Rm, opcode & 0x0f, Rn);
}
-void sh2_device::op0010(UINT16 opcode)
+void sh2_device::op0010(uint16_t opcode)
{
switch (opcode & 15)
{
@@ -2038,7 +2038,7 @@ void sh2_device::op0010(UINT16 opcode)
}
}
-void sh2_device::op0011(UINT16 opcode)
+void sh2_device::op0011(uint16_t opcode)
{
switch (opcode & 15)
{
@@ -2061,7 +2061,7 @@ void sh2_device::op0011(UINT16 opcode)
}
}
-void sh2_device::op0100(UINT16 opcode)
+void sh2_device::op0100(uint16_t opcode)
{
switch (opcode & 0x3F)
{
@@ -2136,12 +2136,12 @@ void sh2_device::op0100(UINT16 opcode)
}
}
-void sh2_device::op0101(UINT16 opcode)
+void sh2_device::op0101(uint16_t opcode)
{
MOVLL4(Rm, opcode & 0x0f, Rn);
}
-void sh2_device::op0110(UINT16 opcode)
+void sh2_device::op0110(uint16_t opcode)
{
switch (opcode & 15)
{
@@ -2164,12 +2164,12 @@ void sh2_device::op0110(UINT16 opcode)
}
}
-void sh2_device::op0111(UINT16 opcode)
+void sh2_device::op0111(uint16_t opcode)
{
ADDI(opcode & 0xff, Rn);
}
-void sh2_device::op1000(UINT16 opcode)
+void sh2_device::op1000(uint16_t opcode)
{
switch ( opcode & (15<<8) )
{
@@ -2193,22 +2193,22 @@ void sh2_device::op1000(UINT16 opcode)
}
-void sh2_device::op1001(UINT16 opcode)
+void sh2_device::op1001(uint16_t opcode)
{
MOVWI(opcode & 0xff, Rn);
}
-void sh2_device::op1010(UINT16 opcode)
+void sh2_device::op1010(uint16_t opcode)
{
BRA(opcode & 0xfff);
}
-void sh2_device::op1011(UINT16 opcode)
+void sh2_device::op1011(uint16_t opcode)
{
BSR(opcode & 0xfff);
}
-void sh2_device::op1100(UINT16 opcode)
+void sh2_device::op1100(uint16_t opcode)
{
switch (opcode & (15<<8))
{
@@ -2231,17 +2231,17 @@ void sh2_device::op1100(UINT16 opcode)
}
}
-void sh2_device::op1101(UINT16 opcode)
+void sh2_device::op1101(uint16_t opcode)
{
MOVLI(opcode & 0xff, Rn);
}
-void sh2_device::op1110(UINT16 opcode)
+void sh2_device::op1110(uint16_t opcode)
{
MOVI(opcode & 0xff, Rn);
}
-void sh2_device::op1111(UINT16 opcode)
+void sh2_device::op1111(uint16_t opcode)
{
ILLEGAL();
}
@@ -2307,7 +2307,7 @@ void sh2_device::execute_run()
do
{
- UINT32 opcode;
+ uint32_t opcode;
debugger_instruction_hook(this, m_sh2_state->pc);
@@ -2516,7 +2516,7 @@ void sh2_device::device_start()
m_pcfsel = 0;
/* initialize the UML generator */
- UINT32 flags = 0;
+ uint32_t flags = 0;
m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, flags, 1, 32, 1);
/* add symbols for our stuff */
diff --git a/src/devices/cpu/sh2/sh2.h b/src/devices/cpu/sh2/sh2.h
index 081b31f6cf1..dad81c972ec 100644
--- a/src/devices/cpu/sh2/sh2.h
+++ b/src/devices/cpu/sh2/sh2.h
@@ -48,14 +48,14 @@ enum
};
-typedef device_delegate<int (UINT32 src, UINT32 dst, UINT32 data, int size)> sh2_dma_kludge_delegate;
-#define SH2_DMA_KLUDGE_CB(name) int name(UINT32 src, UINT32 dst, UINT32 data, int size)
+typedef device_delegate<int (uint32_t src, uint32_t dst, uint32_t data, int size)> sh2_dma_kludge_delegate;
+#define SH2_DMA_KLUDGE_CB(name) int name(uint32_t src, uint32_t dst, uint32_t data, int size)
-typedef device_delegate<int (UINT32 src, UINT32 dst, UINT32 data, int size)> sh2_dma_fifo_data_available_delegate;
-#define SH2_DMA_FIFO_DATA_AVAILABLE_CB(name) int name(UINT32 src, UINT32 dst, UINT32 data, int size)
+typedef device_delegate<int (uint32_t src, uint32_t dst, uint32_t data, int size)> sh2_dma_fifo_data_available_delegate;
+#define SH2_DMA_FIFO_DATA_AVAILABLE_CB(name) int name(uint32_t src, uint32_t dst, uint32_t data, int size)
-typedef device_delegate<void (UINT32 data)> sh2_ftcsr_read_delegate;
-#define SH2_FTCSR_READ_CB(name) void name(UINT32 data)
+typedef device_delegate<void (uint32_t data)> sh2_ftcsr_read_delegate;
+#define SH2_FTCSR_READ_CB(name) void name(uint32_t data)
#define MCFG_SH2_IS_SLAVE(_slave) \
@@ -92,8 +92,8 @@ class sh2_device : public cpu_device
public:
// construction/destruction
- sh2_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
- sh2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int cpu_type,address_map_constructor internal_map, int addrlines);
+ sh2_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
+ sh2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int cpu_type,address_map_constructor internal_map, int addrlines);
static void set_is_slave(device_t &device, int slave) { downcast<sh2_device &>(device).m_is_slave = slave; }
static void set_dma_kludge_callback(device_t &device, sh2_dma_kludge_delegate callback) { downcast<sh2_device &>(device).m_dma_kludge_cb = callback; }
@@ -105,9 +105,9 @@ public:
DECLARE_READ32_MEMBER(sh2_internal_a5);
void sh2_set_frt_input(int state);
- void sh2drc_set_options(UINT32 options);
+ void sh2drc_set_options(uint32_t options);
void sh2drc_add_pcflush(offs_t address);
- void sh2drc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base);
+ void sh2drc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base);
void sh2_notify_dma_data_available();
@@ -118,10 +118,10 @@ protected:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 4; }
- virtual UINT32 execute_input_lines() const override { return 16; }
- virtual UINT32 execute_default_irq_vector() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 4; }
+ virtual uint32_t execute_input_lines() const override { return 16; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -133,9 +133,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space *m_program, *m_decrypted_program;
private:
@@ -144,31 +144,31 @@ private:
// Data that needs to be stored close to the generated DRC code
struct internal_sh2_state
{
- UINT32 pc;
- UINT32 pr;
- UINT32 sr;
- UINT32 gbr;
- UINT32 vbr;
- UINT32 mach;
- UINT32 macl;
- UINT32 r[16];
- UINT32 ea;
- UINT32 pending_irq;
- UINT32 pending_nmi;
- INT32 irqline;
- UINT32 evec; // exception vector for DRC
- UINT32 irqsr; // IRQ-time old SR for DRC
- UINT32 target; // target for jmp/jsr/etc so the delay slot can't kill it
+ uint32_t pc;
+ uint32_t pr;
+ uint32_t sr;
+ uint32_t gbr;
+ uint32_t vbr;
+ uint32_t mach;
+ uint32_t macl;
+ uint32_t r[16];
+ uint32_t ea;
+ uint32_t pending_irq;
+ uint32_t pending_nmi;
+ int32_t irqline;
+ uint32_t evec; // exception vector for DRC
+ uint32_t irqsr; // IRQ-time old SR for DRC
+ uint32_t target; // target for jmp/jsr/etc so the delay slot can't kill it
int internal_irq_level;
int icount;
- UINT8 sleep_mode;
- UINT32 arg0; /* print_debug argument 1 */
+ uint8_t sleep_mode;
+ uint32_t arg0; /* print_debug argument 1 */
};
- UINT32 m_delay;
- UINT32 m_cpu_off;
- UINT32 m_dvsr, m_dvdnth, m_dvdntl, m_dvcr;
- UINT32 m_test_irq;
+ uint32_t m_delay;
+ uint32_t m_cpu_off;
+ uint32_t m_dvsr, m_dvdnth, m_dvdntl, m_dvcr;
+ uint32_t m_test_irq;
struct
{
int irq_vector;
@@ -179,19 +179,19 @@ private:
int m_pcfsel; // last pcflush entry set
int m_maxpcfsel; // highest valid pcflush entry
- UINT32 m_pcflushes[16]; // pcflush entries
+ uint32_t m_pcflushes[16]; // pcflush entries
- INT8 m_irq_line_state[17];
+ int8_t m_irq_line_state[17];
protected:
direct_read_data *m_direct;
private:
address_space *m_internal;
- UINT32 m_m[0x200/4];
- INT8 m_nmi_line_state;
+ uint32_t m_m[0x200/4];
+ int8_t m_nmi_line_state;
- UINT16 m_frc;
- UINT16 m_ocra, m_ocrb, m_icr;
- UINT64 m_frc_base;
+ uint16_t m_frc;
+ uint16_t m_ocra, m_ocrb, m_icr;
+ uint64_t m_frc_base;
int m_frt_input;
int m_internal_irq_vector;
@@ -199,17 +199,17 @@ private:
emu_timer *m_timer;
emu_timer *m_dma_current_active_timer[2];
int m_dma_timer_active[2];
- UINT8 m_dma_irq[2];
+ uint8_t m_dma_irq[2];
int m_active_dma_incs[2];
int m_active_dma_incd[2];
int m_active_dma_size[2];
int m_active_dma_steal[2];
- UINT32 m_active_dma_src[2];
- UINT32 m_active_dma_dst[2];
- UINT32 m_active_dma_count[2];
- UINT16 m_wtcnt;
- UINT8 m_wtcsr;
+ uint32_t m_active_dma_src[2];
+ uint32_t m_active_dma_dst[2];
+ uint32_t m_active_dma_count[2];
+ uint16_t m_wtcnt;
+ uint8_t m_wtcsr;
int m_is_slave, m_cpu_type;
sh2_dma_kludge_delegate m_dma_kludge_cb;
@@ -219,17 +219,17 @@ private:
drc_cache m_cache; /* pointer to the DRC code cache */
std::unique_ptr<drcuml_state> m_drcuml; /* DRC UML generator state */
std::unique_ptr<sh2_frontend> m_drcfe; /* pointer to the DRC front-end state */
- UINT32 m_drcoptions; /* configurable DRC options */
+ uint32_t m_drcoptions; /* configurable DRC options */
internal_sh2_state *m_sh2_state;
/* internal stuff */
- UINT8 m_cache_dirty; /* true if we need to flush the cache */
+ uint8_t m_cache_dirty; /* true if we need to flush the cache */
/* parameters for subroutines */
- UINT64 m_numcycles; /* return value from gettotalcycles */
- UINT32 m_arg1; /* print_debug argument 2 */
- UINT32 m_irq; /* irq we're taking */
+ uint64_t m_numcycles; /* return value from gettotalcycles */
+ uint32_t m_arg1; /* print_debug argument 2 */
+ uint32_t m_irq; /* irq we're taking */
/* register mappings */
uml::parameter m_regmap[16]; /* parameter to register mappings for all 16 integer registers */
@@ -247,182 +247,182 @@ private:
uml::code_handle * m_out_of_cycles; /* out of cycles exception handler */
/* fast RAM */
- UINT32 m_fastram_select;
+ uint32_t m_fastram_select;
struct
{
offs_t start; /* start of the RAM block */
offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
+ uint8_t readonly; /* TRUE if read-only */
void * base; /* base in memory where the RAM lives */
} m_fastram[SH2_MAX_FASTRAM];
- UINT32 m_debugger_temp;
-
- inline UINT8 RB(offs_t A);
- inline UINT16 RW(offs_t A);
- inline UINT32 RL(offs_t A);
- inline void WB(offs_t A, UINT8 V);
- inline void WW(offs_t A, UINT16 V);
- inline void WL(offs_t A, UINT32 V);
- inline void ADD(UINT32 m, UINT32 n);
- inline void ADDI(UINT32 i, UINT32 n);
- inline void ADDC(UINT32 m, UINT32 n);
- inline void ADDV(UINT32 m, UINT32 n);
- inline void AND(UINT32 m, UINT32 n);
- inline void ANDI(UINT32 i);
- inline void ANDM(UINT32 i);
- inline void BF(UINT32 d);
- inline void BFS(UINT32 d);
- inline void BRA(UINT32 d);
- inline void BRAF(UINT32 m);
- inline void BSR(UINT32 d);
- inline void BSRF(UINT32 m);
- inline void BT(UINT32 d);
- inline void BTS(UINT32 d);
+ uint32_t m_debugger_temp;
+
+ inline uint8_t RB(offs_t A);
+ inline uint16_t RW(offs_t A);
+ inline uint32_t RL(offs_t A);
+ inline void WB(offs_t A, uint8_t V);
+ inline void WW(offs_t A, uint16_t V);
+ inline void WL(offs_t A, uint32_t V);
+ inline void ADD(uint32_t m, uint32_t n);
+ inline void ADDI(uint32_t i, uint32_t n);
+ inline void ADDC(uint32_t m, uint32_t n);
+ inline void ADDV(uint32_t m, uint32_t n);
+ inline void AND(uint32_t m, uint32_t n);
+ inline void ANDI(uint32_t i);
+ inline void ANDM(uint32_t i);
+ inline void BF(uint32_t d);
+ inline void BFS(uint32_t d);
+ inline void BRA(uint32_t d);
+ inline void BRAF(uint32_t m);
+ inline void BSR(uint32_t d);
+ inline void BSRF(uint32_t m);
+ inline void BT(uint32_t d);
+ inline void BTS(uint32_t d);
inline void CLRMAC();
inline void CLRT();
- inline void CMPEQ(UINT32 m, UINT32 n);
- inline void CMPGE(UINT32 m, UINT32 n);
- inline void CMPGT(UINT32 m, UINT32 n);
- inline void CMPHI(UINT32 m, UINT32 n);
- inline void CMPHS(UINT32 m, UINT32 n);
- inline void CMPPL(UINT32 n);
- inline void CMPPZ(UINT32 n);
- inline void CMPSTR(UINT32 m, UINT32 n);
- inline void CMPIM(UINT32 i);
- inline void DIV0S(UINT32 m, UINT32 n);
+ inline void CMPEQ(uint32_t m, uint32_t n);
+ inline void CMPGE(uint32_t m, uint32_t n);
+ inline void CMPGT(uint32_t m, uint32_t n);
+ inline void CMPHI(uint32_t m, uint32_t n);
+ inline void CMPHS(uint32_t m, uint32_t n);
+ inline void CMPPL(uint32_t n);
+ inline void CMPPZ(uint32_t n);
+ inline void CMPSTR(uint32_t m, uint32_t n);
+ inline void CMPIM(uint32_t i);
+ inline void DIV0S(uint32_t m, uint32_t n);
inline void DIV0U();
- inline void DIV1(UINT32 m, UINT32 n);
- inline void DMULS(UINT32 m, UINT32 n);
- inline void DMULU(UINT32 m, UINT32 n);
- inline void DT(UINT32 n);
- inline void EXTSB(UINT32 m, UINT32 n);
- inline void EXTSW(UINT32 m, UINT32 n);
- inline void EXTUB(UINT32 m, UINT32 n);
- inline void EXTUW(UINT32 m, UINT32 n);
+ inline void DIV1(uint32_t m, uint32_t n);
+ inline void DMULS(uint32_t m, uint32_t n);
+ inline void DMULU(uint32_t m, uint32_t n);
+ inline void DT(uint32_t n);
+ inline void EXTSB(uint32_t m, uint32_t n);
+ inline void EXTSW(uint32_t m, uint32_t n);
+ inline void EXTUB(uint32_t m, uint32_t n);
+ inline void EXTUW(uint32_t m, uint32_t n);
inline void ILLEGAL();
- inline void JMP(UINT32 m);
- inline void JSR(UINT32 m);
- inline void LDCSR(UINT32 m);
- inline void LDCGBR(UINT32 m);
- inline void LDCVBR(UINT32 m);
- inline void LDCMSR(UINT32 m);
- inline void LDCMGBR(UINT32 m);
- inline void LDCMVBR(UINT32 m);
- inline void LDSMACH(UINT32 m);
- inline void LDSMACL(UINT32 m);
- inline void LDSPR(UINT32 m);
- inline void LDSMMACH(UINT32 m);
- inline void LDSMMACL(UINT32 m);
- inline void LDSMPR(UINT32 m);
- inline void MAC_L(UINT32 m, UINT32 n);
- inline void MAC_W(UINT32 m, UINT32 n);
- inline void MOV(UINT32 m, UINT32 n);
- inline void MOVBS(UINT32 m, UINT32 n);
- inline void MOVWS(UINT32 m, UINT32 n);
- inline void MOVLS(UINT32 m, UINT32 n);
- inline void MOVBL(UINT32 m, UINT32 n);
- inline void MOVWL(UINT32 m, UINT32 n);
- inline void MOVLL(UINT32 m, UINT32 n);
- inline void MOVBM(UINT32 m, UINT32 n);
- inline void MOVWM(UINT32 m, UINT32 n);
- inline void MOVLM(UINT32 m, UINT32 n);
- inline void MOVBP(UINT32 m, UINT32 n);
- inline void MOVWP(UINT32 m, UINT32 n);
- inline void MOVLP(UINT32 m, UINT32 n);
- inline void MOVBS0(UINT32 m, UINT32 n);
- inline void MOVWS0(UINT32 m, UINT32 n);
- inline void MOVLS0(UINT32 m, UINT32 n);
- inline void MOVBL0(UINT32 m, UINT32 n);
- inline void MOVWL0(UINT32 m, UINT32 n);
- inline void MOVLL0(UINT32 m, UINT32 n);
- inline void MOVI(UINT32 i, UINT32 n);
- inline void MOVWI(UINT32 d, UINT32 n);
- inline void MOVLI(UINT32 d, UINT32 n);
- inline void MOVBLG(UINT32 d);
- inline void MOVWLG(UINT32 d);
- inline void MOVLLG(UINT32 d);
- inline void MOVBSG(UINT32 d);
- inline void MOVWSG(UINT32 d);
- inline void MOVLSG(UINT32 d);
- inline void MOVBS4(UINT32 d, UINT32 n);
- inline void MOVWS4(UINT32 d, UINT32 n);
- inline void MOVLS4(UINT32 m, UINT32 d, UINT32 n);
- inline void MOVBL4(UINT32 m, UINT32 d);
- inline void MOVWL4(UINT32 m, UINT32 d);
- inline void MOVLL4(UINT32 m, UINT32 d, UINT32 n);
- inline void MOVA(UINT32 d);
- inline void MOVT(UINT32 n);
- inline void MULL(UINT32 m, UINT32 n);
- inline void MULS(UINT32 m, UINT32 n);
- inline void MULU(UINT32 m, UINT32 n);
- inline void NEG(UINT32 m, UINT32 n);
- inline void NEGC(UINT32 m, UINT32 n);
+ inline void JMP(uint32_t m);
+ inline void JSR(uint32_t m);
+ inline void LDCSR(uint32_t m);
+ inline void LDCGBR(uint32_t m);
+ inline void LDCVBR(uint32_t m);
+ inline void LDCMSR(uint32_t m);
+ inline void LDCMGBR(uint32_t m);
+ inline void LDCMVBR(uint32_t m);
+ inline void LDSMACH(uint32_t m);
+ inline void LDSMACL(uint32_t m);
+ inline void LDSPR(uint32_t m);
+ inline void LDSMMACH(uint32_t m);
+ inline void LDSMMACL(uint32_t m);
+ inline void LDSMPR(uint32_t m);
+ inline void MAC_L(uint32_t m, uint32_t n);
+ inline void MAC_W(uint32_t m, uint32_t n);
+ inline void MOV(uint32_t m, uint32_t n);
+ inline void MOVBS(uint32_t m, uint32_t n);
+ inline void MOVWS(uint32_t m, uint32_t n);
+ inline void MOVLS(uint32_t m, uint32_t n);
+ inline void MOVBL(uint32_t m, uint32_t n);
+ inline void MOVWL(uint32_t m, uint32_t n);
+ inline void MOVLL(uint32_t m, uint32_t n);
+ inline void MOVBM(uint32_t m, uint32_t n);
+ inline void MOVWM(uint32_t m, uint32_t n);
+ inline void MOVLM(uint32_t m, uint32_t n);
+ inline void MOVBP(uint32_t m, uint32_t n);
+ inline void MOVWP(uint32_t m, uint32_t n);
+ inline void MOVLP(uint32_t m, uint32_t n);
+ inline void MOVBS0(uint32_t m, uint32_t n);
+ inline void MOVWS0(uint32_t m, uint32_t n);
+ inline void MOVLS0(uint32_t m, uint32_t n);
+ inline void MOVBL0(uint32_t m, uint32_t n);
+ inline void MOVWL0(uint32_t m, uint32_t n);
+ inline void MOVLL0(uint32_t m, uint32_t n);
+ inline void MOVI(uint32_t i, uint32_t n);
+ inline void MOVWI(uint32_t d, uint32_t n);
+ inline void MOVLI(uint32_t d, uint32_t n);
+ inline void MOVBLG(uint32_t d);
+ inline void MOVWLG(uint32_t d);
+ inline void MOVLLG(uint32_t d);
+ inline void MOVBSG(uint32_t d);
+ inline void MOVWSG(uint32_t d);
+ inline void MOVLSG(uint32_t d);
+ inline void MOVBS4(uint32_t d, uint32_t n);
+ inline void MOVWS4(uint32_t d, uint32_t n);
+ inline void MOVLS4(uint32_t m, uint32_t d, uint32_t n);
+ inline void MOVBL4(uint32_t m, uint32_t d);
+ inline void MOVWL4(uint32_t m, uint32_t d);
+ inline void MOVLL4(uint32_t m, uint32_t d, uint32_t n);
+ inline void MOVA(uint32_t d);
+ inline void MOVT(uint32_t n);
+ inline void MULL(uint32_t m, uint32_t n);
+ inline void MULS(uint32_t m, uint32_t n);
+ inline void MULU(uint32_t m, uint32_t n);
+ inline void NEG(uint32_t m, uint32_t n);
+ inline void NEGC(uint32_t m, uint32_t n);
inline void NOP(void);
- inline void NOT(UINT32 m, UINT32 n);
- inline void OR(UINT32 m, UINT32 n);
- inline void ORI(UINT32 i);
- inline void ORM(UINT32 i);
- inline void ROTCL(UINT32 n);
- inline void ROTCR(UINT32 n);
- inline void ROTL(UINT32 n);
- inline void ROTR(UINT32 n);
+ inline void NOT(uint32_t m, uint32_t n);
+ inline void OR(uint32_t m, uint32_t n);
+ inline void ORI(uint32_t i);
+ inline void ORM(uint32_t i);
+ inline void ROTCL(uint32_t n);
+ inline void ROTCR(uint32_t n);
+ inline void ROTL(uint32_t n);
+ inline void ROTR(uint32_t n);
inline void RTE();
inline void RTS();
inline void SETT();
- inline void SHAL(UINT32 n);
- inline void SHAR(UINT32 n);
- inline void SHLL(UINT32 n);
- inline void SHLL2(UINT32 n);
- inline void SHLL8(UINT32 n);
- inline void SHLL16(UINT32 n);
- inline void SHLR(UINT32 n);
- inline void SHLR2(UINT32 n);
- inline void SHLR8(UINT32 n);
- inline void SHLR16(UINT32 n);
+ inline void SHAL(uint32_t n);
+ inline void SHAR(uint32_t n);
+ inline void SHLL(uint32_t n);
+ inline void SHLL2(uint32_t n);
+ inline void SHLL8(uint32_t n);
+ inline void SHLL16(uint32_t n);
+ inline void SHLR(uint32_t n);
+ inline void SHLR2(uint32_t n);
+ inline void SHLR8(uint32_t n);
+ inline void SHLR16(uint32_t n);
inline void SLEEP();
- inline void STCSR(UINT32 n);
- inline void STCGBR(UINT32 n);
- inline void STCVBR(UINT32 n);
- inline void STCMSR(UINT32 n);
- inline void STCMGBR(UINT32 n);
- inline void STCMVBR(UINT32 n);
- inline void STSMACH(UINT32 n);
- inline void STSMACL(UINT32 n);
- inline void STSPR(UINT32 n);
- inline void STSMMACH(UINT32 n);
- inline void STSMMACL(UINT32 n);
- inline void STSMPR(UINT32 n);
- inline void SUB(UINT32 m, UINT32 n);
- inline void SUBC(UINT32 m, UINT32 n);
- inline void SUBV(UINT32 m, UINT32 n);
- inline void SWAPB(UINT32 m, UINT32 n);
- inline void SWAPW(UINT32 m, UINT32 n);
- inline void TAS(UINT32 n);
- inline void TRAPA(UINT32 i);
- inline void TST(UINT32 m, UINT32 n);
- inline void TSTI(UINT32 i);
- inline void TSTM(UINT32 i);
- inline void XOR(UINT32 m, UINT32 n);
- inline void XORI(UINT32 i);
- inline void XORM(UINT32 i);
- inline void XTRCT(UINT32 m, UINT32 n);
- inline void op0000(UINT16 opcode);
- inline void op0001(UINT16 opcode);
- inline void op0010(UINT16 opcode);
- inline void op0011(UINT16 opcode);
- inline void op0100(UINT16 opcode);
- inline void op0101(UINT16 opcode);
- inline void op0110(UINT16 opcode);
- inline void op0111(UINT16 opcode);
- inline void op1000(UINT16 opcode);
- inline void op1001(UINT16 opcode);
- inline void op1010(UINT16 opcode);
- inline void op1011(UINT16 opcode);
- inline void op1100(UINT16 opcode);
- inline void op1101(UINT16 opcode);
- inline void op1110(UINT16 opcode);
- inline void op1111(UINT16 opcode);
+ inline void STCSR(uint32_t n);
+ inline void STCGBR(uint32_t n);
+ inline void STCVBR(uint32_t n);
+ inline void STCMSR(uint32_t n);
+ inline void STCMGBR(uint32_t n);
+ inline void STCMVBR(uint32_t n);
+ inline void STSMACH(uint32_t n);
+ inline void STSMACL(uint32_t n);
+ inline void STSPR(uint32_t n);
+ inline void STSMMACH(uint32_t n);
+ inline void STSMMACL(uint32_t n);
+ inline void STSMPR(uint32_t n);
+ inline void SUB(uint32_t m, uint32_t n);
+ inline void SUBC(uint32_t m, uint32_t n);
+ inline void SUBV(uint32_t m, uint32_t n);
+ inline void SWAPB(uint32_t m, uint32_t n);
+ inline void SWAPW(uint32_t m, uint32_t n);
+ inline void TAS(uint32_t n);
+ inline void TRAPA(uint32_t i);
+ inline void TST(uint32_t m, uint32_t n);
+ inline void TSTI(uint32_t i);
+ inline void TSTM(uint32_t i);
+ inline void XOR(uint32_t m, uint32_t n);
+ inline void XORI(uint32_t i);
+ inline void XORM(uint32_t i);
+ inline void XTRCT(uint32_t m, uint32_t n);
+ inline void op0000(uint16_t opcode);
+ inline void op0001(uint16_t opcode);
+ inline void op0010(uint16_t opcode);
+ inline void op0011(uint16_t opcode);
+ inline void op0100(uint16_t opcode);
+ inline void op0101(uint16_t opcode);
+ inline void op0110(uint16_t opcode);
+ inline void op0111(uint16_t opcode);
+ inline void op1000(uint16_t opcode);
+ inline void op1001(uint16_t opcode);
+ inline void op1010(uint16_t opcode);
+ inline void op1011(uint16_t opcode);
+ inline void op1100(uint16_t opcode);
+ inline void op1101(uint16_t opcode);
+ inline void op1110(uint16_t opcode);
+ inline void op1111(uint16_t opcode);
TIMER_CALLBACK_MEMBER( sh2_timer_callback );
TIMER_CALLBACK_MEMBER( sh2_dma_current_active_callback );
void sh2_timer_resync();
@@ -435,39 +435,39 @@ private:
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
uml::code_label labelnum; /* index for local labels */
};
- inline UINT32 epc(const opcode_desc *desc);
+ inline uint32_t epc(const opcode_desc *desc);
inline void alloc_handle(drcuml_state *drcuml, uml::code_handle **handleptr, const char *name);
inline void load_fast_iregs(drcuml_block *block);
inline void save_fast_iregs(drcuml_block *block);
void code_flush_cache();
void execute_run_drc();
- void code_compile_block(UINT8 mode, offs_t pc);
+ void code_compile_block(uint8_t mode, offs_t pc);
void static_generate_entry_point();
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle **handleptr);
- const char *log_desc_flags_to_string(UINT32 flags);
- void log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist);
+ const char *log_desc_flags_to_string(uint32_t flags);
+ void log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent);
- void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op);
+ void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op);
void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, int allow_exception);
void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 ovrpc);
- void generate_delay_slot(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 ovrpc);
- int generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 ovrpc);
- int generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc);
- int generate_group_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc);
- int generate_group_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, UINT32 ovrpc);
- int generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc);
- int generate_group_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc);
- int generate_group_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc);
- int generate_group_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc);
+ void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc);
+ void generate_delay_slot(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc);
+ int generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc);
+ int generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ int generate_group_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ int generate_group_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, uint32_t ovrpc);
+ int generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ int generate_group_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ int generate_group_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
+ int generate_group_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc);
public:
void func_printf_probe();
@@ -484,7 +484,7 @@ class sh2a_device : public sh2_device
{
public:
// construction/destruction
- sh2a_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ sh2a_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
DECLARE_READ32_MEMBER(dma_sar0_r);
DECLARE_WRITE32_MEMBER(dma_sar0_w);
@@ -501,15 +501,15 @@ public:
void sh7032_dma_exec(int ch);
private:
- UINT16 m_sh7021_regs[0x200];
+ uint16_t m_sh7021_regs[0x200];
struct
{
- UINT32 sar; /**< Source Address Register */
- UINT32 dar; /**< Destination Address Register */
- UINT16 tcr; /**< Transfer Count Register */
- UINT16 chcr; /**< Channel Control Register */
+ uint32_t sar; /**< Source Address Register */
+ uint32_t dar; /**< Destination Address Register */
+ uint16_t tcr; /**< Transfer Count Register */
+ uint16_t chcr; /**< Channel Control Register */
} m_dma[4];
- UINT16 m_dmaor; /**< DMA Operation Register (status flags) */
+ uint16_t m_dmaor; /**< DMA Operation Register (status flags) */
};
@@ -517,31 +517,31 @@ class sh1_device : public sh2_device
{
public:
// construction/destruction
- sh1_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ sh1_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
DECLARE_READ16_MEMBER(sh7032_r);
DECLARE_WRITE16_MEMBER(sh7032_w);
private:
- UINT16 m_sh7032_regs[0x200];
+ uint16_t m_sh7032_regs[0x200];
};
class sh2_frontend : public drc_frontend
{
public:
- sh2_frontend(sh2_device *device, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
+ sh2_frontend(sh2_device *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
protected:
virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override;
private:
- bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_2(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_3(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_6(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_8(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_12(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
+ bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_2(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_3(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_6(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_8(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_12(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
sh2_device *m_sh2;
};
diff --git a/src/devices/cpu/sh2/sh2comn.cpp b/src/devices/cpu/sh2/sh2comn.cpp
index b5d8e43aaa3..a3a15262490 100644
--- a/src/devices/cpu/sh2/sh2comn.cpp
+++ b/src/devices/cpu/sh2/sh2comn.cpp
@@ -23,8 +23,8 @@ static const int div_tab[4] = { 3, 5, 7, 0 };
void sh2_device::sh2_timer_resync()
{
int divider = div_tab[(m_m[5] >> 8) & 3];
- UINT64 cur_time = total_cycles();
- UINT64 add = (cur_time - m_frc_base) >> divider;
+ uint64_t cur_time = total_cycles();
+ uint64_t add = (cur_time - m_frc_base) >> divider;
if (add > 0)
{
@@ -38,19 +38,19 @@ void sh2_device::sh2_timer_resync()
void sh2_device::sh2_timer_activate()
{
int max_delta = 0xfffff;
- UINT16 frc;
+ uint16_t frc;
m_timer->adjust(attotime::never);
frc = m_frc;
if(!(m_m[4] & OCFA)) {
- UINT16 delta = m_ocra - frc;
+ uint16_t delta = m_ocra - frc;
if(delta < max_delta)
max_delta = delta;
}
if(!(m_m[4] & OCFB) && (m_ocra <= m_ocrb || !(m_m[4] & 0x010000))) {
- UINT16 delta = m_ocrb - frc;
+ uint16_t delta = m_ocrb - frc;
if(delta < max_delta)
max_delta = delta;
}
@@ -75,7 +75,7 @@ void sh2_device::sh2_timer_activate()
TIMER_CALLBACK_MEMBER( sh2_device::sh2_timer_callback )
{
- UINT16 frc;
+ uint16_t frc;
sh2_timer_resync();
@@ -144,9 +144,9 @@ void sh2_device::sh2_notify_dma_data_available()
void sh2_device::sh2_do_dma(int dma)
{
- UINT32 dmadata;
+ uint32_t dmadata;
- UINT32 tempsrc, tempdst;
+ uint32_t tempsrc, tempdst;
if (m_active_dma_count[dma] > 0)
{
@@ -465,7 +465,7 @@ void sh2_device::sh2_dmac_check(int dma)
WRITE32_MEMBER( sh2_device::sh7604_w )
{
- UINT32 old;
+ uint32_t old;
old = m_m[offset];
COMBINE_DATA(m_m+offset);
@@ -582,8 +582,8 @@ WRITE32_MEMBER( sh2_device::sh7604_w )
break;
case 0x41: // DVDNT
{
- INT32 a = m_m[0x41];
- INT32 b = m_m[0x40];
+ int32_t a = m_m[0x41];
+ int32_t b = m_m[0x40];
LOG(("SH2 '%s' div+mod %d/%d\n", tag(), a, b));
if (b)
{
@@ -610,13 +610,13 @@ WRITE32_MEMBER( sh2_device::sh7604_w )
break;
case 0x45: // DVDNTL
{
- INT64 a = m_m[0x45] | ((UINT64)(m_m[0x44]) << 32);
- INT64 b = (INT32)m_m[0x40];
+ int64_t a = m_m[0x45] | ((uint64_t)(m_m[0x44]) << 32);
+ int64_t b = (int32_t)m_m[0x40];
LOG(("SH2 '%s' div+mod %d/%d\n", tag(), a, b));
if (b)
{
- INT64 q = a / b;
- if (q != (INT32)q)
+ int64_t q = a / b;
+ if (q != (int32_t)q)
{
m_m[0x42] |= 0x00010000;
m_m[0x45] = 0x7fffffff;
@@ -891,7 +891,7 @@ void sh2_device::sh2_exception(const char *message, int irqline)
void sh2a_device::sh7032_dma_exec(int ch)
{
const short dma_word_size[4] = { 0, +1, -1, 0 };
- UINT8 rs = (m_dma[ch].chcr >> 8) & 0xf; /**< Resource Select bits */
+ uint8_t rs = (m_dma[ch].chcr >> 8) & 0xf; /**< Resource Select bits */
if(rs != 0xc) // Auto-Request
{
logerror("Warning: SH7032 DMA enables non auto-request transfer\n");
@@ -903,14 +903,14 @@ void sh2a_device::sh7032_dma_exec(int ch)
return;
printf("%08x %08x %04x\n",m_dma[ch].sar,m_dma[ch].dar,m_dma[ch].chcr);
- UINT8 dm = (m_dma[ch].chcr >> 14) & 3; /**< Destination Address Mode bits */
- UINT8 sm = (m_dma[ch].chcr >> 12) & 3; /**< Source Address Mode bits */
+ uint8_t dm = (m_dma[ch].chcr >> 14) & 3; /**< Destination Address Mode bits */
+ uint8_t sm = (m_dma[ch].chcr >> 12) & 3; /**< Source Address Mode bits */
bool ts = (m_dma[ch].chcr & 8); /**< Transfer Size bit */
int src_word_size = dma_word_size[sm] * ((ts == true) ? 2 : 1);
int dst_word_size = dma_word_size[dm] * ((ts == true) ? 2 : 1);
- UINT32 src_addr = m_dma[ch].sar;
- UINT32 dst_addr = m_dma[ch].dar;
- UINT32 size_index = m_dma[ch].tcr;
+ uint32_t src_addr = m_dma[ch].sar;
+ uint32_t dst_addr = m_dma[ch].dar;
+ uint32_t size_index = m_dma[ch].tcr;
if(size_index == 0)
size_index = 0x10000;
diff --git a/src/devices/cpu/sh2/sh2dasm.cpp b/src/devices/cpu/sh2/sh2dasm.cpp
index e37611b9d28..30cb8fdb98d 100644
--- a/src/devices/cpu/sh2/sh2dasm.cpp
+++ b/src/devices/cpu/sh2/sh2dasm.cpp
@@ -4,8 +4,8 @@
#include "debugger.h"
#include "sh2.h"
-#define SIGNX8(x) (((INT32)(x) << 24) >> 24)
-#define SIGNX12(x) (((INT32)(x) << 20) >> 20)
+#define SIGNX8(x) (((int32_t)(x) << 24) >> 24)
+#define SIGNX12(x) (((int32_t)(x) << 20) >> 20)
#define Rn ((opcode >> 8) & 15)
#define Rm ((opcode >> 4) & 15)
@@ -15,9 +15,9 @@ static const char *const regname[16] = {
"R8", "R9", "R10","R11","R12","R13","R14","SP"
};
-static UINT32 op0000(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0000(char *buffer, uint32_t pc, uint16_t opcode)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch(opcode & 0x3f)
{
case 0x02:
@@ -129,13 +129,13 @@ static UINT32 op0000(char *buffer, UINT32 pc, UINT16 opcode)
return flags;
}
-static UINT32 op0001(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0001(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "MOV.L %s,@($%02X,%s)", regname[Rm], (opcode & 15) * 4, regname[Rn]);
return 0;
}
-static UINT32 op0010(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0010(char *buffer, uint32_t pc, uint16_t opcode)
{
switch (opcode & 15)
{
@@ -191,7 +191,7 @@ static UINT32 op0010(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-static UINT32 op0011(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0011(char *buffer, uint32_t pc, uint16_t opcode)
{
switch (opcode & 15)
{
@@ -247,9 +247,9 @@ static UINT32 op0011(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-static UINT32 op0100(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0100(char *buffer, uint32_t pc, uint16_t opcode)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch(opcode & 0x3F)
{
case 0x00:
@@ -376,13 +376,13 @@ static UINT32 op0100(char *buffer, UINT32 pc, UINT16 opcode)
return flags;
}
-static UINT32 op0101(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0101(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "MOV.L @($%02X,%s),%s", (opcode & 15) * 4, regname[Rm], regname[Rn]);
return 0;
}
-static UINT32 op0110(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0110(char *buffer, uint32_t pc, uint16_t opcode)
{
switch(opcode & 0xF)
@@ -439,13 +439,13 @@ static UINT32 op0110(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-static UINT32 op0111(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0111(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "ADD #$%02X,%s", opcode & 0xff, regname[Rn]);
return 0;
}
-static UINT32 op1000(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1000(char *buffer, uint32_t pc, uint16_t opcode)
{
switch((opcode >> 8) & 15)
{
@@ -482,27 +482,27 @@ static UINT32 op1000(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-static UINT32 op1001(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1001(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "MOV.W @($%04X,PC),%s [%08X]", (opcode & 0xff) * 2, regname[Rn], pc+((opcode & 0xff) * 2)+2);
return 0;
}
-static UINT32 op1010(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1010(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "BRA $%08X", SIGNX12(opcode & 0xfff) * 2 + pc + 2);
return 0;
}
-static UINT32 op1011(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1011(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "BSR $%08X", SIGNX12(opcode & 0xfff) * 2 + pc + 2);
return DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
}
-static UINT32 op1100(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1100(char *buffer, uint32_t pc, uint16_t opcode)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch((opcode >> 8) & 15)
{
case 0:
@@ -558,27 +558,27 @@ static UINT32 op1100(char *buffer, UINT32 pc, UINT16 opcode)
return flags;
}
-static UINT32 op1101(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1101(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "MOV.L @($%02X,PC),%s [%08X]", (opcode * 4) & 0xff, regname[Rn], ((pc + 2) & ~3) + (opcode & 0xff) * 4);
return 0;
}
-static UINT32 op1110(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1110(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "MOV #$%02X,%s", (opcode & 0xff), regname[Rn]);
return 0;
}
-static UINT32 op1111(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1111(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "unknown $%04X", opcode);
return 0;
}
-unsigned DasmSH2(char *buffer, unsigned pc, UINT16 opcode)
+unsigned DasmSH2(char *buffer, unsigned pc, uint16_t opcode)
{
- UINT32 flags;
+ uint32_t flags;
pc += 2;
diff --git a/src/devices/cpu/sh2/sh2drc.cpp b/src/devices/cpu/sh2/sh2drc.cpp
index e7b2460198a..a77d48664e9 100644
--- a/src/devices/cpu/sh2/sh2drc.cpp
+++ b/src/devices/cpu/sh2/sh2drc.cpp
@@ -12,7 +12,7 @@
#include "sh2.h"
#include "sh2comn.h"
-extern unsigned DasmSH2(char *buffer, unsigned pc, UINT16 opcode);
+extern unsigned DasmSH2(char *buffer, unsigned pc, uint16_t opcode);
using namespace uml;
@@ -62,7 +62,7 @@ using namespace uml;
descriptor
-------------------------------------------------*/
-UINT32 sh2_device::epc(const opcode_desc *desc)
+uint32_t sh2_device::epc(const opcode_desc *desc)
{
return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 1) : desc->pc;
}
@@ -127,36 +127,36 @@ static void cfunc_printf_probe(void *param)
void sh2_device::func_printf_probe()
{
- UINT32 pc = m_sh2_state->pc;
+ uint32_t pc = m_sh2_state->pc;
printf(" PC=%08X r0=%08X r1=%08X r2=%08X\n",
pc,
- (UINT32)m_sh2_state->r[0],
- (UINT32)m_sh2_state->r[1],
- (UINT32)m_sh2_state->r[2]);
+ (uint32_t)m_sh2_state->r[0],
+ (uint32_t)m_sh2_state->r[1],
+ (uint32_t)m_sh2_state->r[2]);
printf(" r3=%08X r4=%08X r5=%08X r6=%08X\n",
- (UINT32)m_sh2_state->r[3],
- (UINT32)m_sh2_state->r[4],
- (UINT32)m_sh2_state->r[5],
- (UINT32)m_sh2_state->r[6]);
+ (uint32_t)m_sh2_state->r[3],
+ (uint32_t)m_sh2_state->r[4],
+ (uint32_t)m_sh2_state->r[5],
+ (uint32_t)m_sh2_state->r[6]);
printf(" r7=%08X r8=%08X r9=%08X r10=%08X\n",
- (UINT32)m_sh2_state->r[7],
- (UINT32)m_sh2_state->r[8],
- (UINT32)m_sh2_state->r[9],
- (UINT32)m_sh2_state->r[10]);
+ (uint32_t)m_sh2_state->r[7],
+ (uint32_t)m_sh2_state->r[8],
+ (uint32_t)m_sh2_state->r[9],
+ (uint32_t)m_sh2_state->r[10]);
printf(" r11=%08X r12=%08X r13=%08X r14=%08X\n",
- (UINT32)m_sh2_state->r[11],
- (UINT32)m_sh2_state->r[12],
- (UINT32)m_sh2_state->r[13],
- (UINT32)m_sh2_state->r[14]);
+ (uint32_t)m_sh2_state->r[11],
+ (uint32_t)m_sh2_state->r[12],
+ (uint32_t)m_sh2_state->r[13],
+ (uint32_t)m_sh2_state->r[14]);
printf(" r15=%08X macl=%08X mach=%08X gbr=%08X\n",
- (UINT32)m_sh2_state->r[15],
- (UINT32)m_sh2_state->macl,
- (UINT32)m_sh2_state->mach,
- (UINT32)m_sh2_state->gbr);
+ (uint32_t)m_sh2_state->r[15],
+ (uint32_t)m_sh2_state->macl,
+ (uint32_t)m_sh2_state->mach,
+ (uint32_t)m_sh2_state->gbr);
printf(" evec %x irqsr %x pc=%08x\n",
- (UINT32)m_sh2_state->evec,
- (UINT32)m_sh2_state->irqsr, (UINT32)m_sh2_state->pc);
+ (uint32_t)m_sh2_state->evec,
+ (uint32_t)m_sh2_state->irqsr, (uint32_t)m_sh2_state->pc);
}
/*-------------------------------------------------
@@ -202,9 +202,9 @@ static void cfunc_MAC_W(void *param)
void sh2_device::func_MAC_W()
{
- INT32 tempm, tempn, dest, src, ans;
- UINT32 templ;
- UINT16 opcode;
+ int32_t tempm, tempn, dest, src, ans;
+ uint32_t templ;
+ uint16_t opcode;
int n, m;
// recover the opcode
@@ -214,17 +214,17 @@ void sh2_device::func_MAC_W()
n = Rn;
m = Rm;
- tempn = (INT32) RW( m_sh2_state->r[n] );
+ tempn = (int32_t) RW( m_sh2_state->r[n] );
m_sh2_state->r[n] += 2;
- tempm = (INT32) RW( m_sh2_state->r[m] );
+ tempm = (int32_t) RW( m_sh2_state->r[m] );
m_sh2_state->r[m] += 2;
templ = m_sh2_state->macl;
- tempm = ((INT32) (short) tempn * (INT32) (short) tempm);
- if ((INT32) m_sh2_state->macl >= 0)
+ tempm = ((int32_t) (short) tempn * (int32_t) (short) tempm);
+ if ((int32_t) m_sh2_state->macl >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) tempm >= 0)
+ if ((int32_t) tempm >= 0)
{
src = 0;
tempn = 0;
@@ -236,7 +236,7 @@ void sh2_device::func_MAC_W()
}
src += dest;
m_sh2_state->macl += tempm;
- if ((INT32) m_sh2_state->macl >= 0)
+ if ((int32_t) m_sh2_state->macl >= 0)
ans = 0;
else
ans = 1;
@@ -289,10 +289,10 @@ static void cfunc_MAC_L(void *param)
void sh2_device::func_MAC_L()
{
- UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
- UINT32 temp0, temp1, temp2, temp3;
- INT32 tempm, tempn, fnLmL;
- UINT16 opcode;
+ uint32_t RnL, RnH, RmL, RmH, Res0, Res1, Res2;
+ uint32_t temp0, temp1, temp2, temp3;
+ int32_t tempm, tempn, fnLmL;
+ uint16_t opcode;
int n, m;
// recover the opcode
@@ -302,11 +302,11 @@ void sh2_device::func_MAC_L()
n = Rn;
m = Rm;
- tempn = (INT32) RL( m_sh2_state->r[n] );
+ tempn = (int32_t) RL( m_sh2_state->r[n] );
m_sh2_state->r[n] += 4;
- tempm = (INT32) RL( m_sh2_state->r[m] );
+ tempm = (int32_t) RL( m_sh2_state->r[m] );
m_sh2_state->r[m] += 4;
- if ((INT32) (tempn ^ tempm) < 0)
+ if ((int32_t) (tempn ^ tempm) < 0)
fnLmL = -1;
else
fnLmL = 0;
@@ -314,8 +314,8 @@ void sh2_device::func_MAC_L()
tempn = 0 - tempn;
if (tempm < 0)
tempm = 0 - tempm;
- temp1 = (UINT32) tempn;
- temp2 = (UINT32) tempm;
+ temp1 = (uint32_t) tempn;
+ temp2 = (uint32_t) tempm;
RnL = temp1 & 0x0000ffff;
RnH = (temp1 >> 16) & 0x0000ffff;
RmL = temp2 & 0x0000ffff;
@@ -347,12 +347,12 @@ void sh2_device::func_MAC_L()
if (m_sh2_state->macl > Res0)
Res2++;
Res2 += (m_sh2_state->mach & 0x0000ffff);
- if (((INT32) Res2 < 0) && (Res2 < 0xffff8000))
+ if (((int32_t) Res2 < 0) && (Res2 < 0xffff8000))
{
Res2 = 0x00008000;
Res0 = 0x00000000;
}
- else if (((INT32) Res2 > 0) && (Res2 > 0x00007fff))
+ else if (((int32_t) Res2 > 0) && (Res2 > 0x00007fff))
{
Res2 = 0x00007fff;
Res0 = 0xffffffff;
@@ -381,9 +381,9 @@ static void cfunc_DIV1(void *param)
void sh2_device::func_DIV1()
{
- UINT32 tmp0;
- UINT32 old_q;
- UINT16 opcode;
+ uint32_t tmp0;
+ uint32_t old_q;
+ uint16_t opcode;
int n, m;
// recover the opcode
@@ -490,8 +490,8 @@ static void cfunc_ADDV(void *param)
void sh2_device::func_ADDV()
{
- INT32 dest, src, ans;
- UINT16 opcode;
+ int32_t dest, src, ans;
+ uint16_t opcode;
int n, m;
// recover the opcode
@@ -501,17 +501,17 @@ void sh2_device::func_ADDV()
n = Rn;
m = Rm;
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) m_sh2_state->r[m] >= 0)
+ if ((int32_t) m_sh2_state->r[m] >= 0)
src = 0;
else
src = 1;
src += dest;
m_sh2_state->r[n] += m_sh2_state->r[m];
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
ans = 0;
else
ans = 1;
@@ -537,8 +537,8 @@ static void cfunc_SUBV(void *param)
void sh2_device::func_SUBV()
{
- INT32 dest, src, ans;
- UINT16 opcode;
+ int32_t dest, src, ans;
+ uint16_t opcode;
int n, m;
// recover the opcode
@@ -548,17 +548,17 @@ void sh2_device::func_SUBV()
n = Rn;
m = Rm;
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) m_sh2_state->r[m] >= 0)
+ if ((int32_t) m_sh2_state->r[m] >= 0)
src = 0;
else
src = 1;
src += dest;
m_sh2_state->r[n] -= m_sh2_state->r[m];
- if ((INT32) m_sh2_state->r[n] >= 0)
+ if ((int32_t) m_sh2_state->r[n] >= 0)
ans = 0;
else
ans = 1;
@@ -662,7 +662,7 @@ void sh2_device::execute_run_drc()
given mode at the specified pc
-------------------------------------------------*/
-void sh2_device::code_compile_block(UINT8 mode, offs_t pc)
+void sh2_device::code_compile_block(uint8_t mode, offs_t pc)
{
drcuml_state *drcuml = m_drcuml.get();
compiler_state compiler = { 0 };
@@ -690,7 +690,7 @@ void sh2_device::code_compile_block(UINT8 mode, offs_t pc)
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
const opcode_desc *curdesc;
- UINT32 nextpc;
+ uint32_t nextpc;
/* add a code log entry */
if (drcuml->logging())
@@ -938,8 +938,8 @@ void sh2_device::static_generate_memory_accessor(int size, int iswrite, const ch
{
if (elem.base != nullptr && (!iswrite || !elem.readonly))
{
- void *fastbase = (UINT8 *)elem.base - elem.start;
- UINT32 skip = label++;
+ void *fastbase = (uint8_t *)elem.base - elem.start;
+ uint32_t skip = label++;
if (elem.end != 0xffffffff)
{
UML_CMP(block, I0, elem.end); // cmp i0,end
@@ -1038,7 +1038,7 @@ void sh2_device::static_generate_memory_accessor(int size, int iswrite, const ch
flags
-------------------------------------------------*/
-const char *sh2_device::log_desc_flags_to_string(UINT32 flags)
+const char *sh2_device::log_desc_flags_to_string(uint32_t flags)
{
static char tempbuf[30];
char *dest = tempbuf;
@@ -1092,7 +1092,7 @@ const char *sh2_device::log_desc_flags_to_string(UINT32 flags)
log_register_list - log a list of GPR registers
-------------------------------------------------*/
-void sh2_device::log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist)
+void sh2_device::log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist)
{
int count = 0;
int regnum;
@@ -1205,7 +1205,7 @@ void sh2_device::log_opcode_desc(drcuml_state *drcuml, const opcode_desc *descli
including disassembly of an SH2 instruction
-------------------------------------------------*/
-void sh2_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op)
+void sh2_device::log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op)
{
if (m_drcuml->logging())
{
@@ -1329,7 +1329,7 @@ void sh2_device::generate_checksum_block(drcuml_block *block, compiler_state *co
UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc
}
#else
- UINT32 sum = 0;
+ uint32_t sum = 0;
void *base = m_direct->read_ptr(seqhead->physpc, SH2_CODE_XOR(0));
UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x4); // load i0,base,word
sum += seqhead->opptr.w[0];
@@ -1353,7 +1353,7 @@ void sh2_device::generate_checksum_block(drcuml_block *block, compiler_state *co
for a single instruction in a sequence
-------------------------------------------------*/
-void sh2_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 ovrpc)
+void sh2_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc)
{
offs_t expc;
@@ -1438,7 +1438,7 @@ void sh2_device::generate_sequence_instruction(drcuml_block *block, compiler_sta
generate_delay_slot
------------------------------------------------------------------*/
-void sh2_device::generate_delay_slot(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 ovrpc)
+void sh2_device::generate_delay_slot(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc)
{
compiler_state compiler_temp = *compiler;
@@ -1455,12 +1455,12 @@ void sh2_device::generate_delay_slot(drcuml_block *block, compiler_state *compil
opcode
-------------------------------------------------*/
-int sh2_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 ovrpc)
+int sh2_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t ovrpc)
{
- UINT32 scratch, scratch2;
- INT32 disp;
- UINT16 opcode = desc->opptr.w[0];
- UINT8 opswitch = opcode >> 12;
+ uint32_t scratch, scratch2;
+ int32_t disp;
+ uint16_t opcode = desc->opptr.w[0];
+ uint8_t opswitch = opcode >> 12;
int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0);
switch (opswitch)
@@ -1502,7 +1502,7 @@ int sh2_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
case 7: // ADDI
scratch = opcode & 0xff;
- scratch2 = (UINT32)(INT32)(INT16)(INT8)scratch;
+ scratch2 = (uint32_t)(int32_t)(int16_t)(int8_t)scratch;
UML_ADD(block, R32(Rn), R32(Rn), scratch2); // add Rn, Rn, scratch2
return TRUE;
@@ -1528,7 +1528,7 @@ int sh2_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
}
else
{
- scratch2 = (UINT32)(INT32)(INT16) RW(scratch);
+ scratch2 = (uint32_t)(int32_t)(int16_t) RW(scratch);
UML_MOV(block, R32(Rn), scratch2); // mov Rn, scratch2
}
@@ -1537,7 +1537,7 @@ int sh2_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return TRUE;
case 10: // BRA
- disp = ((INT32)opcode << 20) >> 20;
+ disp = ((int32_t)opcode << 20) >> 20;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = pc+4 + disp*2 + 2
generate_delay_slot(block, compiler, desc, m_sh2_state->ea-2);
@@ -1551,7 +1551,7 @@ int sh2_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
// do this before running the delay slot
UML_ADD(block, mem(&m_sh2_state->pr), desc->pc, 4); // add m_pr, desc->pc, #4 (skip the current insn & delay slot)
- disp = ((INT32)opcode << 20) >> 20;
+ disp = ((int32_t)opcode << 20) >> 20;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = pc+4 + disp*2 + 2
generate_delay_slot(block, compiler, desc, m_sh2_state->ea-2);
@@ -1591,7 +1591,7 @@ int sh2_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
case 14: // MOVI
scratch = opcode & 0xff;
- scratch2 = (UINT32)(INT32)(INT16)(INT8)scratch;
+ scratch2 = (uint32_t)(int32_t)(int16_t)(int8_t)scratch;
UML_MOV(block, R32(Rn), scratch2);
return TRUE;
@@ -1602,7 +1602,7 @@ int sh2_device::generate_opcode(drcuml_block *block, compiler_state *compiler, c
return FALSE;
}
-int sh2_device::generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc)
+int sh2_device::generate_group_0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 0x3F)
{
@@ -1849,7 +1849,7 @@ int sh2_device::generate_group_0(drcuml_block *block, compiler_state *compiler,
return FALSE;
}
-int sh2_device::generate_group_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc)
+int sh2_device::generate_group_2(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 15)
{
@@ -2018,7 +2018,7 @@ int sh2_device::generate_group_2(drcuml_block *block, compiler_state *compiler,
return FALSE;
}
-int sh2_device::generate_group_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, UINT32 ovrpc)
+int sh2_device::generate_group_3(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, uint32_t ovrpc)
{
switch (opcode & 15)
{
@@ -2130,7 +2130,7 @@ int sh2_device::generate_group_3(drcuml_block *block, compiler_state *compiler,
return FALSE;
}
-int sh2_device::generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc)
+int sh2_device::generate_group_4(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 0x3F)
{
@@ -2495,7 +2495,7 @@ int sh2_device::generate_group_4(drcuml_block *block, compiler_state *compiler,
return FALSE;
}
-int sh2_device::generate_group_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc)
+int sh2_device::generate_group_6(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
switch (opcode & 15)
{
@@ -2625,10 +2625,10 @@ int sh2_device::generate_group_6(drcuml_block *block, compiler_state *compiler,
return FALSE;
}
-int sh2_device::generate_group_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc)
+int sh2_device::generate_group_8(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
- INT32 disp;
- UINT32 udisp;
+ int32_t disp;
+ uint32_t udisp;
code_label templabel;
switch ( opcode & (15<<8) )
@@ -2701,7 +2701,7 @@ int sh2_device::generate_group_8(drcuml_block *block, compiler_state *compiler,
UML_TEST(block, mem(&m_sh2_state->sr), T); // test m_sh2_state->sr, T
UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
- disp = ((INT32)opcode << 24) >> 24;
+ disp = ((int32_t)opcode << 24) >> 24;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = destination
generate_update_cycles(block, compiler, m_sh2_state->ea, TRUE); // <subtract cycles>
@@ -2714,7 +2714,7 @@ int sh2_device::generate_group_8(drcuml_block *block, compiler_state *compiler,
UML_TEST(block, mem(&m_sh2_state->sr), T); // test m_sh2_state->sr, T
UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
- disp = ((INT32)opcode << 24) >> 24;
+ disp = ((int32_t)opcode << 24) >> 24;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = destination
generate_update_cycles(block, compiler, m_sh2_state->ea, TRUE); // <subtract cycles>
@@ -2729,7 +2729,7 @@ int sh2_device::generate_group_8(drcuml_block *block, compiler_state *compiler,
UML_TEST(block, mem(&m_sh2_state->sr), T); // test m_sh2_state->sr, T
UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
- disp = ((INT32)opcode << 24) >> 24;
+ disp = ((int32_t)opcode << 24) >> 24;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = destination
templabel = compiler->labelnum; // save our label
@@ -2750,7 +2750,7 @@ int sh2_device::generate_group_8(drcuml_block *block, compiler_state *compiler,
UML_TEST(block, mem(&m_sh2_state->sr), T); // test m_sh2_state->sr, T
UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
- disp = ((INT32)opcode << 24) >> 24;
+ disp = ((int32_t)opcode << 24) >> 24;
m_sh2_state->ea = (desc->pc + 2) + disp * 2 + 2; // m_sh2_state->ea = destination
templabel = compiler->labelnum; // save our label
@@ -2769,9 +2769,9 @@ int sh2_device::generate_group_8(drcuml_block *block, compiler_state *compiler,
return FALSE;
}
-int sh2_device::generate_group_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT16 opcode, int in_delay_slot, UINT32 ovrpc)
+int sh2_device::generate_group_12(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc)
{
- UINT32 scratch;
+ uint32_t scratch;
switch (opcode & (15<<8))
{
@@ -2943,7 +2943,7 @@ int sh2_device::generate_group_12(drcuml_block *block, compiler_state *compiler,
sh2drc_set_options - configure DRC options
-------------------------------------------------*/
-void sh2_device::sh2drc_set_options(UINT32 options)
+void sh2_device::sh2drc_set_options(uint32_t options)
{
if (!allow_drc()) return;
m_drcoptions = options;
@@ -2969,7 +2969,7 @@ void sh2_device::sh2drc_add_pcflush(offs_t address)
region
-------------------------------------------------*/
-void sh2_device::sh2drc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base)
+void sh2_device::sh2drc_add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
{
if (m_fastram_select < ARRAY_LENGTH(m_fastram))
{
diff --git a/src/devices/cpu/sh2/sh2fe.cpp b/src/devices/cpu/sh2/sh2fe.cpp
index 8ea8ccb82d3..f6b409a0cd5 100644
--- a/src/devices/cpu/sh2/sh2fe.cpp
+++ b/src/devices/cpu/sh2/sh2fe.cpp
@@ -18,7 +18,7 @@
INSTRUCTION PARSERS
***************************************************************************/
-sh2_frontend::sh2_frontend(sh2_device *device, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
+sh2_frontend::sh2_frontend(sh2_device *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
: drc_frontend(*device, window_start, window_end, max_sequence)
, m_sh2(device)
{
@@ -31,7 +31,7 @@ sh2_frontend::sh2_frontend(sh2_device *device, UINT32 window_start, UINT32 windo
bool sh2_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
- UINT16 opcode;
+ uint16_t opcode;
/* fetch the opcode */
opcode = desc.opptr.w[0] = m_sh2->m_direct->read_word(desc.physpc, SH2_CODE_XOR(0));
@@ -86,7 +86,7 @@ bool sh2_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
// (intentional fallthrough - BSR is BRA with the addition of PR = the return address)
case 10: // BRA
{
- INT32 disp = ((INT32)opcode << 20) >> 20;
+ int32_t disp = ((int32_t)opcode << 20) >> 20;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = (desc.pc + 2) + disp * 2 + 2;
@@ -114,7 +114,7 @@ bool sh2_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
return false;
}
-bool sh2_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode)
+bool sh2_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode)
{
switch (opcode & 0x3F)
{
@@ -283,7 +283,7 @@ bool sh2_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev,
return false;
}
-bool sh2_frontend::describe_group_2(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode)
+bool sh2_frontend::describe_group_2(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode)
{
switch (opcode & 15)
{
@@ -331,7 +331,7 @@ bool sh2_frontend::describe_group_2(opcode_desc &desc, const opcode_desc *prev,
return false;
}
-bool sh2_frontend::describe_group_3(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode)
+bool sh2_frontend::describe_group_3(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode)
{
switch (opcode & 15)
{
@@ -380,7 +380,7 @@ bool sh2_frontend::describe_group_3(opcode_desc &desc, const opcode_desc *prev,
return false;
}
-bool sh2_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode)
+bool sh2_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode)
{
switch (opcode & 0x3F)
{
@@ -610,7 +610,7 @@ bool sh2_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev,
return false;
}
-bool sh2_frontend::describe_group_6(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode)
+bool sh2_frontend::describe_group_6(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode)
{
switch (opcode & 15)
{
@@ -651,9 +651,9 @@ bool sh2_frontend::describe_group_6(opcode_desc &desc, const opcode_desc *prev,
return false;
}
-bool sh2_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode)
+bool sh2_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode)
{
- INT32 disp;
+ int32_t disp;
switch ( opcode & (15<<8) )
{
@@ -689,7 +689,7 @@ bool sh2_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev,
case 11<< 8: // BF(opcode & 0xff);
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.cycles = 3;
- disp = ((INT32)opcode << 24) >> 24;
+ disp = ((int32_t)opcode << 24) >> 24;
desc.targetpc = (desc.pc + 2) + disp * 2 + 2;
return true;
@@ -697,7 +697,7 @@ bool sh2_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev,
case 15<< 8: // BFS(opcode & 0xff);
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.cycles = 2;
- disp = ((INT32)opcode << 24) >> 24;
+ disp = ((int32_t)opcode << 24) >> 24;
desc.targetpc = (desc.pc + 2) + disp * 2 + 2;
desc.delayslots = 1;
return true;
@@ -706,7 +706,7 @@ bool sh2_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev,
return false;
}
-bool sh2_frontend::describe_group_12(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode)
+bool sh2_frontend::describe_group_12(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode)
{
switch (opcode & (15<<8))
{
diff --git a/src/devices/cpu/sh2/sh7604_bus.cpp b/src/devices/cpu/sh2/sh7604_bus.cpp
index 19b0df01740..aa170a7f23e 100644
--- a/src/devices/cpu/sh2/sh7604_bus.cpp
+++ b/src/devices/cpu/sh2/sh7604_bus.cpp
@@ -108,7 +108,7 @@ ADDRESS_MAP_END
// sh7604_bus_device - constructor
//-------------------------------------------------
-sh7604_bus_device::sh7604_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh7604_bus_device::sh7604_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SH7604_BUS, "sh7604_bus_longname", tag, owner, clock, "sh7604_bus", __FILE__),
device_memory_interface(mconfig, *this),
m_space_config("regs", ENDIANNESS_BIG, 16, 4, 0, nullptr, *ADDRESS_MAP_NAME(bus_regs))
diff --git a/src/devices/cpu/sh2/sh7604_bus.h b/src/devices/cpu/sh2/sh7604_bus.h
index df796fa371f..0ad5c13e47d 100644
--- a/src/devices/cpu/sh2/sh7604_bus.h
+++ b/src/devices/cpu/sh2/sh7604_bus.h
@@ -31,7 +31,7 @@ class sh7604_bus_device : public device_t,
{
public:
// construction/destruction
- sh7604_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sh7604_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// I/O operations
DECLARE_WRITE32_MEMBER( write );
@@ -62,12 +62,12 @@ private:
bool m_is_slave;
const address_space_config m_space_config;
- UINT16 m_bcr1;
- UINT16 m_bcr2;
- UINT16 m_wcr;
- UINT16 m_mcr;
- UINT16 m_rtcsr;
- UINT16 m_rtcor;
+ uint16_t m_bcr1;
+ uint16_t m_bcr2;
+ uint16_t m_wcr;
+ uint16_t m_mcr;
+ uint16_t m_rtcsr;
+ uint16_t m_rtcor;
};
diff --git a/src/devices/cpu/sh2/sh7604_sci.cpp b/src/devices/cpu/sh2/sh7604_sci.cpp
index 21b06b7bc7c..6d50707e6f1 100644
--- a/src/devices/cpu/sh2/sh7604_sci.cpp
+++ b/src/devices/cpu/sh2/sh7604_sci.cpp
@@ -112,7 +112,7 @@ ADDRESS_MAP_END
// sh7604_sci_device - constructor
//-------------------------------------------------
-sh7604_sci_device::sh7604_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh7604_sci_device::sh7604_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SH7604_SCI, "sh7604_sci_longname", tag, owner, clock, "sh7604_sci", __FILE__),
device_memory_interface(mconfig, *this),
m_space_config("regs", ENDIANNESS_BIG, 8, 4, 0, nullptr, *ADDRESS_MAP_NAME(sci_regs))
diff --git a/src/devices/cpu/sh2/sh7604_sci.h b/src/devices/cpu/sh2/sh7604_sci.h
index 66e364f0cfe..2969ed1f88d 100644
--- a/src/devices/cpu/sh2/sh7604_sci.h
+++ b/src/devices/cpu/sh2/sh7604_sci.h
@@ -42,7 +42,7 @@ class sh7604_sci_device : public device_t,
{
public:
// construction/destruction
- sh7604_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sh7604_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// I/O operations
DECLARE_WRITE8_MEMBER( write );
@@ -69,10 +69,10 @@ protected:
virtual void device_reset() override;
private:
const address_space_config m_space_config;
- UINT8 m_smr;
- UINT8 m_scr;
- UINT8 m_ssr;
- UINT8 m_brr;
+ uint8_t m_smr;
+ uint8_t m_scr;
+ uint8_t m_ssr;
+ uint8_t m_brr;
};
diff --git a/src/devices/cpu/sh2/sh7604_wdt.cpp b/src/devices/cpu/sh2/sh7604_wdt.cpp
index 722a7d59db2..9222a8c88cf 100644
--- a/src/devices/cpu/sh2/sh7604_wdt.cpp
+++ b/src/devices/cpu/sh2/sh7604_wdt.cpp
@@ -38,7 +38,7 @@ ADDRESS_MAP_END
// sh7604_wdt_device - constructor
//-------------------------------------------------
-sh7604_wdt_device::sh7604_wdt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh7604_wdt_device::sh7604_wdt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SH7604_WDT, "sh7604_wdt_longname", tag, owner, clock, "sh7604_wdt", __FILE__),
device_memory_interface(mconfig, *this),
m_space_config("regs", ENDIANNESS_BIG, 8, 4, 0, nullptr, *ADDRESS_MAP_NAME(wdt_regs))
@@ -76,7 +76,7 @@ READ8_MEMBER( sh7604_wdt_device::read )
WRITE16_MEMBER( sh7604_wdt_device::write )
{
- UINT8 id_param = data >> 8;
+ uint8_t id_param = data >> 8;
switch(id_param)
{
case 0xa5: space.write_byte(offset*2+0,data & 0xff); break;
diff --git a/src/devices/cpu/sh2/sh7604_wdt.h b/src/devices/cpu/sh2/sh7604_wdt.h
index e9d69f00227..e77dd9e37d6 100644
--- a/src/devices/cpu/sh2/sh7604_wdt.h
+++ b/src/devices/cpu/sh2/sh7604_wdt.h
@@ -31,7 +31,7 @@ class sh7604_wdt_device : public device_t,
{
public:
// construction/destruction
- sh7604_wdt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sh7604_wdt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// I/O operations
DECLARE_WRITE16_MEMBER( write );
diff --git a/src/devices/cpu/sh4/sh3comn.cpp b/src/devices/cpu/sh4/sh3comn.cpp
index 1fcacaa9165..4a50e748eb9 100644
--- a/src/devices/cpu/sh4/sh3comn.cpp
+++ b/src/devices/cpu/sh4/sh3comn.cpp
@@ -75,7 +75,7 @@ WRITE32_MEMBER( sh3_base_device::sh3_internal_high_w )
READ32_MEMBER( sh3_base_device::sh3_internal_high_r )
{
- UINT32 ret = 0;
+ uint32_t ret = 0;
switch (offset)
{
@@ -378,7 +378,7 @@ WRITE32_MEMBER( sh3_base_device::sh3_internal_w )
{
if (offset<0x1000)
{
- //UINT32 old = m_sh3internal_lower[offset];
+ //uint32_t old = m_sh3internal_lower[offset];
COMBINE_DATA(&m_sh3internal_lower[offset]);
switch (offset)
diff --git a/src/devices/cpu/sh4/sh4.cpp b/src/devices/cpu/sh4/sh4.cpp
index e716512ae6d..481566905a1 100644
--- a/src/devices/cpu/sh4/sh4.cpp
+++ b/src/devices/cpu/sh4/sh4.cpp
@@ -33,7 +33,7 @@
#include "sh4tmu.h"
#if SH4_USE_FASTRAM_OPTIMIZATION
-void sh34_base_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base)
+void sh34_base_device::add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
{
if (m_fastram_select < ARRAY_LENGTH(m_fastram))
{
@@ -45,7 +45,7 @@ void sh34_base_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, voi
}
}
#else
-void sh34_base_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base)
+void sh34_base_device::add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base)
{
}
#endif
@@ -85,7 +85,7 @@ static ADDRESS_MAP_START( sh3_internal_map, AS_PROGRAM, 64, sh3_base_device )
ADDRESS_MAP_END
-sh34_base_device::sh34_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness, address_map_constructor internal)
+sh34_base_device::sh34_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, endianness_t endianness, address_map_constructor internal)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, m_program_config("program", endianness, 64, 32, 0, internal)
, m_io_config("io", endianness, 64, 8)
@@ -113,45 +113,45 @@ sh34_base_device::sh34_base_device(const machine_config &mconfig, device_type ty
}
-sh3_base_device::sh3_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness)
+sh3_base_device::sh3_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, endianness_t endianness)
: sh34_base_device(mconfig, type, name, tag, owner, clock, shortname, endianness, ADDRESS_MAP_NAME(sh3_internal_map))
{
m_cpu_type = CPU_TYPE_SH3;
}
-sh4_base_device::sh4_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness)
+sh4_base_device::sh4_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, endianness_t endianness)
: sh34_base_device(mconfig, type, name, tag, owner, clock, shortname, endianness, ADDRESS_MAP_NAME(sh4_internal_map))
{
m_cpu_type = CPU_TYPE_SH4;
}
-sh3_device::sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh3_device::sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sh3_base_device(mconfig, SH3LE, "SH-3 (little)", tag, owner, clock, "sh3", ENDIANNESS_LITTLE)
{
}
-sh3be_device::sh3be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh3be_device::sh3be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sh3_base_device(mconfig, SH3BE, "SH-3 (big)", tag, owner, clock, "sh3be", ENDIANNESS_BIG)
{
}
-sh4_device::sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh4_device::sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sh4_base_device(mconfig, SH4LE, "SH-4 (little)", tag, owner, clock, "sh4", ENDIANNESS_LITTLE)
{
}
-sh4be_device::sh4be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sh4be_device::sh4be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sh4_base_device(mconfig, SH4BE, "SH-4 (big)", tag, owner, clock, "sh4be", ENDIANNESS_BIG)
{
}
-offs_t sh34_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sh34_base_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( sh4 );
@@ -159,7 +159,7 @@ offs_t sh34_base_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
}
-offs_t sh3be_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sh3be_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( sh4be );
@@ -167,7 +167,7 @@ offs_t sh3be_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
}
-offs_t sh4be_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sh4be_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( sh4be );
@@ -176,7 +176,7 @@ offs_t sh4be_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
/* Called for unimplemented opcodes */
-void sh34_base_device::TODO(const UINT16 opcode)
+void sh34_base_device::TODO(const uint16_t opcode)
{
}
@@ -198,7 +198,7 @@ if ((m_fpscr & PR) == 1)
int data_type_of(int n)
{
-UINT32 abs;
+uint32_t abs;
abs = m_fr[n] & 0x7fffffff;
if ((m_fpscr & PR) == 0) { /* Single-precision */
@@ -258,7 +258,7 @@ UINT32 abs;
}
#endif
-inline UINT8 sh34_base_device::RB(offs_t A)
+inline uint8_t sh34_base_device::RB(offs_t A)
{
if (A >= 0xe0000000)
return m_program->read_byte(A);
@@ -271,7 +271,7 @@ inline UINT8 sh34_base_device::RB(offs_t A)
{
continue;
}
- UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
return fastbase[_A ^ m_byte_xor];
}
return m_program->read_byte(_A);
@@ -281,7 +281,7 @@ inline UINT8 sh34_base_device::RB(offs_t A)
}
-inline UINT16 sh34_base_device::RW(offs_t A)
+inline uint16_t sh34_base_device::RW(offs_t A)
{
if (A >= 0xe0000000)
return m_program->read_word(A);
@@ -294,8 +294,8 @@ inline UINT16 sh34_base_device::RW(offs_t A)
{
continue;
}
- UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- return ((UINT16*)fastbase)[(_A ^ m_word_xor) >> 1];
+ uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ return ((uint16_t*)fastbase)[(_A ^ m_word_xor) >> 1];
}
return m_program->read_word(_A);
#else
@@ -304,7 +304,7 @@ inline UINT16 sh34_base_device::RW(offs_t A)
}
-inline UINT32 sh34_base_device::RL(offs_t A)
+inline uint32_t sh34_base_device::RL(offs_t A)
{
if (A >= 0xe0000000)
return m_program->read_dword(A);
@@ -317,8 +317,8 @@ inline UINT32 sh34_base_device::RL(offs_t A)
{
continue;
}
- UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- return ((UINT32*)fastbase)[(_A^m_dword_xor) >> 2];
+ uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ return ((uint32_t*)fastbase)[(_A^m_dword_xor) >> 2];
}
return m_program->read_dword(_A);
#else
@@ -327,7 +327,7 @@ inline UINT32 sh34_base_device::RL(offs_t A)
}
-inline void sh34_base_device::WB(offs_t A, UINT8 V)
+inline void sh34_base_device::WB(offs_t A, uint8_t V)
{
if (A >= 0xe0000000)
{
@@ -342,7 +342,7 @@ inline void sh34_base_device::WB(offs_t A, UINT8 V)
{
continue;
}
- UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ uint8_t *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
fastbase[_A ^ m_byte_xor] = V;
return;
}
@@ -353,7 +353,7 @@ inline void sh34_base_device::WB(offs_t A, UINT8 V)
}
-inline void sh34_base_device::WW(offs_t A, UINT16 V)
+inline void sh34_base_device::WW(offs_t A, uint16_t V)
{
if (A >= 0xe0000000)
{
@@ -368,8 +368,8 @@ inline void sh34_base_device::WW(offs_t A, UINT16 V)
{
continue;
}
- void *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- ((UINT16*)fastbase)[(_A ^ m_word_xor) >> 1] = V;
+ void *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ ((uint16_t*)fastbase)[(_A ^ m_word_xor) >> 1] = V;
return;
}
m_program->write_word(_A,V);
@@ -379,7 +379,7 @@ inline void sh34_base_device::WW(offs_t A, UINT16 V)
}
-inline void sh34_base_device::WL(offs_t A, UINT32 V)
+inline void sh34_base_device::WL(offs_t A, uint32_t V)
{
if (A >= 0xe0000000)
{
@@ -394,8 +394,8 @@ inline void sh34_base_device::WL(offs_t A, UINT32 V)
{
continue;
}
- void *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start;
- ((UINT32*)fastbase)[(_A ^ m_dword_xor) >> 2] = V;
+ void *fastbase = (uint8_t*)m_fastram[ramnum].base - m_fastram[ramnum].start;
+ ((uint32_t*)fastbase)[(_A ^ m_dword_xor) >> 2] = V;
return;
}
m_program->write_dword(_A,V);
@@ -408,7 +408,7 @@ inline void sh34_base_device::WL(offs_t A, UINT32 V)
* 0011 nnnn mmmm 1100 1 -
* ADD Rm,Rn
*/
-inline void sh34_base_device::ADD(const UINT16 opcode)
+inline void sh34_base_device::ADD(const uint16_t opcode)
{
m_r[Rn] += m_r[Rm];
}
@@ -417,19 +417,19 @@ inline void sh34_base_device::ADD(const UINT16 opcode)
* 0111 nnnn iiii iiii 1 -
* ADD #imm,Rn
*/
-inline void sh34_base_device::ADDI(const UINT16 opcode)
+inline void sh34_base_device::ADDI(const uint16_t opcode)
{
- m_r[Rn] += (INT32)(INT16)(INT8)(opcode&0xff);
+ m_r[Rn] += (int32_t)(int16_t)(int8_t)(opcode&0xff);
}
/* code cycles t-bit
* 0011 nnnn mmmm 1110 1 carry
* ADDC Rm,Rn
*/
-inline void sh34_base_device::ADDC(const UINT16 opcode)
+inline void sh34_base_device::ADDC(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
- UINT32 tmp0, tmp1;
+ uint32_t m = Rm; uint32_t n = Rn;
+ uint32_t tmp0, tmp1;
tmp1 = m_r[n] + m_r[m];
tmp0 = m_r[n];
@@ -446,22 +446,22 @@ inline void sh34_base_device::ADDC(const UINT16 opcode)
* 0011 nnnn mmmm 1111 1 overflow
* ADDV Rm,Rn
*/
-inline void sh34_base_device::ADDV(const UINT16 opcode)
+inline void sh34_base_device::ADDV(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
- INT32 dest, src, ans;
+ uint32_t m = Rm; uint32_t n = Rn;
+ int32_t dest, src, ans;
- if ((INT32) m_r[n] >= 0)
+ if ((int32_t) m_r[n] >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) m_r[m] >= 0)
+ if ((int32_t) m_r[m] >= 0)
src = 0;
else
src = 1;
src += dest;
m_r[n] += m_r[m];
- if ((INT32) m_r[n] >= 0)
+ if ((int32_t) m_r[n] >= 0)
ans = 0;
else
ans = 1;
@@ -481,7 +481,7 @@ inline void sh34_base_device::ADDV(const UINT16 opcode)
* 0010 nnnn mmmm 1001 1 -
* AND Rm,Rn
*/
-inline void sh34_base_device::AND(const UINT16 opcode)
+inline void sh34_base_device::AND(const uint16_t opcode)
{
m_r[Rn] &= m_r[Rm];
}
@@ -491,7 +491,7 @@ inline void sh34_base_device::AND(const UINT16 opcode)
* 1100 1001 iiii iiii 1 -
* AND #imm,R0
*/
-inline void sh34_base_device::ANDI(const UINT16 opcode)
+inline void sh34_base_device::ANDI(const uint16_t opcode)
{
m_r[0] &= (opcode&0xff);
}
@@ -500,9 +500,9 @@ inline void sh34_base_device::ANDI(const UINT16 opcode)
* 1100 1101 iiii iiii 1 -
* AND.B #imm,@(R0,GBR)
*/
-inline void sh34_base_device::ANDM(const UINT16 opcode)
+inline void sh34_base_device::ANDM(const uint16_t opcode)
{
- UINT32 temp;
+ uint32_t temp;
m_ea = m_gbr + m_r[0];
temp = (opcode&0xff) & RB( m_ea );
@@ -514,11 +514,11 @@ inline void sh34_base_device::ANDM(const UINT16 opcode)
* 1000 1011 dddd dddd 3/1 -
* BF disp8
*/
-inline void sh34_base_device::BF(const UINT16 opcode)
+inline void sh34_base_device::BF(const uint16_t opcode)
{
if ((m_sr & T) == 0)
{
- INT32 disp = ((INT32)(opcode&0xff) << 24) >> 24;
+ int32_t disp = ((int32_t)(opcode&0xff) << 24) >> 24;
m_pc = m_ea = m_pc + disp * 2 + 2;
m_sh4_icount -= 2;
}
@@ -528,11 +528,11 @@ inline void sh34_base_device::BF(const UINT16 opcode)
* 1000 1111 dddd dddd 3/1 -
* BFS disp8
*/
-inline void sh34_base_device::BFS(const UINT16 opcode)
+inline void sh34_base_device::BFS(const uint16_t opcode)
{
if ((m_sr & T) == 0)
{
- INT32 disp = ((INT32)(opcode&0xff) << 24) >> 24;
+ int32_t disp = ((int32_t)(opcode&0xff) << 24) >> 24;
m_delay = m_ea = m_pc + disp * 2 + 2;
m_sh4_icount--;
}
@@ -542,14 +542,14 @@ inline void sh34_base_device::BFS(const UINT16 opcode)
* 1010 dddd dddd dddd 2 -
* BRA disp12
*/
-inline void sh34_base_device::BRA(const UINT16 opcode)
+inline void sh34_base_device::BRA(const uint16_t opcode)
{
- INT32 disp = ((INT32)(opcode&0xfff) << 20) >> 20;
+ int32_t disp = ((int32_t)(opcode&0xfff) << 20) >> 20;
#if BUSY_LOOP_HACKS
if (disp == -2)
{
- UINT32 next_opcode = RW(m_pc & AM);
+ uint32_t next_opcode = RW(m_pc & AM);
/* BRA $
* NOP
*/
@@ -565,7 +565,7 @@ inline void sh34_base_device::BRA(const UINT16 opcode)
* 0000 mmmm 0010 0011 2 -
* BRAF Rm
*/
-inline void sh34_base_device::BRAF(const UINT16 opcode)
+inline void sh34_base_device::BRAF(const uint16_t opcode)
{
m_delay = m_pc + m_r[Rn] + 2;
m_sh4_icount--;
@@ -575,9 +575,9 @@ inline void sh34_base_device::BRAF(const UINT16 opcode)
* 1011 dddd dddd dddd 2 -
* BSR disp12
*/
-inline void sh34_base_device::BSR(const UINT16 opcode)
+inline void sh34_base_device::BSR(const uint16_t opcode)
{
- INT32 disp = ((INT32)(opcode&0xfff) << 20) >> 20;
+ int32_t disp = ((int32_t)(opcode&0xfff) << 20) >> 20;
m_pr = m_pc + 2;
m_delay = m_ea = m_pc + disp * 2 + 2;
@@ -588,7 +588,7 @@ inline void sh34_base_device::BSR(const UINT16 opcode)
* 0000 mmmm 0000 0011 2 -
* BSRF Rm
*/
-inline void sh34_base_device::BSRF(const UINT16 opcode)
+inline void sh34_base_device::BSRF(const uint16_t opcode)
{
m_pr = m_pc + 2;
m_delay = m_pc + m_r[Rn] + 2;
@@ -599,11 +599,11 @@ inline void sh34_base_device::BSRF(const UINT16 opcode)
* 1000 1001 dddd dddd 3/1 -
* BT disp8
*/
-inline void sh34_base_device::BT(const UINT16 opcode)
+inline void sh34_base_device::BT(const uint16_t opcode)
{
if ((m_sr & T) != 0)
{
- INT32 disp = ((INT32)(opcode&0xff) << 24) >> 24;
+ int32_t disp = ((int32_t)(opcode&0xff) << 24) >> 24;
m_pc = m_ea = m_pc + disp * 2 + 2;
m_sh4_icount -= 2;
}
@@ -613,11 +613,11 @@ inline void sh34_base_device::BT(const UINT16 opcode)
* 1000 1101 dddd dddd 2/1 -
* BTS disp8
*/
-inline void sh34_base_device::BTS(const UINT16 opcode)
+inline void sh34_base_device::BTS(const uint16_t opcode)
{
if ((m_sr & T) != 0)
{
- INT32 disp = ((INT32)(opcode&0xff) << 24) >> 24;
+ int32_t disp = ((int32_t)(opcode&0xff) << 24) >> 24;
m_delay = m_ea = m_pc + disp * 2 + 2;
m_sh4_icount--;
}
@@ -627,7 +627,7 @@ inline void sh34_base_device::BTS(const UINT16 opcode)
* 0000 0000 0010 1000 1 -
* CLRMAC
*/
-inline void sh34_base_device::CLRMAC(const UINT16 opcode)
+inline void sh34_base_device::CLRMAC(const uint16_t opcode)
{
m_mach = 0;
m_macl = 0;
@@ -637,7 +637,7 @@ inline void sh34_base_device::CLRMAC(const UINT16 opcode)
* 0000 0000 0000 1000 1 -
* CLRT
*/
-inline void sh34_base_device::CLRT(const UINT16 opcode)
+inline void sh34_base_device::CLRT(const uint16_t opcode)
{
m_sr &= ~T;
}
@@ -646,7 +646,7 @@ inline void sh34_base_device::CLRT(const UINT16 opcode)
* 0011 nnnn mmmm 0000 1 comparison result
* CMP_EQ Rm,Rn
*/
-inline void sh34_base_device::CMPEQ(const UINT16 opcode)
+inline void sh34_base_device::CMPEQ(const uint16_t opcode)
{
if (m_r[Rn] == m_r[Rm])
m_sr |= T;
@@ -658,9 +658,9 @@ inline void sh34_base_device::CMPEQ(const UINT16 opcode)
* 0011 nnnn mmmm 0011 1 comparison result
* CMP_GE Rm,Rn
*/
-inline void sh34_base_device::CMPGE(const UINT16 opcode)
+inline void sh34_base_device::CMPGE(const uint16_t opcode)
{
- if ((INT32) m_r[Rn] >= (INT32) m_r[Rm])
+ if ((int32_t) m_r[Rn] >= (int32_t) m_r[Rm])
m_sr |= T;
else
m_sr &= ~T;
@@ -670,9 +670,9 @@ inline void sh34_base_device::CMPGE(const UINT16 opcode)
* 0011 nnnn mmmm 0111 1 comparison result
* CMP_GT Rm,Rn
*/
-inline void sh34_base_device::CMPGT(const UINT16 opcode)
+inline void sh34_base_device::CMPGT(const uint16_t opcode)
{
- if ((INT32) m_r[Rn] > (INT32) m_r[Rm])
+ if ((int32_t) m_r[Rn] > (int32_t) m_r[Rm])
m_sr |= T;
else
m_sr &= ~T;
@@ -682,9 +682,9 @@ inline void sh34_base_device::CMPGT(const UINT16 opcode)
* 0011 nnnn mmmm 0110 1 comparison result
* CMP_HI Rm,Rn
*/
-inline void sh34_base_device::CMPHI(const UINT16 opcode)
+inline void sh34_base_device::CMPHI(const uint16_t opcode)
{
- if ((UINT32) m_r[Rn] > (UINT32) m_r[Rm])
+ if ((uint32_t) m_r[Rn] > (uint32_t) m_r[Rm])
m_sr |= T;
else
m_sr &= ~T;
@@ -694,9 +694,9 @@ inline void sh34_base_device::CMPHI(const UINT16 opcode)
* 0011 nnnn mmmm 0010 1 comparison result
* CMP_HS Rm,Rn
*/
-inline void sh34_base_device::CMPHS(const UINT16 opcode)
+inline void sh34_base_device::CMPHS(const uint16_t opcode)
{
- if ((UINT32) m_r[Rn] >= (UINT32) m_r[Rm])
+ if ((uint32_t) m_r[Rn] >= (uint32_t) m_r[Rm])
m_sr |= T;
else
m_sr &= ~T;
@@ -707,9 +707,9 @@ inline void sh34_base_device::CMPHS(const UINT16 opcode)
* 0100 nnnn 0001 0101 1 comparison result
* CMP_PL Rn
*/
-inline void sh34_base_device::CMPPL(const UINT16 opcode)
+inline void sh34_base_device::CMPPL(const uint16_t opcode)
{
- if ((INT32) m_r[Rn] > 0)
+ if ((int32_t) m_r[Rn] > 0)
m_sr |= T;
else
m_sr &= ~T;
@@ -719,9 +719,9 @@ inline void sh34_base_device::CMPPL(const UINT16 opcode)
* 0100 nnnn 0001 0001 1 comparison result
* CMP_PZ Rn
*/
-inline void sh34_base_device::CMPPZ(const UINT16 opcode)
+inline void sh34_base_device::CMPPZ(const uint16_t opcode)
{
- if ((INT32) m_r[Rn] >= 0)
+ if ((int32_t) m_r[Rn] >= 0)
m_sr |= T;
else
m_sr &= ~T;
@@ -731,10 +731,10 @@ inline void sh34_base_device::CMPPZ(const UINT16 opcode)
* 0010 nnnn mmmm 1100 1 comparison result
* CMP_STR Rm,Rn
*/
-inline void sh34_base_device::CMPSTR(const UINT16 opcode)
+inline void sh34_base_device::CMPSTR(const uint16_t opcode)
{
- UINT32 temp;
- INT32 HH, HL, LH, LL;
+ uint32_t temp;
+ int32_t HH, HL, LH, LL;
temp = m_r[Rn] ^ m_r[Rm];
HH = (temp >> 24) & 0xff;
HL = (temp >> 16) & 0xff;
@@ -751,9 +751,9 @@ inline void sh34_base_device::CMPSTR(const UINT16 opcode)
* 1000 1000 iiii iiii 1 comparison result
* CMP/EQ #imm,R0
*/
-inline void sh34_base_device::CMPIM(const UINT16 opcode)
+inline void sh34_base_device::CMPIM(const uint16_t opcode)
{
- UINT32 imm = (UINT32)(INT32)(INT16)(INT8)(opcode&0xff);
+ uint32_t imm = (uint32_t)(int32_t)(int16_t)(int8_t)(opcode&0xff);
if (m_r[0] == imm)
m_sr |= T;
@@ -765,9 +765,9 @@ inline void sh34_base_device::CMPIM(const UINT16 opcode)
* 0010 nnnn mmmm 0111 1 calculation result
* DIV0S Rm,Rn
*/
-inline void sh34_base_device::DIV0S(const UINT16 opcode)
+inline void sh34_base_device::DIV0S(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if ((m_r[n] & 0x80000000) == 0)
m_sr &= ~Q;
@@ -787,7 +787,7 @@ inline void sh34_base_device::DIV0S(const UINT16 opcode)
* 0000 0000 0001 1001 1 0
* DIV0U
*/
-inline void sh34_base_device::DIV0U(const UINT16 opcode)
+inline void sh34_base_device::DIV0U(const uint16_t opcode)
{
m_sr &= ~(M | Q | T);
}
@@ -796,12 +796,12 @@ inline void sh34_base_device::DIV0U(const UINT16 opcode)
* 0011 nnnn mmmm 0100 1 calculation result
* DIV1 Rm,Rn
*/
-inline void sh34_base_device::DIV1(const UINT16 opcode)
+inline void sh34_base_device::DIV1(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- UINT32 tmp0;
- UINT32 old_q;
+ uint32_t tmp0;
+ uint32_t old_q;
old_q = m_sr & Q;
if (0x80000000 & m_r[n])
@@ -890,26 +890,26 @@ inline void sh34_base_device::DIV1(const UINT16 opcode)
}
/* DMULS.L Rm,Rn */
-inline void sh34_base_device::DMULS(const UINT16 opcode)
+inline void sh34_base_device::DMULS(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
- UINT32 temp0, temp1, temp2, temp3;
- INT32 tempm, tempn, fnLmL;
+ uint32_t RnL, RnH, RmL, RmH, Res0, Res1, Res2;
+ uint32_t temp0, temp1, temp2, temp3;
+ int32_t tempm, tempn, fnLmL;
- tempn = (INT32) m_r[n];
- tempm = (INT32) m_r[m];
+ tempn = (int32_t) m_r[n];
+ tempm = (int32_t) m_r[m];
if (tempn < 0)
tempn = 0 - tempn;
if (tempm < 0)
tempm = 0 - tempm;
- if ((INT32) (m_r[n] ^ m_r[m]) < 0)
+ if ((int32_t) (m_r[n] ^ m_r[m]) < 0)
fnLmL = -1;
else
fnLmL = 0;
- temp1 = (UINT32) tempn;
- temp2 = (UINT32) tempm;
+ temp1 = (uint32_t) tempn;
+ temp2 = (uint32_t) tempm;
RnL = temp1 & 0x0000ffff;
RnH = (temp1 >> 16) & 0x0000ffff;
RmL = temp2 & 0x0000ffff;
@@ -941,12 +941,12 @@ inline void sh34_base_device::DMULS(const UINT16 opcode)
}
/* DMULU.L Rm,Rn */
-inline void sh34_base_device::DMULU(const UINT16 opcode)
+inline void sh34_base_device::DMULU(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
- UINT32 temp0, temp1, temp2, temp3;
+ uint32_t RnL, RnH, RmL, RmH, Res0, Res1, Res2;
+ uint32_t temp0, temp1, temp2, temp3;
RnL = m_r[n] & 0x0000ffff;
RnH = (m_r[n] >> 16) & 0x0000ffff;
@@ -971,9 +971,9 @@ inline void sh34_base_device::DMULU(const UINT16 opcode)
}
/* DT Rn */
-inline void sh34_base_device::DT(const UINT16 opcode)
+inline void sh34_base_device::DT(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n]--;
if (m_r[n] == 0)
@@ -982,7 +982,7 @@ inline void sh34_base_device::DT(const UINT16 opcode)
m_sr &= ~T;
#if BUSY_LOOP_HACKS
{
- UINT32 next_opcode = RW(m_pc & AM);
+ uint32_t next_opcode = RW(m_pc & AM);
/* DT Rn
* BF $-2
*/
@@ -999,37 +999,37 @@ inline void sh34_base_device::DT(const UINT16 opcode)
}
/* EXTS.B Rm,Rn */
-inline void sh34_base_device::EXTSB(const UINT16 opcode)
+inline void sh34_base_device::EXTSB(const uint16_t opcode)
{
- m_r[Rn] = ((INT32)m_r[Rm] << 24) >> 24;
+ m_r[Rn] = ((int32_t)m_r[Rm] << 24) >> 24;
}
/* EXTS.W Rm,Rn */
-inline void sh34_base_device::EXTSW(const UINT16 opcode)
+inline void sh34_base_device::EXTSW(const uint16_t opcode)
{
- m_r[Rn] = ((INT32)m_r[Rm] << 16) >> 16;
+ m_r[Rn] = ((int32_t)m_r[Rm] << 16) >> 16;
}
/* EXTU.B Rm,Rn */
-inline void sh34_base_device::EXTUB(const UINT16 opcode)
+inline void sh34_base_device::EXTUB(const uint16_t opcode)
{
m_r[Rn] = m_r[Rm] & 0x000000ff;
}
/* EXTU.W Rm,Rn */
-inline void sh34_base_device::EXTUW(const UINT16 opcode)
+inline void sh34_base_device::EXTUW(const uint16_t opcode)
{
m_r[Rn] = m_r[Rm] & 0x0000ffff;
}
/* JMP @Rm */
-inline void sh34_base_device::JMP(const UINT16 opcode)
+inline void sh34_base_device::JMP(const uint16_t opcode)
{
m_delay = m_ea = m_r[Rn];
}
/* JSR @Rm */
-inline void sh34_base_device::JSR(const UINT16 opcode)
+inline void sh34_base_device::JSR(const uint16_t opcode)
{
m_pr = m_pc + 2;
m_delay = m_ea = m_r[Rn];
@@ -1038,9 +1038,9 @@ inline void sh34_base_device::JSR(const UINT16 opcode)
/* LDC Rm,SR */
-inline void sh34_base_device::LDCSR(const UINT16 opcode)
+inline void sh34_base_device::LDCSR(const uint16_t opcode)
{
- UINT32 reg;
+ uint32_t reg;
reg = m_r[Rn];
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
@@ -1052,21 +1052,21 @@ inline void sh34_base_device::LDCSR(const UINT16 opcode)
}
/* LDC Rm,GBR */
-inline void sh34_base_device::LDCGBR(const UINT16 opcode)
+inline void sh34_base_device::LDCGBR(const uint16_t opcode)
{
m_gbr = m_r[Rn];
}
/* LDC Rm,VBR */
-inline void sh34_base_device::LDCVBR(const UINT16 opcode)
+inline void sh34_base_device::LDCVBR(const uint16_t opcode)
{
m_vbr = m_r[Rn];
}
/* LDC.L @Rm+,SR */
-inline void sh34_base_device::LDCMSR(const UINT16 opcode)
+inline void sh34_base_device::LDCMSR(const uint16_t opcode)
{
- UINT32 old;
+ uint32_t old;
old = m_sr;
m_ea = m_r[Rn];
@@ -1081,7 +1081,7 @@ inline void sh34_base_device::LDCMSR(const UINT16 opcode)
}
/* LDC.L @Rm+,GBR */
-inline void sh34_base_device::LDCMGBR(const UINT16 opcode)
+inline void sh34_base_device::LDCMGBR(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_gbr = RL(m_ea );
@@ -1090,7 +1090,7 @@ inline void sh34_base_device::LDCMGBR(const UINT16 opcode)
}
/* LDC.L @Rm+,VBR */
-inline void sh34_base_device::LDCMVBR(const UINT16 opcode)
+inline void sh34_base_device::LDCMVBR(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_vbr = RL(m_ea );
@@ -1099,25 +1099,25 @@ inline void sh34_base_device::LDCMVBR(const UINT16 opcode)
}
/* LDS Rm,MACH */
-inline void sh34_base_device::LDSMACH(const UINT16 opcode)
+inline void sh34_base_device::LDSMACH(const uint16_t opcode)
{
m_mach = m_r[Rn];
}
/* LDS Rm,MACL */
-inline void sh34_base_device::LDSMACL(const UINT16 opcode)
+inline void sh34_base_device::LDSMACL(const uint16_t opcode)
{
m_macl = m_r[Rn];
}
/* LDS Rm,PR */
-inline void sh34_base_device::LDSPR(const UINT16 opcode)
+inline void sh34_base_device::LDSPR(const uint16_t opcode)
{
m_pr = m_r[Rn];
}
/* LDS.L @Rm+,MACH */
-inline void sh34_base_device::LDSMMACH(const UINT16 opcode)
+inline void sh34_base_device::LDSMMACH(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_mach = RL(m_ea );
@@ -1125,7 +1125,7 @@ inline void sh34_base_device::LDSMMACH(const UINT16 opcode)
}
/* LDS.L @Rm+,MACL */
-inline void sh34_base_device::LDSMMACL(const UINT16 opcode)
+inline void sh34_base_device::LDSMMACL(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_macl = RL(m_ea );
@@ -1133,7 +1133,7 @@ inline void sh34_base_device::LDSMMACL(const UINT16 opcode)
}
/* LDS.L @Rm+,PR */
-inline void sh34_base_device::LDSMPR(const UINT16 opcode)
+inline void sh34_base_device::LDSMPR(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_pr = RL(m_ea );
@@ -1141,19 +1141,19 @@ inline void sh34_base_device::LDSMPR(const UINT16 opcode)
}
/* MAC.L @Rm+,@Rn+ */
-inline void sh34_base_device::MAC_L(const UINT16 opcode)
+inline void sh34_base_device::MAC_L(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
- UINT32 temp0, temp1, temp2, temp3;
- INT32 tempm, tempn, fnLmL;
+ uint32_t RnL, RnH, RmL, RmH, Res0, Res1, Res2;
+ uint32_t temp0, temp1, temp2, temp3;
+ int32_t tempm, tempn, fnLmL;
- tempn = (INT32) RL(m_r[n] );
+ tempn = (int32_t) RL(m_r[n] );
m_r[n] += 4;
- tempm = (INT32) RL(m_r[m] );
+ tempm = (int32_t) RL(m_r[m] );
m_r[m] += 4;
- if ((INT32) (tempn ^ tempm) < 0)
+ if ((int32_t) (tempn ^ tempm) < 0)
fnLmL = -1;
else
fnLmL = 0;
@@ -1161,8 +1161,8 @@ inline void sh34_base_device::MAC_L(const UINT16 opcode)
tempn = 0 - tempn;
if (tempm < 0)
tempm = 0 - tempm;
- temp1 = (UINT32) tempn;
- temp2 = (UINT32) tempm;
+ temp1 = (uint32_t) tempn;
+ temp2 = (uint32_t) tempm;
RnL = temp1 & 0x0000ffff;
RnH = (temp1 >> 16) & 0x0000ffff;
RmL = temp2 & 0x0000ffff;
@@ -1194,12 +1194,12 @@ inline void sh34_base_device::MAC_L(const UINT16 opcode)
if (m_macl > Res0)
Res2++;
Res2 += (m_mach & 0x0000ffff);
- if (((INT32) Res2 < 0) && (Res2 < 0xffff8000))
+ if (((int32_t) Res2 < 0) && (Res2 < 0xffff8000))
{
Res2 = 0x00008000;
Res0 = 0x00000000;
}
- else if (((INT32) Res2 > 0) && (Res2 > 0x00007fff))
+ else if (((int32_t) Res2 > 0) && (Res2 > 0x00007fff))
{
Res2 = 0x00007fff;
Res0 = 0xffffffff;
@@ -1220,24 +1220,24 @@ inline void sh34_base_device::MAC_L(const UINT16 opcode)
}
/* MAC.W @Rm+,@Rn+ */
-inline void sh34_base_device::MAC_W(const UINT16 opcode)
+inline void sh34_base_device::MAC_W(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- INT32 tempm, tempn, dest, src, ans;
- UINT32 templ;
+ int32_t tempm, tempn, dest, src, ans;
+ uint32_t templ;
- tempn = (INT32) RW(m_r[n] );
+ tempn = (int32_t) RW(m_r[n] );
m_r[n] += 2;
- tempm = (INT32) RW(m_r[m] );
+ tempm = (int32_t) RW(m_r[m] );
m_r[m] += 2;
templ = m_macl;
- tempm = ((INT32) (short) tempn * (INT32) (short) tempm);
- if ((INT32) m_macl >= 0)
+ tempm = ((int32_t) (short) tempn * (int32_t) (short) tempm);
+ if ((int32_t) m_macl >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) tempm >= 0)
+ if ((int32_t) tempm >= 0)
{
src = 0;
tempn = 0;
@@ -1249,7 +1249,7 @@ inline void sh34_base_device::MAC_W(const UINT16 opcode)
}
src += dest;
m_macl += tempm;
- if ((INT32) m_macl >= 0)
+ if ((int32_t) m_macl >= 0)
ans = 0;
else
ans = 1;
@@ -1274,104 +1274,104 @@ inline void sh34_base_device::MAC_W(const UINT16 opcode)
}
/* MOV Rm,Rn */
-inline void sh34_base_device::MOV(const UINT16 opcode)
+inline void sh34_base_device::MOV(const uint16_t opcode)
{
m_r[Rn] = m_r[Rm];
}
/* MOV.B Rm,@Rn */
-inline void sh34_base_device::MOVBS(const UINT16 opcode)
+inline void sh34_base_device::MOVBS(const uint16_t opcode)
{
m_ea = m_r[Rn];
WB(m_ea, m_r[Rm] & 0x000000ff);
}
/* MOV.W Rm,@Rn */
-inline void sh34_base_device::MOVWS(const UINT16 opcode)
+inline void sh34_base_device::MOVWS(const uint16_t opcode)
{
m_ea = m_r[Rn];
WW(m_ea, m_r[Rm] & 0x0000ffff);
}
/* MOV.L Rm,@Rn */
-inline void sh34_base_device::MOVLS(const UINT16 opcode)
+inline void sh34_base_device::MOVLS(const uint16_t opcode)
{
m_ea = m_r[Rn];
WL(m_ea, m_r[Rm] );
}
/* MOV.B @Rm,Rn */
-inline void sh34_base_device::MOVBL(const UINT16 opcode)
+inline void sh34_base_device::MOVBL(const uint16_t opcode)
{
m_ea = m_r[Rm];
- m_r[Rn] = (UINT32)(INT32)(INT16)(INT8) RB( m_ea );
+ m_r[Rn] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_ea );
}
/* MOV.W @Rm,Rn */
-inline void sh34_base_device::MOVWL(const UINT16 opcode)
+inline void sh34_base_device::MOVWL(const uint16_t opcode)
{
m_ea = m_r[Rm];
- m_r[Rn] = (UINT32)(INT32)(INT16) RW(m_ea );
+ m_r[Rn] = (uint32_t)(int32_t)(int16_t) RW(m_ea );
}
/* MOV.L @Rm,Rn */
-inline void sh34_base_device::MOVLL(const UINT16 opcode)
+inline void sh34_base_device::MOVLL(const uint16_t opcode)
{
m_ea = m_r[Rm];
m_r[Rn] = RL(m_ea );
}
/* MOV.B Rm,@-Rn */
-inline void sh34_base_device::MOVBM(const UINT16 opcode)
+inline void sh34_base_device::MOVBM(const uint16_t opcode)
{
- UINT32 data = m_r[Rm] & 0x000000ff;
+ uint32_t data = m_r[Rm] & 0x000000ff;
m_r[Rn] -= 1;
WB(m_r[Rn], data );
}
/* MOV.W Rm,@-Rn */
-inline void sh34_base_device::MOVWM(const UINT16 opcode)
+inline void sh34_base_device::MOVWM(const uint16_t opcode)
{
- UINT32 data = m_r[Rm] & 0x0000ffff;
+ uint32_t data = m_r[Rm] & 0x0000ffff;
m_r[Rn] -= 2;
WW(m_r[Rn], data );
}
/* MOV.L Rm,@-Rn */
-inline void sh34_base_device::MOVLM(const UINT16 opcode)
+inline void sh34_base_device::MOVLM(const uint16_t opcode)
{
- UINT32 data = m_r[Rm];
+ uint32_t data = m_r[Rm];
m_r[Rn] -= 4;
WL(m_r[Rn], data );
}
/* MOV.B @Rm+,Rn */
-inline void sh34_base_device::MOVBP(const UINT16 opcode)
+inline void sh34_base_device::MOVBP(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- m_r[n] = (UINT32)(INT32)(INT16)(INT8) RB( m_r[m] );
+ m_r[n] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_r[m] );
if (n != m)
m_r[m] += 1;
}
/* MOV.W @Rm+,Rn */
-inline void sh34_base_device::MOVWP(const UINT16 opcode)
+inline void sh34_base_device::MOVWP(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- m_r[n] = (UINT32)(INT32)(INT16) RW(m_r[m] );
+ m_r[n] = (uint32_t)(int32_t)(int16_t) RW(m_r[m] );
if (n != m)
m_r[m] += 2;
}
/* MOV.L @Rm+,Rn */
-inline void sh34_base_device::MOVLP(const UINT16 opcode)
+inline void sh34_base_device::MOVLP(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
m_r[n] = RL(m_r[m] );
if (n != m)
@@ -1379,208 +1379,208 @@ inline void sh34_base_device::MOVLP(const UINT16 opcode)
}
/* MOV.B Rm,@(R0,Rn) */
-inline void sh34_base_device::MOVBS0(const UINT16 opcode)
+inline void sh34_base_device::MOVBS0(const uint16_t opcode)
{
m_ea = m_r[Rn] + m_r[0];
WB(m_ea, m_r[Rm] & 0x000000ff );
}
/* MOV.W Rm,@(R0,Rn) */
-inline void sh34_base_device::MOVWS0(const UINT16 opcode)
+inline void sh34_base_device::MOVWS0(const uint16_t opcode)
{
m_ea = m_r[Rn] + m_r[0];
WW(m_ea, m_r[Rm] & 0x0000ffff );
}
/* MOV.L Rm,@(R0,Rn) */
-inline void sh34_base_device::MOVLS0(const UINT16 opcode)
+inline void sh34_base_device::MOVLS0(const uint16_t opcode)
{
m_ea = m_r[Rn] + m_r[0];
WL(m_ea, m_r[Rm] );
}
/* MOV.B @(R0,Rm),Rn */
-inline void sh34_base_device::MOVBL0(const UINT16 opcode)
+inline void sh34_base_device::MOVBL0(const uint16_t opcode)
{
m_ea = m_r[Rm] + m_r[0];
- m_r[Rn] = (UINT32)(INT32)(INT16)(INT8) RB( m_ea );
+ m_r[Rn] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_ea );
}
/* MOV.W @(R0,Rm),Rn */
-inline void sh34_base_device::MOVWL0(const UINT16 opcode)
+inline void sh34_base_device::MOVWL0(const uint16_t opcode)
{
m_ea = m_r[Rm] + m_r[0];
- m_r[Rn] = (UINT32)(INT32)(INT16) RW(m_ea );
+ m_r[Rn] = (uint32_t)(int32_t)(int16_t) RW(m_ea );
}
/* MOV.L @(R0,Rm),Rn */
-inline void sh34_base_device::MOVLL0(const UINT16 opcode)
+inline void sh34_base_device::MOVLL0(const uint16_t opcode)
{
m_ea = m_r[Rm] + m_r[0];
m_r[Rn] = RL(m_ea );
}
/* MOV #imm,Rn */
-inline void sh34_base_device::MOVI(const UINT16 opcode)
+inline void sh34_base_device::MOVI(const uint16_t opcode)
{
- m_r[Rn] = (UINT32)(INT32)(INT16)(INT8)(opcode&0xff);
+ m_r[Rn] = (uint32_t)(int32_t)(int16_t)(int8_t)(opcode&0xff);
}
/* MOV.W @(disp8,PC),Rn */
-inline void sh34_base_device::MOVWI(const UINT16 opcode)
+inline void sh34_base_device::MOVWI(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = m_pc + disp * 2 + 2;
- m_r[Rn] = (UINT32)(INT32)(INT16) RW(m_ea );
+ m_r[Rn] = (uint32_t)(int32_t)(int16_t) RW(m_ea );
}
/* MOV.L @(disp8,PC),Rn */
-inline void sh34_base_device::MOVLI(const UINT16 opcode)
+inline void sh34_base_device::MOVLI(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = ((m_pc + 2) & ~3) + disp * 4;
m_r[Rn] = RL(m_ea );
}
/* MOV.B @(disp8,GBR),R0 */
-inline void sh34_base_device::MOVBLG(const UINT16 opcode)
+inline void sh34_base_device::MOVBLG(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = m_gbr + disp;
- m_r[0] = (UINT32)(INT32)(INT16)(INT8) RB( m_ea );
+ m_r[0] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_ea );
}
/* MOV.W @(disp8,GBR),R0 */
-inline void sh34_base_device::MOVWLG(const UINT16 opcode)
+inline void sh34_base_device::MOVWLG(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = m_gbr + disp * 2;
- m_r[0] = (INT32)(INT16) RW(m_ea );
+ m_r[0] = (int32_t)(int16_t) RW(m_ea );
}
/* MOV.L @(disp8,GBR),R0 */
-inline void sh34_base_device::MOVLLG(const UINT16 opcode)
+inline void sh34_base_device::MOVLLG(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = m_gbr + disp * 4;
m_r[0] = RL(m_ea );
}
/* MOV.B R0,@(disp8,GBR) */
-inline void sh34_base_device::MOVBSG(const UINT16 opcode)
+inline void sh34_base_device::MOVBSG(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = m_gbr + disp;
WB(m_ea, m_r[0] & 0x000000ff );
}
/* MOV.W R0,@(disp8,GBR) */
-inline void sh34_base_device::MOVWSG(const UINT16 opcode)
+inline void sh34_base_device::MOVWSG(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = m_gbr + disp * 2;
WW(m_ea, m_r[0] & 0x0000ffff );
}
/* MOV.L R0,@(disp8,GBR) */
-inline void sh34_base_device::MOVLSG(const UINT16 opcode)
+inline void sh34_base_device::MOVLSG(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = m_gbr + disp * 4;
WL(m_ea, m_r[0] );
}
/* MOV.B R0,@(disp4,Rm) */
-inline void sh34_base_device::MOVBS4(const UINT16 opcode)
+inline void sh34_base_device::MOVBS4(const uint16_t opcode)
{
- UINT32 disp = opcode & 0x0f;
+ uint32_t disp = opcode & 0x0f;
m_ea = m_r[Rm] + disp;
WB(m_ea, m_r[0] & 0x000000ff );
}
/* MOV.W R0,@(disp4,Rm) */
-inline void sh34_base_device::MOVWS4(const UINT16 opcode)
+inline void sh34_base_device::MOVWS4(const uint16_t opcode)
{
- UINT32 disp = opcode & 0x0f;
+ uint32_t disp = opcode & 0x0f;
m_ea = m_r[Rm] + disp * 2;
WW(m_ea, m_r[0] & 0x0000ffff );
}
/* MOV.L Rm,@(disp4,Rn) */
-inline void sh34_base_device::MOVLS4(const UINT16 opcode)
+inline void sh34_base_device::MOVLS4(const uint16_t opcode)
{
- UINT32 disp = opcode & 0x0f;
+ uint32_t disp = opcode & 0x0f;
m_ea = m_r[Rn] + disp * 4;
WL(m_ea, m_r[Rm] );
}
/* MOV.B @(disp4,Rm),R0 */
-inline void sh34_base_device::MOVBL4(const UINT16 opcode)
+inline void sh34_base_device::MOVBL4(const uint16_t opcode)
{
- UINT32 disp = opcode & 0x0f;
+ uint32_t disp = opcode & 0x0f;
m_ea = m_r[Rm] + disp;
- m_r[0] = (UINT32)(INT32)(INT16)(INT8) RB( m_ea );
+ m_r[0] = (uint32_t)(int32_t)(int16_t)(int8_t) RB( m_ea );
}
/* MOV.W @(disp4,Rm),R0 */
-inline void sh34_base_device::MOVWL4(const UINT16 opcode)
+inline void sh34_base_device::MOVWL4(const uint16_t opcode)
{
- UINT32 disp = opcode & 0x0f;
+ uint32_t disp = opcode & 0x0f;
m_ea = m_r[Rm] + disp * 2;
- m_r[0] = (UINT32)(INT32)(INT16) RW(m_ea );
+ m_r[0] = (uint32_t)(int32_t)(int16_t) RW(m_ea );
}
/* MOV.L @(disp4,Rm),Rn */
-inline void sh34_base_device::MOVLL4(const UINT16 opcode)
+inline void sh34_base_device::MOVLL4(const uint16_t opcode)
{
- UINT32 disp = opcode & 0x0f;
+ uint32_t disp = opcode & 0x0f;
m_ea = m_r[Rm] + disp * 4;
m_r[Rn] = RL(m_ea );
}
/* MOVA @(disp8,PC),R0 */
-inline void sh34_base_device::MOVA(const UINT16 opcode)
+inline void sh34_base_device::MOVA(const uint16_t opcode)
{
- UINT32 disp = opcode & 0xff;
+ uint32_t disp = opcode & 0xff;
m_ea = ((m_pc + 2) & ~3) + disp * 4;
m_r[0] = m_ea;
}
/* MOVT Rn */
-void sh34_base_device::MOVT(const UINT16 opcode)
+void sh34_base_device::MOVT(const uint16_t opcode)
{
m_r[Rn] = m_sr & T;
}
/* MUL.L Rm,Rn */
-inline void sh34_base_device::MULL(const UINT16 opcode)
+inline void sh34_base_device::MULL(const uint16_t opcode)
{
m_macl = m_r[Rn] * m_r[Rm];
m_sh4_icount--;
}
/* MULS Rm,Rn */
-inline void sh34_base_device::MULS(const UINT16 opcode)
+inline void sh34_base_device::MULS(const uint16_t opcode)
{
- m_macl = (INT16) m_r[Rn] * (INT16) m_r[Rm];
+ m_macl = (int16_t) m_r[Rn] * (int16_t) m_r[Rm];
}
/* MULU Rm,Rn */
-inline void sh34_base_device::MULU(const UINT16 opcode)
+inline void sh34_base_device::MULU(const uint16_t opcode)
{
- m_macl = (UINT16) m_r[Rn] * (UINT16) m_r[Rm];
+ m_macl = (uint16_t) m_r[Rn] * (uint16_t) m_r[Rm];
}
/* NEG Rm,Rn */
-inline void sh34_base_device::NEG(const UINT16 opcode)
+inline void sh34_base_device::NEG(const uint16_t opcode)
{
m_r[Rn] = 0 - m_r[Rm];
}
/* NEGC Rm,Rn */
-inline void sh34_base_device::NEGC(const UINT16 opcode)
+inline void sh34_base_device::NEGC(const uint16_t opcode)
{
- UINT32 temp;
+ uint32_t temp;
temp = m_r[Rm];
m_r[Rn] = -temp - (m_sr & T);
@@ -1591,33 +1591,33 @@ inline void sh34_base_device::NEGC(const UINT16 opcode)
}
/* NOP */
-inline void sh34_base_device::NOP(const UINT16 opcode)
+inline void sh34_base_device::NOP(const uint16_t opcode)
{
}
/* NOT Rm,Rn */
-inline void sh34_base_device::NOT(const UINT16 opcode)
+inline void sh34_base_device::NOT(const uint16_t opcode)
{
m_r[Rn] = ~m_r[Rm];
}
/* OR Rm,Rn */
-inline void sh34_base_device::OR(const UINT16 opcode)
+inline void sh34_base_device::OR(const uint16_t opcode)
{
m_r[Rn] |= m_r[Rm];
}
/* OR #imm,R0 */
-inline void sh34_base_device::ORI(const UINT16 opcode)
+inline void sh34_base_device::ORI(const uint16_t opcode)
{
m_r[0] |= (opcode&0xff);
m_sh4_icount -= 2;
}
/* OR.B #imm,@(R0,GBR) */
-inline void sh34_base_device::ORM(const UINT16 opcode)
+inline void sh34_base_device::ORM(const uint16_t opcode)
{
- UINT32 temp;
+ uint32_t temp;
m_ea = m_gbr + m_r[0];
temp = RB( m_ea );
@@ -1626,11 +1626,11 @@ inline void sh34_base_device::ORM(const UINT16 opcode)
}
/* ROTCL Rn */
-inline void sh34_base_device::ROTCL(const UINT16 opcode)
+inline void sh34_base_device::ROTCL(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
- UINT32 temp;
+ uint32_t temp;
temp = (m_r[n] >> 31) & T;
m_r[n] = (m_r[n] << 1) | (m_sr & T);
@@ -1638,11 +1638,11 @@ inline void sh34_base_device::ROTCL(const UINT16 opcode)
}
/* ROTCR Rn */
-inline void sh34_base_device::ROTCR(const UINT16 opcode)
+inline void sh34_base_device::ROTCR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
- UINT32 temp;
+ uint32_t temp;
temp = (m_sr & T) << 31;
if (m_r[n] & T)
m_sr |= T;
@@ -1652,25 +1652,25 @@ inline void sh34_base_device::ROTCR(const UINT16 opcode)
}
/* ROTL Rn */
-inline void sh34_base_device::ROTL(const UINT16 opcode)
+inline void sh34_base_device::ROTL(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_sr = (m_sr & ~T) | ((m_r[n] >> 31) & T);
m_r[n] = (m_r[n] << 1) | (m_r[n] >> 31);
}
/* ROTR Rn */
-inline void sh34_base_device::ROTR(const UINT16 opcode)
+inline void sh34_base_device::ROTR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_sr = (m_sr & ~T) | (m_r[n] & T);
m_r[n] = (m_r[n] >> 1) | (m_r[n] << 31);
}
/* RTE */
-inline void sh34_base_device::RTE(const UINT16 opcode)
+inline void sh34_base_device::RTE(const uint16_t opcode)
{
m_delay = m_ea = m_spc;
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
@@ -1683,92 +1683,92 @@ inline void sh34_base_device::RTE(const UINT16 opcode)
}
/* RTS */
-inline void sh34_base_device::RTS(const UINT16 opcode)
+inline void sh34_base_device::RTS(const uint16_t opcode)
{
m_delay = m_ea = m_pr;
m_sh4_icount--;
}
/* SETT */
-inline void sh34_base_device::SETT(const UINT16 opcode)
+inline void sh34_base_device::SETT(const uint16_t opcode)
{
m_sr |= T;
}
/* SHAL Rn (same as SHLL) */
-inline void sh34_base_device::SHAL(const UINT16 opcode)
+inline void sh34_base_device::SHAL(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_sr = (m_sr & ~T) | ((m_r[n] >> 31) & T);
m_r[n] <<= 1;
}
/* SHAR Rn */
-inline void sh34_base_device::SHAR(const UINT16 opcode)
+inline void sh34_base_device::SHAR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_sr = (m_sr & ~T) | (m_r[n] & T);
- m_r[n] = (UINT32)((INT32)m_r[n] >> 1);
+ m_r[n] = (uint32_t)((int32_t)m_r[n] >> 1);
}
/* SHLL Rn (same as SHAL) */
-inline void sh34_base_device::SHLL(const UINT16 opcode)
+inline void sh34_base_device::SHLL(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_sr = (m_sr & ~T) | ((m_r[n] >> 31) & T);
m_r[n] <<= 1;
}
/* SHLL2 Rn */
-inline void sh34_base_device::SHLL2(const UINT16 opcode)
+inline void sh34_base_device::SHLL2(const uint16_t opcode)
{
m_r[Rn] <<= 2;
}
/* SHLL8 Rn */
-inline void sh34_base_device::SHLL8(const UINT16 opcode)
+inline void sh34_base_device::SHLL8(const uint16_t opcode)
{
m_r[Rn] <<= 8;
}
/* SHLL16 Rn */
-inline void sh34_base_device::SHLL16(const UINT16 opcode)
+inline void sh34_base_device::SHLL16(const uint16_t opcode)
{
m_r[Rn] <<= 16;
}
/* SHLR Rn */
-inline void sh34_base_device::SHLR(const UINT16 opcode)
+inline void sh34_base_device::SHLR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_sr = (m_sr & ~T) | (m_r[n] & T);
m_r[n] >>= 1;
}
/* SHLR2 Rn */
-inline void sh34_base_device::SHLR2(const UINT16 opcode)
+inline void sh34_base_device::SHLR2(const uint16_t opcode)
{
m_r[Rn] >>= 2;
}
/* SHLR8 Rn */
-inline void sh34_base_device::SHLR8(const UINT16 opcode)
+inline void sh34_base_device::SHLR8(const uint16_t opcode)
{
m_r[Rn] >>= 8;
}
/* SHLR16 Rn */
-inline void sh34_base_device::SHLR16(const UINT16 opcode)
+inline void sh34_base_device::SHLR16(const uint16_t opcode)
{
m_r[Rn] >>= 16;
}
/* SLEEP */
-inline void sh34_base_device::SLEEP(const UINT16 opcode)
+inline void sh34_base_device::SLEEP(const uint16_t opcode)
{
/* 0 = normal mode */
/* 1 = enters into power-down mode */
@@ -1784,27 +1784,27 @@ inline void sh34_base_device::SLEEP(const UINT16 opcode)
}
/* STC SR,Rn */
-inline void sh34_base_device::STCSR(const UINT16 opcode)
+inline void sh34_base_device::STCSR(const uint16_t opcode)
{
m_r[Rn] = m_sr;
}
/* STC GBR,Rn */
-inline void sh34_base_device::STCGBR(const UINT16 opcode)
+inline void sh34_base_device::STCGBR(const uint16_t opcode)
{
m_r[Rn] = m_gbr;
}
/* STC VBR,Rn */
-inline void sh34_base_device::STCVBR(const UINT16 opcode)
+inline void sh34_base_device::STCVBR(const uint16_t opcode)
{
m_r[Rn] = m_vbr;
}
/* STC.L SR,@-Rn */
-inline void sh34_base_device::STCMSR(const UINT16 opcode)
+inline void sh34_base_device::STCMSR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -1813,9 +1813,9 @@ inline void sh34_base_device::STCMSR(const UINT16 opcode)
}
/* STC.L GBR,@-Rn */
-inline void sh34_base_device::STCMGBR(const UINT16 opcode)
+inline void sh34_base_device::STCMGBR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -1824,9 +1824,9 @@ inline void sh34_base_device::STCMGBR(const UINT16 opcode)
}
/* STC.L VBR,@-Rn */
-inline void sh34_base_device::STCMVBR(const UINT16 opcode)
+inline void sh34_base_device::STCMVBR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -1835,27 +1835,27 @@ inline void sh34_base_device::STCMVBR(const UINT16 opcode)
}
/* STS MACH,Rn */
-inline void sh34_base_device::STSMACH(const UINT16 opcode)
+inline void sh34_base_device::STSMACH(const uint16_t opcode)
{
m_r[Rn] = m_mach;
}
/* STS MACL,Rn */
-inline void sh34_base_device::STSMACL(const UINT16 opcode)
+inline void sh34_base_device::STSMACL(const uint16_t opcode)
{
m_r[Rn] = m_macl;
}
/* STS PR,Rn */
-inline void sh34_base_device::STSPR(const UINT16 opcode)
+inline void sh34_base_device::STSPR(const uint16_t opcode)
{
m_r[Rn] = m_pr;
}
/* STS.L MACH,@-Rn */
-inline void sh34_base_device::STSMMACH(const UINT16 opcode)
+inline void sh34_base_device::STSMMACH(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -1863,9 +1863,9 @@ inline void sh34_base_device::STSMMACH(const UINT16 opcode)
}
/* STS.L MACL,@-Rn */
-inline void sh34_base_device::STSMMACL(const UINT16 opcode)
+inline void sh34_base_device::STSMMACL(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -1873,9 +1873,9 @@ inline void sh34_base_device::STSMMACL(const UINT16 opcode)
}
/* STS.L PR,@-Rn */
-inline void sh34_base_device::STSMPR(const UINT16 opcode)
+inline void sh34_base_device::STSMPR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -1883,17 +1883,17 @@ inline void sh34_base_device::STSMPR(const UINT16 opcode)
}
/* SUB Rm,Rn */
-inline void sh34_base_device::SUB(const UINT16 opcode)
+inline void sh34_base_device::SUB(const uint16_t opcode)
{
m_r[Rn] -= m_r[Rm];
}
/* SUBC Rm,Rn */
-inline void sh34_base_device::SUBC(const UINT16 opcode)
+inline void sh34_base_device::SUBC(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- UINT32 tmp0, tmp1;
+ uint32_t tmp0, tmp1;
tmp1 = m_r[n] - m_r[m];
tmp0 = m_r[n];
@@ -1907,23 +1907,23 @@ inline void sh34_base_device::SUBC(const UINT16 opcode)
}
/* SUBV Rm,Rn */
-inline void sh34_base_device::SUBV(const UINT16 opcode)
+inline void sh34_base_device::SUBV(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- INT32 dest, src, ans;
+ int32_t dest, src, ans;
- if ((INT32) m_r[n] >= 0)
+ if ((int32_t) m_r[n] >= 0)
dest = 0;
else
dest = 1;
- if ((INT32) m_r[m] >= 0)
+ if ((int32_t) m_r[m] >= 0)
src = 0;
else
src = 1;
src += dest;
m_r[n] -= m_r[m];
- if ((INT32) m_r[n] >= 0)
+ if ((int32_t) m_r[n] >= 0)
ans = 0;
else
ans = 1;
@@ -1940,11 +1940,11 @@ inline void sh34_base_device::SUBV(const UINT16 opcode)
}
/* SWAP.B Rm,Rn */
-inline void sh34_base_device::SWAPB(const UINT16 opcode)
+inline void sh34_base_device::SWAPB(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- UINT32 temp0, temp1;
+ uint32_t temp0, temp1;
temp0 = m_r[m] & 0xffff0000;
temp1 = (m_r[m] & 0x000000ff) << 8;
@@ -1953,22 +1953,22 @@ inline void sh34_base_device::SWAPB(const UINT16 opcode)
}
/* SWAP.W Rm,Rn */
-inline void sh34_base_device::SWAPW(const UINT16 opcode)
+inline void sh34_base_device::SWAPW(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- UINT32 temp;
+ uint32_t temp;
temp = (m_r[m] >> 16) & 0x0000ffff;
m_r[n] = (m_r[m] << 16) | temp;
}
/* TAS.B @Rn */
-inline void sh34_base_device::TAS(const UINT16 opcode)
+inline void sh34_base_device::TAS(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
- UINT32 temp;
+ uint32_t temp;
m_ea = m_r[n];
/* Bus Lock enable */
temp = RB( m_ea );
@@ -1983,9 +1983,9 @@ inline void sh34_base_device::TAS(const UINT16 opcode)
}
/* TRAPA #imm */
-inline void sh34_base_device::TRAPA(const UINT16 opcode)
+inline void sh34_base_device::TRAPA(const uint16_t opcode)
{
- UINT32 imm = opcode & 0xff;
+ uint32_t imm = opcode & 0xff;
if (m_cpu_type == CPU_TYPE_SH4)
{
@@ -2025,7 +2025,7 @@ inline void sh34_base_device::TRAPA(const UINT16 opcode)
}
/* TST Rm,Rn */
-inline void sh34_base_device::TST(const UINT16 opcode)
+inline void sh34_base_device::TST(const uint16_t opcode)
{
if ((m_r[Rn] & m_r[Rm]) == 0)
m_sr |= T;
@@ -2034,9 +2034,9 @@ inline void sh34_base_device::TST(const UINT16 opcode)
}
/* TST #imm,R0 */
-inline void sh34_base_device::TSTI(const UINT16 opcode)
+inline void sh34_base_device::TSTI(const uint16_t opcode)
{
- UINT32 imm = opcode & 0xff;
+ uint32_t imm = opcode & 0xff;
if ((imm & m_r[0]) == 0)
m_sr |= T;
@@ -2045,9 +2045,9 @@ inline void sh34_base_device::TSTI(const UINT16 opcode)
}
/* TST.B #imm,@(R0,GBR) */
-inline void sh34_base_device::TSTM(const UINT16 opcode)
+inline void sh34_base_device::TSTM(const uint16_t opcode)
{
- UINT32 imm = opcode & 0xff;
+ uint32_t imm = opcode & 0xff;
m_ea = m_gbr + m_r[0];
if ((imm & RB( m_ea )) == 0)
@@ -2058,23 +2058,23 @@ inline void sh34_base_device::TSTM(const UINT16 opcode)
}
/* XOR Rm,Rn */
-inline void sh34_base_device::XOR(const UINT16 opcode)
+inline void sh34_base_device::XOR(const uint16_t opcode)
{
m_r[Rn] ^= m_r[Rm];
}
/* XOR #imm,R0 */
-inline void sh34_base_device::XORI(const UINT16 opcode)
+inline void sh34_base_device::XORI(const uint16_t opcode)
{
- UINT32 imm = opcode & 0xff;
+ uint32_t imm = opcode & 0xff;
m_r[0] ^= imm;
}
/* XOR.B #imm,@(R0,GBR) */
-inline void sh34_base_device::XORM(const UINT16 opcode)
+inline void sh34_base_device::XORM(const uint16_t opcode)
{
- UINT32 imm = opcode & 0xff;
- UINT32 temp;
+ uint32_t imm = opcode & 0xff;
+ uint32_t temp;
m_ea = m_gbr + m_r[0];
temp = RB( m_ea );
@@ -2084,11 +2084,11 @@ inline void sh34_base_device::XORM(const UINT16 opcode)
}
/* XTRCT Rm,Rn */
-inline void sh34_base_device::XTRCT(const UINT16 opcode)
+inline void sh34_base_device::XTRCT(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
- UINT32 temp;
+ uint32_t temp;
temp = (m_r[m] << 16) & 0xffff0000;
m_r[n] = (m_r[n] >> 16) & 0x0000ffff;
@@ -2096,53 +2096,53 @@ inline void sh34_base_device::XTRCT(const UINT16 opcode)
}
/* STC SSR,Rn */
-inline void sh34_base_device::STCSSR(const UINT16 opcode)
+inline void sh34_base_device::STCSSR(const uint16_t opcode)
{
m_r[Rn] = m_ssr;
}
/* STC SPC,Rn */
-inline void sh34_base_device::STCSPC(const UINT16 opcode)
+inline void sh34_base_device::STCSPC(const uint16_t opcode)
{
m_r[Rn] = m_spc;
}
/* STC SGR,Rn */
-inline void sh34_base_device::STCSGR(const UINT16 opcode)
+inline void sh34_base_device::STCSGR(const uint16_t opcode)
{
m_r[Rn] = m_sgr;
}
/* STS FPUL,Rn */
-inline void sh34_base_device::STSFPUL(const UINT16 opcode)
+inline void sh34_base_device::STSFPUL(const uint16_t opcode)
{
m_r[Rn] = m_fpul;
}
/* STS FPSCR,Rn */
-inline void sh34_base_device::STSFPSCR(const UINT16 opcode)
+inline void sh34_base_device::STSFPSCR(const uint16_t opcode)
{
m_r[Rn] = m_fpscr & 0x003FFFFF;
}
/* STC DBR,Rn */
-inline void sh34_base_device::STCDBR(const UINT16 opcode)
+inline void sh34_base_device::STCDBR(const uint16_t opcode)
{
m_r[Rn] = m_dbr;
}
/* STCRBANK Rm_BANK,Rn */
-inline void sh34_base_device::STCRBANK(const UINT16 opcode)
+inline void sh34_base_device::STCRBANK(const uint16_t opcode)
{
- UINT32 m = Rm;
+ uint32_t m = Rm;
m_r[Rn] = m_rbnk[m_sr&sRB ? 0 : 1][m & 7];
}
/* STCMRBANK Rm_BANK,@-Rn */
-inline void sh34_base_device::STCMRBANK(const UINT16 opcode)
+inline void sh34_base_device::STCMRBANK(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -2151,26 +2151,26 @@ inline void sh34_base_device::STCMRBANK(const UINT16 opcode)
}
/* MOVCA.L R0,@Rn */
-inline void sh34_base_device::MOVCAL(const UINT16 opcode)
+inline void sh34_base_device::MOVCAL(const uint16_t opcode)
{
m_ea = m_r[Rn];
WL(m_ea, m_r[0] );
}
-inline void sh34_base_device::CLRS(const UINT16 opcode)
+inline void sh34_base_device::CLRS(const uint16_t opcode)
{
m_sr &= ~S;
}
-inline void sh34_base_device::SETS(const UINT16 opcode)
+inline void sh34_base_device::SETS(const uint16_t opcode)
{
m_sr |= S;
}
/* STS.L SGR,@-Rn */
-inline void sh34_base_device::STCMSGR(const UINT16 opcode)
+inline void sh34_base_device::STCMSGR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -2178,9 +2178,9 @@ inline void sh34_base_device::STCMSGR(const UINT16 opcode)
}
/* STS.L FPUL,@-Rn */
-inline void sh34_base_device::STSMFPUL(const UINT16 opcode)
+inline void sh34_base_device::STSMFPUL(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -2188,9 +2188,9 @@ inline void sh34_base_device::STSMFPUL(const UINT16 opcode)
}
/* STS.L FPSCR,@-Rn */
-inline void sh34_base_device::STSMFPSCR(const UINT16 opcode)
+inline void sh34_base_device::STSMFPSCR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -2198,9 +2198,9 @@ inline void sh34_base_device::STSMFPSCR(const UINT16 opcode)
}
/* STC.L DBR,@-Rn */
-inline void sh34_base_device::STCMDBR(const UINT16 opcode)
+inline void sh34_base_device::STCMDBR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -2208,9 +2208,9 @@ inline void sh34_base_device::STCMDBR(const UINT16 opcode)
}
/* STC.L SSR,@-Rn */
-inline void sh34_base_device::STCMSSR(const UINT16 opcode)
+inline void sh34_base_device::STCMSSR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -2218,9 +2218,9 @@ inline void sh34_base_device::STCMSSR(const UINT16 opcode)
}
/* STC.L SPC,@-Rn */
-inline void sh34_base_device::STCMSPC(const UINT16 opcode)
+inline void sh34_base_device::STCMSPC(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
m_r[n] -= 4;
m_ea = m_r[n];
@@ -2228,7 +2228,7 @@ inline void sh34_base_device::STCMSPC(const UINT16 opcode)
}
/* LDS.L @Rm+,FPUL */
-inline void sh34_base_device::LDSMFPUL(const UINT16 opcode)
+inline void sh34_base_device::LDSMFPUL(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_fpul = RL(m_ea );
@@ -2236,9 +2236,9 @@ inline void sh34_base_device::LDSMFPUL(const UINT16 opcode)
}
/* LDS.L @Rm+,FPSCR */
-inline void sh34_base_device::LDSMFPSCR(const UINT16 opcode)
+inline void sh34_base_device::LDSMFPSCR(const uint16_t opcode)
{
- UINT32 s;
+ uint32_t s;
s = m_fpscr;
m_ea = m_r[Rn];
@@ -2256,7 +2256,7 @@ inline void sh34_base_device::LDSMFPSCR(const UINT16 opcode)
}
/* LDC.L @Rm+,DBR */
-inline void sh34_base_device::LDCMDBR(const UINT16 opcode)
+inline void sh34_base_device::LDCMDBR(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_dbr = RL(m_ea );
@@ -2264,9 +2264,9 @@ inline void sh34_base_device::LDCMDBR(const UINT16 opcode)
}
/* LDC.L @Rn+,Rm_BANK */
-inline void sh34_base_device::LDCMRBANK(const UINT16 opcode)
+inline void sh34_base_device::LDCMRBANK(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
m_ea = m_r[n];
m_rbnk[m_sr&sRB ? 0 : 1][m & 7] = RL(m_ea );
@@ -2274,7 +2274,7 @@ inline void sh34_base_device::LDCMRBANK(const UINT16 opcode)
}
/* LDC.L @Rm+,SSR */
-inline void sh34_base_device::LDCMSSR(const UINT16 opcode)
+inline void sh34_base_device::LDCMSSR(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_ssr = RL(m_ea );
@@ -2282,7 +2282,7 @@ inline void sh34_base_device::LDCMSSR(const UINT16 opcode)
}
/* LDC.L @Rm+,SPC */
-inline void sh34_base_device::LDCMSPC(const UINT16 opcode)
+inline void sh34_base_device::LDCMSPC(const uint16_t opcode)
{
m_ea = m_r[Rn];
m_spc = RL(m_ea );
@@ -2290,15 +2290,15 @@ inline void sh34_base_device::LDCMSPC(const UINT16 opcode)
}
/* LDS Rm,FPUL */
-inline void sh34_base_device::LDSFPUL(const UINT16 opcode)
+inline void sh34_base_device::LDSFPUL(const uint16_t opcode)
{
m_fpul = m_r[Rn];
}
/* LDS Rm,FPSCR */
-inline void sh34_base_device::LDSFPSCR(const UINT16 opcode)
+inline void sh34_base_device::LDSFPSCR(const uint16_t opcode)
{
- UINT32 s;
+ uint32_t s;
s = m_fpscr;
m_fpscr = m_r[Rn] & 0x003FFFFF;
@@ -2313,15 +2313,15 @@ inline void sh34_base_device::LDSFPSCR(const UINT16 opcode)
}
/* LDC Rm,DBR */
-inline void sh34_base_device::LDCDBR(const UINT16 opcode)
+inline void sh34_base_device::LDCDBR(const uint16_t opcode)
{
m_dbr = m_r[Rn];
}
/* SHAD Rm,Rn */
-inline void sh34_base_device::SHAD(const UINT16 opcode)
+inline void sh34_base_device::SHAD(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if ((m_r[m] & 0x80000000) == 0)
m_r[n] = m_r[n] << (m_r[m] & 0x1F);
@@ -2331,13 +2331,13 @@ inline void sh34_base_device::SHAD(const UINT16 opcode)
else
m_r[n] = 0xFFFFFFFF;
} else
- m_r[n]=(INT32)m_r[n] >> ((~m_r[m] & 0x1F)+1);
+ m_r[n]=(int32_t)m_r[n] >> ((~m_r[m] & 0x1F)+1);
}
/* SHLD Rm,Rn */
-inline void sh34_base_device::SHLD(const UINT16 opcode)
+inline void sh34_base_device::SHLD(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if ((m_r[m] & 0x80000000) == 0)
m_r[n] = m_r[n] << (m_r[m] & 0x1F);
@@ -2348,30 +2348,30 @@ inline void sh34_base_device::SHLD(const UINT16 opcode)
}
/* LDCRBANK Rn,Rm_BANK */
-inline void sh34_base_device::LDCRBANK(const UINT16 opcode)
+inline void sh34_base_device::LDCRBANK(const uint16_t opcode)
{
- UINT32 m = Rm;
+ uint32_t m = Rm;
m_rbnk[m_sr&sRB ? 0 : 1][m & 7] = m_r[Rn];
}
/* LDC Rm,SSR */
-inline void sh34_base_device::LDCSSR(const UINT16 opcode)
+inline void sh34_base_device::LDCSSR(const uint16_t opcode)
{
m_ssr = m_r[Rn];
}
/* LDC Rm,SPC */
-inline void sh34_base_device::LDCSPC(const UINT16 opcode)
+inline void sh34_base_device::LDCSPC(const uint16_t opcode)
{
m_spc = m_r[Rn];
}
/* PREF @Rn */
-inline void sh34_base_device::PREFM(const UINT16 opcode)
+inline void sh34_base_device::PREFM(const uint16_t opcode)
{
int a;
- UINT32 addr,dest,sq;
+ uint32_t addr,dest,sq;
addr = m_r[Rn]; // address
if ((addr >= 0xE0000000) && (addr <= 0xE3FFFFFF))
@@ -2446,9 +2446,9 @@ inline void sh34_base_device::PREFM(const UINT16 opcode)
/* FMOV @Rm+,DRn PR=0 SZ=1 1111nnn0mmmm1001 */
/* FMOV @Rm+,XDn PR=0 SZ=1 1111nnn1mmmm1001 */
/* FMOV @Rm+,XDn PR=1 1111nnn1mmmm1001 */
-inline void sh34_base_device::FMOVMRIFR(const UINT16 opcode)
+inline void sh34_base_device::FMOVMRIFR(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2484,9 +2484,9 @@ inline void sh34_base_device::FMOVMRIFR(const UINT16 opcode)
/* FMOV DRm,@Rn PR=0 SZ=1 1111nnnnmmm01010 */
/* FMOV XDm,@Rn PR=0 SZ=1 1111nnnnmmm11010 */
/* FMOV XDm,@Rn PR=1 1111nnnnmmm11010 */
-inline void sh34_base_device::FMOVFRMR(const UINT16 opcode)
+inline void sh34_base_device::FMOVFRMR(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
m= m & 14;
@@ -2516,9 +2516,9 @@ inline void sh34_base_device::FMOVFRMR(const UINT16 opcode)
/* FMOV DRm,@-Rn PR=0 SZ=1 1111nnnnmmm01011 */
/* FMOV XDm,@-Rn PR=0 SZ=1 1111nnnnmmm11011 */
/* FMOV XDm,@-Rn PR=1 1111nnnnmmm11011 */
-inline void sh34_base_device::FMOVFRMDR(const UINT16 opcode)
+inline void sh34_base_device::FMOVFRMDR(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
m= m & 14;
@@ -2552,9 +2552,9 @@ inline void sh34_base_device::FMOVFRMDR(const UINT16 opcode)
/* FMOV DRm,@(R0,Rn) PR=0 SZ=1 1111nnnnmmm00111 */
/* FMOV XDm,@(R0,Rn) PR=0 SZ=1 1111nnnnmmm10111 */
/* FMOV XDm,@(R0,Rn) PR=1 1111nnnnmmm10111 */
-inline void sh34_base_device::FMOVFRS0(const UINT16 opcode)
+inline void sh34_base_device::FMOVFRS0(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
m= m & 14;
@@ -2584,9 +2584,9 @@ inline void sh34_base_device::FMOVFRS0(const UINT16 opcode)
/* FMOV @(R0,Rm),DRn PR=0 SZ=1 1111nnn0mmmm0110 */
/* FMOV @(R0,Rm),XDn PR=0 SZ=1 1111nnn1mmmm0110 */
/* FMOV @(R0,Rm),XDn PR=1 1111nnn1mmmm0110 */
-inline void sh34_base_device::FMOVS0FR(const UINT16 opcode)
+inline void sh34_base_device::FMOVS0FR(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n= n & 14;
@@ -2617,9 +2617,9 @@ inline void sh34_base_device::FMOVS0FR(const UINT16 opcode)
/* FMOV @Rm,XDn PR=0 SZ=1 1111nnn1mmmm1000 */
/* FMOV @Rm,XDn PR=1 1111nnn1mmmm1000 */
/* FMOV @Rm,DRn PR=1 1111nnn0mmmm1000 */
-inline void sh34_base_device::FMOVMRFR(const UINT16 opcode)
+inline void sh34_base_device::FMOVMRFR(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
if (n & 1) {
@@ -2658,9 +2658,9 @@ inline void sh34_base_device::FMOVMRFR(const UINT16 opcode)
/* FMOV XDm,DRn PR=1 XDm -> DRn 1111nnn0mmm11100 */
/* FMOV DRm,XDn PR=1 DRm -> XDn 1111nnn1mmm01100 */
/* FMOV XDm,XDn PR=1 XDm -> XDn 1111nnn1mmm11100 */
-inline void sh34_base_device::FMOVFR(const UINT16 opcode)
+inline void sh34_base_device::FMOVFR(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if ((m_fpu_sz == 0) && (m_fpu_pr == 0)) /* SZ = 0 */
m_fr[n] = m_fr[m];
@@ -2686,25 +2686,25 @@ inline void sh34_base_device::FMOVFR(const UINT16 opcode)
}
/* FLDI1 FRn 1111nnnn10011101 */
-inline void sh34_base_device::FLDI1(const UINT16 opcode)
+inline void sh34_base_device::FLDI1(const uint16_t opcode)
{
m_fr[Rn] = 0x3F800000;
}
/* FLDI0 FRn 1111nnnn10001101 */
-inline void sh34_base_device::FLDI0(const UINT16 opcode)
+inline void sh34_base_device::FLDI0(const uint16_t opcode)
{
m_fr[Rn] = 0;
}
/* FLDS FRm,FPUL 1111mmmm00011101 */
-inline void sh34_base_device:: FLDS(const UINT16 opcode)
+inline void sh34_base_device:: FLDS(const uint16_t opcode)
{
m_fpul = m_fr[Rn];
}
/* FSTS FPUL,FRn 1111nnnn00001101 */
-inline void sh34_base_device:: FSTS(const UINT16 opcode)
+inline void sh34_base_device:: FSTS(const uint16_t opcode)
{
m_fr[Rn] = m_fpul;
}
@@ -2725,44 +2725,44 @@ void sh34_base_device::FSCHG()
/* FTRC FRm,FPUL PR=0 1111mmmm00111101 */
/* FTRC DRm,FPUL PR=1 1111mmm000111101 */
-inline void sh34_base_device::FTRC(const UINT16 opcode)
+inline void sh34_base_device::FTRC(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
if(n & 1)
fatalerror("SH-4: FTRC opcode used with n %d",n);
n = n & 14;
- *((INT32 *)&m_fpul) = (INT32)FP_RFD(n);
+ *((int32_t *)&m_fpul) = (int32_t)FP_RFD(n);
} else { /* PR = 0 */
/* read m_fr[n] as float -> truncate -> fpul(32) */
- *((INT32 *)&m_fpul) = (INT32)FP_RFS(n);
+ *((int32_t *)&m_fpul) = (int32_t)FP_RFS(n);
}
}
/* FLOAT FPUL,FRn PR=0 1111nnnn00101101 */
/* FLOAT FPUL,DRn PR=1 1111nnn000101101 */
-inline void sh34_base_device::FLOAT(const UINT16 opcode)
+inline void sh34_base_device::FLOAT(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
if(n & 1)
fatalerror("SH-4: FLOAT opcode used with n %d",n);
n = n & 14;
- FP_RFD(n) = (double)*((INT32 *)&m_fpul);
+ FP_RFD(n) = (double)*((int32_t *)&m_fpul);
} else { /* PR = 0 */
- FP_RFS(n) = (float)*((INT32 *)&m_fpul);
+ FP_RFS(n) = (float)*((int32_t *)&m_fpul);
}
}
/* FNEG FRn PR=0 1111nnnn01001101 */
/* FNEG DRn PR=1 1111nnn001001101 */
-inline void sh34_base_device::FNEG(const UINT16 opcode)
+inline void sh34_base_device::FNEG(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
FP_RFD(n) = -FP_RFD(n);
@@ -2773,9 +2773,9 @@ inline void sh34_base_device::FNEG(const UINT16 opcode)
/* FABS FRn PR=0 1111nnnn01011101 */
/* FABS DRn PR=1 1111nnn001011101 */
-inline void sh34_base_device::FABS(const UINT16 opcode)
+inline void sh34_base_device::FABS(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
#ifdef LSB_FIRST
@@ -2792,9 +2792,9 @@ inline void sh34_base_device::FABS(const UINT16 opcode)
/* FCMP/EQ FRm,FRn PR=0 1111nnnnmmmm0100 */
/* FCMP/EQ DRm,DRn PR=1 1111nnn0mmm00100 */
-inline void sh34_base_device::FCMP_EQ(const UINT16 opcode)
+inline void sh34_base_device::FCMP_EQ(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2813,9 +2813,9 @@ inline void sh34_base_device::FCMP_EQ(const UINT16 opcode)
/* FCMP/GT FRm,FRn PR=0 1111nnnnmmmm0101 */
/* FCMP/GT DRm,DRn PR=1 1111nnn0mmm00101 */
-inline void sh34_base_device::FCMP_GT(const UINT16 opcode)
+inline void sh34_base_device::FCMP_GT(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2833,9 +2833,9 @@ inline void sh34_base_device::FCMP_GT(const UINT16 opcode)
}
/* FCNVDS DRm,FPUL PR=1 1111mmm010111101 */
-inline void sh34_base_device::FCNVDS(const UINT16 opcode)
+inline void sh34_base_device::FCNVDS(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2846,9 +2846,9 @@ inline void sh34_base_device::FCNVDS(const UINT16 opcode)
}
/* FCNVSD FPUL, DRn PR=1 1111nnn010101101 */
-inline void sh34_base_device::FCNVSD(const UINT16 opcode)
+inline void sh34_base_device::FCNVSD(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2858,9 +2858,9 @@ inline void sh34_base_device::FCNVSD(const UINT16 opcode)
/* FADD FRm,FRn PR=0 1111nnnnmmmm0000 */
/* FADD DRm,DRn PR=1 1111nnn0mmm00000 */
-inline void sh34_base_device::FADD(const UINT16 opcode)
+inline void sh34_base_device::FADD(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2873,9 +2873,9 @@ inline void sh34_base_device::FADD(const UINT16 opcode)
/* FSUB FRm,FRn PR=0 1111nnnnmmmm0001 */
/* FSUB DRm,DRn PR=1 1111nnn0mmm00001 */
-inline void sh34_base_device::FSUB(const UINT16 opcode)
+inline void sh34_base_device::FSUB(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2889,9 +2889,9 @@ inline void sh34_base_device::FSUB(const UINT16 opcode)
/* FMUL FRm,FRn PR=0 1111nnnnmmmm0010 */
/* FMUL DRm,DRn PR=1 1111nnn0mmm00010 */
-inline void sh34_base_device::FMUL(const UINT16 opcode)
+inline void sh34_base_device::FMUL(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2904,9 +2904,9 @@ inline void sh34_base_device::FMUL(const UINT16 opcode)
/* FDIV FRm,FRn PR=0 1111nnnnmmmm0011 */
/* FDIV DRm,DRn PR=1 1111nnn0mmm00011 */
-inline void sh34_base_device::FDIV(const UINT16 opcode)
+inline void sh34_base_device::FDIV(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2922,9 +2922,9 @@ inline void sh34_base_device::FDIV(const UINT16 opcode)
}
/* FMAC FR0,FRm,FRn PR=0 1111nnnnmmmm1110 */
-inline void sh34_base_device::FMAC(const UINT16 opcode)
+inline void sh34_base_device::FMAC(const uint16_t opcode)
{
- UINT32 m = Rm; UINT32 n = Rn;
+ uint32_t m = Rm; uint32_t n = Rn;
if (m_fpu_pr == 0) { /* PR = 0 */
FP_RFS(n) = (FP_RFS(0) * FP_RFS(m)) + FP_RFS(n);
@@ -2933,9 +2933,9 @@ inline void sh34_base_device::FMAC(const UINT16 opcode)
/* FSQRT FRn PR=0 1111nnnn01101101 */
/* FSQRT DRn PR=1 1111nnnn01101101 */
-inline void sh34_base_device::FSQRT(const UINT16 opcode)
+inline void sh34_base_device::FSQRT(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
if (m_fpu_pr) { /* PR = 1 */
n = n & 14;
@@ -2950,9 +2950,9 @@ inline void sh34_base_device::FSQRT(const UINT16 opcode)
}
/* FSRRA FRn PR=0 1111nnnn01111101 */
-inline void sh34_base_device::FSRRA(const UINT16 opcode)
+inline void sh34_base_device::FSRRA(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
if (FP_RFS(n) < 0)
return;
@@ -2960,9 +2960,9 @@ inline void sh34_base_device::FSRRA(const UINT16 opcode)
}
/* FSSCA FPUL,FRn PR=0 1111nnn011111101 */
-void sh34_base_device::FSSCA(const UINT16 opcode)
+void sh34_base_device::FSSCA(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
float angle;
@@ -2972,11 +2972,11 @@ void sh34_base_device::FSSCA(const UINT16 opcode)
}
/* FIPR FVm,FVn PR=0 1111nnmm11101101 */
-inline void sh34_base_device::FIPR(const UINT16 opcode)
+inline void sh34_base_device::FIPR(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
-UINT32 m;
+uint32_t m;
float ml[4];
int a;
@@ -2988,9 +2988,9 @@ int a;
}
/* FTRV XMTRX,FVn PR=0 1111nn0111111101 */
-void sh34_base_device::FTRV(const UINT16 opcode)
+void sh34_base_device::FTRV(const uint16_t opcode)
{
- UINT32 n = Rn;
+ uint32_t n = Rn;
int i,j;
float sum[4];
@@ -3005,7 +3005,7 @@ float sum[4];
FP_RFS(n + i) = sum[i];
}
-inline void sh34_base_device::op1111_0xf13(const UINT16 opcode)
+inline void sh34_base_device::op1111_0xf13(const uint16_t opcode)
{
if (opcode & 0x100) {
if (opcode & 0x200) {
@@ -3029,13 +3029,13 @@ inline void sh34_base_device::op1111_0xf13(const UINT16 opcode)
}
}
-void sh34_base_device::dbreak(const UINT16 opcode)
+void sh34_base_device::dbreak(const uint16_t opcode)
{
machine().debug_break();
}
-inline void sh34_base_device::op1111_0x13(UINT16 opcode)
+inline void sh34_base_device::op1111_0x13(uint16_t opcode)
{
switch((opcode >> 4) & 0x0f)
{
@@ -3187,7 +3187,7 @@ void sh4_base_device::device_reset()
m_SH4_TCNT2 = 0xffffffff;
}
-inline void sh34_base_device::execute_one_0000(const UINT16 opcode)
+inline void sh34_base_device::execute_one_0000(const uint16_t opcode)
{
switch(opcode & 0xff)
{
@@ -3466,7 +3466,7 @@ inline void sh34_base_device::execute_one_0000(const UINT16 opcode)
}
}
-inline void sh34_base_device::execute_one_4000(const UINT16 opcode)
+inline void sh34_base_device::execute_one_4000(const uint16_t opcode)
{
switch(opcode & 0xff)
{
@@ -3746,7 +3746,7 @@ inline void sh34_base_device::execute_one_4000(const UINT16 opcode)
}
-inline void sh34_base_device::execute_one(const UINT16 opcode)
+inline void sh34_base_device::execute_one(const uint16_t opcode)
{
switch(opcode & 0xf000)
{
@@ -3939,7 +3939,7 @@ void sh34_base_device::execute_run()
m_ppc = m_pc & AM;
debugger_instruction_hook(this, m_pc & AM);
- const UINT16 opcode = m_direct->read_word(m_pc & AM, WORD2_XOR_LE(0));
+ const uint16_t opcode = m_direct->read_word(m_pc & AM, WORD2_XOR_LE(0));
if (m_delay)
{
@@ -3973,7 +3973,7 @@ void sh3be_device::execute_run()
m_ppc = m_pc & AM;
debugger_instruction_hook(this, m_pc & AM);
- const UINT16 opcode = m_direct->read_word(m_pc & AM, WORD_XOR_LE(6));
+ const uint16_t opcode = m_direct->read_word(m_pc & AM, WORD_XOR_LE(6));
if (m_delay)
{
@@ -4007,7 +4007,7 @@ void sh4be_device::execute_run()
m_ppc = m_pc & AM;
debugger_instruction_hook(this, m_pc & AM);
- const UINT16 opcode = m_direct->read_word(m_pc & AM, WORD_XOR_LE(6));
+ const uint16_t opcode = m_direct->read_word(m_pc & AM, WORD_XOR_LE(6));
if (m_delay)
{
@@ -4233,9 +4233,9 @@ void sh34_base_device::device_start()
void sh34_base_device::state_import(const device_state_entry &entry)
{
#ifdef LSB_FIRST
- UINT8 fpu_xor = m_fpu_pr;
+ uint8_t fpu_xor = m_fpu_pr;
#else
- UINT8 fpu_xor = 0;
+ uint8_t fpu_xor = 0;
#endif
switch (entry.index())
@@ -4394,9 +4394,9 @@ void sh34_base_device::state_export(const device_state_entry &entry)
void sh34_base_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
#ifdef LSB_FIRST
- UINT8 fpu_xor = m_fpu_pr;
+ uint8_t fpu_xor = m_fpu_pr;
#else
- UINT8 fpu_xor = 0;
+ uint8_t fpu_xor = 0;
#endif
switch (entry.index())
diff --git a/src/devices/cpu/sh4/sh4.h b/src/devices/cpu/sh4/sh4.h
index badaacd4558..0b8f33926f5 100644
--- a/src/devices/cpu/sh4/sh4.h
+++ b/src/devices/cpu/sh4/sh4.h
@@ -118,25 +118,25 @@ enum
struct sh4_device_dma
{
- UINT32 length;
- UINT32 size;
+ uint32_t length;
+ uint32_t size;
void *buffer;
int channel;
};
struct sh4_ddt_dma
{
- UINT32 source;
- UINT32 length;
- UINT32 size;
- UINT32 destination;
+ uint32_t source;
+ uint32_t length;
+ uint32_t size;
+ uint32_t destination;
void *buffer;
int direction;
int channel;
int mode;
};
-typedef void (*sh4_ftcsr_callback)(UINT32);
+typedef void (*sh4_ftcsr_callback)(uint32_t);
#define MCFG_SH4_MD0(_md0) \
@@ -174,10 +174,10 @@ class sh34_base_device : public cpu_device
{
public:
// construction/destruction
- sh34_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness, address_map_constructor internal);
+ sh34_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, endianness_t endianness, address_map_constructor internal);
//#if SH4_USE_FASTRAM_OPTIMIZATION
- void add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base);
+ void add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base);
//#endif
static void set_md0(device_t &device, int md0) { downcast<sh34_base_device &>(device).c_md0 = md0; }
@@ -208,9 +208,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 4; }
- virtual UINT32 execute_input_lines() const override { return 5; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 4; }
+ virtual uint32_t execute_input_lines() const override { return 5; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -223,9 +223,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
protected:
address_space_config m_program_config;
@@ -242,87 +242,87 @@ protected:
int c_md8;
int c_clock;
- UINT32 m_ppc;
- UINT32 m_pc;
- UINT32 m_spc;
- UINT32 m_pr;
- UINT32 m_sr;
- UINT32 m_ssr;
- UINT32 m_gbr;
- UINT32 m_vbr;
- UINT32 m_mach;
- UINT32 m_macl;
- UINT32 m_r[16];
- UINT32 m_rbnk[2][8];
- UINT32 m_sgr;
- UINT32 m_fr[16];
- UINT32 m_xf[16];
- UINT32 m_ea;
- UINT32 m_delay;
- UINT32 m_cpu_off;
- UINT32 m_pending_irq;
- UINT32 m_test_irq;
- UINT32 m_fpscr;
- UINT32 m_fpul;
- UINT32 m_dbr;
-
- UINT32 m_exception_priority[128];
+ uint32_t m_ppc;
+ uint32_t m_pc;
+ uint32_t m_spc;
+ uint32_t m_pr;
+ uint32_t m_sr;
+ uint32_t m_ssr;
+ uint32_t m_gbr;
+ uint32_t m_vbr;
+ uint32_t m_mach;
+ uint32_t m_macl;
+ uint32_t m_r[16];
+ uint32_t m_rbnk[2][8];
+ uint32_t m_sgr;
+ uint32_t m_fr[16];
+ uint32_t m_xf[16];
+ uint32_t m_ea;
+ uint32_t m_delay;
+ uint32_t m_cpu_off;
+ uint32_t m_pending_irq;
+ uint32_t m_test_irq;
+ uint32_t m_fpscr;
+ uint32_t m_fpul;
+ uint32_t m_dbr;
+
+ uint32_t m_exception_priority[128];
int m_exception_requesting[128];
- INT8 m_irq_line_state[17];
+ int8_t m_irq_line_state[17];
address_space *m_internal;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
// sh4 internal
- UINT32 m_m[16384];
+ uint32_t m_m[16384];
// timer regs handled manually for reuse
- UINT32 m_SH4_TSTR;
- UINT32 m_SH4_TCNT0;
- UINT32 m_SH4_TCNT1;
- UINT32 m_SH4_TCNT2;
- UINT32 m_SH4_TCR0;
- UINT32 m_SH4_TCR1;
- UINT32 m_SH4_TCR2;
- UINT32 m_SH4_TCOR0;
- UINT32 m_SH4_TCOR1;
- UINT32 m_SH4_TCOR2;
- UINT32 m_SH4_TOCR;
- UINT32 m_SH4_TCPR2;
+ uint32_t m_SH4_TSTR;
+ uint32_t m_SH4_TCNT0;
+ uint32_t m_SH4_TCNT1;
+ uint32_t m_SH4_TCNT2;
+ uint32_t m_SH4_TCR0;
+ uint32_t m_SH4_TCR1;
+ uint32_t m_SH4_TCR2;
+ uint32_t m_SH4_TCOR0;
+ uint32_t m_SH4_TCOR1;
+ uint32_t m_SH4_TCOR2;
+ uint32_t m_SH4_TOCR;
+ uint32_t m_SH4_TCPR2;
// INTC regs
- UINT32 m_SH4_IPRA;
+ uint32_t m_SH4_IPRA;
- UINT32 m_SH4_IPRC;
+ uint32_t m_SH4_IPRC;
// DMAC regs
- UINT32 m_SH4_SAR0;
- UINT32 m_SH4_SAR1;
- UINT32 m_SH4_SAR2;
- UINT32 m_SH4_SAR3;
+ uint32_t m_SH4_SAR0;
+ uint32_t m_SH4_SAR1;
+ uint32_t m_SH4_SAR2;
+ uint32_t m_SH4_SAR3;
- UINT32 m_SH4_DAR0;
- UINT32 m_SH4_DAR1;
- UINT32 m_SH4_DAR2;
- UINT32 m_SH4_DAR3;
+ uint32_t m_SH4_DAR0;
+ uint32_t m_SH4_DAR1;
+ uint32_t m_SH4_DAR2;
+ uint32_t m_SH4_DAR3;
- UINT32 m_SH4_CHCR0;
- UINT32 m_SH4_CHCR1;
- UINT32 m_SH4_CHCR2;
- UINT32 m_SH4_CHCR3;
+ uint32_t m_SH4_CHCR0;
+ uint32_t m_SH4_CHCR1;
+ uint32_t m_SH4_CHCR2;
+ uint32_t m_SH4_CHCR3;
- UINT32 m_SH4_DMATCR0;
- UINT32 m_SH4_DMATCR1;
- UINT32 m_SH4_DMATCR2;
- UINT32 m_SH4_DMATCR3;
+ uint32_t m_SH4_DMATCR0;
+ uint32_t m_SH4_DMATCR1;
+ uint32_t m_SH4_DMATCR2;
+ uint32_t m_SH4_DMATCR3;
- UINT32 m_SH4_DMAOR;
+ uint32_t m_SH4_DMAOR;
- INT8 m_nmi_line_state;
+ int8_t m_nmi_line_state;
- UINT8 m_sleep_mode;
+ uint8_t m_sleep_mode;
int m_frt_input;
int m_irln;
@@ -333,11 +333,11 @@ protected:
emu_timer *m_refresh_timer;
emu_timer *m_rtc_timer;
emu_timer *m_timer[3];
- UINT32 m_refresh_timer_base;
+ uint32_t m_refresh_timer_base;
int m_dma_timer_active[4];
- UINT32 m_dma_source[4];
- UINT32 m_dma_destination[4];
- UINT32 m_dma_count[4];
+ uint32_t m_dma_source[4];
+ uint32_t m_dma_destination[4];
+ uint32_t m_dma_count[4];
int m_dma_wordsize[4];
int m_dma_source_increment[4];
int m_dma_destination_increment[4];
@@ -355,25 +355,25 @@ protected:
int m_ioport4_pullup;
int m_ioport4_direction;
- void (*m_ftcsr_read_callback)(UINT32 data);
+ void (*m_ftcsr_read_callback)(uint32_t data);
/* This MMU simulation is good for the simple remap used on Naomi GD-ROM SQ access *ONLY* */
- UINT32 m_sh4_tlb_address[64];
- UINT32 m_sh4_tlb_data[64];
- UINT8 m_sh4_mmu_enabled;
+ uint32_t m_sh4_tlb_address[64];
+ uint32_t m_sh4_tlb_data[64];
+ uint8_t m_sh4_mmu_enabled;
int m_cpu_type;
// sh3 internal
- UINT32 m_sh3internal_upper[0x3000/4];
- UINT32 m_sh3internal_lower[0x1000];
+ uint32_t m_sh3internal_upper[0x3000/4];
+ uint32_t m_sh3internal_lower[0x1000];
- UINT64 m_debugger_temp;
+ uint64_t m_debugger_temp;
- void execute_one_0000(const UINT16 opcode);
- void execute_one_4000(const UINT16 opcode);
- void execute_one(const UINT16 opcode);
+ void execute_one_0000(const uint16_t opcode);
+ void execute_one_4000(const uint16_t opcode);
+ void execute_one(const uint16_t opcode);
inline void sh4_check_pending_irq(const char *message) // look for highest priority active exception and handle it
{
int a,irq,z;
@@ -397,221 +397,221 @@ protected:
}
}
- void TODO(const UINT16 opcode);
- void WB(offs_t A, UINT8 V);
- void WW(offs_t A, UINT16 V);
- void WL(offs_t A, UINT32 V);
- void ADD(const UINT16 opcode);
- void ADDI(const UINT16 opcode);
- void ADDC(const UINT16 opcode);
- void ADDV(const UINT16 opcode);
- void AND(const UINT16 opcode);
- void ANDI(const UINT16 opcode);
- void ANDM(const UINT16 opcode);
- void BF(const UINT16 opcode);
- void BFS(const UINT16 opcode);
- void BRA(const UINT16 opcode);
- void BRAF(const UINT16 opcode);
- void BSR(const UINT16 opcode);
- void BSRF(const UINT16 opcode);
- void BT(const UINT16 opcode);
- void BTS(const UINT16 opcode);
- void CLRMAC(const UINT16 opcode);
- void CLRT(const UINT16 opcode);
- void CMPEQ(const UINT16 opcode);
- void CMPGE(const UINT16 opcode);
- void CMPGT(const UINT16 opcode);
- void CMPHI(const UINT16 opcode);
- void CMPHS(const UINT16 opcode);
- void CMPPL(const UINT16 opcode);
- void CMPPZ(const UINT16 opcode);
- void CMPSTR(const UINT16 opcode);
- void CMPIM(const UINT16 opcode);
- void DIV0S(const UINT16 opcode);
- void DIV0U(const UINT16 opcode);
- void DIV1(const UINT16 opcode);
- void DMULS(const UINT16 opcode);
- void DMULU(const UINT16 opcode);
- void DT(const UINT16 opcode);
- void EXTSB(const UINT16 opcode);
- void EXTSW(const UINT16 opcode);
- void EXTUB(const UINT16 opcode);
- void EXTUW(const UINT16 opcode);
- void JMP(const UINT16 opcode);
- void JSR(const UINT16 opcode);
- void LDCSR(const UINT16 opcode);
- void LDCGBR(const UINT16 opcode);
- void LDCVBR(const UINT16 opcode);
- void LDCMSR(const UINT16 opcode);
- void LDCMGBR(const UINT16 opcode);
- void LDCMVBR(const UINT16 opcode);
- void LDSMACH(const UINT16 opcode);
- void LDSMACL(const UINT16 opcode);
- void LDSPR(const UINT16 opcode);
- void LDSMMACH(const UINT16 opcode);
- void LDSMMACL(const UINT16 opcode);
- void LDSMPR(const UINT16 opcode);
- void MAC_L(const UINT16 opcode);
- void MAC_W(const UINT16 opcode);
- void MOV(const UINT16 opcode);
- void MOVBS(const UINT16 opcode);
- void MOVWS(const UINT16 opcode);
- void MOVLS(const UINT16 opcode);
- void MOVBL(const UINT16 opcode);
- void MOVWL(const UINT16 opcode);
- void MOVLL(const UINT16 opcode);
- void MOVBM(const UINT16 opcode);
- void MOVWM(const UINT16 opcode);
- void MOVLM(const UINT16 opcode);
- void MOVBP(const UINT16 opcode);
- void MOVWP(const UINT16 opcode);
- void MOVLP(const UINT16 opcode);
- void MOVBS0(const UINT16 opcode);
- void MOVWS0(const UINT16 opcode);
- void MOVLS0(const UINT16 opcode);
- void MOVBL0(const UINT16 opcode);
- void MOVWL0(const UINT16 opcode);
- void MOVLL0(const UINT16 opcode);
- void MOVI(const UINT16 opcode);
- void MOVWI(const UINT16 opcode);
- void MOVLI(const UINT16 opcode);
- void MOVBLG(const UINT16 opcode);
- void MOVWLG(const UINT16 opcode);
- void MOVLLG(const UINT16 opcode);
- void MOVBSG(const UINT16 opcode);
- void MOVWSG(const UINT16 opcode);
- void MOVLSG(const UINT16 opcode);
- void MOVBS4(const UINT16 opcode);
- void MOVWS4(const UINT16 opcode);
- void MOVLS4(const UINT16 opcode);
- void MOVBL4(const UINT16 opcode);
- void MOVWL4(const UINT16 opcode);
- void MOVLL4(const UINT16 opcode);
- void MOVA(const UINT16 opcode);
- void MOVT(const UINT16 opcode);
- void MULL(const UINT16 opcode);
- void MULS(const UINT16 opcode);
- void MULU(const UINT16 opcode);
- void NEG(const UINT16 opcode);
- void NEGC(const UINT16 opcode);
- void NOP(const UINT16 opcode);
- void NOT(const UINT16 opcode);
- void OR(const UINT16 opcode);
- void ORI(const UINT16 opcode);
- void ORM(const UINT16 opcode);
- void ROTCL(const UINT16 opcode);
- void ROTCR(const UINT16 opcode);
- void ROTL(const UINT16 opcode);
- void ROTR(const UINT16 opcode);
- void RTE(const UINT16 opcode);
- void RTS(const UINT16 opcode);
- void SETT(const UINT16 opcode);
- void SHAL(const UINT16 opcode);
- void SHAR(const UINT16 opcode);
- void SHLL(const UINT16 opcode);
- void SHLL2(const UINT16 opcode);
- void SHLL8(const UINT16 opcode);
- void SHLL16(const UINT16 opcode);
- void SHLR(const UINT16 opcode);
- void SHLR2(const UINT16 opcode);
- void SHLR8(const UINT16 opcode);
- void SHLR16(const UINT16 opcode);
- void SLEEP(const UINT16 opcode);
- void STCSR(const UINT16 opcode);
- void STCGBR(const UINT16 opcode);
- void STCVBR(const UINT16 opcode);
- void STCMSR(const UINT16 opcode);
- void STCMGBR(const UINT16 opcode);
- void STCMVBR(const UINT16 opcode);
- void STSMACH(const UINT16 opcode);
- void STSMACL(const UINT16 opcode);
- void STSPR(const UINT16 opcode);
- void STSMMACH(const UINT16 opcode);
- void STSMMACL(const UINT16 opcode);
- void STSMPR(const UINT16 opcode);
- void SUB(const UINT16 opcode);
- void SUBC(const UINT16 opcode);
- void SUBV(const UINT16 opcode);
- void SWAPB(const UINT16 opcode);
- void SWAPW(const UINT16 opcode);
- void TAS(const UINT16 opcode);
- void TRAPA(const UINT16 opcode);
- void TST(const UINT16 opcode);
- void TSTI(const UINT16 opcode);
- void TSTM(const UINT16 opcode);
- void XOR(const UINT16 opcode);
- void XORI(const UINT16 opcode);
- void XORM(const UINT16 opcode);
- void XTRCT(const UINT16 opcode);
- void STCSSR(const UINT16 opcode);
- void STCSPC(const UINT16 opcode);
- void STCSGR(const UINT16 opcode);
- void STSFPUL(const UINT16 opcode);
- void STSFPSCR(const UINT16 opcode);
- void STCDBR(const UINT16 opcode);
- void STCRBANK(const UINT16 opcode);
- void STCMRBANK(const UINT16 opcode);
- void MOVCAL(const UINT16 opcode);
- void CLRS(const UINT16 opcode);
- void SETS(const UINT16 opcode);
- void STCMSGR(const UINT16 opcode);
- void STSMFPUL(const UINT16 opcode);
- void STSMFPSCR(const UINT16 opcode);
- void STCMDBR(const UINT16 opcode);
- void STCMSSR(const UINT16 opcode);
- void STCMSPC(const UINT16 opcode);
- void LDSMFPUL(const UINT16 opcode);
- void LDSMFPSCR(const UINT16 opcode);
- void LDCMDBR(const UINT16 opcode);
- void LDCMRBANK(const UINT16 opcode);
- void LDCMSSR(const UINT16 opcode);
- void LDCMSPC(const UINT16 opcode);
- void LDSFPUL(const UINT16 opcode);
- void LDSFPSCR(const UINT16 opcode);
- void LDCDBR(const UINT16 opcode);
- void SHAD(const UINT16 opcode);
- void SHLD(const UINT16 opcode);
- void LDCRBANK(const UINT16 opcode);
- void LDCSSR(const UINT16 opcode);
- void LDCSPC(const UINT16 opcode);
- void PREFM(const UINT16 opcode);
- void FMOVMRIFR(const UINT16 opcode);
- void FMOVFRMR(const UINT16 opcode);
- void FMOVFRMDR(const UINT16 opcode);
- void FMOVFRS0(const UINT16 opcode);
- void FMOVS0FR(const UINT16 opcode);
- void FMOVMRFR(const UINT16 opcode);
- void FMOVFR(const UINT16 opcode);
- void FLDI1(const UINT16 opcode);
- void FLDI0(const UINT16 opcode);
- void FLDS(const UINT16 opcode);
- void FSTS(const UINT16 opcode);
+ void TODO(const uint16_t opcode);
+ void WB(offs_t A, uint8_t V);
+ void WW(offs_t A, uint16_t V);
+ void WL(offs_t A, uint32_t V);
+ void ADD(const uint16_t opcode);
+ void ADDI(const uint16_t opcode);
+ void ADDC(const uint16_t opcode);
+ void ADDV(const uint16_t opcode);
+ void AND(const uint16_t opcode);
+ void ANDI(const uint16_t opcode);
+ void ANDM(const uint16_t opcode);
+ void BF(const uint16_t opcode);
+ void BFS(const uint16_t opcode);
+ void BRA(const uint16_t opcode);
+ void BRAF(const uint16_t opcode);
+ void BSR(const uint16_t opcode);
+ void BSRF(const uint16_t opcode);
+ void BT(const uint16_t opcode);
+ void BTS(const uint16_t opcode);
+ void CLRMAC(const uint16_t opcode);
+ void CLRT(const uint16_t opcode);
+ void CMPEQ(const uint16_t opcode);
+ void CMPGE(const uint16_t opcode);
+ void CMPGT(const uint16_t opcode);
+ void CMPHI(const uint16_t opcode);
+ void CMPHS(const uint16_t opcode);
+ void CMPPL(const uint16_t opcode);
+ void CMPPZ(const uint16_t opcode);
+ void CMPSTR(const uint16_t opcode);
+ void CMPIM(const uint16_t opcode);
+ void DIV0S(const uint16_t opcode);
+ void DIV0U(const uint16_t opcode);
+ void DIV1(const uint16_t opcode);
+ void DMULS(const uint16_t opcode);
+ void DMULU(const uint16_t opcode);
+ void DT(const uint16_t opcode);
+ void EXTSB(const uint16_t opcode);
+ void EXTSW(const uint16_t opcode);
+ void EXTUB(const uint16_t opcode);
+ void EXTUW(const uint16_t opcode);
+ void JMP(const uint16_t opcode);
+ void JSR(const uint16_t opcode);
+ void LDCSR(const uint16_t opcode);
+ void LDCGBR(const uint16_t opcode);
+ void LDCVBR(const uint16_t opcode);
+ void LDCMSR(const uint16_t opcode);
+ void LDCMGBR(const uint16_t opcode);
+ void LDCMVBR(const uint16_t opcode);
+ void LDSMACH(const uint16_t opcode);
+ void LDSMACL(const uint16_t opcode);
+ void LDSPR(const uint16_t opcode);
+ void LDSMMACH(const uint16_t opcode);
+ void LDSMMACL(const uint16_t opcode);
+ void LDSMPR(const uint16_t opcode);
+ void MAC_L(const uint16_t opcode);
+ void MAC_W(const uint16_t opcode);
+ void MOV(const uint16_t opcode);
+ void MOVBS(const uint16_t opcode);
+ void MOVWS(const uint16_t opcode);
+ void MOVLS(const uint16_t opcode);
+ void MOVBL(const uint16_t opcode);
+ void MOVWL(const uint16_t opcode);
+ void MOVLL(const uint16_t opcode);
+ void MOVBM(const uint16_t opcode);
+ void MOVWM(const uint16_t opcode);
+ void MOVLM(const uint16_t opcode);
+ void MOVBP(const uint16_t opcode);
+ void MOVWP(const uint16_t opcode);
+ void MOVLP(const uint16_t opcode);
+ void MOVBS0(const uint16_t opcode);
+ void MOVWS0(const uint16_t opcode);
+ void MOVLS0(const uint16_t opcode);
+ void MOVBL0(const uint16_t opcode);
+ void MOVWL0(const uint16_t opcode);
+ void MOVLL0(const uint16_t opcode);
+ void MOVI(const uint16_t opcode);
+ void MOVWI(const uint16_t opcode);
+ void MOVLI(const uint16_t opcode);
+ void MOVBLG(const uint16_t opcode);
+ void MOVWLG(const uint16_t opcode);
+ void MOVLLG(const uint16_t opcode);
+ void MOVBSG(const uint16_t opcode);
+ void MOVWSG(const uint16_t opcode);
+ void MOVLSG(const uint16_t opcode);
+ void MOVBS4(const uint16_t opcode);
+ void MOVWS4(const uint16_t opcode);
+ void MOVLS4(const uint16_t opcode);
+ void MOVBL4(const uint16_t opcode);
+ void MOVWL4(const uint16_t opcode);
+ void MOVLL4(const uint16_t opcode);
+ void MOVA(const uint16_t opcode);
+ void MOVT(const uint16_t opcode);
+ void MULL(const uint16_t opcode);
+ void MULS(const uint16_t opcode);
+ void MULU(const uint16_t opcode);
+ void NEG(const uint16_t opcode);
+ void NEGC(const uint16_t opcode);
+ void NOP(const uint16_t opcode);
+ void NOT(const uint16_t opcode);
+ void OR(const uint16_t opcode);
+ void ORI(const uint16_t opcode);
+ void ORM(const uint16_t opcode);
+ void ROTCL(const uint16_t opcode);
+ void ROTCR(const uint16_t opcode);
+ void ROTL(const uint16_t opcode);
+ void ROTR(const uint16_t opcode);
+ void RTE(const uint16_t opcode);
+ void RTS(const uint16_t opcode);
+ void SETT(const uint16_t opcode);
+ void SHAL(const uint16_t opcode);
+ void SHAR(const uint16_t opcode);
+ void SHLL(const uint16_t opcode);
+ void SHLL2(const uint16_t opcode);
+ void SHLL8(const uint16_t opcode);
+ void SHLL16(const uint16_t opcode);
+ void SHLR(const uint16_t opcode);
+ void SHLR2(const uint16_t opcode);
+ void SHLR8(const uint16_t opcode);
+ void SHLR16(const uint16_t opcode);
+ void SLEEP(const uint16_t opcode);
+ void STCSR(const uint16_t opcode);
+ void STCGBR(const uint16_t opcode);
+ void STCVBR(const uint16_t opcode);
+ void STCMSR(const uint16_t opcode);
+ void STCMGBR(const uint16_t opcode);
+ void STCMVBR(const uint16_t opcode);
+ void STSMACH(const uint16_t opcode);
+ void STSMACL(const uint16_t opcode);
+ void STSPR(const uint16_t opcode);
+ void STSMMACH(const uint16_t opcode);
+ void STSMMACL(const uint16_t opcode);
+ void STSMPR(const uint16_t opcode);
+ void SUB(const uint16_t opcode);
+ void SUBC(const uint16_t opcode);
+ void SUBV(const uint16_t opcode);
+ void SWAPB(const uint16_t opcode);
+ void SWAPW(const uint16_t opcode);
+ void TAS(const uint16_t opcode);
+ void TRAPA(const uint16_t opcode);
+ void TST(const uint16_t opcode);
+ void TSTI(const uint16_t opcode);
+ void TSTM(const uint16_t opcode);
+ void XOR(const uint16_t opcode);
+ void XORI(const uint16_t opcode);
+ void XORM(const uint16_t opcode);
+ void XTRCT(const uint16_t opcode);
+ void STCSSR(const uint16_t opcode);
+ void STCSPC(const uint16_t opcode);
+ void STCSGR(const uint16_t opcode);
+ void STSFPUL(const uint16_t opcode);
+ void STSFPSCR(const uint16_t opcode);
+ void STCDBR(const uint16_t opcode);
+ void STCRBANK(const uint16_t opcode);
+ void STCMRBANK(const uint16_t opcode);
+ void MOVCAL(const uint16_t opcode);
+ void CLRS(const uint16_t opcode);
+ void SETS(const uint16_t opcode);
+ void STCMSGR(const uint16_t opcode);
+ void STSMFPUL(const uint16_t opcode);
+ void STSMFPSCR(const uint16_t opcode);
+ void STCMDBR(const uint16_t opcode);
+ void STCMSSR(const uint16_t opcode);
+ void STCMSPC(const uint16_t opcode);
+ void LDSMFPUL(const uint16_t opcode);
+ void LDSMFPSCR(const uint16_t opcode);
+ void LDCMDBR(const uint16_t opcode);
+ void LDCMRBANK(const uint16_t opcode);
+ void LDCMSSR(const uint16_t opcode);
+ void LDCMSPC(const uint16_t opcode);
+ void LDSFPUL(const uint16_t opcode);
+ void LDSFPSCR(const uint16_t opcode);
+ void LDCDBR(const uint16_t opcode);
+ void SHAD(const uint16_t opcode);
+ void SHLD(const uint16_t opcode);
+ void LDCRBANK(const uint16_t opcode);
+ void LDCSSR(const uint16_t opcode);
+ void LDCSPC(const uint16_t opcode);
+ void PREFM(const uint16_t opcode);
+ void FMOVMRIFR(const uint16_t opcode);
+ void FMOVFRMR(const uint16_t opcode);
+ void FMOVFRMDR(const uint16_t opcode);
+ void FMOVFRS0(const uint16_t opcode);
+ void FMOVS0FR(const uint16_t opcode);
+ void FMOVMRFR(const uint16_t opcode);
+ void FMOVFR(const uint16_t opcode);
+ void FLDI1(const uint16_t opcode);
+ void FLDI0(const uint16_t opcode);
+ void FLDS(const uint16_t opcode);
+ void FSTS(const uint16_t opcode);
void FRCHG();
void FSCHG();
- void FTRC(const UINT16 opcode);
- void FLOAT(const UINT16 opcode);
- void FNEG(const UINT16 opcode);
- void FABS(const UINT16 opcode);
- void FCMP_EQ(const UINT16 opcode);
- void FCMP_GT(const UINT16 opcode);
- void FCNVDS(const UINT16 opcode);
- void FCNVSD(const UINT16 opcode);
- void FADD(const UINT16 opcode);
- void FSUB(const UINT16 opcode);
- void FMUL(const UINT16 opcode);
- void FDIV(const UINT16 opcode);
- void FMAC(const UINT16 opcode);
- void FSQRT(const UINT16 opcode);
- void FSRRA(const UINT16 opcode);
- void FSSCA(const UINT16 opcode);
- void FIPR(const UINT16 opcode);
- void FTRV(const UINT16 opcode);
- void op1111_0xf13(const UINT16 opcode);
- void dbreak(const UINT16 opcode);
- void op1111_0x13(UINT16 opcode);
- UINT8 RB(offs_t A);
- UINT16 RW(offs_t A);
- UINT32 RL(offs_t A);
+ void FTRC(const uint16_t opcode);
+ void FLOAT(const uint16_t opcode);
+ void FNEG(const uint16_t opcode);
+ void FABS(const uint16_t opcode);
+ void FCMP_EQ(const uint16_t opcode);
+ void FCMP_GT(const uint16_t opcode);
+ void FCNVDS(const uint16_t opcode);
+ void FCNVSD(const uint16_t opcode);
+ void FADD(const uint16_t opcode);
+ void FSUB(const uint16_t opcode);
+ void FMUL(const uint16_t opcode);
+ void FDIV(const uint16_t opcode);
+ void FMAC(const uint16_t opcode);
+ void FSQRT(const uint16_t opcode);
+ void FSRRA(const uint16_t opcode);
+ void FSSCA(const uint16_t opcode);
+ void FIPR(const uint16_t opcode);
+ void FTRV(const uint16_t opcode);
+ void op1111_0xf13(const uint16_t opcode);
+ void dbreak(const uint16_t opcode);
+ void op1111_0x13(uint16_t opcode);
+ uint8_t RB(offs_t A);
+ uint16_t RW(offs_t A);
+ uint32_t RL(offs_t A);
void sh4_change_register_bank(int to);
void sh4_swap_fp_registers();
void sh4_swap_fp_couples();
@@ -622,88 +622,88 @@ protected:
void sh4_exception_unrequest(int exception);
void sh4_exception_checkunrequest(int exception);
void sh4_exception(const char *message, int exception);
- UINT32 compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor);
+ uint32_t compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor);
void sh4_refresh_timer_recompute();
void increment_rtc_time(int mode);
void sh4_dmac_nmi();
- void sh4_handler_ipra_w(UINT32 data, UINT32 mem_mask);
- UINT32 sh4_getsqremap(UINT32 address);
+ void sh4_handler_ipra_w(uint32_t data, uint32_t mem_mask);
+ uint32_t sh4_getsqremap(uint32_t address);
void sh4_parse_configuration();
void sh4_timer_recompute(int which);
- UINT32 sh4_handle_tcnt0_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcnt1_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcnt2_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcor0_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcor1_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcor2_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcr0_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcr1_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcr2_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tstr_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tocr_addr_r(UINT32 mem_mask);
- UINT32 sh4_handle_tcpr2_addr_r(UINT32 mem_mask);
- void sh4_handle_tstr_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcr0_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcr1_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcr2_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcor0_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcor1_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcor2_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcnt0_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcnt1_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcnt2_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tocr_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_tcpr2_addr_w(UINT32 data, UINT32 mem_mask);
- int sh4_dma_transfer(int channel, int timermode, UINT32 chcr, UINT32 *sar, UINT32 *dar, UINT32 *dmatcr);
- int sh4_dma_transfer_device(int channel, UINT32 chcr, UINT32 *sar, UINT32 *dar, UINT32 *dmatcr);
+ uint32_t sh4_handle_tcnt0_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcnt1_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcnt2_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcor0_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcor1_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcor2_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcr0_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcr1_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcr2_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tstr_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tocr_addr_r(uint32_t mem_mask);
+ uint32_t sh4_handle_tcpr2_addr_r(uint32_t mem_mask);
+ void sh4_handle_tstr_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcr0_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcr1_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcr2_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcor0_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcor1_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcor2_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcnt0_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcnt1_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcnt2_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tocr_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_tcpr2_addr_w(uint32_t data, uint32_t mem_mask);
+ int sh4_dma_transfer(int channel, int timermode, uint32_t chcr, uint32_t *sar, uint32_t *dar, uint32_t *dmatcr);
+ int sh4_dma_transfer_device(int channel, uint32_t chcr, uint32_t *sar, uint32_t *dar, uint32_t *dmatcr);
void sh4_dmac_check(int channel);
- void sh4_handle_sar0_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_sar1_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_sar2_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_sar3_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dar0_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dar1_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dar2_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dar3_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dmatcr0_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dmatcr1_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dmatcr2_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dmatcr3_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_chcr0_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_chcr1_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_chcr2_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_chcr3_addr_w(UINT32 data, UINT32 mem_mask);
- void sh4_handle_dmaor_addr_w(UINT32 data, UINT32 mem_mask);
- UINT32 sh4_handle_sar0_addr_r(UINT32 mem_mask) { return m_SH4_SAR0; }
- UINT32 sh4_handle_sar1_addr_r(UINT32 mem_mask) { return m_SH4_SAR1; }
- UINT32 sh4_handle_sar2_addr_r(UINT32 mem_mask) { return m_SH4_SAR2; }
- UINT32 sh4_handle_sar3_addr_r(UINT32 mem_mask) { return m_SH4_SAR3; }
- UINT32 sh4_handle_dar0_addr_r(UINT32 mem_mask) { return m_SH4_DAR0; }
- UINT32 sh4_handle_dar1_addr_r(UINT32 mem_mask) { return m_SH4_DAR1; }
- UINT32 sh4_handle_dar2_addr_r(UINT32 mem_mask) { return m_SH4_DAR2; }
- UINT32 sh4_handle_dar3_addr_r(UINT32 mem_mask) { return m_SH4_DAR3; }
- UINT32 sh4_handle_dmatcr0_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR0; }
- UINT32 sh4_handle_dmatcr1_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR1; }
- UINT32 sh4_handle_dmatcr2_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR2; }
- UINT32 sh4_handle_dmatcr3_addr_r(UINT32 mem_mask) { return m_SH4_DMATCR3; }
- UINT32 sh4_handle_chcr0_addr_r(UINT32 mem_mask) { return m_SH4_CHCR0; }
- UINT32 sh4_handle_chcr1_addr_r(UINT32 mem_mask) { return m_SH4_CHCR1; }
- UINT32 sh4_handle_chcr2_addr_r(UINT32 mem_mask) { return m_SH4_CHCR2; }
- UINT32 sh4_handle_chcr3_addr_r(UINT32 mem_mask) { return m_SH4_CHCR3; }
- UINT32 sh4_handle_dmaor_addr_r(UINT32 mem_mask) { return m_SH4_DMAOR; }
+ void sh4_handle_sar0_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_sar1_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_sar2_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_sar3_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dar0_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dar1_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dar2_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dar3_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dmatcr0_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dmatcr1_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dmatcr2_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dmatcr3_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_chcr0_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_chcr1_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_chcr2_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_chcr3_addr_w(uint32_t data, uint32_t mem_mask);
+ void sh4_handle_dmaor_addr_w(uint32_t data, uint32_t mem_mask);
+ uint32_t sh4_handle_sar0_addr_r(uint32_t mem_mask) { return m_SH4_SAR0; }
+ uint32_t sh4_handle_sar1_addr_r(uint32_t mem_mask) { return m_SH4_SAR1; }
+ uint32_t sh4_handle_sar2_addr_r(uint32_t mem_mask) { return m_SH4_SAR2; }
+ uint32_t sh4_handle_sar3_addr_r(uint32_t mem_mask) { return m_SH4_SAR3; }
+ uint32_t sh4_handle_dar0_addr_r(uint32_t mem_mask) { return m_SH4_DAR0; }
+ uint32_t sh4_handle_dar1_addr_r(uint32_t mem_mask) { return m_SH4_DAR1; }
+ uint32_t sh4_handle_dar2_addr_r(uint32_t mem_mask) { return m_SH4_DAR2; }
+ uint32_t sh4_handle_dar3_addr_r(uint32_t mem_mask) { return m_SH4_DAR3; }
+ uint32_t sh4_handle_dmatcr0_addr_r(uint32_t mem_mask) { return m_SH4_DMATCR0; }
+ uint32_t sh4_handle_dmatcr1_addr_r(uint32_t mem_mask) { return m_SH4_DMATCR1; }
+ uint32_t sh4_handle_dmatcr2_addr_r(uint32_t mem_mask) { return m_SH4_DMATCR2; }
+ uint32_t sh4_handle_dmatcr3_addr_r(uint32_t mem_mask) { return m_SH4_DMATCR3; }
+ uint32_t sh4_handle_chcr0_addr_r(uint32_t mem_mask) { return m_SH4_CHCR0; }
+ uint32_t sh4_handle_chcr1_addr_r(uint32_t mem_mask) { return m_SH4_CHCR1; }
+ uint32_t sh4_handle_chcr2_addr_r(uint32_t mem_mask) { return m_SH4_CHCR2; }
+ uint32_t sh4_handle_chcr3_addr_r(uint32_t mem_mask) { return m_SH4_CHCR3; }
+ uint32_t sh4_handle_dmaor_addr_r(uint32_t mem_mask) { return m_SH4_DMAOR; }
#if SH4_USE_FASTRAM_OPTIMIZATION
/* fast RAM */
bool m_bigendian;
- UINT32 m_byte_xor;
- UINT32 m_word_xor;
- UINT32 m_dword_xor;
- UINT32 m_fastram_select;
+ uint32_t m_byte_xor;
+ uint32_t m_word_xor;
+ uint32_t m_dword_xor;
+ uint32_t m_fastram_select;
struct
{
offs_t start; /* start of the RAM block */
offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
+ uint8_t readonly; /* TRUE if read-only */
void * base; /* base in memory where the RAM lives */
} m_fastram[SH4_MAX_FASTRAM];
#endif
@@ -714,7 +714,7 @@ class sh3_base_device : public sh34_base_device
{
public:
// construction/destruction
- sh3_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness);
+ sh3_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, endianness_t endianness);
DECLARE_WRITE32_MEMBER( sh3_internal_w );
DECLARE_READ32_MEMBER( sh3_internal_r );
@@ -731,7 +731,7 @@ class sh4_base_device : public sh34_base_device
{
public:
// construction/destruction
- sh4_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, endianness_t endianness);
+ sh4_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, endianness_t endianness);
DECLARE_WRITE32_MEMBER( sh4_internal_w );
DECLARE_READ32_MEMBER( sh4_internal_r );
@@ -747,36 +747,36 @@ protected:
class sh3_device : public sh3_base_device
{
public:
- sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class sh3be_device : public sh3_base_device
{
public:
- sh3be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sh3be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void execute_run() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class sh4_device : public sh4_base_device
{
public:
- sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class sh4be_device : public sh4_base_device
{
public:
- sh4be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sh4be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void execute_run() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
@@ -797,7 +797,7 @@ extern const device_type SH4BE;
#define SH4DRC_COMPATIBLE_OPTIONS (SH4DRC_STRICT_VERIFY | SH4DRC_FLUSH_PC | SH4DRC_STRICT_PCREL)
#define SH4DRC_FASTEST_OPTIONS (0)
-void sh4drc_set_options(device_t *device, UINT32 options);
+void sh4drc_set_options(device_t *device, uint32_t options);
void sh4drc_add_pcflush(device_t *device, offs_t address);
#endif /* __SH4_H__ */
diff --git a/src/devices/cpu/sh4/sh4comn.cpp b/src/devices/cpu/sh4/sh4comn.cpp
index 5052622e2d4..985413e4a73 100644
--- a/src/devices/cpu/sh4/sh4comn.cpp
+++ b/src/devices/cpu/sh4/sh4comn.cpp
@@ -22,7 +22,7 @@ static const int daysmonth[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 3
-static const UINT32 exception_priority_default[] = {
+static const uint32_t exception_priority_default[] = {
EXPPRI(1,1,0,0), /* Power-on Reset */
EXPPRI(1,2,0,1), /* Manual Reset */
EXPPRI(1,1,0,2), /* H-UDI Reset */
@@ -260,7 +260,7 @@ void sh34_base_device::sh4_change_register_bank(int to)
void sh34_base_device::sh4_swap_fp_registers()
{
int s;
- UINT32 z;
+ uint32_t z;
for (s = 0;s <= 15;s++)
{
@@ -273,7 +273,7 @@ void sh34_base_device::sh4_swap_fp_registers()
void sh34_base_device::sh4_swap_fp_couples()
{
int s;
- UINT32 z;
+ uint32_t z;
for (s = 0;s <= 15;s = s+2)
{
@@ -369,7 +369,7 @@ void sh34_base_device::sh4_exception_checkunrequest(int exception)
void sh34_base_device::sh4_exception(const char *message, int exception) // handle exception
{
- UINT32 vector;
+ uint32_t vector;
if (m_cpu_type == CPU_TYPE_SH4)
@@ -462,17 +462,17 @@ void sh34_base_device::sh4_exception(const char *message, int exception) // hand
}
-UINT32 sh34_base_device::compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor)
+uint32_t sh34_base_device::compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor)
{
// elapsed:total = x : ticks
// x=elapsed*tics/total -> x=elapsed*(double)100000000/rtcnt_div[(m_m[RTCSR] >> 3) & 7]
// ticks/total=ticks / ((rtcnt_div[(m_m[RTCSR] >> 3) & 7] * ticks) / 100000000)=1/((rtcnt_div[(m_m[RTCSR] >> 3) & 7] / 100000000)=100000000/rtcnt_div[(m_m[RTCSR] >> 3) & 7]
- return base + (UINT32)((timer->elapsed().as_double() * (double)hertz) / (double)divisor);
+ return base + (uint32_t)((timer->elapsed().as_double() * (double)hertz) / (double)divisor);
}
void sh34_base_device::sh4_refresh_timer_recompute()
{
- UINT32 ticks;
+ uint32_t ticks;
if (m_cpu_type != CPU_TYPE_SH4)
fatalerror("sh4_refresh_timer_recompute uses m_m[] with SH3\n");
@@ -638,7 +638,7 @@ void sh34_base_device::sh4_dmac_nmi() // manage dma when nmi gets asserted
}
}
-void sh34_base_device::sh4_handler_ipra_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handler_ipra_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_IPRA);
/* 15 - 12 TMU0 */
@@ -665,13 +665,13 @@ void sh34_base_device::sh4_handler_ipra_w(UINT32 data, UINT32 mem_mask)
WRITE32_MEMBER( sh4_base_device::sh4_internal_w )
{
int a;
- UINT32 addr = (offset << 2) + 0xfe000000;
+ uint32_t addr = (offset << 2) + 0xfe000000;
offset = ((addr & 0xfc) >> 2) | ((addr & 0x1fe0000) >> 11);
if (m_cpu_type != CPU_TYPE_SH4)
fatalerror("sh4_internal_w uses m_m[] with SH3\n");
- UINT32 old = m_m[offset];
+ uint32_t old = m_m[offset];
COMBINE_DATA(m_m+offset);
// printf("sh4_internal_w: Write %08x (%x), %08x @ %08x\n", 0xfe000000+((offset & 0x3fc0) << 11)+((offset & 0x3f) << 2), offset, data, mem_mask);
@@ -854,11 +854,11 @@ WRITE32_MEMBER( sh4_base_device::sh4_internal_w )
m_ioport16_direction &= 0xffff;
m_ioport16_pullup = (m_ioport16_pullup | m_ioport16_direction) ^ 0xffff;
if (m_m[BCR2] & 1)
- m_io->write_dword(SH4_IOPORT_16, (UINT64)(m_m[PDTRA] & m_ioport16_direction) | ((UINT64)m_m[PCTRA] << 16));
+ m_io->write_dword(SH4_IOPORT_16, (uint64_t)(m_m[PDTRA] & m_ioport16_direction) | ((uint64_t)m_m[PCTRA] << 16));
break;
case PDTRA:
if (m_m[BCR2] & 1)
- m_io->write_dword(SH4_IOPORT_16, (UINT64)(m_m[PDTRA] & m_ioport16_direction) | ((UINT64)m_m[PCTRA] << 16));
+ m_io->write_dword(SH4_IOPORT_16, (uint64_t)(m_m[PDTRA] & m_ioport16_direction) | ((uint64_t)m_m[PCTRA] << 16));
break;
case PCTRB:
m_ioport4_pullup = 0;
@@ -894,7 +894,7 @@ READ32_MEMBER( sh4_base_device::sh4_internal_r )
if (m_cpu_type != CPU_TYPE_SH4)
fatalerror("sh4_internal_r uses m_m[] with SH3\n");
- UINT32 addr = (offset << 2) + 0xfe000000;
+ uint32_t addr = (offset << 2) + 0xfe000000;
offset = ((addr & 0xfc) >> 2) | ((addr & 0x1fe0000) >> 11);
// printf("sh4_internal_r: Read %08x (%x) @ %08x\n", 0xfe000000+((offset & 0x3fc0) << 11)+((offset & 0x3f) << 2), offset, mem_mask);
@@ -1184,18 +1184,18 @@ void sh34_base_device::sh4_parse_configuration()
}
}
-UINT32 sh34_base_device::sh4_getsqremap(UINT32 address)
+uint32_t sh34_base_device::sh4_getsqremap(uint32_t address)
{
if (!m_sh4_mmu_enabled)
return address;
else
{
int i;
- UINT32 topaddr = address&0xfff00000;
+ uint32_t topaddr = address&0xfff00000;
for (i=0;i<64;i++)
{
- UINT32 topcmp = m_sh4_tlb_address[i]&0xfff00000;
+ uint32_t topcmp = m_sh4_tlb_address[i]&0xfff00000;
if (topcmp==topaddr)
return (address&0x000fffff) | ((m_sh4_tlb_data[i])&0xfff00000);
}
@@ -1211,12 +1211,12 @@ READ64_MEMBER( sh4_base_device::sh4_tlb_r )
if (offs >= 0x01000000)
{
- UINT8 i = (offs>>8)&63;
+ uint8_t i = (offs>>8)&63;
return m_sh4_tlb_data[i];
}
else
{
- UINT8 i = (offs>>8)&63;
+ uint8_t i = (offs>>8)&63;
return m_sh4_tlb_address[i];
}
}
@@ -1227,12 +1227,12 @@ WRITE64_MEMBER( sh4_base_device::sh4_tlb_w )
if (offs >= 0x01000000)
{
- UINT8 i = (offs>>8)&63;
+ uint8_t i = (offs>>8)&63;
m_sh4_tlb_data[i] = data&0xffffffff;
}
else
{
- UINT8 i = (offs>>8)&63;
+ uint8_t i = (offs>>8)&63;
m_sh4_tlb_address[i] = data&0xffffffff;
}
}
diff --git a/src/devices/cpu/sh4/sh4comn.h b/src/devices/cpu/sh4/sh4comn.h
index 3aaec85692f..230207652d6 100644
--- a/src/devices/cpu/sh4/sh4comn.h
+++ b/src/devices/cpu/sh4/sh4comn.h
@@ -58,21 +58,21 @@ struct sh4_state
int pcfsel; // last pcflush entry set
int maxpcfsel; // highest valid pcflush entry
- UINT32 pcflushes[16]; // pcflush entries
+ uint32_t pcflushes[16]; // pcflush entries
drc_cache * cache; /* pointer to the DRC code cache */
drcuml_state * drcuml; /* DRC UML generator state */
sh4_frontend * drcfe; /* pointer to the DRC front-end class */
- UINT32 drcoptions; /* configurable DRC options */
+ uint32_t drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
+ uint8_t cache_dirty; /* true if we need to flush the cache */
/* parameters for subroutines */
- UINT64 numcycles; /* return value from gettotalcycles */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
- UINT32 irq; /* irq we're taking */
+ uint64_t numcycles; /* return value from gettotalcycles */
+ uint32_t arg0; /* print_debug argument 1 */
+ uint32_t arg1; /* print_debug argument 2 */
+ uint32_t irq; /* irq we're taking */
/* register mappings */
uml::parameter regmap[16]; /* parameter to register mappings for all 16 integer registers */
@@ -89,8 +89,8 @@ struct sh4_state
uml::code_handle * nocode; /* nocode */
uml::code_handle * out_of_cycles; /* out of cycles exception handler */
- UINT32 prefadr;
- UINT32 target;
+ uint32_t prefadr;
+ uint32_t target;
};
#endif
@@ -98,20 +98,20 @@ struct sh4_state
class sh4_frontend : public drc_frontend
{
public:
- sh4_frontend(sh4_state &state, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
+ sh4_frontend(sh4_state &state, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
protected:
virtual bool describe(opcode_desc &desc, const opcode_desc *prev);
private:
- bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_2(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_3(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_6(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_8(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_12(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
- bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, UINT16 opcode);
+ bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_2(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_3(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_6(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_8(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_12(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
+ bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
sh4_state &m_context;
};
diff --git a/src/devices/cpu/sh4/sh4dasm.cpp b/src/devices/cpu/sh4/sh4dasm.cpp
index cba1bea7bd5..93a0a91ab1e 100644
--- a/src/devices/cpu/sh4/sh4dasm.cpp
+++ b/src/devices/cpu/sh4/sh4dasm.cpp
@@ -4,8 +4,8 @@
#include "debugger.h"
#include "sh4.h"
-#define SIGNX8(x) (((INT32)(x) << 24) >> 24)
-#define SIGNX12(x) (((INT32)(x) << 20) >> 20)
+#define SIGNX8(x) (((int32_t)(x) << 24) >> 24)
+#define SIGNX12(x) (((int32_t)(x) << 20) >> 20)
#define Rn ((opcode >> 8) & 15)
#define Rm ((opcode >> 4) & 15)
@@ -15,9 +15,9 @@ static const char *const regname[16] = {
"R8", "R9", "R10","R11","R12","R13","R14","R15"
};
-static UINT32 op0000(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0000(char *buffer, uint32_t pc, uint16_t opcode)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch (opcode & 0xF)
{
case 0x0:
@@ -143,13 +143,13 @@ static UINT32 op0000(char *buffer, UINT32 pc, UINT16 opcode)
return flags;
}
-static UINT32 op0001(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0001(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "MOV.L %s,@($%02X,%s)", regname[Rm], (opcode & 15) * 4, regname[Rn]);
return 0;
}
-static UINT32 op0010(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0010(char *buffer, uint32_t pc, uint16_t opcode)
{
switch (opcode & 15)
{
@@ -205,7 +205,7 @@ static UINT32 op0010(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-static UINT32 op0011(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0011(char *buffer, uint32_t pc, uint16_t opcode)
{
switch (opcode & 15)
{
@@ -261,9 +261,9 @@ static UINT32 op0011(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-static UINT32 op0100(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0100(char *buffer, uint32_t pc, uint16_t opcode)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch (opcode & 0xF)
{
case 0x0:
@@ -463,13 +463,13 @@ static UINT32 op0100(char *buffer, UINT32 pc, UINT16 opcode)
return flags;
}
-static UINT32 op0101(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0101(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "MOV.L @($%02X,%s),%s", (opcode & 15) * 4, regname[Rm], regname[Rn]);
return 0;
}
-static UINT32 op0110(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0110(char *buffer, uint32_t pc, uint16_t opcode)
{
switch(opcode & 0xF)
@@ -526,13 +526,13 @@ static UINT32 op0110(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-static UINT32 op0111(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op0111(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "ADD #$%02X,%s", opcode & 0xff, regname[Rn]);
return 0;
}
-static UINT32 op1000(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1000(char *buffer, uint32_t pc, uint16_t opcode)
{
switch((opcode >> 8) & 15)
{
@@ -569,29 +569,29 @@ static UINT32 op1000(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-static UINT32 op1001(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1001(char *buffer, uint32_t pc, uint16_t opcode)
{
-UINT32 ea=(pc+((opcode & 0xff) * 2)+2);
+uint32_t ea=(pc+((opcode & 0xff) * 2)+2);
sprintf(buffer, "MOV.W @($%04X,PC),%s [%08X]", (opcode & 0xff) * 2, regname[Rn], ea);
return 0;
}
-static UINT32 op1010(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1010(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "BRA $%08X", SIGNX12(opcode & 0xfff) * 2 + pc + 2);
return 0;
}
-static UINT32 op1011(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1011(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "BSR $%08X", SIGNX12(opcode & 0xfff) * 2 + pc + 2);
return DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
}
-static UINT32 op1100(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1100(char *buffer, uint32_t pc, uint16_t opcode)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch((opcode >> 8) & 15)
{
case 0:
@@ -647,21 +647,21 @@ static UINT32 op1100(char *buffer, UINT32 pc, UINT16 opcode)
return flags;
}
-static UINT32 op1101(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1101(char *buffer, uint32_t pc, uint16_t opcode)
{
-UINT32 ea=((pc + 2) & ~3) + (opcode & 0xff) * 4;
+uint32_t ea=((pc + 2) & ~3) + (opcode & 0xff) * 4;
sprintf(buffer, "MOV.L @($%04X,PC),%s [%08X]", (opcode & 0xff) * 4, regname[Rn], ea);
return 0;
}
-static UINT32 op1110(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1110(char *buffer, uint32_t pc, uint16_t opcode)
{
sprintf(buffer, "MOV #$%02X,%s", (opcode & 0xff), regname[Rn]);
return 0;
}
-static UINT32 op1111(char *buffer, UINT32 pc, UINT16 opcode)
+static uint32_t op1111(char *buffer, uint32_t pc, uint16_t opcode)
{
switch (opcode & 0xf)
{
@@ -785,9 +785,9 @@ static UINT32 op1111(char *buffer, UINT32 pc, UINT16 opcode)
return 0;
}
-unsigned DasmSH4(char *buffer, unsigned pc, UINT16 opcode)
+unsigned DasmSH4(char *buffer, unsigned pc, uint16_t opcode)
{
- UINT32 flags;
+ uint32_t flags;
pc += 2;
diff --git a/src/devices/cpu/sh4/sh4dmac.cpp b/src/devices/cpu/sh4/sh4dmac.cpp
index bf4c773b1eb..c06ffb034dd 100644
--- a/src/devices/cpu/sh4/sh4dmac.cpp
+++ b/src/devices/cpu/sh4/sh4dmac.cpp
@@ -48,10 +48,10 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_dmac_callback )
}
}
-int sh34_base_device::sh4_dma_transfer(int channel, int timermode, UINT32 chcr, UINT32 *sar, UINT32 *dar, UINT32 *dmatcr)
+int sh34_base_device::sh4_dma_transfer(int channel, int timermode, uint32_t chcr, uint32_t *sar, uint32_t *dar, uint32_t *dmatcr)
{
int incs, incd, size;
- UINT32 src, dst, count;
+ uint32_t src, dst, count;
incd = (chcr & CHCR_DM) >> 14;
incs = (chcr & CHCR_SM) >> 12;
@@ -184,10 +184,10 @@ int sh34_base_device::sh4_dma_transfer(int channel, int timermode, UINT32 chcr,
return 1;
}
-int sh34_base_device::sh4_dma_transfer_device(int channel, UINT32 chcr, UINT32 *sar, UINT32 *dar, UINT32 *dmatcr)
+int sh34_base_device::sh4_dma_transfer_device(int channel, uint32_t chcr, uint32_t *sar, uint32_t *dar, uint32_t *dmatcr)
{
int incs, incd, size, mod;
- UINT32 src, dst, count;
+ uint32_t src, dst, count;
incd = (chcr & CHCR_DM) >> 14;
incs = (chcr & CHCR_SM) >> 12;
@@ -237,7 +237,7 @@ int sh34_base_device::sh4_dma_transfer_device(int channel, UINT32 chcr, UINT32 *
void sh34_base_device::sh4_dmac_check(int channel)
{
- UINT32 dmatcr, chcr, sar, dar;
+ uint32_t dmatcr, chcr, sar, dar;
switch (channel)
{
@@ -295,7 +295,7 @@ void sh34_base_device::sh4_dmac_check(int channel)
// called by drivers to transfer data in a cpu<->device dma. 'device' must be a SH4 cpu
int sh34_base_device::sh4_dma_data(struct sh4_device_dma *s)
{
- UINT32 pos, len, siz;
+ uint32_t pos, len, siz;
int channel = s->channel;
void *data = s->buffer;
@@ -315,38 +315,38 @@ int sh34_base_device::sh4_dma_data(struct sh4_device_dma *s)
case 8:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel] -= 8;
- *(UINT64 *)data = m_program->read_qword(m_dma_source[channel] & ~7);
+ *(uint64_t *)data = m_program->read_qword(m_dma_source[channel] & ~7);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel] += 8;
break;
case 1:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel]--;
- *(UINT8 *)data = m_program->read_byte(m_dma_source[channel]);
+ *(uint8_t *)data = m_program->read_byte(m_dma_source[channel]);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel]++;
break;
case 2:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel] -= 2;
- *(UINT16 *)data = m_program->read_word(m_dma_source[channel] & ~1);
+ *(uint16_t *)data = m_program->read_word(m_dma_source[channel] & ~1);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel] += 2;
break;
case 4:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel] -= 4;
- *(UINT32 *)data = m_program->read_dword(m_dma_source[channel] & ~3);
+ *(uint32_t *)data = m_program->read_dword(m_dma_source[channel] & ~3);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel] += 4;
break;
case 32:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel] -= 32;
- *(UINT64 *)data = m_program->read_qword(m_dma_source[channel] & ~31);
- *((UINT64 *)data+1) = m_program->read_qword((m_dma_source[channel] & ~31)+8);
- *((UINT64 *)data+2) = m_program->read_qword((m_dma_source[channel] & ~31)+16);
- *((UINT64 *)data+3) = m_program->read_qword((m_dma_source[channel] & ~31)+24);
+ *(uint64_t *)data = m_program->read_qword(m_dma_source[channel] & ~31);
+ *((uint64_t *)data+1) = m_program->read_qword((m_dma_source[channel] & ~31)+8);
+ *((uint64_t *)data+2) = m_program->read_qword((m_dma_source[channel] & ~31)+16);
+ *((uint64_t *)data+3) = m_program->read_qword((m_dma_source[channel] & ~31)+24);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel] += 32;
break;
@@ -373,38 +373,38 @@ int sh34_base_device::sh4_dma_data(struct sh4_device_dma *s)
case 8:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]-=8;
- m_program->write_qword(m_dma_destination[channel] & ~7, *(UINT64 *)data);
+ m_program->write_qword(m_dma_destination[channel] & ~7, *(uint64_t *)data);
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]+=8;
break;
case 1:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]--;
- m_program->write_byte(m_dma_destination[channel], *(UINT8 *)data);
+ m_program->write_byte(m_dma_destination[channel], *(uint8_t *)data);
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]++;
break;
case 2:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]-=2;
- m_program->write_word(m_dma_destination[channel] & ~1, *(UINT16 *)data);
+ m_program->write_word(m_dma_destination[channel] & ~1, *(uint16_t *)data);
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]+=2;
break;
case 4:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]-=4;
- m_program->write_dword(m_dma_destination[channel] & ~3, *(UINT32 *)data);
+ m_program->write_dword(m_dma_destination[channel] & ~3, *(uint32_t *)data);
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]+=4;
break;
case 32:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]-=32;
- m_program->write_qword(m_dma_destination[channel] & ~31, *(UINT64 *)data);
- m_program->write_qword((m_dma_destination[channel] & ~31)+8, *((UINT64 *)data+1));
- m_program->write_qword((m_dma_destination[channel] & ~31)+16, *((UINT64 *)data+2));
- m_program->write_qword((m_dma_destination[channel] & ~31)+24, *((UINT64 *)data+3));
+ m_program->write_qword(m_dma_destination[channel] & ~31, *(uint64_t *)data);
+ m_program->write_qword((m_dma_destination[channel] & ~31)+8, *((uint64_t *)data+1));
+ m_program->write_qword((m_dma_destination[channel] & ~31)+16, *((uint64_t *)data+2));
+ m_program->write_qword((m_dma_destination[channel] & ~31)+24, *((uint64_t *)data+3));
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]+=32;
break;
@@ -426,10 +426,10 @@ int sh34_base_device::sh4_dma_data(struct sh4_device_dma *s)
// called by drivers to transfer data in a DDT dma.
void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
{
- UINT32 chcr;
- UINT32 *p32bits;
- UINT64 *p32bytes;
- UINT32 pos,len,siz;
+ uint32_t chcr;
+ uint32_t *p32bits;
+ uint64_t *p32bytes;
+ uint32_t pos,len,siz;
if (m_cpu_type != CPU_TYPE_SH4)
fatalerror("sh4_dma_ddt uses m_m[] with SH3\n");
@@ -527,7 +527,7 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
if (s->size == 4) {
if ((s->direction) == 0) {
len = s->length;
- p32bits = (UINT32 *)(s->buffer);
+ p32bits = (uint32_t *)(s->buffer);
for (pos = 0;pos < len;pos++) {
*p32bits = m_program->read_dword(s->source);
p32bits++;
@@ -535,7 +535,7 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
}
} else {
len = s->length;
- p32bits = (UINT32 *)(s->buffer);
+ p32bits = (uint32_t *)(s->buffer);
for (pos = 0;pos < len;pos++) {
m_program->write_dword(s->destination, *p32bits);
p32bits++;
@@ -546,7 +546,7 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
if (s->size == 32) {
if ((s->direction) == 0) {
len = s->length * 4;
- p32bytes = (UINT64 *)(s->buffer);
+ p32bytes = (uint64_t *)(s->buffer);
for (pos = 0;pos < len;pos++) {
*p32bytes = m_program->read_qword(s->source);
p32bytes++;
@@ -554,7 +554,7 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
}
} else {
len = s->length * 4;
- p32bytes = (UINT64 *)(s->buffer);
+ p32bytes = (uint64_t *)(s->buffer);
for (pos = 0;pos < len;pos++) {
m_program->write_qword(s->destination, *p32bytes);
p32bytes++;
@@ -566,93 +566,93 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
}
- void sh34_base_device::sh4_handle_sar0_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_sar0_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_SAR0);
}
- void sh34_base_device::sh4_handle_sar1_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_sar1_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_SAR1);
}
- void sh34_base_device::sh4_handle_sar2_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_sar2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_SAR2);
}
- void sh34_base_device::sh4_handle_sar3_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_sar3_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_SAR3);
}
- void sh34_base_device::sh4_handle_dar0_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dar0_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_DAR0);
}
- void sh34_base_device::sh4_handle_dar1_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dar1_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_DAR1);
}
- void sh34_base_device::sh4_handle_dar2_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dar2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_DAR2);
}
- void sh34_base_device::sh4_handle_dar3_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dar3_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_DAR3);
}
- void sh34_base_device::sh4_handle_dmatcr0_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dmatcr0_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_DMATCR0);
}
- void sh34_base_device::sh4_handle_dmatcr1_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dmatcr1_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_DMATCR1);
}
- void sh34_base_device::sh4_handle_dmatcr2_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dmatcr2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_DMATCR2);
}
- void sh34_base_device::sh4_handle_dmatcr3_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dmatcr3_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_DMATCR3);
}
- void sh34_base_device::sh4_handle_chcr0_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_chcr0_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_CHCR0);
sh4_dmac_check(0);
}
- void sh34_base_device::sh4_handle_chcr1_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_chcr1_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_CHCR1);
sh4_dmac_check(1);
}
- void sh34_base_device::sh4_handle_chcr2_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_chcr2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_CHCR2);
sh4_dmac_check(2);
}
- void sh34_base_device::sh4_handle_chcr3_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_chcr3_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_CHCR3);
sh4_dmac_check(3);
}
- void sh34_base_device::sh4_handle_dmaor_addr_w(UINT32 data, UINT32 mem_mask)
+ void sh34_base_device::sh4_handle_dmaor_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old = m_SH4_DMAOR;
+ uint32_t old = m_SH4_DMAOR;
COMBINE_DATA(&m_SH4_DMAOR);
if ((m_SH4_DMAOR & DMAOR_AE) && (~old & DMAOR_AE))
diff --git a/src/devices/cpu/sh4/sh4dmac.h b/src/devices/cpu/sh4/sh4dmac.h
index fe0bbc84514..b7918fac997 100644
--- a/src/devices/cpu/sh4/sh4dmac.h
+++ b/src/devices/cpu/sh4/sh4dmac.h
@@ -27,37 +27,37 @@
#define DMAOR_NMIF 0x0002
#define DMAOR_DME 0x0001
-void sh4_handle_sar0_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_sar1_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_sar2_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_sar3_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dar0_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dar1_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dar2_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dar3_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dmatcr0_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dmatcr1_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dmatcr2_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dmatcr3_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_chcr0_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_chcr1_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_chcr2_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_chcr3_addr_w(UINT32 data, UINT32 mem_mask);
-void sh4_handle_dmaor_addr_w(UINT32 data, UINT32 mem_mask);
-UINT32 sh4_handle_sar0_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_sar1_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_sar2_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_sar3_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dar0_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dar1_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dar2_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dar3_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dmatcr0_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dmatcr1_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dmatcr2_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dmatcr3_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_chcr0_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_chcr1_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_chcr2_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_chcr3_addr_r(UINT32 mem_mask);
-UINT32 sh4_handle_dmaor_addr_r(UINT32 mem_mask);
+void sh4_handle_sar0_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_sar1_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_sar2_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_sar3_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dar0_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dar1_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dar2_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dar3_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dmatcr0_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dmatcr1_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dmatcr2_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dmatcr3_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_chcr0_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_chcr1_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_chcr2_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_chcr3_addr_w(uint32_t data, uint32_t mem_mask);
+void sh4_handle_dmaor_addr_w(uint32_t data, uint32_t mem_mask);
+uint32_t sh4_handle_sar0_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_sar1_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_sar2_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_sar3_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dar0_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dar1_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dar2_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dar3_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dmatcr0_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dmatcr1_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dmatcr2_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dmatcr3_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_chcr0_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_chcr1_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_chcr2_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_chcr3_addr_r(uint32_t mem_mask);
+uint32_t sh4_handle_dmaor_addr_r(uint32_t mem_mask);
diff --git a/src/devices/cpu/sh4/sh4tmu.cpp b/src/devices/cpu/sh4/sh4tmu.cpp
index 46044de0f09..4735b8bba67 100644
--- a/src/devices/cpu/sh4/sh4tmu.cpp
+++ b/src/devices/cpu/sh4/sh4tmu.cpp
@@ -16,25 +16,25 @@ static const int tcnt_div[8] = { 4, 16, 64, 256, 1024, 1, 1, 1 };
a (constant+1) where 0 <= constant < 2^32
-------------------------------------------------*/
-static inline attotime sh4_scale_up_mame_time(const attotime &_time1, UINT32 factor1)
+static inline attotime sh4_scale_up_mame_time(const attotime &_time1, uint32_t factor1)
{
return _time1 * factor1 + _time1;
}
-static UINT32 compute_ticks_timer(emu_timer *timer, int hertz, int divisor)
+static uint32_t compute_ticks_timer(emu_timer *timer, int hertz, int divisor)
{
double ret;
ret=((timer->remaining().as_double() * (double)hertz) / (double)divisor) - 1;
- return (UINT32)ret;
+ return (uint32_t)ret;
}
void sh34_base_device::sh4_timer_recompute(int which)
{
double ticks;
- UINT32 tcnt = 0;
- UINT32 tcr = 0;
+ uint32_t tcnt = 0;
+ uint32_t tcr = 0;
switch (which)
{
case 0:
@@ -126,7 +126,7 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_timer_callback )
}
-UINT32 sh34_base_device::sh4_handle_tcnt0_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcnt0_addr_r(uint32_t mem_mask)
{
if (m_SH4_TSTR & 1)
return compute_ticks_timer(m_timer[0], m_pm_clock, tcnt_div[m_SH4_TCR0 & 7]);
@@ -134,7 +134,7 @@ UINT32 sh34_base_device::sh4_handle_tcnt0_addr_r(UINT32 mem_mask)
return m_SH4_TCNT0;
}
-UINT32 sh34_base_device::sh4_handle_tcnt1_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcnt1_addr_r(uint32_t mem_mask)
{
if (m_SH4_TSTR & 2)
return compute_ticks_timer(m_timer[1], m_pm_clock, tcnt_div[m_SH4_TCR1 & 7]);
@@ -142,7 +142,7 @@ UINT32 sh34_base_device::sh4_handle_tcnt1_addr_r(UINT32 mem_mask)
return m_SH4_TCNT1;
}
-UINT32 sh34_base_device::sh4_handle_tcnt2_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcnt2_addr_r(uint32_t mem_mask)
{
if (m_SH4_TSTR & 4)
return compute_ticks_timer(m_timer[2], m_pm_clock, tcnt_div[m_SH4_TCR2 & 7]);
@@ -150,55 +150,55 @@ UINT32 sh34_base_device::sh4_handle_tcnt2_addr_r(UINT32 mem_mask)
return m_SH4_TCNT2;
}
-UINT32 sh34_base_device::sh4_handle_tcor0_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcor0_addr_r(uint32_t mem_mask)
{
return m_SH4_TCOR0;
}
-UINT32 sh34_base_device::sh4_handle_tcor1_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcor1_addr_r(uint32_t mem_mask)
{
return m_SH4_TCOR1;
}
-UINT32 sh34_base_device::sh4_handle_tcor2_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcor2_addr_r(uint32_t mem_mask)
{
return m_SH4_TCOR2;
}
-UINT32 sh34_base_device::sh4_handle_tcr0_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcr0_addr_r(uint32_t mem_mask)
{
return m_SH4_TCR0;
}
-UINT32 sh34_base_device::sh4_handle_tcr1_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcr1_addr_r(uint32_t mem_mask)
{
return m_SH4_TCR1;
}
-UINT32 sh34_base_device::sh4_handle_tcr2_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcr2_addr_r(uint32_t mem_mask)
{
return m_SH4_TCR2;
}
-UINT32 sh34_base_device::sh4_handle_tstr_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tstr_addr_r(uint32_t mem_mask)
{
return m_SH4_TSTR;
}
-UINT32 sh34_base_device::sh4_handle_tocr_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tocr_addr_r(uint32_t mem_mask)
{
return m_SH4_TOCR;
}
-UINT32 sh34_base_device::sh4_handle_tcpr2_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcpr2_addr_r(uint32_t mem_mask)
{
return m_SH4_TCPR2;
}
-void sh34_base_device::sh4_handle_tstr_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tstr_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old2 = m_SH4_TSTR;
+ uint32_t old2 = m_SH4_TSTR;
COMBINE_DATA(&m_SH4_TSTR);
if (old2 & 1)
@@ -223,9 +223,9 @@ void sh34_base_device::sh4_handle_tstr_addr_w(UINT32 data, UINT32 mem_mask)
sh4_timer_recompute(2);
}
-void sh34_base_device::sh4_handle_tcr0_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcr0_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old2 = m_SH4_TCR0;
+ uint32_t old2 = m_SH4_TCR0;
COMBINE_DATA(&m_SH4_TCR0);
if (m_SH4_TSTR & 1)
{
@@ -236,9 +236,9 @@ void sh34_base_device::sh4_handle_tcr0_addr_w(UINT32 data, UINT32 mem_mask)
sh4_exception_unrequest(SH4_INTC_TUNI0);
}
-void sh34_base_device::sh4_handle_tcr1_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcr1_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old2 = m_SH4_TCR1;
+ uint32_t old2 = m_SH4_TCR1;
COMBINE_DATA(&m_SH4_TCR1);
if (m_SH4_TSTR & 2)
{
@@ -249,9 +249,9 @@ void sh34_base_device::sh4_handle_tcr1_addr_w(UINT32 data, UINT32 mem_mask)
sh4_exception_unrequest(SH4_INTC_TUNI1);
}
-void sh34_base_device::sh4_handle_tcr2_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcr2_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old2 = m_SH4_TCR2;
+ uint32_t old2 = m_SH4_TCR2;
COMBINE_DATA(&m_SH4_TCR2);
if (m_SH4_TSTR & 4)
{
@@ -262,7 +262,7 @@ void sh34_base_device::sh4_handle_tcr2_addr_w(UINT32 data, UINT32 mem_mask)
sh4_exception_unrequest(SH4_INTC_TUNI2);
}
-void sh34_base_device::sh4_handle_tcor0_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcor0_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCOR0);
if (m_SH4_TSTR & 1)
@@ -272,7 +272,7 @@ void sh34_base_device::sh4_handle_tcor0_addr_w(UINT32 data, UINT32 mem_mask)
}
}
-void sh34_base_device::sh4_handle_tcor1_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcor1_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCOR1);
if (m_SH4_TSTR & 2)
@@ -282,7 +282,7 @@ void sh34_base_device::sh4_handle_tcor1_addr_w(UINT32 data, UINT32 mem_mask)
}
}
-void sh34_base_device::sh4_handle_tcor2_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcor2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCOR2);
if (m_SH4_TSTR & 4)
@@ -292,33 +292,33 @@ void sh34_base_device::sh4_handle_tcor2_addr_w(UINT32 data, UINT32 mem_mask)
}
}
-void sh34_base_device::sh4_handle_tcnt0_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcnt0_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCNT0);
if (m_SH4_TSTR & 1)
sh4_timer_recompute(0);
}
-void sh34_base_device::sh4_handle_tcnt1_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcnt1_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCNT1);
if (m_SH4_TSTR & 2)
sh4_timer_recompute(1);
}
-void sh34_base_device::sh4_handle_tcnt2_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcnt2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCNT2);
if (m_SH4_TSTR & 4)
sh4_timer_recompute(2);
}
-void sh34_base_device::sh4_handle_tocr_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tocr_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TOCR);
}
-void sh34_base_device::sh4_handle_tcpr2_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcpr2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCPR2);
}
diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx
index 852c739ed46..ddea8a2f265 100644
--- a/src/devices/cpu/sharc/compute.hxx
+++ b/src/devices/cpu/sharc/compute.hxx
@@ -8,9 +8,9 @@
#define SET_FLAG_AZ(r) { m_core->astat |= (((r) == 0) ? AZ : 0); }
#define SET_FLAG_AN(r) { m_core->astat |= (((r) & 0x80000000) ? AN : 0); }
-#define SET_FLAG_AC_ADD(r,a,b) { m_core->astat |= (((UINT32)r < (UINT32)a) ? AC : 0); }
+#define SET_FLAG_AC_ADD(r,a,b) { m_core->astat |= (((uint32_t)r < (uint32_t)a) ? AC : 0); }
#define SET_FLAG_AV_ADD(r,a,b) { m_core->astat |= (((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); }
-#define SET_FLAG_AC_SUB(r,a,b) { m_core->astat |= ((!((UINT32)a < (UINT32)b)) ? AC : 0); }
+#define SET_FLAG_AC_SUB(r,a,b) { m_core->astat |= ((!((uint32_t)a < (uint32_t)b)) ? AC : 0); }
#define SET_FLAG_AV_SUB(r,a,b) { m_core->astat |= ((( ((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); }
#define IS_FLOAT_ZERO(r) ((((r) & 0x7fffffff) == 0))
@@ -21,10 +21,10 @@
#define CLEAR_MULTIPLIER_FLAGS() (m_core->astat &= ~(MN|MV|MU|MI))
#define SET_FLAG_MN(r) { m_core->astat |= (((r) & 0x80000000) ? MN : 0); }
-#define SET_FLAG_MV(r) { m_core->astat |= ((((UINT32)((r) >> 32) != 0) && ((UINT32)((r) >> 32) != 0xffffffff)) ? MV : 0); }
+#define SET_FLAG_MV(r) { m_core->astat |= ((((uint32_t)((r) >> 32) != 0) && ((uint32_t)((r) >> 32) != 0xffffffff)) ? MV : 0); }
/* TODO: MU needs 80-bit result */
-#define SET_FLAG_MU(r) { m_core->astat |= ((((UINT32)((r) >> 32) == 0) && ((UINT32)(r)) != 0) ? MU : 0); }
+#define SET_FLAG_MU(r) { m_core->astat |= ((((uint32_t)((r) >> 32) == 0) && ((uint32_t)(r)) != 0) ? MU : 0); }
#define FLOAT_SIGN 0x80000000
@@ -34,7 +34,7 @@
/*****************************************************************************/
// Mantissa lookup-table for RECIPS opcode
-static const UINT32 recips_mantissa_lookup[128] =
+static const uint32_t recips_mantissa_lookup[128] =
{
0x007F8000, 0x007E0000, 0x007C0000, 0x007A0000,
0x00780000, 0x00760000, 0x00740000, 0x00720000,
@@ -71,7 +71,7 @@ static const UINT32 recips_mantissa_lookup[128] =
};
// Mantissa lookup-table for RSQRTS opcode
-static const UINT32 rsqrts_mantissa_lookup[128] =
+static const uint32_t rsqrts_mantissa_lookup[128] =
{
0x00350000, 0x00330000, 0x00320000, 0x00300000,
0x002F0000, 0x002E0000, 0x002D0000, 0x002B0000,
@@ -113,7 +113,7 @@ static const UINT32 rsqrts_mantissa_lookup[128] =
/* Rn = Rx + Ry */
void adsp21062_device::compute_add(int rn, int rx, int ry)
{
- UINT32 r = REG(rx) + REG(ry);
+ uint32_t r = REG(rx) + REG(ry);
if (m_core->mode1 & MODE1_ALUSAT)
fatalerror("SHARC: compute_add: ALU saturation not implemented!\n");
@@ -131,7 +131,7 @@ void adsp21062_device::compute_add(int rn, int rx, int ry)
/* Rn = Rx - Ry */
void adsp21062_device::compute_sub(int rn, int rx, int ry)
{
- UINT32 r = REG(rx) - REG(ry);
+ uint32_t r = REG(rx) - REG(ry);
if (m_core->mode1 & MODE1_ALUSAT)
fatalerror("SHARC: compute_sub: ALU saturation not implemented!\n");
@@ -150,7 +150,7 @@ void adsp21062_device::compute_sub(int rn, int rx, int ry)
void adsp21062_device::compute_add_ci(int rn, int rx, int ry)
{
int c = (m_core->astat & AC) ? 1 : 0;
- UINT32 r = REG(rx) + REG(ry) + c;
+ uint32_t r = REG(rx) + REG(ry) + c;
if (m_core->mode1 & MODE1_ALUSAT)
fatalerror("SHARC: compute_add_ci: ALU saturation not implemented!\n");
@@ -169,7 +169,7 @@ void adsp21062_device::compute_add_ci(int rn, int rx, int ry)
void adsp21062_device::compute_sub_ci(int rn, int rx, int ry)
{
int c = (m_core->astat & AC) ? 1 : 0;
- UINT32 r = REG(rx) - REG(ry) + c - 1;
+ uint32_t r = REG(rx) - REG(ry) + c - 1;
if (m_core->mode1 & MODE1_ALUSAT)
fatalerror("SHARC: compute_sub_ci: ALU saturation not implemented!\n");
@@ -187,7 +187,7 @@ void adsp21062_device::compute_sub_ci(int rn, int rx, int ry)
/* Rn = Rx AND Ry */
void adsp21062_device::compute_and(int rn, int rx, int ry)
{
- UINT32 r = REG(rx) & REG(ry);
+ uint32_t r = REG(rx) & REG(ry);
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
@@ -200,12 +200,12 @@ void adsp21062_device::compute_and(int rn, int rx, int ry)
/* COMP(Rx, Ry) */
void adsp21062_device::compute_comp(int rx, int ry)
{
- UINT32 comp_accum;
+ uint32_t comp_accum;
CLEAR_ALU_FLAGS();
if( REG(rx) == REG(ry) )
m_core->astat |= AZ;
- if( (INT32)REG(rx) < (INT32)REG(ry) )
+ if( (int32_t)REG(rx) < (int32_t)REG(ry) )
m_core->astat |= AN;
// Update ASTAT compare accumulation register
@@ -239,7 +239,7 @@ void adsp21062_device::compute_pass(int rn, int rx)
/* Rn = Rx XOR Ry */
void adsp21062_device::compute_xor(int rn, int rx, int ry)
{
- UINT32 r = REG(rx) ^ REG(ry);
+ uint32_t r = REG(rx) ^ REG(ry);
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
SET_FLAG_AZ(r);
@@ -251,7 +251,7 @@ void adsp21062_device::compute_xor(int rn, int rx, int ry)
/* Rn = Rx OR Ry */
void adsp21062_device::compute_or(int rn, int rx, int ry)
{
- UINT32 r = REG(rx) | REG(ry);
+ uint32_t r = REG(rx) | REG(ry);
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
SET_FLAG_AZ(r);
@@ -263,7 +263,7 @@ void adsp21062_device::compute_or(int rn, int rx, int ry)
/* Rn = Rx + 1 */
void adsp21062_device::compute_inc(int rn, int rx)
{
- UINT32 r = REG(rx) + 1;
+ uint32_t r = REG(rx) + 1;
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
@@ -279,7 +279,7 @@ void adsp21062_device::compute_inc(int rn, int rx)
/* Rn = Rx - 1 */
void adsp21062_device::compute_dec(int rn, int rx)
{
- UINT32 r = REG(rx) - 1;
+ uint32_t r = REG(rx) - 1;
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
@@ -295,7 +295,7 @@ void adsp21062_device::compute_dec(int rn, int rx)
/* Rn = MIN(Rx, Ry) */
void adsp21062_device::compute_min(int rn, int rx, int ry)
{
- UINT32 r = std::min((INT32)REG(rx), (INT32)REG(ry));
+ uint32_t r = std::min((int32_t)REG(rx), (int32_t)REG(ry));
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
@@ -309,7 +309,7 @@ void adsp21062_device::compute_min(int rn, int rx, int ry)
/* Rn = MAX(Rx, Ry) */
void adsp21062_device::compute_max(int rn, int rx, int ry)
{
- UINT32 r = std::max((INT32)REG(rx), (INT32)REG(ry));
+ uint32_t r = std::max((int32_t)REG(rx), (int32_t)REG(ry));
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
@@ -323,7 +323,7 @@ void adsp21062_device::compute_max(int rn, int rx, int ry)
/* Rn = -Rx */
void adsp21062_device::compute_neg(int rn, int rx)
{
- UINT32 r = -(INT32)(REG(rx));
+ uint32_t r = -(int32_t)(REG(rx));
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
@@ -339,7 +339,7 @@ void adsp21062_device::compute_neg(int rn, int rx)
/* Rn = NOT Rx */
void adsp21062_device::compute_not(int rn, int rx)
{
- UINT32 r = ~REG(rx);
+ uint32_t r = ~REG(rx);
CLEAR_ALU_FLAGS();
SET_FLAG_AN(r);
@@ -353,13 +353,13 @@ void adsp21062_device::compute_not(int rn, int rx)
/*****************************************************************************/
/* Floating-point ALU operations */
-UINT32 adsp21062_device::SCALB(SHARC_REG rx, int ry)
+uint32_t adsp21062_device::SCALB(SHARC_REG rx, int ry)
{
- UINT32 mantissa = rx.r & FLOAT_MANTISSA;
- UINT32 sign = rx.r & FLOAT_SIGN;
+ uint32_t mantissa = rx.r & FLOAT_MANTISSA;
+ uint32_t sign = rx.r & FLOAT_SIGN;
int exponent = ((rx.r >> 23) & 0xff) - 127;
- exponent += (INT32)(REG(ry));
+ exponent += (int32_t)(REG(ry));
if (exponent > 127)
{
@@ -383,7 +383,7 @@ UINT32 adsp21062_device::SCALB(SHARC_REG rx, int ry)
void adsp21062_device::compute_float(int rn, int rx)
{
// verified
- FREG(rn) = (float)(INT32)REG(rx);
+ FREG(rn) = (float)(int32_t)REG(rx);
CLEAR_ALU_FLAGS();
// AN
@@ -400,17 +400,17 @@ void adsp21062_device::compute_float(int rn, int rx)
/* Rn = FIX Fx */
void adsp21062_device::compute_fix(int rn, int rx)
{
- INT32 alu_i;
+ int32_t alu_i;
SHARC_REG r_alu;
r_alu.f = FREG(rx);
if (m_core->mode1 & MODE1_TRUNCATE)
{
- alu_i = (INT32)(r_alu.f);
+ alu_i = (int32_t)(r_alu.f);
}
else
{
- alu_i = (INT32)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
+ alu_i = (int32_t)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
}
CLEAR_ALU_FLAGS();
@@ -430,17 +430,17 @@ void adsp21062_device::compute_fix(int rn, int rx)
/* Rn = FIX Fx BY Ry */
void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry)
{
- INT32 alu_i;
+ int32_t alu_i;
SHARC_REG r_alu;
r_alu.r = SCALB(m_core->r[rx], ry);
if (m_core->mode1 & MODE1_TRUNCATE)
{
- alu_i = (INT32)(r_alu.f);
+ alu_i = (int32_t)(r_alu.f);
}
else
{
- alu_i = (INT32)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
+ alu_i = (int32_t)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
}
CLEAR_ALU_FLAGS();
@@ -461,7 +461,7 @@ void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry)
void adsp21062_device::compute_float_scaled(int rn, int rx, int ry)
{
SHARC_REG x;
- x.f = (float)(INT32)(REG(rx));
+ x.f = (float)(int32_t)(REG(rx));
// verified
CLEAR_ALU_FLAGS();
@@ -482,7 +482,7 @@ void adsp21062_device::compute_float_scaled(int rn, int rx, int ry)
void adsp21062_device::compute_logb(int rn, int rx)
{
// verified
- UINT32 r = REG(rx);
+ uint32_t r = REG(rx);
CLEAR_ALU_FLAGS();
@@ -645,7 +645,7 @@ void adsp21062_device::compute_fneg(int rn, int rx)
/* COMP(Fx, Fy) */
void adsp21062_device::compute_fcomp(int rx, int ry)
{
- UINT32 comp_accum;
+ uint32_t comp_accum;
CLEAR_ALU_FLAGS();
// AZ
@@ -775,7 +775,7 @@ void adsp21062_device::compute_fclip(int rn, int rx, int ry)
void adsp21062_device::compute_recips(int rn, int rx)
{
// verified
- UINT32 r;
+ uint32_t r;
CLEAR_ALU_FLAGS();
@@ -799,11 +799,11 @@ void adsp21062_device::compute_recips(int rn, int rx)
}
else
{
- UINT32 mantissa = REG(rx) & 0x7fffff;
- UINT32 exponent = (REG(rx) >> 23) & 0xff;
- UINT32 sign = REG(rx) & FLOAT_SIGN;
+ uint32_t mantissa = REG(rx) & 0x7fffff;
+ uint32_t exponent = (REG(rx) >> 23) & 0xff;
+ uint32_t sign = REG(rx) & FLOAT_SIGN;
- UINT32 res_mantissa = recips_mantissa_lookup[mantissa >> 16];
+ uint32_t res_mantissa = recips_mantissa_lookup[mantissa >> 16];
int res_exponent = -(exponent - 127) - 1;
if (res_exponent > 125 || res_exponent < -126)
@@ -839,9 +839,9 @@ void adsp21062_device::compute_recips(int rn, int rx)
void adsp21062_device::compute_rsqrts(int rn, int rx)
{
// verified
- UINT32 r;
+ uint32_t r;
- if ((UINT32)(REG(rx)) > 0x80000000)
+ if ((uint32_t)(REG(rx)) > 0x80000000)
{
// non-zero negative
r = 0xffffffff;
@@ -853,11 +853,11 @@ void adsp21062_device::compute_rsqrts(int rn, int rx)
}
else
{
- UINT32 mantissa = REG(rx) & 0xffffff; // mantissa + LSB of biased exponent
- UINT32 exponent = (REG(rx) >> 23) & 0xff;
- UINT32 sign = REG(rx) & FLOAT_SIGN;
+ uint32_t mantissa = REG(rx) & 0xffffff; // mantissa + LSB of biased exponent
+ uint32_t exponent = (REG(rx) >> 23) & 0xff;
+ uint32_t sign = REG(rx) & FLOAT_SIGN;
- UINT32 res_mantissa = rsqrts_mantissa_lookup[mantissa >> 17];
+ uint32_t res_mantissa = rsqrts_mantissa_lookup[mantissa >> 17];
int res_exponent = -((exponent - 127) / 2) - 1;
res_exponent = (res_exponent + 127) & 0xff;
@@ -924,53 +924,53 @@ void adsp21062_device::compute_fabs(int rn, int rx)
/* Rn = (unsigned)Rx * (unsigned)Ry, integer, no rounding */
void adsp21062_device::compute_mul_uuin(int rn, int rx, int ry)
{
- UINT64 r = (UINT64)(UINT32)REG(rx) * (UINT64)(UINT32)REG(ry);
+ uint64_t r = (uint64_t)(uint32_t)REG(rx) * (uint64_t)(uint32_t)REG(ry);
CLEAR_MULTIPLIER_FLAGS();
- SET_FLAG_MN((UINT32)r);
+ SET_FLAG_MN((uint32_t)r);
SET_FLAG_MV(r);
SET_FLAG_MU(r);
- REG(rn) = (UINT32)(r);
+ REG(rn) = (uint32_t)(r);
}
/* Rn = (signed)Rx * (signed)Ry, integer, no rounding */
void adsp21062_device::compute_mul_ssin(int rn, int rx, int ry)
{
- UINT64 r = (INT64)(INT32)REG(rx) * (INT64)(INT32)REG(ry);
+ uint64_t r = (int64_t)(int32_t)REG(rx) * (int64_t)(int32_t)REG(ry);
CLEAR_MULTIPLIER_FLAGS();
- SET_FLAG_MN((UINT32)r);
+ SET_FLAG_MN((uint32_t)r);
SET_FLAG_MV(r);
SET_FLAG_MU(r);
- REG(rn) = (UINT32)(r);
+ REG(rn) = (uint32_t)(r);
}
/* MRF + (signed)Rx * (signed)Ry, integer, no rounding */
-UINT32 adsp21062_device::compute_mrf_plus_mul_ssin(int rx, int ry)
+uint32_t adsp21062_device::compute_mrf_plus_mul_ssin(int rx, int ry)
{
- UINT64 r = m_core->mrf + ((INT64)(INT32)REG(rx) * (INT64)(INT32)REG(ry));
+ uint64_t r = m_core->mrf + ((int64_t)(int32_t)REG(rx) * (int64_t)(int32_t)REG(ry));
CLEAR_MULTIPLIER_FLAGS();
- SET_FLAG_MN((UINT32)r);
+ SET_FLAG_MN((uint32_t)r);
SET_FLAG_MV(r);
SET_FLAG_MU(r);
- return (UINT32)(r);
+ return (uint32_t)(r);
}
/* MRB + (signed)Rx * (signed)Ry, integer, no rounding */
-UINT32 adsp21062_device::compute_mrb_plus_mul_ssin(int rx, int ry)
+uint32_t adsp21062_device::compute_mrb_plus_mul_ssin(int rx, int ry)
{
- INT64 r = m_core->mrb + ((INT64)(INT32)REG(rx) * (INT64)(INT32)REG(ry));
+ int64_t r = m_core->mrb + ((int64_t)(int32_t)REG(rx) * (int64_t)(int32_t)REG(ry));
CLEAR_MULTIPLIER_FLAGS();
- SET_FLAG_MN((UINT32)r);
+ SET_FLAG_MN((uint32_t)r);
SET_FLAG_MV(r);
SET_FLAG_MU(r);
- return (UINT32)(r);
+ return (uint32_t)(r);
}
/* Fn = Fx * Fy */
@@ -994,11 +994,11 @@ void adsp21062_device::compute_multi_mr_to_reg(int ai, int rk)
{
switch(ai)
{
- case 0: SET_UREG(rk, (UINT32)(m_core->mrf)); break;
- case 1: SET_UREG(rk, (UINT32)(m_core->mrf >> 32)); break;
+ case 0: SET_UREG(rk, (uint32_t)(m_core->mrf)); break;
+ case 1: SET_UREG(rk, (uint32_t)(m_core->mrf >> 32)); break;
case 2: fatalerror("SHARC: tried to load MR2F\n"); break;
- case 4: SET_UREG(rk, (UINT32)(m_core->mrb)); break;
- case 5: SET_UREG(rk, (UINT32)(m_core->mrb >> 32)); break;
+ case 4: SET_UREG(rk, (uint32_t)(m_core->mrb)); break;
+ case 5: SET_UREG(rk, (uint32_t)(m_core->mrb >> 32)); break;
case 6: fatalerror("SHARC: tried to load MR2B\n"); break;
default: fatalerror("SHARC: unknown ai %d in mr_to_reg\n", ai);
}
@@ -1011,10 +1011,10 @@ void adsp21062_device::compute_multi_reg_to_mr(int ai, int rk)
switch(ai)
{
case 0: m_core->mrf &= ~0xffffffff; m_core->mrf |= GET_UREG(rk); break;
- case 1: m_core->mrf &= 0xffffffff; m_core->mrf |= (UINT64)(GET_UREG(rk)) << 32; break;
+ case 1: m_core->mrf &= 0xffffffff; m_core->mrf |= (uint64_t)(GET_UREG(rk)) << 32; break;
case 2: fatalerror("SHARC: tried to write MR2F\n"); break;
case 4: m_core->mrb &= ~0xffffffff; m_core->mrb |= GET_UREG(rk); break;
- case 5: m_core->mrb &= 0xffffffff; m_core->mrb |= (UINT64)(GET_UREG(rk)) << 32; break;
+ case 5: m_core->mrb &= 0xffffffff; m_core->mrb |= (uint64_t)(GET_UREG(rk)) << 32; break;
case 6: fatalerror("SHARC: tried to write MR2B\n"); break;
default: fatalerror("SHARC: unknown ai %d in reg_to_mr\n", ai);
}
@@ -1025,8 +1025,8 @@ void adsp21062_device::compute_multi_reg_to_mr(int ai, int rk)
/* Ra = Rx + Ry, Rs = Rx - Ry */
void adsp21062_device::compute_dual_add_sub(int ra, int rs, int rx, int ry)
{
- UINT32 r_add = REG(rx) + REG(ry);
- UINT32 r_sub = REG(rx) - REG(ry);
+ uint32_t r_add = REG(rx) + REG(ry);
+ uint32_t r_sub = REG(rx) - REG(ry);
CLEAR_ALU_FLAGS();
if (r_add == 0 || r_sub == 0)
@@ -1042,8 +1042,8 @@ void adsp21062_device::compute_dual_add_sub(int ra, int rs, int rx, int ry)
{
m_core->astat |= AV;
}
- if (((UINT32)r_add < (UINT32)REG(rx)) ||
- (!((UINT32)r_sub < (UINT32)REG(rx))))
+ if (((uint32_t)r_add < (uint32_t)REG(rx)) ||
+ (!((uint32_t)r_sub < (uint32_t)REG(rx))))
{
m_core->astat |= AC;
}
@@ -1057,8 +1057,8 @@ void adsp21062_device::compute_dual_add_sub(int ra, int rs, int rx, int ry)
/* Rm = (signed)Rxm * (signed)Rym, fractional, rounding, Ra = Rxa + Rya */
void adsp21062_device::compute_mul_ssfr_add(int rm, int rxm, int rym, int ra, int rxa, int rya)
{
- UINT32 r_mul = (UINT32)(((INT64)(REG(rxm)) * (INT64)(REG(rym))) >> 31);
- UINT32 r_add = REG(rxa) + REG(rya);
+ uint32_t r_mul = (uint32_t)(((int64_t)(REG(rxm)) * (int64_t)(REG(rym))) >> 31);
+ uint32_t r_add = REG(rxa) + REG(rya);
CLEAR_MULTIPLIER_FLAGS();
SET_FLAG_MN(r_mul);
@@ -1082,8 +1082,8 @@ void adsp21062_device::compute_mul_ssfr_add(int rm, int rxm, int rym, int ra, in
/* Rm = (signed)Rxm * (signed)Rym, fractional, rounding, Ra = Rxa - Rya */
void adsp21062_device::compute_mul_ssfr_sub(int rm, int rxm, int rym, int ra, int rxa, int rya)
{
- UINT32 r_mul = (UINT32)(((INT64)(REG(rxm)) * (INT64)(REG(rym))) >> 31);
- UINT32 r_sub = REG(rxa) - REG(rya);
+ uint32_t r_mul = (uint32_t)(((int64_t)(REG(rxm)) * (int64_t)(REG(rym))) >> 31);
+ uint32_t r_sub = REG(rxa) - REG(rya);
CLEAR_MULTIPLIER_FLAGS();
SET_FLAG_MN(r_mul);
@@ -1203,7 +1203,7 @@ void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int f
SHARC_REG r_mul, r_alu;
r_mul.f = FREG(fxm) * FREG(fym);
- x.f = (float)(INT32)REG(fxa);
+ x.f = (float)(int32_t)REG(fxa);
r_alu.r = SCALB(x, fya);
@@ -1229,7 +1229,7 @@ void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int f
/* Fm = Fxm * Fym, Fa = FIX Fxa BY Fya */
void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa, int fxa, int fya)
{
- INT32 alu_i;
+ int32_t alu_i;
SHARC_REG r_mul, r_alu;
r_mul.f = FREG(fxm) * FREG(fym);
@@ -1237,11 +1237,11 @@ void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa,
if (m_core->mode1 & MODE1_TRUNCATE)
{
- alu_i = (INT32)(r_alu.f);
+ alu_i = (int32_t)(r_alu.f);
}
else
{
- alu_i = (INT32)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
+ alu_i = (int32_t)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
}
CLEAR_MULTIPLIER_FLAGS();
@@ -1267,7 +1267,7 @@ void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa,
void adsp21062_device::compute_fmul_avg(int fm, int fxm, int fym, int fa, int fxa, int fya)
{
- INT32 alu_i;
+ int32_t alu_i;
SHARC_REG r_mul, r_alu;
r_mul.f = FREG(fxm) * FREG(fym);
r_alu.f = (FREG(fxa) * FREG(fya))/((float) 2.0);
@@ -1275,11 +1275,11 @@ void adsp21062_device::compute_fmul_avg(int fm, int fxm, int fym, int fa, int fx
/* TODO: are flags right for this? */
if (m_core->mode1 & MODE1_TRUNCATE)
{
- alu_i = (INT32)(r_alu.f);
+ alu_i = (int32_t)(r_alu.f);
}
else
{
- alu_i = (INT32)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
+ alu_i = (int32_t)(r_alu.f < 0 ? (r_alu.f - 0.5f) : (r_alu.f + 0.5f));
}
CLEAR_MULTIPLIER_FLAGS();
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp
index 00e28dfafc7..228acd8c61a 100644
--- a/src/devices/cpu/sharc/sharc.cpp
+++ b/src/devices/cpu/sharc/sharc.cpp
@@ -53,9 +53,9 @@ enum
};
-#define ROPCODE(pc) ((UINT64)(m_internal_ram[((pc-0x20000) * 3) + 0]) << 32) | \
- ((UINT64)(m_internal_ram[((pc-0x20000) * 3) + 1]) << 16) | \
- ((UINT64)(m_internal_ram[((pc-0x20000) * 3) + 2]) << 0)
+#define ROPCODE(pc) ((uint64_t)(m_internal_ram[((pc-0x20000) * 3) + 0]) << 32) | \
+ ((uint64_t)(m_internal_ram[((pc-0x20000) * 3) + 1]) << 16) | \
+ ((uint64_t)(m_internal_ram[((pc-0x20000) * 3) + 2]) << 0)
const device_type ADSP21062 = &device_creator<adsp21062_device>;
@@ -67,7 +67,7 @@ static ADDRESS_MAP_START( internal_pgm, AS_PROGRAM, 64, adsp21062_device )
ADDRESS_MAP_END
-adsp21062_device::adsp21062_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+adsp21062_device::adsp21062_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, ADSP21062, "ADSP21062", tag, owner, clock, "adsp21062", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 64, 24, -3, ADDRESS_MAP_NAME(internal_pgm))
, m_data_config("data", ENDIANNESS_LITTLE, 32, 32, -2)
@@ -80,7 +80,7 @@ adsp21062_device::adsp21062_device(const machine_config &mconfig, const char *ta
}
-offs_t adsp21062_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t adsp21062_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( sharc );
return CPU_DISASSEMBLE_NAME(sharc)(this, buffer, pc, oprom, opram, options);
@@ -92,7 +92,7 @@ void adsp21062_device::enable_recompiler()
}
-void adsp21062_device::CHANGE_PC(UINT32 newpc)
+void adsp21062_device::CHANGE_PC(uint32_t newpc)
{
m_core->pc = newpc;
m_core->daddr = newpc;
@@ -100,7 +100,7 @@ void adsp21062_device::CHANGE_PC(UINT32 newpc)
m_core->nfaddr = newpc+2;
}
-void adsp21062_device::CHANGE_PC_DELAYED(UINT32 newpc)
+void adsp21062_device::CHANGE_PC_DELAYED(uint32_t newpc)
{
m_core->nfaddr = newpc;
@@ -136,7 +136,7 @@ TIMER_CALLBACK_MEMBER(adsp21062_device::sharc_iop_delayed_write_callback)
m_core->delayed_iop_timer->adjust(attotime::never, 0);
}
-void adsp21062_device::sharc_iop_delayed_w(UINT32 reg, UINT32 data, int cycles)
+void adsp21062_device::sharc_iop_delayed_w(uint32_t reg, uint32_t data, int cycles)
{
m_core->iop_delayed_reg = reg;
m_core->iop_delayed_data = data;
@@ -146,7 +146,7 @@ void adsp21062_device::sharc_iop_delayed_w(UINT32 reg, UINT32 data, int cycles)
/* IOP registers */
-UINT32 adsp21062_device::sharc_iop_r(UINT32 address)
+uint32_t adsp21062_device::sharc_iop_r(uint32_t address)
{
switch (address)
{
@@ -160,7 +160,7 @@ UINT32 adsp21062_device::sharc_iop_r(UINT32 address)
}
}
-void adsp21062_device::sharc_iop_w(UINT32 address, UINT32 data)
+void adsp21062_device::sharc_iop_w(uint32_t address, uint32_t data)
{
switch (address)
{
@@ -175,10 +175,10 @@ void adsp21062_device::sharc_iop_w(UINT32 address, UINT32 data)
m_core->extdma_shift = 0;
#if 0
- UINT64 r = pm_read48(m_core->dma[6].int_index);
+ uint64_t r = pm_read48(m_core->dma[6].int_index);
- r &= ~((UINT64)(0xffff) << (m_core->extdma_shift*16));
- r |= ((UINT64)data & 0xffff) << (m_core->extdma_shift*16);
+ r &= ~((uint64_t)(0xffff) << (m_core->extdma_shift*16));
+ r |= ((uint64_t)data & 0xffff) << (m_core->extdma_shift*16);
pm_write48(m_core->dma[6].int_index, r);
@@ -264,7 +264,7 @@ void adsp21062_device::build_opcode_table()
for (i=0; i < 512; i++)
{
- UINT16 op = i << 7;
+ uint16_t op = i << 7;
for (j=0; j < num_ops; j++)
{
@@ -285,7 +285,7 @@ void adsp21062_device::build_opcode_table()
/*****************************************************************************/
-void adsp21062_device::external_iop_write(UINT32 address, UINT32 data)
+void adsp21062_device::external_iop_write(uint32_t address, uint32_t data)
{
if (address == 0x1c)
{
@@ -301,7 +301,7 @@ void adsp21062_device::external_iop_write(UINT32 address, UINT32 data)
}
}
-void adsp21062_device::external_dma_write(UINT32 address, UINT64 data)
+void adsp21062_device::external_dma_write(uint32_t address, uint64_t data)
{
/*
All addresses in the 17-bit index registers are offset by 0x0002 0000, the
@@ -313,9 +313,9 @@ void adsp21062_device::external_dma_write(UINT32 address, UINT64 data)
case 2: // 16/48 packing
{
int shift = address % 3;
- UINT64 r = pm_read48((m_core->dma[6].int_index & 0x1ffff) | 0x20000);
+ uint64_t r = pm_read48((m_core->dma[6].int_index & 0x1ffff) | 0x20000);
- r &= ~((UINT64)(0xffff) << (shift*16));
+ r &= ~((uint64_t)(0xffff) << (shift*16));
r |= (data & 0xffff) << (shift*16);
pm_write48((m_core->dma[6].int_index & 0x1ffff) | 0x20000, r);
@@ -350,7 +350,7 @@ void adsp21062_device::device_start()
m_internal_ram_block1 = &m_internal_ram[0x20000/2];
// init UML generator
- UINT32 umlflags = 0;
+ uint32_t umlflags = 0;
m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, umlflags, 1, 24, 0);
// add UML symbols
@@ -767,7 +767,7 @@ void adsp21062_device::device_start()
void adsp21062_device::device_reset()
{
- memset(m_internal_ram, 0, 2 * 0x10000 * sizeof(UINT16));
+ memset(m_internal_ram, 0, 2 * 0x10000 * sizeof(uint16_t));
switch(m_boot_mode)
{
@@ -945,7 +945,7 @@ void adsp21062_device::execute_run()
int condition = m_core->laddr.code;
{
- UINT32 looptop = TOP_PC();
+ uint32_t looptop = TOP_PC();
if (m_core->pc - looptop > 2)
{
m_core->astat = m_core->astat_old_old_old;
@@ -1012,7 +1012,7 @@ void adsp21062_device::execute_run()
}
}
-bool adsp21062_device::memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value)
+bool adsp21062_device::memory_read(address_spacenum spacenum, offs_t offset, int size, uint64_t &value)
{
if (spacenum == AS_PROGRAM)
{
@@ -1075,25 +1075,25 @@ bool adsp21062_device::memory_read(address_spacenum spacenum, offs_t offset, int
return true;
}
-bool adsp21062_device::memory_readop(offs_t offset, int size, UINT64 &value)
+bool adsp21062_device::memory_readop(offs_t offset, int size, uint64_t &value)
{
- UINT64 mask = (size < 8) ? (((UINT64)1 << (8 * size)) - 1) : ~(UINT64)0;
+ uint64_t mask = (size < 8) ? (((uint64_t)1 << (8 * size)) - 1) : ~(uint64_t)0;
int shift = 8 * (offset & 7);
offset >>= 3;
if (offset >= 0x20000 && offset < 0x28000)
{
- UINT64 op = ((UINT64)(m_internal_ram_block0[((offset-0x20000) * 3) + 0]) << 32) |
- ((UINT64)(m_internal_ram_block0[((offset-0x20000) * 3) + 1]) << 16) |
- ((UINT64)(m_internal_ram_block0[((offset-0x20000) * 3) + 2]) << 0);
+ uint64_t op = ((uint64_t)(m_internal_ram_block0[((offset-0x20000) * 3) + 0]) << 32) |
+ ((uint64_t)(m_internal_ram_block0[((offset-0x20000) * 3) + 1]) << 16) |
+ ((uint64_t)(m_internal_ram_block0[((offset-0x20000) * 3) + 2]) << 0);
value = (op >> shift) & mask;
return true;
}
else if (offset >= 0x28000 && offset < 0x30000)
{
- UINT64 op = ((UINT64)(m_internal_ram_block1[((offset-0x28000) * 3) + 0]) << 32) |
- ((UINT64)(m_internal_ram_block1[((offset-0x28000) * 3) + 1]) << 16) |
- ((UINT64)(m_internal_ram_block1[((offset-0x28000) * 3) + 2]) << 0);
+ uint64_t op = ((uint64_t)(m_internal_ram_block1[((offset-0x28000) * 3) + 0]) << 32) |
+ ((uint64_t)(m_internal_ram_block1[((offset-0x28000) * 3) + 1]) << 16) |
+ ((uint64_t)(m_internal_ram_block1[((offset-0x28000) * 3) + 2]) << 0);
value = (op >> shift) & mask;
return true;
}
diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h
index 3b60408b6aa..49853a44602 100644
--- a/src/devices/cpu/sharc/sharc.h
+++ b/src/devices/cpu/sharc/sharc.h
@@ -25,49 +25,49 @@ enum SHARC_BOOT_MODE
struct alignas(16) SHARC_DAG
{
- UINT32 i[8];
- UINT32 m[8];
- UINT32 b[8];
- UINT32 l[8];
+ uint32_t i[8];
+ uint32_t m[8];
+ uint32_t b[8];
+ uint32_t l[8];
};
union SHARC_REG
{
- INT32 r;
+ int32_t r;
float f;
};
struct SHARC_DMA_REGS
{
- UINT32 control;
- UINT32 int_index;
- UINT32 int_modifier;
- UINT32 int_count;
- UINT32 chain_ptr;
- UINT32 gen_purpose;
- UINT32 ext_index;
- UINT32 ext_modifier;
- UINT32 ext_count;
+ uint32_t control;
+ uint32_t int_index;
+ uint32_t int_modifier;
+ uint32_t int_count;
+ uint32_t chain_ptr;
+ uint32_t gen_purpose;
+ uint32_t ext_index;
+ uint32_t ext_modifier;
+ uint32_t ext_count;
};
struct SHARC_LADDR
{
- UINT32 addr;
- UINT32 code;
- UINT32 loop_type;
+ uint32_t addr;
+ uint32_t code;
+ uint32_t loop_type;
};
struct SHARC_DMA_OP
{
- UINT32 src;
- UINT32 dst;
- UINT32 chain_ptr;
- INT32 src_modifier;
- INT32 dst_modifier;
- INT32 src_count;
- INT32 dst_count;
- INT32 pmode;
- INT32 chained_direction;
+ uint32_t src;
+ uint32_t dst;
+ uint32_t chain_ptr;
+ int32_t src_modifier;
+ int32_t dst_modifier;
+ int32_t src_count;
+ int32_t dst_count;
+ int32_t pmode;
+ int32_t chained_direction;
emu_timer *timer;
bool active;
};
@@ -113,7 +113,7 @@ struct SHARC_DMA_OP
#define SIGN_EXTEND6(x) (((x) & 0x20) ? (0xffffffc0 | (x)) : (x))
#define SIGN_EXTEND24(x) (((x) & 0x800000) ? (0xff000000 | (x)) : (x))
-#define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((UINT32)0xffffffff) >> (32 - (start_bit + length))))
+#define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((uint32_t)0xffffffff) >> (32 - (start_bit + length))))
#define OP_USERFLAG_COUNTER_LOOP 0x00000001
#define OP_USERFLAG_COND_LOOP 0x00000002
@@ -143,14 +143,14 @@ class adsp21062_device : public cpu_device
public:
// construction/destruction
- adsp21062_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ adsp21062_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
// static configuration helpers
static void set_boot_mode(device_t &device, const SHARC_BOOT_MODE boot_mode) { downcast<adsp21062_device &>(device).m_boot_mode = boot_mode; }
void set_flag_input(int flag_num, int state);
- void external_iop_write(UINT32 address, UINT32 data);
- void external_dma_write(UINT32 address, UINT64 data);
+ void external_iop_write(uint32_t address, uint32_t data);
+ void external_dma_write(uint32_t address, uint64_t data);
TIMER_CALLBACK_MEMBER(sharc_iop_delayed_write_callback);
TIMER_CALLBACK_MEMBER(sharc_dma_callback);
@@ -249,21 +249,21 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 8; }
- virtual UINT32 execute_max_cycles() const override { return 8; }
- virtual UINT32 execute_input_lines() const override { return 32; }
+ virtual uint32_t execute_min_cycles() const override { return 8; }
+ virtual uint32_t execute_max_cycles() const override { return 8; }
+ virtual uint32_t execute_input_lines() const override { return 32; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_DATA) ? &m_data_config : nullptr ); }
- virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value) override;
- virtual bool memory_readop(offs_t offset, int size, UINT64 &value) override;
+ virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, uint64_t &value) override;
+ virtual bool memory_readop(offs_t offset, int size, uint64_t &value) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 6; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 6; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 6; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 6; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
direct_read_data *m_direct;
@@ -274,8 +274,8 @@ private:
typedef void (adsp21062_device::*opcode_func)();
struct SHARC_OP
{
- UINT32 op_mask;
- UINT32 op_bits;
+ uint32_t op_mask;
+ uint32_t op_bits;
opcode_func handler;
};
static const SHARC_OP s_sharc_opcode_table[];
@@ -286,24 +286,24 @@ private:
{
struct
{
- UINT32 az;
- UINT32 av;
- UINT32 an;
- UINT32 ac;
- UINT32 as;
- UINT32 ai;
- UINT32 mn;
- UINT32 mv;
- UINT32 mu;
- UINT32 mi;
- UINT32 sv;
- UINT32 sz;
- UINT32 ss;
- UINT32 btf;
- UINT32 af;
- UINT32 cacc;
+ uint32_t az;
+ uint32_t av;
+ uint32_t an;
+ uint32_t ac;
+ uint32_t as;
+ uint32_t ai;
+ uint32_t mn;
+ uint32_t mv;
+ uint32_t mu;
+ uint32_t mi;
+ uint32_t sv;
+ uint32_t sz;
+ uint32_t ss;
+ uint32_t btf;
+ uint32_t af;
+ uint32_t cacc;
};
- UINT64 flags64[8];
+ uint64_t flags64[8];
};
};
@@ -312,23 +312,23 @@ private:
SHARC_REG r[16];
SHARC_REG reg_alt[16];
- UINT32 pc;
- UINT64 mrf;
- UINT64 mrb;
+ uint32_t pc;
+ uint64_t mrf;
+ uint64_t mrb;
- UINT32 pcstack[32];
- UINT32 lcstack[6];
- UINT32 lastack[6];
- UINT32 lstkp;
+ uint32_t pcstack[32];
+ uint32_t lcstack[6];
+ uint32_t lastack[6];
+ uint32_t lstkp;
- UINT32 faddr;
- UINT32 daddr;
- UINT32 pcstk;
- UINT32 pcstkp;
+ uint32_t faddr;
+ uint32_t daddr;
+ uint32_t pcstk;
+ uint32_t pcstkp;
SHARC_LADDR laddr;
- UINT32 curlcntr;
- UINT32 lcntr;
- UINT8 extdma_shift;
+ uint32_t curlcntr;
+ uint32_t lcntr;
+ uint8_t extdma_shift;
/* Data Address Generator (DAG) */
SHARC_DAG dag1; // (DM bus)
@@ -339,80 +339,80 @@ private:
SHARC_DMA_REGS dma[12];
/* System registers */
- UINT32 mode1;
- UINT32 mode2;
- UINT32 astat;
- UINT32 stky;
- UINT32 irptl;
- UINT32 imask;
- UINT32 imaskp;
- UINT32 ustat1;
- UINT32 ustat2;
+ uint32_t mode1;
+ uint32_t mode2;
+ uint32_t astat;
+ uint32_t stky;
+ uint32_t irptl;
+ uint32_t imask;
+ uint32_t imaskp;
+ uint32_t ustat1;
+ uint32_t ustat2;
- UINT32 flag[4];
+ uint32_t flag[4];
- UINT32 syscon;
- UINT32 sysstat;
+ uint32_t syscon;
+ uint32_t sysstat;
struct
{
- UINT32 mode1;
- UINT32 astat;
+ uint32_t mode1;
+ uint32_t astat;
} status_stack[5];
- INT32 status_stkp;
+ int32_t status_stkp;
- UINT64 px;
+ uint64_t px;
int icount;
- UINT64 opcode;
+ uint64_t opcode;
- UINT32 nfaddr;
+ uint32_t nfaddr;
- INT32 idle;
- INT32 irq_pending;
- INT32 active_irq_num;
+ int32_t idle;
+ int32_t irq_pending;
+ int32_t active_irq_num;
SHARC_DMA_OP dma_op[12];
- UINT32 dma_status;
+ uint32_t dma_status;
- INT32 interrupt_active;
+ int32_t interrupt_active;
- UINT32 iop_delayed_reg;
- UINT32 iop_delayed_data;
+ uint32_t iop_delayed_reg;
+ uint32_t iop_delayed_data;
emu_timer *delayed_iop_timer;
- UINT32 delay_slot1, delay_slot2;
+ uint32_t delay_slot1, delay_slot2;
- INT32 systemreg_latency_cycles;
- INT32 systemreg_latency_reg;
- UINT32 systemreg_latency_data;
- UINT32 systemreg_previous_data;
+ int32_t systemreg_latency_cycles;
+ int32_t systemreg_latency_reg;
+ uint32_t systemreg_latency_data;
+ uint32_t systemreg_previous_data;
- UINT32 astat_old;
- UINT32 astat_old_old;
- UINT32 astat_old_old_old;
+ uint32_t astat_old;
+ uint32_t astat_old_old;
+ uint32_t astat_old_old_old;
- UINT32 arg0;
- UINT32 arg1;
- UINT32 arg2;
- UINT32 arg3;
+ uint32_t arg0;
+ uint32_t arg1;
+ uint32_t arg2;
+ uint32_t arg3;
- UINT64 arg64;
- UINT32 mode1_delay_data;
+ uint64_t arg64;
+ uint32_t mode1_delay_data;
ASTAT_DRC astat_drc;
ASTAT_DRC astat_drc_copy;
ASTAT_DRC astat_delay_copy;
- UINT32 dreg_temp;
- UINT32 dreg_temp2;
- UINT32 jmpdest;
- UINT32 temp_return;
+ uint32_t dreg_temp;
+ uint32_t dreg_temp2;
+ uint32_t jmpdest;
+ uint32_t temp_return;
float fp0;
float fp1;
- UINT32 force_recompile;
- UINT32 cache_dirty;
+ uint32_t force_recompile;
+ uint32_t cache_dirty;
};
sharc_internal_state* m_core;
@@ -448,43 +448,43 @@ private:
uml::code_handle *m_swap_r0_7;
uml::code_handle *m_swap_r8_15;
- UINT16 *m_internal_ram_block0, *m_internal_ram_block1;
+ uint16_t *m_internal_ram_block0, *m_internal_ram_block1;
address_space *m_program;
address_space *m_data;
opcode_func m_sharc_op[512];
- UINT16 m_internal_ram[2 * 0x10000]; // 2x 128KB
+ uint16_t m_internal_ram[2 * 0x10000]; // 2x 128KB
bool m_enable_drc;
- inline void CHANGE_PC(UINT32 newpc);
- inline void CHANGE_PC_DELAYED(UINT32 newpc);
- void sharc_iop_delayed_w(UINT32 reg, UINT32 data, int cycles);
- UINT32 sharc_iop_r(UINT32 address);
- void sharc_iop_w(UINT32 address, UINT32 data);
- UINT32 pm_read32(UINT32 address);
- void pm_write32(UINT32 address, UINT32 data);
- UINT64 pm_read48(UINT32 address);
- void pm_write48(UINT32 address, UINT64 data);
- UINT32 dm_read32(UINT32 address);
- void dm_write32(UINT32 address, UINT32 data);
- void schedule_chained_dma_op(int channel, UINT32 dma_chain_ptr, int chained_direction);
- void schedule_dma_op(int channel, UINT32 src, UINT32 dst, int src_modifier, int dst_modifier, int src_count, int dst_count, int pmode);
+ inline void CHANGE_PC(uint32_t newpc);
+ inline void CHANGE_PC_DELAYED(uint32_t newpc);
+ void sharc_iop_delayed_w(uint32_t reg, uint32_t data, int cycles);
+ uint32_t sharc_iop_r(uint32_t address);
+ void sharc_iop_w(uint32_t address, uint32_t data);
+ uint32_t pm_read32(uint32_t address);
+ void pm_write32(uint32_t address, uint32_t data);
+ uint64_t pm_read48(uint32_t address);
+ void pm_write48(uint32_t address, uint64_t data);
+ uint32_t dm_read32(uint32_t address);
+ void dm_write32(uint32_t address, uint32_t data);
+ void schedule_chained_dma_op(int channel, uint32_t dma_chain_ptr, int chained_direction);
+ void schedule_dma_op(int channel, uint32_t src, uint32_t dst, int src_modifier, int dst_modifier, int src_count, int dst_count, int pmode);
void dma_op(int channel);
void sharc_dma_exec(int channel);
- void add_systemreg_write_latency_effect(int sysreg, UINT32 data, UINT32 prev_data);
- inline void swap_register(UINT32 *a, UINT32 *b);
+ void add_systemreg_write_latency_effect(int sysreg, uint32_t data, uint32_t prev_data);
+ inline void swap_register(uint32_t *a, uint32_t *b);
void systemreg_write_latency_effect();
- UINT32 GET_UREG(int ureg);
- void SET_UREG(int ureg, UINT32 data);
+ uint32_t GET_UREG(int ureg);
+ void SET_UREG(int ureg, uint32_t data);
void SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx);
- void COMPUTE(UINT32 opcode);
+ void COMPUTE(uint32_t opcode);
void check_interrupts();
- inline void PUSH_PC(UINT32 pc);
- inline UINT32 POP_PC();
- inline UINT32 TOP_PC();
- inline void PUSH_LOOP(UINT32 addr, UINT32 code, UINT32 type, UINT32 count);
+ inline void PUSH_PC(uint32_t pc);
+ inline uint32_t POP_PC();
+ inline uint32_t TOP_PC();
+ inline void PUSH_LOOP(uint32_t addr, uint32_t code, uint32_t type, uint32_t count);
inline void POP_LOOP();
inline void PUSH_STATUS_STACK();
inline void POP_STATUS_STACK();
@@ -549,7 +549,7 @@ private:
inline void compute_max(int rn, int rx, int ry);
inline void compute_neg(int rn, int rx);
inline void compute_not(int rn, int rx);
- inline UINT32 SCALB(SHARC_REG rx, int ry);
+ inline uint32_t SCALB(SHARC_REG rx, int ry);
inline void compute_float(int rn, int rx);
inline void compute_fix(int rn, int rx);
inline void compute_fix_scaled(int rn, int rx, int ry);
@@ -571,8 +571,8 @@ private:
inline void compute_fabs(int rn, int rx);
inline void compute_mul_uuin(int rn, int rx, int ry);
inline void compute_mul_ssin(int rn, int rx, int ry);
- inline UINT32 compute_mrf_plus_mul_ssin(int rx, int ry);
- inline UINT32 compute_mrb_plus_mul_ssin(int rx, int ry);
+ inline uint32_t compute_mrf_plus_mul_ssin(int rx, int ry);
+ inline uint32_t compute_mrb_plus_mul_ssin(int rx, int ry);
inline void compute_fmul(int rn, int rx, int ry);
inline void compute_multi_mr_to_reg(int ai, int rk);
inline void compute_multi_reg_to_mr(int ai, int rk);
@@ -593,14 +593,14 @@ private:
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
uml::code_label labelnum; /* index for local labels */
struct
{
int counter;
int mode;
- UINT32 data;
+ uint32_t data;
} mode1_delay;
};
@@ -612,7 +612,7 @@ private:
void static_generate_nocode_handler();
void static_generate_out_of_cycles();
void static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, const char *name, uml::code_handle *&handleptr);
- void static_generate_exception(UINT8 exception, const char *name);
+ void static_generate_exception(uint8_t exception, const char *name);
void static_generate_push_pc();
void static_generate_pop_pc();
void static_generate_push_loop();
@@ -633,17 +633,17 @@ private:
void generate_call(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot);
void generate_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot, bool loopabort, bool clearint);
void generate_loop_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
- void generate_write_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data);
- void generate_set_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data);
- void generate_clear_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data);
- void generate_toggle_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data);
+ void generate_write_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data);
+ void generate_set_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data);
+ void generate_clear_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data);
+ void generate_toggle_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data);
void generate_read_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool has_compute);
- void generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, UINT32 data);
+ void generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, uint32_t data);
void generate_update_circular_buffer(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int g, int i);
void generate_astat_copy(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc);
bool if_condition_always_true(int condition);
- UINT32 do_condition_astat_bits(int condition);
+ uint32_t do_condition_astat_bits(int condition);
};
diff --git a/src/devices/cpu/sharc/sharcdma.hxx b/src/devices/cpu/sharc/sharcdma.hxx
index 9321dd88b05..fdbf7a0f635 100644
--- a/src/devices/cpu/sharc/sharcdma.hxx
+++ b/src/devices/cpu/sharc/sharcdma.hxx
@@ -8,18 +8,18 @@
#define DMA_PMODE_32_48 3
#define DMA_PMODE_8_48 4
-void adsp21062_device::schedule_chained_dma_op(int channel, UINT32 dma_chain_ptr, int chained_direction)
+void adsp21062_device::schedule_chained_dma_op(int channel, uint32_t dma_chain_ptr, int chained_direction)
{
- UINT32 op_ptr = 0x20000 + dma_chain_ptr;
+ uint32_t op_ptr = 0x20000 + dma_chain_ptr;
- UINT32 int_index = dm_read32(op_ptr - 0);
- UINT32 int_modifier = dm_read32(op_ptr - 1);
- UINT32 int_count = dm_read32(op_ptr - 2);
- UINT32 chain_ptr = dm_read32(op_ptr - 3);
- //UINT32 gen_purpose = dm_read32(op_ptr - 4);
- UINT32 ext_index = dm_read32(op_ptr - 5);
- UINT32 ext_modifier = dm_read32(op_ptr - 6);
- UINT32 ext_count = dm_read32(op_ptr - 7);
+ uint32_t int_index = dm_read32(op_ptr - 0);
+ uint32_t int_modifier = dm_read32(op_ptr - 1);
+ uint32_t int_count = dm_read32(op_ptr - 2);
+ uint32_t chain_ptr = dm_read32(op_ptr - 3);
+ //uint32_t gen_purpose = dm_read32(op_ptr - 4);
+ uint32_t ext_index = dm_read32(op_ptr - 5);
+ uint32_t ext_modifier = dm_read32(op_ptr - 6);
+ uint32_t ext_count = dm_read32(op_ptr - 7);
if (m_core->dma_op[channel].active)
{
@@ -58,7 +58,7 @@ void adsp21062_device::schedule_chained_dma_op(int channel, UINT32 dma_chain_ptr
m_core->dma_status |= (1 << channel);
}
-void adsp21062_device::schedule_dma_op(int channel, UINT32 src, UINT32 dst, int src_modifier, int dst_modifier, int src_count, int dst_count, int pmode)
+void adsp21062_device::schedule_dma_op(int channel, uint32_t src, uint32_t dst, int src_modifier, int dst_modifier, int src_count, int dst_count, int pmode)
{
if (m_core->dma_op[channel].active)
{
@@ -86,8 +86,8 @@ void adsp21062_device::schedule_dma_op(int channel, UINT32 src, UINT32 dst, int
void adsp21062_device::dma_op(int channel)
{
int i;
- UINT32 src = m_core->dma_op[channel].src;
- UINT32 dst = m_core->dma_op[channel].dst;
+ uint32_t src = m_core->dma_op[channel].src;
+ uint32_t dst = m_core->dma_op[channel].dst;
int src_modifier = m_core->dma_op[channel].src_modifier;
int dst_modifier = m_core->dma_op[channel].dst_modifier;
int src_count = m_core->dma_op[channel].src_count;
@@ -102,7 +102,7 @@ void adsp21062_device::dma_op(int channel)
{
for (i=0; i < src_count; i++)
{
- UINT32 data = dm_read32(src);
+ uint32_t data = dm_read32(src);
dm_write32(dst, data);
src += src_modifier;
dst += dst_modifier;
@@ -114,7 +114,7 @@ void adsp21062_device::dma_op(int channel)
int length = src_count/2;
for (i=0; i < length; i++)
{
- UINT32 data = ((dm_read32(src+0) & 0xffff) << 16) | (dm_read32(src+1) & 0xffff);
+ uint32_t data = ((dm_read32(src+0) & 0xffff) << 16) | (dm_read32(src+1) & 0xffff);
dm_write32(dst, data);
src += src_modifier * 2;
@@ -127,12 +127,12 @@ void adsp21062_device::dma_op(int channel)
int length = src_count/6;
for (i=0; i < length; i++)
{
- UINT64 data = ((UINT64)(dm_read32(src+0) & 0xff) << 0) |
- ((UINT64)(dm_read32(src+1) & 0xff) << 8) |
- ((UINT64)(dm_read32(src+2) & 0xff) << 16) |
- ((UINT64)(dm_read32(src+3) & 0xff) << 24) |
- ((UINT64)(dm_read32(src+4) & 0xff) << 32) |
- ((UINT64)(dm_read32(src+5) & 0xff) << 40);
+ uint64_t data = ((uint64_t)(dm_read32(src+0) & 0xff) << 0) |
+ ((uint64_t)(dm_read32(src+1) & 0xff) << 8) |
+ ((uint64_t)(dm_read32(src+2) & 0xff) << 16) |
+ ((uint64_t)(dm_read32(src+3) & 0xff) << 24) |
+ ((uint64_t)(dm_read32(src+4) & 0xff) << 32) |
+ ((uint64_t)(dm_read32(src+5) & 0xff) << 40);
pm_write48(dst, data);
src += src_modifier * 6;
@@ -165,9 +165,9 @@ void adsp21062_device::dma_op(int channel)
void adsp21062_device::sharc_dma_exec(int channel)
{
- UINT32 src, dst;
- UINT32 src_count, dst_count;
- UINT32 src_modifier, dst_modifier;
+ uint32_t src, dst;
+ uint32_t src_count, dst_count;
+ uint32_t src_modifier, dst_modifier;
int chen, tran, dtype, pmode, /*mswf, master,*/ ishake, intio/*, ext, flsh*/;
chen = (m_core->dma[channel].control >> 1) & 0x1;
@@ -189,7 +189,7 @@ void adsp21062_device::sharc_dma_exec(int channel)
if (chen) // Chained DMA
{
- UINT32 dma_chain_ptr = m_core->dma[channel].chain_ptr & 0x1ffff;
+ uint32_t dma_chain_ptr = m_core->dma[channel].chain_ptr & 0x1ffff;
schedule_chained_dma_op(channel, dma_chain_ptr, tran);
}
diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp
index a0372177b5f..a2422f1f8fc 100644
--- a/src/devices/cpu/sharc/sharcdrc.cpp
+++ b/src/devices/cpu/sharc/sharcdrc.cpp
@@ -197,20 +197,20 @@ static void cfunc_write_snoop(void *param)
void adsp21062_device::sharc_cfunc_unimplemented()
{
- UINT64 op = m_core->arg64;
- fatalerror("PC=%08X: Unimplemented op %04X%08X\n", m_core->pc, (UINT32)(op >> 32), (UINT32)(op));
+ uint64_t op = m_core->arg64;
+ fatalerror("PC=%08X: Unimplemented op %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op));
}
void adsp21062_device::sharc_cfunc_unimplemented_compute()
{
- UINT64 op = m_core->arg64;
- fatalerror("PC=%08X: Unimplemented compute %04X%08X\n", m_core->pc, (UINT32)(op >> 32), (UINT32)(op));
+ uint64_t op = m_core->arg64;
+ fatalerror("PC=%08X: Unimplemented compute %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op));
}
void adsp21062_device::sharc_cfunc_unimplemented_shiftimm()
{
- UINT64 op = m_core->arg64;
- fatalerror("PC=%08X: Unimplemented shiftimm %04X%08X\n", m_core->pc, (UINT32)(op >> 32), (UINT32)(op));
+ uint64_t op = m_core->arg64;
+ fatalerror("PC=%08X: Unimplemented shiftimm %04X%08X\n", m_core->pc, (uint32_t)(op >> 32), (uint32_t)(op));
}
void adsp21062_device::sharc_cfunc_read_iop()
@@ -262,9 +262,9 @@ bool adsp21062_device::if_condition_always_true(int condition)
return false;
}
-UINT32 adsp21062_device::do_condition_astat_bits(int condition)
+uint32_t adsp21062_device::do_condition_astat_bits(int condition)
{
- UINT32 r = 0;
+ uint32_t r = 0;
switch (condition)
{
case 0x00: r = AZ; break; // EQ
@@ -873,7 +873,7 @@ void adsp21062_device::static_generate_pop_status()
}
-void adsp21062_device::static_generate_exception(UINT8 exception, const char *name)
+void adsp21062_device::static_generate_exception(uint8_t exception, const char *name)
{
code_handle *&exception_handle = m_exception[exception];
@@ -1149,7 +1149,7 @@ void adsp21062_device::compile_block(offs_t pc)
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
const opcode_desc *curdesc;
- UINT32 nextpc;
+ uint32_t nextpc;
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next())
@@ -1571,7 +1571,7 @@ void adsp21062_device::generate_update_cycles(drcuml_block *block, compiler_stat
compiler->cycles = 0;
}
-void adsp21062_device::generate_write_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data)
+void adsp21062_device::generate_write_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data)
{
code_label skip;
@@ -1628,7 +1628,7 @@ void adsp21062_device::generate_write_mode1_imm(drcuml_block *block, compiler_st
UML_MOV(block, MODE1, data);
}
-void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data)
+void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data)
{
if (data & 0x1)
fatalerror("generate_set_mode1_imm: tried to enable I8 bit reversing");
@@ -1688,7 +1688,7 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
UML_OR(block, MODE1, MODE1, data);
}
-void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT32 data)
+void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint32_t data)
{
if (data & 0x1)
fatalerror("generate_clear_mode1_imm: tried to disable I8 bit reversing");
@@ -2141,7 +2141,7 @@ void adsp21062_device::generate_read_ureg(drcuml_block *block, compiler_state *c
generate_write_ureg - contents of register I0 or 32-bit immediate data are written into UREG
-------------------------------------------------*/
-void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, UINT32 data)
+void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, uint32_t data)
{
switch (ureg)
{
@@ -2250,7 +2250,7 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
if (imm)
{
UML_DAND(block, mem(&m_core->px), mem(&m_core->px), ~0xffff);
- UML_DOR(block, mem(&m_core->px), mem(&m_core->px), (UINT64)(data));
+ UML_DOR(block, mem(&m_core->px), mem(&m_core->px), (uint64_t)(data));
}
else
{
@@ -2264,7 +2264,7 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
if (imm)
{
UML_DAND(block, mem(&m_core->px), mem(&m_core->px), 0xffff);
- UML_DOR(block, mem(&m_core->px), mem(&m_core->px), (UINT64)(data) << 16);
+ UML_DOR(block, mem(&m_core->px), mem(&m_core->px), (uint64_t)(data) << 16);
}
else
{
@@ -2282,13 +2282,13 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT64 opcode = desc->opptr.q[0];
+ uint64_t opcode = desc->opptr.q[0];
switch ((opcode >> 45) & 7)
{
case 0: // subops
{
- UINT32 subop = (opcode >> 40) & 0x1f;
+ uint32_t subop = (opcode >> 40) & 0x1f;
switch (subop)
{
case 0x00: // NOP / idle |000|00000|
@@ -2669,9 +2669,9 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
case 0x0c: // do until counter expired |000|01100|
{
- UINT16 data = (UINT16)(opcode >> 24);
+ uint16_t data = (uint16_t)(opcode >> 24);
int offset = SIGN_EXTEND24(opcode & 0xffffff);
- UINT32 address = desc->pc + offset;
+ uint32_t address = desc->pc + offset;
UML_MOV(block, LCNTR, data);
if (data > 0)
@@ -2692,7 +2692,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
{
int ureg = (opcode >> 32) & 0xff;
int offset = SIGN_EXTEND24(opcode & 0xffffff);
- UINT32 address = desc->pc + offset;
+ uint32_t address = desc->pc + offset;
generate_read_ureg(block, compiler, desc, ureg, false);
@@ -2713,7 +2713,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
case 0x0e: // do until |000|01110|
{
int offset = SIGN_EXTEND24(opcode & 0xffffff);
- UINT32 address = desc->pc + offset;
+ uint32_t address = desc->pc + offset;
// push pc
UML_MOV(block, I0, desc->pc + 1);
@@ -2729,7 +2729,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
case 0x0f: // immediate data -> ureg |000|01111|
{
int ureg = (opcode >> 32) & 0xff;
- UINT32 data = (UINT32)opcode;
+ uint32_t data = (uint32_t)opcode;
generate_write_ureg(block, compiler, desc, ureg, true, data);
return TRUE;
@@ -2741,7 +2741,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
case 0x13:
{
int ureg = (opcode >> 32) & 0xff;
- UINT32 address = (UINT32)(opcode);
+ uint32_t address = (uint32_t)(opcode);
int d = (opcode >> 40) & 1;
int g = (opcode >> 41) & 1;
@@ -2791,7 +2791,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
{
int bop = (opcode >> 37) & 0x7;
int sreg = (opcode >> 32) & 0xf;
- UINT32 data = (UINT32)opcode;
+ uint32_t data = (uint32_t)opcode;
switch (bop)
{
@@ -3068,7 +3068,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
{
int g = (opcode >> 38) & 0x1;
int i = (opcode >> 32) & 0x7;
- INT32 data = (INT32)(opcode);
+ int32_t data = (int32_t)(opcode);
if (g)
{
@@ -3425,7 +3425,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
int i = (opcode >> 41) & 0x7;
int m = (opcode >> 38) & 0x7;
int g = (opcode >> 37) & 0x1;
- UINT32 data = (UINT32)opcode;
+ uint32_t data = (uint32_t)opcode;
if (g)
{
@@ -3526,7 +3526,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
int d = (opcode >> 40) & 1;
int i = (opcode >> 41) & 0x7;
int ureg = (opcode >> 32) & 0xff;
- UINT32 offset = (UINT32)opcode;
+ uint32_t offset = (uint32_t)opcode;
if (d)
{
@@ -3687,7 +3687,7 @@ void adsp21062_device::generate_unimplemented_compute(drcuml_block *block, compi
void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
{
- UINT64 opcode = desc->opptr.q[0];
+ uint64_t opcode = desc->opptr.q[0];
if ((opcode & 0x7fffff) == 0)
return;
@@ -3700,7 +3700,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (opcode & 0x400000) // multi-function operation
{
- UINT32 multiop = (opcode >> 16) & 0x3f;
+ uint32_t multiop = (opcode >> 16) & 0x3f;
int fm = rs;
int fa = rn;
int fxm = (opcode >> 6) & 0x3; // registers 0 - 3
@@ -4114,7 +4114,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
}
else // single-function operation
{
- UINT32 operation = (opcode >> 12) & 0xff;
+ uint32_t operation = (opcode >> 12) & 0xff;
switch ((opcode >> 20) & 3)
{
@@ -5460,7 +5460,7 @@ void adsp21062_device::generate_do_condition(drcuml_block *block, compiler_state
void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int data, int shiftop, int rn, int rx)
{
- INT8 shift = data & 0xff;
+ int8_t shift = data & 0xff;
int bit = data & 0x3f;
int len = (data >> 6) & 0x3f;
diff --git a/src/devices/cpu/sharc/sharcdsm.cpp b/src/devices/cpu/sharc/sharcdsm.cpp
index b65bbeb71ea..c0786f02ccd 100644
--- a/src/devices/cpu/sharc/sharcdsm.cpp
+++ b/src/devices/cpu/sharc/sharcdsm.cpp
@@ -9,7 +9,7 @@
#include "emu.h"
#include "sharcdsm.h"
-static UINT32 (* sharcdasm_table[256])(UINT32, UINT64);
+static uint32_t (* sharcdasm_table[256])(uint32_t, uint64_t);
static int dasm_table_built = 0;
#define GET_UREG(x) (ureg_names[x])
@@ -40,7 +40,7 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
-static void compute(UINT32 opcode)
+static void compute(uint32_t opcode)
{
int op = (opcode >> 12) & 0xff;
int cu = (opcode >> 20) & 0x3;
@@ -443,7 +443,7 @@ static void pm_dm_dreg(int g, int d, int i, int m, int dreg)
static void shiftop(int shift, int data, int rn, int rx)
{
- INT8 data8 = data & 0xff;
+ int8_t data8 = data & 0xff;
int bit6 = data & 0x3f;
int len = (data >> 6) & 0x3f;
@@ -478,7 +478,7 @@ static void shiftop(int shift, int data, int rn, int rx)
-static UINT32 dasm_compute_dreg_dmpm(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_compute_dreg_dmpm(uint32_t pc, uint64_t opcode)
{
int dmi = (opcode >> 41) & 0x7;
int dmm = (opcode >> 38) & 0x7;
@@ -514,7 +514,7 @@ static UINT32 dasm_compute_dreg_dmpm(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_compute(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_compute(uint32_t pc, uint64_t opcode)
{
int cond = (opcode >> 33) & 0x1f;
int comp = opcode & 0x7fffff;
@@ -527,7 +527,7 @@ static UINT32 dasm_compute(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_compute_uregdmpm_regmod(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_compute_uregdmpm_regmod(uint32_t pc, uint64_t opcode)
{
int cond = (opcode >> 33) & 0x1f;
int g = (opcode >> 32) & 0x1;
@@ -548,7 +548,7 @@ static UINT32 dasm_compute_uregdmpm_regmod(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_compute_dregdmpm_immmod(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_compute_dregdmpm_immmod(uint32_t pc, uint64_t opcode)
{
int cond = (opcode >> 33) & 0x1f;
int g = (opcode >> 40) & 0x1;
@@ -569,7 +569,7 @@ static UINT32 dasm_compute_dregdmpm_immmod(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_compute_ureg_ureg(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_compute_ureg_ureg(uint32_t pc, uint64_t opcode)
{
int cond = (opcode >> 31) & 0x1f;
int uregs = (opcode >> 36) & 0xff;
@@ -586,7 +586,7 @@ static UINT32 dasm_compute_ureg_ureg(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_immshift_dregdmpm(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_immshift_dregdmpm(uint32_t pc, uint64_t opcode)
{
int cond = (opcode >> 33) & 0x1f;
int g = (opcode >> 32) & 0x1;
@@ -606,7 +606,7 @@ static UINT32 dasm_immshift_dregdmpm(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_immshift_dregdmpm_nodata(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_immshift_dregdmpm_nodata(uint32_t pc, uint64_t opcode)
{
int cond = (opcode >> 33) & 0x1f;
int rn = (opcode >> 4) & 0xf;
@@ -619,7 +619,7 @@ static UINT32 dasm_immshift_dregdmpm_nodata(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_compute_modify(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_compute_modify(uint32_t pc, uint64_t opcode)
{
int cond = (opcode >> 33) & 0x1f;
int g = (opcode >> 38) & 0x7;
@@ -637,13 +637,13 @@ static UINT32 dasm_compute_modify(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_direct_jump(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_direct_jump(uint32_t pc, uint64_t opcode)
{
int j = (opcode >> 26) & 0x1;
int cond = (opcode >> 33) & 0x1f;
int ci = (opcode >> 24) & 0x1;
- UINT32 addr = opcode & 0xffffff;
- UINT32 flags = 0;
+ uint32_t addr = opcode & 0xffffff;
+ uint32_t flags = 0;
get_if_condition(cond);
if (opcode & U64(0x8000000000))
@@ -675,7 +675,7 @@ static UINT32 dasm_direct_jump(UINT32 pc, UINT64 opcode)
return flags;
}
-static UINT32 dasm_indirect_jump_compute(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_indirect_jump_compute(uint32_t pc, uint64_t opcode)
{
int b = (opcode >> 39) & 0x1;
int j = (opcode >> 26) & 0x1;
@@ -686,7 +686,7 @@ static UINT32 dasm_indirect_jump_compute(UINT32 pc, UINT64 opcode)
int pmm = (opcode >> 27) & 0x7;
int reladdr = (opcode >> 27) & 0x3f;
int comp = opcode & 0x7fffff;
- UINT32 flags = 0;
+ uint32_t flags = 0;
get_if_condition(cond);
if (b)
@@ -729,7 +729,7 @@ static UINT32 dasm_indirect_jump_compute(UINT32 pc, UINT64 opcode)
return flags;
}
-static UINT32 dasm_indirect_jump_compute_dregdm(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_indirect_jump_compute_dregdm(uint32_t pc, uint64_t opcode)
{
int d = (opcode >> 44) & 0x1;
int cond = (opcode >> 33) & 0x1f;
@@ -770,7 +770,7 @@ static UINT32 dasm_indirect_jump_compute_dregdm(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_rts_compute(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_rts_compute(uint32_t pc, uint64_t opcode)
{
int j = (opcode >> 26) & 0x1;
int e = (opcode >> 25) & 0x1;
@@ -811,11 +811,11 @@ static UINT32 dasm_rts_compute(UINT32 pc, UINT64 opcode)
return DASMFLAG_STEP_OUT;
}
-static UINT32 dasm_do_until_counter(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_do_until_counter(uint32_t pc, uint64_t opcode)
{
int data = (opcode >> 24) & 0xffff;
int ureg = (opcode >> 32) & 0xff;
- UINT32 addr = opcode & 0xffffff;
+ uint32_t addr = opcode & 0xffffff;
if (opcode & U64(0x10000000000)) /* Loop counter from universal register */
{
@@ -830,21 +830,21 @@ static UINT32 dasm_do_until_counter(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_do_until(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_do_until(uint32_t pc, uint64_t opcode)
{
int term = (opcode >> 33) & 0x1f;
- UINT32 addr = opcode & 0xffffff;
+ uint32_t addr = opcode & 0xffffff;
print("DO (0x%08X) UNTIL %s", pc + SIGN_EXTEND24(addr), condition_codes_do[term]);
return 0;
}
-static UINT32 dasm_immmove_uregdmpm(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_immmove_uregdmpm(uint32_t pc, uint64_t opcode)
{
int d = (opcode >> 40) & 0x1;
int g = (opcode >> 41) & 0x1;
int ureg = (opcode >> 32) & 0xff;
- UINT32 addr = opcode & 0xffffffff;
+ uint32_t addr = opcode & 0xffffffff;
if (g)
{
@@ -871,13 +871,13 @@ static UINT32 dasm_immmove_uregdmpm(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_immmove_uregdmpm_indirect(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_immmove_uregdmpm_indirect(uint32_t pc, uint64_t opcode)
{
int d = (opcode >> 40) & 0x1;
int g = (opcode >> 44) & 0x1;
int i = (opcode >> 41) & 0x7;
int ureg = (opcode >> 32) & 0xff;
- UINT32 addr = opcode & 0xffffffff;
+ uint32_t addr = opcode & 0xffffffff;
if (g)
{
@@ -904,12 +904,12 @@ static UINT32 dasm_immmove_uregdmpm_indirect(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_immmove_immdata_dmpm(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_immmove_immdata_dmpm(uint32_t pc, uint64_t opcode)
{
int g = (opcode >> 37) & 0x1;
int i = (opcode >> 41) & 0x7;
int m = (opcode >> 38) & 0x7;
- UINT32 data = opcode & 0xffffffff;
+ uint32_t data = opcode & 0xffffffff;
if (g)
{
@@ -922,20 +922,20 @@ static UINT32 dasm_immmove_immdata_dmpm(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_immmove_immdata_ureg(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_immmove_immdata_ureg(uint32_t pc, uint64_t opcode)
{
int ureg = (opcode >> 32) & 0xff;
- UINT32 data = opcode & 0xffffffff;
+ uint32_t data = opcode & 0xffffffff;
print("%s = 0x%08X", GET_UREG(ureg), data);
return 0;
}
-static UINT32 dasm_sysreg_bitop(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_sysreg_bitop(uint32_t pc, uint64_t opcode)
{
int bop = (opcode >> 37) & 0x7;
int sreg = (opcode >> 32) & 0xf;
- UINT32 data = opcode & 0xffffffff;
+ uint32_t data = opcode & 0xffffffff;
print("BIT ");
print("%s ", bopnames[bop]);
@@ -944,11 +944,11 @@ static UINT32 dasm_sysreg_bitop(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_ireg_modify(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_ireg_modify(uint32_t pc, uint64_t opcode)
{
int g = (opcode >> 38) & 0x1;
int i = (opcode >> 32) & 0x7;
- UINT32 data = opcode & 0xffffffff;
+ uint32_t data = opcode & 0xffffffff;
if (opcode & U64(0x8000000000)) /* with bit-reverse */
{
@@ -975,7 +975,7 @@ static UINT32 dasm_ireg_modify(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_misc(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_misc(uint32_t pc, uint64_t opcode)
{
int bits = (opcode >> 33) & 0x7f;
int lpu = (opcode >> 39) & 0x1;
@@ -1041,7 +1041,7 @@ static UINT32 dasm_misc(UINT32 pc, UINT64 opcode)
return 0;
}
-static UINT32 dasm_idlenop(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_idlenop(uint32_t pc, uint64_t opcode)
{
if (opcode & U64(0x8000000000))
{
@@ -1055,7 +1055,7 @@ static UINT32 dasm_idlenop(UINT32 pc, UINT64 opcode)
}
#ifdef UNUSED_FUNCTION
-static UINT32 dasm_cjump_rframe(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_cjump_rframe(uint32_t pc, uint64_t opcode)
{
/* TODO */
if (opcode & U64(0x10000000000)) /* RFRAME */
@@ -1070,7 +1070,7 @@ static UINT32 dasm_cjump_rframe(UINT32 pc, UINT64 opcode)
}
#endif
-static UINT32 dasm_invalid(UINT32 pc, UINT64 opcode)
+static uint32_t dasm_invalid(uint32_t pc, uint64_t opcode)
{
print("?");
return 0;
@@ -1157,7 +1157,7 @@ static void build_dasm_table(void)
for (i=0; i < 256; i++)
{
- UINT16 op = i << 8;
+ uint16_t op = i << 8;
for (j=0; j < num_ops; j++)
{
@@ -1176,14 +1176,14 @@ static void build_dasm_table(void)
}
}
-static UINT32 sharc_dasm_one(char *buffer, offs_t pc, UINT64 opcode)
+static uint32_t sharc_dasm_one(char *buffer, offs_t pc, uint64_t opcode)
{
#define DEFAULT_DASM_WIDTH (64)
char dasm_buffer[2000];
int i;
int op = (opcode >> 40) & 0xff;
- UINT32 flags;
+ uint32_t flags;
if (!dasm_table_built)
{
@@ -1208,12 +1208,12 @@ static UINT32 sharc_dasm_one(char *buffer, offs_t pc, UINT64 opcode)
CPU_DISASSEMBLE( sharc )
{
- UINT64 op;
- UINT32 flags;
+ uint64_t op;
+ uint32_t flags;
- op = ((UINT64)oprom[0] << 0) | ((UINT64)oprom[1] << 8) |
- ((UINT64)oprom[2] << 16) | ((UINT64)oprom[3] << 24) |
- ((UINT64)oprom[4] << 32) | ((UINT64)oprom[5] << 40);
+ op = ((uint64_t)oprom[0] << 0) | ((uint64_t)oprom[1] << 8) |
+ ((uint64_t)oprom[2] << 16) | ((uint64_t)oprom[3] << 24) |
+ ((uint64_t)oprom[4] << 32) | ((uint64_t)oprom[5] << 40);
flags = sharc_dasm_one(buffer, pc, op);
return 1 | flags | DASMFLAG_SUPPORTED;
diff --git a/src/devices/cpu/sharc/sharcdsm.h b/src/devices/cpu/sharc/sharcdsm.h
index 8407b73cb50..e4a52e94ea6 100644
--- a/src/devices/cpu/sharc/sharcdsm.h
+++ b/src/devices/cpu/sharc/sharcdsm.h
@@ -73,7 +73,7 @@ static const char mr_regnames[16][8] =
struct SHARC_DASM_OP
{
- UINT32 op_mask;
- UINT32 op_bits;
- UINT32 (* handler)(UINT32, UINT64);
+ uint32_t op_mask;
+ uint32_t op_bits;
+ uint32_t (* handler)(uint32_t, uint64_t);
};
diff --git a/src/devices/cpu/sharc/sharcfe.cpp b/src/devices/cpu/sharc/sharcfe.cpp
index 105eea6c66c..194dabcea8c 100644
--- a/src/devices/cpu/sharc/sharcfe.cpp
+++ b/src/devices/cpu/sharc/sharcfe.cpp
@@ -68,7 +68,7 @@
#define DM_L_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 24); } while(0)
-sharc_frontend::sharc_frontend(adsp21062_device *sharc, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
+sharc_frontend::sharc_frontend(adsp21062_device *sharc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
: drc_frontend(*sharc, window_start, window_end, max_sequence),
m_sharc(sharc)
{
@@ -84,16 +84,16 @@ void sharc_frontend::flush()
memset(map, 0, sizeof(LOOP_ENTRY) * 0x20000);
}
-void sharc_frontend::add_loop_entry(UINT32 pc, UINT8 type, UINT32 start_pc, UINT8 looptype, UINT8 condition)
+void sharc_frontend::add_loop_entry(uint32_t pc, uint8_t type, uint32_t start_pc, uint8_t looptype, uint8_t condition)
{
- UINT32 l2 = pc >> 17;
- UINT32 l1 = pc & 0x1ffff;
+ uint32_t l2 = pc >> 17;
+ uint32_t l1 = pc & 0x1ffff;
if (l2 != 0x1)
fatalerror("sharc_frontend::add_loop_entry: PC = %08X", pc);
LOOP_ENTRY* map = m_loopmap.get();
- UINT32 current_type = map[l1].entrytype;
+ uint32_t current_type = map[l1].entrytype;
if (current_type & type)
{
// check for mismatch if the entry is already used
@@ -121,10 +121,10 @@ void sharc_frontend::insert_loop(const LOOP_DESCRIPTOR &loopdesc)
add_loop_entry(loopdesc.astat_check_pc, LOOP_ENTRY_ASTAT_CHECK, loopdesc.start_pc, loopdesc.type, loopdesc.condition);
}
-bool sharc_frontend::is_loop_evaluation(UINT32 pc)
+bool sharc_frontend::is_loop_evaluation(uint32_t pc)
{
- UINT32 l2 = pc >> 17;
- UINT32 l1 = pc & 0x1ffff;
+ uint32_t l2 = pc >> 17;
+ uint32_t l1 = pc & 0x1ffff;
if (l2 != 0x1)
return false;
@@ -136,10 +136,10 @@ bool sharc_frontend::is_loop_evaluation(UINT32 pc)
return false;
}
-bool sharc_frontend::is_loop_start(UINT32 pc)
+bool sharc_frontend::is_loop_start(uint32_t pc)
{
- UINT32 l2 = pc >> 17;
- UINT32 l1 = pc & 0x1ffff;
+ uint32_t l2 = pc >> 17;
+ uint32_t l1 = pc & 0x1ffff;
if (l2 != 0x1)
return false;
@@ -151,10 +151,10 @@ bool sharc_frontend::is_loop_start(UINT32 pc)
return false;
}
-bool sharc_frontend::is_astat_delay_check(UINT32 pc)
+bool sharc_frontend::is_astat_delay_check(uint32_t pc)
{
- UINT32 l2 = pc >> 17;
- UINT32 l1 = pc & 0x1ffff;
+ uint32_t l2 = pc >> 17;
+ uint32_t l1 = pc & 0x1ffff;
if (l2 != 0x1)
return false;
@@ -169,7 +169,7 @@ bool sharc_frontend::is_astat_delay_check(UINT32 pc)
bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
- UINT64 opcode = desc.opptr.q[0] = m_sharc->pm_read48(desc.physpc);
+ uint64_t opcode = desc.opptr.q[0] = m_sharc->pm_read48(desc.physpc);
desc.length = 1;
desc.cycles = 1;
@@ -182,7 +182,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
if (map[index].looptype == LOOP_TYPE_CONDITIONAL)
{
- UINT32 flags = m_sharc->do_condition_astat_bits(map[index].condition);
+ uint32_t flags = m_sharc->do_condition_astat_bits(map[index].condition);
if (flags & adsp21062_device::ASTAT_FLAGS::AZ) { desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AZ; AZ_USED(desc); }
if (flags & adsp21062_device::ASTAT_FLAGS::AN) { desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AN; AN_USED(desc); }
if (flags & adsp21062_device::ASTAT_FLAGS::AV) { desc.userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AV; AV_USED(desc); }
@@ -223,7 +223,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
case 0: // subops
{
- UINT32 subop = (opcode >> 40) & 0x1f;
+ uint32_t subop = (opcode >> 40) & 0x1f;
switch (subop)
{
case 0x00: // NOP / idle |000|00000|
@@ -296,7 +296,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
int j = (opcode >> 26) & 0x1;
int b = (opcode >> 39) & 0x1;
int cond = (opcode >> 33) & 0x1f;
- UINT32 address = opcode & 0xffffff;
+ uint32_t address = opcode & 0xffffff;
if (m_sharc->if_condition_always_true(cond))
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
@@ -317,7 +317,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
int j = (opcode >> 26) & 0x1;
int b = (opcode >> 39) & 0x1;
int cond = (opcode >> 33) & 0x1f;
- UINT32 address = opcode & 0xffffff;
+ uint32_t address = opcode & 0xffffff;
if (m_sharc->if_condition_always_true(cond))
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
@@ -522,7 +522,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
int bop = (opcode >> 37) & 0x7;
int sreg = (opcode >> 32) & 0xf;
- UINT32 data = (UINT32)(opcode);
+ uint32_t data = (uint32_t)(opcode);
switch (bop)
{
@@ -637,7 +637,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
default:
- fatalerror("sharc_frontend::describe: unknown subop %02X in opcode %04X%08X", subop, (UINT16)(opcode >> 32), (UINT32)(opcode));
+ fatalerror("sharc_frontend::describe: unknown subop %02X in opcode %04X%08X", subop, (uint16_t)(opcode >> 32), (uint32_t)(opcode));
return false;
}
break;
@@ -978,7 +978,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
return true;
}
-bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
+bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode)
{
// skip if no-op
if ((opcode & 0x7fffff) == 0)
@@ -992,7 +992,7 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
if (opcode & 0x400000) // multi-function operation
{
- UINT32 multiop = (opcode >> 16) & 0x3f;
+ uint32_t multiop = (opcode >> 16) & 0x3f;
int fm = rs;
int fa = rn;
int fxm = (opcode >> 6) & 0x3; // registers 0 - 3
@@ -1135,13 +1135,13 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
break;
default:
- fatalerror("sharc_frontend::describe_compute: unknown multiop %02X in opcode %04X%08X at %08X", multiop, (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc);
+ fatalerror("sharc_frontend::describe_compute: unknown multiop %02X in opcode %04X%08X at %08X", multiop, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc);
return false;
}
}
else // single-function operation
{
- UINT32 operation = (opcode >> 12) & 0xff;
+ uint32_t operation = (opcode >> 12) & 0xff;
switch ((opcode >> 20) & 3)
{
@@ -1242,7 +1242,7 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
}
default:
- fatalerror("sharc_frontend::describe_compute: unknown ALU op %02X in opcode %04X%08X at %08X", operation, (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc);
+ fatalerror("sharc_frontend::describe_compute: unknown ALU op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc);
return false;
}
break;
@@ -1526,7 +1526,7 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
break;
default:
- fatalerror("sharc_frontend::describe_compute: unknown mult op %02X in opcode %04X%08X at %08X", operation, (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc);
+ fatalerror("sharc_frontend::describe_compute: unknown mult op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc);
}
break;
}
@@ -1579,13 +1579,13 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
break;
default:
- fatalerror("sharc_frontend::describe_compute: unknown shift op %02X in opcode %04X%08X at %08X", operation, (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc);
+ fatalerror("sharc_frontend::describe_compute: unknown shift op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc);
}
break;
}
default:
- fatalerror("sharc_frontend::describe_compute: unknown operation type in opcode %04X%08X at %08X", (UINT16)(opcode >> 32), (UINT32)(opcode), desc.pc);
+ fatalerror("sharc_frontend::describe_compute: unknown operation type in opcode %04X%08X at %08X", (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc);
return false;
}
}
diff --git a/src/devices/cpu/sharc/sharcfe.h b/src/devices/cpu/sharc/sharcfe.h
index b383e122606..6961b53b34f 100644
--- a/src/devices/cpu/sharc/sharcfe.h
+++ b/src/devices/cpu/sharc/sharcfe.h
@@ -18,7 +18,7 @@
class sharc_frontend : public drc_frontend
{
public:
- sharc_frontend(adsp21062_device *sharc, UINT32 window_start, UINT32 window_end, UINT32 max_sequence);
+ sharc_frontend(adsp21062_device *sharc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
void flush();
enum UREG_ACCESS
@@ -42,17 +42,17 @@ public:
struct LOOP_ENTRY
{
- UINT16 entrytype;
- UINT8 looptype;
- UINT8 condition;
- UINT32 start_pc;
+ uint16_t entrytype;
+ uint8_t looptype;
+ uint8_t condition;
+ uint32_t start_pc;
};
struct LOOP_DESCRIPTOR
{
- UINT32 start_pc;
- UINT32 end_pc;
- UINT32 astat_check_pc;
+ uint32_t start_pc;
+ uint32_t end_pc;
+ uint32_t astat_check_pc;
LOOP_TYPE type;
int condition;
};
@@ -62,16 +62,16 @@ protected:
virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override;
private:
- bool describe_compute(opcode_desc &desc, UINT64 opcode);
+ bool describe_compute(opcode_desc &desc, uint64_t opcode);
bool describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCESS access);
bool describe_shiftop_imm(opcode_desc &desc, int shiftop, int rn, int rx);
void describe_if_condition(opcode_desc &desc, int condition);
void insert_loop(const LOOP_DESCRIPTOR &loopdesc);
- void add_loop_entry(UINT32 pc, UINT8 type, UINT32 start_pc, UINT8 looptype, UINT8 condition);
- bool is_loop_evaluation(UINT32 pc);
- bool is_loop_start(UINT32 pc);
- bool is_astat_delay_check(UINT32 pc);
+ void add_loop_entry(uint32_t pc, uint8_t type, uint32_t start_pc, uint8_t looptype, uint8_t condition);
+ bool is_loop_evaluation(uint32_t pc);
+ bool is_loop_start(uint32_t pc);
+ bool is_astat_delay_check(uint32_t pc);
adsp21062_device *m_sharc;
diff --git a/src/devices/cpu/sharc/sharcmem.hxx b/src/devices/cpu/sharc/sharcmem.hxx
index 3b5ed63884d..d415fe0b04b 100644
--- a/src/devices/cpu/sharc/sharcmem.hxx
+++ b/src/devices/cpu/sharc/sharcmem.hxx
@@ -2,21 +2,21 @@
// copyright-holders:Ville Linde
/* SHARC memory operations */
-UINT32 adsp21062_device::pm_read32(UINT32 address)
+uint32_t adsp21062_device::pm_read32(uint32_t address)
{
if (address >= 0x20000 && address < 0x28000)
{
- UINT32 addr = (address & 0x7fff) * 3;
+ uint32_t addr = (address & 0x7fff) * 3;
- return (UINT32)(m_internal_ram_block0[addr + 0] << 16) |
+ return (uint32_t)(m_internal_ram_block0[addr + 0] << 16) |
(m_internal_ram_block0[addr + 1]);
}
else if (address >= 0x28000 && address < 0x40000)
{
// block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff
- UINT32 addr = (address & 0x7fff) * 3;
+ uint32_t addr = (address & 0x7fff) * 3;
- return (UINT32)(m_internal_ram_block1[addr + 0] << 16) |
+ return (uint32_t)(m_internal_ram_block1[addr + 0] << 16) |
(m_internal_ram_block1[addr + 1]);
}
else {
@@ -24,23 +24,23 @@ UINT32 adsp21062_device::pm_read32(UINT32 address)
}
}
-void adsp21062_device::pm_write32(UINT32 address, UINT32 data)
+void adsp21062_device::pm_write32(uint32_t address, uint32_t data)
{
if (address >= 0x20000 && address < 0x28000)
{
- UINT32 addr = (address & 0x7fff) * 3;
+ uint32_t addr = (address & 0x7fff) * 3;
- m_internal_ram_block0[addr + 0] = (UINT16)(data >> 16);
- m_internal_ram_block0[addr + 1] = (UINT16)(data);
+ m_internal_ram_block0[addr + 0] = (uint16_t)(data >> 16);
+ m_internal_ram_block0[addr + 1] = (uint16_t)(data);
return;
}
else if (address >= 0x28000 && address < 0x40000)
{
// block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff
- UINT32 addr = (address & 0x7fff) * 3;
+ uint32_t addr = (address & 0x7fff) * 3;
- m_internal_ram_block1[addr + 0] = (UINT16)(data >> 16);
- m_internal_ram_block1[addr + 1] = (UINT16)(data);
+ m_internal_ram_block1[addr + 0] = (uint16_t)(data >> 16);
+ m_internal_ram_block1[addr + 1] = (uint16_t)(data);
return;
}
else {
@@ -48,24 +48,24 @@ void adsp21062_device::pm_write32(UINT32 address, UINT32 data)
}
}
-UINT64 adsp21062_device::pm_read48(UINT32 address)
+uint64_t adsp21062_device::pm_read48(uint32_t address)
{
if ((address >= 0x20000 && address < 0x28000))
{
- UINT32 addr = (address & 0x7fff) * 3;
+ uint32_t addr = (address & 0x7fff) * 3;
- return ((UINT64)(m_internal_ram_block0[addr + 0]) << 32) |
- ((UINT64)(m_internal_ram_block0[addr + 1]) << 16) |
- ((UINT64)(m_internal_ram_block0[addr + 2]) << 0);
+ return ((uint64_t)(m_internal_ram_block0[addr + 0]) << 32) |
+ ((uint64_t)(m_internal_ram_block0[addr + 1]) << 16) |
+ ((uint64_t)(m_internal_ram_block0[addr + 2]) << 0);
}
else if (address >= 0x28000 && address < 0x40000)
{
// block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff
- UINT32 addr = (address & 0x7fff) * 3;
+ uint32_t addr = (address & 0x7fff) * 3;
- return ((UINT64)(m_internal_ram_block1[addr + 0]) << 32) |
- ((UINT64)(m_internal_ram_block1[addr + 1]) << 16) |
- ((UINT64)(m_internal_ram_block1[addr + 2]) << 0);
+ return ((uint64_t)(m_internal_ram_block1[addr + 0]) << 32) |
+ ((uint64_t)(m_internal_ram_block1[addr + 1]) << 16) |
+ ((uint64_t)(m_internal_ram_block1[addr + 2]) << 0);
}
else {
fatalerror("SHARC: PM Bus Read48 %08X at %08X\n", address, m_core->pc);
@@ -74,33 +74,33 @@ UINT64 adsp21062_device::pm_read48(UINT32 address)
return 0;
}
-void adsp21062_device::pm_write48(UINT32 address, UINT64 data)
+void adsp21062_device::pm_write48(uint32_t address, uint64_t data)
{
if ((address >= 0x20000 && address < 0x28000))
{
- UINT32 addr = (address & 0x7fff) * 3;
+ uint32_t addr = (address & 0x7fff) * 3;
- m_internal_ram_block0[addr + 0] = (UINT16)(data >> 32);
- m_internal_ram_block0[addr + 1] = (UINT16)(data >> 16);
- m_internal_ram_block0[addr + 2] = (UINT16)(data);
+ m_internal_ram_block0[addr + 0] = (uint16_t)(data >> 32);
+ m_internal_ram_block0[addr + 1] = (uint16_t)(data >> 16);
+ m_internal_ram_block0[addr + 2] = (uint16_t)(data);
return;
}
else if (address >= 0x28000 && address < 0x40000)
{
// block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff
- UINT32 addr = (address & 0x7fff) * 3;
+ uint32_t addr = (address & 0x7fff) * 3;
- m_internal_ram_block1[addr + 0] = (UINT16)(data >> 32);
- m_internal_ram_block1[addr + 1] = (UINT16)(data >> 16);
- m_internal_ram_block1[addr + 2] = (UINT16)(data);
+ m_internal_ram_block1[addr + 0] = (uint16_t)(data >> 32);
+ m_internal_ram_block1[addr + 1] = (uint16_t)(data >> 16);
+ m_internal_ram_block1[addr + 2] = (uint16_t)(data);
return;
}
else {
- fatalerror("SHARC: PM Bus Write48 %08X, %04X%08X at %08X\n", address, (UINT16)(data >> 32),(UINT32)data, m_core->pc);
+ fatalerror("SHARC: PM Bus Write48 %08X, %04X%08X at %08X\n", address, (uint16_t)(data >> 32),(uint32_t)data, m_core->pc);
}
}
-UINT32 adsp21062_device::dm_read32(UINT32 address)
+uint32_t adsp21062_device::dm_read32(uint32_t address)
{
if (address < 0x100)
{
@@ -108,57 +108,57 @@ UINT32 adsp21062_device::dm_read32(UINT32 address)
}
else if (address >= 0x20000 && address < 0x28000)
{
- UINT32 addr = (address & 0x7fff) * 2;
+ uint32_t addr = (address & 0x7fff) * 2;
- return (UINT32)(m_internal_ram_block0[addr + 0] << 16) |
+ return (uint32_t)(m_internal_ram_block0[addr + 0] << 16) |
(m_internal_ram_block0[addr + 1]);
}
else if (address >= 0x28000 && address < 0x40000)
{
// block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff
- UINT32 addr = (address & 0x7fff) * 2;
+ uint32_t addr = (address & 0x7fff) * 2;
- return (UINT32)(m_internal_ram_block1[addr + 0] << 16) |
+ return (uint32_t)(m_internal_ram_block1[addr + 0] << 16) |
(m_internal_ram_block1[addr + 1]);
}
// short word addressing
else if (address >= 0x40000 && address < 0x50000)
{
- UINT32 addr = address & 0xffff;
+ uint32_t addr = address & 0xffff;
- UINT16 r = m_internal_ram_block0[addr ^ 1];
+ uint16_t r = m_internal_ram_block0[addr ^ 1];
if (m_core->mode1 & 0x4000)
{
// sign-extend
- return (INT32)(INT16)(r);
+ return (int32_t)(int16_t)(r);
}
else
{
- return (UINT32)(r);
+ return (uint32_t)(r);
}
}
else if (address >= 0x50000 && address < 0x80000)
{
// block 1 is mirrored in 0x50000...5ffff, 0x60000...0x6ffff and 0x70000...7ffff
- UINT32 addr = address & 0xffff;
+ uint32_t addr = address & 0xffff;
- UINT16 r = m_internal_ram_block1[addr ^ 1];
+ uint16_t r = m_internal_ram_block1[addr ^ 1];
if (m_core->mode1 & 0x4000)
{
// sign-extend
- return (INT32)(INT16)(r);
+ return (int32_t)(int16_t)(r);
}
else
{
- return (UINT32)(r);
+ return (uint32_t)(r);
}
}
return m_data->read_dword(address << 2);
}
-void adsp21062_device::dm_write32(UINT32 address, UINT32 data)
+void adsp21062_device::dm_write32(uint32_t address, uint32_t data)
{
if (address < 0x100)
{
@@ -167,26 +167,26 @@ void adsp21062_device::dm_write32(UINT32 address, UINT32 data)
}
else if (address >= 0x20000 && address < 0x28000)
{
- UINT32 addr = (address & 0x7fff) * 2;
+ uint32_t addr = (address & 0x7fff) * 2;
- m_internal_ram_block0[addr + 0] = (UINT16)(data >> 16);
- m_internal_ram_block0[addr + 1] = (UINT16)(data);
+ m_internal_ram_block0[addr + 0] = (uint16_t)(data >> 16);
+ m_internal_ram_block0[addr + 1] = (uint16_t)(data);
return;
}
else if (address >= 0x28000 && address < 0x40000)
{
// block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff
- UINT32 addr = (address & 0x7fff) * 2;
+ uint32_t addr = (address & 0x7fff) * 2;
- m_internal_ram_block1[addr + 0] = (UINT16)(data >> 16);
- m_internal_ram_block1[addr + 1] = (UINT16)(data);
+ m_internal_ram_block1[addr + 0] = (uint16_t)(data >> 16);
+ m_internal_ram_block1[addr + 1] = (uint16_t)(data);
return;
}
// short word addressing
else if (address >= 0x40000 && address < 0x50000)
{
- UINT32 addr = address & 0xffff;
+ uint32_t addr = address & 0xffff;
m_internal_ram_block0[addr ^ 1] = data;
return;
@@ -194,7 +194,7 @@ void adsp21062_device::dm_write32(UINT32 address, UINT32 data)
else if (address >= 0x50000 && address < 0x80000)
{
// block 1 is mirrored in 0x50000...5ffff, 0x60000...0x6ffff and 0x70000...7ffff
- UINT32 addr = address & 0xffff;
+ uint32_t addr = address & 0xffff;
m_internal_ram_block1[addr ^ 1] = data;
return;
diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx
index 0400319d10e..e3140f00352 100644
--- a/src/devices/cpu/sharc/sharcops.hxx
+++ b/src/devices/cpu/sharc/sharcops.hxx
@@ -87,7 +87,7 @@
/*****************************************************************************/
-void adsp21062_device::add_systemreg_write_latency_effect(int sysreg, UINT32 data, UINT32 prev_data)
+void adsp21062_device::add_systemreg_write_latency_effect(int sysreg, uint32_t data, uint32_t prev_data)
{
if (m_core->systemreg_latency_cycles > 0)
{
@@ -101,9 +101,9 @@ void adsp21062_device::add_systemreg_write_latency_effect(int sysreg, UINT32 dat
m_core->systemreg_previous_data = prev_data;
}
-void adsp21062_device::swap_register(UINT32 *a, UINT32 *b)
+void adsp21062_device::swap_register(uint32_t *a, uint32_t *b)
{
- UINT32 temp = *a;
+ uint32_t temp = *a;
*a = *b;
*b = temp;
}
@@ -111,14 +111,14 @@ void adsp21062_device::swap_register(UINT32 *a, UINT32 *b)
void adsp21062_device::systemreg_write_latency_effect()
{
int i;
- UINT32 data = m_core->systemreg_latency_data;
- UINT32 old_data = m_core->systemreg_previous_data;
+ uint32_t data = m_core->systemreg_latency_data;
+ uint32_t old_data = m_core->systemreg_previous_data;
switch(m_core->systemreg_latency_reg)
{
case 0xb: /* MODE1 */
{
- UINT32 oldreg = old_data;
+ uint32_t oldreg = old_data;
m_core->mode1 = data;
if ((data & 0x1) != (oldreg & 0x1))
@@ -213,12 +213,12 @@ void adsp21062_device::systemreg_write_latency_effect()
if ((data & 0x80) != (oldreg & 0x80))
{
for (i=8; i<16; i++)
- swap_register((UINT32*)&m_core->r[i].r, (UINT32*)&m_core->reg_alt[i].r);
+ swap_register((uint32_t*)&m_core->r[i].r, (uint32_t*)&m_core->reg_alt[i].r);
}
if ((data & 0x400) != (oldreg & 0x400))
{
for (i=0; i<8; i++)
- swap_register((UINT32*)&m_core->r[i].r, (UINT32*)&m_core->reg_alt[i].r);
+ swap_register((uint32_t*)&m_core->r[i].r, (uint32_t*)&m_core->reg_alt[i].r);
}
break;
}
@@ -228,7 +228,7 @@ void adsp21062_device::systemreg_write_latency_effect()
m_core->systemreg_latency_reg = -1;
}
-UINT32 adsp21062_device::GET_UREG(int ureg)
+uint32_t adsp21062_device::GET_UREG(int ureg)
{
int reg = ureg & 0xf;
switch((ureg >> 4) & 0xf)
@@ -254,7 +254,7 @@ UINT32 adsp21062_device::GET_UREG(int ureg)
{
if (reg & 0x8) /* M8 - M15 */
{
- INT32 r = m_core->dag2.m[reg & 0x7];
+ int32_t r = m_core->dag2.m[reg & 0x7];
if (r & 0x800000) r |= 0xff000000;
return r;
@@ -310,7 +310,7 @@ UINT32 adsp21062_device::GET_UREG(int ureg)
case 0xb: return m_core->mode1; /* MODE1 */
case 0xc: /* ASTAT */
{
- UINT32 r = m_core->astat;
+ uint32_t r = m_core->astat;
r &= ~0x00780000;
r |= (m_core->flag[0] << 19);
r |= (m_core->flag[1] << 20);
@@ -330,9 +330,9 @@ UINT32 adsp21062_device::GET_UREG(int ureg)
switch(reg)
{
/* PX needs to be handled separately if the whole 48 bits are needed */
- case 0xb: return (UINT32)(m_core->px); /* PX */
- case 0xc: return (UINT16)(m_core->px); /* PX1 */
- case 0xd: return (UINT32)(m_core->px >> 16); /* PX2 */
+ case 0xb: return (uint32_t)(m_core->px); /* PX */
+ case 0xc: return (uint16_t)(m_core->px); /* PX1 */
+ case 0xd: return (uint32_t)(m_core->px >> 16); /* PX2 */
default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc);
}
break;
@@ -342,7 +342,7 @@ UINT32 adsp21062_device::GET_UREG(int ureg)
}
}
-void adsp21062_device::SET_UREG(int ureg, UINT32 data)
+void adsp21062_device::SET_UREG(int ureg, uint32_t data)
{
int reg = ureg & 0xf;
switch((ureg >> 4) & 0xf)
@@ -441,7 +441,7 @@ void adsp21062_device::SET_UREG(int ureg, UINT32 data)
switch(reg)
{
case 0xc: m_core->px &= U64(0xffffffffffff0000); m_core->px |= (data & 0xffff); break; /* PX1 */
- case 0xd: m_core->px &= U64(0x000000000000ffff); m_core->px |= (UINT64)data << 16; break; /* PX2 */
+ case 0xd: m_core->px &= U64(0x000000000000ffff); m_core->px |= (uint64_t)data << 16; break; /* PX2 */
default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc);
}
break;
@@ -451,16 +451,16 @@ void adsp21062_device::SET_UREG(int ureg, UINT32 data)
}
/*****************************************************************************/
-#define SET_FLAG_SV_LSHIFT(x, shift) if((x) & ((UINT32)0xffffffff << shift)) m_core->astat |= SV
-#define SET_FLAG_SV_RSHIFT(x, shift) if((x) & ((UINT32)0xffffffff >> shift)) m_core->astat |= SV
+#define SET_FLAG_SV_LSHIFT(x, shift) if((x) & ((uint32_t)0xffffffff << shift)) m_core->astat |= SV
+#define SET_FLAG_SV_RSHIFT(x, shift) if((x) & ((uint32_t)0xffffffff >> shift)) m_core->astat |= SV
#define SET_FLAG_SZ(x) if((x) == 0) m_core->astat |= SZ
-#define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((UINT32)0xffffffff) >> (32 - (start_bit + length))))
+#define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((uint32_t)0xffffffff) >> (32 - (start_bit + length))))
void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx)
{
- INT8 shift = data & 0xff;
+ int8_t shift = data & 0xff;
int bit = data & 0x3f;
int len = (data >> 6) & 0x3f;
@@ -487,11 +487,11 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
{
if (shift < 0)
{
- REG(rn) = (shift > -32) ? ((INT32)REG(rx) >> -shift) : ((REG(rx) & 0x80000000) ? 0xffffffff : 0);
+ REG(rn) = (shift > -32) ? ((int32_t)REG(rx) >> -shift) : ((REG(rx) & 0x80000000) ? 0xffffffff : 0);
}
else
{
- REG(rn) = (shift < 32) ? ((INT32)REG(rx) << shift) : 0;
+ REG(rn) = (shift < 32) ? ((int32_t)REG(rx) << shift) : 0;
if (shift > 0)
{
m_core->astat |= SV;
@@ -506,14 +506,14 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
if (shift < 0)
{
int s = (-shift) & 0x1f;
- REG(rn) = (((UINT32)REG(rx) >> s) & ((UINT32)(0xffffffff) >> s)) |
- (((UINT32)REG(rx) << (32-s)) & ((UINT32)(0xffffffff) << (32-s)));
+ REG(rn) = (((uint32_t)REG(rx) >> s) & ((uint32_t)(0xffffffff) >> s)) |
+ (((uint32_t)REG(rx) << (32-s)) & ((uint32_t)(0xffffffff) << (32-s)));
}
else
{
int s = shift & 0x1f;
- REG(rn) = (((UINT32)REG(rx) << s) & ((UINT32)(0xffffffff) << s)) |
- (((UINT32)REG(rx) >> (32-s)) & ((UINT32)(0xffffffff) >> (32-s)));
+ REG(rn) = (((uint32_t)REG(rx) << s) & ((uint32_t)(0xffffffff) << s)) |
+ (((uint32_t)REG(rx) >> (32-s)) & ((uint32_t)(0xffffffff) >> (32-s)));
}
SET_FLAG_SZ(REG(rn));
break;
@@ -521,7 +521,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
case 0x08: /* Rn = Rn OR LSHIFT Rx BY <data8> */
{
- UINT32 r = 0;
+ uint32_t r = 0;
if(shift < 0) {
r = (shift > -32 ) ? (REG(rx) >> -shift) : 0;
} else {
@@ -539,7 +539,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
case 0x10: /* FEXT Rx BY <bit6>:<len6> */
{
- UINT32 ext = REG(rx) & MAKE_EXTRACT_MASK(bit, len);
+ uint32_t ext = REG(rx) & MAKE_EXTRACT_MASK(bit, len);
REG(rn) = ext >> bit;
SET_FLAG_SZ(REG(rn));
@@ -555,9 +555,9 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
case 0x12: /* FEXT Rx BY <bit6>:<len6> (Sign Extended) */
{
- UINT32 ext = (REG(rx) & MAKE_EXTRACT_MASK(bit, len)) >> bit;
+ uint32_t ext = (REG(rx) & MAKE_EXTRACT_MASK(bit, len)) >> bit;
if (ext & (1 << (len-1))) {
- ext |= (UINT32)0xffffffff << (len-1);
+ ext |= (uint32_t)0xffffffff << (len-1);
}
REG(rn) = ext;
@@ -571,9 +571,9 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
case 0x13: /* FDEP Rx BY Ry <bit6>:<len6> (Sign Extended) */
{
- UINT32 ext = REG(rx) & MAKE_EXTRACT_MASK(0, len);
+ uint32_t ext = REG(rx) & MAKE_EXTRACT_MASK(0, len);
if (ext & (1 << (len-1))) {
- ext |= (UINT32)0xffffffff << (len-1);
+ ext |= (uint32_t)0xffffffff << (len-1);
}
REG(rn) = ext << bit;
@@ -587,7 +587,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
case 0x19: /* Rn = Rn OR FDEP Rx BY <bit6>:<len6> */
{
- UINT32 ext = REG(rx) & MAKE_EXTRACT_MASK(0, len);
+ uint32_t ext = REG(rx) & MAKE_EXTRACT_MASK(0, len);
REG(rn) |= ext << bit;
@@ -648,7 +648,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
{
if (data < 32)
{
- UINT32 r = REG(rx) & (1 << data);
+ uint32_t r = REG(rx) & (1 << data);
SET_FLAG_SZ(r);
}
@@ -665,7 +665,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx
#include "compute.hxx"
-void adsp21062_device::COMPUTE(UINT32 opcode)
+void adsp21062_device::COMPUTE(uint32_t opcode)
{
int multiop;
int op = (opcode >> 12) & 0xff;
@@ -887,14 +887,14 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
if (shift < 0)
{
int s = (-shift) & 0x1f;
- REG(rn) = (((UINT32)REG(rx) >> s) & ((UINT32)(0xffffffff) >> s)) |
- (((UINT32)REG(rx) << (32-s)) & ((UINT32)(0xffffffff) << (32-s)));
+ REG(rn) = (((uint32_t)REG(rx) >> s) & ((uint32_t)(0xffffffff) >> s)) |
+ (((uint32_t)REG(rx) << (32-s)) & ((uint32_t)(0xffffffff) << (32-s)));
}
else
{
int s = shift & 0x1f;
- REG(rn) = (((UINT32)REG(rx) << s) & ((UINT32)(0xffffffff) << s)) |
- (((UINT32)REG(rx) >> (32-s)) & ((UINT32)(0xffffffff) >> (32-s)));
+ REG(rn) = (((uint32_t)REG(rx) << s) & ((uint32_t)(0xffffffff) << s)) |
+ (((uint32_t)REG(rx) >> (32-s)) & ((uint32_t)(0xffffffff) >> (32-s)));
if (shift > 0)
{
m_core->astat |= SV;
@@ -906,7 +906,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
case 0x08: /* Rn = Rn OR LSHIFT Rx BY Ry*/
{
- INT8 shift = REG(ry);
+ int8_t shift = REG(ry);
if(shift < 0) {
REG(rn) = REG(rn) | ((shift > -32 ) ? (REG(rx) >> -shift) : 0);
} else {
@@ -924,7 +924,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
{
int bit = REG(ry) & 0x3f;
int len = (REG(ry) >> 6) & 0x3f;
- UINT32 ext = REG(rx) & MAKE_EXTRACT_MASK(bit, len);
+ uint32_t ext = REG(rx) & MAKE_EXTRACT_MASK(bit, len);
REG(rn) = ext >> bit;
SET_FLAG_SZ(REG(rn));
@@ -939,9 +939,9 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
{
int bit = REG(ry) & 0x3f;
int len = (REG(ry) >> 6) & 0x3f;
- UINT32 ext = (REG(rx) & MAKE_EXTRACT_MASK(bit, len)) >> bit;
+ uint32_t ext = (REG(rx) & MAKE_EXTRACT_MASK(bit, len)) >> bit;
if (ext & (1 << (len-1))) {
- ext |= (UINT32)0xffffffff << (len-1);
+ ext |= (uint32_t)0xffffffff << (len-1);
}
REG(rn) = ext;
@@ -957,7 +957,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
{
int bit = REG(ry) & 0x3f;
int len = (REG(ry) >> 6) & 0x3f;
- UINT32 ext = REG(rx) & MAKE_EXTRACT_MASK(0, len);
+ uint32_t ext = REG(rx) & MAKE_EXTRACT_MASK(0, len);
REG(rn) |= ext << bit;
@@ -971,7 +971,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
case 0x30: /* BSET Rx BY Ry */
{
- UINT32 shift = REG(ry);
+ uint32_t shift = REG(ry);
REG(rn) = REG(rx);
if (shift < 32)
{
@@ -987,7 +987,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
case 0x31: /* BCLR Rx BY Ry */
{
- UINT32 shift = REG(ry);
+ uint32_t shift = REG(ry);
REG(rn) = REG(rx);
if (shift < 32)
{
@@ -1003,10 +1003,10 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
case 0x33: /* BTST Rx BY Ry */
{
- UINT32 shift = REG(ry);
+ uint32_t shift = REG(ry);
if (shift < 32)
{
- UINT32 r = REG(rx) & (1 << shift);
+ uint32_t r = REG(rx) & (1 << shift);
SET_FLAG_SZ(r);
}
@@ -1029,7 +1029,7 @@ void adsp21062_device::COMPUTE(UINT32 opcode)
}
}
-void adsp21062_device::PUSH_PC(UINT32 pc)
+void adsp21062_device::PUSH_PC(uint32_t pc)
{
m_core->pcstkp++;
if(m_core->pcstkp >= 32)
@@ -1050,7 +1050,7 @@ void adsp21062_device::PUSH_PC(UINT32 pc)
m_core->pcstack[m_core->pcstkp] = pc;
}
-UINT32 adsp21062_device::POP_PC()
+uint32_t adsp21062_device::POP_PC()
{
m_core->pcstk = m_core->pcstack[m_core->pcstkp];
@@ -1073,12 +1073,12 @@ UINT32 adsp21062_device::POP_PC()
return m_core->pcstk;
}
-UINT32 adsp21062_device::TOP_PC()
+uint32_t adsp21062_device::TOP_PC()
{
return m_core->pcstack[m_core->pcstkp];
}
-void adsp21062_device::PUSH_LOOP(UINT32 addr, UINT32 code, UINT32 type, UINT32 count)
+void adsp21062_device::PUSH_LOOP(uint32_t addr, uint32_t code, uint32_t type, uint32_t count)
{
m_core->lstkp++;
if(m_core->lstkp >= 6)
@@ -1269,8 +1269,8 @@ void adsp21062_device::sharcop_compute_dreg_dm_dreg_pm()
/* due to parallelity issues, source DREGs must be saved */
/* because the compute operation may change them */
- UINT32 parallel_pm_dreg = REG(pm_dreg);
- UINT32 parallel_dm_dreg = REG(dm_dreg);
+ uint32_t parallel_pm_dreg = REG(pm_dreg);
+ uint32_t parallel_dm_dreg = REG(dm_dreg);
if (compute)
{
@@ -1337,7 +1337,7 @@ void adsp21062_device::sharcop_compute_ureg_dmpm_premod()
{
/* due to parallelity issues, source UREG must be saved */
/* because the compute operation may change it */
- UINT32 parallel_ureg = GET_UREG(ureg);
+ uint32_t parallel_ureg = GET_UREG(ureg);
if (compute)
{
@@ -1398,7 +1398,7 @@ void adsp21062_device::sharcop_compute_ureg_dmpm_postmod()
{
/* due to parallelity issues, source UREG must be saved */
/* because the compute operation may change it */
- UINT32 parallel_ureg = GET_UREG(ureg);
+ uint32_t parallel_ureg = GET_UREG(ureg);
if (compute)
{
@@ -1497,7 +1497,7 @@ void adsp21062_device::sharcop_compute_dreg_to_dm_immmod()
/* due to parallelity issues, source REG must be saved */
/* because the shift operation may change it */
- UINT32 parallel_dreg = REG(dreg);
+ uint32_t parallel_dreg = REG(dreg);
if (IF_CONDITION_CODE(cond))
{
@@ -1561,7 +1561,7 @@ void adsp21062_device::sharcop_compute_dreg_to_pm_immmod()
/* due to parallelity issues, source REG must be saved */
/* because the compute operation may change it */
- UINT32 parallel_dreg = REG(dreg);
+ uint32_t parallel_dreg = REG(dreg);
if (IF_CONDITION_CODE(cond))
{
@@ -1598,7 +1598,7 @@ void adsp21062_device::sharcop_compute_ureg_to_ureg()
{
/* due to parallelity issues, source UREG must be saved */
/* because the compute operation may change it */
- UINT32 parallel_ureg = GET_UREG(src_ureg);
+ uint32_t parallel_ureg = GET_UREG(src_ureg);
if (compute != 0)
{
@@ -1630,7 +1630,7 @@ void adsp21062_device::sharcop_imm_shift_dreg_dmpm()
{
/* due to parallelity issues, source REG must be saved */
/* because the shift operation may change it */
- UINT32 parallel_dreg = REG(dreg);
+ uint32_t parallel_dreg = REG(dreg);
SHIFT_OPERATION_IMM(shiftop, data, rn, rx);
@@ -1725,7 +1725,7 @@ void adsp21062_device::sharcop_direct_call()
{
int j = (m_core->opcode >> 26) & 0x1;
int cond = (m_core->opcode >> 33) & 0x1f;
- UINT32 address = m_core->opcode & 0xffffff;
+ uint32_t address = m_core->opcode & 0xffffff;
if (IF_CONDITION_CODE(cond))
{
@@ -1751,7 +1751,7 @@ void adsp21062_device::sharcop_direct_jump()
int ci = (m_core->opcode >> 24) & 0x1;
int j = (m_core->opcode >> 26) & 0x1;
int cond = (m_core->opcode >> 33) & 0x1f;
- UINT32 address = m_core->opcode & 0xffffff;
+ uint32_t address = m_core->opcode & 0xffffff;
if(IF_CONDITION_CODE(cond))
{
@@ -1793,7 +1793,7 @@ void adsp21062_device::sharcop_relative_call()
{
int j = (m_core->opcode >> 26) & 0x1;
int cond = (m_core->opcode >> 33) & 0x1f;
- UINT32 address = m_core->opcode & 0xffffff;
+ uint32_t address = m_core->opcode & 0xffffff;
if (IF_CONDITION_CODE(cond))
{
@@ -1817,7 +1817,7 @@ void adsp21062_device::sharcop_relative_jump()
int ci = (m_core->opcode >> 24) & 0x1;
int j = (m_core->opcode >> 26) & 0x1;
int cond = (m_core->opcode >> 33) & 0x1f;
- UINT32 address = m_core->opcode & 0xffffff;
+ uint32_t address = m_core->opcode & 0xffffff;
if (IF_CONDITION_CODE(cond))
{
@@ -2151,10 +2151,10 @@ void adsp21062_device::sharcop_indirect_jump_compute_dreg_dm()
}
else
{
- UINT32 compute = m_core->opcode & 0x7fffff;
+ uint32_t compute = m_core->opcode & 0x7fffff;
/* due to parallelity issues, source REG must be saved */
/* because the compute operation may change it */
- UINT32 parallel_dreg = REG(dreg);
+ uint32_t parallel_dreg = REG(dreg);
if (compute)
{
@@ -2194,10 +2194,10 @@ void adsp21062_device::sharcop_relative_jump_compute_dreg_dm()
}
else
{
- UINT32 compute = m_core->opcode & 0x7fffff;
+ uint32_t compute = m_core->opcode & 0x7fffff;
/* due to parallelity issues, source REG must be saved */
/* because the compute operation may change it */
- UINT32 parallel_dreg = REG(dreg);
+ uint32_t parallel_dreg = REG(dreg);
if (compute)
{
@@ -2345,9 +2345,9 @@ void adsp21062_device::sharcop_rti()
/* do until counter expired, LCNTR immediate */
void adsp21062_device::sharcop_do_until_counter_imm()
{
- UINT16 data = (UINT16)(m_core->opcode >> 24);
+ uint16_t data = (uint16_t)(m_core->opcode >> 24);
int offset = SIGN_EXTEND24(m_core->opcode & 0xffffff);
- UINT32 address = m_core->pc + offset;
+ uint32_t address = m_core->pc + offset;
int type;
int cond = 0xf; /* until LCE (loop counter expired */
int distance = abs(offset);
@@ -2381,7 +2381,7 @@ void adsp21062_device::sharcop_do_until_counter_ureg()
{
int ureg = (m_core->opcode >> 32) & 0xff;
int offset = SIGN_EXTEND24(m_core->opcode & 0xffffff);
- UINT32 address = m_core->pc + offset;
+ uint32_t address = m_core->pc + offset;
int type;
int cond = 0xf; /* until LCE (loop counter expired */
int distance = abs(offset);
@@ -2415,7 +2415,7 @@ void adsp21062_device::sharcop_do_until()
{
int cond = (m_core->opcode >> 33) & 0x1f;
int offset = SIGN_EXTEND24(m_core->opcode & 0xffffff);
- UINT32 address = (m_core->pc + offset);
+ uint32_t address = (m_core->pc + offset);
PUSH_PC(m_core->pc+1);
PUSH_LOOP(address, cond, 0, 0);
@@ -2428,7 +2428,7 @@ void adsp21062_device::sharcop_do_until()
void adsp21062_device::sharcop_dm_to_ureg_direct()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 address = (UINT32)(m_core->opcode);
+ uint32_t address = (uint32_t)(m_core->opcode);
SET_UREG(ureg, dm_read32(address));
}
@@ -2437,7 +2437,7 @@ void adsp21062_device::sharcop_dm_to_ureg_direct()
void adsp21062_device::sharcop_ureg_to_dm_direct()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 address = (UINT32)(m_core->opcode);
+ uint32_t address = (uint32_t)(m_core->opcode);
dm_write32(address, GET_UREG(ureg));
}
@@ -2446,7 +2446,7 @@ void adsp21062_device::sharcop_ureg_to_dm_direct()
void adsp21062_device::sharcop_pm_to_ureg_direct()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 address = (UINT32)(m_core->opcode);
+ uint32_t address = (uint32_t)(m_core->opcode);
if (ureg == 0xdb) // PX is 48-bit
{
@@ -2462,7 +2462,7 @@ void adsp21062_device::sharcop_pm_to_ureg_direct()
void adsp21062_device::sharcop_ureg_to_pm_direct()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 address = (UINT32)(m_core->opcode);
+ uint32_t address = (uint32_t)(m_core->opcode);
if (ureg == 0xdb) // PX is 48-bit
{
@@ -2481,7 +2481,7 @@ void adsp21062_device::sharcop_ureg_to_pm_direct()
void adsp21062_device::sharcop_dm_to_ureg_indirect()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 offset = (UINT32)m_core->opcode;
+ uint32_t offset = (uint32_t)m_core->opcode;
int i = (m_core->opcode >> 41) & 0x7;
SET_UREG(ureg, dm_read32(DM_REG_I(i) + offset));
@@ -2491,7 +2491,7 @@ void adsp21062_device::sharcop_dm_to_ureg_indirect()
void adsp21062_device::sharcop_ureg_to_dm_indirect()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 offset = (UINT32)m_core->opcode;
+ uint32_t offset = (uint32_t)m_core->opcode;
int i = (m_core->opcode >> 41) & 0x7;
dm_write32(DM_REG_I(i) + offset, GET_UREG(ureg));
@@ -2501,7 +2501,7 @@ void adsp21062_device::sharcop_ureg_to_dm_indirect()
void adsp21062_device::sharcop_pm_to_ureg_indirect()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 offset = m_core->opcode & 0xffffff;
+ uint32_t offset = m_core->opcode & 0xffffff;
int i = (m_core->opcode >> 41) & 0x7;
if (ureg == 0xdb) /* PX is 48-bit */
@@ -2518,7 +2518,7 @@ void adsp21062_device::sharcop_pm_to_ureg_indirect()
void adsp21062_device::sharcop_ureg_to_pm_indirect()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 offset = (UINT32)m_core->opcode;
+ uint32_t offset = (uint32_t)m_core->opcode;
int i = (m_core->opcode >> 41) & 0x7;
if (ureg == 0xdb) /* PX is 48-bit */
@@ -2540,7 +2540,7 @@ void adsp21062_device::sharcop_imm_to_dmpm()
int i = (m_core->opcode >> 41) & 0x7;
int m = (m_core->opcode >> 38) & 0x7;
int g = (m_core->opcode >> 37) & 0x1;
- UINT32 data = (UINT32)m_core->opcode;
+ uint32_t data = (uint32_t)m_core->opcode;
if (g)
{
@@ -2565,7 +2565,7 @@ void adsp21062_device::sharcop_imm_to_dmpm()
void adsp21062_device::sharcop_imm_to_ureg()
{
int ureg = (m_core->opcode >> 32) & 0xff;
- UINT32 data = (UINT32)m_core->opcode;
+ uint32_t data = (uint32_t)m_core->opcode;
SET_UREG(ureg, data);
}
@@ -2578,9 +2578,9 @@ void adsp21062_device::sharcop_sysreg_bitop()
{
int bop = (m_core->opcode >> 37) & 0x7;
int sreg = (m_core->opcode >> 32) & 0xf;
- UINT32 data = (UINT32)m_core->opcode;
+ uint32_t data = (uint32_t)m_core->opcode;
- UINT32 src = GET_UREG(0x70 | sreg);
+ uint32_t src = GET_UREG(0x70 | sreg);
switch(bop)
{
@@ -2639,7 +2639,7 @@ void adsp21062_device::sharcop_modify()
{
int g = (m_core->opcode >> 38) & 0x1;
int i = (m_core->opcode >> 32) & 0x7;
- INT32 data = (m_core->opcode);
+ int32_t data = (m_core->opcode);
if (g) // PM
{
@@ -2725,5 +2725,5 @@ void adsp21062_device::sharcop_unimplemented()
char dasm[1000];
CPU_DISASSEMBLE_NAME(sharc)(nullptr, dasm, m_core->pc, nullptr, nullptr, 0);
osd_printf_debug("SHARC: %08X: %s\n", m_core->pc, dasm);
- fatalerror("SHARC: Unimplemented opcode %04X%08X at %08X\n", (UINT16)(m_core->opcode >> 32), (UINT32)(m_core->opcode), m_core->pc);
+ fatalerror("SHARC: Unimplemented opcode %04X%08X at %08X\n", (uint16_t)(m_core->opcode >> 32), (uint32_t)(m_core->opcode), m_core->pc);
}
diff --git a/src/devices/cpu/sm510/kb1013vk1-2.h b/src/devices/cpu/sm510/kb1013vk1-2.h
index 7e8c739354d..825b41f8cc3 100644
--- a/src/devices/cpu/sm510/kb1013vk1-2.h
+++ b/src/devices/cpu/sm510/kb1013vk1-2.h
@@ -23,10 +23,10 @@
class kb1013vk12_device : public sm500_device
{
public:
- kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void execute_one() override;
// opcode handlers
diff --git a/src/devices/cpu/sm510/kb1013vk1-2core.cpp b/src/devices/cpu/sm510/kb1013vk1-2core.cpp
index 1aa40b87cdb..25cb6a8288c 100644
--- a/src/devices/cpu/sm510/kb1013vk1-2core.cpp
+++ b/src/devices/cpu/sm510/kb1013vk1-2core.cpp
@@ -28,13 +28,13 @@ static ADDRESS_MAP_START(data_5x13x4, AS_DATA, 8, sm510_base_device)
ADDRESS_MAP_END
// device definitions
-kb1013vk12_device::kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+kb1013vk12_device::kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sm500_device(mconfig, KB1013VK12, "KB1013VK1-2", tag, owner, clock, 1 /* stack levels */, 11 /* prg width */, ADDRESS_MAP_NAME(program_1_8k), 7 /* data width */, ADDRESS_MAP_NAME(data_5x13x4), "kb1013vk1-2", __FILE__)
{ }
// disasm
-offs_t kb1013vk12_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t kb1013vk12_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(kb1013vk12);
return CPU_DISASSEMBLE_NAME(kb1013vk12)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/sm510/sm500.h b/src/devices/cpu/sm510/sm500.h
index 0743632609d..57924114414 100644
--- a/src/devices/cpu/sm510/sm500.h
+++ b/src/devices/cpu/sm510/sm500.h
@@ -46,11 +46,11 @@ O36 48 | * | 13 K2
class sm500_device : public sm510_base_device
{
public:
- sm500_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- sm500_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
+ sm500_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ sm500_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void execute_one() override;
virtual void get_opcode_param() override;
diff --git a/src/devices/cpu/sm510/sm500core.cpp b/src/devices/cpu/sm510/sm500core.cpp
index a5117e7a856..deb32f652f7 100644
--- a/src/devices/cpu/sm510/sm500core.cpp
+++ b/src/devices/cpu/sm510/sm500core.cpp
@@ -28,17 +28,17 @@ ADDRESS_MAP_END
// device definitions
-sm500_device::sm500_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sm500_device::sm500_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sm510_base_device(mconfig, SM500, "SM500", tag, owner, clock, 1 /* stack levels */, 11 /* prg width */, ADDRESS_MAP_NAME(program_1_2k), 6 /* data width */, ADDRESS_MAP_NAME(data_4x10x4), "sm500", __FILE__)
{ }
-sm500_device::sm500_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+sm500_device::sm500_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: sm510_base_device(mconfig, type, name, tag, owner, clock, stack_levels, prgwidth, program, datawidth, data, shortname, source)
{ }
// disasm
-offs_t sm500_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sm500_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(sm500);
return CPU_DISASSEMBLE_NAME(sm500)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/sm510/sm510.cpp b/src/devices/cpu/sm510/sm510.cpp
index 7242ef93b55..decfcce4e56 100644
--- a/src/devices/cpu/sm510/sm510.cpp
+++ b/src/devices/cpu/sm510/sm510.cpp
@@ -148,13 +148,13 @@ void sm510_base_device::device_reset()
// lcd driver
//-------------------------------------------------
-inline UINT16 sm510_base_device::get_lcd_row(int column, UINT8* ram)
+inline uint16_t sm510_base_device::get_lcd_row(int column, uint8_t* ram)
{
// output 0 if lcd blackpate/bleeder is off, or in case row doesn't exist
if (ram == nullptr || m_bc || !m_bp)
return 0;
- UINT16 rowdata = 0;
+ uint16_t rowdata = 0;
for (int i = 0; i < 0x10; i++)
rowdata |= (ram[i] >> column & 1) << i;
@@ -172,7 +172,7 @@ TIMER_CALLBACK_MEMBER(sm510_base_device::lcd_timer_cb)
m_write_segc(h | SM510_PORT_SEGC, get_lcd_row(h, m_lcd_ram_c), 0xffff);
// bs output from L/X and Y regs
- UINT8 bs = (m_l >> h & 1) | ((m_x*2) >> h & 2);
+ uint8_t bs = (m_l >> h & 1) | ((m_x*2) >> h & 2);
m_write_segbs(h | SM510_PORT_SEGBS, (m_bc || !m_bp) ? 0 : bs, 0xffff);
}
@@ -200,7 +200,7 @@ void sm510_base_device::clock_melody()
// tone cycle table (SM511/SM512 datasheet fig.5)
// cmd 0 = cmd, 1 = stop, > 13 = illegal(unknown)
- static const UINT8 lut_tone_cycles[4*16] =
+ static const uint8_t lut_tone_cycles[4*16] =
{
0, 0, 7, 8, 8, 9, 9, 10,11,11,12,13,14,14, 7*2, 8*2,
0, 0, 8, 8, 9, 9, 10,11,11,12,13,13,14,15, 8*2, 8*2,
@@ -208,8 +208,8 @@ void sm510_base_device::clock_melody()
0, 0, 8, 9, 9, 10,10,11,11,12,13,14,14,15, 8*2, 9*2
};
- UINT8 cmd = m_melody_rom[m_melody_address] & 0x3f;
- UINT8 out = 0;
+ uint8_t cmd = m_melody_rom[m_melody_address] & 0x3f;
+ uint8_t out = 0;
// clock duty cycle if tone is active
if ((cmd & 0xf) > 1)
@@ -234,7 +234,7 @@ void sm510_base_device::clock_melody()
// clock time base on F8(d7)
if ((m_div & 0x7f) == 0)
{
- UINT8 mask = (cmd & 0x20) ? 0x1f : 0x0f;
+ uint8_t mask = (cmd & 0x20) ? 0x1f : 0x0f;
m_melody_step_count = (m_melody_step_count + 1) & mask;
if (m_melody_step_count == 0)
@@ -257,7 +257,7 @@ void sm510_base_device::init_melody()
// verify melody rom
for (int i = 0; i < 0x100; i++)
{
- UINT8 data = m_melody_rom[i];
+ uint8_t data = m_melody_rom[i];
if (data & 0xc0 || (data & 0x0f) > 13)
logerror("%s unknown melody ROM data $%02X at $%02X\n", tag(), data, i);
}
diff --git a/src/devices/cpu/sm510/sm510.h b/src/devices/cpu/sm510/sm510.h
index 54b71077159..0421288f5cb 100644
--- a/src/devices/cpu/sm510/sm510.h
+++ b/src/devices/cpu/sm510/sm510.h
@@ -92,7 +92,7 @@ class sm510_base_device : public cpu_device
{
public:
// construction/destruction
- sm510_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+ sm510_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, prgwidth, 0, program)
, m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data)
@@ -126,11 +126,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; } // default 2 cycles per machine cycle
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); } // "
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; } // default 2 cycles per machine cycle
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); } // "
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
virtual void execute_one() { } // -> child class
@@ -139,8 +139,8 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : nullptr); }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 0x40; } // actually 2, but debugger doesn't like non-linear pc
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 0x40; } // actually 2, but debugger doesn't like non-linear pc
address_space_config m_program_config;
address_space_config m_data_config;
@@ -152,51 +152,51 @@ protected:
int m_prgmask;
int m_datamask;
- UINT16 m_pc, m_prev_pc;
- UINT16 m_op, m_prev_op;
- UINT8 m_param;
+ uint16_t m_pc, m_prev_pc;
+ uint16_t m_op, m_prev_op;
+ uint8_t m_param;
int m_stack_levels;
- UINT16 m_stack[2];
+ uint16_t m_stack[2];
int m_icount;
- UINT8 m_acc;
- UINT8 m_bl;
- UINT8 m_bm;
+ uint8_t m_acc;
+ uint8_t m_bl;
+ uint8_t m_bm;
bool m_sbm;
- UINT8 m_c;
+ uint8_t m_c;
bool m_skip;
- UINT8 m_w;
- UINT8 m_r;
+ uint8_t m_w;
+ uint8_t m_r;
bool m_k_active;
bool m_halt;
// lcd driver
- optional_shared_ptr<UINT8> m_lcd_ram_a, m_lcd_ram_b, m_lcd_ram_c;
+ optional_shared_ptr<uint8_t> m_lcd_ram_a, m_lcd_ram_b, m_lcd_ram_c;
devcb_write16 m_write_sega, m_write_segb, m_write_segc, m_write_segbs;
emu_timer *m_lcd_timer;
- UINT8 m_l, m_x;
- UINT8 m_y;
+ uint8_t m_l, m_x;
+ uint8_t m_y;
bool m_bp;
bool m_bc;
- UINT16 get_lcd_row(int column, UINT8* ram);
+ uint16_t get_lcd_row(int column, uint8_t* ram);
TIMER_CALLBACK_MEMBER(lcd_timer_cb);
virtual void init_lcd_driver();
// melody controller
- optional_region_ptr<UINT8> m_melody_rom;
- UINT8 m_melody_rd;
- UINT8 m_melody_step_count;
- UINT8 m_melody_duty_count;
- UINT8 m_melody_duty_index;
- UINT8 m_melody_address;
+ optional_region_ptr<uint8_t> m_melody_rom;
+ uint8_t m_melody_rd;
+ uint8_t m_melody_step_count;
+ uint8_t m_melody_duty_count;
+ uint8_t m_melody_duty_index;
+ uint8_t m_melody_address;
void clock_melody();
void init_melody();
// interrupt/divider
emu_timer *m_div_timer;
- UINT16 m_div;
+ uint16_t m_div;
bool m_1s;
bool wake_me_up();
@@ -215,12 +215,12 @@ protected:
virtual void get_opcode_param() { }
virtual void update_w_latch() { }
- UINT8 ram_r();
- void ram_w(UINT8 data);
+ uint8_t ram_r();
+ void ram_w(uint8_t data);
void pop_stack();
void push_stack();
- void do_branch(UINT8 pu, UINT8 pm, UINT8 pl);
- UINT8 bitmask(UINT16 param);
+ void do_branch(uint8_t pu, uint8_t pm, uint8_t pl);
+ uint8_t bitmask(uint16_t param);
// opcode handlers
virtual void op_lb();
@@ -295,10 +295,10 @@ protected:
class sm510_device : public sm510_base_device
{
public:
- sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void execute_one() override;
virtual void get_opcode_param() override;
@@ -309,11 +309,11 @@ protected:
class sm511_device : public sm510_base_device
{
public:
- sm511_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- sm511_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
+ sm511_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ sm511_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void execute_one() override;
virtual void get_opcode_param() override;
};
@@ -321,7 +321,7 @@ protected:
class sm512_device : public sm511_device
{
public:
- sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/sm510/sm510core.cpp b/src/devices/cpu/sm510/sm510core.cpp
index a871276c3a1..e2fdb158544 100644
--- a/src/devices/cpu/sm510/sm510core.cpp
+++ b/src/devices/cpu/sm510/sm510core.cpp
@@ -30,13 +30,13 @@ ADDRESS_MAP_END
// device definitions
-sm510_device::sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sm510_device::sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sm510_base_device(mconfig, SM510, "SM510", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_2_7k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm510", __FILE__)
{ }
// disasm
-offs_t sm510_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sm510_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(sm510);
return CPU_DISASSEMBLE_NAME(sm510)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/sm510/sm510d.cpp b/src/devices/cpu/sm510/sm510d.cpp
index ba765a716e2..ae48fa3a3e5 100644
--- a/src/devices/cpu/sm510/sm510d.cpp
+++ b/src/devices/cpu/sm510/sm510d.cpp
@@ -69,7 +69,7 @@ static const char *const s_mnemonics[] =
};
// number of bits per opcode parameter, 8 or larger means 2-byte opcode
-static const UINT8 s_bits[] =
+static const uint8_t s_bits[] =
{
0, 8,
4, 8, 0, 0, 0, 0,
@@ -99,7 +99,7 @@ static const UINT8 s_bits[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] =
+static const uint32_t s_flags[] =
{
0, 0,
0, 0, 0, 0, 0, 0,
@@ -127,7 +127,7 @@ static const UINT32 s_flags[] =
};
// next program counter in sequence (relative)
-static const INT8 s_next_pc[0x40] =
+static const int8_t s_next_pc[0x40] =
{
32, -1 /* rollback */, -1, 30, 30, -3, -3, 28, 28, -5, -5, 26, 26, -7, -7, 24,
24, -9, -9, 22, 22, -11, -11, 20, 20, -13, -13, 18, 18, -15, -15, 16,
@@ -139,16 +139,16 @@ static const INT8 s_next_pc[0x40] =
// common disasm
-static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_extended, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
+static offs_t sm510_common_disasm(const uint8_t *lut_mnemonic, const uint8_t *lut_extended, char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram)
{
// get raw opcode
- UINT8 op = oprom[0];
- UINT8 instr = lut_mnemonic[op];
+ uint8_t op = oprom[0];
+ uint8_t instr = lut_mnemonic[op];
int len = 1;
int bits = s_bits[instr];
- UINT8 mask = op & ((1 << (bits & 7)) - 1);
- UINT16 param = mask;
+ uint8_t mask = op & ((1 << (bits & 7)) - 1);
+ uint16_t param = mask;
if (bits >= 8)
{
// note: disasm view shows correct parameter, but raw view does not
@@ -181,7 +181,7 @@ static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_ex
}
else
{
- UINT16 address = (param << 4 & 0xc00) | (mask << 6 & 0x3c0) | (param & 0x03f);
+ uint16_t address = (param << 4 & 0xc00) | (mask << 6 & 0x3c0) | (param & 0x03f);
dst += sprintf(dst, "$%03X", address);
}
@@ -196,7 +196,7 @@ static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_ex
// SM510 disasm
-static const UINT8 sm510_mnemonic[0x100] =
+static const uint8_t sm510_mnemonic[0x100] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
mSKIP, mATBP, mSBM, mATPL, mRM, mRM, mRM, mRM, mADD, mADD11,mCOMA, mEXBLA,mSM, mSM, mSM, mSM, // 0
@@ -228,7 +228,7 @@ CPU_DISASSEMBLE(sm510)
// SM511 disasm
-static const UINT8 sm511_mnemonic[0x100] =
+static const uint8_t sm511_mnemonic[0x100] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
mROT, mDTA, mSBM, mATPL, mRM, mRM, mRM, mRM, mADD, mADD11,mCOMA, mEXBLA,mSM, mSM, mSM, mSM, // 0
@@ -252,7 +252,7 @@ static const UINT8 sm511_mnemonic[0x100] =
mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM, mTM // F
};
-static const UINT8 sm511_extended[0x10] =
+static const uint8_t sm511_extended[0x10] =
{
mRME, mSME, mTMEL, mATFC, mBDC, mATBP, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // 60 3
};
@@ -260,7 +260,7 @@ static const UINT8 sm511_extended[0x10] =
CPU_DISASSEMBLE(sm511)
{
// create extended opcode table
- UINT8 ext[0x100];
+ uint8_t ext[0x100];
memset(ext, 0, 0x100);
memcpy(ext + 0x30, sm511_extended, 0x10);
@@ -270,7 +270,7 @@ CPU_DISASSEMBLE(sm511)
// SM500 disasm
-static const UINT8 sm500_mnemonic[0x100] =
+static const uint8_t sm500_mnemonic[0x100] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
mSKIP, mATR, mEXKSA,mATBP, mRM, mRM, mRM, mRM, mADD, mADDC, mCOMA, mEXBLA,mSM, mSM, mSM, mSM, // 0
@@ -294,7 +294,7 @@ static const UINT8 sm500_mnemonic[0x100] =
mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS // F
};
-static const UINT8 sm500_extended[0x10] =
+static const uint8_t sm500_extended[0x10] =
{
mCEND, 0, 0, 0, mDTA, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // 5E 0
};
@@ -302,7 +302,7 @@ static const UINT8 sm500_extended[0x10] =
CPU_DISASSEMBLE(sm500)
{
// create extended opcode table
- UINT8 ext[0x100];
+ uint8_t ext[0x100];
memset(ext, 0, 0x100);
memcpy(ext + 0x00, sm500_extended, 0x10);
@@ -312,7 +312,7 @@ CPU_DISASSEMBLE(sm500)
// KB1013VK1-2 disasm
-static const UINT8 kb1013vk12_mnemonic[0x100] =
+static const uint8_t kb1013vk12_mnemonic[0x100] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
mNOP, mOAR, mBS1, mEN, mBM0, mBM0, mBM0, mBM0, mAM, mAC, mCOM, mXL, mBM1, mBM1, mBM1, mBM1, // 0
@@ -336,7 +336,7 @@ static const UINT8 kb1013vk12_mnemonic[0x100] =
mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR // F
};
-static const UINT8 kb1013vk12_extended[0x10] =
+static const uint8_t kb1013vk12_extended[0x10] =
{
mHLT, 0, 0, 0, mLDF, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // 5E 0
};
@@ -344,7 +344,7 @@ static const UINT8 kb1013vk12_extended[0x10] =
CPU_DISASSEMBLE(kb1013vk12)
{
// create extended opcode table
- UINT8 ext[0x100];
+ uint8_t ext[0x100];
memset(ext, 0, 0x100);
memcpy(ext + 0x00, kb1013vk12_extended, 0x10);
diff --git a/src/devices/cpu/sm510/sm510op.cpp b/src/devices/cpu/sm510/sm510op.cpp
index 682aacf7e1b..a18e39bac67 100644
--- a/src/devices/cpu/sm510/sm510op.cpp
+++ b/src/devices/cpu/sm510/sm510op.cpp
@@ -8,17 +8,17 @@
// internal helpers
-inline UINT8 sm510_base_device::ram_r()
+inline uint8_t sm510_base_device::ram_r()
{
int bmh = (m_sbm) ? (1 << (m_datawidth-1)) : 0; // from SBM
- UINT8 address = (bmh | m_bm << 4 | m_bl) & m_datamask;
+ uint8_t address = (bmh | m_bm << 4 | m_bl) & m_datamask;
return m_data->read_byte(address) & 0xf;
}
-inline void sm510_base_device::ram_w(UINT8 data)
+inline void sm510_base_device::ram_w(uint8_t data)
{
int bmh = (m_sbm) ? (1 << (m_datawidth-1)) : 0; // from SBM
- UINT8 address = (bmh | m_bm << 4 | m_bl) & m_datamask;
+ uint8_t address = (bmh | m_bm << 4 | m_bl) & m_datamask;
m_data->write_byte(address, data & 0xf);
}
@@ -36,13 +36,13 @@ void sm510_base_device::push_stack()
m_stack[0] = m_pc;
}
-void sm510_base_device::do_branch(UINT8 pu, UINT8 pm, UINT8 pl)
+void sm510_base_device::do_branch(uint8_t pu, uint8_t pm, uint8_t pl)
{
// set new PC(Pu/Pm/Pl)
m_pc = ((pu << 10 & 0xc00) | (pm << 6 & 0x3c0) | (pl & 0x03f)) & m_prgmask;
}
-inline UINT8 sm510_base_device::bitmask(UINT16 param)
+inline uint8_t sm510_base_device::bitmask(uint16_t param)
{
// bitmask from immediate opcode param
return 1 << (param & 3);
@@ -64,7 +64,7 @@ void sm510_base_device::op_lb()
m_bl = (m_op >> 2 & 3);
// bl(high) is still unclear, official doc is confusing
- UINT8 hi = 0;
+ uint8_t hi = 0;
switch (m_bl)
{
case 0: hi = 0; break;
@@ -90,7 +90,7 @@ void sm510_base_device::op_sbm()
void sm510_base_device::op_exbla()
{
// EXBLA: exchange BL with ACC
- UINT8 a = m_acc;
+ uint8_t a = m_acc;
m_acc = m_bl;
m_bl = a;
}
@@ -155,7 +155,7 @@ void sm510_base_device::op_tm()
// TM x: indirect subroutine call, pointers(IDX) are in page 0
m_icount--;
push_stack();
- UINT8 idx = m_program->read_byte(m_op & 0x3f);
+ uint8_t idx = m_program->read_byte(m_op & 0x3f);
do_branch(idx >> 6 & 3, 4, idx & 0x3f);
}
@@ -166,7 +166,7 @@ void sm510_base_device::op_tm()
void sm510_base_device::op_exc()
{
// EXC x: exchange ACC with RAM, xor BM with x
- UINT8 a = m_acc;
+ uint8_t a = m_acc;
m_acc = ram_r();
ram_w(a);
m_bm ^= (m_op & 3);
@@ -304,7 +304,7 @@ void sm510_base_device::op_coma()
void sm510_base_device::op_rot()
{
// ROT: rotate ACC right through carry
- UINT8 c = m_acc & 1;
+ uint8_t c = m_acc & 1;
m_acc = m_acc >> 1 | m_c << 3;
m_c = c;
}
diff --git a/src/devices/cpu/sm510/sm511core.cpp b/src/devices/cpu/sm510/sm511core.cpp
index c4c59d2d06a..b43cacf9dca 100644
--- a/src/devices/cpu/sm510/sm511core.cpp
+++ b/src/devices/cpu/sm510/sm511core.cpp
@@ -35,7 +35,7 @@ ADDRESS_MAP_END
// disasm
-offs_t sm511_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sm511_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(sm511);
return CPU_DISASSEMBLE_NAME(sm511)(this, buffer, pc, oprom, opram, options);
@@ -43,15 +43,15 @@ offs_t sm511_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
// device definitions
-sm511_device::sm511_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sm511_device::sm511_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sm510_base_device(mconfig, SM511, "SM511", tag, owner, clock, 2 /* stack levels */, 12 /* prg width */, ADDRESS_MAP_NAME(program_4k), 7 /* data width */, ADDRESS_MAP_NAME(data_96_32x4), "sm511", __FILE__)
{ }
-sm511_device::sm511_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+sm511_device::sm511_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: sm510_base_device(mconfig, type, name, tag, owner, clock, stack_levels, prgwidth, program, datawidth, data, shortname, source)
{ }
-sm512_device::sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sm512_device::sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sm511_device(mconfig, SM512, "SM512", tag, owner, clock, 2, 12, ADDRESS_MAP_NAME(program_4k), 7, ADDRESS_MAP_NAME(data_80_48x4), "sm512", __FILE__)
{ }
diff --git a/src/devices/cpu/sm8500/sm8500.cpp b/src/devices/cpu/sm8500/sm8500.cpp
index 071c7ee56cf..c03ed425dbe 100644
--- a/src/devices/cpu/sm8500/sm8500.cpp
+++ b/src/devices/cpu/sm8500/sm8500.cpp
@@ -27,12 +27,12 @@ they are internally.
const device_type SM8500 = &device_creator<sm8500_cpu_device>;
-static const UINT8 sm8500_b2w[8] = {
+static const uint8_t sm8500_b2w[8] = {
0, 8, 2, 10, 4, 12, 6, 14
};
-sm8500_cpu_device::sm8500_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+sm8500_cpu_device::sm8500_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SM8500, "SM8500", tag, owner, clock, "sm8500", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0)
, m_dma_func(*this)
@@ -53,7 +53,7 @@ void sm8500_cpu_device::get_sp()
}
-UINT8 sm8500_cpu_device::mem_readbyte( UINT32 offset ) const
+uint8_t sm8500_cpu_device::mem_readbyte( uint32_t offset ) const
{
offset &= 0xffff;
if ( offset < 0x10)
@@ -65,9 +65,9 @@ UINT8 sm8500_cpu_device::mem_readbyte( UINT32 offset ) const
}
-void sm8500_cpu_device::mem_writebyte( UINT32 offset, UINT8 data )
+void sm8500_cpu_device::mem_writebyte( uint32_t offset, uint8_t data )
{
- UINT8 i;
+ uint8_t i;
offset &= 0xffff;
if (offset < 0x10)
{
@@ -227,7 +227,7 @@ void sm8500_cpu_device::device_reset()
mem_writebyte( m_SP, X );
-void sm8500_cpu_device::take_interrupt(UINT16 vector)
+void sm8500_cpu_device::take_interrupt(uint16_t vector)
{
/* Get regs from ram */
get_sp();
@@ -341,7 +341,7 @@ void sm8500_cpu_device::process_interrupts()
}
-offs_t sm8500_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t sm8500_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( sm8500 );
return CPU_DISASSEMBLE_NAME(sm8500)(this, buffer, pc, oprom, opram, options);
@@ -353,16 +353,16 @@ void sm8500_cpu_device::execute_run()
do
{
int mycycles = 0;
- UINT8 r1,r2;
- UINT16 s1,s2;
- UINT32 d1,d2;
- UINT32 res;
+ uint8_t r1,r2;
+ uint16_t s1,s2;
+ uint32_t d1,d2;
+ uint32_t res;
debugger_instruction_hook(this, m_PC);
m_oldpc = m_PC;
process_interrupts();
if ( !m_halted ) {
- UINT8 op = mem_readbyte( m_PC++ );
+ uint8_t op = mem_readbyte( m_PC++ );
m_SYS = m_program->read_byte(0x19);
m_PS0 = m_program->read_byte(0x1e);
m_PS1 = m_program->read_byte(0x1f);
diff --git a/src/devices/cpu/sm8500/sm8500.h b/src/devices/cpu/sm8500/sm8500.h
index ab9f3c9ea65..5356b776c8c 100644
--- a/src/devices/cpu/sm8500/sm8500.h
+++ b/src/devices/cpu/sm8500/sm8500.h
@@ -26,7 +26,7 @@ class sm8500_cpu_device : public cpu_device
{
public:
// construction/destruction
- sm8500_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ sm8500_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
// static configuration helpers
template<class _Object> static devcb_base &set_dma_cb(device_t &device, _Object object) { return downcast<sm8500_cpu_device &>(device).m_dma_func.set_callback(object); }
@@ -47,23 +47,23 @@ public:
protected:
// Flags
- static const UINT8 FLAG_C = 0x80;
- static const UINT8 FLAG_Z = 0x40;
- static const UINT8 FLAG_S = 0x20;
- static const UINT8 FLAG_V = 0x10;
- static const UINT8 FLAG_D = 0x08;
- static const UINT8 FLAG_H = 0x04;
- static const UINT8 FLAG_B = 0x02;
- static const UINT8 FLAG_I = 0x01;
+ static const uint8_t FLAG_C = 0x80;
+ static const uint8_t FLAG_Z = 0x40;
+ static const uint8_t FLAG_S = 0x20;
+ static const uint8_t FLAG_V = 0x10;
+ static const uint8_t FLAG_D = 0x08;
+ static const uint8_t FLAG_H = 0x04;
+ static const uint8_t FLAG_B = 0x02;
+ static const uint8_t FLAG_I = 0x01;
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 16; }
- virtual UINT32 execute_input_lines() const override { return 11; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 16; }
+ virtual uint32_t execute_input_lines() const override { return 11; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -74,16 +74,16 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 5; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 5; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
inline void get_sp();
- UINT8 mem_readbyte(UINT32 offset) const;
- void mem_writebyte(UINT32 offset, UINT8 data);
- inline UINT16 mem_readword(UINT32 address) const { return (mem_readbyte(address ) << 8) | (mem_readbyte(address+1)); }
- inline void mem_writeword(UINT32 address, UINT16 value) { mem_writebyte(address, value >> 8); mem_writebyte(address+1, value); }
- inline void take_interrupt(UINT16 vector);
+ uint8_t mem_readbyte(uint32_t offset) const;
+ void mem_writebyte(uint32_t offset, uint8_t data);
+ inline uint16_t mem_readword(uint32_t address) const { return (mem_readbyte(address ) << 8) | (mem_readbyte(address+1)); }
+ inline void mem_writeword(uint32_t address, uint16_t value) { mem_writebyte(address, value >> 8); mem_writebyte(address+1, value); }
+ inline void take_interrupt(uint16_t vector);
void process_interrupts();
address_space_config m_program_config;
@@ -91,24 +91,24 @@ protected:
devcb_write8 m_dma_func;
devcb_write8 m_timer_func;
- UINT16 m_PC;
- UINT8 m_IE0;
- UINT8 m_IE1;
- UINT8 m_IR0;
- UINT8 m_IR1;
- UINT8 m_SYS;
- UINT8 m_CKC;
- UINT8 m_clock_changed;
- UINT16 m_SP;
- UINT8 m_PS0;
- UINT8 m_PS1;
- UINT16 m_IFLAGS;
- UINT8 m_CheckInterrupts;
+ uint16_t m_PC;
+ uint8_t m_IE0;
+ uint8_t m_IE1;
+ uint8_t m_IR0;
+ uint8_t m_IR1;
+ uint8_t m_SYS;
+ uint8_t m_CKC;
+ uint8_t m_clock_changed;
+ uint16_t m_SP;
+ uint8_t m_PS0;
+ uint8_t m_PS1;
+ uint16_t m_IFLAGS;
+ uint8_t m_CheckInterrupts;
int m_halted;
int m_icount;
address_space *m_program;
- UINT16 m_oldpc;
- UINT8 m_register_ram[0x108];
+ uint16_t m_oldpc;
+ uint8_t m_register_ram[0x108];
};
diff --git a/src/devices/cpu/sm8500/sm8500d.cpp b/src/devices/cpu/sm8500/sm8500d.cpp
index f5fc1341365..4e8bfbd2956 100644
--- a/src/devices/cpu/sm8500/sm8500d.cpp
+++ b/src/devices/cpu/sm8500/sm8500d.cpp
@@ -54,7 +54,7 @@ static const char *const s_mnemonic[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] = {
+static const uint32_t s_flags[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, _OVER, _OVER, 0,
0, 0, 0, 0, 0, 0, _OVER, 0,
@@ -69,8 +69,8 @@ static const UINT32 s_flags[] = {
struct sm8500dasm
{
- UINT8 mnemonic;
- UINT8 arguments;
+ uint8_t mnemonic;
+ uint8_t arguments;
};
static const char *const sm8500_cond[16] = {
@@ -78,7 +78,7 @@ static const char *const sm8500_cond[16] = {
"T", "GE", "GT", "UGT", "NOV", "PL", "NZ", "NC"
};
-static const UINT8 sm8500_b2w[8] = {
+static const uint8_t sm8500_b2w[8] = {
0, 8, 2, 10, 4, 12, 6, 14
};
@@ -177,10 +177,10 @@ CPU_DISASSEMBLE( sm8500 )
{
const sm8500dasm *instr;
char *dst;
- UINT8 op;
- INT8 offset;
- UINT16 ea;
- UINT16 ea2;
+ uint8_t op;
+ int8_t offset;
+ uint16_t ea;
+ uint16_t ea2;
int pos = 0;
dst = buffer;
@@ -347,11 +347,11 @@ CPU_DISASSEMBLE( sm8500 )
dst += sprintf( dst, ",rr%02Xh", sm8500_b2w[( ea >> 3 ) & 0x07] );
break;
case AM_cbr:
- offset = (INT8) oprom[pos++];
+ offset = (int8_t) oprom[pos++];
dst += sprintf( dst, "%s,$%04X", sm8500_cond[ op & 0x0F ], pc + pos + offset );
break;
case AM_rbr:
- offset = (INT8) oprom[pos++];
+ offset = (int8_t) oprom[pos++];
dst += sprintf( dst, "r%02Xh,$%04X", op & 0x07, pc + pos + offset );
break;
case AM_cjp:
@@ -466,7 +466,7 @@ CPU_DISASSEMBLE( sm8500 )
break;
case AM_Rbr:
ea = oprom[pos++];
- offset = (INT8) oprom[pos++];
+ offset = (int8_t) oprom[pos++];
dst += sprintf( dst, "R%02Xh,#%d,$%04X", ea, op & 0x07, pc + pos + offset );
break;
case AM_Rb:
@@ -525,7 +525,7 @@ CPU_DISASSEMBLE( sm8500 )
dst += sprintf( dst, "$%04X", 0xFF00 + ea2 );
}
dst += sprintf( dst, ",#%d,", ea & 0x07 );
- offset = (INT8) oprom[pos++];
+ offset = (int8_t) oprom[pos++];
dst += sprintf( dst, "$%04X", pc + pos + offset );
break;
case AM_1A:
diff --git a/src/devices/cpu/sm8500/sm85ops.h b/src/devices/cpu/sm8500/sm85ops.h
index 4ba4dab24bd..2e3d0cdcbfb 100644
--- a/src/devices/cpu/sm8500/sm85ops.h
+++ b/src/devices/cpu/sm8500/sm85ops.h
@@ -97,11 +97,11 @@
r1 = sm8500_b2w[ ( r1 >> 3 ) & 0x07 ];
#define ARG_d8 r1 = mem_readbyte( m_PC++ ); \
- s2 = m_PC + ((INT8)r1);
+ s2 = m_PC + ((int8_t)r1);
#define ARG_Rbr r1 = mem_readbyte( m_PC++ ); \
r2 = mem_readbyte( m_PC++ ); \
- s2 = m_PC + ((INT8)r2);
+ s2 = m_PC + ((int8_t)r2);
#define ARG_ad16 s2 = mem_readword( m_PC ); \
m_PC += 2;
@@ -872,7 +872,7 @@ case 0x2A: /* BBC FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: -----
if ( mem_readbyte( s1 ) & s2 ) {
mycycles += 10;
} else {
- m_PC = m_PC + ((INT8)d1);
+ m_PC = m_PC + ((int8_t)d1);
mycycles += 14;
}
if ( ( r1 & 0x38 ) == 0 ) {
@@ -882,7 +882,7 @@ case 0x2A: /* BBC FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: -----
case 0x2B: /* BBS FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: -------- */
ARG_riBd;
if ( mem_readbyte( s1 ) & s2 ) {
- m_PC = m_PC + ((INT8)d1);
+ m_PC = m_PC + ((int8_t)d1);
mycycles += 14;
} else {
mycycles += 10;
@@ -1307,7 +1307,7 @@ logerror( "%04X: DIV RRr,Rs!\n", m_PC-1 );
m_PS1 = m_PS1 & ~ ( FLAG_Z | FLAG_V );
s1 = mem_readbyte( r2 + 1 );
if ( s1 ) {
- UINT16 div = mem_readword( r1 );
+ uint16_t div = mem_readword( r1 );
res = div / s1;
mem_writebyte( r2, div % s1 );
mem_writeword( r1, res );
diff --git a/src/devices/cpu/sparc/mb86901.cpp b/src/devices/cpu/sparc/mb86901.cpp
index 17eff33b8d1..e14921dfbe2 100644
--- a/src/devices/cpu/sparc/mb86901.cpp
+++ b/src/devices/cpu/sparc/mb86901.cpp
@@ -38,7 +38,7 @@ const int mb86901_device::NWINDOWS = 7;
// mb86901_device - constructor
//-------------------------------------------------
-mb86901_device::mb86901_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+mb86901_device::mb86901_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, MB86901, "Fujitsu MB86901", tag, owner, clock, "mb86901", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 32)
, m_dasm(this, 7)
@@ -58,7 +58,7 @@ void mb86901_device::device_start()
size_t filesize = ftell(input);
fseek(input, 0, SEEK_SET);
- UINT8 *buf = new UINT8[filesize];
+ uint8_t *buf = new uint8_t[filesize];
fread(buf, 1, filesize, input);
fclose(input);
@@ -73,10 +73,10 @@ void mb86901_device::device_start()
break;
// get opcode
- UINT16 opcode = 0;
+ uint16_t opcode = 0;
for (int shift = 12; shift >= 0 && pos < filesize; shift -= 4)
{
- UINT8 digit = buf[pos];
+ uint8_t digit = buf[pos];
if (digit >= 'a' && digit <= 'z')
{
digit &= ~0x20;
@@ -139,7 +139,7 @@ void mb86901_device::device_start()
m_bp_irl = 0;
m_irq_state = 0;
- memset(m_dbgregs, 0, 24 * sizeof(UINT32));
+ memset(m_dbgregs, 0, 24 * sizeof(uint32_t));
memset(m_illegal_instruction_asr, 0, 32 * sizeof(bool));
memset(m_privileged_asr, 1, 32 * sizeof(bool));
@@ -400,8 +400,8 @@ void mb86901_device::device_reset()
PC = 0;
nPC = 4;
- memset(m_r, 0, sizeof(UINT32) * 120);
- memset(m_fpr, 0, sizeof(UINT32) * 32);
+ memset(m_r, 0, sizeof(uint32_t) * 120);
+ memset(m_fpr, 0, sizeof(uint32_t) * 32);
WIM = 0;
TBR = 0;
@@ -450,7 +450,7 @@ const address_space_config *mb86901_device::memory_space_config(address_spacenum
// a 32-bit word in a big-endian system.
//-------------------------------------------------
-UINT32 mb86901_device::read_sized_word(UINT8 asi, UINT32 address, int size)
+uint32_t mb86901_device::read_sized_word(uint8_t asi, uint32_t address, int size)
{
m_asi = asi;
if (size == 1)
@@ -477,7 +477,7 @@ UINT32 mb86901_device::read_sized_word(UINT8 asi, UINT32 address, int size)
// size handlers
//-------------------------------------------------
-void mb86901_device::write_sized_word(UINT8 asi, UINT32 address, UINT32 data, int size)
+void mb86901_device::write_sized_word(uint8_t asi, uint32_t address, uint32_t data, int size)
{
m_asi = asi;
if (size == 1)
@@ -526,7 +526,7 @@ void mb86901_device::state_string_export(const device_state_entry &entry, std::s
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 mb86901_device::disasm_min_opcode_bytes() const
+uint32_t mb86901_device::disasm_min_opcode_bytes() const
{
return 4;
}
@@ -537,7 +537,7 @@ UINT32 mb86901_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 mb86901_device::disasm_max_opcode_bytes() const
+uint32_t mb86901_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -548,9 +548,9 @@ UINT32 mb86901_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t mb86901_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t mb86901_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
- UINT32 op = *reinterpret_cast<const UINT32 *>(oprom);
+ uint32_t op = *reinterpret_cast<const uint32_t *>(oprom);
return m_dasm.dasm(buffer, pc, big_endianize_int32(op));
}
@@ -564,7 +564,7 @@ offs_t mb86901_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 mb86901_device::execute_min_cycles() const
+uint32_t mb86901_device::execute_min_cycles() const
{
return 1;
}
@@ -575,7 +575,7 @@ UINT32 mb86901_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 mb86901_device::execute_max_cycles() const
+uint32_t mb86901_device::execute_max_cycles() const
{
return 4;
}
@@ -586,7 +586,7 @@ UINT32 mb86901_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 mb86901_device::execute_input_lines() const
+uint32_t mb86901_device::execute_input_lines() const
{
return 16;
}
@@ -654,7 +654,7 @@ void mb86901_device::execute_set_input(int inputnum, int state)
// execute_add - execute an add-type opcode
//-------------------------------------------------
-void mb86901_device::execute_add(UINT32 op)
+void mb86901_device::execute_add(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 173, "Appendix C - ISP Descriptions - Add Instructions" (SPARCv8.pdf, pg. 170)
@@ -678,10 +678,10 @@ void mb86901_device::execute_add(UINT32 op)
((not result<31>) and (r[rs1]<31> or operand2<31>))
);
*/
- UINT32 rs1 = RS1REG;
- UINT32 operand2 = USEIMM ? SIMM13 : RS2REG;
+ uint32_t rs1 = RS1REG;
+ uint32_t operand2 = USEIMM ? SIMM13 : RS2REG;
- UINT32 result = 0;
+ uint32_t result = 0;
if (ADD || ADDCC)
result = rs1 + operand2;
else if (ADDX || ADDXCC)
@@ -708,7 +708,7 @@ void mb86901_device::execute_add(UINT32 op)
// opcode
//-------------------------------------------------
-void mb86901_device::execute_taddcc(UINT32 op)
+void mb86901_device::execute_taddcc(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 173, "Appendix C - ISP Descriptions - Tagged Add Instructions" (SPARCv8.pdf, pg. 170)
@@ -735,10 +735,10 @@ void mb86901_device::execute_taddcc(UINT32 op)
r[rd] <- result;
);
*/
- UINT32 rs1 = RS1REG;
- UINT32 operand2 = USEIMM ? SIMM13 : RS2REG;
+ uint32_t rs1 = RS1REG;
+ uint32_t operand2 = USEIMM ? SIMM13 : RS2REG;
- UINT32 result = rs1 + operand2;
+ uint32_t result = rs1 + operand2;
bool temp_v = (BIT31(rs1) && BIT31(operand2) && !BIT31(result)) ||
(!BIT31(rs1) && !BIT31(operand2) && BIT31(result)) ||
@@ -769,7 +769,7 @@ void mb86901_device::execute_taddcc(UINT32 op)
// opcode
//-------------------------------------------------
-void mb86901_device::execute_sub(UINT32 op)
+void mb86901_device::execute_sub(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 174, "Appendix C - ISP Descriptions - Subtract Instructions" (SPARCv8.pdf, pg. 171)
@@ -793,10 +793,10 @@ void mb86901_device::execute_sub(UINT32 op)
(result<31> and ((not r[rs1]<31>) or operand2<31>))
);
*/
- UINT32 rs1 = RS1REG;
- UINT32 operand2 = USEIMM ? SIMM13 : RS2REG;
+ uint32_t rs1 = RS1REG;
+ uint32_t operand2 = USEIMM ? SIMM13 : RS2REG;
- UINT32 result = 0;
+ uint32_t result = 0;
if (SUB || SUBCC)
result = rs1 - operand2;
else if (SUBX || SUBXCC)
@@ -823,7 +823,7 @@ void mb86901_device::execute_sub(UINT32 op)
// opcode
//--------------------------------------------------
-void mb86901_device::execute_tsubcc(UINT32 op)
+void mb86901_device::execute_tsubcc(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 174, "Appendix C - ISP Descriptions - Tagged Subtract Instructions" (SPARCv8.pdf, pg. 171)
@@ -851,10 +851,10 @@ void mb86901_device::execute_tsubcc(UINT32 op)
);
*/
- UINT32 rs1 = RS1REG;
- UINT32 operand2 = USEIMM ? SIMM13 : RS2REG;
+ uint32_t rs1 = RS1REG;
+ uint32_t operand2 = USEIMM ? SIMM13 : RS2REG;
- UINT32 result = rs1 - operand2;
+ uint32_t result = rs1 - operand2;
bool temp_v = (BIT31(rs1) && !BIT31(operand2) && !BIT31(result)) ||
(!BIT31(rs1) && BIT31(operand2) && BIT31(result)) ||
@@ -885,7 +885,7 @@ void mb86901_device::execute_tsubcc(UINT32 op)
// opcode, and/or/xor/andn/orn/xnor
//-------------------------------------------------
-void mb86901_device::execute_logical(UINT32 op)
+void mb86901_device::execute_logical(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 172, "Appendix C - ISP Descriptions - Logical Instructions" (SPARCv8.pdf, pg. 169)
@@ -909,9 +909,9 @@ void mb86901_device::execute_logical(UINT32 op)
);
*/
- UINT32 operand2 = USEIMM ? SIMM13 : RS2REG;
+ uint32_t operand2 = USEIMM ? SIMM13 : RS2REG;
- UINT32 result = 0;
+ uint32_t result = 0;
switch (OP3)
{
case OP3_AND:
@@ -957,7 +957,7 @@ void mb86901_device::execute_logical(UINT32 op)
// sll/srl/sra
//-------------------------------------------------
-void mb86901_device::execute_shift(UINT32 op)
+void mb86901_device::execute_shift(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 172, "Appendix C - ISP Descriptions - Shift Instructions" (SPARCv8.pdf, pg. 169)
@@ -970,14 +970,14 @@ void mb86901_device::execute_shift(UINT32 op)
else if (SRA and (rd != 0) ) then
r[rd] <- shift_right_arithmetic(r[rs1], shift_count)
*/
- UINT32 shift_count = USEIMM ? (SIMM13 & 31) : (RS2REG & 31);
+ uint32_t shift_count = USEIMM ? (SIMM13 & 31) : (RS2REG & 31);
if (SLL && RD != 0)
RDREG = RS1REG << shift_count;
else if (SRL && RD != 0)
- RDREG = UINT32(RS1REG) >> shift_count;
+ RDREG = uint32_t(RS1REG) >> shift_count;
else if (SRA && RD != 0)
- RDREG = INT32(RS1REG) >> shift_count;
+ RDREG = int32_t(RS1REG) >> shift_count;
}
@@ -985,7 +985,7 @@ void mb86901_device::execute_shift(UINT32 op)
// execute_mulscc - execute a multiply step opcode
//--------------------------------------------------
-void mb86901_device::execute_mulscc(UINT32 op)
+void mb86901_device::execute_mulscc(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 175, "Appendix C - ISP Descriptions - Multiply Step Instruction" (SPARCv8.pdf, pg. 172)
@@ -1010,11 +1010,11 @@ void mb86901_device::execute_mulscc(UINT32 op)
C <- (operand1<31> and operand2<31>) or
((not result<31>) and (operand1<31> or operand2<31>))
*/
- UINT32 operand1 = ((ICC_N != ICC_V) ? 0x80000000 : 0) | (RS1REG >> 1);
+ uint32_t operand1 = ((ICC_N != ICC_V) ? 0x80000000 : 0) | (RS1REG >> 1);
- UINT32 operand2 = (Y & 1) ? (USEIMM ? SIMM13 : RS2REG) : 0;
+ uint32_t operand2 = (Y & 1) ? (USEIMM ? SIMM13 : RS2REG) : 0;
- UINT32 result = operand1 + operand2;
+ uint32_t result = operand1 + operand2;
Y = ((RS1REG & 1) ? 0x80000000 : 0) | (Y >> 1);
if (RD != 0)
@@ -1035,7 +1035,7 @@ void mb86901_device::execute_mulscc(UINT32 op)
// opcode
//-------------------------------------------------
-void mb86901_device::execute_rdsr(UINT32 op)
+void mb86901_device::execute_rdsr(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 182, "Appendix C - ISP Descriptions - Read State Register Instructions" (SPARCv8.pdf, pg. 179)
@@ -1091,7 +1091,7 @@ void mb86901_device::execute_rdsr(UINT32 op)
// opcode
//-------------------------------------------------
-void mb86901_device::execute_wrsr(UINT32 op)
+void mb86901_device::execute_wrsr(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 183, "Appendix C - ISP Descriptions - Write State Register Instructions" (SPARCv8.pdf, pg. 180)
@@ -1136,9 +1136,9 @@ void mb86901_device::execute_wrsr(UINT32 op)
)
);
*/
- UINT32 operand2 = USEIMM ? SIMM13 : RS2REG;
+ uint32_t operand2 = USEIMM ? SIMM13 : RS2REG;
- UINT32 result = RS1REG ^ operand2;
+ uint32_t result = RS1REG ^ operand2;
if (WRASR && RD == 0)
{
@@ -1211,7 +1211,7 @@ void mb86901_device::execute_wrsr(UINT32 op)
// opcode
//-------------------------------------------------
-void mb86901_device::execute_rett(UINT32 op)
+void mb86901_device::execute_rett(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 181, "Appendix C - ISP Descriptions - Return from Trap Instructions" (SPARCv8.pdf, pg. 178)
@@ -1249,8 +1249,8 @@ void mb86901_device::execute_rett(UINT32 op)
)
*/
- UINT8 new_cwp = ((PSR & PSR_CWP_MASK) + 1) % NWINDOWS;
- UINT32 address = RS1REG + (USEIMM ? SIMM13 : RS2REG);
+ uint8_t new_cwp = ((PSR & PSR_CWP_MASK) + 1) % NWINDOWS;
+ uint32_t address = RS1REG + (USEIMM ? SIMM13 : RS2REG);
if (PSR & PSR_ET_MASK)
{
m_trap = 1;
@@ -1312,7 +1312,7 @@ void mb86901_device::execute_rett(UINT32 op)
// opcode
//-------------------------------------------------
-void mb86901_device::execute_saverestore(UINT32 op)
+void mb86901_device::execute_saverestore(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 177, "Appendix C - ISP Descriptions - SAVE and RESTORE Instructions" (SPARCv8.pdf, pg. 174)
@@ -1344,13 +1344,13 @@ void mb86901_device::execute_saverestore(UINT32 op)
r[rd] <- result { destination in new window }
*/
- UINT32 rs1 = RS1REG;
- UINT32 operand2 = USEIMM ? SIMM13 : RS2REG;
+ uint32_t rs1 = RS1REG;
+ uint32_t operand2 = USEIMM ? SIMM13 : RS2REG;
- UINT32 result = 0;
+ uint32_t result = 0;
if (SAVE)
{
- UINT8 new_cwp = (((PSR & PSR_CWP_MASK) + NWINDOWS) - 1) % NWINDOWS;
+ uint8_t new_cwp = (((PSR & PSR_CWP_MASK) + NWINDOWS) - 1) % NWINDOWS;
if ((WIM & (1 << new_cwp)) != 0)
{
m_trap = 1;
@@ -1365,7 +1365,7 @@ void mb86901_device::execute_saverestore(UINT32 op)
}
else if (RESTORE)
{
- UINT8 new_cwp = ((PSR & PSR_CWP_MASK) + 1) % NWINDOWS;
+ uint8_t new_cwp = ((PSR & PSR_CWP_MASK) + 1) % NWINDOWS;
if ((WIM & (1 << new_cwp)) != 0)
{
m_trap = 1;
@@ -1390,7 +1390,7 @@ void mb86901_device::execute_saverestore(UINT32 op)
// execute_jmpl - execute a jump and link opcode
//-------------------------------------------------
-void mb86901_device::execute_jmpl(UINT32 op)
+void mb86901_device::execute_jmpl(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 180, "Appendix C - ISP Descriptions - SAVE and RESTORE Instructions" (SPARCv8.pdf, pg. 177)
@@ -1406,7 +1406,7 @@ void mb86901_device::execute_jmpl(UINT32 op)
)
*/
- UINT32 jump_address = RS1REG + (USEIMM ? SIMM13 : RS2REG);
+ uint32_t jump_address = RS1REG + (USEIMM ? SIMM13 : RS2REG);
if (jump_address & 3)
{
@@ -1428,7 +1428,7 @@ void mb86901_device::execute_jmpl(UINT32 op)
// mostly ALU ops
//-------------------------------------------------
-void mb86901_device::execute_group2(UINT32 op)
+void mb86901_device::execute_group2(uint32_t op)
{
switch (OP3)
{
@@ -1569,7 +1569,7 @@ void mb86901_device::update_gpr_pointers()
// execute_store - execute a store-type opcode
//-------------------------------------------------
-void mb86901_device::execute_store(UINT32 op)
+void mb86901_device::execute_store(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 165, "Appendix C - ISP Descriptions - Store Instructions" (SPARCv8.pdf, pg. 162)
@@ -1701,8 +1701,8 @@ void mb86901_device::execute_store(UINT32 op)
m_illegal_instruction = 1;
}
- UINT32 address = 0;
- UINT8 addr_space = 0;
+ uint32_t address = 0;
+ uint8_t addr_space = 0;
if (!m_trap)
{
if (STD || ST || STH || STB || STF || STDF || STFSR || STDFQ || STCSR || STC || STDC || STDCQ)
@@ -1769,10 +1769,10 @@ void mb86901_device::execute_store(UINT32 op)
}
}
- UINT32 data0 = 0;
+ uint32_t data0 = 0;
if (!m_trap)
{
- //UINT8 byte_mask;
+ //uint8_t byte_mask;
if (STF)
{
//byte_mask = 15;
@@ -1877,7 +1877,7 @@ void mb86901_device::execute_store(UINT32 op)
}
if (!m_trap && (STD || STDA || STDF || STDC || STDFQ || STDCQ))
{
- UINT32 data1 = 0;
+ uint32_t data1 = 0;
if (STD || STDA)
{
data1 = REG(RD | 1);
@@ -1912,7 +1912,7 @@ void mb86901_device::execute_store(UINT32 op)
// execute_load - execute a load-type opcode
//-------------------------------------------------
-void mb86901_device::execute_load(UINT32 op)
+void mb86901_device::execute_load(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 163, "Appendix C - ISP Descriptions - C.9. Instruction Defintions - Load Instructions" (SPARCv8.pdf, pg. 160)
@@ -2014,8 +2014,8 @@ void mb86901_device::execute_load(UINT32 op)
);
*/
- UINT32 address = 0;
- UINT8 addr_space = 0;
+ uint32_t address = 0;
+ uint8_t addr_space = 0;
if (LDD || LD || LDSH || LDUH || LDSB || LDUB || LDDF || LDF || LDFSR || LDDC || LDC || LDCSR)
{
address = RS1REG + (USEIMM ? SIMM13 : RS2REG);
@@ -2079,10 +2079,10 @@ void mb86901_device::execute_load(UINT32 op)
}
}
- UINT32 word0(0);
+ uint32_t word0(0);
if (!m_trap)
{
- UINT32 data = read_sized_word(addr_space, address, (LD || LDD || LDA || LDDA) ? 4 : ((LDUH || LDSH || LDUHA || LDSHA) ? 2 : 1));
+ uint32_t data = read_sized_word(addr_space, address, (LD || LDD || LDA || LDDA) ? 4 : ((LDUH || LDSH || LDUHA || LDSHA) ? 2 : 1));
if (m_mae)
{
@@ -2093,26 +2093,26 @@ void mb86901_device::execute_load(UINT32 op)
{
if (LDSB || LDSBA || LDUB || LDUBA)
{
- UINT8 byte = 0;
+ uint8_t byte = 0;
if ((address & 3) == 0) byte = (data >> 24) & 0xff;
else if ((address & 3) == 1) byte = (data >> 16) & 0xff;
else if ((address & 3) == 2) byte = (data >> 8) & 0xff;
else if ((address & 3) == 3) byte = data & 0xff;
if (LDSB || LDSBA)
- word0 = (((INT32)byte) << 24) >> 24;
+ word0 = (((int32_t)byte) << 24) >> 24;
else
word0 = byte;
}
else if (LDSH || LDSHA || LDUH || LDUHA)
{
- UINT16 halfword = 0;
+ uint16_t halfword = 0;
if ((address & 3) == 0) halfword = (data >> 16) & 0xffff;
else if ((address & 3) == 2) halfword = data & 0xffff;
if (LDSH || LDSHA)
{
- word0 = (((INT32)halfword) << 16) >> 16;
+ word0 = (((int32_t)halfword) << 16) >> 16;
}
else
{
@@ -2140,7 +2140,7 @@ void mb86901_device::execute_load(UINT32 op)
if (!m_trap && (LDD || LDDA || LDDF || LDDC))
{
- UINT32 word1 = read_sized_word(addr_space, address + 4, 4);
+ uint32_t word1 = read_sized_word(addr_space, address + 4, 4);
if (MAE)
{
m_trap = 1;
@@ -2158,7 +2158,7 @@ void mb86901_device::execute_load(UINT32 op)
// instruction
//-------------------------------------------------
-void mb86901_device::execute_ldstub(UINT32 op)
+void mb86901_device::execute_ldstub(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 169, "Appendix C - ISP Descriptions - Atomic Load-Store Unsigned Byte Instructions" (SPARCv8.pdf, pg. 166)
@@ -2219,8 +2219,8 @@ void mb86901_device::execute_ldstub(UINT32 op)
);
*/
- UINT32 address = 0;
- UINT8 addr_space = 0;
+ uint32_t address = 0;
+ uint8_t addr_space = 0;
if (LDSTUB)
{
address = RS1REG + (USEIMM ? SIMM13 : RS2REG);
@@ -2245,7 +2245,7 @@ void mb86901_device::execute_ldstub(UINT32 op)
}
}
- UINT32 data(0);
+ uint32_t data(0);
if (!m_trap)
{
while (m_pb_block_ldst_byte || m_pb_block_ldst_word)
@@ -2268,7 +2268,7 @@ void mb86901_device::execute_ldstub(UINT32 op)
if (!m_trap)
{
- //UINT8 byte_mask;
+ //uint8_t byte_mask;
if ((address & 3) == 0)
{
//byte_mask = 8;
@@ -2296,7 +2296,7 @@ void mb86901_device::execute_ldstub(UINT32 op)
}
else
{
- UINT32 word;
+ uint32_t word;
if ((address & 3) == 0)
{
word = (data >> 24) & 0xff;
@@ -2325,7 +2325,7 @@ void mb86901_device::execute_ldstub(UINT32 op)
// (load/store)
//-------------------------------------------------
-void mb86901_device::execute_group3(UINT32 op)
+void mb86901_device::execute_group3(uint32_t op)
{
static const int ldst_cycles[64] = {
1, 1, 1, 2, 2, 2, 2, 3,
@@ -2405,7 +2405,7 @@ void mb86901_device::execute_group3(UINT32 op)
// condition code
//-------------------------------------------------
-bool mb86901_device::evaluate_condition(UINT32 op)
+bool mb86901_device::evaluate_condition(uint32_t op)
{
bool take = false;
bool n = ICC_N_SET;
@@ -2436,7 +2436,7 @@ bool mb86901_device::evaluate_condition(UINT32 op)
// execute_bicc - execute a branch opcode
//-------------------------------------------------
-void mb86901_device::execute_bicc(UINT32 op)
+void mb86901_device::execute_bicc(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 178, "Appendix C - ISP Descriptions - Branch on Integer Condition Instructions" (SPARCv8.pdf, pg. 175)
@@ -2471,7 +2471,7 @@ void mb86901_device::execute_bicc(UINT32 op)
*/
bool branch_taken = evaluate_condition(op);
- UINT32 pc = PC;
+ uint32_t pc = PC;
PC = nPC;
if (branch_taken)
{
@@ -2492,7 +2492,7 @@ void mb86901_device::execute_bicc(UINT32 op)
// execute_ticc - execute a conditional trap
//-------------------------------------------------
-void mb86901_device::execute_ticc(UINT32 op)
+void mb86901_device::execute_ticc(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 182, "Appendix C - ISP Descriptions - Trap on Integer Condition Instructions" (SPARCv8.pdf, pg. 179)
@@ -2531,7 +2531,7 @@ void mb86901_device::execute_ticc(UINT32 op)
bool trap_eval_icc = evaluate_condition(op);
- UINT8 trap_number = RS1REG + (USEIMM ? SIMM7 : RS2REG);
+ uint8_t trap_number = RS1REG + (USEIMM ? SIMM7 : RS2REG);
if (COND)
{
@@ -2780,7 +2780,7 @@ void mb86901_device::execute_trap()
// validity.
//-------------------------------------------------
-void mb86901_device::complete_instruction_execution(UINT32 op)
+void mb86901_device::complete_instruction_execution(uint32_t op)
{
switch (OP)
{
@@ -2811,8 +2811,8 @@ void mb86901_device::complete_instruction_execution(UINT32 op)
case OP_CALL: // call
{
- UINT32 pc = PC;
- UINT32 callpc = PC + DISP30;
+ uint32_t pc = PC;
+ uint32_t callpc = PC + DISP30;
PC = nPC;
nPC = callpc;
@@ -2838,7 +2838,7 @@ void mb86901_device::complete_instruction_execution(UINT32 op)
// fetched instruction
//-------------------------------------------------
-void mb86901_device::dispatch_instruction(UINT32 op)
+void mb86901_device::dispatch_instruction(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 159, "Appendix C - ISP Descriptions - C.6. Instruction Dispatch" (SPARCv8.pdf, pg. 156)
@@ -2896,7 +2896,7 @@ void mb86901_device::dispatch_instruction(UINT32 op)
// of a floating-point operation
//-------------------------------------------------
-void mb86901_device::complete_fp_execution(UINT32 /*op*/)
+void mb86901_device::complete_fp_execution(uint32_t /*op*/)
{
}
@@ -2984,8 +2984,8 @@ void mb86901_device::execute_step()
{
// write-state-register delay not yet implemented
- UINT32 addr_space = (IS_USER ? 8 : 9);
- UINT32 op = read_sized_word(addr_space, PC, 4);
+ uint32_t addr_space = (IS_USER ? 8 : 9);
+ uint32_t op = read_sized_word(addr_space, PC, 4);
#if LOG_FCODES
//if (m_log_fcodes)
@@ -3134,7 +3134,7 @@ void mb86901_device::execute_run()
// disassembler
//-------------------------------------------------
-UINT64 mb86901_device::get_reg_r(unsigned index) const
+uint64_t mb86901_device::get_reg_r(unsigned index) const
{
return REG(index & 31);
}
@@ -3145,7 +3145,7 @@ UINT64 mb86901_device::get_reg_r(unsigned index) const
// disassembler
//-------------------------------------------------
-UINT64 mb86901_device::get_translated_pc() const
+uint64_t mb86901_device::get_translated_pc() const
{
// FIXME: how do we apply translation to the address so it's in the same space the disassembler sees?
return m_pc;
@@ -3157,7 +3157,7 @@ UINT64 mb86901_device::get_translated_pc() const
// disassembler
//-------------------------------------------------
-UINT8 mb86901_device::get_icc() const
+uint8_t mb86901_device::get_icc() const
{
return (m_psr & PSR_ICC_MASK) >> PSR_ICC_SHIFT;
}
@@ -3168,7 +3168,7 @@ UINT8 mb86901_device::get_icc() const
// for disassembler
//-------------------------------------------------
-UINT8 mb86901_device::get_xcc() const
+uint8_t mb86901_device::get_xcc() const
{
// not present before SPARCv9
return 0;
@@ -3180,7 +3180,7 @@ UINT8 mb86901_device::get_xcc() const
// for disassembler
//-------------------------------------------------
-UINT8 mb86901_device::get_fcc(unsigned index) const
+uint8_t mb86901_device::get_fcc(unsigned index) const
{
// only one fcc instance before SPARCv9
return (m_fsr >> 10) & 3;
diff --git a/src/devices/cpu/sparc/sparc.h b/src/devices/cpu/sparc/sparc.h
index 424305a1924..07fa4cd10a4 100644
--- a/src/devices/cpu/sparc/sparc.h
+++ b/src/devices/cpu/sparc/sparc.h
@@ -25,7 +25,7 @@
class mb86901_device : public cpu_device, protected sparc_debug_state
{
public:
- mb86901_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mb86901_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override;
@@ -33,9 +33,9 @@ public:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -43,15 +43,15 @@ public:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- UINT8 get_asi() { return m_asi; }
- UINT32 pc() { return m_pc; }
+ uint8_t get_asi() { return m_asi; }
+ uint32_t pc() { return m_pc; }
template<typename T> static void add_asi_desc(device_t &device, const T &desc) { return downcast<mb86901_device &>(device).add_asi_desc(desc); }
@@ -66,41 +66,41 @@ protected:
void update_gpr_pointers();
- void execute_add(UINT32 op);
- void execute_taddcc(UINT32 op);
- void execute_sub(UINT32 op);
- void execute_tsubcc(UINT32 op);
- void execute_logical(UINT32 op);
- void execute_shift(UINT32 op);
- void execute_mulscc(UINT32 op);
- void execute_rdsr(UINT32 op);
- void execute_wrsr(UINT32 op);
- void execute_rett(UINT32 op);
- void execute_saverestore(UINT32 op);
- void execute_jmpl(UINT32 op);
+ void execute_add(uint32_t op);
+ void execute_taddcc(uint32_t op);
+ void execute_sub(uint32_t op);
+ void execute_tsubcc(uint32_t op);
+ void execute_logical(uint32_t op);
+ void execute_shift(uint32_t op);
+ void execute_mulscc(uint32_t op);
+ void execute_rdsr(uint32_t op);
+ void execute_wrsr(uint32_t op);
+ void execute_rett(uint32_t op);
+ void execute_saverestore(uint32_t op);
+ void execute_jmpl(uint32_t op);
#if SPARCV8
- void execute_mul(UINT32 op);
- void execute_div(UINT32 op);
+ void execute_mul(uint32_t op);
+ void execute_div(uint32_t op);
#endif
- void execute_group2(UINT32 op);
+ void execute_group2(uint32_t op);
- void execute_load(UINT32 op);
- void execute_store(UINT32 op);
- void execute_ldstub(UINT32 op);
+ void execute_load(uint32_t op);
+ void execute_store(uint32_t op);
+ void execute_ldstub(uint32_t op);
#if SPARCV8
- void execute_swap(UINT32 op);
+ void execute_swap(uint32_t op);
#endif
- void execute_group3(UINT32 op);
+ void execute_group3(uint32_t op);
- bool evaluate_condition(UINT32 op);
- void execute_bicc(UINT32 op);
- void execute_ticc(UINT32 op);
+ bool evaluate_condition(uint32_t op);
+ void execute_bicc(uint32_t op);
+ void execute_ticc(uint32_t op);
void select_trap();
void execute_trap();
- void complete_instruction_execution(UINT32 op);
- void dispatch_instruction(UINT32 op);
- void complete_fp_execution(UINT32 /*op*/);
+ void complete_instruction_execution(uint32_t op);
+ void dispatch_instruction(uint32_t op);
+ void complete_fp_execution(uint32_t /*op*/);
void execute_step();
void reset_step();
@@ -108,7 +108,7 @@ protected:
#if LOG_FCODES
void indent();
- void disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 handler_base, UINT32 entry_point, UINT32 stack);
+ void disassemble_ss1_fcode(uint32_t r5, uint32_t opcode, uint32_t handler_base, uint32_t entry_point, uint32_t stack);
void log_fcodes();
#endif
@@ -116,46 +116,46 @@ protected:
const address_space_config m_program_config;
// memory access
- UINT32 read_sized_word(UINT8 asi, UINT32 address, int size);
- void write_sized_word(UINT8 asi, UINT32 address, UINT32 data, int size);
+ uint32_t read_sized_word(uint8_t asi, uint32_t address, int size);
+ void write_sized_word(uint8_t asi, uint32_t address, uint32_t data, int size);
// helpers for the disassembler
- virtual UINT64 get_reg_r(unsigned index) const override;
- virtual UINT64 get_translated_pc() const override;
- virtual UINT8 get_icc() const override;
- virtual UINT8 get_xcc() const override;
- virtual UINT8 get_fcc(unsigned index) const override;
+ virtual uint64_t get_reg_r(unsigned index) const override;
+ virtual uint64_t get_translated_pc() const override;
+ virtual uint8_t get_icc() const override;
+ virtual uint8_t get_xcc() const override;
+ virtual uint8_t get_fcc(unsigned index) const override;
// general-purpose registers
- UINT32 m_r[120];
+ uint32_t m_r[120];
// FPU registers
- UINT32 m_fpr[32];
- UINT32 m_fsr;
- UINT8 m_ftt;
+ uint32_t m_fpr[32];
+ uint32_t m_fsr;
+ uint8_t m_ftt;
// control/status registers
- UINT32 m_pc;
- UINT32 m_npc;
- UINT32 m_psr;
- UINT32 m_wim;
- UINT32 m_tbr;
- UINT32 m_y;
+ uint32_t m_pc;
+ uint32_t m_npc;
+ uint32_t m_psr;
+ uint32_t m_wim;
+ uint32_t m_tbr;
+ uint32_t m_y;
bool m_bp_reset_in;
- UINT8 m_bp_irl;
+ uint8_t m_bp_irl;
bool m_bp_fpu_present;
bool m_bp_cp_present;
bool m_pb_error;
bool m_pb_block_ldst_byte;
bool m_pb_block_ldst_word;
- UINT16 m_irq_state;
+ uint16_t m_irq_state;
// trap and error registers
bool m_trap;
- UINT8 m_tt;
- UINT8 m_ticc_trap_type;
- UINT8 m_interrupt_level;
+ uint8_t m_tt;
+ uint8_t m_ticc_trap_type;
+ uint8_t m_interrupt_level;
bool m_privileged_instruction;
bool m_illegal_instruction;
bool m_mem_address_not_aligned;
@@ -179,29 +179,29 @@ protected:
bool m_reset_trap;
bool m_execute_mode;
bool m_error_mode;
- UINT8 m_fpu_sequence_err;
- UINT8 m_cp_sequence_err;
+ uint8_t m_fpu_sequence_err;
+ uint8_t m_cp_sequence_err;
// fields separated out from PSR (Processor State Register)
- UINT8 m_impl; // implementation (always 0 in MB86901)
- UINT8 m_ver; // version (always 0 in MB86901)
- UINT8 m_icc; // integer condition codes
+ uint8_t m_impl; // implementation (always 0 in MB86901)
+ uint8_t m_ver; // version (always 0 in MB86901)
+ uint8_t m_icc; // integer condition codes
bool m_ec; // enable coprocessor
bool m_ef; // enable FPU
- UINT8 m_pil; // processor interrupt level
+ uint8_t m_pil; // processor interrupt level
bool m_s; // supervisor mode
bool m_ps; // prior S state
bool m_et; // enable traps
- UINT8 m_cwp; // current window pointer
+ uint8_t m_cwp; // current window pointer
bool m_alu_op3_assigned[64];
bool m_ldst_op3_assigned[64];
// register windowing helpers
- UINT32* m_regs[32];
+ uint32_t* m_regs[32];
// addressing helpers
- UINT8 m_asi;
+ uint8_t m_asi;
// other internal states
bool m_privileged_asr[32];
@@ -212,19 +212,19 @@ protected:
int m_icount;
// debugger helpers
- UINT32 m_dbgregs[24];
+ uint32_t m_dbgregs[24];
sparc_disassembler m_dasm;
// address spaces
address_space *m_program;
#if LOG_FCODES
- UINT32 m_ss1_next_pc;
- UINT32 m_ss1_next_opcode;
- UINT32 m_ss1_next_handler_base;
- UINT32 m_ss1_next_entry_point;
- UINT32 m_ss1_next_stack;
- std::map<UINT16, std::string> m_ss1_fcode_table;
+ uint32_t m_ss1_next_pc;
+ uint32_t m_ss1_next_opcode;
+ uint32_t m_ss1_next_handler_base;
+ uint32_t m_ss1_next_entry_point;
+ uint32_t m_ss1_next_stack;
+ std::map<uint16_t, std::string> m_ss1_fcode_table;
bool m_log_fcodes;
#endif
diff --git a/src/devices/cpu/sparc/sparcdasm.cpp b/src/devices/cpu/sparc/sparcdasm.cpp
index 51f5173dfb7..38d139249be 100644
--- a/src/devices/cpu/sparc/sparcdasm.cpp
+++ b/src/devices/cpu/sparc/sparcdasm.cpp
@@ -13,11 +13,11 @@
namespace {
- INT32 get_disp16(UINT32 op) { return DISP19; }
- INT32 get_disp19(UINT32 op) { return DISP19; }
- INT32 get_disp22(UINT32 op) { return DISP19; }
+ int32_t get_disp16(uint32_t op) { return DISP19; }
+ int32_t get_disp19(uint32_t op) { return DISP19; }
+ int32_t get_disp22(uint32_t op) { return DISP19; }
- const char *bicc_comment(const sparc_debug_state *state, bool use_cc, offs_t pc, UINT32 op)
+ const char *bicc_comment(const sparc_debug_state *state, bool use_cc, offs_t pc, uint32_t op)
{
if (!state || (state->get_translated_pc() != pc)) return nullptr;
auto const cc((use_cc && (BRCC & 0x2)) ? state->get_xcc() : state->get_icc());
@@ -42,7 +42,7 @@ namespace {
}
return nullptr;
}
- const char *bfcc_comment(const sparc_debug_state *state, bool use_cc, offs_t pc, UINT32 op)
+ const char *bfcc_comment(const sparc_debug_state *state, bool use_cc, offs_t pc, uint32_t op)
{
if (!state || (state->get_translated_pc() != pc)) return nullptr;
auto const fcc(state->get_fcc(use_cc ? BRCC : 0));
@@ -67,10 +67,10 @@ namespace {
}
return nullptr;
}
- const char *bpr_comment(const sparc_debug_state *state, bool use_cc, offs_t pc, UINT32 op)
+ const char *bpr_comment(const sparc_debug_state *state, bool use_cc, offs_t pc, uint32_t op)
{
if (!state || (state->get_translated_pc() != pc)) return nullptr;
- const INT64 reg(state->get_reg_r(RS1));
+ const int64_t reg(state->get_reg_r(RS1));
switch (COND)
{
case 1: return (reg == 0) ? "will branch" : "will fall through";
@@ -568,7 +568,7 @@ const sparc_disassembler::vis_op_desc_map::value_type sparc_disassembler::VIS3B_
};
-inline UINT32 sparc_disassembler::freg(UINT32 val, bool shift) const
+inline uint32_t sparc_disassembler::freg(uint32_t val, bool shift) const
{
return (shift && (m_version >= 9)) ? ((val & 0x1e) | ((val << 5) & 0x20)) : val;
}
@@ -730,7 +730,7 @@ sparc_disassembler::sparc_disassembler(const sparc_debug_state *state, unsigned
}
-offs_t sparc_disassembler::dasm(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm(char *buf, offs_t pc, uint32_t op) const
{
switch (OP)
{
@@ -1057,7 +1057,7 @@ offs_t sparc_disassembler::dasm(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_invalid(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_invalid(char *buf, offs_t pc, uint32_t op) const
{
print(buf, "%-*s0x%08x ! ", m_op_field_width, ".word", op);
if (OP == 0)
@@ -1083,7 +1083,7 @@ offs_t sparc_disassembler::dasm_invalid(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_branch(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_branch(char *buf, offs_t pc, uint32_t op) const
{
char *ptr(buf);
const branch_desc &desc(m_branch_desc[OP2]);
@@ -1094,7 +1094,7 @@ offs_t sparc_disassembler::dasm_branch(char *buf, offs_t pc, UINT32 op) const
pad_op_field(buf, ptr);
if (desc.use_cc) print(ptr, "%s,", desc.reg_cc[BRCC]);
if (OP2 == 3) print(ptr, "%s,", REG_NAMES[RS1]);
- const INT32 disp(desc.get_disp(op));
+ const int32_t disp(desc.get_disp(op));
print(ptr, "%%pc%c0x%0*x ! 0x%08x", (disp < 0) ? '-' : '+', desc.disp_width, std::abs(disp), pc + disp);
//const char * const comment(desc.get_comment ? desc.get_comment(m_state, desc.use_cc, pc, op) : nullptr);
//if (comment) print(ptr, " - %s", comment);
@@ -1103,7 +1103,7 @@ offs_t sparc_disassembler::dasm_branch(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_shift(char *buf, offs_t pc, UINT32 op, const char *mnemonic, const char *mnemonicx, const char *mnemonicx0) const
+offs_t sparc_disassembler::dasm_shift(char *buf, offs_t pc, uint32_t op, const char *mnemonic, const char *mnemonicx, const char *mnemonicx0) const
{
if ((m_version >= 9) && USEEXT)
{
@@ -1128,7 +1128,7 @@ offs_t sparc_disassembler::dasm_shift(char *buf, offs_t pc, UINT32 op, const cha
}
-offs_t sparc_disassembler::dasm_read_state_reg(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_read_state_reg(char *buf, offs_t pc, uint32_t op) const
{
if (RS1 == 0)
{
@@ -1158,7 +1158,7 @@ offs_t sparc_disassembler::dasm_read_state_reg(char *buf, offs_t pc, UINT32 op)
else if ((m_version >= 9) && USEIMM && (RS1 == 15) && (RD == 0))
{
print(buf, "%-*s", m_op_field_width, "membar");
- UINT32 mask(MMASK | (CMASK << 4));
+ uint32_t mask(MMASK | (CMASK << 4));
if (mask == 0) print(buf, "0");
if (mask & 1) print(buf, "#LoadLoad%s", (mask >> 1) ? "|" : "");
mask >>= 1;
@@ -1179,7 +1179,7 @@ offs_t sparc_disassembler::dasm_read_state_reg(char *buf, offs_t pc, UINT32 op)
}
-offs_t sparc_disassembler::dasm_write_state_reg(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_write_state_reg(char *buf, offs_t pc, uint32_t op) const
{
if (RD == 0)
{
@@ -1242,7 +1242,7 @@ offs_t sparc_disassembler::dasm_write_state_reg(char *buf, offs_t pc, UINT32 op)
}
-offs_t sparc_disassembler::dasm_move_cond(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_move_cond(char *buf, offs_t pc, uint32_t op) const
{
if ((m_version < 9) || !MOVCC_CC_NAMES[MOVCC]) return dasm_invalid(buf, pc, op);
@@ -1257,7 +1257,7 @@ offs_t sparc_disassembler::dasm_move_cond(char *buf, offs_t pc, UINT32 op) const
return 4 | DASMFLAG_SUPPORTED;
}
-offs_t sparc_disassembler::dasm_move_reg_cond(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_move_reg_cond(char *buf, offs_t pc, uint32_t op) const
{
if ((m_version < 9) || !MOVE_INT_COND_MNEMONICS[RCOND]) return dasm_invalid(buf, pc, op);
@@ -1270,7 +1270,7 @@ offs_t sparc_disassembler::dasm_move_reg_cond(char *buf, offs_t pc, UINT32 op) c
}
-offs_t sparc_disassembler::dasm_fpop1(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_fpop1(char *buf, offs_t pc, uint32_t op) const
{
const auto it(m_fpop1_desc.find(OPF));
if (it == m_fpop1_desc.end()) return dasm_invalid(buf, pc, op);
@@ -1283,7 +1283,7 @@ offs_t sparc_disassembler::dasm_fpop1(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_fpop2(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_fpop2(char *buf, offs_t pc, uint32_t op) const
{
// Move Floating-Point Register on Condition
if ((m_version >= 9) && (((op >> 18) & 1) == 0) && MOVCC_CC_NAMES[OPFCC])
@@ -1334,7 +1334,7 @@ offs_t sparc_disassembler::dasm_fpop2(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_impdep1(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_impdep1(char *buf, offs_t pc, uint32_t op) const
{
const auto it(m_vis_op_desc.find(OPF));
if (it != m_vis_op_desc.end())
@@ -1384,7 +1384,7 @@ offs_t sparc_disassembler::dasm_impdep1(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_jmpl(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_jmpl(char *buf, offs_t pc, uint32_t op) const
{
if (USEIMM && (RD == 0) && ((RS1 == 15) || (RS1 == 31)) && (SIMM13 == 8))
{
@@ -1401,7 +1401,7 @@ offs_t sparc_disassembler::dasm_jmpl(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_return(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_return(char *buf, offs_t pc, uint32_t op) const
{
print(buf, "%-*s", m_op_field_width, (m_version >= 9) ? "return" : "rett");
dasm_address(buf, op);
@@ -1409,7 +1409,7 @@ offs_t sparc_disassembler::dasm_return(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_tcc(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_tcc(char *buf, offs_t pc, uint32_t op) const
{
static const char *const tcc_names[16] = {
"tn", "te", "tle", "tl", "tleu", "tcs", "tneg", "tvs",
@@ -1442,7 +1442,7 @@ offs_t sparc_disassembler::dasm_tcc(char *buf, offs_t pc, UINT32 op) const
}
-offs_t sparc_disassembler::dasm_ldst(char *buf, offs_t pc, UINT32 op) const
+offs_t sparc_disassembler::dasm_ldst(char *buf, offs_t pc, uint32_t op) const
{
if (m_version >= 9)
{
@@ -1582,7 +1582,7 @@ offs_t sparc_disassembler::dasm_ldst(char *buf, offs_t pc, UINT32 op) const
}
-void sparc_disassembler::dasm_address(char *&output, UINT32 op) const
+void sparc_disassembler::dasm_address(char *&output, uint32_t op) const
{
if (USEIMM)
{
@@ -1598,7 +1598,7 @@ void sparc_disassembler::dasm_address(char *&output, UINT32 op) const
}
-void sparc_disassembler::dasm_asi(char *&output, UINT32 op) const
+void sparc_disassembler::dasm_asi(char *&output, uint32_t op) const
{
if (USEIMM)
{
@@ -1615,7 +1615,7 @@ void sparc_disassembler::dasm_asi(char *&output, UINT32 op) const
}
-void sparc_disassembler::dasm_asi_comment(char *&output, UINT32 op) const
+void sparc_disassembler::dasm_asi_comment(char *&output, uint32_t op) const
{
if (!USEIMM)
{
@@ -1626,7 +1626,7 @@ void sparc_disassembler::dasm_asi_comment(char *&output, UINT32 op) const
}
-void sparc_disassembler::dasm_vis_arg(char *&output, bool &args, vis_op_desc::arg fmt, UINT32 reg) const
+void sparc_disassembler::dasm_vis_arg(char *&output, bool &args, vis_op_desc::arg fmt, uint32_t reg) const
{
switch (fmt)
{
diff --git a/src/devices/cpu/sparc/sparcdasm.h b/src/devices/cpu/sparc/sparcdasm.h
index 1235496d453..5b545325967 100644
--- a/src/devices/cpu/sparc/sparcdasm.h
+++ b/src/devices/cpu/sparc/sparcdasm.h
@@ -15,11 +15,11 @@
class sparc_debug_state
{
public:
- virtual UINT64 get_reg_r(unsigned index) const = 0;
- virtual UINT64 get_translated_pc() const = 0;
- virtual UINT8 get_icc() const = 0;
- virtual UINT8 get_xcc() const = 0;
- virtual UINT8 get_fcc(unsigned index) const = 0; // ?><=
+ virtual uint64_t get_reg_r(unsigned index) const = 0;
+ virtual uint64_t get_translated_pc() const = 0;
+ virtual uint8_t get_icc() const = 0;
+ virtual uint8_t get_xcc() const = 0;
+ virtual uint8_t get_fcc(unsigned index) const = 0; // ?><=
protected:
~sparc_debug_state() { }
@@ -38,7 +38,7 @@ public:
const char *name = nullptr;
const char *desc = nullptr;
};
- typedef std::map<UINT8, asi_desc> asi_desc_map;
+ typedef std::map<uint8_t, asi_desc> asi_desc_map;
struct state_reg_desc
{
@@ -48,7 +48,7 @@ public:
const char *read_name = nullptr;
const char *write_name = nullptr;
};
- typedef std::map<UINT8, state_reg_desc> state_reg_desc_map;
+ typedef std::map<uint8_t, state_reg_desc> state_reg_desc_map;
struct prftch_desc
{
@@ -56,7 +56,7 @@ public:
prftch_desc(const char *name_) : name(name_) { }
const char *name = nullptr;
};
- typedef std::map<UINT8, prftch_desc> prftch_desc_map;
+ typedef std::map<uint8_t, prftch_desc> prftch_desc_map;
sparc_disassembler(const sparc_debug_state *state, unsigned version);
sparc_disassembler(const sparc_debug_state *state, unsigned version, vis_level vis);
@@ -106,13 +106,13 @@ public:
}
}
- offs_t dasm(char *buf, offs_t pc, UINT32 op) const;
+ offs_t dasm(char *buf, offs_t pc, uint32_t op) const;
private:
struct branch_desc
{
- INT32 (*get_disp)(UINT32 op);
- const char * (*get_comment)(const sparc_debug_state *state, bool use_cc, offs_t pc, UINT32 op);
+ int32_t (*get_disp)(uint32_t op);
+ const char * (*get_comment)(const sparc_debug_state *state, bool use_cc, offs_t pc, uint32_t op);
int disp_width;
bool use_pred, use_cc;
const char *reg_cc[4];
@@ -125,7 +125,7 @@ private:
const char *mnemonic;
const char *g0_synth;
};
- typedef std::map<UINT8, int_op_desc> int_op_desc_map;
+ typedef std::map<uint8_t, int_op_desc> int_op_desc_map;
struct fpop1_desc
{
@@ -137,7 +137,7 @@ private:
bool rd_shift = false;
const char *mnemonic = nullptr;
};
- typedef std::map<UINT16, fpop1_desc> fpop1_desc_map;
+ typedef std::map<uint16_t, fpop1_desc> fpop1_desc_map;
struct fpop2_desc
{
@@ -147,7 +147,7 @@ private:
bool shift = false;
const char *mnemonic = nullptr;
};
- typedef std::map<UINT16, fpop2_desc> fpop2_desc_map;
+ typedef std::map<uint16_t, fpop2_desc> fpop2_desc_map;
struct ldst_desc
{
@@ -160,7 +160,7 @@ private:
const char *mnemonic = nullptr;
const char *g0_synth = nullptr;
};
- typedef std::map<UINT8, ldst_desc> ldst_desc_map;
+ typedef std::map<uint8_t, ldst_desc> ldst_desc_map;
struct vis_op_desc
{
@@ -173,29 +173,29 @@ private:
bool collapse = false;
const char *mnemonic = nullptr;
};
- typedef std::map<UINT16, vis_op_desc> vis_op_desc_map;
+ typedef std::map<uint16_t, vis_op_desc> vis_op_desc_map;
- offs_t dasm_invalid(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_branch(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_shift(char *buf, offs_t pc, UINT32 op, const char *mnemonic, const char *mnemonicx, const char *mnemonicx0) const;
- offs_t dasm_read_state_reg(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_write_state_reg(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_move_cond(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_move_reg_cond(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_fpop1(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_fpop2(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_impdep1(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_jmpl(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_return(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_tcc(char *buf, offs_t pc, UINT32 op) const;
- offs_t dasm_ldst(char *buf, offs_t pc, UINT32 op) const;
+ offs_t dasm_invalid(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_branch(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_shift(char *buf, offs_t pc, uint32_t op, const char *mnemonic, const char *mnemonicx, const char *mnemonicx0) const;
+ offs_t dasm_read_state_reg(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_write_state_reg(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_move_cond(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_move_reg_cond(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_fpop1(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_fpop2(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_impdep1(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_jmpl(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_return(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_tcc(char *buf, offs_t pc, uint32_t op) const;
+ offs_t dasm_ldst(char *buf, offs_t pc, uint32_t op) const;
- void dasm_address(char *&output, UINT32 op) const;
- void dasm_asi(char *&output, UINT32 op) const;
- void dasm_asi_comment(char *&output, UINT32 op) const;
- void dasm_vis_arg(char *&output, bool &args, vis_op_desc::arg fmt, UINT32 reg) const;
+ void dasm_address(char *&output, uint32_t op) const;
+ void dasm_asi(char *&output, uint32_t op) const;
+ void dasm_asi_comment(char *&output, uint32_t op) const;
+ void dasm_vis_arg(char *&output, bool &args, vis_op_desc::arg fmt, uint32_t reg) const;
- UINT32 freg(UINT32 val, bool shift) const;
+ uint32_t freg(uint32_t val, bool shift) const;
template <typename T> void add_int_op_desc(const T &desc);
template <typename T> void add_fpop1_desc(const T &desc);
diff --git a/src/devices/cpu/sparc/sparcdefs.h b/src/devices/cpu/sparc/sparcdefs.h
index e7c1a5b1ab0..823fb3e52f3 100644
--- a/src/devices/cpu/sparc/sparcdefs.h
+++ b/src/devices/cpu/sparc/sparcdefs.h
@@ -88,18 +88,18 @@
#define OPC ((op >> 5) & 0x1ff)
#define OPFLOW ((op >> 5) & 0x3f)
-#define DISP30 (INT32(op << 2))
-#define DISP22 (INT32(op << 10) >> 8)
-#define DISP19 (INT32(op << 13) >> 11)
-#define DISP16 (INT32(((op << 10) & 0xc0000000) | ((op << 16) & 0x3fff0000)) >> 14)
+#define DISP30 (int32_t(op << 2))
+#define DISP22 (int32_t(op << 10) >> 8)
+#define DISP19 (int32_t(op << 13) >> 11)
+#define DISP16 (int32_t(((op << 10) & 0xc0000000) | ((op << 16) & 0x3fff0000)) >> 14)
#define IMM22 (op << 10)
#define CONST22 (op & 0x3fffff)
-#define SIMM13 (INT32(op << 19) >> 19)
-#define SIMM11 (INT32(op << 21) >> 21)
-#define SIMM10 (INT32(op << 22) >> 22)
-#define SIMM8 (INT32(op << 24) >> 24)
+#define SIMM13 (int32_t(op << 19) >> 19)
+#define SIMM11 (int32_t(op << 21) >> 21)
+#define SIMM10 (int32_t(op << 22) >> 22)
+#define SIMM8 (int32_t(op << 24) >> 24)
#define IMM7 (op & 0x7f)
-#define SIMM7 (INT32(op << 25) >> 25)
+#define SIMM7 (int32_t(op << 25) >> 25)
#define SHCNT32 (op & 31)
#define SHCNT64 (op & 63)
#define IAMODE (op & 0x7)
diff --git a/src/devices/cpu/sparc/sparcv8ops.ipp b/src/devices/cpu/sparc/sparcv8ops.ipp
index 1f42c7b0cb2..28149ef6778 100644
--- a/src/devices/cpu/sparc/sparcv8ops.ipp
+++ b/src/devices/cpu/sparc/sparcv8ops.ipp
@@ -11,7 +11,7 @@
// execute_swap - execute a swap instruction
//-------------------------------------------------
-void mb86901_device::execute_swap(UINT32 op)
+void mb86901_device::execute_swap(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 169, "Appendix C - ISP Descriptions - Atomic Load-Store Unsigned Byte Instructions" (SPARCv8.pdf, pg. 166)
@@ -62,8 +62,8 @@ void mb86901_device::execute_swap(UINT32 op)
);
*/
- UINT32 address = 0;
- UINT8 addr_space = 0;
+ uint32_t address = 0;
+ uint8_t addr_space = 0;
if (SWAP)
{
address = RS1REG + (USEIMM ? SIMM13 : RS2REG);
@@ -88,8 +88,8 @@ void mb86901_device::execute_swap(UINT32 op)
}
}
- UINT32 word = 0;
- UINT32 temp = 0;
+ uint32_t word = 0;
+ uint32_t temp = 0;
if (!m_trap)
{
temp = RDREG;
@@ -134,7 +134,7 @@ void mb86901_device::execute_swap(UINT32 op)
// execute_mul - execute a multiply opcode
//-------------------------------------------------
-void mb86901_device::execute_mul(UINT32 op)
+void mb86901_device::execute_mul(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 175, "Appendix C - ISP Descriptions - Multiply Instructions" (SPARCv8.pdf, pg. 172)
@@ -154,20 +154,20 @@ void mb86901_device::execute_mul(UINT32 op)
);
*/
- UINT32 operand2 = (USEIMM ? SIMM13 : RS2REG);
+ uint32_t operand2 = (USEIMM ? SIMM13 : RS2REG);
- UINT32 result = 0;
+ uint32_t result = 0;
if (UMUL || UMULCC)
{
- UINT64 dresult = (UINT64)RS1REG * (UINT64)operand2;
- Y = (UINT32)(dresult >> 32);
- result = (UINT32)dresult;
+ uint64_t dresult = (uint64_t)RS1REG * (uint64_t)operand2;
+ Y = (uint32_t)(dresult >> 32);
+ result = (uint32_t)dresult;
}
else if (SMUL || SMULCC)
{
- INT64 dresult = (INT64)(INT32)RS1REG * (INT64)(INT32)operand2;
- Y = (UINT32)(dresult >> 32);
- result = (UINT32)dresult;
+ int64_t dresult = (int64_t)(int32_t)RS1REG * (int64_t)(int32_t)operand2;
+ Y = (uint32_t)(dresult >> 32);
+ result = (uint32_t)dresult;
}
if (RD != 0)
@@ -187,7 +187,7 @@ void mb86901_device::execute_mul(UINT32 op)
// execute_div - execute a divide opcode
//-------------------------------------------------
-void mb86901_device::execute_div(UINT32 op)
+void mb86901_device::execute_div(uint32_t op)
{
/* The SPARC Instruction Manual: Version 8, page 176, "Appendix C - ISP Descriptions - Multiply Instructions" (SPARCv8.pdf, pg. 173)
@@ -234,7 +234,7 @@ void mb86901_device::execute_div(UINT32 op)
);
*/
- UINT32 operand2 = (USEIMM ? SIMM13 : RS2REG);
+ uint32_t operand2 = (USEIMM ? SIMM13 : RS2REG);
if (operand2 == 0)
{
@@ -243,24 +243,24 @@ void mb86901_device::execute_div(UINT32 op)
}
else
{
- UINT32 result = 0;
+ uint32_t result = 0;
bool temp_v = false;
- INT64 temp_64bit;
+ int64_t temp_64bit;
if (UDIV || UDIVCC)
{
- temp_64bit = INT64(UINT64((UINT64(Y) << 32) | UINT64(RS1REG)) / operand2);
+ temp_64bit = int64_t(uint64_t((uint64_t(Y) << 32) | uint64_t(RS1REG)) / operand2);
- result = UINT32(temp_64bit);
+ result = uint32_t(temp_64bit);
temp_v = ((temp_64bit & 0xffffffff00000000) == 0) ? false : true;
}
else if (SDIV || SDIVCC)
{
- temp_64bit = INT64(INT64((UINT64(Y) << 32) | UINT64(RS1REG)) / operand2);
+ temp_64bit = int64_t(int64_t((uint64_t(Y) << 32) | uint64_t(RS1REG)) / operand2);
- result = UINT32(temp_64bit);
+ result = uint32_t(temp_64bit);
- UINT64 shifted = UINT64(temp_64bit) >> 31;
+ uint64_t shifted = uint64_t(temp_64bit) >> 31;
temp_v = (shifted == 0 || shifted == 0x1ffffffff) ? false : true;
}
diff --git a/src/devices/cpu/sparc/ss1fcode.ipp b/src/devices/cpu/sparc/ss1fcode.ipp
index bbe6eec23a9..d9457742340 100644
--- a/src/devices/cpu/sparc/ss1fcode.ipp
+++ b/src/devices/cpu/sparc/ss1fcode.ipp
@@ -14,7 +14,7 @@ void mb86901_device::log_fcodes()
if (PC == 0xffef0000)
{
- UINT32 opcode = read_sized_word(11, REG(5), 2);
+ uint32_t opcode = read_sized_word(11, REG(5), 2);
if (!(REG(5) & 2))
{
opcode >>= 16;
@@ -33,10 +33,10 @@ void mb86901_device::log_fcodes()
//{
// m_log_fcodes = false;
//}
- UINT32 handler_base = opcode << 2;
+ uint32_t handler_base = opcode << 2;
handler_base += REG(2); // l1 = r2 + opcode << 2
- UINT32 entry_point = read_sized_word(11, handler_base, 2);
+ uint32_t entry_point = read_sized_word(11, handler_base, 2);
if (!(handler_base & 2))
{
entry_point >>= 16;
@@ -59,7 +59,7 @@ void mb86901_device::log_fcodes()
void mb86901_device::indent()
{
- UINT32 program_depth = (0xffeff000 - (REG(6) - 4)) / 4;
+ uint32_t program_depth = (0xffeff000 - (REG(6) - 4)) / 4;
if (program_depth < 15)
return;
@@ -71,7 +71,7 @@ void mb86901_device::indent()
}
}
-void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 handler_base, UINT32 entry_point, UINT32 stack)
+void mb86901_device::disassemble_ss1_fcode(uint32_t r5, uint32_t opcode, uint32_t handler_base, uint32_t entry_point, uint32_t stack)
{
std::string opdesc = m_ss1_fcode_table[opcode];
if (opdesc.length() == 0)
@@ -82,11 +82,11 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
indent(); printf("Data Return\n");
indent(); printf("-------- --------\n");
- UINT32 data_stack[8];
- UINT32 return_stack[8];
+ uint32_t data_stack[8];
+ uint32_t return_stack[8];
- UINT32 data_entries = (0xffefebe4 - (stack - 4)) / 4;
- UINT32 return_entries = (0xffeff000 - (REG(6) - 4)) / 4;
+ uint32_t data_entries = (0xffefebe4 - (stack - 4)) / 4;
+ uint32_t return_entries = (0xffeff000 - (REG(6) - 4)) / 4;
data_stack[0] = REG(4);
for (int i = 0; i < data_entries && i < 7; i++)
@@ -100,7 +100,7 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
return_stack[i] = read_sized_word(11, REG(6) + i * 4, 4);
}
- UINT32 total_lines = 0;
+ uint32_t total_lines = 0;
if (data_entries > total_lines)
total_lines = data_entries;
@@ -124,12 +124,12 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
printf("\n");
}
- UINT32 base = 0xffe87954;
- UINT32 exact_op = (r5 - base) / 4;
- UINT32 base_op = exact_op;
+ uint32_t base = 0xffe87954;
+ uint32_t exact_op = (r5 - base) / 4;
+ uint32_t base_op = exact_op;
while (m_ss1_fcode_table[base_op].length() == 0)
base_op--;
- UINT32 dist = (exact_op - base_op) * 4;
+ uint32_t dist = (exact_op - base_op) * 4;
if (entry_point == 0xffe87964)
{
@@ -143,8 +143,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
}
else if (entry_point == 0xffe8799c)
{
- UINT32 address = handler_base + 2;
- UINT32 half = read_sized_word(11, address, 2);
+ uint32_t address = handler_base + 2;
+ uint32_t half = read_sized_word(11, address, 2);
if (!(address & 2)) half >>= 16;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; add halfword at handler_base+2 (%04x) to VM base pointer (%08x) and push onto stack (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), half, REG(3), REG(3) + half);
@@ -152,34 +152,34 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
}
else if (entry_point == 0xffe879e4)
{
- UINT32 address = handler_base + 2;
- UINT32 half0 = read_sized_word(11, address, 2);
+ uint32_t address = handler_base + 2;
+ uint32_t half0 = read_sized_word(11, address, 2);
if (address & 2) half0 <<= 16;
address = handler_base + 4;
- UINT32 half1 = read_sized_word(11, address, 2);
+ uint32_t half1 = read_sized_word(11, address, 2);
if (!(address & 2)) half1 >>= 16;
- UINT32 value = half0 | half1;
+ uint32_t value = half0 | half1;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; push immediate word from handler table (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack - 4, (0xffefebe4 - (stack - 4)) / 4);
}
else if (entry_point == 0xffe879c4)
{
- UINT32 address = handler_base + 2;
- UINT32 l0 = read_sized_word(11, address, 2);
+ uint32_t address = handler_base + 2;
+ uint32_t l0 = read_sized_word(11, address, 2);
if (!(address & 2)) l0 >>= 16;
address = REG(3) + l0;
- UINT32 handler_base_2 = read_sized_word(11, address, 2);
+ uint32_t handler_base_2 = read_sized_word(11, address, 2);
if (!(address & 2)) handler_base_2 >>= 16;
address = REG(2) + (handler_base_2 << 2);
- UINT32 l0_2 = read_sized_word(11, address, 2);
+ uint32_t l0_2 = read_sized_word(11, address, 2);
if (!(address & 2)) l0_2 >>= 16;
- UINT32 dest = REG(2) + (l0_2 << 2);
+ uint32_t dest = REG(2) + (l0_2 << 2);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; SPARC branch to %08x, calcs: g2(%08x) + halfword[g2(%04x) + (halfword[g3(%08x) + halfword[entry_point(%04x) + 2](%04x)](%04x) << 2)](%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), dest, REG(2), REG(2), REG(3), handler_base, l0, handler_base_2, l0_2);
indent(); printf(" // target func: %08x\n", l0_2 << 2);
@@ -196,15 +196,15 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
}
else if (entry_point == 0xffe8c838)
{
- UINT32 address = handler_base + 2;
- UINT32 half0 = read_sized_word(11, address, 2);
+ uint32_t address = handler_base + 2;
+ uint32_t half0 = read_sized_word(11, address, 2);
if (address & 2) half0 <<= 16;
address = handler_base + 4;
- UINT32 half1 = read_sized_word(11, address, 2);
+ uint32_t half1 = read_sized_word(11, address, 2);
if (!(address & 2)) half1 >>= 16;
- UINT32 value = half0 | half1;
+ uint32_t value = half0 | half1;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; add 32-bit word (%08x) from handler table to top of stack (%08x + %08x = %08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4), value, REG(4) + value);
}
@@ -214,15 +214,15 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
{
case 0x003f:
{
- UINT32 address = r5 + 2;
- UINT32 half0 = read_sized_word(11, address, 2);
+ uint32_t address = r5 + 2;
+ uint32_t half0 = read_sized_word(11, address, 2);
if (address & 2) half0 <<= 16;
address = r5 + 4;
- UINT32 half1 = read_sized_word(11, address, 2);
+ uint32_t half1 = read_sized_word(11, address, 2);
if (!(address & 2)) half1 >>= 16;
- UINT32 value = half0 | half1;
+ uint32_t value = half0 | half1;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; push immediate word from instructions (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack - 4, (0xffefebe4 - (stack - 4)) / 4);
@@ -231,8 +231,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x004b:
{
- UINT32 address = r5 + 2;
- UINT32 value = read_sized_word(11, address, 2);
+ uint32_t address = r5 + 2;
+ uint32_t value = read_sized_word(11, address, 2);
if (!(address & 2)) value >>= 16;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; push immediate halfword from instructions (%04x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value);
@@ -242,8 +242,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0055:
{
- UINT32 address = REG(4);
- UINT32 new_opcode = read_sized_word(11, address, 2);
+ uint32_t address = REG(4);
+ uint32_t new_opcode = read_sized_word(11, address, 2);
if (!(address & 2)) new_opcode >>= 16;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; pop stack top (%08x) as an opcode to execute\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), REG(4));
@@ -267,8 +267,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x05f:
{
- UINT32 address = r5 + 2;
- UINT32 pc_offset = read_sized_word(11, address, 2);
+ uint32_t address = r5 + 2;
+ uint32_t pc_offset = read_sized_word(11, address, 2);
if (!(address & 2)) pc_offset >>= 16;
// advance program counter by amount specified as parameter
@@ -278,11 +278,11 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0066:
{
- UINT32 address = r5 + 2;
- UINT32 offset = read_sized_word(11, address, 2);
+ uint32_t address = r5 + 2;
+ uint32_t offset = read_sized_word(11, address, 2);
if (!(address & 2)) offset >>= 16;
- UINT32 target = r5 + 2 + offset;
+ uint32_t target = r5 + 2 + offset;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; pop data stack top (%08x) and if zero, jump to %08x\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), read_sized_word(11, REG(7), 4), target);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
@@ -291,15 +291,15 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x007b:
{
- UINT32 r4 = REG(4);
- UINT32 value = read_sized_word(11, REG(6), 4);
- UINT32 result = value + r4;
+ uint32_t r4 = REG(4);
+ uint32_t value = read_sized_word(11, REG(6), 4);
+ uint32_t result = value + r4;
bool arithmetic_overflow = ((BIT31(value) && BIT31(r4) && !BIT31(result)) || (!BIT31(value) && !BIT31(r4) && BIT31(result)));
- UINT32 address = r5 + 2;
- UINT32 offset = read_sized_word(11, address, 2);
+ uint32_t address = r5 + 2;
+ uint32_t offset = read_sized_word(11, address, 2);
if (!(address & 2)) offset >>= 16;
- UINT32 target = r5 + 2 + offset;
+ uint32_t target = r5 + 2 + offset;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; pop data stack top and add to program stack top (%08x = %08x + %08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), result, value, r4);
indent(); printf(" // if no addition overflow, jump to %08x\n", target);
@@ -313,19 +313,19 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0099:
{
- UINT32 handler_base_2 = REG(4);
+ uint32_t handler_base_2 = REG(4);
- UINT32 address = stack;
- UINT32 l0_2 = read_sized_word(11, address, 4);
+ uint32_t address = stack;
+ uint32_t l0_2 = read_sized_word(11, address, 4);
address = stack + 4;
- UINT32 popped_g4 = read_sized_word(11, address, 4);
+ uint32_t popped_g4 = read_sized_word(11, address, 4);
address = r5 + 2;
- UINT32 offset = read_sized_word(11, address, 2);
+ uint32_t offset = read_sized_word(11, address, 2);
if (!(address & 2)) offset >>= 16;
- UINT32 target = r5 + 2 + offset;
+ uint32_t target = r5 + 2 + offset;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; branch relative to %08x if data stack second (%08x) == data stack top (%08x), pop_data result (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), target, l0_2, handler_base_2, popped_g4);
if (handler_base_2 == l0_2)
@@ -347,8 +347,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x00a4:
{
- UINT32 word0 = read_sized_word(11, REG(6), 4);
- UINT32 word1 = read_sized_word(11, REG(6) + 4, 4);
+ uint32_t word0 = read_sized_word(11, REG(6), 4);
+ uint32_t word1 = read_sized_word(11, REG(6) + 4, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; push result (%08x) to data stack, add the top two values on the program stack, store in result (%08x = %08x + %08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), REG(4), word0 + word1, word0, word1);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack - 4, (0xffefebe4 - (stack - 4)) / 4);
break;
@@ -356,8 +356,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0121:
{
- UINT32 address = stack;
- UINT32 word = read_sized_word(11, address, 4);
+ uint32_t address = stack;
+ uint32_t word = read_sized_word(11, address, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; logical-AND result with data stack pop, store in result (%08x = %08x & %08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), word & REG(4), word, REG(4));
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -365,8 +365,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0128:
{
- UINT32 address = stack;
- UINT32 word = read_sized_word(11, address, 4);
+ uint32_t address = stack;
+ uint32_t word = read_sized_word(11, address, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; logical-OR result with data stack pop, store in result: %08x = %08x & %08x\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), word | REG(4), word, REG(4));
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -378,8 +378,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x014f:
{
- UINT32 address = stack;
- UINT32 word = read_sized_word(11, address, 4);
+ uint32_t address = stack;
+ uint32_t word = read_sized_word(11, address, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; add result to data stack pop, store in result: %08x = %08x + %08x\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), word + REG(4), word, REG(4));
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -387,8 +387,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0155:
{
- UINT32 address = stack;
- UINT32 word = read_sized_word(11, address, 4);
+ uint32_t address = stack;
+ uint32_t word = read_sized_word(11, address, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; subtract result from data stack pop, store in result: %08x = %08x - %08x\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), word - REG(4), word, REG(4));
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -419,15 +419,15 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x01c0:
case 0x01c7:
{
- UINT32 address = REG(6);
- UINT32 half0 = read_sized_word(11, address, 2);
+ uint32_t address = REG(6);
+ uint32_t half0 = read_sized_word(11, address, 2);
if (address & 2) half0 <<= 16;
address = REG(6) + 2;
- UINT32 half1 = read_sized_word(11, address, 2);
+ uint32_t half1 = read_sized_word(11, address, 2);
if (!(address & 2)) half1 >>= 16;
- UINT32 value = half0 | half1;
+ uint32_t value = half0 | half1;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; return (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value);
indent(); printf(" // program stack now %08x (%d words deep)\n", REG(6) + 4, (0xffeff000 - (REG(6) + 4)) / 4);
@@ -450,7 +450,7 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0217:
{
- UINT32 value = read_sized_word(11, stack, 4);
+ uint32_t value = read_sized_word(11, stack, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; if pop_data (%08x) >= result (%08x), set result to 0, otherwise -1 (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4), (value >= REG(4)) ? 0 : ~0);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -458,7 +458,7 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x022b:
{
- UINT32 value = read_sized_word(11, stack, 4);
+ uint32_t value = read_sized_word(11, stack, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; if pop_data (%08x) != result (%08x), set result to 0, otherwise -1 (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4), (value != REG(4)) ? 0 : ~0);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -466,7 +466,7 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0236:
{
- UINT32 value = read_sized_word(11, stack, 4);
+ uint32_t value = read_sized_word(11, stack, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; if pop_data (%08x) == result (%08x), set result to 0, otherwise -1 (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4), (value == REG(4)) ? 0 : ~0);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -474,7 +474,7 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x026d:
{
- UINT32 value = read_sized_word(11, stack, 4);
+ uint32_t value = read_sized_word(11, stack, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; if pop_data (%08x) < result (%08x), set result to 0, otherwise -1 (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4), (value < REG(4)) ? 0 : ~0);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -482,7 +482,7 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0278:
{
- UINT32 value = read_sized_word(11, stack, 4);
+ uint32_t value = read_sized_word(11, stack, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; if pop_data (%08x) > result (%08x), set result to 0, otherwise -1 (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4), (value > REG(4)) ? 0 : ~0);
indent(); printf(" // data stack now %08x (%d words deep)\n", stack + 4, (0xffefebe4 - (stack + 4)) / 4);
break;
@@ -508,8 +508,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x029d:
{
- UINT32 top = read_sized_word(11, stack, 4);
- UINT32 next = read_sized_word(11, stack + 4, 4);
+ uint32_t top = read_sized_word(11, stack, 4);
+ uint32_t next = read_sized_word(11, stack + 4, 4);
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; swap the top two values of the data stack (%08x <-> %08x), exchange second value with result (%08x <-> %08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), top, next, REG(4), next);
break;
}
@@ -543,15 +543,15 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0334:
{
- UINT32 address = REG(4);
- UINT32 half0 = read_sized_word(11, address, 2);
+ uint32_t address = REG(4);
+ uint32_t half0 = read_sized_word(11, address, 2);
if (address & 2) half0 <<= 16;
address = REG(4) + 2;
- UINT32 half1 = read_sized_word(11, address, 2);
+ uint32_t half1 = read_sized_word(11, address, 2);
if (!(address & 2)) half1 >>= 16;
- UINT32 value = half0 | half1;
+ uint32_t value = half0 | half1;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; load result with word (%08x) at result address (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4));
break;
@@ -559,8 +559,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0349:
{
- UINT32 address = REG(4);
- UINT32 value = read_sized_word(11, address, 2);
+ uint32_t address = REG(4);
+ uint32_t value = read_sized_word(11, address, 2);
if (!(address & 2)) value >>= 16;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; load result with unsigned halfword (%04x) at result address (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4));
break;
@@ -568,8 +568,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x0353:
{
- UINT32 address = REG(4);
- UINT32 value = read_sized_word(11, address, 1);
+ uint32_t address = REG(4);
+ uint32_t value = read_sized_word(11, address, 1);
value >>= (3 - (address & 3)) * 8;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; load result with unsigned byte (%02x) at result address (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), value, REG(4));
break;
@@ -601,8 +601,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x04ff:
{
- UINT32 address = r5 + 2;
- UINT32 next_op = read_sized_word(11, address, 2);
+ uint32_t address = r5 + 2;
+ uint32_t next_op = read_sized_word(11, address, 2);
if (!(address & 2)) next_op >>= 16;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; push_data result (%08x), load result with entry_point for next opcode (%08x = %08x + %08x, op %04x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), REG(4), REG(2) + (next_op << 2), REG(2), next_op << 2, next_op);
@@ -612,9 +612,9 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x050a:
{
- UINT32 byte_addr = read_sized_word(11, REG(6), 4);
- UINT32 address_shift = (3 - (byte_addr & 3)) * 8;
- UINT8 value = read_sized_word(11, byte_addr, 1) >> address_shift;
+ uint32_t byte_addr = read_sized_word(11, REG(6), 4);
+ uint32_t address_shift = (3 - (byte_addr & 3)) * 8;
+ uint8_t value = read_sized_word(11, byte_addr, 1) >> address_shift;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; push result (%08x) onto data stack\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), REG(4));
indent(); printf(" // load result with byte pointed to by top of program stack (%02x)\n", value);
indent(); printf(" // push address of next byte (%08x) onto data stack\n", byte_addr + 1);
@@ -626,8 +626,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x05ca:
{
//
- UINT32 address = REG(4);
- UINT32 g2_offset = read_sized_word(11, address, 2);
+ uint32_t address = REG(4);
+ uint32_t g2_offset = read_sized_word(11, address, 2);
if (!(address & 2)) g2_offset >>= 16;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; add halfword at address in result (%08x) to forth table base pointer (%08x) and store in result (%08x = %08x + %08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), address, REG(2), REG(2) + g2_offset, REG(2), g2_offset);
@@ -636,8 +636,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x05e6:
{
- UINT32 address = REG(4);
- UINT32 next_op = read_sized_word(11, address, 2);
+ uint32_t address = REG(4);
+ uint32_t next_op = read_sized_word(11, address, 2);
if (!(address & 2)) next_op >>= 16;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; load result with entry_point for opcode (%08x = %08x + %08x, op %04x) pointed to by result (%08x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), REG(2) + (next_op << 2), REG(2), next_op << 2, next_op, REG(4));
@@ -647,8 +647,8 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x05ee:
case 0x05ef:
{
- UINT32 stack_top = read_sized_word(11, stack, 4);
- UINT32 new_opcode = (stack_top - REG(2)) >> 2;
+ uint32_t stack_top = read_sized_word(11, stack, 4);
+ uint32_t new_opcode = (stack_top - REG(2)) >> 2;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; pop word (%08x) from the data stack, turn it into a 16-bit opcode (%04x)\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), stack_top, new_opcode);
indent(); printf(" // store the opcode at the address contained in the result (%08x)\n", REG(4));
indent(); printf(" // pop word from the data stack into to the result (%08x)\n", read_sized_word(11, stack + 4, 4));
@@ -692,12 +692,12 @@ void mb86901_device::disassemble_ss1_fcode(UINT32 r5, UINT32 opcode, UINT32 hand
case 0x4181:
{
- UINT32 address = handler_base + 2;
- UINT32 g3_offset = read_sized_word(11, address, 2);
+ uint32_t address = handler_base + 2;
+ uint32_t g3_offset = read_sized_word(11, address, 2);
if (!(address & 2)) g3_offset >>= 16;
address = REG(3) + g3_offset;
- UINT32 new_result = read_sized_word(11, address, 2);
+ uint32_t new_result = read_sized_word(11, address, 2);
if (!(address & 2)) new_result >>= 16;
indent(); printf("Opcode at %08x (%04x + %x): %04x, entry is at %08x // %s ; push result (%08x) to data stack, load halfword (%04x) from handler table\n", r5, base_op, dist, opcode, entry_point, opdesc.c_str(), REG(4), g3_offset);
diff --git a/src/devices/cpu/spc700/spc700.cpp b/src/devices/cpu/spc700/spc700.cpp
index c84e5d56a3c..7d7468f8d9a 100644
--- a/src/devices/cpu/spc700/spc700.cpp
+++ b/src/devices/cpu/spc700/spc700.cpp
@@ -219,7 +219,7 @@ static inline int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
const device_type SPC700 = &device_creator<spc700_device>;
-spc700_device::spc700_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+spc700_device::spc700_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SPC700, "SPC700", tag, owner, clock, "spc700", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
, m_a(0)
@@ -242,38 +242,38 @@ spc700_device::spc700_device(const machine_config &mconfig, const char *tag, dev
#define CLK_ALL() CLOCKS = 0
-UINT32 spc700_device::read_8_normal(UINT32 address)
+uint32_t spc700_device::read_8_normal(uint32_t address)
{
address = MAKE_UINT_16(address);
return spc700_read_8(address);
}
-UINT32 spc700_device::read_8_immediate(UINT32 address)
+uint32_t spc700_device::read_8_immediate(uint32_t address)
{
address = MAKE_UINT_16(address);
return spc700_read_8_immediate(address);
}
-UINT32 spc700_device::read_8_instruction(UINT32 address)
+uint32_t spc700_device::read_8_instruction(uint32_t address)
{
address = MAKE_UINT_16(address);
return spc700_read_instruction(address);
}
-UINT32 spc700_device::read_8_direct(UINT32 address)
+uint32_t spc700_device::read_8_direct(uint32_t address)
{
address = MAKE_UINT_8(address) | FLAG_P;
return spc700_read_8_direct(address);
}
-void spc700_device::write_8_normal(UINT32 address, UINT32 value)
+void spc700_device::write_8_normal(uint32_t address, uint32_t value)
{
address = MAKE_UINT_16(address);
value = MAKE_UINT_8(value);
spc700_write_8(address, value);
}
-void spc700_device::write_8_direct(UINT32 address, UINT32 value)
+void spc700_device::write_8_direct(uint32_t address, uint32_t value)
{
address = MAKE_UINT_8(address) | FLAG_P;
value = MAKE_UINT_8(value);
@@ -281,22 +281,22 @@ void spc700_device::write_8_direct(UINT32 address, UINT32 value)
}
-UINT32 spc700_device::read_16_normal(UINT32 address)
+uint32_t spc700_device::read_16_normal(uint32_t address)
{
return read_8_normal(address) | (read_8_normal(address+1)<<8);
}
-UINT32 spc700_device::read_16_immediate(UINT32 address)
+uint32_t spc700_device::read_16_immediate(uint32_t address)
{
return read_8_immediate(address) | (read_8_immediate(address+1)<<8);
}
-UINT32 spc700_device::read_16_direct(UINT32 address)
+uint32_t spc700_device::read_16_direct(uint32_t address)
{
return read_8_direct(address) | (read_8_direct(address+1)<<8);
}
-void spc700_device::write_16_direct(UINT32 address, UINT32 value)
+void spc700_device::write_16_direct(uint32_t address, uint32_t value)
{
write_8_direct(address, value);
write_8_direct(address+1, value>>8);
@@ -399,31 +399,31 @@ void spc700_device::write_16_direct(UINT32 address, UINT32 value)
#define OPER_16_YI() read_16_YI(EA_YI())
/* Effective Address Calculations */
-UINT32 spc700_device::EA_IMM() {return REG_PC++;}
-UINT32 spc700_device::EA_IMM16() {REG_PC += 2; return REG_PC-2;}
-UINT32 spc700_device::EA_ABS() {return OPER_16_IMM();}
-UINT32 spc700_device::EA_ABX() {return EA_ABS() + REG_X;}
-UINT32 spc700_device::EA_ABY() {return EA_ABS() + REG_Y;}
-UINT32 spc700_device::EA_AXI() {return OPER_16_ABX();}
-UINT32 spc700_device::EA_DP() {return OPER_8_IMM();}
-UINT32 spc700_device::EA_DPX() {return (EA_DP() + REG_X)&0xff;}
-UINT32 spc700_device::EA_DPY() {return (EA_DP() + REG_Y)&0xff;}
-UINT32 spc700_device::EA_DXI() {return OPER_16_DPX();}
-UINT32 spc700_device::EA_DIY() {UINT32 addr = OPER_16_DP(); if((addr&0xff00) != ((addr+REG_Y)&0xff00)) CLK(1); return addr + REG_Y;}
-UINT32 spc700_device::EA_XI() {return REG_X;}
-UINT32 spc700_device::EA_XII() {UINT32 val = REG_X;REG_X = MAKE_UINT_8(REG_X+1);return val;}
-UINT32 spc700_device::EA_YI() {return REG_Y;}
+uint32_t spc700_device::EA_IMM() {return REG_PC++;}
+uint32_t spc700_device::EA_IMM16() {REG_PC += 2; return REG_PC-2;}
+uint32_t spc700_device::EA_ABS() {return OPER_16_IMM();}
+uint32_t spc700_device::EA_ABX() {return EA_ABS() + REG_X;}
+uint32_t spc700_device::EA_ABY() {return EA_ABS() + REG_Y;}
+uint32_t spc700_device::EA_AXI() {return OPER_16_ABX();}
+uint32_t spc700_device::EA_DP() {return OPER_8_IMM();}
+uint32_t spc700_device::EA_DPX() {return (EA_DP() + REG_X)&0xff;}
+uint32_t spc700_device::EA_DPY() {return (EA_DP() + REG_Y)&0xff;}
+uint32_t spc700_device::EA_DXI() {return OPER_16_DPX();}
+uint32_t spc700_device::EA_DIY() {uint32_t addr = OPER_16_DP(); if((addr&0xff00) != ((addr+REG_Y)&0xff00)) CLK(1); return addr + REG_Y;}
+uint32_t spc700_device::EA_XI() {return REG_X;}
+uint32_t spc700_device::EA_XII() {uint32_t val = REG_X;REG_X = MAKE_UINT_8(REG_X+1);return val;}
+uint32_t spc700_device::EA_YI() {return REG_Y;}
/* Change the Program Counter */
-void spc700_device::JUMP(UINT32 address)
+void spc700_device::JUMP(uint32_t address)
{
REG_PC = address;
spc700_jumping(REG_PC);
}
-void spc700_device::BRANCH(UINT32 offset)
+void spc700_device::BRANCH(uint32_t offset)
{
REG_PC = MAKE_UINT_16(REG_PC + MAKE_INT_8(offset));
spc700_branching(REG_PC);
@@ -432,7 +432,7 @@ void spc700_device::BRANCH(UINT32 offset)
#define GET_REG_YA() (REG_A | (REG_Y<<8))
-void spc700_device::SET_REG_YA(UINT32 value)
+void spc700_device::SET_REG_YA(uint32_t value)
{
REG_A = MAKE_UINT_8(value);
REG_Y = MAKE_UINT_8(value>>8);
@@ -450,7 +450,7 @@ void spc700_device::SET_REG_YA(UINT32 value)
CFLAG_AS_1())
/* Set the Process Status Register */
-void spc700_device::SET_REG_P(UINT32 value)
+void spc700_device::SET_REG_P(uint32_t value)
{
FLAG_N = (value & 0x80);
FLAG_Z = !(value & 2);
@@ -463,27 +463,27 @@ void spc700_device::SET_REG_P(UINT32 value)
}
/* Push/Pull data to/from the stack */
-void spc700_device::PUSH_8(UINT32 value)
+void spc700_device::PUSH_8(uint32_t value)
{
write_8_STK(REG_S+STACK_PAGE, value);
REG_S = MAKE_UINT_8(REG_S - 1);
}
-UINT32 spc700_device::PULL_8()
+uint32_t spc700_device::PULL_8()
{
REG_S = MAKE_UINT_8(REG_S + 1);
return read_8_STK(REG_S+STACK_PAGE);
}
-void spc700_device::PUSH_16(UINT32 value)
+void spc700_device::PUSH_16(uint32_t value)
{
PUSH_8(value>>8);
PUSH_8(value);
}
-UINT32 spc700_device::PULL_16()
+uint32_t spc700_device::PULL_16()
{
- UINT32 value = PULL_8();
+ uint32_t value = PULL_8();
return value | (PULL_8()<<8);
}
@@ -499,7 +499,7 @@ void spc700_device::SERVICE_IRQ()
}
-void spc700_device::SET_FLAG_I(UINT32 value)
+void spc700_device::SET_FLAG_I(uint32_t value)
{
FLAG_I = value & IFLAG_SET;
#if !SPC700_OPTIMIZE_SNES
@@ -517,7 +517,7 @@ void spc700_device::SET_FLAG_I(UINT32 value)
FLAG_C = (m_spc_int16 > 0xff) ? CFLAG_SET : 0; \
FLAG_V = (~((A) ^ (B))) & (((A) ^ m_spc_int16) & 0x80); \
FLAG_H = (((m_spc_int16 & 0x0f) - TMP1) & 0x10) >> 1; \
- FLAG_NZ = (UINT8)m_spc_int16
+ FLAG_NZ = (uint8_t)m_spc_int16
/* Add With Carry */
@@ -525,7 +525,7 @@ void spc700_device::SET_FLAG_I(UINT32 value)
CLK(BCLK); \
SRC = OPER_8_##MODE(); \
SUBOP_ADC(SRC, REG_A); \
- REG_A = (UINT8)m_spc_int16;
+ REG_A = (uint8_t)m_spc_int16;
/* Add With Carry to memory */
@@ -534,7 +534,7 @@ void spc700_device::SET_FLAG_I(UINT32 value)
SRC = OPER_8_##SMODE(); \
DST = EA_##DMODE(); \
SUBOP_ADC(SRC, read_8_##DMODE(DST)); \
- write_8_##DMODE(DST, (UINT8)m_spc_int16)
+ write_8_##DMODE(DST, (uint8_t)m_spc_int16)
/* Add word */
#define OP_ADDW(BCLK) \
@@ -548,7 +548,7 @@ void spc700_device::SET_FLAG_I(UINT32 value)
FLAG_C = (TMP3 > 0xff) ? CFLAG_SET : 0; \
FLAG_H = ((unsigned) ((((DST) >> 8) & 0x0F) + \
(((SRC) >> 8) & 0x0F) + TMP2)) > 0x0F ? HFLAG_SET : 0; \
- FLAG_V = (~((DST) ^ (SRC)) & ((SRC) ^ (UINT16) m_spc_int16) & 0x8000) ? VFLAG_SET : 0; \
+ FLAG_V = (~((DST) ^ (SRC)) & ((SRC) ^ (uint16_t) m_spc_int16) & 0x8000) ? VFLAG_SET : 0; \
FLAG_Z = (m_spc_int16 != 0); \
FLAG_N = (m_spc_int16>>8); \
SET_REG_YA(m_spc_int16);
@@ -1101,7 +1101,7 @@ void spc700_device::SET_FLAG_I(UINT32 value)
TMP2 = REG_A - SRC - (CFLAG_AS_1() ^ 1); \
SUBOP_ADC(REG_A, ~SRC); \
FLAG_C = (TMP2 <= 0xff) ? CFLAG_SET : 0; \
- REG_A = (UINT8)m_spc_int16;
+ REG_A = (uint8_t)m_spc_int16;
/* Subtract With Carry to memory */
#define OP_SBCM(BCLK, SMODE, DMODE) \
@@ -1112,7 +1112,7 @@ void spc700_device::SET_FLAG_I(UINT32 value)
TMP2 = TMP3 - SRC - (CFLAG_AS_1() ^ 1); \
SUBOP_ADC(~SRC, TMP3); \
FLAG_C = (TMP2 <= 0xff) ? CFLAG_SET : 0; \
- write_8_##DMODE(DST, (UINT8)m_spc_int16)
+ write_8_##DMODE(DST, (uint8_t)m_spc_int16)
/* Set Carry flag */
#define OP_SETC(BCLK) \
@@ -1155,7 +1155,7 @@ void spc700_device::SET_FLAG_I(UINT32 value)
FLAG_C = (TMP3 <= 0xff) ? CFLAG_SET : 0; \
FLAG_H = ((unsigned) ((((DST) >> 8) & 0x0F) - \
(((SRC) >> 8) & 0x0F) - TMP2)) > 0x0F ? 0: HFLAG_SET; \
- FLAG_V = (((DST) ^ (SRC)) & ((DST) ^ (UINT16) m_spc_int16) & 0x8000) ? VFLAG_SET : 0; \
+ FLAG_V = (((DST) ^ (SRC)) & ((DST) ^ (uint16_t) m_spc_int16) & 0x8000) ? VFLAG_SET : 0; \
FLAG_Z = (m_spc_int16 != 0); \
FLAG_N = (m_spc_int16>>8); \
SET_REG_YA(m_spc_int16);
@@ -1344,7 +1344,7 @@ void spc700_device::execute_set_input( int inptnum, int state )
#include "spc700ds.h"
-offs_t spc700_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t spc700_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return CPU_DISASSEMBLE_NAME(spc700)(this, buffer, pc, oprom, opram, options);
}
diff --git a/src/devices/cpu/spc700/spc700.h b/src/devices/cpu/spc700/spc700.h
index 30b9b2ccdf3..948e4d5e27c 100644
--- a/src/devices/cpu/spc700/spc700.h
+++ b/src/devices/cpu/spc700/spc700.h
@@ -10,7 +10,7 @@ class spc700_device : public cpu_device
{
public:
// construction/destruction
- spc700_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ spc700_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -18,9 +18,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 2; }
- virtual UINT32 execute_max_cycles() const override { return 8; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 8; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -33,78 +33,78 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 3; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 3; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
- UINT32 m_a; /* Accumulator */
- UINT32 m_x; /* Index Register X */
- UINT32 m_y; /* Index Register Y */
- UINT32 m_s; /* Stack Pointer */
- UINT32 m_pc; /* Program Counter */
- UINT32 m_ppc; /* Previous Program Counter */
- UINT32 m_flag_n; /* Negative Flag */
- UINT32 m_flag_z; /* Zero flag */
- UINT32 m_flag_v; /* Overflow Flag */
- UINT32 m_flag_p; /* Direct Page Flag */
- UINT32 m_flag_b; /* BRK Instruction Flag */
- UINT32 m_flag_h; /* Half-carry Flag */
- UINT32 m_flag_i; /* Interrupt Mask Flag */
- UINT32 m_flag_c; /* Carry Flag */
- UINT32 m_line_irq; /* Status of the IRQ line */
- UINT32 m_line_nmi; /* Status of the NMI line */
- UINT32 m_line_rst; /* Status of the RESET line */
- UINT32 m_ir; /* Instruction Register */
+ uint32_t m_a; /* Accumulator */
+ uint32_t m_x; /* Index Register X */
+ uint32_t m_y; /* Index Register Y */
+ uint32_t m_s; /* Stack Pointer */
+ uint32_t m_pc; /* Program Counter */
+ uint32_t m_ppc; /* Previous Program Counter */
+ uint32_t m_flag_n; /* Negative Flag */
+ uint32_t m_flag_z; /* Zero flag */
+ uint32_t m_flag_v; /* Overflow Flag */
+ uint32_t m_flag_p; /* Direct Page Flag */
+ uint32_t m_flag_b; /* BRK Instruction Flag */
+ uint32_t m_flag_h; /* Half-carry Flag */
+ uint32_t m_flag_i; /* Interrupt Mask Flag */
+ uint32_t m_flag_c; /* Carry Flag */
+ uint32_t m_line_irq; /* Status of the IRQ line */
+ uint32_t m_line_nmi; /* Status of the NMI line */
+ uint32_t m_line_rst; /* Status of the RESET line */
+ uint32_t m_ir; /* Instruction Register */
address_space *m_program;
- UINT32 m_stopped; /* stopped status */
+ uint32_t m_stopped; /* stopped status */
int m_ICount;
- UINT32 m_source;
- UINT32 m_destination;
- UINT32 m_temp1;
- UINT32 m_temp2;
- UINT32 m_temp3;
+ uint32_t m_source;
+ uint32_t m_destination;
+ uint32_t m_temp1;
+ uint32_t m_temp2;
+ uint32_t m_temp3;
short m_spc_int16;
int m_spc_int32;
- UINT32 m_debugger_temp;
-
- inline UINT32 read_8_normal(UINT32 address);
- inline UINT32 read_8_immediate(UINT32 address);
- inline UINT32 read_8_instruction(UINT32 address);
- inline UINT32 read_8_direct(UINT32 address);
- inline void write_8_normal(UINT32 address, UINT32 value);
- inline void write_8_direct(UINT32 address, UINT32 value);
- inline UINT32 read_16_normal(UINT32 address);
- inline UINT32 read_16_immediate(UINT32 address);
- inline UINT32 read_16_direct(UINT32 address);
- inline void write_16_direct(UINT32 address, UINT32 value);
- inline UINT32 EA_IMM();
- inline UINT32 EA_IMM16();
- inline UINT32 EA_ABS();
- inline UINT32 EA_ABX();
- inline UINT32 EA_ABY();
- inline UINT32 EA_AXI();
- inline UINT32 EA_DP();
- inline UINT32 EA_DPX();
- inline UINT32 EA_DPY();
- inline UINT32 EA_DXI();
- inline UINT32 EA_DIY();
- inline UINT32 EA_XI();
- inline UINT32 EA_XII();
- inline UINT32 EA_YI();
- inline void JUMP(UINT32 address);
- inline void BRANCH(UINT32 offset);
- inline void SET_REG_YA(UINT32 value);
- inline void SET_REG_P(UINT32 value);
- inline void PUSH_8(UINT32 value);
- inline UINT32 PULL_8();
- inline void PUSH_16(UINT32 value);
- inline UINT32 PULL_16();
+ uint32_t m_debugger_temp;
+
+ inline uint32_t read_8_normal(uint32_t address);
+ inline uint32_t read_8_immediate(uint32_t address);
+ inline uint32_t read_8_instruction(uint32_t address);
+ inline uint32_t read_8_direct(uint32_t address);
+ inline void write_8_normal(uint32_t address, uint32_t value);
+ inline void write_8_direct(uint32_t address, uint32_t value);
+ inline uint32_t read_16_normal(uint32_t address);
+ inline uint32_t read_16_immediate(uint32_t address);
+ inline uint32_t read_16_direct(uint32_t address);
+ inline void write_16_direct(uint32_t address, uint32_t value);
+ inline uint32_t EA_IMM();
+ inline uint32_t EA_IMM16();
+ inline uint32_t EA_ABS();
+ inline uint32_t EA_ABX();
+ inline uint32_t EA_ABY();
+ inline uint32_t EA_AXI();
+ inline uint32_t EA_DP();
+ inline uint32_t EA_DPX();
+ inline uint32_t EA_DPY();
+ inline uint32_t EA_DXI();
+ inline uint32_t EA_DIY();
+ inline uint32_t EA_XI();
+ inline uint32_t EA_XII();
+ inline uint32_t EA_YI();
+ inline void JUMP(uint32_t address);
+ inline void BRANCH(uint32_t offset);
+ inline void SET_REG_YA(uint32_t value);
+ inline void SET_REG_P(uint32_t value);
+ inline void PUSH_8(uint32_t value);
+ inline uint32_t PULL_8();
+ inline void PUSH_16(uint32_t value);
+ inline uint32_t PULL_16();
inline void CHECK_IRQ();
- inline void SET_FLAG_I(UINT32 value);
+ inline void SET_FLAG_I(uint32_t value);
void SERVICE_IRQ();
};
diff --git a/src/devices/cpu/spc700/spc700ds.cpp b/src/devices/cpu/spc700/spc700ds.cpp
index 867ddd56210..7faf4468c13 100644
--- a/src/devices/cpu/spc700/spc700ds.cpp
+++ b/src/devices/cpu/spc700/spc700ds.cpp
@@ -321,7 +321,7 @@ static const spc700_opcode_struct g_opcodes[256] =
};
static unsigned int g_pc;
-static const UINT8 *rombase;
+static const uint8_t *rombase;
static inline unsigned int read_8_immediate(void)
{
@@ -340,7 +340,7 @@ static inline unsigned int read_16_immediate(void)
CPU_DISASSEMBLE( spc700 )
{
const spc700_opcode_struct* opcode;
- UINT32 flags = 0;
+ uint32_t flags = 0;
char* ptr;
int var;
int i;
diff --git a/src/devices/cpu/ssem/ssem.cpp b/src/devices/cpu/ssem/ssem.cpp
index 1ea2584c33e..a76d9a44182 100644
--- a/src/devices/cpu/ssem/ssem.cpp
+++ b/src/devices/cpu/ssem/ssem.cpp
@@ -25,7 +25,7 @@ CPU_DISASSEMBLE( ssem );
// The de facto snapshot format for other SSEM simulators stores the data physically in that format as well.
// Therefore, in MESS, every 32-bit word has its bits reversed, too, and as a result the values must be
// un-reversed before being used.
-static inline UINT32 reverse(UINT32 v)
+static inline uint32_t reverse(uint32_t v)
{
// Taken from http://www-graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
// swap odd and even bits
@@ -42,9 +42,9 @@ static inline UINT32 reverse(UINT32 v)
return v;
}
-inline UINT32 ssem_device::program_read32(UINT32 address)
+inline uint32_t ssem_device::program_read32(uint32_t address)
{
- UINT32 v = 0;
+ uint32_t v = 0;
// The MAME core does not have a good way of specifying a minimum datum size that is more than
// 8 bits in width. The minimum datum width on the SSEM is 32 bits, so we need to quadruple
// the address value to get the appropriate byte index.
@@ -58,9 +58,9 @@ inline UINT32 ssem_device::program_read32(UINT32 address)
return reverse(v);
}
-inline void ssem_device::program_write32(UINT32 address, UINT32 data)
+inline void ssem_device::program_write32(uint32_t address, uint32_t data)
{
- UINT32 v = reverse(data);
+ uint32_t v = reverse(data);
// The MAME core does not have a good way of specifying a minimum datum size that is more than
// 8 bits in width. The minimum datum width on the SSEM is 32 bits, so we need to quadruple
@@ -82,7 +82,7 @@ const device_type SSEMCPU = &device_creator<ssem_device>;
// ssem_device - constructor
//-------------------------------------------------
-ssem_device::ssem_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ssem_device::ssem_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SSEMCPU, "SSEMCPU", tag, owner, clock, "ssem_cpu", __FILE__),
m_program_config("program", ENDIANNESS_LITTLE, 8, 16),
m_pc(1),
@@ -166,7 +166,7 @@ void ssem_device::state_string_export(const device_state_entry &entry, std::stri
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 ssem_device::disasm_min_opcode_bytes() const
+uint32_t ssem_device::disasm_min_opcode_bytes() const
{
return 4;
}
@@ -177,7 +177,7 @@ UINT32 ssem_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 ssem_device::disasm_max_opcode_bytes() const
+uint32_t ssem_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -188,7 +188,7 @@ UINT32 ssem_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t ssem_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ssem_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( ssem );
return CPU_DISASSEMBLE_NAME(ssem)(this, buffer, pc, oprom, opram, options);
@@ -204,7 +204,7 @@ offs_t ssem_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 ssem_device::execute_min_cycles() const
+uint32_t ssem_device::execute_min_cycles() const
{
return 1;
}
@@ -215,7 +215,7 @@ UINT32 ssem_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 ssem_device::execute_max_cycles() const
+uint32_t ssem_device::execute_max_cycles() const
{
return 1;
}
@@ -226,7 +226,7 @@ UINT32 ssem_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 ssem_device::execute_input_lines() const
+uint32_t ssem_device::execute_input_lines() const
{
return 0;
}
@@ -249,7 +249,7 @@ void ssem_device::execute_set_input(int inputnum, int state)
void ssem_device::execute_run()
{
- UINT32 op;
+ uint32_t op;
m_pc &= 0x1f;
m_shifted_pc = m_pc << 2;
@@ -279,12 +279,12 @@ void ssem_device::execute_run()
break;
case 1:
// JRP: Add the value at the specified address to the Program Counter.
- m_pc += (INT32)program_read32(ADDR);
+ m_pc += (int32_t)program_read32(ADDR);
m_shifted_pc = m_pc << 2;
break;
case 2:
// LDN: Load the accumulator with the two's-complement negation of the value at the specified address.
- m_a = (UINT32)(0 - (INT32)program_read32(ADDR));
+ m_a = (uint32_t)(0 - (int32_t)program_read32(ADDR));
break;
case 3:
// STO: Store the value in the accumulator at the specified address.
@@ -297,7 +297,7 @@ void ssem_device::execute_run()
break;
case 6:
// CMP: If the accumulator is less than zero, skip the next opcode.
- if((INT32)(m_a) < 0)
+ if((int32_t)(m_a) < 0)
{
m_pc++;
m_shifted_pc = m_pc << 2;
diff --git a/src/devices/cpu/ssem/ssem.h b/src/devices/cpu/ssem/ssem.h
index 8d2c0c21044..4bfebaa432e 100644
--- a/src/devices/cpu/ssem/ssem.h
+++ b/src/devices/cpu/ssem/ssem.h
@@ -22,7 +22,7 @@ class ssem_device : public cpu_device
{
public:
// construction/destruction
- ssem_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ssem_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override;
@@ -30,9 +30,9 @@ public:
virtual void device_stop() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -40,9 +40,9 @@ public:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -51,14 +51,14 @@ public:
const address_space_config m_program_config;
// memory access
- inline UINT32 program_read32(UINT32 addr);
- inline void program_write32(UINT32 addr, UINT32 data);
+ inline uint32_t program_read32(uint32_t addr);
+ inline void program_write32(uint32_t addr, uint32_t data);
// CPU registers
- UINT32 m_pc;
- UINT32 m_shifted_pc;
- UINT32 m_a;
- UINT32 m_halt;
+ uint32_t m_pc;
+ uint32_t m_shifted_pc;
+ uint32_t m_a;
+ uint32_t m_halt;
// other internal states
int m_icount;
diff --git a/src/devices/cpu/ssem/ssemdasm.cpp b/src/devices/cpu/ssem/ssemdasm.cpp
index a38ac00903a..efd9ba9715b 100644
--- a/src/devices/cpu/ssem/ssemdasm.cpp
+++ b/src/devices/cpu/ssem/ssemdasm.cpp
@@ -19,7 +19,7 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
va_end(vl);
}
-static inline UINT32 reverse(UINT32 v)
+static inline uint32_t reverse(uint32_t v)
{
// Taken from http://www-graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
// swap odd and even bits
@@ -36,10 +36,10 @@ static inline UINT32 reverse(UINT32 v)
return v;
}
-offs_t ssem_dasm_one(char *buffer, offs_t pc, UINT32 op)
+offs_t ssem_dasm_one(char *buffer, offs_t pc, uint32_t op)
{
- UINT8 instr = (reverse(op) >> 13) & 7;
- UINT8 addr = reverse(op) & 0x1f;
+ uint8_t instr = (reverse(op) >> 13) & 7;
+ uint8_t addr = reverse(op) & 0x1f;
output = buffer;
@@ -79,9 +79,9 @@ offs_t ssem_dasm_one(char *buffer, offs_t pc, UINT32 op)
CPU_DISASSEMBLE( ssem )
{
- UINT32 op = (*(UINT8 *)(opram + 0) << 24) |
- (*(UINT8 *)(opram + 1) << 16) |
- (*(UINT8 *)(opram + 2) << 8) |
- (*(UINT8 *)(opram + 3) << 0);
+ uint32_t op = (*(uint8_t *)(opram + 0) << 24) |
+ (*(uint8_t *)(opram + 1) << 16) |
+ (*(uint8_t *)(opram + 2) << 8) |
+ (*(uint8_t *)(opram + 3) << 0);
return ssem_dasm_one(buffer, pc, op);
}
diff --git a/src/devices/cpu/ssp1601/ssp1601.cpp b/src/devices/cpu/ssp1601/ssp1601.cpp
index e37939f34f4..1d38f5981a9 100644
--- a/src/devices/cpu/ssp1601/ssp1601.cpp
+++ b/src/devices/cpu/ssp1601/ssp1601.cpp
@@ -101,14 +101,14 @@
}
#define OP_CMPA(x) { \
- UINT32 t = rA32 - ((x) << 16); \
+ uint32_t t = rA32 - ((x) << 16); \
rST &= ~(SSP_FLAG_L|SSP_FLAG_Z|SSP_FLAG_V|SSP_FLAG_N); \
if (!t) rST |= SSP_FLAG_Z; \
else rST |= (t>>16)&SSP_FLAG_N; \
}
#define OP_CMPA32(x) { \
- UINT32 t = rA32 - (x); \
+ uint32_t t = rA32 - (x); \
rST &= ~(SSP_FLAG_L|SSP_FLAG_Z|SSP_FLAG_V|SSP_FLAG_N); \
if (!t) rST |= SSP_FLAG_Z; \
else rST |= (t>>16)&SSP_FLAG_N; \
@@ -192,7 +192,7 @@
const device_type SSP1601 = &device_creator<ssp1601_device>;
-ssp1601_device::ssp1601_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ssp1601_device::ssp1601_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SSP1601, "SSP1601", tag, owner, clock, "ssp1601", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 16, 16, -1)
, m_io_config("io", ENDIANNESS_BIG, 16, 4, 0)
@@ -200,7 +200,7 @@ ssp1601_device::ssp1601_device(const machine_config &mconfig, const char *tag, d
}
-offs_t ssp1601_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ssp1601_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( ssp1601 );
return CPU_DISASSEMBLE_NAME(ssp1601)(this, buffer, pc, oprom, opram, options);
@@ -217,39 +217,39 @@ void ssp1601_device::update_P()
rP.d = (m1 * m2 * 2);
}
-UINT32 ssp1601_device::read_unknown(int reg)
+uint32_t ssp1601_device::read_unknown(int reg)
{
logerror("%s:%i FIXME\n", __FILE__, __LINE__);
return 0;
}
-void ssp1601_device::write_unknown(int reg, UINT32 d)
+void ssp1601_device::write_unknown(int reg, uint32_t d)
{
logerror("%s:%i FIXME\n", __FILE__, __LINE__);
}
/* map EXT regs to virtual I/O range of 0x00-0x0f */
-UINT32 ssp1601_device::read_ext(int reg)
+uint32_t ssp1601_device::read_ext(int reg)
{
reg &= 7;
return m_io->read_word((reg << 1));
}
-void ssp1601_device::write_ext(int reg, UINT32 d)
+void ssp1601_device::write_ext(int reg, uint32_t d)
{
reg &= 7;
m_io->write_word((reg << 1), d);
}
// 4
-void ssp1601_device::write_ST(int reg, UINT32 d)
+void ssp1601_device::write_ST(int reg, uint32_t d)
{
CHECK_ST(d);
rST = d;
}
// 5
-UINT32 ssp1601_device::read_STACK(int reg)
+uint32_t ssp1601_device::read_STACK(int reg)
{
--rSTACK;
if ((signed short)rSTACK < 0) {
@@ -259,7 +259,7 @@ UINT32 ssp1601_device::read_STACK(int reg)
return m_stack[rSTACK];
}
-void ssp1601_device::write_STACK(int reg, UINT32 d)
+void ssp1601_device::write_STACK(int reg, uint32_t d)
{
if (rSTACK >= 6) {
logerror(__FILE__ " FIXME: stack overflow! (%i) @ %04x\n", rSTACK, GET_PPC_OFFS());
@@ -269,33 +269,33 @@ void ssp1601_device::write_STACK(int reg, UINT32 d)
}
// 6
-UINT32 ssp1601_device::read_PC(int reg)
+uint32_t ssp1601_device::read_PC(int reg)
{
return rPC;
}
-void ssp1601_device::write_PC(int reg, UINT32 d)
+void ssp1601_device::write_PC(int reg, uint32_t d)
{
rPC = d;
m_g_cycles--;
}
// 7
-UINT32 ssp1601_device::read_P(int reg)
+uint32_t ssp1601_device::read_P(int reg)
{
update_P();
return rP.w.h;
}
// 15
-UINT32 ssp1601_device::read_AL(int reg)
+uint32_t ssp1601_device::read_AL(int reg)
{
/* apparently reading AL causes some effect on EXT bus, VR depends on that.. */
read_ext(reg);
return rAL;
}
-void ssp1601_device::write_AL(int reg, UINT32 d)
+void ssp1601_device::write_AL(int reg, uint32_t d)
{
write_ext(reg, d);
rAL = d;
@@ -343,10 +343,10 @@ const ssp1601_device::write_func_t ssp1601_device::reg_write_handlers[16] =
//
#define ptr1_read(op) ptr1_read_(op&3,(op>>6)&4,(op<<1)&0x18)
-UINT32 ssp1601_device::ptr1_read_(int ri, int isj2, int modi3)
+uint32_t ssp1601_device::ptr1_read_(int ri, int isj2, int modi3)
{
//int t = (op&3) | ((op>>6)&4) | ((op<<1)&0x18);
- UINT32 mask, add = 0, t = ri | isj2 | modi3;
+ uint32_t mask, add = 0, t = ri | isj2 | modi3;
unsigned char *rp = nullptr;
switch (t)
{
@@ -404,7 +404,7 @@ modulo:
return t;
}
-void ssp1601_device::ptr1_write(int op, UINT32 d)
+void ssp1601_device::ptr1_write(int op, uint32_t d)
{
int t = (op&3) | ((op>>6)&4) | ((op<<1)&0x18);
switch (t)
@@ -449,7 +449,7 @@ void ssp1601_device::ptr1_write(int op, UINT32 d)
}
}
-UINT32 ssp1601_device::ptr2_read(int op)
+uint32_t ssp1601_device::ptr2_read(int op)
{
int mv, t = (op&3) | ((op>>6)&4) | ((op<<1)&0x18);
switch (t)
@@ -576,7 +576,7 @@ void ssp1601_device::execute_run()
while (m_g_cycles > 0)
{
int op;
- UINT32 tmpv;
+ uint32_t tmpv;
PPC = rPC;
diff --git a/src/devices/cpu/ssp1601/ssp1601.h b/src/devices/cpu/ssp1601/ssp1601.h
index 1917af79adb..b59fff81e4f 100644
--- a/src/devices/cpu/ssp1601/ssp1601.h
+++ b/src/devices/cpu/ssp1601/ssp1601.h
@@ -22,7 +22,7 @@ class ssp1601_device : public cpu_device
{
public:
// construction/destruction
- ssp1601_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ssp1601_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -30,9 +30,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 4; }
- virtual UINT32 execute_input_lines() const override { return 3; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 4; }
+ virtual uint32_t execute_input_lines() const override { return 3; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -43,9 +43,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -66,7 +66,7 @@ private:
unsigned short m_RAM1[256];
} mem;
};
- UINT16 m_stack[6]; /* 6-level hardware stack */
+ uint16_t m_stack[6]; /* 6-level hardware stack */
PAIR m_ppc;
int m_g_cycles;
@@ -76,24 +76,24 @@ private:
address_space *m_io;
void update_P();
- UINT32 read_unknown(int reg);
- void write_unknown(int reg, UINT32 d);
- UINT32 read_ext(int reg);
- void write_ext(int reg, UINT32 d);
- void write_ST(int reg, UINT32 d);
- UINT32 read_STACK(int reg);
- void write_STACK(int reg, UINT32 d);
- UINT32 read_PC(int reg);
- void write_PC(int reg, UINT32 d);
- UINT32 read_P(int reg);
- UINT32 read_AL(int reg);
- void write_AL(int reg, UINT32 d);
- UINT32 ptr1_read_(int ri, int isj2, int modi3);
- void ptr1_write(int op, UINT32 d);
- UINT32 ptr2_read(int op);
-
- typedef UINT32 (ssp1601_device::*read_func_t)(int reg);
- typedef void (ssp1601_device::*write_func_t)(int reg, UINT32 d);
+ uint32_t read_unknown(int reg);
+ void write_unknown(int reg, uint32_t d);
+ uint32_t read_ext(int reg);
+ void write_ext(int reg, uint32_t d);
+ void write_ST(int reg, uint32_t d);
+ uint32_t read_STACK(int reg);
+ void write_STACK(int reg, uint32_t d);
+ uint32_t read_PC(int reg);
+ void write_PC(int reg, uint32_t d);
+ uint32_t read_P(int reg);
+ uint32_t read_AL(int reg);
+ void write_AL(int reg, uint32_t d);
+ uint32_t ptr1_read_(int ri, int isj2, int modi3);
+ void ptr1_write(int op, uint32_t d);
+ uint32_t ptr2_read(int op);
+
+ typedef uint32_t (ssp1601_device::*read_func_t)(int reg);
+ typedef void (ssp1601_device::*write_func_t)(int reg, uint32_t d);
static const read_func_t reg_read_handlers[16];
static const write_func_t reg_write_handlers[16];
diff --git a/src/devices/cpu/ssp1601/ssp1601d.cpp b/src/devices/cpu/ssp1601/ssp1601d.cpp
index dfc8f3ae366..55161853a32 100644
--- a/src/devices/cpu/ssp1601/ssp1601d.cpp
+++ b/src/devices/cpu/ssp1601/ssp1601d.cpp
@@ -79,10 +79,10 @@ static char *get_cond(int op)
}
-static unsigned dasm_ssp1601(char *buffer, unsigned pc, const UINT8 *oprom)
+static unsigned dasm_ssp1601(char *buffer, unsigned pc, const uint8_t *oprom)
{
- const UINT8 *base_oprom;
- UINT16 op;
+ const uint8_t *base_oprom;
+ uint16_t op;
int size = 1;
int flags = 0;
diff --git a/src/devices/cpu/superfx/sfx_dasm.cpp b/src/devices/cpu/superfx/sfx_dasm.cpp
index e76e37ee003..d0a3dc36b0d 100644
--- a/src/devices/cpu/superfx/sfx_dasm.cpp
+++ b/src/devices/cpu/superfx/sfx_dasm.cpp
@@ -14,9 +14,9 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
va_end(vl);
}
-offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 param1, UINT16 alt)
+offs_t superfx_dasm_one(char *buffer, offs_t pc, uint8_t op, uint8_t param0, uint8_t param1, uint16_t alt)
{
- UINT8 bytes_consumed = 1;
+ uint8_t bytes_consumed = 1;
output = buffer;
switch(op)
@@ -37,47 +37,47 @@ offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 p
print("ROL");
break;
case 0x05: // BRA
- print("BRA %d", (INT8)param0);
+ print("BRA %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x06: // BLT
- print("BLT %d", (INT8)param0);
+ print("BLT %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x07: // BGE
- print("BGE %d", (INT8)param0);
+ print("BGE %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x08: // BNE
- print("BNE %d", (INT8)param0);
+ print("BNE %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x09: // BEQ
- print("BEQ %d", (INT8)param0);
+ print("BEQ %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x0a: // BPL
- print("BPL %d", (INT8)param0);
+ print("BPL %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x0b: // BMI
- print("BMI %d", (INT8)param0);
+ print("BMI %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x0c: // BCC
- print("BCC %d", (INT8)param0);
+ print("BCC %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x0d: // BCS
- print("BCS %d", (INT8)param0);
+ print("BCS %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x0e: // BVC
- print("BVC %d", (INT8)param0);
+ print("BVC %d", (int8_t)param0);
bytes_consumed = 2;
break;
case 0x0f: // BVS
- print("BVS %d", (INT8)param0);
+ print("BVS %d", (int8_t)param0);
bytes_consumed = 2;
break;
diff --git a/src/devices/cpu/superfx/superfx.cpp b/src/devices/cpu/superfx/superfx.cpp
index 1c7715c4d04..2e01df5874a 100644
--- a/src/devices/cpu/superfx/superfx.cpp
+++ b/src/devices/cpu/superfx/superfx.cpp
@@ -7,7 +7,7 @@
const device_type SUPERFX = &device_creator<superfx_device>;
-superfx_device::superfx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+superfx_device::superfx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, SUPERFX, "SuperFX", tag, owner, clock, "superfx", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 32, 0)
, m_out_irq_func(*this), m_pipeline(0), m_ramaddr(0), m_sfr(0), m_pbr(0), m_rombr(0), m_rambr(0), m_cbr(0), m_scbr(0), m_scmr(0), m_colr(0), m_por(0),
@@ -49,20 +49,20 @@ void superfx_device::superfx_update_speed()
void superfx_device::superfx_cache_flush()
{
- UINT32 n = 0;
+ uint32_t n = 0;
for(n = 0; n < 32; n++)
{
m_cache.valid[n] = 0;
}
}
-UINT8 superfx_device::superfx_cache_mmio_read(UINT32 addr)
+uint8_t superfx_device::superfx_cache_mmio_read(uint32_t addr)
{
addr = (addr + m_cbr) & 0x1ff;
return m_cache.buffer[addr];
}
-void superfx_device::superfx_cache_mmio_write(UINT32 addr, UINT8 data)
+void superfx_device::superfx_cache_mmio_write(uint32_t addr, uint8_t data)
{
addr = (addr + m_cbr) & 0x1ff;
m_cache.buffer[addr] = data;
@@ -74,7 +74,7 @@ void superfx_device::superfx_cache_mmio_write(UINT32 addr, UINT8 data)
void superfx_device::superfx_memory_reset()
{
- UINT32 n = 0;
+ uint32_t n = 0;
for(n = 0; n < 0x200; n++)
{
m_cache.buffer[n] = 0x00;
@@ -90,24 +90,24 @@ void superfx_device::superfx_memory_reset()
}
}
-UINT8 superfx_device::superfx_bus_read(UINT32 addr)
+uint8_t superfx_device::superfx_bus_read(uint32_t addr)
{
return m_program->read_byte(addr);
}
-void superfx_device::superfx_bus_write(UINT32 addr, UINT8 data)
+void superfx_device::superfx_bus_write(uint32_t addr, uint8_t data)
{
m_program->write_byte(addr, data);
}
-void superfx_device::superfx_pixelcache_flush(INT32 line)
+void superfx_device::superfx_pixelcache_flush(int32_t line)
{
- UINT8 x = m_pixelcache[line].offset << 3;
- UINT8 y = m_pixelcache[line].offset >> 5;
- UINT32 cn = 0;
- UINT32 bpp = 2 << ((m_scmr & SUPERFX_SCMR_MD) - ((m_scmr & SUPERFX_SCMR_MD) >> 1)); // = [regs.scmr.md]{ 2, 4, 4, 8 };
- UINT32 addr;
- UINT32 n = 0;
+ uint8_t x = m_pixelcache[line].offset << 3;
+ uint8_t y = m_pixelcache[line].offset >> 5;
+ uint32_t cn = 0;
+ uint32_t bpp = 2 << ((m_scmr & SUPERFX_SCMR_MD) - ((m_scmr & SUPERFX_SCMR_MD) >> 1)); // = [regs.scmr.md]{ 2, 4, 4, 8 };
+ uint32_t addr;
+ uint32_t n = 0;
if(m_pixelcache[line].bitpend == 0x00)
{
@@ -134,9 +134,9 @@ void superfx_device::superfx_pixelcache_flush(INT32 line)
for(n = 0; n < bpp; n++)
{
- UINT32 byte = ((n >> 1) << 4) + (n & 1); // = [n]{ 0, 1, 16, 17, 32, 33, 48, 49 };
- UINT8 data = 0x00;
- UINT32 x32 = 0;
+ uint32_t byte = ((n >> 1) << 4) + (n & 1); // = [n]{ 0, 1, 16, 17, 32, 33, 48, 49 };
+ uint8_t data = 0x00;
+ uint32_t x32 = 0;
for(x32 = 0; x32 < 8; x32++)
{
data |= ((m_pixelcache[line].data[x32] >> n) & 1) << x32;
@@ -154,10 +154,10 @@ void superfx_device::superfx_pixelcache_flush(INT32 line)
m_pixelcache[line].bitpend = 0x00;
}
-void superfx_device::superfx_plot(UINT8 x, UINT8 y)
+void superfx_device::superfx_plot(uint8_t x, uint8_t y)
{
- UINT8 color = m_colr;
- UINT16 offset = (y << 5) + (x >> 3);
+ uint8_t color = m_colr;
+ uint16_t offset = (y << 5) + (x >> 3);
if((m_por & SUPERFX_POR_DITHER) != 0 && (m_scmr & SUPERFX_SCMR_MD) != 3)
{
@@ -215,13 +215,13 @@ void superfx_device::superfx_plot(UINT8 x, UINT8 y)
}
}
-UINT8 superfx_device::superfx_rpix(UINT8 x, UINT8 y)
+uint8_t superfx_device::superfx_rpix(uint8_t x, uint8_t y)
{
- UINT32 cn = 0;
- UINT32 bpp;
- UINT32 addr;
- UINT8 data = 0x00;
- UINT32 n = 0;
+ uint32_t cn = 0;
+ uint32_t bpp;
+ uint32_t addr;
+ uint8_t data = 0x00;
+ uint32_t n = 0;
superfx_pixelcache_flush(1);
superfx_pixelcache_flush(0);
@@ -249,7 +249,7 @@ UINT8 superfx_device::superfx_rpix(UINT8 x, UINT8 y)
for(n = 0; n < bpp; n++)
{
- UINT32 byte = ((n >> 1) << 4) + (n & 1); // = [n]{ 0, 1, 16, 17, 32, 33, 48, 49 };
+ uint32_t byte = ((n >> 1) << 4) + (n & 1); // = [n]{ 0, 1, 16, 17, 32, 33, 48, 49 };
superfx_add_clocks_internal(m_memory_access_speed);
data |= ((superfx_bus_read(addr + byte) >> x) & 1) << n;
}
@@ -257,7 +257,7 @@ UINT8 superfx_device::superfx_rpix(UINT8 x, UINT8 y)
return data;
}
-UINT8 superfx_device::superfx_color(UINT8 source)
+uint8_t superfx_device::superfx_color(uint8_t source)
{
if(m_por & SUPERFX_POR_HIGHNIBBLE)
{
@@ -278,13 +278,13 @@ void superfx_device::superfx_rambuffer_sync()
}
}
-UINT8 superfx_device::superfx_rambuffer_read(UINT16 addr)
+uint8_t superfx_device::superfx_rambuffer_read(uint16_t addr)
{
superfx_rambuffer_sync();
return superfx_bus_read(0x700000 + (m_rambr << 16) + addr);
}
-void superfx_device::superfx_rambuffer_write(UINT16 addr, UINT8 data)
+void superfx_device::superfx_rambuffer_write(uint16_t addr, uint8_t data)
{
superfx_rambuffer_sync();
m_ramcl = m_memory_access_speed;
@@ -306,13 +306,13 @@ void superfx_device::superfx_rombuffer_update()
m_romcl = m_memory_access_speed;
}
-UINT8 superfx_device::superfx_rombuffer_read()
+uint8_t superfx_device::superfx_rombuffer_read()
{
superfx_rombuffer_sync();
return m_romdr;
}
-void superfx_device::superfx_gpr_write(UINT8 r, UINT16 data)
+void superfx_device::superfx_gpr_write(uint8_t r, uint16_t data)
{
m_r[r] = data;
if(r == 14)
@@ -325,16 +325,16 @@ void superfx_device::superfx_gpr_write(UINT8 r, UINT16 data)
}
}
-UINT8 superfx_device::superfx_op_read(UINT16 addr)
+uint8_t superfx_device::superfx_op_read(uint16_t addr)
{
- UINT16 offset = addr - m_cbr;
+ uint16_t offset = addr - m_cbr;
if(offset < 512)
{
if(!m_cache.valid[offset >> 4])
{
- UINT32 dp = offset & 0xfff0;
- UINT32 sp = (m_pbr << 16) + ((m_cbr + dp) & 0xfff0);
- UINT32 n = 0;
+ uint32_t dp = offset & 0xfff0;
+ uint32_t sp = (m_pbr << 16) + ((m_cbr + dp) & 0xfff0);
+ uint32_t n = 0;
for(n = 0; n < 16; n++)
{
superfx_add_clocks_internal(m_memory_access_speed);
@@ -365,17 +365,17 @@ UINT8 superfx_device::superfx_op_read(UINT16 addr)
}
}
-UINT8 superfx_device::superfx_peekpipe()
+uint8_t superfx_device::superfx_peekpipe()
{
- UINT8 result = m_pipeline;
+ uint8_t result = m_pipeline;
m_pipeline = superfx_op_read(m_r[15]);
m_r15_modified = 0;
return result;
}
-UINT8 superfx_device::superfx_pipe()
+uint8_t superfx_device::superfx_pipe()
{
- UINT8 result = m_pipeline;
+ uint8_t result = m_pipeline;
m_pipeline = superfx_op_read(++m_r[15]);
m_r15_modified = 0;
return result;
@@ -401,7 +401,7 @@ int superfx_device::access_rom()
return 1;
}
-UINT8 superfx_device::mmio_read(UINT32 addr)
+uint8_t superfx_device::mmio_read(uint32_t addr)
{
addr &= 0xffff;
@@ -422,7 +422,7 @@ UINT8 superfx_device::mmio_read(UINT32 addr)
case 0x3031:
{
- UINT8 r = m_sfr >> 8;
+ uint8_t r = m_sfr >> 8;
m_sfr &= ~SUPERFX_SFR_IRQ;
m_irq = 0;
m_out_irq_func(m_irq);
@@ -451,7 +451,7 @@ UINT8 superfx_device::mmio_read(UINT32 addr)
return 0;
}
-void superfx_device::mmio_write(UINT32 addr, UINT8 data)
+void superfx_device::mmio_write(uint32_t addr, uint8_t data)
{
addr &= 0xffff;
@@ -465,7 +465,7 @@ void superfx_device::mmio_write(UINT32 addr, UINT8 data)
if(addr >= 0x3000 && addr <= 0x301f)
{
- UINT32 n = (addr >> 1) & 0xf;
+ uint32_t n = (addr >> 1) & 0xf;
if((addr & 1) == 0)
{
m_r[n] = (m_r[n] & 0xff00) | data;
@@ -486,7 +486,7 @@ void superfx_device::mmio_write(UINT32 addr, UINT8 data)
{
case 0x3030:
{
- UINT8 g = (m_sfr & SUPERFX_SFR_G) ? 1 : 0;
+ uint8_t g = (m_sfr & SUPERFX_SFR_G) ? 1 : 0;
m_sfr = (m_sfr & 0xff00) | (data << 0);
if(g == 1 && !(m_sfr & SUPERFX_SFR_G))
{
@@ -529,7 +529,7 @@ void superfx_device::mmio_write(UINT32 addr, UINT8 data)
}
}
-void superfx_device::superfx_add_clocks_internal(UINT32 clocks)
+void superfx_device::superfx_add_clocks_internal(uint32_t clocks)
{
if(m_romcl)
{
@@ -564,7 +564,7 @@ void superfx_device::superfx_timing_reset()
m_ramdr = 0;
}
-void superfx_device::add_clocks(INT32 clocks)
+void superfx_device::add_clocks(int32_t clocks)
{
superfx_add_clocks_internal(clocks);
}
@@ -763,7 +763,7 @@ void superfx_device::superfx_dreg_sfr_sz_update()
void superfx_device::execute_run()
{
- UINT8 op;
+ uint8_t op;
if(!(m_sfr & SUPERFX_SFR_G))
{
@@ -817,7 +817,7 @@ void superfx_device::execute_run()
break;
case 0x04: // ROL
{
- UINT16 carry = *(m_sreg) & 0x8000;
+ uint16_t carry = *(m_sreg) & 0x8000;
superfx_gpr_write(m_dreg_idx, (*(m_sreg) << 1) | SUPERFX_SFR_CY_SET);
m_sfr &= ~SUPERFX_SFR_CY;
m_sfr |= carry ? SUPERFX_SFR_CY : 0;
@@ -827,13 +827,13 @@ void superfx_device::execute_run()
}
case 0x05: // BRA
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
superfx_gpr_write(15, m_r[15] + e);
break;
}
case 0x06: // BLT
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if((SUPERFX_SFR_S_SET ^ SUPERFX_SFR_OV_SET) == 0)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -842,7 +842,7 @@ void superfx_device::execute_run()
}
case 0x07: // BGE
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if((SUPERFX_SFR_S_SET ^ SUPERFX_SFR_OV_SET) == 1)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -851,7 +851,7 @@ void superfx_device::execute_run()
}
case 0x08: // BNE
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if(SUPERFX_SFR_Z_SET == 0)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -860,7 +860,7 @@ void superfx_device::execute_run()
}
case 0x09: // BEQ
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if(SUPERFX_SFR_Z_SET == 1)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -869,7 +869,7 @@ void superfx_device::execute_run()
}
case 0x0a: // BPL
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if(SUPERFX_SFR_S_SET == 0)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -878,7 +878,7 @@ void superfx_device::execute_run()
}
case 0x0b: // BMI
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if(SUPERFX_SFR_S_SET == 1)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -887,7 +887,7 @@ void superfx_device::execute_run()
}
case 0x0c: // BCC
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if(SUPERFX_SFR_CY_SET == 0)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -896,7 +896,7 @@ void superfx_device::execute_run()
}
case 0x0d: // BCS
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if(SUPERFX_SFR_CY_SET == 1)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -905,7 +905,7 @@ void superfx_device::execute_run()
}
case 0x0e: // BVC
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if(SUPERFX_SFR_OV_SET == 0)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -914,7 +914,7 @@ void superfx_device::execute_run()
}
case 0x0f: // BVS
{
- INT32 e = (INT8)superfx_pipe();
+ int32_t e = (int8_t)superfx_pipe();
if(SUPERFX_SFR_OV_SET == 1)
{
superfx_gpr_write(15, m_r[15] + e);
@@ -991,7 +991,7 @@ void superfx_device::execute_run()
case 0x46: case 0x47: case 0x48: case 0x49: case 0x4a: case 0x4b: // LDW_IR / LDB_IR
if((m_sfr & SUPERFX_SFR_ALT1) == 0)
{ // LDW_IR
- UINT16 data;
+ uint16_t data;
m_ramaddr = m_r[op & 0xf];
data = superfx_rambuffer_read(m_ramaddr ^ 0) << 0;
data |= superfx_rambuffer_read(m_ramaddr ^ 1) << 8;
@@ -1049,7 +1049,7 @@ void superfx_device::execute_run()
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f: // ADD / ADC / ADDI / ADCI
{
- INT32 r = *(m_sreg);
+ int32_t r = *(m_sreg);
m_sfr &= ~(SUPERFX_SFR_OV | SUPERFX_SFR_S | SUPERFX_SFR_Z);
switch(m_sfr & SUPERFX_SFR_ALT)
{
@@ -1073,7 +1073,7 @@ void superfx_device::execute_run()
m_sfr &= ~SUPERFX_SFR_CY;
m_sfr |= (r & 0x8000) ? SUPERFX_SFR_S : 0;
m_sfr |= (r >= 0x10000) ? SUPERFX_SFR_CY : 0;
- m_sfr |= ((UINT16)r == 0) ? SUPERFX_SFR_Z : 0;
+ m_sfr |= ((uint16_t)r == 0) ? SUPERFX_SFR_Z : 0;
superfx_gpr_write(m_dreg_idx, r);
superfx_regs_reset();
break;
@@ -1082,7 +1082,7 @@ void superfx_device::execute_run()
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f: // SUB / SBC / SUBI / CMP
{
- INT32 r = 0;
+ int32_t r = 0;
m_sfr &= ~(SUPERFX_SFR_OV | SUPERFX_SFR_S | SUPERFX_SFR_Z);
switch(m_sfr & SUPERFX_SFR_ALT)
{
@@ -1109,7 +1109,7 @@ void superfx_device::execute_run()
m_sfr &= ~SUPERFX_SFR_CY;
m_sfr |= (r & 0x8000) ? SUPERFX_SFR_S : 0;
m_sfr |= (r >= 0x0) ? SUPERFX_SFR_CY : 0;
- m_sfr |= ((UINT16)r == 0) ? SUPERFX_SFR_Z : 0;
+ m_sfr |= ((uint16_t)r == 0) ? SUPERFX_SFR_Z : 0;
superfx_regs_reset();
break;
}
@@ -1150,16 +1150,16 @@ void superfx_device::execute_run()
switch(m_sfr & SUPERFX_SFR_ALT)
{
case SUPERFX_SFR_ALT0: // MULT
- superfx_gpr_write(m_dreg_idx, (INT8)(*(m_sreg)) * (INT8)(m_r[op & 0xf]));
+ superfx_gpr_write(m_dreg_idx, (int8_t)(*(m_sreg)) * (int8_t)(m_r[op & 0xf]));
break;
case SUPERFX_SFR_ALT1: // UMULT
- superfx_gpr_write(m_dreg_idx, (UINT8)(*(m_sreg)) * (UINT8)(m_r[op & 0xf]));
+ superfx_gpr_write(m_dreg_idx, (uint8_t)(*(m_sreg)) * (uint8_t)(m_r[op & 0xf]));
break;
case SUPERFX_SFR_ALT2: // MULTI
- superfx_gpr_write(m_dreg_idx, (INT8)(*(m_sreg)) * (INT8)(op & 0xf));
+ superfx_gpr_write(m_dreg_idx, (int8_t)(*(m_sreg)) * (int8_t)(op & 0xf));
break;
case SUPERFX_SFR_ALT3: // UMULTI
- superfx_gpr_write(m_dreg_idx, (UINT8)(*(m_sreg)) * (UINT8)(op & 0xf));
+ superfx_gpr_write(m_dreg_idx, (uint8_t)(*(m_sreg)) * (uint8_t)(op & 0xf));
break;
}
superfx_dreg_sfr_sz_update();
@@ -1182,7 +1182,7 @@ void superfx_device::execute_run()
break;
case 0x95: // SEX
- superfx_gpr_write(m_dreg_idx, (INT8)(*(m_sreg)));
+ superfx_gpr_write(m_dreg_idx, (int8_t)(*(m_sreg)));
superfx_dreg_sfr_sz_update();
superfx_regs_reset();
break;
@@ -1192,7 +1192,7 @@ void superfx_device::execute_run()
{ // ASR
m_sfr &= ~SUPERFX_SFR_CY;
m_sfr |= (*(m_sreg) & 1) ? SUPERFX_SFR_CY : 0;
- superfx_gpr_write(m_dreg_idx, (INT16)(*(m_sreg)) >> 1);
+ superfx_gpr_write(m_dreg_idx, (int16_t)(*(m_sreg)) >> 1);
superfx_dreg_sfr_sz_update();
superfx_regs_reset();
}
@@ -1200,7 +1200,7 @@ void superfx_device::execute_run()
{ // DIV2
m_sfr &= ~SUPERFX_SFR_CY;
m_sfr |= (*(m_sreg) & 1) ? SUPERFX_SFR_CY : 0;
- superfx_gpr_write(m_dreg_idx, ((INT16)(*(m_sreg)) >> 1) + ((UINT32)(*(m_sreg) + 1) >> 16));
+ superfx_gpr_write(m_dreg_idx, ((int16_t)(*(m_sreg)) >> 1) + ((uint32_t)(*(m_sreg) + 1) >> 16));
superfx_dreg_sfr_sz_update();
superfx_regs_reset();
}
@@ -1208,8 +1208,8 @@ void superfx_device::execute_run()
case 0x97: // ROR
{
- UINT16 carry = *(m_sreg) & 1;
- superfx_gpr_write(m_dreg_idx, (SUPERFX_SFR_CY_SET << 15) | ((UINT16)(*(m_sreg)) >> 1));
+ uint16_t carry = *(m_sreg) & 1;
+ superfx_gpr_write(m_dreg_idx, (SUPERFX_SFR_CY_SET << 15) | ((uint16_t)(*(m_sreg)) >> 1));
m_sfr &= ~SUPERFX_SFR_CY;
m_sfr |= carry ? SUPERFX_SFR_CY : 0;
superfx_dreg_sfr_sz_update();
@@ -1234,7 +1234,7 @@ void superfx_device::execute_run()
break;
case 0x9e: // LOB
- superfx_gpr_write(m_dreg_idx, (UINT16)(*(m_sreg)) & 0x00ff);
+ superfx_gpr_write(m_dreg_idx, (uint16_t)(*(m_sreg)) & 0x00ff);
m_sfr &= ~(SUPERFX_SFR_S | SUPERFX_SFR_Z);
m_sfr |= (*(m_dreg) & 0x80) ? SUPERFX_SFR_S : 0;
m_sfr |= (*(m_dreg) == 0) ? SUPERFX_SFR_Z : 0;
@@ -1243,7 +1243,7 @@ void superfx_device::execute_run()
case 0x9f: // FMULT / LMULT
{
- UINT32 result = (INT16)(*(m_sreg)) * (INT16)(m_r[6]);
+ uint32_t result = (int16_t)(*(m_sreg)) * (int16_t)(m_r[6]);
if(m_sfr & SUPERFX_SFR_ALT1)
{ // LMULT
superfx_gpr_write(4, result);
@@ -1262,7 +1262,7 @@ void superfx_device::execute_run()
switch(m_sfr & SUPERFX_SFR_ALT)
{
case SUPERFX_SFR_ALT0: // IBT
- superfx_gpr_write(op & 0xf, (INT8)superfx_pipe());
+ superfx_gpr_write(op & 0xf, (int8_t)superfx_pipe());
superfx_regs_reset();
break;
case SUPERFX_SFR_ALT2: // SMS
@@ -1274,7 +1274,7 @@ void superfx_device::execute_run()
case SUPERFX_SFR_ALT1: // LMS
case SUPERFX_SFR_ALT3: // LMS
{
- UINT16 data;
+ uint16_t data;
m_ramaddr = superfx_pipe() << 1;
data = superfx_rambuffer_read(m_ramaddr ^ 0) << 0;
data |= superfx_rambuffer_read(m_ramaddr ^ 1) << 8;
@@ -1372,7 +1372,7 @@ void superfx_device::execute_run()
case 0xef: // GETB / GETBH / GETBL / GETBS
{
- UINT8 byte = superfx_rombuffer_read();
+ uint8_t byte = superfx_rombuffer_read();
switch(m_sfr & SUPERFX_SFR_ALT)
{
case SUPERFX_SFR_ALT0: // GETB
@@ -1385,7 +1385,7 @@ void superfx_device::execute_run()
superfx_gpr_write(m_dreg_idx, (*(m_sreg) & 0xff00) | (byte << 0));
break;
case SUPERFX_SFR_ALT3: // GETBS
- superfx_gpr_write(m_dreg_idx, (INT8)byte);
+ superfx_gpr_write(m_dreg_idx, (int8_t)byte);
break;
}
superfx_regs_reset();
@@ -1395,7 +1395,7 @@ void superfx_device::execute_run()
case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7:
case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: // IWT / LM / SM / LM
{
- UINT16 data;
+ uint16_t data;
switch(m_sfr & SUPERFX_SFR_ALT)
{
case SUPERFX_SFR_ALT0: // IWT
@@ -1439,14 +1439,14 @@ void superfx_device::execute_run()
}
-offs_t superfx_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t superfx_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
-extern offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 param1, UINT16 alt);
+extern offs_t superfx_dasm_one(char *buffer, offs_t pc, uint8_t op, uint8_t param0, uint8_t param1, uint16_t alt);
- UINT8 op = *(UINT8 *)(opram + 0);
- UINT8 param0 = *(UINT8 *)(opram + 1);
- UINT8 param1 = *(UINT8 *)(opram + 2);
- UINT16 alt = m_sfr & SUPERFX_SFR_ALT;
+ uint8_t op = *(uint8_t *)(opram + 0);
+ uint8_t param0 = *(uint8_t *)(opram + 1);
+ uint8_t param1 = *(uint8_t *)(opram + 2);
+ uint16_t alt = m_sfr & SUPERFX_SFR_ALT;
return superfx_dasm_one(buffer, pc, op, param0, param1, alt);
}
diff --git a/src/devices/cpu/superfx/superfx.h b/src/devices/cpu/superfx/superfx.h
index 1de27856668..f5c14c7561e 100644
--- a/src/devices/cpu/superfx/superfx.h
+++ b/src/devices/cpu/superfx/superfx.h
@@ -94,14 +94,14 @@ class superfx_device : public cpu_device
{
public:
// construction/destruction
- superfx_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ superfx_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
// static configuration helpers
template<class _Object> static devcb_base &set_out_irq_func(device_t &device, _Object object) { return downcast<superfx_device &>(device).m_out_irq_func.set_callback(object); }
- UINT8 mmio_read(UINT32 addr);
- void mmio_write(UINT32 addr, UINT8 data);
- void add_clocks(INT32 clocks);
+ uint8_t mmio_read(uint32_t addr);
+ void mmio_write(uint32_t addr, uint8_t data);
+ void add_clocks(int32_t clocks);
int access_ram();
int access_rom();
@@ -111,9 +111,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -124,89 +124,89 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 3; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 3; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
devcb_write_line m_out_irq_func;
- UINT8 m_pipeline;
- UINT16 m_ramaddr; // RAM Address
-
- UINT16 m_r[16]; // GPRs
- UINT16 m_sfr; // Status Flag Register
- UINT8 m_pbr; // Program Bank Register
- UINT8 m_rombr; // Game Pack ROM Bank Register
- UINT8 m_rambr; // Game Pack RAM Bank Register
- UINT16 m_cbr; // Cache Base Register
- UINT8 m_scbr; // Screen Base Register
- UINT8 m_scmr; // Screen Mode Register
- UINT8 m_colr; // Color Register
- UINT8 m_por; // Plot Option Register
- UINT8 m_bramr; // Back-Up RAM Register
- UINT8 m_vcr; // Version Code Register
- UINT8 m_cfgr; // Config Register
- UINT8 m_clsr; // Clock Select Register
-
- UINT32 m_romcl; // Clock ticks until ROMDR is valid
- UINT8 m_romdr; // ROM Buffer Data Register
-
- UINT32 m_ramcl; // Clock ticks until RAMDR is valid;
- UINT16 m_ramar; // RAM Buffer Address Register
- UINT8 m_ramdr; // RAM Buffer Data Register
-
- UINT16 *m_sreg; // Source Register (From)
- UINT8 m_sreg_idx;// Source Register (To), index
- UINT16 *m_dreg; // Destination Register (To)
- UINT8 m_dreg_idx;// Destination Register (To), index
- UINT8 m_r15_modified;
-
- UINT8 m_irq; // IRQ Pending
-
- UINT32 m_cache_access_speed;
- UINT32 m_memory_access_speed;
+ uint8_t m_pipeline;
+ uint16_t m_ramaddr; // RAM Address
+
+ uint16_t m_r[16]; // GPRs
+ uint16_t m_sfr; // Status Flag Register
+ uint8_t m_pbr; // Program Bank Register
+ uint8_t m_rombr; // Game Pack ROM Bank Register
+ uint8_t m_rambr; // Game Pack RAM Bank Register
+ uint16_t m_cbr; // Cache Base Register
+ uint8_t m_scbr; // Screen Base Register
+ uint8_t m_scmr; // Screen Mode Register
+ uint8_t m_colr; // Color Register
+ uint8_t m_por; // Plot Option Register
+ uint8_t m_bramr; // Back-Up RAM Register
+ uint8_t m_vcr; // Version Code Register
+ uint8_t m_cfgr; // Config Register
+ uint8_t m_clsr; // Clock Select Register
+
+ uint32_t m_romcl; // Clock ticks until ROMDR is valid
+ uint8_t m_romdr; // ROM Buffer Data Register
+
+ uint32_t m_ramcl; // Clock ticks until RAMDR is valid;
+ uint16_t m_ramar; // RAM Buffer Address Register
+ uint8_t m_ramdr; // RAM Buffer Data Register
+
+ uint16_t *m_sreg; // Source Register (From)
+ uint8_t m_sreg_idx;// Source Register (To), index
+ uint16_t *m_dreg; // Destination Register (To)
+ uint8_t m_dreg_idx;// Destination Register (To), index
+ uint8_t m_r15_modified;
+
+ uint8_t m_irq; // IRQ Pending
+
+ uint32_t m_cache_access_speed;
+ uint32_t m_memory_access_speed;
struct {
- UINT8 buffer[0x200];
- UINT8 valid[0x20];
+ uint8_t buffer[0x200];
+ uint8_t valid[0x20];
} m_cache;
struct {
- UINT16 offset;
- UINT8 bitpend;
- UINT8 data[8];
+ uint16_t offset;
+ uint8_t bitpend;
+ uint8_t data[8];
} m_pixelcache[2];
address_space *m_program;
int m_icount;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
inline void superfx_regs_reset();
void superfx_update_speed();
void superfx_cache_flush();
- UINT8 superfx_cache_mmio_read(UINT32 addr);
- void superfx_cache_mmio_write(UINT32 addr, UINT8 data);
+ uint8_t superfx_cache_mmio_read(uint32_t addr);
+ void superfx_cache_mmio_write(uint32_t addr, uint8_t data);
void superfx_memory_reset();
- inline UINT8 superfx_bus_read(UINT32 addr);
- inline void superfx_bus_write(UINT32 addr, UINT8 data);
- inline void superfx_pixelcache_flush(INT32 line);
- inline void superfx_plot(UINT8 x, UINT8 y);
- UINT8 superfx_rpix(UINT8 x, UINT8 y);
- inline UINT8 superfx_color(UINT8 source);
+ inline uint8_t superfx_bus_read(uint32_t addr);
+ inline void superfx_bus_write(uint32_t addr, uint8_t data);
+ inline void superfx_pixelcache_flush(int32_t line);
+ inline void superfx_plot(uint8_t x, uint8_t y);
+ uint8_t superfx_rpix(uint8_t x, uint8_t y);
+ inline uint8_t superfx_color(uint8_t source);
inline void superfx_rambuffer_sync();
- inline UINT8 superfx_rambuffer_read(UINT16 addr);
- inline void superfx_rambuffer_write(UINT16 addr, UINT8 data);
+ inline uint8_t superfx_rambuffer_read(uint16_t addr);
+ inline void superfx_rambuffer_write(uint16_t addr, uint8_t data);
inline void superfx_rombuffer_sync();
inline void superfx_rombuffer_update();
- inline UINT8 superfx_rombuffer_read();
- inline void superfx_gpr_write(UINT8 r, UINT16 data);
- inline UINT8 superfx_op_read(UINT16 addr);
- inline UINT8 superfx_peekpipe();
- inline UINT8 superfx_pipe();
- inline void superfx_add_clocks_internal(UINT32 clocks);
+ inline uint8_t superfx_rombuffer_read();
+ inline void superfx_gpr_write(uint8_t r, uint16_t data);
+ inline uint8_t superfx_op_read(uint16_t addr);
+ inline uint8_t superfx_peekpipe();
+ inline uint8_t superfx_pipe();
+ inline void superfx_add_clocks_internal(uint32_t clocks);
void superfx_timing_reset();
inline void superfx_dreg_sfr_sz_update();
};
diff --git a/src/devices/cpu/t11/t11.cpp b/src/devices/cpu/t11/t11.cpp
index d53bebf13cb..ce9e4290e87 100644
--- a/src/devices/cpu/t11/t11.cpp
+++ b/src/devices/cpu/t11/t11.cpp
@@ -39,12 +39,12 @@ const device_type T11 = &device_creator<t11_device>;
const device_type K1801VM2 = &device_creator<k1801vm2_device>;
-k1801vm2_device::k1801vm2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+k1801vm2_device::k1801vm2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: t11_device(mconfig, K1801VM2, "K1801VM2", tag, owner, clock, "k1801vm2", __FILE__)
{
}
-t11_device::t11_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+t11_device::t11_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, 0)
, c_initial_mode(0)
@@ -55,7 +55,7 @@ t11_device::t11_device(const machine_config &mconfig, device_type type, const ch
memset(&m_psw, 0x00, sizeof(m_psw));
}
-t11_device::t11_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+t11_device::t11_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, T11, "T11", tag, owner, clock, "t11", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, 0)
, c_initial_mode(0)
@@ -169,8 +169,8 @@ int t11_device::POP()
struct irq_table_entry
{
- UINT8 priority;
- UINT8 vector;
+ uint8_t priority;
+ uint8_t vector;
};
static const struct irq_table_entry irq_table[] =
@@ -251,7 +251,7 @@ void t11_device::t11_check_irqs()
void t11_device::device_start()
{
- static const UINT16 initial_pc[] =
+ static const uint16_t initial_pc[] =
{
0xc000, 0x8000, 0x4000, 0x2000,
0x1000, 0x0000, 0xf600, 0xf400
@@ -409,7 +409,7 @@ void t11_device::execute_run()
do
{
- UINT16 op;
+ uint16_t op;
m_ppc = m_reg[7]; /* copy PC to previous PC */
@@ -422,7 +422,7 @@ void t11_device::execute_run()
}
-offs_t t11_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t t11_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( t11 );
return CPU_DISASSEMBLE_NAME(t11)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/t11/t11.h b/src/devices/cpu/t11/t11.h
index 690be3d333c..1c62db4ee17 100644
--- a/src/devices/cpu/t11/t11.h
+++ b/src/devices/cpu/t11/t11.h
@@ -38,11 +38,11 @@ class t11_device : public cpu_device
{
public:
// construction/destruction
- t11_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
- t11_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ t11_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
+ t11_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// static configuration helpers
- static void set_initial_mode(device_t &device, const UINT16 mode) { downcast<t11_device &>(device).c_initial_mode = mode; }
+ static void set_initial_mode(device_t &device, const uint16_t mode) { downcast<t11_device &>(device).c_initial_mode = mode; }
template<class _Object> static devcb_base &set_out_reset_func(device_t &device, _Object object) { return downcast<t11_device &>(device).m_out_reset_func.set_callback(object); }
protected:
@@ -51,12 +51,12 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 12; }
- virtual UINT32 execute_max_cycles() const override { return 110; }
- virtual UINT32 execute_input_lines() const override { return 4; }
+ virtual uint32_t execute_min_cycles() const override { return 12; }
+ virtual uint32_t execute_max_cycles() const override { return 110; }
+ virtual uint32_t execute_input_lines() const override { return 4; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual UINT32 execute_default_irq_vector() const override { return -1; };
+ virtual uint32_t execute_default_irq_vector() const override { return -1; };
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; }
@@ -65,21 +65,21 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 6; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 6; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
protected:
address_space_config m_program_config;
- UINT16 c_initial_mode;
+ uint16_t c_initial_mode;
PAIR m_ppc; /* previous program counter */
PAIR m_reg[8];
PAIR m_psw;
- UINT16 m_initial_pc;
- UINT8 m_wait_state;
- UINT8 m_irq_state;
+ uint16_t m_initial_pc;
+ uint8_t m_wait_state;
+ uint8_t m_irq_state;
int m_icount;
address_space *m_program;
direct_read_data *m_direct;
@@ -94,1055 +94,1055 @@ protected:
inline int POP();
void t11_check_irqs();
- typedef void ( t11_device::*opcode_func )(UINT16 op);
+ typedef void ( t11_device::*opcode_func )(uint16_t op);
static const opcode_func s_opcode_table[65536 >> 3];
- void op_0000(UINT16 op);
- void halt(UINT16 op);
- void illegal(UINT16 op);
- void jmp_rgd(UINT16 op);
- void jmp_in(UINT16 op);
- void jmp_ind(UINT16 op);
- void jmp_de(UINT16 op);
- void jmp_ded(UINT16 op);
- void jmp_ix(UINT16 op);
- void jmp_ixd(UINT16 op);
- void rts(UINT16 op);
- void ccc(UINT16 op);
- void scc(UINT16 op);
- void swab_rg(UINT16 op);
- void swab_rgd(UINT16 op);
- void swab_in(UINT16 op);
- void swab_ind(UINT16 op);
- void swab_de(UINT16 op);
- void swab_ded(UINT16 op);
- void swab_ix(UINT16 op);
- void swab_ixd(UINT16 op);
- void br(UINT16 op);
- void bne(UINT16 op);
- void beq(UINT16 op);
- void bge(UINT16 op);
- void blt(UINT16 op);
- void bgt(UINT16 op);
- void ble(UINT16 op);
- void jsr_rgd(UINT16 op);
- void jsr_in(UINT16 op);
- void jsr_ind(UINT16 op);
- void jsr_de(UINT16 op);
- void jsr_ded(UINT16 op);
- void jsr_ix(UINT16 op);
- void jsr_ixd(UINT16 op);
- void clr_rg(UINT16 op);
- void clr_rgd(UINT16 op);
- void clr_in(UINT16 op);
- void clr_ind(UINT16 op);
- void clr_de(UINT16 op);
- void clr_ded(UINT16 op);
- void clr_ix(UINT16 op);
- void clr_ixd(UINT16 op);
- void com_rg(UINT16 op);
- void com_rgd(UINT16 op);
- void com_in(UINT16 op);
- void com_ind(UINT16 op);
- void com_de(UINT16 op);
- void com_ded(UINT16 op);
- void com_ix(UINT16 op);
- void com_ixd(UINT16 op);
- void inc_rg(UINT16 op);
- void inc_rgd(UINT16 op);
- void inc_in(UINT16 op);
- void inc_ind(UINT16 op);
- void inc_de(UINT16 op);
- void inc_ded(UINT16 op);
- void inc_ix(UINT16 op);
- void inc_ixd(UINT16 op);
- void dec_rg(UINT16 op);
- void dec_rgd(UINT16 op);
- void dec_in(UINT16 op);
- void dec_ind(UINT16 op);
- void dec_de(UINT16 op);
- void dec_ded(UINT16 op);
- void dec_ix(UINT16 op);
- void dec_ixd(UINT16 op);
- void neg_rg(UINT16 op);
- void neg_rgd(UINT16 op);
- void neg_in(UINT16 op);
- void neg_ind(UINT16 op);
- void neg_de(UINT16 op);
- void neg_ded(UINT16 op);
- void neg_ix(UINT16 op);
- void neg_ixd(UINT16 op);
- void adc_rg(UINT16 op);
- void adc_rgd(UINT16 op);
- void adc_in(UINT16 op);
- void adc_ind(UINT16 op);
- void adc_de(UINT16 op);
- void adc_ded(UINT16 op);
- void adc_ix(UINT16 op);
- void adc_ixd(UINT16 op);
- void sbc_rg(UINT16 op);
- void sbc_rgd(UINT16 op);
- void sbc_in(UINT16 op);
- void sbc_ind(UINT16 op);
- void sbc_de(UINT16 op);
- void sbc_ded(UINT16 op);
- void sbc_ix(UINT16 op);
- void sbc_ixd(UINT16 op);
- void tst_rg(UINT16 op);
- void tst_rgd(UINT16 op);
- void tst_in(UINT16 op);
- void tst_ind(UINT16 op);
- void tst_de(UINT16 op);
- void tst_ded(UINT16 op);
- void tst_ix(UINT16 op);
- void tst_ixd(UINT16 op);
- void ror_rg(UINT16 op);
- void ror_rgd(UINT16 op);
- void ror_in(UINT16 op);
- void ror_ind(UINT16 op);
- void ror_de(UINT16 op);
- void ror_ded(UINT16 op);
- void ror_ix(UINT16 op);
- void ror_ixd(UINT16 op);
- void rol_rg(UINT16 op);
- void rol_rgd(UINT16 op);
- void rol_in(UINT16 op);
- void rol_ind(UINT16 op);
- void rol_de(UINT16 op);
- void rol_ded(UINT16 op);
- void rol_ix(UINT16 op);
- void rol_ixd(UINT16 op);
- void asr_rg(UINT16 op);
- void asr_rgd(UINT16 op);
- void asr_in(UINT16 op);
- void asr_ind(UINT16 op);
- void asr_de(UINT16 op);
- void asr_ded(UINT16 op);
- void asr_ix(UINT16 op);
- void asr_ixd(UINT16 op);
- void asl_rg(UINT16 op);
- void asl_rgd(UINT16 op);
- void asl_in(UINT16 op);
- void asl_ind(UINT16 op);
- void asl_de(UINT16 op);
- void asl_ded(UINT16 op);
- void asl_ix(UINT16 op);
- void asl_ixd(UINT16 op);
- void mark(UINT16 op);
- void sxt_rg(UINT16 op);
- void sxt_rgd(UINT16 op);
- void sxt_in(UINT16 op);
- void sxt_ind(UINT16 op);
- void sxt_de(UINT16 op);
- void sxt_ded(UINT16 op);
- void sxt_ix(UINT16 op);
- void sxt_ixd(UINT16 op);
- void mov_rg_rg(UINT16 op);
- void mov_rg_rgd(UINT16 op);
- void mov_rg_in(UINT16 op);
- void mov_rg_ind(UINT16 op);
- void mov_rg_de(UINT16 op);
- void mov_rg_ded(UINT16 op);
- void mov_rg_ix(UINT16 op);
- void mov_rg_ixd(UINT16 op);
- void mov_rgd_rg(UINT16 op);
- void mov_rgd_rgd(UINT16 op);
- void mov_rgd_in(UINT16 op);
- void mov_rgd_ind(UINT16 op);
- void mov_rgd_de(UINT16 op);
- void mov_rgd_ded(UINT16 op);
- void mov_rgd_ix(UINT16 op);
- void mov_rgd_ixd(UINT16 op);
- void mov_in_rg(UINT16 op);
- void mov_in_rgd(UINT16 op);
- void mov_in_in(UINT16 op);
- void mov_in_ind(UINT16 op);
- void mov_in_de(UINT16 op);
- void mov_in_ded(UINT16 op);
- void mov_in_ix(UINT16 op);
- void mov_in_ixd(UINT16 op);
- void mov_ind_rg(UINT16 op);
- void mov_ind_rgd(UINT16 op);
- void mov_ind_in(UINT16 op);
- void mov_ind_ind(UINT16 op);
- void mov_ind_de(UINT16 op);
- void mov_ind_ded(UINT16 op);
- void mov_ind_ix(UINT16 op);
- void mov_ind_ixd(UINT16 op);
- void mov_de_rg(UINT16 op);
- void mov_de_rgd(UINT16 op);
- void mov_de_in(UINT16 op);
- void mov_de_ind(UINT16 op);
- void mov_de_de(UINT16 op);
- void mov_de_ded(UINT16 op);
- void mov_de_ix(UINT16 op);
- void mov_de_ixd(UINT16 op);
- void mov_ded_rg(UINT16 op);
- void mov_ded_rgd(UINT16 op);
- void mov_ded_in(UINT16 op);
- void mov_ded_ind(UINT16 op);
- void mov_ded_de(UINT16 op);
- void mov_ded_ded(UINT16 op);
- void mov_ded_ix(UINT16 op);
- void mov_ded_ixd(UINT16 op);
- void mov_ix_rg(UINT16 op);
- void mov_ix_rgd(UINT16 op);
- void mov_ix_in(UINT16 op);
- void mov_ix_ind(UINT16 op);
- void mov_ix_de(UINT16 op);
- void mov_ix_ded(UINT16 op);
- void mov_ix_ix(UINT16 op);
- void mov_ix_ixd(UINT16 op);
- void mov_ixd_rg(UINT16 op);
- void mov_ixd_rgd(UINT16 op);
- void mov_ixd_in(UINT16 op);
- void mov_ixd_ind(UINT16 op);
- void mov_ixd_de(UINT16 op);
- void mov_ixd_ded(UINT16 op);
- void mov_ixd_ix(UINT16 op);
- void mov_ixd_ixd(UINT16 op);
- void cmp_rg_rg(UINT16 op);
- void cmp_rg_rgd(UINT16 op);
- void cmp_rg_in(UINT16 op);
- void cmp_rg_ind(UINT16 op);
- void cmp_rg_de(UINT16 op);
- void cmp_rg_ded(UINT16 op);
- void cmp_rg_ix(UINT16 op);
- void cmp_rg_ixd(UINT16 op);
- void cmp_rgd_rg(UINT16 op);
- void cmp_rgd_rgd(UINT16 op);
- void cmp_rgd_in(UINT16 op);
- void cmp_rgd_ind(UINT16 op);
- void cmp_rgd_de(UINT16 op);
- void cmp_rgd_ded(UINT16 op);
- void cmp_rgd_ix(UINT16 op);
- void cmp_rgd_ixd(UINT16 op);
- void cmp_in_rg(UINT16 op);
- void cmp_in_rgd(UINT16 op);
- void cmp_in_in(UINT16 op);
- void cmp_in_ind(UINT16 op);
- void cmp_in_de(UINT16 op);
- void cmp_in_ded(UINT16 op);
- void cmp_in_ix(UINT16 op);
- void cmp_in_ixd(UINT16 op);
- void cmp_ind_rg(UINT16 op);
- void cmp_ind_rgd(UINT16 op);
- void cmp_ind_in(UINT16 op);
- void cmp_ind_ind(UINT16 op);
- void cmp_ind_de(UINT16 op);
- void cmp_ind_ded(UINT16 op);
- void cmp_ind_ix(UINT16 op);
- void cmp_ind_ixd(UINT16 op);
- void cmp_de_rg(UINT16 op);
- void cmp_de_rgd(UINT16 op);
- void cmp_de_in(UINT16 op);
- void cmp_de_ind(UINT16 op);
- void cmp_de_de(UINT16 op);
- void cmp_de_ded(UINT16 op);
- void cmp_de_ix(UINT16 op);
- void cmp_de_ixd(UINT16 op);
- void cmp_ded_rg(UINT16 op);
- void cmp_ded_rgd(UINT16 op);
- void cmp_ded_in(UINT16 op);
- void cmp_ded_ind(UINT16 op);
- void cmp_ded_de(UINT16 op);
- void cmp_ded_ded(UINT16 op);
- void cmp_ded_ix(UINT16 op);
- void cmp_ded_ixd(UINT16 op);
- void cmp_ix_rg(UINT16 op);
- void cmp_ix_rgd(UINT16 op);
- void cmp_ix_in(UINT16 op);
- void cmp_ix_ind(UINT16 op);
- void cmp_ix_de(UINT16 op);
- void cmp_ix_ded(UINT16 op);
- void cmp_ix_ix(UINT16 op);
- void cmp_ix_ixd(UINT16 op);
- void cmp_ixd_rg(UINT16 op);
- void cmp_ixd_rgd(UINT16 op);
- void cmp_ixd_in(UINT16 op);
- void cmp_ixd_ind(UINT16 op);
- void cmp_ixd_de(UINT16 op);
- void cmp_ixd_ded(UINT16 op);
- void cmp_ixd_ix(UINT16 op);
- void cmp_ixd_ixd(UINT16 op);
- void bit_rg_rg(UINT16 op);
- void bit_rg_rgd(UINT16 op);
- void bit_rg_in(UINT16 op);
- void bit_rg_ind(UINT16 op);
- void bit_rg_de(UINT16 op);
- void bit_rg_ded(UINT16 op);
- void bit_rg_ix(UINT16 op);
- void bit_rg_ixd(UINT16 op);
- void bit_rgd_rg(UINT16 op);
- void bit_rgd_rgd(UINT16 op);
- void bit_rgd_in(UINT16 op);
- void bit_rgd_ind(UINT16 op);
- void bit_rgd_de(UINT16 op);
- void bit_rgd_ded(UINT16 op);
- void bit_rgd_ix(UINT16 op);
- void bit_rgd_ixd(UINT16 op);
- void bit_in_rg(UINT16 op);
- void bit_in_rgd(UINT16 op);
- void bit_in_in(UINT16 op);
- void bit_in_ind(UINT16 op);
- void bit_in_de(UINT16 op);
- void bit_in_ded(UINT16 op);
- void bit_in_ix(UINT16 op);
- void bit_in_ixd(UINT16 op);
- void bit_ind_rg(UINT16 op);
- void bit_ind_rgd(UINT16 op);
- void bit_ind_in(UINT16 op);
- void bit_ind_ind(UINT16 op);
- void bit_ind_de(UINT16 op);
- void bit_ind_ded(UINT16 op);
- void bit_ind_ix(UINT16 op);
- void bit_ind_ixd(UINT16 op);
- void bit_de_rg(UINT16 op);
- void bit_de_rgd(UINT16 op);
- void bit_de_in(UINT16 op);
- void bit_de_ind(UINT16 op);
- void bit_de_de(UINT16 op);
- void bit_de_ded(UINT16 op);
- void bit_de_ix(UINT16 op);
- void bit_de_ixd(UINT16 op);
- void bit_ded_rg(UINT16 op);
- void bit_ded_rgd(UINT16 op);
- void bit_ded_in(UINT16 op);
- void bit_ded_ind(UINT16 op);
- void bit_ded_de(UINT16 op);
- void bit_ded_ded(UINT16 op);
- void bit_ded_ix(UINT16 op);
- void bit_ded_ixd(UINT16 op);
- void bit_ix_rg(UINT16 op);
- void bit_ix_rgd(UINT16 op);
- void bit_ix_in(UINT16 op);
- void bit_ix_ind(UINT16 op);
- void bit_ix_de(UINT16 op);
- void bit_ix_ded(UINT16 op);
- void bit_ix_ix(UINT16 op);
- void bit_ix_ixd(UINT16 op);
- void bit_ixd_rg(UINT16 op);
- void bit_ixd_rgd(UINT16 op);
- void bit_ixd_in(UINT16 op);
- void bit_ixd_ind(UINT16 op);
- void bit_ixd_de(UINT16 op);
- void bit_ixd_ded(UINT16 op);
- void bit_ixd_ix(UINT16 op);
- void bit_ixd_ixd(UINT16 op);
- void bic_rg_rg(UINT16 op);
- void bic_rg_rgd(UINT16 op);
- void bic_rg_in(UINT16 op);
- void bic_rg_ind(UINT16 op);
- void bic_rg_de(UINT16 op);
- void bic_rg_ded(UINT16 op);
- void bic_rg_ix(UINT16 op);
- void bic_rg_ixd(UINT16 op);
- void bic_rgd_rg(UINT16 op);
- void bic_rgd_rgd(UINT16 op);
- void bic_rgd_in(UINT16 op);
- void bic_rgd_ind(UINT16 op);
- void bic_rgd_de(UINT16 op);
- void bic_rgd_ded(UINT16 op);
- void bic_rgd_ix(UINT16 op);
- void bic_rgd_ixd(UINT16 op);
- void bic_in_rg(UINT16 op);
- void bic_in_rgd(UINT16 op);
- void bic_in_in(UINT16 op);
- void bic_in_ind(UINT16 op);
- void bic_in_de(UINT16 op);
- void bic_in_ded(UINT16 op);
- void bic_in_ix(UINT16 op);
- void bic_in_ixd(UINT16 op);
- void bic_ind_rg(UINT16 op);
- void bic_ind_rgd(UINT16 op);
- void bic_ind_in(UINT16 op);
- void bic_ind_ind(UINT16 op);
- void bic_ind_de(UINT16 op);
- void bic_ind_ded(UINT16 op);
- void bic_ind_ix(UINT16 op);
- void bic_ind_ixd(UINT16 op);
- void bic_de_rg(UINT16 op);
- void bic_de_rgd(UINT16 op);
- void bic_de_in(UINT16 op);
- void bic_de_ind(UINT16 op);
- void bic_de_de(UINT16 op);
- void bic_de_ded(UINT16 op);
- void bic_de_ix(UINT16 op);
- void bic_de_ixd(UINT16 op);
- void bic_ded_rg(UINT16 op);
- void bic_ded_rgd(UINT16 op);
- void bic_ded_in(UINT16 op);
- void bic_ded_ind(UINT16 op);
- void bic_ded_de(UINT16 op);
- void bic_ded_ded(UINT16 op);
- void bic_ded_ix(UINT16 op);
- void bic_ded_ixd(UINT16 op);
- void bic_ix_rg(UINT16 op);
- void bic_ix_rgd(UINT16 op);
- void bic_ix_in(UINT16 op);
- void bic_ix_ind(UINT16 op);
- void bic_ix_de(UINT16 op);
- void bic_ix_ded(UINT16 op);
- void bic_ix_ix(UINT16 op);
- void bic_ix_ixd(UINT16 op);
- void bic_ixd_rg(UINT16 op);
- void bic_ixd_rgd(UINT16 op);
- void bic_ixd_in(UINT16 op);
- void bic_ixd_ind(UINT16 op);
- void bic_ixd_de(UINT16 op);
- void bic_ixd_ded(UINT16 op);
- void bic_ixd_ix(UINT16 op);
- void bic_ixd_ixd(UINT16 op);
- void bis_rg_rg(UINT16 op);
- void bis_rg_rgd(UINT16 op);
- void bis_rg_in(UINT16 op);
- void bis_rg_ind(UINT16 op);
- void bis_rg_de(UINT16 op);
- void bis_rg_ded(UINT16 op);
- void bis_rg_ix(UINT16 op);
- void bis_rg_ixd(UINT16 op);
- void bis_rgd_rg(UINT16 op);
- void bis_rgd_rgd(UINT16 op);
- void bis_rgd_in(UINT16 op);
- void bis_rgd_ind(UINT16 op);
- void bis_rgd_de(UINT16 op);
- void bis_rgd_ded(UINT16 op);
- void bis_rgd_ix(UINT16 op);
- void bis_rgd_ixd(UINT16 op);
- void bis_in_rg(UINT16 op);
- void bis_in_rgd(UINT16 op);
- void bis_in_in(UINT16 op);
- void bis_in_ind(UINT16 op);
- void bis_in_de(UINT16 op);
- void bis_in_ded(UINT16 op);
- void bis_in_ix(UINT16 op);
- void bis_in_ixd(UINT16 op);
- void bis_ind_rg(UINT16 op);
- void bis_ind_rgd(UINT16 op);
- void bis_ind_in(UINT16 op);
- void bis_ind_ind(UINT16 op);
- void bis_ind_de(UINT16 op);
- void bis_ind_ded(UINT16 op);
- void bis_ind_ix(UINT16 op);
- void bis_ind_ixd(UINT16 op);
- void bis_de_rg(UINT16 op);
- void bis_de_rgd(UINT16 op);
- void bis_de_in(UINT16 op);
- void bis_de_ind(UINT16 op);
- void bis_de_de(UINT16 op);
- void bis_de_ded(UINT16 op);
- void bis_de_ix(UINT16 op);
- void bis_de_ixd(UINT16 op);
- void bis_ded_rg(UINT16 op);
- void bis_ded_rgd(UINT16 op);
- void bis_ded_in(UINT16 op);
- void bis_ded_ind(UINT16 op);
- void bis_ded_de(UINT16 op);
- void bis_ded_ded(UINT16 op);
- void bis_ded_ix(UINT16 op);
- void bis_ded_ixd(UINT16 op);
- void bis_ix_rg(UINT16 op);
- void bis_ix_rgd(UINT16 op);
- void bis_ix_in(UINT16 op);
- void bis_ix_ind(UINT16 op);
- void bis_ix_de(UINT16 op);
- void bis_ix_ded(UINT16 op);
- void bis_ix_ix(UINT16 op);
- void bis_ix_ixd(UINT16 op);
- void bis_ixd_rg(UINT16 op);
- void bis_ixd_rgd(UINT16 op);
- void bis_ixd_in(UINT16 op);
- void bis_ixd_ind(UINT16 op);
- void bis_ixd_de(UINT16 op);
- void bis_ixd_ded(UINT16 op);
- void bis_ixd_ix(UINT16 op);
- void bis_ixd_ixd(UINT16 op);
- void add_rg_rg(UINT16 op);
- void add_rg_rgd(UINT16 op);
- void add_rg_in(UINT16 op);
- void add_rg_ind(UINT16 op);
- void add_rg_de(UINT16 op);
- void add_rg_ded(UINT16 op);
- void add_rg_ix(UINT16 op);
- void add_rg_ixd(UINT16 op);
- void add_rgd_rg(UINT16 op);
- void add_rgd_rgd(UINT16 op);
- void add_rgd_in(UINT16 op);
- void add_rgd_ind(UINT16 op);
- void add_rgd_de(UINT16 op);
- void add_rgd_ded(UINT16 op);
- void add_rgd_ix(UINT16 op);
- void add_rgd_ixd(UINT16 op);
- void add_in_rg(UINT16 op);
- void add_in_rgd(UINT16 op);
- void add_in_in(UINT16 op);
- void add_in_ind(UINT16 op);
- void add_in_de(UINT16 op);
- void add_in_ded(UINT16 op);
- void add_in_ix(UINT16 op);
- void add_in_ixd(UINT16 op);
- void add_ind_rg(UINT16 op);
- void add_ind_rgd(UINT16 op);
- void add_ind_in(UINT16 op);
- void add_ind_ind(UINT16 op);
- void add_ind_de(UINT16 op);
- void add_ind_ded(UINT16 op);
- void add_ind_ix(UINT16 op);
- void add_ind_ixd(UINT16 op);
- void add_de_rg(UINT16 op);
- void add_de_rgd(UINT16 op);
- void add_de_in(UINT16 op);
- void add_de_ind(UINT16 op);
- void add_de_de(UINT16 op);
- void add_de_ded(UINT16 op);
- void add_de_ix(UINT16 op);
- void add_de_ixd(UINT16 op);
- void add_ded_rg(UINT16 op);
- void add_ded_rgd(UINT16 op);
- void add_ded_in(UINT16 op);
- void add_ded_ind(UINT16 op);
- void add_ded_de(UINT16 op);
- void add_ded_ded(UINT16 op);
- void add_ded_ix(UINT16 op);
- void add_ded_ixd(UINT16 op);
- void add_ix_rg(UINT16 op);
- void add_ix_rgd(UINT16 op);
- void add_ix_in(UINT16 op);
- void add_ix_ind(UINT16 op);
- void add_ix_de(UINT16 op);
- void add_ix_ded(UINT16 op);
- void add_ix_ix(UINT16 op);
- void add_ix_ixd(UINT16 op);
- void add_ixd_rg(UINT16 op);
- void add_ixd_rgd(UINT16 op);
- void add_ixd_in(UINT16 op);
- void add_ixd_ind(UINT16 op);
- void add_ixd_de(UINT16 op);
- void add_ixd_ded(UINT16 op);
- void add_ixd_ix(UINT16 op);
- void add_ixd_ixd(UINT16 op);
- void xor_rg(UINT16 op);
- void xor_rgd(UINT16 op);
- void xor_in(UINT16 op);
- void xor_ind(UINT16 op);
- void xor_de(UINT16 op);
- void xor_ded(UINT16 op);
- void xor_ix(UINT16 op);
- void xor_ixd(UINT16 op);
- void sob(UINT16 op);
- void bpl(UINT16 op);
- void bmi(UINT16 op);
- void bhi(UINT16 op);
- void blos(UINT16 op);
- void bvc(UINT16 op);
- void bvs(UINT16 op);
- void bcc(UINT16 op);
- void bcs(UINT16 op);
- void emt(UINT16 op);
- void trap(UINT16 op);
- void clrb_rg(UINT16 op);
- void clrb_rgd(UINT16 op);
- void clrb_in(UINT16 op);
- void clrb_ind(UINT16 op);
- void clrb_de(UINT16 op);
- void clrb_ded(UINT16 op);
- void clrb_ix(UINT16 op);
- void clrb_ixd(UINT16 op);
- void comb_rg(UINT16 op);
- void comb_rgd(UINT16 op);
- void comb_in(UINT16 op);
- void comb_ind(UINT16 op);
- void comb_de(UINT16 op);
- void comb_ded(UINT16 op);
- void comb_ix(UINT16 op);
- void comb_ixd(UINT16 op);
- void incb_rg(UINT16 op);
- void incb_rgd(UINT16 op);
- void incb_in(UINT16 op);
- void incb_ind(UINT16 op);
- void incb_de(UINT16 op);
- void incb_ded(UINT16 op);
- void incb_ix(UINT16 op);
- void incb_ixd(UINT16 op);
- void decb_rg(UINT16 op);
- void decb_rgd(UINT16 op);
- void decb_in(UINT16 op);
- void decb_ind(UINT16 op);
- void decb_de(UINT16 op);
- void decb_ded(UINT16 op);
- void decb_ix(UINT16 op);
- void decb_ixd(UINT16 op);
- void negb_rg(UINT16 op);
- void negb_rgd(UINT16 op);
- void negb_in(UINT16 op);
- void negb_ind(UINT16 op);
- void negb_de(UINT16 op);
- void negb_ded(UINT16 op);
- void negb_ix(UINT16 op);
- void negb_ixd(UINT16 op);
- void adcb_rg(UINT16 op);
- void adcb_rgd(UINT16 op);
- void adcb_in(UINT16 op);
- void adcb_ind(UINT16 op);
- void adcb_de(UINT16 op);
- void adcb_ded(UINT16 op);
- void adcb_ix(UINT16 op);
- void adcb_ixd(UINT16 op);
- void sbcb_rg(UINT16 op);
- void sbcb_rgd(UINT16 op);
- void sbcb_in(UINT16 op);
- void sbcb_ind(UINT16 op);
- void sbcb_de(UINT16 op);
- void sbcb_ded(UINT16 op);
- void sbcb_ix(UINT16 op);
- void sbcb_ixd(UINT16 op);
- void tstb_rg(UINT16 op);
- void tstb_rgd(UINT16 op);
- void tstb_in(UINT16 op);
- void tstb_ind(UINT16 op);
- void tstb_de(UINT16 op);
- void tstb_ded(UINT16 op);
- void tstb_ix(UINT16 op);
- void tstb_ixd(UINT16 op);
- void rorb_rg(UINT16 op);
- void rorb_rgd(UINT16 op);
- void rorb_in(UINT16 op);
- void rorb_ind(UINT16 op);
- void rorb_de(UINT16 op);
- void rorb_ded(UINT16 op);
- void rorb_ix(UINT16 op);
- void rorb_ixd(UINT16 op);
- void rolb_rg(UINT16 op);
- void rolb_rgd(UINT16 op);
- void rolb_in(UINT16 op);
- void rolb_ind(UINT16 op);
- void rolb_de(UINT16 op);
- void rolb_ded(UINT16 op);
- void rolb_ix(UINT16 op);
- void rolb_ixd(UINT16 op);
- void asrb_rg(UINT16 op);
- void asrb_rgd(UINT16 op);
- void asrb_in(UINT16 op);
- void asrb_ind(UINT16 op);
- void asrb_de(UINT16 op);
- void asrb_ded(UINT16 op);
- void asrb_ix(UINT16 op);
- void asrb_ixd(UINT16 op);
- void aslb_rg(UINT16 op);
- void aslb_rgd(UINT16 op);
- void aslb_in(UINT16 op);
- void aslb_ind(UINT16 op);
- void aslb_de(UINT16 op);
- void aslb_ded(UINT16 op);
- void aslb_ix(UINT16 op);
- void aslb_ixd(UINT16 op);
- void mtps_rg(UINT16 op);
- void mtps_rgd(UINT16 op);
- void mtps_in(UINT16 op);
- void mtps_ind(UINT16 op);
- void mtps_de(UINT16 op);
- void mtps_ded(UINT16 op);
- void mtps_ix(UINT16 op);
- void mtps_ixd(UINT16 op);
- void mfps_rg(UINT16 op);
- void mfps_rgd(UINT16 op);
- void mfps_in(UINT16 op);
- void mfps_ind(UINT16 op);
- void mfps_de(UINT16 op);
- void mfps_ded(UINT16 op);
- void mfps_ix(UINT16 op);
- void mfps_ixd(UINT16 op);
- void movb_rg_rg(UINT16 op);
- void movb_rg_rgd(UINT16 op);
- void movb_rg_in(UINT16 op);
- void movb_rg_ind(UINT16 op);
- void movb_rg_de(UINT16 op);
- void movb_rg_ded(UINT16 op);
- void movb_rg_ix(UINT16 op);
- void movb_rg_ixd(UINT16 op);
- void movb_rgd_rg(UINT16 op);
- void movb_rgd_rgd(UINT16 op);
- void movb_rgd_in(UINT16 op);
- void movb_rgd_ind(UINT16 op);
- void movb_rgd_de(UINT16 op);
- void movb_rgd_ded(UINT16 op);
- void movb_rgd_ix(UINT16 op);
- void movb_rgd_ixd(UINT16 op);
- void movb_in_rg(UINT16 op);
- void movb_in_rgd(UINT16 op);
- void movb_in_in(UINT16 op);
- void movb_in_ind(UINT16 op);
- void movb_in_de(UINT16 op);
- void movb_in_ded(UINT16 op);
- void movb_in_ix(UINT16 op);
- void movb_in_ixd(UINT16 op);
- void movb_ind_rg(UINT16 op);
- void movb_ind_rgd(UINT16 op);
- void movb_ind_in(UINT16 op);
- void movb_ind_ind(UINT16 op);
- void movb_ind_de(UINT16 op);
- void movb_ind_ded(UINT16 op);
- void movb_ind_ix(UINT16 op);
- void movb_ind_ixd(UINT16 op);
- void movb_de_rg(UINT16 op);
- void movb_de_rgd(UINT16 op);
- void movb_de_in(UINT16 op);
- void movb_de_ind(UINT16 op);
- void movb_de_de(UINT16 op);
- void movb_de_ded(UINT16 op);
- void movb_de_ix(UINT16 op);
- void movb_de_ixd(UINT16 op);
- void movb_ded_rg(UINT16 op);
- void movb_ded_rgd(UINT16 op);
- void movb_ded_in(UINT16 op);
- void movb_ded_ind(UINT16 op);
- void movb_ded_de(UINT16 op);
- void movb_ded_ded(UINT16 op);
- void movb_ded_ix(UINT16 op);
- void movb_ded_ixd(UINT16 op);
- void movb_ix_rg(UINT16 op);
- void movb_ix_rgd(UINT16 op);
- void movb_ix_in(UINT16 op);
- void movb_ix_ind(UINT16 op);
- void movb_ix_de(UINT16 op);
- void movb_ix_ded(UINT16 op);
- void movb_ix_ix(UINT16 op);
- void movb_ix_ixd(UINT16 op);
- void movb_ixd_rg(UINT16 op);
- void movb_ixd_rgd(UINT16 op);
- void movb_ixd_in(UINT16 op);
- void movb_ixd_ind(UINT16 op);
- void movb_ixd_de(UINT16 op);
- void movb_ixd_ded(UINT16 op);
- void movb_ixd_ix(UINT16 op);
- void movb_ixd_ixd(UINT16 op);
- void cmpb_rg_rg(UINT16 op);
- void cmpb_rg_rgd(UINT16 op);
- void cmpb_rg_in(UINT16 op);
- void cmpb_rg_ind(UINT16 op);
- void cmpb_rg_de(UINT16 op);
- void cmpb_rg_ded(UINT16 op);
- void cmpb_rg_ix(UINT16 op);
- void cmpb_rg_ixd(UINT16 op);
- void cmpb_rgd_rg(UINT16 op);
- void cmpb_rgd_rgd(UINT16 op);
- void cmpb_rgd_in(UINT16 op);
- void cmpb_rgd_ind(UINT16 op);
- void cmpb_rgd_de(UINT16 op);
- void cmpb_rgd_ded(UINT16 op);
- void cmpb_rgd_ix(UINT16 op);
- void cmpb_rgd_ixd(UINT16 op);
- void cmpb_in_rg(UINT16 op);
- void cmpb_in_rgd(UINT16 op);
- void cmpb_in_in(UINT16 op);
- void cmpb_in_ind(UINT16 op);
- void cmpb_in_de(UINT16 op);
- void cmpb_in_ded(UINT16 op);
- void cmpb_in_ix(UINT16 op);
- void cmpb_in_ixd(UINT16 op);
- void cmpb_ind_rg(UINT16 op);
- void cmpb_ind_rgd(UINT16 op);
- void cmpb_ind_in(UINT16 op);
- void cmpb_ind_ind(UINT16 op);
- void cmpb_ind_de(UINT16 op);
- void cmpb_ind_ded(UINT16 op);
- void cmpb_ind_ix(UINT16 op);
- void cmpb_ind_ixd(UINT16 op);
- void cmpb_de_rg(UINT16 op);
- void cmpb_de_rgd(UINT16 op);
- void cmpb_de_in(UINT16 op);
- void cmpb_de_ind(UINT16 op);
- void cmpb_de_de(UINT16 op);
- void cmpb_de_ded(UINT16 op);
- void cmpb_de_ix(UINT16 op);
- void cmpb_de_ixd(UINT16 op);
- void cmpb_ded_rg(UINT16 op);
- void cmpb_ded_rgd(UINT16 op);
- void cmpb_ded_in(UINT16 op);
- void cmpb_ded_ind(UINT16 op);
- void cmpb_ded_de(UINT16 op);
- void cmpb_ded_ded(UINT16 op);
- void cmpb_ded_ix(UINT16 op);
- void cmpb_ded_ixd(UINT16 op);
- void cmpb_ix_rg(UINT16 op);
- void cmpb_ix_rgd(UINT16 op);
- void cmpb_ix_in(UINT16 op);
- void cmpb_ix_ind(UINT16 op);
- void cmpb_ix_de(UINT16 op);
- void cmpb_ix_ded(UINT16 op);
- void cmpb_ix_ix(UINT16 op);
- void cmpb_ix_ixd(UINT16 op);
- void cmpb_ixd_rg(UINT16 op);
- void cmpb_ixd_rgd(UINT16 op);
- void cmpb_ixd_in(UINT16 op);
- void cmpb_ixd_ind(UINT16 op);
- void cmpb_ixd_de(UINT16 op);
- void cmpb_ixd_ded(UINT16 op);
- void cmpb_ixd_ix(UINT16 op);
- void cmpb_ixd_ixd(UINT16 op);
- void bitb_rg_rg(UINT16 op);
- void bitb_rg_rgd(UINT16 op);
- void bitb_rg_in(UINT16 op);
- void bitb_rg_ind(UINT16 op);
- void bitb_rg_de(UINT16 op);
- void bitb_rg_ded(UINT16 op);
- void bitb_rg_ix(UINT16 op);
- void bitb_rg_ixd(UINT16 op);
- void bitb_rgd_rg(UINT16 op);
- void bitb_rgd_rgd(UINT16 op);
- void bitb_rgd_in(UINT16 op);
- void bitb_rgd_ind(UINT16 op);
- void bitb_rgd_de(UINT16 op);
- void bitb_rgd_ded(UINT16 op);
- void bitb_rgd_ix(UINT16 op);
- void bitb_rgd_ixd(UINT16 op);
- void bitb_in_rg(UINT16 op);
- void bitb_in_rgd(UINT16 op);
- void bitb_in_in(UINT16 op);
- void bitb_in_ind(UINT16 op);
- void bitb_in_de(UINT16 op);
- void bitb_in_ded(UINT16 op);
- void bitb_in_ix(UINT16 op);
- void bitb_in_ixd(UINT16 op);
- void bitb_ind_rg(UINT16 op);
- void bitb_ind_rgd(UINT16 op);
- void bitb_ind_in(UINT16 op);
- void bitb_ind_ind(UINT16 op);
- void bitb_ind_de(UINT16 op);
- void bitb_ind_ded(UINT16 op);
- void bitb_ind_ix(UINT16 op);
- void bitb_ind_ixd(UINT16 op);
- void bitb_de_rg(UINT16 op);
- void bitb_de_rgd(UINT16 op);
- void bitb_de_in(UINT16 op);
- void bitb_de_ind(UINT16 op);
- void bitb_de_de(UINT16 op);
- void bitb_de_ded(UINT16 op);
- void bitb_de_ix(UINT16 op);
- void bitb_de_ixd(UINT16 op);
- void bitb_ded_rg(UINT16 op);
- void bitb_ded_rgd(UINT16 op);
- void bitb_ded_in(UINT16 op);
- void bitb_ded_ind(UINT16 op);
- void bitb_ded_de(UINT16 op);
- void bitb_ded_ded(UINT16 op);
- void bitb_ded_ix(UINT16 op);
- void bitb_ded_ixd(UINT16 op);
- void bitb_ix_rg(UINT16 op);
- void bitb_ix_rgd(UINT16 op);
- void bitb_ix_in(UINT16 op);
- void bitb_ix_ind(UINT16 op);
- void bitb_ix_de(UINT16 op);
- void bitb_ix_ded(UINT16 op);
- void bitb_ix_ix(UINT16 op);
- void bitb_ix_ixd(UINT16 op);
- void bitb_ixd_rg(UINT16 op);
- void bitb_ixd_rgd(UINT16 op);
- void bitb_ixd_in(UINT16 op);
- void bitb_ixd_ind(UINT16 op);
- void bitb_ixd_de(UINT16 op);
- void bitb_ixd_ded(UINT16 op);
- void bitb_ixd_ix(UINT16 op);
- void bitb_ixd_ixd(UINT16 op);
- void bicb_rg_rg(UINT16 op);
- void bicb_rg_rgd(UINT16 op);
- void bicb_rg_in(UINT16 op);
- void bicb_rg_ind(UINT16 op);
- void bicb_rg_de(UINT16 op);
- void bicb_rg_ded(UINT16 op);
- void bicb_rg_ix(UINT16 op);
- void bicb_rg_ixd(UINT16 op);
- void bicb_rgd_rg(UINT16 op);
- void bicb_rgd_rgd(UINT16 op);
- void bicb_rgd_in(UINT16 op);
- void bicb_rgd_ind(UINT16 op);
- void bicb_rgd_de(UINT16 op);
- void bicb_rgd_ded(UINT16 op);
- void bicb_rgd_ix(UINT16 op);
- void bicb_rgd_ixd(UINT16 op);
- void bicb_in_rg(UINT16 op);
- void bicb_in_rgd(UINT16 op);
- void bicb_in_in(UINT16 op);
- void bicb_in_ind(UINT16 op);
- void bicb_in_de(UINT16 op);
- void bicb_in_ded(UINT16 op);
- void bicb_in_ix(UINT16 op);
- void bicb_in_ixd(UINT16 op);
- void bicb_ind_rg(UINT16 op);
- void bicb_ind_rgd(UINT16 op);
- void bicb_ind_in(UINT16 op);
- void bicb_ind_ind(UINT16 op);
- void bicb_ind_de(UINT16 op);
- void bicb_ind_ded(UINT16 op);
- void bicb_ind_ix(UINT16 op);
- void bicb_ind_ixd(UINT16 op);
- void bicb_de_rg(UINT16 op);
- void bicb_de_rgd(UINT16 op);
- void bicb_de_in(UINT16 op);
- void bicb_de_ind(UINT16 op);
- void bicb_de_de(UINT16 op);
- void bicb_de_ded(UINT16 op);
- void bicb_de_ix(UINT16 op);
- void bicb_de_ixd(UINT16 op);
- void bicb_ded_rg(UINT16 op);
- void bicb_ded_rgd(UINT16 op);
- void bicb_ded_in(UINT16 op);
- void bicb_ded_ind(UINT16 op);
- void bicb_ded_de(UINT16 op);
- void bicb_ded_ded(UINT16 op);
- void bicb_ded_ix(UINT16 op);
- void bicb_ded_ixd(UINT16 op);
- void bicb_ix_rg(UINT16 op);
- void bicb_ix_rgd(UINT16 op);
- void bicb_ix_in(UINT16 op);
- void bicb_ix_ind(UINT16 op);
- void bicb_ix_de(UINT16 op);
- void bicb_ix_ded(UINT16 op);
- void bicb_ix_ix(UINT16 op);
- void bicb_ix_ixd(UINT16 op);
- void bicb_ixd_rg(UINT16 op);
- void bicb_ixd_rgd(UINT16 op);
- void bicb_ixd_in(UINT16 op);
- void bicb_ixd_ind(UINT16 op);
- void bicb_ixd_de(UINT16 op);
- void bicb_ixd_ded(UINT16 op);
- void bicb_ixd_ix(UINT16 op);
- void bicb_ixd_ixd(UINT16 op);
- void bisb_rg_rg(UINT16 op);
- void bisb_rg_rgd(UINT16 op);
- void bisb_rg_in(UINT16 op);
- void bisb_rg_ind(UINT16 op);
- void bisb_rg_de(UINT16 op);
- void bisb_rg_ded(UINT16 op);
- void bisb_rg_ix(UINT16 op);
- void bisb_rg_ixd(UINT16 op);
- void bisb_rgd_rg(UINT16 op);
- void bisb_rgd_rgd(UINT16 op);
- void bisb_rgd_in(UINT16 op);
- void bisb_rgd_ind(UINT16 op);
- void bisb_rgd_de(UINT16 op);
- void bisb_rgd_ded(UINT16 op);
- void bisb_rgd_ix(UINT16 op);
- void bisb_rgd_ixd(UINT16 op);
- void bisb_in_rg(UINT16 op);
- void bisb_in_rgd(UINT16 op);
- void bisb_in_in(UINT16 op);
- void bisb_in_ind(UINT16 op);
- void bisb_in_de(UINT16 op);
- void bisb_in_ded(UINT16 op);
- void bisb_in_ix(UINT16 op);
- void bisb_in_ixd(UINT16 op);
- void bisb_ind_rg(UINT16 op);
- void bisb_ind_rgd(UINT16 op);
- void bisb_ind_in(UINT16 op);
- void bisb_ind_ind(UINT16 op);
- void bisb_ind_de(UINT16 op);
- void bisb_ind_ded(UINT16 op);
- void bisb_ind_ix(UINT16 op);
- void bisb_ind_ixd(UINT16 op);
- void bisb_de_rg(UINT16 op);
- void bisb_de_rgd(UINT16 op);
- void bisb_de_in(UINT16 op);
- void bisb_de_ind(UINT16 op);
- void bisb_de_de(UINT16 op);
- void bisb_de_ded(UINT16 op);
- void bisb_de_ix(UINT16 op);
- void bisb_de_ixd(UINT16 op);
- void bisb_ded_rg(UINT16 op);
- void bisb_ded_rgd(UINT16 op);
- void bisb_ded_in(UINT16 op);
- void bisb_ded_ind(UINT16 op);
- void bisb_ded_de(UINT16 op);
- void bisb_ded_ded(UINT16 op);
- void bisb_ded_ix(UINT16 op);
- void bisb_ded_ixd(UINT16 op);
- void bisb_ix_rg(UINT16 op);
- void bisb_ix_rgd(UINT16 op);
- void bisb_ix_in(UINT16 op);
- void bisb_ix_ind(UINT16 op);
- void bisb_ix_de(UINT16 op);
- void bisb_ix_ded(UINT16 op);
- void bisb_ix_ix(UINT16 op);
- void bisb_ix_ixd(UINT16 op);
- void bisb_ixd_rg(UINT16 op);
- void bisb_ixd_rgd(UINT16 op);
- void bisb_ixd_in(UINT16 op);
- void bisb_ixd_ind(UINT16 op);
- void bisb_ixd_de(UINT16 op);
- void bisb_ixd_ded(UINT16 op);
- void bisb_ixd_ix(UINT16 op);
- void bisb_ixd_ixd(UINT16 op);
- void sub_rg_rg(UINT16 op);
- void sub_rg_rgd(UINT16 op);
- void sub_rg_in(UINT16 op);
- void sub_rg_ind(UINT16 op);
- void sub_rg_de(UINT16 op);
- void sub_rg_ded(UINT16 op);
- void sub_rg_ix(UINT16 op);
- void sub_rg_ixd(UINT16 op);
- void sub_rgd_rg(UINT16 op);
- void sub_rgd_rgd(UINT16 op);
- void sub_rgd_in(UINT16 op);
- void sub_rgd_ind(UINT16 op);
- void sub_rgd_de(UINT16 op);
- void sub_rgd_ded(UINT16 op);
- void sub_rgd_ix(UINT16 op);
- void sub_rgd_ixd(UINT16 op);
- void sub_in_rg(UINT16 op);
- void sub_in_rgd(UINT16 op);
- void sub_in_in(UINT16 op);
- void sub_in_ind(UINT16 op);
- void sub_in_de(UINT16 op);
- void sub_in_ded(UINT16 op);
- void sub_in_ix(UINT16 op);
- void sub_in_ixd(UINT16 op);
- void sub_ind_rg(UINT16 op);
- void sub_ind_rgd(UINT16 op);
- void sub_ind_in(UINT16 op);
- void sub_ind_ind(UINT16 op);
- void sub_ind_de(UINT16 op);
- void sub_ind_ded(UINT16 op);
- void sub_ind_ix(UINT16 op);
- void sub_ind_ixd(UINT16 op);
- void sub_de_rg(UINT16 op);
- void sub_de_rgd(UINT16 op);
- void sub_de_in(UINT16 op);
- void sub_de_ind(UINT16 op);
- void sub_de_de(UINT16 op);
- void sub_de_ded(UINT16 op);
- void sub_de_ix(UINT16 op);
- void sub_de_ixd(UINT16 op);
- void sub_ded_rg(UINT16 op);
- void sub_ded_rgd(UINT16 op);
- void sub_ded_in(UINT16 op);
- void sub_ded_ind(UINT16 op);
- void sub_ded_de(UINT16 op);
- void sub_ded_ded(UINT16 op);
- void sub_ded_ix(UINT16 op);
- void sub_ded_ixd(UINT16 op);
- void sub_ix_rg(UINT16 op);
- void sub_ix_rgd(UINT16 op);
- void sub_ix_in(UINT16 op);
- void sub_ix_ind(UINT16 op);
- void sub_ix_de(UINT16 op);
- void sub_ix_ded(UINT16 op);
- void sub_ix_ix(UINT16 op);
- void sub_ix_ixd(UINT16 op);
- void sub_ixd_rg(UINT16 op);
- void sub_ixd_rgd(UINT16 op);
- void sub_ixd_in(UINT16 op);
- void sub_ixd_ind(UINT16 op);
- void sub_ixd_de(UINT16 op);
- void sub_ixd_ded(UINT16 op);
- void sub_ixd_ix(UINT16 op);
- void sub_ixd_ixd(UINT16 op);
+ void op_0000(uint16_t op);
+ void halt(uint16_t op);
+ void illegal(uint16_t op);
+ void jmp_rgd(uint16_t op);
+ void jmp_in(uint16_t op);
+ void jmp_ind(uint16_t op);
+ void jmp_de(uint16_t op);
+ void jmp_ded(uint16_t op);
+ void jmp_ix(uint16_t op);
+ void jmp_ixd(uint16_t op);
+ void rts(uint16_t op);
+ void ccc(uint16_t op);
+ void scc(uint16_t op);
+ void swab_rg(uint16_t op);
+ void swab_rgd(uint16_t op);
+ void swab_in(uint16_t op);
+ void swab_ind(uint16_t op);
+ void swab_de(uint16_t op);
+ void swab_ded(uint16_t op);
+ void swab_ix(uint16_t op);
+ void swab_ixd(uint16_t op);
+ void br(uint16_t op);
+ void bne(uint16_t op);
+ void beq(uint16_t op);
+ void bge(uint16_t op);
+ void blt(uint16_t op);
+ void bgt(uint16_t op);
+ void ble(uint16_t op);
+ void jsr_rgd(uint16_t op);
+ void jsr_in(uint16_t op);
+ void jsr_ind(uint16_t op);
+ void jsr_de(uint16_t op);
+ void jsr_ded(uint16_t op);
+ void jsr_ix(uint16_t op);
+ void jsr_ixd(uint16_t op);
+ void clr_rg(uint16_t op);
+ void clr_rgd(uint16_t op);
+ void clr_in(uint16_t op);
+ void clr_ind(uint16_t op);
+ void clr_de(uint16_t op);
+ void clr_ded(uint16_t op);
+ void clr_ix(uint16_t op);
+ void clr_ixd(uint16_t op);
+ void com_rg(uint16_t op);
+ void com_rgd(uint16_t op);
+ void com_in(uint16_t op);
+ void com_ind(uint16_t op);
+ void com_de(uint16_t op);
+ void com_ded(uint16_t op);
+ void com_ix(uint16_t op);
+ void com_ixd(uint16_t op);
+ void inc_rg(uint16_t op);
+ void inc_rgd(uint16_t op);
+ void inc_in(uint16_t op);
+ void inc_ind(uint16_t op);
+ void inc_de(uint16_t op);
+ void inc_ded(uint16_t op);
+ void inc_ix(uint16_t op);
+ void inc_ixd(uint16_t op);
+ void dec_rg(uint16_t op);
+ void dec_rgd(uint16_t op);
+ void dec_in(uint16_t op);
+ void dec_ind(uint16_t op);
+ void dec_de(uint16_t op);
+ void dec_ded(uint16_t op);
+ void dec_ix(uint16_t op);
+ void dec_ixd(uint16_t op);
+ void neg_rg(uint16_t op);
+ void neg_rgd(uint16_t op);
+ void neg_in(uint16_t op);
+ void neg_ind(uint16_t op);
+ void neg_de(uint16_t op);
+ void neg_ded(uint16_t op);
+ void neg_ix(uint16_t op);
+ void neg_ixd(uint16_t op);
+ void adc_rg(uint16_t op);
+ void adc_rgd(uint16_t op);
+ void adc_in(uint16_t op);
+ void adc_ind(uint16_t op);
+ void adc_de(uint16_t op);
+ void adc_ded(uint16_t op);
+ void adc_ix(uint16_t op);
+ void adc_ixd(uint16_t op);
+ void sbc_rg(uint16_t op);
+ void sbc_rgd(uint16_t op);
+ void sbc_in(uint16_t op);
+ void sbc_ind(uint16_t op);
+ void sbc_de(uint16_t op);
+ void sbc_ded(uint16_t op);
+ void sbc_ix(uint16_t op);
+ void sbc_ixd(uint16_t op);
+ void tst_rg(uint16_t op);
+ void tst_rgd(uint16_t op);
+ void tst_in(uint16_t op);
+ void tst_ind(uint16_t op);
+ void tst_de(uint16_t op);
+ void tst_ded(uint16_t op);
+ void tst_ix(uint16_t op);
+ void tst_ixd(uint16_t op);
+ void ror_rg(uint16_t op);
+ void ror_rgd(uint16_t op);
+ void ror_in(uint16_t op);
+ void ror_ind(uint16_t op);
+ void ror_de(uint16_t op);
+ void ror_ded(uint16_t op);
+ void ror_ix(uint16_t op);
+ void ror_ixd(uint16_t op);
+ void rol_rg(uint16_t op);
+ void rol_rgd(uint16_t op);
+ void rol_in(uint16_t op);
+ void rol_ind(uint16_t op);
+ void rol_de(uint16_t op);
+ void rol_ded(uint16_t op);
+ void rol_ix(uint16_t op);
+ void rol_ixd(uint16_t op);
+ void asr_rg(uint16_t op);
+ void asr_rgd(uint16_t op);
+ void asr_in(uint16_t op);
+ void asr_ind(uint16_t op);
+ void asr_de(uint16_t op);
+ void asr_ded(uint16_t op);
+ void asr_ix(uint16_t op);
+ void asr_ixd(uint16_t op);
+ void asl_rg(uint16_t op);
+ void asl_rgd(uint16_t op);
+ void asl_in(uint16_t op);
+ void asl_ind(uint16_t op);
+ void asl_de(uint16_t op);
+ void asl_ded(uint16_t op);
+ void asl_ix(uint16_t op);
+ void asl_ixd(uint16_t op);
+ void mark(uint16_t op);
+ void sxt_rg(uint16_t op);
+ void sxt_rgd(uint16_t op);
+ void sxt_in(uint16_t op);
+ void sxt_ind(uint16_t op);
+ void sxt_de(uint16_t op);
+ void sxt_ded(uint16_t op);
+ void sxt_ix(uint16_t op);
+ void sxt_ixd(uint16_t op);
+ void mov_rg_rg(uint16_t op);
+ void mov_rg_rgd(uint16_t op);
+ void mov_rg_in(uint16_t op);
+ void mov_rg_ind(uint16_t op);
+ void mov_rg_de(uint16_t op);
+ void mov_rg_ded(uint16_t op);
+ void mov_rg_ix(uint16_t op);
+ void mov_rg_ixd(uint16_t op);
+ void mov_rgd_rg(uint16_t op);
+ void mov_rgd_rgd(uint16_t op);
+ void mov_rgd_in(uint16_t op);
+ void mov_rgd_ind(uint16_t op);
+ void mov_rgd_de(uint16_t op);
+ void mov_rgd_ded(uint16_t op);
+ void mov_rgd_ix(uint16_t op);
+ void mov_rgd_ixd(uint16_t op);
+ void mov_in_rg(uint16_t op);
+ void mov_in_rgd(uint16_t op);
+ void mov_in_in(uint16_t op);
+ void mov_in_ind(uint16_t op);
+ void mov_in_de(uint16_t op);
+ void mov_in_ded(uint16_t op);
+ void mov_in_ix(uint16_t op);
+ void mov_in_ixd(uint16_t op);
+ void mov_ind_rg(uint16_t op);
+ void mov_ind_rgd(uint16_t op);
+ void mov_ind_in(uint16_t op);
+ void mov_ind_ind(uint16_t op);
+ void mov_ind_de(uint16_t op);
+ void mov_ind_ded(uint16_t op);
+ void mov_ind_ix(uint16_t op);
+ void mov_ind_ixd(uint16_t op);
+ void mov_de_rg(uint16_t op);
+ void mov_de_rgd(uint16_t op);
+ void mov_de_in(uint16_t op);
+ void mov_de_ind(uint16_t op);
+ void mov_de_de(uint16_t op);
+ void mov_de_ded(uint16_t op);
+ void mov_de_ix(uint16_t op);
+ void mov_de_ixd(uint16_t op);
+ void mov_ded_rg(uint16_t op);
+ void mov_ded_rgd(uint16_t op);
+ void mov_ded_in(uint16_t op);
+ void mov_ded_ind(uint16_t op);
+ void mov_ded_de(uint16_t op);
+ void mov_ded_ded(uint16_t op);
+ void mov_ded_ix(uint16_t op);
+ void mov_ded_ixd(uint16_t op);
+ void mov_ix_rg(uint16_t op);
+ void mov_ix_rgd(uint16_t op);
+ void mov_ix_in(uint16_t op);
+ void mov_ix_ind(uint16_t op);
+ void mov_ix_de(uint16_t op);
+ void mov_ix_ded(uint16_t op);
+ void mov_ix_ix(uint16_t op);
+ void mov_ix_ixd(uint16_t op);
+ void mov_ixd_rg(uint16_t op);
+ void mov_ixd_rgd(uint16_t op);
+ void mov_ixd_in(uint16_t op);
+ void mov_ixd_ind(uint16_t op);
+ void mov_ixd_de(uint16_t op);
+ void mov_ixd_ded(uint16_t op);
+ void mov_ixd_ix(uint16_t op);
+ void mov_ixd_ixd(uint16_t op);
+ void cmp_rg_rg(uint16_t op);
+ void cmp_rg_rgd(uint16_t op);
+ void cmp_rg_in(uint16_t op);
+ void cmp_rg_ind(uint16_t op);
+ void cmp_rg_de(uint16_t op);
+ void cmp_rg_ded(uint16_t op);
+ void cmp_rg_ix(uint16_t op);
+ void cmp_rg_ixd(uint16_t op);
+ void cmp_rgd_rg(uint16_t op);
+ void cmp_rgd_rgd(uint16_t op);
+ void cmp_rgd_in(uint16_t op);
+ void cmp_rgd_ind(uint16_t op);
+ void cmp_rgd_de(uint16_t op);
+ void cmp_rgd_ded(uint16_t op);
+ void cmp_rgd_ix(uint16_t op);
+ void cmp_rgd_ixd(uint16_t op);
+ void cmp_in_rg(uint16_t op);
+ void cmp_in_rgd(uint16_t op);
+ void cmp_in_in(uint16_t op);
+ void cmp_in_ind(uint16_t op);
+ void cmp_in_de(uint16_t op);
+ void cmp_in_ded(uint16_t op);
+ void cmp_in_ix(uint16_t op);
+ void cmp_in_ixd(uint16_t op);
+ void cmp_ind_rg(uint16_t op);
+ void cmp_ind_rgd(uint16_t op);
+ void cmp_ind_in(uint16_t op);
+ void cmp_ind_ind(uint16_t op);
+ void cmp_ind_de(uint16_t op);
+ void cmp_ind_ded(uint16_t op);
+ void cmp_ind_ix(uint16_t op);
+ void cmp_ind_ixd(uint16_t op);
+ void cmp_de_rg(uint16_t op);
+ void cmp_de_rgd(uint16_t op);
+ void cmp_de_in(uint16_t op);
+ void cmp_de_ind(uint16_t op);
+ void cmp_de_de(uint16_t op);
+ void cmp_de_ded(uint16_t op);
+ void cmp_de_ix(uint16_t op);
+ void cmp_de_ixd(uint16_t op);
+ void cmp_ded_rg(uint16_t op);
+ void cmp_ded_rgd(uint16_t op);
+ void cmp_ded_in(uint16_t op);
+ void cmp_ded_ind(uint16_t op);
+ void cmp_ded_de(uint16_t op);
+ void cmp_ded_ded(uint16_t op);
+ void cmp_ded_ix(uint16_t op);
+ void cmp_ded_ixd(uint16_t op);
+ void cmp_ix_rg(uint16_t op);
+ void cmp_ix_rgd(uint16_t op);
+ void cmp_ix_in(uint16_t op);
+ void cmp_ix_ind(uint16_t op);
+ void cmp_ix_de(uint16_t op);
+ void cmp_ix_ded(uint16_t op);
+ void cmp_ix_ix(uint16_t op);
+ void cmp_ix_ixd(uint16_t op);
+ void cmp_ixd_rg(uint16_t op);
+ void cmp_ixd_rgd(uint16_t op);
+ void cmp_ixd_in(uint16_t op);
+ void cmp_ixd_ind(uint16_t op);
+ void cmp_ixd_de(uint16_t op);
+ void cmp_ixd_ded(uint16_t op);
+ void cmp_ixd_ix(uint16_t op);
+ void cmp_ixd_ixd(uint16_t op);
+ void bit_rg_rg(uint16_t op);
+ void bit_rg_rgd(uint16_t op);
+ void bit_rg_in(uint16_t op);
+ void bit_rg_ind(uint16_t op);
+ void bit_rg_de(uint16_t op);
+ void bit_rg_ded(uint16_t op);
+ void bit_rg_ix(uint16_t op);
+ void bit_rg_ixd(uint16_t op);
+ void bit_rgd_rg(uint16_t op);
+ void bit_rgd_rgd(uint16_t op);
+ void bit_rgd_in(uint16_t op);
+ void bit_rgd_ind(uint16_t op);
+ void bit_rgd_de(uint16_t op);
+ void bit_rgd_ded(uint16_t op);
+ void bit_rgd_ix(uint16_t op);
+ void bit_rgd_ixd(uint16_t op);
+ void bit_in_rg(uint16_t op);
+ void bit_in_rgd(uint16_t op);
+ void bit_in_in(uint16_t op);
+ void bit_in_ind(uint16_t op);
+ void bit_in_de(uint16_t op);
+ void bit_in_ded(uint16_t op);
+ void bit_in_ix(uint16_t op);
+ void bit_in_ixd(uint16_t op);
+ void bit_ind_rg(uint16_t op);
+ void bit_ind_rgd(uint16_t op);
+ void bit_ind_in(uint16_t op);
+ void bit_ind_ind(uint16_t op);
+ void bit_ind_de(uint16_t op);
+ void bit_ind_ded(uint16_t op);
+ void bit_ind_ix(uint16_t op);
+ void bit_ind_ixd(uint16_t op);
+ void bit_de_rg(uint16_t op);
+ void bit_de_rgd(uint16_t op);
+ void bit_de_in(uint16_t op);
+ void bit_de_ind(uint16_t op);
+ void bit_de_de(uint16_t op);
+ void bit_de_ded(uint16_t op);
+ void bit_de_ix(uint16_t op);
+ void bit_de_ixd(uint16_t op);
+ void bit_ded_rg(uint16_t op);
+ void bit_ded_rgd(uint16_t op);
+ void bit_ded_in(uint16_t op);
+ void bit_ded_ind(uint16_t op);
+ void bit_ded_de(uint16_t op);
+ void bit_ded_ded(uint16_t op);
+ void bit_ded_ix(uint16_t op);
+ void bit_ded_ixd(uint16_t op);
+ void bit_ix_rg(uint16_t op);
+ void bit_ix_rgd(uint16_t op);
+ void bit_ix_in(uint16_t op);
+ void bit_ix_ind(uint16_t op);
+ void bit_ix_de(uint16_t op);
+ void bit_ix_ded(uint16_t op);
+ void bit_ix_ix(uint16_t op);
+ void bit_ix_ixd(uint16_t op);
+ void bit_ixd_rg(uint16_t op);
+ void bit_ixd_rgd(uint16_t op);
+ void bit_ixd_in(uint16_t op);
+ void bit_ixd_ind(uint16_t op);
+ void bit_ixd_de(uint16_t op);
+ void bit_ixd_ded(uint16_t op);
+ void bit_ixd_ix(uint16_t op);
+ void bit_ixd_ixd(uint16_t op);
+ void bic_rg_rg(uint16_t op);
+ void bic_rg_rgd(uint16_t op);
+ void bic_rg_in(uint16_t op);
+ void bic_rg_ind(uint16_t op);
+ void bic_rg_de(uint16_t op);
+ void bic_rg_ded(uint16_t op);
+ void bic_rg_ix(uint16_t op);
+ void bic_rg_ixd(uint16_t op);
+ void bic_rgd_rg(uint16_t op);
+ void bic_rgd_rgd(uint16_t op);
+ void bic_rgd_in(uint16_t op);
+ void bic_rgd_ind(uint16_t op);
+ void bic_rgd_de(uint16_t op);
+ void bic_rgd_ded(uint16_t op);
+ void bic_rgd_ix(uint16_t op);
+ void bic_rgd_ixd(uint16_t op);
+ void bic_in_rg(uint16_t op);
+ void bic_in_rgd(uint16_t op);
+ void bic_in_in(uint16_t op);
+ void bic_in_ind(uint16_t op);
+ void bic_in_de(uint16_t op);
+ void bic_in_ded(uint16_t op);
+ void bic_in_ix(uint16_t op);
+ void bic_in_ixd(uint16_t op);
+ void bic_ind_rg(uint16_t op);
+ void bic_ind_rgd(uint16_t op);
+ void bic_ind_in(uint16_t op);
+ void bic_ind_ind(uint16_t op);
+ void bic_ind_de(uint16_t op);
+ void bic_ind_ded(uint16_t op);
+ void bic_ind_ix(uint16_t op);
+ void bic_ind_ixd(uint16_t op);
+ void bic_de_rg(uint16_t op);
+ void bic_de_rgd(uint16_t op);
+ void bic_de_in(uint16_t op);
+ void bic_de_ind(uint16_t op);
+ void bic_de_de(uint16_t op);
+ void bic_de_ded(uint16_t op);
+ void bic_de_ix(uint16_t op);
+ void bic_de_ixd(uint16_t op);
+ void bic_ded_rg(uint16_t op);
+ void bic_ded_rgd(uint16_t op);
+ void bic_ded_in(uint16_t op);
+ void bic_ded_ind(uint16_t op);
+ void bic_ded_de(uint16_t op);
+ void bic_ded_ded(uint16_t op);
+ void bic_ded_ix(uint16_t op);
+ void bic_ded_ixd(uint16_t op);
+ void bic_ix_rg(uint16_t op);
+ void bic_ix_rgd(uint16_t op);
+ void bic_ix_in(uint16_t op);
+ void bic_ix_ind(uint16_t op);
+ void bic_ix_de(uint16_t op);
+ void bic_ix_ded(uint16_t op);
+ void bic_ix_ix(uint16_t op);
+ void bic_ix_ixd(uint16_t op);
+ void bic_ixd_rg(uint16_t op);
+ void bic_ixd_rgd(uint16_t op);
+ void bic_ixd_in(uint16_t op);
+ void bic_ixd_ind(uint16_t op);
+ void bic_ixd_de(uint16_t op);
+ void bic_ixd_ded(uint16_t op);
+ void bic_ixd_ix(uint16_t op);
+ void bic_ixd_ixd(uint16_t op);
+ void bis_rg_rg(uint16_t op);
+ void bis_rg_rgd(uint16_t op);
+ void bis_rg_in(uint16_t op);
+ void bis_rg_ind(uint16_t op);
+ void bis_rg_de(uint16_t op);
+ void bis_rg_ded(uint16_t op);
+ void bis_rg_ix(uint16_t op);
+ void bis_rg_ixd(uint16_t op);
+ void bis_rgd_rg(uint16_t op);
+ void bis_rgd_rgd(uint16_t op);
+ void bis_rgd_in(uint16_t op);
+ void bis_rgd_ind(uint16_t op);
+ void bis_rgd_de(uint16_t op);
+ void bis_rgd_ded(uint16_t op);
+ void bis_rgd_ix(uint16_t op);
+ void bis_rgd_ixd(uint16_t op);
+ void bis_in_rg(uint16_t op);
+ void bis_in_rgd(uint16_t op);
+ void bis_in_in(uint16_t op);
+ void bis_in_ind(uint16_t op);
+ void bis_in_de(uint16_t op);
+ void bis_in_ded(uint16_t op);
+ void bis_in_ix(uint16_t op);
+ void bis_in_ixd(uint16_t op);
+ void bis_ind_rg(uint16_t op);
+ void bis_ind_rgd(uint16_t op);
+ void bis_ind_in(uint16_t op);
+ void bis_ind_ind(uint16_t op);
+ void bis_ind_de(uint16_t op);
+ void bis_ind_ded(uint16_t op);
+ void bis_ind_ix(uint16_t op);
+ void bis_ind_ixd(uint16_t op);
+ void bis_de_rg(uint16_t op);
+ void bis_de_rgd(uint16_t op);
+ void bis_de_in(uint16_t op);
+ void bis_de_ind(uint16_t op);
+ void bis_de_de(uint16_t op);
+ void bis_de_ded(uint16_t op);
+ void bis_de_ix(uint16_t op);
+ void bis_de_ixd(uint16_t op);
+ void bis_ded_rg(uint16_t op);
+ void bis_ded_rgd(uint16_t op);
+ void bis_ded_in(uint16_t op);
+ void bis_ded_ind(uint16_t op);
+ void bis_ded_de(uint16_t op);
+ void bis_ded_ded(uint16_t op);
+ void bis_ded_ix(uint16_t op);
+ void bis_ded_ixd(uint16_t op);
+ void bis_ix_rg(uint16_t op);
+ void bis_ix_rgd(uint16_t op);
+ void bis_ix_in(uint16_t op);
+ void bis_ix_ind(uint16_t op);
+ void bis_ix_de(uint16_t op);
+ void bis_ix_ded(uint16_t op);
+ void bis_ix_ix(uint16_t op);
+ void bis_ix_ixd(uint16_t op);
+ void bis_ixd_rg(uint16_t op);
+ void bis_ixd_rgd(uint16_t op);
+ void bis_ixd_in(uint16_t op);
+ void bis_ixd_ind(uint16_t op);
+ void bis_ixd_de(uint16_t op);
+ void bis_ixd_ded(uint16_t op);
+ void bis_ixd_ix(uint16_t op);
+ void bis_ixd_ixd(uint16_t op);
+ void add_rg_rg(uint16_t op);
+ void add_rg_rgd(uint16_t op);
+ void add_rg_in(uint16_t op);
+ void add_rg_ind(uint16_t op);
+ void add_rg_de(uint16_t op);
+ void add_rg_ded(uint16_t op);
+ void add_rg_ix(uint16_t op);
+ void add_rg_ixd(uint16_t op);
+ void add_rgd_rg(uint16_t op);
+ void add_rgd_rgd(uint16_t op);
+ void add_rgd_in(uint16_t op);
+ void add_rgd_ind(uint16_t op);
+ void add_rgd_de(uint16_t op);
+ void add_rgd_ded(uint16_t op);
+ void add_rgd_ix(uint16_t op);
+ void add_rgd_ixd(uint16_t op);
+ void add_in_rg(uint16_t op);
+ void add_in_rgd(uint16_t op);
+ void add_in_in(uint16_t op);
+ void add_in_ind(uint16_t op);
+ void add_in_de(uint16_t op);
+ void add_in_ded(uint16_t op);
+ void add_in_ix(uint16_t op);
+ void add_in_ixd(uint16_t op);
+ void add_ind_rg(uint16_t op);
+ void add_ind_rgd(uint16_t op);
+ void add_ind_in(uint16_t op);
+ void add_ind_ind(uint16_t op);
+ void add_ind_de(uint16_t op);
+ void add_ind_ded(uint16_t op);
+ void add_ind_ix(uint16_t op);
+ void add_ind_ixd(uint16_t op);
+ void add_de_rg(uint16_t op);
+ void add_de_rgd(uint16_t op);
+ void add_de_in(uint16_t op);
+ void add_de_ind(uint16_t op);
+ void add_de_de(uint16_t op);
+ void add_de_ded(uint16_t op);
+ void add_de_ix(uint16_t op);
+ void add_de_ixd(uint16_t op);
+ void add_ded_rg(uint16_t op);
+ void add_ded_rgd(uint16_t op);
+ void add_ded_in(uint16_t op);
+ void add_ded_ind(uint16_t op);
+ void add_ded_de(uint16_t op);
+ void add_ded_ded(uint16_t op);
+ void add_ded_ix(uint16_t op);
+ void add_ded_ixd(uint16_t op);
+ void add_ix_rg(uint16_t op);
+ void add_ix_rgd(uint16_t op);
+ void add_ix_in(uint16_t op);
+ void add_ix_ind(uint16_t op);
+ void add_ix_de(uint16_t op);
+ void add_ix_ded(uint16_t op);
+ void add_ix_ix(uint16_t op);
+ void add_ix_ixd(uint16_t op);
+ void add_ixd_rg(uint16_t op);
+ void add_ixd_rgd(uint16_t op);
+ void add_ixd_in(uint16_t op);
+ void add_ixd_ind(uint16_t op);
+ void add_ixd_de(uint16_t op);
+ void add_ixd_ded(uint16_t op);
+ void add_ixd_ix(uint16_t op);
+ void add_ixd_ixd(uint16_t op);
+ void xor_rg(uint16_t op);
+ void xor_rgd(uint16_t op);
+ void xor_in(uint16_t op);
+ void xor_ind(uint16_t op);
+ void xor_de(uint16_t op);
+ void xor_ded(uint16_t op);
+ void xor_ix(uint16_t op);
+ void xor_ixd(uint16_t op);
+ void sob(uint16_t op);
+ void bpl(uint16_t op);
+ void bmi(uint16_t op);
+ void bhi(uint16_t op);
+ void blos(uint16_t op);
+ void bvc(uint16_t op);
+ void bvs(uint16_t op);
+ void bcc(uint16_t op);
+ void bcs(uint16_t op);
+ void emt(uint16_t op);
+ void trap(uint16_t op);
+ void clrb_rg(uint16_t op);
+ void clrb_rgd(uint16_t op);
+ void clrb_in(uint16_t op);
+ void clrb_ind(uint16_t op);
+ void clrb_de(uint16_t op);
+ void clrb_ded(uint16_t op);
+ void clrb_ix(uint16_t op);
+ void clrb_ixd(uint16_t op);
+ void comb_rg(uint16_t op);
+ void comb_rgd(uint16_t op);
+ void comb_in(uint16_t op);
+ void comb_ind(uint16_t op);
+ void comb_de(uint16_t op);
+ void comb_ded(uint16_t op);
+ void comb_ix(uint16_t op);
+ void comb_ixd(uint16_t op);
+ void incb_rg(uint16_t op);
+ void incb_rgd(uint16_t op);
+ void incb_in(uint16_t op);
+ void incb_ind(uint16_t op);
+ void incb_de(uint16_t op);
+ void incb_ded(uint16_t op);
+ void incb_ix(uint16_t op);
+ void incb_ixd(uint16_t op);
+ void decb_rg(uint16_t op);
+ void decb_rgd(uint16_t op);
+ void decb_in(uint16_t op);
+ void decb_ind(uint16_t op);
+ void decb_de(uint16_t op);
+ void decb_ded(uint16_t op);
+ void decb_ix(uint16_t op);
+ void decb_ixd(uint16_t op);
+ void negb_rg(uint16_t op);
+ void negb_rgd(uint16_t op);
+ void negb_in(uint16_t op);
+ void negb_ind(uint16_t op);
+ void negb_de(uint16_t op);
+ void negb_ded(uint16_t op);
+ void negb_ix(uint16_t op);
+ void negb_ixd(uint16_t op);
+ void adcb_rg(uint16_t op);
+ void adcb_rgd(uint16_t op);
+ void adcb_in(uint16_t op);
+ void adcb_ind(uint16_t op);
+ void adcb_de(uint16_t op);
+ void adcb_ded(uint16_t op);
+ void adcb_ix(uint16_t op);
+ void adcb_ixd(uint16_t op);
+ void sbcb_rg(uint16_t op);
+ void sbcb_rgd(uint16_t op);
+ void sbcb_in(uint16_t op);
+ void sbcb_ind(uint16_t op);
+ void sbcb_de(uint16_t op);
+ void sbcb_ded(uint16_t op);
+ void sbcb_ix(uint16_t op);
+ void sbcb_ixd(uint16_t op);
+ void tstb_rg(uint16_t op);
+ void tstb_rgd(uint16_t op);
+ void tstb_in(uint16_t op);
+ void tstb_ind(uint16_t op);
+ void tstb_de(uint16_t op);
+ void tstb_ded(uint16_t op);
+ void tstb_ix(uint16_t op);
+ void tstb_ixd(uint16_t op);
+ void rorb_rg(uint16_t op);
+ void rorb_rgd(uint16_t op);
+ void rorb_in(uint16_t op);
+ void rorb_ind(uint16_t op);
+ void rorb_de(uint16_t op);
+ void rorb_ded(uint16_t op);
+ void rorb_ix(uint16_t op);
+ void rorb_ixd(uint16_t op);
+ void rolb_rg(uint16_t op);
+ void rolb_rgd(uint16_t op);
+ void rolb_in(uint16_t op);
+ void rolb_ind(uint16_t op);
+ void rolb_de(uint16_t op);
+ void rolb_ded(uint16_t op);
+ void rolb_ix(uint16_t op);
+ void rolb_ixd(uint16_t op);
+ void asrb_rg(uint16_t op);
+ void asrb_rgd(uint16_t op);
+ void asrb_in(uint16_t op);
+ void asrb_ind(uint16_t op);
+ void asrb_de(uint16_t op);
+ void asrb_ded(uint16_t op);
+ void asrb_ix(uint16_t op);
+ void asrb_ixd(uint16_t op);
+ void aslb_rg(uint16_t op);
+ void aslb_rgd(uint16_t op);
+ void aslb_in(uint16_t op);
+ void aslb_ind(uint16_t op);
+ void aslb_de(uint16_t op);
+ void aslb_ded(uint16_t op);
+ void aslb_ix(uint16_t op);
+ void aslb_ixd(uint16_t op);
+ void mtps_rg(uint16_t op);
+ void mtps_rgd(uint16_t op);
+ void mtps_in(uint16_t op);
+ void mtps_ind(uint16_t op);
+ void mtps_de(uint16_t op);
+ void mtps_ded(uint16_t op);
+ void mtps_ix(uint16_t op);
+ void mtps_ixd(uint16_t op);
+ void mfps_rg(uint16_t op);
+ void mfps_rgd(uint16_t op);
+ void mfps_in(uint16_t op);
+ void mfps_ind(uint16_t op);
+ void mfps_de(uint16_t op);
+ void mfps_ded(uint16_t op);
+ void mfps_ix(uint16_t op);
+ void mfps_ixd(uint16_t op);
+ void movb_rg_rg(uint16_t op);
+ void movb_rg_rgd(uint16_t op);
+ void movb_rg_in(uint16_t op);
+ void movb_rg_ind(uint16_t op);
+ void movb_rg_de(uint16_t op);
+ void movb_rg_ded(uint16_t op);
+ void movb_rg_ix(uint16_t op);
+ void movb_rg_ixd(uint16_t op);
+ void movb_rgd_rg(uint16_t op);
+ void movb_rgd_rgd(uint16_t op);
+ void movb_rgd_in(uint16_t op);
+ void movb_rgd_ind(uint16_t op);
+ void movb_rgd_de(uint16_t op);
+ void movb_rgd_ded(uint16_t op);
+ void movb_rgd_ix(uint16_t op);
+ void movb_rgd_ixd(uint16_t op);
+ void movb_in_rg(uint16_t op);
+ void movb_in_rgd(uint16_t op);
+ void movb_in_in(uint16_t op);
+ void movb_in_ind(uint16_t op);
+ void movb_in_de(uint16_t op);
+ void movb_in_ded(uint16_t op);
+ void movb_in_ix(uint16_t op);
+ void movb_in_ixd(uint16_t op);
+ void movb_ind_rg(uint16_t op);
+ void movb_ind_rgd(uint16_t op);
+ void movb_ind_in(uint16_t op);
+ void movb_ind_ind(uint16_t op);
+ void movb_ind_de(uint16_t op);
+ void movb_ind_ded(uint16_t op);
+ void movb_ind_ix(uint16_t op);
+ void movb_ind_ixd(uint16_t op);
+ void movb_de_rg(uint16_t op);
+ void movb_de_rgd(uint16_t op);
+ void movb_de_in(uint16_t op);
+ void movb_de_ind(uint16_t op);
+ void movb_de_de(uint16_t op);
+ void movb_de_ded(uint16_t op);
+ void movb_de_ix(uint16_t op);
+ void movb_de_ixd(uint16_t op);
+ void movb_ded_rg(uint16_t op);
+ void movb_ded_rgd(uint16_t op);
+ void movb_ded_in(uint16_t op);
+ void movb_ded_ind(uint16_t op);
+ void movb_ded_de(uint16_t op);
+ void movb_ded_ded(uint16_t op);
+ void movb_ded_ix(uint16_t op);
+ void movb_ded_ixd(uint16_t op);
+ void movb_ix_rg(uint16_t op);
+ void movb_ix_rgd(uint16_t op);
+ void movb_ix_in(uint16_t op);
+ void movb_ix_ind(uint16_t op);
+ void movb_ix_de(uint16_t op);
+ void movb_ix_ded(uint16_t op);
+ void movb_ix_ix(uint16_t op);
+ void movb_ix_ixd(uint16_t op);
+ void movb_ixd_rg(uint16_t op);
+ void movb_ixd_rgd(uint16_t op);
+ void movb_ixd_in(uint16_t op);
+ void movb_ixd_ind(uint16_t op);
+ void movb_ixd_de(uint16_t op);
+ void movb_ixd_ded(uint16_t op);
+ void movb_ixd_ix(uint16_t op);
+ void movb_ixd_ixd(uint16_t op);
+ void cmpb_rg_rg(uint16_t op);
+ void cmpb_rg_rgd(uint16_t op);
+ void cmpb_rg_in(uint16_t op);
+ void cmpb_rg_ind(uint16_t op);
+ void cmpb_rg_de(uint16_t op);
+ void cmpb_rg_ded(uint16_t op);
+ void cmpb_rg_ix(uint16_t op);
+ void cmpb_rg_ixd(uint16_t op);
+ void cmpb_rgd_rg(uint16_t op);
+ void cmpb_rgd_rgd(uint16_t op);
+ void cmpb_rgd_in(uint16_t op);
+ void cmpb_rgd_ind(uint16_t op);
+ void cmpb_rgd_de(uint16_t op);
+ void cmpb_rgd_ded(uint16_t op);
+ void cmpb_rgd_ix(uint16_t op);
+ void cmpb_rgd_ixd(uint16_t op);
+ void cmpb_in_rg(uint16_t op);
+ void cmpb_in_rgd(uint16_t op);
+ void cmpb_in_in(uint16_t op);
+ void cmpb_in_ind(uint16_t op);
+ void cmpb_in_de(uint16_t op);
+ void cmpb_in_ded(uint16_t op);
+ void cmpb_in_ix(uint16_t op);
+ void cmpb_in_ixd(uint16_t op);
+ void cmpb_ind_rg(uint16_t op);
+ void cmpb_ind_rgd(uint16_t op);
+ void cmpb_ind_in(uint16_t op);
+ void cmpb_ind_ind(uint16_t op);
+ void cmpb_ind_de(uint16_t op);
+ void cmpb_ind_ded(uint16_t op);
+ void cmpb_ind_ix(uint16_t op);
+ void cmpb_ind_ixd(uint16_t op);
+ void cmpb_de_rg(uint16_t op);
+ void cmpb_de_rgd(uint16_t op);
+ void cmpb_de_in(uint16_t op);
+ void cmpb_de_ind(uint16_t op);
+ void cmpb_de_de(uint16_t op);
+ void cmpb_de_ded(uint16_t op);
+ void cmpb_de_ix(uint16_t op);
+ void cmpb_de_ixd(uint16_t op);
+ void cmpb_ded_rg(uint16_t op);
+ void cmpb_ded_rgd(uint16_t op);
+ void cmpb_ded_in(uint16_t op);
+ void cmpb_ded_ind(uint16_t op);
+ void cmpb_ded_de(uint16_t op);
+ void cmpb_ded_ded(uint16_t op);
+ void cmpb_ded_ix(uint16_t op);
+ void cmpb_ded_ixd(uint16_t op);
+ void cmpb_ix_rg(uint16_t op);
+ void cmpb_ix_rgd(uint16_t op);
+ void cmpb_ix_in(uint16_t op);
+ void cmpb_ix_ind(uint16_t op);
+ void cmpb_ix_de(uint16_t op);
+ void cmpb_ix_ded(uint16_t op);
+ void cmpb_ix_ix(uint16_t op);
+ void cmpb_ix_ixd(uint16_t op);
+ void cmpb_ixd_rg(uint16_t op);
+ void cmpb_ixd_rgd(uint16_t op);
+ void cmpb_ixd_in(uint16_t op);
+ void cmpb_ixd_ind(uint16_t op);
+ void cmpb_ixd_de(uint16_t op);
+ void cmpb_ixd_ded(uint16_t op);
+ void cmpb_ixd_ix(uint16_t op);
+ void cmpb_ixd_ixd(uint16_t op);
+ void bitb_rg_rg(uint16_t op);
+ void bitb_rg_rgd(uint16_t op);
+ void bitb_rg_in(uint16_t op);
+ void bitb_rg_ind(uint16_t op);
+ void bitb_rg_de(uint16_t op);
+ void bitb_rg_ded(uint16_t op);
+ void bitb_rg_ix(uint16_t op);
+ void bitb_rg_ixd(uint16_t op);
+ void bitb_rgd_rg(uint16_t op);
+ void bitb_rgd_rgd(uint16_t op);
+ void bitb_rgd_in(uint16_t op);
+ void bitb_rgd_ind(uint16_t op);
+ void bitb_rgd_de(uint16_t op);
+ void bitb_rgd_ded(uint16_t op);
+ void bitb_rgd_ix(uint16_t op);
+ void bitb_rgd_ixd(uint16_t op);
+ void bitb_in_rg(uint16_t op);
+ void bitb_in_rgd(uint16_t op);
+ void bitb_in_in(uint16_t op);
+ void bitb_in_ind(uint16_t op);
+ void bitb_in_de(uint16_t op);
+ void bitb_in_ded(uint16_t op);
+ void bitb_in_ix(uint16_t op);
+ void bitb_in_ixd(uint16_t op);
+ void bitb_ind_rg(uint16_t op);
+ void bitb_ind_rgd(uint16_t op);
+ void bitb_ind_in(uint16_t op);
+ void bitb_ind_ind(uint16_t op);
+ void bitb_ind_de(uint16_t op);
+ void bitb_ind_ded(uint16_t op);
+ void bitb_ind_ix(uint16_t op);
+ void bitb_ind_ixd(uint16_t op);
+ void bitb_de_rg(uint16_t op);
+ void bitb_de_rgd(uint16_t op);
+ void bitb_de_in(uint16_t op);
+ void bitb_de_ind(uint16_t op);
+ void bitb_de_de(uint16_t op);
+ void bitb_de_ded(uint16_t op);
+ void bitb_de_ix(uint16_t op);
+ void bitb_de_ixd(uint16_t op);
+ void bitb_ded_rg(uint16_t op);
+ void bitb_ded_rgd(uint16_t op);
+ void bitb_ded_in(uint16_t op);
+ void bitb_ded_ind(uint16_t op);
+ void bitb_ded_de(uint16_t op);
+ void bitb_ded_ded(uint16_t op);
+ void bitb_ded_ix(uint16_t op);
+ void bitb_ded_ixd(uint16_t op);
+ void bitb_ix_rg(uint16_t op);
+ void bitb_ix_rgd(uint16_t op);
+ void bitb_ix_in(uint16_t op);
+ void bitb_ix_ind(uint16_t op);
+ void bitb_ix_de(uint16_t op);
+ void bitb_ix_ded(uint16_t op);
+ void bitb_ix_ix(uint16_t op);
+ void bitb_ix_ixd(uint16_t op);
+ void bitb_ixd_rg(uint16_t op);
+ void bitb_ixd_rgd(uint16_t op);
+ void bitb_ixd_in(uint16_t op);
+ void bitb_ixd_ind(uint16_t op);
+ void bitb_ixd_de(uint16_t op);
+ void bitb_ixd_ded(uint16_t op);
+ void bitb_ixd_ix(uint16_t op);
+ void bitb_ixd_ixd(uint16_t op);
+ void bicb_rg_rg(uint16_t op);
+ void bicb_rg_rgd(uint16_t op);
+ void bicb_rg_in(uint16_t op);
+ void bicb_rg_ind(uint16_t op);
+ void bicb_rg_de(uint16_t op);
+ void bicb_rg_ded(uint16_t op);
+ void bicb_rg_ix(uint16_t op);
+ void bicb_rg_ixd(uint16_t op);
+ void bicb_rgd_rg(uint16_t op);
+ void bicb_rgd_rgd(uint16_t op);
+ void bicb_rgd_in(uint16_t op);
+ void bicb_rgd_ind(uint16_t op);
+ void bicb_rgd_de(uint16_t op);
+ void bicb_rgd_ded(uint16_t op);
+ void bicb_rgd_ix(uint16_t op);
+ void bicb_rgd_ixd(uint16_t op);
+ void bicb_in_rg(uint16_t op);
+ void bicb_in_rgd(uint16_t op);
+ void bicb_in_in(uint16_t op);
+ void bicb_in_ind(uint16_t op);
+ void bicb_in_de(uint16_t op);
+ void bicb_in_ded(uint16_t op);
+ void bicb_in_ix(uint16_t op);
+ void bicb_in_ixd(uint16_t op);
+ void bicb_ind_rg(uint16_t op);
+ void bicb_ind_rgd(uint16_t op);
+ void bicb_ind_in(uint16_t op);
+ void bicb_ind_ind(uint16_t op);
+ void bicb_ind_de(uint16_t op);
+ void bicb_ind_ded(uint16_t op);
+ void bicb_ind_ix(uint16_t op);
+ void bicb_ind_ixd(uint16_t op);
+ void bicb_de_rg(uint16_t op);
+ void bicb_de_rgd(uint16_t op);
+ void bicb_de_in(uint16_t op);
+ void bicb_de_ind(uint16_t op);
+ void bicb_de_de(uint16_t op);
+ void bicb_de_ded(uint16_t op);
+ void bicb_de_ix(uint16_t op);
+ void bicb_de_ixd(uint16_t op);
+ void bicb_ded_rg(uint16_t op);
+ void bicb_ded_rgd(uint16_t op);
+ void bicb_ded_in(uint16_t op);
+ void bicb_ded_ind(uint16_t op);
+ void bicb_ded_de(uint16_t op);
+ void bicb_ded_ded(uint16_t op);
+ void bicb_ded_ix(uint16_t op);
+ void bicb_ded_ixd(uint16_t op);
+ void bicb_ix_rg(uint16_t op);
+ void bicb_ix_rgd(uint16_t op);
+ void bicb_ix_in(uint16_t op);
+ void bicb_ix_ind(uint16_t op);
+ void bicb_ix_de(uint16_t op);
+ void bicb_ix_ded(uint16_t op);
+ void bicb_ix_ix(uint16_t op);
+ void bicb_ix_ixd(uint16_t op);
+ void bicb_ixd_rg(uint16_t op);
+ void bicb_ixd_rgd(uint16_t op);
+ void bicb_ixd_in(uint16_t op);
+ void bicb_ixd_ind(uint16_t op);
+ void bicb_ixd_de(uint16_t op);
+ void bicb_ixd_ded(uint16_t op);
+ void bicb_ixd_ix(uint16_t op);
+ void bicb_ixd_ixd(uint16_t op);
+ void bisb_rg_rg(uint16_t op);
+ void bisb_rg_rgd(uint16_t op);
+ void bisb_rg_in(uint16_t op);
+ void bisb_rg_ind(uint16_t op);
+ void bisb_rg_de(uint16_t op);
+ void bisb_rg_ded(uint16_t op);
+ void bisb_rg_ix(uint16_t op);
+ void bisb_rg_ixd(uint16_t op);
+ void bisb_rgd_rg(uint16_t op);
+ void bisb_rgd_rgd(uint16_t op);
+ void bisb_rgd_in(uint16_t op);
+ void bisb_rgd_ind(uint16_t op);
+ void bisb_rgd_de(uint16_t op);
+ void bisb_rgd_ded(uint16_t op);
+ void bisb_rgd_ix(uint16_t op);
+ void bisb_rgd_ixd(uint16_t op);
+ void bisb_in_rg(uint16_t op);
+ void bisb_in_rgd(uint16_t op);
+ void bisb_in_in(uint16_t op);
+ void bisb_in_ind(uint16_t op);
+ void bisb_in_de(uint16_t op);
+ void bisb_in_ded(uint16_t op);
+ void bisb_in_ix(uint16_t op);
+ void bisb_in_ixd(uint16_t op);
+ void bisb_ind_rg(uint16_t op);
+ void bisb_ind_rgd(uint16_t op);
+ void bisb_ind_in(uint16_t op);
+ void bisb_ind_ind(uint16_t op);
+ void bisb_ind_de(uint16_t op);
+ void bisb_ind_ded(uint16_t op);
+ void bisb_ind_ix(uint16_t op);
+ void bisb_ind_ixd(uint16_t op);
+ void bisb_de_rg(uint16_t op);
+ void bisb_de_rgd(uint16_t op);
+ void bisb_de_in(uint16_t op);
+ void bisb_de_ind(uint16_t op);
+ void bisb_de_de(uint16_t op);
+ void bisb_de_ded(uint16_t op);
+ void bisb_de_ix(uint16_t op);
+ void bisb_de_ixd(uint16_t op);
+ void bisb_ded_rg(uint16_t op);
+ void bisb_ded_rgd(uint16_t op);
+ void bisb_ded_in(uint16_t op);
+ void bisb_ded_ind(uint16_t op);
+ void bisb_ded_de(uint16_t op);
+ void bisb_ded_ded(uint16_t op);
+ void bisb_ded_ix(uint16_t op);
+ void bisb_ded_ixd(uint16_t op);
+ void bisb_ix_rg(uint16_t op);
+ void bisb_ix_rgd(uint16_t op);
+ void bisb_ix_in(uint16_t op);
+ void bisb_ix_ind(uint16_t op);
+ void bisb_ix_de(uint16_t op);
+ void bisb_ix_ded(uint16_t op);
+ void bisb_ix_ix(uint16_t op);
+ void bisb_ix_ixd(uint16_t op);
+ void bisb_ixd_rg(uint16_t op);
+ void bisb_ixd_rgd(uint16_t op);
+ void bisb_ixd_in(uint16_t op);
+ void bisb_ixd_ind(uint16_t op);
+ void bisb_ixd_de(uint16_t op);
+ void bisb_ixd_ded(uint16_t op);
+ void bisb_ixd_ix(uint16_t op);
+ void bisb_ixd_ixd(uint16_t op);
+ void sub_rg_rg(uint16_t op);
+ void sub_rg_rgd(uint16_t op);
+ void sub_rg_in(uint16_t op);
+ void sub_rg_ind(uint16_t op);
+ void sub_rg_de(uint16_t op);
+ void sub_rg_ded(uint16_t op);
+ void sub_rg_ix(uint16_t op);
+ void sub_rg_ixd(uint16_t op);
+ void sub_rgd_rg(uint16_t op);
+ void sub_rgd_rgd(uint16_t op);
+ void sub_rgd_in(uint16_t op);
+ void sub_rgd_ind(uint16_t op);
+ void sub_rgd_de(uint16_t op);
+ void sub_rgd_ded(uint16_t op);
+ void sub_rgd_ix(uint16_t op);
+ void sub_rgd_ixd(uint16_t op);
+ void sub_in_rg(uint16_t op);
+ void sub_in_rgd(uint16_t op);
+ void sub_in_in(uint16_t op);
+ void sub_in_ind(uint16_t op);
+ void sub_in_de(uint16_t op);
+ void sub_in_ded(uint16_t op);
+ void sub_in_ix(uint16_t op);
+ void sub_in_ixd(uint16_t op);
+ void sub_ind_rg(uint16_t op);
+ void sub_ind_rgd(uint16_t op);
+ void sub_ind_in(uint16_t op);
+ void sub_ind_ind(uint16_t op);
+ void sub_ind_de(uint16_t op);
+ void sub_ind_ded(uint16_t op);
+ void sub_ind_ix(uint16_t op);
+ void sub_ind_ixd(uint16_t op);
+ void sub_de_rg(uint16_t op);
+ void sub_de_rgd(uint16_t op);
+ void sub_de_in(uint16_t op);
+ void sub_de_ind(uint16_t op);
+ void sub_de_de(uint16_t op);
+ void sub_de_ded(uint16_t op);
+ void sub_de_ix(uint16_t op);
+ void sub_de_ixd(uint16_t op);
+ void sub_ded_rg(uint16_t op);
+ void sub_ded_rgd(uint16_t op);
+ void sub_ded_in(uint16_t op);
+ void sub_ded_ind(uint16_t op);
+ void sub_ded_de(uint16_t op);
+ void sub_ded_ded(uint16_t op);
+ void sub_ded_ix(uint16_t op);
+ void sub_ded_ixd(uint16_t op);
+ void sub_ix_rg(uint16_t op);
+ void sub_ix_rgd(uint16_t op);
+ void sub_ix_in(uint16_t op);
+ void sub_ix_ind(uint16_t op);
+ void sub_ix_de(uint16_t op);
+ void sub_ix_ded(uint16_t op);
+ void sub_ix_ix(uint16_t op);
+ void sub_ix_ixd(uint16_t op);
+ void sub_ixd_rg(uint16_t op);
+ void sub_ixd_rgd(uint16_t op);
+ void sub_ixd_in(uint16_t op);
+ void sub_ixd_ind(uint16_t op);
+ void sub_ixd_de(uint16_t op);
+ void sub_ixd_ded(uint16_t op);
+ void sub_ixd_ix(uint16_t op);
+ void sub_ixd_ixd(uint16_t op);
};
class k1801vm2_device : public t11_device
{
public:
// construction/destruction
- k1801vm2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ k1801vm2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
diff --git a/src/devices/cpu/t11/t11dasm.cpp b/src/devices/cpu/t11/t11dasm.cpp
index 0bb9da4e7ea..5f2e773dd43 100644
--- a/src/devices/cpu/t11/t11dasm.cpp
+++ b/src/devices/cpu/t11/t11dasm.cpp
@@ -15,7 +15,7 @@
static const char *const regs[8] = { "R0", "R1", "R2", "R3", "R4", "R5", "SP", "PC" };
-static const UINT8 *rombase;
+static const uint8_t *rombase;
static offs_t pcbase;
#define PARAM_WORD(v) ((v) = rombase[pc - pcbase] | (rombase[pc + 1 - pcbase] << 8), pc += 2)
@@ -88,9 +88,9 @@ CPU_DISASSEMBLE( t11 )
{
char ea1[32], ea2[32];
unsigned PC = pc;
- UINT16 op, lo, hi, addr;
- INT16 offset;
- UINT32 flags = 0;
+ uint16_t op, lo, hi, addr;
+ int16_t offset;
+ uint32_t flags = 0;
rombase = oprom;
pcbase = pc;
@@ -161,31 +161,31 @@ CPU_DISASSEMBLE( t11 )
sprintf (buffer, "SWAB %s", ea1);
break;
case 0x0100: case 0x0140: case 0x0180: case 0x01c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BR $%04X", pc + offset);
break;
case 0x0200: case 0x0240: case 0x0280: case 0x02c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BNE $%04X", pc + offset);
break;
case 0x0300: case 0x0340: case 0x0380: case 0x03c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BEQ $%04X", pc + offset);
break;
case 0x0400: case 0x0440: case 0x0480: case 0x04c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BGE $%04X", pc + offset);
break;
case 0x0500: case 0x0540: case 0x0580: case 0x05c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BLT $%04X", pc + offset);
break;
case 0x0600: case 0x0640: case 0x0680: case 0x06c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BGT $%04X", pc + offset);
break;
case 0x0700: case 0x0740: case 0x0780: case 0x07c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BLE $%04X", pc + offset);
break;
case 0x0800: case 0x0840: case 0x0880: case 0x08c0:
@@ -342,35 +342,35 @@ CPU_DISASSEMBLE( t11 )
break;
case 0x8000: case 0x8040: case 0x8080: case 0x80c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BPL $%04X", pc + offset);
break;
case 0x8100: case 0x8140: case 0x8180: case 0x81c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BMI $%04X", pc + offset);
break;
case 0x8200: case 0x8240: case 0x8280: case 0x82c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BHI $%04X", pc + offset);
break;
case 0x8300: case 0x8340: case 0x8380: case 0x83c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BLOS $%04X", pc + offset);
break;
case 0x8400: case 0x8440: case 0x8480: case 0x84c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BVC $%04X", pc + offset);
break;
case 0x8500: case 0x8540: case 0x8580: case 0x85c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BVS $%04X", pc + offset);
break;
case 0x8600: case 0x8640: case 0x8680: case 0x86c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BCC $%04X", pc + offset);
break;
case 0x8700: case 0x8740: case 0x8780: case 0x87c0:
- offset = 2 * (INT8)(op & 0xff);
+ offset = 2 * (int8_t)(op & 0xff);
sprintf (buffer, "BCS $%04X", pc + offset);
break;
case 0x8800: case 0x8840: case 0x8880: case 0x88c0:
diff --git a/src/devices/cpu/t11/t11ops.hxx b/src/devices/cpu/t11/t11ops.hxx
index 86374fa061f..12856460a21 100644
--- a/src/devices/cpu/t11/t11ops.hxx
+++ b/src/devices/cpu/t11/t11ops.hxx
@@ -251,7 +251,7 @@
-void t11_device::op_0000(UINT16 op)
+void t11_device::op_0000(uint16_t op)
{
switch (op & 0x3f)
{
@@ -266,7 +266,7 @@ void t11_device::op_0000(UINT16 op)
}
}
-void t11_device::halt(UINT16 op)
+void t11_device::halt(uint16_t op)
{
m_icount -= 48;
PUSH(PSW);
@@ -276,7 +276,7 @@ void t11_device::halt(UINT16 op)
t11_check_irqs();
}
-void t11_device::illegal(UINT16 op)
+void t11_device::illegal(uint16_t op)
{
m_icount -= 48;
PUSH(PSW);
@@ -286,7 +286,7 @@ void t11_device::illegal(UINT16 op)
t11_check_irqs();
}
-void t11_device::mark(UINT16 op)
+void t11_device::mark(uint16_t op)
{
m_icount -= 36;
@@ -295,15 +295,15 @@ void t11_device::mark(UINT16 op)
REGW(5) = POP();
}
-void t11_device::jmp_rgd(UINT16 op) { m_icount -= 15; { JMP(RGD); } }
-void t11_device::jmp_in(UINT16 op) { m_icount -= 18; { JMP(IN); } }
-void t11_device::jmp_ind(UINT16 op) { m_icount -= 18; { JMP(IND); } }
-void t11_device::jmp_de(UINT16 op) { m_icount -= 18; { JMP(DE); } }
-void t11_device::jmp_ded(UINT16 op) { m_icount -= 21; { JMP(DED); } }
-void t11_device::jmp_ix(UINT16 op) { m_icount -= 21; { JMP(IX); } }
-void t11_device::jmp_ixd(UINT16 op) { m_icount -= 27; { JMP(IXD); } }
+void t11_device::jmp_rgd(uint16_t op) { m_icount -= 15; { JMP(RGD); } }
+void t11_device::jmp_in(uint16_t op) { m_icount -= 18; { JMP(IN); } }
+void t11_device::jmp_ind(uint16_t op) { m_icount -= 18; { JMP(IND); } }
+void t11_device::jmp_de(uint16_t op) { m_icount -= 18; { JMP(DE); } }
+void t11_device::jmp_ded(uint16_t op) { m_icount -= 21; { JMP(DED); } }
+void t11_device::jmp_ix(uint16_t op) { m_icount -= 21; { JMP(IX); } }
+void t11_device::jmp_ixd(uint16_t op) { m_icount -= 27; { JMP(IXD); } }
-void t11_device::rts(UINT16 op)
+void t11_device::rts(uint16_t op)
{
int dreg;
m_icount -= 21;
@@ -312,551 +312,551 @@ void t11_device::rts(UINT16 op)
REGW(dreg) = POP();
}
-void t11_device::ccc(UINT16 op) { m_icount -= 18; { PSW &= ~(op & 15); } }
-void t11_device::scc(UINT16 op) { m_icount -= 18; { PSW |= (op & 15); } }
-
-void t11_device::swab_rg(UINT16 op) { m_icount -= 12; { SWAB_R(RG); } }
-void t11_device::swab_rgd(UINT16 op) { m_icount -= 21; { SWAB_M(RGD); } }
-void t11_device::swab_in(UINT16 op) { m_icount -= 21; { SWAB_M(IN); } }
-void t11_device::swab_ind(UINT16 op) { m_icount -= 27; { SWAB_M(IND); } }
-void t11_device::swab_de(UINT16 op) { m_icount -= 24; { SWAB_M(DE); } }
-void t11_device::swab_ded(UINT16 op) { m_icount -= 30; { SWAB_M(DED); } }
-void t11_device::swab_ix(UINT16 op) { m_icount -= 30; { SWAB_M(IX); } }
-void t11_device::swab_ixd(UINT16 op) { m_icount -= 36; { SWAB_M(IXD); } }
-
-void t11_device::br(UINT16 op) { m_icount -= 12; { BR(1); } }
-void t11_device::bne(UINT16 op) { m_icount -= 12; { BR(!GET_Z); } }
-void t11_device::beq(UINT16 op) { m_icount -= 12; { BR( GET_Z); } }
-void t11_device::bge(UINT16 op) { m_icount -= 12; { BR(!((GET_N >> 2) ^ GET_V)); } }
-void t11_device::blt(UINT16 op) { m_icount -= 12; { BR(((GET_N >> 2) ^ GET_V)); } }
-void t11_device::bgt(UINT16 op) { m_icount -= 12; { BR(!GET_Z && !((GET_N >> 2) ^ GET_V)); } }
-void t11_device::ble(UINT16 op) { m_icount -= 12; { BR( GET_Z || ((GET_N >> 2) ^ GET_V)); } }
-
-void t11_device::jsr_rgd(UINT16 op) { m_icount -= 27; { JSR(RGD); } }
-void t11_device::jsr_in(UINT16 op) { m_icount -= 30; { JSR(IN); } }
-void t11_device::jsr_ind(UINT16 op) { m_icount -= 30; { JSR(IND); } }
-void t11_device::jsr_de(UINT16 op) { m_icount -= 30; { JSR(DE); } }
-void t11_device::jsr_ded(UINT16 op) { m_icount -= 33; { JSR(DED); } }
-void t11_device::jsr_ix(UINT16 op) { m_icount -= 33; { JSR(IX); } }
-void t11_device::jsr_ixd(UINT16 op) { m_icount -= 39; { JSR(IXD); } }
-
-void t11_device::clr_rg(UINT16 op) { m_icount -= 12; { CLR_R(RG); } }
-void t11_device::clr_rgd(UINT16 op) { m_icount -= 21; { CLR_M(RGD); } }
-void t11_device::clr_in(UINT16 op) { m_icount -= 21; { CLR_M(IN); } }
-void t11_device::clr_ind(UINT16 op) { m_icount -= 27; { CLR_M(IND); } }
-void t11_device::clr_de(UINT16 op) { m_icount -= 24; { CLR_M(DE); } }
-void t11_device::clr_ded(UINT16 op) { m_icount -= 30; { CLR_M(DED); } }
-void t11_device::clr_ix(UINT16 op) { m_icount -= 30; { CLR_M(IX); } }
-void t11_device::clr_ixd(UINT16 op) { m_icount -= 36; { CLR_M(IXD); } }
-
-void t11_device::com_rg(UINT16 op) { m_icount -= 12; { COM_R(RG); } }
-void t11_device::com_rgd(UINT16 op) { m_icount -= 21; { COM_M(RGD); } }
-void t11_device::com_in(UINT16 op) { m_icount -= 21; { COM_M(IN); } }
-void t11_device::com_ind(UINT16 op) { m_icount -= 27; { COM_M(IND); } }
-void t11_device::com_de(UINT16 op) { m_icount -= 24; { COM_M(DE); } }
-void t11_device::com_ded(UINT16 op) { m_icount -= 30; { COM_M(DED); } }
-void t11_device::com_ix(UINT16 op) { m_icount -= 30; { COM_M(IX); } }
-void t11_device::com_ixd(UINT16 op) { m_icount -= 36; { COM_M(IXD); } }
-
-void t11_device::inc_rg(UINT16 op) { m_icount -= 12; { INC_R(RG); } }
-void t11_device::inc_rgd(UINT16 op) { m_icount -= 21; { INC_M(RGD); } }
-void t11_device::inc_in(UINT16 op) { m_icount -= 21; { INC_M(IN); } }
-void t11_device::inc_ind(UINT16 op) { m_icount -= 27; { INC_M(IND); } }
-void t11_device::inc_de(UINT16 op) { m_icount -= 24; { INC_M(DE); } }
-void t11_device::inc_ded(UINT16 op) { m_icount -= 30; { INC_M(DED); } }
-void t11_device::inc_ix(UINT16 op) { m_icount -= 30; { INC_M(IX); } }
-void t11_device::inc_ixd(UINT16 op) { m_icount -= 36; { INC_M(IXD); } }
-
-void t11_device::dec_rg(UINT16 op) { m_icount -= 12; { DEC_R(RG); } }
-void t11_device::dec_rgd(UINT16 op) { m_icount -= 21; { DEC_M(RGD); } }
-void t11_device::dec_in(UINT16 op) { m_icount -= 21; { DEC_M(IN); } }
-void t11_device::dec_ind(UINT16 op) { m_icount -= 27; { DEC_M(IND); } }
-void t11_device::dec_de(UINT16 op) { m_icount -= 24; { DEC_M(DE); } }
-void t11_device::dec_ded(UINT16 op) { m_icount -= 30; { DEC_M(DED); } }
-void t11_device::dec_ix(UINT16 op) { m_icount -= 30; { DEC_M(IX); } }
-void t11_device::dec_ixd(UINT16 op) { m_icount -= 36; { DEC_M(IXD); } }
-
-void t11_device::neg_rg(UINT16 op) { m_icount -= 12; { NEG_R(RG); } }
-void t11_device::neg_rgd(UINT16 op) { m_icount -= 21; { NEG_M(RGD); } }
-void t11_device::neg_in(UINT16 op) { m_icount -= 21; { NEG_M(IN); } }
-void t11_device::neg_ind(UINT16 op) { m_icount -= 27; { NEG_M(IND); } }
-void t11_device::neg_de(UINT16 op) { m_icount -= 24; { NEG_M(DE); } }
-void t11_device::neg_ded(UINT16 op) { m_icount -= 30; { NEG_M(DED); } }
-void t11_device::neg_ix(UINT16 op) { m_icount -= 30; { NEG_M(IX); } }
-void t11_device::neg_ixd(UINT16 op) { m_icount -= 36; { NEG_M(IXD); } }
-
-void t11_device::adc_rg(UINT16 op) { m_icount -= 12; { ADC_R(RG); } }
-void t11_device::adc_rgd(UINT16 op) { m_icount -= 21; { ADC_M(RGD); } }
-void t11_device::adc_in(UINT16 op) { m_icount -= 21; { ADC_M(IN); } }
-void t11_device::adc_ind(UINT16 op) { m_icount -= 27; { ADC_M(IND); } }
-void t11_device::adc_de(UINT16 op) { m_icount -= 24; { ADC_M(DE); } }
-void t11_device::adc_ded(UINT16 op) { m_icount -= 30; { ADC_M(DED); } }
-void t11_device::adc_ix(UINT16 op) { m_icount -= 30; { ADC_M(IX); } }
-void t11_device::adc_ixd(UINT16 op) { m_icount -= 36; { ADC_M(IXD); } }
-
-void t11_device::sbc_rg(UINT16 op) { m_icount -= 12; { SBC_R(RG); } }
-void t11_device::sbc_rgd(UINT16 op) { m_icount -= 21; { SBC_M(RGD); } }
-void t11_device::sbc_in(UINT16 op) { m_icount -= 21; { SBC_M(IN); } }
-void t11_device::sbc_ind(UINT16 op) { m_icount -= 27; { SBC_M(IND); } }
-void t11_device::sbc_de(UINT16 op) { m_icount -= 24; { SBC_M(DE); } }
-void t11_device::sbc_ded(UINT16 op) { m_icount -= 30; { SBC_M(DED); } }
-void t11_device::sbc_ix(UINT16 op) { m_icount -= 30; { SBC_M(IX); } }
-void t11_device::sbc_ixd(UINT16 op) { m_icount -= 36; { SBC_M(IXD); } }
-
-void t11_device::tst_rg(UINT16 op) { m_icount -= 12; { TST_R(RG); } }
-void t11_device::tst_rgd(UINT16 op) { m_icount -= 18; { TST_M(RGD); } }
-void t11_device::tst_in(UINT16 op) { m_icount -= 18; { TST_M(IN); } }
-void t11_device::tst_ind(UINT16 op) { m_icount -= 24; { TST_M(IND); } }
-void t11_device::tst_de(UINT16 op) { m_icount -= 21; { TST_M(DE); } }
-void t11_device::tst_ded(UINT16 op) { m_icount -= 27; { TST_M(DED); } }
-void t11_device::tst_ix(UINT16 op) { m_icount -= 27; { TST_M(IX); } }
-void t11_device::tst_ixd(UINT16 op) { m_icount -= 33; { TST_M(IXD); } }
-
-void t11_device::ror_rg(UINT16 op) { m_icount -= 12; { ROR_R(RG); } }
-void t11_device::ror_rgd(UINT16 op) { m_icount -= 21; { ROR_M(RGD); } }
-void t11_device::ror_in(UINT16 op) { m_icount -= 21; { ROR_M(IN); } }
-void t11_device::ror_ind(UINT16 op) { m_icount -= 27; { ROR_M(IND); } }
-void t11_device::ror_de(UINT16 op) { m_icount -= 24; { ROR_M(DE); } }
-void t11_device::ror_ded(UINT16 op) { m_icount -= 30; { ROR_M(DED); } }
-void t11_device::ror_ix(UINT16 op) { m_icount -= 30; { ROR_M(IX); } }
-void t11_device::ror_ixd(UINT16 op) { m_icount -= 36; { ROR_M(IXD); } }
-
-void t11_device::rol_rg(UINT16 op) { m_icount -= 12; { ROL_R(RG); } }
-void t11_device::rol_rgd(UINT16 op) { m_icount -= 21; { ROL_M(RGD); } }
-void t11_device::rol_in(UINT16 op) { m_icount -= 21; { ROL_M(IN); } }
-void t11_device::rol_ind(UINT16 op) { m_icount -= 27; { ROL_M(IND); } }
-void t11_device::rol_de(UINT16 op) { m_icount -= 24; { ROL_M(DE); } }
-void t11_device::rol_ded(UINT16 op) { m_icount -= 30; { ROL_M(DED); } }
-void t11_device::rol_ix(UINT16 op) { m_icount -= 30; { ROL_M(IX); } }
-void t11_device::rol_ixd(UINT16 op) { m_icount -= 36; { ROL_M(IXD); } }
-
-void t11_device::asr_rg(UINT16 op) { m_icount -= 12; { ASR_R(RG); } }
-void t11_device::asr_rgd(UINT16 op) { m_icount -= 21; { ASR_M(RGD); } }
-void t11_device::asr_in(UINT16 op) { m_icount -= 21; { ASR_M(IN); } }
-void t11_device::asr_ind(UINT16 op) { m_icount -= 27; { ASR_M(IND); } }
-void t11_device::asr_de(UINT16 op) { m_icount -= 24; { ASR_M(DE); } }
-void t11_device::asr_ded(UINT16 op) { m_icount -= 30; { ASR_M(DED); } }
-void t11_device::asr_ix(UINT16 op) { m_icount -= 30; { ASR_M(IX); } }
-void t11_device::asr_ixd(UINT16 op) { m_icount -= 36; { ASR_M(IXD); } }
-
-void t11_device::asl_rg(UINT16 op) { m_icount -= 12; { ASL_R(RG); } }
-void t11_device::asl_rgd(UINT16 op) { m_icount -= 21; { ASL_M(RGD); } }
-void t11_device::asl_in(UINT16 op) { m_icount -= 21; { ASL_M(IN); } }
-void t11_device::asl_ind(UINT16 op) { m_icount -= 27; { ASL_M(IND); } }
-void t11_device::asl_de(UINT16 op) { m_icount -= 24; { ASL_M(DE); } }
-void t11_device::asl_ded(UINT16 op) { m_icount -= 30; { ASL_M(DED); } }
-void t11_device::asl_ix(UINT16 op) { m_icount -= 30; { ASL_M(IX); } }
-void t11_device::asl_ixd(UINT16 op) { m_icount -= 36; { ASL_M(IXD); } }
-
-void t11_device::sxt_rg(UINT16 op) { m_icount -= 12; { SXT_R(RG); } }
-void t11_device::sxt_rgd(UINT16 op) { m_icount -= 21; { SXT_M(RGD); } }
-void t11_device::sxt_in(UINT16 op) { m_icount -= 21; { SXT_M(IN); } }
-void t11_device::sxt_ind(UINT16 op) { m_icount -= 27; { SXT_M(IND); } }
-void t11_device::sxt_de(UINT16 op) { m_icount -= 24; { SXT_M(DE); } }
-void t11_device::sxt_ded(UINT16 op) { m_icount -= 30; { SXT_M(DED); } }
-void t11_device::sxt_ix(UINT16 op) { m_icount -= 30; { SXT_M(IX); } }
-void t11_device::sxt_ixd(UINT16 op) { m_icount -= 36; { SXT_M(IXD); } }
-
-void t11_device::mov_rg_rg(UINT16 op) { m_icount -= 9+ 3; { MOV_R(RG,RG); } }
-void t11_device::mov_rg_rgd(UINT16 op) { m_icount -= 9+12; { MOV_M(RG,RGD); } }
-void t11_device::mov_rg_in(UINT16 op) { m_icount -= 9+12; { MOV_M(RG,IN); } }
-void t11_device::mov_rg_ind(UINT16 op) { m_icount -= 9+18; { MOV_M(RG,IND); } }
-void t11_device::mov_rg_de(UINT16 op) { m_icount -= 9+15; { MOV_M(RG,DE); } }
-void t11_device::mov_rg_ded(UINT16 op) { m_icount -= 9+21; { MOV_M(RG,DED); } }
-void t11_device::mov_rg_ix(UINT16 op) { m_icount -= 9+21; { MOV_M(RG,IX); } }
-void t11_device::mov_rg_ixd(UINT16 op) { m_icount -= 9+27; { MOV_M(RG,IXD); } }
-void t11_device::mov_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { MOV_M(RGD,RG); } }
-void t11_device::mov_rgd_rgd(UINT16 op) { m_icount -= 15+12; { MOV_M(RGD,RGD); } }
-void t11_device::mov_rgd_in(UINT16 op) { m_icount -= 15+12; { MOV_M(RGD,IN); } }
-void t11_device::mov_rgd_ind(UINT16 op) { m_icount -= 15+18; { MOV_M(RGD,IND); } }
-void t11_device::mov_rgd_de(UINT16 op) { m_icount -= 15+15; { MOV_M(RGD,DE); } }
-void t11_device::mov_rgd_ded(UINT16 op) { m_icount -= 15+21; { MOV_M(RGD,DED); } }
-void t11_device::mov_rgd_ix(UINT16 op) { m_icount -= 15+21; { MOV_M(RGD,IX); } }
-void t11_device::mov_rgd_ixd(UINT16 op) { m_icount -= 15+27; { MOV_M(RGD,IXD); } }
-void t11_device::mov_in_rg(UINT16 op) { m_icount -= 15+ 3; { MOV_M(IN,RG); } }
-void t11_device::mov_in_rgd(UINT16 op) { m_icount -= 15+12; { MOV_M(IN,RGD); } }
-void t11_device::mov_in_in(UINT16 op) { m_icount -= 15+12; { MOV_M(IN,IN); } }
-void t11_device::mov_in_ind(UINT16 op) { m_icount -= 15+18; { MOV_M(IN,IND); } }
-void t11_device::mov_in_de(UINT16 op) { m_icount -= 15+15; { MOV_M(IN,DE); } }
-void t11_device::mov_in_ded(UINT16 op) { m_icount -= 15+21; { MOV_M(IN,DED); } }
-void t11_device::mov_in_ix(UINT16 op) { m_icount -= 15+21; { MOV_M(IN,IX); } }
-void t11_device::mov_in_ixd(UINT16 op) { m_icount -= 15+27; { MOV_M(IN,IXD); } }
-void t11_device::mov_ind_rg(UINT16 op) { m_icount -= 21+ 3; { MOV_M(IND,RG); } }
-void t11_device::mov_ind_rgd(UINT16 op) { m_icount -= 21+12; { MOV_M(IND,RGD); } }
-void t11_device::mov_ind_in(UINT16 op) { m_icount -= 21+12; { MOV_M(IND,IN); } }
-void t11_device::mov_ind_ind(UINT16 op) { m_icount -= 21+18; { MOV_M(IND,IND); } }
-void t11_device::mov_ind_de(UINT16 op) { m_icount -= 21+15; { MOV_M(IND,DE); } }
-void t11_device::mov_ind_ded(UINT16 op) { m_icount -= 21+21; { MOV_M(IND,DED); } }
-void t11_device::mov_ind_ix(UINT16 op) { m_icount -= 21+21; { MOV_M(IND,IX); } }
-void t11_device::mov_ind_ixd(UINT16 op) { m_icount -= 21+27; { MOV_M(IND,IXD); } }
-void t11_device::mov_de_rg(UINT16 op) { m_icount -= 18+ 3; { MOV_M(DE,RG); } }
-void t11_device::mov_de_rgd(UINT16 op) { m_icount -= 18+12; { MOV_M(DE,RGD); } }
-void t11_device::mov_de_in(UINT16 op) { m_icount -= 18+12; { MOV_M(DE,IN); } }
-void t11_device::mov_de_ind(UINT16 op) { m_icount -= 18+18; { MOV_M(DE,IND); } }
-void t11_device::mov_de_de(UINT16 op) { m_icount -= 18+15; { MOV_M(DE,DE); } }
-void t11_device::mov_de_ded(UINT16 op) { m_icount -= 18+21; { MOV_M(DE,DED); } }
-void t11_device::mov_de_ix(UINT16 op) { m_icount -= 18+21; { MOV_M(DE,IX); } }
-void t11_device::mov_de_ixd(UINT16 op) { m_icount -= 18+27; { MOV_M(DE,IXD); } }
-void t11_device::mov_ded_rg(UINT16 op) { m_icount -= 24+ 3; { MOV_M(DED,RG); } }
-void t11_device::mov_ded_rgd(UINT16 op) { m_icount -= 24+12; { MOV_M(DED,RGD); } }
-void t11_device::mov_ded_in(UINT16 op) { m_icount -= 24+12; { MOV_M(DED,IN); } }
-void t11_device::mov_ded_ind(UINT16 op) { m_icount -= 24+18; { MOV_M(DED,IND); } }
-void t11_device::mov_ded_de(UINT16 op) { m_icount -= 24+15; { MOV_M(DED,DE); } }
-void t11_device::mov_ded_ded(UINT16 op) { m_icount -= 24+21; { MOV_M(DED,DED); } }
-void t11_device::mov_ded_ix(UINT16 op) { m_icount -= 24+21; { MOV_M(DED,IX); } }
-void t11_device::mov_ded_ixd(UINT16 op) { m_icount -= 24+27; { MOV_M(DED,IXD); } }
-void t11_device::mov_ix_rg(UINT16 op) { m_icount -= 24+ 3; { MOV_M(IX,RG); } }
-void t11_device::mov_ix_rgd(UINT16 op) { m_icount -= 24+12; { MOV_M(IX,RGD); } }
-void t11_device::mov_ix_in(UINT16 op) { m_icount -= 24+12; { MOV_M(IX,IN); } }
-void t11_device::mov_ix_ind(UINT16 op) { m_icount -= 24+18; { MOV_M(IX,IND); } }
-void t11_device::mov_ix_de(UINT16 op) { m_icount -= 24+15; { MOV_M(IX,DE); } }
-void t11_device::mov_ix_ded(UINT16 op) { m_icount -= 24+21; { MOV_M(IX,DED); } }
-void t11_device::mov_ix_ix(UINT16 op) { m_icount -= 24+21; { MOV_M(IX,IX); } }
-void t11_device::mov_ix_ixd(UINT16 op) { m_icount -= 24+27; { MOV_M(IX,IXD); } }
-void t11_device::mov_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { MOV_M(IXD,RG); } }
-void t11_device::mov_ixd_rgd(UINT16 op) { m_icount -= 30+12; { MOV_M(IXD,RGD); } }
-void t11_device::mov_ixd_in(UINT16 op) { m_icount -= 30+12; { MOV_M(IXD,IN); } }
-void t11_device::mov_ixd_ind(UINT16 op) { m_icount -= 30+18; { MOV_M(IXD,IND); } }
-void t11_device::mov_ixd_de(UINT16 op) { m_icount -= 30+15; { MOV_M(IXD,DE); } }
-void t11_device::mov_ixd_ded(UINT16 op) { m_icount -= 30+21; { MOV_M(IXD,DED); } }
-void t11_device::mov_ixd_ix(UINT16 op) { m_icount -= 30+21; { MOV_M(IXD,IX); } }
-void t11_device::mov_ixd_ixd(UINT16 op) { m_icount -= 30+27; { MOV_M(IXD,IXD); } }
-
-void t11_device::cmp_rg_rg(UINT16 op) { m_icount -= 9+ 3; { CMP_R(RG,RG); } }
-void t11_device::cmp_rg_rgd(UINT16 op) { m_icount -= 9+ 9; { CMP_M(RG,RGD); } }
-void t11_device::cmp_rg_in(UINT16 op) { m_icount -= 9+ 9; { CMP_M(RG,IN); } }
-void t11_device::cmp_rg_ind(UINT16 op) { m_icount -= 9+15; { CMP_M(RG,IND); } }
-void t11_device::cmp_rg_de(UINT16 op) { m_icount -= 9+12; { CMP_M(RG,DE); } }
-void t11_device::cmp_rg_ded(UINT16 op) { m_icount -= 9+18; { CMP_M(RG,DED); } }
-void t11_device::cmp_rg_ix(UINT16 op) { m_icount -= 9+18; { CMP_M(RG,IX); } }
-void t11_device::cmp_rg_ixd(UINT16 op) { m_icount -= 9+24; { CMP_M(RG,IXD); } }
-void t11_device::cmp_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { CMP_M(RGD,RG); } }
-void t11_device::cmp_rgd_rgd(UINT16 op) { m_icount -= 15+ 9; { CMP_M(RGD,RGD); } }
-void t11_device::cmp_rgd_in(UINT16 op) { m_icount -= 15+ 9; { CMP_M(RGD,IN); } }
-void t11_device::cmp_rgd_ind(UINT16 op) { m_icount -= 15+15; { CMP_M(RGD,IND); } }
-void t11_device::cmp_rgd_de(UINT16 op) { m_icount -= 15+12; { CMP_M(RGD,DE); } }
-void t11_device::cmp_rgd_ded(UINT16 op) { m_icount -= 15+18; { CMP_M(RGD,DED); } }
-void t11_device::cmp_rgd_ix(UINT16 op) { m_icount -= 15+18; { CMP_M(RGD,IX); } }
-void t11_device::cmp_rgd_ixd(UINT16 op) { m_icount -= 15+24; { CMP_M(RGD,IXD); } }
-void t11_device::cmp_in_rg(UINT16 op) { m_icount -= 15+ 3; { CMP_M(IN,RG); } }
-void t11_device::cmp_in_rgd(UINT16 op) { m_icount -= 15+ 9; { CMP_M(IN,RGD); } }
-void t11_device::cmp_in_in(UINT16 op) { m_icount -= 15+ 9; { CMP_M(IN,IN); } }
-void t11_device::cmp_in_ind(UINT16 op) { m_icount -= 15+15; { CMP_M(IN,IND); } }
-void t11_device::cmp_in_de(UINT16 op) { m_icount -= 15+12; { CMP_M(IN,DE); } }
-void t11_device::cmp_in_ded(UINT16 op) { m_icount -= 15+18; { CMP_M(IN,DED); } }
-void t11_device::cmp_in_ix(UINT16 op) { m_icount -= 15+18; { CMP_M(IN,IX); } }
-void t11_device::cmp_in_ixd(UINT16 op) { m_icount -= 15+24; { CMP_M(IN,IXD); } }
-void t11_device::cmp_ind_rg(UINT16 op) { m_icount -= 21+ 3; { CMP_M(IND,RG); } }
-void t11_device::cmp_ind_rgd(UINT16 op) { m_icount -= 21+ 9; { CMP_M(IND,RGD); } }
-void t11_device::cmp_ind_in(UINT16 op) { m_icount -= 21+ 9; { CMP_M(IND,IN); } }
-void t11_device::cmp_ind_ind(UINT16 op) { m_icount -= 21+15; { CMP_M(IND,IND); } }
-void t11_device::cmp_ind_de(UINT16 op) { m_icount -= 21+12; { CMP_M(IND,DE); } }
-void t11_device::cmp_ind_ded(UINT16 op) { m_icount -= 21+18; { CMP_M(IND,DED); } }
-void t11_device::cmp_ind_ix(UINT16 op) { m_icount -= 21+18; { CMP_M(IND,IX); } }
-void t11_device::cmp_ind_ixd(UINT16 op) { m_icount -= 21+24; { CMP_M(IND,IXD); } }
-void t11_device::cmp_de_rg(UINT16 op) { m_icount -= 18+ 3; { CMP_M(DE,RG); } }
-void t11_device::cmp_de_rgd(UINT16 op) { m_icount -= 18+ 9; { CMP_M(DE,RGD); } }
-void t11_device::cmp_de_in(UINT16 op) { m_icount -= 18+ 9; { CMP_M(DE,IN); } }
-void t11_device::cmp_de_ind(UINT16 op) { m_icount -= 18+15; { CMP_M(DE,IND); } }
-void t11_device::cmp_de_de(UINT16 op) { m_icount -= 18+12; { CMP_M(DE,DE); } }
-void t11_device::cmp_de_ded(UINT16 op) { m_icount -= 18+18; { CMP_M(DE,DED); } }
-void t11_device::cmp_de_ix(UINT16 op) { m_icount -= 18+18; { CMP_M(DE,IX); } }
-void t11_device::cmp_de_ixd(UINT16 op) { m_icount -= 18+24; { CMP_M(DE,IXD); } }
-void t11_device::cmp_ded_rg(UINT16 op) { m_icount -= 24+ 3; { CMP_M(DED,RG); } }
-void t11_device::cmp_ded_rgd(UINT16 op) { m_icount -= 24+ 9; { CMP_M(DED,RGD); } }
-void t11_device::cmp_ded_in(UINT16 op) { m_icount -= 24+ 9; { CMP_M(DED,IN); } }
-void t11_device::cmp_ded_ind(UINT16 op) { m_icount -= 24+15; { CMP_M(DED,IND); } }
-void t11_device::cmp_ded_de(UINT16 op) { m_icount -= 24+12; { CMP_M(DED,DE); } }
-void t11_device::cmp_ded_ded(UINT16 op) { m_icount -= 24+18; { CMP_M(DED,DED); } }
-void t11_device::cmp_ded_ix(UINT16 op) { m_icount -= 24+18; { CMP_M(DED,IX); } }
-void t11_device::cmp_ded_ixd(UINT16 op) { m_icount -= 24+24; { CMP_M(DED,IXD); } }
-void t11_device::cmp_ix_rg(UINT16 op) { m_icount -= 24+ 3; { CMP_M(IX,RG); } }
-void t11_device::cmp_ix_rgd(UINT16 op) { m_icount -= 24+ 9; { CMP_M(IX,RGD); } }
-void t11_device::cmp_ix_in(UINT16 op) { m_icount -= 24+ 9; { CMP_M(IX,IN); } }
-void t11_device::cmp_ix_ind(UINT16 op) { m_icount -= 24+15; { CMP_M(IX,IND); } }
-void t11_device::cmp_ix_de(UINT16 op) { m_icount -= 24+12; { CMP_M(IX,DE); } }
-void t11_device::cmp_ix_ded(UINT16 op) { m_icount -= 24+18; { CMP_M(IX,DED); } }
-void t11_device::cmp_ix_ix(UINT16 op) { m_icount -= 24+18; { CMP_M(IX,IX); } }
-void t11_device::cmp_ix_ixd(UINT16 op) { m_icount -= 24+24; { CMP_M(IX,IXD); } }
-void t11_device::cmp_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { CMP_M(IXD,RG); } }
-void t11_device::cmp_ixd_rgd(UINT16 op) { m_icount -= 30+ 9; { CMP_M(IXD,RGD); } }
-void t11_device::cmp_ixd_in(UINT16 op) { m_icount -= 30+ 9; { CMP_M(IXD,IN); } }
-void t11_device::cmp_ixd_ind(UINT16 op) { m_icount -= 30+15; { CMP_M(IXD,IND); } }
-void t11_device::cmp_ixd_de(UINT16 op) { m_icount -= 30+12; { CMP_M(IXD,DE); } }
-void t11_device::cmp_ixd_ded(UINT16 op) { m_icount -= 30+18; { CMP_M(IXD,DED); } }
-void t11_device::cmp_ixd_ix(UINT16 op) { m_icount -= 30+18; { CMP_M(IXD,IX); } }
-void t11_device::cmp_ixd_ixd(UINT16 op) { m_icount -= 30+24; { CMP_M(IXD,IXD); } }
-
-void t11_device::bit_rg_rg(UINT16 op) { m_icount -= 9+ 3; { BIT_R(RG,RG); } }
-void t11_device::bit_rg_rgd(UINT16 op) { m_icount -= 9+ 9; { BIT_M(RG,RGD); } }
-void t11_device::bit_rg_in(UINT16 op) { m_icount -= 9+ 9; { BIT_M(RG,IN); } }
-void t11_device::bit_rg_ind(UINT16 op) { m_icount -= 9+15; { BIT_M(RG,IND); } }
-void t11_device::bit_rg_de(UINT16 op) { m_icount -= 9+12; { BIT_M(RG,DE); } }
-void t11_device::bit_rg_ded(UINT16 op) { m_icount -= 9+18; { BIT_M(RG,DED); } }
-void t11_device::bit_rg_ix(UINT16 op) { m_icount -= 9+18; { BIT_M(RG,IX); } }
-void t11_device::bit_rg_ixd(UINT16 op) { m_icount -= 9+24; { BIT_M(RG,IXD); } }
-void t11_device::bit_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { BIT_M(RGD,RG); } }
-void t11_device::bit_rgd_rgd(UINT16 op) { m_icount -= 15+ 9; { BIT_M(RGD,RGD); } }
-void t11_device::bit_rgd_in(UINT16 op) { m_icount -= 15+ 9; { BIT_M(RGD,IN); } }
-void t11_device::bit_rgd_ind(UINT16 op) { m_icount -= 15+15; { BIT_M(RGD,IND); } }
-void t11_device::bit_rgd_de(UINT16 op) { m_icount -= 15+12; { BIT_M(RGD,DE); } }
-void t11_device::bit_rgd_ded(UINT16 op) { m_icount -= 15+18; { BIT_M(RGD,DED); } }
-void t11_device::bit_rgd_ix(UINT16 op) { m_icount -= 15+18; { BIT_M(RGD,IX); } }
-void t11_device::bit_rgd_ixd(UINT16 op) { m_icount -= 15+24; { BIT_M(RGD,IXD); } }
-void t11_device::bit_in_rg(UINT16 op) { m_icount -= 15+ 3; { BIT_M(IN,RG); } }
-void t11_device::bit_in_rgd(UINT16 op) { m_icount -= 15+ 9; { BIT_M(IN,RGD); } }
-void t11_device::bit_in_in(UINT16 op) { m_icount -= 15+ 9; { BIT_M(IN,IN); } }
-void t11_device::bit_in_ind(UINT16 op) { m_icount -= 15+15; { BIT_M(IN,IND); } }
-void t11_device::bit_in_de(UINT16 op) { m_icount -= 15+12; { BIT_M(IN,DE); } }
-void t11_device::bit_in_ded(UINT16 op) { m_icount -= 15+18; { BIT_M(IN,DED); } }
-void t11_device::bit_in_ix(UINT16 op) { m_icount -= 15+18; { BIT_M(IN,IX); } }
-void t11_device::bit_in_ixd(UINT16 op) { m_icount -= 15+24; { BIT_M(IN,IXD); } }
-void t11_device::bit_ind_rg(UINT16 op) { m_icount -= 21+ 3; { BIT_M(IND,RG); } }
-void t11_device::bit_ind_rgd(UINT16 op) { m_icount -= 21+ 9; { BIT_M(IND,RGD); } }
-void t11_device::bit_ind_in(UINT16 op) { m_icount -= 21+ 9; { BIT_M(IND,IN); } }
-void t11_device::bit_ind_ind(UINT16 op) { m_icount -= 21+15; { BIT_M(IND,IND); } }
-void t11_device::bit_ind_de(UINT16 op) { m_icount -= 21+12; { BIT_M(IND,DE); } }
-void t11_device::bit_ind_ded(UINT16 op) { m_icount -= 21+18; { BIT_M(IND,DED); } }
-void t11_device::bit_ind_ix(UINT16 op) { m_icount -= 21+18; { BIT_M(IND,IX); } }
-void t11_device::bit_ind_ixd(UINT16 op) { m_icount -= 21+24; { BIT_M(IND,IXD); } }
-void t11_device::bit_de_rg(UINT16 op) { m_icount -= 18+ 3; { BIT_M(DE,RG); } }
-void t11_device::bit_de_rgd(UINT16 op) { m_icount -= 18+ 9; { BIT_M(DE,RGD); } }
-void t11_device::bit_de_in(UINT16 op) { m_icount -= 18+ 9; { BIT_M(DE,IN); } }
-void t11_device::bit_de_ind(UINT16 op) { m_icount -= 18+15; { BIT_M(DE,IND); } }
-void t11_device::bit_de_de(UINT16 op) { m_icount -= 18+12; { BIT_M(DE,DE); } }
-void t11_device::bit_de_ded(UINT16 op) { m_icount -= 18+18; { BIT_M(DE,DED); } }
-void t11_device::bit_de_ix(UINT16 op) { m_icount -= 18+18; { BIT_M(DE,IX); } }
-void t11_device::bit_de_ixd(UINT16 op) { m_icount -= 18+24; { BIT_M(DE,IXD); } }
-void t11_device::bit_ded_rg(UINT16 op) { m_icount -= 24+ 3; { BIT_M(DED,RG); } }
-void t11_device::bit_ded_rgd(UINT16 op) { m_icount -= 24+ 9; { BIT_M(DED,RGD); } }
-void t11_device::bit_ded_in(UINT16 op) { m_icount -= 24+ 9; { BIT_M(DED,IN); } }
-void t11_device::bit_ded_ind(UINT16 op) { m_icount -= 24+15; { BIT_M(DED,IND); } }
-void t11_device::bit_ded_de(UINT16 op) { m_icount -= 24+12; { BIT_M(DED,DE); } }
-void t11_device::bit_ded_ded(UINT16 op) { m_icount -= 24+18; { BIT_M(DED,DED); } }
-void t11_device::bit_ded_ix(UINT16 op) { m_icount -= 24+18; { BIT_M(DED,IX); } }
-void t11_device::bit_ded_ixd(UINT16 op) { m_icount -= 24+24; { BIT_M(DED,IXD); } }
-void t11_device::bit_ix_rg(UINT16 op) { m_icount -= 24+ 3; { BIT_M(IX,RG); } }
-void t11_device::bit_ix_rgd(UINT16 op) { m_icount -= 24+ 9; { BIT_M(IX,RGD); } }
-void t11_device::bit_ix_in(UINT16 op) { m_icount -= 24+ 9; { BIT_M(IX,IN); } }
-void t11_device::bit_ix_ind(UINT16 op) { m_icount -= 24+15; { BIT_M(IX,IND); } }
-void t11_device::bit_ix_de(UINT16 op) { m_icount -= 24+12; { BIT_M(IX,DE); } }
-void t11_device::bit_ix_ded(UINT16 op) { m_icount -= 24+18; { BIT_M(IX,DED); } }
-void t11_device::bit_ix_ix(UINT16 op) { m_icount -= 24+18; { BIT_M(IX,IX); } }
-void t11_device::bit_ix_ixd(UINT16 op) { m_icount -= 24+24; { BIT_M(IX,IXD); } }
-void t11_device::bit_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { BIT_M(IXD,RG); } }
-void t11_device::bit_ixd_rgd(UINT16 op) { m_icount -= 30+ 9; { BIT_M(IXD,RGD); } }
-void t11_device::bit_ixd_in(UINT16 op) { m_icount -= 30+ 9; { BIT_M(IXD,IN); } }
-void t11_device::bit_ixd_ind(UINT16 op) { m_icount -= 30+15; { BIT_M(IXD,IND); } }
-void t11_device::bit_ixd_de(UINT16 op) { m_icount -= 30+12; { BIT_M(IXD,DE); } }
-void t11_device::bit_ixd_ded(UINT16 op) { m_icount -= 30+18; { BIT_M(IXD,DED); } }
-void t11_device::bit_ixd_ix(UINT16 op) { m_icount -= 30+18; { BIT_M(IXD,IX); } }
-void t11_device::bit_ixd_ixd(UINT16 op) { m_icount -= 30+24; { BIT_M(IXD,IXD); } }
-
-void t11_device::bic_rg_rg(UINT16 op) { m_icount -= 9+ 3; { BIC_R(RG,RG); } }
-void t11_device::bic_rg_rgd(UINT16 op) { m_icount -= 9+12; { BIC_M(RG,RGD); } }
-void t11_device::bic_rg_in(UINT16 op) { m_icount -= 9+12; { BIC_M(RG,IN); } }
-void t11_device::bic_rg_ind(UINT16 op) { m_icount -= 9+18; { BIC_M(RG,IND); } }
-void t11_device::bic_rg_de(UINT16 op) { m_icount -= 9+15; { BIC_M(RG,DE); } }
-void t11_device::bic_rg_ded(UINT16 op) { m_icount -= 9+21; { BIC_M(RG,DED); } }
-void t11_device::bic_rg_ix(UINT16 op) { m_icount -= 9+21; { BIC_M(RG,IX); } }
-void t11_device::bic_rg_ixd(UINT16 op) { m_icount -= 9+27; { BIC_M(RG,IXD); } }
-void t11_device::bic_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { BIC_X(RGD,RG); } }
-void t11_device::bic_rgd_rgd(UINT16 op) { m_icount -= 15+12; { BIC_M(RGD,RGD); } }
-void t11_device::bic_rgd_in(UINT16 op) { m_icount -= 15+12; { BIC_M(RGD,IN); } }
-void t11_device::bic_rgd_ind(UINT16 op) { m_icount -= 15+18; { BIC_M(RGD,IND); } }
-void t11_device::bic_rgd_de(UINT16 op) { m_icount -= 15+15; { BIC_M(RGD,DE); } }
-void t11_device::bic_rgd_ded(UINT16 op) { m_icount -= 15+21; { BIC_M(RGD,DED); } }
-void t11_device::bic_rgd_ix(UINT16 op) { m_icount -= 15+21; { BIC_M(RGD,IX); } }
-void t11_device::bic_rgd_ixd(UINT16 op) { m_icount -= 15+27; { BIC_M(RGD,IXD); } }
-void t11_device::bic_in_rg(UINT16 op) { m_icount -= 15+ 3; { BIC_X(IN,RG); } }
-void t11_device::bic_in_rgd(UINT16 op) { m_icount -= 15+12; { BIC_M(IN,RGD); } }
-void t11_device::bic_in_in(UINT16 op) { m_icount -= 15+12; { BIC_M(IN,IN); } }
-void t11_device::bic_in_ind(UINT16 op) { m_icount -= 15+18; { BIC_M(IN,IND); } }
-void t11_device::bic_in_de(UINT16 op) { m_icount -= 15+15; { BIC_M(IN,DE); } }
-void t11_device::bic_in_ded(UINT16 op) { m_icount -= 15+21; { BIC_M(IN,DED); } }
-void t11_device::bic_in_ix(UINT16 op) { m_icount -= 15+21; { BIC_M(IN,IX); } }
-void t11_device::bic_in_ixd(UINT16 op) { m_icount -= 15+27; { BIC_M(IN,IXD); } }
-void t11_device::bic_ind_rg(UINT16 op) { m_icount -= 21+ 3; { BIC_X(IND,RG); } }
-void t11_device::bic_ind_rgd(UINT16 op) { m_icount -= 21+12; { BIC_M(IND,RGD); } }
-void t11_device::bic_ind_in(UINT16 op) { m_icount -= 21+12; { BIC_M(IND,IN); } }
-void t11_device::bic_ind_ind(UINT16 op) { m_icount -= 21+18; { BIC_M(IND,IND); } }
-void t11_device::bic_ind_de(UINT16 op) { m_icount -= 21+15; { BIC_M(IND,DE); } }
-void t11_device::bic_ind_ded(UINT16 op) { m_icount -= 21+21; { BIC_M(IND,DED); } }
-void t11_device::bic_ind_ix(UINT16 op) { m_icount -= 21+21; { BIC_M(IND,IX); } }
-void t11_device::bic_ind_ixd(UINT16 op) { m_icount -= 21+27; { BIC_M(IND,IXD); } }
-void t11_device::bic_de_rg(UINT16 op) { m_icount -= 18+ 3; { BIC_X(DE,RG); } }
-void t11_device::bic_de_rgd(UINT16 op) { m_icount -= 18+12; { BIC_M(DE,RGD); } }
-void t11_device::bic_de_in(UINT16 op) { m_icount -= 18+12; { BIC_M(DE,IN); } }
-void t11_device::bic_de_ind(UINT16 op) { m_icount -= 18+18; { BIC_M(DE,IND); } }
-void t11_device::bic_de_de(UINT16 op) { m_icount -= 18+15; { BIC_M(DE,DE); } }
-void t11_device::bic_de_ded(UINT16 op) { m_icount -= 18+21; { BIC_M(DE,DED); } }
-void t11_device::bic_de_ix(UINT16 op) { m_icount -= 18+21; { BIC_M(DE,IX); } }
-void t11_device::bic_de_ixd(UINT16 op) { m_icount -= 18+27; { BIC_M(DE,IXD); } }
-void t11_device::bic_ded_rg(UINT16 op) { m_icount -= 24+ 3; { BIC_X(DED,RG); } }
-void t11_device::bic_ded_rgd(UINT16 op) { m_icount -= 24+12; { BIC_M(DED,RGD); } }
-void t11_device::bic_ded_in(UINT16 op) { m_icount -= 24+12; { BIC_M(DED,IN); } }
-void t11_device::bic_ded_ind(UINT16 op) { m_icount -= 24+18; { BIC_M(DED,IND); } }
-void t11_device::bic_ded_de(UINT16 op) { m_icount -= 24+15; { BIC_M(DED,DE); } }
-void t11_device::bic_ded_ded(UINT16 op) { m_icount -= 24+21; { BIC_M(DED,DED); } }
-void t11_device::bic_ded_ix(UINT16 op) { m_icount -= 24+21; { BIC_M(DED,IX); } }
-void t11_device::bic_ded_ixd(UINT16 op) { m_icount -= 24+27; { BIC_M(DED,IXD); } }
-void t11_device::bic_ix_rg(UINT16 op) { m_icount -= 24+ 3; { BIC_X(IX,RG); } }
-void t11_device::bic_ix_rgd(UINT16 op) { m_icount -= 24+12; { BIC_M(IX,RGD); } }
-void t11_device::bic_ix_in(UINT16 op) { m_icount -= 24+12; { BIC_M(IX,IN); } }
-void t11_device::bic_ix_ind(UINT16 op) { m_icount -= 24+18; { BIC_M(IX,IND); } }
-void t11_device::bic_ix_de(UINT16 op) { m_icount -= 24+15; { BIC_M(IX,DE); } }
-void t11_device::bic_ix_ded(UINT16 op) { m_icount -= 24+21; { BIC_M(IX,DED); } }
-void t11_device::bic_ix_ix(UINT16 op) { m_icount -= 24+21; { BIC_M(IX,IX); } }
-void t11_device::bic_ix_ixd(UINT16 op) { m_icount -= 24+27; { BIC_M(IX,IXD); } }
-void t11_device::bic_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { BIC_X(IXD,RG); } }
-void t11_device::bic_ixd_rgd(UINT16 op) { m_icount -= 30+12; { BIC_M(IXD,RGD); } }
-void t11_device::bic_ixd_in(UINT16 op) { m_icount -= 30+12; { BIC_M(IXD,IN); } }
-void t11_device::bic_ixd_ind(UINT16 op) { m_icount -= 30+18; { BIC_M(IXD,IND); } }
-void t11_device::bic_ixd_de(UINT16 op) { m_icount -= 30+15; { BIC_M(IXD,DE); } }
-void t11_device::bic_ixd_ded(UINT16 op) { m_icount -= 30+21; { BIC_M(IXD,DED); } }
-void t11_device::bic_ixd_ix(UINT16 op) { m_icount -= 30+21; { BIC_M(IXD,IX); } }
-void t11_device::bic_ixd_ixd(UINT16 op) { m_icount -= 30+27; { BIC_M(IXD,IXD); } }
-
-void t11_device::bis_rg_rg(UINT16 op) { m_icount -= 9+ 3; { BIS_R(RG,RG); } }
-void t11_device::bis_rg_rgd(UINT16 op) { m_icount -= 9+12; { BIS_M(RG,RGD); } }
-void t11_device::bis_rg_in(UINT16 op) { m_icount -= 9+12; { BIS_M(RG,IN); } }
-void t11_device::bis_rg_ind(UINT16 op) { m_icount -= 9+18; { BIS_M(RG,IND); } }
-void t11_device::bis_rg_de(UINT16 op) { m_icount -= 9+15; { BIS_M(RG,DE); } }
-void t11_device::bis_rg_ded(UINT16 op) { m_icount -= 9+21; { BIS_M(RG,DED); } }
-void t11_device::bis_rg_ix(UINT16 op) { m_icount -= 9+21; { BIS_M(RG,IX); } }
-void t11_device::bis_rg_ixd(UINT16 op) { m_icount -= 9+27; { BIS_M(RG,IXD); } }
-void t11_device::bis_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { BIS_X(RGD,RG); } }
-void t11_device::bis_rgd_rgd(UINT16 op) { m_icount -= 15+12; { BIS_M(RGD,RGD); } }
-void t11_device::bis_rgd_in(UINT16 op) { m_icount -= 15+12; { BIS_M(RGD,IN); } }
-void t11_device::bis_rgd_ind(UINT16 op) { m_icount -= 15+18; { BIS_M(RGD,IND); } }
-void t11_device::bis_rgd_de(UINT16 op) { m_icount -= 15+15; { BIS_M(RGD,DE); } }
-void t11_device::bis_rgd_ded(UINT16 op) { m_icount -= 15+21; { BIS_M(RGD,DED); } }
-void t11_device::bis_rgd_ix(UINT16 op) { m_icount -= 15+21; { BIS_M(RGD,IX); } }
-void t11_device::bis_rgd_ixd(UINT16 op) { m_icount -= 15+27; { BIS_M(RGD,IXD); } }
-void t11_device::bis_in_rg(UINT16 op) { m_icount -= 15+ 3; { BIS_X(IN,RG); } }
-void t11_device::bis_in_rgd(UINT16 op) { m_icount -= 15+12; { BIS_M(IN,RGD); } }
-void t11_device::bis_in_in(UINT16 op) { m_icount -= 15+12; { BIS_M(IN,IN); } }
-void t11_device::bis_in_ind(UINT16 op) { m_icount -= 15+18; { BIS_M(IN,IND); } }
-void t11_device::bis_in_de(UINT16 op) { m_icount -= 15+15; { BIS_M(IN,DE); } }
-void t11_device::bis_in_ded(UINT16 op) { m_icount -= 15+21; { BIS_M(IN,DED); } }
-void t11_device::bis_in_ix(UINT16 op) { m_icount -= 15+21; { BIS_M(IN,IX); } }
-void t11_device::bis_in_ixd(UINT16 op) { m_icount -= 15+27; { BIS_M(IN,IXD); } }
-void t11_device::bis_ind_rg(UINT16 op) { m_icount -= 21+ 3; { BIS_X(IND,RG); } }
-void t11_device::bis_ind_rgd(UINT16 op) { m_icount -= 21+12; { BIS_M(IND,RGD); } }
-void t11_device::bis_ind_in(UINT16 op) { m_icount -= 21+12; { BIS_M(IND,IN); } }
-void t11_device::bis_ind_ind(UINT16 op) { m_icount -= 21+18; { BIS_M(IND,IND); } }
-void t11_device::bis_ind_de(UINT16 op) { m_icount -= 21+15; { BIS_M(IND,DE); } }
-void t11_device::bis_ind_ded(UINT16 op) { m_icount -= 21+21; { BIS_M(IND,DED); } }
-void t11_device::bis_ind_ix(UINT16 op) { m_icount -= 21+21; { BIS_M(IND,IX); } }
-void t11_device::bis_ind_ixd(UINT16 op) { m_icount -= 21+27; { BIS_M(IND,IXD); } }
-void t11_device::bis_de_rg(UINT16 op) { m_icount -= 18+ 3; { BIS_X(DE,RG); } }
-void t11_device::bis_de_rgd(UINT16 op) { m_icount -= 18+12; { BIS_M(DE,RGD); } }
-void t11_device::bis_de_in(UINT16 op) { m_icount -= 18+12; { BIS_M(DE,IN); } }
-void t11_device::bis_de_ind(UINT16 op) { m_icount -= 18+18; { BIS_M(DE,IND); } }
-void t11_device::bis_de_de(UINT16 op) { m_icount -= 18+15; { BIS_M(DE,DE); } }
-void t11_device::bis_de_ded(UINT16 op) { m_icount -= 18+21; { BIS_M(DE,DED); } }
-void t11_device::bis_de_ix(UINT16 op) { m_icount -= 18+21; { BIS_M(DE,IX); } }
-void t11_device::bis_de_ixd(UINT16 op) { m_icount -= 18+27; { BIS_M(DE,IXD); } }
-void t11_device::bis_ded_rg(UINT16 op) { m_icount -= 24+ 3; { BIS_X(DED,RG); } }
-void t11_device::bis_ded_rgd(UINT16 op) { m_icount -= 24+12; { BIS_M(DED,RGD); } }
-void t11_device::bis_ded_in(UINT16 op) { m_icount -= 24+12; { BIS_M(DED,IN); } }
-void t11_device::bis_ded_ind(UINT16 op) { m_icount -= 24+18; { BIS_M(DED,IND); } }
-void t11_device::bis_ded_de(UINT16 op) { m_icount -= 24+15; { BIS_M(DED,DE); } }
-void t11_device::bis_ded_ded(UINT16 op) { m_icount -= 24+21; { BIS_M(DED,DED); } }
-void t11_device::bis_ded_ix(UINT16 op) { m_icount -= 24+21; { BIS_M(DED,IX); } }
-void t11_device::bis_ded_ixd(UINT16 op) { m_icount -= 24+27; { BIS_M(DED,IXD); } }
-void t11_device::bis_ix_rg(UINT16 op) { m_icount -= 24+ 3; { BIS_X(IX,RG); } }
-void t11_device::bis_ix_rgd(UINT16 op) { m_icount -= 24+12; { BIS_M(IX,RGD); } }
-void t11_device::bis_ix_in(UINT16 op) { m_icount -= 24+12; { BIS_M(IX,IN); } }
-void t11_device::bis_ix_ind(UINT16 op) { m_icount -= 24+18; { BIS_M(IX,IND); } }
-void t11_device::bis_ix_de(UINT16 op) { m_icount -= 24+15; { BIS_M(IX,DE); } }
-void t11_device::bis_ix_ded(UINT16 op) { m_icount -= 24+21; { BIS_M(IX,DED); } }
-void t11_device::bis_ix_ix(UINT16 op) { m_icount -= 24+21; { BIS_M(IX,IX); } }
-void t11_device::bis_ix_ixd(UINT16 op) { m_icount -= 24+27; { BIS_M(IX,IXD); } }
-void t11_device::bis_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { BIS_X(IXD,RG); } }
-void t11_device::bis_ixd_rgd(UINT16 op) { m_icount -= 30+12; { BIS_M(IXD,RGD); } }
-void t11_device::bis_ixd_in(UINT16 op) { m_icount -= 30+12; { BIS_M(IXD,IN); } }
-void t11_device::bis_ixd_ind(UINT16 op) { m_icount -= 30+18; { BIS_M(IXD,IND); } }
-void t11_device::bis_ixd_de(UINT16 op) { m_icount -= 30+15; { BIS_M(IXD,DE); } }
-void t11_device::bis_ixd_ded(UINT16 op) { m_icount -= 30+21; { BIS_M(IXD,DED); } }
-void t11_device::bis_ixd_ix(UINT16 op) { m_icount -= 30+21; { BIS_M(IXD,IX); } }
-void t11_device::bis_ixd_ixd(UINT16 op) { m_icount -= 30+27; { BIS_M(IXD,IXD); } }
-
-void t11_device::add_rg_rg(UINT16 op) { m_icount -= 9+ 3; { ADD_R(RG,RG); } }
-void t11_device::add_rg_rgd(UINT16 op) { m_icount -= 9+12; { ADD_M(RG,RGD); } }
-void t11_device::add_rg_in(UINT16 op) { m_icount -= 9+12; { ADD_M(RG,IN); } }
-void t11_device::add_rg_ind(UINT16 op) { m_icount -= 9+18; { ADD_M(RG,IND); } }
-void t11_device::add_rg_de(UINT16 op) { m_icount -= 9+15; { ADD_M(RG,DE); } }
-void t11_device::add_rg_ded(UINT16 op) { m_icount -= 9+21; { ADD_M(RG,DED); } }
-void t11_device::add_rg_ix(UINT16 op) { m_icount -= 9+21; { ADD_M(RG,IX); } }
-void t11_device::add_rg_ixd(UINT16 op) { m_icount -= 9+27; { ADD_M(RG,IXD); } }
-void t11_device::add_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { ADD_X(RGD,RG); } }
-void t11_device::add_rgd_rgd(UINT16 op) { m_icount -= 15+12; { ADD_M(RGD,RGD); } }
-void t11_device::add_rgd_in(UINT16 op) { m_icount -= 15+12; { ADD_M(RGD,IN); } }
-void t11_device::add_rgd_ind(UINT16 op) { m_icount -= 15+18; { ADD_M(RGD,IND); } }
-void t11_device::add_rgd_de(UINT16 op) { m_icount -= 15+15; { ADD_M(RGD,DE); } }
-void t11_device::add_rgd_ded(UINT16 op) { m_icount -= 15+21; { ADD_M(RGD,DED); } }
-void t11_device::add_rgd_ix(UINT16 op) { m_icount -= 15+21; { ADD_M(RGD,IX); } }
-void t11_device::add_rgd_ixd(UINT16 op) { m_icount -= 15+27; { ADD_M(RGD,IXD); } }
-void t11_device::add_in_rg(UINT16 op) { m_icount -= 15+ 3; { ADD_X(IN,RG); } }
-void t11_device::add_in_rgd(UINT16 op) { m_icount -= 15+12; { ADD_M(IN,RGD); } }
-void t11_device::add_in_in(UINT16 op) { m_icount -= 15+12; { ADD_M(IN,IN); } }
-void t11_device::add_in_ind(UINT16 op) { m_icount -= 15+18; { ADD_M(IN,IND); } }
-void t11_device::add_in_de(UINT16 op) { m_icount -= 15+15; { ADD_M(IN,DE); } }
-void t11_device::add_in_ded(UINT16 op) { m_icount -= 15+21; { ADD_M(IN,DED); } }
-void t11_device::add_in_ix(UINT16 op) { m_icount -= 15+21; { ADD_M(IN,IX); } }
-void t11_device::add_in_ixd(UINT16 op) { m_icount -= 15+27; { ADD_M(IN,IXD); } }
-void t11_device::add_ind_rg(UINT16 op) { m_icount -= 21+ 3; { ADD_X(IND,RG); } }
-void t11_device::add_ind_rgd(UINT16 op) { m_icount -= 21+12; { ADD_M(IND,RGD); } }
-void t11_device::add_ind_in(UINT16 op) { m_icount -= 21+12; { ADD_M(IND,IN); } }
-void t11_device::add_ind_ind(UINT16 op) { m_icount -= 21+18; { ADD_M(IND,IND); } }
-void t11_device::add_ind_de(UINT16 op) { m_icount -= 21+15; { ADD_M(IND,DE); } }
-void t11_device::add_ind_ded(UINT16 op) { m_icount -= 21+21; { ADD_M(IND,DED); } }
-void t11_device::add_ind_ix(UINT16 op) { m_icount -= 21+21; { ADD_M(IND,IX); } }
-void t11_device::add_ind_ixd(UINT16 op) { m_icount -= 21+27; { ADD_M(IND,IXD); } }
-void t11_device::add_de_rg(UINT16 op) { m_icount -= 18+ 3; { ADD_X(DE,RG); } }
-void t11_device::add_de_rgd(UINT16 op) { m_icount -= 18+12; { ADD_M(DE,RGD); } }
-void t11_device::add_de_in(UINT16 op) { m_icount -= 18+12; { ADD_M(DE,IN); } }
-void t11_device::add_de_ind(UINT16 op) { m_icount -= 18+18; { ADD_M(DE,IND); } }
-void t11_device::add_de_de(UINT16 op) { m_icount -= 18+15; { ADD_M(DE,DE); } }
-void t11_device::add_de_ded(UINT16 op) { m_icount -= 18+21; { ADD_M(DE,DED); } }
-void t11_device::add_de_ix(UINT16 op) { m_icount -= 18+21; { ADD_M(DE,IX); } }
-void t11_device::add_de_ixd(UINT16 op) { m_icount -= 18+27; { ADD_M(DE,IXD); } }
-void t11_device::add_ded_rg(UINT16 op) { m_icount -= 24+ 3; { ADD_X(DED,RG); } }
-void t11_device::add_ded_rgd(UINT16 op) { m_icount -= 24+12; { ADD_M(DED,RGD); } }
-void t11_device::add_ded_in(UINT16 op) { m_icount -= 24+12; { ADD_M(DED,IN); } }
-void t11_device::add_ded_ind(UINT16 op) { m_icount -= 24+18; { ADD_M(DED,IND); } }
-void t11_device::add_ded_de(UINT16 op) { m_icount -= 24+15; { ADD_M(DED,DE); } }
-void t11_device::add_ded_ded(UINT16 op) { m_icount -= 24+21; { ADD_M(DED,DED); } }
-void t11_device::add_ded_ix(UINT16 op) { m_icount -= 24+21; { ADD_M(DED,IX); } }
-void t11_device::add_ded_ixd(UINT16 op) { m_icount -= 24+27; { ADD_M(DED,IXD); } }
-void t11_device::add_ix_rg(UINT16 op) { m_icount -= 24+ 3; { ADD_X(IX,RG); } }
-void t11_device::add_ix_rgd(UINT16 op) { m_icount -= 24+12; { ADD_M(IX,RGD); } }
-void t11_device::add_ix_in(UINT16 op) { m_icount -= 24+12; { ADD_M(IX,IN); } }
-void t11_device::add_ix_ind(UINT16 op) { m_icount -= 24+18; { ADD_M(IX,IND); } }
-void t11_device::add_ix_de(UINT16 op) { m_icount -= 24+15; { ADD_M(IX,DE); } }
-void t11_device::add_ix_ded(UINT16 op) { m_icount -= 24+21; { ADD_M(IX,DED); } }
-void t11_device::add_ix_ix(UINT16 op) { m_icount -= 24+21; { ADD_M(IX,IX); } }
-void t11_device::add_ix_ixd(UINT16 op) { m_icount -= 24+27; { ADD_M(IX,IXD); } }
-void t11_device::add_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { ADD_X(IXD,RG); } }
-void t11_device::add_ixd_rgd(UINT16 op) { m_icount -= 30+12; { ADD_M(IXD,RGD); } }
-void t11_device::add_ixd_in(UINT16 op) { m_icount -= 30+12; { ADD_M(IXD,IN); } }
-void t11_device::add_ixd_ind(UINT16 op) { m_icount -= 30+18; { ADD_M(IXD,IND); } }
-void t11_device::add_ixd_de(UINT16 op) { m_icount -= 30+15; { ADD_M(IXD,DE); } }
-void t11_device::add_ixd_ded(UINT16 op) { m_icount -= 30+21; { ADD_M(IXD,DED); } }
-void t11_device::add_ixd_ix(UINT16 op) { m_icount -= 30+21; { ADD_M(IXD,IX); } }
-void t11_device::add_ixd_ixd(UINT16 op) { m_icount -= 30+27; { ADD_M(IXD,IXD); } }
-
-void t11_device::xor_rg(UINT16 op) { m_icount -= 12; { XOR_R(RG); } }
-void t11_device::xor_rgd(UINT16 op) { m_icount -= 21; { XOR_M(RGD); } }
-void t11_device::xor_in(UINT16 op) { m_icount -= 21; { XOR_M(IN); } }
-void t11_device::xor_ind(UINT16 op) { m_icount -= 27; { XOR_M(IND); } }
-void t11_device::xor_de(UINT16 op) { m_icount -= 24; { XOR_M(DE); } }
-void t11_device::xor_ded(UINT16 op) { m_icount -= 30; { XOR_M(DED); } }
-void t11_device::xor_ix(UINT16 op) { m_icount -= 30; { XOR_M(IX); } }
-void t11_device::xor_ixd(UINT16 op) { m_icount -= 36; { XOR_M(IXD); } }
-
-void t11_device::sob(UINT16 op)
+void t11_device::ccc(uint16_t op) { m_icount -= 18; { PSW &= ~(op & 15); } }
+void t11_device::scc(uint16_t op) { m_icount -= 18; { PSW |= (op & 15); } }
+
+void t11_device::swab_rg(uint16_t op) { m_icount -= 12; { SWAB_R(RG); } }
+void t11_device::swab_rgd(uint16_t op) { m_icount -= 21; { SWAB_M(RGD); } }
+void t11_device::swab_in(uint16_t op) { m_icount -= 21; { SWAB_M(IN); } }
+void t11_device::swab_ind(uint16_t op) { m_icount -= 27; { SWAB_M(IND); } }
+void t11_device::swab_de(uint16_t op) { m_icount -= 24; { SWAB_M(DE); } }
+void t11_device::swab_ded(uint16_t op) { m_icount -= 30; { SWAB_M(DED); } }
+void t11_device::swab_ix(uint16_t op) { m_icount -= 30; { SWAB_M(IX); } }
+void t11_device::swab_ixd(uint16_t op) { m_icount -= 36; { SWAB_M(IXD); } }
+
+void t11_device::br(uint16_t op) { m_icount -= 12; { BR(1); } }
+void t11_device::bne(uint16_t op) { m_icount -= 12; { BR(!GET_Z); } }
+void t11_device::beq(uint16_t op) { m_icount -= 12; { BR( GET_Z); } }
+void t11_device::bge(uint16_t op) { m_icount -= 12; { BR(!((GET_N >> 2) ^ GET_V)); } }
+void t11_device::blt(uint16_t op) { m_icount -= 12; { BR(((GET_N >> 2) ^ GET_V)); } }
+void t11_device::bgt(uint16_t op) { m_icount -= 12; { BR(!GET_Z && !((GET_N >> 2) ^ GET_V)); } }
+void t11_device::ble(uint16_t op) { m_icount -= 12; { BR( GET_Z || ((GET_N >> 2) ^ GET_V)); } }
+
+void t11_device::jsr_rgd(uint16_t op) { m_icount -= 27; { JSR(RGD); } }
+void t11_device::jsr_in(uint16_t op) { m_icount -= 30; { JSR(IN); } }
+void t11_device::jsr_ind(uint16_t op) { m_icount -= 30; { JSR(IND); } }
+void t11_device::jsr_de(uint16_t op) { m_icount -= 30; { JSR(DE); } }
+void t11_device::jsr_ded(uint16_t op) { m_icount -= 33; { JSR(DED); } }
+void t11_device::jsr_ix(uint16_t op) { m_icount -= 33; { JSR(IX); } }
+void t11_device::jsr_ixd(uint16_t op) { m_icount -= 39; { JSR(IXD); } }
+
+void t11_device::clr_rg(uint16_t op) { m_icount -= 12; { CLR_R(RG); } }
+void t11_device::clr_rgd(uint16_t op) { m_icount -= 21; { CLR_M(RGD); } }
+void t11_device::clr_in(uint16_t op) { m_icount -= 21; { CLR_M(IN); } }
+void t11_device::clr_ind(uint16_t op) { m_icount -= 27; { CLR_M(IND); } }
+void t11_device::clr_de(uint16_t op) { m_icount -= 24; { CLR_M(DE); } }
+void t11_device::clr_ded(uint16_t op) { m_icount -= 30; { CLR_M(DED); } }
+void t11_device::clr_ix(uint16_t op) { m_icount -= 30; { CLR_M(IX); } }
+void t11_device::clr_ixd(uint16_t op) { m_icount -= 36; { CLR_M(IXD); } }
+
+void t11_device::com_rg(uint16_t op) { m_icount -= 12; { COM_R(RG); } }
+void t11_device::com_rgd(uint16_t op) { m_icount -= 21; { COM_M(RGD); } }
+void t11_device::com_in(uint16_t op) { m_icount -= 21; { COM_M(IN); } }
+void t11_device::com_ind(uint16_t op) { m_icount -= 27; { COM_M(IND); } }
+void t11_device::com_de(uint16_t op) { m_icount -= 24; { COM_M(DE); } }
+void t11_device::com_ded(uint16_t op) { m_icount -= 30; { COM_M(DED); } }
+void t11_device::com_ix(uint16_t op) { m_icount -= 30; { COM_M(IX); } }
+void t11_device::com_ixd(uint16_t op) { m_icount -= 36; { COM_M(IXD); } }
+
+void t11_device::inc_rg(uint16_t op) { m_icount -= 12; { INC_R(RG); } }
+void t11_device::inc_rgd(uint16_t op) { m_icount -= 21; { INC_M(RGD); } }
+void t11_device::inc_in(uint16_t op) { m_icount -= 21; { INC_M(IN); } }
+void t11_device::inc_ind(uint16_t op) { m_icount -= 27; { INC_M(IND); } }
+void t11_device::inc_de(uint16_t op) { m_icount -= 24; { INC_M(DE); } }
+void t11_device::inc_ded(uint16_t op) { m_icount -= 30; { INC_M(DED); } }
+void t11_device::inc_ix(uint16_t op) { m_icount -= 30; { INC_M(IX); } }
+void t11_device::inc_ixd(uint16_t op) { m_icount -= 36; { INC_M(IXD); } }
+
+void t11_device::dec_rg(uint16_t op) { m_icount -= 12; { DEC_R(RG); } }
+void t11_device::dec_rgd(uint16_t op) { m_icount -= 21; { DEC_M(RGD); } }
+void t11_device::dec_in(uint16_t op) { m_icount -= 21; { DEC_M(IN); } }
+void t11_device::dec_ind(uint16_t op) { m_icount -= 27; { DEC_M(IND); } }
+void t11_device::dec_de(uint16_t op) { m_icount -= 24; { DEC_M(DE); } }
+void t11_device::dec_ded(uint16_t op) { m_icount -= 30; { DEC_M(DED); } }
+void t11_device::dec_ix(uint16_t op) { m_icount -= 30; { DEC_M(IX); } }
+void t11_device::dec_ixd(uint16_t op) { m_icount -= 36; { DEC_M(IXD); } }
+
+void t11_device::neg_rg(uint16_t op) { m_icount -= 12; { NEG_R(RG); } }
+void t11_device::neg_rgd(uint16_t op) { m_icount -= 21; { NEG_M(RGD); } }
+void t11_device::neg_in(uint16_t op) { m_icount -= 21; { NEG_M(IN); } }
+void t11_device::neg_ind(uint16_t op) { m_icount -= 27; { NEG_M(IND); } }
+void t11_device::neg_de(uint16_t op) { m_icount -= 24; { NEG_M(DE); } }
+void t11_device::neg_ded(uint16_t op) { m_icount -= 30; { NEG_M(DED); } }
+void t11_device::neg_ix(uint16_t op) { m_icount -= 30; { NEG_M(IX); } }
+void t11_device::neg_ixd(uint16_t op) { m_icount -= 36; { NEG_M(IXD); } }
+
+void t11_device::adc_rg(uint16_t op) { m_icount -= 12; { ADC_R(RG); } }
+void t11_device::adc_rgd(uint16_t op) { m_icount -= 21; { ADC_M(RGD); } }
+void t11_device::adc_in(uint16_t op) { m_icount -= 21; { ADC_M(IN); } }
+void t11_device::adc_ind(uint16_t op) { m_icount -= 27; { ADC_M(IND); } }
+void t11_device::adc_de(uint16_t op) { m_icount -= 24; { ADC_M(DE); } }
+void t11_device::adc_ded(uint16_t op) { m_icount -= 30; { ADC_M(DED); } }
+void t11_device::adc_ix(uint16_t op) { m_icount -= 30; { ADC_M(IX); } }
+void t11_device::adc_ixd(uint16_t op) { m_icount -= 36; { ADC_M(IXD); } }
+
+void t11_device::sbc_rg(uint16_t op) { m_icount -= 12; { SBC_R(RG); } }
+void t11_device::sbc_rgd(uint16_t op) { m_icount -= 21; { SBC_M(RGD); } }
+void t11_device::sbc_in(uint16_t op) { m_icount -= 21; { SBC_M(IN); } }
+void t11_device::sbc_ind(uint16_t op) { m_icount -= 27; { SBC_M(IND); } }
+void t11_device::sbc_de(uint16_t op) { m_icount -= 24; { SBC_M(DE); } }
+void t11_device::sbc_ded(uint16_t op) { m_icount -= 30; { SBC_M(DED); } }
+void t11_device::sbc_ix(uint16_t op) { m_icount -= 30; { SBC_M(IX); } }
+void t11_device::sbc_ixd(uint16_t op) { m_icount -= 36; { SBC_M(IXD); } }
+
+void t11_device::tst_rg(uint16_t op) { m_icount -= 12; { TST_R(RG); } }
+void t11_device::tst_rgd(uint16_t op) { m_icount -= 18; { TST_M(RGD); } }
+void t11_device::tst_in(uint16_t op) { m_icount -= 18; { TST_M(IN); } }
+void t11_device::tst_ind(uint16_t op) { m_icount -= 24; { TST_M(IND); } }
+void t11_device::tst_de(uint16_t op) { m_icount -= 21; { TST_M(DE); } }
+void t11_device::tst_ded(uint16_t op) { m_icount -= 27; { TST_M(DED); } }
+void t11_device::tst_ix(uint16_t op) { m_icount -= 27; { TST_M(IX); } }
+void t11_device::tst_ixd(uint16_t op) { m_icount -= 33; { TST_M(IXD); } }
+
+void t11_device::ror_rg(uint16_t op) { m_icount -= 12; { ROR_R(RG); } }
+void t11_device::ror_rgd(uint16_t op) { m_icount -= 21; { ROR_M(RGD); } }
+void t11_device::ror_in(uint16_t op) { m_icount -= 21; { ROR_M(IN); } }
+void t11_device::ror_ind(uint16_t op) { m_icount -= 27; { ROR_M(IND); } }
+void t11_device::ror_de(uint16_t op) { m_icount -= 24; { ROR_M(DE); } }
+void t11_device::ror_ded(uint16_t op) { m_icount -= 30; { ROR_M(DED); } }
+void t11_device::ror_ix(uint16_t op) { m_icount -= 30; { ROR_M(IX); } }
+void t11_device::ror_ixd(uint16_t op) { m_icount -= 36; { ROR_M(IXD); } }
+
+void t11_device::rol_rg(uint16_t op) { m_icount -= 12; { ROL_R(RG); } }
+void t11_device::rol_rgd(uint16_t op) { m_icount -= 21; { ROL_M(RGD); } }
+void t11_device::rol_in(uint16_t op) { m_icount -= 21; { ROL_M(IN); } }
+void t11_device::rol_ind(uint16_t op) { m_icount -= 27; { ROL_M(IND); } }
+void t11_device::rol_de(uint16_t op) { m_icount -= 24; { ROL_M(DE); } }
+void t11_device::rol_ded(uint16_t op) { m_icount -= 30; { ROL_M(DED); } }
+void t11_device::rol_ix(uint16_t op) { m_icount -= 30; { ROL_M(IX); } }
+void t11_device::rol_ixd(uint16_t op) { m_icount -= 36; { ROL_M(IXD); } }
+
+void t11_device::asr_rg(uint16_t op) { m_icount -= 12; { ASR_R(RG); } }
+void t11_device::asr_rgd(uint16_t op) { m_icount -= 21; { ASR_M(RGD); } }
+void t11_device::asr_in(uint16_t op) { m_icount -= 21; { ASR_M(IN); } }
+void t11_device::asr_ind(uint16_t op) { m_icount -= 27; { ASR_M(IND); } }
+void t11_device::asr_de(uint16_t op) { m_icount -= 24; { ASR_M(DE); } }
+void t11_device::asr_ded(uint16_t op) { m_icount -= 30; { ASR_M(DED); } }
+void t11_device::asr_ix(uint16_t op) { m_icount -= 30; { ASR_M(IX); } }
+void t11_device::asr_ixd(uint16_t op) { m_icount -= 36; { ASR_M(IXD); } }
+
+void t11_device::asl_rg(uint16_t op) { m_icount -= 12; { ASL_R(RG); } }
+void t11_device::asl_rgd(uint16_t op) { m_icount -= 21; { ASL_M(RGD); } }
+void t11_device::asl_in(uint16_t op) { m_icount -= 21; { ASL_M(IN); } }
+void t11_device::asl_ind(uint16_t op) { m_icount -= 27; { ASL_M(IND); } }
+void t11_device::asl_de(uint16_t op) { m_icount -= 24; { ASL_M(DE); } }
+void t11_device::asl_ded(uint16_t op) { m_icount -= 30; { ASL_M(DED); } }
+void t11_device::asl_ix(uint16_t op) { m_icount -= 30; { ASL_M(IX); } }
+void t11_device::asl_ixd(uint16_t op) { m_icount -= 36; { ASL_M(IXD); } }
+
+void t11_device::sxt_rg(uint16_t op) { m_icount -= 12; { SXT_R(RG); } }
+void t11_device::sxt_rgd(uint16_t op) { m_icount -= 21; { SXT_M(RGD); } }
+void t11_device::sxt_in(uint16_t op) { m_icount -= 21; { SXT_M(IN); } }
+void t11_device::sxt_ind(uint16_t op) { m_icount -= 27; { SXT_M(IND); } }
+void t11_device::sxt_de(uint16_t op) { m_icount -= 24; { SXT_M(DE); } }
+void t11_device::sxt_ded(uint16_t op) { m_icount -= 30; { SXT_M(DED); } }
+void t11_device::sxt_ix(uint16_t op) { m_icount -= 30; { SXT_M(IX); } }
+void t11_device::sxt_ixd(uint16_t op) { m_icount -= 36; { SXT_M(IXD); } }
+
+void t11_device::mov_rg_rg(uint16_t op) { m_icount -= 9+ 3; { MOV_R(RG,RG); } }
+void t11_device::mov_rg_rgd(uint16_t op) { m_icount -= 9+12; { MOV_M(RG,RGD); } }
+void t11_device::mov_rg_in(uint16_t op) { m_icount -= 9+12; { MOV_M(RG,IN); } }
+void t11_device::mov_rg_ind(uint16_t op) { m_icount -= 9+18; { MOV_M(RG,IND); } }
+void t11_device::mov_rg_de(uint16_t op) { m_icount -= 9+15; { MOV_M(RG,DE); } }
+void t11_device::mov_rg_ded(uint16_t op) { m_icount -= 9+21; { MOV_M(RG,DED); } }
+void t11_device::mov_rg_ix(uint16_t op) { m_icount -= 9+21; { MOV_M(RG,IX); } }
+void t11_device::mov_rg_ixd(uint16_t op) { m_icount -= 9+27; { MOV_M(RG,IXD); } }
+void t11_device::mov_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { MOV_M(RGD,RG); } }
+void t11_device::mov_rgd_rgd(uint16_t op) { m_icount -= 15+12; { MOV_M(RGD,RGD); } }
+void t11_device::mov_rgd_in(uint16_t op) { m_icount -= 15+12; { MOV_M(RGD,IN); } }
+void t11_device::mov_rgd_ind(uint16_t op) { m_icount -= 15+18; { MOV_M(RGD,IND); } }
+void t11_device::mov_rgd_de(uint16_t op) { m_icount -= 15+15; { MOV_M(RGD,DE); } }
+void t11_device::mov_rgd_ded(uint16_t op) { m_icount -= 15+21; { MOV_M(RGD,DED); } }
+void t11_device::mov_rgd_ix(uint16_t op) { m_icount -= 15+21; { MOV_M(RGD,IX); } }
+void t11_device::mov_rgd_ixd(uint16_t op) { m_icount -= 15+27; { MOV_M(RGD,IXD); } }
+void t11_device::mov_in_rg(uint16_t op) { m_icount -= 15+ 3; { MOV_M(IN,RG); } }
+void t11_device::mov_in_rgd(uint16_t op) { m_icount -= 15+12; { MOV_M(IN,RGD); } }
+void t11_device::mov_in_in(uint16_t op) { m_icount -= 15+12; { MOV_M(IN,IN); } }
+void t11_device::mov_in_ind(uint16_t op) { m_icount -= 15+18; { MOV_M(IN,IND); } }
+void t11_device::mov_in_de(uint16_t op) { m_icount -= 15+15; { MOV_M(IN,DE); } }
+void t11_device::mov_in_ded(uint16_t op) { m_icount -= 15+21; { MOV_M(IN,DED); } }
+void t11_device::mov_in_ix(uint16_t op) { m_icount -= 15+21; { MOV_M(IN,IX); } }
+void t11_device::mov_in_ixd(uint16_t op) { m_icount -= 15+27; { MOV_M(IN,IXD); } }
+void t11_device::mov_ind_rg(uint16_t op) { m_icount -= 21+ 3; { MOV_M(IND,RG); } }
+void t11_device::mov_ind_rgd(uint16_t op) { m_icount -= 21+12; { MOV_M(IND,RGD); } }
+void t11_device::mov_ind_in(uint16_t op) { m_icount -= 21+12; { MOV_M(IND,IN); } }
+void t11_device::mov_ind_ind(uint16_t op) { m_icount -= 21+18; { MOV_M(IND,IND); } }
+void t11_device::mov_ind_de(uint16_t op) { m_icount -= 21+15; { MOV_M(IND,DE); } }
+void t11_device::mov_ind_ded(uint16_t op) { m_icount -= 21+21; { MOV_M(IND,DED); } }
+void t11_device::mov_ind_ix(uint16_t op) { m_icount -= 21+21; { MOV_M(IND,IX); } }
+void t11_device::mov_ind_ixd(uint16_t op) { m_icount -= 21+27; { MOV_M(IND,IXD); } }
+void t11_device::mov_de_rg(uint16_t op) { m_icount -= 18+ 3; { MOV_M(DE,RG); } }
+void t11_device::mov_de_rgd(uint16_t op) { m_icount -= 18+12; { MOV_M(DE,RGD); } }
+void t11_device::mov_de_in(uint16_t op) { m_icount -= 18+12; { MOV_M(DE,IN); } }
+void t11_device::mov_de_ind(uint16_t op) { m_icount -= 18+18; { MOV_M(DE,IND); } }
+void t11_device::mov_de_de(uint16_t op) { m_icount -= 18+15; { MOV_M(DE,DE); } }
+void t11_device::mov_de_ded(uint16_t op) { m_icount -= 18+21; { MOV_M(DE,DED); } }
+void t11_device::mov_de_ix(uint16_t op) { m_icount -= 18+21; { MOV_M(DE,IX); } }
+void t11_device::mov_de_ixd(uint16_t op) { m_icount -= 18+27; { MOV_M(DE,IXD); } }
+void t11_device::mov_ded_rg(uint16_t op) { m_icount -= 24+ 3; { MOV_M(DED,RG); } }
+void t11_device::mov_ded_rgd(uint16_t op) { m_icount -= 24+12; { MOV_M(DED,RGD); } }
+void t11_device::mov_ded_in(uint16_t op) { m_icount -= 24+12; { MOV_M(DED,IN); } }
+void t11_device::mov_ded_ind(uint16_t op) { m_icount -= 24+18; { MOV_M(DED,IND); } }
+void t11_device::mov_ded_de(uint16_t op) { m_icount -= 24+15; { MOV_M(DED,DE); } }
+void t11_device::mov_ded_ded(uint16_t op) { m_icount -= 24+21; { MOV_M(DED,DED); } }
+void t11_device::mov_ded_ix(uint16_t op) { m_icount -= 24+21; { MOV_M(DED,IX); } }
+void t11_device::mov_ded_ixd(uint16_t op) { m_icount -= 24+27; { MOV_M(DED,IXD); } }
+void t11_device::mov_ix_rg(uint16_t op) { m_icount -= 24+ 3; { MOV_M(IX,RG); } }
+void t11_device::mov_ix_rgd(uint16_t op) { m_icount -= 24+12; { MOV_M(IX,RGD); } }
+void t11_device::mov_ix_in(uint16_t op) { m_icount -= 24+12; { MOV_M(IX,IN); } }
+void t11_device::mov_ix_ind(uint16_t op) { m_icount -= 24+18; { MOV_M(IX,IND); } }
+void t11_device::mov_ix_de(uint16_t op) { m_icount -= 24+15; { MOV_M(IX,DE); } }
+void t11_device::mov_ix_ded(uint16_t op) { m_icount -= 24+21; { MOV_M(IX,DED); } }
+void t11_device::mov_ix_ix(uint16_t op) { m_icount -= 24+21; { MOV_M(IX,IX); } }
+void t11_device::mov_ix_ixd(uint16_t op) { m_icount -= 24+27; { MOV_M(IX,IXD); } }
+void t11_device::mov_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { MOV_M(IXD,RG); } }
+void t11_device::mov_ixd_rgd(uint16_t op) { m_icount -= 30+12; { MOV_M(IXD,RGD); } }
+void t11_device::mov_ixd_in(uint16_t op) { m_icount -= 30+12; { MOV_M(IXD,IN); } }
+void t11_device::mov_ixd_ind(uint16_t op) { m_icount -= 30+18; { MOV_M(IXD,IND); } }
+void t11_device::mov_ixd_de(uint16_t op) { m_icount -= 30+15; { MOV_M(IXD,DE); } }
+void t11_device::mov_ixd_ded(uint16_t op) { m_icount -= 30+21; { MOV_M(IXD,DED); } }
+void t11_device::mov_ixd_ix(uint16_t op) { m_icount -= 30+21; { MOV_M(IXD,IX); } }
+void t11_device::mov_ixd_ixd(uint16_t op) { m_icount -= 30+27; { MOV_M(IXD,IXD); } }
+
+void t11_device::cmp_rg_rg(uint16_t op) { m_icount -= 9+ 3; { CMP_R(RG,RG); } }
+void t11_device::cmp_rg_rgd(uint16_t op) { m_icount -= 9+ 9; { CMP_M(RG,RGD); } }
+void t11_device::cmp_rg_in(uint16_t op) { m_icount -= 9+ 9; { CMP_M(RG,IN); } }
+void t11_device::cmp_rg_ind(uint16_t op) { m_icount -= 9+15; { CMP_M(RG,IND); } }
+void t11_device::cmp_rg_de(uint16_t op) { m_icount -= 9+12; { CMP_M(RG,DE); } }
+void t11_device::cmp_rg_ded(uint16_t op) { m_icount -= 9+18; { CMP_M(RG,DED); } }
+void t11_device::cmp_rg_ix(uint16_t op) { m_icount -= 9+18; { CMP_M(RG,IX); } }
+void t11_device::cmp_rg_ixd(uint16_t op) { m_icount -= 9+24; { CMP_M(RG,IXD); } }
+void t11_device::cmp_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { CMP_M(RGD,RG); } }
+void t11_device::cmp_rgd_rgd(uint16_t op) { m_icount -= 15+ 9; { CMP_M(RGD,RGD); } }
+void t11_device::cmp_rgd_in(uint16_t op) { m_icount -= 15+ 9; { CMP_M(RGD,IN); } }
+void t11_device::cmp_rgd_ind(uint16_t op) { m_icount -= 15+15; { CMP_M(RGD,IND); } }
+void t11_device::cmp_rgd_de(uint16_t op) { m_icount -= 15+12; { CMP_M(RGD,DE); } }
+void t11_device::cmp_rgd_ded(uint16_t op) { m_icount -= 15+18; { CMP_M(RGD,DED); } }
+void t11_device::cmp_rgd_ix(uint16_t op) { m_icount -= 15+18; { CMP_M(RGD,IX); } }
+void t11_device::cmp_rgd_ixd(uint16_t op) { m_icount -= 15+24; { CMP_M(RGD,IXD); } }
+void t11_device::cmp_in_rg(uint16_t op) { m_icount -= 15+ 3; { CMP_M(IN,RG); } }
+void t11_device::cmp_in_rgd(uint16_t op) { m_icount -= 15+ 9; { CMP_M(IN,RGD); } }
+void t11_device::cmp_in_in(uint16_t op) { m_icount -= 15+ 9; { CMP_M(IN,IN); } }
+void t11_device::cmp_in_ind(uint16_t op) { m_icount -= 15+15; { CMP_M(IN,IND); } }
+void t11_device::cmp_in_de(uint16_t op) { m_icount -= 15+12; { CMP_M(IN,DE); } }
+void t11_device::cmp_in_ded(uint16_t op) { m_icount -= 15+18; { CMP_M(IN,DED); } }
+void t11_device::cmp_in_ix(uint16_t op) { m_icount -= 15+18; { CMP_M(IN,IX); } }
+void t11_device::cmp_in_ixd(uint16_t op) { m_icount -= 15+24; { CMP_M(IN,IXD); } }
+void t11_device::cmp_ind_rg(uint16_t op) { m_icount -= 21+ 3; { CMP_M(IND,RG); } }
+void t11_device::cmp_ind_rgd(uint16_t op) { m_icount -= 21+ 9; { CMP_M(IND,RGD); } }
+void t11_device::cmp_ind_in(uint16_t op) { m_icount -= 21+ 9; { CMP_M(IND,IN); } }
+void t11_device::cmp_ind_ind(uint16_t op) { m_icount -= 21+15; { CMP_M(IND,IND); } }
+void t11_device::cmp_ind_de(uint16_t op) { m_icount -= 21+12; { CMP_M(IND,DE); } }
+void t11_device::cmp_ind_ded(uint16_t op) { m_icount -= 21+18; { CMP_M(IND,DED); } }
+void t11_device::cmp_ind_ix(uint16_t op) { m_icount -= 21+18; { CMP_M(IND,IX); } }
+void t11_device::cmp_ind_ixd(uint16_t op) { m_icount -= 21+24; { CMP_M(IND,IXD); } }
+void t11_device::cmp_de_rg(uint16_t op) { m_icount -= 18+ 3; { CMP_M(DE,RG); } }
+void t11_device::cmp_de_rgd(uint16_t op) { m_icount -= 18+ 9; { CMP_M(DE,RGD); } }
+void t11_device::cmp_de_in(uint16_t op) { m_icount -= 18+ 9; { CMP_M(DE,IN); } }
+void t11_device::cmp_de_ind(uint16_t op) { m_icount -= 18+15; { CMP_M(DE,IND); } }
+void t11_device::cmp_de_de(uint16_t op) { m_icount -= 18+12; { CMP_M(DE,DE); } }
+void t11_device::cmp_de_ded(uint16_t op) { m_icount -= 18+18; { CMP_M(DE,DED); } }
+void t11_device::cmp_de_ix(uint16_t op) { m_icount -= 18+18; { CMP_M(DE,IX); } }
+void t11_device::cmp_de_ixd(uint16_t op) { m_icount -= 18+24; { CMP_M(DE,IXD); } }
+void t11_device::cmp_ded_rg(uint16_t op) { m_icount -= 24+ 3; { CMP_M(DED,RG); } }
+void t11_device::cmp_ded_rgd(uint16_t op) { m_icount -= 24+ 9; { CMP_M(DED,RGD); } }
+void t11_device::cmp_ded_in(uint16_t op) { m_icount -= 24+ 9; { CMP_M(DED,IN); } }
+void t11_device::cmp_ded_ind(uint16_t op) { m_icount -= 24+15; { CMP_M(DED,IND); } }
+void t11_device::cmp_ded_de(uint16_t op) { m_icount -= 24+12; { CMP_M(DED,DE); } }
+void t11_device::cmp_ded_ded(uint16_t op) { m_icount -= 24+18; { CMP_M(DED,DED); } }
+void t11_device::cmp_ded_ix(uint16_t op) { m_icount -= 24+18; { CMP_M(DED,IX); } }
+void t11_device::cmp_ded_ixd(uint16_t op) { m_icount -= 24+24; { CMP_M(DED,IXD); } }
+void t11_device::cmp_ix_rg(uint16_t op) { m_icount -= 24+ 3; { CMP_M(IX,RG); } }
+void t11_device::cmp_ix_rgd(uint16_t op) { m_icount -= 24+ 9; { CMP_M(IX,RGD); } }
+void t11_device::cmp_ix_in(uint16_t op) { m_icount -= 24+ 9; { CMP_M(IX,IN); } }
+void t11_device::cmp_ix_ind(uint16_t op) { m_icount -= 24+15; { CMP_M(IX,IND); } }
+void t11_device::cmp_ix_de(uint16_t op) { m_icount -= 24+12; { CMP_M(IX,DE); } }
+void t11_device::cmp_ix_ded(uint16_t op) { m_icount -= 24+18; { CMP_M(IX,DED); } }
+void t11_device::cmp_ix_ix(uint16_t op) { m_icount -= 24+18; { CMP_M(IX,IX); } }
+void t11_device::cmp_ix_ixd(uint16_t op) { m_icount -= 24+24; { CMP_M(IX,IXD); } }
+void t11_device::cmp_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { CMP_M(IXD,RG); } }
+void t11_device::cmp_ixd_rgd(uint16_t op) { m_icount -= 30+ 9; { CMP_M(IXD,RGD); } }
+void t11_device::cmp_ixd_in(uint16_t op) { m_icount -= 30+ 9; { CMP_M(IXD,IN); } }
+void t11_device::cmp_ixd_ind(uint16_t op) { m_icount -= 30+15; { CMP_M(IXD,IND); } }
+void t11_device::cmp_ixd_de(uint16_t op) { m_icount -= 30+12; { CMP_M(IXD,DE); } }
+void t11_device::cmp_ixd_ded(uint16_t op) { m_icount -= 30+18; { CMP_M(IXD,DED); } }
+void t11_device::cmp_ixd_ix(uint16_t op) { m_icount -= 30+18; { CMP_M(IXD,IX); } }
+void t11_device::cmp_ixd_ixd(uint16_t op) { m_icount -= 30+24; { CMP_M(IXD,IXD); } }
+
+void t11_device::bit_rg_rg(uint16_t op) { m_icount -= 9+ 3; { BIT_R(RG,RG); } }
+void t11_device::bit_rg_rgd(uint16_t op) { m_icount -= 9+ 9; { BIT_M(RG,RGD); } }
+void t11_device::bit_rg_in(uint16_t op) { m_icount -= 9+ 9; { BIT_M(RG,IN); } }
+void t11_device::bit_rg_ind(uint16_t op) { m_icount -= 9+15; { BIT_M(RG,IND); } }
+void t11_device::bit_rg_de(uint16_t op) { m_icount -= 9+12; { BIT_M(RG,DE); } }
+void t11_device::bit_rg_ded(uint16_t op) { m_icount -= 9+18; { BIT_M(RG,DED); } }
+void t11_device::bit_rg_ix(uint16_t op) { m_icount -= 9+18; { BIT_M(RG,IX); } }
+void t11_device::bit_rg_ixd(uint16_t op) { m_icount -= 9+24; { BIT_M(RG,IXD); } }
+void t11_device::bit_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { BIT_M(RGD,RG); } }
+void t11_device::bit_rgd_rgd(uint16_t op) { m_icount -= 15+ 9; { BIT_M(RGD,RGD); } }
+void t11_device::bit_rgd_in(uint16_t op) { m_icount -= 15+ 9; { BIT_M(RGD,IN); } }
+void t11_device::bit_rgd_ind(uint16_t op) { m_icount -= 15+15; { BIT_M(RGD,IND); } }
+void t11_device::bit_rgd_de(uint16_t op) { m_icount -= 15+12; { BIT_M(RGD,DE); } }
+void t11_device::bit_rgd_ded(uint16_t op) { m_icount -= 15+18; { BIT_M(RGD,DED); } }
+void t11_device::bit_rgd_ix(uint16_t op) { m_icount -= 15+18; { BIT_M(RGD,IX); } }
+void t11_device::bit_rgd_ixd(uint16_t op) { m_icount -= 15+24; { BIT_M(RGD,IXD); } }
+void t11_device::bit_in_rg(uint16_t op) { m_icount -= 15+ 3; { BIT_M(IN,RG); } }
+void t11_device::bit_in_rgd(uint16_t op) { m_icount -= 15+ 9; { BIT_M(IN,RGD); } }
+void t11_device::bit_in_in(uint16_t op) { m_icount -= 15+ 9; { BIT_M(IN,IN); } }
+void t11_device::bit_in_ind(uint16_t op) { m_icount -= 15+15; { BIT_M(IN,IND); } }
+void t11_device::bit_in_de(uint16_t op) { m_icount -= 15+12; { BIT_M(IN,DE); } }
+void t11_device::bit_in_ded(uint16_t op) { m_icount -= 15+18; { BIT_M(IN,DED); } }
+void t11_device::bit_in_ix(uint16_t op) { m_icount -= 15+18; { BIT_M(IN,IX); } }
+void t11_device::bit_in_ixd(uint16_t op) { m_icount -= 15+24; { BIT_M(IN,IXD); } }
+void t11_device::bit_ind_rg(uint16_t op) { m_icount -= 21+ 3; { BIT_M(IND,RG); } }
+void t11_device::bit_ind_rgd(uint16_t op) { m_icount -= 21+ 9; { BIT_M(IND,RGD); } }
+void t11_device::bit_ind_in(uint16_t op) { m_icount -= 21+ 9; { BIT_M(IND,IN); } }
+void t11_device::bit_ind_ind(uint16_t op) { m_icount -= 21+15; { BIT_M(IND,IND); } }
+void t11_device::bit_ind_de(uint16_t op) { m_icount -= 21+12; { BIT_M(IND,DE); } }
+void t11_device::bit_ind_ded(uint16_t op) { m_icount -= 21+18; { BIT_M(IND,DED); } }
+void t11_device::bit_ind_ix(uint16_t op) { m_icount -= 21+18; { BIT_M(IND,IX); } }
+void t11_device::bit_ind_ixd(uint16_t op) { m_icount -= 21+24; { BIT_M(IND,IXD); } }
+void t11_device::bit_de_rg(uint16_t op) { m_icount -= 18+ 3; { BIT_M(DE,RG); } }
+void t11_device::bit_de_rgd(uint16_t op) { m_icount -= 18+ 9; { BIT_M(DE,RGD); } }
+void t11_device::bit_de_in(uint16_t op) { m_icount -= 18+ 9; { BIT_M(DE,IN); } }
+void t11_device::bit_de_ind(uint16_t op) { m_icount -= 18+15; { BIT_M(DE,IND); } }
+void t11_device::bit_de_de(uint16_t op) { m_icount -= 18+12; { BIT_M(DE,DE); } }
+void t11_device::bit_de_ded(uint16_t op) { m_icount -= 18+18; { BIT_M(DE,DED); } }
+void t11_device::bit_de_ix(uint16_t op) { m_icount -= 18+18; { BIT_M(DE,IX); } }
+void t11_device::bit_de_ixd(uint16_t op) { m_icount -= 18+24; { BIT_M(DE,IXD); } }
+void t11_device::bit_ded_rg(uint16_t op) { m_icount -= 24+ 3; { BIT_M(DED,RG); } }
+void t11_device::bit_ded_rgd(uint16_t op) { m_icount -= 24+ 9; { BIT_M(DED,RGD); } }
+void t11_device::bit_ded_in(uint16_t op) { m_icount -= 24+ 9; { BIT_M(DED,IN); } }
+void t11_device::bit_ded_ind(uint16_t op) { m_icount -= 24+15; { BIT_M(DED,IND); } }
+void t11_device::bit_ded_de(uint16_t op) { m_icount -= 24+12; { BIT_M(DED,DE); } }
+void t11_device::bit_ded_ded(uint16_t op) { m_icount -= 24+18; { BIT_M(DED,DED); } }
+void t11_device::bit_ded_ix(uint16_t op) { m_icount -= 24+18; { BIT_M(DED,IX); } }
+void t11_device::bit_ded_ixd(uint16_t op) { m_icount -= 24+24; { BIT_M(DED,IXD); } }
+void t11_device::bit_ix_rg(uint16_t op) { m_icount -= 24+ 3; { BIT_M(IX,RG); } }
+void t11_device::bit_ix_rgd(uint16_t op) { m_icount -= 24+ 9; { BIT_M(IX,RGD); } }
+void t11_device::bit_ix_in(uint16_t op) { m_icount -= 24+ 9; { BIT_M(IX,IN); } }
+void t11_device::bit_ix_ind(uint16_t op) { m_icount -= 24+15; { BIT_M(IX,IND); } }
+void t11_device::bit_ix_de(uint16_t op) { m_icount -= 24+12; { BIT_M(IX,DE); } }
+void t11_device::bit_ix_ded(uint16_t op) { m_icount -= 24+18; { BIT_M(IX,DED); } }
+void t11_device::bit_ix_ix(uint16_t op) { m_icount -= 24+18; { BIT_M(IX,IX); } }
+void t11_device::bit_ix_ixd(uint16_t op) { m_icount -= 24+24; { BIT_M(IX,IXD); } }
+void t11_device::bit_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { BIT_M(IXD,RG); } }
+void t11_device::bit_ixd_rgd(uint16_t op) { m_icount -= 30+ 9; { BIT_M(IXD,RGD); } }
+void t11_device::bit_ixd_in(uint16_t op) { m_icount -= 30+ 9; { BIT_M(IXD,IN); } }
+void t11_device::bit_ixd_ind(uint16_t op) { m_icount -= 30+15; { BIT_M(IXD,IND); } }
+void t11_device::bit_ixd_de(uint16_t op) { m_icount -= 30+12; { BIT_M(IXD,DE); } }
+void t11_device::bit_ixd_ded(uint16_t op) { m_icount -= 30+18; { BIT_M(IXD,DED); } }
+void t11_device::bit_ixd_ix(uint16_t op) { m_icount -= 30+18; { BIT_M(IXD,IX); } }
+void t11_device::bit_ixd_ixd(uint16_t op) { m_icount -= 30+24; { BIT_M(IXD,IXD); } }
+
+void t11_device::bic_rg_rg(uint16_t op) { m_icount -= 9+ 3; { BIC_R(RG,RG); } }
+void t11_device::bic_rg_rgd(uint16_t op) { m_icount -= 9+12; { BIC_M(RG,RGD); } }
+void t11_device::bic_rg_in(uint16_t op) { m_icount -= 9+12; { BIC_M(RG,IN); } }
+void t11_device::bic_rg_ind(uint16_t op) { m_icount -= 9+18; { BIC_M(RG,IND); } }
+void t11_device::bic_rg_de(uint16_t op) { m_icount -= 9+15; { BIC_M(RG,DE); } }
+void t11_device::bic_rg_ded(uint16_t op) { m_icount -= 9+21; { BIC_M(RG,DED); } }
+void t11_device::bic_rg_ix(uint16_t op) { m_icount -= 9+21; { BIC_M(RG,IX); } }
+void t11_device::bic_rg_ixd(uint16_t op) { m_icount -= 9+27; { BIC_M(RG,IXD); } }
+void t11_device::bic_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { BIC_X(RGD,RG); } }
+void t11_device::bic_rgd_rgd(uint16_t op) { m_icount -= 15+12; { BIC_M(RGD,RGD); } }
+void t11_device::bic_rgd_in(uint16_t op) { m_icount -= 15+12; { BIC_M(RGD,IN); } }
+void t11_device::bic_rgd_ind(uint16_t op) { m_icount -= 15+18; { BIC_M(RGD,IND); } }
+void t11_device::bic_rgd_de(uint16_t op) { m_icount -= 15+15; { BIC_M(RGD,DE); } }
+void t11_device::bic_rgd_ded(uint16_t op) { m_icount -= 15+21; { BIC_M(RGD,DED); } }
+void t11_device::bic_rgd_ix(uint16_t op) { m_icount -= 15+21; { BIC_M(RGD,IX); } }
+void t11_device::bic_rgd_ixd(uint16_t op) { m_icount -= 15+27; { BIC_M(RGD,IXD); } }
+void t11_device::bic_in_rg(uint16_t op) { m_icount -= 15+ 3; { BIC_X(IN,RG); } }
+void t11_device::bic_in_rgd(uint16_t op) { m_icount -= 15+12; { BIC_M(IN,RGD); } }
+void t11_device::bic_in_in(uint16_t op) { m_icount -= 15+12; { BIC_M(IN,IN); } }
+void t11_device::bic_in_ind(uint16_t op) { m_icount -= 15+18; { BIC_M(IN,IND); } }
+void t11_device::bic_in_de(uint16_t op) { m_icount -= 15+15; { BIC_M(IN,DE); } }
+void t11_device::bic_in_ded(uint16_t op) { m_icount -= 15+21; { BIC_M(IN,DED); } }
+void t11_device::bic_in_ix(uint16_t op) { m_icount -= 15+21; { BIC_M(IN,IX); } }
+void t11_device::bic_in_ixd(uint16_t op) { m_icount -= 15+27; { BIC_M(IN,IXD); } }
+void t11_device::bic_ind_rg(uint16_t op) { m_icount -= 21+ 3; { BIC_X(IND,RG); } }
+void t11_device::bic_ind_rgd(uint16_t op) { m_icount -= 21+12; { BIC_M(IND,RGD); } }
+void t11_device::bic_ind_in(uint16_t op) { m_icount -= 21+12; { BIC_M(IND,IN); } }
+void t11_device::bic_ind_ind(uint16_t op) { m_icount -= 21+18; { BIC_M(IND,IND); } }
+void t11_device::bic_ind_de(uint16_t op) { m_icount -= 21+15; { BIC_M(IND,DE); } }
+void t11_device::bic_ind_ded(uint16_t op) { m_icount -= 21+21; { BIC_M(IND,DED); } }
+void t11_device::bic_ind_ix(uint16_t op) { m_icount -= 21+21; { BIC_M(IND,IX); } }
+void t11_device::bic_ind_ixd(uint16_t op) { m_icount -= 21+27; { BIC_M(IND,IXD); } }
+void t11_device::bic_de_rg(uint16_t op) { m_icount -= 18+ 3; { BIC_X(DE,RG); } }
+void t11_device::bic_de_rgd(uint16_t op) { m_icount -= 18+12; { BIC_M(DE,RGD); } }
+void t11_device::bic_de_in(uint16_t op) { m_icount -= 18+12; { BIC_M(DE,IN); } }
+void t11_device::bic_de_ind(uint16_t op) { m_icount -= 18+18; { BIC_M(DE,IND); } }
+void t11_device::bic_de_de(uint16_t op) { m_icount -= 18+15; { BIC_M(DE,DE); } }
+void t11_device::bic_de_ded(uint16_t op) { m_icount -= 18+21; { BIC_M(DE,DED); } }
+void t11_device::bic_de_ix(uint16_t op) { m_icount -= 18+21; { BIC_M(DE,IX); } }
+void t11_device::bic_de_ixd(uint16_t op) { m_icount -= 18+27; { BIC_M(DE,IXD); } }
+void t11_device::bic_ded_rg(uint16_t op) { m_icount -= 24+ 3; { BIC_X(DED,RG); } }
+void t11_device::bic_ded_rgd(uint16_t op) { m_icount -= 24+12; { BIC_M(DED,RGD); } }
+void t11_device::bic_ded_in(uint16_t op) { m_icount -= 24+12; { BIC_M(DED,IN); } }
+void t11_device::bic_ded_ind(uint16_t op) { m_icount -= 24+18; { BIC_M(DED,IND); } }
+void t11_device::bic_ded_de(uint16_t op) { m_icount -= 24+15; { BIC_M(DED,DE); } }
+void t11_device::bic_ded_ded(uint16_t op) { m_icount -= 24+21; { BIC_M(DED,DED); } }
+void t11_device::bic_ded_ix(uint16_t op) { m_icount -= 24+21; { BIC_M(DED,IX); } }
+void t11_device::bic_ded_ixd(uint16_t op) { m_icount -= 24+27; { BIC_M(DED,IXD); } }
+void t11_device::bic_ix_rg(uint16_t op) { m_icount -= 24+ 3; { BIC_X(IX,RG); } }
+void t11_device::bic_ix_rgd(uint16_t op) { m_icount -= 24+12; { BIC_M(IX,RGD); } }
+void t11_device::bic_ix_in(uint16_t op) { m_icount -= 24+12; { BIC_M(IX,IN); } }
+void t11_device::bic_ix_ind(uint16_t op) { m_icount -= 24+18; { BIC_M(IX,IND); } }
+void t11_device::bic_ix_de(uint16_t op) { m_icount -= 24+15; { BIC_M(IX,DE); } }
+void t11_device::bic_ix_ded(uint16_t op) { m_icount -= 24+21; { BIC_M(IX,DED); } }
+void t11_device::bic_ix_ix(uint16_t op) { m_icount -= 24+21; { BIC_M(IX,IX); } }
+void t11_device::bic_ix_ixd(uint16_t op) { m_icount -= 24+27; { BIC_M(IX,IXD); } }
+void t11_device::bic_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { BIC_X(IXD,RG); } }
+void t11_device::bic_ixd_rgd(uint16_t op) { m_icount -= 30+12; { BIC_M(IXD,RGD); } }
+void t11_device::bic_ixd_in(uint16_t op) { m_icount -= 30+12; { BIC_M(IXD,IN); } }
+void t11_device::bic_ixd_ind(uint16_t op) { m_icount -= 30+18; { BIC_M(IXD,IND); } }
+void t11_device::bic_ixd_de(uint16_t op) { m_icount -= 30+15; { BIC_M(IXD,DE); } }
+void t11_device::bic_ixd_ded(uint16_t op) { m_icount -= 30+21; { BIC_M(IXD,DED); } }
+void t11_device::bic_ixd_ix(uint16_t op) { m_icount -= 30+21; { BIC_M(IXD,IX); } }
+void t11_device::bic_ixd_ixd(uint16_t op) { m_icount -= 30+27; { BIC_M(IXD,IXD); } }
+
+void t11_device::bis_rg_rg(uint16_t op) { m_icount -= 9+ 3; { BIS_R(RG,RG); } }
+void t11_device::bis_rg_rgd(uint16_t op) { m_icount -= 9+12; { BIS_M(RG,RGD); } }
+void t11_device::bis_rg_in(uint16_t op) { m_icount -= 9+12; { BIS_M(RG,IN); } }
+void t11_device::bis_rg_ind(uint16_t op) { m_icount -= 9+18; { BIS_M(RG,IND); } }
+void t11_device::bis_rg_de(uint16_t op) { m_icount -= 9+15; { BIS_M(RG,DE); } }
+void t11_device::bis_rg_ded(uint16_t op) { m_icount -= 9+21; { BIS_M(RG,DED); } }
+void t11_device::bis_rg_ix(uint16_t op) { m_icount -= 9+21; { BIS_M(RG,IX); } }
+void t11_device::bis_rg_ixd(uint16_t op) { m_icount -= 9+27; { BIS_M(RG,IXD); } }
+void t11_device::bis_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { BIS_X(RGD,RG); } }
+void t11_device::bis_rgd_rgd(uint16_t op) { m_icount -= 15+12; { BIS_M(RGD,RGD); } }
+void t11_device::bis_rgd_in(uint16_t op) { m_icount -= 15+12; { BIS_M(RGD,IN); } }
+void t11_device::bis_rgd_ind(uint16_t op) { m_icount -= 15+18; { BIS_M(RGD,IND); } }
+void t11_device::bis_rgd_de(uint16_t op) { m_icount -= 15+15; { BIS_M(RGD,DE); } }
+void t11_device::bis_rgd_ded(uint16_t op) { m_icount -= 15+21; { BIS_M(RGD,DED); } }
+void t11_device::bis_rgd_ix(uint16_t op) { m_icount -= 15+21; { BIS_M(RGD,IX); } }
+void t11_device::bis_rgd_ixd(uint16_t op) { m_icount -= 15+27; { BIS_M(RGD,IXD); } }
+void t11_device::bis_in_rg(uint16_t op) { m_icount -= 15+ 3; { BIS_X(IN,RG); } }
+void t11_device::bis_in_rgd(uint16_t op) { m_icount -= 15+12; { BIS_M(IN,RGD); } }
+void t11_device::bis_in_in(uint16_t op) { m_icount -= 15+12; { BIS_M(IN,IN); } }
+void t11_device::bis_in_ind(uint16_t op) { m_icount -= 15+18; { BIS_M(IN,IND); } }
+void t11_device::bis_in_de(uint16_t op) { m_icount -= 15+15; { BIS_M(IN,DE); } }
+void t11_device::bis_in_ded(uint16_t op) { m_icount -= 15+21; { BIS_M(IN,DED); } }
+void t11_device::bis_in_ix(uint16_t op) { m_icount -= 15+21; { BIS_M(IN,IX); } }
+void t11_device::bis_in_ixd(uint16_t op) { m_icount -= 15+27; { BIS_M(IN,IXD); } }
+void t11_device::bis_ind_rg(uint16_t op) { m_icount -= 21+ 3; { BIS_X(IND,RG); } }
+void t11_device::bis_ind_rgd(uint16_t op) { m_icount -= 21+12; { BIS_M(IND,RGD); } }
+void t11_device::bis_ind_in(uint16_t op) { m_icount -= 21+12; { BIS_M(IND,IN); } }
+void t11_device::bis_ind_ind(uint16_t op) { m_icount -= 21+18; { BIS_M(IND,IND); } }
+void t11_device::bis_ind_de(uint16_t op) { m_icount -= 21+15; { BIS_M(IND,DE); } }
+void t11_device::bis_ind_ded(uint16_t op) { m_icount -= 21+21; { BIS_M(IND,DED); } }
+void t11_device::bis_ind_ix(uint16_t op) { m_icount -= 21+21; { BIS_M(IND,IX); } }
+void t11_device::bis_ind_ixd(uint16_t op) { m_icount -= 21+27; { BIS_M(IND,IXD); } }
+void t11_device::bis_de_rg(uint16_t op) { m_icount -= 18+ 3; { BIS_X(DE,RG); } }
+void t11_device::bis_de_rgd(uint16_t op) { m_icount -= 18+12; { BIS_M(DE,RGD); } }
+void t11_device::bis_de_in(uint16_t op) { m_icount -= 18+12; { BIS_M(DE,IN); } }
+void t11_device::bis_de_ind(uint16_t op) { m_icount -= 18+18; { BIS_M(DE,IND); } }
+void t11_device::bis_de_de(uint16_t op) { m_icount -= 18+15; { BIS_M(DE,DE); } }
+void t11_device::bis_de_ded(uint16_t op) { m_icount -= 18+21; { BIS_M(DE,DED); } }
+void t11_device::bis_de_ix(uint16_t op) { m_icount -= 18+21; { BIS_M(DE,IX); } }
+void t11_device::bis_de_ixd(uint16_t op) { m_icount -= 18+27; { BIS_M(DE,IXD); } }
+void t11_device::bis_ded_rg(uint16_t op) { m_icount -= 24+ 3; { BIS_X(DED,RG); } }
+void t11_device::bis_ded_rgd(uint16_t op) { m_icount -= 24+12; { BIS_M(DED,RGD); } }
+void t11_device::bis_ded_in(uint16_t op) { m_icount -= 24+12; { BIS_M(DED,IN); } }
+void t11_device::bis_ded_ind(uint16_t op) { m_icount -= 24+18; { BIS_M(DED,IND); } }
+void t11_device::bis_ded_de(uint16_t op) { m_icount -= 24+15; { BIS_M(DED,DE); } }
+void t11_device::bis_ded_ded(uint16_t op) { m_icount -= 24+21; { BIS_M(DED,DED); } }
+void t11_device::bis_ded_ix(uint16_t op) { m_icount -= 24+21; { BIS_M(DED,IX); } }
+void t11_device::bis_ded_ixd(uint16_t op) { m_icount -= 24+27; { BIS_M(DED,IXD); } }
+void t11_device::bis_ix_rg(uint16_t op) { m_icount -= 24+ 3; { BIS_X(IX,RG); } }
+void t11_device::bis_ix_rgd(uint16_t op) { m_icount -= 24+12; { BIS_M(IX,RGD); } }
+void t11_device::bis_ix_in(uint16_t op) { m_icount -= 24+12; { BIS_M(IX,IN); } }
+void t11_device::bis_ix_ind(uint16_t op) { m_icount -= 24+18; { BIS_M(IX,IND); } }
+void t11_device::bis_ix_de(uint16_t op) { m_icount -= 24+15; { BIS_M(IX,DE); } }
+void t11_device::bis_ix_ded(uint16_t op) { m_icount -= 24+21; { BIS_M(IX,DED); } }
+void t11_device::bis_ix_ix(uint16_t op) { m_icount -= 24+21; { BIS_M(IX,IX); } }
+void t11_device::bis_ix_ixd(uint16_t op) { m_icount -= 24+27; { BIS_M(IX,IXD); } }
+void t11_device::bis_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { BIS_X(IXD,RG); } }
+void t11_device::bis_ixd_rgd(uint16_t op) { m_icount -= 30+12; { BIS_M(IXD,RGD); } }
+void t11_device::bis_ixd_in(uint16_t op) { m_icount -= 30+12; { BIS_M(IXD,IN); } }
+void t11_device::bis_ixd_ind(uint16_t op) { m_icount -= 30+18; { BIS_M(IXD,IND); } }
+void t11_device::bis_ixd_de(uint16_t op) { m_icount -= 30+15; { BIS_M(IXD,DE); } }
+void t11_device::bis_ixd_ded(uint16_t op) { m_icount -= 30+21; { BIS_M(IXD,DED); } }
+void t11_device::bis_ixd_ix(uint16_t op) { m_icount -= 30+21; { BIS_M(IXD,IX); } }
+void t11_device::bis_ixd_ixd(uint16_t op) { m_icount -= 30+27; { BIS_M(IXD,IXD); } }
+
+void t11_device::add_rg_rg(uint16_t op) { m_icount -= 9+ 3; { ADD_R(RG,RG); } }
+void t11_device::add_rg_rgd(uint16_t op) { m_icount -= 9+12; { ADD_M(RG,RGD); } }
+void t11_device::add_rg_in(uint16_t op) { m_icount -= 9+12; { ADD_M(RG,IN); } }
+void t11_device::add_rg_ind(uint16_t op) { m_icount -= 9+18; { ADD_M(RG,IND); } }
+void t11_device::add_rg_de(uint16_t op) { m_icount -= 9+15; { ADD_M(RG,DE); } }
+void t11_device::add_rg_ded(uint16_t op) { m_icount -= 9+21; { ADD_M(RG,DED); } }
+void t11_device::add_rg_ix(uint16_t op) { m_icount -= 9+21; { ADD_M(RG,IX); } }
+void t11_device::add_rg_ixd(uint16_t op) { m_icount -= 9+27; { ADD_M(RG,IXD); } }
+void t11_device::add_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { ADD_X(RGD,RG); } }
+void t11_device::add_rgd_rgd(uint16_t op) { m_icount -= 15+12; { ADD_M(RGD,RGD); } }
+void t11_device::add_rgd_in(uint16_t op) { m_icount -= 15+12; { ADD_M(RGD,IN); } }
+void t11_device::add_rgd_ind(uint16_t op) { m_icount -= 15+18; { ADD_M(RGD,IND); } }
+void t11_device::add_rgd_de(uint16_t op) { m_icount -= 15+15; { ADD_M(RGD,DE); } }
+void t11_device::add_rgd_ded(uint16_t op) { m_icount -= 15+21; { ADD_M(RGD,DED); } }
+void t11_device::add_rgd_ix(uint16_t op) { m_icount -= 15+21; { ADD_M(RGD,IX); } }
+void t11_device::add_rgd_ixd(uint16_t op) { m_icount -= 15+27; { ADD_M(RGD,IXD); } }
+void t11_device::add_in_rg(uint16_t op) { m_icount -= 15+ 3; { ADD_X(IN,RG); } }
+void t11_device::add_in_rgd(uint16_t op) { m_icount -= 15+12; { ADD_M(IN,RGD); } }
+void t11_device::add_in_in(uint16_t op) { m_icount -= 15+12; { ADD_M(IN,IN); } }
+void t11_device::add_in_ind(uint16_t op) { m_icount -= 15+18; { ADD_M(IN,IND); } }
+void t11_device::add_in_de(uint16_t op) { m_icount -= 15+15; { ADD_M(IN,DE); } }
+void t11_device::add_in_ded(uint16_t op) { m_icount -= 15+21; { ADD_M(IN,DED); } }
+void t11_device::add_in_ix(uint16_t op) { m_icount -= 15+21; { ADD_M(IN,IX); } }
+void t11_device::add_in_ixd(uint16_t op) { m_icount -= 15+27; { ADD_M(IN,IXD); } }
+void t11_device::add_ind_rg(uint16_t op) { m_icount -= 21+ 3; { ADD_X(IND,RG); } }
+void t11_device::add_ind_rgd(uint16_t op) { m_icount -= 21+12; { ADD_M(IND,RGD); } }
+void t11_device::add_ind_in(uint16_t op) { m_icount -= 21+12; { ADD_M(IND,IN); } }
+void t11_device::add_ind_ind(uint16_t op) { m_icount -= 21+18; { ADD_M(IND,IND); } }
+void t11_device::add_ind_de(uint16_t op) { m_icount -= 21+15; { ADD_M(IND,DE); } }
+void t11_device::add_ind_ded(uint16_t op) { m_icount -= 21+21; { ADD_M(IND,DED); } }
+void t11_device::add_ind_ix(uint16_t op) { m_icount -= 21+21; { ADD_M(IND,IX); } }
+void t11_device::add_ind_ixd(uint16_t op) { m_icount -= 21+27; { ADD_M(IND,IXD); } }
+void t11_device::add_de_rg(uint16_t op) { m_icount -= 18+ 3; { ADD_X(DE,RG); } }
+void t11_device::add_de_rgd(uint16_t op) { m_icount -= 18+12; { ADD_M(DE,RGD); } }
+void t11_device::add_de_in(uint16_t op) { m_icount -= 18+12; { ADD_M(DE,IN); } }
+void t11_device::add_de_ind(uint16_t op) { m_icount -= 18+18; { ADD_M(DE,IND); } }
+void t11_device::add_de_de(uint16_t op) { m_icount -= 18+15; { ADD_M(DE,DE); } }
+void t11_device::add_de_ded(uint16_t op) { m_icount -= 18+21; { ADD_M(DE,DED); } }
+void t11_device::add_de_ix(uint16_t op) { m_icount -= 18+21; { ADD_M(DE,IX); } }
+void t11_device::add_de_ixd(uint16_t op) { m_icount -= 18+27; { ADD_M(DE,IXD); } }
+void t11_device::add_ded_rg(uint16_t op) { m_icount -= 24+ 3; { ADD_X(DED,RG); } }
+void t11_device::add_ded_rgd(uint16_t op) { m_icount -= 24+12; { ADD_M(DED,RGD); } }
+void t11_device::add_ded_in(uint16_t op) { m_icount -= 24+12; { ADD_M(DED,IN); } }
+void t11_device::add_ded_ind(uint16_t op) { m_icount -= 24+18; { ADD_M(DED,IND); } }
+void t11_device::add_ded_de(uint16_t op) { m_icount -= 24+15; { ADD_M(DED,DE); } }
+void t11_device::add_ded_ded(uint16_t op) { m_icount -= 24+21; { ADD_M(DED,DED); } }
+void t11_device::add_ded_ix(uint16_t op) { m_icount -= 24+21; { ADD_M(DED,IX); } }
+void t11_device::add_ded_ixd(uint16_t op) { m_icount -= 24+27; { ADD_M(DED,IXD); } }
+void t11_device::add_ix_rg(uint16_t op) { m_icount -= 24+ 3; { ADD_X(IX,RG); } }
+void t11_device::add_ix_rgd(uint16_t op) { m_icount -= 24+12; { ADD_M(IX,RGD); } }
+void t11_device::add_ix_in(uint16_t op) { m_icount -= 24+12; { ADD_M(IX,IN); } }
+void t11_device::add_ix_ind(uint16_t op) { m_icount -= 24+18; { ADD_M(IX,IND); } }
+void t11_device::add_ix_de(uint16_t op) { m_icount -= 24+15; { ADD_M(IX,DE); } }
+void t11_device::add_ix_ded(uint16_t op) { m_icount -= 24+21; { ADD_M(IX,DED); } }
+void t11_device::add_ix_ix(uint16_t op) { m_icount -= 24+21; { ADD_M(IX,IX); } }
+void t11_device::add_ix_ixd(uint16_t op) { m_icount -= 24+27; { ADD_M(IX,IXD); } }
+void t11_device::add_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { ADD_X(IXD,RG); } }
+void t11_device::add_ixd_rgd(uint16_t op) { m_icount -= 30+12; { ADD_M(IXD,RGD); } }
+void t11_device::add_ixd_in(uint16_t op) { m_icount -= 30+12; { ADD_M(IXD,IN); } }
+void t11_device::add_ixd_ind(uint16_t op) { m_icount -= 30+18; { ADD_M(IXD,IND); } }
+void t11_device::add_ixd_de(uint16_t op) { m_icount -= 30+15; { ADD_M(IXD,DE); } }
+void t11_device::add_ixd_ded(uint16_t op) { m_icount -= 30+21; { ADD_M(IXD,DED); } }
+void t11_device::add_ixd_ix(uint16_t op) { m_icount -= 30+21; { ADD_M(IXD,IX); } }
+void t11_device::add_ixd_ixd(uint16_t op) { m_icount -= 30+27; { ADD_M(IXD,IXD); } }
+
+void t11_device::xor_rg(uint16_t op) { m_icount -= 12; { XOR_R(RG); } }
+void t11_device::xor_rgd(uint16_t op) { m_icount -= 21; { XOR_M(RGD); } }
+void t11_device::xor_in(uint16_t op) { m_icount -= 21; { XOR_M(IN); } }
+void t11_device::xor_ind(uint16_t op) { m_icount -= 27; { XOR_M(IND); } }
+void t11_device::xor_de(uint16_t op) { m_icount -= 24; { XOR_M(DE); } }
+void t11_device::xor_ded(uint16_t op) { m_icount -= 30; { XOR_M(DED); } }
+void t11_device::xor_ix(uint16_t op) { m_icount -= 30; { XOR_M(IX); } }
+void t11_device::xor_ixd(uint16_t op) { m_icount -= 36; { XOR_M(IXD); } }
+
+void t11_device::sob(uint16_t op)
{
int sreg, source;
@@ -868,16 +868,16 @@ void t11_device::sob(UINT16 op)
PC -= 2 * (op & 0x3f);
}
-void t11_device::bpl(UINT16 op) { m_icount -= 12; { BR(!GET_N); } }
-void t11_device::bmi(UINT16 op) { m_icount -= 12; { BR( GET_N); } }
-void t11_device::bhi(UINT16 op) { m_icount -= 12; { BR(!GET_C && !GET_Z); } }
-void t11_device::blos(UINT16 op) { m_icount -= 12; { BR( GET_C || GET_Z); } }
-void t11_device::bvc(UINT16 op) { m_icount -= 12; { BR(!GET_V); } }
-void t11_device::bvs(UINT16 op) { m_icount -= 12; { BR( GET_V); } }
-void t11_device::bcc(UINT16 op) { m_icount -= 12; { BR(!GET_C); } }
-void t11_device::bcs(UINT16 op) { m_icount -= 12; { BR( GET_C); } }
+void t11_device::bpl(uint16_t op) { m_icount -= 12; { BR(!GET_N); } }
+void t11_device::bmi(uint16_t op) { m_icount -= 12; { BR( GET_N); } }
+void t11_device::bhi(uint16_t op) { m_icount -= 12; { BR(!GET_C && !GET_Z); } }
+void t11_device::blos(uint16_t op) { m_icount -= 12; { BR( GET_C || GET_Z); } }
+void t11_device::bvc(uint16_t op) { m_icount -= 12; { BR(!GET_V); } }
+void t11_device::bvs(uint16_t op) { m_icount -= 12; { BR( GET_V); } }
+void t11_device::bcc(uint16_t op) { m_icount -= 12; { BR(!GET_C); } }
+void t11_device::bcs(uint16_t op) { m_icount -= 12; { BR( GET_C); } }
-void t11_device::emt(UINT16 op)
+void t11_device::emt(uint16_t op)
{
m_icount -= 48;
PUSH(PSW);
@@ -887,7 +887,7 @@ void t11_device::emt(UINT16 op)
t11_check_irqs();
}
-void t11_device::trap(UINT16 op)
+void t11_device::trap(uint16_t op)
{
m_icount -= 48;
PUSH(PSW);
@@ -897,518 +897,518 @@ void t11_device::trap(UINT16 op)
t11_check_irqs();
}
-void t11_device::clrb_rg(UINT16 op) { m_icount -= 12; { CLRB_R(RG); } }
-void t11_device::clrb_rgd(UINT16 op) { m_icount -= 21; { CLRB_M(RGD); } }
-void t11_device::clrb_in(UINT16 op) { m_icount -= 21; { CLRB_M(IN); } }
-void t11_device::clrb_ind(UINT16 op) { m_icount -= 27; { CLRB_M(IND); } }
-void t11_device::clrb_de(UINT16 op) { m_icount -= 24; { CLRB_M(DE); } }
-void t11_device::clrb_ded(UINT16 op) { m_icount -= 30; { CLRB_M(DED); } }
-void t11_device::clrb_ix(UINT16 op) { m_icount -= 30; { CLRB_M(IX); } }
-void t11_device::clrb_ixd(UINT16 op) { m_icount -= 36; { CLRB_M(IXD); } }
-
-void t11_device::comb_rg(UINT16 op) { m_icount -= 12; { COMB_R(RG); } }
-void t11_device::comb_rgd(UINT16 op) { m_icount -= 21; { COMB_M(RGD); } }
-void t11_device::comb_in(UINT16 op) { m_icount -= 21; { COMB_M(IN); } }
-void t11_device::comb_ind(UINT16 op) { m_icount -= 27; { COMB_M(IND); } }
-void t11_device::comb_de(UINT16 op) { m_icount -= 24; { COMB_M(DE); } }
-void t11_device::comb_ded(UINT16 op) { m_icount -= 30; { COMB_M(DED); } }
-void t11_device::comb_ix(UINT16 op) { m_icount -= 30; { COMB_M(IX); } }
-void t11_device::comb_ixd(UINT16 op) { m_icount -= 36; { COMB_M(IXD); } }
-
-void t11_device::incb_rg(UINT16 op) { m_icount -= 12; { INCB_R(RG); } }
-void t11_device::incb_rgd(UINT16 op) { m_icount -= 21; { INCB_M(RGD); } }
-void t11_device::incb_in(UINT16 op) { m_icount -= 21; { INCB_M(IN); } }
-void t11_device::incb_ind(UINT16 op) { m_icount -= 27; { INCB_M(IND); } }
-void t11_device::incb_de(UINT16 op) { m_icount -= 24; { INCB_M(DE); } }
-void t11_device::incb_ded(UINT16 op) { m_icount -= 30; { INCB_M(DED); } }
-void t11_device::incb_ix(UINT16 op) { m_icount -= 30; { INCB_M(IX); } }
-void t11_device::incb_ixd(UINT16 op) { m_icount -= 36; { INCB_M(IXD); } }
-
-void t11_device::decb_rg(UINT16 op) { m_icount -= 12; { DECB_R(RG); } }
-void t11_device::decb_rgd(UINT16 op) { m_icount -= 21; { DECB_M(RGD); } }
-void t11_device::decb_in(UINT16 op) { m_icount -= 21; { DECB_M(IN); } }
-void t11_device::decb_ind(UINT16 op) { m_icount -= 27; { DECB_M(IND); } }
-void t11_device::decb_de(UINT16 op) { m_icount -= 24; { DECB_M(DE); } }
-void t11_device::decb_ded(UINT16 op) { m_icount -= 30; { DECB_M(DED); } }
-void t11_device::decb_ix(UINT16 op) { m_icount -= 30; { DECB_M(IX); } }
-void t11_device::decb_ixd(UINT16 op) { m_icount -= 36; { DECB_M(IXD); } }
-
-void t11_device::negb_rg(UINT16 op) { m_icount -= 12; { NEGB_R(RG); } }
-void t11_device::negb_rgd(UINT16 op) { m_icount -= 21; { NEGB_M(RGD); } }
-void t11_device::negb_in(UINT16 op) { m_icount -= 21; { NEGB_M(IN); } }
-void t11_device::negb_ind(UINT16 op) { m_icount -= 27; { NEGB_M(IND); } }
-void t11_device::negb_de(UINT16 op) { m_icount -= 24; { NEGB_M(DE); } }
-void t11_device::negb_ded(UINT16 op) { m_icount -= 30; { NEGB_M(DED); } }
-void t11_device::negb_ix(UINT16 op) { m_icount -= 30; { NEGB_M(IX); } }
-void t11_device::negb_ixd(UINT16 op) { m_icount -= 36; { NEGB_M(IXD); } }
-
-void t11_device::adcb_rg(UINT16 op) { m_icount -= 12; { ADCB_R(RG); } }
-void t11_device::adcb_rgd(UINT16 op) { m_icount -= 21; { ADCB_M(RGD); } }
-void t11_device::adcb_in(UINT16 op) { m_icount -= 21; { ADCB_M(IN); } }
-void t11_device::adcb_ind(UINT16 op) { m_icount -= 27; { ADCB_M(IND); } }
-void t11_device::adcb_de(UINT16 op) { m_icount -= 24; { ADCB_M(DE); } }
-void t11_device::adcb_ded(UINT16 op) { m_icount -= 30; { ADCB_M(DED); } }
-void t11_device::adcb_ix(UINT16 op) { m_icount -= 30; { ADCB_M(IX); } }
-void t11_device::adcb_ixd(UINT16 op) { m_icount -= 36; { ADCB_M(IXD); } }
-
-void t11_device::sbcb_rg(UINT16 op) { m_icount -= 12; { SBCB_R(RG); } }
-void t11_device::sbcb_rgd(UINT16 op) { m_icount -= 21; { SBCB_M(RGD); } }
-void t11_device::sbcb_in(UINT16 op) { m_icount -= 21; { SBCB_M(IN); } }
-void t11_device::sbcb_ind(UINT16 op) { m_icount -= 27; { SBCB_M(IND); } }
-void t11_device::sbcb_de(UINT16 op) { m_icount -= 24; { SBCB_M(DE); } }
-void t11_device::sbcb_ded(UINT16 op) { m_icount -= 30; { SBCB_M(DED); } }
-void t11_device::sbcb_ix(UINT16 op) { m_icount -= 30; { SBCB_M(IX); } }
-void t11_device::sbcb_ixd(UINT16 op) { m_icount -= 36; { SBCB_M(IXD); } }
-
-void t11_device::tstb_rg(UINT16 op) { m_icount -= 12; { TSTB_R(RG); } }
-void t11_device::tstb_rgd(UINT16 op) { m_icount -= 18; { TSTB_M(RGD); } }
-void t11_device::tstb_in(UINT16 op) { m_icount -= 18; { TSTB_M(IN); } }
-void t11_device::tstb_ind(UINT16 op) { m_icount -= 24; { TSTB_M(IND); } }
-void t11_device::tstb_de(UINT16 op) { m_icount -= 21; { TSTB_M(DE); } }
-void t11_device::tstb_ded(UINT16 op) { m_icount -= 27; { TSTB_M(DED); } }
-void t11_device::tstb_ix(UINT16 op) { m_icount -= 27; { TSTB_M(IX); } }
-void t11_device::tstb_ixd(UINT16 op) { m_icount -= 33; { TSTB_M(IXD); } }
-
-void t11_device::rorb_rg(UINT16 op) { m_icount -= 12; { RORB_R(RG); } }
-void t11_device::rorb_rgd(UINT16 op) { m_icount -= 21; { RORB_M(RGD); } }
-void t11_device::rorb_in(UINT16 op) { m_icount -= 21; { RORB_M(IN); } }
-void t11_device::rorb_ind(UINT16 op) { m_icount -= 27; { RORB_M(IND); } }
-void t11_device::rorb_de(UINT16 op) { m_icount -= 24; { RORB_M(DE); } }
-void t11_device::rorb_ded(UINT16 op) { m_icount -= 30; { RORB_M(DED); } }
-void t11_device::rorb_ix(UINT16 op) { m_icount -= 30; { RORB_M(IX); } }
-void t11_device::rorb_ixd(UINT16 op) { m_icount -= 36; { RORB_M(IXD); } }
-
-void t11_device::rolb_rg(UINT16 op) { m_icount -= 12; { ROLB_R(RG); } }
-void t11_device::rolb_rgd(UINT16 op) { m_icount -= 21; { ROLB_M(RGD); } }
-void t11_device::rolb_in(UINT16 op) { m_icount -= 21; { ROLB_M(IN); } }
-void t11_device::rolb_ind(UINT16 op) { m_icount -= 27; { ROLB_M(IND); } }
-void t11_device::rolb_de(UINT16 op) { m_icount -= 24; { ROLB_M(DE); } }
-void t11_device::rolb_ded(UINT16 op) { m_icount -= 30; { ROLB_M(DED); } }
-void t11_device::rolb_ix(UINT16 op) { m_icount -= 30; { ROLB_M(IX); } }
-void t11_device::rolb_ixd(UINT16 op) { m_icount -= 36; { ROLB_M(IXD); } }
-
-void t11_device::asrb_rg(UINT16 op) { m_icount -= 12; { ASRB_R(RG); } }
-void t11_device::asrb_rgd(UINT16 op) { m_icount -= 21; { ASRB_M(RGD); } }
-void t11_device::asrb_in(UINT16 op) { m_icount -= 21; { ASRB_M(IN); } }
-void t11_device::asrb_ind(UINT16 op) { m_icount -= 27; { ASRB_M(IND); } }
-void t11_device::asrb_de(UINT16 op) { m_icount -= 24; { ASRB_M(DE); } }
-void t11_device::asrb_ded(UINT16 op) { m_icount -= 30; { ASRB_M(DED); } }
-void t11_device::asrb_ix(UINT16 op) { m_icount -= 30; { ASRB_M(IX); } }
-void t11_device::asrb_ixd(UINT16 op) { m_icount -= 36; { ASRB_M(IXD); } }
-
-void t11_device::aslb_rg(UINT16 op) { m_icount -= 12; { ASLB_R(RG); } }
-void t11_device::aslb_rgd(UINT16 op) { m_icount -= 21; { ASLB_M(RGD); } }
-void t11_device::aslb_in(UINT16 op) { m_icount -= 21; { ASLB_M(IN); } }
-void t11_device::aslb_ind(UINT16 op) { m_icount -= 27; { ASLB_M(IND); } }
-void t11_device::aslb_de(UINT16 op) { m_icount -= 24; { ASLB_M(DE); } }
-void t11_device::aslb_ded(UINT16 op) { m_icount -= 30; { ASLB_M(DED); } }
-void t11_device::aslb_ix(UINT16 op) { m_icount -= 30; { ASLB_M(IX); } }
-void t11_device::aslb_ixd(UINT16 op) { m_icount -= 36; { ASLB_M(IXD); } }
-
-void t11_device::mtps_rg(UINT16 op) { m_icount -= 24; { MTPS_R(RG); } }
-void t11_device::mtps_rgd(UINT16 op) { m_icount -= 30; { MTPS_M(RGD); } }
-void t11_device::mtps_in(UINT16 op) { m_icount -= 30; { MTPS_M(IN); } }
-void t11_device::mtps_ind(UINT16 op) { m_icount -= 36; { MTPS_M(IND); } }
-void t11_device::mtps_de(UINT16 op) { m_icount -= 33; { MTPS_M(DE); } }
-void t11_device::mtps_ded(UINT16 op) { m_icount -= 39; { MTPS_M(DED); } }
-void t11_device::mtps_ix(UINT16 op) { m_icount -= 39; { MTPS_M(IX); } }
-void t11_device::mtps_ixd(UINT16 op) { m_icount -= 45; { MTPS_M(IXD); } }
-
-void t11_device::mfps_rg(UINT16 op) { m_icount -= 12; { MFPS_R(RG); } }
-void t11_device::mfps_rgd(UINT16 op) { m_icount -= 21; { MFPS_M(RGD); } }
-void t11_device::mfps_in(UINT16 op) { m_icount -= 21; { MFPS_M(IN); } }
-void t11_device::mfps_ind(UINT16 op) { m_icount -= 27; { MFPS_M(IND); } }
-void t11_device::mfps_de(UINT16 op) { m_icount -= 24; { MFPS_M(DE); } }
-void t11_device::mfps_ded(UINT16 op) { m_icount -= 30; { MFPS_M(DED); } }
-void t11_device::mfps_ix(UINT16 op) { m_icount -= 30; { MFPS_M(IX); } }
-void t11_device::mfps_ixd(UINT16 op) { m_icount -= 36; { MFPS_M(IXD); } }
-
-void t11_device::movb_rg_rg(UINT16 op) { m_icount -= 9+ 3; { MOVB_R(RG,RG); } }
-void t11_device::movb_rg_rgd(UINT16 op) { m_icount -= 9+12; { MOVB_M(RG,RGD); } }
-void t11_device::movb_rg_in(UINT16 op) { m_icount -= 9+12; { MOVB_M(RG,IN); } }
-void t11_device::movb_rg_ind(UINT16 op) { m_icount -= 9+18; { MOVB_M(RG,IND); } }
-void t11_device::movb_rg_de(UINT16 op) { m_icount -= 9+15; { MOVB_M(RG,DE); } }
-void t11_device::movb_rg_ded(UINT16 op) { m_icount -= 9+21; { MOVB_M(RG,DED); } }
-void t11_device::movb_rg_ix(UINT16 op) { m_icount -= 9+21; { MOVB_M(RG,IX); } }
-void t11_device::movb_rg_ixd(UINT16 op) { m_icount -= 9+27; { MOVB_M(RG,IXD); } }
-void t11_device::movb_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { MOVB_X(RGD,RG); } }
-void t11_device::movb_rgd_rgd(UINT16 op) { m_icount -= 15+12; { MOVB_M(RGD,RGD); } }
-void t11_device::movb_rgd_in(UINT16 op) { m_icount -= 15+12; { MOVB_M(RGD,IN); } }
-void t11_device::movb_rgd_ind(UINT16 op) { m_icount -= 15+18; { MOVB_M(RGD,IND); } }
-void t11_device::movb_rgd_de(UINT16 op) { m_icount -= 15+15; { MOVB_M(RGD,DE); } }
-void t11_device::movb_rgd_ded(UINT16 op) { m_icount -= 15+21; { MOVB_M(RGD,DED); } }
-void t11_device::movb_rgd_ix(UINT16 op) { m_icount -= 15+21; { MOVB_M(RGD,IX); } }
-void t11_device::movb_rgd_ixd(UINT16 op) { m_icount -= 15+27; { MOVB_M(RGD,IXD); } }
-void t11_device::movb_in_rg(UINT16 op) { m_icount -= 15+ 3; { MOVB_X(IN,RG); } }
-void t11_device::movb_in_rgd(UINT16 op) { m_icount -= 15+12; { MOVB_M(IN,RGD); } }
-void t11_device::movb_in_in(UINT16 op) { m_icount -= 15+12; { MOVB_M(IN,IN); } }
-void t11_device::movb_in_ind(UINT16 op) { m_icount -= 15+18; { MOVB_M(IN,IND); } }
-void t11_device::movb_in_de(UINT16 op) { m_icount -= 15+15; { MOVB_M(IN,DE); } }
-void t11_device::movb_in_ded(UINT16 op) { m_icount -= 15+21; { MOVB_M(IN,DED); } }
-void t11_device::movb_in_ix(UINT16 op) { m_icount -= 15+21; { MOVB_M(IN,IX); } }
-void t11_device::movb_in_ixd(UINT16 op) { m_icount -= 15+27; { MOVB_M(IN,IXD); } }
-void t11_device::movb_ind_rg(UINT16 op) { m_icount -= 21+ 3; { MOVB_X(IND,RG); } }
-void t11_device::movb_ind_rgd(UINT16 op) { m_icount -= 21+12; { MOVB_M(IND,RGD); } }
-void t11_device::movb_ind_in(UINT16 op) { m_icount -= 21+12; { MOVB_M(IND,IN); } }
-void t11_device::movb_ind_ind(UINT16 op) { m_icount -= 21+18; { MOVB_M(IND,IND); } }
-void t11_device::movb_ind_de(UINT16 op) { m_icount -= 21+15; { MOVB_M(IND,DE); } }
-void t11_device::movb_ind_ded(UINT16 op) { m_icount -= 21+21; { MOVB_M(IND,DED); } }
-void t11_device::movb_ind_ix(UINT16 op) { m_icount -= 21+21; { MOVB_M(IND,IX); } }
-void t11_device::movb_ind_ixd(UINT16 op) { m_icount -= 21+27; { MOVB_M(IND,IXD); } }
-void t11_device::movb_de_rg(UINT16 op) { m_icount -= 18+ 3; { MOVB_X(DE,RG); } }
-void t11_device::movb_de_rgd(UINT16 op) { m_icount -= 18+12; { MOVB_M(DE,RGD); } }
-void t11_device::movb_de_in(UINT16 op) { m_icount -= 18+12; { MOVB_M(DE,IN); } }
-void t11_device::movb_de_ind(UINT16 op) { m_icount -= 18+18; { MOVB_M(DE,IND); } }
-void t11_device::movb_de_de(UINT16 op) { m_icount -= 18+15; { MOVB_M(DE,DE); } }
-void t11_device::movb_de_ded(UINT16 op) { m_icount -= 18+21; { MOVB_M(DE,DED); } }
-void t11_device::movb_de_ix(UINT16 op) { m_icount -= 18+21; { MOVB_M(DE,IX); } }
-void t11_device::movb_de_ixd(UINT16 op) { m_icount -= 18+27; { MOVB_M(DE,IXD); } }
-void t11_device::movb_ded_rg(UINT16 op) { m_icount -= 24+ 3; { MOVB_X(DED,RG); } }
-void t11_device::movb_ded_rgd(UINT16 op) { m_icount -= 24+12; { MOVB_M(DED,RGD); } }
-void t11_device::movb_ded_in(UINT16 op) { m_icount -= 24+12; { MOVB_M(DED,IN); } }
-void t11_device::movb_ded_ind(UINT16 op) { m_icount -= 24+18; { MOVB_M(DED,IND); } }
-void t11_device::movb_ded_de(UINT16 op) { m_icount -= 24+15; { MOVB_M(DED,DE); } }
-void t11_device::movb_ded_ded(UINT16 op) { m_icount -= 24+21; { MOVB_M(DED,DED); } }
-void t11_device::movb_ded_ix(UINT16 op) { m_icount -= 24+21; { MOVB_M(DED,IX); } }
-void t11_device::movb_ded_ixd(UINT16 op) { m_icount -= 24+27; { MOVB_M(DED,IXD); } }
-void t11_device::movb_ix_rg(UINT16 op) { m_icount -= 24+ 3; { MOVB_X(IX,RG); } }
-void t11_device::movb_ix_rgd(UINT16 op) { m_icount -= 24+12; { MOVB_M(IX,RGD); } }
-void t11_device::movb_ix_in(UINT16 op) { m_icount -= 24+12; { MOVB_M(IX,IN); } }
-void t11_device::movb_ix_ind(UINT16 op) { m_icount -= 24+18; { MOVB_M(IX,IND); } }
-void t11_device::movb_ix_de(UINT16 op) { m_icount -= 24+15; { MOVB_M(IX,DE); } }
-void t11_device::movb_ix_ded(UINT16 op) { m_icount -= 24+21; { MOVB_M(IX,DED); } }
-void t11_device::movb_ix_ix(UINT16 op) { m_icount -= 24+21; { MOVB_M(IX,IX); } }
-void t11_device::movb_ix_ixd(UINT16 op) { m_icount -= 24+27; { MOVB_M(IX,IXD); } }
-void t11_device::movb_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { MOVB_X(IXD,RG); } }
-void t11_device::movb_ixd_rgd(UINT16 op) { m_icount -= 30+12; { MOVB_M(IXD,RGD); } }
-void t11_device::movb_ixd_in(UINT16 op) { m_icount -= 30+12; { MOVB_M(IXD,IN); } }
-void t11_device::movb_ixd_ind(UINT16 op) { m_icount -= 30+18; { MOVB_M(IXD,IND); } }
-void t11_device::movb_ixd_de(UINT16 op) { m_icount -= 30+15; { MOVB_M(IXD,DE); } }
-void t11_device::movb_ixd_ded(UINT16 op) { m_icount -= 30+21; { MOVB_M(IXD,DED); } }
-void t11_device::movb_ixd_ix(UINT16 op) { m_icount -= 30+21; { MOVB_M(IXD,IX); } }
-void t11_device::movb_ixd_ixd(UINT16 op) { m_icount -= 30+27; { MOVB_M(IXD,IXD); } }
-
-void t11_device::cmpb_rg_rg(UINT16 op) { m_icount -= 9+ 3; { CMPB_R(RG,RG); } }
-void t11_device::cmpb_rg_rgd(UINT16 op) { m_icount -= 9+ 9; { CMPB_M(RG,RGD); } }
-void t11_device::cmpb_rg_in(UINT16 op) { m_icount -= 9+ 9; { CMPB_M(RG,IN); } }
-void t11_device::cmpb_rg_ind(UINT16 op) { m_icount -= 9+15; { CMPB_M(RG,IND); } }
-void t11_device::cmpb_rg_de(UINT16 op) { m_icount -= 9+12; { CMPB_M(RG,DE); } }
-void t11_device::cmpb_rg_ded(UINT16 op) { m_icount -= 9+18; { CMPB_M(RG,DED); } }
-void t11_device::cmpb_rg_ix(UINT16 op) { m_icount -= 9+18; { CMPB_M(RG,IX); } }
-void t11_device::cmpb_rg_ixd(UINT16 op) { m_icount -= 9+24; { CMPB_M(RG,IXD); } }
-void t11_device::cmpb_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { CMPB_M(RGD,RG); } }
-void t11_device::cmpb_rgd_rgd(UINT16 op) { m_icount -= 15+ 9; { CMPB_M(RGD,RGD); } }
-void t11_device::cmpb_rgd_in(UINT16 op) { m_icount -= 15+ 9; { CMPB_M(RGD,IN); } }
-void t11_device::cmpb_rgd_ind(UINT16 op) { m_icount -= 15+15; { CMPB_M(RGD,IND); } }
-void t11_device::cmpb_rgd_de(UINT16 op) { m_icount -= 15+12; { CMPB_M(RGD,DE); } }
-void t11_device::cmpb_rgd_ded(UINT16 op) { m_icount -= 15+18; { CMPB_M(RGD,DED); } }
-void t11_device::cmpb_rgd_ix(UINT16 op) { m_icount -= 15+18; { CMPB_M(RGD,IX); } }
-void t11_device::cmpb_rgd_ixd(UINT16 op) { m_icount -= 15+24; { CMPB_M(RGD,IXD); } }
-void t11_device::cmpb_in_rg(UINT16 op) { m_icount -= 15+ 3; { CMPB_M(IN,RG); } }
-void t11_device::cmpb_in_rgd(UINT16 op) { m_icount -= 15+ 9; { CMPB_M(IN,RGD); } }
-void t11_device::cmpb_in_in(UINT16 op) { m_icount -= 15+ 9; { CMPB_M(IN,IN); } }
-void t11_device::cmpb_in_ind(UINT16 op) { m_icount -= 15+15; { CMPB_M(IN,IND); } }
-void t11_device::cmpb_in_de(UINT16 op) { m_icount -= 15+12; { CMPB_M(IN,DE); } }
-void t11_device::cmpb_in_ded(UINT16 op) { m_icount -= 15+18; { CMPB_M(IN,DED); } }
-void t11_device::cmpb_in_ix(UINT16 op) { m_icount -= 15+18; { CMPB_M(IN,IX); } }
-void t11_device::cmpb_in_ixd(UINT16 op) { m_icount -= 15+24; { CMPB_M(IN,IXD); } }
-void t11_device::cmpb_ind_rg(UINT16 op) { m_icount -= 21+ 3; { CMPB_M(IND,RG); } }
-void t11_device::cmpb_ind_rgd(UINT16 op) { m_icount -= 21+ 9; { CMPB_M(IND,RGD); } }
-void t11_device::cmpb_ind_in(UINT16 op) { m_icount -= 21+ 9; { CMPB_M(IND,IN); } }
-void t11_device::cmpb_ind_ind(UINT16 op) { m_icount -= 21+15; { CMPB_M(IND,IND); } }
-void t11_device::cmpb_ind_de(UINT16 op) { m_icount -= 21+12; { CMPB_M(IND,DE); } }
-void t11_device::cmpb_ind_ded(UINT16 op) { m_icount -= 21+18; { CMPB_M(IND,DED); } }
-void t11_device::cmpb_ind_ix(UINT16 op) { m_icount -= 21+18; { CMPB_M(IND,IX); } }
-void t11_device::cmpb_ind_ixd(UINT16 op) { m_icount -= 21+24; { CMPB_M(IND,IXD); } }
-void t11_device::cmpb_de_rg(UINT16 op) { m_icount -= 18+ 3; { CMPB_M(DE,RG); } }
-void t11_device::cmpb_de_rgd(UINT16 op) { m_icount -= 18+ 9; { CMPB_M(DE,RGD); } }
-void t11_device::cmpb_de_in(UINT16 op) { m_icount -= 18+ 9; { CMPB_M(DE,IN); } }
-void t11_device::cmpb_de_ind(UINT16 op) { m_icount -= 18+15; { CMPB_M(DE,IND); } }
-void t11_device::cmpb_de_de(UINT16 op) { m_icount -= 18+12; { CMPB_M(DE,DE); } }
-void t11_device::cmpb_de_ded(UINT16 op) { m_icount -= 18+18; { CMPB_M(DE,DED); } }
-void t11_device::cmpb_de_ix(UINT16 op) { m_icount -= 18+18; { CMPB_M(DE,IX); } }
-void t11_device::cmpb_de_ixd(UINT16 op) { m_icount -= 18+24; { CMPB_M(DE,IXD); } }
-void t11_device::cmpb_ded_rg(UINT16 op) { m_icount -= 24+ 3; { CMPB_M(DED,RG); } }
-void t11_device::cmpb_ded_rgd(UINT16 op) { m_icount -= 24+ 9; { CMPB_M(DED,RGD); } }
-void t11_device::cmpb_ded_in(UINT16 op) { m_icount -= 24+ 9; { CMPB_M(DED,IN); } }
-void t11_device::cmpb_ded_ind(UINT16 op) { m_icount -= 24+15; { CMPB_M(DED,IND); } }
-void t11_device::cmpb_ded_de(UINT16 op) { m_icount -= 24+12; { CMPB_M(DED,DE); } }
-void t11_device::cmpb_ded_ded(UINT16 op) { m_icount -= 24+18; { CMPB_M(DED,DED); } }
-void t11_device::cmpb_ded_ix(UINT16 op) { m_icount -= 24+18; { CMPB_M(DED,IX); } }
-void t11_device::cmpb_ded_ixd(UINT16 op) { m_icount -= 24+24; { CMPB_M(DED,IXD); } }
-void t11_device::cmpb_ix_rg(UINT16 op) { m_icount -= 24+ 3; { CMPB_M(IX,RG); } }
-void t11_device::cmpb_ix_rgd(UINT16 op) { m_icount -= 24+ 9; { CMPB_M(IX,RGD); } }
-void t11_device::cmpb_ix_in(UINT16 op) { m_icount -= 24+ 9; { CMPB_M(IX,IN); } }
-void t11_device::cmpb_ix_ind(UINT16 op) { m_icount -= 24+15; { CMPB_M(IX,IND); } }
-void t11_device::cmpb_ix_de(UINT16 op) { m_icount -= 24+12; { CMPB_M(IX,DE); } }
-void t11_device::cmpb_ix_ded(UINT16 op) { m_icount -= 24+18; { CMPB_M(IX,DED); } }
-void t11_device::cmpb_ix_ix(UINT16 op) { m_icount -= 24+18; { CMPB_M(IX,IX); } }
-void t11_device::cmpb_ix_ixd(UINT16 op) { m_icount -= 24+24; { CMPB_M(IX,IXD); } }
-void t11_device::cmpb_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { CMPB_M(IXD,RG); } }
-void t11_device::cmpb_ixd_rgd(UINT16 op) { m_icount -= 30+ 9; { CMPB_M(IXD,RGD); } }
-void t11_device::cmpb_ixd_in(UINT16 op) { m_icount -= 30+ 9; { CMPB_M(IXD,IN); } }
-void t11_device::cmpb_ixd_ind(UINT16 op) { m_icount -= 30+15; { CMPB_M(IXD,IND); } }
-void t11_device::cmpb_ixd_de(UINT16 op) { m_icount -= 30+12; { CMPB_M(IXD,DE); } }
-void t11_device::cmpb_ixd_ded(UINT16 op) { m_icount -= 30+18; { CMPB_M(IXD,DED); } }
-void t11_device::cmpb_ixd_ix(UINT16 op) { m_icount -= 30+18; { CMPB_M(IXD,IX); } }
-void t11_device::cmpb_ixd_ixd(UINT16 op) { m_icount -= 30+24; { CMPB_M(IXD,IXD); } }
-
-void t11_device::bitb_rg_rg(UINT16 op) { m_icount -= 9+ 3; { BITB_R(RG,RG); } }
-void t11_device::bitb_rg_rgd(UINT16 op) { m_icount -= 9+ 9; { BITB_M(RG,RGD); } }
-void t11_device::bitb_rg_in(UINT16 op) { m_icount -= 9+ 9; { BITB_M(RG,IN); } }
-void t11_device::bitb_rg_ind(UINT16 op) { m_icount -= 9+15; { BITB_M(RG,IND); } }
-void t11_device::bitb_rg_de(UINT16 op) { m_icount -= 9+12; { BITB_M(RG,DE); } }
-void t11_device::bitb_rg_ded(UINT16 op) { m_icount -= 9+18; { BITB_M(RG,DED); } }
-void t11_device::bitb_rg_ix(UINT16 op) { m_icount -= 9+18; { BITB_M(RG,IX); } }
-void t11_device::bitb_rg_ixd(UINT16 op) { m_icount -= 9+24; { BITB_M(RG,IXD); } }
-void t11_device::bitb_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { BITB_M(RGD,RG); } }
-void t11_device::bitb_rgd_rgd(UINT16 op) { m_icount -= 15+ 9; { BITB_M(RGD,RGD); } }
-void t11_device::bitb_rgd_in(UINT16 op) { m_icount -= 15+ 9; { BITB_M(RGD,IN); } }
-void t11_device::bitb_rgd_ind(UINT16 op) { m_icount -= 15+15; { BITB_M(RGD,IND); } }
-void t11_device::bitb_rgd_de(UINT16 op) { m_icount -= 15+12; { BITB_M(RGD,DE); } }
-void t11_device::bitb_rgd_ded(UINT16 op) { m_icount -= 15+18; { BITB_M(RGD,DED); } }
-void t11_device::bitb_rgd_ix(UINT16 op) { m_icount -= 15+18; { BITB_M(RGD,IX); } }
-void t11_device::bitb_rgd_ixd(UINT16 op) { m_icount -= 15+24; { BITB_M(RGD,IXD); } }
-void t11_device::bitb_in_rg(UINT16 op) { m_icount -= 15+ 3; { BITB_M(IN,RG); } }
-void t11_device::bitb_in_rgd(UINT16 op) { m_icount -= 15+ 9; { BITB_M(IN,RGD); } }
-void t11_device::bitb_in_in(UINT16 op) { m_icount -= 15+ 9; { BITB_M(IN,IN); } }
-void t11_device::bitb_in_ind(UINT16 op) { m_icount -= 15+15; { BITB_M(IN,IND); } }
-void t11_device::bitb_in_de(UINT16 op) { m_icount -= 15+12; { BITB_M(IN,DE); } }
-void t11_device::bitb_in_ded(UINT16 op) { m_icount -= 15+18; { BITB_M(IN,DED); } }
-void t11_device::bitb_in_ix(UINT16 op) { m_icount -= 15+18; { BITB_M(IN,IX); } }
-void t11_device::bitb_in_ixd(UINT16 op) { m_icount -= 15+24; { BITB_M(IN,IXD); } }
-void t11_device::bitb_ind_rg(UINT16 op) { m_icount -= 21+ 3; { BITB_M(IND,RG); } }
-void t11_device::bitb_ind_rgd(UINT16 op) { m_icount -= 21+ 9; { BITB_M(IND,RGD); } }
-void t11_device::bitb_ind_in(UINT16 op) { m_icount -= 21+ 9; { BITB_M(IND,IN); } }
-void t11_device::bitb_ind_ind(UINT16 op) { m_icount -= 21+15; { BITB_M(IND,IND); } }
-void t11_device::bitb_ind_de(UINT16 op) { m_icount -= 21+12; { BITB_M(IND,DE); } }
-void t11_device::bitb_ind_ded(UINT16 op) { m_icount -= 21+18; { BITB_M(IND,DED); } }
-void t11_device::bitb_ind_ix(UINT16 op) { m_icount -= 21+18; { BITB_M(IND,IX); } }
-void t11_device::bitb_ind_ixd(UINT16 op) { m_icount -= 21+24; { BITB_M(IND,IXD); } }
-void t11_device::bitb_de_rg(UINT16 op) { m_icount -= 18+ 3; { BITB_M(DE,RG); } }
-void t11_device::bitb_de_rgd(UINT16 op) { m_icount -= 18+ 9; { BITB_M(DE,RGD); } }
-void t11_device::bitb_de_in(UINT16 op) { m_icount -= 18+ 9; { BITB_M(DE,IN); } }
-void t11_device::bitb_de_ind(UINT16 op) { m_icount -= 18+15; { BITB_M(DE,IND); } }
-void t11_device::bitb_de_de(UINT16 op) { m_icount -= 18+12; { BITB_M(DE,DE); } }
-void t11_device::bitb_de_ded(UINT16 op) { m_icount -= 18+18; { BITB_M(DE,DED); } }
-void t11_device::bitb_de_ix(UINT16 op) { m_icount -= 18+18; { BITB_M(DE,IX); } }
-void t11_device::bitb_de_ixd(UINT16 op) { m_icount -= 18+24; { BITB_M(DE,IXD); } }
-void t11_device::bitb_ded_rg(UINT16 op) { m_icount -= 24+ 3; { BITB_M(DED,RG); } }
-void t11_device::bitb_ded_rgd(UINT16 op) { m_icount -= 24+ 9; { BITB_M(DED,RGD); } }
-void t11_device::bitb_ded_in(UINT16 op) { m_icount -= 24+ 9; { BITB_M(DED,IN); } }
-void t11_device::bitb_ded_ind(UINT16 op) { m_icount -= 24+15; { BITB_M(DED,IND); } }
-void t11_device::bitb_ded_de(UINT16 op) { m_icount -= 24+12; { BITB_M(DED,DE); } }
-void t11_device::bitb_ded_ded(UINT16 op) { m_icount -= 24+18; { BITB_M(DED,DED); } }
-void t11_device::bitb_ded_ix(UINT16 op) { m_icount -= 24+18; { BITB_M(DED,IX); } }
-void t11_device::bitb_ded_ixd(UINT16 op) { m_icount -= 24+24; { BITB_M(DED,IXD); } }
-void t11_device::bitb_ix_rg(UINT16 op) { m_icount -= 24+ 3; { BITB_M(IX,RG); } }
-void t11_device::bitb_ix_rgd(UINT16 op) { m_icount -= 24+ 9; { BITB_M(IX,RGD); } }
-void t11_device::bitb_ix_in(UINT16 op) { m_icount -= 24+ 9; { BITB_M(IX,IN); } }
-void t11_device::bitb_ix_ind(UINT16 op) { m_icount -= 24+15; { BITB_M(IX,IND); } }
-void t11_device::bitb_ix_de(UINT16 op) { m_icount -= 24+12; { BITB_M(IX,DE); } }
-void t11_device::bitb_ix_ded(UINT16 op) { m_icount -= 24+18; { BITB_M(IX,DED); } }
-void t11_device::bitb_ix_ix(UINT16 op) { m_icount -= 24+18; { BITB_M(IX,IX); } }
-void t11_device::bitb_ix_ixd(UINT16 op) { m_icount -= 24+24; { BITB_M(IX,IXD); } }
-void t11_device::bitb_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { BITB_M(IXD,RG); } }
-void t11_device::bitb_ixd_rgd(UINT16 op) { m_icount -= 30+ 9; { BITB_M(IXD,RGD); } }
-void t11_device::bitb_ixd_in(UINT16 op) { m_icount -= 30+ 9; { BITB_M(IXD,IN); } }
-void t11_device::bitb_ixd_ind(UINT16 op) { m_icount -= 30+15; { BITB_M(IXD,IND); } }
-void t11_device::bitb_ixd_de(UINT16 op) { m_icount -= 30+12; { BITB_M(IXD,DE); } }
-void t11_device::bitb_ixd_ded(UINT16 op) { m_icount -= 30+18; { BITB_M(IXD,DED); } }
-void t11_device::bitb_ixd_ix(UINT16 op) { m_icount -= 30+18; { BITB_M(IXD,IX); } }
-void t11_device::bitb_ixd_ixd(UINT16 op) { m_icount -= 30+24; { BITB_M(IXD,IXD); } }
-
-void t11_device::bicb_rg_rg(UINT16 op) { m_icount -= 9+ 3; { BICB_R(RG,RG); } }
-void t11_device::bicb_rg_rgd(UINT16 op) { m_icount -= 9+12; { BICB_M(RG,RGD); } }
-void t11_device::bicb_rg_in(UINT16 op) { m_icount -= 9+12; { BICB_M(RG,IN); } }
-void t11_device::bicb_rg_ind(UINT16 op) { m_icount -= 9+18; { BICB_M(RG,IND); } }
-void t11_device::bicb_rg_de(UINT16 op) { m_icount -= 9+15; { BICB_M(RG,DE); } }
-void t11_device::bicb_rg_ded(UINT16 op) { m_icount -= 9+21; { BICB_M(RG,DED); } }
-void t11_device::bicb_rg_ix(UINT16 op) { m_icount -= 9+21; { BICB_M(RG,IX); } }
-void t11_device::bicb_rg_ixd(UINT16 op) { m_icount -= 9+27; { BICB_M(RG,IXD); } }
-void t11_device::bicb_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { BICB_X(RGD,RG); } }
-void t11_device::bicb_rgd_rgd(UINT16 op) { m_icount -= 15+12; { BICB_M(RGD,RGD); } }
-void t11_device::bicb_rgd_in(UINT16 op) { m_icount -= 15+12; { BICB_M(RGD,IN); } }
-void t11_device::bicb_rgd_ind(UINT16 op) { m_icount -= 15+18; { BICB_M(RGD,IND); } }
-void t11_device::bicb_rgd_de(UINT16 op) { m_icount -= 15+15; { BICB_M(RGD,DE); } }
-void t11_device::bicb_rgd_ded(UINT16 op) { m_icount -= 15+21; { BICB_M(RGD,DED); } }
-void t11_device::bicb_rgd_ix(UINT16 op) { m_icount -= 15+21; { BICB_M(RGD,IX); } }
-void t11_device::bicb_rgd_ixd(UINT16 op) { m_icount -= 15+27; { BICB_M(RGD,IXD); } }
-void t11_device::bicb_in_rg(UINT16 op) { m_icount -= 15+ 3; { BICB_X(IN,RG); } }
-void t11_device::bicb_in_rgd(UINT16 op) { m_icount -= 15+12; { BICB_M(IN,RGD); } }
-void t11_device::bicb_in_in(UINT16 op) { m_icount -= 15+12; { BICB_M(IN,IN); } }
-void t11_device::bicb_in_ind(UINT16 op) { m_icount -= 15+18; { BICB_M(IN,IND); } }
-void t11_device::bicb_in_de(UINT16 op) { m_icount -= 15+15; { BICB_M(IN,DE); } }
-void t11_device::bicb_in_ded(UINT16 op) { m_icount -= 15+21; { BICB_M(IN,DED); } }
-void t11_device::bicb_in_ix(UINT16 op) { m_icount -= 15+21; { BICB_M(IN,IX); } }
-void t11_device::bicb_in_ixd(UINT16 op) { m_icount -= 15+27; { BICB_M(IN,IXD); } }
-void t11_device::bicb_ind_rg(UINT16 op) { m_icount -= 21+ 3; { BICB_X(IND,RG); } }
-void t11_device::bicb_ind_rgd(UINT16 op) { m_icount -= 21+12; { BICB_M(IND,RGD); } }
-void t11_device::bicb_ind_in(UINT16 op) { m_icount -= 21+12; { BICB_M(IND,IN); } }
-void t11_device::bicb_ind_ind(UINT16 op) { m_icount -= 21+18; { BICB_M(IND,IND); } }
-void t11_device::bicb_ind_de(UINT16 op) { m_icount -= 21+15; { BICB_M(IND,DE); } }
-void t11_device::bicb_ind_ded(UINT16 op) { m_icount -= 21+21; { BICB_M(IND,DED); } }
-void t11_device::bicb_ind_ix(UINT16 op) { m_icount -= 21+21; { BICB_M(IND,IX); } }
-void t11_device::bicb_ind_ixd(UINT16 op) { m_icount -= 21+27; { BICB_M(IND,IXD); } }
-void t11_device::bicb_de_rg(UINT16 op) { m_icount -= 18+ 3; { BICB_X(DE,RG); } }
-void t11_device::bicb_de_rgd(UINT16 op) { m_icount -= 18+12; { BICB_M(DE,RGD); } }
-void t11_device::bicb_de_in(UINT16 op) { m_icount -= 18+12; { BICB_M(DE,IN); } }
-void t11_device::bicb_de_ind(UINT16 op) { m_icount -= 18+18; { BICB_M(DE,IND); } }
-void t11_device::bicb_de_de(UINT16 op) { m_icount -= 18+15; { BICB_M(DE,DE); } }
-void t11_device::bicb_de_ded(UINT16 op) { m_icount -= 18+21; { BICB_M(DE,DED); } }
-void t11_device::bicb_de_ix(UINT16 op) { m_icount -= 18+21; { BICB_M(DE,IX); } }
-void t11_device::bicb_de_ixd(UINT16 op) { m_icount -= 18+27; { BICB_M(DE,IXD); } }
-void t11_device::bicb_ded_rg(UINT16 op) { m_icount -= 24+ 3; { BICB_X(DED,RG); } }
-void t11_device::bicb_ded_rgd(UINT16 op) { m_icount -= 24+12; { BICB_M(DED,RGD); } }
-void t11_device::bicb_ded_in(UINT16 op) { m_icount -= 24+12; { BICB_M(DED,IN); } }
-void t11_device::bicb_ded_ind(UINT16 op) { m_icount -= 24+18; { BICB_M(DED,IND); } }
-void t11_device::bicb_ded_de(UINT16 op) { m_icount -= 24+15; { BICB_M(DED,DE); } }
-void t11_device::bicb_ded_ded(UINT16 op) { m_icount -= 24+21; { BICB_M(DED,DED); } }
-void t11_device::bicb_ded_ix(UINT16 op) { m_icount -= 24+21; { BICB_M(DED,IX); } }
-void t11_device::bicb_ded_ixd(UINT16 op) { m_icount -= 24+27; { BICB_M(DED,IXD); } }
-void t11_device::bicb_ix_rg(UINT16 op) { m_icount -= 24+ 3; { BICB_X(IX,RG); } }
-void t11_device::bicb_ix_rgd(UINT16 op) { m_icount -= 24+12; { BICB_M(IX,RGD); } }
-void t11_device::bicb_ix_in(UINT16 op) { m_icount -= 24+12; { BICB_M(IX,IN); } }
-void t11_device::bicb_ix_ind(UINT16 op) { m_icount -= 24+18; { BICB_M(IX,IND); } }
-void t11_device::bicb_ix_de(UINT16 op) { m_icount -= 24+15; { BICB_M(IX,DE); } }
-void t11_device::bicb_ix_ded(UINT16 op) { m_icount -= 24+21; { BICB_M(IX,DED); } }
-void t11_device::bicb_ix_ix(UINT16 op) { m_icount -= 24+21; { BICB_M(IX,IX); } }
-void t11_device::bicb_ix_ixd(UINT16 op) { m_icount -= 24+27; { BICB_M(IX,IXD); } }
-void t11_device::bicb_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { BICB_X(IXD,RG); } }
-void t11_device::bicb_ixd_rgd(UINT16 op) { m_icount -= 30+12; { BICB_M(IXD,RGD); } }
-void t11_device::bicb_ixd_in(UINT16 op) { m_icount -= 30+12; { BICB_M(IXD,IN); } }
-void t11_device::bicb_ixd_ind(UINT16 op) { m_icount -= 30+18; { BICB_M(IXD,IND); } }
-void t11_device::bicb_ixd_de(UINT16 op) { m_icount -= 30+15; { BICB_M(IXD,DE); } }
-void t11_device::bicb_ixd_ded(UINT16 op) { m_icount -= 30+21; { BICB_M(IXD,DED); } }
-void t11_device::bicb_ixd_ix(UINT16 op) { m_icount -= 30+21; { BICB_M(IXD,IX); } }
-void t11_device::bicb_ixd_ixd(UINT16 op) { m_icount -= 30+27; { BICB_M(IXD,IXD); } }
-
-void t11_device::bisb_rg_rg(UINT16 op) { m_icount -= 9+ 3; { BISB_R(RG,RG); } }
-void t11_device::bisb_rg_rgd(UINT16 op) { m_icount -= 9+12; { BISB_M(RG,RGD); } }
-void t11_device::bisb_rg_in(UINT16 op) { m_icount -= 9+12; { BISB_M(RG,IN); } }
-void t11_device::bisb_rg_ind(UINT16 op) { m_icount -= 9+18; { BISB_M(RG,IND); } }
-void t11_device::bisb_rg_de(UINT16 op) { m_icount -= 9+15; { BISB_M(RG,DE); } }
-void t11_device::bisb_rg_ded(UINT16 op) { m_icount -= 9+21; { BISB_M(RG,DED); } }
-void t11_device::bisb_rg_ix(UINT16 op) { m_icount -= 9+21; { BISB_M(RG,IX); } }
-void t11_device::bisb_rg_ixd(UINT16 op) { m_icount -= 9+27; { BISB_M(RG,IXD); } }
-void t11_device::bisb_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { BISB_X(RGD,RG); } }
-void t11_device::bisb_rgd_rgd(UINT16 op) { m_icount -= 15+12; { BISB_M(RGD,RGD); } }
-void t11_device::bisb_rgd_in(UINT16 op) { m_icount -= 15+12; { BISB_M(RGD,IN); } }
-void t11_device::bisb_rgd_ind(UINT16 op) { m_icount -= 15+18; { BISB_M(RGD,IND); } }
-void t11_device::bisb_rgd_de(UINT16 op) { m_icount -= 15+15; { BISB_M(RGD,DE); } }
-void t11_device::bisb_rgd_ded(UINT16 op) { m_icount -= 15+21; { BISB_M(RGD,DED); } }
-void t11_device::bisb_rgd_ix(UINT16 op) { m_icount -= 15+21; { BISB_M(RGD,IX); } }
-void t11_device::bisb_rgd_ixd(UINT16 op) { m_icount -= 15+27; { BISB_M(RGD,IXD); } }
-void t11_device::bisb_in_rg(UINT16 op) { m_icount -= 15+ 3; { BISB_X(IN,RG); } }
-void t11_device::bisb_in_rgd(UINT16 op) { m_icount -= 15+12; { BISB_M(IN,RGD); } }
-void t11_device::bisb_in_in(UINT16 op) { m_icount -= 15+12; { BISB_M(IN,IN); } }
-void t11_device::bisb_in_ind(UINT16 op) { m_icount -= 15+18; { BISB_M(IN,IND); } }
-void t11_device::bisb_in_de(UINT16 op) { m_icount -= 15+15; { BISB_M(IN,DE); } }
-void t11_device::bisb_in_ded(UINT16 op) { m_icount -= 15+21; { BISB_M(IN,DED); } }
-void t11_device::bisb_in_ix(UINT16 op) { m_icount -= 15+21; { BISB_M(IN,IX); } }
-void t11_device::bisb_in_ixd(UINT16 op) { m_icount -= 15+27; { BISB_M(IN,IXD); } }
-void t11_device::bisb_ind_rg(UINT16 op) { m_icount -= 21+ 3; { BISB_X(IND,RG); } }
-void t11_device::bisb_ind_rgd(UINT16 op) { m_icount -= 21+12; { BISB_M(IND,RGD); } }
-void t11_device::bisb_ind_in(UINT16 op) { m_icount -= 21+12; { BISB_M(IND,IN); } }
-void t11_device::bisb_ind_ind(UINT16 op) { m_icount -= 21+18; { BISB_M(IND,IND); } }
-void t11_device::bisb_ind_de(UINT16 op) { m_icount -= 21+15; { BISB_M(IND,DE); } }
-void t11_device::bisb_ind_ded(UINT16 op) { m_icount -= 21+21; { BISB_M(IND,DED); } }
-void t11_device::bisb_ind_ix(UINT16 op) { m_icount -= 21+21; { BISB_M(IND,IX); } }
-void t11_device::bisb_ind_ixd(UINT16 op) { m_icount -= 21+27; { BISB_M(IND,IXD); } }
-void t11_device::bisb_de_rg(UINT16 op) { m_icount -= 18+ 3; { BISB_X(DE,RG); } }
-void t11_device::bisb_de_rgd(UINT16 op) { m_icount -= 18+12; { BISB_M(DE,RGD); } }
-void t11_device::bisb_de_in(UINT16 op) { m_icount -= 18+12; { BISB_M(DE,IN); } }
-void t11_device::bisb_de_ind(UINT16 op) { m_icount -= 18+18; { BISB_M(DE,IND); } }
-void t11_device::bisb_de_de(UINT16 op) { m_icount -= 18+15; { BISB_M(DE,DE); } }
-void t11_device::bisb_de_ded(UINT16 op) { m_icount -= 18+21; { BISB_M(DE,DED); } }
-void t11_device::bisb_de_ix(UINT16 op) { m_icount -= 18+21; { BISB_M(DE,IX); } }
-void t11_device::bisb_de_ixd(UINT16 op) { m_icount -= 18+27; { BISB_M(DE,IXD); } }
-void t11_device::bisb_ded_rg(UINT16 op) { m_icount -= 24+ 3; { BISB_X(DED,RG); } }
-void t11_device::bisb_ded_rgd(UINT16 op) { m_icount -= 24+12; { BISB_M(DED,RGD); } }
-void t11_device::bisb_ded_in(UINT16 op) { m_icount -= 24+12; { BISB_M(DED,IN); } }
-void t11_device::bisb_ded_ind(UINT16 op) { m_icount -= 24+18; { BISB_M(DED,IND); } }
-void t11_device::bisb_ded_de(UINT16 op) { m_icount -= 24+15; { BISB_M(DED,DE); } }
-void t11_device::bisb_ded_ded(UINT16 op) { m_icount -= 24+21; { BISB_M(DED,DED); } }
-void t11_device::bisb_ded_ix(UINT16 op) { m_icount -= 24+21; { BISB_M(DED,IX); } }
-void t11_device::bisb_ded_ixd(UINT16 op) { m_icount -= 24+27; { BISB_M(DED,IXD); } }
-void t11_device::bisb_ix_rg(UINT16 op) { m_icount -= 24+ 3; { BISB_X(IX,RG); } }
-void t11_device::bisb_ix_rgd(UINT16 op) { m_icount -= 24+12; { BISB_M(IX,RGD); } }
-void t11_device::bisb_ix_in(UINT16 op) { m_icount -= 24+12; { BISB_M(IX,IN); } }
-void t11_device::bisb_ix_ind(UINT16 op) { m_icount -= 24+18; { BISB_M(IX,IND); } }
-void t11_device::bisb_ix_de(UINT16 op) { m_icount -= 24+15; { BISB_M(IX,DE); } }
-void t11_device::bisb_ix_ded(UINT16 op) { m_icount -= 24+21; { BISB_M(IX,DED); } }
-void t11_device::bisb_ix_ix(UINT16 op) { m_icount -= 24+21; { BISB_M(IX,IX); } }
-void t11_device::bisb_ix_ixd(UINT16 op) { m_icount -= 24+27; { BISB_M(IX,IXD); } }
-void t11_device::bisb_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { BISB_X(IXD,RG); } }
-void t11_device::bisb_ixd_rgd(UINT16 op) { m_icount -= 30+12; { BISB_M(IXD,RGD); } }
-void t11_device::bisb_ixd_in(UINT16 op) { m_icount -= 30+12; { BISB_M(IXD,IN); } }
-void t11_device::bisb_ixd_ind(UINT16 op) { m_icount -= 30+18; { BISB_M(IXD,IND); } }
-void t11_device::bisb_ixd_de(UINT16 op) { m_icount -= 30+15; { BISB_M(IXD,DE); } }
-void t11_device::bisb_ixd_ded(UINT16 op) { m_icount -= 30+21; { BISB_M(IXD,DED); } }
-void t11_device::bisb_ixd_ix(UINT16 op) { m_icount -= 30+21; { BISB_M(IXD,IX); } }
-void t11_device::bisb_ixd_ixd(UINT16 op) { m_icount -= 30+27; { BISB_M(IXD,IXD); } }
-
-void t11_device::sub_rg_rg(UINT16 op) { m_icount -= 9+ 3; { SUB_R(RG,RG); } }
-void t11_device::sub_rg_rgd(UINT16 op) { m_icount -= 9+12; { SUB_M(RG,RGD); } }
-void t11_device::sub_rg_in(UINT16 op) { m_icount -= 9+12; { SUB_M(RG,IN); } }
-void t11_device::sub_rg_ind(UINT16 op) { m_icount -= 9+18; { SUB_M(RG,IND); } }
-void t11_device::sub_rg_de(UINT16 op) { m_icount -= 9+15; { SUB_M(RG,DE); } }
-void t11_device::sub_rg_ded(UINT16 op) { m_icount -= 9+21; { SUB_M(RG,DED); } }
-void t11_device::sub_rg_ix(UINT16 op) { m_icount -= 9+21; { SUB_M(RG,IX); } }
-void t11_device::sub_rg_ixd(UINT16 op) { m_icount -= 9+27; { SUB_M(RG,IXD); } }
-void t11_device::sub_rgd_rg(UINT16 op) { m_icount -= 15+ 3; { SUB_X(RGD,RG); } }
-void t11_device::sub_rgd_rgd(UINT16 op) { m_icount -= 15+12; { SUB_M(RGD,RGD); } }
-void t11_device::sub_rgd_in(UINT16 op) { m_icount -= 15+12; { SUB_M(RGD,IN); } }
-void t11_device::sub_rgd_ind(UINT16 op) { m_icount -= 15+18; { SUB_M(RGD,IND); } }
-void t11_device::sub_rgd_de(UINT16 op) { m_icount -= 15+15; { SUB_M(RGD,DE); } }
-void t11_device::sub_rgd_ded(UINT16 op) { m_icount -= 15+21; { SUB_M(RGD,DED); } }
-void t11_device::sub_rgd_ix(UINT16 op) { m_icount -= 15+21; { SUB_M(RGD,IX); } }
-void t11_device::sub_rgd_ixd(UINT16 op) { m_icount -= 15+27; { SUB_M(RGD,IXD); } }
-void t11_device::sub_in_rg(UINT16 op) { m_icount -= 15+ 3; { SUB_X(IN,RG); } }
-void t11_device::sub_in_rgd(UINT16 op) { m_icount -= 15+12; { SUB_M(IN,RGD); } }
-void t11_device::sub_in_in(UINT16 op) { m_icount -= 15+12; { SUB_M(IN,IN); } }
-void t11_device::sub_in_ind(UINT16 op) { m_icount -= 15+18; { SUB_M(IN,IND); } }
-void t11_device::sub_in_de(UINT16 op) { m_icount -= 15+15; { SUB_M(IN,DE); } }
-void t11_device::sub_in_ded(UINT16 op) { m_icount -= 15+21; { SUB_M(IN,DED); } }
-void t11_device::sub_in_ix(UINT16 op) { m_icount -= 15+21; { SUB_M(IN,IX); } }
-void t11_device::sub_in_ixd(UINT16 op) { m_icount -= 15+27; { SUB_M(IN,IXD); } }
-void t11_device::sub_ind_rg(UINT16 op) { m_icount -= 21+ 3; { SUB_X(IND,RG); } }
-void t11_device::sub_ind_rgd(UINT16 op) { m_icount -= 21+12; { SUB_M(IND,RGD); } }
-void t11_device::sub_ind_in(UINT16 op) { m_icount -= 21+12; { SUB_M(IND,IN); } }
-void t11_device::sub_ind_ind(UINT16 op) { m_icount -= 21+18; { SUB_M(IND,IND); } }
-void t11_device::sub_ind_de(UINT16 op) { m_icount -= 21+15; { SUB_M(IND,DE); } }
-void t11_device::sub_ind_ded(UINT16 op) { m_icount -= 21+21; { SUB_M(IND,DED); } }
-void t11_device::sub_ind_ix(UINT16 op) { m_icount -= 21+21; { SUB_M(IND,IX); } }
-void t11_device::sub_ind_ixd(UINT16 op) { m_icount -= 21+27; { SUB_M(IND,IXD); } }
-void t11_device::sub_de_rg(UINT16 op) { m_icount -= 18+ 3; { SUB_X(DE,RG); } }
-void t11_device::sub_de_rgd(UINT16 op) { m_icount -= 18+12; { SUB_M(DE,RGD); } }
-void t11_device::sub_de_in(UINT16 op) { m_icount -= 18+12; { SUB_M(DE,IN); } }
-void t11_device::sub_de_ind(UINT16 op) { m_icount -= 18+18; { SUB_M(DE,IND); } }
-void t11_device::sub_de_de(UINT16 op) { m_icount -= 18+15; { SUB_M(DE,DE); } }
-void t11_device::sub_de_ded(UINT16 op) { m_icount -= 18+21; { SUB_M(DE,DED); } }
-void t11_device::sub_de_ix(UINT16 op) { m_icount -= 18+21; { SUB_M(DE,IX); } }
-void t11_device::sub_de_ixd(UINT16 op) { m_icount -= 18+27; { SUB_M(DE,IXD); } }
-void t11_device::sub_ded_rg(UINT16 op) { m_icount -= 24+ 3; { SUB_X(DED,RG); } }
-void t11_device::sub_ded_rgd(UINT16 op) { m_icount -= 24+12; { SUB_M(DED,RGD); } }
-void t11_device::sub_ded_in(UINT16 op) { m_icount -= 24+12; { SUB_M(DED,IN); } }
-void t11_device::sub_ded_ind(UINT16 op) { m_icount -= 24+18; { SUB_M(DED,IND); } }
-void t11_device::sub_ded_de(UINT16 op) { m_icount -= 24+15; { SUB_M(DED,DE); } }
-void t11_device::sub_ded_ded(UINT16 op) { m_icount -= 24+21; { SUB_M(DED,DED); } }
-void t11_device::sub_ded_ix(UINT16 op) { m_icount -= 24+21; { SUB_M(DED,IX); } }
-void t11_device::sub_ded_ixd(UINT16 op) { m_icount -= 24+27; { SUB_M(DED,IXD); } }
-void t11_device::sub_ix_rg(UINT16 op) { m_icount -= 24+ 3; { SUB_X(IX,RG); } }
-void t11_device::sub_ix_rgd(UINT16 op) { m_icount -= 24+12; { SUB_M(IX,RGD); } }
-void t11_device::sub_ix_in(UINT16 op) { m_icount -= 24+12; { SUB_M(IX,IN); } }
-void t11_device::sub_ix_ind(UINT16 op) { m_icount -= 24+18; { SUB_M(IX,IND); } }
-void t11_device::sub_ix_de(UINT16 op) { m_icount -= 24+15; { SUB_M(IX,DE); } }
-void t11_device::sub_ix_ded(UINT16 op) { m_icount -= 24+21; { SUB_M(IX,DED); } }
-void t11_device::sub_ix_ix(UINT16 op) { m_icount -= 24+21; { SUB_M(IX,IX); } }
-void t11_device::sub_ix_ixd(UINT16 op) { m_icount -= 24+27; { SUB_M(IX,IXD); } }
-void t11_device::sub_ixd_rg(UINT16 op) { m_icount -= 30+ 3; { SUB_X(IXD,RG); } }
-void t11_device::sub_ixd_rgd(UINT16 op) { m_icount -= 30+12; { SUB_M(IXD,RGD); } }
-void t11_device::sub_ixd_in(UINT16 op) { m_icount -= 30+12; { SUB_M(IXD,IN); } }
-void t11_device::sub_ixd_ind(UINT16 op) { m_icount -= 30+18; { SUB_M(IXD,IND); } }
-void t11_device::sub_ixd_de(UINT16 op) { m_icount -= 30+15; { SUB_M(IXD,DE); } }
-void t11_device::sub_ixd_ded(UINT16 op) { m_icount -= 30+21; { SUB_M(IXD,DED); } }
-void t11_device::sub_ixd_ix(UINT16 op) { m_icount -= 30+21; { SUB_M(IXD,IX); } }
-void t11_device::sub_ixd_ixd(UINT16 op) { m_icount -= 30+27; { SUB_M(IXD,IXD); } }
+void t11_device::clrb_rg(uint16_t op) { m_icount -= 12; { CLRB_R(RG); } }
+void t11_device::clrb_rgd(uint16_t op) { m_icount -= 21; { CLRB_M(RGD); } }
+void t11_device::clrb_in(uint16_t op) { m_icount -= 21; { CLRB_M(IN); } }
+void t11_device::clrb_ind(uint16_t op) { m_icount -= 27; { CLRB_M(IND); } }
+void t11_device::clrb_de(uint16_t op) { m_icount -= 24; { CLRB_M(DE); } }
+void t11_device::clrb_ded(uint16_t op) { m_icount -= 30; { CLRB_M(DED); } }
+void t11_device::clrb_ix(uint16_t op) { m_icount -= 30; { CLRB_M(IX); } }
+void t11_device::clrb_ixd(uint16_t op) { m_icount -= 36; { CLRB_M(IXD); } }
+
+void t11_device::comb_rg(uint16_t op) { m_icount -= 12; { COMB_R(RG); } }
+void t11_device::comb_rgd(uint16_t op) { m_icount -= 21; { COMB_M(RGD); } }
+void t11_device::comb_in(uint16_t op) { m_icount -= 21; { COMB_M(IN); } }
+void t11_device::comb_ind(uint16_t op) { m_icount -= 27; { COMB_M(IND); } }
+void t11_device::comb_de(uint16_t op) { m_icount -= 24; { COMB_M(DE); } }
+void t11_device::comb_ded(uint16_t op) { m_icount -= 30; { COMB_M(DED); } }
+void t11_device::comb_ix(uint16_t op) { m_icount -= 30; { COMB_M(IX); } }
+void t11_device::comb_ixd(uint16_t op) { m_icount -= 36; { COMB_M(IXD); } }
+
+void t11_device::incb_rg(uint16_t op) { m_icount -= 12; { INCB_R(RG); } }
+void t11_device::incb_rgd(uint16_t op) { m_icount -= 21; { INCB_M(RGD); } }
+void t11_device::incb_in(uint16_t op) { m_icount -= 21; { INCB_M(IN); } }
+void t11_device::incb_ind(uint16_t op) { m_icount -= 27; { INCB_M(IND); } }
+void t11_device::incb_de(uint16_t op) { m_icount -= 24; { INCB_M(DE); } }
+void t11_device::incb_ded(uint16_t op) { m_icount -= 30; { INCB_M(DED); } }
+void t11_device::incb_ix(uint16_t op) { m_icount -= 30; { INCB_M(IX); } }
+void t11_device::incb_ixd(uint16_t op) { m_icount -= 36; { INCB_M(IXD); } }
+
+void t11_device::decb_rg(uint16_t op) { m_icount -= 12; { DECB_R(RG); } }
+void t11_device::decb_rgd(uint16_t op) { m_icount -= 21; { DECB_M(RGD); } }
+void t11_device::decb_in(uint16_t op) { m_icount -= 21; { DECB_M(IN); } }
+void t11_device::decb_ind(uint16_t op) { m_icount -= 27; { DECB_M(IND); } }
+void t11_device::decb_de(uint16_t op) { m_icount -= 24; { DECB_M(DE); } }
+void t11_device::decb_ded(uint16_t op) { m_icount -= 30; { DECB_M(DED); } }
+void t11_device::decb_ix(uint16_t op) { m_icount -= 30; { DECB_M(IX); } }
+void t11_device::decb_ixd(uint16_t op) { m_icount -= 36; { DECB_M(IXD); } }
+
+void t11_device::negb_rg(uint16_t op) { m_icount -= 12; { NEGB_R(RG); } }
+void t11_device::negb_rgd(uint16_t op) { m_icount -= 21; { NEGB_M(RGD); } }
+void t11_device::negb_in(uint16_t op) { m_icount -= 21; { NEGB_M(IN); } }
+void t11_device::negb_ind(uint16_t op) { m_icount -= 27; { NEGB_M(IND); } }
+void t11_device::negb_de(uint16_t op) { m_icount -= 24; { NEGB_M(DE); } }
+void t11_device::negb_ded(uint16_t op) { m_icount -= 30; { NEGB_M(DED); } }
+void t11_device::negb_ix(uint16_t op) { m_icount -= 30; { NEGB_M(IX); } }
+void t11_device::negb_ixd(uint16_t op) { m_icount -= 36; { NEGB_M(IXD); } }
+
+void t11_device::adcb_rg(uint16_t op) { m_icount -= 12; { ADCB_R(RG); } }
+void t11_device::adcb_rgd(uint16_t op) { m_icount -= 21; { ADCB_M(RGD); } }
+void t11_device::adcb_in(uint16_t op) { m_icount -= 21; { ADCB_M(IN); } }
+void t11_device::adcb_ind(uint16_t op) { m_icount -= 27; { ADCB_M(IND); } }
+void t11_device::adcb_de(uint16_t op) { m_icount -= 24; { ADCB_M(DE); } }
+void t11_device::adcb_ded(uint16_t op) { m_icount -= 30; { ADCB_M(DED); } }
+void t11_device::adcb_ix(uint16_t op) { m_icount -= 30; { ADCB_M(IX); } }
+void t11_device::adcb_ixd(uint16_t op) { m_icount -= 36; { ADCB_M(IXD); } }
+
+void t11_device::sbcb_rg(uint16_t op) { m_icount -= 12; { SBCB_R(RG); } }
+void t11_device::sbcb_rgd(uint16_t op) { m_icount -= 21; { SBCB_M(RGD); } }
+void t11_device::sbcb_in(uint16_t op) { m_icount -= 21; { SBCB_M(IN); } }
+void t11_device::sbcb_ind(uint16_t op) { m_icount -= 27; { SBCB_M(IND); } }
+void t11_device::sbcb_de(uint16_t op) { m_icount -= 24; { SBCB_M(DE); } }
+void t11_device::sbcb_ded(uint16_t op) { m_icount -= 30; { SBCB_M(DED); } }
+void t11_device::sbcb_ix(uint16_t op) { m_icount -= 30; { SBCB_M(IX); } }
+void t11_device::sbcb_ixd(uint16_t op) { m_icount -= 36; { SBCB_M(IXD); } }
+
+void t11_device::tstb_rg(uint16_t op) { m_icount -= 12; { TSTB_R(RG); } }
+void t11_device::tstb_rgd(uint16_t op) { m_icount -= 18; { TSTB_M(RGD); } }
+void t11_device::tstb_in(uint16_t op) { m_icount -= 18; { TSTB_M(IN); } }
+void t11_device::tstb_ind(uint16_t op) { m_icount -= 24; { TSTB_M(IND); } }
+void t11_device::tstb_de(uint16_t op) { m_icount -= 21; { TSTB_M(DE); } }
+void t11_device::tstb_ded(uint16_t op) { m_icount -= 27; { TSTB_M(DED); } }
+void t11_device::tstb_ix(uint16_t op) { m_icount -= 27; { TSTB_M(IX); } }
+void t11_device::tstb_ixd(uint16_t op) { m_icount -= 33; { TSTB_M(IXD); } }
+
+void t11_device::rorb_rg(uint16_t op) { m_icount -= 12; { RORB_R(RG); } }
+void t11_device::rorb_rgd(uint16_t op) { m_icount -= 21; { RORB_M(RGD); } }
+void t11_device::rorb_in(uint16_t op) { m_icount -= 21; { RORB_M(IN); } }
+void t11_device::rorb_ind(uint16_t op) { m_icount -= 27; { RORB_M(IND); } }
+void t11_device::rorb_de(uint16_t op) { m_icount -= 24; { RORB_M(DE); } }
+void t11_device::rorb_ded(uint16_t op) { m_icount -= 30; { RORB_M(DED); } }
+void t11_device::rorb_ix(uint16_t op) { m_icount -= 30; { RORB_M(IX); } }
+void t11_device::rorb_ixd(uint16_t op) { m_icount -= 36; { RORB_M(IXD); } }
+
+void t11_device::rolb_rg(uint16_t op) { m_icount -= 12; { ROLB_R(RG); } }
+void t11_device::rolb_rgd(uint16_t op) { m_icount -= 21; { ROLB_M(RGD); } }
+void t11_device::rolb_in(uint16_t op) { m_icount -= 21; { ROLB_M(IN); } }
+void t11_device::rolb_ind(uint16_t op) { m_icount -= 27; { ROLB_M(IND); } }
+void t11_device::rolb_de(uint16_t op) { m_icount -= 24; { ROLB_M(DE); } }
+void t11_device::rolb_ded(uint16_t op) { m_icount -= 30; { ROLB_M(DED); } }
+void t11_device::rolb_ix(uint16_t op) { m_icount -= 30; { ROLB_M(IX); } }
+void t11_device::rolb_ixd(uint16_t op) { m_icount -= 36; { ROLB_M(IXD); } }
+
+void t11_device::asrb_rg(uint16_t op) { m_icount -= 12; { ASRB_R(RG); } }
+void t11_device::asrb_rgd(uint16_t op) { m_icount -= 21; { ASRB_M(RGD); } }
+void t11_device::asrb_in(uint16_t op) { m_icount -= 21; { ASRB_M(IN); } }
+void t11_device::asrb_ind(uint16_t op) { m_icount -= 27; { ASRB_M(IND); } }
+void t11_device::asrb_de(uint16_t op) { m_icount -= 24; { ASRB_M(DE); } }
+void t11_device::asrb_ded(uint16_t op) { m_icount -= 30; { ASRB_M(DED); } }
+void t11_device::asrb_ix(uint16_t op) { m_icount -= 30; { ASRB_M(IX); } }
+void t11_device::asrb_ixd(uint16_t op) { m_icount -= 36; { ASRB_M(IXD); } }
+
+void t11_device::aslb_rg(uint16_t op) { m_icount -= 12; { ASLB_R(RG); } }
+void t11_device::aslb_rgd(uint16_t op) { m_icount -= 21; { ASLB_M(RGD); } }
+void t11_device::aslb_in(uint16_t op) { m_icount -= 21; { ASLB_M(IN); } }
+void t11_device::aslb_ind(uint16_t op) { m_icount -= 27; { ASLB_M(IND); } }
+void t11_device::aslb_de(uint16_t op) { m_icount -= 24; { ASLB_M(DE); } }
+void t11_device::aslb_ded(uint16_t op) { m_icount -= 30; { ASLB_M(DED); } }
+void t11_device::aslb_ix(uint16_t op) { m_icount -= 30; { ASLB_M(IX); } }
+void t11_device::aslb_ixd(uint16_t op) { m_icount -= 36; { ASLB_M(IXD); } }
+
+void t11_device::mtps_rg(uint16_t op) { m_icount -= 24; { MTPS_R(RG); } }
+void t11_device::mtps_rgd(uint16_t op) { m_icount -= 30; { MTPS_M(RGD); } }
+void t11_device::mtps_in(uint16_t op) { m_icount -= 30; { MTPS_M(IN); } }
+void t11_device::mtps_ind(uint16_t op) { m_icount -= 36; { MTPS_M(IND); } }
+void t11_device::mtps_de(uint16_t op) { m_icount -= 33; { MTPS_M(DE); } }
+void t11_device::mtps_ded(uint16_t op) { m_icount -= 39; { MTPS_M(DED); } }
+void t11_device::mtps_ix(uint16_t op) { m_icount -= 39; { MTPS_M(IX); } }
+void t11_device::mtps_ixd(uint16_t op) { m_icount -= 45; { MTPS_M(IXD); } }
+
+void t11_device::mfps_rg(uint16_t op) { m_icount -= 12; { MFPS_R(RG); } }
+void t11_device::mfps_rgd(uint16_t op) { m_icount -= 21; { MFPS_M(RGD); } }
+void t11_device::mfps_in(uint16_t op) { m_icount -= 21; { MFPS_M(IN); } }
+void t11_device::mfps_ind(uint16_t op) { m_icount -= 27; { MFPS_M(IND); } }
+void t11_device::mfps_de(uint16_t op) { m_icount -= 24; { MFPS_M(DE); } }
+void t11_device::mfps_ded(uint16_t op) { m_icount -= 30; { MFPS_M(DED); } }
+void t11_device::mfps_ix(uint16_t op) { m_icount -= 30; { MFPS_M(IX); } }
+void t11_device::mfps_ixd(uint16_t op) { m_icount -= 36; { MFPS_M(IXD); } }
+
+void t11_device::movb_rg_rg(uint16_t op) { m_icount -= 9+ 3; { MOVB_R(RG,RG); } }
+void t11_device::movb_rg_rgd(uint16_t op) { m_icount -= 9+12; { MOVB_M(RG,RGD); } }
+void t11_device::movb_rg_in(uint16_t op) { m_icount -= 9+12; { MOVB_M(RG,IN); } }
+void t11_device::movb_rg_ind(uint16_t op) { m_icount -= 9+18; { MOVB_M(RG,IND); } }
+void t11_device::movb_rg_de(uint16_t op) { m_icount -= 9+15; { MOVB_M(RG,DE); } }
+void t11_device::movb_rg_ded(uint16_t op) { m_icount -= 9+21; { MOVB_M(RG,DED); } }
+void t11_device::movb_rg_ix(uint16_t op) { m_icount -= 9+21; { MOVB_M(RG,IX); } }
+void t11_device::movb_rg_ixd(uint16_t op) { m_icount -= 9+27; { MOVB_M(RG,IXD); } }
+void t11_device::movb_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { MOVB_X(RGD,RG); } }
+void t11_device::movb_rgd_rgd(uint16_t op) { m_icount -= 15+12; { MOVB_M(RGD,RGD); } }
+void t11_device::movb_rgd_in(uint16_t op) { m_icount -= 15+12; { MOVB_M(RGD,IN); } }
+void t11_device::movb_rgd_ind(uint16_t op) { m_icount -= 15+18; { MOVB_M(RGD,IND); } }
+void t11_device::movb_rgd_de(uint16_t op) { m_icount -= 15+15; { MOVB_M(RGD,DE); } }
+void t11_device::movb_rgd_ded(uint16_t op) { m_icount -= 15+21; { MOVB_M(RGD,DED); } }
+void t11_device::movb_rgd_ix(uint16_t op) { m_icount -= 15+21; { MOVB_M(RGD,IX); } }
+void t11_device::movb_rgd_ixd(uint16_t op) { m_icount -= 15+27; { MOVB_M(RGD,IXD); } }
+void t11_device::movb_in_rg(uint16_t op) { m_icount -= 15+ 3; { MOVB_X(IN,RG); } }
+void t11_device::movb_in_rgd(uint16_t op) { m_icount -= 15+12; { MOVB_M(IN,RGD); } }
+void t11_device::movb_in_in(uint16_t op) { m_icount -= 15+12; { MOVB_M(IN,IN); } }
+void t11_device::movb_in_ind(uint16_t op) { m_icount -= 15+18; { MOVB_M(IN,IND); } }
+void t11_device::movb_in_de(uint16_t op) { m_icount -= 15+15; { MOVB_M(IN,DE); } }
+void t11_device::movb_in_ded(uint16_t op) { m_icount -= 15+21; { MOVB_M(IN,DED); } }
+void t11_device::movb_in_ix(uint16_t op) { m_icount -= 15+21; { MOVB_M(IN,IX); } }
+void t11_device::movb_in_ixd(uint16_t op) { m_icount -= 15+27; { MOVB_M(IN,IXD); } }
+void t11_device::movb_ind_rg(uint16_t op) { m_icount -= 21+ 3; { MOVB_X(IND,RG); } }
+void t11_device::movb_ind_rgd(uint16_t op) { m_icount -= 21+12; { MOVB_M(IND,RGD); } }
+void t11_device::movb_ind_in(uint16_t op) { m_icount -= 21+12; { MOVB_M(IND,IN); } }
+void t11_device::movb_ind_ind(uint16_t op) { m_icount -= 21+18; { MOVB_M(IND,IND); } }
+void t11_device::movb_ind_de(uint16_t op) { m_icount -= 21+15; { MOVB_M(IND,DE); } }
+void t11_device::movb_ind_ded(uint16_t op) { m_icount -= 21+21; { MOVB_M(IND,DED); } }
+void t11_device::movb_ind_ix(uint16_t op) { m_icount -= 21+21; { MOVB_M(IND,IX); } }
+void t11_device::movb_ind_ixd(uint16_t op) { m_icount -= 21+27; { MOVB_M(IND,IXD); } }
+void t11_device::movb_de_rg(uint16_t op) { m_icount -= 18+ 3; { MOVB_X(DE,RG); } }
+void t11_device::movb_de_rgd(uint16_t op) { m_icount -= 18+12; { MOVB_M(DE,RGD); } }
+void t11_device::movb_de_in(uint16_t op) { m_icount -= 18+12; { MOVB_M(DE,IN); } }
+void t11_device::movb_de_ind(uint16_t op) { m_icount -= 18+18; { MOVB_M(DE,IND); } }
+void t11_device::movb_de_de(uint16_t op) { m_icount -= 18+15; { MOVB_M(DE,DE); } }
+void t11_device::movb_de_ded(uint16_t op) { m_icount -= 18+21; { MOVB_M(DE,DED); } }
+void t11_device::movb_de_ix(uint16_t op) { m_icount -= 18+21; { MOVB_M(DE,IX); } }
+void t11_device::movb_de_ixd(uint16_t op) { m_icount -= 18+27; { MOVB_M(DE,IXD); } }
+void t11_device::movb_ded_rg(uint16_t op) { m_icount -= 24+ 3; { MOVB_X(DED,RG); } }
+void t11_device::movb_ded_rgd(uint16_t op) { m_icount -= 24+12; { MOVB_M(DED,RGD); } }
+void t11_device::movb_ded_in(uint16_t op) { m_icount -= 24+12; { MOVB_M(DED,IN); } }
+void t11_device::movb_ded_ind(uint16_t op) { m_icount -= 24+18; { MOVB_M(DED,IND); } }
+void t11_device::movb_ded_de(uint16_t op) { m_icount -= 24+15; { MOVB_M(DED,DE); } }
+void t11_device::movb_ded_ded(uint16_t op) { m_icount -= 24+21; { MOVB_M(DED,DED); } }
+void t11_device::movb_ded_ix(uint16_t op) { m_icount -= 24+21; { MOVB_M(DED,IX); } }
+void t11_device::movb_ded_ixd(uint16_t op) { m_icount -= 24+27; { MOVB_M(DED,IXD); } }
+void t11_device::movb_ix_rg(uint16_t op) { m_icount -= 24+ 3; { MOVB_X(IX,RG); } }
+void t11_device::movb_ix_rgd(uint16_t op) { m_icount -= 24+12; { MOVB_M(IX,RGD); } }
+void t11_device::movb_ix_in(uint16_t op) { m_icount -= 24+12; { MOVB_M(IX,IN); } }
+void t11_device::movb_ix_ind(uint16_t op) { m_icount -= 24+18; { MOVB_M(IX,IND); } }
+void t11_device::movb_ix_de(uint16_t op) { m_icount -= 24+15; { MOVB_M(IX,DE); } }
+void t11_device::movb_ix_ded(uint16_t op) { m_icount -= 24+21; { MOVB_M(IX,DED); } }
+void t11_device::movb_ix_ix(uint16_t op) { m_icount -= 24+21; { MOVB_M(IX,IX); } }
+void t11_device::movb_ix_ixd(uint16_t op) { m_icount -= 24+27; { MOVB_M(IX,IXD); } }
+void t11_device::movb_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { MOVB_X(IXD,RG); } }
+void t11_device::movb_ixd_rgd(uint16_t op) { m_icount -= 30+12; { MOVB_M(IXD,RGD); } }
+void t11_device::movb_ixd_in(uint16_t op) { m_icount -= 30+12; { MOVB_M(IXD,IN); } }
+void t11_device::movb_ixd_ind(uint16_t op) { m_icount -= 30+18; { MOVB_M(IXD,IND); } }
+void t11_device::movb_ixd_de(uint16_t op) { m_icount -= 30+15; { MOVB_M(IXD,DE); } }
+void t11_device::movb_ixd_ded(uint16_t op) { m_icount -= 30+21; { MOVB_M(IXD,DED); } }
+void t11_device::movb_ixd_ix(uint16_t op) { m_icount -= 30+21; { MOVB_M(IXD,IX); } }
+void t11_device::movb_ixd_ixd(uint16_t op) { m_icount -= 30+27; { MOVB_M(IXD,IXD); } }
+
+void t11_device::cmpb_rg_rg(uint16_t op) { m_icount -= 9+ 3; { CMPB_R(RG,RG); } }
+void t11_device::cmpb_rg_rgd(uint16_t op) { m_icount -= 9+ 9; { CMPB_M(RG,RGD); } }
+void t11_device::cmpb_rg_in(uint16_t op) { m_icount -= 9+ 9; { CMPB_M(RG,IN); } }
+void t11_device::cmpb_rg_ind(uint16_t op) { m_icount -= 9+15; { CMPB_M(RG,IND); } }
+void t11_device::cmpb_rg_de(uint16_t op) { m_icount -= 9+12; { CMPB_M(RG,DE); } }
+void t11_device::cmpb_rg_ded(uint16_t op) { m_icount -= 9+18; { CMPB_M(RG,DED); } }
+void t11_device::cmpb_rg_ix(uint16_t op) { m_icount -= 9+18; { CMPB_M(RG,IX); } }
+void t11_device::cmpb_rg_ixd(uint16_t op) { m_icount -= 9+24; { CMPB_M(RG,IXD); } }
+void t11_device::cmpb_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { CMPB_M(RGD,RG); } }
+void t11_device::cmpb_rgd_rgd(uint16_t op) { m_icount -= 15+ 9; { CMPB_M(RGD,RGD); } }
+void t11_device::cmpb_rgd_in(uint16_t op) { m_icount -= 15+ 9; { CMPB_M(RGD,IN); } }
+void t11_device::cmpb_rgd_ind(uint16_t op) { m_icount -= 15+15; { CMPB_M(RGD,IND); } }
+void t11_device::cmpb_rgd_de(uint16_t op) { m_icount -= 15+12; { CMPB_M(RGD,DE); } }
+void t11_device::cmpb_rgd_ded(uint16_t op) { m_icount -= 15+18; { CMPB_M(RGD,DED); } }
+void t11_device::cmpb_rgd_ix(uint16_t op) { m_icount -= 15+18; { CMPB_M(RGD,IX); } }
+void t11_device::cmpb_rgd_ixd(uint16_t op) { m_icount -= 15+24; { CMPB_M(RGD,IXD); } }
+void t11_device::cmpb_in_rg(uint16_t op) { m_icount -= 15+ 3; { CMPB_M(IN,RG); } }
+void t11_device::cmpb_in_rgd(uint16_t op) { m_icount -= 15+ 9; { CMPB_M(IN,RGD); } }
+void t11_device::cmpb_in_in(uint16_t op) { m_icount -= 15+ 9; { CMPB_M(IN,IN); } }
+void t11_device::cmpb_in_ind(uint16_t op) { m_icount -= 15+15; { CMPB_M(IN,IND); } }
+void t11_device::cmpb_in_de(uint16_t op) { m_icount -= 15+12; { CMPB_M(IN,DE); } }
+void t11_device::cmpb_in_ded(uint16_t op) { m_icount -= 15+18; { CMPB_M(IN,DED); } }
+void t11_device::cmpb_in_ix(uint16_t op) { m_icount -= 15+18; { CMPB_M(IN,IX); } }
+void t11_device::cmpb_in_ixd(uint16_t op) { m_icount -= 15+24; { CMPB_M(IN,IXD); } }
+void t11_device::cmpb_ind_rg(uint16_t op) { m_icount -= 21+ 3; { CMPB_M(IND,RG); } }
+void t11_device::cmpb_ind_rgd(uint16_t op) { m_icount -= 21+ 9; { CMPB_M(IND,RGD); } }
+void t11_device::cmpb_ind_in(uint16_t op) { m_icount -= 21+ 9; { CMPB_M(IND,IN); } }
+void t11_device::cmpb_ind_ind(uint16_t op) { m_icount -= 21+15; { CMPB_M(IND,IND); } }
+void t11_device::cmpb_ind_de(uint16_t op) { m_icount -= 21+12; { CMPB_M(IND,DE); } }
+void t11_device::cmpb_ind_ded(uint16_t op) { m_icount -= 21+18; { CMPB_M(IND,DED); } }
+void t11_device::cmpb_ind_ix(uint16_t op) { m_icount -= 21+18; { CMPB_M(IND,IX); } }
+void t11_device::cmpb_ind_ixd(uint16_t op) { m_icount -= 21+24; { CMPB_M(IND,IXD); } }
+void t11_device::cmpb_de_rg(uint16_t op) { m_icount -= 18+ 3; { CMPB_M(DE,RG); } }
+void t11_device::cmpb_de_rgd(uint16_t op) { m_icount -= 18+ 9; { CMPB_M(DE,RGD); } }
+void t11_device::cmpb_de_in(uint16_t op) { m_icount -= 18+ 9; { CMPB_M(DE,IN); } }
+void t11_device::cmpb_de_ind(uint16_t op) { m_icount -= 18+15; { CMPB_M(DE,IND); } }
+void t11_device::cmpb_de_de(uint16_t op) { m_icount -= 18+12; { CMPB_M(DE,DE); } }
+void t11_device::cmpb_de_ded(uint16_t op) { m_icount -= 18+18; { CMPB_M(DE,DED); } }
+void t11_device::cmpb_de_ix(uint16_t op) { m_icount -= 18+18; { CMPB_M(DE,IX); } }
+void t11_device::cmpb_de_ixd(uint16_t op) { m_icount -= 18+24; { CMPB_M(DE,IXD); } }
+void t11_device::cmpb_ded_rg(uint16_t op) { m_icount -= 24+ 3; { CMPB_M(DED,RG); } }
+void t11_device::cmpb_ded_rgd(uint16_t op) { m_icount -= 24+ 9; { CMPB_M(DED,RGD); } }
+void t11_device::cmpb_ded_in(uint16_t op) { m_icount -= 24+ 9; { CMPB_M(DED,IN); } }
+void t11_device::cmpb_ded_ind(uint16_t op) { m_icount -= 24+15; { CMPB_M(DED,IND); } }
+void t11_device::cmpb_ded_de(uint16_t op) { m_icount -= 24+12; { CMPB_M(DED,DE); } }
+void t11_device::cmpb_ded_ded(uint16_t op) { m_icount -= 24+18; { CMPB_M(DED,DED); } }
+void t11_device::cmpb_ded_ix(uint16_t op) { m_icount -= 24+18; { CMPB_M(DED,IX); } }
+void t11_device::cmpb_ded_ixd(uint16_t op) { m_icount -= 24+24; { CMPB_M(DED,IXD); } }
+void t11_device::cmpb_ix_rg(uint16_t op) { m_icount -= 24+ 3; { CMPB_M(IX,RG); } }
+void t11_device::cmpb_ix_rgd(uint16_t op) { m_icount -= 24+ 9; { CMPB_M(IX,RGD); } }
+void t11_device::cmpb_ix_in(uint16_t op) { m_icount -= 24+ 9; { CMPB_M(IX,IN); } }
+void t11_device::cmpb_ix_ind(uint16_t op) { m_icount -= 24+15; { CMPB_M(IX,IND); } }
+void t11_device::cmpb_ix_de(uint16_t op) { m_icount -= 24+12; { CMPB_M(IX,DE); } }
+void t11_device::cmpb_ix_ded(uint16_t op) { m_icount -= 24+18; { CMPB_M(IX,DED); } }
+void t11_device::cmpb_ix_ix(uint16_t op) { m_icount -= 24+18; { CMPB_M(IX,IX); } }
+void t11_device::cmpb_ix_ixd(uint16_t op) { m_icount -= 24+24; { CMPB_M(IX,IXD); } }
+void t11_device::cmpb_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { CMPB_M(IXD,RG); } }
+void t11_device::cmpb_ixd_rgd(uint16_t op) { m_icount -= 30+ 9; { CMPB_M(IXD,RGD); } }
+void t11_device::cmpb_ixd_in(uint16_t op) { m_icount -= 30+ 9; { CMPB_M(IXD,IN); } }
+void t11_device::cmpb_ixd_ind(uint16_t op) { m_icount -= 30+15; { CMPB_M(IXD,IND); } }
+void t11_device::cmpb_ixd_de(uint16_t op) { m_icount -= 30+12; { CMPB_M(IXD,DE); } }
+void t11_device::cmpb_ixd_ded(uint16_t op) { m_icount -= 30+18; { CMPB_M(IXD,DED); } }
+void t11_device::cmpb_ixd_ix(uint16_t op) { m_icount -= 30+18; { CMPB_M(IXD,IX); } }
+void t11_device::cmpb_ixd_ixd(uint16_t op) { m_icount -= 30+24; { CMPB_M(IXD,IXD); } }
+
+void t11_device::bitb_rg_rg(uint16_t op) { m_icount -= 9+ 3; { BITB_R(RG,RG); } }
+void t11_device::bitb_rg_rgd(uint16_t op) { m_icount -= 9+ 9; { BITB_M(RG,RGD); } }
+void t11_device::bitb_rg_in(uint16_t op) { m_icount -= 9+ 9; { BITB_M(RG,IN); } }
+void t11_device::bitb_rg_ind(uint16_t op) { m_icount -= 9+15; { BITB_M(RG,IND); } }
+void t11_device::bitb_rg_de(uint16_t op) { m_icount -= 9+12; { BITB_M(RG,DE); } }
+void t11_device::bitb_rg_ded(uint16_t op) { m_icount -= 9+18; { BITB_M(RG,DED); } }
+void t11_device::bitb_rg_ix(uint16_t op) { m_icount -= 9+18; { BITB_M(RG,IX); } }
+void t11_device::bitb_rg_ixd(uint16_t op) { m_icount -= 9+24; { BITB_M(RG,IXD); } }
+void t11_device::bitb_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { BITB_M(RGD,RG); } }
+void t11_device::bitb_rgd_rgd(uint16_t op) { m_icount -= 15+ 9; { BITB_M(RGD,RGD); } }
+void t11_device::bitb_rgd_in(uint16_t op) { m_icount -= 15+ 9; { BITB_M(RGD,IN); } }
+void t11_device::bitb_rgd_ind(uint16_t op) { m_icount -= 15+15; { BITB_M(RGD,IND); } }
+void t11_device::bitb_rgd_de(uint16_t op) { m_icount -= 15+12; { BITB_M(RGD,DE); } }
+void t11_device::bitb_rgd_ded(uint16_t op) { m_icount -= 15+18; { BITB_M(RGD,DED); } }
+void t11_device::bitb_rgd_ix(uint16_t op) { m_icount -= 15+18; { BITB_M(RGD,IX); } }
+void t11_device::bitb_rgd_ixd(uint16_t op) { m_icount -= 15+24; { BITB_M(RGD,IXD); } }
+void t11_device::bitb_in_rg(uint16_t op) { m_icount -= 15+ 3; { BITB_M(IN,RG); } }
+void t11_device::bitb_in_rgd(uint16_t op) { m_icount -= 15+ 9; { BITB_M(IN,RGD); } }
+void t11_device::bitb_in_in(uint16_t op) { m_icount -= 15+ 9; { BITB_M(IN,IN); } }
+void t11_device::bitb_in_ind(uint16_t op) { m_icount -= 15+15; { BITB_M(IN,IND); } }
+void t11_device::bitb_in_de(uint16_t op) { m_icount -= 15+12; { BITB_M(IN,DE); } }
+void t11_device::bitb_in_ded(uint16_t op) { m_icount -= 15+18; { BITB_M(IN,DED); } }
+void t11_device::bitb_in_ix(uint16_t op) { m_icount -= 15+18; { BITB_M(IN,IX); } }
+void t11_device::bitb_in_ixd(uint16_t op) { m_icount -= 15+24; { BITB_M(IN,IXD); } }
+void t11_device::bitb_ind_rg(uint16_t op) { m_icount -= 21+ 3; { BITB_M(IND,RG); } }
+void t11_device::bitb_ind_rgd(uint16_t op) { m_icount -= 21+ 9; { BITB_M(IND,RGD); } }
+void t11_device::bitb_ind_in(uint16_t op) { m_icount -= 21+ 9; { BITB_M(IND,IN); } }
+void t11_device::bitb_ind_ind(uint16_t op) { m_icount -= 21+15; { BITB_M(IND,IND); } }
+void t11_device::bitb_ind_de(uint16_t op) { m_icount -= 21+12; { BITB_M(IND,DE); } }
+void t11_device::bitb_ind_ded(uint16_t op) { m_icount -= 21+18; { BITB_M(IND,DED); } }
+void t11_device::bitb_ind_ix(uint16_t op) { m_icount -= 21+18; { BITB_M(IND,IX); } }
+void t11_device::bitb_ind_ixd(uint16_t op) { m_icount -= 21+24; { BITB_M(IND,IXD); } }
+void t11_device::bitb_de_rg(uint16_t op) { m_icount -= 18+ 3; { BITB_M(DE,RG); } }
+void t11_device::bitb_de_rgd(uint16_t op) { m_icount -= 18+ 9; { BITB_M(DE,RGD); } }
+void t11_device::bitb_de_in(uint16_t op) { m_icount -= 18+ 9; { BITB_M(DE,IN); } }
+void t11_device::bitb_de_ind(uint16_t op) { m_icount -= 18+15; { BITB_M(DE,IND); } }
+void t11_device::bitb_de_de(uint16_t op) { m_icount -= 18+12; { BITB_M(DE,DE); } }
+void t11_device::bitb_de_ded(uint16_t op) { m_icount -= 18+18; { BITB_M(DE,DED); } }
+void t11_device::bitb_de_ix(uint16_t op) { m_icount -= 18+18; { BITB_M(DE,IX); } }
+void t11_device::bitb_de_ixd(uint16_t op) { m_icount -= 18+24; { BITB_M(DE,IXD); } }
+void t11_device::bitb_ded_rg(uint16_t op) { m_icount -= 24+ 3; { BITB_M(DED,RG); } }
+void t11_device::bitb_ded_rgd(uint16_t op) { m_icount -= 24+ 9; { BITB_M(DED,RGD); } }
+void t11_device::bitb_ded_in(uint16_t op) { m_icount -= 24+ 9; { BITB_M(DED,IN); } }
+void t11_device::bitb_ded_ind(uint16_t op) { m_icount -= 24+15; { BITB_M(DED,IND); } }
+void t11_device::bitb_ded_de(uint16_t op) { m_icount -= 24+12; { BITB_M(DED,DE); } }
+void t11_device::bitb_ded_ded(uint16_t op) { m_icount -= 24+18; { BITB_M(DED,DED); } }
+void t11_device::bitb_ded_ix(uint16_t op) { m_icount -= 24+18; { BITB_M(DED,IX); } }
+void t11_device::bitb_ded_ixd(uint16_t op) { m_icount -= 24+24; { BITB_M(DED,IXD); } }
+void t11_device::bitb_ix_rg(uint16_t op) { m_icount -= 24+ 3; { BITB_M(IX,RG); } }
+void t11_device::bitb_ix_rgd(uint16_t op) { m_icount -= 24+ 9; { BITB_M(IX,RGD); } }
+void t11_device::bitb_ix_in(uint16_t op) { m_icount -= 24+ 9; { BITB_M(IX,IN); } }
+void t11_device::bitb_ix_ind(uint16_t op) { m_icount -= 24+15; { BITB_M(IX,IND); } }
+void t11_device::bitb_ix_de(uint16_t op) { m_icount -= 24+12; { BITB_M(IX,DE); } }
+void t11_device::bitb_ix_ded(uint16_t op) { m_icount -= 24+18; { BITB_M(IX,DED); } }
+void t11_device::bitb_ix_ix(uint16_t op) { m_icount -= 24+18; { BITB_M(IX,IX); } }
+void t11_device::bitb_ix_ixd(uint16_t op) { m_icount -= 24+24; { BITB_M(IX,IXD); } }
+void t11_device::bitb_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { BITB_M(IXD,RG); } }
+void t11_device::bitb_ixd_rgd(uint16_t op) { m_icount -= 30+ 9; { BITB_M(IXD,RGD); } }
+void t11_device::bitb_ixd_in(uint16_t op) { m_icount -= 30+ 9; { BITB_M(IXD,IN); } }
+void t11_device::bitb_ixd_ind(uint16_t op) { m_icount -= 30+15; { BITB_M(IXD,IND); } }
+void t11_device::bitb_ixd_de(uint16_t op) { m_icount -= 30+12; { BITB_M(IXD,DE); } }
+void t11_device::bitb_ixd_ded(uint16_t op) { m_icount -= 30+18; { BITB_M(IXD,DED); } }
+void t11_device::bitb_ixd_ix(uint16_t op) { m_icount -= 30+18; { BITB_M(IXD,IX); } }
+void t11_device::bitb_ixd_ixd(uint16_t op) { m_icount -= 30+24; { BITB_M(IXD,IXD); } }
+
+void t11_device::bicb_rg_rg(uint16_t op) { m_icount -= 9+ 3; { BICB_R(RG,RG); } }
+void t11_device::bicb_rg_rgd(uint16_t op) { m_icount -= 9+12; { BICB_M(RG,RGD); } }
+void t11_device::bicb_rg_in(uint16_t op) { m_icount -= 9+12; { BICB_M(RG,IN); } }
+void t11_device::bicb_rg_ind(uint16_t op) { m_icount -= 9+18; { BICB_M(RG,IND); } }
+void t11_device::bicb_rg_de(uint16_t op) { m_icount -= 9+15; { BICB_M(RG,DE); } }
+void t11_device::bicb_rg_ded(uint16_t op) { m_icount -= 9+21; { BICB_M(RG,DED); } }
+void t11_device::bicb_rg_ix(uint16_t op) { m_icount -= 9+21; { BICB_M(RG,IX); } }
+void t11_device::bicb_rg_ixd(uint16_t op) { m_icount -= 9+27; { BICB_M(RG,IXD); } }
+void t11_device::bicb_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { BICB_X(RGD,RG); } }
+void t11_device::bicb_rgd_rgd(uint16_t op) { m_icount -= 15+12; { BICB_M(RGD,RGD); } }
+void t11_device::bicb_rgd_in(uint16_t op) { m_icount -= 15+12; { BICB_M(RGD,IN); } }
+void t11_device::bicb_rgd_ind(uint16_t op) { m_icount -= 15+18; { BICB_M(RGD,IND); } }
+void t11_device::bicb_rgd_de(uint16_t op) { m_icount -= 15+15; { BICB_M(RGD,DE); } }
+void t11_device::bicb_rgd_ded(uint16_t op) { m_icount -= 15+21; { BICB_M(RGD,DED); } }
+void t11_device::bicb_rgd_ix(uint16_t op) { m_icount -= 15+21; { BICB_M(RGD,IX); } }
+void t11_device::bicb_rgd_ixd(uint16_t op) { m_icount -= 15+27; { BICB_M(RGD,IXD); } }
+void t11_device::bicb_in_rg(uint16_t op) { m_icount -= 15+ 3; { BICB_X(IN,RG); } }
+void t11_device::bicb_in_rgd(uint16_t op) { m_icount -= 15+12; { BICB_M(IN,RGD); } }
+void t11_device::bicb_in_in(uint16_t op) { m_icount -= 15+12; { BICB_M(IN,IN); } }
+void t11_device::bicb_in_ind(uint16_t op) { m_icount -= 15+18; { BICB_M(IN,IND); } }
+void t11_device::bicb_in_de(uint16_t op) { m_icount -= 15+15; { BICB_M(IN,DE); } }
+void t11_device::bicb_in_ded(uint16_t op) { m_icount -= 15+21; { BICB_M(IN,DED); } }
+void t11_device::bicb_in_ix(uint16_t op) { m_icount -= 15+21; { BICB_M(IN,IX); } }
+void t11_device::bicb_in_ixd(uint16_t op) { m_icount -= 15+27; { BICB_M(IN,IXD); } }
+void t11_device::bicb_ind_rg(uint16_t op) { m_icount -= 21+ 3; { BICB_X(IND,RG); } }
+void t11_device::bicb_ind_rgd(uint16_t op) { m_icount -= 21+12; { BICB_M(IND,RGD); } }
+void t11_device::bicb_ind_in(uint16_t op) { m_icount -= 21+12; { BICB_M(IND,IN); } }
+void t11_device::bicb_ind_ind(uint16_t op) { m_icount -= 21+18; { BICB_M(IND,IND); } }
+void t11_device::bicb_ind_de(uint16_t op) { m_icount -= 21+15; { BICB_M(IND,DE); } }
+void t11_device::bicb_ind_ded(uint16_t op) { m_icount -= 21+21; { BICB_M(IND,DED); } }
+void t11_device::bicb_ind_ix(uint16_t op) { m_icount -= 21+21; { BICB_M(IND,IX); } }
+void t11_device::bicb_ind_ixd(uint16_t op) { m_icount -= 21+27; { BICB_M(IND,IXD); } }
+void t11_device::bicb_de_rg(uint16_t op) { m_icount -= 18+ 3; { BICB_X(DE,RG); } }
+void t11_device::bicb_de_rgd(uint16_t op) { m_icount -= 18+12; { BICB_M(DE,RGD); } }
+void t11_device::bicb_de_in(uint16_t op) { m_icount -= 18+12; { BICB_M(DE,IN); } }
+void t11_device::bicb_de_ind(uint16_t op) { m_icount -= 18+18; { BICB_M(DE,IND); } }
+void t11_device::bicb_de_de(uint16_t op) { m_icount -= 18+15; { BICB_M(DE,DE); } }
+void t11_device::bicb_de_ded(uint16_t op) { m_icount -= 18+21; { BICB_M(DE,DED); } }
+void t11_device::bicb_de_ix(uint16_t op) { m_icount -= 18+21; { BICB_M(DE,IX); } }
+void t11_device::bicb_de_ixd(uint16_t op) { m_icount -= 18+27; { BICB_M(DE,IXD); } }
+void t11_device::bicb_ded_rg(uint16_t op) { m_icount -= 24+ 3; { BICB_X(DED,RG); } }
+void t11_device::bicb_ded_rgd(uint16_t op) { m_icount -= 24+12; { BICB_M(DED,RGD); } }
+void t11_device::bicb_ded_in(uint16_t op) { m_icount -= 24+12; { BICB_M(DED,IN); } }
+void t11_device::bicb_ded_ind(uint16_t op) { m_icount -= 24+18; { BICB_M(DED,IND); } }
+void t11_device::bicb_ded_de(uint16_t op) { m_icount -= 24+15; { BICB_M(DED,DE); } }
+void t11_device::bicb_ded_ded(uint16_t op) { m_icount -= 24+21; { BICB_M(DED,DED); } }
+void t11_device::bicb_ded_ix(uint16_t op) { m_icount -= 24+21; { BICB_M(DED,IX); } }
+void t11_device::bicb_ded_ixd(uint16_t op) { m_icount -= 24+27; { BICB_M(DED,IXD); } }
+void t11_device::bicb_ix_rg(uint16_t op) { m_icount -= 24+ 3; { BICB_X(IX,RG); } }
+void t11_device::bicb_ix_rgd(uint16_t op) { m_icount -= 24+12; { BICB_M(IX,RGD); } }
+void t11_device::bicb_ix_in(uint16_t op) { m_icount -= 24+12; { BICB_M(IX,IN); } }
+void t11_device::bicb_ix_ind(uint16_t op) { m_icount -= 24+18; { BICB_M(IX,IND); } }
+void t11_device::bicb_ix_de(uint16_t op) { m_icount -= 24+15; { BICB_M(IX,DE); } }
+void t11_device::bicb_ix_ded(uint16_t op) { m_icount -= 24+21; { BICB_M(IX,DED); } }
+void t11_device::bicb_ix_ix(uint16_t op) { m_icount -= 24+21; { BICB_M(IX,IX); } }
+void t11_device::bicb_ix_ixd(uint16_t op) { m_icount -= 24+27; { BICB_M(IX,IXD); } }
+void t11_device::bicb_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { BICB_X(IXD,RG); } }
+void t11_device::bicb_ixd_rgd(uint16_t op) { m_icount -= 30+12; { BICB_M(IXD,RGD); } }
+void t11_device::bicb_ixd_in(uint16_t op) { m_icount -= 30+12; { BICB_M(IXD,IN); } }
+void t11_device::bicb_ixd_ind(uint16_t op) { m_icount -= 30+18; { BICB_M(IXD,IND); } }
+void t11_device::bicb_ixd_de(uint16_t op) { m_icount -= 30+15; { BICB_M(IXD,DE); } }
+void t11_device::bicb_ixd_ded(uint16_t op) { m_icount -= 30+21; { BICB_M(IXD,DED); } }
+void t11_device::bicb_ixd_ix(uint16_t op) { m_icount -= 30+21; { BICB_M(IXD,IX); } }
+void t11_device::bicb_ixd_ixd(uint16_t op) { m_icount -= 30+27; { BICB_M(IXD,IXD); } }
+
+void t11_device::bisb_rg_rg(uint16_t op) { m_icount -= 9+ 3; { BISB_R(RG,RG); } }
+void t11_device::bisb_rg_rgd(uint16_t op) { m_icount -= 9+12; { BISB_M(RG,RGD); } }
+void t11_device::bisb_rg_in(uint16_t op) { m_icount -= 9+12; { BISB_M(RG,IN); } }
+void t11_device::bisb_rg_ind(uint16_t op) { m_icount -= 9+18; { BISB_M(RG,IND); } }
+void t11_device::bisb_rg_de(uint16_t op) { m_icount -= 9+15; { BISB_M(RG,DE); } }
+void t11_device::bisb_rg_ded(uint16_t op) { m_icount -= 9+21; { BISB_M(RG,DED); } }
+void t11_device::bisb_rg_ix(uint16_t op) { m_icount -= 9+21; { BISB_M(RG,IX); } }
+void t11_device::bisb_rg_ixd(uint16_t op) { m_icount -= 9+27; { BISB_M(RG,IXD); } }
+void t11_device::bisb_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { BISB_X(RGD,RG); } }
+void t11_device::bisb_rgd_rgd(uint16_t op) { m_icount -= 15+12; { BISB_M(RGD,RGD); } }
+void t11_device::bisb_rgd_in(uint16_t op) { m_icount -= 15+12; { BISB_M(RGD,IN); } }
+void t11_device::bisb_rgd_ind(uint16_t op) { m_icount -= 15+18; { BISB_M(RGD,IND); } }
+void t11_device::bisb_rgd_de(uint16_t op) { m_icount -= 15+15; { BISB_M(RGD,DE); } }
+void t11_device::bisb_rgd_ded(uint16_t op) { m_icount -= 15+21; { BISB_M(RGD,DED); } }
+void t11_device::bisb_rgd_ix(uint16_t op) { m_icount -= 15+21; { BISB_M(RGD,IX); } }
+void t11_device::bisb_rgd_ixd(uint16_t op) { m_icount -= 15+27; { BISB_M(RGD,IXD); } }
+void t11_device::bisb_in_rg(uint16_t op) { m_icount -= 15+ 3; { BISB_X(IN,RG); } }
+void t11_device::bisb_in_rgd(uint16_t op) { m_icount -= 15+12; { BISB_M(IN,RGD); } }
+void t11_device::bisb_in_in(uint16_t op) { m_icount -= 15+12; { BISB_M(IN,IN); } }
+void t11_device::bisb_in_ind(uint16_t op) { m_icount -= 15+18; { BISB_M(IN,IND); } }
+void t11_device::bisb_in_de(uint16_t op) { m_icount -= 15+15; { BISB_M(IN,DE); } }
+void t11_device::bisb_in_ded(uint16_t op) { m_icount -= 15+21; { BISB_M(IN,DED); } }
+void t11_device::bisb_in_ix(uint16_t op) { m_icount -= 15+21; { BISB_M(IN,IX); } }
+void t11_device::bisb_in_ixd(uint16_t op) { m_icount -= 15+27; { BISB_M(IN,IXD); } }
+void t11_device::bisb_ind_rg(uint16_t op) { m_icount -= 21+ 3; { BISB_X(IND,RG); } }
+void t11_device::bisb_ind_rgd(uint16_t op) { m_icount -= 21+12; { BISB_M(IND,RGD); } }
+void t11_device::bisb_ind_in(uint16_t op) { m_icount -= 21+12; { BISB_M(IND,IN); } }
+void t11_device::bisb_ind_ind(uint16_t op) { m_icount -= 21+18; { BISB_M(IND,IND); } }
+void t11_device::bisb_ind_de(uint16_t op) { m_icount -= 21+15; { BISB_M(IND,DE); } }
+void t11_device::bisb_ind_ded(uint16_t op) { m_icount -= 21+21; { BISB_M(IND,DED); } }
+void t11_device::bisb_ind_ix(uint16_t op) { m_icount -= 21+21; { BISB_M(IND,IX); } }
+void t11_device::bisb_ind_ixd(uint16_t op) { m_icount -= 21+27; { BISB_M(IND,IXD); } }
+void t11_device::bisb_de_rg(uint16_t op) { m_icount -= 18+ 3; { BISB_X(DE,RG); } }
+void t11_device::bisb_de_rgd(uint16_t op) { m_icount -= 18+12; { BISB_M(DE,RGD); } }
+void t11_device::bisb_de_in(uint16_t op) { m_icount -= 18+12; { BISB_M(DE,IN); } }
+void t11_device::bisb_de_ind(uint16_t op) { m_icount -= 18+18; { BISB_M(DE,IND); } }
+void t11_device::bisb_de_de(uint16_t op) { m_icount -= 18+15; { BISB_M(DE,DE); } }
+void t11_device::bisb_de_ded(uint16_t op) { m_icount -= 18+21; { BISB_M(DE,DED); } }
+void t11_device::bisb_de_ix(uint16_t op) { m_icount -= 18+21; { BISB_M(DE,IX); } }
+void t11_device::bisb_de_ixd(uint16_t op) { m_icount -= 18+27; { BISB_M(DE,IXD); } }
+void t11_device::bisb_ded_rg(uint16_t op) { m_icount -= 24+ 3; { BISB_X(DED,RG); } }
+void t11_device::bisb_ded_rgd(uint16_t op) { m_icount -= 24+12; { BISB_M(DED,RGD); } }
+void t11_device::bisb_ded_in(uint16_t op) { m_icount -= 24+12; { BISB_M(DED,IN); } }
+void t11_device::bisb_ded_ind(uint16_t op) { m_icount -= 24+18; { BISB_M(DED,IND); } }
+void t11_device::bisb_ded_de(uint16_t op) { m_icount -= 24+15; { BISB_M(DED,DE); } }
+void t11_device::bisb_ded_ded(uint16_t op) { m_icount -= 24+21; { BISB_M(DED,DED); } }
+void t11_device::bisb_ded_ix(uint16_t op) { m_icount -= 24+21; { BISB_M(DED,IX); } }
+void t11_device::bisb_ded_ixd(uint16_t op) { m_icount -= 24+27; { BISB_M(DED,IXD); } }
+void t11_device::bisb_ix_rg(uint16_t op) { m_icount -= 24+ 3; { BISB_X(IX,RG); } }
+void t11_device::bisb_ix_rgd(uint16_t op) { m_icount -= 24+12; { BISB_M(IX,RGD); } }
+void t11_device::bisb_ix_in(uint16_t op) { m_icount -= 24+12; { BISB_M(IX,IN); } }
+void t11_device::bisb_ix_ind(uint16_t op) { m_icount -= 24+18; { BISB_M(IX,IND); } }
+void t11_device::bisb_ix_de(uint16_t op) { m_icount -= 24+15; { BISB_M(IX,DE); } }
+void t11_device::bisb_ix_ded(uint16_t op) { m_icount -= 24+21; { BISB_M(IX,DED); } }
+void t11_device::bisb_ix_ix(uint16_t op) { m_icount -= 24+21; { BISB_M(IX,IX); } }
+void t11_device::bisb_ix_ixd(uint16_t op) { m_icount -= 24+27; { BISB_M(IX,IXD); } }
+void t11_device::bisb_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { BISB_X(IXD,RG); } }
+void t11_device::bisb_ixd_rgd(uint16_t op) { m_icount -= 30+12; { BISB_M(IXD,RGD); } }
+void t11_device::bisb_ixd_in(uint16_t op) { m_icount -= 30+12; { BISB_M(IXD,IN); } }
+void t11_device::bisb_ixd_ind(uint16_t op) { m_icount -= 30+18; { BISB_M(IXD,IND); } }
+void t11_device::bisb_ixd_de(uint16_t op) { m_icount -= 30+15; { BISB_M(IXD,DE); } }
+void t11_device::bisb_ixd_ded(uint16_t op) { m_icount -= 30+21; { BISB_M(IXD,DED); } }
+void t11_device::bisb_ixd_ix(uint16_t op) { m_icount -= 30+21; { BISB_M(IXD,IX); } }
+void t11_device::bisb_ixd_ixd(uint16_t op) { m_icount -= 30+27; { BISB_M(IXD,IXD); } }
+
+void t11_device::sub_rg_rg(uint16_t op) { m_icount -= 9+ 3; { SUB_R(RG,RG); } }
+void t11_device::sub_rg_rgd(uint16_t op) { m_icount -= 9+12; { SUB_M(RG,RGD); } }
+void t11_device::sub_rg_in(uint16_t op) { m_icount -= 9+12; { SUB_M(RG,IN); } }
+void t11_device::sub_rg_ind(uint16_t op) { m_icount -= 9+18; { SUB_M(RG,IND); } }
+void t11_device::sub_rg_de(uint16_t op) { m_icount -= 9+15; { SUB_M(RG,DE); } }
+void t11_device::sub_rg_ded(uint16_t op) { m_icount -= 9+21; { SUB_M(RG,DED); } }
+void t11_device::sub_rg_ix(uint16_t op) { m_icount -= 9+21; { SUB_M(RG,IX); } }
+void t11_device::sub_rg_ixd(uint16_t op) { m_icount -= 9+27; { SUB_M(RG,IXD); } }
+void t11_device::sub_rgd_rg(uint16_t op) { m_icount -= 15+ 3; { SUB_X(RGD,RG); } }
+void t11_device::sub_rgd_rgd(uint16_t op) { m_icount -= 15+12; { SUB_M(RGD,RGD); } }
+void t11_device::sub_rgd_in(uint16_t op) { m_icount -= 15+12; { SUB_M(RGD,IN); } }
+void t11_device::sub_rgd_ind(uint16_t op) { m_icount -= 15+18; { SUB_M(RGD,IND); } }
+void t11_device::sub_rgd_de(uint16_t op) { m_icount -= 15+15; { SUB_M(RGD,DE); } }
+void t11_device::sub_rgd_ded(uint16_t op) { m_icount -= 15+21; { SUB_M(RGD,DED); } }
+void t11_device::sub_rgd_ix(uint16_t op) { m_icount -= 15+21; { SUB_M(RGD,IX); } }
+void t11_device::sub_rgd_ixd(uint16_t op) { m_icount -= 15+27; { SUB_M(RGD,IXD); } }
+void t11_device::sub_in_rg(uint16_t op) { m_icount -= 15+ 3; { SUB_X(IN,RG); } }
+void t11_device::sub_in_rgd(uint16_t op) { m_icount -= 15+12; { SUB_M(IN,RGD); } }
+void t11_device::sub_in_in(uint16_t op) { m_icount -= 15+12; { SUB_M(IN,IN); } }
+void t11_device::sub_in_ind(uint16_t op) { m_icount -= 15+18; { SUB_M(IN,IND); } }
+void t11_device::sub_in_de(uint16_t op) { m_icount -= 15+15; { SUB_M(IN,DE); } }
+void t11_device::sub_in_ded(uint16_t op) { m_icount -= 15+21; { SUB_M(IN,DED); } }
+void t11_device::sub_in_ix(uint16_t op) { m_icount -= 15+21; { SUB_M(IN,IX); } }
+void t11_device::sub_in_ixd(uint16_t op) { m_icount -= 15+27; { SUB_M(IN,IXD); } }
+void t11_device::sub_ind_rg(uint16_t op) { m_icount -= 21+ 3; { SUB_X(IND,RG); } }
+void t11_device::sub_ind_rgd(uint16_t op) { m_icount -= 21+12; { SUB_M(IND,RGD); } }
+void t11_device::sub_ind_in(uint16_t op) { m_icount -= 21+12; { SUB_M(IND,IN); } }
+void t11_device::sub_ind_ind(uint16_t op) { m_icount -= 21+18; { SUB_M(IND,IND); } }
+void t11_device::sub_ind_de(uint16_t op) { m_icount -= 21+15; { SUB_M(IND,DE); } }
+void t11_device::sub_ind_ded(uint16_t op) { m_icount -= 21+21; { SUB_M(IND,DED); } }
+void t11_device::sub_ind_ix(uint16_t op) { m_icount -= 21+21; { SUB_M(IND,IX); } }
+void t11_device::sub_ind_ixd(uint16_t op) { m_icount -= 21+27; { SUB_M(IND,IXD); } }
+void t11_device::sub_de_rg(uint16_t op) { m_icount -= 18+ 3; { SUB_X(DE,RG); } }
+void t11_device::sub_de_rgd(uint16_t op) { m_icount -= 18+12; { SUB_M(DE,RGD); } }
+void t11_device::sub_de_in(uint16_t op) { m_icount -= 18+12; { SUB_M(DE,IN); } }
+void t11_device::sub_de_ind(uint16_t op) { m_icount -= 18+18; { SUB_M(DE,IND); } }
+void t11_device::sub_de_de(uint16_t op) { m_icount -= 18+15; { SUB_M(DE,DE); } }
+void t11_device::sub_de_ded(uint16_t op) { m_icount -= 18+21; { SUB_M(DE,DED); } }
+void t11_device::sub_de_ix(uint16_t op) { m_icount -= 18+21; { SUB_M(DE,IX); } }
+void t11_device::sub_de_ixd(uint16_t op) { m_icount -= 18+27; { SUB_M(DE,IXD); } }
+void t11_device::sub_ded_rg(uint16_t op) { m_icount -= 24+ 3; { SUB_X(DED,RG); } }
+void t11_device::sub_ded_rgd(uint16_t op) { m_icount -= 24+12; { SUB_M(DED,RGD); } }
+void t11_device::sub_ded_in(uint16_t op) { m_icount -= 24+12; { SUB_M(DED,IN); } }
+void t11_device::sub_ded_ind(uint16_t op) { m_icount -= 24+18; { SUB_M(DED,IND); } }
+void t11_device::sub_ded_de(uint16_t op) { m_icount -= 24+15; { SUB_M(DED,DE); } }
+void t11_device::sub_ded_ded(uint16_t op) { m_icount -= 24+21; { SUB_M(DED,DED); } }
+void t11_device::sub_ded_ix(uint16_t op) { m_icount -= 24+21; { SUB_M(DED,IX); } }
+void t11_device::sub_ded_ixd(uint16_t op) { m_icount -= 24+27; { SUB_M(DED,IXD); } }
+void t11_device::sub_ix_rg(uint16_t op) { m_icount -= 24+ 3; { SUB_X(IX,RG); } }
+void t11_device::sub_ix_rgd(uint16_t op) { m_icount -= 24+12; { SUB_M(IX,RGD); } }
+void t11_device::sub_ix_in(uint16_t op) { m_icount -= 24+12; { SUB_M(IX,IN); } }
+void t11_device::sub_ix_ind(uint16_t op) { m_icount -= 24+18; { SUB_M(IX,IND); } }
+void t11_device::sub_ix_de(uint16_t op) { m_icount -= 24+15; { SUB_M(IX,DE); } }
+void t11_device::sub_ix_ded(uint16_t op) { m_icount -= 24+21; { SUB_M(IX,DED); } }
+void t11_device::sub_ix_ix(uint16_t op) { m_icount -= 24+21; { SUB_M(IX,IX); } }
+void t11_device::sub_ix_ixd(uint16_t op) { m_icount -= 24+27; { SUB_M(IX,IXD); } }
+void t11_device::sub_ixd_rg(uint16_t op) { m_icount -= 30+ 3; { SUB_X(IXD,RG); } }
+void t11_device::sub_ixd_rgd(uint16_t op) { m_icount -= 30+12; { SUB_M(IXD,RGD); } }
+void t11_device::sub_ixd_in(uint16_t op) { m_icount -= 30+12; { SUB_M(IXD,IN); } }
+void t11_device::sub_ixd_ind(uint16_t op) { m_icount -= 30+18; { SUB_M(IXD,IND); } }
+void t11_device::sub_ixd_de(uint16_t op) { m_icount -= 30+15; { SUB_M(IXD,DE); } }
+void t11_device::sub_ixd_ded(uint16_t op) { m_icount -= 30+21; { SUB_M(IXD,DED); } }
+void t11_device::sub_ixd_ix(uint16_t op) { m_icount -= 30+21; { SUB_M(IXD,IX); } }
+void t11_device::sub_ixd_ixd(uint16_t op) { m_icount -= 30+27; { SUB_M(IXD,IXD); } }
diff --git a/src/devices/cpu/tlcs90/tlcs90.cpp b/src/devices/cpu/tlcs90/tlcs90.cpp
index a347d93a632..820d5634126 100644
--- a/src/devices/cpu/tlcs90/tlcs90.cpp
+++ b/src/devices/cpu/tlcs90/tlcs90.cpp
@@ -53,7 +53,7 @@ static ADDRESS_MAP_START(tmp91641_mem, AS_PROGRAM, 8, tlcs90_device )
ADDRESS_MAP_END
-tlcs90_device::tlcs90_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_constructor program_map)
+tlcs90_device::tlcs90_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_constructor program_map)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0, program_map)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
@@ -61,30 +61,30 @@ tlcs90_device::tlcs90_device(const machine_config &mconfig, device_type type, co
}
-tmp90840_device::tmp90840_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmp90840_device::tmp90840_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tlcs90_device(mconfig, TMP90840, "TMP90840", tag, owner, clock, "tmp90840", __FILE__, ADDRESS_MAP_NAME(tmp90840_mem))
{
}
-tmp90841_device::tmp90841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmp90841_device::tmp90841_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tlcs90_device(mconfig, TMP90841, "TMP90841", tag, owner, clock, "tmp90841", __FILE__, ADDRESS_MAP_NAME(tmp90841_mem))
{
}
-tmp90845_device::tmp90845_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmp90845_device::tmp90845_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tlcs90_device(mconfig, TMP90841, "TMP90845", tag, owner, clock, "tmp90845", __FILE__, ADDRESS_MAP_NAME(tmp90841_mem))
{
}
-tmp91640_device::tmp91640_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmp91640_device::tmp91640_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tlcs90_device(mconfig, TMP91640, "TMP91640", tag, owner, clock, "tmp91640", __FILE__, ADDRESS_MAP_NAME(tmp91640_mem))
{
}
-tmp91641_device::tmp91641_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmp91641_device::tmp91641_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tlcs90_device(mconfig, TMP91641, "TMP91641", tag, owner, clock, "tmp91641", __FILE__, ADDRESS_MAP_NAME(tmp91641_mem))
{
}
@@ -158,11 +158,11 @@ static const char *const r16_names[] = { "bc", "de", "hl", "??",
#define ZF 0x40
#define SF 0x80
-static UINT8 SZ[256]; /* zero and sign flags */
-static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
-static UINT8 SZP[256]; /* zero, sign and parity flags */
-static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
-static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
+static uint8_t SZ[256]; /* zero and sign flags */
+static uint8_t SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
+static uint8_t SZP[256]; /* zero, sign and parity flags */
+static uint8_t SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
+static uint8_t SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
static const char *const cc_names[] = { "f", "lt", "le", "ule", "ov", "mi", "z", "c", "", "ge", "gt", "ugt", "nov", "pl", "nz", "nc" };
@@ -197,25 +197,25 @@ static const char *const cc_names[] = { "f", "lt", "le", "ule", "ov"
#define R16D8( N,R,I ) m_mode##N = MODE_R16D8; m_r##N = R; m_r##N##b = I;
#define R16R8( N,R,g ) m_mode##N = MODE_R16R8; m_r##N = R; m_r##N##b = g;
-UINT8 tlcs90_device::RM8 (UINT32 a) { return m_program->read_byte( a ); }
-UINT16 tlcs90_device::RM16(UINT32 a) { return RM8(a) | (RM8( (a+1) & 0xffff ) << 8); }
+uint8_t tlcs90_device::RM8 (uint32_t a) { return m_program->read_byte( a ); }
+uint16_t tlcs90_device::RM16(uint32_t a) { return RM8(a) | (RM8( (a+1) & 0xffff ) << 8); }
-void tlcs90_device::WM8 (UINT32 a, UINT8 v) { m_program->write_byte( a, v ); }
-void tlcs90_device::WM16(UINT32 a, UINT16 v) { WM8(a,v); WM8( (a+1) & 0xffff, v >> 8); }
+void tlcs90_device::WM8 (uint32_t a, uint8_t v) { m_program->write_byte( a, v ); }
+void tlcs90_device::WM16(uint32_t a, uint16_t v) { WM8(a,v); WM8( (a+1) & 0xffff, v >> 8); }
-UINT8 tlcs90_device::RX8 (UINT32 a, UINT32 base) { return m_program->read_byte( base | a ); }
-UINT16 tlcs90_device::RX16(UINT32 a, UINT32 base) { return RX8(a,base) | (RX8( (a+1) & 0xffff, base ) << 8); }
+uint8_t tlcs90_device::RX8 (uint32_t a, uint32_t base) { return m_program->read_byte( base | a ); }
+uint16_t tlcs90_device::RX16(uint32_t a, uint32_t base) { return RX8(a,base) | (RX8( (a+1) & 0xffff, base ) << 8); }
-void tlcs90_device::WX8 (UINT32 a, UINT8 v, UINT32 base) { m_program->write_byte( base | a, v ); }
-void tlcs90_device::WX16(UINT32 a, UINT16 v, UINT32 base) { WX8(a,v,base); WX8( (a+1) & 0xffff, v >> 8, base); }
+void tlcs90_device::WX8 (uint32_t a, uint8_t v, uint32_t base) { m_program->write_byte( base | a, v ); }
+void tlcs90_device::WX16(uint32_t a, uint16_t v, uint32_t base) { WX8(a,v,base); WX8( (a+1) & 0xffff, v >> 8, base); }
-UINT8 tlcs90_device::READ8() { UINT8 b0 = RM8( m_addr++ ); m_addr &= 0xffff; return b0; }
-UINT16 tlcs90_device::READ16() { UINT8 b0 = READ8(); return b0 | (READ8() << 8); }
+uint8_t tlcs90_device::READ8() { uint8_t b0 = RM8( m_addr++ ); m_addr &= 0xffff; return b0; }
+uint16_t tlcs90_device::READ16() { uint8_t b0 = READ8(); return b0 | (READ8() << 8); }
void tlcs90_device::decode()
{
- UINT8 b0, b1, b2, b3;
- UINT16 imm16;
+ uint8_t b0, b1, b2, b3;
+ uint16_t imm16;
b0 = READ8();
@@ -984,14 +984,14 @@ static const char *const ir_names[] = {
"DMAEH", "SCMOD", "SCCR", "SCBUF", "BX", "BY", "ADREG", "ADMOD"
};
-const char *tlcs90_device::internal_registers_names(UINT16 x)
+const char *tlcs90_device::internal_registers_names(uint16_t x)
{
int ir = x - T90_IOBASE;
if ( ir >= 0 && ir < ARRAY_LENGTH(ir_names) )
return ir_names[ir];
return nullptr;
}
-int tlcs90_device::sprint_arg(char *buffer, UINT32 pc, const char *pre, const e_mode mode, const UINT16 r, const UINT16 rb)
+int tlcs90_device::sprint_arg(char *buffer, uint32_t pc, const char *pre, const e_mode mode, const uint16_t r, const uint16_t rb)
{
const char *reg_name;
switch ( mode )
@@ -1027,7 +1027,7 @@ int tlcs90_device::sprint_arg(char *buffer, UINT32 pc, const char *pre, const e_
//return 0;
}
-offs_t tlcs90_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tlcs90_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
int len;
@@ -1045,7 +1045,7 @@ offs_t tlcs90_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
}
-UINT16 tlcs90_device::r8( const UINT16 r )
+uint16_t tlcs90_device::r8( const uint16_t r )
{
switch( r )
{
@@ -1062,7 +1062,7 @@ UINT16 tlcs90_device::r8( const UINT16 r )
}
}
-void tlcs90_device::w8( const UINT16 r, UINT16 value )
+void tlcs90_device::w8( const uint16_t r, uint16_t value )
{
switch( r )
{
@@ -1079,7 +1079,7 @@ void tlcs90_device::w8( const UINT16 r, UINT16 value )
}
}
-UINT16 tlcs90_device::r16( const UINT16 r )
+uint16_t tlcs90_device::r16( const uint16_t r )
{
switch( r )
{
@@ -1100,7 +1100,7 @@ UINT16 tlcs90_device::r16( const UINT16 r )
}
}
-void tlcs90_device::w16( const UINT16 r, UINT16 value )
+void tlcs90_device::w16( const uint16_t r, uint16_t value )
{
switch( r )
{
@@ -1121,15 +1121,15 @@ void tlcs90_device::w16( const UINT16 r, UINT16 value )
#define READ_FN( N ) \
-UINT8 tlcs90_device::Read##N##_8() { \
+uint8_t tlcs90_device::Read##N##_8() { \
switch ( m_mode##N ) { \
case MODE_CC: \
case MODE_BIT8: \
- case MODE_I8: return (UINT8)m_r##N; \
- case MODE_D8: return (UINT8)m_r##N; \
- case MODE_R8: return (UINT8)r8(m_r##N); \
+ case MODE_I8: return (uint8_t)m_r##N; \
+ case MODE_D8: return (uint8_t)m_r##N; \
+ case MODE_R8: return (uint8_t)r8(m_r##N); \
case MODE_MI16: return RM8(m_r##N); \
- case MODE_MR16R8: return RM8((UINT16)(r16(m_r##N) + (INT8)r8(m_r##N##b))); \
+ case MODE_MR16R8: return RM8((uint16_t)(r16(m_r##N) + (int8_t)r8(m_r##N##b))); \
case MODE_MR16: \
switch( m_r##N ) { \
case IX: return RX8(m_ix.w.l,m_ixbase); \
@@ -1138,24 +1138,24 @@ UINT8 tlcs90_device::Read##N##_8() { \
return RM8(r16(m_r##N)); \
case MODE_MR16D8: \
switch( m_r##N ) { \
- case IX: return RX8((UINT16)(m_ix.w.l + (INT8)m_r##N##b),m_ixbase); \
- case IY: return RX8((UINT16)(m_iy.w.l + (INT8)m_r##N##b),m_iybase); \
+ case IX: return RX8((uint16_t)(m_ix.w.l + (int8_t)m_r##N##b),m_ixbase); \
+ case IY: return RX8((uint16_t)(m_iy.w.l + (int8_t)m_r##N##b),m_iybase); \
} \
- return RM8((UINT16)(r16(m_r##N) + (INT8)m_r##N##b)); \
+ return RM8((uint16_t)(r16(m_r##N) + (int8_t)m_r##N##b)); \
default: \
fatalerror("%04x: unimplemented Read%d_8 mode = %d\n",m_pc.w.l,N,m_mode##N); \
} \
return 0; \
} \
-UINT16 tlcs90_device::Read##N##_16() { \
+uint16_t tlcs90_device::Read##N##_16() { \
switch ( m_mode##N ) { \
case MODE_I16: return m_r##N; \
case MODE_D16: return m_r##N - 1; \
case MODE_R16: return r16(m_r##N); \
- case MODE_R16D8: return r16(m_r##N) + (INT8)m_r##N##b; \
- case MODE_R16R8: return r16(m_r##N) + (INT8)r8(m_r##N##b); \
+ case MODE_R16D8: return r16(m_r##N) + (int8_t)m_r##N##b; \
+ case MODE_R16R8: return r16(m_r##N) + (int8_t)r8(m_r##N##b); \
case MODE_MI16: return RM16(m_r##N); \
- case MODE_MR16R8: return RM16((UINT16)(r16(m_r##N) + (INT8)r8(m_r##N##b))); \
+ case MODE_MR16R8: return RM16((uint16_t)(r16(m_r##N) + (int8_t)r8(m_r##N##b))); \
case MODE_MR16: \
switch( m_r##N ) { \
case IX: return RX16(m_ix.w.l,m_ixbase); \
@@ -1164,10 +1164,10 @@ UINT16 tlcs90_device::Read##N##_16() { \
return RM16(r16(m_r##N)); \
case MODE_MR16D8: \
switch( m_r##N ) { \
- case IX: return RX16((UINT16)(m_ix.w.l + (INT8)m_r##N##b),m_ixbase); \
- case IY: return RX16((UINT16)(m_iy.w.l + (INT8)m_r##N##b),m_iybase); \
+ case IX: return RX16((uint16_t)(m_ix.w.l + (int8_t)m_r##N##b),m_ixbase); \
+ case IY: return RX16((uint16_t)(m_iy.w.l + (int8_t)m_r##N##b),m_iybase); \
} \
- return RM16((UINT16)(r16(m_r##N) + (INT8)m_r##N##b)); \
+ return RM16((uint16_t)(r16(m_r##N) + (int8_t)m_r##N##b)); \
default: \
fatalerror("%04x: unimplemented Read%d_16 modes = %d\n",m_pc.w.l,N,m_mode##N); \
} \
@@ -1177,11 +1177,11 @@ UINT16 tlcs90_device::Read##N##_16() { \
#define WRITE_FN( N ) \
-void tlcs90_device::Write##N##_8( UINT8 value ) { \
+void tlcs90_device::Write##N##_8( uint8_t value ) { \
switch ( m_mode##N ) { \
case MODE_R8: w8(m_r##N,value); return; \
case MODE_MI16: WM8(m_r##N, value); return; \
- case MODE_MR16R8: WM8((UINT16)(r16(m_r##N) + (INT8)r8(m_r##N##b)), value); return; \
+ case MODE_MR16R8: WM8((uint16_t)(r16(m_r##N) + (int8_t)r8(m_r##N##b)), value); return; \
case MODE_MR16: \
switch( m_r##N ) { \
case IX: WX8(m_ix.w.l,value,m_ixbase); return; \
@@ -1190,20 +1190,20 @@ void tlcs90_device::Write##N##_8( UINT8 value ) { \
WM8(r16(m_r##N), value); return; \
case MODE_MR16D8: \
switch( m_r##N ) { \
- case IX: WX8((UINT16)(m_ix.w.l + (INT8)m_r##N##b),value,m_ixbase); return; \
- case IY: WX8((UINT16)(m_iy.w.l + (INT8)m_r##N##b),value,m_iybase); return; \
+ case IX: WX8((uint16_t)(m_ix.w.l + (int8_t)m_r##N##b),value,m_ixbase); return; \
+ case IY: WX8((uint16_t)(m_iy.w.l + (int8_t)m_r##N##b),value,m_iybase); return; \
} \
- WM8((UINT16)(r16(m_r##N) + (INT8)m_r##N##b), value); return; \
+ WM8((uint16_t)(r16(m_r##N) + (int8_t)m_r##N##b), value); return; \
default: \
fatalerror("%04x: unimplemented Write%d_8 mode = %d\n",m_pc.w.l,N,m_mode##N); \
} \
} \
-void tlcs90_device::Write##N##_16( UINT16 value ) \
+void tlcs90_device::Write##N##_16( uint16_t value ) \
{ \
switch ( m_mode##N ) { \
case MODE_R16: w16(m_r##N,value); return; \
case MODE_MI16: WM16(m_r##N, value); return; \
- case MODE_MR16R8: WM16((UINT16)(r16(m_r##N) + (INT8)r8(m_r##N##b)), value); return; \
+ case MODE_MR16R8: WM16((uint16_t)(r16(m_r##N) + (int8_t)r8(m_r##N##b)), value); return; \
case MODE_MR16: \
switch( m_r##N ) { \
case IX: WX16(m_ix.w.l,value,m_ixbase); return; \
@@ -1212,10 +1212,10 @@ void tlcs90_device::Write##N##_16( UINT16 value ) \
WM16(r16(m_r##N), value); return; \
case MODE_MR16D8: \
switch( m_r##N ) { \
- case IX: WX16((UINT16)(m_ix.w.l + (INT8)m_r##N##b),value,m_ixbase); return; \
- case IY: WX16((UINT16)(m_iy.w.l + (INT8)m_r##N##b),value,m_iybase); return; \
+ case IX: WX16((uint16_t)(m_ix.w.l + (int8_t)m_r##N##b),value,m_ixbase); return; \
+ case IY: WX16((uint16_t)(m_iy.w.l + (int8_t)m_r##N##b),value,m_iybase); return; \
} \
- WM16((UINT16)(r16(m_r##N) + (INT8)m_r##N##b), value); return; \
+ WM16((uint16_t)(r16(m_r##N) + (int8_t)m_r##N##b), value); return; \
default: \
fatalerror("%04x: unimplemented Write%d_16 mode = %d\n",m_pc.w.l,N,m_mode##N); \
} \
@@ -1226,7 +1226,7 @@ READ_FN(2)
WRITE_FN(1)
WRITE_FN(2)
-int tlcs90_device::Test( UINT8 cond )
+int tlcs90_device::Test( uint8_t cond )
{
int s,v;
switch ( cond )
@@ -1255,12 +1255,12 @@ int tlcs90_device::Test( UINT8 cond )
//return 0;
}
-void tlcs90_device::Push( UINT16 rr )
+void tlcs90_device::Push( uint16_t rr )
{
m_sp.w.l -= 2;
WM16( m_sp.w.l, r16(rr) );
}
-void tlcs90_device::Pop( UINT16 rr )
+void tlcs90_device::Pop( uint16_t rr )
{
w16( rr, RM16( m_sp.w.l ) );
m_sp.w.l += 2;
@@ -1384,8 +1384,8 @@ void tlcs90_device::Cyc_f() { m_icount -= m_cyc_f; }
void tlcs90_device::execute_run()
{
- UINT8 a8,b8;
- UINT16 a16,b16;
+ uint8_t a8,b8;
+ uint16_t a16,b16;
unsigned a32;
PAIR tmp;
@@ -1531,7 +1531,7 @@ void tlcs90_device::execute_run()
case JR:
if ( Test( Read1_8() ) )
{
- m_pc.w.l += /*2 +*/ (INT8)Read2_8();
+ m_pc.w.l += /*2 +*/ (int8_t)Read2_8();
Cyc();
}
else Cyc_f();
@@ -1595,7 +1595,7 @@ void tlcs90_device::execute_run()
case DAA:
{
- UINT8 cf, nf, hf, lo, hi, diff;
+ uint8_t cf, nf, hf, lo, hi, diff;
cf = F & CF;
nf = F & NF;
hf = F & HF;
@@ -1644,7 +1644,7 @@ void tlcs90_device::execute_run()
a8 = 0;
b8 = m_af.b.h;
a32 = a8 - b8;
- F = (F & IF) | SZ[(UINT8)a32] | NF;
+ F = (F & IF) | SZ[(uint8_t)a32] | NF;
if (a32 & 0x100) F |= CF | XCF; //X?
if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
if ((b8 ^ a8) & (a8 ^ a32) & 0x80) F |= VF;
@@ -1716,7 +1716,7 @@ void tlcs90_device::execute_run()
a32 = a16 + 1;
Write1_16( a32 );
F &= IF | CF;
- if ((UINT16)a32 == 0) F |= ZF | XCF;
+ if ((uint16_t)a32 == 0) F |= ZF | XCF;
if (a32 & 0x8000) F |= SF;
if ((a16 ^ 0x8000) & a32 & 0x8000) F |= VF;
if ((a16 ^ a32 ^ 1) & 0x1000) F |= HF; //??
@@ -1754,7 +1754,7 @@ void tlcs90_device::execute_run()
a32 = a16 - 1;
Write1_16( a32 );
F = (F & (IF | CF)) | NF;
- if ((UINT16)a32 == 0) F |= ZF | XCF;
+ if ((uint16_t)a32 == 0) F |= ZF | XCF;
if (a32 & 0x8000) F |= SF;
if (a16 == 0x8000) F |= VF;
if ((a16 ^ a32 ^ 1) & 0x1000) F |= HF; //??
@@ -1768,7 +1768,7 @@ void tlcs90_device::execute_run()
a32 = a8 + b8;
if ( (m_op == ADC) && (F & CF) ) a32 += 1;
Write1_8( a32 );
- F = (F & IF) | SZ[(UINT8)a32];
+ F = (F & IF) | SZ[(uint8_t)a32];
if (a32 & 0x100) F |= CF | XCF; //X?
if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
if ((b8 ^ a8 ^ 0x80) & (b8 ^ a32) & 0x80) F |= VF;
@@ -1788,7 +1788,7 @@ void tlcs90_device::execute_run()
else
{
F &= IF;
- if ((UINT16)a32 == 0) F |= ZF;
+ if ((uint16_t)a32 == 0) F |= ZF;
if (a32 & 0x8000) F |= SF;
if ((b16 ^ a16 ^ 0x8000) & (b16 ^ a32) & 0x8000) F |= VF;
}
@@ -1804,7 +1804,7 @@ void tlcs90_device::execute_run()
b8 = Read2_8();
a32 = a8 - b8;
if ( (m_op == SBC) && (F & CF) ) a32 -= 1;
- F = (F & IF) | SZ[(UINT8)a32] | NF;
+ F = (F & IF) | SZ[(uint8_t)a32] | NF;
if (a32 & 0x100) F |= CF | XCF; //X?
if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
if ((b8 ^ a8) & (a8 ^ a32) & 0x80) F |= VF;
@@ -1820,7 +1820,7 @@ void tlcs90_device::execute_run()
a32 = a16 - b16;
if ( (m_op == (SBC | OP_16)) && (F & CF) ) a32 -= 1;
F = (F & IF) | NF;
- if ((UINT16)a32 == 0) F |= ZF;
+ if ((uint16_t)a32 == 0) F |= ZF;
if (a32 & 0x8000) F |= SF;
if (a32 & 0x10000) F |= CF | XCF; //X?
if ((a16 ^ a32 ^ b16) & 0x1000) F |= HF; //??
@@ -1967,7 +1967,7 @@ void tlcs90_device::execute_run()
case DJNZ:
if ( --m_bc.b.h )
{
- m_pc.w.l += /*2 +*/ (INT8)Read1_8();
+ m_pc.w.l += /*2 +*/ (int8_t)Read1_8();
Cyc();
}
else Cyc_f();
@@ -1975,19 +1975,19 @@ void tlcs90_device::execute_run()
case DJNZ | OP_16:
if ( --m_bc.w.l )
{
- m_pc.w.l += /*2 +*/ (INT8)Read2_8();
+ m_pc.w.l += /*2 +*/ (int8_t)Read2_8();
Cyc();
}
else Cyc_f();
break;
case MUL:
- m_hl.w.l = (UINT16)m_hl.b.l * (UINT16)Read2_8();
+ m_hl.w.l = (uint16_t)m_hl.b.l * (uint16_t)Read2_8();
Cyc();
break;
case DIV:
a16 = m_hl.w.l;
- b16 = (UINT16)Read2_8();
+ b16 = (uint16_t)Read2_8();
if (b16 == 0)
{
F |= VF;
@@ -2037,7 +2037,7 @@ void tlcs90_device::device_reset()
memset(m_internal_registers, 0, sizeof(m_internal_registers));
}
-void tlcs90_device::execute_burn(INT32 cycles)
+void tlcs90_device::execute_burn(int32_t cycles)
{
m_icount -= 4 * ((cycles + 3) / 4);
}
@@ -2318,7 +2318,7 @@ READ8_MEMBER( tlcs90_device::t90_internal_registers_r )
{
#define RIO m_io->read_byte( T90_IOBASE+offset )
- UINT8 data = m_internal_registers[offset];
+ uint8_t data = m_internal_registers[offset];
switch ( T90_IOBASE + offset )
{
case T90_P3: // 7,4,1,0
@@ -2512,14 +2512,14 @@ WRITE8_MEMBER( tlcs90_device::t90_internal_registers_w )
{
#define WIO m_io->write_byte( T90_IOBASE+offset, data )
- UINT8 out_mask;
- UINT8 old = m_internal_registers[offset];
+ uint8_t out_mask;
+ uint8_t old = m_internal_registers[offset];
switch ( T90_IOBASE + offset )
{
case T90_TRUN:
{
int i;
- UINT8 mask;
+ uint8_t mask;
// Timers 0-3
for (i = 0; i < 4; i++)
{
diff --git a/src/devices/cpu/tlcs90/tlcs90.h b/src/devices/cpu/tlcs90/tlcs90.h
index 68f853994e9..3d622a74e32 100644
--- a/src/devices/cpu/tlcs90/tlcs90.h
+++ b/src/devices/cpu/tlcs90/tlcs90.h
@@ -25,7 +25,7 @@ class tlcs90_device : public cpu_device
{
public:
// construction/destruction
- tlcs90_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_constructor program_map);
+ tlcs90_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_constructor program_map);
DECLARE_READ8_MEMBER( t90_internal_registers_r );
DECLARE_WRITE8_MEMBER( t90_internal_registers_w );
@@ -41,13 +41,13 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 2; }
- virtual UINT32 execute_max_cycles() const override { return 26; }
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xff; }
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 26; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual void execute_burn(INT32 cycles) override;
+ virtual void execute_burn(int32_t cycles) override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : nullptr ); }
@@ -56,9 +56,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 6; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 6; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
enum e_mode {
@@ -74,62 +74,62 @@ private:
PAIR m_prvpc,m_pc,m_sp,m_af,m_bc,m_de,m_hl,m_ix,m_iy;
PAIR m_af2,m_bc2,m_de2,m_hl2;
- UINT8 m_halt, m_after_EI;
- UINT16 m_irq_state, m_irq_mask;
+ uint8_t m_halt, m_after_EI;
+ uint16_t m_irq_state, m_irq_mask;
address_space *m_program;
address_space *m_io;
int m_icount;
int m_extra_cycles; // extra cycles for interrupts
- UINT8 m_internal_registers[48];
- UINT32 m_ixbase,m_iybase;
+ uint8_t m_internal_registers[48];
+ uint32_t m_ixbase,m_iybase;
// Timers: 4 x 8-bit + 1 x 16-bit
emu_timer *m_timer[4+1];
- UINT8 m_timer_value[4];
- UINT16 m_timer4_value;
+ uint8_t m_timer_value[4];
+ uint16_t m_timer4_value;
attotime m_timer_period;
// Work registers
- UINT8 m_op;
+ uint8_t m_op;
e_mode m_mode1;
- UINT16 m_r1,m_r1b;
+ uint16_t m_r1,m_r1b;
e_mode m_mode2;
- UINT16 m_r2,m_r2b;
+ uint16_t m_r2,m_r2b;
int m_cyc_t,m_cyc_f;
- UINT32 m_addr;
-
- inline UINT8 RM8 (UINT32 a);
- inline UINT16 RM16(UINT32 a);
- inline void WM8 (UINT32 a, UINT8 v);
- inline void WM16(UINT32 a, UINT16 v);
- inline UINT8 RX8 (UINT32 a, UINT32 base);
- inline UINT16 RX16(UINT32 a, UINT32 base);
- inline void WX8 (UINT32 a, UINT8 v, UINT32 base);
- inline void WX16(UINT32 a, UINT16 v, UINT32 base);
- inline UINT8 READ8();
- inline UINT16 READ16();
+ uint32_t m_addr;
+
+ inline uint8_t RM8 (uint32_t a);
+ inline uint16_t RM16(uint32_t a);
+ inline void WM8 (uint32_t a, uint8_t v);
+ inline void WM16(uint32_t a, uint16_t v);
+ inline uint8_t RX8 (uint32_t a, uint32_t base);
+ inline uint16_t RX16(uint32_t a, uint32_t base);
+ inline void WX8 (uint32_t a, uint8_t v, uint32_t base);
+ inline void WX16(uint32_t a, uint16_t v, uint32_t base);
+ inline uint8_t READ8();
+ inline uint16_t READ16();
void decode();
- const char *internal_registers_names(UINT16 x);
- int sprint_arg(char *buffer, UINT32 pc, const char *pre, const e_mode mode, const UINT16 r, const UINT16 rb);
- inline UINT16 r8( const UINT16 r );
- inline void w8( const UINT16 r, UINT16 value );
- inline UINT16 r16( const UINT16 r );
- inline void w16( const UINT16 r, UINT16 value );
- inline UINT8 Read1_8();
- inline UINT16 Read1_16();
- inline UINT8 Read2_8();
- inline UINT16 Read2_16();
- inline void Write1_8( UINT8 value );
- inline void Write1_16( UINT16 value );
- inline void Write2_8( UINT8 value );
- inline void Write2_16( UINT16 value );
- inline int Test( UINT8 cond );
- inline void Push( UINT16 rr );
- inline void Pop( UINT16 rr );
+ const char *internal_registers_names(uint16_t x);
+ int sprint_arg(char *buffer, uint32_t pc, const char *pre, const e_mode mode, const uint16_t r, const uint16_t rb);
+ inline uint16_t r8( const uint16_t r );
+ inline void w8( const uint16_t r, uint16_t value );
+ inline uint16_t r16( const uint16_t r );
+ inline void w16( const uint16_t r, uint16_t value );
+ inline uint8_t Read1_8();
+ inline uint16_t Read1_16();
+ inline uint8_t Read2_8();
+ inline uint16_t Read2_16();
+ inline void Write1_8( uint8_t value );
+ inline void Write1_16( uint16_t value );
+ inline void Write2_8( uint8_t value );
+ inline void Write2_16( uint16_t value );
+ inline int Test( uint8_t cond );
+ inline void Push( uint16_t rr );
+ inline void Pop( uint16_t rr );
inline void leave_halt();
void take_interrupt(tlcs90_e_irq irq);
void check_interrupts();
@@ -147,7 +147,7 @@ class tmp90840_device : public tlcs90_device
{
public:
// construction/destruction
- tmp90840_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tmp90840_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -155,7 +155,7 @@ class tmp90841_device : public tlcs90_device
{
public:
// construction/destruction
- tmp90841_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tmp90841_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -163,14 +163,14 @@ class tmp90845_device : public tlcs90_device
{
public:
// construction/destruction
- tmp90845_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tmp90845_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tmp91640_device : public tlcs90_device
{
public:
// construction/destruction
- tmp91640_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tmp91640_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -178,7 +178,7 @@ class tmp91641_device : public tlcs90_device
{
public:
// construction/destruction
- tmp91641_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tmp91641_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tlcs900/900tbl.hxx b/src/devices/cpu/tlcs900/900tbl.hxx
index 551e27770c4..38fe13abb4f 100644
--- a/src/devices/cpu/tlcs900/900tbl.hxx
+++ b/src/devices/cpu/tlcs900/900tbl.hxx
@@ -34,7 +34,7 @@ enum e_operand
};
-int tlcs900h_device::condition_true( UINT8 cond )
+int tlcs900h_device::condition_true( uint8_t cond )
{
switch ( cond & 0x0f )
{
@@ -112,7 +112,7 @@ int tlcs900h_device::condition_true( UINT8 cond )
}
-UINT8* tlcs900h_device::get_reg8_current( UINT8 reg )
+uint8_t* tlcs900h_device::get_reg8_current( uint8_t reg )
{
switch( reg & 7 )
{
@@ -153,7 +153,7 @@ UINT8* tlcs900h_device::get_reg8_current( UINT8 reg )
}
-UINT16* tlcs900h_device::get_reg16_current( UINT8 reg )
+uint16_t* tlcs900h_device::get_reg16_current( uint8_t reg )
{
switch( reg & 7 )
{
@@ -195,7 +195,7 @@ UINT16* tlcs900h_device::get_reg16_current( UINT8 reg )
}
-UINT32* tlcs900h_device::get_reg32_current( UINT8 reg )
+uint32_t* tlcs900h_device::get_reg32_current( uint8_t reg )
{
switch( reg & 7 )
{
@@ -237,9 +237,9 @@ UINT32* tlcs900h_device::get_reg32_current( UINT8 reg )
}
-PAIR* tlcs900h_device::get_reg( UINT8 reg )
+PAIR* tlcs900h_device::get_reg( uint8_t reg )
{
- UINT8 regbank;
+ uint8_t regbank;
switch( reg & 0xf0 )
{
@@ -279,7 +279,7 @@ PAIR* tlcs900h_device::get_reg( UINT8 reg )
}
-UINT8* tlcs900h_device::get_reg8( UINT8 reg )
+uint8_t* tlcs900h_device::get_reg8( uint8_t reg )
{
PAIR *r = get_reg( reg );
@@ -295,7 +295,7 @@ UINT8* tlcs900h_device::get_reg8( UINT8 reg )
}
-UINT16* tlcs900h_device::get_reg16( UINT8 reg )
+uint16_t* tlcs900h_device::get_reg16( uint8_t reg )
{
PAIR *r = get_reg( reg );
@@ -303,7 +303,7 @@ UINT16* tlcs900h_device::get_reg16( UINT8 reg )
}
-UINT32* tlcs900h_device::get_reg32( UINT8 reg )
+uint32_t* tlcs900h_device::get_reg32( uint8_t reg )
{
PAIR *r = get_reg( reg );
@@ -312,7 +312,7 @@ UINT32* tlcs900h_device::get_reg32( UINT8 reg )
-void tlcs900h_device::parity8( UINT8 a )
+void tlcs900h_device::parity8( uint8_t a )
{
int i, j;
@@ -326,7 +326,7 @@ void tlcs900h_device::parity8( UINT8 a )
}
-void tlcs900h_device::parity16( UINT16 a )
+void tlcs900h_device::parity16( uint16_t a )
{
int i, j;
@@ -340,7 +340,7 @@ void tlcs900h_device::parity16( UINT16 a )
}
-void tlcs900h_device::parity32( UINT32 a )
+void tlcs900h_device::parity32( uint32_t a )
{
int i, j;
@@ -354,10 +354,10 @@ void tlcs900h_device::parity32( UINT32 a )
}
-UINT8 tlcs900h_device::adc8( UINT8 a, UINT8 b)
+uint8_t tlcs900h_device::adc8( uint8_t a, uint8_t b)
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
- UINT8 result = a + b + cy;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
+ uint8_t result = a + b + cy;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( result & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -369,10 +369,10 @@ UINT8 tlcs900h_device::adc8( UINT8 a, UINT8 b)
}
-UINT16 tlcs900h_device::adc16( UINT16 a, UINT16 b)
+uint16_t tlcs900h_device::adc16( uint16_t a, uint16_t b)
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
- UINT16 result = a + b + cy;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
+ uint16_t result = a + b + cy;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 8 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -384,10 +384,10 @@ UINT16 tlcs900h_device::adc16( UINT16 a, UINT16 b)
}
-UINT32 tlcs900h_device::adc32( UINT32 a, UINT32 b)
+uint32_t tlcs900h_device::adc32( uint32_t a, uint32_t b)
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
- UINT32 result = a + b + cy;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
+ uint32_t result = a + b + cy;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 24 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -398,9 +398,9 @@ UINT32 tlcs900h_device::adc32( UINT32 a, UINT32 b)
}
-UINT8 tlcs900h_device::add8( UINT8 a, UINT8 b)
+uint8_t tlcs900h_device::add8( uint8_t a, uint8_t b)
{
- UINT8 result = a + b;
+ uint8_t result = a + b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( result & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -412,9 +412,9 @@ UINT8 tlcs900h_device::add8( UINT8 a, UINT8 b)
}
-UINT16 tlcs900h_device::add16( UINT16 a, UINT16 b)
+uint16_t tlcs900h_device::add16( uint16_t a, uint16_t b)
{
- UINT16 result = a + b;
+ uint16_t result = a + b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 8 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -426,9 +426,9 @@ UINT16 tlcs900h_device::add16( UINT16 a, UINT16 b)
}
-UINT32 tlcs900h_device::add32( UINT32 a, UINT32 b)
+uint32_t tlcs900h_device::add32( uint32_t a, uint32_t b)
{
- UINT32 result = a + b;
+ uint32_t result = a + b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 24 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -439,10 +439,10 @@ UINT32 tlcs900h_device::add32( UINT32 a, UINT32 b)
}
-UINT8 tlcs900h_device::sbc8( UINT8 a, UINT8 b)
+uint8_t tlcs900h_device::sbc8( uint8_t a, uint8_t b)
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
- UINT8 result = a - b - cy;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
+ uint8_t result = a - b - cy;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_CF);
m_sr.b.l |= ( result & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -454,10 +454,10 @@ UINT8 tlcs900h_device::sbc8( UINT8 a, UINT8 b)
}
-UINT16 tlcs900h_device::sbc16( UINT16 a, UINT16 b)
+uint16_t tlcs900h_device::sbc16( uint16_t a, uint16_t b)
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
- UINT16 result = a - b - cy;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
+ uint16_t result = a - b - cy;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_CF);
m_sr.b.l |= ( ( result >> 8 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -469,10 +469,10 @@ UINT16 tlcs900h_device::sbc16( UINT16 a, UINT16 b)
}
-UINT32 tlcs900h_device::sbc32( UINT32 a, UINT32 b)
+uint32_t tlcs900h_device::sbc32( uint32_t a, uint32_t b)
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
- UINT32 result = a - b - cy;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
+ uint32_t result = a - b - cy;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_CF);
m_sr.b.l |= ( ( result >> 24 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -483,9 +483,9 @@ UINT32 tlcs900h_device::sbc32( UINT32 a, UINT32 b)
}
-UINT8 tlcs900h_device::sub8( UINT8 a, UINT8 b)
+uint8_t tlcs900h_device::sub8( uint8_t a, uint8_t b)
{
- UINT8 result = a - b;
+ uint8_t result = a - b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_CF);
m_sr.b.l |= ( result & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -497,9 +497,9 @@ UINT8 tlcs900h_device::sub8( UINT8 a, UINT8 b)
}
-UINT16 tlcs900h_device::sub16( UINT16 a, UINT16 b)
+uint16_t tlcs900h_device::sub16( uint16_t a, uint16_t b)
{
- UINT16 result = a - b;
+ uint16_t result = a - b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_CF);
m_sr.b.l |= ( ( result >> 8 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -511,9 +511,9 @@ UINT16 tlcs900h_device::sub16( UINT16 a, UINT16 b)
}
-UINT32 tlcs900h_device::sub32( UINT32 a, UINT32 b)
+uint32_t tlcs900h_device::sub32( uint32_t a, uint32_t b)
{
- UINT32 result = a - b;
+ uint32_t result = a - b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_CF);
m_sr.b.l |= ( ( result >> 24 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) |
@@ -524,9 +524,9 @@ UINT32 tlcs900h_device::sub32( UINT32 a, UINT32 b)
}
-UINT8 tlcs900h_device::and8( UINT8 a, UINT8 b)
+uint8_t tlcs900h_device::and8( uint8_t a, uint8_t b)
{
- UINT8 result = a & b;
+ uint8_t result = a & b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( result & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -537,9 +537,9 @@ UINT8 tlcs900h_device::and8( UINT8 a, UINT8 b)
}
-UINT16 tlcs900h_device::and16( UINT16 a, UINT16 b)
+uint16_t tlcs900h_device::and16( uint16_t a, uint16_t b)
{
- UINT16 result = a & b;
+ uint16_t result = a & b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 8 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -550,9 +550,9 @@ UINT16 tlcs900h_device::and16( UINT16 a, UINT16 b)
}
-UINT32 tlcs900h_device::and32( UINT32 a, UINT32 b)
+uint32_t tlcs900h_device::and32( uint32_t a, uint32_t b)
{
- UINT32 result = a & b;
+ uint32_t result = a & b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 24 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -561,9 +561,9 @@ UINT32 tlcs900h_device::and32( UINT32 a, UINT32 b)
}
-UINT8 tlcs900h_device::or8( UINT8 a, UINT8 b)
+uint8_t tlcs900h_device::or8( uint8_t a, uint8_t b)
{
- UINT8 result = a | b;
+ uint8_t result = a | b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( result & FLAG_SF ) | ( result ? 0 : FLAG_ZF );
@@ -574,9 +574,9 @@ UINT8 tlcs900h_device::or8( UINT8 a, UINT8 b)
}
-UINT16 tlcs900h_device::or16( UINT16 a, UINT16 b)
+uint16_t tlcs900h_device::or16( uint16_t a, uint16_t b)
{
- UINT16 result = a | b;
+ uint16_t result = a | b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 8 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF );
@@ -587,9 +587,9 @@ UINT16 tlcs900h_device::or16( UINT16 a, UINT16 b)
}
-UINT32 tlcs900h_device::or32( UINT32 a, UINT32 b)
+uint32_t tlcs900h_device::or32( uint32_t a, uint32_t b)
{
- UINT32 result = a | b;
+ uint32_t result = a | b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 24 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF );
@@ -598,9 +598,9 @@ UINT32 tlcs900h_device::or32( UINT32 a, UINT32 b)
}
-UINT8 tlcs900h_device::xor8( UINT8 a, UINT8 b)
+uint8_t tlcs900h_device::xor8( uint8_t a, uint8_t b)
{
- UINT8 result = a ^ b;
+ uint8_t result = a ^ b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( result & FLAG_SF ) | ( result ? 0 : FLAG_ZF );
@@ -611,9 +611,9 @@ UINT8 tlcs900h_device::xor8( UINT8 a, UINT8 b)
}
-UINT16 tlcs900h_device::xor16( UINT16 a, UINT16 b)
+uint16_t tlcs900h_device::xor16( uint16_t a, uint16_t b)
{
- UINT16 result = a ^ b;
+ uint16_t result = a ^ b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 8 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF );
@@ -624,9 +624,9 @@ UINT16 tlcs900h_device::xor16( UINT16 a, UINT16 b)
}
-UINT32 tlcs900h_device::xor32( UINT32 a, UINT32 b)
+uint32_t tlcs900h_device::xor32( uint32_t a, uint32_t b)
{
- UINT32 result = a ^ b;
+ uint32_t result = a ^ b;
m_sr.b.l &= ~(FLAG_SF | FLAG_ZF | FLAG_HF | FLAG_VF | FLAG_NF | FLAG_CF);
m_sr.b.l |= ( ( result >> 24 ) & FLAG_SF ) | ( result ? 0 : FLAG_ZF );
@@ -635,7 +635,7 @@ UINT32 tlcs900h_device::xor32( UINT32 a, UINT32 b)
}
-void tlcs900h_device::ldcf8( UINT8 a, UINT8 b )
+void tlcs900h_device::ldcf8( uint8_t a, uint8_t b )
{
if ( b & ( 1 << ( a & 0x07 ) ) )
m_sr.b.l |= FLAG_CF;
@@ -644,7 +644,7 @@ void tlcs900h_device::ldcf8( UINT8 a, UINT8 b )
}
-void tlcs900h_device::ldcf16( UINT8 a, UINT8 b )
+void tlcs900h_device::ldcf16( uint8_t a, uint8_t b )
{
if ( b & ( 1 << ( a & 0x0f ) ) )
m_sr.b.l |= FLAG_CF;
@@ -653,7 +653,7 @@ void tlcs900h_device::ldcf16( UINT8 a, UINT8 b )
}
-void tlcs900h_device::andcf8( UINT8 a, UINT8 b )
+void tlcs900h_device::andcf8( uint8_t a, uint8_t b )
{
if ( ( b & ( 1 << ( a & 0x07 ) ) ) && ( m_sr.b.l & FLAG_CF ) )
m_sr.b.l |= FLAG_CF;
@@ -662,7 +662,7 @@ void tlcs900h_device::andcf8( UINT8 a, UINT8 b )
}
-void tlcs900h_device::andcf16( UINT8 a, UINT8 b )
+void tlcs900h_device::andcf16( uint8_t a, uint8_t b )
{
if ( ( b & ( 1 << ( a & 0x0f ) ) ) && ( m_sr.b.l & FLAG_CF ) )
m_sr.b.l |= FLAG_CF;
@@ -671,37 +671,37 @@ void tlcs900h_device::andcf16( UINT8 a, UINT8 b )
}
-void tlcs900h_device::orcf8( UINT8 a, UINT8 b )
+void tlcs900h_device::orcf8( uint8_t a, uint8_t b )
{
if ( b & ( 1 << ( a & 0x07 ) ) )
m_sr.b.l |= FLAG_CF;
}
-void tlcs900h_device::orcf16( UINT8 a, UINT8 b )
+void tlcs900h_device::orcf16( uint8_t a, uint8_t b )
{
if ( b & ( 1 << ( a & 0x0f ) ) )
m_sr.b.l |= FLAG_CF;
}
-void tlcs900h_device::xorcf8( UINT8 a, UINT8 b )
+void tlcs900h_device::xorcf8( uint8_t a, uint8_t b )
{
if ( b & ( 1 << ( a & 0x07 ) ) )
m_sr.b.l ^= FLAG_CF;
}
-void tlcs900h_device::xorcf16( UINT8 a, UINT8 b )
+void tlcs900h_device::xorcf16( uint8_t a, uint8_t b )
{
if ( b & ( 1 << ( a & 0x0f ) ) )
m_sr.b.l ^= FLAG_CF;
}
-UINT8 tlcs900h_device::rl8( UINT8 a, UINT8 s )
+uint8_t tlcs900h_device::rl8( uint8_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -725,9 +725,9 @@ UINT8 tlcs900h_device::rl8( UINT8 a, UINT8 s )
}
-UINT16 tlcs900h_device::rl16( UINT16 a, UINT8 s )
+uint16_t tlcs900h_device::rl16( uint16_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -751,9 +751,9 @@ UINT16 tlcs900h_device::rl16( UINT16 a, UINT8 s )
}
-UINT32 tlcs900h_device::rl32( UINT32 a, UINT8 s )
+uint32_t tlcs900h_device::rl32( uint32_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -777,9 +777,9 @@ UINT32 tlcs900h_device::rl32( UINT32 a, UINT8 s )
return a;
}
-UINT8 tlcs900h_device::rlc8( UINT8 a, UINT8 s )
+uint8_t tlcs900h_device::rlc8( uint8_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -794,9 +794,9 @@ UINT8 tlcs900h_device::rlc8( UINT8 a, UINT8 s )
}
-UINT16 tlcs900h_device::rlc16( UINT16 a, UINT8 s )
+uint16_t tlcs900h_device::rlc16( uint16_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -811,9 +811,9 @@ UINT16 tlcs900h_device::rlc16( UINT16 a, UINT8 s )
}
-UINT32 tlcs900h_device::rlc32( UINT32 a, UINT8 s )
+uint32_t tlcs900h_device::rlc32( uint32_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -829,9 +829,9 @@ UINT32 tlcs900h_device::rlc32( UINT32 a, UINT8 s )
}
-UINT8 tlcs900h_device::rr8( UINT8 a, UINT8 s )
+uint8_t tlcs900h_device::rr8( uint8_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -855,9 +855,9 @@ UINT8 tlcs900h_device::rr8( UINT8 a, UINT8 s )
}
-UINT16 tlcs900h_device::rr16( UINT16 a, UINT8 s )
+uint16_t tlcs900h_device::rr16( uint16_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -881,9 +881,9 @@ UINT16 tlcs900h_device::rr16( UINT16 a, UINT8 s )
}
-UINT32 tlcs900h_device::rr32( UINT32 a, UINT8 s )
+uint32_t tlcs900h_device::rr32( uint32_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -908,9 +908,9 @@ UINT32 tlcs900h_device::rr32( UINT32 a, UINT8 s )
}
-UINT8 tlcs900h_device::rrc8( UINT8 a, UINT8 s )
+uint8_t tlcs900h_device::rrc8( uint8_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -925,9 +925,9 @@ UINT8 tlcs900h_device::rrc8( UINT8 a, UINT8 s )
}
-UINT16 tlcs900h_device::rrc16( UINT16 a, UINT8 s )
+uint16_t tlcs900h_device::rrc16( uint16_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -942,9 +942,9 @@ UINT16 tlcs900h_device::rrc16( UINT16 a, UINT8 s )
}
-UINT32 tlcs900h_device::rrc32( UINT32 a, UINT8 s )
+uint32_t tlcs900h_device::rrc32( uint32_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -960,9 +960,9 @@ UINT32 tlcs900h_device::rrc32( UINT32 a, UINT8 s )
}
-UINT8 tlcs900h_device::sla8( UINT8 a, UINT8 s )
+uint8_t tlcs900h_device::sla8( uint8_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -978,9 +978,9 @@ UINT8 tlcs900h_device::sla8( UINT8 a, UINT8 s )
}
-UINT16 tlcs900h_device::sla16( UINT16 a, UINT8 s )
+uint16_t tlcs900h_device::sla16( uint16_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -996,9 +996,9 @@ UINT16 tlcs900h_device::sla16( UINT16 a, UINT8 s )
}
-UINT32 tlcs900h_device::sla32( UINT32 a, UINT8 s )
+uint32_t tlcs900h_device::sla32( uint32_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -1015,9 +1015,9 @@ UINT32 tlcs900h_device::sla32( UINT32 a, UINT8 s )
}
-UINT8 tlcs900h_device::sra8( UINT8 a, UINT8 s )
+uint8_t tlcs900h_device::sra8( uint8_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -1033,9 +1033,9 @@ UINT8 tlcs900h_device::sra8( UINT8 a, UINT8 s )
}
-UINT16 tlcs900h_device::sra16( UINT16 a, UINT8 s )
+uint16_t tlcs900h_device::sra16( uint16_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -1051,9 +1051,9 @@ UINT16 tlcs900h_device::sra16( UINT16 a, UINT8 s )
}
-UINT32 tlcs900h_device::sra32( UINT32 a, UINT8 s )
+uint32_t tlcs900h_device::sra32( uint32_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -1070,9 +1070,9 @@ UINT32 tlcs900h_device::sra32( UINT32 a, UINT8 s )
}
-UINT8 tlcs900h_device::srl8( UINT8 a, UINT8 s )
+uint8_t tlcs900h_device::srl8( uint8_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -1088,9 +1088,9 @@ UINT8 tlcs900h_device::srl8( UINT8 a, UINT8 s )
}
-UINT16 tlcs900h_device::srl16( UINT16 a, UINT8 s )
+uint16_t tlcs900h_device::srl16( uint16_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -1106,9 +1106,9 @@ UINT16 tlcs900h_device::srl16( UINT16 a, UINT8 s )
}
-UINT32 tlcs900h_device::srl32( UINT32 a, UINT8 s )
+uint32_t tlcs900h_device::srl32( uint32_t a, uint8_t s )
{
- UINT8 count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
+ uint8_t count = ( s & 0x0f ) ? ( s & 0x0f ) : 16;
for ( ; count > 0; count-- )
{
@@ -1125,7 +1125,7 @@ UINT32 tlcs900h_device::srl32( UINT32 a, UINT8 s )
}
-UINT16 tlcs900h_device::div8( UINT16 a, UINT8 b )
+uint16_t tlcs900h_device::div8( uint16_t a, uint8_t b )
{
ldiv_t result;
@@ -1136,8 +1136,8 @@ UINT16 tlcs900h_device::div8( UINT16 a, UINT8 b )
}
if ( a >= ( 0x0200 * b ) ) {
- UINT16 diff = a - ( 0x0200 * b );
- UINT16 range = 0x100 - b;
+ uint16_t diff = a - ( 0x0200 * b );
+ uint16_t range = 0x100 - b;
result = ldiv( diff, range );
result.quot = 0x1ff - result.quot;
@@ -1157,7 +1157,7 @@ UINT16 tlcs900h_device::div8( UINT16 a, UINT8 b )
}
-UINT32 tlcs900h_device::div16( UINT32 a, UINT16 b )
+uint32_t tlcs900h_device::div16( uint32_t a, uint16_t b )
{
ldiv_t result;
@@ -1168,8 +1168,8 @@ UINT32 tlcs900h_device::div16( UINT32 a, UINT16 b )
}
// if ( a >= ( 0x02000000 * b ) ) {
-// UINT32 diff = a - ( 0x02000000 * b );
-// UINT32 range = 0x1000000 - b;
+// uint32_t diff = a - ( 0x02000000 * b );
+// uint32_t range = 0x1000000 - b;
//
// result = ldiv( diff, range );
// result.quot = 0x1ffffff - result.quot;
@@ -1189,7 +1189,7 @@ UINT32 tlcs900h_device::div16( UINT32 a, UINT16 b )
}
-UINT16 tlcs900h_device::divs8( INT16 a, INT8 b )
+uint16_t tlcs900h_device::divs8( int16_t a, int8_t b )
{
ldiv_t result;
@@ -1210,7 +1210,7 @@ UINT16 tlcs900h_device::divs8( INT16 a, INT8 b )
}
-UINT32 tlcs900h_device::divs16( INT32 a, INT16 b )
+uint32_t tlcs900h_device::divs16( int32_t a, int16_t b )
{
ldiv_t result;
@@ -1551,7 +1551,7 @@ void tlcs900h_device::_BITWIR()
void tlcs900h_device::_BS1BRR()
{
- UINT16 r = *m_p2_reg16;
+ uint16_t r = *m_p2_reg16;
if ( r )
{
@@ -1570,7 +1570,7 @@ void tlcs900h_device::_BS1BRR()
void tlcs900h_device::_BS1FRR()
{
- UINT16 r = *m_p2_reg16;
+ uint16_t r = *m_p2_reg16;
if ( r )
{
@@ -1729,8 +1729,8 @@ void tlcs900h_device::_CPLRR()
void tlcs900h_device::_CPD()
{
- UINT8 result = *get_reg8_current( 1 ) - RDMEM( *m_p2_reg32 );
- UINT16 *bc = get_reg16_current( 1 );
+ uint8_t result = *get_reg8_current( 1 ) - RDMEM( *m_p2_reg32 );
+ uint16_t *bc = get_reg16_current( 1 );
*m_p2_reg32 -= 1;
*bc -= 1;
@@ -1755,8 +1755,8 @@ void tlcs900h_device::_CPDR()
void tlcs900h_device::_CPDW()
{
- UINT16 result = *get_reg16_current( 0 ) - RDMEMW( *m_p2_reg32 );
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t result = *get_reg16_current( 0 ) - RDMEMW( *m_p2_reg32 );
+ uint16_t *bc = get_reg16_current( 1 );
*m_p2_reg32 -= 2;
*bc -= 1;
@@ -1781,8 +1781,8 @@ void tlcs900h_device::_CPDRW()
void tlcs900h_device::_CPI()
{
- UINT8 result = *get_reg8_current( 1 ) - RDMEM( *m_p2_reg32 );
- UINT16 *bc = get_reg16_current( 1 );
+ uint8_t result = *get_reg8_current( 1 ) - RDMEM( *m_p2_reg32 );
+ uint16_t *bc = get_reg16_current( 1 );
*m_p2_reg32 += 1;
*bc -= 1;
@@ -1807,8 +1807,8 @@ void tlcs900h_device::_CPIR()
void tlcs900h_device::_CPIW()
{
- UINT16 result = *get_reg16_current( 0 ) - RDMEMW( *m_p2_reg32 );
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t result = *get_reg16_current( 0 ) - RDMEMW( *m_p2_reg32 );
+ uint16_t *bc = get_reg16_current( 1 );
*m_p2_reg32 += 2;
*bc -= 1;
@@ -1847,11 +1847,11 @@ void tlcs900h_device::_CPLWR()
void tlcs900h_device::_DAABR()
{
- UINT8 oldval = *m_p1_reg8;
- UINT8 fixval = 0;
- UINT8 carry = 0;
- UINT8 high = *m_p1_reg8 & 0xf0;
- UINT8 low = *m_p1_reg8 & 0x0f;
+ uint8_t oldval = *m_p1_reg8;
+ uint8_t fixval = 0;
+ uint8_t carry = 0;
+ uint8_t high = *m_p1_reg8 & 0xf0;
+ uint8_t low = *m_p1_reg8 & 0x0f;
if ( m_sr.b.l & FLAG_CF )
{
@@ -1915,7 +1915,7 @@ void tlcs900h_device::_DB()
void tlcs900h_device::_DECBIM()
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
WRMEM( m_ea2.d, sub8( RDMEM( m_ea2.d ), m_imm1.b.l ? m_imm1.b.l : 8 ) );
m_sr.b.l = ( m_sr.b.l & ~ FLAG_CF ) | cy;
@@ -1924,7 +1924,7 @@ void tlcs900h_device::_DECBIM()
void tlcs900h_device::_DECBIR()
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
*m_p2_reg8 = sub8( *m_p2_reg8, m_imm1.b.l ? m_imm1.b.l : 8 );
m_sr.b.l = ( m_sr.b.l & ~ FLAG_CF ) | cy;
@@ -1933,7 +1933,7 @@ void tlcs900h_device::_DECBIR()
void tlcs900h_device::_DECWIM()
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
WRMEMW( m_ea2.d, sub16( RDMEMW( m_ea2.d ), m_imm1.b.l ? m_imm1.b.l : 8 ) );
m_sr.b.l = ( m_sr.b.l & ~ FLAG_CF ) | cy;
@@ -2065,7 +2065,7 @@ void tlcs900h_device::_EI()
void tlcs900h_device::_EXBMR()
{
- UINT8 i = RDMEM( m_ea1.d );
+ uint8_t i = RDMEM( m_ea1.d );
WRMEM( m_ea1.d, *m_p2_reg8 );
*m_p2_reg8 = i;
@@ -2074,7 +2074,7 @@ void tlcs900h_device::_EXBMR()
void tlcs900h_device::_EXBRR()
{
- UINT8 i = *m_p2_reg8;
+ uint8_t i = *m_p2_reg8;
*m_p2_reg8 = *m_p1_reg8;
*m_p1_reg8 = i;
@@ -2083,7 +2083,7 @@ void tlcs900h_device::_EXBRR()
void tlcs900h_device::_EXWMR()
{
- UINT16 i = RDMEMW( m_ea1.d );
+ uint16_t i = RDMEMW( m_ea1.d );
WRMEMW( m_ea1.d, *m_p2_reg16 );
*m_p2_reg16 = i;
@@ -2092,7 +2092,7 @@ void tlcs900h_device::_EXWMR()
void tlcs900h_device::_EXWRR()
{
- UINT16 i = *m_p2_reg16;
+ uint16_t i = *m_p2_reg16;
*m_p2_reg16 = *m_p1_reg16;
*m_p1_reg16 = i;
@@ -2137,7 +2137,7 @@ void tlcs900h_device::_HALT()
void tlcs900h_device::_INCBIM()
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
WRMEM( m_ea2.d, add8( RDMEM( m_ea2.d ), m_imm1.b.l ? m_imm1.b.l : 8 ) );
m_sr.b.l = ( m_sr.b.l & ~ FLAG_CF ) | cy;
@@ -2146,7 +2146,7 @@ void tlcs900h_device::_INCBIM()
void tlcs900h_device::_INCBIR()
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
*m_p2_reg8 = add8( *m_p2_reg8, m_imm1.b.l ? m_imm1.b.l : 8 );
m_sr.b.l = ( m_sr.b.l & ~ FLAG_CF ) | cy;
@@ -2155,7 +2155,7 @@ void tlcs900h_device::_INCBIR()
void tlcs900h_device::_INCWIM()
{
- UINT8 cy = m_sr.b.l & FLAG_CF;
+ uint8_t cy = m_sr.b.l & FLAG_CF;
WRMEMW( m_ea2.d, add16( RDMEMW( m_ea2.d ), m_imm1.b.l ? m_imm1.b.l : 8 ) );
m_sr.b.l = ( m_sr.b.l & ~ FLAG_CF ) | cy;
@@ -2386,7 +2386,7 @@ void tlcs900h_device::_LDCFWRR()
void tlcs900h_device::_LDD()
{
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t *bc = get_reg16_current( 1 );
WRMEM( *m_p1_reg32, RDMEM( *m_p2_reg32 ) );
*m_p1_reg32 -= 1;
@@ -2402,7 +2402,7 @@ void tlcs900h_device::_LDD()
void tlcs900h_device::_LDDR()
{
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t *bc = get_reg16_current( 1 );
WRMEM( *m_p1_reg32, RDMEM( *m_p2_reg32 ) );
*m_p1_reg32 -= 1;
@@ -2421,7 +2421,7 @@ void tlcs900h_device::_LDDR()
void tlcs900h_device::_LDDRW()
{
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t *bc = get_reg16_current( 1 );
WRMEMW( *m_p1_reg32, RDMEMW( *m_p2_reg32 ) );
*m_p1_reg32 -= 2;
@@ -2440,7 +2440,7 @@ void tlcs900h_device::_LDDRW()
void tlcs900h_device::_LDDW()
{
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t *bc = get_reg16_current( 1 );
WRMEMW( *m_p1_reg32, RDMEMW( *m_p2_reg32 ) );
*m_p1_reg32 -= 2;
@@ -2463,7 +2463,7 @@ void tlcs900h_device::_LDF()
void tlcs900h_device::_LDI()
{
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t *bc = get_reg16_current( 1 );
WRMEM( *m_p1_reg32, RDMEM( *m_p2_reg32 ) );
*m_p1_reg32 += 1;
@@ -2479,7 +2479,7 @@ void tlcs900h_device::_LDI()
void tlcs900h_device::_LDIR()
{
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t *bc = get_reg16_current( 1 );
WRMEM( *m_p1_reg32, RDMEM( *m_p2_reg32 ) );
*m_p1_reg32 += 1;
@@ -2498,7 +2498,7 @@ void tlcs900h_device::_LDIR()
void tlcs900h_device::_LDIRW()
{
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t *bc = get_reg16_current( 1 );
WRMEMW( *m_p1_reg32, RDMEMW( *m_p2_reg32 ) );
*m_p1_reg32 += 2;
@@ -2517,7 +2517,7 @@ void tlcs900h_device::_LDIRW()
void tlcs900h_device::_LDIW()
{
- UINT16 *bc = get_reg16_current( 1 );
+ uint16_t *bc = get_reg16_current( 1 );
WRMEMW( *m_p1_reg32, RDMEMW( *m_p2_reg32 ) );
*m_p1_reg32 += 2;
@@ -2533,7 +2533,7 @@ void tlcs900h_device::_LDIW()
void tlcs900h_device::_LDX()
{
- UINT8 a, b;
+ uint8_t a, b;
RDOP();
a = RDOP();
@@ -2615,8 +2615,8 @@ void tlcs900h_device::_MINC4()
void tlcs900h_device::_MIRRW()
{
- UINT16 r = *m_p1_reg16;
- UINT16 s = ( r & 0x01 );
+ uint16_t r = *m_p1_reg16;
+ uint16_t s = ( r & 0x01 );
int i;
@@ -2669,10 +2669,10 @@ void tlcs900h_device::_MULWRR()
void tlcs900h_device::_MULAR()
{
- UINT32 *xde = get_reg32_current( 2 );
- UINT32 *xhl = get_reg32_current( 3 );
+ uint32_t *xde = get_reg32_current( 2 );
+ uint32_t *xhl = get_reg32_current( 3 );
- *m_p1_reg32 = *m_p1_reg32 + ( ((INT16)RDMEMW( *xde )) * ((INT16)RDMEMW( *xhl )) );
+ *m_p1_reg32 = *m_p1_reg32 + ( ((int16_t)RDMEMW( *xde )) * ((int16_t)RDMEMW( *xhl )) );
*xhl -= 2;
m_sr.b.l &= ~ ( FLAG_SF | FLAG_ZF | FLAG_VF );
@@ -2682,37 +2682,37 @@ void tlcs900h_device::_MULAR()
void tlcs900h_device::_MULSBRI()
{
- *m_p1_reg16 = (INT8)( *m_p1_reg16 & 0xff ) * m_imm2.sb.l;
+ *m_p1_reg16 = (int8_t)( *m_p1_reg16 & 0xff ) * m_imm2.sb.l;
}
void tlcs900h_device::_MULSBRM()
{
- *m_p1_reg16 = (INT8)( *m_p1_reg16 & 0xff ) * (INT8)RDMEM( m_ea2.d );
+ *m_p1_reg16 = (int8_t)( *m_p1_reg16 & 0xff ) * (int8_t)RDMEM( m_ea2.d );
}
void tlcs900h_device::_MULSBRR()
{
- *m_p1_reg16 = (INT8)( *m_p1_reg16 & 0xff ) * (INT8)*m_p2_reg8;
+ *m_p1_reg16 = (int8_t)( *m_p1_reg16 & 0xff ) * (int8_t)*m_p2_reg8;
}
void tlcs900h_device::_MULSWRI()
{
- *m_p1_reg32 = (INT16)( *m_p1_reg32 & 0xffff ) * m_imm2.sw.l;
+ *m_p1_reg32 = (int16_t)( *m_p1_reg32 & 0xffff ) * m_imm2.sw.l;
}
void tlcs900h_device::_MULSWRM()
{
- *m_p1_reg32 = (INT16)( *m_p1_reg32 & 0xffff ) * (INT16)RDMEMW( m_ea2.d );
+ *m_p1_reg32 = (int16_t)( *m_p1_reg32 & 0xffff ) * (int16_t)RDMEMW( m_ea2.d );
}
void tlcs900h_device::_MULSWRR()
{
- *m_p1_reg32 = (INT16)( *m_p1_reg32 & 0xffff ) * (INT16)*m_p2_reg16;
+ *m_p1_reg32 = (int16_t)( *m_p1_reg32 & 0xffff ) * (int16_t)*m_p2_reg16;
}
@@ -3128,8 +3128,8 @@ void tlcs900h_device::_RLCLRR()
void tlcs900h_device::_RLDRM()
{
- UINT8 a = *m_p1_reg8 & 0x0f;
- UINT8 b = RDMEM( m_ea2.d );
+ uint8_t a = *m_p1_reg8 & 0x0f;
+ uint8_t b = RDMEM( m_ea2.d );
*m_p1_reg8 = ( *m_p1_reg8 & 0xf0 ) | ( ( b & 0xf0 ) >> 4 );
WRMEM( m_ea2.d, ( ( b & 0x0f ) << 4 ) | a );
@@ -3237,8 +3237,8 @@ void tlcs900h_device::_RRCLRR()
void tlcs900h_device::_RRDRM()
{
- UINT8 a = *m_p1_reg8 & 0x0f;
- UINT8 b = RDMEM( m_ea2.d );
+ uint8_t a = *m_p1_reg8 & 0x0f;
+ uint8_t b = RDMEM( m_ea2.d );
*m_p1_reg8 = ( *m_p1_reg8 & 0xf0 ) | ( b & 0x0f );
WRMEM( m_ea2.d, ( ( b & 0xf0 ) >> 4 ) | ( a << 4 ) );
@@ -3712,8 +3712,8 @@ void tlcs900h_device::_SWI()
void tlcs900h_device::_TSETBIM()
{
- UINT8 b = 1 << ( m_imm1.b.l & 0x07 );
- UINT8 a = RDMEM( m_ea2.d );
+ uint8_t b = 1 << ( m_imm1.b.l & 0x07 );
+ uint8_t a = RDMEM( m_ea2.d );
m_sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
m_sr.b.l |= ( ( a & b ) ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -3723,7 +3723,7 @@ void tlcs900h_device::_TSETBIM()
void tlcs900h_device::_TSETBIR()
{
- UINT8 b = 1 << ( m_imm1.b.l & 0x07 );
+ uint8_t b = 1 << ( m_imm1.b.l & 0x07 );
m_sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
m_sr.b.l |= ( ( *m_p2_reg8 & b ) ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -3733,7 +3733,7 @@ void tlcs900h_device::_TSETBIR()
void tlcs900h_device::_TSETWIR()
{
- UINT16 b = 1 << ( m_imm1.b.l & 0x0f );
+ uint16_t b = 1 << ( m_imm1.b.l & 0x0f );
m_sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
m_sr.b.l |= ( ( *m_p2_reg16 & b ) ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -5359,7 +5359,7 @@ void tlcs900h_device::_88()
m_ea2.d = *get_reg32_current( m_op );
m_op = RDOP();
- m_ea2.d += (INT8)m_op;
+ m_ea2.d += (int8_t)m_op;
m_cycles += 2;
m_op = RDOP();
inst = &s_mnemonic_80[m_op];
@@ -5394,7 +5394,7 @@ void tlcs900h_device::_98()
m_ea2.d = *get_reg32_current( m_op );
m_op = RDOP();
- m_ea2.d += (INT8)m_op;
+ m_ea2.d += (int8_t)m_op;
m_cycles += 2;
m_op = RDOP();
inst = &s_mnemonic_98[m_op];
@@ -5425,7 +5425,7 @@ void tlcs900h_device::_A8()
m_ea2.d = *get_reg32_current( m_op );
m_op = RDOP();
- m_ea2.d += (INT8)m_op;
+ m_ea2.d += (int8_t)m_op;
m_cycles += 2;
m_op = RDOP();
inst = &s_mnemonic_a0[m_op];
@@ -5456,7 +5456,7 @@ void tlcs900h_device::_B8()
m_ea2.d = *get_reg32_current( m_op );
m_op = RDOP();
- m_ea2.d += (INT8)m_op;
+ m_ea2.d += (int8_t)m_op;
m_cycles += 2;
m_op = RDOP();
inst = &s_mnemonic_b8[m_op];
@@ -5470,7 +5470,7 @@ void tlcs900h_device::_B8()
void tlcs900h_device::_C0()
{
const tlcs900inst *inst;
- UINT32 *reg = nullptr;
+ uint32_t *reg = nullptr;
switch ( m_op & 0x07 )
{
@@ -5522,7 +5522,7 @@ void tlcs900h_device::_C0()
m_op = RDOP();
m_ea2.d = *get_reg32( m_op );
m_op = RDOP();
- m_ea2.d += (INT8) *get_reg8( m_op );
+ m_ea2.d += (int8_t) *get_reg8( m_op );
m_cycles += 8;
break;
@@ -5531,7 +5531,7 @@ void tlcs900h_device::_C0()
m_op = RDOP();
m_ea2.d = *get_reg32( m_op );
m_op = RDOP();
- m_ea2.d += (INT16) *get_reg16( m_op );
+ m_ea2.d += (int16_t) *get_reg16( m_op );
m_cycles += 8;
break;
@@ -5599,7 +5599,7 @@ void tlcs900h_device::oC8()
void tlcs900h_device::_D0()
{
const tlcs900inst *inst;
- UINT32 *reg = nullptr;
+ uint32_t *reg = nullptr;
switch ( m_op & 0x07 )
{
@@ -5651,7 +5651,7 @@ void tlcs900h_device::_D0()
m_op = RDOP();
m_ea2.d = *get_reg32( m_op );
m_op = RDOP();
- m_ea2.d += (INT8) *get_reg8( m_op );
+ m_ea2.d += (int8_t) *get_reg8( m_op );
m_cycles += 8;
break;
@@ -5660,7 +5660,7 @@ void tlcs900h_device::_D0()
m_op = RDOP();
m_ea2.d = *get_reg32( m_op );
m_op = RDOP();
- m_ea2.d += (INT16) *get_reg16( m_op );
+ m_ea2.d += (int16_t) *get_reg16( m_op );
m_cycles += 8;
break;
@@ -5726,7 +5726,7 @@ void tlcs900h_device::oD8()
void tlcs900h_device::_E0()
{
const tlcs900inst *inst;
- UINT32 *reg = nullptr;
+ uint32_t *reg = nullptr;
switch ( m_op & 0x07 )
{
@@ -5778,7 +5778,7 @@ void tlcs900h_device::_E0()
m_op = RDOP();
m_ea2.d = *get_reg32( m_op );
m_op = RDOP();
- m_ea2.d += (INT8) *get_reg8( m_op );
+ m_ea2.d += (int8_t) *get_reg8( m_op );
m_cycles += 8;
break;
@@ -5787,7 +5787,7 @@ void tlcs900h_device::_E0()
m_op = RDOP();
m_ea2.d = *get_reg32( m_op );
m_op = RDOP();
- m_ea2.d += (INT16) *get_reg16( m_op );
+ m_ea2.d += (int16_t) *get_reg16( m_op );
m_cycles += 8;
break;
@@ -5851,7 +5851,7 @@ void tlcs900h_device::_E8()
void tlcs900h_device::_F0()
{
const tlcs900inst *inst;
- UINT32 *reg = nullptr;
+ uint32_t *reg = nullptr;
switch ( m_op & 0x07 )
{
@@ -5903,7 +5903,7 @@ void tlcs900h_device::_F0()
m_op = RDOP();
m_ea2.d = *get_reg32( m_op );
m_op = RDOP();
- m_ea2.d += (INT8) *get_reg8( m_op );
+ m_ea2.d += (int8_t) *get_reg8( m_op );
m_cycles += 8;
break;
@@ -5912,7 +5912,7 @@ void tlcs900h_device::_F0()
m_op = RDOP();
m_ea2.d = *get_reg32( m_op );
m_op = RDOP();
- m_ea2.d += (INT16) *get_reg16( m_op );
+ m_ea2.d += (int16_t) *get_reg16( m_op );
m_cycles += 8;
break;
diff --git a/src/devices/cpu/tlcs900/dasm900.cpp b/src/devices/cpu/tlcs900/dasm900.cpp
index 7231a2f4759..b07841bcce7 100644
--- a/src/devices/cpu/tlcs900/dasm900.cpp
+++ b/src/devices/cpu/tlcs900/dasm900.cpp
@@ -1438,8 +1438,8 @@ CPU_DISASSEMBLE( tlcs900 )
const tlcs900inst *dasm;
char *dst = buffer;
char buf[32];
- UINT8 op, op1;
- UINT32 imm;
+ uint8_t op, op1;
+ uint32_t imm;
int flags = 0;
int pos = 0;
@@ -1562,7 +1562,7 @@ CPU_DISASSEMBLE( tlcs900 )
case 0x13:
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
- sprintf( buf, "0x%06x", pc + pos + (INT16)imm );
+ sprintf( buf, "0x%06x", pc + pos + (int16_t)imm );
break;
}
break;
@@ -1655,7 +1655,7 @@ CPU_DISASSEMBLE( tlcs900 )
case 0x13:
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
- sprintf( buf, "0x%06x", pc + pos + (INT16)imm );
+ sprintf( buf, "0x%06x", pc + pos + (int16_t)imm );
break;
}
break;
@@ -1749,7 +1749,7 @@ CPU_DISASSEMBLE( tlcs900 )
case 0x13:
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
- sprintf( buf, "0x%06x", pc + pos + (INT16)imm );
+ sprintf( buf, "0x%06x", pc + pos + (int16_t)imm );
break;
}
break;
@@ -1842,7 +1842,7 @@ CPU_DISASSEMBLE( tlcs900 )
case 0x13:
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
- sprintf( buf, "0x%06x", pc + pos + (INT16)imm );
+ sprintf( buf, "0x%06x", pc + pos + (int16_t)imm );
break;
}
break;
@@ -1991,13 +1991,13 @@ CPU_DISASSEMBLE( tlcs900 )
case O_D8:
imm = oprom[ pos++ ];
- dst += sprintf( dst, " 0x%06x", ( pc + pos + (INT8)imm ) & 0xFFFFFF );
+ dst += sprintf( dst, " 0x%06x", ( pc + pos + (int8_t)imm ) & 0xFFFFFF );
break;
case O_D16:
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
- dst += sprintf( dst, " 0x%06x", ( pc + pos + (INT16)imm ) & 0xFFFFFF );
+ dst += sprintf( dst, " 0x%06x", ( pc + pos + (int16_t)imm ) & 0xFFFFFF );
break;
case O_F:
@@ -2177,13 +2177,13 @@ CPU_DISASSEMBLE( tlcs900 )
case O_D8:
imm = oprom[ pos++ ];
- dst += sprintf( dst, ",0x%06x", ( pc + pos + (INT8)imm ) & 0xFFFFFF );
+ dst += sprintf( dst, ",0x%06x", ( pc + pos + (int8_t)imm ) & 0xFFFFFF );
break;
case O_D16:
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
- dst += sprintf( dst, ",0x%06x", ( pc + pos + (INT16)imm ) & 0xFFFFFF );
+ dst += sprintf( dst, ",0x%06x", ( pc + pos + (int16_t)imm ) & 0xFFFFFF );
break;
case O_F:
diff --git a/src/devices/cpu/tlcs900/tlcs900.cpp b/src/devices/cpu/tlcs900/tlcs900.cpp
index 5521954bc03..cdeb65e2d21 100644
--- a/src/devices/cpu/tlcs900/tlcs900.cpp
+++ b/src/devices/cpu/tlcs900/tlcs900.cpp
@@ -42,13 +42,13 @@ static ADDRESS_MAP_START(tmp95c063_mem16, AS_PROGRAM, 16, tmp95c063_device )
ADDRESS_MAP_END
-tlcs900h_device::tlcs900h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname)
+tlcs900h_device::tlcs900h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
m_am8_16(0)
{
}
-tmp95c061_device::tmp95c061_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmp95c061_device::tmp95c061_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tlcs900h_device(mconfig, TMP95C061, "TMP95C061", tag, owner, clock, "tmp95c061" ),
m_port1_read(*this),
m_port1_write(*this),
@@ -87,7 +87,7 @@ void tmp95c061_device::device_config_complete()
}
}
-tmp95c063_device::tmp95c063_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmp95c063_device::tmp95c063_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tlcs900h_device(mconfig, TMP95C063, "TMP95C063", tag, owner, clock, "tmp95c063"),
m_port1_read(*this),
m_port1_write(*this),
@@ -141,7 +141,7 @@ void tmp95c063_device::device_config_complete()
}
-offs_t tlcs900h_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tlcs900h_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tlcs900 );
return CPU_DISASSEMBLE_NAME(tlcs900)(this, buffer, pc, oprom, opram, options);
@@ -267,9 +267,9 @@ offs_t tlcs900h_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
#define FLAG_SF 0x80
-inline UINT8 tlcs900h_device::RDOP()
+inline uint8_t tlcs900h_device::RDOP()
{
- UINT8 data;
+ uint8_t data;
if ( m_prefetch_clear )
{
@@ -531,9 +531,9 @@ void tmp95c061_device::device_reset()
#define TMP95C061_NUM_MASKABLE_IRQS 22
static const struct {
- UINT8 reg;
- UINT8 iff;
- UINT8 vector;
+ uint8_t reg;
+ uint8_t iff;
+ uint8_t vector;
} tmp95c061_irq_vector_map[TMP95C061_NUM_MASKABLE_IRQS] =
{
{ TMP95C061_INTETC32, 0x80, 0x80 }, /* INTTC3 */
@@ -564,7 +564,7 @@ static const struct {
int tmp95c061_device::tlcs900_process_hdma( int channel )
{
- UINT8 vector = ( m_reg[0x7c + channel] & 0x1f ) << 2;
+ uint8_t vector = ( m_reg[0x7c + channel] & 0x1f ) << 2;
/* Check if any HDMA actions should be performed */
if ( vector >= 0x28 && vector != 0x3C && vector < 0x74 )
@@ -763,7 +763,7 @@ void tmp95c061_device::tlcs900_check_irqs()
/* Take irq */
if ( irq >= 0 )
{
- UINT8 vector = tmp95c061_irq_vector_map[irq].vector;
+ uint8_t vector = tmp95c061_irq_vector_map[irq].vector;
m_xssp.d -= 4;
WRMEML( m_xssp.d, m_pc.d );
@@ -865,7 +865,7 @@ void tmp95c061_device::tlcs900_change_tff( int which, int change )
void tmp95c061_device::tlcs900_handle_timers()
{
- UINT32 old_pre = m_timer_pre;
+ uint32_t old_pre = m_timer_pre;
/* Is the pre-scaler active */
if ( m_reg[TMP95C061_TRUN] & 0x80 )
@@ -1450,9 +1450,9 @@ WRITE8_MEMBER( tmp95c061_device::internal_w )
#define TMP95C063_NUM_MASKABLE_IRQS 30
static const struct {
- UINT8 reg;
- UINT8 iff;
- UINT8 vector;
+ uint8_t reg;
+ uint8_t iff;
+ uint8_t vector;
} tmp95c063_irq_vector_map[TMP95C063_NUM_MASKABLE_IRQS] =
{
{ TMP95C063_INTETC23, 0x80, 0xa0 }, /* INTTC3 */
@@ -1476,7 +1476,7 @@ static const struct {
{ TMP95C063_INTET23, 0x08, 0x58 }, /* INTT2 */
{ TMP95C063_INTET01, 0x80, 0x54 }, /* INTT1 */
{ TMP95C063_INTET01, 0x08, 0x50 }, /* INTT0 */
- { TMP95C063_INTE78, 0x80, 0x4c }, /* INT8 */
+ { TMP95C063_INTE78, 0x80, 0x4c }, /* int8_t */
{ TMP95C063_INTE78, 0x08, 0x48 }, /* INT7 */
{ TMP95C063_INTE56, 0x80, 0x44 }, /* INT6 */
{ TMP95C063_INTE56, 0x08, 0x40 }, /* INT5 */
@@ -1492,7 +1492,7 @@ void tmp95c063_device::tlcs900_handle_timers()
{
// TODO: implement timers 4-7
- UINT32 old_pre = m_timer_pre;
+ uint32_t old_pre = m_timer_pre;
/* Is the pre-scaler active */
if ( m_reg[TMP95C063_T8RUN] & 0x80 )
@@ -1717,7 +1717,7 @@ void tmp95c063_device::tlcs900_check_irqs()
/* Take irq */
if ( irq >= 0 )
{
- UINT8 vector = tmp95c063_irq_vector_map[irq].vector;
+ uint8_t vector = tmp95c063_irq_vector_map[irq].vector;
m_xssp.d -= 4;
WRMEML( m_xssp.d, m_pc.d );
diff --git a/src/devices/cpu/tlcs900/tlcs900.h b/src/devices/cpu/tlcs900/tlcs900.h
index 54b68a090d5..e0ab4a99b15 100644
--- a/src/devices/cpu/tlcs900/tlcs900.h
+++ b/src/devices/cpu/tlcs900/tlcs900.h
@@ -49,7 +49,7 @@ class tlcs900h_device : public cpu_device
{
public:
// construction/destruction
- tlcs900h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname);
+ tlcs900h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname);
// static configuration helpers
static void set_am8_16(device_t &device, int am8_16) { downcast<tlcs900h_device &>(device).m_am8_16 = am8_16; }
@@ -59,9 +59,9 @@ protected:
virtual void device_start() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; } /* FIXME */
- virtual UINT32 execute_max_cycles() const override { return 1; } /* FIXME */
- virtual UINT32 execute_input_lines() const override { return 6; }
+ virtual uint32_t execute_min_cycles() const override { return 1; } /* FIXME */
+ virtual uint32_t execute_max_cycles() const override { return 1; } /* FIXME */
+ virtual uint32_t execute_input_lines() const override { return 6; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -74,20 +74,20 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 7; } /* FIXME */
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 7; } /* FIXME */
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
protected:
int m_am8_16;
address_space_config m_program_config;
- UINT8 RDMEM(offs_t addr) { return m_program->read_byte( addr ); }
- UINT16 RDMEMW(offs_t addr) { return m_program->read_word( addr ); }
- UINT32 RDMEML(offs_t addr) { return m_program->read_dword( addr ); }
- void WRMEM(offs_t addr, UINT8 data) { m_program->write_byte( addr, data ); }
- void WRMEMW(offs_t addr,UINT16 data) { m_program->write_word( addr, data ); }
- void WRMEML(offs_t addr,UINT32 data) { m_program->write_dword( addr, data ); }
+ uint8_t RDMEM(offs_t addr) { return m_program->read_byte( addr ); }
+ uint16_t RDMEMW(offs_t addr) { return m_program->read_word( addr ); }
+ uint32_t RDMEML(offs_t addr) { return m_program->read_dword( addr ); }
+ void WRMEM(offs_t addr, uint8_t data) { m_program->write_byte( addr, data ); }
+ void WRMEMW(offs_t addr,uint16_t data) { m_program->write_word( addr, data ); }
+ void WRMEML(offs_t addr,uint32_t data) { m_program->write_dword( addr, data ); }
/* registers */
PAIR m_xwa[4];
@@ -109,13 +109,13 @@ protected:
PAIR m_dmam[4];
/* Internal timers, irqs, etc */
- UINT8 m_reg[0xa0];
- UINT32 m_timer_pre;
- UINT8 m_timer[6];
+ uint8_t m_reg[0xa0];
+ uint32_t m_timer_pre;
+ uint8_t m_timer[6];
int m_timer_change[4];
bool m_prefetch_clear;
- UINT8 m_prefetch_index;
- UINT8 m_prefetch[4];
+ uint8_t m_prefetch_index;
+ uint8_t m_prefetch[4];
/* Current state of input levels */
int m_level[TLCS900_NUM_INPUTS];
@@ -125,13 +125,13 @@ protected:
/* used during execution */
PAIR m_dummy; /* for illegal register references */
- UINT8 m_op;
+ uint8_t m_op;
PAIR m_ea1, m_ea2;
PAIR m_imm1, m_imm2;
int m_cycles;
- UINT8 *m_p1_reg8, *m_p2_reg8;
- UINT16 *m_p1_reg16, *m_p2_reg16;
- UINT32 *m_p1_reg32, *m_p2_reg32;
+ uint8_t *m_p1_reg8, *m_p2_reg8;
+ uint16_t *m_p1_reg16, *m_p2_reg16;
+ uint32_t *m_p1_reg32, *m_p2_reg32;
int m_halted;
int m_icount;
@@ -162,77 +162,77 @@ protected:
static const tlcs900inst s_mnemonic_f0[256];
static const tlcs900inst s_mnemonic[256];
- inline UINT8 RDOP();
+ inline uint8_t RDOP();
virtual void tlcs900_check_hdma() = 0;
virtual void tlcs900_check_irqs() = 0;
virtual void tlcs900_handle_ad() = 0;
virtual void tlcs900_handle_timers() = 0;
- int condition_true( UINT8 cond );
- UINT8 *get_reg8_current( UINT8 reg );
- UINT16 *get_reg16_current( UINT8 reg );
- UINT32 *get_reg32_current( UINT8 reg );
- PAIR *get_reg( UINT8 reg );
- UINT8 *get_reg8( UINT8 reg );
- UINT16 *get_reg16( UINT8 reg );
- UINT32 *get_reg32( UINT8 reg );
- void parity8( UINT8 a );
- void parity16( UINT16 a );
- void parity32( UINT32 a );
- UINT8 adc8( UINT8 a, UINT8 b);
- UINT16 adc16( UINT16 a, UINT16 b);
- UINT32 adc32( UINT32 a, UINT32 b);
- UINT8 add8( UINT8 a, UINT8 b);
- UINT16 add16( UINT16 a, UINT16 b);
- UINT32 add32( UINT32 a, UINT32 b);
- UINT8 sbc8( UINT8 a, UINT8 b);
- UINT16 sbc16( UINT16 a, UINT16 b);
- UINT32 sbc32( UINT32 a, UINT32 b);
- UINT8 sub8( UINT8 a, UINT8 b);
- UINT16 sub16( UINT16 a, UINT16 b);
- UINT32 sub32( UINT32 a, UINT32 b);
- UINT8 and8( UINT8 a, UINT8 b);
- UINT16 and16( UINT16 a, UINT16 b);
- UINT32 and32( UINT32 a, UINT32 b);
- UINT8 or8( UINT8 a, UINT8 b);
- UINT16 or16( UINT16 a, UINT16 b);
- UINT32 or32( UINT32 a, UINT32 b);
- UINT8 xor8( UINT8 a, UINT8 b);
- UINT16 xor16( UINT16 a, UINT16 b);
- UINT32 xor32( UINT32 a, UINT32 b);
- void ldcf8( UINT8 a, UINT8 b );
- void ldcf16( UINT8 a, UINT8 b );
- void andcf8( UINT8 a, UINT8 b );
- void andcf16( UINT8 a, UINT8 b );
- void orcf8( UINT8 a, UINT8 b );
- void orcf16( UINT8 a, UINT8 b );
- void xorcf8( UINT8 a, UINT8 b );
- void xorcf16( UINT8 a, UINT8 b );
- UINT8 rl8( UINT8 a, UINT8 s );
- UINT16 rl16( UINT16 a, UINT8 s );
- UINT32 rl32( UINT32 a, UINT8 s );
- UINT8 rlc8( UINT8 a, UINT8 s );
- UINT16 rlc16( UINT16 a, UINT8 s );
- UINT32 rlc32( UINT32 a, UINT8 s );
- UINT8 rr8( UINT8 a, UINT8 s );
- UINT16 rr16( UINT16 a, UINT8 s );
- UINT32 rr32( UINT32 a, UINT8 s );
- UINT8 rrc8( UINT8 a, UINT8 s );
- UINT16 rrc16( UINT16 a, UINT8 s );
- UINT32 rrc32( UINT32 a, UINT8 s );
- UINT8 sla8( UINT8 a, UINT8 s );
- UINT16 sla16( UINT16 a, UINT8 s );
- UINT32 sla32( UINT32 a, UINT8 s );
- UINT8 sra8( UINT8 a, UINT8 s );
- UINT16 sra16( UINT16 a, UINT8 s );
- UINT32 sra32( UINT32 a, UINT8 s );
- UINT8 srl8( UINT8 a, UINT8 s );
- UINT16 srl16( UINT16 a, UINT8 s );
- UINT32 srl32( UINT32 a, UINT8 s );
- UINT16 div8( UINT16 a, UINT8 b );
- UINT32 div16( UINT32 a, UINT16 b );
- UINT16 divs8( INT16 a, INT8 b );
- UINT32 divs16( INT32 a, INT16 b );
+ int condition_true( uint8_t cond );
+ uint8_t *get_reg8_current( uint8_t reg );
+ uint16_t *get_reg16_current( uint8_t reg );
+ uint32_t *get_reg32_current( uint8_t reg );
+ PAIR *get_reg( uint8_t reg );
+ uint8_t *get_reg8( uint8_t reg );
+ uint16_t *get_reg16( uint8_t reg );
+ uint32_t *get_reg32( uint8_t reg );
+ void parity8( uint8_t a );
+ void parity16( uint16_t a );
+ void parity32( uint32_t a );
+ uint8_t adc8( uint8_t a, uint8_t b);
+ uint16_t adc16( uint16_t a, uint16_t b);
+ uint32_t adc32( uint32_t a, uint32_t b);
+ uint8_t add8( uint8_t a, uint8_t b);
+ uint16_t add16( uint16_t a, uint16_t b);
+ uint32_t add32( uint32_t a, uint32_t b);
+ uint8_t sbc8( uint8_t a, uint8_t b);
+ uint16_t sbc16( uint16_t a, uint16_t b);
+ uint32_t sbc32( uint32_t a, uint32_t b);
+ uint8_t sub8( uint8_t a, uint8_t b);
+ uint16_t sub16( uint16_t a, uint16_t b);
+ uint32_t sub32( uint32_t a, uint32_t b);
+ uint8_t and8( uint8_t a, uint8_t b);
+ uint16_t and16( uint16_t a, uint16_t b);
+ uint32_t and32( uint32_t a, uint32_t b);
+ uint8_t or8( uint8_t a, uint8_t b);
+ uint16_t or16( uint16_t a, uint16_t b);
+ uint32_t or32( uint32_t a, uint32_t b);
+ uint8_t xor8( uint8_t a, uint8_t b);
+ uint16_t xor16( uint16_t a, uint16_t b);
+ uint32_t xor32( uint32_t a, uint32_t b);
+ void ldcf8( uint8_t a, uint8_t b );
+ void ldcf16( uint8_t a, uint8_t b );
+ void andcf8( uint8_t a, uint8_t b );
+ void andcf16( uint8_t a, uint8_t b );
+ void orcf8( uint8_t a, uint8_t b );
+ void orcf16( uint8_t a, uint8_t b );
+ void xorcf8( uint8_t a, uint8_t b );
+ void xorcf16( uint8_t a, uint8_t b );
+ uint8_t rl8( uint8_t a, uint8_t s );
+ uint16_t rl16( uint16_t a, uint8_t s );
+ uint32_t rl32( uint32_t a, uint8_t s );
+ uint8_t rlc8( uint8_t a, uint8_t s );
+ uint16_t rlc16( uint16_t a, uint8_t s );
+ uint32_t rlc32( uint32_t a, uint8_t s );
+ uint8_t rr8( uint8_t a, uint8_t s );
+ uint16_t rr16( uint16_t a, uint8_t s );
+ uint32_t rr32( uint32_t a, uint8_t s );
+ uint8_t rrc8( uint8_t a, uint8_t s );
+ uint16_t rrc16( uint16_t a, uint8_t s );
+ uint32_t rrc32( uint32_t a, uint8_t s );
+ uint8_t sla8( uint8_t a, uint8_t s );
+ uint16_t sla16( uint16_t a, uint8_t s );
+ uint32_t sla32( uint32_t a, uint8_t s );
+ uint8_t sra8( uint8_t a, uint8_t s );
+ uint16_t sra16( uint16_t a, uint8_t s );
+ uint32_t sra32( uint32_t a, uint8_t s );
+ uint8_t srl8( uint8_t a, uint8_t s );
+ uint16_t srl16( uint16_t a, uint8_t s );
+ uint32_t srl32( uint32_t a, uint8_t s );
+ uint16_t div8( uint16_t a, uint8_t b );
+ uint32_t div16( uint32_t a, uint16_t b );
+ uint16_t divs8( int16_t a, int8_t b );
+ uint32_t divs16( int32_t a, int16_t b );
void _ADCBMI();
void _ADCBMR();
void _ADCBRI();
@@ -636,7 +636,7 @@ class tmp95c061_device : public tlcs900h_device
{
public:
// construction/destruction
- tmp95c061_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tmp95c061_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_port1_read(device_t &device, _Object object) { return downcast<tmp95c061_device &>(device).m_port1_read.set_callback(object); }
@@ -674,8 +674,8 @@ protected:
void update_porta();
private:
- UINT8 m_to1;
- UINT8 m_to3;
+ uint8_t m_to1;
+ uint8_t m_to3;
// Port 1: 8 bit I/O. Shared with D8-D15
devcb_read8 m_port1_read;
@@ -756,7 +756,7 @@ class tmp95c063_device : public tlcs900h_device
{
public:
// construction/destruction
- tmp95c063_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tmp95c063_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER( internal_r );
DECLARE_WRITE8_MEMBER( internal_w );
@@ -843,7 +843,7 @@ private:
// Port C: 8 bit input only. Shared with analogue inputs
devcb_read8 m_portc_read;
- // Port D: 5 bit I/O. Shared with INT8
+ // Port D: 5 bit I/O. Shared with int8_t
devcb_read8 m_portd_read;
devcb_write8 m_portd_write;
diff --git a/src/devices/cpu/tms1000/tms0270.cpp b/src/devices/cpu/tms1000/tms0270.cpp
index b38ce2c13b7..edb9512518d 100644
--- a/src/devices/cpu/tms1000/tms0270.cpp
+++ b/src/devices/cpu/tms1000/tms0270.cpp
@@ -32,7 +32,7 @@ ADDRESS_MAP_END
// device definitions
-tms0270_cpu_device::tms0270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms0270_cpu_device::tms0270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms0980_cpu_device(mconfig, TMS0270, "TMS0270", tag, owner, clock, 16 /* o pins */, 16 /* r pins */, 7 /* pc bits */, 9 /* byte width */, 4 /* x width */, 12 /* prg width */, ADDRESS_MAP_NAME(program_11bit_9), 8 /* data width */, ADDRESS_MAP_NAME(data_144x4), "tms0270", __FILE__)
, m_read_ctl(*this)
, m_write_ctl(*this)
@@ -145,14 +145,14 @@ void tms0270_cpu_device::dynamic_output()
}
}
-UINT8 tms0270_cpu_device::read_k_input()
+uint8_t tms0270_cpu_device::read_k_input()
{
// external: TMS5100 CTL port via SEG G,B,C,D
if (m_chipsel)
return (m_ctl_dir) ? m_ctl_out : m_read_ctl(0, 0xff) & 0xf;
// standard K-input otherwise
- UINT8 k = m_read_k(0, 0xff) & 0x1f;
+ uint8_t k = m_read_k(0, 0xff) & 0x1f;
return (k & 0x10) ? 0xf : k; // the TMS0270 KF line asserts all K-inputs
}
diff --git a/src/devices/cpu/tms1000/tms0270.h b/src/devices/cpu/tms1000/tms0270.h
index 5cac8c810ad..76bbd2f859b 100644
--- a/src/devices/cpu/tms1000/tms0270.h
+++ b/src/devices/cpu/tms1000/tms0270.h
@@ -26,7 +26,7 @@
class tms0270_cpu_device : public tms0980_cpu_device
{
public:
- tms0270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms0270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_read_ctl_callback(device_t &device, _Object object) { return downcast<tms0270_cpu_device &>(device).m_read_ctl.set_callback(object); }
@@ -40,8 +40,8 @@ protected:
virtual machine_config_constructor device_mconfig_additions() const override;
- virtual void write_o_output(UINT8 index) override { tms1k_base_device::write_o_output(index); }
- virtual UINT8 read_k_input() override;
+ virtual void write_o_output(uint8_t index) override { tms1k_base_device::write_o_output(index); }
+ virtual uint8_t read_k_input() override;
virtual void dynamic_output() override;
virtual void op_setr() override;
@@ -50,15 +50,15 @@ protected:
private:
// state specific to interface with TMS5100
- UINT16 m_r_prev;
- UINT8 m_chipsel;
- UINT8 m_ctl_out;
- UINT8 m_ctl_dir;
+ uint16_t m_r_prev;
+ uint8_t m_chipsel;
+ uint8_t m_ctl_out;
+ uint8_t m_ctl_dir;
int m_pdc;
- UINT8 m_o_latch_low;
- UINT8 m_o_latch;
- UINT8 m_o_latch_prev;
+ uint8_t m_o_latch_low;
+ uint8_t m_o_latch;
+ uint8_t m_o_latch_prev;
devcb_read8 m_read_ctl;
devcb_write8 m_write_ctl;
diff --git a/src/devices/cpu/tms1000/tms0970.cpp b/src/devices/cpu/tms1000/tms0970.cpp
index 514b7e79111..96c60fe5183 100644
--- a/src/devices/cpu/tms1000/tms0970.cpp
+++ b/src/devices/cpu/tms1000/tms0970.cpp
@@ -36,19 +36,19 @@ ADDRESS_MAP_END
// device definitions
-tms0970_cpu_device::tms0970_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms0970_cpu_device::tms0970_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1000_cpu_device(mconfig, TMS0970, "TMS0970", tag, owner, clock, 8 /* o pins */, 11 /* r pins */, 6 /* pc bits */, 8 /* byte width */, 2 /* x width */, 10 /* prg width */, ADDRESS_MAP_NAME(program_10bit_8), 6 /* data width */, ADDRESS_MAP_NAME(data_64x4), "tms0970", __FILE__)
{ }
-tms0970_cpu_device::tms0970_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+tms0970_cpu_device::tms0970_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: tms1000_cpu_device(mconfig, type, name, tag, owner, clock, o_pins, r_pins, pc_bits, byte_bits, x_bits, prgwidth, program, datawidth, data, shortname, source)
{ }
-tms0950_cpu_device::tms0950_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms0950_cpu_device::tms0950_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms0970_cpu_device(mconfig, TMS0950, "TMS0950", tag, owner, clock, 8, 11, 6, 8, 2, 10, ADDRESS_MAP_NAME(program_10bit_8), 6, ADDRESS_MAP_NAME(data_64x4), "tms0950", __FILE__)
{ }
-tms1990_cpu_device::tms1990_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1990_cpu_device::tms1990_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms0970_cpu_device(mconfig, TMS1990, "TMS1990", tag, owner, clock, 8, 11, 6, 8, 2, 10, ADDRESS_MAP_NAME(program_10bit_8), 6, ADDRESS_MAP_NAME(data_64x4), "tms1990", __FILE__)
{ }
@@ -97,9 +97,9 @@ void tms0970_cpu_device::device_reset()
// pre-decode instructionset
m_fixed_decode.resize(0x100);
- memset(&m_fixed_decode[0], 0, 0x100*sizeof(UINT32));
+ memset(&m_fixed_decode[0], 0, 0x100*sizeof(uint32_t));
m_micro_decode.resize(0x100);
- memset(&m_micro_decode[0], 0, 0x100*sizeof(UINT32));
+ memset(&m_micro_decode[0], 0, 0x100*sizeof(uint32_t));
for (int op = 0; op < 0x100; op++)
{
@@ -108,26 +108,26 @@ void tms0970_cpu_device::device_reset()
m_fixed_decode[op] = (op & 0x40) ? F_CALL: F_BR;
// 5 output bits select a microinstruction index
- UINT32 imask = m_ipla->read(op);
- UINT8 msel = imask & 0x1f;
+ uint32_t imask = m_ipla->read(op);
+ uint8_t msel = imask & 0x1f;
// but if (from bottom to top) term 1 is active and output bit 5 is 0, R2,R4-R7 directly select a microinstruction index
if (imask & 0x40 && (imask & 0x20) == 0)
msel = (op & 0xf) | (op >> 1 & 0x10);
msel = BITSWAP8(msel,7,6,5,0,1,2,3,4); // lines are reversed
- UINT32 mmask = m_mpla->read(msel);
+ uint32_t mmask = m_mpla->read(msel);
mmask ^= 0x09fe; // invert active-negative
// _____ _____ _____ _____ ______ _____ ______ _____ _____
- const UINT32 md[15] = { M_CKM, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_CIN, M_AUTA, M_AUTY, M_STO };
+ const uint32_t md[15] = { M_CKM, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_CIN, M_AUTA, M_AUTY, M_STO };
for (int bit = 0; bit < 15; bit++)
if (mmask & (1 << bit))
m_micro_decode[op] |= md[bit];
// the other ipla terms each select a fixed instruction
- const UINT32 id[8] = { F_LDP, F_TDO, F_COMX, F_LDX, F_SBIT, F_RBIT, F_SETR, F_RETN };
+ const uint32_t id[8] = { F_LDP, F_TDO, F_COMX, F_LDX, F_SBIT, F_RBIT, F_SETR, F_RETN };
for (int bit = 0; bit < 8; bit++)
if (imask & (0x80 << bit))
@@ -137,7 +137,7 @@ void tms0970_cpu_device::device_reset()
// i/o handling
-void tms0970_cpu_device::write_o_output(UINT8 index)
+void tms0970_cpu_device::write_o_output(uint8_t index)
{
m_o_index = index;
m_o = m_spla->read(index);
diff --git a/src/devices/cpu/tms1000/tms0970.h b/src/devices/cpu/tms1000/tms0970.h
index 62cfb57c4e2..360e30a42cb 100644
--- a/src/devices/cpu/tms1000/tms0970.h
+++ b/src/devices/cpu/tms1000/tms0970.h
@@ -15,15 +15,15 @@
class tms0970_cpu_device : public tms1000_cpu_device
{
public:
- tms0970_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms0970_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
+ tms0970_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms0970_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
protected:
// overrides
virtual void device_reset() override;
virtual machine_config_constructor device_mconfig_additions() const override;
- virtual void write_o_output(UINT8 index) override;
+ virtual void write_o_output(uint8_t index) override;
virtual void op_setr() override;
virtual void op_tdo() override;
@@ -32,7 +32,7 @@ protected:
class tms0950_cpu_device : public tms0970_cpu_device
{
public:
- tms0950_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms0950_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// overrides
@@ -46,7 +46,7 @@ protected:
class tms1990_cpu_device : public tms0970_cpu_device
{
public:
- tms1990_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1990_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms1000/tms0980.cpp b/src/devices/cpu/tms1000/tms0980.cpp
index 31baf2ebb9b..523844b6366 100644
--- a/src/devices/cpu/tms1000/tms0980.cpp
+++ b/src/devices/cpu/tms1000/tms0980.cpp
@@ -40,15 +40,15 @@ ADDRESS_MAP_END
// device definitions
-tms0980_cpu_device::tms0980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms0980_cpu_device::tms0980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms0970_cpu_device(mconfig, TMS0980, "TMS0980", tag, owner, clock, 8 /* o pins */, 9 /* r pins */, 7 /* pc bits */, 9 /* byte width */, 4 /* x width */, 12 /* prg width */, ADDRESS_MAP_NAME(program_11bit_9), 8 /* data width */, ADDRESS_MAP_NAME(data_144x4), "tms0980", __FILE__)
{ }
-tms0980_cpu_device::tms0980_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+tms0980_cpu_device::tms0980_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: tms0970_cpu_device(mconfig, type, name, tag, owner, clock, o_pins, r_pins, pc_bits, byte_bits, x_bits, prgwidth, program, datawidth, data, shortname, source)
{ }
-tms1980_cpu_device::tms1980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1980_cpu_device::tms1980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms0980_cpu_device(mconfig, TMS1980, "TMS1980", tag, owner, clock, 7, 10, 7, 9, 4, 12, ADDRESS_MAP_NAME(program_11bit_9), 8, ADDRESS_MAP_NAME(data_144x4), "tms1980", __FILE__)
{ }
@@ -90,7 +90,7 @@ machine_config_constructor tms1980_cpu_device::device_mconfig_additions() const
// disasm
-offs_t tms0980_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms0980_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(tms0980);
return CPU_DISASSEMBLE_NAME(tms0980)(this, buffer, pc, oprom, opram, options);
@@ -98,13 +98,13 @@ offs_t tms0980_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UIN
// device_reset
-UINT32 tms0980_cpu_device::decode_fixed(UINT16 op)
+uint32_t tms0980_cpu_device::decode_fixed(uint16_t op)
{
- UINT32 decode = 0;
- UINT32 mask = m_ipla->read(op);
+ uint32_t decode = 0;
+ uint32_t mask = m_ipla->read(op);
// 1 line per PLA row, no OR-mask
- const UINT32 id[15] = { F_LDP, F_SBL, F_OFF, F_RBIT, F_SAL, F_XDA, F_REAC, F_SETR, F_RETN, F_SBIT, F_TDO, F_COMX8, F_COMX, F_LDX, F_SEAC };
+ const uint32_t id[15] = { F_LDP, F_SBL, F_OFF, F_RBIT, F_SAL, F_XDA, F_REAC, F_SETR, F_RETN, F_SBIT, F_TDO, F_COMX8, F_COMX, F_LDX, F_SEAC };
for (int bit = 0; bit < 15; bit++)
if (mask & (0x80 << bit))
@@ -113,17 +113,17 @@ UINT32 tms0980_cpu_device::decode_fixed(UINT16 op)
return decode;
}
-UINT32 tms0980_cpu_device::decode_micro(UINT8 sel)
+uint32_t tms0980_cpu_device::decode_micro(uint8_t sel)
{
- UINT32 decode = 0;
+ uint32_t decode = 0;
sel = BITSWAP8(sel,7,6,0,1,2,3,4,5); // lines are reversed
- UINT32 mask = m_mpla->read(sel);
+ uint32_t mask = m_mpla->read(sel);
mask ^= 0x43fc3; // invert active-negative
// M_RSTR is specific to TMS02x0/TMS1980, it redirects to F_RSTR
// M_UNK1 is specific to TMS0270, unknown/unused yet and apparently not connected on every TMS0270
// _______ ______ _____ _____ _____ _____ ______ _____ ______ _____ _____
- const UINT32 md[22] = { M_NDMTP, M_DMTP, M_AUTY, M_AUTA, M_CKM, M_SSE, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_SSS, M_CME, M_CIN, M_STO, M_RSTR, M_UNK1 };
+ const uint32_t md[22] = { M_NDMTP, M_DMTP, M_AUTY, M_AUTA, M_CKM, M_SSE, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_SSS, M_CME, M_CIN, M_STO, M_RSTR, M_UNK1 };
for (int bit = 0; bit < 22 && bit < m_mpla->outputs(); bit++)
if (mask & (1 << bit))
@@ -139,11 +139,11 @@ void tms0980_cpu_device::device_reset()
// pre-decode instructionset
m_fixed_decode.resize(0x200);
- memset(&m_fixed_decode[0], 0, 0x200*sizeof(UINT32));
+ memset(&m_fixed_decode[0], 0, 0x200*sizeof(uint32_t));
m_micro_decode.resize(0x200);
- memset(&m_micro_decode[0], 0, 0x200*sizeof(UINT32));
+ memset(&m_micro_decode[0], 0, 0x200*sizeof(uint32_t));
- for (UINT16 op = 0; op < 0x200; op++)
+ for (uint16_t op = 0; op < 0x200; op++)
{
// upper half of the opcodes is always branch/call
if (op & 0x100)
@@ -159,7 +159,7 @@ void tms0980_cpu_device::device_reset()
// like on TMS0970, one of the terms directly select a microinstruction index (via R4-R8),
// but it can't be pre-determined when it's active
m_micro_direct.resize(0x40);
- memset(&m_micro_decode[0], 0, 0x40*sizeof(UINT32));
+ memset(&m_micro_decode[0], 0, 0x40*sizeof(uint32_t));
for (int op = 0; op < 0x40; op++)
m_micro_direct[op] = decode_micro(op);
@@ -167,7 +167,7 @@ void tms0980_cpu_device::device_reset()
// program counter/opcode decode
-UINT32 tms0980_cpu_device::read_micro()
+uint32_t tms0980_cpu_device::read_micro()
{
// if ipla term 0 is active, R4-R8 directly select a microinstruction index when R0 or R0^BL is 0
int r0 = m_opcode >> 8 & 1;
@@ -195,10 +195,10 @@ void tms0980_cpu_device::read_opcode()
// i/o handling
-UINT8 tms0980_cpu_device::read_k_input()
+uint8_t tms0980_cpu_device::read_k_input()
{
- UINT8 k = m_read_k(0, 0xff) & 0x1f;
- UINT8 k3 = (k & 0x10) ? 3: 0; // the TMS0980 K3 line is simply K1|K2
+ uint8_t k = m_read_k(0, 0xff) & 0x1f;
+ uint8_t k3 = (k & 0x10) ? 3: 0; // the TMS0980 K3 line is simply K1|K2
return (k & 0xf) | k3;
}
diff --git a/src/devices/cpu/tms1000/tms0980.h b/src/devices/cpu/tms1000/tms0980.h
index baaa24e01a6..921c585769b 100644
--- a/src/devices/cpu/tms1000/tms0980.h
+++ b/src/devices/cpu/tms1000/tms0980.h
@@ -15,24 +15,24 @@
class tms0980_cpu_device : public tms0970_cpu_device
{
public:
- tms0980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms0980_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
+ tms0980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms0980_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
protected:
// overrides
- virtual UINT32 decode_fixed(UINT16 op);
- virtual UINT32 decode_micro(UINT8 sel);
+ virtual uint32_t decode_fixed(uint16_t op);
+ virtual uint32_t decode_micro(uint8_t sel);
virtual void device_reset() override;
virtual machine_config_constructor device_mconfig_additions() const override;
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual UINT8 read_k_input() override;
+ virtual uint8_t read_k_input() override;
virtual void set_cki_bus() override;
- virtual UINT32 read_micro();
+ virtual uint32_t read_micro();
virtual void read_opcode() override;
virtual void op_comx() override;
@@ -41,14 +41,14 @@ protected:
class tms1980_cpu_device : public tms0980_cpu_device
{
public:
- tms1980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// overrides
virtual machine_config_constructor device_mconfig_additions() const override;
- virtual void write_o_output(UINT8 index) override { tms1k_base_device::write_o_output(index); }
- virtual UINT8 read_k_input() override { return tms1k_base_device::read_k_input(); }
+ virtual void write_o_output(uint8_t index) override { tms1k_base_device::write_o_output(index); }
+ virtual uint8_t read_k_input() override { return tms1k_base_device::read_k_input(); }
virtual void op_setr() override { tms1k_base_device::op_setr(); }
virtual void op_tdo() override;
diff --git a/src/devices/cpu/tms1000/tms1000.cpp b/src/devices/cpu/tms1000/tms1000.cpp
index 33edca13eba..5948d9753ff 100644
--- a/src/devices/cpu/tms1000/tms1000.cpp
+++ b/src/devices/cpu/tms1000/tms1000.cpp
@@ -47,31 +47,31 @@ ADDRESS_MAP_END
// device definitions
-tms1000_cpu_device::tms1000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1000_cpu_device::tms1000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1k_base_device(mconfig, TMS1000, "TMS1000", tag, owner, clock, 8 /* o pins */, 11 /* r pins */, 6 /* pc bits */, 8 /* byte width */, 2 /* x width */, 10 /* prg width */, ADDRESS_MAP_NAME(program_10bit_8), 6 /* data width */, ADDRESS_MAP_NAME(data_64x4), "tms1000", __FILE__)
{ }
-tms1000_cpu_device::tms1000_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+tms1000_cpu_device::tms1000_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: tms1k_base_device(mconfig, type, name, tag, owner, clock, o_pins, r_pins, pc_bits, byte_bits, x_bits, prgwidth, program, datawidth, data, shortname, source)
{ }
-tms1070_cpu_device::tms1070_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1070_cpu_device::tms1070_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1000_cpu_device(mconfig, TMS1070, "TMS1070", tag, owner, clock, 8, 11, 6, 8, 2, 10, ADDRESS_MAP_NAME(program_10bit_8), 6, ADDRESS_MAP_NAME(data_64x4), "tms1070", __FILE__)
{ }
-tms1040_cpu_device::tms1040_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1040_cpu_device::tms1040_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1000_cpu_device(mconfig, TMS1040, "TMS1040", tag, owner, clock, 8, 11, 6, 8, 2, 10, ADDRESS_MAP_NAME(program_10bit_8), 6, ADDRESS_MAP_NAME(data_64x4), "tms1040", __FILE__)
{ }
-tms1200_cpu_device::tms1200_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1200_cpu_device::tms1200_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1000_cpu_device(mconfig, TMS1200, "TMS1200", tag, owner, clock, 8, 13, 6, 8, 2, 10, ADDRESS_MAP_NAME(program_10bit_8), 6, ADDRESS_MAP_NAME(data_64x4), "tms1200", __FILE__)
{ }
-tms1700_cpu_device::tms1700_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1700_cpu_device::tms1700_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1000_cpu_device(mconfig, TMS1700, "TMS1700", tag, owner, clock, 8, 9, 6, 8, 2, 10, ADDRESS_MAP_NAME(program_9bit_8), 6, ADDRESS_MAP_NAME(data_32x4), "tms1700", __FILE__)
{ }
-tms1730_cpu_device::tms1730_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1730_cpu_device::tms1730_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1000_cpu_device(mconfig, TMS1730, "TMS1730", tag, owner, clock, 8, 9, 6, 8, 2, 10, ADDRESS_MAP_NAME(program_9bit_8), 6, ADDRESS_MAP_NAME(data_32x4), "tms1730", __FILE__)
{ }
@@ -93,7 +93,7 @@ machine_config_constructor tms1000_cpu_device::device_mconfig_additions() const
// disasm
-offs_t tms1000_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms1000_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(tms1000);
return CPU_DISASSEMBLE_NAME(tms1000)(this, buffer, pc, oprom, opram, options);
@@ -108,15 +108,15 @@ void tms1000_cpu_device::device_reset()
// pre-decode instructionset
m_fixed_decode.resize(0x100);
- memset(&m_fixed_decode[0], 0, 0x100*sizeof(UINT32));
+ memset(&m_fixed_decode[0], 0, 0x100*sizeof(uint32_t));
m_micro_decode.resize(0x100);
- memset(&m_micro_decode[0], 0, 0x100*sizeof(UINT32));
+ memset(&m_micro_decode[0], 0, 0x100*sizeof(uint32_t));
for (int op = 0; op < 0x100; op++)
{
// _____ _____ ______ _____ ______ _____ _____ _____ _____
- const UINT32 md[16] = { M_STSL, M_AUTY, M_AUTA, M_CIN, M_C8, M_NE, M_CKN, M_15TN, M_MTN, M_NATN, M_ATN, M_MTP, M_YTP, M_CKP, M_CKM, M_STO };
- UINT16 mask = m_mpla->read(op);
+ const uint32_t md[16] = { M_STSL, M_AUTY, M_AUTA, M_CIN, M_C8, M_NE, M_CKN, M_15TN, M_MTN, M_NATN, M_ATN, M_MTP, M_YTP, M_CKP, M_CKM, M_STO };
+ uint16_t mask = m_mpla->read(op);
mask ^= 0x3fc8; // invert active-negative
for (int bit = 0; bit < 16; bit++)
diff --git a/src/devices/cpu/tms1000/tms1000.h b/src/devices/cpu/tms1000/tms1000.h
index af8dc3fd7ee..7cb5ba66ac6 100644
--- a/src/devices/cpu/tms1000/tms1000.h
+++ b/src/devices/cpu/tms1000/tms1000.h
@@ -15,8 +15,8 @@
class tms1000_cpu_device : public tms1k_base_device
{
public:
- tms1000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms1000_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
+ tms1000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms1000_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
protected:
// overrides
@@ -24,39 +24,39 @@ protected:
virtual machine_config_constructor device_mconfig_additions() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class tms1070_cpu_device : public tms1000_cpu_device
{
public:
- tms1070_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1070_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms1040_cpu_device : public tms1000_cpu_device
{
public:
- tms1040_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1040_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms1200_cpu_device : public tms1000_cpu_device
{
public:
- tms1200_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1200_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms1700_cpu_device : public tms1000_cpu_device
{
public:
- tms1700_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1700_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms1730_cpu_device : public tms1000_cpu_device
{
public:
- tms1730_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1730_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms1000/tms1100.cpp b/src/devices/cpu/tms1000/tms1100.cpp
index 042a0bcf6bf..6ef15a98043 100644
--- a/src/devices/cpu/tms1000/tms1100.cpp
+++ b/src/devices/cpu/tms1000/tms1100.cpp
@@ -27,29 +27,29 @@ ADDRESS_MAP_END
// device definitions
-tms1100_cpu_device::tms1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1100_cpu_device::tms1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1000_cpu_device(mconfig, TMS1100, "TMS1100", tag, owner, clock, 8 /* o pins */, 11 /* r pins */, 6 /* pc bits */, 8 /* byte width */, 3 /* x width */, 11 /* prg width */, ADDRESS_MAP_NAME(program_11bit_8), 7 /* data width */, ADDRESS_MAP_NAME(data_128x4), "tms1100", __FILE__)
{ }
-tms1100_cpu_device::tms1100_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+tms1100_cpu_device::tms1100_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: tms1000_cpu_device(mconfig, type, name, tag, owner, clock, o_pins, r_pins, pc_bits, byte_bits, x_bits, prgwidth, program, datawidth, data, shortname, source)
{ }
-tms1170_cpu_device::tms1170_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1170_cpu_device::tms1170_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1100_cpu_device(mconfig, TMS1170, "TMS1170", tag, owner, clock, 8, 11, 6, 8, 3, 11, ADDRESS_MAP_NAME(program_11bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1170", __FILE__)
{ }
-tms1300_cpu_device::tms1300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1300_cpu_device::tms1300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1100_cpu_device(mconfig, TMS1300, "TMS1300", tag, owner, clock, 8, 16, 6, 8, 3, 11, ADDRESS_MAP_NAME(program_11bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1300", __FILE__)
{ }
-tms1370_cpu_device::tms1370_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1370_cpu_device::tms1370_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1100_cpu_device(mconfig, TMS1370, "TMS1370", tag, owner, clock, 8, 16, 6, 8, 3, 11, ADDRESS_MAP_NAME(program_11bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1370", __FILE__)
{ }
// disasm
-offs_t tms1100_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms1100_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(tms1100);
return CPU_DISASSEMBLE_NAME(tms1100)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms1000/tms1100.h b/src/devices/cpu/tms1000/tms1100.h
index 2a78af0f283..e57f880df12 100644
--- a/src/devices/cpu/tms1000/tms1100.h
+++ b/src/devices/cpu/tms1000/tms1100.h
@@ -15,14 +15,14 @@
class tms1100_cpu_device : public tms1000_cpu_device
{
public:
- tms1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms1100_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
+ tms1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms1100_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
protected:
// overrides
virtual void device_reset() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void op_setr() override;
virtual void op_rstr() override;
@@ -31,19 +31,19 @@ protected:
class tms1170_cpu_device : public tms1100_cpu_device
{
public:
- tms1170_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1170_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms1300_cpu_device : public tms1100_cpu_device
{
public:
- tms1300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms1370_cpu_device : public tms1100_cpu_device
{
public:
- tms1370_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1370_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms1000/tms1400.cpp b/src/devices/cpu/tms1000/tms1400.cpp
index e9246b18685..550911a9752 100644
--- a/src/devices/cpu/tms1000/tms1400.cpp
+++ b/src/devices/cpu/tms1000/tms1400.cpp
@@ -36,28 +36,28 @@ ADDRESS_MAP_END
// device definitions
-tms1400_cpu_device::tms1400_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1400_cpu_device::tms1400_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1100_cpu_device(mconfig, TMS1400, "TMS1400", tag, owner, clock, 8 /* o pins */, 11 /* r pins */, 6 /* pc bits */, 8 /* byte width */, 3 /* x width */, 12 /* prg width */, ADDRESS_MAP_NAME(program_12bit_8), 7 /* data width */, ADDRESS_MAP_NAME(data_128x4), "tms1400", __FILE__)
{ }
-tms1400_cpu_device::tms1400_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+tms1400_cpu_device::tms1400_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: tms1100_cpu_device(mconfig, type, name, tag, owner, clock, o_pins, r_pins, pc_bits, byte_bits, x_bits, prgwidth, program, datawidth, data, shortname, source)
{ }
-tms1470_cpu_device::tms1470_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1470_cpu_device::tms1470_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1400_cpu_device(mconfig, TMS1470, "TMS1470", tag, owner, clock, 8, 10, 6, 8, 3, 12, ADDRESS_MAP_NAME(program_12bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1470", __FILE__)
{ }
-tms1600_cpu_device::tms1600_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1600_cpu_device::tms1600_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1400_cpu_device(mconfig, TMS1600, "TMS1600", tag, owner, clock, 8, 16, 6, 8, 3, 12, ADDRESS_MAP_NAME(program_12bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1600", __FILE__)
{ }
-tms1600_cpu_device::tms1600_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+tms1600_cpu_device::tms1600_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: tms1400_cpu_device(mconfig, type, name, tag, owner, clock, o_pins, r_pins, pc_bits, byte_bits, x_bits, prgwidth, program, datawidth, data, shortname, source)
{ }
-tms1670_cpu_device::tms1670_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms1670_cpu_device::tms1670_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms1600_cpu_device(mconfig, TMS1670, "TMS1670", tag, owner, clock, 8, 16, 6, 8, 3, 12, ADDRESS_MAP_NAME(program_12bit_8), 7, ADDRESS_MAP_NAME(data_128x4), "tms1670", __FILE__)
{ }
diff --git a/src/devices/cpu/tms1000/tms1400.h b/src/devices/cpu/tms1000/tms1400.h
index 0b73babc223..1bfb59a821e 100644
--- a/src/devices/cpu/tms1000/tms1400.h
+++ b/src/devices/cpu/tms1000/tms1400.h
@@ -15,8 +15,8 @@
class tms1400_cpu_device : public tms1100_cpu_device
{
public:
- tms1400_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms1400_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
+ tms1400_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms1400_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
protected:
// overrides
@@ -34,21 +34,21 @@ protected:
class tms1470_cpu_device : public tms1400_cpu_device
{
public:
- tms1470_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1470_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms1600_cpu_device : public tms1400_cpu_device
{
public:
- tms1600_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms1600_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
+ tms1600_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms1600_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source);
};
class tms1670_cpu_device : public tms1600_cpu_device
{
public:
- tms1670_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms1670_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms1000/tms1k_base.cpp b/src/devices/cpu/tms1000/tms1k_base.cpp
index ef5f41f0546..b8afaa75246 100644
--- a/src/devices/cpu/tms1000/tms1k_base.cpp
+++ b/src/devices/cpu/tms1000/tms1k_base.cpp
@@ -274,7 +274,7 @@ void tms1k_base_device::read_opcode()
// i/o handling
//-------------------------------------------------
-void tms1k_base_device::write_o_output(UINT8 index)
+void tms1k_base_device::write_o_output(uint8_t index)
{
// a hardcoded table is supported if the output pla is unknown
m_o_index = index;
@@ -282,7 +282,7 @@ void tms1k_base_device::write_o_output(UINT8 index)
m_write_o(0, m_o & m_o_mask, 0xffff);
}
-UINT8 tms1k_base_device::read_k_input()
+uint8_t tms1k_base_device::read_k_input()
{
// K1,2,4,8 (KC test pin is not emulated)
return m_read_k(0, 0xff) & 0xf;
@@ -343,7 +343,7 @@ void tms1k_base_device::op_call()
// CALL/CALLL: conditional call
if (m_status)
{
- UINT8 prev_pa = m_pa;
+ uint8_t prev_pa = m_pa;
if (m_clatch == 0)
{
diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h
index aecbd041557..c4fdb99f933 100644
--- a/src/devices/cpu/tms1000/tms1k_base.h
+++ b/src/devices/cpu/tms1000/tms1k_base.h
@@ -84,7 +84,7 @@ class tms1k_base_device : public cpu_device
{
public:
// construction/destruction
- tms1k_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT8 o_pins, UINT8 r_pins, UINT8 pc_bits, UINT8 byte_bits, UINT8 x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+ tms1k_base_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint8_t o_pins, uint8_t r_pins, uint8_t pc_bits, uint8_t byte_bits, uint8_t x_bits, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, byte_bits > 8 ? 16 : 8, prgwidth, 0, program)
, m_data_config("data", ENDIANNESS_BIG, 8, datawidth, 0, data)
@@ -109,9 +109,9 @@ public:
template<class _Object> static devcb_base &set_write_o_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_write_o.set_callback(object); }
template<class _Object> static devcb_base &set_write_r_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_write_r.set_callback(object); }
template<class _Object> static devcb_base &set_power_off_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_power_off.set_callback(object); }
- static void set_output_pla(device_t &device, const UINT16 *output_pla) { downcast<tms1k_base_device &>(device).m_output_pla_table = output_pla; }
+ static void set_output_pla(device_t &device, const uint16_t *output_pla) { downcast<tms1k_base_device &>(device).m_output_pla_table = output_pla; }
- UINT8 debug_peek_o_index() { return m_o_index; } // get output PLA index, for debugging (don't use in emulation)
+ uint8_t debug_peek_o_index() { return m_o_index; } // get output PLA index, for debugging (don't use in emulation)
// microinstructions
enum
@@ -177,25 +177,25 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 6; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 6; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : nullptr); }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 1; }
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
void next_pc();
- virtual void write_o_output(UINT8 index);
- virtual UINT8 read_k_input();
+ virtual void write_o_output(uint8_t index);
+ virtual uint8_t read_k_input();
virtual void set_cki_bus();
virtual void dynamic_output() { ; } // not used by default
virtual void read_opcode();
@@ -232,70 +232,70 @@ protected:
optional_device<pla_device> m_opla;
optional_device<pla_device> m_spla;
- UINT8 m_pc; // 6 or 7-bit program counter
- UINT32 m_sr; // 6 or 7-bit subroutine return register(s)
- UINT8 m_pa; // 4-bit page address register
- UINT8 m_pb; // 4-bit page buffer register
- UINT16 m_ps; // 4-bit page subroutine register(s)
- UINT8 m_a; // 4-bit accumulator
- UINT8 m_x; // 2,3,or 4-bit RAM X register
- UINT8 m_y; // 4-bit RAM Y register
- UINT8 m_ca; // chapter address register
- UINT8 m_cb; // chapter buffer register
- UINT16 m_cs; // chapter subroutine register(s)
- UINT16 m_r;
- UINT16 m_o;
- UINT8 m_cki_bus;
- UINT8 m_c4;
- UINT8 m_p; // 4-bit adder p(lus)-input
- UINT8 m_n; // 4-bit adder n(egative)-input
- UINT8 m_adder_out; // adder result
- UINT8 m_carry_in; // adder carry-in bit
- UINT8 m_carry_out; // adder carry-out bit
- UINT8 m_status;
- UINT8 m_status_latch;
- UINT8 m_eac; // end around carry bit
- UINT8 m_clatch; // call latch bit(s)
- UINT8 m_add; // add latch bit
- UINT8 m_bl; // branch latch bit
-
- UINT8 m_ram_in;
- UINT8 m_dam_in;
+ uint8_t m_pc; // 6 or 7-bit program counter
+ uint32_t m_sr; // 6 or 7-bit subroutine return register(s)
+ uint8_t m_pa; // 4-bit page address register
+ uint8_t m_pb; // 4-bit page buffer register
+ uint16_t m_ps; // 4-bit page subroutine register(s)
+ uint8_t m_a; // 4-bit accumulator
+ uint8_t m_x; // 2,3,or 4-bit RAM X register
+ uint8_t m_y; // 4-bit RAM Y register
+ uint8_t m_ca; // chapter address register
+ uint8_t m_cb; // chapter buffer register
+ uint16_t m_cs; // chapter subroutine register(s)
+ uint16_t m_r;
+ uint16_t m_o;
+ uint8_t m_cki_bus;
+ uint8_t m_c4;
+ uint8_t m_p; // 4-bit adder p(lus)-input
+ uint8_t m_n; // 4-bit adder n(egative)-input
+ uint8_t m_adder_out; // adder result
+ uint8_t m_carry_in; // adder carry-in bit
+ uint8_t m_carry_out; // adder carry-out bit
+ uint8_t m_status;
+ uint8_t m_status_latch;
+ uint8_t m_eac; // end around carry bit
+ uint8_t m_clatch; // call latch bit(s)
+ uint8_t m_add; // add latch bit
+ uint8_t m_bl; // branch latch bit
+
+ uint8_t m_ram_in;
+ uint8_t m_dam_in;
int m_ram_out; // signed!
- UINT8 m_ram_address;
- UINT16 m_rom_address;
- UINT16 m_opcode;
- UINT32 m_fixed;
- UINT32 m_micro;
+ uint8_t m_ram_address;
+ uint16_t m_rom_address;
+ uint16_t m_opcode;
+ uint32_t m_fixed;
+ uint32_t m_micro;
int m_subcycle;
int m_icount;
- UINT8 m_o_index;
+ uint8_t m_o_index;
- UINT8 m_o_pins; // how many O pins
- UINT8 m_r_pins; // how many R pins
- UINT8 m_pc_bits; // how many program counter bits
- UINT8 m_byte_bits; // how many bits per 'byte'
- UINT8 m_x_bits; // how many X register bits
+ uint8_t m_o_pins; // how many O pins
+ uint8_t m_r_pins; // how many R pins
+ uint8_t m_pc_bits; // how many program counter bits
+ uint8_t m_byte_bits; // how many bits per 'byte'
+ uint8_t m_x_bits; // how many X register bits
address_space *m_program;
address_space *m_data;
- const UINT16 *m_output_pla_table;
+ const uint16_t *m_output_pla_table;
devcb_read8 m_read_k;
devcb_write16 m_write_o;
devcb_write16 m_write_r;
devcb_write_line m_power_off;
- UINT32 m_o_mask;
- UINT32 m_r_mask;
- UINT32 m_k_mask;
- UINT32 m_pc_mask;
- UINT32 m_x_mask;
+ uint32_t m_o_mask;
+ uint32_t m_r_mask;
+ uint32_t m_k_mask;
+ uint32_t m_pc_mask;
+ uint32_t m_x_mask;
// lookup tables
- std::vector<UINT32> m_fixed_decode;
- std::vector<UINT32> m_micro_decode;
- std::vector<UINT32> m_micro_direct;
+ std::vector<uint32_t> m_fixed_decode;
+ std::vector<uint32_t> m_micro_decode;
+ std::vector<uint32_t> m_micro_direct;
};
diff --git a/src/devices/cpu/tms1000/tms1k_dasm.cpp b/src/devices/cpu/tms1000/tms1k_dasm.cpp
index 291b31ded95..8b2befad62a 100644
--- a/src/devices/cpu/tms1000/tms1k_dasm.cpp
+++ b/src/devices/cpu/tms1000/tms1k_dasm.cpp
@@ -39,7 +39,7 @@ static const char *const s_mnemonic[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] =
+static const uint32_t s_flags[] =
{
0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, _OVER, 0,
@@ -57,7 +57,7 @@ enum e_addressing
zB0 = 0, zI2, zI3, zI4, zB7
};
-static const UINT8 s_addressing[] =
+static const uint8_t s_addressing[] =
{
zB0,
zB0, zB0, zB0, zI4, zI4, zI4, zI4, zB0, zB0, zB7, zB7, zB0,
@@ -73,7 +73,7 @@ static const UINT8 s_addressing[] =
// opcode luts
-static const UINT8 tms1000_mnemonic[256] =
+static const uint8_t tms1000_mnemonic[256] =
{
/* 0x00 */
zCOMX, zA8AAC, zYNEA, zTAM, zTAMZA, zA10AAC, zA6AAC, zDAN, zTKA, zKNEZ, zTDO, zCLO, zRSTR, zSETR, zIA, zRETN, // 0
@@ -97,7 +97,7 @@ static const UINT8 tms1000_mnemonic[256] =
};
-static const UINT8 tms1100_mnemonic[256] =
+static const uint8_t tms1100_mnemonic[256] =
{
/* 0x00 */
zMNEA, zALEM, zYNEA, zXMA, zDYN, zIYC, zAMAAC, zDMAN, zTKA, zCOMX, zTDO, zCOMC, zRSTR, zSETR, zKNEZ, zRETN, // 0
@@ -121,7 +121,7 @@ static const UINT8 tms1100_mnemonic[256] =
};
-static const UINT8 tms0980_mnemonic[512] =
+static const uint8_t tms0980_mnemonic[512] =
{
/* 0x000 */
zCOMX, zALEM, zYNEA, zXMA, zDYN, zIYC, zCLA, zDMAN, zTKA, zMNEA, zTKM, 0, 0, zSETR, zKNEZ, 0, // 0
@@ -163,7 +163,7 @@ static const UINT8 tms0980_mnemonic[512] =
};
-static const UINT8 tp0320_mnemonic[512] =
+static const uint8_t tp0320_mnemonic[512] =
{
/* 0x000 */
0, zALEM, zYNEA, zXMA, zDYN, zIYC, zCLA, zDMAN, zTKA, zMNEA, zTKM, 0, 0, zSETR, zKNEZ, 0, // 0
@@ -208,31 +208,31 @@ static const UINT8 tp0320_mnemonic[512] =
// disasm
-static const UINT8 i2_value[4] =
+static const uint8_t i2_value[4] =
{
0, 2, 1, 3
};
-static const UINT8 i3_value[8] =
+static const uint8_t i3_value[8] =
{
0, 4, 2, 6, 1, 5, 3, 7
};
-static const UINT8 i4_value[16] =
+static const uint8_t i4_value[16] =
{
0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe, 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf
};
-static offs_t tms1k_dasm(char *dst, const UINT8 *oprom, const UINT8 *lut_mnemonic, UINT16 opcode_mask)
+static offs_t tms1k_dasm(char *dst, const uint8_t *oprom, const uint8_t *lut_mnemonic, uint16_t opcode_mask)
{
// get current opcode
int pos = 0;
- UINT16 op = oprom[pos++];
+ uint16_t op = oprom[pos++];
if (opcode_mask & 0x100)
op = (op << 8 | oprom[pos++]) & 0x1ff;
// convert to mnemonic/param
- UINT16 instr = lut_mnemonic[op];
+ uint16_t instr = lut_mnemonic[op];
dst += sprintf(dst, "%-8s ", s_mnemonic[instr]);
switch( s_addressing[instr] )
diff --git a/src/devices/cpu/tms1000/tp0320.cpp b/src/devices/cpu/tms1000/tp0320.cpp
index b58c9e1a8ed..ab33c3788e2 100644
--- a/src/devices/cpu/tms1000/tp0320.cpp
+++ b/src/devices/cpu/tms1000/tp0320.cpp
@@ -36,7 +36,7 @@ ADDRESS_MAP_END
// device definitions
-tp0320_cpu_device::tp0320_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tp0320_cpu_device::tp0320_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms0980_cpu_device(mconfig, TP0320, "TP0320", tag, owner, clock, 7 /* o pins */, 10 /* r pins */, 7 /* pc bits */, 9 /* byte width */, 4 /* x width */, 12 /* prg width */, ADDRESS_MAP_NAME(program_11bit_9), 8 /* data width */, ADDRESS_MAP_NAME(data_192x4), "tp0320", __FILE__)
{ }
@@ -58,7 +58,7 @@ machine_config_constructor tp0320_cpu_device::device_mconfig_additions() const
// disasm
-offs_t tp0320_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tp0320_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(tp0320);
return CPU_DISASSEMBLE_NAME(tp0320)(this, buffer, pc, oprom, opram, options);
@@ -66,16 +66,16 @@ offs_t tp0320_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT
// device_reset
-UINT32 tp0320_cpu_device::decode_micro(UINT8 sel)
+uint32_t tp0320_cpu_device::decode_micro(uint8_t sel)
{
- UINT32 decode = 0;
+ uint32_t decode = 0;
sel = BITSWAP8(sel,7,6,0,1,2,3,4,5); // lines are reversed
- UINT32 mask = m_mpla->read(sel);
+ uint32_t mask = m_mpla->read(sel);
mask ^= 0x0bff0; // invert active-negative
// _____ _______ ______ _____ _____ ______ _____ _____ ______ _____ _____
- const UINT32 md[22] = { M_AUTA, M_AUTY, M_SSS, M_STO, M_YTP, M_NDMTP, M_DMTP, M_MTP, M_CKP, M_15TN, M_CKN, M_MTN, M_NATN, M_ATN, M_CME, M_CIN, M_SSE, M_CKM, M_NE, M_C8, M_SETR, M_RSTR };
+ const uint32_t md[22] = { M_AUTA, M_AUTY, M_SSS, M_STO, M_YTP, M_NDMTP, M_DMTP, M_MTP, M_CKP, M_15TN, M_CKN, M_MTN, M_NATN, M_ATN, M_CME, M_CIN, M_SSE, M_CKM, M_NE, M_C8, M_SETR, M_RSTR };
for (int bit = 0; bit < 22 && bit < m_mpla->outputs(); bit++)
if (mask & (1 << bit))
diff --git a/src/devices/cpu/tms1000/tp0320.h b/src/devices/cpu/tms1000/tp0320.h
index 517b748927f..a85fc253cc4 100644
--- a/src/devices/cpu/tms1000/tp0320.h
+++ b/src/devices/cpu/tms1000/tp0320.h
@@ -15,16 +15,16 @@
class tp0320_cpu_device : public tms0980_cpu_device
{
public:
- tp0320_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tp0320_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// overrides
//virtual void device_start() override;
- virtual UINT32 decode_fixed(UINT16 op) override { return 0; } // not yet
- virtual UINT32 decode_micro(UINT8 sel) override;
+ virtual uint32_t decode_fixed(uint16_t op) override { return 0; } // not yet
+ virtual uint32_t decode_micro(uint8_t sel) override;
virtual void device_reset() override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual machine_config_constructor device_mconfig_additions() const override;
};
diff --git a/src/devices/cpu/tms32010/32010dsm.cpp b/src/devices/cpu/tms32010/32010dsm.cpp
index 67f598d2b85..bea830175d6 100644
--- a/src/devices/cpu/tms32010/32010dsm.cpp
+++ b/src/devices/cpu/tms32010/32010dsm.cpp
@@ -208,7 +208,7 @@ static void InitDasm32010(void)
fatalerror("not enough bits in encoding '%s %s' %d\n",
ops[0],ops[1],bit);
}
- while (isspace((UINT8)*p)) p++;
+ while (isspace((uint8_t)*p)) p++;
if (*p) Op[i].extcode = *p;
Op[i].bits = bits;
Op[i].mask = mask;
@@ -224,7 +224,7 @@ static void InitDasm32010(void)
CPU_DISASSEMBLE( tms32010 )
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
int a, b, d, k, m, n, p, r, s, w; /* these can all be filled in by parsing an instruction */
int i;
int op;
diff --git a/src/devices/cpu/tms32010/tms32010.cpp b/src/devices/cpu/tms32010/tms32010.cpp
index 146d95ab113..e5108cb0c7e 100644
--- a/src/devices/cpu/tms32010/tms32010.cpp
+++ b/src/devices/cpu/tms32010/tms32010.cpp
@@ -97,7 +97,7 @@ static ADDRESS_MAP_START( tms32015_ram, AS_DATA, 16, tms32010_device )
ADDRESS_MAP_END
-tms32010_device::tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32010_device::tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS32010, "TMS32010", tag, owner, clock, "tms32010", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 16, 12, -1)
, m_data_config("data", ENDIANNESS_BIG, 16, 8, -1, ADDRESS_MAP_NAME(tms32010_ram))
@@ -108,7 +108,7 @@ tms32010_device::tms32010_device(const machine_config &mconfig, const char *tag,
}
-tms32010_device::tms32010_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int addr_mask)
+tms32010_device::tms32010_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int addr_mask)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 16, 12, -1)
, m_data_config("data", ENDIANNESS_BIG, 16, 8, -1, ADDRESS_MAP_NAME(tms32015_ram))
@@ -119,19 +119,19 @@ tms32010_device::tms32010_device(const machine_config &mconfig, device_type type
}
-tms32015_device::tms32015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32015_device::tms32015_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms32010_device(mconfig, TMS32015, "TMS32015", tag, owner, clock, "tms32015", __FILE__, 0x0fff)
{
}
-tms32016_device::tms32016_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32016_device::tms32016_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms32010_device(mconfig, TMS32016, "TMS32016", tag, owner, clock, "tms32016", __FILE__, 0xffff)
{
}
-offs_t tms32010_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms32010_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms32010 );
return CPU_DISASSEMBLE_NAME(tms32010)(this, buffer, pc, oprom, opram, options);
@@ -225,36 +225,36 @@ offs_t tms32010_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
* Shortcuts
************************************************************************/
-void tms32010_device::CLR(UINT16 flag) { m_STR &= ~flag; m_STR |= 0x1efe; }
-void tms32010_device::SET_FLAG(UINT16 flag) { m_STR |= flag; m_STR |= 0x1efe; }
+void tms32010_device::CLR(uint16_t flag) { m_STR &= ~flag; m_STR |= 0x1efe; }
+void tms32010_device::SET_FLAG(uint16_t flag) { m_STR |= flag; m_STR |= 0x1efe; }
-void tms32010_device::CALCULATE_ADD_OVERFLOW(INT32 addval)
+void tms32010_device::CALCULATE_ADD_OVERFLOW(int32_t addval)
{
- if ((INT32)(~(m_oldacc.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0) {
+ if ((int32_t)(~(m_oldacc.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0) {
SET_FLAG(OV_FLAG);
if (OVM)
- m_ACC.d = ((INT32)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
+ m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
}
}
-void tms32010_device::CALCULATE_SUB_OVERFLOW(INT32 subval)
+void tms32010_device::CALCULATE_SUB_OVERFLOW(int32_t subval)
{
- if ((INT32)((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0) {
+ if ((int32_t)((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0) {
SET_FLAG(OV_FLAG);
if (OVM)
- m_ACC.d = ((INT32)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
+ m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
}
}
-UINT16 tms32010_device::POP_STACK()
+uint16_t tms32010_device::POP_STACK()
{
- UINT16 data = m_STACK[3];
+ uint16_t data = m_STACK[3];
m_STACK[3] = m_STACK[2];
m_STACK[2] = m_STACK[1];
m_STACK[1] = m_STACK[0];
return (data & m_addr_mask);
}
-void tms32010_device::PUSH_STACK(UINT16 data)
+void tms32010_device::PUSH_STACK(uint16_t data)
{
m_STACK[0] = m_STACK[1];
m_STACK[1] = m_STACK[2];
@@ -265,7 +265,7 @@ void tms32010_device::PUSH_STACK(UINT16 data)
void tms32010_device::UPDATE_AR()
{
if (m_opcode.b.l & 0x30) {
- UINT16 tmpAR = m_AR[ARP];
+ uint16_t tmpAR = m_AR[ARP];
if (m_opcode.b.l & 0x20) tmpAR++ ;
if (m_opcode.b.l & 0x10) tmpAR-- ;
m_AR[ARP] = (m_AR[ARP] & 0xfe00) | (tmpAR & 0x01ff);
@@ -280,15 +280,15 @@ void tms32010_device::UPDATE_ARP()
}
-void tms32010_device::getdata(UINT8 shift,UINT8 signext)
+void tms32010_device::getdata(uint8_t shift,uint8_t signext)
{
if (m_opcode.b.l & 0x80)
m_memaccess = IND;
else
m_memaccess = DMA_DP;
- m_ALU.d = (UINT16)M_RDRAM(m_memaccess);
- if (signext) m_ALU.d = (INT16)m_ALU.d;
+ m_ALU.d = (uint16_t)M_RDRAM(m_memaccess);
+ if (signext) m_ALU.d = (int16_t)m_ALU.d;
m_ALU.d <<= shift;
if (m_opcode.b.l & 0x80) {
UPDATE_AR();
@@ -296,7 +296,7 @@ void tms32010_device::getdata(UINT8 shift,UINT8 signext)
}
}
-void tms32010_device::putdata(UINT16 data)
+void tms32010_device::putdata(uint16_t data)
{
if (m_opcode.b.l & 0x80)
m_memaccess = IND;
@@ -309,7 +309,7 @@ void tms32010_device::putdata(UINT16 data)
}
M_WRTRAM(m_memaccess,data);
}
-void tms32010_device::putdata_sar(UINT8 data)
+void tms32010_device::putdata_sar(uint8_t data)
{
if (m_opcode.b.l & 0x80)
m_memaccess = IND;
@@ -322,7 +322,7 @@ void tms32010_device::putdata_sar(UINT8 data)
}
M_WRTRAM(m_memaccess,m_AR[data]);
}
-void tms32010_device::putdata_sst(UINT16 data)
+void tms32010_device::putdata_sst(uint16_t data)
{
if (m_opcode.b.l & 0x80)
m_memaccess = IND;
@@ -354,7 +354,7 @@ void tms32010_device::illegal()
void tms32010_device::abst()
{
- if ( (INT32)(m_ACC.d) < 0 ) {
+ if ( (int32_t)(m_ACC.d) < 0 ) {
m_ACC.d = -m_ACC.d;
if (OVM && (m_ACC.d == 0x80000000)) m_ACC.d-- ;
}
@@ -381,10 +381,10 @@ void tms32010_device::addh()
m_oldacc.d = m_ACC.d;
getdata(0,0);
m_ACC.w.h += m_ALU.w.l;
- if ((INT16)(~(m_oldacc.w.h ^ m_ALU.w.h) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) {
+ if ((int16_t)(~(m_oldacc.w.h ^ m_ALU.w.h) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) {
SET_FLAG(OV_FLAG);
if (OVM)
- m_ACC.w.h = ((INT16)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
+ m_ACC.w.h = ((int16_t)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
}
}
void tms32010_device::adds()
@@ -423,7 +423,7 @@ void tms32010_device::banz()
}
void tms32010_device::bgez()
{
- if ( (INT32)(m_ACC.d) >= 0 ) {
+ if ( (int32_t)(m_ACC.d) >= 0 ) {
m_PC = M_RDOP_ARG(m_PC);
m_icount -= add_branch_cycle();
}
@@ -432,7 +432,7 @@ void tms32010_device::bgez()
}
void tms32010_device::bgz()
{
- if ( (INT32)(m_ACC.d) > 0 ) {
+ if ( (int32_t)(m_ACC.d) > 0 ) {
m_PC = M_RDOP_ARG(m_PC);
m_icount -= add_branch_cycle();
}
@@ -450,7 +450,7 @@ void tms32010_device::bioz()
}
void tms32010_device::blez()
{
- if ( (INT32)(m_ACC.d) <= 0 ) {
+ if ( (int32_t)(m_ACC.d) <= 0 ) {
m_PC = M_RDOP_ARG(m_PC);
m_icount -= add_branch_cycle();
}
@@ -459,7 +459,7 @@ void tms32010_device::blez()
}
void tms32010_device::blz()
{
- if ( (INT32)(m_ACC.d) < 0 ) {
+ if ( (int32_t)(m_ACC.d) < 0 ) {
m_PC = M_RDOP_ARG(m_PC);
m_icount -= add_branch_cycle();
}
@@ -608,12 +608,12 @@ void tms32010_device::ltd()
void tms32010_device::mpy()
{
getdata(0,0);
- m_Preg.d = (INT16)m_ALU.w.l * (INT16)m_Treg;
+ m_Preg.d = (int16_t)m_ALU.w.l * (int16_t)m_Treg;
if (m_Preg.d == 0x40000000) m_Preg.d = 0xc0000000;
}
void tms32010_device::mpyk()
{
- m_Preg.d = (INT16)m_Treg * ((INT16)(m_opcode.w.l << 3) >> 3);
+ m_Preg.d = (int16_t)m_Treg * ((int16_t)(m_opcode.w.l << 3) >> 3);
}
void tms32010_device::nop()
{
@@ -692,10 +692,10 @@ void tms32010_device::subc()
{
m_oldacc.d = m_ACC.d;
getdata(15,0);
- m_ALU.d = (INT32) m_ACC.d - m_ALU.d;
- if ((INT32)((m_oldacc.d ^ m_ALU.d) & (m_oldacc.d ^ m_ACC.d)) < 0)
+ m_ALU.d = (int32_t) m_ACC.d - m_ALU.d;
+ if ((int32_t)((m_oldacc.d ^ m_ALU.d) & (m_oldacc.d ^ m_ACC.d)) < 0)
SET_FLAG(OV_FLAG);
- if ( (INT32)(m_ALU.d) >= 0 )
+ if ( (int32_t)(m_ALU.d) >= 0 )
m_ACC.d = ((m_ALU.d << 1) + 1);
else
m_ACC.d = (m_ACC.d << 1);
diff --git a/src/devices/cpu/tms32010/tms32010.h b/src/devices/cpu/tms32010/tms32010.h
index d595b073997..99c2f084e62 100644
--- a/src/devices/cpu/tms32010/tms32010.h
+++ b/src/devices/cpu/tms32010/tms32010.h
@@ -43,8 +43,8 @@ class tms32010_device : public cpu_device
{
public:
// construction/destruction
- tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms32010_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int addr_mask);
+ tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms32010_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int addr_mask);
// static configuration helpers
template<class _Object> static devcb_base & set_bio_in_cb(device_t &device, _Object object) { return downcast<tms32010_device &>(device).m_bio_in.set_callback(object); }
@@ -55,13 +55,13 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 3; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 3; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : nullptr ) ); }
@@ -70,9 +70,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -84,28 +84,28 @@ private:
typedef void ( tms32010_device::*opcode_func ) ();
struct tms32010_opcode
{
- UINT8 cycles;
+ uint8_t cycles;
opcode_func function;
};
static const tms32010_opcode s_opcode_main[256];
static const tms32010_opcode s_opcode_7F[32];
/******************** CPU Internal Registers *******************/
- UINT16 m_PC;
- UINT16 m_PREVPC; /* previous program counter */
- UINT16 m_STR;
+ uint16_t m_PC;
+ uint16_t m_PREVPC; /* previous program counter */
+ uint16_t m_STR;
PAIR m_ACC;
PAIR m_ALU;
PAIR m_Preg;
- UINT16 m_Treg;
- UINT16 m_AR[2];
- UINT16 m_STACK[4];
+ uint16_t m_Treg;
+ uint16_t m_AR[2];
+ uint16_t m_STACK[4];
PAIR m_opcode;
int m_INTF; /* Pending Interrupt flag */
int m_icount;
PAIR m_oldacc;
- UINT16 m_memaccess;
+ uint16_t m_memaccess;
int m_addr_mask;
address_space *m_program;
@@ -113,18 +113,18 @@ private:
address_space *m_data;
address_space *m_io;
- inline void CLR(UINT16 flag);
- inline void SET_FLAG(UINT16 flag);
- inline void CALCULATE_ADD_OVERFLOW(INT32 addval);
- inline void CALCULATE_SUB_OVERFLOW(INT32 subval);
- inline UINT16 POP_STACK();
- inline void PUSH_STACK(UINT16 data);
+ inline void CLR(uint16_t flag);
+ inline void SET_FLAG(uint16_t flag);
+ inline void CALCULATE_ADD_OVERFLOW(int32_t addval);
+ inline void CALCULATE_SUB_OVERFLOW(int32_t subval);
+ inline uint16_t POP_STACK();
+ inline void PUSH_STACK(uint16_t data);
inline void UPDATE_AR();
inline void UPDATE_ARP();
- inline void getdata(UINT8 shift,UINT8 signext);
- inline void putdata(UINT16 data);
- inline void putdata_sar(UINT8 data);
- inline void putdata_sst(UINT16 data);
+ inline void getdata(uint8_t shift,uint8_t signext);
+ inline void putdata(uint16_t data);
+ inline void putdata_sar(uint8_t data);
+ inline void putdata_sst(uint16_t data);
void opcodes_7F();
void illegal();
void abst();
@@ -199,7 +199,7 @@ class tms32015_device : public tms32010_device
{
public:
// construction/destruction
- tms32015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms32015_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -207,7 +207,7 @@ class tms32016_device : public tms32010_device
{
public:
// construction/destruction
- tms32016_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms32016_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms32025/32025dsm.cpp b/src/devices/cpu/tms32025/32025dsm.cpp
index d87fc55e6cf..8c9a0405eca 100644
--- a/src/devices/cpu/tms32025/32025dsm.cpp
+++ b/src/devices/cpu/tms32025/32025dsm.cpp
@@ -373,7 +373,7 @@ static void InitDasm32025(void)
fatalerror("not enough bits in encoding '%s %s' %d\n",
ops[0],ops[1],bit);
}
- while (isspace((UINT8)*p)) p++;
+ while (isspace((uint8_t)*p)) p++;
if (*p) Op[i].extcode = *p;
Op[i].bits = bits;
Op[i].mask = mask;
@@ -389,7 +389,7 @@ static void InitDasm32025(void)
CPU_DISASSEMBLE( tms32025 )
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
int a, b, c, d, k, m, n, p, r, s, t, w; /* these can all be filled in by parsing an instruction */
int i;
int op;
diff --git a/src/devices/cpu/tms32025/tms32025.cpp b/src/devices/cpu/tms32025/tms32025.cpp
index 5ce29bf10ab..991b5a0b050 100644
--- a/src/devices/cpu/tms32025/tms32025.cpp
+++ b/src/devices/cpu/tms32025/tms32025.cpp
@@ -206,7 +206,7 @@ const device_type TMS32025 = &device_creator<tms32025_device>;
const device_type TMS32026 = &device_creator<tms32026_device>;
-tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS32025, "TMS32025", tag, owner, clock, "tms32025", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 16, 16, -1)
, m_data_config("data", ENDIANNESS_BIG, 16, 16, -1)
@@ -221,7 +221,7 @@ tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag,
}
-tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 16, 16, -1)
, m_data_config("data", ENDIANNESS_BIG, 16, 16, -1)
@@ -236,23 +236,23 @@ tms32025_device::tms32025_device(const machine_config &mconfig, device_type type
}
-tms32026_device::tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32026_device::tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms32025_device(mconfig, TMS32026, "TMS32026", tag, owner, clock, "tms32026", __FILE__)
{
}
-offs_t tms32025_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms32025_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms32025 );
return CPU_DISASSEMBLE_NAME(tms32025)(this, buffer, pc, oprom, opram, options);
}
-void tms32025_device::CLR0(UINT16 flag) { m_STR0 &= ~flag; m_STR0 |= 0x0400; }
-void tms32025_device::SET0(UINT16 flag) { m_STR0 |= flag; m_STR0 |= 0x0400; }
-void tms32025_device::CLR1(UINT16 flag) { m_STR1 &= ~flag; m_STR1 |= 0x0180; }
-void tms32025_device::SET1(UINT16 flag) { m_STR1 |= flag; m_STR1 |= 0x0180; }
+void tms32025_device::CLR0(uint16_t flag) { m_STR0 &= ~flag; m_STR0 |= 0x0400; }
+void tms32025_device::SET0(uint16_t flag) { m_STR0 |= flag; m_STR0 |= 0x0400; }
+void tms32025_device::CLR1(uint16_t flag) { m_STR1 &= ~flag; m_STR1 |= 0x0180; }
+void tms32025_device::SET1(uint16_t flag) { m_STR1 |= flag; m_STR1 |= 0x0180; }
void tms32025_device::MODIFY_DP(int data)
{
@@ -276,36 +276,36 @@ void tms32025_device::MODIFY_ARP(int data)
m_STR0 |= 0x0400;
}
-UINT16 tms32025_device::M_RDROM(offs_t addr)
+uint16_t tms32025_device::M_RDROM(offs_t addr)
{
- UINT16 *ram;
+ uint16_t *ram;
addr &= 0xffff;
ram = m_pgmmap[addr >> 7];
if (ram) return ram[addr & 0x7f];
return m_program->read_word(addr << 1);
}
-void tms32025_device::M_WRTROM(offs_t addr, UINT16 data)
+void tms32025_device::M_WRTROM(offs_t addr, uint16_t data)
{
- UINT16 *ram;
+ uint16_t *ram;
addr &= 0xffff;
ram = m_pgmmap[addr >> 7];
if (ram) { ram[addr & 0x7f] = data; }
else m_program->write_word(addr << 1, data);
}
-UINT16 tms32025_device::M_RDRAM(offs_t addr)
+uint16_t tms32025_device::M_RDRAM(offs_t addr)
{
- UINT16 *ram;
+ uint16_t *ram;
addr &= 0xffff;
ram = m_datamap[addr >> 7];
if (ram) return ram[addr & 0x7f];
return m_data->read_word(addr << 1);
}
-void tms32025_device::M_WRTRAM(offs_t addr, UINT16 data)
+void tms32025_device::M_WRTRAM(offs_t addr, uint16_t data)
{
- UINT16 *ram;
+ uint16_t *ram;
addr &= 0xffff;
ram = m_datamap[addr >> 7];
if (ram) {
@@ -321,9 +321,9 @@ void tms32025_device::M_WRTRAM(offs_t addr, UINT16 data)
}
-UINT16 tms32025_device::reverse_carry_add(UINT16 arg0, UINT16 arg1 )
+uint16_t tms32025_device::reverse_carry_add(uint16_t arg0, uint16_t arg1 )
{
- UINT16 result = 0;
+ uint16_t result = 0;
int carry = 0;
int count;
for( count=0; count<16; count++ )
@@ -383,7 +383,7 @@ void tms32025_device::MODIFY_AR_ARP()
void tms32025_device::CALCULATE_ADD_CARRY()
{
- if ( (UINT32)(m_oldacc.d) > (UINT32)(m_ACC.d) ) {
+ if ( (uint32_t)(m_oldacc.d) > (uint32_t)(m_ACC.d) ) {
SET1(C_FLAG);
}
else {
@@ -393,7 +393,7 @@ void tms32025_device::CALCULATE_ADD_CARRY()
void tms32025_device::CALCULATE_SUB_CARRY()
{
- if ( (UINT32)(m_oldacc.d) < (UINT32)(m_ACC.d) ) {
+ if ( (uint32_t)(m_oldacc.d) < (uint32_t)(m_ACC.d) ) {
CLR1(C_FLAG);
}
else {
@@ -401,32 +401,32 @@ void tms32025_device::CALCULATE_SUB_CARRY()
}
}
-void tms32025_device::CALCULATE_ADD_OVERFLOW(INT32 addval)
+void tms32025_device::CALCULATE_ADD_OVERFLOW(int32_t addval)
{
- if ((INT32)((m_ACC.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0)
+ if ((int32_t)((m_ACC.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0)
{
SET0(OV_FLAG);
if (OVM)
{
- m_ACC.d = ((INT32)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
+ m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
}
}
}
-void tms32025_device::CALCULATE_SUB_OVERFLOW(INT32 subval)
+void tms32025_device::CALCULATE_SUB_OVERFLOW(int32_t subval)
{
- if ((INT32)((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0)
+ if ((int32_t)((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0)
{
SET0(OV_FLAG);
if (OVM)
{
- m_ACC.d = ((INT32)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
+ m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
}
}
}
-UINT16 tms32025_device::POP_STACK()
+uint16_t tms32025_device::POP_STACK()
{
- UINT16 data = m_STACK[7];
+ uint16_t data = m_STACK[7];
m_STACK[7] = m_STACK[6];
m_STACK[6] = m_STACK[5];
m_STACK[5] = m_STACK[4];
@@ -436,7 +436,7 @@ UINT16 tms32025_device::POP_STACK()
m_STACK[1] = m_STACK[0];
return data;
}
-void tms32025_device::PUSH_STACK(UINT16 data)
+void tms32025_device::PUSH_STACK(uint16_t data)
{
m_STACK[0] = m_STACK[1];
m_STACK[1] = m_STACK[2];
@@ -480,15 +480,15 @@ void tms32025_device::GETDATA(int shift,int signext)
m_external_mem_access = 0;
}
- m_ALU.d = (UINT16)M_RDRAM(m_memaccess);
- if (signext) m_ALU.d = (INT16)m_ALU.d;
+ m_ALU.d = (uint16_t)M_RDRAM(m_memaccess);
+ if (signext) m_ALU.d = (int16_t)m_ALU.d;
m_ALU.d <<= shift;
/* next ARP */
if (m_opcode.b.l & 0x80) MODIFY_AR_ARP();
}
-void tms32025_device::PUTDATA(UINT16 data)
+void tms32025_device::PUTDATA(uint16_t data)
{
if (m_opcode.b.l & 0x80) {
if (m_memaccess >= 0x800) m_external_mem_access = 1; /* Pause if hold pin is active */
@@ -504,7 +504,7 @@ void tms32025_device::PUTDATA(UINT16 data)
M_WRTRAM(DMA, data);
}
}
-void tms32025_device::PUTDATA_SST(UINT16 data)
+void tms32025_device::PUTDATA_SST(uint16_t data)
{
if (m_opcode.b.l & 0x80) m_memaccess = IND;
else m_memaccess = DMApg0;
@@ -537,7 +537,7 @@ void tms32025_device::illegal()
void tms32025_device::abst()
{
- if ( (INT32)(m_ACC.d) < 0 ) {
+ if ( (int32_t)(m_ACC.d) < 0 ) {
m_ACC.d = -m_ACC.d;
if (m_ACC.d == 0x80000000) {
SET0(OV_FLAG);
@@ -569,18 +569,18 @@ void tms32025_device::addh()
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
m_ACC.w.h += m_ALU.w.l;
- if ( (UINT16)(m_oldacc.w.h) > (UINT16)(m_ACC.w.h) ) {
+ if ( (uint16_t)(m_oldacc.w.h) > (uint16_t)(m_ACC.w.h) ) {
SET1(C_FLAG); /* Carry flag is not cleared, if no carry occurred */
}
- if ((INT16)((m_ACC.w.h ^ m_ALU.w.l) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) {
+ if ((int16_t)((m_ACC.w.h ^ m_ALU.w.l) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) {
SET0(OV_FLAG);
- if (OVM) m_ACC.w.h = ((INT16)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
+ if (OVM) m_ACC.w.h = ((int16_t)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
}
}
void tms32025_device::addk()
{
m_oldacc.d = m_ACC.d;
- m_ALU.d = (UINT8)m_opcode.b.l;
+ m_ALU.d = (uint8_t)m_opcode.b.l;
m_ACC.d += m_ALU.d;
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
@@ -604,8 +604,8 @@ void tms32025_device::addt()
void tms32025_device::adlk()
{
m_oldacc.d = m_ACC.d;
- if (SXM) m_ALU.d = (INT16)M_RDOP_ARG(m_PC);
- else m_ALU.d = (UINT16)M_RDOP_ARG(m_PC);
+ if (SXM) m_ALU.d = (int16_t)M_RDOP_ARG(m_PC);
+ else m_ALU.d = (uint16_t)M_RDOP_ARG(m_PC);
m_PC++;
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d += m_ALU.d;
@@ -624,7 +624,7 @@ void tms32025_device::and_()
void tms32025_device::andk()
{
m_oldacc.d = m_ACC.d;
- m_ALU.d = (UINT16)M_RDOP_ARG(m_PC);
+ m_ALU.d = (uint16_t)M_RDOP_ARG(m_PC);
m_PC++;
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d &= m_ALU.d;
@@ -672,13 +672,13 @@ void tms32025_device::bc()
}
void tms32025_device::bgez()
{
- if ( (INT32)(m_ACC.d) >= 0 ) SET_PC(M_RDOP_ARG(m_PC));
+ if ( (int32_t)(m_ACC.d) >= 0 ) SET_PC(M_RDOP_ARG(m_PC));
else m_PC++ ;
MODIFY_AR_ARP();
}
void tms32025_device::bgz()
{
- if ( (INT32)(m_ACC.d) > 0 ) SET_PC(M_RDOP_ARG(m_PC));
+ if ( (int32_t)(m_ACC.d) > 0 ) SET_PC(M_RDOP_ARG(m_PC));
else m_PC++ ;
MODIFY_AR_ARP();
}
@@ -702,7 +702,7 @@ void tms32025_device::bitt()
}
void tms32025_device::blez()
{
- if ( (INT32)(m_ACC.d) <= 0 ) SET_PC(M_RDOP_ARG(m_PC));
+ if ( (int32_t)(m_ACC.d) <= 0 ) SET_PC(M_RDOP_ARG(m_PC));
else m_PC++ ;
MODIFY_AR_ARP();
}
@@ -730,7 +730,7 @@ void tms32025_device::blkp()
}
void tms32025_device::blz()
{
- if ( (INT32)(m_ACC.d) < 0 ) SET_PC(M_RDOP_ARG(m_PC));
+ if ( (int32_t)(m_ACC.d) < 0 ) SET_PC(M_RDOP_ARG(m_PC));
else m_PC++ ;
MODIFY_AR_ARP();
}
@@ -790,16 +790,16 @@ void tms32025_device::cmpr()
{
switch (m_opcode.b.l & 3)
{
- case 00: if ( (UINT16)(m_AR[ARP]) == (UINT16)(m_AR[0]) ) SET1(TC_FLAG);
+ case 00: if ( (uint16_t)(m_AR[ARP]) == (uint16_t)(m_AR[0]) ) SET1(TC_FLAG);
else CLR1(TC_FLAG);
break;
- case 01: if ( (UINT16)(m_AR[ARP]) < (UINT16)(m_AR[0]) ) SET1(TC_FLAG);
+ case 01: if ( (uint16_t)(m_AR[ARP]) < (uint16_t)(m_AR[0]) ) SET1(TC_FLAG);
else CLR1(TC_FLAG);
break;
- case 02: if ( (UINT16)(m_AR[ARP]) > (UINT16)(m_AR[0]) ) SET1(TC_FLAG);
+ case 02: if ( (uint16_t)(m_AR[ARP]) > (uint16_t)(m_AR[0]) ) SET1(TC_FLAG);
else CLR1(TC_FLAG);
break;
- case 03: if ( (UINT16)(m_AR[ARP]) != (UINT16)(m_AR[0]) ) SET1(TC_FLAG);
+ case 03: if ( (uint16_t)(m_AR[ARP]) != (uint16_t)(m_AR[0]) ) SET1(TC_FLAG);
else CLR1(TC_FLAG);
break;
}
@@ -968,7 +968,7 @@ void tms32025_device::lac()
}
void tms32025_device::lack() /* ZAC is a subset of this instruction */
{
- m_ACC.d = (UINT8)m_opcode.b.l;
+ m_ACC.d = (uint8_t)m_opcode.b.l;
}
void tms32025_device::lact()
{
@@ -977,8 +977,8 @@ void tms32025_device::lact()
}
void tms32025_device::lalk()
{
- if (SXM) m_ALU.d = (INT16)M_RDOP_ARG(m_PC);
- else m_ALU.d = (UINT16)M_RDOP_ARG(m_PC);
+ if (SXM) m_ALU.d = (int16_t)M_RDOP_ARG(m_PC);
+ else m_ALU.d = (uint16_t)M_RDOP_ARG(m_PC);
m_PC++;
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d = m_ALU.d;
@@ -1015,7 +1015,7 @@ void tms32025_device::lph()
}
void tms32025_device::lrlk()
{
- m_ALU.d = (UINT16)M_RDOP_ARG(m_PC);
+ m_ALU.d = (uint16_t)M_RDOP_ARG(m_PC);
m_PC++;
m_AR[m_opcode.b.h & 7] = m_ALU.w.l;
}
@@ -1098,7 +1098,7 @@ void tms32025_device::mac() /** RAM blocks B0,B1,B2 may be important !
CALCULATE_ADD_CARRY();
GETDATA(0, 0);
m_Treg = m_ALU.w.l;
- m_Preg.d = ( (INT16)m_ALU.w.l * (INT16)M_RDROM(m_PFC) );
+ m_Preg.d = ( (int16_t)m_ALU.w.l * (int16_t)M_RDROM(m_PFC) );
m_PFC++;
m_tms32025_dec_cycles += (2*CLK);
}
@@ -1118,7 +1118,7 @@ void tms32025_device::macd() /** RAM blocks B0,B1,B2 may be important !
M_WRTRAM((m_memaccess+1), m_ALU.w.l);
}
m_Treg = m_ALU.w.l;
- m_Preg.d = ( (INT16)m_ALU.w.l * (INT16)M_RDROM(m_PFC) );
+ m_Preg.d = ( (int16_t)m_ALU.w.l * (int16_t)M_RDROM(m_PFC) );
m_PFC++;
m_tms32025_dec_cycles += (2*CLK);
}
@@ -1129,7 +1129,7 @@ void tms32025_device::mar() /* LARP and NOP are a subset of this instructi
void tms32025_device::mpy()
{
GETDATA(0, 0);
- m_Preg.d = (INT16)(m_ALU.w.l) * (INT16)(m_Treg);
+ m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg);
}
void tms32025_device::mpya()
{
@@ -1139,11 +1139,11 @@ void tms32025_device::mpya()
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
GETDATA(0, 0);
- m_Preg.d = (INT16)(m_ALU.w.l) * (INT16)(m_Treg);
+ m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg);
}
void tms32025_device::mpyk()
{
- m_Preg.d = (INT16)m_Treg * ((INT16)(m_opcode.w.l << 3) >> 3);
+ m_Preg.d = (int16_t)m_Treg * ((int16_t)(m_opcode.w.l << 3) >> 3);
}
void tms32025_device::mpys()
@@ -1154,12 +1154,12 @@ void tms32025_device::mpys()
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
GETDATA(0, 0);
- m_Preg.d = (INT16)(m_ALU.w.l) * (INT16)(m_Treg);
+ m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg);
}
void tms32025_device::mpyu()
{
GETDATA(0, 0);
- m_Preg.d = (UINT16)(m_ALU.w.l) * (UINT16)(m_Treg);
+ m_Preg.d = (uint16_t)(m_ALU.w.l) * (uint16_t)(m_Treg);
}
void tms32025_device::neg()
{
@@ -1176,7 +1176,7 @@ void tms32025_device::nop() { } // NOP is a subset of the MAR instruction
*/
void tms32025_device::norm()
{
- if (m_ACC.d !=0 && (INT32)(m_ACC.d ^ (m_ACC.d << 1)) >= 0)
+ if (m_ACC.d !=0 && (int32_t)(m_ACC.d ^ (m_ACC.d << 1)) >= 0)
{
CLR1(TC_FLAG);
m_ACC.d <<= 1;
@@ -1191,7 +1191,7 @@ void tms32025_device::or_()
}
void tms32025_device::ork()
{
- m_ALU.d = (UINT16)M_RDOP_ARG(m_PC);
+ m_ALU.d = (uint16_t)M_RDOP_ARG(m_PC);
m_PC++;
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d |= (m_ALU.d);
@@ -1208,11 +1208,11 @@ void tms32025_device::pac()
}
void tms32025_device::pop()
{
- m_ACC.d = (UINT16)POP_STACK();
+ m_ACC.d = (uint16_t)POP_STACK();
}
void tms32025_device::popd()
{
- m_ALU.d = (UINT16)POP_STACK();
+ m_ALU.d = (uint16_t)POP_STACK();
PUTDATA(m_ALU.w.l);
}
void tms32025_device::pshd()
@@ -1310,8 +1310,8 @@ void tms32025_device::sar_ar7() { PUTDATA(m_AR[7]); }
void tms32025_device::sblk()
{
m_oldacc.d = m_ACC.d;
- if (SXM) m_ALU.d = (INT16)M_RDOP_ARG(m_PC);
- else m_ALU.d = (UINT16)M_RDOP_ARG(m_PC);
+ if (SXM) m_ALU.d = (int16_t)M_RDOP_ARG(m_PC);
+ else m_ALU.d = (uint16_t)M_RDOP_ARG(m_PC);
m_PC++;
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d -= m_ALU.d;
@@ -1386,7 +1386,7 @@ void tms32025_device::sqra()
CALCULATE_ADD_CARRY();
GETDATA(0, 0);
m_Treg = m_ALU.w.l;
- m_Preg.d = ((INT16)m_ALU.w.l * (INT16)m_ALU.w.l);
+ m_Preg.d = ((int16_t)m_ALU.w.l * (int16_t)m_ALU.w.l);
}
void tms32025_device::sqrs()
{
@@ -1397,7 +1397,7 @@ void tms32025_device::sqrs()
CALCULATE_SUB_CARRY();
GETDATA(0, 0);
m_Treg = m_ALU.w.l;
- m_Preg.d = ((INT16)m_ALU.w.l * (INT16)m_ALU.w.l);
+ m_Preg.d = ((int16_t)m_ALU.w.l * (int16_t)m_ALU.w.l);
}
void tms32025_device::sst()
{
@@ -1442,7 +1442,7 @@ void tms32025_device::subc()
m_oldacc.d = m_ACC.d;
GETDATA(15, SXM);
m_ACC.d -= m_ALU.d; /* Temporary switch to ACC. Actual calculation is done as (ACC)-[mem] -> ALU, will be preserved later on. */
- if ((INT32)((m_oldacc.d ^ m_ALU.d) & (m_oldacc.d ^ m_ACC.d)) < 0) {
+ if ((int32_t)((m_oldacc.d ^ m_ALU.d) & (m_oldacc.d ^ m_ACC.d)) < 0) {
SET0(OV_FLAG); /* Not affected by OVM */
}
CALCULATE_SUB_CARRY();
@@ -1460,18 +1460,18 @@ void tms32025_device::subh()
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
m_ACC.w.h -= m_ALU.w.l;
- if ( (UINT16)(m_oldacc.w.h) < (UINT16)(m_ACC.w.h) ) {
+ if ( (uint16_t)(m_oldacc.w.h) < (uint16_t)(m_ACC.w.h) ) {
CLR1(C_FLAG); /* Carry flag is not affected, if no borrow occurred */
}
- if ((INT16)((m_oldacc.w.h ^ m_ALU.w.l) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) {
+ if ((int16_t)((m_oldacc.w.h ^ m_ALU.w.l) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) {
SET0(OV_FLAG);
- if (OVM) m_ACC.w.h = ((INT16)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
+ if (OVM) m_ACC.w.h = ((int16_t)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
}
}
void tms32025_device::subk()
{
m_oldacc.d = m_ACC.d;
- m_ALU.d = (UINT8)m_opcode.b.l;
+ m_ALU.d = (uint8_t)m_opcode.b.l;
m_ACC.d -= m_ALU.b.l;
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
@@ -1503,7 +1503,7 @@ void tms32025_device::tblr()
m_PFC = m_ACC.w.l;
}
m_ALU.w.l = M_RDROM(m_PFC);
- if ( (CNF0) && ( (UINT16)(m_PFC) >= 0xff00 ) ) {} /** TMS32025 only */
+ if ( (CNF0) && ( (uint16_t)(m_PFC) >= 0xff00 ) ) {} /** TMS32025 only */
else m_tms32025_dec_cycles += (1*CLK);
PUTDATA(m_ALU.w.l);
m_PFC++;
@@ -2127,7 +2127,7 @@ void tms32025_device::execute_run()
}
m_init_load_addr = 0;
m_RPTC-- ;
- } while ((INT8)(m_RPTC) != -1);
+ } while ((int8_t)(m_RPTC) != -1);
m_RPTC = 0;
m_PFC = m_PC;
m_init_load_addr = 1;
@@ -2179,7 +2179,7 @@ void tms32025_device::execute_set_input(int irqline, int state)
/****************************************************************************
* Opcode fetcher
****************************************************************************/
-bool tms32025_device::memory_readop(offs_t offset, int size, UINT64 &value)
+bool tms32025_device::memory_readop(offs_t offset, int size, uint64_t &value)
{
void *ptr;
@@ -2187,13 +2187,13 @@ bool tms32025_device::memory_readop(offs_t offset, int size, UINT64 &value)
if (!m_pgmmap[offset >> 8])
return 0;
- ptr = &((UINT8 *)&m_pgmmap[offset >> 8])[offset & 0xff];
+ ptr = &((uint8_t *)&m_pgmmap[offset >> 8])[offset & 0xff];
switch (size)
{
- case 1: value = *((UINT8 *) ptr);
- case 2: value = *((UINT16 *) ptr);
- case 4: value = *((UINT32 *) ptr);
- case 8: value = *((UINT64 *) ptr);
+ case 1: value = *((uint8_t *) ptr);
+ case 2: value = *((uint16_t *) ptr);
+ case 4: value = *((uint32_t *) ptr);
+ case 8: value = *((uint64_t *) ptr);
}
return 1;
}
@@ -2202,10 +2202,10 @@ bool tms32025_device::memory_readop(offs_t offset, int size, UINT64 &value)
/****************************************************************************
* Memory reader
****************************************************************************/
-bool tms32025_device::memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value)
+bool tms32025_device::memory_read(address_spacenum spacenum, offs_t offset, int size, uint64_t &value)
{
void *ptr;
- UINT64 temp = 0;
+ uint64_t temp = 0;
switch (spacenum)
{
@@ -2229,10 +2229,10 @@ bool tms32025_device::memory_read(address_spacenum spacenum, offs_t offset, int
switch (size)
{
case 1:
- value = ((UINT8 *)ptr)[BYTE_XOR_BE(offset & 0xff)];
+ value = ((uint8_t *)ptr)[BYTE_XOR_BE(offset & 0xff)];
break;
case 2:
- value = ((UINT16 *)ptr)[(offset & 0xff) / 2];
+ value = ((uint16_t *)ptr)[(offset & 0xff) / 2];
break;
case 4:
memory_read(spacenum, offset + 0, 2, temp);
@@ -2254,7 +2254,7 @@ bool tms32025_device::memory_read(address_spacenum spacenum, offs_t offset, int
/****************************************************************************
* Memory writer
****************************************************************************/
-bool tms32025_device::memory_write(address_spacenum spacenum, offs_t offset, int size, UINT64 value)
+bool tms32025_device::memory_write(address_spacenum spacenum, offs_t offset, int size, uint64_t value)
{
void *ptr;
@@ -2280,10 +2280,10 @@ bool tms32025_device::memory_write(address_spacenum spacenum, offs_t offset, int
switch (size)
{
case 1:
- ((UINT8 *)ptr)[BYTE_XOR_BE(offset & 0xff)] = value;
+ ((uint8_t *)ptr)[BYTE_XOR_BE(offset & 0xff)] = value;
break;
case 2:
- ((UINT16 *)ptr)[(offset & 0xff) / 2] = value;
+ ((uint16_t *)ptr)[(offset & 0xff) / 2] = value;
break;
case 4:
memory_write(spacenum, offset + 0, 2, value >> 16);
diff --git a/src/devices/cpu/tms32025/tms32025.h b/src/devices/cpu/tms32025/tms32025.h
index e112dafde51..a2f907e3769 100644
--- a/src/devices/cpu/tms32025/tms32025.h
+++ b/src/devices/cpu/tms32025/tms32025.h
@@ -81,8 +81,8 @@ class tms32025_device : public cpu_device
{
public:
// construction/destruction
- tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms32025_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms32025_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// static configuration helpers
template<class _Object> static devcb_base & set_bio_in_cb(device_t &device, _Object object) { return downcast<tms32025_device &>(device).m_bio_in.set_callback(object); }
@@ -98,17 +98,17 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 4; }
- virtual UINT32 execute_max_cycles() const override { return 20; }
- virtual UINT32 execute_input_lines() const override { return 6; }
+ virtual uint32_t execute_min_cycles() const override { return 4; }
+ virtual uint32_t execute_max_cycles() const override { return 20; }
+ virtual uint32_t execute_input_lines() const override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : nullptr ) ); }
- virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value) override;
- virtual bool memory_write(address_spacenum spacenum, offs_t offset, int size, UINT64 value) override;
- virtual bool memory_readop(offs_t offset, int size, UINT64 &value) override;
+ virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, uint64_t &value) override;
+ virtual bool memory_write(address_spacenum spacenum, offs_t offset, int size, uint64_t value) override;
+ virtual bool memory_readop(offs_t offset, int size, uint64_t &value) override;
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
@@ -116,9 +116,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -128,7 +128,7 @@ private:
typedef void ( tms32025_device::*opcode_func ) ();
struct tms32025_opcode
{
- UINT8 cycles;
+ uint8_t cycles;
opcode_func function;
};
static const tms32025_opcode s_opcode_main[256];
@@ -144,22 +144,22 @@ private:
/******************** CPU Internal Registers *******************/
- UINT16 m_PREVPC; /* previous program counter */
- UINT16 m_PC;
- UINT16 m_PFC;
- UINT16 m_STR0, m_STR1;
- UINT8 m_IFR;
- UINT8 m_RPTC;
+ uint16_t m_PREVPC; /* previous program counter */
+ uint16_t m_PC;
+ uint16_t m_PFC;
+ uint16_t m_STR0, m_STR1;
+ uint8_t m_IFR;
+ uint8_t m_RPTC;
PAIR m_ACC;
PAIR m_Preg;
- UINT16 m_Treg;
- UINT16 m_AR[8];
- UINT16 m_STACK[8];
+ uint16_t m_Treg;
+ uint16_t m_AR[8];
+ uint16_t m_STACK[8];
PAIR m_ALU;
protected:
- UINT16 m_intRAM[0x800];
+ uint16_t m_intRAM[0x800];
private:
- UINT8 m_timerover;
+ uint8_t m_timerover;
/********************** Status data ****************************/
PAIR m_opcode;
@@ -171,7 +171,7 @@ private:
int m_tms32025_dec_cycles;
PAIR m_oldacc;
- UINT32 m_memaccess;
+ uint32_t m_memaccess;
int m_icount;
int m_mHackIgnoreARP; /* special handling for lst, lst1 instructions */
int m_waiting_for_serial_frame;
@@ -181,36 +181,36 @@ private:
address_space *m_data;
address_space *m_io;
- UINT16 *m_pgmmap[0x200];
+ uint16_t *m_pgmmap[0x200];
protected:
- UINT16 *m_datamap[0x200];
+ uint16_t *m_datamap[0x200];
private:
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
- inline void CLR0(UINT16 flag);
- inline void SET0(UINT16 flag);
- inline void CLR1(UINT16 flag);
- inline void SET1(UINT16 flag);
+ inline void CLR0(uint16_t flag);
+ inline void SET0(uint16_t flag);
+ inline void CLR1(uint16_t flag);
+ inline void SET1(uint16_t flag);
inline void MODIFY_DP(int data);
inline void MODIFY_PM(int data);
inline void MODIFY_ARP(int data);
- inline UINT16 M_RDROM(offs_t addr);
- inline void M_WRTROM(offs_t addr, UINT16 data);
- inline UINT16 M_RDRAM(offs_t addr);
- inline void M_WRTRAM(offs_t addr, UINT16 data);
- UINT16 reverse_carry_add(UINT16 arg0, UINT16 arg1 );
+ inline uint16_t M_RDROM(offs_t addr);
+ inline void M_WRTROM(offs_t addr, uint16_t data);
+ inline uint16_t M_RDRAM(offs_t addr);
+ inline void M_WRTRAM(offs_t addr, uint16_t data);
+ uint16_t reverse_carry_add(uint16_t arg0, uint16_t arg1 );
inline void MODIFY_AR_ARP();
inline void CALCULATE_ADD_CARRY();
inline void CALCULATE_SUB_CARRY();
- inline void CALCULATE_ADD_OVERFLOW(INT32 addval);
- inline void CALCULATE_SUB_OVERFLOW(INT32 subval);
- inline UINT16 POP_STACK();
- inline void PUSH_STACK(UINT16 data);
+ inline void CALCULATE_ADD_OVERFLOW(int32_t addval);
+ inline void CALCULATE_SUB_OVERFLOW(int32_t subval);
+ inline uint16_t POP_STACK();
+ inline void PUSH_STACK(uint16_t data);
inline void SHIFT_Preg_TO_ALU();
inline void GETDATA(int shift,int signext);
- inline void PUTDATA(UINT16 data);
- inline void PUTDATA_SST(UINT16 data);
+ inline void PUTDATA(uint16_t data);
+ inline void PUTDATA_SST(uint16_t data);
void opcodes_CE();
void opcodes_Dx();
void illegal();
@@ -376,7 +376,7 @@ class tms32026_device : public tms32025_device
{
public:
// construction/destruction
- tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_reset() override;
diff --git a/src/devices/cpu/tms32031/32031ops.hxx b/src/devices/cpu/tms32031/32031ops.hxx
index 60f2ab5d07f..476c5082a3e 100644
--- a/src/devices/cpu/tms32031/32031ops.hxx
+++ b/src/devices/cpu/tms32031/32031ops.hxx
@@ -25,22 +25,22 @@
#define FREGEXP(rnum) (m_r[rnum].exponent())
#define FREGMAN(rnum) (m_r[rnum].mantissa())
-#define FP2LONG(rnum) ((FREGEXP(rnum) << 24) | ((UINT32)FREGMAN(rnum) >> 8))
-#define LONG2FP(rnum,v) do { m_r[rnum].set_mantissa((v) << 8); m_r[rnum].set_exponent((INT32)(v) >> 24); } while (0)
+#define FP2LONG(rnum) ((FREGEXP(rnum) << 24) | ((uint32_t)FREGMAN(rnum) >> 8))
+#define LONG2FP(rnum,v) do { m_r[rnum].set_mantissa((v) << 8); m_r[rnum].set_exponent((int32_t)(v) >> 24); } while (0)
#define SHORT2FP(rnum,v) do { \
- if ((UINT16)(v) == 0x8000) { m_r[rnum].set_mantissa(0); m_r[rnum].set_exponent(-128); } \
- else { m_r[rnum].set_mantissa((v) << 20); m_r[rnum].set_exponent((INT16)(v) >> 12); } \
+ if ((uint16_t)(v) == 0x8000) { m_r[rnum].set_mantissa(0); m_r[rnum].set_exponent(-128); } \
+ else { m_r[rnum].set_mantissa((v) << 20); m_r[rnum].set_exponent((int16_t)(v) >> 12); } \
} while (0)
-#define DIRECT(op) (((IREG(TMR_DP) & 0xff) << 16) | ((UINT16)op))
+#define DIRECT(op) (((IREG(TMR_DP) & 0xff) << 16) | ((uint16_t)op))
#define INDIRECT_D(op,o) ((this->*s_indirect_d[((o) >> 3) & 31])(op,o))
#define INDIRECT_1(op,o) ((this->*s_indirect_1[((o) >> 3) & 31])(op,o))
#define INDIRECT_1_DEF(op,o) ((this->*s_indirect_1_def[((o) >> 3) & 31])(op,o,defptr))
#define SIGN(val) ((val) & 0x80000000)
-#define OVERFLOW_SUB(a,b,r) ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0)
-#define OVERFLOW_ADD(a,b,r) ((INT32)(((a) ^ (r)) & ((b) ^ (r))) < 0)
+#define OVERFLOW_SUB(a,b,r) ((int32_t)(((a) ^ (b)) & ((a) ^ (r))) < 0)
+#define OVERFLOW_ADD(a,b,r) ((int32_t)(((a) ^ (r)) & ((b) ^ (r))) < 0)
#define CLR_FLAGS(f) do { IREG(TMR_ST) &= ~(f); } while (0)
#define CLR_NVUF() CLR_FLAGS(NFLAG | VFLAG | UFFLAG)
@@ -51,16 +51,16 @@
#define OR_NZ(val) do { IREG(TMR_ST) |= (((val) >> 28) & NFLAG) | (((val) == 0) << 2); } while (0)
#define OR_NZF(reg) do { IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | ((reg.exponent() == -128) << 2); } while (0)
#define OR_NUF(reg) do { int temp = (reg.exponent() == -128) << 4; IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | (temp) | (temp << 2); } while (0)
-#define OR_V_SUB(a,b,r) do { UINT32 temp = ((((a) ^ (b)) & ((a) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
-#define OR_V_ADD(a,b,r) do { UINT32 temp = ((((a) ^ (r)) & ((b) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
-#define OR_C_SUB(a,b,r) do { IREG(TMR_ST) |= ((UINT32)(b) > (UINT32)(a)); } while (0)
-#define OR_C_ADD(a,b,r) do { IREG(TMR_ST) |= ((UINT32)(a) > (UINT32)(r)); } while (0)
-#define OR_C_SBB(a,b,c) do { INT64 temp = (INT64)(a) - (UINT32)(b) - (UINT32)(c); IREG(TMR_ST) |= (temp < 0); } while (0)
-#define OR_C_ADC(a,b,c) do { UINT64 temp = (UINT64)(a) + (UINT32)(b) + (UINT32)(c); IREG(TMR_ST) |= (temp > 0xffffffff); } while (0)
+#define OR_V_SUB(a,b,r) do { uint32_t temp = ((((a) ^ (b)) & ((a) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
+#define OR_V_ADD(a,b,r) do { uint32_t temp = ((((a) ^ (r)) & ((b) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
+#define OR_C_SUB(a,b,r) do { IREG(TMR_ST) |= ((uint32_t)(b) > (uint32_t)(a)); } while (0)
+#define OR_C_ADD(a,b,r) do { IREG(TMR_ST) |= ((uint32_t)(a) > (uint32_t)(r)); } while (0)
+#define OR_C_SBB(a,b,c) do { int64_t temp = (int64_t)(a) - (uint32_t)(b) - (uint32_t)(c); IREG(TMR_ST) |= (temp < 0); } while (0)
+#define OR_C_ADC(a,b,c) do { uint64_t temp = (uint64_t)(a) + (uint32_t)(b) + (uint32_t)(c); IREG(TMR_ST) |= (temp > 0xffffffff); } while (0)
#define OVM() (IREG(TMR_ST) & OVMFLAG)
-#define DECLARE_DEF UINT32 defval; UINT32 *defptr = &defval
+#define DECLARE_DEF uint32_t defval; uint32_t *defptr = &defval
#define UPDATE_DEF() *defptr = defval
@@ -69,7 +69,7 @@
// IMPLEMENTATION
//**************************************************************************
-void tms3203x_device::illegal(UINT32 op)
+void tms3203x_device::illegal(uint32_t op)
{
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
@@ -79,7 +79,7 @@ void tms3203x_device::illegal(UINT32 op)
}
-void tms3203x_device::unimplemented(UINT32 op)
+void tms3203x_device::unimplemented(uint32_t op)
{
fatalerror("Unimplemented op @ %06X: %08X (tbl=%03X)\n", m_pc - 1, op, op >> 21);
}
@@ -87,7 +87,7 @@ void tms3203x_device::unimplemented(UINT32 op)
inline void tms3203x_device::execute_one()
{
- UINT32 op = ROPCODE(m_pc);
+ uint32_t op = ROPCODE(m_pc);
m_icount -= 2; // 2 clocks per cycle
m_pc++;
#if (TMS_3203X_LOG_OPCODE_USAGE)
@@ -101,7 +101,7 @@ void tms3203x_device::update_special(int dreg)
{
if (dreg == TMR_BK)
{
- UINT32 temp = IREG(TMR_BK);
+ uint32_t temp = IREG(TMR_BK);
m_bkmask = temp;
while (temp >>= 1)
m_bkmask |= temp;
@@ -123,27 +123,27 @@ void tms3203x_device::update_special(int dreg)
// CONDITION CODES
//**************************************************************************
-const UINT32 C_LO = 1 << 1;
-const UINT32 C_LS = 1 << 2;
-const UINT32 C_HI = 1 << 3;
-const UINT32 C_HS = 1 << 4;
-const UINT32 C_EQ = 1 << 5;
-const UINT32 C_NE = 1 << 6;
-const UINT32 C_LT = 1 << 7;
-const UINT32 C_LE = 1 << 8;
-const UINT32 C_GT = 1 << 9;
-const UINT32 C_GE = 1 << 10;
-const UINT32 C_NV = 1 << 12;
-const UINT32 C_V = 1 << 13;
-const UINT32 C_NUF = 1 << 14;
-const UINT32 C_UF = 1 << 15;
-const UINT32 C_NLV = 1 << 16;
-const UINT32 C_LV = 1 << 17;
-const UINT32 C_NLUF = 1 << 18;
-const UINT32 C_LUF = 1 << 19;
-const UINT32 C_ZUF = 1 << 20;
-
-const UINT32 condition_table[0x80] =
+const uint32_t C_LO = 1 << 1;
+const uint32_t C_LS = 1 << 2;
+const uint32_t C_HI = 1 << 3;
+const uint32_t C_HS = 1 << 4;
+const uint32_t C_EQ = 1 << 5;
+const uint32_t C_NE = 1 << 6;
+const uint32_t C_LT = 1 << 7;
+const uint32_t C_LE = 1 << 8;
+const uint32_t C_GT = 1 << 9;
+const uint32_t C_GE = 1 << 10;
+const uint32_t C_NV = 1 << 12;
+const uint32_t C_V = 1 << 13;
+const uint32_t C_NUF = 1 << 14;
+const uint32_t C_UF = 1 << 15;
+const uint32_t C_NLV = 1 << 16;
+const uint32_t C_LV = 1 << 17;
+const uint32_t C_NLUF = 1 << 18;
+const uint32_t C_LUF = 1 << 19;
+const uint32_t C_ZUF = 1 << 20;
+
+const uint32_t condition_table[0x80] =
{
/* ------- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
/* ------C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
@@ -324,7 +324,7 @@ void tms3203x_device::double_to_dsp_with_flags(double val, tmsreg &result)
}
else if (exponent > 127)
{
- if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
+ if ((int32_t)id.i[BYTE_XOR_BE(0)] >= 0)
result.set_mantissa(0x7fffffff);
else
{
@@ -340,7 +340,7 @@ void tms3203x_device::double_to_dsp_with_flags(double val, tmsreg &result)
result.set_exponent(-128);
IREG(TMR_ST) |= ZFLAG;
}
- else if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
+ else if ((int32_t)id.i[BYTE_XOR_BE(0)] >= 0)
{
result.set_mantissa(mantissa);
result.set_exponent(exponent);
@@ -370,7 +370,7 @@ void tms3203x_device::int2float(tmsreg &srcdst)
#else
void tms3203x_device::int2float(tmsreg &srcdst)
{
- UINT32 man = srcdst.mantissa();
+ uint32_t man = srcdst.mantissa();
int exp, cnt;
// never overflows or underflows
@@ -384,14 +384,14 @@ void tms3203x_device::int2float(tmsreg &srcdst)
}
// check for -1 here because count_leading_ones will infinite loop
- else if (man == (UINT32)-1)
+ else if (man == (uint32_t)-1)
{
man = 0;
exp = -1;
}
// positive values; count leading zeros and shift
- else if ((INT32)man > 0)
+ else if ((int32_t)man > 0)
{
cnt = count_leading_zeros(man);
man <<= cnt;
@@ -418,12 +418,12 @@ void tms3203x_device::int2float(tmsreg &srcdst)
#if USE_FP
void tms3203x_device::float2int(tmsreg &srcdst, int setflags)
{
- INT32 val;
+ int32_t val;
if (setflags) CLR_NZVUF();
if (srcdst.exponent() > 30)
{
- if ((INT32)srcdst.mantissa() >= 0)
+ if ((int32_t)srcdst.mantissa() >= 0)
val = 0x7fffffff;
else
val = 0x80000000;
@@ -437,7 +437,7 @@ void tms3203x_device::float2int(tmsreg &srcdst, int setflags)
#else
void tms3203x_device::float2int(tmsreg &srcdst, bool setflags)
{
- INT32 man = srcdst.mantissa();
+ int32_t man = srcdst.mantissa();
int shift = 31 - srcdst.exponent();
// never underflows
@@ -474,7 +474,7 @@ void tms3203x_device::negf(tmsreg &dst, tmsreg tmsreg &src)
#else
void tms3203x_device::negf(tmsreg &dst, tmsreg &src)
{
- INT32 man = src.mantissa();
+ int32_t man = src.mantissa();
CLR_NZVUF();
@@ -512,8 +512,8 @@ void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
#else
void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
{
- INT64 man;
- INT64 m1, m2;
+ int64_t man;
+ int64_t m1, m2;
int exp, cnt;
// reset over/underflow conditions
@@ -534,8 +534,8 @@ void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
}
// extract mantissas from 1.0.31 values to 1.1.31 values
- m1 = (INT64)src1.mantissa() ^ 0x80000000;
- m2 = (INT64)src2.mantissa() ^ 0x80000000;
+ m1 = (int64_t)src1.mantissa() ^ 0x80000000;
+ m2 = (int64_t)src2.mantissa() ^ 0x80000000;
// normalize based on the exponent
if (src1.exponent() > src2.exponent())
@@ -574,24 +574,24 @@ void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
}
// if the mantissa is >= 2.0 or < -2.0, normalize
- else if (man >= INT64(U64(0x100000000)) || man < INT64(U64(0xffffffff00000000)))
+ else if (man >= int64_t(U64(0x100000000)) || man < int64_t(U64(0xffffffff00000000)))
{
man >>= 1;
exp++;
}
// if the mantissa is < 1.0 and > -1.0, normalize
- else if (man < INT64(U64(0x80000000)) && man >= INT64(U64(0xffffffff80000000)))
+ else if (man < int64_t(U64(0x80000000)) && man >= int64_t(U64(0xffffffff80000000)))
{
if (man > 0)
{
- cnt = count_leading_zeros((UINT32)man);
+ cnt = count_leading_zeros((uint32_t)man);
man <<= cnt;
exp -= cnt;
}
else
{
- cnt = count_leading_ones((UINT32)man);
+ cnt = count_leading_ones((uint32_t)man);
man <<= cnt;
exp -= cnt;
}
@@ -615,7 +615,7 @@ void tms3203x_device::addf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
// store the result back, removing the implicit one and putting
// back the sign bit
- dst.set_mantissa((UINT32)man ^ 0x80000000);
+ dst.set_mantissa((uint32_t)man ^ 0x80000000);
dst.set_exponent(exp);
OR_NZF(dst);
}
@@ -632,8 +632,8 @@ void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
#else
void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
{
- INT64 man;
- INT64 m1, m2;
+ int64_t man;
+ int64_t m1, m2;
int exp, cnt;
// reset over/underflow conditions
@@ -648,8 +648,8 @@ void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
}
// extract mantissas from 1.0.31 values to 1.1.31 values
- m1 = (INT64)src1.mantissa() ^ 0x80000000;
- m2 = (INT64)src2.mantissa() ^ 0x80000000;
+ m1 = (int64_t)src1.mantissa() ^ 0x80000000;
+ m2 = (int64_t)src2.mantissa() ^ 0x80000000;
// normalize based on the exponent
if (src1.exponent() > src2.exponent())
@@ -687,24 +687,24 @@ void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
}
// if the mantissa is >= 2.0 or < -2.0, normalize
- else if (man >= INT64(U64(0x100000000)) || man < INT64(U64(0xffffffff00000000)))
+ else if (man >= int64_t(U64(0x100000000)) || man < int64_t(U64(0xffffffff00000000)))
{
man >>= 1;
exp++;
}
// if the mantissa is < 1.0 and > -1.0, normalize
- else if (man < INT64(U64(0x80000000)) && man >= INT64(U64(0xffffffff80000000)))
+ else if (man < int64_t(U64(0x80000000)) && man >= int64_t(U64(0xffffffff80000000)))
{
if (man > 0)
{
- cnt = count_leading_zeros((UINT32)man);
+ cnt = count_leading_zeros((uint32_t)man);
man <<= cnt;
exp -= cnt;
}
else
{
- cnt = count_leading_ones((UINT32)man);
+ cnt = count_leading_ones((uint32_t)man);
man <<= cnt;
exp -= cnt;
}
@@ -730,7 +730,7 @@ void tms3203x_device::subf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
// store the result back, removing the implicit one and putting
// back the sign bit
- dst.set_mantissa((UINT32)man ^ 0x80000000);
+ dst.set_mantissa((uint32_t)man ^ 0x80000000);
dst.set_exponent(exp);
OR_NZF(dst);
}
@@ -760,11 +760,11 @@ void tms3203x_device::mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
}
// convert the mantissas from 1.0.31 numbers to 1.1.23 numbers
- INT32 m1 = (src1.mantissa() >> 8) ^ 0x800000;
- INT32 m2 = (src2.mantissa() >> 8) ^ 0x800000;
+ int32_t m1 = (src1.mantissa() >> 8) ^ 0x800000;
+ int32_t m2 = (src2.mantissa() >> 8) ^ 0x800000;
// multiply the mantissas and add the exponents
- INT64 man = (INT64)m1 * (INT64)m2;
+ int64_t man = (int64_t)m1 * (int64_t)m2;
int exp = src1.exponent() + src2.exponent();
// chop off the low bits, going from 1.2.46 down to 1.2.31
@@ -778,11 +778,11 @@ void tms3203x_device::mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
}
// if the mantissa is >= 2.0 or <= -2.0, normalize
- else if (man >= INT64(U64(0x100000000)))
+ else if (man >= int64_t(U64(0x100000000)))
{
man >>= 1;
exp++;
- if (man >= INT64(U64(0x100000000)))
+ if (man >= int64_t(U64(0x100000000)))
{
man >>= 1;
exp++;
@@ -790,7 +790,7 @@ void tms3203x_device::mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
}
// if the mantissa is >= 2.0 or <= -2.0, normalize
- else if (man < INT64(U64(0xffffffff00000000)))
+ else if (man < int64_t(U64(0xffffffff00000000)))
{
man >>= 1;
exp++;
@@ -814,7 +814,7 @@ void tms3203x_device::mpyf(tmsreg &dst, tmsreg &src1, tmsreg &src2)
// store the result back, removing the implicit one and putting
// back the sign bit
- dst.set_mantissa((UINT32)man ^ 0x80000000);
+ dst.set_mantissa((uint32_t)man ^ 0x80000000);
dst.set_exponent(exp);
OR_NZF(dst);
}
@@ -830,7 +830,7 @@ void tms3203x_device::norm(tmsreg &dst, tmsreg &src)
#else
void tms3203x_device::norm(tmsreg &dst, tmsreg &src)
{
- INT32 man = src.mantissa();
+ int32_t man = src.mantissa();
int exp = src.exponent();
CLR_NZVUF();
@@ -847,13 +847,13 @@ void tms3203x_device::norm(tmsreg &dst, tmsreg &src)
int cnt;
if (man > 0)
{
- cnt = count_leading_zeros((UINT32)man);
+ cnt = count_leading_zeros((uint32_t)man);
man <<= cnt;
exp -= cnt;
}
else
{
- cnt = count_leading_ones((UINT32)man);
+ cnt = count_leading_ones((uint32_t)man);
man <<= cnt;
exp -= cnt;
}
@@ -882,64 +882,64 @@ void tms3203x_device::norm(tmsreg &dst, tmsreg &src)
// immediate displacement variants
-UINT32 tms3203x_device::mod00_d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod00_d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- return IREG(reg) + (UINT8)op;
+ return IREG(reg) + (uint8_t)op;
}
-UINT32 tms3203x_device::mod01_d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod01_d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- return IREG(reg) - (UINT8)op;
+ return IREG(reg) - (uint8_t)op;
}
-UINT32 tms3203x_device::mod02_d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod02_d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- IREG(reg) += (UINT8)op;
+ IREG(reg) += (uint8_t)op;
return IREG(reg);
}
-UINT32 tms3203x_device::mod03_d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod03_d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- IREG(reg) -= (UINT8)op;
+ IREG(reg) -= (uint8_t)op;
return IREG(reg);
}
-UINT32 tms3203x_device::mod04_d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod04_d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- IREG(reg) += (UINT8)op;
+ uint32_t result = IREG(reg);
+ IREG(reg) += (uint8_t)op;
return result;
}
-UINT32 tms3203x_device::mod05_d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod05_d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- IREG(reg) -= (UINT8)op;
+ uint32_t result = IREG(reg);
+ IREG(reg) -= (uint8_t)op;
return result;
}
-UINT32 tms3203x_device::mod06_d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod06_d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) + (UINT8)op;
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) + (uint8_t)op;
if (temp >= IREG(TMR_BK))
temp -= IREG(TMR_BK);
IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
return result;
}
-UINT32 tms3203x_device::mod07_d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod07_d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) - (UINT8)op;
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) - (uint8_t)op;
if (temp < 0)
temp += IREG(TMR_BK);
IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -949,58 +949,58 @@ UINT32 tms3203x_device::mod07_d(UINT32 op, UINT8 ar)
// immediate displacement variants (implied 1)
-UINT32 tms3203x_device::mod00_1(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod00_1(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) + 1;
}
-UINT32 tms3203x_device::mod01_1(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod01_1(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) - 1;
}
-UINT32 tms3203x_device::mod02_1(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod02_1(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return ++IREG(reg);
}
-UINT32 tms3203x_device::mod03_1(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod03_1(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return --IREG(reg);
}
-UINT32 tms3203x_device::mod04_1(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod04_1(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg)++;
}
-UINT32 tms3203x_device::mod05_1(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod05_1(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg)--;
}
-UINT32 tms3203x_device::mod06_1(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod06_1(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) + 1;
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) + 1;
if (temp >= IREG(TMR_BK))
temp -= IREG(TMR_BK);
IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
return result;
}
-UINT32 tms3203x_device::mod07_1(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod07_1(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) - 1;
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) - 1;
if (temp < 0)
temp += IREG(TMR_BK);
IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1010,64 +1010,64 @@ UINT32 tms3203x_device::mod07_1(UINT32 op, UINT8 ar)
// IR0 displacement variants
-UINT32 tms3203x_device::mod08(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod08(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) + IREG(TMR_IR0);
}
-UINT32 tms3203x_device::mod09(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod09(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) - IREG(TMR_IR0);
}
-UINT32 tms3203x_device::mod0a(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod0a(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
IREG(reg) += IREG(TMR_IR0);
return IREG(reg);
}
-UINT32 tms3203x_device::mod0b(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod0b(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
IREG(reg) -= IREG(TMR_IR0);
return IREG(reg);
}
-UINT32 tms3203x_device::mod0c(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod0c(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
+ uint32_t result = IREG(reg);
IREG(reg) += IREG(TMR_IR0);
return result;
}
-UINT32 tms3203x_device::mod0d(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod0d(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
+ uint32_t result = IREG(reg);
IREG(reg) -= IREG(TMR_IR0);
return result;
}
-UINT32 tms3203x_device::mod0e(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod0e(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) + IREG(TMR_IR0);
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) + IREG(TMR_IR0);
if (temp >= IREG(TMR_BK))
temp -= IREG(TMR_BK);
IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
return result;
}
-UINT32 tms3203x_device::mod0f(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod0f(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) - IREG(TMR_IR0);
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) - IREG(TMR_IR0);
if (temp < 0)
temp += IREG(TMR_BK);
IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1077,64 +1077,64 @@ UINT32 tms3203x_device::mod0f(UINT32 op, UINT8 ar)
// IR1 displacement variants
-UINT32 tms3203x_device::mod10(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod10(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) + IREG(TMR_IR1);
}
-UINT32 tms3203x_device::mod11(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod11(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) - IREG(TMR_IR1);
}
-UINT32 tms3203x_device::mod12(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod12(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
IREG(reg) += IREG(TMR_IR1);
return IREG(reg);
}
-UINT32 tms3203x_device::mod13(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod13(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
IREG(reg) -= IREG(TMR_IR1);
return IREG(reg);
}
-UINT32 tms3203x_device::mod14(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod14(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
+ uint32_t result = IREG(reg);
IREG(reg) += IREG(TMR_IR1);
return result;
}
-UINT32 tms3203x_device::mod15(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod15(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
+ uint32_t result = IREG(reg);
IREG(reg) -= IREG(TMR_IR1);
return result;
}
-UINT32 tms3203x_device::mod16(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod16(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) + IREG(TMR_IR1);
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) + IREG(TMR_IR1);
if (temp >= IREG(TMR_BK))
temp -= IREG(TMR_BK);
IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
return result;
}
-UINT32 tms3203x_device::mod17(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod17(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) - IREG(TMR_IR1);
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) - IREG(TMR_IR1);
if (temp < 0)
temp += IREG(TMR_BK);
IREG(reg) = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1144,19 +1144,19 @@ UINT32 tms3203x_device::mod17(UINT32 op, UINT8 ar)
// special variants
-UINT32 tms3203x_device::mod18(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod18(uint32_t op, uint8_t ar)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg);
}
-UINT32 tms3203x_device::mod19(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::mod19(uint32_t op, uint8_t ar)
{
unimplemented(op);
return 0;
}
-UINT32 tms3203x_device::modillegal(UINT32 op, UINT8 ar)
+uint32_t tms3203x_device::modillegal(uint32_t op, uint8_t ar)
{
illegal(op);
return 0;
@@ -1165,37 +1165,37 @@ UINT32 tms3203x_device::modillegal(UINT32 op, UINT8 ar)
// immediate displacement variants (implied 1)
-UINT32 tms3203x_device::mod00_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod00_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) + 1;
}
-UINT32 tms3203x_device::mod01_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod01_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) - 1;
}
-UINT32 tms3203x_device::mod02_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod02_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 defval = IREG(reg) + 1;
+ uint32_t defval = IREG(reg) + 1;
*defptrptr = defval;
defptrptr = &IREG(reg);
return defval;
}
-UINT32 tms3203x_device::mod03_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod03_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 defval = IREG(reg) - 1;
+ uint32_t defval = IREG(reg) - 1;
*defptrptr = defval;
defptrptr = &IREG(reg);
return defval;
}
-UINT32 tms3203x_device::mod04_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod04_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
*defptrptr = IREG(reg) + 1;
@@ -1203,7 +1203,7 @@ UINT32 tms3203x_device::mod04_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return IREG(reg);
}
-UINT32 tms3203x_device::mod05_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod05_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
*defptrptr = IREG(reg) - 1;
@@ -1211,11 +1211,11 @@ UINT32 tms3203x_device::mod05_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return IREG(reg);
}
-UINT32 tms3203x_device::mod06_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod06_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) + 1;
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) + 1;
if (temp >= IREG(TMR_BK))
temp -= IREG(TMR_BK);
*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1223,11 +1223,11 @@ UINT32 tms3203x_device::mod06_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return result;
}
-UINT32 tms3203x_device::mod07_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod07_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) - 1;
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) - 1;
if (temp < 0)
temp += IREG(TMR_BK);
*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1238,37 +1238,37 @@ UINT32 tms3203x_device::mod07_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
// IR0 displacement variants
-UINT32 tms3203x_device::mod08_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod08_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) + IREG(TMR_IR0);
}
-UINT32 tms3203x_device::mod09_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod09_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) - IREG(TMR_IR0);
}
-UINT32 tms3203x_device::mod0a_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod0a_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 defval = IREG(reg) + IREG(TMR_IR0);
+ uint32_t defval = IREG(reg) + IREG(TMR_IR0);
*defptrptr = defval;
defptrptr = &IREG(reg);
return defval;
}
-UINT32 tms3203x_device::mod0b_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod0b_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 defval = IREG(reg) - IREG(TMR_IR0);
+ uint32_t defval = IREG(reg) - IREG(TMR_IR0);
*defptrptr = defval;
defptrptr = &IREG(reg);
return defval;
}
-UINT32 tms3203x_device::mod0c_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod0c_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
*defptrptr = IREG(reg) + IREG(TMR_IR0);
@@ -1276,7 +1276,7 @@ UINT32 tms3203x_device::mod0c_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return IREG(reg);
}
-UINT32 tms3203x_device::mod0d_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod0d_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
*defptrptr = IREG(reg) - IREG(TMR_IR0);
@@ -1284,11 +1284,11 @@ UINT32 tms3203x_device::mod0d_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return IREG(reg);
}
-UINT32 tms3203x_device::mod0e_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod0e_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) + IREG(TMR_IR0);
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) + IREG(TMR_IR0);
if (temp >= IREG(TMR_BK))
temp -= IREG(TMR_BK);
*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1296,11 +1296,11 @@ UINT32 tms3203x_device::mod0e_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return result;
}
-UINT32 tms3203x_device::mod0f_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod0f_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) - IREG(TMR_IR0);
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) - IREG(TMR_IR0);
if (temp < 0)
temp += IREG(TMR_BK);
*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1311,37 +1311,37 @@ UINT32 tms3203x_device::mod0f_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
// IR1 displacement variants
-UINT32 tms3203x_device::mod10_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod10_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) + IREG(TMR_IR1);
}
-UINT32 tms3203x_device::mod11_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod11_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg) - IREG(TMR_IR1);
}
-UINT32 tms3203x_device::mod12_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod12_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 defval = IREG(reg) + IREG(TMR_IR1);
+ uint32_t defval = IREG(reg) + IREG(TMR_IR1);
*defptrptr = defval;
defptrptr = &IREG(reg);
return defval;
}
-UINT32 tms3203x_device::mod13_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod13_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 defval = IREG(reg) - IREG(TMR_IR1);
+ uint32_t defval = IREG(reg) - IREG(TMR_IR1);
*defptrptr = defval;
defptrptr = &IREG(reg);
return defval;
}
-UINT32 tms3203x_device::mod14_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod14_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
*defptrptr = IREG(reg) + IREG(TMR_IR1);
@@ -1349,7 +1349,7 @@ UINT32 tms3203x_device::mod14_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return IREG(reg);
}
-UINT32 tms3203x_device::mod15_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod15_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
*defptrptr = IREG(reg) - IREG(TMR_IR1);
@@ -1357,11 +1357,11 @@ UINT32 tms3203x_device::mod15_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return IREG(reg);
}
-UINT32 tms3203x_device::mod16_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod16_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) + IREG(TMR_IR1);
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) + IREG(TMR_IR1);
if (temp >= IREG(TMR_BK))
temp -= IREG(TMR_BK);
*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1369,11 +1369,11 @@ UINT32 tms3203x_device::mod16_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return result;
}
-UINT32 tms3203x_device::mod17_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod17_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
- UINT32 result = IREG(reg);
- INT32 temp = (result & m_bkmask) - IREG(TMR_IR1);
+ uint32_t result = IREG(reg);
+ int32_t temp = (result & m_bkmask) - IREG(TMR_IR1);
if (temp < 0)
temp += IREG(TMR_BK);
*defptrptr = (IREG(reg) & ~m_bkmask) | (temp & m_bkmask);
@@ -1381,19 +1381,19 @@ UINT32 tms3203x_device::mod17_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
return result;
}
-UINT32 tms3203x_device::mod18_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod18_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
int reg = TMR_AR0 + (ar & 7);
return IREG(reg);
}
-UINT32 tms3203x_device::mod19_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::mod19_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
unimplemented(op);
return 0;
}
-UINT32 tms3203x_device::modillegal_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
+uint32_t tms3203x_device::modillegal_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr)
{
illegal(op);
return 0;
@@ -1404,42 +1404,42 @@ UINT32 tms3203x_device::modillegal_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
#define ABSF(dreg, sreg) \
{ \
- INT32 man = FREGMAN(sreg); \
+ int32_t man = FREGMAN(sreg); \
CLR_NZVUF(); \
m_r[dreg] = m_r[sreg]; \
if (man < 0) \
{ \
m_r[dreg].set_mantissa(~man); \
- if (man == (INT32)0x80000000 && FREGEXP(sreg) == 127) \
+ if (man == (int32_t)0x80000000 && FREGEXP(sreg) == 127) \
IREG(TMR_ST) |= VFLAG | LVFLAG; \
} \
OR_NZF(m_r[dreg]); \
}
-void tms3203x_device::absf_reg(UINT32 op)
+void tms3203x_device::absf_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
int sreg = op & 7;
ABSF(dreg, sreg);
}
-void tms3203x_device::absf_dir(UINT32 op)
+void tms3203x_device::absf_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
ABSF(dreg, TMR_TEMP1);
}
-void tms3203x_device::absf_ind(UINT32 op)
+void tms3203x_device::absf_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
ABSF(dreg, TMR_TEMP1);
}
-void tms3203x_device::absf_imm(UINT32 op)
+void tms3203x_device::absf_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -1450,7 +1450,7 @@ void tms3203x_device::absf_imm(UINT32 op)
#define ABSI(dreg, src) \
{ \
- UINT32 _res = ((INT32)src < 0) ? -src : src; \
+ uint32_t _res = ((int32_t)src < 0) ? -src : src; \
if (!OVM() || _res != 0x80000000) \
IREG(dreg) = _res; \
else \
@@ -1466,30 +1466,30 @@ void tms3203x_device::absf_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::absi_reg(UINT32 op)
+void tms3203x_device::absi_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
ABSI(dreg, src);
}
-void tms3203x_device::absi_dir(UINT32 op)
+void tms3203x_device::absi_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
ABSI(dreg, src);
}
-void tms3203x_device::absi_ind(UINT32 op)
+void tms3203x_device::absi_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
ABSI(dreg, src);
}
-void tms3203x_device::absi_imm(UINT32 op)
+void tms3203x_device::absi_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
ABSI(dreg, src);
}
@@ -1498,14 +1498,14 @@ void tms3203x_device::absi_imm(UINT32 op)
#define ADDC(dreg, src1, src2) \
{ \
- UINT32 _res = src1 + src2 + (IREG(TMR_ST) & CFLAG); \
+ uint32_t _res = src1 + src2 + (IREG(TMR_ST) & CFLAG); \
if (!OVM() || !OVERFLOW_ADD(src1,src2,_res)) \
IREG(dreg) = _res; \
else \
- IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
+ IREG(dreg) = ((int32_t)src1 < 0) ? 0x80000000 : 0x7fffffff; \
if (dreg < 8) \
{ \
- UINT32 tempc = IREG(TMR_ST) & CFLAG; \
+ uint32_t tempc = IREG(TMR_ST) & CFLAG; \
CLR_NZCVUF(); \
OR_C_ADC(src1,src2,tempc); \
OR_V_ADD(src1,src2,_res); \
@@ -1515,63 +1515,63 @@ void tms3203x_device::absi_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::addc_reg(UINT32 op)
+void tms3203x_device::addc_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ADDC(dreg, dst, src);
}
-void tms3203x_device::addc_dir(UINT32 op)
+void tms3203x_device::addc_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ADDC(dreg, dst, src);
}
-void tms3203x_device::addc_ind(UINT32 op)
+void tms3203x_device::addc_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ADDC(dreg, dst, src);
}
-void tms3203x_device::addc_imm(UINT32 op)
+void tms3203x_device::addc_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ADDC(dreg, dst, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::addf_reg(UINT32 op)
+void tms3203x_device::addf_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
addf(m_r[dreg], m_r[dreg], m_r[op & 7]);
}
-void tms3203x_device::addf_dir(UINT32 op)
+void tms3203x_device::addf_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
addf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::addf_ind(UINT32 op)
+void tms3203x_device::addf_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
addf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::addf_imm(UINT32 op)
+void tms3203x_device::addf_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -1582,11 +1582,11 @@ void tms3203x_device::addf_imm(UINT32 op)
#define ADDI(dreg, src1, src2) \
{ \
- UINT32 _res = src1 + src2; \
+ uint32_t _res = src1 + src2; \
if (!OVM() || !OVERFLOW_ADD(src1,src2,_res)) \
IREG(dreg) = _res; \
else \
- IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
+ IREG(dreg) = ((int32_t)src1 < 0) ? 0x80000000 : 0x7fffffff; \
if (dreg < 8) \
{ \
CLR_NZCVUF(); \
@@ -1598,35 +1598,35 @@ void tms3203x_device::addf_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::addi_reg(UINT32 op)
+void tms3203x_device::addi_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ADDI(dreg, dst, src);
}
-void tms3203x_device::addi_dir(UINT32 op)
+void tms3203x_device::addi_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ADDI(dreg, dst, src);
}
-void tms3203x_device::addi_ind(UINT32 op)
+void tms3203x_device::addi_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ADDI(dreg, dst, src);
}
-void tms3203x_device::addi_imm(UINT32 op)
+void tms3203x_device::addi_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ADDI(dreg, dst, src);
}
@@ -1634,7 +1634,7 @@ void tms3203x_device::addi_imm(UINT32 op)
#define AND(dreg, src1, src2) \
{ \
- UINT32 _res = (src1) & (src2); \
+ uint32_t _res = (src1) & (src2); \
IREG(dreg) = _res; \
if (dreg < 8) \
{ \
@@ -1645,35 +1645,35 @@ void tms3203x_device::addi_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::and_reg(UINT32 op)
+void tms3203x_device::and_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
AND(dreg, dst, src);
}
-void tms3203x_device::and_dir(UINT32 op)
+void tms3203x_device::and_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
AND(dreg, dst, src);
}
-void tms3203x_device::and_ind(UINT32 op)
+void tms3203x_device::and_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
AND(dreg, dst, src);
}
-void tms3203x_device::and_imm(UINT32 op)
+void tms3203x_device::and_imm(uint32_t op)
{
- UINT32 src = (UINT16)op;
+ uint32_t src = (uint16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
AND(dreg, dst, src);
}
@@ -1681,7 +1681,7 @@ void tms3203x_device::and_imm(UINT32 op)
#define ANDN(dreg, src1, src2) \
{ \
- UINT32 _res = (src1) & ~(src2); \
+ uint32_t _res = (src1) & ~(src2); \
IREG(dreg) = _res; \
if (dreg < 8) \
{ \
@@ -1692,35 +1692,35 @@ void tms3203x_device::and_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::andn_reg(UINT32 op)
+void tms3203x_device::andn_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ANDN(dreg, dst, src);
}
-void tms3203x_device::andn_dir(UINT32 op)
+void tms3203x_device::andn_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ANDN(dreg, dst, src);
}
-void tms3203x_device::andn_ind(UINT32 op)
+void tms3203x_device::andn_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ANDN(dreg, dst, src);
}
-void tms3203x_device::andn_imm(UINT32 op)
+void tms3203x_device::andn_imm(uint32_t op)
{
- UINT32 src = (UINT16)op;
+ uint32_t src = (uint16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
ANDN(dreg, dst, src);
}
@@ -1728,19 +1728,19 @@ void tms3203x_device::andn_imm(UINT32 op)
#define ASH(dreg, src, count) \
{ \
- UINT32 _res; \
- INT32 _count = (INT16)(count << 9) >> 9; /* 7 LSBs */ \
+ uint32_t _res; \
+ int32_t _count = (int16_t)(count << 9) >> 9; /* 7 LSBs */ \
if (_count < 0) \
{ \
if (_count >= -31) \
- _res = (INT32)src >> -_count; \
+ _res = (int32_t)src >> -_count; \
else \
- _res = (INT32)src >> 31; \
+ _res = (int32_t)src >> 31; \
} \
else \
{ \
if (_count <= 31) \
- _res = (INT32)src << _count; \
+ _res = (int32_t)src << _count; \
else \
_res = 0; \
} \
@@ -1752,77 +1752,77 @@ void tms3203x_device::andn_imm(UINT32 op)
if (_count < 0) \
{ \
if (_count >= -32) \
- OR_C(((INT32)src >> (-_count - 1)) & 1); \
+ OR_C(((int32_t)src >> (-_count - 1)) & 1); \
else \
- OR_C(((INT32)src >> 31) & 1); \
+ OR_C(((int32_t)src >> 31) & 1); \
} \
else if (_count > 0) \
{ \
if (_count <= 32) \
- OR_C(((UINT32)src << (_count - 1)) >> 31); \
+ OR_C(((uint32_t)src << (_count - 1)) >> 31); \
} \
} \
else if (dreg >= TMR_BK) \
update_special(dreg); \
}
-void tms3203x_device::ash_reg(UINT32 op)
+void tms3203x_device::ash_reg(uint32_t op)
{
int dreg = (op >> 16) & 31;
int count = IREG(op & 31);
- UINT32 src = IREG(dreg);
+ uint32_t src = IREG(dreg);
ASH(dreg, src, count);
}
-void tms3203x_device::ash_dir(UINT32 op)
+void tms3203x_device::ash_dir(uint32_t op)
{
int dreg = (op >> 16) & 31;
int count = RMEM(DIRECT(op));
- UINT32 src = IREG(dreg);
+ uint32_t src = IREG(dreg);
ASH(dreg, src, count);
}
-void tms3203x_device::ash_ind(UINT32 op)
+void tms3203x_device::ash_ind(uint32_t op)
{
int dreg = (op >> 16) & 31;
int count = RMEM(INDIRECT_D(op, op >> 8));
- UINT32 src = IREG(dreg);
+ uint32_t src = IREG(dreg);
ASH(dreg, src, count);
}
-void tms3203x_device::ash_imm(UINT32 op)
+void tms3203x_device::ash_imm(uint32_t op)
{
int dreg = (op >> 16) & 31;
int count = op;
- UINT32 src = IREG(dreg);
+ uint32_t src = IREG(dreg);
ASH(dreg, src, count);
}
/*-----------------------------------------------------*/
-void tms3203x_device::cmpf_reg(UINT32 op)
+void tms3203x_device::cmpf_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
subf(m_r[TMR_TEMP2], m_r[dreg], m_r[op & 7]);
}
-void tms3203x_device::cmpf_dir(UINT32 op)
+void tms3203x_device::cmpf_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
subf(m_r[TMR_TEMP2], m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::cmpf_ind(UINT32 op)
+void tms3203x_device::cmpf_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
subf(m_r[TMR_TEMP2], m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::cmpf_imm(UINT32 op)
+void tms3203x_device::cmpf_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -1833,44 +1833,44 @@ void tms3203x_device::cmpf_imm(UINT32 op)
#define CMPI(src1, src2) \
{ \
- UINT32 _res = src1 - src2; \
+ uint32_t _res = src1 - src2; \
CLR_NZCVUF(); \
OR_C_SUB(src1,src2,_res); \
OR_V_SUB(src1,src2,_res); \
OR_NZ(_res); \
}
-void tms3203x_device::cmpi_reg(UINT32 op)
+void tms3203x_device::cmpi_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
- UINT32 dst = IREG((op >> 16) & 31);
+ uint32_t src = IREG(op & 31);
+ uint32_t dst = IREG((op >> 16) & 31);
CMPI(dst, src);
}
-void tms3203x_device::cmpi_dir(UINT32 op)
+void tms3203x_device::cmpi_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
- UINT32 dst = IREG((op >> 16) & 31);
+ uint32_t src = RMEM(DIRECT(op));
+ uint32_t dst = IREG((op >> 16) & 31);
CMPI(dst, src);
}
-void tms3203x_device::cmpi_ind(UINT32 op)
+void tms3203x_device::cmpi_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
- UINT32 dst = IREG((op >> 16) & 31);
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t dst = IREG((op >> 16) & 31);
CMPI(dst, src);
}
-void tms3203x_device::cmpi_imm(UINT32 op)
+void tms3203x_device::cmpi_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
- UINT32 dst = IREG((op >> 16) & 31);
+ uint32_t src = (int16_t)op;
+ uint32_t dst = IREG((op >> 16) & 31);
CMPI(dst, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::fix_reg(UINT32 op)
+void tms3203x_device::fix_reg(uint32_t op)
{
int dreg = (op >> 16) & 31;
m_r[TMR_TEMP1] = m_r[op & 7];
@@ -1878,25 +1878,25 @@ void tms3203x_device::fix_reg(UINT32 op)
m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
}
-void tms3203x_device::fix_dir(UINT32 op)
+void tms3203x_device::fix_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
LONG2FP(TMR_TEMP1, res);
float2int(m_r[TMR_TEMP1], dreg < 8);
m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
}
-void tms3203x_device::fix_ind(UINT32 op)
+void tms3203x_device::fix_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
LONG2FP(TMR_TEMP1, res);
float2int(m_r[TMR_TEMP1], dreg < 8);
m_r[dreg].set_mantissa(m_r[TMR_TEMP1].mantissa());
}
-void tms3203x_device::fix_imm(UINT32 op)
+void tms3203x_device::fix_imm(uint32_t op)
{
int dreg = (op >> 16) & 31;
SHORT2FP(TMR_TEMP1, op);
@@ -1912,37 +1912,37 @@ void tms3203x_device::fix_imm(UINT32 op)
int2float(m_r[dreg]); \
}
-void tms3203x_device::float_reg(UINT32 op)
+void tms3203x_device::float_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 7;
FLOAT(dreg, src);
}
-void tms3203x_device::float_dir(UINT32 op)
+void tms3203x_device::float_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
FLOAT(dreg, src);
}
-void tms3203x_device::float_ind(UINT32 op)
+void tms3203x_device::float_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
FLOAT(dreg, src);
}
-void tms3203x_device::float_imm(UINT32 op)
+void tms3203x_device::float_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 7;
FLOAT(dreg, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::idle(UINT32 op)
+void tms3203x_device::idle(uint32_t op)
{
m_is_idling = true;
IREG(TMR_ST) |= GIEFLAG;
@@ -1953,7 +1953,7 @@ void tms3203x_device::idle(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::lde_reg(UINT32 op)
+void tms3203x_device::lde_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
m_r[dreg].set_exponent(m_r[op & 7].exponent());
@@ -1961,9 +1961,9 @@ void tms3203x_device::lde_reg(UINT32 op)
m_r[dreg].set_mantissa(0);
}
-void tms3203x_device::lde_dir(UINT32 op)
+void tms3203x_device::lde_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
m_r[dreg].set_exponent(m_r[TMR_TEMP1].exponent());
@@ -1971,9 +1971,9 @@ void tms3203x_device::lde_dir(UINT32 op)
m_r[dreg].set_mantissa(0);
}
-void tms3203x_device::lde_ind(UINT32 op)
+void tms3203x_device::lde_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
m_r[dreg].set_exponent(m_r[TMR_TEMP1].exponent());
@@ -1981,7 +1981,7 @@ void tms3203x_device::lde_ind(UINT32 op)
m_r[dreg].set_mantissa(0);
}
-void tms3203x_device::lde_imm(UINT32 op)
+void tms3203x_device::lde_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -1992,7 +1992,7 @@ void tms3203x_device::lde_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldf_reg(UINT32 op)
+void tms3203x_device::ldf_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
m_r[dreg] = m_r[op & 7];
@@ -2000,25 +2000,25 @@ void tms3203x_device::ldf_reg(UINT32 op)
OR_NZF(m_r[dreg]);
}
-void tms3203x_device::ldf_dir(UINT32 op)
+void tms3203x_device::ldf_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
CLR_NZVUF();
OR_NZF(m_r[dreg]);
}
-void tms3203x_device::ldf_ind(UINT32 op)
+void tms3203x_device::ldf_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
CLR_NZVUF();
OR_NZF(m_r[dreg]);
}
-void tms3203x_device::ldf_imm(UINT32 op)
+void tms3203x_device::ldf_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(dreg, op);
@@ -2028,8 +2028,8 @@ void tms3203x_device::ldf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfi_dir(UINT32 op) { unimplemented(op); }
-void tms3203x_device::ldfi_ind(UINT32 op) { unimplemented(op); }
+void tms3203x_device::ldfi_dir(uint32_t op) { unimplemented(op); }
+void tms3203x_device::ldfi_ind(uint32_t op) { unimplemented(op); }
/*-----------------------------------------------------*/
@@ -2045,62 +2045,62 @@ void tms3203x_device::ldfi_ind(UINT32 op) { unimplemented(op); }
update_special(dreg); \
}
-void tms3203x_device::ldi_reg(UINT32 op)
+void tms3203x_device::ldi_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
LDI(dreg, src);
}
-void tms3203x_device::ldi_dir(UINT32 op)
+void tms3203x_device::ldi_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
LDI(dreg, src);
}
-void tms3203x_device::ldi_ind(UINT32 op)
+void tms3203x_device::ldi_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
LDI(dreg, src);
}
-void tms3203x_device::ldi_imm(UINT32 op)
+void tms3203x_device::ldi_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
LDI(dreg, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::ldii_dir(UINT32 op) { unimplemented(op); }
-void tms3203x_device::ldii_ind(UINT32 op) { unimplemented(op); }
+void tms3203x_device::ldii_dir(uint32_t op) { unimplemented(op); }
+void tms3203x_device::ldii_ind(uint32_t op) { unimplemented(op); }
/*-----------------------------------------------------*/
-void tms3203x_device::ldm_reg(UINT32 op)
+void tms3203x_device::ldm_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
m_r[dreg].set_mantissa(m_r[op & 7].mantissa());
}
-void tms3203x_device::ldm_dir(UINT32 op)
+void tms3203x_device::ldm_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
m_r[dreg].set_mantissa(res);
}
-void tms3203x_device::ldm_ind(UINT32 op)
+void tms3203x_device::ldm_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
m_r[dreg].set_mantissa(res);
}
-void tms3203x_device::ldm_imm(UINT32 op)
+void tms3203x_device::ldm_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -2111,19 +2111,19 @@ void tms3203x_device::ldm_imm(UINT32 op)
#define LSH(dreg, src, count) \
{ \
- UINT32 _res; \
- INT32 _count = (INT16)(count << 9) >> 9; /* 7 LSBs */ \
+ uint32_t _res; \
+ int32_t _count = (int16_t)(count << 9) >> 9; /* 7 LSBs */ \
if (_count < 0) \
{ \
if (_count >= -31) \
- _res = (UINT32)src >> -_count; \
+ _res = (uint32_t)src >> -_count; \
else \
_res = 0; \
} \
else \
{ \
if (_count <= 31) \
- _res = (UINT32)src << _count; \
+ _res = (uint32_t)src << _count; \
else \
_res = 0; \
} \
@@ -2135,75 +2135,75 @@ void tms3203x_device::ldm_imm(UINT32 op)
if (_count < 0) \
{ \
if (_count >= -32) \
- OR_C(((UINT32)src >> (-_count - 1)) & 1); \
+ OR_C(((uint32_t)src >> (-_count - 1)) & 1); \
} \
else if (_count > 0) \
{ \
if (_count <= 32) \
- OR_C(((UINT32)src << (_count - 1)) >> 31); \
+ OR_C(((uint32_t)src << (_count - 1)) >> 31); \
} \
} \
else if (dreg >= TMR_BK) \
update_special(dreg); \
}
-void tms3203x_device::lsh_reg(UINT32 op)
+void tms3203x_device::lsh_reg(uint32_t op)
{
int dreg = (op >> 16) & 31;
int count = IREG(op & 31);
- UINT32 src = IREG(dreg);
+ uint32_t src = IREG(dreg);
LSH(dreg, src, count);
}
-void tms3203x_device::lsh_dir(UINT32 op)
+void tms3203x_device::lsh_dir(uint32_t op)
{
int dreg = (op >> 16) & 31;
int count = RMEM(DIRECT(op));
- UINT32 src = IREG(dreg);
+ uint32_t src = IREG(dreg);
LSH(dreg, src, count);
}
-void tms3203x_device::lsh_ind(UINT32 op)
+void tms3203x_device::lsh_ind(uint32_t op)
{
int dreg = (op >> 16) & 31;
int count = RMEM(INDIRECT_D(op, op >> 8));
- UINT32 src = IREG(dreg);
+ uint32_t src = IREG(dreg);
LSH(dreg, src, count);
}
-void tms3203x_device::lsh_imm(UINT32 op)
+void tms3203x_device::lsh_imm(uint32_t op)
{
int dreg = (op >> 16) & 31;
int count = op;
- UINT32 src = IREG(dreg);
+ uint32_t src = IREG(dreg);
LSH(dreg, src, count);
}
/*-----------------------------------------------------*/
-void tms3203x_device::mpyf_reg(UINT32 op)
+void tms3203x_device::mpyf_reg(uint32_t op)
{
int dreg = (op >> 16) & 31;
mpyf(m_r[dreg], m_r[dreg], m_r[op & 31]);
}
-void tms3203x_device::mpyf_dir(UINT32 op)
+void tms3203x_device::mpyf_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
LONG2FP(TMR_TEMP1, res);
mpyf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::mpyf_ind(UINT32 op)
+void tms3203x_device::mpyf_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
LONG2FP(TMR_TEMP1, res);
mpyf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::mpyf_imm(UINT32 op)
+void tms3203x_device::mpyf_imm(uint32_t op)
{
int dreg = (op >> 16) & 31;
SHORT2FP(TMR_TEMP1, op);
@@ -2214,51 +2214,51 @@ void tms3203x_device::mpyf_imm(UINT32 op)
#define MPYI(dreg, src1, src2) \
{ \
- INT64 _res = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);\
- if (!OVM() || (_res >= -(INT64)0x80000000 && _res <= (INT64)0x7fffffff)) \
+ int64_t _res = (int64_t)((int32_t)(src1 << 8) >> 8) * (int64_t)((int32_t)(src2 << 8) >> 8);\
+ if (!OVM() || (_res >= -(int64_t)0x80000000 && _res <= (int64_t)0x7fffffff)) \
IREG(dreg) = _res; \
else \
IREG(dreg) = (_res < 0) ? 0x80000000 : 0x7fffffff; \
if (dreg < 8) \
{ \
CLR_NZVUF(); \
- OR_NZ((UINT32)_res); \
- if (_res < -(INT64)0x80000000 || _res > (INT64)0x7fffffff) \
+ OR_NZ((uint32_t)_res); \
+ if (_res < -(int64_t)0x80000000 || _res > (int64_t)0x7fffffff) \
IREG(TMR_ST) |= VFLAG | LVFLAG; \
} \
else if (dreg >= TMR_BK) \
update_special(dreg); \
}
-void tms3203x_device::mpyi_reg(UINT32 op)
+void tms3203x_device::mpyi_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
MPYI(dreg, dst, src);
}
-void tms3203x_device::mpyi_dir(UINT32 op)
+void tms3203x_device::mpyi_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
MPYI(dreg, dst, src);
}
-void tms3203x_device::mpyi_ind(UINT32 op)
+void tms3203x_device::mpyi_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
MPYI(dreg, dst, src);
}
-void tms3203x_device::mpyi_imm(UINT32 op)
+void tms3203x_device::mpyi_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
MPYI(dreg, dst, src);
}
@@ -2266,14 +2266,14 @@ void tms3203x_device::mpyi_imm(UINT32 op)
#define NEGB(dreg, src) \
{ \
- UINT32 _res = 0 - src - (IREG(TMR_ST) & CFLAG); \
+ uint32_t _res = 0 - src - (IREG(TMR_ST) & CFLAG); \
if (!OVM() || !OVERFLOW_SUB(0,src,_res)) \
IREG(dreg) = _res; \
else \
- IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff; \
+ IREG(dreg) = ((int32_t)src < 0) ? 0x80000000 : 0x7fffffff; \
if (dreg < 8) \
{ \
- UINT32 tempc = IREG(TMR_ST) & CFLAG; \
+ uint32_t tempc = IREG(TMR_ST) & CFLAG; \
CLR_NZCVUF(); \
OR_C_SBB(0,src,tempc); \
OR_V_SUB(0,src,_res); \
@@ -2283,59 +2283,59 @@ void tms3203x_device::mpyi_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::negb_reg(UINT32 op)
+void tms3203x_device::negb_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
NEGB(dreg, src);
}
-void tms3203x_device::negb_dir(UINT32 op)
+void tms3203x_device::negb_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
NEGB(dreg, src);
}
-void tms3203x_device::negb_ind(UINT32 op)
+void tms3203x_device::negb_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
NEGB(dreg, src);
}
-void tms3203x_device::negb_imm(UINT32 op)
+void tms3203x_device::negb_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
NEGB(dreg, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::negf_reg(UINT32 op)
+void tms3203x_device::negf_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
negf(m_r[dreg], m_r[op & 7]);
}
-void tms3203x_device::negf_dir(UINT32 op)
+void tms3203x_device::negf_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
negf(m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::negf_ind(UINT32 op)
+void tms3203x_device::negf_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
negf(m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::negf_imm(UINT32 op)
+void tms3203x_device::negf_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -2346,11 +2346,11 @@ void tms3203x_device::negf_imm(UINT32 op)
#define NEGI(dreg, src) \
{ \
- UINT32 _res = 0 - src; \
+ uint32_t _res = 0 - src; \
if (!OVM() || !OVERFLOW_SUB(0,src,_res)) \
IREG(dreg) = _res; \
else \
- IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff; \
+ IREG(dreg) = ((int32_t)src < 0) ? 0x80000000 : 0x7fffffff; \
if (dreg < 8) \
{ \
CLR_NZCVUF(); \
@@ -2362,70 +2362,70 @@ void tms3203x_device::negf_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::negi_reg(UINT32 op)
+void tms3203x_device::negi_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
NEGI(dreg, src);
}
-void tms3203x_device::negi_dir(UINT32 op)
+void tms3203x_device::negi_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
NEGI(dreg, src);
}
-void tms3203x_device::negi_ind(UINT32 op)
+void tms3203x_device::negi_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
NEGI(dreg, src);
}
-void tms3203x_device::negi_imm(UINT32 op)
+void tms3203x_device::negi_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
NEGI(dreg, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::nop_reg(UINT32 op)
+void tms3203x_device::nop_reg(uint32_t op)
{
}
-void tms3203x_device::nop_ind(UINT32 op)
+void tms3203x_device::nop_ind(uint32_t op)
{
RMEM(INDIRECT_D(op, op >> 8));
}
/*-----------------------------------------------------*/
-void tms3203x_device::norm_reg(UINT32 op)
+void tms3203x_device::norm_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
norm(m_r[dreg], m_r[op & 7]);
}
-void tms3203x_device::norm_dir(UINT32 op)
+void tms3203x_device::norm_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
norm(m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::norm_ind(UINT32 op)
+void tms3203x_device::norm_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
norm(m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::norm_imm(UINT32 op)
+void tms3203x_device::norm_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -2436,7 +2436,7 @@ void tms3203x_device::norm_imm(UINT32 op)
#define NOT(dreg, src) \
{ \
- UINT32 _res = ~(src); \
+ uint32_t _res = ~(src); \
IREG(dreg) = _res; \
if (dreg < 8) \
{ \
@@ -2447,40 +2447,40 @@ void tms3203x_device::norm_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::not_reg(UINT32 op)
+void tms3203x_device::not_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
NOT(dreg, src);
}
-void tms3203x_device::not_dir(UINT32 op)
+void tms3203x_device::not_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
NOT(dreg, src);
}
-void tms3203x_device::not_ind(UINT32 op)
+void tms3203x_device::not_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
NOT(dreg, src);
}
-void tms3203x_device::not_imm(UINT32 op)
+void tms3203x_device::not_imm(uint32_t op)
{
- UINT32 src = (UINT16)op;
+ uint32_t src = (uint16_t)op;
int dreg = (op >> 16) & 31;
NOT(dreg, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::pop(UINT32 op)
+void tms3203x_device::pop(uint32_t op)
{
int dreg = (op >> 16) & 31;
- UINT32 val = RMEM(IREG(TMR_SP)--);
+ uint32_t val = RMEM(IREG(TMR_SP)--);
IREG(dreg) = val;
if (dreg < 8)
{
@@ -2491,21 +2491,21 @@ void tms3203x_device::pop(UINT32 op)
update_special(dreg);
}
-void tms3203x_device::popf(UINT32 op)
+void tms3203x_device::popf(uint32_t op)
{
int dreg = (op >> 16) & 7;
- UINT32 val = RMEM(IREG(TMR_SP)--);
+ uint32_t val = RMEM(IREG(TMR_SP)--);
LONG2FP(dreg, val);
CLR_NZVUF();
OR_NZF(m_r[dreg]);
}
-void tms3203x_device::push(UINT32 op)
+void tms3203x_device::push(uint32_t op)
{
WMEM(++IREG(TMR_SP), IREG((op >> 16) & 31));
}
-void tms3203x_device::pushf(UINT32 op)
+void tms3203x_device::pushf(uint32_t op)
{
int dreg = (op >> 16) & 7;
WMEM(++IREG(TMR_SP), FP2LONG(dreg));
@@ -2515,7 +2515,7 @@ void tms3203x_device::pushf(UINT32 op)
#define OR(dreg, src1, src2) \
{ \
- UINT32 _res = (src1) | (src2); \
+ uint32_t _res = (src1) | (src2); \
IREG(dreg) = _res; \
if (dreg < 8) \
{ \
@@ -2526,56 +2526,56 @@ void tms3203x_device::pushf(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::or_reg(UINT32 op)
+void tms3203x_device::or_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
OR(dreg, dst, src);
}
-void tms3203x_device::or_dir(UINT32 op)
+void tms3203x_device::or_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
OR(dreg, dst, src);
}
-void tms3203x_device::or_ind(UINT32 op)
+void tms3203x_device::or_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
OR(dreg, dst, src);
}
-void tms3203x_device::or_imm(UINT32 op)
+void tms3203x_device::or_imm(uint32_t op)
{
- UINT32 src = (UINT16)op;
+ uint32_t src = (uint16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
OR(dreg, dst, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::maxspeed(UINT32 op) { unimplemented(op); }
+void tms3203x_device::maxspeed(uint32_t op) { unimplemented(op); }
/*-----------------------------------------------------*/
#define RND(dreg) \
{ \
- INT32 man = FREGMAN(dreg); \
+ int32_t man = FREGMAN(dreg); \
CLR_NVUF(); \
if (man < 0x7fffff80) \
{ \
- m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0xffffff00); \
+ m_r[dreg].set_mantissa(((uint32_t)man + 0x80) & 0xffffff00); \
OR_NUF(m_r[dreg]); \
} \
else if (FREGEXP(dreg) < 127) \
{ \
- m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0x7fffff00); \
+ m_r[dreg].set_mantissa(((uint32_t)man + 0x80) & 0x7fffff00); \
m_r[dreg].set_exponent(FREGEXP(dreg) + 1); \
OR_NUF(m_r[dreg]); \
} \
@@ -2586,7 +2586,7 @@ void tms3203x_device::maxspeed(UINT32 op) { unimplemented(op); }
} \
}
-void tms3203x_device::rnd_reg(UINT32 op)
+void tms3203x_device::rnd_reg(uint32_t op)
{
int sreg = op & 7;
int dreg = (op >> 16) & 7;
@@ -2594,23 +2594,23 @@ void tms3203x_device::rnd_reg(UINT32 op)
RND(dreg);
}
-void tms3203x_device::rnd_dir(UINT32 op)
+void tms3203x_device::rnd_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
RND(dreg);
}
-void tms3203x_device::rnd_ind(UINT32 op)
+void tms3203x_device::rnd_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
RND(dreg);
}
-void tms3203x_device::rnd_imm(UINT32 op)
+void tms3203x_device::rnd_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(dreg, op);
@@ -2619,10 +2619,10 @@ void tms3203x_device::rnd_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::rol(UINT32 op)
+void tms3203x_device::rol(uint32_t op)
{
int dreg = (op >> 16) & 31;
- UINT32 res = IREG(dreg);
+ uint32_t res = IREG(dreg);
int newcflag = res >> 31;
res = (res << 1) | newcflag;
IREG(dreg) = res;
@@ -2636,10 +2636,10 @@ void tms3203x_device::rol(UINT32 op)
update_special(dreg);
}
-void tms3203x_device::rolc(UINT32 op)
+void tms3203x_device::rolc(uint32_t op)
{
int dreg = (op >> 16) & 31;
- UINT32 res = IREG(dreg);
+ uint32_t res = IREG(dreg);
int newcflag = res >> 31;
res = (res << 1) | (IREG(TMR_ST) & CFLAG);
IREG(dreg) = res;
@@ -2653,10 +2653,10 @@ void tms3203x_device::rolc(UINT32 op)
update_special(dreg);
}
-void tms3203x_device::ror(UINT32 op)
+void tms3203x_device::ror(uint32_t op)
{
int dreg = (op >> 16) & 31;
- UINT32 res = IREG(dreg);
+ uint32_t res = IREG(dreg);
int newcflag = res & 1;
res = (res >> 1) | (newcflag << 31);
IREG(dreg) = res;
@@ -2670,10 +2670,10 @@ void tms3203x_device::ror(UINT32 op)
update_special(dreg);
}
-void tms3203x_device::rorc(UINT32 op)
+void tms3203x_device::rorc(uint32_t op)
{
int dreg = (op >> 16) & 31;
- UINT32 res = IREG(dreg);
+ uint32_t res = IREG(dreg);
int newcflag = res & 1;
res = (res >> 1) | ((IREG(TMR_ST) & CFLAG) << 31);
IREG(dreg) = res;
@@ -2689,7 +2689,7 @@ void tms3203x_device::rorc(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::rtps_reg(UINT32 op)
+void tms3203x_device::rtps_reg(uint32_t op)
{
IREG(TMR_RC) = IREG(op & 31);
IREG(TMR_RS) = m_pc;
@@ -2699,7 +2699,7 @@ void tms3203x_device::rtps_reg(UINT32 op)
m_delayed = true;
}
-void tms3203x_device::rtps_dir(UINT32 op)
+void tms3203x_device::rtps_dir(uint32_t op)
{
IREG(TMR_RC) = RMEM(DIRECT(op));
IREG(TMR_RS) = m_pc;
@@ -2709,7 +2709,7 @@ void tms3203x_device::rtps_dir(UINT32 op)
m_delayed = true;
}
-void tms3203x_device::rtps_ind(UINT32 op)
+void tms3203x_device::rtps_ind(uint32_t op)
{
IREG(TMR_RC) = RMEM(INDIRECT_D(op, op >> 8));
IREG(TMR_RS) = m_pc;
@@ -2719,9 +2719,9 @@ void tms3203x_device::rtps_ind(UINT32 op)
m_delayed = true;
}
-void tms3203x_device::rtps_imm(UINT32 op)
+void tms3203x_device::rtps_imm(uint32_t op)
{
- IREG(TMR_RC) = (UINT16)op;
+ IREG(TMR_RC) = (uint16_t)op;
IREG(TMR_RS) = m_pc;
IREG(TMR_RE) = m_pc;
IREG(TMR_ST) |= RMFLAG;
@@ -2731,54 +2731,54 @@ void tms3203x_device::rtps_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::stf_dir(UINT32 op)
+void tms3203x_device::stf_dir(uint32_t op)
{
WMEM(DIRECT(op), FP2LONG((op >> 16) & 7));
}
-void tms3203x_device::stf_ind(UINT32 op)
+void tms3203x_device::stf_ind(uint32_t op)
{
WMEM(INDIRECT_D(op, op >> 8), FP2LONG((op >> 16) & 7));
}
/*-----------------------------------------------------*/
-void tms3203x_device::stfi_dir(UINT32 op) { unimplemented(op); }
-void tms3203x_device::stfi_ind(UINT32 op) { unimplemented(op); }
+void tms3203x_device::stfi_dir(uint32_t op) { unimplemented(op); }
+void tms3203x_device::stfi_ind(uint32_t op) { unimplemented(op); }
/*-----------------------------------------------------*/
-void tms3203x_device::sti_dir(UINT32 op)
+void tms3203x_device::sti_dir(uint32_t op)
{
WMEM(DIRECT(op), IREG((op >> 16) & 31));
}
-void tms3203x_device::sti_ind(UINT32 op)
+void tms3203x_device::sti_ind(uint32_t op)
{
WMEM(INDIRECT_D(op, op >> 8), IREG((op >> 16) & 31));
}
/*-----------------------------------------------------*/
-void tms3203x_device::stii_dir(UINT32 op) { unimplemented(op); }
-void tms3203x_device::stii_ind(UINT32 op) { unimplemented(op); }
+void tms3203x_device::stii_dir(uint32_t op) { unimplemented(op); }
+void tms3203x_device::stii_ind(uint32_t op) { unimplemented(op); }
/*-----------------------------------------------------*/
-void tms3203x_device::sigi(UINT32 op) { unimplemented(op); }
+void tms3203x_device::sigi(uint32_t op) { unimplemented(op); }
/*-----------------------------------------------------*/
#define SUBB(dreg, src1, src2) \
{ \
- UINT32 _res = src1 - src2 - (IREG(TMR_ST) & CFLAG); \
+ uint32_t _res = src1 - src2 - (IREG(TMR_ST) & CFLAG); \
if (!OVM() || !OVERFLOW_SUB(src1,src2,_res)) \
IREG(dreg) = _res; \
else \
- IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
+ IREG(dreg) = ((int32_t)src1 < 0) ? 0x80000000 : 0x7fffffff; \
if (dreg < 8) \
{ \
- UINT32 tempc = IREG(TMR_ST) & CFLAG; \
+ uint32_t tempc = IREG(TMR_ST) & CFLAG; \
CLR_NZCVUF(); \
OR_C_SBB(src1,src2,tempc); \
OR_V_SUB(src1,src2,_res); \
@@ -2788,35 +2788,35 @@ void tms3203x_device::sigi(UINT32 op) { unimplemented(op); }
update_special(dreg); \
}
-void tms3203x_device::subb_reg(UINT32 op)
+void tms3203x_device::subb_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBB(dreg, dst, src);
}
-void tms3203x_device::subb_dir(UINT32 op)
+void tms3203x_device::subb_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBB(dreg, dst, src);
}
-void tms3203x_device::subb_ind(UINT32 op)
+void tms3203x_device::subb_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBB(dreg, dst, src);
}
-void tms3203x_device::subb_imm(UINT32 op)
+void tms3203x_device::subb_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBB(dreg, dst, src);
}
@@ -2824,7 +2824,7 @@ void tms3203x_device::subb_imm(UINT32 op)
#define SUBC(dreg, src) \
{ \
- UINT32 dst = IREG(dreg); \
+ uint32_t dst = IREG(dreg); \
if (dst >= src) \
IREG(dreg) = ((dst - src) << 1) | 1; \
else \
@@ -2833,59 +2833,59 @@ void tms3203x_device::subb_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::subc_reg(UINT32 op)
+void tms3203x_device::subc_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
SUBC(dreg, src);
}
-void tms3203x_device::subc_dir(UINT32 op)
+void tms3203x_device::subc_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
SUBC(dreg, src);
}
-void tms3203x_device::subc_ind(UINT32 op)
+void tms3203x_device::subc_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
SUBC(dreg, src);
}
-void tms3203x_device::subc_imm(UINT32 op)
+void tms3203x_device::subc_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
SUBC(dreg, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::subf_reg(UINT32 op)
+void tms3203x_device::subf_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
subf(m_r[dreg], m_r[dreg], m_r[op & 7]);
}
-void tms3203x_device::subf_dir(UINT32 op)
+void tms3203x_device::subf_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
subf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::subf_ind(UINT32 op)
+void tms3203x_device::subf_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
subf(m_r[dreg], m_r[dreg], m_r[TMR_TEMP1]);
}
-void tms3203x_device::subf_imm(UINT32 op)
+void tms3203x_device::subf_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -2896,11 +2896,11 @@ void tms3203x_device::subf_imm(UINT32 op)
#define SUBI(dreg, src1, src2) \
{ \
- UINT32 _res = src1 - src2; \
+ uint32_t _res = src1 - src2; \
if (!OVM() || !OVERFLOW_SUB(src1,src2,_res)) \
IREG(dreg) = _res; \
else \
- IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
+ IREG(dreg) = ((int32_t)src1 < 0) ? 0x80000000 : 0x7fffffff; \
if (dreg < 8) \
{ \
CLR_NZCVUF(); \
@@ -2912,97 +2912,97 @@ void tms3203x_device::subf_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::subi_reg(UINT32 op)
+void tms3203x_device::subi_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBI(dreg, dst, src);
}
-void tms3203x_device::subi_dir(UINT32 op)
+void tms3203x_device::subi_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBI(dreg, dst, src);
}
-void tms3203x_device::subi_ind(UINT32 op)
+void tms3203x_device::subi_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBI(dreg, dst, src);
}
-void tms3203x_device::subi_imm(UINT32 op)
+void tms3203x_device::subi_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBI(dreg, dst, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::subrb_reg(UINT32 op)
+void tms3203x_device::subrb_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBB(dreg, src, dst);
}
-void tms3203x_device::subrb_dir(UINT32 op)
+void tms3203x_device::subrb_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBB(dreg, src, dst);
}
-void tms3203x_device::subrb_ind(UINT32 op)
+void tms3203x_device::subrb_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBB(dreg, src, dst);
}
-void tms3203x_device::subrb_imm(UINT32 op)
+void tms3203x_device::subrb_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBB(dreg, src, dst);
}
/*-----------------------------------------------------*/
-void tms3203x_device::subrf_reg(UINT32 op)
+void tms3203x_device::subrf_reg(uint32_t op)
{
int dreg = (op >> 16) & 7;
subf(m_r[dreg], m_r[op & 7], m_r[dreg]);
}
-void tms3203x_device::subrf_dir(UINT32 op)
+void tms3203x_device::subrf_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
subf(m_r[dreg], m_r[TMR_TEMP1], m_r[dreg]);
}
-void tms3203x_device::subrf_ind(UINT32 op)
+void tms3203x_device::subrf_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, res);
subf(m_r[dreg], m_r[TMR_TEMP1], m_r[dreg]);
}
-void tms3203x_device::subrf_imm(UINT32 op)
+void tms3203x_device::subrf_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(TMR_TEMP1, op);
@@ -3011,35 +3011,35 @@ void tms3203x_device::subrf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::subri_reg(UINT32 op)
+void tms3203x_device::subri_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBI(dreg, src, dst);
}
-void tms3203x_device::subri_dir(UINT32 op)
+void tms3203x_device::subri_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBI(dreg, src, dst);
}
-void tms3203x_device::subri_ind(UINT32 op)
+void tms3203x_device::subri_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBI(dreg, src, dst);
}
-void tms3203x_device::subri_imm(UINT32 op)
+void tms3203x_device::subri_imm(uint32_t op)
{
- UINT32 src = (INT16)op;
+ uint32_t src = (int16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
SUBI(dreg, src, dst);
}
@@ -3047,36 +3047,36 @@ void tms3203x_device::subri_imm(UINT32 op)
#define TSTB(src1, src2) \
{ \
- UINT32 _res = (src1) & (src2); \
+ uint32_t _res = (src1) & (src2); \
CLR_NZVUF(); \
OR_NZ(_res); \
}
-void tms3203x_device::tstb_reg(UINT32 op)
+void tms3203x_device::tstb_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
- UINT32 dst = IREG((op >> 16) & 31);
+ uint32_t src = IREG(op & 31);
+ uint32_t dst = IREG((op >> 16) & 31);
TSTB(dst, src);
}
-void tms3203x_device::tstb_dir(UINT32 op)
+void tms3203x_device::tstb_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
- UINT32 dst = IREG((op >> 16) & 31);
+ uint32_t src = RMEM(DIRECT(op));
+ uint32_t dst = IREG((op >> 16) & 31);
TSTB(dst, src);
}
-void tms3203x_device::tstb_ind(UINT32 op)
+void tms3203x_device::tstb_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
- UINT32 dst = IREG((op >> 16) & 31);
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t dst = IREG((op >> 16) & 31);
TSTB(dst, src);
}
-void tms3203x_device::tstb_imm(UINT32 op)
+void tms3203x_device::tstb_imm(uint32_t op)
{
- UINT32 src = (UINT16)op;
- UINT32 dst = IREG((op >> 16) & 31);
+ uint32_t src = (uint16_t)op;
+ uint32_t dst = IREG((op >> 16) & 31);
TSTB(dst, src);
}
@@ -3084,7 +3084,7 @@ void tms3203x_device::tstb_imm(UINT32 op)
#define XOR(dreg, src1, src2) \
{ \
- UINT32 _res = (src1) ^ (src2); \
+ uint32_t _res = (src1) ^ (src2); \
IREG(dreg) = _res; \
if (dreg < 8) \
{ \
@@ -3095,41 +3095,41 @@ void tms3203x_device::tstb_imm(UINT32 op)
update_special(dreg); \
}
-void tms3203x_device::xor_reg(UINT32 op)
+void tms3203x_device::xor_reg(uint32_t op)
{
- UINT32 src = IREG(op & 31);
+ uint32_t src = IREG(op & 31);
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
XOR(dreg, dst, src);
}
-void tms3203x_device::xor_dir(UINT32 op)
+void tms3203x_device::xor_dir(uint32_t op)
{
- UINT32 src = RMEM(DIRECT(op));
+ uint32_t src = RMEM(DIRECT(op));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
XOR(dreg, dst, src);
}
-void tms3203x_device::xor_ind(UINT32 op)
+void tms3203x_device::xor_ind(uint32_t op)
{
- UINT32 src = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t src = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
XOR(dreg, dst, src);
}
-void tms3203x_device::xor_imm(UINT32 op)
+void tms3203x_device::xor_imm(uint32_t op)
{
- UINT32 src = (UINT16)op;
+ uint32_t src = (uint16_t)op;
int dreg = (op >> 16) & 31;
- UINT32 dst = IREG(dreg);
+ uint32_t dst = IREG(dreg);
XOR(dreg, dst, src);
}
/*-----------------------------------------------------*/
-void tms3203x_device::iack_dir(UINT32 op)
+void tms3203x_device::iack_dir(uint32_t op)
{
offs_t addr = DIRECT(op);
m_iack_cb(addr, ASSERT_LINE);
@@ -3137,7 +3137,7 @@ void tms3203x_device::iack_dir(UINT32 op)
m_iack_cb(addr, CLEAR_LINE);
}
-void tms3203x_device::iack_ind(UINT32 op)
+void tms3203x_device::iack_ind(uint32_t op)
{
offs_t addr = INDIRECT_D(op, op >> 8);
m_iack_cb(addr, ASSERT_LINE);
@@ -3147,35 +3147,35 @@ void tms3203x_device::iack_ind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::addc3_regreg(UINT32 op)
+void tms3203x_device::addc3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
ADDC(dreg, src1, src2);
}
-void tms3203x_device::addc3_indreg(UINT32 op)
+void tms3203x_device::addc3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
ADDC(dreg, src1, src2);
}
-void tms3203x_device::addc3_regind(UINT32 op)
+void tms3203x_device::addc3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
ADDC(dreg, src1, src2);
}
-void tms3203x_device::addc3_indind(UINT32 op)
+void tms3203x_device::addc3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
ADDC(dreg, src1, src2);
@@ -3183,7 +3183,7 @@ void tms3203x_device::addc3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::addf3_regreg(UINT32 op)
+void tms3203x_device::addf3_regreg(uint32_t op)
{
int sreg1 = (op >> 8) & 7;
int sreg2 = op & 7;
@@ -3191,29 +3191,29 @@ void tms3203x_device::addf3_regreg(UINT32 op)
addf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
}
-void tms3203x_device::addf3_indreg(UINT32 op)
+void tms3203x_device::addf3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
int sreg2 = op & 7;
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, src1);
addf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
}
-void tms3203x_device::addf3_regind(UINT32 op)
+void tms3203x_device::addf3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int sreg1 = (op >> 8) & 7;
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP2, src2);
addf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
}
-void tms3203x_device::addf3_indind(UINT32 op)
+void tms3203x_device::addf3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 7;
UPDATE_DEF();
LONG2FP(TMR_TEMP1, src1);
@@ -3223,36 +3223,36 @@ void tms3203x_device::addf3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::addi3_regreg(UINT32 op)
+void tms3203x_device::addi3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
ADDI(dreg, src1, src2);
}
-void tms3203x_device::addi3_indreg(UINT32 op)
+void tms3203x_device::addi3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
ADDI(dreg, src1, src2);
}
-void tms3203x_device::addi3_regind(UINT32 op)
+void tms3203x_device::addi3_regind(uint32_t op)
{
// Radikal Bikers confirms via ADDI3 AR3,*AR3++(1),R2 / SUB $0001,R2 sequence
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
ADDI(dreg, src1, src2);
}
-void tms3203x_device::addi3_indind(UINT32 op)
+void tms3203x_device::addi3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
ADDI(dreg, src1, src2);
@@ -3260,35 +3260,35 @@ void tms3203x_device::addi3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::and3_regreg(UINT32 op)
+void tms3203x_device::and3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
AND(dreg, src1, src2);
}
-void tms3203x_device::and3_indreg(UINT32 op)
+void tms3203x_device::and3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
AND(dreg, src1, src2);
}
-void tms3203x_device::and3_regind(UINT32 op)
+void tms3203x_device::and3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
AND(dreg, src1, src2);
}
-void tms3203x_device::and3_indind(UINT32 op)
+void tms3203x_device::and3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
AND(dreg, src1, src2);
@@ -3296,35 +3296,35 @@ void tms3203x_device::and3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::andn3_regreg(UINT32 op)
+void tms3203x_device::andn3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
ANDN(dreg, src1, src2);
}
-void tms3203x_device::andn3_indreg(UINT32 op)
+void tms3203x_device::andn3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
ANDN(dreg, src1, src2);
}
-void tms3203x_device::andn3_regind(UINT32 op)
+void tms3203x_device::andn3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
ANDN(dreg, src1, src2);
}
-void tms3203x_device::andn3_indind(UINT32 op)
+void tms3203x_device::andn3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
ANDN(dreg, src1, src2);
@@ -3332,35 +3332,35 @@ void tms3203x_device::andn3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ash3_regreg(UINT32 op)
+void tms3203x_device::ash3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
ASH(dreg, src1, src2);
}
-void tms3203x_device::ash3_indreg(UINT32 op)
+void tms3203x_device::ash3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
ASH(dreg, src1, src2);
}
-void tms3203x_device::ash3_regind(UINT32 op)
+void tms3203x_device::ash3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
ASH(dreg, src1, src2);
}
-void tms3203x_device::ash3_indind(UINT32 op)
+void tms3203x_device::ash3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
ASH(dreg, src1, src2);
@@ -3368,34 +3368,34 @@ void tms3203x_device::ash3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::cmpf3_regreg(UINT32 op)
+void tms3203x_device::cmpf3_regreg(uint32_t op)
{
int sreg1 = (op >> 8) & 7;
int sreg2 = op & 7;
subf(m_r[TMR_TEMP1], m_r[sreg1], m_r[sreg2]);
}
-void tms3203x_device::cmpf3_indreg(UINT32 op)
+void tms3203x_device::cmpf3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
int sreg2 = op & 7;
LONG2FP(TMR_TEMP1, src1);
subf(m_r[TMR_TEMP1], m_r[TMR_TEMP1], m_r[sreg2]);
}
-void tms3203x_device::cmpf3_regind(UINT32 op)
+void tms3203x_device::cmpf3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int sreg1 = (op >> 8) & 7;
LONG2FP(TMR_TEMP2, src2);
subf(m_r[TMR_TEMP1], m_r[sreg1], m_r[TMR_TEMP2]);
}
-void tms3203x_device::cmpf3_indind(UINT32 op)
+void tms3203x_device::cmpf3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
UPDATE_DEF();
LONG2FP(TMR_TEMP1, src1);
LONG2FP(TMR_TEMP2, src2);
@@ -3404,67 +3404,67 @@ void tms3203x_device::cmpf3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::cmpi3_regreg(UINT32 op)
+void tms3203x_device::cmpi3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
CMPI(src1, src2);
}
-void tms3203x_device::cmpi3_indreg(UINT32 op)
+void tms3203x_device::cmpi3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
CMPI(src1, src2);
}
-void tms3203x_device::cmpi3_regind(UINT32 op)
+void tms3203x_device::cmpi3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
CMPI(src1, src2);
}
-void tms3203x_device::cmpi3_indind(UINT32 op)
+void tms3203x_device::cmpi3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
UPDATE_DEF();
CMPI(src1, src2);
}
/*-----------------------------------------------------*/
-void tms3203x_device::lsh3_regreg(UINT32 op)
+void tms3203x_device::lsh3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
LSH(dreg, src1, src2);
}
-void tms3203x_device::lsh3_indreg(UINT32 op)
+void tms3203x_device::lsh3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
LSH(dreg, src1, src2);
}
-void tms3203x_device::lsh3_regind(UINT32 op)
+void tms3203x_device::lsh3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
LSH(dreg, src1, src2);
}
-void tms3203x_device::lsh3_indind(UINT32 op)
+void tms3203x_device::lsh3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
LSH(dreg, src1, src2);
@@ -3472,7 +3472,7 @@ void tms3203x_device::lsh3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::mpyf3_regreg(UINT32 op)
+void tms3203x_device::mpyf3_regreg(uint32_t op)
{
int sreg1 = (op >> 8) & 7;
int sreg2 = op & 7;
@@ -3480,29 +3480,29 @@ void tms3203x_device::mpyf3_regreg(UINT32 op)
mpyf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
}
-void tms3203x_device::mpyf3_indreg(UINT32 op)
+void tms3203x_device::mpyf3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
int sreg2 = op & 7;
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, src1);
mpyf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
}
-void tms3203x_device::mpyf3_regind(UINT32 op)
+void tms3203x_device::mpyf3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int sreg1 = (op >> 8) & 7;
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP2, src2);
mpyf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
}
-void tms3203x_device::mpyf3_indind(UINT32 op)
+void tms3203x_device::mpyf3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 7;
UPDATE_DEF();
LONG2FP(TMR_TEMP1, src1);
@@ -3512,35 +3512,35 @@ void tms3203x_device::mpyf3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::mpyi3_regreg(UINT32 op)
+void tms3203x_device::mpyi3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
MPYI(dreg, src1, src2);
}
-void tms3203x_device::mpyi3_indreg(UINT32 op)
+void tms3203x_device::mpyi3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
MPYI(dreg, src1, src2);
}
-void tms3203x_device::mpyi3_regind(UINT32 op)
+void tms3203x_device::mpyi3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
MPYI(dreg, src1, src2);
}
-void tms3203x_device::mpyi3_indind(UINT32 op)
+void tms3203x_device::mpyi3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
MPYI(dreg, src1, src2);
@@ -3548,35 +3548,35 @@ void tms3203x_device::mpyi3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::or3_regreg(UINT32 op)
+void tms3203x_device::or3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
OR(dreg, src1, src2);
}
-void tms3203x_device::or3_indreg(UINT32 op)
+void tms3203x_device::or3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
OR(dreg, src1, src2);
}
-void tms3203x_device::or3_regind(UINT32 op)
+void tms3203x_device::or3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
OR(dreg, src1, src2);
}
-void tms3203x_device::or3_indind(UINT32 op)
+void tms3203x_device::or3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
OR(dreg, src1, src2);
@@ -3584,35 +3584,35 @@ void tms3203x_device::or3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::subb3_regreg(UINT32 op)
+void tms3203x_device::subb3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
SUBB(dreg, src1, src2);
}
-void tms3203x_device::subb3_indreg(UINT32 op)
+void tms3203x_device::subb3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
SUBB(dreg, src1, src2);
}
-void tms3203x_device::subb3_regind(UINT32 op)
+void tms3203x_device::subb3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
SUBB(dreg, src1, src2);
}
-void tms3203x_device::subb3_indind(UINT32 op)
+void tms3203x_device::subb3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
SUBB(dreg, src1, src2);
@@ -3620,7 +3620,7 @@ void tms3203x_device::subb3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::subf3_regreg(UINT32 op)
+void tms3203x_device::subf3_regreg(uint32_t op)
{
int sreg1 = (op >> 8) & 7;
int sreg2 = op & 7;
@@ -3628,29 +3628,29 @@ void tms3203x_device::subf3_regreg(UINT32 op)
subf(m_r[dreg], m_r[sreg1], m_r[sreg2]);
}
-void tms3203x_device::subf3_indreg(UINT32 op)
+void tms3203x_device::subf3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
int sreg2 = op & 7;
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP1, src1);
subf(m_r[dreg], m_r[TMR_TEMP1], m_r[sreg2]);
}
-void tms3203x_device::subf3_regind(UINT32 op)
+void tms3203x_device::subf3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int sreg1 = (op >> 8) & 7;
int dreg = (op >> 16) & 7;
LONG2FP(TMR_TEMP2, src2);
subf(m_r[dreg], m_r[sreg1], m_r[TMR_TEMP2]);
}
-void tms3203x_device::subf3_indind(UINT32 op)
+void tms3203x_device::subf3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 7;
UPDATE_DEF();
LONG2FP(TMR_TEMP1, src1);
@@ -3660,35 +3660,35 @@ void tms3203x_device::subf3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::subi3_regreg(UINT32 op)
+void tms3203x_device::subi3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
SUBI(dreg, src1, src2);
}
-void tms3203x_device::subi3_indreg(UINT32 op)
+void tms3203x_device::subi3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
SUBI(dreg, src1, src2);
}
-void tms3203x_device::subi3_regind(UINT32 op)
+void tms3203x_device::subi3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
SUBI(dreg, src1, src2);
}
-void tms3203x_device::subi3_indind(UINT32 op)
+void tms3203x_device::subi3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
SUBI(dreg, src1, src2);
@@ -3696,67 +3696,67 @@ void tms3203x_device::subi3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::tstb3_regreg(UINT32 op)
+void tms3203x_device::tstb3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
TSTB(src1, src2);
}
-void tms3203x_device::tstb3_indreg(UINT32 op)
+void tms3203x_device::tstb3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
TSTB(src1, src2);
}
-void tms3203x_device::tstb3_regind(UINT32 op)
+void tms3203x_device::tstb3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
TSTB(src1, src2);
}
-void tms3203x_device::tstb3_indind(UINT32 op)
+void tms3203x_device::tstb3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
UPDATE_DEF();
TSTB(src1, src2);
}
/*-----------------------------------------------------*/
-void tms3203x_device::xor3_regreg(UINT32 op)
+void tms3203x_device::xor3_regreg(uint32_t op)
{
- UINT32 src1 = IREG((op >> 8) & 31);
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
XOR(dreg, src1, src2);
}
-void tms3203x_device::xor3_indreg(UINT32 op)
+void tms3203x_device::xor3_indreg(uint32_t op)
{
- UINT32 src1 = RMEM(INDIRECT_1(op, op >> 8));
- UINT32 src2 = IREG(op & 31);
+ uint32_t src1 = RMEM(INDIRECT_1(op, op >> 8));
+ uint32_t src2 = IREG(op & 31);
int dreg = (op >> 16) & 31;
XOR(dreg, src1, src2);
}
-void tms3203x_device::xor3_regind(UINT32 op)
+void tms3203x_device::xor3_regind(uint32_t op)
{
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
- UINT32 src1 = IREG((op >> 8) & 31);
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = IREG((op >> 8) & 31);
int dreg = (op >> 16) & 31;
XOR(dreg, src1, src2);
}
-void tms3203x_device::xor3_indind(UINT32 op)
+void tms3203x_device::xor3_indind(uint32_t op)
{
DECLARE_DEF;
- UINT32 src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src2 = RMEM(INDIRECT_1(op, op));
+ uint32_t src1 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src2 = RMEM(INDIRECT_1(op, op));
int dreg = (op >> 16) & 31;
UPDATE_DEF();
XOR(dreg, src1, src2);
@@ -3764,26 +3764,26 @@ void tms3203x_device::xor3_indind(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfu_reg(UINT32 op)
+void tms3203x_device::ldfu_reg(uint32_t op)
{
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfu_dir(UINT32 op)
+void tms3203x_device::ldfu_dir(uint32_t op)
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
-void tms3203x_device::ldfu_ind(UINT32 op)
+void tms3203x_device::ldfu_ind(uint32_t op)
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
-void tms3203x_device::ldfu_imm(UINT32 op)
+void tms3203x_device::ldfu_imm(uint32_t op)
{
int dreg = (op >> 16) & 7;
SHORT2FP(dreg, op);
@@ -3791,27 +3791,27 @@ void tms3203x_device::ldfu_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldflo_reg(UINT32 op)
+void tms3203x_device::ldflo_reg(uint32_t op)
{
if (CONDITION_LO())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldflo_dir(UINT32 op)
+void tms3203x_device::ldflo_dir(uint32_t op)
{
if (CONDITION_LO())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldflo_ind(UINT32 op)
+void tms3203x_device::ldflo_ind(uint32_t op)
{
if (CONDITION_LO())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -3819,7 +3819,7 @@ void tms3203x_device::ldflo_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldflo_imm(UINT32 op)
+void tms3203x_device::ldflo_imm(uint32_t op)
{
if (CONDITION_LO())
{
@@ -3830,27 +3830,27 @@ void tms3203x_device::ldflo_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfls_reg(UINT32 op)
+void tms3203x_device::ldfls_reg(uint32_t op)
{
if (CONDITION_LS())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfls_dir(UINT32 op)
+void tms3203x_device::ldfls_dir(uint32_t op)
{
if (CONDITION_LS())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfls_ind(UINT32 op)
+void tms3203x_device::ldfls_ind(uint32_t op)
{
if (CONDITION_LS())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -3858,7 +3858,7 @@ void tms3203x_device::ldfls_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfls_imm(UINT32 op)
+void tms3203x_device::ldfls_imm(uint32_t op)
{
if (CONDITION_LS())
{
@@ -3869,27 +3869,27 @@ void tms3203x_device::ldfls_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfhi_reg(UINT32 op)
+void tms3203x_device::ldfhi_reg(uint32_t op)
{
if (CONDITION_HI())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfhi_dir(UINT32 op)
+void tms3203x_device::ldfhi_dir(uint32_t op)
{
if (CONDITION_HI())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfhi_ind(UINT32 op)
+void tms3203x_device::ldfhi_ind(uint32_t op)
{
if (CONDITION_HI())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -3897,7 +3897,7 @@ void tms3203x_device::ldfhi_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfhi_imm(UINT32 op)
+void tms3203x_device::ldfhi_imm(uint32_t op)
{
if (CONDITION_HI())
{
@@ -3908,27 +3908,27 @@ void tms3203x_device::ldfhi_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfhs_reg(UINT32 op)
+void tms3203x_device::ldfhs_reg(uint32_t op)
{
if (CONDITION_HS())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfhs_dir(UINT32 op)
+void tms3203x_device::ldfhs_dir(uint32_t op)
{
if (CONDITION_HS())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfhs_ind(UINT32 op)
+void tms3203x_device::ldfhs_ind(uint32_t op)
{
if (CONDITION_HS())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -3936,7 +3936,7 @@ void tms3203x_device::ldfhs_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfhs_imm(UINT32 op)
+void tms3203x_device::ldfhs_imm(uint32_t op)
{
if (CONDITION_HS())
{
@@ -3947,27 +3947,27 @@ void tms3203x_device::ldfhs_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfeq_reg(UINT32 op)
+void tms3203x_device::ldfeq_reg(uint32_t op)
{
if (CONDITION_EQ())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfeq_dir(UINT32 op)
+void tms3203x_device::ldfeq_dir(uint32_t op)
{
if (CONDITION_EQ())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfeq_ind(UINT32 op)
+void tms3203x_device::ldfeq_ind(uint32_t op)
{
if (CONDITION_EQ())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -3975,7 +3975,7 @@ void tms3203x_device::ldfeq_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfeq_imm(UINT32 op)
+void tms3203x_device::ldfeq_imm(uint32_t op)
{
if (CONDITION_EQ())
{
@@ -3986,27 +3986,27 @@ void tms3203x_device::ldfeq_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfne_reg(UINT32 op)
+void tms3203x_device::ldfne_reg(uint32_t op)
{
if (CONDITION_NE())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfne_dir(UINT32 op)
+void tms3203x_device::ldfne_dir(uint32_t op)
{
if (CONDITION_NE())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfne_ind(UINT32 op)
+void tms3203x_device::ldfne_ind(uint32_t op)
{
if (CONDITION_NE())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4014,7 +4014,7 @@ void tms3203x_device::ldfne_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfne_imm(UINT32 op)
+void tms3203x_device::ldfne_imm(uint32_t op)
{
if (CONDITION_NE())
{
@@ -4025,27 +4025,27 @@ void tms3203x_device::ldfne_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldflt_reg(UINT32 op)
+void tms3203x_device::ldflt_reg(uint32_t op)
{
if (CONDITION_LT())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldflt_dir(UINT32 op)
+void tms3203x_device::ldflt_dir(uint32_t op)
{
if (CONDITION_LT())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldflt_ind(UINT32 op)
+void tms3203x_device::ldflt_ind(uint32_t op)
{
if (CONDITION_LT())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4053,7 +4053,7 @@ void tms3203x_device::ldflt_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldflt_imm(UINT32 op)
+void tms3203x_device::ldflt_imm(uint32_t op)
{
if (CONDITION_LT())
{
@@ -4064,27 +4064,27 @@ void tms3203x_device::ldflt_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfle_reg(UINT32 op)
+void tms3203x_device::ldfle_reg(uint32_t op)
{
if (CONDITION_LE())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfle_dir(UINT32 op)
+void tms3203x_device::ldfle_dir(uint32_t op)
{
if (CONDITION_LE())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfle_ind(UINT32 op)
+void tms3203x_device::ldfle_ind(uint32_t op)
{
if (CONDITION_LE())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4092,7 +4092,7 @@ void tms3203x_device::ldfle_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfle_imm(UINT32 op)
+void tms3203x_device::ldfle_imm(uint32_t op)
{
if (CONDITION_LE())
{
@@ -4103,27 +4103,27 @@ void tms3203x_device::ldfle_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfgt_reg(UINT32 op)
+void tms3203x_device::ldfgt_reg(uint32_t op)
{
if (CONDITION_GT())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfgt_dir(UINT32 op)
+void tms3203x_device::ldfgt_dir(uint32_t op)
{
if (CONDITION_GT())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfgt_ind(UINT32 op)
+void tms3203x_device::ldfgt_ind(uint32_t op)
{
if (CONDITION_GT())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4131,7 +4131,7 @@ void tms3203x_device::ldfgt_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfgt_imm(UINT32 op)
+void tms3203x_device::ldfgt_imm(uint32_t op)
{
if (CONDITION_GT())
{
@@ -4142,27 +4142,27 @@ void tms3203x_device::ldfgt_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfge_reg(UINT32 op)
+void tms3203x_device::ldfge_reg(uint32_t op)
{
if (CONDITION_GE())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfge_dir(UINT32 op)
+void tms3203x_device::ldfge_dir(uint32_t op)
{
if (CONDITION_GE())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfge_ind(UINT32 op)
+void tms3203x_device::ldfge_ind(uint32_t op)
{
if (CONDITION_GE())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4170,7 +4170,7 @@ void tms3203x_device::ldfge_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfge_imm(UINT32 op)
+void tms3203x_device::ldfge_imm(uint32_t op)
{
if (CONDITION_GE())
{
@@ -4181,27 +4181,27 @@ void tms3203x_device::ldfge_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfnv_reg(UINT32 op)
+void tms3203x_device::ldfnv_reg(uint32_t op)
{
if (CONDITION_NV())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfnv_dir(UINT32 op)
+void tms3203x_device::ldfnv_dir(uint32_t op)
{
if (CONDITION_NV())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfnv_ind(UINT32 op)
+void tms3203x_device::ldfnv_ind(uint32_t op)
{
if (CONDITION_NV())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4209,7 +4209,7 @@ void tms3203x_device::ldfnv_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfnv_imm(UINT32 op)
+void tms3203x_device::ldfnv_imm(uint32_t op)
{
if (CONDITION_NV())
{
@@ -4220,27 +4220,27 @@ void tms3203x_device::ldfnv_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfv_reg(UINT32 op)
+void tms3203x_device::ldfv_reg(uint32_t op)
{
if (CONDITION_V())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfv_dir(UINT32 op)
+void tms3203x_device::ldfv_dir(uint32_t op)
{
if (CONDITION_V())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfv_ind(UINT32 op)
+void tms3203x_device::ldfv_ind(uint32_t op)
{
if (CONDITION_V())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4248,7 +4248,7 @@ void tms3203x_device::ldfv_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfv_imm(UINT32 op)
+void tms3203x_device::ldfv_imm(uint32_t op)
{
if (CONDITION_V())
{
@@ -4259,27 +4259,27 @@ void tms3203x_device::ldfv_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfnuf_reg(UINT32 op)
+void tms3203x_device::ldfnuf_reg(uint32_t op)
{
if (CONDITION_NUF())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfnuf_dir(UINT32 op)
+void tms3203x_device::ldfnuf_dir(uint32_t op)
{
if (CONDITION_NUF())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfnuf_ind(UINT32 op)
+void tms3203x_device::ldfnuf_ind(uint32_t op)
{
if (CONDITION_NUF())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4287,7 +4287,7 @@ void tms3203x_device::ldfnuf_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfnuf_imm(UINT32 op)
+void tms3203x_device::ldfnuf_imm(uint32_t op)
{
if (CONDITION_NUF())
{
@@ -4298,27 +4298,27 @@ void tms3203x_device::ldfnuf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfuf_reg(UINT32 op)
+void tms3203x_device::ldfuf_reg(uint32_t op)
{
if (CONDITION_UF())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfuf_dir(UINT32 op)
+void tms3203x_device::ldfuf_dir(uint32_t op)
{
if (CONDITION_UF())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfuf_ind(UINT32 op)
+void tms3203x_device::ldfuf_ind(uint32_t op)
{
if (CONDITION_UF())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4326,7 +4326,7 @@ void tms3203x_device::ldfuf_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfuf_imm(UINT32 op)
+void tms3203x_device::ldfuf_imm(uint32_t op)
{
if (CONDITION_UF())
{
@@ -4337,27 +4337,27 @@ void tms3203x_device::ldfuf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfnlv_reg(UINT32 op)
+void tms3203x_device::ldfnlv_reg(uint32_t op)
{
if (CONDITION_NLV())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfnlv_dir(UINT32 op)
+void tms3203x_device::ldfnlv_dir(uint32_t op)
{
if (CONDITION_NLV())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfnlv_ind(UINT32 op)
+void tms3203x_device::ldfnlv_ind(uint32_t op)
{
if (CONDITION_NLV())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4365,7 +4365,7 @@ void tms3203x_device::ldfnlv_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfnlv_imm(UINT32 op)
+void tms3203x_device::ldfnlv_imm(uint32_t op)
{
if (CONDITION_NLV())
{
@@ -4376,27 +4376,27 @@ void tms3203x_device::ldfnlv_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldflv_reg(UINT32 op)
+void tms3203x_device::ldflv_reg(uint32_t op)
{
if (CONDITION_LV())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldflv_dir(UINT32 op)
+void tms3203x_device::ldflv_dir(uint32_t op)
{
if (CONDITION_LV())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldflv_ind(UINT32 op)
+void tms3203x_device::ldflv_ind(uint32_t op)
{
if (CONDITION_LV())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4404,7 +4404,7 @@ void tms3203x_device::ldflv_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldflv_imm(UINT32 op)
+void tms3203x_device::ldflv_imm(uint32_t op)
{
if (CONDITION_LV())
{
@@ -4415,27 +4415,27 @@ void tms3203x_device::ldflv_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfnluf_reg(UINT32 op)
+void tms3203x_device::ldfnluf_reg(uint32_t op)
{
if (CONDITION_NLUF())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfnluf_dir(UINT32 op)
+void tms3203x_device::ldfnluf_dir(uint32_t op)
{
if (CONDITION_NLUF())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfnluf_ind(UINT32 op)
+void tms3203x_device::ldfnluf_ind(uint32_t op)
{
if (CONDITION_NLUF())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4443,7 +4443,7 @@ void tms3203x_device::ldfnluf_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfnluf_imm(UINT32 op)
+void tms3203x_device::ldfnluf_imm(uint32_t op)
{
if (CONDITION_NLUF())
{
@@ -4454,27 +4454,27 @@ void tms3203x_device::ldfnluf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfluf_reg(UINT32 op)
+void tms3203x_device::ldfluf_reg(uint32_t op)
{
if (CONDITION_LUF())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfluf_dir(UINT32 op)
+void tms3203x_device::ldfluf_dir(uint32_t op)
{
if (CONDITION_LUF())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfluf_ind(UINT32 op)
+void tms3203x_device::ldfluf_ind(uint32_t op)
{
if (CONDITION_LUF())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4482,7 +4482,7 @@ void tms3203x_device::ldfluf_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfluf_imm(UINT32 op)
+void tms3203x_device::ldfluf_imm(uint32_t op)
{
if (CONDITION_LUF())
{
@@ -4493,27 +4493,27 @@ void tms3203x_device::ldfluf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfzuf_reg(UINT32 op)
+void tms3203x_device::ldfzuf_reg(uint32_t op)
{
if (CONDITION_ZUF())
m_r[(op >> 16) & 7] = m_r[op & 7];
}
-void tms3203x_device::ldfzuf_dir(UINT32 op)
+void tms3203x_device::ldfzuf_dir(uint32_t op)
{
if (CONDITION_ZUF())
{
- UINT32 res = RMEM(DIRECT(op));
+ uint32_t res = RMEM(DIRECT(op));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
}
-void tms3203x_device::ldfzuf_ind(UINT32 op)
+void tms3203x_device::ldfzuf_ind(uint32_t op)
{
if (CONDITION_ZUF())
{
- UINT32 res = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t res = RMEM(INDIRECT_D(op, op >> 8));
int dreg = (op >> 16) & 7;
LONG2FP(dreg, res);
}
@@ -4521,7 +4521,7 @@ void tms3203x_device::ldfzuf_ind(UINT32 op)
INDIRECT_D(op, op >> 8);
}
-void tms3203x_device::ldfzuf_imm(UINT32 op)
+void tms3203x_device::ldfzuf_imm(uint32_t op)
{
if (CONDITION_ZUF())
{
@@ -4532,7 +4532,7 @@ void tms3203x_device::ldfzuf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldiu_reg(UINT32 op)
+void tms3203x_device::ldiu_reg(uint32_t op)
{
int dreg = (op >> 16) & 31;
IREG(dreg) = IREG(op & 31);
@@ -4540,7 +4540,7 @@ void tms3203x_device::ldiu_reg(UINT32 op)
update_special(dreg);
}
-void tms3203x_device::ldiu_dir(UINT32 op)
+void tms3203x_device::ldiu_dir(uint32_t op)
{
int dreg = (op >> 16) & 31;
IREG(dreg) = RMEM(DIRECT(op));
@@ -4548,7 +4548,7 @@ void tms3203x_device::ldiu_dir(UINT32 op)
update_special(dreg);
}
-void tms3203x_device::ldiu_ind(UINT32 op)
+void tms3203x_device::ldiu_ind(uint32_t op)
{
int dreg = (op >> 16) & 31;
IREG(dreg) = RMEM(INDIRECT_D(op, op >> 8));
@@ -4556,17 +4556,17 @@ void tms3203x_device::ldiu_ind(UINT32 op)
update_special(dreg);
}
-void tms3203x_device::ldiu_imm(UINT32 op)
+void tms3203x_device::ldiu_imm(uint32_t op)
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
/*-----------------------------------------------------*/
-void tms3203x_device::ldilo_reg(UINT32 op)
+void tms3203x_device::ldilo_reg(uint32_t op)
{
if (CONDITION_LO())
{
@@ -4577,9 +4577,9 @@ void tms3203x_device::ldilo_reg(UINT32 op)
}
}
-void tms3203x_device::ldilo_dir(UINT32 op)
+void tms3203x_device::ldilo_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_LO())
{
int dreg = (op >> 16) & 31;
@@ -4589,9 +4589,9 @@ void tms3203x_device::ldilo_dir(UINT32 op)
}
}
-void tms3203x_device::ldilo_ind(UINT32 op)
+void tms3203x_device::ldilo_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_LO())
{
int dreg = (op >> 16) & 31;
@@ -4601,12 +4601,12 @@ void tms3203x_device::ldilo_ind(UINT32 op)
}
}
-void tms3203x_device::ldilo_imm(UINT32 op)
+void tms3203x_device::ldilo_imm(uint32_t op)
{
if (CONDITION_LO())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4614,7 +4614,7 @@ void tms3203x_device::ldilo_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldils_reg(UINT32 op)
+void tms3203x_device::ldils_reg(uint32_t op)
{
if (CONDITION_LS())
{
@@ -4625,9 +4625,9 @@ void tms3203x_device::ldils_reg(UINT32 op)
}
}
-void tms3203x_device::ldils_dir(UINT32 op)
+void tms3203x_device::ldils_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_LS())
{
int dreg = (op >> 16) & 31;
@@ -4637,9 +4637,9 @@ void tms3203x_device::ldils_dir(UINT32 op)
}
}
-void tms3203x_device::ldils_ind(UINT32 op)
+void tms3203x_device::ldils_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_LS())
{
int dreg = (op >> 16) & 31;
@@ -4649,12 +4649,12 @@ void tms3203x_device::ldils_ind(UINT32 op)
}
}
-void tms3203x_device::ldils_imm(UINT32 op)
+void tms3203x_device::ldils_imm(uint32_t op)
{
if (CONDITION_LS())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4662,7 +4662,7 @@ void tms3203x_device::ldils_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldihi_reg(UINT32 op)
+void tms3203x_device::ldihi_reg(uint32_t op)
{
if (CONDITION_HI())
{
@@ -4673,9 +4673,9 @@ void tms3203x_device::ldihi_reg(UINT32 op)
}
}
-void tms3203x_device::ldihi_dir(UINT32 op)
+void tms3203x_device::ldihi_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_HI())
{
int dreg = (op >> 16) & 31;
@@ -4685,9 +4685,9 @@ void tms3203x_device::ldihi_dir(UINT32 op)
}
}
-void tms3203x_device::ldihi_ind(UINT32 op)
+void tms3203x_device::ldihi_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_HI())
{
int dreg = (op >> 16) & 31;
@@ -4697,12 +4697,12 @@ void tms3203x_device::ldihi_ind(UINT32 op)
}
}
-void tms3203x_device::ldihi_imm(UINT32 op)
+void tms3203x_device::ldihi_imm(uint32_t op)
{
if (CONDITION_HI())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4710,7 +4710,7 @@ void tms3203x_device::ldihi_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldihs_reg(UINT32 op)
+void tms3203x_device::ldihs_reg(uint32_t op)
{
if (CONDITION_HS())
{
@@ -4721,9 +4721,9 @@ void tms3203x_device::ldihs_reg(UINT32 op)
}
}
-void tms3203x_device::ldihs_dir(UINT32 op)
+void tms3203x_device::ldihs_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_HS())
{
int dreg = (op >> 16) & 31;
@@ -4733,9 +4733,9 @@ void tms3203x_device::ldihs_dir(UINT32 op)
}
}
-void tms3203x_device::ldihs_ind(UINT32 op)
+void tms3203x_device::ldihs_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_HS())
{
int dreg = (op >> 16) & 31;
@@ -4745,12 +4745,12 @@ void tms3203x_device::ldihs_ind(UINT32 op)
}
}
-void tms3203x_device::ldihs_imm(UINT32 op)
+void tms3203x_device::ldihs_imm(uint32_t op)
{
if (CONDITION_HS())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4758,7 +4758,7 @@ void tms3203x_device::ldihs_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldieq_reg(UINT32 op)
+void tms3203x_device::ldieq_reg(uint32_t op)
{
if (CONDITION_EQ())
{
@@ -4769,9 +4769,9 @@ void tms3203x_device::ldieq_reg(UINT32 op)
}
}
-void tms3203x_device::ldieq_dir(UINT32 op)
+void tms3203x_device::ldieq_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_EQ())
{
int dreg = (op >> 16) & 31;
@@ -4781,9 +4781,9 @@ void tms3203x_device::ldieq_dir(UINT32 op)
}
}
-void tms3203x_device::ldieq_ind(UINT32 op)
+void tms3203x_device::ldieq_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_EQ())
{
int dreg = (op >> 16) & 31;
@@ -4793,12 +4793,12 @@ void tms3203x_device::ldieq_ind(UINT32 op)
}
}
-void tms3203x_device::ldieq_imm(UINT32 op)
+void tms3203x_device::ldieq_imm(uint32_t op)
{
if (CONDITION_EQ())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4806,7 +4806,7 @@ void tms3203x_device::ldieq_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldine_reg(UINT32 op)
+void tms3203x_device::ldine_reg(uint32_t op)
{
if (CONDITION_NE())
{
@@ -4817,9 +4817,9 @@ void tms3203x_device::ldine_reg(UINT32 op)
}
}
-void tms3203x_device::ldine_dir(UINT32 op)
+void tms3203x_device::ldine_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_NE())
{
int dreg = (op >> 16) & 31;
@@ -4829,9 +4829,9 @@ void tms3203x_device::ldine_dir(UINT32 op)
}
}
-void tms3203x_device::ldine_ind(UINT32 op)
+void tms3203x_device::ldine_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_NE())
{
int dreg = (op >> 16) & 31;
@@ -4841,12 +4841,12 @@ void tms3203x_device::ldine_ind(UINT32 op)
}
}
-void tms3203x_device::ldine_imm(UINT32 op)
+void tms3203x_device::ldine_imm(uint32_t op)
{
if (CONDITION_NE())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4854,7 +4854,7 @@ void tms3203x_device::ldine_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldilt_reg(UINT32 op)
+void tms3203x_device::ldilt_reg(uint32_t op)
{
if (CONDITION_LT())
{
@@ -4865,9 +4865,9 @@ void tms3203x_device::ldilt_reg(UINT32 op)
}
}
-void tms3203x_device::ldilt_dir(UINT32 op)
+void tms3203x_device::ldilt_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_LT())
{
int dreg = (op >> 16) & 31;
@@ -4877,9 +4877,9 @@ void tms3203x_device::ldilt_dir(UINT32 op)
}
}
-void tms3203x_device::ldilt_ind(UINT32 op)
+void tms3203x_device::ldilt_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_LT())
{
int dreg = (op >> 16) & 31;
@@ -4889,12 +4889,12 @@ void tms3203x_device::ldilt_ind(UINT32 op)
}
}
-void tms3203x_device::ldilt_imm(UINT32 op)
+void tms3203x_device::ldilt_imm(uint32_t op)
{
if (CONDITION_LT())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4902,7 +4902,7 @@ void tms3203x_device::ldilt_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldile_reg(UINT32 op)
+void tms3203x_device::ldile_reg(uint32_t op)
{
if (CONDITION_LE())
{
@@ -4913,9 +4913,9 @@ void tms3203x_device::ldile_reg(UINT32 op)
}
}
-void tms3203x_device::ldile_dir(UINT32 op)
+void tms3203x_device::ldile_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_LE())
{
int dreg = (op >> 16) & 31;
@@ -4925,9 +4925,9 @@ void tms3203x_device::ldile_dir(UINT32 op)
}
}
-void tms3203x_device::ldile_ind(UINT32 op)
+void tms3203x_device::ldile_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_LE())
{
int dreg = (op >> 16) & 31;
@@ -4937,12 +4937,12 @@ void tms3203x_device::ldile_ind(UINT32 op)
}
}
-void tms3203x_device::ldile_imm(UINT32 op)
+void tms3203x_device::ldile_imm(uint32_t op)
{
if (CONDITION_LE())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4950,7 +4950,7 @@ void tms3203x_device::ldile_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldigt_reg(UINT32 op)
+void tms3203x_device::ldigt_reg(uint32_t op)
{
if (CONDITION_GT())
{
@@ -4961,9 +4961,9 @@ void tms3203x_device::ldigt_reg(UINT32 op)
}
}
-void tms3203x_device::ldigt_dir(UINT32 op)
+void tms3203x_device::ldigt_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_GT())
{
int dreg = (op >> 16) & 31;
@@ -4973,9 +4973,9 @@ void tms3203x_device::ldigt_dir(UINT32 op)
}
}
-void tms3203x_device::ldigt_ind(UINT32 op)
+void tms3203x_device::ldigt_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_GT())
{
int dreg = (op >> 16) & 31;
@@ -4985,12 +4985,12 @@ void tms3203x_device::ldigt_ind(UINT32 op)
}
}
-void tms3203x_device::ldigt_imm(UINT32 op)
+void tms3203x_device::ldigt_imm(uint32_t op)
{
if (CONDITION_GT())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -4998,7 +4998,7 @@ void tms3203x_device::ldigt_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldige_reg(UINT32 op)
+void tms3203x_device::ldige_reg(uint32_t op)
{
if (CONDITION_GE())
{
@@ -5009,9 +5009,9 @@ void tms3203x_device::ldige_reg(UINT32 op)
}
}
-void tms3203x_device::ldige_dir(UINT32 op)
+void tms3203x_device::ldige_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_GE())
{
int dreg = (op >> 16) & 31;
@@ -5021,9 +5021,9 @@ void tms3203x_device::ldige_dir(UINT32 op)
}
}
-void tms3203x_device::ldige_ind(UINT32 op)
+void tms3203x_device::ldige_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_GE())
{
int dreg = (op >> 16) & 31;
@@ -5033,12 +5033,12 @@ void tms3203x_device::ldige_ind(UINT32 op)
}
}
-void tms3203x_device::ldige_imm(UINT32 op)
+void tms3203x_device::ldige_imm(uint32_t op)
{
if (CONDITION_GE())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5046,7 +5046,7 @@ void tms3203x_device::ldige_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldinv_reg(UINT32 op)
+void tms3203x_device::ldinv_reg(uint32_t op)
{
if (CONDITION_NV())
{
@@ -5057,9 +5057,9 @@ void tms3203x_device::ldinv_reg(UINT32 op)
}
}
-void tms3203x_device::ldinv_dir(UINT32 op)
+void tms3203x_device::ldinv_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_NV())
{
int dreg = (op >> 16) & 31;
@@ -5069,9 +5069,9 @@ void tms3203x_device::ldinv_dir(UINT32 op)
}
}
-void tms3203x_device::ldinv_ind(UINT32 op)
+void tms3203x_device::ldinv_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_NV())
{
int dreg = (op >> 16) & 31;
@@ -5081,12 +5081,12 @@ void tms3203x_device::ldinv_ind(UINT32 op)
}
}
-void tms3203x_device::ldinv_imm(UINT32 op)
+void tms3203x_device::ldinv_imm(uint32_t op)
{
if (CONDITION_NV())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5094,7 +5094,7 @@ void tms3203x_device::ldinv_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldiuf_reg(UINT32 op)
+void tms3203x_device::ldiuf_reg(uint32_t op)
{
if (CONDITION_UF())
{
@@ -5105,9 +5105,9 @@ void tms3203x_device::ldiuf_reg(UINT32 op)
}
}
-void tms3203x_device::ldiuf_dir(UINT32 op)
+void tms3203x_device::ldiuf_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_UF())
{
int dreg = (op >> 16) & 31;
@@ -5117,9 +5117,9 @@ void tms3203x_device::ldiuf_dir(UINT32 op)
}
}
-void tms3203x_device::ldiuf_ind(UINT32 op)
+void tms3203x_device::ldiuf_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_UF())
{
int dreg = (op >> 16) & 31;
@@ -5129,12 +5129,12 @@ void tms3203x_device::ldiuf_ind(UINT32 op)
}
}
-void tms3203x_device::ldiuf_imm(UINT32 op)
+void tms3203x_device::ldiuf_imm(uint32_t op)
{
if (CONDITION_UF())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5142,7 +5142,7 @@ void tms3203x_device::ldiuf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldinuf_reg(UINT32 op)
+void tms3203x_device::ldinuf_reg(uint32_t op)
{
if (CONDITION_NUF())
{
@@ -5153,9 +5153,9 @@ void tms3203x_device::ldinuf_reg(UINT32 op)
}
}
-void tms3203x_device::ldinuf_dir(UINT32 op)
+void tms3203x_device::ldinuf_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_NUF())
{
int dreg = (op >> 16) & 31;
@@ -5165,9 +5165,9 @@ void tms3203x_device::ldinuf_dir(UINT32 op)
}
}
-void tms3203x_device::ldinuf_ind(UINT32 op)
+void tms3203x_device::ldinuf_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_NUF())
{
int dreg = (op >> 16) & 31;
@@ -5177,12 +5177,12 @@ void tms3203x_device::ldinuf_ind(UINT32 op)
}
}
-void tms3203x_device::ldinuf_imm(UINT32 op)
+void tms3203x_device::ldinuf_imm(uint32_t op)
{
if (CONDITION_NUF())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5190,7 +5190,7 @@ void tms3203x_device::ldinuf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldiv_reg(UINT32 op)
+void tms3203x_device::ldiv_reg(uint32_t op)
{
if (CONDITION_V())
{
@@ -5201,9 +5201,9 @@ void tms3203x_device::ldiv_reg(UINT32 op)
}
}
-void tms3203x_device::ldiv_dir(UINT32 op)
+void tms3203x_device::ldiv_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_V())
{
int dreg = (op >> 16) & 31;
@@ -5213,9 +5213,9 @@ void tms3203x_device::ldiv_dir(UINT32 op)
}
}
-void tms3203x_device::ldiv_ind(UINT32 op)
+void tms3203x_device::ldiv_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_V())
{
int dreg = (op >> 16) & 31;
@@ -5225,12 +5225,12 @@ void tms3203x_device::ldiv_ind(UINT32 op)
}
}
-void tms3203x_device::ldiv_imm(UINT32 op)
+void tms3203x_device::ldiv_imm(uint32_t op)
{
if (CONDITION_V())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5238,7 +5238,7 @@ void tms3203x_device::ldiv_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldinlv_reg(UINT32 op)
+void tms3203x_device::ldinlv_reg(uint32_t op)
{
if (CONDITION_NLV())
{
@@ -5249,9 +5249,9 @@ void tms3203x_device::ldinlv_reg(UINT32 op)
}
}
-void tms3203x_device::ldinlv_dir(UINT32 op)
+void tms3203x_device::ldinlv_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_NLV())
{
int dreg = (op >> 16) & 31;
@@ -5261,9 +5261,9 @@ void tms3203x_device::ldinlv_dir(UINT32 op)
}
}
-void tms3203x_device::ldinlv_ind(UINT32 op)
+void tms3203x_device::ldinlv_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_NLV())
{
int dreg = (op >> 16) & 31;
@@ -5273,12 +5273,12 @@ void tms3203x_device::ldinlv_ind(UINT32 op)
}
}
-void tms3203x_device::ldinlv_imm(UINT32 op)
+void tms3203x_device::ldinlv_imm(uint32_t op)
{
if (CONDITION_NLV())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5286,7 +5286,7 @@ void tms3203x_device::ldinlv_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldilv_reg(UINT32 op)
+void tms3203x_device::ldilv_reg(uint32_t op)
{
if (CONDITION_LV())
{
@@ -5297,9 +5297,9 @@ void tms3203x_device::ldilv_reg(UINT32 op)
}
}
-void tms3203x_device::ldilv_dir(UINT32 op)
+void tms3203x_device::ldilv_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_LV())
{
int dreg = (op >> 16) & 31;
@@ -5309,9 +5309,9 @@ void tms3203x_device::ldilv_dir(UINT32 op)
}
}
-void tms3203x_device::ldilv_ind(UINT32 op)
+void tms3203x_device::ldilv_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_LV())
{
int dreg = (op >> 16) & 31;
@@ -5321,12 +5321,12 @@ void tms3203x_device::ldilv_ind(UINT32 op)
}
}
-void tms3203x_device::ldilv_imm(UINT32 op)
+void tms3203x_device::ldilv_imm(uint32_t op)
{
if (CONDITION_LV())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5334,7 +5334,7 @@ void tms3203x_device::ldilv_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldinluf_reg(UINT32 op)
+void tms3203x_device::ldinluf_reg(uint32_t op)
{
if (CONDITION_NLUF())
{
@@ -5345,9 +5345,9 @@ void tms3203x_device::ldinluf_reg(UINT32 op)
}
}
-void tms3203x_device::ldinluf_dir(UINT32 op)
+void tms3203x_device::ldinluf_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_NLUF())
{
int dreg = (op >> 16) & 31;
@@ -5357,9 +5357,9 @@ void tms3203x_device::ldinluf_dir(UINT32 op)
}
}
-void tms3203x_device::ldinluf_ind(UINT32 op)
+void tms3203x_device::ldinluf_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_NLUF())
{
int dreg = (op >> 16) & 31;
@@ -5369,12 +5369,12 @@ void tms3203x_device::ldinluf_ind(UINT32 op)
}
}
-void tms3203x_device::ldinluf_imm(UINT32 op)
+void tms3203x_device::ldinluf_imm(uint32_t op)
{
if (CONDITION_NLUF())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5382,7 +5382,7 @@ void tms3203x_device::ldinluf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldiluf_reg(UINT32 op)
+void tms3203x_device::ldiluf_reg(uint32_t op)
{
if (CONDITION_LUF())
{
@@ -5393,9 +5393,9 @@ void tms3203x_device::ldiluf_reg(UINT32 op)
}
}
-void tms3203x_device::ldiluf_dir(UINT32 op)
+void tms3203x_device::ldiluf_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_LUF())
{
int dreg = (op >> 16) & 31;
@@ -5405,9 +5405,9 @@ void tms3203x_device::ldiluf_dir(UINT32 op)
}
}
-void tms3203x_device::ldiluf_ind(UINT32 op)
+void tms3203x_device::ldiluf_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_LUF())
{
int dreg = (op >> 16) & 31;
@@ -5417,12 +5417,12 @@ void tms3203x_device::ldiluf_ind(UINT32 op)
}
}
-void tms3203x_device::ldiluf_imm(UINT32 op)
+void tms3203x_device::ldiluf_imm(uint32_t op)
{
if (CONDITION_LUF())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5430,7 +5430,7 @@ void tms3203x_device::ldiluf_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldizuf_reg(UINT32 op)
+void tms3203x_device::ldizuf_reg(uint32_t op)
{
if (CONDITION_ZUF())
{
@@ -5441,9 +5441,9 @@ void tms3203x_device::ldizuf_reg(UINT32 op)
}
}
-void tms3203x_device::ldizuf_dir(UINT32 op)
+void tms3203x_device::ldizuf_dir(uint32_t op)
{
- UINT32 val = RMEM(DIRECT(op));
+ uint32_t val = RMEM(DIRECT(op));
if (CONDITION_ZUF())
{
int dreg = (op >> 16) & 31;
@@ -5453,9 +5453,9 @@ void tms3203x_device::ldizuf_dir(UINT32 op)
}
}
-void tms3203x_device::ldizuf_ind(UINT32 op)
+void tms3203x_device::ldizuf_ind(uint32_t op)
{
- UINT32 val = RMEM(INDIRECT_D(op, op >> 8));
+ uint32_t val = RMEM(INDIRECT_D(op, op >> 8));
if (CONDITION_ZUF())
{
int dreg = (op >> 16) & 31;
@@ -5465,12 +5465,12 @@ void tms3203x_device::ldizuf_ind(UINT32 op)
}
}
-void tms3203x_device::ldizuf_imm(UINT32 op)
+void tms3203x_device::ldizuf_imm(uint32_t op)
{
if (CONDITION_ZUF())
{
int dreg = (op >> 16) & 31;
- IREG(dreg) = (INT16)op;
+ IREG(dreg) = (int16_t)op;
if (dreg >= TMR_BK)
update_special(dreg);
}
@@ -5478,7 +5478,7 @@ void tms3203x_device::ldizuf_imm(UINT32 op)
/*-----------------------------------------------------*/
-inline void tms3203x_device::execute_delayed(UINT32 newpc)
+inline void tms3203x_device::execute_delayed(uint32_t newpc)
{
m_delayed = true;
@@ -5511,20 +5511,20 @@ inline void tms3203x_device::execute_delayed(UINT32 newpc)
/*-----------------------------------------------------*/
-void tms3203x_device::br_imm(UINT32 op)
+void tms3203x_device::br_imm(uint32_t op)
{
m_pc = op & 0xffffff;
m_icount -= 3*2;
}
-void tms3203x_device::brd_imm(UINT32 op)
+void tms3203x_device::brd_imm(uint32_t op)
{
execute_delayed(op & 0xffffff);
}
/*-----------------------------------------------------*/
-void tms3203x_device::call_imm(UINT32 op)
+void tms3203x_device::call_imm(uint32_t op)
{
WMEM(++IREG(TMR_SP), m_pc);
m_pc = op & 0xffffff;
@@ -5533,7 +5533,7 @@ void tms3203x_device::call_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::rptb_imm(UINT32 op)
+void tms3203x_device::rptb_imm(uint32_t op)
{
IREG(TMR_RS) = m_pc;
IREG(TMR_RE) = op & 0xffffff;
@@ -5543,11 +5543,11 @@ void tms3203x_device::rptb_imm(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::swi(UINT32 op) { unimplemented(op); }
+void tms3203x_device::swi(uint32_t op) { unimplemented(op); }
/*-----------------------------------------------------*/
-void tms3203x_device::brc_reg(UINT32 op)
+void tms3203x_device::brc_reg(uint32_t op)
{
if (condition(op >> 16))
{
@@ -5556,7 +5556,7 @@ void tms3203x_device::brc_reg(UINT32 op)
}
}
-void tms3203x_device::brcd_reg(UINT32 op)
+void tms3203x_device::brcd_reg(uint32_t op)
{
if (condition(op >> 16))
execute_delayed(IREG(op & 31));
@@ -5564,26 +5564,26 @@ void tms3203x_device::brcd_reg(UINT32 op)
execute_delayed(~0);
}
-void tms3203x_device::brc_imm(UINT32 op)
+void tms3203x_device::brc_imm(uint32_t op)
{
if (condition(op >> 16))
{
- m_pc += (INT16)op;
+ m_pc += (int16_t)op;
m_icount -= 3*2;
}
}
-void tms3203x_device::brcd_imm(UINT32 op)
+void tms3203x_device::brcd_imm(uint32_t op)
{
if (condition(op >> 16))
- execute_delayed(m_pc + 2 + (INT16)op);
+ execute_delayed(m_pc + 2 + (int16_t)op);
else
execute_delayed(~0);
}
/*-----------------------------------------------------*/
-void tms3203x_device::dbc_reg(UINT32 op)
+void tms3203x_device::dbc_reg(uint32_t op)
{
int reg = TMR_AR0 + ((op >> 22) & 7);
int res = (IREG(reg) - 1) & 0xffffff;
@@ -5595,7 +5595,7 @@ void tms3203x_device::dbc_reg(UINT32 op)
}
}
-void tms3203x_device::dbcd_reg(UINT32 op)
+void tms3203x_device::dbcd_reg(uint32_t op)
{
int reg = TMR_AR0 + ((op >> 22) & 7);
int res = (IREG(reg) - 1) & 0xffffff;
@@ -5606,32 +5606,32 @@ void tms3203x_device::dbcd_reg(UINT32 op)
execute_delayed(~0);
}
-void tms3203x_device::dbc_imm(UINT32 op)
+void tms3203x_device::dbc_imm(uint32_t op)
{
int reg = TMR_AR0 + ((op >> 22) & 7);
int res = (IREG(reg) - 1) & 0xffffff;
IREG(reg) = res | (IREG(reg) & 0xff000000);
if (condition(op >> 16) && !(res & 0x800000))
{
- m_pc += (INT16)op;
+ m_pc += (int16_t)op;
m_icount -= 3*2;
}
}
-void tms3203x_device::dbcd_imm(UINT32 op)
+void tms3203x_device::dbcd_imm(uint32_t op)
{
int reg = TMR_AR0 + ((op >> 22) & 7);
int res = (IREG(reg) - 1) & 0xffffff;
IREG(reg) = res | (IREG(reg) & 0xff000000);
if (condition(op >> 16) && !(res & 0x800000))
- execute_delayed(m_pc + 2 + (INT16)op);
+ execute_delayed(m_pc + 2 + (int16_t)op);
else
execute_delayed(~0);
}
/*-----------------------------------------------------*/
-void tms3203x_device::callc_reg(UINT32 op)
+void tms3203x_device::callc_reg(uint32_t op)
{
if (condition(op >> 16))
{
@@ -5641,12 +5641,12 @@ void tms3203x_device::callc_reg(UINT32 op)
}
}
-void tms3203x_device::callc_imm(UINT32 op)
+void tms3203x_device::callc_imm(uint32_t op)
{
if (condition(op >> 16))
{
WMEM(++IREG(TMR_SP), m_pc);
- m_pc += (INT16)op;
+ m_pc += (int16_t)op;
m_icount -= 3*2;
}
}
@@ -5664,7 +5664,7 @@ void tms3203x_device::trap(int trapnum)
m_icount -= 4*2;
}
-void tms3203x_device::trapc(UINT32 op)
+void tms3203x_device::trapc(uint32_t op)
{
if (condition(op >> 16))
trap(op & 0x3f);
@@ -5672,7 +5672,7 @@ void tms3203x_device::trapc(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::retic_reg(UINT32 op)
+void tms3203x_device::retic_reg(uint32_t op)
{
if (condition(op >> 16))
{
@@ -5683,7 +5683,7 @@ void tms3203x_device::retic_reg(UINT32 op)
}
}
-void tms3203x_device::retsc_reg(UINT32 op)
+void tms3203x_device::retsc_reg(uint32_t op)
{
if (condition(op >> 16))
{
@@ -5694,12 +5694,12 @@ void tms3203x_device::retsc_reg(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::mpyaddf_0(UINT32 op)
+void tms3203x_device::mpyaddf_0(uint32_t op)
{
// src3 * src4, src1 + src2
DECLARE_DEF;
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
LONG2FP(TMR_TEMP1, src3);
LONG2FP(TMR_TEMP2, src4);
mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
@@ -5708,12 +5708,12 @@ void tms3203x_device::mpyaddf_0(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::mpyaddf_1(UINT32 op)
+void tms3203x_device::mpyaddf_1(uint32_t op)
{
// src3 * src1, src4 + src2
DECLARE_DEF;
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
LONG2FP(TMR_TEMP1, src3);
LONG2FP(TMR_TEMP2, src4);
mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
@@ -5722,12 +5722,12 @@ void tms3203x_device::mpyaddf_1(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::mpyaddf_2(UINT32 op)
+void tms3203x_device::mpyaddf_2(uint32_t op)
{
// src1 * src2, src3 + src4
DECLARE_DEF;
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
LONG2FP(TMR_TEMP1, src3);
LONG2FP(TMR_TEMP2, src4);
mpyf(m_r[TMR_TEMP3], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
@@ -5736,12 +5736,12 @@ void tms3203x_device::mpyaddf_2(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::mpyaddf_3(UINT32 op)
+void tms3203x_device::mpyaddf_3(uint32_t op)
{
// src3 * src1, src2 + src4
DECLARE_DEF;
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
LONG2FP(TMR_TEMP1, src3);
LONG2FP(TMR_TEMP2, src4);
mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
@@ -5752,12 +5752,12 @@ void tms3203x_device::mpyaddf_3(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::mpysubf_0(UINT32 op)
+void tms3203x_device::mpysubf_0(uint32_t op)
{
// src3 * src4, src1 - src2
DECLARE_DEF;
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
LONG2FP(TMR_TEMP1, src3);
LONG2FP(TMR_TEMP2, src4);
mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[TMR_TEMP2]);
@@ -5766,12 +5766,12 @@ void tms3203x_device::mpysubf_0(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::mpysubf_1(UINT32 op)
+void tms3203x_device::mpysubf_1(uint32_t op)
{
// src3 * src1, src4 - src2
DECLARE_DEF;
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
LONG2FP(TMR_TEMP1, src3);
LONG2FP(TMR_TEMP2, src4);
mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
@@ -5780,12 +5780,12 @@ void tms3203x_device::mpysubf_1(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::mpysubf_2(UINT32 op)
+void tms3203x_device::mpysubf_2(uint32_t op)
{
// src1 * src2, src3 - src4
DECLARE_DEF;
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
LONG2FP(TMR_TEMP1, src3);
LONG2FP(TMR_TEMP2, src4);
mpyf(m_r[TMR_TEMP3], m_r[(op >> 19) & 7], m_r[(op >> 16) & 7]);
@@ -5794,12 +5794,12 @@ void tms3203x_device::mpysubf_2(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::mpysubf_3(UINT32 op)
+void tms3203x_device::mpysubf_3(uint32_t op)
{
// src3 * src1, src2 - src4
DECLARE_DEF;
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
LONG2FP(TMR_TEMP1, src3);
LONG2FP(TMR_TEMP2, src4);
mpyf(m_r[TMR_TEMP3], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
@@ -5810,96 +5810,96 @@ void tms3203x_device::mpysubf_3(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::mpyaddi_0(UINT32 op)
+void tms3203x_device::mpyaddi_0(uint32_t op)
{
// src3 * src4, src1 + src2
DECLARE_DEF;
- UINT32 src1 = IREG((op >> 19) & 7);
- UINT32 src2 = IREG((op >> 16) & 7);
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
- INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src4 << 8) >> 8);
- UINT32 ares = src1 + src2;
+ uint32_t src1 = IREG((op >> 19) & 7);
+ uint32_t src2 = IREG((op >> 16) & 7);
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
+ int64_t mres = (int64_t)((int32_t)(src3 << 8) >> 8) * (int64_t)((int32_t)(src4 << 8) >> 8);
+ uint32_t ares = src1 + src2;
CLR_NZVUF();
if (OVM())
{
- if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
+ if (mres < -(int64_t)0x80000000 || mres > (int64_t)0x7fffffff)
mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
if (OVERFLOW_ADD(src1,src2,ares))
- ares = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;
+ ares = ((int32_t)src1 < 0) ? 0x80000000 : 0x7fffffff;
}
IREG((op >> 23) & 1) = mres;
IREG(((op >> 22) & 1) | 2) = ares;
UPDATE_DEF();
}
-void tms3203x_device::mpyaddi_1(UINT32 op)
+void tms3203x_device::mpyaddi_1(uint32_t op)
{
// src3 * src1, src4 + src2
DECLARE_DEF;
- UINT32 src1 = IREG((op >> 19) & 7);
- UINT32 src2 = IREG((op >> 16) & 7);
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
- INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
- UINT32 ares = src4 + src2;
+ uint32_t src1 = IREG((op >> 19) & 7);
+ uint32_t src2 = IREG((op >> 16) & 7);
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
+ int64_t mres = (int64_t)((int32_t)(src3 << 8) >> 8) * (int64_t)((int32_t)(src1 << 8) >> 8);
+ uint32_t ares = src4 + src2;
CLR_NZVUF();
if (OVM())
{
- if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
+ if (mres < -(int64_t)0x80000000 || mres > (int64_t)0x7fffffff)
mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
if (OVERFLOW_ADD(src4,src2,ares))
- ares = ((INT32)src4 < 0) ? 0x80000000 : 0x7fffffff;
+ ares = ((int32_t)src4 < 0) ? 0x80000000 : 0x7fffffff;
}
IREG((op >> 23) & 1) = mres;
IREG(((op >> 22) & 1) | 2) = ares;
UPDATE_DEF();
}
-void tms3203x_device::mpyaddi_2(UINT32 op)
+void tms3203x_device::mpyaddi_2(uint32_t op)
{
// src1 * src2, src3 + src4
DECLARE_DEF;
- UINT32 src1 = IREG((op >> 19) & 7);
- UINT32 src2 = IREG((op >> 16) & 7);
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
- INT64 mres = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);
- UINT32 ares = src3 + src4;
+ uint32_t src1 = IREG((op >> 19) & 7);
+ uint32_t src2 = IREG((op >> 16) & 7);
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
+ int64_t mres = (int64_t)((int32_t)(src1 << 8) >> 8) * (int64_t)((int32_t)(src2 << 8) >> 8);
+ uint32_t ares = src3 + src4;
CLR_NZVUF();
if (OVM())
{
- if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
+ if (mres < -(int64_t)0x80000000 || mres > (int64_t)0x7fffffff)
mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
if (OVERFLOW_ADD(src3,src4,ares))
- ares = ((INT32)src3 < 0) ? 0x80000000 : 0x7fffffff;
+ ares = ((int32_t)src3 < 0) ? 0x80000000 : 0x7fffffff;
}
IREG((op >> 23) & 1) = mres;
IREG(((op >> 22) & 1) | 2) = ares;
UPDATE_DEF();
}
-void tms3203x_device::mpyaddi_3(UINT32 op)
+void tms3203x_device::mpyaddi_3(uint32_t op)
{
// src3 * src1, src2 + src4
DECLARE_DEF;
- UINT32 src1 = IREG((op >> 19) & 7);
- UINT32 src2 = IREG((op >> 16) & 7);
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
- INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
- UINT32 ares = src2 + src4;
+ uint32_t src1 = IREG((op >> 19) & 7);
+ uint32_t src2 = IREG((op >> 16) & 7);
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
+ int64_t mres = (int64_t)((int32_t)(src3 << 8) >> 8) * (int64_t)((int32_t)(src1 << 8) >> 8);
+ uint32_t ares = src2 + src4;
CLR_NZVUF();
if (OVM())
{
- if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
+ if (mres < -(int64_t)0x80000000 || mres > (int64_t)0x7fffffff)
mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
if (OVERFLOW_ADD(src2,src4,ares))
- ares = ((INT32)src2 < 0) ? 0x80000000 : 0x7fffffff;
+ ares = ((int32_t)src2 < 0) ? 0x80000000 : 0x7fffffff;
}
IREG((op >> 23) & 1) = mres;
IREG(((op >> 22) & 1) | 2) = ares;
@@ -5908,96 +5908,96 @@ void tms3203x_device::mpyaddi_3(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::mpysubi_0(UINT32 op)
+void tms3203x_device::mpysubi_0(uint32_t op)
{
// src3 * src4, src1 - src2
DECLARE_DEF;
- UINT32 src1 = IREG((op >> 19) & 7);
- UINT32 src2 = IREG((op >> 16) & 7);
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
- INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src4 << 8) >> 8);
- UINT32 ares = src1 - src2;
+ uint32_t src1 = IREG((op >> 19) & 7);
+ uint32_t src2 = IREG((op >> 16) & 7);
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
+ int64_t mres = (int64_t)((int32_t)(src3 << 8) >> 8) * (int64_t)((int32_t)(src4 << 8) >> 8);
+ uint32_t ares = src1 - src2;
CLR_NZVUF();
if (OVM())
{
- if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
+ if (mres < -(int64_t)0x80000000 || mres > (int64_t)0x7fffffff)
mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
if (OVERFLOW_SUB(src1,src2,ares))
- ares = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff;
+ ares = ((int32_t)src1 < 0) ? 0x80000000 : 0x7fffffff;
}
IREG((op >> 23) & 1) = mres;
IREG(((op >> 22) & 1) | 2) = ares;
UPDATE_DEF();
}
-void tms3203x_device::mpysubi_1(UINT32 op)
+void tms3203x_device::mpysubi_1(uint32_t op)
{
// src3 * src1, src4 - src2
DECLARE_DEF;
- UINT32 src1 = IREG((op >> 19) & 7);
- UINT32 src2 = IREG((op >> 16) & 7);
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
- INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
- UINT32 ares = src4 - src2;
+ uint32_t src1 = IREG((op >> 19) & 7);
+ uint32_t src2 = IREG((op >> 16) & 7);
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
+ int64_t mres = (int64_t)((int32_t)(src3 << 8) >> 8) * (int64_t)((int32_t)(src1 << 8) >> 8);
+ uint32_t ares = src4 - src2;
CLR_NZVUF();
if (OVM())
{
- if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
+ if (mres < -(int64_t)0x80000000 || mres > (int64_t)0x7fffffff)
mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
if (OVERFLOW_SUB(src4,src2,ares))
- ares = ((INT32)src4 < 0) ? 0x80000000 : 0x7fffffff;
+ ares = ((int32_t)src4 < 0) ? 0x80000000 : 0x7fffffff;
}
IREG((op >> 23) & 1) = mres;
IREG(((op >> 22) & 1) | 2) = ares;
UPDATE_DEF();
}
-void tms3203x_device::mpysubi_2(UINT32 op)
+void tms3203x_device::mpysubi_2(uint32_t op)
{
// src1 * src2, src3 - src4
DECLARE_DEF;
- UINT32 src1 = IREG((op >> 19) & 7);
- UINT32 src2 = IREG((op >> 16) & 7);
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
- INT64 mres = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);
- UINT32 ares = src3 - src4;
+ uint32_t src1 = IREG((op >> 19) & 7);
+ uint32_t src2 = IREG((op >> 16) & 7);
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
+ int64_t mres = (int64_t)((int32_t)(src1 << 8) >> 8) * (int64_t)((int32_t)(src2 << 8) >> 8);
+ uint32_t ares = src3 - src4;
CLR_NZVUF();
if (OVM())
{
- if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
+ if (mres < -(int64_t)0x80000000 || mres > (int64_t)0x7fffffff)
mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
if (OVERFLOW_SUB(src3,src4,ares))
- ares = ((INT32)src3 < 0) ? 0x80000000 : 0x7fffffff;
+ ares = ((int32_t)src3 < 0) ? 0x80000000 : 0x7fffffff;
}
IREG((op >> 23) & 1) = mres;
IREG(((op >> 22) & 1) | 2) = ares;
UPDATE_DEF();
}
-void tms3203x_device::mpysubi_3(UINT32 op)
+void tms3203x_device::mpysubi_3(uint32_t op)
{
// src3 * src1, src2 - src4
DECLARE_DEF;
- UINT32 src1 = IREG((op >> 19) & 7);
- UINT32 src2 = IREG((op >> 16) & 7);
- UINT32 src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
- UINT32 src4 = RMEM(INDIRECT_1(op, op));
- INT64 mres = (INT64)((INT32)(src3 << 8) >> 8) * (INT64)((INT32)(src1 << 8) >> 8);
- UINT32 ares = src2 - src4;
+ uint32_t src1 = IREG((op >> 19) & 7);
+ uint32_t src2 = IREG((op >> 16) & 7);
+ uint32_t src3 = RMEM(INDIRECT_1_DEF(op, op >> 8));
+ uint32_t src4 = RMEM(INDIRECT_1(op, op));
+ int64_t mres = (int64_t)((int32_t)(src3 << 8) >> 8) * (int64_t)((int32_t)(src1 << 8) >> 8);
+ uint32_t ares = src2 - src4;
CLR_NZVUF();
if (OVM())
{
- if (mres < -(INT64)0x80000000 || mres > (INT64)0x7fffffff)
+ if (mres < -(int64_t)0x80000000 || mres > (int64_t)0x7fffffff)
mres = (mres < 0) ? 0x80000000 : 0x7fffffff;
if (OVERFLOW_SUB(src2,src4,ares))
- ares = ((INT32)src2 < 0) ? 0x80000000 : 0x7fffffff;
+ ares = ((int32_t)src2 < 0) ? 0x80000000 : 0x7fffffff;
}
IREG((op >> 23) & 1) = mres;
IREG(((op >> 22) & 1) | 2) = ares;
@@ -6006,7 +6006,7 @@ void tms3203x_device::mpysubi_3(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::stfstf(UINT32 op)
+void tms3203x_device::stfstf(uint32_t op)
{
DECLARE_DEF;
WMEM(INDIRECT_1_DEF(op, op >> 8), FP2LONG((op >> 16) & 7));
@@ -6014,7 +6014,7 @@ void tms3203x_device::stfstf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::stisti(UINT32 op)
+void tms3203x_device::stisti(uint32_t op)
{
DECLARE_DEF;
WMEM(INDIRECT_1_DEF(op, op >> 8), IREG((op >> 16) & 7));
@@ -6024,10 +6024,10 @@ void tms3203x_device::stisti(UINT32 op)
/*-----------------------------------------------------*/
-void tms3203x_device::ldfldf(UINT32 op)
+void tms3203x_device::ldfldf(uint32_t op)
{
DECLARE_DEF;
- UINT32 res;
+ uint32_t res;
int dreg;
res = RMEM(INDIRECT_1_DEF(op, op >> 8));
@@ -6039,7 +6039,7 @@ void tms3203x_device::ldfldf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::ldildi(UINT32 op)
+void tms3203x_device::ldildi(uint32_t op)
{
DECLARE_DEF;
IREG((op >> 19) & 7) = RMEM(INDIRECT_1_DEF(op, op >> 8));
@@ -6055,11 +6055,11 @@ void tms3203x_device::ldildi(UINT32 op)
// sreg1 = ((op >> 19) & 7)
// dreg1 = ((op >> 22) & 7)
-void tms3203x_device::absfstf(UINT32 op)
+void tms3203x_device::absfstf(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = FP2LONG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = FP2LONG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
LONG2FP(TMR_TEMP1, src2);
@@ -6069,11 +6069,11 @@ void tms3203x_device::absfstf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::absisti(UINT32 op)
+void tms3203x_device::absisti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
ABSI(dreg, src2);
@@ -6082,11 +6082,11 @@ void tms3203x_device::absisti(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::addf3stf(UINT32 op)
+void tms3203x_device::addf3stf(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = FP2LONG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = FP2LONG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
LONG2FP(TMR_TEMP1, src2);
addf(m_r[(op >> 22) & 7], m_r[(op >> 19) & 7], m_r[TMR_TEMP1]);
@@ -6095,53 +6095,53 @@ void tms3203x_device::addf3stf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::addi3sti(UINT32 op)
+void tms3203x_device::addi3sti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
- UINT32 src1 = IREG((op >> 19) & 7);
+ uint32_t src1 = IREG((op >> 19) & 7);
ADDI(dreg, src1, src2);
}
WMEM(INDIRECT_1(op, op >> 8), src3);
UPDATE_DEF();
}
-void tms3203x_device::and3sti(UINT32 op)
+void tms3203x_device::and3sti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
- UINT32 src1 = IREG((op >> 19) & 7);
+ uint32_t src1 = IREG((op >> 19) & 7);
AND(dreg, src1, src2);
}
WMEM(INDIRECT_1(op, op >> 8), src3);
UPDATE_DEF();
}
-void tms3203x_device::ash3sti(UINT32 op)
+void tms3203x_device::ash3sti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
- UINT32 count = IREG((op >> 19) & 7);
+ uint32_t count = IREG((op >> 19) & 7);
ASH(dreg, src2, count);
}
WMEM(INDIRECT_1(op, op >> 8), src3);
UPDATE_DEF();
}
-void tms3203x_device::fixsti(UINT32 op)
+void tms3203x_device::fixsti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
LONG2FP(dreg, src2);
@@ -6151,11 +6151,11 @@ void tms3203x_device::fixsti(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::floatstf(UINT32 op)
+void tms3203x_device::floatstf(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = FP2LONG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = FP2LONG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
IREG(dreg) = src2;
@@ -6165,11 +6165,11 @@ void tms3203x_device::floatstf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::ldfstf(UINT32 op)
+void tms3203x_device::ldfstf(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = FP2LONG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = FP2LONG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
LONG2FP(dreg, src2);
@@ -6178,35 +6178,35 @@ void tms3203x_device::ldfstf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::ldisti(UINT32 op)
+void tms3203x_device::ldisti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
IREG((op >> 22) & 7) = src2;
WMEM(INDIRECT_1(op, op >> 8), src3);
UPDATE_DEF();
}
-void tms3203x_device::lsh3sti(UINT32 op)
+void tms3203x_device::lsh3sti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
- UINT32 count = IREG((op >> 19) & 7);
+ uint32_t count = IREG((op >> 19) & 7);
LSH(dreg, src2, count);
}
WMEM(INDIRECT_1(op, op >> 8), src3);
UPDATE_DEF();
}
-void tms3203x_device::mpyf3stf(UINT32 op)
+void tms3203x_device::mpyf3stf(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = FP2LONG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = FP2LONG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
LONG2FP(TMR_TEMP1, src2);
mpyf(m_r[(op >> 22) & 7], m_r[(op >> 19) & 7], m_r[TMR_TEMP1]);
@@ -6215,25 +6215,25 @@ void tms3203x_device::mpyf3stf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::mpyi3sti(UINT32 op)
+void tms3203x_device::mpyi3sti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
- UINT32 src1 = IREG((op >> 19) & 7);
+ uint32_t src1 = IREG((op >> 19) & 7);
MPYI(dreg, src1, src2);
}
WMEM(INDIRECT_1(op, op >> 8), src3);
UPDATE_DEF();
}
-void tms3203x_device::negfstf(UINT32 op)
+void tms3203x_device::negfstf(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = FP2LONG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = FP2LONG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
LONG2FP(TMR_TEMP1, src2);
negf(m_r[(op >> 22) & 7], m_r[TMR_TEMP1]);
@@ -6242,11 +6242,11 @@ void tms3203x_device::negfstf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::negisti(UINT32 op)
+void tms3203x_device::negisti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
NEGI(dreg, src2);
@@ -6255,11 +6255,11 @@ void tms3203x_device::negisti(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::notsti(UINT32 op)
+void tms3203x_device::notsti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
NOT(dreg, src2);
@@ -6268,25 +6268,25 @@ void tms3203x_device::notsti(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::or3sti(UINT32 op)
+void tms3203x_device::or3sti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
- UINT32 src1 = IREG((op >> 19) & 7);
+ uint32_t src1 = IREG((op >> 19) & 7);
OR(dreg, src1, src2);
}
WMEM(INDIRECT_1(op, op >> 8), src3);
UPDATE_DEF();
}
-void tms3203x_device::subf3stf(UINT32 op)
+void tms3203x_device::subf3stf(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = FP2LONG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = FP2LONG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
LONG2FP(TMR_TEMP1, src2);
subf(m_r[(op >> 22) & 7], m_r[TMR_TEMP1], m_r[(op >> 19) & 7]);
@@ -6295,28 +6295,28 @@ void tms3203x_device::subf3stf(UINT32 op)
UPDATE_DEF();
}
-void tms3203x_device::subi3sti(UINT32 op)
+void tms3203x_device::subi3sti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
- UINT32 src1 = IREG((op >> 19) & 7);
+ uint32_t src1 = IREG((op >> 19) & 7);
SUBI(dreg, src2, src1);
}
WMEM(INDIRECT_1(op, op >> 8), src3);
UPDATE_DEF();
}
-void tms3203x_device::xor3sti(UINT32 op)
+void tms3203x_device::xor3sti(uint32_t op)
{
DECLARE_DEF;
- UINT32 src3 = IREG((op >> 16) & 7);
- UINT32 src2 = RMEM(INDIRECT_1_DEF(op, op));
+ uint32_t src3 = IREG((op >> 16) & 7);
+ uint32_t src2 = RMEM(INDIRECT_1_DEF(op, op));
{
int dreg = (op >> 22) & 7;
- UINT32 src1 = IREG((op >> 19) & 7);
+ uint32_t src1 = IREG((op >> 19) & 7);
XOR(dreg, src1, src2);
}
WMEM(INDIRECT_1(op, op >> 8), src3);
@@ -6328,7 +6328,7 @@ void tms3203x_device::xor3sti(UINT32 op)
// FUNCTION TABLE
//**************************************************************************
-UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_d[0x20])(UINT32, UINT8) =
+uint32_t (tms3203x_device::*const tms3203x_device::s_indirect_d[0x20])(uint32_t, uint8_t) =
{
&tms3203x_device::mod00_d, &tms3203x_device::mod01_d, &tms3203x_device::mod02_d, &tms3203x_device::mod03_d,
&tms3203x_device::mod04_d, &tms3203x_device::mod05_d, &tms3203x_device::mod06_d, &tms3203x_device::mod07_d,
@@ -6341,7 +6341,7 @@ UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_d[0x20])(UINT32, UIN
};
-UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1[0x20])(UINT32, UINT8) =
+uint32_t (tms3203x_device::*const tms3203x_device::s_indirect_1[0x20])(uint32_t, uint8_t) =
{
&tms3203x_device::mod00_1, &tms3203x_device::mod01_1, &tms3203x_device::mod02_1, &tms3203x_device::mod03_1,
&tms3203x_device::mod04_1, &tms3203x_device::mod05_1, &tms3203x_device::mod06_1, &tms3203x_device::mod07_1,
@@ -6354,7 +6354,7 @@ UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1[0x20])(UINT32, UIN
};
-UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1_def[0x20])(UINT32, UINT8, UINT32 *&) =
+uint32_t (tms3203x_device::*const tms3203x_device::s_indirect_1_def[0x20])(uint32_t, uint8_t, uint32_t *&) =
{
&tms3203x_device::mod00_1_def, &tms3203x_device::mod01_1_def, &tms3203x_device::mod02_1_def, &tms3203x_device::mod03_1_def,
&tms3203x_device::mod04_1_def, &tms3203x_device::mod05_1_def, &tms3203x_device::mod06_1_def, &tms3203x_device::mod07_1_def,
@@ -6366,7 +6366,7 @@ UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1_def[0x20])(UINT32,
&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def
};
-void (tms3203x_device::*const tms3203x_device::s_tms32031ops[])(UINT32 op) =
+void (tms3203x_device::*const tms3203x_device::s_tms32031ops[])(uint32_t op) =
{
&tms3203x_device::absf_reg, &tms3203x_device::absf_dir, &tms3203x_device::absf_ind, &tms3203x_device::absf_imm, // 0x00
&tms3203x_device::absi_reg, &tms3203x_device::absi_dir, &tms3203x_device::absi_ind, &tms3203x_device::absi_imm,
diff --git a/src/devices/cpu/tms32031/dis32031.cpp b/src/devices/cpu/tms32031/dis32031.cpp
index 4ab75192704..d5c1d01d73b 100644
--- a/src/devices/cpu/tms32031/dis32031.cpp
+++ b/src/devices/cpu/tms32031/dis32031.cpp
@@ -31,7 +31,7 @@
***************************************************************************/
#if 0
-static inline char *signed_16bit(INT16 val)
+static inline char *signed_16bit(int16_t val)
{
static char temp[10];
if (val < 0)
@@ -122,7 +122,7 @@ static const char *const condition[32] =
// 19 = LUF (LUF)
// 20 = ZUF (Z | UF)
-static void append_indirect(UINT8 ma, INT8 disp, char *buffer)
+static void append_indirect(uint8_t ma, int8_t disp, char *buffer)
{
char *dst = &buffer[strlen(buffer)];
char dispstr[20];
@@ -174,14 +174,14 @@ static void append_indirect(UINT8 ma, INT8 disp, char *buffer)
}
}
-static void append_immediate(UINT16 data, int is_float, int is_unsigned, char *buffer)
+static void append_immediate(uint16_t data, int is_float, int is_unsigned, char *buffer)
{
char *dst = &buffer[strlen(buffer)];
if (is_float)
{
- int exp = ((INT16)data >> 12) + 127;
- UINT32 expanded_data;
+ int exp = ((int16_t)data >> 12) + 127;
+ uint32_t expanded_data;
float float_val;
expanded_data = ((data & 0x0800) << 20) + ((exp << 23) & 0x7f800000);
@@ -194,13 +194,13 @@ static void append_immediate(UINT16 data, int is_float, int is_unsigned, char *b
float_val = *(float *)&expanded_data;
sprintf(dst, "%8f", (double) float_val);
}
- else if (!is_unsigned && (INT16)data < 0)
+ else if (!is_unsigned && (int16_t)data < 0)
sprintf(dst, "-$%04X", -data & 0xffff);
else
sprintf(dst, "$%04X", data);
}
-static void disasm_general(const char *opstring, UINT32 op, int flags, char *buffer)
+static void disasm_general(const char *opstring, uint32_t op, int flags, char *buffer)
{
sprintf(buffer, "%-6s", opstring);
@@ -242,7 +242,7 @@ static void disasm_general(const char *opstring, UINT32 op, int flags, char *buf
}
}
-static void disasm_3op(const char *opstring, UINT32 op, int flags, char *buffer)
+static void disasm_3op(const char *opstring, uint32_t op, int flags, char *buffer)
{
sprintf(buffer, "%-6s", opstring);
@@ -287,7 +287,7 @@ static void disasm_3op(const char *opstring, UINT32 op, int flags, char *buffer)
}
}
-static void disasm_conditional(const char *opstring, UINT32 op, int flags, char *buffer)
+static void disasm_conditional(const char *opstring, uint32_t op, int flags, char *buffer)
{
char temp[10];
sprintf(temp, "%s%s", opstring, condition[(op >> 23) & 31]);
@@ -295,9 +295,9 @@ static void disasm_conditional(const char *opstring, UINT32 op, int flags, char
}
-static void disasm_parallel_3op3op(const char *opstring1, const char *opstring2, UINT32 op, int flags, const UINT8 *srctable, char *buffer)
+static void disasm_parallel_3op3op(const char *opstring1, const char *opstring2, uint32_t op, int flags, const uint8_t *srctable, char *buffer)
{
- const UINT8 *s = &srctable[((op >> 24) & 3) * 4];
+ const uint8_t *s = &srctable[((op >> 24) & 3) * 4];
int d1 = (op >> 23) & 1;
int d2 = 2 + ((op >> 22) & 1);
char src[5][20];
@@ -317,7 +317,7 @@ static void disasm_parallel_3op3op(const char *opstring1, const char *opstring2,
}
-static void disasm_parallel_3opstore(const char *opstring1, const char *opstring2, UINT32 op, int flags, char *buffer)
+static void disasm_parallel_3opstore(const char *opstring1, const char *opstring2, uint32_t op, int flags, char *buffer)
{
int d1 = (op >> 22) & 7;
int s1 = (op >> 19) & 7;
@@ -341,7 +341,7 @@ static void disasm_parallel_3opstore(const char *opstring1, const char *opstring
}
-static void disasm_parallel_loadload(const char *opstring1, const char *opstring2, UINT32 op, int flags, char *buffer)
+static void disasm_parallel_loadload(const char *opstring1, const char *opstring2, uint32_t op, int flags, char *buffer)
{
int d2 = (op >> 22) & 7;
int d1 = (op >> 19) & 7;
@@ -359,7 +359,7 @@ static void disasm_parallel_loadload(const char *opstring1, const char *opstring
}
-static void disasm_parallel_storestore(const char *opstring1, const char *opstring2, UINT32 op, int flags, char *buffer)
+static void disasm_parallel_storestore(const char *opstring1, const char *opstring2, uint32_t op, int flags, char *buffer)
{
int s2 = (op >> 22) & 7;
int s1 = (op >> 16) & 7;
@@ -378,9 +378,9 @@ static void disasm_parallel_storestore(const char *opstring1, const char *opstri
-static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
+static unsigned dasm_tms3203x(char *buffer, unsigned pc, uint32_t op)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
switch (op >> 23)
{
@@ -524,7 +524,7 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
{
char temp[10];
sprintf(temp, "B%s%s", condition[(op >> 16) & 31], ((op >> 21) & 1) ? "D" : "");
- sprintf(buffer, "%-6s$%06X", temp, (pc + (((op >> 21) & 1) ? 3 : 1) + (INT16)op) & 0xffffff);
+ sprintf(buffer, "%-6s$%06X", temp, (pc + (((op >> 21) & 1) ? 3 : 1) + (int16_t)op) & 0xffffff);
break;
}
@@ -541,7 +541,7 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
{
char temp[10];
sprintf(temp, "DB%s%s", condition[(op >> 16) & 31], ((op >> 21) & 1) ? "D" : "");
- sprintf(buffer, "%-6sAR%d,$%06X", temp, (op >> 22) & 7, (pc + (((op >> 21) & 1) ? 3 : 1) + (INT16)op) & 0xffffff);
+ sprintf(buffer, "%-6sAR%d,$%06X", temp, (op >> 22) & 7, (pc + (((op >> 21) & 1) ? 3 : 1) + (int16_t)op) & 0xffffff);
break;
}
@@ -559,7 +559,7 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
{
char temp[10];
sprintf(temp, "CALL%s", condition[(op >> 16) & 31]);
- sprintf(buffer, "%-6s$%06X", temp, (pc + 1 + (INT16)op) & 0xffffff);
+ sprintf(buffer, "%-6s$%06X", temp, (pc + 1 + (int16_t)op) & 0xffffff);
flags = DASMFLAG_STEP_OVER;
break;
}
@@ -589,7 +589,7 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
case 0x100: case 0x101: case 0x102: case 0x103:
case 0x104: case 0x105: case 0x106: case 0x107: // MPYF3||ADDF3
{
- static const UINT8 srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
+ static const uint8_t srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
disasm_parallel_3op3op("MPYF3", "ADDF3", op, FLOAT, srctable, buffer);
break;
}
@@ -598,7 +598,7 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
case 0x108: case 0x109: case 0x10a: case 0x10b:
case 0x10c: case 0x10d: case 0x10e: case 0x10f: // MPYF3||SUBF3
{
- static const UINT8 srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
+ static const uint8_t srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
disasm_parallel_3op3op("MPYF3", "SUBF3", op, FLOAT, srctable, buffer);
break;
}
@@ -607,7 +607,7 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
case 0x110: case 0x111: case 0x112: case 0x113:
case 0x114: case 0x115: case 0x116: case 0x117: // MPYI3||ADDI3
{
- static const UINT8 srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
+ static const uint8_t srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
disasm_parallel_3op3op("MPYI3", "ADDI3", op, INTEGER, srctable, buffer);
break;
}
@@ -616,7 +616,7 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
case 0x118: case 0x119: case 0x11a: case 0x11b:
case 0x11c: case 0x11d: case 0x11e: case 0x11f: // MPYI3||SUBI3
{
- static const UINT8 srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
+ static const uint8_t srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
disasm_parallel_3op3op("MPYI3", "SUBI3", op, INTEGER, srctable, buffer);
break;
}
@@ -740,6 +740,6 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
CPU_DISASSEMBLE( tms3203x )
{
- UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
+ uint32_t op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
return dasm_tms3203x(buffer, pc, op);
}
diff --git a/src/devices/cpu/tms32031/tms32031.cpp b/src/devices/cpu/tms32031/tms32031.cpp
index 22593bc9e15..a2a86c8b89a 100644
--- a/src/devices/cpu/tms32031/tms32031.cpp
+++ b/src/devices/cpu/tms32031/tms32031.cpp
@@ -144,7 +144,7 @@ float tms3203x_device::tmsreg::as_float() const
else
{
int exp = (exponent() + 127) << 23;
- INT32 man = -mantissa();
+ int32_t man = -mantissa();
id.i[0] = 0x80000000 + exp + ((man >> 8) & 0x00ffffff);
}
@@ -179,7 +179,7 @@ double tms3203x_device::tmsreg::as_double() const
else
{
int exp = (exponent() + 1023) << 20;
- INT32 man = -mantissa();
+ int32_t man = -mantissa();
id.i[BYTE_XOR_BE(0)] = 0x80000000 + exp + ((man >> 11) & 0x001fffff);
id.i[BYTE_XOR_BE(1)] = (man << 21) & 0xffe00000;
}
@@ -199,8 +199,8 @@ void tms3203x_device::tmsreg::from_double(double val)
// extract mantissa and exponent from the IEEE input
int_double id;
id.d = val;
- INT32 mantissa = ((id.i[BYTE_XOR_BE(0)] & 0x000fffff) << 11) | ((id.i[BYTE_XOR_BE(1)] & 0xffe00000) >> 21);
- INT32 exponent = ((id.i[BYTE_XOR_BE(0)] & 0x7ff00000) >> 20) - 1023;
+ int32_t mantissa = ((id.i[BYTE_XOR_BE(0)] & 0x000fffff) << 11) | ((id.i[BYTE_XOR_BE(1)] & 0xffe00000) >> 21);
+ int32_t exponent = ((id.i[BYTE_XOR_BE(0)] & 0x7ff00000) >> 20) - 1023;
// if we're too small, map to 0
if (exponent < -128)
@@ -212,7 +212,7 @@ void tms3203x_device::tmsreg::from_double(double val)
// if we're too large, map to the maximum value
else if (exponent > 127)
{
- if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
+ if ((int32_t)id.i[BYTE_XOR_BE(0)] >= 0)
set_mantissa(0x7fffffff);
else
set_mantissa(0x80000001);
@@ -220,7 +220,7 @@ void tms3203x_device::tmsreg::from_double(double val)
}
// if we're positive, map directly
- else if ((INT32)id.i[BYTE_XOR_BE(0)] >= 0)
+ else if ((int32_t)id.i[BYTE_XOR_BE(0)] >= 0)
{
set_mantissa(mantissa);
set_exponent(exponent);
@@ -251,7 +251,7 @@ void tms3203x_device::tmsreg::from_double(double val)
// tms3203x_device - constructor
//-------------------------------------------------
-tms3203x_device::tms3203x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype, address_map_constructor internal_map, const char *shortname, const char *source)
+tms3203x_device::tms3203x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype, address_map_constructor internal_map, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_LITTLE, 32, 24, -2, internal_map),
m_chip_type(chiptype),
@@ -280,12 +280,12 @@ tms3203x_device::tms3203x_device(const machine_config &mconfig, device_type type
#endif
}
-tms32031_device::tms32031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32031_device::tms32031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms3203x_device(mconfig, TMS32031, "TMS32031", tag, owner, clock, CHIP_TYPE_TMS32031, ADDRESS_MAP_NAME(internal_32031), "tms32031", __FILE__)
{
}
-tms32032_device::tms32032_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32032_device::tms32032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms3203x_device(mconfig, TMS32032, "TMS32032", tag, owner, clock, CHIP_TYPE_TMS32032, ADDRESS_MAP_NAME(internal_32032), "tms32032", __FILE__)
{
}
@@ -337,7 +337,7 @@ const tiny_rom_entry *tms3203x_device::device_rom_region() const
// ROPCODE - fetch an opcode
//-------------------------------------------------
-inline UINT32 tms3203x_device::ROPCODE(offs_t pc)
+inline uint32_t tms3203x_device::ROPCODE(offs_t pc)
{
return m_direct->read_dword(pc << 2);
}
@@ -347,7 +347,7 @@ inline UINT32 tms3203x_device::ROPCODE(offs_t pc)
// RMEM - read memory
//-------------------------------------------------
-inline UINT32 tms3203x_device::RMEM(offs_t addr)
+inline uint32_t tms3203x_device::RMEM(offs_t addr)
{
if (m_mcbl_mode && addr < 0x1000)
return m_bootrom[addr];
@@ -360,7 +360,7 @@ inline UINT32 tms3203x_device::RMEM(offs_t addr)
// WMEM - write memory
//-------------------------------------------------
-inline void tms3203x_device::WMEM(offs_t addr, UINT32 data)
+inline void tms3203x_device::WMEM(offs_t addr, uint32_t data)
{
m_program->write_dword(addr << 2, data);
}
@@ -382,7 +382,7 @@ void tms3203x_device::device_start()
m_iack_cb.resolve_safe();
// set up the internal boot loader ROM
- m_bootrom = reinterpret_cast<UINT32*>(memregion(shortname())->base());
+ m_bootrom = reinterpret_cast<uint32_t*>(memregion(shortname())->base());
m_direct->set_direct_update(direct_update_delegate(FUNC(tms3203x_device::direct_handler), this));
// save state
@@ -547,7 +547,7 @@ void tms3203x_device::state_string_export(const device_state_entry &entry, std::
break;
case STATE_GENFLAGS:
- UINT32 temp = m_r[TMR_ST].i32[0];
+ uint32_t temp = m_r[TMR_ST].i32[0];
str = string_format("%c%c%c%c%c%c%c%c",
(temp & 0x80) ? 'O':'.',
(temp & 0x40) ? 'U':'.',
@@ -567,7 +567,7 @@ void tms3203x_device::state_string_export(const device_state_entry &entry, std::
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 tms3203x_device::disasm_min_opcode_bytes() const
+uint32_t tms3203x_device::disasm_min_opcode_bytes() const
{
return 4;
}
@@ -578,7 +578,7 @@ UINT32 tms3203x_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 tms3203x_device::disasm_max_opcode_bytes() const
+uint32_t tms3203x_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -589,7 +589,7 @@ UINT32 tms3203x_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t tms3203x_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms3203x_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms3203x );
return CPU_DISASSEMBLE_NAME(tms3203x)(this, buffer, pc, oprom, opram, options);
@@ -606,9 +606,9 @@ offs_t tms3203x_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
// floating-point format a 32-bit IEEE float
//-------------------------------------------------
-float tms3203x_device::fp_to_float(UINT32 floatdata)
+float tms3203x_device::fp_to_float(uint32_t floatdata)
{
- tmsreg gen(floatdata << 8, (INT32)floatdata >> 24);
+ tmsreg gen(floatdata << 8, (int32_t)floatdata >> 24);
return gen.as_float();
}
@@ -618,9 +618,9 @@ float tms3203x_device::fp_to_float(UINT32 floatdata)
// floating-point format a 64-bit IEEE double
//-------------------------------------------------
-double tms3203x_device::fp_to_double(UINT32 floatdata)
+double tms3203x_device::fp_to_double(uint32_t floatdata)
{
- tmsreg gen(floatdata << 8, (INT32)floatdata >> 24);
+ tmsreg gen(floatdata << 8, (int32_t)floatdata >> 24);
return gen.as_double();
}
@@ -630,10 +630,10 @@ double tms3203x_device::fp_to_double(UINT32 floatdata)
// a 32-bit DSP floating-point value
//-------------------------------------------------
-UINT32 tms3203x_device::float_to_fp(float fval)
+uint32_t tms3203x_device::float_to_fp(float fval)
{
tmsreg gen(fval);
- return (gen.exponent() << 24) | ((UINT32)gen.mantissa() >> 8);
+ return (gen.exponent() << 24) | ((uint32_t)gen.mantissa() >> 8);
}
@@ -642,10 +642,10 @@ UINT32 tms3203x_device::float_to_fp(float fval)
// a 32-bit DSP floating-point value
//-------------------------------------------------
-UINT32 tms3203x_device::double_to_fp(double dval)
+uint32_t tms3203x_device::double_to_fp(double dval)
{
tmsreg gen(dval);
- return (gen.exponent() << 24) | ((UINT32)gen.mantissa() >> 8);
+ return (gen.exponent() << 24) | ((uint32_t)gen.mantissa() >> 8);
}
@@ -662,7 +662,7 @@ UINT32 tms3203x_device::double_to_fp(double dval)
void tms3203x_device::check_irqs()
{
// determine if we have any live interrupts
- UINT16 validints = IREG(TMR_IF) & IREG(TMR_IE) & 0x0fff;
+ uint16_t validints = IREG(TMR_IF) & IREG(TMR_IE) & 0x0fff;
if (validints == 0 || (IREG(TMR_ST) & GIEFLAG) == 0)
return;
@@ -679,7 +679,7 @@ void tms3203x_device::check_irqs()
m_is_idling = false;
if (!m_delayed)
{
- UINT16 intmask = 1 << (whichtrap - 1);
+ uint16_t intmask = 1 << (whichtrap - 1);
// bit in IF is cleared when interrupt is taken
IREG(TMR_IF) &= ~intmask;
@@ -700,7 +700,7 @@ void tms3203x_device::check_irqs()
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 tms3203x_device::execute_min_cycles() const
+uint32_t tms3203x_device::execute_min_cycles() const
{
return 1;
}
@@ -711,7 +711,7 @@ UINT32 tms3203x_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 tms3203x_device::execute_max_cycles() const
+uint32_t tms3203x_device::execute_max_cycles() const
{
return 4;
}
@@ -722,7 +722,7 @@ UINT32 tms3203x_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 tms3203x_device::execute_input_lines() const
+uint32_t tms3203x_device::execute_input_lines() const
{
return (m_chip_type == CHIP_TYPE_TMS32032) ? 13 : 12;
}
@@ -747,7 +747,7 @@ void tms3203x_device::execute_set_input(int inputnum, int state)
}
// update the external state
- UINT16 intmask = 1 << inputnum;
+ uint16_t intmask = 1 << inputnum;
if (state == ASSERT_LINE)
{
m_irq_state |= intmask;
@@ -787,7 +787,7 @@ void tms3203x_device::execute_run()
{
if ((IREG(TMR_ST) & RMFLAG) && m_pc == IREG(TMR_RE) + 1)
{
- if ((INT32)--IREG(TMR_RC) >= 0)
+ if ((int32_t)--IREG(TMR_RC) >= 0)
m_pc = IREG(TMR_RS);
else
{
@@ -819,7 +819,7 @@ void tms3203x_device::execute_run()
machine().debug_break();
if ((IREG(TMR_ST) & RMFLAG) && m_pc == IREG(TMR_RE) + 1)
{
- if ((INT32)--IREG(TMR_RC) >= 0)
+ if ((int32_t)--IREG(TMR_RC) >= 0)
m_pc = IREG(TMR_RS);
else
{
diff --git a/src/devices/cpu/tms32031/tms32031.h b/src/devices/cpu/tms32031/tms32031.h
index d8fa5125c3d..4c554827cf4 100644
--- a/src/devices/cpu/tms32031/tms32031.h
+++ b/src/devices/cpu/tms32031/tms32031.h
@@ -116,14 +116,14 @@ class tms3203x_device : public cpu_device
// constructors
tmsreg() { i32[0] = i32[1] = 0; }
tmsreg(double value) { from_double(value); }
- tmsreg(INT32 mantissa, INT8 exponent) { set_mantissa(mantissa); set_exponent(exponent); }
+ tmsreg(int32_t mantissa, int8_t exponent) { set_mantissa(mantissa); set_exponent(exponent); }
// getters
- UINT32 integer() const { return i32[0]; }
- INT32 mantissa() const { return i32[0]; }
- INT8 exponent() const { return i32[1]; }
- void set_mantissa(INT32 man) { i32[0] = man; }
- void set_exponent(INT8 exp) { i32[1] = exp; }
+ uint32_t integer() const { return i32[0]; }
+ int32_t mantissa() const { return i32[0]; }
+ int8_t exponent() const { return i32[1]; }
+ void set_mantissa(int32_t man) { i32[0] = man; }
+ void set_exponent(int8_t exp) { i32[1] = exp; }
// exporters
float as_float() const;
@@ -132,7 +132,7 @@ class tms3203x_device : public cpu_device
// importers
void from_double(double);
- UINT32 i32[2];
+ uint32_t i32[2];
};
protected:
@@ -143,7 +143,7 @@ protected:
};
// construction/destruction
- tms3203x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype, address_map_constructor internal_map, const char *shortname, const char *source);
+ tms3203x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype, address_map_constructor internal_map, const char *shortname, const char *source);
virtual ~tms3203x_device();
public:
@@ -154,10 +154,10 @@ public:
template<class _Object> static devcb_base &set_iack_callback(device_t &device, _Object object) { return downcast<tms3203x_device &>(device).m_iack_cb.set_callback(object); }
// public interfaces
- static float fp_to_float(UINT32 floatdata);
- static double fp_to_double(UINT32 floatdata);
- static UINT32 float_to_fp(float fval);
- static UINT32 double_to_fp(double dval);
+ static float fp_to_float(uint32_t floatdata);
+ static double fp_to_double(uint32_t floatdata);
+ static uint32_t float_to_fp(float fval);
+ static uint32_t double_to_fp(double dval);
protected:
// device-level overrides
@@ -167,9 +167,9 @@ protected:
virtual const tiny_rom_entry *device_rom_region() const override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -182,15 +182,15 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// memory helpers
DECLARE_DIRECT_UPDATE_MEMBER(direct_handler);
- UINT32 ROPCODE(offs_t pc);
- UINT32 RMEM(offs_t addr);
- void WMEM(offs_t addr, UINT32 data);
+ uint32_t ROPCODE(offs_t pc);
+ uint32_t RMEM(offs_t addr);
+ void WMEM(offs_t addr, uint32_t data);
// misc helpers
void check_irqs();
@@ -208,567 +208,567 @@ protected:
void norm(tmsreg &dst, tmsreg &src);
// memory addressing
- UINT32 mod00_d(UINT32 op, UINT8 ar);
- UINT32 mod01_d(UINT32 op, UINT8 ar);
- UINT32 mod02_d(UINT32 op, UINT8 ar);
- UINT32 mod03_d(UINT32 op, UINT8 ar);
- UINT32 mod04_d(UINT32 op, UINT8 ar);
- UINT32 mod05_d(UINT32 op, UINT8 ar);
- UINT32 mod06_d(UINT32 op, UINT8 ar);
- UINT32 mod07_d(UINT32 op, UINT8 ar);
-
- UINT32 mod00_1(UINT32 op, UINT8 ar);
- UINT32 mod01_1(UINT32 op, UINT8 ar);
- UINT32 mod02_1(UINT32 op, UINT8 ar);
- UINT32 mod03_1(UINT32 op, UINT8 ar);
- UINT32 mod04_1(UINT32 op, UINT8 ar);
- UINT32 mod05_1(UINT32 op, UINT8 ar);
- UINT32 mod06_1(UINT32 op, UINT8 ar);
- UINT32 mod07_1(UINT32 op, UINT8 ar);
-
- UINT32 mod08(UINT32 op, UINT8 ar);
- UINT32 mod09(UINT32 op, UINT8 ar);
- UINT32 mod0a(UINT32 op, UINT8 ar);
- UINT32 mod0b(UINT32 op, UINT8 ar);
- UINT32 mod0c(UINT32 op, UINT8 ar);
- UINT32 mod0d(UINT32 op, UINT8 ar);
- UINT32 mod0e(UINT32 op, UINT8 ar);
- UINT32 mod0f(UINT32 op, UINT8 ar);
-
- UINT32 mod10(UINT32 op, UINT8 ar);
- UINT32 mod11(UINT32 op, UINT8 ar);
- UINT32 mod12(UINT32 op, UINT8 ar);
- UINT32 mod13(UINT32 op, UINT8 ar);
- UINT32 mod14(UINT32 op, UINT8 ar);
- UINT32 mod15(UINT32 op, UINT8 ar);
- UINT32 mod16(UINT32 op, UINT8 ar);
- UINT32 mod17(UINT32 op, UINT8 ar);
-
- UINT32 mod18(UINT32 op, UINT8 ar);
- UINT32 mod19(UINT32 op, UINT8 ar);
- UINT32 modillegal(UINT32 op, UINT8 ar);
-
- UINT32 mod00_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod01_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod02_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod03_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod04_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod05_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod06_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod07_1_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
-
- UINT32 mod08_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod09_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod0a_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod0b_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod0c_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod0d_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod0e_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod0f_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
-
- UINT32 mod10_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod11_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod12_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod13_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod14_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod15_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod16_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod17_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod18_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 mod19_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
- UINT32 modillegal_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr);
+ uint32_t mod00_d(uint32_t op, uint8_t ar);
+ uint32_t mod01_d(uint32_t op, uint8_t ar);
+ uint32_t mod02_d(uint32_t op, uint8_t ar);
+ uint32_t mod03_d(uint32_t op, uint8_t ar);
+ uint32_t mod04_d(uint32_t op, uint8_t ar);
+ uint32_t mod05_d(uint32_t op, uint8_t ar);
+ uint32_t mod06_d(uint32_t op, uint8_t ar);
+ uint32_t mod07_d(uint32_t op, uint8_t ar);
+
+ uint32_t mod00_1(uint32_t op, uint8_t ar);
+ uint32_t mod01_1(uint32_t op, uint8_t ar);
+ uint32_t mod02_1(uint32_t op, uint8_t ar);
+ uint32_t mod03_1(uint32_t op, uint8_t ar);
+ uint32_t mod04_1(uint32_t op, uint8_t ar);
+ uint32_t mod05_1(uint32_t op, uint8_t ar);
+ uint32_t mod06_1(uint32_t op, uint8_t ar);
+ uint32_t mod07_1(uint32_t op, uint8_t ar);
+
+ uint32_t mod08(uint32_t op, uint8_t ar);
+ uint32_t mod09(uint32_t op, uint8_t ar);
+ uint32_t mod0a(uint32_t op, uint8_t ar);
+ uint32_t mod0b(uint32_t op, uint8_t ar);
+ uint32_t mod0c(uint32_t op, uint8_t ar);
+ uint32_t mod0d(uint32_t op, uint8_t ar);
+ uint32_t mod0e(uint32_t op, uint8_t ar);
+ uint32_t mod0f(uint32_t op, uint8_t ar);
+
+ uint32_t mod10(uint32_t op, uint8_t ar);
+ uint32_t mod11(uint32_t op, uint8_t ar);
+ uint32_t mod12(uint32_t op, uint8_t ar);
+ uint32_t mod13(uint32_t op, uint8_t ar);
+ uint32_t mod14(uint32_t op, uint8_t ar);
+ uint32_t mod15(uint32_t op, uint8_t ar);
+ uint32_t mod16(uint32_t op, uint8_t ar);
+ uint32_t mod17(uint32_t op, uint8_t ar);
+
+ uint32_t mod18(uint32_t op, uint8_t ar);
+ uint32_t mod19(uint32_t op, uint8_t ar);
+ uint32_t modillegal(uint32_t op, uint8_t ar);
+
+ uint32_t mod00_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod01_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod02_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod03_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod04_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod05_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod06_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod07_1_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+
+ uint32_t mod08_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod09_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod0a_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod0b_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod0c_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod0d_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod0e_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod0f_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+
+ uint32_t mod10_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod11_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod12_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod13_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod14_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod15_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod16_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod17_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod18_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t mod19_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
+ uint32_t modillegal_def(uint32_t op, uint8_t ar, uint32_t *&defptrptr);
// instructions
- void illegal(UINT32 op);
- void unimplemented(UINT32 op);
-
- void absf_reg(UINT32 op);
- void absf_dir(UINT32 op);
- void absf_ind(UINT32 op);
- void absf_imm(UINT32 op);
- void absi_reg(UINT32 op);
- void absi_dir(UINT32 op);
- void absi_ind(UINT32 op);
- void absi_imm(UINT32 op);
- void addc_reg(UINT32 op);
- void addc_dir(UINT32 op);
- void addc_ind(UINT32 op);
- void addc_imm(UINT32 op);
- void addf_reg(UINT32 op);
- void addf_dir(UINT32 op);
- void addf_ind(UINT32 op);
- void addf_imm(UINT32 op);
- void addi_reg(UINT32 op);
- void addi_dir(UINT32 op);
- void addi_ind(UINT32 op);
- void addi_imm(UINT32 op);
- void and_reg(UINT32 op);
- void and_dir(UINT32 op);
- void and_ind(UINT32 op);
- void and_imm(UINT32 op);
- void andn_reg(UINT32 op);
- void andn_dir(UINT32 op);
- void andn_ind(UINT32 op);
- void andn_imm(UINT32 op);
- void ash_reg(UINT32 op);
- void ash_dir(UINT32 op);
- void ash_ind(UINT32 op);
- void ash_imm(UINT32 op);
- void cmpf_reg(UINT32 op);
- void cmpf_dir(UINT32 op);
- void cmpf_ind(UINT32 op);
- void cmpf_imm(UINT32 op);
- void cmpi_reg(UINT32 op);
- void cmpi_dir(UINT32 op);
- void cmpi_ind(UINT32 op);
- void cmpi_imm(UINT32 op);
- void fix_reg(UINT32 op);
- void fix_dir(UINT32 op);
- void fix_ind(UINT32 op);
- void fix_imm(UINT32 op);
- void float_reg(UINT32 op);
- void float_dir(UINT32 op);
- void float_ind(UINT32 op);
- void float_imm(UINT32 op);
- void idle(UINT32 op);
- void lde_reg(UINT32 op);
- void lde_dir(UINT32 op);
- void lde_ind(UINT32 op);
- void lde_imm(UINT32 op);
- void ldf_reg(UINT32 op);
- void ldf_dir(UINT32 op);
- void ldf_ind(UINT32 op);
- void ldf_imm(UINT32 op);
- void ldfi_dir(UINT32 op);
- void ldfi_ind(UINT32 op);
- void ldi_reg(UINT32 op);
- void ldi_dir(UINT32 op);
- void ldi_ind(UINT32 op);
- void ldi_imm(UINT32 op);
- void ldii_dir(UINT32 op);
- void ldii_ind(UINT32 op);
- void ldm_reg(UINT32 op);
- void ldm_dir(UINT32 op);
- void ldm_ind(UINT32 op);
- void ldm_imm(UINT32 op);
- void lsh_reg(UINT32 op);
- void lsh_dir(UINT32 op);
- void lsh_ind(UINT32 op);
- void lsh_imm(UINT32 op);
- void mpyf_reg(UINT32 op);
- void mpyf_dir(UINT32 op);
- void mpyf_ind(UINT32 op);
- void mpyf_imm(UINT32 op);
- void mpyi_reg(UINT32 op);
- void mpyi_dir(UINT32 op);
- void mpyi_ind(UINT32 op);
- void mpyi_imm(UINT32 op);
- void negb_reg(UINT32 op);
- void negb_dir(UINT32 op);
- void negb_ind(UINT32 op);
- void negb_imm(UINT32 op);
- void negf_reg(UINT32 op);
- void negf_dir(UINT32 op);
- void negf_ind(UINT32 op);
- void negf_imm(UINT32 op);
- void negi_reg(UINT32 op);
- void negi_dir(UINT32 op);
- void negi_ind(UINT32 op);
- void negi_imm(UINT32 op);
- void nop_reg(UINT32 op);
- void nop_ind(UINT32 op);
- void norm_reg(UINT32 op);
- void norm_dir(UINT32 op);
- void norm_ind(UINT32 op);
- void norm_imm(UINT32 op);
- void not_reg(UINT32 op);
- void not_dir(UINT32 op);
- void not_ind(UINT32 op);
- void not_imm(UINT32 op);
- void pop(UINT32 op);
- void popf(UINT32 op);
- void push(UINT32 op);
- void pushf(UINT32 op);
- void or_reg(UINT32 op);
- void or_dir(UINT32 op);
- void or_ind(UINT32 op);
- void or_imm(UINT32 op);
- void maxspeed(UINT32 op);
- void rnd_reg(UINT32 op);
- void rnd_dir(UINT32 op);
- void rnd_ind(UINT32 op);
- void rnd_imm(UINT32 op);
- void rol(UINT32 op);
- void rolc(UINT32 op);
- void ror(UINT32 op);
- void rorc(UINT32 op);
- void rtps_reg(UINT32 op);
- void rtps_dir(UINT32 op);
- void rtps_ind(UINT32 op);
- void rtps_imm(UINT32 op);
- void stf_dir(UINT32 op);
- void stf_ind(UINT32 op);
- void stfi_dir(UINT32 op);
- void stfi_ind(UINT32 op);
- void sti_dir(UINT32 op);
- void sti_ind(UINT32 op);
- void stii_dir(UINT32 op);
- void stii_ind(UINT32 op);
- void sigi(UINT32 op);
- void subb_reg(UINT32 op);
- void subb_dir(UINT32 op);
- void subb_ind(UINT32 op);
- void subb_imm(UINT32 op);
- void subc_reg(UINT32 op);
- void subc_dir(UINT32 op);
- void subc_ind(UINT32 op);
- void subc_imm(UINT32 op);
- void subf_reg(UINT32 op);
- void subf_dir(UINT32 op);
- void subf_ind(UINT32 op);
- void subf_imm(UINT32 op);
- void subi_reg(UINT32 op);
- void subi_dir(UINT32 op);
- void subi_ind(UINT32 op);
- void subi_imm(UINT32 op);
- void subrb_reg(UINT32 op);
- void subrb_dir(UINT32 op);
- void subrb_ind(UINT32 op);
- void subrb_imm(UINT32 op);
- void subrf_reg(UINT32 op);
- void subrf_dir(UINT32 op);
- void subrf_ind(UINT32 op);
- void subrf_imm(UINT32 op);
- void subri_reg(UINT32 op);
- void subri_dir(UINT32 op);
- void subri_ind(UINT32 op);
- void subri_imm(UINT32 op);
- void tstb_reg(UINT32 op);
- void tstb_dir(UINT32 op);
- void tstb_ind(UINT32 op);
- void tstb_imm(UINT32 op);
- void xor_reg(UINT32 op);
- void xor_dir(UINT32 op);
- void xor_ind(UINT32 op);
- void xor_imm(UINT32 op);
- void iack_dir(UINT32 op);
- void iack_ind(UINT32 op);
- void addc3_regreg(UINT32 op);
- void addc3_indreg(UINT32 op);
- void addc3_regind(UINT32 op);
- void addc3_indind(UINT32 op);
- void addf3_regreg(UINT32 op);
- void addf3_indreg(UINT32 op);
- void addf3_regind(UINT32 op);
- void addf3_indind(UINT32 op);
- void addi3_regreg(UINT32 op);
- void addi3_indreg(UINT32 op);
- void addi3_regind(UINT32 op);
- void addi3_indind(UINT32 op);
- void and3_regreg(UINT32 op);
- void and3_indreg(UINT32 op);
- void and3_regind(UINT32 op);
- void and3_indind(UINT32 op);
- void andn3_regreg(UINT32 op);
- void andn3_indreg(UINT32 op);
- void andn3_regind(UINT32 op);
- void andn3_indind(UINT32 op);
- void ash3_regreg(UINT32 op);
- void ash3_indreg(UINT32 op);
- void ash3_regind(UINT32 op);
- void ash3_indind(UINT32 op);
- void cmpf3_regreg(UINT32 op);
- void cmpf3_indreg(UINT32 op);
- void cmpf3_regind(UINT32 op);
- void cmpf3_indind(UINT32 op);
- void cmpi3_regreg(UINT32 op);
- void cmpi3_indreg(UINT32 op);
- void cmpi3_regind(UINT32 op);
- void cmpi3_indind(UINT32 op);
- void lsh3_regreg(UINT32 op);
- void lsh3_indreg(UINT32 op);
- void lsh3_regind(UINT32 op);
- void lsh3_indind(UINT32 op);
- void mpyf3_regreg(UINT32 op);
- void mpyf3_indreg(UINT32 op);
- void mpyf3_regind(UINT32 op);
- void mpyf3_indind(UINT32 op);
- void mpyi3_regreg(UINT32 op);
- void mpyi3_indreg(UINT32 op);
- void mpyi3_regind(UINT32 op);
- void mpyi3_indind(UINT32 op);
- void or3_regreg(UINT32 op);
- void or3_indreg(UINT32 op);
- void or3_regind(UINT32 op);
- void or3_indind(UINT32 op);
- void subb3_regreg(UINT32 op);
- void subb3_indreg(UINT32 op);
- void subb3_regind(UINT32 op);
- void subb3_indind(UINT32 op);
- void subf3_regreg(UINT32 op);
- void subf3_indreg(UINT32 op);
- void subf3_regind(UINT32 op);
- void subf3_indind(UINT32 op);
- void subi3_regreg(UINT32 op);
- void subi3_indreg(UINT32 op);
- void subi3_regind(UINT32 op);
- void subi3_indind(UINT32 op);
- void tstb3_regreg(UINT32 op);
- void tstb3_indreg(UINT32 op);
- void tstb3_regind(UINT32 op);
- void tstb3_indind(UINT32 op);
- void xor3_regreg(UINT32 op);
- void xor3_indreg(UINT32 op);
- void xor3_regind(UINT32 op);
- void xor3_indind(UINT32 op);
- void ldfu_reg(UINT32 op);
- void ldfu_dir(UINT32 op);
- void ldfu_ind(UINT32 op);
- void ldfu_imm(UINT32 op);
- void ldflo_reg(UINT32 op);
- void ldflo_dir(UINT32 op);
- void ldflo_ind(UINT32 op);
- void ldflo_imm(UINT32 op);
- void ldfls_reg(UINT32 op);
- void ldfls_dir(UINT32 op);
- void ldfls_ind(UINT32 op);
- void ldfls_imm(UINT32 op);
- void ldfhi_reg(UINT32 op);
- void ldfhi_dir(UINT32 op);
- void ldfhi_ind(UINT32 op);
- void ldfhi_imm(UINT32 op);
- void ldfhs_reg(UINT32 op);
- void ldfhs_dir(UINT32 op);
- void ldfhs_ind(UINT32 op);
- void ldfhs_imm(UINT32 op);
- void ldfeq_reg(UINT32 op);
- void ldfeq_dir(UINT32 op);
- void ldfeq_ind(UINT32 op);
- void ldfeq_imm(UINT32 op);
- void ldfne_reg(UINT32 op);
- void ldfne_dir(UINT32 op);
- void ldfne_ind(UINT32 op);
- void ldfne_imm(UINT32 op);
- void ldflt_reg(UINT32 op);
- void ldflt_dir(UINT32 op);
- void ldflt_ind(UINT32 op);
- void ldflt_imm(UINT32 op);
- void ldfle_reg(UINT32 op);
- void ldfle_dir(UINT32 op);
- void ldfle_ind(UINT32 op);
- void ldfle_imm(UINT32 op);
- void ldfgt_reg(UINT32 op);
- void ldfgt_dir(UINT32 op);
- void ldfgt_ind(UINT32 op);
- void ldfgt_imm(UINT32 op);
- void ldfge_reg(UINT32 op);
- void ldfge_dir(UINT32 op);
- void ldfge_ind(UINT32 op);
- void ldfge_imm(UINT32 op);
- void ldfnv_reg(UINT32 op);
- void ldfnv_dir(UINT32 op);
- void ldfnv_ind(UINT32 op);
- void ldfnv_imm(UINT32 op);
- void ldfv_reg(UINT32 op);
- void ldfv_dir(UINT32 op);
- void ldfv_ind(UINT32 op);
- void ldfv_imm(UINT32 op);
- void ldfnuf_reg(UINT32 op);
- void ldfnuf_dir(UINT32 op);
- void ldfnuf_ind(UINT32 op);
- void ldfnuf_imm(UINT32 op);
- void ldfuf_reg(UINT32 op);
- void ldfuf_dir(UINT32 op);
- void ldfuf_ind(UINT32 op);
- void ldfuf_imm(UINT32 op);
- void ldfnlv_reg(UINT32 op);
- void ldfnlv_dir(UINT32 op);
- void ldfnlv_ind(UINT32 op);
- void ldfnlv_imm(UINT32 op);
- void ldflv_reg(UINT32 op);
- void ldflv_dir(UINT32 op);
- void ldflv_ind(UINT32 op);
- void ldflv_imm(UINT32 op);
- void ldfnluf_reg(UINT32 op);
- void ldfnluf_dir(UINT32 op);
- void ldfnluf_ind(UINT32 op);
- void ldfnluf_imm(UINT32 op);
- void ldfluf_reg(UINT32 op);
- void ldfluf_dir(UINT32 op);
- void ldfluf_ind(UINT32 op);
- void ldfluf_imm(UINT32 op);
- void ldfzuf_reg(UINT32 op);
- void ldfzuf_dir(UINT32 op);
- void ldfzuf_ind(UINT32 op);
- void ldfzuf_imm(UINT32 op);
- void ldiu_reg(UINT32 op);
- void ldiu_dir(UINT32 op);
- void ldiu_ind(UINT32 op);
- void ldiu_imm(UINT32 op);
- void ldilo_reg(UINT32 op);
- void ldilo_dir(UINT32 op);
- void ldilo_ind(UINT32 op);
- void ldilo_imm(UINT32 op);
- void ldils_reg(UINT32 op);
- void ldils_dir(UINT32 op);
- void ldils_ind(UINT32 op);
- void ldils_imm(UINT32 op);
- void ldihi_reg(UINT32 op);
- void ldihi_dir(UINT32 op);
- void ldihi_ind(UINT32 op);
- void ldihi_imm(UINT32 op);
- void ldihs_reg(UINT32 op);
- void ldihs_dir(UINT32 op);
- void ldihs_ind(UINT32 op);
- void ldihs_imm(UINT32 op);
- void ldieq_reg(UINT32 op);
- void ldieq_dir(UINT32 op);
- void ldieq_ind(UINT32 op);
- void ldieq_imm(UINT32 op);
- void ldine_reg(UINT32 op);
- void ldine_dir(UINT32 op);
- void ldine_ind(UINT32 op);
- void ldine_imm(UINT32 op);
- void ldilt_reg(UINT32 op);
- void ldilt_dir(UINT32 op);
- void ldilt_ind(UINT32 op);
- void ldilt_imm(UINT32 op);
- void ldile_reg(UINT32 op);
- void ldile_dir(UINT32 op);
- void ldile_ind(UINT32 op);
- void ldile_imm(UINT32 op);
- void ldigt_reg(UINT32 op);
- void ldigt_dir(UINT32 op);
- void ldigt_ind(UINT32 op);
- void ldigt_imm(UINT32 op);
- void ldige_reg(UINT32 op);
- void ldige_dir(UINT32 op);
- void ldige_ind(UINT32 op);
- void ldige_imm(UINT32 op);
- void ldinv_reg(UINT32 op);
- void ldinv_dir(UINT32 op);
- void ldinv_ind(UINT32 op);
- void ldinv_imm(UINT32 op);
- void ldiuf_reg(UINT32 op);
- void ldiuf_dir(UINT32 op);
- void ldiuf_ind(UINT32 op);
- void ldiuf_imm(UINT32 op);
- void ldinuf_reg(UINT32 op);
- void ldinuf_dir(UINT32 op);
- void ldinuf_ind(UINT32 op);
- void ldinuf_imm(UINT32 op);
- void ldiv_reg(UINT32 op);
- void ldiv_dir(UINT32 op);
- void ldiv_ind(UINT32 op);
- void ldiv_imm(UINT32 op);
- void ldinlv_reg(UINT32 op);
- void ldinlv_dir(UINT32 op);
- void ldinlv_ind(UINT32 op);
- void ldinlv_imm(UINT32 op);
- void ldilv_reg(UINT32 op);
- void ldilv_dir(UINT32 op);
- void ldilv_ind(UINT32 op);
- void ldilv_imm(UINT32 op);
- void ldinluf_reg(UINT32 op);
- void ldinluf_dir(UINT32 op);
- void ldinluf_ind(UINT32 op);
- void ldinluf_imm(UINT32 op);
- void ldiluf_reg(UINT32 op);
- void ldiluf_dir(UINT32 op);
- void ldiluf_ind(UINT32 op);
- void ldiluf_imm(UINT32 op);
- void ldizuf_reg(UINT32 op);
- void ldizuf_dir(UINT32 op);
- void ldizuf_ind(UINT32 op);
- void ldizuf_imm(UINT32 op);
- void execute_delayed(UINT32 newpc);
- void br_imm(UINT32 op);
- void brd_imm(UINT32 op);
- void call_imm(UINT32 op);
- void rptb_imm(UINT32 op);
- void swi(UINT32 op);
- void brc_reg(UINT32 op);
- void brcd_reg(UINT32 op);
- void brc_imm(UINT32 op);
- void brcd_imm(UINT32 op);
- void dbc_reg(UINT32 op);
- void dbcd_reg(UINT32 op);
- void dbc_imm(UINT32 op);
- void dbcd_imm(UINT32 op);
- void callc_reg(UINT32 op);
- void callc_imm(UINT32 op);
+ void illegal(uint32_t op);
+ void unimplemented(uint32_t op);
+
+ void absf_reg(uint32_t op);
+ void absf_dir(uint32_t op);
+ void absf_ind(uint32_t op);
+ void absf_imm(uint32_t op);
+ void absi_reg(uint32_t op);
+ void absi_dir(uint32_t op);
+ void absi_ind(uint32_t op);
+ void absi_imm(uint32_t op);
+ void addc_reg(uint32_t op);
+ void addc_dir(uint32_t op);
+ void addc_ind(uint32_t op);
+ void addc_imm(uint32_t op);
+ void addf_reg(uint32_t op);
+ void addf_dir(uint32_t op);
+ void addf_ind(uint32_t op);
+ void addf_imm(uint32_t op);
+ void addi_reg(uint32_t op);
+ void addi_dir(uint32_t op);
+ void addi_ind(uint32_t op);
+ void addi_imm(uint32_t op);
+ void and_reg(uint32_t op);
+ void and_dir(uint32_t op);
+ void and_ind(uint32_t op);
+ void and_imm(uint32_t op);
+ void andn_reg(uint32_t op);
+ void andn_dir(uint32_t op);
+ void andn_ind(uint32_t op);
+ void andn_imm(uint32_t op);
+ void ash_reg(uint32_t op);
+ void ash_dir(uint32_t op);
+ void ash_ind(uint32_t op);
+ void ash_imm(uint32_t op);
+ void cmpf_reg(uint32_t op);
+ void cmpf_dir(uint32_t op);
+ void cmpf_ind(uint32_t op);
+ void cmpf_imm(uint32_t op);
+ void cmpi_reg(uint32_t op);
+ void cmpi_dir(uint32_t op);
+ void cmpi_ind(uint32_t op);
+ void cmpi_imm(uint32_t op);
+ void fix_reg(uint32_t op);
+ void fix_dir(uint32_t op);
+ void fix_ind(uint32_t op);
+ void fix_imm(uint32_t op);
+ void float_reg(uint32_t op);
+ void float_dir(uint32_t op);
+ void float_ind(uint32_t op);
+ void float_imm(uint32_t op);
+ void idle(uint32_t op);
+ void lde_reg(uint32_t op);
+ void lde_dir(uint32_t op);
+ void lde_ind(uint32_t op);
+ void lde_imm(uint32_t op);
+ void ldf_reg(uint32_t op);
+ void ldf_dir(uint32_t op);
+ void ldf_ind(uint32_t op);
+ void ldf_imm(uint32_t op);
+ void ldfi_dir(uint32_t op);
+ void ldfi_ind(uint32_t op);
+ void ldi_reg(uint32_t op);
+ void ldi_dir(uint32_t op);
+ void ldi_ind(uint32_t op);
+ void ldi_imm(uint32_t op);
+ void ldii_dir(uint32_t op);
+ void ldii_ind(uint32_t op);
+ void ldm_reg(uint32_t op);
+ void ldm_dir(uint32_t op);
+ void ldm_ind(uint32_t op);
+ void ldm_imm(uint32_t op);
+ void lsh_reg(uint32_t op);
+ void lsh_dir(uint32_t op);
+ void lsh_ind(uint32_t op);
+ void lsh_imm(uint32_t op);
+ void mpyf_reg(uint32_t op);
+ void mpyf_dir(uint32_t op);
+ void mpyf_ind(uint32_t op);
+ void mpyf_imm(uint32_t op);
+ void mpyi_reg(uint32_t op);
+ void mpyi_dir(uint32_t op);
+ void mpyi_ind(uint32_t op);
+ void mpyi_imm(uint32_t op);
+ void negb_reg(uint32_t op);
+ void negb_dir(uint32_t op);
+ void negb_ind(uint32_t op);
+ void negb_imm(uint32_t op);
+ void negf_reg(uint32_t op);
+ void negf_dir(uint32_t op);
+ void negf_ind(uint32_t op);
+ void negf_imm(uint32_t op);
+ void negi_reg(uint32_t op);
+ void negi_dir(uint32_t op);
+ void negi_ind(uint32_t op);
+ void negi_imm(uint32_t op);
+ void nop_reg(uint32_t op);
+ void nop_ind(uint32_t op);
+ void norm_reg(uint32_t op);
+ void norm_dir(uint32_t op);
+ void norm_ind(uint32_t op);
+ void norm_imm(uint32_t op);
+ void not_reg(uint32_t op);
+ void not_dir(uint32_t op);
+ void not_ind(uint32_t op);
+ void not_imm(uint32_t op);
+ void pop(uint32_t op);
+ void popf(uint32_t op);
+ void push(uint32_t op);
+ void pushf(uint32_t op);
+ void or_reg(uint32_t op);
+ void or_dir(uint32_t op);
+ void or_ind(uint32_t op);
+ void or_imm(uint32_t op);
+ void maxspeed(uint32_t op);
+ void rnd_reg(uint32_t op);
+ void rnd_dir(uint32_t op);
+ void rnd_ind(uint32_t op);
+ void rnd_imm(uint32_t op);
+ void rol(uint32_t op);
+ void rolc(uint32_t op);
+ void ror(uint32_t op);
+ void rorc(uint32_t op);
+ void rtps_reg(uint32_t op);
+ void rtps_dir(uint32_t op);
+ void rtps_ind(uint32_t op);
+ void rtps_imm(uint32_t op);
+ void stf_dir(uint32_t op);
+ void stf_ind(uint32_t op);
+ void stfi_dir(uint32_t op);
+ void stfi_ind(uint32_t op);
+ void sti_dir(uint32_t op);
+ void sti_ind(uint32_t op);
+ void stii_dir(uint32_t op);
+ void stii_ind(uint32_t op);
+ void sigi(uint32_t op);
+ void subb_reg(uint32_t op);
+ void subb_dir(uint32_t op);
+ void subb_ind(uint32_t op);
+ void subb_imm(uint32_t op);
+ void subc_reg(uint32_t op);
+ void subc_dir(uint32_t op);
+ void subc_ind(uint32_t op);
+ void subc_imm(uint32_t op);
+ void subf_reg(uint32_t op);
+ void subf_dir(uint32_t op);
+ void subf_ind(uint32_t op);
+ void subf_imm(uint32_t op);
+ void subi_reg(uint32_t op);
+ void subi_dir(uint32_t op);
+ void subi_ind(uint32_t op);
+ void subi_imm(uint32_t op);
+ void subrb_reg(uint32_t op);
+ void subrb_dir(uint32_t op);
+ void subrb_ind(uint32_t op);
+ void subrb_imm(uint32_t op);
+ void subrf_reg(uint32_t op);
+ void subrf_dir(uint32_t op);
+ void subrf_ind(uint32_t op);
+ void subrf_imm(uint32_t op);
+ void subri_reg(uint32_t op);
+ void subri_dir(uint32_t op);
+ void subri_ind(uint32_t op);
+ void subri_imm(uint32_t op);
+ void tstb_reg(uint32_t op);
+ void tstb_dir(uint32_t op);
+ void tstb_ind(uint32_t op);
+ void tstb_imm(uint32_t op);
+ void xor_reg(uint32_t op);
+ void xor_dir(uint32_t op);
+ void xor_ind(uint32_t op);
+ void xor_imm(uint32_t op);
+ void iack_dir(uint32_t op);
+ void iack_ind(uint32_t op);
+ void addc3_regreg(uint32_t op);
+ void addc3_indreg(uint32_t op);
+ void addc3_regind(uint32_t op);
+ void addc3_indind(uint32_t op);
+ void addf3_regreg(uint32_t op);
+ void addf3_indreg(uint32_t op);
+ void addf3_regind(uint32_t op);
+ void addf3_indind(uint32_t op);
+ void addi3_regreg(uint32_t op);
+ void addi3_indreg(uint32_t op);
+ void addi3_regind(uint32_t op);
+ void addi3_indind(uint32_t op);
+ void and3_regreg(uint32_t op);
+ void and3_indreg(uint32_t op);
+ void and3_regind(uint32_t op);
+ void and3_indind(uint32_t op);
+ void andn3_regreg(uint32_t op);
+ void andn3_indreg(uint32_t op);
+ void andn3_regind(uint32_t op);
+ void andn3_indind(uint32_t op);
+ void ash3_regreg(uint32_t op);
+ void ash3_indreg(uint32_t op);
+ void ash3_regind(uint32_t op);
+ void ash3_indind(uint32_t op);
+ void cmpf3_regreg(uint32_t op);
+ void cmpf3_indreg(uint32_t op);
+ void cmpf3_regind(uint32_t op);
+ void cmpf3_indind(uint32_t op);
+ void cmpi3_regreg(uint32_t op);
+ void cmpi3_indreg(uint32_t op);
+ void cmpi3_regind(uint32_t op);
+ void cmpi3_indind(uint32_t op);
+ void lsh3_regreg(uint32_t op);
+ void lsh3_indreg(uint32_t op);
+ void lsh3_regind(uint32_t op);
+ void lsh3_indind(uint32_t op);
+ void mpyf3_regreg(uint32_t op);
+ void mpyf3_indreg(uint32_t op);
+ void mpyf3_regind(uint32_t op);
+ void mpyf3_indind(uint32_t op);
+ void mpyi3_regreg(uint32_t op);
+ void mpyi3_indreg(uint32_t op);
+ void mpyi3_regind(uint32_t op);
+ void mpyi3_indind(uint32_t op);
+ void or3_regreg(uint32_t op);
+ void or3_indreg(uint32_t op);
+ void or3_regind(uint32_t op);
+ void or3_indind(uint32_t op);
+ void subb3_regreg(uint32_t op);
+ void subb3_indreg(uint32_t op);
+ void subb3_regind(uint32_t op);
+ void subb3_indind(uint32_t op);
+ void subf3_regreg(uint32_t op);
+ void subf3_indreg(uint32_t op);
+ void subf3_regind(uint32_t op);
+ void subf3_indind(uint32_t op);
+ void subi3_regreg(uint32_t op);
+ void subi3_indreg(uint32_t op);
+ void subi3_regind(uint32_t op);
+ void subi3_indind(uint32_t op);
+ void tstb3_regreg(uint32_t op);
+ void tstb3_indreg(uint32_t op);
+ void tstb3_regind(uint32_t op);
+ void tstb3_indind(uint32_t op);
+ void xor3_regreg(uint32_t op);
+ void xor3_indreg(uint32_t op);
+ void xor3_regind(uint32_t op);
+ void xor3_indind(uint32_t op);
+ void ldfu_reg(uint32_t op);
+ void ldfu_dir(uint32_t op);
+ void ldfu_ind(uint32_t op);
+ void ldfu_imm(uint32_t op);
+ void ldflo_reg(uint32_t op);
+ void ldflo_dir(uint32_t op);
+ void ldflo_ind(uint32_t op);
+ void ldflo_imm(uint32_t op);
+ void ldfls_reg(uint32_t op);
+ void ldfls_dir(uint32_t op);
+ void ldfls_ind(uint32_t op);
+ void ldfls_imm(uint32_t op);
+ void ldfhi_reg(uint32_t op);
+ void ldfhi_dir(uint32_t op);
+ void ldfhi_ind(uint32_t op);
+ void ldfhi_imm(uint32_t op);
+ void ldfhs_reg(uint32_t op);
+ void ldfhs_dir(uint32_t op);
+ void ldfhs_ind(uint32_t op);
+ void ldfhs_imm(uint32_t op);
+ void ldfeq_reg(uint32_t op);
+ void ldfeq_dir(uint32_t op);
+ void ldfeq_ind(uint32_t op);
+ void ldfeq_imm(uint32_t op);
+ void ldfne_reg(uint32_t op);
+ void ldfne_dir(uint32_t op);
+ void ldfne_ind(uint32_t op);
+ void ldfne_imm(uint32_t op);
+ void ldflt_reg(uint32_t op);
+ void ldflt_dir(uint32_t op);
+ void ldflt_ind(uint32_t op);
+ void ldflt_imm(uint32_t op);
+ void ldfle_reg(uint32_t op);
+ void ldfle_dir(uint32_t op);
+ void ldfle_ind(uint32_t op);
+ void ldfle_imm(uint32_t op);
+ void ldfgt_reg(uint32_t op);
+ void ldfgt_dir(uint32_t op);
+ void ldfgt_ind(uint32_t op);
+ void ldfgt_imm(uint32_t op);
+ void ldfge_reg(uint32_t op);
+ void ldfge_dir(uint32_t op);
+ void ldfge_ind(uint32_t op);
+ void ldfge_imm(uint32_t op);
+ void ldfnv_reg(uint32_t op);
+ void ldfnv_dir(uint32_t op);
+ void ldfnv_ind(uint32_t op);
+ void ldfnv_imm(uint32_t op);
+ void ldfv_reg(uint32_t op);
+ void ldfv_dir(uint32_t op);
+ void ldfv_ind(uint32_t op);
+ void ldfv_imm(uint32_t op);
+ void ldfnuf_reg(uint32_t op);
+ void ldfnuf_dir(uint32_t op);
+ void ldfnuf_ind(uint32_t op);
+ void ldfnuf_imm(uint32_t op);
+ void ldfuf_reg(uint32_t op);
+ void ldfuf_dir(uint32_t op);
+ void ldfuf_ind(uint32_t op);
+ void ldfuf_imm(uint32_t op);
+ void ldfnlv_reg(uint32_t op);
+ void ldfnlv_dir(uint32_t op);
+ void ldfnlv_ind(uint32_t op);
+ void ldfnlv_imm(uint32_t op);
+ void ldflv_reg(uint32_t op);
+ void ldflv_dir(uint32_t op);
+ void ldflv_ind(uint32_t op);
+ void ldflv_imm(uint32_t op);
+ void ldfnluf_reg(uint32_t op);
+ void ldfnluf_dir(uint32_t op);
+ void ldfnluf_ind(uint32_t op);
+ void ldfnluf_imm(uint32_t op);
+ void ldfluf_reg(uint32_t op);
+ void ldfluf_dir(uint32_t op);
+ void ldfluf_ind(uint32_t op);
+ void ldfluf_imm(uint32_t op);
+ void ldfzuf_reg(uint32_t op);
+ void ldfzuf_dir(uint32_t op);
+ void ldfzuf_ind(uint32_t op);
+ void ldfzuf_imm(uint32_t op);
+ void ldiu_reg(uint32_t op);
+ void ldiu_dir(uint32_t op);
+ void ldiu_ind(uint32_t op);
+ void ldiu_imm(uint32_t op);
+ void ldilo_reg(uint32_t op);
+ void ldilo_dir(uint32_t op);
+ void ldilo_ind(uint32_t op);
+ void ldilo_imm(uint32_t op);
+ void ldils_reg(uint32_t op);
+ void ldils_dir(uint32_t op);
+ void ldils_ind(uint32_t op);
+ void ldils_imm(uint32_t op);
+ void ldihi_reg(uint32_t op);
+ void ldihi_dir(uint32_t op);
+ void ldihi_ind(uint32_t op);
+ void ldihi_imm(uint32_t op);
+ void ldihs_reg(uint32_t op);
+ void ldihs_dir(uint32_t op);
+ void ldihs_ind(uint32_t op);
+ void ldihs_imm(uint32_t op);
+ void ldieq_reg(uint32_t op);
+ void ldieq_dir(uint32_t op);
+ void ldieq_ind(uint32_t op);
+ void ldieq_imm(uint32_t op);
+ void ldine_reg(uint32_t op);
+ void ldine_dir(uint32_t op);
+ void ldine_ind(uint32_t op);
+ void ldine_imm(uint32_t op);
+ void ldilt_reg(uint32_t op);
+ void ldilt_dir(uint32_t op);
+ void ldilt_ind(uint32_t op);
+ void ldilt_imm(uint32_t op);
+ void ldile_reg(uint32_t op);
+ void ldile_dir(uint32_t op);
+ void ldile_ind(uint32_t op);
+ void ldile_imm(uint32_t op);
+ void ldigt_reg(uint32_t op);
+ void ldigt_dir(uint32_t op);
+ void ldigt_ind(uint32_t op);
+ void ldigt_imm(uint32_t op);
+ void ldige_reg(uint32_t op);
+ void ldige_dir(uint32_t op);
+ void ldige_ind(uint32_t op);
+ void ldige_imm(uint32_t op);
+ void ldinv_reg(uint32_t op);
+ void ldinv_dir(uint32_t op);
+ void ldinv_ind(uint32_t op);
+ void ldinv_imm(uint32_t op);
+ void ldiuf_reg(uint32_t op);
+ void ldiuf_dir(uint32_t op);
+ void ldiuf_ind(uint32_t op);
+ void ldiuf_imm(uint32_t op);
+ void ldinuf_reg(uint32_t op);
+ void ldinuf_dir(uint32_t op);
+ void ldinuf_ind(uint32_t op);
+ void ldinuf_imm(uint32_t op);
+ void ldiv_reg(uint32_t op);
+ void ldiv_dir(uint32_t op);
+ void ldiv_ind(uint32_t op);
+ void ldiv_imm(uint32_t op);
+ void ldinlv_reg(uint32_t op);
+ void ldinlv_dir(uint32_t op);
+ void ldinlv_ind(uint32_t op);
+ void ldinlv_imm(uint32_t op);
+ void ldilv_reg(uint32_t op);
+ void ldilv_dir(uint32_t op);
+ void ldilv_ind(uint32_t op);
+ void ldilv_imm(uint32_t op);
+ void ldinluf_reg(uint32_t op);
+ void ldinluf_dir(uint32_t op);
+ void ldinluf_ind(uint32_t op);
+ void ldinluf_imm(uint32_t op);
+ void ldiluf_reg(uint32_t op);
+ void ldiluf_dir(uint32_t op);
+ void ldiluf_ind(uint32_t op);
+ void ldiluf_imm(uint32_t op);
+ void ldizuf_reg(uint32_t op);
+ void ldizuf_dir(uint32_t op);
+ void ldizuf_ind(uint32_t op);
+ void ldizuf_imm(uint32_t op);
+ void execute_delayed(uint32_t newpc);
+ void br_imm(uint32_t op);
+ void brd_imm(uint32_t op);
+ void call_imm(uint32_t op);
+ void rptb_imm(uint32_t op);
+ void swi(uint32_t op);
+ void brc_reg(uint32_t op);
+ void brcd_reg(uint32_t op);
+ void brc_imm(uint32_t op);
+ void brcd_imm(uint32_t op);
+ void dbc_reg(uint32_t op);
+ void dbcd_reg(uint32_t op);
+ void dbc_imm(uint32_t op);
+ void dbcd_imm(uint32_t op);
+ void callc_reg(uint32_t op);
+ void callc_imm(uint32_t op);
void trap(int trapnum);
- void trapc(UINT32 op);
- void retic_reg(UINT32 op);
- void retsc_reg(UINT32 op);
- void mpyaddf_0(UINT32 op);
- void mpyaddf_1(UINT32 op);
- void mpyaddf_2(UINT32 op);
- void mpyaddf_3(UINT32 op);
- void mpysubf_0(UINT32 op);
- void mpysubf_1(UINT32 op);
- void mpysubf_2(UINT32 op);
- void mpysubf_3(UINT32 op);
- void mpyaddi_0(UINT32 op);
- void mpyaddi_1(UINT32 op);
- void mpyaddi_2(UINT32 op);
- void mpyaddi_3(UINT32 op);
- void mpysubi_0(UINT32 op);
- void mpysubi_1(UINT32 op);
- void mpysubi_2(UINT32 op);
- void mpysubi_3(UINT32 op);
- void stfstf(UINT32 op);
- void stisti(UINT32 op);
- void ldfldf(UINT32 op);
- void ldildi(UINT32 op);
- void absfstf(UINT32 op);
- void absisti(UINT32 op);
- void addf3stf(UINT32 op);
- void addi3sti(UINT32 op);
- void and3sti(UINT32 op);
- void ash3sti(UINT32 op);
- void fixsti(UINT32 op);
- void floatstf(UINT32 op);
- void ldfstf(UINT32 op);
- void ldisti(UINT32 op);
- void lsh3sti(UINT32 op);
- void mpyf3stf(UINT32 op);
- void mpyi3sti(UINT32 op);
- void negfstf(UINT32 op);
- void negisti(UINT32 op);
- void notsti(UINT32 op);
- void or3sti(UINT32 op);
- void subf3stf(UINT32 op);
- void subi3sti(UINT32 op);
- void xor3sti(UINT32 op);
+ void trapc(uint32_t op);
+ void retic_reg(uint32_t op);
+ void retsc_reg(uint32_t op);
+ void mpyaddf_0(uint32_t op);
+ void mpyaddf_1(uint32_t op);
+ void mpyaddf_2(uint32_t op);
+ void mpyaddf_3(uint32_t op);
+ void mpysubf_0(uint32_t op);
+ void mpysubf_1(uint32_t op);
+ void mpysubf_2(uint32_t op);
+ void mpysubf_3(uint32_t op);
+ void mpyaddi_0(uint32_t op);
+ void mpyaddi_1(uint32_t op);
+ void mpyaddi_2(uint32_t op);
+ void mpyaddi_3(uint32_t op);
+ void mpysubi_0(uint32_t op);
+ void mpysubi_1(uint32_t op);
+ void mpysubi_2(uint32_t op);
+ void mpysubi_3(uint32_t op);
+ void stfstf(uint32_t op);
+ void stisti(uint32_t op);
+ void ldfldf(uint32_t op);
+ void ldildi(uint32_t op);
+ void absfstf(uint32_t op);
+ void absisti(uint32_t op);
+ void addf3stf(uint32_t op);
+ void addi3sti(uint32_t op);
+ void and3sti(uint32_t op);
+ void ash3sti(uint32_t op);
+ void fixsti(uint32_t op);
+ void floatstf(uint32_t op);
+ void ldfstf(uint32_t op);
+ void ldisti(uint32_t op);
+ void lsh3sti(uint32_t op);
+ void mpyf3stf(uint32_t op);
+ void mpyi3sti(uint32_t op);
+ void negfstf(uint32_t op);
+ void negisti(uint32_t op);
+ void notsti(uint32_t op);
+ void or3sti(uint32_t op);
+ void subf3stf(uint32_t op);
+ void subi3sti(uint32_t op);
+ void xor3sti(uint32_t op);
// configuration
const address_space_config m_program_config;
- UINT32 m_chip_type;
+ uint32_t m_chip_type;
union int_double
{
double d;
float f[2];
- UINT32 i[2];
+ uint32_t i[2];
};
// core registers
- UINT32 m_pc;
+ uint32_t m_pc;
tmsreg m_r[36];
- UINT32 m_bkmask;
+ uint32_t m_bkmask;
// internal stuff
- UINT16 m_irq_state;
+ uint16_t m_irq_state;
bool m_delayed;
bool m_irq_pending;
bool m_is_idling;
int m_icount;
- UINT32 m_iotemp;
+ uint32_t m_iotemp;
address_space * m_program;
direct_read_data * m_direct;
- UINT32 * m_bootrom;
+ uint32_t * m_bootrom;
bool m_mcbl_mode;
devcb_write8 m_xf0_cb;
@@ -776,13 +776,13 @@ protected:
devcb_write8 m_iack_cb;
// tables
- static void (tms3203x_device::*const s_tms32031ops[])(UINT32 op);
- static UINT32 (tms3203x_device::*const s_indirect_d[0x20])(UINT32, UINT8);
- static UINT32 (tms3203x_device::*const s_indirect_1[0x20])(UINT32, UINT8);
- static UINT32 (tms3203x_device::*const s_indirect_1_def[0x20])(UINT32, UINT8, UINT32 *&);
+ static void (tms3203x_device::*const s_tms32031ops[])(uint32_t op);
+ static uint32_t (tms3203x_device::*const s_indirect_d[0x20])(uint32_t, uint8_t);
+ static uint32_t (tms3203x_device::*const s_indirect_1[0x20])(uint32_t, uint8_t);
+ static uint32_t (tms3203x_device::*const s_indirect_1_def[0x20])(uint32_t, uint8_t, uint32_t *&);
#if (TMS_3203X_LOG_OPCODE_USAGE)
- UINT32 m_hits[0x200*4];
+ uint32_t m_hits[0x200*4];
#endif
};
@@ -793,7 +793,7 @@ class tms32031_device : public tms3203x_device
{
public:
// construction/destruction
- tms32031_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms32031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -803,7 +803,7 @@ class tms32032_device : public tms3203x_device
{
public:
// construction/destruction
- tms32032_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms32032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms32051/32051ops.hxx b/src/devices/cpu/tms32051/32051ops.hxx
index 83e769416a1..e74fa06f1be 100644
--- a/src/devices/cpu/tms32051/32051ops.hxx
+++ b/src/devices/cpu/tms32051/32051ops.hxx
@@ -1,23 +1,23 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde
// stack is LIFO and is 8 levels deep, there is no stackpointer on the real chip
-void tms32051_device::PUSH_STACK(UINT16 pc)
+void tms32051_device::PUSH_STACK(uint16_t pc)
{
m_pcstack_ptr = (m_pcstack_ptr - 1) & 7;
m_pcstack[m_pcstack_ptr] = pc;
}
-UINT16 tms32051_device::POP_STACK()
+uint16_t tms32051_device::POP_STACK()
{
- UINT16 pc = m_pcstack[m_pcstack_ptr];
+ uint16_t pc = m_pcstack[m_pcstack_ptr];
m_pcstack_ptr = (m_pcstack_ptr + 1) & 7;
m_pcstack[(m_pcstack_ptr + 7) & 7] = m_pcstack[(m_pcstack_ptr + 6) & 7];
return pc;
}
-INT32 tms32051_device::SUB(UINT32 a, UINT32 b, bool shift16)
+int32_t tms32051_device::SUB(uint32_t a, uint32_t b, bool shift16)
{
- UINT32 res = a - b;
+ uint32_t res = a - b;
if (shift16)
{
@@ -35,19 +35,19 @@ INT32 tms32051_device::SUB(UINT32 a, UINT32 b, bool shift16)
{
if (m_st0.ovm) // overflow saturation mode
{
- res = ((INT32)(res) < 0) ? 0x7fffffff : 0x80000000;
+ res = ((int32_t)(res) < 0) ? 0x7fffffff : 0x80000000;
}
// set OV, this is a sticky flag
m_st0.ov = 1;
}
- return (INT32)(res);
+ return (int32_t)(res);
}
-INT32 tms32051_device::ADD(UINT32 a, UINT32 b, bool shift16)
+int32_t tms32051_device::ADD(uint32_t a, uint32_t b, bool shift16)
{
- UINT32 res = a + b;
+ uint32_t res = a + b;
if (shift16)
{
@@ -65,14 +65,14 @@ INT32 tms32051_device::ADD(UINT32 a, UINT32 b, bool shift16)
{
if (m_st0.ovm) // overflow saturation mode
{
- res = ((INT32)(res) < 0) ? 0x7fffffff : 0x80000000;
+ res = ((int32_t)(res) < 0) ? 0x7fffffff : 0x80000000;
}
// set OV, this is a sticky flag
m_st0.ov = 1;
}
- return (INT32)(res);
+ return (int32_t)(res);
}
@@ -119,11 +119,11 @@ void tms32051_device::UPDATE_ARP(int nar)
m_st0.arp = nar;
}
-UINT16 tms32051_device::GET_ADDRESS()
+uint16_t tms32051_device::GET_ADDRESS()
{
if (m_op & 0x80) // Indirect Addressing
{
- UINT16 ea;
+ uint16_t ea;
int arp = m_st0.arp;
int nar = m_op & 0x7;
@@ -219,18 +219,18 @@ bool tms32051_device::GET_ZLVC_CONDITION(int zlvc, int zlvc_mask)
case 0x01: break; // MZ=0, ML=0, Z=0, L=1
case 0x02: break; // MZ=0, ML=0, Z=1, L=0
case 0x03: break; // MZ=0, ML=0, Z=1, L=1
- case 0x04: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=0, L=0 (GT)
- case 0x05: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=0, L=1 (LT)
- case 0x06: if ((INT32)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=1, L=0 (GT)
- case 0x07: if ((INT32)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=1, L=1 (LT)
- case 0x08: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=0 (NEQ)
- case 0x09: if ((INT32)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=1 (NEQ)
- case 0x0a: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=0 (EQ)
- case 0x0b: if ((INT32)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=1 (EQ)
- case 0x0c: if ((INT32)(m_acc) <= 0) return false; break; // MZ=1, ML=1, Z=0, L=0 (GT)
- case 0x0d: if ((INT32)(m_acc) >= 0) return false; break; // MZ=1, ML=1, Z=0, L=1 (LT)
- case 0x0e: if ((INT32)(m_acc) < 0) return false; break; // MZ=1, ML=1, Z=1, L=0 (GEQ)
- case 0x0f: if ((INT32)(m_acc) > 0) return false; break; // MZ=1, ML=1, Z=1, L=1 (LEQ)
+ case 0x04: if ((int32_t)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=0, L=0 (GT)
+ case 0x05: if ((int32_t)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=0, L=1 (LT)
+ case 0x06: if ((int32_t)(m_acc) <= 0) return false; break; // MZ=0, ML=1, Z=1, L=0 (GT)
+ case 0x07: if ((int32_t)(m_acc) >= 0) return false; break; // MZ=0, ML=1, Z=1, L=1 (LT)
+ case 0x08: if ((int32_t)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=0 (NEQ)
+ case 0x09: if ((int32_t)(m_acc) == 0) return false; break; // MZ=1, ML=0, Z=0, L=1 (NEQ)
+ case 0x0a: if ((int32_t)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=0 (EQ)
+ case 0x0b: if ((int32_t)(m_acc) != 0) return false; break; // MZ=1, ML=0, Z=1, L=1 (EQ)
+ case 0x0c: if ((int32_t)(m_acc) <= 0) return false; break; // MZ=1, ML=1, Z=0, L=0 (GT)
+ case 0x0d: if ((int32_t)(m_acc) >= 0) return false; break; // MZ=1, ML=1, Z=0, L=1 (LT)
+ case 0x0e: if ((int32_t)(m_acc) < 0) return false; break; // MZ=1, ML=1, Z=1, L=0 (GEQ)
+ case 0x0f: if ((int32_t)(m_acc) > 0) return false; break; // MZ=1, ML=1, Z=1, L=1 (LEQ)
}
return true;
}
@@ -255,7 +255,7 @@ bool tms32051_device::GET_TP_CONDITION(int tp)
return true;
}
-INT32 tms32051_device::PREG_PSCALER(INT32 preg)
+int32_t tms32051_device::PREG_PSCALER(int32_t preg)
{
switch (m_st1.pm & 3)
{
@@ -273,7 +273,7 @@ INT32 tms32051_device::PREG_PSCALER(INT32 preg)
}
case 3: // Right-shifted 6 bits, sign-extended, 6 LSBs lost
{
- return (INT32)(preg >> 6);
+ return (int32_t)(preg >> 6);
}
}
return 0;
@@ -300,18 +300,18 @@ void tms32051_device::op_adcb()
void tms32051_device::op_add_mem()
{
- INT32 d;
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ int32_t d;
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
int shift = (m_op >> 8) & 0xf;
if (m_st1.sxm)
{
- d = (INT32)(INT16)(data) << shift;
+ d = (int32_t)(int16_t)(data) << shift;
}
else
{
- d = (UINT32)(UINT16)(data) << shift;
+ d = (uint32_t)(uint16_t)(data) << shift;
}
m_acc = ADD(m_acc, d, false);
@@ -321,7 +321,7 @@ void tms32051_device::op_add_mem()
void tms32051_device::op_add_simm()
{
- UINT16 imm = m_op & 0xff;
+ uint16_t imm = m_op & 0xff;
m_acc = ADD(m_acc, imm, false);
@@ -330,17 +330,17 @@ void tms32051_device::op_add_simm()
void tms32051_device::op_add_limm()
{
- INT32 d;
- UINT16 imm = ROPCODE();
+ int32_t d;
+ uint16_t imm = ROPCODE();
int shift = m_op & 0xf;
if (m_st1.sxm)
{
- d = (INT32)(INT16)(imm) << shift;
+ d = (int32_t)(int16_t)(imm) << shift;
}
else
{
- d = (UINT32)(UINT16)(imm) << shift;
+ d = (uint32_t)(uint16_t)(imm) << shift;
}
m_acc = ADD(m_acc, d, false);
@@ -350,8 +350,8 @@ void tms32051_device::op_add_limm()
void tms32051_device::op_add_s16_mem()
{
- UINT16 ea = GET_ADDRESS();
- UINT32 data = DM_READ16(ea) << 16;
+ uint16_t ea = GET_ADDRESS();
+ uint32_t data = DM_READ16(ea) << 16;
m_acc = ADD(m_acc, data, true);
@@ -382,17 +382,17 @@ void tms32051_device::op_addt()
void tms32051_device::op_and_mem()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
- m_acc &= (UINT32)(data);
+ m_acc &= (uint32_t)(data);
CYCLES(1);
}
void tms32051_device::op_and_limm()
{
- UINT32 imm = ROPCODE();
+ uint32_t imm = ROPCODE();
int shift = m_op & 0xf;
m_acc &= imm << shift;
@@ -416,11 +416,11 @@ void tms32051_device::op_bsar()
if (m_st1.sxm)
{
- m_acc = (INT32)(m_acc) >> shift;
+ m_acc = (int32_t)(m_acc) >> shift;
}
else
{
- m_acc = (UINT32)(m_acc) >> shift;
+ m_acc = (uint32_t)(m_acc) >> shift;
}
CYCLES(1);
@@ -428,7 +428,7 @@ void tms32051_device::op_bsar()
void tms32051_device::op_cmpl()
{
- m_acc = ~(UINT32)(m_acc);
+ m_acc = ~(uint32_t)(m_acc);
CYCLES(1);
}
@@ -467,7 +467,7 @@ void tms32051_device::op_crlt()
void tms32051_device::op_exar()
{
- INT32 tmp = m_acc;
+ int32_t tmp = m_acc;
m_acc = m_accb;
m_accb = tmp;
@@ -484,16 +484,16 @@ void tms32051_device::op_lacb()
void tms32051_device::op_lacc_mem()
{
int shift = (m_op >> 8) & 0xf;
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
if (m_st1.sxm)
{
- m_acc = (INT32)(INT16)(data) << shift;
+ m_acc = (int32_t)(int16_t)(data) << shift;
}
else
{
- m_acc = (UINT32)(UINT16)(data) << shift;
+ m_acc = (uint32_t)(uint16_t)(data) << shift;
}
CYCLES(1);
@@ -501,16 +501,16 @@ void tms32051_device::op_lacc_mem()
void tms32051_device::op_lacc_limm()
{
- UINT16 imm = ROPCODE();
+ uint16_t imm = ROPCODE();
int shift = m_op & 0xf;
if (m_st1.sxm)
{
- m_acc = (INT32)(INT16)(imm) << shift;
+ m_acc = (int32_t)(int16_t)(imm) << shift;
}
else
{
- m_acc = (UINT32)(UINT16)(imm) << shift;
+ m_acc = (uint32_t)(uint16_t)(imm) << shift;
}
CYCLES(1);
@@ -518,7 +518,7 @@ void tms32051_device::op_lacc_limm()
void tms32051_device::op_lacc_s16_mem()
{
- UINT16 ea = GET_ADDRESS();
+ uint16_t ea = GET_ADDRESS();
m_acc = DM_READ16(ea) << 16;
CYCLES(1);
@@ -533,7 +533,7 @@ void tms32051_device::op_lacl_simm()
void tms32051_device::op_lacl_mem()
{
- UINT16 ea = GET_ADDRESS();
+ uint16_t ea = GET_ADDRESS();
m_acc = DM_READ16(ea) & 0xffff;
CYCLES(1);
@@ -546,7 +546,7 @@ void tms32051_device::op_lact()
void tms32051_device::op_lamm()
{
- UINT16 ea = GET_ADDRESS() & 0x7f;
+ uint16_t ea = GET_ADDRESS() & 0x7f;
m_acc = DM_READ16(ea) & 0xffff;
CYCLES(1);
@@ -554,7 +554,7 @@ void tms32051_device::op_lamm()
void tms32051_device::op_neg()
{
- if ((UINT32)(m_acc) == 0x80000000)
+ if ((uint32_t)(m_acc) == 0x80000000)
{
m_st0.ov = 1;
m_st1.c = 0;
@@ -562,7 +562,7 @@ void tms32051_device::op_neg()
}
else
{
- m_acc = 0 - (UINT32)(m_acc);
+ m_acc = 0 - (uint32_t)(m_acc);
m_st1.c = (m_acc == 0) ? 1 : 0;
}
@@ -576,17 +576,17 @@ void tms32051_device::op_norm()
void tms32051_device::op_or_mem()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
- m_acc |= (UINT32)(data);
+ m_acc |= (uint32_t)(data);
CYCLES(1);
}
void tms32051_device::op_or_limm()
{
- UINT32 imm = ROPCODE();
+ uint32_t imm = ROPCODE();
int shift = m_op & 0xf;
m_acc |= imm << shift;
@@ -613,9 +613,9 @@ void tms32051_device::op_rol()
void tms32051_device::op_rolb()
{
- UINT32 acc = m_acc;
- UINT32 accb = m_accb;
- UINT32 c = m_st1.c & 1;
+ uint32_t acc = m_acc;
+ uint32_t accb = m_accb;
+ uint32_t c = m_st1.c & 1;
m_acc = (acc << 1) | ((accb >> 31) & 1);
m_accb = (accb << 1) | c;
@@ -643,28 +643,28 @@ void tms32051_device::op_sacb()
void tms32051_device::op_sach()
{
- UINT16 ea = GET_ADDRESS();
+ uint16_t ea = GET_ADDRESS();
int shift = (m_op >> 8) & 0x7;
- DM_WRITE16(ea, (UINT16)((m_acc << shift) >> 16));
+ DM_WRITE16(ea, (uint16_t)((m_acc << shift) >> 16));
CYCLES(1);
}
void tms32051_device::op_sacl()
{
- UINT16 ea = GET_ADDRESS();
+ uint16_t ea = GET_ADDRESS();
int shift = (m_op >> 8) & 0x7;
- DM_WRITE16(ea, (UINT16)(m_acc << shift));
+ DM_WRITE16(ea, (uint16_t)(m_acc << shift));
CYCLES(1);
}
void tms32051_device::op_samm()
{
- UINT16 ea = GET_ADDRESS();
+ uint16_t ea = GET_ADDRESS();
ea &= 0x7f;
- DM_WRITE16(ea, (UINT16)(m_acc));
+ DM_WRITE16(ea, (uint16_t)(m_acc));
CYCLES(1);
}
@@ -678,11 +678,11 @@ void tms32051_device::op_satl()
int count = m_treg1 & 0xf;
if (m_st1.sxm)
{
- m_acc = (INT32)(m_acc) >> count;
+ m_acc = (int32_t)(m_acc) >> count;
}
else
{
- m_acc = (UINT32)(m_acc) >> count;
+ m_acc = (uint32_t)(m_acc) >> count;
}
CYCLES(1);
@@ -690,10 +690,10 @@ void tms32051_device::op_satl()
void tms32051_device::op_sbb()
{
- UINT32 res = m_acc - m_accb;
+ uint32_t res = m_acc - m_accb;
// C is cleared if borrow was generated
- m_st1.c = ((UINT32)(m_acc) < res) ? 0 : 1;
+ m_st1.c = ((uint32_t)(m_acc) < res) ? 0 : 1;
m_acc = res;
@@ -715,8 +715,8 @@ void tms32051_device::op_sfl()
void tms32051_device::op_sflb()
{
- UINT32 acc = m_acc;
- UINT32 accb = m_accb;
+ uint32_t acc = m_acc;
+ uint32_t accb = m_accb;
m_acc = (acc << 1) | ((accb >> 31) & 1);
m_accb = (accb << 1);
@@ -731,11 +731,11 @@ void tms32051_device::op_sfr()
if (m_st1.sxm)
{
- m_acc = (INT32)(m_acc) >> 1;
+ m_acc = (int32_t)(m_acc) >> 1;
}
else
{
- m_acc = (UINT32)(m_acc) >> 1;
+ m_acc = (uint32_t)(m_acc) >> 1;
}
CYCLES(1);
@@ -748,18 +748,18 @@ void tms32051_device::op_sfrb()
void tms32051_device::op_sub_mem()
{
- INT32 d;
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ int32_t d;
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
int shift = (m_op >> 8) & 0xf;
if (m_st1.sxm)
{
- d = (INT32)(INT16)(data) << shift;
+ d = (int32_t)(int16_t)(data) << shift;
}
else
{
- d = (UINT32)(UINT16)(data) << shift;
+ d = (uint32_t)(uint16_t)(data) << shift;
}
m_acc = SUB(m_acc, d, false);
@@ -774,7 +774,7 @@ void tms32051_device::op_sub_s16_mem()
void tms32051_device::op_sub_simm()
{
- UINT16 imm = m_op & 0xff;
+ uint16_t imm = m_op & 0xff;
m_acc = SUB(m_acc, imm, false);
@@ -783,17 +783,17 @@ void tms32051_device::op_sub_simm()
void tms32051_device::op_sub_limm()
{
- INT32 d;
- UINT16 imm = ROPCODE();
+ int32_t d;
+ uint16_t imm = ROPCODE();
int shift = m_op & 0xf;
if (m_st1.sxm)
{
- d = (INT32)(INT16)(imm) << shift;
+ d = (int32_t)(int16_t)(imm) << shift;
}
else
{
- d = (UINT32)(UINT16)(imm) << shift;
+ d = (uint32_t)(uint16_t)(imm) << shift;
}
m_acc = SUB(m_acc, d, false);
@@ -823,17 +823,17 @@ void tms32051_device::op_subt()
void tms32051_device::op_xor_mem()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
- m_acc ^= (UINT32)(data);
+ m_acc ^= (uint32_t)(data);
CYCLES(1);
}
void tms32051_device::op_xor_limm()
{
- UINT32 imm = ROPCODE();
+ uint32_t imm = ROPCODE();
int shift = m_op & 0xf;
m_acc ^= imm << shift;
@@ -868,7 +868,7 @@ void tms32051_device::op_zap()
void tms32051_device::op_adrk()
{
- UINT16 imm = m_op & 0xff;
+ uint16_t imm = m_op & 0xff;
UPDATE_AR(m_st0.arp, imm);
CYCLES(1);
@@ -920,8 +920,8 @@ void tms32051_device::op_cmpr()
void tms32051_device::op_lar_mem()
{
int arx = (m_op >> 8) & 0x7;
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
m_ar[arx] = data;
@@ -939,7 +939,7 @@ void tms32051_device::op_lar_simm()
void tms32051_device::op_lar_limm()
{
int arx = m_op & 0x7;
- UINT16 imm = ROPCODE();
+ uint16_t imm = ROPCODE();
m_ar[arx] = imm;
CYCLES(2);
@@ -969,8 +969,8 @@ void tms32051_device::op_mar()
void tms32051_device::op_sar()
{
int arx = (m_op >> 8) & 0x7;
- UINT16 ar = m_ar[arx];
- UINT16 ea = GET_ADDRESS();
+ uint16_t ar = m_ar[arx];
+ uint16_t ea = GET_ADDRESS();
DM_WRITE16(ea, ar);
CYCLES(1);
@@ -978,7 +978,7 @@ void tms32051_device::op_sar()
void tms32051_device::op_sbrk()
{
- UINT16 imm = m_op & 0xff;
+ uint16_t imm = m_op & 0xff;
UPDATE_AR(m_st0.arp, -imm);
CYCLES(1);
@@ -988,7 +988,7 @@ void tms32051_device::op_sbrk()
void tms32051_device::op_b()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
GET_ADDRESS(); // update AR/ARP
CHANGE_PC(pma);
@@ -997,14 +997,14 @@ void tms32051_device::op_b()
void tms32051_device::op_bacc()
{
- CHANGE_PC((UINT16)(m_acc));
+ CHANGE_PC((uint16_t)(m_acc));
CYCLES(4);
}
void tms32051_device::op_baccd()
{
- UINT16 pc = (UINT16)(m_acc);
+ uint16_t pc = (uint16_t)(m_acc);
delay_slot(m_pc);
CHANGE_PC(pc);
@@ -1014,7 +1014,7 @@ void tms32051_device::op_baccd()
void tms32051_device::op_banz()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
if (m_ar[m_st0.arp] != 0)
{
@@ -1036,7 +1036,7 @@ void tms32051_device::op_banzd()
void tms32051_device::op_bcnd()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) && GET_TP_CONDITION((m_op >> 8) & 0x3))
{
@@ -1055,7 +1055,7 @@ void tms32051_device::op_bcnd()
void tms32051_device::op_bcndd()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) && GET_TP_CONDITION((m_op >> 8) & 0x3))
{
@@ -1075,7 +1075,7 @@ void tms32051_device::op_bcndd()
void tms32051_device::op_bd()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
GET_ADDRESS(); // update AR/ARP
delay_slot(m_pc);
@@ -1094,7 +1094,7 @@ void tms32051_device::op_cala()
void tms32051_device::op_calad()
{
- UINT16 pma = m_acc;
+ uint16_t pma = m_acc;
PUSH_STACK(m_pc+2);
delay_slot(m_pc);
@@ -1105,7 +1105,7 @@ void tms32051_device::op_calad()
void tms32051_device::op_call()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
GET_ADDRESS(); // update AR/ARP
PUSH_STACK(m_pc);
@@ -1116,7 +1116,7 @@ void tms32051_device::op_call()
void tms32051_device::op_calld()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
GET_ADDRESS(); // update AR/ARP
PUSH_STACK(m_pc+2);
@@ -1128,7 +1128,7 @@ void tms32051_device::op_calld()
void tms32051_device::op_cc()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) && GET_TP_CONDITION((m_op >> 8) & 0x3))
{
@@ -1149,7 +1149,7 @@ void tms32051_device::op_cc()
void tms32051_device::op_ccd()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) && GET_TP_CONDITION((m_op >> 8) & 0x3))
{
@@ -1180,7 +1180,7 @@ void tms32051_device::op_retc()
{
if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) && GET_TP_CONDITION((m_op >> 8) & 0x3))
{
- UINT16 pc = POP_STACK();
+ uint16_t pc = POP_STACK();
CHANGE_PC(pc);
CYCLES(4);
}
@@ -1194,7 +1194,7 @@ void tms32051_device::op_retcd()
{
if (GET_ZLVC_CONDITION((m_op >> 4) & 0xf, m_op & 0xf) && GET_TP_CONDITION((m_op >> 8) & 0x3))
{
- UINT16 pc = POP_STACK();
+ uint16_t pc = POP_STACK();
delay_slot(m_pc);
CHANGE_PC(pc);
CYCLES(4);
@@ -1207,7 +1207,7 @@ void tms32051_device::op_retcd()
void tms32051_device::op_rete()
{
- UINT16 pc = POP_STACK();
+ uint16_t pc = POP_STACK();
CHANGE_PC(pc);
restore_interrupt_context();
@@ -1245,12 +1245,12 @@ void tms32051_device::op_xc()
void tms32051_device::op_bldd_slimm()
{
- UINT16 pfc = ROPCODE();
+ uint16_t pfc = ROPCODE();
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(pfc);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(pfc);
DM_WRITE16(ea, data);
pfc++;
CYCLES(2);
@@ -1261,12 +1261,12 @@ void tms32051_device::op_bldd_slimm()
void tms32051_device::op_bldd_dlimm()
{
- UINT16 pfc = ROPCODE();
+ uint16_t pfc = ROPCODE();
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
DM_WRITE16(pfc, data);
pfc++;
CYCLES(2);
@@ -1277,12 +1277,12 @@ void tms32051_device::op_bldd_dlimm()
void tms32051_device::op_bldd_sbmar()
{
- UINT16 pfc = m_bmar;
+ uint16_t pfc = m_bmar;
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(pfc);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(pfc);
DM_WRITE16(ea, data);
pfc++;
CYCLES(2);
@@ -1293,12 +1293,12 @@ void tms32051_device::op_bldd_sbmar()
void tms32051_device::op_bldd_dbmar()
{
- UINT16 pfc = m_bmar;
+ uint16_t pfc = m_bmar;
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
DM_WRITE16(pfc, data);
pfc++;
CYCLES(2);
@@ -1309,12 +1309,12 @@ void tms32051_device::op_bldd_dbmar()
void tms32051_device::op_bldp()
{
- UINT16 pfc = m_bmar;
+ uint16_t pfc = m_bmar;
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
PM_WRITE16(pfc, data);
pfc++;
CYCLES(1);
@@ -1330,12 +1330,12 @@ void tms32051_device::op_blpd_bmar()
void tms32051_device::op_blpd_imm()
{
- UINT16 pfc = ROPCODE();
+ uint16_t pfc = ROPCODE();
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = PM_READ16(pfc);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = PM_READ16(pfc);
DM_WRITE16(ea, data);
pfc++;
CYCLES(2);
@@ -1358,12 +1358,12 @@ void tms32051_device::op_in()
void tms32051_device::op_lmmr()
{
- UINT16 pfc = ROPCODE();
+ uint16_t pfc = ROPCODE();
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(pfc);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(pfc);
DM_WRITE16(ea & 0x7f, data);
pfc++;
CYCLES(2);
@@ -1374,10 +1374,10 @@ void tms32051_device::op_lmmr()
void tms32051_device::op_out()
{
- UINT16 port = ROPCODE();
- UINT16 ea = GET_ADDRESS();
+ uint16_t port = ROPCODE();
+ uint16_t ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t data = DM_READ16(ea);
m_io->write_word(port << 1, data);
// TODO: handle repeat
@@ -1386,12 +1386,12 @@ void tms32051_device::op_out()
void tms32051_device::op_smmr()
{
- UINT16 pfc = ROPCODE();
+ uint16_t pfc = ROPCODE();
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea & 0x7f);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea & 0x7f);
DM_WRITE16(pfc, data);
pfc++;
CYCLES(2);
@@ -1402,12 +1402,12 @@ void tms32051_device::op_smmr()
void tms32051_device::op_tblr()
{
- UINT16 pfc = (UINT16)(m_acc);
+ uint16_t pfc = (uint16_t)(m_acc);
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = PM_READ16(pfc);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = PM_READ16(pfc);
DM_WRITE16(ea, data);
pfc++;
CYCLES(2);
@@ -1418,12 +1418,12 @@ void tms32051_device::op_tblr()
void tms32051_device::op_tblw()
{
- UINT16 pfc = (UINT16)(m_acc);
+ uint16_t pfc = (uint16_t)(m_acc);
while (m_rptc > -1)
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
PM_WRITE16(pfc, data);
pfc++;
CYCLES(2);
@@ -1436,8 +1436,8 @@ void tms32051_device::op_tblw()
void tms32051_device::op_apl_dbmr()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
data &= m_dbmr;
@@ -1449,9 +1449,9 @@ void tms32051_device::op_apl_dbmr()
void tms32051_device::op_apl_imm()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 imm = ROPCODE();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t imm = ROPCODE();
+ uint16_t data = DM_READ16(ea);
data &= imm;
@@ -1468,9 +1468,9 @@ void tms32051_device::op_cpl_dbmr()
void tms32051_device::op_cpl_imm()
{
- UINT16 imm = ROPCODE();
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t imm = ROPCODE();
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
m_st1.tc = (data == imm) ? 1 : 0;
@@ -1479,8 +1479,8 @@ void tms32051_device::op_cpl_imm()
void tms32051_device::op_opl_dbmr()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
data |= m_dbmr;
m_st1.tc = (data == 0) ? 1 : 0;
@@ -1491,9 +1491,9 @@ void tms32051_device::op_opl_dbmr()
void tms32051_device::op_opl_imm()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 imm = ROPCODE();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t imm = ROPCODE();
+ uint16_t data = DM_READ16(ea);
data |= imm;
m_st1.tc = (data == 0) ? 1 : 0;
@@ -1504,8 +1504,8 @@ void tms32051_device::op_opl_imm()
void tms32051_device::op_splk()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 imm = ROPCODE();
+ uint16_t ea = GET_ADDRESS();
+ uint16_t imm = ROPCODE();
DM_WRITE16(ea, imm);
@@ -1524,7 +1524,7 @@ void tms32051_device::op_xpl_imm()
void tms32051_device::op_apac()
{
- INT32 spreg = PREG_PSCALER(m_preg);
+ int32_t spreg = PREG_PSCALER(m_preg);
m_acc = ADD(m_acc, spreg, false);
CYCLES(1);
@@ -1537,8 +1537,8 @@ void tms32051_device::op_lph()
void tms32051_device::op_lt()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
m_treg0 = data;
if (m_pmst.trm == 0)
@@ -1552,9 +1552,9 @@ void tms32051_device::op_lt()
void tms32051_device::op_lta()
{
- INT32 spreg;
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ int32_t spreg;
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
m_treg0 = data;
spreg = PREG_PSCALER(m_preg);
@@ -1605,10 +1605,10 @@ void tms32051_device::op_mads()
void tms32051_device::op_mpy_mem()
{
- UINT16 ea = GET_ADDRESS();
- INT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ int16_t data = DM_READ16(ea);
- m_preg = (INT32)(data) * (INT32)(INT16)(m_treg0);
+ m_preg = (int32_t)(data) * (int32_t)(int16_t)(m_treg0);
CYCLES(1);
}
@@ -1650,8 +1650,8 @@ void tms32051_device::op_spac()
void tms32051_device::op_sph()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 spreg = (UINT16)(PREG_PSCALER(m_preg) >> 16);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t spreg = (uint16_t)(PREG_PSCALER(m_preg) >> 16);
DM_WRITE16(ea, spreg);
CYCLES(1);
@@ -1659,8 +1659,8 @@ void tms32051_device::op_sph()
void tms32051_device::op_spl()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 spreg = (UINT16)(PREG_PSCALER(m_preg));
+ uint16_t ea = GET_ADDRESS();
+ uint16_t spreg = (uint16_t)(PREG_PSCALER(m_preg));
DM_WRITE16(ea, spreg);
CYCLES(1);
@@ -1690,8 +1690,8 @@ void tms32051_device::op_zpr()
void tms32051_device::op_bit()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
m_st1.tc = (data >> (~m_op >> 8 & 0xf)) & 1;
@@ -1700,8 +1700,8 @@ void tms32051_device::op_bit()
void tms32051_device::op_bitt()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
m_st1.tc = (data >> (~m_treg2 & 0xf)) & 1;
@@ -1804,8 +1804,8 @@ void tms32051_device::op_push()
void tms32051_device::op_rpt_mem()
{
- UINT16 ea = GET_ADDRESS();
- UINT16 data = DM_READ16(ea);
+ uint16_t ea = GET_ADDRESS();
+ uint16_t data = DM_READ16(ea);
m_rptc = data;
m_rpt_start = m_pc;
m_rpt_end = m_pc;
@@ -1815,7 +1815,7 @@ void tms32051_device::op_rpt_mem()
void tms32051_device::op_rpt_limm()
{
- m_rptc = (UINT16)ROPCODE();
+ m_rptc = (uint16_t)ROPCODE();
m_rpt_start = m_pc;
m_rpt_end = m_pc;
@@ -1833,7 +1833,7 @@ void tms32051_device::op_rpt_simm()
void tms32051_device::op_rptb()
{
- UINT16 pma = ROPCODE();
+ uint16_t pma = ROPCODE();
m_pmst.braf = 1;
m_pasr = m_pc;
m_paer = pma + 1;
diff --git a/src/devices/cpu/tms32051/dis32051.cpp b/src/devices/cpu/tms32051/dis32051.cpp
index ad4f2be1d04..e4e422d6868 100644
--- a/src/devices/cpu/tms32051/dis32051.cpp
+++ b/src/devices/cpu/tms32051/dis32051.cpp
@@ -55,7 +55,7 @@ static const char *const tp_condition_codes[4] =
static offs_t npc;
-static const UINT8 *rombase;
+static const uint8_t *rombase;
static offs_t pcbase;
static char *output;
@@ -69,9 +69,9 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
va_end(vl);
}
-static UINT16 FETCH(void)
+static uint16_t FETCH(void)
{
- UINT16 result = rombase[(npc - pcbase) * 2 + 0] | (rombase[(npc - pcbase) * 2 + 1] << 8);
+ uint16_t result = rombase[(npc - pcbase) * 2 + 0] | (rombase[(npc - pcbase) * 2 + 1] << 8);
npc++;
return result;
}
@@ -152,7 +152,7 @@ static void print_condition_codes(bool pp, int zl, int cv, int tp)
}
}
-static void dasm_group_be(UINT16 opcode)
+static void dasm_group_be(uint16_t opcode)
{
int subop = opcode & 0xff;
@@ -238,7 +238,7 @@ static void dasm_group_be(UINT16 opcode)
}
}
-static void dasm_group_bf(UINT16 opcode)
+static void dasm_group_bf(uint16_t opcode)
{
int subop = (opcode >> 4) & 0xf;
int shift = opcode & 0xf;
@@ -284,8 +284,8 @@ static void dasm_group_bf(UINT16 opcode)
CPU_DISASSEMBLE( tms32051 )
{
- UINT32 flags = 0;
- UINT16 opcode;
+ uint32_t flags = 0;
+ uint16_t opcode;
int baseop;
int address, addr_mode;
diff --git a/src/devices/cpu/tms32051/tms32051.cpp b/src/devices/cpu/tms32051/tms32051.cpp
index e5efade625f..9707b5d6270 100644
--- a/src/devices/cpu/tms32051/tms32051.cpp
+++ b/src/devices/cpu/tms32051/tms32051.cpp
@@ -69,7 +69,7 @@ static ADDRESS_MAP_START( tms32051_internal_data, AS_DATA, 16, tms32051_device )
ADDRESS_MAP_END
-tms32051_device::tms32051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32051_device::tms32051_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS32051, "TMS32051", tag, owner, clock, "tms32051", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1, ADDRESS_MAP_NAME(tms32051_internal_pgm))
, m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1, ADDRESS_MAP_NAME(tms32051_internal_data))
@@ -77,7 +77,7 @@ tms32051_device::tms32051_device(const machine_config &mconfig, const char *tag,
{
}
-tms32051_device::tms32051_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char* shortname, const char* source)
+tms32051_device::tms32051_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char* shortname, const char* source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1)
, m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1)
@@ -106,13 +106,13 @@ static ADDRESS_MAP_START( tms32053_internal_data, AS_DATA, 16, tms32053_device )
ADDRESS_MAP_END
-tms32053_device::tms32053_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32053_device::tms32053_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms32051_device(mconfig, TMS32053, "TMS32053", tag, owner, clock, "tms32053", __FILE__)
{
}
-offs_t tms32051_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms32051_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms32051 );
return CPU_DISASSEMBLE_NAME(tms32051)(this, buffer, pc, oprom, opram, options);
@@ -123,27 +123,27 @@ offs_t tms32051_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
#define ROPCODE() m_direct->read_word((m_pc++) << 1)
-void tms32051_device::CHANGE_PC(UINT16 new_pc)
+void tms32051_device::CHANGE_PC(uint16_t new_pc)
{
m_pc = new_pc;
}
-UINT16 tms32051_device::PM_READ16(UINT16 address)
+uint16_t tms32051_device::PM_READ16(uint16_t address)
{
return m_program->read_word(address << 1);
}
-void tms32051_device::PM_WRITE16(UINT16 address, UINT16 data)
+void tms32051_device::PM_WRITE16(uint16_t address, uint16_t data)
{
m_program->write_word(address << 1, data);
}
-UINT16 tms32051_device::DM_READ16(UINT16 address)
+uint16_t tms32051_device::DM_READ16(uint16_t address)
{
return m_data->read_word(address << 1);
}
-void tms32051_device::DM_WRITE16(UINT16 address, UINT16 data)
+void tms32051_device::DM_WRITE16(uint16_t address, uint16_t data)
{
m_data->write_word(address << 1, data);
}
@@ -161,7 +161,7 @@ void tms32051_device::op_group_bf()
(this->*s_opcode_table_bf[m_op & 0xff])();
}
-void tms32051_device::delay_slot(UINT16 startpc)
+void tms32051_device::delay_slot(uint16_t startpc)
{
m_op = ROPCODE();
(this->*s_opcode_table[m_op >> 8])();
@@ -281,7 +281,7 @@ void tms32051_device::device_reset()
m_pmst.ovly = 0;
int i;
- UINT16 src, dst, length;
+ uint16_t src, dst, length;
src = 0x7800;
dst = DM_READ16(src++);
@@ -292,7 +292,7 @@ void tms32051_device::device_reset()
/* TODO: if you soft reset on Taito JC it tries to do a 0x7802->0x9007 (0xff00) transfer. */
for (i=0; i < (length & 0x7ff); i++)
{
- UINT16 data = DM_READ16(src++);
+ uint16_t data = DM_READ16(src++);
PM_WRITE16(dst++, data);
}
}
@@ -368,7 +368,7 @@ void tms32051_device::execute_run()
{
while (m_icount > 0)
{
- UINT16 ppc;
+ uint16_t ppc;
if (m_idle)
{
@@ -444,7 +444,7 @@ READ16_MEMBER( tms32051_device::cpuregs_r )
case 0x07: // PMST
{
- UINT16 r = 0;
+ uint16_t r = 0;
r |= m_pmst.iptr << 11;
r |= m_pmst.avis << 7;
r |= m_pmst.ovly << 5;
@@ -482,7 +482,7 @@ READ16_MEMBER( tms32051_device::cpuregs_r )
case 0x26: // TCR
{
- UINT16 r = 0;
+ uint16_t r = 0;
r |= (m_timer.psc & 0xf) << 6;
r |= (m_timer.tddr & 0xf);
return r;
@@ -631,7 +631,7 @@ WRITE16_MEMBER( tms32051_device::cpuregs_w )
}
-bool tms32051_device::memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value)
+bool tms32051_device::memory_read(address_spacenum spacenum, offs_t offset, int size, uint64_t &value)
{
/* TODO: alignment if offset is odd */
if (spacenum == AS_PROGRAM)
diff --git a/src/devices/cpu/tms32051/tms32051.h b/src/devices/cpu/tms32051/tms32051.h
index ee83ed3c2ae..f025db4246f 100644
--- a/src/devices/cpu/tms32051/tms32051.h
+++ b/src/devices/cpu/tms32051/tms32051.h
@@ -21,35 +21,35 @@ enum
struct TMS32051_PMST
{
- UINT16 iptr;
- UINT16 avis;
- UINT16 ovly;
- UINT16 ram;
- UINT16 mpmc;
- UINT16 ndx;
- UINT16 trm;
- UINT16 braf;
+ uint16_t iptr;
+ uint16_t avis;
+ uint16_t ovly;
+ uint16_t ram;
+ uint16_t mpmc;
+ uint16_t ndx;
+ uint16_t trm;
+ uint16_t braf;
};
struct TMS32051_ST0
{
- UINT16 dp;
- UINT16 intm;
- UINT16 ovm;
- UINT16 ov;
- UINT16 arp;
+ uint16_t dp;
+ uint16_t intm;
+ uint16_t ovm;
+ uint16_t ov;
+ uint16_t arp;
};
struct TMS32051_ST1
{
- UINT16 arb;
- UINT16 cnf;
- UINT16 tc;
- UINT16 sxm;
- UINT16 c;
- UINT16 hm;
- UINT16 xf;
- UINT16 pm;
+ uint16_t arb;
+ uint16_t cnf;
+ uint16_t tc;
+ uint16_t sxm;
+ uint16_t c;
+ uint16_t hm;
+ uint16_t xf;
+ uint16_t pm;
};
@@ -57,8 +57,8 @@ class tms32051_device : public cpu_device
{
public:
// construction/destruction
- tms32051_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms32051_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ tms32051_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms32051_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
DECLARE_READ16_MEMBER( cpuregs_r );
DECLARE_WRITE16_MEMBER( cpuregs_w );
@@ -69,20 +69,20 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 5; }
- virtual UINT32 execute_input_lines() const override { return 6; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 5; }
+ virtual uint32_t execute_input_lines() const override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : nullptr ) ); }
- virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value) override;
+ virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, uint64_t &value) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
address_space_config m_data_config;
@@ -93,71 +93,71 @@ protected:
static const opcode_func s_opcode_table_be[256];
static const opcode_func s_opcode_table_bf[256];
- UINT16 m_pc;
- UINT16 m_op;
- INT32 m_acc;
- INT32 m_accb;
- INT32 m_preg;
- UINT16 m_treg0;
- UINT16 m_treg1;
- UINT16 m_treg2;
- UINT16 m_ar[8];
- INT32 m_rptc;
-
- UINT16 m_bmar;
- INT32 m_brcr;
- UINT16 m_paer;
- UINT16 m_pasr;
- UINT16 m_indx;
- UINT16 m_dbmr;
- UINT16 m_arcr;
+ uint16_t m_pc;
+ uint16_t m_op;
+ int32_t m_acc;
+ int32_t m_accb;
+ int32_t m_preg;
+ uint16_t m_treg0;
+ uint16_t m_treg1;
+ uint16_t m_treg2;
+ uint16_t m_ar[8];
+ int32_t m_rptc;
+
+ uint16_t m_bmar;
+ int32_t m_brcr;
+ uint16_t m_paer;
+ uint16_t m_pasr;
+ uint16_t m_indx;
+ uint16_t m_dbmr;
+ uint16_t m_arcr;
TMS32051_ST0 m_st0;
TMS32051_ST1 m_st1;
TMS32051_PMST m_pmst;
- UINT16 m_ifr;
- UINT16 m_imr;
+ uint16_t m_ifr;
+ uint16_t m_imr;
- UINT16 m_pcstack[8];
+ uint16_t m_pcstack[8];
int m_pcstack_ptr;
- UINT16 m_rpt_start, m_rpt_end;
+ uint16_t m_rpt_start, m_rpt_end;
- UINT16 m_cbcr;
- UINT16 m_cbsr1;
- UINT16 m_cber1;
- UINT16 m_cbsr2;
- UINT16 m_cber2;
+ uint16_t m_cbcr;
+ uint16_t m_cbsr1;
+ uint16_t m_cber1;
+ uint16_t m_cbsr2;
+ uint16_t m_cber2;
struct
{
int tddr;
int psc;
- UINT16 tim;
- UINT16 prd;
+ uint16_t tim;
+ uint16_t prd;
} m_timer;
struct
{
- UINT16 drr;
- UINT16 dxr;
- UINT16 spc;
+ uint16_t drr;
+ uint16_t dxr;
+ uint16_t spc;
} m_serial;
struct
{
- INT32 acc;
- INT32 accb;
- UINT16 arcr;
- UINT16 indx;
+ int32_t acc;
+ int32_t accb;
+ uint16_t arcr;
+ uint16_t indx;
TMS32051_PMST pmst;
- INT32 preg;
+ int32_t preg;
TMS32051_ST0 st0;
TMS32051_ST1 st1;
- INT32 treg0;
- INT32 treg1;
- INT32 treg2;
+ int32_t treg0;
+ int32_t treg1;
+ int32_t treg2;
} m_shadow;
address_space *m_program;
@@ -168,21 +168,21 @@ protected:
bool m_idle;
- inline void CHANGE_PC(UINT16 new_pc);
- inline UINT16 PM_READ16(UINT16 address);
- inline void PM_WRITE16(UINT16 address, UINT16 data);
- inline UINT16 DM_READ16(UINT16 address);
- inline void DM_WRITE16(UINT16 address, UINT16 data);
- inline void PUSH_STACK(UINT16 pc);
- inline UINT16 POP_STACK();
- inline INT32 SUB(UINT32 a, UINT32 b, bool shift16);
- inline INT32 ADD(UINT32 a, UINT32 b, bool shift16);
+ inline void CHANGE_PC(uint16_t new_pc);
+ inline uint16_t PM_READ16(uint16_t address);
+ inline void PM_WRITE16(uint16_t address, uint16_t data);
+ inline uint16_t DM_READ16(uint16_t address);
+ inline void DM_WRITE16(uint16_t address, uint16_t data);
+ inline void PUSH_STACK(uint16_t pc);
+ inline uint16_t POP_STACK();
+ inline int32_t SUB(uint32_t a, uint32_t b, bool shift16);
+ inline int32_t ADD(uint32_t a, uint32_t b, bool shift16);
inline void UPDATE_AR(int ar, int step);
inline void UPDATE_ARP(int nar);
- UINT16 GET_ADDRESS();
+ uint16_t GET_ADDRESS();
inline bool GET_ZLVC_CONDITION(int zlvc, int zlvc_mask);
inline bool GET_TP_CONDITION(int tp);
- inline INT32 PREG_PSCALER(INT32 preg);
+ inline int32_t PREG_PSCALER(int32_t preg);
void op_invalid();
void op_abs();
void op_adcb();
@@ -362,7 +362,7 @@ protected:
void op_sst_st1();
void op_group_be();
void op_group_bf();
- void delay_slot(UINT16 startpc);
+ void delay_slot(uint16_t startpc);
void check_interrupts();
void save_interrupt_context();
void restore_interrupt_context();
@@ -373,7 +373,7 @@ class tms32053_device : public tms32051_device
{
public:
// construction/destruction
- tms32053_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms32053_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_config_complete() override;
diff --git a/src/devices/cpu/tms32082/dis_mp.cpp b/src/devices/cpu/tms32082/dis_mp.cpp
index e7083901fc7..cdfad55fdbd 100644
--- a/src/devices/cpu/tms32082/dis_mp.cpp
+++ b/src/devices/cpu/tms32082/dis_mp.cpp
@@ -5,7 +5,7 @@
#include "emu.h"
-#define SIMM15(v) (INT32)((v & 0x4000) ? (v | 0xffffe000) : (v))
+#define SIMM15(v) (int32_t)((v & 0x4000) ? (v | 0xffffe000) : (v))
#define UIMM15(v) (v)
static const char *BCND_CONDITION[32] =
@@ -50,7 +50,7 @@ static const char *FLOATOP_ROUND[4] =
};
static char *output;
-static const UINT8 *opdata;
+static const uint8_t *opdata;
static int opbytes;
static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
@@ -62,15 +62,15 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
va_end(vl);
}
-static UINT32 fetch(void)
+static uint32_t fetch(void)
{
- UINT32 d = ((UINT32)(opdata[0]) << 24) | ((UINT32)(opdata[1]) << 16) | ((UINT32)(opdata[2]) << 8) | opdata[3];
+ uint32_t d = ((uint32_t)(opdata[0]) << 24) | ((uint32_t)(opdata[1]) << 16) | ((uint32_t)(opdata[2]) << 8) | opdata[3];
opdata += 4;
opbytes += 4;
return d;
}
-static char* get_creg_name(UINT32 reg)
+static char* get_creg_name(uint32_t reg)
{
static char buffer[64];
@@ -108,7 +108,7 @@ static char* get_creg_name(UINT32 reg)
return buffer;
}
-static char* format_vector_op(UINT32 op, UINT32 imm32)
+static char* format_vector_op(uint32_t op, uint32_t imm32)
{
static char buffer[256];
static char dest[64];
@@ -201,14 +201,14 @@ static char* format_vector_op(UINT32 op, UINT32 imm32)
return buffer;
}
-static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
+static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const uint8_t *oprom)
{
output = buffer;
opdata = oprom;
opbytes = 0;
- UINT32 flags = 0;
+ uint32_t flags = 0;
- UINT32 op = fetch();
+ uint32_t op = fetch();
int rd = (op >> 27) & 0x1f;
int link = rd;
@@ -217,7 +217,7 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
int endmask = (op >> 5) & 0x1f;
int rotate = (op & 0x1f);
int src1 = rotate;
- UINT32 uimm15 = op & 0x7fff;
+ uint32_t uimm15 = op & 0x7fff;
switch ((op >> 20) & 3)
{
@@ -317,7 +317,7 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom)
{
int subop = (op >> 12) & 0xff;
- UINT32 imm32 = 0;
+ uint32_t imm32 = 0;
if (op & (1 << 12)) // fetch 32-bit immediate if needed
imm32 = fetch();
diff --git a/src/devices/cpu/tms32082/dis_pp.cpp b/src/devices/cpu/tms32082/dis_pp.cpp
index 8bc6af719a9..6aa7f5b2949 100644
--- a/src/devices/cpu/tms32082/dis_pp.cpp
+++ b/src/devices/cpu/tms32082/dis_pp.cpp
@@ -83,7 +83,7 @@ static char *format_address_mode(int mode, int areg, int s, int limx)
return buffer;
}
-static void format_transfer(UINT64 op)
+static void format_transfer(uint64_t op)
{
char buffer[128];
char *b = buffer;
@@ -258,7 +258,7 @@ static void format_transfer(UINT64 op)
int reg = (bank << 3) | d;
- UINT16 offset;
+ uint16_t offset;
if (s)
{
offset = op & 0x7fff;
@@ -418,13 +418,13 @@ static void format_alu_op(int aluop, int a, const char *dst_text, const char *a_
}
}
-static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom)
+static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const uint8_t *oprom)
{
output = buffer;
- UINT32 flags = 0;
+ uint32_t flags = 0;
- UINT64 op = ((UINT64)(oprom[0]) << 56) | ((UINT64)(oprom[1]) << 48) | ((UINT64)(oprom[2]) << 40) | ((UINT64)(oprom[3]) << 32) |
- ((UINT64)(oprom[4]) << 24) | ((UINT64)(oprom[5]) << 16) | ((UINT64)(oprom[6]) << 8) | ((UINT64)(oprom[7]));
+ uint64_t op = ((uint64_t)(oprom[0]) << 56) | ((uint64_t)(oprom[1]) << 48) | ((uint64_t)(oprom[2]) << 40) | ((uint64_t)(oprom[3]) << 32) |
+ ((uint64_t)(oprom[4]) << 24) | ((uint64_t)(oprom[5]) << 16) | ((uint64_t)(oprom[6]) << 8) | ((uint64_t)(oprom[7]));
switch (op >> 60)
{
@@ -447,7 +447,7 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom)
if ((op & U64(0xfaa8100000000000)) == U64(0x8800000000000000))
{
int operation = (op >> 39) & 0x1f;
- UINT64 parallel_xfer = (op & U64(0x0000007fffffffff));
+ uint64_t parallel_xfer = (op & U64(0x0000007fffffffff));
switch (operation)
{
@@ -471,7 +471,7 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom)
case 0:
case 1: // Base set ALU (5-bit immediate)
{
- UINT64 parallel_xfer = (op & U64(0x0000007fffffffff));
+ uint64_t parallel_xfer = (op & U64(0x0000007fffffffff));
int dst = (op >> 48) & 7;
int src1 = (op >> 45) & 7;
@@ -550,7 +550,7 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom)
case 2: // Base set ALU (reg src2)
{
- UINT64 parallel_xfer = (op & U64(0x0000007fffffffff));
+ uint64_t parallel_xfer = (op & U64(0x0000007fffffffff));
int dst = (op >> 48) & 7;
int src1 = (op >> 45) & 7;
@@ -638,7 +638,7 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom)
int cl = (op >> 60) & 7;
int aluop = (op >> 51) & 0xff;
int a = (op >> 59) & 1;
- UINT32 imm32 = (UINT32)(op);
+ uint32_t imm32 = (uint32_t)(op);
int dreg = dst | (dstbank << 3);
int s1reg = src1 | (s1bank << 3);
@@ -700,7 +700,7 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom)
}
default:
- print("??? (%02X)", (UINT32)(op >> 60));
+ print("??? (%02X)", (uint32_t)(op >> 60));
break;
}
diff --git a/src/devices/cpu/tms32082/mp_ops.cpp b/src/devices/cpu/tms32082/mp_ops.cpp
index 1cce61f6a8d..0411e6996b6 100644
--- a/src/devices/cpu/tms32082/mp_ops.cpp
+++ b/src/devices/cpu/tms32082/mp_ops.cpp
@@ -27,75 +27,75 @@
#define CMP_OVERFLOW32(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x80000000) ? 1 : 0)
#define CMP_OVERFLOW16(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x8000) ? 1 : 0)
#define CMP_OVERFLOW8(r, s, d) ((((d) ^ (s)) & ((d) ^ (r)) & 0x80) ? 1 : 0)
-#define CARRY32(x) (((x) & (((UINT64)1) << 32)) ? 1 : 0)
+#define CARRY32(x) (((x) & (((uint64_t)1) << 32)) ? 1 : 0)
#define CARRY16(x) (((x) & 0x10000) ? 1 : 0)
#define CARRY8(x) (((x) & 0x100) ? 1 : 0)
#define SIGN32(x) (((x) & 0x80000000) ? 1 : 0)
#define SIGN16(x) (((x) & 0x8000) ? 1 : 0)
#define SIGN8(x) (((x) & 0x80) ? 1 : 0)
-#define SIGN_EXTEND(x, r) ((x) | (((x) & (0x80000000 >> r)) ? ((INT32)(0x80000000) >> r) : 0))
+#define SIGN_EXTEND(x, r) ((x) | (((x) & (0x80000000 >> r)) ? ((int32_t)(0x80000000) >> r) : 0))
-bool tms32082_mp_device::test_condition(int condition, UINT32 value)
+bool tms32082_mp_device::test_condition(int condition, uint32_t value)
{
switch (condition)
{
case 0x00: return false; // never, byte
- case 0x01: return (INT8)(value) > 0; // greater than zero, byte
- case 0x02: return (INT8)(value) == 0; // equals zero, byte
- case 0x03: return (INT8)(value) >= 0; // greater than or equal to zero, byte
- case 0x04: return (INT8)(value) < 0; // less than zero, byte
- case 0x05: return (INT8)(value) != 0; // not equal to zero, byte
- case 0x06: return (INT8)(value) <= 0; // less than or equal to zero, byte
+ case 0x01: return (int8_t)(value) > 0; // greater than zero, byte
+ case 0x02: return (int8_t)(value) == 0; // equals zero, byte
+ case 0x03: return (int8_t)(value) >= 0; // greater than or equal to zero, byte
+ case 0x04: return (int8_t)(value) < 0; // less than zero, byte
+ case 0x05: return (int8_t)(value) != 0; // not equal to zero, byte
+ case 0x06: return (int8_t)(value) <= 0; // less than or equal to zero, byte
case 0x07: return true; // always, byte
case 0x08: return false; // never, word
- case 0x09: return (INT16)(value) > 0; // greater than zero, word
- case 0x0a: return (INT16)(value) == 0; // equals zero, word
- case 0x0b: return (INT16)(value) >= 0; // greater than or equal to zero, word
- case 0x0c: return (INT16)(value) < 0; // less than zero, word
- case 0x0d: return (INT16)(value) != 0; // not equal to zero, word
- case 0x0e: return (INT16)(value) <= 0; // less than or equal to zero, word
+ case 0x09: return (int16_t)(value) > 0; // greater than zero, word
+ case 0x0a: return (int16_t)(value) == 0; // equals zero, word
+ case 0x0b: return (int16_t)(value) >= 0; // greater than or equal to zero, word
+ case 0x0c: return (int16_t)(value) < 0; // less than zero, word
+ case 0x0d: return (int16_t)(value) != 0; // not equal to zero, word
+ case 0x0e: return (int16_t)(value) <= 0; // less than or equal to zero, word
case 0x0f: return true; // always, word
case 0x10: return false; // never, dword
- case 0x11: return (INT32)(value) > 0; // greater than zero, dword
- case 0x12: return (INT32)(value) == 0; // equals zero, dword
- case 0x13: return (INT32)(value) >= 0; // greater than or equal to zero, dword
- case 0x14: return (INT32)(value) < 0; // less than zero, dword
- case 0x15: return (INT32)(value) != 0; // not equal to zero, dword
- case 0x16: return (INT32)(value) <= 0; // less than or equal to zero, dword
+ case 0x11: return (int32_t)(value) > 0; // greater than zero, dword
+ case 0x12: return (int32_t)(value) == 0; // equals zero, dword
+ case 0x13: return (int32_t)(value) >= 0; // greater than or equal to zero, dword
+ case 0x14: return (int32_t)(value) < 0; // less than zero, dword
+ case 0x15: return (int32_t)(value) != 0; // not equal to zero, dword
+ case 0x16: return (int32_t)(value) <= 0; // less than or equal to zero, dword
case 0x17: return true; // always, dword
default: return false; // reserved
}
}
-UINT32 tms32082_mp_device::calculate_cmp(UINT32 src1, UINT32 src2)
+uint32_t tms32082_mp_device::calculate_cmp(uint32_t src1, uint32_t src2)
{
- UINT16 src1_16 = (UINT16)(src1);
- UINT8 src1_8 = (UINT8)(src1);
- UINT16 src2_16 = (UINT16)(src2);
- UINT8 src2_8 = (UINT8)(src2);
+ uint16_t src1_16 = (uint16_t)(src1);
+ uint8_t src1_8 = (uint8_t)(src1);
+ uint16_t src2_16 = (uint16_t)(src2);
+ uint8_t src2_8 = (uint8_t)(src2);
- UINT64 res32 = (UINT64)src1 - (UINT64)src2;
+ uint64_t res32 = (uint64_t)src1 - (uint64_t)src2;
int z32 = (res32 == 0) ? 1 : 0;
int n32 = SIGN32(res32);
int v32 = CMP_OVERFLOW32(res32, src2, src1);
int c32 = CARRY32(res32);
- UINT32 res16 = (UINT32)src1_16 - (UINT32)src2_16;
+ uint32_t res16 = (uint32_t)src1_16 - (uint32_t)src2_16;
int z16 = (res16 == 0) ? 1 : 0;
int n16 = SIGN16(res16);
int v16 = CMP_OVERFLOW16(res16, src2_16, src1_16);
int c16 = CARRY16(res16);
- UINT16 res8 = (UINT16)src1_8 - (UINT16)src2_8;
+ uint16_t res8 = (uint16_t)src1_8 - (uint16_t)src2_8;
int z8 = (res8 == 0) ? 1 : 0;
int n8 = SIGN8(res8);
int v8 = CMP_OVERFLOW8(res8, src2_8, src1_8);
int c8 = CARRY8(res8);
- UINT32 flags = 0;
+ uint32_t flags = 0;
// 32-bits (bits 20-29)
flags |= ((~c32) & 1) << 29; // higher than or same (C)
flags |= ((c32) & 1) << 28; // lower than (~C)
@@ -148,7 +148,7 @@ void tms32082_mp_device::vector_loadstore()
}
case 0x03: // vst.d
{
- UINT64 data = m_fpair[rd >> 1];
+ uint64_t data = m_fpair[rd >> 1];
m_program->write_qword(m_outp, data);
m_outp += 8;
break;
@@ -189,7 +189,7 @@ void tms32082_mp_device::execute_short_imm()
{
case 0x02: // cmnd
{
- UINT32 data = OP_UIMM15();
+ uint32_t data = OP_UIMM15();
processor_command(data);
break;
@@ -198,9 +198,9 @@ void tms32082_mp_device::execute_short_imm()
case 0x04: // rdcr
{
int rd = OP_RD();
- UINT32 imm = OP_UIMM15();
+ uint32_t imm = OP_UIMM15();
- UINT32 r = read_creg(imm);
+ uint32_t r = read_creg(imm);
if (rd)
m_reg[rd] = r;
@@ -211,9 +211,9 @@ void tms32082_mp_device::execute_short_imm()
{
int rd = OP_RD();
int rs = OP_RS();
- UINT32 imm = OP_UIMM15();
+ uint32_t imm = OP_UIMM15();
- UINT32 r = read_creg(imm);
+ uint32_t r = read_creg(imm);
if (rd)
m_reg[rd] = r;
@@ -231,7 +231,7 @@ void tms32082_mp_device::execute_short_imm()
}
else
{
- UINT32 data = read_creg(cr);
+ uint32_t data = read_creg(cr);
m_fetchpc = data & ~3;
m_ie = (m_ie & ~1) | (data & 1); // global interrupt mask from creg
@@ -246,15 +246,15 @@ void tms32082_mp_device::execute_short_imm()
int inv = (m_ir & (1 << 11));
int rot = OP_ROTATE();
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = SHIFT_MASK[end ? end : 32];
+ uint32_t endmask = SHIFT_MASK[end ? end : 32];
if (inv) endmask = ~endmask;
- UINT32 compmask = endmask; // shiftmask == 0xffffffff
+ uint32_t compmask = endmask; // shiftmask == 0xffffffff
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
@@ -275,15 +275,15 @@ void tms32082_mp_device::execute_short_imm()
int inv = (m_ir & (1 << 11));
int rot = OP_ROTATE();
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = SHIFT_MASK[end ? end : 32];
+ uint32_t endmask = SHIFT_MASK[end ? end : 32];
if (inv) endmask = ~endmask;
- UINT32 compmask = endmask; // shiftmask == 0xffffffff
+ uint32_t compmask = endmask; // shiftmask == 0xffffffff
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
@@ -306,17 +306,17 @@ void tms32082_mp_device::execute_short_imm()
int inv = (m_ir & (1 << 11));
int rot = OP_ROTATE();
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = SHIFT_MASK[end ? end : 32];
+ uint32_t endmask = SHIFT_MASK[end ? end : 32];
if (inv) endmask = ~endmask;
int shift = r ? 32-rot : rot;
- UINT32 shiftmask = SHIFT_MASK[shift ? shift : 32];
- UINT32 compmask = endmask & shiftmask;
+ uint32_t shiftmask = SHIFT_MASK[shift ? shift : 32];
+ uint32_t compmask = endmask & shiftmask;
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
@@ -337,16 +337,16 @@ void tms32082_mp_device::execute_short_imm()
int inv = (m_ir & (1 << 11));
int rot = OP_ROTATE();
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = SHIFT_MASK[end ? end : 32];
+ uint32_t endmask = SHIFT_MASK[end ? end : 32];
if (inv) endmask = ~endmask;
- UINT32 shiftmask = SHIFT_MASK[r ? 32-rot : rot];
- UINT32 compmask = endmask & shiftmask;
+ uint32_t shiftmask = SHIFT_MASK[r ? 32-rot : rot];
+ uint32_t compmask = endmask & shiftmask;
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = (ROTATE_R(source, rot) & compmask) | (m_reg[rd] & ~compmask);
@@ -367,17 +367,17 @@ void tms32082_mp_device::execute_short_imm()
int inv = (m_ir & (1 << 11));
int rot = OP_ROTATE();
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = SHIFT_MASK[end ? end : 32];
+ uint32_t endmask = SHIFT_MASK[end ? end : 32];
if (inv) endmask = ~endmask;
int shift = r ? 32-rot : rot;
- UINT32 shiftmask = SHIFT_MASK[shift ? shift : 32];
- UINT32 compmask = endmask & shiftmask;
+ uint32_t shiftmask = SHIFT_MASK[shift ? shift : 32];
+ uint32_t compmask = endmask & shiftmask;
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
@@ -400,16 +400,16 @@ void tms32082_mp_device::execute_short_imm()
int inv = (m_ir & (1 << 11));
int rot = OP_ROTATE();
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = SHIFT_MASK[end ? end : 32];
+ uint32_t endmask = SHIFT_MASK[end ? end : 32];
if (inv) endmask = ~endmask;
- UINT32 shiftmask = SHIFT_MASK[r ? 32-rot : rot];
- UINT32 compmask = endmask & ~shiftmask;
+ uint32_t shiftmask = SHIFT_MASK[r ? 32-rot : rot];
+ uint32_t compmask = endmask & ~shiftmask;
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
@@ -430,16 +430,16 @@ void tms32082_mp_device::execute_short_imm()
int inv = (m_ir & (1 << 11));
int rot = OP_ROTATE();
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = SHIFT_MASK[end ? end : 32];
+ uint32_t endmask = SHIFT_MASK[end ? end : 32];
if (inv) endmask = ~endmask;
- UINT32 shiftmask = SHIFT_MASK[r ? 32-rot : rot];
- UINT32 compmask = endmask & ~shiftmask;
+ uint32_t shiftmask = SHIFT_MASK[r ? 32-rot : rot];
+ uint32_t compmask = endmask & ~shiftmask;
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = (ROTATE_R(source, rot) & compmask) | (m_reg[rd] & ~compmask);
@@ -458,7 +458,7 @@ void tms32082_mp_device::execute_short_imm()
{
int rd = OP_RD();
int rs = OP_RS();
- UINT32 imm = OP_UIMM15();
+ uint32_t imm = OP_UIMM15();
if (rd)
m_reg[rd] = m_reg[rs] & imm;
@@ -469,7 +469,7 @@ void tms32082_mp_device::execute_short_imm()
{
int rd = OP_RD();
int rs = OP_RS();
- UINT32 imm = OP_UIMM15();
+ uint32_t imm = OP_UIMM15();
if (rd)
m_reg[rd] = ~m_reg[rs] & imm;
@@ -480,7 +480,7 @@ void tms32082_mp_device::execute_short_imm()
{
int rd = OP_RD();
int rs = OP_RS();
- UINT32 imm = OP_UIMM15();
+ uint32_t imm = OP_UIMM15();
if (rd)
m_reg[rd] = m_reg[rs] & ~imm;
@@ -491,7 +491,7 @@ void tms32082_mp_device::execute_short_imm()
{
int rd = OP_RD();
int rs = OP_RS();
- UINT32 imm = OP_UIMM15();
+ uint32_t imm = OP_UIMM15();
if (rd)
m_reg[rd] = m_reg[rs] | imm;
@@ -502,7 +502,7 @@ void tms32082_mp_device::execute_short_imm()
{
int rd = OP_RD();
int rs = OP_RS();
- UINT32 imm = OP_UIMM15();
+ uint32_t imm = OP_UIMM15();
if (rd)
m_reg[rd] = m_reg[rs] | ~imm;
@@ -515,10 +515,10 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
- UINT32 data = (UINT8)m_program->read_byte(address);
+ uint32_t address = m_reg[base] + offset;
+ uint32_t data = (uint8_t)m_program->read_byte(address);
if (data & 0x80) data |= 0xffffff00;
if (rd)
m_reg[rd] = data;
@@ -534,10 +534,10 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
- UINT32 data = (UINT16)m_program->read_word(address);
+ uint32_t address = m_reg[base] + offset;
+ uint32_t data = (uint16_t)m_program->read_word(address);
if (data & 0x8000) data |= 0xffff0000;
if (rd)
m_reg[rd] = data;
@@ -553,10 +553,10 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
- UINT32 data = m_program->read_dword(address);
+ uint32_t address = m_reg[base] + offset;
+ uint32_t data = m_program->read_dword(address);
if (rd)
m_reg[rd] = data;
@@ -571,11 +571,11 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
- UINT32 data1 = m_program->read_dword(address);
- UINT32 data2 = m_program->read_dword(address+4);
+ uint32_t address = m_reg[base] + offset;
+ uint32_t data1 = m_program->read_dword(address);
+ uint32_t data2 = m_program->read_dword(address+4);
if (rd)
{
m_reg[(rd & ~1)+1] = data1;
@@ -593,10 +593,10 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
- UINT32 data = (UINT8)(m_program->read_byte(address));
+ uint32_t address = m_reg[base] + offset;
+ uint32_t data = (uint8_t)(m_program->read_byte(address));
if (rd)
m_reg[rd] = data;
@@ -611,10 +611,10 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
- UINT32 data = (UINT16)(m_program->read_word(address));
+ uint32_t address = m_reg[base] + offset;
+ uint32_t data = (uint16_t)(m_program->read_word(address));
if (rd)
m_reg[rd] = data;
@@ -629,11 +629,11 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
+ uint32_t address = m_reg[base] + offset;
- m_program->write_byte(address, (UINT8)(m_reg[rd]));
+ m_program->write_byte(address, (uint8_t)(m_reg[rd]));
if (m && base)
m_reg[base] = address;
@@ -646,11 +646,11 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
+ uint32_t address = m_reg[base] + offset;
- m_program->write_word(address, (UINT16)(m_reg[rd]));
+ m_program->write_word(address, (uint16_t)(m_reg[rd]));
if (m && base)
m_reg[base] = address;
@@ -663,9 +663,9 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
+ uint32_t address = m_reg[base] + offset;
m_program->write_dword(address, m_reg[rd]);
@@ -680,9 +680,9 @@ void tms32082_mp_device::execute_short_imm()
int rd = OP_RD();
int base = OP_BASE();
int m = m_ir & (1 << 17);
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
- UINT32 address = m_reg[base] + offset;
+ uint32_t address = m_reg[base] + offset;
m_program->write_dword(address+0, m_reg[(rd & ~1) + 1]);
m_program->write_dword(address+4, m_reg[rd & ~1]);
@@ -696,7 +696,7 @@ void tms32082_mp_device::execute_short_imm()
{
int link = OP_LINK();
int base = OP_BASE();
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
if (link)
m_reg[link] = m_fetchpc;
@@ -708,12 +708,12 @@ void tms32082_mp_device::execute_short_imm()
case 0x48: // bbz
{
int bitnum = OP_BITNUM() ^ 0x1f;
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
int rs = OP_RS();
if ((m_reg[rs] & (1 << bitnum)) == 0)
{
- UINT32 address = m_pc + (offset * 4);
+ uint32_t address = m_pc + (offset * 4);
m_pc = m_fetchpc;
delay_slot();
@@ -726,7 +726,7 @@ void tms32082_mp_device::execute_short_imm()
case 0x49: // bbz.a
{
int bitnum = OP_BITNUM() ^ 0x1f;
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
int rs = OP_RS();
if ((m_reg[rs] & (1 << bitnum)) == 0)
@@ -739,12 +739,12 @@ void tms32082_mp_device::execute_short_imm()
case 0x4a: // bbo
{
int bitnum = OP_BITNUM() ^ 0x1f;
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
int rs = OP_RS();
if ((m_reg[rs] & (1 << bitnum)) != 0)
{
- UINT32 address = m_pc + (offset * 4);
+ uint32_t address = m_pc + (offset * 4);
m_pc = m_fetchpc;
delay_slot();
@@ -757,7 +757,7 @@ void tms32082_mp_device::execute_short_imm()
case 0x4b: // bbo.a
{
int bitnum = OP_BITNUM() ^ 0x1f;
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
int rs = OP_RS();
if ((m_reg[rs] & (1 << bitnum)) != 0)
@@ -769,13 +769,13 @@ void tms32082_mp_device::execute_short_imm()
case 0x4c: // bcnd
{
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
int code = OP_RD();
int rs = OP_RS();
if (test_condition(code, m_reg[rs]))
{
- UINT32 address = m_pc + (offset * 4);
+ uint32_t address = m_pc + (offset * 4);
m_pc = m_fetchpc;
delay_slot();
@@ -787,7 +787,7 @@ void tms32082_mp_device::execute_short_imm()
case 0x4d: // bcnd.a
{
- INT32 offset = OP_SIMM15();
+ int32_t offset = OP_SIMM15();
int code = OP_RD();
int rs = OP_RS();
@@ -800,8 +800,8 @@ void tms32082_mp_device::execute_short_imm()
case 0x50: // cmp
{
- UINT32 src1 = OP_SIMM15();
- UINT32 src2 = m_reg[OP_RS()];
+ uint32_t src1 = OP_SIMM15();
+ uint32_t src2 = m_reg[OP_RS()];
int rd = OP_RD();
if (rd)
@@ -811,7 +811,7 @@ void tms32082_mp_device::execute_short_imm()
case 0x58: // add
{
- INT32 imm = OP_SIMM15();
+ int32_t imm = OP_SIMM15();
int rd = OP_RD();
int rs = OP_RS();
@@ -824,7 +824,7 @@ void tms32082_mp_device::execute_short_imm()
case 0x59: // addu
{
- INT32 imm = OP_SIMM15();
+ int32_t imm = OP_SIMM15();
int rd = OP_RD();
int rs = OP_RS();
@@ -835,7 +835,7 @@ void tms32082_mp_device::execute_short_imm()
case 0x5a: // sub
{
- INT32 imm = OP_SIMM15();
+ int32_t imm = OP_SIMM15();
int rd = OP_RD();
int rs = OP_RS();
@@ -848,7 +848,7 @@ void tms32082_mp_device::execute_short_imm()
case 0x5b: // subu
{
- INT32 imm = OP_SIMM15();
+ int32_t imm = OP_SIMM15();
int rd = OP_RD();
int rs = OP_RS();
@@ -864,7 +864,7 @@ void tms32082_mp_device::execute_short_imm()
void tms32082_mp_device::execute_reg_long_imm()
{
- UINT32 imm32 = 0;
+ uint32_t imm32 = 0;
int has_imm = (m_ir & (1 << 12));
@@ -875,7 +875,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
case 0x04: // cmnd
{
- UINT32 data = has_imm ? imm32 : m_reg[OP_SRC1()];
+ uint32_t data = has_imm ? imm32 : m_reg[OP_SRC1()];
processor_command(data);
break;
@@ -887,17 +887,17 @@ void tms32082_mp_device::execute_reg_long_imm()
int inv = (m_ir & (1 << 11));
int rot = m_reg[OP_ROTATE()];
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = end ? SHIFT_MASK[end ? end : 32] : m_reg[OP_ROTATE()+1];
+ uint32_t endmask = end ? SHIFT_MASK[end ? end : 32] : m_reg[OP_ROTATE()+1];
if (inv) endmask = ~endmask;
int shift = r ? 32-rot : rot;
- UINT32 shiftmask = SHIFT_MASK[shift ? shift : 32];
- UINT32 compmask = endmask & shiftmask;
+ uint32_t shiftmask = SHIFT_MASK[shift ? shift : 32];
+ uint32_t compmask = endmask & shiftmask;
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
@@ -918,17 +918,17 @@ void tms32082_mp_device::execute_reg_long_imm()
int inv = (m_ir & (1 << 11));
int rot = m_reg[OP_ROTATE()];
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = end ? SHIFT_MASK[end ? end : 32] : m_reg[OP_ROTATE()+1];
+ uint32_t endmask = end ? SHIFT_MASK[end ? end : 32] : m_reg[OP_ROTATE()+1];
if (inv) endmask = ~endmask;
int shift = r ? 32-rot : rot;
- UINT32 shiftmask = SHIFT_MASK[shift ? shift : 32];
- UINT32 compmask = endmask & shiftmask;
+ uint32_t shiftmask = SHIFT_MASK[shift ? shift : 32];
+ uint32_t compmask = endmask & shiftmask;
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
@@ -950,17 +950,17 @@ void tms32082_mp_device::execute_reg_long_imm()
int inv = (m_ir & (1 << 11));
int rot = m_reg[OP_ROTATE()];
int end = OP_ENDMASK();
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
- UINT32 endmask = end ? SHIFT_MASK[end ? end : 32] : m_reg[OP_ROTATE()+1];
+ uint32_t endmask = end ? SHIFT_MASK[end ? end : 32] : m_reg[OP_ROTATE()+1];
if (inv) endmask = ~endmask;
int shift = r ? 32-rot : rot;
- UINT32 shiftmask = SHIFT_MASK[shift ? shift : 32];
- UINT32 compmask = endmask & ~shiftmask;
+ uint32_t shiftmask = SHIFT_MASK[shift ? shift : 32];
+ uint32_t compmask = endmask & ~shiftmask;
- UINT32 res;
+ uint32_t res;
if (r) // right
{
res = ROTATE_R(source, rot) & compmask;
@@ -980,7 +980,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
int rd = OP_RD();
int rs = OP_RS();
- UINT32 src1 = has_imm ? imm32 : m_reg[OP_SRC1()];
+ uint32_t src1 = has_imm ? imm32 : m_reg[OP_SRC1()];
if (rd)
m_reg[rd] = src1 & m_reg[rs];
@@ -992,7 +992,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
int rd = OP_RD();
int rs = OP_RS();
- UINT32 src1 = has_imm ? imm32 : m_reg[OP_SRC1()];
+ uint32_t src1 = has_imm ? imm32 : m_reg[OP_SRC1()];
if (rd)
m_reg[rd] = src1 & ~(m_reg[rs]);
@@ -1042,8 +1042,8 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
int rd = OP_RD();
- UINT32 address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]);
- UINT32 r = m_program->read_byte(address);
+ uint32_t address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]);
+ uint32_t r = m_program->read_byte(address);
if (r & 0x80) r |= 0xffffff00;
if (rd)
@@ -1065,8 +1065,8 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
int rd = OP_RD();
- UINT32 address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
- UINT32 r = m_program->read_word(address);
+ uint32_t address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
+ uint32_t r = m_program->read_word(address);
if (r & 0x8000) r |= 0xffff0000;
if (rd)
@@ -1087,8 +1087,8 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
int rd = OP_RD();
- UINT32 address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
- UINT32 r = m_program->read_dword(address);
+ uint32_t address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
+ uint32_t r = m_program->read_dword(address);
if (rd)
m_reg[rd] = r;
@@ -1108,8 +1108,8 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
int rd = OP_RD();
- UINT32 address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
- UINT64 r = m_program->read_qword(address);
+ uint32_t address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
+ uint64_t r = m_program->read_qword(address);
if (rd)
m_fpair[rd >> 1] = r;
@@ -1128,8 +1128,8 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
int rd = OP_RD();
- UINT32 address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]);
- UINT32 r = (UINT8)(m_program->read_byte(address));
+ uint32_t address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]);
+ uint32_t r = (uint8_t)(m_program->read_byte(address));
if (rd)
m_reg[rd] = r;
@@ -1149,8 +1149,8 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
int rd = OP_RD();
- UINT32 address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
- UINT32 r = (UINT16)(m_program->read_word(address));
+ uint32_t address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
+ uint32_t r = (uint16_t)(m_program->read_word(address));
if (rd)
m_reg[rd] = r;
@@ -1169,8 +1169,8 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
- UINT32 address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]);
- m_program->write_byte(address, (UINT8)(m_reg[OP_RD()]));
+ uint32_t address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]);
+ m_program->write_byte(address, (uint8_t)(m_reg[OP_RD()]));
if (m && base)
m_reg[base] = address;
@@ -1187,8 +1187,8 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
- UINT32 address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
- m_program->write_word(address, (UINT16)(m_reg[OP_RD()]));
+ uint32_t address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
+ m_program->write_word(address, (uint16_t)(m_reg[OP_RD()]));
if (m && base)
m_reg[base] = address;
@@ -1205,7 +1205,7 @@ void tms32082_mp_device::execute_reg_long_imm()
int base = OP_BASE();
- UINT32 address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
+ uint32_t address = m_reg[base] + ((has_imm ? imm32 : m_reg[OP_SRC1()]) << shift);
m_program->write_dword(address, m_reg[OP_RD()]);
if (m && base)
@@ -1222,7 +1222,7 @@ void tms32082_mp_device::execute_reg_long_imm()
if (link)
m_reg[link] = m_fetchpc + 4;
- UINT32 address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]);
+ uint32_t address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]);
m_pc = m_fetchpc;
delay_slot();
@@ -1248,8 +1248,8 @@ void tms32082_mp_device::execute_reg_long_imm()
case 0xa1: // cmp
{
int rd = OP_RD();
- UINT32 src1 = has_imm ? imm32 : m_reg[OP_SRC1()];
- UINT32 src2 = m_reg[OP_RS()];
+ uint32_t src1 = has_imm ? imm32 : m_reg[OP_SRC1()];
+ uint32_t src2 = m_reg[OP_RS()];
if (rd)
m_reg[rd] = calculate_cmp(src1, src2);
@@ -1354,10 +1354,10 @@ void tms32082_mp_device::execute_reg_long_imm()
m_fpair[rd >> 1] = d2u(source);
break;
case 2:
- m_reg[rd] = (INT32)(source);
+ m_reg[rd] = (int32_t)(source);
break;
case 3:
- m_reg[rd] = (UINT32)(source);
+ m_reg[rd] = (uint32_t)(source);
break;
}
}
@@ -1487,7 +1487,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
float s1 = u2f(has_imm ? imm32 : m_reg[src1]);
float s2 = u2f(m_reg[rs]);
- UINT64 res = d2u((double)(s1 + s2));
+ uint64_t res = d2u((double)(s1 + s2));
m_fpair[rd >> 1] = res;
break;
}
@@ -1495,7 +1495,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
float s1 = u2f(has_imm ? imm32 : m_reg[src1]);
double s2 = u2d(m_fpair[rs >> 1]);
- UINT64 res = d2u((double) s1 + s2);
+ uint64_t res = d2u((double) s1 + s2);
m_fpair[rd >> 1] = res;
break;
}
@@ -1503,7 +1503,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
double s1 = u2d(m_fpair[src1 >> 1]);
float s2 = u2f(m_reg[rs]);
- UINT64 res = d2u(s1 + (double) s2);
+ uint64_t res = d2u(s1 + (double) s2);
m_fpair[rd >> 1] = res;
break;
}
@@ -1511,7 +1511,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
double s1 = u2d(m_fpair[src1 >> 1]);
double s2 = u2d(m_fpair[rs >> 1]);
- UINT64 res = d2u((double)(s1 + s2));
+ uint64_t res = d2u((double)(s1 + s2));
m_fpair[rd >> 1] = res;
break;
}
@@ -1545,7 +1545,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
float s1 = u2f(has_imm ? imm32 : m_reg[src1]);
float s2 = u2f(m_reg[rs]);
- UINT64 res = d2u((double)(s1 - s2));
+ uint64_t res = d2u((double)(s1 - s2));
m_fpair[rd >> 1] = res;
break;
}
@@ -1553,7 +1553,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
float s1 = u2f(has_imm ? imm32 : m_reg[src1]);
double s2 = u2d(m_fpair[rs >> 1]);
- UINT64 res = d2u((double) s1 - s2);
+ uint64_t res = d2u((double) s1 - s2);
m_fpair[rd >> 1] = res;
break;
}
@@ -1561,7 +1561,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
double s1 = u2d(m_fpair[src1 >> 1]);
float s2 = u2f(m_reg[rs]);
- UINT64 res = d2u(s1 - (double) s2);
+ uint64_t res = d2u(s1 - (double) s2);
m_fpair[rd >> 1] = res;
break;
}
@@ -1569,7 +1569,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
double s1 = u2d(m_fpair[src1 >> 1]);
double s2 = u2d(m_fpair[rs >> 1]);
- UINT64 res = d2u((double)(s1 - s2));
+ uint64_t res = d2u((double)(s1 - s2));
m_fpair[rd >> 1] = res;
break;
}
@@ -1603,7 +1603,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
float s1 = u2f(has_imm ? imm32 : m_reg[src1]);
float s2 = u2f(m_reg[rs]);
- UINT64 res = d2u((double)(s1 * s2));
+ uint64_t res = d2u((double)(s1 * s2));
m_fpair[rd >> 1] = res;
break;
}
@@ -1611,7 +1611,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
float s1 = u2f(has_imm ? imm32 : m_reg[src1]);
double s2 = u2d(m_fpair[rs >> 1]);
- UINT64 res = d2u((double)s1 * s2);
+ uint64_t res = d2u((double)s1 * s2);
m_fpair[rd >> 1] = res;
break;
}
@@ -1619,7 +1619,7 @@ void tms32082_mp_device::execute_reg_long_imm()
{
double s1 = u2d(m_fpair[src1 >> 1]);
float s2 = u2f(m_reg[rs]);
- UINT64 res = d2u(s1 * (double) s2);
+ uint64_t res = d2u(s1 * (double) s2);
m_fpair[rd >> 1] = res;
break;
}
@@ -1627,18 +1627,18 @@ void tms32082_mp_device::execute_reg_long_imm()
{
double s1 = u2d(m_fpair[src1 >> 1]);
double s2 = u2d(m_fpair[rs >> 1]);
- UINT64 res = d2u(s1 * s2);
+ uint64_t res = d2u(s1 * s2);
m_fpair[rd >> 1] = res;
break;
}
case 0x2a: // I x I -> I
{
- m_reg[rd] = (INT32)(m_reg[rs]) * (INT32)(has_imm ? imm32 : m_reg[OP_SRC1()]);
+ m_reg[rd] = (int32_t)(m_reg[rs]) * (int32_t)(has_imm ? imm32 : m_reg[OP_SRC1()]);
break;
}
case 0x3f: // U x U -> U
{
- m_reg[rd] = (UINT32)(m_reg[rs]) * (UINT32)(has_imm ? imm32 : m_reg[OP_SRC1()]);
+ m_reg[rd] = (uint32_t)(m_reg[rs]) * (uint32_t)(has_imm ? imm32 : m_reg[OP_SRC1()]);
break;
}
default:
@@ -1697,10 +1697,10 @@ void tms32082_mp_device::execute_reg_long_imm()
s = u2d(m_fpair[src1 >> 1]);
break;
case 2:
- s = has_imm ? (double)((INT32)(imm32)) : (double)(INT32)(m_reg[src1]);
+ s = has_imm ? (double)((int32_t)(imm32)) : (double)(int32_t)(m_reg[src1]);
break;
case 3:
- s = has_imm ? (double)((UINT32)(imm32)) : (double)(UINT32)(m_reg[src1]);
+ s = has_imm ? (double)((uint32_t)(imm32)) : (double)(uint32_t)(m_reg[src1]);
break;
}
@@ -1717,10 +1717,10 @@ void tms32082_mp_device::execute_reg_long_imm()
m_fpair[rd >> 1] = d2u(s);
break;
case 2:
- m_reg[rd] = (INT32)(s);
+ m_reg[rd] = (int32_t)(s);
break;
case 3:
- m_reg[rd] = (UINT32)(s);
+ m_reg[rd] = (uint32_t)(s);
break;
}
}
@@ -1741,7 +1741,7 @@ void tms32082_mp_device::execute_reg_long_imm()
if (rd)
{
- UINT32 flags = 0;
+ uint32_t flags = 0;
flags |= (src1 == src2) ? (1 << 20) : 0;
flags |= (src1 != src2) ? (1 << 21) : 0;
flags |= (src1 > src2) ? (1 << 22) : 0;
@@ -1787,7 +1787,7 @@ void tms32082_mp_device::execute_reg_long_imm()
case 0xf2: // rmo
{
- UINT32 source = m_reg[OP_RS()];
+ uint32_t source = m_reg[OP_RS()];
int rd = OP_RD();
int bit = 32;
diff --git a/src/devices/cpu/tms32082/tms32082.cpp b/src/devices/cpu/tms32082/tms32082.cpp
index 3d788a19aa2..a505a6a2045 100644
--- a/src/devices/cpu/tms32082/tms32082.cpp
+++ b/src/devices/cpu/tms32082/tms32082.cpp
@@ -33,7 +33,7 @@ static ADDRESS_MAP_START(mp_internal_map, AS_PROGRAM, 32, tms32082_mp_device)
AM_RANGE(0x01010000, 0x010107ff) AM_READWRITE(mp_param_r, mp_param_w)
ADDRESS_MAP_END
-const UINT32 tms32082_mp_device::SHIFT_MASK[] =
+const uint32_t tms32082_mp_device::SHIFT_MASK[] =
{
0x00000000, 0x00000001, 0x00000003, 0x00000007, 0x0000000f, 0x0000001f, 0x0000003f, 0x0000007f,
0x000000ff, 0x000001ff, 0x000003ff, 0x000007ff, 0x00000fff, 0x00001fff, 0x00003fff, 0x00007fff,
@@ -44,14 +44,14 @@ const UINT32 tms32082_mp_device::SHIFT_MASK[] =
-tms32082_mp_device::tms32082_mp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32082_mp_device::tms32082_mp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS32082_MP, "TMS32082 MP", tag, owner, clock, "tms32082_mp", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 32, 0, ADDRESS_MAP_NAME(mp_internal_map))
{
}
-offs_t tms32082_mp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms32082_mp_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return CPU_DISASSEMBLE_NAME(tms32082_mp)(this, buffer, pc, oprom, opram, options);
}
@@ -80,22 +80,22 @@ WRITE32_MEMBER(tms32082_mp_device::mp_param_w)
{
// initiate Transfer Controller operation
// TODO: move TC functionality to separate device
- UINT32 address = data;
-
- UINT32 next_entry = m_program->read_dword(address + 0);
- UINT32 pt_options = m_program->read_dword(address + 4);
- UINT32 src_addr = m_program->read_dword(address + 8);
- UINT32 dst_addr = m_program->read_dword(address + 12);
- UINT32 src_b_count = m_program->read_word(address + 16);
- UINT32 src_a_count = m_program->read_word(address + 18);
- UINT32 dst_b_count = m_program->read_word(address + 20);
- UINT32 dst_a_count = m_program->read_word(address + 22);
- UINT32 src_c_count = m_program->read_dword(address + 24);
- UINT32 dst_c_count = m_program->read_dword(address + 28);
- UINT32 src_b_pitch = m_program->read_dword(address + 32);
- UINT32 dst_b_pitch = m_program->read_dword(address + 36);
- UINT32 src_c_pitch = m_program->read_dword(address + 40);
- UINT32 dst_c_pitch = m_program->read_dword(address + 44);
+ uint32_t address = data;
+
+ uint32_t next_entry = m_program->read_dword(address + 0);
+ uint32_t pt_options = m_program->read_dword(address + 4);
+ uint32_t src_addr = m_program->read_dword(address + 8);
+ uint32_t dst_addr = m_program->read_dword(address + 12);
+ uint32_t src_b_count = m_program->read_word(address + 16);
+ uint32_t src_a_count = m_program->read_word(address + 18);
+ uint32_t dst_b_count = m_program->read_word(address + 20);
+ uint32_t dst_a_count = m_program->read_word(address + 22);
+ uint32_t src_c_count = m_program->read_dword(address + 24);
+ uint32_t dst_c_count = m_program->read_dword(address + 28);
+ uint32_t src_b_pitch = m_program->read_dword(address + 32);
+ uint32_t dst_b_pitch = m_program->read_dword(address + 36);
+ uint32_t src_c_pitch = m_program->read_dword(address + 40);
+ uint32_t dst_c_pitch = m_program->read_dword(address + 44);
printf("TC operation:\n");
printf(" Next entry: %08X\n", next_entry);
@@ -116,20 +116,20 @@ WRITE32_MEMBER(tms32082_mp_device::mp_param_w)
for (int ic = 0; ic <= src_c_count; ic++)
{
- UINT32 c_src_offset = ic * src_c_pitch;
- UINT32 c_dst_offset = ic * dst_c_pitch;
+ uint32_t c_src_offset = ic * src_c_pitch;
+ uint32_t c_dst_offset = ic * dst_c_pitch;
for (int ib = 0; ib <= src_b_count; ib++)
{
- UINT32 b_src_offset = ib * src_b_pitch;
- UINT32 b_dst_offset = ib * dst_b_pitch;
+ uint32_t b_src_offset = ib * src_b_pitch;
+ uint32_t b_dst_offset = ib * dst_b_pitch;
for (int ia = 0; ia < src_a_count; ia++)
{
- UINT32 src = src_addr + c_src_offset + b_src_offset + ia;
- UINT32 dst = dst_addr + c_dst_offset + b_dst_offset + ia;
+ uint32_t src = src_addr + c_src_offset + b_src_offset + ia;
+ uint32_t dst = dst_addr + c_dst_offset + b_dst_offset + ia;
- UINT32 data = m_program->read_byte(src);
+ uint32_t data = m_program->read_byte(src);
m_program->write_byte(dst, data);
//printf("%08X: %02X -> %08X\n", src, data, dst);
@@ -248,7 +248,7 @@ void tms32082_mp_device::device_reset()
m_ie = 0;
}
-void tms32082_mp_device::processor_command(UINT32 command)
+void tms32082_mp_device::processor_command(uint32_t command)
{
printf("MP CMND %08X: ", command);
@@ -290,7 +290,7 @@ void tms32082_mp_device::processor_command(UINT32 command)
printf("\n");
}
-UINT32 tms32082_mp_device::read_creg(int reg)
+uint32_t tms32082_mp_device::read_creg(int reg)
{
switch (reg)
{
@@ -328,7 +328,7 @@ UINT32 tms32082_mp_device::read_creg(int reg)
return 0;
}
-void tms32082_mp_device::write_creg(int reg, UINT32 data)
+void tms32082_mp_device::write_creg(int reg, uint32_t data)
{
switch (reg)
{
@@ -425,9 +425,9 @@ void tms32082_mp_device::execute_set_input(int inputnum, int state)
}
}
-UINT32 tms32082_mp_device::fetch()
+uint32_t tms32082_mp_device::fetch()
{
- UINT32 w = m_direct->read_dword(m_fetchpc);
+ uint32_t w = m_direct->read_dword(m_fetchpc);
m_fetchpc += 4;
return w;
}
@@ -482,14 +482,14 @@ static ADDRESS_MAP_START(pp_internal_map, AS_PROGRAM, 32, tms32082_pp_device)
AM_RANGE(0x01001000, 0x01001fff) AM_RAM AM_SHARE("pp1_param")
ADDRESS_MAP_END
-tms32082_pp_device::tms32082_pp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms32082_pp_device::tms32082_pp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS32082_PP, "TMS32082 PP", tag, owner, clock, "tms32082_pp", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 32, 32, 0, ADDRESS_MAP_NAME(pp_internal_map))
{
}
-offs_t tms32082_pp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms32082_pp_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
return CPU_DISASSEMBLE_NAME(tms32082_pp)(this, buffer, pc, oprom, opram, options);
}
diff --git a/src/devices/cpu/tms32082/tms32082.h b/src/devices/cpu/tms32082/tms32082.h
index 80163cc6145..0a315d6b79d 100644
--- a/src/devices/cpu/tms32082/tms32082.h
+++ b/src/devices/cpu/tms32082/tms32082.h
@@ -10,7 +10,7 @@ class tms32082_mp_device : public cpu_device
{
public:
// construction/destruction
- tms32082_mp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms32082_mp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
enum
{
@@ -80,9 +80,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -100,41 +100,41 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 4; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
- static const UINT32 SHIFT_MASK[33];
+ static const uint32_t SHIFT_MASK[33];
- UINT32 m_pc;
- UINT32 m_fetchpc;
+ uint32_t m_pc;
+ uint32_t m_fetchpc;
union
{
- UINT32 m_reg[32];
- UINT64 m_fpair[16];
+ uint32_t m_reg[32];
+ uint64_t m_fpair[16];
};
union
{
- UINT64 m_acc[4];
+ uint64_t m_acc[4];
double m_facc[4];
};
- UINT32 m_ir;
+ uint32_t m_ir;
- UINT32 m_in0p;
- UINT32 m_in1p;
- UINT32 m_outp;
- UINT32 m_ie;
- UINT32 m_intpen;
- UINT32 m_epc;
- UINT32 m_eip;
+ uint32_t m_in0p;
+ uint32_t m_in1p;
+ uint32_t m_outp;
+ uint32_t m_ie;
+ uint32_t m_intpen;
+ uint32_t m_epc;
+ uint32_t m_eip;
- UINT32 m_tcount;
- UINT32 m_tscale;
+ uint32_t m_tcount;
+ uint32_t m_tscale;
- UINT32 m_param_ram[0x800];
+ uint32_t m_param_ram[0x800];
int m_icount;
@@ -144,16 +144,16 @@ protected:
write32_delegate m_cmd_callback;
void check_interrupts();
- void processor_command(UINT32 command);
- UINT32 fetch();
+ void processor_command(uint32_t command);
+ uint32_t fetch();
void delay_slot();
void execute();
void execute_short_imm();
void execute_reg_long_imm();
- UINT32 read_creg(int reg);
- void write_creg(int reg, UINT32 data);
- bool test_condition(int condition, UINT32 value);
- UINT32 calculate_cmp(UINT32 src1, UINT32 src2);
+ uint32_t read_creg(int reg);
+ void write_creg(int reg, uint32_t data);
+ bool test_condition(int condition, uint32_t value);
+ uint32_t calculate_cmp(uint32_t src1, uint32_t src2);
void vector_loadstore();
};
@@ -163,7 +163,7 @@ class tms32082_pp_device : public cpu_device
{
public:
// construction/destruction
- tms32082_pp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms32082_pp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
enum
{
@@ -176,9 +176,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -195,14 +195,14 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 8; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 8; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
- UINT32 m_pc;
- UINT32 m_fetchpc;
+ uint32_t m_pc;
+ uint32_t m_fetchpc;
int m_icount;
diff --git a/src/devices/cpu/tms34010/34010dsm.cpp b/src/devices/cpu/tms34010/34010dsm.cpp
index 15136885da4..70fbabc58db 100644
--- a/src/devices/cpu/tms34010/34010dsm.cpp
+++ b/src/devices/cpu/tms34010/34010dsm.cpp
@@ -21,19 +21,19 @@
#define PARAM_LONG(v) { v = rambase[(__pc + 16 - pcbase) >> 3] | (rambase[(__pc + 24 - pcbase) >> 3] << 8) | (rambase[(__pc + 32 - pcbase) >> 3] << 16) | (rambase[(__pc + 40 - pcbase) >> 3] << 24); _pc += 32; }
#endif
-static UINT8 rf;
-static UINT32 __pc, _pc;
-static UINT16 op,rs,rd;
+static uint8_t rf;
+static uint32_t __pc, _pc;
+static uint16_t op,rs,rd;
static char *buffer;
static char temp[20];
-static const UINT8 *rombase;
-static const UINT8 *rambase;
+static const uint8_t *rombase;
+static const uint8_t *rambase;
static offs_t pcbase;
-static void print_reg(UINT8 reg)
+static void print_reg(uint8_t reg)
{
if (reg != 0x0f)
{
@@ -65,7 +65,7 @@ static void print_src_des_reg(void)
static void print_word_parm(void)
{
- UINT16 w;
+ uint16_t w;
PARAM_WORD(w);
@@ -75,7 +75,7 @@ static void print_word_parm(void)
static void print_word_parm_1s_comp(void)
{
- UINT16 w;
+ uint16_t w;
PARAM_WORD(w);
w = ~w;
@@ -85,7 +85,7 @@ static void print_word_parm_1s_comp(void)
static void print_long_parm(void)
{
- UINT32 l;
+ uint32_t l;
PARAM_LONG(l);
sprintf(temp, "%Xh", l);
@@ -94,7 +94,7 @@ static void print_long_parm(void)
static void print_long_parm_1s_comp(void)
{
- UINT32 l;
+ uint32_t l;
PARAM_LONG(l);
sprintf(temp, "%Xh", ~l);
@@ -103,7 +103,7 @@ static void print_long_parm_1s_comp(void)
static void print_constant(void)
{
- UINT8 constant = (op >> 5) & 0x1f;
+ uint8_t constant = (op >> 5) & 0x1f;
sprintf(temp, "%Xh", constant);
strcat(buffer, temp);
@@ -111,7 +111,7 @@ static void print_constant(void)
static void print_constant_1_32(void)
{
- UINT8 constant = (op >> 5) & 0x1f;
+ uint8_t constant = (op >> 5) & 0x1f;
if (!constant) constant = 0x20;
sprintf(temp, "%Xh", constant);
@@ -120,7 +120,7 @@ static void print_constant_1_32(void)
static void print_constant_1s_comp(void)
{
- UINT8 constant = (~op >> 5) & 0x1f;
+ uint8_t constant = (~op >> 5) & 0x1f;
sprintf(temp, "%Xh", constant);
strcat(buffer, temp);
@@ -128,7 +128,7 @@ static void print_constant_1s_comp(void)
static void print_constant_2s_comp(void)
{
- UINT8 constant = 32 - ((op >> 5) & 0x1f);
+ uint8_t constant = 32 - ((op >> 5) & 0x1f);
sprintf(temp, "%Xh", constant);
strcat(buffer, temp);
@@ -136,11 +136,11 @@ static void print_constant_2s_comp(void)
static void print_relative(void)
{
- UINT16 l;
- INT16 ls;
+ uint16_t l;
+ int16_t ls;
PARAM_WORD(l);
- ls = (INT16)l;
+ ls = (int16_t)l;
sprintf(temp, "%Xh", PC + 32 + (ls << 4));
strcat(buffer, temp);
@@ -148,7 +148,7 @@ static void print_relative(void)
static void print_relative_8bit(void)
{
- INT8 ls = (INT8)op;
+ int8_t ls = (int8_t)op;
sprintf(temp, "%Xh", PC + 16 + (ls << 4));
strcat(buffer, temp);
@@ -156,7 +156,7 @@ static void print_relative_8bit(void)
static void print_relative_5bit(void)
{
- INT8 ls = (INT8)((op >> 5) & 0x1f);
+ int8_t ls = (int8_t)((op >> 5) & 0x1f);
if (op & 0x0400) ls = -ls;
sprintf(temp, "%Xh", PC + 16 + (ls << 4));
@@ -192,7 +192,7 @@ static void print_condition_code(void)
}
}
-static void print_reg_list_range(INT8 first, INT8 last)
+static void print_reg_list_range(int8_t first, int8_t last)
{
if ((first != -1 ) && (first != last))
{
@@ -204,11 +204,11 @@ static void print_reg_list_range(INT8 first, INT8 last)
}
}
-static void print_reg_list(UINT16 rev)
+static void print_reg_list(uint16_t rev)
{
- UINT16 l;
- UINT8 i;
- INT8 first = -1, last = 0;
+ uint16_t l;
+ uint8_t i;
+ int8_t first = -1, last = 0;
PARAM_WORD(l);
@@ -248,11 +248,11 @@ static void print_reg_list(UINT16 rev)
}
-static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
+static unsigned Dasm340x0(char *buff, uint32_t pc, int is_34020)
{
int flags = 0;
- UINT8 bad = 0;
- UINT16 subop;
+ uint8_t bad = 0;
+ uint16_t subop;
__pc = _pc = pc;
buffer = buff;
@@ -444,7 +444,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0000:
if (is_34020 && (op & 0xfe00) == 0x0600)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
sprintf(buffer, "CEXEC %d,%06X,%d", (x >> 7) & 1, (x >> 8) & 0x1fffff, (x >> 29) & 7);
}
@@ -455,7 +455,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0020:
if (is_34020 && (op & 0xfe00) == 0x0600)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
sprintf(buffer, "CMOVGC ");
print_des_reg();
@@ -469,7 +469,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0040:
if (is_34020 && (op & 0xfe00) == 0x0600)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
sprintf(buffer, "CMOVGC ");
print_des_reg();
@@ -486,7 +486,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0060:
if (is_34020 && (op & 0xfe00) == 0x0600)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
if (op == 0x0660 && (x & 0xff) == 0x01)
@@ -513,7 +513,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0080:
if (is_34020 && (op & 0xfe00) == 0x0600)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
sprintf(buffer, "CMOVMC *");
rf = (x & 0x10) ? 'B' : 'A';
@@ -528,7 +528,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x00a0:
if (is_34020 && (op & 0xfe00) == 0x0600)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
sprintf(buffer, "CMOVCM *");
print_des_reg();
@@ -542,7 +542,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x00c0:
if (is_34020 && (op & 0xfe00) == 0x0600)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
sprintf(buffer, "CMOVCM *-");
print_des_reg();
@@ -556,7 +556,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x00e0:
if (is_34020 && (op & 0xfe00) == 0x0600)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
sprintf(buffer, "CMOVMC *");
rf = (x & 0x10) ? 'B' : 'A';
@@ -659,7 +659,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0020:
if (is_34020)
{
- UINT32 x;
+ uint32_t x;
PARAM_LONG(x);
sprintf(buffer, "CMOVMC *-");
rf = (x & 0x10) ? 'B' : 'A';
@@ -1587,7 +1587,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0xd800:
if (is_34020)
{
- UINT32 x;
+ uint32_t x;
PARAM_WORD(x);
sprintf(buffer, "CEXEC %d,%06X,%d", op & 1, ((x << 5) & 0x1fffe0) | ((op >> 1) & 0x1f), (x >> 13) & 7);
}
diff --git a/src/devices/cpu/tms34010/34010fld.hxx b/src/devices/cpu/tms34010/34010fld.hxx
index ca05039dac0..7d55bca3b7b 100644
--- a/src/devices/cpu/tms34010/34010fld.hxx
+++ b/src/devices/cpu/tms34010/34010fld.hxx
@@ -15,82 +15,82 @@
FIELD WRITE FUNCTIONS
***************************************************************************/
-void tms340x0_device::wfield_01(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_01(offs_t offset, uint32_t data)
{
WFIELDMAC(0x01,16);
}
-void tms340x0_device::wfield_02(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_02(offs_t offset, uint32_t data)
{
WFIELDMAC(0x03,15);
}
-void tms340x0_device::wfield_03(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_03(offs_t offset, uint32_t data)
{
WFIELDMAC(0x07,14);
}
-void tms340x0_device::wfield_04(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_04(offs_t offset, uint32_t data)
{
WFIELDMAC(0x0f,13);
}
-void tms340x0_device::wfield_05(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_05(offs_t offset, uint32_t data)
{
WFIELDMAC(0x1f,12);
}
-void tms340x0_device::wfield_06(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_06(offs_t offset, uint32_t data)
{
WFIELDMAC(0x3f,11);
}
-void tms340x0_device::wfield_07(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_07(offs_t offset, uint32_t data)
{
WFIELDMAC(0x7f,10);
}
-void tms340x0_device::wfield_08(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_08(offs_t offset, uint32_t data)
{
WFIELDMAC_8();
}
-void tms340x0_device::wfield_09(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_09(offs_t offset, uint32_t data)
{
WFIELDMAC(0x1ff,8);
}
-void tms340x0_device::wfield_10(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_10(offs_t offset, uint32_t data)
{
WFIELDMAC(0x3ff,7);
}
-void tms340x0_device::wfield_11(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_11(offs_t offset, uint32_t data)
{
WFIELDMAC(0x7ff,6);
}
-void tms340x0_device::wfield_12(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_12(offs_t offset, uint32_t data)
{
WFIELDMAC(0xfff,5);
}
-void tms340x0_device::wfield_13(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_13(offs_t offset, uint32_t data)
{
WFIELDMAC(0x1fff,4);
}
-void tms340x0_device::wfield_14(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_14(offs_t offset, uint32_t data)
{
WFIELDMAC(0x3fff,3);
}
-void tms340x0_device::wfield_15(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_15(offs_t offset, uint32_t data)
{
WFIELDMAC(0x7fff,2);
}
-void tms340x0_device::wfield_16(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_16(offs_t offset, uint32_t data)
{
if (offset & 0x0f)
{
@@ -102,82 +102,82 @@ void tms340x0_device::wfield_16(offs_t offset, UINT32 data)
}
}
-void tms340x0_device::wfield_17(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_17(offs_t offset, uint32_t data)
{
WFIELDMAC(0x1ffff,0);
}
-void tms340x0_device::wfield_18(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_18(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x3ffff,15);
}
-void tms340x0_device::wfield_19(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_19(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x7ffff,14);
}
-void tms340x0_device::wfield_20(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_20(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0xfffff,13);
}
-void tms340x0_device::wfield_21(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_21(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x1fffff,12);
}
-void tms340x0_device::wfield_22(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_22(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x3fffff,11);
}
-void tms340x0_device::wfield_23(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_23(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x7fffff,10);
}
-void tms340x0_device::wfield_24(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_24(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0xffffff,9);
}
-void tms340x0_device::wfield_25(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_25(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x1ffffff,8);
}
-void tms340x0_device::wfield_26(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_26(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x3ffffff,7);
}
-void tms340x0_device::wfield_27(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_27(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x7ffffff,6);
}
-void tms340x0_device::wfield_28(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_28(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0xfffffff,5);
}
-void tms340x0_device::wfield_29(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_29(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x1fffffff,4);
}
-void tms340x0_device::wfield_30(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_30(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x3fffffff,3);
}
-void tms340x0_device::wfield_31(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_31(offs_t offset, uint32_t data)
{
WFIELDMAC_BIG(0x7fffffff,2);
}
-void tms340x0_device::wfield_32(offs_t offset, UINT32 data)
+void tms340x0_device::wfield_32(offs_t offset, uint32_t data)
{
WFIELDMAC_32();
}
@@ -199,114 +199,114 @@ const tms340x0_device::wfield_func tms340x0_device::s_wfield_functions[32] =
FIELD READ FUNCTIONS (ZERO-EXTEND)
***************************************************************************/
-UINT32 tms340x0_device::rfield_z_01(offs_t offset)
+uint32_t tms340x0_device::rfield_z_01(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x01,16);
return ret;
}
-UINT32 tms340x0_device::rfield_z_02(offs_t offset)
+uint32_t tms340x0_device::rfield_z_02(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x03,15);
return ret;
}
-UINT32 tms340x0_device::rfield_z_03(offs_t offset)
+uint32_t tms340x0_device::rfield_z_03(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x07,14);
return ret;
}
-UINT32 tms340x0_device::rfield_z_04(offs_t offset)
+uint32_t tms340x0_device::rfield_z_04(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x0f,13);
return ret;
}
-UINT32 tms340x0_device::rfield_z_05(offs_t offset)
+uint32_t tms340x0_device::rfield_z_05(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x1f,12);
return ret;
}
-UINT32 tms340x0_device::rfield_z_06(offs_t offset)
+uint32_t tms340x0_device::rfield_z_06(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x3f,11);
return ret;
}
-UINT32 tms340x0_device::rfield_z_07(offs_t offset)
+uint32_t tms340x0_device::rfield_z_07(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x7f,10);
return ret;
}
-UINT32 tms340x0_device::rfield_z_08(offs_t offset)
+uint32_t tms340x0_device::rfield_z_08(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_8();
return ret;
}
-UINT32 tms340x0_device::rfield_z_09(offs_t offset)
+uint32_t tms340x0_device::rfield_z_09(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x1ff,8);
return ret;
}
-UINT32 tms340x0_device::rfield_z_10(offs_t offset)
+uint32_t tms340x0_device::rfield_z_10(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x3ff,7);
return ret;
}
-UINT32 tms340x0_device::rfield_z_11(offs_t offset)
+uint32_t tms340x0_device::rfield_z_11(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x7ff,6);
return ret;
}
-UINT32 tms340x0_device::rfield_z_12(offs_t offset)
+uint32_t tms340x0_device::rfield_z_12(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0xfff,5);
return ret;
}
-UINT32 tms340x0_device::rfield_z_13(offs_t offset)
+uint32_t tms340x0_device::rfield_z_13(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x1fff,4);
return ret;
}
-UINT32 tms340x0_device::rfield_z_14(offs_t offset)
+uint32_t tms340x0_device::rfield_z_14(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x3fff,3);
return ret;
}
-UINT32 tms340x0_device::rfield_z_15(offs_t offset)
+uint32_t tms340x0_device::rfield_z_15(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x7fff,2);
return ret;
}
-UINT32 tms340x0_device::rfield_z_16(offs_t offset)
+uint32_t tms340x0_device::rfield_z_16(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
if (offset & 0x0f)
{
RFIELDMAC(0xffff,1);
@@ -317,112 +317,112 @@ UINT32 tms340x0_device::rfield_z_16(offs_t offset)
return ret;
}
-UINT32 tms340x0_device::rfield_z_17(offs_t offset)
+uint32_t tms340x0_device::rfield_z_17(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x1ffff,0);
return ret;
}
-UINT32 tms340x0_device::rfield_z_18(offs_t offset)
+uint32_t tms340x0_device::rfield_z_18(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x3ffff,15);
return ret;
}
-UINT32 tms340x0_device::rfield_z_19(offs_t offset)
+uint32_t tms340x0_device::rfield_z_19(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x7ffff,14);
return ret;
}
-UINT32 tms340x0_device::rfield_z_20(offs_t offset)
+uint32_t tms340x0_device::rfield_z_20(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0xfffff,13);
return ret;
}
-UINT32 tms340x0_device::rfield_z_21(offs_t offset)
+uint32_t tms340x0_device::rfield_z_21(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x1fffff,12);
return ret;
}
-UINT32 tms340x0_device::rfield_z_22(offs_t offset)
+uint32_t tms340x0_device::rfield_z_22(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x3fffff,11);
return ret;
}
-UINT32 tms340x0_device::rfield_z_23(offs_t offset)
+uint32_t tms340x0_device::rfield_z_23(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x7fffff,10);
return ret;
}
-UINT32 tms340x0_device::rfield_z_24(offs_t offset)
+uint32_t tms340x0_device::rfield_z_24(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0xffffff,9);
return ret;
}
-UINT32 tms340x0_device::rfield_z_25(offs_t offset)
+uint32_t tms340x0_device::rfield_z_25(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x1ffffff,8);
return ret;
}
-UINT32 tms340x0_device::rfield_z_26(offs_t offset)
+uint32_t tms340x0_device::rfield_z_26(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x3ffffff,7);
return ret;
}
-UINT32 tms340x0_device::rfield_z_27(offs_t offset)
+uint32_t tms340x0_device::rfield_z_27(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x7ffffff,6);
return ret;
}
-UINT32 tms340x0_device::rfield_z_28(offs_t offset)
+uint32_t tms340x0_device::rfield_z_28(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0xfffffff,5);
return ret;
}
-UINT32 tms340x0_device::rfield_z_29(offs_t offset)
+uint32_t tms340x0_device::rfield_z_29(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x1fffffff,4);
return ret;
}
-UINT32 tms340x0_device::rfield_z_30(offs_t offset)
+uint32_t tms340x0_device::rfield_z_30(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x3fffffff,3);
return ret;
}
-UINT32 tms340x0_device::rfield_z_31(offs_t offset)
+uint32_t tms340x0_device::rfield_z_31(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x7fffffff,2);
return ret;
}
-UINT32 tms340x0_device::rfield_32(offs_t offset)
+uint32_t tms340x0_device::rfield_32(offs_t offset)
{
RFIELDMAC_32();
}
@@ -432,58 +432,58 @@ UINT32 tms340x0_device::rfield_32(offs_t offset)
FIELD READ FUNCTIONS (SIGN-EXTEND)
***************************************************************************/
-UINT32 tms340x0_device::rfield_s_01(offs_t offset)
+uint32_t tms340x0_device::rfield_s_01(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x01,16);
- return ((INT32)(ret << 31)) >> 31;
+ return ((int32_t)(ret << 31)) >> 31;
}
-UINT32 tms340x0_device::rfield_s_02(offs_t offset)
+uint32_t tms340x0_device::rfield_s_02(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x03,15);
- return ((INT32)(ret << 30)) >> 30;
+ return ((int32_t)(ret << 30)) >> 30;
}
-UINT32 tms340x0_device::rfield_s_03(offs_t offset)
+uint32_t tms340x0_device::rfield_s_03(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x07,14);
- return ((INT32)(ret << 29)) >> 29;
+ return ((int32_t)(ret << 29)) >> 29;
}
-UINT32 tms340x0_device::rfield_s_04(offs_t offset)
+uint32_t tms340x0_device::rfield_s_04(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x0f,13);
- return ((INT32)(ret << 28)) >> 28;
+ return ((int32_t)(ret << 28)) >> 28;
}
-UINT32 tms340x0_device::rfield_s_05(offs_t offset)
+uint32_t tms340x0_device::rfield_s_05(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x1f,12);
- return ((INT32)(ret << 27)) >> 27;
+ return ((int32_t)(ret << 27)) >> 27;
}
-UINT32 tms340x0_device::rfield_s_06(offs_t offset)
+uint32_t tms340x0_device::rfield_s_06(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x3f,11);
- return ((INT32)(ret << 26)) >> 26;
+ return ((int32_t)(ret << 26)) >> 26;
}
-UINT32 tms340x0_device::rfield_s_07(offs_t offset)
+uint32_t tms340x0_device::rfield_s_07(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x7f,10);
- return ((INT32)(ret << 25)) >> 25;
+ return ((int32_t)(ret << 25)) >> 25;
}
-UINT32 tms340x0_device::rfield_s_08(offs_t offset)
+uint32_t tms340x0_device::rfield_s_08(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
if (offset & 0x07)
{
RFIELDMAC(0xff,9);
@@ -491,61 +491,61 @@ UINT32 tms340x0_device::rfield_s_08(offs_t offset)
else
ret = TMS34010_RDMEM(TOBYTE(offset));
- return (INT32)(INT8)ret;
+ return (int32_t)(int8_t)ret;
}
-UINT32 tms340x0_device::rfield_s_09(offs_t offset)
+uint32_t tms340x0_device::rfield_s_09(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x1ff,8);
- return ((INT32)(ret << 23)) >> 23;
+ return ((int32_t)(ret << 23)) >> 23;
}
-UINT32 tms340x0_device::rfield_s_10(offs_t offset)
+uint32_t tms340x0_device::rfield_s_10(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x3ff,7);
- return ((INT32)(ret << 22)) >> 22;
+ return ((int32_t)(ret << 22)) >> 22;
}
-UINT32 tms340x0_device::rfield_s_11(offs_t offset)
+uint32_t tms340x0_device::rfield_s_11(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x7ff,6);
- return ((INT32)(ret << 21)) >> 21;
+ return ((int32_t)(ret << 21)) >> 21;
}
-UINT32 tms340x0_device::rfield_s_12(offs_t offset)
+uint32_t tms340x0_device::rfield_s_12(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0xfff,5);
- return ((INT32)(ret << 20)) >> 20;
+ return ((int32_t)(ret << 20)) >> 20;
}
-UINT32 tms340x0_device::rfield_s_13(offs_t offset)
+uint32_t tms340x0_device::rfield_s_13(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x1fff,4);
- return ((INT32)(ret << 19)) >> 19;
+ return ((int32_t)(ret << 19)) >> 19;
}
-UINT32 tms340x0_device::rfield_s_14(offs_t offset)
+uint32_t tms340x0_device::rfield_s_14(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x3fff,3);
- return ((INT32)(ret << 18)) >> 18;
+ return ((int32_t)(ret << 18)) >> 18;
}
-UINT32 tms340x0_device::rfield_s_15(offs_t offset)
+uint32_t tms340x0_device::rfield_s_15(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x7fff,2);
- return ((INT32)(ret << 17)) >> 17;
+ return ((int32_t)(ret << 17)) >> 17;
}
-UINT32 tms340x0_device::rfield_s_16(offs_t offset)
+uint32_t tms340x0_device::rfield_s_16(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
if (offset & 0x0f)
{
RFIELDMAC(0xffff,1);
@@ -556,112 +556,112 @@ UINT32 tms340x0_device::rfield_s_16(offs_t offset)
ret = TMS34010_RDMEM_WORD(TOBYTE(offset));
}
- return (INT32)(INT16)ret;
+ return (int32_t)(int16_t)ret;
}
-UINT32 tms340x0_device::rfield_s_17(offs_t offset)
+uint32_t tms340x0_device::rfield_s_17(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC(0x1ffff,0);
- return ((INT32)(ret << 15)) >> 15;
+ return ((int32_t)(ret << 15)) >> 15;
}
-UINT32 tms340x0_device::rfield_s_18(offs_t offset)
+uint32_t tms340x0_device::rfield_s_18(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x3ffff,15);
- return ((INT32)(ret << 14)) >> 14;
+ return ((int32_t)(ret << 14)) >> 14;
}
-UINT32 tms340x0_device::rfield_s_19(offs_t offset)
+uint32_t tms340x0_device::rfield_s_19(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x7ffff,14);
- return ((INT32)(ret << 13)) >> 13;
+ return ((int32_t)(ret << 13)) >> 13;
}
-UINT32 tms340x0_device::rfield_s_20(offs_t offset)
+uint32_t tms340x0_device::rfield_s_20(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0xfffff,13);
- return ((INT32)(ret << 12)) >> 12;
+ return ((int32_t)(ret << 12)) >> 12;
}
-UINT32 tms340x0_device::rfield_s_21(offs_t offset)
+uint32_t tms340x0_device::rfield_s_21(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x1fffff,12);
- return ((INT32)(ret << 11)) >> 11;
+ return ((int32_t)(ret << 11)) >> 11;
}
-UINT32 tms340x0_device::rfield_s_22(offs_t offset)
+uint32_t tms340x0_device::rfield_s_22(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x3fffff,11);
- return ((INT32)(ret << 10)) >> 10;
+ return ((int32_t)(ret << 10)) >> 10;
}
-UINT32 tms340x0_device::rfield_s_23(offs_t offset)
+uint32_t tms340x0_device::rfield_s_23(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x7fffff,10);
- return ((INT32)(ret << 9)) >> 9;
+ return ((int32_t)(ret << 9)) >> 9;
}
-UINT32 tms340x0_device::rfield_s_24(offs_t offset)
+uint32_t tms340x0_device::rfield_s_24(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0xffffff,9);
- return ((INT32)(ret << 8)) >> 8;
+ return ((int32_t)(ret << 8)) >> 8;
}
-UINT32 tms340x0_device::rfield_s_25(offs_t offset)
+uint32_t tms340x0_device::rfield_s_25(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x1ffffff,8);
- return ((INT32)(ret << 7)) >> 7;
+ return ((int32_t)(ret << 7)) >> 7;
}
-UINT32 tms340x0_device::rfield_s_26(offs_t offset)
+uint32_t tms340x0_device::rfield_s_26(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x3ffffff,7);
- return ((INT32)(ret << 6)) >> 6;
+ return ((int32_t)(ret << 6)) >> 6;
}
-UINT32 tms340x0_device::rfield_s_27(offs_t offset)
+uint32_t tms340x0_device::rfield_s_27(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x7ffffff,6);
- return ((INT32)(ret << 5)) >> 5;
+ return ((int32_t)(ret << 5)) >> 5;
}
-UINT32 tms340x0_device::rfield_s_28(offs_t offset)
+uint32_t tms340x0_device::rfield_s_28(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0xfffffff,5);
- return ((INT32)(ret << 4)) >> 4;
+ return ((int32_t)(ret << 4)) >> 4;
}
-UINT32 tms340x0_device::rfield_s_29(offs_t offset)
+uint32_t tms340x0_device::rfield_s_29(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x1fffffff,4);
- return ((INT32)(ret << 3)) >> 3;
+ return ((int32_t)(ret << 3)) >> 3;
}
-UINT32 tms340x0_device::rfield_s_30(offs_t offset)
+uint32_t tms340x0_device::rfield_s_30(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x3fffffff,3);
- return ((INT32)(ret << 2)) >> 2;
+ return ((int32_t)(ret << 2)) >> 2;
}
-UINT32 tms340x0_device::rfield_s_31(offs_t offset)
+uint32_t tms340x0_device::rfield_s_31(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_BIG(0x7fffffff,2);
- return ((INT32)(ret << 1)) >> 1;
+ return ((int32_t)(ret << 1)) >> 1;
}
const tms340x0_device::rfield_func tms340x0_device::s_rfield_functions[64] =
diff --git a/src/devices/cpu/tms34010/34010gfx.hxx b/src/devices/cpu/tms34010/34010gfx.hxx
index ece6085fd6e..5c92ad36b6b 100644
--- a/src/devices/cpu/tms34010/34010gfx.hxx
+++ b/src/devices/cpu/tms34010/34010gfx.hxx
@@ -18,7 +18,7 @@
/* Graphics Instructions */
-void tms340x0_device::line(UINT16 op)
+void tms340x0_device::line(uint16_t op)
{
if (!P_FLAG())
{
@@ -32,7 +32,7 @@ void tms340x0_device::line(UINT16 op)
if (COUNT() > 0)
{
- INT16 x1,y1;
+ int16_t x1,y1;
COUNT()--;
if (WINDOW_CHECKING() != 3 ||
@@ -72,7 +72,7 @@ cases:
* directions (left->right/right->left, top->bottom/bottom->top)
*/
-int tms340x0_device::apply_window(const char *inst_name,int srcbpp, UINT32 *srcaddr, XY *dst, int *dx, int *dy)
+int tms340x0_device::apply_window(const char *inst_name,int srcbpp, uint32_t *srcaddr, XY *dst, int *dx, int *dy)
{
/* apply the window */
if (WINDOW_CHECKING() == 0)
@@ -205,34 +205,34 @@ int tms340x0_device::compute_pixblt_b_cycles(int left_partials, int right_partia
/* Shift register handling */
-void tms340x0_device::memory_w(address_space &space, offs_t offset,UINT16 data)
+void tms340x0_device::memory_w(address_space &space, offs_t offset,uint16_t data)
{
space.write_word(offset, data);
}
-UINT16 tms340x0_device::memory_r(address_space &space, offs_t offset)
+uint16_t tms340x0_device::memory_r(address_space &space, offs_t offset)
{
return space.read_word(offset);
}
-void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,UINT16 data)
+void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,uint16_t data)
{
if (!m_from_shiftreg_cb.isnull())
- m_from_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
+ m_from_shiftreg_cb(space, (uint32_t)(offset << 3) & ~15, &m_shiftreg[0]);
else
logerror("From ShiftReg function not set. PC = %08X\n", m_pc);
}
-UINT16 tms340x0_device::shiftreg_r(address_space &space, offs_t offset)
+uint16_t tms340x0_device::shiftreg_r(address_space &space, offs_t offset)
{
if (!m_to_shiftreg_cb.isnull())
- m_to_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
+ m_to_shiftreg_cb(space, (uint32_t)(offset << 3) & ~15, &m_shiftreg[0]);
else
logerror("To ShiftReg function not set. PC = %08X\n", m_pc);
return m_shiftreg[0];
}
-UINT16 tms340x0_device::dummy_shiftreg_r(address_space &space, offs_t offset)
+uint16_t tms340x0_device::dummy_shiftreg_r(address_space &space, offs_t offset)
{
return m_shiftreg[0];
}
@@ -240,28 +240,28 @@ UINT16 tms340x0_device::dummy_shiftreg_r(address_space &space, offs_t offset)
/* Pixel operations */
-UINT32 tms340x0_device::pixel_op00(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix; }
-UINT32 tms340x0_device::pixel_op01(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & dstpix; }
-UINT32 tms340x0_device::pixel_op02(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & ~dstpix; }
-UINT32 tms340x0_device::pixel_op03(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return 0; }
-UINT32 tms340x0_device::pixel_op04(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | ~dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op05(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix ^ dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op06(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~dstpix & mask; }
-UINT32 tms340x0_device::pixel_op07(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix | dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op08(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op09(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return dstpix & mask; }
-UINT32 tms340x0_device::pixel_op10(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix ^ dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op11(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op12(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return mask; }
-UINT32 tms340x0_device::pixel_op13(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op14(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix & dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op15(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix ^ mask; }
-UINT32 tms340x0_device::pixel_op16(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix + dstpix) & mask; }
-UINT32 tms340x0_device::pixel_op17(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix + (dstpix & mask); return (tmp > mask) ? mask : tmp; }
-UINT32 tms340x0_device::pixel_op18(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (dstpix - srcpix) & mask; }
-UINT32 tms340x0_device::pixel_op19(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix - (dstpix & mask); return (tmp < 0) ? 0 : tmp; }
-UINT32 tms340x0_device::pixel_op20(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix > dstpix) ? srcpix : dstpix; }
-UINT32 tms340x0_device::pixel_op21(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix < dstpix) ? srcpix : dstpix; }
+uint32_t tms340x0_device::pixel_op00(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return srcpix; }
+uint32_t tms340x0_device::pixel_op01(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return srcpix & dstpix; }
+uint32_t tms340x0_device::pixel_op02(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return srcpix & ~dstpix; }
+uint32_t tms340x0_device::pixel_op03(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return 0; }
+uint32_t tms340x0_device::pixel_op04(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return (srcpix | ~dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op05(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return ~(srcpix ^ dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op06(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return ~dstpix & mask; }
+uint32_t tms340x0_device::pixel_op07(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return ~(srcpix | dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op08(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return (srcpix | dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op09(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return dstpix & mask; }
+uint32_t tms340x0_device::pixel_op10(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return (srcpix ^ dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op11(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return (~srcpix & dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op12(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return mask; }
+uint32_t tms340x0_device::pixel_op13(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return (~srcpix & dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op14(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return ~(srcpix & dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op15(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return srcpix ^ mask; }
+uint32_t tms340x0_device::pixel_op16(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return (srcpix + dstpix) & mask; }
+uint32_t tms340x0_device::pixel_op17(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { int32_t tmp = srcpix + (dstpix & mask); return (tmp > mask) ? mask : tmp; }
+uint32_t tms340x0_device::pixel_op18(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { return (dstpix - srcpix) & mask; }
+uint32_t tms340x0_device::pixel_op19(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { int32_t tmp = srcpix - (dstpix & mask); return (tmp < 0) ? 0 : tmp; }
+uint32_t tms340x0_device::pixel_op20(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { dstpix &= mask; return (srcpix > dstpix) ? srcpix : dstpix; }
+uint32_t tms340x0_device::pixel_op21(uint32_t dstpix, uint32_t mask, uint32_t srcpix) { dstpix &= mask; return (srcpix < dstpix) ? srcpix : dstpix; }
const tms340x0_device::pixel_op_func tms340x0_device::s_pixel_op_table[32] =
{
@@ -270,7 +270,7 @@ const tms340x0_device::pixel_op_func tms340x0_device::s_pixel_op_table[32] =
&tms340x0_device::pixel_op16, &tms340x0_device::pixel_op17, &tms340x0_device::pixel_op18, &tms340x0_device::pixel_op19, &tms340x0_device::pixel_op20, &tms340x0_device::pixel_op21, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00,
&tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00
};
-const UINT8 tms340x0_device::s_pixel_op_timing_table[33] =
+const uint8_t tms340x0_device::s_pixel_op_timing_table[33] =
{
2,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,5,5,6,5,5,2,2,2,2,2,2,2,2,2,2,2
};
@@ -817,13 +817,13 @@ const tms340x0_device::pixblt_b_op_func tms340x0_device::s_fill_op_table[] =
#undef PIXEL_OP_TIMING
#undef PIXEL_OP
-static const UINT8 pixelsize_lookup[32] =
+static const uint8_t pixelsize_lookup[32] =
{
0,0,1,1,2,2,2,2,3,3,3,3,3,3,3,3,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
};
-void tms340x0_device::pixblt_b_l(UINT16 op)
+void tms340x0_device::pixblt_b_l(uint16_t op)
{
int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
@@ -835,7 +835,7 @@ void tms340x0_device::pixblt_b_l(UINT16 op)
(this->*s_pixblt_b_op_table[ix])(1);
}
-void tms340x0_device::pixblt_b_xy(UINT16 op)
+void tms340x0_device::pixblt_b_xy(uint16_t op)
{
int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
@@ -847,7 +847,7 @@ void tms340x0_device::pixblt_b_xy(UINT16 op)
(this->*s_pixblt_b_op_table[ix])(0);
}
-void tms340x0_device::pixblt_l_l(UINT16 op)
+void tms340x0_device::pixblt_l_l(uint16_t op)
{
int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
@@ -863,7 +863,7 @@ void tms340x0_device::pixblt_l_l(UINT16 op)
(this->*s_pixblt_r_op_table[ix])(1, 1);
}
-void tms340x0_device::pixblt_l_xy(UINT16 op)
+void tms340x0_device::pixblt_l_xy(uint16_t op)
{
int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
@@ -879,7 +879,7 @@ void tms340x0_device::pixblt_l_xy(UINT16 op)
(this->*s_pixblt_r_op_table[ix])(1, 0);
}
-void tms340x0_device::pixblt_xy_l(UINT16 op)
+void tms340x0_device::pixblt_xy_l(uint16_t op)
{
int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
@@ -895,7 +895,7 @@ void tms340x0_device::pixblt_xy_l(UINT16 op)
(this->*s_pixblt_r_op_table[ix])(0, 1);
}
-void tms340x0_device::pixblt_xy_xy(UINT16 op)
+void tms340x0_device::pixblt_xy_xy(uint16_t op)
{
int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
@@ -911,7 +911,7 @@ void tms340x0_device::pixblt_xy_xy(UINT16 op)
(this->*s_pixblt_r_op_table[ix])(0, 0);
}
-void tms340x0_device::fill_l(UINT16 op)
+void tms340x0_device::fill_l(uint16_t op)
{
int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
@@ -923,7 +923,7 @@ void tms340x0_device::fill_l(UINT16 op)
(this->*s_fill_op_table[ix])(1);
}
-void tms340x0_device::fill_xy(UINT16 op)
+void tms340x0_device::fill_xy(uint16_t op)
{
int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f];
int trans = (IOREG(REG_CONTROL) & 0x20) >> 5;
@@ -953,8 +953,8 @@ void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear
int dx, dy, x, y, /*words,*/ yreverse;
word_write_func word_write;
word_read_func word_read;
- UINT32 readwrites = 0;
- UINT32 saddr, daddr;
+ uint32_t readwrites = 0;
+ uint32_t saddr, daddr;
XY dstxy = { 0 };
/* determine read/write functions */
@@ -973,8 +973,8 @@ void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear
saddr = src_is_linear ? SADDR() : SXYTOL(SADDR_XY());
/* compute the bounds of the operation */
- dx = (INT16)DYDX_X();
- dy = (INT16)DYDX_Y();
+ dx = (int16_t)DYDX_X();
+ dy = (int16_t)DYDX_Y();
/* apply the window for non-linear destinations */
m_gfxcycles = 7 + (src_is_linear ? 0 : 2);
@@ -1021,11 +1021,11 @@ void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear
/* loop over rows */
for (y = 0; y < dy; y++)
{
- UINT32 srcwordaddr = saddr >> 4;
- UINT32 dstwordaddr = daddr >> 4;
- UINT8 srcbit = saddr & 15;
- UINT8 dstbit = daddr & 15;
- UINT32 srcword, dstword = 0;
+ uint32_t srcwordaddr = saddr >> 4;
+ uint32_t dstwordaddr = daddr >> 4;
+ uint8_t srcbit = saddr & 15;
+ uint8_t dstbit = daddr & 15;
+ uint32_t srcword, dstword = 0;
/* fetch the initial source word */
srcword = (this->*word_read)(*m_program, srcwordaddr++ << 1);
@@ -1041,8 +1041,8 @@ void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear
/* loop over pixels */
for (x = 0; x < dx; x++)
{
- UINT32 dstmask;
- UINT32 pixel;
+ uint32_t dstmask;
+ uint32_t pixel;
/* fetch more words if necessary */
if (srcbit + BITS_PER_PIXEL > 16)
@@ -1092,8 +1092,8 @@ void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear
/* if we're right-partial, read and mask the remaining bits */
if (dstbit != 16)
{
- UINT16 origdst = (this->*word_read)(*m_program, dstwordaddr << 1);
- UINT16 mask = 0xffff << dstbit;
+ uint16_t origdst = (this->*word_read)(*m_program, dstwordaddr << 1);
+ uint16_t mask = 0xffff << dstbit;
dstword = (dstword & ~mask) | (origdst & mask);
readwrites++;
}
@@ -1106,8 +1106,8 @@ void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear
#if 0
int left_partials, right_partials, full_words, bitshift, bitshift_alt;
- UINT16 srcword, srcmask, dstword, dstmask, pixel;
- UINT32 swordaddr, dwordaddr;
+ uint16_t srcword, srcmask, dstword, dstmask, pixel;
+ uint32_t swordaddr, dwordaddr;
/* determine the bit shift to get from source to dest */
bitshift = ((daddr & 15) - (saddr & 15)) & 15;
@@ -1302,7 +1302,7 @@ void FUNCTION_NAME(tms340x0_device::pixblt_r)(int src_is_linear, int dst_is_line
int dx, dy, x, y, words, yreverse;
word_write_func word_write;
word_read_func word_read;
- UINT32 saddr, daddr;
+ uint32_t saddr, daddr;
XY dstxy = { 0 };
/* determine read/write functions */
@@ -1323,8 +1323,8 @@ if ((saddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd s
saddr &= ~(BITS_PER_PIXEL - 1);
/* compute the bounds of the operation */
- dx = (INT16)DYDX_X();
- dy = (INT16)DYDX_Y();
+ dx = (int16_t)DYDX_X();
+ dy = (int16_t)DYDX_Y();
/* apply the window for non-linear destinations */
m_gfxcycles = 7 + (src_is_linear ? 0 : 2);
@@ -1375,8 +1375,8 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d
for (y = 0; y < dy; y++)
{
int left_partials, right_partials, full_words, bitshift, bitshift_alt;
- UINT16 srcword, srcmask, dstword, dstmask, pixel;
- UINT32 swordaddr, dwordaddr;
+ uint16_t srcword, srcmask, dstword, dstmask, pixel;
+ uint32_t swordaddr, dwordaddr;
/* determine the bit shift to get from source to dest */
bitshift = ((daddr & 15) - (saddr & 15)) & 15;
@@ -1582,7 +1582,7 @@ void FUNCTION_NAME(tms340x0_device::pixblt_b)(int dst_is_linear)
int dx, dy, x, y, words, left_partials, right_partials, full_words;
word_write_func word_write;
word_read_func word_read;
- UINT32 saddr, daddr;
+ uint32_t saddr, daddr;
XY dstxy = { 0 };
/* determine read/write functions */
@@ -1601,8 +1601,8 @@ void FUNCTION_NAME(tms340x0_device::pixblt_b)(int dst_is_linear)
saddr = SADDR();
/* compute the bounds of the operation */
- dx = (INT16)DYDX_X();
- dy = (INT16)DYDX_Y();
+ dx = (int16_t)DYDX_X();
+ dy = (int16_t)DYDX_Y();
/* apply the window for non-linear destinations */
m_gfxcycles = 4;
@@ -1649,8 +1649,8 @@ void FUNCTION_NAME(tms340x0_device::pixblt_b)(int dst_is_linear)
/* loop over rows */
for (y = 0; y < dy; y++)
{
- UINT16 srcword, srcmask, dstword, dstmask, pixel;
- UINT32 swordaddr, dwordaddr;
+ uint16_t srcword, srcmask, dstword, dstmask, pixel;
+ uint32_t swordaddr, dwordaddr;
/* use byte addresses each row */
swordaddr = saddr >> 4;
@@ -1796,7 +1796,7 @@ void FUNCTION_NAME(tms340x0_device::fill)(int dst_is_linear)
int dx, dy, x, y, words, left_partials, right_partials, full_words;
word_write_func word_write;
word_read_func word_read;
- UINT32 daddr;
+ uint32_t daddr;
XY dstxy = { 0 };
/* determine read/write functions */
@@ -1812,8 +1812,8 @@ void FUNCTION_NAME(tms340x0_device::fill)(int dst_is_linear)
}
/* compute the bounds of the operation */
- dx = (INT16)DYDX_X();
- dy = (INT16)DYDX_Y();
+ dx = (int16_t)DYDX_X();
+ dy = (int16_t)DYDX_Y();
/* apply the window for non-linear destinations */
m_gfxcycles = 4;
@@ -1860,8 +1860,8 @@ void FUNCTION_NAME(tms340x0_device::fill)(int dst_is_linear)
/* loop over rows */
for (y = 0; y < dy; y++)
{
- UINT16 dstword, dstmask, pixel;
- UINT32 dwordaddr;
+ uint16_t dstword, dstmask, pixel;
+ uint32_t dwordaddr;
/* use byte addresses each row */
dwordaddr = daddr >> 4;
diff --git a/src/devices/cpu/tms34010/34010ops.h b/src/devices/cpu/tms34010/34010ops.h
index 6dad233c034..39833b35d77 100644
--- a/src/devices/cpu/tms34010/34010ops.h
+++ b/src/devices/cpu/tms34010/34010ops.h
@@ -23,15 +23,15 @@
#define TMS34010_RDMEM(A) ((unsigned)m_program->read_byte (A))
#define TMS34010_RDMEM_WORD(A) ((unsigned)m_program->read_word (A))
-inline UINT32 tms340x0_device::TMS34010_RDMEM_DWORD(offs_t A)
+inline uint32_t tms340x0_device::TMS34010_RDMEM_DWORD(offs_t A)
{
- UINT32 result = m_program->read_word(A);
+ uint32_t result = m_program->read_word(A);
return result | (m_program->read_word(A+2)<<16);
}
#define TMS34010_WRMEM(A,V) (m_program->write_byte(A,V))
#define TMS34010_WRMEM_WORD(A,V) (m_program->write_word(A,V))
-inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, UINT32 V)
+inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, uint32_t V)
{
m_program->write_word(A,V);
m_program->write_word(A+2,V>>16);
@@ -52,36 +52,36 @@ inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, UINT32 V)
***************************************************************************/
#define WFIELDMAC(MASK,MAX) \
- UINT32 shift = offset & 0x0f; \
- UINT32 masked_data = data & (MASK); \
- UINT32 old; \
+ uint32_t shift = offset & 0x0f; \
+ uint32_t masked_data = data & (MASK); \
+ uint32_t old; \
\
offset = TOBYTE(offset & 0xfffffff0); \
\
if (shift >= MAX) \
{ \
- old = (UINT32)TMS34010_RDMEM_DWORD(offset) & ~((MASK) << shift); \
+ old = (uint32_t)TMS34010_RDMEM_DWORD(offset) & ~((MASK) << shift); \
TMS34010_WRMEM_DWORD(offset, (masked_data << shift) | old); \
} \
else \
{ \
- old = (UINT32)TMS34010_RDMEM_WORD(offset) & ~((MASK) << shift); \
+ old = (uint32_t)TMS34010_RDMEM_WORD(offset) & ~((MASK) << shift); \
TMS34010_WRMEM_WORD(offset, ((masked_data & (MASK)) << shift) | old); \
}
#define WFIELDMAC_BIG(MASK,MAX) \
- UINT32 shift = offset & 0x0f; \
- UINT32 masked_data = data & (MASK); \
- UINT32 old; \
+ uint32_t shift = offset & 0x0f; \
+ uint32_t masked_data = data & (MASK); \
+ uint32_t old; \
\
offset = TOBYTE(offset & 0xfffffff0); \
\
- old = (UINT32)TMS34010_RDMEM_DWORD(offset) & ~(UINT32)((MASK) << shift); \
- TMS34010_WRMEM_DWORD(offset, (UINT32)(masked_data << shift) | old); \
+ old = (uint32_t)TMS34010_RDMEM_DWORD(offset) & ~(uint32_t)((MASK) << shift); \
+ TMS34010_WRMEM_DWORD(offset, (uint32_t)(masked_data << shift) | old); \
if (shift >= MAX) \
{ \
shift = 32 - shift; \
- old = (UINT32)TMS34010_RDMEM_WORD(offset + 4) & ~((MASK) >> shift); \
+ old = (uint32_t)TMS34010_RDMEM_WORD(offset + 4) & ~((MASK) >> shift); \
TMS34010_WRMEM_WORD(offset, (masked_data >> shift) | old); \
}
@@ -104,12 +104,12 @@ inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, UINT32 V)
#define WFIELDMAC_32() \
if (offset & 0x0f) \
{ \
- UINT32 shift = offset&0x0f; \
- UINT32 old; \
- UINT32 hiword; \
+ uint32_t shift = offset&0x0f; \
+ uint32_t old; \
+ uint32_t hiword; \
offset &= 0xfffffff0; \
- old = ((UINT32) TMS34010_RDMEM_DWORD (TOBYTE(offset ))&(0xffffffff>>(0x20-shift))); \
- hiword = ((UINT32) TMS34010_RDMEM_DWORD (TOBYTE(offset+0x20))&(0xffffffff<<shift)); \
+ old = ((uint32_t) TMS34010_RDMEM_DWORD (TOBYTE(offset ))&(0xffffffff>>(0x20-shift))); \
+ hiword = ((uint32_t) TMS34010_RDMEM_DWORD (TOBYTE(offset+0x20))&(0xffffffff<<shift)); \
TMS34010_WRMEM_DWORD(TOBYTE(offset ),(data<< shift) |old); \
TMS34010_WRMEM_DWORD(TOBYTE(offset+0x20),(data>>(0x20-shift))|hiword); \
} \
@@ -122,7 +122,7 @@ inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, UINT32 V)
***************************************************************************/
#define RFIELDMAC(MASK,MAX) \
- UINT32 shift = offset & 0x0f; \
+ uint32_t shift = offset & 0x0f; \
offset = TOBYTE(offset & 0xfffffff0); \
\
if (shift >= MAX) \
@@ -131,10 +131,10 @@ inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, UINT32 V)
ret = (TMS34010_RDMEM_WORD(offset) >> shift) & (MASK);
#define RFIELDMAC_BIG(MASK,MAX) \
- UINT32 shift = offset & 0x0f; \
+ uint32_t shift = offset & 0x0f; \
offset = TOBYTE(offset & 0xfffffff0); \
\
- ret = (UINT32)TMS34010_RDMEM_DWORD(offset) >> shift; \
+ ret = (uint32_t)TMS34010_RDMEM_DWORD(offset) >> shift; \
if (shift >= MAX) \
ret |= (TMS34010_RDMEM_WORD(offset + 4) << (32 - shift)); \
ret &= MASK;
@@ -142,9 +142,9 @@ inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, UINT32 V)
#define RFIELDMAC_32() \
if (offset&0x0f) \
{ \
- UINT32 shift = offset&0x0f; \
+ uint32_t shift = offset&0x0f; \
offset &= 0xfffffff0; \
- return (((UINT32)TMS34010_RDMEM_DWORD (TOBYTE(offset ))>> shift) | \
+ return (((uint32_t)TMS34010_RDMEM_DWORD (TOBYTE(offset ))>> shift) | \
(TMS34010_RDMEM_DWORD (TOBYTE(offset+0x20))<<(0x20-shift)));\
} \
else \
diff --git a/src/devices/cpu/tms34010/34010ops.hxx b/src/devices/cpu/tms34010/34010ops.hxx
index 9b4300b6600..57b5cca536e 100644
--- a/src/devices/cpu/tms34010/34010ops.hxx
+++ b/src/devices/cpu/tms34010/34010ops.hxx
@@ -15,12 +15,12 @@
MISC MACROS
***************************************************************************/
-#define ZEXTEND(val,width) if (width) (val) &= ((UINT32)0xffffffff >> (32 - (width)))
-#define SEXTEND(val,width) if (width) (val) = (INT32)((val) << (32 - (width))) >> (32 - (width))
+#define ZEXTEND(val,width) if (width) (val) &= ((uint32_t)0xffffffff >> (32 - (width)))
+#define SEXTEND(val,width) if (width) (val) = (int32_t)((val) << (32 - (width))) >> (32 - (width))
-#define SXYTOL(val) ((((INT16)(val).y * m_convsp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
-#define DXYTOL(val) ((((INT16)(val).y * m_convdp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
-#define MXYTOL(val) ((((INT16)(val).y * m_convmp) + ((INT16)(val).x << m_pixelshift)) + OFFSET())
+#define SXYTOL(val) ((((int16_t)(val).y * m_convsp) + ((int16_t)(val).x << m_pixelshift)) + OFFSET())
+#define DXYTOL(val) ((((int16_t)(val).y * m_convdp) + ((int16_t)(val).x << m_pixelshift)) + OFFSET())
+#define MXYTOL(val) ((((int16_t)(val).y * m_convmp) + ((int16_t)(val).x << m_pixelshift)) + OFFSET())
#define COUNT_CYCLES(x) m_icount -= x
#define COUNT_UNKNOWN_CYCLES(x) COUNT_CYCLES(x)
@@ -63,20 +63,20 @@
#define SET_NZ_VAL(val) SET_Z_VAL(val); SET_N_VAL(val)
#define SET_V_SUB(a,b,r) SET_V_BIT_HI(((a) ^ (b)) & ((a) ^ (r)), 31)
#define SET_V_ADD(a,b,r) SET_V_BIT_HI(~((a) ^ (b)) & ((a) ^ (r)), 31)
-#define SET_C_SUB(a,b) SET_C_LOG((UINT32)(b) > (UINT32)(a))
-#define SET_C_ADD(a,b) SET_C_LOG((UINT32)~(a) < (UINT32)(b))
+#define SET_C_SUB(a,b) SET_C_LOG((uint32_t)(b) > (uint32_t)(a))
+#define SET_C_ADD(a,b) SET_C_LOG((uint32_t)~(a) < (uint32_t)(b))
#define SET_NZV_SUB(a,b,r) SET_NZ_VAL(r); SET_V_SUB(a,b,r)
#define SET_NZCV_SUB(a,b,r) SET_NZV_SUB(a,b,r); SET_C_SUB(a,b)
#define SET_NZCV_ADD(a,b,r) SET_NZ_VAL(r); SET_V_ADD(a,b,r); SET_C_ADD(a,b)
-static const UINT8 fw_inc[32] = { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
+static const uint8_t fw_inc[32] = { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
/***************************************************************************
UNIMPLEMENTED INSTRUCTION
***************************************************************************/
-void tms340x0_device::unimpl(UINT16 op)
+void tms340x0_device::unimpl(uint16_t op)
{
/* kludge for Super High Impact -- this doesn't seem to cause */
/* an illegal opcode exception */
@@ -122,8 +122,8 @@ void tms340x0_device::unimpl(UINT16 op)
SET_V_BIT_LO(b->x, 15); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::add_xy_a(UINT16 op) { ADD_XY(A); }
-void tms340x0_device::add_xy_b(UINT16 op) { ADD_XY(B); }
+void tms340x0_device::add_xy_a(uint16_t op) { ADD_XY(A); }
+void tms340x0_device::add_xy_b(uint16_t op) { ADD_XY(B); }
#define SUB_XY(R) \
{ \
@@ -138,12 +138,12 @@ void tms340x0_device::add_xy_b(UINT16 op) { ADD_XY(B); }
b->y -= a.y; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::sub_xy_a(UINT16 op) { SUB_XY(A); }
-void tms340x0_device::sub_xy_b(UINT16 op) { SUB_XY(B); }
+void tms340x0_device::sub_xy_a(uint16_t op) { SUB_XY(A); }
+void tms340x0_device::sub_xy_b(uint16_t op) { SUB_XY(B); }
#define CMP_XY(R) \
{ \
- INT16 res; \
+ int16_t res; \
XY a = R##REG_XY(DSTREG(op)); \
XY b = R##REG_XY(SRCREG(op)); \
CLR_NCZV(); \
@@ -155,14 +155,14 @@ void tms340x0_device::sub_xy_b(UINT16 op) { SUB_XY(B); }
SET_C_BIT_LO(res, 15); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::cmp_xy_a(UINT16 op) { CMP_XY(A); }
-void tms340x0_device::cmp_xy_b(UINT16 op) { CMP_XY(B); }
+void tms340x0_device::cmp_xy_a(uint16_t op) { CMP_XY(A); }
+void tms340x0_device::cmp_xy_b(uint16_t op) { CMP_XY(B); }
#define CPW(R) \
{ \
- INT32 res = 0; \
- INT16 x = R##REG_X(SRCREG(op)); \
- INT16 y = R##REG_Y(SRCREG(op)); \
+ int32_t res = 0; \
+ int16_t x = R##REG_X(SRCREG(op)); \
+ int16_t y = R##REG_Y(SRCREG(op)); \
\
CLR_V(); \
res |= ((WSTART_X() > x) ? 0x20 : 0); \
@@ -173,32 +173,32 @@ void tms340x0_device::cmp_xy_b(UINT16 op) { CMP_XY(B); }
SET_V_LOG(res != 0); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::cpw_a(UINT16 op) { CPW(A); }
-void tms340x0_device::cpw_b(UINT16 op) { CPW(B); }
+void tms340x0_device::cpw_a(uint16_t op) { CPW(A); }
+void tms340x0_device::cpw_b(uint16_t op) { CPW(B); }
#define CVXYL(R) \
{ \
R##REG(DSTREG(op)) = DXYTOL(R##REG_XY(SRCREG(op))); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::cvxyl_a(UINT16 op) { CVXYL(A); }
-void tms340x0_device::cvxyl_b(UINT16 op) { CVXYL(B); }
+void tms340x0_device::cvxyl_a(uint16_t op) { CVXYL(A); }
+void tms340x0_device::cvxyl_b(uint16_t op) { CVXYL(B); }
#define MOVX(R) \
{ \
- R##REG(DSTREG(op)) = (R##REG(DSTREG(op)) & 0xffff0000) | (UINT16)R##REG(SRCREG(op)); \
+ R##REG(DSTREG(op)) = (R##REG(DSTREG(op)) & 0xffff0000) | (uint16_t)R##REG(SRCREG(op)); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::movx_a(UINT16 op) { MOVX(A); }
-void tms340x0_device::movx_b(UINT16 op) { MOVX(B); }
+void tms340x0_device::movx_a(uint16_t op) { MOVX(A); }
+void tms340x0_device::movx_b(uint16_t op) { MOVX(B); }
#define MOVY(R) \
{ \
- R##REG(DSTREG(op)) = (R##REG(SRCREG(op)) & 0xffff0000) | (UINT16)R##REG(DSTREG(op)); \
+ R##REG(DSTREG(op)) = (R##REG(SRCREG(op)) & 0xffff0000) | (uint16_t)R##REG(DSTREG(op)); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::movy_a(UINT16 op) { MOVY(A); }
-void tms340x0_device::movy_b(UINT16 op) { MOVY(B); }
+void tms340x0_device::movy_a(uint16_t op) { MOVY(A); }
+void tms340x0_device::movy_b(uint16_t op) { MOVY(B); }
@@ -211,8 +211,8 @@ void tms340x0_device::movy_b(UINT16 op) { MOVY(B); }
WPIXEL(R##REG(DSTREG(op)),R##REG(SRCREG(op))); \
COUNT_UNKNOWN_CYCLES(2); \
}
-void tms340x0_device::pixt_ri_a(UINT16 op) { PIXT_RI(A); }
-void tms340x0_device::pixt_ri_b(UINT16 op) { PIXT_RI(B); }
+void tms340x0_device::pixt_ri_a(uint16_t op) { PIXT_RI(A); }
+void tms340x0_device::pixt_ri_b(uint16_t op) { PIXT_RI(B); }
#define PIXT_RIXY(R) \
{ \
@@ -231,38 +231,38 @@ void tms340x0_device::pixt_ri_b(UINT16 op) { PIXT_RI(B); }
skip: \
COUNT_UNKNOWN_CYCLES(4); \
}
-void tms340x0_device::pixt_rixy_a(UINT16 op) { PIXT_RIXY(A); }
-void tms340x0_device::pixt_rixy_b(UINT16 op) { PIXT_RIXY(B); }
+void tms340x0_device::pixt_rixy_a(uint16_t op) { PIXT_RIXY(A); }
+void tms340x0_device::pixt_rixy_b(uint16_t op) { PIXT_RIXY(B); }
#define PIXT_IR(R) \
{ \
- INT32 temp = RPIXEL(R##REG(SRCREG(op))); \
+ int32_t temp = RPIXEL(R##REG(SRCREG(op))); \
CLR_V(); \
R##REG(DSTREG(op)) = temp; \
SET_V_LOG(temp != 0); \
COUNT_CYCLES(4); \
}
-void tms340x0_device::pixt_ir_a(UINT16 op) { PIXT_IR(A); }
-void tms340x0_device::pixt_ir_b(UINT16 op) { PIXT_IR(B); }
+void tms340x0_device::pixt_ir_a(uint16_t op) { PIXT_IR(A); }
+void tms340x0_device::pixt_ir_b(uint16_t op) { PIXT_IR(B); }
#define PIXT_II(R) \
{ \
WPIXEL(R##REG(DSTREG(op)),RPIXEL(R##REG(SRCREG(op)))); \
COUNT_UNKNOWN_CYCLES(4); \
}
-void tms340x0_device::pixt_ii_a(UINT16 op) { PIXT_II(A); }
-void tms340x0_device::pixt_ii_b(UINT16 op) { PIXT_II(B); }
+void tms340x0_device::pixt_ii_a(uint16_t op) { PIXT_II(A); }
+void tms340x0_device::pixt_ii_b(uint16_t op) { PIXT_II(B); }
#define PIXT_IXYR(R) \
{ \
- INT32 temp = RPIXEL(SXYTOL(R##REG_XY(SRCREG(op)))); \
+ int32_t temp = RPIXEL(SXYTOL(R##REG_XY(SRCREG(op)))); \
CLR_V(); \
R##REG(DSTREG(op)) = temp; \
SET_V_LOG(temp != 0); \
COUNT_CYCLES(6); \
}
-void tms340x0_device::pixt_ixyr_a(UINT16 op) { PIXT_IXYR(A); }
-void tms340x0_device::pixt_ixyr_b(UINT16 op) { PIXT_IXYR(B); }
+void tms340x0_device::pixt_ixyr_a(uint16_t op) { PIXT_IXYR(A); }
+void tms340x0_device::pixt_ixyr_b(uint16_t op) { PIXT_IXYR(B); }
#define PIXT_IXYIXY(R) \
{ \
@@ -281,8 +281,8 @@ void tms340x0_device::pixt_ixyr_b(UINT16 op) { PIXT_IXYR(B); }
skip: \
COUNT_UNKNOWN_CYCLES(7); \
}
-void tms340x0_device::pixt_ixyixy_a(UINT16 op) { PIXT_IXYIXY(A); }
-void tms340x0_device::pixt_ixyixy_b(UINT16 op) { PIXT_IXYIXY(B); }
+void tms340x0_device::pixt_ixyixy_a(uint16_t op) { PIXT_IXYIXY(A); }
+void tms340x0_device::pixt_ixyixy_b(uint16_t op) { PIXT_IXYIXY(B); }
#define DRAV(R) \
{ \
@@ -303,8 +303,8 @@ skip:
R##REG_Y(DSTREG(op)) += R##REG_Y(SRCREG(op)); \
COUNT_UNKNOWN_CYCLES(4); \
}
-void tms340x0_device::drav_a(UINT16 op) { DRAV(A); }
-void tms340x0_device::drav_b(UINT16 op) { DRAV(B); }
+void tms340x0_device::drav_a(uint16_t op) { DRAV(A); }
+void tms340x0_device::drav_b(uint16_t op) { DRAV(B); }
@@ -314,121 +314,121 @@ void tms340x0_device::drav_b(UINT16 op) { DRAV(B); }
#define ABS(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 r = 0 - *rd; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t r = 0 - *rd; \
CLR_NZV(); \
if (r > 0) *rd = r; \
SET_NZ_VAL(r); \
- SET_V_LOG(r == (INT32)0x80000000); \
+ SET_V_LOG(r == (int32_t)0x80000000); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::abs_a(UINT16 op) { ABS(A); }
-void tms340x0_device::abs_b(UINT16 op) { ABS(B); }
+void tms340x0_device::abs_a(uint16_t op) { ABS(A); }
+void tms340x0_device::abs_b(uint16_t op) { ABS(B); }
#define ADD(R) \
{ \
- INT32 a = R##REG(SRCREG(op)); \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b; \
+ int32_t a = R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t b = *rd; \
+ int32_t r = a + b; \
CLR_NCZV(); \
*rd = r; \
SET_NZCV_ADD(a,b,r); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::add_a(UINT16 op) { ADD(A); }
-void tms340x0_device::add_b(UINT16 op) { ADD(B); }
+void tms340x0_device::add_a(uint16_t op) { ADD(A); }
+void tms340x0_device::add_b(uint16_t op) { ADD(B); }
#define ADDC(R) \
{ \
/* I'm not sure to which side the carry is added to, should */ \
/* verify it against the examples */ \
- INT32 a = R##REG(SRCREG(op)); \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b + (C_FLAG() ? 1 : 0); \
+ int32_t a = R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t b = *rd; \
+ int32_t r = a + b + (C_FLAG() ? 1 : 0); \
CLR_NCZV(); \
*rd = r; \
SET_NZCV_ADD(a,b,r); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::addc_a(UINT16 op) { ADDC(A); }
-void tms340x0_device::addc_b(UINT16 op) { ADDC(B); }
+void tms340x0_device::addc_a(uint16_t op) { ADDC(A); }
+void tms340x0_device::addc_b(uint16_t op) { ADDC(B); }
#define ADDI_W(R) \
{ \
- INT32 a = PARAM_WORD(); \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b; \
+ int32_t a = PARAM_WORD(); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t b = *rd; \
+ int32_t r = a + b; \
CLR_NCZV(); \
*rd = r; \
SET_NZCV_ADD(a,b,r); \
COUNT_CYCLES(2); \
}
-void tms340x0_device::addi_w_a(UINT16 op) { ADDI_W(A); }
-void tms340x0_device::addi_w_b(UINT16 op) { ADDI_W(B); }
+void tms340x0_device::addi_w_a(uint16_t op) { ADDI_W(A); }
+void tms340x0_device::addi_w_b(uint16_t op) { ADDI_W(B); }
#define ADDI_L(R) \
{ \
- INT32 a = PARAM_LONG(); \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b; \
+ int32_t a = PARAM_LONG(); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t b = *rd; \
+ int32_t r = a + b; \
CLR_NCZV(); \
*rd = r; \
SET_NZCV_ADD(a,b,r); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::addi_l_a(UINT16 op) { ADDI_L(A); }
-void tms340x0_device::addi_l_b(UINT16 op) { ADDI_L(B); }
+void tms340x0_device::addi_l_a(uint16_t op) { ADDI_L(A); }
+void tms340x0_device::addi_l_b(uint16_t op) { ADDI_L(B); }
#define ADDK(R) \
{ \
- INT32 a = fw_inc[PARAM_K(op)]; \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b; \
+ int32_t a = fw_inc[PARAM_K(op)]; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t b = *rd; \
+ int32_t r = a + b; \
CLR_NCZV(); \
*rd = r; \
SET_NZCV_ADD(a,b,r); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::addk_a(UINT16 op) { ADDK(A); }
-void tms340x0_device::addk_b(UINT16 op) { ADDK(B); }
+void tms340x0_device::addk_a(uint16_t op) { ADDK(A); }
+void tms340x0_device::addk_b(uint16_t op) { ADDK(B); }
#define AND(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
*rd &= R##REG(SRCREG(op)); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::and_a(UINT16 op) { AND(A); }
-void tms340x0_device::and_b(UINT16 op) { AND(B); }
+void tms340x0_device::and_a(uint16_t op) { AND(A); }
+void tms340x0_device::and_b(uint16_t op) { AND(B); }
#define ANDI(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
*rd &= ~PARAM_LONG(); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::andi_a(UINT16 op) { ANDI(A); }
-void tms340x0_device::andi_b(UINT16 op) { ANDI(B); }
+void tms340x0_device::andi_a(uint16_t op) { ANDI(A); }
+void tms340x0_device::andi_b(uint16_t op) { ANDI(B); }
#define ANDN(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
*rd &= ~R##REG(SRCREG(op)); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::andn_a(UINT16 op) { ANDN(A); }
-void tms340x0_device::andn_b(UINT16 op) { ANDN(B); }
+void tms340x0_device::andn_a(uint16_t op) { ANDN(A); }
+void tms340x0_device::andn_b(uint16_t op) { ANDN(B); }
#define BTST_K(R) \
{ \
@@ -440,8 +440,8 @@ void tms340x0_device::andn_b(UINT16 op) { ANDN(B); }
SET_Z_BIT_HI(~R##REG(DSTREG(op)), bit); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::btst_k_a(UINT16 op) { BTST_K(A); }
-void tms340x0_device::btst_k_b(UINT16 op) { BTST_K(B); }
+void tms340x0_device::btst_k_a(uint16_t op) { BTST_K(A); }
+void tms340x0_device::btst_k_b(uint16_t op) { BTST_K(B); }
#define BTST_R(R) \
{ \
@@ -453,10 +453,10 @@ void tms340x0_device::btst_k_b(UINT16 op) { BTST_K(B); }
SET_Z_BIT_HI(~R##REG(DSTREG(op)), bit); \
COUNT_CYCLES(2); \
}
-void tms340x0_device::btst_r_a(UINT16 op) { BTST_R(A); }
-void tms340x0_device::btst_r_b(UINT16 op) { BTST_R(B); }
+void tms340x0_device::btst_r_a(uint16_t op) { BTST_R(A); }
+void tms340x0_device::btst_r_b(uint16_t op) { BTST_R(B); }
-void tms340x0_device::clrc(UINT16 op)
+void tms340x0_device::clrc(uint16_t op)
{
CLR_C();
COUNT_CYCLES(1);
@@ -464,41 +464,41 @@ void tms340x0_device::clrc(UINT16 op)
#define CMP(R) \
{ \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 r = *rd - *rs; \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t r = *rd - *rs; \
CLR_NCZV(); \
SET_NZCV_SUB(*rd,*rs,r); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::cmp_a(UINT16 op) { CMP(A); }
-void tms340x0_device::cmp_b(UINT16 op) { CMP(B); }
+void tms340x0_device::cmp_a(uint16_t op) { CMP(A); }
+void tms340x0_device::cmp_b(uint16_t op) { CMP(B); }
#define CMPI_W(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 t = (INT16)~PARAM_WORD(); \
- INT32 r = *rd - t; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t t = (int16_t)~PARAM_WORD(); \
+ int32_t r = *rd - t; \
CLR_NCZV(); \
SET_NZCV_SUB(*rd,t,r); \
COUNT_CYCLES(2); \
}
-void tms340x0_device::cmpi_w_a(UINT16 op) { CMPI_W(A); }
-void tms340x0_device::cmpi_w_b(UINT16 op) { CMPI_W(B); }
+void tms340x0_device::cmpi_w_a(uint16_t op) { CMPI_W(A); }
+void tms340x0_device::cmpi_w_b(uint16_t op) { CMPI_W(B); }
#define CMPI_L(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 t = ~PARAM_LONG(); \
- INT32 r = *rd - t; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t t = ~PARAM_LONG(); \
+ int32_t r = *rd - t; \
CLR_NCZV(); \
SET_NZCV_SUB(*rd,t,r); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::cmpi_l_a(UINT16 op) { CMPI_L(A); }
-void tms340x0_device::cmpi_l_b(UINT16 op) { CMPI_L(B); }
+void tms340x0_device::cmpi_l_a(uint16_t op) { CMPI_L(A); }
+void tms340x0_device::cmpi_l_b(uint16_t op) { CMPI_L(B); }
-void tms340x0_device::dint(UINT16 op)
+void tms340x0_device::dint(uint16_t op)
{
m_st &= ~STBIT_IE;
COUNT_CYCLES(3);
@@ -506,8 +506,8 @@ void tms340x0_device::dint(UINT16 op)
#define DIVS(R) \
{ \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 *rd1 = &R##REG(DSTREG(op)); \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t *rd1 = &R##REG(DSTREG(op)); \
CLR_NZV(); \
if (!(DSTREG(op) & 1)) \
{ \
@@ -517,11 +517,11 @@ void tms340x0_device::dint(UINT16 op)
} \
else \
{ \
- INT32 *rd2 = &R##REG(DSTREG(op)+1); \
- INT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
- INT64 quotient = dividend / *rs; \
- INT32 remainder = dividend % *rs; \
- UINT32 signbits = (INT32)quotient >> 31; \
+ int32_t *rd2 = &R##REG(DSTREG(op)+1); \
+ int64_t dividend = ((uint64_t)*rd1 << 32) | (uint32_t)*rd2; \
+ int64_t quotient = dividend / *rs; \
+ int32_t remainder = dividend % *rs; \
+ uint32_t signbits = (int32_t)quotient >> 31; \
if (extract_64hi(quotient) != signbits) \
{ \
SET_V_LOG(1); \
@@ -549,13 +549,13 @@ void tms340x0_device::dint(UINT16 op)
COUNT_CYCLES(39); \
} \
}
-void tms340x0_device::divs_a(UINT16 op) { DIVS(A); }
-void tms340x0_device::divs_b(UINT16 op) { DIVS(B); }
+void tms340x0_device::divs_a(uint16_t op) { DIVS(A); }
+void tms340x0_device::divs_b(uint16_t op) { DIVS(B); }
#define DIVU(R) \
{ \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 *rd1 = &R##REG(DSTREG(op)); \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t *rd1 = &R##REG(DSTREG(op)); \
CLR_ZV(); \
if (!(DSTREG(op) & 1)) \
{ \
@@ -565,10 +565,10 @@ void tms340x0_device::divs_b(UINT16 op) { DIVS(B); }
} \
else \
{ \
- INT32 *rd2 = &R##REG(DSTREG(op)+1); \
- UINT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
- UINT64 quotient = dividend / (UINT32)*rs; \
- UINT32 remainder = dividend % (UINT32)*rs; \
+ int32_t *rd2 = &R##REG(DSTREG(op)+1); \
+ uint64_t dividend = ((uint64_t)*rd1 << 32) | (uint32_t)*rd2; \
+ uint64_t quotient = dividend / (uint32_t)*rs; \
+ uint32_t remainder = dividend % (uint32_t)*rs; \
if (extract_64hi(quotient) != 0) \
{ \
SET_V_LOG(1); \
@@ -589,16 +589,16 @@ void tms340x0_device::divs_b(UINT16 op) { DIVS(B); }
} \
else \
{ \
- *rd1 = (UINT32)*rd1 / (UINT32)*rs; \
+ *rd1 = (uint32_t)*rd1 / (uint32_t)*rs; \
SET_Z_VAL(*rd1); \
} \
} \
COUNT_CYCLES(37); \
}
-void tms340x0_device::divu_a(UINT16 op) { DIVU(A); }
-void tms340x0_device::divu_b(UINT16 op) { DIVU(B); }
+void tms340x0_device::divu_a(uint16_t op) { DIVU(A); }
+void tms340x0_device::divu_b(uint16_t op) { DIVU(B); }
-void tms340x0_device::eint(UINT16 op)
+void tms340x0_device::eint(uint16_t op)
{
m_st |= STBIT_IE;
check_interrupt();
@@ -607,24 +607,24 @@ void tms340x0_device::eint(UINT16 op)
#define EXGF(F,R) \
{ \
- UINT8 shift = F ? 6 : 0; \
- INT32 *rd = &R##REG(DSTREG(op)); \
- UINT32 temp = (m_st >> shift) & 0x3f; \
+ uint8_t shift = F ? 6 : 0; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ uint32_t temp = (m_st >> shift) & 0x3f; \
m_st &= ~(0x3f << shift); \
m_st |= (*rd & 0x3f) << shift; \
*rd = temp; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::exgf0_a(UINT16 op) { EXGF(0,A); }
-void tms340x0_device::exgf0_b(UINT16 op) { EXGF(0,B); }
-void tms340x0_device::exgf1_a(UINT16 op) { EXGF(1,A); }
-void tms340x0_device::exgf1_b(UINT16 op) { EXGF(1,B); }
+void tms340x0_device::exgf0_a(uint16_t op) { EXGF(0,A); }
+void tms340x0_device::exgf0_b(uint16_t op) { EXGF(0,B); }
+void tms340x0_device::exgf1_a(uint16_t op) { EXGF(1,A); }
+void tms340x0_device::exgf1_b(uint16_t op) { EXGF(1,B); }
#define LMO(R) \
{ \
- UINT32 res = 0; \
- UINT32 rs = R##REG(SRCREG(op)); \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ uint32_t res = 0; \
+ uint32_t rs = R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
SET_Z_VAL(rs); \
if (rs) \
@@ -638,16 +638,16 @@ void tms340x0_device::exgf1_b(UINT16 op) { EXGF(1,B); }
*rd = res; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::lmo_a(UINT16 op) { LMO(A); }
-void tms340x0_device::lmo_b(UINT16 op) { LMO(B); }
+void tms340x0_device::lmo_a(uint16_t op) { LMO(A); }
+void tms340x0_device::lmo_b(uint16_t op) { LMO(B); }
#define MMFM(R) \
{ \
- INT32 i; \
- UINT16 l = (UINT16) PARAM_WORD(); \
+ int32_t i; \
+ uint16_t l = (uint16_t) PARAM_WORD(); \
COUNT_CYCLES(3); \
{ \
- INT32 rd = DSTREG(op); \
+ int32_t rd = DSTREG(op); \
for (i = 15; i >= 0 ; i--) \
{ \
if (l & 0x8000) \
@@ -660,16 +660,16 @@ void tms340x0_device::lmo_b(UINT16 op) { LMO(B); }
} \
} \
}
-void tms340x0_device::mmfm_a(UINT16 op) { MMFM(A); }
-void tms340x0_device::mmfm_b(UINT16 op) { MMFM(B); }
+void tms340x0_device::mmfm_a(uint16_t op) { MMFM(A); }
+void tms340x0_device::mmfm_b(uint16_t op) { MMFM(B); }
#define MMTM(R) \
{ \
- UINT32 i; \
- UINT16 l = (UINT16) PARAM_WORD(); \
+ uint32_t i; \
+ uint16_t l = (uint16_t) PARAM_WORD(); \
COUNT_CYCLES(2); \
{ \
- INT32 rd = DSTREG(op); \
+ int32_t rd = DSTREG(op); \
if (m_is_34020) \
{ \
CLR_N(); \
@@ -687,13 +687,13 @@ void tms340x0_device::mmfm_b(UINT16 op) { MMFM(B); }
} \
} \
}
-void tms340x0_device::mmtm_a(UINT16 op) { MMTM(A); }
-void tms340x0_device::mmtm_b(UINT16 op) { MMTM(B); }
+void tms340x0_device::mmtm_a(uint16_t op) { MMTM(A); }
+void tms340x0_device::mmtm_b(uint16_t op) { MMTM(B); }
#define MODS(R) \
{ \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_NZV(); \
if (*rs != 0) \
{ \
@@ -704,31 +704,31 @@ void tms340x0_device::mmtm_b(UINT16 op) { MMTM(B); }
SET_V_LOG(1); \
COUNT_CYCLES(40); \
}
-void tms340x0_device::mods_a(UINT16 op) { MODS(A); }
-void tms340x0_device::mods_b(UINT16 op) { MODS(B); }
+void tms340x0_device::mods_a(uint16_t op) { MODS(A); }
+void tms340x0_device::mods_b(uint16_t op) { MODS(B); }
#define MODU(R) \
{ \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_ZV(); \
if (*rs != 0) \
{ \
- *rd = (UINT32)*rd % (UINT32)*rs; \
+ *rd = (uint32_t)*rd % (uint32_t)*rs; \
SET_Z_VAL(*rd); \
} \
else \
SET_V_LOG(1); \
COUNT_CYCLES(35); \
}
-void tms340x0_device::modu_a(UINT16 op) { MODU(A); }
-void tms340x0_device::modu_b(UINT16 op) { MODU(B); }
+void tms340x0_device::modu_a(uint16_t op) { MODU(A); }
+void tms340x0_device::modu_b(uint16_t op) { MODU(B); }
#define MPYS(R) \
{ \
- INT32 *rd1 = &R##REG(DSTREG(op)); \
- INT32 m1 = R##REG(SRCREG(op)); \
- INT64 product; \
+ int32_t *rd1 = &R##REG(DSTREG(op)); \
+ int32_t m1 = R##REG(SRCREG(op)); \
+ int64_t product; \
\
SEXTEND(m1, FW(1)); \
CLR_NZ(); \
@@ -741,14 +741,14 @@ void tms340x0_device::modu_b(UINT16 op) { MODU(B); }
\
COUNT_CYCLES(20); \
}
-void tms340x0_device::mpys_a(UINT16 op) { MPYS(A); }
-void tms340x0_device::mpys_b(UINT16 op) { MPYS(B); }
+void tms340x0_device::mpys_a(uint16_t op) { MPYS(A); }
+void tms340x0_device::mpys_b(uint16_t op) { MPYS(B); }
#define MPYU(R) \
{ \
- INT32 *rd1 = &R##REG(DSTREG(op)); \
- UINT32 m1 = R##REG(SRCREG(op)); \
- UINT64 product; \
+ int32_t *rd1 = &R##REG(DSTREG(op)); \
+ uint32_t m1 = R##REG(SRCREG(op)); \
+ uint64_t product; \
\
ZEXTEND(m1, FW(1)); \
CLR_Z(); \
@@ -760,73 +760,73 @@ void tms340x0_device::mpys_b(UINT16 op) { MPYS(B); }
\
COUNT_CYCLES(21); \
}
-void tms340x0_device::mpyu_a(UINT16 op) { MPYU(A); }
-void tms340x0_device::mpyu_b(UINT16 op) { MPYU(B); }
+void tms340x0_device::mpyu_a(uint16_t op) { MPYU(A); }
+void tms340x0_device::mpyu_b(uint16_t op) { MPYU(B); }
#define NEG(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 r = 0 - *rd; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t r = 0 - *rd; \
CLR_NCZV(); \
SET_NZCV_SUB(0,*rd,r); \
*rd = r; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::neg_a(UINT16 op) { NEG(A); }
-void tms340x0_device::neg_b(UINT16 op) { NEG(B); }
+void tms340x0_device::neg_a(uint16_t op) { NEG(A); }
+void tms340x0_device::neg_b(uint16_t op) { NEG(B); }
#define NEGB(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 t = *rd + (C_FLAG() ? 1 : 0); \
- INT32 r = 0 - t; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t t = *rd + (C_FLAG() ? 1 : 0); \
+ int32_t r = 0 - t; \
CLR_NCZV(); \
SET_NZCV_SUB(0,t,r); \
*rd = r; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::negb_a(UINT16 op) { NEGB(A); }
-void tms340x0_device::negb_b(UINT16 op) { NEGB(B); }
+void tms340x0_device::negb_a(uint16_t op) { NEGB(A); }
+void tms340x0_device::negb_b(uint16_t op) { NEGB(B); }
-void tms340x0_device::nop(UINT16 op)
+void tms340x0_device::nop(uint16_t op)
{
COUNT_CYCLES(1);
}
#define NOT(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
*rd = ~(*rd); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::not_a(UINT16 op) { NOT(A); }
-void tms340x0_device::not_b(UINT16 op) { NOT(B); }
+void tms340x0_device::not_a(uint16_t op) { NOT(A); }
+void tms340x0_device::not_b(uint16_t op) { NOT(B); }
#define OR(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
*rd |= R##REG(SRCREG(op)); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::or_a(UINT16 op) { OR(A); }
-void tms340x0_device::or_b(UINT16 op) { OR(B); }
+void tms340x0_device::or_a(uint16_t op) { OR(A); }
+void tms340x0_device::or_b(uint16_t op) { OR(B); }
#define ORI(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
*rd |= PARAM_LONG(); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::ori_a(UINT16 op) { ORI(A); }
-void tms340x0_device::ori_b(UINT16 op) { ORI(B); }
+void tms340x0_device::ori_a(uint16_t op) { ORI(A); }
+void tms340x0_device::ori_b(uint16_t op) { ORI(B); }
-void tms340x0_device::setc(UINT16 op)
+void tms340x0_device::setc(uint16_t op)
{
SET_C_LOG(1);
COUNT_CYCLES(1);
@@ -834,59 +834,59 @@ void tms340x0_device::setc(UINT16 op)
#define SETF(F) \
{ \
- UINT8 shift = F ? 6 : 0; \
+ uint8_t shift = F ? 6 : 0; \
m_st &= ~(0x3f << shift); \
m_st |= (op & 0x3f) << shift; \
COUNT_CYCLES(1+F); \
}
-void tms340x0_device::setf0(UINT16 op) { SETF(0); }
-void tms340x0_device::setf1(UINT16 op) { SETF(1); }
+void tms340x0_device::setf0(uint16_t op) { SETF(0); }
+void tms340x0_device::setf1(uint16_t op) { SETF(1); }
#define SEXT(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_NZ(); \
SEXTEND(*rd,FW(F)); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::sext0_a(UINT16 op) { SEXT(0,A); }
-void tms340x0_device::sext0_b(UINT16 op) { SEXT(0,B); }
-void tms340x0_device::sext1_a(UINT16 op) { SEXT(1,A); }
-void tms340x0_device::sext1_b(UINT16 op) { SEXT(1,B); }
+void tms340x0_device::sext0_a(uint16_t op) { SEXT(0,A); }
+void tms340x0_device::sext0_b(uint16_t op) { SEXT(0,B); }
+void tms340x0_device::sext1_a(uint16_t op) { SEXT(1,A); }
+void tms340x0_device::sext1_b(uint16_t op) { SEXT(1,B); }
#define RL(R,K) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 res = *rd; \
- INT32 k = (K); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t res = *rd; \
+ int32_t k = (K); \
CLR_CZ(); \
if (k) \
{ \
res<<=(k-1); \
SET_C_BIT_HI(res, 31); \
res<<=1; \
- res |= (((UINT32)*rd)>>((-k)&0x1f)); \
+ res |= (((uint32_t)*rd)>>((-k)&0x1f)); \
*rd = res; \
} \
SET_Z_VAL(res); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::rl_k_a(UINT16 op) { RL(A,PARAM_K(op)); }
-void tms340x0_device::rl_k_b(UINT16 op) { RL(B,PARAM_K(op)); }
-void tms340x0_device::rl_r_a(UINT16 op) { RL(A,AREG(SRCREG(op))&0x1f); }
-void tms340x0_device::rl_r_b(UINT16 op) { RL(B,BREG(SRCREG(op))&0x1f); }
+void tms340x0_device::rl_k_a(uint16_t op) { RL(A,PARAM_K(op)); }
+void tms340x0_device::rl_k_b(uint16_t op) { RL(B,PARAM_K(op)); }
+void tms340x0_device::rl_r_a(uint16_t op) { RL(A,AREG(SRCREG(op))&0x1f); }
+void tms340x0_device::rl_r_b(uint16_t op) { RL(B,BREG(SRCREG(op))&0x1f); }
#define SLA(R,K) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- UINT32 res = *rd; \
- INT32 k = K; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ uint32_t res = *rd; \
+ int32_t k = K; \
CLR_NCZV(); \
if (k) \
{ \
- UINT32 mask = (0xffffffff<<(31-k))&0x7fffffff; \
- UINT32 res2 = SIGN(res) ? res^mask : res; \
+ uint32_t mask = (0xffffffff<<(31-k))&0x7fffffff; \
+ uint32_t res2 = SIGN(res) ? res^mask : res; \
SET_V_LOG((res2 & mask) != 0); \
\
res<<=(k-1); \
@@ -897,16 +897,16 @@ void tms340x0_device::rl_r_b(UINT16 op) { RL(B,BREG(SRCREG(op))&0x1f); }
SET_NZ_VAL(res); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::sla_k_a(UINT16 op) { SLA(A,PARAM_K(op)); }
-void tms340x0_device::sla_k_b(UINT16 op) { SLA(B,PARAM_K(op)); }
-void tms340x0_device::sla_r_a(UINT16 op) { SLA(A,AREG(SRCREG(op))&0x1f); }
-void tms340x0_device::sla_r_b(UINT16 op) { SLA(B,BREG(SRCREG(op))&0x1f); }
+void tms340x0_device::sla_k_a(uint16_t op) { SLA(A,PARAM_K(op)); }
+void tms340x0_device::sla_k_b(uint16_t op) { SLA(B,PARAM_K(op)); }
+void tms340x0_device::sla_r_a(uint16_t op) { SLA(A,AREG(SRCREG(op))&0x1f); }
+void tms340x0_device::sla_r_b(uint16_t op) { SLA(B,BREG(SRCREG(op))&0x1f); }
#define SLL(R,K) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- UINT32 res = *rd; \
- INT32 k = K; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ uint32_t res = *rd; \
+ int32_t k = K; \
CLR_CZ(); \
if (k) \
{ \
@@ -918,16 +918,16 @@ void tms340x0_device::sla_r_b(UINT16 op) { SLA(B,BREG(SRCREG(op))&0x1f); }
SET_Z_VAL(res); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::sll_k_a(UINT16 op) { SLL(A,PARAM_K(op)); }
-void tms340x0_device::sll_k_b(UINT16 op) { SLL(B,PARAM_K(op)); }
-void tms340x0_device::sll_r_a(UINT16 op) { SLL(A,AREG(SRCREG(op))&0x1f); }
-void tms340x0_device::sll_r_b(UINT16 op) { SLL(B,BREG(SRCREG(op))&0x1f); }
+void tms340x0_device::sll_k_a(uint16_t op) { SLL(A,PARAM_K(op)); }
+void tms340x0_device::sll_k_b(uint16_t op) { SLL(B,PARAM_K(op)); }
+void tms340x0_device::sll_r_a(uint16_t op) { SLL(A,AREG(SRCREG(op))&0x1f); }
+void tms340x0_device::sll_r_b(uint16_t op) { SLL(B,BREG(SRCREG(op))&0x1f); }
#define SRA(R,K) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 res = *rd; \
- INT32 k = (-(K)) & 0x1f; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t res = *rd; \
+ int32_t k = (-(K)) & 0x1f; \
CLR_NCZ(); \
if (k) \
{ \
@@ -939,16 +939,16 @@ void tms340x0_device::sll_r_b(UINT16 op) { SLL(B,BREG(SRCREG(op))&0x1f); }
SET_NZ_VAL(res); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::sra_k_a(UINT16 op) { SRA(A,PARAM_K(op)); }
-void tms340x0_device::sra_k_b(UINT16 op) { SRA(B,PARAM_K(op)); }
-void tms340x0_device::sra_r_a(UINT16 op) { SRA(A,AREG(SRCREG(op))); }
-void tms340x0_device::sra_r_b(UINT16 op) { SRA(B,BREG(SRCREG(op))); }
+void tms340x0_device::sra_k_a(uint16_t op) { SRA(A,PARAM_K(op)); }
+void tms340x0_device::sra_k_b(uint16_t op) { SRA(B,PARAM_K(op)); }
+void tms340x0_device::sra_r_a(uint16_t op) { SRA(A,AREG(SRCREG(op))); }
+void tms340x0_device::sra_r_b(uint16_t op) { SRA(B,BREG(SRCREG(op))); }
#define SRL(R,K) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- UINT32 res = *rd; \
- INT32 k = (-(K)) & 0x1f; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ uint32_t res = *rd; \
+ int32_t k = (-(K)) & 0x1f; \
CLR_CZ(); \
if (k) \
{ \
@@ -960,111 +960,111 @@ void tms340x0_device::sra_r_b(UINT16 op) { SRA(B,BREG(SRCREG(op))); }
SET_Z_VAL(res); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::srl_k_a(UINT16 op) { SRL(A,PARAM_K(op)); }
-void tms340x0_device::srl_k_b(UINT16 op) { SRL(B,PARAM_K(op)); }
-void tms340x0_device::srl_r_a(UINT16 op) { SRL(A,AREG(SRCREG(op))); }
-void tms340x0_device::srl_r_b(UINT16 op) { SRL(B,BREG(SRCREG(op))); }
+void tms340x0_device::srl_k_a(uint16_t op) { SRL(A,PARAM_K(op)); }
+void tms340x0_device::srl_k_b(uint16_t op) { SRL(B,PARAM_K(op)); }
+void tms340x0_device::srl_r_a(uint16_t op) { SRL(A,AREG(SRCREG(op))); }
+void tms340x0_device::srl_r_b(uint16_t op) { SRL(B,BREG(SRCREG(op))); }
#define SUB(R) \
{ \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 r = *rd - *rs; \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t r = *rd - *rs; \
CLR_NCZV(); \
SET_NZCV_SUB(*rd,*rs,r); \
*rd = r; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::sub_a(UINT16 op) { SUB(A); }
-void tms340x0_device::sub_b(UINT16 op) { SUB(B); }
+void tms340x0_device::sub_a(uint16_t op) { SUB(A); }
+void tms340x0_device::sub_b(uint16_t op) { SUB(B); }
#define SUBB(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 t = R##REG(SRCREG(op)); \
- INT32 r = *rd - t - (C_FLAG() ? 1 : 0); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t t = R##REG(SRCREG(op)); \
+ int32_t r = *rd - t - (C_FLAG() ? 1 : 0); \
CLR_NCZV(); \
SET_NZCV_SUB(*rd,t,r); \
*rd = r; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::subb_a(UINT16 op) { SUBB(A); }
-void tms340x0_device::subb_b(UINT16 op) { SUBB(B); }
+void tms340x0_device::subb_a(uint16_t op) { SUBB(A); }
+void tms340x0_device::subb_b(uint16_t op) { SUBB(B); }
#define SUBI_W(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 r; \
- INT32 t = ~PARAM_WORD(); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t r; \
+ int32_t t = ~PARAM_WORD(); \
CLR_NCZV(); \
r = *rd - t; \
SET_NZCV_SUB(*rd,t,r); \
*rd = r; \
COUNT_CYCLES(2); \
}
-void tms340x0_device::subi_w_a(UINT16 op) { SUBI_W(A); }
-void tms340x0_device::subi_w_b(UINT16 op) { SUBI_W(B); }
+void tms340x0_device::subi_w_a(uint16_t op) { SUBI_W(A); }
+void tms340x0_device::subi_w_b(uint16_t op) { SUBI_W(B); }
#define SUBI_L(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 t = ~PARAM_LONG(); \
- INT32 r = *rd - t; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t t = ~PARAM_LONG(); \
+ int32_t r = *rd - t; \
CLR_NCZV(); \
SET_NZCV_SUB(*rd,t,r); \
*rd = r; \
COUNT_CYCLES(3); \
}
-void tms340x0_device::subi_l_a(UINT16 op) { SUBI_L(A); }
-void tms340x0_device::subi_l_b(UINT16 op) { SUBI_L(B); }
+void tms340x0_device::subi_l_a(uint16_t op) { SUBI_L(A); }
+void tms340x0_device::subi_l_b(uint16_t op) { SUBI_L(B); }
#define SUBK(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 t = fw_inc[PARAM_K(op)]; \
- INT32 r = *rd - t; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t t = fw_inc[PARAM_K(op)]; \
+ int32_t r = *rd - t; \
CLR_NCZV(); \
SET_NZCV_SUB(*rd,t,r); \
*rd = r; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::subk_a(UINT16 op) { SUBK(A); }
-void tms340x0_device::subk_b(UINT16 op) { SUBK(B); }
+void tms340x0_device::subk_a(uint16_t op) { SUBK(A); }
+void tms340x0_device::subk_b(uint16_t op) { SUBK(B); }
#define XOR(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
*rd ^= R##REG(SRCREG(op)); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::xor_a(UINT16 op) { XOR(A); }
-void tms340x0_device::xor_b(UINT16 op) { XOR(B); }
+void tms340x0_device::xor_a(uint16_t op) { XOR(A); }
+void tms340x0_device::xor_b(uint16_t op) { XOR(B); }
#define XORI(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
*rd ^= PARAM_LONG(); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::xori_a(UINT16 op) { XORI(A); }
-void tms340x0_device::xori_b(UINT16 op) { XORI(B); }
+void tms340x0_device::xori_a(uint16_t op) { XORI(A); }
+void tms340x0_device::xori_b(uint16_t op) { XORI(B); }
#define ZEXT(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
ZEXTEND(*rd,FW(F)); \
SET_Z_VAL(*rd); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::zext0_a(UINT16 op) { ZEXT(0,A); }
-void tms340x0_device::zext0_b(UINT16 op) { ZEXT(0,B); }
-void tms340x0_device::zext1_a(UINT16 op) { ZEXT(1,A); }
-void tms340x0_device::zext1_b(UINT16 op) { ZEXT(1,B); }
+void tms340x0_device::zext0_a(uint16_t op) { ZEXT(0,A); }
+void tms340x0_device::zext0_b(uint16_t op) { ZEXT(0,B); }
+void tms340x0_device::zext1_a(uint16_t op) { ZEXT(1,A); }
+void tms340x0_device::zext1_b(uint16_t op) { ZEXT(1,B); }
@@ -1074,346 +1074,346 @@ void tms340x0_device::zext1_b(UINT16 op) { ZEXT(1,B); }
#define MOVI_W(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_NZV(); \
*rd=PARAM_WORD(); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(2); \
}
-void tms340x0_device::movi_w_a(UINT16 op) { MOVI_W(A); }
-void tms340x0_device::movi_w_b(UINT16 op) { MOVI_W(B); }
+void tms340x0_device::movi_w_a(uint16_t op) { MOVI_W(A); }
+void tms340x0_device::movi_w_b(uint16_t op) { MOVI_W(B); }
#define MOVI_L(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_NZV(); \
*rd=PARAM_LONG(); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::movi_l_a(UINT16 op) { MOVI_L(A); }
-void tms340x0_device::movi_l_b(UINT16 op) { MOVI_L(B); }
+void tms340x0_device::movi_l_a(uint16_t op) { MOVI_L(A); }
+void tms340x0_device::movi_l_b(uint16_t op) { MOVI_L(B); }
#define MOVK(R) \
{ \
- INT32 k = PARAM_K(op); if (!k) k = 32; \
+ int32_t k = PARAM_K(op); if (!k) k = 32; \
R##REG(DSTREG(op)) = k; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::movk_a(UINT16 op) { MOVK(A); }
-void tms340x0_device::movk_b(UINT16 op) { MOVK(B); }
+void tms340x0_device::movk_a(uint16_t op) { MOVK(A); }
+void tms340x0_device::movk_b(uint16_t op) { MOVK(B); }
#define MOVB_RN(R) \
{ \
WBYTE(R##REG(DSTREG(op)),R##REG(SRCREG(op))); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::movb_rn_a(UINT16 op) { MOVB_RN(A); }
-void tms340x0_device::movb_rn_b(UINT16 op) { MOVB_RN(B); }
+void tms340x0_device::movb_rn_a(uint16_t op) { MOVB_RN(A); }
+void tms340x0_device::movb_rn_b(uint16_t op) { MOVB_RN(B); }
#define MOVB_NR(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_NZV(); \
- *rd = (INT8)RBYTE(R##REG(SRCREG(op))); \
+ *rd = (int8_t)RBYTE(R##REG(SRCREG(op))); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::movb_nr_a(UINT16 op) { MOVB_NR(A); }
-void tms340x0_device::movb_nr_b(UINT16 op) { MOVB_NR(B); }
+void tms340x0_device::movb_nr_a(uint16_t op) { MOVB_NR(A); }
+void tms340x0_device::movb_nr_b(uint16_t op) { MOVB_NR(B); }
#define MOVB_NN(R) \
{ \
- WBYTE(R##REG(DSTREG(op)),(UINT32)(UINT8)RBYTE(R##REG(SRCREG(op))));\
+ WBYTE(R##REG(DSTREG(op)),(uint32_t)(uint8_t)RBYTE(R##REG(SRCREG(op))));\
COUNT_CYCLES(3); \
}
-void tms340x0_device::movb_nn_a(UINT16 op) { MOVB_NN(A); }
-void tms340x0_device::movb_nn_b(UINT16 op) { MOVB_NN(B); }
+void tms340x0_device::movb_nn_a(uint16_t op) { MOVB_NN(A); }
+void tms340x0_device::movb_nn_b(uint16_t op) { MOVB_NN(B); }
#define MOVB_R_NO(R) \
{ \
- INT32 o = PARAM_WORD(); \
+ int32_t o = PARAM_WORD(); \
WBYTE(R##REG(DSTREG(op))+o,R##REG(SRCREG(op))); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::movb_r_no_a(UINT16 op) { MOVB_R_NO(A); }
-void tms340x0_device::movb_r_no_b(UINT16 op) { MOVB_R_NO(B); }
+void tms340x0_device::movb_r_no_a(uint16_t op) { MOVB_R_NO(A); }
+void tms340x0_device::movb_r_no_b(uint16_t op) { MOVB_R_NO(B); }
#define MOVB_NO_R(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 o = PARAM_WORD(); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t o = PARAM_WORD(); \
CLR_NZV(); \
- *rd = (INT8)RBYTE(R##REG(SRCREG(op))+o); \
+ *rd = (int8_t)RBYTE(R##REG(SRCREG(op))+o); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(5); \
}
-void tms340x0_device::movb_no_r_a(UINT16 op) { MOVB_NO_R(A); }
-void tms340x0_device::movb_no_r_b(UINT16 op) { MOVB_NO_R(B); }
+void tms340x0_device::movb_no_r_a(uint16_t op) { MOVB_NO_R(A); }
+void tms340x0_device::movb_no_r_b(uint16_t op) { MOVB_NO_R(B); }
#define MOVB_NO_NO(R) \
{ \
- INT32 o1 = PARAM_WORD(); \
- INT32 o2 = PARAM_WORD(); \
- WBYTE(R##REG(DSTREG(op))+o2,(UINT32)(UINT8)RBYTE(R##REG(SRCREG(op))+o1)); \
+ int32_t o1 = PARAM_WORD(); \
+ int32_t o2 = PARAM_WORD(); \
+ WBYTE(R##REG(DSTREG(op))+o2,(uint32_t)(uint8_t)RBYTE(R##REG(SRCREG(op))+o1)); \
COUNT_CYCLES(5); \
}
-void tms340x0_device::movb_no_no_a(UINT16 op) { MOVB_NO_NO(A); }
-void tms340x0_device::movb_no_no_b(UINT16 op) { MOVB_NO_NO(B); }
+void tms340x0_device::movb_no_no_a(uint16_t op) { MOVB_NO_NO(A); }
+void tms340x0_device::movb_no_no_b(uint16_t op) { MOVB_NO_NO(B); }
#define MOVB_RA(R) \
{ \
WBYTE(PARAM_LONG(),R##REG(DSTREG(op))); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::movb_ra_a(UINT16 op) { MOVB_RA(A); }
-void tms340x0_device::movb_ra_b(UINT16 op) { MOVB_RA(B); }
+void tms340x0_device::movb_ra_a(uint16_t op) { MOVB_RA(A); }
+void tms340x0_device::movb_ra_b(uint16_t op) { MOVB_RA(B); }
#define MOVB_AR(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_NZV(); \
- *rd = (INT8)RBYTE(PARAM_LONG()); \
+ *rd = (int8_t)RBYTE(PARAM_LONG()); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(5); \
}
-void tms340x0_device::movb_ar_a(UINT16 op) { MOVB_AR(A); }
-void tms340x0_device::movb_ar_b(UINT16 op) { MOVB_AR(B); }
+void tms340x0_device::movb_ar_a(uint16_t op) { MOVB_AR(A); }
+void tms340x0_device::movb_ar_b(uint16_t op) { MOVB_AR(B); }
-void tms340x0_device::movb_aa(UINT16 op)
+void tms340x0_device::movb_aa(uint16_t op)
{
- UINT32 bitaddrs=PARAM_LONG();
- WBYTE(PARAM_LONG(),(UINT32)(UINT8)RBYTE(bitaddrs));
+ uint32_t bitaddrs=PARAM_LONG();
+ WBYTE(PARAM_LONG(),(uint32_t)(uint8_t)RBYTE(bitaddrs));
COUNT_CYCLES(6);
}
#define MOVE_RR(RS,RD) \
{ \
- INT32 *rd = &RD##REG(DSTREG(op)); \
+ int32_t *rd = &RD##REG(DSTREG(op)); \
CLR_NZV(); \
*rd = RS##REG(SRCREG(op)); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::move_rr_a (UINT16 op) { MOVE_RR(A,A); }
-void tms340x0_device::move_rr_b (UINT16 op) { MOVE_RR(B,B); }
-void tms340x0_device::move_rr_ax(UINT16 op) { MOVE_RR(A,B); }
-void tms340x0_device::move_rr_bx(UINT16 op) { MOVE_RR(B,A); }
+void tms340x0_device::move_rr_a (uint16_t op) { MOVE_RR(A,A); }
+void tms340x0_device::move_rr_b (uint16_t op) { MOVE_RR(B,B); }
+void tms340x0_device::move_rr_ax(uint16_t op) { MOVE_RR(A,B); }
+void tms340x0_device::move_rr_bx(uint16_t op) { MOVE_RR(B,A); }
#define MOVE_RN(F,R) \
{ \
WFIELD##F(R##REG(DSTREG(op)),R##REG(SRCREG(op))); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::move0_rn_a (UINT16 op) { MOVE_RN(0,A); }
-void tms340x0_device::move0_rn_b (UINT16 op) { MOVE_RN(0,B); }
-void tms340x0_device::move1_rn_a (UINT16 op) { MOVE_RN(1,A); }
-void tms340x0_device::move1_rn_b (UINT16 op) { MOVE_RN(1,B); }
+void tms340x0_device::move0_rn_a (uint16_t op) { MOVE_RN(0,A); }
+void tms340x0_device::move0_rn_b (uint16_t op) { MOVE_RN(0,B); }
+void tms340x0_device::move1_rn_a (uint16_t op) { MOVE_RN(1,A); }
+void tms340x0_device::move1_rn_b (uint16_t op) { MOVE_RN(1,B); }
#define MOVE_R_DN(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
*rd-=fw_inc[FW(F)]; \
WFIELD##F(*rd,R##REG(SRCREG(op))); \
COUNT_CYCLES(2); \
}
-void tms340x0_device::move0_r_dn_a (UINT16 op) { MOVE_R_DN(0,A); }
-void tms340x0_device::move0_r_dn_b (UINT16 op) { MOVE_R_DN(0,B); }
-void tms340x0_device::move1_r_dn_a (UINT16 op) { MOVE_R_DN(1,A); }
-void tms340x0_device::move1_r_dn_b (UINT16 op) { MOVE_R_DN(1,B); }
+void tms340x0_device::move0_r_dn_a (uint16_t op) { MOVE_R_DN(0,A); }
+void tms340x0_device::move0_r_dn_b (uint16_t op) { MOVE_R_DN(0,B); }
+void tms340x0_device::move1_r_dn_a (uint16_t op) { MOVE_R_DN(1,A); }
+void tms340x0_device::move1_r_dn_b (uint16_t op) { MOVE_R_DN(1,B); }
#define MOVE_R_NI(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
WFIELD##F(*rd,R##REG(SRCREG(op))); \
*rd+=fw_inc[FW(F)]; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::move0_r_ni_a (UINT16 op) { MOVE_R_NI(0,A); }
-void tms340x0_device::move0_r_ni_b (UINT16 op) { MOVE_R_NI(0,B); }
-void tms340x0_device::move1_r_ni_a (UINT16 op) { MOVE_R_NI(1,A); }
-void tms340x0_device::move1_r_ni_b (UINT16 op) { MOVE_R_NI(1,B); }
+void tms340x0_device::move0_r_ni_a (uint16_t op) { MOVE_R_NI(0,A); }
+void tms340x0_device::move0_r_ni_b (uint16_t op) { MOVE_R_NI(0,B); }
+void tms340x0_device::move1_r_ni_a (uint16_t op) { MOVE_R_NI(1,A); }
+void tms340x0_device::move1_r_ni_b (uint16_t op) { MOVE_R_NI(1,B); }
#define MOVE_NR(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_NZV(); \
*rd = RFIELD##F(R##REG(SRCREG(op))); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::move0_nr_a (UINT16 op) { MOVE_NR(0,A); }
-void tms340x0_device::move0_nr_b (UINT16 op) { MOVE_NR(0,B); }
-void tms340x0_device::move1_nr_a (UINT16 op) { MOVE_NR(1,A); }
-void tms340x0_device::move1_nr_b (UINT16 op) { MOVE_NR(1,B); }
+void tms340x0_device::move0_nr_a (uint16_t op) { MOVE_NR(0,A); }
+void tms340x0_device::move0_nr_b (uint16_t op) { MOVE_NR(0,B); }
+void tms340x0_device::move1_nr_a (uint16_t op) { MOVE_NR(1,A); }
+void tms340x0_device::move1_nr_b (uint16_t op) { MOVE_NR(1,B); }
#define MOVE_DN_R(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 *rs = &R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t *rs = &R##REG(SRCREG(op)); \
CLR_NZV(); \
*rs-=fw_inc[FW(F)]; \
*rd = RFIELD##F(*rs); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(4); \
}
-void tms340x0_device::move0_dn_r_a (UINT16 op) { MOVE_DN_R(0,A); }
-void tms340x0_device::move0_dn_r_b (UINT16 op) { MOVE_DN_R(0,B); }
-void tms340x0_device::move1_dn_r_a (UINT16 op) { MOVE_DN_R(1,A); }
-void tms340x0_device::move1_dn_r_b (UINT16 op) { MOVE_DN_R(1,B); }
+void tms340x0_device::move0_dn_r_a (uint16_t op) { MOVE_DN_R(0,A); }
+void tms340x0_device::move0_dn_r_b (uint16_t op) { MOVE_DN_R(0,B); }
+void tms340x0_device::move1_dn_r_a (uint16_t op) { MOVE_DN_R(1,A); }
+void tms340x0_device::move1_dn_r_b (uint16_t op) { MOVE_DN_R(1,B); }
#define MOVE_NI_R(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 data = RFIELD##F(*rs); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t data = RFIELD##F(*rs); \
CLR_NZV(); \
*rs+=fw_inc[FW(F)]; \
*rd = data; \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::move0_ni_r_a (UINT16 op) { MOVE_NI_R(0,A); }
-void tms340x0_device::move0_ni_r_b (UINT16 op) { MOVE_NI_R(0,B); }
-void tms340x0_device::move1_ni_r_a (UINT16 op) { MOVE_NI_R(1,A); }
-void tms340x0_device::move1_ni_r_b (UINT16 op) { MOVE_NI_R(1,B); }
+void tms340x0_device::move0_ni_r_a (uint16_t op) { MOVE_NI_R(0,A); }
+void tms340x0_device::move0_ni_r_b (uint16_t op) { MOVE_NI_R(0,B); }
+void tms340x0_device::move1_ni_r_a (uint16_t op) { MOVE_NI_R(1,A); }
+void tms340x0_device::move1_ni_r_b (uint16_t op) { MOVE_NI_R(1,B); }
#define MOVE_NN(F,R) \
{ \
WFIELD##F(R##REG(DSTREG(op)),RFIELD##F(R##REG(SRCREG(op)))); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::move0_nn_a (UINT16 op) { MOVE_NN(0,A); }
-void tms340x0_device::move0_nn_b (UINT16 op) { MOVE_NN(0,B); }
-void tms340x0_device::move1_nn_a (UINT16 op) { MOVE_NN(1,A); }
-void tms340x0_device::move1_nn_b (UINT16 op) { MOVE_NN(1,B); }
+void tms340x0_device::move0_nn_a (uint16_t op) { MOVE_NN(0,A); }
+void tms340x0_device::move0_nn_b (uint16_t op) { MOVE_NN(0,B); }
+void tms340x0_device::move1_nn_a (uint16_t op) { MOVE_NN(1,A); }
+void tms340x0_device::move1_nn_b (uint16_t op) { MOVE_NN(1,B); }
#define MOVE_DN_DN(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 data; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t data; \
*rs-=fw_inc[FW(F)]; \
data = RFIELD##F(*rs); \
*rd-=fw_inc[FW(F)]; \
WFIELD##F(*rd,data); \
COUNT_CYCLES(4); \
}
-void tms340x0_device::move0_dn_dn_a (UINT16 op) { MOVE_DN_DN(0,A); }
-void tms340x0_device::move0_dn_dn_b (UINT16 op) { MOVE_DN_DN(0,B); }
-void tms340x0_device::move1_dn_dn_a (UINT16 op) { MOVE_DN_DN(1,A); }
-void tms340x0_device::move1_dn_dn_b (UINT16 op) { MOVE_DN_DN(1,B); }
+void tms340x0_device::move0_dn_dn_a (uint16_t op) { MOVE_DN_DN(0,A); }
+void tms340x0_device::move0_dn_dn_b (uint16_t op) { MOVE_DN_DN(0,B); }
+void tms340x0_device::move1_dn_dn_a (uint16_t op) { MOVE_DN_DN(1,A); }
+void tms340x0_device::move1_dn_dn_b (uint16_t op) { MOVE_DN_DN(1,B); }
#define MOVE_NI_NI(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 *rs = &R##REG(SRCREG(op)); \
- INT32 data = RFIELD##F(*rs); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t *rs = &R##REG(SRCREG(op)); \
+ int32_t data = RFIELD##F(*rs); \
*rs+=fw_inc[FW(F)]; \
WFIELD##F(*rd,data); \
*rd+=fw_inc[FW(F)]; \
COUNT_CYCLES(4); \
}
-void tms340x0_device::move0_ni_ni_a (UINT16 op) { MOVE_NI_NI(0,A); }
-void tms340x0_device::move0_ni_ni_b (UINT16 op) { MOVE_NI_NI(0,B); }
-void tms340x0_device::move1_ni_ni_a (UINT16 op) { MOVE_NI_NI(1,A); }
-void tms340x0_device::move1_ni_ni_b (UINT16 op) { MOVE_NI_NI(1,B); }
+void tms340x0_device::move0_ni_ni_a (uint16_t op) { MOVE_NI_NI(0,A); }
+void tms340x0_device::move0_ni_ni_b (uint16_t op) { MOVE_NI_NI(0,B); }
+void tms340x0_device::move1_ni_ni_a (uint16_t op) { MOVE_NI_NI(1,A); }
+void tms340x0_device::move1_ni_ni_b (uint16_t op) { MOVE_NI_NI(1,B); }
#define MOVE_R_NO(F,R) \
{ \
- INT32 o = PARAM_WORD(); \
+ int32_t o = PARAM_WORD(); \
WFIELD##F(R##REG(DSTREG(op))+o,R##REG(SRCREG(op))); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::move0_r_no_a (UINT16 op) { MOVE_R_NO(0,A); }
-void tms340x0_device::move0_r_no_b (UINT16 op) { MOVE_R_NO(0,B); }
-void tms340x0_device::move1_r_no_a (UINT16 op) { MOVE_R_NO(1,A); }
-void tms340x0_device::move1_r_no_b (UINT16 op) { MOVE_R_NO(1,B); }
+void tms340x0_device::move0_r_no_a (uint16_t op) { MOVE_R_NO(0,A); }
+void tms340x0_device::move0_r_no_b (uint16_t op) { MOVE_R_NO(0,B); }
+void tms340x0_device::move1_r_no_a (uint16_t op) { MOVE_R_NO(1,A); }
+void tms340x0_device::move1_r_no_b (uint16_t op) { MOVE_R_NO(1,B); }
#define MOVE_NO_R(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 o = PARAM_WORD(); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t o = PARAM_WORD(); \
CLR_NZV(); \
*rd = RFIELD##F(R##REG(SRCREG(op))+o); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(5); \
}
-void tms340x0_device::move0_no_r_a (UINT16 op) { MOVE_NO_R(0,A); }
-void tms340x0_device::move0_no_r_b (UINT16 op) { MOVE_NO_R(0,B); }
-void tms340x0_device::move1_no_r_a (UINT16 op) { MOVE_NO_R(1,A); }
-void tms340x0_device::move1_no_r_b (UINT16 op) { MOVE_NO_R(1,B); }
+void tms340x0_device::move0_no_r_a (uint16_t op) { MOVE_NO_R(0,A); }
+void tms340x0_device::move0_no_r_b (uint16_t op) { MOVE_NO_R(0,B); }
+void tms340x0_device::move1_no_r_a (uint16_t op) { MOVE_NO_R(1,A); }
+void tms340x0_device::move1_no_r_b (uint16_t op) { MOVE_NO_R(1,B); }
#define MOVE_NO_NI(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 o = PARAM_WORD(); \
- INT32 data = RFIELD##F(R##REG(SRCREG(op))+o); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t o = PARAM_WORD(); \
+ int32_t data = RFIELD##F(R##REG(SRCREG(op))+o); \
WFIELD##F(*rd,data); \
*rd+=fw_inc[FW(F)]; \
COUNT_CYCLES(5); \
}
-void tms340x0_device::move0_no_ni_a (UINT16 op) { MOVE_NO_NI(0,A); }
-void tms340x0_device::move0_no_ni_b (UINT16 op) { MOVE_NO_NI(0,B); }
-void tms340x0_device::move1_no_ni_a (UINT16 op) { MOVE_NO_NI(1,A); }
-void tms340x0_device::move1_no_ni_b (UINT16 op) { MOVE_NO_NI(1,B); }
+void tms340x0_device::move0_no_ni_a (uint16_t op) { MOVE_NO_NI(0,A); }
+void tms340x0_device::move0_no_ni_b (uint16_t op) { MOVE_NO_NI(0,B); }
+void tms340x0_device::move1_no_ni_a (uint16_t op) { MOVE_NO_NI(1,A); }
+void tms340x0_device::move1_no_ni_b (uint16_t op) { MOVE_NO_NI(1,B); }
#define MOVE_NO_NO(F,R) \
{ \
- INT32 o1 = PARAM_WORD(); \
- INT32 o2 = PARAM_WORD(); \
- INT32 data = RFIELD##F(R##REG(SRCREG(op))+o1); \
+ int32_t o1 = PARAM_WORD(); \
+ int32_t o2 = PARAM_WORD(); \
+ int32_t data = RFIELD##F(R##REG(SRCREG(op))+o1); \
WFIELD##F(R##REG(DSTREG(op))+o2,data); \
COUNT_CYCLES(5); \
}
-void tms340x0_device::move0_no_no_a (UINT16 op) { MOVE_NO_NO(0,A); }
-void tms340x0_device::move0_no_no_b (UINT16 op) { MOVE_NO_NO(0,B); }
-void tms340x0_device::move1_no_no_a (UINT16 op) { MOVE_NO_NO(1,A); }
-void tms340x0_device::move1_no_no_b (UINT16 op) { MOVE_NO_NO(1,B); }
+void tms340x0_device::move0_no_no_a (uint16_t op) { MOVE_NO_NO(0,A); }
+void tms340x0_device::move0_no_no_b (uint16_t op) { MOVE_NO_NO(0,B); }
+void tms340x0_device::move1_no_no_a (uint16_t op) { MOVE_NO_NO(1,A); }
+void tms340x0_device::move1_no_no_b (uint16_t op) { MOVE_NO_NO(1,B); }
#define MOVE_RA(F,R) \
{ \
WFIELD##F(PARAM_LONG(),R##REG(DSTREG(op))); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::move0_ra_a (UINT16 op) { MOVE_RA(0,A); }
-void tms340x0_device::move0_ra_b (UINT16 op) { MOVE_RA(0,B); }
-void tms340x0_device::move1_ra_a (UINT16 op) { MOVE_RA(1,A); }
-void tms340x0_device::move1_ra_b (UINT16 op) { MOVE_RA(1,B); }
+void tms340x0_device::move0_ra_a (uint16_t op) { MOVE_RA(0,A); }
+void tms340x0_device::move0_ra_b (uint16_t op) { MOVE_RA(0,B); }
+void tms340x0_device::move1_ra_a (uint16_t op) { MOVE_RA(1,A); }
+void tms340x0_device::move1_ra_b (uint16_t op) { MOVE_RA(1,B); }
#define MOVE_AR(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_NZV(); \
*rd = RFIELD##F(PARAM_LONG()); \
SET_NZ_VAL(*rd); \
COUNT_CYCLES(5); \
}
-void tms340x0_device::move0_ar_a (UINT16 op) { MOVE_AR(0,A); }
-void tms340x0_device::move0_ar_b (UINT16 op) { MOVE_AR(0,B); }
-void tms340x0_device::move1_ar_a (UINT16 op) { MOVE_AR(1,A); }
-void tms340x0_device::move1_ar_b (UINT16 op) { MOVE_AR(1,B); }
+void tms340x0_device::move0_ar_a (uint16_t op) { MOVE_AR(0,A); }
+void tms340x0_device::move0_ar_b (uint16_t op) { MOVE_AR(0,B); }
+void tms340x0_device::move1_ar_a (uint16_t op) { MOVE_AR(1,A); }
+void tms340x0_device::move1_ar_b (uint16_t op) { MOVE_AR(1,B); }
#define MOVE_A_NI(F,R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
WFIELD##F(*rd,RFIELD##F(PARAM_LONG())); \
*rd+=fw_inc[FW(F)]; \
COUNT_CYCLES(5); \
}
-void tms340x0_device::move0_a_ni_a (UINT16 op) { MOVE_A_NI(0,A); }
-void tms340x0_device::move0_a_ni_b (UINT16 op) { MOVE_A_NI(0,B); }
-void tms340x0_device::move1_a_ni_a (UINT16 op) { MOVE_A_NI(1,A); }
-void tms340x0_device::move1_a_ni_b (UINT16 op) { MOVE_A_NI(1,B); }
+void tms340x0_device::move0_a_ni_a (uint16_t op) { MOVE_A_NI(0,A); }
+void tms340x0_device::move0_a_ni_b (uint16_t op) { MOVE_A_NI(0,B); }
+void tms340x0_device::move1_a_ni_a (uint16_t op) { MOVE_A_NI(1,A); }
+void tms340x0_device::move1_a_ni_b (uint16_t op) { MOVE_A_NI(1,B); }
#define MOVE_AA(F) \
{ \
- UINT32 bitaddrs=PARAM_LONG(); \
+ uint32_t bitaddrs=PARAM_LONG(); \
WFIELD##F(PARAM_LONG(),RFIELD##F(bitaddrs)); \
COUNT_CYCLES(7); \
}
-void tms340x0_device::move0_aa (UINT16 op) { MOVE_AA(0); }
-void tms340x0_device::move1_aa (UINT16 op) { MOVE_AA(1); }
+void tms340x0_device::move0_aa (uint16_t op) { MOVE_AA(0); }
+void tms340x0_device::move1_aa (uint16_t op) { MOVE_AA(1); }
@@ -1428,17 +1428,17 @@ void tms340x0_device::move1_aa (UINT16 op) { MOVE_AA(1); }
CORRECT_ODD_PC("CALL"); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::call_a (UINT16 op) { CALL(A); }
-void tms340x0_device::call_b (UINT16 op) { CALL(B); }
+void tms340x0_device::call_a (uint16_t op) { CALL(A); }
+void tms340x0_device::call_b (uint16_t op) { CALL(B); }
-void tms340x0_device::callr(UINT16 op)
+void tms340x0_device::callr(uint16_t op)
{
PUSH(m_pc+0x10);
m_pc += (PARAM_WORD_NO_INC()<<4)+0x10;
COUNT_CYCLES(3);
}
-void tms340x0_device::calla(UINT16 op)
+void tms340x0_device::calla(uint16_t op)
{
PUSH(m_pc+0x20);
m_pc = PARAM_LONG_NO_INC();
@@ -1459,8 +1459,8 @@ void tms340x0_device::calla(UINT16 op)
COUNT_CYCLES(2); \
} \
}
-void tms340x0_device::dsj_a (UINT16 op) { DSJ(A); }
-void tms340x0_device::dsj_b (UINT16 op) { DSJ(B); }
+void tms340x0_device::dsj_a (uint16_t op) { DSJ(A); }
+void tms340x0_device::dsj_b (uint16_t op) { DSJ(B); }
#define DSJEQ(R) \
{ \
@@ -1483,8 +1483,8 @@ void tms340x0_device::dsj_b (UINT16 op) { DSJ(B); }
COUNT_CYCLES(2); \
} \
}
-void tms340x0_device::dsjeq_a (UINT16 op) { DSJEQ(A); }
-void tms340x0_device::dsjeq_b (UINT16 op) { DSJEQ(B); }
+void tms340x0_device::dsjeq_a (uint16_t op) { DSJEQ(A); }
+void tms340x0_device::dsjeq_b (uint16_t op) { DSJEQ(B); }
#define DSJNE(R) \
{ \
@@ -1507,8 +1507,8 @@ void tms340x0_device::dsjeq_b (UINT16 op) { DSJEQ(B); }
COUNT_CYCLES(2); \
} \
}
-void tms340x0_device::dsjne_a (UINT16 op) { DSJNE(A); }
-void tms340x0_device::dsjne_b (UINT16 op) { DSJNE(B); }
+void tms340x0_device::dsjne_a (uint16_t op) { DSJNE(A); }
+void tms340x0_device::dsjne_b (uint16_t op) { DSJNE(B); }
#define DSJS(R) \
{ \
@@ -1533,10 +1533,10 @@ void tms340x0_device::dsjne_b (UINT16 op) { DSJNE(B); }
COUNT_CYCLES(3); \
} \
}
-void tms340x0_device::dsjs_a (UINT16 op) { DSJS(A); }
-void tms340x0_device::dsjs_b (UINT16 op) { DSJS(B); }
+void tms340x0_device::dsjs_a (uint16_t op) { DSJS(A); }
+void tms340x0_device::dsjs_b (uint16_t op) { DSJS(B); }
-void tms340x0_device::emu(UINT16 op)
+void tms340x0_device::emu(uint16_t op)
{
/* in RUN state, this instruction is a NOP */
COUNT_CYCLES(6);
@@ -1544,31 +1544,31 @@ void tms340x0_device::emu(UINT16 op)
#define EXGPC(R) \
{ \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 temppc = *rd; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t temppc = *rd; \
*rd = m_pc; \
m_pc = temppc; \
CORRECT_ODD_PC("EXGPC"); \
COUNT_CYCLES(2); \
}
-void tms340x0_device::exgpc_a (UINT16 op) { EXGPC(A); }
-void tms340x0_device::exgpc_b (UINT16 op) { EXGPC(B); }
+void tms340x0_device::exgpc_a (uint16_t op) { EXGPC(A); }
+void tms340x0_device::exgpc_b (uint16_t op) { EXGPC(B); }
#define GETPC(R) \
{ \
R##REG(DSTREG(op)) = m_pc; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::getpc_a (UINT16 op) { GETPC(A); }
-void tms340x0_device::getpc_b (UINT16 op) { GETPC(B); }
+void tms340x0_device::getpc_a (uint16_t op) { GETPC(A); }
+void tms340x0_device::getpc_b (uint16_t op) { GETPC(B); }
#define GETST(R) \
{ \
R##REG(DSTREG(op)) = m_st; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::getst_a (UINT16 op) { GETST(A); }
-void tms340x0_device::getst_b (UINT16 op) { GETST(B); }
+void tms340x0_device::getst_a (uint16_t op) { GETST(A); }
+void tms340x0_device::getst_b (uint16_t op) { GETST(B); }
#define j_xx_8(TAKE) \
{ \
@@ -1636,195 +1636,195 @@ void tms340x0_device::getst_b (UINT16 op) { GETST(B); }
COUNT_CYCLES(1); \
}
-void tms340x0_device::j_UC_0(UINT16 op)
+void tms340x0_device::j_UC_0(uint16_t op)
{
j_xx_0(1);
}
-void tms340x0_device::j_UC_8(UINT16 op)
+void tms340x0_device::j_UC_8(uint16_t op)
{
j_xx_8(1);
}
-void tms340x0_device::j_UC_x(UINT16 op)
+void tms340x0_device::j_UC_x(uint16_t op)
{
j_xx_x(1);
}
-void tms340x0_device::j_P_0(UINT16 op)
+void tms340x0_device::j_P_0(uint16_t op)
{
j_xx_0(!N_FLAG() && !Z_FLAG());
}
-void tms340x0_device::j_P_8(UINT16 op)
+void tms340x0_device::j_P_8(uint16_t op)
{
j_xx_8(!N_FLAG() && !Z_FLAG());
}
-void tms340x0_device::j_P_x(UINT16 op)
+void tms340x0_device::j_P_x(uint16_t op)
{
j_xx_x(!N_FLAG() && !Z_FLAG());
}
-void tms340x0_device::j_LS_0(UINT16 op)
+void tms340x0_device::j_LS_0(uint16_t op)
{
j_xx_0(C_FLAG() || Z_FLAG());
}
-void tms340x0_device::j_LS_8(UINT16 op)
+void tms340x0_device::j_LS_8(uint16_t op)
{
j_xx_8(C_FLAG() || Z_FLAG());
}
-void tms340x0_device::j_LS_x(UINT16 op)
+void tms340x0_device::j_LS_x(uint16_t op)
{
j_xx_x(C_FLAG() || Z_FLAG());
}
-void tms340x0_device::j_HI_0(UINT16 op)
+void tms340x0_device::j_HI_0(uint16_t op)
{
j_xx_0(!C_FLAG() && !Z_FLAG());
}
-void tms340x0_device::j_HI_8(UINT16 op)
+void tms340x0_device::j_HI_8(uint16_t op)
{
j_xx_8(!C_FLAG() && !Z_FLAG());
}
-void tms340x0_device::j_HI_x(UINT16 op)
+void tms340x0_device::j_HI_x(uint16_t op)
{
j_xx_x(!C_FLAG() && !Z_FLAG());
}
-void tms340x0_device::j_LT_0(UINT16 op)
+void tms340x0_device::j_LT_0(uint16_t op)
{
j_xx_0((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
}
-void tms340x0_device::j_LT_8(UINT16 op)
+void tms340x0_device::j_LT_8(uint16_t op)
{
j_xx_8((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
}
-void tms340x0_device::j_LT_x(UINT16 op)
+void tms340x0_device::j_LT_x(uint16_t op)
{
j_xx_x((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()));
}
-void tms340x0_device::j_GE_0(UINT16 op)
+void tms340x0_device::j_GE_0(uint16_t op)
{
j_xx_0((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
}
-void tms340x0_device::j_GE_8(UINT16 op)
+void tms340x0_device::j_GE_8(uint16_t op)
{
j_xx_8((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
}
-void tms340x0_device::j_GE_x(UINT16 op)
+void tms340x0_device::j_GE_x(uint16_t op)
{
j_xx_x((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG()));
}
-void tms340x0_device::j_LE_0(UINT16 op)
+void tms340x0_device::j_LE_0(uint16_t op)
{
j_xx_0((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
}
-void tms340x0_device::j_LE_8(UINT16 op)
+void tms340x0_device::j_LE_8(uint16_t op)
{
j_xx_8((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
}
-void tms340x0_device::j_LE_x(UINT16 op)
+void tms340x0_device::j_LE_x(uint16_t op)
{
j_xx_x((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG());
}
-void tms340x0_device::j_GT_0(UINT16 op)
+void tms340x0_device::j_GT_0(uint16_t op)
{
j_xx_0((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
}
-void tms340x0_device::j_GT_8(UINT16 op)
+void tms340x0_device::j_GT_8(uint16_t op)
{
j_xx_8((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
}
-void tms340x0_device::j_GT_x(UINT16 op)
+void tms340x0_device::j_GT_x(uint16_t op)
{
j_xx_x((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG()));
}
-void tms340x0_device::j_C_0(UINT16 op)
+void tms340x0_device::j_C_0(uint16_t op)
{
j_xx_0(C_FLAG());
}
-void tms340x0_device::j_C_8(UINT16 op)
+void tms340x0_device::j_C_8(uint16_t op)
{
j_xx_8(C_FLAG());
}
-void tms340x0_device::j_C_x(UINT16 op)
+void tms340x0_device::j_C_x(uint16_t op)
{
j_xx_x(C_FLAG());
}
-void tms340x0_device::j_NC_0(UINT16 op)
+void tms340x0_device::j_NC_0(uint16_t op)
{
j_xx_0(!C_FLAG());
}
-void tms340x0_device::j_NC_8(UINT16 op)
+void tms340x0_device::j_NC_8(uint16_t op)
{
j_xx_8(!C_FLAG());
}
-void tms340x0_device::j_NC_x(UINT16 op)
+void tms340x0_device::j_NC_x(uint16_t op)
{
j_xx_x(!C_FLAG());
}
-void tms340x0_device::j_EQ_0(UINT16 op)
+void tms340x0_device::j_EQ_0(uint16_t op)
{
j_xx_0(Z_FLAG());
}
-void tms340x0_device::j_EQ_8(UINT16 op)
+void tms340x0_device::j_EQ_8(uint16_t op)
{
j_xx_8(Z_FLAG());
}
-void tms340x0_device::j_EQ_x(UINT16 op)
+void tms340x0_device::j_EQ_x(uint16_t op)
{
j_xx_x(Z_FLAG());
}
-void tms340x0_device::j_NE_0(UINT16 op)
+void tms340x0_device::j_NE_0(uint16_t op)
{
j_xx_0(!Z_FLAG());
}
-void tms340x0_device::j_NE_8(UINT16 op)
+void tms340x0_device::j_NE_8(uint16_t op)
{
j_xx_8(!Z_FLAG());
}
-void tms340x0_device::j_NE_x(UINT16 op)
+void tms340x0_device::j_NE_x(uint16_t op)
{
j_xx_x(!Z_FLAG());
}
-void tms340x0_device::j_V_0(UINT16 op)
+void tms340x0_device::j_V_0(uint16_t op)
{
j_xx_0(V_FLAG());
}
-void tms340x0_device::j_V_8(UINT16 op)
+void tms340x0_device::j_V_8(uint16_t op)
{
j_xx_8(V_FLAG());
}
-void tms340x0_device::j_V_x(UINT16 op)
+void tms340x0_device::j_V_x(uint16_t op)
{
j_xx_x(V_FLAG());
}
-void tms340x0_device::j_NV_0(UINT16 op)
+void tms340x0_device::j_NV_0(uint16_t op)
{
j_xx_0(!V_FLAG());
}
-void tms340x0_device::j_NV_8(UINT16 op)
+void tms340x0_device::j_NV_8(uint16_t op)
{
j_xx_8(!V_FLAG());
}
-void tms340x0_device::j_NV_x(UINT16 op)
+void tms340x0_device::j_NV_x(uint16_t op)
{
j_xx_x(!V_FLAG());
}
-void tms340x0_device::j_N_0(UINT16 op)
+void tms340x0_device::j_N_0(uint16_t op)
{
j_xx_0(N_FLAG());
}
-void tms340x0_device::j_N_8(UINT16 op)
+void tms340x0_device::j_N_8(uint16_t op)
{
j_xx_8(N_FLAG());
}
-void tms340x0_device::j_N_x(UINT16 op)
+void tms340x0_device::j_N_x(uint16_t op)
{
j_xx_x(N_FLAG());
}
-void tms340x0_device::j_NN_0(UINT16 op)
+void tms340x0_device::j_NN_0(uint16_t op)
{
j_xx_0(!N_FLAG());
}
-void tms340x0_device::j_NN_8(UINT16 op)
+void tms340x0_device::j_NN_8(uint16_t op)
{
j_xx_8(!N_FLAG());
}
-void tms340x0_device::j_NN_x(UINT16 op)
+void tms340x0_device::j_NN_x(uint16_t op)
{
j_xx_x(!N_FLAG());
}
@@ -1835,16 +1835,16 @@ void tms340x0_device::j_NN_x(UINT16 op)
CORRECT_ODD_PC("JUMP"); \
COUNT_CYCLES(2); \
}
-void tms340x0_device::jump_a (UINT16 op) { JUMP(A); }
-void tms340x0_device::jump_b (UINT16 op) { JUMP(B); }
+void tms340x0_device::jump_a (uint16_t op) { JUMP(A); }
+void tms340x0_device::jump_b (uint16_t op) { JUMP(B); }
-void tms340x0_device::popst(UINT16 op)
+void tms340x0_device::popst(uint16_t op)
{
SET_ST(POP());
COUNT_CYCLES(8);
}
-void tms340x0_device::pushst(UINT16 op)
+void tms340x0_device::pushst(uint16_t op)
{
PUSH(m_st);
COUNT_CYCLES(2);
@@ -1855,21 +1855,21 @@ void tms340x0_device::pushst(UINT16 op)
SET_ST(R##REG(DSTREG(op))); \
COUNT_CYCLES(3); \
}
-void tms340x0_device::putst_a (UINT16 op) { PUTST(A); }
-void tms340x0_device::putst_b (UINT16 op) { PUTST(B); }
+void tms340x0_device::putst_a (uint16_t op) { PUTST(A); }
+void tms340x0_device::putst_b (uint16_t op) { PUTST(B); }
-void tms340x0_device::reti(UINT16 op)
+void tms340x0_device::reti(uint16_t op)
{
- INT32 st = POP();
+ int32_t st = POP();
m_pc = POP();
CORRECT_ODD_PC("RETI");
SET_ST(st);
COUNT_CYCLES(11);
}
-void tms340x0_device::rets(UINT16 op)
+void tms340x0_device::rets(uint16_t op)
{
- UINT32 offs;
+ uint32_t offs;
m_pc = POP();
CORRECT_ODD_PC("RETS");
offs = PARAM_N(op);
@@ -1885,12 +1885,12 @@ void tms340x0_device::rets(UINT16 op)
R##REG(DSTREG(op)) = 0x0008; \
COUNT_CYCLES(1); \
}
-void tms340x0_device::rev_a (UINT16 op) { REV(A); }
-void tms340x0_device::rev_b (UINT16 op) { REV(B); }
+void tms340x0_device::rev_a (uint16_t op) { REV(A); }
+void tms340x0_device::rev_b (uint16_t op) { REV(B); }
-void tms340x0_device::trap(UINT16 op)
+void tms340x0_device::trap(uint16_t op)
{
- UINT32 t = PARAM_N(op);
+ uint32_t t = PARAM_N(op);
if (t)
{
PUSH(m_pc);
@@ -2020,29 +2020,29 @@ New 34020 ops:
#define ADD_XYI(R) \
{ \
- UINT32 a = PARAM_LONG(); \
+ uint32_t a = PARAM_LONG(); \
XY *b = &R##REG_XY(DSTREG(op)); \
CLR_NCZV(); \
- b->x += (INT16)(a & 0xffff); \
- b->y += ((INT32)a >> 16); \
+ b->x += (int16_t)(a & 0xffff); \
+ b->y += ((int32_t)a >> 16); \
SET_N_LOG(b->x == 0); \
SET_C_BIT_LO(b->y, 15); \
SET_Z_LOG(b->y == 0); \
SET_V_BIT_LO(b->x, 15); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::addxyi_a(UINT16 op)
+void tms340x0_device::addxyi_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
ADD_XYI(A);
}
-void tms340x0_device::addxyi_b(UINT16 op)
+void tms340x0_device::addxyi_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
ADD_XYI(B);
}
-void tms340x0_device::blmove(UINT16 op)
+void tms340x0_device::blmove(uint16_t op)
{
offs_t src = BREG(0);
offs_t dst = BREG(2);
@@ -2099,91 +2099,91 @@ void tms340x0_device::blmove(UINT16 op)
m_pc -= 0x10;
}
-void tms340x0_device::cexec_l(UINT16 op)
+void tms340x0_device::cexec_l(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cexec_l\n");
}
-void tms340x0_device::cexec_s(UINT16 op)
+void tms340x0_device::cexec_s(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cexec_s\n");
}
-void tms340x0_device::clip(UINT16 op)
+void tms340x0_device::clip(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:clip\n");
}
-void tms340x0_device::cmovcg_a(UINT16 op)
+void tms340x0_device::cmovcg_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovcg_a\n");
}
-void tms340x0_device::cmovcg_b(UINT16 op)
+void tms340x0_device::cmovcg_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovcg_b\n");
}
-void tms340x0_device::cmovcm_f(UINT16 op)
+void tms340x0_device::cmovcm_f(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovcm_f\n");
}
-void tms340x0_device::cmovcm_b(UINT16 op)
+void tms340x0_device::cmovcm_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovcm_b\n");
}
-void tms340x0_device::cmovgc_a(UINT16 op)
+void tms340x0_device::cmovgc_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovgc_a\n");
}
-void tms340x0_device::cmovgc_b(UINT16 op)
+void tms340x0_device::cmovgc_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovgc_b\n");
}
-void tms340x0_device::cmovgc_a_s(UINT16 op)
+void tms340x0_device::cmovgc_a_s(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovgc_a_s\n");
}
-void tms340x0_device::cmovgc_b_s(UINT16 op)
+void tms340x0_device::cmovgc_b_s(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovgc_b_s\n");
}
-void tms340x0_device::cmovmc_f(UINT16 op)
+void tms340x0_device::cmovmc_f(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovmc_f\n");
}
-void tms340x0_device::cmovmc_f_va(UINT16 op)
+void tms340x0_device::cmovmc_f_va(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovmc_f_va\n");
}
-void tms340x0_device::cmovmc_f_vb(UINT16 op)
+void tms340x0_device::cmovmc_f_vb(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovmc_f_vb\n");
}
-void tms340x0_device::cmovmc_b(UINT16 op)
+void tms340x0_device::cmovmc_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cmovmc_b\n");
@@ -2191,133 +2191,133 @@ void tms340x0_device::cmovmc_b(UINT16 op)
#define CMPK(R) \
{ \
- INT32 r; \
- INT32 *rd = &R##REG(DSTREG(op)); \
- INT32 t = PARAM_K(op); if (!t) t = 32; \
+ int32_t r; \
+ int32_t *rd = &R##REG(DSTREG(op)); \
+ int32_t t = PARAM_K(op); if (!t) t = 32; \
CLR_NCZV(); \
r = *rd - t; \
SET_NZCV_SUB(*rd,t,r); \
COUNT_CYCLES(1); \
}
-void tms340x0_device::cmp_k_a(UINT16 op)
+void tms340x0_device::cmp_k_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
CMPK(A);
}
-void tms340x0_device::cmp_k_b(UINT16 op)
+void tms340x0_device::cmp_k_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
CMPK(B);
}
-void tms340x0_device::cvdxyl_a(UINT16 op)
+void tms340x0_device::cvdxyl_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cvdxyl_a\n");
}
-void tms340x0_device::cvdxyl_b(UINT16 op)
+void tms340x0_device::cvdxyl_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cvdxyl_b\n");
}
-void tms340x0_device::cvmxyl_a(UINT16 op)
+void tms340x0_device::cvmxyl_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cvmxyl_a\n");
}
-void tms340x0_device::cvmxyl_b(UINT16 op)
+void tms340x0_device::cvmxyl_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cvmxyl_b\n");
}
-void tms340x0_device::cvsxyl_a(UINT16 op)
+void tms340x0_device::cvsxyl_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cvsxyl_a\n");
}
-void tms340x0_device::cvsxyl_b(UINT16 op)
+void tms340x0_device::cvsxyl_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:cvsxyl_b\n");
}
-void tms340x0_device::exgps_a(UINT16 op)
+void tms340x0_device::exgps_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:exgps_a\n");
}
-void tms340x0_device::exgps_b(UINT16 op)
+void tms340x0_device::exgps_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:exgps_b\n");
}
-void tms340x0_device::fline(UINT16 op)
+void tms340x0_device::fline(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:fline\n");
}
-void tms340x0_device::fpixeq(UINT16 op)
+void tms340x0_device::fpixeq(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:fpixeq\n");
}
-void tms340x0_device::fpixne(UINT16 op)
+void tms340x0_device::fpixne(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:fpixne\n");
}
-void tms340x0_device::getps_a(UINT16 op)
+void tms340x0_device::getps_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:getps_a\n");
}
-void tms340x0_device::getps_b(UINT16 op)
+void tms340x0_device::getps_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:getps_b\n");
}
-void tms340x0_device::idle(UINT16 op)
+void tms340x0_device::idle(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:idle\n");
}
-void tms340x0_device::linit(UINT16 op)
+void tms340x0_device::linit(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:linit\n");
}
-void tms340x0_device::mwait(UINT16 op)
+void tms340x0_device::mwait(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
}
-void tms340x0_device::pfill_xy(UINT16 op)
+void tms340x0_device::pfill_xy(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:pfill_xy\n");
}
-void tms340x0_device::pixblt_l_m_l(UINT16 op)
+void tms340x0_device::pixblt_l_m_l(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:pixblt_l_m_l\n");
}
-void tms340x0_device::retm(UINT16 op)
+void tms340x0_device::retm(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:retm\n");
@@ -2325,9 +2325,9 @@ void tms340x0_device::retm(UINT16 op)
#define RMO(R) \
{ \
- UINT32 res = 0; \
- UINT32 rs = R##REG(SRCREG(op)); \
- INT32 *rd = &R##REG(DSTREG(op)); \
+ uint32_t res = 0; \
+ uint32_t rs = R##REG(SRCREG(op)); \
+ int32_t *rd = &R##REG(DSTREG(op)); \
CLR_Z(); \
SET_Z_VAL(rs); \
if (rs) \
@@ -2342,12 +2342,12 @@ void tms340x0_device::retm(UINT16 op)
COUNT_CYCLES(1); \
}
-void tms340x0_device::rmo_a(UINT16 op) { RMO(A); }
-void tms340x0_device::rmo_b(UINT16 op) { RMO(B); }
+void tms340x0_device::rmo_a(uint16_t op) { RMO(A); }
+void tms340x0_device::rmo_b(uint16_t op) { RMO(B); }
#define RPIX(R) \
{ \
- UINT32 v = R##REG(DSTREG(op)); \
+ uint32_t v = R##REG(DSTREG(op)); \
switch (m_pixelshift) \
{ \
case 0: \
@@ -2387,73 +2387,73 @@ void tms340x0_device::rmo_b(UINT16 op) { RMO(B); }
R##REG(DSTREG(op)) = v; \
}
-void tms340x0_device::rpix_a(UINT16 op)
+void tms340x0_device::rpix_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
RPIX(A);
}
-void tms340x0_device::rpix_b(UINT16 op)
+void tms340x0_device::rpix_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
RPIX(B);
}
-void tms340x0_device::setcdp(UINT16 op)
+void tms340x0_device::setcdp(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:setcdp\n");
}
-void tms340x0_device::setcmp(UINT16 op)
+void tms340x0_device::setcmp(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:setcmp\n");
}
-void tms340x0_device::setcsp(UINT16 op)
+void tms340x0_device::setcsp(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:setcsp\n");
}
-void tms340x0_device::swapf_a(UINT16 op)
+void tms340x0_device::swapf_a(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:swapf_a\n");
}
-void tms340x0_device::swapf_b(UINT16 op)
+void tms340x0_device::swapf_b(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:swapf_b\n");
}
-void tms340x0_device::tfill_xy(UINT16 op)
+void tms340x0_device::tfill_xy(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:tfill_xy\n");
}
-void tms340x0_device::trapl(UINT16 op)
+void tms340x0_device::trapl(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:trapl\n");
}
-void tms340x0_device::vblt_b_l(UINT16 op)
+void tms340x0_device::vblt_b_l(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:vblt_b_l\n");
}
-void tms340x0_device::vfill_l(UINT16 op)
+void tms340x0_device::vfill_l(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:vfill_l\n");
}
-void tms340x0_device::vlcol(UINT16 op)
+void tms340x0_device::vlcol(uint16_t op)
{
if (!m_is_34020) { unimpl(op); return; }
logerror("020:vlcol\n");
diff --git a/src/devices/cpu/tms34010/dis34010.cpp b/src/devices/cpu/tms34010/dis34010.cpp
index 19e3338a7d2..01aebd4a6f1 100644
--- a/src/devices/cpu/tms34010/dis34010.cpp
+++ b/src/devices/cpu/tms34010/dis34010.cpp
@@ -4,8 +4,8 @@
#include "emu.h"
-static UINT8 *filebuf;
-static UINT32 offset;
+static uint8_t *filebuf;
+static uint32_t offset;
#define STANDALONE
#include "34010dsm.c"
@@ -29,10 +29,10 @@ static void usage (void)
int main (int argc,char *argv[])
{
- UINT8 i,j,n;
+ uint8_t i,j,n;
char *filename=0,buf[80];
FILE *f;
- UINT32 begin=0,end=(UINT32)-1,filelen,len,pc;
+ uint32_t begin=0,end=(uint32_t)-1,filelen,len,pc;
printf ("DIS34010\n"
"Copyright Zsolt Vasvari/Aaron Giles\n");
diff --git a/src/devices/cpu/tms34010/tms34010.cpp b/src/devices/cpu/tms34010/tms34010.cpp
index c2e67ccee7c..7cea0c14032 100644
--- a/src/devices/cpu/tms34010/tms34010.cpp
+++ b/src/devices/cpu/tms34010/tms34010.cpp
@@ -33,7 +33,7 @@ const device_type TMS34020 = &device_creator<tms34020_device>;
GLOBAL VARIABLES
***************************************************************************/
-tms340x0_device::tms340x0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname)
+tms340x0_device::tms340x0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__)
, device_video_interface(mconfig, *this)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 32, 3), m_pc(0), m_ppc(0), m_st(0), m_pixel_write(nullptr), m_pixel_read(nullptr), m_raster_op(nullptr), m_pixel_op(nullptr), m_pixel_op_timing(0), m_convsp(0), m_convdp(0), m_convmp(0), m_gfxcycles(0), m_pixelshift(0), m_is_34020(0), m_reset_deferred(false)
@@ -45,14 +45,14 @@ tms340x0_device::tms340x0_device(const machine_config &mconfig, device_type type
}
-tms34010_device::tms34010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms34010_device::tms34010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms340x0_device(mconfig, TMS34010, "TMS34010", tag, owner, clock, "tms34010")
{
m_is_34020 = 0;
}
-tms34020_device::tms34020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms34020_device::tms34020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms340x0_device(mconfig, TMS34020, "TMS34020", tag, owner, clock, "tms34020")
{
m_is_34020 = 1;
@@ -108,7 +108,7 @@ tms34020_device::tms34020_device(const machine_config &mconfig, const char *tag,
#define SKIP_LONG() (m_pc += (4 << 3))
#define PARAM_K(O) (((O) >> 5) & 0x1f)
#define PARAM_N(O) ((O) & 0x1f)
-#define PARAM_REL8(O) ((INT8)(O))
+#define PARAM_REL8(O) ((int8_t)(O))
/* memory I/O */
#define WFIELD0(a,b) (this->*s_wfield_functions[FW(0)])(a,b)
@@ -156,7 +156,7 @@ tms34020_device::tms34020_device(const machine_config &mconfig, const char *tag,
***************************************************************************/
/* Break up Status Register into indiviual flags */
-inline void tms340x0_device::SET_ST(UINT32 st)
+inline void tms340x0_device::SET_ST(uint32_t st)
{
m_st = st;
/* interrupts might have been enabled, check it */
@@ -170,74 +170,74 @@ inline void tms340x0_device::RESET_ST()
}
/* shortcuts for reading opcodes */
-inline UINT32 tms340x0_device::ROPCODE()
+inline uint32_t tms340x0_device::ROPCODE()
{
- UINT32 pc = TOBYTE(m_pc);
+ uint32_t pc = TOBYTE(m_pc);
m_pc += 2 << 3;
return m_direct->read_word(pc);
}
-inline INT16 tms340x0_device::PARAM_WORD()
+inline int16_t tms340x0_device::PARAM_WORD()
{
- UINT32 pc = TOBYTE(m_pc);
+ uint32_t pc = TOBYTE(m_pc);
m_pc += 2 << 3;
return m_direct->read_word(pc);
}
-inline INT32 tms340x0_device::PARAM_LONG()
+inline int32_t tms340x0_device::PARAM_LONG()
{
- UINT32 pc = TOBYTE(m_pc);
+ uint32_t pc = TOBYTE(m_pc);
m_pc += 4 << 3;
- return (UINT16)m_direct->read_word(pc) | (m_direct->read_word(pc + 2) << 16);
+ return (uint16_t)m_direct->read_word(pc) | (m_direct->read_word(pc + 2) << 16);
}
-inline INT16 tms340x0_device::PARAM_WORD_NO_INC()
+inline int16_t tms340x0_device::PARAM_WORD_NO_INC()
{
return m_direct->read_word(TOBYTE(m_pc));
}
-inline INT32 tms340x0_device::PARAM_LONG_NO_INC()
+inline int32_t tms340x0_device::PARAM_LONG_NO_INC()
{
- UINT32 pc = TOBYTE(m_pc);
- return (UINT16)m_direct->read_word(pc) | (m_direct->read_word(pc + 2) << 16);
+ uint32_t pc = TOBYTE(m_pc);
+ return (uint16_t)m_direct->read_word(pc) | (m_direct->read_word(pc + 2) << 16);
}
/* read memory byte */
-inline UINT32 tms340x0_device::RBYTE(offs_t offset)
+inline uint32_t tms340x0_device::RBYTE(offs_t offset)
{
- UINT32 ret;
+ uint32_t ret;
RFIELDMAC_8();
return ret;
}
/* write memory byte */
-inline void tms340x0_device::WBYTE(offs_t offset, UINT32 data)
+inline void tms340x0_device::WBYTE(offs_t offset, uint32_t data)
{
WFIELDMAC_8();
}
/* read memory long */
-inline UINT32 tms340x0_device::RLONG(offs_t offset)
+inline uint32_t tms340x0_device::RLONG(offs_t offset)
{
RFIELDMAC_32();
}
/* write memory long */
-inline void tms340x0_device::WLONG(offs_t offset, UINT32 data)
+inline void tms340x0_device::WLONG(offs_t offset, uint32_t data)
{
WFIELDMAC_32();
}
/* pushes/pops a value from the stack */
-inline void tms340x0_device::PUSH(UINT32 data)
+inline void tms340x0_device::PUSH(uint32_t data)
{
SP() -= 0x20;
WLONG(SP(), data);
}
-inline INT32 tms340x0_device::POP()
+inline int32_t tms340x0_device::POP()
{
- INT32 ret = RLONG(SP());
+ int32_t ret = RLONG(SP());
SP() += 0x20;
return ret;
}
@@ -252,23 +252,23 @@ inline INT32 tms340x0_device::POP()
/* TODO: Plane masking */ \
return (TMS34010_RDMEM_WORD(TOBYTE(offset & 0xfffffff0)) >> (offset & m1)) & m2;
-UINT32 tms340x0_device::read_pixel_1(offs_t offset) { RP(0x0f,0x01) }
-UINT32 tms340x0_device::read_pixel_2(offs_t offset) { RP(0x0e,0x03) }
-UINT32 tms340x0_device::read_pixel_4(offs_t offset) { RP(0x0c,0x0f) }
-UINT32 tms340x0_device::read_pixel_8(offs_t offset) { RP(0x08,0xff) }
-UINT32 tms340x0_device::read_pixel_16(offs_t offset)
+uint32_t tms340x0_device::read_pixel_1(offs_t offset) { RP(0x0f,0x01) }
+uint32_t tms340x0_device::read_pixel_2(offs_t offset) { RP(0x0e,0x03) }
+uint32_t tms340x0_device::read_pixel_4(offs_t offset) { RP(0x0c,0x0f) }
+uint32_t tms340x0_device::read_pixel_8(offs_t offset) { RP(0x08,0xff) }
+uint32_t tms340x0_device::read_pixel_16(offs_t offset)
{
/* TODO: Plane masking */
return TMS34010_RDMEM_WORD(TOBYTE(offset & 0xfffffff0));
}
-UINT32 tms340x0_device::read_pixel_32(offs_t offset)
+uint32_t tms340x0_device::read_pixel_32(offs_t offset)
{
/* TODO: Plane masking */
return TMS34010_RDMEM_DWORD(TOBYTE(offset & 0xffffffe0));
}
/* Shift register read */
-UINT32 tms340x0_device::read_pixel_shiftreg(offs_t offset)
+uint32_t tms340x0_device::read_pixel_shiftreg(offs_t offset)
{
if (!m_to_shiftreg_cb.isnull())
m_to_shiftreg_cb(*m_program, offset, &m_shiftreg[0]);
@@ -285,9 +285,9 @@ UINT32 tms340x0_device::read_pixel_shiftreg(offs_t offset)
/* No Raster Op + No Transparency */
#define WP(m1,m2) \
- UINT32 a = TOBYTE(offset & 0xfffffff0); \
- UINT32 pix = TMS34010_RDMEM_WORD(a); \
- UINT32 shiftcount = offset & m1; \
+ uint32_t a = TOBYTE(offset & 0xfffffff0); \
+ uint32_t pix = TMS34010_RDMEM_WORD(a); \
+ uint32_t shiftcount = offset & m1; \
\
/* TODO: plane masking */ \
data &= m2; \
@@ -300,9 +300,9 @@ UINT32 tms340x0_device::read_pixel_shiftreg(offs_t offset)
data &= m2; \
if (data) \
{ \
- UINT32 a = TOBYTE(offset & 0xfffffff0); \
- UINT32 pix = TMS34010_RDMEM_WORD(a); \
- UINT32 shiftcount = offset & m1; \
+ uint32_t a = TOBYTE(offset & 0xfffffff0); \
+ uint32_t pix = TMS34010_RDMEM_WORD(a); \
+ uint32_t shiftcount = offset & m1; \
\
/* TODO: plane masking */ \
pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
@@ -310,9 +310,9 @@ UINT32 tms340x0_device::read_pixel_shiftreg(offs_t offset)
}
/* Raster Op + No Transparency */
#define WP_R(m1,m2) \
- UINT32 a = TOBYTE(offset & 0xfffffff0); \
- UINT32 pix = TMS34010_RDMEM_WORD(a); \
- UINT32 shiftcount = offset & m1; \
+ uint32_t a = TOBYTE(offset & 0xfffffff0); \
+ uint32_t pix = TMS34010_RDMEM_WORD(a); \
+ uint32_t shiftcount = offset & m1; \
\
/* TODO: plane masking */ \
data = (this->*m_raster_op)(data & m2, (pix >> shiftcount) & m2) & m2; \
@@ -321,9 +321,9 @@ UINT32 tms340x0_device::read_pixel_shiftreg(offs_t offset)
/* Raster Op + Transparency */
#define WP_R_T(m1,m2) \
- UINT32 a = TOBYTE(offset & 0xfffffff0); \
- UINT32 pix = TMS34010_RDMEM_WORD(a); \
- UINT32 shiftcount = offset & m1; \
+ uint32_t a = TOBYTE(offset & 0xfffffff0); \
+ uint32_t pix = TMS34010_RDMEM_WORD(a); \
+ uint32_t shiftcount = offset & m1; \
\
/* TODO: plane masking */ \
data = (this->*m_raster_op)(data & m2, (pix >> shiftcount) & m2) & m2; \
@@ -334,33 +334,33 @@ UINT32 tms340x0_device::read_pixel_shiftreg(offs_t offset)
}
/* No Raster Op + No Transparency */
-void tms340x0_device::write_pixel_1(offs_t offset, UINT32 data) { WP(0x0f, 0x01); }
-void tms340x0_device::write_pixel_2(offs_t offset, UINT32 data) { WP(0x0e, 0x03); }
-void tms340x0_device::write_pixel_4(offs_t offset, UINT32 data) { WP(0x0c, 0x0f); }
-void tms340x0_device::write_pixel_8(offs_t offset, UINT32 data) { WP(0x08, 0xff); }
-void tms340x0_device::write_pixel_16(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_1(offs_t offset, uint32_t data) { WP(0x0f, 0x01); }
+void tms340x0_device::write_pixel_2(offs_t offset, uint32_t data) { WP(0x0e, 0x03); }
+void tms340x0_device::write_pixel_4(offs_t offset, uint32_t data) { WP(0x0c, 0x0f); }
+void tms340x0_device::write_pixel_8(offs_t offset, uint32_t data) { WP(0x08, 0xff); }
+void tms340x0_device::write_pixel_16(offs_t offset, uint32_t data)
{
/* TODO: plane masking */
TMS34010_WRMEM_WORD(TOBYTE(offset & 0xfffffff0), data);
}
-void tms340x0_device::write_pixel_32(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_32(offs_t offset, uint32_t data)
{
/* TODO: plane masking */
TMS34010_WRMEM_WORD(TOBYTE(offset & 0xffffffe0), data);
}
/* No Raster Op + Transparency */
-void tms340x0_device::write_pixel_t_1(offs_t offset, UINT32 data) { WP_T(0x0f, 0x01); }
-void tms340x0_device::write_pixel_t_2(offs_t offset, UINT32 data) { WP_T(0x0e, 0x03); }
-void tms340x0_device::write_pixel_t_4(offs_t offset, UINT32 data) { WP_T(0x0c, 0x0f); }
-void tms340x0_device::write_pixel_t_8(offs_t offset, UINT32 data) { WP_T(0x08, 0xff); }
-void tms340x0_device::write_pixel_t_16(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_t_1(offs_t offset, uint32_t data) { WP_T(0x0f, 0x01); }
+void tms340x0_device::write_pixel_t_2(offs_t offset, uint32_t data) { WP_T(0x0e, 0x03); }
+void tms340x0_device::write_pixel_t_4(offs_t offset, uint32_t data) { WP_T(0x0c, 0x0f); }
+void tms340x0_device::write_pixel_t_8(offs_t offset, uint32_t data) { WP_T(0x08, 0xff); }
+void tms340x0_device::write_pixel_t_16(offs_t offset, uint32_t data)
{
/* TODO: plane masking */
if (data)
TMS34010_WRMEM_WORD(TOBYTE(offset & 0xfffffff0), data);
}
-void tms340x0_device::write_pixel_t_32(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_t_32(offs_t offset, uint32_t data)
{
/* TODO: plane masking */
if (data)
@@ -368,41 +368,41 @@ void tms340x0_device::write_pixel_t_32(offs_t offset, UINT32 data)
}
/* Raster Op + No Transparency */
-void tms340x0_device::write_pixel_r_1(offs_t offset, UINT32 data) { WP_R(0x0f, 0x01); }
-void tms340x0_device::write_pixel_r_2(offs_t offset, UINT32 data) { WP_R(0x0e, 0x03); }
-void tms340x0_device::write_pixel_r_4(offs_t offset, UINT32 data) { WP_R(0x0c, 0x0f); }
-void tms340x0_device::write_pixel_r_8(offs_t offset, UINT32 data) { WP_R(0x08, 0xff); }
-void tms340x0_device::write_pixel_r_16(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_r_1(offs_t offset, uint32_t data) { WP_R(0x0f, 0x01); }
+void tms340x0_device::write_pixel_r_2(offs_t offset, uint32_t data) { WP_R(0x0e, 0x03); }
+void tms340x0_device::write_pixel_r_4(offs_t offset, uint32_t data) { WP_R(0x0c, 0x0f); }
+void tms340x0_device::write_pixel_r_8(offs_t offset, uint32_t data) { WP_R(0x08, 0xff); }
+void tms340x0_device::write_pixel_r_16(offs_t offset, uint32_t data)
{
/* TODO: plane masking */
- UINT32 a = TOBYTE(offset & 0xfffffff0);
+ uint32_t a = TOBYTE(offset & 0xfffffff0);
TMS34010_WRMEM_WORD(a, (this->*m_raster_op)(data, TMS34010_RDMEM_WORD(a)));
}
-void tms340x0_device::write_pixel_r_32(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_r_32(offs_t offset, uint32_t data)
{
/* TODO: plane masking */
- UINT32 a = TOBYTE(offset & 0xffffffe0);
+ uint32_t a = TOBYTE(offset & 0xffffffe0);
TMS34010_WRMEM_DWORD(a, (this->*m_raster_op)(data, TMS34010_RDMEM_DWORD(a)));
}
/* Raster Op + Transparency */
-void tms340x0_device::write_pixel_r_t_1(offs_t offset, UINT32 data) { WP_R_T(0x0f,0x01); }
-void tms340x0_device::write_pixel_r_t_2(offs_t offset, UINT32 data) { WP_R_T(0x0e,0x03); }
-void tms340x0_device::write_pixel_r_t_4(offs_t offset, UINT32 data) { WP_R_T(0x0c,0x0f); }
-void tms340x0_device::write_pixel_r_t_8(offs_t offset, UINT32 data) { WP_R_T(0x08,0xff); }
-void tms340x0_device::write_pixel_r_t_16(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_r_t_1(offs_t offset, uint32_t data) { WP_R_T(0x0f,0x01); }
+void tms340x0_device::write_pixel_r_t_2(offs_t offset, uint32_t data) { WP_R_T(0x0e,0x03); }
+void tms340x0_device::write_pixel_r_t_4(offs_t offset, uint32_t data) { WP_R_T(0x0c,0x0f); }
+void tms340x0_device::write_pixel_r_t_8(offs_t offset, uint32_t data) { WP_R_T(0x08,0xff); }
+void tms340x0_device::write_pixel_r_t_16(offs_t offset, uint32_t data)
{
/* TODO: plane masking */
- UINT32 a = TOBYTE(offset & 0xfffffff0);
+ uint32_t a = TOBYTE(offset & 0xfffffff0);
data = (this->*m_raster_op)(data, TMS34010_RDMEM_WORD(a));
if (data)
TMS34010_WRMEM_WORD(a, data);
}
-void tms340x0_device::write_pixel_r_t_32(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_r_t_32(offs_t offset, uint32_t data)
{
/* TODO: plane masking */
- UINT32 a = TOBYTE(offset & 0xffffffe0);
+ uint32_t a = TOBYTE(offset & 0xffffffe0);
data = (this->*m_raster_op)(data, TMS34010_RDMEM_DWORD(a));
if (data)
@@ -410,7 +410,7 @@ void tms340x0_device::write_pixel_r_t_32(offs_t offset, UINT32 data)
}
/* Shift register write */
-void tms340x0_device::write_pixel_shiftreg(offs_t offset, UINT32 data)
+void tms340x0_device::write_pixel_shiftreg(offs_t offset, uint32_t data)
{
if (!m_from_shiftreg_cb.isnull())
m_from_shiftreg_cb(*m_program, offset, &m_shiftreg[0]);
@@ -425,32 +425,32 @@ void tms340x0_device::write_pixel_shiftreg(offs_t offset, UINT32 data)
***************************************************************************/
/* Raster operations */
-UINT32 tms340x0_device::raster_op_1(UINT32 newpix, UINT32 oldpix) { return newpix & oldpix; }
-UINT32 tms340x0_device::raster_op_2(UINT32 newpix, UINT32 oldpix) { return newpix & ~oldpix; }
-UINT32 tms340x0_device::raster_op_3(UINT32 newpix, UINT32 oldpix) { return 0; }
-UINT32 tms340x0_device::raster_op_4(UINT32 newpix, UINT32 oldpix) { return newpix | ~oldpix; }
-UINT32 tms340x0_device::raster_op_5(UINT32 newpix, UINT32 oldpix) { return ~(newpix ^ oldpix); }
-UINT32 tms340x0_device::raster_op_6(UINT32 newpix, UINT32 oldpix) { return ~oldpix; }
-UINT32 tms340x0_device::raster_op_7(UINT32 newpix, UINT32 oldpix) { return ~(newpix | oldpix); }
-UINT32 tms340x0_device::raster_op_8(UINT32 newpix, UINT32 oldpix) { return newpix | oldpix; }
-UINT32 tms340x0_device::raster_op_9(UINT32 newpix, UINT32 oldpix) { return oldpix; }
-UINT32 tms340x0_device::raster_op_10(UINT32 newpix, UINT32 oldpix) { return newpix ^ oldpix; }
-UINT32 tms340x0_device::raster_op_11(UINT32 newpix, UINT32 oldpix) { return ~newpix & oldpix; }
-UINT32 tms340x0_device::raster_op_12(UINT32 newpix, UINT32 oldpix) { return 0xffff; }
-UINT32 tms340x0_device::raster_op_13(UINT32 newpix, UINT32 oldpix) { return ~newpix | oldpix; }
-UINT32 tms340x0_device::raster_op_14(UINT32 newpix, UINT32 oldpix) { return ~(newpix & oldpix); }
-UINT32 tms340x0_device::raster_op_15(UINT32 newpix, UINT32 oldpix) { return ~newpix; }
-UINT32 tms340x0_device::raster_op_16(UINT32 newpix, UINT32 oldpix) { return newpix + oldpix; }
-UINT32 tms340x0_device::raster_op_17(UINT32 newpix, UINT32 oldpix)
+uint32_t tms340x0_device::raster_op_1(uint32_t newpix, uint32_t oldpix) { return newpix & oldpix; }
+uint32_t tms340x0_device::raster_op_2(uint32_t newpix, uint32_t oldpix) { return newpix & ~oldpix; }
+uint32_t tms340x0_device::raster_op_3(uint32_t newpix, uint32_t oldpix) { return 0; }
+uint32_t tms340x0_device::raster_op_4(uint32_t newpix, uint32_t oldpix) { return newpix | ~oldpix; }
+uint32_t tms340x0_device::raster_op_5(uint32_t newpix, uint32_t oldpix) { return ~(newpix ^ oldpix); }
+uint32_t tms340x0_device::raster_op_6(uint32_t newpix, uint32_t oldpix) { return ~oldpix; }
+uint32_t tms340x0_device::raster_op_7(uint32_t newpix, uint32_t oldpix) { return ~(newpix | oldpix); }
+uint32_t tms340x0_device::raster_op_8(uint32_t newpix, uint32_t oldpix) { return newpix | oldpix; }
+uint32_t tms340x0_device::raster_op_9(uint32_t newpix, uint32_t oldpix) { return oldpix; }
+uint32_t tms340x0_device::raster_op_10(uint32_t newpix, uint32_t oldpix) { return newpix ^ oldpix; }
+uint32_t tms340x0_device::raster_op_11(uint32_t newpix, uint32_t oldpix) { return ~newpix & oldpix; }
+uint32_t tms340x0_device::raster_op_12(uint32_t newpix, uint32_t oldpix) { return 0xffff; }
+uint32_t tms340x0_device::raster_op_13(uint32_t newpix, uint32_t oldpix) { return ~newpix | oldpix; }
+uint32_t tms340x0_device::raster_op_14(uint32_t newpix, uint32_t oldpix) { return ~(newpix & oldpix); }
+uint32_t tms340x0_device::raster_op_15(uint32_t newpix, uint32_t oldpix) { return ~newpix; }
+uint32_t tms340x0_device::raster_op_16(uint32_t newpix, uint32_t oldpix) { return newpix + oldpix; }
+uint32_t tms340x0_device::raster_op_17(uint32_t newpix, uint32_t oldpix)
{
- UINT32 max = (UINT32)0xffffffff >> (32 - IOREG(REG_PSIZE));
- UINT32 res = newpix + oldpix;
+ uint32_t max = (uint32_t)0xffffffff >> (32 - IOREG(REG_PSIZE));
+ uint32_t res = newpix + oldpix;
return (res > max) ? max : res;
}
-UINT32 tms340x0_device::raster_op_18(UINT32 newpix, UINT32 oldpix) { return oldpix - newpix; }
-UINT32 tms340x0_device::raster_op_19(UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? oldpix - newpix : 0; }
-UINT32 tms340x0_device::raster_op_20(UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? oldpix : newpix; }
-UINT32 tms340x0_device::raster_op_21(UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? newpix : oldpix; }
+uint32_t tms340x0_device::raster_op_18(uint32_t newpix, uint32_t oldpix) { return oldpix - newpix; }
+uint32_t tms340x0_device::raster_op_19(uint32_t newpix, uint32_t oldpix) { return (oldpix > newpix) ? oldpix - newpix : 0; }
+uint32_t tms340x0_device::raster_op_20(uint32_t newpix, uint32_t oldpix) { return (oldpix > newpix) ? oldpix : newpix; }
+uint32_t tms340x0_device::raster_op_21(uint32_t newpix, uint32_t oldpix) { return (oldpix > newpix) ? newpix : oldpix; }
@@ -731,7 +731,7 @@ void tms340x0_device::execute_run()
{
do
{
- UINT16 op;
+ uint16_t op;
m_ppc = m_pc;
op = ROPCODE();
(this->*s_opcode_table[op >> 4])(op);
@@ -741,7 +741,7 @@ void tms340x0_device::execute_run()
{
do
{
- UINT16 op;
+ uint16_t op;
m_ppc = m_pc;
debugger_instruction_hook(this, m_pc);
op = ROPCODE();
@@ -773,7 +773,7 @@ const tms340x0_device::pixel_read_func tms340x0_device::s_pixel_read_ops[6] =
void tms340x0_device::set_pixel_function()
{
- UINT32 i1,i2;
+ uint32_t i1,i2;
if (IOREG(REG_DPYCTL) & 0x0800)
{
@@ -939,7 +939,7 @@ TIMER_CALLBACK_MEMBER( tms340x0_device::scanline_callback )
/* 34010 increments by the DUDATE field in DPYCTL */
if (!m_is_34020)
{
- UINT16 dpyadr = IOREG(REG_DPYADR);
+ uint16_t dpyadr = IOREG(REG_DPYADR);
if ((dpyadr & 3) == 0)
dpyadr = ((dpyadr & 0xfffc) - (IOREG(REG_DPYCTL) & 0x03fc)) | (IOREG(REG_DPYSTRT) & 0x0003);
else
@@ -950,8 +950,8 @@ TIMER_CALLBACK_MEMBER( tms340x0_device::scanline_callback )
/* 34020 updates based on the DINC register, including zoom */
else
{
- UINT32 dpynx = IOREG(REG020_DPYNXL) | (IOREG(REG020_DPYNXH) << 16);
- UINT32 dinc = IOREG(REG020_DINCL) | (IOREG(REG020_DINCH) << 16);
+ uint32_t dpynx = IOREG(REG020_DPYNXL) | (IOREG(REG020_DPYNXH) << 16);
+ uint32_t dinc = IOREG(REG020_DINCL) | (IOREG(REG020_DINCH) << 16);
dpynx = (dpynx & 0xffffffe0) | ((dpynx + dinc) & 0x1f);
if ((dpynx & 0x1f) == 0)
dpynx += dinc & 0xffffffe0;
@@ -983,7 +983,7 @@ void tms340x0_device::get_display_params(tms34010_display_params *params)
/* 34010 gets its address from DPYADR and DPYTAP */
if (!m_is_34020)
{
- UINT16 dpyadr = IOREG(REG_DPYADR);
+ uint16_t dpyadr = IOREG(REG_DPYADR);
if (!(IOREG(REG_DPYCTL) & 0x0400))
dpyadr ^= 0xfffc;
params->rowaddr = dpyadr >> 4;
@@ -1002,7 +1002,7 @@ void tms340x0_device::get_display_params(tms34010_display_params *params)
}
}
-UINT32 tms340x0_device::tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+uint32_t tms340x0_device::tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
pen_t blackpen = screen.palette().black_pen();
tms34010_display_params params;
@@ -1024,7 +1024,7 @@ UINT32 tms340x0_device::tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitm
params.heblnk = params.hsblnk = cliprect.max_x + 1;
/* blank out the blank regions */
- UINT16 *dest = &bitmap.pix16(cliprect.min_y);
+ uint16_t *dest = &bitmap.pix16(cliprect.min_y);
for (x = cliprect.min_x; x < params.heblnk; x++)
dest[x] = blackpen;
for (x = params.hsblnk; x <= cliprect.max_x; x++)
@@ -1033,7 +1033,7 @@ UINT32 tms340x0_device::tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitm
}
-UINT32 tms340x0_device::tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
+uint32_t tms340x0_device::tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
pen_t blackpen = rgb_t::black;
tms34010_display_params params;
@@ -1055,7 +1055,7 @@ UINT32 tms340x0_device::tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitm
params.heblnk = params.hsblnk = cliprect.max_x + 1;
/* blank out the blank regions */
- UINT32 *dest = &bitmap.pix32(cliprect.min_y);
+ uint32_t *dest = &bitmap.pix32(cliprect.min_y);
for (x = cliprect.min_x; x < params.heblnk; x++)
dest[x] = blackpen;
for (x = params.hsblnk; x <= cliprect.max_x; x++)
@@ -1519,7 +1519,7 @@ WRITE16_MEMBER( tms340x0_device::host_w )
{
addr += 0x10;
IOREG(REG_HSTADRH) = addr >> 16;
- IOREG(REG_HSTADRL) = (UINT16)addr;
+ IOREG(REG_HSTADRL) = (uint16_t)addr;
}
break;
@@ -1579,7 +1579,7 @@ READ16_MEMBER( tms340x0_device::host_r )
{
addr += 0x10;
IOREG(REG_HSTADRH) = addr >> 16;
- IOREG(REG_HSTADRL) = (UINT16)addr;
+ IOREG(REG_HSTADRL) = (uint16_t)addr;
}
break;
@@ -1627,7 +1627,7 @@ void tms340x0_device::state_string_export(const device_state_entry &entry, std::
}
-offs_t tms34010_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms34010_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms34010 );
@@ -1635,7 +1635,7 @@ offs_t tms34010_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8
}
-offs_t tms34020_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms34020_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms34020 );
diff --git a/src/devices/cpu/tms34010/tms34010.h b/src/devices/cpu/tms34010/tms34010.h
index 83d96832f38..d45d4af6891 100644
--- a/src/devices/cpu/tms34010/tms34010.h
+++ b/src/devices/cpu/tms34010/tms34010.h
@@ -177,12 +177,12 @@ enum
/* Configuration structure */
struct tms34010_display_params
{
- UINT16 vcount; /* most recent VCOUNT */
- UINT16 veblnk, vsblnk; /* start/end of VBLANK */
- UINT16 heblnk, hsblnk; /* start/end of HBLANK */
- UINT16 rowaddr, coladdr; /* row/column addresses */
- UINT8 yoffset; /* y offset from addresses */
- UINT8 enabled; /* video enabled */
+ uint16_t vcount; /* most recent VCOUNT */
+ uint16_t veblnk, vsblnk; /* start/end of VBLANK */
+ uint16_t heblnk, hsblnk; /* start/end of HBLANK */
+ uint16_t rowaddr, coladdr; /* row/column addresses */
+ uint8_t yoffset; /* y offset from addresses */
+ uint8_t enabled; /* video enabled */
};
@@ -215,17 +215,17 @@ typedef device_delegate<void (screen_device &screen, bitmap_rgb32 &bitmap, int s
devcb = &tms340x0_device::set_output_int_callback(*device, DEVCB_##_devcb);
-typedef device_delegate<void (address_space &space, offs_t address, UINT16 *shiftreg)> to_shiftreg_cb_delegate;
+typedef device_delegate<void (address_space &space, offs_t address, uint16_t *shiftreg)> to_shiftreg_cb_delegate;
-#define TMS340X0_TO_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, UINT16 *shiftreg)
+#define TMS340X0_TO_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, uint16_t *shiftreg)
#define MCFG_TMS340X0_TO_SHIFTREG_CB(_class, _method) \
tms340x0_device::set_to_shiftreg_callback(*device, to_shiftreg_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
-typedef device_delegate<void (address_space &space, offs_t address, UINT16 *shiftreg)> from_shiftreg_cb_delegate;
+typedef device_delegate<void (address_space &space, offs_t address, uint16_t *shiftreg)> from_shiftreg_cb_delegate;
-#define TMS340X0_FROM_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, UINT16 *shiftreg)
+#define TMS340X0_FROM_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, uint16_t *shiftreg)
#define MCFG_TMS340X0_FROM_SHIFTREG_CB(_class, _method) \
tms340x0_device::set_from_shiftreg_callback(*device, from_shiftreg_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
@@ -236,10 +236,10 @@ class tms340x0_device : public cpu_device,
{
public:
// construction/destruction
- tms340x0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname);
+ tms340x0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname);
static void set_halt_on_reset(device_t &device, bool halt_on_reset) { downcast<tms340x0_device &>(device).m_halt_on_reset = halt_on_reset; }
- static void set_pixel_clock(device_t &device, UINT32 pixclock) { downcast<tms340x0_device &>(device).m_pixclock = pixclock; }
+ static void set_pixel_clock(device_t &device, uint32_t pixclock) { downcast<tms340x0_device &>(device).m_pixclock = pixclock; }
static void set_pixels_per_clock(device_t &device, int pixperclock) { downcast<tms340x0_device &>(device).m_pixperclock = pixperclock; }
static void set_scanline_ind16_callback(device_t &device, scanline_ind16_cb_delegate callback) { downcast<tms340x0_device &>(device).m_scanline_ind16_cb = callback; }
static void set_scanline_rgb32_callback(device_t &device, scanline_rgb32_cb_delegate callback) { downcast<tms340x0_device &>(device).m_scanline_rgb32_cb = callback; }
@@ -250,8 +250,8 @@ public:
void get_display_params(tms34010_display_params *params);
void tms34010_state_postload();
- UINT32 tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
- UINT32 tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ uint32_t tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ uint32_t tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual DECLARE_WRITE16_MEMBER(io_register_w) = 0;
virtual DECLARE_READ16_MEMBER(io_register_r) = 0;
@@ -268,9 +268,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 10000; }
- virtual UINT32 execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 10000; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -281,26 +281,26 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 10; }
-
- typedef void (tms340x0_device::*pixel_write_func)(offs_t offset, UINT32 data);
- typedef UINT32 (tms340x0_device::*pixel_read_func)(offs_t offset);
- typedef UINT32 (tms340x0_device::*raster_op_func)(UINT32 newpix, UINT32 oldpix);
- typedef void (tms340x0_device::*wfield_func)(offs_t offset, UINT32 data);
- typedef UINT32 (tms340x0_device::*rfield_func)(offs_t offset);
- typedef void (tms340x0_device::*opcode_func)(UINT16 op);
- typedef UINT32 (tms340x0_device::*pixel_op_func)(UINT32, UINT32, UINT32);
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 10; }
+
+ typedef void (tms340x0_device::*pixel_write_func)(offs_t offset, uint32_t data);
+ typedef uint32_t (tms340x0_device::*pixel_read_func)(offs_t offset);
+ typedef uint32_t (tms340x0_device::*raster_op_func)(uint32_t newpix, uint32_t oldpix);
+ typedef void (tms340x0_device::*wfield_func)(offs_t offset, uint32_t data);
+ typedef uint32_t (tms340x0_device::*rfield_func)(offs_t offset);
+ typedef void (tms340x0_device::*opcode_func)(uint16_t op);
+ typedef uint32_t (tms340x0_device::*pixel_op_func)(uint32_t, uint32_t, uint32_t);
typedef void (tms340x0_device::*pixblt_op_func)(int, int);
typedef void (tms340x0_device::*pixblt_b_op_func)(int);
- typedef void (tms340x0_device::*word_write_func)(address_space &space, offs_t offset,UINT16 data);
- typedef UINT16 (tms340x0_device::*word_read_func)(address_space &space, offs_t offset);
+ typedef void (tms340x0_device::*word_write_func)(address_space &space, offs_t offset,uint16_t data);
+ typedef uint16_t (tms340x0_device::*word_read_func)(address_space &space, offs_t offset);
static const wfield_func s_wfield_functions[32];
static const rfield_func s_rfield_functions[64];
static const opcode_func s_opcode_table[65536 >> 4];
static const pixel_op_func s_pixel_op_table[32];
- static const UINT8 s_pixel_op_timing_table[33];
+ static const uint8_t s_pixel_op_timing_table[33];
static const pixblt_op_func s_pixblt_op_table[];
static const pixblt_op_func s_pixblt_r_op_table[];
static const pixblt_b_op_func s_pixblt_b_op_table[];
@@ -311,28 +311,28 @@ protected:
address_space_config m_program_config;
- UINT32 m_pc;
- UINT32 m_ppc;
- UINT32 m_st;
+ uint32_t m_pc;
+ uint32_t m_ppc;
+ uint32_t m_st;
pixel_write_func m_pixel_write;
pixel_read_func m_pixel_read;
raster_op_func m_raster_op;
pixel_op_func m_pixel_op;
- UINT32 m_pixel_op_timing;
- UINT32 m_convsp;
- UINT32 m_convdp;
- UINT32 m_convmp;
- INT32 m_gfxcycles;
- UINT8 m_pixelshift;
- UINT8 m_is_34020;
+ uint32_t m_pixel_op_timing;
+ uint32_t m_convsp;
+ uint32_t m_convdp;
+ uint32_t m_convmp;
+ int32_t m_gfxcycles;
+ uint8_t m_pixelshift;
+ uint8_t m_is_34020;
bool m_reset_deferred;
bool m_halt_on_reset; /* /HCS pin, which determines HALT state after reset */
- UINT8 m_hblank_stable;
- UINT8 m_external_host_access;
- UINT8 m_executing;
+ uint8_t m_hblank_stable;
+ uint8_t m_external_host_access;
+ uint8_t m_executing;
address_space *m_program;
direct_read_data *m_direct;
- UINT32 m_pixclock; /* the pixel clock (0 means don't adjust screen size) */
+ uint32_t m_pixclock; /* the pixel clock (0 means don't adjust screen size) */
int m_pixperclock; /* pixels per clock */
emu_timer *m_scantimer;
int m_icount;
@@ -346,11 +346,11 @@ protected:
struct XY
{
#ifdef LSB_FIRST
- INT16 x;
- INT16 y;
+ int16_t x;
+ int16_t y;
#else
- INT16 y;
- INT16 x;
+ int16_t y;
+ int16_t x;
#endif
};
@@ -358,578 +358,578 @@ protected:
/* B registers 0-15 map to regs[30]-regs[15] */
union
{
- INT32 reg;
+ int32_t reg;
XY xy;
} m_regs[31];
- UINT16 m_IOregs[64];
- UINT16 m_shiftreg[(8 * 512 * sizeof(UINT16))/2];
+ uint16_t m_IOregs[64];
+ uint16_t m_shiftreg[(8 * 512 * sizeof(uint16_t))/2];
- UINT32 TMS34010_RDMEM_DWORD(offs_t A);
- void TMS34010_WRMEM_DWORD(offs_t A, UINT32 V);
- void SET_ST(UINT32 st);
+ uint32_t TMS34010_RDMEM_DWORD(offs_t A);
+ void TMS34010_WRMEM_DWORD(offs_t A, uint32_t V);
+ void SET_ST(uint32_t st);
void RESET_ST();
- UINT32 ROPCODE();
- INT16 PARAM_WORD();
- INT32 PARAM_LONG();
- INT16 PARAM_WORD_NO_INC();
- INT32 PARAM_LONG_NO_INC();
- UINT32 RBYTE(offs_t offset);
- void WBYTE(offs_t offset, UINT32 data);
- UINT32 RLONG(offs_t offset);
- void WLONG(offs_t offset, UINT32 data);
- void PUSH(UINT32 data);
- INT32 POP();
- UINT32 read_pixel_1(offs_t offset);
- UINT32 read_pixel_2(offs_t offset);
- UINT32 read_pixel_4(offs_t offset);
- UINT32 read_pixel_8(offs_t offset);
- UINT32 read_pixel_16(offs_t offset);
- UINT32 read_pixel_32(offs_t offset);
- UINT32 read_pixel_shiftreg(offs_t offset);
- void write_pixel_1(offs_t offset, UINT32 data);
- void write_pixel_2(offs_t offset, UINT32 data);
- void write_pixel_4(offs_t offset, UINT32 data);
- void write_pixel_8(offs_t offset, UINT32 data);
- void write_pixel_16(offs_t offset, UINT32 data);
- void write_pixel_32(offs_t offset, UINT32 data);
- void write_pixel_t_1(offs_t offset, UINT32 data);
- void write_pixel_t_2(offs_t offset, UINT32 data);
- void write_pixel_t_4(offs_t offset, UINT32 data);
- void write_pixel_t_8(offs_t offset, UINT32 data);
- void write_pixel_t_16(offs_t offset, UINT32 data);
- void write_pixel_t_32(offs_t offset, UINT32 data);
- void write_pixel_r_1(offs_t offset, UINT32 data);
- void write_pixel_r_2(offs_t offset, UINT32 data);
- void write_pixel_r_4(offs_t offset, UINT32 data);
- void write_pixel_r_8(offs_t offset, UINT32 data);
- void write_pixel_r_16(offs_t offset, UINT32 data);
- void write_pixel_r_32(offs_t offset, UINT32 data);
- void write_pixel_r_t_1(offs_t offset, UINT32 data);
- void write_pixel_r_t_2(offs_t offset, UINT32 data);
- void write_pixel_r_t_4(offs_t offset, UINT32 data);
- void write_pixel_r_t_8(offs_t offset, UINT32 data);
- void write_pixel_r_t_16(offs_t offset, UINT32 data);
- void write_pixel_r_t_32(offs_t offset, UINT32 data);
- void write_pixel_shiftreg(offs_t offset, UINT32 data);
- UINT32 raster_op_1(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_2(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_3(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_4(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_5(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_6(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_7(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_8(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_9(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_10(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_11(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_12(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_13(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_14(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_15(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_16(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_17(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_18(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_19(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_20(UINT32 newpix, UINT32 oldpix);
- UINT32 raster_op_21(UINT32 newpix, UINT32 oldpix);
- void wfield_01(offs_t offset, UINT32 data);
- void wfield_02(offs_t offset, UINT32 data);
- void wfield_03(offs_t offset, UINT32 data);
- void wfield_04(offs_t offset, UINT32 data);
- void wfield_05(offs_t offset, UINT32 data);
- void wfield_06(offs_t offset, UINT32 data);
- void wfield_07(offs_t offset, UINT32 data);
- void wfield_08(offs_t offset, UINT32 data);
- void wfield_09(offs_t offset, UINT32 data);
- void wfield_10(offs_t offset, UINT32 data);
- void wfield_11(offs_t offset, UINT32 data);
- void wfield_12(offs_t offset, UINT32 data);
- void wfield_13(offs_t offset, UINT32 data);
- void wfield_14(offs_t offset, UINT32 data);
- void wfield_15(offs_t offset, UINT32 data);
- void wfield_16(offs_t offset, UINT32 data);
- void wfield_17(offs_t offset, UINT32 data);
- void wfield_18(offs_t offset, UINT32 data);
- void wfield_19(offs_t offset, UINT32 data);
- void wfield_20(offs_t offset, UINT32 data);
- void wfield_21(offs_t offset, UINT32 data);
- void wfield_22(offs_t offset, UINT32 data);
- void wfield_23(offs_t offset, UINT32 data);
- void wfield_24(offs_t offset, UINT32 data);
- void wfield_25(offs_t offset, UINT32 data);
- void wfield_26(offs_t offset, UINT32 data);
- void wfield_27(offs_t offset, UINT32 data);
- void wfield_28(offs_t offset, UINT32 data);
- void wfield_29(offs_t offset, UINT32 data);
- void wfield_30(offs_t offset, UINT32 data);
- void wfield_31(offs_t offset, UINT32 data);
- void wfield_32(offs_t offset, UINT32 data);
- UINT32 rfield_z_01(offs_t offset);
- UINT32 rfield_z_02(offs_t offset);
- UINT32 rfield_z_03(offs_t offset);
- UINT32 rfield_z_04(offs_t offset);
- UINT32 rfield_z_05(offs_t offset);
- UINT32 rfield_z_06(offs_t offset);
- UINT32 rfield_z_07(offs_t offset);
- UINT32 rfield_z_08(offs_t offset);
- UINT32 rfield_z_09(offs_t offset);
- UINT32 rfield_z_10(offs_t offset);
- UINT32 rfield_z_11(offs_t offset);
- UINT32 rfield_z_12(offs_t offset);
- UINT32 rfield_z_13(offs_t offset);
- UINT32 rfield_z_14(offs_t offset);
- UINT32 rfield_z_15(offs_t offset);
- UINT32 rfield_z_16(offs_t offset);
- UINT32 rfield_z_17(offs_t offset);
- UINT32 rfield_z_18(offs_t offset);
- UINT32 rfield_z_19(offs_t offset);
- UINT32 rfield_z_20(offs_t offset);
- UINT32 rfield_z_21(offs_t offset);
- UINT32 rfield_z_22(offs_t offset);
- UINT32 rfield_z_23(offs_t offset);
- UINT32 rfield_z_24(offs_t offset);
- UINT32 rfield_z_25(offs_t offset);
- UINT32 rfield_z_26(offs_t offset);
- UINT32 rfield_z_27(offs_t offset);
- UINT32 rfield_z_28(offs_t offset);
- UINT32 rfield_z_29(offs_t offset);
- UINT32 rfield_z_30(offs_t offset);
- UINT32 rfield_z_31(offs_t offset);
- UINT32 rfield_32(offs_t offset);
- UINT32 rfield_s_01(offs_t offset);
- UINT32 rfield_s_02(offs_t offset);
- UINT32 rfield_s_03(offs_t offset);
- UINT32 rfield_s_04(offs_t offset);
- UINT32 rfield_s_05(offs_t offset);
- UINT32 rfield_s_06(offs_t offset);
- UINT32 rfield_s_07(offs_t offset);
- UINT32 rfield_s_08(offs_t offset);
- UINT32 rfield_s_09(offs_t offset);
- UINT32 rfield_s_10(offs_t offset);
- UINT32 rfield_s_11(offs_t offset);
- UINT32 rfield_s_12(offs_t offset);
- UINT32 rfield_s_13(offs_t offset);
- UINT32 rfield_s_14(offs_t offset);
- UINT32 rfield_s_15(offs_t offset);
- UINT32 rfield_s_16(offs_t offset);
- UINT32 rfield_s_17(offs_t offset);
- UINT32 rfield_s_18(offs_t offset);
- UINT32 rfield_s_19(offs_t offset);
- UINT32 rfield_s_20(offs_t offset);
- UINT32 rfield_s_21(offs_t offset);
- UINT32 rfield_s_22(offs_t offset);
- UINT32 rfield_s_23(offs_t offset);
- UINT32 rfield_s_24(offs_t offset);
- UINT32 rfield_s_25(offs_t offset);
- UINT32 rfield_s_26(offs_t offset);
- UINT32 rfield_s_27(offs_t offset);
- UINT32 rfield_s_28(offs_t offset);
- UINT32 rfield_s_29(offs_t offset);
- UINT32 rfield_s_30(offs_t offset);
- UINT32 rfield_s_31(offs_t offset);
- void unimpl(UINT16 op);
- void pixblt_l_l(UINT16 op); /* 0f00 */
- void pixblt_l_xy(UINT16 op); /* 0f20 */
- void pixblt_xy_l(UINT16 op); /* 0f40 */
- void pixblt_xy_xy(UINT16 op); /* 0f60 */
- void pixblt_b_l(UINT16 op); /* 0f80 */
- void pixblt_b_xy(UINT16 op); /* 0fa0 */
- void fill_l(UINT16 op); /* 0fc0 */
- void fill_xy(UINT16 op); /* 0fe0 */
- void line(UINT16 op); /* df10/df90 */
- void add_xy_a(UINT16 op); /* e000/e100 */
- void add_xy_b(UINT16 op); /* e000/e100 */
- void sub_xy_a(UINT16 op); /* e200/e300 */
- void sub_xy_b(UINT16 op); /* e200/e300 */
- void cmp_xy_a(UINT16 op); /* e400/e500 */
- void cmp_xy_b(UINT16 op); /* e400/e500 */
- void cpw_a(UINT16 op); /* e600/e700 */
- void cpw_b(UINT16 op); /* e600/e700 */
- void cvxyl_a(UINT16 op); /* e800/e900 */
- void cvxyl_b(UINT16 op); /* e800/e900 */
- void movx_a(UINT16 op); /* ec00/ed00 */
- void movx_b(UINT16 op); /* ec00/ed00 */
- void movy_a(UINT16 op); /* ee00/ef00 */
- void movy_b(UINT16 op); /* ee00/ef00 */
- void pixt_ri_a(UINT16 op); /* f800/f900 */
- void pixt_ri_b(UINT16 op); /* f800/f900 */
- void pixt_rixy_a(UINT16 op); /* f000/f100 */
- void pixt_rixy_b(UINT16 op); /* f000/f100 */
- void pixt_ir_a(UINT16 op); /* fa00/fb00 */
- void pixt_ir_b(UINT16 op); /* fa00/fb00 */
- void pixt_ii_a(UINT16 op); /* fc00/fd00 */
- void pixt_ii_b(UINT16 op); /* fc00/fd00 */
- void pixt_ixyr_a(UINT16 op); /* f200/f300 */
- void pixt_ixyr_b(UINT16 op); /* f200/f300 */
- void pixt_ixyixy_a(UINT16 op); /* f400/f500 */
- void pixt_ixyixy_b(UINT16 op); /* f400/f500 */
- void drav_a(UINT16 op); /* f600/f700 */
- void drav_b(UINT16 op); /* f600/f700 */
- void abs_a(UINT16 op); /* 0380 */
- void abs_b(UINT16 op); /* 0390 */
- void add_a(UINT16 op); /* 4000/4100 */
- void add_b(UINT16 op); /* 4000/4100 */
- void addc_a(UINT16 op); /* 4200/4200 */
- void addc_b(UINT16 op); /* 4200/4200 */
- void addi_w_a(UINT16 op); /* 0b00 */
- void addi_w_b(UINT16 op); /* 0b10 */
- void addi_l_a(UINT16 op); /* 0b20 */
- void addi_l_b(UINT16 op); /* 0b30 */
- void addk_a(UINT16 op); /* 1000-1300 */
- void addk_b(UINT16 op); /* 1000-1300 */
- void and_a(UINT16 op); /* 5000/5100 */
- void and_b(UINT16 op); /* 5000/5100 */
- void andi_a(UINT16 op); /* 0b80 */
- void andi_b(UINT16 op); /* 0b90 */
- void andn_a(UINT16 op); /* 5200-5300 */
- void andn_b(UINT16 op); /* 5200-5300 */
- void btst_k_a(UINT16 op); /* 1c00-1f00 */
- void btst_k_b(UINT16 op); /* 1c00-1f00 */
- void btst_r_a(UINT16 op); /* 4a00-4b00 */
- void btst_r_b(UINT16 op); /* 4a00-4b00 */
- void clrc(UINT16 op); /* 0320 */
- void cmp_a(UINT16 op); /* 4800/4900 */
- void cmp_b(UINT16 op); /* 4800/4900 */
- void cmpi_w_a(UINT16 op); /* 0b40 */
- void cmpi_w_b(UINT16 op); /* 0b50 */
- void cmpi_l_a(UINT16 op); /* 0b60 */
- void cmpi_l_b(UINT16 op); /* 0b70 */
- void dint(UINT16 op);
- void divs_a(UINT16 op); /* 5800/5900 */
- void divs_b(UINT16 op); /* 5800/5900 */
- void divu_a(UINT16 op); /* 5a00/5b00 */
- void divu_b(UINT16 op); /* 5a00/5b00 */
- void eint(UINT16 op);
- void exgf0_a(UINT16 op); /* d500 */
- void exgf0_b(UINT16 op); /* d510 */
- void exgf1_a(UINT16 op); /* d700 */
- void exgf1_b(UINT16 op); /* d710 */
- void lmo_a(UINT16 op); /* 6a00/6b00 */
- void lmo_b(UINT16 op); /* 6a00/6b00 */
- void mmfm_a(UINT16 op); /* 09a0 */
- void mmfm_b(UINT16 op); /* 09b0 */
- void mmtm_a(UINT16 op); /* 0980 */
- void mmtm_b(UINT16 op); /* 0990 */
- void mods_a(UINT16 op); /* 6c00/6d00 */
- void mods_b(UINT16 op); /* 6c00/6d00 */
- void modu_a(UINT16 op); /* 6e00/6f00 */
- void modu_b(UINT16 op); /* 6e00/6f00 */
- void mpys_a(UINT16 op); /* 5c00/5d00 */
- void mpys_b(UINT16 op); /* 5c00/5d00 */
- void mpyu_a(UINT16 op); /* 5e00/5e00 */
- void mpyu_b(UINT16 op); /* 5e00/5f00 */
- void neg_a(UINT16 op); /* 03a0 */
- void neg_b(UINT16 op); /* 03b0 */
- void negb_a(UINT16 op); /* 03c0 */
- void negb_b(UINT16 op); /* 03d0 */
- void nop(UINT16 op); /* 0300 */
- void not_a(UINT16 op); /* 03e0 */
- void not_b(UINT16 op); /* 03f0 */
- void or_a(UINT16 op); /* 5400-5500 */
- void or_b(UINT16 op); /* 5400-5500 */
- void ori_a(UINT16 op); /* 0ba0 */
- void ori_b(UINT16 op); /* 0bb0 */
- void rl_k_a(UINT16 op); /* 3000-3300 */
- void rl_k_b(UINT16 op); /* 3000-3300 */
- void rl_r_a(UINT16 op); /* 6800/6900 */
- void rl_r_b(UINT16 op); /* 6800/6900 */
- void setc(UINT16 op); /* 0de0 */
- void setf0(UINT16 op);
- void setf1(UINT16 op);
- void sext0_a(UINT16 op); /* 0500 */
- void sext0_b(UINT16 op); /* 0510 */
- void sext1_a(UINT16 op); /* 0700 */
- void sext1_b(UINT16 op); /* 0710 */
- void sla_k_a(UINT16 op); /* 2000-2300 */
- void sla_k_b(UINT16 op); /* 2000-2300 */
- void sla_r_a(UINT16 op); /* 6000/6100 */
- void sla_r_b(UINT16 op); /* 6000/6100 */
- void sll_k_a(UINT16 op); /* 2400-2700 */
- void sll_k_b(UINT16 op); /* 2400-2700 */
- void sll_r_a(UINT16 op); /* 6200/6300 */
- void sll_r_b(UINT16 op); /* 6200/6300 */
- void sra_k_a(UINT16 op); /* 2800-2b00 */
- void sra_k_b(UINT16 op); /* 2800-2b00 */
- void sra_r_a(UINT16 op); /* 6400/6500 */
- void sra_r_b(UINT16 op); /* 6400/6500 */
- void srl_k_a(UINT16 op); /* 2c00-2f00 */
- void srl_k_b(UINT16 op); /* 2c00-2f00 */
- void srl_r_a(UINT16 op); /* 6600/6700 */
- void srl_r_b(UINT16 op); /* 6600/6700 */
- void sub_a(UINT16 op); /* 4400/4500 */
- void sub_b(UINT16 op); /* 4400/4500 */
- void subb_a(UINT16 op); /* 4600/4700 */
- void subb_b(UINT16 op); /* 4600/4700 */
- void subi_w_a(UINT16 op); /* 0be0 */
- void subi_w_b(UINT16 op); /* 0bf0 */
- void subi_l_a(UINT16 op); /* 0d00 */
- void subi_l_b(UINT16 op); /* 0d10 */
- void subk_a(UINT16 op); /* 1400-1700 */
- void subk_b(UINT16 op); /* 1400-1700 */
- void xor_a(UINT16 op); /* 5600-5700 */
- void xor_b(UINT16 op); /* 5600-5700 */
- void xori_a(UINT16 op); /* 0bc0 */
- void xori_b(UINT16 op); /* 0bd0 */
- void zext0_a(UINT16 op); /* 0520 */
- void zext0_b(UINT16 op); /* 0530 */
- void zext1_a(UINT16 op); /* 0720 */
- void zext1_b(UINT16 op); /* 0720 */
- void movi_w_a(UINT16 op);
- void movi_w_b(UINT16 op);
- void movi_l_a(UINT16 op);
- void movi_l_b(UINT16 op);
- void movk_a(UINT16 op);
- void movk_b(UINT16 op);
- void movb_rn_a(UINT16 op); /* 8c00-8d00 */
- void movb_rn_b(UINT16 op); /* 8c00-8d00 */
- void movb_nr_a(UINT16 op); /* 8e00-8f00 */
- void movb_nr_b(UINT16 op); /* 8e00-8f00 */
- void movb_nn_a(UINT16 op); /* 9c00-9d00 */
- void movb_nn_b(UINT16 op); /* 9c00-9d00 */
- void movb_r_no_a(UINT16 op); /* ac00-ad00 */
- void movb_r_no_b(UINT16 op); /* ac00-ad00 */
- void movb_no_r_a(UINT16 op); /* ae00-af00 */
- void movb_no_r_b(UINT16 op); /* ae00-af00 */
- void movb_no_no_a(UINT16 op); /* bc00-bd00 */
- void movb_no_no_b(UINT16 op); /* bc00-bd00 */
- void movb_ra_a(UINT16 op);
- void movb_ra_b(UINT16 op);
- void movb_ar_a(UINT16 op);
- void movb_ar_b(UINT16 op);
- void movb_aa(UINT16 op);
- void move_rr_a(UINT16 op); /* 4c00/d00 */
- void move_rr_b(UINT16 op); /* 4c00/d00 */
- void move_rr_ax(UINT16 op); /* 4e00/f00 */
- void move_rr_bx(UINT16 op); /* 4e00/f00 */
- void move0_rn_a(UINT16 op); /* 8000 */
- void move0_rn_b(UINT16 op);
- void move1_rn_a(UINT16 op);
- void move1_rn_b(UINT16 op);
- void move0_r_dn_a(UINT16 op); /* a000 */
- void move0_r_dn_b(UINT16 op);
- void move1_r_dn_a(UINT16 op);
- void move1_r_dn_b(UINT16 op);
- void move0_r_ni_a(UINT16 op); /* 9000 */
- void move0_r_ni_b(UINT16 op);
- void move1_r_ni_a(UINT16 op);
- void move1_r_ni_b(UINT16 op);
- void move0_nr_a(UINT16 op); /* 8400-500 */
- void move0_nr_b(UINT16 op); /* 8400-500 */
- void move1_nr_a(UINT16 op); /* 8600-700 */
- void move1_nr_b(UINT16 op); /* 8600-700 */
- void move0_dn_r_a(UINT16 op); /* A400-500 */
- void move0_dn_r_b(UINT16 op); /* A400-500 */
- void move1_dn_r_a(UINT16 op); /* A600-700 */
- void move1_dn_r_b(UINT16 op); /* A600-700 */
- void move0_ni_r_a(UINT16 op); /* 9400-500 */
- void move0_ni_r_b(UINT16 op); /* 9400-500 */
- void move1_ni_r_a(UINT16 op); /* 9600-700 */
- void move1_ni_r_b(UINT16 op); /* 9600-700 */
- void move0_nn_a(UINT16 op); /* 8800 */
- void move0_nn_b(UINT16 op);
- void move1_nn_a(UINT16 op);
- void move1_nn_b(UINT16 op);
- void move0_dn_dn_a(UINT16 op); /* a800 */
- void move0_dn_dn_b(UINT16 op);
- void move1_dn_dn_a(UINT16 op);
- void move1_dn_dn_b(UINT16 op);
- void move0_ni_ni_a(UINT16 op); /* 9800 */
- void move0_ni_ni_b(UINT16 op);
- void move1_ni_ni_a(UINT16 op);
- void move1_ni_ni_b(UINT16 op);
- void move0_r_no_a(UINT16 op); /* b000 */
- void move0_r_no_b(UINT16 op);
- void move1_r_no_a(UINT16 op);
- void move1_r_no_b(UINT16 op);
- void move0_no_r_a(UINT16 op); /* b400 */
- void move0_no_r_b(UINT16 op);
- void move1_no_r_a(UINT16 op);
- void move1_no_r_b(UINT16 op);
- void move0_no_ni_a(UINT16 op); /* d000 */
- void move0_no_ni_b(UINT16 op);
- void move1_no_ni_a(UINT16 op);
- void move1_no_ni_b(UINT16 op);
- void move0_no_no_a(UINT16 op); /* b800 */
- void move0_no_no_b(UINT16 op);
- void move1_no_no_a(UINT16 op);
- void move1_no_no_b(UINT16 op);
- void move0_ra_a(UINT16 op);
- void move0_ra_b(UINT16 op);
- void move1_ra_a(UINT16 op);
- void move1_ra_b(UINT16 op);
- void move0_ar_a(UINT16 op);
- void move0_ar_b(UINT16 op);
- void move1_ar_a(UINT16 op);
- void move1_ar_b(UINT16 op);
- void move0_a_ni_a(UINT16 op); /* d400 */
- void move0_a_ni_b(UINT16 op); /* d410 */
- void move1_a_ni_a(UINT16 op); /* d600 */
- void move1_a_ni_b(UINT16 op); /* d610 */
- void move0_aa(UINT16 op); /* 05c0 */
- void move1_aa(UINT16 op); /* 07c0 */
- void call_a(UINT16 op); /* 0920 */
- void call_b(UINT16 op); /* 0930 */
- void callr(UINT16 op); /* 0d3f */
- void calla(UINT16 op); /* 0d5f */
- void dsj_a(UINT16 op); /* 0d80 */
- void dsj_b(UINT16 op); /* 0d90 */
- void dsjeq_a(UINT16 op); /* 0da0 */
- void dsjeq_b(UINT16 op); /* 0db0 */
- void dsjne_a(UINT16 op); /* 0dc0 */
- void dsjne_b(UINT16 op); /* 0dd0 */
- void dsjs_a(UINT16 op);
- void dsjs_b(UINT16 op);
- void emu(UINT16 op); /* 0100 */
- void exgpc_a(UINT16 op); /* 0120 */
- void exgpc_b(UINT16 op); /* 0130 */
- void getpc_a(UINT16 op); /* 0140 */
- void getpc_b(UINT16 op); /* 0150 */
- void getst_a(UINT16 op); /* 0180 */
- void getst_b(UINT16 op); /* 0190 */
- void j_UC_0(UINT16 op);
- void j_UC_8(UINT16 op);
- void j_UC_x(UINT16 op);
- void j_P_0(UINT16 op);
- void j_P_8(UINT16 op);
- void j_P_x(UINT16 op);
- void j_LS_0(UINT16 op);
- void j_LS_8(UINT16 op);
- void j_LS_x(UINT16 op);
- void j_HI_0(UINT16 op);
- void j_HI_8(UINT16 op);
- void j_HI_x(UINT16 op);
- void j_LT_0(UINT16 op);
- void j_LT_8(UINT16 op);
- void j_LT_x(UINT16 op);
- void j_GE_0(UINT16 op);
- void j_GE_8(UINT16 op);
- void j_GE_x(UINT16 op);
- void j_LE_0(UINT16 op);
- void j_LE_8(UINT16 op);
- void j_LE_x(UINT16 op);
- void j_GT_0(UINT16 op);
- void j_GT_8(UINT16 op);
- void j_GT_x(UINT16 op);
- void j_C_0(UINT16 op);
- void j_C_8(UINT16 op);
- void j_C_x(UINT16 op);
- void j_NC_0(UINT16 op);
- void j_NC_8(UINT16 op);
- void j_NC_x(UINT16 op);
- void j_EQ_0(UINT16 op);
- void j_EQ_8(UINT16 op);
- void j_EQ_x(UINT16 op);
- void j_NE_0(UINT16 op);
- void j_NE_8(UINT16 op);
- void j_NE_x(UINT16 op);
- void j_V_0(UINT16 op);
- void j_V_8(UINT16 op);
- void j_V_x(UINT16 op);
- void j_NV_0(UINT16 op);
- void j_NV_8(UINT16 op);
- void j_NV_x(UINT16 op);
- void j_N_0(UINT16 op);
- void j_N_8(UINT16 op);
- void j_N_x(UINT16 op);
- void j_NN_0(UINT16 op);
- void j_NN_8(UINT16 op);
- void j_NN_x(UINT16 op);
- void jump_a(UINT16 op); /* 0160 */
- void jump_b(UINT16 op); /* 0170 */
- void popst(UINT16 op); /* 01c0 */
- void pushst(UINT16 op); /* 01e0 */
- void putst_a(UINT16 op); /* 01a0 */
- void putst_b(UINT16 op); /* 01b0 */
- void reti(UINT16 op); /* 0940 */
- void rets(UINT16 op); /* 0960/70 */
- void rev_a(UINT16 op); /* 0020 */
- void rev_b(UINT16 op); /* 0030 */
- void trap(UINT16 op); /* 0900/10 */
- void addxyi_a(UINT16 op);
- void addxyi_b(UINT16 op);
- void blmove(UINT16 op);
- void cexec_l(UINT16 op);
- void cexec_s(UINT16 op);
- void clip(UINT16 op);
- void cmovcg_a(UINT16 op);
- void cmovcg_b(UINT16 op);
- void cmovcm_f(UINT16 op);
- void cmovcm_b(UINT16 op);
- void cmovgc_a(UINT16 op);
- void cmovgc_b(UINT16 op);
- void cmovgc_a_s(UINT16 op);
- void cmovgc_b_s(UINT16 op);
- void cmovmc_f(UINT16 op);
- void cmovmc_f_va(UINT16 op);
- void cmovmc_f_vb(UINT16 op);
- void cmovmc_b(UINT16 op);
- void cmp_k_a(UINT16 op);
- void cmp_k_b(UINT16 op);
- void cvdxyl_a(UINT16 op);
- void cvdxyl_b(UINT16 op);
- void cvmxyl_a(UINT16 op);
- void cvmxyl_b(UINT16 op);
- void cvsxyl_a(UINT16 op);
- void cvsxyl_b(UINT16 op);
- void exgps_a(UINT16 op);
- void exgps_b(UINT16 op);
- void fline(UINT16 op);
- void fpixeq(UINT16 op);
- void fpixne(UINT16 op);
- void getps_a(UINT16 op);
- void getps_b(UINT16 op);
- void idle(UINT16 op);
- void linit(UINT16 op);
- void mwait(UINT16 op);
- void pfill_xy(UINT16 op);
- void pixblt_l_m_l(UINT16 op);
- void retm(UINT16 op);
- void rmo_a(UINT16 op);
- void rmo_b(UINT16 op);
- void rpix_a(UINT16 op);
- void rpix_b(UINT16 op);
- void setcdp(UINT16 op);
- void setcmp(UINT16 op);
- void setcsp(UINT16 op);
- void swapf_a(UINT16 op);
- void swapf_b(UINT16 op);
- void tfill_xy(UINT16 op);
- void trapl(UINT16 op);
- void vblt_b_l(UINT16 op);
- void vfill_l(UINT16 op);
- void vlcol(UINT16 op);
- int apply_window(const char *inst_name,int srcbpp, UINT32 *srcaddr, XY *dst, int *dx, int *dy);
+ uint32_t ROPCODE();
+ int16_t PARAM_WORD();
+ int32_t PARAM_LONG();
+ int16_t PARAM_WORD_NO_INC();
+ int32_t PARAM_LONG_NO_INC();
+ uint32_t RBYTE(offs_t offset);
+ void WBYTE(offs_t offset, uint32_t data);
+ uint32_t RLONG(offs_t offset);
+ void WLONG(offs_t offset, uint32_t data);
+ void PUSH(uint32_t data);
+ int32_t POP();
+ uint32_t read_pixel_1(offs_t offset);
+ uint32_t read_pixel_2(offs_t offset);
+ uint32_t read_pixel_4(offs_t offset);
+ uint32_t read_pixel_8(offs_t offset);
+ uint32_t read_pixel_16(offs_t offset);
+ uint32_t read_pixel_32(offs_t offset);
+ uint32_t read_pixel_shiftreg(offs_t offset);
+ void write_pixel_1(offs_t offset, uint32_t data);
+ void write_pixel_2(offs_t offset, uint32_t data);
+ void write_pixel_4(offs_t offset, uint32_t data);
+ void write_pixel_8(offs_t offset, uint32_t data);
+ void write_pixel_16(offs_t offset, uint32_t data);
+ void write_pixel_32(offs_t offset, uint32_t data);
+ void write_pixel_t_1(offs_t offset, uint32_t data);
+ void write_pixel_t_2(offs_t offset, uint32_t data);
+ void write_pixel_t_4(offs_t offset, uint32_t data);
+ void write_pixel_t_8(offs_t offset, uint32_t data);
+ void write_pixel_t_16(offs_t offset, uint32_t data);
+ void write_pixel_t_32(offs_t offset, uint32_t data);
+ void write_pixel_r_1(offs_t offset, uint32_t data);
+ void write_pixel_r_2(offs_t offset, uint32_t data);
+ void write_pixel_r_4(offs_t offset, uint32_t data);
+ void write_pixel_r_8(offs_t offset, uint32_t data);
+ void write_pixel_r_16(offs_t offset, uint32_t data);
+ void write_pixel_r_32(offs_t offset, uint32_t data);
+ void write_pixel_r_t_1(offs_t offset, uint32_t data);
+ void write_pixel_r_t_2(offs_t offset, uint32_t data);
+ void write_pixel_r_t_4(offs_t offset, uint32_t data);
+ void write_pixel_r_t_8(offs_t offset, uint32_t data);
+ void write_pixel_r_t_16(offs_t offset, uint32_t data);
+ void write_pixel_r_t_32(offs_t offset, uint32_t data);
+ void write_pixel_shiftreg(offs_t offset, uint32_t data);
+ uint32_t raster_op_1(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_2(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_3(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_4(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_5(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_6(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_7(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_8(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_9(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_10(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_11(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_12(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_13(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_14(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_15(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_16(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_17(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_18(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_19(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_20(uint32_t newpix, uint32_t oldpix);
+ uint32_t raster_op_21(uint32_t newpix, uint32_t oldpix);
+ void wfield_01(offs_t offset, uint32_t data);
+ void wfield_02(offs_t offset, uint32_t data);
+ void wfield_03(offs_t offset, uint32_t data);
+ void wfield_04(offs_t offset, uint32_t data);
+ void wfield_05(offs_t offset, uint32_t data);
+ void wfield_06(offs_t offset, uint32_t data);
+ void wfield_07(offs_t offset, uint32_t data);
+ void wfield_08(offs_t offset, uint32_t data);
+ void wfield_09(offs_t offset, uint32_t data);
+ void wfield_10(offs_t offset, uint32_t data);
+ void wfield_11(offs_t offset, uint32_t data);
+ void wfield_12(offs_t offset, uint32_t data);
+ void wfield_13(offs_t offset, uint32_t data);
+ void wfield_14(offs_t offset, uint32_t data);
+ void wfield_15(offs_t offset, uint32_t data);
+ void wfield_16(offs_t offset, uint32_t data);
+ void wfield_17(offs_t offset, uint32_t data);
+ void wfield_18(offs_t offset, uint32_t data);
+ void wfield_19(offs_t offset, uint32_t data);
+ void wfield_20(offs_t offset, uint32_t data);
+ void wfield_21(offs_t offset, uint32_t data);
+ void wfield_22(offs_t offset, uint32_t data);
+ void wfield_23(offs_t offset, uint32_t data);
+ void wfield_24(offs_t offset, uint32_t data);
+ void wfield_25(offs_t offset, uint32_t data);
+ void wfield_26(offs_t offset, uint32_t data);
+ void wfield_27(offs_t offset, uint32_t data);
+ void wfield_28(offs_t offset, uint32_t data);
+ void wfield_29(offs_t offset, uint32_t data);
+ void wfield_30(offs_t offset, uint32_t data);
+ void wfield_31(offs_t offset, uint32_t data);
+ void wfield_32(offs_t offset, uint32_t data);
+ uint32_t rfield_z_01(offs_t offset);
+ uint32_t rfield_z_02(offs_t offset);
+ uint32_t rfield_z_03(offs_t offset);
+ uint32_t rfield_z_04(offs_t offset);
+ uint32_t rfield_z_05(offs_t offset);
+ uint32_t rfield_z_06(offs_t offset);
+ uint32_t rfield_z_07(offs_t offset);
+ uint32_t rfield_z_08(offs_t offset);
+ uint32_t rfield_z_09(offs_t offset);
+ uint32_t rfield_z_10(offs_t offset);
+ uint32_t rfield_z_11(offs_t offset);
+ uint32_t rfield_z_12(offs_t offset);
+ uint32_t rfield_z_13(offs_t offset);
+ uint32_t rfield_z_14(offs_t offset);
+ uint32_t rfield_z_15(offs_t offset);
+ uint32_t rfield_z_16(offs_t offset);
+ uint32_t rfield_z_17(offs_t offset);
+ uint32_t rfield_z_18(offs_t offset);
+ uint32_t rfield_z_19(offs_t offset);
+ uint32_t rfield_z_20(offs_t offset);
+ uint32_t rfield_z_21(offs_t offset);
+ uint32_t rfield_z_22(offs_t offset);
+ uint32_t rfield_z_23(offs_t offset);
+ uint32_t rfield_z_24(offs_t offset);
+ uint32_t rfield_z_25(offs_t offset);
+ uint32_t rfield_z_26(offs_t offset);
+ uint32_t rfield_z_27(offs_t offset);
+ uint32_t rfield_z_28(offs_t offset);
+ uint32_t rfield_z_29(offs_t offset);
+ uint32_t rfield_z_30(offs_t offset);
+ uint32_t rfield_z_31(offs_t offset);
+ uint32_t rfield_32(offs_t offset);
+ uint32_t rfield_s_01(offs_t offset);
+ uint32_t rfield_s_02(offs_t offset);
+ uint32_t rfield_s_03(offs_t offset);
+ uint32_t rfield_s_04(offs_t offset);
+ uint32_t rfield_s_05(offs_t offset);
+ uint32_t rfield_s_06(offs_t offset);
+ uint32_t rfield_s_07(offs_t offset);
+ uint32_t rfield_s_08(offs_t offset);
+ uint32_t rfield_s_09(offs_t offset);
+ uint32_t rfield_s_10(offs_t offset);
+ uint32_t rfield_s_11(offs_t offset);
+ uint32_t rfield_s_12(offs_t offset);
+ uint32_t rfield_s_13(offs_t offset);
+ uint32_t rfield_s_14(offs_t offset);
+ uint32_t rfield_s_15(offs_t offset);
+ uint32_t rfield_s_16(offs_t offset);
+ uint32_t rfield_s_17(offs_t offset);
+ uint32_t rfield_s_18(offs_t offset);
+ uint32_t rfield_s_19(offs_t offset);
+ uint32_t rfield_s_20(offs_t offset);
+ uint32_t rfield_s_21(offs_t offset);
+ uint32_t rfield_s_22(offs_t offset);
+ uint32_t rfield_s_23(offs_t offset);
+ uint32_t rfield_s_24(offs_t offset);
+ uint32_t rfield_s_25(offs_t offset);
+ uint32_t rfield_s_26(offs_t offset);
+ uint32_t rfield_s_27(offs_t offset);
+ uint32_t rfield_s_28(offs_t offset);
+ uint32_t rfield_s_29(offs_t offset);
+ uint32_t rfield_s_30(offs_t offset);
+ uint32_t rfield_s_31(offs_t offset);
+ void unimpl(uint16_t op);
+ void pixblt_l_l(uint16_t op); /* 0f00 */
+ void pixblt_l_xy(uint16_t op); /* 0f20 */
+ void pixblt_xy_l(uint16_t op); /* 0f40 */
+ void pixblt_xy_xy(uint16_t op); /* 0f60 */
+ void pixblt_b_l(uint16_t op); /* 0f80 */
+ void pixblt_b_xy(uint16_t op); /* 0fa0 */
+ void fill_l(uint16_t op); /* 0fc0 */
+ void fill_xy(uint16_t op); /* 0fe0 */
+ void line(uint16_t op); /* df10/df90 */
+ void add_xy_a(uint16_t op); /* e000/e100 */
+ void add_xy_b(uint16_t op); /* e000/e100 */
+ void sub_xy_a(uint16_t op); /* e200/e300 */
+ void sub_xy_b(uint16_t op); /* e200/e300 */
+ void cmp_xy_a(uint16_t op); /* e400/e500 */
+ void cmp_xy_b(uint16_t op); /* e400/e500 */
+ void cpw_a(uint16_t op); /* e600/e700 */
+ void cpw_b(uint16_t op); /* e600/e700 */
+ void cvxyl_a(uint16_t op); /* e800/e900 */
+ void cvxyl_b(uint16_t op); /* e800/e900 */
+ void movx_a(uint16_t op); /* ec00/ed00 */
+ void movx_b(uint16_t op); /* ec00/ed00 */
+ void movy_a(uint16_t op); /* ee00/ef00 */
+ void movy_b(uint16_t op); /* ee00/ef00 */
+ void pixt_ri_a(uint16_t op); /* f800/f900 */
+ void pixt_ri_b(uint16_t op); /* f800/f900 */
+ void pixt_rixy_a(uint16_t op); /* f000/f100 */
+ void pixt_rixy_b(uint16_t op); /* f000/f100 */
+ void pixt_ir_a(uint16_t op); /* fa00/fb00 */
+ void pixt_ir_b(uint16_t op); /* fa00/fb00 */
+ void pixt_ii_a(uint16_t op); /* fc00/fd00 */
+ void pixt_ii_b(uint16_t op); /* fc00/fd00 */
+ void pixt_ixyr_a(uint16_t op); /* f200/f300 */
+ void pixt_ixyr_b(uint16_t op); /* f200/f300 */
+ void pixt_ixyixy_a(uint16_t op); /* f400/f500 */
+ void pixt_ixyixy_b(uint16_t op); /* f400/f500 */
+ void drav_a(uint16_t op); /* f600/f700 */
+ void drav_b(uint16_t op); /* f600/f700 */
+ void abs_a(uint16_t op); /* 0380 */
+ void abs_b(uint16_t op); /* 0390 */
+ void add_a(uint16_t op); /* 4000/4100 */
+ void add_b(uint16_t op); /* 4000/4100 */
+ void addc_a(uint16_t op); /* 4200/4200 */
+ void addc_b(uint16_t op); /* 4200/4200 */
+ void addi_w_a(uint16_t op); /* 0b00 */
+ void addi_w_b(uint16_t op); /* 0b10 */
+ void addi_l_a(uint16_t op); /* 0b20 */
+ void addi_l_b(uint16_t op); /* 0b30 */
+ void addk_a(uint16_t op); /* 1000-1300 */
+ void addk_b(uint16_t op); /* 1000-1300 */
+ void and_a(uint16_t op); /* 5000/5100 */
+ void and_b(uint16_t op); /* 5000/5100 */
+ void andi_a(uint16_t op); /* 0b80 */
+ void andi_b(uint16_t op); /* 0b90 */
+ void andn_a(uint16_t op); /* 5200-5300 */
+ void andn_b(uint16_t op); /* 5200-5300 */
+ void btst_k_a(uint16_t op); /* 1c00-1f00 */
+ void btst_k_b(uint16_t op); /* 1c00-1f00 */
+ void btst_r_a(uint16_t op); /* 4a00-4b00 */
+ void btst_r_b(uint16_t op); /* 4a00-4b00 */
+ void clrc(uint16_t op); /* 0320 */
+ void cmp_a(uint16_t op); /* 4800/4900 */
+ void cmp_b(uint16_t op); /* 4800/4900 */
+ void cmpi_w_a(uint16_t op); /* 0b40 */
+ void cmpi_w_b(uint16_t op); /* 0b50 */
+ void cmpi_l_a(uint16_t op); /* 0b60 */
+ void cmpi_l_b(uint16_t op); /* 0b70 */
+ void dint(uint16_t op);
+ void divs_a(uint16_t op); /* 5800/5900 */
+ void divs_b(uint16_t op); /* 5800/5900 */
+ void divu_a(uint16_t op); /* 5a00/5b00 */
+ void divu_b(uint16_t op); /* 5a00/5b00 */
+ void eint(uint16_t op);
+ void exgf0_a(uint16_t op); /* d500 */
+ void exgf0_b(uint16_t op); /* d510 */
+ void exgf1_a(uint16_t op); /* d700 */
+ void exgf1_b(uint16_t op); /* d710 */
+ void lmo_a(uint16_t op); /* 6a00/6b00 */
+ void lmo_b(uint16_t op); /* 6a00/6b00 */
+ void mmfm_a(uint16_t op); /* 09a0 */
+ void mmfm_b(uint16_t op); /* 09b0 */
+ void mmtm_a(uint16_t op); /* 0980 */
+ void mmtm_b(uint16_t op); /* 0990 */
+ void mods_a(uint16_t op); /* 6c00/6d00 */
+ void mods_b(uint16_t op); /* 6c00/6d00 */
+ void modu_a(uint16_t op); /* 6e00/6f00 */
+ void modu_b(uint16_t op); /* 6e00/6f00 */
+ void mpys_a(uint16_t op); /* 5c00/5d00 */
+ void mpys_b(uint16_t op); /* 5c00/5d00 */
+ void mpyu_a(uint16_t op); /* 5e00/5e00 */
+ void mpyu_b(uint16_t op); /* 5e00/5f00 */
+ void neg_a(uint16_t op); /* 03a0 */
+ void neg_b(uint16_t op); /* 03b0 */
+ void negb_a(uint16_t op); /* 03c0 */
+ void negb_b(uint16_t op); /* 03d0 */
+ void nop(uint16_t op); /* 0300 */
+ void not_a(uint16_t op); /* 03e0 */
+ void not_b(uint16_t op); /* 03f0 */
+ void or_a(uint16_t op); /* 5400-5500 */
+ void or_b(uint16_t op); /* 5400-5500 */
+ void ori_a(uint16_t op); /* 0ba0 */
+ void ori_b(uint16_t op); /* 0bb0 */
+ void rl_k_a(uint16_t op); /* 3000-3300 */
+ void rl_k_b(uint16_t op); /* 3000-3300 */
+ void rl_r_a(uint16_t op); /* 6800/6900 */
+ void rl_r_b(uint16_t op); /* 6800/6900 */
+ void setc(uint16_t op); /* 0de0 */
+ void setf0(uint16_t op);
+ void setf1(uint16_t op);
+ void sext0_a(uint16_t op); /* 0500 */
+ void sext0_b(uint16_t op); /* 0510 */
+ void sext1_a(uint16_t op); /* 0700 */
+ void sext1_b(uint16_t op); /* 0710 */
+ void sla_k_a(uint16_t op); /* 2000-2300 */
+ void sla_k_b(uint16_t op); /* 2000-2300 */
+ void sla_r_a(uint16_t op); /* 6000/6100 */
+ void sla_r_b(uint16_t op); /* 6000/6100 */
+ void sll_k_a(uint16_t op); /* 2400-2700 */
+ void sll_k_b(uint16_t op); /* 2400-2700 */
+ void sll_r_a(uint16_t op); /* 6200/6300 */
+ void sll_r_b(uint16_t op); /* 6200/6300 */
+ void sra_k_a(uint16_t op); /* 2800-2b00 */
+ void sra_k_b(uint16_t op); /* 2800-2b00 */
+ void sra_r_a(uint16_t op); /* 6400/6500 */
+ void sra_r_b(uint16_t op); /* 6400/6500 */
+ void srl_k_a(uint16_t op); /* 2c00-2f00 */
+ void srl_k_b(uint16_t op); /* 2c00-2f00 */
+ void srl_r_a(uint16_t op); /* 6600/6700 */
+ void srl_r_b(uint16_t op); /* 6600/6700 */
+ void sub_a(uint16_t op); /* 4400/4500 */
+ void sub_b(uint16_t op); /* 4400/4500 */
+ void subb_a(uint16_t op); /* 4600/4700 */
+ void subb_b(uint16_t op); /* 4600/4700 */
+ void subi_w_a(uint16_t op); /* 0be0 */
+ void subi_w_b(uint16_t op); /* 0bf0 */
+ void subi_l_a(uint16_t op); /* 0d00 */
+ void subi_l_b(uint16_t op); /* 0d10 */
+ void subk_a(uint16_t op); /* 1400-1700 */
+ void subk_b(uint16_t op); /* 1400-1700 */
+ void xor_a(uint16_t op); /* 5600-5700 */
+ void xor_b(uint16_t op); /* 5600-5700 */
+ void xori_a(uint16_t op); /* 0bc0 */
+ void xori_b(uint16_t op); /* 0bd0 */
+ void zext0_a(uint16_t op); /* 0520 */
+ void zext0_b(uint16_t op); /* 0530 */
+ void zext1_a(uint16_t op); /* 0720 */
+ void zext1_b(uint16_t op); /* 0720 */
+ void movi_w_a(uint16_t op);
+ void movi_w_b(uint16_t op);
+ void movi_l_a(uint16_t op);
+ void movi_l_b(uint16_t op);
+ void movk_a(uint16_t op);
+ void movk_b(uint16_t op);
+ void movb_rn_a(uint16_t op); /* 8c00-8d00 */
+ void movb_rn_b(uint16_t op); /* 8c00-8d00 */
+ void movb_nr_a(uint16_t op); /* 8e00-8f00 */
+ void movb_nr_b(uint16_t op); /* 8e00-8f00 */
+ void movb_nn_a(uint16_t op); /* 9c00-9d00 */
+ void movb_nn_b(uint16_t op); /* 9c00-9d00 */
+ void movb_r_no_a(uint16_t op); /* ac00-ad00 */
+ void movb_r_no_b(uint16_t op); /* ac00-ad00 */
+ void movb_no_r_a(uint16_t op); /* ae00-af00 */
+ void movb_no_r_b(uint16_t op); /* ae00-af00 */
+ void movb_no_no_a(uint16_t op); /* bc00-bd00 */
+ void movb_no_no_b(uint16_t op); /* bc00-bd00 */
+ void movb_ra_a(uint16_t op);
+ void movb_ra_b(uint16_t op);
+ void movb_ar_a(uint16_t op);
+ void movb_ar_b(uint16_t op);
+ void movb_aa(uint16_t op);
+ void move_rr_a(uint16_t op); /* 4c00/d00 */
+ void move_rr_b(uint16_t op); /* 4c00/d00 */
+ void move_rr_ax(uint16_t op); /* 4e00/f00 */
+ void move_rr_bx(uint16_t op); /* 4e00/f00 */
+ void move0_rn_a(uint16_t op); /* 8000 */
+ void move0_rn_b(uint16_t op);
+ void move1_rn_a(uint16_t op);
+ void move1_rn_b(uint16_t op);
+ void move0_r_dn_a(uint16_t op); /* a000 */
+ void move0_r_dn_b(uint16_t op);
+ void move1_r_dn_a(uint16_t op);
+ void move1_r_dn_b(uint16_t op);
+ void move0_r_ni_a(uint16_t op); /* 9000 */
+ void move0_r_ni_b(uint16_t op);
+ void move1_r_ni_a(uint16_t op);
+ void move1_r_ni_b(uint16_t op);
+ void move0_nr_a(uint16_t op); /* 8400-500 */
+ void move0_nr_b(uint16_t op); /* 8400-500 */
+ void move1_nr_a(uint16_t op); /* 8600-700 */
+ void move1_nr_b(uint16_t op); /* 8600-700 */
+ void move0_dn_r_a(uint16_t op); /* A400-500 */
+ void move0_dn_r_b(uint16_t op); /* A400-500 */
+ void move1_dn_r_a(uint16_t op); /* A600-700 */
+ void move1_dn_r_b(uint16_t op); /* A600-700 */
+ void move0_ni_r_a(uint16_t op); /* 9400-500 */
+ void move0_ni_r_b(uint16_t op); /* 9400-500 */
+ void move1_ni_r_a(uint16_t op); /* 9600-700 */
+ void move1_ni_r_b(uint16_t op); /* 9600-700 */
+ void move0_nn_a(uint16_t op); /* 8800 */
+ void move0_nn_b(uint16_t op);
+ void move1_nn_a(uint16_t op);
+ void move1_nn_b(uint16_t op);
+ void move0_dn_dn_a(uint16_t op); /* a800 */
+ void move0_dn_dn_b(uint16_t op);
+ void move1_dn_dn_a(uint16_t op);
+ void move1_dn_dn_b(uint16_t op);
+ void move0_ni_ni_a(uint16_t op); /* 9800 */
+ void move0_ni_ni_b(uint16_t op);
+ void move1_ni_ni_a(uint16_t op);
+ void move1_ni_ni_b(uint16_t op);
+ void move0_r_no_a(uint16_t op); /* b000 */
+ void move0_r_no_b(uint16_t op);
+ void move1_r_no_a(uint16_t op);
+ void move1_r_no_b(uint16_t op);
+ void move0_no_r_a(uint16_t op); /* b400 */
+ void move0_no_r_b(uint16_t op);
+ void move1_no_r_a(uint16_t op);
+ void move1_no_r_b(uint16_t op);
+ void move0_no_ni_a(uint16_t op); /* d000 */
+ void move0_no_ni_b(uint16_t op);
+ void move1_no_ni_a(uint16_t op);
+ void move1_no_ni_b(uint16_t op);
+ void move0_no_no_a(uint16_t op); /* b800 */
+ void move0_no_no_b(uint16_t op);
+ void move1_no_no_a(uint16_t op);
+ void move1_no_no_b(uint16_t op);
+ void move0_ra_a(uint16_t op);
+ void move0_ra_b(uint16_t op);
+ void move1_ra_a(uint16_t op);
+ void move1_ra_b(uint16_t op);
+ void move0_ar_a(uint16_t op);
+ void move0_ar_b(uint16_t op);
+ void move1_ar_a(uint16_t op);
+ void move1_ar_b(uint16_t op);
+ void move0_a_ni_a(uint16_t op); /* d400 */
+ void move0_a_ni_b(uint16_t op); /* d410 */
+ void move1_a_ni_a(uint16_t op); /* d600 */
+ void move1_a_ni_b(uint16_t op); /* d610 */
+ void move0_aa(uint16_t op); /* 05c0 */
+ void move1_aa(uint16_t op); /* 07c0 */
+ void call_a(uint16_t op); /* 0920 */
+ void call_b(uint16_t op); /* 0930 */
+ void callr(uint16_t op); /* 0d3f */
+ void calla(uint16_t op); /* 0d5f */
+ void dsj_a(uint16_t op); /* 0d80 */
+ void dsj_b(uint16_t op); /* 0d90 */
+ void dsjeq_a(uint16_t op); /* 0da0 */
+ void dsjeq_b(uint16_t op); /* 0db0 */
+ void dsjne_a(uint16_t op); /* 0dc0 */
+ void dsjne_b(uint16_t op); /* 0dd0 */
+ void dsjs_a(uint16_t op);
+ void dsjs_b(uint16_t op);
+ void emu(uint16_t op); /* 0100 */
+ void exgpc_a(uint16_t op); /* 0120 */
+ void exgpc_b(uint16_t op); /* 0130 */
+ void getpc_a(uint16_t op); /* 0140 */
+ void getpc_b(uint16_t op); /* 0150 */
+ void getst_a(uint16_t op); /* 0180 */
+ void getst_b(uint16_t op); /* 0190 */
+ void j_UC_0(uint16_t op);
+ void j_UC_8(uint16_t op);
+ void j_UC_x(uint16_t op);
+ void j_P_0(uint16_t op);
+ void j_P_8(uint16_t op);
+ void j_P_x(uint16_t op);
+ void j_LS_0(uint16_t op);
+ void j_LS_8(uint16_t op);
+ void j_LS_x(uint16_t op);
+ void j_HI_0(uint16_t op);
+ void j_HI_8(uint16_t op);
+ void j_HI_x(uint16_t op);
+ void j_LT_0(uint16_t op);
+ void j_LT_8(uint16_t op);
+ void j_LT_x(uint16_t op);
+ void j_GE_0(uint16_t op);
+ void j_GE_8(uint16_t op);
+ void j_GE_x(uint16_t op);
+ void j_LE_0(uint16_t op);
+ void j_LE_8(uint16_t op);
+ void j_LE_x(uint16_t op);
+ void j_GT_0(uint16_t op);
+ void j_GT_8(uint16_t op);
+ void j_GT_x(uint16_t op);
+ void j_C_0(uint16_t op);
+ void j_C_8(uint16_t op);
+ void j_C_x(uint16_t op);
+ void j_NC_0(uint16_t op);
+ void j_NC_8(uint16_t op);
+ void j_NC_x(uint16_t op);
+ void j_EQ_0(uint16_t op);
+ void j_EQ_8(uint16_t op);
+ void j_EQ_x(uint16_t op);
+ void j_NE_0(uint16_t op);
+ void j_NE_8(uint16_t op);
+ void j_NE_x(uint16_t op);
+ void j_V_0(uint16_t op);
+ void j_V_8(uint16_t op);
+ void j_V_x(uint16_t op);
+ void j_NV_0(uint16_t op);
+ void j_NV_8(uint16_t op);
+ void j_NV_x(uint16_t op);
+ void j_N_0(uint16_t op);
+ void j_N_8(uint16_t op);
+ void j_N_x(uint16_t op);
+ void j_NN_0(uint16_t op);
+ void j_NN_8(uint16_t op);
+ void j_NN_x(uint16_t op);
+ void jump_a(uint16_t op); /* 0160 */
+ void jump_b(uint16_t op); /* 0170 */
+ void popst(uint16_t op); /* 01c0 */
+ void pushst(uint16_t op); /* 01e0 */
+ void putst_a(uint16_t op); /* 01a0 */
+ void putst_b(uint16_t op); /* 01b0 */
+ void reti(uint16_t op); /* 0940 */
+ void rets(uint16_t op); /* 0960/70 */
+ void rev_a(uint16_t op); /* 0020 */
+ void rev_b(uint16_t op); /* 0030 */
+ void trap(uint16_t op); /* 0900/10 */
+ void addxyi_a(uint16_t op);
+ void addxyi_b(uint16_t op);
+ void blmove(uint16_t op);
+ void cexec_l(uint16_t op);
+ void cexec_s(uint16_t op);
+ void clip(uint16_t op);
+ void cmovcg_a(uint16_t op);
+ void cmovcg_b(uint16_t op);
+ void cmovcm_f(uint16_t op);
+ void cmovcm_b(uint16_t op);
+ void cmovgc_a(uint16_t op);
+ void cmovgc_b(uint16_t op);
+ void cmovgc_a_s(uint16_t op);
+ void cmovgc_b_s(uint16_t op);
+ void cmovmc_f(uint16_t op);
+ void cmovmc_f_va(uint16_t op);
+ void cmovmc_f_vb(uint16_t op);
+ void cmovmc_b(uint16_t op);
+ void cmp_k_a(uint16_t op);
+ void cmp_k_b(uint16_t op);
+ void cvdxyl_a(uint16_t op);
+ void cvdxyl_b(uint16_t op);
+ void cvmxyl_a(uint16_t op);
+ void cvmxyl_b(uint16_t op);
+ void cvsxyl_a(uint16_t op);
+ void cvsxyl_b(uint16_t op);
+ void exgps_a(uint16_t op);
+ void exgps_b(uint16_t op);
+ void fline(uint16_t op);
+ void fpixeq(uint16_t op);
+ void fpixne(uint16_t op);
+ void getps_a(uint16_t op);
+ void getps_b(uint16_t op);
+ void idle(uint16_t op);
+ void linit(uint16_t op);
+ void mwait(uint16_t op);
+ void pfill_xy(uint16_t op);
+ void pixblt_l_m_l(uint16_t op);
+ void retm(uint16_t op);
+ void rmo_a(uint16_t op);
+ void rmo_b(uint16_t op);
+ void rpix_a(uint16_t op);
+ void rpix_b(uint16_t op);
+ void setcdp(uint16_t op);
+ void setcmp(uint16_t op);
+ void setcsp(uint16_t op);
+ void swapf_a(uint16_t op);
+ void swapf_b(uint16_t op);
+ void tfill_xy(uint16_t op);
+ void trapl(uint16_t op);
+ void vblt_b_l(uint16_t op);
+ void vfill_l(uint16_t op);
+ void vlcol(uint16_t op);
+ int apply_window(const char *inst_name,int srcbpp, uint32_t *srcaddr, XY *dst, int *dx, int *dy);
int compute_fill_cycles(int left_partials, int right_partials, int full_words, int op_timing);
int compute_pixblt_cycles(int left_partials, int right_partials, int full_words, int op_timing);
int compute_pixblt_b_cycles(int left_partials, int right_partials, int full_words, int rows, int op_timing, int bpp);
- void memory_w(address_space &space, offs_t offset,UINT16 data);
- UINT16 memory_r(address_space &space, offs_t offset);
- void shiftreg_w(address_space &space, offs_t offset, UINT16 data);
- UINT16 shiftreg_r(address_space &space, offs_t offset);
- UINT16 dummy_shiftreg_r(address_space &space, offs_t offset);
- UINT32 pixel_op00(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op01(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op02(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op03(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op04(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op05(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op06(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op07(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op08(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op09(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op10(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op11(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op12(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op13(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op14(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op15(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op16(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op17(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op18(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op19(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op20(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
- UINT32 pixel_op21(UINT32 dstpix, UINT32 mask, UINT32 srcpix);
+ void memory_w(address_space &space, offs_t offset,uint16_t data);
+ uint16_t memory_r(address_space &space, offs_t offset);
+ void shiftreg_w(address_space &space, offs_t offset, uint16_t data);
+ uint16_t shiftreg_r(address_space &space, offs_t offset);
+ uint16_t dummy_shiftreg_r(address_space &space, offs_t offset);
+ uint32_t pixel_op00(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op01(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op02(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op03(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op04(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op05(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op06(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op07(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op08(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op09(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op10(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op11(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op12(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op13(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op14(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op15(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op16(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op17(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op18(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op19(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op20(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
+ uint32_t pixel_op21(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
void pixblt_1_op0(int src_is_linear, int dst_is_linear);
void pixblt_2_op0(int src_is_linear, int dst_is_linear);
void pixblt_4_op0(int src_is_linear, int dst_is_linear);
@@ -1020,16 +1020,16 @@ protected:
class tms34010_device : public tms340x0_device
{
public:
- tms34010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms34010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
/* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */
virtual DECLARE_WRITE16_MEMBER( io_register_w ) override;
virtual DECLARE_READ16_MEMBER( io_register_r ) override;
protected:
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 8 - 1) / 8; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 8); }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 8 - 1) / 8; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 8); }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
extern const device_type TMS34010;
@@ -1037,16 +1037,16 @@ extern const device_type TMS34010;
class tms34020_device : public tms340x0_device
{
public:
- tms34020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms34020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
/* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */
virtual DECLARE_WRITE16_MEMBER( io_register_w ) override;
virtual DECLARE_READ16_MEMBER( io_register_r ) override;
protected:
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
extern const device_type TMS34020;
diff --git a/src/devices/cpu/tms57002/57002dsm.cpp b/src/devices/cpu/tms57002/57002dsm.cpp
index db4a0d12b15..4b03fff991d 100644
--- a/src/devices/cpu/tms57002/57002dsm.cpp
+++ b/src/devices/cpu/tms57002/57002dsm.cpp
@@ -12,7 +12,7 @@
#include "debugger.h"
#include "tms57002.h"
-static const char *get_memadr(UINT32 opcode, char type)
+static const char *get_memadr(uint32_t opcode, char type)
{
static char buff[2][10];
static int index = 0;
@@ -38,8 +38,8 @@ static const char *get_memadr(UINT32 opcode, char type)
CPU_DISASSEMBLE(tms57002)
{
- UINT32 opcode = opram[0] | (opram[1] << 8) | (opram[2] << 16);
- UINT8 fa = opcode >> 18;
+ uint32_t opcode = opram[0] | (opram[1] << 8) | (opram[2] << 16);
+ uint8_t fa = opcode >> 18;
char *buf = buffer;
if(fa == 0x3f) {
switch((opcode >> 11) & 0x7f) { // category 3
diff --git a/src/devices/cpu/tms57002/tms57002.cpp b/src/devices/cpu/tms57002/tms57002.cpp
index fbc7b208673..eafa912206c 100644
--- a/src/devices/cpu/tms57002/tms57002.cpp
+++ b/src/devices/cpu/tms57002/tms57002.cpp
@@ -20,7 +20,7 @@ static ADDRESS_MAP_START(internal_pgm, AS_PROGRAM, 32, tms57002_device)
AM_RANGE(0x00, 0xff) AM_RAM
ADDRESS_MAP_END
-tms57002_device::tms57002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms57002_device::tms57002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS57002, "TMS57002", tag, owner, clock, "tms57002", __FILE__),
device_sound_interface(mconfig, *this), macc(0), st0(0), st1(0), sti(0),
txrd(0),
@@ -32,7 +32,7 @@ tms57002_device::tms57002_device(const machine_config &mconfig, const char *tag,
WRITE_LINE_MEMBER(tms57002_device::pload_w)
{
- UINT8 olds = sti;
+ uint8_t olds = sti;
if(state)
sti &= ~IN_PLOAD;
else
@@ -47,7 +47,7 @@ WRITE_LINE_MEMBER(tms57002_device::pload_w)
WRITE_LINE_MEMBER(tms57002_device::cload_w)
{
- UINT8 olds = sti;
+ uint8_t olds = sti;
if(state)
sti &= ~IN_CLOAD;
else
@@ -90,7 +90,7 @@ WRITE8_MEMBER(tms57002_device::data_w)
case IN_PLOAD:
host[hidx++] = data;
if(hidx >= 3) {
- UINT32 val = (host[0]<<16) | (host[1]<<8) | host[2];
+ uint32_t val = (host[0]<<16) | (host[1]<<8) | host[2];
hidx = 0;
switch(sti & SU_MASK) {
@@ -112,7 +112,7 @@ WRITE8_MEMBER(tms57002_device::data_w)
if(sti & SU_CVAL) {
host[hidx++] = data;
if(hidx >= 4) {
- UINT32 val = (host[0]<<24) | (host[1]<<16) | (host[2]<<8) | host[3];
+ uint32_t val = (host[0]<<24) | (host[1]<<16) | (host[2]<<8) | host[3];
cmem[sa] = val;
sti &= ~SU_CVAL;
allow_update = 0;
@@ -127,7 +127,7 @@ WRITE8_MEMBER(tms57002_device::data_w)
case IN_PLOAD|IN_CLOAD:
host[hidx++] = data;
if(hidx >= 4) {
- UINT32 val = (host[0]<<24) | (host[1]<<16) | (host[2]<<8) | host[3];
+ uint32_t val = (host[0]<<24) | (host[1]<<16) | (host[2]<<8) | host[3];
hidx = 0;
cmem[ca++] = val;
}
@@ -137,7 +137,7 @@ WRITE8_MEMBER(tms57002_device::data_w)
READ8_MEMBER(tms57002_device::data_r)
{
- UINT8 res;
+ uint8_t res;
if(!(sti & S_HOST))
return 0xff;
@@ -186,8 +186,8 @@ WRITE_LINE_MEMBER(tms57002_device::sync_w)
void tms57002_device::xm_init()
{
- UINT32 adr = xoa + xba;
- UINT32 mask = 0;
+ uint32_t adr = xoa + xba;
+ uint32_t mask = 0;
switch(st0 & ST0_M) {
case ST0_M_64K: mask = 0x0ffff; break;
@@ -207,8 +207,8 @@ void tms57002_device::xm_init()
inline void tms57002_device::xm_step_read()
{
- UINT32 adr = xm_adr;
- UINT8 v = data->read_byte(adr);
+ uint32_t adr = xm_adr;
+ uint8_t v = data->read_byte(adr);
int done;
if(st0 & ST0_WORD) {
if(st0 & ST0_SEL) {
@@ -245,8 +245,8 @@ inline void tms57002_device::xm_step_read()
inline void tms57002_device::xm_step_write()
{
- UINT32 adr = xm_adr;
- UINT8 v;
+ uint32_t adr = xm_adr;
+ uint8_t v;
int done;
if(st0 & ST0_WORD) {
if(st0 & ST0_SEL) {
@@ -277,10 +277,10 @@ inline void tms57002_device::xm_step_write()
xm_adr = adr+1;
}
-INT64 tms57002_device::macc_to_output_0(INT64 rounding, UINT64 rmask)
+int64_t tms57002_device::macc_to_output_0(int64_t rounding, uint64_t rmask)
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
int over = 0;
// Overflow detection and shifting
@@ -302,10 +302,10 @@ INT64 tms57002_device::macc_to_output_0(INT64 rounding, UINT64 rmask)
return m;
}
-INT64 tms57002_device::macc_to_output_1(INT64 rounding, UINT64 rmask)
+int64_t tms57002_device::macc_to_output_1(int64_t rounding, uint64_t rmask)
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
int over = 0;
// Overflow detection and shifting
@@ -328,10 +328,10 @@ INT64 tms57002_device::macc_to_output_1(INT64 rounding, UINT64 rmask)
return m;
}
-INT64 tms57002_device::macc_to_output_2(INT64 rounding, UINT64 rmask)
+int64_t tms57002_device::macc_to_output_2(int64_t rounding, uint64_t rmask)
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
int over = 0;
// Overflow detection and shifting
@@ -354,10 +354,10 @@ INT64 tms57002_device::macc_to_output_2(INT64 rounding, UINT64 rmask)
return m;
}
-INT64 tms57002_device::macc_to_output_3(INT64 rounding, UINT64 rmask)
+int64_t tms57002_device::macc_to_output_3(int64_t rounding, uint64_t rmask)
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
int over = 0;
// Overflow detection and shifting
@@ -377,10 +377,10 @@ INT64 tms57002_device::macc_to_output_3(INT64 rounding, UINT64 rmask)
return m;
}
-INT64 tms57002_device::macc_to_output_0s(INT64 rounding, UINT64 rmask)
+int64_t tms57002_device::macc_to_output_0s(int64_t rounding, uint64_t rmask)
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
int over = 0;
// Overflow detection and shifting
@@ -406,10 +406,10 @@ INT64 tms57002_device::macc_to_output_0s(INT64 rounding, UINT64 rmask)
return m;
}
-INT64 tms57002_device::macc_to_output_1s(INT64 rounding, UINT64 rmask)
+int64_t tms57002_device::macc_to_output_1s(int64_t rounding, uint64_t rmask)
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
int over = 0;
// Overflow detection and shifting
@@ -436,10 +436,10 @@ INT64 tms57002_device::macc_to_output_1s(INT64 rounding, UINT64 rmask)
return m;
}
-INT64 tms57002_device::macc_to_output_2s(INT64 rounding, UINT64 rmask)
+int64_t tms57002_device::macc_to_output_2s(int64_t rounding, uint64_t rmask)
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
int over = 0;
// Overflow detection and shifting
@@ -466,10 +466,10 @@ INT64 tms57002_device::macc_to_output_2s(INT64 rounding, UINT64 rmask)
return m;
}
-INT64 tms57002_device::macc_to_output_3s(INT64 rounding, UINT64 rmask)
+int64_t tms57002_device::macc_to_output_3s(int64_t rounding, uint64_t rmask)
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
int over = 0;
// Overflow detection and shifting
@@ -493,10 +493,10 @@ INT64 tms57002_device::macc_to_output_3s(INT64 rounding, UINT64 rmask)
return m;
}
-INT64 tms57002_device::check_macc_overflow_0()
+int64_t tms57002_device::check_macc_overflow_0()
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
// Overflow detection
m1 = m & 0xf800000000000ULL;
@@ -506,10 +506,10 @@ INT64 tms57002_device::check_macc_overflow_0()
return m;
}
-INT64 tms57002_device::check_macc_overflow_1()
+int64_t tms57002_device::check_macc_overflow_1()
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
// Overflow detection
m1 = m & 0xfe00000000000ULL;
@@ -519,10 +519,10 @@ INT64 tms57002_device::check_macc_overflow_1()
return m;
}
-INT64 tms57002_device::check_macc_overflow_2()
+int64_t tms57002_device::check_macc_overflow_2()
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
// Overflow detection
m1 = m & 0xff80000000000ULL;
@@ -532,15 +532,15 @@ INT64 tms57002_device::check_macc_overflow_2()
return m;
}
-INT64 tms57002_device::check_macc_overflow_3()
+int64_t tms57002_device::check_macc_overflow_3()
{
return macc;
}
-INT64 tms57002_device::check_macc_overflow_0s()
+int64_t tms57002_device::check_macc_overflow_0s()
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
// Overflow detection
m1 = m & 0xf800000000000ULL;
@@ -554,10 +554,10 @@ INT64 tms57002_device::check_macc_overflow_0s()
return m;
}
-INT64 tms57002_device::check_macc_overflow_1s()
+int64_t tms57002_device::check_macc_overflow_1s()
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
// Overflow detection
m1 = m & 0xfe00000000000ULL;
@@ -571,10 +571,10 @@ INT64 tms57002_device::check_macc_overflow_1s()
return m;
}
-INT64 tms57002_device::check_macc_overflow_2s()
+int64_t tms57002_device::check_macc_overflow_2s()
{
- INT64 m = macc;
- UINT64 m1;
+ int64_t m = macc;
+ uint64_t m1;
// Overflow detection
m1 = m & 0xff80000000000ULL;
@@ -588,7 +588,7 @@ INT64 tms57002_device::check_macc_overflow_2s()
return m;
}
-INT64 tms57002_device::check_macc_overflow_3s()
+int64_t tms57002_device::check_macc_overflow_3s()
{
return macc;
}
@@ -611,7 +611,7 @@ void tms57002_device::cache_flush()
}
}
-void tms57002_device::add_one(cstate *cs, unsigned short op, UINT8 param)
+void tms57002_device::add_one(cstate *cs, unsigned short op, uint8_t param)
{
short ipc = cache.iused++;
cache.inst[ipc].op = op;
@@ -626,7 +626,7 @@ void tms57002_device::add_one(cstate *cs, unsigned short op, UINT8 param)
}
}
-void tms57002_device::decode_one(UINT32 opcode, cstate *cs, void (tms57002_device::*dec)(UINT32 opcode, unsigned short *op, cstate *cs))
+void tms57002_device::decode_one(uint32_t opcode, cstate *cs, void (tms57002_device::*dec)(uint32_t opcode, unsigned short *op, cstate *cs))
{
unsigned short op = 0;
(this->*dec)(opcode, &op, cs);
@@ -635,7 +635,7 @@ void tms57002_device::decode_one(UINT32 opcode, cstate *cs, void (tms57002_devic
add_one(cs, op, opcode & 0xff);
}
-short tms57002_device::get_hash(unsigned char adr, UINT32 st1, short *pnode)
+short tms57002_device::get_hash(unsigned char adr, uint32_t st1, short *pnode)
{
short hnode;
st1 &= ST1_CACHE;
@@ -650,7 +650,7 @@ short tms57002_device::get_hash(unsigned char adr, UINT32 st1, short *pnode)
return -1;
}
-short tms57002_device::get_hashnode(unsigned char adr, UINT32 st1, short pnode)
+short tms57002_device::get_hashnode(unsigned char adr, uint32_t st1, short pnode)
{
short hnode = cache.hused++;
cache.hashnode[hnode].st1 = st1 & ST1_CACHE;
@@ -667,7 +667,7 @@ int tms57002_device::decode_get_pc()
{
short pnode, res;
cstate cs;
- UINT8 adr = pc;
+ uint8_t adr = pc;
res = get_hash(adr, st1, &pnode);
if(res != -1)
@@ -684,7 +684,7 @@ int tms57002_device::decode_get_pc()
for(;;) {
short ipc;
- UINT32 opcode = program->read_dword(adr << 2);
+ uint32_t opcode = program->read_dword(adr << 2);
cs.inc = 0;
@@ -734,8 +734,8 @@ void tms57002_device::execute_run()
}
for(;;) {
- UINT32 c, d;
- INT64 r;
+ uint32_t c, d;
+ int64_t r;
const icd *i = cache.inst + ipc;
ipc = i->next;
@@ -800,10 +800,10 @@ void tms57002_device::sound_stream_update(sound_stream &stream, stream_sample_t
si[2] = inputs[2][0] & 0xffffff;
si[3] = inputs[3][0] & 0xffffff;
}
- outputs[0][0] = INT16(so[0] >> 8);
- outputs[1][0] = INT16(so[1] >> 8);
- outputs[2][0] = INT16(so[2] >> 8);
- outputs[3][0] = INT16(so[3] >> 8);
+ outputs[0][0] = int16_t(so[0] >> 8);
+ outputs[1][0] = int16_t(so[1] >> 8);
+ outputs[2][0] = int16_t(so[2] >> 8);
+ outputs[3][0] = int16_t(so[3] >> 8);
sync_w(1);
}
@@ -877,32 +877,32 @@ void tms57002_device::device_start()
save_item(NAME(allow_update));
}
-UINT32 tms57002_device::execute_min_cycles() const
+uint32_t tms57002_device::execute_min_cycles() const
{
return 1;
}
-UINT32 tms57002_device::execute_max_cycles() const
+uint32_t tms57002_device::execute_max_cycles() const
{
return 3;
}
-UINT32 tms57002_device::execute_input_lines() const
+uint32_t tms57002_device::execute_input_lines() const
{
return 0;
}
-UINT32 tms57002_device::disasm_min_opcode_bytes() const
+uint32_t tms57002_device::disasm_min_opcode_bytes() const
{
return 4;
}
-UINT32 tms57002_device::disasm_max_opcode_bytes() const
+uint32_t tms57002_device::disasm_max_opcode_bytes() const
{
return 4;
}
-offs_t tms57002_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms57002_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms57002 );
return CPU_DISASSEMBLE_NAME(tms57002)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms57002/tms57002.h b/src/devices/cpu/tms57002/tms57002.h
index 6cfcf4b4b51..7ae8102c99c 100644
--- a/src/devices/cpu/tms57002/tms57002.h
+++ b/src/devices/cpu/tms57002/tms57002.h
@@ -14,7 +14,7 @@
class tms57002_device : public cpu_device, public device_sound_interface {
public:
- tms57002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms57002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(data_r);
DECLARE_WRITE8_MEMBER(data_w);
@@ -31,13 +31,13 @@ protected:
virtual void device_reset() override;
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
enum {
@@ -118,22 +118,22 @@ private:
short ipc;
};
- INT64 macc;
+ int64_t macc;
- UINT32 cmem[256];
- UINT32 dmem0[256];
- UINT32 dmem1[32];
+ uint32_t cmem[256];
+ uint32_t dmem0[256];
+ uint32_t dmem1[32];
- UINT32 si[4], so[4];
+ uint32_t si[4], so[4];
- UINT32 st0, st1, sti;
- UINT32 aacc, xoa, xba, xwr, xrd, txrd, creg;
+ uint32_t st0, st1, sti;
+ uint32_t aacc, xoa, xba, xwr, xrd, txrd, creg;
- UINT8 pc, hpc, ca, id, ba0, ba1, rptc, rptc_next, sa;
+ uint8_t pc, hpc, ca, id, ba0, ba1, rptc, rptc_next, sa;
- UINT32 xm_adr;
+ uint32_t xm_adr;
- UINT8 host[4], hidx, allow_update;
+ uint8_t host[4], hidx, allow_update;
cd cache;
@@ -143,46 +143,46 @@ private:
int icount;
int unsupported_inst_warning;
- void decode_error(UINT32 opcode);
- void decode_cat1(UINT32 opcode, unsigned short *op, cstate *cs);
- void decode_cat2_pre(UINT32 opcode, unsigned short *op, cstate *cs);
- void decode_cat3(UINT32 opcode, unsigned short *op, cstate *cs);
- void decode_cat2_post(UINT32 opcode, unsigned short *op, cstate *cs);
-
- inline int xmode(UINT32 opcode, char type, cstate *cs);
- inline int sfao(UINT32 st1);
- inline int dbp(UINT32 st1);
- inline int crm(UINT32 st1);
- inline int sfai(UINT32 st1);
- inline int sfmo(UINT32 st1);
- inline int rnd(UINT32 st1);
- inline int movm(UINT32 st1);
- inline int sfma(UINT32 st1);
+ void decode_error(uint32_t opcode);
+ void decode_cat1(uint32_t opcode, unsigned short *op, cstate *cs);
+ void decode_cat2_pre(uint32_t opcode, unsigned short *op, cstate *cs);
+ void decode_cat3(uint32_t opcode, unsigned short *op, cstate *cs);
+ void decode_cat2_post(uint32_t opcode, unsigned short *op, cstate *cs);
+
+ inline int xmode(uint32_t opcode, char type, cstate *cs);
+ inline int sfao(uint32_t st1);
+ inline int dbp(uint32_t st1);
+ inline int crm(uint32_t st1);
+ inline int sfai(uint32_t st1);
+ inline int sfmo(uint32_t st1);
+ inline int rnd(uint32_t st1);
+ inline int movm(uint32_t st1);
+ inline int sfma(uint32_t st1);
void xm_init();
void xm_step_read();
void xm_step_write();
- INT64 macc_to_output_0(INT64 rounding, UINT64 rmask);
- INT64 macc_to_output_1(INT64 rounding, UINT64 rmask);
- INT64 macc_to_output_2(INT64 rounding, UINT64 rmask);
- INT64 macc_to_output_3(INT64 rounding, UINT64 rmask);
- INT64 macc_to_output_0s(INT64 rounding, UINT64 rmask);
- INT64 macc_to_output_1s(INT64 rounding, UINT64 rmask);
- INT64 macc_to_output_2s(INT64 rounding, UINT64 rmask);
- INT64 macc_to_output_3s(INT64 rounding, UINT64 rmask);
- INT64 check_macc_overflow_0();
- INT64 check_macc_overflow_1();
- INT64 check_macc_overflow_2();
- INT64 check_macc_overflow_3();
- INT64 check_macc_overflow_0s();
- INT64 check_macc_overflow_1s();
- INT64 check_macc_overflow_2s();
- INT64 check_macc_overflow_3s();
+ int64_t macc_to_output_0(int64_t rounding, uint64_t rmask);
+ int64_t macc_to_output_1(int64_t rounding, uint64_t rmask);
+ int64_t macc_to_output_2(int64_t rounding, uint64_t rmask);
+ int64_t macc_to_output_3(int64_t rounding, uint64_t rmask);
+ int64_t macc_to_output_0s(int64_t rounding, uint64_t rmask);
+ int64_t macc_to_output_1s(int64_t rounding, uint64_t rmask);
+ int64_t macc_to_output_2s(int64_t rounding, uint64_t rmask);
+ int64_t macc_to_output_3s(int64_t rounding, uint64_t rmask);
+ int64_t check_macc_overflow_0();
+ int64_t check_macc_overflow_1();
+ int64_t check_macc_overflow_2();
+ int64_t check_macc_overflow_3();
+ int64_t check_macc_overflow_0s();
+ int64_t check_macc_overflow_1s();
+ int64_t check_macc_overflow_2s();
+ int64_t check_macc_overflow_3s();
void cache_flush();
- void add_one(cstate *cs, unsigned short op, UINT8 param);
- void decode_one(UINT32 opcode, cstate *cs, void (tms57002_device::*dec)(UINT32 opcode, unsigned short *op, cstate *cs));
- short get_hash(unsigned char adr, UINT32 st1, short *pnode);
- short get_hashnode(unsigned char adr, UINT32 st1, short pnode);
+ void add_one(cstate *cs, unsigned short op, uint8_t param);
+ void decode_one(uint32_t opcode, cstate *cs, void (tms57002_device::*dec)(uint32_t opcode, unsigned short *op, cstate *cs));
+ short get_hash(unsigned char adr, uint32_t st1, short *pnode);
+ short get_hashnode(unsigned char adr, uint32_t st1, short pnode);
int decode_get_pc();
};
diff --git a/src/devices/cpu/tms57002/tms57kdec.cpp b/src/devices/cpu/tms57002/tms57kdec.cpp
index 62061cc6cc7..c30bd1fc35a 100644
--- a/src/devices/cpu/tms57002/tms57kdec.cpp
+++ b/src/devices/cpu/tms57002/tms57kdec.cpp
@@ -12,7 +12,7 @@
#include "debugger.h"
#include "tms57002.h"
-inline int tms57002_device::xmode(UINT32 opcode, char type, cstate *cs)
+inline int tms57002_device::xmode(uint32_t opcode, char type, cstate *cs)
{
if(((opcode & 0x400) && (type == 'c')) || (!(opcode & 0x400) && (type == 'd'))) {
if(opcode & 0x100)
@@ -28,52 +28,52 @@ inline int tms57002_device::xmode(UINT32 opcode, char type, cstate *cs)
return 1;
}
-inline int tms57002_device::sfao(UINT32 st1)
+inline int tms57002_device::sfao(uint32_t st1)
{
return st1 & ST1_SFAO ? 1 : 0;
}
-inline int tms57002_device::dbp(UINT32 st1)
+inline int tms57002_device::dbp(uint32_t st1)
{
return st1 & ST1_DBP ? 1 : 0;
}
-inline int tms57002_device::crm(UINT32 st1)
+inline int tms57002_device::crm(uint32_t st1)
{
int crm = (st1 & ST1_CRM) >> ST1_CRM_SHIFT;
return crm <= 2 ? crm : 0;
}
-inline int tms57002_device::sfai(UINT32 st1)
+inline int tms57002_device::sfai(uint32_t st1)
{
return st1 & ST1_SFAI ? 1 : 0;
}
-inline int tms57002_device::sfmo(UINT32 st1)
+inline int tms57002_device::sfmo(uint32_t st1)
{
return (st1 & ST1_SFMO) >> ST1_SFMO_SHIFT;
}
-inline int tms57002_device::rnd(UINT32 st1)
+inline int tms57002_device::rnd(uint32_t st1)
{
int rnd = (st1 & ST1_RND) >> ST1_RND_SHIFT;
return rnd <= 4 ? rnd : 0;
}
-inline int tms57002_device::movm(UINT32 st1)
+inline int tms57002_device::movm(uint32_t st1)
{
return st1 & ST1_MOVM ? 1 : 0;
}
-inline int tms57002_device::sfma(UINT32 st1)
+inline int tms57002_device::sfma(uint32_t st1)
{
return (st1 & ST1_SFMA) >> ST1_SFMA_SHIFT;
}
-void tms57002_device::decode_error(UINT32 opcode)
+void tms57002_device::decode_error(uint32_t opcode)
{
char buf[256];
- UINT8 opr[3];
+ uint8_t opr[3];
if(unsupported_inst_warning)
return;
@@ -86,7 +86,7 @@ void tms57002_device::decode_error(UINT32 opcode)
popmessage("tms57002: %s - Contact Mamedev", buf);
}
-void tms57002_device::decode_cat1(UINT32 opcode, unsigned short *op, cstate *cs)
+void tms57002_device::decode_cat1(uint32_t opcode, unsigned short *op, cstate *cs)
{
switch(opcode >> 18) {
case 0x00: // nop
@@ -102,7 +102,7 @@ void tms57002_device::decode_cat1(UINT32 opcode, unsigned short *op, cstate *cs)
}
}
-void tms57002_device::decode_cat2_pre(UINT32 opcode, unsigned short *op, cstate *cs)
+void tms57002_device::decode_cat2_pre(uint32_t opcode, unsigned short *op, cstate *cs)
{
switch((opcode >> 11) & 0x7f) {
case 0x00: // nop
@@ -118,7 +118,7 @@ void tms57002_device::decode_cat2_pre(UINT32 opcode, unsigned short *op, cstate
}
}
-void tms57002_device::decode_cat2_post(UINT32 opcode, unsigned short *op, cstate *cs)
+void tms57002_device::decode_cat2_post(uint32_t opcode, unsigned short *op, cstate *cs)
{
switch((opcode >> 11) & 0x7f) {
case 0x00: // nop
@@ -134,7 +134,7 @@ void tms57002_device::decode_cat2_post(UINT32 opcode, unsigned short *op, cstate
}
}
-void tms57002_device::decode_cat3(UINT32 opcode, unsigned short *op, cstate *cs)
+void tms57002_device::decode_cat3(uint32_t opcode, unsigned short *op, cstate *cs)
{
switch((opcode >> 11) & 0x7f) {
case 0x00: // nop
diff --git a/src/devices/cpu/tms57002/tmsinstr.lst b/src/devices/cpu/tms57002/tmsinstr.lst
index bcae2967949..d3fb0fa57f5 100644
--- a/src/devices/cpu/tms57002/tmsinstr.lst
+++ b/src/devices/cpu/tms57002/tmsinstr.lst
@@ -1,32 +1,32 @@
abs 1 01 1 n
abs
aacc = %a;
- if(((INT32)aacc) < 0) {
+ if(((int32_t)aacc) < 0) {
aacc = - aacc;
- if(((INT32)aacc) < 0)
+ if(((int32_t)aacc) < 0)
st1 |= ST1_AOV;
}
add 1 03 1 y
add %d,a
- %wa((INT64)(INT32)%d + (INT64)(INT32)%a);
+ %wa((int64_t)(int32_t)%d + (int64_t)(int32_t)%a);
add 1 04 1 y
add %c,a
- %wa((INT64)(INT32)%c + (INT64)(INT32)%a);
+ %wa((int64_t)(int32_t)%c + (int64_t)(int32_t)%a);
add 1 05 1 y
add %d,m
%sfai(d, %d);
- %wa((INT64)(INT32)d + (%mo >> 16));
+ %wa((int64_t)(int32_t)d + (%mo >> 16));
add 1 06 1 y
add %c,m
- %wa((INT64)(INT32)%c + (%mo >> 16));
+ %wa((int64_t)(int32_t)%c + (%mo >> 16));
add 1 07 1 y
add %d,%c
- %wa((INT64)(INT32)%d + (INT64)(INT32)%c);
+ %wa((int64_t)(int32_t)%d + (int64_t)(int32_t)%c);
adds 1 08 1 y
adds %d
@@ -57,7 +57,7 @@ b 3 48 3 n b
bgz 3 50 3 n cb
bgz %i
- if(((INT32)aacc) > 0) {
+ if(((int32_t)aacc) > 0) {
%b(%i);
}
@@ -66,7 +66,7 @@ bioz 3 70 3 n cb
blz 3 58 3 n cb
blz %i
- if(((INT32)aacc) < 0) {
+ if(((int32_t)aacc) < 0) {
%b(%i);
}
@@ -191,7 +191,7 @@ lcaa 2a 08 1 y
lcac 3 40 1 n
lcac %i
- if(((INT32)aacc) >= 0)
+ if(((int32_t)aacc) >= 0)
ca = %i;
lcak 3 18 1 n
@@ -219,11 +219,11 @@ lirk 3 20 1 n
lmhc 1 33 1 n
lmhc %c
- macc = ((INT64)(INT32)%c) << 16;
+ macc = ((int64_t)(int32_t)%c) << 16;
lmhd 1 31 1 n
lmhd %d
- macc = ((INT64)(INT32)%d) << 16;
+ macc = ((int64_t)(int32_t)%d) << 16;
lmld 1 32 1 n
lmld %d
@@ -250,7 +250,7 @@ mac 1 24 1 y
if(d & 0x00800000)
d |= 0xff000000;
creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)d;
+ r = (int64_t)(int32_t)c * (int64_t)(int32_t)d;
macc = %ml + (r >> 7);
mac 1 25 1 y
@@ -259,27 +259,27 @@ mac 1 25 1 y
mac 1 26 1 y
mac %c,a
creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)%a;
+ r = (int64_t)(int32_t)c * (int64_t)(int32_t)%a;
macc = %ml + (r >> 15);
macs 1 2e 1 y
macs %c,a
creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)%a;
+ r = (int64_t)(int32_t)c * (int64_t)(int32_t)%a;
macc = %ml + (r >> 14);
macu 1 29 1 y
macu %d,%c
d = %d24; // d is 24bits unsigned
creg = c = %c;
- r = (INT64)(INT32)c * (INT64)d;
+ r = (int64_t)(int32_t)c * (int64_t)d;
macc = %ml + (r >> 7);
macu 1 2a 1 y
macu a,%d
d = %d24; // d is 24bits unsigned
creg = c = %a;
- r = (INT64)(INT32)c * (INT64)d;
+ r = (int64_t)(int32_t)c * (int64_t)d;
macc = %ml + (r >> 7);
mpy 1 21 1 y
@@ -288,13 +288,13 @@ mpy 1 21 1 y
if(d & 0x00800000)
d |= 0xff000000;
creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)d;
+ r = (int64_t)(int32_t)c * (int64_t)(int32_t)d;
macc = r >> 7;
mpy 1 22 1 y
mpy %c,a
creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)%a;
+ r = (int64_t)(int32_t)c * (int64_t)(int32_t)%a;
macc = r >> 15;
mpy 1 23 1 y
@@ -304,7 +304,7 @@ mpyu 1 28 1 y
mpyu %d,%c
creg = c = %c;
d = %d24; // d is 24bits unsigned
- r = (INT64)(INT32)c * (INT64)d;
+ r = (int64_t)(int32_t)c * (int64_t)d;
macc = r >> 7;
neg 1 02 1 n
@@ -495,11 +495,11 @@ std1 2a 0d 1 y
sub 1 09 1 y
sub %d,a
- %wa((INT64)(INT32)%d - (INT64)(INT32)%a);
+ %wa((int64_t)(int32_t)%d - (int64_t)(int32_t)%a);
sub 1 0a 1 y
sub %c,a
- %wa((INT64)(INT32)%c - (INT64)(INT32)%a);
+ %wa((int64_t)(int32_t)%c - (int64_t)(int32_t)%a);
sub 1 0b 1 y
sub %d,m
@@ -509,7 +509,7 @@ sub 1 0c 1 y
sub 1 0d 1 y
sub %d,%c
- %wa((INT64)(INT32)%d - (INT64)(INT32)%c);
+ %wa((int64_t)(int32_t)%d - (int64_t)(int32_t)%c);
wre 1 38 1 n
wre %d,%c
diff --git a/src/devices/cpu/tms57002/tmsmake.py b/src/devices/cpu/tms57002/tmsmake.py
index e2e12b5a4b3..1aaa0fc59e4 100755
--- a/src/devices/cpu/tms57002/tmsmake.py
+++ b/src/devices/cpu/tms57002/tmsmake.py
@@ -91,7 +91,7 @@ PDESC_EXPAND = {
"wd1": expand_wd1,
"b1": lambda v: "pc = ",
"b2": lambda v: " sti |= S_BRANCH;",
- "sfai1": lambda v: ["", "((INT32)("][v["sfai"]],
+ "sfai1": lambda v: ["", "((int32_t)("][v["sfai"]],
"sfai2": lambda v: ["", ")) >> 1"][v["sfai"]],
}
diff --git a/src/devices/cpu/tms7000/7000dasm.cpp b/src/devices/cpu/tms7000/7000dasm.cpp
index e265ef1db7e..5240cf1fc37 100644
--- a/src/devices/cpu/tms7000/7000dasm.cpp
+++ b/src/devices/cpu/tms7000/7000dasm.cpp
@@ -21,7 +21,7 @@ struct tms7000_opcodeinfo {
int opcode;
char name[8];
int operand;
- UINT32 s_flag;
+ uint32_t s_flag;
};
static const oprandinfo of[] = {
@@ -382,10 +382,10 @@ CPU_DISASSEMBLE( tms7000 )
/* We found a match */
int j,k,vector;
- UINT8 a;
- INT8 b;
- UINT16 c;
- INT16 d;
+ uint8_t a;
+ int8_t b;
+ uint16_t c;
+ int16_t d;
buffer += sprintf (buffer, "%s", opcodes[i].name);
@@ -401,32 +401,32 @@ CPU_DISASSEMBLE( tms7000 )
buffer += sprintf (buffer, "%s", of[j].opstr[k]);
break;
case UI8:
- a = (UINT8)opram[pos++];
+ a = (uint8_t)opram[pos++];
buffer += sprintf(buffer, of[j].opstr[k], (unsigned int)a);
break;
case I8:
- b = (INT8)opram[pos++];
- buffer += sprintf (buffer, of[j].opstr[k], (INT8)b);
+ b = (int8_t)opram[pos++];
+ buffer += sprintf (buffer, of[j].opstr[k], (int8_t)b);
break;
case UI16:
- c = (UINT16)opram[pos++];
+ c = (uint16_t)opram[pos++];
c <<= 8;
c += opram[pos++];
buffer += sprintf (buffer, of[j].opstr[k], (unsigned int)c);
break;
case I16:
- d = (INT16)opram[pos++];
+ d = (int16_t)opram[pos++];
d <<= 8;
d += opram[pos++];
buffer += sprintf (buffer, of[j].opstr[k], (signed int)d);
break;
case PCREL:
- b = (INT8)opram[pos++];
+ b = (int8_t)opram[pos++];
sprintf(tmpbuf, "$%04X", pc+2+k+b);
buffer += sprintf (buffer, of[j].opstr[k], tmpbuf);
break;
case PCABS:
- c = (UINT16)opram[pos++];
+ c = (uint16_t)opram[pos++];
c <<= 8;
c += opram[pos++];
sprintf(tmpbuf, "$%04X", c);
diff --git a/src/devices/cpu/tms7000/tms7000.cpp b/src/devices/cpu/tms7000/tms7000.cpp
index bb3d24bf338..61943fa717f 100644
--- a/src/devices/cpu/tms7000/tms7000.cpp
+++ b/src/devices/cpu/tms7000/tms7000.cpp
@@ -105,7 +105,7 @@ ADDRESS_MAP_END
// device definitions
-tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__),
m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem)),
m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io)),
@@ -113,7 +113,7 @@ tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, d
{
}
-tms7000_device::tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, UINT32 info_flags, const char *shortname, const char *source)
+tms7000_device::tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, uint32_t info_flags, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal),
m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io)),
@@ -121,57 +121,57 @@ tms7000_device::tms7000_device(const machine_config &mconfig, device_type type,
{
}
-tms7020_device::tms7020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms7020_device::tms7020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS7020, "TMS7020", tag, owner, clock, ADDRESS_MAP_NAME(tms7020_mem), 0, "tms7020", __FILE__)
{
}
-tms7020_exl_device::tms7020_exl_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms7020_exl_device::tms7020_exl_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS7020_EXL, "TMS7020 (Exelvision)", tag, owner, clock, ADDRESS_MAP_NAME(tms7020_mem), 0, "tms7020_exl", __FILE__)
{
}
-tms7040_device::tms7040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms7040_device::tms7040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS7040, "TMS7040", tag, owner, clock, ADDRESS_MAP_NAME(tms7040_mem), 0, "tms7040", __FILE__)
{
}
-tms70c00_device::tms70c00_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms70c00_device::tms70c00_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS70C00, "TMS70C00", tag, owner, clock, ADDRESS_MAP_NAME(tms7000_mem), TMS7000_CHIP_IS_CMOS, "tms70c00", __FILE__)
{
}
-tms70c20_device::tms70c20_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms70c20_device::tms70c20_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS70C20, "TMS70C20", tag, owner, clock, ADDRESS_MAP_NAME(tms7020_mem), TMS7000_CHIP_IS_CMOS, "tms70c20", __FILE__)
{
}
-tms70c40_device::tms70c40_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms70c40_device::tms70c40_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS70C40, "TMS70C40", tag, owner, clock, ADDRESS_MAP_NAME(tms7040_mem), TMS7000_CHIP_IS_CMOS, "tms70c40", __FILE__)
{
}
-tms7001_device::tms7001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms7001_device::tms7001_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS7001, "TMS7001", tag, owner, clock, ADDRESS_MAP_NAME(tms7001_mem), TMS7000_CHIP_FAMILY_70X2, "tms7001", __FILE__)
{
}
-tms7041_device::tms7041_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms7041_device::tms7041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS7041, "TMS7041", tag, owner, clock, ADDRESS_MAP_NAME(tms7041_mem), TMS7000_CHIP_FAMILY_70X2, "tms7041", __FILE__)
{
}
-tms7002_device::tms7002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms7002_device::tms7002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS7002, "TMS7002", tag, owner, clock, ADDRESS_MAP_NAME(tms7002_mem), TMS7000_CHIP_FAMILY_70X2, "tms7002", __FILE__)
{
}
-tms7042_device::tms7042_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms7042_device::tms7042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS7042, "TMS7042", tag, owner, clock, ADDRESS_MAP_NAME(tms7042_mem), TMS7000_CHIP_FAMILY_70X2, "tms7042", __FILE__)
{
}
-tms70c46_device::tms70c46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms70c46_device::tms70c46_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms7000_device(mconfig, TMS70C46, "TMS70C46", tag, owner, clock, ADDRESS_MAP_NAME(tms70c46_mem), TMS7000_CHIP_IS_CMOS, "tms70c46", __FILE__)
{
}
@@ -267,7 +267,7 @@ void tms7000_device::state_string_export(const device_state_entry &entry, std::s
}
}
-offs_t tms7000_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms7000_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms7000 );
return CPU_DISASSEMBLE_NAME(tms7000)(this, buffer, pc, oprom, opram, options);
@@ -623,7 +623,7 @@ void tms7000_device::execute_run()
} while (m_icount > 0);
}
-void tms7000_device::execute_one(UINT8 op)
+void tms7000_device::execute_one(uint8_t op)
{
switch (op)
{
@@ -854,7 +854,7 @@ void tms7000_device::execute_one(UINT8 op)
}
}
-void tms7020_exl_device::execute_one(UINT8 op)
+void tms7020_exl_device::execute_one(uint8_t op)
{
// TMS7020 Exelvision EXL 100 custom opcode(s)
if (op == 0xd7)
diff --git a/src/devices/cpu/tms7000/tms7000.h b/src/devices/cpu/tms7000/tms7000.h
index 1097f86acad..1d7c04e024f 100644
--- a/src/devices/cpu/tms7000/tms7000.h
+++ b/src/devices/cpu/tms7000/tms7000.h
@@ -45,8 +45,8 @@ class tms7000_device : public cpu_device
{
public:
// construction/destruction
- tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, UINT32 info_flags, const char *shortname, const char *source);
+ tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, uint32_t info_flags, const char *shortname, const char *source);
DECLARE_READ8_MEMBER(tms7000_unmapped_rf_r) { if (!space.debugger_access()) logerror("'%s' (%04X): unmapped_rf_r @ $%04x\n", tag(), m_pc, offset + 0x80); return 0; };
DECLARE_WRITE8_MEMBER(tms7000_unmapped_rf_w) { logerror("'%s' (%04X): unmapped_rf_w @ $%04x = $%02x\n", tag(), m_pc, offset + 0x80, data); };
@@ -57,7 +57,7 @@ public:
DECLARE_WRITE8_MEMBER(tms7002_pf_w) { tms7000_pf_w(space, offset + 0x10, data); }
bool chip_is_cmos() { return (m_info_flags & TMS7000_CHIP_IS_CMOS) ? true : false; }
- UINT32 chip_get_family() { return m_info_flags & TMS7000_CHIP_FAMILY_MASK; }
+ uint32_t chip_get_family() { return m_info_flags & TMS7000_CHIP_FAMILY_MASK; }
bool chip_is_family_70x0() { return chip_get_family() == TMS7000_CHIP_FAMILY_70X0; }
bool chip_is_family_70x2() { return chip_get_family() == TMS7000_CHIP_FAMILY_70X2; }
bool chip_is_family_70cx2() { return chip_get_family() == TMS7000_CHIP_FAMILY_70CX2; }
@@ -68,11 +68,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; } // internal /2 divider
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); } // internal /2 divider
- virtual UINT32 execute_min_cycles() const override { return 5; }
- virtual UINT32 execute_max_cycles() const override { return 49; }
- virtual UINT32 execute_input_lines() const override { return 2; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; } // internal /2 divider
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); } // internal /2 divider
+ virtual uint32_t execute_min_cycles() const override { return 5; }
+ virtual uint32_t execute_max_cycles() const override { return 49; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int extline, int state) override;
@@ -83,16 +83,16 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
- virtual void execute_one(UINT8 op);
+ virtual void execute_one(uint8_t op);
address_space_config m_program_config;
address_space_config m_io_config;
- UINT32 m_info_flags;
+ uint32_t m_info_flags;
address_space *m_program;
direct_read_data *m_direct;
@@ -102,22 +102,22 @@ protected:
bool m_irq_state[2];
bool m_idle_state;
bool m_idle_halt;
- UINT16 m_pc;
- UINT8 m_sp;
- UINT8 m_sr;
- UINT8 m_op;
+ uint16_t m_pc;
+ uint8_t m_sp;
+ uint8_t m_sr;
+ uint8_t m_op;
- UINT8 m_io_control[3];
+ uint8_t m_io_control[3];
emu_timer *m_timer_handle[2];
- UINT8 m_timer_data[2];
- UINT8 m_timer_control[2];
+ uint8_t m_timer_data[2];
+ uint8_t m_timer_control[2];
int m_timer_decrementer[2];
int m_timer_prescaler[2];
- UINT16 m_timer_capture_latch[2];
+ uint16_t m_timer_capture_latch[2];
- UINT8 m_port_latch[4];
- UINT8 m_port_ddr[4];
+ uint8_t m_port_latch[4];
+ uint8_t m_port_ddr[4];
void flag_ext_interrupt(int extline);
void check_interrupts();
@@ -130,26 +130,26 @@ protected:
void timer_tick_low(int tmr);
// internal read/write
- inline UINT8 read_r8(UINT8 address) { return m_program->read_byte(address); }
- inline void write_r8(UINT8 address, UINT8 data) { m_program->write_byte(address, data); }
- inline UINT16 read_r16(UINT8 address) { return m_program->read_byte((address - 1) & 0xff) << 8 | m_program->read_byte(address); }
- inline void write_r16(UINT8 address, UINT16 data) { m_program->write_byte((address - 1) & 0xff, data >> 8 & 0xff); m_program->write_byte(address, data & 0xff); }
+ inline uint8_t read_r8(uint8_t address) { return m_program->read_byte(address); }
+ inline void write_r8(uint8_t address, uint8_t data) { m_program->write_byte(address, data); }
+ inline uint16_t read_r16(uint8_t address) { return m_program->read_byte((address - 1) & 0xff) << 8 | m_program->read_byte(address); }
+ inline void write_r16(uint8_t address, uint16_t data) { m_program->write_byte((address - 1) & 0xff, data >> 8 & 0xff); m_program->write_byte(address, data & 0xff); }
- inline UINT8 read_p(UINT8 address) { return m_program->read_byte(0x100 + address); }
- inline void write_p(UINT8 address, UINT8 data) { m_program->write_byte(0x100 + address, data); }
+ inline uint8_t read_p(uint8_t address) { return m_program->read_byte(0x100 + address); }
+ inline void write_p(uint8_t address, uint8_t data) { m_program->write_byte(0x100 + address, data); }
- inline UINT8 read_mem8(UINT16 address) { return m_program->read_byte(address); }
- inline void write_mem8(UINT16 address, UINT8 data) { m_program->write_byte(address, data); }
- inline UINT16 read_mem16(UINT16 address) { return m_program->read_byte(address) << 8 | m_program->read_byte((address + 1) & 0xffff); }
- inline void write_mem16(UINT16 address, UINT16 data) { m_program->write_byte(address, data >> 8 & 0xff); m_program->write_byte((address + 1) & 0xffff, data & 0xff); }
+ inline uint8_t read_mem8(uint16_t address) { return m_program->read_byte(address); }
+ inline void write_mem8(uint16_t address, uint8_t data) { m_program->write_byte(address, data); }
+ inline uint16_t read_mem16(uint16_t address) { return m_program->read_byte(address) << 8 | m_program->read_byte((address + 1) & 0xffff); }
+ inline void write_mem16(uint16_t address, uint16_t data) { m_program->write_byte(address, data >> 8 & 0xff); m_program->write_byte((address + 1) & 0xffff, data & 0xff); }
- inline UINT8 imm8() { return m_direct->read_byte(m_pc++); }
- inline UINT16 imm16() { UINT16 ret = m_direct->read_byte(m_pc++) << 8; return ret | m_direct->read_byte(m_pc++); }
+ inline uint8_t imm8() { return m_direct->read_byte(m_pc++); }
+ inline uint16_t imm16() { uint16_t ret = m_direct->read_byte(m_pc++) << 8; return ret | m_direct->read_byte(m_pc++); }
- inline UINT8 pull8() { return m_program->read_byte(m_sp--); }
- inline void push8(UINT8 data) { m_program->write_byte(++m_sp, data); }
- inline UINT16 pull16() { UINT16 ret = m_program->read_byte(m_sp--); return ret | m_program->read_byte(m_sp--) << 8; }
- inline void push16(UINT16 data) { m_program->write_byte(++m_sp, data >> 8 & 0xff); m_program->write_byte(++m_sp, data & 0xff); }
+ inline uint8_t pull8() { return m_program->read_byte(m_sp--); }
+ inline void push8(uint8_t data) { m_program->write_byte(++m_sp, data); }
+ inline uint16_t pull16() { uint16_t ret = m_program->read_byte(m_sp--); return ret | m_program->read_byte(m_sp--) << 8; }
+ inline void push16(uint16_t data) { m_program->write_byte(++m_sp, data >> 8 & 0xff); m_program->write_byte(++m_sp, data & 0xff); }
// statusreg flags
enum
@@ -199,39 +199,39 @@ protected:
void sta_inx();
void sta_ind();
void stsp();
- void trap(UINT8 address);
- void illegal(UINT8 op);
-
- typedef int (tms7000_device::*op_func)(UINT8, UINT8);
- int op_clr(UINT8 param1, UINT8 param2);
- int op_dec(UINT8 param1, UINT8 param2);
- int op_inc(UINT8 param1, UINT8 param2);
- int op_inv(UINT8 param1, UINT8 param2);
- int op_rl(UINT8 param1, UINT8 param2);
- int op_rlc(UINT8 param1, UINT8 param2);
- int op_rr(UINT8 param1, UINT8 param2);
- int op_rrc(UINT8 param1, UINT8 param2);
- int op_swap(UINT8 param1, UINT8 param2);
- int op_xchb(UINT8 param1, UINT8 param2);
-
- int op_adc(UINT8 param1, UINT8 param2);
- int op_add(UINT8 param1, UINT8 param2);
- int op_and(UINT8 param1, UINT8 param2);
- int op_cmp(UINT8 param1, UINT8 param2);
- int op_dac(UINT8 param1, UINT8 param2);
- int op_dsb(UINT8 param1, UINT8 param2);
- int op_mpy(UINT8 param1, UINT8 param2);
- int op_mov(UINT8 param1, UINT8 param2);
- int op_or(UINT8 param1, UINT8 param2);
- int op_sbb(UINT8 param1, UINT8 param2);
- int op_sub(UINT8 param1, UINT8 param2);
- int op_xor(UINT8 param1, UINT8 param2);
+ void trap(uint8_t address);
+ void illegal(uint8_t op);
+
+ typedef int (tms7000_device::*op_func)(uint8_t, uint8_t);
+ int op_clr(uint8_t param1, uint8_t param2);
+ int op_dec(uint8_t param1, uint8_t param2);
+ int op_inc(uint8_t param1, uint8_t param2);
+ int op_inv(uint8_t param1, uint8_t param2);
+ int op_rl(uint8_t param1, uint8_t param2);
+ int op_rlc(uint8_t param1, uint8_t param2);
+ int op_rr(uint8_t param1, uint8_t param2);
+ int op_rrc(uint8_t param1, uint8_t param2);
+ int op_swap(uint8_t param1, uint8_t param2);
+ int op_xchb(uint8_t param1, uint8_t param2);
+
+ int op_adc(uint8_t param1, uint8_t param2);
+ int op_add(uint8_t param1, uint8_t param2);
+ int op_and(uint8_t param1, uint8_t param2);
+ int op_cmp(uint8_t param1, uint8_t param2);
+ int op_dac(uint8_t param1, uint8_t param2);
+ int op_dsb(uint8_t param1, uint8_t param2);
+ int op_mpy(uint8_t param1, uint8_t param2);
+ int op_mov(uint8_t param1, uint8_t param2);
+ int op_or(uint8_t param1, uint8_t param2);
+ int op_sbb(uint8_t param1, uint8_t param2);
+ int op_sub(uint8_t param1, uint8_t param2);
+ int op_xor(uint8_t param1, uint8_t param2);
void shortbranch(bool check);
void jmp(bool check);
- int op_djnz(UINT8 param1, UINT8 param2);
- int op_btjo(UINT8 param1, UINT8 param2);
- int op_btjz(UINT8 param1, UINT8 param2);
+ int op_djnz(uint8_t param1, uint8_t param2);
+ int op_btjo(uint8_t param1, uint8_t param2);
+ int op_btjz(uint8_t param1, uint8_t param2);
void am_a(op_func op);
void am_b(op_func op);
@@ -259,17 +259,17 @@ protected:
class tms7020_device : public tms7000_device
{
public:
- tms7020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms7020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms7020_exl_device : public tms7000_device
{
public:
- tms7020_exl_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms7020_exl_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void execute_one(UINT8 op) override;
+ virtual void execute_one(uint8_t op) override;
private:
void lvdp();
@@ -279,35 +279,35 @@ private:
class tms7040_device : public tms7000_device
{
public:
- tms7040_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms7040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms70c00_device : public tms7000_device
{
public:
- tms70c00_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms70c00_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms70c20_device : public tms7000_device
{
public:
- tms70c20_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms70c20_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms70c40_device : public tms7000_device
{
public:
- tms70c40_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms70c40_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms70c46_device : public tms7000_device
{
public:
- tms70c46_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms70c46_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(control_r);
DECLARE_WRITE8_MEMBER(control_w);
@@ -327,35 +327,35 @@ protected:
virtual void device_reset() override;
private:
- UINT8 m_control;
+ uint8_t m_control;
};
class tms7001_device : public tms7000_device
{
public:
- tms7001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms7001_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms7041_device : public tms7000_device
{
public:
- tms7041_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms7041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms7002_device : public tms7000_device
{
public:
- tms7002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms7002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class tms7042_device : public tms7000_device
{
public:
- tms7042_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms7042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms7000/tms7000op.cpp b/src/devices/cpu/tms7000/tms7000op.cpp
index 24880caafe8..dcc2db25a44 100644
--- a/src/devices/cpu/tms7000/tms7000op.cpp
+++ b/src/devices/cpu/tms7000/tms7000op.cpp
@@ -33,7 +33,7 @@ void tms7000_device::am_b(op_func op)
void tms7000_device::am_r(op_func op)
{
m_icount -= 7;
- UINT8 r = imm8();
+ uint8_t r = imm8();
AM_WB(write_r8, r, read_r8(r), 0);
}
@@ -52,14 +52,14 @@ void tms7000_device::am_a2b(op_func op)
void tms7000_device::am_a2p(op_func op)
{
m_icount -= 10;
- UINT8 r = imm8();
+ uint8_t r = imm8();
AM_WB(write_p, r, read_p(r), read_r8(0));
}
void tms7000_device::am_a2r(op_func op)
{
m_icount -= 8;
- UINT8 r = imm8();
+ uint8_t r = imm8();
AM_WB(write_r8, r, read_r8(r), read_r8(0));
}
@@ -78,14 +78,14 @@ void tms7000_device::am_b2b(op_func op)
void tms7000_device::am_b2r(op_func op)
{
m_icount -= 7;
- UINT8 r = imm8();
+ uint8_t r = imm8();
AM_WB(write_r8, r, read_r8(r), read_r8(1));
}
void tms7000_device::am_b2p(op_func op)
{
m_icount -= 9;
- UINT8 r = imm8();
+ uint8_t r = imm8();
AM_WB(write_p, r, read_p(r), read_r8(1));
}
@@ -104,8 +104,8 @@ void tms7000_device::am_r2b(op_func op)
void tms7000_device::am_r2r(op_func op)
{
m_icount -= 10;
- UINT8 param2 = read_r8(imm8());
- UINT8 r = imm8();
+ uint8_t param2 = read_r8(imm8());
+ uint8_t r = imm8();
AM_WB(write_r8, r, read_r8(r), param2);
}
@@ -124,16 +124,16 @@ void tms7000_device::am_i2b(op_func op)
void tms7000_device::am_i2r(op_func op)
{
m_icount -= 9;
- UINT8 param2 = imm8();
- UINT8 r = imm8();
+ uint8_t param2 = imm8();
+ uint8_t r = imm8();
AM_WB(write_r8, r, read_r8(r), param2);
}
void tms7000_device::am_i2p(op_func op)
{
m_icount -= 11;
- UINT8 param2 = imm8();
- UINT8 r = imm8();
+ uint8_t param2 = imm8();
+ uint8_t r = imm8();
AM_WB(write_p, r, read_p(r), param2);
}
@@ -153,177 +153,177 @@ void tms7000_device::am_p2b(op_func op)
// common opcodes
// 1 param
-int tms7000_device::op_clr(UINT8 param1, UINT8 param2)
+int tms7000_device::op_clr(uint8_t param1, uint8_t param2)
{
- UINT8 t = 0;
+ uint8_t t = 0;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_dec(UINT8 param1, UINT8 param2)
+int tms7000_device::op_dec(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 - 1;
+ uint16_t t = param1 - 1;
SET_NZ(t);
SET_C(~t);
return t;
}
-int tms7000_device::op_inc(UINT8 param1, UINT8 param2)
+int tms7000_device::op_inc(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 + 1;
+ uint16_t t = param1 + 1;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_inv(UINT8 param1, UINT8 param2)
+int tms7000_device::op_inv(uint8_t param1, uint8_t param2)
{
- UINT8 t = ~param1;
+ uint8_t t = ~param1;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_rl(UINT8 param1, UINT8 param2)
+int tms7000_device::op_rl(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 << 1 | param1 >> 7;
+ uint16_t t = param1 << 1 | param1 >> 7;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_rlc(UINT8 param1, UINT8 param2)
+int tms7000_device::op_rlc(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 << 1 | GET_C();
+ uint16_t t = param1 << 1 | GET_C();
SET_CNZ(t);
return t;
}
-int tms7000_device::op_rr(UINT8 param1, UINT8 param2)
+int tms7000_device::op_rr(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 >> 1 | param1 << 8 | (param1 << 7 & 0x80);
+ uint16_t t = param1 >> 1 | param1 << 8 | (param1 << 7 & 0x80);
SET_CNZ(t);
return t;
}
-int tms7000_device::op_rrc(UINT8 param1, UINT8 param2)
+int tms7000_device::op_rrc(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 >> 1 | param1 << 8 | GET_C() << 7;
+ uint16_t t = param1 >> 1 | param1 << 8 | GET_C() << 7;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_swap(UINT8 param1, UINT8 param2)
+int tms7000_device::op_swap(uint8_t param1, uint8_t param2)
{
m_icount -= 3;
- UINT16 t = param1 >> 4 | param1 << 4;
+ uint16_t t = param1 >> 4 | param1 << 4;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_xchb(UINT8 param1, UINT8 param2)
+int tms7000_device::op_xchb(uint8_t param1, uint8_t param2)
{
m_icount -= 1;
- UINT8 t = read_r8(1);
+ uint8_t t = read_r8(1);
SET_CNZ(t);
write_r8(1, param1);
return t;
}
// 2 params
-int tms7000_device::op_adc(UINT8 param1, UINT8 param2)
+int tms7000_device::op_adc(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 + param2 + GET_C();
+ uint16_t t = param1 + param2 + GET_C();
SET_CNZ(t);
return t;
}
-int tms7000_device::op_add(UINT8 param1, UINT8 param2)
+int tms7000_device::op_add(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 + param2;
+ uint16_t t = param1 + param2;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_and(UINT8 param1, UINT8 param2)
+int tms7000_device::op_and(uint8_t param1, uint8_t param2)
{
- UINT8 t = param1 & param2;
+ uint8_t t = param1 & param2;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_cmp(UINT8 param1, UINT8 param2)
+int tms7000_device::op_cmp(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 - param2;
+ uint16_t t = param1 - param2;
SET_NZ(t);
SET_C(~t);
return WB_NO;
}
-int tms7000_device::op_mpy(UINT8 param1, UINT8 param2)
+int tms7000_device::op_mpy(uint8_t param1, uint8_t param2)
{
m_icount -= 39;
- UINT16 t = param1 * param2;
+ uint16_t t = param1 * param2;
SET_CNZ(t >> 8);
write_mem16(0, t); // always writes result to regs A-B
return WB_NO;
}
-int tms7000_device::op_mov(UINT8 param1, UINT8 param2)
+int tms7000_device::op_mov(uint8_t param1, uint8_t param2)
{
- UINT8 t = param2;
+ uint8_t t = param2;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_or(UINT8 param1, UINT8 param2)
+int tms7000_device::op_or(uint8_t param1, uint8_t param2)
{
- UINT8 t = param1 | param2;
+ uint8_t t = param1 | param2;
SET_CNZ(t);
return t;
}
-int tms7000_device::op_sbb(UINT8 param1, UINT8 param2)
+int tms7000_device::op_sbb(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 - param2 - (!GET_C());
+ uint16_t t = param1 - param2 - (!GET_C());
SET_NZ(t);
SET_C(~t);
return t;
}
-int tms7000_device::op_sub(UINT8 param1, UINT8 param2)
+int tms7000_device::op_sub(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 - param2;
+ uint16_t t = param1 - param2;
SET_NZ(t);
SET_C(~t);
return t;
}
-int tms7000_device::op_xor(UINT8 param1, UINT8 param2)
+int tms7000_device::op_xor(uint8_t param1, uint8_t param2)
{
- UINT8 t = param1 ^ param2;
+ uint8_t t = param1 ^ param2;
SET_CNZ(t);
return t;
}
// BCD arthrimetic handling
-static const UINT8 lut_bcd_out[6] = { 0x00, 0x06, 0x00, 0x66, 0x60, 0x66 };
+static const uint8_t lut_bcd_out[6] = { 0x00, 0x06, 0x00, 0x66, 0x60, 0x66 };
-int tms7000_device::op_dac(UINT8 param1, UINT8 param2)
+int tms7000_device::op_dac(uint8_t param1, uint8_t param2)
{
m_icount -= 2;
int c = GET_C();
- UINT8 h1 = param1 >> 4 & 0xf;
- UINT8 l1 = param1 >> 0 & 0xf;
- UINT8 h2 = param2 >> 4 & 0xf;
- UINT8 l2 = param2 >> 0 & 0xf;
+ uint8_t h1 = param1 >> 4 & 0xf;
+ uint8_t l1 = param1 >> 0 & 0xf;
+ uint8_t h2 = param2 >> 4 & 0xf;
+ uint8_t l2 = param2 >> 0 & 0xf;
// compute bcd constant
- UINT8 d = ((l1 + l2 + c) < 10) ? 0 : 1;
+ uint8_t d = ((l1 + l2 + c) < 10) ? 0 : 1;
if ((h1 + h2) == 9)
d |= 2;
else if ((h1 + h2) > 9)
d |= 4;
- UINT8 t = param1 + param2 + c + lut_bcd_out[d];
+ uint8_t t = param1 + param2 + c + lut_bcd_out[d];
SET_CNZ(t);
if (d > 2)
m_sr |= SR_C;
@@ -331,24 +331,24 @@ int tms7000_device::op_dac(UINT8 param1, UINT8 param2)
return t;
}
-int tms7000_device::op_dsb(UINT8 param1, UINT8 param2)
+int tms7000_device::op_dsb(uint8_t param1, uint8_t param2)
{
m_icount -= 2;
int c = !GET_C();
- UINT8 h1 = param1 >> 4 & 0xf;
- UINT8 l1 = param1 >> 0 & 0xf;
- UINT8 h2 = param2 >> 4 & 0xf;
- UINT8 l2 = param2 >> 0 & 0xf;
+ uint8_t h1 = param1 >> 4 & 0xf;
+ uint8_t l1 = param1 >> 0 & 0xf;
+ uint8_t h2 = param2 >> 4 & 0xf;
+ uint8_t l2 = param2 >> 0 & 0xf;
// compute bcd constant
- UINT8 d = ((l1 - c) >= l2) ? 0 : 1;
+ uint8_t d = ((l1 - c) >= l2) ? 0 : 1;
if (h1 == h2)
d |= 2;
else if (h1 < h2)
d |= 4;
- UINT8 t = param1 - param2 - c - lut_bcd_out[d];
+ uint8_t t = param1 - param2 - c - lut_bcd_out[d];
SET_CNZ(t);
if (d <= 2)
m_sr |= SR_C;
@@ -360,7 +360,7 @@ int tms7000_device::op_dsb(UINT8 param1, UINT8 param2)
void tms7000_device::shortbranch(bool check)
{
m_icount -= 2;
- INT8 d = (INT8)imm8();
+ int8_t d = (int8_t)imm8();
if (check)
{
@@ -375,24 +375,24 @@ void tms7000_device::jmp(bool check)
shortbranch(check);
}
-int tms7000_device::op_djnz(UINT8 param1, UINT8 param2)
+int tms7000_device::op_djnz(uint8_t param1, uint8_t param2)
{
- UINT16 t = param1 - 1;
+ uint16_t t = param1 - 1;
shortbranch(t != 0);
return t;
}
-int tms7000_device::op_btjo(UINT8 param1, UINT8 param2)
+int tms7000_device::op_btjo(uint8_t param1, uint8_t param2)
{
- UINT8 t = param1 & param2;
+ uint8_t t = param1 & param2;
SET_CNZ(t);
shortbranch(t != 0);
return WB_NO;
}
-int tms7000_device::op_btjz(UINT8 param1, UINT8 param2)
+int tms7000_device::op_btjz(uint8_t param1, uint8_t param2)
{
- UINT8 t = ~param1 & param2;
+ uint8_t t = ~param1 & param2;
SET_CNZ(t);
shortbranch(t != 0);
return WB_NO;
@@ -405,7 +405,7 @@ int tms7000_device::op_btjz(UINT8 param1, UINT8 param2)
void tms7000_device::decd_a()
{
m_icount -= 9;
- UINT32 t = read_r16(0) - 1;
+ uint32_t t = read_r16(0) - 1;
write_r16(0, t);
SET_NZ(t >> 8);
SET_C(~(t >> 8));
@@ -414,7 +414,7 @@ void tms7000_device::decd_a()
void tms7000_device::decd_b()
{
m_icount -= 9;
- UINT32 t = read_r16(1) - 1;
+ uint32_t t = read_r16(1) - 1;
write_r16(1, t);
SET_NZ(t >> 8);
SET_C(~(t >> 8));
@@ -423,8 +423,8 @@ void tms7000_device::decd_b()
void tms7000_device::decd_r()
{
m_icount -= 11;
- UINT8 r = imm8();
- UINT32 t = read_r16(r) - 1;
+ uint8_t r = imm8();
+ uint32_t t = read_r16(r) - 1;
write_r16(r, t);
SET_NZ(t >> 8);
SET_C(~(t >> 8));
@@ -434,7 +434,7 @@ void tms7000_device::decd_r()
void tms7000_device::cmpa_dir()
{
m_icount -= 12;
- UINT16 t = read_r8(0) - read_mem8(imm16());
+ uint16_t t = read_r8(0) - read_mem8(imm16());
SET_NZ(t);
SET_C(~t);
}
@@ -442,7 +442,7 @@ void tms7000_device::cmpa_dir()
void tms7000_device::cmpa_inx()
{
m_icount -= 14;
- UINT16 t = read_r8(0) - read_mem8(imm16() + read_r8(1));
+ uint16_t t = read_r8(0) - read_mem8(imm16() + read_r8(1));
SET_NZ(t);
SET_C(~t);
}
@@ -450,7 +450,7 @@ void tms7000_device::cmpa_inx()
void tms7000_device::cmpa_ind()
{
m_icount -= 11;
- UINT16 t = read_r8(0) - read_mem8(read_r16(imm8()));
+ uint16_t t = read_r8(0) - read_mem8(read_r16(imm8()));
SET_NZ(t);
SET_C(~t);
}
@@ -459,7 +459,7 @@ void tms7000_device::cmpa_ind()
void tms7000_device::lda_dir()
{
m_icount -= 11;
- UINT8 t = read_mem8(imm16());
+ uint8_t t = read_mem8(imm16());
write_r8(0, t);
SET_CNZ(t);
}
@@ -467,7 +467,7 @@ void tms7000_device::lda_dir()
void tms7000_device::lda_inx()
{
m_icount -= 13;
- UINT8 t = read_mem8(imm16() + read_r8(1));
+ uint8_t t = read_mem8(imm16() + read_r8(1));
write_r8(0, t);
SET_CNZ(t);
}
@@ -475,7 +475,7 @@ void tms7000_device::lda_inx()
void tms7000_device::lda_ind()
{
m_icount -= 10;
- UINT8 t = read_mem8(read_r16(imm8()));
+ uint8_t t = read_mem8(read_r16(imm8()));
write_r8(0, t);
SET_CNZ(t);
}
@@ -484,7 +484,7 @@ void tms7000_device::lda_ind()
void tms7000_device::sta_dir()
{
m_icount -= 11;
- UINT8 t = read_r8(0);
+ uint8_t t = read_r8(0);
write_mem8(imm16(), t);
SET_CNZ(t);
}
@@ -492,7 +492,7 @@ void tms7000_device::sta_dir()
void tms7000_device::sta_inx()
{
m_icount -= 13;
- UINT8 t = read_r8(0);
+ uint8_t t = read_r8(0);
write_mem8(imm16() + read_r8(1), t);
SET_CNZ(t);
}
@@ -500,7 +500,7 @@ void tms7000_device::sta_inx()
void tms7000_device::sta_ind()
{
m_icount -= 10;
- UINT8 t = read_r8(0);
+ uint8_t t = read_r8(0);
write_mem8(read_r16(imm8()), t);
SET_CNZ(t);
}
@@ -509,7 +509,7 @@ void tms7000_device::sta_ind()
void tms7000_device::movd_dir()
{
m_icount -= 15;
- UINT16 t = imm16();
+ uint16_t t = imm16();
write_r16(imm8(), t);
SET_CNZ(t >> 8);
}
@@ -517,7 +517,7 @@ void tms7000_device::movd_dir()
void tms7000_device::movd_inx()
{
m_icount -= 17;
- UINT16 t = imm16() + read_r8(1);
+ uint16_t t = imm16() + read_r8(1);
write_r16(imm8(), t);
SET_CNZ(t >> 8);
}
@@ -525,7 +525,7 @@ void tms7000_device::movd_inx()
void tms7000_device::movd_ind()
{
m_icount -= 14;
- UINT16 t = read_r16(imm8());
+ uint16_t t = read_r16(imm8());
write_r16(imm8(), t);
SET_CNZ(t >> 8);
}
@@ -553,7 +553,7 @@ void tms7000_device::br_ind()
void tms7000_device::call_dir()
{
m_icount -= 14;
- UINT16 t = imm16();
+ uint16_t t = imm16();
push16(m_pc);
m_pc = t;
}
@@ -561,7 +561,7 @@ void tms7000_device::call_dir()
void tms7000_device::call_inx()
{
m_icount -= 16;
- UINT16 t = imm16() + read_r8(1);
+ uint16_t t = imm16() + read_r8(1);
push16(m_pc);
m_pc = t;
}
@@ -569,12 +569,12 @@ void tms7000_device::call_inx()
void tms7000_device::call_ind()
{
m_icount -= 13;
- UINT16 t = read_r16(imm8());
+ uint16_t t = read_r16(imm8());
push16(m_pc);
m_pc = t;
}
-void tms7000_device::trap(UINT8 address)
+void tms7000_device::trap(uint8_t address)
{
m_icount -= 14;
push16(m_pc);
@@ -599,7 +599,7 @@ void tms7000_device::rets()
void tms7000_device::pop_a()
{
m_icount -= 6;
- UINT8 t = pull8();
+ uint8_t t = pull8();
write_r8(0, t);
SET_CNZ(t);
}
@@ -607,7 +607,7 @@ void tms7000_device::pop_a()
void tms7000_device::pop_b()
{
m_icount -= 6;
- UINT8 t = pull8();
+ uint8_t t = pull8();
write_r8(1, t);
SET_CNZ(t);
}
@@ -615,7 +615,7 @@ void tms7000_device::pop_b()
void tms7000_device::pop_r()
{
m_icount -= 8;
- UINT8 t = pull8();
+ uint8_t t = pull8();
write_r8(imm8(), t);
SET_CNZ(t);
}
@@ -631,7 +631,7 @@ void tms7000_device::pop_st()
void tms7000_device::push_a()
{
m_icount -= 6;
- UINT8 t = read_r8(0);
+ uint8_t t = read_r8(0);
push8(t);
SET_CNZ(t);
}
@@ -639,7 +639,7 @@ void tms7000_device::push_a()
void tms7000_device::push_b()
{
m_icount -= 6;
- UINT8 t = read_r8(1);
+ uint8_t t = read_r8(1);
push8(t);
SET_CNZ(t);
}
@@ -647,7 +647,7 @@ void tms7000_device::push_b()
void tms7000_device::push_r()
{
m_icount -= 8;
- UINT8 t = read_r8(imm8());
+ uint8_t t = read_r8(imm8());
push8(t);
SET_CNZ(t);
}
@@ -712,13 +712,13 @@ void tms7020_exl_device::lvdp()
m_icount -= 10; // TODO: check real timing
imm8(); // always 0x28? discarded?
read_p(0x28);
- UINT8 t = read_p(0x24);
+ uint8_t t = read_p(0x24);
write_r8(0, t);
SET_CNZ(t);
}
// illegal opcode handling
-void tms7000_device::illegal(UINT8 op)
+void tms7000_device::illegal(uint8_t op)
{
m_icount -= 5; // guessed
logerror("%s: illegal opcode $%02X @ $%04x\n", tag(), op, m_pc);
diff --git a/src/devices/cpu/tms9900/9900dasm.cpp b/src/devices/cpu/tms9900/9900dasm.cpp
index adf5affc0d6..bd4b0215d32 100644
--- a/src/devices/cpu/tms9900/9900dasm.cpp
+++ b/src/devices/cpu/tms9900/9900dasm.cpp
@@ -300,13 +300,13 @@ static const enum opcodes ops_001c_002f_s0[20]=
static int PC;
-static inline UINT16 readop_arg(const UINT8 *opram, unsigned pc)
+static inline uint16_t readop_arg(const uint8_t *opram, unsigned pc)
{
- UINT16 result = opram[PC++ - pc] << 8;
+ uint16_t result = opram[PC++ - pc] << 8;
return result | opram[PC++ - pc];
}
-static int print_arg (char *dest, int mode, int arg, const UINT8 *opram, unsigned pc)
+static int print_arg (char *dest, int mode, int arg, const uint8_t *opram, unsigned pc)
{
int base;
@@ -333,7 +333,7 @@ static int print_arg (char *dest, int mode, int arg, const UINT8 *opram, unsigne
/*****************************************************************************
* Disassemble a single command and return the number of bytes it uses.
*****************************************************************************/
-unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom, const UINT8 *opram)
+unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const uint8_t *oprom, const uint8_t *opram)
{
int OP, OP2, opc;
int sarg, darg, smode, dmode;
diff --git a/src/devices/cpu/tms9900/99xxcore.h b/src/devices/cpu/tms9900/99xxcore.h
index 827e32dc5eb..6eaef876d95 100644
--- a/src/devices/cpu/tms9900/99xxcore.h
+++ b/src/devices/cpu/tms9900/99xxcore.h
@@ -283,16 +283,16 @@ Other references can be found on spies.com:
struct tms99xx_state;
-static inline void execute(tms99xx_state *cpustate, UINT16 opcode);
+static inline void execute(tms99xx_state *cpustate, uint16_t opcode);
#if EXTERNAL_INSTRUCTION_DECODING
static void external_instruction_notify(tms99xx_state *cpustate, int ext_op_ID);
#endif
-static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode);
-static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode);
-static void contextswitch(tms99xx_state *cpustate, UINT16 addr);
+static uint16_t decipheraddr(tms99xx_state *cpustate, uint16_t opcode);
+static uint16_t decipheraddrbyte(tms99xx_state *cpustate, uint16_t opcode);
+static void contextswitch(tms99xx_state *cpustate, uint16_t addr);
#if HAS_MAPPING || HAS_PRIVILEGE
-static void contextswitchX(tms99xx_state *cpustate, UINT16 addr);
+static void contextswitchX(tms99xx_state *cpustate, uint16_t addr);
#else
#define contextswitchX(cs, addr) contextswitch(cs, addr)
#endif
@@ -420,40 +420,40 @@ a ST_MASK */
struct map_file_t
{
- UINT16 L[3], B[3]; /* actual registers */
- UINT32 limit[3], bias[3]; /* equivalent in a more convenient form */
+ uint16_t L[3], B[3]; /* actual registers */
+ uint32_t limit[3], bias[3]; /* equivalent in a more convenient form */
};
struct tms99xx_state
{
/* "actual" tms9900 registers : */
- UINT16 WP; /* Workspace pointer */
- UINT16 PC; /* Program counter */
- UINT16 STATUS; /* STatus register */
+ uint16_t WP; /* Workspace pointer */
+ uint16_t PC; /* Program counter */
+ uint16_t STATUS; /* STatus register */
/* Now, data used for emulation */
- UINT8 lastparity;
+ uint8_t lastparity;
char lds_flag, ldd_flag;
- UINT16 IR; /* Instruction register, with the currently parsed opcode */
+ uint16_t IR; /* Instruction register, with the currently parsed opcode */
- UINT8 interrupt_pending; /* true if an interrupt must be honored... */
+ uint8_t interrupt_pending; /* true if an interrupt must be honored... */
#if ! ((TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID))
- UINT8 load_state; /* nonzero if the LOAD* line is active (low) */
+ uint8_t load_state; /* nonzero if the LOAD* line is active (low) */
#endif
#if (TMS99XX_MODEL == TI990_10_ID) || (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID)
/* On tms9900, we cache the state of INTREQ* and IC0-IC3 here */
/* On tms9980/9981, we translate the state of IC0-IC2 to the equivalent state for a tms9900,
and store the result here */
- UINT8 irq_level; /* when INTREQ* is active, interrupt level on IC0-IC3 ; else always 16 */
- UINT8 irq_state; /* nonzero if the INTREQ* line is active (low) */
+ uint8_t irq_level; /* when INTREQ* is active, interrupt level on IC0-IC3 ; else always 16 */
+ uint8_t irq_state; /* nonzero if the INTREQ* line is active (low) */
/* with TMS9940, bit 0 means INT1, bit 1 decrementer, bit 2 INT2 */
#elif (TMS99XX_MODEL == TMS9995_ID)
/* tms9995 is quite different : it latches the interrupt inputs */
- UINT8 irq_level; /* We store the level of the request with the highest level here */
- UINT8 int_state; /* interrupt lines state */
- UINT8 int_latch; /* interrupt latches state */
+ uint8_t irq_level; /* We store the level of the request with the highest level here */
+ uint8_t int_state; /* interrupt lines state */
+ uint8_t int_latch; /* interrupt latches state */
#endif
/* interrupt callback */
@@ -465,60 +465,60 @@ struct tms99xx_state
address_space *io;
int icount;
- UINT8 IDLE; /* nonzero if processor is IDLE - i.e waiting for interrupt while writing
+ uint8_t IDLE; /* nonzero if processor is IDLE - i.e waiting for interrupt while writing
special data on CRU bus */
#if HAS_MAPPING
- UINT8 mapping_on; /* set by a CRU write */
+ uint8_t mapping_on; /* set by a CRU write */
map_file_t map_files[3]; /* internal mapper registers */
- UINT8 cur_map; /* equivalent to ST_MF status bit */
- UINT8 cur_src_map; /* set to 2 by LDS */
- UINT8 cur_dst_map; /* set to 2 by LDD */
+ uint8_t cur_map; /* equivalent to ST_MF status bit */
+ uint8_t cur_src_map; /* set to 2 by LDS */
+ uint8_t cur_dst_map; /* set to 2 by LDD */
#if (TMS99XX_MODEL == TI990_10_ID)
- UINT8 reset_maperr; /* reset mapper error flag line (reset flags in 945417-9701 p. 3-90) */
+ uint8_t reset_maperr; /* reset mapper error flag line (reset flags in 945417-9701 p. 3-90) */
- UINT32 mapper_address_latch; /* used to load the map file and for diagnostic purpose */
- UINT16 mapper_cru_read_register; /* read register select code for mapper cru interface */
- UINT8 diaglat; /* set when diagnostic address latch is done */
- UINT8 latch_control[3]; /* latch control */
+ uint32_t mapper_address_latch; /* used to load the map file and for diagnostic purpose */
+ uint16_t mapper_cru_read_register; /* read register select code for mapper cru interface */
+ uint8_t diaglat; /* set when diagnostic address latch is done */
+ uint8_t latch_control[3]; /* latch control */
#endif
#endif
#if (TMS99XX_MODEL == TI990_10_ID)
- UINT16 error_interrupt_register; /* one flag for each interrupt condition */
+ uint16_t error_interrupt_register; /* one flag for each interrupt condition */
ti99xx_error_interrupt_func error_interrupt_callback;
#endif
#if (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID)
- UINT8 RAM[256]; /* on-chip RAM (I know this is weird, but the internal bus is 16-bit-wide, whereas the external bus is 8-bit-wide) */
+ uint8_t RAM[256]; /* on-chip RAM (I know this is weird, but the internal bus is 16-bit-wide, whereas the external bus is 8-bit-wide) */
#endif
#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID)
/* on-chip event counter/timer*/
- UINT8 decrementer_enabled;
- UINT16 decrementer_interval;
- UINT16 decrementer_count; /* used in event counter mode*/
+ uint8_t decrementer_enabled;
+ uint16_t decrementer_interval;
+ uint16_t decrementer_count; /* used in event counter mode*/
emu_timer *timer; /* used in timer mode */
#endif
#if (TMS99XX_MODEL == TMS9995_ID)
/* additionnal registers */
- UINT16 flag; /* flag register */
- UINT8 MID_flag; /* MID flag register */
+ uint16_t flag; /* flag register */
+ uint8_t MID_flag; /* MID flag register */
/* chip config, which can be set on reset */
- UINT8 memory_wait_states_byte;
- UINT8 memory_wait_states_word;
+ uint8_t memory_wait_states_byte;
+ uint8_t memory_wait_states_word;
/* mask option (off on normal tms9995) */
- UINT8 is_mp9537;
+ uint8_t is_mp9537;
#endif
/* Some instructions (i.e. XOP, BLWP, and MID) disable interrupt recognition until another
instruction is executed : so they set this flag */
- UINT8 disable_interrupt_recognition;
+ uint8_t disable_interrupt_recognition;
/* notify the driver of changes in IDLE state */
ti99xx_idle_func idle_callback;
@@ -943,7 +943,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
}
else if (addr < 0xf0fc)
{
- return *(UINT16 *)(& cpustate->RAM[addr - 0xf000]);
+ return *(uint16_t *)(& cpustate->RAM[addr - 0xf000]);
}
else if (addr < 0xfffa)
{
@@ -964,7 +964,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
}
else
{
- return *(UINT16 *)(& cpustate->RAM[addr - 0xff00]);
+ return *(uint16_t *)(& cpustate->RAM[addr - 0xff00]);
}
}
@@ -978,7 +978,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
}
else if (addr < 0xf0fc)
{
- *(UINT16 *)(& cpustate->RAM[addr - 0xf000]) = data;
+ *(uint16_t *)(& cpustate->RAM[addr - 0xf000]) = data;
}
else if (addr < 0xfffa)
{
@@ -994,7 +994,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
}
else
{
- *(UINT16 *)(& cpustate->RAM[addr - 0xff00]) = data;
+ *(uint16_t *)(& cpustate->RAM[addr - 0xff00]) = data;
}
}
@@ -1082,15 +1082,15 @@ WRITE8_HANDLER(tms9995_internal2_w)
#define READREG(reg) readword(cpustate, (cpustate->WP+(reg)) & 0xffff)
#define WRITEREG(reg, data) writeword(cpustate, (cpustate->WP+(reg)) & 0xffff, (data))
-static inline UINT16 READREG_DEBUG(tms99xx_state *cpustate, int reg)
+static inline uint16_t READREG_DEBUG(tms99xx_state *cpustate, int reg)
{
int temp = cpustate->icount;
- UINT16 result = READREG(reg);
+ uint16_t result = READREG(reg);
cpustate->icount = temp;
return result;
}
-static inline void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
+static inline void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, uint16_t data)
{
int temp = cpustate->icount;
WRITEREG(reg, data);
@@ -1242,7 +1242,7 @@ static void set_flag1(tms99xx_state *cpustate, int val);
static void setstat(tms99xx_state *cpustate)
{
int i;
- UINT8 a;
+ uint8_t a;
cpustate->STATUS &= ~ ST_OP;
@@ -1297,7 +1297,7 @@ static void getstat(tms99xx_state *cpustate)
*/
-static const UINT16 right_shift_mask_table[17] =
+static const uint16_t right_shift_mask_table[17] =
{
0xFFFF,
0x7FFF,
@@ -1318,7 +1318,7 @@ static const UINT16 right_shift_mask_table[17] =
0x0000
};
-static const UINT16 inverted_right_shift_mask_table[17] =
+static const uint16_t inverted_right_shift_mask_table[17] =
{
0x0000,
0x8000,
@@ -1339,12 +1339,12 @@ static const UINT16 inverted_right_shift_mask_table[17] =
0xFFFF
};
-static inline UINT16 logical_right_shift(UINT16 val, int c)
+static inline uint16_t logical_right_shift(uint16_t val, int c)
{
return((val>>c) & right_shift_mask_table[c]);
}
-static inline INT16 arithmetic_right_shift(INT16 val, int c)
+static inline int16_t arithmetic_right_shift(int16_t val, int c)
{
if (val < 0)
return((val>>c) | inverted_right_shift_mask_table[c]);
@@ -1359,7 +1359,7 @@ static inline INT16 arithmetic_right_shift(INT16 val, int c)
/*
Set lae
*/
-static inline void setst_lae(tms99xx_state *cpustate, INT16 val)
+static inline void setst_lae(tms99xx_state *cpustate, int16_t val)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
@@ -1375,7 +1375,7 @@ static inline void setst_lae(tms99xx_state *cpustate, INT16 val)
/*
Set laep (BYTE)
*/
-static inline void setst_byte_laep(tms99xx_state *cpustate, INT8 val)
+static inline void setst_byte_laep(tms99xx_state *cpustate, int8_t val)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
@@ -1392,7 +1392,7 @@ static inline void setst_byte_laep(tms99xx_state *cpustate, INT8 val)
/*
For COC, CZC, and TB
*/
-static inline void setst_e(tms99xx_state *cpustate, UINT16 val, UINT16 to)
+static inline void setst_e(tms99xx_state *cpustate, uint16_t val, uint16_t to)
{
if (val == to)
cpustate->STATUS |= ST_EQ;
@@ -1403,7 +1403,7 @@ static inline void setst_e(tms99xx_state *cpustate, UINT16 val, UINT16 to)
/*
For CI, C, CB
*/
-static inline void setst_c_lae(tms99xx_state *cpustate, UINT16 to, UINT16 val)
+static inline void setst_c_lae(tms99xx_state *cpustate, uint16_t to, uint16_t val)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
@@ -1411,9 +1411,9 @@ static inline void setst_c_lae(tms99xx_state *cpustate, UINT16 to, UINT16 val)
cpustate->STATUS |= ST_EQ;
else
{
- if ( ((INT16) val) > ((INT16) to) )
+ if ( ((int16_t) val) > ((int16_t) to) )
cpustate->STATUS |= ST_AGT;
- if ( ((UINT16) val) > ((UINT16) to) )
+ if ( ((uint16_t) val) > ((uint16_t) to) )
cpustate->STATUS |= ST_LGT;
}
}
@@ -1421,10 +1421,10 @@ static inline void setst_c_lae(tms99xx_state *cpustate, UINT16 to, UINT16 val)
/*
Set laeco for add
*/
-static inline INT16 setst_add_laeco(tms99xx_state *cpustate, int a, int b)
+static inline int16_t setst_add_laeco(tms99xx_state *cpustate, int a, int b)
{
- UINT32 res;
- INT16 res2;
+ uint32_t res;
+ int16_t res2;
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
@@ -1441,7 +1441,7 @@ static inline INT16 setst_add_laeco(tms99xx_state *cpustate, int a, int b)
cpustate->STATUS |= ST_DC;
#endif
- res2 = (INT16) res;
+ res2 = (int16_t) res;
if (res2 > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
@@ -1457,10 +1457,10 @@ static inline INT16 setst_add_laeco(tms99xx_state *cpustate, int a, int b)
/*
Set laeco for subtract
*/
-static inline INT16 setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
+static inline int16_t setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
{
- UINT32 res;
- INT16 res2;
+ uint32_t res;
+ int16_t res2;
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
@@ -1477,7 +1477,7 @@ static inline INT16 setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
cpustate->STATUS |= ST_DC;
#endif
- res2 = (INT16) res;
+ res2 = (int16_t) res;
if (res2 > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
@@ -1493,10 +1493,10 @@ static inline INT16 setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
/*
Set laecop for add (BYTE)
*/
-static inline INT8 setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
+static inline int8_t setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
{
unsigned int res;
- INT8 res2;
+ int8_t res2;
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP);
@@ -1513,7 +1513,7 @@ static inline INT8 setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
cpustate->STATUS |= ST_DC;
#endif
- res2 = (INT8) res;
+ res2 = (int8_t) res;
if (res2 > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
@@ -1531,10 +1531,10 @@ static inline INT8 setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
/*
Set laecop for subtract (BYTE)
*/
-static inline INT8 setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
+static inline int8_t setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
{
unsigned int res;
- INT8 res2;
+ int8_t res2;
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP);
@@ -1551,7 +1551,7 @@ static inline INT8 setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
cpustate->STATUS |= ST_DC;
#endif
- res2 = (INT8) res;
+ res2 = (int8_t) res;
if (res2 > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
@@ -1570,7 +1570,7 @@ static inline INT8 setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
/*
For NEG
*/
-static inline void setst_laeo(tms99xx_state *cpustate, INT16 val)
+static inline void setst_laeo(tms99xx_state *cpustate, int16_t val)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_OV);
@@ -1579,7 +1579,7 @@ static inline void setst_laeo(tms99xx_state *cpustate, INT16 val)
else if (val < 0)
{
cpustate->STATUS |= ST_LGT;
- if (((UINT16) val) == 0x8000)
+ if (((uint16_t) val) == 0x8000)
cpustate->STATUS |= ST_OV;
}
else
@@ -1591,7 +1591,7 @@ static inline void setst_laeo(tms99xx_state *cpustate, INT16 val)
/*
Meat of SRA
*/
-static inline UINT16 setst_sra_laec(tms99xx_state *cpustate, INT16 a, UINT16 c)
+static inline uint16_t setst_sra_laec(tms99xx_state *cpustate, int16_t a, uint16_t c)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
@@ -1617,7 +1617,7 @@ static inline UINT16 setst_sra_laec(tms99xx_state *cpustate, INT16 a, UINT16 c)
/*
Meat of SRL. Same algorithm as SRA, except that we fills in with 0s.
*/
-static inline UINT16 setst_srl_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
+static inline uint16_t setst_srl_laec(tms99xx_state *cpustate, uint16_t a,uint16_t c)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
@@ -1629,9 +1629,9 @@ static inline UINT16 setst_srl_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
a = logical_right_shift(a, 1);
}
- if (((INT16) a) > 0)
+ if (((int16_t) a) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) a) < 0)
+ else if (((int16_t) a) < 0)
cpustate->STATUS |= ST_LGT;
else
cpustate->STATUS |= ST_EQ;
@@ -1643,7 +1643,7 @@ static inline UINT16 setst_srl_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
//
// Meat of SRC
//
-static inline UINT16 setst_src_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
+static inline uint16_t setst_src_laec(tms99xx_state *cpustate, uint16_t a,uint16_t c)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
@@ -1654,9 +1654,9 @@ static inline UINT16 setst_src_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
cpustate->STATUS |= ST_C;
}
- if (((INT16) a) > 0)
+ if (((int16_t) a) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) a) < 0)
+ else if (((int16_t) a) < 0)
cpustate->STATUS |= ST_LGT;
else
cpustate->STATUS |= ST_EQ;
@@ -1668,15 +1668,15 @@ static inline UINT16 setst_src_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
//
// Meat of SLA
//
-static inline UINT16 setst_sla_laeco(tms99xx_state *cpustate, UINT16 a, UINT16 c)
+static inline uint16_t setst_sla_laeco(tms99xx_state *cpustate, uint16_t a, uint16_t c)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
if (c != 0)
{
{
- register UINT16 mask;
- register UINT16 ousted_bits;
+ register uint16_t mask;
+ register uint16_t ousted_bits;
mask = 0xFFFF << (16-c-1);
ousted_bits = a & mask;
@@ -1693,9 +1693,9 @@ static inline UINT16 setst_sla_laeco(tms99xx_state *cpustate, UINT16 a, UINT16 c
a <<= 1;
}
- if (((INT16) a) > 0)
+ if (((int16_t) a) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) a) < 0)
+ else if (((int16_t) a) < 0)
cpustate->STATUS |= ST_LGT;
else
cpustate->STATUS |= ST_EQ;
@@ -1889,9 +1889,9 @@ static CPU_EXIT( tms99xx )
}
/* fetch : read one word at * PC, and increment PC. */
-static inline UINT16 fetch(tms99xx_state *cpustate)
+static inline uint16_t fetch(tms99xx_state *cpustate)
{
- UINT16 value = readword(cpustate, cpustate->PC);
+ uint16_t value = readword(cpustate, cpustate->PC);
cpustate->PC += 2;
return value;
}
@@ -2417,7 +2417,7 @@ static void field_interrupt(tms99xx_state *cpustate)
static CPU_DISASSEMBLE( tms99xx )
{
- extern unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom, const UINT8 *opram);
+ extern unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const uint8_t *oprom, const uint8_t *opram);
return Dasm9900(buffer, pc, TMS99XX_MODEL, oprom, opram);
}
@@ -2628,7 +2628,7 @@ static void write_single_CRU(tms99xx_state *cpustate, int port, int data)
/*
performs a normal write to CRU bus (used by SBZ, SBO, LDCR : address range 0 -> 0xFFF)
*/
-static cru_error_code writeCRU(tms99xx_state *cpustate, int CRUAddr, int Number, UINT16 Value)
+static cru_error_code writeCRU(tms99xx_state *cpustate, int CRUAddr, int Number, uint16_t Value)
{
int count;
@@ -2881,7 +2881,7 @@ static int readCRU(tms99xx_state *cpustate, int CRUAddr, int Number)
#if HAS_MAPPING
/* load a map file from memory */
-static void load_map_file(tms99xx_state *cpustate, UINT16 src_addr, int src_map_file, int dst_file)
+static void load_map_file(tms99xx_state *cpustate, uint16_t src_addr, int src_map_file, int dst_file)
{
int i;
@@ -2938,9 +2938,9 @@ static void load_map_file(tms99xx_state *cpustate, UINT16 src_addr, int src_map_
#endif
/* contextswitch : performs a BLWP, i.e. load PC, WP, and save old PC, old WP and ST... */
-static void contextswitch(tms99xx_state *cpustate, UINT16 addr)
+static void contextswitch(tms99xx_state *cpustate, uint16_t addr)
{
- UINT16 oldWP, oldpc;
+ uint16_t oldWP, oldpc;
/* save old state */
oldWP = cpustate->WP;
@@ -2963,9 +2963,9 @@ static void contextswitch(tms99xx_state *cpustate, UINT16 addr)
we enter privileged mode and select map file 0 before doing the context switch */
/* For CPU that have no privilege support, contextswitchX would behave
identically to contextswitch, so we can call contextswitch in all cases. */
-static void contextswitchX(tms99xx_state *cpustate, UINT16 addr)
+static void contextswitchX(tms99xx_state *cpustate, uint16_t addr)
{
- UINT16 oldWP, oldpc, oldST;
+ uint16_t oldWP, oldpc, oldST;
/* save old state */
oldWP = cpustate->WP;
@@ -3000,10 +3000,10 @@ static void contextswitchX(tms99xx_state *cpustate, UINT16 addr)
* NOTA : the LSBit is always ignored in word addresses,
* but we do not set it to 0 because of XOP...
*/
-static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
+static uint16_t decipheraddr(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 ts = opcode & 0x30;
- register UINT16 reg = opcode & 0xF;
+ register uint16_t ts = opcode & 0x30;
+ register uint16_t reg = opcode & 0xF;
reg += reg;
@@ -3017,7 +3017,7 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
}
else if (ts == 0x20)
{
- register UINT16 imm;
+ register uint16_t imm;
imm = fetch(cpustate);
@@ -3034,7 +3034,7 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
}
else /*if (ts == 0x30)*/
{ /* *Rx+ */
- register UINT16 response;
+ register uint16_t response;
reg += cpustate->WP; /* reg now contains effective address */
@@ -3047,10 +3047,10 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
}
/* decipheraddrbyte : compute and return the effective address in byte instructions. */
-static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
+static uint16_t decipheraddrbyte(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 ts = opcode & 0x30;
- register UINT16 reg = opcode & 0xF;
+ register uint16_t ts = opcode & 0x30;
+ register uint16_t reg = opcode & 0xF;
reg += reg;
@@ -3064,7 +3064,7 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
}
else if (ts == 0x20)
{
- register UINT16 imm;
+ register uint16_t imm;
imm = fetch(cpustate);
@@ -3081,7 +3081,7 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
}
else /*if (ts == 0x30)*/
{ /* *Rx+ */
- register UINT16 response;
+ register uint16_t response;
reg += cpustate->WP; /* reg now contains effective address */
@@ -3143,7 +3143,7 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
>0C00->0FFF (not for 990/12 and 99110)
============================================================================*/
-static void illegal(tms99xx_state *cpustate, UINT16 opcode)
+static void illegal(tms99xx_state *cpustate, uint16_t opcode)
{
HANDLE_ILLEGAL;
}
@@ -3162,7 +3162,7 @@ static void illegal(tms99xx_state *cpustate, UINT16 opcode)
---------------------------------
============================================================================*/
-static void h0000(tms99xx_state *cpustate, UINT16 opcode)
+static void h0000(tms99xx_state *cpustate, uint16_t opcode)
{
if (opcode >= 0x30)
{ /* STPC STore Program Counter */
@@ -3234,9 +3234,9 @@ static void h0000(tms99xx_state *cpustate, UINT16 opcode)
tms9989 and later : LST, LWP
============================================================================*/
-static void h0040(tms99xx_state *cpustate, UINT16 opcode)
+static void h0040(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 addr;
+ register uint16_t addr;
addr = opcode & 0xF;
addr = ((addr + addr) + cpustate->WP) & ~1;
@@ -3310,9 +3310,9 @@ static void h0040(tms99xx_state *cpustate, UINT16 opcode)
tms9989 and later : DIVS, MPYS
tms99xxx : BIND
============================================================================*/
-static void h0100(tms99xx_state *cpustate, UINT16 opcode)
+static void h0100(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 src;
+ register uint16_t src;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
#endif
@@ -3333,9 +3333,9 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
/* DIVS -- DIVide Signed */
/* R0 = (R0:R1)/S R1 = (R0:R1)%S */
{
- INT16 d = readwordX(cpustate, src, src_map);
- INT32 divq = (READREG(R0) << 16) | READREG(R1);
- INT32 q = divq/d;
+ int16_t d = readwordX(cpustate, src, src_map);
+ int32_t divq = (READREG(R0) << 16) | READREG(R1);
+ int32_t q = divq/d;
if ((q < -32768L) || (q > 32767L))
{
@@ -3358,8 +3358,8 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
/* MPYS -- MultiPlY Signed */
/* Results: R0:R1 = R0*S */
{
- INT32 prod = ((INT32) (INT16) readwordX(cpustate, src, src_map));
- prod = prod*((INT32) (INT16) READREG(R0));
+ int32_t prod = ((int32_t) (int16_t) readwordX(cpustate, src, src_map));
+ prod = prod*((int32_t) (int16_t) READREG(R0));
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
if (prod > 0)
@@ -3402,10 +3402,10 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
LI, AI, ANDI, ORI, CI, STWP, STST, LIMI, LWPI, IDLE, RSET, RTWP, CKON, CKOF, LREX
systems with memory mapper: LMF
============================================================================*/
-static void h0200(tms99xx_state *cpustate, UINT16 opcode)
+static void h0200(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 addr;
- register UINT16 value; /* used for anything */
+ register uint16_t addr;
+ register uint16_t value; /* used for anything */
addr = opcode & 0xF;
addr = ((addr + addr) + cpustate->WP) & ~1;
@@ -3754,10 +3754,10 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
BLWP, B, X, CLR, NEG, INV, INC, INCT, DEC, DECT, BL, SWPB, SETO, ABS
systems with memory mapper: LDD, LDS
============================================================================*/
-static void h0400(tms99xx_state *cpustate, UINT16 opcode)
+static void h0400(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 addr = decipheraddr(cpustate, opcode) & ~1;
- register UINT16 value; /* used for anything */
+ register uint16_t addr = decipheraddr(cpustate, opcode) & ~1;
+ register uint16_t value; /* used for anything */
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
#endif
@@ -3801,7 +3801,7 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
case 4: /* NEG */
/* NEG --- NEGate */
/* *S = -*S */
- value = - (INT16) readwordX(cpustate, addr, src_map);
+ value = - (int16_t) readwordX(cpustate, addr, src_map);
if (value)
cpustate->STATUS &= ~ ST_C;
else
@@ -3899,9 +3899,9 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
CYCLES(5, 12, Mooof!);
- if (((INT16) value) > 0)
+ if (((int16_t) value) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) value) < 0)
+ else if (((int16_t) value) < 0)
{
cpustate->STATUS |= ST_LGT;
if (value == 0x8000)
@@ -3912,7 +3912,7 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
cpustate->STATUS |= ST_DC;
#endif
- writewordX(cpustate, addr, - ((INT16) value), src_map);
+ writewordX(cpustate, addr, - ((int16_t) value), src_map);
CYCLES(0, 2, Mooof!);
}
else
@@ -3927,14 +3927,14 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
value = readwordX(cpustate, addr, src_map);
CYCLES(Mooof!, Mooof!, 3);
- if (((INT16) value) > 0)
+ if (((int16_t) value) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) value) < 0)
+ else if (((int16_t) value) < 0)
{
cpustate->STATUS |= ST_LGT;
if (value == 0x8000)
cpustate->STATUS |= ST_OV;
- value = - ((INT16) value);
+ value = - ((int16_t) value);
}
else
cpustate->STATUS |= ST_EQ;
@@ -4005,11 +4005,11 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
SRA, SRL, SLA, SRC
============================================================================*/
-static void h0800(tms99xx_state *cpustate, UINT16 opcode)
+static void h0800(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 addr;
- register UINT16 cnt = (opcode & 0xF0) >> 4;
- register UINT16 value;
+ register uint16_t addr;
+ register uint16_t cnt = (opcode & 0xF0) >> 4;
+ register uint16_t value;
addr = (opcode & 0xF);
addr = ((addr+addr) + cpustate->WP) & ~1;
@@ -4071,7 +4071,7 @@ static void h0800(tms99xx_state *cpustate, UINT16 opcode)
---------------------------------
============================================================================*/
-static void h0c00(tms99xx_state *cpustate, UINT16 opcode)
+static void h0c00(tms99xx_state *cpustate, uint16_t opcode)
{
if (opcode & 0x30)
{
@@ -4164,9 +4164,9 @@ static void h0c00(tms99xx_state *cpustate, UINT16 opcode)
---------------------------------
============================================================================*/
-static void h0c40(tms99xx_state *cpustate, UINT16 opcode)
+static void h0c40(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 src;
+ register uint16_t src;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
@@ -4234,7 +4234,7 @@ static void h0c40(tms99xx_state *cpustate, UINT16 opcode)
---------------------------------
============================================================================*/
-static void h0e00(tms99xx_state *cpustate, UINT16 opcode)
+static void h0e00(tms99xx_state *cpustate, uint16_t opcode)
{
switch ((opcode & 0x30) >> 4)
{
@@ -4267,10 +4267,10 @@ static void h0e00(tms99xx_state *cpustate, UINT16 opcode)
JMP, JLT, JLE, JEQ, JHE, JGT, JNE, JNC, JOC, JNO, JL, JH, JOP
SBO, SBZ, TB
============================================================================*/
-static void h1000(tms99xx_state *cpustate, UINT16 opcode)
+static void h1000(tms99xx_state *cpustate, uint16_t opcode)
{
/* we convert 8 bit signed word offset to a 16 bit effective word offset. */
- register INT16 offset = ((INT8) opcode);
+ register int16_t offset = ((int8_t) opcode);
switch ((opcode & 0xF00) >> 8)
@@ -4408,7 +4408,7 @@ static void h1000(tms99xx_state *cpustate, UINT16 opcode)
{
/* Let's set ST_OP. */
int i;
- UINT8 a;
+ uint8_t a;
a = cpustate->lastparity;
i = 0;
@@ -4498,11 +4498,11 @@ tms9940 : DCA, DCS, LIIM
==========================================================================*/
/* xop, ldcr and stcr are handled elsewhere */
-static void h2000(tms99xx_state *cpustate, UINT16 opcode)
+static void h2000(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 dest = (opcode & 0x3C0) >> 6;
- register UINT16 src;
- register UINT16 value;
+ register uint16_t dest = (opcode & 0x3C0) >> 6;
+ register uint16_t src;
+ register uint16_t value;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
@@ -4556,8 +4556,8 @@ static void h2000(tms99xx_state *cpustate, UINT16 opcode)
/* DIV --- DIVide (unsigned) */
/* D = D/S D+1 = D%S */
{
- UINT16 d = readwordX(cpustate, src, src_map);
- UINT16 hi = readword(cpustate, dest);
+ uint16_t d = readwordX(cpustate, src, src_map);
+ uint16_t hi = readword(cpustate, dest);
unsigned long divq = (((unsigned long) hi) << 16) | readword(cpustate, (dest+2)&0xffff);
if (d <= hi)
@@ -4580,7 +4580,7 @@ static void h2000(tms99xx_state *cpustate, UINT16 opcode)
}
}
-static void xop(tms99xx_state *cpustate, UINT16 opcode)
+static void xop(tms99xx_state *cpustate, uint16_t opcode)
{ /* XOP */
/* XOP --- eXtended OPeration */
/* WP = *(40h+D), PC = *(42h+D) */
@@ -4588,8 +4588,8 @@ static void xop(tms99xx_state *cpustate, UINT16 opcode)
/* New R11=S */
/* Xop bit set */
- register UINT16 immediate = (opcode & 0x3C0) >> 6;
- register UINT16 operand;
+ register uint16_t immediate = (opcode & 0x3C0) >> 6;
+ register uint16_t operand;
#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
@@ -4685,10 +4685,10 @@ static void xop(tms99xx_state *cpustate, UINT16 opcode)
}
/* LDCR and STCR */
-static void ldcr_stcr(tms99xx_state *cpustate, UINT16 opcode)
+static void ldcr_stcr(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 cnt = (opcode & 0x3C0) >> 6;
- register UINT16 addr;
+ register uint16_t cnt = (opcode & 0x3C0) >> 6;
+ register uint16_t addr;
int value;
#if HAS_MAPPING
@@ -4829,11 +4829,11 @@ static void ldcr_stcr(tms99xx_state *cpustate, UINT16 opcode)
============================================================================*/
/* word instructions */
-static void h4000w(tms99xx_state *cpustate, UINT16 opcode)
+static void h4000w(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 src;
- register UINT16 dest;
- register UINT16 value;
+ register uint16_t src;
+ register uint16_t dest;
+ register uint16_t value;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
@@ -4898,11 +4898,11 @@ static void h4000w(tms99xx_state *cpustate, UINT16 opcode)
}
/* byte instruction */
-static void h4000b(tms99xx_state *cpustate, UINT16 opcode)
+static void h4000b(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 src;
- register UINT16 dest;
- register UINT16 value;
+ register uint16_t src;
+ register uint16_t dest;
+ register uint16_t value;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
@@ -4971,13 +4971,13 @@ static void h4000b(tms99xx_state *cpustate, UINT16 opcode)
}
-static inline void execute(tms99xx_state *cpustate, UINT16 opcode)
+static inline void execute(tms99xx_state *cpustate, uint16_t opcode)
{
#if (! HAS_9995_OPCODES)
/* tms9900-like instruction set*/
- static void (*const jumptable_short[128])(tms99xx_state *,UINT16) =
+ static void (*const jumptable_short[128])(tms99xx_state *,uint16_t) =
{
&illegal,&h0200,&h0400,&h0400,&h0800,&h0800,&illegal,&illegal,
&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,
@@ -5004,7 +5004,7 @@ static inline void execute(tms99xx_state *cpustate, UINT16 opcode)
/* tms9989 and tms9995 include 4 extra instructions, and one additionnal instruction type */
/* tms99000 includes yet another additional instruction */
- static void (*const jumptable_long[256])(tms99xx_state *,UINT16) =
+ static void (*const jumptable_long[256])(tms99xx_state *,uint16_t) =
{
&h0040,&h0100,&h0200,&h0200,&h0400,&h0400,&h0400,&h0400,
&h0800,&h0800,&h0800,&h0800,&illegal,&illegal,&illegal,&illegal,
@@ -5131,7 +5131,7 @@ static CPU_SET_INFO( tms99xx )
* Generic get_info
**************************************************************************/
-void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
+void TMS99XX_GET_INFO(legacy_cpu_device *device, uint32_t state, cpuinfo *info)
{
tms99xx_state *cpustate = (device != nullptr && device->token() != nullptr) ? get_safe_token(device) : nullptr;
switch (state)
diff --git a/src/devices/cpu/tms9900/ti990_10.cpp b/src/devices/cpu/tms9900/ti990_10.cpp
index 01c2c57a87d..6465ecf8475 100644
--- a/src/devices/cpu/tms9900/ti990_10.cpp
+++ b/src/devices/cpu/tms9900/ti990_10.cpp
@@ -41,7 +41,7 @@
twice their number. Accordingly, the TMS9900 has a CRU bitmask 0x0fff.
****************************************************************************/
-ti990_10_device::ti990_10_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ti990_10_device::ti990_10_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TI990_10, "TI990/10 CPU", tag, owner, clock, "ti990_10_cpu", __FILE__),
m_program_config("program", ENDIANNESS_BIG, 16, 21),
m_io_config("cru", ENDIANNESS_BIG, 8, 12),
@@ -112,35 +112,35 @@ void ti990_10_device::execute_set_input(int irqline, int state)
// ==========================================================================
-UINT32 ti990_10_device::execute_min_cycles() const
+uint32_t ti990_10_device::execute_min_cycles() const
{
return 2;
}
// TODO: Compute this value, just a wild guess for the average
-UINT32 ti990_10_device::execute_max_cycles() const
+uint32_t ti990_10_device::execute_max_cycles() const
{
return 10;
}
-UINT32 ti990_10_device::execute_input_lines() const
+uint32_t ti990_10_device::execute_input_lines() const
{
return 2;
}
// device_disasm_interface overrides
-UINT32 ti990_10_device::disasm_min_opcode_bytes() const
+uint32_t ti990_10_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 ti990_10_device::disasm_max_opcode_bytes() const
+uint32_t ti990_10_device::disasm_max_opcode_bytes() const
{
return 6;
}
// TODO: check 9900dasm
-offs_t ti990_10_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ti990_10_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms9900 );
return CPU_DISASSEMBLE_NAME(tms9900)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms9900/ti990_10.h b/src/devices/cpu/tms9900/ti990_10.h
index 4fa8da2b43f..763e64ea00f 100644
--- a/src/devices/cpu/tms9900/ti990_10.h
+++ b/src/devices/cpu/tms9900/ti990_10.h
@@ -15,7 +15,7 @@
class ti990_10_device : public cpu_device
{
public:
- ti990_10_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ti990_10_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
~ti990_10_device();
protected:
@@ -25,16 +25,16 @@ protected:
void device_reset() override;
// device_execute_interface overrides
- UINT32 execute_min_cycles() const override;
- UINT32 execute_max_cycles() const override;
- UINT32 execute_input_lines() const override;
+ uint32_t execute_min_cycles() const override;
+ uint32_t execute_max_cycles() const override;
+ uint32_t execute_input_lines() const override;
void execute_set_input(int irqline, int state) override;
void execute_run() override;
// device_disasm_interface overrides
- UINT32 disasm_min_opcode_bytes() const override;
- UINT32 disasm_max_opcode_bytes() const override;
- offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ uint32_t disasm_min_opcode_bytes() const override;
+ uint32_t disasm_max_opcode_bytes() const override;
+ offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
const address_space_config* memory_space_config(address_spacenum spacenum) const override;
@@ -47,12 +47,12 @@ protected:
int m_icount;
// Hardware registers
- UINT16 WP; // Workspace pointer
- UINT16 PC; // Program counter
- UINT16 ST; // Status register
+ uint16_t WP; // Workspace pointer
+ uint16_t PC; // Program counter
+ uint16_t ST; // Status register
private:
- UINT16 m_state_any;
+ uint16_t m_state_any;
};
// device type definition
diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp
index 1962cc897f5..a189d2e0a94 100644
--- a/src/devices/cpu/tms9900/tms9900.cpp
+++ b/src/devices/cpu/tms9900/tms9900.cpp
@@ -170,7 +170,7 @@ enum
twice their number. Accordingly, the TMS9900 has a CRU bitmask 0x0fff.
****************************************************************************/
-tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, int databus_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, int databus_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, databus_width, prg_addr_bits),
m_io_config("cru", ENDIANNESS_BIG, 8, cru_addr_bits),
@@ -198,7 +198,7 @@ tms99xx_device::~tms99xx_device()
Constructor for TMS9900
****************************************************************************/
-tms9900_device::tms9900_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms9900_device::tms9900_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms99xx_device(mconfig, TMS9900, "TMS9900", tag, 16, 16, 12, owner, clock, "tms9900", __FILE__)
{
}
@@ -340,21 +340,21 @@ void tms99xx_device::state_import(const device_state_entry &entry)
// bits of the STATUS register
break;
case TMS9900_PC:
- PC = (UINT16)(m_state_any & m_prgaddr_mask & 0xfffe);
+ PC = (uint16_t)(m_state_any & m_prgaddr_mask & 0xfffe);
break;
case TMS9900_WP:
- WP = (UINT16)(m_state_any & m_prgaddr_mask & 0xfffe);
+ WP = (uint16_t)(m_state_any & m_prgaddr_mask & 0xfffe);
break;
case TMS9900_STATUS:
- ST = (UINT16)m_state_any;
+ ST = (uint16_t)m_state_any;
break;
case TMS9900_IR:
- IR = (UINT16)m_state_any;
+ IR = (uint16_t)m_state_any;
break;
default:
// Workspace registers
if (index <= TMS9900_R15)
- write_workspace_register_debug(index-TMS9900_R0, (UINT16)m_state_any);
+ write_workspace_register_debug(index-TMS9900_R0, (uint16_t)m_state_any);
break;
}
}
@@ -398,7 +398,7 @@ void tms99xx_device::state_string_export(const device_state_entry &entry, std::s
static const char *statestr = "LAECOPX-----IIII";
char flags[17];
for (auto &flag : flags) flag = 0x00;
- UINT16 val = 0x8000;
+ uint16_t val = 0x8000;
if (entry.index()==STATE_GENFLAGS)
{
for (int i=0; i < 16; i++)
@@ -412,17 +412,17 @@ void tms99xx_device::state_string_export(const device_state_entry &entry, std::s
/**************************************************************************/
-UINT16 tms99xx_device::read_workspace_register_debug(int reg)
+uint16_t tms99xx_device::read_workspace_register_debug(int reg)
{
int temp = m_icount;
m_prgspace->set_debugger_access(true);
- UINT16 value = m_prgspace->read_word((WP+(reg<<1)) & m_prgaddr_mask & 0xfffe);
+ uint16_t value = m_prgspace->read_word((WP+(reg<<1)) & m_prgaddr_mask & 0xfffe);
m_prgspace->set_debugger_access(false);
m_icount = temp;
return value;
}
-void tms99xx_device::write_workspace_register_debug(int reg, UINT16 data)
+void tms99xx_device::write_workspace_register_debug(int reg, uint16_t data)
{
int temp = m_icount;
m_prgspace->set_debugger_access(true);
@@ -457,7 +457,7 @@ const address_space_config *tms99xx_device::memory_space_config(address_spacenum
/*
Define the indices for the micro-operation table. This is done for the sake
- of a simpler microprogram definition as an UINT8[].
+ of a simpler microprogram definition as an uint8_t[].
*/
enum
{
@@ -513,7 +513,7 @@ enum
#define MICROPROGRAM(_MP) \
- static const UINT8 _MP[] =
+ static const uint8_t _MP[] =
/*
This is a kind of subroutine with 6 variants. Might be done in countless
@@ -1087,7 +1087,7 @@ void tms99xx_device::build_command_lookup_table()
int cmdindex;
int bitcount;
const tms_instruction *inst;
- UINT16 opcode;
+ uint16_t opcode;
m_command_lookup_table = std::make_unique<lookup_entry[]>(16);
@@ -1225,10 +1225,10 @@ void tms99xx_device::execute_run()
}
else
{
- const UINT8* program = nullptr;
+ const uint8_t* program = nullptr;
// When we are in the data derivation sequence, the caller_index is set
if (m_program_index != NOPRG)
- program = (m_caller_index == NOPRG)? (UINT8*)s_command[m_program_index].prog : data_derivation;
+ program = (m_caller_index == NOPRG)? (uint8_t*)s_command[m_program_index].prog : data_derivation;
// Handle HOLD
// A HOLD request is signalled through the input line HOLD.
@@ -1260,7 +1260,7 @@ void tms99xx_device::execute_run()
set_wait_state(false);
m_check_ready = false;
// If we don't have a microprogram, acquire the next instruction
- UINT8 op = (m_program_index==NOPRG)? IAQ : program[MPC];
+ uint8_t op = (m_program_index==NOPRG)? IAQ : program[MPC];
if (TRACE_MICRO) logerror("MPC = %d, op = %d\n", MPC, op);
// Call the operation of the microprogram
@@ -1441,11 +1441,11 @@ inline void tms99xx_device::set_wait_state(bool state)
Acquire the next word as an instruction. The program counter advances by
one word.
*/
-void tms99xx_device::decode(UINT16 inst)
+void tms99xx_device::decode(uint16_t inst)
{
int ix = 0;
lookup_entry* table = m_command_lookup_table.get();
- UINT16 opcode = inst;
+ uint16_t opcode = inst;
bool complete = false;
m_state = 0;
@@ -1592,7 +1592,7 @@ void tms99xx_device::register_read()
void tms99xx_device::register_write()
{
// This will be called twice; m_pass is set by the embedded mem_write
- UINT16 addr_save = m_address;
+ uint16_t addr_save = m_address;
m_address = (WP + (m_regnumber<<1)) & m_prgaddr_mask & 0xfffe;
mem_write();
m_address = addr_save;
@@ -1711,7 +1711,7 @@ void tms99xx_device::command_completed()
*/
void tms99xx_device::data_derivation_subprogram()
{
- UINT16 ircopy = IR;
+ uint16_t ircopy = IR;
// Save the return program and position
m_caller_index = m_program_index;
@@ -1744,7 +1744,7 @@ inline void tms99xx_device::set_status_bit(int bit, bool state)
else ST &= ~bit;
}
-void tms99xx_device::set_status_parity(UINT8 value)
+void tms99xx_device::set_status_parity(uint8_t value)
{
int count = 0;
for (int i=0; i < 8; i++)
@@ -1755,11 +1755,11 @@ void tms99xx_device::set_status_parity(UINT8 value)
set_status_bit(ST_OP, (count & 1)!=0);
}
-inline void tms99xx_device::compare_and_set_lae(UINT16 value1, UINT16 value2)
+inline void tms99xx_device::compare_and_set_lae(uint16_t value1, uint16_t value2)
{
set_status_bit(ST_EQ, value1 == value2);
set_status_bit(ST_LH, value1 > value2);
- set_status_bit(ST_AGT, (INT16)value1 > (INT16)value2);
+ set_status_bit(ST_AGT, (int16_t)value1 > (int16_t)value2);
if (TRACE_STATUS) logerror("ST = %04x (val1=%04x, val2=%04x)\n", ST, value1, value2);
}
@@ -1843,10 +1843,10 @@ void tms99xx_device::alu_reg()
void tms99xx_device::alu_f1()
{
- UINT32 dest_new = 0;
+ uint32_t dest_new = 0;
// Save the destination value
- UINT16 prev_dest_value = m_current_value;
+ uint16_t prev_dest_value = m_current_value;
m_destination_even = ((m_address & 1)==0); // this is the destination address; the source address has already been saved
bool byteop = byte_operation();
@@ -1934,7 +1934,7 @@ void tms99xx_device::alu_f1()
if (byteop)
{
- set_status_parity((UINT8)(dest_new>>8));
+ set_status_parity((uint8_t)(dest_new>>8));
// destnew is the new value to be written (high byte); needs to be
// merged with the existing word
@@ -1942,12 +1942,12 @@ void tms99xx_device::alu_f1()
m_current_value = (prev_dest_value & 0x00ff) | (dest_new & 0xff00);
else
m_current_value = (prev_dest_value & 0xff00) | ((dest_new >> 8) & 0x00ff);
- compare_and_set_lae((UINT16)(dest_new & 0xff00), 0);
+ compare_and_set_lae((uint16_t)(dest_new & 0xff00), 0);
}
else
{
- m_current_value = (UINT16)(dest_new & 0xffff);
- compare_and_set_lae((UINT16)(dest_new & 0xffff), 0);
+ m_current_value = (uint16_t)(dest_new & 0xffff);
+ compare_and_set_lae((uint16_t)(dest_new & 0xffff), 0);
}
pulse_clock(2);
@@ -1960,7 +1960,7 @@ void tms99xx_device::alu_comp()
{
if (!m_destination_even) m_current_value <<= 8;
if (!m_source_even) m_source_value <<= 8;
- set_status_parity((UINT8)(m_source_value>>8));
+ set_status_parity((uint8_t)(m_source_value>>8));
compare_and_set_lae(m_source_value & 0xff00, m_current_value & 0xff00);
}
else
@@ -2007,7 +2007,7 @@ void tms99xx_device::alu_f3()
void tms99xx_device::alu_multiply()
{
- UINT32 result;
+ uint32_t result;
switch (m_state)
{
@@ -2034,9 +2034,9 @@ void tms99xx_device::alu_multiply()
void tms99xx_device::alu_divide()
{
// Format is DIV Divisor,REG(dividend)
- UINT32 uval32;
+ uint32_t uval32;
bool overflow = true;
- UINT16 value1;
+ uint16_t value1;
switch (m_state)
{
@@ -2148,9 +2148,9 @@ void tms99xx_device::alu_xop()
void tms99xx_device::alu_clr_swpb()
{
- UINT32 dest_new = 0;
- UINT32 src_val = m_current_value & 0x0000ffff;
- UINT16 sign = 0;
+ uint32_t dest_new = 0;
+ uint32_t src_val = m_current_value & 0x0000ffff;
+ uint16_t sign = 0;
bool setstatus = true;
bool check_ov = true;
@@ -2302,7 +2302,7 @@ void tms99xx_device::alu_blwp()
void tms99xx_device::alu_ldcr()
{
- UINT16 value;
+ uint16_t value;
// Spec: "If the source operand address is odd, the address is truncated
// to an even address prior to data transfer."
@@ -2326,7 +2326,7 @@ void tms99xx_device::alu_ldcr()
if (m_count <= 8)
{
if (m_source_even) value>>=8;
- set_status_parity((UINT8)(value & 0xff));
+ set_status_parity((uint8_t)(value & 0xff));
compare_and_set_lae(value<<8, 0);
}
else
@@ -2343,7 +2343,7 @@ void tms99xx_device::alu_ldcr()
void tms99xx_device::alu_stcr()
{
- UINT16 value;
+ uint16_t value;
int n = 2;
// For STCR transfers with more than 8 bits, the first CRU bit is
// always put into the least significant bit of the destination word.
@@ -2368,7 +2368,7 @@ void tms99xx_device::alu_stcr()
if (m_count < 9)
{
if (TRACE_CRU) logerror("Store CRU at %04x (%d bits) in %04x, result = %02x\n", m_cru_address, m_count, m_source_address, value);
- set_status_parity((UINT8)(value & 0xff));
+ set_status_parity((uint8_t)(value & 0xff));
compare_and_set_lae(value<<8, 0);
if (m_source_even)
m_current_value = (m_source_value & 0x00ff) | (value<<8);
@@ -2394,7 +2394,7 @@ void tms99xx_device::alu_stcr()
void tms99xx_device::alu_sbz_sbo()
{
- INT8 displacement;
+ int8_t displacement;
if (m_state==0)
{
m_address = WP + 24;
@@ -2402,7 +2402,7 @@ void tms99xx_device::alu_sbz_sbo()
else
{
m_value = (m_command==SBO)? 1 : 0;
- displacement = (INT8)(IR & 0xff);
+ displacement = (int8_t)(IR & 0xff);
m_cru_address = m_current_value + (displacement<<1);
m_count = 1;
}
@@ -2412,14 +2412,14 @@ void tms99xx_device::alu_sbz_sbo()
void tms99xx_device::alu_tb()
{
- INT8 displacement;
+ int8_t displacement;
switch (m_state)
{
case 0:
m_address = WP + 24;
break;
case 1:
- displacement = (INT8)(IR & 0xff);
+ displacement = (int8_t)(IR & 0xff);
m_cru_address = m_current_value + (displacement<<1);
m_count = 1;
break;
@@ -2434,7 +2434,7 @@ void tms99xx_device::alu_tb()
void tms99xx_device::alu_jmp()
{
- INT8 displacement;
+ int8_t displacement;
bool cond = false;
if (m_state==0)
@@ -2502,8 +2502,8 @@ void tms99xx_device::alu_shift()
{
bool carry = false;
bool overflow = false;
- UINT16 sign = 0;
- UINT32 value;
+ uint16_t sign = 0;
+ uint32_t value;
int count;
switch (m_state)
@@ -2585,7 +2585,7 @@ void tms99xx_device::alu_shift()
void tms99xx_device::alu_ai_ori()
{
- UINT32 dest_new = 0;
+ uint32_t dest_new = 0;
switch (m_command)
{
case AI:
@@ -2734,18 +2734,18 @@ void tms99xx_device::alu_int()
}
/**************************************************************************/
-UINT32 tms99xx_device::execute_min_cycles() const
+uint32_t tms99xx_device::execute_min_cycles() const
{
return 2;
}
// TODO: Compute this value, just a wild guess for the average
-UINT32 tms99xx_device::execute_max_cycles() const
+uint32_t tms99xx_device::execute_max_cycles() const
{
return 10;
}
-UINT32 tms99xx_device::execute_input_lines() const
+uint32_t tms99xx_device::execute_input_lines() const
{
return 2;
}
@@ -2755,17 +2755,17 @@ UINT32 tms99xx_device::execute_input_lines() const
// execute_burn = nop
// device_disasm_interface overrides
-UINT32 tms99xx_device::disasm_min_opcode_bytes() const
+uint32_t tms99xx_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 tms99xx_device::disasm_max_opcode_bytes() const
+uint32_t tms99xx_device::disasm_max_opcode_bytes() const
{
return 6;
}
-offs_t tms99xx_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms99xx_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms9900 );
return CPU_DISASSEMBLE_NAME(tms9900)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms9900/tms9900.h b/src/devices/cpu/tms9900/tms9900.h
index 1104a29e4d4..1d4c54b6e17 100644
--- a/src/devices/cpu/tms9900/tms9900.h
+++ b/src/devices/cpu/tms9900/tms9900.h
@@ -44,7 +44,7 @@ class tms99xx_device : public cpu_device
public:
tms99xx_device(const machine_config &mconfig, device_type type, const char *name,
const char *tag, int databus_width, int prg_addr_bits, int cru_addr_bits,
- device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ device_t *owner, uint32_t clock, const char *shortname, const char *source);
~tms99xx_device();
@@ -74,16 +74,16 @@ protected:
virtual void resolve_lines();
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_set_input(int irqline, int state) override;
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
const address_space_config* memory_space_config(address_spacenum spacenum) const override;
@@ -91,35 +91,35 @@ protected:
virtual void mem_read(void);
virtual void mem_write(void);
virtual void acquire_instruction(void);
- void decode(UINT16 inst);
+ void decode(uint16_t inst);
const address_space_config m_program_config;
const address_space_config m_io_config;
address_space* m_prgspace;
address_space* m_cru;
- virtual UINT16 read_workspace_register_debug(int reg);
- virtual void write_workspace_register_debug(int reg, UINT16 data);
+ virtual uint16_t read_workspace_register_debug(int reg);
+ virtual void write_workspace_register_debug(int reg, uint16_t data);
// Cycle counter
int m_icount;
// TMS9900 hardware registers
- UINT16 WP; // Workspace pointer
- UINT16 PC; // Program counter
- UINT16 ST; // Status register
+ uint16_t WP; // Workspace pointer
+ uint16_t PC; // Program counter
+ uint16_t ST; // Status register
// Internal register
- UINT16 IR; // Instruction register
+ uint16_t IR; // Instruction register
// Stored address
- UINT16 m_address;
+ uint16_t m_address;
// Stores the recently read word or the word to be written
- UINT16 m_current_value;
+ uint16_t m_current_value;
// Decoded command
- UINT16 m_command;
+ uint16_t m_command;
// Is it a byte operation? Only format 1 commands with the byte flag set
// and CRU commands with less than 9 bits to transfer are byte operations.
@@ -140,8 +140,8 @@ protected:
int m_mem_phase;
// Max address
- const UINT16 m_prgaddr_mask;
- const UINT16 m_cruaddr_mask;
+ const uint16_t m_prgaddr_mask;
+ const uint16_t m_cruaddr_mask;
bool m_load_state;
bool m_irq_state;
@@ -219,7 +219,7 @@ private:
bool m_hold_state;
// State / debug management
- UINT16 m_state_any;
+ uint16_t m_state_any;
static const char* s_statename[];
virtual void state_import(const device_state_entry &entry) override;
virtual void state_export(const device_state_entry &entry) override;
@@ -234,7 +234,7 @@ private:
void build_command_lookup_table();
// Sequence of micro-operations
- typedef const UINT8* microprogram;
+ typedef const uint8_t* microprogram;
// Method pointer
typedef void (tms99xx_device::*ophandler)(void);
@@ -242,7 +242,7 @@ private:
// Opcode list entry
struct tms_instruction
{
- UINT16 opcode;
+ uint16_t opcode;
int id;
int format;
microprogram prog; // Microprogram
@@ -347,39 +347,39 @@ private:
bool m_destination_even;
// Intermediate storage for the source operand
- UINT16 m_source_address;
- UINT16 m_source_value;
- UINT16 m_address_saved;
+ uint16_t m_source_address;
+ uint16_t m_source_value;
+ uint16_t m_address_saved;
// Another copy of the address
- UINT16 m_address_copy;
+ uint16_t m_address_copy;
// Stores the recently read register contents
- UINT16 m_register_contents;
+ uint16_t m_register_contents;
// Stores the register number for the next register access
int m_regnumber;
// CRU support: Stores the CRU address
- UINT16 m_cru_address;
+ uint16_t m_cru_address;
// CRU support: Stores the number of bits to be transferred
int m_count;
// Copy of the value
- UINT16 m_value_copy;
+ uint16_t m_value_copy;
// Another internal register, storing intermediate values
// Using 32 bits to support MPY
- UINT32 m_value;
+ uint32_t m_value;
// For two-argument commands. Indicates whether this is the second operand.
bool m_get_destination;
// Status register update
inline void set_status_bit(int bit, bool state);
- inline void compare_and_set_lae(UINT16 value1, UINT16 value2);
- void set_status_parity(UINT8 value);
+ inline void compare_and_set_lae(uint16_t value1, uint16_t value2);
+ void set_status_parity(uint8_t value);
};
/*****************************************************************************/
@@ -387,7 +387,7 @@ private:
class tms9900_device : public tms99xx_device
{
public:
- tms9900_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms9900_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms9900/tms9980a.cpp b/src/devices/cpu/tms9900/tms9980a.cpp
index 054a293a403..5cb028e543a 100644
--- a/src/devices/cpu/tms9900/tms9980a.cpp
+++ b/src/devices/cpu/tms9900/tms9980a.cpp
@@ -74,7 +74,7 @@
Constructor
****************************************************************************/
-tms9980a_device::tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms9980a_device::tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms99xx_device(mconfig, TMS9980A, "TMS9980A", tag, 8, 14, 11, owner, clock, "tms9980a", __FILE__)
{
}
@@ -92,16 +92,16 @@ void tms9980a_device::resolve_lines()
m_dbin_line.resolve();
}
-UINT16 tms9980a_device::read_workspace_register_debug(int reg)
+uint16_t tms9980a_device::read_workspace_register_debug(int reg)
{
int temp = m_icount;
int addr = (WP+(reg<<1)) & 0xfffe & m_prgaddr_mask;
- UINT16 value = (m_prgspace->read_byte(addr) << 8) | (m_prgspace->read_byte(addr+1) & 0xff);
+ uint16_t value = (m_prgspace->read_byte(addr) << 8) | (m_prgspace->read_byte(addr+1) & 0xff);
m_icount = temp;
return value;
}
-void tms9980a_device::write_workspace_register_debug(int reg, UINT16 data)
+void tms9980a_device::write_workspace_register_debug(int reg, uint16_t data)
{
int temp = m_icount;
int addr = (WP+(reg<<1)) & 0xfffe & m_prgaddr_mask;
@@ -175,7 +175,7 @@ void tms9980a_device::execute_set_input(int irqline, int state)
*/
void tms9980a_device::mem_read()
{
- UINT8 value;
+ uint8_t value;
switch (m_mem_phase)
{
case 1:
@@ -260,18 +260,18 @@ void tms9980a_device::acquire_instruction()
/**************************************************************************/
-UINT32 tms9980a_device::execute_min_cycles() const
+uint32_t tms9980a_device::execute_min_cycles() const
{
return 2;
}
// TODO: Compute this value, just a wild guess for the average
-UINT32 tms9980a_device::execute_max_cycles() const
+uint32_t tms9980a_device::execute_max_cycles() const
{
return 10;
}
-UINT32 tms9980a_device::execute_input_lines() const
+uint32_t tms9980a_device::execute_input_lines() const
{
return 8;
}
@@ -281,17 +281,17 @@ UINT32 tms9980a_device::execute_input_lines() const
// execute_burn = nop
// device_disasm_interface overrides
-UINT32 tms9980a_device::disasm_min_opcode_bytes() const
+uint32_t tms9980a_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 tms9980a_device::disasm_max_opcode_bytes() const
+uint32_t tms9980a_device::disasm_max_opcode_bytes() const
{
return 6;
}
-offs_t tms9980a_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms9980a_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms9980 );
return CPU_DISASSEMBLE_NAME(tms9980)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms9900/tms9980a.h b/src/devices/cpu/tms9900/tms9980a.h
index d32c79dc9ca..3f295b73749 100644
--- a/src/devices/cpu/tms9900/tms9980a.h
+++ b/src/devices/cpu/tms9900/tms9980a.h
@@ -26,7 +26,7 @@ enum
class tms9980a_device : public tms99xx_device
{
public:
- tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
void mem_read(void) override;
@@ -35,17 +35,17 @@ protected:
void resolve_lines() override;
- UINT16 read_workspace_register_debug(int reg) override;
- void write_workspace_register_debug(int reg, UINT16 data) override;
+ uint16_t read_workspace_register_debug(int reg) override;
+ void write_workspace_register_debug(int reg, uint16_t data) override;
- UINT32 execute_min_cycles() const override;
- UINT32 execute_max_cycles() const override;
- UINT32 execute_input_lines() const override;
+ uint32_t execute_min_cycles() const override;
+ uint32_t execute_max_cycles() const override;
+ uint32_t execute_input_lines() const override;
void execute_set_input(int irqline, int state) override;
- UINT32 disasm_min_opcode_bytes() const override;
- UINT32 disasm_max_opcode_bytes() const override;
- offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ uint32_t disasm_min_opcode_bytes() const override;
+ uint32_t disasm_max_opcode_bytes() const override;
+ offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config80;
address_space_config m_io_config80;
};
diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp
index d8ffcda2337..b161ec05ce3 100644
--- a/src/devices/cpu/tms9900/tms9995.cpp
+++ b/src/devices/cpu/tms9900/tms9995.cpp
@@ -177,7 +177,7 @@ enum
Constructor
****************************************************************************/
-tms9995_device::tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms9995_device::tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS9995, "TMS9995", tag, owner, clock, "tms9995", __FILE__),
m_state_any(0),
PC(0),
@@ -199,7 +199,7 @@ tms9995_device::tms9995_device(const machine_config &mconfig, const char *tag, d
/*
Called from subclass.
*/
-tms9995_device::tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+tms9995_device::tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, TMS9995, name, tag, owner, clock, shortname, source),
m_state_any(0),
PC(0),
@@ -385,21 +385,21 @@ void tms9995_device::state_import(const device_state_entry &entry)
// bits of the STATUS register
break;
case TMS9995_PC:
- PC = (UINT16)m_state_any & 0xfffe;
+ PC = (uint16_t)m_state_any & 0xfffe;
break;
case TMS9995_WP:
- WP = (UINT16)m_state_any & 0xfffe;
+ WP = (uint16_t)m_state_any & 0xfffe;
break;
case TMS9995_STATUS:
- ST = (UINT16)m_state_any;
+ ST = (uint16_t)m_state_any;
break;
case TMS9995_IR:
- IR = (UINT16)m_state_any;
+ IR = (uint16_t)m_state_any;
break;
default:
// Workspace registers
if (index <= TMS9995_R15)
- write_workspace_register_debug(index-TMS9995_R0, (UINT16)m_state_any);
+ write_workspace_register_debug(index-TMS9995_R0, (uint16_t)m_state_any);
break;
}
}
@@ -443,7 +443,7 @@ void tms9995_device::state_string_export(const device_state_entry &entry, std::s
static const char *statestr = "LAECOPX-----IIII";
char flags[17];
memset(flags, 0x00, ARRAY_LENGTH(flags));
- UINT16 val = 0x8000;
+ uint16_t val = 0x8000;
if (entry.index()==STATE_GENFLAGS)
{
for (int i=0; i < 16; i++)
@@ -459,10 +459,10 @@ void tms9995_device::state_string_export(const device_state_entry &entry, std::s
Provide access to the workspace registers via the debugger. We have to
take care whether this is in onchip RAM or outside.
*/
-UINT16 tms9995_device::read_workspace_register_debug(int reg)
+uint16_t tms9995_device::read_workspace_register_debug(int reg)
{
int temp = m_icount;
- UINT16 value;
+ uint16_t value;
int addrb = (WP + (reg << 1)) & 0xfffe;
@@ -481,7 +481,7 @@ UINT16 tms9995_device::read_workspace_register_debug(int reg)
return value;
}
-void tms9995_device::write_workspace_register_debug(int reg, UINT16 data)
+void tms9995_device::write_workspace_register_debug(int reg, uint16_t data)
{
int temp = m_icount;
int addrb = (WP + (reg << 1)) & 0xfffe;
@@ -527,7 +527,7 @@ const address_space_config *tms9995_device::memory_space_config(address_spacenum
/*
Define the indices for the micro-operation table. This is done for the sake
- of a simpler microprogram definition as an UINT8[].
+ of a simpler microprogram definition as an uint8_t[].
*/
enum
{
@@ -580,7 +580,7 @@ enum
};
#define MICROPROGRAM(_MP) \
- static const UINT8 _MP[] =
+ static const uint8_t _MP[] =
/*
Cycles:
@@ -1201,7 +1201,7 @@ void tms9995_device::build_command_lookup_table()
int cmdindex;
int bitcount;
const tms_instruction *inst;
- UINT16 opcode;
+ uint16_t opcode;
m_command_lookup_table = std::make_unique<lookup_entry[]>(16);
@@ -1305,7 +1305,7 @@ void tms9995_device::execute_run()
m_check_ready = false;
if (TRACE_MICRO) logerror("main loop, operation %s, MPC = %d\n", opname[m_command], MPC);
- UINT8* program = (UINT8*)s_command[m_index].prog;
+ uint8_t* program = (uint8_t*)s_command[m_index].prog;
(this->*s_microoperation[program[MPC]])();
// For multi-pass operations where the MPC should not advance
@@ -1469,11 +1469,11 @@ void tms9995_device::set_hold_state(bool state)
Decode the instruction. This is done in parallel to other operations
so we just do it together with the prefetch.
*/
-void tms9995_device::decode(UINT16 inst)
+void tms9995_device::decode(uint16_t inst)
{
int ix = 0;
lookup_entry* table = m_command_lookup_table.get();
- UINT16 opcode = inst;
+ uint16_t opcode = inst;
bool complete = false;
m_mid_active = false;
@@ -1860,8 +1860,8 @@ void tms9995_device::mem_read()
{
// This is an off-chip access
m_check_ready = true;
- UINT8 value;
- UINT16 address = m_address;
+ uint8_t value;
+ uint16_t address = m_address;
switch (m_mem_phase)
{
@@ -1994,7 +1994,7 @@ void tms9995_device::mem_write()
{
// This is an off-chip access
m_check_ready = true;
- UINT16 address = m_address;
+ uint16_t address = m_address;
switch (m_mem_phase)
{
case 1:
@@ -2174,8 +2174,8 @@ void tms9995_device::cru_output_operation()
void tms9995_device::cru_input_operation()
{
- UINT16 crubit;
- UINT8 crubyte;
+ uint16_t crubit;
+ uint8_t crubyte;
// Reading is different, since MESS uses 8 bit transfers
// We read 8 bits in one go, then iterate another min(n-1,7) times to allow
@@ -2295,7 +2295,7 @@ void tms9995_device::trigger_decrementer()
*/
void tms9995_device::operand_address_subprogram()
{
- UINT16 ircopy = IR;
+ uint16_t ircopy = IR;
if (m_get_destination) ircopy = ircopy >> 6;
// Save the return program and position
@@ -2380,7 +2380,7 @@ inline void tms9995_device::set_status_bit(int bit, bool state)
m_int_overflow = (m_check_overflow && bit == ST_OV && ((ST & ST_OE)!=0) && state == true);
}
-void tms9995_device::set_status_parity(UINT8 value)
+void tms9995_device::set_status_parity(uint8_t value)
{
int count = 0;
for (int i=0; i < 8; i++)
@@ -2391,11 +2391,11 @@ void tms9995_device::set_status_parity(UINT8 value)
set_status_bit(ST_OP, (count & 1)!=0);
}
-inline void tms9995_device::compare_and_set_lae(UINT16 value1, UINT16 value2)
+inline void tms9995_device::compare_and_set_lae(uint16_t value1, uint16_t value2)
{
set_status_bit(ST_EQ, value1 == value2);
set_status_bit(ST_LH, value1 > value2);
- set_status_bit(ST_AGT, (INT16)value1 > (INT16)value2);
+ set_status_bit(ST_AGT, (int16_t)value1 > (int16_t)value2);
}
/**************************************************************************
@@ -2423,7 +2423,7 @@ void tms9995_device::alu_add_s_sxc()
// The destination address is still in m_address
// Prefetch will not change m_current_value and m_address
- UINT32 dest_new = 0;
+ uint32_t dest_new = 0;
switch (m_command)
{
@@ -2464,12 +2464,12 @@ void tms9995_device::alu_add_s_sxc()
break;
}
- m_current_value = (UINT16)(dest_new & 0xffff);
+ m_current_value = (uint16_t)(dest_new & 0xffff);
- compare_and_set_lae((UINT16)(dest_new & 0xffff),0);
+ compare_and_set_lae((uint16_t)(dest_new & 0xffff),0);
if (m_byteop)
{
- set_status_parity((UINT8)(dest_new>>8));
+ set_status_parity((uint8_t)(dest_new>>8));
}
if (TRACE_STATUS) logerror("ST = %04x (val=%04x)\n", ST, m_current_value);
// No clock pulse (will be done by prefetch)
@@ -2536,7 +2536,7 @@ void tms9995_device::alu_c()
// Prefetch will not change m_current_value and m_address
if (m_byteop)
{
- set_status_parity((UINT8)(m_source_value>>8));
+ set_status_parity((uint8_t)(m_source_value>>8));
}
compare_and_set_lae(m_source_value, m_current_value);
if (TRACE_STATUS) logerror("ST = %04x (val1=%04x, val2=%04x)\n", ST, m_source_value, m_current_value);
@@ -2574,10 +2574,10 @@ void tms9995_device::alu_clr_seto()
void tms9995_device::alu_divide()
{
int n=1;
- UINT32 uval32;
+ uint32_t uval32;
bool overflow = true;
- UINT16 value1;
+ uint16_t value1;
switch (m_inst_state)
{
@@ -2645,9 +2645,9 @@ void tms9995_device::alu_divide_signed()
{
int n=1;
bool overflow;
- UINT16 w1, w2, dwait;
- INT16 divisor;
- INT32 dividend;
+ uint16_t w1, w2, dwait;
+ int16_t divisor;
+ int32_t dividend;
switch (m_inst_state)
{
@@ -2710,8 +2710,8 @@ void tms9995_device::alu_divide_signed()
// We are here because there was no overflow
dividend = m_value_copy << 16 | m_current_value;
// Do the calculation
- m_current_value = (UINT16)(dividend / (INT16)m_source_value);
- m_value_copy = (UINT16)(dividend % (INT16)m_source_value);
+ m_current_value = (uint16_t)(dividend / (int16_t)m_source_value);
+ m_value_copy = (uint16_t)(dividend % (int16_t)m_source_value);
m_address = WP;
// As we have not implemented the real division algorithm we must
@@ -2824,7 +2824,7 @@ void tms9995_device::alu_f3()
*/
void tms9995_device::alu_imm_arithm()
{
- UINT32 dest_new = 0;
+ uint32_t dest_new = 0;
// We have the register value in m_source_value, the register address in m_address_saved
// and the immediate value in m_current_value
@@ -2846,7 +2846,7 @@ void tms9995_device::alu_imm_arithm()
break;
}
- m_current_value = (UINT16)(dest_new & 0xffff);
+ m_current_value = (uint16_t)(dest_new & 0xffff);
compare_and_set_lae(m_current_value, 0);
m_address = m_address_saved;
if (TRACE_STATUS) logerror("ST = %04x (val=%04x)\n", ST, m_current_value);
@@ -2858,7 +2858,7 @@ void tms9995_device::alu_imm_arithm()
void tms9995_device::alu_jump()
{
bool cond = false;
- INT8 displacement = (IR & 0xff);
+ int8_t displacement = (IR & 0xff);
switch (m_command)
{
@@ -2936,7 +2936,7 @@ void tms9995_device::alu_ldcr()
if (m_byteop)
{
m_current_value = (m_current_value>>8) & 0xff;
- set_status_parity((UINT8)m_current_value);
+ set_status_parity((uint8_t)m_current_value);
}
m_cru_value = m_current_value;
m_address = WP + 24;
@@ -3010,7 +3010,7 @@ void tms9995_device::alu_mov()
m_current_value = m_source_value;
if (m_byteop)
{
- set_status_parity((UINT8)(m_current_value>>8));
+ set_status_parity((uint8_t)(m_current_value>>8));
}
compare_and_set_lae(m_current_value, 0);
if (TRACE_STATUS) logerror("ST = %04x (val=%04x)\n", ST, m_current_value);
@@ -3023,8 +3023,8 @@ void tms9995_device::alu_mov()
void tms9995_device::alu_multiply()
{
int n = 0;
- UINT32 result;
- INT32 results;
+ uint32_t result;
+ int32_t results;
if (m_command==MPY)
{
@@ -3067,7 +3067,7 @@ void tms9995_device::alu_multiply()
break;
case 1:
// m_current_value <- register content
- results = ((INT16)m_source_value) * ((INT16)m_current_value);
+ results = ((int16_t)m_source_value) * ((int16_t)m_current_value);
m_current_value = (results >> 16) & 0xffff;
m_value_copy = results & 0xffff;
// m_address is still the register
@@ -3114,7 +3114,7 @@ void tms9995_device::alu_rtwp()
void tms9995_device::alu_sbo_sbz()
{
- INT8 displacement;
+ int8_t displacement;
if (m_inst_state==0)
{
@@ -3123,7 +3123,7 @@ void tms9995_device::alu_sbo_sbz()
else
{
m_cru_value = (m_command==SBO)? 1 : 0;
- displacement = (INT8)(IR & 0xff);
+ displacement = (int8_t)(IR & 0xff);
m_cru_address = m_current_value + (displacement<<1);
m_count = 1;
}
@@ -3138,8 +3138,8 @@ void tms9995_device::alu_shift()
{
bool carry = false;
bool overflow = false;
- UINT16 sign = 0;
- UINT32 value;
+ uint16_t sign = 0;
+ uint32_t value;
int count;
switch (m_inst_state)
@@ -3215,9 +3215,9 @@ void tms9995_device::alu_shift()
*/
void tms9995_device::alu_single_arithm()
{
- UINT32 dest_new = 0;
- UINT32 src_val = m_current_value & 0x0000ffff;
- UINT16 sign = 0;
+ uint32_t dest_new = 0;
+ uint32_t src_val = m_current_value & 0x0000ffff;
+ uint16_t sign = 0;
bool check_ov = true;
switch (m_command)
@@ -3334,7 +3334,7 @@ void tms9995_device::alu_stcr()
n = 13;
if (m_byteop)
{
- set_status_parity((UINT8)m_current_value);
+ set_status_parity((uint8_t)m_current_value);
m_current_value <<= 8;
}
else n += 8;
@@ -3361,7 +3361,7 @@ void tms9995_device::alu_stst_stwp()
*/
void tms9995_device::alu_tb()
{
- INT8 displacement;
+ int8_t displacement;
switch (m_inst_state)
{
@@ -3370,7 +3370,7 @@ void tms9995_device::alu_tb()
pulse_clock(1);
break;
case 1:
- displacement = (INT8)(IR & 0xff);
+ displacement = (int8_t)(IR & 0xff);
m_cru_address = m_current_value + (displacement<<1);
m_cru_first_read = true;
m_count = 1;
@@ -3523,32 +3523,32 @@ void tms9995_device::alu_int()
}
/**************************************************************************/
-UINT32 tms9995_device::execute_min_cycles() const
+uint32_t tms9995_device::execute_min_cycles() const
{
return 2;
}
-UINT32 tms9995_device::execute_max_cycles() const
+uint32_t tms9995_device::execute_max_cycles() const
{
return 44;
}
-UINT32 tms9995_device::execute_input_lines() const
+uint32_t tms9995_device::execute_input_lines() const
{
return 2;
}
-UINT32 tms9995_device::disasm_min_opcode_bytes() const
+uint32_t tms9995_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 tms9995_device::disasm_max_opcode_bytes() const
+uint32_t tms9995_device::disasm_max_opcode_bytes() const
{
return 6;
}
-offs_t tms9995_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms9995_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms9995 );
return CPU_DISASSEMBLE_NAME(tms9995)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h
index 1231de40196..f1867d5b0b1 100644
--- a/src/devices/cpu/tms9900/tms9995.h
+++ b/src/devices/cpu/tms9900/tms9995.h
@@ -48,8 +48,8 @@ enum
class tms9995_device : public cpu_device
{
public:
- tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// READY input line. When asserted (high), the memory is ready for data exchange.
// We chose to use a direct method instead of a delegate to keep performance
@@ -73,7 +73,7 @@ public:
template<class _Object> static devcb_base &static_set_dbin_callback(device_t &device, _Object object) { return downcast<tms9995_device &>(device).m_dbin_line.set_callback(object); }
// For debugger access
- UINT8 debug_read_onchip_memory(offs_t addr) { return m_onchip_memory[addr & 0xff]; };
+ uint8_t debug_read_onchip_memory(offs_t addr) { return m_onchip_memory[addr & 0xff]; };
bool is_onchip(offs_t addrb) { return (((addrb & 0xff00)==0xf000 && (addrb < 0xf0fc)) || ((addrb & 0xfffc)==0xfffc)) && !m_mp9537; }
void set_overflow_interrupt( int enable ) { m_check_overflow = (enable!=0); }
@@ -85,46 +85,46 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_set_input(int irqline, int state) override;
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
const address_space_config* memory_space_config(address_spacenum spacenum) const override;
- UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return clocks / 4.0; }
- UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return cycles * 4.0; }
+ uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return clocks / 4.0; }
+ uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return cycles * 4.0; }
// Variant of the TMS9995 without internal RAM and decrementer
bool m_mp9537;
private:
// State / debug management
- UINT16 m_state_any;
+ uint16_t m_state_any;
static const char* s_statename[];
void state_import(const device_state_entry &entry) override;
void state_export(const device_state_entry &entry) override;
void state_string_export(const device_state_entry &entry, std::string &str) const override;
- UINT16 read_workspace_register_debug(int reg);
- void write_workspace_register_debug(int reg, UINT16 data);
+ uint16_t read_workspace_register_debug(int reg);
+ void write_workspace_register_debug(int reg, uint16_t data);
// TMS9995 hardware registers
- UINT16 WP; // Workspace pointer
- UINT16 PC; // Program counter
- UINT16 ST; // Status register
+ uint16_t WP; // Workspace pointer
+ uint16_t PC; // Program counter
+ uint16_t ST; // Status register
// The TMS9995 has a prefetch feature which causes a wrong display of the PC.
// We use this additional member for the debugger only.
- UINT16 PC_debug;
+ uint16_t PC_debug;
// 256 bytes of onchip memory
- UINT8 m_onchip_memory[256];
+ uint8_t m_onchip_memory[256];
const address_space_config m_program_config;
const address_space_config m_io_config;
@@ -213,7 +213,7 @@ private:
// Decode the given 16-bit value which has been retrieved by a prefetch or
// during an X operation.
- void decode(UINT16 inst);
+ void decode(uint16_t inst);
// Store the interrupt mask part of the ST. This is used when processing
// an interrupt, passing the new mask from the service_interrupt part to
@@ -221,26 +221,26 @@ private:
int m_intmask;
// Stored address
- UINT16 m_address;
+ uint16_t m_address;
// Stores the recently read word or the word to be written
- UINT16 m_current_value;
+ uint16_t m_current_value;
// Stores the value of the source operand in multi-operand instructions
- UINT16 m_source_value;
+ uint16_t m_source_value;
// During indexed addressing, this value is added to get the final address value.
- UINT16 m_address_add;
+ uint16_t m_address_add;
// During indirect/auto-increment addressing, this copy of the address must
// be preserved while writing the new value to the register.
- UINT16 m_address_saved;
+ uint16_t m_address_saved;
// Another copy of the address
- UINT16 m_address_copy;
+ uint16_t m_address_copy;
// Copy of the value
- UINT16 m_value_copy;
+ uint16_t m_value_copy;
// Stores the recent register number. Only used to pass the register
// number during the operand address derivation.
@@ -253,18 +253,18 @@ private:
void trigger_decrementer();
// Start value
- UINT16 m_starting_count_storage_register;
+ uint16_t m_starting_count_storage_register;
// Current decrementer value.
- UINT16 m_decrementer_value;
+ uint16_t m_decrementer_value;
// ============== CRU support ======================
- UINT16 m_cru_address;
- UINT16 m_cru_value;
+ uint16_t m_cru_address;
+ uint16_t m_cru_value;
bool m_cru_first_read;
int m_cru_bits_left;
- UINT32 m_cru_read;
+ uint32_t m_cru_read;
// CPU-internal CRU flags
bool m_flag[16];
@@ -275,13 +275,13 @@ private:
// the decoded commands. When the next instruction shall be started,
// the contents from the pre* members are copied to the main members.
- UINT16 IR;
- UINT16 m_command;
+ uint16_t IR;
+ uint16_t m_command;
int m_index;
bool m_byteop;
- UINT16 m_pre_IR;
- UINT16 m_pre_command;
+ uint16_t m_pre_IR;
+ uint16_t m_pre_command;
int m_pre_index;
bool m_pre_byteop;
@@ -294,7 +294,7 @@ private:
void build_command_lookup_table();
// Sequence of micro-operations
- typedef const UINT8* microprogram;
+ typedef const uint8_t* microprogram;
// Method pointer
typedef void (tms9995_device::*ophandler)(void);
@@ -302,7 +302,7 @@ private:
// Opcode list entry
struct tms_instruction
{
- UINT16 opcode;
+ uint16_t opcode;
int id;
int format;
microprogram prog; // Microprogram
@@ -344,8 +344,8 @@ private:
// Status register update
inline void set_status_bit(int bit, bool state);
- inline void compare_and_set_lae(UINT16 value1, UINT16 value2);
- void set_status_parity(UINT8 value);
+ inline void compare_and_set_lae(uint16_t value1, uint16_t value2);
+ void set_status_parity(uint8_t value);
// Micro-operation declarations
void int_prefetch_and_decode();
@@ -438,7 +438,7 @@ private:
class tms9995_mp9537_device : public tms9995_device
{
public:
- tms9995_mp9537_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ tms9995_mp9537_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms9995_device(mconfig, TMS9995_MP9537, "TMS9995-MP9537", tag, owner, clock, "tms9995_mp9537", __FILE__)
{
m_mp9537 = true;
diff --git a/src/devices/cpu/ucom4/ucom4.cpp b/src/devices/cpu/ucom4/ucom4.cpp
index 71f1bd2ce9b..f3cff841953 100644
--- a/src/devices/cpu/ucom4/ucom4.cpp
+++ b/src/devices/cpu/ucom4/ucom4.cpp
@@ -58,19 +58,19 @@ ADDRESS_MAP_END
// device definitions
-upd553_cpu_device::upd553_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd553_cpu_device::upd553_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ucom4_cpu_device(mconfig, NEC_D553, "uPD553", tag, owner, clock, NEC_UCOM43, 3 /* stack levels */, 11 /* prg width */, ADDRESS_MAP_NAME(program_2k), 7 /* data width */, ADDRESS_MAP_NAME(data_96x4), "upd553", __FILE__)
{ }
-upd557l_cpu_device::upd557l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd557l_cpu_device::upd557l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ucom4_cpu_device(mconfig, NEC_D557L, "uPD557L", tag, owner, clock, NEC_UCOM43, 3, 11, ADDRESS_MAP_NAME(program_2k), 7, ADDRESS_MAP_NAME(data_96x4), "upd557l", __FILE__)
{ }
-upd650_cpu_device::upd650_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd650_cpu_device::upd650_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ucom4_cpu_device(mconfig, NEC_D650, "uPD650", tag, owner, clock, NEC_UCOM43, 3, 11, ADDRESS_MAP_NAME(program_2k), 7, ADDRESS_MAP_NAME(data_96x4), "upd650", __FILE__)
{ }
-upd552_cpu_device::upd552_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd552_cpu_device::upd552_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ucom4_cpu_device(mconfig, NEC_D552, "uPD552", tag, owner, clock, NEC_UCOM44, 1, 10, ADDRESS_MAP_NAME(program_1k), 6, ADDRESS_MAP_NAME(data_64x4), "upd552", __FILE__)
{ }
@@ -95,7 +95,7 @@ void ucom4_cpu_device::state_string_export(const device_state_entry &entry, std:
}
}
-offs_t ucom4_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ucom4_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE(ucom4);
return CPU_DISASSEMBLE_NAME(ucom4)(this, buffer, pc, oprom, opram, options);
@@ -220,10 +220,10 @@ void ucom4_cpu_device::device_reset()
// default:
// A,B are inputs, C,D are input/output, E,F,G,H,I are output
-UINT8 ucom4_cpu_device::input_r(int index)
+uint8_t ucom4_cpu_device::input_r(int index)
{
index &= 0xf;
- UINT8 inp = 0;
+ uint8_t inp = 0;
switch (index)
{
@@ -240,7 +240,7 @@ UINT8 ucom4_cpu_device::input_r(int index)
return inp & 0xf;
}
-void ucom4_cpu_device::output_w(int index, UINT8 data)
+void ucom4_cpu_device::output_w(int index, uint8_t data)
{
index &= 0xf;
data &= 0xf;
@@ -266,7 +266,7 @@ void ucom4_cpu_device::output_w(int index, UINT8 data)
// uPD557L:
// ports B,H,I are stripped, port G is reduced to 1 pin
-UINT8 upd557l_cpu_device::input_r(int index)
+uint8_t upd557l_cpu_device::input_r(int index)
{
index &= 0xf;
@@ -278,7 +278,7 @@ UINT8 upd557l_cpu_device::input_r(int index)
return 0;
}
-void upd557l_cpu_device::output_w(int index, UINT8 data)
+void upd557l_cpu_device::output_w(int index, uint8_t data)
{
index &= 0xf;
data &= 0xf;
diff --git a/src/devices/cpu/ucom4/ucom4.h b/src/devices/cpu/ucom4/ucom4.h
index 01a7f2ecc1c..5e1f3b20a25 100644
--- a/src/devices/cpu/ucom4/ucom4.h
+++ b/src/devices/cpu/ucom4/ucom4.h
@@ -100,7 +100,7 @@ class ucom4_cpu_device : public cpu_device
{
public:
// construction/destruction
- ucom4_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int family, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
+ ucom4_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, int family, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 8, prgwidth, 0, program)
, m_data_config("data", ENDIANNESS_BIG, 8, datawidth, 0, data)
@@ -141,11 +141,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); } // "
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 2; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); } // "
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 2; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
@@ -153,9 +153,9 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return(spacenum == AS_PROGRAM) ? &m_program_config : ((spacenum == AS_DATA) ? &m_data_config : nullptr); }
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -171,27 +171,27 @@ protected:
int m_datamask;
int m_family; // MCU family (43/44/45)
int m_stack_levels; // number of callstack levels
- UINT16 m_stack[3]; // max 3
- UINT8 m_port_out[0x10]; // last value written to output port
- UINT8 m_op;
- UINT8 m_prev_op; // previous opcode
- UINT8 m_arg; // opcode argument for 2-byte opcodes
- UINT8 m_bitmask; // opcode bit argument
+ uint16_t m_stack[3]; // max 3
+ uint8_t m_port_out[0x10]; // last value written to output port
+ uint8_t m_op;
+ uint8_t m_prev_op; // previous opcode
+ uint8_t m_arg; // opcode argument for 2-byte opcodes
+ uint8_t m_bitmask; // opcode bit argument
bool m_skip; // skip next opcode
int m_icount;
emu_timer *m_timer;
- UINT16 m_pc; // program counter
- UINT16 m_prev_pc;
- UINT8 m_acc; // 4-bit accumulator
- UINT8 m_dpl; // 4-bit data pointer low (RAM x)
- UINT8 m_dph; // 4-bit(?) data pointer high (RAM y)
- UINT8 m_dph_mask;
- UINT8 m_carry_f; // carry flag
- UINT8 m_carry_s_f; // carry save flag
- UINT8 m_timer_f; // timer out flag
- UINT8 m_int_f; // interrupt flag
- UINT8 m_inte_f; // interrupt enable flag
+ uint16_t m_pc; // program counter
+ uint16_t m_prev_pc;
+ uint8_t m_acc; // 4-bit accumulator
+ uint8_t m_dpl; // 4-bit data pointer low (RAM x)
+ uint8_t m_dph; // 4-bit(?) data pointer high (RAM y)
+ uint8_t m_dph_mask;
+ uint8_t m_carry_f; // carry flag
+ uint8_t m_carry_s_f; // carry save flag
+ uint8_t m_timer_f; // timer out flag
+ uint8_t m_int_f; // interrupt flag
+ uint8_t m_inte_f; // interrupt enable flag
int m_int_line; // interrupt pin state
// i/o handlers
@@ -208,23 +208,23 @@ protected:
devcb_write8 m_write_h;
devcb_write8 m_write_i;
- virtual UINT8 input_r(int index);
- virtual void output_w(int index, UINT8 data);
+ virtual uint8_t input_r(int index);
+ virtual void output_w(int index, uint8_t data);
// misc internal helpers
void increment_pc();
void fetch_arg();
void do_interrupt();
- UINT8 ram_r();
- void ram_w(UINT8 data);
+ uint8_t ram_r();
+ void ram_w(uint8_t data);
void pop_stack();
void push_stack();
bool check_op_43();
TIMER_CALLBACK_MEMBER( simple_timer_cb );
- UINT8 ucom43_reg_r(int index);
- void ucom43_reg_w(int index, UINT8 data);
+ uint8_t ucom43_reg_r(int index);
+ void ucom43_reg_w(int index, uint8_t data);
// opcode handlers
void op_illegal();
@@ -316,32 +316,32 @@ protected:
class upd553_cpu_device : public ucom4_cpu_device
{
public:
- upd553_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd553_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class upd557l_cpu_device : public ucom4_cpu_device
{
public:
- upd557l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd557l_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual UINT8 input_r(int index) override;
- virtual void output_w(int index, UINT8 data) override;
+ virtual uint8_t input_r(int index) override;
+ virtual void output_w(int index, uint8_t data) override;
};
class upd650_cpu_device : public ucom4_cpu_device
{
public:
- upd650_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd650_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class upd552_cpu_device : public ucom4_cpu_device
{
public:
- upd552_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd552_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/ucom4/ucom4d.cpp b/src/devices/cpu/ucom4/ucom4d.cpp
index 14adfefbc79..32284002e91 100644
--- a/src/devices/cpu/ucom4/ucom4d.cpp
+++ b/src/devices/cpu/ucom4/ucom4d.cpp
@@ -38,7 +38,7 @@ static const char *const s_mnemonics[] =
};
// number of bits per opcode parameter, 2 digits means opcode is 2 bytes
-static const UINT8 s_bits[] =
+static const uint8_t s_bits[] =
{
4, 0, 2, 80, 4, 0, 0, 0,
0, 0, 0, 2, 2, 2, 0, 0, 0, 0, 0,
@@ -54,7 +54,7 @@ static const UINT8 s_bits[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] =
+static const uint32_t s_flags[] =
{
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -68,7 +68,7 @@ static const UINT32 s_flags[] =
};
-static const UINT8 ucom4_mnemonic[0x100] =
+static const uint8_t ucom4_mnemonic[0x100] =
{
/* 0x00 */
mNOP, mDI, mS, mTIT, mTC, mTTM, mDAA, mTAL,
@@ -116,8 +116,8 @@ static const UINT8 ucom4_mnemonic[0x100] =
CPU_DISASSEMBLE(ucom4)
{
int pos = 0;
- UINT8 op = oprom[pos++];
- UINT8 instr = ucom4_mnemonic[op];
+ uint8_t op = oprom[pos++];
+ uint8_t instr = ucom4_mnemonic[op];
char *dst = buffer;
dst += sprintf(dst, "%-4s ", s_mnemonics[instr]);
@@ -126,10 +126,10 @@ CPU_DISASSEMBLE(ucom4)
int bits = s_bits[instr];
if (bits)
{
- UINT16 param = op & ((1 << (bits % 10)) - 1);
+ uint16_t param = op & ((1 << (bits % 10)) - 1);
if (bits / 10)
{
- UINT8 op2 = oprom[pos++];
+ uint8_t op2 = oprom[pos++];
param = (param << (bits / 10)) | (op2 & ((1 << (bits / 10)) - 1));
bits = (bits % 10) + (bits / 10);
}
diff --git a/src/devices/cpu/ucom4/ucom4op.cpp b/src/devices/cpu/ucom4/ucom4op.cpp
index a9c5c0fe892..8c8e69f9ed4 100644
--- a/src/devices/cpu/ucom4/ucom4op.cpp
+++ b/src/devices/cpu/ucom4/ucom4op.cpp
@@ -8,15 +8,15 @@
// internal helpers
-inline UINT8 ucom4_cpu_device::ram_r()
+inline uint8_t ucom4_cpu_device::ram_r()
{
- UINT16 address = m_dph << 4 | m_dpl;
+ uint16_t address = m_dph << 4 | m_dpl;
return m_data->read_byte(address & m_datamask) & 0xf;
}
-inline void ucom4_cpu_device::ram_w(UINT8 data)
+inline void ucom4_cpu_device::ram_w(uint8_t data)
{
- UINT16 address = m_dph << 4 | m_dpl;
+ uint16_t address = m_dph << 4 | m_dpl;
m_data->write_byte(address & m_datamask, data & 0xf);
}
@@ -105,7 +105,7 @@ void ucom4_cpu_device::op_tla()
void ucom4_cpu_device::op_xm()
{
// XM X: Exchange ACC with RAM, xor DPh with X
- UINT8 old_acc = m_acc;
+ uint8_t old_acc = m_acc;
m_acc = ram_r();
ram_w(old_acc);
m_dph ^= (m_op & 0x03);
@@ -468,12 +468,12 @@ enum
UCOM43_F
};
-inline UINT8 ucom4_cpu_device::ucom43_reg_r(int index)
+inline uint8_t ucom4_cpu_device::ucom43_reg_r(int index)
{
return m_data->read_byte(m_datamask - index) & 0xf;
}
-inline void ucom4_cpu_device::ucom43_reg_w(int index, UINT8 data)
+inline void ucom4_cpu_device::ucom43_reg_w(int index, uint8_t data)
{
m_data->write_byte(m_datamask - index, data & 0xf);
}
@@ -527,7 +527,7 @@ void ucom4_cpu_device::op_xaw()
// XAW: Exchange ACC with W
m_icount--;
- UINT8 old_acc = m_acc;
+ uint8_t old_acc = m_acc;
m_acc = ucom43_reg_r(UCOM43_W);
ucom43_reg_w(UCOM43_W, old_acc);
}
@@ -538,7 +538,7 @@ void ucom4_cpu_device::op_xaz()
// XAZ: Exchange ACC with Z
m_icount--;
- UINT8 old_acc = m_acc;
+ uint8_t old_acc = m_acc;
m_acc = ucom43_reg_r(UCOM43_Z);
ucom43_reg_w(UCOM43_Z, old_acc);
}
@@ -549,7 +549,7 @@ void ucom4_cpu_device::op_xhr()
// XHR: Exchange DPh with R
m_icount--;
- UINT8 old_dph = m_dph;
+ uint8_t old_dph = m_dph;
m_dph = ucom43_reg_r(UCOM43_R);
ucom43_reg_w(UCOM43_R, old_dph);
}
@@ -560,7 +560,7 @@ void ucom4_cpu_device::op_xhx()
// XHX: Exchange DPh with X
m_icount--;
- UINT8 old_dph = m_dph;
+ uint8_t old_dph = m_dph;
m_dph = ucom43_reg_r(UCOM43_X);
ucom43_reg_w(UCOM43_X, old_dph);
}
@@ -571,7 +571,7 @@ void ucom4_cpu_device::op_xls()
// XLS: Exchange DPl with S
m_icount--;
- UINT8 old_dpl = m_dpl;
+ uint8_t old_dpl = m_dpl;
m_dpl = ucom43_reg_r(UCOM43_S);
ucom43_reg_w(UCOM43_S, old_dpl);
}
@@ -582,7 +582,7 @@ void ucom4_cpu_device::op_xly()
// XLY: Exchange DPl with Y
m_icount--;
- UINT8 old_dpl = m_dpl;
+ uint8_t old_dpl = m_dpl;
m_dpl = ucom43_reg_r(UCOM43_Y);
ucom43_reg_w(UCOM43_Y, old_dpl);
}
@@ -592,7 +592,7 @@ void ucom4_cpu_device::op_xc()
if (!check_op_43()) return;
// XC: Exchange Carry F/F with Carry Save F/F
- UINT8 c = m_carry_f;
+ uint8_t c = m_carry_f;
m_carry_f = m_carry_s_f;
m_carry_s_f = c;
}
@@ -644,7 +644,7 @@ void ucom4_cpu_device::op_rar()
if (!check_op_43()) return;
// RAR: Rotate ACC Right through Carry F/F
- UINT8 c = m_acc & 1;
+ uint8_t c = m_acc & 1;
m_acc = m_acc >> 1 | m_carry_f << 3;
m_carry_f = c;
}
@@ -657,7 +657,7 @@ void ucom4_cpu_device::op_inm()
if (!check_op_43()) return;
// INM: Increment RAM, skip next on carry
- UINT8 val = (ram_r() + 1) & 0xf;
+ uint8_t val = (ram_r() + 1) & 0xf;
ram_w(val);
m_skip = (val == 0);
}
@@ -667,7 +667,7 @@ void ucom4_cpu_device::op_dem()
if (!check_op_43()) return;
// DEM: Decrement RAM, skip next on carry
- UINT8 val = (ram_r() - 1) & 0xf;
+ uint8_t val = (ram_r() - 1) & 0xf;
ram_w(val);
m_skip = (val == 0xf);
}
diff --git a/src/devices/cpu/uml.cpp b/src/devices/cpu/uml.cpp
index 0aff923fafd..5b4822cb379 100644
--- a/src/devices/cpu/uml.cpp
+++ b/src/devices/cpu/uml.cpp
@@ -227,7 +227,7 @@ const opcode_info instruction::s_opcode_info_table[OP_MAX] =
// rol32 - perform a 32-bit left rotate
//-------------------------------------------------
-inline UINT32 rol32(UINT32 source, UINT8 count)
+inline uint32_t rol32(uint32_t source, uint8_t count)
{
count &= 31;
return (source << count) | (source >> (32 - count));
@@ -238,7 +238,7 @@ inline UINT32 rol32(UINT32 source, UINT8 count)
// rol64 - perform a 64-bit left rotate
//-------------------------------------------------
-inline UINT64 rol64(UINT64 source, UINT8 count)
+inline uint64_t rol64(uint64_t source, uint8_t count)
{
count &= 63;
return (source << count) | (source >> (64 - count));
@@ -302,10 +302,10 @@ uml::instruction::instruction()
// parameters
//-------------------------------------------------
-void uml::instruction::configure(opcode_t op, UINT8 size, condition_t condition)
+void uml::instruction::configure(opcode_t op, uint8_t size, condition_t condition)
{
// fill in the instruction
- m_opcode = (opcode_t)(UINT8)op;
+ m_opcode = (opcode_t)(uint8_t)op;
m_size = size;
m_condition = condition;
m_flags = 0;
@@ -321,10 +321,10 @@ void uml::instruction::configure(opcode_t op, UINT8 size, condition_t condition)
// parameter
//-------------------------------------------------
-void uml::instruction::configure(opcode_t op, UINT8 size, parameter p0, condition_t condition)
+void uml::instruction::configure(opcode_t op, uint8_t size, parameter p0, condition_t condition)
{
// fill in the instruction
- m_opcode = (opcode_t)(UINT8)op;
+ m_opcode = (opcode_t)(uint8_t)op;
m_size = size;
m_condition = condition;
m_flags = 0;
@@ -341,10 +341,10 @@ void uml::instruction::configure(opcode_t op, UINT8 size, parameter p0, conditio
// parameters
//-------------------------------------------------
-void uml::instruction::configure(opcode_t op, UINT8 size, parameter p0, parameter p1, condition_t condition)
+void uml::instruction::configure(opcode_t op, uint8_t size, parameter p0, parameter p1, condition_t condition)
{
// fill in the instruction
- m_opcode = (opcode_t)(UINT8)op;
+ m_opcode = (opcode_t)(uint8_t)op;
m_size = size;
m_condition = condition;
m_flags = 0;
@@ -362,10 +362,10 @@ void uml::instruction::configure(opcode_t op, UINT8 size, parameter p0, paramete
// parameters
//-------------------------------------------------
-void uml::instruction::configure(opcode_t op, UINT8 size, parameter p0, parameter p1, parameter p2, condition_t condition)
+void uml::instruction::configure(opcode_t op, uint8_t size, parameter p0, parameter p1, parameter p2, condition_t condition)
{
// fill in the instruction
- m_opcode = (opcode_t)(UINT8)op;
+ m_opcode = (opcode_t)(uint8_t)op;
m_size = size;
m_condition = condition;
m_flags = 0;
@@ -384,10 +384,10 @@ void uml::instruction::configure(opcode_t op, UINT8 size, parameter p0, paramete
// parameters
//-------------------------------------------------
-void uml::instruction::configure(opcode_t op, UINT8 size, parameter p0, parameter p1, parameter p2, parameter p3, condition_t condition)
+void uml::instruction::configure(opcode_t op, uint8_t size, parameter p0, parameter p1, parameter p2, parameter p3, condition_t condition)
{
// fill in the instruction
- m_opcode = (opcode_t)(UINT8)op;
+ m_opcode = (opcode_t)(uint8_t)op;
m_size = size;
m_condition = condition;
m_flags = 0;
@@ -414,8 +414,8 @@ void uml::instruction::simplify()
if (m_flags != 0)
return;
- static const UINT64 instsizemask[] = { 0, 0, 0, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) };
- static const UINT64 paramsizemask[] = { 0xff, 0xffff, 0xffffffff, U64(0xffffffffffffffff) };
+ static const uint64_t instsizemask[] = { 0, 0, 0, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) };
+ static const uint64_t paramsizemask[] = { 0xff, 0xffff, 0xffffffff, U64(0xffffffffffffffff) };
// loop until we've simplified all we can
opcode_t origop;
@@ -462,10 +462,10 @@ void uml::instruction::simplify()
if (m_param[1].is_immediate())
switch (m_param[2].size())
{
- case SIZE_BYTE: convert_to_mov_immediate((INT8)m_param[1].immediate()); break;
- case SIZE_WORD: convert_to_mov_immediate((INT16)m_param[1].immediate()); break;
- case SIZE_DWORD: convert_to_mov_immediate((INT32)m_param[1].immediate()); break;
- case SIZE_QWORD: convert_to_mov_immediate((INT64)m_param[1].immediate()); break;
+ case SIZE_BYTE: convert_to_mov_immediate((int8_t)m_param[1].immediate()); break;
+ case SIZE_WORD: convert_to_mov_immediate((int16_t)m_param[1].immediate()); break;
+ case SIZE_DWORD: convert_to_mov_immediate((int32_t)m_param[1].immediate()); break;
+ case SIZE_QWORD: convert_to_mov_immediate((int64_t)m_param[1].immediate()); break;
case SIZE_DQWORD: fatalerror("Invalid SEXT target size\n");
}
break;
@@ -545,9 +545,9 @@ void uml::instruction::simplify()
else if (m_param[2].is_immediate() && m_param[3].is_immediate())
{
if (m_size == 4)
- convert_to_mov_immediate((UINT32)((UINT32)m_param[1].immediate() * (UINT32)m_param[2].immediate()));
+ convert_to_mov_immediate((uint32_t)((uint32_t)m_param[1].immediate() * (uint32_t)m_param[2].immediate()));
else if (m_size == 8)
- convert_to_mov_immediate((UINT64)((UINT64)m_param[1].immediate() * (UINT64)m_param[2].immediate()));
+ convert_to_mov_immediate((uint64_t)((uint64_t)m_param[1].immediate() * (uint64_t)m_param[2].immediate()));
}
}
break;
@@ -561,9 +561,9 @@ void uml::instruction::simplify()
else if (m_param[2].is_immediate() && m_param[3].is_immediate())
{
if (m_size == 4)
- convert_to_mov_immediate((INT32)((INT32)m_param[1].immediate() * (INT32)m_param[2].immediate()));
+ convert_to_mov_immediate((int32_t)((int32_t)m_param[1].immediate() * (int32_t)m_param[2].immediate()));
else if (m_size == 8)
- convert_to_mov_immediate((INT64)((INT64)m_param[1].immediate() * (INT64)m_param[2].immediate()));
+ convert_to_mov_immediate((int64_t)((int64_t)m_param[1].immediate() * (int64_t)m_param[2].immediate()));
}
}
break;
@@ -577,9 +577,9 @@ void uml::instruction::simplify()
else if (m_param[2].is_immediate() && m_param[3].is_immediate())
{
if (m_size == 4)
- convert_to_mov_immediate((UINT32)((UINT32)m_param[1].immediate() / (UINT32)m_param[2].immediate()));
+ convert_to_mov_immediate((uint32_t)((uint32_t)m_param[1].immediate() / (uint32_t)m_param[2].immediate()));
else if (m_size == 8)
- convert_to_mov_immediate((UINT64)((UINT64)m_param[1].immediate() / (UINT64)m_param[2].immediate()));
+ convert_to_mov_immediate((uint64_t)((uint64_t)m_param[1].immediate() / (uint64_t)m_param[2].immediate()));
}
}
break;
@@ -593,9 +593,9 @@ void uml::instruction::simplify()
else if (m_param[2].is_immediate() && m_param[3].is_immediate())
{
if (m_size == 4)
- convert_to_mov_immediate((INT32)((INT32)m_param[1].immediate() / (INT32)m_param[2].immediate()));
+ convert_to_mov_immediate((int32_t)((int32_t)m_param[1].immediate() / (int32_t)m_param[2].immediate()));
else if (m_size == 8)
- convert_to_mov_immediate((INT64)((INT64)m_param[1].immediate() / (INT64)m_param[2].immediate()));
+ convert_to_mov_immediate((int64_t)((int64_t)m_param[1].immediate() / (int64_t)m_param[2].immediate()));
}
}
break;
@@ -680,9 +680,9 @@ void uml::instruction::simplify()
if (m_param[1].is_immediate() && m_param[2].is_immediate())
{
if (m_size == 4)
- convert_to_mov_immediate((UINT32)m_param[1].immediate() >> m_param[2].immediate());
+ convert_to_mov_immediate((uint32_t)m_param[1].immediate() >> m_param[2].immediate());
else if (m_size == 8)
- convert_to_mov_immediate((UINT64)m_param[1].immediate() >> m_param[2].immediate());
+ convert_to_mov_immediate((uint64_t)m_param[1].immediate() >> m_param[2].immediate());
}
else if (m_param[2].is_immediate_value(0))
convert_to_mov_param(1);
@@ -693,9 +693,9 @@ void uml::instruction::simplify()
if (m_param[1].is_immediate() && m_param[2].is_immediate())
{
if (m_size == 4)
- convert_to_mov_immediate((INT32)m_param[1].immediate() >> m_param[2].immediate());
+ convert_to_mov_immediate((int32_t)m_param[1].immediate() >> m_param[2].immediate());
else if (m_size == 8)
- convert_to_mov_immediate((INT64)m_param[1].immediate() >> m_param[2].immediate());
+ convert_to_mov_immediate((int64_t)m_param[1].immediate() >> m_param[2].immediate());
}
else if (m_param[2].is_immediate_value(0))
convert_to_mov_param(1);
@@ -791,9 +791,9 @@ void uml::instruction::validate()
// instruction
//-------------------------------------------------
-UINT8 uml::instruction::input_flags() const
+uint8_t uml::instruction::input_flags() const
{
- static const UINT8 flags_for_condition[] =
+ static const uint8_t flags_for_condition[] =
{
FLAG_Z, // COND_Z
FLAG_Z, // COND_NZ
@@ -813,7 +813,7 @@ UINT8 uml::instruction::input_flags() const
FLAG_S | FLAG_V // COND_GE
};
- UINT8 flags = s_opcode_info_table[m_opcode].inflags;
+ uint8_t flags = s_opcode_info_table[m_opcode].inflags;
if (flags & 0x80)
flags = m_param[flags - OPFLAGS_P1].immediate() & OPFLAGS_ALL;
if (m_condition != COND_ALWAYS)
@@ -828,9 +828,9 @@ UINT8 uml::instruction::input_flags() const
// instruction
//-------------------------------------------------
-UINT8 uml::instruction::output_flags() const
+uint8_t uml::instruction::output_flags() const
{
- UINT8 flags = s_opcode_info_table[m_opcode].outflags;
+ uint8_t flags = s_opcode_info_table[m_opcode].outflags;
if (flags & 0x80)
flags = m_param[flags - OPFLAGS_P1].immediate() & OPFLAGS_ALL;
return flags;
@@ -843,7 +843,7 @@ UINT8 uml::instruction::output_flags() const
// instruction
//-------------------------------------------------
-UINT8 uml::instruction::modified_flags() const
+uint8_t uml::instruction::modified_flags() const
{
return s_opcode_info_table[m_opcode].modflags;
}
@@ -915,14 +915,14 @@ std::string uml::instruction::disasm(drcuml_state *drcuml) const
}
// truncate to size
- UINT64 value = param.immediate();
- if (size == 1) value = (UINT8)value;
- if (size == 2) value = (UINT16)value;
- if (size == 4) value = (UINT32)value;
- if ((UINT32)value == value)
- util::stream_format(buffer, "$%X", (UINT32)value);
+ uint64_t value = param.immediate();
+ if (size == 1) value = (uint8_t)value;
+ if (size == 2) value = (uint16_t)value;
+ if (size == 4) value = (uint32_t)value;
+ if ((uint32_t)value == value)
+ util::stream_format(buffer, "$%X", (uint32_t)value);
else
- util::stream_format(buffer, "$%X%08X", (UINT32)(value >> 32), (UINT32)value);
+ util::stream_format(buffer, "$%X%08X", (uint32_t)(value >> 32), (uint32_t)value);
}
break;
@@ -972,7 +972,7 @@ std::string uml::instruction::disasm(drcuml_state *drcuml) const
case parameter::PTYPE_MEMORY:
{
const char *symbol;
- UINT32 symoffset;
+ uint32_t symoffset;
// symbol
if (drcuml != nullptr && (symbol = drcuml->symbol_find(param.memory(), &symoffset)) != nullptr)
@@ -985,7 +985,7 @@ std::string uml::instruction::disasm(drcuml_state *drcuml) const
// cache memory
else if (drcuml != nullptr && drcuml->cache().contains_pointer(param.memory()))
- util::stream_format(buffer, "[+$%X]", (UINT32)(uintptr_t)((drccodeptr)param.memory() - drcuml->cache().near()));
+ util::stream_format(buffer, "[+$%X]", (uint32_t)(uintptr_t)((drccodeptr)param.memory() - drcuml->cache().near()));
// general memory
else
diff --git a/src/devices/cpu/uml.h b/src/devices/cpu/uml.h
index 9c2b9a4c80e..a86f8eee82b 100644
--- a/src/devices/cpu/uml.h
+++ b/src/devices/cpu/uml.h
@@ -51,11 +51,11 @@ namespace uml
const int MAPVAR_END = MAPVAR_M0 + MAPVAR_COUNT;
// flag definitions
- const UINT8 FLAG_C = 0x01; // carry flag
- const UINT8 FLAG_V = 0x02; // overflow flag (defined for integer only)
- const UINT8 FLAG_Z = 0x04; // zero flag
- const UINT8 FLAG_S = 0x08; // sign flag (defined for integer only)
- const UINT8 FLAG_U = 0x10; // unordered flag (defined for FP only)
+ const uint8_t FLAG_C = 0x01; // carry flag
+ const uint8_t FLAG_V = 0x02; // overflow flag (defined for integer only)
+ const uint8_t FLAG_Z = 0x04; // zero flag
+ const uint8_t FLAG_S = 0x08; // sign flag (defined for integer only)
+ const uint8_t FLAG_U = 0x10; // unordered flag (defined for FP only)
// testable conditions; note that these are defined such that (condition ^ 1) is
// always the opposite
@@ -260,18 +260,18 @@ namespace uml
{
public:
// construction
- code_label(UINT32 label = 0) : m_label(label) { }
+ code_label(uint32_t label = 0) : m_label(label) { }
// operators
- operator UINT32 &() { return m_label; }
+ operator uint32_t &() { return m_label; }
bool operator==(const code_label &rhs) const { return (m_label == rhs.m_label); }
bool operator!=(const code_label &rhs) const { return (m_label != rhs.m_label); }
// getters
- UINT32 label() const { return m_label; }
+ uint32_t label() const { return m_label; }
private:
- UINT32 m_label;
+ uint32_t m_label;
};
// a parameter for a UML instructon is encoded like this
@@ -300,12 +300,12 @@ namespace uml
};
// represents the value of an opcode parameter
- typedef UINT64 parameter_value;
+ typedef uint64_t parameter_value;
// construction
parameter() : m_type(PTYPE_NONE), m_value(0) { }
parameter(const parameter &param) : m_type(param.m_type), m_value(param.m_value) { }
- parameter(UINT64 val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
+ parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
parameter(operand_size size, memory_scale scale) : m_type(PTYPE_SIZE_SCALE), m_value((scale << 4) | size) { assert(size >= SIZE_BYTE && size <= SIZE_DQWORD); assert(scale >= SCALE_x1 && scale <= SCALE_x8); }
parameter(operand_size size, memory_space space) : m_type(PTYPE_SIZE_SPACE), m_value((space << 4) | size) { assert(size >= SIZE_BYTE && size <= SIZE_DQWORD); assert(space >= SPACE_PROGRAM && space <= SPACE_IO); }
parameter(code_handle &handle) : m_type(PTYPE_CODE_HANDLE), m_value(reinterpret_cast<parameter_value>(&handle)) { }
@@ -329,7 +329,7 @@ namespace uml
// getters
parameter_type type() const { return m_type; }
- UINT64 immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
+ uint64_t immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
int ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value >= REG_I0 && m_value < REG_I_END); return m_value; }
int freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value >= REG_F0 && m_value < REG_F_END); return m_value; }
int vreg() const { assert(m_type == PTYPE_VECTOR_REGISTER); assert(m_value >= REG_V0 && m_value < REG_V_END); return m_value; }
@@ -361,7 +361,7 @@ namespace uml
bool is_string() const { return (m_type == PTYPE_STRING); }
// other queries
- bool is_immediate_value(UINT64 value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
+ bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
private:
// private constructor
@@ -377,18 +377,18 @@ namespace uml
{
struct parameter_info
{
- UINT8 output; // input or output?
- UINT8 size; // size of the parameter
- UINT16 typemask; // types allowed
+ uint8_t output; // input or output?
+ uint8_t size; // size of the parameter
+ uint16_t typemask; // types allowed
};
opcode_t opcode; // the opcode itself
const char * mnemonic; // mnemonic string
- UINT8 sizes; // allowed sizes
+ uint8_t sizes; // allowed sizes
bool condition; // conditions allowed?
- UINT8 inflags; // input flags
- UINT8 outflags; // output flags
- UINT8 modflags; // modified flags
+ uint8_t inflags; // input flags
+ uint8_t outflags; // output flags
+ uint8_t modflags; // modified flags
parameter_info param[4]; // information about parameters
};
@@ -402,32 +402,32 @@ namespace uml
// getters
opcode_t opcode() const { return m_opcode; }
condition_t condition() const { return m_condition; }
- UINT8 flags() const { return m_flags; }
- UINT8 size() const { return m_size; }
- UINT8 numparams() const { return m_numparams; }
+ uint8_t flags() const { return m_flags; }
+ uint8_t size() const { return m_size; }
+ uint8_t numparams() const { return m_numparams; }
const parameter &param(int index) const { assert(index < m_numparams); return m_param[index]; }
// setters
- void set_flags(UINT8 flags) { m_flags = flags; }
- void set_mapvar(int paramnum, UINT32 value) { assert(paramnum < m_numparams); assert(m_param[paramnum].is_mapvar()); m_param[paramnum] = value; }
+ void set_flags(uint8_t flags) { m_flags = flags; }
+ void set_mapvar(int paramnum, uint32_t value) { assert(paramnum < m_numparams); assert(m_param[paramnum].is_mapvar()); m_param[paramnum] = value; }
// misc
std::string disasm(drcuml_state *drcuml = nullptr) const;
- UINT8 input_flags() const;
- UINT8 output_flags() const;
- UINT8 modified_flags() const;
+ uint8_t input_flags() const;
+ uint8_t output_flags() const;
+ uint8_t modified_flags() const;
void simplify();
// compile-time opcodes
void handle(code_handle &hand) { configure(OP_HANDLE, 4, hand); }
- void hash(UINT32 mode, UINT32 pc) { configure(OP_HASH, 4, mode, pc); }
+ void hash(uint32_t mode, uint32_t pc) { configure(OP_HASH, 4, mode, pc); }
void label(code_label lab) { configure(OP_LABEL, 4, lab); }
void comment(const char *string) { configure(OP_COMMENT, 4, parameter::make_string(string)); }
- void mapvar(parameter mapvar, UINT32 value) { assert(mapvar.is_mapvar()); configure(OP_MAPVAR, 4, mapvar, value); }
+ void mapvar(parameter mapvar, uint32_t value) { assert(mapvar.is_mapvar()); configure(OP_MAPVAR, 4, mapvar, value); }
// control flow operations
void nop() { configure(OP_NOP, 4); }
- void debug(UINT32 pc) { configure(OP_DEBUG, 4, pc); }
+ void debug(uint32_t pc) { configure(OP_DEBUG, 4, pc); }
void exit(parameter param) { configure(OP_EXIT, 4, param); }
void exit(condition_t cond, parameter param) { configure(OP_EXIT, 4, param, cond); }
void hashjmp(parameter mode, parameter pc, code_handle &handle) { configure(OP_HASHJMP, 4, mode, pc, handle); }
@@ -447,7 +447,7 @@ namespace uml
void setfmod(parameter mode) { configure(OP_SETFMOD, 4, mode); }
void getfmod(parameter dst) { configure(OP_GETFMOD, 4, dst); }
void getexp(parameter dst) { configure(OP_GETEXP, 4, dst); }
- void getflgs(parameter dst, UINT32 flags) { configure(OP_GETFLGS, 4, dst, flags); }
+ void getflgs(parameter dst, uint32_t flags) { configure(OP_GETFLGS, 4, dst, flags); }
void save(drcuml_machine_state *dst) { configure(OP_SAVE, 4, parameter::make_memory(dst)); }
void restore(drcuml_machine_state *src) { configure(OP_RESTORE, 4, parameter::make_memory(src)); }
@@ -581,23 +581,23 @@ namespace uml
private:
// internal configuration
- void configure(opcode_t op, UINT8 size, condition_t cond = COND_ALWAYS);
- void configure(opcode_t op, UINT8 size, parameter p0, condition_t cond = COND_ALWAYS);
- void configure(opcode_t op, UINT8 size, parameter p0, parameter p1, condition_t cond = COND_ALWAYS);
- void configure(opcode_t op, UINT8 size, parameter p0, parameter p1, parameter p2, condition_t cond = COND_ALWAYS);
- void configure(opcode_t op, UINT8 size, parameter p0, parameter p1, parameter p2, parameter p3, condition_t cond = COND_ALWAYS);
+ void configure(opcode_t op, uint8_t size, condition_t cond = COND_ALWAYS);
+ void configure(opcode_t op, uint8_t size, parameter p0, condition_t cond = COND_ALWAYS);
+ void configure(opcode_t op, uint8_t size, parameter p0, parameter p1, condition_t cond = COND_ALWAYS);
+ void configure(opcode_t op, uint8_t size, parameter p0, parameter p1, parameter p2, condition_t cond = COND_ALWAYS);
+ void configure(opcode_t op, uint8_t size, parameter p0, parameter p1, parameter p2, parameter p3, condition_t cond = COND_ALWAYS);
// opcode validation and simplification
void validate();
- void convert_to_mov_immediate(UINT64 immediate) { m_opcode = OP_MOV; m_numparams = 2; m_param[1] = immediate; }
+ void convert_to_mov_immediate(uint64_t immediate) { m_opcode = OP_MOV; m_numparams = 2; m_param[1] = immediate; }
void convert_to_mov_param(int pnum) { m_opcode = OP_MOV; m_numparams = 2; m_param[1] = m_param[pnum]; }
// internal state
opcode_t m_opcode; // opcode
condition_t m_condition; // condition
- UINT8 m_flags; // flags
- UINT8 m_size; // operation size
- UINT8 m_numparams; // number of parameters
+ uint8_t m_flags; // flags
+ uint8_t m_size; // operation size
+ uint8_t m_numparams; // number of parameters
parameter m_param[MAX_PARAMS];// up to 4 parameters
static const opcode_info s_opcode_info_table[OP_MAX];
@@ -606,9 +606,9 @@ namespace uml
// structure describing rules for parameter encoding
struct parameter_info
{
- UINT8 output; // input or output?
- UINT8 size; // size of the parameter
- UINT16 typemask; // types allowed
+ uint8_t output; // input or output?
+ uint8_t size; // size of the parameter
+ uint16_t typemask; // types allowed
};
// global inline functions to specify a register parameter by index
diff --git a/src/devices/cpu/unsp/unsp.cpp b/src/devices/cpu/unsp/unsp.cpp
index 12bdc67078c..11500ba0e48 100644
--- a/src/devices/cpu/unsp/unsp.cpp
+++ b/src/devices/cpu/unsp/unsp.cpp
@@ -16,14 +16,14 @@
const device_type UNSP = &device_creator<unsp_device>;
-unsp_device::unsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+unsp_device::unsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, UNSP, "u'nSP", tag, owner, clock, "unsp", __FILE__)
, m_program_config("program", ENDIANNESS_BIG, 16, 23, -1), m_irq(0), m_fiq(0), m_curirq(0), m_sirq(0), m_sb(0), m_saved_sb(0), m_program(nullptr), m_icount(0), m_debugger_temp(0)
{
}
-offs_t unsp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t unsp_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( unsp );
return CPU_DISASSEMBLE_NAME(unsp)(this, buffer, pc, oprom, opram, options);
@@ -95,24 +95,24 @@ offs_t unsp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
#define WRITEBACK_OPA \
if(OP0 != 4 && OP0 < 12) \
{ \
- UNSP_REG_I(OPA) = (UINT16)lres; \
+ UNSP_REG_I(OPA) = (uint16_t)lres; \
}
/*****************************************************************************/
-void unsp_device::unimplemented_opcode(UINT16 op)
+void unsp_device::unimplemented_opcode(uint16_t op)
{
fatalerror("UNSP: unknown opcode %04x at %04x\n", op, UNSP_LPC);
}
/*****************************************************************************/
-UINT16 unsp_device::READ16(UINT32 address)
+uint16_t unsp_device::READ16(uint32_t address)
{
return m_program->read_word(address<<1);
}
-void unsp_device::WRITE16(UINT32 address, UINT16 data)
+void unsp_device::WRITE16(uint32_t address, uint16_t data)
{
m_program->write_word(address<<1, data);
}
@@ -121,7 +121,7 @@ void unsp_device::WRITE16(UINT32 address, UINT16 data)
void unsp_device::device_start()
{
- memset(m_r, 0, sizeof(UINT16) * UNSP_GPR_COUNT);
+ memset(m_r, 0, sizeof(uint16_t) * UNSP_GPR_COUNT);
m_irq = 0;
m_fiq = 0;
m_curirq = 0;
@@ -175,7 +175,7 @@ void unsp_device::state_import(const device_state_entry &entry)
void unsp_device::device_reset()
{
- memset(m_r, 0, sizeof(UINT16) * UNSP_GPR_COUNT);
+ memset(m_r, 0, sizeof(uint16_t) * UNSP_GPR_COUNT);
UNSP_REG(PC) = READ16(0xfff7);
m_irq = 0;
@@ -184,49 +184,49 @@ void unsp_device::device_reset()
/*****************************************************************************/
-void unsp_device::unsp_update_nz(UINT32 value)
+void unsp_device::unsp_update_nz(uint32_t value)
{
UNSP_REG(SR) &= ~(UNSP_N | UNSP_Z);
if(value & 0x8000)
{
UNSP_REG(SR) |= UNSP_N;
}
- if((UINT16)value == 0)
+ if((uint16_t)value == 0)
{
UNSP_REG(SR) |= UNSP_Z;
}
}
-void unsp_device::unsp_update_nzsc(UINT32 value, UINT16 r0, UINT16 r1)
+void unsp_device::unsp_update_nzsc(uint32_t value, uint16_t r0, uint16_t r1)
{
UNSP_REG(SR) &= ~(UNSP_C | UNSP_S);
unsp_update_nz(value);
- if(value != (UINT16)value)
+ if(value != (uint16_t)value)
{
UNSP_REG(SR) |= UNSP_C;
}
- if((INT16)r0 < (INT16)r1)
+ if((int16_t)r0 < (int16_t)r1)
{
UNSP_REG(SR) |= UNSP_S;
}
}
-void unsp_device::unsp_push(UINT16 value, UINT16 *reg)
+void unsp_device::unsp_push(uint16_t value, uint16_t *reg)
{
WRITE16((*reg)--, value);
}
-UINT16 unsp_device::unsp_pop(UINT16 *reg)
+uint16_t unsp_device::unsp_pop(uint16_t *reg)
{
return READ16(++(*reg));
}
void unsp_device::execute_run()
{
- UINT32 op;
- UINT32 lres;
- UINT16 r0, r1;
+ uint32_t op;
+ uint32_t lres;
+ uint16_t r0, r1;
lres = 0;
while (m_icount > 0)
@@ -547,7 +547,7 @@ void unsp_device::execute_run()
}
if(OP0 != 4 && OP0 < 12)
{
- WRITE16(READ16(UNSP_LPC), (UINT16)lres);
+ WRITE16(READ16(UNSP_LPC), (uint16_t)lres);
}
UNSP_REG(PC)++;
break;
@@ -555,7 +555,7 @@ void unsp_device::execute_run()
// ALU, Shifted
default:
{
- UINT32 shift = (UNSP_REG_I(OPB) << 4) | m_sb;
+ uint32_t shift = (UNSP_REG_I(OPB) << 4) | m_sb;
if(shift & 0x80000)
{
shift |= 0xf00000;
@@ -607,8 +607,8 @@ void unsp_device::execute_run()
case 9: // load r, r >> imm2
lres = ((UNSP_REG_I(OPB) << 4) | m_sb) >> (OPN - 3);
m_sb = lres & 0x0f;
- unsp_update_nz((UINT16)(lres >> 4));
- UNSP_REG_I(OPA) = (UINT16)(lres >> 4);
+ unsp_update_nz((uint16_t)(lres >> 4));
+ UNSP_REG_I(OPA) = (uint16_t)(lres >> 4);
break;
default:
unimplemented_opcode(op);
@@ -617,7 +617,7 @@ void unsp_device::execute_run()
}
else
{
- UINT32 shift = ((m_sb << 16) | UNSP_REG_I(OPB)) << (OPN + 1);
+ uint32_t shift = ((m_sb << 16) | UNSP_REG_I(OPB)) << (OPN + 1);
m_sb = (shift >> 16) & 0x0f;
r0 = UNSP_REG_I(OPA);
r1 = shift & 0x0000ffff;
@@ -627,17 +627,17 @@ void unsp_device::execute_run()
case 0: // add r, r << imm2
lres = r0 + r1;
unsp_update_nzsc(lres, r0, r1);
- UNSP_REG_I(OPA) = (UINT16)lres;
+ UNSP_REG_I(OPA) = (uint16_t)lres;
break;
case 9: // load r, r << imm2
lres = r1;
unsp_update_nz(lres);
- UNSP_REG_I(OPA) = (UINT16)lres;
+ UNSP_REG_I(OPA) = (uint16_t)lres;
break;
case 10: // or r, r << imm2
lres = r0 | r1;
unsp_update_nz(lres);
- UNSP_REG_I(OPA) = (UINT16)lres;
+ UNSP_REG_I(OPA) = (uint16_t)lres;
break;
default:
unimplemented_opcode(op);
@@ -652,13 +652,13 @@ void unsp_device::execute_run()
{
lres = ((((m_sb << 16) | UNSP_REG_I(OPB)) << 4) | m_sb) >> (OPN - 3);
m_sb = lres & 0x0f;
- r1 = (UINT16)(lres >> 4);
+ r1 = (uint16_t)(lres >> 4);
}
else
{
lres = ((((m_sb << 16) | UNSP_REG_I(OPB)) << 4) | m_sb) << (OPN + 1);
m_sb = (lres >> 20) & 0x0f;
- r1 = (UINT16)(lres >> 4);
+ r1 = (uint16_t)(lres >> 4);
}
switch(OP0)
@@ -717,7 +717,7 @@ void unsp_device::execute_run()
lres -= UNSP_REG_I(OPA) << 16;
}
UNSP_REG(R4) = lres >> 16;
- UNSP_REG(R3) = (UINT16)lres;
+ UNSP_REG(R3) = (uint16_t)lres;
break;
}
else
@@ -740,7 +740,7 @@ void unsp_device::execute_run()
lres -= UNSP_REG_I(OPB) << 16;
}
UNSP_REG(R4) = lres >> 16;
- UNSP_REG(R3) = (UINT16)lres;
+ UNSP_REG(R3) = (uint16_t)lres;
break;
}
else
@@ -805,7 +805,7 @@ void unsp_device::execute_run()
void unsp_device::execute_set_input(int irqline, int state)
{
- UINT16 irq_vector = 0;
+ uint16_t irq_vector = 0;
m_sirq &= ~(1 << irqline);
diff --git a/src/devices/cpu/unsp/unsp.h b/src/devices/cpu/unsp/unsp.h
index 6424016cf3b..69e1ad962b0 100644
--- a/src/devices/cpu/unsp/unsp.h
+++ b/src/devices/cpu/unsp/unsp.h
@@ -53,7 +53,7 @@ class unsp_device : public cpu_device
{
public:
// construction/destruction
- unsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ unsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -61,9 +61,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 5; }
- virtual UINT32 execute_max_cycles() const override { return 5; }
- virtual UINT32 execute_input_lines() const override { return 0; }
+ virtual uint32_t execute_min_cycles() const override { return 5; }
+ virtual uint32_t execute_max_cycles() const override { return 5; }
+ virtual uint32_t execute_input_lines() const override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -75,33 +75,33 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
- UINT16 m_r[16];
- UINT8 m_irq;
- UINT8 m_fiq;
- UINT16 m_curirq;
- UINT16 m_sirq;
- UINT8 m_sb;
- UINT8 m_saved_sb;
+ uint16_t m_r[16];
+ uint8_t m_irq;
+ uint8_t m_fiq;
+ uint16_t m_curirq;
+ uint16_t m_sirq;
+ uint8_t m_sb;
+ uint8_t m_saved_sb;
address_space *m_program;
int m_icount;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
- void unimplemented_opcode(UINT16 op);
- inline UINT16 READ16(UINT32 address);
- inline void WRITE16(UINT32 address, UINT16 data);
- inline void unsp_update_nz(UINT32 value);
- inline void unsp_update_nzsc(UINT32 value, UINT16 r0, UINT16 r1);
- inline void unsp_push(UINT16 value, UINT16 *reg);
- inline UINT16 unsp_pop(UINT16 *reg);
+ void unimplemented_opcode(uint16_t op);
+ inline uint16_t READ16(uint32_t address);
+ inline void WRITE16(uint32_t address, uint16_t data);
+ inline void unsp_update_nz(uint32_t value);
+ inline void unsp_update_nzsc(uint32_t value, uint16_t r0, uint16_t r1);
+ inline void unsp_push(uint16_t value, uint16_t *reg);
+ inline uint16_t unsp_pop(uint16_t *reg);
};
diff --git a/src/devices/cpu/unsp/unspdasm.cpp b/src/devices/cpu/unsp/unspdasm.cpp
index 34f153fc916..50ae51c29a9 100644
--- a/src/devices/cpu/unsp/unspdasm.cpp
+++ b/src/devices/cpu/unsp/unspdasm.cpp
@@ -59,8 +59,8 @@ static const char *alu[] =
CPU_DISASSEMBLE( unsp )
{
- UINT16 op = *(UINT16 *)oprom;
- UINT16 imm16 = *(UINT16 *)(oprom + 2);
+ uint16_t op = *(uint16_t *)oprom;
+ uint16_t imm16 = *(uint16_t *)(oprom + 2);
op = big_endianize_int16(op);
imm16 = big_endianize_int16(imm16);
diff --git a/src/devices/cpu/upd7725/dasm7725.cpp b/src/devices/cpu/upd7725/dasm7725.cpp
index 987002412ac..8edeb821e53 100644
--- a/src/devices/cpu/upd7725/dasm7725.cpp
+++ b/src/devices/cpu/upd7725/dasm7725.cpp
@@ -15,22 +15,22 @@
CPU_DISASSEMBLE( upd7725 )
{
static char output[256];
- UINT32 opcode = oprom[2] | (oprom[1] << 8) | (oprom[0] << 16);
- UINT32 type = (opcode >> 22);
+ uint32_t opcode = oprom[2] | (oprom[1] << 8) | (oprom[0] << 16);
+ uint32_t type = (opcode >> 22);
// printf("dasm: PC %x opcode %08x\n", pc, opcode);
memset(output, 0, sizeof(output));
if(type == 0 || type == 1) { //OP,RT
- UINT8 pselect = (opcode >> 20)&0x3; //P select
- UINT8 alu = (opcode >> 16)&0xf; //ALU operation mode
- UINT8 asl = (opcode >> 15)&0x1; //accumulator select
- UINT8 dpl = (opcode >> 13)&0x3; //DP low modify
- UINT8 dphm = (opcode >> 9)&0xf; //DP high XOR modify
- UINT8 rpdcr = (opcode >> 8)&0x1; //RP decrement
- UINT8 src = (opcode >> 4)&0xf; //move source
- UINT8 dst = (opcode >> 0)&0xf; //move destination
+ uint8_t pselect = (opcode >> 20)&0x3; //P select
+ uint8_t alu = (opcode >> 16)&0xf; //ALU operation mode
+ uint8_t asl = (opcode >> 15)&0x1; //accumulator select
+ uint8_t dpl = (opcode >> 13)&0x3; //DP low modify
+ uint8_t dphm = (opcode >> 9)&0xf; //DP high XOR modify
+ uint8_t rpdcr = (opcode >> 8)&0x1; //RP decrement
+ uint8_t src = (opcode >> 4)&0xf; //move source
+ uint8_t dst = (opcode >> 0)&0xf; //move destination
switch(alu) {
case 0: strcat(output, "nop "); break;
@@ -147,8 +147,8 @@ CPU_DISASSEMBLE( upd7725 )
}
if(type == 2) { //JP
- UINT16 brch = (opcode >> 13) & 0x1ff; //branch
- UINT16 na = (opcode >> 2) & 0x7ff; //next address
+ uint16_t brch = (opcode >> 13) & 0x1ff; //branch
+ uint16_t na = (opcode >> 2) & 0x7ff; //next address
switch(brch) {
case 0x000: strcat(output, "jmpso "); break;
@@ -201,8 +201,8 @@ CPU_DISASSEMBLE( upd7725 )
if(type == 3) { //LD
strcat(output, "ld ");
- UINT16 id = opcode >> 6;
- UINT8 dst = (opcode >> 0) & 0xf; //destination
+ uint16_t id = opcode >> 6;
+ uint8_t dst = (opcode >> 0) & 0xf; //destination
char temp[16];
sprintf(temp, "$%x,", id);
diff --git a/src/devices/cpu/upd7725/upd7725.cpp b/src/devices/cpu/upd7725/upd7725.cpp
index 9564d380bc9..841d9322050 100644
--- a/src/devices/cpu/upd7725/upd7725.cpp
+++ b/src/devices/cpu/upd7725/upd7725.cpp
@@ -24,7 +24,7 @@
const device_type UPD7725 = &device_creator<upd7725_device>;
const device_type UPD96050 = &device_creator<upd96050_device>;
-necdsp_device::necdsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock, UINT32 abits, UINT32 dbits, const char *name, const char *shortname, const char *source)
+necdsp_device::necdsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t abits, uint32_t dbits, const char *name, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, 32, abits, -2), // data bus width, address bus width, -2 means DWORD-addressable
m_data_config("data", ENDIANNESS_BIG, 16, dbits, -1), m_icount(0), // -1 for WORD-addressable
@@ -47,12 +47,12 @@ necdsp_device::necdsp_device(const machine_config &mconfig, device_type type, co
}
-upd7725_device::upd7725_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd7725_device::upd7725_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: necdsp_device(mconfig, UPD7725, tag, owner, clock, 11, 11, "uPD7725", "upd7725", __FILE__)
{
}
-upd96050_device::upd96050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd96050_device::upd96050_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: necdsp_device(mconfig, UPD96050, tag, owner, clock, 14, 12, "uPD96050", "upd96050", __FILE__)
{
}
@@ -238,7 +238,7 @@ void necdsp_device::state_string_export(const device_state_entry &entry, std::st
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 necdsp_device::execute_min_cycles() const
+uint32_t necdsp_device::execute_min_cycles() const
{
return 4;
}
@@ -249,7 +249,7 @@ UINT32 necdsp_device::execute_min_cycles() const
// cycles it takes for one instruction to execute
//-------------------------------------------------
-UINT32 necdsp_device::execute_max_cycles() const
+uint32_t necdsp_device::execute_max_cycles() const
{
return 4;
}
@@ -260,7 +260,7 @@ UINT32 necdsp_device::execute_max_cycles() const
// input/interrupt lines
//-------------------------------------------------
-UINT32 necdsp_device::execute_input_lines() const
+uint32_t necdsp_device::execute_input_lines() const
{
return 3; // TODO: there should be 11: INT, SCK, /SIEN, /SOEN, SI, and /DACK, plus SO, /SORQ and DRQ; for now, just INT, P0, and P1 are enough.
}
@@ -287,7 +287,7 @@ void necdsp_device::execute_set_input(int inputnum, int state)
// of the shortest instruction, in bytes
//-------------------------------------------------
-UINT32 necdsp_device::disasm_min_opcode_bytes() const
+uint32_t necdsp_device::disasm_min_opcode_bytes() const
{
return 4;
}
@@ -298,7 +298,7 @@ UINT32 necdsp_device::disasm_min_opcode_bytes() const
// of the longest instruction, in bytes
//-------------------------------------------------
-UINT32 necdsp_device::disasm_max_opcode_bytes() const
+uint32_t necdsp_device::disasm_max_opcode_bytes() const
{
return 4;
}
@@ -308,7 +308,7 @@ UINT32 necdsp_device::disasm_max_opcode_bytes() const
// helper function
//-------------------------------------------------
-offs_t necdsp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t necdsp_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( upd7725 );
return CPU_DISASSEMBLE_NAME(upd7725)(this, buffer, pc, oprom, opram, options);
@@ -316,7 +316,7 @@ offs_t necdsp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
void necdsp_device::execute_run()
{
- UINT32 opcode;
+ uint32_t opcode;
do
{
@@ -336,7 +336,7 @@ void necdsp_device::execute_run()
case 3: exec_ld(opcode); break;
}
- INT32 result = (INT32)regs.k * regs.l; //sign + 30-bit result
+ int32_t result = (int32_t)regs.k * regs.l; //sign + 30-bit result
regs.m = result >> 15; //store sign + top 15-bits
regs.n = result << 1; //store low 15-bits + zero
@@ -345,15 +345,15 @@ void necdsp_device::execute_run()
} while (m_icount > 0);
}
-void necdsp_device::exec_op(UINT32 opcode) {
- UINT8 pselect = (opcode >> 20)&0x3; //P select
- UINT8 alu = (opcode >> 16)&0xf; //ALU operation mode
- UINT8 asl = (opcode >> 15)&0x1; //accumulator select
- UINT8 dpl = (opcode >> 13)&0x3; //DP low modify
- UINT8 dphm = (opcode >> 9)&0xf; //DP high XOR modify
- UINT8 rpdcr = (opcode >> 8)&0x1; //RP decrement
- UINT8 src = (opcode >> 4)&0xf; //move source
- UINT8 dst = (opcode >> 0)&0xf; //move destination
+void necdsp_device::exec_op(uint32_t opcode) {
+ uint8_t pselect = (opcode >> 20)&0x3; //P select
+ uint8_t alu = (opcode >> 16)&0xf; //ALU operation mode
+ uint8_t asl = (opcode >> 15)&0x1; //accumulator select
+ uint8_t dpl = (opcode >> 13)&0x3; //DP low modify
+ uint8_t dphm = (opcode >> 9)&0xf; //DP high XOR modify
+ uint8_t rpdcr = (opcode >> 8)&0x1; //RP decrement
+ uint8_t src = (opcode >> 4)&0xf; //move source
+ uint8_t dst = (opcode >> 0)&0xf; //move destination
switch(src) {
case 0: regs.idb = regs.trb; break;
@@ -375,7 +375,7 @@ void necdsp_device::exec_op(UINT32 opcode) {
}
if(alu) {
- UINT16 p=0, q=0, r=0;
+ uint16_t p=0, q=0, r=0;
Flag flag;
bool c=0;
@@ -474,19 +474,19 @@ void necdsp_device::exec_op(UINT32 opcode) {
if(rpdcr) regs.rp--;
}
-void necdsp_device::exec_rt(UINT32 opcode) {
+void necdsp_device::exec_rt(uint32_t opcode) {
exec_op(opcode);
regs.pc = regs.stack[--regs.sp];
regs.sp &= 0xf;
}
-void necdsp_device::exec_jp(UINT32 opcode) {
- UINT16 brch = (opcode >> 13) & 0x1ff; //branch
- UINT16 na = (opcode >> 2) & 0x7ff; //next address
- UINT16 bank = (opcode >> 0) & 0x3; //bank address
+void necdsp_device::exec_jp(uint32_t opcode) {
+ uint16_t brch = (opcode >> 13) & 0x1ff; //branch
+ uint16_t na = (opcode >> 2) & 0x7ff; //next address
+ uint16_t bank = (opcode >> 0) & 0x3; //bank address
- UINT16 jps = (regs.pc & 0x2000) | (bank << 11) | (na << 0);
- UINT16 jpl = (bank << 11) | (na << 0);
+ uint16_t jps = (regs.pc & 0x2000) | (bank << 11) | (na << 0);
+ uint16_t jpl = (bank << 11) | (na << 0);
switch(brch) {
case 0x000: regs.pc = regs.so; return; //JMPSO
@@ -537,9 +537,9 @@ void necdsp_device::exec_jp(UINT32 opcode) {
}
}
-void necdsp_device::exec_ld(UINT32 opcode) {
- UINT16 id = opcode >> 6; //immediate data
- UINT8 dst = (opcode >> 0) & 0xf; //destination
+void necdsp_device::exec_ld(uint32_t opcode) {
+ uint16_t id = opcode >> 6; //immediate data
+ uint8_t dst = (opcode >> 0) & 0xf; //destination
regs.idb = id;
@@ -566,7 +566,7 @@ void necdsp_device::exec_ld(UINT32 opcode) {
}
}
-UINT8 necdsp_device::snesdsp_read(bool mode) {
+uint8_t necdsp_device::snesdsp_read(bool mode) {
if (!mode)
{
return regs.sr >> 8;
@@ -595,7 +595,7 @@ UINT8 necdsp_device::snesdsp_read(bool mode) {
}
}
-void necdsp_device::snesdsp_write(bool mode, UINT8 data) {
+void necdsp_device::snesdsp_write(bool mode, uint8_t data) {
if (!mode) return;
if (regs.sr.drc == 0)
diff --git a/src/devices/cpu/upd7725/upd7725.h b/src/devices/cpu/upd7725/upd7725.h
index 94a7f85869f..80714d376eb 100644
--- a/src/devices/cpu/upd7725/upd7725.h
+++ b/src/devices/cpu/upd7725/upd7725.h
@@ -73,7 +73,7 @@ class necdsp_device : public cpu_device
{
protected:
// construction/destruction
- necdsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock, UINT32 abits, UINT32 dbits, const char *name, const char *shortname, const char *source);
+ necdsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t abits, uint32_t dbits, const char *name, const char *shortname, const char *source);
public:
@@ -89,8 +89,8 @@ public:
//template<class _Object> static devcb_base &set_out_sorq_callback(device_t &device, _Object object) { return downcast<necdsp_device &>(device).m_out_sorq_cb.set_callback(object); }
//template<class _Object> static devcb_base &set_out_drq_callback(device_t &device, _Object object) { return downcast<necdsp_device &>(device).m_out_drq_cb.set_callback(object); }
- UINT8 snesdsp_read(bool mode);
- void snesdsp_write(bool mode, UINT8 data);
+ uint8_t snesdsp_read(bool mode);
+ void snesdsp_write(bool mode, uint8_t data);
protected:
// device-level overrides
@@ -98,9 +98,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -113,14 +113,14 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// inline data
const address_space_config m_program_config, m_data_config;
- UINT16 dataRAM[2048];
+ uint16_t dataRAM[2048];
private:
struct Flag
@@ -161,32 +161,32 @@ private:
struct Regs
{
- UINT16 pc; //program counter
- UINT16 stack[16]; //LIFO
- UINT16 rp; //ROM pointer
- UINT16 dp; //data pointer
- UINT8 sp; //stack pointer
- INT16 k;
- INT16 l;
- INT16 m;
- INT16 n;
- INT16 a; //accumulator
- INT16 b; //accumulator
+ uint16_t pc; //program counter
+ uint16_t stack[16]; //LIFO
+ uint16_t rp; //ROM pointer
+ uint16_t dp; //data pointer
+ uint8_t sp; //stack pointer
+ int16_t k;
+ int16_t l;
+ int16_t m;
+ int16_t n;
+ int16_t a; //accumulator
+ int16_t b; //accumulator
Flag flaga;
Flag flagb;
- UINT16 tr; //temporary register
- UINT16 trb; //temporary register
+ uint16_t tr; //temporary register
+ uint16_t trb; //temporary register
Status sr; //status register
- UINT16 dr; //data register
- UINT16 si;
- UINT16 so;
- UINT16 idb;
+ uint16_t dr; //data register
+ uint16_t si;
+ uint16_t so;
+ uint16_t idb;
} regs;
- void exec_op(UINT32 opcode);
- void exec_rt(UINT32 opcode);
- void exec_jp(UINT32 opcode);
- void exec_ld(UINT32 opcode);
+ void exec_op(uint32_t opcode);
+ void exec_rt(uint32_t opcode);
+ void exec_jp(uint32_t opcode);
+ void exec_ld(uint32_t opcode);
int m_icount;
int m_irq; // old irq line state, for detecting rising edges.
@@ -213,17 +213,17 @@ class upd7725_device : public necdsp_device
{
public:
// construction/destruction
- upd7725_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd7725_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class upd96050_device : public necdsp_device
{
public:
// construction/destruction
- upd96050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd96050_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- UINT16 dataram_r(UINT16 addr) { return dataRAM[addr]; }
- void dataram_w(UINT16 addr, UINT16 data) { dataRAM[addr] = data; }
+ uint16_t dataram_r(uint16_t addr) { return dataRAM[addr]; }
+ void dataram_w(uint16_t addr, uint16_t data) { dataRAM[addr] = data; }
};
// device type definition
diff --git a/src/devices/cpu/upd7810/upd7810.cpp b/src/devices/cpu/upd7810/upd7810.cpp
index 9722ba360b3..ba375d196e1 100644
--- a/src/devices/cpu/upd7810/upd7810.cpp
+++ b/src/devices/cpu/upd7810/upd7810.cpp
@@ -381,7 +381,7 @@ const device_type UPD78C05 = &device_creator<upd78c05_device>;
const device_type UPD78C06 = &device_creator<upd78c06_device>;
-upd7810_device::upd7810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd7810_device::upd7810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, UPD7810, "uPD7810", tag, owner, clock, "upd7810", __FILE__)
, m_to_func(*this)
, m_co0_func(*this)
@@ -409,7 +409,7 @@ upd7810_device::upd7810_device(const machine_config &mconfig, const char *tag, d
m_op74 = s_op74;
}
-upd7810_device::upd7810_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+upd7810_device::upd7810_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_to_func(*this)
, m_co0_func(*this)
@@ -429,7 +429,7 @@ upd7810_device::upd7810_device(const machine_config &mconfig, device_type type,
{
}
-upd7807_device::upd7807_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd7807_device::upd7807_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upd7810_device(mconfig, UPD7807, "uPD7807", tag, owner, clock, "upd7807", __FILE__)
{
m_opXX = s_opXX_7807;
@@ -442,7 +442,7 @@ upd7807_device::upd7807_device(const machine_config &mconfig, const char *tag, d
m_op74 = s_op74;
}
-upd7801_device::upd7801_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd7801_device::upd7801_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upd7810_device(mconfig, UPD7801, "uPD7801", tag, owner, clock, "upd7801", __FILE__)
{
m_op48 = s_op48_7801;
@@ -455,7 +455,7 @@ upd7801_device::upd7801_device(const machine_config &mconfig, const char *tag, d
m_opXX = s_opXX_7801;
}
-upd78c05_device::upd78c05_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd78c05_device::upd78c05_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upd7810_device(mconfig, UPD78C05, "uPD78C05", tag, owner, clock, "upd78c05", __FILE__)
{
m_op48 = s_op48_78c05;
@@ -468,12 +468,12 @@ upd78c05_device::upd78c05_device(const machine_config &mconfig, const char *tag,
m_opXX = s_opXX_78c05;
}
-upd78c05_device::upd78c05_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+upd78c05_device::upd78c05_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: upd7810_device(mconfig, type, name, tag, owner, clock, shortname, source)
{
}
-upd78c06_device::upd78c06_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+upd78c06_device::upd78c06_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: upd78c05_device(mconfig, UPD78C06, "uPD78C06", tag, owner, clock, "upd78c06", __FILE__)
{
m_op48 = s_op48_78c06;
@@ -486,33 +486,33 @@ upd78c06_device::upd78c06_device(const machine_config &mconfig, const char *tag,
m_opXX = s_opXX_78c06;
}
-offs_t upd7810_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t upd7810_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( upd7810 );
return CPU_DISASSEMBLE_NAME(upd7810)(this, buffer, pc, oprom, opram, options);
}
-offs_t upd7807_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t upd7807_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( upd7807 );
return CPU_DISASSEMBLE_NAME(upd7807)(this, buffer, pc, oprom, opram, options);
}
-offs_t upd7801_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t upd7801_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( upd7801 );
return CPU_DISASSEMBLE_NAME(upd7801)(this, buffer, pc, oprom, opram, options);
}
-offs_t upd78c05_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t upd78c05_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( upd78c05 );
return CPU_DISASSEMBLE_NAME(upd78c05)(this, buffer, pc, oprom, opram, options);
}
-UINT8 upd7810_device::RP(offs_t port)
+uint8_t upd7810_device::RP(offs_t port)
{
- UINT8 data = 0xff;
+ uint8_t data = 0xff;
switch (port)
{
case UPD7810_PORTA:
@@ -590,7 +590,7 @@ UINT8 upd7810_device::RP(offs_t port)
return data;
}
-void upd7810_device::WP(offs_t port, UINT8 data)
+void upd7810_device::WP(offs_t port, uint8_t data)
{
switch (port)
{
@@ -669,7 +669,7 @@ void upd7810_device::WP(offs_t port, UINT8 data)
void upd7810_device::upd7810_take_irq()
{
- UINT16 vector = 0;
+ uint16_t vector = 0;
int irqline = 0;
/* global interrupt disable? */
@@ -767,7 +767,7 @@ void upd7810_device::upd7810_take_irq()
void upd7801_device::upd7810_take_irq()
{
- UINT16 vector = 0;
+ uint16_t vector = 0;
int irqline = 0;
/* global interrupt disable? */
@@ -999,7 +999,7 @@ void upd7810_device::upd7810_sio_input()
if (m_rxcnt > 0)
{
RXD = m_rxd_func();
- m_rxs = (m_rxs >> 1) | ((UINT16)RXD << 15);
+ m_rxs = (m_rxs >> 1) | ((uint16_t)RXD << 15);
m_rxcnt--;
if (0 == m_rxcnt)
{
diff --git a/src/devices/cpu/upd7810/upd7810.h b/src/devices/cpu/upd7810/upd7810.h
index d7d96be75d7..28900cb6c43 100644
--- a/src/devices/cpu/upd7810/upd7810.h
+++ b/src/devices/cpu/upd7810/upd7810.h
@@ -94,8 +94,8 @@ class upd7810_device : public cpu_device
{
public:
// construction/destruction
- upd7810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- upd7810_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ upd7810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ upd7810_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// static configuration helpers
template<class _Object> static devcb_base &set_to_func(device_t &device, _Object object) { return downcast<upd7810_device &>(device).m_to_func.set_callback(object); }
@@ -160,9 +160,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 40; }
- virtual UINT32 execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 40; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -173,9 +173,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void handle_timers(int cycles);
virtual void upd7810_take_irq();
@@ -204,10 +204,10 @@ protected:
struct opcode_s {
opcode_func opfunc;
- UINT8 oplen;
- UINT8 cycles;
- UINT8 cycles_skip;
- UINT8 mask_l0_l1;
+ uint8_t oplen;
+ uint8_t cycles;
+ uint8_t cycles_skip;
+ uint8_t mask_l0_l1;
};
static const struct opcode_s s_op48[256];
@@ -250,10 +250,10 @@ protected:
PAIR m_ppc; /* previous program counter */
PAIR m_pc; /* program counter */
PAIR m_sp; /* stack pointer */
- UINT8 m_op; /* opcode */
- UINT8 m_op2; /* opcode part 2 */
- UINT8 m_iff; /* interrupt enable flip flop */
- UINT8 m_psw; /* processor status word */
+ uint8_t m_op; /* opcode */
+ uint8_t m_op2; /* opcode part 2 */
+ uint8_t m_iff; /* interrupt enable flip flop */
+ uint8_t m_psw; /* processor status word */
PAIR m_ea; /* extended accumulator */
PAIR m_va; /* accumulator + vector register */
PAIR m_bc; /* 8bit B and C registers / 16bit BC register */
@@ -268,69 +268,69 @@ protected:
PAIR m_tm; /* 8 bit timer 0/1 comparator inputs */
PAIR m_ecnt; /* timer counter register / capture register */
PAIR m_etm; /* timer 0/1 comparator inputs */
- UINT8 m_ma; /* port A input or output mask */
- UINT8 m_mb; /* port B input or output mask */
- UINT8 m_mcc; /* port C control/port select */
- UINT8 m_mc; /* port C input or output mask */
- UINT8 m_mm; /* memory mapping */
- UINT8 m_mf; /* port F input or output mask */
- UINT8 m_tmm; /* timer 0 and timer 1 operating parameters */
- UINT8 m_etmm; /* 16-bit multifunction timer/event counter */
- UINT8 m_eom; /* 16-bit timer/event counter output control */
- UINT8 m_sml; /* serial interface parameters low */
- UINT8 m_smh; /* -"- high */
- UINT8 m_panm; /* previous analog to digital converter operating parameters */
- UINT8 m_anm; /* analog to digital converter operating parameters */
- UINT8 m_mkl; /* interrupt mask low */
- UINT8 m_mkh; /* -"- high */
- UINT8 m_zcm; /* bias circuitry for ac zero-cross detection */
- UINT8 m_pa_in; /* port A,B,C,D,F inputs */
- UINT8 m_pb_in;
- UINT8 m_pc_in;
- UINT8 m_pd_in;
- UINT8 m_pf_in;
- UINT8 m_pa_out; /* port A,B,C,D,F outputs */
- UINT8 m_pb_out;
- UINT8 m_pc_out;
- UINT8 m_pd_out;
- UINT8 m_pf_out;
- UINT8 m_cr0; /* analog digital conversion register 0 */
- UINT8 m_cr1; /* analog digital conversion register 1 */
- UINT8 m_cr2; /* analog digital conversion register 2 */
- UINT8 m_cr3; /* analog digital conversion register 3 */
- UINT8 m_txb; /* transmitter buffer */
- UINT8 m_rxb; /* receiver buffer */
- UINT8 m_txd; /* port C control line states */
- UINT8 m_rxd;
- UINT8 m_sck;
- UINT8 m_ti;
- UINT8 m_to;
- UINT8 m_ci;
- UINT8 m_lv0; /* level flip flop for co0 */
- UINT8 m_lv1; /* level flip flop for co1 */
- UINT8 m_co0;
- UINT8 m_co1;
- UINT16 m_irr; /* interrupt request register */
- UINT16 m_itf; /* interrupt test flag register */
+ uint8_t m_ma; /* port A input or output mask */
+ uint8_t m_mb; /* port B input or output mask */
+ uint8_t m_mcc; /* port C control/port select */
+ uint8_t m_mc; /* port C input or output mask */
+ uint8_t m_mm; /* memory mapping */
+ uint8_t m_mf; /* port F input or output mask */
+ uint8_t m_tmm; /* timer 0 and timer 1 operating parameters */
+ uint8_t m_etmm; /* 16-bit multifunction timer/event counter */
+ uint8_t m_eom; /* 16-bit timer/event counter output control */
+ uint8_t m_sml; /* serial interface parameters low */
+ uint8_t m_smh; /* -"- high */
+ uint8_t m_panm; /* previous analog to digital converter operating parameters */
+ uint8_t m_anm; /* analog to digital converter operating parameters */
+ uint8_t m_mkl; /* interrupt mask low */
+ uint8_t m_mkh; /* -"- high */
+ uint8_t m_zcm; /* bias circuitry for ac zero-cross detection */
+ uint8_t m_pa_in; /* port A,B,C,D,F inputs */
+ uint8_t m_pb_in;
+ uint8_t m_pc_in;
+ uint8_t m_pd_in;
+ uint8_t m_pf_in;
+ uint8_t m_pa_out; /* port A,B,C,D,F outputs */
+ uint8_t m_pb_out;
+ uint8_t m_pc_out;
+ uint8_t m_pd_out;
+ uint8_t m_pf_out;
+ uint8_t m_cr0; /* analog digital conversion register 0 */
+ uint8_t m_cr1; /* analog digital conversion register 1 */
+ uint8_t m_cr2; /* analog digital conversion register 2 */
+ uint8_t m_cr3; /* analog digital conversion register 3 */
+ uint8_t m_txb; /* transmitter buffer */
+ uint8_t m_rxb; /* receiver buffer */
+ uint8_t m_txd; /* port C control line states */
+ uint8_t m_rxd;
+ uint8_t m_sck;
+ uint8_t m_ti;
+ uint8_t m_to;
+ uint8_t m_ci;
+ uint8_t m_lv0; /* level flip flop for co0 */
+ uint8_t m_lv1; /* level flip flop for co1 */
+ uint8_t m_co0;
+ uint8_t m_co1;
+ uint16_t m_irr; /* interrupt request register */
+ uint16_t m_itf; /* interrupt test flag register */
int m_nmi; /* keep track of current nmi state. Needed for 7810 irq checking. */
int m_int1; /* keep track of current int1 state. Needed for irq checking. */
int m_int2; /* keep track to current int2 state. Needed for irq checking. */
/* internal helper variables */
- UINT16 m_txs; /* transmitter shift register */
- UINT16 m_rxs; /* receiver shift register */
- UINT8 m_txcnt; /* transmitter shift register bit count */
- UINT8 m_rxcnt; /* receiver shift register bit count */
- UINT8 m_txbuf; /* transmitter buffer was written */
- INT32 m_ovc0; /* overflow counter for timer 0 (for clock div 12/384) */
- INT32 m_ovc1; /* overflow counter for timer 0 (for clock div 12/384) */
- INT32 m_ovce; /* overflow counter for ecnt */
- INT32 m_ovcf; /* overflow counter for fixed clock div 3 mode */
- INT32 m_ovcs; /* overflow counter for serial I/O */
- UINT8 m_edges; /* rising/falling edge flag for serial I/O */
- UINT16 m_adcnt; /* A/D converter cycle count */
- UINT8 m_adtot; /* A/D converter total cycles per conversion */
- UINT8 m_tmpcr; /* temporary analog digital conversion register */
+ uint16_t m_txs; /* transmitter shift register */
+ uint16_t m_rxs; /* receiver shift register */
+ uint8_t m_txcnt; /* transmitter shift register bit count */
+ uint8_t m_rxcnt; /* receiver shift register bit count */
+ uint8_t m_txbuf; /* transmitter buffer was written */
+ int32_t m_ovc0; /* overflow counter for timer 0 (for clock div 12/384) */
+ int32_t m_ovc1; /* overflow counter for timer 0 (for clock div 12/384) */
+ int32_t m_ovce; /* overflow counter for ecnt */
+ int32_t m_ovcf; /* overflow counter for fixed clock div 3 mode */
+ int32_t m_ovcs; /* overflow counter for serial I/O */
+ uint8_t m_edges; /* rising/falling edge flag for serial I/O */
+ uint16_t m_adcnt; /* A/D converter cycle count */
+ uint8_t m_adtot; /* A/D converter total cycles per conversion */
+ uint8_t m_tmpcr; /* temporary analog digital conversion register */
int m_shdone; /* A/D converter sample and hold done */
int m_adout; /* currently selected A/D converter output register */
int m_adin; /* currently selected A/D converter input */
@@ -349,8 +349,8 @@ protected:
address_space *m_io;
int m_icount;
- UINT8 RP(offs_t port);
- void WP(offs_t port, UINT8 data);
+ uint8_t RP(offs_t port);
+ void WP(offs_t port, uint8_t data);
void upd7810_write_EOM();
void upd7810_write_TXB();
void upd7810_sio_output();
@@ -1373,10 +1373,10 @@ class upd7807_device : public upd7810_device
{
public:
// construction/destruction
- upd7807_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd7807_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
@@ -1384,12 +1384,12 @@ class upd7801_device : public upd7810_device
{
public:
// construction/destruction
- upd7801_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd7801_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void device_reset() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void handle_timers(int cycles) override;
virtual void upd7810_take_irq() override;
};
@@ -1399,15 +1399,15 @@ class upd78c05_device : public upd7810_device
{
public:
// construction/destruction
- upd78c05_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- upd78c05_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ upd78c05_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ upd78c05_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
protected:
virtual void device_start() override;
virtual void device_reset() override;
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 4 - 1) / 4; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 4); }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void handle_timers(int cycles) override;
};
@@ -1416,7 +1416,7 @@ class upd78c06_device : public upd78c05_device
{
public:
// construction/destruction
- upd78c06_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ upd78c06_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/upd7810/upd7810_dasm.cpp b/src/devices/cpu/upd7810/upd7810_dasm.cpp
index c39cf0c1efc..0beed6a01d3 100644
--- a/src/devices/cpu/upd7810/upd7810_dasm.cpp
+++ b/src/devices/cpu/upd7810/upd7810_dasm.cpp
@@ -24,7 +24,7 @@ public:
bool is_call() const { return (m_token == CALB) || (m_token == CALF) || (m_token == CALL) || (m_token == CALT); }
bool is_return() const { return (m_token == RET) || (m_token == RETI); }
- const dasm_s &prefix_get(UINT8 op) const { assert(m_token == prefix); return reinterpret_cast<const dasm_s *>(m_args)[op]; }
+ const dasm_s &prefix_get(uint8_t op) const { assert(m_token == prefix); return reinterpret_cast<const dasm_s *>(m_args)[op]; }
static const dasm_s XX_7810[256];
static const dasm_s XX_7807[256];
@@ -214,10 +214,10 @@ protected:
};
dasm_s() : m_token(illegal), m_args(nullptr) { }
- dasm_s(UINT8 t, const char *a) : m_token(t), m_args(a) { }
+ dasm_s(uint8_t t, const char *a) : m_token(t), m_args(a) { }
dasm_s(const dasm_s (&a)[256]) : m_token(prefix), m_args(a) { }
- UINT8 m_token;
+ uint8_t m_token;
const void *m_args;
static const char *const token_names[];
@@ -5416,20 +5416,20 @@ const char *const regname[32] =
"illegal", "TMM", "PT", "illegal"
};
-offs_t Dasm( char *buffer, offs_t pc, const dasm_s (&dasmXX)[256], const UINT8 *oprom, const UINT8 *opram, int is_7810 )
+offs_t Dasm( char *buffer, offs_t pc, const dasm_s (&dasmXX)[256], const uint8_t *oprom, const uint8_t *opram, int is_7810 )
{
unsigned idx = 0;
- const UINT8 op = oprom[idx++];
+ const uint8_t op = oprom[idx++];
const dasm_s *desc = &dasmXX[op];
if (desc->is_prefix())
desc = &desc->prefix_get(oprom[idx++]);
buffer += sprintf(buffer, "%-8.8s", desc->name());
- UINT32 flags = desc->is_call() ? DASMFLAG_STEP_OVER : desc->is_return() ? DASMFLAG_STEP_OUT : 0;
- UINT8 op2;
+ uint32_t flags = desc->is_call() ? DASMFLAG_STEP_OVER : desc->is_return() ? DASMFLAG_STEP_OUT : 0;
+ uint8_t op2;
int offset;
- UINT16 ea;
+ uint16_t ea;
for (const char *a = desc->args(); a && *a; a++)
{
diff --git a/src/devices/cpu/upd7810/upd7810_opcodes.cpp b/src/devices/cpu/upd7810/upd7810_opcodes.cpp
index ab4589222c1..6ee8d02d688 100644
--- a/src/devices/cpu/upd7810/upd7810_opcodes.cpp
+++ b/src/devices/cpu/upd7810/upd7810_opcodes.cpp
@@ -220,7 +220,7 @@ void upd7810_device::MUL_C()
/* 48 31: 0100 1000 0011 0001 */
void upd7810_device::RLR_A()
{
- UINT8 carry=(PSW&CY)<<7;
+ uint8_t carry=(PSW&CY)<<7;
PSW = (PSW & ~CY) | (A & CY);
A = (A >> 1) | carry;
}
@@ -228,7 +228,7 @@ void upd7810_device::RLR_A()
/* 48 32: 0100 1000 0011 0010 */
void upd7810_device::RLR_B()
{
- UINT8 carry=(PSW&CY)<<7;
+ uint8_t carry=(PSW&CY)<<7;
PSW = (PSW & ~CY) | (B & CY);
B = (B >> 1) | carry;
}
@@ -236,7 +236,7 @@ void upd7810_device::RLR_B()
/* 48 33: 0100 1000 0011 0011 */
void upd7810_device::RLR_C()
{
- UINT8 carry=(PSW&CY)<<7;
+ uint8_t carry=(PSW&CY)<<7;
PSW = (PSW & ~CY) | (C & CY);
C = (C >> 1) | carry;
}
@@ -244,7 +244,7 @@ void upd7810_device::RLR_C()
/* 48 35: 0100 1000 0011 0101 */
void upd7810_device::RLL_A()
{
- UINT8 carry=PSW&CY;
+ uint8_t carry=PSW&CY;
PSW = (PSW & ~CY) | ((A >> 7) & CY);
A = (A << 1) | carry;
}
@@ -252,7 +252,7 @@ void upd7810_device::RLL_A()
/* 48 36: 0100 1000 0011 0110 */
void upd7810_device::RLL_B()
{
- UINT8 carry=PSW&CY;
+ uint8_t carry=PSW&CY;
PSW = (PSW & ~CY) | ((B >> 7) & CY);
B = (B << 1) | carry;
}
@@ -260,7 +260,7 @@ void upd7810_device::RLL_B()
/* 48 37: 0100 1000 0011 0111 */
void upd7810_device::RLL_C()
{
- UINT8 carry=PSW&CY;
+ uint8_t carry=PSW&CY;
PSW = (PSW & ~CY) | ((C >> 7) & CY);
C = (C << 1) | carry;
}
@@ -268,7 +268,7 @@ void upd7810_device::RLL_C()
/* 48 38: 0100 1000 0011 1000 */
void upd7810_device::RLD()
{
- UINT8 m = RM( HL ), tmp;
+ uint8_t m = RM( HL ), tmp;
tmp = (m << 4) | (A & 0x0f);
A = (A & 0xf0) | (m >> 4);
WM( HL, tmp );
@@ -277,7 +277,7 @@ void upd7810_device::RLD()
/* 48 39: 0100 1000 0011 1001 */
void upd7810_device::RRD()
{
- UINT8 m = RM( HL ), tmp;
+ uint8_t m = RM( HL ), tmp;
tmp = (A << 4) | (m >> 4);
A = (A & 0xf0) | (m & 0x0f);
WM( HL, tmp );
@@ -303,7 +303,7 @@ void upd7810_device::DIV_A()
{
if (A)
{
- UINT8 remainder;
+ uint8_t remainder;
remainder = EA % A;
EA /= A;
A = remainder;
@@ -317,7 +317,7 @@ void upd7810_device::DIV_B()
{
if (B)
{
- UINT8 remainder;
+ uint8_t remainder;
remainder = EA % B;
EA /= B;
B = remainder;
@@ -331,7 +331,7 @@ void upd7810_device::DIV_C()
{
if (C)
{
- UINT8 remainder;
+ uint8_t remainder;
remainder = EA % C;
EA /= C;
C = remainder;
@@ -661,7 +661,7 @@ void upd7810_device::LDEAX_Hp()
/* 48 8b: 0100 1000 1000 1011 xxxx xxxx */
void upd7810_device::LDEAX_D_xx()
{
- UINT16 ea;
+ uint16_t ea;
RDOPARG( ea );
ea += DE;
EAL = RM( ea );
@@ -671,7 +671,7 @@ void upd7810_device::LDEAX_D_xx()
/* 48 8c: 0100 1000 1000 1100 */
void upd7810_device::LDEAX_H_A()
{
- UINT16 ea = HL + A;
+ uint16_t ea = HL + A;
EAL = RM( ea );
EAH = RM( ea + 1 );
}
@@ -679,7 +679,7 @@ void upd7810_device::LDEAX_H_A()
/* 48 8d: 0100 1000 1000 1101 */
void upd7810_device::LDEAX_H_B()
{
- UINT16 ea = HL + B;
+ uint16_t ea = HL + B;
EAL = RM( ea );
EAH = RM( ea + 1 );
}
@@ -687,7 +687,7 @@ void upd7810_device::LDEAX_H_B()
/* 48 8e: 0100 1000 1000 1110 */
void upd7810_device::LDEAX_H_EA()
{
- UINT16 ea = HL + EA;
+ uint16_t ea = HL + EA;
EAL = RM( ea );
EAH = RM( ea + 1 );
}
@@ -695,7 +695,7 @@ void upd7810_device::LDEAX_H_EA()
/* 48 8f: 0100 1000 1000 1111 xxxx xxxx */
void upd7810_device::LDEAX_H_xx()
{
- UINT16 ea;
+ uint16_t ea;
RDOPARG( ea );
ea += HL;
EAL = RM( ea );
@@ -735,7 +735,7 @@ void upd7810_device::STEAX_Hp()
/* 48 9b: 0100 1000 1000 1011 xxxx xxxx */
void upd7810_device::STEAX_D_xx()
{
- UINT16 ea;
+ uint16_t ea;
RDOPARG( ea );
ea += DE;
WM( ea, EAL );
@@ -745,7 +745,7 @@ void upd7810_device::STEAX_D_xx()
/* 48 9c: 0100 1000 1000 1100 */
void upd7810_device::STEAX_H_A()
{
- UINT16 ea = HL + A;
+ uint16_t ea = HL + A;
WM( ea, EAL );
WM( ea + 1, EAH );
}
@@ -753,7 +753,7 @@ void upd7810_device::STEAX_H_A()
/* 48 9d: 0100 1000 1000 1101 */
void upd7810_device::STEAX_H_B()
{
- UINT16 ea = HL + B;
+ uint16_t ea = HL + B;
WM( ea, EAL );
WM( ea + 1, EAH );
}
@@ -761,7 +761,7 @@ void upd7810_device::STEAX_H_B()
/* 48 9e: 0100 1000 1000 1110 */
void upd7810_device::STEAX_H_EA()
{
- UINT16 ea = HL + EA;
+ uint16_t ea = HL + EA;
WM( ea, EAL );
WM( ea + 1, EAH );
}
@@ -769,7 +769,7 @@ void upd7810_device::STEAX_H_EA()
/* 48 9f: 0100 1000 1000 1111 xxxx xxxx */
void upd7810_device::STEAX_H_xx()
{
- UINT16 ea;
+ uint16_t ea;
RDOPARG( ea );
ea += HL;
WM( ea, EAL );
@@ -793,7 +793,7 @@ void upd7810_device::DSLL_EA()
/* 48 a8: 0100 1000 1010 1000 */
void upd7810_device::TABLE()
{
- UINT16 ea = PC + A + 1;
+ uint16_t ea = PC + A + 1;
C = RM( ea );
B = RM( ea + 1 );
}
@@ -801,7 +801,7 @@ void upd7810_device::TABLE()
/* 48 b0: 0100 1000 1011 0000 */
void upd7810_device::DRLR_EA()
{
- UINT8 carry=PSW&CY;
+ uint8_t carry=PSW&CY;
PSW = (PSW & ~CY) | (EA & CY);
EA = (EA >> 1) | (carry << 15);
}
@@ -809,7 +809,7 @@ void upd7810_device::DRLR_EA()
/* 48 b4: 0100 1000 1011 0100 */
void upd7810_device::DRLL_EA()
{
- UINT8 carry=PSW&CY;
+ uint8_t carry=PSW&CY;
PSW = (PSW & ~CY) | ((EA >> 15) & CY);
EA = (EA << 1) | carry;
}
@@ -906,7 +906,7 @@ void upd7810_device::MOV_A_SMH()
void upd7810_device::MOV_A_EOM()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
+ uint8_t eom = EOM & 0x22;
A = eom;
}
@@ -1265,7 +1265,7 @@ void upd7810_device::ORA_L_A()
/* 60 20: 0110 0000 0010 0000 */
void upd7810_device::ADDNC_V_A()
{
- UINT8 tmp = V + A;
+ uint8_t tmp = V + A;
ZHC_ADD( tmp, V, 0 );
V = tmp;
SKIP_NC;
@@ -1274,7 +1274,7 @@ void upd7810_device::ADDNC_V_A()
/* 60 21: 0110 0000 0010 0001 */
void upd7810_device::ADDNC_A_A()
{
- UINT8 tmp = A + A;
+ uint8_t tmp = A + A;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -1283,7 +1283,7 @@ void upd7810_device::ADDNC_A_A()
/* 60 22: 0110 0000 0010 0010 */
void upd7810_device::ADDNC_B_A()
{
- UINT8 tmp = B + A;
+ uint8_t tmp = B + A;
ZHC_ADD( tmp, B, 0 );
B = tmp;
SKIP_NC;
@@ -1292,7 +1292,7 @@ void upd7810_device::ADDNC_B_A()
/* 60 23: 0110 0000 0010 0011 */
void upd7810_device::ADDNC_C_A()
{
- UINT8 tmp = C + A;
+ uint8_t tmp = C + A;
ZHC_ADD( tmp, C, 0 );
C = tmp;
SKIP_NC;
@@ -1301,7 +1301,7 @@ void upd7810_device::ADDNC_C_A()
/* 60 24: 0110 0000 0010 0100 */
void upd7810_device::ADDNC_D_A()
{
- UINT8 tmp = D + A;
+ uint8_t tmp = D + A;
ZHC_ADD( tmp, D, 0 );
D = tmp;
SKIP_NC;
@@ -1310,7 +1310,7 @@ void upd7810_device::ADDNC_D_A()
/* 60 25: 0110 0000 0010 0101 */
void upd7810_device::ADDNC_E_A()
{
- UINT8 tmp = E + A;
+ uint8_t tmp = E + A;
ZHC_ADD( tmp, E, 0 );
E = tmp;
SKIP_NC;
@@ -1319,7 +1319,7 @@ void upd7810_device::ADDNC_E_A()
/* 60 26: 0110 0000 0010 0110 */
void upd7810_device::ADDNC_H_A()
{
- UINT8 tmp = H + A;
+ uint8_t tmp = H + A;
ZHC_ADD( tmp, H, 0 );
H = tmp;
SKIP_NC;
@@ -1328,7 +1328,7 @@ void upd7810_device::ADDNC_H_A()
/* 60 27: 0110 0000 0010 0111 */
void upd7810_device::ADDNC_L_A()
{
- UINT8 tmp = L + A;
+ uint8_t tmp = L + A;
ZHC_ADD( tmp, L, 0 );
L = tmp;
SKIP_NC;
@@ -1337,7 +1337,7 @@ void upd7810_device::ADDNC_L_A()
/* 60 28: 0110 0000 0010 1000 */
void upd7810_device::GTA_V_A()
{
- UINT16 tmp = V - A - 1;
+ uint16_t tmp = V - A - 1;
ZHC_SUB( tmp, V, 0 );
SKIP_NC;
}
@@ -1345,7 +1345,7 @@ void upd7810_device::GTA_V_A()
/* 60 29: 0110 0000 0010 1001 */
void upd7810_device::GTA_A_A()
{
- UINT16 tmp = A - A - 1;
+ uint16_t tmp = A - A - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -1353,7 +1353,7 @@ void upd7810_device::GTA_A_A()
/* 60 2a: 0110 0000 0010 1010 */
void upd7810_device::GTA_B_A()
{
- UINT16 tmp = B - A - 1;
+ uint16_t tmp = B - A - 1;
ZHC_SUB( tmp, B, 0 );
SKIP_NC;
}
@@ -1361,7 +1361,7 @@ void upd7810_device::GTA_B_A()
/* 60 2b: 0110 0000 0010 1011 */
void upd7810_device::GTA_C_A()
{
- UINT16 tmp = C - A - 1;
+ uint16_t tmp = C - A - 1;
ZHC_SUB( tmp, C, 0 );
SKIP_NC;
}
@@ -1369,7 +1369,7 @@ void upd7810_device::GTA_C_A()
/* 60 2c: 0110 0000 0010 1100 */
void upd7810_device::GTA_D_A()
{
- UINT16 tmp = D - A - 1;
+ uint16_t tmp = D - A - 1;
ZHC_SUB( tmp, D, 0 );
SKIP_NC;
}
@@ -1377,7 +1377,7 @@ void upd7810_device::GTA_D_A()
/* 60 2d: 0110 0000 0010 1101 */
void upd7810_device::GTA_E_A()
{
- UINT16 tmp = E - A - 1;
+ uint16_t tmp = E - A - 1;
ZHC_SUB( tmp, E, 0 );
SKIP_NC;
}
@@ -1385,7 +1385,7 @@ void upd7810_device::GTA_E_A()
/* 60 2e: 0110 0000 0010 1110 */
void upd7810_device::GTA_H_A()
{
- UINT16 tmp = H - A - 1;
+ uint16_t tmp = H - A - 1;
ZHC_SUB( tmp, H, 0 );
SKIP_NC;
}
@@ -1393,7 +1393,7 @@ void upd7810_device::GTA_H_A()
/* 60 2f: 0110 0000 0010 1111 */
void upd7810_device::GTA_L_A()
{
- UINT16 tmp = L - A - 1;
+ uint16_t tmp = L - A - 1;
ZHC_SUB( tmp, L, 0 );
SKIP_NC;
}
@@ -1401,7 +1401,7 @@ void upd7810_device::GTA_L_A()
/* 60 30: 0110 0000 0011 0000 */
void upd7810_device::SUBNB_V_A()
{
- UINT8 tmp = V - A;
+ uint8_t tmp = V - A;
ZHC_SUB( tmp, V, 0 );
V = tmp;
SKIP_NC;
@@ -1410,7 +1410,7 @@ void upd7810_device::SUBNB_V_A()
/* 60 31: 0110 0000 0011 0001 */
void upd7810_device::SUBNB_A_A()
{
- UINT8 tmp = A - A;
+ uint8_t tmp = A - A;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -1419,7 +1419,7 @@ void upd7810_device::SUBNB_A_A()
/* 60 32: 0110 0000 0011 0010 */
void upd7810_device::SUBNB_B_A()
{
- UINT8 tmp = B - A;
+ uint8_t tmp = B - A;
ZHC_SUB( tmp, B, 0 );
B = tmp;
SKIP_NC;
@@ -1428,7 +1428,7 @@ void upd7810_device::SUBNB_B_A()
/* 60 33: 0110 0000 0011 0011 */
void upd7810_device::SUBNB_C_A()
{
- UINT8 tmp = C - A;
+ uint8_t tmp = C - A;
ZHC_SUB( tmp, C, 0 );
C = tmp;
SKIP_NC;
@@ -1437,7 +1437,7 @@ void upd7810_device::SUBNB_C_A()
/* 60 34: 0110 0000 0011 0100 */
void upd7810_device::SUBNB_D_A()
{
- UINT8 tmp = D - A;
+ uint8_t tmp = D - A;
ZHC_SUB( tmp, D, 0 );
D = tmp;
SKIP_NC;
@@ -1446,7 +1446,7 @@ void upd7810_device::SUBNB_D_A()
/* 60 35: 0110 0000 0011 0101 */
void upd7810_device::SUBNB_E_A()
{
- UINT8 tmp = E - A;
+ uint8_t tmp = E - A;
ZHC_SUB( tmp, E, 0 );
E = tmp;
SKIP_NC;
@@ -1455,7 +1455,7 @@ void upd7810_device::SUBNB_E_A()
/* 60 36: 0110 0000 0011 0110 */
void upd7810_device::SUBNB_H_A()
{
- UINT8 tmp = H - A;
+ uint8_t tmp = H - A;
ZHC_SUB( tmp, H, 0 );
H = tmp;
SKIP_NC;
@@ -1464,7 +1464,7 @@ void upd7810_device::SUBNB_H_A()
/* 60 37: 0110 0000 0011 0111 */
void upd7810_device::SUBNB_L_A()
{
- UINT8 tmp = L - A;
+ uint8_t tmp = L - A;
ZHC_SUB( tmp, L, 0 );
L = tmp;
SKIP_NC;
@@ -1473,7 +1473,7 @@ void upd7810_device::SUBNB_L_A()
/* 60 38: 0110 0000 0011 1000 */
void upd7810_device::LTA_V_A()
{
- UINT8 tmp = V - A;
+ uint8_t tmp = V - A;
ZHC_SUB( tmp, V, 0 );
SKIP_CY;
}
@@ -1481,7 +1481,7 @@ void upd7810_device::LTA_V_A()
/* 60 39: 0110 0000 0011 1001 */
void upd7810_device::LTA_A_A()
{
- UINT8 tmp = A - A;
+ uint8_t tmp = A - A;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -1489,7 +1489,7 @@ void upd7810_device::LTA_A_A()
/* 60 3a: 0110 0000 0011 1010 */
void upd7810_device::LTA_B_A()
{
- UINT8 tmp = B - A;
+ uint8_t tmp = B - A;
ZHC_SUB( tmp, B, 0 );
SKIP_CY;
}
@@ -1497,7 +1497,7 @@ void upd7810_device::LTA_B_A()
/* 60 3b: 0110 0000 0011 1011 */
void upd7810_device::LTA_C_A()
{
- UINT8 tmp = C - A;
+ uint8_t tmp = C - A;
ZHC_SUB( tmp, C, 0 );
SKIP_CY;
}
@@ -1505,7 +1505,7 @@ void upd7810_device::LTA_C_A()
/* 60 3c: 0110 0000 0011 1100 */
void upd7810_device::LTA_D_A()
{
- UINT8 tmp = D - A;
+ uint8_t tmp = D - A;
ZHC_SUB( tmp, D, 0 );
SKIP_CY;
}
@@ -1513,7 +1513,7 @@ void upd7810_device::LTA_D_A()
/* 60 3d: 0110 0000 0011 1101 */
void upd7810_device::LTA_E_A()
{
- UINT8 tmp = E - A;
+ uint8_t tmp = E - A;
ZHC_SUB( tmp, E, 0 );
SKIP_CY;
}
@@ -1521,7 +1521,7 @@ void upd7810_device::LTA_E_A()
/* 60 3e: 0110 0000 0011 1110 */
void upd7810_device::LTA_H_A()
{
- UINT8 tmp = H - A;
+ uint8_t tmp = H - A;
ZHC_SUB( tmp, H, 0 );
SKIP_CY;
}
@@ -1529,7 +1529,7 @@ void upd7810_device::LTA_H_A()
/* 60 3f: 0110 0000 0011 1111 */
void upd7810_device::LTA_L_A()
{
- UINT8 tmp = L - A;
+ uint8_t tmp = L - A;
ZHC_SUB( tmp, L, 0 );
SKIP_CY;
}
@@ -1537,7 +1537,7 @@ void upd7810_device::LTA_L_A()
/* 60 40: 0110 0000 0100 0000 */
void upd7810_device::ADD_V_A()
{
- UINT8 tmp = V + A;
+ uint8_t tmp = V + A;
ZHC_ADD( tmp, V, 0 );
V = tmp;
}
@@ -1545,7 +1545,7 @@ void upd7810_device::ADD_V_A()
/* 60 41: 0110 0000 0100 0001 */
void upd7810_device::ADD_A_A()
{
- UINT8 tmp = A + A;
+ uint8_t tmp = A + A;
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -1553,7 +1553,7 @@ void upd7810_device::ADD_A_A()
/* 60 42: 0110 0000 0100 0010 */
void upd7810_device::ADD_B_A()
{
- UINT8 tmp = B + A;
+ uint8_t tmp = B + A;
ZHC_ADD( tmp, B, 0 );
B = tmp;
}
@@ -1561,7 +1561,7 @@ void upd7810_device::ADD_B_A()
/* 60 43: 0110 0000 0100 0011 */
void upd7810_device::ADD_C_A()
{
- UINT8 tmp = C + A;
+ uint8_t tmp = C + A;
ZHC_ADD( tmp, C, 0 );
C = tmp;
}
@@ -1569,7 +1569,7 @@ void upd7810_device::ADD_C_A()
/* 60 44: 0110 0000 0100 0100 */
void upd7810_device::ADD_D_A()
{
- UINT8 tmp = D + A;
+ uint8_t tmp = D + A;
ZHC_ADD( tmp, D, 0 );
D = tmp;
}
@@ -1577,7 +1577,7 @@ void upd7810_device::ADD_D_A()
/* 60 45: 0110 0000 0100 0101 */
void upd7810_device::ADD_E_A()
{
- UINT8 tmp = E + A;
+ uint8_t tmp = E + A;
ZHC_ADD( tmp, E, 0 );
E = tmp;
}
@@ -1585,7 +1585,7 @@ void upd7810_device::ADD_E_A()
/* 60 46: 0110 0000 0100 0110 */
void upd7810_device::ADD_H_A()
{
- UINT8 tmp = H + A;
+ uint8_t tmp = H + A;
ZHC_ADD( tmp, H, 0 );
H = tmp;
}
@@ -1593,7 +1593,7 @@ void upd7810_device::ADD_H_A()
/* 60 47: 0110 0000 0100 0111 */
void upd7810_device::ADD_L_A()
{
- UINT8 tmp = L + A;
+ uint8_t tmp = L + A;
ZHC_ADD( tmp, L, 0 );
L = tmp;
}
@@ -1601,7 +1601,7 @@ void upd7810_device::ADD_L_A()
/* 60 50: 0110 0000 0101 0000 */
void upd7810_device::ADC_V_A()
{
- UINT8 tmp = V + A + (PSW & CY);
+ uint8_t tmp = V + A + (PSW & CY);
ZHC_ADD( tmp, V, (PSW & CY) );
V = tmp;
}
@@ -1609,7 +1609,7 @@ void upd7810_device::ADC_V_A()
/* 60 51: 0110 0000 0101 0001 */
void upd7810_device::ADC_A_A()
{
- UINT8 tmp = A + A + (PSW & CY);
+ uint8_t tmp = A + A + (PSW & CY);
ZHC_ADD( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -1617,7 +1617,7 @@ void upd7810_device::ADC_A_A()
/* 60 52: 0110 0000 0101 0010 */
void upd7810_device::ADC_B_A()
{
- UINT8 tmp = B + A + (PSW & CY);
+ uint8_t tmp = B + A + (PSW & CY);
ZHC_ADD( tmp, B, (PSW & CY) );
B = tmp;
}
@@ -1625,7 +1625,7 @@ void upd7810_device::ADC_B_A()
/* 60 53: 0110 0000 0101 0011 */
void upd7810_device::ADC_C_A()
{
- UINT8 tmp = C + A + (PSW & CY);
+ uint8_t tmp = C + A + (PSW & CY);
ZHC_ADD( tmp, C, (PSW & CY) );
C = tmp;
}
@@ -1633,7 +1633,7 @@ void upd7810_device::ADC_C_A()
/* 60 54: 0110 0000 0101 0100 */
void upd7810_device::ADC_D_A()
{
- UINT8 tmp = D + A + (PSW & CY);
+ uint8_t tmp = D + A + (PSW & CY);
ZHC_ADD( tmp, D, (PSW & CY) );
D = tmp;
}
@@ -1641,7 +1641,7 @@ void upd7810_device::ADC_D_A()
/* 60 55: 0110 0000 0101 0101 */
void upd7810_device::ADC_E_A()
{
- UINT8 tmp = E + A + (PSW & CY);
+ uint8_t tmp = E + A + (PSW & CY);
ZHC_ADD( tmp, E, (PSW & CY) );
E = tmp;
}
@@ -1649,7 +1649,7 @@ void upd7810_device::ADC_E_A()
/* 60 56: 0110 0000 0101 0110 */
void upd7810_device::ADC_H_A()
{
- UINT8 tmp = H + A + (PSW & CY);
+ uint8_t tmp = H + A + (PSW & CY);
ZHC_ADD( tmp, H, (PSW & CY) );
H = tmp;
}
@@ -1657,7 +1657,7 @@ void upd7810_device::ADC_H_A()
/* 60 57: 0110 0000 0101 0111 */
void upd7810_device::ADC_L_A()
{
- UINT8 tmp = L + A + (PSW & CY);
+ uint8_t tmp = L + A + (PSW & CY);
ZHC_ADD( tmp, L, (PSW & CY) );
L = tmp;
}
@@ -1665,7 +1665,7 @@ void upd7810_device::ADC_L_A()
/* 60 60: 0110 0000 0110 0000 */
void upd7810_device::SUB_V_A()
{
- UINT8 tmp = V - A;
+ uint8_t tmp = V - A;
ZHC_SUB( tmp, V, 0 );
V = tmp;
}
@@ -1673,7 +1673,7 @@ void upd7810_device::SUB_V_A()
/* 60 61: 0110 0000 0110 0001 */
void upd7810_device::SUB_A_A()
{
- UINT8 tmp = A - A;
+ uint8_t tmp = A - A;
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -1681,7 +1681,7 @@ void upd7810_device::SUB_A_A()
/* 60 62: 0110 0000 0110 0010 */
void upd7810_device::SUB_B_A()
{
- UINT8 tmp = B - A;
+ uint8_t tmp = B - A;
ZHC_SUB( tmp, B, 0 );
B = tmp;
}
@@ -1689,7 +1689,7 @@ void upd7810_device::SUB_B_A()
/* 60 63: 0110 0000 0110 0011 */
void upd7810_device::SUB_C_A()
{
- UINT8 tmp = C - A;
+ uint8_t tmp = C - A;
ZHC_SUB( tmp, C, 0 );
C = tmp;
}
@@ -1697,7 +1697,7 @@ void upd7810_device::SUB_C_A()
/* 60 64: 0110 0000 0110 0100 */
void upd7810_device::SUB_D_A()
{
- UINT8 tmp = D - A;
+ uint8_t tmp = D - A;
ZHC_SUB( tmp, D, 0 );
D = tmp;
}
@@ -1705,7 +1705,7 @@ void upd7810_device::SUB_D_A()
/* 60 65: 0110 0000 0110 0101 */
void upd7810_device::SUB_E_A()
{
- UINT8 tmp = E - A;
+ uint8_t tmp = E - A;
ZHC_SUB( tmp, E, 0 );
E = tmp;
}
@@ -1713,7 +1713,7 @@ void upd7810_device::SUB_E_A()
/* 60 66: 0110 0000 0110 0110 */
void upd7810_device::SUB_H_A()
{
- UINT8 tmp = H - A;
+ uint8_t tmp = H - A;
ZHC_SUB( tmp, H, 0 );
H = tmp;
}
@@ -1721,7 +1721,7 @@ void upd7810_device::SUB_H_A()
/* 60 67: 0110 0000 0110 0111 */
void upd7810_device::SUB_L_A()
{
- UINT8 tmp = L - A;
+ uint8_t tmp = L - A;
ZHC_SUB( tmp, L, 0 );
L = tmp;
}
@@ -1729,7 +1729,7 @@ void upd7810_device::SUB_L_A()
/* 60 68: 0110 0000 0110 1000 */
void upd7810_device::NEA_V_A()
{
- UINT8 tmp = V - A;
+ uint8_t tmp = V - A;
ZHC_SUB( tmp, V, 0 );
SKIP_NZ;
}
@@ -1737,7 +1737,7 @@ void upd7810_device::NEA_V_A()
/* 60 69: 0110 0000 0110 1001 */
void upd7810_device::NEA_A_A()
{
- UINT8 tmp = A - A;
+ uint8_t tmp = A - A;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -1745,7 +1745,7 @@ void upd7810_device::NEA_A_A()
/* 60 6a: 0110 0000 0110 1010 */
void upd7810_device::NEA_B_A()
{
- UINT8 tmp = B - A;
+ uint8_t tmp = B - A;
ZHC_SUB( tmp, B, 0 );
SKIP_NZ;
}
@@ -1753,7 +1753,7 @@ void upd7810_device::NEA_B_A()
/* 60 6b: 0110 0000 0110 1011 */
void upd7810_device::NEA_C_A()
{
- UINT8 tmp = C - A;
+ uint8_t tmp = C - A;
ZHC_SUB( tmp, C, 0 );
SKIP_NZ;
}
@@ -1761,7 +1761,7 @@ void upd7810_device::NEA_C_A()
/* 60 6c: 0110 0000 0110 1100 */
void upd7810_device::NEA_D_A()
{
- UINT8 tmp = D - A;
+ uint8_t tmp = D - A;
ZHC_SUB( tmp, D, 0 );
SKIP_NZ;
}
@@ -1769,7 +1769,7 @@ void upd7810_device::NEA_D_A()
/* 60 6d: 0110 0000 0110 1101 */
void upd7810_device::NEA_E_A()
{
- UINT8 tmp = E - A;
+ uint8_t tmp = E - A;
ZHC_SUB( tmp, E, 0 );
SKIP_NZ;
}
@@ -1777,7 +1777,7 @@ void upd7810_device::NEA_E_A()
/* 60 6e: 0110 0000 0110 1110 */
void upd7810_device::NEA_H_A()
{
- UINT8 tmp = H - A;
+ uint8_t tmp = H - A;
ZHC_SUB( tmp, H, 0 );
SKIP_NZ;
}
@@ -1785,7 +1785,7 @@ void upd7810_device::NEA_H_A()
/* 60 6f: 0110 0000 0110 1111 */
void upd7810_device::NEA_L_A()
{
- UINT8 tmp = L - A;
+ uint8_t tmp = L - A;
ZHC_SUB( tmp, L, 0 );
SKIP_NZ;
}
@@ -1793,7 +1793,7 @@ void upd7810_device::NEA_L_A()
/* 60 70: 0110 0000 0111 0000 */
void upd7810_device::SBB_V_A()
{
- UINT8 tmp = V - A - (PSW & CY);
+ uint8_t tmp = V - A - (PSW & CY);
ZHC_SUB( tmp, V, (PSW & CY) );
V = tmp;
}
@@ -1801,7 +1801,7 @@ void upd7810_device::SBB_V_A()
/* 60 71: 0110 0000 0111 0001 */
void upd7810_device::SBB_A_A()
{
- UINT8 tmp = A - A - (PSW & CY);
+ uint8_t tmp = A - A - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -1809,7 +1809,7 @@ void upd7810_device::SBB_A_A()
/* 60 72: 0110 0000 0111 0010 */
void upd7810_device::SBB_B_A()
{
- UINT8 tmp = B - A - (PSW & CY);
+ uint8_t tmp = B - A - (PSW & CY);
ZHC_SUB( tmp, B, (PSW & CY) );
B = tmp;
}
@@ -1817,7 +1817,7 @@ void upd7810_device::SBB_B_A()
/* 60 73: 0110 0000 0111 0011 */
void upd7810_device::SBB_C_A()
{
- UINT8 tmp = C - A - (PSW & CY);
+ uint8_t tmp = C - A - (PSW & CY);
ZHC_SUB( tmp, C, (PSW & CY) );
C = tmp;
}
@@ -1825,7 +1825,7 @@ void upd7810_device::SBB_C_A()
/* 60 74: 0110 0000 0111 0100 */
void upd7810_device::SBB_D_A()
{
- UINT8 tmp = D - A - (PSW & CY);
+ uint8_t tmp = D - A - (PSW & CY);
ZHC_SUB( tmp, D, (PSW & CY) );
D = tmp;
}
@@ -1833,7 +1833,7 @@ void upd7810_device::SBB_D_A()
/* 60 75: 0110 0000 0111 0101 */
void upd7810_device::SBB_E_A()
{
- UINT8 tmp = E - A - (PSW & CY);
+ uint8_t tmp = E - A - (PSW & CY);
ZHC_SUB( tmp, E, (PSW & CY) );
E = tmp;
}
@@ -1841,7 +1841,7 @@ void upd7810_device::SBB_E_A()
/* 60 76: 0110 0000 0111 0110 */
void upd7810_device::SBB_H_A()
{
- UINT8 tmp = H - A - (PSW & CY);
+ uint8_t tmp = H - A - (PSW & CY);
ZHC_SUB( tmp, H, (PSW & CY) );
H = tmp;
}
@@ -1849,7 +1849,7 @@ void upd7810_device::SBB_H_A()
/* 60 77: 0110 0000 0111 0111 */
void upd7810_device::SBB_L_A()
{
- UINT8 tmp = L - A - (PSW & CY);
+ uint8_t tmp = L - A - (PSW & CY);
ZHC_SUB( tmp, L, (PSW & CY) );
L = tmp;
}
@@ -1857,7 +1857,7 @@ void upd7810_device::SBB_L_A()
/* 60 78: 0110 0000 0111 1000 */
void upd7810_device::EQA_V_A()
{
- UINT8 tmp = V - A;
+ uint8_t tmp = V - A;
ZHC_SUB( tmp, V, 0 );
SKIP_Z;
}
@@ -1865,7 +1865,7 @@ void upd7810_device::EQA_V_A()
/* 60 79: 0110 0000 0111 1001 */
void upd7810_device::EQA_A_A()
{
- UINT8 tmp = A - A;
+ uint8_t tmp = A - A;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -1873,7 +1873,7 @@ void upd7810_device::EQA_A_A()
/* 60 7a: 0110 0000 0111 1010 */
void upd7810_device::EQA_B_A()
{
- UINT8 tmp = B - A;
+ uint8_t tmp = B - A;
ZHC_SUB( tmp, B, 0 );
SKIP_Z;
}
@@ -1881,7 +1881,7 @@ void upd7810_device::EQA_B_A()
/* 60 7b: 0110 0000 0111 1011 */
void upd7810_device::EQA_C_A()
{
- UINT8 tmp = C - A;
+ uint8_t tmp = C - A;
ZHC_SUB( tmp, C, 0 );
SKIP_Z;
}
@@ -1889,7 +1889,7 @@ void upd7810_device::EQA_C_A()
/* 60 7c: 0110 0000 0111 1100 */
void upd7810_device::EQA_D_A()
{
- UINT8 tmp = D - A;
+ uint8_t tmp = D - A;
ZHC_SUB( tmp, D, 0 );
SKIP_Z;
}
@@ -1897,7 +1897,7 @@ void upd7810_device::EQA_D_A()
/* 60 7d: 0110 0000 0111 1101 */
void upd7810_device::EQA_E_A()
{
- UINT8 tmp = E - A;
+ uint8_t tmp = E - A;
ZHC_SUB( tmp, E, 0 );
SKIP_Z;
}
@@ -1905,7 +1905,7 @@ void upd7810_device::EQA_E_A()
/* 60 7e: 0110 0000 0111 1110 */
void upd7810_device::EQA_H_A()
{
- UINT8 tmp = H - A;
+ uint8_t tmp = H - A;
ZHC_SUB( tmp, H, 0 );
SKIP_Z;
}
@@ -1913,7 +1913,7 @@ void upd7810_device::EQA_H_A()
/* 60 7f: 0110 0000 0111 1111 */
void upd7810_device::EQA_L_A()
{
- UINT8 tmp = L - A;
+ uint8_t tmp = L - A;
ZHC_SUB( tmp, L, 0 );
SKIP_Z;
}
@@ -2077,7 +2077,7 @@ void upd7810_device::ORA_A_L()
/* 60 a0: 0110 0000 1010 0000 */
void upd7810_device::ADDNC_A_V()
{
- UINT8 tmp = A + V;
+ uint8_t tmp = A + V;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2089,7 +2089,7 @@ void upd7810_device::ADDNC_A_V()
/* 60 a2: 0110 0000 1010 0010 */
void upd7810_device::ADDNC_A_B()
{
- UINT8 tmp = A + B;
+ uint8_t tmp = A + B;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2098,7 +2098,7 @@ void upd7810_device::ADDNC_A_B()
/* 60 a3: 0110 0000 1010 0011 */
void upd7810_device::ADDNC_A_C()
{
- UINT8 tmp = A + C;
+ uint8_t tmp = A + C;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2107,7 +2107,7 @@ void upd7810_device::ADDNC_A_C()
/* 60 a4: 0110 0000 1010 0100 */
void upd7810_device::ADDNC_A_D()
{
- UINT8 tmp = A + D;
+ uint8_t tmp = A + D;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2116,7 +2116,7 @@ void upd7810_device::ADDNC_A_D()
/* 60 a5: 0110 0000 1010 0101 */
void upd7810_device::ADDNC_A_E()
{
- UINT8 tmp = A + E;
+ uint8_t tmp = A + E;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2125,7 +2125,7 @@ void upd7810_device::ADDNC_A_E()
/* 60 a6: 0110 0000 1010 0110 */
void upd7810_device::ADDNC_A_H()
{
- UINT8 tmp = A + H;
+ uint8_t tmp = A + H;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2134,7 +2134,7 @@ void upd7810_device::ADDNC_A_H()
/* 60 a7: 0110 0000 1010 0111 */
void upd7810_device::ADDNC_A_L()
{
- UINT8 tmp = A + L;
+ uint8_t tmp = A + L;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2143,7 +2143,7 @@ void upd7810_device::ADDNC_A_L()
/* 60 a8: 0110 0000 1010 1000 */
void upd7810_device::GTA_A_V()
{
- UINT16 tmp = A - V - 1;
+ uint16_t tmp = A - V - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -2154,7 +2154,7 @@ void upd7810_device::GTA_A_V()
/* 60 aa: 0110 0000 1010 1010 */
void upd7810_device::GTA_A_B()
{
- UINT16 tmp = A - B - 1;
+ uint16_t tmp = A - B - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -2162,7 +2162,7 @@ void upd7810_device::GTA_A_B()
/* 60 ab: 0110 0000 1010 1011 */
void upd7810_device::GTA_A_C()
{
- UINT16 tmp = A - C - 1;
+ uint16_t tmp = A - C - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -2170,7 +2170,7 @@ void upd7810_device::GTA_A_C()
/* 60 ac: 0110 0000 1010 1100 */
void upd7810_device::GTA_A_D()
{
- UINT16 tmp = A - D - 1;
+ uint16_t tmp = A - D - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -2178,7 +2178,7 @@ void upd7810_device::GTA_A_D()
/* 60 ad: 0110 0000 1010 1101 */
void upd7810_device::GTA_A_E()
{
- UINT16 tmp = A - E - 1;
+ uint16_t tmp = A - E - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -2186,7 +2186,7 @@ void upd7810_device::GTA_A_E()
/* 60 ae: 0110 0000 1010 1110 */
void upd7810_device::GTA_A_H()
{
- UINT16 tmp = A - H - 1;
+ uint16_t tmp = A - H - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -2194,7 +2194,7 @@ void upd7810_device::GTA_A_H()
/* 60 af: 0110 0000 1010 1111 */
void upd7810_device::GTA_A_L()
{
- UINT16 tmp = A - L - 1;
+ uint16_t tmp = A - L - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -2202,7 +2202,7 @@ void upd7810_device::GTA_A_L()
/* 60 b0: 0110 0000 1011 0000 */
void upd7810_device::SUBNB_A_V()
{
- UINT8 tmp = A - V;
+ uint8_t tmp = A - V;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2214,7 +2214,7 @@ void upd7810_device::SUBNB_A_V()
/* 60 b2: 0110 0000 1011 0010 */
void upd7810_device::SUBNB_A_B()
{
- UINT8 tmp = A - B;
+ uint8_t tmp = A - B;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2223,7 +2223,7 @@ void upd7810_device::SUBNB_A_B()
/* 60 b3: 0110 0000 1011 0011 */
void upd7810_device::SUBNB_A_C()
{
- UINT8 tmp = A - C;
+ uint8_t tmp = A - C;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2232,7 +2232,7 @@ void upd7810_device::SUBNB_A_C()
/* 60 b4: 0110 0000 1011 0100 */
void upd7810_device::SUBNB_A_D()
{
- UINT8 tmp = A - D;
+ uint8_t tmp = A - D;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2241,7 +2241,7 @@ void upd7810_device::SUBNB_A_D()
/* 60 b5: 0110 0000 1011 0101 */
void upd7810_device::SUBNB_A_E()
{
- UINT8 tmp = A - E;
+ uint8_t tmp = A - E;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2250,7 +2250,7 @@ void upd7810_device::SUBNB_A_E()
/* 60 b6: 0110 0000 1011 0110 */
void upd7810_device::SUBNB_A_H()
{
- UINT8 tmp = A - H;
+ uint8_t tmp = A - H;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2259,7 +2259,7 @@ void upd7810_device::SUBNB_A_H()
/* 60 b7: 0110 0000 1011 0111 */
void upd7810_device::SUBNB_A_L()
{
- UINT8 tmp = A - L;
+ uint8_t tmp = A - L;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -2268,7 +2268,7 @@ void upd7810_device::SUBNB_A_L()
/* 60 b8: 0110 0000 1011 1000 */
void upd7810_device::LTA_A_V()
{
- UINT8 tmp = A - V;
+ uint8_t tmp = A - V;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -2279,7 +2279,7 @@ void upd7810_device::LTA_A_V()
/* 60 ba: 0110 0000 1011 1010 */
void upd7810_device::LTA_A_B()
{
- UINT8 tmp = A - B;
+ uint8_t tmp = A - B;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -2287,7 +2287,7 @@ void upd7810_device::LTA_A_B()
/* 60 bb: 0110 0000 1011 1011 */
void upd7810_device::LTA_A_C()
{
- UINT8 tmp = A - C;
+ uint8_t tmp = A - C;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -2295,7 +2295,7 @@ void upd7810_device::LTA_A_C()
/* 60 bc: 0110 0000 1011 1100 */
void upd7810_device::LTA_A_D()
{
- UINT8 tmp = A - D;
+ uint8_t tmp = A - D;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -2303,7 +2303,7 @@ void upd7810_device::LTA_A_D()
/* 60 bd: 0110 0000 1011 1101 */
void upd7810_device::LTA_A_E()
{
- UINT8 tmp = A - E;
+ uint8_t tmp = A - E;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -2311,7 +2311,7 @@ void upd7810_device::LTA_A_E()
/* 60 be: 0110 0000 1011 1110 */
void upd7810_device::LTA_A_H()
{
- UINT8 tmp = A - H;
+ uint8_t tmp = A - H;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -2319,7 +2319,7 @@ void upd7810_device::LTA_A_H()
/* 60 bf: 0110 0000 1011 1111 */
void upd7810_device::LTA_A_L()
{
- UINT8 tmp = A - L;
+ uint8_t tmp = A - L;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -2327,7 +2327,7 @@ void upd7810_device::LTA_A_L()
/* 60 c0: 0110 0000 1100 0000 */
void upd7810_device::ADD_A_V()
{
- UINT8 tmp = A + V;
+ uint8_t tmp = A + V;
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -2338,7 +2338,7 @@ void upd7810_device::ADD_A_V()
/* 60 c2: 0110 0000 1100 0010 */
void upd7810_device::ADD_A_B()
{
- UINT8 tmp = A + B;
+ uint8_t tmp = A + B;
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -2346,7 +2346,7 @@ void upd7810_device::ADD_A_B()
/* 60 c3: 0110 0000 1100 0011 */
void upd7810_device::ADD_A_C()
{
- UINT8 tmp = A + C;
+ uint8_t tmp = A + C;
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -2354,7 +2354,7 @@ void upd7810_device::ADD_A_C()
/* 60 c4: 0110 0000 1100 0100 */
void upd7810_device::ADD_A_D()
{
- UINT8 tmp = A + D;
+ uint8_t tmp = A + D;
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -2362,7 +2362,7 @@ void upd7810_device::ADD_A_D()
/* 60 c5: 0110 0000 1100 0101 */
void upd7810_device::ADD_A_E()
{
- UINT8 tmp = A + E;
+ uint8_t tmp = A + E;
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -2370,7 +2370,7 @@ void upd7810_device::ADD_A_E()
/* 60 c6: 0110 0000 1100 0110 */
void upd7810_device::ADD_A_H()
{
- UINT8 tmp = A + H;
+ uint8_t tmp = A + H;
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -2378,7 +2378,7 @@ void upd7810_device::ADD_A_H()
/* 60 c7: 0110 0000 1100 0111 */
void upd7810_device::ADD_A_L()
{
- UINT8 tmp = A + L;
+ uint8_t tmp = A + L;
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -2458,7 +2458,7 @@ void upd7810_device::ONA_A_L()
/* 60 d0: 0110 0000 1101 0000 */
void upd7810_device::ADC_A_V()
{
- UINT8 tmp = A + V + (PSW & CY);
+ uint8_t tmp = A + V + (PSW & CY);
ZHC_ADD( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2469,7 +2469,7 @@ void upd7810_device::ADC_A_V()
/* 60 d2: 0110 0000 1101 0010 */
void upd7810_device::ADC_A_B()
{
- UINT8 tmp = A + B + (PSW & CY);
+ uint8_t tmp = A + B + (PSW & CY);
ZHC_ADD( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2477,7 +2477,7 @@ void upd7810_device::ADC_A_B()
/* 60 d3: 0110 0000 1101 0011 */
void upd7810_device::ADC_A_C()
{
- UINT8 tmp = A + C + (PSW & CY);
+ uint8_t tmp = A + C + (PSW & CY);
ZHC_ADD( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2485,7 +2485,7 @@ void upd7810_device::ADC_A_C()
/* 60 d4: 0110 0000 1101 0100 */
void upd7810_device::ADC_A_D()
{
- UINT8 tmp = A + D + (PSW & CY);
+ uint8_t tmp = A + D + (PSW & CY);
ZHC_ADD( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2493,7 +2493,7 @@ void upd7810_device::ADC_A_D()
/* 60 d5: 0110 0000 1101 0101 */
void upd7810_device::ADC_A_E()
{
- UINT8 tmp = A + E + (PSW & CY);
+ uint8_t tmp = A + E + (PSW & CY);
ZHC_ADD( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2501,7 +2501,7 @@ void upd7810_device::ADC_A_E()
/* 60 d6: 0110 0000 1101 0110 */
void upd7810_device::ADC_A_H()
{
- UINT8 tmp = A + H + (PSW & CY);
+ uint8_t tmp = A + H + (PSW & CY);
ZHC_ADD( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2509,7 +2509,7 @@ void upd7810_device::ADC_A_H()
/* 60 d7: 0110 0000 1101 0111 */
void upd7810_device::ADC_A_L()
{
- UINT8 tmp = A + L + (PSW & CY);
+ uint8_t tmp = A + L + (PSW & CY);
ZHC_ADD( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2589,7 +2589,7 @@ void upd7810_device::OFFA_A_L()
/* 60 e0: 0110 0000 1110 0000 */
void upd7810_device::SUB_A_V()
{
- UINT8 tmp = A - V;
+ uint8_t tmp = A - V;
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -2600,7 +2600,7 @@ void upd7810_device::SUB_A_V()
/* 60 e2: 0110 0000 1110 0010 */
void upd7810_device::SUB_A_B()
{
- UINT8 tmp = A - B;
+ uint8_t tmp = A - B;
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -2608,7 +2608,7 @@ void upd7810_device::SUB_A_B()
/* 60 e3: 0110 0000 1110 0011 */
void upd7810_device::SUB_A_C()
{
- UINT8 tmp = A - C;
+ uint8_t tmp = A - C;
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -2616,7 +2616,7 @@ void upd7810_device::SUB_A_C()
/* 60 e4: 0110 0000 1110 0100 */
void upd7810_device::SUB_A_D()
{
- UINT8 tmp = A - D;
+ uint8_t tmp = A - D;
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -2624,7 +2624,7 @@ void upd7810_device::SUB_A_D()
/* 60 e5: 0110 0000 1110 0101 */
void upd7810_device::SUB_A_E()
{
- UINT8 tmp = A - E;
+ uint8_t tmp = A - E;
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -2632,7 +2632,7 @@ void upd7810_device::SUB_A_E()
/* 60 e6: 0110 0000 1110 0110 */
void upd7810_device::SUB_A_H()
{
- UINT8 tmp = A - H;
+ uint8_t tmp = A - H;
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -2640,7 +2640,7 @@ void upd7810_device::SUB_A_H()
/* 60 e7: 0110 0000 1110 0111 */
void upd7810_device::SUB_A_L()
{
- UINT8 tmp = A - L;
+ uint8_t tmp = A - L;
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -2648,7 +2648,7 @@ void upd7810_device::SUB_A_L()
/* 60 e8: 0110 0000 1110 1000 */
void upd7810_device::NEA_A_V()
{
- UINT8 tmp = A - V;
+ uint8_t tmp = A - V;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -2659,7 +2659,7 @@ void upd7810_device::NEA_A_V()
/* 60 ea: 0110 0000 1110 1010 */
void upd7810_device::NEA_A_B()
{
- UINT8 tmp = A - B;
+ uint8_t tmp = A - B;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -2667,7 +2667,7 @@ void upd7810_device::NEA_A_B()
/* 60 eb: 0110 0000 1110 1011 */
void upd7810_device::NEA_A_C()
{
- UINT8 tmp = A - C;
+ uint8_t tmp = A - C;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -2675,7 +2675,7 @@ void upd7810_device::NEA_A_C()
/* 60 ec: 0110 0000 1110 1100 */
void upd7810_device::NEA_A_D()
{
- UINT8 tmp = A - D;
+ uint8_t tmp = A - D;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -2683,7 +2683,7 @@ void upd7810_device::NEA_A_D()
/* 60 ed: 0110 0000 1110 1101 */
void upd7810_device::NEA_A_E()
{
- UINT8 tmp = A - E;
+ uint8_t tmp = A - E;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -2691,7 +2691,7 @@ void upd7810_device::NEA_A_E()
/* 60 ee: 0110 0000 1110 1110 */
void upd7810_device::NEA_A_H()
{
- UINT8 tmp = A - H;
+ uint8_t tmp = A - H;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -2699,7 +2699,7 @@ void upd7810_device::NEA_A_H()
/* 60 ef: 0110 0000 1110 1111 */
void upd7810_device::NEA_A_L()
{
- UINT8 tmp = A - L;
+ uint8_t tmp = A - L;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -2707,7 +2707,7 @@ void upd7810_device::NEA_A_L()
/* 60 f0: 0110 0000 1111 0000 */
void upd7810_device::SBB_A_V()
{
- UINT8 tmp = A - V - (PSW & CY);
+ uint8_t tmp = A - V - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2718,7 +2718,7 @@ void upd7810_device::SBB_A_V()
/* 60 f2: 0110 0000 1111 0010 */
void upd7810_device::SBB_A_B()
{
- UINT8 tmp = A - B - (PSW & CY);
+ uint8_t tmp = A - B - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2726,7 +2726,7 @@ void upd7810_device::SBB_A_B()
/* 60 f3: 0110 0000 1111 0011 */
void upd7810_device::SBB_A_C()
{
- UINT8 tmp = A - C - (PSW & CY);
+ uint8_t tmp = A - C - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2734,7 +2734,7 @@ void upd7810_device::SBB_A_C()
/* 60 f4: 0110 0000 1111 0100 */
void upd7810_device::SBB_A_D()
{
- UINT8 tmp = A - D - (PSW & CY);
+ uint8_t tmp = A - D - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2742,7 +2742,7 @@ void upd7810_device::SBB_A_D()
/* 60 f5: 0110 0000 1111 0101 */
void upd7810_device::SBB_A_E()
{
- UINT8 tmp = A - E - (PSW & CY);
+ uint8_t tmp = A - E - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2750,7 +2750,7 @@ void upd7810_device::SBB_A_E()
/* 60 f6: 0110 0000 1111 0110 */
void upd7810_device::SBB_A_H()
{
- UINT8 tmp = A - H - (PSW & CY);
+ uint8_t tmp = A - H - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2758,7 +2758,7 @@ void upd7810_device::SBB_A_H()
/* 60 f7: 0110 0000 1111 0111 */
void upd7810_device::SBB_A_L()
{
- UINT8 tmp = A - L - (PSW & CY);
+ uint8_t tmp = A - L - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -2766,7 +2766,7 @@ void upd7810_device::SBB_A_L()
/* 60 f8: 0110 0000 1111 1000 */
void upd7810_device::EQA_A_V()
{
- UINT8 tmp = A - V;
+ uint8_t tmp = A - V;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -2777,7 +2777,7 @@ void upd7810_device::EQA_A_V()
/* 60 fa: 0110 0000 1111 1010 */
void upd7810_device::EQA_A_B()
{
- UINT8 tmp = A - B;
+ uint8_t tmp = A - B;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -2785,7 +2785,7 @@ void upd7810_device::EQA_A_B()
/* 60 fb: 0110 0000 1111 1011 */
void upd7810_device::EQA_A_C()
{
- UINT8 tmp = A - C;
+ uint8_t tmp = A - C;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -2793,7 +2793,7 @@ void upd7810_device::EQA_A_C()
/* 60 fc: 0110 0000 1111 1100 */
void upd7810_device::EQA_A_D()
{
- UINT8 tmp = A - D;
+ uint8_t tmp = A - D;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -2801,7 +2801,7 @@ void upd7810_device::EQA_A_D()
/* 60 fd: 0110 0000 1111 1101 */
void upd7810_device::EQA_A_E()
{
- UINT8 tmp = A - E;
+ uint8_t tmp = A - E;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -2809,7 +2809,7 @@ void upd7810_device::EQA_A_E()
/* 60 fe: 0110 0000 1111 1110 */
void upd7810_device::EQA_A_H()
{
- UINT8 tmp = A - H;
+ uint8_t tmp = A - H;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -2817,7 +2817,7 @@ void upd7810_device::EQA_A_H()
/* 60 ff: 0110 0000 1111 1111 */
void upd7810_device::EQA_A_L()
{
- UINT8 tmp = A - L;
+ uint8_t tmp = A - L;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -2826,7 +2826,7 @@ void upd7810_device::EQA_A_L()
/* 64 00: 0110 0100 0000 0000 xxxx xxxx */
void upd7810_device::MVI_PA_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
WP( UPD7810_PORTA, imm );
}
@@ -2834,7 +2834,7 @@ void upd7810_device::MVI_PA_xx()
/* 64 01: 0110 0100 0000 0001 xxxx xxxx */
void upd7810_device::MVI_PB_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
WP( UPD7810_PORTB, imm );
}
@@ -2842,7 +2842,7 @@ void upd7810_device::MVI_PB_xx()
/* 64 02: 0110 0100 0000 0010 xxxx xxxx */
void upd7810_device::MVI_PC_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
WP( UPD7810_PORTC, imm );
}
@@ -2850,7 +2850,7 @@ void upd7810_device::MVI_PC_xx()
/* 64 03: 0110 0100 0000 0011 xxxx xxxx */
void upd7810_device::MVI_PD_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
WP( UPD7810_PORTD, imm );
}
@@ -2858,7 +2858,7 @@ void upd7810_device::MVI_PD_xx()
/* 64 05: 0110 0100 0000 0101 xxxx xxxx */
void upd7810_device::MVI_PF_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
WP( UPD7810_PORTF, imm );
}
@@ -2878,7 +2878,7 @@ void upd7810_device::MVI_MKL_xx()
/* 64 08: 0110 0100 0000 1000 xxxx xxxx */
void upd7810_device::ANI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA), imm;
+ uint8_t pa = RP( UPD7810_PORTA), imm;
RDOPARG( imm );
pa &= imm;
WP( UPD7810_PORTA, pa );
@@ -2888,7 +2888,7 @@ void upd7810_device::ANI_PA_xx()
/* 64 09: 0110 0100 0000 1001 xxxx xxxx */
void upd7810_device::ANI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB), imm;
+ uint8_t pb = RP( UPD7810_PORTB), imm;
RDOPARG( imm );
pb &= imm;
WP( UPD7810_PORTB, pb );
@@ -2898,7 +2898,7 @@ void upd7810_device::ANI_PB_xx()
/* 64 0a: 0110 0100 0000 1010 xxxx xxxx */
void upd7810_device::ANI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC), imm;
+ uint8_t pc = RP( UPD7810_PORTC), imm;
RDOPARG( imm );
pc &= imm;
WP( UPD7810_PORTC, pc );
@@ -2908,7 +2908,7 @@ void upd7810_device::ANI_PC_xx()
/* 64 0b: 0110 0100 0000 1011 xxxx xxxx */
void upd7810_device::ANI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), imm;
+ uint8_t pd = RP( UPD7810_PORTD ), imm;
RDOPARG( imm );
pd &= imm;
WP( UPD7810_PORTD, pd );
@@ -2918,7 +2918,7 @@ void upd7810_device::ANI_PD_xx()
/* 64 0d: 0110 0100 0000 1101 xxxx xxxx */
void upd7810_device::ANI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), imm;
+ uint8_t pf = RP( UPD7810_PORTF ), imm;
RDOPARG( imm );
pf &= imm;
WP( UPD7810_PORTF, pf );
@@ -2928,7 +2928,7 @@ void upd7810_device::ANI_PF_xx()
/* 64 0e: 0110 0100 0000 1110 xxxx xxxx */
void upd7810_device::ANI_MKH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
MKH &= imm;
SET_Z(MKH);
@@ -2937,7 +2937,7 @@ void upd7810_device::ANI_MKH_xx()
/* 64 0f: 0110 0100 0000 1111 xxxx xxxx */
void upd7810_device::ANI_MKL_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
MKL &= imm;
SET_Z(MKL);
@@ -2946,7 +2946,7 @@ void upd7810_device::ANI_MKL_xx()
/* 64 10: 0110 0100 0001 0000 xxxx xxxx */
void upd7810_device::XRI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), imm;
+ uint8_t pa = RP( UPD7810_PORTA ), imm;
RDOPARG( imm );
pa ^= imm;
WP( UPD7810_PORTA, pa );
@@ -2956,7 +2956,7 @@ void upd7810_device::XRI_PA_xx()
/* 64 11: 0110 0100 0001 0001 xxxx xxxx */
void upd7810_device::XRI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), imm;
+ uint8_t pb = RP( UPD7810_PORTB ), imm;
RDOPARG( imm );
pb ^= imm;
WP( UPD7810_PORTB, pb );
@@ -2966,7 +2966,7 @@ void upd7810_device::XRI_PB_xx()
/* 64 12: 0110 0100 0001 0010 xxxx xxxx */
void upd7810_device::XRI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), imm;
+ uint8_t pc = RP( UPD7810_PORTC ), imm;
RDOPARG( imm );
pc ^= imm;
WP( UPD7810_PORTC, pc );
@@ -2976,7 +2976,7 @@ void upd7810_device::XRI_PC_xx()
/* 64 13: 0110 0100 0001 0011 xxxx xxxx */
void upd7810_device::XRI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), imm;
+ uint8_t pd = RP( UPD7810_PORTD ), imm;
RDOPARG( imm );
pd ^= imm;
WP( UPD7810_PORTD, pd );
@@ -2986,7 +2986,7 @@ void upd7810_device::XRI_PD_xx()
/* 64 15: 0110 0100 0001 0101 xxxx xxxx */
void upd7810_device::XRI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), imm;
+ uint8_t pf = RP( UPD7810_PORTF ), imm;
RDOPARG( imm );
pf ^= imm;
WP( UPD7810_PORTF, pf );
@@ -2996,7 +2996,7 @@ void upd7810_device::XRI_PF_xx()
/* 64 16: 0110 0100 0001 0110 xxxx xxxx */
void upd7810_device::XRI_MKH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
MKH ^= imm;
SET_Z(MKH);
@@ -3005,7 +3005,7 @@ void upd7810_device::XRI_MKH_xx()
/* 64 17: 0110 0100 0001 0111 xxxx xxxx */
void upd7810_device::XRI_MKL_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
MKL ^= imm;
SET_Z(MKL);
@@ -3014,7 +3014,7 @@ void upd7810_device::XRI_MKL_xx()
/* 64 18: 0110 0100 0001 1000 xxxx xxxx */
void upd7810_device::ORI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), imm;
+ uint8_t pa = RP( UPD7810_PORTA ), imm;
RDOPARG( imm );
pa |= imm;
WP( UPD7810_PORTA, pa );
@@ -3024,7 +3024,7 @@ void upd7810_device::ORI_PA_xx()
/* 64 19: 0110 0100 0001 1001 xxxx xxxx */
void upd7810_device::ORI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), imm;
+ uint8_t pb = RP( UPD7810_PORTB ), imm;
RDOPARG( imm );
pb |= imm;
WP( UPD7810_PORTB, pb );
@@ -3034,7 +3034,7 @@ void upd7810_device::ORI_PB_xx()
/* 64 1a: 0110 0100 0001 1010 xxxx xxxx */
void upd7810_device::ORI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), imm;
+ uint8_t pc = RP( UPD7810_PORTC ), imm;
RDOPARG( imm );
pc |= imm;
WP( UPD7810_PORTC, pc );
@@ -3044,7 +3044,7 @@ void upd7810_device::ORI_PC_xx()
/* 64 1b: 0110 0100 0001 1011 xxxx xxxx */
void upd7810_device::ORI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), imm;
+ uint8_t pd = RP( UPD7810_PORTD ), imm;
RDOPARG( imm );
pd |= imm;
WP( UPD7810_PORTD, pd );
@@ -3054,7 +3054,7 @@ void upd7810_device::ORI_PD_xx()
/* 64 1d: 0110 0100 0001 1101 xxxx xxxx */
void upd7810_device::ORI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), imm;
+ uint8_t pf = RP( UPD7810_PORTF ), imm;
RDOPARG( imm );
pf |= imm;
WP( UPD7810_PORTF, pf );
@@ -3064,7 +3064,7 @@ void upd7810_device::ORI_PF_xx()
/* 64 1e: 0110 0100 0001 1110 xxxx xxxx */
void upd7810_device::ORI_MKH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
MKH |= imm;
SET_Z(MKH);
@@ -3073,7 +3073,7 @@ void upd7810_device::ORI_MKH_xx()
/* 64 1f: 0110 0100 0001 1111 xxxx xxxx */
void upd7810_device::ORI_MKL_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
MKL |= imm;
SET_Z(MKL);
@@ -3082,8 +3082,8 @@ void upd7810_device::ORI_MKL_xx()
/* 64 20: 0110 0100 0010 0000 xxxx xxxx */
void upd7810_device::ADINC_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA );
- UINT8 tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA );
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = pa + imm;
@@ -3096,8 +3096,8 @@ void upd7810_device::ADINC_PA_xx()
/* 64 21: 0110 0100 0010 0001 xxxx xxxx */
void upd7810_device::ADINC_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB );
- UINT8 tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB );
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = pb + imm;
@@ -3110,8 +3110,8 @@ void upd7810_device::ADINC_PB_xx()
/* 64 22: 0110 0100 0010 0010 xxxx xxxx */
void upd7810_device::ADINC_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC );
- UINT8 tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC );
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = pc + imm;
@@ -3124,8 +3124,8 @@ void upd7810_device::ADINC_PC_xx()
/* 64 23: 0110 0100 0010 0011 xxxx xxxx */
void upd7810_device::ADINC_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD );
- UINT8 tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD );
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = pd + imm;
@@ -3138,8 +3138,8 @@ void upd7810_device::ADINC_PD_xx()
/* 64 25: 0110 0100 0010 0101 xxxx xxxx */
void upd7810_device::ADINC_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF );
- UINT8 tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF );
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = pf + imm;
@@ -3152,7 +3152,7 @@ void upd7810_device::ADINC_PF_xx()
/* 64 26: 0110 0100 0010 0110 xxxx xxxx */
void upd7810_device::ADINC_MKH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKH + imm;
@@ -3165,7 +3165,7 @@ void upd7810_device::ADINC_MKH_xx()
/* 64 27: 0110 0100 0010 0111 xxxx xxxx */
void upd7810_device::ADINC_MKL_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKL + imm;
@@ -3178,8 +3178,8 @@ void upd7810_device::ADINC_MKL_xx()
/* 64 28: 0110 0100 0010 1000 xxxx xxxx */
void upd7810_device::GTI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), imm;
- UINT16 tmp;
+ uint8_t pa = RP( UPD7810_PORTA ), imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = pa - imm - 1;
@@ -3191,8 +3191,8 @@ void upd7810_device::GTI_PA_xx()
/* 64 29: 0110 0100 0010 1001 xxxx xxxx */
void upd7810_device::GTI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), imm;
- UINT16 tmp;
+ uint8_t pb = RP( UPD7810_PORTB ), imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = pb - imm - 1;
@@ -3204,8 +3204,8 @@ void upd7810_device::GTI_PB_xx()
/* 64 2a: 0110 0100 0010 1010 xxxx xxxx */
void upd7810_device::GTI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), imm;
- UINT16 tmp;
+ uint8_t pc = RP( UPD7810_PORTC ), imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = pc - imm - 1;
@@ -3217,8 +3217,8 @@ void upd7810_device::GTI_PC_xx()
/* 64 2b: 0110 0100 0010 1011 xxxx xxxx */
void upd7810_device::GTI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), imm;
- UINT16 tmp;
+ uint8_t pd = RP( UPD7810_PORTD ), imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = pd - imm - 1;
@@ -3230,8 +3230,8 @@ void upd7810_device::GTI_PD_xx()
/* 64 2d: 0110 0100 0010 1101 xxxx xxxx */
void upd7810_device::GTI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), imm;
- UINT16 tmp;
+ uint8_t pf = RP( UPD7810_PORTF ), imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = pf - imm - 1;
@@ -3243,8 +3243,8 @@ void upd7810_device::GTI_PF_xx()
/* 64 2e: 0110 0100 0010 1110 xxxx xxxx */
void upd7810_device::GTI_MKH_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = MKH - imm - 1;
@@ -3256,8 +3256,8 @@ void upd7810_device::GTI_MKH_xx()
/* 64 2f: 0110 0100 0010 1111 xxxx xxxx */
void upd7810_device::GTI_MKL_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = MKL - imm - 1;
@@ -3269,7 +3269,7 @@ void upd7810_device::GTI_MKL_xx()
/* 64 30: 0110 0100 0011 0000 xxxx xxxx */
void upd7810_device::SUINB_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA ), tmp, imm;
RDOPARG( imm );
tmp = pa - imm;
@@ -3282,7 +3282,7 @@ void upd7810_device::SUINB_PA_xx()
/* 64 31: 0110 0100 0011 0001 xxxx xxxx */
void upd7810_device::SUINB_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB ), tmp, imm;
RDOPARG( imm );
tmp = pb - imm;
@@ -3295,7 +3295,7 @@ void upd7810_device::SUINB_PB_xx()
/* 64 32: 0110 0100 0011 0010 xxxx xxxx */
void upd7810_device::SUINB_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC ), tmp, imm;
RDOPARG( imm );
tmp = pc - imm;
@@ -3308,7 +3308,7 @@ void upd7810_device::SUINB_PC_xx()
/* 64 33: 0110 0100 0011 0011 xxxx xxxx */
void upd7810_device::SUINB_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD ), tmp, imm;
RDOPARG( imm );
tmp = pd - imm;
@@ -3321,7 +3321,7 @@ void upd7810_device::SUINB_PD_xx()
/* 64 35: 0110 0100 0011 0101 xxxx xxxx */
void upd7810_device::SUINB_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF ), tmp, imm;
RDOPARG( imm );
tmp = pf - imm;
@@ -3334,7 +3334,7 @@ void upd7810_device::SUINB_PF_xx()
/* 64 36: 0110 0100 0011 0110 xxxx xxxx */
void upd7810_device::SUINB_MKH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKH - imm;
@@ -3346,7 +3346,7 @@ void upd7810_device::SUINB_MKH_xx()
/* 64 37: 0110 0100 0011 0111 xxxx xxxx */
void upd7810_device::SUINB_MKL_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKL - imm;
@@ -3358,7 +3358,7 @@ void upd7810_device::SUINB_MKL_xx()
/* 64 38: 0110 0100 0011 1000 xxxx xxxx */
void upd7810_device::LTI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA ), tmp, imm;
RDOPARG( imm );
tmp = pa - imm;
ZHC_SUB( tmp, pa, 0 );
@@ -3368,7 +3368,7 @@ void upd7810_device::LTI_PA_xx()
/* 64 39: 0110 0100 0011 1001 xxxx xxxx */
void upd7810_device::LTI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB ), tmp, imm;
RDOPARG( imm );
tmp = pb - imm;
ZHC_SUB( tmp, pb, 0 );
@@ -3378,7 +3378,7 @@ void upd7810_device::LTI_PB_xx()
/* 64 3a: 0110 0100 0011 1010 xxxx xxxx */
void upd7810_device::LTI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC ), tmp, imm;
RDOPARG( imm );
tmp = pc - imm;
ZHC_SUB( tmp, pc, 0 );
@@ -3388,7 +3388,7 @@ void upd7810_device::LTI_PC_xx()
/* 64 3b: 0110 0100 0011 1011 xxxx xxxx */
void upd7810_device::LTI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD ), tmp, imm;
RDOPARG( imm );
tmp = pd - imm;
ZHC_SUB( tmp, pd, 0 );
@@ -3398,7 +3398,7 @@ void upd7810_device::LTI_PD_xx()
/* 64 3d: 0110 0100 0011 1101 xxxx xxxx */
void upd7810_device::LTI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF ), tmp, imm;
RDOPARG( imm );
tmp = pf - imm;
ZHC_SUB( tmp, pf, 0 );
@@ -3408,7 +3408,7 @@ void upd7810_device::LTI_PF_xx()
/* 64 3e: 0110 0100 0011 1110 xxxx xxxx */
void upd7810_device::LTI_MKH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKH - imm;
@@ -3419,7 +3419,7 @@ void upd7810_device::LTI_MKH_xx()
/* 64 3f: 0110 0100 0011 1111 xxxx xxxx */
void upd7810_device::LTI_MKL_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKL - imm;
@@ -3430,7 +3430,7 @@ void upd7810_device::LTI_MKL_xx()
/* 64 40: 0110 0100 0100 0000 xxxx xxxx */
void upd7810_device::ADI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA ), tmp, imm;
RDOPARG( imm );
tmp = pa + imm;
@@ -3442,7 +3442,7 @@ void upd7810_device::ADI_PA_xx()
/* 64 41: 0110 0100 0100 0001 xxxx xxxx */
void upd7810_device::ADI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB ), tmp, imm;
RDOPARG( imm );
tmp = pb + imm;
@@ -3454,7 +3454,7 @@ void upd7810_device::ADI_PB_xx()
/* 64 42: 0110 0100 0100 0010 xxxx xxxx */
void upd7810_device::ADI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC ), tmp, imm;
RDOPARG( imm );
tmp = pc + imm;
@@ -3466,7 +3466,7 @@ void upd7810_device::ADI_PC_xx()
/* 64 43: 0110 0100 0100 0011 xxxx xxxx */
void upd7810_device::ADI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD ), tmp, imm;
RDOPARG( imm );
tmp = pd + imm;
@@ -3478,7 +3478,7 @@ void upd7810_device::ADI_PD_xx()
/* 64 45: 0110 0100 0100 0101 xxxx xxxx */
void upd7810_device::ADI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF ), tmp, imm;
RDOPARG( imm );
tmp = pf + imm;
@@ -3490,7 +3490,7 @@ void upd7810_device::ADI_PF_xx()
/* 64 46: 0110 0100 0100 0110 xxxx xxxx */
void upd7810_device::ADI_MKH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKH + imm;
@@ -3501,7 +3501,7 @@ void upd7810_device::ADI_MKH_xx()
/* 64 47: 0110 0100 0100 0111 xxxx xxxx */
void upd7810_device::ADI_MKL_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKL + imm;
@@ -3512,7 +3512,7 @@ void upd7810_device::ADI_MKL_xx()
/* 64 48: 0110 0100 0100 1000 xxxx xxxx */
void upd7810_device::ONI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), imm;
+ uint8_t pa = RP( UPD7810_PORTA ), imm;
RDOPARG( imm );
if (pa & imm)
@@ -3522,7 +3522,7 @@ void upd7810_device::ONI_PA_xx()
/* 64 49: 0110 0100 0100 1001 xxxx xxxx */
void upd7810_device::ONI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), imm;
+ uint8_t pb = RP( UPD7810_PORTB ), imm;
RDOPARG( imm );
if (pb & imm)
@@ -3532,7 +3532,7 @@ void upd7810_device::ONI_PB_xx()
/* 64 4a: 0110 0100 0100 1010 xxxx xxxx */
void upd7810_device::ONI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), imm;
+ uint8_t pc = RP( UPD7810_PORTC ), imm;
RDOPARG( imm );
if (pc & imm)
@@ -3542,7 +3542,7 @@ void upd7810_device::ONI_PC_xx()
/* 64 4b: 0110 0100 0100 1011 xxxx xxxx */
void upd7810_device::ONI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), imm;
+ uint8_t pd = RP( UPD7810_PORTD ), imm;
RDOPARG( imm );
if (pd & imm)
@@ -3552,7 +3552,7 @@ void upd7810_device::ONI_PD_xx()
/* 64 4d: 0110 0100 0100 1101 xxxx xxxx */
void upd7810_device::ONI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), imm;
+ uint8_t pf = RP( UPD7810_PORTF ), imm;
RDOPARG( imm );
if (pf & imm)
@@ -3562,7 +3562,7 @@ void upd7810_device::ONI_PF_xx()
/* 64 4e: 0110 0100 0100 1110 xxxx xxxx */
void upd7810_device::ONI_MKH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (MKH & imm)
@@ -3572,7 +3572,7 @@ void upd7810_device::ONI_MKH_xx()
/* 64 4f: 0110 0100 0100 1111 xxxx xxxx */
void upd7810_device::ONI_MKL_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (MKL & imm)
@@ -3582,7 +3582,7 @@ void upd7810_device::ONI_MKL_xx()
/* 64 50: 0110 0100 0101 0000 xxxx xxxx */
void upd7810_device::ACI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA ), tmp, imm;
RDOPARG( imm );
tmp = pa + imm + (PSW & CY);
@@ -3594,7 +3594,7 @@ void upd7810_device::ACI_PA_xx()
/* 64 51: 0110 0100 0101 0001 xxxx xxxx */
void upd7810_device::ACI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB ), tmp, imm;
RDOPARG( imm );
tmp = pb + imm + (PSW & CY);
@@ -3606,7 +3606,7 @@ void upd7810_device::ACI_PB_xx()
/* 64 52: 0110 0100 0101 0010 xxxx xxxx */
void upd7810_device::ACI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC ), tmp, imm;
RDOPARG( imm );
tmp = pc + imm + (PSW & CY);
@@ -3618,7 +3618,7 @@ void upd7810_device::ACI_PC_xx()
/* 64 53: 0110 0100 0101 0011 xxxx xxxx */
void upd7810_device::ACI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD ), tmp, imm;
RDOPARG( imm );
tmp = pd + imm + (PSW & CY);
@@ -3630,7 +3630,7 @@ void upd7810_device::ACI_PD_xx()
/* 64 55: 0110 0100 0101 0101 xxxx xxxx */
void upd7810_device::ACI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF ), tmp, imm;
RDOPARG( imm );
tmp = pf + imm + (PSW & CY);
@@ -3642,7 +3642,7 @@ void upd7810_device::ACI_PF_xx()
/* 64 56: 0110 0100 0101 0110 xxxx xxxx */
void upd7810_device::ACI_MKH_xx()
{
- UINT8 imm, tmp;
+ uint8_t imm, tmp;
RDOPARG( imm );
tmp = MKH + imm + (PSW & CY);
@@ -3653,7 +3653,7 @@ void upd7810_device::ACI_MKH_xx()
/* 64 57: 0110 0100 0101 0111 xxxx xxxx */
void upd7810_device::ACI_MKL_xx()
{
- UINT8 imm, tmp;
+ uint8_t imm, tmp;
RDOPARG( imm );
tmp = MKL + imm + (PSW & CY);
@@ -3664,7 +3664,7 @@ void upd7810_device::ACI_MKL_xx()
/* 64 58: 0110 0100 0101 1000 xxxx xxxx */
void upd7810_device::OFFI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), imm;
+ uint8_t pa = RP( UPD7810_PORTA ), imm;
RDOPARG( imm );
if (0 == (pa & imm))
@@ -3674,7 +3674,7 @@ void upd7810_device::OFFI_PA_xx()
/* 64 59: 0110 0100 0101 1001 xxxx xxxx */
void upd7810_device::OFFI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), imm;
+ uint8_t pb = RP( UPD7810_PORTB ), imm;
RDOPARG( imm );
if (0 == (pb & imm))
@@ -3684,7 +3684,7 @@ void upd7810_device::OFFI_PB_xx()
/* 64 5a: 0110 0100 0101 1010 xxxx xxxx */
void upd7810_device::OFFI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), imm;
+ uint8_t pc = RP( UPD7810_PORTC ), imm;
RDOPARG( imm );
if (0 == (pc & imm))
@@ -3694,7 +3694,7 @@ void upd7810_device::OFFI_PC_xx()
/* 64 5b: 0110 0100 0101 1011 xxxx xxxx */
void upd7810_device::OFFI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), imm;
+ uint8_t pd = RP( UPD7810_PORTD ), imm;
RDOPARG( imm );
if (0 == (pd & imm))
@@ -3704,7 +3704,7 @@ void upd7810_device::OFFI_PD_xx()
/* 64 5d: 0110 0100 0101 1101 xxxx xxxx */
void upd7810_device::OFFI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), imm;
+ uint8_t pf = RP( UPD7810_PORTF ), imm;
RDOPARG( imm );
if (0 == (pf & imm))
@@ -3714,7 +3714,7 @@ void upd7810_device::OFFI_PF_xx()
/* 64 5e: 0110 0100 0101 1110 xxxx xxxx */
void upd7810_device::OFFI_MKH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (MKH & imm))
@@ -3724,7 +3724,7 @@ void upd7810_device::OFFI_MKH_xx()
/* 64 5f: 0110 0100 0101 1111 xxxx xxxx */
void upd7810_device::OFFI_MKL_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (MKL & imm))
@@ -3734,7 +3734,7 @@ void upd7810_device::OFFI_MKL_xx()
/* 64 60: 0110 0100 0110 0000 xxxx xxxx */
void upd7810_device::SUI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA ), tmp, imm;
RDOPARG( imm );
tmp = pa - imm;
@@ -3746,7 +3746,7 @@ void upd7810_device::SUI_PA_xx()
/* 64 61: 0110 0100 0110 0001 xxxx xxxx */
void upd7810_device::SUI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB ), tmp, imm;
RDOPARG( imm );
tmp = pb - imm;
@@ -3758,7 +3758,7 @@ void upd7810_device::SUI_PB_xx()
/* 64 62: 0110 0100 0110 0010 xxxx xxxx */
void upd7810_device::SUI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC ), tmp, imm;
RDOPARG( imm );
tmp = pc - imm;
@@ -3770,7 +3770,7 @@ void upd7810_device::SUI_PC_xx()
/* 64 63: 0110 0100 0110 0011 xxxx xxxx */
void upd7810_device::SUI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD ), tmp, imm;
RDOPARG( imm );
tmp = pd - imm;
@@ -3782,7 +3782,7 @@ void upd7810_device::SUI_PD_xx()
/* 64 65: 0110 0100 0110 0101 xxxx xxxx */
void upd7810_device::SUI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF ), tmp, imm;
RDOPARG( imm );
tmp = pf - imm;
@@ -3794,7 +3794,7 @@ void upd7810_device::SUI_PF_xx()
/* 64 66: 0110 0100 0110 0110 xxxx xxxx */
void upd7810_device::SUI_MKH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKH - imm;
@@ -3805,7 +3805,7 @@ void upd7810_device::SUI_MKH_xx()
/* 64 67: 0110 0100 0110 0111 xxxx xxxx */
void upd7810_device::SUI_MKL_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKL - imm;
@@ -3816,7 +3816,7 @@ void upd7810_device::SUI_MKL_xx()
/* 64 68: 0110 0100 0110 1000 xxxx xxxx */
void upd7810_device::NEI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA ), tmp, imm;
RDOPARG( imm );
tmp = pa - imm;
@@ -3827,7 +3827,7 @@ void upd7810_device::NEI_PA_xx()
/* 64 69: 0110 0100 0110 1001 xxxx xxxx */
void upd7810_device::NEI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB ), tmp, imm;
RDOPARG( imm );
tmp = pb - imm;
@@ -3838,7 +3838,7 @@ void upd7810_device::NEI_PB_xx()
/* 64 6a: 0110 0100 0110 1010 xxxx xxxx */
void upd7810_device::NEI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC ), tmp, imm;
RDOPARG( imm );
tmp = pc - imm;
@@ -3849,7 +3849,7 @@ void upd7810_device::NEI_PC_xx()
/* 64 6b: 0110 0100 0110 1011 xxxx xxxx */
void upd7810_device::NEI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD ), tmp, imm;
RDOPARG( imm );
tmp = pd - imm;
@@ -3860,7 +3860,7 @@ void upd7810_device::NEI_PD_xx()
/* 64 6d: 0110 0100 0110 1101 xxxx xxxx */
void upd7810_device::NEI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF ), tmp, imm;
RDOPARG( imm );
tmp = pf - imm;
@@ -3871,7 +3871,7 @@ void upd7810_device::NEI_PF_xx()
/* 64 6e: 0110 0100 0110 1110 xxxx xxxx */
void upd7810_device::NEI_MKH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKH - imm;
@@ -3882,7 +3882,7 @@ void upd7810_device::NEI_MKH_xx()
/* 64 6f: 0110 0100 0110 1111 xxxx xxxx */
void upd7810_device::NEI_MKL_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKL - imm;
@@ -3893,7 +3893,7 @@ void upd7810_device::NEI_MKL_xx()
/* 64 70: 0110 0100 0111 0000 xxxx xxxx */
void upd7810_device::SBI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA ), tmp, imm;
RDOPARG( imm );
tmp = pa - imm - (PSW & CY);
@@ -3905,7 +3905,7 @@ void upd7810_device::SBI_PA_xx()
/* 64 71: 0110 0100 0111 0001 xxxx xxxx */
void upd7810_device::SBI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB ), tmp, imm;
RDOPARG( imm );
tmp = pb - imm - (PSW & CY);
@@ -3917,7 +3917,7 @@ void upd7810_device::SBI_PB_xx()
/* 64 72: 0110 0100 0111 0010 xxxx xxxx */
void upd7810_device::SBI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC ), tmp, imm;
RDOPARG( imm );
tmp = pc - imm - (PSW & CY);
@@ -3929,7 +3929,7 @@ void upd7810_device::SBI_PC_xx()
/* 64 73: 0110 0100 0111 0011 xxxx xxxx */
void upd7810_device::SBI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD ), tmp, imm;
RDOPARG( imm );
tmp = pd - imm - (PSW & CY);
@@ -3941,7 +3941,7 @@ void upd7810_device::SBI_PD_xx()
/* 64 75: 0110 0100 0111 0101 xxxx xxxx */
void upd7810_device::SBI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF ), tmp, imm;
RDOPARG( imm );
tmp = pf - imm - (PSW & CY);
@@ -3953,7 +3953,7 @@ void upd7810_device::SBI_PF_xx()
/* 64 76: 0110 0100 0111 0110 xxxx xxxx */
void upd7810_device::SBI_MKH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKH - imm - (PSW & CY);
@@ -3964,7 +3964,7 @@ void upd7810_device::SBI_MKH_xx()
/* 64 77: 0110 0100 0111 0111 xxxx xxxx */
void upd7810_device::SBI_MKL_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKL - imm - (PSW & CY);
@@ -3975,7 +3975,7 @@ void upd7810_device::SBI_MKL_xx()
/* 64 78: 0110 0100 0111 1000 xxxx xxxx */
void upd7810_device::EQI_PA_xx()
{
- UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ uint8_t pa = RP( UPD7810_PORTA ), tmp, imm;
RDOPARG( imm );
tmp = pa - imm;
@@ -3986,7 +3986,7 @@ void upd7810_device::EQI_PA_xx()
/* 64 79: 0110 0100 0111 1001 xxxx xxxx */
void upd7810_device::EQI_PB_xx()
{
- UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ uint8_t pb = RP( UPD7810_PORTB ), tmp, imm;
RDOPARG( imm );
tmp = pb - imm;
@@ -3997,7 +3997,7 @@ void upd7810_device::EQI_PB_xx()
/* 64 7a: 0110 0100 0111 1010 xxxx xxxx */
void upd7810_device::EQI_PC_xx()
{
- UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ uint8_t pc = RP( UPD7810_PORTC ), tmp, imm;
RDOPARG( imm );
tmp = pc - imm;
@@ -4008,7 +4008,7 @@ void upd7810_device::EQI_PC_xx()
/* 64 7b: 0110 0100 0111 1011 xxxx xxxx */
void upd7810_device::EQI_PD_xx()
{
- UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ uint8_t pd = RP( UPD7810_PORTD ), tmp, imm;
RDOPARG( imm );
tmp = pd - imm;
@@ -4019,7 +4019,7 @@ void upd7810_device::EQI_PD_xx()
/* 64 7d: 0110 0100 0111 1101 xxxx xxxx */
void upd7810_device::EQI_PF_xx()
{
- UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ uint8_t pf = RP( UPD7810_PORTF ), tmp, imm;
RDOPARG( imm );
tmp = pf - imm;
@@ -4030,7 +4030,7 @@ void upd7810_device::EQI_PF_xx()
/* 64 7e: 0110 0100 0111 1110 xxxx xxxx */
void upd7810_device::EQI_MKH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKH - imm;
@@ -4041,7 +4041,7 @@ void upd7810_device::EQI_MKH_xx()
/* 64 7f: 0110 0100 0111 1111 xxxx xxxx */
void upd7810_device::EQI_MKL_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = MKL - imm;
@@ -4077,7 +4077,7 @@ void upd7810_device::MVI_TMM_xx()
/* 64 88: 0110 0100 1000 1000 xxxx xxxx */
void upd7810_device::ANI_ANM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
ANM &= imm;
@@ -4087,7 +4087,7 @@ void upd7810_device::ANI_ANM_xx()
/* 64 89: 0110 0100 1000 1001 xxxx xxxx */
void upd7810_device::ANI_SMH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
SMH &= imm;
@@ -4098,8 +4098,8 @@ void upd7810_device::ANI_SMH_xx()
void upd7810_device::ANI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t imm;
RDOPARG( imm );
/* only bits #1 and #5 can be read */
@@ -4111,7 +4111,7 @@ void upd7810_device::ANI_EOM_xx()
/* 64 8d: 0110 0100 1000 1101 xxxx xxxx */
void upd7810_device::ANI_TMM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
TMM &= imm;
@@ -4121,7 +4121,7 @@ void upd7810_device::ANI_TMM_xx()
/* 64 90: 0110 0100 1001 0000 xxxx xxxx */
void upd7810_device::XRI_ANM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
ANM ^= imm;
@@ -4131,7 +4131,7 @@ void upd7810_device::XRI_ANM_xx()
/* 64 91: 0110 0100 1001 0001 xxxx xxxx */
void upd7810_device::XRI_SMH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
SMH ^= imm;
@@ -4142,8 +4142,8 @@ void upd7810_device::XRI_SMH_xx()
void upd7810_device::XRI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t imm;
RDOPARG( imm );
/* only bits #1 and #5 can be read */
@@ -4155,7 +4155,7 @@ void upd7810_device::XRI_EOM_xx()
/* 64 95: 0110 0100 1001 0101 xxxx xxxx */
void upd7810_device::XRI_TMM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
TMM ^= imm;
@@ -4165,7 +4165,7 @@ void upd7810_device::XRI_TMM_xx()
/* 64 98: 0110 0100 1001 1000 xxxx xxxx */
void upd7810_device::ORI_ANM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
ANM |= imm;
@@ -4175,7 +4175,7 @@ void upd7810_device::ORI_ANM_xx()
/* 64 99: 0110 0100 1001 1001 xxxx xxxx */
void upd7810_device::ORI_SMH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
SMH |= imm;
@@ -4186,8 +4186,8 @@ void upd7810_device::ORI_SMH_xx()
void upd7810_device::ORI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t imm;
RDOPARG( imm );
/* only bits #1 and #5 can be read */
@@ -4199,7 +4199,7 @@ void upd7810_device::ORI_EOM_xx()
/* 64 9d: 0110 0100 1001 1101 xxxx xxxx */
void upd7810_device::ORI_TMM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
TMM |= imm;
@@ -4209,7 +4209,7 @@ void upd7810_device::ORI_TMM_xx()
/* 64 a0: 0110 0100 1010 0000 xxxx xxxx */
void upd7810_device::ADINC_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM + imm;
@@ -4222,7 +4222,7 @@ void upd7810_device::ADINC_ANM_xx()
/* 64 a1: 0110 0100 1010 0001 xxxx xxxx */
void upd7810_device::ADINC_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH + imm;
@@ -4236,8 +4236,8 @@ void upd7810_device::ADINC_SMH_xx()
void upd7810_device::ADINC_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
/* only bits #1 and #5 can be read */
@@ -4252,7 +4252,7 @@ void upd7810_device::ADINC_EOM_xx()
/* 64 a5: 0110 0100 1010 0101 xxxx xxxx */
void upd7810_device::ADINC_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM + imm;
@@ -4265,8 +4265,8 @@ void upd7810_device::ADINC_TMM_xx()
/* 64 a8: 0110 0100 1010 1000 xxxx xxxx */
void upd7810_device::GTI_ANM_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = ANM - imm - 1;
@@ -4278,8 +4278,8 @@ void upd7810_device::GTI_ANM_xx()
/* 64 a9: 0110 0100 1010 1001 xxxx xxxx */
void upd7810_device::GTI_SMH_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = SMH - imm - 1;
@@ -4292,9 +4292,9 @@ void upd7810_device::GTI_SMH_xx()
void upd7810_device::GTI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 imm;
- UINT16 tmp;
+ uint8_t eom = EOM & 0x22;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = eom - imm - 1;
@@ -4306,8 +4306,8 @@ void upd7810_device::GTI_EOM_xx()
/* 64 ad: 0110 0100 1010 1101 xxxx xxxx */
void upd7810_device::GTI_TMM_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = TMM - imm - 1;
@@ -4319,7 +4319,7 @@ void upd7810_device::GTI_TMM_xx()
/* 64 b0: 0110 0100 1011 0000 xxxx xxxx */
void upd7810_device::SUINB_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM - imm;
@@ -4331,7 +4331,7 @@ void upd7810_device::SUINB_ANM_xx()
/* 64 b1: 0110 0100 1011 0001 xxxx xxxx */
void upd7810_device::SUINB_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH - imm;
@@ -4344,8 +4344,8 @@ void upd7810_device::SUINB_SMH_xx()
void upd7810_device::SUINB_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = eom - imm;
@@ -4358,7 +4358,7 @@ void upd7810_device::SUINB_EOM_xx()
/* 64 b5: 0110 0100 1011 0101 xxxx xxxx */
void upd7810_device::SUINB_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM - imm;
@@ -4370,7 +4370,7 @@ void upd7810_device::SUINB_TMM_xx()
/* 64 b8: 0110 0100 1011 1000 xxxx xxxx */
void upd7810_device::LTI_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM - imm;
@@ -4381,7 +4381,7 @@ void upd7810_device::LTI_ANM_xx()
/* 64 b9: 0110 0100 1011 1001 xxxx xxxx */
void upd7810_device::LTI_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH - imm;
@@ -4393,8 +4393,8 @@ void upd7810_device::LTI_SMH_xx()
void upd7810_device::LTI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = eom - imm;
@@ -4405,7 +4405,7 @@ void upd7810_device::LTI_EOM_xx()
/* 64 bd: 0110 0100 1011 1101 xxxx xxxx */
void upd7810_device::LTI_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM - imm;
@@ -4416,7 +4416,7 @@ void upd7810_device::LTI_TMM_xx()
/* 64 c0: 0110 0100 1100 0000 xxxx xxxx */
void upd7810_device::ADI_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM + imm;
@@ -4428,7 +4428,7 @@ void upd7810_device::ADI_ANM_xx()
/* 64 c1: 0110 0100 1100 0001 xxxx xxxx */
void upd7810_device::ADI_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH + imm;
@@ -4441,8 +4441,8 @@ void upd7810_device::ADI_SMH_xx()
void upd7810_device::ADI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = eom + imm;
@@ -4455,7 +4455,7 @@ void upd7810_device::ADI_EOM_xx()
/* 64 c5: 0110 0100 1100 0101 xxxx xxxx */
void upd7810_device::ADI_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM + imm;
@@ -4467,7 +4467,7 @@ void upd7810_device::ADI_TMM_xx()
/* 64 c8: 0110 0100 1100 1000 xxxx xxxx */
void upd7810_device::ONI_ANM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (ANM & imm)
@@ -4477,7 +4477,7 @@ void upd7810_device::ONI_ANM_xx()
/* 64 c9: 0110 0100 1100 1001 xxxx xxxx */
void upd7810_device::ONI_SMH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (SMH & imm)
@@ -4488,8 +4488,8 @@ void upd7810_device::ONI_SMH_xx()
void upd7810_device::ONI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t imm;
RDOPARG( imm );
if (eom & imm)
@@ -4499,7 +4499,7 @@ void upd7810_device::ONI_EOM_xx()
/* 64 cd: 0110 0100 1100 1101 xxxx xxxx */
void upd7810_device::ONI_TMM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (TMM & imm)
@@ -4509,7 +4509,7 @@ void upd7810_device::ONI_TMM_xx()
/* 64 d0: 0110 0100 1101 0000 xxxx xxxx */
void upd7810_device::ACI_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM + imm + (PSW & CY);
@@ -4521,7 +4521,7 @@ void upd7810_device::ACI_ANM_xx()
/* 64 d1: 0110 0100 1101 0001 xxxx xxxx */
void upd7810_device::ACI_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH + imm + (PSW & CY);
@@ -4534,8 +4534,8 @@ void upd7810_device::ACI_SMH_xx()
void upd7810_device::ACI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = eom + imm + (PSW & CY);
@@ -4548,7 +4548,7 @@ void upd7810_device::ACI_EOM_xx()
/* 64 d5: 0110 0100 1101 0101 xxxx xxxx */
void upd7810_device::ACI_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM + imm + (PSW & CY);
@@ -4560,7 +4560,7 @@ void upd7810_device::ACI_TMM_xx()
/* 64 d8: 0110 0100 1101 1000 xxxx xxxx */
void upd7810_device::OFFI_ANM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (ANM & imm))
@@ -4570,7 +4570,7 @@ void upd7810_device::OFFI_ANM_xx()
/* 64 d9: 0110 0100 1101 1001 xxxx xxxx */
void upd7810_device::OFFI_SMH_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (SMH & imm))
@@ -4581,8 +4581,8 @@ void upd7810_device::OFFI_SMH_xx()
void upd7810_device::OFFI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (eom & imm))
@@ -4592,7 +4592,7 @@ void upd7810_device::OFFI_EOM_xx()
/* 64 dd: 0110 0100 1101 1101 xxxx xxxx */
void upd7810_device::OFFI_TMM_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (TMM & imm))
@@ -4602,7 +4602,7 @@ void upd7810_device::OFFI_TMM_xx()
/* 64 e0: 0110 0100 1110 0000 xxxx xxxx */
void upd7810_device::SUI_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM - imm;
@@ -4613,7 +4613,7 @@ void upd7810_device::SUI_ANM_xx()
/* 64 e1: 0110 0100 1110 0001 xxxx xxxx */
void upd7810_device::SUI_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH - imm;
@@ -4625,8 +4625,8 @@ void upd7810_device::SUI_SMH_xx()
void upd7810_device::SUI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = eom - imm;
@@ -4638,7 +4638,7 @@ void upd7810_device::SUI_EOM_xx()
/* 64 e5: 0110 0100 1110 0101 xxxx xxxx */
void upd7810_device::SUI_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM - imm;
@@ -4649,7 +4649,7 @@ void upd7810_device::SUI_TMM_xx()
/* 64 e8: 0110 0100 1110 1000 xxxx xxxx */
void upd7810_device::NEI_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM - imm;
@@ -4660,7 +4660,7 @@ void upd7810_device::NEI_ANM_xx()
/* 64 e9: 0110 0100 1110 1001 xxxx xxxx */
void upd7810_device::NEI_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH - imm;
@@ -4672,8 +4672,8 @@ void upd7810_device::NEI_SMH_xx()
void upd7810_device::NEI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = eom - imm;
@@ -4684,7 +4684,7 @@ void upd7810_device::NEI_EOM_xx()
/* 64 ed: 0110 0100 1110 1101 xxxx xxxx */
void upd7810_device::NEI_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM - imm;
@@ -4695,7 +4695,7 @@ void upd7810_device::NEI_TMM_xx()
/* 64 f0: 0110 0100 1111 0000 xxxx xxxx */
void upd7810_device::SBI_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM - imm - (PSW & CY);
@@ -4706,7 +4706,7 @@ void upd7810_device::SBI_ANM_xx()
/* 64 f1: 0110 0100 1111 0001 xxxx xxxx */
void upd7810_device::SBI_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH - imm - (PSW & CY);
@@ -4718,8 +4718,8 @@ void upd7810_device::SBI_SMH_xx()
void upd7810_device::SBI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = eom - imm - (PSW & CY);
@@ -4731,7 +4731,7 @@ void upd7810_device::SBI_EOM_xx()
/* 64 f5: 0110 0100 1111 0101 xxxx xxxx */
void upd7810_device::SBI_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM - imm - (PSW & CY);
@@ -4742,7 +4742,7 @@ void upd7810_device::SBI_TMM_xx()
/* 64 f8: 0110 0100 1111 1000 xxxx xxxx */
void upd7810_device::EQI_ANM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = ANM - imm;
@@ -4753,7 +4753,7 @@ void upd7810_device::EQI_ANM_xx()
/* 64 f9: 0110 0100 1111 1001 xxxx xxxx */
void upd7810_device::EQI_SMH_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = SMH - imm;
@@ -4765,8 +4765,8 @@ void upd7810_device::EQI_SMH_xx()
void upd7810_device::EQI_EOM_xx()
{
/* only bits #1 and #5 can be read */
- UINT8 eom = EOM & 0x22;
- UINT8 tmp, imm;
+ uint8_t eom = EOM & 0x22;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = eom - imm;
@@ -4777,7 +4777,7 @@ void upd7810_device::EQI_EOM_xx()
/* 64 fd: 0110 0100 1111 1101 xxxx xxxx */
void upd7810_device::EQI_TMM_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = TMM - imm;
@@ -4885,7 +4885,7 @@ void upd7810_device::LHLD_w()
/* 70 41: 0111 0000 0100 0001 */
void upd7810_device::EADD_EA_A()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA + A;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
@@ -4894,7 +4894,7 @@ void upd7810_device::EADD_EA_A()
/* 70 42: 0111 0000 0100 0010 */
void upd7810_device::EADD_EA_B()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA + B;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
@@ -4903,7 +4903,7 @@ void upd7810_device::EADD_EA_B()
/* 70 43: 0111 0000 0100 0011 */
void upd7810_device::EADD_EA_C()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA + C;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
@@ -4912,7 +4912,7 @@ void upd7810_device::EADD_EA_C()
/* 70 61: 0111 0000 0110 0001 */
void upd7810_device::ESUB_EA_A()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - A;
ZHC_SUB( tmp, EA, 0 );
EA = tmp;
@@ -4921,7 +4921,7 @@ void upd7810_device::ESUB_EA_A()
/* 70 62: 0111 0000 0110 0010 */
void upd7810_device::ESUB_EA_B()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - B;
ZHC_SUB( tmp, EA, 0 );
EA = tmp;
@@ -4930,7 +4930,7 @@ void upd7810_device::ESUB_EA_B()
/* 70 63: 0111 0000 0110 0011 */
void upd7810_device::ESUB_EA_C()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - C;
ZHC_SUB( tmp, EA, 0 );
EA = tmp;
@@ -5274,7 +5274,7 @@ void upd7810_device::ORAX_Hm()
/* 70 a1: 0111 0000 1010 0001 */
void upd7810_device::ADDNCX_B()
{
- UINT8 tmp = A + RM( BC );
+ uint8_t tmp = A + RM( BC );
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -5283,7 +5283,7 @@ void upd7810_device::ADDNCX_B()
/* 70 a2: 0111 0000 1010 0010 */
void upd7810_device::ADDNCX_D()
{
- UINT8 tmp = A + RM( DE );
+ uint8_t tmp = A + RM( DE );
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -5292,7 +5292,7 @@ void upd7810_device::ADDNCX_D()
/* 70 a3: 0111 0000 1010 0011 */
void upd7810_device::ADDNCX_H()
{
- UINT8 tmp = A + RM( HL );
+ uint8_t tmp = A + RM( HL );
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -5301,7 +5301,7 @@ void upd7810_device::ADDNCX_H()
/* 70 a4: 0111 0000 1010 0100 */
void upd7810_device::ADDNCX_Dp()
{
- UINT8 tmp = A + RM( DE );
+ uint8_t tmp = A + RM( DE );
DE++;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5311,7 +5311,7 @@ void upd7810_device::ADDNCX_Dp()
/* 70 a5: 0111 0000 1010 0101 */
void upd7810_device::ADDNCX_Hp()
{
- UINT8 tmp = A + RM( HL );
+ uint8_t tmp = A + RM( HL );
HL++;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5321,7 +5321,7 @@ void upd7810_device::ADDNCX_Hp()
/* 70 a6: 0111 0000 1010 0110 */
void upd7810_device::ADDNCX_Dm()
{
- UINT8 tmp = A + RM( DE );
+ uint8_t tmp = A + RM( DE );
DE--;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5331,7 +5331,7 @@ void upd7810_device::ADDNCX_Dm()
/* 70 a7: 0111 0000 1010 0111 */
void upd7810_device::ADDNCX_Hm()
{
- UINT8 tmp = A + RM( HL );
+ uint8_t tmp = A + RM( HL );
HL--;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5341,7 +5341,7 @@ void upd7810_device::ADDNCX_Hm()
/* 70 a9: 0111 0000 1010 1001 */
void upd7810_device::GTAX_B()
{
- UINT16 tmp = A - RM( BC ) - 1;
+ uint16_t tmp = A - RM( BC ) - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -5349,7 +5349,7 @@ void upd7810_device::GTAX_B()
/* 70 aa: 0111 0000 1010 1010 */
void upd7810_device::GTAX_D()
{
- UINT16 tmp = A - RM( DE ) - 1;
+ uint16_t tmp = A - RM( DE ) - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -5357,7 +5357,7 @@ void upd7810_device::GTAX_D()
/* 70 ab: 0111 0000 1010 1011 */
void upd7810_device::GTAX_H()
{
- UINT16 tmp = A - RM( HL ) - 1;
+ uint16_t tmp = A - RM( HL ) - 1;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
}
@@ -5365,7 +5365,7 @@ void upd7810_device::GTAX_H()
/* 70 ac: 0111 0000 1010 1100 */
void upd7810_device::GTAX_Dp()
{
- UINT16 tmp = A - RM( DE ) - 1;
+ uint16_t tmp = A - RM( DE ) - 1;
DE++;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
@@ -5374,7 +5374,7 @@ void upd7810_device::GTAX_Dp()
/* 70 ad: 0111 0000 1010 1101 */
void upd7810_device::GTAX_Hp()
{
- UINT16 tmp = A - RM( HL ) - 1;
+ uint16_t tmp = A - RM( HL ) - 1;
HL++;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
@@ -5383,7 +5383,7 @@ void upd7810_device::GTAX_Hp()
/* 70 ae: 0111 0000 1010 1110 */
void upd7810_device::GTAX_Dm()
{
- UINT16 tmp = A - RM( DE ) - 1;
+ uint16_t tmp = A - RM( DE ) - 1;
DE--;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
@@ -5392,7 +5392,7 @@ void upd7810_device::GTAX_Dm()
/* 70 af: 0111 0000 1010 1111 */
void upd7810_device::GTAX_Hm()
{
- UINT16 tmp = A - RM( HL ) - 1;
+ uint16_t tmp = A - RM( HL ) - 1;
HL--;
ZHC_SUB( tmp, A, 0 );
SKIP_NC;
@@ -5401,7 +5401,7 @@ void upd7810_device::GTAX_Hm()
/* 70 b1: 0111 0000 1011 0001 */
void upd7810_device::SUBNBX_B()
{
- UINT8 tmp = A - RM( BC );
+ uint8_t tmp = A - RM( BC );
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -5410,7 +5410,7 @@ void upd7810_device::SUBNBX_B()
/* 70 b2: 0111 0000 1011 0010 */
void upd7810_device::SUBNBX_D()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -5419,7 +5419,7 @@ void upd7810_device::SUBNBX_D()
/* 70 b3: 0111 0000 1011 0011 */
void upd7810_device::SUBNBX_H()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_NC;
@@ -5428,7 +5428,7 @@ void upd7810_device::SUBNBX_H()
/* 70 b4: 0111 0000 1011 0100 */
void upd7810_device::SUBNBX_Dp()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
DE++;
ZHC_SUB( tmp, A, 0 );
A = tmp;
@@ -5438,7 +5438,7 @@ void upd7810_device::SUBNBX_Dp()
/* 70 b5: 0111 0000 1011 0101 */
void upd7810_device::SUBNBX_Hp()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
HL++;
ZHC_SUB( tmp, A, 0 );
A = tmp;
@@ -5448,7 +5448,7 @@ void upd7810_device::SUBNBX_Hp()
/* 70 b6: 0111 0000 1011 0110 */
void upd7810_device::SUBNBX_Dm()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
DE--;
ZHC_SUB( tmp, A, 0 );
A = tmp;
@@ -5458,7 +5458,7 @@ void upd7810_device::SUBNBX_Dm()
/* 70 b7: 0111 0000 1011 0111 */
void upd7810_device::SUBNBX_Hm()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
HL--;
ZHC_SUB( tmp, A, 0 );
A = tmp;
@@ -5468,7 +5468,7 @@ void upd7810_device::SUBNBX_Hm()
/* 70 b9: 0111 0000 1011 1001 */
void upd7810_device::LTAX_B()
{
- UINT8 tmp = A - RM( BC );
+ uint8_t tmp = A - RM( BC );
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -5476,7 +5476,7 @@ void upd7810_device::LTAX_B()
/* 70 ba: 0111 0000 1011 1010 */
void upd7810_device::LTAX_D()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -5484,7 +5484,7 @@ void upd7810_device::LTAX_D()
/* 70 bb: 0111 0000 1011 1011 */
void upd7810_device::LTAX_H()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
}
@@ -5492,7 +5492,7 @@ void upd7810_device::LTAX_H()
/* 70 bc: 0111 0000 1011 1100 */
void upd7810_device::LTAX_Dp()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
DE++;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
@@ -5501,7 +5501,7 @@ void upd7810_device::LTAX_Dp()
/* 70 bd: 0111 0000 1011 1101 */
void upd7810_device::LTAX_Hp()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
HL++;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
@@ -5510,7 +5510,7 @@ void upd7810_device::LTAX_Hp()
/* 70 be: 0111 0000 1011 1110 */
void upd7810_device::LTAX_Dm()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
DE--;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
@@ -5519,7 +5519,7 @@ void upd7810_device::LTAX_Dm()
/* 70 bf: 0111 0000 1011 1111 */
void upd7810_device::LTAX_Hm()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
HL--;
ZHC_SUB( tmp, A, 0 );
SKIP_CY;
@@ -5528,7 +5528,7 @@ void upd7810_device::LTAX_Hm()
/* 70 c1: 0111 0000 1100 0001 */
void upd7810_device::ADDX_B()
{
- UINT8 tmp = A + RM( BC );
+ uint8_t tmp = A + RM( BC );
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -5536,7 +5536,7 @@ void upd7810_device::ADDX_B()
/* 70 c2: 0111 0000 1100 0010 */
void upd7810_device::ADDX_D()
{
- UINT8 tmp = A + RM( DE );
+ uint8_t tmp = A + RM( DE );
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -5544,7 +5544,7 @@ void upd7810_device::ADDX_D()
/* 70 c3: 0111 0000 1100 0011 */
void upd7810_device::ADDX_H()
{
- UINT8 tmp = A + RM( HL );
+ uint8_t tmp = A + RM( HL );
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -5552,7 +5552,7 @@ void upd7810_device::ADDX_H()
/* 70 c4: 0111 0000 1100 0100 */
void upd7810_device::ADDX_Dp()
{
- UINT8 tmp = A + RM( DE );
+ uint8_t tmp = A + RM( DE );
DE++;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5561,7 +5561,7 @@ void upd7810_device::ADDX_Dp()
/* 70 c5: 0111 0000 1100 0101 */
void upd7810_device::ADDX_Hp()
{
- UINT8 tmp = A + RM( HL );
+ uint8_t tmp = A + RM( HL );
HL++;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5570,7 +5570,7 @@ void upd7810_device::ADDX_Hp()
/* 70 c6: 0111 0000 1100 0110 */
void upd7810_device::ADDX_Dm()
{
- UINT8 tmp = A + RM( DE );
+ uint8_t tmp = A + RM( DE );
DE--;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5579,7 +5579,7 @@ void upd7810_device::ADDX_Dm()
/* 70 c7: 0111 0000 1100 0111 */
void upd7810_device::ADDX_Hm()
{
- UINT8 tmp = A + RM( HL );
+ uint8_t tmp = A + RM( HL );
HL--;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5655,7 +5655,7 @@ void upd7810_device::ONAX_Hm()
/* 70 d1: 0111 0000 1101 0001 */
void upd7810_device::ADCX_B()
{
- UINT8 tmp = A + RM( BC ) + (PSW & CY);
+ uint8_t tmp = A + RM( BC ) + (PSW & CY);
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -5663,7 +5663,7 @@ void upd7810_device::ADCX_B()
/* 70 d2: 0111 0000 1101 0010 */
void upd7810_device::ADCX_D()
{
- UINT8 tmp = A + RM( DE ) + (PSW & CY);
+ uint8_t tmp = A + RM( DE ) + (PSW & CY);
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -5671,7 +5671,7 @@ void upd7810_device::ADCX_D()
/* 70 d3: 0111 0000 1101 0011 */
void upd7810_device::ADCX_H()
{
- UINT8 tmp = A + RM( HL ) + (PSW & CY);
+ uint8_t tmp = A + RM( HL ) + (PSW & CY);
ZHC_ADD( tmp, A, 0 );
A = tmp;
}
@@ -5679,7 +5679,7 @@ void upd7810_device::ADCX_H()
/* 70 d4: 0111 0000 1101 0100 */
void upd7810_device::ADCX_Dp()
{
- UINT8 tmp = A + RM( DE ) + (PSW & CY);
+ uint8_t tmp = A + RM( DE ) + (PSW & CY);
DE++;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5688,7 +5688,7 @@ void upd7810_device::ADCX_Dp()
/* 70 d5: 0111 0000 1101 0101 */
void upd7810_device::ADCX_Hp()
{
- UINT8 tmp = A + RM( HL ) + (PSW & CY);
+ uint8_t tmp = A + RM( HL ) + (PSW & CY);
HL++;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5697,7 +5697,7 @@ void upd7810_device::ADCX_Hp()
/* 70 d6: 0111 0000 1101 0110 */
void upd7810_device::ADCX_Dm()
{
- UINT8 tmp = A + RM( DE ) + (PSW & CY);
+ uint8_t tmp = A + RM( DE ) + (PSW & CY);
DE--;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5706,7 +5706,7 @@ void upd7810_device::ADCX_Dm()
/* 70 d7: 0111 0000 1101 0111 */
void upd7810_device::ADCX_Hm()
{
- UINT8 tmp = A + RM( HL ) + (PSW & CY);
+ uint8_t tmp = A + RM( HL ) + (PSW & CY);
HL--;
ZHC_ADD( tmp, A, 0 );
A = tmp;
@@ -5782,7 +5782,7 @@ void upd7810_device::OFFAX_Hm()
/* 70 e1: 0111 0000 1110 0001 */
void upd7810_device::SUBX_B()
{
- UINT8 tmp = A - RM( BC );
+ uint8_t tmp = A - RM( BC );
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -5790,7 +5790,7 @@ void upd7810_device::SUBX_B()
/* 70 e2: 0111 0000 1110 0010 */
void upd7810_device::SUBX_D()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -5798,7 +5798,7 @@ void upd7810_device::SUBX_D()
/* 70 e3: 0111 0000 1110 0011 */
void upd7810_device::SUBX_H()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
ZHC_SUB( tmp, A, 0 );
A = tmp;
}
@@ -5806,7 +5806,7 @@ void upd7810_device::SUBX_H()
/* 70 e4: 0111 0000 1110 0100 */
void upd7810_device::SUBX_Dp()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
ZHC_SUB( tmp, A, 0 );
A = tmp;
DE++;
@@ -5815,7 +5815,7 @@ void upd7810_device::SUBX_Dp()
/* 70 e5: 0111 0000 1110 0101 */
void upd7810_device::SUBX_Hp()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
ZHC_SUB( tmp, A, 0 );
A = tmp;
HL++;
@@ -5824,7 +5824,7 @@ void upd7810_device::SUBX_Hp()
/* 70 e6: 0111 0000 1110 0110 */
void upd7810_device::SUBX_Dm()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
ZHC_SUB( tmp, A, 0 );
A = tmp;
DE--;
@@ -5833,7 +5833,7 @@ void upd7810_device::SUBX_Dm()
/* 70 e7: 0111 0000 1110 0111 */
void upd7810_device::SUBX_Hm()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
ZHC_SUB( tmp, A, 0 );
A = tmp;
HL--;
@@ -5842,7 +5842,7 @@ void upd7810_device::SUBX_Hm()
/* 70 e9: 0111 0000 1110 1001 */
void upd7810_device::NEAX_B()
{
- UINT8 tmp = A - RM( BC );
+ uint8_t tmp = A - RM( BC );
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -5850,7 +5850,7 @@ void upd7810_device::NEAX_B()
/* 70 ea: 0111 0000 1110 1010 */
void upd7810_device::NEAX_D()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -5858,7 +5858,7 @@ void upd7810_device::NEAX_D()
/* 70 eb: 0111 0000 1110 1011 */
void upd7810_device::NEAX_H()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
}
@@ -5866,7 +5866,7 @@ void upd7810_device::NEAX_H()
/* 70 ec: 0111 0000 1110 1100 */
void upd7810_device::NEAX_Dp()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
DE++;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
@@ -5875,7 +5875,7 @@ void upd7810_device::NEAX_Dp()
/* 70 ed: 0111 0000 1110 1101 */
void upd7810_device::NEAX_Hp()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
HL++;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
@@ -5884,7 +5884,7 @@ void upd7810_device::NEAX_Hp()
/* 70 ee: 0111 0000 1110 1110 */
void upd7810_device::NEAX_Dm()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
DE--;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
@@ -5893,7 +5893,7 @@ void upd7810_device::NEAX_Dm()
/* 70 ef: 0111 0000 1110 1111 */
void upd7810_device::NEAX_Hm()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
HL--;
ZHC_SUB( tmp, A, 0 );
SKIP_NZ;
@@ -5902,7 +5902,7 @@ void upd7810_device::NEAX_Hm()
/* 70 f1: 0111 0000 1111 0001 */
void upd7810_device::SBBX_B()
{
- UINT8 tmp = A - RM( BC ) - (PSW & CY);
+ uint8_t tmp = A - RM( BC ) - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -5910,7 +5910,7 @@ void upd7810_device::SBBX_B()
/* 70 f2: 0111 0000 1111 0010 */
void upd7810_device::SBBX_D()
{
- UINT8 tmp = A - RM( DE ) - (PSW & CY);
+ uint8_t tmp = A - RM( DE ) - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -5918,7 +5918,7 @@ void upd7810_device::SBBX_D()
/* 70 f3: 0111 0000 1111 0011 */
void upd7810_device::SBBX_H()
{
- UINT8 tmp = A - RM( HL ) - (PSW & CY);
+ uint8_t tmp = A - RM( HL ) - (PSW & CY);
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
}
@@ -5926,7 +5926,7 @@ void upd7810_device::SBBX_H()
/* 70 f4: 0111 0000 1111 0100 */
void upd7810_device::SBBX_Dp()
{
- UINT8 tmp = A - RM( DE ) - (PSW & CY);
+ uint8_t tmp = A - RM( DE ) - (PSW & CY);
DE++;
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
@@ -5935,7 +5935,7 @@ void upd7810_device::SBBX_Dp()
/* 70 f5: 0111 0000 1111 0101 */
void upd7810_device::SBBX_Hp()
{
- UINT8 tmp = A - RM( HL ) - (PSW & CY);
+ uint8_t tmp = A - RM( HL ) - (PSW & CY);
HL++;
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
@@ -5944,7 +5944,7 @@ void upd7810_device::SBBX_Hp()
/* 70 f6: 0111 0000 1111 0110 */
void upd7810_device::SBBX_Dm()
{
- UINT8 tmp = A - RM( DE ) - (PSW & CY);
+ uint8_t tmp = A - RM( DE ) - (PSW & CY);
DE--;
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
@@ -5953,7 +5953,7 @@ void upd7810_device::SBBX_Dm()
/* 70 f7: 0111 0000 1111 0111 */
void upd7810_device::SBBX_Hm()
{
- UINT8 tmp = A - RM( HL ) - (PSW & CY);
+ uint8_t tmp = A - RM( HL ) - (PSW & CY);
HL--;
ZHC_SUB( tmp, A, (PSW & CY) );
A = tmp;
@@ -5962,7 +5962,7 @@ void upd7810_device::SBBX_Hm()
/* 70 f9: 0111 0000 1111 1001 */
void upd7810_device::EQAX_B()
{
- UINT8 tmp = A - RM( BC );
+ uint8_t tmp = A - RM( BC );
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -5970,7 +5970,7 @@ void upd7810_device::EQAX_B()
/* 70 fa: 0111 0000 1111 1010 */
void upd7810_device::EQAX_D()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -5978,7 +5978,7 @@ void upd7810_device::EQAX_D()
/* 70 fb: 0111 0000 1111 1011 */
void upd7810_device::EQAX_H()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
}
@@ -5986,7 +5986,7 @@ void upd7810_device::EQAX_H()
/* 70 fc: 0111 0000 1111 1100 */
void upd7810_device::EQAX_Dp()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
DE++;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
@@ -5995,7 +5995,7 @@ void upd7810_device::EQAX_Dp()
/* 70 fd: 0111 0000 1111 1101 */
void upd7810_device::EQAX_Hp()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
HL++;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
@@ -6004,7 +6004,7 @@ void upd7810_device::EQAX_Hp()
/* 70 fe: 0111 0000 1111 1110 */
void upd7810_device::EQAX_Dm()
{
- UINT8 tmp = A - RM( DE );
+ uint8_t tmp = A - RM( DE );
DE--;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
@@ -6013,7 +6013,7 @@ void upd7810_device::EQAX_Dm()
/* 70 ff: 0111 0000 1111 1111 */
void upd7810_device::EQAX_Hm()
{
- UINT8 tmp = A - RM( HL );
+ uint8_t tmp = A - RM( HL );
HL--;
ZHC_SUB( tmp, A, 0 );
SKIP_Z;
@@ -6023,7 +6023,7 @@ void upd7810_device::EQAX_Hm()
/* 74 08: 0111 0100 0000 1000 xxxx xxxx */
void upd7810_device::ANI_V_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
V &= imm;
SET_Z(V);
@@ -6032,7 +6032,7 @@ void upd7810_device::ANI_V_xx()
/* 74 09: 0111 0100 0000 1001 xxxx xxxx */
void upd7810_device::ANI_A_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
A &= imm;
SET_Z(A);
@@ -6041,7 +6041,7 @@ void upd7810_device::ANI_A_xx()
/* 74 0a: 0111 0100 0000 1010 xxxx xxxx */
void upd7810_device::ANI_B_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
B &= imm;
SET_Z(B);
@@ -6050,7 +6050,7 @@ void upd7810_device::ANI_B_xx()
/* 74 0b: 0111 0100 0000 1011 xxxx xxxx */
void upd7810_device::ANI_C_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
C &= imm;
SET_Z(C);
@@ -6059,7 +6059,7 @@ void upd7810_device::ANI_C_xx()
/* 74 0c: 0111 0100 0000 1100 xxxx xxxx */
void upd7810_device::ANI_D_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
D &= imm;
SET_Z(D);
@@ -6068,7 +6068,7 @@ void upd7810_device::ANI_D_xx()
/* 74 0d: 0111 0100 0000 1101 xxxx xxxx */
void upd7810_device::ANI_E_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
E &= imm;
SET_Z(E);
@@ -6077,7 +6077,7 @@ void upd7810_device::ANI_E_xx()
/* 74 0e: 0111 0100 0000 1110 xxxx xxxx */
void upd7810_device::ANI_H_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
H &= imm;
SET_Z(H);
@@ -6086,7 +6086,7 @@ void upd7810_device::ANI_H_xx()
/* 74 0f: 0111 0100 0000 1111 xxxx xxxx */
void upd7810_device::ANI_L_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
L &= imm;
SET_Z(L);
@@ -6095,7 +6095,7 @@ void upd7810_device::ANI_L_xx()
/* 74 10: 0111 0100 0001 0000 xxxx xxxx */
void upd7810_device::XRI_V_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
V ^= imm;
SET_Z(V);
@@ -6104,7 +6104,7 @@ void upd7810_device::XRI_V_xx()
/* 74 11: 0111 0100 0001 0001 xxxx xxxx */
void upd7810_device::XRI_A_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
A ^= imm;
SET_Z(A);
@@ -6113,7 +6113,7 @@ void upd7810_device::XRI_A_xx()
/* 74 12: 0111 0100 0001 0010 xxxx xxxx */
void upd7810_device::XRI_B_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
B ^= imm;
SET_Z(B);
@@ -6122,7 +6122,7 @@ void upd7810_device::XRI_B_xx()
/* 74 13: 0111 0100 0001 0011 xxxx xxxx */
void upd7810_device::XRI_C_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
C ^= imm;
SET_Z(C);
@@ -6131,7 +6131,7 @@ void upd7810_device::XRI_C_xx()
/* 74 14: 0111 0100 0001 0100 xxxx xxxx */
void upd7810_device::XRI_D_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
D ^= imm;
SET_Z(D);
@@ -6140,7 +6140,7 @@ void upd7810_device::XRI_D_xx()
/* 74 15: 0111 0100 0001 0101 xxxx xxxx */
void upd7810_device::XRI_E_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
E ^= imm;
SET_Z(E);
@@ -6149,7 +6149,7 @@ void upd7810_device::XRI_E_xx()
/* 74 16: 0111 0100 0001 0110 xxxx xxxx */
void upd7810_device::XRI_H_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
H ^= imm;
SET_Z(H);
@@ -6158,7 +6158,7 @@ void upd7810_device::XRI_H_xx()
/* 74 17: 0111 0100 0001 0111 xxxx xxxx */
void upd7810_device::XRI_L_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
L ^= imm;
SET_Z(L);
@@ -6167,7 +6167,7 @@ void upd7810_device::XRI_L_xx()
/* 74 18: 0111 0100 0001 1000 xxxx xxxx */
void upd7810_device::ORI_V_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
V |= imm;
SET_Z(V);
@@ -6176,7 +6176,7 @@ void upd7810_device::ORI_V_xx()
/* 74 19: 0111 0100 0001 1001 xxxx xxxx */
void upd7810_device::ORI_A_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
A |= imm;
SET_Z(A);
@@ -6185,7 +6185,7 @@ void upd7810_device::ORI_A_xx()
/* 74 1a: 0111 0100 0001 1010 xxxx xxxx */
void upd7810_device::ORI_B_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
B |= imm;
SET_Z(B);
@@ -6194,7 +6194,7 @@ void upd7810_device::ORI_B_xx()
/* 74 1b: 0111 0100 0001 1011 xxxx xxxx */
void upd7810_device::ORI_C_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
C |= imm;
SET_Z(C);
@@ -6203,7 +6203,7 @@ void upd7810_device::ORI_C_xx()
/* 74 1c: 0111 0100 0001 1100 xxxx xxxx */
void upd7810_device::ORI_D_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
D |= imm;
SET_Z(D);
@@ -6212,7 +6212,7 @@ void upd7810_device::ORI_D_xx()
/* 74 1d: 0111 0100 0001 1101 xxxx xxxx */
void upd7810_device::ORI_E_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
E |= imm;
SET_Z(E);
@@ -6221,7 +6221,7 @@ void upd7810_device::ORI_E_xx()
/* 74 1e: 0111 0100 0001 1110 xxxx xxxx */
void upd7810_device::ORI_H_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
H |= imm;
SET_Z(H);
@@ -6230,7 +6230,7 @@ void upd7810_device::ORI_H_xx()
/* 74 1f: 0111 0100 0001 1111 xxxx xxxx */
void upd7810_device::ORI_L_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
L |= imm;
SET_Z(L);
@@ -6239,7 +6239,7 @@ void upd7810_device::ORI_L_xx()
/* 74 20: 0111 0100 0010 0000 xxxx xxxx */
void upd7810_device::ADINC_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V + imm;
@@ -6252,7 +6252,7 @@ void upd7810_device::ADINC_V_xx()
/* 74 21: 0111 0100 0010 0001 xxxx xxxx */
void upd7810_device::ADINC_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A + imm;
@@ -6265,7 +6265,7 @@ void upd7810_device::ADINC_A_xx()
/* 74 22: 0111 0100 0010 0010 xxxx xxxx */
void upd7810_device::ADINC_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B + imm;
@@ -6278,7 +6278,7 @@ void upd7810_device::ADINC_B_xx()
/* 74 23: 0111 0100 0010 0011 xxxx xxxx */
void upd7810_device::ADINC_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C + imm;
@@ -6291,7 +6291,7 @@ void upd7810_device::ADINC_C_xx()
/* 74 24: 0111 0100 0010 0100 xxxx xxxx */
void upd7810_device::ADINC_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D + imm;
@@ -6304,7 +6304,7 @@ void upd7810_device::ADINC_D_xx()
/* 74 25: 0111 0100 0010 0101 xxxx xxxx */
void upd7810_device::ADINC_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E + imm;
@@ -6317,7 +6317,7 @@ void upd7810_device::ADINC_E_xx()
/* 74 26: 0111 0100 0010 0110 xxxx xxxx */
void upd7810_device::ADINC_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H + imm;
@@ -6330,7 +6330,7 @@ void upd7810_device::ADINC_H_xx()
/* 74 27: 0111 0100 0010 0111 xxxx xxxx */
void upd7810_device::ADINC_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L + imm;
@@ -6343,8 +6343,8 @@ void upd7810_device::ADINC_L_xx()
/* 74 28: 0111 0100 0010 1000 xxxx xxxx */
void upd7810_device::GTI_V_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = V - imm - 1;
@@ -6356,8 +6356,8 @@ void upd7810_device::GTI_V_xx()
/* 74 29: 0111 0100 0010 1001 xxxx xxxx */
void upd7810_device::GTI_A_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = A - imm - 1;
@@ -6369,8 +6369,8 @@ void upd7810_device::GTI_A_xx()
/* 74 2a: 0111 0100 0010 1010 xxxx xxxx */
void upd7810_device::GTI_B_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = B - imm - 1;
@@ -6382,8 +6382,8 @@ void upd7810_device::GTI_B_xx()
/* 74 2b: 0111 0100 0010 1011 xxxx xxxx */
void upd7810_device::GTI_C_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = C - imm - 1;
@@ -6395,8 +6395,8 @@ void upd7810_device::GTI_C_xx()
/* 74 2c: 0111 0100 0010 1100 xxxx xxxx */
void upd7810_device::GTI_D_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = D - imm - 1;
@@ -6408,8 +6408,8 @@ void upd7810_device::GTI_D_xx()
/* 74 2d: 0111 0100 0010 1101 xxxx xxxx */
void upd7810_device::GTI_E_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = E - imm - 1;
@@ -6421,8 +6421,8 @@ void upd7810_device::GTI_E_xx()
/* 74 2e: 0111 0100 0010 1110 xxxx xxxx */
void upd7810_device::GTI_H_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = H - imm - 1;
@@ -6434,8 +6434,8 @@ void upd7810_device::GTI_H_xx()
/* 74 2f: 0111 0100 0010 1111 xxxx xxxx */
void upd7810_device::GTI_L_xx()
{
- UINT8 imm;
- UINT16 tmp;
+ uint8_t imm;
+ uint16_t tmp;
RDOPARG( imm );
tmp = L - imm - 1;
@@ -6447,7 +6447,7 @@ void upd7810_device::GTI_L_xx()
/* 74 30: 0111 0100 0011 0000 xxxx xxxx */
void upd7810_device::SUINB_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V - imm;
@@ -6459,7 +6459,7 @@ void upd7810_device::SUINB_V_xx()
/* 74 31: 0111 0100 0011 0001 xxxx xxxx */
void upd7810_device::SUINB_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A - imm;
@@ -6471,7 +6471,7 @@ void upd7810_device::SUINB_A_xx()
/* 74 32: 0111 0100 0011 0010 xxxx xxxx */
void upd7810_device::SUINB_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B - imm;
@@ -6483,7 +6483,7 @@ void upd7810_device::SUINB_B_xx()
/* 74 33: 0111 0100 0011 0011 xxxx xxxx */
void upd7810_device::SUINB_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C - imm;
@@ -6495,7 +6495,7 @@ void upd7810_device::SUINB_C_xx()
/* 74 34: 0111 0100 0011 0100 xxxx xxxx */
void upd7810_device::SUINB_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D - imm;
@@ -6507,7 +6507,7 @@ void upd7810_device::SUINB_D_xx()
/* 74 35: 0111 0100 0011 0101 xxxx xxxx */
void upd7810_device::SUINB_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E - imm;
@@ -6519,7 +6519,7 @@ void upd7810_device::SUINB_E_xx()
/* 74 36: 0111 0100 0011 0110 xxxx xxxx */
void upd7810_device::SUINB_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H - imm;
@@ -6531,7 +6531,7 @@ void upd7810_device::SUINB_H_xx()
/* 74 37: 0111 0100 0011 0111 xxxx xxxx */
void upd7810_device::SUINB_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L - imm;
@@ -6543,7 +6543,7 @@ void upd7810_device::SUINB_L_xx()
/* 74 38: 0111 0100 0011 1000 xxxx xxxx */
void upd7810_device::LTI_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V - imm;
@@ -6554,7 +6554,7 @@ void upd7810_device::LTI_V_xx()
/* 74 39: 0111 0100 0011 1001 xxxx xxxx */
void upd7810_device::LTI_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A - imm;
@@ -6565,7 +6565,7 @@ void upd7810_device::LTI_A_xx()
/* 74 3a: 0111 0100 0011 1010 xxxx xxxx */
void upd7810_device::LTI_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B - imm;
@@ -6576,7 +6576,7 @@ void upd7810_device::LTI_B_xx()
/* 74 3b: 0111 0100 0011 1011 xxxx xxxx */
void upd7810_device::LTI_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C - imm;
@@ -6587,7 +6587,7 @@ void upd7810_device::LTI_C_xx()
/* 74 3c: 0111 0100 0011 1100 xxxx xxxx */
void upd7810_device::LTI_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D - imm;
@@ -6598,7 +6598,7 @@ void upd7810_device::LTI_D_xx()
/* 74 3d: 0111 0100 0011 1101 xxxx xxxx */
void upd7810_device::LTI_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E - imm;
@@ -6609,7 +6609,7 @@ void upd7810_device::LTI_E_xx()
/* 74 3e: 0111 0100 0011 1110 xxxx xxxx */
void upd7810_device::LTI_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H - imm;
@@ -6620,7 +6620,7 @@ void upd7810_device::LTI_H_xx()
/* 74 3f: 0111 0100 0011 1111 xxxx xxxx */
void upd7810_device::LTI_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L - imm;
@@ -6631,7 +6631,7 @@ void upd7810_device::LTI_L_xx()
/* 74 40: 0111 0100 0100 0000 xxxx xxxx */
void upd7810_device::ADI_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V + imm;
@@ -6643,7 +6643,7 @@ void upd7810_device::ADI_V_xx()
/* 74 41: 0111 0100 0100 0001 xxxx xxxx */
void upd7810_device::ADI_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A + imm;
@@ -6655,7 +6655,7 @@ void upd7810_device::ADI_A_xx()
/* 74 42: 0111 0100 0100 0010 xxxx xxxx */
void upd7810_device::ADI_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B + imm;
@@ -6667,7 +6667,7 @@ void upd7810_device::ADI_B_xx()
/* 74 43: 0111 0100 0100 0011 xxxx xxxx */
void upd7810_device::ADI_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C + imm;
@@ -6679,7 +6679,7 @@ void upd7810_device::ADI_C_xx()
/* 74 44: 0111 0100 0100 0100 xxxx xxxx */
void upd7810_device::ADI_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D + imm;
@@ -6691,7 +6691,7 @@ void upd7810_device::ADI_D_xx()
/* 74 45: 0111 0100 0100 0101 xxxx xxxx */
void upd7810_device::ADI_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E + imm;
@@ -6703,7 +6703,7 @@ void upd7810_device::ADI_E_xx()
/* 74 46: 0111 0100 0100 0110 xxxx xxxx */
void upd7810_device::ADI_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H + imm;
@@ -6715,7 +6715,7 @@ void upd7810_device::ADI_H_xx()
/* 74 47: 0111 0100 0100 0111 xxxx xxxx */
void upd7810_device::ADI_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L + imm;
@@ -6727,7 +6727,7 @@ void upd7810_device::ADI_L_xx()
/* 74 48: 0111 0100 0100 1000 xxxx xxxx */
void upd7810_device::ONI_V_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (V & imm)
@@ -6737,7 +6737,7 @@ void upd7810_device::ONI_V_xx()
/* 74 49: 0111 0100 0100 1001 xxxx xxxx */
void upd7810_device::ONI_A_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (A & imm)
@@ -6747,7 +6747,7 @@ void upd7810_device::ONI_A_xx()
/* 74 4a: 0111 0100 0100 1010 xxxx xxxx */
void upd7810_device::ONI_B_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (B & imm)
@@ -6757,7 +6757,7 @@ void upd7810_device::ONI_B_xx()
/* 74 4b: 0111 0100 0100 1011 xxxx xxxx */
void upd7810_device::ONI_C_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (C & imm)
@@ -6767,7 +6767,7 @@ void upd7810_device::ONI_C_xx()
/* 74 4c: 0111 0100 0100 1100 xxxx xxxx */
void upd7810_device::ONI_D_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (D & imm)
@@ -6777,7 +6777,7 @@ void upd7810_device::ONI_D_xx()
/* 74 4d: 0111 0100 0100 1101 xxxx xxxx */
void upd7810_device::ONI_E_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (E & imm)
@@ -6787,7 +6787,7 @@ void upd7810_device::ONI_E_xx()
/* 74 4e: 0111 0100 0100 1110 xxxx xxxx */
void upd7810_device::ONI_H_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (H & imm)
@@ -6797,7 +6797,7 @@ void upd7810_device::ONI_H_xx()
/* 74 4f: 0111 0100 0100 1111 xxxx xxxx */
void upd7810_device::ONI_L_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (L & imm)
@@ -6807,7 +6807,7 @@ void upd7810_device::ONI_L_xx()
/* 74 50: 0111 0100 0101 0000 xxxx xxxx */
void upd7810_device::ACI_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V + imm + (PSW & CY);
@@ -6818,7 +6818,7 @@ void upd7810_device::ACI_V_xx()
/* 74 51: 0111 0100 0101 0001 xxxx xxxx */
void upd7810_device::ACI_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A + imm + (PSW & CY);
@@ -6829,7 +6829,7 @@ void upd7810_device::ACI_A_xx()
/* 74 52: 0111 0100 0101 0010 xxxx xxxx */
void upd7810_device::ACI_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B + imm + (PSW & CY);
@@ -6840,7 +6840,7 @@ void upd7810_device::ACI_B_xx()
/* 74 53: 0111 0100 0101 0011 xxxx xxxx */
void upd7810_device::ACI_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C + imm + (PSW & CY);
@@ -6851,7 +6851,7 @@ void upd7810_device::ACI_C_xx()
/* 74 54: 0111 0100 0101 0100 xxxx xxxx */
void upd7810_device::ACI_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D + imm + (PSW & CY);
@@ -6862,7 +6862,7 @@ void upd7810_device::ACI_D_xx()
/* 74 55: 0111 0100 0101 0101 xxxx xxxx */
void upd7810_device::ACI_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E + imm + (PSW & CY);
@@ -6873,7 +6873,7 @@ void upd7810_device::ACI_E_xx()
/* 74 56: 0111 0100 0101 0110 xxxx xxxx */
void upd7810_device::ACI_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H + imm + (PSW & CY);
@@ -6884,7 +6884,7 @@ void upd7810_device::ACI_H_xx()
/* 74 57: 0111 0100 0101 0111 xxxx xxxx */
void upd7810_device::ACI_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L + imm + (PSW & CY);
@@ -6895,7 +6895,7 @@ void upd7810_device::ACI_L_xx()
/* 74 58: 0111 0100 0101 1000 xxxx xxxx */
void upd7810_device::OFFI_V_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (V & imm))
@@ -6905,7 +6905,7 @@ void upd7810_device::OFFI_V_xx()
/* 74 59: 0111 0100 0101 1001 xxxx xxxx */
void upd7810_device::OFFI_A_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (A & imm))
@@ -6915,7 +6915,7 @@ void upd7810_device::OFFI_A_xx()
/* 74 5a: 0111 0100 0101 1010 xxxx xxxx */
void upd7810_device::OFFI_B_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (B & imm))
@@ -6925,7 +6925,7 @@ void upd7810_device::OFFI_B_xx()
/* 74 5b: 0111 0100 0101 1011 xxxx xxxx */
void upd7810_device::OFFI_C_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (C & imm))
@@ -6935,7 +6935,7 @@ void upd7810_device::OFFI_C_xx()
/* 74 5c: 0111 0100 0101 1100 xxxx xxxx */
void upd7810_device::OFFI_D_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (D & imm))
@@ -6945,7 +6945,7 @@ void upd7810_device::OFFI_D_xx()
/* 74 5d: 0111 0100 0101 1101 xxxx xxxx */
void upd7810_device::OFFI_E_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (E & imm))
@@ -6955,7 +6955,7 @@ void upd7810_device::OFFI_E_xx()
/* 74 5e: 0111 0100 0101 1110 xxxx xxxx */
void upd7810_device::OFFI_H_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (H & imm))
@@ -6965,7 +6965,7 @@ void upd7810_device::OFFI_H_xx()
/* 74 5f: 0111 0100 0101 1111 xxxx xxxx */
void upd7810_device::OFFI_L_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
if (0 == (L & imm))
@@ -6975,7 +6975,7 @@ void upd7810_device::OFFI_L_xx()
/* 74 60: 0111 0100 0110 0000 xxxx xxxx */
void upd7810_device::SUI_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V - imm;
@@ -6986,7 +6986,7 @@ void upd7810_device::SUI_V_xx()
/* 74 61: 0111 0100 0110 0001 xxxx xxxx */
void upd7810_device::SUI_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A - imm;
@@ -6997,7 +6997,7 @@ void upd7810_device::SUI_A_xx()
/* 74 62: 0111 0100 0110 0010 xxxx xxxx */
void upd7810_device::SUI_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B - imm;
@@ -7008,7 +7008,7 @@ void upd7810_device::SUI_B_xx()
/* 74 63: 0111 0100 0110 0011 xxxx xxxx */
void upd7810_device::SUI_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C - imm;
@@ -7019,7 +7019,7 @@ void upd7810_device::SUI_C_xx()
/* 74 64: 0111 0100 0110 0100 xxxx xxxx */
void upd7810_device::SUI_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D - imm;
@@ -7030,7 +7030,7 @@ void upd7810_device::SUI_D_xx()
/* 74 65: 0111 0100 0110 0101 xxxx xxxx */
void upd7810_device::SUI_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E - imm;
@@ -7041,7 +7041,7 @@ void upd7810_device::SUI_E_xx()
/* 74 66: 0111 0100 0110 0110 xxxx xxxx */
void upd7810_device::SUI_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H - imm;
@@ -7052,7 +7052,7 @@ void upd7810_device::SUI_H_xx()
/* 74 67: 0111 0100 0110 0111 xxxx xxxx */
void upd7810_device::SUI_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L - imm;
@@ -7063,7 +7063,7 @@ void upd7810_device::SUI_L_xx()
/* 74 68: 0111 0100 0110 1000 xxxx xxxx */
void upd7810_device::NEI_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V - imm;
@@ -7074,7 +7074,7 @@ void upd7810_device::NEI_V_xx()
/* 74 69: 0111 0100 0110 1001 xxxx xxxx */
void upd7810_device::NEI_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A - imm;
@@ -7085,7 +7085,7 @@ void upd7810_device::NEI_A_xx()
/* 74 6a: 0111 0100 0110 1010 xxxx xxxx */
void upd7810_device::NEI_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B - imm;
@@ -7096,7 +7096,7 @@ void upd7810_device::NEI_B_xx()
/* 74 6b: 0111 0100 0110 1011 xxxx xxxx */
void upd7810_device::NEI_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C - imm;
@@ -7107,7 +7107,7 @@ void upd7810_device::NEI_C_xx()
/* 74 6c: 0111 0100 0110 1100 xxxx xxxx */
void upd7810_device::NEI_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D - imm;
@@ -7118,7 +7118,7 @@ void upd7810_device::NEI_D_xx()
/* 74 6d: 0111 0100 0110 1101 xxxx xxxx */
void upd7810_device::NEI_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E - imm;
@@ -7129,7 +7129,7 @@ void upd7810_device::NEI_E_xx()
/* 74 6e: 0111 0100 0110 1110 xxxx xxxx */
void upd7810_device::NEI_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H - imm;
@@ -7140,7 +7140,7 @@ void upd7810_device::NEI_H_xx()
/* 74 6f: 0111 0100 0110 1111 xxxx xxxx */
void upd7810_device::NEI_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L - imm;
@@ -7151,7 +7151,7 @@ void upd7810_device::NEI_L_xx()
/* 74 70: 0111 0100 0111 0000 xxxx xxxx */
void upd7810_device::SBI_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V - imm - (PSW & CY);
@@ -7162,7 +7162,7 @@ void upd7810_device::SBI_V_xx()
/* 74 71: 0111 0100 0111 0001 xxxx xxxx */
void upd7810_device::SBI_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A - imm - (PSW & CY);
@@ -7173,7 +7173,7 @@ void upd7810_device::SBI_A_xx()
/* 74 72: 0111 0100 0111 0010 xxxx xxxx */
void upd7810_device::SBI_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B - imm - (PSW & CY);
@@ -7184,7 +7184,7 @@ void upd7810_device::SBI_B_xx()
/* 74 73: 0111 0100 0111 0011 xxxx xxxx */
void upd7810_device::SBI_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C - imm - (PSW & CY);
@@ -7195,7 +7195,7 @@ void upd7810_device::SBI_C_xx()
/* 74 74: 0111 0100 0111 0100 xxxx xxxx */
void upd7810_device::SBI_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D - imm - (PSW & CY);
@@ -7206,7 +7206,7 @@ void upd7810_device::SBI_D_xx()
/* 74 75: 0111 0100 0111 0101 xxxx xxxx */
void upd7810_device::SBI_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E - imm - (PSW & CY);
@@ -7217,7 +7217,7 @@ void upd7810_device::SBI_E_xx()
/* 74 76: 0111 0100 0111 0110 xxxx xxxx */
void upd7810_device::SBI_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H - imm - (PSW & CY);
@@ -7228,7 +7228,7 @@ void upd7810_device::SBI_H_xx()
/* 74 77: 0111 0100 0111 0111 xxxx xxxx */
void upd7810_device::SBI_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L - imm - (PSW & CY);
@@ -7239,7 +7239,7 @@ void upd7810_device::SBI_L_xx()
/* 74 78: 0111 0100 0111 1000 xxxx xxxx */
void upd7810_device::EQI_V_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = V - imm;
@@ -7250,7 +7250,7 @@ void upd7810_device::EQI_V_xx()
/* 74 79: 0111 0100 0111 1001 xxxx xxxx */
void upd7810_device::EQI_A_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = A - imm;
@@ -7261,7 +7261,7 @@ void upd7810_device::EQI_A_xx()
/* 74 7a: 0111 0100 0111 1010 xxxx xxxx */
void upd7810_device::EQI_B_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = B - imm;
@@ -7272,7 +7272,7 @@ void upd7810_device::EQI_B_xx()
/* 74 7b: 0111 0100 0111 1011 xxxx xxxx */
void upd7810_device::EQI_C_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = C - imm;
@@ -7283,7 +7283,7 @@ void upd7810_device::EQI_C_xx()
/* 74 7c: 0111 0100 0111 1100 xxxx xxxx */
void upd7810_device::EQI_D_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = D - imm;
@@ -7294,7 +7294,7 @@ void upd7810_device::EQI_D_xx()
/* 74 7d: 0111 0100 0111 1101 xxxx xxxx */
void upd7810_device::EQI_E_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = E - imm;
@@ -7305,7 +7305,7 @@ void upd7810_device::EQI_E_xx()
/* 74 7e: 0111 0100 0111 1110 xxxx xxxx */
void upd7810_device::EQI_H_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = H - imm;
@@ -7316,7 +7316,7 @@ void upd7810_device::EQI_H_xx()
/* 74 7f: 0111 0100 0111 1111 xxxx xxxx */
void upd7810_device::EQI_L_xx()
{
- UINT8 tmp, imm;
+ uint8_t tmp, imm;
RDOPARG( imm );
tmp = L - imm;
@@ -7421,7 +7421,7 @@ void upd7810_device::DOR_EA_HL()
void upd7810_device::ADDNCW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
@@ -7434,7 +7434,7 @@ void upd7810_device::ADDNCW_wa()
/* 74 a5: 0111 0100 1010 0101 */
void upd7810_device::DADDNC_EA_BC()
{
- UINT16 tmp = EA + BC;
+ uint16_t tmp = EA + BC;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
@@ -7444,7 +7444,7 @@ void upd7810_device::DADDNC_EA_BC()
/* 74 a6: 0111 0100 1010 0110 */
void upd7810_device::DADDNC_EA_DE()
{
- UINT16 tmp = EA + DE;
+ uint16_t tmp = EA + DE;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
@@ -7454,7 +7454,7 @@ void upd7810_device::DADDNC_EA_DE()
/* 74 a7: 0111 0100 1010 0111 */
void upd7810_device::DADDNC_EA_HL()
{
- UINT16 tmp = EA + HL;
+ uint16_t tmp = EA + HL;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
@@ -7465,7 +7465,7 @@ void upd7810_device::DADDNC_EA_HL()
void upd7810_device::GTAW_wa()
{
PAIR ea = m_va;
- UINT16 tmp;
+ uint16_t tmp;
RDOPARG( ea.b.l );
tmp = A - RM( ea.d ) - 1;
@@ -7476,7 +7476,7 @@ void upd7810_device::GTAW_wa()
/* 74 ad: 0111 0100 1010 1101 */
void upd7810_device::DGT_EA_BC()
{
- UINT32 tmp = EA - BC - 1;
+ uint32_t tmp = EA - BC - 1;
ZHC_SUB( tmp, EA, 0 );
SKIP_NC;
}
@@ -7484,7 +7484,7 @@ void upd7810_device::DGT_EA_BC()
/* 74 ae: 0111 0100 1010 1110 */
void upd7810_device::DGT_EA_DE()
{
- UINT32 tmp = EA - DE - 1;
+ uint32_t tmp = EA - DE - 1;
ZHC_SUB( tmp, EA, 0 );
SKIP_NC;
}
@@ -7492,7 +7492,7 @@ void upd7810_device::DGT_EA_DE()
/* 74 af: 0111 0100 1010 1111 */
void upd7810_device::DGT_EA_HL()
{
- UINT32 tmp = EA - HL - 1;
+ uint32_t tmp = EA - HL - 1;
ZHC_SUB( tmp, EA, 0 );
SKIP_NC;
}
@@ -7501,7 +7501,7 @@ void upd7810_device::DGT_EA_HL()
void upd7810_device::SUBNBW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
tmp = A - RM( ea.d );
@@ -7513,7 +7513,7 @@ void upd7810_device::SUBNBW_wa()
/* 74 b5: 0111 0100 1011 0101 */
void upd7810_device::DSUBNB_EA_BC()
{
- UINT16 tmp = EA - BC;
+ uint16_t tmp = EA - BC;
ZHC_SUB( tmp, EA, 0 );
EA = tmp;
SKIP_NC;
@@ -7522,7 +7522,7 @@ void upd7810_device::DSUBNB_EA_BC()
/* 74 b6: 0111 0100 1011 0110 */
void upd7810_device::DSUBNB_EA_DE()
{
- UINT16 tmp = EA - DE;
+ uint16_t tmp = EA - DE;
ZHC_SUB( tmp, EA, 0 );
EA = tmp;
SKIP_NC;
@@ -7531,7 +7531,7 @@ void upd7810_device::DSUBNB_EA_DE()
/* 74 b7: 0111 0100 1011 0111 */
void upd7810_device::DSUBNB_EA_HL()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - HL;
ZHC_SUB( tmp, EA, 0 );
@@ -7543,7 +7543,7 @@ void upd7810_device::DSUBNB_EA_HL()
void upd7810_device::LTAW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
tmp = A - RM( ea.d );
@@ -7554,7 +7554,7 @@ void upd7810_device::LTAW_wa()
/* 74 bd: 0111 0100 1011 1101 */
void upd7810_device::DLT_EA_BC()
{
- UINT16 tmp = EA - BC;
+ uint16_t tmp = EA - BC;
ZHC_SUB( tmp, EA, 0 );
SKIP_CY;
}
@@ -7562,7 +7562,7 @@ void upd7810_device::DLT_EA_BC()
/* 74 be: 0111 0100 1011 1110 */
void upd7810_device::DLT_EA_DE()
{
- UINT16 tmp = EA - DE;
+ uint16_t tmp = EA - DE;
ZHC_SUB( tmp, EA, 0 );
SKIP_CY;
}
@@ -7570,7 +7570,7 @@ void upd7810_device::DLT_EA_DE()
/* 74 bf: 0111 0100 1011 1111 */
void upd7810_device::DLT_EA_HL()
{
- UINT16 tmp = EA - HL;
+ uint16_t tmp = EA - HL;
ZHC_SUB( tmp, EA, 0 );
SKIP_CY;
}
@@ -7579,7 +7579,7 @@ void upd7810_device::DLT_EA_HL()
void upd7810_device::ADDW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
tmp = A + RM( ea.d );
ZHC_ADD( tmp, A, 0 );
@@ -7589,7 +7589,7 @@ void upd7810_device::ADDW_wa()
/* 74 c5: 0111 0100 1100 0101 */
void upd7810_device::DADD_EA_BC()
{
- UINT16 tmp = EA + BC;
+ uint16_t tmp = EA + BC;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
}
@@ -7597,7 +7597,7 @@ void upd7810_device::DADD_EA_BC()
/* 74 c6: 0111 0100 1100 0110 */
void upd7810_device::DADD_EA_DE()
{
- UINT16 tmp = EA + DE;
+ uint16_t tmp = EA + DE;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
}
@@ -7605,7 +7605,7 @@ void upd7810_device::DADD_EA_DE()
/* 74 c7: 0111 0100 1100 0111 */
void upd7810_device::DADD_EA_HL()
{
- UINT16 tmp = EA + HL;
+ uint16_t tmp = EA + HL;
ZHC_ADD( tmp, EA, 0 );
EA = tmp;
}
@@ -7653,7 +7653,7 @@ void upd7810_device::DON_EA_HL()
void upd7810_device::ADCW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
tmp = A + RM( ea.d ) + (PSW & CY);
@@ -7664,7 +7664,7 @@ void upd7810_device::ADCW_wa()
/* 74 d5: 0111 0100 1101 0101 */
void upd7810_device::DADC_EA_BC()
{
- UINT16 tmp = EA + BC + (PSW & CY);
+ uint16_t tmp = EA + BC + (PSW & CY);
ZHC_ADD( tmp, EA, (PSW & CY) );
EA = tmp;
}
@@ -7672,7 +7672,7 @@ void upd7810_device::DADC_EA_BC()
/* 74 d6: 0111 0100 1101 0110 */
void upd7810_device::DADC_EA_DE()
{
- UINT16 tmp = EA + DE + (PSW & CY);
+ uint16_t tmp = EA + DE + (PSW & CY);
ZHC_ADD( tmp, EA, (PSW & CY) );
EA = tmp;
}
@@ -7680,7 +7680,7 @@ void upd7810_device::DADC_EA_DE()
/* 74 d7: 0111 0100 1101 0111 */
void upd7810_device::DADC_EA_HL()
{
- UINT16 tmp = EA + HL + (PSW & CY);
+ uint16_t tmp = EA + HL + (PSW & CY);
ZHC_ADD( tmp, EA, (PSW & CY) );
EA = tmp;
}
@@ -7728,7 +7728,7 @@ void upd7810_device::DOFF_EA_HL()
void upd7810_device::SUBW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
tmp = A - RM( ea.d );
@@ -7739,7 +7739,7 @@ void upd7810_device::SUBW_wa()
/* 74 e5: 0111 0100 1110 0101 */
void upd7810_device::DSUB_EA_BC()
{
- UINT16 tmp = EA - BC;
+ uint16_t tmp = EA - BC;
ZHC_SUB( tmp, EA, 0 );
EA = tmp;
}
@@ -7747,7 +7747,7 @@ void upd7810_device::DSUB_EA_BC()
/* 74 e6: 0111 0100 1110 0110 */
void upd7810_device::DSUB_EA_DE()
{
- UINT16 tmp = EA - DE;
+ uint16_t tmp = EA - DE;
ZHC_SUB( tmp, EA, 0 );
EA = tmp;
}
@@ -7755,7 +7755,7 @@ void upd7810_device::DSUB_EA_DE()
/* 74 e7: 0111 0100 1110 0111 */
void upd7810_device::DSUB_EA_HL()
{
- UINT16 tmp = EA - HL;
+ uint16_t tmp = EA - HL;
ZHC_SUB( tmp, EA, 0 );
EA = tmp;
}
@@ -7764,7 +7764,7 @@ void upd7810_device::DSUB_EA_HL()
void upd7810_device::NEAW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
tmp = A - RM( ea.d );
@@ -7775,7 +7775,7 @@ void upd7810_device::NEAW_wa()
/* 74 ed: 0111 0100 1110 1101 */
void upd7810_device::DNE_EA_BC()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - BC;
ZHC_SUB( tmp, EA, 0 );
@@ -7785,7 +7785,7 @@ void upd7810_device::DNE_EA_BC()
/* 74 ee: 0111 0100 1110 1110 */
void upd7810_device::DNE_EA_DE()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - DE;
ZHC_SUB( tmp, EA, 0 );
@@ -7795,7 +7795,7 @@ void upd7810_device::DNE_EA_DE()
/* 74 ef: 0111 0100 1110 1111 */
void upd7810_device::DNE_EA_HL()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - HL;
ZHC_SUB( tmp, EA, 0 );
@@ -7806,7 +7806,7 @@ void upd7810_device::DNE_EA_HL()
void upd7810_device::SBBW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
tmp = A - RM( ea.d ) - (PSW & CY);
@@ -7817,7 +7817,7 @@ void upd7810_device::SBBW_wa()
/* 74 f5: 0111 0100 1111 0101 */
void upd7810_device::DSBB_EA_BC()
{
- UINT16 tmp = EA - BC - (PSW & CY);
+ uint16_t tmp = EA - BC - (PSW & CY);
ZHC_SUB( tmp, EA, (PSW & CY) );
EA = tmp;
}
@@ -7825,7 +7825,7 @@ void upd7810_device::DSBB_EA_BC()
/* 74 f6: 0111 0100 1111 0110 */
void upd7810_device::DSBB_EA_DE()
{
- UINT16 tmp = EA - DE - (PSW & CY);
+ uint16_t tmp = EA - DE - (PSW & CY);
ZHC_SUB( tmp, EA, (PSW & CY) );
EA = tmp;
}
@@ -7833,7 +7833,7 @@ void upd7810_device::DSBB_EA_DE()
/* 74 f7: 0111 0100 1111 0111 */
void upd7810_device::DSBB_EA_HL()
{
- UINT16 tmp = EA - HL - (PSW & CY);
+ uint16_t tmp = EA - HL - (PSW & CY);
ZHC_SUB( tmp, EA, (PSW & CY) );
EA = tmp;
}
@@ -7842,7 +7842,7 @@ void upd7810_device::DSBB_EA_HL()
void upd7810_device::EQAW_wa()
{
PAIR ea = m_va;
- UINT8 tmp;
+ uint8_t tmp;
RDOPARG( ea.b.l );
tmp = A - RM( ea.d );
@@ -7853,7 +7853,7 @@ void upd7810_device::EQAW_wa()
/* 74 fd: 0111 0100 1111 1101 */
void upd7810_device::DEQ_EA_BC()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - BC;
ZHC_SUB( tmp, EA, 0 );
@@ -7863,7 +7863,7 @@ void upd7810_device::DEQ_EA_BC()
/* 74 fe: 0111 0100 1111 1110 */
void upd7810_device::DEQ_EA_DE()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - DE;
ZHC_SUB( tmp, EA, 0 );
@@ -7873,7 +7873,7 @@ void upd7810_device::DEQ_EA_DE()
/* 74 ff: 0111 0100 1111 1111 */
void upd7810_device::DEQ_EA_HL()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA - HL;
ZHC_SUB( tmp, EA, 0 );
@@ -7922,7 +7922,7 @@ void upd7810_device::LXI_S_w()
void upd7810_device::ANIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 m, imm;
+ uint8_t m, imm;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -7986,7 +7986,7 @@ void upd7810_device::MOV_A_L()
/* 10: 0001 0000 */
void upd7810_device::EXA()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = EA; EA = EA2; EA2 = tmp;
tmp = VA; VA = VA2; VA2 = tmp;
}
@@ -7994,7 +7994,7 @@ void upd7810_device::EXA()
/* 11: 0001 0001 */
void upd7810_device::EXX()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = BC; BC = BC2; BC2 = tmp;
tmp = DE; DE = DE2; DE2 = tmp;
tmp = HL; HL = HL2; HL2 = tmp;
@@ -8003,7 +8003,7 @@ void upd7810_device::EXX()
/* 48 AD (7807 only) */
void upd7810_device::EXR()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = BC; BC = BC2; BC2 = tmp;
tmp = DE; DE = DE2; DE2 = tmp;
tmp = HL; HL = HL2; HL2 = tmp;
@@ -8034,7 +8034,7 @@ void upd7810_device::LXI_B_w()
void upd7810_device::ORIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 m, imm;
+ uint8_t m, imm;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -8102,7 +8102,7 @@ void upd7810_device::MOV_L_A()
void upd7810_device::INRW_wa()
{
PAIR ea = m_va;
- UINT8 tmp, m;
+ uint8_t tmp, m;
RDOPARG( ea.b.l );
m = RM( ea.d );
@@ -8141,8 +8141,8 @@ void upd7810_device::LXI_D_w()
void upd7810_device::GTIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 m, imm;
- UINT16 tmp;
+ uint8_t m, imm;
+ uint16_t tmp;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -8208,7 +8208,7 @@ void upd7810_device::LDAX_Hm()
void upd7810_device::DCRW_wa()
{
PAIR ea = m_va;
- UINT8 tmp, m;
+ uint8_t tmp, m;
RDOPARG( ea.b.l );
m = RM( ea.d );
@@ -8262,7 +8262,7 @@ void upd7810_device::LXI_H_w()
void upd7810_device::LTIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 tmp, m, imm;
+ uint8_t tmp, m, imm;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -8344,7 +8344,7 @@ void upd7810_device::CALL_w()
/* 41: 0100 0001 */
void upd7810_device::INR_A()
{
- UINT8 tmp = A + 1;
+ uint8_t tmp = A + 1;
ZHC_ADD( tmp, A, 0 );
A = tmp;
SKIP_CY;
@@ -8353,7 +8353,7 @@ void upd7810_device::INR_A()
/* 42: 0100 0010 */
void upd7810_device::INR_B()
{
- UINT8 tmp = B + 1;
+ uint8_t tmp = B + 1;
ZHC_ADD( tmp, B, 0 );
B = tmp;
SKIP_CY;
@@ -8362,7 +8362,7 @@ void upd7810_device::INR_B()
/* 43: 0100 0011 */
void upd7810_device::INR_C()
{
- UINT8 tmp = C + 1;
+ uint8_t tmp = C + 1;
ZHC_ADD( tmp, C, 0 );
C = tmp;
SKIP_CY;
@@ -8379,7 +8379,7 @@ void upd7810_device::LXI_EA_s()
void upd7810_device::ONIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 imm;
+ uint8_t imm;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -8406,7 +8406,7 @@ void upd7810_device::PRE_48()
/* 49: 0100 1001 xxxx xxxx */
void upd7810_device::MVIX_BC_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
WM( BC, imm );
}
@@ -8414,7 +8414,7 @@ void upd7810_device::MVIX_BC_xx()
/* 4a: 0100 1010 xxxx xxxx */
void upd7810_device::MVIX_DE_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
WM( DE, imm );
}
@@ -8422,7 +8422,7 @@ void upd7810_device::MVIX_DE_xx()
/* 4b: 0100 1011 xxxx xxxx */
void upd7810_device::MVIX_HL_xx()
{
- UINT8 imm;
+ uint8_t imm;
RDOPARG( imm );
WM( HL, imm );
}
@@ -8448,7 +8448,7 @@ void upd7810_device::PRE_4D()
/* 4e: 0100 111d dddd dddd */
void upd7810_device::JRE()
{
- UINT8 offs;
+ uint8_t offs;
RDOPARG( offs );
if (OP & 0x01)
PC -= 256 - offs;
@@ -8459,14 +8459,14 @@ void upd7810_device::JRE()
/* 50: 0101 0000 */
void upd7810_device::EXH()
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = HL; HL = HL2; HL2 = tmp;
}
/* 51: 0101 0001 */
void upd7810_device::DCR_A()
{
- UINT8 tmp = A - 1;
+ uint8_t tmp = A - 1;
ZHC_SUB( tmp, A, 0 );
A = tmp;
SKIP_CY;
@@ -8475,7 +8475,7 @@ void upd7810_device::DCR_A()
/* 52: 0101 0010 */
void upd7810_device::DCR_B()
{
- UINT8 tmp = B - 1;
+ uint8_t tmp = B - 1;
ZHC_SUB( tmp, B, 0 );
B = tmp;
SKIP_CY;
@@ -8484,7 +8484,7 @@ void upd7810_device::DCR_B()
/* 53: 0101 0011 */
void upd7810_device::DCR_C()
{
- UINT8 tmp = C - 1;
+ uint8_t tmp = C - 1;
ZHC_SUB( tmp, C, 0 );
C = tmp;
SKIP_CY;
@@ -8506,7 +8506,7 @@ void upd7810_device::JMP_w()
void upd7810_device::OFFIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 imm;
+ uint8_t imm;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -8612,7 +8612,7 @@ void upd7810_device::BIT_7_wa()
/* 5d: 0101 1111 bbbb bbbb (7807 only) */
void upd7810_device::SKN_bit()
{
- UINT8 imm;
+ uint8_t imm;
int val;
RDOPARG( imm );
@@ -8665,7 +8665,7 @@ void upd7810_device::SKN_bit()
/* 58: 0101 1000 bbbb bbbb (7807 only) */
void upd7810_device::SETB()
{
- UINT8 imm;
+ uint8_t imm;
int bit;
RDOPARG( imm );
@@ -8715,7 +8715,7 @@ void upd7810_device::SETB()
/* 5b: 0101 1011 bbbb bbbb (7807 only) */
void upd7810_device::CLR()
{
- UINT8 imm;
+ uint8_t imm;
int bit;
RDOPARG( imm );
@@ -8765,7 +8765,7 @@ void upd7810_device::CLR()
/* 5d: 0101 1111 bbbb bbbb (7807 only) */
void upd7810_device::SK_bit()
{
- UINT8 imm;
+ uint8_t imm;
int val;
RDOPARG( imm );
@@ -8827,7 +8827,7 @@ void upd7810_device::PRE_60()
/* 61: 0110 0001 */
void upd7810_device::DAA()
{
- UINT8 l = A & 0x0f, h = A >> 4, tmp, adj = 0x00, old_cy = PSW & CY;
+ uint8_t l = A & 0x0f, h = A >> 4, tmp, adj = 0x00, old_cy = PSW & CY;
if (0 == (PSW & HC))
{
@@ -8892,7 +8892,7 @@ void upd7810_device::PRE_64()
void upd7810_device::NEIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 tmp, m, imm;
+ uint8_t tmp, m, imm;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -8979,7 +8979,7 @@ void upd7810_device::PRE_70()
void upd7810_device::MVIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 imm;
+ uint8_t imm;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -9013,7 +9013,7 @@ void upd7810_device::PRE_74()
void upd7810_device::EQIW_wa_xx()
{
PAIR ea = m_va;
- UINT8 tmp, m, imm;
+ uint8_t tmp, m, imm;
RDOPARG( ea.b.l );
RDOPARG( imm );
@@ -9147,7 +9147,7 @@ void upd7810_device::EI()
/* ab: 1010 1011 dddd dddd */
void upd7810_device::LDAX_D_xx()
{
- UINT16 ea;
+ uint16_t ea;
RDOPARG( ea );
ea += DE;
A = RM( ea );
@@ -9156,7 +9156,7 @@ void upd7810_device::LDAX_D_xx()
/* ac: 1010 1100 */
void upd7810_device::LDAX_H_A()
{
- UINT16 ea;
+ uint16_t ea;
ea = HL + A;
A = RM( ea );
}
@@ -9164,7 +9164,7 @@ void upd7810_device::LDAX_H_A()
/* ad: 1010 1101 */
void upd7810_device::LDAX_H_B()
{
- UINT16 ea;
+ uint16_t ea;
ea = HL + B;
A = RM( ea );
}
@@ -9172,7 +9172,7 @@ void upd7810_device::LDAX_H_B()
/* ae: 1010 1110 */
void upd7810_device::LDAX_H_EA()
{
- UINT16 ea;
+ uint16_t ea;
ea = HL + EA;
A = RM( ea );
}
@@ -9180,7 +9180,7 @@ void upd7810_device::LDAX_H_EA()
/* af: 1010 1111 dddd dddd */
void upd7810_device::LDAX_H_xx()
{
- UINT16 ea;
+ uint16_t ea;
RDOPARG( ea );
ea += HL;
A = RM( ea );
@@ -9277,7 +9277,7 @@ void upd7810_device::DI()
/* bb: 1011 1011 dddd dddd */
void upd7810_device::STAX_D_xx()
{
- UINT16 ea;
+ uint16_t ea;
RDOPARG(ea);
ea += DE;
WM( ea, A );
@@ -9286,7 +9286,7 @@ void upd7810_device::STAX_D_xx()
/* bc: 1011 1100 */
void upd7810_device::STAX_H_A()
{
- UINT16 ea = A;
+ uint16_t ea = A;
ea += HL;
WM( ea, A );
}
@@ -9294,7 +9294,7 @@ void upd7810_device::STAX_H_A()
/* bd: 1011 1101 */
void upd7810_device::STAX_H_B()
{
- UINT16 ea = B;
+ uint16_t ea = B;
ea += HL;
WM( ea, A );
}
@@ -9302,7 +9302,7 @@ void upd7810_device::STAX_H_B()
/* be: 1011 1110 */
void upd7810_device::STAX_H_EA()
{
- UINT16 ea = EA;
+ uint16_t ea = EA;
ea += HL;
WM( ea, A );
}
@@ -9310,7 +9310,7 @@ void upd7810_device::STAX_H_EA()
/* bf: 1011 1111 dddd dddd */
void upd7810_device::STAX_H_xx()
{
- UINT16 ea;
+ uint16_t ea;
RDOPARG( ea );
ea += HL;
WM( ea, A );
@@ -9319,7 +9319,7 @@ void upd7810_device::STAX_H_xx()
/* c0: 11dd dddd */
void upd7810_device::JR()
{
- INT8 offs = (INT8)(OP << 2) >> 2;
+ int8_t offs = (int8_t)(OP << 2) >> 2;
PC += offs;
}
@@ -9348,56 +9348,56 @@ void upd7810_device::CALT_7801()
/* DCR(W) and INR(W) instructions do not modify the CY register on at least 78c05 and 78c06 */
void upd7810_device::DCR_A_7801()
{
- UINT32 old_CY = PSW & CY;
+ uint32_t old_CY = PSW & CY;
DCR_A();
PSW = ( PSW & ~CY ) | old_CY;
}
void upd7810_device::DCR_B_7801()
{
- UINT32 old_CY = PSW & CY;
+ uint32_t old_CY = PSW & CY;
DCR_B();
PSW = ( PSW & ~CY ) | old_CY;
}
void upd7810_device::DCR_C_7801()
{
- UINT32 old_CY = PSW & CY;
+ uint32_t old_CY = PSW & CY;
DCR_C();
PSW = ( PSW & ~CY ) | old_CY;
}
void upd7810_device::DCRW_wa_7801()
{
- UINT32 old_CY = PSW & CY;
+ uint32_t old_CY = PSW & CY;
DCRW_wa();
PSW = ( PSW & ~CY ) | old_CY;
}
void upd7810_device::INR_A_7801()
{
- UINT32 old_CY = PSW & CY;
+ uint32_t old_CY = PSW & CY;
INR_A();
PSW = ( PSW & ~CY ) | old_CY;
}
void upd7810_device::INR_B_7801()
{
- UINT32 old_CY = PSW & CY;
+ uint32_t old_CY = PSW & CY;
INR_B();
PSW = ( PSW & ~CY ) | old_CY;
}
void upd7810_device::INR_C_7801()
{
- UINT32 old_CY = PSW & CY;
+ uint32_t old_CY = PSW & CY;
INR_C();
PSW = ( PSW & ~CY ) | old_CY;
}
void upd7810_device::INRW_wa_7801()
{
- UINT32 old_CY = PSW & CY;
+ uint32_t old_CY = PSW & CY;
INRW_wa();
PSW = ( PSW & ~CY ) | old_CY;
}
diff --git a/src/devices/cpu/v30mz/v30mz.cpp b/src/devices/cpu/v30mz/v30mz.cpp
index 1436b72d757..54197ea82c0 100644
--- a/src/devices/cpu/v30mz/v30mz.cpp
+++ b/src/devices/cpu/v30mz/v30mz.cpp
@@ -75,7 +75,7 @@ enum BREGS {
#define CF (m_CarryVal!=0)
#define SF (m_SignVal<0)
#define ZF (m_ZeroVal==0)
-#define PF m_parity_table[(UINT8)m_ParityVal]
+#define PF m_parity_table[(uint8_t)m_ParityVal]
#define AF (m_AuxVal!=0)
#define OF (m_OverVal!=0)
#define MD (m_MF!=0)
@@ -97,7 +97,7 @@ enum BREGS {
const device_type V30MZ = &device_creator<v30mz_cpu_device>;
-v30mz_cpu_device::v30mz_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v30mz_cpu_device::v30mz_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, V30MZ, "V30MZ", tag, owner, clock, "v30mz", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
@@ -109,23 +109,23 @@ v30mz_cpu_device::v30mz_cpu_device(const machine_config &mconfig, const char *ta
static const BREGS reg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH };
/* Set up parity lookup table. */
- for (UINT16 i = 0;i < 256; i++)
+ for (uint16_t i = 0;i < 256; i++)
{
- UINT16 c = 0;
- for (UINT16 j = i; j > 0; j >>= 1)
+ uint16_t c = 0;
+ for (uint16_t j = i; j > 0; j >>= 1)
{
if (j & 1) c++;
}
m_parity_table[i] = !(c & 1);
}
- for (UINT16 i = 0; i < 256; i++)
+ for (uint16_t i = 0; i < 256; i++)
{
m_Mod_RM.reg.b[i] = reg_name[(i & 0x38) >> 3];
m_Mod_RM.reg.w[i] = (WREGS) ( (i & 0x38) >> 3) ;
}
- for (UINT16 i = 0xc0; i < 0x100; i++)
+ for (uint16_t i = 0xc0; i < 0x100; i++)
{
m_Mod_RM.RM.w[i] = (WREGS)( i & 7 );
m_Mod_RM.RM.b[i] = (BREGS)reg_name[i & 7];
@@ -197,7 +197,7 @@ void v30mz_cpu_device::state_string_export(const device_state_entry &entry, std:
case STATE_GENFLAGS:
{
- UINT16 flags = CompressFlags();
+ uint16_t flags = CompressFlags();
str = string_format("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
flags & 0x8000 ? 'M':'.',
flags & 0x4000 ? '?':'.',
@@ -264,77 +264,77 @@ void v30mz_cpu_device::device_reset()
}
-inline UINT32 v30mz_cpu_device::pc()
+inline uint32_t v30mz_cpu_device::pc()
{
m_pc = ( m_sregs[CS] << 4 ) + m_ip;
return m_pc;
}
-inline UINT8 v30mz_cpu_device::read_byte(UINT32 addr)
+inline uint8_t v30mz_cpu_device::read_byte(uint32_t addr)
{
return m_program->read_byte(addr);
}
-inline UINT16 v30mz_cpu_device::read_word(UINT32 addr)
+inline uint16_t v30mz_cpu_device::read_word(uint32_t addr)
{
return m_program->read_byte(addr) | ( m_program->read_byte(addr+1) << 8 );
}
-inline void v30mz_cpu_device::write_byte(UINT32 addr, UINT8 data)
+inline void v30mz_cpu_device::write_byte(uint32_t addr, uint8_t data)
{
m_program->write_byte(addr, data);
}
-inline void v30mz_cpu_device::write_word(UINT32 addr, UINT16 data)
+inline void v30mz_cpu_device::write_word(uint32_t addr, uint16_t data)
{
m_program->write_byte( addr, data & 0xff );
m_program->write_byte( addr + 1, data >> 8 );
}
-inline UINT8 v30mz_cpu_device::read_port(UINT16 port)
+inline uint8_t v30mz_cpu_device::read_port(uint16_t port)
{
return m_io->read_byte(port);
}
-inline void v30mz_cpu_device::write_port(UINT16 port, UINT8 data)
+inline void v30mz_cpu_device::write_port(uint16_t port, uint8_t data)
{
m_io->write_byte(port, data);
}
-inline UINT8 v30mz_cpu_device::fetch_op()
+inline uint8_t v30mz_cpu_device::fetch_op()
{
- UINT8 data = m_direct->read_byte( pc() );
+ uint8_t data = m_direct->read_byte( pc() );
m_ip++;
return data;
}
-inline UINT8 v30mz_cpu_device::fetch()
+inline uint8_t v30mz_cpu_device::fetch()
{
- UINT8 data = m_direct->read_byte( pc() );
+ uint8_t data = m_direct->read_byte( pc() );
m_ip++;
return data;
}
-inline UINT16 v30mz_cpu_device::fetch_word()
+inline uint16_t v30mz_cpu_device::fetch_word()
{
- UINT16 data = fetch();
+ uint16_t data = fetch();
data |= ( fetch() << 8 );
return data;
}
-inline UINT8 v30mz_cpu_device::repx_op()
+inline uint8_t v30mz_cpu_device::repx_op()
{
- UINT8 next = fetch_op();
+ uint8_t next = fetch_op();
bool seg_prefix = false;
int seg = 0;
@@ -371,19 +371,19 @@ inline UINT8 v30mz_cpu_device::repx_op()
}
-inline void v30mz_cpu_device::CLK(UINT32 cycles)
+inline void v30mz_cpu_device::CLK(uint32_t cycles)
{
m_icount -= cycles;
}
-inline void v30mz_cpu_device::CLKM(UINT32 cycles_reg, UINT32 cycles_mem)
+inline void v30mz_cpu_device::CLKM(uint32_t cycles_reg, uint32_t cycles_mem)
{
m_icount -= ( m_modrm >= 0xc0 ) ? cycles_reg : cycles_mem;
}
-inline UINT32 v30mz_cpu_device::default_base(int seg)
+inline uint32_t v30mz_cpu_device::default_base(int seg)
{
if ( m_seg_prefix && (seg==DS || seg==SS) )
{
@@ -396,7 +396,7 @@ inline UINT32 v30mz_cpu_device::default_base(int seg)
}
-inline UINT32 v30mz_cpu_device::get_ea()
+inline uint32_t v30mz_cpu_device::get_ea()
{
switch( m_modrm & 0xc7 )
{
@@ -434,76 +434,76 @@ inline UINT32 v30mz_cpu_device::get_ea()
break;
case 0x40:
- m_eo = m_regs.w[BW] + m_regs.w[IX] + (INT8)fetch();
+ m_eo = m_regs.w[BW] + m_regs.w[IX] + (int8_t)fetch();
m_ea = default_base(DS) + m_eo;
break;
case 0x41:
- m_eo = m_regs.w[BW] + m_regs.w[IY] + (INT8)fetch();
+ m_eo = m_regs.w[BW] + m_regs.w[IY] + (int8_t)fetch();
m_ea = default_base(DS) + m_eo;
break;
case 0x42:
- m_eo = m_regs.w[BP] + m_regs.w[IX] + (INT8)fetch();
+ m_eo = m_regs.w[BP] + m_regs.w[IX] + (int8_t)fetch();
m_ea = default_base(SS) + m_eo;
break;
case 0x43:
- m_eo = m_regs.w[BP] + m_regs.w[IY] + (INT8)fetch();
+ m_eo = m_regs.w[BP] + m_regs.w[IY] + (int8_t)fetch();
m_ea = default_base(SS) + m_eo;
break;
case 0x44:
- m_eo = m_regs.w[IX] + (INT8)fetch();
+ m_eo = m_regs.w[IX] + (int8_t)fetch();
m_ea = default_base(DS) + m_eo;
break;
case 0x45:
- m_eo = m_regs.w[IY] + (INT8)fetch();
+ m_eo = m_regs.w[IY] + (int8_t)fetch();
m_ea = default_base(DS) + m_eo;
break;
case 0x46:
- m_eo = m_regs.w[BP] + (INT8)fetch();
+ m_eo = m_regs.w[BP] + (int8_t)fetch();
m_ea = default_base(SS) + m_eo;
break;
case 0x47:
- m_eo = m_regs.w[BW] + (INT8)fetch();
+ m_eo = m_regs.w[BW] + (int8_t)fetch();
m_ea = default_base(DS) + m_eo;
break;
case 0x80:
m_e16 = fetch_word();
- m_eo = m_regs.w[BW] + m_regs.w[IX] + (INT16)m_e16;
+ m_eo = m_regs.w[BW] + m_regs.w[IX] + (int16_t)m_e16;
m_ea = default_base(DS) + m_eo;
break;
case 0x81:
m_e16 = fetch_word();
- m_eo = m_regs.w[BW] + m_regs.w[IY] + (INT16)m_e16;
+ m_eo = m_regs.w[BW] + m_regs.w[IY] + (int16_t)m_e16;
m_ea = default_base(DS) + m_eo;
break;
case 0x82:
m_e16 = fetch_word();
- m_eo = m_regs.w[BP] + m_regs.w[IX] + (INT16)m_e16;
+ m_eo = m_regs.w[BP] + m_regs.w[IX] + (int16_t)m_e16;
m_ea = default_base(SS) + m_eo;
break;
case 0x83:
m_e16 = fetch_word();
- m_eo = m_regs.w[BP] + m_regs.w[IY] + (INT16)m_e16;
+ m_eo = m_regs.w[BP] + m_regs.w[IY] + (int16_t)m_e16;
m_ea = default_base(SS) + m_eo;
break;
case 0x84:
m_e16 = fetch_word();
- m_eo = m_regs.w[IX] + (INT16)m_e16;
+ m_eo = m_regs.w[IX] + (int16_t)m_e16;
m_ea = default_base(DS) + m_eo;
break;
case 0x85:
m_e16 = fetch_word();
- m_eo = m_regs.w[IY] + (INT16)m_e16;
+ m_eo = m_regs.w[IY] + (int16_t)m_e16;
m_ea = default_base(DS) + m_eo;
break;
case 0x86:
m_e16 = fetch_word();
- m_eo = m_regs.w[BP] + (INT16)m_e16;
+ m_eo = m_regs.w[BP] + (int16_t)m_e16;
m_ea = default_base(SS) + m_eo;
break;
case 0x87:
m_e16 = fetch_word();
- m_eo = m_regs.w[BW] + (INT16)m_e16;
+ m_eo = m_regs.w[BW] + (int16_t)m_e16;
m_ea = default_base(DS) + m_eo;
break;
}
@@ -512,7 +512,7 @@ inline UINT32 v30mz_cpu_device::get_ea()
}
-inline void v30mz_cpu_device::PutbackRMByte(UINT8 data)
+inline void v30mz_cpu_device::PutbackRMByte(uint8_t data)
{
if ( m_modrm >= 0xc0 )
{
@@ -525,7 +525,7 @@ inline void v30mz_cpu_device::PutbackRMByte(UINT8 data)
}
-inline void v30mz_cpu_device::PutbackRMWord(UINT16 data)
+inline void v30mz_cpu_device::PutbackRMWord(uint16_t data)
{
if ( m_modrm >= 0xc0 )
{
@@ -545,12 +545,12 @@ inline void v30mz_cpu_device::PutImmRMWord()
}
else
{
- UINT32 addr = get_ea();
+ uint32_t addr = get_ea();
write_word( addr, fetch_word() );
}
}
-inline void v30mz_cpu_device::PutRMWord(UINT16 val)
+inline void v30mz_cpu_device::PutRMWord(uint16_t val)
{
if ( m_modrm >= 0xc0 )
{
@@ -563,7 +563,7 @@ inline void v30mz_cpu_device::PutRMWord(UINT16 val)
}
-inline void v30mz_cpu_device::PutRMByte(UINT8 val)
+inline void v30mz_cpu_device::PutRMByte(uint8_t val)
{
if ( m_modrm >= 0xc0 )
{
@@ -584,7 +584,7 @@ inline void v30mz_cpu_device::PutImmRMByte()
}
else
{
- UINT32 addr = get_ea();
+ uint32_t addr = get_ea();
write_byte( addr, fetch() );
}
}
@@ -637,31 +637,31 @@ inline void v30mz_cpu_device::DEF_axd16()
-inline void v30mz_cpu_device::RegByte(UINT8 data)
+inline void v30mz_cpu_device::RegByte(uint8_t data)
{
m_regs.b[ m_Mod_RM.reg.b[ m_modrm ] ] = data;
}
-inline void v30mz_cpu_device::RegWord(UINT16 data)
+inline void v30mz_cpu_device::RegWord(uint16_t data)
{
m_regs.w[ m_Mod_RM.reg.w[ m_modrm ] ] = data;
}
-inline UINT8 v30mz_cpu_device::RegByte()
+inline uint8_t v30mz_cpu_device::RegByte()
{
return m_regs.b[ m_Mod_RM.reg.b[ m_modrm ] ];
}
-inline UINT16 v30mz_cpu_device::RegWord()
+inline uint16_t v30mz_cpu_device::RegWord()
{
return m_regs.w[ m_Mod_RM.reg.w[ m_modrm ] ];
}
-inline UINT16 v30mz_cpu_device::GetRMWord()
+inline uint16_t v30mz_cpu_device::GetRMWord()
{
if ( m_modrm >= 0xc0 )
{
@@ -674,15 +674,15 @@ inline UINT16 v30mz_cpu_device::GetRMWord()
}
-inline UINT16 v30mz_cpu_device::GetnextRMWord()
+inline uint16_t v30mz_cpu_device::GetnextRMWord()
{
- UINT32 addr = ( m_ea & 0xf0000 ) | ( ( m_ea + 2 ) & 0xffff );
+ uint32_t addr = ( m_ea & 0xf0000 ) | ( ( m_ea + 2 ) & 0xffff );
return read_word( addr );
}
-inline UINT8 v30mz_cpu_device::GetRMByte()
+inline uint8_t v30mz_cpu_device::GetRMByte()
{
if ( m_modrm >= 0xc0 )
{
@@ -695,26 +695,26 @@ inline UINT8 v30mz_cpu_device::GetRMByte()
}
-inline void v30mz_cpu_device::PutMemB(int seg, UINT16 offset, UINT8 data)
+inline void v30mz_cpu_device::PutMemB(int seg, uint16_t offset, uint8_t data)
{
write_byte( default_base( seg ) + offset, data);
}
-inline void v30mz_cpu_device::PutMemW(int seg, UINT16 offset, UINT16 data)
+inline void v30mz_cpu_device::PutMemW(int seg, uint16_t offset, uint16_t data)
{
PutMemB( seg, offset, data & 0xff);
PutMemB( seg, offset+1, data >> 8);
}
-inline UINT8 v30mz_cpu_device::GetMemB(int seg, UINT16 offset)
+inline uint8_t v30mz_cpu_device::GetMemB(int seg, uint16_t offset)
{
return read_byte( default_base(seg) + offset );
}
-inline UINT16 v30mz_cpu_device::GetMemW(int seg, UINT16 offset)
+inline uint16_t v30mz_cpu_device::GetMemW(int seg, uint16_t offset)
{
return GetMemB(seg, offset) | ( GetMemB(seg, offset + 1) << 8 );
}
@@ -722,68 +722,68 @@ inline UINT16 v30mz_cpu_device::GetMemW(int seg, UINT16 offset)
// Setting flags
-inline void v30mz_cpu_device::set_CFB(UINT32 x)
+inline void v30mz_cpu_device::set_CFB(uint32_t x)
{
m_CarryVal = x & 0x100;
}
-inline void v30mz_cpu_device::set_CFW(UINT32 x)
+inline void v30mz_cpu_device::set_CFW(uint32_t x)
{
m_CarryVal = x & 0x10000;
}
-inline void v30mz_cpu_device::set_AF(UINT32 x,UINT32 y,UINT32 z)
+inline void v30mz_cpu_device::set_AF(uint32_t x,uint32_t y,uint32_t z)
{
m_AuxVal = (x ^ (y ^ z)) & 0x10;
}
-inline void v30mz_cpu_device::set_SF(UINT32 x)
+inline void v30mz_cpu_device::set_SF(uint32_t x)
{
m_SignVal = x;
}
-inline void v30mz_cpu_device::set_ZF(UINT32 x)
+inline void v30mz_cpu_device::set_ZF(uint32_t x)
{
m_ZeroVal = x;
}
-inline void v30mz_cpu_device::set_PF(UINT32 x)
+inline void v30mz_cpu_device::set_PF(uint32_t x)
{
m_ParityVal = x;
}
-inline void v30mz_cpu_device::set_SZPF_Byte(UINT32 x)
+inline void v30mz_cpu_device::set_SZPF_Byte(uint32_t x)
{
- m_SignVal = m_ZeroVal = m_ParityVal = (INT8)x;
+ m_SignVal = m_ZeroVal = m_ParityVal = (int8_t)x;
}
-inline void v30mz_cpu_device::set_SZPF_Word(UINT32 x)
+inline void v30mz_cpu_device::set_SZPF_Word(uint32_t x)
{
- m_SignVal = m_ZeroVal = m_ParityVal = (INT16)x;
+ m_SignVal = m_ZeroVal = m_ParityVal = (int16_t)x;
}
-inline void v30mz_cpu_device::set_OFW_Add(UINT32 x,UINT32 y,UINT32 z)
+inline void v30mz_cpu_device::set_OFW_Add(uint32_t x,uint32_t y,uint32_t z)
{
m_OverVal = (x ^ y) & (x ^ z) & 0x8000;
}
-inline void v30mz_cpu_device::set_OFB_Add(UINT32 x,UINT32 y,UINT32 z)
+inline void v30mz_cpu_device::set_OFB_Add(uint32_t x,uint32_t y,uint32_t z)
{
m_OverVal = (x ^ y) & (x ^ z) & 0x80;
}
-inline void v30mz_cpu_device::set_OFW_Sub(UINT32 x,UINT32 y,UINT32 z)
+inline void v30mz_cpu_device::set_OFW_Sub(uint32_t x,uint32_t y,uint32_t z)
{
m_OverVal = (z ^ y) & (z ^ x) & 0x8000;
}
-inline void v30mz_cpu_device::set_OFB_Sub(UINT32 x,UINT32 y,UINT32 z)
+inline void v30mz_cpu_device::set_OFB_Sub(uint32_t x,uint32_t y,uint32_t z)
{
m_OverVal = (z ^ y) & (z ^ x) & 0x80;
}
-inline UINT16 v30mz_cpu_device::CompressFlags() const
+inline uint16_t v30mz_cpu_device::CompressFlags() const
{
return (CF ? 1 : 0)
| (PF ? 4 : 0)
@@ -797,7 +797,7 @@ inline UINT16 v30mz_cpu_device::CompressFlags() const
| (MD << 15);
}
-inline void v30mz_cpu_device::ExpandFlags(UINT16 f)
+inline void v30mz_cpu_device::ExpandFlags(uint16_t f)
{
m_CarryVal = (f) & 1;
m_ParityVal = !((f) & 4);
@@ -843,7 +843,7 @@ inline void v30mz_cpu_device::i_outsw()
inline void v30mz_cpu_device::i_movsb()
{
- UINT8 tmp = GetMemB( DS, m_regs.w[IX] );
+ uint8_t tmp = GetMemB( DS, m_regs.w[IX] );
PutMemB( ES, m_regs.w[IY], tmp);
m_regs.w[IY] += -2 * m_DF + 1;
m_regs.w[IX] += -2 * m_DF + 1;
@@ -852,7 +852,7 @@ inline void v30mz_cpu_device::i_movsb()
inline void v30mz_cpu_device::i_movsw()
{
- UINT16 tmp = GetMemW( DS, m_regs.w[IX] );
+ uint16_t tmp = GetMemW( DS, m_regs.w[IX] );
PutMemW( ES, m_regs.w[IY], tmp );
m_regs.w[IY] += -4 * m_DF + 2;
m_regs.w[IX] += -4 * m_DF + 2;
@@ -928,7 +928,7 @@ inline void v30mz_cpu_device::i_scasw()
inline void v30mz_cpu_device::i_popf()
{
- UINT32 tmp = POP();
+ uint32_t tmp = POP();
ExpandFlags(tmp);
CLK(3);
@@ -941,7 +941,7 @@ inline void v30mz_cpu_device::i_popf()
inline void v30mz_cpu_device::ADDB()
{
- UINT32 res = m_dst + m_src;
+ uint32_t res = m_dst + m_src;
set_CFB(res);
set_OFB_Add(res,m_src,m_dst);
@@ -953,7 +953,7 @@ inline void v30mz_cpu_device::ADDB()
inline void v30mz_cpu_device::ADDW()
{
- UINT32 res = m_dst + m_src;
+ uint32_t res = m_dst + m_src;
set_CFW(res);
set_OFW_Add(res,m_src,m_dst);
@@ -965,7 +965,7 @@ inline void v30mz_cpu_device::ADDW()
inline void v30mz_cpu_device::SUBB()
{
- UINT32 res = m_dst - m_src;
+ uint32_t res = m_dst - m_src;
set_CFB(res);
set_OFB_Sub(res,m_src,m_dst);
@@ -977,7 +977,7 @@ inline void v30mz_cpu_device::SUBB()
inline void v30mz_cpu_device::SUBW()
{
- UINT32 res = m_dst - m_src;
+ uint32_t res = m_dst - m_src;
set_CFW(res);
set_OFW_Sub(res,m_src,m_dst);
@@ -1085,7 +1085,7 @@ inline void v30mz_cpu_device::RORC_WORD()
m_dst >>= 1;
}
-inline void v30mz_cpu_device::SHL_BYTE(UINT8 c)
+inline void v30mz_cpu_device::SHL_BYTE(uint8_t c)
{
m_icount -= c;
m_dst <<= c;
@@ -1094,7 +1094,7 @@ inline void v30mz_cpu_device::SHL_BYTE(UINT8 c)
PutbackRMByte(m_dst);
}
-inline void v30mz_cpu_device::SHL_WORD(UINT8 c)
+inline void v30mz_cpu_device::SHL_WORD(uint8_t c)
{
m_icount -= c;
m_dst <<= c;
@@ -1103,7 +1103,7 @@ inline void v30mz_cpu_device::SHL_WORD(UINT8 c)
PutbackRMWord(m_dst);
}
-inline void v30mz_cpu_device::SHR_BYTE(UINT8 c)
+inline void v30mz_cpu_device::SHR_BYTE(uint8_t c)
{
m_icount -= c;
m_dst >>= c-1;
@@ -1113,7 +1113,7 @@ inline void v30mz_cpu_device::SHR_BYTE(UINT8 c)
PutbackRMByte(m_dst);
}
-inline void v30mz_cpu_device::SHR_WORD(UINT8 c)
+inline void v30mz_cpu_device::SHR_WORD(uint8_t c)
{
m_icount -= c;
m_dst >>= c-1;
@@ -1123,20 +1123,20 @@ inline void v30mz_cpu_device::SHR_WORD(UINT8 c)
PutbackRMWord(m_dst);
}
-inline void v30mz_cpu_device::SHRA_BYTE(UINT8 c)
+inline void v30mz_cpu_device::SHRA_BYTE(uint8_t c)
{
m_icount -= c;
- m_dst = ((INT8)m_dst) >> (c-1);
+ m_dst = ((int8_t)m_dst) >> (c-1);
m_CarryVal = m_dst & 0x1;
m_dst = m_dst >> 1;
set_SZPF_Byte(m_dst);
PutbackRMByte(m_dst);
}
-inline void v30mz_cpu_device::SHRA_WORD(UINT8 c)
+inline void v30mz_cpu_device::SHRA_WORD(uint8_t c)
{
m_icount -= c;
- m_dst = ((INT16)m_dst) >> (c-1);
+ m_dst = ((int16_t)m_dst) >> (c-1);
m_CarryVal = m_dst & 0x1;
m_dst = m_dst >> 1;
set_SZPF_Word(m_dst);
@@ -1144,19 +1144,19 @@ inline void v30mz_cpu_device::SHRA_WORD(UINT8 c)
}
-inline void v30mz_cpu_device::XchgAWReg(UINT8 reg)
+inline void v30mz_cpu_device::XchgAWReg(uint8_t reg)
{
- UINT16 tmp = m_regs.w[reg];
+ uint16_t tmp = m_regs.w[reg];
m_regs.w[reg] = m_regs.w[AW];
m_regs.w[AW] = tmp;
}
-inline void v30mz_cpu_device::IncWordReg(UINT8 reg)
+inline void v30mz_cpu_device::IncWordReg(uint8_t reg)
{
- UINT32 tmp = m_regs.w[reg];
- UINT32 tmp1 = tmp+1;
+ uint32_t tmp = m_regs.w[reg];
+ uint32_t tmp1 = tmp+1;
m_OverVal = (tmp == 0x7fff);
set_AF(tmp1,tmp,1);
@@ -1165,10 +1165,10 @@ inline void v30mz_cpu_device::IncWordReg(UINT8 reg)
}
-inline void v30mz_cpu_device::DecWordReg(UINT8 reg)
+inline void v30mz_cpu_device::DecWordReg(uint8_t reg)
{
- UINT32 tmp = m_regs.w[reg];
- UINT32 tmp1 = tmp-1;
+ uint32_t tmp = m_regs.w[reg];
+ uint32_t tmp1 = tmp-1;
m_OverVal = (tmp == 0x8000);
set_AF(tmp1,tmp,1);
@@ -1177,16 +1177,16 @@ inline void v30mz_cpu_device::DecWordReg(UINT8 reg)
}
-inline void v30mz_cpu_device::PUSH(UINT16 data)
+inline void v30mz_cpu_device::PUSH(uint16_t data)
{
m_regs.w[SP] -= 2;
write_word( ( m_sregs[SS] << 4 ) + m_regs.w[SP], data );
}
-inline UINT16 v30mz_cpu_device::POP()
+inline uint16_t v30mz_cpu_device::POP()
{
- UINT16 data = read_word( ( m_sregs[SS] << 4 ) + m_regs.w[SP] );
+ uint16_t data = read_word( ( m_sregs[SS] << 4 ) + m_regs.w[SP] );
m_regs.w[SP] += 2;
return data;
@@ -1195,7 +1195,7 @@ inline UINT16 v30mz_cpu_device::POP()
inline void v30mz_cpu_device::JMP(bool cond)
{
- int rel = (int)((INT8)fetch());
+ int rel = (int)((int8_t)fetch());
if (cond)
{
@@ -1206,11 +1206,11 @@ inline void v30mz_cpu_device::JMP(bool cond)
}
-inline void v30mz_cpu_device::ADJ4(INT8 param1,INT8 param2)
+inline void v30mz_cpu_device::ADJ4(int8_t param1,int8_t param2)
{
if (AF || ((m_regs.b[AL] & 0xf) > 9))
{
- UINT16 tmp;
+ uint16_t tmp;
tmp = m_regs.b[AL] + param1;
m_regs.b[AL] = tmp;
m_AuxVal = 1;
@@ -1225,7 +1225,7 @@ inline void v30mz_cpu_device::ADJ4(INT8 param1,INT8 param2)
}
-inline void v30mz_cpu_device::ADJB(INT8 param1, INT8 param2)
+inline void v30mz_cpu_device::ADJB(int8_t param1, int8_t param2)
{
if (AF || ((m_regs.b[AL] & 0xf) > 9))
{
@@ -1257,8 +1257,8 @@ void v30mz_cpu_device::interrupt(int int_num)
m_pending_irq &= ~INT_IRQ;
}
- UINT16 dest_off = read_word( int_num * 4 + 0 );
- UINT16 dest_seg = read_word( int_num * 4 + 2 );
+ uint16_t dest_off = read_word( int_num * 4 + 0 );
+ uint16_t dest_seg = read_word( int_num * 4 + 2 );
PUSH(m_sregs[CS]);
PUSH(m_ip);
@@ -1296,7 +1296,7 @@ void v30mz_cpu_device::execute_set_input( int inptnum, int state )
}
-offs_t v30mz_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t v30mz_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( nec );
return CPU_DISASSEMBLE_NAME(nec)(this, buffer, pc, oprom, opram, options);
@@ -1355,7 +1355,7 @@ void v30mz_cpu_device::execute_run()
debugger_instruction_hook( this, pc() );
- UINT8 op = fetch_op();
+ uint8_t op = fetch_op();
switch(op)
{
@@ -1460,7 +1460,7 @@ void v30mz_cpu_device::execute_run()
case 0x0f: // i_pre_nec
{
- UINT32 tmp, tmp2;
+ uint32_t tmp, tmp2;
switch ( fetch() )
{
@@ -1581,8 +1581,8 @@ void v30mz_cpu_device::execute_run()
case 0x20:
{
int count = (m_regs.b[CL]+1)/2;
- UINT16 di = m_regs.w[IY];
- UINT16 si = m_regs.w[IX];
+ uint16_t di = m_regs.w[IY];
+ uint16_t si = m_regs.w[IX];
if (m_seg_prefix)
{
logerror("%s: %06x: Warning: seg_prefix defined for add4s\n", tag(), pc());
@@ -1612,8 +1612,8 @@ void v30mz_cpu_device::execute_run()
case 0x22:
{
int count = (m_regs.b[CL]+1)/2;
- UINT16 di = m_regs.w[IY];
- UINT16 si = m_regs.w[IX];
+ uint16_t di = m_regs.w[IY];
+ uint16_t si = m_regs.w[IX];
if (m_seg_prefix)
{
logerror("%s: %06x: Warning: seg_prefix defined for sub4s\n", tag(), pc());
@@ -1652,8 +1652,8 @@ void v30mz_cpu_device::execute_run()
case 0x26:
{
int count = (m_regs.b[CL]+1)/2;
- UINT16 di = m_regs.w[IY];
- UINT16 si = m_regs.w[IX];
+ uint16_t di = m_regs.w[IY];
+ uint16_t si = m_regs.w[IX];
if (m_seg_prefix)
{
logerror("%s: %06x: Warning: seg_prefix defined for cmp4s\n", tag(), pc());
@@ -2232,7 +2232,7 @@ void v30mz_cpu_device::execute_run()
case 0x60: // i_pusha
{
- UINT32 tmp = m_regs.w[SP];
+ uint32_t tmp = m_regs.w[SP];
PUSH(m_regs.w[AW]);
PUSH(m_regs.w[CW]);
@@ -2260,7 +2260,7 @@ void v30mz_cpu_device::execute_run()
case 0x62: // i_chkind
{
- UINT32 low,high,tmp;
+ uint32_t low,high,tmp;
m_modrm = fetch();
low = GetRMWord();
high = GetnextRMWord();
@@ -2280,8 +2280,8 @@ void v30mz_cpu_device::execute_run()
case 0x64: // i_repnc
{
- UINT8 next = repx_op();
- UINT16 c = m_regs.w[CW];
+ uint8_t next = repx_op();
+ uint16_t c = m_regs.w[CW];
switch (next)
{
@@ -2311,8 +2311,8 @@ void v30mz_cpu_device::execute_run()
case 0x65: // i_repc
{
- UINT8 next = repx_op();
- UINT16 c = m_regs.w[CW];
+ uint8_t next = repx_op();
+ uint16_t c = m_regs.w[CW];
switch (next)
{
@@ -2347,28 +2347,28 @@ void v30mz_cpu_device::execute_run()
case 0x69: // i_imul_d16
{
- UINT32 tmp;
+ uint32_t tmp;
DEF_r16w();
tmp = fetch_word();
- m_dst = (INT32)((INT16)m_src)*(INT32)((INT16)tmp);
- m_CarryVal = m_OverVal = (((INT32)m_dst) >> 15 != 0) && (((INT32)m_dst) >> 15 != -1);
+ m_dst = (int32_t)((int16_t)m_src)*(int32_t)((int16_t)tmp);
+ m_CarryVal = m_OverVal = (((int32_t)m_dst) >> 15 != 0) && (((int32_t)m_dst) >> 15 != -1);
RegWord(m_dst);
CLKM(3,4);
}
break;
case 0x6a: // i_push_d8
- PUSH( (UINT16)((INT16)((INT8)fetch())) );
+ PUSH( (uint16_t)((int16_t)((int8_t)fetch())) );
CLK(1);
break;
case 0x6b: // i_imul_d8
{
- UINT32 src2;
+ uint32_t src2;
DEF_r16w();
- src2= (UINT16)((INT16)((INT8)fetch()));
- m_dst = (INT32)((INT16)m_src)*(INT32)((INT16)src2);
- m_CarryVal = m_OverVal = (((INT32)m_dst) >> 15 != 0) && (((INT32)m_dst) >> 15 != -1);
+ src2= (uint16_t)((int16_t)((int8_t)fetch()));
+ m_dst = (int32_t)((int16_t)m_src)*(int32_t)((int16_t)src2);
+ m_CarryVal = m_OverVal = (((int32_t)m_dst) >> 15 != 0) && (((int32_t)m_dst) >> 15 != -1);
RegWord(m_dst);
CLKM(3,4);
}
@@ -2501,7 +2501,7 @@ void v30mz_cpu_device::execute_run()
case 0x82: // i_82pre
m_modrm = fetch();
m_dst = GetRMByte();
- m_src = (INT8)fetch();
+ m_src = (int8_t)fetch();
if (m_modrm >=0xc0 ) { CLK(1); }
else if ((m_modrm & 0x38)==0x38) { CLK(2); }
else { CLK(3); }
@@ -2522,7 +2522,7 @@ void v30mz_cpu_device::execute_run()
case 0x83: // i_83pre
m_modrm = fetch();
m_dst = GetRMWord();
- m_src = ((INT16)((INT8)fetch()));
+ m_src = ((int16_t)((int8_t)fetch()));
if ( m_modrm >= 0xc0 ) { CLK(1); }
else if (( m_modrm & 0x38 ) == 0x38) { CLK(2); }
else { CLK(3); }
@@ -2690,8 +2690,8 @@ void v30mz_cpu_device::execute_run()
case 0x9a: // i_call_far
{
- UINT16 tmp = fetch_word();
- UINT16 tmp2 = fetch_word();
+ uint16_t tmp = fetch_word();
+ uint16_t tmp2 = fetch_word();
PUSH(m_sregs[CS]);
PUSH(m_ip);
m_ip = tmp;
@@ -2715,7 +2715,7 @@ void v30mz_cpu_device::execute_run()
case 0x9e: // i_sahf
{
- UINT32 tmp = (CompressFlags() & 0xff00) | (m_regs.b[AH] & 0xd5);
+ uint32_t tmp = (CompressFlags() & 0xff00) | (m_regs.b[AH] & 0xd5);
ExpandFlags(tmp);
CLK(4);
}
@@ -2729,7 +2729,7 @@ void v30mz_cpu_device::execute_run()
case 0xa0: // i_mov_aldisp
{
- UINT32 addr = fetch_word();
+ uint32_t addr = fetch_word();
m_regs.b[AL] = GetMemB(DS, addr);
CLK(1);
}
@@ -2737,7 +2737,7 @@ void v30mz_cpu_device::execute_run()
case 0xa1: // i_mov_axdisp
{
- UINT32 addr = fetch_word();
+ uint32_t addr = fetch_word();
m_regs.b[AL] = GetMemB(DS, addr);
m_regs.b[AH] = GetMemB(DS, addr+1);
CLK(1);
@@ -2746,7 +2746,7 @@ void v30mz_cpu_device::execute_run()
case 0xa2: // i_mov_dispal
{
- UINT32 addr = fetch_word();
+ uint32_t addr = fetch_word();
PutMemB(DS, addr, m_regs.b[AL]);
CLK(1);
}
@@ -2754,7 +2754,7 @@ void v30mz_cpu_device::execute_run()
case 0xa3: // i_mov_dispax
{
- UINT32 addr = fetch_word();
+ uint32_t addr = fetch_word();
PutMemB(DS, addr, m_regs.b[AL]);
PutMemB(DS, addr+1, m_regs.b[AH]);
CLK(1);
@@ -2907,7 +2907,7 @@ void v30mz_cpu_device::execute_run()
case 0xc0: // i_rotshft_bd8
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMByte();
m_dst = m_src;
@@ -2932,7 +2932,7 @@ void v30mz_cpu_device::execute_run()
case 0xc1: // i_rotshft_wd8
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMWord();
m_dst = m_src;
@@ -2958,7 +2958,7 @@ void v30mz_cpu_device::execute_run()
case 0xc2: // i_ret_d16
{
- UINT32 count = fetch_word();
+ uint32_t count = fetch_word();
m_ip = POP();
m_regs.w[SP] += count;
CLK(6);
@@ -2999,8 +2999,8 @@ void v30mz_cpu_device::execute_run()
case 0xc8: // i_enter
{
- UINT16 nb = fetch();
- UINT32 level;
+ uint16_t nb = fetch();
+ uint32_t level;
CLK(8);
nb |= fetch() << 8;
@@ -3029,7 +3029,7 @@ void v30mz_cpu_device::execute_run()
case 0xca: // i_retf_d16
{
- UINT32 count = fetch_word();
+ uint32_t count = fetch_word();
m_ip = POP();
m_sregs[CS] = POP();
m_regs.w[SP] += count;
@@ -3108,7 +3108,7 @@ void v30mz_cpu_device::execute_run()
case 0xd2: // i_rotshft_bcl
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMByte();
@@ -3134,7 +3134,7 @@ void v30mz_cpu_device::execute_run()
case 0xd3: // i_rotshft_wcl
{
- UINT8 c;
+ uint8_t c;
m_modrm = fetch();
m_src = GetRMWord();
@@ -3194,7 +3194,7 @@ void v30mz_cpu_device::execute_run()
case 0xe0: // i_loopne
{
- INT8 disp = (INT8)fetch();
+ int8_t disp = (int8_t)fetch();
m_regs.w[CW]--;
if (!ZF && m_regs.w[CW])
@@ -3208,7 +3208,7 @@ void v30mz_cpu_device::execute_run()
case 0xe1: // i_loope
{
- INT8 disp = (INT8)fetch();
+ int8_t disp = (int8_t)fetch();
m_regs.w[CW]--;
if (ZF && m_regs.w[CW])
@@ -3222,7 +3222,7 @@ void v30mz_cpu_device::execute_run()
case 0xe2: // i_loop
{
- INT8 disp = (INT8)fetch();
+ int8_t disp = (int8_t)fetch();
m_regs.w[CW]--;
if (m_regs.w[CW])
@@ -3236,7 +3236,7 @@ void v30mz_cpu_device::execute_run()
case 0xe3: // i_jcxz
{
- INT8 disp = (INT8)fetch();
+ int8_t disp = (int8_t)fetch();
if (m_regs.w[CW] == 0)
{
@@ -3254,7 +3254,7 @@ void v30mz_cpu_device::execute_run()
case 0xe5: // i_inax
{
- UINT8 port = fetch();
+ uint8_t port = fetch();
m_regs.b[AL] = read_port(port);
m_regs.b[AH] = read_port(port+1);
@@ -3269,7 +3269,7 @@ void v30mz_cpu_device::execute_run()
case 0xe7: // i_outax
{
- UINT8 port = fetch();
+ uint8_t port = fetch();
write_port(port, m_regs.b[AL]);
write_port(port+1, m_regs.b[AH]);
@@ -3280,7 +3280,7 @@ void v30mz_cpu_device::execute_run()
case 0xe8: // i_call_d16
{
- INT16 tmp = (INT16)fetch_word();
+ int16_t tmp = (int16_t)fetch_word();
PUSH(m_ip);
m_ip = m_ip + tmp;
@@ -3290,7 +3290,7 @@ void v30mz_cpu_device::execute_run()
case 0xe9: // i_jmp_d16
{
- INT16 offset = (INT16)fetch_word();
+ int16_t offset = (int16_t)fetch_word();
m_ip += offset;
CLK(4);
}
@@ -3298,8 +3298,8 @@ void v30mz_cpu_device::execute_run()
case 0xea: // i_jmp_far
{
- UINT16 tmp = fetch_word();
- UINT16 tmp1 = fetch_word();
+ uint16_t tmp = fetch_word();
+ uint16_t tmp1 = fetch_word();
m_sregs[CS] = tmp1;
m_ip = tmp;
@@ -3309,14 +3309,14 @@ void v30mz_cpu_device::execute_run()
case 0xeb: // i_jmp_d8
{
- int tmp = (int)((INT8)fetch());
+ int tmp = (int)((int8_t)fetch());
CLK(4);
if (tmp==-2 && m_no_interrupt==0 && (m_pending_irq==0) && m_icount>0)
{
m_icount%=12; /* cycle skip */
}
- m_ip = (UINT16)(m_ip+tmp);
+ m_ip = (uint16_t)(m_ip+tmp);
}
break;
@@ -3327,7 +3327,7 @@ void v30mz_cpu_device::execute_run()
case 0xed: // i_inaxdx
{
- UINT32 port = m_regs.w[DW];
+ uint32_t port = m_regs.w[DW];
m_regs.b[AL] = read_port(port);
m_regs.b[AH] = read_port(port+1);
@@ -3342,7 +3342,7 @@ void v30mz_cpu_device::execute_run()
case 0xef: // i_outdxax
{
- UINT32 port = m_regs.w[DW];
+ uint32_t port = m_regs.w[DW];
write_port(port, m_regs.b[AL]);
write_port(port+1, m_regs.b[AH]);
@@ -3359,8 +3359,8 @@ void v30mz_cpu_device::execute_run()
case 0xf2: // i_repne
{
- UINT8 next = repx_op();
- UINT16 c = m_regs.w[CW];
+ uint8_t next = repx_op();
+ uint16_t c = m_regs.w[CW];
switch (next)
{
@@ -3389,8 +3389,8 @@ void v30mz_cpu_device::execute_run()
case 0xf3: // i_repe
{
- UINT8 next = repx_op();
- UINT16 c = m_regs.w[CW];
+ uint8_t next = repx_op();
+ uint16_t c = m_regs.w[CW];
switch (next)
{
@@ -3429,9 +3429,9 @@ void v30mz_cpu_device::execute_run()
case 0xf6: // i_f6pre
{
- UINT32 tmp;
- UINT32 uresult,uresult2;
- INT32 result,result2;
+ uint32_t tmp;
+ uint32_t uresult,uresult2;
+ int32_t result,result2;
m_modrm = fetch();
tmp = GetRMByte();
@@ -3459,13 +3459,13 @@ void v30mz_cpu_device::execute_run()
break;
case 0x20: /* MULU */
uresult = m_regs.b[AL] * tmp;
- m_regs.w[AW] = (UINT16)uresult;
+ m_regs.w[AW] = (uint16_t)uresult;
m_CarryVal = m_OverVal = (m_regs.b[AH]!=0) ? 1 : 0;
CLKM(3,4);
break;
case 0x28: /* MUL */
- result = (INT16)((INT8)m_regs.b[AL])*(INT16)((INT8)tmp);
- m_regs.w[AW] = (UINT16)result;
+ result = (int16_t)((int8_t)m_regs.b[AL])*(int16_t)((int8_t)tmp);
+ m_regs.w[AW] = (uint16_t)result;
m_CarryVal = m_OverVal = (m_regs.b[AH]!=0) ? 1 : 0;
CLKM(3,4);
break;
@@ -3493,9 +3493,9 @@ void v30mz_cpu_device::execute_run()
case 0x38: /* DIV */
if (tmp)
{
- result = (INT16)m_regs.w[AW];
- result2 = result % (INT16)((INT8)tmp);
- if ((result /= (INT16)((INT8)tmp)) > 0xff)
+ result = (int16_t)m_regs.w[AW];
+ result2 = result % (int16_t)((int8_t)tmp);
+ if ((result /= (int16_t)((int8_t)tmp)) > 0xff)
{
interrupt(0);
}
@@ -3518,9 +3518,9 @@ void v30mz_cpu_device::execute_run()
case 0xf7: // i_f7pre
{
- UINT32 tmp,tmp2;
- UINT32 uresult,uresult2;
- INT32 result,result2;
+ uint32_t tmp,tmp2;
+ uint32_t uresult,uresult2;
+ int32_t result,result2;
m_modrm = fetch();
tmp = GetRMWord();
@@ -3550,12 +3550,12 @@ void v30mz_cpu_device::execute_run()
case 0x20: /* MULU */
uresult = m_regs.w[AW]*tmp;
m_regs.w[AW] = uresult & 0xffff;
- m_regs.w[DW] = ((UINT32)uresult)>>16;
+ m_regs.w[DW] = ((uint32_t)uresult)>>16;
m_CarryVal = m_OverVal = (m_regs.w[DW] != 0) ? 1 : 0;
CLKM(3,4);
break;
case 0x28: /* MUL */
- result = (INT32)((INT16)m_regs.w[AW]) * (INT32)((INT16)tmp);
+ result = (int32_t)((int16_t)m_regs.w[AW]) * (int32_t)((int16_t)tmp);
m_regs.w[AW] = result & 0xffff;
m_regs.w[DW] = result >> 16;
m_CarryVal = m_OverVal = (m_regs.w[DW] != 0) ? 1 : 0;
@@ -3564,7 +3564,7 @@ void v30mz_cpu_device::execute_run()
case 0x30: /* DIVU */
if (tmp)
{
- uresult = (((UINT32)m_regs.w[DW]) << 16) | m_regs.w[AW];
+ uresult = (((uint32_t)m_regs.w[DW]) << 16) | m_regs.w[AW];
uresult2 = uresult % tmp;
if ((uresult /= tmp) > 0xffff)
{
@@ -3585,9 +3585,9 @@ void v30mz_cpu_device::execute_run()
case 0x38: /* DIV */
if (tmp)
{
- result = ((UINT32)m_regs.w[DW] << 16) + m_regs.w[AW];
- result2 = result % (INT32)((INT16)tmp);
- if ((result /= (INT32)((INT16)tmp)) > 0xffff)
+ result = ((uint32_t)m_regs.w[DW] << 16) + m_regs.w[AW];
+ result2 = result % (int32_t)((int16_t)tmp);
+ if ((result /= (int32_t)((int16_t)tmp)) > 0xffff)
{
interrupt(0);
}
@@ -3640,7 +3640,7 @@ void v30mz_cpu_device::execute_run()
case 0xfe: // i_fepre
{
- UINT32 tmp, tmp1;
+ uint32_t tmp, tmp1;
m_modrm = fetch();
tmp = GetRMByte();
switch ( m_modrm & 0x38 )
@@ -3670,7 +3670,7 @@ void v30mz_cpu_device::execute_run()
case 0xff: // i_ffpre
{
- UINT32 tmp, tmp1;
+ uint32_t tmp, tmp1;
m_modrm = fetch();
tmp = GetRMWord();
switch ( m_modrm & 0x38 )
diff --git a/src/devices/cpu/v30mz/v30mz.h b/src/devices/cpu/v30mz/v30mz.h
index 6ba07800b9e..db0e0a3ca22 100644
--- a/src/devices/cpu/v30mz/v30mz.h
+++ b/src/devices/cpu/v30mz/v30mz.h
@@ -6,7 +6,7 @@
struct nec_config
{
- const UINT8* v25v35_decryptiontable; // internal decryption table
+ const uint8_t* v25v35_decryptiontable; // internal decryption table
};
enum
@@ -26,7 +26,7 @@ class v30mz_cpu_device : public cpu_device
{
public:
// construction/destruction
- v30mz_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v30mz_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -34,9 +34,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 80; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 80; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -47,50 +47,50 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 7; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 7; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
void interrupt(int int_num);
- inline UINT32 pc();
+ inline uint32_t pc();
// Accessing memory and io
- inline UINT8 read_byte(UINT32 addr);
- inline UINT16 read_word(UINT32 addr);
- inline void write_byte(UINT32 addr, UINT8 data);
- inline void write_word(UINT32 addr, UINT16 data);
- inline UINT8 read_port(UINT16 port);
- inline void write_port(UINT16 port, UINT8 data);
+ inline uint8_t read_byte(uint32_t addr);
+ inline uint16_t read_word(uint32_t addr);
+ inline void write_byte(uint32_t addr, uint8_t data);
+ inline void write_word(uint32_t addr, uint16_t data);
+ inline uint8_t read_port(uint16_t port);
+ inline void write_port(uint16_t port, uint8_t data);
// Executing instructions
- inline UINT8 fetch_op();
- inline UINT8 fetch();
- inline UINT16 fetch_word();
- inline UINT8 repx_op();
+ inline uint8_t fetch_op();
+ inline uint8_t fetch();
+ inline uint16_t fetch_word();
+ inline uint8_t repx_op();
// Cycles passed while executing instructions
- inline void CLK(UINT32 cycles);
- inline void CLKM(UINT32 cycles_reg, UINT32 cycles_mem);
+ inline void CLK(uint32_t cycles);
+ inline void CLKM(uint32_t cycles_reg, uint32_t cycles_mem);
// Memory handling while executing instructions
- inline UINT32 default_base(int seg);
- inline UINT32 get_ea();
- inline void PutbackRMByte(UINT8 data);
- inline void PutbackRMWord(UINT16 data);
- inline void RegByte(UINT8 data);
- inline void RegWord(UINT16 data);
- inline UINT8 RegByte();
- inline UINT16 RegWord();
- inline UINT16 GetRMWord();
- inline UINT16 GetnextRMWord();
- inline UINT8 GetRMByte();
- inline void PutMemB(int seg, UINT16 offset, UINT8 data);
- inline void PutMemW(int seg, UINT16 offset, UINT16 data);
- inline UINT8 GetMemB(int seg, UINT16 offset);
- inline UINT16 GetMemW(int seg, UINT16 offset);
+ inline uint32_t default_base(int seg);
+ inline uint32_t get_ea();
+ inline void PutbackRMByte(uint8_t data);
+ inline void PutbackRMWord(uint16_t data);
+ inline void RegByte(uint8_t data);
+ inline void RegWord(uint16_t data);
+ inline uint8_t RegByte();
+ inline uint16_t RegWord();
+ inline uint16_t GetRMWord();
+ inline uint16_t GetnextRMWord();
+ inline uint8_t GetRMByte();
+ inline void PutMemB(int seg, uint16_t offset, uint8_t data);
+ inline void PutMemW(int seg, uint16_t offset, uint16_t data);
+ inline uint8_t GetMemB(int seg, uint16_t offset);
+ inline uint16_t GetMemW(int seg, uint16_t offset);
inline void PutImmRMWord();
- inline void PutRMWord(UINT16 val);
- inline void PutRMByte(UINT8 val);
+ inline void PutRMWord(uint16_t val);
+ inline void PutRMByte(uint8_t val);
inline void PutImmRMByte();
inline void DEF_br8();
inline void DEF_wr16();
@@ -100,20 +100,20 @@ protected:
inline void DEF_axd16();
// Flags
- inline void set_CFB(UINT32 x);
- inline void set_CFW(UINT32 x);
- inline void set_AF(UINT32 x,UINT32 y,UINT32 z);
- inline void set_SF(UINT32 x);
- inline void set_ZF(UINT32 x);
- inline void set_PF(UINT32 x);
- inline void set_SZPF_Byte(UINT32 x);
- inline void set_SZPF_Word(UINT32 x);
- inline void set_OFW_Add(UINT32 x,UINT32 y,UINT32 z);
- inline void set_OFB_Add(UINT32 x,UINT32 y,UINT32 z);
- inline void set_OFW_Sub(UINT32 x,UINT32 y,UINT32 z);
- inline void set_OFB_Sub(UINT32 x,UINT32 y,UINT32 z);
- inline UINT16 CompressFlags() const;
- inline void ExpandFlags(UINT16 f);
+ inline void set_CFB(uint32_t x);
+ inline void set_CFW(uint32_t x);
+ inline void set_AF(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_SF(uint32_t x);
+ inline void set_ZF(uint32_t x);
+ inline void set_PF(uint32_t x);
+ inline void set_SZPF_Byte(uint32_t x);
+ inline void set_SZPF_Word(uint32_t x);
+ inline void set_OFW_Add(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_OFB_Add(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_OFW_Sub(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_OFB_Sub(uint32_t x,uint32_t y,uint32_t z);
+ inline uint16_t CompressFlags() const;
+ inline void ExpandFlags(uint16_t f);
// rep instructions
inline void i_insb();
@@ -151,20 +151,20 @@ protected:
inline void ROLC_WORD();
inline void RORC_BYTE();
inline void RORC_WORD();
- inline void SHL_BYTE(UINT8 c);
- inline void SHL_WORD(UINT8 c);
- inline void SHR_BYTE(UINT8 c);
- inline void SHR_WORD(UINT8 c);
- inline void SHRA_BYTE(UINT8 c);
- inline void SHRA_WORD(UINT8 c);
- inline void XchgAWReg(UINT8 reg);
- inline void IncWordReg(UINT8 reg);
- inline void DecWordReg(UINT8 reg);
- inline void PUSH(UINT16 data);
- inline UINT16 POP();
+ inline void SHL_BYTE(uint8_t c);
+ inline void SHL_WORD(uint8_t c);
+ inline void SHR_BYTE(uint8_t c);
+ inline void SHR_WORD(uint8_t c);
+ inline void SHRA_BYTE(uint8_t c);
+ inline void SHRA_WORD(uint8_t c);
+ inline void XchgAWReg(uint8_t reg);
+ inline void IncWordReg(uint8_t reg);
+ inline void DecWordReg(uint8_t reg);
+ inline void PUSH(uint16_t data);
+ inline uint16_t POP();
inline void JMP(bool cond);
- inline void ADJ4(INT8 param1, INT8 param2);
- inline void ADJB(INT8 param1, INT8 param2);
+ inline void ADJ4(int8_t param1, int8_t param2);
+ inline void ADJB(int8_t param1, int8_t param2);
protected:
address_space_config m_program_config;
@@ -172,44 +172,44 @@ protected:
union
{ /* eight general registers */
- UINT16 w[8]; /* viewed as 16 bits registers */
- UINT8 b[16]; /* or as 8 bit registers */
+ uint16_t w[8]; /* viewed as 16 bits registers */
+ uint8_t b[16]; /* or as 8 bit registers */
} m_regs;
- UINT16 m_sregs[4];
+ uint16_t m_sregs[4];
- UINT16 m_ip;
+ uint16_t m_ip;
- INT32 m_SignVal;
- UINT32 m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
- UINT8 m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */ /* OB[19.07.99] added Mode Flag V30 */
- UINT32 m_int_vector;
- UINT32 m_pending_irq;
- UINT32 m_nmi_state;
- UINT32 m_irq_state;
- UINT8 m_no_interrupt;
- UINT8 m_fire_trap;
+ int32_t m_SignVal;
+ uint32_t m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
+ uint8_t m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */ /* OB[19.07.99] added Mode Flag V30 */
+ uint32_t m_int_vector;
+ uint32_t m_pending_irq;
+ uint32_t m_nmi_state;
+ uint32_t m_irq_state;
+ uint8_t m_no_interrupt;
+ uint8_t m_fire_trap;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
int m_icount;
- UINT32 m_prefix_base; /* base address of the latest prefix segment */
+ uint32_t m_prefix_base; /* base address of the latest prefix segment */
bool m_seg_prefix; /* prefix segment indicator */
bool m_seg_prefix_next; /* prefix segment for next instruction */
- UINT32 m_ea;
- UINT16 m_eo;
- UINT16 m_e16;
+ uint32_t m_ea;
+ uint16_t m_eo;
+ uint16_t m_e16;
// Used during execution of instructions
- UINT8 m_modrm;
- UINT32 m_dst;
- UINT32 m_src;
- UINT32 m_pc;
+ uint8_t m_modrm;
+ uint32_t m_dst;
+ uint32_t m_src;
+ uint32_t m_pc;
// Lookup tables
- UINT8 m_parity_table[256];
+ uint8_t m_parity_table[256];
struct {
struct {
int w[256];
diff --git a/src/devices/cpu/v60/am.hxx b/src/devices/cpu/v60/am.hxx
index 0432350788d..4ec2e72db85 100644
--- a/src/devices/cpu/v60/am.hxx
+++ b/src/devices/cpu/v60/am.hxx
@@ -23,14 +23,14 @@
amLength
*/
-UINT32 v60_device::ReadAM()
+uint32_t v60_device::ReadAM()
{
m_modm = m_modm?1:0;
m_modval = OpRead8(m_modadd);
return (this->*s_AMTable1[m_modm][m_modval >> 5])();
}
-UINT32 v60_device::BitReadAM()
+uint32_t v60_device::BitReadAM()
{
m_modm = m_modm?1:0;
m_modval = OpRead8(m_modadd);
@@ -50,14 +50,14 @@ UINT32 v60_device::BitReadAM()
amLength
*/
-UINT32 v60_device::ReadAMAddress()
+uint32_t v60_device::ReadAMAddress()
{
m_modm = m_modm?1:0;
m_modval = OpRead8(m_modadd);
return (this->*s_AMTable2[m_modm][m_modval >> 5])();
}
-UINT32 v60_device::BitReadAMAddress()
+uint32_t v60_device::BitReadAMAddress()
{
m_modm = m_modm?1:0;
m_modval = OpRead8(m_modadd);
@@ -75,7 +75,7 @@ UINT32 v60_device::BitReadAMAddress()
amLength
*/
-UINT32 v60_device::WriteAM()
+uint32_t v60_device::WriteAM()
{
m_modm = m_modm?1:0;
m_modval = OpRead8(m_modadd);
diff --git a/src/devices/cpu/v60/am1.hxx b/src/devices/cpu/v60/am1.hxx
index cc5e0f4a1fd..50d1e429a4a 100644
--- a/src/devices/cpu/v60/am1.hxx
+++ b/src/devices/cpu/v60/am1.hxx
@@ -3,15 +3,15 @@
// AM1 Functions (for ReadAM)
// **************************
-UINT32 v60_device::am1Register()
+uint32_t v60_device::am1Register()
{
switch (m_moddim)
{
case 0:
- m_amout = (UINT8)m_reg[m_modval & 0x1F];
+ m_amout = (uint8_t)m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = (UINT16)m_reg[m_modval & 0x1F];
+ m_amout = (uint16_t)m_reg[m_modval & 0x1F];
break;
case 2:
m_amout = m_reg[m_modval & 0x1F];
@@ -21,7 +21,7 @@ UINT32 v60_device::am1Register()
return 1;
}
-UINT32 v60_device::am1RegisterIndirect()
+uint32_t v60_device::am1RegisterIndirect()
{
switch (m_moddim)
{
@@ -39,14 +39,14 @@ UINT32 v60_device::am1RegisterIndirect()
return 1;
}
-UINT32 v60_device::bam1RegisterIndirect()
+uint32_t v60_device::bam1RegisterIndirect()
{
m_bamoffset = 0;
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F]);
return 1;
}
-UINT32 v60_device::am1RegisterIndirectIndexed()
+uint32_t v60_device::am1RegisterIndirectIndexed()
{
switch (m_moddim)
{
@@ -64,7 +64,7 @@ UINT32 v60_device::am1RegisterIndirectIndexed()
return 2;
}
-UINT32 v60_device::bam1RegisterIndirectIndexed()
+uint32_t v60_device::bam1RegisterIndirectIndexed()
{
m_bamoffset = m_reg[m_modval & 0x1F];
m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + m_bamoffset / 8);
@@ -72,7 +72,7 @@ UINT32 v60_device::bam1RegisterIndirectIndexed()
return 2;
}
-UINT32 v60_device::am1Autoincrement()
+uint32_t v60_device::am1Autoincrement()
{
switch (m_moddim)
{
@@ -93,7 +93,7 @@ UINT32 v60_device::am1Autoincrement()
return 1;
}
-UINT32 v60_device::bam1Autoincrement()
+uint32_t v60_device::bam1Autoincrement()
{
m_bamoffset = 0;
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F]);
@@ -112,7 +112,7 @@ UINT32 v60_device::bam1Autoincrement()
return 1;
}
-UINT32 v60_device::am1Autodecrement()
+uint32_t v60_device::am1Autodecrement()
{
switch (m_moddim)
{
@@ -133,7 +133,7 @@ UINT32 v60_device::am1Autodecrement()
return 1;
}
-UINT32 v60_device::bam1Autodecrement()
+uint32_t v60_device::bam1Autodecrement()
{
m_bamoffset = 0;
switch (m_moddim)
@@ -152,25 +152,25 @@ UINT32 v60_device::bam1Autodecrement()
return 1;
}
-UINT32 v60_device::am1Displacement8()
+uint32_t v60_device::am1Displacement8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_byte(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_word_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1));
break;
}
return 2;
}
-UINT32 v60_device::bam1Displacement8()
+uint32_t v60_device::bam1Displacement8()
{
m_bamoffset = m_program->read_byte(m_modadd + 1);
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + m_bamoffset / 8);
@@ -179,25 +179,25 @@ UINT32 v60_device::bam1Displacement8()
}
-UINT32 v60_device::am1Displacement16()
+uint32_t v60_device::am1Displacement16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_byte(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_word_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1));
break;
}
return 3;
}
-UINT32 v60_device::bam1Displacement16()
+uint32_t v60_device::bam1Displacement16()
{
m_bamoffset = OpRead16(m_modadd + 1);
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + m_bamoffset / 8);
@@ -205,7 +205,7 @@ UINT32 v60_device::bam1Displacement16()
return 3;
}
-UINT32 v60_device::am1Displacement32()
+uint32_t v60_device::am1Displacement32()
{
switch (m_moddim)
{
@@ -223,7 +223,7 @@ UINT32 v60_device::am1Displacement32()
return 5;
}
-UINT32 v60_device::bam1Displacement32()
+uint32_t v60_device::bam1Displacement32()
{
m_bamoffset = OpRead32(m_modadd + 1);
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + m_bamoffset / 8);
@@ -231,59 +231,59 @@ UINT32 v60_device::bam1Displacement32()
return 5;
}
-UINT32 v60_device::am1DisplacementIndexed8()
+uint32_t v60_device::am1DisplacementIndexed8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F]);
+ m_amout = m_program->read_byte(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F]);
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2);
+ m_amout = m_program->read_word_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2);
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4);
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4);
break;
}
return 3;
}
-UINT32 v60_device::bam1DisplacementIndexed8()
+uint32_t v60_device::bam1DisplacementIndexed8()
{
m_bamoffset = m_reg[m_modval & 0x1F];
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_bamoffset / 8);
m_bamoffset&=7;
return 3;
}
-UINT32 v60_device::am1DisplacementIndexed16()
+uint32_t v60_device::am1DisplacementIndexed16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F]);
+ m_amout = m_program->read_byte(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F]);
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2);
+ m_amout = m_program->read_word_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2);
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4);
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4);
break;
}
return 4;
}
-UINT32 v60_device::bam1DisplacementIndexed16()
+uint32_t v60_device::bam1DisplacementIndexed16()
{
m_bamoffset = m_reg[m_modval & 0x1F];
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_bamoffset / 8);
m_bamoffset&=7;
return 4;
}
-UINT32 v60_device::am1DisplacementIndexed32()
+uint32_t v60_device::am1DisplacementIndexed32()
{
switch (m_moddim)
{
@@ -301,7 +301,7 @@ UINT32 v60_device::am1DisplacementIndexed32()
return 6;
}
-UINT32 v60_device::bam1DisplacementIndexed32()
+uint32_t v60_device::bam1DisplacementIndexed32()
{
m_bamoffset = m_reg[m_modval & 0x1F];
m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + OpRead32(m_modadd + 2) + m_bamoffset / 8);
@@ -310,25 +310,25 @@ UINT32 v60_device::bam1DisplacementIndexed32()
}
-UINT32 v60_device::am1PCDisplacement8()
+uint32_t v60_device::am1PCDisplacement8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(PC + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_byte(PC + (int8_t)OpRead8(m_modadd + 1));
break;
case 1:
- m_amout = m_program->read_word_unaligned(PC + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_word_unaligned(PC + (int8_t)OpRead8(m_modadd + 1));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1));
break;
}
return 2;
}
-UINT32 v60_device::bam1PCDisplacement8()
+uint32_t v60_device::bam1PCDisplacement8()
{
m_bamoffset = OpRead8(m_modadd + 1);
m_amout = m_program->read_dword_unaligned(PC + m_bamoffset / 8);
@@ -336,25 +336,25 @@ UINT32 v60_device::bam1PCDisplacement8()
return 2;
}
-UINT32 v60_device::am1PCDisplacement16()
+uint32_t v60_device::am1PCDisplacement16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(PC + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_byte(PC + (int16_t)OpRead16(m_modadd + 1));
break;
case 1:
- m_amout = m_program->read_word_unaligned(PC + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_word_unaligned(PC + (int16_t)OpRead16(m_modadd + 1));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1));
break;
}
return 3;
}
-UINT32 v60_device::bam1PCDisplacement16()
+uint32_t v60_device::bam1PCDisplacement16()
{
m_bamoffset = OpRead16(m_modadd + 1);
m_amout = m_program->read_dword_unaligned(PC + m_bamoffset / 8);
@@ -362,7 +362,7 @@ UINT32 v60_device::bam1PCDisplacement16()
return 3;
}
-UINT32 v60_device::am1PCDisplacement32()
+uint32_t v60_device::am1PCDisplacement32()
{
switch (m_moddim)
{
@@ -380,7 +380,7 @@ UINT32 v60_device::am1PCDisplacement32()
return 5;
}
-UINT32 v60_device::bam1PCDisplacement32()
+uint32_t v60_device::bam1PCDisplacement32()
{
m_bamoffset = OpRead32(m_modadd + 1);
m_amout = m_program->read_dword_unaligned(PC + m_bamoffset / 8);
@@ -388,60 +388,60 @@ UINT32 v60_device::bam1PCDisplacement32()
return 5;
}
-UINT32 v60_device::am1PCDisplacementIndexed8()
+uint32_t v60_device::am1PCDisplacementIndexed8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F]);
+ m_amout = m_program->read_byte(PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F]);
break;
case 1:
- m_amout = m_program->read_word_unaligned(PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2);
+ m_amout = m_program->read_word_unaligned(PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2);
break;
case 2:
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4);
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4);
break;
}
return 3;
}
-UINT32 v60_device::bam1PCDisplacementIndexed8()
+uint32_t v60_device::bam1PCDisplacementIndexed8()
{
m_bamoffset = m_reg[m_modval & 0x1F];
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2) + m_bamoffset / 8);
m_bamoffset&=7;
return 3;
}
-UINT32 v60_device::am1PCDisplacementIndexed16()
+uint32_t v60_device::am1PCDisplacementIndexed16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F]);
+ m_amout = m_program->read_byte(PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F]);
break;
case 1:
- m_amout = m_program->read_word_unaligned(PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2);
+ m_amout = m_program->read_word_unaligned(PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2);
break;
case 2:
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4);
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4);
break;
}
return 4;
}
-UINT32 v60_device::bam1PCDisplacementIndexed16()
+uint32_t v60_device::bam1PCDisplacementIndexed16()
{
m_bamoffset = m_reg[m_modval & 0x1F];
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2) + m_bamoffset / 8);
m_bamoffset&=7;
return 4;
}
-UINT32 v60_device::am1PCDisplacementIndexed32()
+uint32_t v60_device::am1PCDisplacementIndexed32()
{
switch (m_moddim)
{
@@ -459,7 +459,7 @@ UINT32 v60_device::am1PCDisplacementIndexed32()
return 6;
}
-UINT32 v60_device::bam1PCDisplacementIndexed32()
+uint32_t v60_device::bam1PCDisplacementIndexed32()
{
m_bamoffset = m_reg[m_modval & 0x1F];
m_amout = m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 2) + m_bamoffset / 8);
@@ -467,57 +467,57 @@ UINT32 v60_device::bam1PCDisplacementIndexed32()
return 6;
}
-UINT32 v60_device::am1DisplacementIndirect8()
+uint32_t v60_device::am1DisplacementIndirect8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)));
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)));
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)));
break;
}
return 2;
}
-UINT32 v60_device::bam1DisplacementIndirect8()
+uint32_t v60_device::bam1DisplacementIndirect8()
{
m_bamoffset = 0;
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)));
return 2;
}
-UINT32 v60_device::am1DisplacementIndirect16()
+uint32_t v60_device::am1DisplacementIndirect16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)));
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)));
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)));
break;
}
return 3;
}
-UINT32 v60_device::bam1DisplacementIndirect16()
+uint32_t v60_device::bam1DisplacementIndirect16()
{
m_bamoffset = 0;
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)));
return 3;
}
-UINT32 v60_device::am1DisplacementIndirect32()
+uint32_t v60_device::am1DisplacementIndirect32()
{
switch (m_moddim)
{
@@ -535,66 +535,66 @@ UINT32 v60_device::am1DisplacementIndirect32()
return 5;
}
-UINT32 v60_device::bam1DisplacementIndirect32()
+uint32_t v60_device::bam1DisplacementIndirect32()
{
m_bamoffset = 0;
m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + OpRead32(m_modadd + 1)));
return 5;
}
-UINT32 v60_device::am1DisplacementIndirectIndexed8()
+uint32_t v60_device::am1DisplacementIndirectIndexed8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F]);
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F]);
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2);
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2);
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4);
break;
}
return 3;
}
-UINT32 v60_device::bam1DisplacementIndirectIndexed8()
+uint32_t v60_device::bam1DisplacementIndirectIndexed8()
{
m_bamoffset = m_reg[m_modval & 0x1F];
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_bamoffset / 8);
m_bamoffset&=7;
return 3;
}
-UINT32 v60_device::am1DisplacementIndirectIndexed16()
+uint32_t v60_device::am1DisplacementIndirectIndexed16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F]);
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F]);
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2);
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2);
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4);
break;
}
return 4;
}
-UINT32 v60_device::bam1DisplacementIndirectIndexed16()
+uint32_t v60_device::bam1DisplacementIndirectIndexed16()
{
m_bamoffset = m_reg[m_modval & 0x1F];
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_bamoffset / 8);
m_bamoffset&=7;
return 4;
}
-UINT32 v60_device::am1DisplacementIndirectIndexed32()
+uint32_t v60_device::am1DisplacementIndirectIndexed32()
{
switch (m_moddim)
{
@@ -612,7 +612,7 @@ UINT32 v60_device::am1DisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::bam1DisplacementIndirectIndexed32()
+uint32_t v60_device::bam1DisplacementIndirectIndexed32()
{
m_bamoffset = m_reg[m_modval & 0x1F];
m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + OpRead32(m_modadd + 2)) + m_bamoffset / 8);
@@ -620,57 +620,57 @@ UINT32 v60_device::bam1DisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::am1PCDisplacementIndirect8()
+uint32_t v60_device::am1PCDisplacementIndirect8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)));
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)));
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)));
break;
}
return 2;
}
-UINT32 v60_device::bam1PCDisplacementIndirect8()
+uint32_t v60_device::bam1PCDisplacementIndirect8()
{
m_bamoffset = 0;
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)));
return 2;
}
-UINT32 v60_device::am1PCDisplacementIndirect16()
+uint32_t v60_device::am1PCDisplacementIndirect16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)));
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)));
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)));
break;
}
return 3;
}
-UINT32 v60_device::bam1PCDisplacementIndirect16()
+uint32_t v60_device::bam1PCDisplacementIndirect16()
{
m_bamoffset = 0;
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)));
return 3;
}
-UINT32 v60_device::am1PCDisplacementIndirect32()
+uint32_t v60_device::am1PCDisplacementIndirect32()
{
switch (m_moddim)
{
@@ -688,66 +688,66 @@ UINT32 v60_device::am1PCDisplacementIndirect32()
return 5;
}
-UINT32 v60_device::bam1PCDisplacementIndirect32()
+uint32_t v60_device::bam1PCDisplacementIndirect32()
{
m_bamoffset = 0;
m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 1)));
return 5;
}
-UINT32 v60_device::am1PCDisplacementIndirectIndexed8()
+uint32_t v60_device::am1PCDisplacementIndirectIndexed8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F]);
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F]);
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2);
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2);
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4);
break;
}
return 3;
}
-UINT32 v60_device::bam1PCDisplacementIndirectIndexed8()
+uint32_t v60_device::bam1PCDisplacementIndirectIndexed8()
{
m_bamoffset = m_reg[m_modval & 0x1F];
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_bamoffset / 8);
m_bamoffset&=7;
return 3;
}
-UINT32 v60_device::am1PCDisplacementIndirectIndexed16()
+uint32_t v60_device::am1PCDisplacementIndirectIndexed16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F]);
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F]);
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2);
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2);
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4);
break;
}
return 4;
}
-UINT32 v60_device::bam1PCDisplacementIndirectIndexed16()
+uint32_t v60_device::bam1PCDisplacementIndirectIndexed16()
{
m_bamoffset = m_reg[m_modval & 0x1F];
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_bamoffset / 8);
m_bamoffset&=7;
return 4;
}
-UINT32 v60_device::am1PCDisplacementIndirectIndexed32()
+uint32_t v60_device::am1PCDisplacementIndirectIndexed32()
{
switch (m_moddim)
{
@@ -765,7 +765,7 @@ UINT32 v60_device::am1PCDisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::bam1PCDisplacementIndirectIndexed32()
+uint32_t v60_device::bam1PCDisplacementIndirectIndexed32()
{
m_bamoffset = m_reg[m_modval & 0x1F];
m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 2)) + m_bamoffset / 8);
@@ -773,63 +773,63 @@ UINT32 v60_device::bam1PCDisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::am1DoubleDisplacement8()
+uint32_t v60_device::am1DoubleDisplacement8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2));
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2));
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2));
break;
}
return 3;
}
-UINT32 v60_device::bam1DoubleDisplacement8()
+uint32_t v60_device::bam1DoubleDisplacement8()
{
m_bamoffset = OpRead8(m_modadd + 2);
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)) + m_bamoffset / 8);
m_bamoffset&=7;
return 3;
}
-UINT32 v60_device::am1DoubleDisplacement16()
+uint32_t v60_device::am1DoubleDisplacement16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3));
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3));
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3));
break;
}
return 5;
}
-UINT32 v60_device::bam1DoubleDisplacement16()
+uint32_t v60_device::bam1DoubleDisplacement16()
{
m_bamoffset = OpRead16(m_modadd + 3);
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)) + m_bamoffset / 8);
m_bamoffset&=7;
return 5;
}
-UINT32 v60_device::am1DoubleDisplacement32()
+uint32_t v60_device::am1DoubleDisplacement32()
{
switch (m_moddim)
{
@@ -849,7 +849,7 @@ UINT32 v60_device::am1DoubleDisplacement32()
return 9;
}
-UINT32 v60_device::bam1DoubleDisplacement32()
+uint32_t v60_device::bam1DoubleDisplacement32()
{
m_bamoffset = OpRead32(m_modadd + 5);
m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + OpRead32(m_modadd + 1)) + m_bamoffset / 8);
@@ -857,64 +857,64 @@ UINT32 v60_device::bam1DoubleDisplacement32()
return 9;
}
-UINT32 v60_device::am1PCDoubleDisplacement8()
+uint32_t v60_device::am1PCDoubleDisplacement8()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2));
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2));
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2));
break;
}
return 3;
}
-UINT32 v60_device::bam1PCDoubleDisplacement8()
+uint32_t v60_device::bam1PCDoubleDisplacement8()
{
m_bamoffset = OpRead8(m_modadd + 2);
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)) + m_bamoffset / 8);
m_bamoffset&=7;
return 3;
}
-UINT32 v60_device::am1PCDoubleDisplacement16()
+uint32_t v60_device::am1PCDoubleDisplacement16()
{
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3));
+ m_amout = m_program->read_byte(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3));
break;
case 1:
- m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3));
+ m_amout = m_program->read_word_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3));
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3));
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3));
break;
}
return 5;
}
-UINT32 v60_device::bam1PCDoubleDisplacement16()
+uint32_t v60_device::bam1PCDoubleDisplacement16()
{
m_bamoffset = OpRead16(m_modadd + 3);
- m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)) + m_bamoffset / 8);
+ m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)) + m_bamoffset / 8);
m_bamoffset&=7;
return 5;
}
-UINT32 v60_device::am1PCDoubleDisplacement32()
+uint32_t v60_device::am1PCDoubleDisplacement32()
{
switch (m_moddim)
{
@@ -934,7 +934,7 @@ UINT32 v60_device::am1PCDoubleDisplacement32()
return 9;
}
-UINT32 v60_device::bam1PCDoubleDisplacement32()
+uint32_t v60_device::bam1PCDoubleDisplacement32()
{
m_bamoffset = OpRead32(m_modadd + 5);
m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 1)) + m_bamoffset / 8);
@@ -942,7 +942,7 @@ UINT32 v60_device::bam1PCDoubleDisplacement32()
return 9;
}
-UINT32 v60_device::am1DirectAddress()
+uint32_t v60_device::am1DirectAddress()
{
switch (m_moddim)
{
@@ -962,14 +962,14 @@ UINT32 v60_device::am1DirectAddress()
return 5;
}
-UINT32 v60_device::bam1DirectAddress()
+uint32_t v60_device::bam1DirectAddress()
{
m_bamoffset = 0;
m_amout = m_program->read_dword_unaligned(OpRead32(m_modadd + 1));
return 5;
}
-UINT32 v60_device::am1DirectAddressIndexed()
+uint32_t v60_device::am1DirectAddressIndexed()
{
switch (m_moddim)
{
@@ -989,7 +989,7 @@ UINT32 v60_device::am1DirectAddressIndexed()
return 6;
}
-UINT32 v60_device::bam1DirectAddressIndexed()
+uint32_t v60_device::bam1DirectAddressIndexed()
{
m_bamoffset = m_reg[m_modval & 0x1F];
m_amout = m_program->read_dword_unaligned(OpRead32(m_modadd + 2) + m_bamoffset / 8);
@@ -997,7 +997,7 @@ UINT32 v60_device::bam1DirectAddressIndexed()
return 6;
}
-UINT32 v60_device::am1DirectAddressDeferred()
+uint32_t v60_device::am1DirectAddressDeferred()
{
switch (m_moddim)
{
@@ -1017,14 +1017,14 @@ UINT32 v60_device::am1DirectAddressDeferred()
return 5;
}
-UINT32 v60_device::bam1DirectAddressDeferred()
+uint32_t v60_device::bam1DirectAddressDeferred()
{
m_bamoffset = 0;
m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(OpRead32(m_modadd + 1)));
return 5;
}
-UINT32 v60_device::am1DirectAddressDeferredIndexed()
+uint32_t v60_device::am1DirectAddressDeferredIndexed()
{
switch (m_moddim)
{
@@ -1044,7 +1044,7 @@ UINT32 v60_device::am1DirectAddressDeferredIndexed()
return 6;
}
-UINT32 v60_device::bam1DirectAddressDeferredIndexed()
+uint32_t v60_device::bam1DirectAddressDeferredIndexed()
{
m_bamoffset = m_reg[m_modval & 0x1F];
m_amout = m_program->read_dword_unaligned(m_program->read_dword_unaligned(OpRead32(m_modadd + 2)) + m_bamoffset / 8);
@@ -1052,7 +1052,7 @@ UINT32 v60_device::bam1DirectAddressDeferredIndexed()
return 6;
}
-UINT32 v60_device::am1Immediate()
+uint32_t v60_device::am1Immediate()
{
switch (m_moddim)
{
@@ -1074,7 +1074,7 @@ UINT32 v60_device::am1Immediate()
return 1;
}
-UINT32 v60_device::am1ImmediateQuick()
+uint32_t v60_device::am1ImmediateQuick()
{
m_amout = m_modval & 0xF;
return 1;
@@ -1086,69 +1086,69 @@ UINT32 v60_device::am1ImmediateQuick()
// AM1 Tables (for ReadAM)
// ***********************
-UINT32 v60_device::am1Error1()
+uint32_t v60_device::am1Error1()
{
fatalerror("CPU - AM1 - 1 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam1Error1()
+uint32_t v60_device::bam1Error1()
{
fatalerror("CPU - BAM1 - 1 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::am1Error2()
+uint32_t v60_device::am1Error2()
{
fatalerror("CPU - AM1 - 2 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam1Error2()
+uint32_t v60_device::bam1Error2()
{
fatalerror("CPU - BAM1 - 2 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
#ifdef UNUSED_FUNCTION
-UINT32 v60_device::am1Error3()
+uint32_t v60_device::am1Error3()
{
fatalerror("CPU - AM1 - 3 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam1Error3()
+uint32_t v60_device::bam1Error3()
{
fatalerror("CPU - BAM1 - 3 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
#endif
-UINT32 v60_device::am1Error4()
+uint32_t v60_device::am1Error4()
{
fatalerror("CPU - AM1 - 4 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam1Error4()
+uint32_t v60_device::bam1Error4()
{
fatalerror("CPU - BAM1 - 4 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::am1Error5()
+uint32_t v60_device::am1Error5()
{
fatalerror("CPU - AM1 - 5 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam1Error5()
+uint32_t v60_device::bam1Error5()
{
fatalerror("CPU - BAM1 - 5 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam1Error6()
+uint32_t v60_device::bam1Error6()
{
fatalerror("CPU - BAM1 - 6 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
@@ -1195,7 +1195,7 @@ const v60_device::am_func v60_device::s_BAMTable1_G7a[16] =
};
-UINT32 v60_device::am1Group7a()
+uint32_t v60_device::am1Group7a()
{
if (!(m_modval2 & 0x10))
return am1Error4();
@@ -1203,7 +1203,7 @@ UINT32 v60_device::am1Group7a()
return (this->*s_AMTable1_G7a[m_modval2 & 0xF])();
}
-UINT32 v60_device::bam1Group7a()
+uint32_t v60_device::bam1Group7a()
{
if (!(m_modval2 & 0x10))
return bam1Error4();
@@ -1310,25 +1310,25 @@ const v60_device::am_func v60_device::s_BAMTable1_G6[8] =
};
-UINT32 v60_device::am1Group6()
+uint32_t v60_device::am1Group6()
{
m_modval2 = OpRead8(m_modadd + 1);
return (this->*s_AMTable1_G6[m_modval2 >> 5])();
}
-UINT32 v60_device::bam1Group6()
+uint32_t v60_device::bam1Group6()
{
m_modval2 = OpRead8(m_modadd + 1);
return (this->*s_BAMTable1_G6[m_modval2 >> 5])();
}
-UINT32 v60_device::am1Group7()
+uint32_t v60_device::am1Group7()
{
return (this->*s_AMTable1_G7[m_modval & 0x1F])();
}
-UINT32 v60_device::bam1Group7()
+uint32_t v60_device::bam1Group7()
{
return (this->*s_BAMTable1_G7[m_modval & 0x1F])();
}
diff --git a/src/devices/cpu/v60/am2.hxx b/src/devices/cpu/v60/am2.hxx
index 2b01d324979..df3ce901680 100644
--- a/src/devices/cpu/v60/am2.hxx
+++ b/src/devices/cpu/v60/am2.hxx
@@ -3,21 +3,21 @@
// AM2 Functions (for ReadAMAddress)
// *********************************
-UINT32 v60_device::am2Register()
+uint32_t v60_device::am2Register()
{
m_amflag = 1;
m_amout = m_modval & 0x1F;
return 1;
}
-UINT32 v60_device::am2RegisterIndirect()
+uint32_t v60_device::am2RegisterIndirect()
{
m_amflag = 0;
m_amout = m_reg[m_modval & 0x1F];
return 1;
}
-UINT32 v60_device::bam2RegisterIndirect()
+uint32_t v60_device::bam2RegisterIndirect()
{
m_amflag = 0;
m_amout = m_reg[m_modval & 0x1F];
@@ -25,7 +25,7 @@ UINT32 v60_device::bam2RegisterIndirect()
return 1;
}
-UINT32 v60_device::am2RegisterIndirectIndexed()
+uint32_t v60_device::am2RegisterIndirectIndexed()
{
m_amflag = 0;
@@ -48,7 +48,7 @@ UINT32 v60_device::am2RegisterIndirectIndexed()
return 2;
}
-UINT32 v60_device::bam2RegisterIndirectIndexed()
+uint32_t v60_device::bam2RegisterIndirectIndexed()
{
m_amflag = 0;
m_amout = m_reg[m_modval2 & 0x1F];
@@ -56,7 +56,7 @@ UINT32 v60_device::bam2RegisterIndirectIndexed()
return 2;
}
-UINT32 v60_device::am2Autoincrement()
+uint32_t v60_device::am2Autoincrement()
{
m_amflag = 0;
m_amout = m_reg[m_modval & 0x1F];
@@ -80,7 +80,7 @@ UINT32 v60_device::am2Autoincrement()
return 1;
}
-UINT32 v60_device::bam2Autoincrement()
+uint32_t v60_device::bam2Autoincrement()
{
m_amflag = 0;
m_amout = m_reg[m_modval & 0x1F];
@@ -102,7 +102,7 @@ UINT32 v60_device::bam2Autoincrement()
return 1;
}
-UINT32 v60_device::am2Autodecrement()
+uint32_t v60_device::am2Autodecrement()
{
m_amflag = 0;
@@ -126,7 +126,7 @@ UINT32 v60_device::am2Autodecrement()
return 1;
}
-UINT32 v60_device::bam2Autodecrement()
+uint32_t v60_device::bam2Autodecrement()
{
m_amflag = 0;
m_bamoffset = 0;
@@ -149,41 +149,41 @@ UINT32 v60_device::bam2Autodecrement()
}
-UINT32 v60_device::am2Displacement8()
+uint32_t v60_device::am2Displacement8()
{
m_amflag = 0;
- m_amout = m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1);
+ m_amout = m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1);
return 2;
}
-UINT32 v60_device::bam2Displacement8()
+uint32_t v60_device::bam2Displacement8()
{
m_amflag = 0;
m_amout = m_reg[m_modval & 0x1F];
- m_bamoffset = (INT8)OpRead8(m_modadd + 1);
+ m_bamoffset = (int8_t)OpRead8(m_modadd + 1);
return 2;
}
-UINT32 v60_device::am2Displacement16()
+uint32_t v60_device::am2Displacement16()
{
m_amflag = 0;
- m_amout = m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1);
+ m_amout = m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1);
return 3;
}
-UINT32 v60_device::bam2Displacement16()
+uint32_t v60_device::bam2Displacement16()
{
m_amflag = 0;
m_amout = m_reg[m_modval & 0x1F];
- m_bamoffset = (INT16)OpRead16(m_modadd + 1);
+ m_bamoffset = (int16_t)OpRead16(m_modadd + 1);
return 3;
}
-UINT32 v60_device::am2Displacement32()
+uint32_t v60_device::am2Displacement32()
{
m_amflag = 0;
m_amout = m_reg[m_modval & 0x1F] + OpRead32(m_modadd + 1);
@@ -191,7 +191,7 @@ UINT32 v60_device::am2Displacement32()
return 5;
}
-UINT32 v60_device::bam2Displacement32()
+uint32_t v60_device::bam2Displacement32()
{
m_amflag = 0;
m_amout = m_reg[m_modval & 0x1F];
@@ -200,71 +200,71 @@ UINT32 v60_device::bam2Displacement32()
return 5;
}
-UINT32 v60_device::am2DisplacementIndexed8()
+uint32_t v60_device::am2DisplacementIndexed8()
{
m_amflag = 0;
switch (m_moddim)
{
case 0:
- m_amout = m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F];
+ m_amout = m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2;
+ m_amout = m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2;
break;
case 2:
- m_amout = m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4;
+ m_amout = m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4;
break;
case 3:
- m_amout = m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 8;
+ m_amout = m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 8;
break;
}
return 3;
}
-UINT32 v60_device::bam2DisplacementIndexed8()
+uint32_t v60_device::bam2DisplacementIndexed8()
{
m_amflag = 0;
- m_amout = m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2);
+ m_amout = m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2);
m_bamoffset = m_reg[m_modval & 0x1F];
return 3;
}
-UINT32 v60_device::am2DisplacementIndexed16()
+uint32_t v60_device::am2DisplacementIndexed16()
{
m_amflag = 0;
switch (m_moddim)
{
case 0:
- m_amout = m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F];
+ m_amout = m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2;
+ m_amout = m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2;
break;
case 2:
- m_amout = m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4;
+ m_amout = m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4;
break;
case 3:
- m_amout = m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 8;
+ m_amout = m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 8;
break;
}
return 4;
}
-UINT32 v60_device::bam2DisplacementIndexed16()
+uint32_t v60_device::bam2DisplacementIndexed16()
{
m_amflag = 0;
- m_amout = m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2);
+ m_amout = m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2);
m_bamoffset = m_reg[m_modval & 0x1F];
return 4;
}
-UINT32 v60_device::am2DisplacementIndexed32()
+uint32_t v60_device::am2DisplacementIndexed32()
{
m_amflag = 0;
@@ -287,7 +287,7 @@ UINT32 v60_device::am2DisplacementIndexed32()
return 6;
}
-UINT32 v60_device::bam2DisplacementIndexed32()
+uint32_t v60_device::bam2DisplacementIndexed32()
{
m_amflag = 0;
m_amout = m_reg[m_modval2 & 0x1F] + OpRead32(m_modadd + 2);
@@ -296,41 +296,41 @@ UINT32 v60_device::bam2DisplacementIndexed32()
return 6;
}
-UINT32 v60_device::am2PCDisplacement8()
+uint32_t v60_device::am2PCDisplacement8()
{
m_amflag = 0;
- m_amout = PC + (INT8)OpRead8(m_modadd + 1);
+ m_amout = PC + (int8_t)OpRead8(m_modadd + 1);
return 2;
}
-UINT32 v60_device::bam2PCDisplacement8()
+uint32_t v60_device::bam2PCDisplacement8()
{
m_amflag = 0;
m_amout = PC;
- m_bamoffset = (INT8)OpRead8(m_modadd + 1);
+ m_bamoffset = (int8_t)OpRead8(m_modadd + 1);
return 2;
}
-UINT32 v60_device::am2PCDisplacement16()
+uint32_t v60_device::am2PCDisplacement16()
{
m_amflag = 0;
- m_amout = PC + (INT16)OpRead16(m_modadd + 1);
+ m_amout = PC + (int16_t)OpRead16(m_modadd + 1);
return 3;
}
-UINT32 v60_device::bam2PCDisplacement16()
+uint32_t v60_device::bam2PCDisplacement16()
{
m_amflag = 0;
m_amout = PC;
- m_bamoffset = (INT16)OpRead16(m_modadd + 1);
+ m_bamoffset = (int16_t)OpRead16(m_modadd + 1);
return 3;
}
-UINT32 v60_device::am2PCDisplacement32()
+uint32_t v60_device::am2PCDisplacement32()
{
m_amflag = 0;
m_amout = PC + OpRead32(m_modadd + 1);
@@ -338,7 +338,7 @@ UINT32 v60_device::am2PCDisplacement32()
return 5;
}
-UINT32 v60_device::bam2PCDisplacement32()
+uint32_t v60_device::bam2PCDisplacement32()
{
m_amflag = 0;
m_amout = PC;
@@ -348,71 +348,71 @@ UINT32 v60_device::bam2PCDisplacement32()
}
-UINT32 v60_device::am2PCDisplacementIndexed8()
+uint32_t v60_device::am2PCDisplacementIndexed8()
{
m_amflag = 0;
switch (m_moddim)
{
case 0:
- m_amout = PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F];
+ m_amout = PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2;
+ m_amout = PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2;
break;
case 2:
- m_amout = PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4;
+ m_amout = PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4;
break;
case 3:
- m_amout = PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 8;
+ m_amout = PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 8;
break;
}
return 3;
}
-UINT32 v60_device::bam2PCDisplacementIndexed8()
+uint32_t v60_device::bam2PCDisplacementIndexed8()
{
m_amflag = 0;
- m_amout = PC + (INT8)OpRead8(m_modadd + 2);
+ m_amout = PC + (int8_t)OpRead8(m_modadd + 2);
m_bamoffset = m_reg[m_modval & 0x1F];
return 3;
}
-UINT32 v60_device::am2PCDisplacementIndexed16()
+uint32_t v60_device::am2PCDisplacementIndexed16()
{
m_amflag = 0;
switch (m_moddim)
{
case 0:
- m_amout = PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F];
+ m_amout = PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2;
+ m_amout = PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2;
break;
case 2:
- m_amout = PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4;
+ m_amout = PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4;
break;
case 3:
- m_amout = PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 8;
+ m_amout = PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 8;
break;
}
return 4;
}
-UINT32 v60_device::bam2PCDisplacementIndexed16()
+uint32_t v60_device::bam2PCDisplacementIndexed16()
{
m_amflag = 0;
- m_amout = PC + (INT16)OpRead16(m_modadd + 2);
+ m_amout = PC + (int16_t)OpRead16(m_modadd + 2);
m_bamoffset = m_reg[m_modval & 0x1F];
return 4;
}
-UINT32 v60_device::am2PCDisplacementIndexed32()
+uint32_t v60_device::am2PCDisplacementIndexed32()
{
m_amflag = 0;
@@ -435,7 +435,7 @@ UINT32 v60_device::am2PCDisplacementIndexed32()
return 6;
}
-UINT32 v60_device::bam2PCDisplacementIndexed32()
+uint32_t v60_device::bam2PCDisplacementIndexed32()
{
m_amflag = 0;
m_amout = PC + OpRead32(m_modadd + 2);
@@ -444,39 +444,39 @@ UINT32 v60_device::bam2PCDisplacementIndexed32()
return 6;
}
-UINT32 v60_device::am2DisplacementIndirect8()
+uint32_t v60_device::am2DisplacementIndirect8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1));
return 2;
}
-UINT32 v60_device::bam2DisplacementIndirect8()
+uint32_t v60_device::bam2DisplacementIndirect8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1));
m_bamoffset = 0;
return 2;
}
-UINT32 v60_device::am2DisplacementIndirect16()
+uint32_t v60_device::am2DisplacementIndirect16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1));
return 3;
}
-UINT32 v60_device::bam2DisplacementIndirect16()
+uint32_t v60_device::bam2DisplacementIndirect16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1));
m_bamoffset = 0;
return 3;
}
-UINT32 v60_device::am2DisplacementIndirect32()
+uint32_t v60_device::am2DisplacementIndirect32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + OpRead32(m_modadd + 1));
@@ -484,7 +484,7 @@ UINT32 v60_device::am2DisplacementIndirect32()
return 5;
}
-UINT32 v60_device::bam2DisplacementIndirect32()
+uint32_t v60_device::bam2DisplacementIndirect32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + OpRead32(m_modadd + 1));
@@ -493,71 +493,71 @@ UINT32 v60_device::bam2DisplacementIndirect32()
return 5;
}
-UINT32 v60_device::am2DisplacementIndirectIndexed8()
+uint32_t v60_device::am2DisplacementIndirectIndexed8()
{
m_amflag = 0;
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F];
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2;
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2;
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4;
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4;
break;
case 3:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 8;
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 8;
break;
}
return 3;
}
-UINT32 v60_device::bam2DisplacementIndirectIndexed8()
+uint32_t v60_device::bam2DisplacementIndirectIndexed8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2));
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2));
m_bamoffset = m_reg[m_modval & 0x1F];
return 3;
}
-UINT32 v60_device::am2DisplacementIndirectIndexed16()
+uint32_t v60_device::am2DisplacementIndirectIndexed16()
{
m_amflag = 0;
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F];
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2;
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2;
break;
case 2:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4;
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4;
break;
case 3:
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 8;
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 8;
break;
}
return 4;
}
-UINT32 v60_device::bam2DisplacementIndirectIndexed16()
+uint32_t v60_device::bam2DisplacementIndirectIndexed16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2));
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2));
m_bamoffset = m_reg[m_modval & 0x1F];
return 4;
}
-UINT32 v60_device::am2DisplacementIndirectIndexed32()
+uint32_t v60_device::am2DisplacementIndirectIndexed32()
{
m_amflag = 0;
@@ -580,7 +580,7 @@ UINT32 v60_device::am2DisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::bam2DisplacementIndirectIndexed32()
+uint32_t v60_device::bam2DisplacementIndirectIndexed32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + OpRead32(m_modadd + 2));
@@ -589,41 +589,41 @@ UINT32 v60_device::bam2DisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::am2PCDisplacementIndirect8()
+uint32_t v60_device::am2PCDisplacementIndirect8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1));
return 2;
}
-UINT32 v60_device::bam2PCDisplacementIndirect8()
+uint32_t v60_device::bam2PCDisplacementIndirect8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1));
m_bamoffset = 0;
return 2;
}
-UINT32 v60_device::am2PCDisplacementIndirect16()
+uint32_t v60_device::am2PCDisplacementIndirect16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1));
return 3;
}
-UINT32 v60_device::bam2PCDisplacementIndirect16()
+uint32_t v60_device::bam2PCDisplacementIndirect16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1));
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1));
m_bamoffset = 0;
return 3;
}
-UINT32 v60_device::am2PCDisplacementIndirect32()
+uint32_t v60_device::am2PCDisplacementIndirect32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 1));
@@ -631,7 +631,7 @@ UINT32 v60_device::am2PCDisplacementIndirect32()
return 5;
}
-UINT32 v60_device::bam2PCDisplacementIndirect32()
+uint32_t v60_device::bam2PCDisplacementIndirect32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 1));
@@ -640,55 +640,55 @@ UINT32 v60_device::bam2PCDisplacementIndirect32()
return 5;
}
-UINT32 v60_device::am2PCDisplacementIndirectIndexed8()
+uint32_t v60_device::am2PCDisplacementIndirectIndexed8()
{
m_amflag = 0;
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F];
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2;
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2;
break;
case 2:
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4;
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4;
break;
case 3:
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 8;
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 8;
break;
}
return 3;
}
-UINT32 v60_device::bam2PCDisplacementIndirectIndexed8()
+uint32_t v60_device::bam2PCDisplacementIndirectIndexed8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2));
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2));
m_bamoffset = m_reg[m_modval & 0x1F];
return 3;
}
-UINT32 v60_device::am2PCDisplacementIndirectIndexed16()
+uint32_t v60_device::am2PCDisplacementIndirectIndexed16()
{
m_amflag = 0;
switch (m_moddim)
{
case 0:
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F];
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F];
break;
case 1:
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2;
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2;
break;
case 2:
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4;
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4;
break;
case 3:
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 8;
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 8;
break;
}
@@ -696,17 +696,17 @@ UINT32 v60_device::am2PCDisplacementIndirectIndexed16()
}
-UINT32 v60_device::bam2PCDisplacementIndirectIndexed16()
+uint32_t v60_device::bam2PCDisplacementIndirectIndexed16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2));
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2));
m_bamoffset = m_reg[m_modval & 0x1F];
return 4;
}
-UINT32 v60_device::am2PCDisplacementIndirectIndexed32()
+uint32_t v60_device::am2PCDisplacementIndirectIndexed32()
{
m_amflag = 0;
@@ -729,7 +729,7 @@ UINT32 v60_device::am2PCDisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::bam2PCDisplacementIndirectIndexed32()
+uint32_t v60_device::bam2PCDisplacementIndirectIndexed32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 2));
@@ -738,41 +738,41 @@ UINT32 v60_device::bam2PCDisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::am2DoubleDisplacement8()
+uint32_t v60_device::am2DoubleDisplacement8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2);
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2);
return 3;
}
-UINT32 v60_device::bam2DoubleDisplacement8()
+uint32_t v60_device::bam2DoubleDisplacement8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1));
- m_bamoffset = (INT8)OpRead8(m_modadd + 2);
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1));
+ m_bamoffset = (int8_t)OpRead8(m_modadd + 2);
return 3;
}
-UINT32 v60_device::am2DoubleDisplacement16()
+uint32_t v60_device::am2DoubleDisplacement16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3);
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3);
return 5;
}
-UINT32 v60_device::bam2DoubleDisplacement16()
+uint32_t v60_device::bam2DoubleDisplacement16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1));
- m_bamoffset = (INT8)OpRead8(m_modadd + 3);
+ m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1));
+ m_bamoffset = (int8_t)OpRead8(m_modadd + 3);
return 5;
}
-UINT32 v60_device::am2DoubleDisplacement32()
+uint32_t v60_device::am2DoubleDisplacement32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + OpRead32(m_modadd + 1)) + OpRead32(m_modadd + 5);
@@ -780,7 +780,7 @@ UINT32 v60_device::am2DoubleDisplacement32()
return 9;
}
-UINT32 v60_device::bam2DoubleDisplacement32()
+uint32_t v60_device::bam2DoubleDisplacement32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + OpRead32(m_modadd + 1));
@@ -790,41 +790,41 @@ UINT32 v60_device::bam2DoubleDisplacement32()
}
-UINT32 v60_device::am2PCDoubleDisplacement8()
+uint32_t v60_device::am2PCDoubleDisplacement8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2);
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2);
return 3;
}
-UINT32 v60_device::bam2PCDoubleDisplacement8()
+uint32_t v60_device::bam2PCDoubleDisplacement8()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1));
- m_bamoffset = (INT8)OpRead8(m_modadd + 2);
+ m_amout = m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1));
+ m_bamoffset = (int8_t)OpRead8(m_modadd + 2);
return 3;
}
-UINT32 v60_device::am2PCDoubleDisplacement16()
+uint32_t v60_device::am2PCDoubleDisplacement16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3);
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3);
return 5;
}
-UINT32 v60_device::bam2PCDoubleDisplacement16()
+uint32_t v60_device::bam2PCDoubleDisplacement16()
{
m_amflag = 0;
- m_amout = m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1));
- m_bamoffset = (INT8)OpRead8(m_modadd + 3);
+ m_amout = m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1));
+ m_bamoffset = (int8_t)OpRead8(m_modadd + 3);
return 5;
}
-UINT32 v60_device::am2PCDoubleDisplacement32()
+uint32_t v60_device::am2PCDoubleDisplacement32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 1)) + OpRead32(m_modadd + 5);
@@ -832,7 +832,7 @@ UINT32 v60_device::am2PCDoubleDisplacement32()
return 9;
}
-UINT32 v60_device::bam2PCDoubleDisplacement32()
+uint32_t v60_device::bam2PCDoubleDisplacement32()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(PC + OpRead32(m_modadd + 1));
@@ -841,7 +841,7 @@ UINT32 v60_device::bam2PCDoubleDisplacement32()
return 9;
}
-UINT32 v60_device::am2DirectAddress()
+uint32_t v60_device::am2DirectAddress()
{
m_amflag = 0;
m_amout = OpRead32(m_modadd + 1);
@@ -849,7 +849,7 @@ UINT32 v60_device::am2DirectAddress()
return 5;
}
-UINT32 v60_device::bam2DirectAddress()
+uint32_t v60_device::bam2DirectAddress()
{
m_amflag = 0;
m_amout = OpRead32(m_modadd + 1);
@@ -858,7 +858,7 @@ UINT32 v60_device::bam2DirectAddress()
return 5;
}
-UINT32 v60_device::am2DirectAddressIndexed()
+uint32_t v60_device::am2DirectAddressIndexed()
{
m_amflag = 0;
@@ -881,7 +881,7 @@ UINT32 v60_device::am2DirectAddressIndexed()
return 6;
}
-UINT32 v60_device::bam2DirectAddressIndexed()
+uint32_t v60_device::bam2DirectAddressIndexed()
{
m_amflag = 0;
m_amout = OpRead32(m_modadd + 2);
@@ -890,7 +890,7 @@ UINT32 v60_device::bam2DirectAddressIndexed()
return 6;
}
-UINT32 v60_device::am2DirectAddressDeferred()
+uint32_t v60_device::am2DirectAddressDeferred()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(OpRead32(m_modadd + 1));
@@ -898,7 +898,7 @@ UINT32 v60_device::am2DirectAddressDeferred()
return 5;
}
-UINT32 v60_device::bam2DirectAddressDeferred()
+uint32_t v60_device::bam2DirectAddressDeferred()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(OpRead32(m_modadd + 1));
@@ -907,7 +907,7 @@ UINT32 v60_device::bam2DirectAddressDeferred()
return 5;
}
-UINT32 v60_device::am2DirectAddressDeferredIndexed()
+uint32_t v60_device::am2DirectAddressDeferredIndexed()
{
m_amflag = 0;
@@ -930,7 +930,7 @@ UINT32 v60_device::am2DirectAddressDeferredIndexed()
return 6;
}
-UINT32 v60_device::bam2DirectAddressDeferredIndexed()
+uint32_t v60_device::bam2DirectAddressDeferredIndexed()
{
m_amflag = 0;
m_amout = m_program->read_dword_unaligned(OpRead32(m_modadd + 2));
@@ -939,13 +939,13 @@ UINT32 v60_device::bam2DirectAddressDeferredIndexed()
return 6;
}
-UINT32 v60_device::am2Immediate()
+uint32_t v60_device::am2Immediate()
{
// ignore LDPR
return am1Immediate();
}
-UINT32 v60_device::am2ImmediateQuick()
+uint32_t v60_device::am2ImmediateQuick()
{
// ignore LDPR
return am1ImmediateQuick();
@@ -955,72 +955,72 @@ UINT32 v60_device::am2ImmediateQuick()
// AM2 Tables (for ReadAMAddress)
// ******************************
-UINT32 v60_device::am2Error1()
+uint32_t v60_device::am2Error1()
{
// f1lap trips this, why?
logerror("CPU - AM2 - 1 (PC=%06x)", PC);
return 0;
}
-UINT32 v60_device::am2Error2()
+uint32_t v60_device::am2Error2()
{
fatalerror("CPU - AM2 - 2 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
#ifdef UNUSED_FUNCTION
-UINT32 v60_device::am2Error3()
+uint32_t v60_device::am2Error3()
{
fatalerror("CPU - AM2 - 3 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
#endif
-UINT32 v60_device::am2Error4()
+uint32_t v60_device::am2Error4()
{
fatalerror("CPU - AM2 - 4 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::am2Error5()
+uint32_t v60_device::am2Error5()
{
fatalerror("CPU - AM2 - 5 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam2Error1()
+uint32_t v60_device::bam2Error1()
{
fatalerror("CPU - BAM2 - 1 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam2Error2()
+uint32_t v60_device::bam2Error2()
{
fatalerror("CPU - BAM2 - 2 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
#ifdef UNUSED_FUNCTION
-UINT32 v60_device::bam2Error3()
+uint32_t v60_device::bam2Error3()
{
fatalerror("CPU - BAM2 - 3 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
#endif
-UINT32 v60_device::bam2Error4()
+uint32_t v60_device::bam2Error4()
{
fatalerror("CPU - BAM2 - 4 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam2Error5()
+uint32_t v60_device::bam2Error5()
{
fatalerror("CPU - BAM2 - 5 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::bam2Error6()
+uint32_t v60_device::bam2Error6()
{
fatalerror("CPU - BAM2 - 6 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
@@ -1067,7 +1067,7 @@ const v60_device::am_func v60_device::s_BAMTable2_G7a[16] =
&v60_device::bam2Error5
};
-UINT32 v60_device::am2Group7a()
+uint32_t v60_device::am2Group7a()
{
if (!(m_modval2 & 0x10))
return am2Error4();
@@ -1075,7 +1075,7 @@ UINT32 v60_device::am2Group7a()
return (this->*s_AMTable2_G7a[m_modval2 & 0xF])();
}
-UINT32 v60_device::bam2Group7a()
+uint32_t v60_device::bam2Group7a()
{
if (!(m_modval2 & 0x10))
return bam2Error4();
@@ -1182,22 +1182,22 @@ const v60_device::am_func v60_device::s_BAMTable2_G6[8] =
-UINT32 v60_device::am2Group6()
+uint32_t v60_device::am2Group6()
{
m_modval2 = OpRead8(m_modadd + 1);
return (this->*s_AMTable2_G6[m_modval2 >> 5])();
}
-UINT32 v60_device::bam2Group6()
+uint32_t v60_device::bam2Group6()
{
m_modval2 = OpRead8(m_modadd + 1);
return (this->*s_BAMTable2_G6[m_modval2 >> 5])();
}
-UINT32 v60_device::am2Group7()
+uint32_t v60_device::am2Group7()
{
return (this->*s_AMTable2_G7[m_modval & 0x1F])();
}
-UINT32 v60_device::bam2Group7()
+uint32_t v60_device::bam2Group7()
{
return (this->*s_BAMTable2_G7[m_modval & 0x1F])();
}
diff --git a/src/devices/cpu/v60/am3.hxx b/src/devices/cpu/v60/am3.hxx
index 93af406f266..e02051b1be4 100644
--- a/src/devices/cpu/v60/am3.hxx
+++ b/src/devices/cpu/v60/am3.hxx
@@ -3,7 +3,7 @@
// AM3 Functions (for ReadAM)
// **************************
-UINT32 v60_device::am3Register()
+uint32_t v60_device::am3Register()
{
switch (m_moddim)
{
@@ -21,7 +21,7 @@ UINT32 v60_device::am3Register()
return 1;
}
-UINT32 v60_device::am3RegisterIndirect()
+uint32_t v60_device::am3RegisterIndirect()
{
switch (m_moddim)
{
@@ -39,7 +39,7 @@ UINT32 v60_device::am3RegisterIndirect()
return 1;
}
-UINT32 v60_device::am3RegisterIndirectIndexed()
+uint32_t v60_device::am3RegisterIndirectIndexed()
{
switch (m_moddim)
{
@@ -57,7 +57,7 @@ UINT32 v60_device::am3RegisterIndirectIndexed()
return 2;
}
-UINT32 v60_device::am3Autoincrement()
+uint32_t v60_device::am3Autoincrement()
{
switch (m_moddim)
{
@@ -78,7 +78,7 @@ UINT32 v60_device::am3Autoincrement()
return 1;
}
-UINT32 v60_device::am3Autodecrement()
+uint32_t v60_device::am3Autodecrement()
{
switch (m_moddim)
{
@@ -99,43 +99,43 @@ UINT32 v60_device::am3Autodecrement()
return 1;
}
-UINT32 v60_device::am3Displacement8()
+uint32_t v60_device::am3Displacement8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1), m_modwritevalb);
+ m_program->write_byte(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1), m_modwritevalh);
+ m_program->write_word_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1), m_modwritevalw);
+ m_program->write_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1), m_modwritevalw);
break;
}
return 2;
}
-UINT32 v60_device::am3Displacement16()
+uint32_t v60_device::am3Displacement16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1), m_modwritevalb);
+ m_program->write_byte(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1), m_modwritevalh);
+ m_program->write_word_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1), m_modwritevalw);
+ m_program->write_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1), m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3Displacement32()
+uint32_t v60_device::am3Displacement32()
{
switch (m_moddim)
{
@@ -154,43 +154,43 @@ UINT32 v60_device::am3Displacement32()
}
-UINT32 v60_device::am3DisplacementIndexed8()
+uint32_t v60_device::am3DisplacementIndexed8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F], m_modwritevalb);
+ m_program->write_byte(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F], m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
+ m_program->write_word_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
+ m_program->write_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3DisplacementIndexed16()
+uint32_t v60_device::am3DisplacementIndexed16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F], m_modwritevalb);
+ m_program->write_byte(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F], m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
+ m_program->write_word_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
+ m_program->write_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
break;
}
return 4;
}
-UINT32 v60_device::am3DisplacementIndexed32()
+uint32_t v60_device::am3DisplacementIndexed32()
{
switch (m_moddim)
{
@@ -209,43 +209,43 @@ UINT32 v60_device::am3DisplacementIndexed32()
}
-UINT32 v60_device::am3PCDisplacement8()
+uint32_t v60_device::am3PCDisplacement8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(PC + (INT8)OpRead8(m_modadd + 1), m_modwritevalb);
+ m_program->write_byte(PC + (int8_t)OpRead8(m_modadd + 1), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(PC + (INT8)OpRead8(m_modadd + 1), m_modwritevalh);
+ m_program->write_word_unaligned(PC + (int8_t)OpRead8(m_modadd + 1), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1), m_modwritevalw);
+ m_program->write_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1), m_modwritevalw);
break;
}
return 2;
}
-UINT32 v60_device::am3PCDisplacement16()
+uint32_t v60_device::am3PCDisplacement16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(PC + (INT16)OpRead16(m_modadd + 1), m_modwritevalb);
+ m_program->write_byte(PC + (int16_t)OpRead16(m_modadd + 1), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(PC + (INT16)OpRead16(m_modadd + 1), m_modwritevalh);
+ m_program->write_word_unaligned(PC + (int16_t)OpRead16(m_modadd + 1), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1), m_modwritevalw);
+ m_program->write_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1), m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3PCDisplacement32()
+uint32_t v60_device::am3PCDisplacement32()
{
switch (m_moddim)
{
@@ -263,43 +263,43 @@ UINT32 v60_device::am3PCDisplacement32()
return 5;
}
-UINT32 v60_device::am3PCDisplacementIndexed8()
+uint32_t v60_device::am3PCDisplacementIndexed8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F], m_modwritevalb);
+ m_program->write_byte(PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F], m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
+ m_program->write_word_unaligned(PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
+ m_program->write_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3PCDisplacementIndexed16()
+uint32_t v60_device::am3PCDisplacementIndexed16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F], m_modwritevalb);
+ m_program->write_byte(PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F], m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
+ m_program->write_word_unaligned(PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
+ m_program->write_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
break;
}
return 4;
}
-UINT32 v60_device::am3PCDisplacementIndexed32()
+uint32_t v60_device::am3PCDisplacementIndexed32()
{
switch (m_moddim)
{
@@ -317,43 +317,43 @@ UINT32 v60_device::am3PCDisplacementIndexed32()
return 6;
}
-UINT32 v60_device::am3DisplacementIndirect8()
+uint32_t v60_device::am3DisplacementIndirect8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)), m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)), m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)), m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)), m_modwritevalw);
break;
}
return 2;
}
-UINT32 v60_device::am3DisplacementIndirect16()
+uint32_t v60_device::am3DisplacementIndirect16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)), m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)), m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)), m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)), m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3DisplacementIndirect32()
+uint32_t v60_device::am3DisplacementIndirect32()
{
switch (m_moddim)
{
@@ -372,43 +372,43 @@ UINT32 v60_device::am3DisplacementIndirect32()
}
-UINT32 v60_device::am3DisplacementIndirectIndexed8()
+uint32_t v60_device::am3DisplacementIndirectIndexed8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F], m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F], m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3DisplacementIndirectIndexed16()
+uint32_t v60_device::am3DisplacementIndirectIndexed16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F], m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F], m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval2 & 0x1F] + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
break;
}
return 4;
}
-UINT32 v60_device::am3DisplacementIndirectIndexed32()
+uint32_t v60_device::am3DisplacementIndirectIndexed32()
{
switch (m_moddim)
{
@@ -426,43 +426,43 @@ UINT32 v60_device::am3DisplacementIndirectIndexed32()
return 6;
}
-UINT32 v60_device::am3PCDisplacementIndirect8()
+uint32_t v60_device::am3PCDisplacementIndirect8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)), m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)), m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)), m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)), m_modwritevalw);
break;
}
return 2;
}
-UINT32 v60_device::am3PCDisplacementIndirect16()
+uint32_t v60_device::am3PCDisplacementIndirect16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)), m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)), m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)), m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)), m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3PCDisplacementIndirect32()
+uint32_t v60_device::am3PCDisplacementIndirect32()
{
switch (m_moddim)
{
@@ -481,43 +481,43 @@ UINT32 v60_device::am3PCDisplacementIndirect32()
}
-UINT32 v60_device::am3PCDisplacementIndirectIndexed8()
+uint32_t v60_device::am3PCDisplacementIndirectIndexed8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F], m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F], m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3PCDisplacementIndirectIndexed16()
+uint32_t v60_device::am3PCDisplacementIndirectIndexed16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F], m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F], m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 2, m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 2)) + m_reg[m_modval & 0x1F] * 4, m_modwritevalw);
break;
}
return 4;
}
-UINT32 v60_device::am3PCDisplacementIndirectIndexed32()
+uint32_t v60_device::am3PCDisplacementIndirectIndexed32()
{
switch (m_moddim)
{
@@ -536,43 +536,43 @@ UINT32 v60_device::am3PCDisplacementIndirectIndexed32()
}
-UINT32 v60_device::am3DoubleDisplacement8()
+uint32_t v60_device::am3DoubleDisplacement8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2), m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2), m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2), m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2), m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3DoubleDisplacement16()
+uint32_t v60_device::am3DoubleDisplacement16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3), m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3), m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3), m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(m_reg[m_modval & 0x1F] + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3), m_modwritevalw);
break;
}
return 5;
}
-UINT32 v60_device::am3DoubleDisplacement32()
+uint32_t v60_device::am3DoubleDisplacement32()
{
switch (m_moddim)
{
@@ -591,43 +591,43 @@ UINT32 v60_device::am3DoubleDisplacement32()
}
-UINT32 v60_device::am3PCDoubleDisplacement8()
+uint32_t v60_device::am3PCDoubleDisplacement8()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2), m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2), m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (INT8)OpRead8(m_modadd + 1)) + (INT8)OpRead8(m_modadd + 2), m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (int8_t)OpRead8(m_modadd + 1)) + (int8_t)OpRead8(m_modadd + 2), m_modwritevalw);
break;
}
return 3;
}
-UINT32 v60_device::am3PCDoubleDisplacement16()
+uint32_t v60_device::am3PCDoubleDisplacement16()
{
switch (m_moddim)
{
case 0:
- m_program->write_byte(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3), m_modwritevalb);
+ m_program->write_byte(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3), m_modwritevalb);
break;
case 1:
- m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3), m_modwritevalh);
+ m_program->write_word_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3), m_modwritevalh);
break;
case 2:
- m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (INT16)OpRead16(m_modadd + 1)) + (INT16)OpRead16(m_modadd + 3), m_modwritevalw);
+ m_program->write_dword_unaligned(m_program->read_dword_unaligned(PC + (int16_t)OpRead16(m_modadd + 1)) + (int16_t)OpRead16(m_modadd + 3), m_modwritevalw);
break;
}
return 5;
}
-UINT32 v60_device::am3PCDoubleDisplacement32()
+uint32_t v60_device::am3PCDoubleDisplacement32()
{
switch (m_moddim)
{
@@ -645,7 +645,7 @@ UINT32 v60_device::am3PCDoubleDisplacement32()
return 9;
}
-UINT32 v60_device::am3DirectAddress()
+uint32_t v60_device::am3DirectAddress()
{
switch (m_moddim)
{
@@ -663,7 +663,7 @@ UINT32 v60_device::am3DirectAddress()
return 5;
}
-UINT32 v60_device::am3DirectAddressIndexed()
+uint32_t v60_device::am3DirectAddressIndexed()
{
switch (m_moddim)
{
@@ -681,7 +681,7 @@ UINT32 v60_device::am3DirectAddressIndexed()
return 6;
}
-UINT32 v60_device::am3DirectAddressDeferred()
+uint32_t v60_device::am3DirectAddressDeferred()
{
switch (m_moddim)
{
@@ -699,7 +699,7 @@ UINT32 v60_device::am3DirectAddressDeferred()
return 5;
}
-UINT32 v60_device::am3DirectAddressDeferredIndexed()
+uint32_t v60_device::am3DirectAddressDeferredIndexed()
{
switch (m_moddim)
{
@@ -717,13 +717,13 @@ UINT32 v60_device::am3DirectAddressDeferredIndexed()
return 6;
}
-UINT32 v60_device::am3Immediate()
+uint32_t v60_device::am3Immediate()
{
fatalerror("CPU - AM3 - IMM (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::am3ImmediateQuick()
+uint32_t v60_device::am3ImmediateQuick()
{
fatalerror("CPU - AM3 - IMMQ (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
@@ -734,33 +734,33 @@ UINT32 v60_device::am3ImmediateQuick()
// AM3 Tables (for ReadAMAddress)
// ******************************
-UINT32 v60_device::am3Error1()
+uint32_t v60_device::am3Error1()
{
fatalerror("CPU - AM3 - 1 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::am3Error2()
+uint32_t v60_device::am3Error2()
{
fatalerror("CPU - AM3 - 2 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
#ifdef UNUSED_FUNCTION
-UINT32 v60_device::am3Error3()
+uint32_t v60_device::am3Error3()
{
fatalerror("CPU - AM3 - 3 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
#endif
-UINT32 v60_device::am3Error4()
+uint32_t v60_device::am3Error4()
{
fatalerror("CPU - AM3 - 4 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::am3Error5()
+uint32_t v60_device::am3Error5()
{
fatalerror("CPU - AM3 - 5 (PC=%06x)\n", PC);
return 0; /* never reached, fatalerror won't return */
@@ -786,7 +786,7 @@ const v60_device::am_func v60_device::s_AMTable3_G7a[16] =
&v60_device::am3Error5
};
-UINT32 v60_device::am3Group7a()
+uint32_t v60_device::am3Group7a()
{
if (!(m_modval2 & 0x10))
return am3Error4();
@@ -845,14 +845,14 @@ const v60_device::am_func v60_device::s_AMTable3_G6[8] =
-UINT32 v60_device::am3Group6()
+uint32_t v60_device::am3Group6()
{
m_modval2 = OpRead8(m_modadd + 1);
return (this->*s_AMTable3_G6[m_modval2 >> 5])();
}
-UINT32 v60_device::am3Group7()
+uint32_t v60_device::am3Group7()
{
return (this->*s_AMTable3_G7[m_modval & 0x1F])();
}
diff --git a/src/devices/cpu/v60/op12.hxx b/src/devices/cpu/v60/op12.hxx
index 319e9995595..cb9dde1c153 100644
--- a/src/devices/cpu/v60/op12.hxx
+++ b/src/devices/cpu/v60/op12.hxx
@@ -20,13 +20,13 @@
#define F12LOADOPBYTE(num) \
if (m_flag##num) \
- appb = (UINT8)m_reg[m_op##num]; \
+ appb = (uint8_t)m_reg[m_op##num]; \
else \
appb = m_program->read_byte(m_op##num);
#define F12LOADOPHALF(num) \
if (m_flag##num) \
- apph = (UINT16)m_reg[m_op##num]; \
+ apph = (uint16_t)m_reg[m_op##num]; \
else \
apph = m_program->read_word_unaligned(m_op##num);
@@ -76,7 +76,7 @@
// Decode the first operand of the instruction and prepare
// writing to the second operand.
-void v60_device::F12DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1)
+void v60_device::F12DecodeFirstOperand(am_func DecodeOp1, uint8_t dim1)
{
m_instflags = OpRead8(PC + 1);
@@ -109,10 +109,10 @@ void v60_device::F12DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1)
switch (dim1)
{
case 0:
- m_op1 = (UINT8)m_reg[m_instflags & 0x1F];
+ m_op1 = (uint8_t)m_reg[m_instflags & 0x1F];
break;
case 1:
- m_op1 = (UINT16)m_reg[m_instflags & 0x1F];
+ m_op1 = (uint16_t)m_reg[m_instflags & 0x1F];
break;
case 2:
m_op1 = m_reg[m_instflags & 0x1F];
@@ -132,7 +132,7 @@ void v60_device::F12DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1)
}
}
-void v60_device::F12WriteSecondOperand(UINT8 dim2)
+void v60_device::F12WriteSecondOperand(uint8_t dim2)
{
m_moddim = dim2;
@@ -177,9 +177,9 @@ void v60_device::F12WriteSecondOperand(UINT8 dim2)
// Decode both format 1 / 2 operands
-void v60_device::F12DecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2)
+void v60_device::F12DecodeOperands(am_func DecodeOp1, uint8_t dim1, am_func DecodeOp2, uint8_t dim2)
{
- UINT8 _if12 = OpRead8(PC + 1);
+ uint8_t _if12 = OpRead8(PC + 1);
// Check if F1 or F2
if (_if12 & 0x80)
@@ -213,10 +213,10 @@ void v60_device::F12DecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func Decode
switch (dim2)
{
case 0:
- m_op2 = (UINT8)m_reg[_if12 & 0x1F];
+ m_op2 = (uint8_t)m_reg[_if12 & 0x1F];
break;
case 1:
- m_op2 = (UINT16)m_reg[_if12 & 0x1F];
+ m_op2 = (uint16_t)m_reg[_if12 & 0x1F];
break;
case 2:
m_op2 = m_reg[_if12 & 0x1F];
@@ -245,10 +245,10 @@ void v60_device::F12DecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func Decode
switch (dim1)
{
case 0:
- m_op1 = (UINT8)m_reg[_if12 & 0x1F];
+ m_op1 = (uint8_t)m_reg[_if12 & 0x1F];
break;
case 1:
- m_op1 = (UINT16)m_reg[_if12 & 0x1F];
+ m_op1 = (uint16_t)m_reg[_if12 & 0x1F];
break;
case 2:
m_op1 = m_reg[_if12 & 0x1F];
@@ -267,78 +267,78 @@ void v60_device::F12DecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func Decode
}
}
-UINT32 v60_device::opADDB() /* TRUSTED (C too!)*/
+uint32_t v60_device::opADDB() /* TRUSTED (C too!)*/
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- ADDB(appb, (UINT8)m_op1);
+ ADDB(appb, (uint8_t)m_op1);
F12STOREOP2BYTE();
F12END();
}
-UINT32 v60_device::opADDH() /* TRUSTED (C too!)*/
+uint32_t v60_device::opADDH() /* TRUSTED (C too!)*/
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- ADDW(apph, (UINT16)m_op1);
+ ADDW(apph, (uint16_t)m_op1);
F12STOREOP2HALF();
F12END();
}
-UINT32 v60_device::opADDW() /* TRUSTED (C too!) */
+uint32_t v60_device::opADDW() /* TRUSTED (C too!) */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
- ADDL(appw, (UINT32)m_op1);
+ ADDL(appw, (uint32_t)m_op1);
F12STOREOP2WORD();
F12END();
}
-UINT32 v60_device::opADDCB()
+uint32_t v60_device::opADDCB()
{
- UINT8 appb, temp;
+ uint8_t appb, temp;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- temp = ((UINT8)m_op1 + (_CY?1:0));
+ temp = ((uint8_t)m_op1 + (_CY?1:0));
ADDB(appb, temp);
F12STOREOP2BYTE();
F12END();
}
-UINT32 v60_device::opADDCH()
+uint32_t v60_device::opADDCH()
{
- UINT16 apph, temp;
+ uint16_t apph, temp;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- temp = ((UINT16)m_op1 + (_CY?1:0));
+ temp = ((uint16_t)m_op1 + (_CY?1:0));
ADDW(apph, temp);
F12STOREOP2HALF();
F12END();
}
-UINT32 v60_device::opADDCW()
+uint32_t v60_device::opADDCW()
{
- UINT32 appw, temp;
+ uint32_t appw, temp;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
@@ -351,9 +351,9 @@ UINT32 v60_device::opADDCW()
F12END();
}
-UINT32 v60_device::opANDB() /* TRUSTED */
+uint32_t v60_device::opANDB() /* TRUSTED */
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
@@ -367,9 +367,9 @@ UINT32 v60_device::opANDB() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opANDH() /* TRUSTED */
+uint32_t v60_device::opANDH() /* TRUSTED */
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
@@ -383,9 +383,9 @@ UINT32 v60_device::opANDH() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opANDW() /* TRUSTED */
+uint32_t v60_device::opANDW() /* TRUSTED */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
@@ -399,7 +399,7 @@ UINT32 v60_device::opANDW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opCALL() /* TRUSTED */
+uint32_t v60_device::opCALL() /* TRUSTED */
{
F12DecodeOperands(&v60_device::ReadAMAddress, 0,&v60_device::ReadAMAddress, 2);
@@ -414,7 +414,7 @@ UINT32 v60_device::opCALL() /* TRUSTED */
return 0;
}
-UINT32 v60_device::opCHKAR()
+uint32_t v60_device::opCHKAR()
{
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAM, 0);
@@ -426,7 +426,7 @@ UINT32 v60_device::opCHKAR()
F12END();
}
-UINT32 v60_device::opCHKAW()
+uint32_t v60_device::opCHKAW()
{
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAM, 0);
@@ -438,7 +438,7 @@ UINT32 v60_device::opCHKAW()
F12END();
}
-UINT32 v60_device::opCHKAE()
+uint32_t v60_device::opCHKAE()
{
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAM, 0);
@@ -450,9 +450,9 @@ UINT32 v60_device::opCHKAE()
F12END();
}
-UINT32 v60_device::opCHLVL()
+uint32_t v60_device::opCHLVL()
{
- UINT32 oldPSW;
+ uint32_t oldPSW;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAM, 0);
@@ -480,9 +480,9 @@ UINT32 v60_device::opCHLVL()
return 0;
}
-UINT32 v60_device::opCLR1() /* TRUSTED */
+uint32_t v60_device::opCLR1() /* TRUSTED */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
@@ -496,48 +496,48 @@ UINT32 v60_device::opCLR1() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opCMPB() /* TRUSTED (C too!) */
+uint32_t v60_device::opCMPB() /* TRUSTED (C too!) */
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAM, 0);
- appb = (UINT8)m_op2;
- SUBB(appb, (UINT8)m_op1);
+ appb = (uint8_t)m_op2;
+ SUBB(appb, (uint8_t)m_op1);
F12END();
}
-UINT32 v60_device::opCMPH() /* TRUSTED (C too!) */
+uint32_t v60_device::opCMPH() /* TRUSTED (C too!) */
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAM, 1);
- apph = (UINT16)m_op2;
- SUBW(apph, (UINT16)m_op1);
+ apph = (uint16_t)m_op2;
+ SUBW(apph, (uint16_t)m_op1);
F12END();
}
-UINT32 v60_device::opCMPW() /* TRUSTED (C too!)*/
+uint32_t v60_device::opCMPW() /* TRUSTED (C too!)*/
{
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAM, 2);
- SUBL(m_op2, (UINT32)m_op1);
+ SUBL(m_op2, (uint32_t)m_op1);
F12END();
}
-UINT32 v60_device::opDIVB() /* TRUSTED */
+uint32_t v60_device::opDIVB() /* TRUSTED */
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
_OV = ((appb == 0x80) && (m_op1 == 0xFF));
if (m_op1 && !_OV)
- appb= (INT8)appb / (INT8)m_op1;
+ appb= (int8_t)appb / (int8_t)m_op1;
_Z = (appb == 0);
_S = ((appb & 0x80) != 0);
@@ -545,16 +545,16 @@ UINT32 v60_device::opDIVB() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opDIVH() /* TRUSTED */
+uint32_t v60_device::opDIVH() /* TRUSTED */
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
_OV = ((apph == 0x8000) && (m_op1 == 0xFFFF));
if (m_op1 && !_OV)
- apph = (INT16)apph / (INT16)m_op1;
+ apph = (int16_t)apph / (int16_t)m_op1;
_Z = (apph == 0);
_S = ((apph & 0x8000) != 0);
@@ -562,16 +562,16 @@ UINT32 v60_device::opDIVH() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opDIVW() /* TRUSTED */
+uint32_t v60_device::opDIVW() /* TRUSTED */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
_OV = ((appw == 0x80000000) && (m_op1 == 0xFFFFFFFF));
if (m_op1 && !_OV)
- appw = (INT32)appw / (INT32)m_op1;
+ appw = (int32_t)appw / (int32_t)m_op1;
_Z = (appw == 0);
_S = ((appw & 0x80000000) != 0);
@@ -579,10 +579,10 @@ UINT32 v60_device::opDIVW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opDIVX()
+uint32_t v60_device::opDIVX()
{
- UINT32 a, b;
- INT64 dv;
+ uint32_t a, b;
+ int64_t dv;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 3);
@@ -597,10 +597,10 @@ UINT32 v60_device::opDIVX()
b = m_program->read_dword_unaligned(m_op2 + 4);
}
- dv = ((UINT64)b << 32) | ((UINT64)a);
+ dv = ((uint64_t)b << 32) | ((uint64_t)a);
- a = dv / (INT64)((INT32)m_op1);
- b = dv % (INT64)((INT32)m_op1);
+ a = dv / (int64_t)((int32_t)m_op1);
+ b = dv % (int64_t)((int32_t)m_op1);
_S = ((a & 0x80000000) != 0);
_Z = (a == 0);
@@ -619,10 +619,10 @@ UINT32 v60_device::opDIVX()
F12END();
}
-UINT32 v60_device::opDIVUX()
+uint32_t v60_device::opDIVUX()
{
- UINT32 a, b;
- UINT64 dv;
+ uint32_t a, b;
+ uint64_t dv;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 3);
@@ -637,9 +637,9 @@ UINT32 v60_device::opDIVUX()
b = m_program->read_dword_unaligned(m_op2 + 4);
}
- dv = (UINT64)(((UINT64)b << 32) | (UINT64)a);
- a = (UINT32)(dv / (UINT64)m_op1);
- b = (UINT32)(dv % (UINT64)m_op1);
+ dv = (uint64_t)(((uint64_t)b << 32) | (uint64_t)a);
+ a = (uint32_t)(dv / (uint64_t)m_op1);
+ b = (uint32_t)(dv % (uint64_t)m_op1);
_S = ((a & 0x80000000) != 0);
_Z = (a == 0);
@@ -659,15 +659,15 @@ UINT32 v60_device::opDIVUX()
}
-UINT32 v60_device::opDIVUB() /* TRUSTED */
+uint32_t v60_device::opDIVUB() /* TRUSTED */
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
_OV = 0;
- if (m_op1) appb /= (UINT8)m_op1;
+ if (m_op1) appb /= (uint8_t)m_op1;
_Z = (appb == 0);
_S = ((appb & 0x80) != 0);
@@ -675,15 +675,15 @@ UINT32 v60_device::opDIVUB() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opDIVUH() /* TRUSTED */
+uint32_t v60_device::opDIVUH() /* TRUSTED */
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
_OV = 0;
- if (m_op1) apph /= (UINT16)m_op1;
+ if (m_op1) apph /= (uint16_t)m_op1;
_Z = (apph == 0);
_S = ((apph & 0x8000) != 0);
@@ -691,9 +691,9 @@ UINT32 v60_device::opDIVUH() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opDIVUW() /* TRUSTED */
+uint32_t v60_device::opDIVUW() /* TRUSTED */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
@@ -707,7 +707,7 @@ UINT32 v60_device::opDIVUW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opINB()
+uint32_t v60_device::opINB()
{
F12DecodeFirstOperand(&v60_device::ReadAMAddress, 0);
m_modwritevalb = m_io->read_byte(m_op1);
@@ -722,7 +722,7 @@ UINT32 v60_device::opINB()
F12END();
}
-UINT32 v60_device::opINH()
+uint32_t v60_device::opINH()
{
F12DecodeFirstOperand(&v60_device::ReadAMAddress, 1);
m_modwritevalh = m_io->read_word_unaligned(m_op1);
@@ -737,7 +737,7 @@ UINT32 v60_device::opINH()
F12END();
}
-UINT32 v60_device::opINW()
+uint32_t v60_device::opINW()
{
F12DecodeFirstOperand(&v60_device::ReadAMAddress, 2);
m_modwritevalw = m_io->read_dword_unaligned(m_op1);
@@ -752,7 +752,7 @@ UINT32 v60_device::opINW()
F12END();
}
-UINT32 v60_device::opLDPR()
+uint32_t v60_device::opLDPR()
{
F12DecodeOperands(&v60_device::ReadAMAddress, 2,&v60_device::ReadAM, 2);
if (m_op2 <= 28)
@@ -769,7 +769,7 @@ UINT32 v60_device::opLDPR()
F12END();
}
-UINT32 v60_device::opLDTASK()
+uint32_t v60_device::opLDTASK()
{
int i;
F12DecodeOperands(&v60_device::ReadAMAddress, 2,&v60_device::ReadAM, 2);
@@ -811,9 +811,9 @@ UINT32 v60_device::opLDTASK()
F12END();
}
-UINT32 v60_device::opMOVD() /* TRUSTED */
+uint32_t v60_device::opMOVD() /* TRUSTED */
{
- UINT32 a, b;
+ uint32_t a, b;
F12DecodeOperands(&v60_device::ReadAMAddress, 3,&v60_device::ReadAMAddress, 3);
@@ -842,23 +842,23 @@ UINT32 v60_device::opMOVD() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opMOVB() /* TRUSTED */
+uint32_t v60_device::opMOVB() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
- m_modwritevalb = (UINT8)m_op1;
+ m_modwritevalb = (uint8_t)m_op1;
F12WriteSecondOperand(0);
F12END();
}
-UINT32 v60_device::opMOVH() /* TRUSTED */
+uint32_t v60_device::opMOVH() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 1);
- m_modwritevalh = (UINT16)m_op1;
+ m_modwritevalh = (uint16_t)m_op1;
F12WriteSecondOperand(1);
F12END();
}
-UINT32 v60_device::opMOVW() /* TRUSTED */
+uint32_t v60_device::opMOVW() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 2);
m_modwritevalw = m_op1;
@@ -866,7 +866,7 @@ UINT32 v60_device::opMOVW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opMOVEAB() /* TRUSTED */
+uint32_t v60_device::opMOVEAB() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAMAddress, 0);
m_modwritevalw = m_op1;
@@ -874,7 +874,7 @@ UINT32 v60_device::opMOVEAB() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opMOVEAH() /* TRUSTED */
+uint32_t v60_device::opMOVEAH() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAMAddress, 1);
m_modwritevalw = m_op1;
@@ -882,7 +882,7 @@ UINT32 v60_device::opMOVEAH() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opMOVEAW() /* TRUSTED */
+uint32_t v60_device::opMOVEAW() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAMAddress, 2);
m_modwritevalw = m_op1;
@@ -890,34 +890,34 @@ UINT32 v60_device::opMOVEAW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opMOVSBH() /* TRUSTED */
+uint32_t v60_device::opMOVSBH() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
- m_modwritevalh = (INT8)(m_op1 & 0xFF);
+ m_modwritevalh = (int8_t)(m_op1 & 0xFF);
F12WriteSecondOperand(1);
F12END();
}
-UINT32 v60_device::opMOVSBW() /* TRUSTED */
+uint32_t v60_device::opMOVSBW() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
- m_modwritevalw = (INT8)(m_op1 & 0xFF);
+ m_modwritevalw = (int8_t)(m_op1 & 0xFF);
F12WriteSecondOperand(2);
F12END();
}
-UINT32 v60_device::opMOVSHW() /* TRUSTED */
+uint32_t v60_device::opMOVSHW() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 1);
- m_modwritevalw = (INT16)(m_op1 & 0xFFFF);
+ m_modwritevalw = (int16_t)(m_op1 & 0xFFFF);
F12WriteSecondOperand(2);
F12END();
}
-UINT32 v60_device::opMOVTHB()
+uint32_t v60_device::opMOVTHB()
{
F12DecodeFirstOperand(&v60_device::ReadAM, 1);
- m_modwritevalb = (UINT8)(m_op1 & 0xFF);
+ m_modwritevalb = (uint8_t)(m_op1 & 0xFF);
// Check for overflow: the truncated bits must match the sign
// of the result, otherwise overflow
@@ -931,10 +931,10 @@ UINT32 v60_device::opMOVTHB()
F12END();
}
-UINT32 v60_device::opMOVTWB()
+uint32_t v60_device::opMOVTWB()
{
F12DecodeFirstOperand(&v60_device::ReadAM, 2);
- m_modwritevalb = (UINT8)(m_op1 & 0xFF);
+ m_modwritevalb = (uint8_t)(m_op1 & 0xFF);
// Check for overflow: the truncated bits must match the sign
// of the result, otherwise overflow
@@ -948,10 +948,10 @@ UINT32 v60_device::opMOVTWB()
F12END();
}
-UINT32 v60_device::opMOVTWH()
+uint32_t v60_device::opMOVTWH()
{
F12DecodeFirstOperand(&v60_device::ReadAM, 2);
- m_modwritevalh = (UINT16)(m_op1 & 0xFFFF);
+ m_modwritevalh = (uint16_t)(m_op1 & 0xFFFF);
// Check for overflow: the truncated bits must match the sign
// of the result, otherwise overflow
@@ -966,15 +966,15 @@ UINT32 v60_device::opMOVTWH()
}
-UINT32 v60_device::opMOVZBH() /* TRUSTED */
+uint32_t v60_device::opMOVZBH() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
- m_modwritevalh = (UINT16)m_op1;
+ m_modwritevalh = (uint16_t)m_op1;
F12WriteSecondOperand(1);
F12END();
}
-UINT32 v60_device::opMOVZBW() /* TRUSTED */
+uint32_t v60_device::opMOVZBW() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
m_modwritevalw = m_op1;
@@ -982,7 +982,7 @@ UINT32 v60_device::opMOVZBW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opMOVZHW() /* TRUSTED */
+uint32_t v60_device::opMOVZHW() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 1);
m_modwritevalw = m_op1;
@@ -990,16 +990,16 @@ UINT32 v60_device::opMOVZHW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opMULB()
+uint32_t v60_device::opMULB()
{
- UINT8 appb;
- UINT32 tmp;
+ uint8_t appb;
+ uint32_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
// @@@ OV not set!!
- tmp = (INT8)appb * (INT32)(INT8)m_op1;
+ tmp = (int8_t)appb * (int32_t)(int8_t)m_op1;
appb = tmp;
_Z = (appb == 0);
_S = ((appb & 0x80) != 0);
@@ -1009,16 +1009,16 @@ UINT32 v60_device::opMULB()
F12END();
}
-UINT32 v60_device::opMULH()
+uint32_t v60_device::opMULH()
{
- UINT16 apph;
- UINT32 tmp;
+ uint16_t apph;
+ uint32_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
// @@@ OV not set!!
- tmp = (INT16)apph * (INT32)(INT16)m_op1;
+ tmp = (int16_t)apph * (int32_t)(int16_t)m_op1;
apph = tmp;
_Z = (apph == 0);
_S = ((apph & 0x8000) != 0);
@@ -1028,16 +1028,16 @@ UINT32 v60_device::opMULH()
F12END();
}
-UINT32 v60_device::opMULW()
+uint32_t v60_device::opMULW()
{
- UINT32 appw;
- UINT64 tmp;
+ uint32_t appw;
+ uint64_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
// @@@ OV not set!!
- tmp = (INT32)appw * (INT64)(INT32)m_op1;
+ tmp = (int32_t)appw * (int64_t)(int32_t)m_op1;
appw = tmp;
_Z = (appw == 0);
_S = ((appw & 0x80000000) != 0);
@@ -1047,16 +1047,16 @@ UINT32 v60_device::opMULW()
F12END();
}
-UINT32 v60_device::opMULUB()
+uint32_t v60_device::opMULUB()
{
- UINT8 appb;
- UINT32 tmp;
+ uint8_t appb;
+ uint32_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
// @@@ OV not set!!
- tmp = appb * (UINT8)m_op1;
+ tmp = appb * (uint8_t)m_op1;
appb = tmp;
_Z = (appb == 0);
_S = ((appb & 0x80) != 0);
@@ -1066,16 +1066,16 @@ UINT32 v60_device::opMULUB()
F12END();
}
-UINT32 v60_device::opMULUH()
+uint32_t v60_device::opMULUH()
{
- UINT16 apph;
- UINT32 tmp;
+ uint16_t apph;
+ uint32_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
// @@@ OV not set!!
- tmp = apph * (UINT16)m_op1;
+ tmp = apph * (uint16_t)m_op1;
apph = tmp;
_Z = (apph == 0);
_S = ((apph & 0x8000) != 0);
@@ -1085,16 +1085,16 @@ UINT32 v60_device::opMULUH()
F12END();
}
-UINT32 v60_device::opMULUW()
+uint32_t v60_device::opMULUW()
{
- UINT32 appw;
- UINT64 tmp;
+ uint32_t appw;
+ uint64_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
// @@@ OV not set!!
- tmp = (UINT64)appw * (UINT64)m_op1;
+ tmp = (uint64_t)appw * (uint64_t)m_op1;
appw = tmp;
_Z = (appw == 0);
_S = ((appw & 0x80000000) != 0);
@@ -1104,40 +1104,40 @@ UINT32 v60_device::opMULUW()
F12END();
}
-UINT32 v60_device::opNEGB() /* TRUSTED (C too!)*/
+uint32_t v60_device::opNEGB() /* TRUSTED (C too!)*/
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
m_modwritevalb = 0;
- SUBB(m_modwritevalb, (INT8)m_op1);
+ SUBB(m_modwritevalb, (int8_t)m_op1);
F12WriteSecondOperand(0);
F12END();
}
-UINT32 v60_device::opNEGH() /* TRUSTED (C too!)*/
+uint32_t v60_device::opNEGH() /* TRUSTED (C too!)*/
{
F12DecodeFirstOperand(&v60_device::ReadAM, 1);
m_modwritevalh = 0;
- SUBW(m_modwritevalh, (INT16)m_op1);
+ SUBW(m_modwritevalh, (int16_t)m_op1);
F12WriteSecondOperand(1);
F12END();
}
-UINT32 v60_device::opNEGW() /* TRUSTED (C too!)*/
+uint32_t v60_device::opNEGW() /* TRUSTED (C too!)*/
{
F12DecodeFirstOperand(&v60_device::ReadAM, 2);
m_modwritevalw = 0;
- SUBL(m_modwritevalw, (INT32)m_op1);
+ SUBL(m_modwritevalw, (int32_t)m_op1);
F12WriteSecondOperand(2);
F12END();
}
-UINT32 v60_device::opNOTB() /* TRUSTED */
+uint32_t v60_device::opNOTB() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
m_modwritevalb=~m_op1;
@@ -1150,7 +1150,7 @@ UINT32 v60_device::opNOTB() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opNOTH() /* TRUSTED */
+uint32_t v60_device::opNOTH() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 1);
m_modwritevalh=~m_op1;
@@ -1163,7 +1163,7 @@ UINT32 v60_device::opNOTH() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opNOTW() /* TRUSTED */
+uint32_t v60_device::opNOTW() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 2);
m_modwritevalw=~m_op1;
@@ -1176,9 +1176,9 @@ UINT32 v60_device::opNOTW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opNOT1() /* TRUSTED */
+uint32_t v60_device::opNOT1() /* TRUSTED */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
@@ -1195,76 +1195,76 @@ UINT32 v60_device::opNOT1() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opORB() /* TRUSTED (C too!)*/
+uint32_t v60_device::opORB() /* TRUSTED (C too!)*/
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- ORB(appb, (UINT8)m_op1);
+ ORB(appb, (uint8_t)m_op1);
F12STOREOP2BYTE();
F12END();
}
-UINT32 v60_device::opORH() /* TRUSTED (C too!)*/
+uint32_t v60_device::opORH() /* TRUSTED (C too!)*/
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- ORW(apph, (UINT16)m_op1);
+ ORW(apph, (uint16_t)m_op1);
F12STOREOP2HALF();
F12END();
}
-UINT32 v60_device::opORW() /* TRUSTED (C too!) */
+uint32_t v60_device::opORW() /* TRUSTED (C too!) */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
- ORL(appw, (UINT32)m_op1);
+ ORL(appw, (uint32_t)m_op1);
F12STOREOP2WORD();
F12END();
}
-UINT32 v60_device::opOUTB()
+uint32_t v60_device::opOUTB()
{
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 2);
- m_io->write_byte(m_op2,(UINT8)m_op1);
+ m_io->write_byte(m_op2,(uint8_t)m_op1);
F12END();
}
-UINT32 v60_device::opOUTH()
+uint32_t v60_device::opOUTH()
{
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 2);
- m_io->write_word_unaligned(m_op2,(UINT16)m_op1);
+ m_io->write_word_unaligned(m_op2,(uint16_t)m_op1);
F12END();
}
-UINT32 v60_device::opOUTW()
+uint32_t v60_device::opOUTW()
{
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
m_io->write_dword_unaligned(m_op2, m_op1);
F12END();
}
-UINT32 v60_device::opREMB()
+uint32_t v60_device::opREMB()
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
_OV = 0;
if (m_op1)
- appb= (INT8)appb % (INT8)m_op1;
+ appb= (int8_t)appb % (int8_t)m_op1;
_Z = (appb == 0);
_S = ((appb & 0x80) != 0);
@@ -1272,16 +1272,16 @@ UINT32 v60_device::opREMB()
F12END();
}
-UINT32 v60_device::opREMH()
+uint32_t v60_device::opREMH()
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
_OV = 0;
if (m_op1)
- apph = (INT16)apph % (INT16)m_op1;
+ apph = (int16_t)apph % (int16_t)m_op1;
_Z = (apph == 0);
_S = ((apph & 0x8000) != 0);
@@ -1289,16 +1289,16 @@ UINT32 v60_device::opREMH()
F12END();
}
-UINT32 v60_device::opREMW()
+uint32_t v60_device::opREMW()
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
_OV = 0;
if (m_op1)
- appw = (INT32)appw % (INT32)m_op1;
+ appw = (int32_t)appw % (int32_t)m_op1;
_Z = (appw == 0);
_S = ((appw & 0x80000000) != 0);
@@ -1306,16 +1306,16 @@ UINT32 v60_device::opREMW()
F12END();
}
-UINT32 v60_device::opREMUB()
+uint32_t v60_device::opREMUB()
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
_OV = 0;
if (m_op1)
- appb %= (UINT8)m_op1;
+ appb %= (uint8_t)m_op1;
_Z = (appb == 0);
_S = ((appb & 0x80) != 0);
@@ -1323,16 +1323,16 @@ UINT32 v60_device::opREMUB()
F12END();
}
-UINT32 v60_device::opREMUH()
+uint32_t v60_device::opREMUH()
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
_OV = 0;
if (m_op1)
- apph %= (UINT16)m_op1;
+ apph %= (uint16_t)m_op1;
_Z = (apph == 0);
_S = ((apph & 0x8000) != 0);
@@ -1340,9 +1340,9 @@ UINT32 v60_device::opREMUH()
F12END();
}
-UINT32 v60_device::opREMUW()
+uint32_t v60_device::opREMUW()
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
@@ -1357,16 +1357,16 @@ UINT32 v60_device::opREMUW()
F12END();
}
-UINT32 v60_device::opROTB() /* TRUSTED */
+uint32_t v60_device::opROTB() /* TRUSTED */
{
- UINT8 appb;
- INT8 i, count;
+ uint8_t appb;
+ int8_t i, count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
if (count > 0)
{
for (i = 0;i < count;i++)
@@ -1393,16 +1393,16 @@ UINT32 v60_device::opROTB() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opROTH() /* TRUSTED */
+uint32_t v60_device::opROTH() /* TRUSTED */
{
- UINT16 apph;
- INT8 i, count;
+ uint16_t apph;
+ int8_t i, count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
if (count > 0)
{
for (i = 0;i < count;i++)
@@ -1429,16 +1429,16 @@ UINT32 v60_device::opROTH() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opROTW() /* TRUSTED */
+uint32_t v60_device::opROTW() /* TRUSTED */
{
- UINT32 appw;
- INT8 i, count;
+ uint32_t appw;
+ int8_t i, count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
if (count > 0)
{
for (i = 0;i < count;i++)
@@ -1465,23 +1465,23 @@ UINT32 v60_device::opROTW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opROTCB() /* TRUSTED */
+uint32_t v60_device::opROTCB() /* TRUSTED */
{
- UINT8 appb;
- INT8 i, cy, count;
+ uint8_t appb;
+ int8_t i, cy, count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
NORMALIZEFLAGS();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
if (count > 0)
{
for (i = 0;i < count;i++)
{
cy = _CY;
- _CY = (UINT8)((appb & 0x80) >> 7);
+ _CY = (uint8_t)((appb & 0x80) >> 7);
appb = (appb << 1) | cy;
}
}
@@ -1506,23 +1506,23 @@ UINT32 v60_device::opROTCB() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opROTCH() /* TRUSTED */
+uint32_t v60_device::opROTCH() /* TRUSTED */
{
- UINT16 apph;
- INT8 i, cy, count;
+ uint16_t apph;
+ int8_t i, cy, count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
NORMALIZEFLAGS();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
if (count > 0)
{
for (i = 0;i < count;i++)
{
cy = _CY;
- _CY = (UINT8)((apph & 0x8000) >> 15);
+ _CY = (uint8_t)((apph & 0x8000) >> 15);
apph = (apph << 1) | cy;
}
}
@@ -1532,8 +1532,8 @@ UINT32 v60_device::opROTCH() /* TRUSTED */
for (i = 0;i < count;i++)
{
cy = _CY;
- _CY = (UINT8)(apph & 1);
- apph = (apph >> 1) | ((UINT16)cy << 15);
+ _CY = (uint8_t)(apph & 1);
+ apph = (apph >> 1) | ((uint16_t)cy << 15);
}
}
else
@@ -1547,23 +1547,23 @@ UINT32 v60_device::opROTCH() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opROTCW() /* TRUSTED */
+uint32_t v60_device::opROTCW() /* TRUSTED */
{
- UINT32 appw;
- INT8 i, cy, count;
+ uint32_t appw;
+ int8_t i, cy, count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
NORMALIZEFLAGS();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
if (count > 0)
{
for (i = 0;i < count;i++)
{
cy = _CY;
- _CY = (UINT8)((appw & 0x80000000) >> 31);
+ _CY = (uint8_t)((appw & 0x80000000) >> 31);
appw = (appw << 1) | cy;
}
}
@@ -1573,8 +1573,8 @@ UINT32 v60_device::opROTCW() /* TRUSTED */
for (i = 0;i < count;i++)
{
cy = _CY;
- _CY = (UINT8)(appw & 1);
- appw = (appw >> 1) | ((UINT32)cy << 31);
+ _CY = (uint8_t)(appw & 1);
+ appw = (appw >> 1) | ((uint32_t)cy << 31);
}
}
else
@@ -1588,11 +1588,11 @@ UINT32 v60_device::opROTCW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opRVBIT()
+uint32_t v60_device::opRVBIT()
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
- m_modwritevalb =(UINT8)
+ m_modwritevalb =(uint8_t)
(((m_op1 & (1 << 0)) << 7) |
((m_op1 & (1 << 1)) << 5) |
((m_op1 & (1 << 2)) << 3) |
@@ -1606,7 +1606,7 @@ UINT32 v60_device::opRVBIT()
F12END();
}
-UINT32 v60_device::opRVBYT() /* TRUSTED */
+uint32_t v60_device::opRVBYT() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 2);
@@ -1619,9 +1619,9 @@ UINT32 v60_device::opRVBYT() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opSET1() /* TRUSTED */
+uint32_t v60_device::opSET1() /* TRUSTED */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
@@ -1636,7 +1636,7 @@ UINT32 v60_device::opSET1() /* TRUSTED */
}
-UINT32 v60_device::opSETF()
+uint32_t v60_device::opSETF()
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
@@ -1717,7 +1717,7 @@ UINT32 v60_device::opSETF()
/*
#define SHIFTLEFT_OY(val, count, bitsize) \
{\
- UINT32 tmp = ((val) >> (bitsize - 1)) & 1; \
+ uint32_t tmp = ((val) >> (bitsize - 1)) & 1; \
tmp <<= count; \
tmp -= 1; \
tmp <<= (bitsize - (count)); \
@@ -1729,7 +1729,7 @@ UINT32 v60_device::opSETF()
// During the shift, the overflow is set if the sign bit changes at any point during the shift
#define SHIFTLEFT_OV(val, count, bitsize) \
{\
- UINT32 tmp; \
+ uint32_t tmp; \
if (count == 32) \
tmp = 0xFFFFFFFF; \
else \
@@ -1742,7 +1742,7 @@ UINT32 v60_device::opSETF()
}
#define SHIFTLEFT_CY(val, count, bitsize) \
- _CY = (UINT8)(((val) >> (bitsize - count)) & 1);
+ _CY = (uint8_t)(((val) >> (bitsize - count)) & 1);
@@ -1750,20 +1750,20 @@ UINT32 v60_device::opSETF()
_OV = 0;
#define SHIFTARITHMETICRIGHT_CY(val, count, bitsize) \
- _CY = (UINT8)(((val) >> (count - 1)) & 1);
+ _CY = (uint8_t)(((val) >> (count - 1)) & 1);
-UINT32 v60_device::opSHAB()
+uint32_t v60_device::opSHAB()
{
- UINT8 appb;
- INT8 count;
+ uint8_t appb;
+ int8_t count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
// Special case: destination unchanged, flags set
if (count == 0)
@@ -1797,7 +1797,7 @@ UINT32 v60_device::opSHAB()
if (count >= 8)
appb = (appb & 0x80) ? 0xFF : 0;
else
- appb = ((INT8)appb) >> count;
+ appb = ((int8_t)appb) >> count;
SetSZPF_Byte(appb);
}
@@ -1808,16 +1808,16 @@ UINT32 v60_device::opSHAB()
F12END();
}
-UINT32 v60_device::opSHAH()
+uint32_t v60_device::opSHAH()
{
- UINT16 apph;
- INT8 count;
+ uint16_t apph;
+ int8_t count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
// Special case: destination unchanged, flags set
if (count == 0)
@@ -1851,7 +1851,7 @@ UINT32 v60_device::opSHAH()
if (count >= 16)
apph = (apph & 0x8000) ? 0xFFFF : 0;
else
- apph = ((INT16)apph) >> count;
+ apph = ((int16_t)apph) >> count;
SetSZPF_Word(apph);
}
@@ -1862,16 +1862,16 @@ UINT32 v60_device::opSHAH()
F12END();
}
-UINT32 v60_device::opSHAW()
+uint32_t v60_device::opSHAW()
{
- UINT32 appw;
- INT8 count;
+ uint32_t appw;
+ int8_t count;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
// Special case: destination unchanged, flags set
if (count == 0)
@@ -1905,7 +1905,7 @@ UINT32 v60_device::opSHAW()
if (count >= 32)
appw = (appw & 0x80000000) ? 0xFFFFFFFF : 0;
else
- appw = ((INT32)appw) >> count;
+ appw = ((int32_t)appw) >> count;
SetSZPF_Long(appw);
}
@@ -1917,17 +1917,17 @@ UINT32 v60_device::opSHAW()
}
-UINT32 v60_device::opSHLB() /* TRUSTED */
+uint32_t v60_device::opSHLB() /* TRUSTED */
{
- UINT8 appb;
- INT8 count;
- UINT32 tmp;
+ uint8_t appb;
+ int8_t count;
+ uint32_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
if (count > 0)
{
// left shift flags:
@@ -1962,7 +1962,7 @@ UINT32 v60_device::opSHLB() /* TRUSTED */
// overflow always cleared
tmp = appb & 0xff;
tmp >>= ((-count) - 1);
- _CY = (UINT8)(tmp & 0x1);
+ _CY = (uint8_t)(tmp & 0x1);
_OV = 0;
appb >>= -count;
@@ -1976,17 +1976,17 @@ UINT32 v60_device::opSHLB() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opSHLH() /* TRUSTED */
+uint32_t v60_device::opSHLH() /* TRUSTED */
{
- UINT16 apph;
- INT8 count;
- UINT32 tmp;
+ uint16_t apph;
+ int8_t count;
+ uint32_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
// osd_printf_debug("apph: %x count: %d ", apph, count);
if (count > 0)
{
@@ -2022,7 +2022,7 @@ UINT32 v60_device::opSHLH() /* TRUSTED */
// overflow always cleared
tmp = apph & 0xffff;
tmp >>= ((-count) - 1);
- _CY = (UINT8)(tmp & 0x1);
+ _CY = (uint8_t)(tmp & 0x1);
_OV = 0;
apph >>= -count;
@@ -2036,17 +2036,17 @@ UINT32 v60_device::opSHLH() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opSHLW() /* TRUSTED */
+uint32_t v60_device::opSHLW() /* TRUSTED */
{
- UINT32 appw;
- INT8 count;
- UINT64 tmp;
+ uint32_t appw;
+ int8_t count;
+ uint64_t tmp;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
- count = (INT8)(m_op1 & 0xFF);
+ count = (int8_t)(m_op1 & 0xFF);
if (count > 0)
{
// left shift flags:
@@ -2079,9 +2079,9 @@ UINT32 v60_device::opSHLW() /* TRUSTED */
// right shift flags:
// carry = last bit shifted out
// overflow always cleared
- tmp = (UINT64)(appw & 0xffffffff);
+ tmp = (uint64_t)(appw & 0xffffffff);
tmp >>= ((-count) - 1);
- _CY = (UINT8)(tmp & 0x1);
+ _CY = (uint8_t)(tmp & 0x1);
_OV = 0;
appw >>= -count;
@@ -2095,7 +2095,7 @@ UINT32 v60_device::opSHLW() /* TRUSTED */
F12END();
}
-UINT32 v60_device::opSTPR()
+uint32_t v60_device::opSTPR()
{
F12DecodeFirstOperand(&v60_device::ReadAM, 2);
if (m_op1 <= 28)
@@ -2109,94 +2109,94 @@ UINT32 v60_device::opSTPR()
}
-UINT32 v60_device::opSUBB() /* TRUSTED (C too!) */
+uint32_t v60_device::opSUBB() /* TRUSTED (C too!) */
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- SUBB(appb, (UINT8)m_op1);
+ SUBB(appb, (uint8_t)m_op1);
F12STOREOP2BYTE();
F12END();
}
-UINT32 v60_device::opSUBH() /* TRUSTED (C too!) */
+uint32_t v60_device::opSUBH() /* TRUSTED (C too!) */
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- SUBW(apph, (UINT16)m_op1);
+ SUBW(apph, (uint16_t)m_op1);
F12STOREOP2HALF();
F12END();
}
-UINT32 v60_device::opSUBW() /* TRUSTED (C too!) */
+uint32_t v60_device::opSUBW() /* TRUSTED (C too!) */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
- SUBL(appw, (UINT32)m_op1);
+ SUBL(appw, (uint32_t)m_op1);
F12STOREOP2WORD();
F12END();
}
-UINT32 v60_device::opSUBCB()
+uint32_t v60_device::opSUBCB()
{
- UINT8 appb;
- UINT8 src;
+ uint8_t appb;
+ uint8_t src;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- src = (UINT8)m_op1 + (_CY?1:0);
+ src = (uint8_t)m_op1 + (_CY?1:0);
SUBB(appb, src);
F12STOREOP2BYTE();
F12END();
}
-UINT32 v60_device::opSUBCH()
+uint32_t v60_device::opSUBCH()
{
- UINT16 apph;
- UINT16 src;
+ uint16_t apph;
+ uint16_t src;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- src = (UINT16)m_op1 + (_CY?1:0);
+ src = (uint16_t)m_op1 + (_CY?1:0);
SUBW(apph, src);
F12STOREOP2HALF();
F12END();
}
-UINT32 v60_device::opSUBCW()
+uint32_t v60_device::opSUBCW()
{
- UINT32 appw;
- UINT32 src;
+ uint32_t appw;
+ uint32_t src;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
- src = (UINT32)m_op1 + (_CY?1:0);
+ src = (uint32_t)m_op1 + (_CY?1:0);
SUBL(appw, src);
F12STOREOP2WORD();
F12END();
}
-UINT32 v60_device::opTEST1()
+uint32_t v60_device::opTEST1()
{
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAM, 2);
@@ -2206,7 +2206,7 @@ UINT32 v60_device::opTEST1()
F12END();
}
-UINT32 v60_device::opUPDPSWW()
+uint32_t v60_device::opUPDPSWW()
{
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAM, 2);
@@ -2218,7 +2218,7 @@ UINT32 v60_device::opUPDPSWW()
F12END();
}
-UINT32 v60_device::opUPDPSWH()
+uint32_t v60_device::opUPDPSWH()
{
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAM, 2);
@@ -2230,9 +2230,9 @@ UINT32 v60_device::opUPDPSWH()
F12END();
}
-UINT32 v60_device::opXCHB() /* TRUSTED */
+uint32_t v60_device::opXCHB() /* TRUSTED */
{
- UINT8 appb, temp;
+ uint8_t appb, temp;
F12DecodeOperands(&v60_device::ReadAMAddress, 0,&v60_device::ReadAMAddress, 0);
@@ -2246,9 +2246,9 @@ UINT32 v60_device::opXCHB() /* TRUSTED */
F12END()
}
-UINT32 v60_device::opXCHH() /* TRUSTED */
+uint32_t v60_device::opXCHH() /* TRUSTED */
{
- UINT16 apph, temp;
+ uint16_t apph, temp;
F12DecodeOperands(&v60_device::ReadAMAddress, 1,&v60_device::ReadAMAddress, 1);
@@ -2262,9 +2262,9 @@ UINT32 v60_device::opXCHH() /* TRUSTED */
F12END()
}
-UINT32 v60_device::opXCHW() /* TRUSTED */
+uint32_t v60_device::opXCHW() /* TRUSTED */
{
- UINT32 appw, temp;
+ uint32_t appw, temp;
F12DecodeOperands(&v60_device::ReadAMAddress, 2,&v60_device::ReadAMAddress, 2);
@@ -2278,49 +2278,49 @@ UINT32 v60_device::opXCHW() /* TRUSTED */
F12END()
}
-UINT32 v60_device::opXORB() /* TRUSTED (C too!) */
+uint32_t v60_device::opXORB() /* TRUSTED (C too!) */
{
- UINT8 appb;
+ uint8_t appb;
F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0);
F12LOADOP2BYTE();
- XORB(appb, (UINT8)m_op1);
+ XORB(appb, (uint8_t)m_op1);
F12STOREOP2BYTE();
F12END();
}
-UINT32 v60_device::opXORH() /* TRUSTED (C too!) */
+uint32_t v60_device::opXORH() /* TRUSTED (C too!) */
{
- UINT16 apph;
+ uint16_t apph;
F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1);
F12LOADOP2HALF();
- XORW(apph, (UINT16)m_op1);
+ XORW(apph, (uint16_t)m_op1);
F12STOREOP2HALF();
F12END();
}
-UINT32 v60_device::opXORW() /* TRUSTED (C too!) */
+uint32_t v60_device::opXORW() /* TRUSTED (C too!) */
{
- UINT32 appw;
+ uint32_t appw;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2);
F12LOADOP2WORD();
- XORL(appw, (UINT32)m_op1);
+ XORL(appw, (uint32_t)m_op1);
F12STOREOP2WORD();
F12END();
}
-UINT32 v60_device::opMULX()
+uint32_t v60_device::opMULX()
{
- INT32 a, b;
- INT64 res;
+ int32_t a, b;
+ int64_t res;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 3);
@@ -2333,10 +2333,10 @@ UINT32 v60_device::opMULX()
a = m_program->read_dword_unaligned(m_op2);
}
- res = (INT64)a * (INT64)(INT32)m_op1;
+ res = (int64_t)a * (int64_t)(int32_t)m_op1;
- b = (INT32)((res >> 32)&0xffffffff);
- a = (INT32)(res & 0xffffffff);
+ b = (int32_t)((res >> 32)&0xffffffff);
+ a = (int32_t)(res & 0xffffffff);
_S = ((b & 0x80000000) != 0);
_Z = (a == 0 && b == 0);
@@ -2355,10 +2355,10 @@ UINT32 v60_device::opMULX()
F12END();
}
-UINT32 v60_device::opMULUX()
+uint32_t v60_device::opMULUX()
{
- INT32 a, b;
- UINT64 res;
+ int32_t a, b;
+ uint64_t res;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 3);
@@ -2371,9 +2371,9 @@ UINT32 v60_device::opMULUX()
a = m_program->read_dword_unaligned(m_op2);
}
- res = (UINT64)a * (UINT64)m_op1;
- b = (INT32)((res >> 32)&0xffffffff);
- a = (INT32)(res & 0xffffffff);
+ res = (uint64_t)a * (uint64_t)m_op1;
+ b = (int32_t)((res >> 32)&0xffffffff);
+ a = (int32_t)(res & 0xffffffff);
_S = ((b & 0x80000000) != 0);
_Z = (a == 0 && b == 0);
diff --git a/src/devices/cpu/v60/op2.hxx b/src/devices/cpu/v60/op2.hxx
index 98a8612f345..8d7be235dce 100644
--- a/src/devices/cpu/v60/op2.hxx
+++ b/src/devices/cpu/v60/op2.hxx
@@ -16,7 +16,7 @@
else \
m_program->write_dword_unaligned(m_op##num, f2u(appf));
-void v60_device::F2DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1)
+void v60_device::F2DecodeFirstOperand(am_func DecodeOp1, uint8_t dim1)
{
m_moddim = dim1;
m_modm = m_instflags & 0x40;
@@ -26,7 +26,7 @@ void v60_device::F2DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1)
m_flag1 = m_amflag;
}
-void v60_device::F2DecodeSecondOperand(am_func DecodeOp2, UINT8 dim2)
+void v60_device::F2DecodeSecondOperand(am_func DecodeOp2, uint8_t dim2)
{
m_moddim = dim2;
m_modm = m_instflags & 0x20;
@@ -36,7 +36,7 @@ void v60_device::F2DecodeSecondOperand(am_func DecodeOp2, UINT8 dim2)
m_flag2 = m_amflag;
}
-void v60_device::F2WriteSecondOperand(UINT8 dim2)
+void v60_device::F2WriteSecondOperand(uint8_t dim2)
{
m_moddim = dim2;
m_modm = m_instflags & 0x20;
@@ -44,14 +44,14 @@ void v60_device::F2WriteSecondOperand(UINT8 dim2)
m_amlength2 = WriteAM();
}
-UINT32 v60_device::opCVTWS()
+uint32_t v60_device::opCVTWS()
{
float val;
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
// Convert to float
- val = (float)(INT32)m_op1;
+ val = (float)(int32_t)m_op1;
m_modwritevalw = f2u(val);
_OV = 0;
@@ -63,15 +63,15 @@ UINT32 v60_device::opCVTWS()
F2END();
}
-UINT32 v60_device::opCVTSW()
+uint32_t v60_device::opCVTSW()
{
float val;
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
- // Convert to UINT32
+ // Convert to uint32_t
val = u2f(m_op1);
- m_modwritevalw = (UINT32)val;
+ m_modwritevalw = (uint32_t)val;
_OV = 0;
_CY =(val < 0.0f);
@@ -82,7 +82,7 @@ UINT32 v60_device::opCVTSW()
F2END();
}
-UINT32 v60_device::opMOVFS()
+uint32_t v60_device::opMOVFS()
{
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
m_modwritevalw = m_op1;
@@ -90,7 +90,7 @@ UINT32 v60_device::opMOVFS()
F2END();
}
-UINT32 v60_device::opNEGFS()
+uint32_t v60_device::opNEGFS()
{
float appf;
@@ -108,7 +108,7 @@ UINT32 v60_device::opNEGFS()
F2END()
}
-UINT32 v60_device::opABSFS()
+uint32_t v60_device::opABSFS()
{
float appf;
@@ -129,9 +129,9 @@ UINT32 v60_device::opABSFS()
F2END()
}
-UINT32 v60_device::opADDFS()
+uint32_t v60_device::opADDFS()
{
- UINT32 appw;
+ uint32_t appw;
float appf;
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
@@ -150,9 +150,9 @@ UINT32 v60_device::opADDFS()
F2END()
}
-UINT32 v60_device::opSUBFS()
+uint32_t v60_device::opSUBFS()
{
- UINT32 appw;
+ uint32_t appw;
float appf;
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
@@ -171,9 +171,9 @@ UINT32 v60_device::opSUBFS()
F2END()
}
-UINT32 v60_device::opMULFS()
+uint32_t v60_device::opMULFS()
{
- UINT32 appw;
+ uint32_t appw;
float appf;
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
@@ -192,9 +192,9 @@ UINT32 v60_device::opMULFS()
F2END()
}
-UINT32 v60_device::opDIVFS()
+uint32_t v60_device::opDIVFS()
{
- UINT32 appw;
+ uint32_t appw;
float appf;
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
@@ -213,9 +213,9 @@ UINT32 v60_device::opDIVFS()
F2END()
}
-UINT32 v60_device::opSCLFS()
+uint32_t v60_device::opSCLFS()
{
- UINT32 appw;
+ uint32_t appw;
float appf;
F2DecodeFirstOperand(&v60_device::ReadAM, 1);
@@ -223,8 +223,8 @@ UINT32 v60_device::opSCLFS()
F2LOADOPFLOAT(2);
- if ((INT16)m_op1 < 0)
- appf /= 1 << -(INT16)m_op1;
+ if ((int16_t)m_op1 < 0)
+ appf /= 1 << -(int16_t)m_op1;
else
appf *= 1 << m_op1;
@@ -237,7 +237,7 @@ UINT32 v60_device::opSCLFS()
F2END()
}
-UINT32 v60_device::opCMPF()
+uint32_t v60_device::opCMPF()
{
float appf;
@@ -254,13 +254,13 @@ UINT32 v60_device::opCMPF()
F2END();
}
-UINT32 v60_device::op5FUNHANDLED()
+uint32_t v60_device::op5FUNHANDLED()
{
fatalerror("Unhandled 5F opcode at %08x\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::op5CUNHANDLED()
+uint32_t v60_device::op5CUNHANDLED()
{
fatalerror("Unhandled 5C opcode at %08x\n", PC);
return 0; /* never reached, fatalerror won't return */
@@ -340,14 +340,14 @@ const v60_device::am_func v60_device::s_Op5CTable[32] =
};
-UINT32 v60_device::op5F()
+uint32_t v60_device::op5F()
{
m_instflags = OpRead8(PC + 1);
return (this->*s_Op5FTable[m_instflags & 0x1F])();
}
-UINT32 v60_device::op5C()
+uint32_t v60_device::op5C()
{
m_instflags = OpRead8(PC + 1);
return (this->*s_Op5CTable[m_instflags & 0x1F])();
diff --git a/src/devices/cpu/v60/op3.hxx b/src/devices/cpu/v60/op3.hxx
index 0f014d40909..0dac42beaaf 100644
--- a/src/devices/cpu/v60/op3.hxx
+++ b/src/devices/cpu/v60/op3.hxx
@@ -1,15 +1,15 @@
// license:BSD-3-Clause
// copyright-holders:Farfetch'd, R. Belmont
-UINT32 v60_device::opINCB() /* TRUSTED */
+uint32_t v60_device::opINCB() /* TRUSTED */
{
- UINT8 appb;
+ uint8_t appb;
m_modadd = PC + 1;
m_moddim = 0;
m_amlength1 = ReadAMAddress();
if (m_amflag)
- appb = (UINT8)m_reg[m_amout];
+ appb = (uint8_t)m_reg[m_amout];
else
appb = m_program->read_byte(m_amout);
@@ -23,16 +23,16 @@ UINT32 v60_device::opINCB() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opINCH() /* TRUSTED */
+uint32_t v60_device::opINCH() /* TRUSTED */
{
- UINT16 apph;
+ uint16_t apph;
m_modadd = PC + 1;
m_moddim = 1;
m_amlength1 = ReadAMAddress();
if (m_amflag)
- apph = (UINT16)m_reg[m_amout];
+ apph = (uint16_t)m_reg[m_amout];
else
apph = m_program->read_word_unaligned(m_amout);
@@ -46,9 +46,9 @@ UINT32 v60_device::opINCH() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opINCW() /* TRUSTED */
+uint32_t v60_device::opINCW() /* TRUSTED */
{
- UINT32 appw;
+ uint32_t appw;
m_modadd = PC + 1;
m_moddim = 2;
@@ -69,16 +69,16 @@ UINT32 v60_device::opINCW() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opDECB() /* TRUSTED */
+uint32_t v60_device::opDECB() /* TRUSTED */
{
- UINT8 appb;
+ uint8_t appb;
m_modadd = PC + 1;
m_moddim = 0;
m_amlength1 = ReadAMAddress();
if (m_amflag)
- appb = (UINT8)m_reg[m_amout];
+ appb = (uint8_t)m_reg[m_amout];
else
appb = m_program->read_byte(m_amout);
@@ -92,16 +92,16 @@ UINT32 v60_device::opDECB() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opDECH() /* TRUSTED */
+uint32_t v60_device::opDECH() /* TRUSTED */
{
- UINT16 apph;
+ uint16_t apph;
m_modadd = PC + 1;
m_moddim = 1;
m_amlength1 = ReadAMAddress();
if (m_amflag)
- apph = (UINT16)m_reg[m_amout];
+ apph = (uint16_t)m_reg[m_amout];
else
apph = m_program->read_word_unaligned(m_amout);
@@ -115,9 +115,9 @@ UINT32 v60_device::opDECH() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opDECW() /* TRUSTED */
+uint32_t v60_device::opDECW() /* TRUSTED */
{
- UINT32 appw;
+ uint32_t appw;
m_modadd = PC + 1;
m_moddim = 2;
@@ -138,7 +138,7 @@ UINT32 v60_device::opDECW() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opJMP() /* TRUSTED */
+uint32_t v60_device::opJMP() /* TRUSTED */
{
m_modadd = PC + 1;
m_moddim = 0;
@@ -155,7 +155,7 @@ UINT32 v60_device::opJMP() /* TRUSTED */
return 0;
}
-UINT32 v60_device::opJSR() /* TRUSTED */
+uint32_t v60_device::opJSR() /* TRUSTED */
{
m_modadd = PC + 1;
m_moddim = 0;
@@ -176,7 +176,7 @@ UINT32 v60_device::opJSR() /* TRUSTED */
return 0;
}
-UINT32 v60_device::opPREPARE() /* somewhat TRUSTED */
+uint32_t v60_device::opPREPARE() /* somewhat TRUSTED */
{
m_modadd = PC + 1;
m_moddim = 2;
@@ -197,7 +197,7 @@ UINT32 v60_device::opPREPARE() /* somewhat TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opRET() /* TRUSTED */
+uint32_t v60_device::opRET() /* TRUSTED */
{
m_modadd = PC + 1;
m_moddim = 2;
@@ -219,9 +219,9 @@ UINT32 v60_device::opRET() /* TRUSTED */
return 0;
}
-UINT32 v60_device::opTRAP()
+uint32_t v60_device::opTRAP()
{
- UINT32 oldPSW;
+ uint32_t oldPSW;
m_modadd = PC + 1;
m_moddim = 0;
@@ -299,9 +299,9 @@ UINT32 v60_device::opTRAP()
return 0;
}
-UINT32 v60_device::opRETIU() /* TRUSTED */
+uint32_t v60_device::opRETIU() /* TRUSTED */
{
- UINT32 newPSW;
+ uint32_t newPSW;
m_modadd = PC + 1;
m_moddim = 1;
@@ -323,9 +323,9 @@ UINT32 v60_device::opRETIU() /* TRUSTED */
return 0;
}
-UINT32 v60_device::opRETIS()
+uint32_t v60_device::opRETIS()
{
- UINT32 newPSW;
+ uint32_t newPSW;
m_modadd = PC + 1;
m_moddim = 1;
@@ -348,10 +348,10 @@ UINT32 v60_device::opRETIS()
return 0;
}
-UINT32 v60_device::opSTTASK()
+uint32_t v60_device::opSTTASK()
{
int i;
- UINT32 adr;
+ uint32_t adr;
m_modadd = PC + 1;
m_moddim = 2;
@@ -394,7 +394,7 @@ UINT32 v60_device::opSTTASK()
return m_amlength1 + 1;
}
-UINT32 v60_device::opGETPSW()
+uint32_t v60_device::opGETPSW()
{
m_modadd = PC + 1;
m_moddim = 2;
@@ -406,18 +406,18 @@ UINT32 v60_device::opGETPSW()
return m_amlength1 + 1;
}
-UINT32 v60_device::opTASI()
+uint32_t v60_device::opTASI()
{
- UINT8 appb;
+ uint8_t appb;
m_modadd = PC + 1;
m_moddim = 0;
// Load the address of the operand
m_amlength1 = ReadAMAddress();
- // Load UINT8 from the address
+ // Load uint8_t from the address
if (m_amflag)
- appb = (UINT8)m_reg[m_amout & 0x1F];
+ appb = (uint8_t)m_reg[m_amout & 0x1F];
else
appb = m_program->read_byte(m_amout);
@@ -433,7 +433,7 @@ UINT32 v60_device::opTASI()
return m_amlength1 + 1;
}
-UINT32 v60_device::opCLRTLB()
+uint32_t v60_device::opCLRTLB()
{
m_modadd = PC + 1;
m_moddim = 2;
@@ -446,7 +446,7 @@ UINT32 v60_device::opCLRTLB()
return m_amlength1 + 1;
}
-UINT32 v60_device::opPOPM()
+uint32_t v60_device::opPOPM()
{
int i;
@@ -472,7 +472,7 @@ UINT32 v60_device::opPOPM()
return m_amlength1 + 1;
}
-UINT32 v60_device::opPUSHM()
+uint32_t v60_device::opPUSHM()
{
int i;
@@ -499,7 +499,7 @@ UINT32 v60_device::opPUSHM()
return m_amlength1 + 1;
}
-UINT32 v60_device::opTESTB() /* TRUSTED */
+uint32_t v60_device::opTESTB() /* TRUSTED */
{
m_modadd = PC + 1;
m_moddim = 0;
@@ -515,7 +515,7 @@ UINT32 v60_device::opTESTB() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opTESTH() /* TRUSTED */
+uint32_t v60_device::opTESTH() /* TRUSTED */
{
m_modadd = PC + 1;
m_moddim = 1;
@@ -531,7 +531,7 @@ UINT32 v60_device::opTESTH() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opTESTW() /* TRUSTED */
+uint32_t v60_device::opTESTW() /* TRUSTED */
{
m_modadd = PC + 1;
m_moddim = 2;
@@ -547,7 +547,7 @@ UINT32 v60_device::opTESTW() /* TRUSTED */
return m_amlength1 + 1;
}
-UINT32 v60_device::opPUSH()
+uint32_t v60_device::opPUSH()
{
m_modadd = PC + 1;
m_moddim = 2;
@@ -560,7 +560,7 @@ UINT32 v60_device::opPUSH()
return m_amlength1 + 1;
}
-UINT32 v60_device::opPOP()
+uint32_t v60_device::opPOP()
{
m_modadd = PC + 1;
m_moddim = 2;
@@ -572,70 +572,70 @@ UINT32 v60_device::opPOP()
}
-UINT32 v60_device::opINCB_0() { m_modm = 0; return opINCB(); }
-UINT32 v60_device::opINCB_1() { m_modm = 1; return opINCB(); }
-UINT32 v60_device::opINCH_0() { m_modm = 0; return opINCH(); }
-UINT32 v60_device::opINCH_1() { m_modm = 1; return opINCH(); }
-UINT32 v60_device::opINCW_0() { m_modm = 0; return opINCW(); }
-UINT32 v60_device::opINCW_1() { m_modm = 1; return opINCW(); }
+uint32_t v60_device::opINCB_0() { m_modm = 0; return opINCB(); }
+uint32_t v60_device::opINCB_1() { m_modm = 1; return opINCB(); }
+uint32_t v60_device::opINCH_0() { m_modm = 0; return opINCH(); }
+uint32_t v60_device::opINCH_1() { m_modm = 1; return opINCH(); }
+uint32_t v60_device::opINCW_0() { m_modm = 0; return opINCW(); }
+uint32_t v60_device::opINCW_1() { m_modm = 1; return opINCW(); }
-UINT32 v60_device::opDECB_0() { m_modm = 0; return opDECB(); }
-UINT32 v60_device::opDECB_1() { m_modm = 1; return opDECB(); }
-UINT32 v60_device::opDECH_0() { m_modm = 0; return opDECH(); }
-UINT32 v60_device::opDECH_1() { m_modm = 1; return opDECH(); }
-UINT32 v60_device::opDECW_0() { m_modm = 0; return opDECW(); }
-UINT32 v60_device::opDECW_1() { m_modm = 1; return opDECW(); }
+uint32_t v60_device::opDECB_0() { m_modm = 0; return opDECB(); }
+uint32_t v60_device::opDECB_1() { m_modm = 1; return opDECB(); }
+uint32_t v60_device::opDECH_0() { m_modm = 0; return opDECH(); }
+uint32_t v60_device::opDECH_1() { m_modm = 1; return opDECH(); }
+uint32_t v60_device::opDECW_0() { m_modm = 0; return opDECW(); }
+uint32_t v60_device::opDECW_1() { m_modm = 1; return opDECW(); }
-UINT32 v60_device::opJMP_0() { m_modm = 0; return opJMP(); }
-UINT32 v60_device::opJMP_1() { m_modm = 1; return opJMP(); }
+uint32_t v60_device::opJMP_0() { m_modm = 0; return opJMP(); }
+uint32_t v60_device::opJMP_1() { m_modm = 1; return opJMP(); }
-UINT32 v60_device::opJSR_0() { m_modm = 0; return opJSR(); }
-UINT32 v60_device::opJSR_1() { m_modm = 1; return opJSR(); }
+uint32_t v60_device::opJSR_0() { m_modm = 0; return opJSR(); }
+uint32_t v60_device::opJSR_1() { m_modm = 1; return opJSR(); }
-UINT32 v60_device::opPREPARE_0() { m_modm = 0; return opPREPARE(); }
-UINT32 v60_device::opPREPARE_1() { m_modm = 1; return opPREPARE(); }
+uint32_t v60_device::opPREPARE_0() { m_modm = 0; return opPREPARE(); }
+uint32_t v60_device::opPREPARE_1() { m_modm = 1; return opPREPARE(); }
-UINT32 v60_device::opRET_0() { m_modm = 0; return opRET(); }
-UINT32 v60_device::opRET_1() { m_modm = 1; return opRET(); }
+uint32_t v60_device::opRET_0() { m_modm = 0; return opRET(); }
+uint32_t v60_device::opRET_1() { m_modm = 1; return opRET(); }
-UINT32 v60_device::opTRAP_0() { m_modm = 0; return opTRAP(); }
-UINT32 v60_device::opTRAP_1() { m_modm = 1; return opTRAP(); }
+uint32_t v60_device::opTRAP_0() { m_modm = 0; return opTRAP(); }
+uint32_t v60_device::opTRAP_1() { m_modm = 1; return opTRAP(); }
-UINT32 v60_device::opRETIU_0() { m_modm = 0; return opRETIU(); }
-UINT32 v60_device::opRETIU_1() { m_modm = 1; return opRETIU(); }
+uint32_t v60_device::opRETIU_0() { m_modm = 0; return opRETIU(); }
+uint32_t v60_device::opRETIU_1() { m_modm = 1; return opRETIU(); }
-UINT32 v60_device::opRETIS_0() { m_modm = 0; return opRETIS(); }
-UINT32 v60_device::opRETIS_1() { m_modm = 1; return opRETIS(); }
+uint32_t v60_device::opRETIS_0() { m_modm = 0; return opRETIS(); }
+uint32_t v60_device::opRETIS_1() { m_modm = 1; return opRETIS(); }
-UINT32 v60_device::opGETPSW_0() { m_modm = 0; return opGETPSW(); }
-UINT32 v60_device::opGETPSW_1() { m_modm = 1; return opGETPSW(); }
+uint32_t v60_device::opGETPSW_0() { m_modm = 0; return opGETPSW(); }
+uint32_t v60_device::opGETPSW_1() { m_modm = 1; return opGETPSW(); }
-UINT32 v60_device::opTASI_0() { m_modm = 0; return opTASI(); }
-UINT32 v60_device::opTASI_1() { m_modm = 1; return opTASI(); }
+uint32_t v60_device::opTASI_0() { m_modm = 0; return opTASI(); }
+uint32_t v60_device::opTASI_1() { m_modm = 1; return opTASI(); }
-UINT32 v60_device::opCLRTLB_0() { m_modm = 0; return opCLRTLB(); }
-UINT32 v60_device::opCLRTLB_1() { m_modm = 1; return opCLRTLB(); }
+uint32_t v60_device::opCLRTLB_0() { m_modm = 0; return opCLRTLB(); }
+uint32_t v60_device::opCLRTLB_1() { m_modm = 1; return opCLRTLB(); }
-UINT32 v60_device::opPOPM_0() { m_modm = 0; return opPOPM(); }
-UINT32 v60_device::opPOPM_1() { m_modm = 1; return opPOPM(); }
+uint32_t v60_device::opPOPM_0() { m_modm = 0; return opPOPM(); }
+uint32_t v60_device::opPOPM_1() { m_modm = 1; return opPOPM(); }
-UINT32 v60_device::opPUSHM_0() { m_modm = 0; return opPUSHM(); }
-UINT32 v60_device::opPUSHM_1() { m_modm = 1; return opPUSHM(); }
+uint32_t v60_device::opPUSHM_0() { m_modm = 0; return opPUSHM(); }
+uint32_t v60_device::opPUSHM_1() { m_modm = 1; return opPUSHM(); }
-UINT32 v60_device::opTESTB_0() { m_modm = 0; return opTESTB(); }
-UINT32 v60_device::opTESTB_1() { m_modm = 1; return opTESTB(); }
+uint32_t v60_device::opTESTB_0() { m_modm = 0; return opTESTB(); }
+uint32_t v60_device::opTESTB_1() { m_modm = 1; return opTESTB(); }
-UINT32 v60_device::opTESTH_0() { m_modm = 0; return opTESTH(); }
-UINT32 v60_device::opTESTH_1() { m_modm = 1; return opTESTH(); }
+uint32_t v60_device::opTESTH_0() { m_modm = 0; return opTESTH(); }
+uint32_t v60_device::opTESTH_1() { m_modm = 1; return opTESTH(); }
-UINT32 v60_device::opTESTW_0() { m_modm = 0; return opTESTW(); }
-UINT32 v60_device::opTESTW_1() { m_modm = 1; return opTESTW(); }
+uint32_t v60_device::opTESTW_0() { m_modm = 0; return opTESTW(); }
+uint32_t v60_device::opTESTW_1() { m_modm = 1; return opTESTW(); }
-UINT32 v60_device::opPUSH_0() { m_modm = 0; return opPUSH(); }
-UINT32 v60_device::opPUSH_1() { m_modm = 1; return opPUSH(); }
+uint32_t v60_device::opPUSH_0() { m_modm = 0; return opPUSH(); }
+uint32_t v60_device::opPUSH_1() { m_modm = 1; return opPUSH(); }
-UINT32 v60_device::opPOP_0() { m_modm = 0; return opPOP(); }
-UINT32 v60_device::opPOP_1() { m_modm = 1; return opPOP(); }
+uint32_t v60_device::opPOP_0() { m_modm = 0; return opPOP(); }
+uint32_t v60_device::opPOP_1() { m_modm = 1; return opPOP(); }
-UINT32 v60_device::opSTTASK_0() { m_modm = 0; return opSTTASK(); }
-UINT32 v60_device::opSTTASK_1() { m_modm = 1; return opSTTASK(); }
+uint32_t v60_device::opSTTASK_0() { m_modm = 0; return opSTTASK(); }
+uint32_t v60_device::opSTTASK_1() { m_modm = 1; return opSTTASK(); }
diff --git a/src/devices/cpu/v60/op4.hxx b/src/devices/cpu/v60/op4.hxx
index ca5b4cef4c6..edef480789a 100644
--- a/src/devices/cpu/v60/op4.hxx
+++ b/src/devices/cpu/v60/op4.hxx
@@ -4,26 +4,26 @@
FULLY TRUSTED
*/
-UINT32 v60_device::opBGT8() /* TRUSTED */
+uint32_t v60_device::opBGT8() /* TRUSTED */
{
NORMALIZEFLAGS();
if (!((_S ^ _OV) | _Z))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBGT16() /* TRUSTED */
+uint32_t v60_device::opBGT16() /* TRUSTED */
{
NORMALIZEFLAGS();
if (!((_S ^ _OV) | _Z))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
@@ -31,52 +31,52 @@ UINT32 v60_device::opBGT16() /* TRUSTED */
}
-UINT32 v60_device::opBGE8() /* TRUSTED */
+uint32_t v60_device::opBGE8() /* TRUSTED */
{
NORMALIZEFLAGS();
if (!(_S ^ _OV))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBGE16() /* TRUSTED */
+uint32_t v60_device::opBGE16() /* TRUSTED */
{
NORMALIZEFLAGS();
if (!(_S ^ _OV))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBLT8() /* TRUSTED */
+uint32_t v60_device::opBLT8() /* TRUSTED */
{
NORMALIZEFLAGS();
if ((_S ^ _OV))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBLT16() /* TRUSTED */
+uint32_t v60_device::opBLT16() /* TRUSTED */
{
NORMALIZEFLAGS();
if ((_S ^ _OV))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
@@ -84,271 +84,271 @@ UINT32 v60_device::opBLT16() /* TRUSTED */
}
-UINT32 v60_device::opBLE8() /* TRUSTED */
+uint32_t v60_device::opBLE8() /* TRUSTED */
{
NORMALIZEFLAGS();
if (((_S ^ _OV) | _Z))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBLE16() /* TRUSTED */
+uint32_t v60_device::opBLE16() /* TRUSTED */
{
NORMALIZEFLAGS();
if (((_S ^ _OV) | _Z))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBH8() /* TRUSTED */
+uint32_t v60_device::opBH8() /* TRUSTED */
{
if (!(_CY | _Z))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBH16() /* TRUSTED */
+uint32_t v60_device::opBH16() /* TRUSTED */
{
if (!(_CY | _Z))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBNH8() /* TRUSTED */
+uint32_t v60_device::opBNH8() /* TRUSTED */
{
if ((_CY | _Z))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBNH16() /* TRUSTED */
+uint32_t v60_device::opBNH16() /* TRUSTED */
{
if ((_CY | _Z))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBNL8() /* TRUSTED */
+uint32_t v60_device::opBNL8() /* TRUSTED */
{
if (!(_CY))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBNL16() /* TRUSTED */
+uint32_t v60_device::opBNL16() /* TRUSTED */
{
if (!(_CY))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBL8() /* TRUSTED */
+uint32_t v60_device::opBL8() /* TRUSTED */
{
if ((_CY))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBL16() /* TRUSTED */
+uint32_t v60_device::opBL16() /* TRUSTED */
{
if ((_CY))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBNE8() /* TRUSTED */
+uint32_t v60_device::opBNE8() /* TRUSTED */
{
if (!(_Z))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBNE16() /* TRUSTED */
+uint32_t v60_device::opBNE16() /* TRUSTED */
{
if (!(_Z))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBE8() /* TRUSTED */
+uint32_t v60_device::opBE8() /* TRUSTED */
{
if ((_Z))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBE16() /* TRUSTED */
+uint32_t v60_device::opBE16() /* TRUSTED */
{
if ((_Z))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBNV8() /* TRUSTED */
+uint32_t v60_device::opBNV8() /* TRUSTED */
{
if (!(_OV))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBNV16() /* TRUSTED */
+uint32_t v60_device::opBNV16() /* TRUSTED */
{
if (!(_OV))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBV8() /* TRUSTED */
+uint32_t v60_device::opBV8() /* TRUSTED */
{
if ((_OV))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBV16() /* TRUSTED */
+uint32_t v60_device::opBV16() /* TRUSTED */
{
if ((_OV))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBP8() /* TRUSTED */
+uint32_t v60_device::opBP8() /* TRUSTED */
{
if (!(_S))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBP16() /* TRUSTED */
+uint32_t v60_device::opBP16() /* TRUSTED */
{
if (!(_S))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBN8() /* TRUSTED */
+uint32_t v60_device::opBN8() /* TRUSTED */
{
if ((_S))
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
return 2;
}
-UINT32 v60_device::opBN16() /* TRUSTED */
+uint32_t v60_device::opBN16() /* TRUSTED */
{
if ((_S))
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
return 3;
}
-UINT32 v60_device::opBR8() /* TRUSTED */
+uint32_t v60_device::opBR8() /* TRUSTED */
{
- PC += (INT8)OpRead8(PC + 1);
+ PC += (int8_t)OpRead8(PC + 1);
return 0;
}
-UINT32 v60_device::opBR16() /* TRUSTED */
+uint32_t v60_device::opBR16() /* TRUSTED */
{
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
-UINT32 v60_device::opBSR() /* TRUSTED */
+uint32_t v60_device::opBSR() /* TRUSTED */
{
// Save Next PC onto the stack
SP -= 4;
m_program->write_dword_unaligned(SP, PC + 3);
// Jump to subroutine
- PC += (INT16)OpRead16(PC + 1);
+ PC += (int16_t)OpRead16(PC + 1);
return 0;
}
diff --git a/src/devices/cpu/v60/op5.hxx b/src/devices/cpu/v60/op5.hxx
index be6084eb6e1..a70a1809ce0 100644
--- a/src/devices/cpu/v60/op5.hxx
+++ b/src/devices/cpu/v60/op5.hxx
@@ -4,10 +4,10 @@
* HALT: must add log
*/
-UINT32 v60_device::opBRK()
+uint32_t v60_device::opBRK()
{
/*
- UINT32 oldPSW = v60_update_psw_for_exception(0, 0);
+ uint32_t oldPSW = v60_update_psw_for_exception(0, 0);
SP -=4;
m_program->write_dword_unaligned(SP, EXCEPTION_CODE_AND_SIZE(0x0d00, 4));
@@ -22,9 +22,9 @@ UINT32 v60_device::opBRK()
return 1;
}
-UINT32 v60_device::opBRKV()
+uint32_t v60_device::opBRKV()
{
- UINT32 oldPSW = v60_update_psw_for_exception(0, 0);
+ uint32_t oldPSW = v60_update_psw_for_exception(0, 0);
SP -=4;
m_program->write_dword_unaligned(SP, PC);
@@ -39,14 +39,14 @@ UINT32 v60_device::opBRKV()
return 0;
}
-UINT32 v60_device::opCLRTLBA()
+uint32_t v60_device::opCLRTLBA()
{
// @@@ TLB not yet supported
logerror("Skipping CLRTLBA opcode! PC=%x\n", PC);
return 1;
}
-UINT32 v60_device::opDISPOSE()
+uint32_t v60_device::opDISPOSE()
{
SP = FP;
FP = m_program->read_dword_unaligned(SP);
@@ -55,19 +55,19 @@ UINT32 v60_device::opDISPOSE()
return 1;
}
-UINT32 v60_device::opHALT()
+uint32_t v60_device::opHALT()
{
// @@@ It should wait for an interrupt to occur
//logerror("HALT found: skipping");
return 1;
}
-UINT32 v60_device::opNOP() /* TRUSTED */
+uint32_t v60_device::opNOP() /* TRUSTED */
{
return 1;
}
-UINT32 v60_device::opRSR()
+uint32_t v60_device::opRSR()
{
PC = m_program->read_dword_unaligned(SP);
SP +=4;
@@ -75,7 +75,7 @@ UINT32 v60_device::opRSR()
return 0;
}
-UINT32 v60_device::opTRAPFL()
+uint32_t v60_device::opTRAPFL()
{
if ((TKCW & 0x1F0) & ((v60ReadPSW() & 0x1F00) >> 4))
{
diff --git a/src/devices/cpu/v60/op6.hxx b/src/devices/cpu/v60/op6.hxx
index 087680534f9..d1286372cbd 100644
--- a/src/devices/cpu/v60/op6.hxx
+++ b/src/devices/cpu/v60/op6.hxx
@@ -4,39 +4,39 @@
FULLY TRUSTED
*/
-UINT32 v60_device::opTB(int reg) /* TRUSTED */
+uint32_t v60_device::opTB(int reg) /* TRUSTED */
{
if (m_reg[reg] == 0)
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBGT(int reg) /* TRUSTED */
+uint32_t v60_device::opDBGT(int reg) /* TRUSTED */
{
m_reg[reg]--;
NORMALIZEFLAGS();
if ((m_reg[reg] != 0) && !((_S ^ _OV) | _Z))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBLE(int reg) /* TRUSTED */
+uint32_t v60_device::opDBLE(int reg) /* TRUSTED */
{
m_reg[reg]--;
NORMALIZEFLAGS();
if ((m_reg[reg] != 0) && ((_S ^ _OV) | _Z))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
@@ -44,54 +44,54 @@ UINT32 v60_device::opDBLE(int reg) /* TRUSTED */
}
-UINT32 v60_device::opDBGE(int reg) /* TRUSTED */
+uint32_t v60_device::opDBGE(int reg) /* TRUSTED */
{
m_reg[reg]--;
NORMALIZEFLAGS();
if ((m_reg[reg] != 0) && !(_S ^ _OV))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBLT(int reg) /* TRUSTED */
+uint32_t v60_device::opDBLT(int reg) /* TRUSTED */
{
m_reg[reg]--;
NORMALIZEFLAGS();
if ((m_reg[reg] != 0) && (_S ^ _OV))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBH(int reg) /* TRUSTED */
+uint32_t v60_device::opDBH(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && !(_CY | _Z))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBNH(int reg) /* TRUSTED */
+uint32_t v60_device::opDBNH(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && (_CY | _Z))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
@@ -99,117 +99,117 @@ UINT32 v60_device::opDBNH(int reg) /* TRUSTED */
}
-UINT32 v60_device::opDBL(int reg) /* TRUSTED */
+uint32_t v60_device::opDBL(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && (_CY))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBNL(int reg) /* TRUSTED */
+uint32_t v60_device::opDBNL(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && !(_CY))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBE(int reg) /* TRUSTED */
+uint32_t v60_device::opDBE(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && (_Z))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBNE(int reg) /* TRUSTED */
+uint32_t v60_device::opDBNE(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && !(_Z))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBV(int reg) /* TRUSTED */
+uint32_t v60_device::opDBV(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && (_OV))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBNV(int reg) /* TRUSTED */
+uint32_t v60_device::opDBNV(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && !(_OV))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBN(int reg) /* TRUSTED */
+uint32_t v60_device::opDBN(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && (_S))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBP(int reg) /* TRUSTED */
+uint32_t v60_device::opDBP(int reg) /* TRUSTED */
{
m_reg[reg]--;
if ((m_reg[reg] != 0) && !(_S))
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
return 4;
}
-UINT32 v60_device::opDBR(int reg) /* TRUSTED */
+uint32_t v60_device::opDBR(int reg) /* TRUSTED */
{
m_reg[reg]--;
if (m_reg[reg] != 0)
{
- PC += (INT16)OpRead16(PC + 2);
+ PC += (int16_t)OpRead16(PC + 2);
return 0;
}
@@ -241,14 +241,14 @@ const v60_device::op6_func v60_device::s_OpC7Table[8] = /* TRUSTED */
};
-UINT32 v60_device::opC6() /* TRUSTED */
+uint32_t v60_device::opC6() /* TRUSTED */
{
- UINT8 appb = OpRead8(PC + 1);
+ uint8_t appb = OpRead8(PC + 1);
return (this->*s_OpC6Table[appb >> 5])(appb & 0x1f);
}
-UINT32 v60_device::opC7() /* TRUSTED */
+uint32_t v60_device::opC7() /* TRUSTED */
{
- UINT8 appb = OpRead8(PC + 1);
+ uint8_t appb = OpRead8(PC + 1);
return (this->*s_OpC7Table[appb >> 5])(appb & 0x1f);
}
diff --git a/src/devices/cpu/v60/op7a.hxx b/src/devices/cpu/v60/op7a.hxx
index 67a7b0fb82c..99634f84018 100644
--- a/src/devices/cpu/v60/op7a.hxx
+++ b/src/devices/cpu/v60/op7a.hxx
@@ -28,9 +28,9 @@
#define F7CCREATEBITMASK(x) \
x = ((1 << (x)) - 1)
-void v60_device::F7aDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2)
+void v60_device::F7aDecodeOperands(am_func DecodeOp1, uint8_t dim1, am_func DecodeOp2, uint8_t dim2)
{
- UINT8 appb;
+ uint8_t appb;
// Decode first operand
m_moddim = dim1;
m_modm = m_subop & 0x40;
@@ -62,9 +62,9 @@ void v60_device::F7aDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func Decode
m_lenop2 = appb;
}
-void v60_device::F7bDecodeFirstOperand(am_func DecodeOp1, UINT8 dim1)
+void v60_device::F7bDecodeFirstOperand(am_func DecodeOp1, uint8_t dim1)
{
- UINT8 appb;
+ uint8_t appb;
// Decode first operand
m_moddim = dim1;
m_modm = m_subop & 0x40;
@@ -82,7 +82,7 @@ void v60_device::F7bDecodeFirstOperand(am_func DecodeOp1, UINT8 dim1)
}
-void v60_device::F7bWriteSecondOperand(UINT8 dim2)
+void v60_device::F7bWriteSecondOperand(uint8_t dim2)
{
m_moddim = dim2;
m_modm = m_subop & 0x20;
@@ -91,7 +91,7 @@ void v60_device::F7bWriteSecondOperand(UINT8 dim2)
}
-void v60_device::F7bDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2)
+void v60_device::F7bDecodeOperands(am_func DecodeOp1, uint8_t dim1, am_func DecodeOp2, uint8_t dim2)
{
// Decode first operand
F7bDecodeFirstOperand(DecodeOp1, dim1);
@@ -107,9 +107,9 @@ void v60_device::F7bDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func Decode
m_bamoffset2 = m_bamoffset;
}
-void v60_device::F7cDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2)
+void v60_device::F7cDecodeOperands(am_func DecodeOp1, uint8_t dim1, am_func DecodeOp2, uint8_t dim2)
{
- UINT8 appb;
+ uint8_t appb;
// Decode first operand
m_moddim = dim1;
m_modm = m_subop & 0x40;
@@ -136,13 +136,13 @@ void v60_device::F7cDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func Decode
#define F7CLOADOP1BYTE(appb) \
if (m_flag1) \
- appb = (UINT8)(m_reg[m_op1]&0xFF); \
+ appb = (uint8_t)(m_reg[m_op1]&0xFF); \
else \
appb = m_program->read_byte(m_op1);
#define F7CLOADOP2BYTE(appb) \
if (m_flag2) \
- appb = (UINT8)(m_reg[m_op2]&0xFF); \
+ appb = (uint8_t)(m_reg[m_op2]&0xFF); \
else \
appb = m_program->read_byte(m_op2);
@@ -159,10 +159,10 @@ void v60_device::F7cDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func Decode
else \
m_program->write_word_unaligned(m_op2, apph);
-UINT32 v60_device::opCMPSTRB(UINT8 bFill, UINT8 bStop)
+uint32_t v60_device::opCMPSTRB(uint8_t bFill, uint8_t bStop)
{
- UINT32 i, dest;
- UINT8 c1, c2;
+ uint32_t i, dest;
+ uint8_t c1, c2;
F7aDecodeOperands(&v60_device::ReadAMAddress, 0,&v60_device::ReadAMAddress, 0);
@@ -172,12 +172,12 @@ UINT32 v60_device::opCMPSTRB(UINT8 bFill, UINT8 bStop)
if (m_lenop1 < m_lenop2)
{
for (i = m_lenop1; i < m_lenop2; i++)
- m_program->write_byte(m_op1 + i,(UINT8)R26);
+ m_program->write_byte(m_op1 + i,(uint8_t)R26);
}
else if (m_lenop2 < m_lenop1)
{
for (i = m_lenop2; i < m_lenop1; i++)
- m_program->write_byte(m_op2 + i,(UINT8)R26);
+ m_program->write_byte(m_op2 + i,(uint8_t)R26);
}
}
@@ -202,7 +202,7 @@ UINT32 v60_device::opCMPSTRB(UINT8 bFill, UINT8 bStop)
}
if (bStop)
- if (c1 == (UINT8)R26 || c2 == (UINT8)R26)
+ if (c1 == (uint8_t)R26 || c2 == (uint8_t)R26)
{
_CY = 0;
break;
@@ -225,10 +225,10 @@ UINT32 v60_device::opCMPSTRB(UINT8 bFill, UINT8 bStop)
F7AEND();
}
-UINT32 v60_device::opCMPSTRH(UINT8 bFill, UINT8 bStop)
+uint32_t v60_device::opCMPSTRH(uint8_t bFill, uint8_t bStop)
{
- UINT32 i, dest;
- UINT16 c1, c2;
+ uint32_t i, dest;
+ uint16_t c1, c2;
F7aDecodeOperands(&v60_device::ReadAMAddress, 0,&v60_device::ReadAMAddress, 0);
@@ -238,12 +238,12 @@ UINT32 v60_device::opCMPSTRH(UINT8 bFill, UINT8 bStop)
if (m_lenop1 < m_lenop2)
{
for (i = m_lenop1; i < m_lenop2; i++)
- m_program->write_word_unaligned(m_op1 + i * 2,(UINT16)R26);
+ m_program->write_word_unaligned(m_op1 + i * 2,(uint16_t)R26);
}
else if (m_lenop2 < m_lenop1)
{
for (i = m_lenop2; i < m_lenop1; i++)
- m_program->write_word_unaligned(m_op2 + i * 2,(UINT16)R26);
+ m_program->write_word_unaligned(m_op2 + i * 2,(uint16_t)R26);
}
}
@@ -268,7 +268,7 @@ UINT32 v60_device::opCMPSTRH(UINT8 bFill, UINT8 bStop)
}
if (bStop)
- if (c1 == (UINT16)R26 || c2 == (UINT16)R26)
+ if (c1 == (uint16_t)R26 || c2 == (uint16_t)R26)
{
_CY = 0;
break;
@@ -293,10 +293,10 @@ UINT32 v60_device::opCMPSTRH(UINT8 bFill, UINT8 bStop)
-UINT32 v60_device::opMOVSTRUB(UINT8 bFill, UINT8 bStop) /* TRUSTED (0, 0) (1, 0) */
+uint32_t v60_device::opMOVSTRUB(uint8_t bFill, uint8_t bStop) /* TRUSTED (0, 0) (1, 0) */
{
- UINT32 i, dest;
- UINT8 c1;
+ uint32_t i, dest;
+ uint8_t c1;
// if (bStop)
// {
@@ -311,7 +311,7 @@ UINT32 v60_device::opMOVSTRUB(UINT8 bFill, UINT8 bStop) /* TRUSTED (0, 0) (1, 0)
{
m_program->write_byte(m_op2 + i,(c1 = m_program->read_byte(m_op1 + i)));
- if (bStop && c1 == (UINT8)R26)
+ if (bStop && c1 == (uint8_t)R26)
break;
}
@@ -321,7 +321,7 @@ UINT32 v60_device::opMOVSTRUB(UINT8 bFill, UINT8 bStop) /* TRUSTED (0, 0) (1, 0)
if (bFill && m_lenop1 < m_lenop2)
{
for (;i < m_lenop2; i++)
- m_program->write_byte(m_op2 + i,(UINT8)R26);
+ m_program->write_byte(m_op2 + i,(uint8_t)R26);
R27 = m_op2 + i;
}
@@ -330,10 +330,10 @@ UINT32 v60_device::opMOVSTRUB(UINT8 bFill, UINT8 bStop) /* TRUSTED (0, 0) (1, 0)
F7AEND();
}
-UINT32 v60_device::opMOVSTRDB(UINT8 bFill, UINT8 bStop)
+uint32_t v60_device::opMOVSTRDB(uint8_t bFill, uint8_t bStop)
{
- UINT32 i, dest;
- UINT8 c1;
+ uint32_t i, dest;
+ uint8_t c1;
F7aDecodeOperands(&v60_device::ReadAMAddress, 0,&v60_device::ReadAMAddress, 0);
@@ -343,7 +343,7 @@ UINT32 v60_device::opMOVSTRDB(UINT8 bFill, UINT8 bStop)
{
m_program->write_byte(m_op2 + (dest - i - 1),(c1 = m_program->read_byte(m_op1 + (dest - i - 1))));
- if (bStop && c1 == (UINT8)R26)
+ if (bStop && c1 == (uint8_t)R26)
break;
}
@@ -353,7 +353,7 @@ UINT32 v60_device::opMOVSTRDB(UINT8 bFill, UINT8 bStop)
if (bFill && m_lenop1 < m_lenop2)
{
for (;i < m_lenop2; i++)
- m_program->write_byte(m_op2 + dest + (m_lenop2 - i - 1),(UINT8)R26);
+ m_program->write_byte(m_op2 + dest + (m_lenop2 - i - 1),(uint8_t)R26);
R27 = m_op2 + (m_lenop2 - i - 1);
}
@@ -363,10 +363,10 @@ UINT32 v60_device::opMOVSTRDB(UINT8 bFill, UINT8 bStop)
}
-UINT32 v60_device::opMOVSTRUH(UINT8 bFill, UINT8 bStop) /* TRUSTED (0, 0) (1, 0) */
+uint32_t v60_device::opMOVSTRUH(uint8_t bFill, uint8_t bStop) /* TRUSTED (0, 0) (1, 0) */
{
- UINT32 i, dest;
- UINT16 c1;
+ uint32_t i, dest;
+ uint16_t c1;
// if (bStop)
// { int a = 1; }
@@ -379,7 +379,7 @@ UINT32 v60_device::opMOVSTRUH(UINT8 bFill, UINT8 bStop) /* TRUSTED (0, 0) (1, 0)
{
m_program->write_word_unaligned(m_op2 + i * 2,(c1 = m_program->read_word_unaligned(m_op1 + i * 2)));
- if (bStop && c1 == (UINT16)R26)
+ if (bStop && c1 == (uint16_t)R26)
break;
}
@@ -389,7 +389,7 @@ UINT32 v60_device::opMOVSTRUH(UINT8 bFill, UINT8 bStop) /* TRUSTED (0, 0) (1, 0)
if (bFill && m_lenop1 < m_lenop2)
{
for (;i < m_lenop2; i++)
- m_program->write_word_unaligned(m_op2 + i * 2,(UINT16)R26);
+ m_program->write_word_unaligned(m_op2 + i * 2,(uint16_t)R26);
R27 = m_op2 + i * 2;
}
@@ -397,10 +397,10 @@ UINT32 v60_device::opMOVSTRUH(UINT8 bFill, UINT8 bStop) /* TRUSTED (0, 0) (1, 0)
F7AEND();
}
-UINT32 v60_device::opMOVSTRDH(UINT8 bFill, UINT8 bStop)
+uint32_t v60_device::opMOVSTRDH(uint8_t bFill, uint8_t bStop)
{
- UINT32 i, dest;
- UINT16 c1;
+ uint32_t i, dest;
+ uint16_t c1;
// if (bFill | bStop)
// { int a = 1; }
@@ -416,7 +416,7 @@ UINT32 v60_device::opMOVSTRDH(UINT8 bFill, UINT8 bStop)
{
m_program->write_word_unaligned(m_op2 + (dest - i - 1) * 2,(c1 = m_program->read_word_unaligned(m_op1 + (dest - i - 1) * 2)));
- if (bStop && c1 == (UINT16)R26)
+ if (bStop && c1 == (uint16_t)R26)
break;
}
@@ -426,7 +426,7 @@ UINT32 v60_device::opMOVSTRDH(UINT8 bFill, UINT8 bStop)
if (bFill && m_lenop1 < m_lenop2)
{
for (;i < m_lenop2; i++)
- m_program->write_word_unaligned(m_op2 + (m_lenop2 - i - 1) * 2,(UINT16)R26);
+ m_program->write_word_unaligned(m_op2 + (m_lenop2 - i - 1) * 2,(uint16_t)R26);
R27 = m_op2 + (m_lenop2 - i - 1) * 2;
}
@@ -434,16 +434,16 @@ UINT32 v60_device::opMOVSTRDH(UINT8 bFill, UINT8 bStop)
F7AEND();
}
-UINT32 v60_device::opSEARCHUB(UINT8 bSearch)
+uint32_t v60_device::opSEARCHUB(uint8_t bSearch)
{
- UINT8 appb;
- UINT32 i;
+ uint8_t appb;
+ uint32_t i;
F7bDecodeOperands(&v60_device::ReadAMAddress, 0,&v60_device::ReadAM, 0);
for (i = 0; i < m_lenop1; i++)
{
- appb = (m_program->read_byte(m_op1 + i) == (UINT8)m_op2);
+ appb = (m_program->read_byte(m_op1 + i) == (uint8_t)m_op2);
if ((bSearch && appb) || (!bSearch && !appb))
break;
}
@@ -460,16 +460,16 @@ UINT32 v60_device::opSEARCHUB(UINT8 bSearch)
F7BEND();
}
-UINT32 v60_device::opSEARCHUH(UINT8 bSearch)
+uint32_t v60_device::opSEARCHUH(uint8_t bSearch)
{
- UINT8 appb;
- UINT32 i;
+ uint8_t appb;
+ uint32_t i;
F7bDecodeOperands(&v60_device::ReadAMAddress, 1,&v60_device::ReadAM, 1);
for (i = 0; i < m_lenop1; i++)
{
- appb = (m_program->read_word_unaligned(m_op1 + i * 2) == (UINT16)m_op2);
+ appb = (m_program->read_word_unaligned(m_op1 + i * 2) == (uint16_t)m_op2);
if ((bSearch && appb) || (!bSearch && !appb))
break;
}
@@ -485,16 +485,16 @@ UINT32 v60_device::opSEARCHUH(UINT8 bSearch)
F7BEND();
}
-UINT32 v60_device::opSEARCHDB(UINT8 bSearch)
+uint32_t v60_device::opSEARCHDB(uint8_t bSearch)
{
- UINT8 appb;
- INT32 i;
+ uint8_t appb;
+ int32_t i;
F7bDecodeOperands(&v60_device::ReadAMAddress, 0,&v60_device::ReadAM, 0);
for (i = m_lenop1; i >= 0; i--)
{
- appb = (m_program->read_byte(m_op1 + i) == (UINT8)m_op2);
+ appb = (m_program->read_byte(m_op1 + i) == (uint8_t)m_op2);
if ((bSearch && appb) || (!bSearch && !appb))
break;
}
@@ -503,7 +503,7 @@ UINT32 v60_device::opSEARCHDB(UINT8 bSearch)
R27 = i;
// This is the opposite as stated in V60 manual...
- if ((UINT32)i != m_lenop1)
+ if ((uint32_t)i != m_lenop1)
_Z = 0;
else
_Z = 1;
@@ -511,16 +511,16 @@ UINT32 v60_device::opSEARCHDB(UINT8 bSearch)
F7BEND();
}
-UINT32 v60_device::opSEARCHDH(UINT8 bSearch)
+uint32_t v60_device::opSEARCHDH(uint8_t bSearch)
{
- UINT8 appb;
- INT32 i;
+ uint8_t appb;
+ int32_t i;
F7bDecodeOperands(&v60_device::ReadAMAddress, 1,&v60_device::ReadAM, 1);
for (i = m_lenop1 - 1; i >= 0; i--)
{
- appb = (m_program->read_word_unaligned(m_op1 + i * 2) == (UINT16)m_op2);
+ appb = (m_program->read_word_unaligned(m_op1 + i * 2) == (uint16_t)m_op2);
if ((bSearch && appb) || (!bSearch && !appb))
break;
}
@@ -528,7 +528,7 @@ UINT32 v60_device::opSEARCHDH(UINT8 bSearch)
R28 = m_op1 + i * 2;
R27 = i;
- if ((UINT32)i != m_lenop1)
+ if ((uint32_t)i != m_lenop1)
_Z = 0;
else
_Z = 1;
@@ -537,35 +537,35 @@ UINT32 v60_device::opSEARCHDH(UINT8 bSearch)
}
-UINT32 v60_device::opSCHCUB() { return opSEARCHUB(1); }
-UINT32 v60_device::opSCHCUH() { return opSEARCHUH(1); }
-UINT32 v60_device::opSCHCDB() { return opSEARCHDB(1); }
-UINT32 v60_device::opSCHCDH() { return opSEARCHDH(1); }
-UINT32 v60_device::opSKPCUB() { return opSEARCHUB(0); }
-UINT32 v60_device::opSKPCUH() { return opSEARCHUH(0); }
-UINT32 v60_device::opSKPCDB() { return opSEARCHDB(0); }
-UINT32 v60_device::opSKPCDH() { return opSEARCHDH(0); }
-
-UINT32 v60_device::opCMPCB() { return opCMPSTRB(0, 0); }
-UINT32 v60_device::opCMPCH() { return opCMPSTRH(0, 0); }
-UINT32 v60_device::opCMPCFB() { return opCMPSTRB(1, 0); }
-UINT32 v60_device::opCMPCFH() { return opCMPSTRH(1, 0); }
-UINT32 v60_device::opCMPCSB() { return opCMPSTRB(0, 1); }
-UINT32 v60_device::opCMPCSH() { return opCMPSTRH(0, 1); }
-
-UINT32 v60_device::opMOVCUB() { return opMOVSTRUB(0, 0); }
-UINT32 v60_device::opMOVCUH() { return opMOVSTRUH(0, 0); }
-UINT32 v60_device::opMOVCFUB() { return opMOVSTRUB(1, 0); }
-UINT32 v60_device::opMOVCFUH() { return opMOVSTRUH(1, 0); }
-UINT32 v60_device::opMOVCSUB() { return opMOVSTRUB(0, 1); }
-UINT32 v60_device::opMOVCSUH() { return opMOVSTRUH(0, 1); }
-
-UINT32 v60_device::opMOVCDB() { return opMOVSTRDB(0, 0); }
-UINT32 v60_device::opMOVCDH() { return opMOVSTRDH(0, 0); }
-UINT32 v60_device::opMOVCFDB() { return opMOVSTRDB(1, 0); }
-UINT32 v60_device::opMOVCFDH() { return opMOVSTRDH(1, 0); }
-
-UINT32 v60_device::opEXTBFZ() /* TRUSTED */
+uint32_t v60_device::opSCHCUB() { return opSEARCHUB(1); }
+uint32_t v60_device::opSCHCUH() { return opSEARCHUH(1); }
+uint32_t v60_device::opSCHCDB() { return opSEARCHDB(1); }
+uint32_t v60_device::opSCHCDH() { return opSEARCHDH(1); }
+uint32_t v60_device::opSKPCUB() { return opSEARCHUB(0); }
+uint32_t v60_device::opSKPCUH() { return opSEARCHUH(0); }
+uint32_t v60_device::opSKPCDB() { return opSEARCHDB(0); }
+uint32_t v60_device::opSKPCDH() { return opSEARCHDH(0); }
+
+uint32_t v60_device::opCMPCB() { return opCMPSTRB(0, 0); }
+uint32_t v60_device::opCMPCH() { return opCMPSTRH(0, 0); }
+uint32_t v60_device::opCMPCFB() { return opCMPSTRB(1, 0); }
+uint32_t v60_device::opCMPCFH() { return opCMPSTRH(1, 0); }
+uint32_t v60_device::opCMPCSB() { return opCMPSTRB(0, 1); }
+uint32_t v60_device::opCMPCSH() { return opCMPSTRH(0, 1); }
+
+uint32_t v60_device::opMOVCUB() { return opMOVSTRUB(0, 0); }
+uint32_t v60_device::opMOVCUH() { return opMOVSTRUH(0, 0); }
+uint32_t v60_device::opMOVCFUB() { return opMOVSTRUB(1, 0); }
+uint32_t v60_device::opMOVCFUH() { return opMOVSTRUH(1, 0); }
+uint32_t v60_device::opMOVCSUB() { return opMOVSTRUB(0, 1); }
+uint32_t v60_device::opMOVCSUH() { return opMOVSTRUH(0, 1); }
+
+uint32_t v60_device::opMOVCDB() { return opMOVSTRDB(0, 0); }
+uint32_t v60_device::opMOVCDH() { return opMOVSTRDH(0, 0); }
+uint32_t v60_device::opMOVCFDB() { return opMOVSTRDB(1, 0); }
+uint32_t v60_device::opMOVCFDH() { return opMOVSTRDH(1, 0); }
+
+uint32_t v60_device::opEXTBFZ() /* TRUSTED */
{
F7bDecodeFirstOperand(&v60_device::BitReadAM, 11);
@@ -578,7 +578,7 @@ UINT32 v60_device::opEXTBFZ() /* TRUSTED */
F7BEND();
}
-UINT32 v60_device::opEXTBFS() /* TRUSTED */
+uint32_t v60_device::opEXTBFS() /* TRUSTED */
{
F7bDecodeFirstOperand(&v60_device::BitReadAM, 11);
@@ -593,9 +593,9 @@ UINT32 v60_device::opEXTBFS() /* TRUSTED */
F7BEND();
}
-UINT32 v60_device::opEXTBFL()
+uint32_t v60_device::opEXTBFL()
{
- UINT32 appw;
+ uint32_t appw;
F7bDecodeFirstOperand(&v60_device::BitReadAM, 11);
@@ -610,14 +610,14 @@ UINT32 v60_device::opEXTBFL()
F7BEND();
}
-UINT32 v60_device::opSCHBS(UINT32 bSearch1)
+uint32_t v60_device::opSCHBS(uint32_t bSearch1)
{
- UINT32 i, data;
- UINT32 offset;
+ uint32_t i, data;
+ uint32_t offset;
F7bDecodeFirstOperand(&v60_device::BitReadAMAddress, 10);
- // Read first UINT8
+ // Read first uint8_t
m_op1 += m_bamoffset / 8;
data = m_program->read_byte(m_op1);
offset = m_bamoffset & 7;
@@ -637,7 +637,7 @@ UINT32 v60_device::opSCHBS(UINT32 bSearch1)
offset++;
if (offset == 8)
{
- // Next UINT8 please
+ // Next uint8_t please
offset = 0;
m_op1++;
data = m_program->read_byte(m_op1);
@@ -654,12 +654,12 @@ UINT32 v60_device::opSCHBS(UINT32 bSearch1)
F7BEND();
}
-UINT32 v60_device::opSCH0BSU() { return opSCHBS(0); }
-UINT32 v60_device::opSCH1BSU() { return opSCHBS(1); }
+uint32_t v60_device::opSCH0BSU() { return opSCHBS(0); }
+uint32_t v60_device::opSCH1BSU() { return opSCHBS(1); }
-UINT32 v60_device::opINSBFR()
+uint32_t v60_device::opINSBFR()
{
- UINT32 appw;
+ uint32_t appw;
F7cDecodeOperands(&v60_device::ReadAM, 2,&v60_device::BitReadAMAddress, 11);
F7CCREATEBITMASK(m_lenop1);
@@ -676,9 +676,9 @@ UINT32 v60_device::opINSBFR()
F7CEND();
}
-UINT32 v60_device::opINSBFL()
+uint32_t v60_device::opINSBFL()
{
- UINT32 appw;
+ uint32_t appw;
F7cDecodeOperands(&v60_device::ReadAM, 2,&v60_device::BitReadAMAddress, 11);
m_op1 >>= (32 - m_lenop1);
@@ -697,10 +697,10 @@ UINT32 v60_device::opINSBFL()
F7CEND();
}
-UINT32 v60_device::opMOVBSD()
+uint32_t v60_device::opMOVBSD()
{
- UINT32 i;
- UINT8 srcdata, dstdata;
+ uint32_t i;
+ uint8_t srcdata, dstdata;
F7bDecodeOperands(&v60_device::BitReadAMAddress, 10, &v60_device::BitReadAMAddress, 10);
@@ -753,10 +753,10 @@ UINT32 v60_device::opMOVBSD()
F7BEND();
}
-UINT32 v60_device::opMOVBSU()
+uint32_t v60_device::opMOVBSU()
{
- UINT32 i;
- UINT8 srcdata, dstdata;
+ uint32_t i;
+ uint8_t srcdata, dstdata;
F7bDecodeOperands(&v60_device::BitReadAMAddress, 10, &v60_device::BitReadAMAddress, 10);
@@ -804,10 +804,10 @@ UINT32 v60_device::opMOVBSU()
// RADM 0x20f4b8 holds the time left
-UINT32 v60_device::opADDDC()
+uint32_t v60_device::opADDDC()
{
- UINT8 appb;
- UINT8 src, dst;
+ uint8_t appb;
+ uint8_t src, dst;
F7cDecodeOperands(&v60_device::ReadAM, 0, &v60_device::ReadAMAddress, 0);
@@ -818,7 +818,7 @@ UINT32 v60_device::opADDDC()
F7CLOADOP2BYTE(appb);
- src = (UINT8)(m_op1 >> 4) * 10 + (UINT8)(m_op1 & 0xF);
+ src = (uint8_t)(m_op1 >> 4) * 10 + (uint8_t)(m_op1 & 0xF);
dst = (appb >> 4) * 10 + (appb & 0xF);
appb = src + dst + (_CY?1:0);
@@ -843,10 +843,10 @@ UINT32 v60_device::opADDDC()
F7CEND();
}
-UINT32 v60_device::opSUBDC()
+uint32_t v60_device::opSUBDC()
{
- INT8 appb;
- UINT32 src, dst;
+ int8_t appb;
+ uint32_t src, dst;
F7cDecodeOperands(&v60_device::ReadAM, 0, &v60_device::ReadAMAddress, 0);
@@ -857,11 +857,11 @@ UINT32 v60_device::opSUBDC()
F7CLOADOP2BYTE(appb);
- src = (UINT32)(m_op1 >> 4) * 10 + (UINT32)(m_op1 & 0xF);
+ src = (uint32_t)(m_op1 >> 4) * 10 + (uint32_t)(m_op1 & 0xF);
dst = ((appb & 0xF0) >> 4) * 10 + (appb & 0xF);
// Note that this APPB must be SIGNED!
- appb = (INT32)dst - (INT32)src - (_CY?1:0);
+ appb = (int32_t)dst - (int32_t)src - (_CY?1:0);
if (appb < 0)
{
@@ -883,10 +883,10 @@ UINT32 v60_device::opSUBDC()
F7CEND();
}
-UINT32 v60_device::opSUBRDC()
+uint32_t v60_device::opSUBRDC()
{
- INT8 appb;
- UINT32 src, dst;
+ int8_t appb;
+ uint32_t src, dst;
F7cDecodeOperands(&v60_device::ReadAM, 0, &v60_device::ReadAMAddress, 0);
@@ -897,11 +897,11 @@ UINT32 v60_device::opSUBRDC()
F7CLOADOP2BYTE(appb);
- src = (UINT32)(m_op1 >> 4) * 10 + (UINT32)(m_op1 & 0xF);
+ src = (uint32_t)(m_op1 >> 4) * 10 + (uint32_t)(m_op1 & 0xF);
dst = ((appb & 0xF0) >> 4) * 10 + (appb & 0xF);
// Note that this APPB must be SIGNED!
- appb = (INT32)src - (INT32)dst - (_CY?1:0);
+ appb = (int32_t)src - (int32_t)dst - (_CY?1:0);
if (appb < 0)
{
@@ -923,13 +923,13 @@ UINT32 v60_device::opSUBRDC()
F7CEND();
}
-UINT32 v60_device::opCVTDPZ()
+uint32_t v60_device::opCVTDPZ()
{
- UINT16 apph;
+ uint16_t apph;
F7cDecodeOperands(&v60_device::ReadAM, 0, &v60_device::ReadAMAddress, 1);
- apph = (UINT16)(((m_op1 >> 4) & 0xF) | ((m_op1 & 0xF) << 8));
+ apph = (uint16_t)(((m_op1 >> 4) & 0xF) | ((m_op1 & 0xF) << 8));
apph |= (m_lenop1);
apph |= (m_lenop1 << 8);
@@ -940,9 +940,9 @@ UINT32 v60_device::opCVTDPZ()
F7CEND();
}
-UINT32 v60_device::opCVTDZP()
+uint32_t v60_device::opCVTDZP()
{
- UINT8 appb;
+ uint8_t appb;
F7cDecodeOperands(&v60_device::ReadAM, 1, &v60_device::ReadAMAddress, 0);
if ((m_op1 & 0xF0) != (m_lenop1 & 0xF0) || ((m_op1 >> 8) & 0xF0) != (m_lenop1 & 0xF0))
@@ -957,38 +957,38 @@ UINT32 v60_device::opCVTDZP()
logerror("CVTD.ZP Decimal exception #2!\n");
}
- appb = (UINT8)(((m_op1 >> 8) & 0xF) | ((m_op1 & 0xF) << 4));
+ appb = (uint8_t)(((m_op1 >> 8) & 0xF) | ((m_op1 & 0xF) << 4));
if (appb != 0) _Z = 0;
F7CSTOREOP2BYTE();
F7CEND();
}
-UINT32 v60_device::op58UNHANDLED()
+uint32_t v60_device::op58UNHANDLED()
{
fatalerror("Unhandled 58 opcode at PC: /%06x\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::op5AUNHANDLED()
+uint32_t v60_device::op5AUNHANDLED()
{
fatalerror("Unhandled 5A opcode at PC: /%06x\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::op5BUNHANDLED()
+uint32_t v60_device::op5BUNHANDLED()
{
fatalerror("Unhandled 5B opcode at PC: /%06x\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::op5DUNHANDLED()
+uint32_t v60_device::op5DUNHANDLED()
{
fatalerror("Unhandled 5D opcode at PC: /%06x\n", PC);
return 0; /* never reached, fatalerror won't return */
}
-UINT32 v60_device::op59UNHANDLED()
+uint32_t v60_device::op59UNHANDLED()
{
fatalerror("Unhandled 59 opcode at PC: /%06x\n", PC);
return 0; /* never reached, fatalerror won't return */
@@ -1176,35 +1176,35 @@ const v60_device::am_func v60_device::s_Op5ATable[32] =
&v60_device::op5AUNHANDLED
};
-UINT32 v60_device::op58()
+uint32_t v60_device::op58()
{
m_subop = OpRead8(PC + 1);
return (this->*s_Op58Table[m_subop & 0x1F])();
}
-UINT32 v60_device::op5A()
+uint32_t v60_device::op5A()
{
m_subop = OpRead8(PC + 1);
return (this->*s_Op5ATable[m_subop & 0x1F])();
}
-UINT32 v60_device::op5B()
+uint32_t v60_device::op5B()
{
m_subop = OpRead8(PC + 1);
return (this->*s_Op5BTable[m_subop & 0x1F])();
}
-UINT32 v60_device::op5D()
+uint32_t v60_device::op5D()
{
m_subop = OpRead8(PC + 1);
return (this->*s_Op5DTable[m_subop & 0x1F])();
}
-UINT32 v60_device::op59()
+uint32_t v60_device::op59()
{
m_subop = OpRead8(PC + 1);
diff --git a/src/devices/cpu/v60/v60.cpp b/src/devices/cpu/v60/v60.cpp
index 009a7cf66a7..831a826c035 100644
--- a/src/devices/cpu/v60/v60.cpp
+++ b/src/devices/cpu/v60/v60.cpp
@@ -81,7 +81,7 @@ const device_type V60 = &device_creator<v60_device>;
const device_type V70 = &device_creator<v70_device>;
-v60_device::v60_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v60_device::v60_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, V60, "V60", tag, owner, clock, "v60", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 16, 24, 0)
@@ -94,7 +94,7 @@ v60_device::v60_device(const machine_config &mconfig, const char *tag, device_t
}
-v60_device::v60_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+v60_device::v60_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 16, 24, 0)
@@ -106,20 +106,20 @@ v60_device::v60_device(const machine_config &mconfig, device_type type, const ch
m_reg[45] = 0x00007000;
}
-v70_device::v70_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v70_device::v70_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: v60_device(mconfig, V70, "V70", tag, owner, clock, "v70", __FILE__)
{
}
-offs_t v60_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t v60_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( v60 );
return CPU_DISASSEMBLE_NAME(v60)(this, buffer, pc, oprom, opram, options);
}
-offs_t v70_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t v70_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( v70 );
return CPU_DISASSEMBLE_NAME(v70)(this, buffer, pc, oprom, opram, options);
@@ -158,14 +158,14 @@ offs_t v70_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opro
#define SetCFB(x) {_CY = ((x) & 0x100) ? 1 : 0; }
#define SetCFW(x) {_CY = ((x) & 0x10000) ? 1 : 0; }
-#define SetCFL(x) {_CY = ((x) & (((UINT64)1) << 32)) ? 1 : 0; }
+#define SetCFL(x) {_CY = ((x) & (((uint64_t)1) << 32)) ? 1 : 0; }
#define SetSF(x) (_S = (x))
#define SetZF(x) (_Z = (x))
-#define SetSZPF_Byte(x) {_Z = ((UINT8)(x) == 0); _S = ((x)&0x80) ? 1 : 0; }
-#define SetSZPF_Word(x) {_Z = ((UINT16)(x) == 0); _S = ((x)&0x8000) ? 1 : 0; }
-#define SetSZPF_Long(x) {_Z = ((UINT32)(x) == 0); _S = ((x)&0x80000000) ? 1 : 0; }
+#define SetSZPF_Byte(x) {_Z = ((uint8_t)(x) == 0); _S = ((x)&0x80) ? 1 : 0; }
+#define SetSZPF_Word(x) {_Z = ((uint16_t)(x) == 0); _S = ((x)&0x8000) ? 1 : 0; }
+#define SetSZPF_Long(x) {_Z = ((uint32_t)(x) == 0); _S = ((x)&0x80000000) ? 1 : 0; }
#define ORB(dst, src) { (dst) |= (src); _CY = _OV = 0; SetSZPF_Byte(dst); }
#define ORW(dst, src) { (dst) |= (src); _CY = _OV = 0; SetSZPF_Word(dst); }
@@ -179,13 +179,13 @@ offs_t v70_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opro
#define XORW(dst, src) { (dst) ^= (src); _CY = _OV = 0; SetSZPF_Word(dst); }
#define XORL(dst, src) { (dst) ^= (src); _CY = _OV = 0; SetSZPF_Long(dst); }
-#define SUBB(dst, src) { unsigned res = (dst) - (src); SetCFB(res); SetOFB_Sub(res, src, dst); SetSZPF_Byte(res); dst = (UINT8)res; }
-#define SUBW(dst, src) { unsigned res = (dst) - (src); SetCFW(res); SetOFW_Sub(res, src, dst); SetSZPF_Word(res); dst = (UINT16)res; }
-#define SUBL(dst, src) { UINT64 res = (UINT64)(dst) - (INT64)(src); SetCFL(res); SetOFL_Sub(res, src, dst); SetSZPF_Long(res); dst = (UINT32)res; }
+#define SUBB(dst, src) { unsigned res = (dst) - (src); SetCFB(res); SetOFB_Sub(res, src, dst); SetSZPF_Byte(res); dst = (uint8_t)res; }
+#define SUBW(dst, src) { unsigned res = (dst) - (src); SetCFW(res); SetOFW_Sub(res, src, dst); SetSZPF_Word(res); dst = (uint16_t)res; }
+#define SUBL(dst, src) { uint64_t res = (uint64_t)(dst) - (int64_t)(src); SetCFL(res); SetOFL_Sub(res, src, dst); SetSZPF_Long(res); dst = (uint32_t)res; }
-#define ADDB(dst, src) { unsigned res = (dst) + (src); SetCFB(res); SetOFB_Add(res, src, dst); SetSZPF_Byte(res); dst = (UINT8)res; }
-#define ADDW(dst, src) { unsigned res = (dst) + (src); SetCFW(res); SetOFW_Add(res, src, dst); SetSZPF_Word(res); dst = (UINT16)res; }
-#define ADDL(dst, src) { UINT64 res = (UINT64)(dst) + (UINT64)(src); SetCFL(res); SetOFL_Add(res, src, dst); SetSZPF_Long(res); dst = (UINT32)res; }
+#define ADDB(dst, src) { unsigned res = (dst) + (src); SetCFB(res); SetOFB_Add(res, src, dst); SetSZPF_Byte(res); dst = (uint8_t)res; }
+#define ADDW(dst, src) { unsigned res = (dst) + (src); SetCFW(res); SetOFW_Add(res, src, dst); SetSZPF_Word(res); dst = (uint16_t)res; }
+#define ADDL(dst, src) { uint64_t res = (uint64_t)(dst) + (uint64_t)(src); SetCFL(res); SetOFL_Add(res, src, dst); SetSZPF_Long(res); dst = (uint32_t)res; }
#define SETREG8(a, b) (a) = ((a) & ~0xff) | ((b) & 0xff)
#define SETREG16(a, b) (a) = ((a) & ~0xffff) | ((b) & 0xffff)
@@ -296,14 +296,14 @@ void v60_device::v60ReloadStack()
SP = m_reg[37 + ((PSW >> 24) & 3)];
}
-UINT32 v60_device::v60ReadPSW()
+uint32_t v60_device::v60ReadPSW()
{
PSW &= 0xfffffff0;
PSW |= (_Z?1:0) | (_S?2:0) | (_OV?4:0) | (_CY?8:0);
return PSW;
}
-void v60_device::v60WritePSW(UINT32 newval)
+void v60_device::v60WritePSW(uint32_t newval)
{
/* determine if we need to save / restore the stacks */
int updateStack = 0;
@@ -322,10 +322,10 @@ void v60_device::v60WritePSW(UINT32 newval)
/* set the new value and update the flags */
PSW = newval;
- _Z = (UINT8)(PSW & 1);
- _S = (UINT8)(PSW & 2);
- _OV = (UINT8)(PSW & 4);
- _CY = (UINT8)(PSW & 8);
+ _Z = (uint8_t)(PSW & 1);
+ _S = (uint8_t)(PSW & 2);
+ _OV = (uint8_t)(PSW & 4);
+ _CY = (uint8_t)(PSW & 8);
/* fetch the new stack value */
if (updateStack)
@@ -333,10 +333,10 @@ void v60_device::v60WritePSW(UINT32 newval)
}
-UINT32 v60_device::v60_update_psw_for_exception(int is_interrupt, int target_level)
+uint32_t v60_device::v60_update_psw_for_exception(int is_interrupt, int target_level)
{
- UINT32 oldPSW = v60ReadPSW();
- UINT32 newPSW = oldPSW;
+ uint32_t oldPSW = v60ReadPSW();
+ uint32_t newPSW = oldPSW;
// Change to interrupt context
newPSW &= ~(3 << 24); // PSW.EL = 0
@@ -371,7 +371,7 @@ UINT32 v60_device::v60_update_psw_for_exception(int is_interrupt, int target_lev
#include "op6.hxx"
#include "op7a.hxx"
-UINT32 v60_device::opUNHANDLED()
+uint32_t v60_device::opUNHANDLED()
{
fatalerror("Unhandled OpCode found : %02x at %08x\n", OpRead16(PC), PC);
//return 0; /* never reached, fatalerror won't return */
@@ -552,7 +552,7 @@ void v60_device::stall()
void v60_device::v60_do_irq(int vector)
{
- UINT32 oldPSW = v60_update_psw_for_exception(1, 0);
+ uint32_t oldPSW = v60_update_psw_for_exception(1, 0);
// Push PC and PSW onto the stack
SP-=4;
@@ -608,7 +608,7 @@ void v60_device::execute_run()
while (m_icount > 0)
{
- UINT32 inc;
+ uint32_t inc;
m_PPC = PC;
debugger_instruction_hook(this, PC);
m_icount -= 8; /* fix me -- this is just an average */
diff --git a/src/devices/cpu/v60/v60.h b/src/devices/cpu/v60/v60.h
index acb1c70bfcf..2b6fa22b298 100644
--- a/src/devices/cpu/v60/v60.h
+++ b/src/devices/cpu/v60/v60.h
@@ -84,8 +84,8 @@ class v60_device : public cpu_device
{
public:
// construction/destruction
- v60_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- v60_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ v60_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ v60_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
void stall();
@@ -95,9 +95,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 1; }
- virtual UINT32 execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 1; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -109,13 +109,13 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 22; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 22; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
- typedef UINT32 (v60_device::*am_func)();
- typedef UINT32 (v60_device::*op6_func)(int reg);
+ typedef uint32_t (v60_device::*am_func)();
+ typedef uint32_t (v60_device::*op6_func)(int reg);
static const am_func s_AMTable1_G7a[16];
static const am_func s_BAMTable1_G7a[16];
@@ -153,618 +153,618 @@ private:
offs_t m_fetch_xor;
offs_t m_start_pc;
- UINT32 m_reg[68];
+ uint32_t m_reg[68];
struct {
- UINT8 CY;
- UINT8 OV;
- UINT8 S;
- UINT8 Z;
+ uint8_t CY;
+ uint8_t OV;
+ uint8_t S;
+ uint8_t Z;
} m_flags;
- UINT8 m_irq_line;
- UINT8 m_nmi_line;
+ uint8_t m_irq_line;
+ uint8_t m_nmi_line;
address_space *m_program;
direct_read_data * m_direct;
address_space *m_io;
- UINT32 m_PPC;
+ uint32_t m_PPC;
int m_icount;
int m_stall_io;
- UINT32 m_op1, m_op2;
- UINT8 m_flag1, m_flag2;
- UINT8 m_instflags;
- UINT32 m_lenop1, m_lenop2;
- UINT8 m_subop;
- UINT32 m_bamoffset1, m_bamoffset2;
+ uint32_t m_op1, m_op2;
+ uint8_t m_flag1, m_flag2;
+ uint8_t m_instflags;
+ uint32_t m_lenop1, m_lenop2;
+ uint8_t m_subop;
+ uint32_t m_bamoffset1, m_bamoffset2;
// Output variables for ReadAMAddress(cpustate)
- UINT8 m_amflag;
- UINT32 m_amout;
- UINT32 m_bamoffset;
+ uint8_t m_amflag;
+ uint32_t m_amout;
+ uint32_t m_bamoffset;
// Appo temp var
- UINT32 m_amlength1, m_amlength2;
+ uint32_t m_amlength1, m_amlength2;
// Global vars used by AM functions
- UINT32 m_modadd;
- UINT8 m_modm;
- UINT8 m_modval;
- UINT8 m_modval2;
- UINT8 m_modwritevalb;
- UINT16 m_modwritevalh;
- UINT32 m_modwritevalw;
- UINT8 m_moddim;
+ uint32_t m_modadd;
+ uint8_t m_modm;
+ uint8_t m_modval;
+ uint8_t m_modval2;
+ uint8_t m_modwritevalb;
+ uint16_t m_modwritevalh;
+ uint32_t m_modwritevalw;
+ uint8_t m_moddim;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
inline void v60SaveStack();
inline void v60ReloadStack();
- inline UINT32 v60ReadPSW();
- inline void v60WritePSW(UINT32 newval);
- inline UINT32 v60_update_psw_for_exception(int is_interrupt, int target_level);
+ inline uint32_t v60ReadPSW();
+ inline void v60WritePSW(uint32_t newval);
+ inline uint32_t v60_update_psw_for_exception(int is_interrupt, int target_level);
- UINT32 am1Register();
- UINT32 am1RegisterIndirect();
- UINT32 bam1RegisterIndirect();
- UINT32 am1RegisterIndirectIndexed();
- UINT32 bam1RegisterIndirectIndexed();
- UINT32 am1Autoincrement();
- UINT32 bam1Autoincrement();
- UINT32 am1Autodecrement();
- UINT32 bam1Autodecrement();
- UINT32 am1Displacement8();
- UINT32 bam1Displacement8();
- UINT32 am1Displacement16();
- UINT32 bam1Displacement16();
- UINT32 am1Displacement32();
- UINT32 bam1Displacement32();
- UINT32 am1DisplacementIndexed8();
- UINT32 bam1DisplacementIndexed8();
- UINT32 am1DisplacementIndexed16();
- UINT32 bam1DisplacementIndexed16();
- UINT32 am1DisplacementIndexed32();
- UINT32 bam1DisplacementIndexed32();
- UINT32 am1PCDisplacement8();
- UINT32 bam1PCDisplacement8();
- UINT32 am1PCDisplacement16();
- UINT32 bam1PCDisplacement16();
- UINT32 am1PCDisplacement32();
- UINT32 bam1PCDisplacement32();
- UINT32 am1PCDisplacementIndexed8();
- UINT32 bam1PCDisplacementIndexed8();
- UINT32 am1PCDisplacementIndexed16();
- UINT32 bam1PCDisplacementIndexed16();
- UINT32 am1PCDisplacementIndexed32();
- UINT32 bam1PCDisplacementIndexed32();
- UINT32 am1DisplacementIndirect8();
- UINT32 bam1DisplacementIndirect8();
- UINT32 am1DisplacementIndirect16();
- UINT32 bam1DisplacementIndirect16();
- UINT32 am1DisplacementIndirect32();
- UINT32 bam1DisplacementIndirect32();
- UINT32 am1DisplacementIndirectIndexed8();
- UINT32 bam1DisplacementIndirectIndexed8();
- UINT32 am1DisplacementIndirectIndexed16();
- UINT32 bam1DisplacementIndirectIndexed16();
- UINT32 am1DisplacementIndirectIndexed32();
- UINT32 bam1DisplacementIndirectIndexed32();
- UINT32 am1PCDisplacementIndirect8();
- UINT32 bam1PCDisplacementIndirect8();
- UINT32 am1PCDisplacementIndirect16();
- UINT32 bam1PCDisplacementIndirect16();
- UINT32 am1PCDisplacementIndirect32();
- UINT32 bam1PCDisplacementIndirect32();
- UINT32 am1PCDisplacementIndirectIndexed8();
- UINT32 bam1PCDisplacementIndirectIndexed8();
- UINT32 am1PCDisplacementIndirectIndexed16();
- UINT32 bam1PCDisplacementIndirectIndexed16();
- UINT32 am1PCDisplacementIndirectIndexed32();
- UINT32 bam1PCDisplacementIndirectIndexed32();
- UINT32 am1DoubleDisplacement8();
- UINT32 bam1DoubleDisplacement8();
- UINT32 am1DoubleDisplacement16();
- UINT32 bam1DoubleDisplacement16();
- UINT32 am1DoubleDisplacement32();
- UINT32 bam1DoubleDisplacement32();
- UINT32 am1PCDoubleDisplacement8();
- UINT32 bam1PCDoubleDisplacement8();
- UINT32 am1PCDoubleDisplacement16();
- UINT32 bam1PCDoubleDisplacement16();
- UINT32 am1PCDoubleDisplacement32();
- UINT32 bam1PCDoubleDisplacement32();
- UINT32 am1DirectAddress();
- UINT32 bam1DirectAddress();
- UINT32 am1DirectAddressIndexed();
- UINT32 bam1DirectAddressIndexed();
- UINT32 am1DirectAddressDeferred();
- UINT32 bam1DirectAddressDeferred();
- UINT32 am1DirectAddressDeferredIndexed();
- UINT32 bam1DirectAddressDeferredIndexed();
- UINT32 am1Immediate();
- UINT32 am1ImmediateQuick();
- UINT32 am1Error1();
- UINT32 bam1Error1();
- UINT32 am1Error2();
- UINT32 bam1Error2();
- UINT32 am1Error4();
- UINT32 bam1Error4();
- UINT32 am1Error5();
- UINT32 bam1Error5();
- UINT32 bam1Error6();
- UINT32 am1Group7a();
- UINT32 bam1Group7a();
- UINT32 am1Group6();
- UINT32 bam1Group6();
- UINT32 am1Group7();
- UINT32 bam1Group7();
- UINT32 am2Register();
- UINT32 am2RegisterIndirect();
- UINT32 bam2RegisterIndirect();
- UINT32 am2RegisterIndirectIndexed();
- UINT32 bam2RegisterIndirectIndexed();
- UINT32 am2Autoincrement();
- UINT32 bam2Autoincrement();
- UINT32 am2Autodecrement();
- UINT32 bam2Autodecrement();
- UINT32 am2Displacement8();
- UINT32 bam2Displacement8();
- UINT32 am2Displacement16();
- UINT32 bam2Displacement16();
- UINT32 am2Displacement32();
- UINT32 bam2Displacement32();
- UINT32 am2DisplacementIndexed8();
- UINT32 bam2DisplacementIndexed8();
- UINT32 am2DisplacementIndexed16();
- UINT32 bam2DisplacementIndexed16();
- UINT32 am2DisplacementIndexed32();
- UINT32 bam2DisplacementIndexed32();
- UINT32 am2PCDisplacement8();
- UINT32 bam2PCDisplacement8();
- UINT32 am2PCDisplacement16();
- UINT32 bam2PCDisplacement16();
- UINT32 am2PCDisplacement32();
- UINT32 bam2PCDisplacement32();
- UINT32 am2PCDisplacementIndexed8();
- UINT32 bam2PCDisplacementIndexed8();
- UINT32 am2PCDisplacementIndexed16();
- UINT32 bam2PCDisplacementIndexed16();
- UINT32 am2PCDisplacementIndexed32();
- UINT32 bam2PCDisplacementIndexed32();
- UINT32 am2DisplacementIndirect8();
- UINT32 bam2DisplacementIndirect8();
- UINT32 am2DisplacementIndirect16();
- UINT32 bam2DisplacementIndirect16();
- UINT32 am2DisplacementIndirect32();
- UINT32 bam2DisplacementIndirect32();
- UINT32 am2DisplacementIndirectIndexed8();
- UINT32 bam2DisplacementIndirectIndexed8();
- UINT32 am2DisplacementIndirectIndexed16();
- UINT32 bam2DisplacementIndirectIndexed16();
- UINT32 am2DisplacementIndirectIndexed32();
- UINT32 bam2DisplacementIndirectIndexed32();
- UINT32 am2PCDisplacementIndirect8();
- UINT32 bam2PCDisplacementIndirect8();
- UINT32 am2PCDisplacementIndirect16();
- UINT32 bam2PCDisplacementIndirect16();
- UINT32 am2PCDisplacementIndirect32();
- UINT32 bam2PCDisplacementIndirect32();
- UINT32 am2PCDisplacementIndirectIndexed8();
- UINT32 bam2PCDisplacementIndirectIndexed8();
- UINT32 am2PCDisplacementIndirectIndexed16();
- UINT32 bam2PCDisplacementIndirectIndexed16();
- UINT32 am2PCDisplacementIndirectIndexed32();
- UINT32 bam2PCDisplacementIndirectIndexed32();
- UINT32 am2DoubleDisplacement8();
- UINT32 bam2DoubleDisplacement8();
- UINT32 am2DoubleDisplacement16();
- UINT32 bam2DoubleDisplacement16();
- UINT32 am2DoubleDisplacement32();
- UINT32 bam2DoubleDisplacement32();
- UINT32 am2PCDoubleDisplacement8();
- UINT32 bam2PCDoubleDisplacement8();
- UINT32 am2PCDoubleDisplacement16();
- UINT32 bam2PCDoubleDisplacement16();
- UINT32 am2PCDoubleDisplacement32();
- UINT32 bam2PCDoubleDisplacement32();
- UINT32 am2DirectAddress();
- UINT32 bam2DirectAddress();
- UINT32 am2DirectAddressIndexed();
- UINT32 bam2DirectAddressIndexed();
- UINT32 am2DirectAddressDeferred();
- UINT32 bam2DirectAddressDeferred();
- UINT32 am2DirectAddressDeferredIndexed();
- UINT32 bam2DirectAddressDeferredIndexed();
- UINT32 am2Immediate();
- UINT32 am2ImmediateQuick();
- UINT32 am2Error1();
- UINT32 am2Error2();
- UINT32 am2Error4();
- UINT32 am2Error5();
- UINT32 bam2Error1();
- UINT32 bam2Error2();
- UINT32 bam2Error4();
- UINT32 bam2Error5();
- UINT32 bam2Error6();
- UINT32 am2Group7a();
- UINT32 bam2Group7a();
- UINT32 am2Group6();
- UINT32 bam2Group6();
- UINT32 am2Group7();
- UINT32 bam2Group7();
- UINT32 am3Register();
- UINT32 am3RegisterIndirect();
- UINT32 am3RegisterIndirectIndexed();
- UINT32 am3Autoincrement();
- UINT32 am3Autodecrement();
- UINT32 am3Displacement8();
- UINT32 am3Displacement16();
- UINT32 am3Displacement32();
- UINT32 am3DisplacementIndexed8();
- UINT32 am3DisplacementIndexed16();
- UINT32 am3DisplacementIndexed32();
- UINT32 am3PCDisplacement8();
- UINT32 am3PCDisplacement16();
- UINT32 am3PCDisplacement32();
- UINT32 am3PCDisplacementIndexed8();
- UINT32 am3PCDisplacementIndexed16();
- UINT32 am3PCDisplacementIndexed32();
- UINT32 am3DisplacementIndirect8();
- UINT32 am3DisplacementIndirect16();
- UINT32 am3DisplacementIndirect32();
- UINT32 am3DisplacementIndirectIndexed8();
- UINT32 am3DisplacementIndirectIndexed16();
- UINT32 am3DisplacementIndirectIndexed32();
- UINT32 am3PCDisplacementIndirect8();
- UINT32 am3PCDisplacementIndirect16();
- UINT32 am3PCDisplacementIndirect32();
- UINT32 am3PCDisplacementIndirectIndexed8();
- UINT32 am3PCDisplacementIndirectIndexed16();
- UINT32 am3PCDisplacementIndirectIndexed32();
- UINT32 am3DoubleDisplacement8();
- UINT32 am3DoubleDisplacement16();
- UINT32 am3DoubleDisplacement32();
- UINT32 am3PCDoubleDisplacement8();
- UINT32 am3PCDoubleDisplacement16();
- UINT32 am3PCDoubleDisplacement32();
- UINT32 am3DirectAddress();
- UINT32 am3DirectAddressIndexed();
- UINT32 am3DirectAddressDeferred();
- UINT32 am3DirectAddressDeferredIndexed();
- UINT32 am3Immediate();
- UINT32 am3ImmediateQuick();
- UINT32 am3Error1();
- UINT32 am3Error2();
- UINT32 am3Error4();
- UINT32 am3Error5();
- UINT32 am3Group7a();
- UINT32 am3Group6();
- UINT32 am3Group7();
- UINT32 ReadAM();
- UINT32 BitReadAM();
- UINT32 ReadAMAddress();
- UINT32 BitReadAMAddress();
- UINT32 WriteAM();
- void F12DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1);
- void F12WriteSecondOperand(UINT8 dim2);
- void F12DecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2);
- UINT32 opADDB();
- UINT32 opADDH();
- UINT32 opADDW();
- UINT32 opADDCB();
- UINT32 opADDCH();
- UINT32 opADDCW();
- UINT32 opANDB();
- UINT32 opANDH();
- UINT32 opANDW();
- UINT32 opCALL();
- UINT32 opCHKAR();
- UINT32 opCHKAW();
- UINT32 opCHKAE();
- UINT32 opCHLVL();
- UINT32 opCLR1();
- UINT32 opCMPB();
- UINT32 opCMPH();
- UINT32 opCMPW();
- UINT32 opDIVB();
- UINT32 opDIVH();
- UINT32 opDIVW();
- UINT32 opDIVX();
- UINT32 opDIVUX();
- UINT32 opDIVUB();
- UINT32 opDIVUH();
- UINT32 opDIVUW();
- UINT32 opINB();
- UINT32 opINH();
- UINT32 opINW();
- UINT32 opLDPR();
- UINT32 opLDTASK();
- UINT32 opMOVD();
- UINT32 opMOVB();
- UINT32 opMOVH();
- UINT32 opMOVW();
- UINT32 opMOVEAB();
- UINT32 opMOVEAH();
- UINT32 opMOVEAW();
- UINT32 opMOVSBH();
- UINT32 opMOVSBW();
- UINT32 opMOVSHW();
- UINT32 opMOVTHB();
- UINT32 opMOVTWB();
- UINT32 opMOVTWH();
- UINT32 opMOVZBH();
- UINT32 opMOVZBW();
- UINT32 opMOVZHW();
- UINT32 opMULB();
- UINT32 opMULH();
- UINT32 opMULW();
- UINT32 opMULUB();
- UINT32 opMULUH();
- UINT32 opMULUW();
- UINT32 opNEGB();
- UINT32 opNEGH();
- UINT32 opNEGW();
- UINT32 opNOTB();
- UINT32 opNOTH();
- UINT32 opNOTW();
- UINT32 opNOT1();
- UINT32 opORB();
- UINT32 opORH();
- UINT32 opORW();
- UINT32 opOUTB();
- UINT32 opOUTH();
- UINT32 opOUTW();
- UINT32 opREMB();
- UINT32 opREMH();
- UINT32 opREMW();
- UINT32 opREMUB();
- UINT32 opREMUH();
- UINT32 opREMUW();
- UINT32 opROTB();
- UINT32 opROTH();
- UINT32 opROTW();
- UINT32 opROTCB();
- UINT32 opROTCH();
- UINT32 opROTCW();
- UINT32 opRVBIT();
- UINT32 opRVBYT();
- UINT32 opSET1();
- UINT32 opSETF();
- UINT32 opSHAB();
- UINT32 opSHAH();
- UINT32 opSHAW();
- UINT32 opSHLB();
- UINT32 opSHLH();
- UINT32 opSHLW();
- UINT32 opSTPR();
- UINT32 opSUBB();
- UINT32 opSUBH();
- UINT32 opSUBW();
- UINT32 opSUBCB();
- UINT32 opSUBCH();
- UINT32 opSUBCW();
- UINT32 opTEST1();
- UINT32 opUPDPSWW();
- UINT32 opUPDPSWH();
- UINT32 opXCHB();
- UINT32 opXCHH();
- UINT32 opXCHW();
- UINT32 opXORB();
- UINT32 opXORH();
- UINT32 opXORW();
- UINT32 opMULX();
- UINT32 opMULUX();
- void F2DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1);
- void F2DecodeSecondOperand(am_func DecodeOp2, UINT8 dim2);
- void F2WriteSecondOperand(UINT8 dim2);
- UINT32 opCVTWS();
- UINT32 opCVTSW();
- UINT32 opMOVFS();
- UINT32 opNEGFS();
- UINT32 opABSFS();
- UINT32 opADDFS();
- UINT32 opSUBFS();
- UINT32 opMULFS();
- UINT32 opDIVFS();
- UINT32 opSCLFS();
- UINT32 opCMPF();
- UINT32 op5FUNHANDLED();
- UINT32 op5CUNHANDLED();
- UINT32 op5F();
- UINT32 op5C();
- UINT32 opINCB();
- UINT32 opINCH();
- UINT32 opINCW();
- UINT32 opDECB();
- UINT32 opDECH();
- UINT32 opDECW();
- UINT32 opJMP();
- UINT32 opJSR();
- UINT32 opPREPARE();
- UINT32 opRET();
- UINT32 opTRAP();
- UINT32 opRETIU();
- UINT32 opRETIS();
- UINT32 opSTTASK();
- UINT32 opGETPSW();
- UINT32 opTASI();
- UINT32 opCLRTLB();
- UINT32 opPOPM();
- UINT32 opPUSHM();
- UINT32 opTESTB();
- UINT32 opTESTH();
- UINT32 opTESTW();
- UINT32 opPUSH();
- UINT32 opPOP();
- UINT32 opINCB_0();
- UINT32 opINCB_1();
- UINT32 opINCH_0();
- UINT32 opINCH_1();
- UINT32 opINCW_0();
- UINT32 opINCW_1();
- UINT32 opDECB_0();
- UINT32 opDECB_1();
- UINT32 opDECH_0();
- UINT32 opDECH_1();
- UINT32 opDECW_0();
- UINT32 opDECW_1();
- UINT32 opJMP_0();
- UINT32 opJMP_1();
- UINT32 opJSR_0();
- UINT32 opJSR_1();
- UINT32 opPREPARE_0();
- UINT32 opPREPARE_1();
- UINT32 opRET_0();
- UINT32 opRET_1();
- UINT32 opTRAP_0();
- UINT32 opTRAP_1();
- UINT32 opRETIU_0();
- UINT32 opRETIU_1();
- UINT32 opRETIS_0();
- UINT32 opRETIS_1();
- UINT32 opGETPSW_0();
- UINT32 opGETPSW_1();
- UINT32 opTASI_0();
- UINT32 opTASI_1();
- UINT32 opCLRTLB_0();
- UINT32 opCLRTLB_1();
- UINT32 opPOPM_0();
- UINT32 opPOPM_1();
- UINT32 opPUSHM_0();
- UINT32 opPUSHM_1();
- UINT32 opTESTB_0();
- UINT32 opTESTB_1();
- UINT32 opTESTH_0();
- UINT32 opTESTH_1();
- UINT32 opTESTW_0();
- UINT32 opTESTW_1();
- UINT32 opPUSH_0();
- UINT32 opPUSH_1();
- UINT32 opPOP_0();
- UINT32 opPOP_1();
- UINT32 opSTTASK_0();
- UINT32 opSTTASK_1();
- UINT32 opBGT8();
- UINT32 opBGT16();
- UINT32 opBGE8();
- UINT32 opBGE16();
- UINT32 opBLT8();
- UINT32 opBLT16();
- UINT32 opBLE8();
- UINT32 opBLE16();
- UINT32 opBH8();
- UINT32 opBH16();
- UINT32 opBNH8();
- UINT32 opBNH16();
- UINT32 opBNL8();
- UINT32 opBNL16();
- UINT32 opBL8();
- UINT32 opBL16();
- UINT32 opBNE8();
- UINT32 opBNE16();
- UINT32 opBE8();
- UINT32 opBE16();
- UINT32 opBNV8();
- UINT32 opBNV16();
- UINT32 opBV8();
- UINT32 opBV16();
- UINT32 opBP8();
- UINT32 opBP16();
- UINT32 opBN8();
- UINT32 opBN16();
- UINT32 opBR8();
- UINT32 opBR16();
- UINT32 opBSR();
- UINT32 opBRK();
- UINT32 opBRKV();
- UINT32 opCLRTLBA();
- UINT32 opDISPOSE();
- UINT32 opHALT();
- UINT32 opNOP();
- UINT32 opRSR();
- UINT32 opTRAPFL();
- UINT32 opTB(int reg);
- UINT32 opDBGT(int reg);
- UINT32 opDBLE(int reg);
- UINT32 opDBGE(int reg);
- UINT32 opDBLT(int reg);
- UINT32 opDBH(int reg);
- UINT32 opDBNH(int reg);
- UINT32 opDBL(int reg);
- UINT32 opDBNL(int reg);
- UINT32 opDBE(int reg);
- UINT32 opDBNE(int reg);
- UINT32 opDBV(int reg);
- UINT32 opDBNV(int reg);
- UINT32 opDBN(int reg);
- UINT32 opDBP(int reg);
- UINT32 opDBR(int reg);
- UINT32 opC6();
- UINT32 opC7();
- void F7aDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2);
- void F7bDecodeFirstOperand(am_func DecodeOp1, UINT8 dim1);
- void F7bWriteSecondOperand(UINT8 dim2);
- void F7bDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2);
- void F7cDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2);
- UINT32 opCMPSTRB(UINT8 bFill, UINT8 bStop);
- UINT32 opCMPSTRH(UINT8 bFill, UINT8 bStop);
- UINT32 opMOVSTRUB(UINT8 bFill, UINT8 bStop);
- UINT32 opMOVSTRDB(UINT8 bFill, UINT8 bStop);
- UINT32 opMOVSTRUH(UINT8 bFill, UINT8 bStop);
- UINT32 opMOVSTRDH(UINT8 bFill, UINT8 bStop);
- UINT32 opSEARCHUB(UINT8 bSearch);
- UINT32 opSEARCHUH(UINT8 bSearch);
- UINT32 opSEARCHDB(UINT8 bSearch);
- UINT32 opSEARCHDH(UINT8 bSearch);
- UINT32 opSCHCUB();
- UINT32 opSCHCUH();
- UINT32 opSCHCDB();
- UINT32 opSCHCDH();
- UINT32 opSKPCUB();
- UINT32 opSKPCUH();
- UINT32 opSKPCDB();
- UINT32 opSKPCDH();
- UINT32 opCMPCB();
- UINT32 opCMPCH();
- UINT32 opCMPCFB();
- UINT32 opCMPCFH();
- UINT32 opCMPCSB();
- UINT32 opCMPCSH();
- UINT32 opMOVCUB();
- UINT32 opMOVCUH();
- UINT32 opMOVCFUB();
- UINT32 opMOVCFUH();
- UINT32 opMOVCSUB();
- UINT32 opMOVCSUH();
- UINT32 opMOVCDB();
- UINT32 opMOVCDH();
- UINT32 opMOVCFDB();
- UINT32 opMOVCFDH();
- UINT32 opEXTBFZ();
- UINT32 opEXTBFS();
- UINT32 opEXTBFL();
- UINT32 opSCHBS(UINT32 bSearch1);
- UINT32 opSCH0BSU();
- UINT32 opSCH1BSU();
- UINT32 opINSBFR();
- UINT32 opINSBFL();
- UINT32 opMOVBSD();
- UINT32 opMOVBSU();
- UINT32 opADDDC();
- UINT32 opSUBDC();
- UINT32 opSUBRDC();
- UINT32 opCVTDPZ();
- UINT32 opCVTDZP();
- UINT32 op58UNHANDLED();
- UINT32 op5AUNHANDLED();
- UINT32 op5BUNHANDLED();
- UINT32 op5DUNHANDLED();
- UINT32 op59UNHANDLED();
- UINT32 op58();
- UINT32 op5A();
- UINT32 op5B();
- UINT32 op5D();
- UINT32 op59();
- UINT32 opUNHANDLED();
+ uint32_t am1Register();
+ uint32_t am1RegisterIndirect();
+ uint32_t bam1RegisterIndirect();
+ uint32_t am1RegisterIndirectIndexed();
+ uint32_t bam1RegisterIndirectIndexed();
+ uint32_t am1Autoincrement();
+ uint32_t bam1Autoincrement();
+ uint32_t am1Autodecrement();
+ uint32_t bam1Autodecrement();
+ uint32_t am1Displacement8();
+ uint32_t bam1Displacement8();
+ uint32_t am1Displacement16();
+ uint32_t bam1Displacement16();
+ uint32_t am1Displacement32();
+ uint32_t bam1Displacement32();
+ uint32_t am1DisplacementIndexed8();
+ uint32_t bam1DisplacementIndexed8();
+ uint32_t am1DisplacementIndexed16();
+ uint32_t bam1DisplacementIndexed16();
+ uint32_t am1DisplacementIndexed32();
+ uint32_t bam1DisplacementIndexed32();
+ uint32_t am1PCDisplacement8();
+ uint32_t bam1PCDisplacement8();
+ uint32_t am1PCDisplacement16();
+ uint32_t bam1PCDisplacement16();
+ uint32_t am1PCDisplacement32();
+ uint32_t bam1PCDisplacement32();
+ uint32_t am1PCDisplacementIndexed8();
+ uint32_t bam1PCDisplacementIndexed8();
+ uint32_t am1PCDisplacementIndexed16();
+ uint32_t bam1PCDisplacementIndexed16();
+ uint32_t am1PCDisplacementIndexed32();
+ uint32_t bam1PCDisplacementIndexed32();
+ uint32_t am1DisplacementIndirect8();
+ uint32_t bam1DisplacementIndirect8();
+ uint32_t am1DisplacementIndirect16();
+ uint32_t bam1DisplacementIndirect16();
+ uint32_t am1DisplacementIndirect32();
+ uint32_t bam1DisplacementIndirect32();
+ uint32_t am1DisplacementIndirectIndexed8();
+ uint32_t bam1DisplacementIndirectIndexed8();
+ uint32_t am1DisplacementIndirectIndexed16();
+ uint32_t bam1DisplacementIndirectIndexed16();
+ uint32_t am1DisplacementIndirectIndexed32();
+ uint32_t bam1DisplacementIndirectIndexed32();
+ uint32_t am1PCDisplacementIndirect8();
+ uint32_t bam1PCDisplacementIndirect8();
+ uint32_t am1PCDisplacementIndirect16();
+ uint32_t bam1PCDisplacementIndirect16();
+ uint32_t am1PCDisplacementIndirect32();
+ uint32_t bam1PCDisplacementIndirect32();
+ uint32_t am1PCDisplacementIndirectIndexed8();
+ uint32_t bam1PCDisplacementIndirectIndexed8();
+ uint32_t am1PCDisplacementIndirectIndexed16();
+ uint32_t bam1PCDisplacementIndirectIndexed16();
+ uint32_t am1PCDisplacementIndirectIndexed32();
+ uint32_t bam1PCDisplacementIndirectIndexed32();
+ uint32_t am1DoubleDisplacement8();
+ uint32_t bam1DoubleDisplacement8();
+ uint32_t am1DoubleDisplacement16();
+ uint32_t bam1DoubleDisplacement16();
+ uint32_t am1DoubleDisplacement32();
+ uint32_t bam1DoubleDisplacement32();
+ uint32_t am1PCDoubleDisplacement8();
+ uint32_t bam1PCDoubleDisplacement8();
+ uint32_t am1PCDoubleDisplacement16();
+ uint32_t bam1PCDoubleDisplacement16();
+ uint32_t am1PCDoubleDisplacement32();
+ uint32_t bam1PCDoubleDisplacement32();
+ uint32_t am1DirectAddress();
+ uint32_t bam1DirectAddress();
+ uint32_t am1DirectAddressIndexed();
+ uint32_t bam1DirectAddressIndexed();
+ uint32_t am1DirectAddressDeferred();
+ uint32_t bam1DirectAddressDeferred();
+ uint32_t am1DirectAddressDeferredIndexed();
+ uint32_t bam1DirectAddressDeferredIndexed();
+ uint32_t am1Immediate();
+ uint32_t am1ImmediateQuick();
+ uint32_t am1Error1();
+ uint32_t bam1Error1();
+ uint32_t am1Error2();
+ uint32_t bam1Error2();
+ uint32_t am1Error4();
+ uint32_t bam1Error4();
+ uint32_t am1Error5();
+ uint32_t bam1Error5();
+ uint32_t bam1Error6();
+ uint32_t am1Group7a();
+ uint32_t bam1Group7a();
+ uint32_t am1Group6();
+ uint32_t bam1Group6();
+ uint32_t am1Group7();
+ uint32_t bam1Group7();
+ uint32_t am2Register();
+ uint32_t am2RegisterIndirect();
+ uint32_t bam2RegisterIndirect();
+ uint32_t am2RegisterIndirectIndexed();
+ uint32_t bam2RegisterIndirectIndexed();
+ uint32_t am2Autoincrement();
+ uint32_t bam2Autoincrement();
+ uint32_t am2Autodecrement();
+ uint32_t bam2Autodecrement();
+ uint32_t am2Displacement8();
+ uint32_t bam2Displacement8();
+ uint32_t am2Displacement16();
+ uint32_t bam2Displacement16();
+ uint32_t am2Displacement32();
+ uint32_t bam2Displacement32();
+ uint32_t am2DisplacementIndexed8();
+ uint32_t bam2DisplacementIndexed8();
+ uint32_t am2DisplacementIndexed16();
+ uint32_t bam2DisplacementIndexed16();
+ uint32_t am2DisplacementIndexed32();
+ uint32_t bam2DisplacementIndexed32();
+ uint32_t am2PCDisplacement8();
+ uint32_t bam2PCDisplacement8();
+ uint32_t am2PCDisplacement16();
+ uint32_t bam2PCDisplacement16();
+ uint32_t am2PCDisplacement32();
+ uint32_t bam2PCDisplacement32();
+ uint32_t am2PCDisplacementIndexed8();
+ uint32_t bam2PCDisplacementIndexed8();
+ uint32_t am2PCDisplacementIndexed16();
+ uint32_t bam2PCDisplacementIndexed16();
+ uint32_t am2PCDisplacementIndexed32();
+ uint32_t bam2PCDisplacementIndexed32();
+ uint32_t am2DisplacementIndirect8();
+ uint32_t bam2DisplacementIndirect8();
+ uint32_t am2DisplacementIndirect16();
+ uint32_t bam2DisplacementIndirect16();
+ uint32_t am2DisplacementIndirect32();
+ uint32_t bam2DisplacementIndirect32();
+ uint32_t am2DisplacementIndirectIndexed8();
+ uint32_t bam2DisplacementIndirectIndexed8();
+ uint32_t am2DisplacementIndirectIndexed16();
+ uint32_t bam2DisplacementIndirectIndexed16();
+ uint32_t am2DisplacementIndirectIndexed32();
+ uint32_t bam2DisplacementIndirectIndexed32();
+ uint32_t am2PCDisplacementIndirect8();
+ uint32_t bam2PCDisplacementIndirect8();
+ uint32_t am2PCDisplacementIndirect16();
+ uint32_t bam2PCDisplacementIndirect16();
+ uint32_t am2PCDisplacementIndirect32();
+ uint32_t bam2PCDisplacementIndirect32();
+ uint32_t am2PCDisplacementIndirectIndexed8();
+ uint32_t bam2PCDisplacementIndirectIndexed8();
+ uint32_t am2PCDisplacementIndirectIndexed16();
+ uint32_t bam2PCDisplacementIndirectIndexed16();
+ uint32_t am2PCDisplacementIndirectIndexed32();
+ uint32_t bam2PCDisplacementIndirectIndexed32();
+ uint32_t am2DoubleDisplacement8();
+ uint32_t bam2DoubleDisplacement8();
+ uint32_t am2DoubleDisplacement16();
+ uint32_t bam2DoubleDisplacement16();
+ uint32_t am2DoubleDisplacement32();
+ uint32_t bam2DoubleDisplacement32();
+ uint32_t am2PCDoubleDisplacement8();
+ uint32_t bam2PCDoubleDisplacement8();
+ uint32_t am2PCDoubleDisplacement16();
+ uint32_t bam2PCDoubleDisplacement16();
+ uint32_t am2PCDoubleDisplacement32();
+ uint32_t bam2PCDoubleDisplacement32();
+ uint32_t am2DirectAddress();
+ uint32_t bam2DirectAddress();
+ uint32_t am2DirectAddressIndexed();
+ uint32_t bam2DirectAddressIndexed();
+ uint32_t am2DirectAddressDeferred();
+ uint32_t bam2DirectAddressDeferred();
+ uint32_t am2DirectAddressDeferredIndexed();
+ uint32_t bam2DirectAddressDeferredIndexed();
+ uint32_t am2Immediate();
+ uint32_t am2ImmediateQuick();
+ uint32_t am2Error1();
+ uint32_t am2Error2();
+ uint32_t am2Error4();
+ uint32_t am2Error5();
+ uint32_t bam2Error1();
+ uint32_t bam2Error2();
+ uint32_t bam2Error4();
+ uint32_t bam2Error5();
+ uint32_t bam2Error6();
+ uint32_t am2Group7a();
+ uint32_t bam2Group7a();
+ uint32_t am2Group6();
+ uint32_t bam2Group6();
+ uint32_t am2Group7();
+ uint32_t bam2Group7();
+ uint32_t am3Register();
+ uint32_t am3RegisterIndirect();
+ uint32_t am3RegisterIndirectIndexed();
+ uint32_t am3Autoincrement();
+ uint32_t am3Autodecrement();
+ uint32_t am3Displacement8();
+ uint32_t am3Displacement16();
+ uint32_t am3Displacement32();
+ uint32_t am3DisplacementIndexed8();
+ uint32_t am3DisplacementIndexed16();
+ uint32_t am3DisplacementIndexed32();
+ uint32_t am3PCDisplacement8();
+ uint32_t am3PCDisplacement16();
+ uint32_t am3PCDisplacement32();
+ uint32_t am3PCDisplacementIndexed8();
+ uint32_t am3PCDisplacementIndexed16();
+ uint32_t am3PCDisplacementIndexed32();
+ uint32_t am3DisplacementIndirect8();
+ uint32_t am3DisplacementIndirect16();
+ uint32_t am3DisplacementIndirect32();
+ uint32_t am3DisplacementIndirectIndexed8();
+ uint32_t am3DisplacementIndirectIndexed16();
+ uint32_t am3DisplacementIndirectIndexed32();
+ uint32_t am3PCDisplacementIndirect8();
+ uint32_t am3PCDisplacementIndirect16();
+ uint32_t am3PCDisplacementIndirect32();
+ uint32_t am3PCDisplacementIndirectIndexed8();
+ uint32_t am3PCDisplacementIndirectIndexed16();
+ uint32_t am3PCDisplacementIndirectIndexed32();
+ uint32_t am3DoubleDisplacement8();
+ uint32_t am3DoubleDisplacement16();
+ uint32_t am3DoubleDisplacement32();
+ uint32_t am3PCDoubleDisplacement8();
+ uint32_t am3PCDoubleDisplacement16();
+ uint32_t am3PCDoubleDisplacement32();
+ uint32_t am3DirectAddress();
+ uint32_t am3DirectAddressIndexed();
+ uint32_t am3DirectAddressDeferred();
+ uint32_t am3DirectAddressDeferredIndexed();
+ uint32_t am3Immediate();
+ uint32_t am3ImmediateQuick();
+ uint32_t am3Error1();
+ uint32_t am3Error2();
+ uint32_t am3Error4();
+ uint32_t am3Error5();
+ uint32_t am3Group7a();
+ uint32_t am3Group6();
+ uint32_t am3Group7();
+ uint32_t ReadAM();
+ uint32_t BitReadAM();
+ uint32_t ReadAMAddress();
+ uint32_t BitReadAMAddress();
+ uint32_t WriteAM();
+ void F12DecodeFirstOperand(am_func DecodeOp1, uint8_t dim1);
+ void F12WriteSecondOperand(uint8_t dim2);
+ void F12DecodeOperands(am_func DecodeOp1, uint8_t dim1, am_func DecodeOp2, uint8_t dim2);
+ uint32_t opADDB();
+ uint32_t opADDH();
+ uint32_t opADDW();
+ uint32_t opADDCB();
+ uint32_t opADDCH();
+ uint32_t opADDCW();
+ uint32_t opANDB();
+ uint32_t opANDH();
+ uint32_t opANDW();
+ uint32_t opCALL();
+ uint32_t opCHKAR();
+ uint32_t opCHKAW();
+ uint32_t opCHKAE();
+ uint32_t opCHLVL();
+ uint32_t opCLR1();
+ uint32_t opCMPB();
+ uint32_t opCMPH();
+ uint32_t opCMPW();
+ uint32_t opDIVB();
+ uint32_t opDIVH();
+ uint32_t opDIVW();
+ uint32_t opDIVX();
+ uint32_t opDIVUX();
+ uint32_t opDIVUB();
+ uint32_t opDIVUH();
+ uint32_t opDIVUW();
+ uint32_t opINB();
+ uint32_t opINH();
+ uint32_t opINW();
+ uint32_t opLDPR();
+ uint32_t opLDTASK();
+ uint32_t opMOVD();
+ uint32_t opMOVB();
+ uint32_t opMOVH();
+ uint32_t opMOVW();
+ uint32_t opMOVEAB();
+ uint32_t opMOVEAH();
+ uint32_t opMOVEAW();
+ uint32_t opMOVSBH();
+ uint32_t opMOVSBW();
+ uint32_t opMOVSHW();
+ uint32_t opMOVTHB();
+ uint32_t opMOVTWB();
+ uint32_t opMOVTWH();
+ uint32_t opMOVZBH();
+ uint32_t opMOVZBW();
+ uint32_t opMOVZHW();
+ uint32_t opMULB();
+ uint32_t opMULH();
+ uint32_t opMULW();
+ uint32_t opMULUB();
+ uint32_t opMULUH();
+ uint32_t opMULUW();
+ uint32_t opNEGB();
+ uint32_t opNEGH();
+ uint32_t opNEGW();
+ uint32_t opNOTB();
+ uint32_t opNOTH();
+ uint32_t opNOTW();
+ uint32_t opNOT1();
+ uint32_t opORB();
+ uint32_t opORH();
+ uint32_t opORW();
+ uint32_t opOUTB();
+ uint32_t opOUTH();
+ uint32_t opOUTW();
+ uint32_t opREMB();
+ uint32_t opREMH();
+ uint32_t opREMW();
+ uint32_t opREMUB();
+ uint32_t opREMUH();
+ uint32_t opREMUW();
+ uint32_t opROTB();
+ uint32_t opROTH();
+ uint32_t opROTW();
+ uint32_t opROTCB();
+ uint32_t opROTCH();
+ uint32_t opROTCW();
+ uint32_t opRVBIT();
+ uint32_t opRVBYT();
+ uint32_t opSET1();
+ uint32_t opSETF();
+ uint32_t opSHAB();
+ uint32_t opSHAH();
+ uint32_t opSHAW();
+ uint32_t opSHLB();
+ uint32_t opSHLH();
+ uint32_t opSHLW();
+ uint32_t opSTPR();
+ uint32_t opSUBB();
+ uint32_t opSUBH();
+ uint32_t opSUBW();
+ uint32_t opSUBCB();
+ uint32_t opSUBCH();
+ uint32_t opSUBCW();
+ uint32_t opTEST1();
+ uint32_t opUPDPSWW();
+ uint32_t opUPDPSWH();
+ uint32_t opXCHB();
+ uint32_t opXCHH();
+ uint32_t opXCHW();
+ uint32_t opXORB();
+ uint32_t opXORH();
+ uint32_t opXORW();
+ uint32_t opMULX();
+ uint32_t opMULUX();
+ void F2DecodeFirstOperand(am_func DecodeOp1, uint8_t dim1);
+ void F2DecodeSecondOperand(am_func DecodeOp2, uint8_t dim2);
+ void F2WriteSecondOperand(uint8_t dim2);
+ uint32_t opCVTWS();
+ uint32_t opCVTSW();
+ uint32_t opMOVFS();
+ uint32_t opNEGFS();
+ uint32_t opABSFS();
+ uint32_t opADDFS();
+ uint32_t opSUBFS();
+ uint32_t opMULFS();
+ uint32_t opDIVFS();
+ uint32_t opSCLFS();
+ uint32_t opCMPF();
+ uint32_t op5FUNHANDLED();
+ uint32_t op5CUNHANDLED();
+ uint32_t op5F();
+ uint32_t op5C();
+ uint32_t opINCB();
+ uint32_t opINCH();
+ uint32_t opINCW();
+ uint32_t opDECB();
+ uint32_t opDECH();
+ uint32_t opDECW();
+ uint32_t opJMP();
+ uint32_t opJSR();
+ uint32_t opPREPARE();
+ uint32_t opRET();
+ uint32_t opTRAP();
+ uint32_t opRETIU();
+ uint32_t opRETIS();
+ uint32_t opSTTASK();
+ uint32_t opGETPSW();
+ uint32_t opTASI();
+ uint32_t opCLRTLB();
+ uint32_t opPOPM();
+ uint32_t opPUSHM();
+ uint32_t opTESTB();
+ uint32_t opTESTH();
+ uint32_t opTESTW();
+ uint32_t opPUSH();
+ uint32_t opPOP();
+ uint32_t opINCB_0();
+ uint32_t opINCB_1();
+ uint32_t opINCH_0();
+ uint32_t opINCH_1();
+ uint32_t opINCW_0();
+ uint32_t opINCW_1();
+ uint32_t opDECB_0();
+ uint32_t opDECB_1();
+ uint32_t opDECH_0();
+ uint32_t opDECH_1();
+ uint32_t opDECW_0();
+ uint32_t opDECW_1();
+ uint32_t opJMP_0();
+ uint32_t opJMP_1();
+ uint32_t opJSR_0();
+ uint32_t opJSR_1();
+ uint32_t opPREPARE_0();
+ uint32_t opPREPARE_1();
+ uint32_t opRET_0();
+ uint32_t opRET_1();
+ uint32_t opTRAP_0();
+ uint32_t opTRAP_1();
+ uint32_t opRETIU_0();
+ uint32_t opRETIU_1();
+ uint32_t opRETIS_0();
+ uint32_t opRETIS_1();
+ uint32_t opGETPSW_0();
+ uint32_t opGETPSW_1();
+ uint32_t opTASI_0();
+ uint32_t opTASI_1();
+ uint32_t opCLRTLB_0();
+ uint32_t opCLRTLB_1();
+ uint32_t opPOPM_0();
+ uint32_t opPOPM_1();
+ uint32_t opPUSHM_0();
+ uint32_t opPUSHM_1();
+ uint32_t opTESTB_0();
+ uint32_t opTESTB_1();
+ uint32_t opTESTH_0();
+ uint32_t opTESTH_1();
+ uint32_t opTESTW_0();
+ uint32_t opTESTW_1();
+ uint32_t opPUSH_0();
+ uint32_t opPUSH_1();
+ uint32_t opPOP_0();
+ uint32_t opPOP_1();
+ uint32_t opSTTASK_0();
+ uint32_t opSTTASK_1();
+ uint32_t opBGT8();
+ uint32_t opBGT16();
+ uint32_t opBGE8();
+ uint32_t opBGE16();
+ uint32_t opBLT8();
+ uint32_t opBLT16();
+ uint32_t opBLE8();
+ uint32_t opBLE16();
+ uint32_t opBH8();
+ uint32_t opBH16();
+ uint32_t opBNH8();
+ uint32_t opBNH16();
+ uint32_t opBNL8();
+ uint32_t opBNL16();
+ uint32_t opBL8();
+ uint32_t opBL16();
+ uint32_t opBNE8();
+ uint32_t opBNE16();
+ uint32_t opBE8();
+ uint32_t opBE16();
+ uint32_t opBNV8();
+ uint32_t opBNV16();
+ uint32_t opBV8();
+ uint32_t opBV16();
+ uint32_t opBP8();
+ uint32_t opBP16();
+ uint32_t opBN8();
+ uint32_t opBN16();
+ uint32_t opBR8();
+ uint32_t opBR16();
+ uint32_t opBSR();
+ uint32_t opBRK();
+ uint32_t opBRKV();
+ uint32_t opCLRTLBA();
+ uint32_t opDISPOSE();
+ uint32_t opHALT();
+ uint32_t opNOP();
+ uint32_t opRSR();
+ uint32_t opTRAPFL();
+ uint32_t opTB(int reg);
+ uint32_t opDBGT(int reg);
+ uint32_t opDBLE(int reg);
+ uint32_t opDBGE(int reg);
+ uint32_t opDBLT(int reg);
+ uint32_t opDBH(int reg);
+ uint32_t opDBNH(int reg);
+ uint32_t opDBL(int reg);
+ uint32_t opDBNL(int reg);
+ uint32_t opDBE(int reg);
+ uint32_t opDBNE(int reg);
+ uint32_t opDBV(int reg);
+ uint32_t opDBNV(int reg);
+ uint32_t opDBN(int reg);
+ uint32_t opDBP(int reg);
+ uint32_t opDBR(int reg);
+ uint32_t opC6();
+ uint32_t opC7();
+ void F7aDecodeOperands(am_func DecodeOp1, uint8_t dim1, am_func DecodeOp2, uint8_t dim2);
+ void F7bDecodeFirstOperand(am_func DecodeOp1, uint8_t dim1);
+ void F7bWriteSecondOperand(uint8_t dim2);
+ void F7bDecodeOperands(am_func DecodeOp1, uint8_t dim1, am_func DecodeOp2, uint8_t dim2);
+ void F7cDecodeOperands(am_func DecodeOp1, uint8_t dim1, am_func DecodeOp2, uint8_t dim2);
+ uint32_t opCMPSTRB(uint8_t bFill, uint8_t bStop);
+ uint32_t opCMPSTRH(uint8_t bFill, uint8_t bStop);
+ uint32_t opMOVSTRUB(uint8_t bFill, uint8_t bStop);
+ uint32_t opMOVSTRDB(uint8_t bFill, uint8_t bStop);
+ uint32_t opMOVSTRUH(uint8_t bFill, uint8_t bStop);
+ uint32_t opMOVSTRDH(uint8_t bFill, uint8_t bStop);
+ uint32_t opSEARCHUB(uint8_t bSearch);
+ uint32_t opSEARCHUH(uint8_t bSearch);
+ uint32_t opSEARCHDB(uint8_t bSearch);
+ uint32_t opSEARCHDH(uint8_t bSearch);
+ uint32_t opSCHCUB();
+ uint32_t opSCHCUH();
+ uint32_t opSCHCDB();
+ uint32_t opSCHCDH();
+ uint32_t opSKPCUB();
+ uint32_t opSKPCUH();
+ uint32_t opSKPCDB();
+ uint32_t opSKPCDH();
+ uint32_t opCMPCB();
+ uint32_t opCMPCH();
+ uint32_t opCMPCFB();
+ uint32_t opCMPCFH();
+ uint32_t opCMPCSB();
+ uint32_t opCMPCSH();
+ uint32_t opMOVCUB();
+ uint32_t opMOVCUH();
+ uint32_t opMOVCFUB();
+ uint32_t opMOVCFUH();
+ uint32_t opMOVCSUB();
+ uint32_t opMOVCSUH();
+ uint32_t opMOVCDB();
+ uint32_t opMOVCDH();
+ uint32_t opMOVCFDB();
+ uint32_t opMOVCFDH();
+ uint32_t opEXTBFZ();
+ uint32_t opEXTBFS();
+ uint32_t opEXTBFL();
+ uint32_t opSCHBS(uint32_t bSearch1);
+ uint32_t opSCH0BSU();
+ uint32_t opSCH1BSU();
+ uint32_t opINSBFR();
+ uint32_t opINSBFL();
+ uint32_t opMOVBSD();
+ uint32_t opMOVBSU();
+ uint32_t opADDDC();
+ uint32_t opSUBDC();
+ uint32_t opSUBRDC();
+ uint32_t opCVTDPZ();
+ uint32_t opCVTDZP();
+ uint32_t op58UNHANDLED();
+ uint32_t op5AUNHANDLED();
+ uint32_t op5BUNHANDLED();
+ uint32_t op5DUNHANDLED();
+ uint32_t op59UNHANDLED();
+ uint32_t op58();
+ uint32_t op5A();
+ uint32_t op5B();
+ uint32_t op5D();
+ uint32_t op59();
+ uint32_t opUNHANDLED();
void v60_do_irq(int vector);
void v60_try_irq();
@@ -775,10 +775,10 @@ class v70_device : public v60_device
{
public:
// construction/destruction
- v70_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v70_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
diff --git a/src/devices/cpu/v60/v60d.cpp b/src/devices/cpu/v60/v60d.cpp
index a32268fc2b4..f30298080c3 100644
--- a/src/devices/cpu/v60/v60d.cpp
+++ b/src/devices/cpu/v60/v60d.cpp
@@ -26,7 +26,7 @@ static const char *const v60_reg_names[69] = {
"ADTMR1","Reserved","Reserved","Reserved"
};
-static const UINT8 *rombase;
+static const uint8_t *rombase;
static offs_t pcbase;
#define readop(a) rombase[(a) - pcbase]
diff --git a/src/devices/cpu/v810/v810.cpp b/src/devices/cpu/v810/v810.cpp
index 4e03c000747..ba002562548 100644
--- a/src/devices/cpu/v810/v810.cpp
+++ b/src/devices/cpu/v810/v810.cpp
@@ -38,7 +38,7 @@
const device_type V810 = &device_creator<v810_device>;
-v810_device::v810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+v810_device::v810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, V810, "V810", tag, owner, clock, "v810", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 32, 32, 0)
@@ -46,7 +46,7 @@ v810_device::v810_device(const machine_config &mconfig, const char *tag, device_
}
-offs_t v810_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t v810_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( v810 );
return CPU_DISASSEMBLE_NAME(v810)(this, buffer, pc, oprom, opram, options);
@@ -150,25 +150,25 @@ offs_t v810_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
#define D9(x) ((x&0x1ff)|((x&0x100)?0xfffffe00:0))
#define SO(opcode) (((opcode)&0xfc00)>>10)
-#define CHECK_CY(x) PSW=(PSW & ~8)|(((x) & (((UINT64)1) << 32)) ? 8 : 0)
+#define CHECK_CY(x) PSW=(PSW & ~8)|(((x) & (((uint64_t)1) << 32)) ? 8 : 0)
#define CHECK_OVADD(x,y,z) PSW=(PSW & ~0x00000004) |(( ((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 4: 0)
#define CHECK_OVSUB(x,y,z) PSW=(PSW & ~0x00000004) |(( ((y) ^ (z)) & ((x) ^ (y)) & 0x80000000) ? 4: 0)
-#define CHECK_ZS(x) PSW=(PSW & ~3)|((UINT32)(x)==0)|(((x)&0x80000000) ? 2: 0)
+#define CHECK_ZS(x) PSW=(PSW & ~3)|((uint32_t)(x)==0)|(((x)&0x80000000) ? 2: 0)
-#define ADD(dst, src) { UINT64 res=(UINT64)(dst)+(UINT64)(src); SetCF(res); SetOF_Add(res,src,dst); SetSZPF(res); dst=(UINT32)res; }
-#define SUB(dst, src) { UINT64 res=(UINT64)(dst)-(INT64)(src); SetCF(res); SetOF_Sub(res,src,dst); SetSZPF(res); dst=(UINT32)res; }
+#define ADD(dst, src) { uint64_t res=(uint64_t)(dst)+(uint64_t)(src); SetCF(res); SetOF_Add(res,src,dst); SetSZPF(res); dst=(uint32_t)res; }
+#define SUB(dst, src) { uint64_t res=(uint64_t)(dst)-(int64_t)(src); SetCF(res); SetOF_Sub(res,src,dst); SetSZPF(res); dst=(uint32_t)res; }
-void v810_device::SETREG(UINT32 reg,UINT32 val)
+void v810_device::SETREG(uint32_t reg,uint32_t val)
{
if(reg)
m_reg[reg]=val;
}
-UINT32 v810_device::GETREG(UINT32 reg)
+uint32_t v810_device::GETREG(uint32_t reg)
{
if(reg)
return m_reg[reg];
@@ -176,31 +176,31 @@ UINT32 v810_device::GETREG(UINT32 reg)
return 0;
}
-UINT32 v810_device::opUNDEF(UINT32 op)
+uint32_t v810_device::opUNDEF(uint32_t op)
{
logerror("V810: Unknown opcode %x @ %x",op,PC-2);
return clkIF;
}
-UINT32 v810_device::opMOVr(UINT32 op) // mov reg1, reg2
+uint32_t v810_device::opMOVr(uint32_t op) // mov reg1, reg2
{
SETREG(GET2,GETREG(GET1));
return clkIF;
}
-UINT32 v810_device::opMOVEA(UINT32 op) // movea imm16, reg1, reg2
+uint32_t v810_device::opMOVEA(uint32_t op) // movea imm16, reg1, reg2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=R_OP(PC);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=R_OP(PC);
PC+=2;
op2=I16(op2);
SETREG(GET2,op1+op2);
return clkIF;
}
-UINT32 v810_device::opMOVHI(UINT32 op) // movhi imm16, reg1 ,reg2
+uint32_t v810_device::opMOVHI(uint32_t op) // movhi imm16, reg1 ,reg2
{
- UINT32 op2=R_OP(PC);
+ uint32_t op2=R_OP(PC);
PC+=2;
op2=UI16(op2);
op2<<=16;
@@ -208,17 +208,17 @@ UINT32 v810_device::opMOVHI(UINT32 op) // movhi imm16, reg1 ,reg2
return clkIF;
}
-UINT32 v810_device::opMOVi(UINT32 op) // mov imm5,r2
+uint32_t v810_device::opMOVi(uint32_t op) // mov imm5,r2
{
SETREG(GET2,I5(op));
return clkIF;
}
-UINT32 v810_device::opADDr(UINT32 op) // add r1,r2
+uint32_t v810_device::opADDr(uint32_t op) // add r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
- UINT64 res=(UINT64)op2+(UINT64)op1;
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
+ uint64_t res=(uint64_t)op2+(uint64_t)op1;
CHECK_CY(res);
CHECK_OVADD(op1,op2,res);
CHECK_ZS(res);
@@ -226,11 +226,11 @@ UINT32 v810_device::opADDr(UINT32 op) // add r1,r2
return clkIF;
}
-UINT32 v810_device::opADDi(UINT32 op) // add imm5,r2
+uint32_t v810_device::opADDi(uint32_t op) // add imm5,r2
{
- UINT32 op1=I5(op);
- UINT32 op2=GETREG(GET2);
- UINT64 res=(UINT64)op2+(UINT64)op1;
+ uint32_t op1=I5(op);
+ uint32_t op2=GETREG(GET2);
+ uint64_t res=(uint64_t)op2+(uint64_t)op1;
CHECK_CY(res);
CHECK_OVADD(op1,op2,res);
CHECK_ZS(res);
@@ -239,14 +239,14 @@ UINT32 v810_device::opADDi(UINT32 op) // add imm5,r2
}
-UINT32 v810_device::opADDI(UINT32 op) // addi imm16, reg1, reg2
+uint32_t v810_device::opADDI(uint32_t op) // addi imm16, reg1, reg2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=R_OP(PC);
- UINT64 res;
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=R_OP(PC);
+ uint64_t res;
PC+=2;
op2=I16(op2);
- res=(UINT64)op2+(UINT64)op1;
+ res=(uint64_t)op2+(uint64_t)op1;
CHECK_CY(res);
CHECK_OVADD(op1,op2,res);
CHECK_ZS(res);
@@ -254,11 +254,11 @@ UINT32 v810_device::opADDI(UINT32 op) // addi imm16, reg1, reg2
return clkIF;
}
-UINT32 v810_device::opSUBr(UINT32 op) // sub r1,r2
+uint32_t v810_device::opSUBr(uint32_t op) // sub r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
- UINT64 res=(UINT64)op2-(UINT64)op1;
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
+ uint64_t res=(uint64_t)op2-(uint64_t)op1;
CHECK_CY(res);
CHECK_OVSUB(op1,op2,res);
CHECK_ZS(res);
@@ -267,32 +267,32 @@ UINT32 v810_device::opSUBr(UINT32 op) // sub r1,r2
}
-UINT32 v810_device::opCMPr(UINT32 op) // cmp r1,r2
+uint32_t v810_device::opCMPr(uint32_t op) // cmp r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
- UINT64 res=(UINT64)op2-(UINT64)op1;
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
+ uint64_t res=(uint64_t)op2-(uint64_t)op1;
CHECK_CY(res);
CHECK_OVSUB(op1,op2,res);
CHECK_ZS(res);
return clkIF;
}
-UINT32 v810_device::opCMPi(UINT32 op) // cmpi imm5,r2
+uint32_t v810_device::opCMPi(uint32_t op) // cmpi imm5,r2
{
- UINT32 op1=I5(op);
- UINT32 op2=GETREG(GET2);
- UINT64 res=(UINT64)op2-(UINT64)op1;
+ uint32_t op1=I5(op);
+ uint32_t op2=GETREG(GET2);
+ uint64_t res=(uint64_t)op2-(uint64_t)op1;
CHECK_CY(res);
CHECK_OVSUB(op1,op2,res);
CHECK_ZS(res);
return clkIF;
}
-UINT32 v810_device::opSETFi(UINT32 op) // setf imm5,r2
+uint32_t v810_device::opSETFi(uint32_t op) // setf imm5,r2
{
- UINT32 op1=I5(op);
- UINT8 res=0;
+ uint32_t op1=I5(op);
+ uint8_t res=0;
op1&=0xf;
switch(op1)
{
@@ -365,10 +365,10 @@ UINT32 v810_device::opSETFi(UINT32 op) // setf imm5,r2
}
-UINT32 v810_device::opANDr(UINT32 op) // and r1,r2
+uint32_t v810_device::opANDr(uint32_t op) // and r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
op2&=op1;
CHECK_ZS(op2);
SET_OV(0);
@@ -376,10 +376,10 @@ UINT32 v810_device::opANDr(UINT32 op) // and r1,r2
return clkIF;
}
-UINT32 v810_device::opANDI(UINT32 op) // andi imm16,r1,r2
+uint32_t v810_device::opANDI(uint32_t op) // andi imm16,r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=R_OP(PC);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=R_OP(PC);
PC+=2;
op2=UI16(op2);
op2&=op1;
@@ -390,10 +390,10 @@ UINT32 v810_device::opANDI(UINT32 op) // andi imm16,r1,r2
return clkIF;
}
-UINT32 v810_device::opORr(UINT32 op) // or r1,r2
+uint32_t v810_device::opORr(uint32_t op) // or r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
op2|=op1;
CHECK_ZS(op2);
SET_OV(0);
@@ -401,10 +401,10 @@ UINT32 v810_device::opORr(UINT32 op) // or r1,r2
return clkIF;
}
-UINT32 v810_device::opORI(UINT32 op) // ori imm16,r1,r2
+uint32_t v810_device::opORI(uint32_t op) // ori imm16,r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=R_OP(PC);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=R_OP(PC);
PC+=2;
op2=UI16(op2);
op2|=op1;
@@ -415,10 +415,10 @@ UINT32 v810_device::opORI(UINT32 op) // ori imm16,r1,r2
return clkIF;
}
-UINT32 v810_device::opXORr(UINT32 op) // xor r1,r2
+uint32_t v810_device::opXORr(uint32_t op) // xor r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
op2^=op1;
CHECK_ZS(op2);
SET_OV(0);
@@ -427,25 +427,25 @@ UINT32 v810_device::opXORr(UINT32 op) // xor r1,r2
}
-UINT32 v810_device::opLDSR(UINT32 op) // ldsr reg2,regID
+uint32_t v810_device::opLDSR(uint32_t op) // ldsr reg2,regID
{
- UINT32 op1=UI5(op);
+ uint32_t op1=UI5(op);
SETREG(32+op1,GETREG(GET2));
return clkIF;
}
-UINT32 v810_device::opSTSR(UINT32 op) // ldsr regID,reg2
+uint32_t v810_device::opSTSR(uint32_t op) // ldsr regID,reg2
{
- UINT32 op1=UI5(op);
+ uint32_t op1=UI5(op);
SETREG(GET2,GETREG(32+op1));
return clkIF;
}
-UINT32 v810_device::opXORI(UINT32 op) // xori imm16,r1,r2
+uint32_t v810_device::opXORI(uint32_t op) // xori imm16,r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=R_OP(PC);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=R_OP(PC);
PC+=2;
op2=UI16(op2);
op2^=op1;
@@ -456,20 +456,20 @@ UINT32 v810_device::opXORI(UINT32 op) // xori imm16,r1,r2
return clkIF;
}
-UINT32 v810_device::opNOTr(UINT32 op) // not r1,r2
+uint32_t v810_device::opNOTr(uint32_t op) // not r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=~op1;
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=~op1;
CHECK_ZS(op2);
SET_OV(0);
SETREG(GET2,op2);
return clkIF;
}
-UINT32 v810_device::opSHLr(UINT32 op) // shl r1,r2
+uint32_t v810_device::opSHLr(uint32_t op) // shl r1,r2
{
- UINT64 tmp;
- UINT32 count=GETREG(GET1);
+ uint64_t tmp;
+ uint32_t count=GETREG(GET1);
count&=0x1f;
SET_OV(0);
@@ -486,10 +486,10 @@ UINT32 v810_device::opSHLr(UINT32 op) // shl r1,r2
return clkIF;
}
-UINT32 v810_device::opSHLi(UINT32 op) // shl imm5,r2
+uint32_t v810_device::opSHLi(uint32_t op) // shl imm5,r2
{
- UINT64 tmp;
- UINT32 count=UI5(op);
+ uint64_t tmp;
+ uint32_t count=UI5(op);
SET_OV(0);
SET_CY(0);
@@ -505,10 +505,10 @@ UINT32 v810_device::opSHLi(UINT32 op) // shl imm5,r2
return clkIF;
}
-UINT32 v810_device::opSHRr(UINT32 op) // shr r1,r2
+uint32_t v810_device::opSHRr(uint32_t op) // shr r1,r2
{
- UINT64 tmp;
- UINT32 count=GETREG(GET1);
+ uint64_t tmp;
+ uint32_t count=GETREG(GET1);
count&=0x1f;
SET_OV(0);
SET_CY(0);
@@ -523,10 +523,10 @@ UINT32 v810_device::opSHRr(UINT32 op) // shr r1,r2
return clkIF;
}
-UINT32 v810_device::opSHRi(UINT32 op) // shr imm5,r2
+uint32_t v810_device::opSHRi(uint32_t op) // shr imm5,r2
{
- UINT64 tmp;
- UINT32 count=UI5(op);
+ uint64_t tmp;
+ uint32_t count=UI5(op);
SET_OV(0);
SET_CY(0);
if(count)
@@ -541,10 +541,10 @@ UINT32 v810_device::opSHRi(UINT32 op) // shr imm5,r2
return clkIF;
}
-UINT32 v810_device::opSARr(UINT32 op) // sar r1,r2
+uint32_t v810_device::opSARr(uint32_t op) // sar r1,r2
{
- INT32 tmp;
- UINT32 count=GETREG(GET1);
+ int32_t tmp;
+ uint32_t count=GETREG(GET1);
count&=0x1f;
SET_OV(0);
SET_CY(0);
@@ -560,10 +560,10 @@ UINT32 v810_device::opSARr(UINT32 op) // sar r1,r2
return clkIF;
}
-UINT32 v810_device::opSARi(UINT32 op) // sar imm5,r2
+uint32_t v810_device::opSARi(uint32_t op) // sar imm5,r2
{
- INT32 tmp;
- UINT32 count=UI5(op);
+ int32_t tmp;
+ uint32_t count=UI5(op);
SET_OV(0);
SET_CY(0);
if(count)
@@ -578,23 +578,23 @@ UINT32 v810_device::opSARi(UINT32 op) // sar imm5,r2
return clkIF;
}
-UINT32 v810_device::opJMPr(UINT32 op)
+uint32_t v810_device::opJMPr(uint32_t op)
{
PC=GETREG(GET1)&~1;
return clkIF+2;
}
-UINT32 v810_device::opJR(UINT32 op)
+uint32_t v810_device::opJR(uint32_t op)
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC=PC-2+(D26(op,tmp)&~1);
return clkIF+2;
}
-UINT32 v810_device::opJAL(UINT32 op)
+uint32_t v810_device::opJAL(uint32_t op)
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
R31=PC;
PC+=D26(op,tmp);
@@ -604,25 +604,25 @@ UINT32 v810_device::opJAL(UINT32 op)
}
-UINT32 v810_device::opEI(UINT32 op)
+uint32_t v810_device::opEI(uint32_t op)
{
SET_ID(0);
return clkIF;
}
-UINT32 v810_device::opDI(UINT32 op)
+uint32_t v810_device::opDI(uint32_t op)
{
SET_ID(1);
return clkIF;
}
-UINT32 v810_device::opTRAP(UINT32 op)
+uint32_t v810_device::opTRAP(uint32_t op)
{
printf("V810: TRAP @ %X\n",PC-2);
return clkIF;
}
-UINT32 v810_device::opRETI(UINT32 op)
+uint32_t v810_device::opRETI(uint32_t op)
{
if(GET_NP) {
PC = FEPC;
@@ -634,13 +634,13 @@ UINT32 v810_device::opRETI(UINT32 op)
return clkIF;
}
-UINT32 v810_device::opHALT(UINT32 op)
+uint32_t v810_device::opHALT(uint32_t op)
{
printf("V810: HALT @ %X\n",PC-2);
return clkIF;
}
-UINT32 v810_device::opB(UINT32 op)
+uint32_t v810_device::opB(uint32_t op)
{
int doBranch=0;
switch((op>>9)&0xf)
@@ -716,9 +716,9 @@ UINT32 v810_device::opB(UINT32 op)
return clkIF;
}
-UINT32 v810_device::opLDB(UINT32 op) // ld.b disp16[reg1],reg2
+uint32_t v810_device::opLDB(uint32_t op) // ld.b disp16[reg1],reg2
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -728,9 +728,9 @@ UINT32 v810_device::opLDB(UINT32 op) // ld.b disp16[reg1],reg2
return clkIF+clkMEM;
}
-UINT32 v810_device::opLDH(UINT32 op) // ld.h disp16[reg1],reg2
+uint32_t v810_device::opLDH(uint32_t op) // ld.h disp16[reg1],reg2
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -740,9 +740,9 @@ UINT32 v810_device::opLDH(UINT32 op) // ld.h disp16[reg1],reg2
return clkIF+clkMEM;
}
-UINT32 v810_device::opLDW(UINT32 op) // ld.w disp16[reg1],reg2
+uint32_t v810_device::opLDW(uint32_t op) // ld.w disp16[reg1],reg2
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -751,9 +751,9 @@ UINT32 v810_device::opLDW(UINT32 op) // ld.w disp16[reg1],reg2
return clkIF+clkMEM;
}
-UINT32 v810_device::opINB(UINT32 op) // in.b disp16[reg1],reg2
+uint32_t v810_device::opINB(uint32_t op) // in.b disp16[reg1],reg2
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -762,16 +762,16 @@ UINT32 v810_device::opINB(UINT32 op) // in.b disp16[reg1],reg2
return clkIF+clkMEM;
}
-UINT32 v810_device::opCAXI(UINT32 op) // caxi disp16[reg1],reg2
+uint32_t v810_device::opCAXI(uint32_t op) // caxi disp16[reg1],reg2
{
printf("V810 CAXI execute\n");
PC+=2;
return clkIF;
}
-UINT32 v810_device::opINH(UINT32 op) // in.h disp16[reg1],reg2
+uint32_t v810_device::opINH(uint32_t op) // in.h disp16[reg1],reg2
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -780,9 +780,9 @@ UINT32 v810_device::opINH(UINT32 op) // in.h disp16[reg1],reg2
return clkIF+clkMEM;
}
-UINT32 v810_device::opINW(UINT32 op) // in.w disp16[reg1],reg2
+uint32_t v810_device::opINW(uint32_t op) // in.w disp16[reg1],reg2
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -791,9 +791,9 @@ UINT32 v810_device::opINW(UINT32 op) // in.w disp16[reg1],reg2
return clkIF+clkMEM;
}
-UINT32 v810_device::opSTB(UINT32 op) // st.b reg2, disp16[reg1]
+uint32_t v810_device::opSTB(uint32_t op) // st.b reg2, disp16[reg1]
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -801,9 +801,9 @@ UINT32 v810_device::opSTB(UINT32 op) // st.b reg2, disp16[reg1]
return clkIF+clkMEM;
}
-UINT32 v810_device::opSTH(UINT32 op) // st.h reg2, disp16[reg1]
+uint32_t v810_device::opSTH(uint32_t op) // st.h reg2, disp16[reg1]
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -811,9 +811,9 @@ UINT32 v810_device::opSTH(UINT32 op) // st.h reg2, disp16[reg1]
return clkIF+clkMEM;
}
-UINT32 v810_device::opSTW(UINT32 op) // st.w reg2, disp16[reg1]
+uint32_t v810_device::opSTW(uint32_t op) // st.w reg2, disp16[reg1]
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -821,9 +821,9 @@ UINT32 v810_device::opSTW(UINT32 op) // st.w reg2, disp16[reg1]
return clkIF+clkMEM;
}
-UINT32 v810_device::opOUTB(UINT32 op) // out.b reg2, disp16[reg1]
+uint32_t v810_device::opOUTB(uint32_t op) // out.b reg2, disp16[reg1]
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -831,9 +831,9 @@ UINT32 v810_device::opOUTB(UINT32 op) // out.b reg2, disp16[reg1]
return clkIF+clkMEM;
}
-UINT32 v810_device::opOUTH(UINT32 op) // out.h reg2, disp16[reg1]
+uint32_t v810_device::opOUTH(uint32_t op) // out.h reg2, disp16[reg1]
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -841,9 +841,9 @@ UINT32 v810_device::opOUTH(UINT32 op) // out.h reg2, disp16[reg1]
return clkIF+clkMEM;
}
-UINT32 v810_device::opOUTW(UINT32 op) // out.w reg2, disp16[reg1]
+uint32_t v810_device::opOUTW(uint32_t op) // out.w reg2, disp16[reg1]
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
tmp=D16(tmp);
tmp+=GETREG(GET1);
@@ -851,12 +851,12 @@ UINT32 v810_device::opOUTW(UINT32 op) // out.w reg2, disp16[reg1]
return clkIF+clkMEM;
}
-UINT32 v810_device::opMULr(UINT32 op) // mul r1,r2
+uint32_t v810_device::opMULr(uint32_t op) // mul r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
- UINT64 tmp;
- tmp=(INT64)(INT32)op1*(INT64)(INT32)op2;
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
+ uint64_t tmp;
+ tmp=(int64_t)(int32_t)op1*(int64_t)(int32_t)op2;
op2=tmp&0xffffffff;
tmp>>=32;
CHECK_ZS(tmp);//z = bad!
@@ -868,12 +868,12 @@ UINT32 v810_device::opMULr(UINT32 op) // mul r1,r2
return clkIF;
}
-UINT32 v810_device::opMULUr(UINT32 op) // mulu r1,r2
+uint32_t v810_device::opMULUr(uint32_t op) // mulu r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
- UINT64 tmp;
- tmp=(UINT64)op1*(UINT64)op2;
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
+ uint64_t tmp;
+ tmp=(uint64_t)op1*(uint64_t)op2;
op2=tmp&0xffffffff;
tmp>>=32;
CHECK_ZS(tmp);//z = bad!
@@ -885,14 +885,14 @@ UINT32 v810_device::opMULUr(UINT32 op) // mulu r1,r2
return clkIF;
}
-UINT32 v810_device::opDIVr(UINT32 op) // div r1,r2
+uint32_t v810_device::opDIVr(uint32_t op) // div r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
if(op1)
{
- SETREG(30,(INT32)((INT32)op2%(INT32)op1));
- SETREG(GET2,(INT32)((INT32)op2/(INT32)op1));
+ SETREG(30,(int32_t)((int32_t)op2%(int32_t)op1));
+ SETREG(GET2,(int32_t)((int32_t)op2/(int32_t)op1));
SET_OV((op1^op2^GETREG(GET2)) == 0x80000000);
CHECK_ZS(GETREG(GET2));
}
@@ -901,14 +901,14 @@ UINT32 v810_device::opDIVr(UINT32 op) // div r1,r2
return clkIF;
}
-UINT32 v810_device::opDIVUr(UINT32 op) // divu r1,r2
+uint32_t v810_device::opDIVUr(uint32_t op) // divu r1,r2
{
- UINT32 op1=GETREG(GET1);
- UINT32 op2=GETREG(GET2);
+ uint32_t op1=GETREG(GET1);
+ uint32_t op2=GETREG(GET2);
if(op1)
{
- SETREG(30,(INT32)(op2%op1));
- SETREG(GET2,(INT32)(op2/op1));
+ SETREG(30,(int32_t)(op2%op1));
+ SETREG(GET2,(int32_t)(op2/op1));
SET_OV((op1^op2^GETREG(GET2)) == 0x80000000);
CHECK_ZS(GETREG(GET2));
}
@@ -917,7 +917,7 @@ UINT32 v810_device::opDIVUr(UINT32 op) // divu r1,r2
return clkIF;
}
-void v810_device::opADDF(UINT32 op)
+void v810_device::opADDF(uint32_t op)
{
//TODO: CY
float val1=u2f(GETREG(GET1));
@@ -929,7 +929,7 @@ void v810_device::opADDF(UINT32 op)
SETREG(GET2,f2u(val2));
}
-void v810_device::opSUBF(UINT32 op)
+void v810_device::opSUBF(uint32_t op)
{
float val1=u2f(GETREG(GET1));
float val2=u2f(GETREG(GET2));
@@ -941,7 +941,7 @@ void v810_device::opSUBF(UINT32 op)
SETREG(GET2,f2u(val2));
}
-void v810_device::opMULF(UINT32 op)
+void v810_device::opMULF(uint32_t op)
{
//TODO: CY
float val1=u2f(GETREG(GET1));
@@ -953,7 +953,7 @@ void v810_device::opMULF(UINT32 op)
SETREG(GET2,f2u(val2));
}
-void v810_device::opDIVF(UINT32 op)
+void v810_device::opDIVF(uint32_t op)
{
//TODO: CY
float val1=u2f(GETREG(GET1));
@@ -968,16 +968,16 @@ void v810_device::opDIVF(UINT32 op)
SETREG(GET2,f2u(val2));
}
-void v810_device::opTRNC(UINT32 op)
+void v810_device::opTRNC(uint32_t op)
{
float val1=u2f(GETREG(GET1));
SET_OV(0);
SET_Z((val1==0.0f)?1:0);
SET_S((val1<0.0f)?1:0);
- SETREG(GET2,(INT32)val1);
+ SETREG(GET2,(int32_t)val1);
}
-void v810_device::opCMPF(UINT32 op)
+void v810_device::opCMPF(uint32_t op)
{
float val1=u2f(GETREG(GET1));
float val2=u2f(GETREG(GET2));
@@ -988,26 +988,26 @@ void v810_device::opCMPF(UINT32 op)
SET_S((val2<0.0f)?1:0);
}
-void v810_device::opCVTS(UINT32 op)
+void v810_device::opCVTS(uint32_t op)
{
float val1=u2f(GETREG(GET1));
SET_OV(0);
SET_Z((val1==0.0f)?1:0);
SET_S((val1<0.0f)?1:0);
- SETREG(GET2,(INT32)val1);
+ SETREG(GET2,(int32_t)val1);
}
-void v810_device::opCVTW(UINT32 op)
+void v810_device::opCVTW(uint32_t op)
{
//TODO: CY
- float val1=(INT32)GETREG(GET1);
+ float val1=(int32_t)GETREG(GET1);
SET_OV(0);
SET_Z((val1==0.0f)?1:0);
SET_S((val1<0.0f)?1:0);
SETREG(GET2,f2u(val1));
}
-void v810_device::opMPYHW(UINT32 op)
+void v810_device::opMPYHW(uint32_t op)
{
int val1=(GETREG(GET1) & 0xffff);
int val2=(GETREG(GET2) & 0xffff);
@@ -1018,7 +1018,7 @@ void v810_device::opMPYHW(UINT32 op)
SETREG(GET2,val2);
}
-void v810_device::opXB(UINT32 op)
+void v810_device::opXB(uint32_t op)
{
int val=GETREG(GET2);
SET_OV(0);
@@ -1029,7 +1029,7 @@ void v810_device::opXB(UINT32 op)
}
-void v810_device::opXH(UINT32 op)
+void v810_device::opXH(uint32_t op)
{
int val=GETREG(GET2);
SET_OV(0);
@@ -1039,9 +1039,9 @@ void v810_device::opXH(UINT32 op)
SETREG(GET2,val);
}
-UINT32 v810_device::opFpoint(UINT32 op)
+uint32_t v810_device::opFpoint(uint32_t op)
{
- UINT32 tmp=R_OP(PC);
+ uint32_t tmp=R_OP(PC);
PC+=2;
switch((tmp&0xfc00)>>10)
{
@@ -1063,15 +1063,15 @@ UINT32 v810_device::opFpoint(UINT32 op)
}
/* TODO: clocks */
-UINT32 v810_device::opBSU(UINT32 op)
+uint32_t v810_device::opBSU(uint32_t op)
{
if(!(op & 8))
fatalerror("V810: unknown BSU opcode %04x\n",op);
{
- UINT32 srcbit,dstbit,src,dst,size;
- UINT32 dsttmp,tmp;
- UINT8 srctmp;
+ uint32_t srcbit,dstbit,src,dst,size;
+ uint32_t dsttmp,tmp;
+ uint8_t srctmp;
// printf("BDST %08x BSRC %08x SIZE %08x DST %08x SRC %08x\n",R26,R27,R28,R29,R30);
@@ -1350,7 +1350,7 @@ void v810_device::take_interrupt()
PC = 0xfffffe00 | (m_irq_line << 4);
ECR = 0xfe00 | (m_irq_line << 4);
- UINT8 num = m_irq_line + 1;
+ uint8_t num = m_irq_line + 1;
if (num==0x10) num=0x0f;
PSW &= 0xfff0ffff; // clear interrupt level
@@ -1372,7 +1372,7 @@ void v810_device::execute_run()
}
while(m_icount>0)
{
- UINT32 op;
+ uint32_t op;
m_PPC=PC;
debugger_instruction_hook(this, PC);
diff --git a/src/devices/cpu/v810/v810.h b/src/devices/cpu/v810/v810.h
index 4e85ed7b540..7b9769cd3ff 100644
--- a/src/devices/cpu/v810/v810.h
+++ b/src/devices/cpu/v810/v810.h
@@ -83,7 +83,7 @@ class v810_device : public cpu_device
{
public:
// construction/destruction
- v810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -91,9 +91,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 3; }
- virtual UINT32 execute_max_cycles() const override { return 6; }
- virtual UINT32 execute_input_lines() const override { return 16; }
+ virtual uint32_t execute_min_cycles() const override { return 3; }
+ virtual uint32_t execute_max_cycles() const override { return 6; }
+ virtual uint32_t execute_input_lines() const override { return 16; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -104,95 +104,95 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
- typedef UINT32 (v810_device::*opcode_func)(UINT32 op);
+ typedef uint32_t (v810_device::*opcode_func)(uint32_t op);
static const opcode_func s_OpCodeTable[64];
address_space_config m_program_config;
address_space_config m_io_config;
- UINT32 m_reg[65];
- UINT8 m_irq_line;
- UINT8 m_irq_state;
- UINT8 m_nmi_line;
+ uint32_t m_reg[65];
+ uint8_t m_irq_line;
+ uint8_t m_irq_state;
+ uint8_t m_nmi_line;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
- UINT32 m_PPC;
+ uint32_t m_PPC;
int m_icount;
- inline void SETREG(UINT32 reg,UINT32 val);
- inline UINT32 GETREG(UINT32 reg);
- UINT32 opUNDEF(UINT32 op);
- UINT32 opMOVr(UINT32 op);
- UINT32 opMOVEA(UINT32 op);
- UINT32 opMOVHI(UINT32 op);
- UINT32 opMOVi(UINT32 op);
- UINT32 opADDr(UINT32 op);
- UINT32 opADDi(UINT32 op);
- UINT32 opADDI(UINT32 op);
- UINT32 opSUBr(UINT32 op);
- UINT32 opCMPr(UINT32 op);
- UINT32 opCMPi(UINT32 op);
- UINT32 opSETFi(UINT32 op);
- UINT32 opANDr(UINT32 op);
- UINT32 opANDI(UINT32 op);
- UINT32 opORr(UINT32 op);
- UINT32 opORI(UINT32 op);
- UINT32 opXORr(UINT32 op);
- UINT32 opLDSR(UINT32 op);
- UINT32 opSTSR(UINT32 op);
- UINT32 opXORI(UINT32 op);
- UINT32 opNOTr(UINT32 op);
- UINT32 opSHLr(UINT32 op);
- UINT32 opSHLi(UINT32 op);
- UINT32 opSHRr(UINT32 op);
- UINT32 opSHRi(UINT32 op);
- UINT32 opSARr(UINT32 op);
- UINT32 opSARi(UINT32 op);
- UINT32 opJMPr(UINT32 op);
- UINT32 opJR(UINT32 op);
- UINT32 opJAL(UINT32 op);
- UINT32 opEI(UINT32 op);
- UINT32 opDI(UINT32 op);
- UINT32 opTRAP(UINT32 op);
- UINT32 opRETI(UINT32 op);
- UINT32 opHALT(UINT32 op);
- UINT32 opB(UINT32 op);
- UINT32 opLDB(UINT32 op);
- UINT32 opLDH(UINT32 op);
- UINT32 opLDW(UINT32 op);
- UINT32 opINB(UINT32 op);
- UINT32 opCAXI(UINT32 op);
- UINT32 opINH(UINT32 op);
- UINT32 opINW(UINT32 op);
- UINT32 opSTB(UINT32 op);
- UINT32 opSTH(UINT32 op);
- UINT32 opSTW(UINT32 op);
- UINT32 opOUTB(UINT32 op);
- UINT32 opOUTH(UINT32 op);
- UINT32 opOUTW(UINT32 op);
- UINT32 opMULr(UINT32 op);
- UINT32 opMULUr(UINT32 op);
- UINT32 opDIVr(UINT32 op);
- UINT32 opDIVUr(UINT32 op);
- void opADDF(UINT32 op);
- void opSUBF(UINT32 op);
- void opMULF(UINT32 op);
- void opDIVF(UINT32 op);
- void opTRNC(UINT32 op);
- void opCMPF(UINT32 op);
- void opCVTS(UINT32 op);
- void opCVTW(UINT32 op);
- void opMPYHW(UINT32 op);
- void opXB(UINT32 op);
- void opXH(UINT32 op);
- UINT32 opFpoint(UINT32 op);
- UINT32 opBSU(UINT32 op);
+ inline void SETREG(uint32_t reg,uint32_t val);
+ inline uint32_t GETREG(uint32_t reg);
+ uint32_t opUNDEF(uint32_t op);
+ uint32_t opMOVr(uint32_t op);
+ uint32_t opMOVEA(uint32_t op);
+ uint32_t opMOVHI(uint32_t op);
+ uint32_t opMOVi(uint32_t op);
+ uint32_t opADDr(uint32_t op);
+ uint32_t opADDi(uint32_t op);
+ uint32_t opADDI(uint32_t op);
+ uint32_t opSUBr(uint32_t op);
+ uint32_t opCMPr(uint32_t op);
+ uint32_t opCMPi(uint32_t op);
+ uint32_t opSETFi(uint32_t op);
+ uint32_t opANDr(uint32_t op);
+ uint32_t opANDI(uint32_t op);
+ uint32_t opORr(uint32_t op);
+ uint32_t opORI(uint32_t op);
+ uint32_t opXORr(uint32_t op);
+ uint32_t opLDSR(uint32_t op);
+ uint32_t opSTSR(uint32_t op);
+ uint32_t opXORI(uint32_t op);
+ uint32_t opNOTr(uint32_t op);
+ uint32_t opSHLr(uint32_t op);
+ uint32_t opSHLi(uint32_t op);
+ uint32_t opSHRr(uint32_t op);
+ uint32_t opSHRi(uint32_t op);
+ uint32_t opSARr(uint32_t op);
+ uint32_t opSARi(uint32_t op);
+ uint32_t opJMPr(uint32_t op);
+ uint32_t opJR(uint32_t op);
+ uint32_t opJAL(uint32_t op);
+ uint32_t opEI(uint32_t op);
+ uint32_t opDI(uint32_t op);
+ uint32_t opTRAP(uint32_t op);
+ uint32_t opRETI(uint32_t op);
+ uint32_t opHALT(uint32_t op);
+ uint32_t opB(uint32_t op);
+ uint32_t opLDB(uint32_t op);
+ uint32_t opLDH(uint32_t op);
+ uint32_t opLDW(uint32_t op);
+ uint32_t opINB(uint32_t op);
+ uint32_t opCAXI(uint32_t op);
+ uint32_t opINH(uint32_t op);
+ uint32_t opINW(uint32_t op);
+ uint32_t opSTB(uint32_t op);
+ uint32_t opSTH(uint32_t op);
+ uint32_t opSTW(uint32_t op);
+ uint32_t opOUTB(uint32_t op);
+ uint32_t opOUTH(uint32_t op);
+ uint32_t opOUTW(uint32_t op);
+ uint32_t opMULr(uint32_t op);
+ uint32_t opMULUr(uint32_t op);
+ uint32_t opDIVr(uint32_t op);
+ uint32_t opDIVUr(uint32_t op);
+ void opADDF(uint32_t op);
+ void opSUBF(uint32_t op);
+ void opMULF(uint32_t op);
+ void opDIVF(uint32_t op);
+ void opTRNC(uint32_t op);
+ void opCMPF(uint32_t op);
+ void opCVTS(uint32_t op);
+ void opCVTW(uint32_t op);
+ void opMPYHW(uint32_t op);
+ void opXB(uint32_t op);
+ void opXH(uint32_t op);
+ uint32_t opFpoint(uint32_t op);
+ uint32_t opBSU(uint32_t op);
void take_interrupt();
};
diff --git a/src/devices/cpu/v810/v810dasm.cpp b/src/devices/cpu/v810/v810dasm.cpp
index 2f541cc73c4..d45ff377f43 100644
--- a/src/devices/cpu/v810/v810dasm.cpp
+++ b/src/devices/cpu/v810/v810dasm.cpp
@@ -41,8 +41,8 @@ static const char *const dRegs[]=
CPU_DISASSEMBLE( v810 )
{
- UINT32 flags = 0;
- UINT32 opc,opc2;
+ uint32_t flags = 0;
+ uint32_t opc,opc2;
unsigned size;
opc = oprom[0] | (oprom[1] << 8);
opc2 = oprom[2] | (oprom[3] << 8);
diff --git a/src/devices/cpu/x86emit.h b/src/devices/cpu/x86emit.h
index f2a53332400..5494c0b5668 100644
--- a/src/devices/cpu/x86emit.h
+++ b/src/devices/cpu/x86emit.h
@@ -25,31 +25,31 @@
#define __X86EMIT_H__
// use x86code * to reference generated code
-typedef UINT8 x86code;
+typedef uint8_t x86code;
// this structure tracks information about a link
struct emit_link
{
x86code * target;
- UINT8 size;
+ uint8_t size;
};
// structure for describing memory references
class x86_memref
{
public:
- x86_memref(UINT8 basereg, UINT8 indreg, UINT8 scale, INT32 disp)
+ x86_memref(uint8_t basereg, uint8_t indreg, uint8_t scale, int32_t disp)
: m_base(basereg),
m_index(indreg),
m_scale(scale),
m_disp(disp) { }
- x86_memref operator+(INT32 offset) { return x86_memref(m_base, m_index, m_scale, m_disp + offset); }
+ x86_memref operator+(int32_t offset) { return x86_memref(m_base, m_index, m_scale, m_disp + offset); }
- UINT8 m_base;
- UINT8 m_index;
- UINT8 m_scale;
- INT32 m_disp;
+ uint8_t m_base;
+ uint8_t m_index;
+ uint8_t m_scale;
+ int32_t m_disp;
};
#endif
@@ -78,9 +78,9 @@ namespace x64emit
//**************************************************************************
// opcode size flag; low 4 bits must match REX low 4 bits, hence the odd numbers here
-const UINT8 OP_16BIT = 0x10;
-const UINT8 OP_32BIT = 0x00;
-const UINT8 OP_64BIT = 0x08;
+const uint8_t OP_16BIT = 0x10;
+const uint8_t OP_32BIT = 0x00;
+const uint8_t OP_64BIT = 0x08;
// 16 registers on x64, only 8 on x86
#if (X86EMIT_SIZE == 64)
@@ -90,170 +90,170 @@ const int REG_MAX = 8;
#endif
// invalid register index for "none"
-const UINT8 REG_NONE = REG_MAX;
+const uint8_t REG_NONE = REG_MAX;
// 8-bit registers -- note that we assume a flat model for 64-bit
-const UINT8 REG_AL = 0;
-const UINT8 REG_CL = 1;
-const UINT8 REG_DL = 2;
-const UINT8 REG_BL = 3;
+const uint8_t REG_AL = 0;
+const uint8_t REG_CL = 1;
+const uint8_t REG_DL = 2;
+const uint8_t REG_BL = 3;
#if (X86EMIT_SIZE == 32)
-const UINT8 REG_AH = 4;
-const UINT8 REG_CH = 5;
-const UINT8 REG_DH = 6;
-const UINT8 REG_BH = 7;
+const uint8_t REG_AH = 4;
+const uint8_t REG_CH = 5;
+const uint8_t REG_DH = 6;
+const uint8_t REG_BH = 7;
#else
-const UINT8 REG_SPL = 4;
-const UINT8 REG_BPL = 5;
-const UINT8 REG_SIL = 6;
-const UINT8 REG_DIL = 7;
-const UINT8 REG_R8L = 8;
-const UINT8 REG_R9L = 9;
-const UINT8 REG_R10L = 10;
-const UINT8 REG_R11L = 11;
-const UINT8 REG_R12L = 12;
-const UINT8 REG_R13L = 13;
-const UINT8 REG_R14L = 14;
-const UINT8 REG_R15L = 15;
+const uint8_t REG_SPL = 4;
+const uint8_t REG_BPL = 5;
+const uint8_t REG_SIL = 6;
+const uint8_t REG_DIL = 7;
+const uint8_t REG_R8L = 8;
+const uint8_t REG_R9L = 9;
+const uint8_t REG_R10L = 10;
+const uint8_t REG_R11L = 11;
+const uint8_t REG_R12L = 12;
+const uint8_t REG_R13L = 13;
+const uint8_t REG_R14L = 14;
+const uint8_t REG_R15L = 15;
#endif
// 16-bit registers
-const UINT8 REG_AX = 0;
-const UINT8 REG_CX = 1;
-const UINT8 REG_DX = 2;
-const UINT8 REG_BX = 3;
-const UINT8 REG_SP = 4;
-const UINT8 REG_BP = 5;
-const UINT8 REG_SI = 6;
-const UINT8 REG_DI = 7;
+const uint8_t REG_AX = 0;
+const uint8_t REG_CX = 1;
+const uint8_t REG_DX = 2;
+const uint8_t REG_BX = 3;
+const uint8_t REG_SP = 4;
+const uint8_t REG_BP = 5;
+const uint8_t REG_SI = 6;
+const uint8_t REG_DI = 7;
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_R8W = 8;
-const UINT8 REG_R9W = 9;
-const UINT8 REG_R10W = 10;
-const UINT8 REG_R11W = 11;
-const UINT8 REG_R12W = 12;
-const UINT8 REG_R13W = 13;
-const UINT8 REG_R14W = 14;
-const UINT8 REG_R15W = 15;
+const uint8_t REG_R8W = 8;
+const uint8_t REG_R9W = 9;
+const uint8_t REG_R10W = 10;
+const uint8_t REG_R11W = 11;
+const uint8_t REG_R12W = 12;
+const uint8_t REG_R13W = 13;
+const uint8_t REG_R14W = 14;
+const uint8_t REG_R15W = 15;
#endif
// 32-bit registers
-const UINT8 REG_EAX = 0;
-const UINT8 REG_ECX = 1;
-const UINT8 REG_EDX = 2;
-const UINT8 REG_EBX = 3;
-const UINT8 REG_ESP = 4;
-const UINT8 REG_EBP = 5;
-const UINT8 REG_ESI = 6;
-const UINT8 REG_EDI = 7;
+const uint8_t REG_EAX = 0;
+const uint8_t REG_ECX = 1;
+const uint8_t REG_EDX = 2;
+const uint8_t REG_EBX = 3;
+const uint8_t REG_ESP = 4;
+const uint8_t REG_EBP = 5;
+const uint8_t REG_ESI = 6;
+const uint8_t REG_EDI = 7;
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_R8D = 8;
-const UINT8 REG_R9D = 9;
-const UINT8 REG_R10D = 10;
-const UINT8 REG_R11D = 11;
-const UINT8 REG_R12D = 12;
-const UINT8 REG_R13D = 13;
-const UINT8 REG_R14D = 14;
-const UINT8 REG_R15D = 15;
+const uint8_t REG_R8D = 8;
+const uint8_t REG_R9D = 9;
+const uint8_t REG_R10D = 10;
+const uint8_t REG_R11D = 11;
+const uint8_t REG_R12D = 12;
+const uint8_t REG_R13D = 13;
+const uint8_t REG_R14D = 14;
+const uint8_t REG_R15D = 15;
#endif
// 64-bit registers
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_RAX = 0;
-const UINT8 REG_RCX = 1;
-const UINT8 REG_RDX = 2;
-const UINT8 REG_RBX = 3;
-const UINT8 REG_RSP = 4;
-const UINT8 REG_RBP = 5;
-const UINT8 REG_RSI = 6;
-const UINT8 REG_RDI = 7;
-const UINT8 REG_R8 = 8;
-const UINT8 REG_R9 = 9;
-const UINT8 REG_R10 = 10;
-const UINT8 REG_R11 = 11;
-const UINT8 REG_R12 = 12;
-const UINT8 REG_R13 = 13;
-const UINT8 REG_R14 = 14;
-const UINT8 REG_R15 = 15;
+const uint8_t REG_RAX = 0;
+const uint8_t REG_RCX = 1;
+const uint8_t REG_RDX = 2;
+const uint8_t REG_RBX = 3;
+const uint8_t REG_RSP = 4;
+const uint8_t REG_RBP = 5;
+const uint8_t REG_RSI = 6;
+const uint8_t REG_RDI = 7;
+const uint8_t REG_R8 = 8;
+const uint8_t REG_R9 = 9;
+const uint8_t REG_R10 = 10;
+const uint8_t REG_R11 = 11;
+const uint8_t REG_R12 = 12;
+const uint8_t REG_R13 = 13;
+const uint8_t REG_R14 = 14;
+const uint8_t REG_R15 = 15;
#endif
// 64-bit MMX registers
-const UINT8 REG_MM0 = 0;
-const UINT8 REG_MM1 = 1;
-const UINT8 REG_MM2 = 2;
-const UINT8 REG_MM3 = 3;
-const UINT8 REG_MM4 = 4;
-const UINT8 REG_MM5 = 5;
-const UINT8 REG_MM6 = 6;
-const UINT8 REG_MM7 = 7;
+const uint8_t REG_MM0 = 0;
+const uint8_t REG_MM1 = 1;
+const uint8_t REG_MM2 = 2;
+const uint8_t REG_MM3 = 3;
+const uint8_t REG_MM4 = 4;
+const uint8_t REG_MM5 = 5;
+const uint8_t REG_MM6 = 6;
+const uint8_t REG_MM7 = 7;
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_MM8 = 8;
-const UINT8 REG_MM9 = 9;
-const UINT8 REG_MM10 = 10;
-const UINT8 REG_MM11 = 11;
-const UINT8 REG_MM12 = 12;
-const UINT8 REG_MM13 = 13;
-const UINT8 REG_MM14 = 14;
-const UINT8 REG_MM15 = 15;
+const uint8_t REG_MM8 = 8;
+const uint8_t REG_MM9 = 9;
+const uint8_t REG_MM10 = 10;
+const uint8_t REG_MM11 = 11;
+const uint8_t REG_MM12 = 12;
+const uint8_t REG_MM13 = 13;
+const uint8_t REG_MM14 = 14;
+const uint8_t REG_MM15 = 15;
#endif
// 128-bit XMM registers
-const UINT8 REG_XMM0 = 0;
-const UINT8 REG_XMM1 = 1;
-const UINT8 REG_XMM2 = 2;
-const UINT8 REG_XMM3 = 3;
-const UINT8 REG_XMM4 = 4;
-const UINT8 REG_XMM5 = 5;
-const UINT8 REG_XMM6 = 6;
-const UINT8 REG_XMM7 = 7;
+const uint8_t REG_XMM0 = 0;
+const uint8_t REG_XMM1 = 1;
+const uint8_t REG_XMM2 = 2;
+const uint8_t REG_XMM3 = 3;
+const uint8_t REG_XMM4 = 4;
+const uint8_t REG_XMM5 = 5;
+const uint8_t REG_XMM6 = 6;
+const uint8_t REG_XMM7 = 7;
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_XMM8 = 8;
-const UINT8 REG_XMM9 = 9;
-const UINT8 REG_XMM10 = 10;
-const UINT8 REG_XMM11 = 11;
-const UINT8 REG_XMM12 = 12;
-const UINT8 REG_XMM13 = 13;
-const UINT8 REG_XMM14 = 14;
-const UINT8 REG_XMM15 = 15;
+const uint8_t REG_XMM8 = 8;
+const uint8_t REG_XMM9 = 9;
+const uint8_t REG_XMM10 = 10;
+const uint8_t REG_XMM11 = 11;
+const uint8_t REG_XMM12 = 12;
+const uint8_t REG_XMM13 = 13;
+const uint8_t REG_XMM14 = 14;
+const uint8_t REG_XMM15 = 15;
#endif
// conditions
-const UINT8 COND_A = 7;
-const UINT8 COND_AE = 3;
-const UINT8 COND_B = 2;
-const UINT8 COND_BE = 6;
-const UINT8 COND_C = 2;
-const UINT8 COND_E = 4;
-const UINT8 COND_Z = 4;
-const UINT8 COND_G = 15;
-const UINT8 COND_GE = 13;
-const UINT8 COND_L = 12;
-const UINT8 COND_LE = 14;
-const UINT8 COND_NA = 6;
-const UINT8 COND_NAE = 2;
-const UINT8 COND_NB = 3;
-const UINT8 COND_NBE = 7;
-const UINT8 COND_NC = 3;
-const UINT8 COND_NE = 5;
-const UINT8 COND_NG = 14;
-const UINT8 COND_NGE = 12;
-const UINT8 COND_NL = 13;
-const UINT8 COND_NLE = 15;
-const UINT8 COND_NO = 1;
-const UINT8 COND_NP = 11;
-const UINT8 COND_NS = 9;
-const UINT8 COND_NZ = 5;
-const UINT8 COND_O = 0;
-const UINT8 COND_P = 10;
-const UINT8 COND_PE = 10;
-const UINT8 COND_PO = 11;
-const UINT8 COND_S = 8;
+const uint8_t COND_A = 7;
+const uint8_t COND_AE = 3;
+const uint8_t COND_B = 2;
+const uint8_t COND_BE = 6;
+const uint8_t COND_C = 2;
+const uint8_t COND_E = 4;
+const uint8_t COND_Z = 4;
+const uint8_t COND_G = 15;
+const uint8_t COND_GE = 13;
+const uint8_t COND_L = 12;
+const uint8_t COND_LE = 14;
+const uint8_t COND_NA = 6;
+const uint8_t COND_NAE = 2;
+const uint8_t COND_NB = 3;
+const uint8_t COND_NBE = 7;
+const uint8_t COND_NC = 3;
+const uint8_t COND_NE = 5;
+const uint8_t COND_NG = 14;
+const uint8_t COND_NGE = 12;
+const uint8_t COND_NL = 13;
+const uint8_t COND_NLE = 15;
+const uint8_t COND_NO = 1;
+const uint8_t COND_NP = 11;
+const uint8_t COND_NS = 9;
+const uint8_t COND_NZ = 5;
+const uint8_t COND_O = 0;
+const uint8_t COND_P = 10;
+const uint8_t COND_PE = 10;
+const uint8_t COND_PO = 11;
+const uint8_t COND_S = 8;
// floating point rounding modes
-const UINT8 FPRND_NEAR = 0;
-const UINT8 FPRND_DOWN = 1;
-const UINT8 FPRND_UP = 2;
-const UINT8 FPRND_CHOP = 3;
+const uint8_t FPRND_NEAR = 0;
+const uint8_t FPRND_DOWN = 1;
+const uint8_t FPRND_UP = 2;
+const uint8_t FPRND_CHOP = 3;
@@ -262,907 +262,907 @@ const UINT8 FPRND_CHOP = 3;
//**************************************************************************
// opcode flags (in upper 8 bits of opcode)
-const UINT32 OPFLAG_8BITREG = (1 << 24);
-const UINT32 OPFLAG_8BITRM = (1 << 25);
+const uint32_t OPFLAG_8BITREG = (1 << 24);
+const uint32_t OPFLAG_8BITRM = (1 << 25);
// single byte opcodes
-const UINT32 OP_ADD_Eb_Gb = (0x00 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_ADD_Ev_Gv = 0x01;
-const UINT32 OP_ADD_Gb_Eb = (0x02 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_ADD_Gv_Ev = 0x03;
-const UINT32 OP_ADD_AL_Ib = 0x04;
-const UINT32 OP_ADD_rAX_Iz = 0x05;
-const UINT32 OP_PUSH_ES = 0x06;
-const UINT32 OP_POP_ES = 0x07;
-const UINT32 OP_OR_Eb_Gb = (0x08 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_OR_Ev_Gv = 0x09;
-const UINT32 OP_OR_Gb_Eb = (0x0a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_OR_Gv_Ev = 0x0b;
-const UINT32 OP_OR_AL_Ib = 0x0c;
-const UINT32 OP_OR_eAX_Iv = 0x0d;
-const UINT32 OP_PUSH_CS = 0x0e;
-const UINT32 OP_EXTENDED = 0x0f;
-
-const UINT32 OP_ADC_Eb_Gb = (0x10 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_ADC_Ev_Gv = 0x11;
-const UINT32 OP_ADC_Gb_Eb = (0x12 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_ADC_Gv_Ev = 0x13;
-const UINT32 OP_ADC_AL_Ib = 0x14;
-const UINT32 OP_ADC_rAX_Iz = 0x15;
-const UINT32 OP_PUSH_SS = 0x16;
-const UINT32 OP_POP_SS = 0x17;
-const UINT32 OP_SBB_Eb_Gb = (0x18 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_SBB_Ev_Gv = 0x19;
-const UINT32 OP_SBB_Gb_Eb = (0x1a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_SBB_Gv_Ev = 0x1b;
-const UINT32 OP_SBB_AL_Ib = 0x1c;
-const UINT32 OP_SBB_eAX_Iv = 0x1d;
-const UINT32 OP_PUSH_DS = 0x1e;
-const UINT32 OP_POP_DS = 0x1f;
-
-const UINT32 OP_AND_Eb_Gb = (0x20 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_AND_Ev_Gv = 0x21;
-const UINT32 OP_AND_Gb_Eb = (0x22 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_AND_Gv_Ev = 0x23;
-const UINT32 OP_AND_AL_Ib = 0x24;
-const UINT32 OP_AND_rAX_Iz = 0x25;
-const UINT32 PREFIX_ES = 0x26;
-const UINT32 OP_DAA = 0x27;
-const UINT32 OP_SUB_Eb_Gb = (0x28 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_SUB_Ev_Gv = 0x29;
-const UINT32 OP_SUB_Gb_Eb = (0x2a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_SUB_Gv_Ev = 0x2b;
-const UINT32 OP_SUB_AL_Ib = 0x2c;
-const UINT32 OP_SUB_eAX_Iv = 0x2d;
-const UINT32 PREFIX_CS = 0x2e;
-const UINT32 OP_DAS = 0x2f;
-
-const UINT32 OP_XOR_Eb_Gb = (0x30 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_XOR_Ev_Gv = 0x31;
-const UINT32 OP_XOR_Gb_Eb = (0x32 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_XOR_Gv_Ev = 0x33;
-const UINT32 OP_XOR_AL_Ib = 0x34;
-const UINT32 OP_XOR_rAX_Iz = 0x35;
-const UINT32 PREFIX_SS = 0x36;
-const UINT32 OP_AAA = 0x37;
-const UINT32 OP_CMP_Eb_Gb = (0x38 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_CMP_Ev_Gv = 0x39;
-const UINT32 OP_CMP_Gb_Eb = (0x3a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_CMP_Gv_Ev = 0x3b;
-const UINT32 OP_CMP_AL_Ib = 0x3c;
-const UINT32 OP_CMP_eAX_Iv = 0x3d;
-const UINT32 PREFIX_DS = 0x3e;
-const UINT32 OP_AAS = 0x3f;
-
-const UINT32 OP_REX = 0x40;
-const UINT32 OP_REX_B = 0x41;
-const UINT32 OP_REX_X = 0x42;
-const UINT32 OP_REX_XB = 0x43;
-const UINT32 OP_REX_R = 0x44;
-const UINT32 OP_REX_RB = 0x45;
-const UINT32 OP_REX_RX = 0x46;
-const UINT32 OP_REX_RXB = 0x47;
-const UINT32 OP_REX_W = 0x48;
-const UINT32 OP_REX_WB = 0x49;
-const UINT32 OP_REX_WX = 0x4a;
-const UINT32 OP_REX_WXB = 0x4b;
-const UINT32 OP_REX_WR = 0x4c;
-const UINT32 OP_REX_WRB = 0x4d;
-const UINT32 OP_REX_WRX = 0x4e;
-const UINT32 OP_REX_WRXB = 0x4f;
-
-const UINT32 OP_PUSH_rAX = 0x50;
-const UINT32 OP_PUSH_rCX = 0x51;
-const UINT32 OP_PUSH_rDX = 0x52;
-const UINT32 OP_PUSH_rBX = 0x53;
-const UINT32 OP_PUSH_rSP = 0x54;
-const UINT32 OP_PUSH_rBP = 0x55;
-const UINT32 OP_PUSH_rSI = 0x56;
-const UINT32 OP_PUSH_rDI = 0x57;
-const UINT32 OP_POP_rAX = 0x58;
-const UINT32 OP_POP_rCX = 0x59;
-const UINT32 OP_POP_rDX = 0x5a;
-const UINT32 OP_POP_rBX = 0x5b;
-const UINT32 OP_POP_rSP = 0x5c;
-const UINT32 OP_POP_rBP = 0x5d;
-const UINT32 OP_POP_rSI = 0x5e;
-const UINT32 OP_POP_rDI = 0x5f;
-
-const UINT32 OP_PUSHA = 0x60;
-const UINT32 OP_POPA = 0x61;
-const UINT32 OP_BOUND_Gv_Ma = 0x62;
-const UINT32 OP_ARPL_Ew_Gw = 0x63;
-const UINT32 OP_MOVSXD_Gv_Ev = 0x63;
-const UINT32 PREFIX_FS = 0x64;
-const UINT32 PREFIX_GS = 0x65;
-const UINT32 PREFIX_OPSIZE = 0x66;
-const UINT32 PREFIX_ADSIZE = 0x67;
-const UINT32 OP_PUSH_Iz = 0x68;
-const UINT32 OP_IMUL_Gv_Ev_Iz = 0x69;
-const UINT32 OP_PUSH_Ib = 0x6a;
-const UINT32 OP_IMUL_Gv_Ev_Ib = 0x6b;
-const UINT32 OP_INS_Yb_DX = 0x6c;
-const UINT32 OP_INS_Yz_DX = 0x6d;
-const UINT32 OP_OUTS_DX_Xb = 0x6e;
-const UINT32 OP_OUTS_DX_Xz = 0x6f;
-
-const UINT32 OP_JCC_O_Jb = 0x70;
-const UINT32 OP_JCC_NO_Jb = 0x71;
-const UINT32 OP_JCC_B_Jb = 0x72;
-const UINT32 OP_JCC_C_Jb = 0x72;
-const UINT32 OP_JCC_NAE_Jb = 0x72;
-const UINT32 OP_JCC_AE_Jb = 0x73;
-const UINT32 OP_JCC_NB_Jb = 0x73;
-const UINT32 OP_JCC_NC_Jb = 0x73;
-const UINT32 OP_JCC_E_Jb = 0x74;
-const UINT32 OP_JCC_Z_Jb = 0x74;
-const UINT32 OP_JCC_NE_Jb = 0x75;
-const UINT32 OP_JCC_NZ_Jb = 0x75;
-const UINT32 OP_JCC_BE_Jb = 0x76;
-const UINT32 OP_JCC_NA_Jb = 0x76;
-const UINT32 OP_JCC_A_Jb = 0x77;
-const UINT32 OP_JCC_NBE_Jb = 0x77;
-const UINT32 OP_JCC_S_Jb = 0x78;
-const UINT32 OP_JCC_NS_Jb = 0x79;
-const UINT32 OP_JCC_P_Jb = 0x7a;
-const UINT32 OP_JCC_PE_Jb = 0x7a;
-const UINT32 OP_JCC_NP_Jb = 0x7b;
-const UINT32 OP_JCC_PO_Jb = 0x7b;
-const UINT32 OP_JCC_L_Jb = 0x7c;
-const UINT32 OP_JCC_NGE_Jb = 0x7c;
-const UINT32 OP_JCC_NL_Jb = 0x7d;
-const UINT32 OP_JCC_GE_Jb = 0x7d;
-const UINT32 OP_JCC_LE_Jb = 0x7e;
-const UINT32 OP_JCC_NG_Jb = 0x7e;
-const UINT32 OP_JCC_NLE_Jb = 0x7f;
-const UINT32 OP_JCC_G_Jb = 0x7f;
-
-const UINT32 OP_G1_Eb_Ib = (0x80 | OPFLAG_8BITRM);
-const UINT32 OP_G1_Ev_Iz = 0x81;
-const UINT32 OP_G1_Eb_Ibx = (0x82 | OPFLAG_8BITRM);
-const UINT32 OP_G1_Ev_Ib = 0x83;
-const UINT32 OP_TEST_Eb_Gb = (0x84 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_TEST_Ev_Gv = 0x85;
-const UINT32 OP_XCHG_Eb_Gb = (0x86 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_XCHG_Ev_Gv = 0x87;
-const UINT32 OP_MOV_Eb_Gb = (0x88 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_MOV_Ev_Gv = 0x89;
-const UINT32 OP_MOV_Gb_Eb = (0x8a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_MOV_Gv_Ev = 0x8b;
-const UINT32 OP_MOV_Ev_Sw = 0x8c;
-const UINT32 OP_LEA_Gv_M = 0x8d;
-const UINT32 OP_MOV_Sw_Ew = 0x8e;
-const UINT32 OP_G1A_Ev = 0x8f;
-
-const UINT32 OP_NOP = 0x90;
-const UINT32 OP_PAUSE = 0x90;
-const UINT32 OP_XCHG_rCX = 0x91;
-const UINT32 OP_XCHG_rDX = 0x92;
-const UINT32 OP_XCHG_rBX = 0x93;
-const UINT32 OP_XCHG_rSP = 0x94;
-const UINT32 OP_XCHG_rBP = 0x95;
-const UINT32 OP_XCHG_rSI = 0x96;
-const UINT32 OP_XCHG_rDI = 0x97;
-const UINT32 OP_CBW = 0x98;
-const UINT32 OP_CWDE = 0x98;
-const UINT32 OP_CDQE = 0x98;
-const UINT32 OP_CWD = 0x99;
-const UINT32 OP_CDQ = 0x99;
-const UINT32 OP_CQO = 0x99;
-const UINT32 OP_CALLF_Ap = 0x9a;
-const UINT32 OP_FWAIT = 0x9b;
-const UINT32 OP_PUSHF_Fv = 0x9c;
-const UINT32 OP_POPF_Fv = 0x9d;
-const UINT32 OP_SAHF = 0x9e;
-const UINT32 OP_LAHF = 0x9f;
-
-const UINT32 OP_MOV_AL_Ob = 0xa0;
-const UINT32 OP_MOV_rAX_Ov = 0xa1;
-const UINT32 OP_MOV_Ob_AL = 0xa2;
-const UINT32 OP_MOV_Ov_rAX = 0xa3;
-const UINT32 OP_MOVS_Xb_Yb = 0xa4;
-const UINT32 OP_MOVS_Xv_Yv = 0xa5;
-const UINT32 OP_CMPS_Xb_Yb = 0xa6;
-const UINT32 OP_CMPS_Xv_Yv = 0xa7;
-const UINT32 OP_TEST_AL_Ib = 0xa8;
-const UINT32 OP_TEST_rAX_Iz = 0xa9;
-const UINT32 OP_STOS_Yb_AL = 0xaa;
-const UINT32 OP_STOS_Yv_rAX = 0xab;
-const UINT32 OP_LODS_AL_Xb = 0xac;
-const UINT32 OP_LODS_rAX_Xv = 0xad;
-const UINT32 OP_SCAS_AL_Yb = 0xae;
-const UINT32 OP_SCAC_rAX_Yv = 0xaf;
-
-const UINT32 OP_MOV_AL_Ib = 0xb0;
-const UINT32 OP_MOV_CL_Ib = 0xb1;
-const UINT32 OP_MOV_DL_Ib = 0xb2;
-const UINT32 OP_MOV_BL_Ib = 0xb3;
-const UINT32 OP_MOV_AH_Ib = 0xb4;
-const UINT32 OP_MOV_CH_Ib = 0xb5;
-const UINT32 OP_MOV_DH_Ib = 0xb6;
-const UINT32 OP_MOV_BH_Ib = 0xb7;
-const UINT32 OP_MOV_rAX_Iv = 0xb8;
-const UINT32 OP_MOV_rCX_Iv = 0xb9;
-const UINT32 OP_MOV_rDX_Iv = 0xba;
-const UINT32 OP_MOV_rBX_Iv = 0xbb;
-const UINT32 OP_MOV_rSP_Iv = 0xbc;
-const UINT32 OP_MOV_rBP_Iv = 0xbd;
-const UINT32 OP_MOV_rSI_Iv = 0xbe;
-const UINT32 OP_MOV_rDI_Iv = 0xbf;
-
-const UINT32 OP_G2_Eb_Ib = (0xc0 | OPFLAG_8BITRM);
-const UINT32 OP_G2_Ev_Ib = 0xc1;
-const UINT32 OP_RETN_Iw = 0xc2;
-const UINT32 OP_RETN = 0xc3;
-const UINT32 OP_LES_Gz_Mp = 0xc4;
-const UINT32 OP_LDS_Gz_Mp = 0xc5;
-const UINT32 OP_G11_Eb_Ib = (0xc6 | OPFLAG_8BITRM);
-const UINT32 OP_G11_Ev_Iz = 0xc7;
-const UINT32 OP_ENTER_Iw_Ib = 0xc8;
-const UINT32 OP_LEAVE = 0xc9;
-const UINT32 OP_RETF_Iw = 0xca;
-const UINT32 OP_RETF = 0xcb;
-const UINT32 OP_INT_3 = 0xcc;
-const UINT32 OP_INT_Ib = 0xcd;
-const UINT32 OP_INTO = 0xce;
-const UINT32 OP_IRET = 0xcf;
-
-const UINT32 OP_G2_Eb_1 = (0xd0 | OPFLAG_8BITRM);
-const UINT32 OP_G2_Ev_1 = 0xd1;
-const UINT32 OP_G2_Eb_CL = (0xd2 | OPFLAG_8BITRM);
-const UINT32 OP_G2_Ev_CL = 0xd3;
-const UINT32 OP_AAM = 0xd4;
-const UINT32 OP_AAD = 0xd5;
-const UINT32 OP_XLAT = 0xd7;
-const UINT32 OP_ESC_D8 = 0xd8;
-const UINT32 OP_ESC_D9 = 0xd9;
-const UINT32 OP_ESC_DA = 0xda;
-const UINT32 OP_ESC_DB = 0xdb;
-const UINT32 OP_ESC_DC = 0xdc;
-const UINT32 OP_ESC_DD = 0xdd;
-const UINT32 OP_ESC_DE = 0xde;
-const UINT32 OP_ESC_DF = 0xdf;
-
-const UINT32 OP_LOOPNE_Jb = 0xe0;
-const UINT32 OP_LOOPE_Jb = 0xe1;
-const UINT32 OP_LOOP_Jb = 0xe2;
-const UINT32 OP_JrCXZ_Jb = 0xe3;
-const UINT32 OP_IN_AL_Ib = 0xe4;
-const UINT32 OP_IN_eAX_Ib = 0xe5;
-const UINT32 OP_OUT_Ib_AL = 0xe6;
-const UINT32 OP_OUT_Ib_eAX = 0xe7;
-const UINT32 OP_CALL_Jz = 0xe8;
-const UINT32 OP_JMP_Jz = 0xe9;
-const UINT32 OP_JMPF_AP = 0xea;
-const UINT32 OP_JMP_Jb = 0xeb;
-const UINT32 OP_IN_AL_DX = 0xec;
-const UINT32 OP_IN_eAX_D = 0xed;
-const UINT32 OP_OUT_DX_AL = 0xee;
-const UINT32 OP_OUT_DX_eAX = 0xef;
-
-const UINT32 PREFIX_LOCK = 0xf0;
-const UINT32 PREFIX_REPNE = 0xf2;
-const UINT32 PREFIX_REPE = 0xf3;
-const UINT32 OP_HLT = 0xf4;
-const UINT32 OP_CMC = 0xf5;
-const UINT32 OP_G3_Eb = (0xf6 | OPFLAG_8BITRM);
-const UINT32 OP_G3_Ev = 0xf7;
-const UINT32 OP_CLC = 0xf8;
-const UINT32 OP_STC = 0xf9;
-const UINT32 OP_CLI = 0xfa;
-const UINT32 OP_STI = 0xfb;
-const UINT32 OP_CLD = 0xfc;
-const UINT32 OP_STD = 0xfd;
-const UINT32 OP_G4 = 0xfe;
-const UINT32 OP_G5 = 0xff;
+const uint32_t OP_ADD_Eb_Gb = (0x00 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_ADD_Ev_Gv = 0x01;
+const uint32_t OP_ADD_Gb_Eb = (0x02 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_ADD_Gv_Ev = 0x03;
+const uint32_t OP_ADD_AL_Ib = 0x04;
+const uint32_t OP_ADD_rAX_Iz = 0x05;
+const uint32_t OP_PUSH_ES = 0x06;
+const uint32_t OP_POP_ES = 0x07;
+const uint32_t OP_OR_Eb_Gb = (0x08 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_OR_Ev_Gv = 0x09;
+const uint32_t OP_OR_Gb_Eb = (0x0a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_OR_Gv_Ev = 0x0b;
+const uint32_t OP_OR_AL_Ib = 0x0c;
+const uint32_t OP_OR_eAX_Iv = 0x0d;
+const uint32_t OP_PUSH_CS = 0x0e;
+const uint32_t OP_EXTENDED = 0x0f;
+
+const uint32_t OP_ADC_Eb_Gb = (0x10 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_ADC_Ev_Gv = 0x11;
+const uint32_t OP_ADC_Gb_Eb = (0x12 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_ADC_Gv_Ev = 0x13;
+const uint32_t OP_ADC_AL_Ib = 0x14;
+const uint32_t OP_ADC_rAX_Iz = 0x15;
+const uint32_t OP_PUSH_SS = 0x16;
+const uint32_t OP_POP_SS = 0x17;
+const uint32_t OP_SBB_Eb_Gb = (0x18 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_SBB_Ev_Gv = 0x19;
+const uint32_t OP_SBB_Gb_Eb = (0x1a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_SBB_Gv_Ev = 0x1b;
+const uint32_t OP_SBB_AL_Ib = 0x1c;
+const uint32_t OP_SBB_eAX_Iv = 0x1d;
+const uint32_t OP_PUSH_DS = 0x1e;
+const uint32_t OP_POP_DS = 0x1f;
+
+const uint32_t OP_AND_Eb_Gb = (0x20 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_AND_Ev_Gv = 0x21;
+const uint32_t OP_AND_Gb_Eb = (0x22 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_AND_Gv_Ev = 0x23;
+const uint32_t OP_AND_AL_Ib = 0x24;
+const uint32_t OP_AND_rAX_Iz = 0x25;
+const uint32_t PREFIX_ES = 0x26;
+const uint32_t OP_DAA = 0x27;
+const uint32_t OP_SUB_Eb_Gb = (0x28 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_SUB_Ev_Gv = 0x29;
+const uint32_t OP_SUB_Gb_Eb = (0x2a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_SUB_Gv_Ev = 0x2b;
+const uint32_t OP_SUB_AL_Ib = 0x2c;
+const uint32_t OP_SUB_eAX_Iv = 0x2d;
+const uint32_t PREFIX_CS = 0x2e;
+const uint32_t OP_DAS = 0x2f;
+
+const uint32_t OP_XOR_Eb_Gb = (0x30 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_XOR_Ev_Gv = 0x31;
+const uint32_t OP_XOR_Gb_Eb = (0x32 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_XOR_Gv_Ev = 0x33;
+const uint32_t OP_XOR_AL_Ib = 0x34;
+const uint32_t OP_XOR_rAX_Iz = 0x35;
+const uint32_t PREFIX_SS = 0x36;
+const uint32_t OP_AAA = 0x37;
+const uint32_t OP_CMP_Eb_Gb = (0x38 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_CMP_Ev_Gv = 0x39;
+const uint32_t OP_CMP_Gb_Eb = (0x3a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_CMP_Gv_Ev = 0x3b;
+const uint32_t OP_CMP_AL_Ib = 0x3c;
+const uint32_t OP_CMP_eAX_Iv = 0x3d;
+const uint32_t PREFIX_DS = 0x3e;
+const uint32_t OP_AAS = 0x3f;
+
+const uint32_t OP_REX = 0x40;
+const uint32_t OP_REX_B = 0x41;
+const uint32_t OP_REX_X = 0x42;
+const uint32_t OP_REX_XB = 0x43;
+const uint32_t OP_REX_R = 0x44;
+const uint32_t OP_REX_RB = 0x45;
+const uint32_t OP_REX_RX = 0x46;
+const uint32_t OP_REX_RXB = 0x47;
+const uint32_t OP_REX_W = 0x48;
+const uint32_t OP_REX_WB = 0x49;
+const uint32_t OP_REX_WX = 0x4a;
+const uint32_t OP_REX_WXB = 0x4b;
+const uint32_t OP_REX_WR = 0x4c;
+const uint32_t OP_REX_WRB = 0x4d;
+const uint32_t OP_REX_WRX = 0x4e;
+const uint32_t OP_REX_WRXB = 0x4f;
+
+const uint32_t OP_PUSH_rAX = 0x50;
+const uint32_t OP_PUSH_rCX = 0x51;
+const uint32_t OP_PUSH_rDX = 0x52;
+const uint32_t OP_PUSH_rBX = 0x53;
+const uint32_t OP_PUSH_rSP = 0x54;
+const uint32_t OP_PUSH_rBP = 0x55;
+const uint32_t OP_PUSH_rSI = 0x56;
+const uint32_t OP_PUSH_rDI = 0x57;
+const uint32_t OP_POP_rAX = 0x58;
+const uint32_t OP_POP_rCX = 0x59;
+const uint32_t OP_POP_rDX = 0x5a;
+const uint32_t OP_POP_rBX = 0x5b;
+const uint32_t OP_POP_rSP = 0x5c;
+const uint32_t OP_POP_rBP = 0x5d;
+const uint32_t OP_POP_rSI = 0x5e;
+const uint32_t OP_POP_rDI = 0x5f;
+
+const uint32_t OP_PUSHA = 0x60;
+const uint32_t OP_POPA = 0x61;
+const uint32_t OP_BOUND_Gv_Ma = 0x62;
+const uint32_t OP_ARPL_Ew_Gw = 0x63;
+const uint32_t OP_MOVSXD_Gv_Ev = 0x63;
+const uint32_t PREFIX_FS = 0x64;
+const uint32_t PREFIX_GS = 0x65;
+const uint32_t PREFIX_OPSIZE = 0x66;
+const uint32_t PREFIX_ADSIZE = 0x67;
+const uint32_t OP_PUSH_Iz = 0x68;
+const uint32_t OP_IMUL_Gv_Ev_Iz = 0x69;
+const uint32_t OP_PUSH_Ib = 0x6a;
+const uint32_t OP_IMUL_Gv_Ev_Ib = 0x6b;
+const uint32_t OP_INS_Yb_DX = 0x6c;
+const uint32_t OP_INS_Yz_DX = 0x6d;
+const uint32_t OP_OUTS_DX_Xb = 0x6e;
+const uint32_t OP_OUTS_DX_Xz = 0x6f;
+
+const uint32_t OP_JCC_O_Jb = 0x70;
+const uint32_t OP_JCC_NO_Jb = 0x71;
+const uint32_t OP_JCC_B_Jb = 0x72;
+const uint32_t OP_JCC_C_Jb = 0x72;
+const uint32_t OP_JCC_NAE_Jb = 0x72;
+const uint32_t OP_JCC_AE_Jb = 0x73;
+const uint32_t OP_JCC_NB_Jb = 0x73;
+const uint32_t OP_JCC_NC_Jb = 0x73;
+const uint32_t OP_JCC_E_Jb = 0x74;
+const uint32_t OP_JCC_Z_Jb = 0x74;
+const uint32_t OP_JCC_NE_Jb = 0x75;
+const uint32_t OP_JCC_NZ_Jb = 0x75;
+const uint32_t OP_JCC_BE_Jb = 0x76;
+const uint32_t OP_JCC_NA_Jb = 0x76;
+const uint32_t OP_JCC_A_Jb = 0x77;
+const uint32_t OP_JCC_NBE_Jb = 0x77;
+const uint32_t OP_JCC_S_Jb = 0x78;
+const uint32_t OP_JCC_NS_Jb = 0x79;
+const uint32_t OP_JCC_P_Jb = 0x7a;
+const uint32_t OP_JCC_PE_Jb = 0x7a;
+const uint32_t OP_JCC_NP_Jb = 0x7b;
+const uint32_t OP_JCC_PO_Jb = 0x7b;
+const uint32_t OP_JCC_L_Jb = 0x7c;
+const uint32_t OP_JCC_NGE_Jb = 0x7c;
+const uint32_t OP_JCC_NL_Jb = 0x7d;
+const uint32_t OP_JCC_GE_Jb = 0x7d;
+const uint32_t OP_JCC_LE_Jb = 0x7e;
+const uint32_t OP_JCC_NG_Jb = 0x7e;
+const uint32_t OP_JCC_NLE_Jb = 0x7f;
+const uint32_t OP_JCC_G_Jb = 0x7f;
+
+const uint32_t OP_G1_Eb_Ib = (0x80 | OPFLAG_8BITRM);
+const uint32_t OP_G1_Ev_Iz = 0x81;
+const uint32_t OP_G1_Eb_Ibx = (0x82 | OPFLAG_8BITRM);
+const uint32_t OP_G1_Ev_Ib = 0x83;
+const uint32_t OP_TEST_Eb_Gb = (0x84 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_TEST_Ev_Gv = 0x85;
+const uint32_t OP_XCHG_Eb_Gb = (0x86 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_XCHG_Ev_Gv = 0x87;
+const uint32_t OP_MOV_Eb_Gb = (0x88 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_MOV_Ev_Gv = 0x89;
+const uint32_t OP_MOV_Gb_Eb = (0x8a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_MOV_Gv_Ev = 0x8b;
+const uint32_t OP_MOV_Ev_Sw = 0x8c;
+const uint32_t OP_LEA_Gv_M = 0x8d;
+const uint32_t OP_MOV_Sw_Ew = 0x8e;
+const uint32_t OP_G1A_Ev = 0x8f;
+
+const uint32_t OP_NOP = 0x90;
+const uint32_t OP_PAUSE = 0x90;
+const uint32_t OP_XCHG_rCX = 0x91;
+const uint32_t OP_XCHG_rDX = 0x92;
+const uint32_t OP_XCHG_rBX = 0x93;
+const uint32_t OP_XCHG_rSP = 0x94;
+const uint32_t OP_XCHG_rBP = 0x95;
+const uint32_t OP_XCHG_rSI = 0x96;
+const uint32_t OP_XCHG_rDI = 0x97;
+const uint32_t OP_CBW = 0x98;
+const uint32_t OP_CWDE = 0x98;
+const uint32_t OP_CDQE = 0x98;
+const uint32_t OP_CWD = 0x99;
+const uint32_t OP_CDQ = 0x99;
+const uint32_t OP_CQO = 0x99;
+const uint32_t OP_CALLF_Ap = 0x9a;
+const uint32_t OP_FWAIT = 0x9b;
+const uint32_t OP_PUSHF_Fv = 0x9c;
+const uint32_t OP_POPF_Fv = 0x9d;
+const uint32_t OP_SAHF = 0x9e;
+const uint32_t OP_LAHF = 0x9f;
+
+const uint32_t OP_MOV_AL_Ob = 0xa0;
+const uint32_t OP_MOV_rAX_Ov = 0xa1;
+const uint32_t OP_MOV_Ob_AL = 0xa2;
+const uint32_t OP_MOV_Ov_rAX = 0xa3;
+const uint32_t OP_MOVS_Xb_Yb = 0xa4;
+const uint32_t OP_MOVS_Xv_Yv = 0xa5;
+const uint32_t OP_CMPS_Xb_Yb = 0xa6;
+const uint32_t OP_CMPS_Xv_Yv = 0xa7;
+const uint32_t OP_TEST_AL_Ib = 0xa8;
+const uint32_t OP_TEST_rAX_Iz = 0xa9;
+const uint32_t OP_STOS_Yb_AL = 0xaa;
+const uint32_t OP_STOS_Yv_rAX = 0xab;
+const uint32_t OP_LODS_AL_Xb = 0xac;
+const uint32_t OP_LODS_rAX_Xv = 0xad;
+const uint32_t OP_SCAS_AL_Yb = 0xae;
+const uint32_t OP_SCAC_rAX_Yv = 0xaf;
+
+const uint32_t OP_MOV_AL_Ib = 0xb0;
+const uint32_t OP_MOV_CL_Ib = 0xb1;
+const uint32_t OP_MOV_DL_Ib = 0xb2;
+const uint32_t OP_MOV_BL_Ib = 0xb3;
+const uint32_t OP_MOV_AH_Ib = 0xb4;
+const uint32_t OP_MOV_CH_Ib = 0xb5;
+const uint32_t OP_MOV_DH_Ib = 0xb6;
+const uint32_t OP_MOV_BH_Ib = 0xb7;
+const uint32_t OP_MOV_rAX_Iv = 0xb8;
+const uint32_t OP_MOV_rCX_Iv = 0xb9;
+const uint32_t OP_MOV_rDX_Iv = 0xba;
+const uint32_t OP_MOV_rBX_Iv = 0xbb;
+const uint32_t OP_MOV_rSP_Iv = 0xbc;
+const uint32_t OP_MOV_rBP_Iv = 0xbd;
+const uint32_t OP_MOV_rSI_Iv = 0xbe;
+const uint32_t OP_MOV_rDI_Iv = 0xbf;
+
+const uint32_t OP_G2_Eb_Ib = (0xc0 | OPFLAG_8BITRM);
+const uint32_t OP_G2_Ev_Ib = 0xc1;
+const uint32_t OP_RETN_Iw = 0xc2;
+const uint32_t OP_RETN = 0xc3;
+const uint32_t OP_LES_Gz_Mp = 0xc4;
+const uint32_t OP_LDS_Gz_Mp = 0xc5;
+const uint32_t OP_G11_Eb_Ib = (0xc6 | OPFLAG_8BITRM);
+const uint32_t OP_G11_Ev_Iz = 0xc7;
+const uint32_t OP_ENTER_Iw_Ib = 0xc8;
+const uint32_t OP_LEAVE = 0xc9;
+const uint32_t OP_RETF_Iw = 0xca;
+const uint32_t OP_RETF = 0xcb;
+const uint32_t OP_INT_3 = 0xcc;
+const uint32_t OP_INT_Ib = 0xcd;
+const uint32_t OP_INTO = 0xce;
+const uint32_t OP_IRET = 0xcf;
+
+const uint32_t OP_G2_Eb_1 = (0xd0 | OPFLAG_8BITRM);
+const uint32_t OP_G2_Ev_1 = 0xd1;
+const uint32_t OP_G2_Eb_CL = (0xd2 | OPFLAG_8BITRM);
+const uint32_t OP_G2_Ev_CL = 0xd3;
+const uint32_t OP_AAM = 0xd4;
+const uint32_t OP_AAD = 0xd5;
+const uint32_t OP_XLAT = 0xd7;
+const uint32_t OP_ESC_D8 = 0xd8;
+const uint32_t OP_ESC_D9 = 0xd9;
+const uint32_t OP_ESC_DA = 0xda;
+const uint32_t OP_ESC_DB = 0xdb;
+const uint32_t OP_ESC_DC = 0xdc;
+const uint32_t OP_ESC_DD = 0xdd;
+const uint32_t OP_ESC_DE = 0xde;
+const uint32_t OP_ESC_DF = 0xdf;
+
+const uint32_t OP_LOOPNE_Jb = 0xe0;
+const uint32_t OP_LOOPE_Jb = 0xe1;
+const uint32_t OP_LOOP_Jb = 0xe2;
+const uint32_t OP_JrCXZ_Jb = 0xe3;
+const uint32_t OP_IN_AL_Ib = 0xe4;
+const uint32_t OP_IN_eAX_Ib = 0xe5;
+const uint32_t OP_OUT_Ib_AL = 0xe6;
+const uint32_t OP_OUT_Ib_eAX = 0xe7;
+const uint32_t OP_CALL_Jz = 0xe8;
+const uint32_t OP_JMP_Jz = 0xe9;
+const uint32_t OP_JMPF_AP = 0xea;
+const uint32_t OP_JMP_Jb = 0xeb;
+const uint32_t OP_IN_AL_DX = 0xec;
+const uint32_t OP_IN_eAX_D = 0xed;
+const uint32_t OP_OUT_DX_AL = 0xee;
+const uint32_t OP_OUT_DX_eAX = 0xef;
+
+const uint32_t PREFIX_LOCK = 0xf0;
+const uint32_t PREFIX_REPNE = 0xf2;
+const uint32_t PREFIX_REPE = 0xf3;
+const uint32_t OP_HLT = 0xf4;
+const uint32_t OP_CMC = 0xf5;
+const uint32_t OP_G3_Eb = (0xf6 | OPFLAG_8BITRM);
+const uint32_t OP_G3_Ev = 0xf7;
+const uint32_t OP_CLC = 0xf8;
+const uint32_t OP_STC = 0xf9;
+const uint32_t OP_CLI = 0xfa;
+const uint32_t OP_STI = 0xfb;
+const uint32_t OP_CLD = 0xfc;
+const uint32_t OP_STD = 0xfd;
+const uint32_t OP_G4 = 0xfe;
+const uint32_t OP_G5 = 0xff;
// double byte opcodes
-const UINT32 OP_G6 = 0x0f00;
-const UINT32 OP_G7 = 0x0f01;
-const UINT32 OP_LAR_Gv_Ew = 0x0f02;
-const UINT32 OP_LSL_Gv_Ew = 0x0f03;
-const UINT32 OP_SYSCALL = 0x0f05;
-const UINT32 OP_CLTS = 0x0f06;
-const UINT32 OP_SYSRET = 0x0f07;
-const UINT32 OP_INVD = 0x0f08;
-const UINT32 OP_WBINVD = 0x0f09;
-const UINT32 OP_UD2 = 0x0f0b;
-const UINT32 OP_NOP0d_Ev = 0x0f0d;
-
-const UINT32 OP_MOVUPS_Vps_Wps = 0x0f10;
-const UINT32 OP_MOVSS_Vss_Wss = 0xf30f10;
-const UINT32 OP_MOVUPD_Vpd_Wpd = 0x660f10;
-const UINT32 OP_MOVSD_Vsd_Wsd = 0xf20f10;
-const UINT32 OP_MOVUPS_Wps_Vps = 0x0f11;
-const UINT32 OP_MOVSS_Wss_Vss = 0xf30f11;
-const UINT32 OP_MOVUPD_Wpd_Vpd = 0x660f11;
-const UINT32 OP_MOVSD_Wsd_Vsd = 0xf20f11;
-const UINT32 OP_MOVLPS_Vq_Mq = 0x0f12;
-const UINT32 OP_MOVLPD_Vq_Mq = 0x660f12;
-const UINT32 OP_MOVHLPS_Vq_Uq = 0x0f12;
-const UINT32 OP_MOVDDUP_Vq_Wq = 0xf20f12;
-const UINT32 OP_MOVSLDUP_Vq_Wq = 0xf30f12;
-const UINT32 OP_MOVLPS_Mq_Vq = 0x0f13;
-const UINT32 OP_MOVLPD_Mq_Vq = 0x660f13;
-const UINT32 OP_UNPCKLPS_Vps_Wq = 0x0f14;
-const UINT32 OP_UNPCKLPD_Vpd_Wq = 0x660f14;
-const UINT32 OP_UNPCKHPS_Vps_Wq = 0x0f15;
-const UINT32 OP_UNPCKHPD_Vpd_Wq = 0x660f15;
-const UINT32 OP_MOVHPS_Vq_Mq = 0x0f16;
-const UINT32 OP_MOVHPD_Vq_Mq = 0x660f16;
-const UINT32 OP_MOVLHPS_Vq_Uq = 0x0f16;
-const UINT32 OP_MOVSHDUP_Vq_Wq = 0xf30f16;
-const UINT32 OP_MOVHPS_Mq_Vq = 0x0f17;
-const UINT32 OP_MOVHPD_Mq_Vq = 0x660f17;
-const UINT32 OP_PREFETCH_G16 = 0x0f18;
-const UINT32 OP_NOP1f_Ev = 0x0f1f;
-
-const UINT32 OP_MOV_Rd_Cd = 0x0f20;
-const UINT32 OP_MOV_Rd_Dd = 0x0f21;
-const UINT32 OP_MOV_Cd_Rd = 0x0f22;
-const UINT32 OP_MOV_Dd_Rd = 0x0f23;
-const UINT32 OP_MOVAPS_Vps_Wps = 0x0f28;
-const UINT32 OP_MOVAPD_Vpd_Wpd = 0x660f28;
-const UINT32 OP_MOVAPS_Wps_Vps = 0x0f29;
-const UINT32 OP_MOVAPD_Wpd_Vpd = 0x660f29;
-const UINT32 OP_CVTPI2PS_Vps_Qq = 0x0f2a;
-const UINT32 OP_CVTSI2SS_Vss_Ed = 0xf30f2a;
-const UINT32 OP_CVTPI2PD_Vpd_Qq = 0x660f2a;
-const UINT32 OP_CVTSI2SD_Vsd_Ed = 0xf20f2a;
-const UINT32 OP_MOVNTPS_Mps_Vps = 0x0f2b;
-const UINT32 OP_MOVNTPD_Mpd_Vpd = 0x660f2b;
-const UINT32 OP_CVTTPS2PI_Pq_Wq = 0x0f2c;
-const UINT32 OP_CVTTSS2SI_Gd_Wss = 0xf30f2c;
-const UINT32 OP_CVTTPD2PI_Pq_Wpd = 0x660f2c;
-const UINT32 OP_CVTTSD2SI_Gd_Wsd = 0xf20f2c;
-const UINT32 OP_CVTPS2PI_Pq_Wq = 0x0f2d;
-const UINT32 OP_CVTSS2SI_Gd_Wss = 0xf30f2d;
-const UINT32 OP_CVTPD2PI_Pq_Wpd = 0x660f2d;
-const UINT32 OP_CVTSD2SI_Gd_Wsd = 0xf20f2d;
-const UINT32 OP_UCOMISS_Vss_Wss = 0x0f2e;
-const UINT32 OP_UCOMISD_Vsd_Wsd = 0x660f2e;
-const UINT32 OP_COMISS_Vss_Wss = 0x0f2f;
-const UINT32 OP_COMISD_Vsd_Wsd = 0x660f2f;
-
-const UINT32 OP_WRMSR = 0x0f30;
-const UINT32 OP_RDTSC = 0x0f31;
-const UINT32 OP_RDMSR = 0x0f32;
-const UINT32 OP_RDPMC = 0x0f33;
-const UINT32 OP_SYSENTER = 0x0f34;
-const UINT32 OP_SYSEXIT = 0x0f35;
-const UINT32 OP_GETSEC = 0x0f37;
-
-const UINT32 OP_CMOV_O_Gv_Ev = 0x0f40;
-const UINT32 OP_CMOV_NO_Gv_Ev = 0x0f41;
-const UINT32 OP_CMOV_B_Gv_Ev = 0x0f42;
-const UINT32 OP_CMOV_C_Gv_Ev = 0x0f42;
-const UINT32 OP_CMOV_AE_Gv_Ev = 0x0f43;
-const UINT32 OP_CMOV_NC_Gv_Ev = 0x0f43;
-const UINT32 OP_CMOV_E_Gv_Ev = 0x0f44;
-const UINT32 OP_CMOV_Z_Gv_Ev = 0x0f44;
-const UINT32 OP_CMOV_NE_Gv_Ev = 0x0f45;
-const UINT32 OP_CMOV_NZ_Gv_Ev = 0x0f45;
-const UINT32 OP_CMOV_BE_Gv_Ev = 0x0f46;
-const UINT32 OP_CMOV_A_Gv_Ev = 0x0f47;
-const UINT32 OP_CMOV_S_Gv_Ev = 0x0f48;
-const UINT32 OP_CMOV_NS_Gv_Ev = 0x0f49;
-const UINT32 OP_CMOV_P_Gv_Ev = 0x0f4a;
-const UINT32 OP_CMOV_PE_Gv_Ev = 0x0f4a;
-const UINT32 OP_CMOV_NP_Gv_Ev = 0x0f4b;
-const UINT32 OP_CMOV_PO_Gv_Ev = 0x0f4b;
-const UINT32 OP_CMOV_L_Gv_Ev = 0x0f4c;
-const UINT32 OP_CMOV_NGE_Gv_Ev = 0x0f4c;
-const UINT32 OP_CMOV_NL_Gv_Ev = 0x0f4d;
-const UINT32 OP_CMOV_GE_Gv_Ev = 0x0f4d;
-const UINT32 OP_CMOV_LE_Gv_Ev = 0x0f4e;
-const UINT32 OP_CMOV_NG_Gv_Ev = 0x0f4e;
-const UINT32 OP_CMOV_NLE_Gv_Ev = 0x0f4f;
-const UINT32 OP_CMOV_G_Gv_Ev = 0x0f4f;
-
-const UINT32 OP_MOVMSKPS_Gd_Ups = 0x0f50;
-const UINT32 OP_MOVMSKPD_Gd_Upd = 0x660f50;
-const UINT32 OP_SQRTPS_Vps_Wps = 0x0f51;
-const UINT32 OP_SQRTSS_Vss_Wss = 0xf30f51;
-const UINT32 OP_SQRTPD_Vpd_Wpd = 0x660f51;
-const UINT32 OP_SQRTSD_Vsd_Wsd = 0xf20f51;
-const UINT32 OP_RSQRTPS_Vps_Wps = 0x0f52;
-const UINT32 OP_RSQRTSS_Vss_Wss = 0xf30f52;
-const UINT32 OP_RCPPS_Vps_Wps = 0x0f53;
-const UINT32 OP_RCPSS_Vss_Wss = 0xf30f53;
-const UINT32 OP_ANDPS_Vps_Wps = 0x0f54;
-const UINT32 OP_ANDPD_Vpd_Wpd = 0x660f54;
-const UINT32 OP_ANDNPS_Vps_Wps = 0x0f55;
-const UINT32 OP_ANDNPD_Vpd_Wpd = 0x660f55;
-const UINT32 OP_ORPS_Vps_Wps = 0x0f56;
-const UINT32 OP_ORPD_Vpd_Wpd = 0x660f56;
-const UINT32 OP_XORPS_Vps_Wps = 0x0f57;
-const UINT32 OP_XORPD_Vpd_Wpd = 0x660f57;
-const UINT32 OP_ADDPS_Vps_Wps = 0x0f58;
-const UINT32 OP_ADDSS_Vss_Wss = 0xf30f58;
-const UINT32 OP_ADDPD_Vpd_Wpd = 0x660f58;
-const UINT32 OP_ADDSD_Vsd_Wsd = 0xf20f58;
-const UINT32 OP_MULPS_Vps_Wps = 0x0f59;
-const UINT32 OP_MULSS_Vss_Wss = 0xf30f59;
-const UINT32 OP_MULPD_Vpd_Wpd = 0x660f59;
-const UINT32 OP_MULSD_Vsd_Wsd = 0xf20f59;
-const UINT32 OP_CVTPS2PD_Vpd_Wq = 0x0f5a;
-const UINT32 OP_CVTSS2SD_Vsd_Wss = 0xf30f5a;
-const UINT32 OP_CVTPD2PS_Vps_Wpd = 0x660f5a;
-const UINT32 OP_CVTSD2SS_Vss_Wsd = 0xf20f5a;
-const UINT32 OP_CVTDQ2PS_Vps_Wdq = 0x0f5b;
-const UINT32 OP_CVTPS2DQ_Vdq_Wps = 0x660f5b;
-const UINT32 OP_CVTTPS2DQ_Vdq_Wps = 0xf30f5b;
-const UINT32 OP_SUBPS_Vps_Wps = 0x0f5c;
-const UINT32 OP_SUBSS_Vss_Wss = 0xf30f5c;
-const UINT32 OP_SUBPD_Vpd_Wpd = 0x660f5c;
-const UINT32 OP_SUBSD_Vsd_Wsd = 0xf20f5c;
-const UINT32 OP_MINPS_Vps_Wps = 0x0f5d;
-const UINT32 OP_MINSS_Vss_Wss = 0xf30f5d;
-const UINT32 OP_MINPD_Vpd_Wpd = 0x660f5d;
-const UINT32 OP_MINSD_Vsd_Wsd = 0xf20f5d;
-const UINT32 OP_DIVPS_Vps_Wps = 0x0f5e;
-const UINT32 OP_DIVSS_Vss_Wss = 0xf30f5e;
-const UINT32 OP_DIVPD_Vpd_Wpd = 0x660f5e;
-const UINT32 OP_DIVSD_Vsd_Wsd = 0xf20f5e;
-const UINT32 OP_MAXPS_Vps_Wps = 0x0f5f;
-const UINT32 OP_MAXSS_Vss_Wss = 0xf30f5f;
-const UINT32 OP_MAXPD_Vpd_Wpd = 0x660f5f;
-const UINT32 OP_MAXSD_Vsd_Wsd = 0xf20f5f;
-
-const UINT32 OP_PUNPCKLBW_Pq_Qd = 0x0f60;
-const UINT32 OP_PUNPCKLBW_Vdq_Wdq = 0x660f60;
-const UINT32 OP_PUNPCKLWD_Pq_Qd = 0x0f61;
-const UINT32 OP_PUNPCKLWD_Vdq_Wdq = 0x660f61;
-const UINT32 OP_PUNPCKLDQ_Pq_Qd = 0x0f62;
-const UINT32 OP_PUNPCKLDQ_Vdq_Wdq = 0x660f62;
-const UINT32 OP_PACKSSWB_Pq_Qq = 0x0f63;
-const UINT32 OP_PACKSSWB_Vdq_Wdq = 0x660f63;
-const UINT32 OP_PCMPGTB_Pq_Qq = 0x0f64;
-const UINT32 OP_PCMPGTB_Vdq_Wdq = 0x660f64;
-const UINT32 OP_PCMPGTW_Pq_Qq = 0x0f65;
-const UINT32 OP_PCMPGTW_Vdq_Wdq = 0x660f65;
-const UINT32 OP_PCMPGTD_Pq_Qq = 0x0f66;
-const UINT32 OP_PCMPGTD_Vdq_Wdq = 0x660f66;
-const UINT32 OP_PACKUSWB_Pq_Qq = 0x0f67;
-const UINT32 OP_PACKUSWB_Vdq_Wdq = 0x660f67;
-const UINT32 OP_PUNPCKHBW_Pq_Qq = 0x0f68;
-const UINT32 OP_PUNPCKHBW_Vdq_Qdq = 0x660f68;
-const UINT32 OP_PUNPCKHWD_Pq_Qq = 0x0f69;
-const UINT32 OP_PUNPCKHWD_Vdq_Qdq = 0x660f69;
-const UINT32 OP_PUNPCKHDQ_Pq_Qq = 0x0f6a;
-const UINT32 OP_PUNPCKHDQ_Vdq_Qdq = 0x660f6a;
-const UINT32 OP_PACKSSDW_Pq_Qq = 0x0f6b;
-const UINT32 OP_PACKSSDW_Vdq_Qdq = 0x660f6b;
-const UINT32 OP_PUNPCKLQDQ_Vdq_Wdq = 0x660f6c;
-const UINT32 OP_PUNPCKHQDQ_Vdq_Wdq = 0x660f6d;
-const UINT32 OP_MOVD_Pd_Ed = 0x0f6e;
-const UINT32 OP_MOVD_Vd_Ed = 0x660f6e;
-const UINT32 OP_MOVQ_Pq_Qq = 0x0f6f;
-const UINT32 OP_MOVDQA_Vdq_Wdq = 0x660f6f;
-const UINT32 OP_MOVDQU_Vdq_Wdq = 0xf30f6f;
-
-const UINT32 OP_PSHUFW_Pq_Qq_Ib = 0x0f70;
-const UINT32 OP_PSHUFD_Vdq_Wdq_Ib = 0x660f70;
-const UINT32 OP_PSHUFHW_Vdq_Wdq_Ib = 0xf30f70;
-const UINT32 OP_PSHUFLW_Vdq_Wdq_Ib = 0xf20f70;
-const UINT32 OP_G12 = 0x0f71;
-const UINT32 OP_G13 = 0x0f72;
-const UINT32 OP_G14 = 0x0f73;
-const UINT32 OP_PCMPEQB_Pq_Qq = 0x0f74;
-const UINT32 OP_PCMPEQB_Vdq_Wdq = 0x660f74;
-const UINT32 OP_PCMPEQW_Pq_Qq = 0x0f75;
-const UINT32 OP_PCMPEQW_Vdq_Wdq = 0x660f75;
-const UINT32 OP_PCMPEQD_Pq_Qq = 0x0f76;
-const UINT32 OP_PCMPEQD_Vdq_Wdq = 0x660f76;
-const UINT32 OP_EMMS = 0x0f77;
-const UINT32 OP_VMREAD_Ed_Gd = 0x0f78;
-const UINT32 OP_VMWRITE_Gd_Ed = 0x0f79;
-const UINT32 OP_HADDPD_Vpd_Wpd = 0x660f7c;
-const UINT32 OP_HADDPS_Vps_Wps = 0xf20f7c;
-const UINT32 OP_HSUBPD_Vpd_Wpd = 0x660f7d;
-const UINT32 OP_HSUBPS_Vps_Wps = 0xf20f7d;
-const UINT32 OP_MOVD_Ed_Pd = 0x0f7e;
-const UINT32 OP_MOVD_Ed_Vd = 0x660f7e;
-const UINT32 OP_MOVQ_Vq_Wq = 0xf30f7e;
-const UINT32 OP_MOVQ_Qq_Pq = 0x0f7f;
-const UINT32 OP_MOVDQA_Wdq_Vdq = 0x660f7f;
-const UINT32 OP_MOVDQU_Wdq_Vdq = 0xf30f7f;
-
-const UINT32 OP_JCC_O_Jv = 0x0f80;
-const UINT32 OP_JCC_NO_Jv = 0x0f81;
-const UINT32 OP_JCC_B_Jv = 0x0f82;
-const UINT32 OP_JCC_C_Jv = 0x0f82;
-const UINT32 OP_JCC_NAE_Jv = 0x0f82;
-const UINT32 OP_JCC_AE_Jv = 0x0f83;
-const UINT32 OP_JCC_NB_Jv = 0x0f83;
-const UINT32 OP_JCC_NC_Jv = 0x0f83;
-const UINT32 OP_JCC_E_Jv = 0x0f84;
-const UINT32 OP_JCC_Z_Jv = 0x0f84;
-const UINT32 OP_JCC_NE_Jv = 0x0f85;
-const UINT32 OP_JCC_NZ_Jv = 0x0f85;
-const UINT32 OP_JCC_BE_Jv = 0x0f86;
-const UINT32 OP_JCC_NA_Jv = 0x0f86;
-const UINT32 OP_JCC_A_Jv = 0x0f87;
-const UINT32 OP_JCC_NBE_Jv = 0x0f87;
-const UINT32 OP_JCC_S_Jv = 0x0f88;
-const UINT32 OP_JCC_NS_Jv = 0x0f89;
-const UINT32 OP_JCC_P_Jv = 0x0f8a;
-const UINT32 OP_JCC_PE_Jv = 0x0f8a;
-const UINT32 OP_JCC_NP_Jv = 0x0f8b;
-const UINT32 OP_JCC_PO_Jv = 0x0f8b;
-const UINT32 OP_JCC_L_Jv = 0x0f8c;
-const UINT32 OP_JCC_NGE_Jv = 0x0f8c;
-const UINT32 OP_JCC_NL_Jv = 0x0f8d;
-const UINT32 OP_JCC_GE_Jv = 0x0f8d;
-const UINT32 OP_JCC_LE_Jv = 0x0f8e;
-const UINT32 OP_JCC_NG_Jv = 0x0f8e;
-const UINT32 OP_JCC_NLE_Jv = 0x0f8f;
-const UINT32 OP_JCC_G_Jv = 0x0f8f;
-
-const UINT32 OP_SETCC_O_Eb = (0x0f90 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NO_Eb = (0x0f91 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_B_Eb = (0x0f92 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_C_Eb = (0x0f92 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NAE_Eb = (0x0f92 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_AE_Eb = (0x0f93 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NB_Eb = (0x0f93 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NC_Eb = (0x0f93 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_E_Eb = (0x0f94 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_Z_Eb = (0x0f94 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NE_Eb = (0x0f95 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NZ_Eb = (0x0f95 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_BE_Eb = (0x0f96 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NA_Eb = (0x0f96 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_A_Eb = (0x0f97 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NBE_Eb = (0x0f97 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_S_Eb = (0x0f98 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NS_Eb = (0x0f99 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_P_Eb = (0x0f9a | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_PE_Eb = (0x0f9a | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NP_Eb = (0x0f9b | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_PO_Eb = (0x0f9b | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_L_Eb = (0x0f9c | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NGE_Eb = (0x0f9c | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NL_Eb = (0x0f9d | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_GE_Eb = (0x0f9d | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_LE_Eb = (0x0f9e | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NG_Eb = (0x0f9e | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NLE_Eb = (0x0f9f | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_G_Eb = (0x0f9f | OPFLAG_8BITRM);
-
-const UINT32 OP_PUSH_FS = 0x0fa0;
-const UINT32 OP_POP_FS = 0x0fa1;
-const UINT32 OP_CPUID = 0x0fa2;
-const UINT32 OP_BT_Ev_Gv = 0x0fa3;
-const UINT32 OP_SHLD_Ev_Gv_Ib = 0x0fa4;
-const UINT32 OP_SHLD_Ev_Gv_CL = 0x0fa5;
-const UINT32 OP_PUSH_GS = 0x0fa8;
-const UINT32 OP_POP_GS = 0x0fa9;
-const UINT32 OP_RSM = 0x0faa;
-const UINT32 OP_BTS_Ev_Gv = 0x0fab;
-const UINT32 OP_SHRD_Ev_Gv_Ib = 0x0fac;
-const UINT32 OP_SHRD_Ev_Gv_CL = 0x0fad;
-const UINT32 OP_G16 = 0x0fae;
-const UINT32 OP_IMUL_Gv_Ev = 0x0faf;
-
-const UINT32 OP_CMPXCHG_Eb_Gb = (0x0fb0 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_CMPXCHG_Ev_Gv = 0x0fb1;
-const UINT32 OP_LSS_Mp = 0x0fb2;
-const UINT32 OP_BTR_Ev_Gv = 0x0fb3;
-const UINT32 OP_LFS_Mp = 0x0fb4;
-const UINT32 OP_LGS_Mp = 0x0fb5;
-const UINT32 OP_MOVZX_Gv_Eb = (0x0fb6 | OPFLAG_8BITRM);
-const UINT32 OP_MOVZX_Gv_Ew = 0x0fb7;
-const UINT32 OP_JMPE = 0x0fb8;
-const UINT32 OP_POPCNT_Gv_Ev = 0xf30fb8;
-const UINT32 OP_G10_INVALID = 0x0fb9;
-const UINT32 OP_G8_Ev_Ib = 0x0fba;
-const UINT32 OP_BTC_Ev_Gv = 0x0fbb;
-const UINT32 OP_BSF_Gv_Ev = 0x0fbc;
-const UINT32 OP_BSR_Gv_Ev = 0x0fbd;
-const UINT32 OP_MOVSX_Gv_Eb = (0x0fbe | OPFLAG_8BITRM);
-const UINT32 OP_MOVSX_Gv_Ew = 0x0fbf;
-
-const UINT32 OP_XADD_Eb_Gb = (0x0fc0 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_XADD_Ev_Gv = 0x0fc1;
-const UINT32 OP_CMPPS_Vps_Wps_Ib = 0x0fc2;
-const UINT32 OP_CMPSS_Vss_Wss_Ib = 0xf30fc2;
-const UINT32 OP_CMPPD_Vpd_Wpd_Ib = 0x660fc2;
-const UINT32 OP_CMPSD_Vsd_Wsd_Ib = 0xf20fc2;
-const UINT32 OP_MOVNTI_Md_Gd = 0x0fc3;
-const UINT32 OP_PINSRW_Pw_Ew_Ib = 0x0fc4;
-const UINT32 OP_PINSRW_Vw_Ew_Ib = 0x660fc4;
-const UINT32 OP_PEXTRW_Gw_Pw_Ib = 0x0fc5;
-const UINT32 OP_PEXTRW_Gw_Vw_Ib = 0x660fc5;
-const UINT32 OP_SHUFPS_Vps_Wps_Ib = 0x0fc6;
-const UINT32 OP_SHUFPD_Vpd_Wpd_Ib = 0x660fc6;
-const UINT32 OP_G9 = 0x0fc7;
-const UINT32 OP_BSWAP_EAX = 0x0fc8;
-const UINT32 OP_BSWAP_ECX = 0x0fc9;
-const UINT32 OP_BSWAP_EDX = 0x0fca;
-const UINT32 OP_BSWAP_EBX = 0x0fcb;
-const UINT32 OP_BSWAP_ESP = 0x0fcc;
-const UINT32 OP_BSWAP_EBP = 0x0fcd;
-const UINT32 OP_BSWAP_ESI = 0x0fce;
-const UINT32 OP_BSWAP_EDI = 0x0fcf;
-
-const UINT32 OP_ADDSUBPD_Vpd_Wpd = 0x0fd0;
-const UINT32 OP_ADDSUBPS_Vps_Wps = 0xf20fd0;
-const UINT32 OP_PSRLW_Pq_Qq = 0x0fd1;
-const UINT32 OP_PSRLW_Vdq_Wdq = 0x660fd1;
-const UINT32 OP_PSRLD_Pq_Qq = 0x0fd2;
-const UINT32 OP_PSRLD_Vdq_Wdq = 0x660fd2;
-const UINT32 OP_PSRLQ_Pq_Qq = 0x0fd3;
-const UINT32 OP_PSRLQ_Vdq_Wdq = 0x660fd3;
-const UINT32 OP_PADDQ_Pq_Qq = 0x0fd4;
-const UINT32 OP_PADDQ_Vdq_Wdq = 0x660fd4;
-const UINT32 OP_PMULLW_Pq_Qq = 0x0fd5;
-const UINT32 OP_PMULLW_Vdq_Wdq = 0x660fd5;
-const UINT32 OP_MOVQ_Wq_Vq = 0x0fd6;
-const UINT32 OP_MOVQ2DQ_Vdq_Qq = 0xf30fd6;
-const UINT32 OP_MOVDQ2Q_Pq_Vq = 0xf20fd6;
-const UINT32 OP_PMOVMSKB_Gd_Pq = 0x0fd7;
-const UINT32 OP_PMOVMSKB_Gd_Vdq = 0x660fd7;
-const UINT32 OP_PSUBUSB_Pq_Qq = 0x0fd8;
-const UINT32 OP_PSUBUSB_Vdq_Wdq = 0x660fd8;
-const UINT32 OP_PSUBUSW_Pq_Qq = 0x0fd9;
-const UINT32 OP_PSUBUSW_Vdq_Wdq = 0x660fd9;
-const UINT32 OP_PMINUB_Pq_Qq = 0x0fda;
-const UINT32 OP_PMINUB_Vdq_Wdq = 0x660fda;
-const UINT32 OP_PAND_Pq_Qq = 0x0fdb;
-const UINT32 OP_PAND_Vdq_Wdq = 0x660fdb;
-const UINT32 OP_PADDUSB_Pq_Qq = 0x0fdc;
-const UINT32 OP_PADDUSB_Vdq_Wdq = 0x660fdc;
-const UINT32 OP_PADDUSW_Pq_Qq = 0x0fdd;
-const UINT32 OP_PADDUSW_Vdq_Wdq = 0x660fdd;
-const UINT32 OP_PMAXUB_Pq_Qq = 0x0fde;
-const UINT32 OP_PMAXUB_Vdq_Wdq = 0x660fde;
-const UINT32 OP_PANDN_Pq_Qq = 0x0fdf;
-const UINT32 OP_PANDN_Vdq_Wdq = 0x660fdf;
-
-const UINT32 OP_PAVGB_Pq_Qq = 0x0fe0;
-const UINT32 OP_PAVGB_Vdq_Wdq = 0x660fe0;
-const UINT32 OP_PSRAW_Pq_Qq = 0x0fe1;
-const UINT32 OP_PSRAW_Vdq_Wdq = 0x660fe1;
-const UINT32 OP_PSRAD_Pq_Qq = 0x0fe2;
-const UINT32 OP_PSRAD_Vdq_Wdq = 0x660fe2;
-const UINT32 OP_PAVGW_Pq_Qq = 0x0fe3;
-const UINT32 OP_PAVGW_Vdq_Wdq = 0x660fe3;
-const UINT32 OP_PMULHUW_Pq_Qq = 0x0fe4;
-const UINT32 OP_PMULHUW_Vdq_Wdq = 0x660fe4;
-const UINT32 OP_PMULHW_Pq_Qq = 0x0fe5;
-const UINT32 OP_PMULHW_Vdq_Wdq = 0x660fe5;
-const UINT32 OP_CVTPD2DQ_Vdq_Wpd = 0xf20fe6;
-const UINT32 OP_CVTTPD2DQ_Vdq_Wpd = 0x660fe6;
-const UINT32 OP_CVTDQ2PD_Vpd_Wq = 0xf30fe6;
-const UINT32 OP_MOVNTQ_Mq_Vq = 0x0fe7;
-const UINT32 OP_MOVNTDQ_Mdq_Vdq = 0x660fe7;
-const UINT32 OP_PSUBSB_Pq_Qq = 0x0fe8;
-const UINT32 OP_PSUBSB_Vdq_Wdq = 0x660fe8;
-const UINT32 OP_PSUBSW_Pq_Qq = 0x0fe9;
-const UINT32 OP_PSUBSW_Vdq_Wdq = 0x660fe9;
-const UINT32 OP_PMINSW_Pq_Qq = 0x0fea;
-const UINT32 OP_PMINSW_Vdq_Wdq = 0x660fea;
-const UINT32 OP_POR_Pq_Qq = 0x0feb;
-const UINT32 OP_POR_Vdq_Wdq = 0x660feb;
-const UINT32 OP_PADDSB_Pq_Qq = 0x0fec;
-const UINT32 OP_PADDSB_Vdq_Wdq = 0x660fec;
-const UINT32 OP_PADDSW_Pq_Qq = 0x0fed;
-const UINT32 OP_PADDSW_Vdq_Wdq = 0x660fed;
-const UINT32 OP_PMAXSW_Pq_Qq = 0x0fee;
-const UINT32 OP_PMAXSW_Vdq_Wdq = 0x660fee;
-const UINT32 OP_PXOR_Pq_Qq = 0x0fef;
-const UINT32 OP_PXOR_Vdq_Wdq = 0x660fef;
-
-const UINT32 OP_LDDQU_Vdq_Mdq = 0xf20ff0;
-const UINT32 OP_PSLLW_Pq_Qq = 0x0ff1;
-const UINT32 OP_PSLLW_Vdq_Wdq = 0x660ff1;
-const UINT32 OP_PSLLD_Pq_Qq = 0x0ff2;
-const UINT32 OP_PSLLD_Vdq_Wdq = 0x660ff2;
-const UINT32 OP_PSLLQ_Pq_Qq = 0x0ff3;
-const UINT32 OP_PSLLQ_Vdq_Wdq = 0x660ff3;
-const UINT32 OP_PMULUDQ_Pq_Qq = 0x0ff4;
-const UINT32 OP_PMULUDQ_Vdq_Wdq = 0x660ff4;
-const UINT32 OP_PMADDWD_Pq_Qq = 0x0ff5;
-const UINT32 OP_PMADDWD_Vdq_Wdq = 0x660ff5;
-const UINT32 OP_PSADBW_Pq_Qq = 0x0ff6;
-const UINT32 OP_PSADBW_Vdq_Wdq = 0x660ff6;
-const UINT32 OP_MASKMOVQ_Pq_Qq = 0x0ff7;
-const UINT32 OP_MASKMOVDQU_Vdq_Wdq = 0x660ff7;
-const UINT32 OP_PSUBB_Pq_Qq = 0x0ff8;
-const UINT32 OP_PSUBB_Vdq_Wdq = 0x660ff8;
-const UINT32 OP_PSUBW_Pq_Qq = 0x0ff9;
-const UINT32 OP_PSUBW_Vdq_Wdq = 0x660ff9;
-const UINT32 OP_PSUBD_Pq_Qq = 0x0ffa;
-const UINT32 OP_PSUBD_Vdq_Wdq = 0x660ffa;
-const UINT32 OP_PSUBQ_Pq_Qq = 0x0ffb;
-const UINT32 OP_PSUBQ_Vdq_Wdq = 0x660ffb;
-const UINT32 OP_PADDB_Pq_Qq = 0x0ffc;
-const UINT32 OP_PADDB_Vdq_Wdq = 0x660ffc;
-const UINT32 OP_PADDW_Pq_Qq = 0x0ffd;
-const UINT32 OP_PADDW_Vdq_Wdq = 0x660ffd;
-const UINT32 OP_PADDD_Pq_Qq = 0x0ffe;
-const UINT32 OP_PADDD_Vdq_Wdq = 0x660ffe;
+const uint32_t OP_G6 = 0x0f00;
+const uint32_t OP_G7 = 0x0f01;
+const uint32_t OP_LAR_Gv_Ew = 0x0f02;
+const uint32_t OP_LSL_Gv_Ew = 0x0f03;
+const uint32_t OP_SYSCALL = 0x0f05;
+const uint32_t OP_CLTS = 0x0f06;
+const uint32_t OP_SYSRET = 0x0f07;
+const uint32_t OP_INVD = 0x0f08;
+const uint32_t OP_WBINVD = 0x0f09;
+const uint32_t OP_UD2 = 0x0f0b;
+const uint32_t OP_NOP0d_Ev = 0x0f0d;
+
+const uint32_t OP_MOVUPS_Vps_Wps = 0x0f10;
+const uint32_t OP_MOVSS_Vss_Wss = 0xf30f10;
+const uint32_t OP_MOVUPD_Vpd_Wpd = 0x660f10;
+const uint32_t OP_MOVSD_Vsd_Wsd = 0xf20f10;
+const uint32_t OP_MOVUPS_Wps_Vps = 0x0f11;
+const uint32_t OP_MOVSS_Wss_Vss = 0xf30f11;
+const uint32_t OP_MOVUPD_Wpd_Vpd = 0x660f11;
+const uint32_t OP_MOVSD_Wsd_Vsd = 0xf20f11;
+const uint32_t OP_MOVLPS_Vq_Mq = 0x0f12;
+const uint32_t OP_MOVLPD_Vq_Mq = 0x660f12;
+const uint32_t OP_MOVHLPS_Vq_Uq = 0x0f12;
+const uint32_t OP_MOVDDUP_Vq_Wq = 0xf20f12;
+const uint32_t OP_MOVSLDUP_Vq_Wq = 0xf30f12;
+const uint32_t OP_MOVLPS_Mq_Vq = 0x0f13;
+const uint32_t OP_MOVLPD_Mq_Vq = 0x660f13;
+const uint32_t OP_UNPCKLPS_Vps_Wq = 0x0f14;
+const uint32_t OP_UNPCKLPD_Vpd_Wq = 0x660f14;
+const uint32_t OP_UNPCKHPS_Vps_Wq = 0x0f15;
+const uint32_t OP_UNPCKHPD_Vpd_Wq = 0x660f15;
+const uint32_t OP_MOVHPS_Vq_Mq = 0x0f16;
+const uint32_t OP_MOVHPD_Vq_Mq = 0x660f16;
+const uint32_t OP_MOVLHPS_Vq_Uq = 0x0f16;
+const uint32_t OP_MOVSHDUP_Vq_Wq = 0xf30f16;
+const uint32_t OP_MOVHPS_Mq_Vq = 0x0f17;
+const uint32_t OP_MOVHPD_Mq_Vq = 0x660f17;
+const uint32_t OP_PREFETCH_G16 = 0x0f18;
+const uint32_t OP_NOP1f_Ev = 0x0f1f;
+
+const uint32_t OP_MOV_Rd_Cd = 0x0f20;
+const uint32_t OP_MOV_Rd_Dd = 0x0f21;
+const uint32_t OP_MOV_Cd_Rd = 0x0f22;
+const uint32_t OP_MOV_Dd_Rd = 0x0f23;
+const uint32_t OP_MOVAPS_Vps_Wps = 0x0f28;
+const uint32_t OP_MOVAPD_Vpd_Wpd = 0x660f28;
+const uint32_t OP_MOVAPS_Wps_Vps = 0x0f29;
+const uint32_t OP_MOVAPD_Wpd_Vpd = 0x660f29;
+const uint32_t OP_CVTPI2PS_Vps_Qq = 0x0f2a;
+const uint32_t OP_CVTSI2SS_Vss_Ed = 0xf30f2a;
+const uint32_t OP_CVTPI2PD_Vpd_Qq = 0x660f2a;
+const uint32_t OP_CVTSI2SD_Vsd_Ed = 0xf20f2a;
+const uint32_t OP_MOVNTPS_Mps_Vps = 0x0f2b;
+const uint32_t OP_MOVNTPD_Mpd_Vpd = 0x660f2b;
+const uint32_t OP_CVTTPS2PI_Pq_Wq = 0x0f2c;
+const uint32_t OP_CVTTSS2SI_Gd_Wss = 0xf30f2c;
+const uint32_t OP_CVTTPD2PI_Pq_Wpd = 0x660f2c;
+const uint32_t OP_CVTTSD2SI_Gd_Wsd = 0xf20f2c;
+const uint32_t OP_CVTPS2PI_Pq_Wq = 0x0f2d;
+const uint32_t OP_CVTSS2SI_Gd_Wss = 0xf30f2d;
+const uint32_t OP_CVTPD2PI_Pq_Wpd = 0x660f2d;
+const uint32_t OP_CVTSD2SI_Gd_Wsd = 0xf20f2d;
+const uint32_t OP_UCOMISS_Vss_Wss = 0x0f2e;
+const uint32_t OP_UCOMISD_Vsd_Wsd = 0x660f2e;
+const uint32_t OP_COMISS_Vss_Wss = 0x0f2f;
+const uint32_t OP_COMISD_Vsd_Wsd = 0x660f2f;
+
+const uint32_t OP_WRMSR = 0x0f30;
+const uint32_t OP_RDTSC = 0x0f31;
+const uint32_t OP_RDMSR = 0x0f32;
+const uint32_t OP_RDPMC = 0x0f33;
+const uint32_t OP_SYSENTER = 0x0f34;
+const uint32_t OP_SYSEXIT = 0x0f35;
+const uint32_t OP_GETSEC = 0x0f37;
+
+const uint32_t OP_CMOV_O_Gv_Ev = 0x0f40;
+const uint32_t OP_CMOV_NO_Gv_Ev = 0x0f41;
+const uint32_t OP_CMOV_B_Gv_Ev = 0x0f42;
+const uint32_t OP_CMOV_C_Gv_Ev = 0x0f42;
+const uint32_t OP_CMOV_AE_Gv_Ev = 0x0f43;
+const uint32_t OP_CMOV_NC_Gv_Ev = 0x0f43;
+const uint32_t OP_CMOV_E_Gv_Ev = 0x0f44;
+const uint32_t OP_CMOV_Z_Gv_Ev = 0x0f44;
+const uint32_t OP_CMOV_NE_Gv_Ev = 0x0f45;
+const uint32_t OP_CMOV_NZ_Gv_Ev = 0x0f45;
+const uint32_t OP_CMOV_BE_Gv_Ev = 0x0f46;
+const uint32_t OP_CMOV_A_Gv_Ev = 0x0f47;
+const uint32_t OP_CMOV_S_Gv_Ev = 0x0f48;
+const uint32_t OP_CMOV_NS_Gv_Ev = 0x0f49;
+const uint32_t OP_CMOV_P_Gv_Ev = 0x0f4a;
+const uint32_t OP_CMOV_PE_Gv_Ev = 0x0f4a;
+const uint32_t OP_CMOV_NP_Gv_Ev = 0x0f4b;
+const uint32_t OP_CMOV_PO_Gv_Ev = 0x0f4b;
+const uint32_t OP_CMOV_L_Gv_Ev = 0x0f4c;
+const uint32_t OP_CMOV_NGE_Gv_Ev = 0x0f4c;
+const uint32_t OP_CMOV_NL_Gv_Ev = 0x0f4d;
+const uint32_t OP_CMOV_GE_Gv_Ev = 0x0f4d;
+const uint32_t OP_CMOV_LE_Gv_Ev = 0x0f4e;
+const uint32_t OP_CMOV_NG_Gv_Ev = 0x0f4e;
+const uint32_t OP_CMOV_NLE_Gv_Ev = 0x0f4f;
+const uint32_t OP_CMOV_G_Gv_Ev = 0x0f4f;
+
+const uint32_t OP_MOVMSKPS_Gd_Ups = 0x0f50;
+const uint32_t OP_MOVMSKPD_Gd_Upd = 0x660f50;
+const uint32_t OP_SQRTPS_Vps_Wps = 0x0f51;
+const uint32_t OP_SQRTSS_Vss_Wss = 0xf30f51;
+const uint32_t OP_SQRTPD_Vpd_Wpd = 0x660f51;
+const uint32_t OP_SQRTSD_Vsd_Wsd = 0xf20f51;
+const uint32_t OP_RSQRTPS_Vps_Wps = 0x0f52;
+const uint32_t OP_RSQRTSS_Vss_Wss = 0xf30f52;
+const uint32_t OP_RCPPS_Vps_Wps = 0x0f53;
+const uint32_t OP_RCPSS_Vss_Wss = 0xf30f53;
+const uint32_t OP_ANDPS_Vps_Wps = 0x0f54;
+const uint32_t OP_ANDPD_Vpd_Wpd = 0x660f54;
+const uint32_t OP_ANDNPS_Vps_Wps = 0x0f55;
+const uint32_t OP_ANDNPD_Vpd_Wpd = 0x660f55;
+const uint32_t OP_ORPS_Vps_Wps = 0x0f56;
+const uint32_t OP_ORPD_Vpd_Wpd = 0x660f56;
+const uint32_t OP_XORPS_Vps_Wps = 0x0f57;
+const uint32_t OP_XORPD_Vpd_Wpd = 0x660f57;
+const uint32_t OP_ADDPS_Vps_Wps = 0x0f58;
+const uint32_t OP_ADDSS_Vss_Wss = 0xf30f58;
+const uint32_t OP_ADDPD_Vpd_Wpd = 0x660f58;
+const uint32_t OP_ADDSD_Vsd_Wsd = 0xf20f58;
+const uint32_t OP_MULPS_Vps_Wps = 0x0f59;
+const uint32_t OP_MULSS_Vss_Wss = 0xf30f59;
+const uint32_t OP_MULPD_Vpd_Wpd = 0x660f59;
+const uint32_t OP_MULSD_Vsd_Wsd = 0xf20f59;
+const uint32_t OP_CVTPS2PD_Vpd_Wq = 0x0f5a;
+const uint32_t OP_CVTSS2SD_Vsd_Wss = 0xf30f5a;
+const uint32_t OP_CVTPD2PS_Vps_Wpd = 0x660f5a;
+const uint32_t OP_CVTSD2SS_Vss_Wsd = 0xf20f5a;
+const uint32_t OP_CVTDQ2PS_Vps_Wdq = 0x0f5b;
+const uint32_t OP_CVTPS2DQ_Vdq_Wps = 0x660f5b;
+const uint32_t OP_CVTTPS2DQ_Vdq_Wps = 0xf30f5b;
+const uint32_t OP_SUBPS_Vps_Wps = 0x0f5c;
+const uint32_t OP_SUBSS_Vss_Wss = 0xf30f5c;
+const uint32_t OP_SUBPD_Vpd_Wpd = 0x660f5c;
+const uint32_t OP_SUBSD_Vsd_Wsd = 0xf20f5c;
+const uint32_t OP_MINPS_Vps_Wps = 0x0f5d;
+const uint32_t OP_MINSS_Vss_Wss = 0xf30f5d;
+const uint32_t OP_MINPD_Vpd_Wpd = 0x660f5d;
+const uint32_t OP_MINSD_Vsd_Wsd = 0xf20f5d;
+const uint32_t OP_DIVPS_Vps_Wps = 0x0f5e;
+const uint32_t OP_DIVSS_Vss_Wss = 0xf30f5e;
+const uint32_t OP_DIVPD_Vpd_Wpd = 0x660f5e;
+const uint32_t OP_DIVSD_Vsd_Wsd = 0xf20f5e;
+const uint32_t OP_MAXPS_Vps_Wps = 0x0f5f;
+const uint32_t OP_MAXSS_Vss_Wss = 0xf30f5f;
+const uint32_t OP_MAXPD_Vpd_Wpd = 0x660f5f;
+const uint32_t OP_MAXSD_Vsd_Wsd = 0xf20f5f;
+
+const uint32_t OP_PUNPCKLBW_Pq_Qd = 0x0f60;
+const uint32_t OP_PUNPCKLBW_Vdq_Wdq = 0x660f60;
+const uint32_t OP_PUNPCKLWD_Pq_Qd = 0x0f61;
+const uint32_t OP_PUNPCKLWD_Vdq_Wdq = 0x660f61;
+const uint32_t OP_PUNPCKLDQ_Pq_Qd = 0x0f62;
+const uint32_t OP_PUNPCKLDQ_Vdq_Wdq = 0x660f62;
+const uint32_t OP_PACKSSWB_Pq_Qq = 0x0f63;
+const uint32_t OP_PACKSSWB_Vdq_Wdq = 0x660f63;
+const uint32_t OP_PCMPGTB_Pq_Qq = 0x0f64;
+const uint32_t OP_PCMPGTB_Vdq_Wdq = 0x660f64;
+const uint32_t OP_PCMPGTW_Pq_Qq = 0x0f65;
+const uint32_t OP_PCMPGTW_Vdq_Wdq = 0x660f65;
+const uint32_t OP_PCMPGTD_Pq_Qq = 0x0f66;
+const uint32_t OP_PCMPGTD_Vdq_Wdq = 0x660f66;
+const uint32_t OP_PACKUSWB_Pq_Qq = 0x0f67;
+const uint32_t OP_PACKUSWB_Vdq_Wdq = 0x660f67;
+const uint32_t OP_PUNPCKHBW_Pq_Qq = 0x0f68;
+const uint32_t OP_PUNPCKHBW_Vdq_Qdq = 0x660f68;
+const uint32_t OP_PUNPCKHWD_Pq_Qq = 0x0f69;
+const uint32_t OP_PUNPCKHWD_Vdq_Qdq = 0x660f69;
+const uint32_t OP_PUNPCKHDQ_Pq_Qq = 0x0f6a;
+const uint32_t OP_PUNPCKHDQ_Vdq_Qdq = 0x660f6a;
+const uint32_t OP_PACKSSDW_Pq_Qq = 0x0f6b;
+const uint32_t OP_PACKSSDW_Vdq_Qdq = 0x660f6b;
+const uint32_t OP_PUNPCKLQDQ_Vdq_Wdq = 0x660f6c;
+const uint32_t OP_PUNPCKHQDQ_Vdq_Wdq = 0x660f6d;
+const uint32_t OP_MOVD_Pd_Ed = 0x0f6e;
+const uint32_t OP_MOVD_Vd_Ed = 0x660f6e;
+const uint32_t OP_MOVQ_Pq_Qq = 0x0f6f;
+const uint32_t OP_MOVDQA_Vdq_Wdq = 0x660f6f;
+const uint32_t OP_MOVDQU_Vdq_Wdq = 0xf30f6f;
+
+const uint32_t OP_PSHUFW_Pq_Qq_Ib = 0x0f70;
+const uint32_t OP_PSHUFD_Vdq_Wdq_Ib = 0x660f70;
+const uint32_t OP_PSHUFHW_Vdq_Wdq_Ib = 0xf30f70;
+const uint32_t OP_PSHUFLW_Vdq_Wdq_Ib = 0xf20f70;
+const uint32_t OP_G12 = 0x0f71;
+const uint32_t OP_G13 = 0x0f72;
+const uint32_t OP_G14 = 0x0f73;
+const uint32_t OP_PCMPEQB_Pq_Qq = 0x0f74;
+const uint32_t OP_PCMPEQB_Vdq_Wdq = 0x660f74;
+const uint32_t OP_PCMPEQW_Pq_Qq = 0x0f75;
+const uint32_t OP_PCMPEQW_Vdq_Wdq = 0x660f75;
+const uint32_t OP_PCMPEQD_Pq_Qq = 0x0f76;
+const uint32_t OP_PCMPEQD_Vdq_Wdq = 0x660f76;
+const uint32_t OP_EMMS = 0x0f77;
+const uint32_t OP_VMREAD_Ed_Gd = 0x0f78;
+const uint32_t OP_VMWRITE_Gd_Ed = 0x0f79;
+const uint32_t OP_HADDPD_Vpd_Wpd = 0x660f7c;
+const uint32_t OP_HADDPS_Vps_Wps = 0xf20f7c;
+const uint32_t OP_HSUBPD_Vpd_Wpd = 0x660f7d;
+const uint32_t OP_HSUBPS_Vps_Wps = 0xf20f7d;
+const uint32_t OP_MOVD_Ed_Pd = 0x0f7e;
+const uint32_t OP_MOVD_Ed_Vd = 0x660f7e;
+const uint32_t OP_MOVQ_Vq_Wq = 0xf30f7e;
+const uint32_t OP_MOVQ_Qq_Pq = 0x0f7f;
+const uint32_t OP_MOVDQA_Wdq_Vdq = 0x660f7f;
+const uint32_t OP_MOVDQU_Wdq_Vdq = 0xf30f7f;
+
+const uint32_t OP_JCC_O_Jv = 0x0f80;
+const uint32_t OP_JCC_NO_Jv = 0x0f81;
+const uint32_t OP_JCC_B_Jv = 0x0f82;
+const uint32_t OP_JCC_C_Jv = 0x0f82;
+const uint32_t OP_JCC_NAE_Jv = 0x0f82;
+const uint32_t OP_JCC_AE_Jv = 0x0f83;
+const uint32_t OP_JCC_NB_Jv = 0x0f83;
+const uint32_t OP_JCC_NC_Jv = 0x0f83;
+const uint32_t OP_JCC_E_Jv = 0x0f84;
+const uint32_t OP_JCC_Z_Jv = 0x0f84;
+const uint32_t OP_JCC_NE_Jv = 0x0f85;
+const uint32_t OP_JCC_NZ_Jv = 0x0f85;
+const uint32_t OP_JCC_BE_Jv = 0x0f86;
+const uint32_t OP_JCC_NA_Jv = 0x0f86;
+const uint32_t OP_JCC_A_Jv = 0x0f87;
+const uint32_t OP_JCC_NBE_Jv = 0x0f87;
+const uint32_t OP_JCC_S_Jv = 0x0f88;
+const uint32_t OP_JCC_NS_Jv = 0x0f89;
+const uint32_t OP_JCC_P_Jv = 0x0f8a;
+const uint32_t OP_JCC_PE_Jv = 0x0f8a;
+const uint32_t OP_JCC_NP_Jv = 0x0f8b;
+const uint32_t OP_JCC_PO_Jv = 0x0f8b;
+const uint32_t OP_JCC_L_Jv = 0x0f8c;
+const uint32_t OP_JCC_NGE_Jv = 0x0f8c;
+const uint32_t OP_JCC_NL_Jv = 0x0f8d;
+const uint32_t OP_JCC_GE_Jv = 0x0f8d;
+const uint32_t OP_JCC_LE_Jv = 0x0f8e;
+const uint32_t OP_JCC_NG_Jv = 0x0f8e;
+const uint32_t OP_JCC_NLE_Jv = 0x0f8f;
+const uint32_t OP_JCC_G_Jv = 0x0f8f;
+
+const uint32_t OP_SETCC_O_Eb = (0x0f90 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NO_Eb = (0x0f91 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_B_Eb = (0x0f92 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_C_Eb = (0x0f92 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NAE_Eb = (0x0f92 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_AE_Eb = (0x0f93 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NB_Eb = (0x0f93 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NC_Eb = (0x0f93 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_E_Eb = (0x0f94 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_Z_Eb = (0x0f94 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NE_Eb = (0x0f95 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NZ_Eb = (0x0f95 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_BE_Eb = (0x0f96 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NA_Eb = (0x0f96 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_A_Eb = (0x0f97 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NBE_Eb = (0x0f97 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_S_Eb = (0x0f98 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NS_Eb = (0x0f99 | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_P_Eb = (0x0f9a | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_PE_Eb = (0x0f9a | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NP_Eb = (0x0f9b | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_PO_Eb = (0x0f9b | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_L_Eb = (0x0f9c | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NGE_Eb = (0x0f9c | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NL_Eb = (0x0f9d | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_GE_Eb = (0x0f9d | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_LE_Eb = (0x0f9e | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NG_Eb = (0x0f9e | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_NLE_Eb = (0x0f9f | OPFLAG_8BITRM);
+const uint32_t OP_SETCC_G_Eb = (0x0f9f | OPFLAG_8BITRM);
+
+const uint32_t OP_PUSH_FS = 0x0fa0;
+const uint32_t OP_POP_FS = 0x0fa1;
+const uint32_t OP_CPUID = 0x0fa2;
+const uint32_t OP_BT_Ev_Gv = 0x0fa3;
+const uint32_t OP_SHLD_Ev_Gv_Ib = 0x0fa4;
+const uint32_t OP_SHLD_Ev_Gv_CL = 0x0fa5;
+const uint32_t OP_PUSH_GS = 0x0fa8;
+const uint32_t OP_POP_GS = 0x0fa9;
+const uint32_t OP_RSM = 0x0faa;
+const uint32_t OP_BTS_Ev_Gv = 0x0fab;
+const uint32_t OP_SHRD_Ev_Gv_Ib = 0x0fac;
+const uint32_t OP_SHRD_Ev_Gv_CL = 0x0fad;
+const uint32_t OP_G16 = 0x0fae;
+const uint32_t OP_IMUL_Gv_Ev = 0x0faf;
+
+const uint32_t OP_CMPXCHG_Eb_Gb = (0x0fb0 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_CMPXCHG_Ev_Gv = 0x0fb1;
+const uint32_t OP_LSS_Mp = 0x0fb2;
+const uint32_t OP_BTR_Ev_Gv = 0x0fb3;
+const uint32_t OP_LFS_Mp = 0x0fb4;
+const uint32_t OP_LGS_Mp = 0x0fb5;
+const uint32_t OP_MOVZX_Gv_Eb = (0x0fb6 | OPFLAG_8BITRM);
+const uint32_t OP_MOVZX_Gv_Ew = 0x0fb7;
+const uint32_t OP_JMPE = 0x0fb8;
+const uint32_t OP_POPCNT_Gv_Ev = 0xf30fb8;
+const uint32_t OP_G10_INVALID = 0x0fb9;
+const uint32_t OP_G8_Ev_Ib = 0x0fba;
+const uint32_t OP_BTC_Ev_Gv = 0x0fbb;
+const uint32_t OP_BSF_Gv_Ev = 0x0fbc;
+const uint32_t OP_BSR_Gv_Ev = 0x0fbd;
+const uint32_t OP_MOVSX_Gv_Eb = (0x0fbe | OPFLAG_8BITRM);
+const uint32_t OP_MOVSX_Gv_Ew = 0x0fbf;
+
+const uint32_t OP_XADD_Eb_Gb = (0x0fc0 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const uint32_t OP_XADD_Ev_Gv = 0x0fc1;
+const uint32_t OP_CMPPS_Vps_Wps_Ib = 0x0fc2;
+const uint32_t OP_CMPSS_Vss_Wss_Ib = 0xf30fc2;
+const uint32_t OP_CMPPD_Vpd_Wpd_Ib = 0x660fc2;
+const uint32_t OP_CMPSD_Vsd_Wsd_Ib = 0xf20fc2;
+const uint32_t OP_MOVNTI_Md_Gd = 0x0fc3;
+const uint32_t OP_PINSRW_Pw_Ew_Ib = 0x0fc4;
+const uint32_t OP_PINSRW_Vw_Ew_Ib = 0x660fc4;
+const uint32_t OP_PEXTRW_Gw_Pw_Ib = 0x0fc5;
+const uint32_t OP_PEXTRW_Gw_Vw_Ib = 0x660fc5;
+const uint32_t OP_SHUFPS_Vps_Wps_Ib = 0x0fc6;
+const uint32_t OP_SHUFPD_Vpd_Wpd_Ib = 0x660fc6;
+const uint32_t OP_G9 = 0x0fc7;
+const uint32_t OP_BSWAP_EAX = 0x0fc8;
+const uint32_t OP_BSWAP_ECX = 0x0fc9;
+const uint32_t OP_BSWAP_EDX = 0x0fca;
+const uint32_t OP_BSWAP_EBX = 0x0fcb;
+const uint32_t OP_BSWAP_ESP = 0x0fcc;
+const uint32_t OP_BSWAP_EBP = 0x0fcd;
+const uint32_t OP_BSWAP_ESI = 0x0fce;
+const uint32_t OP_BSWAP_EDI = 0x0fcf;
+
+const uint32_t OP_ADDSUBPD_Vpd_Wpd = 0x0fd0;
+const uint32_t OP_ADDSUBPS_Vps_Wps = 0xf20fd0;
+const uint32_t OP_PSRLW_Pq_Qq = 0x0fd1;
+const uint32_t OP_PSRLW_Vdq_Wdq = 0x660fd1;
+const uint32_t OP_PSRLD_Pq_Qq = 0x0fd2;
+const uint32_t OP_PSRLD_Vdq_Wdq = 0x660fd2;
+const uint32_t OP_PSRLQ_Pq_Qq = 0x0fd3;
+const uint32_t OP_PSRLQ_Vdq_Wdq = 0x660fd3;
+const uint32_t OP_PADDQ_Pq_Qq = 0x0fd4;
+const uint32_t OP_PADDQ_Vdq_Wdq = 0x660fd4;
+const uint32_t OP_PMULLW_Pq_Qq = 0x0fd5;
+const uint32_t OP_PMULLW_Vdq_Wdq = 0x660fd5;
+const uint32_t OP_MOVQ_Wq_Vq = 0x0fd6;
+const uint32_t OP_MOVQ2DQ_Vdq_Qq = 0xf30fd6;
+const uint32_t OP_MOVDQ2Q_Pq_Vq = 0xf20fd6;
+const uint32_t OP_PMOVMSKB_Gd_Pq = 0x0fd7;
+const uint32_t OP_PMOVMSKB_Gd_Vdq = 0x660fd7;
+const uint32_t OP_PSUBUSB_Pq_Qq = 0x0fd8;
+const uint32_t OP_PSUBUSB_Vdq_Wdq = 0x660fd8;
+const uint32_t OP_PSUBUSW_Pq_Qq = 0x0fd9;
+const uint32_t OP_PSUBUSW_Vdq_Wdq = 0x660fd9;
+const uint32_t OP_PMINUB_Pq_Qq = 0x0fda;
+const uint32_t OP_PMINUB_Vdq_Wdq = 0x660fda;
+const uint32_t OP_PAND_Pq_Qq = 0x0fdb;
+const uint32_t OP_PAND_Vdq_Wdq = 0x660fdb;
+const uint32_t OP_PADDUSB_Pq_Qq = 0x0fdc;
+const uint32_t OP_PADDUSB_Vdq_Wdq = 0x660fdc;
+const uint32_t OP_PADDUSW_Pq_Qq = 0x0fdd;
+const uint32_t OP_PADDUSW_Vdq_Wdq = 0x660fdd;
+const uint32_t OP_PMAXUB_Pq_Qq = 0x0fde;
+const uint32_t OP_PMAXUB_Vdq_Wdq = 0x660fde;
+const uint32_t OP_PANDN_Pq_Qq = 0x0fdf;
+const uint32_t OP_PANDN_Vdq_Wdq = 0x660fdf;
+
+const uint32_t OP_PAVGB_Pq_Qq = 0x0fe0;
+const uint32_t OP_PAVGB_Vdq_Wdq = 0x660fe0;
+const uint32_t OP_PSRAW_Pq_Qq = 0x0fe1;
+const uint32_t OP_PSRAW_Vdq_Wdq = 0x660fe1;
+const uint32_t OP_PSRAD_Pq_Qq = 0x0fe2;
+const uint32_t OP_PSRAD_Vdq_Wdq = 0x660fe2;
+const uint32_t OP_PAVGW_Pq_Qq = 0x0fe3;
+const uint32_t OP_PAVGW_Vdq_Wdq = 0x660fe3;
+const uint32_t OP_PMULHUW_Pq_Qq = 0x0fe4;
+const uint32_t OP_PMULHUW_Vdq_Wdq = 0x660fe4;
+const uint32_t OP_PMULHW_Pq_Qq = 0x0fe5;
+const uint32_t OP_PMULHW_Vdq_Wdq = 0x660fe5;
+const uint32_t OP_CVTPD2DQ_Vdq_Wpd = 0xf20fe6;
+const uint32_t OP_CVTTPD2DQ_Vdq_Wpd = 0x660fe6;
+const uint32_t OP_CVTDQ2PD_Vpd_Wq = 0xf30fe6;
+const uint32_t OP_MOVNTQ_Mq_Vq = 0x0fe7;
+const uint32_t OP_MOVNTDQ_Mdq_Vdq = 0x660fe7;
+const uint32_t OP_PSUBSB_Pq_Qq = 0x0fe8;
+const uint32_t OP_PSUBSB_Vdq_Wdq = 0x660fe8;
+const uint32_t OP_PSUBSW_Pq_Qq = 0x0fe9;
+const uint32_t OP_PSUBSW_Vdq_Wdq = 0x660fe9;
+const uint32_t OP_PMINSW_Pq_Qq = 0x0fea;
+const uint32_t OP_PMINSW_Vdq_Wdq = 0x660fea;
+const uint32_t OP_POR_Pq_Qq = 0x0feb;
+const uint32_t OP_POR_Vdq_Wdq = 0x660feb;
+const uint32_t OP_PADDSB_Pq_Qq = 0x0fec;
+const uint32_t OP_PADDSB_Vdq_Wdq = 0x660fec;
+const uint32_t OP_PADDSW_Pq_Qq = 0x0fed;
+const uint32_t OP_PADDSW_Vdq_Wdq = 0x660fed;
+const uint32_t OP_PMAXSW_Pq_Qq = 0x0fee;
+const uint32_t OP_PMAXSW_Vdq_Wdq = 0x660fee;
+const uint32_t OP_PXOR_Pq_Qq = 0x0fef;
+const uint32_t OP_PXOR_Vdq_Wdq = 0x660fef;
+
+const uint32_t OP_LDDQU_Vdq_Mdq = 0xf20ff0;
+const uint32_t OP_PSLLW_Pq_Qq = 0x0ff1;
+const uint32_t OP_PSLLW_Vdq_Wdq = 0x660ff1;
+const uint32_t OP_PSLLD_Pq_Qq = 0x0ff2;
+const uint32_t OP_PSLLD_Vdq_Wdq = 0x660ff2;
+const uint32_t OP_PSLLQ_Pq_Qq = 0x0ff3;
+const uint32_t OP_PSLLQ_Vdq_Wdq = 0x660ff3;
+const uint32_t OP_PMULUDQ_Pq_Qq = 0x0ff4;
+const uint32_t OP_PMULUDQ_Vdq_Wdq = 0x660ff4;
+const uint32_t OP_PMADDWD_Pq_Qq = 0x0ff5;
+const uint32_t OP_PMADDWD_Vdq_Wdq = 0x660ff5;
+const uint32_t OP_PSADBW_Pq_Qq = 0x0ff6;
+const uint32_t OP_PSADBW_Vdq_Wdq = 0x660ff6;
+const uint32_t OP_MASKMOVQ_Pq_Qq = 0x0ff7;
+const uint32_t OP_MASKMOVDQU_Vdq_Wdq = 0x660ff7;
+const uint32_t OP_PSUBB_Pq_Qq = 0x0ff8;
+const uint32_t OP_PSUBB_Vdq_Wdq = 0x660ff8;
+const uint32_t OP_PSUBW_Pq_Qq = 0x0ff9;
+const uint32_t OP_PSUBW_Vdq_Wdq = 0x660ff9;
+const uint32_t OP_PSUBD_Pq_Qq = 0x0ffa;
+const uint32_t OP_PSUBD_Vdq_Wdq = 0x660ffa;
+const uint32_t OP_PSUBQ_Pq_Qq = 0x0ffb;
+const uint32_t OP_PSUBQ_Vdq_Wdq = 0x660ffb;
+const uint32_t OP_PADDB_Pq_Qq = 0x0ffc;
+const uint32_t OP_PADDB_Vdq_Wdq = 0x660ffc;
+const uint32_t OP_PADDW_Pq_Qq = 0x0ffd;
+const uint32_t OP_PADDW_Vdq_Wdq = 0x660ffd;
+const uint32_t OP_PADDD_Pq_Qq = 0x0ffe;
+const uint32_t OP_PADDD_Vdq_Wdq = 0x660ffe;
// triple byte opcodes (0f 38)
-const UINT32 OP_PSHUFB_Pq_Qq = 0x0f3800;
-const UINT32 OP_PSHUFB_Vdq_Wdq = 0x660f3800;
-const UINT32 OP_PHADDW_Pq_Qq = 0x0f3801;
-const UINT32 OP_PHADDW_Vdq_Wdq = 0x660f3801;
-const UINT32 OP_PHADDD_Pq_Qq = 0x0f3802;
-const UINT32 OP_PHADDD_Vdq_Wdq = 0x660f3802;
-const UINT32 OP_PHADDSW_Pq_Qq = 0x0f3803;
-const UINT32 OP_PHADDSW_Vdq_Wdq = 0x660f3803;
-const UINT32 OP_PMADDUBSW_Pq_Qq = 0x0f3804;
-const UINT32 OP_PMADDUBSW_Vdq_Wdq = 0x660f3804;
-const UINT32 OP_PHSUBW_Pq_Qq = 0x0f3805;
-const UINT32 OP_PHSUBW_Vdq_Wdq = 0x660f3805;
-const UINT32 OP_PHSUBD_Pq_Qq = 0x0f3806;
-const UINT32 OP_PHSUBD_Vdq_Wdq = 0x660f3806;
-const UINT32 OP_PHSUBSW_Pq_Qq = 0x0f3807;
-const UINT32 OP_PHSUBSW_Vdq_Wdq = 0x660f3807;
-const UINT32 OP_PSIGNB_Pq_Qq = 0x0f3808;
-const UINT32 OP_PSIGNB_Vdq_Wdq = 0x660f3808;
-const UINT32 OP_PSIGNW_Pq_Qq = 0x0f3809;
-const UINT32 OP_PSIGNW_Vdq_Wdq = 0x660f3809;
-const UINT32 OP_PSIGND_Pq_Qq = 0x0f380a;
-const UINT32 OP_PSIGND_Vdq_Wdq = 0x660f380a;
-const UINT32 OP_PMULHRSW_Pq_Qq = 0x0f380b;
-const UINT32 OP_PMULHRSW_Vdq_Wdq = 0x660f380b;
-
-const UINT32 OP_PBLENDVB_Vdq_Wdq = 0x660f3810;
-const UINT32 OP_PBLENDVPS_Vdq_Wdq = 0x660f3814;
-const UINT32 OP_PBLENDVPD_Vdq_Wdq = 0x660f3815;
-const UINT32 OP_PTEST_Vdq_Wdq = 0x660f3817;
-const UINT32 OP_PABSB_Pq_Qq = 0x0f381c;
-const UINT32 OP_PABSB_Vdq_Wdq = 0x660f381c;
-const UINT32 OP_PABSW_Pq_Qq = 0x0f381d;
-const UINT32 OP_PABSW_Vdq_Wdq = 0x660f381d;
-const UINT32 OP_PABSD_Pq_Qq = 0x0f381e;
-const UINT32 OP_PABSD_Vdq_Wdq = 0x660f381e;
-
-const UINT32 OP_PMOVSXBW_Vdq_Udq = 0x660f3820;
-const UINT32 OP_PMOVSXBD_Vdq_Udq = 0x660f3821;
-const UINT32 OP_PMOVSXBQ_Vdq_Udq = 0x660f3822;
-const UINT32 OP_PMOVSXWD_Vdq_Udq = 0x660f3823;
-const UINT32 OP_PMOVSXWQ_Vdq_Udq = 0x660f3824;
-const UINT32 OP_PMOVSXDQ_Vdq_Udq = 0x660f3825;
-const UINT32 OP_PMULDQ_Vdq_Udq = 0x660f3828;
-const UINT32 OP_PCMPEQQ_Vdq_Udq = 0x660f3829;
-const UINT32 OP_MOVNTDQA_Vdq_Udq = 0x660f382a;
-const UINT32 OP_PACKUSDW_Vdq_Udq = 0x660f382b;
-
-const UINT32 OP_PMOVZXBW_Vdq_Udq = 0x660f3830;
-const UINT32 OP_PMOVZXBD_Vdq_Udq = 0x660f3831;
-const UINT32 OP_PMOVZXBQ_Vdq_Udq = 0x660f3832;
-const UINT32 OP_PMOVZXWD_Vdq_Udq = 0x660f3833;
-const UINT32 OP_PMOVZXWQ_Vdq_Udq = 0x660f3834;
-const UINT32 OP_PMOVZXDQ_Vdq_Udq = 0x660f3835;
-const UINT32 OP_PMINSB_Vdq_Udq = 0x660f3838;
-const UINT32 OP_PMINSD_Vdq_Udq = 0x660f3839;
-const UINT32 OP_PMINUW_Vdq_Udq = 0x660f383a;
-const UINT32 OP_PMINUD_Vdq_Udq = 0x660f383b;
-const UINT32 OP_PMAXSB_Vdq_Udq = 0x660f383c;
-const UINT32 OP_PMAXSD_Vdq_Udq = 0x660f383d;
-const UINT32 OP_PMAXUW_Vdq_Udq = 0x660f383e;
-const UINT32 OP_PMAXUD_Vdq_Udq = 0x660f383f;
-
-const UINT32 OP_MULLD_Vdq_Wdq = 0x660f3840;
-const UINT32 OP_PHMINPOSUW_Vdq_Wdq = 0x660f3841;
-
-const UINT32 OP_NVEPT_Gd_Mdq = 0x660f3880;
-const UINT32 OP_NVVPID_Gd_Mdq = 0x660f3881;
-
-const UINT32 OP_MOVBE_Gv_Mv = 0x0f38f0;
-const UINT32 OP_CRC32_Gd_Eb = 0xf20f38f0;
-const UINT32 OP_MOVBE_Mv_Gv = 0x0f38f1;
-const UINT32 OP_CRC32_Gd_Ev = 0xf20f38f1;
+const uint32_t OP_PSHUFB_Pq_Qq = 0x0f3800;
+const uint32_t OP_PSHUFB_Vdq_Wdq = 0x660f3800;
+const uint32_t OP_PHADDW_Pq_Qq = 0x0f3801;
+const uint32_t OP_PHADDW_Vdq_Wdq = 0x660f3801;
+const uint32_t OP_PHADDD_Pq_Qq = 0x0f3802;
+const uint32_t OP_PHADDD_Vdq_Wdq = 0x660f3802;
+const uint32_t OP_PHADDSW_Pq_Qq = 0x0f3803;
+const uint32_t OP_PHADDSW_Vdq_Wdq = 0x660f3803;
+const uint32_t OP_PMADDUBSW_Pq_Qq = 0x0f3804;
+const uint32_t OP_PMADDUBSW_Vdq_Wdq = 0x660f3804;
+const uint32_t OP_PHSUBW_Pq_Qq = 0x0f3805;
+const uint32_t OP_PHSUBW_Vdq_Wdq = 0x660f3805;
+const uint32_t OP_PHSUBD_Pq_Qq = 0x0f3806;
+const uint32_t OP_PHSUBD_Vdq_Wdq = 0x660f3806;
+const uint32_t OP_PHSUBSW_Pq_Qq = 0x0f3807;
+const uint32_t OP_PHSUBSW_Vdq_Wdq = 0x660f3807;
+const uint32_t OP_PSIGNB_Pq_Qq = 0x0f3808;
+const uint32_t OP_PSIGNB_Vdq_Wdq = 0x660f3808;
+const uint32_t OP_PSIGNW_Pq_Qq = 0x0f3809;
+const uint32_t OP_PSIGNW_Vdq_Wdq = 0x660f3809;
+const uint32_t OP_PSIGND_Pq_Qq = 0x0f380a;
+const uint32_t OP_PSIGND_Vdq_Wdq = 0x660f380a;
+const uint32_t OP_PMULHRSW_Pq_Qq = 0x0f380b;
+const uint32_t OP_PMULHRSW_Vdq_Wdq = 0x660f380b;
+
+const uint32_t OP_PBLENDVB_Vdq_Wdq = 0x660f3810;
+const uint32_t OP_PBLENDVPS_Vdq_Wdq = 0x660f3814;
+const uint32_t OP_PBLENDVPD_Vdq_Wdq = 0x660f3815;
+const uint32_t OP_PTEST_Vdq_Wdq = 0x660f3817;
+const uint32_t OP_PABSB_Pq_Qq = 0x0f381c;
+const uint32_t OP_PABSB_Vdq_Wdq = 0x660f381c;
+const uint32_t OP_PABSW_Pq_Qq = 0x0f381d;
+const uint32_t OP_PABSW_Vdq_Wdq = 0x660f381d;
+const uint32_t OP_PABSD_Pq_Qq = 0x0f381e;
+const uint32_t OP_PABSD_Vdq_Wdq = 0x660f381e;
+
+const uint32_t OP_PMOVSXBW_Vdq_Udq = 0x660f3820;
+const uint32_t OP_PMOVSXBD_Vdq_Udq = 0x660f3821;
+const uint32_t OP_PMOVSXBQ_Vdq_Udq = 0x660f3822;
+const uint32_t OP_PMOVSXWD_Vdq_Udq = 0x660f3823;
+const uint32_t OP_PMOVSXWQ_Vdq_Udq = 0x660f3824;
+const uint32_t OP_PMOVSXDQ_Vdq_Udq = 0x660f3825;
+const uint32_t OP_PMULDQ_Vdq_Udq = 0x660f3828;
+const uint32_t OP_PCMPEQQ_Vdq_Udq = 0x660f3829;
+const uint32_t OP_MOVNTDQA_Vdq_Udq = 0x660f382a;
+const uint32_t OP_PACKUSDW_Vdq_Udq = 0x660f382b;
+
+const uint32_t OP_PMOVZXBW_Vdq_Udq = 0x660f3830;
+const uint32_t OP_PMOVZXBD_Vdq_Udq = 0x660f3831;
+const uint32_t OP_PMOVZXBQ_Vdq_Udq = 0x660f3832;
+const uint32_t OP_PMOVZXWD_Vdq_Udq = 0x660f3833;
+const uint32_t OP_PMOVZXWQ_Vdq_Udq = 0x660f3834;
+const uint32_t OP_PMOVZXDQ_Vdq_Udq = 0x660f3835;
+const uint32_t OP_PMINSB_Vdq_Udq = 0x660f3838;
+const uint32_t OP_PMINSD_Vdq_Udq = 0x660f3839;
+const uint32_t OP_PMINUW_Vdq_Udq = 0x660f383a;
+const uint32_t OP_PMINUD_Vdq_Udq = 0x660f383b;
+const uint32_t OP_PMAXSB_Vdq_Udq = 0x660f383c;
+const uint32_t OP_PMAXSD_Vdq_Udq = 0x660f383d;
+const uint32_t OP_PMAXUW_Vdq_Udq = 0x660f383e;
+const uint32_t OP_PMAXUD_Vdq_Udq = 0x660f383f;
+
+const uint32_t OP_MULLD_Vdq_Wdq = 0x660f3840;
+const uint32_t OP_PHMINPOSUW_Vdq_Wdq = 0x660f3841;
+
+const uint32_t OP_NVEPT_Gd_Mdq = 0x660f3880;
+const uint32_t OP_NVVPID_Gd_Mdq = 0x660f3881;
+
+const uint32_t OP_MOVBE_Gv_Mv = 0x0f38f0;
+const uint32_t OP_CRC32_Gd_Eb = 0xf20f38f0;
+const uint32_t OP_MOVBE_Mv_Gv = 0x0f38f1;
+const uint32_t OP_CRC32_Gd_Ev = 0xf20f38f1;
// triple byte opcodes (0f 3a)
-const UINT32 OP_ROUNDPS_Vdq_Wdq_Ib = 0x660f3a08;
-const UINT32 OP_ROUNDPD_Vdq_Wdq_Ib = 0x660f3a09;
-const UINT32 OP_ROUNDSS_Vss_Wss_Ib = 0x660f3a0a;
-const UINT32 OP_ROUNDSD_Vsd_Wsd_Ib = 0x660f3a0b;
-const UINT32 OP_BLENDPS_Vdq_Wdq_Ib = 0x660f3a0c;
-const UINT32 OP_BLENDPD_Vdq_Wdq_Ib = 0x660f3a0d;
-const UINT32 OP_PBLENDW_Vdq_Wdq_Ib = 0x660f3a0e;
-const UINT32 OP_PALIGNR_Pq_Qq_Ib = 0x0f3a0f;
-const UINT32 OP_PALIGNR_Vdq_Wdq_Ib = 0x660f3a0f;
-
-const UINT32 OP_EXTRB_Rd_Vdq_Ib = 0x660f3a14;
-const UINT32 OP_EXTRW_Rd_Vdq_Ib = 0x660f3a15;
-const UINT32 OP_EXTRD_Rd_Vdq_Ib = 0x660f3a16;
-const UINT32 OP_EXTRACTPS_Ed_Vdq_Ib = 0x660f3a17;
-
-const UINT32 OP_PINSRB_Vdq_Rd_Ib = 0x660f3a20;
-const UINT32 OP_INSERTPS_Vdq_Udq_Ib = 0x660f3a21;
-const UINT32 OP_PINSRD_Vdq_Ed_Ib = 0x660f3a22;
-
-const UINT32 OP_DPPS_Vdq_Wdq_Ib = 0x660f3a40;
-const UINT32 OP_DPPD_Vdq_Wdq_Ib = 0x660f3a41;
-const UINT32 OP_MPSADBW_Vdq_Wdq_Ib = 0x660f3a42;
-
-const UINT32 OP_PCMPESTRM_Vdq_Wdq_Ib = 0x660f3a60;
-const UINT32 OP_PCMPESTRI_Vdq_Wdq_Ib = 0x660f3a61;
-const UINT32 OP_PCMPISTRM_Vdq_Wdq_Ib = 0x660f3a62;
-const UINT32 OP_PCMPISTRI_Vdq_Wdq_Ib = 0x660f3a63;
+const uint32_t OP_ROUNDPS_Vdq_Wdq_Ib = 0x660f3a08;
+const uint32_t OP_ROUNDPD_Vdq_Wdq_Ib = 0x660f3a09;
+const uint32_t OP_ROUNDSS_Vss_Wss_Ib = 0x660f3a0a;
+const uint32_t OP_ROUNDSD_Vsd_Wsd_Ib = 0x660f3a0b;
+const uint32_t OP_BLENDPS_Vdq_Wdq_Ib = 0x660f3a0c;
+const uint32_t OP_BLENDPD_Vdq_Wdq_Ib = 0x660f3a0d;
+const uint32_t OP_PBLENDW_Vdq_Wdq_Ib = 0x660f3a0e;
+const uint32_t OP_PALIGNR_Pq_Qq_Ib = 0x0f3a0f;
+const uint32_t OP_PALIGNR_Vdq_Wdq_Ib = 0x660f3a0f;
+
+const uint32_t OP_EXTRB_Rd_Vdq_Ib = 0x660f3a14;
+const uint32_t OP_EXTRW_Rd_Vdq_Ib = 0x660f3a15;
+const uint32_t OP_EXTRD_Rd_Vdq_Ib = 0x660f3a16;
+const uint32_t OP_EXTRACTPS_Ed_Vdq_Ib = 0x660f3a17;
+
+const uint32_t OP_PINSRB_Vdq_Rd_Ib = 0x660f3a20;
+const uint32_t OP_INSERTPS_Vdq_Udq_Ib = 0x660f3a21;
+const uint32_t OP_PINSRD_Vdq_Ed_Ib = 0x660f3a22;
+
+const uint32_t OP_DPPS_Vdq_Wdq_Ib = 0x660f3a40;
+const uint32_t OP_DPPD_Vdq_Wdq_Ib = 0x660f3a41;
+const uint32_t OP_MPSADBW_Vdq_Wdq_Ib = 0x660f3a42;
+
+const uint32_t OP_PCMPESTRM_Vdq_Wdq_Ib = 0x660f3a60;
+const uint32_t OP_PCMPESTRI_Vdq_Wdq_Ib = 0x660f3a61;
+const uint32_t OP_PCMPISTRM_Vdq_Wdq_Ib = 0x660f3a62;
+const uint32_t OP_PCMPISTRI_Vdq_Wdq_Ib = 0x660f3a63;
// floating point opcodes
-const UINT32 OP_FADD_ST0_STn = 0xd8c0;
-const UINT32 OP_FMUL_ST0_STn = 0xd8c8;
-const UINT32 OP_FCOM_ST0_STn = 0xd8d0;
-const UINT32 OP_FCOMP_ST0_STn = 0xd8d8;
-const UINT32 OP_FSUB_ST0_STn = 0xd8e0;
-const UINT32 OP_FSUBR_ST0_STn = 0xd8e8;
-const UINT32 OP_FDIV_ST0_STn = 0xd8f0;
-const UINT32 OP_FDIVR_ST0_STn = 0xd8f8;
-const UINT32 OP_FLD_ST0_STn = 0xd9c0;
-const UINT32 OP_FXCH_ST0_STn = 0xd9c8;
-const UINT32 OP_FNOP = 0xd9d0;
-const UINT32 OP_FCHS = 0xd9e0;
-const UINT32 OP_FABS = 0xd9e1;
-const UINT32 OP_FTST = 0xd9e4;
-const UINT32 OP_FXAM = 0xd9e5;
-const UINT32 OP_FLD1 = 0xd9e8;
-const UINT32 OP_FLDL2T = 0xd9e9;
-const UINT32 OP_FLDL2E = 0xd9ea;
-const UINT32 OP_FLDPI = 0xd9eb;
-const UINT32 OP_FLDLG2 = 0xd9ec;
-const UINT32 OP_FLDLN2 = 0xd9ed;
-const UINT32 OP_FLDZ = 0xd9ee;
-const UINT32 OP_F2XM1 = 0xd9f0;
-const UINT32 OP_FYL2X = 0xd9f1;
-const UINT32 OP_FPTAN = 0xd9f2;
-const UINT32 OP_FPATAN = 0xd9f3;
-const UINT32 OP_FXTRACT = 0xd9f4;
-const UINT32 OP_FPREM1 = 0xd9f5;
-const UINT32 OP_FDECSTP = 0xd9f6;
-const UINT32 OP_FINCSTP = 0xd9f7;
-const UINT32 OP_FPREM = 0xd9f8;
-const UINT32 OP_FYL2XP1 = 0xd9f9;
-const UINT32 OP_FSQRT = 0xd9fa;
-const UINT32 OP_FSINCOS = 0xd9fb;
-const UINT32 OP_FRNDINT = 0xd9fc;
-const UINT32 OP_FSCALE = 0xd9fd;
-const UINT32 OP_FSIN = 0xd9fe;
-const UINT32 OP_FCOS = 0xd9ff;
-const UINT32 OP_FCMOVB_ST0_STn = 0xdac0;
-const UINT32 OP_FCMOVE_ST0_STn = 0xdac8;
-const UINT32 OP_FCMOVBE_ST0_STn = 0xdad0;
-const UINT32 OP_FCMOVU_ST0_STn = 0xdad8;
-const UINT32 OP_FUCOMPP = 0xdae9;
-const UINT32 OP_FCMOVNB_ST0_STn = 0xdbc0;
-const UINT32 OP_FCMOVNE_ST0_STn = 0xdbc8;
-const UINT32 OP_FCMOVNBE_ST0_STn = 0xdbd0;
-const UINT32 OP_FCMOVNU_ST0_STn = 0xdbd8;
-const UINT32 OP_FCLEX = 0xdbe2;
-const UINT32 OP_FINIT = 0xdbe3;
-const UINT32 OP_FUCOMI_ST0_STn = 0xdbe8;
-const UINT32 OP_FCOMI_ST0_STn = 0xdbf0;
-const UINT32 OP_FADD_STn_ST0 = 0xdcc0;
-const UINT32 OP_FMUL_STn_ST0 = 0xdcc8;
-const UINT32 OP_FSUBR_STn_ST0 = 0xdce0;
-const UINT32 OP_FSUB_STn_ST0 = 0xdce8;
-const UINT32 OP_FDIVR_STn_ST0 = 0xdcf0;
-const UINT32 OP_FDIV_STn_ST0 = 0xdcf8;
-const UINT32 OP_FFREE_STn = 0xddc0;
-const UINT32 OP_FST_STn = 0xddd0;
-const UINT32 OP_FSTP_STn = 0xddd8;
-const UINT32 OP_FUCOM_STn_ST0 = 0xdde0;
-const UINT32 OP_FUCOMP_STn = 0xdde8;
-const UINT32 OP_FADDP_STn_ST0 = 0xdec0;
-const UINT32 OP_FMULP_STn_ST0 = 0xdec8;
-const UINT32 OP_FCOMPP = 0xded9;
-const UINT32 OP_FSUBRP_STn_ST0 = 0xdee0;
-const UINT32 OP_FSUBP_STn_ST0 = 0xdee8;
-const UINT32 OP_FDIVRP_STn_ST0 = 0xdef0;
-const UINT32 OP_FDIVP_STn_ST0 = 0xdef8;
-const UINT32 OP_FSTSW_AX = 0xdfe0;
-const UINT32 OP_FCOMIP_ST0_STn = 0xdff0;
+const uint32_t OP_FADD_ST0_STn = 0xd8c0;
+const uint32_t OP_FMUL_ST0_STn = 0xd8c8;
+const uint32_t OP_FCOM_ST0_STn = 0xd8d0;
+const uint32_t OP_FCOMP_ST0_STn = 0xd8d8;
+const uint32_t OP_FSUB_ST0_STn = 0xd8e0;
+const uint32_t OP_FSUBR_ST0_STn = 0xd8e8;
+const uint32_t OP_FDIV_ST0_STn = 0xd8f0;
+const uint32_t OP_FDIVR_ST0_STn = 0xd8f8;
+const uint32_t OP_FLD_ST0_STn = 0xd9c0;
+const uint32_t OP_FXCH_ST0_STn = 0xd9c8;
+const uint32_t OP_FNOP = 0xd9d0;
+const uint32_t OP_FCHS = 0xd9e0;
+const uint32_t OP_FABS = 0xd9e1;
+const uint32_t OP_FTST = 0xd9e4;
+const uint32_t OP_FXAM = 0xd9e5;
+const uint32_t OP_FLD1 = 0xd9e8;
+const uint32_t OP_FLDL2T = 0xd9e9;
+const uint32_t OP_FLDL2E = 0xd9ea;
+const uint32_t OP_FLDPI = 0xd9eb;
+const uint32_t OP_FLDLG2 = 0xd9ec;
+const uint32_t OP_FLDLN2 = 0xd9ed;
+const uint32_t OP_FLDZ = 0xd9ee;
+const uint32_t OP_F2XM1 = 0xd9f0;
+const uint32_t OP_FYL2X = 0xd9f1;
+const uint32_t OP_FPTAN = 0xd9f2;
+const uint32_t OP_FPATAN = 0xd9f3;
+const uint32_t OP_FXTRACT = 0xd9f4;
+const uint32_t OP_FPREM1 = 0xd9f5;
+const uint32_t OP_FDECSTP = 0xd9f6;
+const uint32_t OP_FINCSTP = 0xd9f7;
+const uint32_t OP_FPREM = 0xd9f8;
+const uint32_t OP_FYL2XP1 = 0xd9f9;
+const uint32_t OP_FSQRT = 0xd9fa;
+const uint32_t OP_FSINCOS = 0xd9fb;
+const uint32_t OP_FRNDINT = 0xd9fc;
+const uint32_t OP_FSCALE = 0xd9fd;
+const uint32_t OP_FSIN = 0xd9fe;
+const uint32_t OP_FCOS = 0xd9ff;
+const uint32_t OP_FCMOVB_ST0_STn = 0xdac0;
+const uint32_t OP_FCMOVE_ST0_STn = 0xdac8;
+const uint32_t OP_FCMOVBE_ST0_STn = 0xdad0;
+const uint32_t OP_FCMOVU_ST0_STn = 0xdad8;
+const uint32_t OP_FUCOMPP = 0xdae9;
+const uint32_t OP_FCMOVNB_ST0_STn = 0xdbc0;
+const uint32_t OP_FCMOVNE_ST0_STn = 0xdbc8;
+const uint32_t OP_FCMOVNBE_ST0_STn = 0xdbd0;
+const uint32_t OP_FCMOVNU_ST0_STn = 0xdbd8;
+const uint32_t OP_FCLEX = 0xdbe2;
+const uint32_t OP_FINIT = 0xdbe3;
+const uint32_t OP_FUCOMI_ST0_STn = 0xdbe8;
+const uint32_t OP_FCOMI_ST0_STn = 0xdbf0;
+const uint32_t OP_FADD_STn_ST0 = 0xdcc0;
+const uint32_t OP_FMUL_STn_ST0 = 0xdcc8;
+const uint32_t OP_FSUBR_STn_ST0 = 0xdce0;
+const uint32_t OP_FSUB_STn_ST0 = 0xdce8;
+const uint32_t OP_FDIVR_STn_ST0 = 0xdcf0;
+const uint32_t OP_FDIV_STn_ST0 = 0xdcf8;
+const uint32_t OP_FFREE_STn = 0xddc0;
+const uint32_t OP_FST_STn = 0xddd0;
+const uint32_t OP_FSTP_STn = 0xddd8;
+const uint32_t OP_FUCOM_STn_ST0 = 0xdde0;
+const uint32_t OP_FUCOMP_STn = 0xdde8;
+const uint32_t OP_FADDP_STn_ST0 = 0xdec0;
+const uint32_t OP_FMULP_STn_ST0 = 0xdec8;
+const uint32_t OP_FCOMPP = 0xded9;
+const uint32_t OP_FSUBRP_STn_ST0 = 0xdee0;
+const uint32_t OP_FSUBP_STn_ST0 = 0xdee8;
+const uint32_t OP_FDIVRP_STn_ST0 = 0xdef0;
+const uint32_t OP_FDIVP_STn_ST0 = 0xdef8;
+const uint32_t OP_FSTSW_AX = 0xdfe0;
+const uint32_t OP_FCOMIP_ST0_STn = 0xdff0;
@@ -1170,13 +1170,13 @@ const UINT32 OP_FCOMIP_ST0_STn = 0xdff0;
// MEMORY REFERENCES
//**************************************************************************
-inline x86_memref MBD(UINT8 base, INT32 disp) { return x86_memref(base, REG_NONE, 1, disp); }
-inline x86_memref MBISD(UINT8 base, UINT8 ind, UINT8 scale, INT32 disp) { return x86_memref(base, ind, scale, disp); }
+inline x86_memref MBD(uint8_t base, int32_t disp) { return x86_memref(base, REG_NONE, 1, disp); }
+inline x86_memref MBISD(uint8_t base, uint8_t ind, uint8_t scale, int32_t disp) { return x86_memref(base, ind, scale, disp); }
#if (X86EMIT_SIZE == 32)
inline x86_memref MABS(const void *mem) { return x86_memref(REG_NONE, REG_NONE, 1, reinterpret_cast<uintptr_t>(const_cast<void *>(mem))); }
-inline x86_memref MABSI(const void *mem, UINT8 index) { return x86_memref(index, REG_NONE, 1, reinterpret_cast<uintptr_t>(const_cast<void *>(mem))); }
-inline x86_memref MABSI(const void *mem, UINT8 index, UINT8 scale) { return x86_memref(REG_NONE, index, scale, reinterpret_cast<uintptr_t>(const_cast<void *>(mem))); }
+inline x86_memref MABSI(const void *mem, uint8_t index) { return x86_memref(index, REG_NONE, 1, reinterpret_cast<uintptr_t>(const_cast<void *>(mem))); }
+inline x86_memref MABSI(const void *mem, uint8_t index, uint8_t scale) { return x86_memref(REG_NONE, index, scale, reinterpret_cast<uintptr_t>(const_cast<void *>(mem))); }
#endif
@@ -1190,7 +1190,7 @@ inline x86_memref MABSI(const void *mem, UINT8 index, UINT8 scale) { return x86_
// three components
//-------------------------------------------------
-inline UINT8 make_modrm(UINT8 mode, UINT8 reg, UINT8 rm)
+inline uint8_t make_modrm(uint8_t mode, uint8_t reg, uint8_t rm)
{
assert(mode < 4);
assert(reg < REG_MAX);
@@ -1204,9 +1204,9 @@ inline UINT8 make_modrm(UINT8 mode, UINT8 reg, UINT8 rm)
// three components
//-------------------------------------------------
-inline UINT8 make_sib(UINT8 scale, UINT8 index, UINT8 base)
+inline uint8_t make_sib(uint8_t scale, uint8_t index, uint8_t base)
{
- static const UINT8 scale_lookup[9] = { 0<<6, 0<<6, 1<<6, 0<<6, 2<<6, 0<<6, 0<<6, 0<<6, 3<<6 };
+ static const uint8_t scale_lookup[9] = { 0<<6, 0<<6, 1<<6, 0<<6, 2<<6, 0<<6, 0<<6, 0<<6, 3<<6 };
assert(scale == 1 || scale == 2 || scale == 4 || scale == 8);
assert(index < REG_MAX);
assert(base < REG_MAX);
@@ -1218,9 +1218,9 @@ inline UINT8 make_sib(UINT8 scale, UINT8 index, UINT8 base)
// emit_byte - emit a byte
//-------------------------------------------------
-inline void emit_byte(x86code *&emitptr, UINT8 byte)
+inline void emit_byte(x86code *&emitptr, uint8_t byte)
{
- *((UINT8 *)emitptr) = byte;
+ *((uint8_t *)emitptr) = byte;
emitptr += 1;
}
@@ -1229,9 +1229,9 @@ inline void emit_byte(x86code *&emitptr, UINT8 byte)
// emit_word - emit a word
//-------------------------------------------------
-inline void emit_word(x86code *&emitptr, UINT16 word)
+inline void emit_word(x86code *&emitptr, uint16_t word)
{
- *((UINT16 *)emitptr) = word;
+ *((uint16_t *)emitptr) = word;
emitptr += 2;
}
@@ -1240,9 +1240,9 @@ inline void emit_word(x86code *&emitptr, UINT16 word)
// emit_dword - emit a dword
//-------------------------------------------------
-inline void emit_dword(x86code *&emitptr, UINT32 dword)
+inline void emit_dword(x86code *&emitptr, uint32_t dword)
{
- *((UINT32 *)emitptr) = dword;
+ *((uint32_t *)emitptr) = dword;
emitptr += 4;
}
@@ -1251,9 +1251,9 @@ inline void emit_dword(x86code *&emitptr, UINT32 dword)
// emit_qword - emit a dword
//-------------------------------------------------
-inline void emit_qword(x86code *&emitptr, UINT64 qword)
+inline void emit_qword(x86code *&emitptr, uint64_t qword)
{
- *((UINT64 *)emitptr) = qword;
+ *((uint64_t *)emitptr) = qword;
emitptr += 8;
}
@@ -1268,7 +1268,7 @@ inline void emit_qword(x86code *&emitptr, UINT64 qword)
// along with any necessary REX prefixes for x64
//-------------------------------------------------
-inline void emit_op(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, UINT8 sib, UINT8 rm)
+inline void emit_op(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, uint8_t sib, uint8_t rm)
{
if (opsize == OP_16BIT)
emit_byte(emitptr, PREFIX_OPSIZE);
@@ -1280,7 +1280,7 @@ inline void emit_op(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, UINT8
#if (X86EMIT_SIZE == 64)
{
- UINT8 rex;
+ uint8_t rex;
assert(opsize == OP_16BIT || opsize == OP_32BIT || opsize == OP_64BIT);
@@ -1304,7 +1304,7 @@ inline void emit_op(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, UINT8
// emit_op_simple - emit a simple opcode
//-------------------------------------------------
-inline void emit_op_simple(x86code *&emitptr, UINT32 op, UINT8 opsize)
+inline void emit_op_simple(x86code *&emitptr, uint32_t op, uint8_t opsize)
{
emit_op(emitptr, op, opsize, 0, 0, 0);
}
@@ -1315,7 +1315,7 @@ inline void emit_op_simple(x86code *&emitptr, UINT32 op, UINT8 opsize)
// a register parameter
//-------------------------------------------------
-inline void emit_op_reg(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg)
+inline void emit_op_reg(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg)
{
emit_op(emitptr, op, opsize, 0, 0, reg);
}
@@ -1326,7 +1326,7 @@ inline void emit_op_reg(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg)
// register modrm byte
//-------------------------------------------------
-inline void emit_op_modrm_reg(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, UINT8 rm)
+inline void emit_op_modrm_reg(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, uint8_t rm)
{
assert(reg < REG_MAX);
assert(rm < REG_MAX);
@@ -1341,7 +1341,7 @@ inline void emit_op_modrm_reg(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8
// memory modrm byte
//-------------------------------------------------
-inline void emit_op_modrm_mem(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, x86_memref memref)
+inline void emit_op_modrm_mem(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, x86_memref memref)
{
assert(reg < REG_MAX);
assert(memref.m_base < REG_MAX || memref.m_base == REG_NONE);
@@ -1372,10 +1372,10 @@ inline void emit_op_modrm_mem(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8
emit_byte(emitptr, make_modrm(0, reg, memref.m_base));
// mode 1 for 1-byte offset
- else if ((INT8)memref.m_disp == memref.m_disp)
+ else if ((int8_t)memref.m_disp == memref.m_disp)
{
emit_byte(emitptr, make_modrm(1, reg, memref.m_base));
- emit_byte(emitptr, (INT8)memref.m_disp);
+ emit_byte(emitptr, (int8_t)memref.m_disp);
}
// mode 2 for 4-byte offset
@@ -1412,11 +1412,11 @@ inline void emit_op_modrm_mem(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8
}
// mode 1 for 1-byte offset
- else if ((INT8)memref.m_disp == memref.m_disp)
+ else if ((int8_t)memref.m_disp == memref.m_disp)
{
emit_byte(emitptr, make_modrm(1, reg, 4));
emit_byte(emitptr, make_sib(memref.m_scale, memref.m_index, memref.m_base));
- emit_byte(emitptr, (INT8)memref.m_disp);
+ emit_byte(emitptr, (int8_t)memref.m_disp);
}
// mode 2 for 4-byte offset
@@ -1440,7 +1440,7 @@ inline void emit_op_modrm_mem(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8
// register modrm byte and an 8-bit immediate
//-------------------------------------------------
-inline void emit_op_modrm_reg_imm8(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, UINT8 rm, UINT8 imm)
+inline void emit_op_modrm_reg_imm8(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, uint8_t rm, uint8_t imm)
{
emit_op_modrm_reg(emitptr, op, opsize, reg, rm);
emit_byte(emitptr, imm);
@@ -1452,7 +1452,7 @@ inline void emit_op_modrm_reg_imm8(x86code *&emitptr, UINT32 op, UINT8 opsize, U
// memory modrm byte and an 8-bit immediate
//-------------------------------------------------
-inline void emit_op_modrm_mem_imm8(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, x86_memref memref, UINT8 imm)
+inline void emit_op_modrm_mem_imm8(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, x86_memref memref, uint8_t imm)
{
emit_op_modrm_mem(emitptr, op, opsize, reg, memref);
emit_byte(emitptr, imm);
@@ -1464,7 +1464,7 @@ inline void emit_op_modrm_mem_imm8(x86code *&emitptr, UINT32 op, UINT8 opsize, U
// register modrm byte and a 16-bit immediate
//-------------------------------------------------
-inline void emit_op_modrm_reg_imm16(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, UINT8 rm, UINT16 imm)
+inline void emit_op_modrm_reg_imm16(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, uint8_t rm, uint16_t imm)
{
emit_op_modrm_reg(emitptr, op, opsize, reg, rm);
emit_word(emitptr, imm);
@@ -1476,7 +1476,7 @@ inline void emit_op_modrm_reg_imm16(x86code *&emitptr, UINT32 op, UINT8 opsize,
// memory modrm byte and a 16-bit immediate
//-------------------------------------------------
-inline void emit_op_modrm_mem_imm16(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, x86_memref memref, UINT16 imm)
+inline void emit_op_modrm_mem_imm16(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, x86_memref memref, uint16_t imm)
{
emit_op_modrm_mem(emitptr, op, opsize, reg, memref);
emit_word(emitptr, imm);
@@ -1489,9 +1489,9 @@ inline void emit_op_modrm_mem_imm16(x86code *&emitptr, UINT32 op, UINT8 opsize,
// immediate
//-------------------------------------------------
-inline void emit_op_modrm_reg_imm816(x86code *&emitptr, UINT32 op8, UINT32 op16, UINT8 opsize, UINT8 reg, UINT8 rm, UINT16 imm)
+inline void emit_op_modrm_reg_imm816(x86code *&emitptr, uint32_t op8, uint32_t op16, uint8_t opsize, uint8_t reg, uint8_t rm, uint16_t imm)
{
- if ((INT8)imm == (INT16)imm)
+ if ((int8_t)imm == (int16_t)imm)
{
emit_op_modrm_reg(emitptr, op8, opsize, reg, rm);
emit_byte(emitptr, imm);
@@ -1510,9 +1510,9 @@ inline void emit_op_modrm_reg_imm816(x86code *&emitptr, UINT32 op8, UINT32 op16,
// immediate
//-------------------------------------------------
-inline void emit_op_modrm_mem_imm816(x86code *&emitptr, UINT32 op8, UINT32 op16, UINT8 opsize, UINT8 reg, x86_memref memref, UINT16 imm)
+inline void emit_op_modrm_mem_imm816(x86code *&emitptr, uint32_t op8, uint32_t op16, uint8_t opsize, uint8_t reg, x86_memref memref, uint16_t imm)
{
- if ((INT8)imm == (INT16)imm)
+ if ((int8_t)imm == (int16_t)imm)
{
emit_op_modrm_mem(emitptr, op8, opsize, reg, memref);
emit_byte(emitptr, imm);
@@ -1530,7 +1530,7 @@ inline void emit_op_modrm_mem_imm816(x86code *&emitptr, UINT32 op8, UINT32 op16,
// register modrm byte and a 32-bit immediate
//-------------------------------------------------
-inline void emit_op_modrm_reg_imm32(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, UINT8 rm, UINT32 imm)
+inline void emit_op_modrm_reg_imm32(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, uint8_t rm, uint32_t imm)
{
emit_op_modrm_reg(emitptr, op, opsize, reg, rm);
emit_dword(emitptr, imm);
@@ -1542,7 +1542,7 @@ inline void emit_op_modrm_reg_imm32(x86code *&emitptr, UINT32 op, UINT8 opsize,
// memory modrm byte and a 32-bit immediate
//-------------------------------------------------
-inline void emit_op_modrm_mem_imm32(x86code *&emitptr, UINT32 op, UINT8 opsize, UINT8 reg, x86_memref memref, UINT32 imm)
+inline void emit_op_modrm_mem_imm32(x86code *&emitptr, uint32_t op, uint8_t opsize, uint8_t reg, x86_memref memref, uint32_t imm)
{
emit_op_modrm_mem(emitptr, op, opsize, reg, memref);
emit_dword(emitptr, imm);
@@ -1555,9 +1555,9 @@ inline void emit_op_modrm_mem_imm32(x86code *&emitptr, UINT32 op, UINT8 opsize,
// immediate
//-------------------------------------------------
-inline void emit_op_modrm_reg_imm832(x86code *&emitptr, UINT32 op8, UINT32 op32, UINT8 opsize, UINT8 reg, UINT8 rm, UINT32 imm)
+inline void emit_op_modrm_reg_imm832(x86code *&emitptr, uint32_t op8, uint32_t op32, uint8_t opsize, uint8_t reg, uint8_t rm, uint32_t imm)
{
- if ((INT8)imm == (INT32)imm)
+ if ((int8_t)imm == (int32_t)imm)
{
emit_op_modrm_reg(emitptr, op8, opsize, reg, rm);
emit_byte(emitptr, imm);
@@ -1576,9 +1576,9 @@ inline void emit_op_modrm_reg_imm832(x86code *&emitptr, UINT32 op8, UINT32 op32,
// immediate
//-------------------------------------------------
-inline void emit_op_modrm_mem_imm832(x86code *&emitptr, UINT32 op8, UINT32 op32, UINT8 opsize, UINT8 reg, x86_memref memref, UINT32 imm)
+inline void emit_op_modrm_mem_imm832(x86code *&emitptr, uint32_t op8, uint32_t op32, uint8_t opsize, uint8_t reg, x86_memref memref, uint32_t imm)
{
- if ((INT8)imm == (INT32)imm)
+ if ((int8_t)imm == (int32_t)imm)
{
emit_op_modrm_mem(emitptr, op8, opsize, reg, memref);
emit_byte(emitptr, imm);
@@ -1631,21 +1631,21 @@ inline void emit_cqo(x86code *&emitptr) { emit_op_simple(emitptr, OP_CQO, OP_
inline void resolve_link(x86code *&destptr, const emit_link &linkinfo)
{
- INT64 delta = destptr - linkinfo.target;
+ int64_t delta = destptr - linkinfo.target;
if (linkinfo.size == 1)
{
- assert((INT8)delta == delta);
- ((INT8 *)linkinfo.target)[-1] = (INT8)delta;
+ assert((int8_t)delta == delta);
+ ((int8_t *)linkinfo.target)[-1] = (int8_t)delta;
}
else if (linkinfo.size == 2)
{
- assert((INT16)delta == delta);
- ((INT16 *)linkinfo.target)[-1] = (INT16)delta;
+ assert((int16_t)delta == delta);
+ ((int16_t *)linkinfo.target)[-1] = (int16_t)delta;
}
else
{
- assert((INT32)delta == delta);
- ((INT32 *)linkinfo.target)[-1] = (INT32)delta;
+ assert((int32_t)delta == delta);
+ ((int32_t *)linkinfo.target)[-1] = (int32_t)delta;
}
}
@@ -1692,10 +1692,10 @@ inline void emit_jmp_near_link(x86code *&emitptr, emit_link &linkinfo)
inline void emit_jmp(x86code *&emitptr, x86code *target)
{
- INT32 delta = target - (emitptr + 2);
+ int32_t delta = target - (emitptr + 2);
emit_link link;
- if ((INT8)delta == delta)
+ if ((int8_t)delta == delta)
emit_jmp_short_link(emitptr, link);
else
emit_jmp_near_link(emitptr, link);
@@ -1707,7 +1707,7 @@ inline void emit_jmp(x86code *&emitptr, x86code *target)
// emit_jcc_*
//-------------------------------------------------
-inline void emit_jcc_short_link(x86code *&emitptr, UINT8 cond, emit_link &linkinfo)
+inline void emit_jcc_short_link(x86code *&emitptr, uint8_t cond, emit_link &linkinfo)
{
emit_op_simple(emitptr, OP_JCC_O_Jb + cond, OP_32BIT);
emit_byte(emitptr, 0);
@@ -1715,7 +1715,7 @@ inline void emit_jcc_short_link(x86code *&emitptr, UINT8 cond, emit_link &linkin
linkinfo.size = 1;
}
-inline void emit_jcc_near_link(x86code *&emitptr, UINT8 cond, emit_link &linkinfo)
+inline void emit_jcc_near_link(x86code *&emitptr, uint8_t cond, emit_link &linkinfo)
{
emit_op_simple(emitptr, OP_JCC_O_Jv + cond, OP_32BIT);
emit_dword(emitptr, 0);
@@ -1723,12 +1723,12 @@ inline void emit_jcc_near_link(x86code *&emitptr, UINT8 cond, emit_link &linkinf
linkinfo.size = 4;
}
-inline void emit_jcc(x86code *&emitptr, UINT8 cond, x86code *target)
+inline void emit_jcc(x86code *&emitptr, uint8_t cond, x86code *target)
{
- INT32 delta = emitptr + 2 - target;
+ int32_t delta = emitptr + 2 - target;
emit_link link;
- if ((INT8)delta == delta)
+ if ((int8_t)delta == delta)
emit_jcc_short_link(emitptr, cond, link);
else
emit_jcc_near_link(emitptr, cond, link);
@@ -1780,14 +1780,14 @@ inline void emit_jrcxz(x86code *&emitptr, x86code *target)
//-------------------------------------------------
#if (X86EMIT_SIZE == 32)
-inline void emit_call_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 2, dreg); }
+inline void emit_call_r32(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 2, dreg); }
inline void emit_call_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 2, memref); }
-inline void emit_jmp_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 4, dreg); }
+inline void emit_jmp_r32(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 4, dreg); }
inline void emit_jmp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 4, memref); }
#else
-inline void emit_call_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 2, dreg); }
+inline void emit_call_r64(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 2, dreg); }
inline void emit_call_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 2, memref); }
-inline void emit_jmp_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 4, dreg); }
+inline void emit_jmp_r64(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 4, dreg); }
inline void emit_jmp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 4, memref); }
#endif
@@ -1796,7 +1796,7 @@ inline void emit_jmp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_
// emit_ret_*
//-------------------------------------------------
-inline void emit_ret_imm(x86code *&emitptr, UINT16 imm)
+inline void emit_ret_imm(x86code *&emitptr, uint16_t imm)
{
emit_op_simple(emitptr, OP_RETN_Iw, OP_32BIT);
emit_word(emitptr, imm);
@@ -1808,12 +1808,12 @@ inline void emit_ret_imm(x86code *&emitptr, UINT16 imm)
// PUSH/POP EMITTERS
//**************************************************************************
-inline void emit_push_imm(x86code *&emitptr, INT32 imm)
+inline void emit_push_imm(x86code *&emitptr, int32_t imm)
{
- if ((INT8)imm == imm)
+ if ((int8_t)imm == imm)
{
emit_op_simple(emitptr, OP_PUSH_Ib, OP_32BIT);
- emit_byte(emitptr, (INT8)imm);
+ emit_byte(emitptr, (int8_t)imm);
}
else
{
@@ -1824,16 +1824,16 @@ inline void emit_push_imm(x86code *&emitptr, INT32 imm)
#if (X86EMIT_SIZE == 32)
-inline void emit_push_r32(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); }
+inline void emit_push_r32(x86code *&emitptr, uint8_t reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); }
inline void emit_push_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 6, memref); }
-inline void emit_pop_r32(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); }
+inline void emit_pop_r32(x86code *&emitptr, uint8_t reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); }
inline void emit_pop_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G1A_Ev, OP_32BIT, 0, memref); }
#else
-inline void emit_push_r64(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); }
+inline void emit_push_r64(x86code *&emitptr, uint8_t reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); }
inline void emit_push_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 6, memref); }
-inline void emit_pop_r64(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); }
+inline void emit_pop_r64(x86code *&emitptr, uint8_t reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); }
inline void emit_pop_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G1A_Ev, OP_32BIT, 0, memref); }
#endif
@@ -1848,23 +1848,23 @@ inline void emit_pop_m64(x86code *&emitptr, x86_memref memref)
// emit_mov_r8_*
//-------------------------------------------------
-inline void emit_mov_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm)
+inline void emit_mov_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm)
{
emit_op_reg(emitptr, OP_MOV_AL_Ib | (dreg & 7), OP_32BIT, dreg);
emit_byte(emitptr, imm);
}
-inline void emit_mov_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_mov_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_mov_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Eb_Gb, OP_32BIT, sreg, memref); }
-inline void emit_mov_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G11_Eb_Ib, OP_32BIT, 0, memref, imm); }
+inline void emit_mov_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_mov_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_mov_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Eb_Gb, OP_32BIT, sreg, memref); }
+inline void emit_mov_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G11_Eb_Ib, OP_32BIT, 0, memref, imm); }
//-------------------------------------------------
// emit_xchg_r8_*
//-------------------------------------------------
-inline void emit_xchg_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
+inline void emit_xchg_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg)
{
if (dreg == REG_EAX)
emit_op_reg(emitptr, OP_NOP | (sreg & 7), OP_32BIT, sreg);
@@ -1879,29 +1879,29 @@ inline void emit_xchg_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
// emit_mov_r16_*
//-------------------------------------------------
-inline void emit_mov_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm)
+inline void emit_mov_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm)
{
emit_op_reg(emitptr, OP_MOV_rAX_Iv | (dreg & 7), OP_16BIT, dreg);
emit_word(emitptr, imm);
}
-inline void emit_mov_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_mov_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_mov_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm16(emitptr, OP_G11_Ev_Iz, OP_16BIT, 0, memref, imm); }
-inline void emit_mov_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_16BIT, sreg, memref); }
-inline void emit_movsx_r16_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, sreg); }
-inline void emit_movsx_r16_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, memref); }
-inline void emit_movzx_r16_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, sreg); }
-inline void emit_movzx_r16_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, memref); }
-inline void emit_cmovcc_r16_r16(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, sreg); }
-inline void emit_cmovcc_r16_m16(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, memref); }
+inline void emit_mov_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_mov_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_mov_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm16(emitptr, OP_G11_Ev_Iz, OP_16BIT, 0, memref, imm); }
+inline void emit_mov_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_16BIT, sreg, memref); }
+inline void emit_movsx_r16_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, sreg); }
+inline void emit_movsx_r16_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, memref); }
+inline void emit_movzx_r16_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, sreg); }
+inline void emit_movzx_r16_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, memref); }
+inline void emit_cmovcc_r16_r16(x86code *&emitptr, uint8_t cond, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, sreg); }
+inline void emit_cmovcc_r16_m16(x86code *&emitptr, uint8_t cond, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, memref); }
//-------------------------------------------------
// emit_xchg_r16_*
//-------------------------------------------------
-inline void emit_xchg_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
+inline void emit_xchg_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg)
{
if (dreg == REG_EAX)
emit_op_reg(emitptr, OP_NOP | (sreg & 7), OP_16BIT, sreg);
@@ -1916,21 +1916,21 @@ inline void emit_xchg_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
// emit_mov_r32_*
//-------------------------------------------------
-inline void emit_mov_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm)
+inline void emit_mov_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm)
{
emit_op_reg(emitptr, OP_MOV_rAX_Iv | (dreg & 7), OP_32BIT, dreg);
emit_dword(emitptr, imm);
}
-inline void emit_mov_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_mov_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_mov_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G11_Ev_Iz, OP_32BIT, 0, memref, imm); }
-inline void emit_mov_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_32BIT, sreg, memref); }
-inline void emit_movsx_r32_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_movsx_r32_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, memref); }
-inline void emit_movsx_r32_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, sreg); }
-inline void emit_movsx_r32_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, memref); }
-inline void emit_movzx_r32_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
+inline void emit_mov_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_mov_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_mov_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm32(emitptr, OP_G11_Ev_Iz, OP_32BIT, 0, memref, imm); }
+inline void emit_mov_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_32BIT, sreg, memref); }
+inline void emit_movsx_r32_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_movsx_r32_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, memref); }
+inline void emit_movsx_r32_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, sreg); }
+inline void emit_movsx_r32_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, memref); }
+inline void emit_movzx_r32_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg)
{
#if (X86EMIT_SIZE == 32)
if (sreg >= 4)
@@ -1942,18 +1942,18 @@ inline void emit_movzx_r32_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
#endif
emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, sreg);
}
-inline void emit_movzx_r32_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, memref); }
-inline void emit_movzx_r32_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, sreg); }
-inline void emit_movzx_r32_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, memref); }
-inline void emit_cmovcc_r32_r32(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_32BIT, dreg, sreg); }
-inline void emit_cmovcc_r32_m32(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_32BIT, dreg, memref); }
+inline void emit_movzx_r32_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, memref); }
+inline void emit_movzx_r32_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, sreg); }
+inline void emit_movzx_r32_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, memref); }
+inline void emit_cmovcc_r32_r32(x86code *&emitptr, uint8_t cond, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_32BIT, dreg, sreg); }
+inline void emit_cmovcc_r32_m32(x86code *&emitptr, uint8_t cond, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_32BIT, dreg, memref); }
//-------------------------------------------------
// emit_xchg_r32_*
//-------------------------------------------------
-inline void emit_xchg_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
+inline void emit_xchg_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg)
{
if (dreg == REG_EAX)
emit_op_reg(emitptr, OP_NOP | (sreg & 7), OP_32BIT, sreg);
@@ -1970,14 +1970,14 @@ inline void emit_xchg_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
#if (X86EMIT_SIZE == 64)
-inline void emit_mov_r64_imm(x86code *&emitptr, UINT8 dreg, UINT64 imm)
+inline void emit_mov_r64_imm(x86code *&emitptr, uint8_t dreg, uint64_t imm)
{
- if ((UINT32)imm == imm)
+ if ((uint32_t)imm == imm)
{
emit_op_reg(emitptr, OP_MOV_rAX_Iv | (dreg & 7), OP_32BIT, dreg);
emit_dword(emitptr, imm);
}
- else if ((INT32)imm == imm)
+ else if ((int32_t)imm == imm)
emit_op_modrm_reg_imm32(emitptr, OP_G11_Ev_Iz, OP_64BIT, 0, dreg, imm);
else
{
@@ -1986,29 +1986,29 @@ inline void emit_mov_r64_imm(x86code *&emitptr, UINT8 dreg, UINT64 imm)
}
}
-inline void emit_mov_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_mov_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_mov_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G11_Ev_Iz, OP_64BIT, 0, memref, imm); }
-inline void emit_mov_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_64BIT, sreg, memref); }
-inline void emit_movsx_r64_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_64BIT, dreg, sreg); }
-inline void emit_movsx_r64_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_64BIT, dreg, memref); }
-inline void emit_movsx_r64_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_64BIT, dreg, sreg); }
-inline void emit_movsx_r64_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_64BIT, dreg, memref); }
-inline void emit_movsxd_r64_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSXD_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_movsxd_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSXD_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_movzx_r64_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, sreg); }
-inline void emit_movzx_r64_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, memref); }
-inline void emit_movzx_r64_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, sreg); }
-inline void emit_movzx_r64_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, memref); }
-inline void emit_cmovcc_r64_r64(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, sreg); }
-inline void emit_cmovcc_r64_m64(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, memref); }
+inline void emit_mov_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_mov_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_mov_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm32(emitptr, OP_G11_Ev_Iz, OP_64BIT, 0, memref, imm); }
+inline void emit_mov_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_64BIT, sreg, memref); }
+inline void emit_movsx_r64_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_64BIT, dreg, sreg); }
+inline void emit_movsx_r64_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_64BIT, dreg, memref); }
+inline void emit_movsx_r64_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_64BIT, dreg, sreg); }
+inline void emit_movsx_r64_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_64BIT, dreg, memref); }
+inline void emit_movsxd_r64_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVSXD_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_movsxd_r64_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSXD_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_movzx_r64_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, sreg); }
+inline void emit_movzx_r64_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, memref); }
+inline void emit_movzx_r64_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, sreg); }
+inline void emit_movzx_r64_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, memref); }
+inline void emit_cmovcc_r64_r64(x86code *&emitptr, uint8_t cond, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, sreg); }
+inline void emit_cmovcc_r64_m64(x86code *&emitptr, uint8_t cond, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, memref); }
//-------------------------------------------------
// emit_xchg_r64_*
//-------------------------------------------------
-inline void emit_xchg_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
+inline void emit_xchg_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg)
{
if (dreg == REG_EAX)
emit_op_reg(emitptr, OP_NOP | (sreg & 7), OP_64BIT, sreg);
@@ -2029,174 +2029,174 @@ inline void emit_xchg_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
// emit_arith_r8_*
//-------------------------------------------------
-inline void emit_add_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, dreg, imm); }
-inline void emit_add_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, memref, imm); }
-inline void emit_add_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_add_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_add_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_or_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, dreg, imm); }
-inline void emit_or_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, memref, imm); }
-inline void emit_or_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_or_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_or_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_adc_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, dreg, imm); }
-inline void emit_adc_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, memref, imm); }
-inline void emit_adc_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_adc_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_adc_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_sbb_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, dreg, imm); }
-inline void emit_sbb_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, memref, imm); }
-inline void emit_sbb_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_sbb_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_sbb_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_and_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, dreg, imm); }
-inline void emit_and_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, memref, imm); }
-inline void emit_and_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_and_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_and_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_sub_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, dreg, imm); }
-inline void emit_sub_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, memref, imm); }
-inline void emit_sub_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_sub_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_sub_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_xor_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, dreg, imm); }
-inline void emit_xor_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, memref, imm); }
-inline void emit_xor_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_xor_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_xor_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_cmp_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, dreg, imm); }
-inline void emit_cmp_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, memref, imm); }
-inline void emit_cmp_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_cmp_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_cmp_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_test_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, dreg, imm); }
-inline void emit_test_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, memref, imm); }
-inline void emit_test_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Eb_Gb, OP_32BIT, sreg, dreg); }
-inline void emit_test_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Eb_Gb, OP_32BIT, sreg, memref); }
+inline void emit_add_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, dreg, imm); }
+inline void emit_add_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, memref, imm); }
+inline void emit_add_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_add_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_add_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_or_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, dreg, imm); }
+inline void emit_or_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, memref, imm); }
+inline void emit_or_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_or_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_or_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_OR_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_adc_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, dreg, imm); }
+inline void emit_adc_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, memref, imm); }
+inline void emit_adc_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_adc_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_adc_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_sbb_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, dreg, imm); }
+inline void emit_sbb_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, memref, imm); }
+inline void emit_sbb_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_sbb_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_sbb_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_and_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, dreg, imm); }
+inline void emit_and_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, memref, imm); }
+inline void emit_and_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_and_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_and_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_AND_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_sub_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, dreg, imm); }
+inline void emit_sub_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, memref, imm); }
+inline void emit_sub_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_sub_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_sub_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_xor_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, dreg, imm); }
+inline void emit_xor_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, memref, imm); }
+inline void emit_xor_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_xor_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_xor_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_cmp_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, dreg, imm); }
+inline void emit_cmp_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, memref, imm); }
+inline void emit_cmp_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_cmp_r8_m8(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_cmp_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_test_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, dreg, imm); }
+inline void emit_test_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, memref, imm); }
+inline void emit_test_r8_r8(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Eb_Gb, OP_32BIT, sreg, dreg); }
+inline void emit_test_m8_r8(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Eb_Gb, OP_32BIT, sreg, memref); }
//-------------------------------------------------
// emit_arith_r16_*
//-------------------------------------------------
-inline void emit_add_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, dreg, imm); }
-inline void emit_add_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, memref, imm); }
-inline void emit_add_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_add_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_add_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_or_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, dreg, imm); }
-inline void emit_or_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, memref, imm); }
-inline void emit_or_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_or_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_or_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_adc_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, dreg, imm); }
-inline void emit_adc_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, memref, imm); }
-inline void emit_adc_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_adc_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_adc_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_sbb_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, dreg, imm); }
-inline void emit_sbb_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, memref, imm); }
-inline void emit_sbb_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_sbb_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_sbb_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_and_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, dreg, imm); }
-inline void emit_and_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, memref, imm); }
-inline void emit_and_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_and_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_and_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_sub_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, dreg, imm); }
-inline void emit_sub_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, memref, imm); }
-inline void emit_sub_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_sub_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_sub_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_xor_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, dreg, imm); }
-inline void emit_xor_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, memref, imm); }
-inline void emit_xor_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_xor_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_xor_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_cmp_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, dreg, imm); }
-inline void emit_cmp_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, memref, imm); }
-inline void emit_cmp_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_cmp_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_cmp_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_test_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, dreg, imm); }
-inline void emit_test_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, memref, imm); }
-inline void emit_test_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_16BIT, sreg, dreg); }
-inline void emit_test_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_16BIT, sreg, memref); }
+inline void emit_add_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, dreg, imm); }
+inline void emit_add_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, memref, imm); }
+inline void emit_add_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_add_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_add_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_or_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, dreg, imm); }
+inline void emit_or_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, memref, imm); }
+inline void emit_or_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_or_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_or_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_adc_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, dreg, imm); }
+inline void emit_adc_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, memref, imm); }
+inline void emit_adc_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_adc_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_adc_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_sbb_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, dreg, imm); }
+inline void emit_sbb_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, memref, imm); }
+inline void emit_sbb_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_sbb_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_sbb_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_and_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, dreg, imm); }
+inline void emit_and_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, memref, imm); }
+inline void emit_and_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_and_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_and_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_sub_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, dreg, imm); }
+inline void emit_sub_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, memref, imm); }
+inline void emit_sub_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_sub_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_sub_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_xor_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, dreg, imm); }
+inline void emit_xor_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, memref, imm); }
+inline void emit_xor_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_xor_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_xor_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_cmp_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, dreg, imm); }
+inline void emit_cmp_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, memref, imm); }
+inline void emit_cmp_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_cmp_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_cmp_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_test_r16_imm(x86code *&emitptr, uint8_t dreg, uint16_t imm) { emit_op_modrm_reg_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, dreg, imm); }
+inline void emit_test_m16_imm(x86code *&emitptr, x86_memref memref, uint16_t imm) { emit_op_modrm_mem_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, memref, imm); }
+inline void emit_test_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_16BIT, sreg, dreg); }
+inline void emit_test_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_16BIT, sreg, memref); }
//-------------------------------------------------
// emit_arith_r32_*
//-------------------------------------------------
-inline void emit_add_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, dreg, imm); }
-inline void emit_add_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, memref, imm); }
-inline void emit_add_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_add_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_add_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_or_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, dreg, imm); }
-inline void emit_or_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, memref, imm); }
-inline void emit_or_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_or_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_or_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_adc_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, dreg, imm); }
-inline void emit_adc_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, memref, imm); }
-inline void emit_adc_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_adc_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_adc_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_sbb_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, dreg, imm); }
-inline void emit_sbb_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, memref, imm); }
-inline void emit_sbb_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_sbb_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_sbb_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_and_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, imm); }
-inline void emit_and_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, memref, imm); }
-inline void emit_and_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_and_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_and_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_sub_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, dreg, imm); }
-inline void emit_sub_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, memref, imm); }
-inline void emit_sub_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_sub_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_sub_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_xor_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, dreg, imm); }
-inline void emit_xor_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, memref, imm); }
-inline void emit_xor_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_xor_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_xor_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_cmp_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, dreg, imm); }
-inline void emit_cmp_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, memref, imm); }
-inline void emit_cmp_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_cmp_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_cmp_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_test_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, dreg, imm); }
-inline void emit_test_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, memref, imm); }
-inline void emit_test_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_32BIT, sreg, dreg); }
-inline void emit_test_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_32BIT, sreg, memref); }
+inline void emit_add_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, dreg, imm); }
+inline void emit_add_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, memref, imm); }
+inline void emit_add_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_add_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_add_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_or_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, dreg, imm); }
+inline void emit_or_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, memref, imm); }
+inline void emit_or_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_or_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_or_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_adc_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, dreg, imm); }
+inline void emit_adc_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, memref, imm); }
+inline void emit_adc_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_adc_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_adc_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_sbb_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, dreg, imm); }
+inline void emit_sbb_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, memref, imm); }
+inline void emit_sbb_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_sbb_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_sbb_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_and_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, imm); }
+inline void emit_and_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, memref, imm); }
+inline void emit_and_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_and_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_and_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_sub_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, dreg, imm); }
+inline void emit_sub_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, memref, imm); }
+inline void emit_sub_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_sub_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_sub_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_xor_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, dreg, imm); }
+inline void emit_xor_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, memref, imm); }
+inline void emit_xor_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_xor_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_xor_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_cmp_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, dreg, imm); }
+inline void emit_cmp_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, memref, imm); }
+inline void emit_cmp_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_cmp_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_cmp_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_test_r32_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, dreg, imm); }
+inline void emit_test_m32_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, memref, imm); }
+inline void emit_test_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_32BIT, sreg, dreg); }
+inline void emit_test_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_32BIT, sreg, memref); }
//-------------------------------------------------
@@ -2205,58 +2205,58 @@ inline void emit_test_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg)
#if (X86EMIT_SIZE == 64)
-inline void emit_add_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, dreg, imm); }
-inline void emit_add_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, memref, imm); }
-inline void emit_add_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_add_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_add_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_or_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, dreg, imm); }
-inline void emit_or_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, memref, imm); }
-inline void emit_or_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_or_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_or_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_adc_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, dreg, imm); }
-inline void emit_adc_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, memref, imm); }
-inline void emit_adc_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_adc_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_adc_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_sbb_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, dreg, imm); }
-inline void emit_sbb_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, memref, imm); }
-inline void emit_sbb_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_sbb_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_sbb_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_and_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, dreg, imm); }
-inline void emit_and_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, memref, imm); }
-inline void emit_and_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_and_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_and_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_sub_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, dreg, imm); }
-inline void emit_sub_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, memref, imm); }
-inline void emit_sub_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_sub_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_sub_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_xor_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, dreg, imm); }
-inline void emit_xor_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, memref, imm); }
-inline void emit_xor_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_xor_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_xor_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_cmp_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, dreg, imm); }
-inline void emit_cmp_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, memref, imm); }
-inline void emit_cmp_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_cmp_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_cmp_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_test_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, dreg, imm); }
-inline void emit_test_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, memref, imm); }
-inline void emit_test_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_64BIT, sreg, dreg); }
-inline void emit_test_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_64BIT, sreg, memref); }
+inline void emit_add_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, dreg, imm); }
+inline void emit_add_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, memref, imm); }
+inline void emit_add_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_add_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_add_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_or_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, dreg, imm); }
+inline void emit_or_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, memref, imm); }
+inline void emit_or_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_or_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_or_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_adc_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, dreg, imm); }
+inline void emit_adc_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, memref, imm); }
+inline void emit_adc_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_adc_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_adc_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_sbb_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, dreg, imm); }
+inline void emit_sbb_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, memref, imm); }
+inline void emit_sbb_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_sbb_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_sbb_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_and_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, dreg, imm); }
+inline void emit_and_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, memref, imm); }
+inline void emit_and_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_and_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_and_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_sub_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, dreg, imm); }
+inline void emit_sub_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, memref, imm); }
+inline void emit_sub_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_sub_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_sub_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_xor_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, dreg, imm); }
+inline void emit_xor_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, memref, imm); }
+inline void emit_xor_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_xor_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_xor_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_cmp_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, dreg, imm); }
+inline void emit_cmp_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, memref, imm); }
+inline void emit_cmp_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_cmp_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_cmp_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_test_r64_imm(x86code *&emitptr, uint8_t dreg, uint32_t imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, dreg, imm); }
+inline void emit_test_m64_imm(x86code *&emitptr, x86_memref memref, uint32_t imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, memref, imm); }
+inline void emit_test_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_64BIT, sreg, dreg); }
+inline void emit_test_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_64BIT, sreg, memref); }
#endif
@@ -2270,7 +2270,7 @@ inline void emit_test_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg)
// emit_shift_reg_imm
//-------------------------------------------------
-inline void emit_shift_reg_imm(x86code *&emitptr, UINT32 op1, UINT32 opn, UINT8 opsize, UINT8 opindex, UINT8 dreg, UINT8 imm)
+inline void emit_shift_reg_imm(x86code *&emitptr, uint32_t op1, uint32_t opn, uint8_t opsize, uint8_t opindex, uint8_t dreg, uint8_t imm)
{
if (imm == 1)
emit_op_modrm_reg(emitptr, op1, opsize, opindex, dreg);
@@ -2278,7 +2278,7 @@ inline void emit_shift_reg_imm(x86code *&emitptr, UINT32 op1, UINT32 opn, UINT8
emit_op_modrm_reg_imm8(emitptr, opn, opsize, opindex, dreg, imm);
}
-inline void emit_shift_mem_imm(x86code *&emitptr, UINT32 op1, UINT32 opn, UINT8 opsize, UINT8 opindex, x86_memref memref, UINT8 imm)
+inline void emit_shift_mem_imm(x86code *&emitptr, uint32_t op1, uint32_t opn, uint8_t opsize, uint8_t opindex, x86_memref memref, uint8_t imm)
{
if (imm == 1)
emit_op_modrm_mem(emitptr, op1, opsize, opindex, memref);
@@ -2291,39 +2291,39 @@ inline void emit_shift_mem_imm(x86code *&emitptr, UINT32 op1, UINT32 opn, UINT8
// emit_shift_r8_*
//-------------------------------------------------
-inline void emit_rol_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, dreg, imm); }
-inline void emit_rol_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, memref, imm); }
-inline void emit_rol_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, dreg); }
+inline void emit_rol_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, dreg, imm); }
+inline void emit_rol_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, memref, imm); }
+inline void emit_rol_r8_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, dreg); }
inline void emit_rol_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, memref); }
-inline void emit_ror_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, dreg, imm); }
-inline void emit_ror_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, memref, imm); }
-inline void emit_ror_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, dreg); }
+inline void emit_ror_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, dreg, imm); }
+inline void emit_ror_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, memref, imm); }
+inline void emit_ror_r8_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, dreg); }
inline void emit_ror_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, memref); }
-inline void emit_rcl_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, dreg, imm); }
-inline void emit_rcl_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, memref, imm); }
-inline void emit_rcl_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, dreg); }
+inline void emit_rcl_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, dreg, imm); }
+inline void emit_rcl_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, memref, imm); }
+inline void emit_rcl_r8_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, dreg); }
inline void emit_rcl_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, memref); }
-inline void emit_rcr_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, dreg, imm); }
-inline void emit_rcr_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, memref, imm); }
-inline void emit_rcr_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, dreg); }
+inline void emit_rcr_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, dreg, imm); }
+inline void emit_rcr_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, memref, imm); }
+inline void emit_rcr_r8_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, dreg); }
inline void emit_rcr_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, memref); }
-inline void emit_shl_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, dreg, imm); }
-inline void emit_shl_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, memref, imm); }
-inline void emit_shl_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, dreg); }
+inline void emit_shl_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, dreg, imm); }
+inline void emit_shl_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, memref, imm); }
+inline void emit_shl_r8_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, dreg); }
inline void emit_shl_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, memref); }
-inline void emit_shr_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, dreg, imm); }
-inline void emit_shr_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, memref, imm); }
-inline void emit_shr_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, dreg); }
+inline void emit_shr_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, dreg, imm); }
+inline void emit_shr_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, memref, imm); }
+inline void emit_shr_r8_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, dreg); }
inline void emit_shr_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, memref); }
-inline void emit_sar_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, dreg, imm); }
-inline void emit_sar_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, memref, imm); }
-inline void emit_sar_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, dreg); }
+inline void emit_sar_r8_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, dreg, imm); }
+inline void emit_sar_m8_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, memref, imm); }
+inline void emit_sar_r8_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, dreg); }
inline void emit_sar_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, memref); }
@@ -2331,39 +2331,39 @@ inline void emit_sar_m8_cl(x86code *&emitptr, x86_memref memref)
// emit_shift_r16_*
//-------------------------------------------------
-inline void emit_rol_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, dreg, imm); }
-inline void emit_rol_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, memref, imm); }
-inline void emit_rol_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, dreg); }
+inline void emit_rol_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, dreg, imm); }
+inline void emit_rol_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, memref, imm); }
+inline void emit_rol_r16_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, dreg); }
inline void emit_rol_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, memref); }
-inline void emit_ror_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, dreg, imm); }
-inline void emit_ror_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, memref, imm); }
-inline void emit_ror_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, dreg); }
+inline void emit_ror_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, dreg, imm); }
+inline void emit_ror_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, memref, imm); }
+inline void emit_ror_r16_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, dreg); }
inline void emit_ror_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, memref); }
-inline void emit_rcl_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, dreg, imm); }
-inline void emit_rcl_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, memref, imm); }
-inline void emit_rcl_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, dreg); }
+inline void emit_rcl_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, dreg, imm); }
+inline void emit_rcl_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, memref, imm); }
+inline void emit_rcl_r16_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, dreg); }
inline void emit_rcl_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, memref); }
-inline void emit_rcr_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, dreg, imm); }
-inline void emit_rcr_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, memref, imm); }
-inline void emit_rcr_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, dreg); }
+inline void emit_rcr_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, dreg, imm); }
+inline void emit_rcr_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, memref, imm); }
+inline void emit_rcr_r16_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, dreg); }
inline void emit_rcr_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, memref); }
-inline void emit_shl_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, dreg, imm); }
-inline void emit_shl_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, memref, imm); }
-inline void emit_shl_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, dreg); }
+inline void emit_shl_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, dreg, imm); }
+inline void emit_shl_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, memref, imm); }
+inline void emit_shl_r16_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, dreg); }
inline void emit_shl_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, memref); }
-inline void emit_shr_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, dreg, imm); }
-inline void emit_shr_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, memref, imm); }
-inline void emit_shr_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, dreg); }
+inline void emit_shr_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, dreg, imm); }
+inline void emit_shr_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, memref, imm); }
+inline void emit_shr_r16_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, dreg); }
inline void emit_shr_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, memref); }
-inline void emit_sar_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, dreg, imm); }
-inline void emit_sar_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, memref, imm); }
-inline void emit_sar_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, dreg); }
+inline void emit_sar_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, dreg, imm); }
+inline void emit_sar_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, memref, imm); }
+inline void emit_sar_r16_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, dreg); }
inline void emit_sar_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, memref); }
@@ -2371,50 +2371,50 @@ inline void emit_sar_m16_cl(x86code *&emitptr, x86_memref memref)
// emit_shift_r32_*
//-------------------------------------------------
-inline void emit_rol_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, dreg, imm); }
-inline void emit_rol_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, memref, imm); }
-inline void emit_rol_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, dreg); }
+inline void emit_rol_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, dreg, imm); }
+inline void emit_rol_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, memref, imm); }
+inline void emit_rol_r32_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, dreg); }
inline void emit_rol_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, memref); }
-inline void emit_ror_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, dreg, imm); }
-inline void emit_ror_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, memref, imm); }
-inline void emit_ror_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, dreg); }
+inline void emit_ror_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, dreg, imm); }
+inline void emit_ror_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, memref, imm); }
+inline void emit_ror_r32_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, dreg); }
inline void emit_ror_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, memref); }
-inline void emit_rcl_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, dreg, imm); }
-inline void emit_rcl_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, memref, imm); }
-inline void emit_rcl_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, dreg); }
+inline void emit_rcl_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, dreg, imm); }
+inline void emit_rcl_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, memref, imm); }
+inline void emit_rcl_r32_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, dreg); }
inline void emit_rcl_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, memref); }
-inline void emit_rcr_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, dreg, imm); }
-inline void emit_rcr_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, memref, imm); }
-inline void emit_rcr_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, dreg); }
+inline void emit_rcr_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, dreg, imm); }
+inline void emit_rcr_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, memref, imm); }
+inline void emit_rcr_r32_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, dreg); }
inline void emit_rcr_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, memref); }
-inline void emit_shl_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, dreg, imm); }
-inline void emit_shl_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, memref, imm); }
-inline void emit_shl_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, dreg); }
+inline void emit_shl_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, dreg, imm); }
+inline void emit_shl_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, memref, imm); }
+inline void emit_shl_r32_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, dreg); }
inline void emit_shl_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, memref); }
-inline void emit_shr_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, dreg, imm); }
-inline void emit_shr_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, memref, imm); }
-inline void emit_shr_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, dreg); }
+inline void emit_shr_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, dreg, imm); }
+inline void emit_shr_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, memref, imm); }
+inline void emit_shr_r32_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, dreg); }
inline void emit_shr_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, memref); }
-inline void emit_sar_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, dreg, imm); }
-inline void emit_sar_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, memref, imm); }
-inline void emit_sar_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, dreg); }
+inline void emit_sar_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, dreg, imm); }
+inline void emit_sar_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, memref, imm); }
+inline void emit_sar_r32_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, dreg); }
inline void emit_sar_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, memref); }
-inline void emit_shld_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); }
-inline void emit_shld_m32_r32_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, memref, imm); }
-inline void emit_shld_r32_r32_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHLD_Ev_Gv_CL, OP_32BIT, sreg, dreg); }
-inline void emit_shld_m32_r32_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHLD_Ev_Gv_CL, OP_32BIT, sreg, memref); }
+inline void emit_shld_r32_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); }
+inline void emit_shld_m32_r32_imm(x86code *&emitptr, x86_memref memref, uint8_t sreg, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, memref, imm); }
+inline void emit_shld_r32_r32_cl(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SHLD_Ev_Gv_CL, OP_32BIT, sreg, dreg); }
+inline void emit_shld_m32_r32_cl(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SHLD_Ev_Gv_CL, OP_32BIT, sreg, memref); }
-inline void emit_shrd_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); }
-inline void emit_shrd_m32_r32_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_32BIT, sreg, memref, imm); }
-inline void emit_shrd_r32_r32_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHRD_Ev_Gv_CL, OP_32BIT, sreg, dreg); }
-inline void emit_shrd_m32_r32_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHRD_Ev_Gv_CL, OP_32BIT, sreg, memref); }
+inline void emit_shrd_r32_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); }
+inline void emit_shrd_m32_r32_imm(x86code *&emitptr, x86_memref memref, uint8_t sreg, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_32BIT, sreg, memref, imm); }
+inline void emit_shrd_r32_r32_cl(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SHRD_Ev_Gv_CL, OP_32BIT, sreg, dreg); }
+inline void emit_shrd_m32_r32_cl(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SHRD_Ev_Gv_CL, OP_32BIT, sreg, memref); }
//-------------------------------------------------
@@ -2423,50 +2423,50 @@ inline void emit_shrd_m32_r32_cl(x86code *&emitptr, x86_memref memref, UINT8 sre
#if (X86EMIT_SIZE == 64)
-inline void emit_rol_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, dreg, imm); }
-inline void emit_rol_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, memref, imm); }
-inline void emit_rol_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, dreg); }
+inline void emit_rol_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, dreg, imm); }
+inline void emit_rol_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, memref, imm); }
+inline void emit_rol_r64_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, dreg); }
inline void emit_rol_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, memref); }
-inline void emit_ror_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, dreg, imm); }
-inline void emit_ror_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, memref, imm); }
-inline void emit_ror_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, dreg); }
+inline void emit_ror_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, dreg, imm); }
+inline void emit_ror_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, memref, imm); }
+inline void emit_ror_r64_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, dreg); }
inline void emit_ror_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, memref); }
-inline void emit_rcl_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, dreg, imm); }
-inline void emit_rcl_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, memref, imm); }
-inline void emit_rcl_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, dreg); }
+inline void emit_rcl_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, dreg, imm); }
+inline void emit_rcl_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, memref, imm); }
+inline void emit_rcl_r64_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, dreg); }
inline void emit_rcl_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, memref); }
-inline void emit_rcr_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, dreg, imm); }
-inline void emit_rcr_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, memref, imm); }
-inline void emit_rcr_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, dreg); }
+inline void emit_rcr_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, dreg, imm); }
+inline void emit_rcr_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, memref, imm); }
+inline void emit_rcr_r64_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, dreg); }
inline void emit_rcr_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, memref); }
-inline void emit_shl_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, dreg, imm); }
-inline void emit_shl_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, memref, imm); }
-inline void emit_shl_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, dreg); }
+inline void emit_shl_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, dreg, imm); }
+inline void emit_shl_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, memref, imm); }
+inline void emit_shl_r64_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, dreg); }
inline void emit_shl_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, memref); }
-inline void emit_shr_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, dreg, imm); }
-inline void emit_shr_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, memref, imm); }
-inline void emit_shr_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, dreg); }
+inline void emit_shr_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, dreg, imm); }
+inline void emit_shr_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, memref, imm); }
+inline void emit_shr_r64_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, dreg); }
inline void emit_shr_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, memref); }
-inline void emit_sar_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, dreg, imm); }
-inline void emit_sar_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, memref, imm); }
-inline void emit_sar_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, dreg); }
+inline void emit_sar_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, dreg, imm); }
+inline void emit_sar_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, memref, imm); }
+inline void emit_sar_r64_cl(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, dreg); }
inline void emit_sar_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, memref); }
-inline void emit_shld_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); }
-inline void emit_shld_m64_r64_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, memref, imm); }
-inline void emit_shld_r64_r64_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHLD_Ev_Gv_CL, OP_64BIT, sreg, dreg); }
-inline void emit_shld_m64_r64_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHLD_Ev_Gv_CL, OP_64BIT, sreg, memref); }
+inline void emit_shld_r64_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); }
+inline void emit_shld_m64_r64_imm(x86code *&emitptr, x86_memref memref, uint8_t sreg, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, memref, imm); }
+inline void emit_shld_r64_r64_cl(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SHLD_Ev_Gv_CL, OP_64BIT, sreg, dreg); }
+inline void emit_shld_m64_r64_cl(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SHLD_Ev_Gv_CL, OP_64BIT, sreg, memref); }
-inline void emit_shrd_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); }
-inline void emit_shrd_m64_r64_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_64BIT, sreg, memref, imm); }
-inline void emit_shrd_r64_r64_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHRD_Ev_Gv_CL, OP_64BIT, sreg, dreg); }
-inline void emit_shrd_m64_r64_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHRD_Ev_Gv_CL, OP_64BIT, sreg, memref); }
+inline void emit_shrd_r64_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); }
+inline void emit_shrd_m64_r64_imm(x86code *&emitptr, x86_memref memref, uint8_t sreg, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_64BIT, sreg, memref, imm); }
+inline void emit_shrd_r64_r64_cl(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SHRD_Ev_Gv_CL, OP_64BIT, sreg, dreg); }
+inline void emit_shrd_m64_r64_cl(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_SHRD_Ev_Gv_CL, OP_64BIT, sreg, memref); }
#endif
@@ -2480,22 +2480,22 @@ inline void emit_shrd_m64_r64_cl(x86code *&emitptr, x86_memref memref, UINT8 sre
// emit_group3_r8_*
//-------------------------------------------------
-inline void emit_not_r8(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 2, dreg); }
+inline void emit_not_r8(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 2, dreg); }
inline void emit_not_m8(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 2, memref); }
-inline void emit_neg_r8(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 3, dreg); }
+inline void emit_neg_r8(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 3, dreg); }
inline void emit_neg_m8(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 3, memref); }
-inline void emit_mul_r8(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 4, dreg); }
+inline void emit_mul_r8(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 4, dreg); }
inline void emit_mul_m8(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 4, memref); }
-inline void emit_imul_r8(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 5, dreg); }
+inline void emit_imul_r8(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 5, dreg); }
inline void emit_imul_m8(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 5, memref); }
-inline void emit_div_r8(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 6, dreg); }
+inline void emit_div_r8(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 6, dreg); }
inline void emit_div_m8(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 6, memref); }
-inline void emit_idiv_r8(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 7, dreg); }
+inline void emit_idiv_r8(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 7, dreg); }
inline void emit_idiv_m8(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 7, memref); }
@@ -2503,22 +2503,22 @@ inline void emit_idiv_m8(x86code *&emitptr, x86_memref memref) { emit_op_modrm_m
// emit_group3_r16_*
//-------------------------------------------------
-inline void emit_not_r16(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 2, dreg); }
+inline void emit_not_r16(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 2, dreg); }
inline void emit_not_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_16BIT, 2, memref); }
-inline void emit_neg_r16(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 3, dreg); }
+inline void emit_neg_r16(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 3, dreg); }
inline void emit_neg_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_16BIT, 3, memref); }
-inline void emit_mul_r16(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 4, dreg); }
+inline void emit_mul_r16(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 4, dreg); }
inline void emit_mul_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_16BIT, 4, memref); }
-inline void emit_imul_r16(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 5, dreg); }
+inline void emit_imul_r16(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 5, dreg); }
inline void emit_imul_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_16BIT, 5, memref); }
-inline void emit_div_r16(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 6, dreg); }
+inline void emit_div_r16(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 6, dreg); }
inline void emit_div_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_16BIT, 6, memref); }
-inline void emit_idiv_r16(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 7, dreg); }
+inline void emit_idiv_r16(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_16BIT, 7, dreg); }
inline void emit_idiv_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_16BIT, 7, memref); }
@@ -2526,22 +2526,22 @@ inline void emit_idiv_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_
// emit_group3_r32_*
//-------------------------------------------------
-inline void emit_not_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 2, dreg); }
+inline void emit_not_r32(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 2, dreg); }
inline void emit_not_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 2, memref); }
-inline void emit_neg_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 3, dreg); }
+inline void emit_neg_r32(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 3, dreg); }
inline void emit_neg_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 3, memref); }
-inline void emit_mul_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 4, dreg); }
+inline void emit_mul_r32(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 4, dreg); }
inline void emit_mul_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 4, memref); }
-inline void emit_imul_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 5, dreg); }
+inline void emit_imul_r32(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 5, dreg); }
inline void emit_imul_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 5, memref); }
-inline void emit_div_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 6, dreg); }
+inline void emit_div_r32(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 6, dreg); }
inline void emit_div_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 6, memref); }
-inline void emit_idiv_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 7, dreg); }
+inline void emit_idiv_r32(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_32BIT, 7, dreg); }
inline void emit_idiv_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_32BIT, 7, memref); }
@@ -2551,22 +2551,22 @@ inline void emit_idiv_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_
#if (X86EMIT_SIZE == 64)
-inline void emit_not_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 2, dreg); }
+inline void emit_not_r64(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 2, dreg); }
inline void emit_not_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_64BIT, 2, memref); }
-inline void emit_neg_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 3, dreg); }
+inline void emit_neg_r64(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 3, dreg); }
inline void emit_neg_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_64BIT, 3, memref); }
-inline void emit_mul_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 4, dreg); }
+inline void emit_mul_r64(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 4, dreg); }
inline void emit_mul_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_64BIT, 4, memref); }
-inline void emit_imul_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 5, dreg); }
+inline void emit_imul_r64(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 5, dreg); }
inline void emit_imul_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_64BIT, 5, memref); }
-inline void emit_div_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 6, dreg); }
+inline void emit_div_r64(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 6, dreg); }
inline void emit_div_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_64BIT, 6, memref); }
-inline void emit_idiv_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 7, dreg); }
+inline void emit_idiv_r64(x86code *&emitptr, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_G3_Ev, OP_64BIT, 7, dreg); }
inline void emit_idiv_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G3_Ev, OP_64BIT, 7, memref); }
#endif
@@ -2581,22 +2581,22 @@ inline void emit_idiv_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_
// emit_imul_r16_*
//-------------------------------------------------
-inline void emit_imul_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_imul_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_imul_r16_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_16BIT, dreg, sreg, imm); }
-inline void emit_imul_r16_m16_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_16BIT, dreg, memref, imm); }
+inline void emit_imul_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_imul_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_imul_r16_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, int16_t imm) { emit_op_modrm_reg_imm816(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_16BIT, dreg, sreg, imm); }
+inline void emit_imul_r16_m16_imm(x86code *&emitptr, uint8_t dreg, x86_memref memref, int16_t imm) { emit_op_modrm_mem_imm816(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_16BIT, dreg, memref, imm); }
-inline void emit_imul_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_imul_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_imul_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_32BIT, dreg, sreg, imm); }
-inline void emit_imul_r32_m32_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_32BIT, dreg, memref, imm); }
+inline void emit_imul_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_imul_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_imul_r32_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, int32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_32BIT, dreg, sreg, imm); }
+inline void emit_imul_r32_m32_imm(x86code *&emitptr, uint8_t dreg, x86_memref memref, int32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_32BIT, dreg, memref, imm); }
#if (X86EMIT_SIZE == 64)
-inline void emit_imul_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_imul_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_imul_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_64BIT, dreg, sreg, imm); }
-inline void emit_imul_r64_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_64BIT, dreg, memref, imm); }
+inline void emit_imul_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_imul_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_imul_r64_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, int32_t imm) { emit_op_modrm_reg_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_64BIT, dreg, sreg, imm); }
+inline void emit_imul_r64_m64_imm(x86code *&emitptr, uint8_t dreg, x86_memref memref, int32_t imm) { emit_op_modrm_mem_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_64BIT, dreg, memref, imm); }
#endif
@@ -2610,29 +2610,29 @@ inline void emit_imul_r64_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref memr
// emit_bswap_*
//-------------------------------------------------
-inline void emit_bswap_r32(x86code *&emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_32BIT, dreg); }
-inline void emit_bswap_r64(x86code *&emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_64BIT, dreg); }
+inline void emit_bswap_r32(x86code *&emitptr, uint8_t dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_32BIT, dreg); }
+inline void emit_bswap_r64(x86code *&emitptr, uint8_t dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_64BIT, dreg); }
//-------------------------------------------------
// emit_bsr/bsf_r16_*
//-------------------------------------------------
-inline void emit_bsf_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_bsf_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_bsr_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_bsr_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_bsf_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_bsf_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_bsr_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_bsr_r16_m16(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_bsf_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_bsf_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_bsr_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_bsr_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_bsf_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_bsf_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_bsr_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_bsr_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_bsf_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_bsf_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_bsr_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_bsr_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_bsf_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_bsf_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_bsr_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_bsr_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_64BIT, dreg, memref); }
#endif
@@ -2640,50 +2640,50 @@ inline void emit_bsr_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref)
// emit_bit_r16_*
//-------------------------------------------------
-inline void emit_bt_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BT_Ev_Gv, OP_16BIT, sreg, dreg); }
-inline void emit_bt_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BT_Ev_Gv, OP_16BIT, sreg, memref); }
-inline void emit_bt_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 4, dreg, imm); }
-inline void emit_bt_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 4, memref, imm); }
+inline void emit_bt_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BT_Ev_Gv, OP_16BIT, sreg, dreg); }
+inline void emit_bt_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BT_Ev_Gv, OP_16BIT, sreg, memref); }
+inline void emit_bt_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 4, dreg, imm); }
+inline void emit_bt_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 4, memref, imm); }
-inline void emit_bts_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTS_Ev_Gv, OP_16BIT, sreg, dreg); }
-inline void emit_bts_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTS_Ev_Gv, OP_16BIT, sreg, memref); }
-inline void emit_bts_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 5, dreg, imm); }
-inline void emit_bts_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 5, memref, imm); }
+inline void emit_bts_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTS_Ev_Gv, OP_16BIT, sreg, dreg); }
+inline void emit_bts_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTS_Ev_Gv, OP_16BIT, sreg, memref); }
+inline void emit_bts_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 5, dreg, imm); }
+inline void emit_bts_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 5, memref, imm); }
-inline void emit_btr_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTR_Ev_Gv, OP_16BIT, sreg, dreg); }
-inline void emit_btr_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTR_Ev_Gv, OP_16BIT, sreg, memref); }
-inline void emit_btr_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 6, dreg, imm); }
-inline void emit_btr_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 6, memref, imm); }
+inline void emit_btr_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTR_Ev_Gv, OP_16BIT, sreg, dreg); }
+inline void emit_btr_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTR_Ev_Gv, OP_16BIT, sreg, memref); }
+inline void emit_btr_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 6, dreg, imm); }
+inline void emit_btr_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 6, memref, imm); }
-inline void emit_btc_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTC_Ev_Gv, OP_16BIT, sreg, dreg); }
-inline void emit_btc_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTC_Ev_Gv, OP_16BIT, sreg, memref); }
-inline void emit_btc_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 7, dreg, imm); }
-inline void emit_btc_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 7, memref, imm); }
+inline void emit_btc_r16_r16(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTC_Ev_Gv, OP_16BIT, sreg, dreg); }
+inline void emit_btc_m16_r16(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTC_Ev_Gv, OP_16BIT, sreg, memref); }
+inline void emit_btc_r16_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 7, dreg, imm); }
+inline void emit_btc_m16_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_16BIT, 7, memref, imm); }
//-------------------------------------------------
// emit_bit_r32_*
//-------------------------------------------------
-inline void emit_bt_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BT_Ev_Gv, OP_32BIT, sreg, dreg); }
-inline void emit_bt_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BT_Ev_Gv, OP_32BIT, sreg, memref); }
-inline void emit_bt_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 4, dreg, imm); }
-inline void emit_bt_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 4, memref, imm); }
+inline void emit_bt_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BT_Ev_Gv, OP_32BIT, sreg, dreg); }
+inline void emit_bt_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BT_Ev_Gv, OP_32BIT, sreg, memref); }
+inline void emit_bt_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 4, dreg, imm); }
+inline void emit_bt_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 4, memref, imm); }
-inline void emit_bts_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTS_Ev_Gv, OP_32BIT, sreg, dreg); }
-inline void emit_bts_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTS_Ev_Gv, OP_32BIT, sreg, memref); }
-inline void emit_bts_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 5, dreg, imm); }
-inline void emit_bts_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 5, memref, imm); }
+inline void emit_bts_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTS_Ev_Gv, OP_32BIT, sreg, dreg); }
+inline void emit_bts_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTS_Ev_Gv, OP_32BIT, sreg, memref); }
+inline void emit_bts_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 5, dreg, imm); }
+inline void emit_bts_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 5, memref, imm); }
-inline void emit_btr_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTR_Ev_Gv, OP_32BIT, sreg, dreg); }
-inline void emit_btr_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTR_Ev_Gv, OP_32BIT, sreg, memref); }
-inline void emit_btr_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 6, dreg, imm); }
-inline void emit_btr_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 6, memref, imm); }
+inline void emit_btr_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTR_Ev_Gv, OP_32BIT, sreg, dreg); }
+inline void emit_btr_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTR_Ev_Gv, OP_32BIT, sreg, memref); }
+inline void emit_btr_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 6, dreg, imm); }
+inline void emit_btr_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 6, memref, imm); }
-inline void emit_btc_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTC_Ev_Gv, OP_32BIT, sreg, dreg); }
-inline void emit_btc_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTC_Ev_Gv, OP_32BIT, sreg, memref); }
-inline void emit_btc_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 7, dreg, imm); }
-inline void emit_btc_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 7, memref, imm); }
+inline void emit_btc_r32_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTC_Ev_Gv, OP_32BIT, sreg, dreg); }
+inline void emit_btc_m32_r32(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTC_Ev_Gv, OP_32BIT, sreg, memref); }
+inline void emit_btc_r32_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 7, dreg, imm); }
+inline void emit_btc_m32_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_32BIT, 7, memref, imm); }
//-------------------------------------------------
@@ -2692,25 +2692,25 @@ inline void emit_btc_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) {
#if (X86EMIT_SIZE == 64)
-inline void emit_bt_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BT_Ev_Gv, OP_64BIT, sreg, dreg); }
-inline void emit_bt_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BT_Ev_Gv, OP_64BIT, sreg, memref); }
-inline void emit_bt_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 4, dreg, imm); }
-inline void emit_bt_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 4, memref, imm); }
+inline void emit_bt_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BT_Ev_Gv, OP_64BIT, sreg, dreg); }
+inline void emit_bt_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BT_Ev_Gv, OP_64BIT, sreg, memref); }
+inline void emit_bt_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 4, dreg, imm); }
+inline void emit_bt_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 4, memref, imm); }
-inline void emit_bts_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTS_Ev_Gv, OP_64BIT, sreg, dreg); }
-inline void emit_bts_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTS_Ev_Gv, OP_64BIT, sreg, memref); }
-inline void emit_bts_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 5, dreg, imm); }
-inline void emit_bts_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 5, memref, imm); }
+inline void emit_bts_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTS_Ev_Gv, OP_64BIT, sreg, dreg); }
+inline void emit_bts_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTS_Ev_Gv, OP_64BIT, sreg, memref); }
+inline void emit_bts_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 5, dreg, imm); }
+inline void emit_bts_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 5, memref, imm); }
-inline void emit_btr_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTR_Ev_Gv, OP_64BIT, sreg, dreg); }
-inline void emit_btr_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTR_Ev_Gv, OP_64BIT, sreg, memref); }
-inline void emit_btr_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 6, dreg, imm); }
-inline void emit_btr_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 6, memref, imm); }
+inline void emit_btr_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTR_Ev_Gv, OP_64BIT, sreg, dreg); }
+inline void emit_btr_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTR_Ev_Gv, OP_64BIT, sreg, memref); }
+inline void emit_btr_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 6, dreg, imm); }
+inline void emit_btr_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 6, memref, imm); }
-inline void emit_btc_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BTC_Ev_Gv, OP_64BIT, sreg, dreg); }
-inline void emit_btc_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_BTC_Ev_Gv, OP_64BIT, sreg, memref); }
-inline void emit_btc_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 7, dreg, imm); }
-inline void emit_btc_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 7, memref, imm); }
+inline void emit_btc_r64_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_BTC_Ev_Gv, OP_64BIT, sreg, dreg); }
+inline void emit_btc_m64_r64(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_BTC_Ev_Gv, OP_64BIT, sreg, memref); }
+inline void emit_btc_r64_imm(x86code *&emitptr, uint8_t dreg, uint8_t imm) { emit_op_modrm_reg_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 7, dreg, imm); }
+inline void emit_btc_m64_imm(x86code *&emitptr, x86_memref memref, uint8_t imm) { emit_op_modrm_mem_imm8(emitptr, OP_G8_Ev_Ib, OP_64BIT, 7, memref, imm); }
#endif
@@ -2720,10 +2720,10 @@ inline void emit_btc_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) {
// LEA EMITTERS
//**************************************************************************
-inline void emit_lea_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_LEA_Gv_M, OP_32BIT, dreg, memref); }
+inline void emit_lea_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_LEA_Gv_M, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_lea_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_LEA_Gv_M, OP_64BIT, dreg, memref); }
+inline void emit_lea_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_LEA_Gv_M, OP_64BIT, dreg, memref); }
#endif
@@ -2736,8 +2736,8 @@ inline void emit_lea_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref)
// emit_setcc_*
//-------------------------------------------------
-inline void emit_setcc_r8(x86code *&emitptr, UINT8 cond, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_SETCC_O_Eb + cond, OP_32BIT, 0, dreg); }
-inline void emit_setcc_m8(x86code *&emitptr, UINT8 cond, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SETCC_O_Eb + cond, OP_32BIT, 0, memref); }
+inline void emit_setcc_r8(x86code *&emitptr, uint8_t cond, uint8_t dreg) { emit_op_modrm_reg(emitptr, OP_SETCC_O_Eb + cond, OP_32BIT, 0, dreg); }
+inline void emit_setcc_m8(x86code *&emitptr, uint8_t cond, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SETCC_O_Eb + cond, OP_32BIT, 0, memref); }
@@ -2791,46 +2791,46 @@ inline void emit_fstsw_ax(x86code *&emitptr) { emit_op_simple(emitptr, OP_FSTSW_
#if (X86EMIT_SIZE == 32)
-inline void emit_ffree_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FFREE_STn + reg, OP_32BIT); }
-inline void emit_fst_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FST_STn + reg, OP_32BIT); }
-inline void emit_fstp_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSTP_STn + reg, OP_32BIT); }
-inline void emit_fucomp_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOMP_STn + reg, OP_32BIT); }
-
-inline void emit_fadd_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADD_ST0_STn + reg, OP_32BIT); }
-inline void emit_fmul_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMUL_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcom_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOM_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcomp_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMP_ST0_STn + reg, OP_32BIT); }
-inline void emit_fsub_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUB_ST0_STn + reg, OP_32BIT); }
-inline void emit_fsubr_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBR_ST0_STn + reg, OP_32BIT); }
-inline void emit_fdiv_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIV_ST0_STn + reg, OP_32BIT); }
-inline void emit_fdivr_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVR_ST0_STn + reg, OP_32BIT); }
-inline void emit_fld_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FLD_ST0_STn + reg, OP_32BIT); }
-inline void emit_fxch_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FXCH_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovb_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVB_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmove_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVE_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovbe_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVBE_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovu_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVU_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovnb_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNB_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovne_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNE_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovnbe_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNBE_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovnu_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNU_ST0_STn + reg, OP_32BIT); }
-inline void emit_fucomi_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOMI_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcomi_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMI_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcomip_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMIP_ST0_STn + reg, OP_32BIT); }
-
-inline void emit_fadd_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADD_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fmul_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMUL_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fsubr_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBR_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fsub_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUB_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fdivr_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVR_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fdiv_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIV_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fucom_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOM_STn_ST0 + reg, OP_32BIT); }
-inline void emit_faddp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADDP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fmulp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMULP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fsubrp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBRP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fsubp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fdivrp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVRP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fdivp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_ffree_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FFREE_STn + reg, OP_32BIT); }
+inline void emit_fst_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FST_STn + reg, OP_32BIT); }
+inline void emit_fstp_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FSTP_STn + reg, OP_32BIT); }
+inline void emit_fucomp_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FUCOMP_STn + reg, OP_32BIT); }
+
+inline void emit_fadd_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FADD_ST0_STn + reg, OP_32BIT); }
+inline void emit_fmul_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FMUL_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcom_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCOM_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcomp_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCOMP_ST0_STn + reg, OP_32BIT); }
+inline void emit_fsub_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FSUB_ST0_STn + reg, OP_32BIT); }
+inline void emit_fsubr_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FSUBR_ST0_STn + reg, OP_32BIT); }
+inline void emit_fdiv_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FDIV_ST0_STn + reg, OP_32BIT); }
+inline void emit_fdivr_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FDIVR_ST0_STn + reg, OP_32BIT); }
+inline void emit_fld_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FLD_ST0_STn + reg, OP_32BIT); }
+inline void emit_fxch_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FXCH_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovb_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCMOVB_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmove_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCMOVE_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovbe_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCMOVBE_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovu_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCMOVU_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovnb_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCMOVNB_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovne_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCMOVNE_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovnbe_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCMOVNBE_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovnu_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCMOVNU_ST0_STn + reg, OP_32BIT); }
+inline void emit_fucomi_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FUCOMI_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcomi_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCOMI_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcomip_st0_stn(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FCOMIP_ST0_STn + reg, OP_32BIT); }
+
+inline void emit_fadd_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FADD_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fmul_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FMUL_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fsubr_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FSUBR_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fsub_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FSUB_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fdivr_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FDIVR_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fdiv_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FDIV_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fucom_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FUCOM_STn_ST0 + reg, OP_32BIT); }
+inline void emit_faddp_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FADDP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fmulp_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FMULP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fsubrp_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FSUBRP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fsubp_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FSUBP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fdivrp_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FDIVRP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fdivp_stn_st0(x86code *&emitptr, uint8_t reg) { emit_op_simple(emitptr, OP_FDIVP_STn_ST0 + reg, OP_32BIT); }
inline void emit_faddp(x86code *&emitptr) { emit_faddp_stn_st0(emitptr, 1); }
inline void emit_fmulp(x86code *&emitptr) { emit_fmulp_stn_st0(emitptr, 1); }
@@ -2934,90 +2934,90 @@ inline void emit_stmxcsr_m32(x86code *&emitptr, x86_memref memref) { emit_op_mo
// MISC SSE EMITTERS
//**************************************************************************
-inline void emit_movd_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Vd_Ed, OP_32BIT, dreg, sreg); }
-inline void emit_movd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVD_Vd_Ed, OP_32BIT, dreg, memref); }
-inline void emit_movd_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Ed_Vd, OP_32BIT, sreg, dreg); }
-inline void emit_movd_m32_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVD_Ed_Vd, OP_32BIT, sreg, memref); }
+inline void emit_movd_r128_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Vd_Ed, OP_32BIT, dreg, sreg); }
+inline void emit_movd_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVD_Vd_Ed, OP_32BIT, dreg, memref); }
+inline void emit_movd_r32_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Ed_Vd, OP_32BIT, sreg, dreg); }
+inline void emit_movd_m32_r128(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOVD_Ed_Vd, OP_32BIT, sreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_movq_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Vd_Ed, OP_64BIT, dreg, sreg); }
-inline void emit_movq_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVD_Vd_Ed, OP_64BIT, dreg, memref); }
-inline void emit_movq_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Ed_Vd, OP_64BIT, sreg, dreg); }
-inline void emit_movq_m64_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVD_Ed_Vd, OP_64BIT, sreg, memref); }
+inline void emit_movq_r128_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Vd_Ed, OP_64BIT, dreg, sreg); }
+inline void emit_movq_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVD_Vd_Ed, OP_64BIT, dreg, memref); }
+inline void emit_movq_r64_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Ed_Vd, OP_64BIT, sreg, dreg); }
+inline void emit_movq_m64_r128(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOVD_Ed_Vd, OP_64BIT, sreg, memref); }
#endif
-inline void emit_movdqa_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVDQA_Vdq_Wdq, OP_32BIT, dreg, memref); }
-inline void emit_movdqa_m128_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVDQA_Wdq_Vdq, OP_32BIT, sreg, memref); }
-inline void emit_movdqu_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVDQU_Vdq_Wdq, OP_32BIT, dreg, memref); }
-inline void emit_movdqu_m128_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVDQU_Wdq_Vdq, OP_32BIT, sreg, memref); }
+inline void emit_movdqa_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVDQA_Vdq_Wdq, OP_32BIT, dreg, memref); }
+inline void emit_movdqa_m128_r128(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOVDQA_Wdq_Vdq, OP_32BIT, sreg, memref); }
+inline void emit_movdqu_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVDQU_Vdq_Wdq, OP_32BIT, dreg, memref); }
+inline void emit_movdqu_m128_r128(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOVDQU_Wdq_Vdq, OP_32BIT, sreg, memref); }
//**************************************************************************
// SSE SCALAR SINGLE EMITTERS
//**************************************************************************
-inline void emit_movss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_movss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_movss_m32_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVSS_Wss_Vss, OP_32BIT, sreg, memref); }
+inline void emit_movss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_movss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_movss_m32_r128(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOVSS_Wss_Vss, OP_32BIT, sreg, memref); }
-inline void emit_addss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_addss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_addss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADDSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_addss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_subss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_subss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_subss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SUBSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_subss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_mulss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_mulss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_mulss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MULSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_mulss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_divss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_divss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_divss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_DIVSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_divss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_rcpss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RCPSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_rcpss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RCPSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_rcpss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_RCPSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_rcpss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RCPSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_sqrtss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_sqrtss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_sqrtss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SQRTSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_sqrtss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_rsqrtss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RSQRTSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_rsqrtss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RSQRTSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_rsqrtss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_RSQRTSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_rsqrtss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RSQRTSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_comiss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_COMISS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_comiss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_COMISS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_comiss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_COMISS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_comiss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_COMISS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_ucomiss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_UCOMISS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_ucomiss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_UCOMISS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_ucomiss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_UCOMISS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_ucomiss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_UCOMISS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_cvtsi2ss_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SS_Vss_Ed, OP_32BIT, dreg, sreg); }
-inline void emit_cvtsi2ss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SS_Vss_Ed, OP_32BIT, dreg, memref); }
+inline void emit_cvtsi2ss_r128_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SS_Vss_Ed, OP_32BIT, dreg, sreg); }
+inline void emit_cvtsi2ss_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SS_Vss_Ed, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvtsi2ss_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SS_Vss_Ed, OP_64BIT, dreg, sreg); }
-inline void emit_cvtsi2ss_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SS_Vss_Ed, OP_64BIT, dreg, memref); }
+inline void emit_cvtsi2ss_r128_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SS_Vss_Ed, OP_64BIT, dreg, sreg); }
+inline void emit_cvtsi2ss_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SS_Vss_Ed, OP_64BIT, dreg, memref); }
#endif
-inline void emit_cvtsd2ss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SS_Vss_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_cvtsd2ss_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SS_Vss_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_cvtsd2ss_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SS_Vss_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_cvtsd2ss_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SS_Vss_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_cvtss2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SI_Gd_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_cvtss2si_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SI_Gd_Wss, OP_32BIT, dreg, memref); }
+inline void emit_cvtss2si_r32_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SI_Gd_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_cvtss2si_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SI_Gd_Wss, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvtss2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SI_Gd_Wss, OP_64BIT, dreg, sreg); }
-inline void emit_cvtss2si_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SI_Gd_Wss, OP_64BIT, dreg, memref); }
+inline void emit_cvtss2si_r64_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SI_Gd_Wss, OP_64BIT, dreg, sreg); }
+inline void emit_cvtss2si_r64_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SI_Gd_Wss, OP_64BIT, dreg, memref); }
#endif
-inline void emit_cvttss2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_cvttss2si_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_32BIT, dreg, memref); }
+inline void emit_cvttss2si_r32_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_cvttss2si_r32_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvttss2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_64BIT, dreg, sreg); }
-inline void emit_cvttss2si_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_64BIT, dreg, memref); }
+inline void emit_cvttss2si_r64_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_64BIT, dreg, sreg); }
+inline void emit_cvttss2si_r64_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_64BIT, dreg, memref); }
#endif
-inline void emit_roundss_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDSS_Vss_Wss_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
-inline void emit_roundss_r128_m32_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDSS_Vss_Wss_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
+inline void emit_roundss_r128_r128_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, uint8_t imm) { emit_op_modrm_reg(emitptr, OP_ROUNDSS_Vss_Wss_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
+inline void emit_roundss_r128_m32_imm(x86code *&emitptr, uint8_t dreg, x86_memref memref, uint8_t imm) { emit_op_modrm_mem(emitptr, OP_ROUNDSS_Vss_Wss_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
@@ -3025,57 +3025,57 @@ inline void emit_roundss_r128_m32_imm(x86code *&emitptr, UINT8 dreg, x86_memref
// SSE PACKED SINGLE EMITTERS
//**************************************************************************
-inline void emit_movps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVAPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_movps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVAPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_movps_m128_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVAPS_Wps_Vps, OP_32BIT, sreg, memref); }
+inline void emit_movps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVAPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_movps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVAPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_movps_m128_r128(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOVAPS_Wps_Vps, OP_32BIT, sreg, memref); }
-inline void emit_addps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_addps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_addps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADDPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_addps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_subps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_subps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_subps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SUBPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_subps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_mulps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_mulps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_mulps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MULPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_mulps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_divps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_divps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_divps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_DIVPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_divps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_rcpps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RCPPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_rcpps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RCPPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_rcpps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_RCPPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_rcpps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RCPPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_sqrtps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_sqrtps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_sqrtps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SQRTPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_sqrtps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_rsqrtps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RSQRTPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_rsqrtps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RSQRTPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_rsqrtps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_RSQRTPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_rsqrtps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RSQRTPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_andps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_andps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_andps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ANDPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_andps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_andnps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDNPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_andnps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDNPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_andnps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ANDNPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_andnps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDNPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_orps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ORPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_orps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ORPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_orps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ORPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_orps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ORPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_xorps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XORPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_xorps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XORPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_xorps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_XORPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_xorps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XORPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_cvtdq2ps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTDQ2PS_Vps_Wdq, OP_32BIT, dreg, sreg); }
-inline void emit_cvtdq2ps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTDQ2PS_Vps_Wdq, OP_32BIT, dreg, memref); }
+inline void emit_cvtdq2ps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTDQ2PS_Vps_Wdq, OP_32BIT, dreg, sreg); }
+inline void emit_cvtdq2ps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTDQ2PS_Vps_Wdq, OP_32BIT, dreg, memref); }
-inline void emit_cvtpd2ps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPD2PS_Vps_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_cvtpd2ps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPD2PS_Vps_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_cvtpd2ps_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTPD2PS_Vps_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_cvtpd2ps_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPD2PS_Vps_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_cvtps2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_cvtps2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, memref); }
+inline void emit_cvtps2dq_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_cvtps2dq_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, memref); }
-inline void emit_cvttps2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_cvttps2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, memref); }
+inline void emit_cvttps2dq_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_cvttps2dq_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, memref); }
-inline void emit_roundps_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
-inline void emit_roundps_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
+inline void emit_roundps_r128_r128_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, uint8_t imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
+inline void emit_roundps_r128_m128_imm(x86code *&emitptr, uint8_t dreg, x86_memref memref, uint8_t imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
@@ -3083,60 +3083,60 @@ inline void emit_roundps_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref
// SSE SCALAR DOUBLE EMITTERS
//**************************************************************************
-inline void emit_movsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_movsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_movsd_m64_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVSD_Wsd_Vsd, OP_32BIT, sreg, memref); }
+inline void emit_movsd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_movsd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_movsd_m64_r128(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOVSD_Wsd_Vsd, OP_32BIT, sreg, memref); }
-inline void emit_addsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_addsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_addsd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADDSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_addsd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_subsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_subsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_subsd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SUBSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_subsd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_mulsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_mulsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_mulsd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MULSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_mulsd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_divsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_divsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_divsd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_DIVSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_divsd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_sqrtsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_sqrtsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_sqrtsd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SQRTSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_sqrtsd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_comisd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_COMISD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_comisd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_COMISD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_comisd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_COMISD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_comisd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_COMISD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_ucomisd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_UCOMISD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_ucomisd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_UCOMISD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_ucomisd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_UCOMISD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_ucomisd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_UCOMISD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_cvtsi2sd_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_32BIT, dreg, sreg); }
-inline void emit_cvtsi2sd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_32BIT, dreg, memref); }
+inline void emit_cvtsi2sd_r128_r32(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_32BIT, dreg, sreg); }
+inline void emit_cvtsi2sd_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvtsi2sd_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_64BIT, dreg, sreg); }
-inline void emit_cvtsi2sd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_64BIT, dreg, memref); }
+inline void emit_cvtsi2sd_r128_r64(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_64BIT, dreg, sreg); }
+inline void emit_cvtsi2sd_r128_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_64BIT, dreg, memref); }
#endif
-inline void emit_cvtss2sd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SD_Vsd_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_cvtss2sd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SD_Vsd_Wss, OP_32BIT, dreg, memref); }
+inline void emit_cvtss2sd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SD_Vsd_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_cvtss2sd_r128_m32(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SD_Vsd_Wss, OP_32BIT, dreg, memref); }
-inline void emit_cvtsd2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_cvtsd2si_r32_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_cvtsd2si_r32_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_cvtsd2si_r32_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvtsd2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_64BIT, dreg, sreg); }
-inline void emit_cvtsd2si_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_64BIT, dreg, memref); }
+inline void emit_cvtsd2si_r64_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_64BIT, dreg, sreg); }
+inline void emit_cvtsd2si_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_64BIT, dreg, memref); }
#endif
-inline void emit_cvttsd2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_cvttsd2si_r32_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_cvttsd2si_r32_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_cvttsd2si_r32_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvttsd2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_64BIT, dreg, sreg); }
-inline void emit_cvttsd2si_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_64BIT, dreg, memref); }
+inline void emit_cvttsd2si_r64_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_64BIT, dreg, sreg); }
+inline void emit_cvttsd2si_r64_m64(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_64BIT, dreg, memref); }
#endif
-inline void emit_roundsd_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDSD_Vsd_Wsd_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
-inline void emit_roundsd_r128_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDSD_Vsd_Wsd_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
+inline void emit_roundsd_r128_r128_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, uint8_t imm) { emit_op_modrm_reg(emitptr, OP_ROUNDSD_Vsd_Wsd_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
+inline void emit_roundsd_r128_m64_imm(x86code *&emitptr, uint8_t dreg, x86_memref memref, uint8_t imm) { emit_op_modrm_mem(emitptr, OP_ROUNDSD_Vsd_Wsd_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
@@ -3144,51 +3144,51 @@ inline void emit_roundsd_r128_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref
// SSE PACKED DOUBLE EMITTERS
//**************************************************************************
-inline void emit_movpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVAPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_movpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVAPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_movpd_m128_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVAPD_Wpd_Vpd, OP_32BIT, sreg, memref); }
+inline void emit_movpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MOVAPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_movpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVAPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_movpd_m128_r128(x86code *&emitptr, x86_memref memref, uint8_t sreg) { emit_op_modrm_mem(emitptr, OP_MOVAPD_Wpd_Vpd, OP_32BIT, sreg, memref); }
-inline void emit_addpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_addpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_addpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ADDPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_addpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_subpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_subpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_subpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SUBPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_subpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_mulpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_mulpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_mulpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_MULPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_mulpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_divpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_divpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_divpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_DIVPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_divpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_sqrtpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_sqrtpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_sqrtpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_SQRTPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_sqrtpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_andpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_andpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_andpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ANDPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_andpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_andnpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDNPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_andnpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDNPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_andnpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ANDNPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_andnpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDNPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_orpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ORPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_orpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ORPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_orpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_ORPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_orpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ORPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_xorpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XORPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_xorpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XORPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_xorpd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_XORPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_xorpd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XORPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_cvtdq2pd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTDQ2PD_Vpd_Wq, OP_32BIT, dreg, sreg); }
-inline void emit_cvtdq2pd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTDQ2PD_Vpd_Wq, OP_32BIT, dreg, memref); }
+inline void emit_cvtdq2pd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTDQ2PD_Vpd_Wq, OP_32BIT, dreg, sreg); }
+inline void emit_cvtdq2pd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTDQ2PD_Vpd_Wq, OP_32BIT, dreg, memref); }
-inline void emit_cvtps2pd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPS2PD_Vpd_Wq, OP_32BIT, dreg, sreg); }
-inline void emit_cvtps2pd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPS2PD_Vpd_Wq, OP_32BIT, dreg, memref); }
+inline void emit_cvtps2pd_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTPS2PD_Vpd_Wq, OP_32BIT, dreg, sreg); }
+inline void emit_cvtps2pd_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPS2PD_Vpd_Wq, OP_32BIT, dreg, memref); }
-inline void emit_cvtpd2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_cvtpd2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_cvtpd2dq_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_cvtpd2dq_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_cvttpd2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_cvttpd2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_cvttpd2dq_r128_r128(x86code *&emitptr, uint8_t dreg, uint8_t sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_cvttpd2dq_r128_m128(x86code *&emitptr, uint8_t dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_roundpd_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
-inline void emit_roundpd_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
+inline void emit_roundpd_r128_r128_imm(x86code *&emitptr, uint8_t dreg, uint8_t sreg, uint8_t imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
+inline void emit_roundpd_r128_m128_imm(x86code *&emitptr, uint8_t dreg, x86_memref memref, uint8_t imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
}
diff --git a/src/devices/cpu/x86log.cpp b/src/devices/cpu/x86log.cpp
index 09d53c80bba..f8990e51049 100644
--- a/src/devices/cpu/x86log.cpp
+++ b/src/devices/cpu/x86log.cpp
@@ -20,7 +20,7 @@
***************************************************************************/
static void reset_log(x86log_context *log) noexcept;
-extern int i386_dasm_one_ex(char *buffer, UINT64 eip, const UINT8 *oprom, int mode);
+extern int i386_dasm_one_ex(char *buffer, uint64_t eip, const uint8_t *oprom, int mode);
@@ -130,9 +130,9 @@ void x86log_disasm_code_range(x86log_context *log, const char *label, x86code *s
{
default:
case 1: sprintf(buffer, "db %02X", *cur); break;
- case 2: sprintf(buffer, "dw %04X", *(UINT16 *)cur); break;
- case 4: sprintf(buffer, "dd %08X", *(UINT32 *)cur); break;
- case 8: sprintf(buffer, "dq %08X%08X", ((UINT32 *)cur)[1], ((UINT32 *)cur)[0]); break;
+ case 2: sprintf(buffer, "dw %04X", *(uint16_t *)cur); break;
+ case 4: sprintf(buffer, "dd %08X", *(uint32_t *)cur); break;
+ case 8: sprintf(buffer, "dq %08X%08X", ((uint32_t *)cur)[1], ((uint32_t *)cur)[0]); break;
}
}
diff --git a/src/devices/cpu/z180/z180.cpp b/src/devices/cpu/z180/z180.cpp
index 26fee676f7e..0eab56994b8 100644
--- a/src/devices/cpu/z180/z180.cpp
+++ b/src/devices/cpu/z180/z180.cpp
@@ -81,7 +81,7 @@ Hitachi HD647180 series:
const device_type Z180 = &device_creator<z180_device>;
-z180_device::z180_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+z180_device::z180_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, Z180, "Z180", tag, owner, clock, "z180", __FILE__)
, z80_daisy_chain_interface(mconfig, *this)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0)
@@ -91,7 +91,7 @@ z180_device::z180_device(const machine_config &mconfig, const char *tag, device_
}
-offs_t z180_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t z180_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( z180 );
return CPU_DISASSEMBLE_NAME(z180)(this, buffer, pc, oprom, opram, options);
@@ -750,14 +750,14 @@ offs_t z180_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
-static UINT8 SZ[256]; /* zero and sign flags */
-static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
-static UINT8 SZP[256]; /* zero, sign and parity flags */
-static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
-static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
+static uint8_t SZ[256]; /* zero and sign flags */
+static uint8_t SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
+static uint8_t SZP[256]; /* zero, sign and parity flags */
+static uint8_t SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
+static uint8_t SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
-static std::unique_ptr<UINT8[]> SZHVC_add;
-static std::unique_ptr<UINT8[]> SZHVC_sub;
+static std::unique_ptr<uint8_t[]> SZHVC_add;
+static std::unique_ptr<uint8_t[]> SZHVC_sub;
#include "z180ops.h"
#include "z180tbl.h"
@@ -781,10 +781,10 @@ const address_space_config *z180_device::memory_space_config(address_spacenum sp
}
}
-UINT8 z180_device::z180_readcontrol(offs_t port)
+uint8_t z180_device::z180_readcontrol(offs_t port)
{
/* normal external readport */
- UINT8 data = m_iospace->read_byte(port);
+ uint8_t data = m_iospace->read_byte(port);
/* remap internal I/O registers */
if((port & (IO_IOCR & 0xc0)) == (IO_IOCR & 0xc0))
@@ -1210,7 +1210,7 @@ data |= 0x02; // kludge for 20pacgal
return data;
}
-void z180_device::z180_writecontrol(offs_t port, UINT8 data)
+void z180_device::z180_writecontrol(offs_t port, uint8_t data)
{
/* normal external write port */
m_iospace->write_byte(port, data);
@@ -1307,7 +1307,7 @@ void z180_device::z180_writecontrol(offs_t port, UINT8 data)
case Z180_TCR:
LOG(("Z180 '%s' TCR wr $%02x ($%02x)\n", tag(), data, data & Z180_TCR_WMASK));
{
- UINT16 old = IO_TCR;
+ uint16_t old = IO_TCR;
/* Force reload on state change */
IO_TCR = (IO_TCR & ~Z180_TCR_WMASK) | (data & Z180_TCR_WMASK);
if (!(old & Z180_TCR_TDE0) && (IO_TCR & Z180_TCR_TDE0))
@@ -1758,9 +1758,9 @@ int z180_device::z180_dma1()
return 6 + cycles;
}
-void z180_device::z180_write_iolines(UINT32 data)
+void z180_device::z180_write_iolines(uint32_t data)
{
- UINT32 changes = m_iol ^ data;
+ uint32_t changes = m_iol ^ data;
/* I/O asynchronous clock 0 (active high) or DREQ0 (mux) */
if (changes & Z180_CKA0)
@@ -1887,11 +1887,11 @@ void z180_device::device_start()
{
int i, p;
int oldval, newval, val;
- UINT8 *padd, *padc, *psub, *psbc;
+ uint8_t *padd, *padc, *psub, *psbc;
/* allocate big flag arrays once */
- SZHVC_add = std::make_unique<UINT8[]>(2*256*256);
- SZHVC_sub = std::make_unique<UINT8[]>(2*256*256);
+ SZHVC_add = std::make_unique<uint8_t[]>(2*256*256);
+ SZHVC_sub = std::make_unique<uint8_t[]>(2*256*256);
padd = &SZHVC_add[ 0*256];
padc = &SZHVC_add[256*256];
@@ -2158,7 +2158,7 @@ void z180_device::device_reset()
m_after_EI = 0;
m_ea = 0;
- memcpy(m_cc, (UINT8 *)cc_default, sizeof(m_cc));
+ memcpy(m_cc, (uint8_t *)cc_default, sizeof(m_cc));
_IX = _IY = 0xffff; /* IX and IY are FFFF after a reset! */
_F = ZF; /* Zero flag is set */
@@ -2459,7 +2459,7 @@ again:
/****************************************************************************
* Burn 'cycles' T-states. Adjust R register for the lost time
****************************************************************************/
-void z180_device::execute_burn(INT32 cycles)
+void z180_device::execute_burn(int32_t cycles)
{
/* FIXME: This is not appropriate for dma */
while ( (cycles > 0) )
diff --git a/src/devices/cpu/z180/z180.h b/src/devices/cpu/z180/z180.h
index 36b260e7a6f..67befa3a4d3 100644
--- a/src/devices/cpu/z180/z180.h
+++ b/src/devices/cpu/z180/z180.h
@@ -125,7 +125,7 @@ class z180_device : public cpu_device, public z80_daisy_chain_interface
{
public:
// construction/destruction
- z180_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ z180_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
protected:
// device-level overrides
@@ -133,12 +133,12 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 16; }
- virtual UINT32 execute_input_lines() const override { return 3; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xff; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 16; }
+ virtual uint32_t execute_input_lines() const override { return 3; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xff; }
virtual void execute_run() override;
- virtual void execute_burn(INT32 cycles) override;
+ virtual void execute_burn(int32_t cycles) override;
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
@@ -151,9 +151,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -162,34 +162,34 @@ private:
PAIR m_PREPC,m_PC,m_SP,m_AF,m_BC,m_DE,m_HL,m_IX,m_IY;
PAIR m_AF2,m_BC2,m_DE2,m_HL2;
- UINT8 m_R,m_R2,m_IFF1,m_IFF2,m_HALT,m_IM,m_I;
- UINT8 m_tmdr_latch; /* flag latched TMDR0H, TMDR1H values */
- UINT8 m_read_tcr_tmdr[2]; /* flag to indicate that TCR or TMDR was read */
- UINT32 m_iol; /* I/O line status bits */
- UINT8 m_io[64]; /* 64 internal 8 bit registers */
+ uint8_t m_R,m_R2,m_IFF1,m_IFF2,m_HALT,m_IM,m_I;
+ uint8_t m_tmdr_latch; /* flag latched TMDR0H, TMDR1H values */
+ uint8_t m_read_tcr_tmdr[2]; /* flag to indicate that TCR or TMDR was read */
+ uint32_t m_iol; /* I/O line status bits */
+ uint8_t m_io[64]; /* 64 internal 8 bit registers */
offs_t m_mmu[16]; /* MMU address translation */
- UINT8 m_tmdrh[2]; /* latched TMDR0H and TMDR1H values */
- UINT16 m_tmdr_value[2]; /* TMDR values used byt PRT0 and PRT1 as down counter */
- UINT8 m_tif[2]; /* TIF0 and TIF1 values */
- UINT8 m_nmi_state; /* nmi line state */
- UINT8 m_nmi_pending; /* nmi pending */
- UINT8 m_irq_state[3]; /* irq line states (INT0,INT1,INT2) */
- UINT8 m_int_pending[11 + 1]; /* interrupt pending */
- UINT8 m_after_EI; /* are we in the EI shadow? */
- UINT32 m_ea;
- UINT8 m_timer_cnt; /* timer counter / divide by 20 */
- UINT8 m_dma0_cnt; /* dma0 counter / divide by 20 */
- UINT8 m_dma1_cnt; /* dma1 counter / divide by 20 */
+ uint8_t m_tmdrh[2]; /* latched TMDR0H and TMDR1H values */
+ uint16_t m_tmdr_value[2]; /* TMDR values used byt PRT0 and PRT1 as down counter */
+ uint8_t m_tif[2]; /* TIF0 and TIF1 values */
+ uint8_t m_nmi_state; /* nmi line state */
+ uint8_t m_nmi_pending; /* nmi pending */
+ uint8_t m_irq_state[3]; /* irq line states (INT0,INT1,INT2) */
+ uint8_t m_int_pending[11 + 1]; /* interrupt pending */
+ uint8_t m_after_EI; /* are we in the EI shadow? */
+ uint32_t m_ea;
+ uint8_t m_timer_cnt; /* timer counter / divide by 20 */
+ uint8_t m_dma0_cnt; /* dma0 counter / divide by 20 */
+ uint8_t m_dma1_cnt; /* dma1 counter / divide by 20 */
address_space *m_program;
direct_read_data *m_direct;
address_space *m_oprogram;
direct_read_data *m_odirect;
address_space *m_iospace;
- UINT8 m_rtemp;
- UINT32 m_ioltemp;
+ uint8_t m_rtemp;
+ uint32_t m_ioltemp;
int m_icount;
int m_extra_cycles; /* extra cpu cycles */
- UINT8 *m_cc[6];
+ uint8_t *m_cc[6];
typedef void (z180_device::*opcode_func)();
static const opcode_func s_z180ops[6][0x100];
@@ -197,33 +197,33 @@ private:
inline void z180_mmu();
inline void RM16( offs_t addr, PAIR *r );
inline void WM16( offs_t addr, PAIR *r );
- inline UINT8 ROP();
- inline UINT8 ARG();
- inline UINT32 ARG16();
- inline UINT8 INC(UINT8 value);
- inline UINT8 DEC(UINT8 value);
- inline UINT8 RLC(UINT8 value);
- inline UINT8 RRC(UINT8 value);
- inline UINT8 RL(UINT8 value);
- inline UINT8 RR(UINT8 value);
- inline UINT8 SLA(UINT8 value);
- inline UINT8 SRA(UINT8 value);
- inline UINT8 SLL(UINT8 value);
- inline UINT8 SRL(UINT8 value);
- inline UINT8 RES(UINT8 bit, UINT8 value);
- inline UINT8 SET(UINT8 bit, UINT8 value);
- inline int exec_op(const UINT8 opcode);
- inline int exec_cb(const UINT8 opcode);
- inline int exec_dd(const UINT8 opcode);
- inline int exec_ed(const UINT8 opcode);
- inline int exec_fd(const UINT8 opcode);
- inline int exec_xycb(const UINT8 opcode);
+ inline uint8_t ROP();
+ inline uint8_t ARG();
+ inline uint32_t ARG16();
+ inline uint8_t INC(uint8_t value);
+ inline uint8_t DEC(uint8_t value);
+ inline uint8_t RLC(uint8_t value);
+ inline uint8_t RRC(uint8_t value);
+ inline uint8_t RL(uint8_t value);
+ inline uint8_t RR(uint8_t value);
+ inline uint8_t SLA(uint8_t value);
+ inline uint8_t SRA(uint8_t value);
+ inline uint8_t SLL(uint8_t value);
+ inline uint8_t SRL(uint8_t value);
+ inline uint8_t RES(uint8_t bit, uint8_t value);
+ inline uint8_t SET(uint8_t bit, uint8_t value);
+ inline int exec_op(const uint8_t opcode);
+ inline int exec_cb(const uint8_t opcode);
+ inline int exec_dd(const uint8_t opcode);
+ inline int exec_ed(const uint8_t opcode);
+ inline int exec_fd(const uint8_t opcode);
+ inline int exec_xycb(const uint8_t opcode);
int take_interrupt(int irq);
- UINT8 z180_readcontrol(offs_t port);
- void z180_writecontrol(offs_t port, UINT8 data);
+ uint8_t z180_readcontrol(offs_t port);
+ void z180_writecontrol(offs_t port, uint8_t data);
int z180_dma0(int max_cycles);
int z180_dma1();
- void z180_write_iolines(UINT32 data);
+ void z180_write_iolines(uint32_t data);
void clock_timers();
int check_interrupts();
void handle_io_timers(int cycles);
diff --git a/src/devices/cpu/z180/z180dasm.cpp b/src/devices/cpu/z180/z180dasm.cpp
index e44f6d67ae4..b4b4b6571a7 100644
--- a/src/devices/cpu/z180/z180dasm.cpp
+++ b/src/devices/cpu/z180/z180dasm.cpp
@@ -38,7 +38,7 @@ static const char *const s_mnemonic[] = {
};
struct z80dasm {
- UINT8 mnemonic;
+ uint8_t mnemonic;
const char *arguments;
};
@@ -377,12 +377,12 @@ static const z80dasm mnemonic_main[256]= {
{zCALL,"m,A"}, {zDB,"fd"}, {zCP,"B"}, {zRST,"V"}
};
-static char sign(INT8 offset)
+static char sign(int8_t offset)
{
return (offset < 0)? '-':'+';
}
-static int offs(INT8 offset)
+static int offs(int8_t offset)
{
if (offset < 0) return -offset;
return offset;
@@ -397,11 +397,11 @@ CPU_DISASSEMBLE( z180 )
const char *src, *ixy;
char *dst;
unsigned PC = pc;
- INT8 offset = 0;
- UINT8 op, op1 = 0;
- UINT16 ea;
+ int8_t offset = 0;
+ uint8_t op, op1 = 0;
+ uint16_t ea;
int pos = 0;
- UINT32 flags = 0;
+ uint32_t flags = 0;
ixy = "oops!!";
dst = buffer;
@@ -423,7 +423,7 @@ CPU_DISASSEMBLE( z180 )
op1 = oprom[pos++];
if( op1 == 0xcb )
{
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
op1 = opram[pos++]; /* fourth byte from opbase.ram! */
d = &mnemonic_xx_cb[op1];
}
@@ -434,7 +434,7 @@ CPU_DISASSEMBLE( z180 )
op1 = oprom[pos++];
if( op1 == 0xcb )
{
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
op1 = opram[pos++]; /* fourth byte from opbase.ram! */
d = &mnemonic_xx_cb[op1];
}
@@ -471,7 +471,7 @@ CPU_DISASSEMBLE( z180 )
dst += sprintf( dst, "$%04X", ea );
break;
case 'O': /* Offset relative to PC */
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
dst += sprintf( dst, "$%05X", PC + offset + 2 );
break;
case 'P': /* Port number */
@@ -488,7 +488,7 @@ CPU_DISASSEMBLE( z180 )
dst += sprintf( dst, "$%05X", ea );
break;
case 'X':
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
case 'Y':
dst += sprintf( dst,"(%s%c$%02x)", ixy, sign(offset), offs(offset) );
break;
diff --git a/src/devices/cpu/z180/z180ed.hxx b/src/devices/cpu/z180/z180ed.hxx
index 91520228f87..df123a07a23 100644
--- a/src/devices/cpu/z180/z180ed.hxx
+++ b/src/devices/cpu/z180/z180ed.hxx
@@ -135,7 +135,7 @@ OP(ed,6d) { RETI; } /* RETI
OP(ed,6e) { m_IM = 0; } /* IM 0 */
OP(ed,6f) { RLD; } /* RLD (HL) */
-OP(ed,70) { UINT8 res = IN(_BC); _F = (_F & CF) | SZP[res]; } /* IN 0,(C) */
+OP(ed,70) { uint8_t res = IN(_BC); _F = (_F & CF) | SZP[res]; } /* IN 0,(C) */
OP(ed,71) { OUT(_BC,0); } /* OUT (C),0 */
OP(ed,72) { SBC16( SP ); } /* SBC HL,SP */
OP(ed,73) { m_ea = ARG16(); WM16( m_ea, &m_SP ); } /* LD (w),SP */
diff --git a/src/devices/cpu/z180/z180ops.h b/src/devices/cpu/z180/z180ops.h
index 6fb50e18112..3e2139fa51c 100644
--- a/src/devices/cpu/z180/z180ops.h
+++ b/src/devices/cpu/z180/z180ops.h
@@ -98,7 +98,7 @@ void z180_device::WM16( offs_t addr, PAIR *r )
* reading opcodes. In case of system with memory mapped I/O,
* this function can be used to greatly speed up emulation
***************************************************************/
-UINT8 z180_device::ROP()
+uint8_t z180_device::ROP()
{
offs_t addr = _PCD;
_PC++;
@@ -111,14 +111,14 @@ UINT8 z180_device::ROP()
* support systems that use different encoding mechanisms for
* opcodes and opcode arguments
***************************************************************/
-UINT8 z180_device::ARG()
+uint8_t z180_device::ARG()
{
offs_t addr = _PCD;
_PC++;
return m_direct->read_byte(MMU_REMAP_ADDR(addr));
}
-UINT32 z180_device::ARG16()
+uint32_t z180_device::ARG16()
{
offs_t addr = _PCD;
_PC += 2;
@@ -129,8 +129,8 @@ UINT32 z180_device::ARG16()
* Calculate the effective addess m_ea of an opcode using
* IX+offset resp. IY+offset addressing.
***************************************************************/
-#define EAX() m_ea = (UINT32)(UINT16)(_IX + (INT8)ARG())
-#define EAY() m_ea = (UINT32)(UINT16)(_IY + (INT8)ARG())
+#define EAX() m_ea = (uint32_t)(uint16_t)(_IX + (int8_t)ARG())
+#define EAY() m_ea = (uint32_t)(uint16_t)(_IY + (int8_t)ARG())
/***************************************************************
* POP
@@ -168,7 +168,7 @@ UINT32 z180_device::ARG16()
***************************************************************/
#define JR() \
{ \
- INT8 arg = (INT8)ARG(); /* ARG() also increments _PC */ \
+ int8_t arg = (int8_t)ARG(); /* ARG() also increments _PC */ \
_PC += arg; /* so don't do _PC += ARG() */ \
}
@@ -178,7 +178,7 @@ UINT32 z180_device::ARG16()
#define JR_COND(cond,opcode) \
if( cond ) \
{ \
- INT8 arg = (INT8)ARG(); /* ARG() also increments _PC */ \
+ int8_t arg = (int8_t)ARG(); /* ARG() also increments _PC */ \
_PC += arg; /* so don't do _PC += ARG() */ \
CC(ex,opcode); \
} \
@@ -277,19 +277,19 @@ UINT32 z180_device::ARG16()
/***************************************************************
* INC r8
***************************************************************/
-UINT8 z180_device::INC(UINT8 value)
+uint8_t z180_device::INC(uint8_t value)
{
- UINT8 res = value + 1;
+ uint8_t res = value + 1;
_F = (_F & CF) | SZHV_inc[res];
- return (UINT8)res;
+ return (uint8_t)res;
}
/***************************************************************
* DEC r8
***************************************************************/
-UINT8 z180_device::DEC(UINT8 value)
+uint8_t z180_device::DEC(uint8_t value)
{
- UINT8 res = value - 1;
+ uint8_t res = value - 1;
_F = (_F & CF) | SZHV_dec[res];
return res;
}
@@ -312,8 +312,8 @@ UINT8 z180_device::DEC(UINT8 value)
* RLA
***************************************************************/
#define RLA { \
- UINT8 res = (_A << 1) | (_F & CF); \
- UINT8 c = (_A & 0x80) ? CF : 0; \
+ uint8_t res = (_A << 1) | (_F & CF); \
+ uint8_t c = (_A & 0x80) ? CF : 0; \
_F = (_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
_A = res; \
}
@@ -322,8 +322,8 @@ UINT8 z180_device::DEC(UINT8 value)
* RRA
***************************************************************/
#define RRA { \
- UINT8 res = (_A >> 1) | (_F << 7); \
- UINT8 c = (_A & 0x01) ? CF : 0; \
+ uint8_t res = (_A >> 1) | (_F << 7); \
+ uint8_t c = (_A & 0x01) ? CF : 0; \
_F = (_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
_A = res; \
}
@@ -332,7 +332,7 @@ UINT8 z180_device::DEC(UINT8 value)
* RRD
***************************************************************/
#define RRD { \
- UINT8 n = RM(_HL); \
+ uint8_t n = RM(_HL); \
WM( _HL, (n >> 4) | (_A << 4) ); \
_A = (_A & 0xf0) | (n & 0x0f); \
_F = (_F & CF) | SZP[_A]; \
@@ -342,7 +342,7 @@ UINT8 z180_device::DEC(UINT8 value)
* RLD
***************************************************************/
#define RLD { \
- UINT8 n = RM(_HL); \
+ uint8_t n = RM(_HL); \
WM( _HL, (n << 4) | (_A & 0x0f) ); \
_A = (_A & 0xf0) | (n >> 4); \
_F = (_F & CF) | SZP[_A]; \
@@ -353,8 +353,8 @@ UINT8 z180_device::DEC(UINT8 value)
***************************************************************/
#define ADD(value) \
{ \
- UINT32 ah = _AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) + value); \
+ uint32_t ah = _AFD & 0xff00; \
+ uint32_t res = (uint8_t)((ah >> 8) + value); \
_F = SZHVC_add[ah | res]; \
_A = res; \
}
@@ -364,8 +364,8 @@ UINT8 z180_device::DEC(UINT8 value)
***************************************************************/
#define ADC(value) \
{ \
- UINT32 ah = _AFD & 0xff00, c = _AFD & 1; \
- UINT32 res = (UINT8)((ah >> 8) + value + c); \
+ uint32_t ah = _AFD & 0xff00, c = _AFD & 1; \
+ uint32_t res = (uint8_t)((ah >> 8) + value + c); \
_F = SZHVC_add[(c << 16) | ah | res]; \
_A = res; \
}
@@ -375,8 +375,8 @@ UINT8 z180_device::DEC(UINT8 value)
***************************************************************/
#define SUB(value) \
{ \
- UINT32 ah = _AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) - value); \
+ uint32_t ah = _AFD & 0xff00; \
+ uint32_t res = (uint8_t)((ah >> 8) - value); \
_F = SZHVC_sub[ah | res]; \
_A = res; \
}
@@ -386,8 +386,8 @@ UINT8 z180_device::DEC(UINT8 value)
***************************************************************/
#define SBC(value) \
{ \
- UINT32 ah = _AFD & 0xff00, c = _AFD & 1; \
- UINT32 res = (UINT8)((ah >> 8) - value - c); \
+ uint32_t ah = _AFD & 0xff00, c = _AFD & 1; \
+ uint32_t res = (uint8_t)((ah >> 8) - value - c); \
_F = SZHVC_sub[(c<<16) | ah | res]; \
_A = res; \
}
@@ -396,7 +396,7 @@ UINT8 z180_device::DEC(UINT8 value)
* NEG
***************************************************************/
#define NEG { \
- UINT8 value = _A; \
+ uint8_t value = _A; \
_A = 0; \
SUB(value); \
}
@@ -405,7 +405,7 @@ UINT8 z180_device::DEC(UINT8 value)
* DAA
***************************************************************/
#define DAA { \
- UINT8 r = _A; \
+ uint8_t r = _A; \
if (_F&NF) { \
if ((_F&HF)|((_A&0xf)>9)) r-=6; \
if ((_F&CF)|(_A>0x99)) r-=0x60; \
@@ -444,8 +444,8 @@ UINT8 z180_device::DEC(UINT8 value)
***************************************************************/
#define CP(value) \
{ \
- UINT32 ah = _AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) - value); \
+ uint32_t ah = _AFD & 0xff00; \
+ uint32_t res = (uint8_t)((ah >> 8) - value); \
_F = SZHVC_sub[ah | res]; \
}
@@ -492,11 +492,11 @@ UINT8 z180_device::DEC(UINT8 value)
***************************************************************/
#define ADD16(DR,SR) \
{ \
- UINT32 res = m_##DR.d + m_##SR.d; \
+ uint32_t res = m_##DR.d + m_##SR.d; \
_F = (_F & (SF | ZF | VF)) | \
(((m_##DR.d ^ res ^ m_##SR.d) >> 8) & HF) | \
((res >> 16) & CF); \
- m_##DR.w.l = (UINT16)res; \
+ m_##DR.w.l = (uint16_t)res; \
}
/***************************************************************
@@ -504,13 +504,13 @@ UINT8 z180_device::DEC(UINT8 value)
***************************************************************/
#define ADC16(DR) \
{ \
- UINT32 res = _HLD + m_##DR.d + (_F & CF); \
+ uint32_t res = _HLD + m_##DR.d + (_F & CF); \
_F = (((_HLD ^ res ^ m_##DR.d) >> 8) & HF) | \
((res >> 16) & CF) | \
((res >> 8) & SF) | \
((res & 0xffff) ? 0 : ZF) | \
(((m_##DR.d ^ _HLD ^ 0x8000) & (m_##DR.d ^ res) & 0x8000) >> 13); \
- _HL = (UINT16)res; \
+ _HL = (uint16_t)res; \
}
/***************************************************************
@@ -518,19 +518,19 @@ UINT8 z180_device::DEC(UINT8 value)
***************************************************************/
#define SBC16(DR) \
{ \
- UINT32 res = _HLD - m_##DR.d - (_F & CF); \
+ uint32_t res = _HLD - m_##DR.d - (_F & CF); \
_F = (((_HLD ^ res ^ m_##DR.d) >> 8) & HF) | NF | \
((res >> 16) & CF) | \
((res >> 8) & SF) | \
((res & 0xffff) ? 0 : ZF) | \
(((m_##DR.d ^ _HLD) & (_HLD ^ res) &0x8000) >> 13); \
- _HL = (UINT16)res; \
+ _HL = (uint16_t)res; \
}
/***************************************************************
* RLC r8
***************************************************************/
-UINT8 z180_device::RLC(UINT8 value)
+uint8_t z180_device::RLC(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -542,7 +542,7 @@ UINT8 z180_device::RLC(UINT8 value)
/***************************************************************
* RRC r8
***************************************************************/
-UINT8 z180_device::RRC(UINT8 value)
+uint8_t z180_device::RRC(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -554,7 +554,7 @@ UINT8 z180_device::RRC(UINT8 value)
/***************************************************************
* RL r8
***************************************************************/
-UINT8 z180_device::RL(UINT8 value)
+uint8_t z180_device::RL(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -566,7 +566,7 @@ UINT8 z180_device::RL(UINT8 value)
/***************************************************************
* RR r8
***************************************************************/
-UINT8 z180_device::RR(UINT8 value)
+uint8_t z180_device::RR(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -578,7 +578,7 @@ UINT8 z180_device::RR(UINT8 value)
/***************************************************************
* SLA r8
***************************************************************/
-UINT8 z180_device::SLA(UINT8 value)
+uint8_t z180_device::SLA(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -590,7 +590,7 @@ UINT8 z180_device::SLA(UINT8 value)
/***************************************************************
* SRA r8
***************************************************************/
-UINT8 z180_device::SRA(UINT8 value)
+uint8_t z180_device::SRA(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -602,7 +602,7 @@ UINT8 z180_device::SRA(UINT8 value)
/***************************************************************
* SLL r8
***************************************************************/
-UINT8 z180_device::SLL(UINT8 value)
+uint8_t z180_device::SLL(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -614,7 +614,7 @@ UINT8 z180_device::SLL(UINT8 value)
/***************************************************************
* SRL r8
***************************************************************/
-UINT8 z180_device::SRL(UINT8 value)
+uint8_t z180_device::SRL(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -639,7 +639,7 @@ UINT8 z180_device::SRL(UINT8 value)
/***************************************************************
* RES bit,r8
***************************************************************/
-UINT8 z180_device::RES(UINT8 bit, UINT8 value)
+uint8_t z180_device::RES(uint8_t bit, uint8_t value)
{
return value & ~(1<<bit);
}
@@ -647,7 +647,7 @@ UINT8 z180_device::RES(UINT8 bit, UINT8 value)
/***************************************************************
* SET bit,r8
***************************************************************/
-UINT8 z180_device::SET(UINT8 bit, UINT8 value)
+uint8_t z180_device::SET(uint8_t bit, uint8_t value)
{
return value | (1<<bit);
}
@@ -656,7 +656,7 @@ UINT8 z180_device::SET(UINT8 bit, UINT8 value)
* LDI
***************************************************************/
#define LDI { \
- UINT8 io = RM(_HL); \
+ uint8_t io = RM(_HL); \
WM( _DE, io ); \
_F &= SF | ZF | CF; \
if( (_A + io) & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
@@ -669,8 +669,8 @@ UINT8 z180_device::SET(UINT8 bit, UINT8 value)
* CPI
***************************************************************/
#define CPI { \
- UINT8 val = RM(_HL); \
- UINT8 res = _A - val; \
+ uint8_t val = RM(_HL); \
+ uint8_t res = _A - val; \
_HL++; _BC--; \
_F = (_F & CF) | (SZ[res] & ~(YF|XF)) | ((_A ^ val ^ res) & HF) | NF; \
if( _F & HF ) res -= 1; \
@@ -683,7 +683,7 @@ UINT8 z180_device::SET(UINT8 bit, UINT8 value)
* INI
***************************************************************/
#define INI { \
- UINT8 io = IN(_BC); \
+ uint8_t io = IN(_BC); \
_B--; \
WM( _HL, io ); \
_HL++; \
@@ -701,7 +701,7 @@ UINT8 z180_device::SET(UINT8 bit, UINT8 value)
* OUTI
***************************************************************/
#define OUTI { \
- UINT8 io = RM(_HL); \
+ uint8_t io = RM(_HL); \
_B--; \
OUT( _BC, io ); \
_HL++; \
@@ -719,7 +719,7 @@ UINT8 z180_device::SET(UINT8 bit, UINT8 value)
* LDD
***************************************************************/
#define LDD { \
- UINT8 io = RM(_HL); \
+ uint8_t io = RM(_HL); \
WM( _DE, io ); \
_F &= SF | ZF | CF; \
if( (_A + io) & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
@@ -732,8 +732,8 @@ UINT8 z180_device::SET(UINT8 bit, UINT8 value)
* CPD
***************************************************************/
#define CPD { \
- UINT8 val = RM(_HL); \
- UINT8 res = _A - val; \
+ uint8_t val = RM(_HL); \
+ uint8_t res = _A - val; \
_HL--; _BC--; \
_F = (_F & CF) | (SZ[res] & ~(YF|XF)) | ((_A ^ val ^ res) & HF) | NF; \
if( _F & HF ) res -= 1; \
@@ -746,7 +746,7 @@ UINT8 z180_device::SET(UINT8 bit, UINT8 value)
* IND
***************************************************************/
#define IND { \
- UINT8 io = IN(_BC); \
+ uint8_t io = IN(_BC); \
_B--; \
WM( _HL, io ); \
_HL--; \
@@ -764,7 +764,7 @@ UINT8 z180_device::SET(UINT8 bit, UINT8 value)
* OUTD
***************************************************************/
#define OUTD { \
- UINT8 io = RM(_HL); \
+ uint8_t io = RM(_HL); \
_B--; \
OUT( _BC, io ); \
_HL--; \
diff --git a/src/devices/cpu/z180/z180tbl.h b/src/devices/cpu/z180/z180tbl.h
index 4884992a5e3..57d1bed3961 100644
--- a/src/devices/cpu/z180/z180tbl.h
+++ b/src/devices/cpu/z180/z180tbl.h
@@ -1,17 +1,17 @@
// license:BSD-3-Clause
// copyright-holders:Juergen Buchmueller
/* tmp1 value for ini/inir/outi/otir for [C.1-0][io.1-0] */
-static const UINT8 irep_tmp1[4][4] = {
+static const uint8_t irep_tmp1[4][4] = {
{0,0,1,0},{0,1,0,1},{1,0,1,1},{0,1,1,0}
};
/* tmp1 value for ind/indr/outd/otdr for [C.1-0][io.1-0] */
-static const UINT8 drep_tmp1[4][4] = {
+static const uint8_t drep_tmp1[4][4] = {
{0,1,0,0},{1,0,0,1},{0,0,1,0},{0,1,0,1}
};
/* tmp2 value for all in/out repeated opcodes for B.7-0 */
-static const UINT8 breg_tmp2[256] = {
+static const uint8_t breg_tmp2[256] = {
0,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,
0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
1,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
@@ -30,7 +30,7 @@ static const UINT8 breg_tmp2[256] = {
1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1
};
-static const UINT8 cc_op[0x100] = {
+static const uint8_t cc_op[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
3, 9, 7, 4, 4, 4, 6, 3, 4, 7, 6, 4, 4, 4, 6, 3,
7, 9, 7, 4, 4, 4, 6, 3, 8, 7, 6, 4, 4, 4, 6, 3,
@@ -50,7 +50,7 @@ static const UINT8 cc_op[0x100] = {
5, 9, 6, 3, 6,11, 6,11, 5, 4, 6, 3, 6, 0, 6,11
};
-static const UINT8 cc_cb[0x100] = {
+static const uint8_t cc_cb[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
@@ -70,7 +70,7 @@ static const UINT8 cc_cb[0x100] = {
7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7
};
-static const UINT8 cc_ed[0x100] = {
+static const uint8_t cc_ed[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6, 9, 6, 6, 6,
12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6, 9, 6, 6, 6,
@@ -90,7 +90,7 @@ static const UINT8 cc_ed[0x100] = {
6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6
};
-static const UINT8 cc_xy[0x100] = {
+static const uint8_t cc_xy[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4,
4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4,
@@ -110,7 +110,7 @@ static const UINT8 cc_xy[0x100] = {
4, 4, 4, 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4
};
-static const UINT8 cc_xycb[0x100] = {
+static const uint8_t cc_xycb[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
@@ -131,7 +131,7 @@ static const UINT8 cc_xycb[0x100] = {
};
/* extra cycles if jr/jp/call taken and 'interrupt latency' on rst 0-7 */
-static const UINT8 cc_ex[0x100] = {
+static const uint8_t cc_ex[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
@@ -151,7 +151,7 @@ static const UINT8 cc_ex[0x100] = {
5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2
};
-static const UINT8 *const cc_default[6] = { cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex };
+static const uint8_t *const cc_default[6] = { cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex };
#define Z180_TABLE_dd Z180_TABLE_xy
#define Z180_TABLE_fd Z180_TABLE_xy
@@ -218,7 +218,7 @@ const z180_device::opcode_func z180_device::s_z180ops[Z180_PREFIX_COUNT][0x100]
***************************************************************/
#define EXEC_PROTOTYPE(prefix) \
-int z180_device::exec##_##prefix(const UINT8 opcode) \
+int z180_device::exec##_##prefix(const uint8_t opcode) \
{ \
(this->*s_z180ops[Z180_PREFIX_##prefix][opcode])(); \
return m_cc[Z180_TABLE_##prefix][opcode]; \
diff --git a/src/devices/cpu/z8/z8.cpp b/src/devices/cpu/z8/z8.cpp
index 7e21e5d2e5b..3ce48319632 100644
--- a/src/devices/cpu/z8/z8.cpp
+++ b/src/devices/cpu/z8/z8.cpp
@@ -170,7 +170,7 @@ static ADDRESS_MAP_START( program_4kb, AS_PROGRAM, 8, z8_device )
ADDRESS_MAP_END
-z8_device::z8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, int size)
+z8_device::z8_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, int size)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, ( size == 4 ) ? ADDRESS_MAP_NAME(program_4kb) : ADDRESS_MAP_NAME(program_2kb))
, m_data_config("data", ENDIANNESS_LITTLE, 8, 16, 0)
@@ -179,25 +179,25 @@ z8_device::z8_device(const machine_config &mconfig, device_type type, const char
}
-z8601_device::z8601_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock)
+z8601_device::z8601_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock)
: z8_device(mconfig, Z8601, "Z8601", _tag, _owner, _clock, "z8601", __FILE__, 2)
{
}
-ub8830d_device::ub8830d_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock)
+ub8830d_device::ub8830d_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock)
: z8_device(mconfig, UB8830D, "UB8830D", _tag, _owner, _clock, "ub8830d", __FILE__, 2)
{
}
-z8611_device::z8611_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock)
+z8611_device::z8611_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock)
: z8_device(mconfig, Z8611, "Z8611", _tag, _owner, _clock, "z8611", __FILE__, 4)
{
}
-offs_t z8_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t z8_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( z8 );
return CPU_DISASSEMBLE_NAME(z8)(this, buffer, pc, oprom, opram, options);
@@ -208,9 +208,9 @@ offs_t z8_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom
INLINE FUNCTIONS
***************************************************************************/
-UINT8 z8_device::fetch()
+uint8_t z8_device::fetch()
{
- UINT8 data = m_direct->read_byte(m_pc);
+ uint8_t data = m_direct->read_byte(m_pc);
m_pc++;
@@ -218,10 +218,10 @@ UINT8 z8_device::fetch()
}
-UINT8 z8_device::register_read(UINT8 offset)
+uint8_t z8_device::register_read(uint8_t offset)
{
- UINT8 data = 0xff;
- UINT8 mask = 0;
+ uint8_t data = 0xff;
+ uint8_t mask = 0;
switch (offset)
{
@@ -312,14 +312,14 @@ UINT8 z8_device::register_read(UINT8 offset)
return data;
}
-UINT16 z8_device::register_pair_read(UINT8 offset)
+uint16_t z8_device::register_pair_read(uint8_t offset)
{
return (register_read(offset) << 8) | register_read(offset + 1);
}
-void z8_device::register_write(UINT8 offset, UINT8 data)
+void z8_device::register_write(uint8_t offset, uint8_t data)
{
- UINT8 mask = 0;
+ uint8_t mask = 0;
switch (offset)
{
@@ -403,18 +403,18 @@ void z8_device::register_write(UINT8 offset, UINT8 data)
m_r[offset] = data;
}
-void z8_device::register_pair_write(UINT8 offset, UINT16 data)
+void z8_device::register_pair_write(uint8_t offset, uint16_t data)
{
register_write(offset, data >> 8);
register_write(offset + 1, data & 0xff);
}
-UINT8 z8_device::get_working_register(int offset)
+uint8_t z8_device::get_working_register(int offset)
{
return (m_r[Z8_REGISTER_RP] & 0xf0) | (offset & 0x0f);
}
-UINT8 z8_device::get_register(UINT8 offset)
+uint8_t z8_device::get_register(uint8_t offset)
{
if ((offset & 0xf0) == 0xe0)
return get_working_register(offset & 0x0f);
@@ -422,17 +422,17 @@ UINT8 z8_device::get_register(UINT8 offset)
return offset;
}
-UINT8 z8_device::get_intermediate_register(int offset)
+uint8_t z8_device::get_intermediate_register(int offset)
{
return register_read(get_register(offset));
}
-void z8_device::stack_push_byte(UINT8 src)
+void z8_device::stack_push_byte(uint8_t src)
{
if (register_read(Z8_REGISTER_P01M) & Z8_P01M_INTERNAL_STACK)
{
/* SP <- SP - 1 */
- UINT8 sp = register_read(Z8_REGISTER_SPL) - 1;
+ uint8_t sp = register_read(Z8_REGISTER_SPL) - 1;
register_write(Z8_REGISTER_SPL, sp);
/* @SP <- src */
@@ -441,7 +441,7 @@ void z8_device::stack_push_byte(UINT8 src)
else
{
/* SP <- SP - 1 */
- UINT16 sp = register_pair_read(Z8_REGISTER_SPH) - 1;
+ uint16_t sp = register_pair_read(Z8_REGISTER_SPH) - 1;
register_pair_write(Z8_REGISTER_SPH, sp);
/* @SP <- src */
@@ -449,12 +449,12 @@ void z8_device::stack_push_byte(UINT8 src)
}
}
-void z8_device::stack_push_word(UINT16 src)
+void z8_device::stack_push_word(uint16_t src)
{
if (register_read(Z8_REGISTER_P01M) & Z8_P01M_INTERNAL_STACK)
{
/* SP <- SP - 2 */
- UINT8 sp = register_read(Z8_REGISTER_SPL) - 2;
+ uint8_t sp = register_read(Z8_REGISTER_SPL) - 2;
register_write(Z8_REGISTER_SPL, sp);
/* @SP <- src */
@@ -463,7 +463,7 @@ void z8_device::stack_push_word(UINT16 src)
else
{
/* SP <- SP - 2 */
- UINT16 sp = register_pair_read(Z8_REGISTER_SPH) - 2;
+ uint16_t sp = register_pair_read(Z8_REGISTER_SPH) - 2;
register_pair_write(Z8_REGISTER_SPH, sp);
/* @SP <- src */
@@ -471,12 +471,12 @@ void z8_device::stack_push_word(UINT16 src)
}
}
-UINT8 z8_device::stack_pop_byte()
+uint8_t z8_device::stack_pop_byte()
{
if (register_read(Z8_REGISTER_P01M) & Z8_P01M_INTERNAL_STACK)
{
/* SP <- SP + 1 */
- UINT8 sp = register_read(Z8_REGISTER_SPL) + 1;
+ uint8_t sp = register_read(Z8_REGISTER_SPL) + 1;
register_write(Z8_REGISTER_SPL, sp);
/* @SP <- src */
@@ -485,7 +485,7 @@ UINT8 z8_device::stack_pop_byte()
else
{
/* SP <- SP + 1 */
- UINT16 sp = register_pair_read(Z8_REGISTER_SPH) + 1;
+ uint16_t sp = register_pair_read(Z8_REGISTER_SPH) + 1;
register_pair_write(Z8_REGISTER_SPH, sp);
/* @SP <- src */
@@ -493,12 +493,12 @@ UINT8 z8_device::stack_pop_byte()
}
}
-UINT16 z8_device::stack_pop_word()
+uint16_t z8_device::stack_pop_word()
{
if (register_read(Z8_REGISTER_P01M) & Z8_P01M_INTERNAL_STACK)
{
/* SP <- SP + 2 */
- UINT8 sp = register_read(Z8_REGISTER_SPL) + 2;
+ uint8_t sp = register_read(Z8_REGISTER_SPL) + 2;
register_write(Z8_REGISTER_SPL, sp);
/* @SP <- src */
@@ -507,7 +507,7 @@ UINT16 z8_device::stack_pop_word()
else
{
/* SP <- SP + 2 */
- UINT16 sp = register_pair_read(Z8_REGISTER_SPH) + 2;
+ uint16_t sp = register_pair_read(Z8_REGISTER_SPH) + 2;
register_pair_write(Z8_REGISTER_SPH, sp);
/* @SP <- src */
@@ -515,7 +515,7 @@ UINT16 z8_device::stack_pop_word()
}
}
-void z8_device::set_flag(UINT8 flag, int state)
+void z8_device::set_flag(uint8_t flag, int state)
{
if (state)
m_r[Z8_REGISTER_FLAGS] |= flag;
@@ -534,7 +534,7 @@ void z8_device::set_flag(UINT8 flag, int state)
OPCODE HANDLERS
***************************************************************************/
-#define INSTRUCTION(mnemonic) void z8_device::mnemonic(UINT8 opcode, int *cycles)
+#define INSTRUCTION(mnemonic) void z8_device::mnemonic(uint8_t opcode, int *cycles)
INSTRUCTION( illegal )
{
@@ -726,7 +726,7 @@ void z8_device::execute_run()
{
do
{
- UINT8 opcode;
+ uint8_t opcode;
int cycles;
debugger_instruction_hook(this, m_pc);
diff --git a/src/devices/cpu/z8/z8.h b/src/devices/cpu/z8/z8.h
index 758ae7c5366..1d3afb9aaa0 100644
--- a/src/devices/cpu/z8/z8.h
+++ b/src/devices/cpu/z8/z8.h
@@ -24,7 +24,7 @@ class z8_device : public cpu_device
{
public:
// construction/destruction
- z8_device(const machine_config &mconfig, device_type type, const char *name, const char *_tag, device_t *_owner, UINT32 _clock, const char *shortname, const char *source, int size);
+ z8_device(const machine_config &mconfig, device_type type, const char *name, const char *_tag, device_t *_owner, uint32_t _clock, const char *shortname, const char *source, int size);
protected:
// device-level overrides
@@ -32,11 +32,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 6; }
- virtual UINT32 execute_max_cycles() const override { return 20; }
- virtual UINT32 execute_input_lines() const override { return 4; }
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); }
+ virtual uint32_t execute_min_cycles() const override { return 6; }
+ virtual uint32_t execute_max_cycles() const override { return 20; }
+ virtual uint32_t execute_input_lines() const override { return 4; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -59,9 +59,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 3; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 3; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
@@ -75,16 +75,16 @@ private:
address_space *m_io;
/* registers */
- UINT16 m_pc; /* program counter */
- UINT8 m_r[256]; /* register file */
- UINT8 m_input[4]; /* port input latches */
- UINT8 m_output[4]; /* port output latches */
- UINT8 m_t0; /* timer 0 current count */
- UINT8 m_t1; /* timer 1 current count */
+ uint16_t m_pc; /* program counter */
+ uint8_t m_r[256]; /* register file */
+ uint8_t m_input[4]; /* port input latches */
+ uint8_t m_output[4]; /* port output latches */
+ uint8_t m_t0; /* timer 0 current count */
+ uint8_t m_t1; /* timer 1 current count */
/* fake registers */
- UINT16 m_fake_sp; /* fake stack pointer */
- UINT8 m_fake_r[16]; /* fake working registers */
+ uint16_t m_fake_sp; /* fake stack pointer */
+ uint8_t m_fake_r[16]; /* fake working registers */
/* interrupts */
int m_irq[6]; /* interrupts */
@@ -99,54 +99,54 @@ private:
TIMER_CALLBACK_MEMBER( t0_tick );
TIMER_CALLBACK_MEMBER( t1_tick );
- inline UINT8 fetch();
- inline UINT8 register_read(UINT8 offset);
- inline UINT16 register_pair_read(UINT8 offset);
- inline void register_write(UINT8 offset, UINT8 data);
- inline void register_pair_write(UINT8 offset, UINT16 data);
- inline UINT8 get_working_register(int offset);
- inline UINT8 get_register(UINT8 offset);
- inline UINT8 get_intermediate_register(int offset);
- inline void stack_push_byte(UINT8 src);
- inline void stack_push_word(UINT16 src);
- inline UINT8 stack_pop_byte();
- inline UINT16 stack_pop_word();
- inline void set_flag(UINT8 flag, int state);
- inline void clear(UINT8 dst);
- inline void load(UINT8 dst, UINT8 src);
+ inline uint8_t fetch();
+ inline uint8_t register_read(uint8_t offset);
+ inline uint16_t register_pair_read(uint8_t offset);
+ inline void register_write(uint8_t offset, uint8_t data);
+ inline void register_pair_write(uint8_t offset, uint16_t data);
+ inline uint8_t get_working_register(int offset);
+ inline uint8_t get_register(uint8_t offset);
+ inline uint8_t get_intermediate_register(int offset);
+ inline void stack_push_byte(uint8_t src);
+ inline void stack_push_word(uint16_t src);
+ inline uint8_t stack_pop_byte();
+ inline uint16_t stack_pop_word();
+ inline void set_flag(uint8_t flag, int state);
+ inline void clear(uint8_t dst);
+ inline void load(uint8_t dst, uint8_t src);
inline void load_from_memory(address_space *space);
inline void load_to_memory(address_space *space);
inline void load_from_memory_autoinc(address_space *space);
inline void load_to_memory_autoinc(address_space *space);
- inline void pop(UINT8 dst);
- inline void push(UINT8 src);
- inline void add_carry(UINT8 dst, INT8 src);
- inline void add(UINT8 dst, INT8 src);
- inline void compare(UINT8 dst, UINT8 src);
- inline void decimal_adjust(UINT8 dst);
- inline void decrement(UINT8 dst);
- inline void decrement_word(UINT8 dst);
- inline void increment(UINT8 dst);
- inline void increment_word(UINT8 dst);
- inline void subtract_carry(UINT8 dst, UINT8 src);
- inline void subtract(UINT8 dst, UINT8 src);
- inline void _and(UINT8 dst, UINT8 src);
- inline void complement(UINT8 dst);
- inline void _or(UINT8 dst, UINT8 src);
- inline void _xor(UINT8 dst, UINT8 src);
- inline void call(UINT16 dst);
- inline void jump(UINT16 dst);
+ inline void pop(uint8_t dst);
+ inline void push(uint8_t src);
+ inline void add_carry(uint8_t dst, int8_t src);
+ inline void add(uint8_t dst, int8_t src);
+ inline void compare(uint8_t dst, uint8_t src);
+ inline void decimal_adjust(uint8_t dst);
+ inline void decrement(uint8_t dst);
+ inline void decrement_word(uint8_t dst);
+ inline void increment(uint8_t dst);
+ inline void increment_word(uint8_t dst);
+ inline void subtract_carry(uint8_t dst, uint8_t src);
+ inline void subtract(uint8_t dst, uint8_t src);
+ inline void _and(uint8_t dst, uint8_t src);
+ inline void complement(uint8_t dst);
+ inline void _or(uint8_t dst, uint8_t src);
+ inline void _xor(uint8_t dst, uint8_t src);
+ inline void call(uint16_t dst);
+ inline void jump(uint16_t dst);
inline int check_condition_code(int cc);
- inline void test_complement_under_mask(UINT8 dst, UINT8 src);
- inline void test_under_mask(UINT8 dst, UINT8 src);
- inline void rotate_left(UINT8 dst);
- inline void rotate_left_carry(UINT8 dst);
- inline void rotate_right(UINT8 dst);
- inline void rotate_right_carry(UINT8 dst);
- inline void shift_right_arithmetic(UINT8 dst);
- inline void swap(UINT8 dst);
-
- #define INSTRUCTION(inst) void inst(UINT8 opcode, int *cycles);
+ inline void test_complement_under_mask(uint8_t dst, uint8_t src);
+ inline void test_under_mask(uint8_t dst, uint8_t src);
+ inline void rotate_left(uint8_t dst);
+ inline void rotate_left_carry(uint8_t dst);
+ inline void rotate_right(uint8_t dst);
+ inline void rotate_right_carry(uint8_t dst);
+ inline void shift_right_arithmetic(uint8_t dst);
+ inline void swap(uint8_t dst);
+
+ #define INSTRUCTION(inst) void inst(uint8_t opcode, int *cycles);
INSTRUCTION( illegal )
INSTRUCTION( clr_R1 )
INSTRUCTION( clr_IR1 )
@@ -277,7 +277,7 @@ private:
INSTRUCTION( srp_IM )
#undef INSTRUCTION
- typedef void (z8_device::*z8_opcode_func) (UINT8 opcode, int *cycles);
+ typedef void (z8_device::*z8_opcode_func) (uint8_t opcode, int *cycles);
struct z8_opcode_map
{
z8_opcode_func function;
@@ -292,21 +292,21 @@ private:
class z8601_device : public z8_device
{
public:
- z8601_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ z8601_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
};
class ub8830d_device : public z8_device
{
public:
- ub8830d_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ ub8830d_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
};
class z8611_device : public z8_device
{
public:
- z8611_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
+ z8611_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
};
diff --git a/src/devices/cpu/z8/z8dasm.cpp b/src/devices/cpu/z8/z8dasm.cpp
index 3801ca5c34b..3b342d98628 100644
--- a/src/devices/cpu/z8/z8dasm.cpp
+++ b/src/devices/cpu/z8/z8dasm.cpp
@@ -68,7 +68,7 @@ static const char *const CONDITION_CODE[16] =
#define arg_IR(_value) if ((_value & 0xf0) == 0xe0) ARG(Ir, _value & 0x0f) else ARG(IR, _value)
#define arg_IRR(_value) if ((_value & 0xf0) == 0xe0) ARG(Irr, _value & 0x0f) else ARG(IRR, _value)
#define arg_IM(_value) ARG(IM, _value)
-#define arg_RA ARG(RA, pc + (INT8)B0 + 2)
+#define arg_RA ARG(RA, pc + (int8_t)B0 + 2)
#define arg_DA ARG(DA, B0 << 8 | B1)
#define arg_X(_value1, _value2) { if (argc) dst += sprintf(dst, ", "); dst += sprintf(dst, X, _value1, _value2); argc++; }
@@ -84,9 +84,9 @@ static const char *const CONDITION_CODE[16] =
CPU_DISASSEMBLE( z8 )
{
- const UINT8 *startrom = oprom;
- UINT32 flags = 0;
- UINT8 opcode = *oprom++;
+ const uint8_t *startrom = oprom;
+ uint32_t flags = 0;
+ uint8_t opcode = *oprom++;
char *dst = buffer;
int argc = 0;
diff --git a/src/devices/cpu/z8/z8ops.hxx b/src/devices/cpu/z8/z8ops.hxx
index 4c522791b8e..48d0b226859 100644
--- a/src/devices/cpu/z8/z8ops.hxx
+++ b/src/devices/cpu/z8/z8ops.hxx
@@ -20,96 +20,96 @@
#define flag(_flag) ((m_r[Z8_REGISTER_FLAGS] & Z8_FLAGS##_##_flag) ? 1 : 0)
#define mode_r1_r2(_func) \
- UINT8 dst_src = fetch();\
- UINT8 dst = r(dst_src >> 4);\
- UINT8 src = read(r(dst_src & 0x0f));\
+ uint8_t dst_src = fetch();\
+ uint8_t dst = r(dst_src >> 4);\
+ uint8_t src = read(r(dst_src & 0x0f));\
_func(dst, src);
#define mode_r1_Ir2(_func) \
- UINT8 dst_src = fetch();\
- UINT8 dst = r(dst_src >> 4);\
- UINT8 src = read(Ir(dst_src & 0x0f));\
+ uint8_t dst_src = fetch();\
+ uint8_t dst = r(dst_src >> 4);\
+ uint8_t src = read(Ir(dst_src & 0x0f));\
_func(dst, src);
#define mode_R2_R1(_func) \
- UINT8 src = read(R);\
- UINT8 dst = R;\
+ uint8_t src = read(R);\
+ uint8_t dst = R;\
_func(dst, src);
#define mode_IR2_R1(_func) \
- UINT8 src = read(R);\
- UINT8 dst = IR;\
+ uint8_t src = read(R);\
+ uint8_t dst = IR;\
_func(dst, src);
#define mode_R1_IM(_func) \
- UINT8 dst = R;\
- UINT8 src = IM;\
+ uint8_t dst = R;\
+ uint8_t src = IM;\
_func(dst, src);
#define mode_IR1_IM(_func) \
- UINT8 dst = IR;\
- UINT8 src = IM;\
+ uint8_t dst = IR;\
+ uint8_t src = IM;\
_func(dst, src);
#define mode_r1(_func) \
- UINT8 dst = r(opcode >> 4);\
+ uint8_t dst = r(opcode >> 4);\
_func(dst);
#define mode_R1(_func) \
- UINT8 dst = R;\
+ uint8_t dst = R;\
_func(dst);
#define mode_RR1(_func) \
- UINT8 dst = R;\
+ uint8_t dst = R;\
_func(dst);
#define mode_IR1(_func) \
- UINT8 dst = IR;\
+ uint8_t dst = IR;\
_func(dst);
#define mode_r1_IM(_func) \
- UINT8 dst = r(opcode >> 4);\
- UINT8 src = IM;\
+ uint8_t dst = r(opcode >> 4);\
+ uint8_t src = IM;\
_func(dst, src);
#define mode_r1_R2(_func) \
- UINT8 dst = r(opcode >> 4);\
- UINT8 src = read(R);\
+ uint8_t dst = r(opcode >> 4);\
+ uint8_t src = read(R);\
_func(dst, src);
#define mode_r2_R1(_func) \
- UINT8 src = read(r(opcode >> 4));\
- UINT8 dst = R;\
+ uint8_t src = read(r(opcode >> 4));\
+ uint8_t dst = R;\
_func(dst, src);
#define mode_Ir1_r2(_func) \
- UINT8 dst_src = fetch();\
- UINT8 dst = Ir(dst_src >> 4);\
- UINT8 src = read(r(dst_src & 0x0f));\
+ uint8_t dst_src = fetch();\
+ uint8_t dst = Ir(dst_src >> 4);\
+ uint8_t src = read(r(dst_src & 0x0f));\
_func(dst, src);
#define mode_R2_IR1(_func) \
- UINT8 src = read(R);\
- UINT8 dst = IR;\
+ uint8_t src = read(R);\
+ uint8_t dst = IR;\
_func(dst, src);
#define mode_r1_x_R2(_func) \
- UINT8 dst_src = fetch();\
- UINT8 dst = r(dst_src >> 4);\
- UINT8 src = read(read(r(dst_src & 0x0f)) + R);\
+ uint8_t dst_src = fetch();\
+ uint8_t dst = r(dst_src >> 4);\
+ uint8_t src = read(read(r(dst_src & 0x0f)) + R);\
_func(dst, src);
#define mode_r2_x_R1(_func) \
- UINT8 dst_src = fetch();\
- UINT8 dst = R + read(r(dst_src & 0x0f));\
- UINT8 src = read(r(dst_src >> 4));\
+ uint8_t dst_src = fetch();\
+ uint8_t dst = R + read(r(dst_src & 0x0f));\
+ uint8_t src = read(r(dst_src >> 4));\
_func(dst, src);
/***************************************************************************
LOAD INSTRUCTIONS
***************************************************************************/
-void z8_device::clear(UINT8 dst)
+void z8_device::clear(uint8_t dst)
{
/* dst <- 0 */
register_write(dst, 0);
@@ -118,7 +118,7 @@ void z8_device::clear(UINT8 dst)
INSTRUCTION( clr_R1 ) { mode_R1(clear) }
INSTRUCTION( clr_IR1 ) { mode_IR1(clear) }
-void z8_device::load(UINT8 dst, UINT8 src)
+void z8_device::load(uint8_t dst, uint8_t src)
{
/* dst <- src */
register_write(dst, src);
@@ -141,37 +141,37 @@ INSTRUCTION( ld_IR1_IM ) { mode_IR1_IM(load) }
void z8_device::load_from_memory(address_space *space)
{
- UINT8 operands = fetch();
- UINT8 dst = get_working_register(operands >> 4);
- UINT8 src = get_working_register(operands & 0x0f);
+ uint8_t operands = fetch();
+ uint8_t dst = get_working_register(operands >> 4);
+ uint8_t src = get_working_register(operands & 0x0f);
- UINT16 address = register_pair_read(src);
- UINT8 data = m_direct->read_byte(address);
+ uint16_t address = register_pair_read(src);
+ uint8_t data = m_direct->read_byte(address);
register_write(dst, data);
}
void z8_device::load_to_memory(address_space *space)
{
- UINT8 operands = fetch();
- UINT8 src = get_working_register(operands >> 4);
- UINT8 dst = get_working_register(operands & 0x0f);
+ uint8_t operands = fetch();
+ uint8_t src = get_working_register(operands >> 4);
+ uint8_t dst = get_working_register(operands & 0x0f);
- UINT16 address = register_pair_read(dst);
- UINT8 data = register_read(src);
+ uint16_t address = register_pair_read(dst);
+ uint8_t data = register_read(src);
m_program->write_byte(address, data);
}
void z8_device::load_from_memory_autoinc(address_space *space)
{
- UINT8 operands = fetch();
- UINT8 dst = get_working_register(operands >> 4);
- UINT8 real_dst = get_intermediate_register(dst);
- UINT8 src = get_working_register(operands & 0x0f);
+ uint8_t operands = fetch();
+ uint8_t dst = get_working_register(operands >> 4);
+ uint8_t real_dst = get_intermediate_register(dst);
+ uint8_t src = get_working_register(operands & 0x0f);
- UINT16 address = register_pair_read(src);
- UINT8 data = m_direct->read_byte(address);
+ uint16_t address = register_pair_read(src);
+ uint8_t data = m_direct->read_byte(address);
register_write(real_dst, data);
@@ -181,13 +181,13 @@ void z8_device::load_from_memory_autoinc(address_space *space)
void z8_device::load_to_memory_autoinc(address_space *space)
{
- UINT8 operands = fetch();
- UINT8 src = get_working_register(operands >> 4);
- UINT8 dst = get_working_register(operands & 0x0f);
- UINT8 real_src = get_intermediate_register(src);
+ uint8_t operands = fetch();
+ uint8_t src = get_working_register(operands >> 4);
+ uint8_t dst = get_working_register(operands & 0x0f);
+ uint8_t real_src = get_intermediate_register(src);
- UINT16 address = register_pair_read(dst);
- UINT8 data = register_read(real_src);
+ uint16_t address = register_pair_read(dst);
+ uint8_t data = register_read(real_src);
m_program->write_byte(address, data);
@@ -204,7 +204,7 @@ INSTRUCTION( lde_r2_Irr1 ) { load_to_memory(m_data); }
INSTRUCTION( ldei_Ir1_Irr2 ) { load_from_memory_autoinc(m_data); }
INSTRUCTION( ldei_Ir2_Irr1 ) { load_to_memory_autoinc(m_data); }
-void z8_device::pop(UINT8 dst)
+void z8_device::pop(uint8_t dst)
{
/* dst <- @SP
SP <- SP + 1 */
@@ -214,7 +214,7 @@ void z8_device::pop(UINT8 dst)
INSTRUCTION( pop_R1 ) { mode_R1(pop) }
INSTRUCTION( pop_IR1 ) { mode_IR1(pop) }
-void z8_device::push(UINT8 src)
+void z8_device::push(uint8_t src)
{
/* SP <- SP - 1
@SP <- src */
@@ -228,11 +228,11 @@ INSTRUCTION( push_IR2 ) { mode_IR1(push) }
ARITHMETIC INSTRUCTIONS
***************************************************************************/
-void z8_device::add_carry(UINT8 dst, INT8 src)
+void z8_device::add_carry(uint8_t dst, int8_t src)
{
/* dst <- dst + src + C */
- UINT8 data = register_read(dst);
- UINT16 new_data = data + src + flag(C);
+ uint8_t data = register_read(dst);
+ uint16_t new_data = data + src + flag(C);
set_flag_c(new_data & 0x100);
set_flag_z(new_data == 0);
@@ -251,11 +251,11 @@ INSTRUCTION( adc_IR2_R1 ) { mode_IR2_R1(add_carry) }
INSTRUCTION( adc_R1_IM ) { mode_R1_IM(add_carry) }
INSTRUCTION( adc_IR1_IM ) { mode_IR1_IM(add_carry) }
-void z8_device::add(UINT8 dst, INT8 src)
+void z8_device::add(uint8_t dst, int8_t src)
{
/* dst <- dst + src */
- UINT8 data = register_read(dst);
- UINT16 new_data = data + src;
+ uint8_t data = register_read(dst);
+ uint16_t new_data = data + src;
set_flag_c(new_data & 0x100);
set_flag_z(new_data == 0);
@@ -274,11 +274,11 @@ INSTRUCTION( add_IR2_R1 ) { mode_IR2_R1(add) }
INSTRUCTION( add_R1_IM ) { mode_R1_IM(add) }
INSTRUCTION( add_IR1_IM ) { mode_IR1_IM(add) }
-void z8_device::compare(UINT8 dst, UINT8 src)
+void z8_device::compare(uint8_t dst, uint8_t src)
{
/* dst - src */
- UINT8 data = register_read(dst);
- UINT16 new_data = data - src;
+ uint8_t data = register_read(dst);
+ uint16_t new_data = data - src;
set_flag_c(!(new_data & 0x100));
set_flag_z(new_data == 0);
@@ -293,17 +293,17 @@ INSTRUCTION( cp_IR2_R1 ) { mode_IR2_R1(compare) }
INSTRUCTION( cp_R1_IM ) { mode_R1_IM(compare) }
INSTRUCTION( cp_IR1_IM ) { mode_IR1_IM(compare) }
-void z8_device::decimal_adjust(UINT8 dst)
+void z8_device::decimal_adjust(uint8_t dst)
{
}
INSTRUCTION( da_R1 ) { mode_R1(decimal_adjust) }
INSTRUCTION( da_IR1 ) { mode_IR1(decimal_adjust) }
-void z8_device::decrement(UINT8 dst)
+void z8_device::decrement(uint8_t dst)
{
/* dst <- dst - 1 */
- UINT8 data = register_read(dst) - 1;
+ uint8_t data = register_read(dst) - 1;
set_flag_z(data == 0);
set_flag_s(data & 0x80);
@@ -315,10 +315,10 @@ void z8_device::decrement(UINT8 dst)
INSTRUCTION( dec_R1 ) { mode_R1(decrement) }
INSTRUCTION( dec_IR1 ) { mode_IR1(decrement) }
-void z8_device::decrement_word(UINT8 dst)
+void z8_device::decrement_word(uint8_t dst)
{
/* dst <- dst - 1 */
- UINT16 data = register_pair_read(dst) - 1;
+ uint16_t data = register_pair_read(dst) - 1;
set_flag_z(data == 0);
set_flag_s(data & 0x8000);
@@ -330,10 +330,10 @@ void z8_device::decrement_word(UINT8 dst)
INSTRUCTION( decw_RR1 ) { mode_RR1(decrement_word) }
INSTRUCTION( decw_IR1 ) { mode_IR1(decrement_word) }
-void z8_device::increment(UINT8 dst)
+void z8_device::increment(uint8_t dst)
{
/* dst <- dst + 1 */
- UINT8 data = register_read(dst) + 1;
+ uint8_t data = register_read(dst) + 1;
set_flag_z(data == 0);
set_flag_s(data & 0x80);
@@ -346,10 +346,10 @@ INSTRUCTION( inc_r1 ) { mode_r1(increment) }
INSTRUCTION( inc_R1 ) { mode_R1(increment) }
INSTRUCTION( inc_IR1 ) { mode_IR1(increment) }
-void z8_device::increment_word(UINT8 dst)
+void z8_device::increment_word(uint8_t dst)
{
/* dst <- dst + 1 */
- UINT16 data = register_pair_read(dst) + 1;
+ uint16_t data = register_pair_read(dst) + 1;
set_flag_z(data == 0);
set_flag_s(data & 0x8000);
@@ -361,11 +361,11 @@ void z8_device::increment_word(UINT8 dst)
INSTRUCTION( incw_RR1 ) { mode_RR1(increment_word) }
INSTRUCTION( incw_IR1 ) { mode_IR1(increment_word) }
-void z8_device::subtract_carry(UINT8 dst, UINT8 src)
+void z8_device::subtract_carry(uint8_t dst, uint8_t src)
{
/* dst <- dst - src - C */
- UINT8 data = register_read(dst);
- UINT16 new_data = data - src;
+ uint8_t data = register_read(dst);
+ uint16_t new_data = data - src;
set_flag_c(!(new_data & 0x100));
set_flag_z(new_data == 0);
@@ -384,11 +384,11 @@ INSTRUCTION( sbc_IR2_R1 ) { mode_IR2_R1(subtract_carry) }
INSTRUCTION( sbc_R1_IM ) { mode_R1_IM(subtract_carry) }
INSTRUCTION( sbc_IR1_IM ) { mode_IR1_IM(subtract_carry) }
-void z8_device::subtract(UINT8 dst, UINT8 src)
+void z8_device::subtract(uint8_t dst, uint8_t src)
{
/* dst <- dst - src */
- UINT8 data = register_read(dst);
- UINT16 new_data = data - src;
+ uint8_t data = register_read(dst);
+ uint16_t new_data = data - src;
set_flag_c(!(new_data & 0x100));
set_flag_z(new_data == 0);
@@ -411,10 +411,10 @@ INSTRUCTION( sub_IR1_IM ) { mode_IR1_IM(subtract) }
LOGICAL INSTRUCTIONS
***************************************************************************/
-void z8_device::_and(UINT8 dst, UINT8 src)
+void z8_device::_and(uint8_t dst, uint8_t src)
{
/* dst <- dst AND src */
- UINT8 data = register_read(dst) & src;
+ uint8_t data = register_read(dst) & src;
register_write(dst, data);
set_flag_z(data == 0);
@@ -429,10 +429,10 @@ INSTRUCTION( and_IR2_R1 ) { mode_IR2_R1(_and) }
INSTRUCTION( and_R1_IM ) { mode_R1_IM(_and) }
INSTRUCTION( and_IR1_IM ) { mode_IR1_IM(_and) }
-void z8_device::complement(UINT8 dst)
+void z8_device::complement(uint8_t dst)
{
/* dst <- NOT dst */
- UINT8 data = register_read(dst) ^ 0xff;
+ uint8_t data = register_read(dst) ^ 0xff;
register_write(dst, data);
set_flag_z(data == 0);
@@ -443,10 +443,10 @@ void z8_device::complement(UINT8 dst)
INSTRUCTION( com_R1 ) { mode_R1(complement) }
INSTRUCTION( com_IR1 ) { mode_IR1(complement) }
-void z8_device::_or(UINT8 dst, UINT8 src)
+void z8_device::_or(uint8_t dst, uint8_t src)
{
/* dst <- dst OR src */
- UINT8 data = register_read(dst) | src;
+ uint8_t data = register_read(dst) | src;
register_write(dst, data);
set_flag_z(data == 0);
@@ -461,10 +461,10 @@ INSTRUCTION( or_IR2_R1 ) { mode_IR2_R1(_or) }
INSTRUCTION( or_R1_IM ) { mode_R1_IM(_or) }
INSTRUCTION( or_IR1_IM ) { mode_IR1_IM(_or) }
-void z8_device::_xor(UINT8 dst, UINT8 src)
+void z8_device::_xor(uint8_t dst, uint8_t src)
{
/* dst <- dst XOR src */
- UINT8 data = register_read(dst) ^ src;
+ uint8_t data = register_read(dst) ^ src;
register_write(dst, data);
set_flag_z(data == 0);
@@ -483,22 +483,22 @@ INSTRUCTION( xor_IR1_IM ) { mode_IR1_IM(_xor) }
PROGRAM CONTROL INSTRUCTIONS
***************************************************************************/
-void z8_device::call(UINT16 dst)
+void z8_device::call(uint16_t dst)
{
stack_push_word(m_pc);
m_pc = dst;
}
-INSTRUCTION( call_IRR1 ) { UINT16 dst = register_pair_read(get_intermediate_register(get_register(fetch()))); call(dst); }
-INSTRUCTION( call_DA ) { UINT16 dst = (fetch() << 8) | fetch(); call(dst); }
+INSTRUCTION( call_IRR1 ) { uint16_t dst = register_pair_read(get_intermediate_register(get_register(fetch()))); call(dst); }
+INSTRUCTION( call_DA ) { uint16_t dst = (fetch() << 8) | fetch(); call(dst); }
INSTRUCTION( djnz_r1_RA )
{
- INT8 ra = (INT8)fetch();
+ int8_t ra = (int8_t)fetch();
/* r <- r - 1 */
int r = get_working_register(opcode >> 4);
- UINT8 data = register_read(r) - 1;
+ uint8_t data = register_read(r) - 1;
register_write(r, data);
/* if r<>0, PC <- PC + dst */
@@ -530,7 +530,7 @@ INSTRUCTION( ret )
m_pc = stack_pop_word();
}
-void z8_device::jump(UINT16 dst)
+void z8_device::jump(uint16_t dst)
{
/* PC <- dst */
m_pc = dst;
@@ -567,7 +567,7 @@ int z8_device::check_condition_code(int cc)
INSTRUCTION( jp_cc_DA )
{
- UINT16 dst = (fetch() << 8) | fetch();
+ uint16_t dst = (fetch() << 8) | fetch();
/* if cc is true, then PC <- dst */
if (check_condition_code(opcode >> 4))
@@ -579,8 +579,8 @@ INSTRUCTION( jp_cc_DA )
INSTRUCTION( jr_cc_RA )
{
- INT8 ra = (INT8)fetch();
- UINT16 dst = m_pc + ra;
+ int8_t ra = (int8_t)fetch();
+ uint16_t dst = m_pc + ra;
/* if cc is true, then PC <- dst */
if (check_condition_code(opcode >> 4))
@@ -594,10 +594,10 @@ INSTRUCTION( jr_cc_RA )
BIT MANIPULATION INSTRUCTIONS
***************************************************************************/
-void z8_device::test_complement_under_mask(UINT8 dst, UINT8 src)
+void z8_device::test_complement_under_mask(uint8_t dst, uint8_t src)
{
/* NOT(dst) AND src */
- UINT8 data = (register_read(dst) ^ 0xff) & src;
+ uint8_t data = (register_read(dst) ^ 0xff) & src;
set_flag_z(data == 0);
set_flag_s(data & 0x80);
@@ -611,10 +611,10 @@ INSTRUCTION( tcm_IR2_R1 ) { mode_IR2_R1(test_complement_under_mask) }
INSTRUCTION( tcm_R1_IM ) { mode_R1_IM(test_complement_under_mask) }
INSTRUCTION( tcm_IR1_IM ) { mode_IR1_IM(test_complement_under_mask) }
-void z8_device::test_under_mask(UINT8 dst, UINT8 src)
+void z8_device::test_under_mask(uint8_t dst, uint8_t src)
{
/* dst AND src */
- UINT8 data = register_read(dst) & src;
+ uint8_t data = register_read(dst) & src;
set_flag_z(data == 0);
set_flag_s(data & 0x80);
@@ -632,11 +632,11 @@ INSTRUCTION( tm_IR1_IM ) { mode_IR1_IM(test_under_mask) }
ROTATE AND SHIFT INSTRUCTIONS
***************************************************************************/
-void z8_device::rotate_left(UINT8 dst)
+void z8_device::rotate_left(uint8_t dst)
{
/* << */
- UINT8 data = register_read(dst);
- UINT8 new_data = (data << 1) | BIT(data, 7);
+ uint8_t data = register_read(dst);
+ uint8_t new_data = (data << 1) | BIT(data, 7);
set_flag_c(data & 0x80);
set_flag_z(data == 0);
@@ -649,11 +649,11 @@ void z8_device::rotate_left(UINT8 dst)
INSTRUCTION( rl_R1 ) { mode_R1(rotate_left) }
INSTRUCTION( rl_IR1 ) { mode_IR1(rotate_left) }
-void z8_device::rotate_left_carry(UINT8 dst)
+void z8_device::rotate_left_carry(uint8_t dst)
{
/* << C */
- UINT8 data = register_read(dst);
- UINT8 new_data = (data << 1) | flag(C);
+ uint8_t data = register_read(dst);
+ uint8_t new_data = (data << 1) | flag(C);
set_flag_c(data & 0x80);
set_flag_z(data == 0);
@@ -666,11 +666,11 @@ void z8_device::rotate_left_carry(UINT8 dst)
INSTRUCTION( rlc_R1 ) { mode_R1(rotate_left_carry) }
INSTRUCTION( rlc_IR1 ) { mode_IR1(rotate_left_carry) }
-void z8_device::rotate_right(UINT8 dst)
+void z8_device::rotate_right(uint8_t dst)
{
/* >> */
- UINT8 data = register_read(dst);
- UINT8 new_data = ((data & 0x01) << 7) | (data >> 1);
+ uint8_t data = register_read(dst);
+ uint8_t new_data = ((data & 0x01) << 7) | (data >> 1);
set_flag_c(data & 0x01);
set_flag_z(data == 0);
@@ -683,11 +683,11 @@ void z8_device::rotate_right(UINT8 dst)
INSTRUCTION( rr_R1 ) { mode_R1(rotate_right) }
INSTRUCTION( rr_IR1 ) { mode_IR1(rotate_right) }
-void z8_device::rotate_right_carry(UINT8 dst)
+void z8_device::rotate_right_carry(uint8_t dst)
{
/* >> C */
- UINT8 data = register_read(dst);
- UINT8 new_data = (flag(C) << 7) | (data >> 1);
+ uint8_t data = register_read(dst);
+ uint8_t new_data = (flag(C) << 7) | (data >> 1);
set_flag_c(data & 0x01);
set_flag_z(data == 0);
@@ -700,11 +700,11 @@ void z8_device::rotate_right_carry(UINT8 dst)
INSTRUCTION( rrc_R1 ) { mode_R1(rotate_right_carry) }
INSTRUCTION( rrc_IR1 ) { mode_IR1(rotate_right_carry) }
-void z8_device::shift_right_arithmetic(UINT8 dst)
+void z8_device::shift_right_arithmetic(uint8_t dst)
{
/* */
- UINT8 data = register_read(dst);
- UINT8 new_data = (data & 0x80) | ((data >> 1) & 0x7f);
+ uint8_t data = register_read(dst);
+ uint8_t new_data = (data & 0x80) | ((data >> 1) & 0x7f);
set_flag_c(data & 0x01);
set_flag_z(data == 0);
@@ -717,10 +717,10 @@ void z8_device::shift_right_arithmetic(UINT8 dst)
INSTRUCTION( sra_R1 ) { mode_R1(shift_right_arithmetic) }
INSTRUCTION( sra_IR1 ) { mode_IR1(shift_right_arithmetic) }
-void z8_device::swap(UINT8 dst)
+void z8_device::swap(uint8_t dst)
{
/* dst(7-4) <-> dst(3-0) */
- UINT8 data = register_read(dst);
+ uint8_t data = register_read(dst);
data = (data << 4) | (data >> 4);
register_write(dst, data);
diff --git a/src/devices/cpu/z80/kl5c80a12.cpp b/src/devices/cpu/z80/kl5c80a12.cpp
index 7d6cdf70538..1fa24b2365a 100644
--- a/src/devices/cpu/z80/kl5c80a12.cpp
+++ b/src/devices/cpu/z80/kl5c80a12.cpp
@@ -18,7 +18,7 @@
const device_type KL5C80A12 = &device_creator<kl5c80a12_device>;
-kl5c80a12_device::kl5c80a12_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+kl5c80a12_device::kl5c80a12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: z80_device(mconfig, KL5C80A12, "KL5C80A12", tag, owner, clock, "kl5c80a12", __FILE__)
{
}
diff --git a/src/devices/cpu/z80/kl5c80a12.h b/src/devices/cpu/z80/kl5c80a12.h
index 7ad3e16ca85..8ca3aadc146 100644
--- a/src/devices/cpu/z80/kl5c80a12.h
+++ b/src/devices/cpu/z80/kl5c80a12.h
@@ -35,7 +35,7 @@
class kl5c80a12_device : public z80_device
{
public:
- kl5c80a12_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
+ kl5c80a12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t);
// static configuration helpers
diff --git a/src/devices/cpu/z80/tmpz84c011.cpp b/src/devices/cpu/z80/tmpz84c011.cpp
index 428dd924c71..970db6624bd 100644
--- a/src/devices/cpu/z80/tmpz84c011.cpp
+++ b/src/devices/cpu/z80/tmpz84c011.cpp
@@ -30,7 +30,7 @@ static ADDRESS_MAP_START( tmpz84c011_internal_io_map, AS_IO, 8, tmpz84c011_devic
ADDRESS_MAP_END
-tmpz84c011_device::tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmpz84c011_device::tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: z80_device(mconfig, TMPZ84C011, "TMPZ84C011", tag, owner, clock, "tmpz84c011", __FILE__),
m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c011_internal_io_map ) ),
m_ctc(*this, "tmpz84c011_ctc"),
diff --git a/src/devices/cpu/z80/tmpz84c011.h b/src/devices/cpu/z80/tmpz84c011.h
index ffb5cdbd96f..bd9a77dca4e 100644
--- a/src/devices/cpu/z80/tmpz84c011.h
+++ b/src/devices/cpu/z80/tmpz84c011.h
@@ -75,7 +75,7 @@
class tmpz84c011_device : public z80_device
{
public:
- tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
+ tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t);
// static configuration helpers
template<class _Object> static devcb_base &set_zc0_callback(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_zc0_cb.set_callback(object); }
@@ -150,8 +150,8 @@ private:
required_device<z80ctc_device> m_ctc;
// internal state
- UINT8 m_pio_dir[5];
- UINT8 m_pio_latch[5];
+ uint8_t m_pio_dir[5];
+ uint8_t m_pio_latch[5];
// callbacks
devcb_write8 m_outportsa;
diff --git a/src/devices/cpu/z80/tmpz84c015.cpp b/src/devices/cpu/z80/tmpz84c015.cpp
index 3586001e2c6..19a7279f31f 100644
--- a/src/devices/cpu/z80/tmpz84c015.cpp
+++ b/src/devices/cpu/z80/tmpz84c015.cpp
@@ -24,7 +24,7 @@ static ADDRESS_MAP_START( tmpz84c015_internal_io_map, AS_IO, 8, tmpz84c015_devic
ADDRESS_MAP_END
-tmpz84c015_device::tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tmpz84c015_device::tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: z80_device(mconfig, TMPZ84C015, "TMPZ84C015", tag, owner, clock, "tmpz84c015", __FILE__),
m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c015_internal_io_map ) ),
m_ctc(*this, "tmpz84c015_ctc"),
@@ -125,7 +125,7 @@ void tmpz84c015_device::device_reset()
void tmpz84c015_device::device_post_load()
{
// reinit irq priority
- UINT8 prio = m_irq_priority;
+ uint8_t prio = m_irq_priority;
m_irq_priority = -1;
irq_priority_w(*m_io, 0, prio);
}
diff --git a/src/devices/cpu/z80/tmpz84c015.h b/src/devices/cpu/z80/tmpz84c015.h
index 2578f6a92ef..4efab045f24 100644
--- a/src/devices/cpu/z80/tmpz84c015.h
+++ b/src/devices/cpu/z80/tmpz84c015.h
@@ -105,7 +105,7 @@
class tmpz84c015_device : public z80_device
{
public:
- tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
+ tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t);
// static configuration helpers
template<class _Object> static devcb_base &set_out_txda_callback(device_t &device, _Object object) { return downcast<tmpz84c015_device &>(device).m_out_txda_cb.set_callback(object); }
@@ -229,7 +229,7 @@ private:
required_device<z80pio_device> m_pio;
// internal state
- UINT8 m_irq_priority;
+ uint8_t m_irq_priority;
// callbacks
devcb_write_line m_out_txda_cb;
diff --git a/src/devices/cpu/z80/z80.cpp b/src/devices/cpu/z80/z80.cpp
index 6b72570a63c..a23dfbe4bf6 100644
--- a/src/devices/cpu/z80/z80.cpp
+++ b/src/devices/cpu/z80/z80.cpp
@@ -96,7 +96,7 @@
* now also adjust the r register depending on the skipped opcodes.
* Changes in 2.2:
* - Fixed bugs in CPL, SCF and CCF instructions flag handling.
- * - Changed variable ea and arg16() function to UINT32; this
+ * - Changed variable ea and arg16() function to uint32_t; this
* produces slightly more efficient code.
* - The DD/FD XY CB opcodes where XY is 40-7F and Y is not 6/E
* are changed to calls to the X6/XE opcodes to reduce object size.
@@ -183,16 +183,16 @@
static bool tables_initialised = false;
-static UINT8 SZ[256]; /* zero and sign flags */
-static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
-static UINT8 SZP[256]; /* zero, sign and parity flags */
-static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
-static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
+static uint8_t SZ[256]; /* zero and sign flags */
+static uint8_t SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
+static uint8_t SZP[256]; /* zero, sign and parity flags */
+static uint8_t SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
+static uint8_t SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
-static UINT8 SZHVC_add[2*256*256];
-static UINT8 SZHVC_sub[2*256*256];
+static uint8_t SZHVC_add[2*256*256];
+static uint8_t SZHVC_sub[2*256*256];
-static const UINT8 cc_op[0x100] = {
+static const uint8_t cc_op[0x100] = {
4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4,
8,10, 7, 6, 4, 4, 7, 4,12,11, 7, 6, 4, 4, 7, 4,
7,10,16, 6, 4, 4, 7, 4, 7,11,16, 6, 4, 4, 7, 4,
@@ -211,7 +211,7 @@ static const UINT8 cc_op[0x100] = {
5,10,10, 4,10,11, 7,11, 5, 6,10, 4,10, 0, 7,11 /* fd -> cc_xy */
};
-static const UINT8 cc_cb[0x100] = {
+static const uint8_t cc_cb[0x100] = {
8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
@@ -230,7 +230,7 @@ static const UINT8 cc_cb[0x100] = {
8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8
};
-static const UINT8 cc_ed[0x100] = {
+static const uint8_t cc_ed[0x100] = {
8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
@@ -250,7 +250,7 @@ static const UINT8 cc_ed[0x100] = {
};
/* ix/iy: with the exception of (i+offset) opcodes, t-states are main_opcode_table + 4 */
-static const UINT8 cc_xy[0x100] = {
+static const uint8_t cc_xy[0x100] = {
4+4,10+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4, 4+4,11+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,
8+4,10+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,12+4,11+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,
7+4,10+4,16+4, 6+4, 4+4, 4+4, 7+4, 4+4, 7+4,11+4,16+4, 6+4, 4+4, 4+4, 7+4, 4+4,
@@ -269,7 +269,7 @@ static const UINT8 cc_xy[0x100] = {
5+4,10+4,10+4, 4+4,10+4,11+4, 7+4,11+4, 5+4, 6+4,10+4, 4+4,10+4, 4 , 7+4,11+4 /* fd -> cc_xy again */
};
-static const UINT8 cc_xycb[0x100] = {
+static const uint8_t cc_xycb[0x100] = {
23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
@@ -289,7 +289,7 @@ static const UINT8 cc_xycb[0x100] = {
};
/* extra cycles if jr/jp/call taken and 'interrupt latency' on rst 0-7 */
-static const UINT8 cc_ex[0x100] = {
+static const uint8_t cc_ex[0x100] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NZ/JR Z */
@@ -417,7 +417,7 @@ inline void z80_device::leave_halt()
/***************************************************************
* Input a byte from given I/O port
***************************************************************/
-inline UINT8 z80_device::in(UINT16 port)
+inline uint8_t z80_device::in(uint16_t port)
{
return m_io->read_byte(port);
}
@@ -425,7 +425,7 @@ inline UINT8 z80_device::in(UINT16 port)
/***************************************************************
* Output a byte to given I/O port
***************************************************************/
-inline void z80_device::out(UINT16 port, UINT8 value)
+inline void z80_device::out(uint16_t port, uint8_t value)
{
m_io->write_byte(port, value);
}
@@ -433,7 +433,7 @@ inline void z80_device::out(UINT16 port, UINT8 value)
/***************************************************************
* Read a byte from given memory location
***************************************************************/
-inline UINT8 z80_device::rm(UINT16 addr)
+inline uint8_t z80_device::rm(uint16_t addr)
{
return m_program->read_byte(addr);
}
@@ -441,7 +441,7 @@ inline UINT8 z80_device::rm(UINT16 addr)
/***************************************************************
* Read a word from given memory location
***************************************************************/
-inline void z80_device::rm16(UINT16 addr, PAIR &r)
+inline void z80_device::rm16(uint16_t addr, PAIR &r)
{
r.b.l = rm(addr);
r.b.h = rm((addr+1));
@@ -450,7 +450,7 @@ inline void z80_device::rm16(UINT16 addr, PAIR &r)
/***************************************************************
* Write a byte to given memory location
***************************************************************/
-inline void z80_device::wm(UINT16 addr, UINT8 value)
+inline void z80_device::wm(uint16_t addr, uint8_t value)
{
m_program->write_byte(addr, value);
}
@@ -458,7 +458,7 @@ inline void z80_device::wm(UINT16 addr, UINT8 value)
/***************************************************************
* Write a word to given memory location
***************************************************************/
-inline void z80_device::wm16(UINT16 addr, PAIR &r)
+inline void z80_device::wm16(uint16_t addr, PAIR &r)
{
wm(addr, r.b.l);
wm((addr+1), r.b.h);
@@ -469,11 +469,11 @@ inline void z80_device::wm16(UINT16 addr, PAIR &r)
* reading opcodes. In case of system with memory mapped I/O,
* this function can be used to greatly speed up emulation
***************************************************************/
-inline UINT8 z80_device::rop()
+inline uint8_t z80_device::rop()
{
unsigned pc = PCD;
PC++;
- UINT8 res = m_decrypted_opcodes_direct->read_byte(pc);
+ uint8_t res = m_decrypted_opcodes_direct->read_byte(pc);
m_icount -= 2;
m_refresh_cb((m_i << 8) | (m_r2 & 0x80) | ((m_r-1) & 0x7f));
m_icount += 2;
@@ -486,14 +486,14 @@ inline UINT8 z80_device::rop()
* support systems that use different encoding mechanisms for
* opcodes and opcode arguments
***************************************************************/
-inline UINT8 z80_device::arg()
+inline uint8_t z80_device::arg()
{
unsigned pc = PCD;
PC++;
return m_direct->read_byte(pc);
}
-inline UINT16 z80_device::arg16()
+inline uint16_t z80_device::arg16()
{
unsigned pc = PCD;
PC += 2;
@@ -506,13 +506,13 @@ inline UINT16 z80_device::arg16()
***************************************************************/
inline void z80_device::eax()
{
- m_ea = (UINT32)(UINT16)(IX + (INT8)arg());
+ m_ea = (uint32_t)(uint16_t)(IX + (int8_t)arg());
WZ = m_ea;
}
inline void z80_device::eay()
{
- m_ea = (UINT32)(UINT16)(IY + (INT8)arg());
+ m_ea = (uint32_t)(uint16_t)(IY + (int8_t)arg());
WZ = m_ea;
}
@@ -564,7 +564,7 @@ inline void z80_device::jp_cond(bool cond)
***************************************************************/
inline void z80_device::jr()
{
- INT8 a = (INT8)arg(); /* arg() also increments PC */
+ int8_t a = (int8_t)arg(); /* arg() also increments PC */
PC += a; /* so don't do PC += arg() */
WZ = PC;
}
@@ -572,7 +572,7 @@ inline void z80_device::jr()
/***************************************************************
* JR_COND
***************************************************************/
-inline void z80_device::jr_cond(bool cond, UINT8 opcode)
+inline void z80_device::jr_cond(bool cond, uint8_t opcode)
{
if (cond)
{
@@ -597,7 +597,7 @@ inline void z80_device::call()
/***************************************************************
* CALL_COND
***************************************************************/
-inline void z80_device::call_cond(bool cond, UINT8 opcode)
+inline void z80_device::call_cond(bool cond, uint8_t opcode)
{
if (cond)
{
@@ -616,7 +616,7 @@ inline void z80_device::call_cond(bool cond, UINT8 opcode)
/***************************************************************
* RET_COND
***************************************************************/
-inline void z80_device::ret_cond(bool cond, UINT8 opcode)
+inline void z80_device::ret_cond(bool cond, uint8_t opcode)
{
if (cond)
{
@@ -689,7 +689,7 @@ inline void z80_device::ld_a_i()
/***************************************************************
* RST
***************************************************************/
-inline void z80_device::rst(UINT16 addr)
+inline void z80_device::rst(uint16_t addr)
{
push(m_pc);
PCD = addr;
@@ -699,19 +699,19 @@ inline void z80_device::rst(UINT16 addr)
/***************************************************************
* INC r8
***************************************************************/
-inline UINT8 z80_device::inc(UINT8 value)
+inline uint8_t z80_device::inc(uint8_t value)
{
- UINT8 res = value + 1;
+ uint8_t res = value + 1;
F = (F & CF) | SZHV_inc[res];
- return (UINT8)res;
+ return (uint8_t)res;
}
/***************************************************************
* DEC r8
***************************************************************/
-inline UINT8 z80_device::dec(UINT8 value)
+inline uint8_t z80_device::dec(uint8_t value)
{
- UINT8 res = value - 1;
+ uint8_t res = value - 1;
F = (F & CF) | SZHV_dec[res];
return res;
}
@@ -740,8 +740,8 @@ inline void z80_device::rrca()
***************************************************************/
inline void z80_device::rla()
{
- UINT8 res = (A << 1) | (F & CF);
- UINT8 c = (A & 0x80) ? CF : 0;
+ uint8_t res = (A << 1) | (F & CF);
+ uint8_t c = (A & 0x80) ? CF : 0;
F = (F & (SF | ZF | PF)) | c | (res & (YF | XF));
A = res;
}
@@ -751,8 +751,8 @@ inline void z80_device::rla()
***************************************************************/
inline void z80_device::rra()
{
- UINT8 res = (A >> 1) | (F << 7);
- UINT8 c = (A & 0x01) ? CF : 0;
+ uint8_t res = (A >> 1) | (F << 7);
+ uint8_t c = (A & 0x01) ? CF : 0;
F = (F & (SF | ZF | PF)) | c | (res & (YF | XF));
A = res;
}
@@ -762,7 +762,7 @@ inline void z80_device::rra()
***************************************************************/
inline void z80_device::rrd()
{
- UINT8 n = rm(HL);
+ uint8_t n = rm(HL);
WZ = HL+1;
wm(HL, (n >> 4) | (A << 4));
A = (A & 0xf0) | (n & 0x0f);
@@ -774,7 +774,7 @@ inline void z80_device::rrd()
***************************************************************/
inline void z80_device::rld()
{
- UINT8 n = rm(HL);
+ uint8_t n = rm(HL);
WZ = HL+1;
wm(HL, (n << 4) | (A & 0x0f));
A = (A & 0xf0) | (n >> 4);
@@ -784,10 +784,10 @@ inline void z80_device::rld()
/***************************************************************
* ADD A,n
***************************************************************/
-inline void z80_device::add_a(UINT8 value)
+inline void z80_device::add_a(uint8_t value)
{
- UINT32 ah = AFD & 0xff00;
- UINT32 res = (UINT8)((ah >> 8) + value);
+ uint32_t ah = AFD & 0xff00;
+ uint32_t res = (uint8_t)((ah >> 8) + value);
F = SZHVC_add[ah | res];
A = res;
}
@@ -795,10 +795,10 @@ inline void z80_device::add_a(UINT8 value)
/***************************************************************
* ADC A,n
***************************************************************/
-inline void z80_device::adc_a(UINT8 value)
+inline void z80_device::adc_a(uint8_t value)
{
- UINT32 ah = AFD & 0xff00, c = AFD & 1;
- UINT32 res = (UINT8)((ah >> 8) + value + c);
+ uint32_t ah = AFD & 0xff00, c = AFD & 1;
+ uint32_t res = (uint8_t)((ah >> 8) + value + c);
F = SZHVC_add[(c << 16) | ah | res];
A = res;
}
@@ -806,10 +806,10 @@ inline void z80_device::adc_a(UINT8 value)
/***************************************************************
* SUB n
***************************************************************/
-inline void z80_device::sub(UINT8 value)
+inline void z80_device::sub(uint8_t value)
{
- UINT32 ah = AFD & 0xff00;
- UINT32 res = (UINT8)((ah >> 8) - value);
+ uint32_t ah = AFD & 0xff00;
+ uint32_t res = (uint8_t)((ah >> 8) - value);
F = SZHVC_sub[ah | res];
A = res;
}
@@ -817,10 +817,10 @@ inline void z80_device::sub(UINT8 value)
/***************************************************************
* SBC A,n
***************************************************************/
-inline void z80_device::sbc_a(UINT8 value)
+inline void z80_device::sbc_a(uint8_t value)
{
- UINT32 ah = AFD & 0xff00, c = AFD & 1;
- UINT32 res = (UINT8)((ah >> 8) - value - c);
+ uint32_t ah = AFD & 0xff00, c = AFD & 1;
+ uint32_t res = (uint8_t)((ah >> 8) - value - c);
F = SZHVC_sub[(c<<16) | ah | res];
A = res;
}
@@ -830,7 +830,7 @@ inline void z80_device::sbc_a(UINT8 value)
***************************************************************/
inline void z80_device::neg()
{
- UINT8 value = A;
+ uint8_t value = A;
A = 0;
sub(value);
}
@@ -840,7 +840,7 @@ inline void z80_device::neg()
***************************************************************/
inline void z80_device::daa()
{
- UINT8 a = A;
+ uint8_t a = A;
if (F & NF) {
if ((F&HF) | ((A&0xf)>9)) a-=6;
if ((F&CF) | (A>0x99)) a-=0x60;
@@ -857,7 +857,7 @@ inline void z80_device::daa()
/***************************************************************
* AND n
***************************************************************/
-inline void z80_device::and_a(UINT8 value)
+inline void z80_device::and_a(uint8_t value)
{
A &= value;
F = SZP[A] | HF;
@@ -866,7 +866,7 @@ inline void z80_device::and_a(UINT8 value)
/***************************************************************
* OR n
***************************************************************/
-inline void z80_device::or_a(UINT8 value)
+inline void z80_device::or_a(uint8_t value)
{
A |= value;
F = SZP[A];
@@ -875,7 +875,7 @@ inline void z80_device::or_a(UINT8 value)
/***************************************************************
* XOR n
***************************************************************/
-inline void z80_device::xor_a(UINT8 value)
+inline void z80_device::xor_a(uint8_t value)
{
A ^= value;
F = SZP[A];
@@ -884,11 +884,11 @@ inline void z80_device::xor_a(UINT8 value)
/***************************************************************
* CP n
***************************************************************/
-inline void z80_device::cp(UINT8 value)
+inline void z80_device::cp(uint8_t value)
{
unsigned val = value;
- UINT32 ah = AFD & 0xff00;
- UINT32 res = (UINT8)((ah >> 8) - val);
+ uint32_t ah = AFD & 0xff00;
+ uint32_t res = (uint8_t)((ah >> 8) - val);
F = (SZHVC_sub[ah | res] & ~(YF | XF)) |
(val & (YF | XF));
}
@@ -939,12 +939,12 @@ inline void z80_device::ex_sp(PAIR &r)
***************************************************************/
inline void z80_device::add16(PAIR &dr, PAIR &sr)
{
- UINT32 res = dr.d + sr.d;
+ uint32_t res = dr.d + sr.d;
WZ = dr.d + 1;
F = (F & (SF | ZF | VF)) |
(((dr.d ^ res ^ sr.d) >> 8) & HF) |
((res >> 16) & CF) | ((res >> 8) & (YF | XF));
- dr.w.l = (UINT16)res;
+ dr.w.l = (uint16_t)res;
}
/***************************************************************
@@ -952,14 +952,14 @@ inline void z80_device::add16(PAIR &dr, PAIR &sr)
***************************************************************/
inline void z80_device::adc_hl(PAIR &r)
{
- UINT32 res = HLD + r.d + (F & CF);
+ uint32_t res = HLD + r.d + (F & CF);
WZ = HL + 1;
F = (((HLD ^ res ^ r.d) >> 8) & HF) |
((res >> 16) & CF) |
((res >> 8) & (SF | YF | XF)) |
((res & 0xffff) ? 0 : ZF) |
(((r.d ^ HLD ^ 0x8000) & (r.d ^ res) & 0x8000) >> 13);
- HL = (UINT16)res;
+ HL = (uint16_t)res;
}
/***************************************************************
@@ -967,20 +967,20 @@ inline void z80_device::adc_hl(PAIR &r)
***************************************************************/
inline void z80_device::sbc_hl(PAIR &r)
{
- UINT32 res = HLD - r.d - (F & CF);
+ uint32_t res = HLD - r.d - (F & CF);
WZ = HL + 1;
F = (((HLD ^ res ^ r.d) >> 8) & HF) | NF |
((res >> 16) & CF) |
((res >> 8) & (SF | YF | XF)) |
((res & 0xffff) ? 0 : ZF) |
(((r.d ^ HLD) & (HLD ^ res) &0x8000) >> 13);
- HL = (UINT16)res;
+ HL = (uint16_t)res;
}
/***************************************************************
* RLC r8
***************************************************************/
-inline UINT8 z80_device::rlc(UINT8 value)
+inline uint8_t z80_device::rlc(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -992,7 +992,7 @@ inline UINT8 z80_device::rlc(UINT8 value)
/***************************************************************
* RRC r8
***************************************************************/
-inline UINT8 z80_device::rrc(UINT8 value)
+inline uint8_t z80_device::rrc(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -1004,7 +1004,7 @@ inline UINT8 z80_device::rrc(UINT8 value)
/***************************************************************
* RL r8
***************************************************************/
-inline UINT8 z80_device::rl(UINT8 value)
+inline uint8_t z80_device::rl(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -1016,7 +1016,7 @@ inline UINT8 z80_device::rl(UINT8 value)
/***************************************************************
* RR r8
***************************************************************/
-inline UINT8 z80_device::rr(UINT8 value)
+inline uint8_t z80_device::rr(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -1028,7 +1028,7 @@ inline UINT8 z80_device::rr(UINT8 value)
/***************************************************************
* SLA r8
***************************************************************/
-inline UINT8 z80_device::sla(UINT8 value)
+inline uint8_t z80_device::sla(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -1040,7 +1040,7 @@ inline UINT8 z80_device::sla(UINT8 value)
/***************************************************************
* SRA r8
***************************************************************/
-inline UINT8 z80_device::sra(UINT8 value)
+inline uint8_t z80_device::sra(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -1052,7 +1052,7 @@ inline UINT8 z80_device::sra(UINT8 value)
/***************************************************************
* SLL r8
***************************************************************/
-inline UINT8 z80_device::sll(UINT8 value)
+inline uint8_t z80_device::sll(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -1064,7 +1064,7 @@ inline UINT8 z80_device::sll(UINT8 value)
/***************************************************************
* SRL r8
***************************************************************/
-inline UINT8 z80_device::srl(UINT8 value)
+inline uint8_t z80_device::srl(uint8_t value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -1076,7 +1076,7 @@ inline UINT8 z80_device::srl(UINT8 value)
/***************************************************************
* BIT bit,r8
***************************************************************/
-inline void z80_device::bit(int bit, UINT8 value)
+inline void z80_device::bit(int bit, uint8_t value)
{
F = (F & CF) | HF | (SZ_BIT[value & (1<<bit)] & ~(YF|XF)) | (value & (YF|XF));
}
@@ -1084,7 +1084,7 @@ inline void z80_device::bit(int bit, UINT8 value)
/***************************************************************
* BIT bit,(HL)
***************************************************************/
-inline void z80_device::bit_hl(int bit, UINT8 value)
+inline void z80_device::bit_hl(int bit, uint8_t value)
{
F = (F & CF) | HF | (SZ_BIT[value & (1<<bit)] & ~(YF|XF)) | (WZ_H & (YF|XF));
}
@@ -1092,7 +1092,7 @@ inline void z80_device::bit_hl(int bit, UINT8 value)
/***************************************************************
* BIT bit,(IX/Y+o)
***************************************************************/
-inline void z80_device::bit_xy(int bit, UINT8 value)
+inline void z80_device::bit_xy(int bit, uint8_t value)
{
F = (F & CF) | HF | (SZ_BIT[value & (1<<bit)] & ~(YF|XF)) | ((m_ea>>8) & (YF|XF));
}
@@ -1100,7 +1100,7 @@ inline void z80_device::bit_xy(int bit, UINT8 value)
/***************************************************************
* RES bit,r8
***************************************************************/
-inline UINT8 z80_device::res(int bit, UINT8 value)
+inline uint8_t z80_device::res(int bit, uint8_t value)
{
return value & ~(1<<bit);
}
@@ -1108,7 +1108,7 @@ inline UINT8 z80_device::res(int bit, UINT8 value)
/***************************************************************
* SET bit,r8
***************************************************************/
-inline UINT8 z80_device::set(int bit, UINT8 value)
+inline uint8_t z80_device::set(int bit, uint8_t value)
{
return value | (1<<bit);
}
@@ -1118,7 +1118,7 @@ inline UINT8 z80_device::set(int bit, UINT8 value)
***************************************************************/
inline void z80_device::ldi()
{
- UINT8 io = rm(HL);
+ uint8_t io = rm(HL);
wm(DE, io);
F &= SF | ZF | CF;
if ((A + io) & 0x02) F |= YF; /* bit 1 -> flag 5 */
@@ -1132,8 +1132,8 @@ inline void z80_device::ldi()
***************************************************************/
inline void z80_device::cpi()
{
- UINT8 val = rm(HL);
- UINT8 res = A - val;
+ uint8_t val = rm(HL);
+ uint8_t res = A - val;
WZ++;
HL++; BC--;
F = (F & CF) | (SZ[res]&~(YF|XF)) | ((A^val^res)&HF) | NF;
@@ -1149,7 +1149,7 @@ inline void z80_device::cpi()
inline void z80_device::ini()
{
unsigned t;
- UINT8 io = in(BC);
+ uint8_t io = in(BC);
WZ = BC + 1;
B--;
wm(HL, io);
@@ -1158,7 +1158,7 @@ inline void z80_device::ini()
t = (unsigned)((C + 1) & 0xff) + (unsigned)io;
if (io & SF) F |= NF;
if (t & 0x100) F |= HF | CF;
- F |= SZP[(UINT8)(t & 0x07) ^ B] & PF;
+ F |= SZP[(uint8_t)(t & 0x07) ^ B] & PF;
}
/***************************************************************
@@ -1167,7 +1167,7 @@ inline void z80_device::ini()
inline void z80_device::outi()
{
unsigned t;
- UINT8 io = rm(HL);
+ uint8_t io = rm(HL);
B--;
WZ = BC + 1;
out(BC, io);
@@ -1176,7 +1176,7 @@ inline void z80_device::outi()
t = (unsigned)L + (unsigned)io;
if (io & SF) F |= NF;
if (t & 0x100) F |= HF | CF;
- F |= SZP[(UINT8)(t & 0x07) ^ B] & PF;
+ F |= SZP[(uint8_t)(t & 0x07) ^ B] & PF;
}
/***************************************************************
@@ -1184,7 +1184,7 @@ inline void z80_device::outi()
***************************************************************/
inline void z80_device::ldd()
{
- UINT8 io = rm(HL);
+ uint8_t io = rm(HL);
wm(DE, io);
F &= SF | ZF | CF;
if ((A + io) & 0x02) F |= YF; /* bit 1 -> flag 5 */
@@ -1198,8 +1198,8 @@ inline void z80_device::ldd()
***************************************************************/
inline void z80_device::cpd()
{
- UINT8 val = rm(HL);
- UINT8 res = A - val;
+ uint8_t val = rm(HL);
+ uint8_t res = A - val;
WZ--;
HL--; BC--;
F = (F & CF) | (SZ[res]&~(YF|XF)) | ((A^val^res)&HF) | NF;
@@ -1215,7 +1215,7 @@ inline void z80_device::cpd()
inline void z80_device::ind()
{
unsigned t;
- UINT8 io = in(BC);
+ uint8_t io = in(BC);
WZ = BC - 1;
B--;
wm(HL, io);
@@ -1224,7 +1224,7 @@ inline void z80_device::ind()
t = ((unsigned)(C - 1) & 0xff) + (unsigned)io;
if (io & SF) F |= NF;
if (t & 0x100) F |= HF | CF;
- F |= SZP[(UINT8)(t & 0x07) ^ B] & PF;
+ F |= SZP[(uint8_t)(t & 0x07) ^ B] & PF;
}
/***************************************************************
@@ -1233,7 +1233,7 @@ inline void z80_device::ind()
inline void z80_device::outd()
{
unsigned t;
- UINT8 io = rm(HL);
+ uint8_t io = rm(HL);
B--;
WZ = BC - 1;
out(BC, io);
@@ -1242,7 +1242,7 @@ inline void z80_device::outd()
t = (unsigned)L + (unsigned)io;
if (io & SF) F |= NF;
if (t & 0x100) F |= HF | CF;
- F |= SZP[(UINT8)(t & 0x07) ^ B] & PF;
+ F |= SZP[(uint8_t)(t & 0x07) ^ B] & PF;
}
/***************************************************************
@@ -2669,7 +2669,7 @@ OP(ed,6d) { reti(); } /* RETI
OP(ed,6e) { m_im = 0; } /* IM 0 */
OP(ed,6f) { rld(); } /* RLD (HL) */
-OP(ed,70) { UINT8 res = in(BC); F = (F & CF) | SZP[res]; } /* IN 0,(C) */
+OP(ed,70) { uint8_t res = in(BC); F = (F & CF) | SZP[res]; } /* IN 0,(C) */
OP(ed,71) { out(BC, 0); } /* OUT (C),0 */
OP(ed,72) { sbc_hl(m_sp); } /* SBC HL,SP */
OP(ed,73) { m_ea = arg16(); wm16(m_ea, m_sp); WZ = m_ea + 1; } /* LD (w),SP */
@@ -3270,10 +3270,10 @@ void z80_device::device_start()
{
if( !tables_initialised )
{
- UINT8 *padd = &SZHVC_add[ 0*256];
- UINT8 *padc = &SZHVC_add[256*256];
- UINT8 *psub = &SZHVC_sub[ 0*256];
- UINT8 *psbc = &SZHVC_sub[256*256];
+ uint8_t *padd = &SZHVC_add[ 0*256];
+ uint8_t *padc = &SZHVC_add[256*256];
+ uint8_t *psub = &SZHVC_sub[ 0*256];
+ uint8_t *psbc = &SZHVC_sub[256*256];
for (int oldval = 0; oldval < 256; oldval++)
{
for (int newval = 0; newval < 256; newval++)
@@ -3669,7 +3669,7 @@ void z80_device::state_string_export(const device_state_entry &entry, std::strin
// helper function
//-------------------------------------------------
-offs_t z80_device::disasm_disassemble( char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options )
+offs_t z80_device::disasm_disassemble( char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options )
{
extern CPU_DISASSEMBLE( z80 );
return CPU_DISASSEMBLE_NAME(z80)(this, buffer, pc, oprom, opram, options);
@@ -3680,7 +3680,7 @@ offs_t z80_device::disasm_disassemble( char *buffer, offs_t pc, const UINT8 *opr
* Generic set_info
**************************************************************************/
-void z80_device::z80_set_cycle_tables(const UINT8 *op, const UINT8 *cb, const UINT8 *ed, const UINT8 *xy, const UINT8 *xycb, const UINT8 *ex)
+void z80_device::z80_set_cycle_tables(const uint8_t *op, const uint8_t *cb, const uint8_t *ed, const uint8_t *xy, const uint8_t *xycb, const uint8_t *ex)
{
m_cc_op = (op != nullptr) ? op : cc_op;
m_cc_cb = (cb != nullptr) ? cb : cc_cb;
@@ -3691,7 +3691,7 @@ void z80_device::z80_set_cycle_tables(const UINT8 *op, const UINT8 *cb, const UI
}
-z80_device::z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+z80_device::z80_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
cpu_device(mconfig, Z80, "Z80", tag, owner, clock, "z80", __FILE__),
z80_daisy_chain_interface(mconfig, *this),
m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0),
@@ -3702,7 +3702,7 @@ z80_device::z80_device(const machine_config &mconfig, const char *tag, device_t
{
}
-z80_device::z80_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
+z80_device::z80_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source) :
cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
z80_daisy_chain_interface(mconfig, *this),
m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0),
@@ -3726,7 +3726,7 @@ const address_space_config *z80_device::memory_space_config(address_spacenum spa
const device_type Z80 = &device_creator<z80_device>;
-nsc800_device::nsc800_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+nsc800_device::nsc800_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: z80_device(mconfig, NSC800, "NSC800", tag, owner, clock, "nsc800", __FILE__)
{
}
diff --git a/src/devices/cpu/z80/z80.h b/src/devices/cpu/z80/z80.h
index 70eab883103..af38e5fec0a 100644
--- a/src/devices/cpu/z80/z80.h
+++ b/src/devices/cpu/z80/z80.h
@@ -36,24 +36,24 @@ enum
class z80_device : public cpu_device, public z80_daisy_chain_interface
{
public:
- z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ z80_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void z80_set_cycle_tables(const UINT8 *op, const UINT8 *cb, const UINT8 *ed, const UINT8 *xy, const UINT8 *xycb, const UINT8 *ex);
+ void z80_set_cycle_tables(const uint8_t *op, const uint8_t *cb, const uint8_t *ed, const uint8_t *xy, const uint8_t *xycb, const uint8_t *ex);
template<class _Object> static devcb_base &set_irqack_cb(device_t &device, _Object object) { return downcast<z80_device &>(device).m_irqack_cb.set_callback(object); }
template<class _Object> static devcb_base &set_refresh_cb(device_t &device, _Object object) { return downcast<z80_device &>(device).m_refresh_cb.set_callback(object); }
protected:
- z80_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ z80_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 2; }
- virtual UINT32 execute_max_cycles() const override { return 16; }
- virtual UINT32 execute_input_lines() const override { return 4; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xff; }
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 16; }
+ virtual uint32_t execute_input_lines() const override { return 4; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -66,9 +66,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
#undef PROTOTYPES
#define PROTOTYPES(prefix) \
@@ -149,15 +149,15 @@ protected:
void halt();
void leave_halt();
- UINT8 in(UINT16 port);
- void out(UINT16 port, UINT8 value);
- UINT8 rm(UINT16 addr);
- void rm16(UINT16 addr, PAIR &r);
- void wm(UINT16 addr, UINT8 value);
- void wm16(UINT16 addr, PAIR &r);
- UINT8 rop();
- UINT8 arg();
- UINT16 arg16();
+ uint8_t in(uint16_t port);
+ void out(uint16_t port, uint8_t value);
+ uint8_t rm(uint16_t addr);
+ void rm16(uint16_t addr, PAIR &r);
+ void wm(uint16_t addr, uint8_t value);
+ void wm16(uint16_t addr, PAIR &r);
+ uint8_t rop();
+ uint8_t arg();
+ uint16_t arg16();
void eax();
void eay();
void pop(PAIR &r);
@@ -165,35 +165,35 @@ protected:
void jp(void);
void jp_cond(bool cond);
void jr();
- void jr_cond(bool cond, UINT8 opcode);
+ void jr_cond(bool cond, uint8_t opcode);
void call();
- void call_cond(bool cond, UINT8 opcode);
- void ret_cond(bool cond, UINT8 opcode);
+ void call_cond(bool cond, uint8_t opcode);
+ void ret_cond(bool cond, uint8_t opcode);
void retn();
void reti();
void ld_r_a();
void ld_a_r();
void ld_i_a();
void ld_a_i();
- void rst(UINT16 addr);
- UINT8 inc(UINT8 value);
- UINT8 dec(UINT8 value);
+ void rst(uint16_t addr);
+ uint8_t inc(uint8_t value);
+ uint8_t dec(uint8_t value);
void rlca();
void rrca();
void rla();
void rra();
void rrd();
void rld();
- void add_a(UINT8 value);
- void adc_a(UINT8 value);
- void sub(UINT8 value);
- void sbc_a(UINT8 value);
+ void add_a(uint8_t value);
+ void adc_a(uint8_t value);
+ void sub(uint8_t value);
+ void sbc_a(uint8_t value);
void neg();
void daa();
- void and_a(UINT8 value);
- void or_a(UINT8 value);
- void xor_a(UINT8 value);
- void cp(UINT8 value);
+ void and_a(uint8_t value);
+ void or_a(uint8_t value);
+ void xor_a(uint8_t value);
+ void cp(uint8_t value);
void ex_af();
void ex_de_hl();
void exx();
@@ -201,19 +201,19 @@ protected:
void add16(PAIR &dr, PAIR &sr);
void adc_hl(PAIR &r);
void sbc_hl(PAIR &r);
- UINT8 rlc(UINT8 value);
- UINT8 rrc(UINT8 value);
- UINT8 rl(UINT8 value);
- UINT8 rr(UINT8 value);
- UINT8 sla(UINT8 value);
- UINT8 sra(UINT8 value);
- UINT8 sll(UINT8 value);
- UINT8 srl(UINT8 value);
- void bit(int bit, UINT8 value);
- void bit_hl(int bit, UINT8 value);
- void bit_xy(int bit, UINT8 value);
- UINT8 res(int bit, UINT8 value);
- UINT8 set(int bit, UINT8 value);
+ uint8_t rlc(uint8_t value);
+ uint8_t rrc(uint8_t value);
+ uint8_t rl(uint8_t value);
+ uint8_t rr(uint8_t value);
+ uint8_t sla(uint8_t value);
+ uint8_t sra(uint8_t value);
+ uint8_t sll(uint8_t value);
+ uint8_t srl(uint8_t value);
+ void bit(int bit, uint8_t value);
+ void bit_hl(int bit, uint8_t value);
+ void bit_xy(int bit, uint8_t value);
+ uint8_t res(int bit, uint8_t value);
+ uint8_t set(int bit, uint8_t value);
void ldi();
void cpi();
void ini();
@@ -261,31 +261,31 @@ protected:
PAIR m_bc2;
PAIR m_de2;
PAIR m_hl2;
- UINT8 m_r;
- UINT8 m_r2;
- UINT8 m_iff1;
- UINT8 m_iff2;
- UINT8 m_halt;
- UINT8 m_im;
- UINT8 m_i;
- UINT8 m_nmi_state; /* nmi line state */
- UINT8 m_nmi_pending; /* nmi pending */
- UINT8 m_irq_state; /* irq line state */
+ uint8_t m_r;
+ uint8_t m_r2;
+ uint8_t m_iff1;
+ uint8_t m_iff2;
+ uint8_t m_halt;
+ uint8_t m_im;
+ uint8_t m_i;
+ uint8_t m_nmi_state; /* nmi line state */
+ uint8_t m_nmi_pending; /* nmi pending */
+ uint8_t m_irq_state; /* irq line state */
int m_wait_state; // wait line state
int m_busrq_state; // bus request line state
- UINT8 m_after_ei; /* are we in the EI shadow? */
- UINT8 m_after_ldair; /* same, but for LD A,I or LD A,R */
- UINT32 m_ea;
+ uint8_t m_after_ei; /* are we in the EI shadow? */
+ uint8_t m_after_ldair; /* same, but for LD A,I or LD A,R */
+ uint32_t m_ea;
device_irq_acknowledge_delegate m_irq_callback;
int m_icount;
- UINT8 m_rtemp;
- const UINT8 * m_cc_op;
- const UINT8 * m_cc_cb;
- const UINT8 * m_cc_ed;
- const UINT8 * m_cc_xy;
- const UINT8 * m_cc_xycb;
- const UINT8 * m_cc_ex;
+ uint8_t m_rtemp;
+ const uint8_t * m_cc_op;
+ const uint8_t * m_cc_cb;
+ const uint8_t * m_cc_ed;
+ const uint8_t * m_cc_xy;
+ const uint8_t * m_cc_xycb;
+ const uint8_t * m_cc_ex;
};
extern const device_type Z80;
@@ -293,7 +293,7 @@ extern const device_type Z80;
class nsc800_device : public z80_device
{
public:
- nsc800_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ nsc800_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -301,12 +301,12 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_input_lines() const override { return 7; }
+ virtual uint32_t execute_input_lines() const override { return 7; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
void take_interrupt_nsc800();
- UINT8 m_nsc800_irq_state[4]; /* state of NSC800 restart interrupts A, B, C */
+ uint8_t m_nsc800_irq_state[4]; /* state of NSC800 restart interrupts A, B, C */
};
extern const device_type NSC800;
diff --git a/src/devices/cpu/z80/z80daisy.h b/src/devices/cpu/z80/z80daisy.h
index 11d17dc36eb..57d852261bc 100644
--- a/src/devices/cpu/z80/z80daisy.h
+++ b/src/devices/cpu/z80/z80daisy.h
@@ -20,8 +20,8 @@
//**************************************************************************
// these constants are returned from the irq_state function
-const UINT8 Z80_DAISY_INT = 0x01; // interrupt request mask
-const UINT8 Z80_DAISY_IEO = 0x02; // interrupt disable mask (IEO)
+const uint8_t Z80_DAISY_INT = 0x01; // interrupt request mask
+const uint8_t Z80_DAISY_IEO = 0x02; // interrupt disable mask (IEO)
diff --git a/src/devices/cpu/z80/z80dasm.cpp b/src/devices/cpu/z80/z80dasm.cpp
index 011d7857d19..e7bf8b60051 100644
--- a/src/devices/cpu/z80/z80dasm.cpp
+++ b/src/devices/cpu/z80/z80dasm.cpp
@@ -40,7 +40,7 @@ static const char *const s_mnemonic[] =
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
-static const UINT32 s_flags[] =
+static const uint32_t s_flags[] =
{
0 ,0 ,0 ,0 ,_OVER,0 ,0 ,0 ,
_OVER,0 ,_OVER,0 ,0 ,0 ,0 ,0 ,
@@ -55,7 +55,7 @@ static const UINT32 s_flags[] =
struct z80dasm
{
- UINT8 mnemonic;
+ uint8_t mnemonic;
const char *arguments;
};
@@ -399,12 +399,12 @@ static const z80dasm mnemonic_main[256] =
{zCALL,"m,A"}, {zDB,"fd"}, {zCP,"B"}, {zRST,"V"}
};
-static char sign(INT8 offset)
+static char sign(int8_t offset)
{
return (offset < 0)? '-':'+';
}
-static int offs(INT8 offset)
+static int offs(int8_t offset)
{
if (offset < 0) return -offset;
return offset;
@@ -418,9 +418,9 @@ CPU_DISASSEMBLE( z80 )
const z80dasm *d;
const char *src, *ixy;
char *dst;
- INT8 offset = 0;
- UINT8 op, op1 = 0;
- UINT16 ea;
+ int8_t offset = 0;
+ uint8_t op, op1 = 0;
+ uint16_t ea;
int pos = 0;
ixy = "oops!!";
@@ -443,7 +443,7 @@ CPU_DISASSEMBLE( z80 )
op1 = oprom[pos++];
if( op1 == 0xcb )
{
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
op1 = opram[pos++]; /* fourth byte from opbase.ram! */
d = &mnemonic_xx_cb[op1];
}
@@ -454,7 +454,7 @@ CPU_DISASSEMBLE( z80 )
op1 = oprom[pos++];
if( op1 == 0xcb )
{
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
op1 = opram[pos++]; /* fourth byte from opbase.ram! */
d = &mnemonic_xx_cb[op1];
}
@@ -491,7 +491,7 @@ CPU_DISASSEMBLE( z80 )
dst += sprintf( dst, "$%04X", ea );
break;
case 'O': /* Offset relative to PC */
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
dst += sprintf( dst, "$%04X", (pc + offset + 2) & 0xffff );
break;
case 'P': /* Port number */
@@ -508,7 +508,7 @@ CPU_DISASSEMBLE( z80 )
dst += sprintf( dst, "$%04X", ea );
break;
case 'X':
- offset = (INT8) opram[pos++];
+ offset = (int8_t) opram[pos++];
/* fall through */
case 'Y':
dst += sprintf( dst,"(%s%c$%02x)", ixy, sign(offset), offs(offset) );
diff --git a/src/devices/cpu/z8000/8000dasm.cpp b/src/devices/cpu/z8000/8000dasm.cpp
index 5118af4b433..fd9b194db6b 100644
--- a/src/devices/cpu/z8000/8000dasm.cpp
+++ b/src/devices/cpu/z8000/8000dasm.cpp
@@ -19,9 +19,9 @@ static int n[16]; /* opcode nibbles */
static int b[8]; /* opcode bytes */
static int w[4]; /* opcode words */
-static void GET_OP(const UINT8 *oprom, int i, unsigned offset)
+static void GET_OP(const uint8_t *oprom, int i, unsigned offset)
{
- UINT16 opcode = (oprom[offset] << 8) | oprom[offset + 1];
+ uint16_t opcode = (oprom[offset] << 8) | oprom[offset + 1];
w[i] = opcode;
b[i*2+0] = opcode >> 8;
b[i*2+1] = opcode & 0xff;
@@ -54,8 +54,8 @@ CPU_DISASSEMBLE( z8000 )
char *dst = buffer;
const char *src;
Z8000_exec *o;
- UINT32 flags = 0;
- UINT32 old_w;
+ uint32_t flags = 0;
+ uint32_t old_w;
/* already initialized? */
if(z8000_exec == nullptr)
@@ -115,7 +115,7 @@ CPU_DISASSEMBLE( z8000 )
/* absolute immediate 8bit (rl/rr) */
src++;
i = *src++ - '0';
- dst += sprintf(dst, "#%d", ((INT8)b[i]<0) ? -(INT8)b[i] : b[i]);
+ dst += sprintf(dst, "#%d", ((int8_t)b[i]<0) ? -(int8_t)b[i] : b[i]);
break;
case '+':
/* imm4m1 (inc/dec value) */
@@ -232,7 +232,7 @@ CPU_DISASSEMBLE( z8000 )
tmp = new_pc - 2 * (w[0] & 0x7f);
break;
case 1: /* disp8 */
- tmp = new_pc + 2 * (INT8)(w[0] & 0xff);
+ tmp = new_pc + 2 * (int8_t)(w[0] & 0xff);
break;
case 2: /* disp12 */
tmp = w[0] & 0x7ff;
diff --git a/src/devices/cpu/z8000/makedab.cpp b/src/devices/cpu/z8000/makedab.cpp
index 57668f3af85..02a27f6783e 100644
--- a/src/devices/cpu/z8000/makedab.cpp
+++ b/src/devices/cpu/z8000/makedab.cpp
@@ -71,7 +71,7 @@ int main(int ac, char **av)
printf(" * 0..7 result value \n");
printf(" * 8 carry flag after \n");
printf(" ************************************************/\n");
- printf("static const UINT16 Z8000_dab[0x800] = {\n");
+ printf("static const uint16_t Z8000_dab[0x800] = {\n");
for (i = 0; i < 0x800; i++) {
if ((i & 0x3ff) == 0) {
if (i & 0x400)
diff --git a/src/devices/cpu/z8000/z8000.cpp b/src/devices/cpu/z8000/z8000.cpp
index 2b8b874bceb..f94b0c1d09c 100644
--- a/src/devices/cpu/z8000/z8000.cpp
+++ b/src/devices/cpu/z8000/z8000.cpp
@@ -32,7 +32,7 @@ const device_type Z8001 = &device_creator<z8001_device>;
const device_type Z8002 = &device_creator<z8002_device>;
-z8002_device::z8002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+z8002_device::z8002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, Z8002, "Z8002", tag, owner, clock, "z8002", __FILE__)
, z80_daisy_chain_interface(mconfig, *this)
, m_program_config("program", ENDIANNESS_BIG, 16, 16, 0)
@@ -43,7 +43,7 @@ z8002_device::z8002_device(const machine_config &mconfig, const char *tag, devic
}
-z8002_device::z8002_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+z8002_device::z8002_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, z80_daisy_chain_interface(mconfig, *this)
, m_program_config("program", ENDIANNESS_BIG, 16, 20, 0)
@@ -54,14 +54,14 @@ z8002_device::z8002_device(const machine_config &mconfig, device_type type, cons
}
-z8001_device::z8001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+z8001_device::z8001_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: z8002_device(mconfig, Z8001, "Zilog Z8001", tag, owner, clock, "z8001", __FILE__)
, m_data_config("data", ENDIANNESS_BIG, 16, 20, 0)
{
}
-offs_t z8002_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t z8002_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( z8000 );
return CPU_DISASSEMBLE_NAME(z8000)(this, buffer, pc, oprom, opram, options);
@@ -72,7 +72,7 @@ offs_t z8002_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op
Z8000_exec *z8000_exec = nullptr;
/* zero, sign and parity flags for logical byte operations */
-static UINT8 z8000_zsp[256];
+static uint8_t z8000_zsp[256];
int z8002_device::segmented_mode()
@@ -85,12 +85,12 @@ int z8001_device::segmented_mode()
return (m_fcw & F_SEG) ? 1 : 0;
}
-UINT32 z8002_device::addr_add(UINT32 addr, UINT32 addend)
+uint32_t z8002_device::addr_add(uint32_t addr, uint32_t addend)
{
return (addr & 0xffff0000) | ((addr + addend) & 0xffff);
}
-UINT32 z8002_device::addr_sub(UINT32 addr, UINT32 subtrahend)
+uint32_t z8002_device::addr_sub(uint32_t addr, uint32_t subtrahend)
{
return (addr & 0xffff0000) | ((addr - subtrahend) & 0xffff);
}
@@ -98,14 +98,14 @@ UINT32 z8002_device::addr_sub(UINT32 addr, UINT32 subtrahend)
/* conversion table for Z8000 DAB opcode */
#include "z8000dab.h"
-UINT16 z8002_device::RDOP()
+uint16_t z8002_device::RDOP()
{
- UINT16 res = m_program->read_word(m_pc);
+ uint16_t res = m_program->read_word(m_pc);
m_pc += 2;
return res;
}
-UINT32 z8002_device::get_operand(int opnum)
+uint32_t z8002_device::get_operand(int opnum)
{
int i;
@@ -123,7 +123,7 @@ UINT32 z8002_device::get_operand(int opnum)
return m_op[opnum];
}
-UINT32 z8002_device::get_addr_operand(int opnum)
+uint32_t z8002_device::get_addr_operand(int opnum)
{
int i;
@@ -134,7 +134,7 @@ UINT32 z8002_device::get_addr_operand(int opnum)
if (! (m_op_valid & (1 << opnum)))
{
- UINT32 seg = m_program->read_word(m_pc);
+ uint32_t seg = m_program->read_word(m_pc);
m_pc += 2;
if (segmented_mode())
{
@@ -153,7 +153,7 @@ UINT32 z8002_device::get_addr_operand(int opnum)
return m_op[opnum];
}
-UINT32 z8002_device::get_raw_addr_operand(int opnum)
+uint32_t z8002_device::get_raw_addr_operand(int opnum)
{
int i;
@@ -164,7 +164,7 @@ UINT32 z8002_device::get_raw_addr_operand(int opnum)
if (! (m_op_valid & (1 << opnum)))
{
- UINT32 seg = m_program->read_word(m_pc);
+ uint32_t seg = m_program->read_word(m_pc);
m_pc += 2;
if (segmented_mode())
{
@@ -183,12 +183,12 @@ UINT32 z8002_device::get_raw_addr_operand(int opnum)
return m_op[opnum];
}
-UINT32 z8002_device::adjust_addr_for_nonseg_mode(UINT32 addr)
+uint32_t z8002_device::adjust_addr_for_nonseg_mode(uint32_t addr)
{
return addr;
}
-UINT32 z8001_device::adjust_addr_for_nonseg_mode(UINT32 addr)
+uint32_t z8001_device::adjust_addr_for_nonseg_mode(uint32_t addr)
{
if (!(m_fcw & F_SEG))
{
@@ -200,7 +200,7 @@ UINT32 z8001_device::adjust_addr_for_nonseg_mode(UINT32 addr)
}
}
-UINT8 z8002_device::RDMEM_B(address_spacenum spacenum, UINT32 addr)
+uint8_t z8002_device::RDMEM_B(address_spacenum spacenum, uint32_t addr)
{
addr = adjust_addr_for_nonseg_mode(addr);
if (spacenum == AS_PROGRAM)
@@ -209,7 +209,7 @@ UINT8 z8002_device::RDMEM_B(address_spacenum spacenum, UINT32 addr)
return m_data->read_byte(addr);
}
-UINT16 z8002_device::RDMEM_W(address_spacenum spacenum, UINT32 addr)
+uint16_t z8002_device::RDMEM_W(address_spacenum spacenum, uint32_t addr)
{
addr = adjust_addr_for_nonseg_mode(addr);
addr &= ~1;
@@ -224,9 +224,9 @@ UINT16 z8002_device::RDMEM_W(address_spacenum spacenum, UINT32 addr)
return m_data->read_word(addr);
}
-UINT32 z8002_device::RDMEM_L(address_spacenum spacenum, UINT32 addr)
+uint32_t z8002_device::RDMEM_L(address_spacenum spacenum, uint32_t addr)
{
- UINT32 result;
+ uint32_t result;
addr = adjust_addr_for_nonseg_mode(addr);
addr &= ~1;
if (spacenum == AS_PROGRAM)
@@ -241,7 +241,7 @@ UINT32 z8002_device::RDMEM_L(address_spacenum spacenum, UINT32 addr)
}
}
-void z8002_device::WRMEM_B(address_spacenum spacenum, UINT32 addr, UINT8 value)
+void z8002_device::WRMEM_B(address_spacenum spacenum, uint32_t addr, uint8_t value)
{
addr = adjust_addr_for_nonseg_mode(addr);
if (spacenum == AS_PROGRAM)
@@ -250,7 +250,7 @@ void z8002_device::WRMEM_B(address_spacenum spacenum, UINT32 addr, UINT8 value)
m_data->write_byte(addr, value);
}
-void z8002_device::WRMEM_W(address_spacenum spacenum, UINT32 addr, UINT16 value)
+void z8002_device::WRMEM_W(address_spacenum spacenum, uint32_t addr, uint16_t value)
{
addr = adjust_addr_for_nonseg_mode(addr);
addr &= ~1;
@@ -260,7 +260,7 @@ void z8002_device::WRMEM_W(address_spacenum spacenum, UINT32 addr, UINT16 value)
m_data->write_word(addr, value);
}
-void z8002_device::WRMEM_L(address_spacenum spacenum, UINT32 addr, UINT32 value)
+void z8002_device::WRMEM_L(address_spacenum spacenum, uint32_t addr, uint32_t value)
{
addr = adjust_addr_for_nonseg_mode(addr);
addr &= ~1;
@@ -276,7 +276,7 @@ void z8002_device::WRMEM_L(address_spacenum spacenum, UINT32 addr, UINT32 value)
}
}
-UINT8 z8002_device::RDPORT_B(int mode, UINT16 addr)
+uint8_t z8002_device::RDPORT_B(int mode, uint16_t addr)
{
if(mode == 0)
{
@@ -289,12 +289,12 @@ UINT8 z8002_device::RDPORT_B(int mode, UINT16 addr)
}
}
-UINT16 z8002_device::RDPORT_W(int mode, UINT16 addr)
+uint16_t z8002_device::RDPORT_W(int mode, uint16_t addr)
{
if(mode == 0)
{
- return m_io->read_byte((UINT16)(addr)) +
- (m_io->read_byte((UINT16)(addr+1)) << 8);
+ return m_io->read_byte((uint16_t)(addr)) +
+ (m_io->read_byte((uint16_t)(addr+1)) << 8);
}
else
{
@@ -303,11 +303,11 @@ UINT16 z8002_device::RDPORT_W(int mode, UINT16 addr)
}
}
-UINT16 z8001_device::RDPORT_W(int mode, UINT16 addr)
+uint16_t z8001_device::RDPORT_W(int mode, uint16_t addr)
{
if(mode == 0)
{
- return m_io->read_word_unaligned((UINT16)addr);
+ return m_io->read_word_unaligned((uint16_t)addr);
}
else
{
@@ -316,7 +316,7 @@ UINT16 z8001_device::RDPORT_W(int mode, UINT16 addr)
}
}
-void z8002_device::WRPORT_B(int mode, UINT16 addr, UINT8 value)
+void z8002_device::WRPORT_B(int mode, uint16_t addr, uint8_t value)
{
if(mode == 0)
{
@@ -329,12 +329,12 @@ void z8002_device::WRPORT_B(int mode, UINT16 addr, UINT8 value)
}
}
-void z8002_device::WRPORT_W(int mode, UINT16 addr, UINT16 value)
+void z8002_device::WRPORT_W(int mode, uint16_t addr, uint16_t value)
{
if(mode == 0)
{
- m_io->write_byte((UINT16)(addr),value & 0xff);
- m_io->write_byte((UINT16)(addr+1),(value >> 8) & 0xff);
+ m_io->write_byte((uint16_t)(addr),value & 0xff);
+ m_io->write_byte((uint16_t)(addr+1),(value >> 8) & 0xff);
}
else
{
@@ -342,11 +342,11 @@ void z8002_device::WRPORT_W(int mode, UINT16 addr, UINT16 value)
}
}
-void z8001_device::WRPORT_W(int mode, UINT16 addr, UINT16 value)
+void z8001_device::WRPORT_W(int mode, uint16_t addr, uint16_t value)
{
if(mode == 0)
{
- m_io->write_word_unaligned((UINT16)addr, value);
+ m_io->write_word_unaligned((uint16_t)addr, value);
}
else
{
@@ -407,42 +407,42 @@ void z8001_device::PUSH_PC()
}
-UINT32 z8002_device::GET_PC(UINT32 VEC)
+uint32_t z8002_device::GET_PC(uint32_t VEC)
{
return RDMEM_W(AS_PROGRAM, VEC + 2);
}
-UINT32 z8001_device::GET_PC(UINT32 VEC)
+uint32_t z8001_device::GET_PC(uint32_t VEC)
{
return segmented_addr(RDMEM_L(AS_PROGRAM, VEC + 4));
}
-UINT16 z8002_device::GET_FCW(UINT32 VEC)
+uint16_t z8002_device::GET_FCW(uint32_t VEC)
{
return RDMEM_W(AS_PROGRAM, VEC);
}
-UINT16 z8001_device::GET_FCW(UINT32 VEC)
+uint16_t z8001_device::GET_FCW(uint32_t VEC)
{
return RDMEM_W(AS_PROGRAM, VEC + 2);
}
-UINT32 z8002_device::F_SEG_Z8001()
+uint32_t z8002_device::F_SEG_Z8001()
{
return 0;
}
-UINT32 z8001_device::F_SEG_Z8001()
+uint32_t z8001_device::F_SEG_Z8001()
{
return F_SEG;
}
-UINT32 z8002_device::PSA_ADDR()
+uint32_t z8002_device::PSA_ADDR()
{
return m_psapoff;
}
-UINT32 z8001_device::PSA_ADDR()
+uint32_t z8001_device::PSA_ADDR()
{
return segmented_addr((m_psapseg << 16) | m_psapoff);
}
@@ -450,7 +450,7 @@ UINT32 z8001_device::PSA_ADDR()
void z8002_device::Interrupt()
{
- UINT16 fcw = m_fcw;
+ uint16_t fcw = m_fcw;
if (m_irq_req & Z8000_NVI)
{
@@ -551,13 +551,13 @@ void z8002_device::Interrupt()
}
}
-UINT32 z8002_device::read_irq_vector()
+uint32_t z8002_device::read_irq_vector()
{
return RDMEM_W(AS_PROGRAM, VEC00 + 2 * (m_irq_req & 0xff));
}
-UINT32 z8001_device::read_irq_vector()
+uint32_t z8001_device::read_irq_vector()
{
return segmented_addr(RDMEM_L(AS_PROGRAM, VEC00 + 4 * (m_irq_req & 0xff)));
}
diff --git a/src/devices/cpu/z8000/z8000.h b/src/devices/cpu/z8000/z8000.h
index 577b82a0935..403b3ef729e 100644
--- a/src/devices/cpu/z8000/z8000.h
+++ b/src/devices/cpu/z8000/z8000.h
@@ -37,8 +37,8 @@ class z8002_device : public cpu_device, public z80_daisy_chain_interface
{
public:
// construction/destruction
- z8002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- z8002_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ z8002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ z8002_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
~z8002_device();
template<class _Object> static devcb_base &set_mo_callback(device_t &device, _Object object) { return downcast<z8002_device &>(device).m_mo_out.set_callback(object); }
@@ -50,10 +50,10 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 2; }
- virtual UINT32 execute_max_cycles() const override { return 744; }
- virtual UINT32 execute_input_lines() const override { return 2; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xff; }
+ virtual uint32_t execute_min_cycles() const override { return 2; }
+ virtual uint32_t execute_max_cycles() const override { return 744; }
+ virtual uint32_t execute_input_lines() const override { return 2; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -72,32 +72,32 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 6; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 6; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config;
address_space_config m_io_config;
devcb_write_line m_mo_out;
- UINT32 m_op[4]; /* opcodes/data of current instruction */
- UINT32 m_ppc; /* previous program counter */
- UINT32 m_pc; /* program counter */
- UINT16 m_psapseg; /* program status pointer, segment (Z8001 only) */
- UINT16 m_psapoff; /* program status pointer, offset */
- UINT16 m_fcw; /* flags and control word */
- UINT16 m_refresh; /* refresh timer/counter */
- UINT16 m_nspseg; /* system stack pointer, segment (Z8001 only) */
- UINT16 m_nspoff; /* system stack pointer, offset */
- UINT16 m_irq_req; /* CPU is halted, interrupt or trap request */
- UINT16 m_irq_vec; /* interrupt vector */
- UINT32 m_op_valid; /* bit field indicating if given op[] field is already initialized */
+ uint32_t m_op[4]; /* opcodes/data of current instruction */
+ uint32_t m_ppc; /* previous program counter */
+ uint32_t m_pc; /* program counter */
+ uint16_t m_psapseg; /* program status pointer, segment (Z8001 only) */
+ uint16_t m_psapoff; /* program status pointer, offset */
+ uint16_t m_fcw; /* flags and control word */
+ uint16_t m_refresh; /* refresh timer/counter */
+ uint16_t m_nspseg; /* system stack pointer, segment (Z8001 only) */
+ uint16_t m_nspoff; /* system stack pointer, offset */
+ uint16_t m_irq_req; /* CPU is halted, interrupt or trap request */
+ uint16_t m_irq_vec; /* interrupt vector */
+ uint32_t m_op_valid; /* bit field indicating if given op[] field is already initialized */
union
{
- UINT8 B[16]; /* RL0,RH0,RL1,RH1...RL7,RH7 */
- UINT16 W[16]; /* R0,R1,R2...R15 */
- UINT32 L[8]; /* RR0,RR2,RR4..RR14 */
- UINT64 Q[4]; /* RQ0,RQ4,..RQ12 */
+ uint8_t B[16]; /* RL0,RH0,RL1,RH1...RL7,RH7 */
+ uint16_t W[16]; /* R0,R1,R2...R15 */
+ uint32_t L[8]; /* RR0,RR2,RR4..RR14 */
+ uint64_t Q[4]; /* RQ0,RQ4,..RQ12 */
} m_regs; /* registers */
int m_nmi_state; /* NMI line state */
int m_irq_state[2]; /* IRQ line states (NVI, VI) */
@@ -112,104 +112,104 @@ protected:
void clear_internal_state();
void register_debug_state();
virtual int segmented_mode();
- static inline UINT32 addr_add(UINT32 addr, UINT32 addend);
- static inline UINT32 addr_sub(UINT32 addr, UINT32 subtrahend);
- inline UINT16 RDOP();
- inline UINT32 get_operand(int opnum);
- inline UINT32 get_addr_operand(int opnum);
- inline UINT32 get_raw_addr_operand(int opnum);
- virtual UINT32 adjust_addr_for_nonseg_mode(UINT32 addr);
- inline UINT8 RDMEM_B(address_spacenum spacenum, UINT32 addr);
- inline UINT16 RDMEM_W(address_spacenum spacenum, UINT32 addr);
- inline UINT32 RDMEM_L(address_spacenum spacenum, UINT32 addr);
- inline void WRMEM_B(address_spacenum spacenum, UINT32 addr, UINT8 value);
- inline void WRMEM_W(address_spacenum spacenum, UINT32 addr, UINT16 value);
- inline void WRMEM_L(address_spacenum spacenum, UINT32 addr, UINT32 value);
- inline UINT8 RDPORT_B(int mode, UINT16 addr);
- virtual UINT16 RDPORT_W(int mode, UINT16 addr);
- inline void WRPORT_B(int mode, UINT16 addr, UINT8 value);
- virtual void WRPORT_W(int mode, UINT16 addr, UINT16 value);
+ static inline uint32_t addr_add(uint32_t addr, uint32_t addend);
+ static inline uint32_t addr_sub(uint32_t addr, uint32_t subtrahend);
+ inline uint16_t RDOP();
+ inline uint32_t get_operand(int opnum);
+ inline uint32_t get_addr_operand(int opnum);
+ inline uint32_t get_raw_addr_operand(int opnum);
+ virtual uint32_t adjust_addr_for_nonseg_mode(uint32_t addr);
+ inline uint8_t RDMEM_B(address_spacenum spacenum, uint32_t addr);
+ inline uint16_t RDMEM_W(address_spacenum spacenum, uint32_t addr);
+ inline uint32_t RDMEM_L(address_spacenum spacenum, uint32_t addr);
+ inline void WRMEM_B(address_spacenum spacenum, uint32_t addr, uint8_t value);
+ inline void WRMEM_W(address_spacenum spacenum, uint32_t addr, uint16_t value);
+ inline void WRMEM_L(address_spacenum spacenum, uint32_t addr, uint32_t value);
+ inline uint8_t RDPORT_B(int mode, uint16_t addr);
+ virtual uint16_t RDPORT_W(int mode, uint16_t addr);
+ inline void WRPORT_B(int mode, uint16_t addr, uint8_t value);
+ virtual void WRPORT_W(int mode, uint16_t addr, uint16_t value);
inline void cycles(int cycles);
inline void set_irq(int type);
virtual void PUSH_PC();
- virtual void CHANGE_FCW(UINT16 fcw);
- static inline UINT32 make_segmented_addr(UINT32 addr);
- static inline UINT32 segmented_addr(UINT32 addr);
- inline UINT32 addr_from_reg(int regno);
- inline void addr_to_reg(int regno, UINT32 addr);
- inline void add_to_addr_reg(int regno, UINT16 addend);
- inline void sub_from_addr_reg(int regno, UINT16 subtrahend);
- inline void set_pc(UINT32 addr);
- inline void PUSHW(UINT8 dst, UINT16 value);
- inline UINT16 POPW(UINT8 src);
- inline void PUSHL(UINT8 dst, UINT32 value);
- inline UINT32 POPL(UINT8 src);
- inline UINT8 ADDB(UINT8 dest, UINT8 value);
- inline UINT16 ADDW(UINT16 dest, UINT16 value);
- inline UINT32 ADDL(UINT32 dest, UINT32 value);
- inline UINT8 ADCB(UINT8 dest, UINT8 value);
- inline UINT16 ADCW(UINT16 dest, UINT16 value);
- inline UINT8 SUBB(UINT8 dest, UINT8 value);
- inline UINT16 SUBW(UINT16 dest, UINT16 value);
- inline UINT32 SUBL(UINT32 dest, UINT32 value);
- inline UINT8 SBCB(UINT8 dest, UINT8 value);
- inline UINT16 SBCW(UINT16 dest, UINT16 value);
- inline UINT8 ORB(UINT8 dest, UINT8 value);
- inline UINT16 ORW(UINT16 dest, UINT16 value);
- inline UINT8 ANDB(UINT8 dest, UINT8 value);
- inline UINT16 ANDW(UINT16 dest, UINT16 value);
- inline UINT8 XORB(UINT8 dest, UINT8 value);
- inline UINT16 XORW(UINT16 dest, UINT16 value);
- inline void CPB(UINT8 dest, UINT8 value);
- inline void CPW(UINT16 dest, UINT16 value);
- inline void CPL(UINT32 dest, UINT32 value);
- inline UINT8 COMB(UINT8 dest);
- inline UINT16 COMW(UINT16 dest);
- inline UINT8 NEGB(UINT8 dest);
- inline UINT16 NEGW(UINT16 dest);
- inline void TESTB(UINT8 result);
- inline void TESTW(UINT16 dest);
- inline void TESTL(UINT32 dest);
- inline UINT8 INCB(UINT8 dest, UINT8 value);
- inline UINT16 INCW(UINT16 dest, UINT16 value);
- inline UINT8 DECB(UINT8 dest, UINT8 value);
- inline UINT16 DECW(UINT16 dest, UINT16 value);
- inline UINT32 MULTW(UINT16 dest, UINT16 value);
- inline UINT64 MULTL(UINT32 dest, UINT32 value);
- inline UINT32 DIVW(UINT32 dest, UINT16 value);
- inline UINT64 DIVL(UINT64 dest, UINT32 value);
- inline UINT8 RLB(UINT8 dest, UINT8 twice);
- inline UINT16 RLW(UINT16 dest, UINT8 twice);
- inline UINT8 RLCB(UINT8 dest, UINT8 twice);
- inline UINT16 RLCW(UINT16 dest, UINT8 twice);
- inline UINT8 RRB(UINT8 dest, UINT8 twice);
- inline UINT16 RRW(UINT16 dest, UINT8 twice);
- inline UINT8 RRCB(UINT8 dest, UINT8 twice);
- inline UINT16 RRCW(UINT16 dest, UINT8 twice);
- inline UINT8 SDAB(UINT8 dest, INT8 count);
- inline UINT16 SDAW(UINT16 dest, INT8 count);
- inline UINT32 SDAL(UINT32 dest, INT8 count);
- inline UINT8 SDLB(UINT8 dest, INT8 count);
- inline UINT16 SDLW(UINT16 dest, INT8 count);
- inline UINT32 SDLL(UINT32 dest, INT8 count);
- inline UINT8 SLAB(UINT8 dest, UINT8 count);
- inline UINT16 SLAW(UINT16 dest, UINT8 count);
- inline UINT32 SLAL(UINT32 dest, UINT8 count);
- inline UINT8 SLLB(UINT8 dest, UINT8 count);
- inline UINT16 SLLW(UINT16 dest, UINT8 count);
- inline UINT32 SLLL(UINT32 dest, UINT8 count);
- inline UINT8 SRAB(UINT8 dest, UINT8 count);
- inline UINT16 SRAW(UINT16 dest, UINT8 count);
- inline UINT32 SRAL(UINT32 dest, UINT8 count);
- inline UINT8 SRLB(UINT8 dest, UINT8 count);
- inline UINT16 SRLW(UINT16 dest, UINT8 count);
- inline UINT32 SRLL(UINT32 dest, UINT8 count);
+ virtual void CHANGE_FCW(uint16_t fcw);
+ static inline uint32_t make_segmented_addr(uint32_t addr);
+ static inline uint32_t segmented_addr(uint32_t addr);
+ inline uint32_t addr_from_reg(int regno);
+ inline void addr_to_reg(int regno, uint32_t addr);
+ inline void add_to_addr_reg(int regno, uint16_t addend);
+ inline void sub_from_addr_reg(int regno, uint16_t subtrahend);
+ inline void set_pc(uint32_t addr);
+ inline void PUSHW(uint8_t dst, uint16_t value);
+ inline uint16_t POPW(uint8_t src);
+ inline void PUSHL(uint8_t dst, uint32_t value);
+ inline uint32_t POPL(uint8_t src);
+ inline uint8_t ADDB(uint8_t dest, uint8_t value);
+ inline uint16_t ADDW(uint16_t dest, uint16_t value);
+ inline uint32_t ADDL(uint32_t dest, uint32_t value);
+ inline uint8_t ADCB(uint8_t dest, uint8_t value);
+ inline uint16_t ADCW(uint16_t dest, uint16_t value);
+ inline uint8_t SUBB(uint8_t dest, uint8_t value);
+ inline uint16_t SUBW(uint16_t dest, uint16_t value);
+ inline uint32_t SUBL(uint32_t dest, uint32_t value);
+ inline uint8_t SBCB(uint8_t dest, uint8_t value);
+ inline uint16_t SBCW(uint16_t dest, uint16_t value);
+ inline uint8_t ORB(uint8_t dest, uint8_t value);
+ inline uint16_t ORW(uint16_t dest, uint16_t value);
+ inline uint8_t ANDB(uint8_t dest, uint8_t value);
+ inline uint16_t ANDW(uint16_t dest, uint16_t value);
+ inline uint8_t XORB(uint8_t dest, uint8_t value);
+ inline uint16_t XORW(uint16_t dest, uint16_t value);
+ inline void CPB(uint8_t dest, uint8_t value);
+ inline void CPW(uint16_t dest, uint16_t value);
+ inline void CPL(uint32_t dest, uint32_t value);
+ inline uint8_t COMB(uint8_t dest);
+ inline uint16_t COMW(uint16_t dest);
+ inline uint8_t NEGB(uint8_t dest);
+ inline uint16_t NEGW(uint16_t dest);
+ inline void TESTB(uint8_t result);
+ inline void TESTW(uint16_t dest);
+ inline void TESTL(uint32_t dest);
+ inline uint8_t INCB(uint8_t dest, uint8_t value);
+ inline uint16_t INCW(uint16_t dest, uint16_t value);
+ inline uint8_t DECB(uint8_t dest, uint8_t value);
+ inline uint16_t DECW(uint16_t dest, uint16_t value);
+ inline uint32_t MULTW(uint16_t dest, uint16_t value);
+ inline uint64_t MULTL(uint32_t dest, uint32_t value);
+ inline uint32_t DIVW(uint32_t dest, uint16_t value);
+ inline uint64_t DIVL(uint64_t dest, uint32_t value);
+ inline uint8_t RLB(uint8_t dest, uint8_t twice);
+ inline uint16_t RLW(uint16_t dest, uint8_t twice);
+ inline uint8_t RLCB(uint8_t dest, uint8_t twice);
+ inline uint16_t RLCW(uint16_t dest, uint8_t twice);
+ inline uint8_t RRB(uint8_t dest, uint8_t twice);
+ inline uint16_t RRW(uint16_t dest, uint8_t twice);
+ inline uint8_t RRCB(uint8_t dest, uint8_t twice);
+ inline uint16_t RRCW(uint16_t dest, uint8_t twice);
+ inline uint8_t SDAB(uint8_t dest, int8_t count);
+ inline uint16_t SDAW(uint16_t dest, int8_t count);
+ inline uint32_t SDAL(uint32_t dest, int8_t count);
+ inline uint8_t SDLB(uint8_t dest, int8_t count);
+ inline uint16_t SDLW(uint16_t dest, int8_t count);
+ inline uint32_t SDLL(uint32_t dest, int8_t count);
+ inline uint8_t SLAB(uint8_t dest, uint8_t count);
+ inline uint16_t SLAW(uint16_t dest, uint8_t count);
+ inline uint32_t SLAL(uint32_t dest, uint8_t count);
+ inline uint8_t SLLB(uint8_t dest, uint8_t count);
+ inline uint16_t SLLW(uint16_t dest, uint8_t count);
+ inline uint32_t SLLL(uint32_t dest, uint8_t count);
+ inline uint8_t SRAB(uint8_t dest, uint8_t count);
+ inline uint16_t SRAW(uint16_t dest, uint8_t count);
+ inline uint32_t SRAL(uint32_t dest, uint8_t count);
+ inline uint8_t SRLB(uint8_t dest, uint8_t count);
+ inline uint16_t SRLW(uint16_t dest, uint8_t count);
+ inline uint32_t SRLL(uint32_t dest, uint8_t count);
inline void Interrupt();
- virtual UINT32 GET_PC(UINT32 VEC);
- virtual UINT16 GET_FCW(UINT32 VEC);
- virtual UINT32 F_SEG_Z8001();
- virtual UINT32 PSA_ADDR();
- virtual UINT32 read_irq_vector();
+ virtual uint32_t GET_PC(uint32_t VEC);
+ virtual uint16_t GET_FCW(uint32_t VEC);
+ virtual uint32_t F_SEG_Z8001();
+ virtual uint32_t PSA_ADDR();
+ virtual uint32_t read_irq_vector();
public:
void zinvalid();
@@ -630,7 +630,7 @@ class z8001_device : public z8002_device
{
public:
// construction/destruction
- z8001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ z8001_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device-level overrides
@@ -650,21 +650,21 @@ protected:
}
// device_disasm_interface overrides
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
address_space_config m_data_config;
virtual int segmented_mode() override;
- virtual UINT32 adjust_addr_for_nonseg_mode(UINT32 addr) override;
- virtual UINT16 RDPORT_W(int mode, UINT16 addr) override;
- virtual void WRPORT_W(int mode, UINT16 addr, UINT16 value) override;
+ virtual uint32_t adjust_addr_for_nonseg_mode(uint32_t addr) override;
+ virtual uint16_t RDPORT_W(int mode, uint16_t addr) override;
+ virtual void WRPORT_W(int mode, uint16_t addr, uint16_t value) override;
virtual void PUSH_PC() override;
- virtual void CHANGE_FCW(UINT16 fcw) override;
- virtual UINT32 GET_PC(UINT32 VEC) override;
- virtual UINT16 GET_FCW(UINT32 VEC) override;
- virtual UINT32 F_SEG_Z8001() override;
- virtual UINT32 PSA_ADDR() override;
- virtual UINT32 read_irq_vector() override;
+ virtual void CHANGE_FCW(uint16_t fcw) override;
+ virtual uint32_t GET_PC(uint32_t VEC) override;
+ virtual uint16_t GET_FCW(uint32_t VEC) override;
+ virtual uint32_t F_SEG_Z8001() override;
+ virtual uint32_t PSA_ADDR() override;
+ virtual uint32_t read_irq_vector() override;
private:
void z8k_disass_mode(int ref, int params, const char *param[]);
diff --git a/src/devices/cpu/z8000/z8000cpu.h b/src/devices/cpu/z8000/z8000cpu.h
index 1a3f9e52b0f..21c648ecb6e 100644
--- a/src/devices/cpu/z8000/z8000cpu.h
+++ b/src/devices/cpu/z8000/z8000cpu.h
@@ -150,30 +150,30 @@
/* get data from the opcode words */
/* o is the opcode word offset */
/* s is a nibble shift factor */
-#define GET_BIT(o) UINT16 bit = 1 << (get_operand(o) & 15)
-#define GET_CCC(o,s) UINT8 cc = (get_operand(o) >> (s)) & 15
+#define GET_BIT(o) uint16_t bit = 1 << (get_operand(o) & 15)
+#define GET_CCC(o,s) uint8_t cc = (get_operand(o) >> (s)) & 15
-#define GET_DST(o,s) UINT8 dst = (get_operand(o) >> (s)) & 15
-#define GET_SRC(o,s) UINT8 src = (get_operand(o) >> (s)) & 15
-#define GET_IDX(o,s) UINT8 idx = (get_operand(o) >> (s)) & 15
-#define GET_CNT(o,s) INT8 cnt = (get_operand(o) >> (s)) & 15
-#define GET_IMM4(o,s) UINT8 imm4 = (get_operand(o) >> (s)) & 15
+#define GET_DST(o,s) uint8_t dst = (get_operand(o) >> (s)) & 15
+#define GET_SRC(o,s) uint8_t src = (get_operand(o) >> (s)) & 15
+#define GET_IDX(o,s) uint8_t idx = (get_operand(o) >> (s)) & 15
+#define GET_CNT(o,s) int8_t cnt = (get_operand(o) >> (s)) & 15
+#define GET_IMM4(o,s) uint8_t imm4 = (get_operand(o) >> (s)) & 15
-#define GET_I4M1(o,s) UINT8 i4p1 = ((get_operand(o) >> (s)) & 15) + 1
-#define GET_IMM1(o,s) UINT8 imm1 = (get_operand(o) >> (s)) & 2
-#define GET_IMM2(o,s) UINT8 imm2 = (get_operand(o) >> (s)) & 3
-#define GET_IMM3(o,s) UINT8 imm3 = (get_operand(o) >> (s)) & 7
+#define GET_I4M1(o,s) uint8_t i4p1 = ((get_operand(o) >> (s)) & 15) + 1
+#define GET_IMM1(o,s) uint8_t imm1 = (get_operand(o) >> (s)) & 2
+#define GET_IMM2(o,s) uint8_t imm2 = (get_operand(o) >> (s)) & 3
+#define GET_IMM3(o,s) uint8_t imm3 = (get_operand(o) >> (s)) & 7
-#define GET_IMM8(o) UINT8 imm8 = (UINT8)get_operand(o)
+#define GET_IMM8(o) uint8_t imm8 = (uint8_t)get_operand(o)
-#define GET_IMM16(o) UINT16 imm16 = get_operand(o)
-#define GET_IDX16(o) UINT32 idx16 = get_operand(o)
-#define GET_IMM32 UINT32 imm32 = (get_operand(1) << 16) + get_operand(2)
-#define GET_DSP7 UINT8 dsp7 = get_operand(0) & 127
-#define GET_DSP8 INT8 dsp8 = (INT8)get_operand(0)
-#define GET_DSP16 UINT32 dsp16 = addr_add(m_pc, (INT16)get_operand(1))
-#define GET_ADDR(o) UINT32 addr = (UINT32)get_addr_operand(o)
-#define GET_ADDR_RAW(o) UINT32 addr = (UINT32)get_raw_addr_operand(o)
+#define GET_IMM16(o) uint16_t imm16 = get_operand(o)
+#define GET_IDX16(o) uint32_t idx16 = get_operand(o)
+#define GET_IMM32 uint32_t imm32 = (get_operand(1) << 16) + get_operand(2)
+#define GET_DSP7 uint8_t dsp7 = get_operand(0) & 127
+#define GET_DSP8 int8_t dsp8 = (int8_t)get_operand(0)
+#define GET_DSP16 uint32_t dsp16 = addr_add(m_pc, (int16_t)get_operand(1))
+#define GET_ADDR(o) uint32_t addr = (uint32_t)get_addr_operand(o)
+#define GET_ADDR_RAW(o) uint32_t addr = (uint32_t)get_raw_addr_operand(o)
/* structure for the opcode definition table */
@@ -184,7 +184,7 @@ struct Z8000_init {
int size, cycles;
opcode_func opcode;
const char *dasm;
- UINT32 dasmflags;
+ uint32_t dasmflags;
};
/* structure for the opcode execution table / disassembler */
@@ -193,7 +193,7 @@ struct Z8000_exec {
int cycles;
int size;
const char *dasm;
- UINT32 dasmflags;
+ uint32_t dasmflags;
};
/* opcode execution table */
diff --git a/src/devices/cpu/z8000/z8000dab.h b/src/devices/cpu/z8000/z8000dab.h
index 44280993803..56fb9220ef3 100644
--- a/src/devices/cpu/z8000/z8000dab.h
+++ b/src/devices/cpu/z8000/z8000dab.h
@@ -15,7 +15,7 @@
* 0..7 result value
* 8 carry flag after
************************************************/
-static const UINT16 Z8000_dab[0x800] = {
+static const uint16_t Z8000_dab[0x800] = {
/* add/adc results */
0x000,0x001,0x002,0x003,0x004,0x005,0x006,0x007,
0x008,0x009,0x010,0x011,0x012,0x013,0x014,0x015,
diff --git a/src/devices/cpu/z8000/z8000ops.hxx b/src/devices/cpu/z8000/z8000ops.hxx
index 4bb0d781f1d..127c9be11e9 100644
--- a/src/devices/cpu/z8000/z8000ops.hxx
+++ b/src/devices/cpu/z8000/z8000ops.hxx
@@ -16,9 +16,9 @@
check new fcw for switch to system mode
and swap stack pointer if needed
******************************************/
-void z8002_device::CHANGE_FCW(UINT16 fcw)
+void z8002_device::CHANGE_FCW(uint16_t fcw)
{
- UINT16 tmp;
+ uint16_t tmp;
if ((fcw ^ m_fcw) & F_S_N) /* system/user mode change? */
{
tmp = RW(15);
@@ -39,9 +39,9 @@ void z8002_device::CHANGE_FCW(UINT16 fcw)
m_fcw = fcw; /* set new m_fcw */
}
-void z8001_device::CHANGE_FCW(UINT16 fcw)
+void z8001_device::CHANGE_FCW(uint16_t fcw)
{
- UINT16 tmp;
+ uint16_t tmp;
if ((fcw ^ m_fcw) & F_S_N) /* system/user mode change? */
{
tmp = RW(15);
@@ -84,17 +84,17 @@ void z8001_device::CHANGE_FCW(UINT16 fcw)
m_fcw = fcw; /* set new m_fcw */
}
-UINT32 z8002_device::make_segmented_addr(UINT32 addr)
+uint32_t z8002_device::make_segmented_addr(uint32_t addr)
{
return ((addr & 0x007f0000) << 8) | 0x80000000 | (addr & 0xffff);
}
-UINT32 z8002_device::segmented_addr(UINT32 addr)
+uint32_t z8002_device::segmented_addr(uint32_t addr)
{
return ((addr & 0x7f000000) >> 8) | (addr & 0xffff);
}
-UINT32 z8002_device::addr_from_reg(int regno)
+uint32_t z8002_device::addr_from_reg(int regno)
{
if (segmented_mode())
return segmented_addr(RL(regno));
@@ -102,10 +102,10 @@ UINT32 z8002_device::addr_from_reg(int regno)
return RW(regno);
}
-void z8002_device::addr_to_reg(int regno, UINT32 addr)
+void z8002_device::addr_to_reg(int regno, uint32_t addr)
{
if (segmented_mode()) {
- UINT32 segaddr = make_segmented_addr(addr);
+ uint32_t segaddr = make_segmented_addr(addr);
RW(regno) = (RW(regno) & 0x80ff) | ((segaddr >> 16) & 0x7f00);
RW(regno | 1) = segaddr & 0xffff;
}
@@ -113,21 +113,21 @@ void z8002_device::addr_to_reg(int regno, UINT32 addr)
RW(regno) = addr;
}
-void z8002_device::add_to_addr_reg(int regno, UINT16 addend)
+void z8002_device::add_to_addr_reg(int regno, uint16_t addend)
{
if (segmented_mode())
regno |= 1;
RW(regno) += addend;
}
-void z8002_device::sub_from_addr_reg(int regno, UINT16 subtrahend)
+void z8002_device::sub_from_addr_reg(int regno, uint16_t subtrahend)
{
if (segmented_mode())
regno |= 1;
RW(regno) -= subtrahend;
}
-void z8002_device::set_pc(UINT32 addr)
+void z8002_device::set_pc(uint32_t addr)
{
if (segmented_mode())
m_pc = addr;
@@ -135,7 +135,7 @@ void z8002_device::set_pc(UINT32 addr)
m_pc = (m_pc & 0xffff0000) | (addr & 0xffff);
}
-void z8002_device::PUSHW(UINT8 dst, UINT16 value)
+void z8002_device::PUSHW(uint8_t dst, uint16_t value)
{
if (segmented_mode())
RW(dst | 1) -= 2;
@@ -144,9 +144,9 @@ void z8002_device::PUSHW(UINT8 dst, UINT16 value)
WRMEM_W(AS_DATA, addr_from_reg(dst), value);
}
-UINT16 z8002_device::POPW(UINT8 src)
+uint16_t z8002_device::POPW(uint8_t src)
{
- UINT16 result = RDMEM_W(AS_DATA, addr_from_reg(src));
+ uint16_t result = RDMEM_W(AS_DATA, addr_from_reg(src));
if (segmented_mode())
RW(src | 1) += 2;
else
@@ -154,7 +154,7 @@ UINT16 z8002_device::POPW(UINT8 src)
return result;
}
-void z8002_device::PUSHL(UINT8 dst, UINT32 value)
+void z8002_device::PUSHL(uint8_t dst, uint32_t value)
{
if (segmented_mode())
RW(dst | 1) -= 4;
@@ -163,9 +163,9 @@ void z8002_device::PUSHL(UINT8 dst, UINT32 value)
WRMEM_L(AS_DATA, addr_from_reg(dst), value);
}
-UINT32 z8002_device::POPL(UINT8 src)
+uint32_t z8002_device::POPL(uint8_t src)
{
- UINT32 result = RDMEM_L(AS_DATA, addr_from_reg(src));
+ uint32_t result = RDMEM_L(AS_DATA, addr_from_reg(src));
if (segmented_mode())
RW(src | 1) += 4;
else
@@ -174,10 +174,10 @@ UINT32 z8002_device::POPL(UINT8 src)
}
/* check zero and sign flag for byte, word and long results */
-#define CHK_XXXB_ZS if (!result) SET_Z; else if ((INT8) result < 0) SET_S
-#define CHK_XXXW_ZS if (!result) SET_Z; else if ((INT16)result < 0) SET_S
-#define CHK_XXXL_ZS if (!result) SET_Z; else if ((INT32)result < 0) SET_S
-#define CHK_XXXQ_ZS if (!result) SET_Z; else if ((INT64)result < 0) SET_S
+#define CHK_XXXB_ZS if (!result) SET_Z; else if ((int8_t) result < 0) SET_S
+#define CHK_XXXW_ZS if (!result) SET_Z; else if ((int16_t)result < 0) SET_S
+#define CHK_XXXL_ZS if (!result) SET_Z; else if ((int32_t)result < 0) SET_S
+#define CHK_XXXQ_ZS if (!result) SET_Z; else if ((int64_t)result < 0) SET_S
#define CHK_XXXB_ZSP m_fcw |= z8000_zsp[result]
@@ -216,9 +216,9 @@ UINT32 z8002_device::POPL(UINT8 src)
add byte
flags: CZSVDH
******************************************/
-UINT8 z8002_device::ADDB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::ADDB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest + value;
+ uint8_t result = dest + value;
CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
CLR_DA; /* clear DA (decimal adjust) flag for addb */
CHK_XXXB_ZS; /* set Z and S flags for result byte */
@@ -232,9 +232,9 @@ UINT8 z8002_device::ADDB(UINT8 dest, UINT8 value)
add word
flags: CZSV--
******************************************/
-UINT16 z8002_device::ADDW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::ADDW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest + value;
+ uint16_t result = dest + value;
CLR_CZSV; /* first clear C, Z, S, P/V flags */
CHK_XXXW_ZS; /* set Z and S flags for result word */
CHK_ADDX_C; /* set C if result overflowed */
@@ -246,9 +246,9 @@ UINT16 z8002_device::ADDW(UINT16 dest, UINT16 value)
add long
flags: CZSV--
******************************************/
-UINT32 z8002_device::ADDL(UINT32 dest, UINT32 value)
+uint32_t z8002_device::ADDL(uint32_t dest, uint32_t value)
{
- UINT32 result = dest + value;
+ uint32_t result = dest + value;
CLR_CZSV; /* first clear C, Z, S, P/V flags */
CHK_XXXL_ZS; /* set Z and S flags for result long */
CHK_ADDX_C; /* set C if result overflowed */
@@ -260,9 +260,9 @@ UINT32 z8002_device::ADDL(UINT32 dest, UINT32 value)
add with carry byte
flags: CZSVDH
******************************************/
-UINT8 z8002_device::ADCB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::ADCB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest + value + GET_C;
+ uint8_t result = dest + value + GET_C;
CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
CLR_DA; /* clear DA (decimal adjust) flag for adcb */
CHK_XXXB_ZS; /* set Z and S flags for result byte */
@@ -276,9 +276,9 @@ UINT8 z8002_device::ADCB(UINT8 dest, UINT8 value)
add with carry word
flags: CZSV--
******************************************/
-UINT16 z8002_device::ADCW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::ADCW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest + value + GET_C;
+ uint16_t result = dest + value + GET_C;
CLR_CZSV; /* first clear C, Z, S, P/V flags */
CHK_XXXW_ZS; /* set Z and S flags for result word */
CHK_ADCX_C; /* set C if result overflowed */
@@ -290,9 +290,9 @@ UINT16 z8002_device::ADCW(UINT16 dest, UINT16 value)
subtract byte
flags: CZSVDH
******************************************/
-UINT8 z8002_device::SUBB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::SUBB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest - value;
+ uint8_t result = dest - value;
CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
SET_DA; /* set DA (decimal adjust) flag for subb */
CHK_XXXB_ZS; /* set Z and S flags for result byte */
@@ -306,9 +306,9 @@ UINT8 z8002_device::SUBB(UINT8 dest, UINT8 value)
subtract word
flags: CZSV--
******************************************/
-UINT16 z8002_device::SUBW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::SUBW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest - value;
+ uint16_t result = dest - value;
CLR_CZSV; /* first clear C, Z, S, P/V flags */
CHK_XXXW_ZS; /* set Z and S flags for result word */
CHK_SUBX_C; /* set C if result underflowed */
@@ -320,9 +320,9 @@ UINT16 z8002_device::SUBW(UINT16 dest, UINT16 value)
subtract long
flags: CZSV--
******************************************/
-UINT32 z8002_device::SUBL(UINT32 dest, UINT32 value)
+uint32_t z8002_device::SUBL(uint32_t dest, uint32_t value)
{
- UINT32 result = dest - value;
+ uint32_t result = dest - value;
CLR_CZSV; /* first clear C, Z, S, P/V flags */
CHK_XXXL_ZS; /* set Z and S flags for result long */
CHK_SUBX_C; /* set C if result underflowed */
@@ -334,9 +334,9 @@ UINT32 z8002_device::SUBL(UINT32 dest, UINT32 value)
subtract with carry byte
flags: CZSVDH
******************************************/
-UINT8 z8002_device::SBCB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::SBCB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest - value - GET_C;
+ uint8_t result = dest - value - GET_C;
CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
SET_DA; /* set DA (decimal adjust) flag for sbcb */
CHK_XXXB_ZS; /* set Z and S flags for result byte */
@@ -350,9 +350,9 @@ UINT8 z8002_device::SBCB(UINT8 dest, UINT8 value)
subtract with carry word
flags: CZSV--
******************************************/
-UINT16 z8002_device::SBCW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::SBCW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest - value - GET_C;
+ uint16_t result = dest - value - GET_C;
CLR_CZSV; /* first clear C, Z, S, P/V flags */
CHK_XXXW_ZS; /* set Z and S flags for result word */
CHK_SBCX_C; /* set C if result underflowed */
@@ -364,9 +364,9 @@ UINT16 z8002_device::SBCW(UINT16 dest, UINT16 value)
logical or byte
flags: -ZSP--
******************************************/
-UINT8 z8002_device::ORB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::ORB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest | value;
+ uint8_t result = dest | value;
CLR_ZSP; /* first clear Z, S, P/V flags */
CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
return result;
@@ -376,9 +376,9 @@ UINT8 z8002_device::ORB(UINT8 dest, UINT8 value)
logical or word
flags: -ZS---
******************************************/
-UINT16 z8002_device::ORW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::ORW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest | value;
+ uint16_t result = dest | value;
CLR_ZS; /* first clear Z, and S flags */
CHK_XXXW_ZS; /* set Z and S flags for result word */
return result;
@@ -388,9 +388,9 @@ UINT16 z8002_device::ORW(UINT16 dest, UINT16 value)
logical and byte
flags: -ZSP--
******************************************/
-UINT8 z8002_device::ANDB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::ANDB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest & value;
+ uint8_t result = dest & value;
CLR_ZSP; /* first clear Z,S and P/V flags */
CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
return result;
@@ -400,9 +400,9 @@ UINT8 z8002_device::ANDB(UINT8 dest, UINT8 value)
logical and word
flags: -ZS---
******************************************/
-UINT16 z8002_device::ANDW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::ANDW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest & value;
+ uint16_t result = dest & value;
CLR_ZS; /* first clear Z and S flags */
CHK_XXXW_ZS; /* set Z and S flags for result word */
return result;
@@ -412,9 +412,9 @@ UINT16 z8002_device::ANDW(UINT16 dest, UINT16 value)
logical exclusive or byte
flags: -ZSP--
******************************************/
-UINT8 z8002_device::XORB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::XORB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest ^ value;
+ uint8_t result = dest ^ value;
CLR_ZSP; /* first clear Z, S and P/V flags */
CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
return result;
@@ -424,9 +424,9 @@ UINT8 z8002_device::XORB(UINT8 dest, UINT8 value)
logical exclusive or word
flags: -ZS---
******************************************/
-UINT16 z8002_device::XORW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::XORW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest ^ value;
+ uint16_t result = dest ^ value;
CLR_ZS; /* first clear Z and S flags */
CHK_XXXW_ZS; /* set Z and S flags for result word */
return result;
@@ -437,9 +437,9 @@ UINT16 z8002_device::XORW(UINT16 dest, UINT16 value)
compare byte
flags: CZSV--
******************************************/
-void z8002_device::CPB(UINT8 dest, UINT8 value)
+void z8002_device::CPB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest - value;
+ uint8_t result = dest - value;
CLR_CZSV; /* first clear C, Z, S and P/V flags */
CHK_XXXB_ZS; /* set Z and S flags for result byte */
CHK_SUBX_C; /* set C if result underflowed */
@@ -450,9 +450,9 @@ void z8002_device::CPB(UINT8 dest, UINT8 value)
compare word
flags: CZSV--
******************************************/
-void z8002_device::CPW(UINT16 dest, UINT16 value)
+void z8002_device::CPW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest - value;
+ uint16_t result = dest - value;
CLR_CZSV;
CHK_XXXW_ZS; /* set Z and S flags for result word */
CHK_SUBX_C; /* set C if result underflowed */
@@ -463,9 +463,9 @@ void z8002_device::CPW(UINT16 dest, UINT16 value)
compare long
flags: CZSV--
******************************************/
-void z8002_device::CPL(UINT32 dest, UINT32 value)
+void z8002_device::CPL(uint32_t dest, uint32_t value)
{
- UINT32 result = dest - value;
+ uint32_t result = dest - value;
CLR_CZSV;
CHK_XXXL_ZS; /* set Z and S flags for result long */
CHK_SUBX_C; /* set C if result underflowed */
@@ -476,9 +476,9 @@ void z8002_device::CPL(UINT32 dest, UINT32 value)
complement byte
flags: -ZSP--
******************************************/
-UINT8 z8002_device::COMB(UINT8 dest)
+uint8_t z8002_device::COMB(uint8_t dest)
{
- UINT8 result = ~dest;
+ uint8_t result = ~dest;
CLR_ZSP;
CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
return result;
@@ -488,9 +488,9 @@ UINT8 z8002_device::COMB(UINT8 dest)
complement word
flags: -ZS---
******************************************/
-UINT16 z8002_device::COMW(UINT16 dest)
+uint16_t z8002_device::COMW(uint16_t dest)
{
- UINT16 result = ~dest;
+ uint16_t result = ~dest;
CLR_ZS;
CHK_XXXW_ZS; /* set Z and S flags for result word */
return result;
@@ -500,9 +500,9 @@ UINT16 z8002_device::COMW(UINT16 dest)
negate byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::NEGB(UINT8 dest)
+uint8_t z8002_device::NEGB(uint8_t dest)
{
- UINT8 result = (UINT8) -dest;
+ uint8_t result = (uint8_t) -dest;
CLR_CZSV;
CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (result > 0) SET_C;
@@ -514,9 +514,9 @@ UINT8 z8002_device::NEGB(UINT8 dest)
negate word
flags: CZSV--
******************************************/
-UINT16 z8002_device::NEGW(UINT16 dest)
+uint16_t z8002_device::NEGW(uint16_t dest)
{
- UINT16 result = (UINT16) -dest;
+ uint16_t result = (uint16_t) -dest;
CLR_CZSV;
CHK_XXXW_ZS; /* set Z and S flags for result word */
if (result > 0) SET_C;
@@ -528,7 +528,7 @@ UINT16 z8002_device::NEGW(UINT16 dest)
test byte
flags: -ZSP--
******************************************/
-void z8002_device::TESTB(UINT8 result)
+void z8002_device::TESTB(uint8_t result)
{
CLR_ZSP;
CHK_XXXB_ZSP; /* set Z and S flags for result byte */
@@ -538,7 +538,7 @@ void z8002_device::TESTB(UINT8 result)
test word
flags: -ZS---
******************************************/
-void z8002_device::TESTW(UINT16 dest)
+void z8002_device::TESTW(uint16_t dest)
{
CLR_ZS;
if (!dest) SET_Z; else if (dest & S16) SET_S;
@@ -548,7 +548,7 @@ void z8002_device::TESTW(UINT16 dest)
test long
flags: -ZS---
******************************************/
-void z8002_device::TESTL(UINT32 dest)
+void z8002_device::TESTL(uint32_t dest)
{
CLR_ZS;
if (!dest) SET_Z; else if (dest & S32) SET_S;
@@ -558,9 +558,9 @@ void z8002_device::TESTL(UINT32 dest)
increment byte
flags: -ZSV--
******************************************/
-UINT8 z8002_device::INCB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::INCB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest + value;
+ uint8_t result = dest + value;
CLR_ZSV;
CHK_XXXB_ZS; /* set Z and S flags for result byte */
CHK_ADDB_V; /* set V if result overflowed */
@@ -571,9 +571,9 @@ UINT8 z8002_device::INCB(UINT8 dest, UINT8 value)
increment word
flags: -ZSV--
******************************************/
-UINT16 z8002_device::INCW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::INCW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest + value;
+ uint16_t result = dest + value;
CLR_ZSV;
CHK_XXXW_ZS; /* set Z and S flags for result byte */
CHK_ADDW_V; /* set V if result overflowed */
@@ -584,9 +584,9 @@ UINT16 z8002_device::INCW(UINT16 dest, UINT16 value)
decrement byte
flags: -ZSV--
******************************************/
-UINT8 z8002_device::DECB(UINT8 dest, UINT8 value)
+uint8_t z8002_device::DECB(uint8_t dest, uint8_t value)
{
- UINT8 result = dest - value;
+ uint8_t result = dest - value;
CLR_ZSV;
CHK_XXXB_ZS; /* set Z and S flags for result byte */
CHK_SUBB_V; /* set V if result overflowed */
@@ -597,9 +597,9 @@ UINT8 z8002_device::DECB(UINT8 dest, UINT8 value)
decrement word
flags: -ZSV--
******************************************/
-UINT16 z8002_device::DECW(UINT16 dest, UINT16 value)
+uint16_t z8002_device::DECW(uint16_t dest, uint16_t value)
{
- UINT16 result = dest - value;
+ uint16_t result = dest - value;
CLR_ZSV;
CHK_XXXW_ZS; /* set Z and S flags for result word */
CHK_SUBW_V; /* set V if result overflowed */
@@ -610,9 +610,9 @@ UINT16 z8002_device::DECW(UINT16 dest, UINT16 value)
multiply words
flags: CZSV--
******************************************/
-UINT32 z8002_device::MULTW(UINT16 dest, UINT16 value)
+uint32_t z8002_device::MULTW(uint16_t dest, uint16_t value)
{
- UINT32 result = (INT32)(INT16)dest * (INT16)value;
+ uint32_t result = (int32_t)(int16_t)dest * (int16_t)value;
CLR_CZSV;
CHK_XXXL_ZS;
if(!value)
@@ -620,7 +620,7 @@ UINT32 z8002_device::MULTW(UINT16 dest, UINT16 value)
/* multiplication with zero is faster */
m_icount += (70-18);
}
- if((INT32)result < -0x7fff || (INT32)result >= 0x7fff) SET_C;
+ if((int32_t)result < -0x7fff || (int32_t)result >= 0x7fff) SET_C;
return result;
}
@@ -628,9 +628,9 @@ UINT32 z8002_device::MULTW(UINT16 dest, UINT16 value)
multiply longs
flags: CZSV--
******************************************/
-UINT64 z8002_device::MULTL(UINT32 dest, UINT32 value)
+uint64_t z8002_device::MULTL(uint32_t dest, uint32_t value)
{
- UINT64 result = (INT64)(INT32)dest * (INT32)value;
+ uint64_t result = (int64_t)(int32_t)dest * (int32_t)value;
if(!value)
{
/* multiplication with zero is faster */
@@ -644,7 +644,7 @@ UINT64 z8002_device::MULTL(UINT32 dest, UINT32 value)
}
CLR_CZSV;
CHK_XXXQ_ZS;
- if((INT64)result < -0x7fffffffL || (INT64)result >= 0x7fffffffL) SET_C;
+ if((int64_t)result < -0x7fffffffL || (int64_t)result >= 0x7fffffffL) SET_C;
return result;
}
@@ -652,24 +652,24 @@ UINT64 z8002_device::MULTL(UINT32 dest, UINT32 value)
divide long by word
flags: CZSV--
******************************************/
-UINT32 z8002_device::DIVW(UINT32 dest, UINT16 value)
+uint32_t z8002_device::DIVW(uint32_t dest, uint16_t value)
{
- UINT32 result = dest;
- UINT16 remainder = 0;
+ uint32_t result = dest;
+ uint16_t remainder = 0;
CLR_CZSV;
if (value)
{
- UINT16 qsign = ((dest >> 16) ^ value) & S16;
- UINT16 rsign = (dest >> 16) & S16;
- if ((INT32)dest < 0) dest = -dest;
- if ((INT16)value < 0) value = -value;
+ uint16_t qsign = ((dest >> 16) ^ value) & S16;
+ uint16_t rsign = (dest >> 16) & S16;
+ if ((int32_t)dest < 0) dest = -dest;
+ if ((int16_t)value < 0) value = -value;
result = dest / value;
remainder = dest % value;
if (qsign) result = -result;
if (rsign) remainder = -remainder;
- if ((INT32)result < -0x8000 || (INT32)result > 0x7fff)
+ if ((int32_t)result < -0x8000 || (int32_t)result > 0x7fff)
{
- INT32 temp = (INT32)result >> 1;
+ int32_t temp = (int32_t)result >> 1;
SET_V;
if (temp >= -0x8000 && temp <= 0x7fff)
{
@@ -682,7 +682,7 @@ UINT32 z8002_device::DIVW(UINT32 dest, UINT16 value)
{
CHK_XXXW_ZS;
}
- result = ((UINT32)remainder << 16) | (result & 0xffff);
+ result = ((uint32_t)remainder << 16) | (result & 0xffff);
}
else
{
@@ -696,24 +696,24 @@ UINT32 z8002_device::DIVW(UINT32 dest, UINT16 value)
divide quad word by long
flags: CZSV--
******************************************/
-UINT64 z8002_device::DIVL(UINT64 dest, UINT32 value)
+uint64_t z8002_device::DIVL(uint64_t dest, uint32_t value)
{
- UINT64 result = dest;
- UINT32 remainder = 0;
+ uint64_t result = dest;
+ uint32_t remainder = 0;
CLR_CZSV;
if (value)
{
- UINT32 qsign = ((dest >> 32) ^ value) & S32;
- UINT32 rsign = (dest >> 32) & S32;
- if ((INT64)dest < 0) dest = -dest;
- if ((INT32)value < 0) value = -value;
+ uint32_t qsign = ((dest >> 32) ^ value) & S32;
+ uint32_t rsign = (dest >> 32) & S32;
+ if ((int64_t)dest < 0) dest = -dest;
+ if ((int32_t)value < 0) value = -value;
result = dest / value;
remainder = dest % value;
if (qsign) result = -result;
if (rsign) remainder = -remainder;
- if ((INT64)result < -0x80000000 || (INT64)result > 0x7fffffff)
+ if ((int64_t)result < -0x80000000 || (int64_t)result > 0x7fffffff)
{
- INT64 temp = (INT64)result >> 1;
+ int64_t temp = (int64_t)result >> 1;
SET_V;
if (temp >= -0x80000000 && temp <= 0x7fffffff)
{
@@ -726,7 +726,7 @@ UINT64 z8002_device::DIVL(UINT64 dest, UINT32 value)
{
CHK_XXXL_ZS;
}
- result = ((UINT64)remainder << 32) | (result & 0xffffffff);
+ result = ((uint64_t)remainder << 32) | (result & 0xffffffff);
}
else
{
@@ -740,9 +740,9 @@ UINT64 z8002_device::DIVL(UINT64 dest, UINT32 value)
rotate left byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::RLB(UINT8 dest, UINT8 twice)
+uint8_t z8002_device::RLB(uint8_t dest, uint8_t twice)
{
- UINT8 result = (dest << 1) | (dest >> 7);
+ uint8_t result = (dest << 1) | (dest >> 7);
CLR_CZSV;
if (twice) result = (result << 1) | (result >> 7);
CHK_XXXB_ZS; /* set Z and S flags for result byte */
@@ -755,9 +755,9 @@ UINT8 z8002_device::RLB(UINT8 dest, UINT8 twice)
rotate left word
flags: CZSV--
******************************************/
-UINT16 z8002_device::RLW(UINT16 dest, UINT8 twice)
+uint16_t z8002_device::RLW(uint16_t dest, uint8_t twice)
{
- UINT16 result = (dest << 1) | (dest >> 15);
+ uint16_t result = (dest << 1) | (dest >> 15);
CLR_CZSV;
if (twice) result = (result << 1) | (result >> 15);
CHK_XXXW_ZS; /* set Z and S flags for result word */
@@ -770,13 +770,13 @@ UINT16 z8002_device::RLW(UINT16 dest, UINT8 twice)
rotate left through carry byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::RLCB(UINT8 dest, UINT8 twice)
+uint8_t z8002_device::RLCB(uint8_t dest, uint8_t twice)
{
- UINT8 c = dest & S08;
- UINT8 result = (dest << 1) | GET_C;
+ uint8_t c = dest & S08;
+ uint8_t result = (dest << 1) | GET_C;
CLR_CZSV;
if (twice) {
- UINT8 c1 = c >> 7;
+ uint8_t c1 = c >> 7;
c = result & S08;
result = (result << 1) | c1;
}
@@ -790,13 +790,13 @@ UINT8 z8002_device::RLCB(UINT8 dest, UINT8 twice)
rotate left through carry word
flags: CZSV--
******************************************/
-UINT16 z8002_device::RLCW(UINT16 dest, UINT8 twice)
+uint16_t z8002_device::RLCW(uint16_t dest, uint8_t twice)
{
- UINT16 c = dest & S16;
- UINT16 result = (dest << 1) | GET_C;
+ uint16_t c = dest & S16;
+ uint16_t result = (dest << 1) | GET_C;
CLR_CZSV;
if (twice) {
- UINT16 c1 = c >> 15;
+ uint16_t c1 = c >> 15;
c = result & S16;
result = (result << 1) | c1;
}
@@ -810,9 +810,9 @@ UINT16 z8002_device::RLCW(UINT16 dest, UINT8 twice)
rotate right byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::RRB(UINT8 dest, UINT8 twice)
+uint8_t z8002_device::RRB(uint8_t dest, uint8_t twice)
{
- UINT8 result = (dest >> 1) | (dest << 7);
+ uint8_t result = (dest >> 1) | (dest << 7);
CLR_CZSV;
if (twice) result = (result >> 1) | (result << 7);
if (!result) SET_Z; else if (result & S08) SET_SC;
@@ -824,9 +824,9 @@ UINT8 z8002_device::RRB(UINT8 dest, UINT8 twice)
rotate right word
flags: CZSV--
******************************************/
-UINT16 z8002_device::RRW(UINT16 dest, UINT8 twice)
+uint16_t z8002_device::RRW(uint16_t dest, uint8_t twice)
{
- UINT16 result = (dest >> 1) | (dest << 15);
+ uint16_t result = (dest >> 1) | (dest << 15);
CLR_CZSV;
if (twice) result = (result >> 1) | (result << 15);
if (!result) SET_Z; else if (result & S16) SET_SC;
@@ -838,13 +838,13 @@ UINT16 z8002_device::RRW(UINT16 dest, UINT8 twice)
rotate right through carry byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::RRCB(UINT8 dest, UINT8 twice)
+uint8_t z8002_device::RRCB(uint8_t dest, uint8_t twice)
{
- UINT8 c = dest & 1;
- UINT8 result = (dest >> 1) | (GET_C << 7);
+ uint8_t c = dest & 1;
+ uint8_t result = (dest >> 1) | (GET_C << 7);
CLR_CZSV;
if (twice) {
- UINT8 c1 = c << 7;
+ uint8_t c1 = c << 7;
c = result & 1;
result = (result >> 1) | c1;
}
@@ -858,13 +858,13 @@ UINT8 z8002_device::RRCB(UINT8 dest, UINT8 twice)
rotate right through carry word
flags: CZSV--
******************************************/
-UINT16 z8002_device::RRCW(UINT16 dest, UINT8 twice)
+uint16_t z8002_device::RRCW(uint16_t dest, uint8_t twice)
{
- UINT16 c = dest & 1;
- UINT16 result = (dest >> 1) | (GET_C << 15);
+ uint16_t c = dest & 1;
+ uint16_t result = (dest >> 1) | (GET_C << 15);
CLR_CZSV;
if (twice) {
- UINT16 c1 = c << 15;
+ uint16_t c1 = c << 15;
c = result & 1;
result = (result >> 1) | c1;
}
@@ -878,10 +878,10 @@ UINT16 z8002_device::RRCW(UINT16 dest, UINT8 twice)
shift dynamic arithmetic byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::SDAB(UINT8 dest, INT8 count)
+uint8_t z8002_device::SDAB(uint8_t dest, int8_t count)
{
- INT8 result = (INT8) dest;
- UINT8 c = 0;
+ int8_t result = (int8_t) dest;
+ uint8_t c = 0;
CLR_CZSV;
while (count > 0) {
c = result & S08;
@@ -896,17 +896,17 @@ UINT8 z8002_device::SDAB(UINT8 dest, INT8 count)
CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
if ((result ^ dest) & S08) SET_V;
- return (UINT8)result;
+ return (uint8_t)result;
}
/******************************************
shift dynamic arithmetic word
flags: CZSV--
******************************************/
-UINT16 z8002_device::SDAW(UINT16 dest, INT8 count)
+uint16_t z8002_device::SDAW(uint16_t dest, int8_t count)
{
- INT16 result = (INT16) dest;
- UINT16 c = 0;
+ int16_t result = (int16_t) dest;
+ uint16_t c = 0;
CLR_CZSV;
while (count > 0) {
c = result & S16;
@@ -921,17 +921,17 @@ UINT16 z8002_device::SDAW(UINT16 dest, INT8 count)
CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
if ((result ^ dest) & S16) SET_V;
- return (UINT16)result;
+ return (uint16_t)result;
}
/******************************************
shift dynamic arithmetic long
flags: CZSV--
******************************************/
-UINT32 z8002_device::SDAL(UINT32 dest, INT8 count)
+uint32_t z8002_device::SDAL(uint32_t dest, int8_t count)
{
- INT32 result = (INT32) dest;
- UINT32 c = 0;
+ int32_t result = (int32_t) dest;
+ uint32_t c = 0;
CLR_CZSV;
while (count > 0) {
c = result & S32;
@@ -946,17 +946,17 @@ UINT32 z8002_device::SDAL(UINT32 dest, INT8 count)
CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
if ((result ^ dest) & S32) SET_V;
- return (UINT32) result;
+ return (uint32_t) result;
}
/******************************************
shift dynamic logic byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::SDLB(UINT8 dest, INT8 count)
+uint8_t z8002_device::SDLB(uint8_t dest, int8_t count)
{
- UINT8 result = dest;
- UINT8 c = 0;
+ uint8_t result = dest;
+ uint8_t c = 0;
CLR_CZSV;
while (count > 0) {
c = result & S08;
@@ -978,10 +978,10 @@ UINT8 z8002_device::SDLB(UINT8 dest, INT8 count)
shift dynamic logic word
flags: CZSV--
******************************************/
-UINT16 z8002_device::SDLW(UINT16 dest, INT8 count)
+uint16_t z8002_device::SDLW(uint16_t dest, int8_t count)
{
- UINT16 result = dest;
- UINT16 c = 0;
+ uint16_t result = dest;
+ uint16_t c = 0;
CLR_CZSV;
while (count > 0) {
c = result & S16;
@@ -1003,10 +1003,10 @@ UINT16 z8002_device::SDLW(UINT16 dest, INT8 count)
shift dynamic logic long
flags: CZSV--
******************************************/
-UINT32 z8002_device::SDLL(UINT32 dest, INT8 count)
+uint32_t z8002_device::SDLL(uint32_t dest, int8_t count)
{
- UINT32 result = dest;
- UINT32 c = 0;
+ uint32_t result = dest;
+ uint32_t c = 0;
CLR_CZSV;
while (count > 0) {
c = result & S32;
@@ -1028,10 +1028,10 @@ UINT32 z8002_device::SDLL(UINT32 dest, INT8 count)
shift left arithmetic byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::SLAB(UINT8 dest, UINT8 count)
+uint8_t z8002_device::SLAB(uint8_t dest, uint8_t count)
{
- UINT8 c = (count) ? (dest << (count - 1)) & S08 : 0;
- UINT8 result = (UINT8)((INT8)dest << count);
+ uint8_t c = (count) ? (dest << (count - 1)) & S08 : 0;
+ uint8_t result = (uint8_t)((int8_t)dest << count);
CLR_CZSV;
CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
@@ -1043,10 +1043,10 @@ UINT8 z8002_device::SLAB(UINT8 dest, UINT8 count)
shift left arithmetic word
flags: CZSV--
******************************************/
-UINT16 z8002_device::SLAW(UINT16 dest, UINT8 count)
+uint16_t z8002_device::SLAW(uint16_t dest, uint8_t count)
{
- UINT16 c = (count) ? (dest << (count - 1)) & S16 : 0;
- UINT16 result = (UINT16)((INT16)dest << count);
+ uint16_t c = (count) ? (dest << (count - 1)) & S16 : 0;
+ uint16_t result = (uint16_t)((int16_t)dest << count);
CLR_CZSV;
CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
@@ -1058,10 +1058,10 @@ UINT16 z8002_device::SLAW(UINT16 dest, UINT8 count)
shift left arithmetic long
flags: CZSV--
******************************************/
-UINT32 z8002_device::SLAL(UINT32 dest, UINT8 count)
+uint32_t z8002_device::SLAL(uint32_t dest, uint8_t count)
{
- UINT32 c = (count) ? (dest << (count - 1)) & S32 : 0;
- UINT32 result = (UINT32)((INT32)dest << count);
+ uint32_t c = (count) ? (dest << (count - 1)) & S32 : 0;
+ uint32_t result = (uint32_t)((int32_t)dest << count);
CLR_CZSV;
CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
@@ -1073,10 +1073,10 @@ UINT32 z8002_device::SLAL(UINT32 dest, UINT8 count)
shift left logic byte
flags: CZS---
******************************************/
-UINT8 z8002_device::SLLB(UINT8 dest, UINT8 count)
+uint8_t z8002_device::SLLB(uint8_t dest, uint8_t count)
{
- UINT8 c = (count) ? (dest << (count - 1)) & S08 : 0;
- UINT8 result = dest << count;
+ uint8_t c = (count) ? (dest << (count - 1)) & S08 : 0;
+ uint8_t result = dest << count;
CLR_CZS;
CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
@@ -1087,10 +1087,10 @@ UINT8 z8002_device::SLLB(UINT8 dest, UINT8 count)
shift left logic word
flags: CZS---
******************************************/
-UINT16 z8002_device::SLLW(UINT16 dest, UINT8 count)
+uint16_t z8002_device::SLLW(uint16_t dest, uint8_t count)
{
- UINT16 c = (count) ? (dest << (count - 1)) & S16 : 0;
- UINT16 result = dest << count;
+ uint16_t c = (count) ? (dest << (count - 1)) & S16 : 0;
+ uint16_t result = dest << count;
CLR_CZS;
CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
@@ -1101,10 +1101,10 @@ UINT16 z8002_device::SLLW(UINT16 dest, UINT8 count)
shift left logic long
flags: CZS---
******************************************/
-UINT32 z8002_device::SLLL(UINT32 dest, UINT8 count)
+uint32_t z8002_device::SLLL(uint32_t dest, uint8_t count)
{
- UINT32 c = (count) ? (dest << (count - 1)) & S32 : 0;
- UINT32 result = dest << count;
+ uint32_t c = (count) ? (dest << (count - 1)) & S32 : 0;
+ uint32_t result = dest << count;
CLR_CZS;
CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
@@ -1115,10 +1115,10 @@ UINT32 z8002_device::SLLL(UINT32 dest, UINT8 count)
shift right arithmetic byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::SRAB(UINT8 dest, UINT8 count)
+uint8_t z8002_device::SRAB(uint8_t dest, uint8_t count)
{
- UINT8 c = (count) ? ((INT8)dest >> (count - 1)) & 1 : 0;
- UINT8 result = (UINT8)((INT8)dest >> count);
+ uint8_t c = (count) ? ((int8_t)dest >> (count - 1)) & 1 : 0;
+ uint8_t result = (uint8_t)((int8_t)dest >> count);
CLR_CZSV;
CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
@@ -1129,10 +1129,10 @@ UINT8 z8002_device::SRAB(UINT8 dest, UINT8 count)
shift right arithmetic word
flags: CZSV--
******************************************/
-UINT16 z8002_device::SRAW(UINT16 dest, UINT8 count)
+uint16_t z8002_device::SRAW(uint16_t dest, uint8_t count)
{
- UINT8 c = (count) ? ((INT16)dest >> (count - 1)) & 1 : 0;
- UINT16 result = (UINT16)((INT16)dest >> count);
+ uint8_t c = (count) ? ((int16_t)dest >> (count - 1)) & 1 : 0;
+ uint16_t result = (uint16_t)((int16_t)dest >> count);
CLR_CZSV;
CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
@@ -1143,10 +1143,10 @@ UINT16 z8002_device::SRAW(UINT16 dest, UINT8 count)
shift right arithmetic long
flags: CZSV--
******************************************/
-UINT32 z8002_device::SRAL(UINT32 dest, UINT8 count)
+uint32_t z8002_device::SRAL(uint32_t dest, uint8_t count)
{
- UINT8 c = (count) ? ((INT32)dest >> (count - 1)) & 1 : 0;
- UINT32 result = (UINT32)((INT32)dest >> count);
+ uint8_t c = (count) ? ((int32_t)dest >> (count - 1)) & 1 : 0;
+ uint32_t result = (uint32_t)((int32_t)dest >> count);
CLR_CZSV;
CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
@@ -1157,10 +1157,10 @@ UINT32 z8002_device::SRAL(UINT32 dest, UINT8 count)
shift right logic byte
flags: CZSV--
******************************************/
-UINT8 z8002_device::SRLB(UINT8 dest, UINT8 count)
+uint8_t z8002_device::SRLB(uint8_t dest, uint8_t count)
{
- UINT8 c = (count) ? (dest >> (count - 1)) & 1 : 0;
- UINT8 result = dest >> count;
+ uint8_t c = (count) ? (dest >> (count - 1)) & 1 : 0;
+ uint8_t result = dest >> count;
CLR_CZS;
CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
@@ -1171,10 +1171,10 @@ UINT8 z8002_device::SRLB(UINT8 dest, UINT8 count)
shift right logic word
flags: CZSV--
******************************************/
-UINT16 z8002_device::SRLW(UINT16 dest, UINT8 count)
+uint16_t z8002_device::SRLW(uint16_t dest, uint8_t count)
{
- UINT8 c = (count) ? (dest >> (count - 1)) & 1 : 0;
- UINT16 result = dest >> count;
+ uint8_t c = (count) ? (dest >> (count - 1)) & 1 : 0;
+ uint16_t result = dest >> count;
CLR_CZS;
CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
@@ -1185,10 +1185,10 @@ UINT16 z8002_device::SRLW(UINT16 dest, UINT8 count)
shift right logic long
flags: CZSV--
******************************************/
-UINT32 z8002_device::SRLL(UINT32 dest, UINT8 count)
+uint32_t z8002_device::SRLL(uint32_t dest, uint8_t count)
{
- UINT8 c = (count) ? (dest >> (count - 1)) & 1 : 0;
- UINT32 result = dest >> count;
+ uint8_t c = (count) ? (dest >> (count - 1)) & 1 : 0;
+ uint32_t result = dest >> count;
CLR_CZS;
CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
@@ -1475,7 +1475,7 @@ void z8002_device::Z0B_ssN0_dddd()
void z8002_device::Z0C_ddN0_0000()
{
GET_DST(OP0,NIB3);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_B(AS_DATA, addr, COMB(RDMEM_B(AS_DATA, addr)));
}
@@ -1497,7 +1497,7 @@ void z8002_device::Z0C_ddN0_0001_imm8()
void z8002_device::Z0C_ddN0_0010()
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_B(AS_DATA, addr, NEGB(RDMEM_B(AS_DATA, addr)));
}
@@ -1529,7 +1529,7 @@ void z8002_device::Z0C_ddN0_0101_imm8()
void z8002_device::Z0C_ddN0_0110()
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
if (RDMEM_B(AS_DATA, addr) & S08) SET_S; else CLR_S;
WRMEM_B(AS_DATA, addr, 0xff);
}
@@ -1551,7 +1551,7 @@ void z8002_device::Z0C_ddN0_1000()
void z8002_device::Z0D_ddN0_0000()
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_W(AS_DATA, addr, COMW(RDMEM_W(AS_DATA, addr)));
}
@@ -1573,7 +1573,7 @@ void z8002_device::Z0D_ddN0_0001_imm16()
void z8002_device::Z0D_ddN0_0010()
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_W(AS_DATA, addr, NEGW(RDMEM_W(AS_DATA, addr)));
}
@@ -1605,7 +1605,7 @@ void z8002_device::Z0D_ddN0_0101_imm16()
void z8002_device::Z0D_ddN0_0110()
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
if (RDMEM_W(AS_DATA, addr) & S16) SET_S; else CLR_S;
WRMEM_W(AS_DATA, addr, 0xffff);
}
@@ -1900,7 +1900,7 @@ void z8002_device::Z1C_ddN0_1001_0000_ssss_0000_nmin1()
GET_DST(OP0,NIB2);
GET_CNT(OP1,NIB3);
GET_SRC(OP1,NIB1);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
while (cnt-- >= 0) {
WRMEM_W(AS_DATA, addr, RW(src));
addr = addr_add(addr, 2);
@@ -1917,7 +1917,7 @@ void z8002_device::Z1C_ssN0_0001_0000_dddd_0000_nmin1()
GET_SRC(OP0,NIB2);
GET_CNT(OP1,NIB3);
GET_DST(OP1,NIB1);
- UINT32 addr = addr_from_reg(src);
+ uint32_t addr = addr_from_reg(src);
while (cnt-- >= 0) {
RW(dst) = RDMEM_W(AS_DATA, addr);
addr = addr_add(addr, 2);
@@ -2030,7 +2030,7 @@ void z8002_device::Z22_ddN0_imm4()
{
GET_BIT(OP0);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_B(AS_DATA, addr, RDMEM_B(AS_DATA, addr) & ~bit);
}
@@ -2053,7 +2053,7 @@ void z8002_device::Z23_ddN0_imm4()
{
GET_BIT(OP0);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_W(AS_DATA, addr, RDMEM_W(AS_DATA, addr) & ~bit);
}
@@ -2076,7 +2076,7 @@ void z8002_device::Z24_ddN0_imm4()
{
GET_BIT(OP0);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_B(AS_DATA, addr, RDMEM_B(AS_DATA, addr) | bit);
}
@@ -2099,7 +2099,7 @@ void z8002_device::Z25_ddN0_imm4()
{
GET_BIT(OP0);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_W(AS_DATA, addr, RDMEM_W(AS_DATA, addr) | bit);
}
@@ -2155,7 +2155,7 @@ void z8002_device::Z28_ddN0_imm4m1()
{
GET_I4M1(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_B(AS_DATA, addr, INCB(RDMEM_B(AS_DATA, addr), i4p1));
}
@@ -2167,7 +2167,7 @@ void z8002_device::Z29_ddN0_imm4m1()
{
GET_I4M1(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_W(AS_DATA, addr, INCW(RDMEM_W(AS_DATA, addr), i4p1));
}
@@ -2179,7 +2179,7 @@ void z8002_device::Z2A_ddN0_imm4m1()
{
GET_I4M1(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_B(AS_DATA, addr, DECB(RDMEM_B(AS_DATA, addr), i4p1));
}
@@ -2191,7 +2191,7 @@ void z8002_device::Z2B_ddN0_imm4m1()
{
GET_I4M1(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(dst);
+ uint32_t addr = addr_from_reg(dst);
WRMEM_W(AS_DATA, addr, DECW(RDMEM_W(AS_DATA, addr), i4p1));
}
@@ -2203,8 +2203,8 @@ void z8002_device::Z2C_ssN0_dddd()
{
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
- UINT32 addr = addr_from_reg(src);
- UINT8 tmp = RDMEM_B( AS_DATA, addr);
+ uint32_t addr = addr_from_reg(src);
+ uint8_t tmp = RDMEM_B( AS_DATA, addr);
WRMEM_B(AS_DATA, addr, RB(dst));
RB(dst) = tmp;
}
@@ -2217,8 +2217,8 @@ void z8002_device::Z2D_ssN0_dddd()
{
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
- UINT32 addr = addr_from_reg(src);
- UINT16 tmp = RDMEM_W(AS_DATA, addr);
+ uint32_t addr = addr_from_reg(src);
+ uint16_t tmp = RDMEM_W(AS_DATA, addr);
WRMEM_W(AS_DATA, addr, RW(dst));
RW(dst) = tmp;
}
@@ -2464,15 +2464,15 @@ void z8002_device::Z39_ssN0_0000()
{
CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- UINT16 fcw;
+ uint16_t fcw;
if (segmented_mode()) {
- UINT32 addr = addr_from_reg(src);
+ uint32_t addr = addr_from_reg(src);
fcw = RDMEM_W(AS_DATA, addr + 2);
set_pc(segmented_addr(RDMEM_L(AS_DATA, addr + 4)));
}
else {
fcw = RDMEM_W(AS_DATA, RW(src));
- set_pc(RDMEM_W(AS_DATA, (UINT16)(RW(src) + 2)));
+ set_pc(RDMEM_W(AS_DATA, (uint16_t)(RW(src) + 2)));
}
if ((fcw ^ m_fcw) & F_SEG) printf("ldps 1 (0x%05x): changing from %ssegmented mode to %ssegmented mode\n", m_pc, (m_fcw & F_SEG) ? "non-" : "", (fcw & F_SEG) ? "" : "non-");
CHANGE_FCW(fcw); /* check for user/system mode change */
@@ -4314,7 +4314,7 @@ void z8002_device::Z6C_0000_dddd_addr()
{
GET_DST(OP0,NIB3);
GET_ADDR(OP1);
- UINT8 tmp = RDMEM_B(AS_DATA, addr);
+ uint8_t tmp = RDMEM_B(AS_DATA, addr);
WRMEM_B(AS_DATA, addr, RB(dst));
RB(dst) = tmp;
}
@@ -4328,7 +4328,7 @@ void z8002_device::Z6C_ssN0_dddd_addr()
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
GET_ADDR(OP1);
- UINT8 tmp;
+ uint8_t tmp;
addr = addr_add(addr, RW(src));
tmp = RDMEM_B(AS_DATA, addr);
WRMEM_B(AS_DATA, addr, RB(dst));
@@ -4343,7 +4343,7 @@ void z8002_device::Z6D_0000_dddd_addr()
{
GET_DST(OP0,NIB3);
GET_ADDR(OP1);
- UINT16 tmp = RDMEM_W(AS_DATA, addr);
+ uint16_t tmp = RDMEM_W(AS_DATA, addr);
WRMEM_W(AS_DATA, addr, RW(dst));
RW(dst) = tmp;
}
@@ -4357,7 +4357,7 @@ void z8002_device::Z6D_ssN0_dddd_addr()
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
GET_ADDR(OP1);
- UINT16 tmp;
+ uint16_t tmp;
addr = addr_add(addr, RW(src));
tmp = RDMEM_W(AS_DATA, addr);
WRMEM_W(AS_DATA, addr, RW(dst));
@@ -4515,7 +4515,7 @@ void z8002_device::Z76_ssN0_dddd_addr()
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
GET_ADDR_RAW(OP1);
- UINT16 temp = RW(src); // store src in case dst == src
+ uint16_t temp = RW(src); // store src in case dst == src
if (segmented_mode()) {
RL(dst) = addr;
}
@@ -4559,14 +4559,14 @@ void z8002_device::Z79_0000_0000_addr()
{
CHECK_PRIVILEGED_INSTR();
GET_ADDR(OP1);
- UINT16 fcw;
+ uint16_t fcw;
if (segmented_mode()) {
fcw = RDMEM_W(AS_DATA, addr + 2);
set_pc(segmented_addr(RDMEM_L(AS_DATA, addr + 4)));
}
else {
fcw = RDMEM_W(AS_DATA, addr);
- set_pc(RDMEM_W(AS_DATA, (UINT16)(addr + 2)));
+ set_pc(RDMEM_W(AS_DATA, (uint16_t)(addr + 2)));
}
CHANGE_FCW(fcw); /* check for user/system mode change */
}
@@ -4580,7 +4580,7 @@ void z8002_device::Z79_ssN0_0000_addr()
CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
GET_ADDR(OP1);
- UINT16 fcw;
+ uint16_t fcw;
addr = addr_add(addr, RW(src));
if (segmented_mode()) {
fcw = RDMEM_W(AS_DATA, addr + 2);
@@ -4588,7 +4588,7 @@ void z8002_device::Z79_ssN0_0000_addr()
}
else {
fcw = RDMEM_W(AS_DATA, addr);
- m_pc = RDMEM_W(AS_DATA, (UINT16)(addr + 2));
+ m_pc = RDMEM_W(AS_DATA, (uint16_t)(addr + 2));
}
if ((fcw ^ m_fcw) & F_SEG) printf("ldps 3 (0x%05x): changing from %ssegmented mode to %ssegmented mode\n", m_pc, (fcw & F_SEG) ? "non-" : "", (fcw & F_SEG) ? "" : "non-");
CHANGE_FCW(fcw); /* check for user/system mode change */
@@ -4611,7 +4611,7 @@ void z8002_device::Z7A_0000_0000()
******************************************/
void z8002_device::Z7B_0000_0000()
{
- UINT16 tag, fcw;
+ uint16_t tag, fcw;
CHECK_PRIVILEGED_INSTR();
tag = POPW(SP); /* get type tag */
fcw = POPW(SP); /* get m_fcw */
@@ -4689,7 +4689,7 @@ void z8002_device::Z7C_0000_00ii()
{
CHECK_PRIVILEGED_INSTR();
GET_IMM2(OP0,NIB3);
- UINT16 fcw = m_fcw;
+ uint16_t fcw = m_fcw;
fcw &= (imm2 << 11) | 0xe7ff;
CHANGE_FCW(fcw);
}
@@ -4702,7 +4702,7 @@ void z8002_device::Z7C_0000_01ii()
{
CHECK_PRIVILEGED_INSTR();
GET_IMM2(OP0,NIB3);
- UINT16 fcw = m_fcw;
+ uint16_t fcw = m_fcw;
fcw |= ((~imm2) << 11) & 0x1800;
CHANGE_FCW(fcw);
}
@@ -4752,7 +4752,7 @@ void z8002_device::Z7D_ssss_1ccc()
switch (imm3) {
case 2:
{
- UINT16 fcw;
+ uint16_t fcw;
fcw = RW(src);
CHANGE_FCW(fcw); /* check for user/system mode change */
}
@@ -5483,7 +5483,7 @@ void z8002_device::ZAC_ssss_dddd()
{
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
- UINT8 tmp = RB(src);
+ uint8_t tmp = RB(src);
RB(src) = RB(dst);
RB(dst) = tmp;
}
@@ -5496,7 +5496,7 @@ void z8002_device::ZAD_ssss_dddd()
{
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
- UINT16 tmp = RW(src);
+ uint16_t tmp = RW(src);
RW(src) = RW(dst);
RW(dst) = tmp;
}
@@ -5509,7 +5509,7 @@ void z8002_device::ZAE_dddd_cccc()
{
GET_CCC(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT8 tmp = RB(dst) & ~1;
+ uint8_t tmp = RB(dst) & ~1;
switch (cc) {
case 0: if (CC0) tmp |= 1; break;
case 1: if (CC1) tmp |= 1; break;
@@ -5539,7 +5539,7 @@ void z8002_device::ZAF_dddd_cccc()
{
GET_CCC(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT16 tmp = RW(dst) & ~1;
+ uint16_t tmp = RW(dst) & ~1;
switch (cc) {
case 0: if (CC0) tmp |= 1; break;
case 1: if (CC1) tmp |= 1; break;
@@ -5568,8 +5568,8 @@ void z8002_device::ZAF_dddd_cccc()
void z8002_device::ZB0_dddd_0000()
{
GET_DST(OP0,NIB2);
- UINT8 result;
- UINT16 idx = RB(dst);
+ uint8_t result;
+ uint16_t idx = RB(dst);
if (m_fcw & F_C) idx |= 0x100;
if (m_fcw & F_H) idx |= 0x200;
if (m_fcw & F_DA) idx |= 0x400;
@@ -5623,7 +5623,7 @@ void z8002_device::ZB2_dddd_0001_imm8()
GET_DST(OP0,NIB2);
GET_IMM8(OP1);
if (imm8 & S08)
- RB(dst) = SRLB(RB(dst), -(INT8)imm8);
+ RB(dst) = SRLB(RB(dst), -(int8_t)imm8);
else
RB(dst) = SLLB(RB(dst), imm8);
}
@@ -5636,7 +5636,7 @@ void z8002_device::ZB2_dddd_0011_0000_ssss_0000_0000()
{
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB1);
- RB(dst) = SRLB(RB(dst), (INT8)RW(src));
+ RB(dst) = SRLB(RB(dst), (int8_t)RW(src));
}
/******************************************
@@ -5672,7 +5672,7 @@ void z8002_device::ZB2_dddd_1001_imm8()
GET_DST(OP0,NIB2);
GET_IMM8(OP1);
if (imm8 & S08)
- RB(dst) = SRAB(RB(dst), -(INT8)imm8);
+ RB(dst) = SRAB(RB(dst), -(int8_t)imm8);
else
RB(dst) = SLAB(RB(dst), imm8);
}
@@ -5685,7 +5685,7 @@ void z8002_device::ZB2_dddd_1011_0000_ssss_0000_0000()
{
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB1);
- RB(dst) = SDAB(RB(dst), (INT8) RW(src));
+ RB(dst) = SDAB(RB(dst), (int8_t) RW(src));
}
/******************************************
@@ -5721,7 +5721,7 @@ void z8002_device::ZB3_dddd_0001_imm8()
GET_DST(OP0,NIB2);
GET_IMM16(OP1);
if (imm16 & S16)
- RW(dst) = SRLW(RW(dst), -(INT16)imm16);
+ RW(dst) = SRLW(RW(dst), -(int16_t)imm16);
else
RW(dst) = SLLW(RW(dst), imm16);
}
@@ -5734,7 +5734,7 @@ void z8002_device::ZB3_dddd_0011_0000_ssss_0000_0000()
{
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB1);
- RW(dst) = SDLW(RW(dst), (INT8)RW(src));
+ RW(dst) = SDLW(RW(dst), (int8_t)RW(src));
}
/******************************************
@@ -5759,7 +5759,7 @@ void z8002_device::ZB3_dddd_0101_imm8()
GET_DST(OP0,NIB2);
GET_IMM16(OP1);
if (imm16 & S16)
- RL(dst) = SRLL(RL(dst), -(INT16)imm16);
+ RL(dst) = SRLL(RL(dst), -(int16_t)imm16);
else
RL(dst) = SLLL(RL(dst), imm16);
}
@@ -5797,7 +5797,7 @@ void z8002_device::ZB3_dddd_1001_imm8()
GET_DST(OP0,NIB2);
GET_IMM16(OP1);
if (imm16 & S16)
- RW(dst) = SRAW(RW(dst), -(INT16)imm16);
+ RW(dst) = SRAW(RW(dst), -(int16_t)imm16);
else
RW(dst) = SLAW(RW(dst), imm16);
}
@@ -5810,7 +5810,7 @@ void z8002_device::ZB3_dddd_1011_0000_ssss_0000_0000()
{
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB1);
- RW(dst) = SDAW(RW(dst), (INT8)RW(src));
+ RW(dst) = SDAW(RW(dst), (int8_t)RW(src));
}
/******************************************
@@ -5835,7 +5835,7 @@ void z8002_device::ZB3_dddd_1101_imm8()
GET_DST(OP0,NIB2);
GET_IMM16(OP1);
if (imm16 & S16)
- RL(dst) = SRAL(RL(dst), -(INT16)imm16);
+ RL(dst) = SRAL(RL(dst), -(int16_t)imm16);
else
RL(dst) = SLAL(RL(dst), imm16);
}
@@ -5915,7 +5915,7 @@ void z8002_device::ZB8_ddN0_0010_0000_rrrr_ssN0_0000()
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
- UINT8 xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
+ uint8_t xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
RB(1) = xlt; /* load RH1 */
if (xlt) CLR_Z; else SET_Z;
add_to_addr_reg(dst, 1);
@@ -5931,7 +5931,7 @@ void z8002_device::ZB8_ddN0_0110_0000_rrrr_ssN0_1110()
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
- UINT8 xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
+ uint8_t xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
RB(1) = xlt; /* load RH1 */
if (xlt) CLR_Z; else SET_Z;
add_to_addr_reg(dst, 1);
@@ -5952,7 +5952,7 @@ void z8002_device::ZB8_ddN0_1010_0000_rrrr_ssN0_0000()
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
- UINT8 xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
+ uint8_t xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
RB(1) = xlt; /* load RH1 */
if (xlt) CLR_Z; else SET_Z;
sub_from_addr_reg(dst, 1);
@@ -5968,7 +5968,7 @@ void z8002_device::ZB8_ddN0_1110_0000_rrrr_ssN0_1110()
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
- UINT8 xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
+ uint8_t xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
RB(1) = xlt; /* load RH1 */
if (xlt) CLR_Z; else SET_Z;
sub_from_addr_reg(dst, 1);
@@ -5989,7 +5989,7 @@ void z8002_device::ZB8_ddN0_0000_0000_rrrr_ssN0_0000()
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
- UINT8 xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
+ uint8_t xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
WRMEM_B(AS_DATA, addr_from_reg(dst), xlt);
RB(1) = xlt; /* destroy RH1 */
add_to_addr_reg(dst, 1);
@@ -6005,7 +6005,7 @@ void z8002_device::ZB8_ddN0_0100_0000_rrrr_ssN0_0000()
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
- UINT8 xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
+ uint8_t xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
WRMEM_B(AS_DATA, addr_from_reg(dst), xlt);
RB(1) = xlt; /* destroy RH1 */
add_to_addr_reg(dst, 1);
@@ -6021,7 +6021,7 @@ void z8002_device::ZB8_ddN0_1000_0000_rrrr_ssN0_0000()
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
- UINT8 xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
+ uint8_t xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
WRMEM_B(AS_DATA, addr_from_reg(dst), xlt);
RB(1) = xlt; /* destroy RH1 */
sub_from_addr_reg(dst, 1);
@@ -6037,7 +6037,7 @@ void z8002_device::ZB8_ddN0_1100_0000_rrrr_ssN0_0000()
GET_DST(OP0,NIB2);
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
- UINT8 xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
+ uint8_t xlt = RDMEM_B(AS_DATA, addr_from_reg(src) + RDMEM_B(AS_DATA, addr_from_reg(dst)));
WRMEM_B(AS_DATA, addr_from_reg(dst), xlt);
RB(1) = xlt; /* destroy RH1 */
sub_from_addr_reg(dst, 1);
@@ -6669,9 +6669,9 @@ void z8002_device::ZBB_ssN0_1110_0000_rrrr_ddN0_cccc()
******************************************/
void z8002_device::ZBC_aaaa_bbbb()
{
- UINT8 b = m_op[0] & 15;
- UINT8 a = (m_op[0] >> 4) & 15;
- UINT8 tmp = RB(b);
+ uint8_t b = m_op[0] & 15;
+ uint8_t a = (m_op[0] >> 4) & 15;
+ uint8_t tmp = RB(b);
RB(a) = (RB(a) >> 4) | (RB(b) << 4);
RB(b) = (RB(b) & 0xf0) | (tmp & 0x0f);
if (RB(b)) CLR_Z; else SET_Z;
@@ -6694,9 +6694,9 @@ void z8002_device::ZBD_dddd_imm4()
******************************************/
void z8002_device::ZBE_aaaa_bbbb()
{
- UINT8 b = m_op[0] & 15;
- UINT8 a = (m_op[0] >> 4) & 15;
- UINT8 tmp = RB(a);
+ uint8_t b = m_op[0] & 15;
+ uint8_t a = (m_op[0] >> 4) & 15;
+ uint8_t tmp = RB(a);
RB(a) = (RB(a) << 4) | (RB(b) & 0x0f);
RB(b) = (RB(b) & 0xf0) | (tmp >> 4);
if (RB(b)) CLR_Z; else SET_Z;
@@ -6745,7 +6745,7 @@ void z8002_device::ZC_dddd_imm8()
******************************************/
void z8002_device::ZD_dsp12()
{
- INT16 dsp12 = m_op[0] & 0xfff;
+ int16_t dsp12 = m_op[0] & 0xfff;
if (segmented_mode())
PUSHL(SP, make_segmented_addr(m_pc));
else