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-rw-r--r--src/devices/cpu/m68000/m68kcpu.h2
-rw-r--r--src/devices/cpu/mips/mips3.cpp282
-rw-r--r--src/devices/cpu/mips/mips3.h1372
-rw-r--r--src/devices/cpu/mips/mips3com.cpp2
-rw-r--r--src/devices/cpu/mips/mips3com.h4
-rw-r--r--src/devices/cpu/mips/mips3dsm.cpp14
-rw-r--r--src/devices/cpu/mips/ps2vif1.cpp124
-rw-r--r--src/devices/cpu/mips/ps2vif1.h120
-rw-r--r--src/devices/cpu/mips/ps2vu.cpp17
-rw-r--r--src/devices/cpu/mips/ps2vu.h59
-rw-r--r--src/devices/cpu/mips/r3000.cpp2
-rw-r--r--src/devices/cpu/mips/vudasm.cpp2
-rw-r--r--src/devices/cpu/mips/vudasm.h2
13 files changed, 1007 insertions, 995 deletions
diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h
index d8ad6ef2c2f..adb45a04c78 100644
--- a/src/devices/cpu/m68000/m68kcpu.h
+++ b/src/devices/cpu/m68000/m68kcpu.h
@@ -1523,7 +1523,7 @@ inline void m68ki_exception_address_error()
m_stopped = STOP_LEVEL_HALT;
return;
}
-
+
m_run_mode = RUN_MODE_BERR_AERR_RESET_WSF;
if (!CPU_TYPE_IS_010_PLUS())
diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp
index e9d5f17b318..00ca50b1a3d 100644
--- a/src/devices/cpu/mips/mips3.cpp
+++ b/src/devices/cpu/mips/mips3.cpp
@@ -15,9 +15,9 @@
#include "mips3dsm.h"
#include "ps2vu.h"
-#define ENABLE_OVERFLOWS (0)
-#define ENABLE_EE_ELF_LOADER (0)
-#define ENABLE_EE_DECI2 (1)
+#define ENABLE_OVERFLOWS (0)
+#define ENABLE_EE_ELF_LOADER (0)
+#define ENABLE_EE_DECI2 (1)
/***************************************************************************
HELPER MACROS
@@ -148,7 +148,7 @@ mips3_device::mips3_device(const machine_config &mconfig, device_type type, cons
, m_ldr(endianness == ENDIANNESS_BIG ? &mips3_device::ldr_be : &mips3_device::ldr_le)
, m_sdl(endianness == ENDIANNESS_BIG ? &mips3_device::sdl_be : &mips3_device::sdl_le)
, m_sdr(endianness == ENDIANNESS_BIG ? &mips3_device::sdr_be : &mips3_device::sdr_le)
- , m_data_bits(data_bits)
+ , m_data_bits(data_bits)
, c_system_clock(0)
, m_pfnmask(flavor == MIPS3_TYPE_VR4300 ? 0x000fffff : 0x00ffffff)
, m_tlbentries(flavor == MIPS3_TYPE_VR4300 ? 32 : MIPS3_MAX_TLB_ENTRIES)
@@ -389,34 +389,34 @@ void mips3_device::device_start()
m_program = &space(AS_PROGRAM);
if(m_program->endianness() == ENDIANNESS_LITTLE)
{
- if (m_data_bits == 32)
- {
- auto cache = m_program->cache<2, 0, ENDIANNESS_LITTLE>();
- m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
- m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
- }
- else
- {
- auto cache = m_program->cache<3, 0, ENDIANNESS_LITTLE>();
- m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
- m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
- }
+ if (m_data_bits == 32)
+ {
+ auto cache = m_program->cache<2, 0, ENDIANNESS_LITTLE>();
+ m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
+ m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
+ }
+ else
+ {
+ auto cache = m_program->cache<3, 0, ENDIANNESS_LITTLE>();
+ m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
+ m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
+ }
}
else
{
- if (m_data_bits == 32)
- {
- auto cache = m_program->cache<2, 0, ENDIANNESS_BIG>();
- m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
- m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
- }
- else
- {
- auto cache = m_program->cache<3, 0, ENDIANNESS_BIG>();
- m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
- m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
- }
- }
+ if (m_data_bits == 32)
+ {
+ auto cache = m_program->cache<2, 0, ENDIANNESS_BIG>();
+ m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
+ m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
+ }
+ else
+ {
+ auto cache = m_program->cache<3, 0, ENDIANNESS_BIG>();
+ m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
+ m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
+ }
+ }
/* set up the endianness */
m_program->accessors(m_memory);
@@ -1492,37 +1492,37 @@ inline void mips3_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t
inline void r5900le_device::WBYTE(offs_t address, uint8_t data)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_byte)(*m_program, address, data);
- else mips3_device::WBYTE(address, data);
+ if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_byte)(*m_program, address, data);
+ else mips3_device::WBYTE(address, data);
}
inline void r5900le_device::WHALF(offs_t address, uint16_t data)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_word)(*m_program, address, data);
- else mips3_device::WHALF(address, data);
+ if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_word)(*m_program, address, data);
+ else mips3_device::WHALF(address, data);
}
inline void r5900le_device::WWORD(offs_t address, uint32_t data)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword)(*m_program, address, data);
- else mips3_device::WWORD(address, data);
+ if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword)(*m_program, address, data);
+ else mips3_device::WWORD(address, data);
}
inline void r5900le_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask);
- else mips3_device::WWORD_MASKED(address, data, mem_mask);
+ if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask);
+ else mips3_device::WWORD_MASKED(address, data, mem_mask);
}
inline void r5900le_device::WDOUBLE(offs_t address, uint64_t data) {
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword)(*m_program, address, data);
- else mips3_device::WDOUBLE(address, data);
+ if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword)(*m_program, address, data);
+ else mips3_device::WDOUBLE(address, data);
}
inline void r5900le_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask);
- else mips3_device::WDOUBLE_MASKED(address, data, mem_mask);
+ if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask);
+ else mips3_device::WDOUBLE_MASKED(address, data, mem_mask);
}
inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t data_lo)
@@ -1558,61 +1558,61 @@ inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t dat
}
inline bool r5900le_device::RBYTE(offs_t address, uint32_t *result) {
- if (address >= 0x70000000 && address < 0x70004000) {
- *result = (*m_memory.read_byte)(*m_program, address);
- return true;
- }
- return mips3_device::RBYTE(address, result);
+ if (address >= 0x70000000 && address < 0x70004000) {
+ *result = (*m_memory.read_byte)(*m_program, address);
+ return true;
+ }
+ return mips3_device::RBYTE(address, result);
}
inline bool r5900le_device::RHALF(offs_t address, uint32_t *result)
{
- if (address >= 0x70000000 && address < 0x70004000)
- {
- *result = (*m_memory.read_word)(*m_program, address);
- return true;
- }
- return mips3_device::RHALF(address, result);
+ if (address >= 0x70000000 && address < 0x70004000)
+ {
+ *result = (*m_memory.read_word)(*m_program, address);
+ return true;
+ }
+ return mips3_device::RHALF(address, result);
}
inline bool r5900le_device::RWORD(offs_t address, uint32_t *result)
{
- if (address >= 0x70000000 && address < 0x70004000)
- {
- *result = (*m_memory.read_dword)(*m_program, address);
- return true;
- }
- return mips3_device::RWORD(address, result);
+ if (address >= 0x70000000 && address < 0x70004000)
+ {
+ *result = (*m_memory.read_dword)(*m_program, address);
+ return true;
+ }
+ return mips3_device::RWORD(address, result);
}
inline bool r5900le_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask)
{
- if (address >= 0x70000000 && address < 0x70004000)
- {
- *result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask);
- return true;
- }
- return mips3_device::RWORD_MASKED(address, result, mem_mask);
+ if (address >= 0x70000000 && address < 0x70004000)
+ {
+ *result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask);
+ return true;
+ }
+ return mips3_device::RWORD_MASKED(address, result, mem_mask);
}
inline bool r5900le_device::RDOUBLE(offs_t address, uint64_t *result)
{
- if (address >= 0x70000000 && address < 0x70004000)
- {
- *result = (*m_memory.read_qword)(*m_program, address);
- return true;
- }
- return mips3_device::RDOUBLE(address, result);
+ if (address >= 0x70000000 && address < 0x70004000)
+ {
+ *result = (*m_memory.read_qword)(*m_program, address);
+ return true;
+ }
+ return mips3_device::RDOUBLE(address, result);
}
inline bool r5900le_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask)
{
- if (address >= 0x70000000 && address < 0x70004000)
- {
- *result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask);
- return true;
- }
- return mips3_device::RDOUBLE_MASKED(address, result, mem_mask);
+ if (address >= 0x70000000 && address < 0x70004000)
+ {
+ *result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask);
+ return true;
+ }
+ return mips3_device::RDOUBLE_MASKED(address, result, mem_mask);
}
inline bool r5900le_device::RQUAD(offs_t address, uint64_t *result_hi, uint64_t *result_lo)
@@ -2952,12 +2952,12 @@ void mips3_device::handle_cop2(uint32_t op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_reg(RDREG); break;
- case 0x01: /* DMFCz */ handle_dmfc2(op); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_creg(RDREG); break;
- case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break;
- case 0x05: /* DMTCz */ handle_dmtc2(op); break;
- case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break;
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_reg(RDREG); break;
+ case 0x01: /* DMFCz */ handle_dmfc2(op); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (int32_t)get_cop2_creg(RDREG); break;
+ case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break;
+ case 0x05: /* DMTCz */ handle_dmtc2(op); break;
+ case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break;
case 0x08: /* BC */
switch (RTREG)
{
@@ -3560,8 +3560,8 @@ void mips3_device::handle_special(uint32_t op)
case 0x25: /* OR */ if (RDREG) RDVAL64 = RSVAL64 | RTVAL64; break;
case 0x26: /* XOR */ if (RDREG) RDVAL64 = RSVAL64 ^ RTVAL64; break;
case 0x27: /* NOR */ if (RDREG) RDVAL64 = ~(RSVAL64 | RTVAL64); break;
- case 0x28: handle_extra_special(op); break;
- case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (int64_t)RSVAL64 < (int64_t)RTVAL64; break;
+ case 0x28: handle_extra_special(op); break;
+ case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (int64_t)RSVAL64 < (int64_t)RTVAL64; break;
case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (uint64_t)RSVAL64 < (uint64_t)RTVAL64; break;
case 0x2c: /* DADD */
if (ENABLE_OVERFLOWS && RSVAL64 > ~RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1);
@@ -3615,8 +3615,8 @@ void mips3_device::handle_idt(uint32_t op)
void r5900le_device::handle_extra_base(uint32_t op)
{
- const int rs = (op >> 21) & 31;
- const int rt = (op >> 16) & 31;
+ const int rs = (op >> 21) & 31;
+ const int rt = (op >> 16) & 31;
switch (op >> 26)
{
@@ -3644,8 +3644,8 @@ void r5900le_device::handle_extra_base(uint32_t op)
void r5900le_device::handle_extra_special(uint32_t op)
{
- const int rs = (op >> 21) & 31;
- const int rd = (op >> 11) & 31;
+ const int rs = (op >> 21) & 31;
+ const int rd = (op >> 11) & 31;
switch (op & 63)
{
@@ -3712,12 +3712,12 @@ void r5900le_device::handle_extra_cop1(uint32_t op)
void r5900le_device::handle_idt(uint32_t op)
{
- const int rs = (op >> 21) & 31;
- const int rt = (op >> 16) & 31;
- const int rd = (op >> 11) & 31;
- const int sa = (op >> 6) & 31;
+ const int rs = (op >> 21) & 31;
+ const int rt = (op >> 16) & 31;
+ const int rd = (op >> 11) & 31;
+ const int sa = (op >> 6) & 31;
- switch (op & 0x3f)
+ switch (op & 0x3f)
{
case 0x00: /* MADD */
{
@@ -3760,9 +3760,9 @@ void r5900le_device::handle_idt(uint32_t op)
handle_mmi2(op);
break;
case 0x10: /* MFHI1 */
- if (rd)
- m_core->r[rd] = m_core->rh[REG_HI];
- break;
+ if (rd)
+ m_core->r[rd] = m_core->rh[REG_HI];
+ break;
case 0x11: /* MTHI1 */
m_core->rh[REG_HI] = m_core->r[rs];
break;
@@ -3787,13 +3787,13 @@ void r5900le_device::handle_idt(uint32_t op)
printf("Unsupported instruction: MULTU1 @%08x\n", m_core->pc - 4); fflush(stdout); fatalerror("Unsupported parallel instruction\n");
break;
case 0x1a: /* DIV1 */
- if (RTVAL32)
- {
- m_core->rh[REG_LO] = (int32_t)((int32_t)RSVAL32 / (int32_t)RTVAL32);
- m_core->rh[REG_HI] = (int32_t)((int32_t)RSVAL32 % (int32_t)RTVAL32);
- }
- m_core->icount -= 35; // ?
- break;
+ if (RTVAL32)
+ {
+ m_core->rh[REG_LO] = (int32_t)((int32_t)RSVAL32 / (int32_t)RTVAL32);
+ m_core->rh[REG_HI] = (int32_t)((int32_t)RSVAL32 % (int32_t)RTVAL32);
+ }
+ m_core->icount -= 35; // ?
+ break;
case 0x1b: /* DIVU1 */
if (RTVAL32)
{
@@ -3936,11 +3936,11 @@ void r5900le_device::handle_idt(uint32_t op)
void r5900le_device::handle_mmi0(uint32_t op)
{
- const int rs = (op >> 21) & 31;
- const int rt = (op >> 16) & 31;
- const int rd = (op >> 11) & 31;
+ const int rs = (op >> 21) & 31;
+ const int rt = (op >> 16) & 31;
+ const int rd = (op >> 11) & 31;
- switch ((op >> 6) & 0x1f)
+ switch ((op >> 6) & 0x1f)
{
case 0x00: /* PADDW */
if (rd)
@@ -4395,11 +4395,11 @@ void r5900le_device::handle_mmi0(uint32_t op)
void r5900le_device::handle_mmi1(uint32_t op)
{
- const int rs = (op >> 21) & 31;
- const int rt = (op >> 16) & 31;
- const int rd = (op >> 11) & 31;
+ const int rs = (op >> 21) & 31;
+ const int rt = (op >> 16) & 31;
+ const int rd = (op >> 11) & 31;
- switch ((op >> 6) & 0x1f)
+ switch ((op >> 6) & 0x1f)
{
case 0x01: /* PABSW */
if (rd)
@@ -4634,8 +4634,8 @@ void r5900le_device::handle_mmi1(uint32_t op)
}
break;
case 0x12: /* PEXTUW */
- if (rd)
- {
+ if (rd)
+ {
uint64_t rsval = m_core->rh[rs];
uint64_t rtval = m_core->rh[rt];
m_core->rh[rd] = (rsval & 0xffffffff00000000ULL) | (rtval >> 32);
@@ -4759,9 +4759,9 @@ void r5900le_device::handle_mmi1(uint32_t op)
void r5900le_device::handle_mmi2(uint32_t op)
{
- const int rs = (op >> 21) & 31;
- const int rt = (op >> 16) & 31;
- const int rd = (op >> 11) & 31;
+ const int rs = (op >> 21) & 31;
+ const int rt = (op >> 16) & 31;
+ const int rd = (op >> 11) & 31;
switch ((op >> 6) & 0x1f)
{
@@ -4805,17 +4805,17 @@ void r5900le_device::handle_mmi2(uint32_t op)
printf("Unsupported instruction: PMSUBW @%08x\n", m_core->pc - 4); fflush(stdout); fatalerror("Unsupported parallel instruction\n");
break;
case 0x08: /* PMFHI */
- if (rd)
- {
- m_core->r[rd] = m_core->r[REG_HI];
- m_core->rh[rd] = m_core->rh[REG_HI];
+ if (rd)
+ {
+ m_core->r[rd] = m_core->r[REG_HI];
+ m_core->rh[rd] = m_core->rh[REG_HI];
}
break;
case 0x09: /* PMFLO */
- if (rd)
- {
- m_core->r[rd] = m_core->r[REG_LO];
- m_core->rh[rd] = m_core->rh[REG_LO];
+ if (rd)
+ {
+ m_core->r[rd] = m_core->r[REG_LO];
+ m_core->rh[rd] = m_core->rh[REG_LO];
}
break;
case 0x0a: /* PINTH */
@@ -4886,9 +4886,9 @@ void r5900le_device::handle_mmi2(uint32_t op)
void r5900le_device::handle_mmi3(uint32_t op)
{
- const int rs = (op >> 21) & 31;
- const int rt = (op >> 16) & 31;
- const int rd = (op >> 11) & 31;
+ const int rs = (op >> 21) & 31;
+ const int rt = (op >> 16) & 31;
+ const int rd = (op >> 11) & 31;
switch ((op >> 6) & 0x1f)
{
@@ -5433,25 +5433,25 @@ void mips3_device::load_elf()
fread(buf, 1, size, elf);
fclose(elf);
- const uint32_t header_offset = *reinterpret_cast<uint32_t*>(&buf[0x1c]);
- const uint16_t block_count = *reinterpret_cast<uint16_t*>(&buf[0x2c]);
+ const uint32_t header_offset = *reinterpret_cast<uint32_t*>(&buf[0x1c]);
+ const uint16_t block_count = *reinterpret_cast<uint16_t*>(&buf[0x2c]);
- for (uint32_t i = 0; i < block_count; i++)
- {
+ for (uint32_t i = 0; i < block_count; i++)
+ {
const uint32_t *header_entry = reinterpret_cast<uint32_t*>(&buf[header_offset + i * 0x20]);
- const uint32_t word_count = header_entry[4] >> 2;
- const uint32_t file_offset = header_entry[1];
- const uint32_t *file_data = reinterpret_cast<uint32_t*>(&buf[file_offset]);
- uint32_t addr = header_entry[3];
- for (uint32_t word = 0; word < word_count; word++)
- {
- WWORD(addr, file_data[word]);
- addr += 4;
- }
+ const uint32_t word_count = header_entry[4] >> 2;
+ const uint32_t file_offset = header_entry[1];
+ const uint32_t *file_data = reinterpret_cast<uint32_t*>(&buf[file_offset]);
+ uint32_t addr = header_entry[3];
+ for (uint32_t word = 0; word < word_count; word++)
+ {
+ WWORD(addr, file_data[word]);
+ addr += 4;
+ }
}
- const uint32_t entry_point = *reinterpret_cast<uint32_t*>(&buf[0x18]);
+ const uint32_t entry_point = *reinterpret_cast<uint32_t*>(&buf[0x18]);
m_core->pc = entry_point;
m_ppc = entry_point;
diff --git a/src/devices/cpu/mips/mips3.h b/src/devices/cpu/mips/mips3.h
index 6323ae5fd59..e36a5aa5fc8 100644
--- a/src/devices/cpu/mips/mips3.h
+++ b/src/devices/cpu/mips/mips3.h
@@ -50,183 +50,183 @@ REGISTER ENUMERATION
***************************************************************************/
enum {
- MIPS3_PC = STATE_GENPC,
- MIPS3_R0 = 1,
- MIPS3_R1,
- MIPS3_R2,
- MIPS3_R3,
- MIPS3_R4,
- MIPS3_R5,
- MIPS3_R6,
- MIPS3_R7,
- MIPS3_R8,
- MIPS3_R9,
- MIPS3_R10,
- MIPS3_R11,
- MIPS3_R12,
- MIPS3_R13,
- MIPS3_R14,
- MIPS3_R15,
- MIPS3_R16,
- MIPS3_R17,
- MIPS3_R18,
- MIPS3_R19,
- MIPS3_R20,
- MIPS3_R21,
- MIPS3_R22,
- MIPS3_R23,
- MIPS3_R24,
- MIPS3_R25,
- MIPS3_R26,
- MIPS3_R27,
- MIPS3_R28,
- MIPS3_R29,
- MIPS3_R30,
- MIPS3_R31,
- MIPS3_HI,
- MIPS3_LO,
- MIPS3_FPR0,
- MIPS3_FPS0,
- MIPS3_FPD0,
- MIPS3_FPR1,
- MIPS3_FPS1,
- MIPS3_FPD1,
- MIPS3_FPR2,
- MIPS3_FPS2,
- MIPS3_FPD2,
- MIPS3_FPR3,
- MIPS3_FPS3,
- MIPS3_FPD3,
- MIPS3_FPR4,
- MIPS3_FPS4,
- MIPS3_FPD4,
- MIPS3_FPR5,
- MIPS3_FPS5,
- MIPS3_FPD5,
- MIPS3_FPR6,
- MIPS3_FPS6,
- MIPS3_FPD6,
- MIPS3_FPR7,
- MIPS3_FPS7,
- MIPS3_FPD7,
- MIPS3_FPR8,
- MIPS3_FPS8,
- MIPS3_FPD8,
- MIPS3_FPR9,
- MIPS3_FPS9,
- MIPS3_FPD9,
- MIPS3_FPR10,
- MIPS3_FPS10,
- MIPS3_FPD10,
- MIPS3_FPR11,
- MIPS3_FPS11,
- MIPS3_FPD11,
- MIPS3_FPR12,
- MIPS3_FPS12,
- MIPS3_FPD12,
- MIPS3_FPR13,
- MIPS3_FPS13,
- MIPS3_FPD13,
- MIPS3_FPR14,
- MIPS3_FPS14,
- MIPS3_FPD14,
- MIPS3_FPR15,
- MIPS3_FPS15,
- MIPS3_FPD15,
- MIPS3_FPR16,
- MIPS3_FPS16,
- MIPS3_FPD16,
- MIPS3_FPR17,
- MIPS3_FPS17,
- MIPS3_FPD17,
- MIPS3_FPR18,
- MIPS3_FPS18,
- MIPS3_FPD18,
- MIPS3_FPR19,
- MIPS3_FPS19,
- MIPS3_FPD19,
- MIPS3_FPR20,
- MIPS3_FPS20,
- MIPS3_FPD20,
- MIPS3_FPR21,
- MIPS3_FPS21,
- MIPS3_FPD21,
- MIPS3_FPR22,
- MIPS3_FPS22,
- MIPS3_FPD22,
- MIPS3_FPR23,
- MIPS3_FPS23,
- MIPS3_FPD23,
- MIPS3_FPR24,
- MIPS3_FPS24,
- MIPS3_FPD24,
- MIPS3_FPR25,
- MIPS3_FPS25,
- MIPS3_FPD25,
- MIPS3_FPR26,
- MIPS3_FPS26,
- MIPS3_FPD26,
- MIPS3_FPR27,
- MIPS3_FPS27,
- MIPS3_FPD27,
- MIPS3_FPR28,
- MIPS3_FPS28,
- MIPS3_FPD28,
- MIPS3_FPR29,
- MIPS3_FPS29,
- MIPS3_FPD29,
- MIPS3_FPR30,
- MIPS3_FPS30,
- MIPS3_FPD30,
- MIPS3_FPR31,
- MIPS3_FPS31,
- MIPS3_FPD31,
- MIPS3_CCR1_31,
- MIPS3_SR,
- MIPS3_EPC,
- MIPS3_CAUSE,
- MIPS3_COUNT,
- MIPS3_COMPARE,
- MIPS3_INDEX,
- MIPS3_RANDOM,
- MIPS3_ENTRYHI,
- MIPS3_ENTRYLO0,
- MIPS3_ENTRYLO1,
- MIPS3_PAGEMASK,
- MIPS3_WIRED,
- MIPS3_BADVADDR,
- MIPS3_R0H,
- MIPS3_R1H,
- MIPS3_R2H,
- MIPS3_R3H,
- MIPS3_R4H,
- MIPS3_R5H,
- MIPS3_R6H,
- MIPS3_R7H,
- MIPS3_R8H,
- MIPS3_R9H,
- MIPS3_R10H,
- MIPS3_R11H,
- MIPS3_R12H,
- MIPS3_R13H,
- MIPS3_R14H,
- MIPS3_R15H,
- MIPS3_R16H,
- MIPS3_R17H,
- MIPS3_R18H,
- MIPS3_R19H,
- MIPS3_R20H,
- MIPS3_R21H,
- MIPS3_R22H,
- MIPS3_R23H,
- MIPS3_R24H,
- MIPS3_R25H,
- MIPS3_R26H,
- MIPS3_R27H,
- MIPS3_R28H,
- MIPS3_R29H,
- MIPS3_R30H,
- MIPS3_R31H,
+ MIPS3_PC = STATE_GENPC,
+ MIPS3_R0 = 1,
+ MIPS3_R1,
+ MIPS3_R2,
+ MIPS3_R3,
+ MIPS3_R4,
+ MIPS3_R5,
+ MIPS3_R6,
+ MIPS3_R7,
+ MIPS3_R8,
+ MIPS3_R9,
+ MIPS3_R10,
+ MIPS3_R11,
+ MIPS3_R12,
+ MIPS3_R13,
+ MIPS3_R14,
+ MIPS3_R15,
+ MIPS3_R16,
+ MIPS3_R17,
+ MIPS3_R18,
+ MIPS3_R19,
+ MIPS3_R20,
+ MIPS3_R21,
+ MIPS3_R22,
+ MIPS3_R23,
+ MIPS3_R24,
+ MIPS3_R25,
+ MIPS3_R26,
+ MIPS3_R27,
+ MIPS3_R28,
+ MIPS3_R29,
+ MIPS3_R30,
+ MIPS3_R31,
+ MIPS3_HI,
+ MIPS3_LO,
+ MIPS3_FPR0,
+ MIPS3_FPS0,
+ MIPS3_FPD0,
+ MIPS3_FPR1,
+ MIPS3_FPS1,
+ MIPS3_FPD1,
+ MIPS3_FPR2,
+ MIPS3_FPS2,
+ MIPS3_FPD2,
+ MIPS3_FPR3,
+ MIPS3_FPS3,
+ MIPS3_FPD3,
+ MIPS3_FPR4,
+ MIPS3_FPS4,
+ MIPS3_FPD4,
+ MIPS3_FPR5,
+ MIPS3_FPS5,
+ MIPS3_FPD5,
+ MIPS3_FPR6,
+ MIPS3_FPS6,
+ MIPS3_FPD6,
+ MIPS3_FPR7,
+ MIPS3_FPS7,
+ MIPS3_FPD7,
+ MIPS3_FPR8,
+ MIPS3_FPS8,
+ MIPS3_FPD8,
+ MIPS3_FPR9,
+ MIPS3_FPS9,
+ MIPS3_FPD9,
+ MIPS3_FPR10,
+ MIPS3_FPS10,
+ MIPS3_FPD10,
+ MIPS3_FPR11,
+ MIPS3_FPS11,
+ MIPS3_FPD11,
+ MIPS3_FPR12,
+ MIPS3_FPS12,
+ MIPS3_FPD12,
+ MIPS3_FPR13,
+ MIPS3_FPS13,
+ MIPS3_FPD13,
+ MIPS3_FPR14,
+ MIPS3_FPS14,
+ MIPS3_FPD14,
+ MIPS3_FPR15,
+ MIPS3_FPS15,
+ MIPS3_FPD15,
+ MIPS3_FPR16,
+ MIPS3_FPS16,
+ MIPS3_FPD16,
+ MIPS3_FPR17,
+ MIPS3_FPS17,
+ MIPS3_FPD17,
+ MIPS3_FPR18,
+ MIPS3_FPS18,
+ MIPS3_FPD18,
+ MIPS3_FPR19,
+ MIPS3_FPS19,
+ MIPS3_FPD19,
+ MIPS3_FPR20,
+ MIPS3_FPS20,
+ MIPS3_FPD20,
+ MIPS3_FPR21,
+ MIPS3_FPS21,
+ MIPS3_FPD21,
+ MIPS3_FPR22,
+ MIPS3_FPS22,
+ MIPS3_FPD22,
+ MIPS3_FPR23,
+ MIPS3_FPS23,
+ MIPS3_FPD23,
+ MIPS3_FPR24,
+ MIPS3_FPS24,
+ MIPS3_FPD24,
+ MIPS3_FPR25,
+ MIPS3_FPS25,
+ MIPS3_FPD25,
+ MIPS3_FPR26,
+ MIPS3_FPS26,
+ MIPS3_FPD26,
+ MIPS3_FPR27,
+ MIPS3_FPS27,
+ MIPS3_FPD27,
+ MIPS3_FPR28,
+ MIPS3_FPS28,
+ MIPS3_FPD28,
+ MIPS3_FPR29,
+ MIPS3_FPS29,
+ MIPS3_FPD29,
+ MIPS3_FPR30,
+ MIPS3_FPS30,
+ MIPS3_FPD30,
+ MIPS3_FPR31,
+ MIPS3_FPS31,
+ MIPS3_FPD31,
+ MIPS3_CCR1_31,
+ MIPS3_SR,
+ MIPS3_EPC,
+ MIPS3_CAUSE,
+ MIPS3_COUNT,
+ MIPS3_COMPARE,
+ MIPS3_INDEX,
+ MIPS3_RANDOM,
+ MIPS3_ENTRYHI,
+ MIPS3_ENTRYLO0,
+ MIPS3_ENTRYLO1,
+ MIPS3_PAGEMASK,
+ MIPS3_WIRED,
+ MIPS3_BADVADDR,
+ MIPS3_R0H,
+ MIPS3_R1H,
+ MIPS3_R2H,
+ MIPS3_R3H,
+ MIPS3_R4H,
+ MIPS3_R5H,
+ MIPS3_R6H,
+ MIPS3_R7H,
+ MIPS3_R8H,
+ MIPS3_R9H,
+ MIPS3_R10H,
+ MIPS3_R11H,
+ MIPS3_R12H,
+ MIPS3_R13H,
+ MIPS3_R14H,
+ MIPS3_R15H,
+ MIPS3_R16H,
+ MIPS3_R17H,
+ MIPS3_R18H,
+ MIPS3_R19H,
+ MIPS3_R20H,
+ MIPS3_R21H,
+ MIPS3_R22H,
+ MIPS3_R23H,
+ MIPS3_R24H,
+ MIPS3_R25H,
+ MIPS3_R26H,
+ MIPS3_R27H,
+ MIPS3_R28H,
+ MIPS3_R29H,
+ MIPS3_R30H,
+ MIPS3_R31H,
};
#define MIPS3_MAX_FASTRAM 3
@@ -251,9 +251,9 @@ STRUCTURES
/* MIPS3 TLB entry */
struct mips3_tlb_entry {
- uint64_t page_mask;
- uint64_t entry_hi;
- uint64_t entry_lo[2];
+ uint64_t page_mask;
+ uint64_t entry_hi;
+ uint64_t entry_lo[2];
};
#define MIPS3_MAX_TLB_ENTRIES 48
@@ -271,363 +271,363 @@ struct mips3_tlb_entry {
class mips3_frontend;
class mips3_device : public cpu_device, public device_vtlb_interface {
- friend class mips3_frontend;
+ friend class mips3_frontend;
protected:
- /* MIPS flavors */
- enum mips3_flavor {
- /* MIPS III variants */
- MIPS3_TYPE_MIPS_III,
- MIPS3_TYPE_VR4300,
- MIPS3_TYPE_R4600,
- MIPS3_TYPE_R4650,
- MIPS3_TYPE_R4700,
- MIPS3_TYPE_TX4925,
-
- /* MIPS IV variants */
- MIPS3_TYPE_MIPS_IV,
- MIPS3_TYPE_R5000,
- MIPS3_TYPE_VR5500,
- MIPS3_TYPE_QED5271,
- MIPS3_TYPE_R5900,
- MIPS3_TYPE_RM7000
- };
+ /* MIPS flavors */
+ enum mips3_flavor {
+ /* MIPS III variants */
+ MIPS3_TYPE_MIPS_III,
+ MIPS3_TYPE_VR4300,
+ MIPS3_TYPE_R4600,
+ MIPS3_TYPE_R4650,
+ MIPS3_TYPE_R4700,
+ MIPS3_TYPE_TX4925,
+
+ /* MIPS IV variants */
+ MIPS3_TYPE_MIPS_IV,
+ MIPS3_TYPE_R5000,
+ MIPS3_TYPE_VR5500,
+ MIPS3_TYPE_QED5271,
+ MIPS3_TYPE_R5900,
+ MIPS3_TYPE_RM7000
+ };
public:
- // construction/destruction
- mips3_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, mips3_flavor flavor, endianness_t endiannes, uint32_t data_bits);
+ // construction/destruction
+ mips3_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, mips3_flavor flavor, endianness_t endiannes, uint32_t data_bits);
- void set_icache_size(size_t icache_size) { c_icache_size = icache_size; }
- void set_dcache_size(size_t dcache_size) { c_dcache_size = dcache_size; }
- void set_system_clock(uint32_t system_clock) { c_system_clock = system_clock; }
+ void set_icache_size(size_t icache_size) { c_icache_size = icache_size; }
+ void set_dcache_size(size_t dcache_size) { c_dcache_size = dcache_size; }
+ void set_system_clock(uint32_t system_clock) { c_system_clock = system_clock; }
- TIMER_CALLBACK_MEMBER(compare_int_callback);
+ TIMER_CALLBACK_MEMBER(compare_int_callback);
- void add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base);
- void clear_fastram(uint32_t select_start);
- void mips3drc_set_options(uint32_t options);
- void mips3drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles);
- void burn_cycles(int32_t cycles);
+ void add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base);
+ void clear_fastram(uint32_t select_start);
+ void mips3drc_set_options(uint32_t options);
+ void mips3drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles);
+ void burn_cycles(int32_t cycles);
protected:
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
-
- // device_execute_interface overrides
- virtual uint32_t execute_min_cycles() const override { return 1; }
- virtual uint32_t execute_max_cycles() const override { return 40; }
- virtual uint32_t execute_input_lines() const override { return 6; }
- virtual void execute_run() override;
- virtual void execute_set_input(int inputnum, int state) override;
- virtual void execute_burn(int32_t cycles) override { m_totalcycles += cycles; }
-
- // device_memory_interface overrides
- virtual space_config_vector memory_space_config() const override;
- virtual bool memory_translate(int spacenum, int intention, offs_t &address) override;
-
- // device_state_interface overrides
- virtual void state_export(const device_state_entry &entry) override;
- virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
-
- // device_disasm_interface overrides
- virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
-
- void invalid_instruction(uint32_t op);
-
- virtual bool RBYTE(offs_t address, uint32_t *result);
- virtual bool RHALF(offs_t address, uint32_t *result);
- virtual bool RWORD(offs_t address, uint32_t *result);
- virtual bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask);
- virtual bool RDOUBLE(offs_t address, uint64_t *result);
- virtual bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask);
- virtual void WBYTE(offs_t address, uint8_t data);
- virtual void WHALF(offs_t address, uint16_t data);
- virtual void WWORD(offs_t address, uint32_t data);
- virtual void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask);
- virtual void WDOUBLE(offs_t address, uint64_t data);
- virtual void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask);
-
- struct internal_mips3_state {
- /* core registers */
- uint32_t pc;
- int icount;
- uint64_t r[35];
- uint32_t sa;
-
- /* upper 64 bits of 128-bit GPRs (R5900 only) */
- uint64_t rh[35];
-
- /* COP registers */
- uint64_t cpr[3][32];
- uint64_t ccr[3][32];
- uint32_t llbit;
- float acc;
-
- /* VU0 registers (R5900 only) */
- float vfr[32][4]; // 0..3 = x..w
- uint32_t vcr[32];
- float vumem[0x1000];
- float* vfmem;
- uint32_t* vimem;
- float vacc[4];
- float p;
-
- uint32_t* vr;
- float* i;
- float* q;
-
- uint32_t mode; /* current global mode */
-
- /* parameters for subroutines */
- uint64_t numcycles; /* return value from gettotalcycles */
- const char * format; /* format string for print_debug */
- uint32_t arg0; /* print_debug argument 1 */
- uint32_t arg1; /* print_debug argument 2 */
-
- uint64_t count_zero_time;
- uint32_t compare_armed;
- uint32_t jmpdest; /* destination jump target */
- };
-
- /* core state */
- internal_mips3_state *m_core;
-
- address_space_config m_program_config;
- mips3_flavor m_flavor;
-
- /* internal stuff */
- uint32_t m_ppc;
- uint32_t m_nextpc;
- uint32_t m_pcbase;
- uint8_t m_cf[4][8];
- bool m_delayslot;
- int m_op;
- int m_interrupt_cycles;
- uint32_t m_ll_value;
- uint64_t m_lld_value;
- uint32_t m_badcop_value;
-
- /* endian-dependent load/store */
- typedef void (mips3_device::*loadstore_func)(uint32_t op);
- loadstore_func m_lwl;
- loadstore_func m_lwr;
- loadstore_func m_swl;
- loadstore_func m_swr;
- loadstore_func m_ldl;
- loadstore_func m_ldr;
- loadstore_func m_sdl;
- loadstore_func m_sdr;
-
- address_space * m_program;
- uint32_t m_data_bits;
- std::function<u32(offs_t)> m_pr32;
- std::function<const void * (offs_t)> m_prptr;
- uint32_t c_system_clock;
- uint32_t m_cpu_clock;
- emu_timer * m_compare_int_timer;
-
- /* derived info based on flavor */
- uint32_t m_pfnmask;
- uint8_t m_tlbentries;
-
- /* memory accesses */
- bool m_bigendian;
- uint32_t m_byte_xor;
- uint32_t m_word_xor;
- data_accessors m_memory;
-
- /* cache memory */
- size_t c_icache_size;
- size_t c_dcache_size;
-
- /* MMU */
- mips3_tlb_entry m_tlb[MIPS3_MAX_TLB_ENTRIES];
-
- /* fast RAM */
- uint32_t m_fastram_select;
- struct {
- offs_t start; /* start of the RAM block */
- offs_t end; /* end of the RAM block */
- bool readonly; /* true if read-only */
- void * base; /* base in memory where the RAM lives */
- uint8_t * offset_base8; /* base in memory where the RAM lives, 8-bit pointer, with the start offset pre-applied */
- uint16_t * offset_base16; /* base in memory where the RAM lives, 16-bit pointer, with the start offset pre-applied */
- uint32_t * offset_base32; /* base in memory where the RAM lives, 32-bit pointer, with the start offset pre-applied */
- } m_fastram[MIPS3_MAX_FASTRAM];
-
- uint32_t m_debugger_temp;
-
- /* core state */
- drc_cache m_cache; /* pointer to the DRC code cache */
- std::unique_ptr<drcuml_state> m_drcuml;/* DRC UML generator state */
- std::unique_ptr<mips3_frontend> m_drcfe; /* pointer to the DRC front-end state */
- uint32_t m_drcoptions; /* configurable DRC options */
-
- /* internal stuff */
- uint8_t m_cache_dirty; /* true if we need to flush the cache */
-
- /* tables */
- uint8_t m_fpmode[4]; /* FPU mode table */
-
- /* register mappings */
- uml::parameter m_regmap[34]; /* parameter to register mappings for all 32 integer registers */
- uml::parameter m_regmaplo[34]; /* parameter to register mappings for all 32 integer registers */
-
- /* subroutines */
- uml::code_handle * m_entry; /* entry point */
- uml::code_handle * m_nocode; /* nocode exception handler */
- uml::code_handle * m_out_of_cycles; /* out of cycles exception handler */
- uml::code_handle * m_tlb_mismatch; /* tlb mismatch handler */
- uml::code_handle * m_read8[3]; /* read byte */
- uml::code_handle * m_write8[3]; /* write byte */
- uml::code_handle * m_read16[3]; /* read half */
- uml::code_handle * m_write16[3]; /* write half */
- uml::code_handle * m_read32[3]; /* read word */
- uml::code_handle * m_read32mask[3]; /* read word masked */
- uml::code_handle * m_write32[3]; /* write word */
- uml::code_handle * m_write32mask[3]; /* write word masked */
- uml::code_handle * m_read64[3]; /* read double */
- uml::code_handle * m_read64mask[3]; /* read double masked */
- uml::code_handle * m_write64[3]; /* write double */
- uml::code_handle * m_write64mask[3]; /* write double masked */
- uml::code_handle * m_exception[18/*EXCEPTION_COUNT*/]; /* array of exception handlers */
- uml::code_handle * m_exception_norecover[18/*EXCEPTION_COUNT*/]; /* array of no-recover exception handlers */
-
- /* hotspots */
- uint32_t m_hotspot_select;
- struct {
- offs_t pc; /* PC to consider */
- uint32_t opcode; /* required opcode at that PC */
- uint32_t cycles; /* number of cycles to eat when hit */
- } m_hotspot[MIPS3_MAX_HOTSPOTS];
- bool m_isdrc;
-
-
- void generate_exception(int exception, int backup);
- void generate_tlb_exception(int exception, offs_t address);
- void check_irqs();
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+ virtual void device_stop() override;
+
+ // device_execute_interface overrides
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 40; }
+ virtual uint32_t execute_input_lines() const override { return 6; }
+ virtual void execute_run() override;
+ virtual void execute_set_input(int inputnum, int state) override;
+ virtual void execute_burn(int32_t cycles) override { m_totalcycles += cycles; }
+
+ // device_memory_interface overrides
+ virtual space_config_vector memory_space_config() const override;
+ virtual bool memory_translate(int spacenum, int intention, offs_t &address) override;
+
+ // device_state_interface overrides
+ virtual void state_export(const device_state_entry &entry) override;
+ virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+
+ // device_disasm_interface overrides
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ void invalid_instruction(uint32_t op);
+
+ virtual bool RBYTE(offs_t address, uint32_t *result);
+ virtual bool RHALF(offs_t address, uint32_t *result);
+ virtual bool RWORD(offs_t address, uint32_t *result);
+ virtual bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask);
+ virtual bool RDOUBLE(offs_t address, uint64_t *result);
+ virtual bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask);
+ virtual void WBYTE(offs_t address, uint8_t data);
+ virtual void WHALF(offs_t address, uint16_t data);
+ virtual void WWORD(offs_t address, uint32_t data);
+ virtual void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask);
+ virtual void WDOUBLE(offs_t address, uint64_t data);
+ virtual void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask);
+
+ struct internal_mips3_state {
+ /* core registers */
+ uint32_t pc;
+ int icount;
+ uint64_t r[35];
+ uint32_t sa;
+
+ /* upper 64 bits of 128-bit GPRs (R5900 only) */
+ uint64_t rh[35];
+
+ /* COP registers */
+ uint64_t cpr[3][32];
+ uint64_t ccr[3][32];
+ uint32_t llbit;
+ float acc;
+
+ /* VU0 registers (R5900 only) */
+ float vfr[32][4]; // 0..3 = x..w
+ uint32_t vcr[32];
+ float vumem[0x1000];
+ float* vfmem;
+ uint32_t* vimem;
+ float vacc[4];
+ float p;
+
+ uint32_t* vr;
+ float* i;
+ float* q;
+
+ uint32_t mode; /* current global mode */
+
+ /* parameters for subroutines */
+ uint64_t numcycles; /* return value from gettotalcycles */
+ const char * format; /* format string for print_debug */
+ uint32_t arg0; /* print_debug argument 1 */
+ uint32_t arg1; /* print_debug argument 2 */
+
+ uint64_t count_zero_time;
+ uint32_t compare_armed;
+ uint32_t jmpdest; /* destination jump target */
+ };
+
+ /* core state */
+ internal_mips3_state *m_core;
+
+ address_space_config m_program_config;
+ mips3_flavor m_flavor;
+
+ /* internal stuff */
+ uint32_t m_ppc;
+ uint32_t m_nextpc;
+ uint32_t m_pcbase;
+ uint8_t m_cf[4][8];
+ bool m_delayslot;
+ int m_op;
+ int m_interrupt_cycles;
+ uint32_t m_ll_value;
+ uint64_t m_lld_value;
+ uint32_t m_badcop_value;
+
+ /* endian-dependent load/store */
+ typedef void (mips3_device::*loadstore_func)(uint32_t op);
+ loadstore_func m_lwl;
+ loadstore_func m_lwr;
+ loadstore_func m_swl;
+ loadstore_func m_swr;
+ loadstore_func m_ldl;
+ loadstore_func m_ldr;
+ loadstore_func m_sdl;
+ loadstore_func m_sdr;
+
+ address_space * m_program;
+ uint32_t m_data_bits;
+ std::function<u32(offs_t)> m_pr32;
+ std::function<const void * (offs_t)> m_prptr;
+ uint32_t c_system_clock;
+ uint32_t m_cpu_clock;
+ emu_timer * m_compare_int_timer;
+
+ /* derived info based on flavor */
+ uint32_t m_pfnmask;
+ uint8_t m_tlbentries;
+
+ /* memory accesses */
+ bool m_bigendian;
+ uint32_t m_byte_xor;
+ uint32_t m_word_xor;
+ data_accessors m_memory;
+
+ /* cache memory */
+ size_t c_icache_size;
+ size_t c_dcache_size;
+
+ /* MMU */
+ mips3_tlb_entry m_tlb[MIPS3_MAX_TLB_ENTRIES];
+
+ /* fast RAM */
+ uint32_t m_fastram_select;
+ struct {
+ offs_t start; /* start of the RAM block */
+ offs_t end; /* end of the RAM block */
+ bool readonly; /* true if read-only */
+ void * base; /* base in memory where the RAM lives */
+ uint8_t * offset_base8; /* base in memory where the RAM lives, 8-bit pointer, with the start offset pre-applied */
+ uint16_t * offset_base16; /* base in memory where the RAM lives, 16-bit pointer, with the start offset pre-applied */
+ uint32_t * offset_base32; /* base in memory where the RAM lives, 32-bit pointer, with the start offset pre-applied */
+ } m_fastram[MIPS3_MAX_FASTRAM];
+
+ uint32_t m_debugger_temp;
+
+ /* core state */
+ drc_cache m_cache; /* pointer to the DRC code cache */
+ std::unique_ptr<drcuml_state> m_drcuml;/* DRC UML generator state */
+ std::unique_ptr<mips3_frontend> m_drcfe; /* pointer to the DRC front-end state */
+ uint32_t m_drcoptions; /* configurable DRC options */
+
+ /* internal stuff */
+ uint8_t m_cache_dirty; /* true if we need to flush the cache */
+
+ /* tables */
+ uint8_t m_fpmode[4]; /* FPU mode table */
+
+ /* register mappings */
+ uml::parameter m_regmap[34]; /* parameter to register mappings for all 32 integer registers */
+ uml::parameter m_regmaplo[34]; /* parameter to register mappings for all 32 integer registers */
+
+ /* subroutines */
+ uml::code_handle * m_entry; /* entry point */
+ uml::code_handle * m_nocode; /* nocode exception handler */
+ uml::code_handle * m_out_of_cycles; /* out of cycles exception handler */
+ uml::code_handle * m_tlb_mismatch; /* tlb mismatch handler */
+ uml::code_handle * m_read8[3]; /* read byte */
+ uml::code_handle * m_write8[3]; /* write byte */
+ uml::code_handle * m_read16[3]; /* read half */
+ uml::code_handle * m_write16[3]; /* write half */
+ uml::code_handle * m_read32[3]; /* read word */
+ uml::code_handle * m_read32mask[3]; /* read word masked */
+ uml::code_handle * m_write32[3]; /* write word */
+ uml::code_handle * m_write32mask[3]; /* write word masked */
+ uml::code_handle * m_read64[3]; /* read double */
+ uml::code_handle * m_read64mask[3]; /* read double masked */
+ uml::code_handle * m_write64[3]; /* write double */
+ uml::code_handle * m_write64mask[3]; /* write double masked */
+ uml::code_handle * m_exception[18/*EXCEPTION_COUNT*/]; /* array of exception handlers */
+ uml::code_handle * m_exception_norecover[18/*EXCEPTION_COUNT*/]; /* array of no-recover exception handlers */
+
+ /* hotspots */
+ uint32_t m_hotspot_select;
+ struct {
+ offs_t pc; /* PC to consider */
+ uint32_t opcode; /* required opcode at that PC */
+ uint32_t cycles; /* number of cycles to eat when hit */
+ } m_hotspot[MIPS3_MAX_HOTSPOTS];
+ bool m_isdrc;
+
+
+ void generate_exception(int exception, int backup);
+ void generate_tlb_exception(int exception, offs_t address);
+ void check_irqs();
public:
- void mips3com_update_cycle_counting();
- void mips3com_asid_changed();
- void mips3com_tlbr();
- void mips3com_tlbwi();
- void mips3com_tlbwr();
- void mips3com_tlbp();
+ void mips3com_update_cycle_counting();
+ void mips3com_asid_changed();
+ void mips3com_tlbr();
+ void mips3com_tlbwi();
+ void mips3com_tlbwr();
+ void mips3com_tlbp();
private:
- uint32_t compute_config_register();
- uint32_t compute_prid_register();
-
- void tlb_map_entry(int tlbindex);
- void tlb_write_common(int tlbindex);
-
- uint64_t get_cop0_reg(int idx);
- void set_cop0_reg(int idx, uint64_t val);
- uint64_t get_cop0_creg(int idx);
- void set_cop0_creg(int idx, uint64_t val);
- void handle_cop0(uint32_t op);
-
- uint32_t get_cop1_reg32(int idx);
- uint64_t get_cop1_reg64(int idx);
- void set_cop1_reg32(int idx, uint32_t val);
- void set_cop1_reg64(int idx, uint64_t val);
- uint64_t get_cop1_creg(int idx);
- void set_cop1_creg(int idx, uint64_t val);
- void handle_cop1_fr0(uint32_t op);
- void handle_cop1_fr1(uint32_t op);
- void handle_cop1x_fr0(uint32_t op);
- void handle_cop1x_fr1(uint32_t op);
-
- virtual uint64_t get_cop2_reg(int idx);
- virtual void set_cop2_reg(int idx, uint64_t val);
- virtual uint64_t get_cop2_creg(int idx);
- virtual void set_cop2_creg(int idx, uint64_t val);
- void handle_cop2(uint32_t op);
-
- void handle_special(uint32_t op);
- void handle_regimm(uint32_t op);
- virtual void handle_extra_base(uint32_t op);
- virtual void handle_extra_special(uint32_t op);
- virtual void handle_extra_regimm(uint32_t op);
- virtual void handle_extra_cop0(uint32_t op);
- virtual void handle_extra_cop1(uint32_t op);
- virtual void handle_extra_cop2(uint32_t op);
- virtual void handle_idt(uint32_t op);
- virtual void handle_ldc2(uint32_t op);
- virtual void handle_sdc2(uint32_t op);
- virtual void handle_dmfc2(uint32_t op);
- virtual void handle_dmtc2(uint32_t op);
-
- void lwl_be(uint32_t op);
- void lwr_be(uint32_t op);
- void ldl_be(uint32_t op);
- void ldr_be(uint32_t op);
- void swl_be(uint32_t op);
- void swr_be(uint32_t op);
- void sdl_be(uint32_t op);
- void sdr_be(uint32_t op);
- void lwl_le(uint32_t op);
- void lwr_le(uint32_t op);
- void ldl_le(uint32_t op);
- void ldr_le(uint32_t op);
- void swl_le(uint32_t op);
- void swr_le(uint32_t op);
- void sdl_le(uint32_t op);
- void sdr_le(uint32_t op);
- void load_fast_iregs(drcuml_block &block);
- void save_fast_iregs(drcuml_block &block);
- void code_flush_cache();
- void code_compile_block(uint8_t mode, offs_t pc);
+ uint32_t compute_config_register();
+ uint32_t compute_prid_register();
+
+ void tlb_map_entry(int tlbindex);
+ void tlb_write_common(int tlbindex);
+
+ uint64_t get_cop0_reg(int idx);
+ void set_cop0_reg(int idx, uint64_t val);
+ uint64_t get_cop0_creg(int idx);
+ void set_cop0_creg(int idx, uint64_t val);
+ void handle_cop0(uint32_t op);
+
+ uint32_t get_cop1_reg32(int idx);
+ uint64_t get_cop1_reg64(int idx);
+ void set_cop1_reg32(int idx, uint32_t val);
+ void set_cop1_reg64(int idx, uint64_t val);
+ uint64_t get_cop1_creg(int idx);
+ void set_cop1_creg(int idx, uint64_t val);
+ void handle_cop1_fr0(uint32_t op);
+ void handle_cop1_fr1(uint32_t op);
+ void handle_cop1x_fr0(uint32_t op);
+ void handle_cop1x_fr1(uint32_t op);
+
+ virtual uint64_t get_cop2_reg(int idx);
+ virtual void set_cop2_reg(int idx, uint64_t val);
+ virtual uint64_t get_cop2_creg(int idx);
+ virtual void set_cop2_creg(int idx, uint64_t val);
+ void handle_cop2(uint32_t op);
+
+ void handle_special(uint32_t op);
+ void handle_regimm(uint32_t op);
+ virtual void handle_extra_base(uint32_t op);
+ virtual void handle_extra_special(uint32_t op);
+ virtual void handle_extra_regimm(uint32_t op);
+ virtual void handle_extra_cop0(uint32_t op);
+ virtual void handle_extra_cop1(uint32_t op);
+ virtual void handle_extra_cop2(uint32_t op);
+ virtual void handle_idt(uint32_t op);
+ virtual void handle_ldc2(uint32_t op);
+ virtual void handle_sdc2(uint32_t op);
+ virtual void handle_dmfc2(uint32_t op);
+ virtual void handle_dmtc2(uint32_t op);
+
+ void lwl_be(uint32_t op);
+ void lwr_be(uint32_t op);
+ void ldl_be(uint32_t op);
+ void ldr_be(uint32_t op);
+ void swl_be(uint32_t op);
+ void swr_be(uint32_t op);
+ void sdl_be(uint32_t op);
+ void sdr_be(uint32_t op);
+ void lwl_le(uint32_t op);
+ void lwr_le(uint32_t op);
+ void ldl_le(uint32_t op);
+ void ldr_le(uint32_t op);
+ void swl_le(uint32_t op);
+ void swr_le(uint32_t op);
+ void sdl_le(uint32_t op);
+ void sdr_le(uint32_t op);
+ void load_fast_iregs(drcuml_block &block);
+ void save_fast_iregs(drcuml_block &block);
+ void code_flush_cache();
+ void code_compile_block(uint8_t mode, offs_t pc);
public:
- void func_get_cycles();
- void func_printf_exception();
- void func_printf_debug();
- void func_printf_probe();
- void func_unimplemented();
+ void func_get_cycles();
+ void func_printf_exception();
+ void func_printf_debug();
+ void func_printf_probe();
+ void func_unimplemented();
private:
- /* internal compiler state */
- struct compiler_state {
- compiler_state &operator=(compiler_state &) = delete;
-
- uint32_t cycles; /* accumulated cycles */
- uint8_t checkints; /* need to check interrupts before next instruction */
- uint8_t checksoftints; /* need to check software interrupts before next instruction */
- uml::code_label labelnum; /* index for local labels */
- };
-
- void static_generate_entry_point();
- void static_generate_nocode_handler();
- void static_generate_out_of_cycles();
- void static_generate_tlb_mismatch();
- void static_generate_exception(uint8_t exception, int recover, const char *name);
- void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle *&handleptr);
-
- void generate_update_mode(drcuml_block &block);
- void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception);
- void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
- void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- void generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg);
-
- bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- bool generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- bool generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- bool generate_idt(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
-
- bool generate_set_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg);
- bool generate_get_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg);
- bool generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- bool generate_cop1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- bool generate_cop1x(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
-
- void check_cop0_access(drcuml_block &block);
- void check_cop1_access(drcuml_block &block);
- void generate_badcop(drcuml_block &block, const int cop);
-
- void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
- const char *log_desc_flags_to_string(uint32_t flags);
- void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
- void log_opcode_desc(const opcode_desc *desclist, int indent);
+ /* internal compiler state */
+ struct compiler_state {
+ compiler_state &operator=(compiler_state &) = delete;
+
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
+ uint8_t checksoftints; /* need to check software interrupts before next instruction */
+ uml::code_label labelnum; /* index for local labels */
+ };
+
+ void static_generate_entry_point();
+ void static_generate_nocode_handler();
+ void static_generate_out_of_cycles();
+ void static_generate_tlb_mismatch();
+ void static_generate_exception(uint8_t exception, int recover, const char *name);
+ void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle *&handleptr);
+
+ void generate_update_mode(drcuml_block &block);
+ void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception);
+ void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
+ void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg);
+
+ bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_idt(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ bool generate_set_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg);
+ bool generate_get_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg);
+ bool generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_cop1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ bool generate_cop1x(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+
+ void check_cop0_access(drcuml_block &block);
+ void check_cop1_access(drcuml_block &block);
+ void generate_badcop(drcuml_block &block, const int cop);
+
+ void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
+ const char *log_desc_flags_to_string(uint32_t flags);
+ void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist);
+ void log_opcode_desc(const opcode_desc *desclist, int indent);
void load_elf();
};
@@ -635,268 +635,268 @@ private:
class vr4300be_device : public mips3_device {
public:
- // construction/destruction
- vr4300be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, VR4300BE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ vr4300be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, VR4300BE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class vr4300le_device : public mips3_device {
public:
- // construction/destruction
- vr4300le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, VR4300LE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ vr4300le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, VR4300LE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class vr4310be_device : public mips3_device {
public:
- // construction/destruction
- vr4310be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, VR4310BE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ vr4310be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, VR4310BE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class vr4310le_device : public mips3_device {
public:
- // construction/destruction
- vr4310le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, VR4310LE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ vr4310le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, VR4310LE, tag, owner, clock, MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class r4600be_device : public mips3_device {
public:
- // construction/destruction
- r4600be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R4600BE, tag, owner, clock, MIPS3_TYPE_R4600, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ r4600be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R4600BE, tag, owner, clock, MIPS3_TYPE_R4600, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class r4600le_device : public mips3_device {
public:
- // construction/destruction
- r4600le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R4600LE, tag, owner, clock, MIPS3_TYPE_R4600, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ r4600le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R4600LE, tag, owner, clock, MIPS3_TYPE_R4600, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class r4650be_device : public mips3_device {
public:
- // construction/destruction
- r4650be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R4650BE, tag, owner, clock, MIPS3_TYPE_R4650, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ r4650be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R4650BE, tag, owner, clock, MIPS3_TYPE_R4650, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class r4650le_device : public mips3_device {
public:
- // construction/destruction
- r4650le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R4650LE, tag, owner, clock, MIPS3_TYPE_R4650, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ r4650le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R4650LE, tag, owner, clock, MIPS3_TYPE_R4650, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class r4700be_device : public mips3_device {
public:
- // construction/destruction
- r4700be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R4700BE, tag, owner, clock, MIPS3_TYPE_R4700, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ r4700be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R4700BE, tag, owner, clock, MIPS3_TYPE_R4700, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class r4700le_device : public mips3_device {
public:
- // construction/destruction
- r4700le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R4700LE, tag, owner, clock, MIPS3_TYPE_R4700, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ r4700le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R4700LE, tag, owner, clock, MIPS3_TYPE_R4700, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class tx4925be_device : public mips3_device {
public:
- // construction/destruction
- tx4925be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, TX4925BE, tag, owner, clock, MIPS3_TYPE_TX4925, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ tx4925be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, TX4925BE, tag, owner, clock, MIPS3_TYPE_TX4925, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class tx4925le_device : public mips3_device {
public:
- // construction/destruction
- tx4925le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, TX4925LE, tag, owner, clock, MIPS3_TYPE_TX4925, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ tx4925le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, TX4925LE, tag, owner, clock, MIPS3_TYPE_TX4925, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class r5000be_device : public mips3_device {
public:
- // construction/destruction
- r5000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R5000BE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ r5000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R5000BE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class r5000le_device : public mips3_device {
public:
- // construction/destruction
- r5000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R5000LE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ r5000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R5000LE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class vr5500be_device : public mips3_device {
public:
- // construction/destruction
- vr5500be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, VR5500BE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_BIG, 32) {
- }
+ // construction/destruction
+ vr5500be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, VR5500BE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_BIG, 32) {
+ }
};
class vr5500le_device : public mips3_device {
public:
- // construction/destruction
- vr5500le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, VR5500LE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ vr5500le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, VR5500LE, tag, owner, clock, MIPS3_TYPE_R5000, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class r5900le_device : public mips3_device {
public:
- // construction/destruction
- template <typename T>
- r5900le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&vu0_tag)
- : r5900le_device(mconfig, tag, owner, clock)
+ // construction/destruction
+ template <typename T>
+ r5900le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&vu0_tag)
+ : r5900le_device(mconfig, tag, owner, clock)
{
m_vu0.set_tag(std::forward<T>(vu0_tag));
- }
+ }
- r5900le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, R5900LE, tag, owner, clock, MIPS3_TYPE_R5900, ENDIANNESS_LITTLE, 64)
- , m_vu0(*this, finder_base::DUMMY_TAG)
+ r5900le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, R5900LE, tag, owner, clock, MIPS3_TYPE_R5900, ENDIANNESS_LITTLE, 64)
+ , m_vu0(*this, finder_base::DUMMY_TAG)
{
- }
+ }
protected:
virtual void device_start() override;
- // device_disasm_interface overrides
- virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
-
- bool RBYTE(offs_t address, uint32_t *result) override;
- bool RHALF(offs_t address, uint32_t *result) override;
- bool RWORD(offs_t address, uint32_t *result) override;
- bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask) override;
- bool RDOUBLE(offs_t address, uint64_t *result) override;
- bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask) override;
- void WBYTE(offs_t address, uint8_t data) override;
- void WHALF(offs_t address, uint16_t data) override;
- void WWORD(offs_t address, uint32_t data) override;
- void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask) override;
- void WDOUBLE(offs_t address, uint64_t data) override;
- void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask) override;
-
- bool RQUAD(offs_t address, uint64_t *result_hi, uint64_t *result_lo);
+ // device_disasm_interface overrides
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ bool RBYTE(offs_t address, uint32_t *result) override;
+ bool RHALF(offs_t address, uint32_t *result) override;
+ bool RWORD(offs_t address, uint32_t *result) override;
+ bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask) override;
+ bool RDOUBLE(offs_t address, uint64_t *result) override;
+ bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask) override;
+ void WBYTE(offs_t address, uint8_t data) override;
+ void WHALF(offs_t address, uint16_t data) override;
+ void WWORD(offs_t address, uint32_t data) override;
+ void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask) override;
+ void WDOUBLE(offs_t address, uint64_t data) override;
+ void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask) override;
+
+ bool RQUAD(offs_t address, uint64_t *result_hi, uint64_t *result_lo);
void WQUAD(offs_t address, uint64_t data_hi, uint64_t data_lo);
- uint64_t get_cop2_reg(int idx) override;
- void set_cop2_reg(int idx, uint64_t val) override;
- uint64_t get_cop2_creg(int idx) override;
- void set_cop2_creg(int idx, uint64_t val) override;
-
- void handle_extra_base(uint32_t op) override;
- void handle_extra_special(uint32_t op) override;
- void handle_extra_regimm(uint32_t op) override;
- void handle_extra_cop0(uint32_t op) override;
- void handle_extra_cop1(uint32_t op) override;
- void handle_extra_cop2(uint32_t op) override;
- void handle_idt(uint32_t op) override;
- void handle_mmi0(uint32_t op);
- void handle_mmi1(uint32_t op);
- void handle_mmi2(uint32_t op);
- void handle_mmi3(uint32_t op);
- void handle_ldc2(uint32_t op) override;
- void handle_sdc2(uint32_t op) override;
- void handle_dmfc2(uint32_t op) override;
- void handle_dmtc2(uint32_t op) override;
-
- required_device<sonyvu0_device> m_vu0;
+ uint64_t get_cop2_reg(int idx) override;
+ void set_cop2_reg(int idx, uint64_t val) override;
+ uint64_t get_cop2_creg(int idx) override;
+ void set_cop2_creg(int idx, uint64_t val) override;
+
+ void handle_extra_base(uint32_t op) override;
+ void handle_extra_special(uint32_t op) override;
+ void handle_extra_regimm(uint32_t op) override;
+ void handle_extra_cop0(uint32_t op) override;
+ void handle_extra_cop1(uint32_t op) override;
+ void handle_extra_cop2(uint32_t op) override;
+ void handle_idt(uint32_t op) override;
+ void handle_mmi0(uint32_t op);
+ void handle_mmi1(uint32_t op);
+ void handle_mmi2(uint32_t op);
+ void handle_mmi3(uint32_t op);
+ void handle_ldc2(uint32_t op) override;
+ void handle_sdc2(uint32_t op) override;
+ void handle_dmfc2(uint32_t op) override;
+ void handle_dmtc2(uint32_t op) override;
+
+ required_device<sonyvu0_device> m_vu0;
};
class qed5271be_device : public mips3_device {
public:
- // construction/destruction
- qed5271be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, QED5271BE, tag, owner, clock, MIPS3_TYPE_QED5271, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ qed5271be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, QED5271BE, tag, owner, clock, MIPS3_TYPE_QED5271, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class qed5271le_device : public mips3_device {
public:
- // construction/destruction
- qed5271le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, QED5271LE, tag, owner, clock, MIPS3_TYPE_QED5271, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ qed5271le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, QED5271LE, tag, owner, clock, MIPS3_TYPE_QED5271, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class rm7000be_device : public mips3_device {
public:
- // construction/destruction
- rm7000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, RM7000BE, tag, owner, clock, MIPS3_TYPE_RM7000, ENDIANNESS_BIG, 32) // checkme
- {
- }
+ // construction/destruction
+ rm7000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, RM7000BE, tag, owner, clock, MIPS3_TYPE_RM7000, ENDIANNESS_BIG, 32) // checkme
+ {
+ }
};
class rm7000le_device : public mips3_device {
public:
- // construction/destruction
- rm7000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mips3_device(mconfig, RM7000LE, tag, owner, clock, MIPS3_TYPE_RM7000, ENDIANNESS_LITTLE, 32) // checkme
- {
- }
+ // construction/destruction
+ rm7000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mips3_device(mconfig, RM7000LE, tag, owner, clock, MIPS3_TYPE_RM7000, ENDIANNESS_LITTLE, 32) // checkme
+ {
+ }
};
class mips3_frontend : public drc_frontend {
public:
- // construction/destruction
- mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
+ // construction/destruction
+ mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
protected:
- // required overrides
- virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override;
+ // required overrides
+ virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override;
private:
- // internal helpers
- bool describe_special(uint32_t op, opcode_desc &desc);
- bool describe_regimm(uint32_t op, opcode_desc &desc);
- bool describe_idt(uint32_t op, opcode_desc &desc);
- bool describe_cop0(uint32_t op, opcode_desc &desc);
- bool describe_cop1(uint32_t op, opcode_desc &desc);
- bool describe_cop1x(uint32_t op, opcode_desc &desc);
- bool describe_cop2(uint32_t op, opcode_desc &desc);
-
- // internal state
- mips3_device *m_mips3;
+ // internal helpers
+ bool describe_special(uint32_t op, opcode_desc &desc);
+ bool describe_regimm(uint32_t op, opcode_desc &desc);
+ bool describe_idt(uint32_t op, opcode_desc &desc);
+ bool describe_cop0(uint32_t op, opcode_desc &desc);
+ bool describe_cop1(uint32_t op, opcode_desc &desc);
+ bool describe_cop1x(uint32_t op, opcode_desc &desc);
+ bool describe_cop2(uint32_t op, opcode_desc &desc);
+
+ // internal state
+ mips3_device *m_mips3;
};
diff --git a/src/devices/cpu/mips/mips3com.cpp b/src/devices/cpu/mips/mips3com.cpp
index 294dd6b20e5..3893dfb19e0 100644
--- a/src/devices/cpu/mips/mips3com.cpp
+++ b/src/devices/cpu/mips/mips3com.cpp
@@ -367,7 +367,7 @@ void mips3_device::tlb_map_entry(int tlbindex)
}
/* get the number of pages from the page mask */
- /* R5900: if the S bit is set in EntryLo, it is the scratchpad, and is always 4 pages. */
+ /* R5900: if the S bit is set in EntryLo, it is the scratchpad, and is always 4 pages. */
if ((entry->entry_lo[0] & 0x80000000) && m_flavor == MIPS3_TYPE_R5900)
count = 4;
else
diff --git a/src/devices/cpu/mips/mips3com.h b/src/devices/cpu/mips/mips3com.h
index 96fc9c28b09..83195ca037f 100644
--- a/src/devices/cpu/mips/mips3com.h
+++ b/src/devices/cpu/mips/mips3com.h
@@ -124,9 +124,9 @@
#define SR_IMEX4 0x00004000
#define SR_IMEX5 0x00008000
#define SR_DE 0x00010000
-#define SR_EIE 0x00010000 /* R5900/EE only, Enable IE bit */
+#define SR_EIE 0x00010000 /* R5900/EE only, Enable IE bit */
#define SR_CE 0x00020000
-#define SR_EDI 0x00020000 /* R5900/EE only, EI/DI instruction enable */
+#define SR_EDI 0x00020000 /* R5900/EE only, EI/DI instruction enable */
#define SR_CH 0x00040000
#define SR_SR 0x00100000
#define SR_TS 0x00200000
diff --git a/src/devices/cpu/mips/mips3dsm.cpp b/src/devices/cpu/mips/mips3dsm.cpp
index e39bbab03c7..f394b99cb76 100644
--- a/src/devices/cpu/mips/mips3dsm.cpp
+++ b/src/devices/cpu/mips/mips3dsm.cpp
@@ -172,12 +172,12 @@ uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &s
case 0x02: util::stream_format(stream, "tlbwi"); break;
case 0x06: util::stream_format(stream, "tlbwr"); break;
case 0x08: util::stream_format(stream, "tlbp"); break;
- case 0x10: util::stream_format(stream, "rfe"); flags = STEP_OUT; break;
- case 0x18: util::stream_format(stream, "eret"); break;
- default: dasm_extra_cop0(pc, op, stream); break;
+ case 0x10: util::stream_format(stream, "rfe"); flags = STEP_OUT; break;
+ case 0x18: util::stream_format(stream, "eret"); break;
+ default: dasm_extra_cop0(pc, op, stream); break;
}
break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
}
return flags;
}
@@ -841,9 +841,9 @@ uint32_t ee_disassembler::dasm_extra_special(uint32_t pc, uint32_t op, std::ostr
switch (op & 63)
{
- case 0x28: util::stream_format(stream, "mfsa %s", reg[rd]); break;
- case 0x29: util::stream_format(stream, "mtsa %s", reg[rs]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ case 0x28: util::stream_format(stream, "mfsa %s", reg[rd]); break;
+ case 0x29: util::stream_format(stream, "mtsa %s", reg[rs]); break;
+ default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
}
return 0;
}
diff --git a/src/devices/cpu/mips/ps2vif1.cpp b/src/devices/cpu/mips/ps2vif1.cpp
index cb5e5da275e..203511141b7 100644
--- a/src/devices/cpu/mips/ps2vif1.cpp
+++ b/src/devices/cpu/mips/ps2vif1.cpp
@@ -14,6 +14,10 @@
#include "emu.h"
#include "ps2vif1.h"
+#include "ps2vu.h"
+#include "video/ps2gs.h"
+#include "video/ps2gif.h"
+
DEFINE_DEVICE_TYPE(SONYPS2_VIF1, ps2_vif1_device, "ps2vif1", "PlayStation 2 VIF1")
/*static*/ const size_t ps2_vif1_device::BUFFER_SIZE = 0x40;
@@ -32,39 +36,43 @@ ps2_vif1_device::ps2_vif1_device(const machine_config &mconfig, const char *tag,
{
}
+ps2_vif1_device::~ps2_vif1_device()
+{
+}
+
void ps2_vif1_device::device_start()
{
set_icountptr(m_icount);
save_item(NAME(m_icount));
- save_item(NAME(m_buffer));
- save_item(NAME(m_curr));
- save_item(NAME(m_end));
-
- save_item(NAME(m_status));
- save_item(NAME(m_control));
- save_item(NAME(m_err));
- save_item(NAME(m_mark));
- save_item(NAME(m_cycle));
- save_item(NAME(m_mode));
- save_item(NAME(m_num));
- save_item(NAME(m_mask));
- save_item(NAME(m_code));
- save_item(NAME(m_itops));
- save_item(NAME(m_base));
- save_item(NAME(m_offset));
- save_item(NAME(m_tops));
- save_item(NAME(m_itop));
- save_item(NAME(m_top));
-
- save_item(NAME(m_row_fill));
- save_item(NAME(m_col_fill));
-
- save_item(NAME(m_data_needed));
- save_item(NAME(m_data_index));
- save_item(NAME(m_command));
- save_item(NAME(m_alignment));
+ save_item(NAME(m_buffer));
+ save_item(NAME(m_curr));
+ save_item(NAME(m_end));
+
+ save_item(NAME(m_status));
+ save_item(NAME(m_control));
+ save_item(NAME(m_err));
+ save_item(NAME(m_mark));
+ save_item(NAME(m_cycle));
+ save_item(NAME(m_mode));
+ save_item(NAME(m_num));
+ save_item(NAME(m_mask));
+ save_item(NAME(m_code));
+ save_item(NAME(m_itops));
+ save_item(NAME(m_base));
+ save_item(NAME(m_offset));
+ save_item(NAME(m_tops));
+ save_item(NAME(m_itop));
+ save_item(NAME(m_top));
+
+ save_item(NAME(m_row_fill));
+ save_item(NAME(m_col_fill));
+
+ save_item(NAME(m_data_needed));
+ save_item(NAME(m_data_index));
+ save_item(NAME(m_command));
+ save_item(NAME(m_alignment));
save_item(NAME(m_mpg_count));
save_item(NAME(m_mpg_addr));
@@ -83,37 +91,37 @@ void ps2_vif1_device::device_reset()
{
m_icount = 0;
- memset(m_buffer, 0, sizeof(uint32_t) * BUFFER_SIZE);
- m_curr = 0;
- m_end = 0;
-
- m_status = 0;
- m_control = 0;
- m_err = 0;
- m_mark = 0;
- m_cycle = 0;
- m_mode = 0;
- m_num = 0;
- m_mask = 0;
- m_code = 0;
- m_itops = 0;
- m_base = 0;
- m_offset = 0;
- m_tops = 0;
- m_itop = 0;
- m_top = 0;
-
- memset(m_row_fill, 0, sizeof(uint32_t) * 4);
- memset(m_col_fill, 0, sizeof(uint32_t) * 4);
-
- m_data_needed = 0;
- m_data_index = 0;
- m_command = 0;
- m_alignment = 0;
-
- m_mpg_count = 0;
- m_mpg_addr = 0;
- m_mpg_insn = 0;
+ memset(m_buffer, 0, sizeof(uint32_t) * BUFFER_SIZE);
+ m_curr = 0;
+ m_end = 0;
+
+ m_status = 0;
+ m_control = 0;
+ m_err = 0;
+ m_mark = 0;
+ m_cycle = 0;
+ m_mode = 0;
+ m_num = 0;
+ m_mask = 0;
+ m_code = 0;
+ m_itops = 0;
+ m_base = 0;
+ m_offset = 0;
+ m_tops = 0;
+ m_itop = 0;
+ m_top = 0;
+
+ memset(m_row_fill, 0, sizeof(uint32_t) * 4);
+ memset(m_col_fill, 0, sizeof(uint32_t) * 4);
+
+ m_data_needed = 0;
+ m_data_index = 0;
+ m_command = 0;
+ m_alignment = 0;
+
+ m_mpg_count = 0;
+ m_mpg_addr = 0;
+ m_mpg_insn = 0;
m_unpack_count = 0;
m_unpack_addr = 0;
diff --git a/src/devices/cpu/mips/ps2vif1.h b/src/devices/cpu/mips/ps2vif1.h
index 0ef8482280a..6241381e7dc 100644
--- a/src/devices/cpu/mips/ps2vif1.h
+++ b/src/devices/cpu/mips/ps2vif1.h
@@ -9,8 +9,8 @@
*
*/
-#ifndef DEVICES_MACHINE_VIF1_H
-#define DEVICES_MACHINE_VIF1_H
+#ifndef MAME_CPU_MIPS_PS2VIF1_H
+#define MAME_CPU_MIPS_PS2VIF1_H
#pragma once
@@ -21,17 +21,18 @@ class ps2_vif1_device : public device_t, public device_execute_interface
{
public:
template <typename T, typename U>
- ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag)
- : ps2_vif1_device(mconfig, tag, owner, clock)
- {
+ ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&gs_tag, U &&vu1_tag)
+ : ps2_vif1_device(mconfig, tag, owner, clock)
+ {
m_gs.set_tag(std::forward<T>(gs_tag));
m_vu1.set_tag(std::forward<U>(vu1_tag));
}
ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ virtual ~ps2_vif1_device() override;
- DECLARE_READ64_MEMBER(mmio_r);
- DECLARE_WRITE64_MEMBER(mmio_w);
+ DECLARE_READ64_MEMBER(mmio_r);
+ DECLARE_WRITE64_MEMBER(mmio_w);
DECLARE_READ32_MEMBER(regs_r);
DECLARE_WRITE32_MEMBER(regs_w);
@@ -41,8 +42,8 @@ public:
bool fifo_available(uint32_t count) const { return (BUFFER_SIZE - m_end) >= count; }
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override;
+ virtual void device_reset() override;
virtual void execute_run() override;
uint32_t calculate_unpack_count();
@@ -66,42 +67,42 @@ protected:
STAT_MODE_DATA = 3,
STAT_E_WAIT = (1 << 2),
- STAT_GS_WAIT = (1 << 3),
- STAT_MARK = (1 << 6),
- STAT_DBUF = (1 << 7),
+ STAT_GS_WAIT = (1 << 3),
+ STAT_MARK = (1 << 6),
+ STAT_DBUF = (1 << 7),
STAT_STALL_STOP = (1 << 8),
STAT_STALL_FBRK = (1 << 9),
STAT_STALL_INT = (1 << 10),
- STAT_INT = (1 << 11),
- STAT_BAD_TAG = (1 << 12),
- STAT_BAD_CODE = (1 << 13),
+ STAT_INT = (1 << 11),
+ STAT_BAD_TAG = (1 << 12),
+ STAT_BAD_CODE = (1 << 13),
STAT_FDR_TO_HOST = (1 << 23)
};
enum : uint8_t
{
- CMD_INT = 0x80,
- CMD_UNPACK_MASK = 0x10
+ CMD_INT = 0x80,
+ CMD_UNPACK_MASK = 0x10
};
enum : uint8_t
{
- FMT_S32 = 0x00,
- FMT_S16 = 0x01,
- FMT_S8 = 0x02,
- //FMT_UNK0 = 0x03,
- FMT_V2_32 = 0x04,
- FMT_V2_16 = 0x05,
- FMT_V2_8 = 0x06,
- //FMT_UNK1 = 0x07,
- FMT_V3_32 = 0x08,
- FMT_V3_16 = 0x09,
- FMT_V3_8 = 0x0a,
- //FMT_UNK2 = 0x0b,
- FMT_V4_32 = 0x0c,
- FMT_V4_16 = 0x0d,
- FMT_V4_8 = 0x0e,
- FMT_V4_5 = 0x0f,
+ FMT_S32 = 0x00,
+ FMT_S16 = 0x01,
+ FMT_S8 = 0x02,
+ //FMT_UNK0 = 0x03,
+ FMT_V2_32 = 0x04,
+ FMT_V2_16 = 0x05,
+ FMT_V2_8 = 0x06,
+ //FMT_UNK1 = 0x07,
+ FMT_V3_32 = 0x08,
+ FMT_V3_16 = 0x09,
+ FMT_V3_8 = 0x0a,
+ //FMT_UNK2 = 0x0b,
+ FMT_V4_32 = 0x0c,
+ FMT_V4_16 = 0x0d,
+ FMT_V4_8 = 0x0e,
+ FMT_V4_5 = 0x0f,
};
required_device<ps2_gs_device> m_gs;
@@ -109,28 +110,28 @@ protected:
int m_icount;
- uint32_t m_buffer[0x40];
- uint32_t m_curr;
- uint32_t m_end;
-
- uint32_t m_status;
- uint32_t m_control;
- uint32_t m_err;
- uint32_t m_mark;
- uint32_t m_cycle;
- uint32_t m_mode;
- uint32_t m_num;
- uint32_t m_mask;
- uint32_t m_code;
- uint32_t m_itops;
- uint32_t m_base;
- uint32_t m_offset;
- uint32_t m_tops;
- uint32_t m_itop;
- uint32_t m_top;
-
- uint32_t m_row_fill[4];
- uint32_t m_col_fill[4];
+ uint32_t m_buffer[0x40];
+ uint32_t m_curr;
+ uint32_t m_end;
+
+ uint32_t m_status;
+ uint32_t m_control;
+ uint32_t m_err;
+ uint32_t m_mark;
+ uint32_t m_cycle;
+ uint32_t m_mode;
+ uint32_t m_num;
+ uint32_t m_mask;
+ uint32_t m_code;
+ uint32_t m_itops;
+ uint32_t m_base;
+ uint32_t m_offset;
+ uint32_t m_tops;
+ uint32_t m_itop;
+ uint32_t m_top;
+
+ uint32_t m_row_fill[4];
+ uint32_t m_col_fill[4];
uint32_t m_data_needed;
uint32_t m_data_index;
@@ -149,13 +150,10 @@ protected:
bool m_unpack_add_tops;
uint8_t m_unpack_format;
- static const size_t BUFFER_SIZE;
- static const uint32_t FORMAT_SIZE[0x10];
+ static const size_t BUFFER_SIZE;
+ static const uint32_t FORMAT_SIZE[0x10];
};
DECLARE_DEVICE_TYPE(SONYPS2_VIF1, ps2_vif1_device)
-#include "video/ps2gs.h"
-#include "ps2vu.h"
-
-#endif // DEVICES_MACHINE_PS2VIF1_H
+#endif // MAME_CPU_MIPS_PS2VIF1_H
diff --git a/src/devices/cpu/mips/ps2vu.cpp b/src/devices/cpu/mips/ps2vu.cpp
index 3af58884aba..491af559fc9 100644
--- a/src/devices/cpu/mips/ps2vu.cpp
+++ b/src/devices/cpu/mips/ps2vu.cpp
@@ -11,6 +11,7 @@
#include "emu.h"
#include "ps2vu.h"
+
#include "ps2vif1.h"
#include "video/ps2gs.h"
#include "video/ps2gif.h"
@@ -20,8 +21,16 @@
DEFINE_DEVICE_TYPE(SONYPS2_VU0, sonyvu0_device, "sonyvu0", "Sony PlayStation 2 VU0")
DEFINE_DEVICE_TYPE(SONYPS2_VU1, sonyvu1_device, "sonyvu1", "Sony PlayStation 2 VU1")
-sonyvu_device::sonyvu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock,
- address_map_constructor micro_cons, address_map_constructor vu_cons, chip_type chiptype, uint32_t mem_size)
+sonyvu_device::sonyvu_device(
+ const machine_config &mconfig,
+ device_type type,
+ const char *tag,
+ device_t *owner,
+ uint32_t clock,
+ address_map_constructor micro_cons,
+ address_map_constructor vu_cons,
+ chip_type chiptype,
+ uint32_t mem_size)
: cpu_device(mconfig, type, tag, owner, clock)
, m_micro_config("micro", ENDIANNESS_BIG, 64, 12, 0, micro_cons)
, m_vu_config("vu", ENDIANNESS_BIG, 32, 12, 0, vu_cons)
@@ -736,10 +745,10 @@ void sonyvu_device::execute_lower(const uint32_t op)
{
case 0x30:
if (rs == 0 && rt == 0 && dest == 0)
- { // NOP
+ { // NOP
}
else
- { // MOVE
+ { // MOVE
printf("Unsupported VU instruction: MOVE\n"); fflush(stdout); fatalerror("Unsupported VU instruction\n"); break;
}
break;
diff --git a/src/devices/cpu/mips/ps2vu.h b/src/devices/cpu/mips/ps2vu.h
index 9f22e9384ad..04b94c9a5f1 100644
--- a/src/devices/cpu/mips/ps2vu.h
+++ b/src/devices/cpu/mips/ps2vu.h
@@ -138,37 +138,37 @@ protected:
// address spaces
const address_space_config m_micro_config;
const address_space_config m_vu_config;
- address_space *m_micro_space;
- address_space *m_vu_space;
+ address_space *m_micro_space;
+ address_space *m_vu_space;
// core registers
- uint32_t m_mem_size;
- uint32_t m_mem_mask;
+ uint32_t m_mem_size;
+ uint32_t m_mem_mask;
required_shared_ptr<uint64_t> m_micro_mem;
required_shared_ptr<uint32_t> m_vu_mem;
- float* m_vfmem;
- uint32_t* m_vimem;
+ float* m_vfmem;
+ uint32_t* m_vimem;
- float m_vfr[32][4]; // 0..3 = x..w
- uint32_t m_vcr[32];
- float m_acc[4];
+ float m_vfr[32][4]; // 0..3 = x..w
+ uint32_t m_vcr[32];
+ float m_acc[4];
- float* m_v;
+ float* m_v;
- uint32_t m_status_flag;
- uint32_t m_mac_flag;
- uint32_t m_clip_flag;
- uint32_t m_r;
- float m_i;
- float m_q;
+ uint32_t m_status_flag;
+ uint32_t m_mac_flag;
+ uint32_t m_clip_flag;
+ uint32_t m_r;
+ float m_i;
+ float m_q;
- uint32_t m_pc;
- uint32_t m_delay_pc;
- uint32_t m_start_pc;
+ uint32_t m_pc;
+ uint32_t m_delay_pc;
+ uint32_t m_start_pc;
- bool m_running;
+ bool m_running;
- int m_icount;
+ int m_icount;
};
class sonyvu1_device : public sonyvu_device
@@ -185,8 +185,8 @@ public:
ps2_vif1_device* interface();
- DECLARE_READ64_MEMBER(vif_r);
- DECLARE_WRITE64_MEMBER(vif_w);
+ DECLARE_READ64_MEMBER(vif_r);
+ DECLARE_WRITE64_MEMBER(vif_w);
protected:
virtual void device_start() override;
@@ -232,17 +232,14 @@ protected:
required_device<sonyvu1_device> m_vu1;
- float* m_vu1_regs;
- uint32_t m_control;
- uint32_t m_vpu_stat;
- uint32_t m_cmsar0;
- uint32_t m_cmsar1;
+ float* m_vu1_regs;
+ uint32_t m_control;
+ uint32_t m_vpu_stat;
+ uint32_t m_cmsar0;
+ uint32_t m_cmsar1;
};
DECLARE_DEVICE_TYPE(SONYPS2_VU1, sonyvu1_device)
DECLARE_DEVICE_TYPE(SONYPS2_VU0, sonyvu0_device)
-#include "video/ps2gs.h"
-#include "cpu/mips/ps2vif1.h"
-
#endif // MAME_CPU_MIPS_PS2VU_H
diff --git a/src/devices/cpu/mips/r3000.cpp b/src/devices/cpu/mips/r3000.cpp
index a0084fd4c48..6495c922f86 100644
--- a/src/devices/cpu/mips/r3000.cpp
+++ b/src/devices/cpu/mips/r3000.cpp
@@ -15,7 +15,7 @@
#define ENABLE_OVERFLOWS (0)
-#define ENABLE_IOP_KPUTS (1)
+#define ENABLE_IOP_KPUTS (1)
/***************************************************************************
diff --git a/src/devices/cpu/mips/vudasm.cpp b/src/devices/cpu/mips/vudasm.cpp
index e3f7ab470d8..cb207498d1d 100644
--- a/src/devices/cpu/mips/vudasm.cpp
+++ b/src/devices/cpu/mips/vudasm.cpp
@@ -298,7 +298,7 @@ void sonyvu_disassembler::dasm_lower(uint32_t pc, uint32_t op, std::ostream &str
util::stream_format(stream, "mtir %s, %s%s", VIREG[rt], VFREG[rs], fsf);
break;
case 0x3d: // MFIR
- util::stream_format(stream, "mtir.%s %s%s %s", dest, VFREG[rt], destc, VIREG[rs] );
+ util::stream_format(stream, "mtir.%s %s%s %s", dest, VFREG[rt], destc, VIREG[rs] );
break;
case 0x3e: // ILWR
util::stream_format(stream, "ilwr.%s %s, (%s)%s", dest, VIREG[rt], VIREG[rs], dest);
diff --git a/src/devices/cpu/mips/vudasm.h b/src/devices/cpu/mips/vudasm.h
index a2bbf5fb310..abd67ed89aa 100644
--- a/src/devices/cpu/mips/vudasm.h
+++ b/src/devices/cpu/mips/vudasm.h
@@ -38,4 +38,4 @@ private:
static const char * VIREG[32];
};
-#endif // MAME_CPU_MIPS_VUDASM_H \ No newline at end of file
+#endif // MAME_CPU_MIPS_VUDASM_H