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Diffstat (limited to 'src/devices/cpu/v30mz/v30mz.h')
-rw-r--r--src/devices/cpu/v30mz/v30mz.h200
1 files changed, 104 insertions, 96 deletions
diff --git a/src/devices/cpu/v30mz/v30mz.h b/src/devices/cpu/v30mz/v30mz.h
index 7d8d06c7b68..f194fba269c 100644
--- a/src/devices/cpu/v30mz/v30mz.h
+++ b/src/devices/cpu/v30mz/v30mz.h
@@ -5,17 +5,12 @@
#include "cpu/nec/necdasm.h"
-struct nec_config
-{
- const uint8_t* v25v35_decryptiontable; // internal decryption table
-};
-
enum
{
NEC_PC=0,
NEC_IP, NEC_AW, NEC_CW, NEC_DW, NEC_BW, NEC_SP, NEC_BP, NEC_IX, NEC_IY,
- NEC_FLAGS, NEC_ES, NEC_CS, NEC_SS, NEC_DS,
- NEC_VECTOR, NEC_PENDING
+ NEC_FLAGS, NEC_DS1, NEC_PS, NEC_SS, NEC_DS0,
+ NEC_VECTOR, NEC_PENDING, NEC_PFP
};
@@ -29,6 +24,9 @@ public:
// construction/destruction
v30mz_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ auto vector_cb() { return m_vector_func.bind(); }
+ uint32_t pc();
+
protected:
// device-level overrides
virtual void device_start() override;
@@ -47,74 +45,75 @@ protected:
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+ virtual void state_import(const device_state_entry &entry) override;
+ virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- virtual int get_mode() const override { return 1; };
+ virtual int get_mode() const override { return 1; }
void interrupt(int int_num);
- inline uint32_t pc();
// Accessing memory and io
- inline uint8_t read_byte(uint32_t addr);
- inline uint16_t read_word(uint32_t addr);
- inline void write_byte(uint32_t addr, uint8_t data);
- inline void write_word(uint32_t addr, uint16_t data);
+ inline uint8_t read_byte(uint16_t segment, uint16_t addr);
+ inline uint16_t read_word(uint16_t segment, uint16_t addr);
+ inline void write_byte(uint16_t segment, uint16_t addr, uint8_t data);
+ inline void write_word(uint16_t segment, uint16_t addr, uint16_t data);
inline uint8_t read_port(uint16_t port);
+ inline uint16_t read_port_word(uint16_t port);
inline void write_port(uint16_t port, uint8_t data);
+ inline void write_port_word(uint16_t port, uint16_t data);
// Executing instructions
+ void read_prefetch();
+ void init_prefetch();
inline uint8_t fetch_op();
inline uint8_t fetch();
inline uint16_t fetch_word();
inline uint8_t repx_op();
// Cycles passed while executing instructions
- inline void CLK(uint32_t cycles);
- inline void CLKM(uint32_t cycles_reg, uint32_t cycles_mem);
+ inline void clk(uint32_t cycles);
+ inline void clkm(uint32_t cycles_reg, uint32_t cycles_mem);
// Memory handling while executing instructions
- inline uint32_t default_base(int seg);
- inline uint32_t get_ea();
- inline void PutbackRMByte(uint8_t data);
- inline void PutbackRMWord(uint16_t data);
- inline void RegByte(uint8_t data);
- inline void RegWord(uint16_t data);
- inline uint8_t RegByte();
- inline uint16_t RegWord();
- inline uint16_t GetRMWord();
- inline uint16_t GetnextRMWord();
- inline uint8_t GetRMByte();
- inline void PutMemB(int seg, uint16_t offset, uint8_t data);
- inline void PutMemW(int seg, uint16_t offset, uint16_t data);
- inline uint8_t GetMemB(int seg, uint16_t offset);
- inline uint16_t GetMemW(int seg, uint16_t offset);
- inline void PutImmRMWord();
- inline void PutRMWord(uint16_t val);
- inline void PutRMByte(uint8_t val);
- inline void PutImmRMByte();
- inline void DEF_br8();
- inline void DEF_wr16();
- inline void DEF_r8b();
- inline void DEF_r16w();
- inline void DEF_ald8();
- inline void DEF_axd16();
+ inline uint16_t default_base(int seg);
+ inline void get_ea();
+ inline void store_ea_rm_byte(uint8_t data);
+ inline void store_ea_rm_word(uint16_t data);
+ inline void reg_byte(uint8_t data);
+ inline void reg_word(uint16_t data);
+ inline uint8_t reg_byte();
+ inline uint16_t reg_word();
+ inline uint16_t get_rm_word();
+ inline uint16_t get_next_rm_word();
+ inline uint8_t get_rm_byte();
+ inline void put_imm_rm_word();
+ inline void put_rm_word(uint16_t val);
+ inline void put_rm_byte(uint8_t val);
+ inline void put_imm_rm_byte();
+ inline void def_br8();
+ inline void def_wr16();
+ inline void def_r8b();
+ inline void def_r16w();
+ inline void def_ald8();
+ inline void def_awd16();
// Flags
- inline void set_CFB(uint32_t x);
- inline void set_CFW(uint32_t x);
- inline void set_AF(uint32_t x,uint32_t y,uint32_t z);
+ inline void set_CF_byte(uint32_t x);
+ inline void set_CF_word(uint32_t x);
+ inline void set_AF(uint32_t x, uint32_t y, uint32_t z);
inline void set_SF(uint32_t x);
inline void set_ZF(uint32_t x);
inline void set_PF(uint32_t x);
- inline void set_SZPF_Byte(uint32_t x);
- inline void set_SZPF_Word(uint32_t x);
- inline void set_OFW_Add(uint32_t x,uint32_t y,uint32_t z);
- inline void set_OFB_Add(uint32_t x,uint32_t y,uint32_t z);
- inline void set_OFW_Sub(uint32_t x,uint32_t y,uint32_t z);
- inline void set_OFB_Sub(uint32_t x,uint32_t y,uint32_t z);
- inline uint16_t CompressFlags() const;
- inline void ExpandFlags(uint16_t f);
+ inline void set_SZPF_byte(uint32_t x);
+ inline void set_SZPF_word(uint32_t x);
+ inline void set_OF_word_add(uint32_t x, uint32_t y, uint32_t z);
+ inline void set_OF_byte_add(uint32_t x, uint32_t y, uint32_t z);
+ inline void set_OF_word_sub(uint32_t x, uint32_t y, uint32_t z);
+ inline void set_OF_byte_sub(uint32_t x, uint32_t y, uint32_t z);
+ inline uint16_t compress_flags() const;
+ inline void expand_flags(uint16_t f);
// rep instructions
inline void i_insb();
@@ -134,54 +133,61 @@ protected:
inline void i_popf();
// sub implementations
- inline void ADDB();
- inline void ADDW();
- inline void SUBB();
- inline void SUBW();
- inline void ORB();
- inline void ORW();
- inline void ANDB();
- inline void ANDW();
- inline void XORB();
- inline void XORW();
- inline void ROL_BYTE();
- inline void ROL_WORD();
- inline void ROR_BYTE();
- inline void ROR_WORD();
- inline void ROLC_BYTE();
- inline void ROLC_WORD();
- inline void RORC_BYTE();
- inline void RORC_WORD();
- inline void SHL_BYTE(uint8_t c);
- inline void SHL_WORD(uint8_t c);
- inline void SHR_BYTE(uint8_t c);
- inline void SHR_WORD(uint8_t c);
- inline void SHRA_BYTE(uint8_t c);
- inline void SHRA_WORD(uint8_t c);
- inline void XchgAWReg(uint8_t reg);
- inline void IncWordReg(uint8_t reg);
- inline void DecWordReg(uint8_t reg);
- inline void PUSH(uint16_t data);
- inline uint16_t POP();
- inline void JMP(bool cond);
- inline void ADJ4(int8_t param1, int8_t param2);
- inline void ADJB(int8_t param1, int8_t param2);
+ inline void add_byte();
+ inline void add_word();
+ inline void sub_byte();
+ inline void sub_word();
+ inline void or_byte();
+ inline void or_word();
+ inline void and_byte();
+ inline void and_word();
+ inline void xor_byte();
+ inline void xor_word();
+ inline void rol_byte();
+ inline void rol_word();
+ inline void ror_byte();
+ inline void ror_word();
+ inline void rolc_byte();
+ inline void rolc_word();
+ inline void rorc_byte();
+ inline void rorc_word();
+ inline void shl_byte(uint8_t c);
+ inline void shl_word(uint8_t c);
+ inline void shr_byte(uint8_t c);
+ inline void shr_word(uint8_t c);
+ inline void shra_byte(uint8_t c);
+ inline void shra_word(uint8_t c);
+ inline void xchg_AW_reg(uint8_t reg);
+ inline void inc_word_reg(uint8_t reg);
+ inline void dec_word_reg(uint8_t reg);
+ inline void push(uint16_t data);
+ inline uint16_t pop();
+ inline void jmp(bool cond);
+ inline void adj4(int8_t param1, int8_t param2);
+ inline void adjb(int8_t param1, int8_t param2);
address_space_config m_program_config;
address_space_config m_io_config;
union
- { /* eight general registers */
- uint16_t w[8]; /* viewed as 16 bits registers */
- uint8_t b[16]; /* or as 8 bit registers */
+ { // eight general registers
+ uint16_t w[8]; // viewed as 16 bits registers
+ uint8_t b[16]; // or as 8 bit registers
} m_regs;
uint16_t m_sregs[4];
uint16_t m_ip;
+ uint16_t m_pfp; // prefetch pointer
+ static const size_t PREFETCH_MAX_SIZE = 16;
+ static const size_t PREFETCH_QUEUE_SIZE = 8;
+ uint8_t m_prefetch_queue[PREFETCH_MAX_SIZE];
+ int m_prefetch_queue_head;
+ int m_prefetch_queue_tail;
+ bool m_prefetch_fill_needed;
int32_t m_SignVal;
- uint32_t m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
- uint8_t m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */ /* OB[19.07.99] added Mode Flag V30 */
+ uint32_t m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; // 0 or non-0 valued flags
+ uint8_t m_TF, m_IF, m_DF, m_MF; // 0 or 1 valued flags. OB[19.07.99] added Mode Flag V30
uint32_t m_int_vector;
uint32_t m_pending_irq;
uint32_t m_nmi_state;
@@ -189,18 +195,17 @@ protected:
uint8_t m_no_interrupt;
uint8_t m_fire_trap;
- memory_access<20, 0, 0, ENDIANNESS_LITTLE>::cache m_cache;
- memory_access<20, 0, 0, ENDIANNESS_LITTLE>::specific m_program;
- memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific m_io;
+ memory_access<20, 1, 0, ENDIANNESS_LITTLE>::cache m_cache;
+ memory_access<20, 1, 0, ENDIANNESS_LITTLE>::specific m_program;
+ memory_access<16, 1, 0, ENDIANNESS_LITTLE>::specific m_io;
int m_icount;
- uint32_t m_prefix_base; /* base address of the latest prefix segment */
- bool m_seg_prefix; /* prefix segment indicator */
- bool m_seg_prefix_next; /* prefix segment for next instruction */
+ uint16_t m_prefix_base; // base address of the latest prefix segment
+ bool m_seg_prefix; // prefix segment indicator
+ bool m_seg_prefix_next; // prefix segment for next instruction
- uint32_t m_ea;
uint16_t m_eo;
- uint16_t m_e16;
+ uint16_t m_ea_seg;
// Used during execution of instructions
uint8_t m_modrm;
@@ -220,6 +225,9 @@ protected:
int b[256];
} RM;
} m_Mod_RM;
+
+ devcb_read32 m_vector_func;
+ uint16_t m_debugger_temp;
};
#endif // MAME_CPU_V32MZ_V30MZ_H