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Diffstat (limited to 'src/devices/cpu/unsp/unsp_extended.cpp')
-rw-r--r--src/devices/cpu/unsp/unsp_extended.cpp113
1 files changed, 52 insertions, 61 deletions
diff --git a/src/devices/cpu/unsp/unsp_extended.cpp b/src/devices/cpu/unsp/unsp_extended.cpp
index 8a058d8f8ad..bbfbefd1844 100644
--- a/src/devices/cpu/unsp/unsp_extended.cpp
+++ b/src/devices/cpu/unsp/unsp_extended.cpp
@@ -5,8 +5,6 @@
#include "unsp.h"
#include "unspfe.h"
-#include "debugger.h"
-
#include "unspdasm.h"
// TODO: the call conventions and general use of 'do_basic_alu_ops' from unsp_other.cpp could be cleaned up
@@ -55,7 +53,6 @@ void unsp_20_device::execute_extended_group(uint16_t op)
}
case 0x02:
{
- // register decoding could be incorrect here
// Ext Push/Pop
if (ximm & 0x8000)
{
@@ -65,22 +62,10 @@ void unsp_20_device::execute_extended_group(uint16_t op)
if (size == 0) size = 8;
- if ((rx - (size - 1)) >= 0)
+ while (size--)
{
- //logerror("(Ext) push %s, %s to [%s]\n",
- // extregs[rx - size], extregs[rx], (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]);
-
- while (size--)
- {
- push(m_core->m_r[(rx--) + 8], &m_core->m_r[rb]);
- }
+ push(m_core->m_r[((rx--)&7) + 8], &m_core->m_r[rb]);
}
- else
- {
- logerror("(Ext) push <BAD>\n");
- unimplemented_opcode(op, ximm);
- }
-
return;
}
else
@@ -89,30 +74,12 @@ void unsp_20_device::execute_extended_group(uint16_t op)
uint8_t size = (ximm & 0x7000) >> 12;
uint8_t rx = (ximm & 0x0e00) >> 9;
-
if (size == 0) size = 8;
- if ((rx - (size - 1)) >= 0)
- {
- //logerror("(Ext) pop %s, %s from [%s]\n",
- // extregs[rx - size], extregs[rx], (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]);
- int realrx = 7 - rx;
-
- while (size--)
- {
- if (rb & 0x8)
- m_core->m_r[(realrx++) + 8] = pop(&m_core->m_r[(rb & 0x07) + 8]);
- else
- m_core->m_r[(realrx++) + 8] = pop(&m_core->m_r[rb & 0x07]);
- }
- }
- else
+ while (size--)
{
- logerror("(Ext) pop <BAD>\n");
- unimplemented_opcode(op, ximm);
+ m_core->m_r[((++rx)&7) + 8] = pop(&m_core->m_r[rb]);
}
-
-
return;
}
return;
@@ -185,8 +152,6 @@ void unsp_20_device::execute_extended_group(uint16_t op)
case 0x07:
case 0x17:
{
- // this decoding / hookup might be incorrect, only seen Store used, and that the decode seems strange for that
-
uint16_t imm16_2 = read16(UNSP_LPC);
add_lpc(1);
@@ -208,40 +173,66 @@ void unsp_20_device::execute_extended_group(uint16_t op)
if (write)
{
- // a = [A16]
write16(imm16_2, lres);
}
return;
}
- case 0x08: case 0x09:
+ case 0x08: case 0x09: // Ext Indirect, Rx = Rx op [Ry@]
+ case 0x0a: case 0x0b: // Ext Indirect, Rx = Rx op ds:[Ry@]
{
- // Ext Indirect
- // Rx = Rx op [Ry@]
- // A = B op C
+ uint16_t r0 = 0;
+ uint16_t r1 = 0;
+ uint32_t r2 = 0;
+ uint32_t lres = 0;
- //uint8_t aluop = (ximm & 0xf000) >> 12;
- //uint8_t ry = (ximm & 0x0007) >> 0;
- //uint8_t form = (ximm & 0x0018) >> 3;
- //uint8_t rx = (ximm & 0x0e00) >> 9;
+ uint16_t aluop = (ximm & 0xf000) >> 12;
+ uint8_t ry = (ximm & 0x0007) + 8;
+ uint8_t rx = ((ximm & 0x0e00) >> 9) + 8;
+ uint8_t use_ds = BIT(ximm, 5);
+ uint8_t form = (ximm & 0x0018) >> 3;
- logerror("(Extended group 4 'Rx=Rx op [Ry@]' form) unimplemented ");
- unimplemented_opcode(op, ximm);
- return;
- }
- case 0x0a: case 0x0b:
- {
- // Ext DS_Indirect Rx=Rx op ds:[Ry@]
+ r0 = m_core->m_r[rx];
- //uint8_t aluop = (ximm & 0xf000) >> 12;
- //uint8_t ry = (ximm & 0x0007) >> 0;
- //uint8_t form = (ximm & 0x0018) >> 3;
- //uint8_t rx = (ximm & 0x0e00) >> 9;
+ switch (form)
+ {
+ case 0x0: // Rx, [<ds:>Ry]
+ r2 = use_ds ? UNSP_LREG_I(ry) : m_core->m_r[ry];
+ if (aluop != 0x0d)
+ r1 = read16(r2);
+ break;
+ case 0x1: // Rx, [<ds:>Ry--]
+ r2 = use_ds ? UNSP_LREG_I(ry) : m_core->m_r[ry];
+ if (aluop != 0x0d)
+ r1 = read16(r2);
+ m_core->m_r[ry] = (uint16_t)(m_core->m_r[ry] - 1);
+ if (m_core->m_r[ry] == 0xffff && use_ds)
+ m_core->m_r[REG_SR] -= 0x0400;
+ break;
+ case 0x2: // Rx, [<ds:>Ry++]
+ r2 = use_ds ? UNSP_LREG_I(ry) : m_core->m_r[ry];
+ if (aluop != 0x0d)
+ r1 = read16(r2);
+ m_core->m_r[ry] = (uint16_t)(m_core->m_r[ry] + 1);
+ if (m_core->m_r[ry] == 0x0000 && use_ds)
+ m_core->m_r[REG_SR] += 0x0400;
+ break;
+ case 0x3: // Rx, [<ds:>++Ry]
+ m_core->m_r[ry] = (uint16_t)(m_core->m_r[ry] + 1);
+ if (m_core->m_r[ry] == 0x0000 && use_ds)
+ m_core->m_r[REG_SR] += 0x0400;
+ r2 = use_ds ? UNSP_LREG_I(ry) : m_core->m_r[ry];
+ if (aluop != 0x0d)
+ r1 = read16(r2);
+ break;
+ }
- logerror("(Extended group 5 'Rx=Rx op ds:[Ry@]' form) unimplemented ");
+ if (do_basic_alu_ops(aluop, lres, r0, r1, r2, (aluop != 7) ? true : false))
+ {
+ m_core->m_r[rx] = (uint16_t)lres;
+ }
- unimplemented_opcode(op, ximm);
return;
}
case 0x18: case 0x19: case 0x1a: case 0x1b: