summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/tlcs900/tmp95c061.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/cpu/tlcs900/tmp95c061.cpp')
-rw-r--r--src/devices/cpu/tlcs900/tmp95c061.cpp85
1 files changed, 46 insertions, 39 deletions
diff --git a/src/devices/cpu/tlcs900/tmp95c061.cpp b/src/devices/cpu/tlcs900/tmp95c061.cpp
index c2f5ea258cf..d74d7baa0a1 100644
--- a/src/devices/cpu/tlcs900/tmp95c061.cpp
+++ b/src/devices/cpu/tlcs900/tmp95c061.cpp
@@ -14,22 +14,23 @@ DEFINE_DEVICE_TYPE(TMP95C061, tmp95c061_device, "tmp95c061", "Toshiba TMP95C061"
tmp95c061_device::tmp95c061_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
tlcs900h_device(mconfig, TMP95C061, tag, owner, clock),
- m_port1_read(*this),
+ m_port1_read(*this, 0),
m_port1_write(*this),
m_port2_write(*this),
- m_port5_read(*this),
+ m_port5_read(*this, 0),
m_port5_write(*this),
- m_port6_read(*this),
+ m_port6_read(*this, 0),
m_port6_write(*this),
- m_port7_read(*this),
+ m_port7_read(*this, 0),
m_port7_write(*this),
- m_port8_read(*this),
+ m_port8_read(*this, 0),
m_port8_write(*this),
- m_port9_read(*this),
- m_porta_read(*this),
+ m_port9_read(*this, 0),
+ m_porta_read(*this, 0),
m_porta_write(*this),
- m_portb_read(*this),
+ m_portb_read(*this, 0),
m_portb_write(*this),
+ m_an_read(*this, 0),
m_port_latch{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
m_port_control{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
m_port_function{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
@@ -189,23 +190,6 @@ void tmp95c061_device::device_start()
save_item(NAME(m_mem_start_mask));
save_item(NAME(m_dram_refresh));
save_item(NAME(m_dram_access));
-
- m_port1_read.resolve_safe(0);
- m_port1_write.resolve_safe();
- m_port2_write.resolve_safe();
- m_port5_read.resolve_safe(0);
- m_port5_write.resolve_safe();
- m_port6_read.resolve_safe(0);
- m_port6_write.resolve_safe();
- m_port7_read.resolve_safe(0);
- m_port7_write.resolve_safe();
- m_port8_read.resolve_safe(0);
- m_port8_write.resolve_safe();
- m_port9_read.resolve_safe(0);
- m_porta_read.resolve_safe(0);
- m_porta_write.resolve_safe();
- m_portb_read.resolve_safe(0);
- m_portb_write.resolve_safe();
}
void tmp95c061_device::device_reset()
@@ -324,7 +308,7 @@ int tmp95c061_device::tlcs900_process_hdma( int channel )
uint8_t vector = ( m_dma_vector[channel] & 0x1f ) << 2;
/* Check if any HDMA actions should be performed */
- if ( vector >= 0x28 && vector != 0x3C && vector < 0x74 )
+ if ( vector >= 0x28 && vector != 0x3c && vector < 0x74 )
{
int irq = 0;
@@ -550,15 +534,29 @@ void tmp95c061_device::tlcs900_handle_ad()
if ( m_ad_cycles_left <= 0 )
{
/* Store A/D converted value */
- switch( m_ad_mode & 0x03 )
+ if ( ( m_ad_mode & 0x10 ) == 0 )
{
- case 0x00: /* AN0 */
- m_ad_result[0] = 0x3ff;
- break;
- case 0x01: /* AN1 */
- case 0x02: /* AN2 */
- case 0x03: /* AN3 */
- break;
+ /* conversion channel fixed */
+ m_ad_result[m_ad_mode & 0x03] = m_an_read[m_ad_mode & 0x03](0) & 0x3ff;
+ }
+ else
+ {
+ /* conversion channel sweep */
+ switch( m_ad_mode & 0x03 )
+ {
+ case 0x03: /* AN3 */
+ m_ad_result[3] = m_an_read[3](0) & 0x3ff;
+ [[fallthrough]];
+ case 0x02: /* AN2 */
+ m_ad_result[2] = m_an_read[2](0) & 0x3ff;
+ [[fallthrough]];
+ case 0x01: /* AN1 */
+ m_ad_result[1] = m_an_read[1](0) & 0x3ff;
+ [[fallthrough]];
+ case 0x00: /* AN0 */
+ m_ad_result[0] = m_an_read[0](0) & 0x3ff;
+ break;
+ }
}
/* Clear BUSY flag, set END flag */
@@ -567,6 +565,10 @@ void tmp95c061_device::tlcs900_handle_ad()
m_int_reg[TMP95C061_INTE0AD] |= 0x80;
m_check_irqs = 1;
+
+ /* AD repeat mode */
+ if ( m_ad_mode & 0x20 )
+ m_ad_cycles_left = ( m_ad_mode & 0x08 ) ? 320 : 160;
}
}
}
@@ -650,7 +652,7 @@ void tmp95c061_device::tlcs900_handle_timers()
m_timer[0] += 1;
if ( m_timer[0] == m_t8_reg[0] )
{
- if ( ( m_t8_mode[0] & 0x0c ) == 0x00 )
+ if ( ( m_trun & 0x02 ) && ( m_t8_mode[0] & 0x0c ) == 0x00 )
{
m_timer_change[1] += 1;
}
@@ -727,7 +729,7 @@ void tmp95c061_device::tlcs900_handle_timers()
m_timer[2] += 1;
if ( m_timer[2] == m_t8_reg[2] )
{
- if ( ( m_t8_mode[1] & 0x0c ) == 0x00 )
+ if ( ( m_trun & 0x08 ) && ( m_t8_mode[1] & 0x0c ) == 0x00 )
{
m_timer_change[3] += 1;
}
@@ -1355,10 +1357,15 @@ void tmp95c061_device::ode_w(uint8_t data)
uint8_t tmp95c061_device::adreg_r(offs_t offset)
{
+ // ADMOD EOCF is cleared to 0 when reading any ADREG0..3
+ m_ad_mode &= ~0x80;
+
if (BIT(offset, 0))
return m_ad_result[offset >> 1] >> 2;
- else
- return m_ad_result[offset >> 1] << 6 | 0x3f;
+
+ // Reading data from the upper 8 bits clears INTE0AD IADC
+ m_int_reg[TMP95C061_INTE0AD] &= ~0x80;
+ return m_ad_result[offset >> 1] << 6 | 0x3f;
}
uint8_t tmp95c061_device::admod_r()
@@ -1376,7 +1383,7 @@ void tmp95c061_device::admod_w(uint8_t data)
{
data &= ~0x04;
data |= 0x40;
- m_ad_cycles_left = ( data & 0x08 ) ? 640 : 320;
+ m_ad_cycles_left = ( data & 0x08 ) ? 320 : 160;
}
m_ad_mode = data;