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Diffstat (limited to 'src/devices/cpu/tlcs900/900tbl.hxx')
-rw-r--r--src/devices/cpu/tlcs900/900tbl.hxx2796
1 files changed, 1398 insertions, 1398 deletions
diff --git a/src/devices/cpu/tlcs900/900tbl.hxx b/src/devices/cpu/tlcs900/900tbl.hxx
index dc331c1d85c..80f46c0d1c1 100644
--- a/src/devices/cpu/tlcs900/900tbl.hxx
+++ b/src/devices/cpu/tlcs900/900tbl.hxx
@@ -9,28 +9,28 @@ TLCS-900/H instruction set
enum e_operand
{
- _A=1, /* current register set register A */
- _C8, /* current register set byte */
- _C16, /* current register set word */
- _C32, /* current register set long word */
- _MC16, /* current register set mul/div register word */
- _CC, /* condition */
- _CR8,
- _CR16,
- _CR32,
- _D8, /* byte displacement */
- _D16, /* word displacement */
- _F, /* F register */
- _I3, /* immediate 3 bit (part of last byte) */
- _I8, /* immediate byte */
- _I16, /* immediate word */
- _I24, /* immediate 3 byte address */
- _I32, /* immediate long word */
- _M, /* memory location (defined by extension) */
- _M8, /* (8) */
- _M16, /* (i16) */
- _R, /* register (defined by extension) */
- _SR /* status register */
+ p_A=1, /* current register set register A */
+ p_C8, /* current register set byte */
+ p_C16, /* current register set word */
+ p_C32, /* current register set long word */
+ p_MC16, /* current register set mul/div register word */
+ p_CC, /* condition */
+ p_CR8,
+ p_CR16,
+ p_CR32,
+ p_D8, /* byte displacement */
+ p_D16, /* word displacement */
+ p_F, /* F register */
+ p_I3, /* immediate 3 bit (part of last byte) */
+ p_I8, /* immediate byte */
+ p_I16, /* immediate word */
+ p_I24, /* immediate 3 byte address */
+ p_I32, /* immediate long word */
+ p_M, /* memory location (defined by extension) */
+ p_M8, /* (8) */
+ p_M16, /* (i16) */
+ p_R, /* register (defined by extension) */
+ p_SR /* status register */
};
@@ -1231,295 +1231,295 @@ uint32_t tlcs900h_device::divs16( int32_t a, int16_t b )
}
-void tlcs900h_device::_ADCBMI()
+void tlcs900h_device::op_ADCBMI()
{
WRMEM( m_ea1.d, adc8( RDMEM( m_ea1.d ), m_imm2.b.l ) );
}
-void tlcs900h_device::_ADCBMR()
+void tlcs900h_device::op_ADCBMR()
{
WRMEM( m_ea1.d, adc8( RDMEM( m_ea1.d ), *m_p2_reg8 ) );
}
-void tlcs900h_device::_ADCBRI()
+void tlcs900h_device::op_ADCBRI()
{
*m_p1_reg8 = adc8( *m_p1_reg8, m_imm2.b.l );
}
-void tlcs900h_device::_ADCBRM()
+void tlcs900h_device::op_ADCBRM()
{
*m_p1_reg8 = adc8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_ADCBRR()
+void tlcs900h_device::op_ADCBRR()
{
*m_p1_reg8 = adc8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_ADCWMI()
+void tlcs900h_device::op_ADCWMI()
{
WRMEMW( m_ea1.d, adc16( RDMEMW( m_ea1.d ), m_imm2.w.l ) );
}
-void tlcs900h_device::_ADCWMR()
+void tlcs900h_device::op_ADCWMR()
{
WRMEMW( m_ea1.d, adc16( RDMEMW( m_ea1.d ), *m_p2_reg16 ) );
}
-void tlcs900h_device::_ADCWRI()
+void tlcs900h_device::op_ADCWRI()
{
*m_p1_reg16 = adc16( *m_p1_reg16, m_imm2.w.l );
}
-void tlcs900h_device::_ADCWRM()
+void tlcs900h_device::op_ADCWRM()
{
*m_p1_reg16 = adc16( *m_p1_reg16, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_ADCWRR()
+void tlcs900h_device::op_ADCWRR()
{
*m_p1_reg16 = adc16( *m_p1_reg16, *m_p2_reg16 );
}
-void tlcs900h_device::_ADCLMR()
+void tlcs900h_device::op_ADCLMR()
{
WRMEML( m_ea1.d, adc32( RDMEML( m_ea1.d ), *m_p2_reg32 ) );
}
-void tlcs900h_device::_ADCLRI()
+void tlcs900h_device::op_ADCLRI()
{
*m_p1_reg32 = adc32( *m_p1_reg32, m_imm2.d );
}
-void tlcs900h_device::_ADCLRM()
+void tlcs900h_device::op_ADCLRM()
{
*m_p1_reg32 = adc32( *m_p1_reg32, RDMEML( m_ea2.d ) );
}
-void tlcs900h_device::_ADCLRR()
+void tlcs900h_device::op_ADCLRR()
{
*m_p1_reg32 = adc32( *m_p1_reg32, *m_p2_reg32 );
}
-void tlcs900h_device::_ADDBMI()
+void tlcs900h_device::op_ADDBMI()
{
WRMEM( m_ea1.d, add8( RDMEM( m_ea1.d ), m_imm2.b.l ) );
}
-void tlcs900h_device::_ADDBMR()
+void tlcs900h_device::op_ADDBMR()
{
WRMEM( m_ea1.d, add8( RDMEM( m_ea1.d ), *m_p2_reg8 ) );
}
-void tlcs900h_device::_ADDBRI()
+void tlcs900h_device::op_ADDBRI()
{
*m_p1_reg8 = add8( *m_p1_reg8, m_imm2.b.l );
}
-void tlcs900h_device::_ADDBRM()
+void tlcs900h_device::op_ADDBRM()
{
*m_p1_reg8 = add8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_ADDBRR()
+void tlcs900h_device::op_ADDBRR()
{
*m_p1_reg8 = add8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_ADDWMI()
+void tlcs900h_device::op_ADDWMI()
{
WRMEMW( m_ea1.d, add16( RDMEMW( m_ea1.d ), m_imm2.w.l ) );
}
-void tlcs900h_device::_ADDWMR()
+void tlcs900h_device::op_ADDWMR()
{
WRMEMW( m_ea1.d, add16( RDMEMW( m_ea1.d ), *m_p2_reg16 ) );
}
-void tlcs900h_device::_ADDWRI()
+void tlcs900h_device::op_ADDWRI()
{
*m_p1_reg16 = add16( *m_p1_reg16, m_imm2.w.l );
}
-void tlcs900h_device::_ADDWRM()
+void tlcs900h_device::op_ADDWRM()
{
*m_p1_reg16 = add16( *m_p1_reg16, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_ADDWRR()
+void tlcs900h_device::op_ADDWRR()
{
*m_p1_reg16 = add16( *m_p1_reg16, *m_p2_reg16 );
}
-void tlcs900h_device::_ADDLMR()
+void tlcs900h_device::op_ADDLMR()
{
WRMEML( m_ea1.d, add32( RDMEML( m_ea1.d ), *m_p2_reg32 ) );
}
-void tlcs900h_device::_ADDLRI()
+void tlcs900h_device::op_ADDLRI()
{
*m_p1_reg32 = add32( *m_p1_reg32, m_imm2.d );
}
-void tlcs900h_device::_ADDLRM()
+void tlcs900h_device::op_ADDLRM()
{
*m_p1_reg32 = add32( *m_p1_reg32, RDMEML( m_ea2.d ) );
}
-void tlcs900h_device::_ADDLRR()
+void tlcs900h_device::op_ADDLRR()
{
*m_p1_reg32 = add32( *m_p1_reg32, *m_p2_reg32 );
}
-void tlcs900h_device::_ANDBMI()
+void tlcs900h_device::op_ANDBMI()
{
WRMEM( m_ea1.d, and8( RDMEM( m_ea1.d ), m_imm2.b.l ) );
}
-void tlcs900h_device::_ANDBMR()
+void tlcs900h_device::op_ANDBMR()
{
WRMEM( m_ea1.d, and8( RDMEM( m_ea1.d ), *m_p2_reg8 ) );
}
-void tlcs900h_device::_ANDBRI()
+void tlcs900h_device::op_ANDBRI()
{
*m_p1_reg8 = and8( *m_p1_reg8, m_imm2.b.l );
}
-void tlcs900h_device::_ANDBRM()
+void tlcs900h_device::op_ANDBRM()
{
*m_p1_reg8 = and8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_ANDBRR()
+void tlcs900h_device::op_ANDBRR()
{
*m_p1_reg8 = and8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_ANDWMI()
+void tlcs900h_device::op_ANDWMI()
{
WRMEMW( m_ea1.d, and16( RDMEMW( m_ea1.d ), m_imm2.w.l ) );
}
-void tlcs900h_device::_ANDWMR()
+void tlcs900h_device::op_ANDWMR()
{
WRMEMW( m_ea1.d, and16( RDMEMW( m_ea1.d ), *m_p2_reg16 ) );
}
-void tlcs900h_device::_ANDWRI()
+void tlcs900h_device::op_ANDWRI()
{
*m_p1_reg16 = and16( *m_p1_reg16, m_imm2.w.l );
}
-void tlcs900h_device::_ANDWRM()
+void tlcs900h_device::op_ANDWRM()
{
*m_p1_reg16 = and16( *m_p1_reg16, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_ANDWRR()
+void tlcs900h_device::op_ANDWRR()
{
*m_p1_reg16 = and16( *m_p1_reg16, *m_p2_reg16 );
}
-void tlcs900h_device::_ANDLMR()
+void tlcs900h_device::op_ANDLMR()
{
WRMEML( m_ea1.d, and32( RDMEML( m_ea1.d ), *m_p2_reg32 ) );
}
-void tlcs900h_device::_ANDLRI()
+void tlcs900h_device::op_ANDLRI()
{
*m_p1_reg32 = and32( *m_p1_reg32, m_imm2.d );
}
-void tlcs900h_device::_ANDLRM()
+void tlcs900h_device::op_ANDLRM()
{
*m_p1_reg32 = and32( *m_p1_reg32, RDMEML( m_ea2.d ) );
}
-void tlcs900h_device::_ANDLRR()
+void tlcs900h_device::op_ANDLRR()
{
*m_p1_reg32 = and32( *m_p1_reg32, *m_p2_reg32 );
}
-void tlcs900h_device::_ANDCFBIM()
+void tlcs900h_device::op_ANDCFBIM()
{
andcf8( m_imm1.b.l, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_ANDCFBIR()
+void tlcs900h_device::op_ANDCFBIR()
{
andcf8( m_imm1.b.l, *m_p2_reg8 );
}
-void tlcs900h_device::_ANDCFBRM()
+void tlcs900h_device::op_ANDCFBRM()
{
andcf8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_ANDCFBRR()
+void tlcs900h_device::op_ANDCFBRR()
{
andcf8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_ANDCFWIR()
+void tlcs900h_device::op_ANDCFWIR()
{
andcf16( m_imm1.b.l, *m_p2_reg16 );
}
-void tlcs900h_device::_ANDCFWRR()
+void tlcs900h_device::op_ANDCFWRR()
{
andcf16( *m_p1_reg8, *m_p2_reg16 );
}
-void tlcs900h_device::_BITBIM()
+void tlcs900h_device::op_BITBIM()
{
m_sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
if ( RDMEM( m_ea2.d ) & ( 1 << ( m_imm1.b.l & 0x07 ) ) )
@@ -1529,7 +1529,7 @@ void tlcs900h_device::_BITBIM()
}
-void tlcs900h_device::_BITBIR()
+void tlcs900h_device::op_BITBIR()
{
m_sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
if ( *m_p2_reg8 & ( 1 << ( m_imm1.b.l & 0x0f ) ) )
@@ -1539,7 +1539,7 @@ void tlcs900h_device::_BITBIR()
}
-void tlcs900h_device::_BITWIR()
+void tlcs900h_device::op_BITWIR()
{
m_sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
if ( *m_p2_reg16 & ( 1 << ( m_imm1.b.l & 0x0f ) ) )
@@ -1549,7 +1549,7 @@ void tlcs900h_device::_BITWIR()
}
-void tlcs900h_device::_BS1BRR()
+void tlcs900h_device::op_BS1BRR()
{
uint16_t r = *m_p2_reg16;
@@ -1568,7 +1568,7 @@ void tlcs900h_device::_BS1BRR()
}
-void tlcs900h_device::_BS1FRR()
+void tlcs900h_device::op_BS1FRR()
{
uint16_t r = *m_p2_reg16;
@@ -1587,7 +1587,7 @@ void tlcs900h_device::_BS1FRR()
}
-void tlcs900h_device::_CALLI()
+void tlcs900h_device::op_CALLI()
{
m_xssp.d -= 4;
WRMEML( m_xssp.d, m_pc.d );
@@ -1596,7 +1596,7 @@ void tlcs900h_device::_CALLI()
}
-void tlcs900h_device::_CALLM()
+void tlcs900h_device::op_CALLM()
{
if ( condition_true( m_op ) )
{
@@ -1609,7 +1609,7 @@ void tlcs900h_device::_CALLM()
}
-void tlcs900h_device::_CALR()
+void tlcs900h_device::op_CALR()
{
m_xssp.d -= 4;
WRMEML( m_xssp.d, m_pc.d );
@@ -1618,116 +1618,116 @@ void tlcs900h_device::_CALR()
}
-void tlcs900h_device::_CCF()
+void tlcs900h_device::op_CCF()
{
m_sr.b.l &= ~ FLAG_NF;
m_sr.b.l ^= FLAG_CF;
}
-void tlcs900h_device::_CHGBIM()
+void tlcs900h_device::op_CHGBIM()
{
WRMEM( m_ea2.d, RDMEM( m_ea2.d ) ^ ( 1 << ( m_imm1.b.l & 0x07 ) ) );
}
-void tlcs900h_device::_CHGBIR()
+void tlcs900h_device::op_CHGBIR()
{
*m_p2_reg8 ^= ( 1 << ( m_imm1.b.l & 0x07 ) );
}
-void tlcs900h_device::_CHGWIR()
+void tlcs900h_device::op_CHGWIR()
{
*m_p2_reg16 ^= ( 1 << ( m_imm1.b.l & 0x0f ) );
}
-void tlcs900h_device::_CPBMI()
+void tlcs900h_device::op_CPBMI()
{
sub8( RDMEM( m_ea1.d ), m_imm2.b.l );
}
-void tlcs900h_device::_CPBMR()
+void tlcs900h_device::op_CPBMR()
{
sub8( RDMEM( m_ea1.d ), *m_p2_reg8 );
}
-void tlcs900h_device::_CPBRI()
+void tlcs900h_device::op_CPBRI()
{
sub8( *m_p1_reg8, m_imm2.b.l );
}
-void tlcs900h_device::_CPBRM()
+void tlcs900h_device::op_CPBRM()
{
sub8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_CPBRR()
+void tlcs900h_device::op_CPBRR()
{
sub8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_CPWMI()
+void tlcs900h_device::op_CPWMI()
{
sub16( RDMEMW( m_ea1.d ), m_imm2.w.l );
}
-void tlcs900h_device::_CPWMR()
+void tlcs900h_device::op_CPWMR()
{
sub16( RDMEMW( m_ea1.d ), *m_p2_reg16 );
}
-void tlcs900h_device::_CPWRI()
+void tlcs900h_device::op_CPWRI()
{
sub16( *m_p1_reg16, m_imm2.w.l );
}
-void tlcs900h_device::_CPWRM()
+void tlcs900h_device::op_CPWRM()
{
sub16( *m_p1_reg16, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_CPWRR()
+void tlcs900h_device::op_CPWRR()
{
sub16( *m_p1_reg16, *m_p2_reg16 );
}
-void tlcs900h_device::_CPLMR()
+void tlcs900h_device::op_CPLMR()
{
sub32( RDMEML( m_ea1.d ), *m_p2_reg32 );
}
-void tlcs900h_device::_CPLRI()
+void tlcs900h_device::op_CPLRI()
{
sub32( *m_p1_reg32, m_imm2.d );
}
-void tlcs900h_device::_CPLRM()
+void tlcs900h_device::op_CPLRM()
{
sub32( *m_p1_reg32, RDMEML( m_ea2.d ) );
}
-void tlcs900h_device::_CPLRR()
+void tlcs900h_device::op_CPLRR()
{
sub32( *m_p1_reg32, *m_p2_reg32 );
}
-void tlcs900h_device::_CPD()
+void tlcs900h_device::op_CPD()
{
uint8_t result = *get_reg8_current( 1 ) - RDMEM( *m_p2_reg32 );
uint16_t *bc = get_reg16_current( 1 );
@@ -1740,9 +1740,9 @@ void tlcs900h_device::_CPD()
}
-void tlcs900h_device::_CPDR()
+void tlcs900h_device::op_CPDR()
{
- _CPD();
+ op_CPD();
if ( ( m_sr.b.l & ( FLAG_ZF | FLAG_VF ) ) == FLAG_VF )
{
@@ -1753,7 +1753,7 @@ void tlcs900h_device::_CPDR()
}
-void tlcs900h_device::_CPDW()
+void tlcs900h_device::op_CPDW()
{
uint16_t result = *get_reg16_current( 0 ) - RDMEMW( *m_p2_reg32 );
uint16_t *bc = get_reg16_current( 1 );
@@ -1766,9 +1766,9 @@ void tlcs900h_device::_CPDW()
}
-void tlcs900h_device::_CPDRW()
+void tlcs900h_device::op_CPDRW()
{
- _CPDW();
+ op_CPDW();
if ( ( m_sr.b.l & ( FLAG_ZF | FLAG_VF ) ) == FLAG_VF )
{
@@ -1779,7 +1779,7 @@ void tlcs900h_device::_CPDRW()
}
-void tlcs900h_device::_CPI()
+void tlcs900h_device::op_CPI()
{
uint8_t result = *get_reg8_current( 1 ) - RDMEM( *m_p2_reg32 );
uint16_t *bc = get_reg16_current( 1 );
@@ -1792,9 +1792,9 @@ void tlcs900h_device::_CPI()
}
-void tlcs900h_device::_CPIR()
+void tlcs900h_device::op_CPIR()
{
- _CPI();
+ op_CPI();
if ( ( m_sr.b.l & ( FLAG_ZF | FLAG_VF ) ) == FLAG_VF )
{
@@ -1805,7 +1805,7 @@ void tlcs900h_device::_CPIR()
}
-void tlcs900h_device::_CPIW()
+void tlcs900h_device::op_CPIW()
{
uint16_t result = *get_reg16_current( 0 ) - RDMEMW( *m_p2_reg32 );
uint16_t *bc = get_reg16_current( 1 );
@@ -1818,9 +1818,9 @@ void tlcs900h_device::_CPIW()
}
-void tlcs900h_device::_CPIRW()
+void tlcs900h_device::op_CPIRW()
{
- _CPIW();
+ op_CPIW();
if ( ( m_sr.b.l & ( FLAG_ZF | FLAG_VF ) ) == FLAG_VF )
{
@@ -1831,21 +1831,21 @@ void tlcs900h_device::_CPIRW()
}
-void tlcs900h_device::_CPLBR()
+void tlcs900h_device::op_CPLBR()
{
*m_p1_reg8 = ~ *m_p1_reg8;
m_sr.b.l |= FLAG_HF | FLAG_NF;
}
-void tlcs900h_device::_CPLWR()
+void tlcs900h_device::op_CPLWR()
{
*m_p1_reg16 = ~ *m_p1_reg16;
m_sr.b.l |= FLAG_HF | FLAG_NF;
}
-void tlcs900h_device::_DAABR()
+void tlcs900h_device::op_DAABR()
{
uint8_t oldval = *m_p1_reg8;
uint8_t fixval = 0;
@@ -1907,13 +1907,13 @@ void tlcs900h_device::_DAABR()
}
-void tlcs900h_device::_DB()
+void tlcs900h_device::op_DB()
{
logerror("%08x: invalid or illegal instruction\n", m_pc.d );
}
-void tlcs900h_device::_DECBIM()
+void tlcs900h_device::op_DECBIM()
{
uint8_t cy = m_sr.b.l & FLAG_CF;
@@ -1922,7 +1922,7 @@ void tlcs900h_device::_DECBIM()
}
-void tlcs900h_device::_DECBIR()
+void tlcs900h_device::op_DECBIR()
{
uint8_t cy = m_sr.b.l & FLAG_CF;
@@ -1931,7 +1931,7 @@ void tlcs900h_device::_DECBIR()
}
-void tlcs900h_device::_DECWIM()
+void tlcs900h_device::op_DECWIM()
{
uint8_t cy = m_sr.b.l & FLAG_CF;
@@ -1940,19 +1940,19 @@ void tlcs900h_device::_DECWIM()
}
-void tlcs900h_device::_DECWIR()
+void tlcs900h_device::op_DECWIR()
{
*m_p2_reg16 -= m_imm1.b.l ? m_imm1.b.l : 8;
}
-void tlcs900h_device::_DECLIR()
+void tlcs900h_device::op_DECLIR()
{
*m_p2_reg32 -= m_imm1.b.l ? m_imm1.b.l : 8;
}
-void tlcs900h_device::_DECF()
+void tlcs900h_device::op_DECF()
{
/* 0x03 for MAX mode, 0x07 for MIN mode */
m_sr.b.h = ( m_sr.b.h & 0xf8 ) | ( ( m_sr.b.h - 1 ) & 0x07 );
@@ -1960,79 +1960,79 @@ void tlcs900h_device::_DECF()
}
-void tlcs900h_device::_DIVBRI()
+void tlcs900h_device::op_DIVBRI()
{
*m_p1_reg16 = div8( *m_p1_reg16, m_imm2.b.l );
}
-void tlcs900h_device::_DIVBRM()
+void tlcs900h_device::op_DIVBRM()
{
*m_p1_reg16 = div8( *m_p1_reg16, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_DIVBRR()
+void tlcs900h_device::op_DIVBRR()
{
*m_p1_reg16 = div8( *m_p1_reg16, *m_p2_reg8 );
}
-void tlcs900h_device::_DIVWRI()
+void tlcs900h_device::op_DIVWRI()
{
*m_p1_reg32 = div16( *m_p1_reg32, m_imm2.w.l );
}
-void tlcs900h_device::_DIVWRM()
+void tlcs900h_device::op_DIVWRM()
{
*m_p1_reg32 = div16( *m_p1_reg32, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_DIVWRR()
+void tlcs900h_device::op_DIVWRR()
{
*m_p1_reg32 = div16( *m_p1_reg32, *m_p2_reg16 );
}
-void tlcs900h_device::_DIVSBRI()
+void tlcs900h_device::op_DIVSBRI()
{
*m_p1_reg16 = divs8( *m_p1_reg16, m_imm2.b.l );
}
-void tlcs900h_device::_DIVSBRM()
+void tlcs900h_device::op_DIVSBRM()
{
*m_p1_reg16 = divs8( *m_p1_reg16, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_DIVSBRR()
+void tlcs900h_device::op_DIVSBRR()
{
*m_p1_reg16 = divs8( *m_p1_reg16, *m_p2_reg8 );
}
-void tlcs900h_device::_DIVSWRI()
+void tlcs900h_device::op_DIVSWRI()
{
*m_p1_reg32 = divs16( *m_p1_reg32, m_imm2.w.l );
}
-void tlcs900h_device::_DIVSWRM()
+void tlcs900h_device::op_DIVSWRM()
{
*m_p1_reg32 = divs16( *m_p1_reg32, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_DIVSWRR()
+void tlcs900h_device::op_DIVSWRR()
{
*m_p1_reg32 = divs16( *m_p1_reg32, *m_p2_reg16 );
}
-void tlcs900h_device::_DJNZB()
+void tlcs900h_device::op_DJNZB()
{
*m_p1_reg8 -= 1;
if ( *m_p1_reg8 )
@@ -2044,7 +2044,7 @@ void tlcs900h_device::_DJNZB()
}
-void tlcs900h_device::_DJNZW()
+void tlcs900h_device::op_DJNZW()
{
*m_p1_reg16 -= 1;
if ( *m_p1_reg16 )
@@ -2056,14 +2056,14 @@ void tlcs900h_device::_DJNZW()
}
-void tlcs900h_device::_EI()
+void tlcs900h_device::op_EI()
{
m_sr.b.h = ( m_sr.b.h & 0x8f ) | ( ( m_imm1.b.l & 0x07 ) << 4 );
m_check_irqs = 1;
}
-void tlcs900h_device::_EXBMR()
+void tlcs900h_device::op_EXBMR()
{
uint8_t i = RDMEM( m_ea1.d );
@@ -2072,7 +2072,7 @@ void tlcs900h_device::_EXBMR()
}
-void tlcs900h_device::_EXBRR()
+void tlcs900h_device::op_EXBRR()
{
uint8_t i = *m_p2_reg8;
@@ -2081,7 +2081,7 @@ void tlcs900h_device::_EXBRR()
}
-void tlcs900h_device::_EXWMR()
+void tlcs900h_device::op_EXWMR()
{
uint16_t i = RDMEMW( m_ea1.d );
@@ -2090,7 +2090,7 @@ void tlcs900h_device::_EXWMR()
}
-void tlcs900h_device::_EXWRR()
+void tlcs900h_device::op_EXWRR()
{
uint16_t i = *m_p2_reg16;
@@ -2099,7 +2099,7 @@ void tlcs900h_device::_EXWRR()
}
-void tlcs900h_device::_EXTSWR()
+void tlcs900h_device::op_EXTSWR()
{
if ( *m_p1_reg16 & 0x0080 )
*m_p1_reg16 |= 0xff00;
@@ -2108,7 +2108,7 @@ void tlcs900h_device::_EXTSWR()
}
-void tlcs900h_device::_EXTSLR()
+void tlcs900h_device::op_EXTSLR()
{
if ( *m_p1_reg32 & 0x00008000 )
*m_p1_reg32 |= 0xffff0000;
@@ -2117,25 +2117,25 @@ void tlcs900h_device::_EXTSLR()
}
-void tlcs900h_device::_EXTZWR()
+void tlcs900h_device::op_EXTZWR()
{
*m_p1_reg16 &= 0x00ff;
}
-void tlcs900h_device::_EXTZLR()
+void tlcs900h_device::op_EXTZLR()
{
*m_p1_reg32 &= 0x0000ffff;
}
-void tlcs900h_device::_HALT()
+void tlcs900h_device::op_HALT()
{
m_halted = 1;
}
-void tlcs900h_device::_INCBIM()
+void tlcs900h_device::op_INCBIM()
{
uint8_t cy = m_sr.b.l & FLAG_CF;
@@ -2144,7 +2144,7 @@ void tlcs900h_device::_INCBIM()
}
-void tlcs900h_device::_INCBIR()
+void tlcs900h_device::op_INCBIR()
{
uint8_t cy = m_sr.b.l & FLAG_CF;
@@ -2153,7 +2153,7 @@ void tlcs900h_device::_INCBIR()
}
-void tlcs900h_device::_INCWIM()
+void tlcs900h_device::op_INCWIM()
{
uint8_t cy = m_sr.b.l & FLAG_CF;
@@ -2162,19 +2162,19 @@ void tlcs900h_device::_INCWIM()
}
-void tlcs900h_device::_INCWIR()
+void tlcs900h_device::op_INCWIR()
{
*m_p2_reg16 += m_imm1.b.l ? m_imm1.b.l : 8;
}
-void tlcs900h_device::_INCLIR()
+void tlcs900h_device::op_INCLIR()
{
*m_p2_reg32 += m_imm1.b.l ? m_imm1.b.l : 8;
}
-void tlcs900h_device::_INCF()
+void tlcs900h_device::op_INCF()
{
/* 0x03 for MAX mode, 0x07 for MIN mode */
m_sr.b.h = ( m_sr.b.h & 0xf8 ) | ( ( m_sr.b.h + 1 ) & 0x07 );
@@ -2182,14 +2182,14 @@ void tlcs900h_device::_INCF()
}
-void tlcs900h_device::_JPI()
+void tlcs900h_device::op_JPI()
{
m_pc.d = m_imm1.d;
m_prefetch_clear = true;
}
-void tlcs900h_device::_JPM()
+void tlcs900h_device::op_JPM()
{
if ( condition_true( m_op ) )
{
@@ -2200,7 +2200,7 @@ void tlcs900h_device::_JPM()
}
-void tlcs900h_device::_JR()
+void tlcs900h_device::op_JR()
{
if ( condition_true( m_op ) )
{
@@ -2211,7 +2211,7 @@ void tlcs900h_device::_JR()
}
-void tlcs900h_device::_JRL()
+void tlcs900h_device::op_JRL()
{
if ( condition_true( m_op ) )
{
@@ -2222,169 +2222,169 @@ void tlcs900h_device::_JRL()
}
-void tlcs900h_device::_LDBMI()
+void tlcs900h_device::op_LDBMI()
{
WRMEM( m_ea1.d, m_imm2.b.l );
}
-void tlcs900h_device::_LDBMM()
+void tlcs900h_device::op_LDBMM()
{
WRMEM( m_ea1.d, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_LDBMR()
+void tlcs900h_device::op_LDBMR()
{
WRMEM( m_ea1.d, *m_p2_reg8 );
}
-void tlcs900h_device::_LDBRI()
+void tlcs900h_device::op_LDBRI()
{
*m_p1_reg8 = m_imm2.b.l;
}
-void tlcs900h_device::_LDBRM()
+void tlcs900h_device::op_LDBRM()
{
*m_p1_reg8 = RDMEM( m_ea2.d );
}
-void tlcs900h_device::_LDBRR()
+void tlcs900h_device::op_LDBRR()
{
*m_p1_reg8 = *m_p2_reg8;
}
-void tlcs900h_device::_LDWMI()
+void tlcs900h_device::op_LDWMI()
{
WRMEMW( m_ea1.d, m_imm2.w.l );
}
-void tlcs900h_device::_LDWMM()
+void tlcs900h_device::op_LDWMM()
{
WRMEMW( m_ea1.d, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_LDWMR()
+void tlcs900h_device::op_LDWMR()
{
WRMEMW( m_ea1.d, *m_p2_reg16 );
}
-void tlcs900h_device::_LDWRI()
+void tlcs900h_device::op_LDWRI()
{
*m_p1_reg16 = m_imm2.w.l;
}
-void tlcs900h_device::_LDWRM()
+void tlcs900h_device::op_LDWRM()
{
*m_p1_reg16 = RDMEMW( m_ea2.d );
}
-void tlcs900h_device::_LDWRR()
+void tlcs900h_device::op_LDWRR()
{
*m_p1_reg16 = *m_p2_reg16;
}
-void tlcs900h_device::_LDLRI()
+void tlcs900h_device::op_LDLRI()
{
*m_p1_reg32 = m_imm2.d;
}
-void tlcs900h_device::_LDLRM()
+void tlcs900h_device::op_LDLRM()
{
*m_p1_reg32 = RDMEML( m_ea2.d );
}
-void tlcs900h_device::_LDLRR()
+void tlcs900h_device::op_LDLRR()
{
*m_p1_reg32 = *m_p2_reg32;
}
-void tlcs900h_device::_LDLMR()
+void tlcs900h_device::op_LDLMR()
{
WRMEML( m_ea1.d, *m_p2_reg32 );
}
-void tlcs900h_device::_LDAW()
+void tlcs900h_device::op_LDAW()
{
*m_p1_reg16 = m_ea2.w.l;
}
-void tlcs900h_device::_LDAL()
+void tlcs900h_device::op_LDAL()
{
*m_p1_reg32 = m_ea2.d;
}
-void tlcs900h_device::_LDCBRR()
+void tlcs900h_device::op_LDCBRR()
{
*m_p1_reg8 = *m_p2_reg8;
}
-void tlcs900h_device::_LDCWRR()
+void tlcs900h_device::op_LDCWRR()
{
*m_p1_reg16 = *m_p2_reg16;
}
-void tlcs900h_device::_LDCLRR()
+void tlcs900h_device::op_LDCLRR()
{
*m_p1_reg32 = *m_p2_reg32;
}
-void tlcs900h_device::_LDCFBIM()
+void tlcs900h_device::op_LDCFBIM()
{
ldcf8( m_imm1.b.l, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_LDCFBIR()
+void tlcs900h_device::op_LDCFBIR()
{
ldcf8( m_imm1.b.l, *m_p2_reg8 );
}
-void tlcs900h_device::_LDCFBRM()
+void tlcs900h_device::op_LDCFBRM()
{
ldcf8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_LDCFBRR()
+void tlcs900h_device::op_LDCFBRR()
{
ldcf8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_LDCFWIR()
+void tlcs900h_device::op_LDCFWIR()
{
ldcf16( m_imm1.b.l, *m_p2_reg16 );
}
-void tlcs900h_device::_LDCFWRR()
+void tlcs900h_device::op_LDCFWRR()
{
ldcf16( *m_p1_reg8, *m_p2_reg16 );
}
-void tlcs900h_device::_LDD()
+void tlcs900h_device::op_LDD()
{
uint16_t *bc = get_reg16_current( 1 );
@@ -2400,7 +2400,7 @@ void tlcs900h_device::_LDD()
}
-void tlcs900h_device::_LDDR()
+void tlcs900h_device::op_LDDR()
{
uint16_t *bc = get_reg16_current( 1 );
@@ -2419,7 +2419,7 @@ void tlcs900h_device::_LDDR()
}
-void tlcs900h_device::_LDDRW()
+void tlcs900h_device::op_LDDRW()
{
uint16_t *bc = get_reg16_current( 1 );
@@ -2438,7 +2438,7 @@ void tlcs900h_device::_LDDRW()
}
-void tlcs900h_device::_LDDW()
+void tlcs900h_device::op_LDDW()
{
uint16_t *bc = get_reg16_current( 1 );
@@ -2454,14 +2454,14 @@ void tlcs900h_device::_LDDW()
}
-void tlcs900h_device::_LDF()
+void tlcs900h_device::op_LDF()
{
m_sr.b.h = ( m_sr.b.h & 0xf8 ) | ( m_imm1.b.l & 0x07 );
m_regbank = m_imm1.b.l & 0x03;
}
-void tlcs900h_device::_LDI()
+void tlcs900h_device::op_LDI()
{
uint16_t *bc = get_reg16_current( 1 );
@@ -2477,7 +2477,7 @@ void tlcs900h_device::_LDI()
}
-void tlcs900h_device::_LDIR()
+void tlcs900h_device::op_LDIR()
{
uint16_t *bc = get_reg16_current( 1 );
@@ -2496,7 +2496,7 @@ void tlcs900h_device::_LDIR()
}
-void tlcs900h_device::_LDIRW()
+void tlcs900h_device::op_LDIRW()
{
uint16_t *bc = get_reg16_current( 1 );
@@ -2515,7 +2515,7 @@ void tlcs900h_device::_LDIRW()
}
-void tlcs900h_device::_LDIW()
+void tlcs900h_device::op_LDIW()
{
uint16_t *bc = get_reg16_current( 1 );
@@ -2531,7 +2531,7 @@ void tlcs900h_device::_LDIW()
}
-void tlcs900h_device::_LDX()
+void tlcs900h_device::op_LDX()
{
uint8_t a, b;
@@ -2544,7 +2544,7 @@ void tlcs900h_device::_LDX()
}
-void tlcs900h_device::_LINK()
+void tlcs900h_device::op_LINK()
{
m_xssp.d -= 4;
WRMEML( m_xssp.d, *m_p1_reg32 );
@@ -2553,13 +2553,13 @@ void tlcs900h_device::_LINK()
}
-void tlcs900h_device::_MAX()
+void tlcs900h_device::op_MAX()
{
m_sr.b.h |= 0x04;
}
-void tlcs900h_device::_MDEC1()
+void tlcs900h_device::op_MDEC1()
{
if ( ( *m_p2_reg16 & m_imm1.w.l ) == m_imm1.w.l )
*m_p2_reg16 += m_imm1.w.l;
@@ -2568,7 +2568,7 @@ void tlcs900h_device::_MDEC1()
}
-void tlcs900h_device::_MDEC2()
+void tlcs900h_device::op_MDEC2()
{
if ( ( *m_p2_reg16 & m_imm1.w.l ) == m_imm1.w.l )
*m_p2_reg16 += m_imm1.w.l;
@@ -2577,7 +2577,7 @@ void tlcs900h_device::_MDEC2()
}
-void tlcs900h_device::_MDEC4()
+void tlcs900h_device::op_MDEC4()
{
if ( ( *m_p2_reg16 & m_imm1.w.l ) == m_imm1.w.l )
*m_p2_reg16 += m_imm1.w.l;
@@ -2586,7 +2586,7 @@ void tlcs900h_device::_MDEC4()
}
-void tlcs900h_device::_MINC1()
+void tlcs900h_device::op_MINC1()
{
if ( ( *m_p2_reg16 & m_imm1.w.l ) == m_imm1.w.l )
*m_p2_reg16 -= m_imm1.w.l;
@@ -2595,7 +2595,7 @@ void tlcs900h_device::_MINC1()
}
-void tlcs900h_device::_MINC2()
+void tlcs900h_device::op_MINC2()
{
if ( ( *m_p2_reg16 & m_imm1.w.l ) == m_imm1.w.l )
*m_p2_reg16 -= m_imm1.w.l;
@@ -2604,7 +2604,7 @@ void tlcs900h_device::_MINC2()
}
-void tlcs900h_device::_MINC4()
+void tlcs900h_device::op_MINC4()
{
if ( ( *m_p2_reg16 & m_imm1.w.l ) == m_imm1.w.l )
*m_p2_reg16 -= m_imm1.w.l;
@@ -2613,7 +2613,7 @@ void tlcs900h_device::_MINC4()
}
-void tlcs900h_device::_MIRRW()
+void tlcs900h_device::op_MIRRW()
{
uint16_t r = *m_p1_reg16;
uint16_t s = ( r & 0x01 );
@@ -2631,43 +2631,43 @@ void tlcs900h_device::_MIRRW()
}
-void tlcs900h_device::_MULBRI()
+void tlcs900h_device::op_MULBRI()
{
*m_p1_reg16 = ( *m_p1_reg16 & 0xff ) * m_imm2.b.l;
}
-void tlcs900h_device::_MULBRM()
+void tlcs900h_device::op_MULBRM()
{
*m_p1_reg16 = ( *m_p1_reg16 & 0xff ) * RDMEM( m_ea2.d );
}
-void tlcs900h_device::_MULBRR()
+void tlcs900h_device::op_MULBRR()
{
*m_p1_reg16 = ( *m_p1_reg16 & 0xff ) * *m_p2_reg8;
}
-void tlcs900h_device::_MULWRI()
+void tlcs900h_device::op_MULWRI()
{
*m_p1_reg32 = ( *m_p1_reg32 & 0xffff ) * m_imm2.w.l;
}
-void tlcs900h_device::_MULWRM()
+void tlcs900h_device::op_MULWRM()
{
*m_p1_reg32 = ( *m_p1_reg32 & 0xffff ) * RDMEMW( m_ea2.d );
}
-void tlcs900h_device::_MULWRR()
+void tlcs900h_device::op_MULWRR()
{
*m_p1_reg32 = ( *m_p1_reg32 & 0xffff ) * *m_p2_reg16;
}
-void tlcs900h_device::_MULAR()
+void tlcs900h_device::op_MULAR()
{
uint32_t *xde = get_reg32_current( 2 );
uint32_t *xhl = get_reg32_current( 3 );
@@ -2680,317 +2680,317 @@ void tlcs900h_device::_MULAR()
}
-void tlcs900h_device::_MULSBRI()
+void tlcs900h_device::op_MULSBRI()
{
*m_p1_reg16 = (int8_t)( *m_p1_reg16 & 0xff ) * m_imm2.sb.l;
}
-void tlcs900h_device::_MULSBRM()
+void tlcs900h_device::op_MULSBRM()
{
*m_p1_reg16 = (int8_t)( *m_p1_reg16 & 0xff ) * (int8_t)RDMEM( m_ea2.d );
}
-void tlcs900h_device::_MULSBRR()
+void tlcs900h_device::op_MULSBRR()
{
*m_p1_reg16 = (int8_t)( *m_p1_reg16 & 0xff ) * (int8_t)*m_p2_reg8;
}
-void tlcs900h_device::_MULSWRI()
+void tlcs900h_device::op_MULSWRI()
{
*m_p1_reg32 = (int16_t)( *m_p1_reg32 & 0xffff ) * m_imm2.sw.l;
}
-void tlcs900h_device::_MULSWRM()
+void tlcs900h_device::op_MULSWRM()
{
*m_p1_reg32 = (int16_t)( *m_p1_reg32 & 0xffff ) * (int16_t)RDMEMW( m_ea2.d );
}
-void tlcs900h_device::_MULSWRR()
+void tlcs900h_device::op_MULSWRR()
{
*m_p1_reg32 = (int16_t)( *m_p1_reg32 & 0xffff ) * (int16_t)*m_p2_reg16;
}
-void tlcs900h_device::_NEGBR()
+void tlcs900h_device::op_NEGBR()
{
*m_p1_reg8 = sub8( 0, *m_p1_reg8 );
}
-void tlcs900h_device::_NEGWR()
+void tlcs900h_device::op_NEGWR()
{
*m_p1_reg16 = sub16( 0, *m_p1_reg16 );
}
-void tlcs900h_device::_NOP()
+void tlcs900h_device::op_NOP()
{
/* Do nothing */
}
-void tlcs900h_device::_NORMAL()
+void tlcs900h_device::op_NORMAL()
{
m_sr.b.h &= 0x7F;
}
-void tlcs900h_device::_ORBMI()
+void tlcs900h_device::op_ORBMI()
{
WRMEM( m_ea1.d, or8( RDMEM( m_ea1.d ), m_imm2.b.l ) );
}
-void tlcs900h_device::_ORBMR()
+void tlcs900h_device::op_ORBMR()
{
WRMEM( m_ea1.d, or8( RDMEM( m_ea1.d ), *m_p2_reg8 ) );
}
-void tlcs900h_device::_ORBRI()
+void tlcs900h_device::op_ORBRI()
{
*m_p1_reg8 = or8( *m_p1_reg8, m_imm2.b.l );
}
-void tlcs900h_device::_ORBRM()
+void tlcs900h_device::op_ORBRM()
{
*m_p1_reg8 = or8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_ORBRR()
+void tlcs900h_device::op_ORBRR()
{
*m_p1_reg8 = or8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_ORWMI()
+void tlcs900h_device::op_ORWMI()
{
WRMEMW( m_ea1.d, or16( RDMEMW( m_ea1.d ), m_imm2.w.l ) );
}
-void tlcs900h_device::_ORWMR()
+void tlcs900h_device::op_ORWMR()
{
WRMEMW( m_ea1.d, or16( RDMEMW( m_ea1.d ), *m_p2_reg16 ) );
}
-void tlcs900h_device::_ORWRI()
+void tlcs900h_device::op_ORWRI()
{
*m_p1_reg16 = or16( *m_p1_reg16, m_imm2.w.l );
}
-void tlcs900h_device::_ORWRM()
+void tlcs900h_device::op_ORWRM()
{
*m_p1_reg16 = or16( *m_p1_reg16, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_ORWRR()
+void tlcs900h_device::op_ORWRR()
{
*m_p1_reg16 = or16( *m_p1_reg16, *m_p2_reg16 );
}
-void tlcs900h_device::_ORLMR()
+void tlcs900h_device::op_ORLMR()
{
WRMEML( m_ea1.d, or32( RDMEML( m_ea1.d ), *m_p2_reg32 ) );
}
-void tlcs900h_device::_ORLRI()
+void tlcs900h_device::op_ORLRI()
{
*m_p1_reg32 = or32( *m_p1_reg32, m_imm2.d );
}
-void tlcs900h_device::_ORLRM()
+void tlcs900h_device::op_ORLRM()
{
*m_p1_reg32 = or32( *m_p1_reg32, RDMEML( m_ea2.d ) );
}
-void tlcs900h_device::_ORLRR()
+void tlcs900h_device::op_ORLRR()
{
*m_p1_reg32 = or32( *m_p1_reg32, *m_p2_reg32 );
}
-void tlcs900h_device::_ORCFBIM()
+void tlcs900h_device::op_ORCFBIM()
{
orcf8( m_imm1.b.l, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_ORCFBIR()
+void tlcs900h_device::op_ORCFBIR()
{
orcf8( m_imm1.b.l, *m_p2_reg8 );
}
-void tlcs900h_device::_ORCFBRM()
+void tlcs900h_device::op_ORCFBRM()
{
orcf8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_ORCFBRR()
+void tlcs900h_device::op_ORCFBRR()
{
orcf8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_ORCFWIR()
+void tlcs900h_device::op_ORCFWIR()
{
orcf16( m_imm1.b.l, *m_p2_reg16 );
}
-void tlcs900h_device::_ORCFWRR()
+void tlcs900h_device::op_ORCFWRR()
{
orcf16( *m_p1_reg8, *m_p2_reg16 );
}
-void tlcs900h_device::_PAAWR()
+void tlcs900h_device::op_PAAWR()
{
if ( *m_p1_reg16 & 1 )
*m_p1_reg16 += 1;
}
-void tlcs900h_device::_PAALR()
+void tlcs900h_device::op_PAALR()
{
if ( *m_p1_reg32 & 1 )
*m_p1_reg32 += 1;
}
-void tlcs900h_device::_POPBM()
+void tlcs900h_device::op_POPBM()
{
WRMEM( m_ea1.d, RDMEM( m_xssp.d ) );
m_xssp.d += 1;
}
-void tlcs900h_device::_POPBR()
+void tlcs900h_device::op_POPBR()
{
*m_p1_reg8 = RDMEM( m_xssp.d );
m_xssp.d += 1;
}
-void tlcs900h_device::_POPWM()
+void tlcs900h_device::op_POPWM()
{
WRMEMW( m_ea1.d, RDMEMW( m_xssp.d ) );
m_xssp.d += 2;
}
-void tlcs900h_device::_POPWR()
+void tlcs900h_device::op_POPWR()
{
*m_p1_reg16 = RDMEMW( m_xssp.d );
m_xssp.d += 2;
}
-void tlcs900h_device::_POPWSR()
+void tlcs900h_device::op_POPWSR()
{
- _POPWR();
+ op_POPWR();
m_regbank = m_sr.b.h & 0x03;
m_check_irqs = 1;
}
-void tlcs900h_device::_POPLR()
+void tlcs900h_device::op_POPLR()
{
*m_p1_reg32 = RDMEML( m_xssp.d );
m_xssp.d += 4;
}
-void tlcs900h_device::_PUSHBI()
+void tlcs900h_device::op_PUSHBI()
{
m_xssp.d -= 1;
WRMEM( m_xssp.d, m_imm1.b.l );
}
-void tlcs900h_device::_PUSHBM()
+void tlcs900h_device::op_PUSHBM()
{
m_xssp.d -= 1;
WRMEM( m_xssp.d, RDMEM( m_ea1.d ) );
}
-void tlcs900h_device::_PUSHBR()
+void tlcs900h_device::op_PUSHBR()
{
m_xssp.d -= 1;
WRMEM( m_xssp.d, *m_p1_reg8 );
}
-void tlcs900h_device::_PUSHWI()
+void tlcs900h_device::op_PUSHWI()
{
m_xssp.d -= 2;
WRMEMW( m_xssp.d, m_imm1.w.l );
}
-void tlcs900h_device::_PUSHWM()
+void tlcs900h_device::op_PUSHWM()
{
m_xssp.d -= 2;
WRMEMW( m_xssp.d, RDMEMW( m_ea1.d ) );
}
-void tlcs900h_device::_PUSHWR()
+void tlcs900h_device::op_PUSHWR()
{
m_xssp.d -= 2;
WRMEMW( m_xssp.d, *m_p1_reg16 );
}
-void tlcs900h_device::_PUSHLR()
+void tlcs900h_device::op_PUSHLR()
{
m_xssp.d -= 4;
WRMEML( m_xssp.d, *m_p1_reg32 );
}
-void tlcs900h_device::_RCF()
+void tlcs900h_device::op_RCF()
{
m_sr.b.l &= ~ ( FLAG_HF | FLAG_NF | FLAG_CF );
}
-void tlcs900h_device::_RESBIM()
+void tlcs900h_device::op_RESBIM()
{
WRMEM( m_ea2.d, RDMEM( m_ea2.d ) & ~( 1 << ( m_imm1.d & 0x07 ) ) );
}
-void tlcs900h_device::_RESBIR()
+void tlcs900h_device::op_RESBIR()
{
*m_p2_reg8 = *m_p2_reg8 & ~( 1 << ( m_imm1.d & 0x07 ) );
}
-void tlcs900h_device::_RESWIR()
+void tlcs900h_device::op_RESWIR()
{
*m_p2_reg16 = *m_p2_reg16 & ~( 1 << ( m_imm1.d & 0x0f ) );
}
-void tlcs900h_device::_RET()
+void tlcs900h_device::op_RET()
{
m_pc.d = RDMEML( m_xssp.d );
m_xssp.d += 4;
@@ -2998,7 +2998,7 @@ void tlcs900h_device::_RET()
}
-void tlcs900h_device::_RETCC()
+void tlcs900h_device::op_RETCC()
{
if ( condition_true( m_op ) )
{
@@ -3010,7 +3010,7 @@ void tlcs900h_device::_RETCC()
}
-void tlcs900h_device::_RETD()
+void tlcs900h_device::op_RETD()
{
m_pc.d = RDMEML( m_xssp.d );
m_xssp.d += 4 + m_imm1.sw.l;
@@ -3018,7 +3018,7 @@ void tlcs900h_device::_RETD()
}
-void tlcs900h_device::_RETI()
+void tlcs900h_device::op_RETI()
{
m_sr.w.l = RDMEMW( m_xssp.d );
m_xssp.d += 2;
@@ -3030,103 +3030,103 @@ void tlcs900h_device::_RETI()
}
-void tlcs900h_device::_RLBM()
+void tlcs900h_device::op_RLBM()
{
WRMEM( m_ea2.d, rl8( RDMEM( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_RLWM()
+void tlcs900h_device::op_RLWM()
{
WRMEMW( m_ea2.d, rl16( RDMEMW( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_RLBIR()
+void tlcs900h_device::op_RLBIR()
{
*m_p2_reg8 = rl8( *m_p2_reg8, m_imm1.b.l );
}
-void tlcs900h_device::_RLBRR()
+void tlcs900h_device::op_RLBRR()
{
*m_p2_reg8 = rl8( *m_p2_reg8, *m_p1_reg8 );
}
-void tlcs900h_device::_RLWIR()
+void tlcs900h_device::op_RLWIR()
{
*m_p2_reg16 = rl16( *m_p2_reg16, m_imm1.b.l );
}
-void tlcs900h_device::_RLWRR()
+void tlcs900h_device::op_RLWRR()
{
*m_p2_reg16 = rl16( *m_p2_reg16, *m_p1_reg8 );
}
-void tlcs900h_device::_RLLIR()
+void tlcs900h_device::op_RLLIR()
{
*m_p2_reg32 = rl32( *m_p2_reg32, m_imm1.b.l );
}
-void tlcs900h_device::_RLLRR()
+void tlcs900h_device::op_RLLRR()
{
*m_p2_reg32 = rl32( *m_p2_reg32, *m_p1_reg8 );
}
-void tlcs900h_device::_RLCBM()
+void tlcs900h_device::op_RLCBM()
{
WRMEM( m_ea2.d, rlc8( RDMEM( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_RLCWM()
+void tlcs900h_device::op_RLCWM()
{
WRMEMW( m_ea2.d, rlc16( RDMEMW( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_RLCBIR()
+void tlcs900h_device::op_RLCBIR()
{
*m_p2_reg8 = rlc8( *m_p2_reg8, m_imm1.b.l );
}
-void tlcs900h_device::_RLCBRR()
+void tlcs900h_device::op_RLCBRR()
{
*m_p2_reg8 = rlc8( *m_p2_reg8, *m_p1_reg8 );
}
-void tlcs900h_device::_RLCWIR()
+void tlcs900h_device::op_RLCWIR()
{
*m_p2_reg16 = rlc16( *m_p2_reg16, m_imm1.b.l );
}
-void tlcs900h_device::_RLCWRR()
+void tlcs900h_device::op_RLCWRR()
{
*m_p2_reg16 = rlc16( *m_p2_reg16, *m_p1_reg8 );
}
-void tlcs900h_device::_RLCLIR()
+void tlcs900h_device::op_RLCLIR()
{
*m_p2_reg32 = rlc32( *m_p2_reg32, m_imm1.b.l );
}
-void tlcs900h_device::_RLCLRR()
+void tlcs900h_device::op_RLCLRR()
{
*m_p2_reg32 = rlc32( *m_p2_reg32, *m_p1_reg8 );
}
-void tlcs900h_device::_RLDRM()
+void tlcs900h_device::op_RLDRM()
{
uint8_t a = *m_p1_reg8 & 0x0f;
uint8_t b = RDMEM( m_ea2.d );
@@ -3139,103 +3139,103 @@ void tlcs900h_device::_RLDRM()
}
-void tlcs900h_device::_RRBM()
+void tlcs900h_device::op_RRBM()
{
WRMEM( m_ea2.d, rr8( RDMEM( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_RRWM()
+void tlcs900h_device::op_RRWM()
{
WRMEMW( m_ea2.d, rr16( RDMEMW( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_RRBIR()
+void tlcs900h_device::op_RRBIR()
{
*m_p2_reg8 = rr8( *m_p2_reg8, m_imm1.b.l );
}
-void tlcs900h_device::_RRBRR()
+void tlcs900h_device::op_RRBRR()
{
*m_p2_reg8 = rr8( *m_p2_reg8, *m_p1_reg8 );
}
-void tlcs900h_device::_RRWIR()
+void tlcs900h_device::op_RRWIR()
{
*m_p2_reg16 = rr16( *m_p2_reg16, m_imm1.b.l );
}
-void tlcs900h_device::_RRWRR()
+void tlcs900h_device::op_RRWRR()
{
*m_p2_reg16 = rr16( *m_p2_reg16, *m_p1_reg8 );
}
-void tlcs900h_device::_RRLIR()
+void tlcs900h_device::op_RRLIR()
{
*m_p2_reg32 = rr32( *m_p2_reg32, m_imm1.b.l );
}
-void tlcs900h_device::_RRLRR()
+void tlcs900h_device::op_RRLRR()
{
*m_p2_reg32 = rr32( *m_p2_reg32, *m_p1_reg8 );
}
-void tlcs900h_device::_RRCBM()
+void tlcs900h_device::op_RRCBM()
{
WRMEM( m_ea2.d, rrc8( RDMEM( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_RRCWM()
+void tlcs900h_device::op_RRCWM()
{
WRMEMW( m_ea2.d, rrc16( RDMEMW( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_RRCBIR()
+void tlcs900h_device::op_RRCBIR()
{
*m_p2_reg8 = rrc8( *m_p2_reg8, m_imm1.b.l );
}
-void tlcs900h_device::_RRCBRR()
+void tlcs900h_device::op_RRCBRR()
{
*m_p2_reg8 = rrc8( *m_p2_reg8, *m_p1_reg8 );
}
-void tlcs900h_device::_RRCWIR()
+void tlcs900h_device::op_RRCWIR()
{
*m_p2_reg16 = rrc16( *m_p2_reg16, m_imm1.b.l );
}
-void tlcs900h_device::_RRCWRR()
+void tlcs900h_device::op_RRCWRR()
{
*m_p2_reg16 = rrc16( *m_p2_reg16, *m_p1_reg8 );
}
-void tlcs900h_device::_RRCLIR()
+void tlcs900h_device::op_RRCLIR()
{
*m_p2_reg32 = rrc32( *m_p2_reg32, m_imm1.b.l );
}
-void tlcs900h_device::_RRCLRR()
+void tlcs900h_device::op_RRCLRR()
{
*m_p2_reg32 = rrc32( *m_p2_reg32, *m_p1_reg8 );
}
-void tlcs900h_device::_RRDRM()
+void tlcs900h_device::op_RRDRM()
{
uint8_t a = *m_p1_reg8 & 0x0f;
uint8_t b = RDMEM( m_ea2.d );
@@ -3248,320 +3248,320 @@ void tlcs900h_device::_RRDRM()
}
-void tlcs900h_device::_SBCBMI()
+void tlcs900h_device::op_SBCBMI()
{
WRMEM( m_ea1.d, sbc8( RDMEM( m_ea1.d ), m_imm2.b.l ) );
}
-void tlcs900h_device::_SBCBMR()
+void tlcs900h_device::op_SBCBMR()
{
WRMEM( m_ea1.d, sbc8( RDMEM( m_ea1.d ), *m_p2_reg8 ) );
}
-void tlcs900h_device::_SBCBRI()
+void tlcs900h_device::op_SBCBRI()
{
*m_p1_reg8 = sbc8( *m_p1_reg8, m_imm2.b.l );
}
-void tlcs900h_device::_SBCBRM()
+void tlcs900h_device::op_SBCBRM()
{
*m_p1_reg8 = sbc8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_SBCBRR()
+void tlcs900h_device::op_SBCBRR()
{
*m_p1_reg8 = sbc8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_SBCWMI()
+void tlcs900h_device::op_SBCWMI()
{
WRMEMW( m_ea1.d, sbc16( RDMEMW( m_ea1.d ), m_imm2.w.l ) );
}
-void tlcs900h_device::_SBCWMR()
+void tlcs900h_device::op_SBCWMR()
{
WRMEMW( m_ea1.d, sbc16( RDMEMW( m_ea1.d ), *m_p2_reg16 ) );
}
-void tlcs900h_device::_SBCWRI()
+void tlcs900h_device::op_SBCWRI()
{
*m_p1_reg16 = sbc16( *m_p1_reg16, m_imm2.w.l );
}
-void tlcs900h_device::_SBCWRM()
+void tlcs900h_device::op_SBCWRM()
{
*m_p1_reg16 = sbc16( *m_p1_reg16, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_SBCWRR()
+void tlcs900h_device::op_SBCWRR()
{
*m_p1_reg16 = sbc16( *m_p1_reg16, *m_p2_reg16 );
}
-void tlcs900h_device::_SBCLMR()
+void tlcs900h_device::op_SBCLMR()
{
WRMEML( m_ea1.d, sbc32( RDMEML( m_ea1.d ), *m_p2_reg32 ) );
}
-void tlcs900h_device::_SBCLRI()
+void tlcs900h_device::op_SBCLRI()
{
*m_p1_reg32 = sbc32( *m_p1_reg32, m_imm2.d );
}
-void tlcs900h_device::_SBCLRM()
+void tlcs900h_device::op_SBCLRM()
{
*m_p1_reg32 = sbc32( *m_p1_reg32, RDMEML( m_ea2.d ) );
}
-void tlcs900h_device::_SBCLRR()
+void tlcs900h_device::op_SBCLRR()
{
*m_p1_reg32 = sbc32( *m_p1_reg32, *m_p2_reg32 );
}
-void tlcs900h_device::_SCCBR()
+void tlcs900h_device::op_SCCBR()
{
*m_p2_reg8 = condition_true( m_op ) ? 1 : 0;
}
-void tlcs900h_device::_SCCWR()
+void tlcs900h_device::op_SCCWR()
{
*m_p2_reg16 = condition_true( m_op ) ? 1 : 0;
}
-void tlcs900h_device::_SCF()
+void tlcs900h_device::op_SCF()
{
m_sr.b.l &= ~ ( FLAG_HF | FLAG_NF );
m_sr.b.l |= FLAG_CF;
}
-void tlcs900h_device::_SETBIM()
+void tlcs900h_device::op_SETBIM()
{
WRMEM( m_ea2.d, RDMEM( m_ea2.d ) | ( 1 << ( m_imm1.d & 0x07 ) ) );
}
-void tlcs900h_device::_SETBIR()
+void tlcs900h_device::op_SETBIR()
{
*m_p2_reg8 = *m_p2_reg8 | ( 1 << ( m_imm1.d & 0x07 ) );
}
-void tlcs900h_device::_SETWIR()
+void tlcs900h_device::op_SETWIR()
{
*m_p2_reg16 = *m_p2_reg16 | ( 1 << ( m_imm1.d & 0x0f ) );
}
-void tlcs900h_device::_SLABM()
+void tlcs900h_device::op_SLABM()
{
WRMEM( m_ea2.d, sla8( RDMEM( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_SLAWM()
+void tlcs900h_device::op_SLAWM()
{
WRMEMW( m_ea2.d, sla16( RDMEMW( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_SLABIR()
+void tlcs900h_device::op_SLABIR()
{
*m_p2_reg8 = sla8( *m_p2_reg8, m_imm1.b.l );
}
-void tlcs900h_device::_SLABRR()
+void tlcs900h_device::op_SLABRR()
{
*m_p2_reg8 = sla8( *m_p2_reg8, *m_p1_reg8 );
}
-void tlcs900h_device::_SLAWIR()
+void tlcs900h_device::op_SLAWIR()
{
*m_p2_reg16 = sla16( *m_p2_reg16, m_imm1.b.l );
}
-void tlcs900h_device::_SLAWRR()
+void tlcs900h_device::op_SLAWRR()
{
*m_p2_reg16 = sla16( *m_p2_reg16, *m_p1_reg8 );
}
-void tlcs900h_device::_SLALIR()
+void tlcs900h_device::op_SLALIR()
{
*m_p2_reg32 = sla32( *m_p2_reg32, m_imm1.b.l );
}
-void tlcs900h_device::_SLALRR()
+void tlcs900h_device::op_SLALRR()
{
*m_p2_reg32 = sla32( *m_p2_reg32, *m_p1_reg8 );
}
-void tlcs900h_device::_SLLBM()
+void tlcs900h_device::op_SLLBM()
{
WRMEM( m_ea2.d, sla8( RDMEM( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_SLLWM()
+void tlcs900h_device::op_SLLWM()
{
WRMEMW( m_ea2.d, sla16( RDMEMW( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_SLLBIR()
+void tlcs900h_device::op_SLLBIR()
{
*m_p2_reg8 = sla8( *m_p2_reg8, m_imm1.b.l );
}
-void tlcs900h_device::_SLLBRR()
+void tlcs900h_device::op_SLLBRR()
{
*m_p2_reg8 = sla8( *m_p2_reg8, *m_p1_reg8 );
}
-void tlcs900h_device::_SLLWIR()
+void tlcs900h_device::op_SLLWIR()
{
*m_p2_reg16 = sla16( *m_p2_reg16, m_imm1.b.l );
}
-void tlcs900h_device::_SLLWRR()
+void tlcs900h_device::op_SLLWRR()
{
*m_p2_reg16 = sla16( *m_p2_reg16, *m_p1_reg8 );
}
-void tlcs900h_device::_SLLLIR()
+void tlcs900h_device::op_SLLLIR()
{
*m_p2_reg32 = sla32( *m_p2_reg32, m_imm1.b.l );
}
-void tlcs900h_device::_SLLLRR()
+void tlcs900h_device::op_SLLLRR()
{
*m_p2_reg32 = sla32( *m_p2_reg32, *m_p1_reg8 );
}
-void tlcs900h_device::_SRABM()
+void tlcs900h_device::op_SRABM()
{
WRMEM( m_ea2.d, sra8( RDMEM( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_SRAWM()
+void tlcs900h_device::op_SRAWM()
{
WRMEMW( m_ea2.d, sra16( RDMEMW( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_SRABIR()
+void tlcs900h_device::op_SRABIR()
{
*m_p2_reg8 = sra8( *m_p2_reg8, m_imm1.b.l );
}
-void tlcs900h_device::_SRABRR()
+void tlcs900h_device::op_SRABRR()
{
*m_p2_reg8 = sra8( *m_p2_reg8, *m_p1_reg8 );
}
-void tlcs900h_device::_SRAWIR()
+void tlcs900h_device::op_SRAWIR()
{
*m_p2_reg16 = sra16( *m_p2_reg16, m_imm1.b.l );
}
-void tlcs900h_device::_SRAWRR()
+void tlcs900h_device::op_SRAWRR()
{
*m_p2_reg16 = sra16( *m_p2_reg16, *m_p1_reg8 );
}
-void tlcs900h_device::_SRALIR()
+void tlcs900h_device::op_SRALIR()
{
*m_p2_reg32 = sra32( *m_p2_reg32, m_imm1.b.l );
}
-void tlcs900h_device::_SRALRR()
+void tlcs900h_device::op_SRALRR()
{
*m_p2_reg32 = sra32( *m_p2_reg32, *m_p1_reg8 );
}
-void tlcs900h_device::_SRLBM()
+void tlcs900h_device::op_SRLBM()
{
WRMEM( m_ea2.d, srl8( RDMEM( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_SRLWM()
+void tlcs900h_device::op_SRLWM()
{
WRMEMW( m_ea2.d, srl16( RDMEMW( m_ea2.d ), 1 ) );
}
-void tlcs900h_device::_SRLBIR()
+void tlcs900h_device::op_SRLBIR()
{
*m_p2_reg8 = srl8( *m_p2_reg8, m_imm1.b.l );
}
-void tlcs900h_device::_SRLBRR()
+void tlcs900h_device::op_SRLBRR()
{
*m_p2_reg8 = srl8( *m_p2_reg8, *m_p1_reg8 );
}
-void tlcs900h_device::_SRLWIR()
+void tlcs900h_device::op_SRLWIR()
{
*m_p2_reg16 = srl16( *m_p2_reg16, m_imm1.b.l );
}
-void tlcs900h_device::_SRLWRR()
+void tlcs900h_device::op_SRLWRR()
{
*m_p2_reg16 = srl16( *m_p2_reg16, *m_p1_reg8 );
}
-void tlcs900h_device::_SRLLIR()
+void tlcs900h_device::op_SRLLIR()
{
*m_p2_reg32 = srl32( *m_p2_reg32, m_imm1.b.l );
}
-void tlcs900h_device::_SRLLRR()
+void tlcs900h_device::op_SRLLRR()
{
*m_p2_reg32 = srl32( *m_p2_reg32, *m_p1_reg8 );
}
-void tlcs900h_device::_STCFBIM()
+void tlcs900h_device::op_STCFBIM()
{
if ( m_sr.b.l & FLAG_CF )
WRMEM( m_ea2.d, RDMEM( m_ea2.d ) | ( 1 << ( m_imm1.b.l & 0x07 ) ) );
@@ -3570,7 +3570,7 @@ void tlcs900h_device::_STCFBIM()
}
-void tlcs900h_device::_STCFBIR()
+void tlcs900h_device::op_STCFBIR()
{
if ( m_sr.b.l & FLAG_CF )
*m_p2_reg8 |= ( 1 << ( m_imm1.b.l & 0x07 ) );
@@ -3579,7 +3579,7 @@ void tlcs900h_device::_STCFBIR()
}
-void tlcs900h_device::_STCFBRM()
+void tlcs900h_device::op_STCFBRM()
{
if ( m_sr.b.l & FLAG_CF )
WRMEM( m_ea2.d, RDMEM( m_ea2.d ) | ( 1 << ( *m_p1_reg8 & 0x07 ) ) );
@@ -3588,7 +3588,7 @@ void tlcs900h_device::_STCFBRM()
}
-void tlcs900h_device::_STCFBRR()
+void tlcs900h_device::op_STCFBRR()
{
if ( m_sr.b.l & FLAG_CF )
*m_p2_reg8 |= ( 1 << ( *m_p1_reg8 & 0x07 ) );
@@ -3597,7 +3597,7 @@ void tlcs900h_device::_STCFBRR()
}
-void tlcs900h_device::_STCFWIR()
+void tlcs900h_device::op_STCFWIR()
{
if ( m_sr.b.l & FLAG_CF )
*m_p2_reg16 |= ( 1 << ( m_imm1.b.l & 0x0f ) );
@@ -3606,7 +3606,7 @@ void tlcs900h_device::_STCFWIR()
}
-void tlcs900h_device::_STCFWRR()
+void tlcs900h_device::op_STCFWRR()
{
if ( m_sr.b.l & FLAG_CF )
*m_p2_reg16 |= ( 1 << ( *m_p1_reg8 & 0x0f ) );
@@ -3615,91 +3615,91 @@ void tlcs900h_device::_STCFWRR()
}
-void tlcs900h_device::_SUBBMI()
+void tlcs900h_device::op_SUBBMI()
{
WRMEM( m_ea1.d, sub8( RDMEM( m_ea1.d ), m_imm2.b.l ) );
}
-void tlcs900h_device::_SUBBMR()
+void tlcs900h_device::op_SUBBMR()
{
WRMEM( m_ea1.d, sub8( RDMEM( m_ea1.d ), *m_p2_reg8 ) );
}
-void tlcs900h_device::_SUBBRI()
+void tlcs900h_device::op_SUBBRI()
{
*m_p1_reg8 = sub8( *m_p1_reg8, m_imm2.b.l );
}
-void tlcs900h_device::_SUBBRM()
+void tlcs900h_device::op_SUBBRM()
{
*m_p1_reg8 = sub8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_SUBBRR()
+void tlcs900h_device::op_SUBBRR()
{
*m_p1_reg8 = sub8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_SUBWMI()
+void tlcs900h_device::op_SUBWMI()
{
WRMEMW( m_ea1.d, sub16( RDMEMW( m_ea1.d ), m_imm2.w.l ) );
}
-void tlcs900h_device::_SUBWMR()
+void tlcs900h_device::op_SUBWMR()
{
WRMEMW( m_ea1.d, sub16( RDMEMW( m_ea1.d ), *m_p2_reg16 ) );
}
-void tlcs900h_device::_SUBWRI()
+void tlcs900h_device::op_SUBWRI()
{
*m_p1_reg16 = sub16( *m_p1_reg16, m_imm2.w.l );
}
-void tlcs900h_device::_SUBWRM()
+void tlcs900h_device::op_SUBWRM()
{
*m_p1_reg16 = sub16( *m_p1_reg16, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_SUBWRR()
+void tlcs900h_device::op_SUBWRR()
{
*m_p1_reg16 = sub16( *m_p1_reg16, *m_p2_reg16 );
}
-void tlcs900h_device::_SUBLMR()
+void tlcs900h_device::op_SUBLMR()
{
WRMEML( m_ea1.d, sub32( RDMEML( m_ea1.d ), *m_p2_reg32 ) );
}
-void tlcs900h_device::_SUBLRI()
+void tlcs900h_device::op_SUBLRI()
{
*m_p1_reg32 = sub32( *m_p1_reg32, m_imm2.d );
}
-void tlcs900h_device::_SUBLRM()
+void tlcs900h_device::op_SUBLRM()
{
*m_p1_reg32 = sub32( *m_p1_reg32, RDMEML( m_ea2.d ) );
}
-void tlcs900h_device::_SUBLRR()
+void tlcs900h_device::op_SUBLRR()
{
*m_p1_reg32 = sub32( *m_p1_reg32, *m_p2_reg32 );
}
-void tlcs900h_device::_SWI()
+void tlcs900h_device::op_SWI()
{
m_xssp.d -= 4;
WRMEML( m_xssp.d, m_pc.d );
@@ -3710,7 +3710,7 @@ void tlcs900h_device::_SWI()
}
-void tlcs900h_device::_TSETBIM()
+void tlcs900h_device::op_TSETBIM()
{
uint8_t b = 1 << ( m_imm1.b.l & 0x07 );
uint8_t a = RDMEM( m_ea2.d );
@@ -3721,7 +3721,7 @@ void tlcs900h_device::_TSETBIM()
}
-void tlcs900h_device::_TSETBIR()
+void tlcs900h_device::op_TSETBIR()
{
uint8_t b = 1 << ( m_imm1.b.l & 0x07 );
@@ -3731,7 +3731,7 @@ void tlcs900h_device::_TSETBIR()
}
-void tlcs900h_device::_TSETWIR()
+void tlcs900h_device::op_TSETWIR()
{
uint16_t b = 1 << ( m_imm1.b.l & 0x0f );
@@ -3741,7 +3741,7 @@ void tlcs900h_device::_TSETWIR()
}
-void tlcs900h_device::_UNLK()
+void tlcs900h_device::op_UNLK()
{
m_xssp.d = *m_p1_reg32;
*m_p1_reg32 = RDMEML( m_xssp.d );
@@ -3749,127 +3749,127 @@ void tlcs900h_device::_UNLK()
}
-void tlcs900h_device::_XORBMI()
+void tlcs900h_device::op_XORBMI()
{
WRMEM( m_ea1.d, xor8( RDMEM( m_ea1.d ), m_imm2.b.l ) );
}
-void tlcs900h_device::_XORBMR()
+void tlcs900h_device::op_XORBMR()
{
WRMEM( m_ea1.d, xor8( RDMEM( m_ea1.d ), *m_p2_reg8 ) );
}
-void tlcs900h_device::_XORBRI()
+void tlcs900h_device::op_XORBRI()
{
*m_p1_reg8 = xor8( *m_p1_reg8, m_imm2.b.l );
}
-void tlcs900h_device::_XORBRM()
+void tlcs900h_device::op_XORBRM()
{
*m_p1_reg8 = xor8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_XORBRR()
+void tlcs900h_device::op_XORBRR()
{
*m_p1_reg8 = xor8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_XORWMI()
+void tlcs900h_device::op_XORWMI()
{
WRMEMW( m_ea1.d, xor16( RDMEMW( m_ea1.d ), m_imm2.w.l ) );
}
-void tlcs900h_device::_XORWMR()
+void tlcs900h_device::op_XORWMR()
{
WRMEMW( m_ea1.d, xor16( RDMEMW( m_ea1.d ), *m_p2_reg16 ) );
}
-void tlcs900h_device::_XORWRI()
+void tlcs900h_device::op_XORWRI()
{
*m_p1_reg16 = xor16( *m_p1_reg16, m_imm2.w.l );
}
-void tlcs900h_device::_XORWRM()
+void tlcs900h_device::op_XORWRM()
{
*m_p1_reg16 = xor16( *m_p1_reg16, RDMEMW( m_ea2.d ) );
}
-void tlcs900h_device::_XORWRR()
+void tlcs900h_device::op_XORWRR()
{
*m_p1_reg16 = xor16( *m_p1_reg16, *m_p2_reg16 );
}
-void tlcs900h_device::_XORLMR()
+void tlcs900h_device::op_XORLMR()
{
WRMEML( m_ea1.d, xor32( RDMEML( m_ea1.d ), *m_p2_reg32 ) );
}
-void tlcs900h_device::_XORLRI()
+void tlcs900h_device::op_XORLRI()
{
*m_p1_reg32 = xor32( *m_p1_reg32, m_imm2.d );
}
-void tlcs900h_device::_XORLRM()
+void tlcs900h_device::op_XORLRM()
{
*m_p1_reg32 = xor32( *m_p1_reg32, RDMEML( m_ea2.d ) );
}
-void tlcs900h_device::_XORLRR()
+void tlcs900h_device::op_XORLRR()
{
*m_p1_reg32 = xor32( *m_p1_reg32, *m_p2_reg32 );
}
-void tlcs900h_device::_XORCFBIM()
+void tlcs900h_device::op_XORCFBIM()
{
xorcf8( m_imm1.b.l, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_XORCFBIR()
+void tlcs900h_device::op_XORCFBIR()
{
xorcf8( m_imm1.b.l, *m_p2_reg8 );
}
-void tlcs900h_device::_XORCFBRM()
+void tlcs900h_device::op_XORCFBRM()
{
xorcf8( *m_p1_reg8, RDMEM( m_ea2.d ) );
}
-void tlcs900h_device::_XORCFBRR()
+void tlcs900h_device::op_XORCFBRR()
{
xorcf8( *m_p1_reg8, *m_p2_reg8 );
}
-void tlcs900h_device::_XORCFWIR()
+void tlcs900h_device::op_XORCFWIR()
{
xorcf16( m_imm1.b.l, *m_p2_reg16 );
}
-void tlcs900h_device::_XORCFWRR()
+void tlcs900h_device::op_XORCFWRR()
{
xorcf16( *m_p1_reg8, *m_p2_reg16 );
}
-void tlcs900h_device::_ZCF()
+void tlcs900h_device::op_ZCF()
{
m_sr.b.l &= ~ ( FLAG_NF | FLAG_CF );
m_sr.b.l |= ( ( m_sr.b.l & FLAG_ZF ) ? 0 : FLAG_CF );
@@ -3880,28 +3880,28 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
{
switch ( inst->operand1 )
{
- case _A:
+ case p_A:
m_p1_reg8 = &m_xwa[m_regbank].b.l;
break;
- case _F:
+ case p_F:
m_p1_reg8 = &m_sr.b.l;
break;
- case _SR:
+ case p_SR:
m_p1_reg16 = &m_sr.w.l;
break;
- case _C8:
+ case p_C8:
m_p1_reg8 = get_reg8_current( m_op );
break;
- case _C16:
+ case p_C16:
m_p1_reg16 = get_reg16_current( m_op );
break;
- case _MC16: /* For MUL and DIV operations */
+ case p_MC16: /* For MUL and DIV operations */
m_p1_reg16 = get_reg16_current( ( m_op >> 1 ) & 0x03 );
break;
- case _C32:
+ case p_C32:
m_p1_reg32 = get_reg32_current( m_op );
break;
- case _CR8:
+ case p_CR8:
m_imm1.d = RDOP();
switch( m_imm1.d )
{
@@ -3922,7 +3922,7 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
break;
}
break;
- case _CR16:
+ case p_CR16:
m_imm1.d = RDOP();
switch( m_imm1.d )
{
@@ -3943,7 +3943,7 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
break;
}
break;
- case _CR32:
+ case p_CR32:
m_imm1.d = RDOP();
switch( m_imm1.d )
{
@@ -3976,47 +3976,47 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
break;
}
break;
- case _D8:
+ case p_D8:
m_ea1.d = RDOP();
m_ea1.d = m_pc.d + m_ea1.sb.l;
break;
- case _D16:
+ case p_D16:
m_ea1.d = RDOP();
m_ea1.b.h = RDOP();
m_ea1.d = m_pc.d + m_ea1.sw.l;
break;
- case _I3:
+ case p_I3:
m_imm1.d = m_op & 0x07;
break;
- case _I8:
+ case p_I8:
m_imm1.d = RDOP();
break;
- case _I16:
+ case p_I16:
m_imm1.d = RDOP();
m_imm1.b.h = RDOP();
break;
- case _I24:
+ case p_I24:
m_imm1.d = RDOP();
m_imm1.b.h = RDOP();
m_imm1.b.h2 = RDOP();
break;
- case _I32:
+ case p_I32:
m_imm1.d = RDOP();
m_imm1.b.h = RDOP();
m_imm1.b.h2 = RDOP();
m_imm1.b.h3 = RDOP();
break;
- case _M:
+ case p_M:
m_ea1.d = m_ea2.d;
break;
- case _M8:
+ case p_M8:
m_ea1.d = RDOP();
break;
- case _M16:
+ case p_M16:
m_ea1.d = RDOP();
m_ea1.b.h = RDOP();
break;
- case _R:
+ case p_R:
m_p1_reg8 = m_p2_reg8;
m_p1_reg16 = m_p2_reg16;
m_p1_reg32 = m_p2_reg32;
@@ -4025,25 +4025,25 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
switch ( inst->operand2 )
{
- case _A:
+ case p_A:
m_p2_reg8 = &m_xwa[m_regbank].b.l;
break;
- case _F: /* F' */
+ case p_F: /* F' */
m_p2_reg8 = &m_f2.b.l;
break;
- case _SR:
+ case p_SR:
m_p2_reg16 = &m_sr.w.l;
break;
- case _C8:
+ case p_C8:
m_p2_reg8 = get_reg8_current( m_op );
break;
- case _C16:
+ case p_C16:
m_p2_reg16 = get_reg16_current( m_op );
break;
- case _C32:
+ case p_C32:
m_p2_reg32 = get_reg32_current( m_op );
break;
- case _CR8:
+ case p_CR8:
m_imm1.d = RDOP();
switch( m_imm1.d )
{
@@ -4064,7 +4064,7 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
break;
}
break;
- case _CR16:
+ case p_CR16:
m_imm1.d = RDOP();
switch( m_imm1.d )
{
@@ -4085,7 +4085,7 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
break;
}
break;
- case _CR32:
+ case p_CR32:
m_imm1.d = RDOP();
switch( m_imm1.d )
{
@@ -4118,35 +4118,35 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
break;
}
break;
- case _D8:
+ case p_D8:
m_ea2.d = RDOP();
m_ea2.d = m_pc.d + m_ea2.sb.l;
break;
- case _D16:
+ case p_D16:
m_ea2.d = RDOP();
m_ea2.b.h = RDOP();
m_ea2.d = m_pc.d + m_ea2.sw.l;
break;
- case _I3:
+ case p_I3:
m_imm2.d = m_op & 0x07;
break;
- case _I8:
+ case p_I8:
m_imm2.d = RDOP();
break;
- case _I16:
+ case p_I16:
m_imm2.d = RDOP();
m_imm2.b.h = RDOP();
break;
- case _I32:
+ case p_I32:
m_imm2.d = RDOP();
m_imm2.b.h = RDOP();
m_imm2.b.h2 = RDOP();
m_imm2.b.h3 = RDOP();
break;
- case _M8:
+ case p_M8:
m_ea2.d = RDOP();
break;
- case _M16:
+ case p_M16:
m_ea2.d = RDOP();
m_ea2.b.h = RDOP();
break;
@@ -4157,1181 +4157,1181 @@ void tlcs900h_device::prepare_operands(const tlcs900inst *inst)
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_80[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_PUSHBM, _M, 0, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_RLDRM, _A, _M, 12 }, { &tlcs900h_device::_RRDRM, _A, _M, 12 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDI, 0, 0, 10 }, { &tlcs900h_device::_LDIR, 0, 0, 10 }, { &tlcs900h_device::_LDD, 0, 0, 10 }, { &tlcs900h_device::_LDDR, 0, 0, 10 },
- { &tlcs900h_device::_CPI, 0, 0, 8 }, { &tlcs900h_device::_CPIR, 0, 0, 10 }, { &tlcs900h_device::_CPD, 0, 0, 8 }, { &tlcs900h_device::_CPDR, 0, 0, 10 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDBMM, _M16, _M, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_PUSHBM, p_M, 0, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_RLDRM, p_A, p_M, 12 }, { &tlcs900h_device::op_RRDRM, p_A, p_M, 12 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDI, 0, 0, 10 }, { &tlcs900h_device::op_LDIR, 0, 0, 10 }, { &tlcs900h_device::op_LDD, 0, 0, 10 }, { &tlcs900h_device::op_LDDR, 0, 0, 10 },
+ { &tlcs900h_device::op_CPI, 0, 0, 8 }, { &tlcs900h_device::op_CPIR, 0, 0, 10 }, { &tlcs900h_device::op_CPD, 0, 0, 8 }, { &tlcs900h_device::op_CPDR, 0, 0, 10 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDBMM, p_M16, p_M, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 },
- { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADDBMI, _M, _I8, 7 }, { &tlcs900h_device::_ADCBMI, _M, _I8, 7 }, { &tlcs900h_device::_SUBBMI, _M, _I8, 7 }, { &tlcs900h_device::_SBCBMI, _M, _I8, 7 },
- { &tlcs900h_device::_ANDBMI, _M, _I8, 7 }, { &tlcs900h_device::_XORBMI, _M, _I8, 7 }, { &tlcs900h_device::_ORBMI, _M, _I8, 7 }, { &tlcs900h_device::_CPBMI, _M, _I8, 6 },
+ { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADDBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_ADCBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_SUBBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_SBCBMI, p_M, p_I8, 7 },
+ { &tlcs900h_device::op_ANDBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_XORBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_ORBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_CPBMI, p_M, p_I8, 6 },
/* 40 - 5F */
- { &tlcs900h_device::_MULBRM, _MC16, _M, 18}, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULBRM, _MC16, _M, 18}, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 },
- { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 },
- { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 },
- { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 },
+ { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18}, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18}, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 },
+ { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 },
+ { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 },
+ { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 },
/* 60 - 7F */
- { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 },
- { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_RLCBM, _M, 0, 8 }, { &tlcs900h_device::_RRCBM, _M, 0, 8 }, { &tlcs900h_device::_RLBM, _M, 0, 8 }, { &tlcs900h_device::_RRBM, _M, 0, 8 },
- { &tlcs900h_device::_SLABM, _M, 0, 8 }, { &tlcs900h_device::_SRABM, _M, 0, 8 }, { &tlcs900h_device::_SLLBM, _M, 0, 8 }, { &tlcs900h_device::_SRLBM, _M, 0, 8 },
+ { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_RLCBM, p_M, 0, 8 }, { &tlcs900h_device::op_RRCBM, p_M, 0, 8 }, { &tlcs900h_device::op_RLBM, p_M, 0, 8 }, { &tlcs900h_device::op_RRBM, p_M, 0, 8 },
+ { &tlcs900h_device::op_SLABM, p_M, 0, 8 }, { &tlcs900h_device::op_SRABM, p_M, 0, 8 }, { &tlcs900h_device::op_SLLBM, p_M, 0, 8 }, { &tlcs900h_device::op_SRLBM, p_M, 0, 8 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 },
/* A0 - BF */
- { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 },
/* C0 - DF */
- { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 },
/* E0 - FF */
- { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 },
- { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 },
- { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 },
- { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 },
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_88[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_PUSHBM, _M, 0, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_RLDRM, _A, _M, 12 }, { &tlcs900h_device::_RRDRM, _A, _M, 12 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDBMM, _M16, _M, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_PUSHBM, p_M, 0, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_RLDRM, p_A, p_M, 12 }, { &tlcs900h_device::op_RRDRM, p_A, p_M, 12 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDBMM, p_M16, p_M, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 },
- { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADDBMI, _M, _I8, 7 }, { &tlcs900h_device::_ADCBMI, _M, _I8, 7 }, { &tlcs900h_device::_SUBBMI, _M, _I8, 7 }, { &tlcs900h_device::_SBCBMI, _M, _I8, 7 },
- { &tlcs900h_device::_ANDBMI, _M, _I8, 7 }, { &tlcs900h_device::_XORBMI, _M, _I8, 7 }, { &tlcs900h_device::_ORBMI, _M, _I8, 7 }, { &tlcs900h_device::_CPBMI, _M, _I8, 6 },
+ { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADDBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_ADCBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_SUBBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_SBCBMI, p_M, p_I8, 7 },
+ { &tlcs900h_device::op_ANDBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_XORBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_ORBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_CPBMI, p_M, p_I8, 6 },
/* 40 - 5F */
- { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 },
- { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 },
- { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 },
- { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 },
+ { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 },
+ { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 },
+ { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 },
+ { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 },
/* 60 - 7F */
- { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 },
- { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_RLCBM, _M, 0, 8 }, { &tlcs900h_device::_RRCBM, _M, 0, 8 }, { &tlcs900h_device::_RLBM, _M, 0, 8 }, { &tlcs900h_device::_RRBM, _M, 0, 8 },
- { &tlcs900h_device::_SLABM, _M, 0, 8 }, { &tlcs900h_device::_SRABM, _M, 0, 8 }, { &tlcs900h_device::_SLLBM, _M, 0, 8 }, { &tlcs900h_device::_SRLBM, _M, 0, 8 },
+ { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_RLCBM, p_M, 0, 8 }, { &tlcs900h_device::op_RRCBM, p_M, 0, 8 }, { &tlcs900h_device::op_RLBM, p_M, 0, 8 }, { &tlcs900h_device::op_RRBM, p_M, 0, 8 },
+ { &tlcs900h_device::op_SLABM, p_M, 0, 8 }, { &tlcs900h_device::op_SRABM, p_M, 0, 8 }, { &tlcs900h_device::op_SLLBM, p_M, 0, 8 }, { &tlcs900h_device::op_SRLBM, p_M, 0, 8 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 },
/* A0 - BF */
- { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 },
/* C0 - DF */
- { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 },
/* E0 - FF */
- { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 },
- { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 },
- { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 },
- { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 },
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_90[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_PUSHWM, _M, 0, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDIW, 0, 0, 10 }, { &tlcs900h_device::_LDIRW, 0, 0, 10 }, { &tlcs900h_device::_LDDW, 0, 0, 10 }, { &tlcs900h_device::_LDDRW, 0, 0, 10 },
- { &tlcs900h_device::_CPIW, 0, 0, 8 }, { &tlcs900h_device::_CPIRW, 0, 0, 10 }, { &tlcs900h_device::_CPDW, 0, 0, 8 }, { &tlcs900h_device::_CPDRW, 0, 0, 10 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMM, _M16, _M, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_PUSHWM, p_M, 0, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDIW, 0, 0, 10 }, { &tlcs900h_device::op_LDIRW, 0, 0, 10 }, { &tlcs900h_device::op_LDDW, 0, 0, 10 }, { &tlcs900h_device::op_LDDRW, 0, 0, 10 },
+ { &tlcs900h_device::op_CPIW, 0, 0, 8 }, { &tlcs900h_device::op_CPIRW, 0, 0, 10 }, { &tlcs900h_device::op_CPDW, 0, 0, 8 }, { &tlcs900h_device::op_CPDRW, 0, 0, 10 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMM, p_M16, p_M, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 },
- { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADDWMI, _M, _I16, 8 }, { &tlcs900h_device::_ADCWMI, _M, _I16, 8 }, { &tlcs900h_device::_SUBWMI, _M, _I16, 8 }, { &tlcs900h_device::_SBCWMI, _M, _I16, 8 },
- { &tlcs900h_device::_ANDWMI, _M, _I16, 8 }, { &tlcs900h_device::_XORWMI, _M, _I16, 8 }, { &tlcs900h_device::_ORWMI, _M, _I16, 8 }, { &tlcs900h_device::_CPWMI, _M, _I16, 6 },
+ { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADDWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_ADCWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_SUBWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_SBCWMI, p_M, p_I16, 8 },
+ { &tlcs900h_device::op_ANDWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_XORWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_ORWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_CPWMI, p_M, p_I16, 6 },
/* 40 - 5F */
- { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 },
- { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 },
- { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 },
- { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 },
- { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 },
+ { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 },
+ { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 },
+ { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 },
+ { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 },
/* 60 - 7F */
- { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 },
- { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_RLCWM, _M, 0, 8 }, { &tlcs900h_device::_RRCWM, _M, 0, 8 }, { &tlcs900h_device::_RLWM, _M, 0, 8 }, { &tlcs900h_device::_RRWM, _M, 0, 8 },
- { &tlcs900h_device::_SLAWM, _M, 0, 8 }, { &tlcs900h_device::_SRAWM, _M, 0, 8 }, { &tlcs900h_device::_SLLWM, _M, 0, 8 }, { &tlcs900h_device::_SRLWM, _M, 0, 8 },
+ { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_RLCWM, p_M, 0, 8 }, { &tlcs900h_device::op_RRCWM, p_M, 0, 8 }, { &tlcs900h_device::op_RLWM, p_M, 0, 8 }, { &tlcs900h_device::op_RRWM, p_M, 0, 8 },
+ { &tlcs900h_device::op_SLAWM, p_M, 0, 8 }, { &tlcs900h_device::op_SRAWM, p_M, 0, 8 }, { &tlcs900h_device::op_SLLWM, p_M, 0, 8 }, { &tlcs900h_device::op_SRLWM, p_M, 0, 8 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 },
/* A0 - BF */
- { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 },
/* C0 - DF */
- { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 },
/* E0 - FF */
- { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 },
- { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 },
- { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 },
- { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 },
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_98[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_PUSHWM, _M, 0, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMM, _M16, _M, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_PUSHWM, p_M, 0, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMM, p_M16, p_M, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 },
- { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADDWMI, _M, _I16, 8 }, { &tlcs900h_device::_ADCWMI, _M, _I16, 8 }, { &tlcs900h_device::_SUBWMI, _M, _I16, 8 }, { &tlcs900h_device::_SBCWMI, _M, _I16, 8 },
- { &tlcs900h_device::_ANDWMI, _M, _I16, 8 }, { &tlcs900h_device::_XORWMI, _M, _I16, 8 }, { &tlcs900h_device::_ORWMI, _M, _I16, 8 }, { &tlcs900h_device::_CPWMI, _M, _I16, 6 },
+ { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADDWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_ADCWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_SUBWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_SBCWMI, p_M, p_I16, 8 },
+ { &tlcs900h_device::op_ANDWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_XORWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_ORWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_CPWMI, p_M, p_I16, 6 },
/* 40 - 5F */
- { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 },
- { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 },
- { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 },
- { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 },
- { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 },
+ { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 },
+ { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 },
+ { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 },
+ { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 },
/* 60 - 7F */
- { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 },
- { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_RLCWM, _M, 0, 8 }, { &tlcs900h_device::_RRCWM, _M, 0, 8 }, { &tlcs900h_device::_RLWM, _M, 0, 8 }, { &tlcs900h_device::_RRWM, _M, 0, 8 },
- { &tlcs900h_device::_SLAWM, _M, 0, 8 }, { &tlcs900h_device::_SRAWM, _M, 0, 8 }, { &tlcs900h_device::_SLLWM, _M, 0, 8 }, { &tlcs900h_device::_SRLWM, _M, 0, 8 },
+ { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_RLCWM, p_M, 0, 8 }, { &tlcs900h_device::op_RRCWM, p_M, 0, 8 }, { &tlcs900h_device::op_RLWM, p_M, 0, 8 }, { &tlcs900h_device::op_RRWM, p_M, 0, 8 },
+ { &tlcs900h_device::op_SLAWM, p_M, 0, 8 }, { &tlcs900h_device::op_SRAWM, p_M, 0, 8 }, { &tlcs900h_device::op_SLLWM, p_M, 0, 8 }, { &tlcs900h_device::op_SRLWM, p_M, 0, 8 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 },
/* A0 - BF */
- { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 },
/* C0 - DF */
- { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 },
/* E0 - FF */
- { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 },
- { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 },
- { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 },
- { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 },
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_a0[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 40 - 5F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 60 - 7F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 },
+ { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 },
/* A0 - BF */
- { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 },
- { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 },
- { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 },
- { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 },
- { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 },
- { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 },
- { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 },
- { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 },
+ { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 },
/* C0 - DF */
- { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 },
- { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 },
- { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 },
- { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 },
- { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 },
+ { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 },
/* E0 - FF */
- { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 },
- { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 },
- { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 },
- { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 },
- { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 },
+ { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 },
+ { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 },
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_b0[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_LDBMI, _M, _I8, 5 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMI, _M, _I16, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_POPBM, _M, 0, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_POPWM, _M, 0, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDBMM, _M, _M16, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMM, _M, _M16, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMI, p_M, p_I8, 5 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMI, p_M, p_I16, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_POPBM, p_M, 0, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_POPWM, p_M, 0, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMM, p_M, p_M16, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMM, p_M, p_M16, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 },
- { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 },
- { &tlcs900h_device::_ANDCFBRM, _A, _M, 8 }, { &tlcs900h_device::_ORCFBRM, _A, _M, 8 }, { &tlcs900h_device::_XORCFBRM, _A, _M, 8 }, { &tlcs900h_device::_LDCFBRM, _A, _M, 8 },
- { &tlcs900h_device::_STCFBRM, _A, _M, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 },
- { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDCFBRM, p_A, p_M, 8 }, { &tlcs900h_device::op_ORCFBRM, p_A, p_M, 8 }, { &tlcs900h_device::op_XORCFBRM, p_A, p_M, 8 }, { &tlcs900h_device::op_LDCFBRM, p_A, p_M, 8 },
+ { &tlcs900h_device::op_STCFBRM, p_A, p_M, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 },
+ { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 40 - 5F */
- { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 },
- { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 },
- { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 },
+ { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 },
+ { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 60 - 7F */
- { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 },
- { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 },
+ { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 80 - 9F */
- { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 },
+ { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 },
/* A0 - BF */
- { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 },
- { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 },
- { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 },
- { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 },
- { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 },
- { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 },
+ { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 },
+ { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 },
+ { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 },
/* C0 - DF */
- { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 },
- { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 },
- { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 },
- { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
+ { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
/* E0 - FF */
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 },
- { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 },
- { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 },
- { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }, { &tlcs900h_device::_RETCC, _CC, 0, 6 }
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 },
+ { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 },
+ { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 },
+ { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }, { &tlcs900h_device::op_RETCC, p_CC, 0, 6 }
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_b8[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_LDBMI, _M, _I8, 5 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMI, _M, _I16, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_POPBM, _M, 0, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_POPWM, _M, 0, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDBMM, _M, _M16, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMM, _M, _M16, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMI, p_M, p_I8, 5 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMI, p_M, p_I16, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_POPBM, p_M, 0, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_POPWM, p_M, 0, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMM, p_M, p_M16, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMM, p_M, p_M16, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 },
- { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 },
- { &tlcs900h_device::_ANDCFBRM, _A, _M, 8 }, { &tlcs900h_device::_ORCFBRM, _A, _M, 8 }, { &tlcs900h_device::_XORCFBRM, _A, _M, 8 }, { &tlcs900h_device::_LDCFBRM, _A, _M, 8 },
- { &tlcs900h_device::_STCFBRM, _A, _M, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 },
- { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDCFBRM, p_A, p_M, 8 }, { &tlcs900h_device::op_ORCFBRM, p_A, p_M, 8 }, { &tlcs900h_device::op_XORCFBRM, p_A, p_M, 8 }, { &tlcs900h_device::op_LDCFBRM, p_A, p_M, 8 },
+ { &tlcs900h_device::op_STCFBRM, p_A, p_M, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 },
+ { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 40 - 5F */
- { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 },
- { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 },
- { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 },
+ { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 },
+ { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 60 - 7F */
- { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 },
- { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 },
+ { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 80 - 9F */
- { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 8 },
+ { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 8 },
/* A0 - BF */
- { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 8 },
- { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 },
- { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 },
- { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 },
- { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 },
- { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 },
- { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 },
+ { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 },
+ { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 },
+ { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 },
/* C0 - DF */
- { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 },
- { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 },
- { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 },
- { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 }, { &tlcs900h_device::_BITBIM, _I3, _M, 8 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
+ { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
/* E0 - FF */
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_c0[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_PUSHBM, _M, 0, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_RLDRM, _A, _M, 12 }, { &tlcs900h_device::_RRDRM, _A, _M, 12 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDBMM, _M16, _M, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_PUSHBM, p_M, 0, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_RLDRM, p_A, p_M, 12 }, { &tlcs900h_device::op_RRDRM, p_A, p_M, 12 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDBMM, p_M16, p_M, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 }, { &tlcs900h_device::_LDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 },
- { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 }, { &tlcs900h_device::_EXBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADDBMI, _M, _I8, 7 }, { &tlcs900h_device::_ADCBMI, _M, _I8, 7 }, { &tlcs900h_device::_SUBBMI, _M, _I8, 7 }, { &tlcs900h_device::_SBCBMI, _M, _I8, 7 },
- { &tlcs900h_device::_ANDBMI, _M, _I8, 7 }, { &tlcs900h_device::_XORBMI, _M, _I8, 7 }, { &tlcs900h_device::_ORBMI, _M, _I8, 7 }, { &tlcs900h_device::_CPBMI, _M, _I8, 6 },
+ { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_LDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_EXBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADDBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_ADCBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_SUBBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_SBCBMI, p_M, p_I8, 7 },
+ { &tlcs900h_device::op_ANDBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_XORBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_ORBMI, p_M, p_I8, 7 }, { &tlcs900h_device::op_CPBMI, p_M, p_I8, 6 },
/* 40 - 5F */
- { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 }, { &tlcs900h_device::_MULSBRM, _MC16, _M, 18 },
- { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 },
- { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 }, { &tlcs900h_device::_DIVBRM, _MC16, _M, 22 },
- { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 },
- { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 }, { &tlcs900h_device::_DIVSBRM, _MC16, _M, 24 },
+ { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 }, { &tlcs900h_device::op_MULSBRM, p_MC16, p_M, 18 },
+ { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 },
+ { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 }, { &tlcs900h_device::op_DIVBRM, p_MC16, p_M, 22 },
+ { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 },
+ { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 }, { &tlcs900h_device::op_DIVSBRM, p_MC16, p_M, 24 },
/* 60 - 7F */
- { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 },
- { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 }, { &tlcs900h_device::_INCBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 }, { &tlcs900h_device::_DECBIM, _I3, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_RLCBM, _M, 0, 8 }, { &tlcs900h_device::_RRCBM, _M, 0, 8 }, { &tlcs900h_device::_RLBM, _M, 0, 8 }, { &tlcs900h_device::_RRBM, _M, 0, 8 },
- { &tlcs900h_device::_SLABM, _M, 0, 8 }, { &tlcs900h_device::_SRABM, _M, 0, 8 }, { &tlcs900h_device::_SLLBM, _M, 0, 8 }, { &tlcs900h_device::_SRLBM, _M, 0, 8 },
+ { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECBIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_RLCBM, p_M, 0, 8 }, { &tlcs900h_device::op_RRCBM, p_M, 0, 8 }, { &tlcs900h_device::op_RLBM, p_M, 0, 8 }, { &tlcs900h_device::op_RRBM, p_M, 0, 8 },
+ { &tlcs900h_device::op_SLABM, p_M, 0, 8 }, { &tlcs900h_device::op_SRABM, p_M, 0, 8 }, { &tlcs900h_device::op_SLLBM, p_M, 0, 8 }, { &tlcs900h_device::op_SRLBM, p_M, 0, 8 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 }, { &tlcs900h_device::_ADCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 }, { &tlcs900h_device::_ADCBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ADCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ADCBMR, p_M, p_C8, 6 },
/* A0 - BF */
- { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 }, { &tlcs900h_device::_SUBBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 }, { &tlcs900h_device::_SUBBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 }, { &tlcs900h_device::_SBCBRM, _C8, _M, 4 },
- { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 },
- { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 }, { &tlcs900h_device::_SBCBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SUBBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SUBBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_SBCBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_SBCBMR, p_M, p_C8, 6 },
/* C0 - DF */
- { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 }, { &tlcs900h_device::_ANDBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 }, { &tlcs900h_device::_ANDBMR, _M, _C8, 6 },
- { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 }, { &tlcs900h_device::_XORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 }, { &tlcs900h_device::_XORBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ANDBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ANDBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_XORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_XORBMR, p_M, p_C8, 6 },
/* E0 - FF */
- { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 }, { &tlcs900h_device::_ORBRM, _C8, _M, 4 },
- { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 }, { &tlcs900h_device::_ORBMR, _M, _C8, 6 },
- { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 },
- { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 }, { &tlcs900h_device::_CPBRM, _C8, _M, 4 },
- { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 },
- { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 }, { &tlcs900h_device::_CPBMR, _M, _C8, 6 },
+ { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_ORBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_ORBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 }, { &tlcs900h_device::op_CPBRM, p_C8, p_M, 4 },
+ { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 },
+ { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 }, { &tlcs900h_device::op_CPBMR, p_M, p_C8, 6 },
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_c8[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDBRI, _R, _I8, 4 },
- { &tlcs900h_device::_PUSHBR, _R, 0, 6 }, { &tlcs900h_device::_POPBR, _R, 0, 6 }, { &tlcs900h_device::_CPLBR, _R, 0, 4 }, { &tlcs900h_device::_NEGBR, _R, 0, 5 },
- { &tlcs900h_device::_MULBRI, _R, _I8, 18}, { &tlcs900h_device::_MULSBRI, _R, _I8, 18 }, { &tlcs900h_device::_DIVBRI, _R, _I8, 22 }, { &tlcs900h_device::_DIVSBRI, _R, _I8, 24 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DAABR, _R, 0, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DJNZB, _R, _D8, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDBRI, p_R, p_I8, 4 },
+ { &tlcs900h_device::op_PUSHBR, p_R, 0, 6 }, { &tlcs900h_device::op_POPBR, p_R, 0, 6 }, { &tlcs900h_device::op_CPLBR, p_R, 0, 4 }, { &tlcs900h_device::op_NEGBR, p_R, 0, 5 },
+ { &tlcs900h_device::op_MULBRI, p_R, p_I8, 18}, { &tlcs900h_device::op_MULSBRI, p_R, p_I8, 18 }, { &tlcs900h_device::op_DIVBRI, p_R, p_I8, 22 }, { &tlcs900h_device::op_DIVSBRI, p_R, p_I8, 24 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DAABR, p_R, 0, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DJNZB, p_R, p_D8, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_ANDCFBIR, _I8, _R, 4 }, { &tlcs900h_device::_ORCFBIR, _I8, _R, 4 }, { &tlcs900h_device::_XORCFBIR, _I8, _R, 4 }, { &tlcs900h_device::_LDCFBIR, _I8, _R, 4 },
- { &tlcs900h_device::_STCFBIR, _I8, _R, 4 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_ANDCFBRR, _A, _R, 4 }, { &tlcs900h_device::_ORCFBRR, _A, _R, 4 }, { &tlcs900h_device::_XORCFBRR, _A, _R, 4 }, { &tlcs900h_device::_LDCFBRR, _A, _R, 4 },
- { &tlcs900h_device::_STCFBRR, _A, _R, 4 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDCBRR, _CR8, _R, 1 }, { &tlcs900h_device::_LDCBRR, _R, _CR8, 1 },
- { &tlcs900h_device::_RESBIR, _I8, _R, 4 }, { &tlcs900h_device::_SETBIR, _I8, _R, 4 }, { &tlcs900h_device::_CHGBIR, _I8, _R, 4 }, { &tlcs900h_device::_BITBIR, _I8, _R, 4 },
- { &tlcs900h_device::_TSETBIR, _I8, _R, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_ANDCFBIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_ORCFBIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_XORCFBIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_LDCFBIR, p_I8, p_R, 4 },
+ { &tlcs900h_device::op_STCFBIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_ANDCFBRR, p_A, p_R, 4 }, { &tlcs900h_device::op_ORCFBRR, p_A, p_R, 4 }, { &tlcs900h_device::op_XORCFBRR, p_A, p_R, 4 }, { &tlcs900h_device::op_LDCFBRR, p_A, p_R, 4 },
+ { &tlcs900h_device::op_STCFBRR, p_A, p_R, 4 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDCBRR, p_CR8, p_R, 1 }, { &tlcs900h_device::op_LDCBRR, p_R, p_CR8, 1 },
+ { &tlcs900h_device::op_RESBIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_SETBIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_CHGBIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_BITBIR, p_I8, p_R, 4 },
+ { &tlcs900h_device::op_TSETBIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 40 - 5F */
- { &tlcs900h_device::_MULBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULBRR, _MC16, _R, 18 },
- { &tlcs900h_device::_MULBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULBRR, _MC16, _R, 18 },
- { &tlcs900h_device::_MULSBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULSBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULSBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULSBRR, _MC16, _R, 18 },
- { &tlcs900h_device::_MULSBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULSBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULSBRR, _MC16, _R, 18 }, { &tlcs900h_device::_MULSBRR, _MC16, _R, 18 },
- { &tlcs900h_device::_DIVBRR, _MC16, _R, 22 }, { &tlcs900h_device::_DIVBRR, _MC16, _R, 22 }, { &tlcs900h_device::_DIVBRR, _MC16, _R, 22 }, { &tlcs900h_device::_DIVBRR, _MC16, _R, 22 },
- { &tlcs900h_device::_DIVBRR, _MC16, _R, 22 }, { &tlcs900h_device::_DIVBRR, _MC16, _R, 22 }, { &tlcs900h_device::_DIVBRR, _MC16, _R, 22 }, { &tlcs900h_device::_DIVBRR, _MC16, _R, 22 },
- { &tlcs900h_device::_DIVSBRR, _MC16, _R, 24 }, { &tlcs900h_device::_DIVSBRR, _MC16, _R, 24 }, { &tlcs900h_device::_DIVSBRR, _MC16, _R, 24 }, { &tlcs900h_device::_DIVSBRR, _MC16, _R, 24 },
- { &tlcs900h_device::_DIVSBRR, _MC16, _R, 24 }, { &tlcs900h_device::_DIVSBRR, _MC16, _R, 24 }, { &tlcs900h_device::_DIVSBRR, _MC16, _R, 24 }, { &tlcs900h_device::_DIVSBRR, _MC16, _R, 24 },
+ { &tlcs900h_device::op_MULBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULBRR, p_MC16, p_R, 18 },
+ { &tlcs900h_device::op_MULBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULBRR, p_MC16, p_R, 18 },
+ { &tlcs900h_device::op_MULSBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULSBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULSBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULSBRR, p_MC16, p_R, 18 },
+ { &tlcs900h_device::op_MULSBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULSBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULSBRR, p_MC16, p_R, 18 }, { &tlcs900h_device::op_MULSBRR, p_MC16, p_R, 18 },
+ { &tlcs900h_device::op_DIVBRR, p_MC16, p_R, 22 }, { &tlcs900h_device::op_DIVBRR, p_MC16, p_R, 22 }, { &tlcs900h_device::op_DIVBRR, p_MC16, p_R, 22 }, { &tlcs900h_device::op_DIVBRR, p_MC16, p_R, 22 },
+ { &tlcs900h_device::op_DIVBRR, p_MC16, p_R, 22 }, { &tlcs900h_device::op_DIVBRR, p_MC16, p_R, 22 }, { &tlcs900h_device::op_DIVBRR, p_MC16, p_R, 22 }, { &tlcs900h_device::op_DIVBRR, p_MC16, p_R, 22 },
+ { &tlcs900h_device::op_DIVSBRR, p_MC16, p_R, 24 }, { &tlcs900h_device::op_DIVSBRR, p_MC16, p_R, 24 }, { &tlcs900h_device::op_DIVSBRR, p_MC16, p_R, 24 }, { &tlcs900h_device::op_DIVSBRR, p_MC16, p_R, 24 },
+ { &tlcs900h_device::op_DIVSBRR, p_MC16, p_R, 24 }, { &tlcs900h_device::op_DIVSBRR, p_MC16, p_R, 24 }, { &tlcs900h_device::op_DIVSBRR, p_MC16, p_R, 24 }, { &tlcs900h_device::op_DIVSBRR, p_MC16, p_R, 24 },
/* 60 - 7F */
- { &tlcs900h_device::_INCBIR, _I3, _R, 4 }, { &tlcs900h_device::_INCBIR, _I3, _R, 4 }, { &tlcs900h_device::_INCBIR, _I3, _R, 4 }, { &tlcs900h_device::_INCBIR, _I3, _R, 4 },
- { &tlcs900h_device::_INCBIR, _I3, _R, 4 }, { &tlcs900h_device::_INCBIR, _I3, _R, 4 }, { &tlcs900h_device::_INCBIR, _I3, _R, 4 }, { &tlcs900h_device::_INCBIR, _I3, _R, 4 },
- { &tlcs900h_device::_DECBIR, _I3, _R, 4 }, { &tlcs900h_device::_DECBIR, _I3, _R, 4 }, { &tlcs900h_device::_DECBIR, _I3, _R, 4 }, { &tlcs900h_device::_DECBIR, _I3, _R, 4 },
- { &tlcs900h_device::_DECBIR, _I3, _R, 4 }, { &tlcs900h_device::_DECBIR, _I3, _R, 4 }, { &tlcs900h_device::_DECBIR, _I3, _R, 4 }, { &tlcs900h_device::_DECBIR, _I3, _R, 4 },
- { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 },
- { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 },
- { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 },
- { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 }, { &tlcs900h_device::_SCCBR, _CC, _R, 6 },
+ { &tlcs900h_device::op_INCBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCBIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_INCBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCBIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_DECBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECBIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_DECBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECBIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECBIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 },
+ { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 },
+ { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 },
+ { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCBR, p_CC, p_R, 6 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADDBRR, _C8, _R, 4 },
- { &tlcs900h_device::_ADDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADDBRR, _C8, _R, 4 },
- { &tlcs900h_device::_LDBRR, _C8, _R, 4 }, { &tlcs900h_device::_LDBRR, _C8, _R, 4 }, { &tlcs900h_device::_LDBRR, _C8, _R, 4 }, { &tlcs900h_device::_LDBRR, _C8, _R, 4 },
- { &tlcs900h_device::_LDBRR, _C8, _R, 4 }, { &tlcs900h_device::_LDBRR, _C8, _R, 4 }, { &tlcs900h_device::_LDBRR, _C8, _R, 4 }, { &tlcs900h_device::_LDBRR, _C8, _R, 4 },
- { &tlcs900h_device::_ADCBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADCBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADCBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADCBRR, _C8, _R, 4 },
- { &tlcs900h_device::_ADCBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADCBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADCBRR, _C8, _R, 4 }, { &tlcs900h_device::_ADCBRR, _C8, _R, 4 },
- { &tlcs900h_device::_LDBRR, _R, _C8, 4 }, { &tlcs900h_device::_LDBRR, _R, _C8, 4 }, { &tlcs900h_device::_LDBRR, _R, _C8, 4 }, { &tlcs900h_device::_LDBRR, _R, _C8, 4 },
- { &tlcs900h_device::_LDBRR, _R, _C8, 4 }, { &tlcs900h_device::_LDBRR, _R, _C8, 4 }, { &tlcs900h_device::_LDBRR, _R, _C8, 4 }, { &tlcs900h_device::_LDBRR, _R, _C8, 4 },
+ { &tlcs900h_device::op_ADDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADDBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_ADDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADDBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_LDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_LDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_LDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_LDBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_LDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_LDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_LDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_LDBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_ADCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADCBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_ADCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ADCBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_LDBRR, p_R, p_C8, 4 }, { &tlcs900h_device::op_LDBRR, p_R, p_C8, 4 }, { &tlcs900h_device::op_LDBRR, p_R, p_C8, 4 }, { &tlcs900h_device::op_LDBRR, p_R, p_C8, 4 },
+ { &tlcs900h_device::op_LDBRR, p_R, p_C8, 4 }, { &tlcs900h_device::op_LDBRR, p_R, p_C8, 4 }, { &tlcs900h_device::op_LDBRR, p_R, p_C8, 4 }, { &tlcs900h_device::op_LDBRR, p_R, p_C8, 4 },
/* A0 - BF */
- { &tlcs900h_device::_SUBBRR, _C8, _R, 4 }, { &tlcs900h_device::_SUBBRR, _C8, _R, 4 }, { &tlcs900h_device::_SUBBRR, _C8, _R, 4 }, { &tlcs900h_device::_SUBBRR, _C8, _R, 4 },
- { &tlcs900h_device::_SUBBRR, _C8, _R, 4 }, { &tlcs900h_device::_SUBBRR, _C8, _R, 4 }, { &tlcs900h_device::_SUBBRR, _C8, _R, 4 }, { &tlcs900h_device::_SUBBRR, _C8, _R, 4 },
- { &tlcs900h_device::_LDBRI, _R, _I3, 4 }, { &tlcs900h_device::_LDBRI, _R, _I3, 4 }, { &tlcs900h_device::_LDBRI, _R, _I3, 4 }, { &tlcs900h_device::_LDBRI, _R, _I3, 4 },
- { &tlcs900h_device::_LDBRI, _R, _I3, 4 }, { &tlcs900h_device::_LDBRI, _R, _I3, 4 }, { &tlcs900h_device::_LDBRI, _R, _I3, 4 }, { &tlcs900h_device::_LDBRI, _R, _I3, 4 },
- { &tlcs900h_device::_SBCBRR, _C8, _R, 4 }, { &tlcs900h_device::_SBCBRR, _C8, _R, 4 }, { &tlcs900h_device::_SBCBRR, _C8, _R, 4 }, { &tlcs900h_device::_SBCBRR, _C8, _R, 4 },
- { &tlcs900h_device::_SBCBRR, _C8, _R, 4 }, { &tlcs900h_device::_SBCBRR, _C8, _R, 4 }, { &tlcs900h_device::_SBCBRR, _C8, _R, 4 }, { &tlcs900h_device::_SBCBRR, _C8, _R, 4 },
- { &tlcs900h_device::_EXBRR, _C8, _R, 5 }, { &tlcs900h_device::_EXBRR, _C8, _R, 5 }, { &tlcs900h_device::_EXBRR, _C8, _R, 5 }, { &tlcs900h_device::_EXBRR, _C8, _R, 5 },
- { &tlcs900h_device::_EXBRR, _C8, _R, 5 }, { &tlcs900h_device::_EXBRR, _C8, _R, 5 }, { &tlcs900h_device::_EXBRR, _C8, _R, 5 }, { &tlcs900h_device::_EXBRR, _C8, _R, 5 },
+ { &tlcs900h_device::op_SUBBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SUBBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SUBBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SUBBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_SUBBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SUBBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SUBBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SUBBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_LDBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDBRI, p_R, p_I3, 4 },
+ { &tlcs900h_device::op_LDBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDBRI, p_R, p_I3, 4 },
+ { &tlcs900h_device::op_SBCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SBCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SBCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SBCBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_SBCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SBCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SBCBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_SBCBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_EXBRR, p_C8, p_R, 5 }, { &tlcs900h_device::op_EXBRR, p_C8, p_R, 5 }, { &tlcs900h_device::op_EXBRR, p_C8, p_R, 5 }, { &tlcs900h_device::op_EXBRR, p_C8, p_R, 5 },
+ { &tlcs900h_device::op_EXBRR, p_C8, p_R, 5 }, { &tlcs900h_device::op_EXBRR, p_C8, p_R, 5 }, { &tlcs900h_device::op_EXBRR, p_C8, p_R, 5 }, { &tlcs900h_device::op_EXBRR, p_C8, p_R, 5 },
/* C0 - DF */
- { &tlcs900h_device::_ANDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ANDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ANDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ANDBRR, _C8, _R, 4 },
- { &tlcs900h_device::_ANDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ANDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ANDBRR, _C8, _R, 4 }, { &tlcs900h_device::_ANDBRR, _C8, _R, 4 },
- { &tlcs900h_device::_ADDBRI, _R, _I8, 4 }, { &tlcs900h_device::_ADCBRI, _R, _I8, 4 }, { &tlcs900h_device::_SUBBRI, _R, _I8, 4 }, { &tlcs900h_device::_SBCBRI, _R, _I8, 4 },
- { &tlcs900h_device::_ANDBRI, _R, _I8, 4 }, { &tlcs900h_device::_XORBRI, _R, _I8, 4 }, { &tlcs900h_device::_ORBRI, _R, _I8, 4 }, { &tlcs900h_device::_CPBRI, _R, _I8, 4 },
- { &tlcs900h_device::_XORBRR, _C8, _R, 4 }, { &tlcs900h_device::_XORBRR, _C8, _R, 4 }, { &tlcs900h_device::_XORBRR, _C8, _R, 4 }, { &tlcs900h_device::_XORBRR, _C8, _R, 4 },
- { &tlcs900h_device::_XORBRR, _C8, _R, 4 }, { &tlcs900h_device::_XORBRR, _C8, _R, 4 }, { &tlcs900h_device::_XORBRR, _C8, _R, 4 }, { &tlcs900h_device::_XORBRR, _C8, _R, 4 },
- { &tlcs900h_device::_CPBRI, _R, _I3, 4 }, { &tlcs900h_device::_CPBRI, _R, _I3, 4 }, { &tlcs900h_device::_CPBRI, _R, _I3, 4 }, { &tlcs900h_device::_CPBRI, _R, _I3, 4 },
- { &tlcs900h_device::_CPBRI, _R, _I3, 4 }, { &tlcs900h_device::_CPBRI, _R, _I3, 4 }, { &tlcs900h_device::_CPBRI, _R, _I3, 4 }, { &tlcs900h_device::_CPBRI, _R, _I3, 4 },
+ { &tlcs900h_device::op_ANDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ANDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ANDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ANDBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_ANDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ANDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ANDBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ANDBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_ADDBRI, p_R, p_I8, 4 }, { &tlcs900h_device::op_ADCBRI, p_R, p_I8, 4 }, { &tlcs900h_device::op_SUBBRI, p_R, p_I8, 4 }, { &tlcs900h_device::op_SBCBRI, p_R, p_I8, 4 },
+ { &tlcs900h_device::op_ANDBRI, p_R, p_I8, 4 }, { &tlcs900h_device::op_XORBRI, p_R, p_I8, 4 }, { &tlcs900h_device::op_ORBRI, p_R, p_I8, 4 }, { &tlcs900h_device::op_CPBRI, p_R, p_I8, 4 },
+ { &tlcs900h_device::op_XORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_XORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_XORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_XORBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_XORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_XORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_XORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_XORBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_CPBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPBRI, p_R, p_I3, 4 },
+ { &tlcs900h_device::op_CPBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPBRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPBRI, p_R, p_I3, 4 },
/* E0 - FF */
- { &tlcs900h_device::_ORBRR, _C8, _R, 4 }, { &tlcs900h_device::_ORBRR, _C8, _R, 4 }, { &tlcs900h_device::_ORBRR, _C8, _R, 4 }, { &tlcs900h_device::_ORBRR, _C8, _R, 4 },
- { &tlcs900h_device::_ORBRR, _C8, _R, 4 }, { &tlcs900h_device::_ORBRR, _C8, _R, 4 }, { &tlcs900h_device::_ORBRR, _C8, _R, 4 }, { &tlcs900h_device::_ORBRR, _C8, _R, 4 },
- { &tlcs900h_device::_RLCBIR, _I8, _R, 6 }, { &tlcs900h_device::_RRCBIR, _I8, _R, 6 }, { &tlcs900h_device::_RLBIR, _I8, _R, 6 }, { &tlcs900h_device::_RRBIR, _I8, _R, 6 },
- { &tlcs900h_device::_SLABIR, _I8, _R, 6 }, { &tlcs900h_device::_SRABIR, _I8, _R, 6 }, { &tlcs900h_device::_SLLBIR, _I8, _R, 6 }, { &tlcs900h_device::_SRLBIR, _I8, _R, 6 },
- { &tlcs900h_device::_CPBRR, _C8, _R, 4 }, { &tlcs900h_device::_CPBRR, _C8, _R, 4 }, { &tlcs900h_device::_CPBRR, _C8, _R, 4 }, { &tlcs900h_device::_CPBRR, _C8, _R, 4 },
- { &tlcs900h_device::_CPBRR, _C8, _R, 4 }, { &tlcs900h_device::_CPBRR, _C8, _R, 4 }, { &tlcs900h_device::_CPBRR, _C8, _R, 4 }, { &tlcs900h_device::_CPBRR, _C8, _R, 4 },
- { &tlcs900h_device::_RLCBRR, _A, _R, 6 }, { &tlcs900h_device::_RRCBRR, _A, _R, 6 }, { &tlcs900h_device::_RLBRR, _A, _R, 6 }, { &tlcs900h_device::_RRBRR, _A, _R, 6 },
- { &tlcs900h_device::_SLABRR, _A, _R, 6 }, { &tlcs900h_device::_SRABRR, _A, _R, 6 }, { &tlcs900h_device::_SLLBRR, _A, _R, 6 }, { &tlcs900h_device::_SRLBRR, _A, _R, 6 }
+ { &tlcs900h_device::op_ORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ORBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_ORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ORBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_ORBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_RLCBIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_RRCBIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_RLBIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_RRBIR, p_I8, p_R, 6 },
+ { &tlcs900h_device::op_SLABIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_SRABIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_SLLBIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_SRLBIR, p_I8, p_R, 6 },
+ { &tlcs900h_device::op_CPBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_CPBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_CPBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_CPBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_CPBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_CPBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_CPBRR, p_C8, p_R, 4 }, { &tlcs900h_device::op_CPBRR, p_C8, p_R, 4 },
+ { &tlcs900h_device::op_RLCBRR, p_A, p_R, 6 }, { &tlcs900h_device::op_RRCBRR, p_A, p_R, 6 }, { &tlcs900h_device::op_RLBRR, p_A, p_R, 6 }, { &tlcs900h_device::op_RRBRR, p_A, p_R, 6 },
+ { &tlcs900h_device::op_SLABRR, p_A, p_R, 6 }, { &tlcs900h_device::op_SRABRR, p_A, p_R, 6 }, { &tlcs900h_device::op_SLLBRR, p_A, p_R, 6 }, { &tlcs900h_device::op_SRLBRR, p_A, p_R, 6 }
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_d0[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_PUSHWM, _M, 0, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMM, _M16, _M, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_PUSHWM, p_M, 0, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMM, p_M16, p_M, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 }, { &tlcs900h_device::_LDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 },
- { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 }, { &tlcs900h_device::_EXWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADDWMI, _M, _I16, 8 }, { &tlcs900h_device::_ADCWMI, _M, _I16, 8 }, { &tlcs900h_device::_SUBWMI, _M, _I16, 8 }, { &tlcs900h_device::_SBCWMI, _M, _I16, 8 },
- { &tlcs900h_device::_ANDWMI, _M, _I16, 8 }, { &tlcs900h_device::_XORWMI, _M, _I16, 8 }, { &tlcs900h_device::_ORWMI, _M, _I16, 8 }, { &tlcs900h_device::_CPWMI, _M, _I16, 6 },
+ { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_EXWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADDWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_ADCWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_SUBWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_SBCWMI, p_M, p_I16, 8 },
+ { &tlcs900h_device::op_ANDWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_XORWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_ORWMI, p_M, p_I16, 8 }, { &tlcs900h_device::op_CPWMI, p_M, p_I16, 6 },
/* 40 - 5F */
- { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 },
- { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 }, { &tlcs900h_device::_MULSWRM, _C32, _M, 26 },
- { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 },
- { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 }, { &tlcs900h_device::_DIVWRM, _C32, _M, 30 },
- { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 },
- { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 }, { &tlcs900h_device::_DIVSWRM, _C32, _M, 32 },
+ { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 }, { &tlcs900h_device::op_MULSWRM, p_C32, p_M, 26 },
+ { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 },
+ { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 }, { &tlcs900h_device::op_DIVWRM, p_C32, p_M, 30 },
+ { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 },
+ { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 }, { &tlcs900h_device::op_DIVSWRM, p_C32, p_M, 32 },
/* 60 - 7F */
- { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 },
- { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 }, { &tlcs900h_device::_INCWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 }, { &tlcs900h_device::_DECWIM, _I3, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_RLCWM, _M, 0, 8 }, { &tlcs900h_device::_RRCWM, _M, 0, 8 }, { &tlcs900h_device::_RLWM, _M, 0, 8 }, { &tlcs900h_device::_RRWM, _M, 0, 8 },
- { &tlcs900h_device::_SLAWM, _M, 0, 8 }, { &tlcs900h_device::_SRAWM, _M, 0, 8 }, { &tlcs900h_device::_SLLWM, _M, 0, 8 }, { &tlcs900h_device::_SRLWM, _M, 0, 8 },
+ { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_INCWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 }, { &tlcs900h_device::op_DECWIM, p_I3, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_RLCWM, p_M, 0, 8 }, { &tlcs900h_device::op_RRCWM, p_M, 0, 8 }, { &tlcs900h_device::op_RLWM, p_M, 0, 8 }, { &tlcs900h_device::op_RRWM, p_M, 0, 8 },
+ { &tlcs900h_device::op_SLAWM, p_M, 0, 8 }, { &tlcs900h_device::op_SRAWM, p_M, 0, 8 }, { &tlcs900h_device::op_SLLWM, p_M, 0, 8 }, { &tlcs900h_device::op_SRLWM, p_M, 0, 8 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 }, { &tlcs900h_device::_ADCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 }, { &tlcs900h_device::_ADCWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ADCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ADCWMR, p_M, p_C16, 6 },
/* A0 - BF */
- { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 }, { &tlcs900h_device::_SUBWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 }, { &tlcs900h_device::_SUBWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 }, { &tlcs900h_device::_SBCWRM, _C16, _M, 4 },
- { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 },
- { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 }, { &tlcs900h_device::_SBCWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SUBWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SUBWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_SBCWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_SBCWMR, p_M, p_C16, 6 },
/* C0 - DF */
- { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 }, { &tlcs900h_device::_ANDWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 }, { &tlcs900h_device::_ANDWMR, _M, _C16, 6 },
- { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 }, { &tlcs900h_device::_XORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 }, { &tlcs900h_device::_XORWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ANDWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ANDWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_XORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_XORWMR, p_M, p_C16, 6 },
/* E0 - FF */
- { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 }, { &tlcs900h_device::_ORWRM, _C16, _M, 4 },
- { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 }, { &tlcs900h_device::_ORWMR, _M, _C16, 6 },
- { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 },
- { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 }, { &tlcs900h_device::_CPWRM, _C16, _M, 4 },
- { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 },
- { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 }, { &tlcs900h_device::_CPWMR, _M, _C16, 6 },
+ { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_ORWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_ORWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 }, { &tlcs900h_device::op_CPWRM, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 },
+ { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 }, { &tlcs900h_device::op_CPWMR, p_M, p_C16, 6 },
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_d8[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWRI, _R, _I16, 4 },
- { &tlcs900h_device::_PUSHWR, _R, 0, 5 }, { &tlcs900h_device::_POPWR, _R, 0, 6 }, { &tlcs900h_device::_CPLWR, _R, 0, 4 }, { &tlcs900h_device::_NEGWR, _R, 0, 5 },
- { &tlcs900h_device::_MULWRI, _R, _I16, 26 }, { &tlcs900h_device::_MULSWRI, _R, _I16, 26 }, { &tlcs900h_device::_DIVWRI, _R, _I16, 30 }, { &tlcs900h_device::_DIVSWRI, _R, _I16, 32 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_BS1FRR, _A, _R, 4 }, { &tlcs900h_device::_BS1BRR, _A, _R, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_EXTZWR, _R, 0, 4 }, { &tlcs900h_device::_EXTSWR, _R, 0, 5 },
- { &tlcs900h_device::_PAAWR, _R, 0, 4 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_MIRRW, _R, 0, 4 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_MULAR, _R, 0, 31 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DJNZW, _R, _D8, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWRI, p_R, p_I16, 4 },
+ { &tlcs900h_device::op_PUSHWR, p_R, 0, 5 }, { &tlcs900h_device::op_POPWR, p_R, 0, 6 }, { &tlcs900h_device::op_CPLWR, p_R, 0, 4 }, { &tlcs900h_device::op_NEGWR, p_R, 0, 5 },
+ { &tlcs900h_device::op_MULWRI, p_R, p_I16, 26 }, { &tlcs900h_device::op_MULSWRI, p_R, p_I16, 26 }, { &tlcs900h_device::op_DIVWRI, p_R, p_I16, 30 }, { &tlcs900h_device::op_DIVSWRI, p_R, p_I16, 32 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_BS1FRR, p_A, p_R, 4 }, { &tlcs900h_device::op_BS1BRR, p_A, p_R, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_EXTZWR, p_R, 0, 4 }, { &tlcs900h_device::op_EXTSWR, p_R, 0, 5 },
+ { &tlcs900h_device::op_PAAWR, p_R, 0, 4 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_MIRRW, p_R, 0, 4 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_MULAR, p_R, 0, 31 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DJNZW, p_R, p_D8, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_ANDCFWIR, _I8, _R, 4 }, { &tlcs900h_device::_ORCFWIR, _I8, _R, 4 }, { &tlcs900h_device::_XORCFWIR, _I8, _R, 4 }, { &tlcs900h_device::_LDCFWIR, _I8, _R, 4 },
- { &tlcs900h_device::_STCFWIR, _I8, _R, 4 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_ANDCFWRR, _A, _R, 4 }, { &tlcs900h_device::_ORCFWRR, _A, _R, 4 }, { &tlcs900h_device::_XORCFWRR, _A, _R, 4 }, { &tlcs900h_device::_LDCFWRR, _A, _R, 4 },
- { &tlcs900h_device::_STCFWRR, _A, _R, 4 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDCWRR, _CR16, _R, 1 }, { &tlcs900h_device::_LDCWRR, _R, _CR16, 1 },
- { &tlcs900h_device::_RESWIR, _I8, _R, 4 }, { &tlcs900h_device::_SETWIR, _I8, _R, 4 }, { &tlcs900h_device::_CHGWIR, _I8, _R, 4 }, { &tlcs900h_device::_BITWIR, _I8, _R, 4 },
- { &tlcs900h_device::_TSETWIR, _I8, _R, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_MINC1, _I16, _R, 8 }, { &tlcs900h_device::_MINC2, _I16, _R, 8 }, { &tlcs900h_device::_MINC4, _I16, _R, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_MDEC1, _I16, _R, 7 }, { &tlcs900h_device::_MDEC2, _I16, _R, 7 }, { &tlcs900h_device::_MDEC4, _I16, _R, 7 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_ANDCFWIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_ORCFWIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_XORCFWIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_LDCFWIR, p_I8, p_R, 4 },
+ { &tlcs900h_device::op_STCFWIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_ANDCFWRR, p_A, p_R, 4 }, { &tlcs900h_device::op_ORCFWRR, p_A, p_R, 4 }, { &tlcs900h_device::op_XORCFWRR, p_A, p_R, 4 }, { &tlcs900h_device::op_LDCFWRR, p_A, p_R, 4 },
+ { &tlcs900h_device::op_STCFWRR, p_A, p_R, 4 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDCWRR, p_CR16, p_R, 1 }, { &tlcs900h_device::op_LDCWRR, p_R, p_CR16, 1 },
+ { &tlcs900h_device::op_RESWIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_SETWIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_CHGWIR, p_I8, p_R, 4 }, { &tlcs900h_device::op_BITWIR, p_I8, p_R, 4 },
+ { &tlcs900h_device::op_TSETWIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_MINC1, p_I16, p_R, 8 }, { &tlcs900h_device::op_MINC2, p_I16, p_R, 8 }, { &tlcs900h_device::op_MINC4, p_I16, p_R, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_MDEC1, p_I16, p_R, 7 }, { &tlcs900h_device::op_MDEC2, p_I16, p_R, 7 }, { &tlcs900h_device::op_MDEC4, p_I16, p_R, 7 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 40 - 5F */
- { &tlcs900h_device::_MULWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULWRR, _C32, _R, 26 },
- { &tlcs900h_device::_MULWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULWRR, _C32, _R, 26 },
- { &tlcs900h_device::_MULSWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULSWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULSWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULSWRR, _C32, _R, 26 },
- { &tlcs900h_device::_MULSWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULSWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULSWRR, _C32, _R, 26 }, { &tlcs900h_device::_MULSWRR, _C32, _R, 26 },
- { &tlcs900h_device::_DIVWRR, _C32, _R, 30 }, { &tlcs900h_device::_DIVWRR, _C32, _R, 30 }, { &tlcs900h_device::_DIVWRR, _C32, _R, 30 }, { &tlcs900h_device::_DIVWRR, _C32, _R, 30 },
- { &tlcs900h_device::_DIVWRR, _C32, _R, 30 }, { &tlcs900h_device::_DIVWRR, _C32, _R, 30 }, { &tlcs900h_device::_DIVWRR, _C32, _R, 30 }, { &tlcs900h_device::_DIVWRR, _C32, _R, 30 },
- { &tlcs900h_device::_DIVSWRR, _C32, _R, 32 }, { &tlcs900h_device::_DIVSWRR, _C32, _R, 32 }, { &tlcs900h_device::_DIVSWRR, _C32, _R, 32 }, { &tlcs900h_device::_DIVSWRR, _C32, _R, 32 },
- { &tlcs900h_device::_DIVSWRR, _C32, _R, 32 }, { &tlcs900h_device::_DIVSWRR, _C32, _R, 32 }, { &tlcs900h_device::_DIVSWRR, _C32, _R, 32 }, { &tlcs900h_device::_DIVSWRR, _C32, _R, 32 },
+ { &tlcs900h_device::op_MULWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULWRR, p_C32, p_R, 26 },
+ { &tlcs900h_device::op_MULWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULWRR, p_C32, p_R, 26 },
+ { &tlcs900h_device::op_MULSWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULSWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULSWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULSWRR, p_C32, p_R, 26 },
+ { &tlcs900h_device::op_MULSWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULSWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULSWRR, p_C32, p_R, 26 }, { &tlcs900h_device::op_MULSWRR, p_C32, p_R, 26 },
+ { &tlcs900h_device::op_DIVWRR, p_C32, p_R, 30 }, { &tlcs900h_device::op_DIVWRR, p_C32, p_R, 30 }, { &tlcs900h_device::op_DIVWRR, p_C32, p_R, 30 }, { &tlcs900h_device::op_DIVWRR, p_C32, p_R, 30 },
+ { &tlcs900h_device::op_DIVWRR, p_C32, p_R, 30 }, { &tlcs900h_device::op_DIVWRR, p_C32, p_R, 30 }, { &tlcs900h_device::op_DIVWRR, p_C32, p_R, 30 }, { &tlcs900h_device::op_DIVWRR, p_C32, p_R, 30 },
+ { &tlcs900h_device::op_DIVSWRR, p_C32, p_R, 32 }, { &tlcs900h_device::op_DIVSWRR, p_C32, p_R, 32 }, { &tlcs900h_device::op_DIVSWRR, p_C32, p_R, 32 }, { &tlcs900h_device::op_DIVSWRR, p_C32, p_R, 32 },
+ { &tlcs900h_device::op_DIVSWRR, p_C32, p_R, 32 }, { &tlcs900h_device::op_DIVSWRR, p_C32, p_R, 32 }, { &tlcs900h_device::op_DIVSWRR, p_C32, p_R, 32 }, { &tlcs900h_device::op_DIVSWRR, p_C32, p_R, 32 },
/* 60 - 7F */
- { &tlcs900h_device::_INCWIR, _I3, _R, 4 }, { &tlcs900h_device::_INCWIR, _I3, _R, 4 }, { &tlcs900h_device::_INCWIR, _I3, _R, 4 }, { &tlcs900h_device::_INCWIR, _I3, _R, 4 },
- { &tlcs900h_device::_INCWIR, _I3, _R, 4 }, { &tlcs900h_device::_INCWIR, _I3, _R, 4 }, { &tlcs900h_device::_INCWIR, _I3, _R, 4 }, { &tlcs900h_device::_INCWIR, _I3, _R, 4 },
- { &tlcs900h_device::_DECWIR, _I3, _R, 4 }, { &tlcs900h_device::_DECWIR, _I3, _R, 4 }, { &tlcs900h_device::_DECWIR, _I3, _R, 4 }, { &tlcs900h_device::_DECWIR, _I3, _R, 4 },
- { &tlcs900h_device::_DECWIR, _I3, _R, 4 }, { &tlcs900h_device::_DECWIR, _I3, _R, 4 }, { &tlcs900h_device::_DECWIR, _I3, _R, 4 }, { &tlcs900h_device::_DECWIR, _I3, _R, 4 },
- { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 },
- { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 },
- { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 },
- { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 }, { &tlcs900h_device::_SCCWR, _CC, _R, 6 },
+ { &tlcs900h_device::op_INCWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCWIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_INCWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCWIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_DECWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECWIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_DECWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECWIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECWIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 },
+ { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 },
+ { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 },
+ { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 }, { &tlcs900h_device::op_SCCWR, p_CC, p_R, 6 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADDWRR, _C16, _R, 4 },
- { &tlcs900h_device::_ADDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADDWRR, _C16, _R, 4 },
- { &tlcs900h_device::_LDWRR, _C16, _R, 4 }, { &tlcs900h_device::_LDWRR, _C16, _R, 4 }, { &tlcs900h_device::_LDWRR, _C16, _R, 4 }, { &tlcs900h_device::_LDWRR, _C16, _R, 4 },
- { &tlcs900h_device::_LDWRR, _C16, _R, 4 }, { &tlcs900h_device::_LDWRR, _C16, _R, 4 }, { &tlcs900h_device::_LDWRR, _C16, _R, 4 }, { &tlcs900h_device::_LDWRR, _C16, _R, 4 },
- { &tlcs900h_device::_ADCWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADCWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADCWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADCWRR, _C16, _R, 4 },
- { &tlcs900h_device::_ADCWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADCWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADCWRR, _C16, _R, 4 }, { &tlcs900h_device::_ADCWRR, _C16, _R, 4 },
- { &tlcs900h_device::_LDWRR, _R, _C16, 4 }, { &tlcs900h_device::_LDWRR, _R, _C16, 4 }, { &tlcs900h_device::_LDWRR, _R, _C16, 4 }, { &tlcs900h_device::_LDWRR, _R, _C16, 4 },
- { &tlcs900h_device::_LDWRR, _R, _C16, 4 }, { &tlcs900h_device::_LDWRR, _R, _C16, 4 }, { &tlcs900h_device::_LDWRR, _R, _C16, 4 }, { &tlcs900h_device::_LDWRR, _R, _C16, 4 },
+ { &tlcs900h_device::op_ADDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADDWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_ADDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADDWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_LDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_LDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_LDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_LDWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_LDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_LDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_LDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_LDWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_ADCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADCWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_ADCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ADCWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_LDWRR, p_R, p_C16, 4 }, { &tlcs900h_device::op_LDWRR, p_R, p_C16, 4 }, { &tlcs900h_device::op_LDWRR, p_R, p_C16, 4 }, { &tlcs900h_device::op_LDWRR, p_R, p_C16, 4 },
+ { &tlcs900h_device::op_LDWRR, p_R, p_C16, 4 }, { &tlcs900h_device::op_LDWRR, p_R, p_C16, 4 }, { &tlcs900h_device::op_LDWRR, p_R, p_C16, 4 }, { &tlcs900h_device::op_LDWRR, p_R, p_C16, 4 },
/* A0 - BF */
- { &tlcs900h_device::_SUBWRR, _C16, _R, 4 }, { &tlcs900h_device::_SUBWRR, _C16, _R, 4 }, { &tlcs900h_device::_SUBWRR, _C16, _R, 4 }, { &tlcs900h_device::_SUBWRR, _C16, _R, 4 },
- { &tlcs900h_device::_SUBWRR, _C16, _R, 4 }, { &tlcs900h_device::_SUBWRR, _C16, _R, 4 }, { &tlcs900h_device::_SUBWRR, _C16, _R, 4 }, { &tlcs900h_device::_SUBWRR, _C16, _R, 4 },
- { &tlcs900h_device::_LDWRI, _R, _I3, 4 }, { &tlcs900h_device::_LDWRI, _R, _I3, 4 }, { &tlcs900h_device::_LDWRI, _R, _I3, 4 }, { &tlcs900h_device::_LDWRI, _R, _I3, 4 },
- { &tlcs900h_device::_LDWRI, _R, _I3, 4 }, { &tlcs900h_device::_LDWRI, _R, _I3, 4 }, { &tlcs900h_device::_LDWRI, _R, _I3, 4 }, { &tlcs900h_device::_LDWRI, _R, _I3, 4 },
- { &tlcs900h_device::_SBCWRR, _C16, _R, 4 }, { &tlcs900h_device::_SBCWRR, _C16, _R, 4 }, { &tlcs900h_device::_SBCWRR, _C16, _R, 4 }, { &tlcs900h_device::_SBCWRR, _C16, _R, 4 },
- { &tlcs900h_device::_SBCWRR, _C16, _R, 4 }, { &tlcs900h_device::_SBCWRR, _C16, _R, 4 }, { &tlcs900h_device::_SBCWRR, _C16, _R, 4 }, { &tlcs900h_device::_SBCWRR, _C16, _R, 4 },
- { &tlcs900h_device::_EXWRR, _C16, _R, 5 }, { &tlcs900h_device::_EXWRR, _C16, _R, 5 }, { &tlcs900h_device::_EXWRR, _C16, _R, 5 }, { &tlcs900h_device::_EXWRR, _C16, _R, 5 },
- { &tlcs900h_device::_EXWRR, _C16, _R, 5 }, { &tlcs900h_device::_EXWRR, _C16, _R, 5 }, { &tlcs900h_device::_EXWRR, _C16, _R, 5 }, { &tlcs900h_device::_EXWRR, _C16, _R, 5 },
+ { &tlcs900h_device::op_SUBWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SUBWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SUBWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SUBWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_SUBWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SUBWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SUBWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SUBWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_LDWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDWRI, p_R, p_I3, 4 },
+ { &tlcs900h_device::op_LDWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDWRI, p_R, p_I3, 4 },
+ { &tlcs900h_device::op_SBCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SBCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SBCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SBCWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_SBCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SBCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SBCWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_SBCWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_EXWRR, p_C16, p_R, 5 }, { &tlcs900h_device::op_EXWRR, p_C16, p_R, 5 }, { &tlcs900h_device::op_EXWRR, p_C16, p_R, 5 }, { &tlcs900h_device::op_EXWRR, p_C16, p_R, 5 },
+ { &tlcs900h_device::op_EXWRR, p_C16, p_R, 5 }, { &tlcs900h_device::op_EXWRR, p_C16, p_R, 5 }, { &tlcs900h_device::op_EXWRR, p_C16, p_R, 5 }, { &tlcs900h_device::op_EXWRR, p_C16, p_R, 5 },
/* C0 - DF */
- { &tlcs900h_device::_ANDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ANDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ANDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ANDWRR, _C16, _R, 4 },
- { &tlcs900h_device::_ANDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ANDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ANDWRR, _C16, _R, 4 }, { &tlcs900h_device::_ANDWRR, _C16, _R, 4 },
- { &tlcs900h_device::_ADDWRI, _R, _I16, 4 }, { &tlcs900h_device::_ADCWRI, _R, _I16, 4 }, { &tlcs900h_device::_SUBWRI, _R, _I16, 4 }, { &tlcs900h_device::_SBCWRI, _R, _I16, 4 },
- { &tlcs900h_device::_ANDWRI, _R, _I16, 4 }, { &tlcs900h_device::_XORWRI, _R, _I16, 4 }, { &tlcs900h_device::_ORWRI, _R, _I16, 4 }, { &tlcs900h_device::_CPWRI, _R, _I16, 4 },
- { &tlcs900h_device::_XORWRR, _C16, _R, 4 }, { &tlcs900h_device::_XORWRR, _C16, _R, 4 }, { &tlcs900h_device::_XORWRR, _C16, _R, 4 }, { &tlcs900h_device::_XORWRR, _C16, _R, 4 },
- { &tlcs900h_device::_XORWRR, _C16, _R, 4 }, { &tlcs900h_device::_XORWRR, _C16, _R, 4 }, { &tlcs900h_device::_XORWRR, _C16, _R, 4 }, { &tlcs900h_device::_XORWRR, _C16, _R, 4 },
- { &tlcs900h_device::_CPWRI, _R, _I3, 4 }, { &tlcs900h_device::_CPWRI, _R, _I3, 4 }, { &tlcs900h_device::_CPWRI, _R, _I3, 4 }, { &tlcs900h_device::_CPWRI, _R, _I3, 4 },
- { &tlcs900h_device::_CPWRI, _R, _I3, 4 }, { &tlcs900h_device::_CPWRI, _R, _I3, 4 }, { &tlcs900h_device::_CPWRI, _R, _I3, 4 }, { &tlcs900h_device::_CPWRI, _R, _I3, 4 },
+ { &tlcs900h_device::op_ANDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ANDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ANDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ANDWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_ANDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ANDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ANDWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ANDWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_ADDWRI, p_R, p_I16, 4 }, { &tlcs900h_device::op_ADCWRI, p_R, p_I16, 4 }, { &tlcs900h_device::op_SUBWRI, p_R, p_I16, 4 }, { &tlcs900h_device::op_SBCWRI, p_R, p_I16, 4 },
+ { &tlcs900h_device::op_ANDWRI, p_R, p_I16, 4 }, { &tlcs900h_device::op_XORWRI, p_R, p_I16, 4 }, { &tlcs900h_device::op_ORWRI, p_R, p_I16, 4 }, { &tlcs900h_device::op_CPWRI, p_R, p_I16, 4 },
+ { &tlcs900h_device::op_XORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_XORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_XORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_XORWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_XORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_XORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_XORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_XORWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_CPWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPWRI, p_R, p_I3, 4 },
+ { &tlcs900h_device::op_CPWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPWRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_CPWRI, p_R, p_I3, 4 },
/* E0 - FF */
- { &tlcs900h_device::_ORWRR, _C16, _R, 4 }, { &tlcs900h_device::_ORWRR, _C16, _R, 4 }, { &tlcs900h_device::_ORWRR, _C16, _R, 4 }, { &tlcs900h_device::_ORWRR, _C16, _R, 4 },
- { &tlcs900h_device::_ORWRR, _C16, _R, 4 }, { &tlcs900h_device::_ORWRR, _C16, _R, 4 }, { &tlcs900h_device::_ORWRR, _C16, _R, 4 }, { &tlcs900h_device::_ORWRR, _C16, _R, 4 },
- { &tlcs900h_device::_RLCWIR, _I8, _R, 6 }, { &tlcs900h_device::_RRCWIR, _I8, _R, 6 }, { &tlcs900h_device::_RLWIR, _I8, _R, 6 }, { &tlcs900h_device::_RRWIR, _I8, _R, 6 },
- { &tlcs900h_device::_SLAWIR, _I8, _R, 6 }, { &tlcs900h_device::_SRAWIR, _I8, _R, 6 }, { &tlcs900h_device::_SLLWIR, _I8, _R, 6 }, { &tlcs900h_device::_SRLWIR, _I8, _R, 6 },
- { &tlcs900h_device::_CPWRR, _C16, _R, 4 }, { &tlcs900h_device::_CPWRR, _C16, _R, 4 }, { &tlcs900h_device::_CPWRR, _C16, _R, 4 }, { &tlcs900h_device::_CPWRR, _C16, _R, 4 },
- { &tlcs900h_device::_CPWRR, _C16, _R, 4 }, { &tlcs900h_device::_CPWRR, _C16, _R, 4 }, { &tlcs900h_device::_CPWRR, _C16, _R, 4 }, { &tlcs900h_device::_CPWRR, _C16, _R, 4 },
- { &tlcs900h_device::_RLCWRR, _A, _R, 6 }, { &tlcs900h_device::_RRCWRR, _A, _R, 6 }, { &tlcs900h_device::_RLWRR, _A, _R, 6 }, { &tlcs900h_device::_RRWRR, _A, _R, 6 },
- { &tlcs900h_device::_SLAWRR, _A, _R, 6 }, { &tlcs900h_device::_SRAWRR, _A, _R, 6 }, { &tlcs900h_device::_SLLWRR, _A, _R, 6 }, { &tlcs900h_device::_SRLWRR, _A, _R, 6 }
+ { &tlcs900h_device::op_ORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ORWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_ORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ORWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_ORWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_RLCWIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_RRCWIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_RLWIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_RRWIR, p_I8, p_R, 6 },
+ { &tlcs900h_device::op_SLAWIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_SRAWIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_SLLWIR, p_I8, p_R, 6 }, { &tlcs900h_device::op_SRLWIR, p_I8, p_R, 6 },
+ { &tlcs900h_device::op_CPWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_CPWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_CPWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_CPWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_CPWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_CPWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_CPWRR, p_C16, p_R, 4 }, { &tlcs900h_device::op_CPWRR, p_C16, p_R, 4 },
+ { &tlcs900h_device::op_RLCWRR, p_A, p_R, 6 }, { &tlcs900h_device::op_RRCWRR, p_A, p_R, 6 }, { &tlcs900h_device::op_RLWRR, p_A, p_R, 6 }, { &tlcs900h_device::op_RRWRR, p_A, p_R, 6 },
+ { &tlcs900h_device::op_SLAWRR, p_A, p_R, 6 }, { &tlcs900h_device::op_SRAWRR, p_A, p_R, 6 }, { &tlcs900h_device::op_SLLWRR, p_A, p_R, 6 }, { &tlcs900h_device::op_SRLWRR, p_A, p_R, 6 }
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_e0[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 }, { &tlcs900h_device::_LDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_LDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 40 - 5F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 60 - 7F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADDLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 }, { &tlcs900h_device::_ADCLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 }, { &tlcs900h_device::_ADCLMR, _M, _C32, 10 },
+ { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADDLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ADCLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ADCLMR, p_M, p_C32, 10 },
/* A0 - BF */
- { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 },
- { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 }, { &tlcs900h_device::_SUBLRM, _C32, _M, 6 },
- { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 },
- { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 }, { &tlcs900h_device::_SUBLMR, _M, _C32, 10 },
- { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 },
- { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 }, { &tlcs900h_device::_SBCLRM, _C32, _M, 6 },
- { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 },
- { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 }, { &tlcs900h_device::_SBCLMR, _M, _C32, 10 },
+ { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SUBLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SUBLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_SBCLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_SBCLMR, p_M, p_C32, 10 },
/* C0 - DF */
- { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 }, { &tlcs900h_device::_ANDLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 }, { &tlcs900h_device::_ANDLMR, _M, _C32, 10 },
- { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 },
- { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 }, { &tlcs900h_device::_XORLRM, _C32, _M, 6 },
- { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 },
- { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 }, { &tlcs900h_device::_XORLMR, _M, _C32, 10 },
+ { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ANDLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ANDLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_XORLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_XORLMR, p_M, p_C32, 10 },
/* E0 - FF */
- { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 }, { &tlcs900h_device::_ORLRM, _C32, _M, 6 },
- { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 },
- { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 }, { &tlcs900h_device::_ORLMR, _M, _C32, 10 },
- { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 },
- { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 }, { &tlcs900h_device::_CPLRM, _C32, _M, 6 },
- { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 },
- { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 }, { &tlcs900h_device::_CPLMR, _M, _C32, 6 },
+ { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_ORLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 }, { &tlcs900h_device::op_ORLMR, p_M, p_C32, 10 },
+ { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 }, { &tlcs900h_device::op_CPLRM, p_C32, p_M, 6 },
+ { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 },
+ { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_CPLMR, p_M, p_C32, 6 },
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_e8[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDLRI, _R, _I32, 6 },
- { &tlcs900h_device::_PUSHLR, _R, 0, 7 }, { &tlcs900h_device::_POPLR, _R, 0, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LINK, _R, _I16, 10 }, { &tlcs900h_device::_UNLK, _R, 0, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_EXTZLR, _R, 0, 4 }, { &tlcs900h_device::_EXTSLR, _R, 0, 5 },
- { &tlcs900h_device::_PAALR, _R, 0, 4 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDLRI, p_R, p_I32, 6 },
+ { &tlcs900h_device::op_PUSHLR, p_R, 0, 7 }, { &tlcs900h_device::op_POPLR, p_R, 0, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LINK, p_R, p_I16, 10 }, { &tlcs900h_device::op_UNLK, p_R, 0, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_EXTZLR, p_R, 0, 4 }, { &tlcs900h_device::op_EXTSLR, p_R, 0, 5 },
+ { &tlcs900h_device::op_PAALR, p_R, 0, 4 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDCLRR, _CR32, _R, 1 }, { &tlcs900h_device::_LDCLRR, _R, _CR32, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDCLRR, p_CR32, p_R, 1 }, { &tlcs900h_device::op_LDCLRR, p_R, p_CR32, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 40 - 5F */
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 60 - 7F */
- { &tlcs900h_device::_INCLIR, _I3, _R, 4 }, { &tlcs900h_device::_INCLIR, _I3, _R, 4 }, { &tlcs900h_device::_INCLIR, _I3, _R, 4 }, { &tlcs900h_device::_INCLIR, _I3, _R, 4 },
- { &tlcs900h_device::_INCLIR, _I3, _R, 4 }, { &tlcs900h_device::_INCLIR, _I3, _R, 4 }, { &tlcs900h_device::_INCLIR, _I3, _R, 4 }, { &tlcs900h_device::_INCLIR, _I3, _R, 4 },
- { &tlcs900h_device::_DECLIR, _I3, _R, 4 }, { &tlcs900h_device::_DECLIR, _I3, _R, 4 }, { &tlcs900h_device::_DECLIR, _I3, _R, 4 }, { &tlcs900h_device::_DECLIR, _I3, _R, 4 },
- { &tlcs900h_device::_DECLIR, _I3, _R, 4 }, { &tlcs900h_device::_DECLIR, _I3, _R, 4 }, { &tlcs900h_device::_DECLIR, _I3, _R, 4 }, { &tlcs900h_device::_DECLIR, _I3, _R, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_INCLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCLIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_INCLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_INCLIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_DECLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECLIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_DECLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECLIR, p_I3, p_R, 4 }, { &tlcs900h_device::op_DECLIR, p_I3, p_R, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 80 - 9F */
- { &tlcs900h_device::_ADDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADDLRR, _C32, _R, 7 },
- { &tlcs900h_device::_ADDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADDLRR, _C32, _R, 7 },
- { &tlcs900h_device::_LDLRR, _C32, _R, 4 }, { &tlcs900h_device::_LDLRR, _C32, _R, 4 }, { &tlcs900h_device::_LDLRR, _C32, _R, 4 }, { &tlcs900h_device::_LDLRR, _C32, _R, 4 },
- { &tlcs900h_device::_LDLRR, _C32, _R, 4 }, { &tlcs900h_device::_LDLRR, _C32, _R, 4 }, { &tlcs900h_device::_LDLRR, _C32, _R, 4 }, { &tlcs900h_device::_LDLRR, _C32, _R, 4 },
- { &tlcs900h_device::_ADCLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADCLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADCLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADCLRR, _C32, _R, 7 },
- { &tlcs900h_device::_ADCLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADCLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADCLRR, _C32, _R, 7 }, { &tlcs900h_device::_ADCLRR, _C32, _R, 7 },
- { &tlcs900h_device::_LDLRR, _R, _C32, 4 }, { &tlcs900h_device::_LDLRR, _R, _C32, 4 }, { &tlcs900h_device::_LDLRR, _R, _C32, 4 }, { &tlcs900h_device::_LDLRR, _R, _C32, 4 },
- { &tlcs900h_device::_LDLRR, _R, _C32, 4 }, { &tlcs900h_device::_LDLRR, _R, _C32, 4 }, { &tlcs900h_device::_LDLRR, _R, _C32, 4 }, { &tlcs900h_device::_LDLRR, _R, _C32, 4 },
+ { &tlcs900h_device::op_ADDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADDLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_ADDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADDLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_LDLRR, p_C32, p_R, 4 }, { &tlcs900h_device::op_LDLRR, p_C32, p_R, 4 }, { &tlcs900h_device::op_LDLRR, p_C32, p_R, 4 }, { &tlcs900h_device::op_LDLRR, p_C32, p_R, 4 },
+ { &tlcs900h_device::op_LDLRR, p_C32, p_R, 4 }, { &tlcs900h_device::op_LDLRR, p_C32, p_R, 4 }, { &tlcs900h_device::op_LDLRR, p_C32, p_R, 4 }, { &tlcs900h_device::op_LDLRR, p_C32, p_R, 4 },
+ { &tlcs900h_device::op_ADCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADCLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_ADCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ADCLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_LDLRR, p_R, p_C32, 4 }, { &tlcs900h_device::op_LDLRR, p_R, p_C32, 4 }, { &tlcs900h_device::op_LDLRR, p_R, p_C32, 4 }, { &tlcs900h_device::op_LDLRR, p_R, p_C32, 4 },
+ { &tlcs900h_device::op_LDLRR, p_R, p_C32, 4 }, { &tlcs900h_device::op_LDLRR, p_R, p_C32, 4 }, { &tlcs900h_device::op_LDLRR, p_R, p_C32, 4 }, { &tlcs900h_device::op_LDLRR, p_R, p_C32, 4 },
/* A0 - BF */
- { &tlcs900h_device::_SUBLRR, _C32, _R, 7 }, { &tlcs900h_device::_SUBLRR, _C32, _R, 7 }, { &tlcs900h_device::_SUBLRR, _C32, _R, 7 }, { &tlcs900h_device::_SUBLRR, _C32, _R, 7 },
- { &tlcs900h_device::_SUBLRR, _C32, _R, 7 }, { &tlcs900h_device::_SUBLRR, _C32, _R, 7 }, { &tlcs900h_device::_SUBLRR, _C32, _R, 7 }, { &tlcs900h_device::_SUBLRR, _C32, _R, 7 },
- { &tlcs900h_device::_LDLRI, _R, _I3, 4 }, { &tlcs900h_device::_LDLRI, _R, _I3, 4 }, { &tlcs900h_device::_LDLRI, _R, _I3, 4 }, { &tlcs900h_device::_LDLRI, _R, _I3, 4 },
- { &tlcs900h_device::_LDLRI, _R, _I3, 4 }, { &tlcs900h_device::_LDLRI, _R, _I3, 4 }, { &tlcs900h_device::_LDLRI, _R, _I3, 4 }, { &tlcs900h_device::_LDLRI, _R, _I3, 4 },
- { &tlcs900h_device::_SBCLRR, _C32, _R, 7 }, { &tlcs900h_device::_SBCLRR, _C32, _R, 7 }, { &tlcs900h_device::_SBCLRR, _C32, _R, 7 }, { &tlcs900h_device::_SBCLRR, _C32, _R, 7 },
- { &tlcs900h_device::_SBCLRR, _C32, _R, 7 }, { &tlcs900h_device::_SBCLRR, _C32, _R, 7 }, { &tlcs900h_device::_SBCLRR, _C32, _R, 7 }, { &tlcs900h_device::_SBCLRR, _C32, _R, 7 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_SUBLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SUBLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SUBLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SUBLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_SUBLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SUBLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SUBLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SUBLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_LDLRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDLRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDLRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDLRI, p_R, p_I3, 4 },
+ { &tlcs900h_device::op_LDLRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDLRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDLRI, p_R, p_I3, 4 }, { &tlcs900h_device::op_LDLRI, p_R, p_I3, 4 },
+ { &tlcs900h_device::op_SBCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SBCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SBCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SBCLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_SBCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SBCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SBCLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_SBCLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* C0 - DF */
- { &tlcs900h_device::_ANDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ANDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ANDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ANDLRR, _C32, _R, 7 },
- { &tlcs900h_device::_ANDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ANDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ANDLRR, _C32, _R, 7 }, { &tlcs900h_device::_ANDLRR, _C32, _R, 7 },
- { &tlcs900h_device::_ADDLRI, _R, _I32, 7 }, { &tlcs900h_device::_ADCLRI, _R, _I32, 7 }, { &tlcs900h_device::_SUBLRI, _R, _I32, 7 }, { &tlcs900h_device::_SBCLRI, _R, _I32, 7 },
- { &tlcs900h_device::_ANDLRI, _R, _I32, 7 }, { &tlcs900h_device::_XORLRI, _R, _I32, 7 }, { &tlcs900h_device::_ORLRI, _R, _I32, 7 }, { &tlcs900h_device::_CPLRI, _R, _I32, 7 },
- { &tlcs900h_device::_XORLRR, _C32, _R, 7 }, { &tlcs900h_device::_XORLRR, _C32, _R, 7 }, { &tlcs900h_device::_XORLRR, _C32, _R, 7 }, { &tlcs900h_device::_XORLRR, _C32, _R, 7 },
- { &tlcs900h_device::_XORLRR, _C32, _R, 7 }, { &tlcs900h_device::_XORLRR, _C32, _R, 7 }, { &tlcs900h_device::_XORLRR, _C32, _R, 7 }, { &tlcs900h_device::_XORLRR, _C32, _R, 7 },
- { &tlcs900h_device::_CPLRI, _R, _I3, 6 }, { &tlcs900h_device::_CPLRI, _R, _I3, 6 }, { &tlcs900h_device::_CPLRI, _R, _I3, 6 }, { &tlcs900h_device::_CPLRI, _R, _I3, 6 },
- { &tlcs900h_device::_CPLRI, _R, _I3, 6 }, { &tlcs900h_device::_CPLRI, _R, _I3, 6 }, { &tlcs900h_device::_CPLRI, _R, _I3, 6 }, { &tlcs900h_device::_CPLRI, _R, _I3, 6 },
+ { &tlcs900h_device::op_ANDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ANDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ANDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ANDLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_ANDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ANDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ANDLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ANDLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_ADDLRI, p_R, p_I32, 7 }, { &tlcs900h_device::op_ADCLRI, p_R, p_I32, 7 }, { &tlcs900h_device::op_SUBLRI, p_R, p_I32, 7 }, { &tlcs900h_device::op_SBCLRI, p_R, p_I32, 7 },
+ { &tlcs900h_device::op_ANDLRI, p_R, p_I32, 7 }, { &tlcs900h_device::op_XORLRI, p_R, p_I32, 7 }, { &tlcs900h_device::op_ORLRI, p_R, p_I32, 7 }, { &tlcs900h_device::op_CPLRI, p_R, p_I32, 7 },
+ { &tlcs900h_device::op_XORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_XORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_XORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_XORLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_XORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_XORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_XORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_XORLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_CPLRI, p_R, p_I3, 6 }, { &tlcs900h_device::op_CPLRI, p_R, p_I3, 6 }, { &tlcs900h_device::op_CPLRI, p_R, p_I3, 6 }, { &tlcs900h_device::op_CPLRI, p_R, p_I3, 6 },
+ { &tlcs900h_device::op_CPLRI, p_R, p_I3, 6 }, { &tlcs900h_device::op_CPLRI, p_R, p_I3, 6 }, { &tlcs900h_device::op_CPLRI, p_R, p_I3, 6 }, { &tlcs900h_device::op_CPLRI, p_R, p_I3, 6 },
/* E0 - FF */
- { &tlcs900h_device::_ORLRR, _C32, _R, 7 }, { &tlcs900h_device::_ORLRR, _C32, _R, 7 }, { &tlcs900h_device::_ORLRR, _C32, _R, 7 }, { &tlcs900h_device::_ORLRR, _C32, _R, 7 },
- { &tlcs900h_device::_ORLRR, _C32, _R, 7 }, { &tlcs900h_device::_ORLRR, _C32, _R, 7 }, { &tlcs900h_device::_ORLRR, _C32, _R, 7 }, { &tlcs900h_device::_ORLRR, _C32, _R, 7 },
- { &tlcs900h_device::_RLCLIR, _I8, _R, 8 }, { &tlcs900h_device::_RRCLIR, _I8, _R, 8 }, { &tlcs900h_device::_RLLIR, _I8, _R, 8 }, { &tlcs900h_device::_RRLIR, _I8, _R, 8 },
- { &tlcs900h_device::_SLALIR, _I8, _R, 8 }, { &tlcs900h_device::_SRALIR, _I8, _R, 8 }, { &tlcs900h_device::_SLLLIR, _I8, _R, 8 }, { &tlcs900h_device::_SRLLIR, _I8, _R, 8 },
- { &tlcs900h_device::_CPLRR, _C32, _R, 7 }, { &tlcs900h_device::_CPLRR, _C32, _R, 7 }, { &tlcs900h_device::_CPLRR, _C32, _R, 7 }, { &tlcs900h_device::_CPLRR, _C32, _R, 7 },
- { &tlcs900h_device::_CPLRR, _C32, _R, 7 }, { &tlcs900h_device::_CPLRR, _C32, _R, 7 }, { &tlcs900h_device::_CPLRR, _C32, _R, 7 }, { &tlcs900h_device::_CPLRR, _C32, _R, 7 },
- { &tlcs900h_device::_RLCLRR, _A, _R, 8 }, { &tlcs900h_device::_RRCLRR, _A, _R, 8 }, { &tlcs900h_device::_RLLRR, _A, _R, 8 }, { &tlcs900h_device::_RRLRR, _A, _R, 8 },
- { &tlcs900h_device::_SLALRR, _A, _R, 8 }, { &tlcs900h_device::_SRALRR, _A, _R, 8 }, { &tlcs900h_device::_SLLLRR, _A, _R, 8 }, { &tlcs900h_device::_SRLLRR, _A, _R, 8 }
+ { &tlcs900h_device::op_ORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ORLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_ORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ORLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_ORLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_RLCLIR, p_I8, p_R, 8 }, { &tlcs900h_device::op_RRCLIR, p_I8, p_R, 8 }, { &tlcs900h_device::op_RLLIR, p_I8, p_R, 8 }, { &tlcs900h_device::op_RRLIR, p_I8, p_R, 8 },
+ { &tlcs900h_device::op_SLALIR, p_I8, p_R, 8 }, { &tlcs900h_device::op_SRALIR, p_I8, p_R, 8 }, { &tlcs900h_device::op_SLLLIR, p_I8, p_R, 8 }, { &tlcs900h_device::op_SRLLIR, p_I8, p_R, 8 },
+ { &tlcs900h_device::op_CPLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_CPLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_CPLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_CPLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_CPLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_CPLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_CPLRR, p_C32, p_R, 7 }, { &tlcs900h_device::op_CPLRR, p_C32, p_R, 7 },
+ { &tlcs900h_device::op_RLCLRR, p_A, p_R, 8 }, { &tlcs900h_device::op_RRCLRR, p_A, p_R, 8 }, { &tlcs900h_device::op_RLLRR, p_A, p_R, 8 }, { &tlcs900h_device::op_RRLRR, p_A, p_R, 8 },
+ { &tlcs900h_device::op_SLALRR, p_A, p_R, 8 }, { &tlcs900h_device::op_SRALRR, p_A, p_R, 8 }, { &tlcs900h_device::op_SLLLRR, p_A, p_R, 8 }, { &tlcs900h_device::op_SRLLRR, p_A, p_R, 8 }
};
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic_f0[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_LDBMI, _M, _I8, 5 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMI, _M, _I16, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_POPBM, _M, 0, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_POPWM, _M, 0, 6 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDBMM, _M, _M16, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_LDWMM, _M, _M16, 8 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMI, p_M, p_I8, 5 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMI, p_M, p_I16, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_POPBM, p_M, 0, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_POPWM, p_M, 0, 6 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMM, p_M, p_M16, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_LDWMM, p_M, p_M16, 8 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 },
- { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 }, { &tlcs900h_device::_LDAW, _C16, _M, 4 },
- { &tlcs900h_device::_ANDCFBRM, _A, _M, 4 }, { &tlcs900h_device::_ORCFBRM, _A, _M, 4 }, { &tlcs900h_device::_XORCFBRM, _A, _M, 4 }, { &tlcs900h_device::_LDCFBRM, _A, _M, 4 },
- { &tlcs900h_device::_STCFBRM, _A, _M, 4 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 },
- { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 }, { &tlcs900h_device::_LDAL, _C32, _M, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 }, { &tlcs900h_device::op_LDAW, p_C16, p_M, 4 },
+ { &tlcs900h_device::op_ANDCFBRM, p_A, p_M, 4 }, { &tlcs900h_device::op_ORCFBRM, p_A, p_M, 4 }, { &tlcs900h_device::op_XORCFBRM, p_A, p_M, 4 }, { &tlcs900h_device::op_LDCFBRM, p_A, p_M, 4 },
+ { &tlcs900h_device::op_STCFBRM, p_A, p_M, 4 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 },
+ { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 }, { &tlcs900h_device::op_LDAL, p_C32, p_M, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 40 - 5F */
- { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 },
- { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 }, { &tlcs900h_device::_LDBMR, _M, _C8, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 },
- { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 }, { &tlcs900h_device::_LDWMR, _M, _C16, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 },
+ { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 }, { &tlcs900h_device::op_LDBMR, p_M, p_C8, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 },
+ { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 }, { &tlcs900h_device::op_LDWMR, p_M, p_C16, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 60 - 7F */
- { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 },
- { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 }, { &tlcs900h_device::_LDLMR, _M, _C32, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 },
+ { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 }, { &tlcs900h_device::op_LDLMR, p_M, p_C32, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 80 - 9F */
- { &tlcs900h_device::_ANDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_ANDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ANDCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_ORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_ORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_ORCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_XORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_XORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_XORCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_LDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_LDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_LDCFBIM, _I3, _M, 4 },
+ { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ANDCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_ORCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_XORCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_LDCFBIM, p_I3, p_M, 4 },
/* A0 - BF */
- { &tlcs900h_device::_STCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_STCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 4 }, { &tlcs900h_device::_STCFBIM, _I3, _M, 4 },
- { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 },
- { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 }, { &tlcs900h_device::_TSETBIM, _I3, _M, 10 },
- { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 },
- { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 }, { &tlcs900h_device::_RESBIM, _I3, _M, 8 },
- { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 },
- { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 }, { &tlcs900h_device::_SETBIM, _I3, _M, 8 },
+ { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_STCFBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 },
+ { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 }, { &tlcs900h_device::op_TSETBIM, p_I3, p_M, 10 },
+ { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_RESBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_SETBIM, p_I3, p_M, 8 },
/* C0 - DF */
- { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 },
- { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 }, { &tlcs900h_device::_CHGBIM, _I3, _M, 8 },
- { &tlcs900h_device::_BITBIM, _I3, _M, 4 }, { &tlcs900h_device::_BITBIM, _I3, _M, 4 }, { &tlcs900h_device::_BITBIM, _I3, _M, 4 }, { &tlcs900h_device::_BITBIM, _I3, _M, 4 },
- { &tlcs900h_device::_BITBIM, _I3, _M, 4 }, { &tlcs900h_device::_BITBIM, _I3, _M, 4 }, { &tlcs900h_device::_BITBIM, _I3, _M, 4 }, { &tlcs900h_device::_BITBIM, _I3, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
- { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 }, { &tlcs900h_device::_JPM, _CC, _M, 4 },
+ { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 }, { &tlcs900h_device::op_CHGBIM, p_I3, p_M, 8 },
+ { &tlcs900h_device::op_BITBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_BITBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 4 }, { &tlcs900h_device::op_BITBIM, p_I3, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
+ { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 }, { &tlcs900h_device::op_JPM, p_CC, p_M, 4 },
/* E0 - FF */
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 }, { &tlcs900h_device::_CALLM, _CC, _M, 6 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 }, { &tlcs900h_device::op_CALLM, p_CC, p_M, 6 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }
};
/* (XWA/XBC/XDE/XHL/XIX/XIY/XIZ/XSP) used as source in byte operations */
-void tlcs900h_device::_80()
+void tlcs900h_device::op_80()
{
const tlcs900inst *inst;
@@ -5349,7 +5349,7 @@ void tlcs900h_device::_80()
/* (XWA/XBC/XDE/XHL/XIX/XIY/XIZ/XSP + d8) used as source in byte operations */
-void tlcs900h_device::_88()
+void tlcs900h_device::op_88()
{
const tlcs900inst *inst;
@@ -5370,7 +5370,7 @@ void tlcs900h_device::_88()
/* (XWA/XBC/XDE/XHL/XIXI/XIY/XIZ/XSP) used as source in word operations */
-void tlcs900h_device::_90()
+void tlcs900h_device::op_90()
{
const tlcs900inst *inst;
@@ -5388,7 +5388,7 @@ void tlcs900h_device::_90()
/* (XWA/XBC/XDE/XHL/XIX/XIY/XIZ/XSP + d8) used as source in word operations */
-void tlcs900h_device::_98()
+void tlcs900h_device::op_98()
{
const tlcs900inst *inst;
@@ -5405,7 +5405,7 @@ void tlcs900h_device::_98()
/* (XWA/XBC/XDE/XHL/XIX/XIY/XIZ/XSP) used as source in long word operations */
-void tlcs900h_device::_A0()
+void tlcs900h_device::op_A0()
{
const tlcs900inst *inst;
@@ -5419,7 +5419,7 @@ void tlcs900h_device::_A0()
/* (XWA/XBC/XDE/XHL/XIX/XIY/XIZ/XSP + d8) used as source in long word operations */
-void tlcs900h_device::_A8()
+void tlcs900h_device::op_A8()
{
const tlcs900inst *inst;
@@ -5436,7 +5436,7 @@ void tlcs900h_device::_A8()
/* (XWA/XBC/XDE/XHL/XIX/XIY/XIZ/XSP) used as destination in operations */
-void tlcs900h_device::_B0()
+void tlcs900h_device::op_B0()
{
const tlcs900inst *inst;
@@ -5450,7 +5450,7 @@ void tlcs900h_device::_B0()
/* (XWA/XBC/XDE/XHL/XIX/XIY/XIZ/XSP + d8) used as destination in operations */
-void tlcs900h_device::_B8()
+void tlcs900h_device::op_B8()
{
const tlcs900inst *inst;
@@ -5467,7 +5467,7 @@ void tlcs900h_device::_B8()
/* memory used as source in byte operations */
-void tlcs900h_device::_C0()
+void tlcs900h_device::op_C0()
{
const tlcs900inst *inst;
uint32_t *reg = nullptr;
@@ -5596,7 +5596,7 @@ void tlcs900h_device::oC8()
/* memory used as source in word operations */
-void tlcs900h_device::_D0()
+void tlcs900h_device::op_D0()
{
const tlcs900inst *inst;
uint32_t *reg = nullptr;
@@ -5723,7 +5723,7 @@ void tlcs900h_device::oD8()
/* memory used as source in long word operations */
-void tlcs900h_device::_E0()
+void tlcs900h_device::op_E0()
{
const tlcs900inst *inst;
uint32_t *reg = nullptr;
@@ -5826,7 +5826,7 @@ void tlcs900h_device::_E0()
}
-void tlcs900h_device::_E8()
+void tlcs900h_device::op_E8()
{
const tlcs900inst *inst;
@@ -5848,7 +5848,7 @@ void tlcs900h_device::_E8()
/* memory used as destination operations */
-void tlcs900h_device::_F0()
+void tlcs900h_device::op_F0()
{
const tlcs900inst *inst;
uint32_t *reg = nullptr;
@@ -5955,82 +5955,82 @@ void tlcs900h_device::_F0()
const tlcs900h_device::tlcs900inst tlcs900h_device::s_mnemonic[256] =
{
/* 00 - 1F */
- { &tlcs900h_device::_NOP, 0, 0, 1 }, { &tlcs900h_device::_NORMAL, 0, 0, 4 }, { &tlcs900h_device::_PUSHWR, _SR, 0, 4 }, { &tlcs900h_device::_POPWSR, _SR, 0, 6 },
- { &tlcs900h_device::_MAX, 0, 0, 4 }, { &tlcs900h_device::_HALT, 0, 0, 8 }, { &tlcs900h_device::_EI, _I8, 0, 5 }, { &tlcs900h_device::_RETI, 0, 0, 12 },
- { &tlcs900h_device::_LDBMI, _M8, _I8, 5 }, { &tlcs900h_device::_PUSHBI, _I8, 0, 4 }, { &tlcs900h_device::_LDWMI, _M8, _I16, 6 }, { &tlcs900h_device::_PUSHWI, _I16, 0, 5 },
- { &tlcs900h_device::_INCF, 0, 0, 2 }, { &tlcs900h_device::_DECF, 0, 0, 2 }, { &tlcs900h_device::_RET, 0, 0, 9 }, { &tlcs900h_device::_RETD, _I16, 0, 9 },
- { &tlcs900h_device::_RCF, 0, 0, 2 }, { &tlcs900h_device::_SCF, 0, 0, 2 }, { &tlcs900h_device::_CCF, 0, 0, 2 }, { &tlcs900h_device::_ZCF, 0, 0, 2 },
- { &tlcs900h_device::_PUSHBR, _A, 0, 3 }, { &tlcs900h_device::_POPBR, _A, 0, 4 }, { &tlcs900h_device::_EXBRR, _F, _F, 2 }, { &tlcs900h_device::_LDF, _I8, 0, 2 },
- { &tlcs900h_device::_PUSHBR, _F, 0, 3 }, { &tlcs900h_device::_POPBR, _F, 0, 4 }, { &tlcs900h_device::_JPI, _I16, 0, 7 }, { &tlcs900h_device::_JPI, _I24, 0, 7 },
- { &tlcs900h_device::_CALLI, _I16, 0, 12 }, { &tlcs900h_device::_CALLI, _I24, 0, 12 }, { &tlcs900h_device::_CALR, _D16, 0, 12 }, { &tlcs900h_device::_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_NOP, 0, 0, 1 }, { &tlcs900h_device::op_NORMAL, 0, 0, 4 }, { &tlcs900h_device::op_PUSHWR, p_SR, 0, 4 }, { &tlcs900h_device::op_POPWSR, p_SR, 0, 6 },
+ { &tlcs900h_device::op_MAX, 0, 0, 4 }, { &tlcs900h_device::op_HALT, 0, 0, 8 }, { &tlcs900h_device::op_EI, p_I8, 0, 5 }, { &tlcs900h_device::op_RETI, 0, 0, 12 },
+ { &tlcs900h_device::op_LDBMI, p_M8, p_I8, 5 }, { &tlcs900h_device::op_PUSHBI, p_I8, 0, 4 }, { &tlcs900h_device::op_LDWMI, p_M8, p_I16, 6 }, { &tlcs900h_device::op_PUSHWI, p_I16, 0, 5 },
+ { &tlcs900h_device::op_INCF, 0, 0, 2 }, { &tlcs900h_device::op_DECF, 0, 0, 2 }, { &tlcs900h_device::op_RET, 0, 0, 9 }, { &tlcs900h_device::op_RETD, p_I16, 0, 9 },
+ { &tlcs900h_device::op_RCF, 0, 0, 2 }, { &tlcs900h_device::op_SCF, 0, 0, 2 }, { &tlcs900h_device::op_CCF, 0, 0, 2 }, { &tlcs900h_device::op_ZCF, 0, 0, 2 },
+ { &tlcs900h_device::op_PUSHBR, p_A, 0, 3 }, { &tlcs900h_device::op_POPBR, p_A, 0, 4 }, { &tlcs900h_device::op_EXBRR, p_F, p_F, 2 }, { &tlcs900h_device::op_LDF, p_I8, 0, 2 },
+ { &tlcs900h_device::op_PUSHBR, p_F, 0, 3 }, { &tlcs900h_device::op_POPBR, p_F, 0, 4 }, { &tlcs900h_device::op_JPI, p_I16, 0, 7 }, { &tlcs900h_device::op_JPI, p_I24, 0, 7 },
+ { &tlcs900h_device::op_CALLI, p_I16, 0, 12 }, { &tlcs900h_device::op_CALLI, p_I24, 0, 12 }, { &tlcs900h_device::op_CALR, p_D16, 0, 12 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
/* 20 - 3F */
- { &tlcs900h_device::_LDBRI, _C8, _I8, 2 }, { &tlcs900h_device::_LDBRI, _C8, _I8, 2 }, { &tlcs900h_device::_LDBRI, _C8, _I8, 2 }, { &tlcs900h_device::_LDBRI, _C8, _I8, 2 },
- { &tlcs900h_device::_LDBRI, _C8, _I8, 2 }, { &tlcs900h_device::_LDBRI, _C8, _I8, 2 }, { &tlcs900h_device::_LDBRI, _C8, _I8, 2 }, { &tlcs900h_device::_LDBRI, _C8, _I8, 2 },
- { &tlcs900h_device::_PUSHWR, _C16, 0, 3 }, { &tlcs900h_device::_PUSHWR, _C16, 0, 3 }, { &tlcs900h_device::_PUSHWR, _C16, 0, 3 }, { &tlcs900h_device::_PUSHWR, _C16, 0, 3 },
- { &tlcs900h_device::_PUSHWR, _C16, 0, 3 }, { &tlcs900h_device::_PUSHWR, _C16, 0, 3 }, { &tlcs900h_device::_PUSHWR, _C16, 0, 3 }, { &tlcs900h_device::_PUSHWR, _C16, 0, 3 },
- { &tlcs900h_device::_LDWRI, _C16, _I16, 3 }, { &tlcs900h_device::_LDWRI, _C16, _I16, 3 }, { &tlcs900h_device::_LDWRI, _C16, _I16, 3 }, { &tlcs900h_device::_LDWRI, _C16, _I16, 3 },
- { &tlcs900h_device::_LDWRI, _C16, _I16, 3 }, { &tlcs900h_device::_LDWRI, _C16, _I16, 3 }, { &tlcs900h_device::_LDWRI, _C16, _I16, 3 }, { &tlcs900h_device::_LDWRI, _C16, _I16, 3 },
- { &tlcs900h_device::_PUSHLR, _C32, 0, 5 }, { &tlcs900h_device::_PUSHLR, _C32, 0, 5 }, { &tlcs900h_device::_PUSHLR, _C32, 0, 5 }, { &tlcs900h_device::_PUSHLR, _C32, 0, 5 },
- { &tlcs900h_device::_PUSHLR, _C32, 0, 5 }, { &tlcs900h_device::_PUSHLR, _C32, 0, 5 }, { &tlcs900h_device::_PUSHLR, _C32, 0, 5 }, { &tlcs900h_device::_PUSHLR, _C32, 0, 5 },
+ { &tlcs900h_device::op_LDBRI, p_C8, p_I8, 2 }, { &tlcs900h_device::op_LDBRI, p_C8, p_I8, 2 }, { &tlcs900h_device::op_LDBRI, p_C8, p_I8, 2 }, { &tlcs900h_device::op_LDBRI, p_C8, p_I8, 2 },
+ { &tlcs900h_device::op_LDBRI, p_C8, p_I8, 2 }, { &tlcs900h_device::op_LDBRI, p_C8, p_I8, 2 }, { &tlcs900h_device::op_LDBRI, p_C8, p_I8, 2 }, { &tlcs900h_device::op_LDBRI, p_C8, p_I8, 2 },
+ { &tlcs900h_device::op_PUSHWR, p_C16, 0, 3 }, { &tlcs900h_device::op_PUSHWR, p_C16, 0, 3 }, { &tlcs900h_device::op_PUSHWR, p_C16, 0, 3 }, { &tlcs900h_device::op_PUSHWR, p_C16, 0, 3 },
+ { &tlcs900h_device::op_PUSHWR, p_C16, 0, 3 }, { &tlcs900h_device::op_PUSHWR, p_C16, 0, 3 }, { &tlcs900h_device::op_PUSHWR, p_C16, 0, 3 }, { &tlcs900h_device::op_PUSHWR, p_C16, 0, 3 },
+ { &tlcs900h_device::op_LDWRI, p_C16, p_I16, 3 }, { &tlcs900h_device::op_LDWRI, p_C16, p_I16, 3 }, { &tlcs900h_device::op_LDWRI, p_C16, p_I16, 3 }, { &tlcs900h_device::op_LDWRI, p_C16, p_I16, 3 },
+ { &tlcs900h_device::op_LDWRI, p_C16, p_I16, 3 }, { &tlcs900h_device::op_LDWRI, p_C16, p_I16, 3 }, { &tlcs900h_device::op_LDWRI, p_C16, p_I16, 3 }, { &tlcs900h_device::op_LDWRI, p_C16, p_I16, 3 },
+ { &tlcs900h_device::op_PUSHLR, p_C32, 0, 5 }, { &tlcs900h_device::op_PUSHLR, p_C32, 0, 5 }, { &tlcs900h_device::op_PUSHLR, p_C32, 0, 5 }, { &tlcs900h_device::op_PUSHLR, p_C32, 0, 5 },
+ { &tlcs900h_device::op_PUSHLR, p_C32, 0, 5 }, { &tlcs900h_device::op_PUSHLR, p_C32, 0, 5 }, { &tlcs900h_device::op_PUSHLR, p_C32, 0, 5 }, { &tlcs900h_device::op_PUSHLR, p_C32, 0, 5 },
/* 40 - 5F */
- { &tlcs900h_device::_LDLRI, _C32, _I32, 5 }, { &tlcs900h_device::_LDLRI, _C32, _I32, 5 }, { &tlcs900h_device::_LDLRI, _C32, _I32, 5 }, { &tlcs900h_device::_LDLRI, _C32, _I32, 5 },
- { &tlcs900h_device::_LDLRI, _C32, _I32, 5 }, { &tlcs900h_device::_LDLRI, _C32, _I32, 5 }, { &tlcs900h_device::_LDLRI, _C32, _I32, 5 }, { &tlcs900h_device::_LDLRI, _C32, _I32, 5 },
- { &tlcs900h_device::_POPWR, _C16, 0, 4 }, { &tlcs900h_device::_POPWR, _C16, 0, 4 }, { &tlcs900h_device::_POPWR, _C16, 0, 4 }, { &tlcs900h_device::_POPWR, _C16, 0, 4 },
- { &tlcs900h_device::_POPWR, _C16, 0, 4 }, { &tlcs900h_device::_POPWR, _C16, 0, 4 }, { &tlcs900h_device::_POPWR, _C16, 0, 4 }, { &tlcs900h_device::_POPWR, _C16, 0, 4 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 }, { &tlcs900h_device::_DB, 0, 0, 1 },
- { &tlcs900h_device::_POPLR, _C32, 0, 6 }, { &tlcs900h_device::_POPLR, _C32, 0, 6 }, { &tlcs900h_device::_POPLR, _C32, 0, 6 }, { &tlcs900h_device::_POPLR, _C32, 0, 6 },
- { &tlcs900h_device::_POPLR, _C32, 0, 6 }, { &tlcs900h_device::_POPLR, _C32, 0, 6 }, { &tlcs900h_device::_POPLR, _C32, 0, 6 }, { &tlcs900h_device::_POPLR, _C32, 0, 6 },
+ { &tlcs900h_device::op_LDLRI, p_C32, p_I32, 5 }, { &tlcs900h_device::op_LDLRI, p_C32, p_I32, 5 }, { &tlcs900h_device::op_LDLRI, p_C32, p_I32, 5 }, { &tlcs900h_device::op_LDLRI, p_C32, p_I32, 5 },
+ { &tlcs900h_device::op_LDLRI, p_C32, p_I32, 5 }, { &tlcs900h_device::op_LDLRI, p_C32, p_I32, 5 }, { &tlcs900h_device::op_LDLRI, p_C32, p_I32, 5 }, { &tlcs900h_device::op_LDLRI, p_C32, p_I32, 5 },
+ { &tlcs900h_device::op_POPWR, p_C16, 0, 4 }, { &tlcs900h_device::op_POPWR, p_C16, 0, 4 }, { &tlcs900h_device::op_POPWR, p_C16, 0, 4 }, { &tlcs900h_device::op_POPWR, p_C16, 0, 4 },
+ { &tlcs900h_device::op_POPWR, p_C16, 0, 4 }, { &tlcs900h_device::op_POPWR, p_C16, 0, 4 }, { &tlcs900h_device::op_POPWR, p_C16, 0, 4 }, { &tlcs900h_device::op_POPWR, p_C16, 0, 4 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 }, { &tlcs900h_device::op_DB, 0, 0, 1 },
+ { &tlcs900h_device::op_POPLR, p_C32, 0, 6 }, { &tlcs900h_device::op_POPLR, p_C32, 0, 6 }, { &tlcs900h_device::op_POPLR, p_C32, 0, 6 }, { &tlcs900h_device::op_POPLR, p_C32, 0, 6 },
+ { &tlcs900h_device::op_POPLR, p_C32, 0, 6 }, { &tlcs900h_device::op_POPLR, p_C32, 0, 6 }, { &tlcs900h_device::op_POPLR, p_C32, 0, 6 }, { &tlcs900h_device::op_POPLR, p_C32, 0, 6 },
/* 60 - 7F */
- { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 },
- { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 },
- { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 },
- { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 }, { &tlcs900h_device::_JR, _CC, _D8, 4 },
- { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 },
- { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 },
- { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 },
- { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 }, { &tlcs900h_device::_JRL, _CC, _D16, 4 },
+ { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 },
+ { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 },
+ { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 },
+ { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 }, { &tlcs900h_device::op_JR, p_CC, p_D8, 4 },
+ { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 },
+ { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 },
+ { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 },
+ { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 }, { &tlcs900h_device::op_JRL, p_CC, p_D16, 4 },
/* 80 - 9F */
- { &tlcs900h_device::_80, 0, 0, 0 }, { &tlcs900h_device::_80, 0, 0, 0 }, { &tlcs900h_device::_80, 0, 0, 0 }, { &tlcs900h_device::_80, 0, 0, 0 },
- { &tlcs900h_device::_80, 0, 0, 0 }, { &tlcs900h_device::_80, 0, 0, 0 }, { &tlcs900h_device::_80, 0, 0, 0 }, { &tlcs900h_device::_80, 0, 0, 0 },
- { &tlcs900h_device::_88, 0, 0, 0 }, { &tlcs900h_device::_88, 0, 0, 0 }, { &tlcs900h_device::_88, 0, 0, 0 }, { &tlcs900h_device::_88, 0, 0, 0 },
- { &tlcs900h_device::_88, 0, 0, 0 }, { &tlcs900h_device::_88, 0, 0, 0 }, { &tlcs900h_device::_88, 0, 0, 0 }, { &tlcs900h_device::_88, 0, 0, 0 },
- { &tlcs900h_device::_90, 0, 0, 0 }, { &tlcs900h_device::_90, 0, 0, 0 }, { &tlcs900h_device::_90, 0, 0, 0 }, { &tlcs900h_device::_90, 0, 0, 0 },
- { &tlcs900h_device::_90, 0, 0, 0 }, { &tlcs900h_device::_90, 0, 0, 0 }, { &tlcs900h_device::_90, 0, 0, 0 }, { &tlcs900h_device::_90, 0, 0, 0 },
- { &tlcs900h_device::_98, 0, 0, 0 }, { &tlcs900h_device::_98, 0, 0, 0 }, { &tlcs900h_device::_98, 0, 0, 0 }, { &tlcs900h_device::_98, 0, 0, 0 },
- { &tlcs900h_device::_98, 0, 0, 0 }, { &tlcs900h_device::_98, 0, 0, 0 }, { &tlcs900h_device::_98, 0, 0, 0 }, { &tlcs900h_device::_98, 0, 0, 0 },
+ { &tlcs900h_device::op_80, 0, 0, 0 }, { &tlcs900h_device::op_80, 0, 0, 0 }, { &tlcs900h_device::op_80, 0, 0, 0 }, { &tlcs900h_device::op_80, 0, 0, 0 },
+ { &tlcs900h_device::op_80, 0, 0, 0 }, { &tlcs900h_device::op_80, 0, 0, 0 }, { &tlcs900h_device::op_80, 0, 0, 0 }, { &tlcs900h_device::op_80, 0, 0, 0 },
+ { &tlcs900h_device::op_88, 0, 0, 0 }, { &tlcs900h_device::op_88, 0, 0, 0 }, { &tlcs900h_device::op_88, 0, 0, 0 }, { &tlcs900h_device::op_88, 0, 0, 0 },
+ { &tlcs900h_device::op_88, 0, 0, 0 }, { &tlcs900h_device::op_88, 0, 0, 0 }, { &tlcs900h_device::op_88, 0, 0, 0 }, { &tlcs900h_device::op_88, 0, 0, 0 },
+ { &tlcs900h_device::op_90, 0, 0, 0 }, { &tlcs900h_device::op_90, 0, 0, 0 }, { &tlcs900h_device::op_90, 0, 0, 0 }, { &tlcs900h_device::op_90, 0, 0, 0 },
+ { &tlcs900h_device::op_90, 0, 0, 0 }, { &tlcs900h_device::op_90, 0, 0, 0 }, { &tlcs900h_device::op_90, 0, 0, 0 }, { &tlcs900h_device::op_90, 0, 0, 0 },
+ { &tlcs900h_device::op_98, 0, 0, 0 }, { &tlcs900h_device::op_98, 0, 0, 0 }, { &tlcs900h_device::op_98, 0, 0, 0 }, { &tlcs900h_device::op_98, 0, 0, 0 },
+ { &tlcs900h_device::op_98, 0, 0, 0 }, { &tlcs900h_device::op_98, 0, 0, 0 }, { &tlcs900h_device::op_98, 0, 0, 0 }, { &tlcs900h_device::op_98, 0, 0, 0 },
/* A0 - BF */
- { &tlcs900h_device::_A0, 0, 0, 0 }, { &tlcs900h_device::_A0, 0, 0, 0 }, { &tlcs900h_device::_A0, 0, 0, 0 }, { &tlcs900h_device::_A0, 0, 0, 0 },
- { &tlcs900h_device::_A0, 0, 0, 0 }, { &tlcs900h_device::_A0, 0, 0, 0 }, { &tlcs900h_device::_A0, 0, 0, 0 }, { &tlcs900h_device::_A0, 0, 0, 0 },
- { &tlcs900h_device::_A8, 0, 0, 0 }, { &tlcs900h_device::_A8, 0, 0, 0 }, { &tlcs900h_device::_A8, 0, 0, 0 }, { &tlcs900h_device::_A8, 0, 0, 0 },
- { &tlcs900h_device::_A8, 0, 0, 0 }, { &tlcs900h_device::_A8, 0, 0, 0 }, { &tlcs900h_device::_A8, 0, 0, 0 }, { &tlcs900h_device::_A8, 0, 0, 0 },
- { &tlcs900h_device::_B0, 0, 0, 0 }, { &tlcs900h_device::_B0, 0, 0, 0 }, { &tlcs900h_device::_B0, 0, 0, 0 }, { &tlcs900h_device::_B0, 0, 0, 0 },
- { &tlcs900h_device::_B0, 0, 0, 0 }, { &tlcs900h_device::_B0, 0, 0, 0 }, { &tlcs900h_device::_B0, 0, 0, 0 }, { &tlcs900h_device::_B0, 0, 0, 0 },
- { &tlcs900h_device::_B8, 0, 0, 0 }, { &tlcs900h_device::_B8, 0, 0, 0 }, { &tlcs900h_device::_B8, 0, 0, 0 }, { &tlcs900h_device::_B8, 0, 0, 0 },
- { &tlcs900h_device::_B8, 0, 0, 0 }, { &tlcs900h_device::_B8, 0, 0, 0 }, { &tlcs900h_device::_B8, 0, 0, 0 }, { &tlcs900h_device::_B8, 0, 0, 0 },
+ { &tlcs900h_device::op_A0, 0, 0, 0 }, { &tlcs900h_device::op_A0, 0, 0, 0 }, { &tlcs900h_device::op_A0, 0, 0, 0 }, { &tlcs900h_device::op_A0, 0, 0, 0 },
+ { &tlcs900h_device::op_A0, 0, 0, 0 }, { &tlcs900h_device::op_A0, 0, 0, 0 }, { &tlcs900h_device::op_A0, 0, 0, 0 }, { &tlcs900h_device::op_A0, 0, 0, 0 },
+ { &tlcs900h_device::op_A8, 0, 0, 0 }, { &tlcs900h_device::op_A8, 0, 0, 0 }, { &tlcs900h_device::op_A8, 0, 0, 0 }, { &tlcs900h_device::op_A8, 0, 0, 0 },
+ { &tlcs900h_device::op_A8, 0, 0, 0 }, { &tlcs900h_device::op_A8, 0, 0, 0 }, { &tlcs900h_device::op_A8, 0, 0, 0 }, { &tlcs900h_device::op_A8, 0, 0, 0 },
+ { &tlcs900h_device::op_B0, 0, 0, 0 }, { &tlcs900h_device::op_B0, 0, 0, 0 }, { &tlcs900h_device::op_B0, 0, 0, 0 }, { &tlcs900h_device::op_B0, 0, 0, 0 },
+ { &tlcs900h_device::op_B0, 0, 0, 0 }, { &tlcs900h_device::op_B0, 0, 0, 0 }, { &tlcs900h_device::op_B0, 0, 0, 0 }, { &tlcs900h_device::op_B0, 0, 0, 0 },
+ { &tlcs900h_device::op_B8, 0, 0, 0 }, { &tlcs900h_device::op_B8, 0, 0, 0 }, { &tlcs900h_device::op_B8, 0, 0, 0 }, { &tlcs900h_device::op_B8, 0, 0, 0 },
+ { &tlcs900h_device::op_B8, 0, 0, 0 }, { &tlcs900h_device::op_B8, 0, 0, 0 }, { &tlcs900h_device::op_B8, 0, 0, 0 }, { &tlcs900h_device::op_B8, 0, 0, 0 },
/* C0 - DF */
- { &tlcs900h_device::_C0, 0, 0, 0 }, { &tlcs900h_device::_C0, 0, 0, 0 }, { &tlcs900h_device::_C0, 0, 0, 0 }, { &tlcs900h_device::_C0, 0, 0, 0 },
- { &tlcs900h_device::_C0, 0, 0, 0 }, { &tlcs900h_device::_C0, 0, 0, 0 }, { &tlcs900h_device::_DB, 0, 0, 0 }, { &tlcs900h_device::oC8, 0, 0, 0 },
+ { &tlcs900h_device::op_C0, 0, 0, 0 }, { &tlcs900h_device::op_C0, 0, 0, 0 }, { &tlcs900h_device::op_C0, 0, 0, 0 }, { &tlcs900h_device::op_C0, 0, 0, 0 },
+ { &tlcs900h_device::op_C0, 0, 0, 0 }, { &tlcs900h_device::op_C0, 0, 0, 0 }, { &tlcs900h_device::op_DB, 0, 0, 0 }, { &tlcs900h_device::oC8, 0, 0, 0 },
{ &tlcs900h_device::oC8, 0, 0, 0 }, { &tlcs900h_device::oC8, 0, 0, 0 }, { &tlcs900h_device::oC8, 0, 0, 0 }, { &tlcs900h_device::oC8, 0, 0, 0 },
{ &tlcs900h_device::oC8, 0, 0, 0 }, { &tlcs900h_device::oC8, 0, 0, 0 }, { &tlcs900h_device::oC8, 0, 0, 0 }, { &tlcs900h_device::oC8, 0, 0, 0 },
- { &tlcs900h_device::_D0, 0, 0, 0 }, { &tlcs900h_device::_D0, 0, 0, 0 }, { &tlcs900h_device::_D0, 0, 0, 0 }, { &tlcs900h_device::_D0, 0, 0, 0 },
- { &tlcs900h_device::_D0, 0, 0, 0 }, { &tlcs900h_device::_D0, 0, 0, 0 }, { &tlcs900h_device::_DB, 0, 0, 0 }, { &tlcs900h_device::oD8, 0, 0, 0 },
+ { &tlcs900h_device::op_D0, 0, 0, 0 }, { &tlcs900h_device::op_D0, 0, 0, 0 }, { &tlcs900h_device::op_D0, 0, 0, 0 }, { &tlcs900h_device::op_D0, 0, 0, 0 },
+ { &tlcs900h_device::op_D0, 0, 0, 0 }, { &tlcs900h_device::op_D0, 0, 0, 0 }, { &tlcs900h_device::op_DB, 0, 0, 0 }, { &tlcs900h_device::oD8, 0, 0, 0 },
{ &tlcs900h_device::oD8, 0, 0, 0 }, { &tlcs900h_device::oD8, 0, 0, 0 }, { &tlcs900h_device::oD8, 0, 0, 0 }, { &tlcs900h_device::oD8, 0, 0, 0 },
{ &tlcs900h_device::oD8, 0, 0, 0 }, { &tlcs900h_device::oD8, 0, 0, 0 }, { &tlcs900h_device::oD8, 0, 0, 0 }, { &tlcs900h_device::oD8, 0, 0, 0 },
/* E0 - FF */
- { &tlcs900h_device::_E0, 0, 0, 0 }, { &tlcs900h_device::_E0, 0, 0, 0 }, { &tlcs900h_device::_E0, 0, 0, 0 }, { &tlcs900h_device::_E0, 0, 0, 0 },
- { &tlcs900h_device::_E0, 0, 0, 0 }, { &tlcs900h_device::_E0, 0, 0, 0 }, { &tlcs900h_device::_DB, 0, 0, 0 }, { &tlcs900h_device::_E8, 0, 0, 0 },
- { &tlcs900h_device::_E8, 0, 0, 0 }, { &tlcs900h_device::_E8, 0, 0, 0 }, { &tlcs900h_device::_E8, 0, 0, 0 }, { &tlcs900h_device::_E8, 0, 0, 0 },
- { &tlcs900h_device::_E8, 0, 0, 0 }, { &tlcs900h_device::_E8, 0, 0, 0 }, { &tlcs900h_device::_E8, 0, 0, 0 }, { &tlcs900h_device::_E8, 0, 0, 0 },
- { &tlcs900h_device::_F0, 0, 0, 0 }, { &tlcs900h_device::_F0, 0, 0, 0 }, { &tlcs900h_device::_F0, 0, 0, 0 }, { &tlcs900h_device::_F0, 0, 0, 0 },
- { &tlcs900h_device::_F0, 0, 0, 0 }, { &tlcs900h_device::_F0, 0, 0, 0 }, { &tlcs900h_device::_DB, 0, 0, 0 }, { &tlcs900h_device::_LDX, 0, 0, 9 },
- { &tlcs900h_device::_SWI, _I3, 0, 16 }, { &tlcs900h_device::_SWI, _I3, 0, 16 }, { &tlcs900h_device::_SWI, _I3, 0, 16 }, { &tlcs900h_device::_SWI, _I3, 0, 16 },
- { &tlcs900h_device::_SWI, _I3, 0, 16 }, { &tlcs900h_device::_SWI, _I3, 0, 16 }, { &tlcs900h_device::_SWI, _I3, 0, 16 }, { &tlcs900h_device::_SWI, _I3, 0, 16 }
+ { &tlcs900h_device::op_E0, 0, 0, 0 }, { &tlcs900h_device::op_E0, 0, 0, 0 }, { &tlcs900h_device::op_E0, 0, 0, 0 }, { &tlcs900h_device::op_E0, 0, 0, 0 },
+ { &tlcs900h_device::op_E0, 0, 0, 0 }, { &tlcs900h_device::op_E0, 0, 0, 0 }, { &tlcs900h_device::op_DB, 0, 0, 0 }, { &tlcs900h_device::op_E8, 0, 0, 0 },
+ { &tlcs900h_device::op_E8, 0, 0, 0 }, { &tlcs900h_device::op_E8, 0, 0, 0 }, { &tlcs900h_device::op_E8, 0, 0, 0 }, { &tlcs900h_device::op_E8, 0, 0, 0 },
+ { &tlcs900h_device::op_E8, 0, 0, 0 }, { &tlcs900h_device::op_E8, 0, 0, 0 }, { &tlcs900h_device::op_E8, 0, 0, 0 }, { &tlcs900h_device::op_E8, 0, 0, 0 },
+ { &tlcs900h_device::op_F0, 0, 0, 0 }, { &tlcs900h_device::op_F0, 0, 0, 0 }, { &tlcs900h_device::op_F0, 0, 0, 0 }, { &tlcs900h_device::op_F0, 0, 0, 0 },
+ { &tlcs900h_device::op_F0, 0, 0, 0 }, { &tlcs900h_device::op_F0, 0, 0, 0 }, { &tlcs900h_device::op_DB, 0, 0, 0 }, { &tlcs900h_device::op_LDX, 0, 0, 9 },
+ { &tlcs900h_device::op_SWI, p_I3, 0, 16 }, { &tlcs900h_device::op_SWI, p_I3, 0, 16 }, { &tlcs900h_device::op_SWI, p_I3, 0, 16 }, { &tlcs900h_device::op_SWI, p_I3, 0, 16 },
+ { &tlcs900h_device::op_SWI, p_I3, 0, 16 }, { &tlcs900h_device::op_SWI, p_I3, 0, 16 }, { &tlcs900h_device::op_SWI, p_I3, 0, 16 }, { &tlcs900h_device::op_SWI, p_I3, 0, 16 }
};