diff options
Diffstat (limited to 'src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp')
-rw-r--r-- | src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp | 86 |
1 files changed, 43 insertions, 43 deletions
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp index 3f5a77d0217..058368d5a5d 100644 --- a/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp +++ b/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp @@ -6,19 +6,19 @@ (dst) prefix ops (f0 to f7 subtable) - (dst) address depends on the first byte of the opcode + (dst) address depends on the first byte of the opcode - F0 (x) - F1 invalid (would be (PC+A) based on the src table, check for undefined behavior?) - F2 (DE) - F3 (HL) - F4 (HL+d) - F5 invalid (would be (HL+C) based on the src table, check for undefined behavior?) - F6 (HL+) - F7 (-HL) + F0 (x) + F1 invalid (would be (PC+A) based on the src table, check for undefined behavior?) + F2 (DE) + F3 (HL) + F4 (HL+d) + F5 invalid (would be (HL+C) based on the src table, check for undefined behavior?) + F6 (HL+) + F7 (-HL) - note, in cases where the address is an immediate value, not a register (x) and (HL+d) the - immediate value is directly after the first byte of the opcode + note, in cases where the address is an immediate value, not a register (x) and (HL+d) the + immediate value is directly after the first byte of the opcode *************************************************************************************************************/ @@ -83,17 +83,17 @@ void tlcs870_device::do_LD_indst_rr(const uint8_t opbyte0, const uint8_t opbyte1 { /* OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles - LD (x), rr 1111 0000 xxxx xxxx 0001 00rr 1 - - - 5 - LD (PC+A), rr invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? - LD (DE), rr 1111 0010 0001 00rr 1 - - - 4 - LD (HL), rr 1111 0011 0001 00rr 1 - - - 4 - LD (HL+d), rr 1111 0100 dddd dddd 0001 00rr 1 - - - 6 - LD (HL+C), rr invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? - LD (HL+), rr not listed, invalid due to 16-bit op? ? ? ? ? ? - LD (-HL), rr not listed, invalid due to 16-bit op? ? ? ? ? ? - - aka LD (dst),rr - (dst) can only be (x) (pp) or (HL+d) ? not (HL+) or (-HL) ? + LD (x), rr 1111 0000 xxxx xxxx 0001 00rr 1 - - - 5 + LD (PC+A), rr invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? + LD (DE), rr 1111 0010 0001 00rr 1 - - - 4 + LD (HL), rr 1111 0011 0001 00rr 1 - - - 4 + LD (HL+d), rr 1111 0100 dddd dddd 0001 00rr 1 - - - 6 + LD (HL+C), rr invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? + LD (HL+), rr not listed, invalid due to 16-bit op? ? ? ? ? ? + LD (-HL), rr not listed, invalid due to 16-bit op? ? ? ? ? ? + + aka LD (dst),rr + (dst) can only be (x) (pp) or (HL+d) ? not (HL+) or (-HL) ? */ m_cycles += 4; @@ -111,17 +111,17 @@ void tlcs870_device::do_LD_indst_n(const uint8_t opbyte0, const uint8_t opbyte1, { /* OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles - LD (x), n not listed, redundant encoding? ? ? ? ? ? - LD (PC+A), n invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? - LD (DE), n 1111 0010 0010 1100 nnnn nnnn 1 - - - 4 - LD (HL), n not listed, redundant encoding? ? ? ? ? ? - LD (HL+d), n 1111 0100 dddd dddd 0010 1100 nnnn nnnn 1 - - - 6 - LD (HL+C), n invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? - LD (HL+), n 1111 0110 0010 1100 nnnn nnnn 1 - - - 5 - LD (-HL), n 1111 0111 0010 1100 nnnn nnnn 1 - - - 5 - - aka (dst),n - (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings? + LD (x), n not listed, redundant encoding? ? ? ? ? ? + LD (PC+A), n invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? + LD (DE), n 1111 0010 0010 1100 nnnn nnnn 1 - - - 4 + LD (HL), n not listed, redundant encoding? ? ? ? ? ? + LD (HL+d), n 1111 0100 dddd dddd 0010 1100 nnnn nnnn 1 - - - 6 + LD (HL+C), n invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? + LD (HL+), n 1111 0110 0010 1100 nnnn nnnn 1 - - - 5 + LD (-HL), n 1111 0111 0010 1100 nnnn nnnn 1 - - - 5 + + aka (dst),n + (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings? */ m_cycles += 4; @@ -135,16 +135,16 @@ void tlcs870_device::do_LD_indst_r(const uint8_t opbyte0, const uint8_t opbyte1, { /* OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles - LD (x), r 1111 0000 xxxx xxxx 0101 1rrr 1 - - - 4 - LD (PC+A), r invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? - LD (DE), r 1111 0010 0101 1rrr 1 - - - 3 - LD (HL), r 1111 0011 0101 1rrr 1 - - - 3 - LD (HL+d), r 1111 0100 dddd dddd 0101 1rrr 1 - - - 5 - LD (HL+C), r invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? - LD (HL+), r 1111 0110 0101 0rrr 1 - - - 4 (invalid if r is H or L) - LD (-HL), r 1111 0111 0101 0rrr 1 - - - 4 - - aka LD (dst),r + LD (x), r 1111 0000 xxxx xxxx 0101 1rrr 1 - - - 4 + LD (PC+A), r invalid encoding (all PC+A are invalid for dst) ? ? ? ? ? + LD (DE), r 1111 0010 0101 1rrr 1 - - - 3 + LD (HL), r 1111 0011 0101 1rrr 1 - - - 3 + LD (HL+d), r 1111 0100 dddd dddd 0101 1rrr 1 - - - 5 + LD (HL+C), r invalid encoding (all HL+C are invalid for dst) ? ? ? ? ? + LD (HL+), r 1111 0110 0101 0rrr 1 - - - 4 (invalid if r is H or L) + LD (-HL), r 1111 0111 0101 0rrr 1 - - - 4 + + aka LD (dst),r */ m_cycles += 3; |