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Diffstat (limited to 'src/devices/cpu/sonix16/sonix16d.cpp')
-rw-r--r--src/devices/cpu/sonix16/sonix16d.cpp37
1 files changed, 27 insertions, 10 deletions
diff --git a/src/devices/cpu/sonix16/sonix16d.cpp b/src/devices/cpu/sonix16/sonix16d.cpp
index 570904e7e01..cdc3d322fb6 100644
--- a/src/devices/cpu/sonix16/sonix16d.cpp
+++ b/src/devices/cpu/sonix16/sonix16d.cpp
@@ -22,9 +22,9 @@ const char *const sonix16_disassembler::conds[] = { "eq", "ne", "gt", "ge", "lt"
const char *const sonix16_disassembler::mods[] = { "", ", im", ", 1", ", -1" };
const sonix16_disassembler::instruction sonix16_disassembler::instructions[] = {
- { 0x0000, 0x8000, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "call 0x%06x", ((pc + 1) & 0xff8000) + (opcode & 0x7fff)); }},
+ { 0x0000, 0x8000, 1 | STEP_OVER, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "call 0x%06x", ((pc + 1) & 0xff8000) + (opcode & 0x7fff)); }},
{ 0x8000, 0xf000, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "jmp 0x%06x", ((pc + 1) + util::sext(opcode, 12)) & 0xffffff); }},
- { 0x9000, 0xf000, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "j%s 0x%06x", conds[(opcode >> 8) & 0xf], ((pc + 1) + util::sext(opcode, 8)) & 0xffffff); }},
+ { 0x9000, 0xf000, 1 | STEP_COND, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "j%s 0x%06x", conds[(opcode >> 8) & 0xf], ((pc + 1) + util::sext(opcode, 8)) & 0xffffff); }},
{ 0xa000, 0xf000, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "RAM(0x%03x) = %s", (opcode & 0x800) >> 3 | (opcode & 0xff), regs[(opcode >> 8) & 7]); }},
{ 0xb000, 0xf000, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = RAM(0x%03x)", regs[(opcode >> 8) & 7], (opcode & 0x800) >> 3 | (opcode & 0xff)); }},
{ 0xc000, 0xf800, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s.h = 0x%02x", immregs[(opcode >> 8) & 7], opcode & 0xff); }},
@@ -49,6 +49,9 @@ const sonix16_disassembler::instruction sonix16_disassembler::instructions[] = {
{ 0xe000, 0xf8c3, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "RAM(%s%s) = %s", indregs[(opcode >> 2) & 3], mods[(opcode >> 4) & 3], regs[(opcode >> 8) & 7]); }},
{ 0xe040, 0xf8c3, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = RAM(%s%s)", regs[(opcode >> 8) & 7], indregs[(opcode >> 2) & 3], mods[(opcode >> 4) & 3]); }},
{ 0xe041, 0xf8c3, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = ROM(%s%s)", regs[(opcode >> 8) & 7], indregs[(opcode >> 2) & 3], mods[(opcode >> 4) & 3]); }},
+ { 0xe04a, 0xf8df, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "r%d = SL.idx %s", (opcode >> 5) & 1, regs[(opcode >> 8) & 7]); }},
+ { 0xe052, 0xf8df, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "r%d = SRA.idx %s", (opcode >> 5) & 1, regs[(opcode >> 8) & 7]); }},
+ { 0xe05a, 0xf8df, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "r%d = SRL.idx %s", (opcode >> 5) & 1, regs[(opcode >> 8) & 7]); }},
{ 0xe080, 0xfc80, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = %s", ioreg(opcode & 0x7f), regs[(opcode >> 8) & 3]); }},
{ 0xe480, 0xfc80, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = %s", regs[(opcode >> 8) & 3], ioreg(opcode & 0x7f)); }},
{ 0xe800, 0xf81c, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = %s + %d", regs[(opcode >> 8) & 7], regs[(opcode >> 5) & 7], 1 << (opcode & 3)); }},
@@ -68,16 +71,18 @@ const sonix16_disassembler::instruction sonix16_disassembler::instructions[] = {
{ 0xf800, 0xff03, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = %s", regs[(opcode >> 2) & 7], regs[(opcode >> 5) & 7]); }},
{ 0xf802, 0xff1f, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "push %s", regs[(opcode >> 5) & 7]); }},
{ 0xf803, 0xff1f, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "pop %s", regs[(opcode >> 5) & 7]); }},
- { 0xfa08, 0xfe1f, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = SL %s", regs[(opcode >> 8) & 3], regs[(opcode >> 5) & 7]); }},
- { 0xfa10, 0xfe1f, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = SRA %s", regs[(opcode >> 8) & 3], regs[(opcode >> 5) & 7]); }},
- { 0xfa18, 0xfe1f, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = SRL %s", regs[(opcode >> 8) & 3], regs[(opcode >> 5) & 7]); }},
+ { 0xfa08, 0xfe18, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = SL.%d %s", regs[(opcode >> 8) & 3], (opcode & 7) + 1, regs[(opcode >> 5) & 7]); }},
+ { 0xfa10, 0xfe18, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = SRA.%d %s", regs[(opcode >> 8) & 3], (opcode & 7) + 1, regs[(opcode >> 5) & 7]); }},
+ { 0xfa18, 0xfe18, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "%s = SRL.%d %s", regs[(opcode >> 8) & 3], (opcode & 7) + 1, regs[(opcode >> 5) & 7]); }},
+ { 0xfc00, 0xff80, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "do%d 0x%02X", (opcode >> 6) & 1, opcode & 0x3f); }},
{ 0xfc80, 0xffc0, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "push %s", ioreg(opcode & 0x3f)); }},
{ 0xfcc0, 0xffc0, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "pop %s", ioreg(opcode & 0x3f)); }},
- { 0xfd00, 0xff00, 2, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "callff 0x%06x", ((opcode & 0xff) << 16) | arg); }},
+ { 0xfd00, 0xff00, 2 | STEP_OVER, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "callff 0x%06x", ((opcode & 0xff) << 16) | arg); }},
{ 0xfe00, 0xff00, 2, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "jmpff 0x%06x", ((opcode & 0xff) << 16) | arg); }},
- { 0xff40, 0xffff, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "ret"); }},
- { 0xff41, 0xffff, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "reti"); }},
- { 0xff42, 0xffff, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "retff"); }},
+ { 0xff40, 0xffff, 1 | STEP_OUT, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "ret"); }},
+ { 0xff41, 0xffff, 1 | STEP_OUT, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "reti"); }},
+ { 0xff42, 0xffff, 1 | STEP_OUT, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "retff"); }},
+ { 0xfffc, 0xfffd, 1 | STEP_COND, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "loop%d", (opcode >> 1) & 1); }},
{ 0xffff, 0xffff, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "nop"); }},
{ 0x0000, 0x0000, 1, [](std::ostream &stream, u16 opcode, u16 arg, u32 pc) { util::stream_format(stream, "? %04x", opcode); }}
@@ -91,7 +96,7 @@ std::string sonix16_disassembler::ioreg(u8 reg)
return "ssf";
case 0x02: case 0x03:
- return indregs[reg & 1];
+ return indregs[reg - 0x02];
case 0x0d:
return "rambk";
@@ -99,6 +104,9 @@ std::string sonix16_disassembler::ioreg(u8 reg)
case 0x0e: case 0x0f:
return util::string_format("ix%dbk", reg & 1);
+ case 0x13: case 0x14:
+ return indregs[reg - 0x11];
+
case 0x15:
return "pch";
@@ -108,6 +116,9 @@ std::string sonix16_disassembler::ioreg(u8 reg)
case 0x18:
return "sp";
+ case 0x1a: case 0x1b:
+ return util::string_format("iy%dbk", reg & 1);
+
case 0x1c: case 0x1d:
return util::string_format("ix%dbkram", reg & 1);
@@ -120,6 +131,12 @@ std::string sonix16_disassembler::ioreg(u8 reg)
case 0x22:
return "intpr";
+ case 0x23:
+ return "intcr";
+
+ case 0x3e:
+ return "shidx";
+
default:
return util::string_format("IO(0x%02x)", reg);
}