summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/sharc
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/cpu/sharc')
-rw-r--r--src/devices/cpu/sharc/sharc.cpp8
-rw-r--r--src/devices/cpu/sharc/sharc.h38
-rw-r--r--src/devices/cpu/sharc/sharcdrc.cpp2098
-rw-r--r--src/devices/cpu/sharc/sharcfe.cpp802
4 files changed, 1473 insertions, 1473 deletions
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp
index 4123da67594..44a7c650d7d 100644
--- a/src/devices/cpu/sharc/sharc.cpp
+++ b/src/devices/cpu/sharc/sharc.cpp
@@ -11,7 +11,7 @@
#include "sharcfe.h"
-#define DISABLE_FAST_REGISTERS 1
+#define DISABLE_FAST_REGISTERS 1
@@ -336,7 +336,7 @@ void adsp21062_device::external_dma_write(UINT32 address, UINT64 data)
void adsp21062_device::device_start()
{
int saveindex;
-
+
m_core = (sharc_internal_state *)m_cache.alloc_near(sizeof(sharc_internal_state));
memset(m_core, 0, sizeof(sharc_internal_state));
@@ -356,7 +356,7 @@ void adsp21062_device::device_start()
// add UML symbols
m_drcuml->symbol_add(&m_core->pc, sizeof(m_core->pc), "pc");
m_drcuml->symbol_add(&m_core->icount, sizeof(m_core->icount), "icount");
-
+
for (int i=0; i < 16; i++)
{
char buf[10];
@@ -412,7 +412,7 @@ void adsp21062_device::device_start()
m_drcuml->symbol_add(&m_core->astat_drc.sz, sizeof(m_core->astat_drc.sz), "astat_sz");
m_drcuml->symbol_add(&m_core->astat_drc.sv, sizeof(m_core->astat_drc.sv), "astat_sv");
m_drcuml->symbol_add(&m_core->astat_drc.ss, sizeof(m_core->astat_drc.ss), "astat_ss");
-
+
m_drcuml->symbol_add(&m_core->arg0, sizeof(m_core->arg0), "arg0");
m_drcuml->symbol_add(&m_core->arg1, sizeof(m_core->arg1), "arg1");
m_drcuml->symbol_add(&m_core->arg2, sizeof(m_core->arg2), "arg2");
diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h
index 215135390e0..1eb2dc8972b 100644
--- a/src/devices/cpu/sharc/sharc.h
+++ b/src/devices/cpu/sharc/sharc.h
@@ -111,25 +111,25 @@ struct SHARC_DMA_OP
#define MODE2_CAFRZ 0x80000 /* Cache freeze */
-#define SIGN_EXTEND6(x) (((x) & 0x20) ? (0xffffffc0 | (x)) : (x))
-#define SIGN_EXTEND24(x) (((x) & 0x800000) ? (0xff000000 | (x)) : (x))
+#define SIGN_EXTEND6(x) (((x) & 0x20) ? (0xffffffc0 | (x)) : (x))
+#define SIGN_EXTEND24(x) (((x) & 0x800000) ? (0xff000000 | (x)) : (x))
#define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((UINT32)0xffffffff) >> (32 - (start_bit + length))))
-#define OP_USERFLAG_COUNTER_LOOP 0x00000001
-#define OP_USERFLAG_COND_LOOP 0x00000002
-#define OP_USERFLAG_COND_FIELD 0x000003fc
-#define OP_USERFLAG_COND_FIELD_SHIFT 2
-#define OP_USERFLAG_ASTAT_DELAY_COPY_AZ 0x00001000
-#define OP_USERFLAG_ASTAT_DELAY_COPY_AN 0x00002000
-#define OP_USERFLAG_ASTAT_DELAY_COPY_AC 0x00004000
-#define OP_USERFLAG_ASTAT_DELAY_COPY_AV 0x00008000
-#define OP_USERFLAG_ASTAT_DELAY_COPY_MV 0x00010000
-#define OP_USERFLAG_ASTAT_DELAY_COPY_MN 0x00020000
-#define OP_USERFLAG_ASTAT_DELAY_COPY_SV 0x00040000
-#define OP_USERFLAG_ASTAT_DELAY_COPY_SZ 0x00080000
-#define OP_USERFLAG_ASTAT_DELAY_COPY_BTF 0x00100000
-#define OP_USERFLAG_ASTAT_DELAY_COPY 0x001ff000
-#define OP_USERFLAG_CALL 0x10000000
+#define OP_USERFLAG_COUNTER_LOOP 0x00000001
+#define OP_USERFLAG_COND_LOOP 0x00000002
+#define OP_USERFLAG_COND_FIELD 0x000003fc
+#define OP_USERFLAG_COND_FIELD_SHIFT 2
+#define OP_USERFLAG_ASTAT_DELAY_COPY_AZ 0x00001000
+#define OP_USERFLAG_ASTAT_DELAY_COPY_AN 0x00002000
+#define OP_USERFLAG_ASTAT_DELAY_COPY_AC 0x00004000
+#define OP_USERFLAG_ASTAT_DELAY_COPY_AV 0x00008000
+#define OP_USERFLAG_ASTAT_DELAY_COPY_MV 0x00010000
+#define OP_USERFLAG_ASTAT_DELAY_COPY_MN 0x00020000
+#define OP_USERFLAG_ASTAT_DELAY_COPY_SV 0x00040000
+#define OP_USERFLAG_ASTAT_DELAY_COPY_SZ 0x00080000
+#define OP_USERFLAG_ASTAT_DELAY_COPY_BTF 0x00100000
+#define OP_USERFLAG_ASTAT_DELAY_COPY 0x001ff000
+#define OP_USERFLAG_CALL 0x10000000
#define MCFG_SHARC_BOOT_MODE(boot_mode) \
@@ -439,7 +439,7 @@ private:
uml::code_handle *m_pop_loop;
uml::code_handle *m_push_status;
uml::code_handle *m_pop_status;
- uml::code_handle *m_exception[EXCEPTION_COUNT]; // exception handlers
+ uml::code_handle *m_exception[EXCEPTION_COUNT]; // exception handlers
uml::code_handle *m_swap_dag1_0_3;
uml::code_handle *m_swap_dag1_4_7;
uml::code_handle *m_swap_dag2_0_3;
@@ -596,7 +596,7 @@ private:
{
UINT32 cycles; /* accumulated cycles */
UINT8 checkints; /* need to check interrupts before next instruction */
- uml::code_label labelnum; /* index for local labels */
+ uml::code_label labelnum; /* index for local labels */
struct
{
int counter;
diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp
index 2850f91da67..a40586cac23 100644
--- a/src/devices/cpu/sharc/sharcdrc.cpp
+++ b/src/devices/cpu/sharc/sharcdrc.cpp
@@ -17,7 +17,7 @@
using namespace uml;
-#define USE_SWAPDQ 0
+#define USE_SWAPDQ 0
#define WRITE_SNOOP 0
@@ -25,85 +25,85 @@ using namespace uml;
#define MAPVAR_PC M0
#define MAPVAR_CYCLES M1
-// exit codes
+// exit codes
#define EXECUTE_OUT_OF_CYCLES 0
#define EXECUTE_MISSING_CODE 1
#define EXECUTE_UNMAPPED_CODE 2
#define EXECUTE_RESET_CACHE 3
-#define REG(reg) m_regmap[reg]
-#define DM_I(reg) mem(&m_core->dag1.i[reg])
-#define DM_M(reg) mem(&m_core->dag1.m[reg])
-#define DM_L(reg) mem(&m_core->dag1.l[reg])
-#define DM_B(reg) mem(&m_core->dag1.b[reg])
-#define PM_I(reg) mem(&m_core->dag2.i[reg])
-#define PM_M(reg) mem(&m_core->dag2.m[reg])
-#define PM_L(reg) mem(&m_core->dag2.l[reg])
-#define PM_B(reg) mem(&m_core->dag2.b[reg])
-#define ASTAT_AZ mem(&m_core->astat_drc.az)
-#define ASTAT_AV mem(&m_core->astat_drc.av)
-#define ASTAT_AN mem(&m_core->astat_drc.an)
-#define ASTAT_AC mem(&m_core->astat_drc.ac)
-#define ASTAT_AS mem(&m_core->astat_drc.as)
-#define ASTAT_AI mem(&m_core->astat_drc.ai)
-#define ASTAT_AF mem(&m_core->astat_drc.af)
-#define ASTAT_MN mem(&m_core->astat_drc.mn)
-#define ASTAT_MV mem(&m_core->astat_drc.mv)
-#define ASTAT_MU mem(&m_core->astat_drc.mu)
-#define ASTAT_MI mem(&m_core->astat_drc.mi)
-#define ASTAT_SV mem(&m_core->astat_drc.sv)
-#define ASTAT_SZ mem(&m_core->astat_drc.sz)
-#define ASTAT_SS mem(&m_core->astat_drc.ss)
-#define ASTAT_BTF mem(&m_core->astat_drc.btf)
-#define FLAG0 mem(&m_core->flag[0])
-#define FLAG1 mem(&m_core->flag[1])
-#define FLAG2 mem(&m_core->flag[2])
-#define FLAG3 mem(&m_core->flag[3])
-#define CURLCNTR mem(&m_core->curlcntr)
-#define LCNTR mem(&m_core->lcntr)
-#define PCSTK mem(&m_core->pcstk)
-#define PCSTKP mem(&m_core->pcstkp)
-#define STKY mem(&m_core->stky)
-#define LSTKP mem(&m_core->lstkp)
-#define USTAT1 mem(&m_core->ustat1)
-#define USTAT2 mem(&m_core->ustat2)
-#define IRPTL mem(&m_core->irptl)
-#define MODE1 mem(&m_core->mode1)
-#define MODE2 mem(&m_core->mode2)
-#define IMASK mem(&m_core->imask)
-#define IMASKP mem(&m_core->imaskp)
-#define MRF mem(&m_core->mrf)
-#define MRB mem(&m_core->mrb)
-
-#define AZ_CALC_REQUIRED ((desc->regreq[0] & 0x00010000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AV_CALC_REQUIRED ((desc->regreq[0] & 0x00020000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AN_CALC_REQUIRED ((desc->regreq[0] & 0x00040000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AC_CALC_REQUIRED ((desc->regreq[0] & 0x00080000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AS_CALC_REQUIRED ((desc->regreq[0] & 0x00100000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AI_CALC_REQUIRED ((desc->regreq[0] & 0x00200000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MN_CALC_REQUIRED ((desc->regreq[0] & 0x00400000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MV_CALC_REQUIRED ((desc->regreq[0] & 0x00800000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MU_CALC_REQUIRED ((desc->regreq[0] & 0x01000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define MI_CALC_REQUIRED ((desc->regreq[0] & 0x02000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define SV_CALC_REQUIRED ((desc->regreq[0] & 0x04000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define SZ_CALC_REQUIRED ((desc->regreq[0] & 0x08000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define SS_CALC_REQUIRED ((desc->regreq[0] & 0x10000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define BTF_CALC_REQUIRED ((desc->regreq[0] & 0x20000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-#define AF_CALC_REQUIRED ((desc->regreq[0] & 0x40000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
-
-
-#define IRAM_BLOCK0_START 0x20000
-#define IRAM_BLOCK0_END 0x27fff
-#define IRAM_BLOCK1_START 0x28000
-#define IRAM_BLOCK1_END 0x3ffff
-#define IRAM_SHORT_BLOCK0_START 0x40000
-#define IRAM_SHORT_BLOCK0_END 0x4ffff
-#define IRAM_SHORT_BLOCK1_START 0x50000
-#define IRAM_SHORT_BLOCK1_END 0x7ffff
-#define IOP_REGISTER_START 0x00000
-#define IOP_REGISTER_END 0x000ff
-#define IRAM_END 0x7ffff
+#define REG(reg) m_regmap[reg]
+#define DM_I(reg) mem(&m_core->dag1.i[reg])
+#define DM_M(reg) mem(&m_core->dag1.m[reg])
+#define DM_L(reg) mem(&m_core->dag1.l[reg])
+#define DM_B(reg) mem(&m_core->dag1.b[reg])
+#define PM_I(reg) mem(&m_core->dag2.i[reg])
+#define PM_M(reg) mem(&m_core->dag2.m[reg])
+#define PM_L(reg) mem(&m_core->dag2.l[reg])
+#define PM_B(reg) mem(&m_core->dag2.b[reg])
+#define ASTAT_AZ mem(&m_core->astat_drc.az)
+#define ASTAT_AV mem(&m_core->astat_drc.av)
+#define ASTAT_AN mem(&m_core->astat_drc.an)
+#define ASTAT_AC mem(&m_core->astat_drc.ac)
+#define ASTAT_AS mem(&m_core->astat_drc.as)
+#define ASTAT_AI mem(&m_core->astat_drc.ai)
+#define ASTAT_AF mem(&m_core->astat_drc.af)
+#define ASTAT_MN mem(&m_core->astat_drc.mn)
+#define ASTAT_MV mem(&m_core->astat_drc.mv)
+#define ASTAT_MU mem(&m_core->astat_drc.mu)
+#define ASTAT_MI mem(&m_core->astat_drc.mi)
+#define ASTAT_SV mem(&m_core->astat_drc.sv)
+#define ASTAT_SZ mem(&m_core->astat_drc.sz)
+#define ASTAT_SS mem(&m_core->astat_drc.ss)
+#define ASTAT_BTF mem(&m_core->astat_drc.btf)
+#define FLAG0 mem(&m_core->flag[0])
+#define FLAG1 mem(&m_core->flag[1])
+#define FLAG2 mem(&m_core->flag[2])
+#define FLAG3 mem(&m_core->flag[3])
+#define CURLCNTR mem(&m_core->curlcntr)
+#define LCNTR mem(&m_core->lcntr)
+#define PCSTK mem(&m_core->pcstk)
+#define PCSTKP mem(&m_core->pcstkp)
+#define STKY mem(&m_core->stky)
+#define LSTKP mem(&m_core->lstkp)
+#define USTAT1 mem(&m_core->ustat1)
+#define USTAT2 mem(&m_core->ustat2)
+#define IRPTL mem(&m_core->irptl)
+#define MODE1 mem(&m_core->mode1)
+#define MODE2 mem(&m_core->mode2)
+#define IMASK mem(&m_core->imask)
+#define IMASKP mem(&m_core->imaskp)
+#define MRF mem(&m_core->mrf)
+#define MRB mem(&m_core->mrb)
+
+#define AZ_CALC_REQUIRED ((desc->regreq[0] & 0x00010000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AV_CALC_REQUIRED ((desc->regreq[0] & 0x00020000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AN_CALC_REQUIRED ((desc->regreq[0] & 0x00040000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AC_CALC_REQUIRED ((desc->regreq[0] & 0x00080000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AS_CALC_REQUIRED ((desc->regreq[0] & 0x00100000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AI_CALC_REQUIRED ((desc->regreq[0] & 0x00200000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MN_CALC_REQUIRED ((desc->regreq[0] & 0x00400000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MV_CALC_REQUIRED ((desc->regreq[0] & 0x00800000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MU_CALC_REQUIRED ((desc->regreq[0] & 0x01000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define MI_CALC_REQUIRED ((desc->regreq[0] & 0x02000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define SV_CALC_REQUIRED ((desc->regreq[0] & 0x04000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define SZ_CALC_REQUIRED ((desc->regreq[0] & 0x08000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define SS_CALC_REQUIRED ((desc->regreq[0] & 0x10000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define BTF_CALC_REQUIRED ((desc->regreq[0] & 0x20000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+#define AF_CALC_REQUIRED ((desc->regreq[0] & 0x40000000) || desc->flags & OPFLAG_IN_DELAY_SLOT)
+
+
+#define IRAM_BLOCK0_START 0x20000
+#define IRAM_BLOCK0_END 0x27fff
+#define IRAM_BLOCK1_START 0x28000
+#define IRAM_BLOCK1_END 0x3ffff
+#define IRAM_SHORT_BLOCK0_START 0x40000
+#define IRAM_SHORT_BLOCK0_END 0x4ffff
+#define IRAM_SHORT_BLOCK1_START 0x50000
+#define IRAM_SHORT_BLOCK1_END 0x7ffff
+#define IOP_REGISTER_START 0x00000
+#define IOP_REGISTER_END 0x000ff
+#define IRAM_END 0x7ffff
inline void adsp21062_device::alloc_handle(drcuml_state *drcuml, code_handle **handleptr, const char *name)
@@ -267,26 +267,26 @@ UINT32 adsp21062_device::do_condition_astat_bits(int condition)
UINT32 r = 0;
switch (condition)
{
- case 0x00: r = AZ; break; // EQ
- case 0x01: r = AZ | AN; break; // LT
- case 0x02: r = AZ | AN; break; // LE
- case 0x03: r = AC; break; // AC
- case 0x04: r = AV; break; // AV
- case 0x05: r = MV; break; // MV
- case 0x06: r = MN; break; // MS
- case 0x07: r = SV; break; // SV
- case 0x08: r = SZ; break; // SZ
- case 0x0d: r = BTF; break; // TF
- case 0x10: r = AZ; break; // NOT EQUAL
- case 0x11: r = AZ | AN; break; // GE
- case 0x12: r = AZ | AN; break; // GT
- case 0x13: r = AC; break; // NOT AC
- case 0x14: r = AV; break; // NOT AV
- case 0x15: r = MV; break; // NOT MV
- case 0x16: r = MN; break; // NOT MS
- case 0x17: r = SV; break; // NOT SV
- case 0x18: r = SZ; break; // NOT SZ
- case 0x1d: r = BTF; break; // NOT TF
+ case 0x00: r = AZ; break; // EQ
+ case 0x01: r = AZ | AN; break; // LT
+ case 0x02: r = AZ | AN; break; // LE
+ case 0x03: r = AC; break; // AC
+ case 0x04: r = AV; break; // AV
+ case 0x05: r = MV; break; // MV
+ case 0x06: r = MN; break; // MS
+ case 0x07: r = SV; break; // SV
+ case 0x08: r = SZ; break; // SZ
+ case 0x0d: r = BTF; break; // TF
+ case 0x10: r = AZ; break; // NOT EQUAL
+ case 0x11: r = AZ | AN; break; // GE
+ case 0x12: r = AZ | AN; break; // GT
+ case 0x13: r = AC; break; // NOT AC
+ case 0x14: r = AV; break; // NOT AV
+ case 0x15: r = MV; break; // NOT MV
+ case 0x16: r = MN; break; // NOT MS
+ case 0x17: r = SV; break; // NOT SV
+ case 0x18: r = SZ; break; // NOT SZ
+ case 0x1d: r = BTF; break; // NOT TF
}
return r;
@@ -354,220 +354,220 @@ void adsp21062_device::static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, c
switch (type)
{
case MEM_ACCESSOR_PM_READ48:
- UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
- UML_JMPc(block, COND_B, label); // jb label1
- UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
- UML_JMPc(block, COND_A, label); // ja label1
-
+ UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
+ UML_JMPc(block, COND_B, label); // jb label1
+ UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
+ UML_JMPc(block, COND_A, label); // ja label1
+
// 0x20000 ... 0x27fff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
- UML_MULS(block, I1, I1, I1, 3); // muls i1,3
- UML_DLOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // dload i0,[block0],i1,word,scale_x2
- UML_DSHL(block, I0, I0, 32); // dshl i0,i0,32
- UML_DLOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x2); // dload i2,[block0_1],i1,word,scale_x2
- UML_DSHL(block, I2, I2, 16); // dshl i2,i2,16
- UML_DOR(block, I0, I0, I2); // dor i0,i0,i2
- UML_DLOAD(block, I2, block0_2, I1, SIZE_WORD, SCALE_x2); // dload i2,[block0_2],i1,word,scale_x2
- UML_DOR(block, I0, I0, I2); // dor i0,i0,i2
- UML_RET(block); // ret
-
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
- UML_JMPc(block, COND_B, label); // jb label2
- UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
- UML_JMPc(block, COND_A, label); // ja label2
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
+ UML_MULS(block, I1, I1, I1, 3); // muls i1,3
+ UML_DLOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // dload i0,[block0],i1,word,scale_x2
+ UML_DSHL(block, I0, I0, 32); // dshl i0,i0,32
+ UML_DLOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x2); // dload i2,[block0_1],i1,word,scale_x2
+ UML_DSHL(block, I2, I2, 16); // dshl i2,i2,16
+ UML_DOR(block, I0, I0, I2); // dor i0,i0,i2
+ UML_DLOAD(block, I2, block0_2, I1, SIZE_WORD, SCALE_x2); // dload i2,[block0_2],i1,word,scale_x2
+ UML_DOR(block, I0, I0, I2); // dor i0,i0,i2
+ UML_RET(block); // ret
+
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
+ UML_JMPc(block, COND_B, label); // jb label2
+ UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
+ UML_JMPc(block, COND_A, label); // ja label2
// 0x28000 ... 0x3ffff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff)
- UML_MULS(block, I1, I1, I1, 3); // muls i1,3
- UML_DLOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // dload i0,[block1],i1,word,scale_x2
- UML_DSHL(block, I0, I0, 32); // dshl i0,i0,32
- UML_DLOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x2); // dload i2,[block1_1],i1,word,scale_x2
- UML_DSHL(block, I2, I2, 16); // dshl i2,i2,16
- UML_DOR(block, I0, I0, I2); // dor i0,i0,i2
- UML_DLOAD(block, I2, block1_2, I1, SIZE_WORD, SCALE_x2); // dload i2,[block1_2],i1,word,scale_x2
- UML_DOR(block, I0, I0, I2); // dor i0,i0,i2
- UML_RET(block); // ret
-
- UML_LABEL(block, label++); // label2:
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff)
+ UML_MULS(block, I1, I1, I1, 3); // muls i1,3
+ UML_DLOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // dload i0,[block1],i1,word,scale_x2
+ UML_DSHL(block, I0, I0, 32); // dshl i0,i0,32
+ UML_DLOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x2); // dload i2,[block1_1],i1,word,scale_x2
+ UML_DSHL(block, I2, I2, 16); // dshl i2,i2,16
+ UML_DOR(block, I0, I0, I2); // dor i0,i0,i2
+ UML_DLOAD(block, I2, block1_2, I1, SIZE_WORD, SCALE_x2); // dload i2,[block1_2],i1,word,scale_x2
+ UML_DOR(block, I0, I0, I2); // dor i0,i0,i2
+ UML_RET(block); // ret
+
+ UML_LABEL(block, label++); // label2:
break;
case MEM_ACCESSOR_PM_WRITE48:
- UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
- UML_JMPc(block, COND_B, label); // jb label1
- UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
- UML_JMPc(block, COND_A, label); // ja label1
+ UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
+ UML_JMPc(block, COND_B, label); // jb label1
+ UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
+ UML_JMPc(block, COND_A, label); // ja label1
// 0x20000 ... 0x27fff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
- UML_MULS(block, I1, I1, I1, 3); // muls i1,3
- UML_DSTORE(block, block0_2, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0_2],i1,i0,word,scale_x2
- UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16
- UML_DSTORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0_1],i1,i0,word,scale_x2
- UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16
- UML_DSTORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0],i1,i0,word,scale_x2
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
+ UML_MULS(block, I1, I1, I1, 3); // muls i1,3
+ UML_DSTORE(block, block0_2, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0_2],i1,i0,word,scale_x2
+ UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16
+ UML_DSTORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0_1],i1,i0,word,scale_x2
+ UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16
+ UML_DSTORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block0],i1,i0,word,scale_x2
UML_MOV(block, mem(&m_core->force_recompile), 1);
- UML_RET(block); // ret
+ UML_RET(block); // ret
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
- UML_JMPc(block, COND_B, label); // jb label2
- UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
- UML_JMPc(block, COND_A, label); // ja label2
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
+ UML_JMPc(block, COND_B, label); // jb label2
+ UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
+ UML_JMPc(block, COND_A, label); // ja label2
// 0x28000 ... 0x3ffff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff)
- UML_MULS(block, I1, I1, I1, 3); // muls i1,3
- UML_DSTORE(block, block1_2, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1_2],i1,i0,word,scale_x2
- UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16
- UML_DSTORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1_1],i1,i0,word,scale_x2
- UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16
- UML_DSTORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1],i1,i0,word,scale_x2
- UML_RET(block); // ret
-
- UML_LABEL(block, label++); // label2:
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff)
+ UML_MULS(block, I1, I1, I1, 3); // muls i1,3
+ UML_DSTORE(block, block1_2, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1_2],i1,i0,word,scale_x2
+ UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16
+ UML_DSTORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1_1],i1,i0,word,scale_x2
+ UML_DSHR(block, I0, I0, 16); // dshr i0,i0,16
+ UML_DSTORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // dstore [block1],i1,i0,word,scale_x2
+ UML_RET(block); // ret
+
+ UML_LABEL(block, label++); // label2:
break;
case MEM_ACCESSOR_PM_READ32:
- UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
- UML_JMPc(block, COND_B, label); // jb label1
- UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
- UML_JMPc(block, COND_A, label); // ja label1
-
+ UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
+ UML_JMPc(block, COND_B, label); // jb label1
+ UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
+ UML_JMPc(block, COND_A, label); // ja label1
+
// 0x20000 ... 0x27fff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
- UML_MULS(block, I1, I1, I1, 3); // muls i1,3
- UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // load i0,[block0],i1,word,scale_x2
- UML_SHL(block, I0, I0, 16); // shl i0,i0,16
- UML_LOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x2); // load i2,[block0_1],i1,word,scale_x2
- UML_OR(block, I0, I0, I2); // or i0,i0,i2
- UML_RET(block); // ret
-
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
- UML_JMPc(block, COND_B, label); // jb label2
- UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
- UML_JMPc(block, COND_A, label); // ja label2
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
+ UML_MULS(block, I1, I1, I1, 3); // muls i1,3
+ UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // load i0,[block0],i1,word,scale_x2
+ UML_SHL(block, I0, I0, 16); // shl i0,i0,16
+ UML_LOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x2); // load i2,[block0_1],i1,word,scale_x2
+ UML_OR(block, I0, I0, I2); // or i0,i0,i2
+ UML_RET(block); // ret
+
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
+ UML_JMPc(block, COND_B, label); // jb label2
+ UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
+ UML_JMPc(block, COND_A, label); // ja label2
// 0x28000 ... 0x3ffff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff)
- UML_MULS(block, I1, I1, I1, 3); // muls i1,3
- UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // load i0,[block1],i1,word,scale_x2
- UML_SHL(block, I0, I0, 16); // shl i0,i0,16
- UML_LOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x2); // load i2,[block1_1],i1,word,scale_x2
- UML_OR(block, I0, I0, I2); // or i0,i0,i2
- UML_RET(block); // ret
-
- UML_LABEL(block, label++); // label2:
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff)
+ UML_MULS(block, I1, I1, I1, 3); // muls i1,3
+ UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // load i0,[block1],i1,word,scale_x2
+ UML_SHL(block, I0, I0, 16); // shl i0,i0,16
+ UML_LOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x2); // load i2,[block1_1],i1,word,scale_x2
+ UML_OR(block, I0, I0, I2); // or i0,i0,i2
+ UML_RET(block); // ret
+
+ UML_LABEL(block, label++); // label2:
break;
case MEM_ACCESSOR_PM_WRITE32:
- UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
- UML_JMPc(block, COND_B, label); // jb label1
- UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
- UML_JMPc(block, COND_A, label); // ja label1
+ UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
+ UML_JMPc(block, COND_B, label); // jb label1
+ UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
+ UML_JMPc(block, COND_A, label); // ja label1
// 0x20000 ... 0x27fff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
- UML_MULS(block, I1, I1, I1, 3); // muls i1,3
- UML_STORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x2); // store [block0_1],i1,i0,word,scale_x2
- UML_SHR(block, I0, I0, 16); // shr i0,i0,16
- UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // store [block0],i1,i0,word,scale_x2
- UML_RET(block); // ret
-
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
- UML_JMPc(block, COND_B, label); // jb label2
- UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
- UML_JMPc(block, COND_A, label); // ja label2
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
+ UML_MULS(block, I1, I1, I1, 3); // muls i1,3
+ UML_STORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x2); // store [block0_1],i1,i0,word,scale_x2
+ UML_SHR(block, I0, I0, 16); // shr i0,i0,16
+ UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // store [block0],i1,i0,word,scale_x2
+ UML_RET(block); // ret
+
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
+ UML_JMPc(block, COND_B, label); // jb label2
+ UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
+ UML_JMPc(block, COND_A, label); // ja label2
// 0x28000 ... 0x3ffff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff)
- UML_MULS(block, I1, I1, I1, 3); // muls i1,3
- UML_STORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1_1],i1,i0,word,scale_x2
- UML_SHR(block, I0, I0, 16); // shr i0,i0,16
- UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1],i1,i0,word,scale_x2
- UML_RET(block); // ret
-
- UML_LABEL(block, label++); // label2:
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff (block 1 is mirrored in 0x28000...2ffff, 0x30000...0x37fff and 0x38000...3ffff)
+ UML_MULS(block, I1, I1, I1, 3); // muls i1,3
+ UML_STORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1_1],i1,i0,word,scale_x2
+ UML_SHR(block, I0, I0, 16); // shr i0,i0,16
+ UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1],i1,i0,word,scale_x2
+ UML_RET(block); // ret
+
+ UML_LABEL(block, label++); // label2:
break;
case MEM_ACCESSOR_DM_READ32:
- UML_CMP(block, I1, IRAM_END); // cmp i1,IRAM_END
- UML_JMPc(block, COND_BE, label); // jbe label1
+ UML_CMP(block, I1, IRAM_END); // cmp i1,IRAM_END
+ UML_JMPc(block, COND_BE, label); // jbe label1
// 0x80000 ...
- UML_SHL(block, I1, I1, 2); // shl i1,i1,2
- UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); // read i0,i1,dword,SPACE_DATA
+ UML_SHL(block, I1, I1, 2); // shl i1,i1,2
+ UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); // read i0,i1,dword,SPACE_DATA
UML_RET(block);
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
- UML_JMPc(block, COND_B, label); // jb label2
- UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
- UML_JMPc(block, COND_A, label); // ja label2
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
+ UML_JMPc(block, COND_B, label); // jb label2
+ UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
+ UML_JMPc(block, COND_A, label); // ja label2
// 0x20000 ... 0x27fff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
- UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x4); // load i0,[block0],i1,word,scale_x4
- UML_SHL(block, I0, I0, 16); // shl i0,i0,16
- UML_LOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x4); // load i2,[block0_1],i1,word,scale_x4
- UML_OR(block, I0, I0, I2); // or i0,i0,i2
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
+ UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x4); // load i0,[block0],i1,word,scale_x4
+ UML_SHL(block, I0, I0, 16); // shl i0,i0,16
+ UML_LOAD(block, I2, block0_1, I1, SIZE_WORD, SCALE_x4); // load i2,[block0_1],i1,word,scale_x4
+ UML_OR(block, I0, I0, I2); // or i0,i0,i2
UML_RET(block);
- UML_LABEL(block, label++); // label2:
- UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
- UML_JMPc(block, COND_B, label); // jb label3
- UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
- UML_JMPc(block, COND_A, label); // ja label3
+ UML_LABEL(block, label++); // label2:
+ UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
+ UML_JMPc(block, COND_B, label); // jb label3
+ UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
+ UML_JMPc(block, COND_A, label); // ja label3
// 0x28000 ... 0x3ffff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
- UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x4); // load i0,[block1],i1,word,scale_x4
- UML_SHL(block, I0, I0, 16); // shl i0,i0,16
- UML_LOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x4); // load i2,[block1_1],i1,word,scale_x4
- UML_OR(block, I0, I0, I2); // or i0,i0,i2
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
+ UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x4); // load i0,[block1],i1,word,scale_x4
+ UML_SHL(block, I0, I0, 16); // shl i0,i0,16
+ UML_LOAD(block, I2, block1_1, I1, SIZE_WORD, SCALE_x4); // load i2,[block1_1],i1,word,scale_x4
+ UML_OR(block, I0, I0, I2); // or i0,i0,i2
UML_RET(block);
- UML_LABEL(block, label++); // Label3:
- UML_CMP(block, I1, IOP_REGISTER_END); // cmp i1,IOP_REGISTER_END
- UML_JMPc(block, COND_A, label); // ja label4
+ UML_LABEL(block, label++); // Label3:
+ UML_CMP(block, I1, IOP_REGISTER_END); // cmp i1,IOP_REGISTER_END
+ UML_JMPc(block, COND_A, label); // ja label4
// IOP registers
- UML_MOV(block, mem(&m_core->arg0), I1); // mov [m_core->arg0],i1
- UML_CALLC(block, cfunc_read_iop, this); // callc cfunc_read_iop
- UML_MOV(block, I0, mem(&m_core->arg1)); // mov i0,[m_core->arg1]
+ UML_MOV(block, mem(&m_core->arg0), I1); // mov [m_core->arg0],i1
+ UML_CALLC(block, cfunc_read_iop, this); // callc cfunc_read_iop
+ UML_MOV(block, I0, mem(&m_core->arg1)); // mov i0,[m_core->arg1]
UML_RET(block);
- UML_LABEL(block, label++); // label4:
- UML_CMP(block, I1, IRAM_SHORT_BLOCK0_START); // cmp i1,IRAM_SHORT_BLOCK0_START
- UML_JMPc(block, COND_B, label+1); // jb label6
- UML_CMP(block, I1, IRAM_SHORT_BLOCK0_END); // cmp i1,IRAM_SHORT_BLOCK0_END
- UML_JMPc(block, COND_A, label+1); // ja label6
+ UML_LABEL(block, label++); // label4:
+ UML_CMP(block, I1, IRAM_SHORT_BLOCK0_START); // cmp i1,IRAM_SHORT_BLOCK0_START
+ UML_JMPc(block, COND_B, label+1); // jb label6
+ UML_CMP(block, I1, IRAM_SHORT_BLOCK0_END); // cmp i1,IRAM_SHORT_BLOCK0_END
+ UML_JMPc(block, COND_A, label+1); // ja label6
// 0x40000 ... 0x4ffff
- UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff
- UML_XOR(block, I1, I1, 1); // xor i1,i1,1
- UML_TEST(block, mem(&m_core->mode1), 0x4000); // test [m_core->mode1],0x4000
- UML_JMPc(block, COND_Z, label); // jz label5
- UML_LOADS(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // loads i0,[block0],i1,word,scale_x2
+ UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff
+ UML_XOR(block, I1, I1, 1); // xor i1,i1,1
+ UML_TEST(block, mem(&m_core->mode1), 0x4000); // test [m_core->mode1],0x4000
+ UML_JMPc(block, COND_Z, label); // jz label5
+ UML_LOADS(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // loads i0,[block0],i1,word,scale_x2
UML_RET(block);
- UML_LABEL(block, label++); // label5:
- UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // load i0,[block0],i1,word,scale_x2
+ UML_LABEL(block, label++); // label5:
+ UML_LOAD(block, I0, block0, I1, SIZE_WORD, SCALE_x2); // load i0,[block0],i1,word,scale_x2
UML_RET(block);
- UML_LABEL(block, label++); // label6:
- UML_CMP(block, I1, IRAM_SHORT_BLOCK1_START); // cmp i1,IRAM_SHORT_BLOCK1_START
- UML_JMPc(block, COND_B, label+1); // jb label8
- UML_CMP(block, I1, IRAM_SHORT_BLOCK1_END); // cmp i1,IRAM_SHORT_BLOCK1_END
- UML_JMPc(block, COND_A, label+1); // ja label8
+ UML_LABEL(block, label++); // label6:
+ UML_CMP(block, I1, IRAM_SHORT_BLOCK1_START); // cmp i1,IRAM_SHORT_BLOCK1_START
+ UML_JMPc(block, COND_B, label+1); // jb label8
+ UML_CMP(block, I1, IRAM_SHORT_BLOCK1_END); // cmp i1,IRAM_SHORT_BLOCK1_END
+ UML_JMPc(block, COND_A, label+1); // ja label8
// 0x50000 ... 0x7ffff
- UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff
- UML_XOR(block, I1, I1, 1); // xor i1,i1,1
- UML_TEST(block, mem(&m_core->mode1), 0x4000); // test [m_core->mode1],0x4000
- UML_JMPc(block, COND_Z, label); // jz label7
- UML_LOADS(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // loads i0,[block1],i1,word,scale_x2
+ UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff
+ UML_XOR(block, I1, I1, 1); // xor i1,i1,1
+ UML_TEST(block, mem(&m_core->mode1), 0x4000); // test [m_core->mode1],0x4000
+ UML_JMPc(block, COND_Z, label); // jz label7
+ UML_LOADS(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // loads i0,[block1],i1,word,scale_x2
UML_RET(block);
- UML_LABEL(block, label++); // label7:
- UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // load i0,[block1],i1,word,scale_x2
+ UML_LABEL(block, label++); // label7:
+ UML_LOAD(block, I0, block1, I1, SIZE_WORD, SCALE_x2); // load i0,[block1],i1,word,scale_x2
UML_RET(block);
- UML_LABEL(block, label++); // label8:
+ UML_LABEL(block, label++); // label8:
break;
case MEM_ACCESSOR_DM_WRITE32:
@@ -583,69 +583,69 @@ void adsp21062_device::static_generate_memory_accessor(MEM_ACCESSOR_TYPE type, c
#endif
- UML_CMP(block, I1, IRAM_END); // cmp i1,IRAM_END
- UML_JMPc(block, COND_BE, label); // jbe label1
+ UML_CMP(block, I1, IRAM_END); // cmp i1,IRAM_END
+ UML_JMPc(block, COND_BE, label); // jbe label1
// 0x80000 ...
- UML_SHL(block, I1, I1, 2); // shl i1,i1,2
- UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA); // write i1,i0,dword,SPACE_DATA
+ UML_SHL(block, I1, I1, 2); // shl i1,i1,2
+ UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA); // write i1,i0,dword,SPACE_DATA
UML_RET(block);
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
- UML_JMPc(block, COND_B, label); // jb label2
- UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
- UML_JMPc(block, COND_A, label); // ja label2
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I1, IRAM_BLOCK0_START); // cmp i1,IRAM_BLOCK0_START
+ UML_JMPc(block, COND_B, label); // jb label2
+ UML_CMP(block, I1, IRAM_BLOCK0_END); // cmp i1,IRAM_BLOCK0_END
+ UML_JMPc(block, COND_A, label); // ja label2
// 0x20000 ... 0x27fff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
- UML_STORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x4); // store [block0_1],i1,i0,word,scale_x4
- UML_SHR(block, I0, I0, 16); // shr i0,i0,16
- UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x4); // store [block0],i1,i0,word,scale_x4
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
+ UML_STORE(block, block0_1, I1, I0, SIZE_WORD, SCALE_x4); // store [block0_1],i1,i0,word,scale_x4
+ UML_SHR(block, I0, I0, 16); // shr i0,i0,16
+ UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x4); // store [block0],i1,i0,word,scale_x4
UML_RET(block);
- UML_LABEL(block, label++); // label2:
- UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
- UML_JMPc(block, COND_B, label); // jb label3
- UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
- UML_JMPc(block, COND_A, label); // ja label3
+ UML_LABEL(block, label++); // label2:
+ UML_CMP(block, I1, IRAM_BLOCK1_START); // cmp i1,IRAM_BLOCK1_START
+ UML_JMPc(block, COND_B, label); // jb label3
+ UML_CMP(block, I1, IRAM_BLOCK1_END); // cmp i1,IRAM_BLOCK1_END
+ UML_JMPc(block, COND_A, label); // ja label3
// 0x28000 ... 0x3ffff
- UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
- UML_STORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x4); // store [block1_1],i1,i0,word,scale_x4
- UML_SHR(block, I0, I0, 16); // shr i0,i0,16
- UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x4); // store [block1],i1,i0,word,scale_x4
+ UML_AND(block, I1, I1, 0x7fff); // and i1,i1,0x7fff
+ UML_STORE(block, block1_1, I1, I0, SIZE_WORD, SCALE_x4); // store [block1_1],i1,i0,word,scale_x4
+ UML_SHR(block, I0, I0, 16); // shr i0,i0,16
+ UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x4); // store [block1],i1,i0,word,scale_x4
UML_RET(block);
- UML_LABEL(block, label++); // Label3:
- UML_CMP(block, I1, IOP_REGISTER_END); // cmp i1,IOP_REGISTER_END
- UML_JMPc(block, COND_A, label); // ja label4
+ UML_LABEL(block, label++); // Label3:
+ UML_CMP(block, I1, IOP_REGISTER_END); // cmp i1,IOP_REGISTER_END
+ UML_JMPc(block, COND_A, label); // ja label4
// IOP registers
- UML_MOV(block, mem(&m_core->arg0), I1); // mov [m_core->arg0],i1
- UML_MOV(block, mem(&m_core->arg1), I0); // mov [m_core->arg1],i0
- UML_CALLC(block, cfunc_write_iop, this); // callc cfunc_write_iop
+ UML_MOV(block, mem(&m_core->arg0), I1); // mov [m_core->arg0],i1
+ UML_MOV(block, mem(&m_core->arg1), I0); // mov [m_core->arg1],i0
+ UML_CALLC(block, cfunc_write_iop, this); // callc cfunc_write_iop
UML_RET(block);
- UML_LABEL(block, label++); // label4:
- UML_CMP(block, I1, IRAM_SHORT_BLOCK0_START); // cmp i1,IRAM_SHORT_BLOCK0_START
- UML_JMPc(block, COND_B, label); // jb label5
- UML_CMP(block, I1, IRAM_SHORT_BLOCK0_END); // cmp i1,IRAM_SHORT_BLOCK0_END
- UML_JMPc(block, COND_A, label); // ja label5
+ UML_LABEL(block, label++); // label4:
+ UML_CMP(block, I1, IRAM_SHORT_BLOCK0_START); // cmp i1,IRAM_SHORT_BLOCK0_START
+ UML_JMPc(block, COND_B, label); // jb label5
+ UML_CMP(block, I1, IRAM_SHORT_BLOCK0_END); // cmp i1,IRAM_SHORT_BLOCK0_END
+ UML_JMPc(block, COND_A, label); // ja label5
// 0x40000 ... 0x4ffff
- UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff
- UML_XOR(block, I1, I1, 1); // xor i1,i1,1
- UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // store [block0],i1,i0,word,scale_x2
+ UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff
+ UML_XOR(block, I1, I1, 1); // xor i1,i1,1
+ UML_STORE(block, block0, I1, I0, SIZE_WORD, SCALE_x2); // store [block0],i1,i0,word,scale_x2
UML_RET(block);
- UML_LABEL(block, label++); // label5:
- UML_CMP(block, I1, IRAM_SHORT_BLOCK1_START); // cmp i1,IRAM_SHORT_BLOCK1_START
- UML_JMPc(block, COND_B, label); // jb label6
- UML_CMP(block, I1, IRAM_SHORT_BLOCK1_END); // cmp i1,IRAM_SHORT_BLOCK1_END
- UML_JMPc(block, COND_A, label); // ja label6
+ UML_LABEL(block, label++); // label5:
+ UML_CMP(block, I1, IRAM_SHORT_BLOCK1_START); // cmp i1,IRAM_SHORT_BLOCK1_START
+ UML_JMPc(block, COND_B, label); // jb label6
+ UML_CMP(block, I1, IRAM_SHORT_BLOCK1_END); // cmp i1,IRAM_SHORT_BLOCK1_END
+ UML_JMPc(block, COND_A, label); // ja label6
// 0x50000 ... 0x7ffff
- UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff
- UML_XOR(block, I1, I1, 1); // xor i1,i1,1
- UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1],i1,i0,word,scale_x2
+ UML_AND(block, I1, I1, 0xffff); // and i1,i1,0xffff
+ UML_XOR(block, I1, I1, 1); // xor i1,i1,1
+ UML_STORE(block, block1, I1, I0, SIZE_WORD, SCALE_x2); // store [block1],i1,i0,word,scale_x2
UML_RET(block);
- UML_LABEL(block, label++); // label6:
+ UML_LABEL(block, label++); // label6:
break;
}
@@ -664,26 +664,26 @@ void adsp21062_device::static_generate_push_pc()
// add a global entry for this
alloc_handle(m_drcuml.get(), &m_push_pc, "push_pc");
- UML_HANDLE(block, *m_push_pc); // handle *m_push_pc
-
- UML_MOV(block, I1, PCSTKP); // mov i1,PCSTKP
- UML_ADD(block, I1, I1, 1); // add i1,i1,1
- UML_CMP(block, I1, 32); // cmp i1,32
- UML_JMPc(block, COND_L,label); // jl label1
- UML_CALLC(block, cfunc_pcstack_overflow, this); // callc cfunc_pcstack_overflow
-
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I1, 0); // cmp i1,0
- UML_JMPc(block, COND_E, label); // je label2
- UML_AND(block, STKY, STKY, ~0x400000); // and STKY,~0x400000
- UML_JMP(block, label + 1); // jmp label3
- UML_LABEL(block, label++); // label2:
- UML_OR(block, STKY, STKY, 0x400000); // or STKY,0x400000
-
- UML_LABEL(block, label++); // label3:
- UML_MOV(block, PCSTK, I0); // mov PCSTK,pc
- UML_STORE(block, &m_core->pcstack, I1, I0, SIZE_DWORD, SCALE_x4); // store [m_core->pcstack],i1,i0,dword,scale_x4
- UML_MOV(block, PCSTKP, I1); // mov PCSTKP,i1
+ UML_HANDLE(block, *m_push_pc); // handle *m_push_pc
+
+ UML_MOV(block, I1, PCSTKP); // mov i1,PCSTKP
+ UML_ADD(block, I1, I1, 1); // add i1,i1,1
+ UML_CMP(block, I1, 32); // cmp i1,32
+ UML_JMPc(block, COND_L,label); // jl label1
+ UML_CALLC(block, cfunc_pcstack_overflow, this); // callc cfunc_pcstack_overflow
+
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I1, 0); // cmp i1,0
+ UML_JMPc(block, COND_E, label); // je label2
+ UML_AND(block, STKY, STKY, ~0x400000); // and STKY,~0x400000
+ UML_JMP(block, label + 1); // jmp label3
+ UML_LABEL(block, label++); // label2:
+ UML_OR(block, STKY, STKY, 0x400000); // or STKY,0x400000
+
+ UML_LABEL(block, label++); // label3:
+ UML_MOV(block, PCSTK, I0); // mov PCSTK,pc
+ UML_STORE(block, &m_core->pcstack, I1, I0, SIZE_DWORD, SCALE_x4); // store [m_core->pcstack],i1,i0,dword,scale_x4
+ UML_MOV(block, PCSTKP, I1); // mov PCSTKP,i1
UML_RET(block);
@@ -700,26 +700,26 @@ void adsp21062_device::static_generate_pop_pc()
// add a global entry for this
alloc_handle(m_drcuml.get(), &m_pop_pc, "pop_pc");
- UML_HANDLE(block, *m_pop_pc); // handle *m_pop_pc
-
- UML_MOV(block, I1, PCSTKP); // mov i0,PCSTKP
- UML_LOAD(block, I0, &m_core->pcstack, I1, SIZE_DWORD, SCALE_x4); // load i1,[m_core->pcstack],i0,dword,scale_x4
- UML_CMP(block, I1, 0); // cmp i1,0
- UML_JMPc(block, COND_NE, label); // jne label1
- UML_CALLC(block, cfunc_pcstack_underflow, this); // callc cfunc_pcstack_underflow
-
- UML_LABEL(block, label++); // label1:
- UML_SUB(block, I1, I1, 1); // sub i1,i1,1
- UML_CMP(block, I1, 0); // cmp i1,0
- UML_JMPc(block, COND_E, label); // je label2
- UML_AND(block, STKY, STKY, ~0x400000); // and STKY,~0x400000
- UML_JMP(block, label + 1); // jmp label3
- UML_LABEL(block, label++); // label2:
- UML_OR(block, STKY, STKY, 0x400000); // or STKY,0x400000
-
- UML_LABEL(block, label++); // label3:
- UML_MOV(block, PCSTKP, I1); // mov PCSTKP,i1
- UML_MOV(block, PCSTK, I0); // mov PCSTK,i0
+ UML_HANDLE(block, *m_pop_pc); // handle *m_pop_pc
+
+ UML_MOV(block, I1, PCSTKP); // mov i0,PCSTKP
+ UML_LOAD(block, I0, &m_core->pcstack, I1, SIZE_DWORD, SCALE_x4); // load i1,[m_core->pcstack],i0,dword,scale_x4
+ UML_CMP(block, I1, 0); // cmp i1,0
+ UML_JMPc(block, COND_NE, label); // jne label1
+ UML_CALLC(block, cfunc_pcstack_underflow, this); // callc cfunc_pcstack_underflow
+
+ UML_LABEL(block, label++); // label1:
+ UML_SUB(block, I1, I1, 1); // sub i1,i1,1
+ UML_CMP(block, I1, 0); // cmp i1,0
+ UML_JMPc(block, COND_E, label); // je label2
+ UML_AND(block, STKY, STKY, ~0x400000); // and STKY,~0x400000
+ UML_JMP(block, label + 1); // jmp label3
+ UML_LABEL(block, label++); // label2:
+ UML_OR(block, STKY, STKY, 0x400000); // or STKY,0x400000
+
+ UML_LABEL(block, label++); // label3:
+ UML_MOV(block, PCSTKP, I1); // mov PCSTKP,i1
+ UML_MOV(block, PCSTK, I0); // mov PCSTK,i0
UML_RET(block);
@@ -737,28 +737,28 @@ void adsp21062_device::static_generate_push_loop()
// add a global entry for this
alloc_handle(m_drcuml.get(), &m_push_loop, "push_loop");
- UML_HANDLE(block, *m_push_loop); // handle *m_push_loop
+ UML_HANDLE(block, *m_push_loop); // handle *m_push_loop
- UML_MOV(block, I2, LSTKP); // mov i2,LSTKP
- UML_ADD(block, I2, I2, 1); // add i2,1
- UML_CMP(block, I2, 6); // cmp i2,6
- UML_JMPc(block, COND_L, label); // jl label1
- UML_CALLC(block, cfunc_loopstack_overflow, this); // callc cfunc_loopstack_overflow
+ UML_MOV(block, I2, LSTKP); // mov i2,LSTKP
+ UML_ADD(block, I2, I2, 1); // add i2,1
+ UML_CMP(block, I2, 6); // cmp i2,6
+ UML_JMPc(block, COND_L, label); // jl label1
+ UML_CALLC(block, cfunc_loopstack_overflow, this); // callc cfunc_loopstack_overflow
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I2, 0); // cmp i2,0
- UML_JMPc(block, COND_E, label); // je label2
- UML_AND(block, STKY, STKY, ~0x4000000); // and STKY,~0x4000000
- UML_JMP(block, label + 1); // jmp label3
- UML_LABEL(block, label++); // label2:
- UML_OR(block, STKY, STKY, 0x4000000); // or STKY,0x4000000
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I2, 0); // cmp i2,0
+ UML_JMPc(block, COND_E, label); // je label2
+ UML_AND(block, STKY, STKY, ~0x4000000); // and STKY,~0x4000000
+ UML_JMP(block, label + 1); // jmp label3
+ UML_LABEL(block, label++); // label2:
+ UML_OR(block, STKY, STKY, 0x4000000); // or STKY,0x4000000
- UML_LABEL(block, label++); // label3:
+ UML_LABEL(block, label++); // label3:
- UML_STORE(block, m_core->lcstack, I2, I0, SIZE_DWORD, SCALE_x4); // store m_core->lcstack,i2,i0,dword,scale_x4
- UML_STORE(block, m_core->lastack, I2, I1, SIZE_DWORD, SCALE_x4); // store m_core->lastack,i2,i1,dword,scale_x4
- UML_MOV(block, CURLCNTR, I0); // mov CURLCNTR,i0
- UML_MOV(block, LSTKP, I2); // mov LSTKP,i2
+ UML_STORE(block, m_core->lcstack, I2, I0, SIZE_DWORD, SCALE_x4); // store m_core->lcstack,i2,i0,dword,scale_x4
+ UML_STORE(block, m_core->lastack, I2, I1, SIZE_DWORD, SCALE_x4); // store m_core->lastack,i2,i1,dword,scale_x4
+ UML_MOV(block, CURLCNTR, I0); // mov CURLCNTR,i0
+ UML_MOV(block, LSTKP, I2); // mov LSTKP,i2
UML_RET(block);
@@ -774,26 +774,26 @@ void adsp21062_device::static_generate_pop_loop()
// add a global entry for this
alloc_handle(m_drcuml.get(), &m_pop_loop, "pop_loop");
- UML_HANDLE(block, *m_pop_loop); // handle *m_pop_loop
-
- UML_MOV(block, I2, LSTKP); // mov i2,LSTKP
- UML_CMP(block, I2, 0); // cmp i2,0
- UML_JMPc(block, COND_NE, label); // jne label1
- UML_CALLC(block, cfunc_loopstack_underflow, this); // callc cfunc_loopstack_underflow
-
- UML_LABEL(block, label++); // label1:
- UML_SUB(block, I2, I2, 1); // sub i2,i2,1
- UML_CMP(block, I2, 0); // cmp i2,0
- UML_JMPc(block, COND_E, label); // je label2
- UML_AND(block, STKY, STKY, ~0x4000000); // and STKY,~0x4000000
- UML_JMP(block, label + 1); // jmp label3
- UML_LABEL(block, label++); // label2:
- UML_OR(block, STKY, STKY, 0x4000000); // or STKY,0x4000000
-
- UML_LABEL(block, label++); // label3:
- UML_LOAD(block, I0, m_core->lcstack, I2, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i2,dword,scale_x4
- UML_MOV(block, CURLCNTR, I0); // mov CURLCNTR,i0
- UML_MOV(block, LSTKP, I2); // mov LSTKP,i2
+ UML_HANDLE(block, *m_pop_loop); // handle *m_pop_loop
+
+ UML_MOV(block, I2, LSTKP); // mov i2,LSTKP
+ UML_CMP(block, I2, 0); // cmp i2,0
+ UML_JMPc(block, COND_NE, label); // jne label1
+ UML_CALLC(block, cfunc_loopstack_underflow, this); // callc cfunc_loopstack_underflow
+
+ UML_LABEL(block, label++); // label1:
+ UML_SUB(block, I2, I2, 1); // sub i2,i2,1
+ UML_CMP(block, I2, 0); // cmp i2,0
+ UML_JMPc(block, COND_E, label); // je label2
+ UML_AND(block, STKY, STKY, ~0x4000000); // and STKY,~0x4000000
+ UML_JMP(block, label + 1); // jmp label3
+ UML_LABEL(block, label++); // label2:
+ UML_OR(block, STKY, STKY, 0x4000000); // or STKY,0x4000000
+
+ UML_LABEL(block, label++); // label3:
+ UML_LOAD(block, I0, m_core->lcstack, I2, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i2,dword,scale_x4
+ UML_MOV(block, CURLCNTR, I0); // mov CURLCNTR,i0
+ UML_MOV(block, LSTKP, I2); // mov LSTKP,i2
UML_RET(block);
@@ -809,24 +809,24 @@ void adsp21062_device::static_generate_push_status()
// add a global entry for this
alloc_handle(m_drcuml.get(), &m_push_status, "push_status");
- UML_HANDLE(block, *m_push_status); // handle *m_push_status
+ UML_HANDLE(block, *m_push_status); // handle *m_push_status
- UML_MOV(block, I2, mem(&m_core->status_stkp)); // mov i2,[status_stkp]
- UML_ADD(block, I2, I2, 1); // add i2,1
- UML_CMP(block, I2, 5); // cmp i2,5
- UML_JMPc(block, COND_L, label); // jl label1
- UML_CALLC(block, cfunc_statusstack_overflow, this); // callc cfunc_statusstack_overflow
+ UML_MOV(block, I2, mem(&m_core->status_stkp)); // mov i2,[status_stkp]
+ UML_ADD(block, I2, I2, 1); // add i2,1
+ UML_CMP(block, I2, 5); // cmp i2,5
+ UML_JMPc(block, COND_L, label); // jl label1
+ UML_CALLC(block, cfunc_statusstack_overflow, this); // callc cfunc_statusstack_overflow
- UML_LABEL(block, label++); // label1:
- UML_CMP(block, I2, 0); // cmp i2,0
- UML_JMPc(block, COND_E, label); // je label2
- UML_AND(block, STKY, STKY, ~0x1000000); // and STKY,~0x1000000
- UML_JMP(block, label + 1); // jmp label3
- UML_LABEL(block, label++); // label2:
- UML_OR(block, STKY, STKY, 0x1000000); // or STKY,0x1000000
+ UML_LABEL(block, label++); // label1:
+ UML_CMP(block, I2, 0); // cmp i2,0
+ UML_JMPc(block, COND_E, label); // je label2
+ UML_AND(block, STKY, STKY, ~0x1000000); // and STKY,~0x1000000
+ UML_JMP(block, label + 1); // jmp label3
+ UML_LABEL(block, label++); // label2:
+ UML_OR(block, STKY, STKY, 0x1000000); // or STKY,0x1000000
- UML_LABEL(block, label++); // label3:
- UML_MOV(block, mem(&m_core->status_stkp), I2); // mov [status_stkp],i2
+ UML_LABEL(block, label++); // label3:
+ UML_MOV(block, mem(&m_core->status_stkp), I2); // mov [status_stkp],i2
//TODO: load MODE1
//TODO: load ASTAT
@@ -845,27 +845,27 @@ void adsp21062_device::static_generate_pop_status()
// add a global entry for this
alloc_handle(m_drcuml.get(), &m_pop_status, "pop_status");
- UML_HANDLE(block, *m_pop_status); // handle *m_pop_status
+ UML_HANDLE(block, *m_pop_status); // handle *m_pop_status
//TODO: store MODE1
//TODO: store ASTAT
-
- UML_MOV(block, I2, mem(&m_core->status_stkp)); // mov i2,[status_stkp]
- UML_CMP(block, I2, 0); // cmp i2,0
- UML_JMPc(block, COND_NE, label); // jl label1
- UML_CALLC(block, cfunc_statusstack_underflow, this); // callc cfunc_statusstack_underflow
-
- UML_LABEL(block, label++); // label1:
- UML_SUB(block, I2, I2, 1); // sub i2,1
- UML_CMP(block, I2, 0); // cmp i2,0
- UML_JMPc(block, COND_E, label); // je label2
- UML_AND(block, STKY, STKY, ~0x1000000); // and STKY,~0x1000000
- UML_JMP(block, label + 1); // jmp label3
- UML_LABEL(block, label++); // label2:
- UML_OR(block, STKY, STKY, 0x1000000); // or STKY,0x1000000
-
- UML_LABEL(block, label++); // label3:
- UML_MOV(block, mem(&m_core->status_stkp), I2); // mov [status_stkp],i2
+
+ UML_MOV(block, I2, mem(&m_core->status_stkp)); // mov i2,[status_stkp]
+ UML_CMP(block, I2, 0); // cmp i2,0
+ UML_JMPc(block, COND_NE, label); // jl label1
+ UML_CALLC(block, cfunc_statusstack_underflow, this); // callc cfunc_statusstack_underflow
+
+ UML_LABEL(block, label++); // label1:
+ UML_SUB(block, I2, I2, 1); // sub i2,1
+ UML_CMP(block, I2, 0); // cmp i2,0
+ UML_JMPc(block, COND_E, label); // je label2
+ UML_AND(block, STKY, STKY, ~0x1000000); // and STKY,~0x1000000
+ UML_JMP(block, label + 1); // jmp label3
+ UML_LABEL(block, label++); // label2:
+ UML_OR(block, STKY, STKY, 0x1000000); // or STKY,0x1000000
+
+ UML_LABEL(block, label++); // label3:
+ UML_MOV(block, mem(&m_core->status_stkp), I2); // mov [status_stkp],i2
UML_RET(block);
@@ -886,30 +886,30 @@ void adsp21062_device::static_generate_exception(UINT8 exception, const char *na
/* add a global entry for this */
alloc_handle(m_drcuml.get(), &exception_handle, name);
- UML_HANDLE(block, *exception_handle); // handle name
+ UML_HANDLE(block, *exception_handle); // handle name
- UML_AND(block, I3, mem(&m_core->irq_pending), IMASK); // and i3,[irq_pending],IMASK
- UML_TZCNT(block, I3, I3); // tzcnt i3,i3
+ UML_AND(block, I3, mem(&m_core->irq_pending), IMASK); // and i3,[irq_pending],IMASK
+ UML_TZCNT(block, I3, I3); // tzcnt i3,i3
- UML_MOV(block, I2, 1); // mov i2,1
- UML_SHL(block, I2, I2, I3); // shl i2,i2,i3
- UML_OR(block, IRPTL, IRPTL, I2); // or IRPTL,i2
+ UML_MOV(block, I2, 1); // mov i2,1
+ UML_SHL(block, I2, I2, I3); // shl i2,i2,i3
+ UML_OR(block, IRPTL, IRPTL, I2); // or IRPTL,i2
UML_XOR(block, mem(&m_core->irq_pending), mem(&m_core->irq_pending), I2); // xor [irq_pending],i2
- UML_MOV(block, mem(&m_core->active_irq_num), I3); // mov [active_irq_num],i3
- UML_MOV(block, mem(&m_core->interrupt_active), 1); // mov [interrupt_active],1
+ UML_MOV(block, mem(&m_core->active_irq_num), I3); // mov [active_irq_num],i3
+ UML_MOV(block, mem(&m_core->interrupt_active), 1); // mov [interrupt_active],1
- UML_CALLH(block, *m_push_pc); // callh m_push_pc
+ UML_CALLH(block, *m_push_pc); // callh m_push_pc
- UML_CMP(block, I3, 6); // cmp i3,6
- UML_JMPc(block, COND_L, label_nopush); // jl label_nopush
- UML_CMP(block, I3, 8); // cmp i3,8
- UML_JMPc(block, COND_G, label_nopush); // jg label_nopush
- UML_CALLH(block, *m_push_status); // callh m_push_status
+ UML_CMP(block, I3, 6); // cmp i3,6
+ UML_JMPc(block, COND_L, label_nopush); // jl label_nopush
+ UML_CMP(block, I3, 8); // cmp i3,8
+ UML_JMPc(block, COND_G, label_nopush); // jg label_nopush
+ UML_CALLH(block, *m_push_status); // callh m_push_status
- UML_LABEL(block, label_nopush); // label_nopush:
- UML_SHL(block, I0, I3, 2); // shl i0,i3,2
- UML_ADD(block, I0, I0, 0x20000); // add i0,0x20000
- UML_HASHJMP(block, 0, I0, *m_nocode); // hashjmp i0,m_nocode
+ UML_LABEL(block, label_nopush); // label_nopush:
+ UML_SHL(block, I0, I3, 2); // shl i0,i3,2
+ UML_ADD(block, I0, I0, 0x20000); // add i0,0x20000
+ UML_HASHJMP(block, 0, I0, *m_nocode); // hashjmp i0,m_nocode
block->end();
}
@@ -924,7 +924,7 @@ void adsp21062_device::static_generate_mode1_ops()
block = m_drcuml->begin_block(128);
alloc_handle(m_drcuml.get(), &m_swap_dag1_0_3, "swap_dag1_0_3");
- UML_HANDLE(block, *m_swap_dag1_0_3); // handle name
+ UML_HANDLE(block, *m_swap_dag1_0_3); // handle name
#if !USE_SWAPDQ
for (int i = 0; i < 4; i++)
{
@@ -956,7 +956,7 @@ void adsp21062_device::static_generate_mode1_ops()
block = m_drcuml->begin_block(128);
alloc_handle(m_drcuml.get(), &m_swap_dag1_4_7, "swap_dag1_4_7");
- UML_HANDLE(block, *m_swap_dag1_4_7); // handle name
+ UML_HANDLE(block, *m_swap_dag1_4_7); // handle name
#if !USE_SWAPDQ
for (int i = 4; i < 8; i++)
{
@@ -988,7 +988,7 @@ void adsp21062_device::static_generate_mode1_ops()
block = m_drcuml->begin_block(128);
alloc_handle(m_drcuml.get(), &m_swap_dag2_0_3, "swap_dag2_0_3");
- UML_HANDLE(block, *m_swap_dag2_0_3); // handle name
+ UML_HANDLE(block, *m_swap_dag2_0_3); // handle name
#if !USE_SWAPDQ
for (int i = 0; i < 4; i++)
{
@@ -1020,7 +1020,7 @@ void adsp21062_device::static_generate_mode1_ops()
block = m_drcuml->begin_block(128);
alloc_handle(m_drcuml.get(), &m_swap_dag2_4_7, "swap_dag2_4_7");
- UML_HANDLE(block, *m_swap_dag2_4_7); // handle name
+ UML_HANDLE(block, *m_swap_dag2_4_7); // handle name
#if !USE_SWAPDQ
for (int i = 4; i < 8; i++)
{
@@ -1052,7 +1052,7 @@ void adsp21062_device::static_generate_mode1_ops()
block = m_drcuml->begin_block(64);
alloc_handle(m_drcuml.get(), &m_swap_r0_7, "swap_r0_7");
- UML_HANDLE(block, *m_swap_r0_7); // handle name
+ UML_HANDLE(block, *m_swap_r0_7); // handle name
#if !USE_SWAPDQ
for (int i = 0; i < 8; i++)
{
@@ -1070,7 +1070,7 @@ void adsp21062_device::static_generate_mode1_ops()
block = m_drcuml->begin_block(64);
alloc_handle(m_drcuml.get(), &m_swap_r8_15, "swap_r8_15");
- UML_HANDLE(block, *m_swap_r8_15); // handle name
+ UML_HANDLE(block, *m_swap_r8_15); // handle name
#if !USE_SWAPDQ
for (int i = 8; i < 16; i++)
{
@@ -1095,8 +1095,8 @@ void adsp21062_device::execute_run_drc()
drcuml_state *drcuml = m_drcuml.get();
int execute_result;
-// if (m_cache_dirty)
-// printf("SHARC cache reset\n");
+// if (m_cache_dirty)
+// printf("SHARC cache reset\n");
/* reset the cache if dirty */
if (m_cache_dirty)
@@ -1173,7 +1173,7 @@ void adsp21062_device::compile_block(offs_t pc)
else
{
UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
- UML_HASHJMP(block, 0, seqhead->pc, *m_nocode); // hashjmp <0>,seqhead->pc,nocode
+ UML_HASHJMP(block, 0, seqhead->pc, *m_nocode); // hashjmp <0>,seqhead->pc,nocode
continue;
}
@@ -1202,10 +1202,10 @@ void adsp21062_device::compile_block(offs_t pc)
/* count off cycles and go there */
- generate_update_cycles(block, &compiler, nextpc, TRUE); // <subtract cycles>
+ generate_update_cycles(block, &compiler, nextpc, TRUE); // <subtract cycles>
if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc)
- UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode
+ UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode
}
block->end();
@@ -1271,23 +1271,23 @@ void adsp21062_device::static_generate_entry_point()
alloc_handle(m_drcuml.get(), &m_exception[EXCEPTION_INTERRUPT], "exception_interrupt");
alloc_handle(m_drcuml.get(), &m_entry, "entry");
- UML_HANDLE(block, *m_entry); // handle entry
+ UML_HANDLE(block, *m_entry); // handle entry
- load_fast_iregs(block); // <load fastregs>
+ load_fast_iregs(block); // <load fastregs>
- /* check for interrupts */
- UML_CMP(block, mem(&m_core->irq_pending), 0); // cmp [irq_pending],0
- UML_JMPc(block, COND_E, skip); // je skip
- UML_CMP(block, mem(&m_core->interrupt_active), 0); // cmp [interrupt_active],0
- UML_JMPc(block, COND_NE, skip); // jne skip
- UML_TEST(block, mem(&m_core->irq_pending), IMASK); // test [irq_pending],IMASK
- UML_JMPc(block, COND_Z, skip); // jz skip
- UML_TEST(block, mem(&m_core->mode1), MODE1_IRPTEN); // test MODE1,MODE1_IRPTEN
- UML_JMPc(block, COND_Z, skip); // jz skip
+ /* check for interrupts */
+ UML_CMP(block, mem(&m_core->irq_pending), 0); // cmp [irq_pending],0
+ UML_JMPc(block, COND_E, skip); // je skip
+ UML_CMP(block, mem(&m_core->interrupt_active), 0); // cmp [interrupt_active],0
+ UML_JMPc(block, COND_NE, skip); // jne skip
+ UML_TEST(block, mem(&m_core->irq_pending), IMASK); // test [irq_pending],IMASK
+ UML_JMPc(block, COND_Z, skip); // jz skip
+ UML_TEST(block, mem(&m_core->mode1), MODE1_IRPTEN); // test MODE1,MODE1_IRPTEN
+ UML_JMPc(block, COND_Z, skip); // jz skip
- UML_MOV(block, I0, mem(&m_core->pc)); // mov i0,nextpc
- UML_MOV(block, I1, 0); // mov i1,0
- UML_CALLH(block, *m_exception[EXCEPTION_INTERRUPT]); // callh m_exception[EXCEPTION_INTERRUPT]
+ UML_MOV(block, I0, mem(&m_core->pc)); // mov i0,nextpc
+ UML_MOV(block, I1, 0); // mov i1,0
+ UML_CALLH(block, *m_exception[EXCEPTION_INTERRUPT]); // callh m_exception[EXCEPTION_INTERRUPT]
UML_LABEL(block, skip);
@@ -1307,11 +1307,11 @@ void adsp21062_device::static_generate_nocode_handler()
/* generate a hash jump via the current mode and PC */
alloc_handle(m_drcuml.get(), &m_nocode, "nocode");
- UML_HANDLE(block, *m_nocode); // handle nocode
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0
- save_fast_iregs(block); // <save fastregs>
- UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
+ UML_HANDLE(block, *m_nocode); // handle nocode
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0
+ save_fast_iregs(block); // <save fastregs>
+ UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
block->end();
}
@@ -1325,11 +1325,11 @@ void adsp21062_device::static_generate_out_of_cycles()
/* generate a hash jump via the current mode and PC */
alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles");
- UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
- save_fast_iregs(block); // <save fastregs>
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
+ UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
+ save_fast_iregs(block); // <save fastregs>
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
block->end();
}
@@ -1338,8 +1338,8 @@ void adsp21062_device::static_generate_out_of_cycles()
void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool last_delayslot)
{
/* add an entry for the log */
-// if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
-// log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]);
+// if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
+// log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]);
/* set the PC map variable */
UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc
@@ -1353,17 +1353,17 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
/* if we are debugging, call the debugger */
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
- UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
- save_fast_iregs(block); // <save fastregs>
- UML_DEBUG(block, desc->pc); // debug desc->pc
+ UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
+ save_fast_iregs(block); // <save fastregs>
+ UML_DEBUG(block, desc->pc); // debug desc->pc
}
/* if we hit an unmapped address, fatal error */
if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
{
- UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
- save_fast_iregs(block); // <save fastregs>
- UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
+ UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
+ save_fast_iregs(block); // <save fastregs>
+ UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
}
// handle a special case where call is used as the last operation in a loop
@@ -1377,19 +1377,19 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
UML_JMPc(block, COND_NE, end);
code_label label_expire = compiler->labelnum++;
- UML_MOV(block, I1, mem(&m_core->lstkp)); // mov i1,[m_core->lstkp]
- UML_LOAD(block, I0, m_core->lcstack, I1, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i1,dword,scale_x4
- UML_SUB(block, I0, I0, 1); // sub i0,1
- UML_STORE(block, m_core->lcstack, I1, I0, SIZE_DWORD, SCALE_x4); // store m_core->lcstack,i1,i0,dword,scale_x4
- UML_SUB(block, CURLCNTR, CURLCNTR, 1); // sub CURLCNTR,1
- UML_JMPc(block, COND_E, label_expire); // jne label_expire
+ UML_MOV(block, I1, mem(&m_core->lstkp)); // mov i1,[m_core->lstkp]
+ UML_LOAD(block, I0, m_core->lcstack, I1, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i1,dword,scale_x4
+ UML_SUB(block, I0, I0, 1); // sub i0,1
+ UML_STORE(block, m_core->lcstack, I1, I0, SIZE_DWORD, SCALE_x4); // store m_core->lcstack,i1,i0,dword,scale_x4
+ UML_SUB(block, CURLCNTR, CURLCNTR, 1); // sub CURLCNTR,1
+ UML_JMPc(block, COND_E, label_expire); // jne label_expire
UML_MOV(block, mem(&m_core->temp_return), desc->userdata0);
UML_JMP(block, end);
- UML_LABEL(block, label_expire); // label_expire:
- UML_CALLH(block, *m_pop_pc); // callh m_pop_pc
- UML_CALLH(block, *m_pop_loop); // callh m_pop_loop
+ UML_LABEL(block, label_expire); // label_expire:
+ UML_CALLH(block, *m_pop_pc); // callh m_pop_pc
+ UML_CALLH(block, *m_pop_loop); // callh m_pop_loop
UML_MOV(block, mem(&m_core->temp_return), desc->pc + 1);
UML_LABEL(block, end);
@@ -1418,8 +1418,8 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
}
/* if this is an invalid opcode, generate the exception now */
-// if (desc->flags & OPFLAG_INVALID_OPCODE)
-// UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000
+// if (desc->flags & OPFLAG_INVALID_OPCODE)
+// UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000
/* unless this is a virtual no-op, it's a regular instruction */
if (!(desc->flags & OPFLAG_VIRTUAL_NOOP))
@@ -1427,9 +1427,9 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
/* compile the instruction */
if (!generate_opcode(block, compiler, desc))
{
- UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
- UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); // dmov [arg64],*desc->opptr.q
- UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented,ppc
+ UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
+ UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); // dmov [arg64],*desc->opptr.q
+ UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented,ppc
}
}
@@ -1438,7 +1438,7 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
if (compiler->mode1_delay.counter > 0)
{
compiler->mode1_delay.counter--;
-
+
// delayed operation in the last delay slot needs to be done before the branch is taken
if (last_delayslot)
compiler->mode1_delay.counter = 0;
@@ -1467,7 +1467,7 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
}
- // insert loop check at this instruction if needed
+ // insert loop check at this instruction if needed
if (desc->userflags & OP_USERFLAG_COUNTER_LOOP)
{
code_label label_skip_loop = compiler->labelnum++;
@@ -1476,18 +1476,18 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block *block, compil
UML_JMPc(block, COND_NE, label_skip_loop);
code_label label_expire = compiler->labelnum++;
- UML_MOV(block, I1, mem(&m_core->lstkp)); // mov i1,[m_core->lstkp]
- UML_LOAD(block, I0, m_core->lcstack, I1, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i1,dword,scale_x4
- UML_SUB(block, I0, I0, 1); // sub i0,1
- UML_STORE(block, m_core->lcstack, I1, I0, SIZE_DWORD, SCALE_x4); // store m_core->lcstack,i1,i0,dword,scale_x4
- UML_SUB(block, CURLCNTR, CURLCNTR, 1); // sub CURLCNTR,1
- UML_JMPc(block, COND_E, label_expire); // jne label_expire
+ UML_MOV(block, I1, mem(&m_core->lstkp)); // mov i1,[m_core->lstkp]
+ UML_LOAD(block, I0, m_core->lcstack, I1, SIZE_DWORD, SCALE_x4); // load i0,m_core->lcstack,i1,dword,scale_x4
+ UML_SUB(block, I0, I0, 1); // sub i0,1
+ UML_STORE(block, m_core->lcstack, I1, I0, SIZE_DWORD, SCALE_x4); // store m_core->lcstack,i1,i0,dword,scale_x4
+ UML_SUB(block, CURLCNTR, CURLCNTR, 1); // sub CURLCNTR,1
+ UML_JMPc(block, COND_E, label_expire); // jne label_expire
generate_loop_jump(block, compiler, desc);
- UML_LABEL(block, label_expire); // label_expire:
- UML_CALLH(block, *m_pop_pc); // callh m_pop_pc
- UML_CALLH(block, *m_pop_loop); // callh m_pop_loop
+ UML_LABEL(block, label_expire); // label_expire:
+ UML_CALLH(block, *m_pop_pc); // callh m_pop_pc
+ UML_CALLH(block, *m_pop_loop); // callh m_pop_loop
UML_LABEL(block, label_skip_loop);
}
@@ -1544,18 +1544,18 @@ void adsp21062_device::generate_update_cycles(drcuml_block *block, compiler_stat
code_label skip = compiler->labelnum++;
compiler->checkints = FALSE;
- UML_CMP(block, mem(&m_core->irq_pending), 0); // cmp [irq_pending],0
- UML_JMPc(block, COND_E, skip); // je skip
- UML_CMP(block, mem(&m_core->interrupt_active), 0); // cmp [interrupt_active],0
- UML_JMPc(block, COND_NE, skip); // jne skip
- UML_TEST(block, mem(&m_core->irq_pending), IMASK); // test [irq_pending],IMASK
- UML_JMPc(block, COND_Z, skip); // jz skip
- UML_TEST(block, mem(&m_core->mode1), MODE1_IRPTEN); // test MODE1,MODE1_IRPTEN
- UML_JMPc(block, COND_Z, skip); // jz skip
+ UML_CMP(block, mem(&m_core->irq_pending), 0); // cmp [irq_pending],0
+ UML_JMPc(block, COND_E, skip); // je skip
+ UML_CMP(block, mem(&m_core->interrupt_active), 0); // cmp [interrupt_active],0
+ UML_JMPc(block, COND_NE, skip); // jne skip
+ UML_TEST(block, mem(&m_core->irq_pending), IMASK); // test [irq_pending],IMASK
+ UML_JMPc(block, COND_Z, skip); // jz skip
+ UML_TEST(block, mem(&m_core->mode1), MODE1_IRPTEN); // test MODE1,MODE1_IRPTEN
+ UML_JMPc(block, COND_Z, skip); // jz skip
- UML_MOV(block, I0, param); // mov i0,nextpc
- UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
- UML_CALLH(block, *m_exception[EXCEPTION_INTERRUPT]); // callh m_exception[EXCEPTION_INTERRUPT]
+ UML_MOV(block, I0, param); // mov i0,nextpc
+ UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
+ UML_CALLH(block, *m_exception[EXCEPTION_INTERRUPT]); // callh m_exception[EXCEPTION_INTERRUPT]
UML_LABEL(block, skip);
}
@@ -1563,10 +1563,10 @@ void adsp21062_device::generate_update_cycles(drcuml_block *block, compiler_stat
/* account for cycles */
if (compiler->cycles > 0)
{
- UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
- UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
+ UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
if (allow_exception)
- UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc
+ UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc
}
compiler->cycles = 0;
}
@@ -1586,42 +1586,42 @@ void adsp21062_device::generate_write_mode1_imm(drcuml_block *block, compiler_st
// DAG1 regs 4-7
skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x8);
- UML_JMPc(block, (data & 0x8) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
+ UML_JMPc(block, (data & 0x8) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_dag1_4_7);
UML_LABEL(block, skip);
// DAG1 regs 0-3
skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x10);
- UML_JMPc(block, (data & 0x10) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
+ UML_JMPc(block, (data & 0x10) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_dag1_0_3);
UML_LABEL(block, skip);
// DAG2 regs 4-7
skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x20);
- UML_JMPc(block, (data & 0x20) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
+ UML_JMPc(block, (data & 0x20) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_dag2_4_7);
UML_LABEL(block, skip);
// DAG2 regs 0-3
skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x40);
- UML_JMPc(block, (data & 0x40) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
+ UML_JMPc(block, (data & 0x40) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_dag2_0_3);
UML_LABEL(block, skip);
// REG 8-15
skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x80);
- UML_JMPc(block, (data & 0x80) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
+ UML_JMPc(block, (data & 0x80) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_r8_15);
UML_LABEL(block, skip);
// REG 0-7
skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x400);
- UML_JMPc(block, (data & 0x400) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
+ UML_JMPc(block, (data & 0x400) ? COND_NZ : COND_Z, skip); // don't swap if the bits are same
UML_CALLH(block, *m_swap_r0_7);
UML_LABEL(block, skip);
@@ -1636,51 +1636,51 @@ void adsp21062_device::generate_set_mode1_imm(drcuml_block *block, compiler_stat
fatalerror("generate_set_mode1_imm: tried to enable I0 bit reversing");
if (data & 0x4)
fatalerror("generate_set_mode1_imm: tried to enable MR alternate");
- if (data & 0x8) // DAG1 regs 4-7
+ if (data & 0x8) // DAG1 regs 4-7
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x8);
- UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
+ UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_dag1_4_7);
UML_LABEL(block, skip);
}
- if (data & 0x10) // DAG1 regs 0-3
+ if (data & 0x10) // DAG1 regs 0-3
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x10);
- UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
+ UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_dag1_0_3);
UML_LABEL(block, skip);
}
- if (data & 0x20) // DAG2 regs 4-7
+ if (data & 0x20) // DAG2 regs 4-7
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x20);
- UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
+ UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_dag2_4_7);
UML_LABEL(block, skip);
}
- if (data & 0x40) // DAG1 regs 0-3
+ if (data & 0x40) // DAG1 regs 0-3
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x40);
- UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
+ UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_dag2_0_3);
UML_LABEL(block, skip);
}
- if (data & 0x80) // REG 8-15
+ if (data & 0x80) // REG 8-15
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x80);
- UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
+ UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_r8_15);
UML_LABEL(block, skip);
}
- if (data & 0x400) // REG 0-7
+ if (data & 0x400) // REG 0-7
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x400);
- UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
+ UML_JMPc(block, COND_NZ, skip); // don't swap if the bit is already 1
UML_CALLH(block, *m_swap_r0_7);
UML_LABEL(block, skip);
}
@@ -1696,51 +1696,51 @@ void adsp21062_device::generate_clear_mode1_imm(drcuml_block *block, compiler_st
fatalerror("generate_clear_mode1_imm: tried to disable I0 bit reversing");
if (data & 0x4)
fatalerror("generate_clear_mode1_imm: tried to disable MR alternate");
- if (data & 0x8) // DAG1 regs 4-7
+ if (data & 0x8) // DAG1 regs 4-7
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x8);
- UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
+ UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_dag1_4_7);
UML_LABEL(block, skip);
}
- if (data & 0x10) // DAG1 regs 0-3
+ if (data & 0x10) // DAG1 regs 0-3
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x10);
- UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
+ UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_dag1_0_3);
UML_LABEL(block, skip);
}
- if (data & 0x20) // DAG2 regs 4-7
+ if (data & 0x20) // DAG2 regs 4-7
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x20);
- UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
+ UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_dag2_4_7);
UML_LABEL(block, skip);
}
- if (data & 0x40) // DAG1 regs 0-3
+ if (data & 0x40) // DAG1 regs 0-3
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x40);
- UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
+ UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_dag2_0_3);
UML_LABEL(block, skip);
}
- if (data & 0x80) // REG 8-15
+ if (data & 0x80) // REG 8-15
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x80);
- UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
+ UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_r8_15);
UML_LABEL(block, skip);
}
- if (data & 0x400) // REG 0-7
+ if (data & 0x400) // REG 0-7
{
code_label skip = compiler->labelnum++;
UML_TEST(block, MODE1, 0x400);
- UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
+ UML_JMPc(block, COND_Z, skip); // don't swap if the bit is already 0
UML_CALLH(block, *m_swap_r0_7);
UML_LABEL(block, skip);
}
@@ -1827,7 +1827,7 @@ void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compil
// save branch target
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
{
- UML_MOV(block, mem(&m_core->jmpdest), I0); // mov [jmpdest],i0
+ UML_MOV(block, mem(&m_core->jmpdest), I0); // mov [jmpdest],i0
}
// compile delay slots if needed
@@ -1847,7 +1847,7 @@ void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compil
if (delayslot)
UML_MOV(block, I0, desc->pc + 3);
else
- UML_MOV(block, I0, desc->pc + 1);
+ UML_MOV(block, I0, desc->pc + 1);
}
UML_CALLH(block, *m_push_pc);
@@ -1856,14 +1856,14 @@ void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compil
{
generate_update_cycles(block, &compiler_temp, desc->targetpc, TRUE);
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
- UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
+ UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
else
- UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode
+ UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode
}
else
{
generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), TRUE);
- UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode
+ UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode
}
// update compiler label
@@ -1871,7 +1871,7 @@ void adsp21062_device::generate_call(drcuml_block *block, compiler_state *compil
/* reset the mapvar to the current cycles and account for skipped slots */
compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
}
void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, bool delayslot, bool loopabort, bool clearint)
@@ -1883,7 +1883,7 @@ void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compil
// save branch target
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
{
- UML_MOV(block, mem(&m_core->jmpdest), I0); // mov [jmpdest],i0
+ UML_MOV(block, mem(&m_core->jmpdest), I0); // mov [jmpdest],i0
}
// compile delay slots if needed
@@ -1898,13 +1898,13 @@ void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compil
{
code_label skip_pop = compiler_temp.labelnum++;
- UML_MOV(block, mem(&m_core->interrupt_active), 0); // mov [interrupt_active],0
- UML_SHL(block, I1, 1, mem(&m_core->active_irq_num)); // shl i1,1,[active_irq_num]
- UML_XOR(block, IRPTL, IRPTL, I1); // xor IRPTL,i1
- UML_CMP(block, mem(&m_core->status_stkp), 0); // cmp [status_stkp],0
- UML_JMPc(block, COND_Z, skip_pop); // jz skip_pop
- UML_CALLH(block, *m_pop_status); // callh m_pop_status
- UML_LABEL(block, skip_pop); // skip_pop:
+ UML_MOV(block, mem(&m_core->interrupt_active), 0); // mov [interrupt_active],0
+ UML_SHL(block, I1, 1, mem(&m_core->active_irq_num)); // shl i1,1,[active_irq_num]
+ UML_XOR(block, IRPTL, IRPTL, I1); // xor IRPTL,i1
+ UML_CMP(block, mem(&m_core->status_stkp), 0); // cmp [status_stkp],0
+ UML_JMPc(block, COND_Z, skip_pop); // jz skip_pop
+ UML_CALLH(block, *m_pop_status); // callh m_pop_status
+ UML_LABEL(block, skip_pop); // skip_pop:
}
// loop abort
@@ -1919,14 +1919,14 @@ void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compil
{
generate_update_cycles(block, &compiler_temp, desc->targetpc, TRUE);
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
- UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
+ UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
else
- UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode
+ UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode
}
else
{
generate_update_cycles(block, &compiler_temp, mem(&m_core->jmpdest), TRUE);
- UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode
+ UML_HASHJMP(block, 0, mem(&m_core->jmpdest), *m_nocode); // hashjmp 0,jmpdest,nocode
}
// update compiler label
@@ -1934,7 +1934,7 @@ void adsp21062_device::generate_jump(drcuml_block *block, compiler_state *compil
/* reset the mapvar to the current cycles and account for skipped slots */
compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
}
void adsp21062_device::generate_loop_jump(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
@@ -1943,15 +1943,15 @@ void adsp21062_device::generate_loop_jump(drcuml_block *block, compiler_state *c
generate_update_cycles(block, compiler, desc->userdata0, TRUE);
/*
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
- UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
+ UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000
else
- UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode
- */
+ UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode
+ */
UML_HASHJMP(block, 0, desc->userdata0, *m_nocode);
/* reset the mapvar to the current cycles and account for skipped slots */
compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
}
/*-------------------------------------------------
@@ -2002,25 +2002,25 @@ void adsp21062_device::generate_read_ureg(drcuml_block *block, compiler_state *c
UML_MOV(block, I0, mem(&m_core->dag2.b[ureg & 7]));
break;
- case 0x64: // PCSTK
+ case 0x64: // PCSTK
UML_LOAD(block, I0, &m_core->pcstack, PCSTKP, SIZE_DWORD, SCALE_x4);
break;
- case 0x70: // USTAT1
+ case 0x70: // USTAT1
UML_MOV(block, I0, mem(&m_core->ustat1));
break;
- case 0x71: // USTAT2
+ case 0x71: // USTAT2
UML_MOV(block, I0, mem(&m_core->ustat2));
break;
- case 0x79: // IRPTL
+ case 0x79: // IRPTL
UML_MOV(block, I0, mem(&m_core->irptl));
break;
- case 0x7a: // MODE2
+ case 0x7a: // MODE2
UML_MOV(block, I0, mem(&m_core->mode2));
break;
- case 0x7b: // MODE1
+ case 0x7b: // MODE1
UML_MOV(block, I0, mem(&m_core->mode1));
break;
- case 0x7c: // ASTAT
+ case 0x7c: // ASTAT
// construct from bits
if (!has_compute)
{
@@ -2111,20 +2111,20 @@ void adsp21062_device::generate_read_ureg(drcuml_block *block, compiler_state *c
UML_OR(block, I0, I0, I1);
}
break;
- case 0x7d: // IMASK
+ case 0x7d: // IMASK
UML_MOV(block, I0, mem(&m_core->imask));
break;
- case 0x7e: // STKY
+ case 0x7e: // STKY
UML_MOV(block, I0, mem(&m_core->stky));
break;
- case 0xdb: // PX
- UML_DMOV(block, I0, mem(&m_core->px)); // NOTE: this returns 64 bits
+ case 0xdb: // PX
+ UML_DMOV(block, I0, mem(&m_core->px)); // NOTE: this returns 64 bits
break;
- case 0xdc: // PX1 (bits 0-15 of PX)
+ case 0xdc: // PX1 (bits 0-15 of PX)
UML_MOV(block, I0, mem(&m_core->px));
UML_AND(block, I0, I0, 0xffff);
break;
- case 0xdd: // PX2 (bits 16-47 of PX)
+ case 0xdd: // PX2 (bits 16-47 of PX)
UML_DMOV(block, I0, mem(&m_core->px));
UML_DSHR(block, I0, I0, 16);
UML_DAND(block, I0, I0, 0xffffffff);
@@ -2138,7 +2138,7 @@ void adsp21062_device::generate_read_ureg(drcuml_block *block, compiler_state *c
/*-------------------------------------------------
- generate_write_ureg - contents of register I0 or 32-bit immediate data are written into UREG
+ generate_write_ureg - contents of register I0 or 32-bit immediate data are written into UREG
-------------------------------------------------*/
void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, int ureg, bool imm, UINT32 data)
@@ -2187,31 +2187,31 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
UML_MOV(block, PM_B(ureg & 7), imm ? data : I0);
break;
- case 0x64: // PCSTK
+ case 0x64: // PCSTK
fatalerror("generate_write_ureg: PCSTK");
break;
- case 0x65: // PCSTKP
+ case 0x65: // PCSTKP
UML_MOV(block, PCSTKP, imm ? data : I0);
break;
- case 0x67: // CURLCNTR
+ case 0x67: // CURLCNTR
UML_MOV(block, CURLCNTR, imm ? data : I0);
break;
- case 0x68: // LCNTR
+ case 0x68: // LCNTR
UML_MOV(block, LCNTR, imm ? data : I0);
break;
- case 0x70: // USTAT1
+ case 0x70: // USTAT1
UML_MOV(block, mem(&m_core->ustat1), imm ? data : I0);
break;
- case 0x71: // USTAT2
+ case 0x71: // USTAT2
UML_MOV(block, mem(&m_core->ustat2), imm ? data : I0);
break;
- case 0x79: // IRPTL
+ case 0x79: // IRPTL
UML_MOV(block, mem(&m_core->irptl), imm ? data : I0);
break;
- case 0x7a: // MODE2
+ case 0x7a: // MODE2
UML_MOV(block, mem(&m_core->mode2), imm ? data : I0);
break;
- case 0x7b: // MODE1
+ case 0x7b: // MODE1
// MODE1 needs to be written delayed
if (imm)
{
@@ -2226,17 +2226,17 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
UML_MOV(block, mem(&m_core->mode1_delay_data), I0);
}
break;
- case 0x7c: // ASTAT
+ case 0x7c: // ASTAT
// TODO: needs bit break up
fatalerror("generate_write_ureg: ASTAT");
break;
- case 0x7d: // IMASK
+ case 0x7d: // IMASK
UML_MOV(block, mem(&m_core->imask), imm ? data : I0);
break;
- case 0x7e: // STKY
+ case 0x7e: // STKY
UML_MOV(block, mem(&m_core->stky), imm ? data : I0);
break;
- case 0xdb: // PX
+ case 0xdb: // PX
if (imm)
{
fatalerror("generate_write_ureg %02X with immediate!", ureg);
@@ -2246,7 +2246,7 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
UML_DMOV(block, mem(&m_core->px), I0);
}
break;
- case 0xdc: // PX1 (bits 0-15 of PX)
+ case 0xdc: // PX1 (bits 0-15 of PX)
if (imm)
{
UML_DAND(block, mem(&m_core->px), mem(&m_core->px), ~0xffff);
@@ -2260,7 +2260,7 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
UML_DOR(block, mem(&m_core->px), mem(&m_core->px), I1);
}
break;
- case 0xdd: // PX2 (bits 16-47 of PX)
+ case 0xdd: // PX2 (bits 16-47 of PX)
if (imm)
{
UML_DAND(block, mem(&m_core->px), mem(&m_core->px), 0xffff);
@@ -2268,7 +2268,7 @@ void adsp21062_device::generate_write_ureg(drcuml_block *block, compiler_state *
}
else
{
- UML_DAND(block, mem(&m_core->px), mem(&m_core->px), 0xffff);
+ UML_DAND(block, mem(&m_core->px), mem(&m_core->px), 0xffff);
UML_DSHL(block, I0, I0, 16);
UML_DOR(block, mem(&m_core->px), mem(&m_core->px), I0);
}
@@ -2286,12 +2286,12 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
switch ((opcode >> 45) & 7)
{
- case 0: // subops
+ case 0: // subops
{
UINT32 subop = (opcode >> 40) & 0x1f;
switch (subop)
{
- case 0x00: // NOP / idle |000|00000|
+ case 0x00: // NOP / idle |000|00000|
if (opcode & U64(0x008000000000))
{
// IDLE
@@ -2306,7 +2306,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
}
break;
- case 0x01: // compute |000|00001|
+ case 0x01: // compute |000|00001|
{
int cond = (opcode >> 33) & 0x1f;
@@ -2326,7 +2326,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x02: // immediate shift |000|00010|
+ case 0x02: // immediate shift |000|00010|
{
int shiftop = (opcode >> 16) & 0x3f;
int rn = (opcode >> 4) & 0xf;
@@ -2342,15 +2342,15 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
skip_label = compiler->labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
-
+
generate_shift_imm(block, compiler, desc, data, shiftop, rn, rx);
-
- if (has_condition)
- UML_LABEL(block, skip_label);
+
+ if (has_condition)
+ UML_LABEL(block, skip_label);
return TRUE;
}
- case 0x04: // compute / modify |000|00100|
+ case 0x04: // compute / modify |000|00100|
{
int cond = (opcode >> 33) & 0x1f;
int g = (opcode >> 38) & 0x1;
@@ -2387,7 +2387,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x06: // direct jump|call |000|00110|
+ case 0x06: // direct jump|call |000|00110|
{
int b = (opcode >> 39) & 0x1;
int j = (opcode >> 26) & 0x1;
@@ -2405,7 +2405,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
}
if (b) // call
{
- generate_call(block, compiler, desc, j != 0);
+ generate_call(block, compiler, desc, j != 0);
}
else // jump
{
@@ -2416,7 +2416,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x07: // direct jump|call |000|00111|
+ case 0x07: // direct jump|call |000|00111|
{
int b = (opcode >> 39) & 0x1;
int j = (opcode >> 26) & 0x1;
@@ -2445,7 +2445,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x08: // indirect jump|call / compute |000|01000|
+ case 0x08: // indirect jump|call / compute |000|01000|
{
int la = (opcode >> 38) & 0x1;
int ci = (opcode >> 24) & 0x1;
@@ -2508,7 +2508,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x09: // indirect jump|call / compute |000|01001|
+ case 0x09: // indirect jump|call / compute |000|01001|
{
int la = (opcode >> 38) & 0x1;
int ci = (opcode >> 24) & 0x1;
@@ -2532,7 +2532,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
{
generate_jump(block, compiler, desc, j != 0, la != 0, ci != 0);
}
-
+
UML_LABEL(block, label_else);
generate_compute(block, compiler, desc);
}
@@ -2565,12 +2565,12 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x0a: // return from subroutine / compute |000|01010|
+ case 0x0a: // return from subroutine / compute |000|01010|
{
int cond = (opcode >> 33) & 0x1f;
int j = (opcode >> 26) & 0x1;
int e = (opcode >> 25) & 0x1;
- //int lr = (opcode >> 24) & 0x1;
+ //int lr = (opcode >> 24) & 0x1;
// TODO: loop re-entry
@@ -2583,7 +2583,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
UML_CALLH(block, *m_pop_pc);
generate_jump(block, compiler, desc, j != 0, false, false);
-
+
UML_LABEL(block, label_else);
generate_compute(block, compiler, desc);
}
@@ -2610,7 +2610,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x0b: // return from interrupt / compute |000|01011|
+ case 0x0b: // return from interrupt / compute |000|01011|
{
int cond = (opcode >> 33) & 0x1f;
int j = (opcode >> 26) & 0x1;
@@ -2619,15 +2619,15 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
code_label skip_pop = compiler->labelnum++;
- UML_MOV(block, mem(&m_core->interrupt_active), 0); // mov [interrupt_active],0
- UML_MOV(block, I0, 1); // mov i0,1
- UML_SHL(block, I0, I0, mem(&m_core->active_irq_num)); // shl i0,[active_irq_num]
- UML_XOR(block, IRPTL, IRPTL, I0); // xor IRPTL,i0
- UML_CMP(block, mem(&m_core->status_stkp), 0); // cmp [status_stkp],0
- UML_JMPc(block, COND_Z, skip_pop); // jz skip_pop
- UML_CALLH(block, *m_pop_status); // callh m_pop_status
+ UML_MOV(block, mem(&m_core->interrupt_active), 0); // mov [interrupt_active],0
+ UML_MOV(block, I0, 1); // mov i0,1
+ UML_SHL(block, I0, I0, mem(&m_core->active_irq_num)); // shl i0,[active_irq_num]
+ UML_XOR(block, IRPTL, IRPTL, I0); // xor IRPTL,i0
+ UML_CMP(block, mem(&m_core->status_stkp), 0); // cmp [status_stkp],0
+ UML_JMPc(block, COND_Z, skip_pop); // jz skip_pop
+ UML_CALLH(block, *m_pop_status); // callh m_pop_status
- UML_LABEL(block, skip_pop); // skip_pop:
+ UML_LABEL(block, skip_pop); // skip_pop:
// TODO: check interrupts
@@ -2667,7 +2667,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x0c: // do until counter expired |000|01100|
+ case 0x0c: // do until counter expired |000|01100|
{
UINT16 data = (UINT16)(opcode >> 24);
int offset = SIGN_EXTEND24(opcode & 0xffffff);
@@ -2680,7 +2680,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
UML_MOV(block, I0, desc->pc + 1);
UML_CALLH(block, *m_push_pc);
- // push loop
+ // push loop
UML_MOV(block, I0, data);
UML_MOV(block, I1, address);
UML_CALLH(block, *m_push_loop);
@@ -2688,7 +2688,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x0d: // do until counter expired |000|01101|
+ case 0x0d: // do until counter expired |000|01101|
{
int ureg = (opcode >> 32) & 0xff;
int offset = SIGN_EXTEND24(opcode & 0xffffff);
@@ -2703,14 +2703,14 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
UML_MOV(block, I0, desc->pc + 1);
UML_CALLH(block, *m_push_pc);
- // push loop
+ // push loop
UML_MOV(block, I0, I3);
UML_MOV(block, I1, address);
UML_CALLH(block, *m_push_loop);
return TRUE;
}
- case 0x0e: // do until |000|01110|
+ case 0x0e: // do until |000|01110|
{
int offset = SIGN_EXTEND24(opcode & 0xffffff);
UINT32 address = desc->pc + offset;
@@ -2726,7 +2726,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x0f: // immediate data -> ureg |000|01111|
+ case 0x0f: // immediate data -> ureg |000|01111|
{
int ureg = (opcode >> 32) & 0xff;
UINT32 data = (UINT32)opcode;
@@ -2735,7 +2735,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x10: // ureg <-> DM|PM (direct) |000|100|G|D|
+ case 0x10: // ureg <-> DM|PM (direct) |000|100|G|D|
case 0x11:
case 0x12:
case 0x13:
@@ -2754,7 +2754,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
if (g)
{
// PM
- if (ureg == 0xdb) // PX is 48-bit
+ if (ureg == 0xdb) // PX is 48-bit
UML_CALLH(block, *m_pm_write48);
else
UML_CALLH(block, *m_pm_write32);
@@ -2771,7 +2771,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
if (g)
{
// PM
- if (ureg == 0xdb) // PX is 48-bit
+ if (ureg == 0xdb) // PX is 48-bit
UML_CALLH(block, *m_pm_read48);
else
UML_CALLH(block, *m_pm_read32);
@@ -2787,7 +2787,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x14: // system register bit manipulation |000|10100|
+ case 0x14: // system register bit manipulation |000|10100|
{
int bop = (opcode >> 37) & 0x7;
int sreg = (opcode >> 32) & 0xf;
@@ -2795,7 +2795,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
switch (bop)
{
- case 0: // SET
+ case 0: // SET
{
switch (sreg)
{
@@ -2816,7 +2816,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
compiler->mode1_delay.data = data;
compiler->mode1_delay.mode = MODE1_SET;
break;
- case 0xc: // ASTAT
+ case 0xc: // ASTAT
// TODO: does this need delay?
if (data & ASTAT_FLAGS::AZ)
UML_MOV(block, ASTAT_AZ, 1);
@@ -2876,7 +2876,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
}
return TRUE;
}
- case 1: // CLEAR
+ case 1: // CLEAR
{
switch (sreg)
{
@@ -2957,7 +2957,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
}
return TRUE;
}
- case 2: // TOGGLE
+ case 2: // TOGGLE
{
switch (sreg)
{
@@ -2995,7 +2995,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
}
return TRUE;
}
- case 4: // TEST
+ case 4: // TEST
{
switch (sreg)
{
@@ -3047,7 +3047,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
}
return TRUE;
}
- case 5: // XOR
+ case 5: // XOR
{
return FALSE;
}
@@ -3058,13 +3058,13 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x16: // I register modify / bit-reverse |000|10110|
+ case 0x16: // I register modify / bit-reverse |000|10110|
{
- if (opcode & U64(0x008000000000)) // bit reverse
+ if (opcode & U64(0x008000000000)) // bit reverse
{
return FALSE;
}
- else // modify
+ else // modify
{
int g = (opcode >> 38) & 0x1;
int i = (opcode >> 32) & 0x7;
@@ -3085,7 +3085,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
}
}
- case 0x17: // push|pop stacks / flush cache |000|10111|
+ case 0x17: // push|pop stacks / flush cache |000|10111|
{
if (opcode & U64(0x008000000000))
{
@@ -3115,10 +3115,10 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 0x18: // cjump |000|11000|
+ case 0x18: // cjump |000|11000|
return FALSE;
- case 0x19: // rframe |000|11001|
+ case 0x19: // rframe |000|11001|
return FALSE;
default:
@@ -3127,7 +3127,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
break;
}
- case 1: // compute / dreg <-> DM / dreg <-> PM |001|
+ case 1: // compute / dreg <-> DM / dreg <-> PM |001|
{
int pm_dreg = (opcode >> 23) & 0xf;
int pmm = (opcode >> 27) & 0x7;
@@ -3202,7 +3202,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 2: // compute / ureg <-> DM|PM, register modify |010|
+ case 2: // compute / ureg <-> DM|PM, register modify |010|
{
int u = (opcode >> 44) & 0x1;
int i = (opcode >> 41) & 0x7;
@@ -3245,18 +3245,18 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
generate_compute(block, compiler, desc);
// transfer
- UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
- if (u == 0) // pre-modify without update
- UML_ADD(block, I1, I1, (g) ? PM_M(m) : DM_M(m)); // add i1,i1,dm|pm[m]
+ UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
+ if (u == 0) // pre-modify without update
+ UML_ADD(block, I1, I1, (g) ? PM_M(m) : DM_M(m)); // add i1,i1,dm|pm[m]
if (temp_ureg)
- UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp]
+ UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp]
else
generate_read_ureg(block, compiler, desc, ureg, ureg_is_astat);
- if (ureg == 0xdb && (g)) // PX is 48-bit when writing to PM
- UML_CALLH(block, *m_pm_write48); // callh pm_write48
+ if (ureg == 0xdb && (g)) // PX is 48-bit when writing to PM
+ UML_CALLH(block, *m_pm_write48); // callh pm_write48
else
- UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32
+ UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32
}
else
{
@@ -3266,23 +3266,23 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
generate_compute(block, compiler, desc);
// transfer
- UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
- if (u == 0) // pre-modify without update
- UML_ADD(block, I1, I1, (g) ? PM_M(m) : DM_M(m)); // add i1,i1,dm|pm[m]
+ UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
+ if (u == 0) // pre-modify without update
+ UML_ADD(block, I1, I1, (g) ? PM_M(m) : DM_M(m)); // add i1,i1,dm|pm[m]
- if (ureg == 0xdb && (g)) // PX is 48-bit when reading from PM
- UML_CALLH(block, *m_pm_read48); // callh pm_read48
+ if (ureg == 0xdb && (g)) // PX is 48-bit when reading from PM
+ UML_CALLH(block, *m_pm_read48); // callh pm_read48
else
- UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32
+ UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32
generate_write_ureg(block, compiler, desc, ureg, false, 0);
}
- if (u != 0) // post-modify with update
+ if (u != 0) // post-modify with update
{
if (g)
- UML_ADD(block, PM_I(i), PM_I(i), PM_M(m)); // add pm[i],pm[m]
+ UML_ADD(block, PM_I(i), PM_I(i), PM_M(m)); // add pm[i],pm[m]
else
- UML_ADD(block, DM_I(i), DM_I(i), DM_M(m)); // add dm[i],dm[m]
+ UML_ADD(block, DM_I(i), DM_I(i), DM_M(m)); // add dm[i],dm[m]
generate_update_circular_buffer(block, compiler, desc, g, i);
}
@@ -3295,7 +3295,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
case 3:
{
- if (opcode & U64(0x100000000000)) // compute / ureg <-> ureg |011|1|
+ if (opcode & U64(0x100000000000)) // compute / ureg <-> ureg |011|1|
{
int src_ureg = (opcode >> 36) & 0xff;
int dst_ureg = (opcode >> 23) & 0xff;
@@ -3343,7 +3343,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- else // compute / dreg <-> DM|PM, immediate modify |011|0|
+ else // compute / dreg <-> DM|PM, immediate modify |011|0|
{
int cond = (opcode >> 33) & 0x1f;
int u = (opcode >> 38) & 0x1;
@@ -3362,7 +3362,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
skip_label = compiler->labelnum++;
generate_if_condition(block, compiler, desc, cond, skip_label);
}
- if (d)
+ if (d)
{
// DREG -> DM|PM
bool temp_dreg = false;
@@ -3377,14 +3377,14 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
generate_compute(block, compiler, desc);
// transfer
- UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
- if (u == 0) // pre-modify without update
- UML_ADD(block, I1, I1, mod); // add i1,i1,mod
+ UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
+ if (u == 0) // pre-modify without update
+ UML_ADD(block, I1, I1, mod); // add i1,i1,mod
if (temp_dreg)
- UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp]
+ UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp]
else
- UML_MOV(block, I0, REG(dreg)); // mov i0,reg[dreg]
- UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32
+ UML_MOV(block, I0, REG(dreg)); // mov i0,reg[dreg]
+ UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32
}
else
{
@@ -3394,19 +3394,19 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
generate_compute(block, compiler, desc);
// transfer
- UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
- if (u == 0) // pre-modify without update
- UML_ADD(block, I1, I1, mod); // add i1,i1,mod
- UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32
- UML_MOV(block, REG(dreg), I0); // mov reg[dreg],i0
+ UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
+ if (u == 0) // pre-modify without update
+ UML_ADD(block, I1, I1, mod); // add i1,i1,mod
+ UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32
+ UML_MOV(block, REG(dreg), I0); // mov reg[dreg],i0
}
- if (u != 0) // post-modify with update
+ if (u != 0) // post-modify with update
{
if (g)
- UML_ADD(block, PM_I(i), PM_I(i), mod); // add pm[i],mod
+ UML_ADD(block, PM_I(i), PM_I(i), mod); // add pm[i],mod
else
- UML_ADD(block, DM_I(i), DM_I(i), mod); // add dm[i],mod
+ UML_ADD(block, DM_I(i), DM_I(i), mod); // add dm[i],mod
generate_update_circular_buffer(block, compiler, desc, g, i);
}
@@ -3420,7 +3420,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
case 4:
{
- if (opcode & U64(0x100000000000)) // immediate data -> DM|PM |100|1|
+ if (opcode & U64(0x100000000000)) // immediate data -> DM|PM |100|1|
{
int i = (opcode >> 41) & 0x7;
int m = (opcode >> 38) & 0x7;
@@ -3441,14 +3441,14 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
UML_MOV(block, I0, data);
UML_MOV(block, I1, DM_I(i));
UML_CALLH(block, *m_dm_write32);
- UML_ADD(block, DM_I(i), DM_I(i), DM_M(m));
+ UML_ADD(block, DM_I(i), DM_I(i), DM_M(m));
}
generate_update_circular_buffer(block, compiler, desc, g, i);
return TRUE;
}
- else // immediate shift / dreg <-> DM|PM |100|0|
+ else // immediate shift / dreg <-> DM|PM |100|0|
{
int i = (opcode >> 41) & 0x7;
int m = (opcode >> 38) & 0x7;
@@ -3484,12 +3484,12 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
generate_shift_imm(block, compiler, desc, data, shiftop, rn, rx);
// transfer
- UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
+ UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
if (temp_dreg)
- UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp]
+ UML_MOV(block, I0, mem(&m_core->dreg_temp)); // mov i0,[m_core->dreg_temp]
else
- UML_MOV(block, I0, REG(dreg)); // mov i0,reg[dreg]
- UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32
+ UML_MOV(block, I0, REG(dreg)); // mov i0,reg[dreg]
+ UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32
}
else
{
@@ -3499,9 +3499,9 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
generate_shift_imm(block, compiler, desc, data, shiftop, rn, rx);
// transfer
- UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
- UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32
- UML_MOV(block, REG(dreg), I0); // mov reg[dreg],i0
+ UML_MOV(block, I1, (g) ? PM_I(i) : DM_I(i)); // mov i1,dm|pm[i]
+ UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32
+ UML_MOV(block, REG(dreg), I0); // mov reg[dreg],i0
}
// update I
@@ -3520,42 +3520,42 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
break;
}
- case 5: // ureg <-> DM|PM (indirect) |101|
+ case 5: // ureg <-> DM|PM (indirect) |101|
{
int g = (opcode >> 44) & 1;
int d = (opcode >> 40) & 1;
int i = (opcode >> 41) & 0x7;
int ureg = (opcode >> 32) & 0xff;
UINT32 offset = (UINT32)opcode;
-
+
if (d)
{
// UREG -> DM|PM
- UML_ADD(block, I1, (g) ? PM_I(i) : DM_I(i), offset); // add i1,dm|pm[i],offset
+ UML_ADD(block, I1, (g) ? PM_I(i) : DM_I(i), offset); // add i1,dm|pm[i],offset
generate_read_ureg(block, compiler, desc, ureg, false);
- if (ureg == 0xdb && (g)) // PX is 48-bit when writing to PM
- UML_CALLH(block, *m_pm_write48); // callh pm_write48
+ if (ureg == 0xdb && (g)) // PX is 48-bit when writing to PM
+ UML_CALLH(block, *m_pm_write48); // callh pm_write48
else
- UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32
+ UML_CALLH(block, (g) ? *m_pm_write32 : *m_dm_write32); // callh dm|pm_write32
}
else
{
// DM|PM -> UREG
- UML_ADD(block, I1, (g) ? PM_I(i) : DM_I(i), offset); // add i1,dm|pm[i],offset
+ UML_ADD(block, I1, (g) ? PM_I(i) : DM_I(i), offset); // add i1,dm|pm[i],offset
- if (ureg == 0xdb && (g)) // PX is 48-bit when reading from PM
- UML_CALLH(block, *m_pm_read48); // callh pm_read48
+ if (ureg == 0xdb && (g)) // PX is 48-bit when reading from PM
+ UML_CALLH(block, *m_pm_read48); // callh pm_read48
else
- UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32
+ UML_CALLH(block, (g) ? *m_pm_read32 : *m_dm_read32); // callh dm|pm_read32
generate_write_ureg(block, compiler, desc, ureg, false, 0);
}
return TRUE;
}
- case 6: // indirect jump / compute / dreg <-> DM |110|
+ case 6: // indirect jump / compute / dreg <-> DM |110|
{
int d = (opcode >> 44) & 0x1;
int dmi = (opcode >> 41) & 0x7;
@@ -3616,7 +3616,7 @@ int adsp21062_device::generate_opcode(drcuml_block *block, compiler_state *compi
return TRUE;
}
- case 7: // indirect jump / compute / dreg <-> DM |111|
+ case 7: // indirect jump / compute / dreg <-> DM |111|
{
int d = (opcode >> 44) & 0x1;
int dmi = (opcode >> 41) & 0x7;
@@ -3698,7 +3698,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
int ry = (opcode >> 0) & 0xf;
int ps = (opcode >> 16) & 0xf;
- if (opcode & 0x400000) // multi-function operation
+ if (opcode & 0x400000) // multi-function operation
{
UINT32 multiop = (opcode >> 16) & 0x3f;
int fm = rs;
@@ -3710,65 +3710,65 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
switch (multiop)
{
- case 0x00: // Rn = MRxx
- {
+ case 0x00: // Rn = MRxx
+ {
generate_unimplemented_compute(block, compiler, desc);
return;
}
- case 0x01: // MRxx = Rn
+ case 0x01: // MRxx = Rn
{
int ai = rs;
switch (ai)
{
- case 0x00: // MR0F
+ case 0x00: // MR0F
UML_DAND(block, MRF, MRF, U64(0xffffffff00000000));
UML_AND(block, I0, REG(rn), 0xffffffff);
UML_DOR(block, MRF, MRF, I0);
break;
- case 0x01: // MR1F
+ case 0x01: // MR1F
UML_DAND(block, MRF, MRF, U64(0x00000000ffffffff));
UML_DSHL(block, I0, REG(rn), 32);
UML_DOR(block, MRF, MRF, I0);
- break;
- case 0x04: // MR0B
+ break;
+ case 0x04: // MR0B
UML_DAND(block, MRB, MRB, U64(0xffffffff00000000));
UML_AND(block, I0, REG(rn), 0xffffffff);
UML_DOR(block, MRB, MRB, I0);
break;
- case 0x05: // MR1B
+ case 0x05: // MR1B
UML_DAND(block, MRB, MRB, U64(0x00000000ffffffff));
UML_DSHL(block, I0, REG(rn), 32);
UML_DOR(block, MRB, MRB, I0);
break;
- case 0x02: // MR2F
- case 0x06: // MR2B
+ case 0x02: // MR2F
+ case 0x06: // MR2B
generate_unimplemented_compute(block, compiler, desc);
return;
}
return;
}
- case 0x07: // Ra = Rx + Ry, Rs = Rx - Ry
- case 0x0f: // Fa = Fx + Fy, Fs = Fx - Fy
- case 0x06: // Rm = R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
- case 0x08: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12
- case 0x09: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12
- case 0x0a: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2
- case 0x0c: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
- case 0x0d: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
- case 0x0e: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
- case 0x10: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12
- case 0x11: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12
- case 0x12: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2
- case 0x14: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
- case 0x15: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
- case 0x16: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
+ case 0x07: // Ra = Rx + Ry, Rs = Rx - Ry
+ case 0x0f: // Fa = Fx + Fy, Fs = Fx - Fy
+ case 0x06: // Rm = R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
+ case 0x08: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12
+ case 0x09: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12
+ case 0x0a: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2
+ case 0x0c: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
+ case 0x0d: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
+ case 0x0e: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
+ case 0x10: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12
+ case 0x11: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12
+ case 0x12: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2
+ case 0x14: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
+ case 0x15: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
+ case 0x16: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
generate_unimplemented_compute(block, compiler, desc);
return;
- case 0x1c: // Fm = F3-0 * F7-4, Fa = (F11-8 + F15-12) / 2
+ case 0x1c: // Fm = F3-0 * F7-4, Fa = (F11-8 + F15-12) / 2
generate_unimplemented_compute(block, compiler, desc);
return;
@@ -3802,10 +3802,10 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AZ_CALC_REQUIRED) UML_OR(block, ASTAT_AZ, ASTAT_AZ, I0);
if (AN_CALC_REQUIRED) UML_OR(block, ASTAT_AN, ASTAT_AN, I1);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
if (MN_CALC_REQUIRED)
UML_FSCMP(block, F0, mem(&m_core->fp0));
@@ -3817,7 +3817,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_ICOPYFS(block, REG(ps), F5);
return;
- case 0x04: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
+ case 0x04: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
UML_DSEXT(block, I0, REG(fxm), SIZE_DWORD);
UML_DSEXT(block, I1, REG(fym), SIZE_DWORD);
UML_DMULS(block, I0, I0, I0, I1);
@@ -3837,7 +3837,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_MOV(block, REG(fa), I2);
return;
- case 0x05: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
+ case 0x05: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
UML_DSEXT(block, I0, REG(fxm), SIZE_DWORD);
UML_DSEXT(block, I1, REG(fym), SIZE_DWORD);
UML_DMULS(block, I0, I0, I0, I1);
@@ -3857,7 +3857,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_MOV(block, REG(fa), I2);
return;
- case 0x18: // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12
+ case 0x18: // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12
// TODO: denormals
UML_FSCOPYI(block, F0, REG(fxm));
UML_FSCOPYI(block, F1, REG(fym));
@@ -3870,11 +3870,11 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCMP(block, F2, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
-
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+
if (MN_CALC_REQUIRED)
UML_FSCMP(block, F0, mem(&m_core->fp0));
if (MN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_MN);
@@ -3884,7 +3884,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_ICOPYFS(block, REG(fa), F2);
return;
- case 0x19: // Fm = F3-0 * F7-4, Fa = F11-8 - F15-12
+ case 0x19: // Fm = F3-0 * F7-4, Fa = F11-8 - F15-12
// TODO: denormals
UML_FSCOPYI(block, F0, REG(fxm));
UML_FSCOPYI(block, F1, REG(fym));
@@ -3897,10 +3897,10 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCMP(block, F2, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
if (MN_CALC_REQUIRED)
UML_FSCMP(block, F0, mem(&m_core->fp0));
@@ -3911,7 +3911,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_ICOPYFS(block, REG(fa), F2);
return;
- case 0x1a: // Fm = F3-0 * F7-4, Fa = FLOAT F11-8 BY R15-12
+ case 0x1a: // Fm = F3-0 * F7-4, Fa = FLOAT F11-8 BY R15-12
{
code_label denormal = compiler->labelnum++;
code_label end = compiler->labelnum++;
@@ -3937,7 +3937,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_OR(block, I0, I0, I1);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
@@ -3947,7 +3947,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_AND(block, I0, I1, 0x80000000);
if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 1);
if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
@@ -3964,7 +3964,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0x1b: // Fm = F3-0 * F7-4, Fa = FIX F11-8 BY R15-12
+ case 0x1b: // Fm = F3-0 * F7-4, Fa = FIX F11-8 BY R15-12
{
code_label denormal = compiler->labelnum++;
code_label end = compiler->labelnum++;
@@ -3989,7 +3989,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_OR(block, I0, I0, I1);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
@@ -3999,7 +3999,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_AND(block, I0, I1, 0x80000000);
if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 1);
if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
@@ -4025,18 +4025,18 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0x1d: // Fm = F3-0 * F7-4, Fa = ABS F11-8
+ case 0x1d: // Fm = F3-0 * F7-4, Fa = ABS F11-8
UML_FSCOPYI(block, F0, REG(fxm));
UML_FSCOPYI(block, F1, REG(fym));
UML_AND(block, I0, REG(fxa), 0x7fffffff);
UML_FSMUL(block, F0, F0, F1);
- if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 0); // TODO
+ if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 0); // TODO
if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0);
if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0);
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
- if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); // TODO
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
if (MN_CALC_REQUIRED)
UML_FSCMP(block, F0, mem(&m_core->fp0));
@@ -4047,7 +4047,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_MOV(block, REG(fa), I0);
return;
- case 0x1e: // Fm = F3-0 * F7-4, Fa = MAX(F11-8, F15-12)
+ case 0x1e: // Fm = F3-0 * F7-4, Fa = MAX(F11-8, F15-12)
// TODO: denormals
UML_FSCOPYI(block, F0, REG(fxm));
UML_FSCOPYI(block, F1, REG(fym));
@@ -4063,10 +4063,10 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCMP(block, F4, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
if (MN_CALC_REQUIRED)
UML_FSCMP(block, F0, mem(&m_core->fp0));
@@ -4077,7 +4077,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_ICOPYFS(block, REG(fa), F4);
return;
- case 0x1f: // Fm = F3-0 * F7-4, Fa = MIN(F11-8, F15-12)
+ case 0x1f: // Fm = F3-0 * F7-4, Fa = MIN(F11-8, F15-12)
// TODO: denormals
UML_FSCOPYI(block, F0, REG(fxm));
UML_FSCOPYI(block, F1, REG(fym));
@@ -4093,10 +4093,10 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCMP(block, F4, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
if (MN_CALC_REQUIRED)
UML_FSCMP(block, F0, mem(&m_core->fp0));
@@ -4112,35 +4112,35 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
}
- else // single-function operation
+ else // single-function operation
{
UINT32 operation = (opcode >> 12) & 0xff;
switch ((opcode >> 20) & 3)
{
- case 0: // ALU operations
+ case 0: // ALU operations
{
switch (operation)
{
- case 0x09: // Rn = (Rx + Ry) / 2
- case 0x63: // Rn = CLIP Rx BY Ry
- case 0x92: // Fn = ABS(Fx - Fy)
- case 0x89: // Fn = (Fx + Fy) / 2
- case 0xdd: // Rn = TRUNC Fx BY Ry
- case 0xe0: // Fn = Fx COPYSIGN Fy
- case 0x05: // Rn = Rx + Ry + CI
- case 0x06: // Rn = Rx - Ry + CI - 1
- case 0x25: // Rn = Rx + CI
- case 0x26: // Rn = Rx + CI - 1
- case 0x30: // Rn = ABS Rx
- case 0x43: // Rn = NOT Rx
- case 0xa5: // Fn = RND Fx
- case 0xad: // Rn = MANT Fx
- case 0xcd: // Rn = TRUNC Fx
+ case 0x09: // Rn = (Rx + Ry) / 2
+ case 0x63: // Rn = CLIP Rx BY Ry
+ case 0x92: // Fn = ABS(Fx - Fy)
+ case 0x89: // Fn = (Fx + Fy) / 2
+ case 0xdd: // Rn = TRUNC Fx BY Ry
+ case 0xe0: // Fn = Fx COPYSIGN Fy
+ case 0x05: // Rn = Rx + Ry + CI
+ case 0x06: // Rn = Rx - Ry + CI - 1
+ case 0x25: // Rn = Rx + CI
+ case 0x26: // Rn = Rx + CI - 1
+ case 0x30: // Rn = ABS Rx
+ case 0x43: // Rn = NOT Rx
+ case 0xa5: // Fn = RND Fx
+ case 0xad: // Rn = MANT Fx
+ case 0xcd: // Rn = TRUNC Fx
generate_unimplemented_compute(block, compiler, desc);
return;
- case 0x01: // Rn = Rx + Ry
+ case 0x01: // Rn = Rx + Ry
UML_ADD(block, REG(rn), REG(rx), REG(ry));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
@@ -4150,7 +4150,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x02: // Rn = Rx - Ry
+ case 0x02: // Rn = Rx - Ry
UML_SUB(block, REG(rn), REG(rx), REG(ry));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
@@ -4160,7 +4160,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x0a: // COMP(Rx, Ry)
+ case 0x0a: // COMP(Rx, Ry)
UML_CMP(block, REG(rx), REG(ry));
UML_SETc(block, COND_Z, I0);
UML_SETc(block, COND_L, I1);
@@ -4182,7 +4182,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x21: // Rn = PASS Rx
+ case 0x21: // Rn = PASS Rx
UML_MOV(block, REG(rn), REG(rx));
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
UML_CMP(block, REG(rn), 0);
@@ -4194,7 +4194,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x22: // Rn = -Rx
+ case 0x22: // Rn = -Rx
UML_SUB(block, REG(rn), 0, REG(rx));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
@@ -4204,7 +4204,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x29: // Rn = Rx + 1
+ case 0x29: // Rn = Rx + 1
UML_ADD(block, REG(rn), REG(rx), 1);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
@@ -4214,7 +4214,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x2a: // Rn = Rx - 1
+ case 0x2a: // Rn = Rx - 1
UML_SUB(block, REG(rn), REG(rx), 1);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
@@ -4224,7 +4224,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x40: // Rn = Rx AND Ry
+ case 0x40: // Rn = Rx AND Ry
UML_AND(block, REG(rn), REG(rx), REG(ry));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
@@ -4234,7 +4234,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x41: // Rn = Rx OR Ry
+ case 0x41: // Rn = Rx OR Ry
UML_OR(block, REG(rn), REG(rx), REG(ry));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
@@ -4244,7 +4244,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x42: // Rn = Rx XOR Ry
+ case 0x42: // Rn = Rx XOR Ry
UML_XOR(block, REG(rn), REG(rx), REG(ry));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
@@ -4254,7 +4254,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x61: // Rn = MIN(Rx, Ry)
+ case 0x61: // Rn = MIN(Rx, Ry)
UML_MOV(block, REG(rn), REG(rx));
UML_CMP(block, REG(rx), REG(ry));
UML_MOVc(block, COND_G, REG(rn), REG(ry));
@@ -4268,7 +4268,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0x62: // Rn = MAX(Rx, Ry)
+ case 0x62: // Rn = MAX(Rx, Ry)
UML_MOV(block, REG(rn), REG(rx));
UML_CMP(block, REG(rx), REG(ry));
UML_MOVc(block, COND_L, REG(rn), REG(ry));
@@ -4286,7 +4286,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
{
/* Fixed-point Dual Add/Subtract */
- UML_ADD(block, I0, REG(rx), REG(ry));
+ UML_ADD(block, I0, REG(rx), REG(ry));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV);
@@ -4307,7 +4307,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0x81: // Fn = Fx + Fy
+ case 0x81: // Fn = Fx + Fy
// TODO: denormals
UML_FSCOPYI(block, F0, REG(rx));
UML_FSCOPYI(block, F1, REG(ry));
@@ -4316,14 +4316,14 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCMP(block, F0, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_ICOPYFS(block, REG(rn), F0);
return;
- case 0x82: // Fn = Fx - Fy
+ case 0x82: // Fn = Fx - Fy
// TODO: denormals
UML_FSCOPYI(block, F0, REG(rx));
UML_FSCOPYI(block, F1, REG(ry));
@@ -4332,14 +4332,14 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCMP(block, F0, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_ICOPYFS(block, REG(rn), F0);
return;
- case 0x8a: // COMP(Fx, Fy)
+ case 0x8a: // COMP(Fx, Fy)
UML_FSCOPYI(block, F0, REG(rx));
UML_FSCOPYI(block, F1, REG(ry));
UML_FSCMP(block, F0, F1);
@@ -4356,29 +4356,29 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_SHR(block, I2, I2, 1);
UML_OR(block, I2, I2, I0);
UML_MOV(block, mem(&m_core->astat_drc.cacc), I2);
-
+
if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0);
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
return;
- case 0x91: // Fn = ABS(Fx + Fy)
+ case 0x91: // Fn = ABS(Fx + Fy)
// TODO: denormals
UML_FSCOPYI(block, F0, REG(rx));
UML_FSCOPYI(block, F1, REG(ry));
UML_FSADD(block, F0, F0, F1);
UML_FSABS(block, F0, F0);
UML_ICOPYFS(block, REG(rn), F0);
- if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 0); // TODO
+ if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 0); // TODO
if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
return;
- case 0xa1: // Fn = PASS Fx
+ case 0xa1: // Fn = PASS Fx
UML_MOV(block, REG(rn), REG(rx));
if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED)
{
@@ -4390,10 +4390,10 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0);
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
return;
- case 0xa2: // Fn = -Fx
+ case 0xa2: // Fn = -Fx
UML_FSCOPYI(block, F0, REG(rx));
UML_FSNEG(block, F0, F0);
UML_ICOPYFS(block, REG(rn), F0);
@@ -4404,23 +4404,23 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0);
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
return;
- case 0xb0: // Fn = ABS(Fx)
+ case 0xb0: // Fn = ABS(Fx)
UML_FSCOPYI(block, F0, REG(rx));
UML_FSABS(block, F0, F0);
UML_ICOPYFS(block, REG(rn), F0);
- if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 0); // TODO
+ if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 0); // TODO
if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0);
if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0);
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
- if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); // TODO
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
return;
- case 0xbd: // Fn = SCALB Fx BY Ry
+ case 0xbd: // Fn = SCALB Fx BY Ry
// TODO: source = nan, result = denormal
UML_MOV(block, I1, REG(rx));
UML_AND(block, I0, I1, 0x7f800000);
@@ -4434,26 +4434,26 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_OR(block, REG(rn), I0, I1);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
return;
- case 0xc1: // Rn = LOGB Fx
+ case 0xc1: // Rn = LOGB Fx
// TODO: source = zero, infinity, nan
UML_SHR(block, I0, REG(rx), 23);
UML_AND(block, I0, I0, 0xff);
UML_SUB(block, REG(rn), I0, 127);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0xc4: // Fn = RECIPS Fx
+ case 0xc4: // Fn = RECIPS Fx
// TODO: denormals
// TODO: use the bit accurate method from interpreter?
UML_FSCOPYI(block, F0, REG(rx));
@@ -4470,11 +4470,11 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_ICOPYFS(block, REG(rn), F0);
return;
- case 0xc5: // Fn = RSQRTS Fx
+ case 0xc5: // Fn = RSQRTS Fx
// TODO: denormals
// TODO: use the bit accurate method from interpreter?
UML_FSCOPYI(block, F0, REG(rx));
@@ -4488,7 +4488,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
return;
- case 0xca: // Fn = FLOAT Rx
+ case 0xca: // Fn = FLOAT Rx
UML_FSFRINT(block, F0, REG(rx), SIZE_DWORD);
UML_ICOPYFS(block, REG(rn), F0);
if (AZ_CALC_REQUIRED)
@@ -4500,7 +4500,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
return;
- case 0xc9: // Rn = FIX Fx
+ case 0xc9: // Rn = FIX Fx
UML_FSCOPYI(block, F0, REG(rx));
UML_TEST(block, MODE1, MODE1_TRUNCATE);
UML_JMPc(block, COND_Z, compiler->labelnum);
@@ -4514,14 +4514,14 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_CMP(block, I0, 0);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_MOV(block, REG(rn), I0);
- return;
+ return;
- case 0xd9: // Rn = FIX Fx BY Ry
+ case 0xd9: // Rn = FIX Fx BY Ry
{
code_label denormal = compiler->labelnum++;
code_label end = compiler->labelnum++;
@@ -4553,10 +4553,10 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_CMP(block, I0, 0);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_MOV(block, REG(rn), I0);
UML_JMP(block, end);
@@ -4564,7 +4564,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_AND(block, I0, I1, 0x80000000);
if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 1);
if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
@@ -4574,7 +4574,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0xda: // Fn = FLOAT Rx BY Ry
+ case 0xda: // Fn = FLOAT Rx BY Ry
{
code_label denormal = compiler->labelnum++;
code_label end = compiler->labelnum++;
@@ -4594,27 +4594,27 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_OR(block, REG(rn), I0, I1);
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
UML_JMP(block, end);
-
+
UML_LABEL(block, denormal);
UML_AND(block, I0, I1, 0x80000000);
if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, 1);
if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, 0);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0);
UML_MOV(block, REG(rn), I0);
-
+
UML_LABEL(block, end);
return;
}
- case 0xe1: // Fn = MIN(Fx, Fy)
+ case 0xe1: // Fn = MIN(Fx, Fy)
UML_FSCOPYI(block, F2, REG(rx));
UML_FSCOPYI(block, F3, REG(ry));
UML_FSMOV(block, F4, F2);
@@ -4625,14 +4625,14 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCMP(block, F4, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_ICOPYFS(block, REG(rn), F4);
return;
- case 0xe2: // Fn = MAX(Fx, Fy)
+ case 0xe2: // Fn = MAX(Fx, Fy)
UML_FSCOPYI(block, F2, REG(rx));
UML_FSCOPYI(block, F3, REG(ry));
UML_FSMOV(block, F4, F2);
@@ -4643,14 +4643,14 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
UML_FSCMP(block, F4, mem(&m_core->fp0));
if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ);
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AN);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_ICOPYFS(block, REG(rn), F4);
return;
- case 0xe3: // Fn = CLIP Fx BY Fy
+ case 0xe3: // Fn = CLIP Fx BY Fy
{
code_label label_1 = compiler->labelnum++;
code_label label_2 = compiler->labelnum++;
@@ -4675,7 +4675,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0);
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_ICOPYFS(block, REG(rn), F0);
return;
}
@@ -4698,10 +4698,10 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (AN_CALC_REQUIRED) UML_SETc(block, COND_C, I1);
if (AZ_CALC_REQUIRED) UML_OR(block, ASTAT_AZ, ASTAT_AZ, I0);
if (AN_CALC_REQUIRED) UML_OR(block, ASTAT_AN, ASTAT_AN, I1);
- if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
+ if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); // TODO
if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0);
if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0);
- if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
+ if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); // TODO
UML_ICOPYFS(block, REG(ra), F2);
UML_ICOPYFS(block, REG(rs), F3);
return;
@@ -4714,166 +4714,166 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
break;
}
- case 1: // multiplier operations
+ case 1: // multiplier operations
{
switch (operation)
{
- case 0x48: // Rn = Rx * Ry (UUF)
- case 0x49: // Rn = Rx * Ry (UUFR)
- case 0x50: // Rn = Rx * Ry (SUI)
- case 0x58: // Rn = Rx * Ry (SUF)
- case 0x59: // Rn = Rx * Ry (SUFR)
- case 0x60: // Rn = Rx * Ry (USI)
- case 0x68: // Rn = Rx * Ry (USF)
- case 0x69: // Rn = Rx * Ry (USFR)
- case 0x78: // Rn = Rx * Ry (SSF)
- case 0x79: // Rn = Rx * Ry (SSFR)
- case 0x44: // MRF = Rx * Ry (UUI)
- case 0x4c: // MRF = Rx * Ry (UUF)
- case 0x4d: // MRF = Rx * Ry (UUFR)
- case 0x54: // MRF = Rx * Ry (SUI)
- case 0x5c: // MRF = Rx * Ry (SUF)
- case 0x5d: // MRF = Rx * Ry (SUFR)
- case 0x64: // MRF = Rx * Ry (USI)
- case 0x6c: // MRF = Rx * Ry (USF)
- case 0x6d: // MRF = Rx * Ry (USFR)
- case 0x74: // MRF = Rx * Ry (SSI)
- case 0x7c: // MRF = Rx * Ry (SSF)
- case 0x7d: // MRF = Rx * Ry (SSFR)
- case 0x46: // MRB = Rx * Ry (UUI)
- case 0x4e: // MRB = Rx * Ry (UUF)
- case 0x4f: // MRB = Rx * Ry (UUFR)
- case 0x56: // MRB = Rx * Ry (SUI)
- case 0x5e: // MRB = Rx * Ry (SUF)
- case 0x5f: // MRB = Rx * Ry (SUFR)
- case 0x66: // MRB = Rx * Ry (USI)
- case 0x6e: // MRB = Rx * Ry (USF)
- case 0x6f: // MRB = Rx * Ry (USFR)
- case 0x76: // MRB = Rx * Ry (SSI)
- case 0x7e: // MRB = Rx * Ry (SSF)
- case 0x7f: // MRB = Rx * Ry (SSFR)
- case 0x80: // Rn = MRF + Rx * Ry (UUI)
- case 0x88: // Rn = MRF + Rx * Ry (UUF)
- case 0x89: // Rn = MRF + Rx * Ry (UUFR)
- case 0x90: // Rn = MRF + Rx * Ry (SUI)
- case 0x98: // Rn = MRF + Rx * Ry (SUF)
- case 0x99: // Rn = MRF + Rx * Ry (SUFR)
- case 0xa0: // Rn = MRF + Rx * Ry (USI)
- case 0xa8: // Rn = MRF + Rx * Ry (USF)
- case 0xa9: // Rn = MRF + Rx * Ry (USFR)
- case 0xb8: // Rn = MRF + Rx * Ry (SSF)
- case 0xb9: // Rn = MRF + Rx * Ry (SSFR)
- case 0x82: // Rn = MRB + Rx * Ry (UUI)
- case 0x8a: // Rn = MRB + Rx * Ry (UUF)
- case 0x8b: // Rn = MRB + Rx * Ry (UUFR)
- case 0x92: // Rn = MRB + Rx * Ry (SUI)
- case 0x9a: // Rn = MRB + Rx * Ry (SUF)
- case 0x9b: // Rn = MRB + Rx * Ry (SUFR)
- case 0xa2: // Rn = MRB + Rx * Ry (USI)
- case 0xaa: // Rn = MRB + Rx * Ry (USF)
- case 0xab: // Rn = MRB + Rx * Ry (USFR)
- case 0xba: // Rn = MRB + Rx * Ry (SSF)
- case 0xbb: // Rn = MRB + Rx * Ry (SSFR)
- case 0x84: // MRF = MRF + Rx * Ry (UUI)
- case 0x8c: // MRF = MRF + Rx * Ry (UUF)
- case 0x8d: // MRF = MRF + Rx * Ry (UUFR)
- case 0x94: // MRF = MRF + Rx * Ry (SUI)
- case 0x9c: // MRF = MRF + Rx * Ry (SUF)
- case 0x9d: // MRF = MRF + Rx * Ry (SUFR)
- case 0xa4: // MRF = MRF + Rx * Ry (USI)
- case 0xac: // MRF = MRF + Rx * Ry (USF)
- case 0xad: // MRF = MRF + Rx * Ry (USFR)
- case 0xb4: // MRF = MRF + Rx * Ry (SSI)
- case 0xbc: // MRF = MRF + Rx * Ry (SSF)
- case 0xbd: // MRF = MRF + Rx * Ry (SSFR)
- case 0x86: // MRB = MRB + Rx * Ry (UUI)
- case 0x8e: // MRB = MRB + Rx * Ry (UUF)
- case 0x8f: // MRB = MRB + Rx * Ry (UUFR)
- case 0x96: // MRB = MRB + Rx * Ry (SUI)
- case 0x9e: // MRB = MRB + Rx * Ry (SUF)
- case 0x9f: // MRB = MRB + Rx * Ry (SUFR)
- case 0xa6: // MRB = MRB + Rx * Ry (USI)
- case 0xae: // MRB = MRB + Rx * Ry (USF)
- case 0xaf: // MRB = MRB + Rx * Ry (USFR)
- case 0xb6: // MRB = MRB + Rx * Ry (SSI)
- case 0xbe: // MRB = MRB + Rx * Ry (SSF)
- case 0xbf: // MRB = MRB + Rx * Ry (SSFR)
- case 0xc0: // Rn = MRF - Rx * Ry (UUI)
- case 0xc8: // Rn = MRF - Rx * Ry (UUF)
- case 0xc9: // Rn = MRF - Rx * Ry (UUFR)
- case 0xd0: // Rn = MRF - Rx * Ry (SUI)
- case 0xd8: // Rn = MRF - Rx * Ry (SUF)
- case 0xd9: // Rn = MRF - Rx * Ry (SUFR)
- case 0xe0: // Rn = MRF - Rx * Ry (USI)
- case 0xe8: // Rn = MRF - Rx * Ry (USF)
- case 0xe9: // Rn = MRF - Rx * Ry (USFR)
- case 0xf0: // Rn = MRF - Rx * Ry (SSI)
- case 0xf8: // Rn = MRF - Rx * Ry (SSF)
- case 0xf9: // Rn = MRF - Rx * Ry (SSFR)
- case 0xc2: // Rn = MRB - Rx * Ry (UUI)
- case 0xca: // Rn = MRB - Rx * Ry (UUF)
- case 0xcb: // Rn = MRB - Rx * Ry (UUFR)
- case 0xd2: // Rn = MRB - Rx * Ry (SUI)
- case 0xda: // Rn = MRB - Rx * Ry (SUF)
- case 0xdb: // Rn = MRB - Rx * Ry (SUFR)
- case 0xe2: // Rn = MRB - Rx * Ry (USI)
- case 0xea: // Rn = MRB - Rx * Ry (USF)
- case 0xeb: // Rn = MRB - Rx * Ry (USFR)
- case 0xf2: // Rn = MRB - Rx * Ry (SSI)
- case 0xfa: // Rn = MRB - Rx * Ry (SSF)
- case 0xfb: // Rn = MRB - Rx * Ry (SSFR)
- case 0xc4: // MRF = MRF - Rx * Ry (UUI)
- case 0xcc: // MRF = MRF - Rx * Ry (UUF)
- case 0xcd: // MRF = MRF - Rx * Ry (UUFR)
- case 0xd4: // MRF = MRF - Rx * Ry (SUI)
- case 0xdc: // MRF = MRF - Rx * Ry (SUF)
- case 0xdd: // MRF = MRF - Rx * Ry (SUFR)
- case 0xe4: // MRF = MRF - Rx * Ry (USI)
- case 0xec: // MRF = MRF - Rx * Ry (USF)
- case 0xed: // MRF = MRF - Rx * Ry (USFR)
- case 0xf4: // MRF = MRF - Rx * Ry (SSI)
- case 0xfc: // MRF = MRF - Rx * Ry (SSF)
- case 0xfd: // MRF = MRF - Rx * Ry (SSFR)
- case 0xc6: // MRB = MRB - Rx * Ry (UUI)
- case 0xce: // MRB = MRB - Rx * Ry (UUF)
- case 0xcf: // MRB = MRB - Rx * Ry (UUFR)
- case 0xd6: // MRB = MRB - Rx * Ry (SUI)
- case 0xde: // MRB = MRB - Rx * Ry (SUF)
- case 0xdf: // MRB = MRB - Rx * Ry (SUFR)
- case 0xe6: // MRB = MRB - Rx * Ry (USI)
- case 0xee: // MRB = MRB - Rx * Ry (USF)
- case 0xef: // MRB = MRB - Rx * Ry (USFR)
- case 0xf6: // MRB = MRB - Rx * Ry (SSI)
- case 0xfe: // MRB = MRB - Rx * Ry (SSF)
- case 0xff: // MRB = MRB - Rx * Ry (SSFR)
- case 0x00: // Rn = SAT MRF (UI)
- case 0x01: // Rn = SAT MRF (SI)
- case 0x08: // Rn = SAT MRF (UF)
- case 0x09: // Rn = SAT MRF (SF)
- case 0x02: // Rn = SAT MRB (UI)
- case 0x03: // Rn = SAT MRB (SI)
- case 0x0a: // Rn = SAT MRB (UF)
- case 0x0b: // Rn = SAT MRB (SF)
- case 0x04: // MRF = SAT MRF (UI)
- case 0x05: // MRF = SAT MRF (SI)
- case 0x0c: // MRF = SAT MRF (UF)
- case 0x0d: // MRF = SAT MRF (SF)
- case 0x06: // MRB = SAT MRB (UI)
- case 0x07: // MRB = SAT MRB (SI)
- case 0x0e: // MRB = SAT MRB (UF)
- case 0x0f: // MRB = SAT MRB (SF)
- case 0x18: // Rn = RND MRF (U)
- case 0x19: // Rn = RND MRF (S)
- case 0x1a: // Rn = RND MRB (U)
- case 0x1b: // Rn = RND MRB (S)
- case 0x1c: // MRF = RND MRF (U)
- case 0x1d: // MRF = RND MRF (S)
- case 0x1e: // MRB = RND MRB (U)
- case 0x1f: // MRB = RND MRB (S)
+ case 0x48: // Rn = Rx * Ry (UUF)
+ case 0x49: // Rn = Rx * Ry (UUFR)
+ case 0x50: // Rn = Rx * Ry (SUI)
+ case 0x58: // Rn = Rx * Ry (SUF)
+ case 0x59: // Rn = Rx * Ry (SUFR)
+ case 0x60: // Rn = Rx * Ry (USI)
+ case 0x68: // Rn = Rx * Ry (USF)
+ case 0x69: // Rn = Rx * Ry (USFR)
+ case 0x78: // Rn = Rx * Ry (SSF)
+ case 0x79: // Rn = Rx * Ry (SSFR)
+ case 0x44: // MRF = Rx * Ry (UUI)
+ case 0x4c: // MRF = Rx * Ry (UUF)
+ case 0x4d: // MRF = Rx * Ry (UUFR)
+ case 0x54: // MRF = Rx * Ry (SUI)
+ case 0x5c: // MRF = Rx * Ry (SUF)
+ case 0x5d: // MRF = Rx * Ry (SUFR)
+ case 0x64: // MRF = Rx * Ry (USI)
+ case 0x6c: // MRF = Rx * Ry (USF)
+ case 0x6d: // MRF = Rx * Ry (USFR)
+ case 0x74: // MRF = Rx * Ry (SSI)
+ case 0x7c: // MRF = Rx * Ry (SSF)
+ case 0x7d: // MRF = Rx * Ry (SSFR)
+ case 0x46: // MRB = Rx * Ry (UUI)
+ case 0x4e: // MRB = Rx * Ry (UUF)
+ case 0x4f: // MRB = Rx * Ry (UUFR)
+ case 0x56: // MRB = Rx * Ry (SUI)
+ case 0x5e: // MRB = Rx * Ry (SUF)
+ case 0x5f: // MRB = Rx * Ry (SUFR)
+ case 0x66: // MRB = Rx * Ry (USI)
+ case 0x6e: // MRB = Rx * Ry (USF)
+ case 0x6f: // MRB = Rx * Ry (USFR)
+ case 0x76: // MRB = Rx * Ry (SSI)
+ case 0x7e: // MRB = Rx * Ry (SSF)
+ case 0x7f: // MRB = Rx * Ry (SSFR)
+ case 0x80: // Rn = MRF + Rx * Ry (UUI)
+ case 0x88: // Rn = MRF + Rx * Ry (UUF)
+ case 0x89: // Rn = MRF + Rx * Ry (UUFR)
+ case 0x90: // Rn = MRF + Rx * Ry (SUI)
+ case 0x98: // Rn = MRF + Rx * Ry (SUF)
+ case 0x99: // Rn = MRF + Rx * Ry (SUFR)
+ case 0xa0: // Rn = MRF + Rx * Ry (USI)
+ case 0xa8: // Rn = MRF + Rx * Ry (USF)
+ case 0xa9: // Rn = MRF + Rx * Ry (USFR)
+ case 0xb8: // Rn = MRF + Rx * Ry (SSF)
+ case 0xb9: // Rn = MRF + Rx * Ry (SSFR)
+ case 0x82: // Rn = MRB + Rx * Ry (UUI)
+ case 0x8a: // Rn = MRB + Rx * Ry (UUF)
+ case 0x8b: // Rn = MRB + Rx * Ry (UUFR)
+ case 0x92: // Rn = MRB + Rx * Ry (SUI)
+ case 0x9a: // Rn = MRB + Rx * Ry (SUF)
+ case 0x9b: // Rn = MRB + Rx * Ry (SUFR)
+ case 0xa2: // Rn = MRB + Rx * Ry (USI)
+ case 0xaa: // Rn = MRB + Rx * Ry (USF)
+ case 0xab: // Rn = MRB + Rx * Ry (USFR)
+ case 0xba: // Rn = MRB + Rx * Ry (SSF)
+ case 0xbb: // Rn = MRB + Rx * Ry (SSFR)
+ case 0x84: // MRF = MRF + Rx * Ry (UUI)
+ case 0x8c: // MRF = MRF + Rx * Ry (UUF)
+ case 0x8d: // MRF = MRF + Rx * Ry (UUFR)
+ case 0x94: // MRF = MRF + Rx * Ry (SUI)
+ case 0x9c: // MRF = MRF + Rx * Ry (SUF)
+ case 0x9d: // MRF = MRF + Rx * Ry (SUFR)
+ case 0xa4: // MRF = MRF + Rx * Ry (USI)
+ case 0xac: // MRF = MRF + Rx * Ry (USF)
+ case 0xad: // MRF = MRF + Rx * Ry (USFR)
+ case 0xb4: // MRF = MRF + Rx * Ry (SSI)
+ case 0xbc: // MRF = MRF + Rx * Ry (SSF)
+ case 0xbd: // MRF = MRF + Rx * Ry (SSFR)
+ case 0x86: // MRB = MRB + Rx * Ry (UUI)
+ case 0x8e: // MRB = MRB + Rx * Ry (UUF)
+ case 0x8f: // MRB = MRB + Rx * Ry (UUFR)
+ case 0x96: // MRB = MRB + Rx * Ry (SUI)
+ case 0x9e: // MRB = MRB + Rx * Ry (SUF)
+ case 0x9f: // MRB = MRB + Rx * Ry (SUFR)
+ case 0xa6: // MRB = MRB + Rx * Ry (USI)
+ case 0xae: // MRB = MRB + Rx * Ry (USF)
+ case 0xaf: // MRB = MRB + Rx * Ry (USFR)
+ case 0xb6: // MRB = MRB + Rx * Ry (SSI)
+ case 0xbe: // MRB = MRB + Rx * Ry (SSF)
+ case 0xbf: // MRB = MRB + Rx * Ry (SSFR)
+ case 0xc0: // Rn = MRF - Rx * Ry (UUI)
+ case 0xc8: // Rn = MRF - Rx * Ry (UUF)
+ case 0xc9: // Rn = MRF - Rx * Ry (UUFR)
+ case 0xd0: // Rn = MRF - Rx * Ry (SUI)
+ case 0xd8: // Rn = MRF - Rx * Ry (SUF)
+ case 0xd9: // Rn = MRF - Rx * Ry (SUFR)
+ case 0xe0: // Rn = MRF - Rx * Ry (USI)
+ case 0xe8: // Rn = MRF - Rx * Ry (USF)
+ case 0xe9: // Rn = MRF - Rx * Ry (USFR)
+ case 0xf0: // Rn = MRF - Rx * Ry (SSI)
+ case 0xf8: // Rn = MRF - Rx * Ry (SSF)
+ case 0xf9: // Rn = MRF - Rx * Ry (SSFR)
+ case 0xc2: // Rn = MRB - Rx * Ry (UUI)
+ case 0xca: // Rn = MRB - Rx * Ry (UUF)
+ case 0xcb: // Rn = MRB - Rx * Ry (UUFR)
+ case 0xd2: // Rn = MRB - Rx * Ry (SUI)
+ case 0xda: // Rn = MRB - Rx * Ry (SUF)
+ case 0xdb: // Rn = MRB - Rx * Ry (SUFR)
+ case 0xe2: // Rn = MRB - Rx * Ry (USI)
+ case 0xea: // Rn = MRB - Rx * Ry (USF)
+ case 0xeb: // Rn = MRB - Rx * Ry (USFR)
+ case 0xf2: // Rn = MRB - Rx * Ry (SSI)
+ case 0xfa: // Rn = MRB - Rx * Ry (SSF)
+ case 0xfb: // Rn = MRB - Rx * Ry (SSFR)
+ case 0xc4: // MRF = MRF - Rx * Ry (UUI)
+ case 0xcc: // MRF = MRF - Rx * Ry (UUF)
+ case 0xcd: // MRF = MRF - Rx * Ry (UUFR)
+ case 0xd4: // MRF = MRF - Rx * Ry (SUI)
+ case 0xdc: // MRF = MRF - Rx * Ry (SUF)
+ case 0xdd: // MRF = MRF - Rx * Ry (SUFR)
+ case 0xe4: // MRF = MRF - Rx * Ry (USI)
+ case 0xec: // MRF = MRF - Rx * Ry (USF)
+ case 0xed: // MRF = MRF - Rx * Ry (USFR)
+ case 0xf4: // MRF = MRF - Rx * Ry (SSI)
+ case 0xfc: // MRF = MRF - Rx * Ry (SSF)
+ case 0xfd: // MRF = MRF - Rx * Ry (SSFR)
+ case 0xc6: // MRB = MRB - Rx * Ry (UUI)
+ case 0xce: // MRB = MRB - Rx * Ry (UUF)
+ case 0xcf: // MRB = MRB - Rx * Ry (UUFR)
+ case 0xd6: // MRB = MRB - Rx * Ry (SUI)
+ case 0xde: // MRB = MRB - Rx * Ry (SUF)
+ case 0xdf: // MRB = MRB - Rx * Ry (SUFR)
+ case 0xe6: // MRB = MRB - Rx * Ry (USI)
+ case 0xee: // MRB = MRB - Rx * Ry (USF)
+ case 0xef: // MRB = MRB - Rx * Ry (USFR)
+ case 0xf6: // MRB = MRB - Rx * Ry (SSI)
+ case 0xfe: // MRB = MRB - Rx * Ry (SSF)
+ case 0xff: // MRB = MRB - Rx * Ry (SSFR)
+ case 0x00: // Rn = SAT MRF (UI)
+ case 0x01: // Rn = SAT MRF (SI)
+ case 0x08: // Rn = SAT MRF (UF)
+ case 0x09: // Rn = SAT MRF (SF)
+ case 0x02: // Rn = SAT MRB (UI)
+ case 0x03: // Rn = SAT MRB (SI)
+ case 0x0a: // Rn = SAT MRB (UF)
+ case 0x0b: // Rn = SAT MRB (SF)
+ case 0x04: // MRF = SAT MRF (UI)
+ case 0x05: // MRF = SAT MRF (SI)
+ case 0x0c: // MRF = SAT MRF (UF)
+ case 0x0d: // MRF = SAT MRF (SF)
+ case 0x06: // MRB = SAT MRB (UI)
+ case 0x07: // MRB = SAT MRB (SI)
+ case 0x0e: // MRB = SAT MRB (UF)
+ case 0x0f: // MRB = SAT MRB (SF)
+ case 0x18: // Rn = RND MRF (U)
+ case 0x19: // Rn = RND MRF (S)
+ case 0x1a: // Rn = RND MRB (U)
+ case 0x1b: // Rn = RND MRB (S)
+ case 0x1c: // MRF = RND MRF (U)
+ case 0x1d: // MRF = RND MRF (S)
+ case 0x1e: // MRB = RND MRB (U)
+ case 0x1f: // MRB = RND MRB (S)
generate_unimplemented_compute(block, compiler, desc);
return;
- case 0x14: // MRF = 0
+ case 0x14: // MRF = 0
UML_DMOV(block, mem(&m_core->mrf), 0);
if (MN_CALC_REQUIRED) UML_MOV(block, ASTAT_MN, 0);
if (MV_CALC_REQUIRED) UML_MOV(block, ASTAT_MV, 0);
@@ -4881,7 +4881,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (MI_CALC_REQUIRED) UML_MOV(block, ASTAT_MI, 0);
return;
- case 0x16: // MRB = 0
+ case 0x16: // MRB = 0
UML_DMOV(block, mem(&m_core->mrb), 0);
if (MN_CALC_REQUIRED) UML_MOV(block, ASTAT_MN, 0);
if (MV_CALC_REQUIRED) UML_MOV(block, ASTAT_MV, 0);
@@ -4889,7 +4889,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (MI_CALC_REQUIRED) UML_MOV(block, ASTAT_MI, 0);
return;
- case 0x30: // Fn = Fx * Fy
+ case 0x30: // Fn = Fx * Fy
UML_FSCOPYI(block, F0, REG(rx));
UML_FSCOPYI(block, F1, REG(ry));
UML_FSMUL(block, F0, F0, F1);
@@ -4900,19 +4900,19 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
// TODO: MV, MU, MI flags
return;
- case 0x40: // Rn = Rx * Ry (UUI)
+ case 0x40: // Rn = Rx * Ry (UUI)
UML_MULU(block, I0, I0, REG(rx), REG(ry));
UML_MOV(block, REG(rn), I0);
// TODO: flags
return;
- case 0x70: // Rn = Rx * Ry (SSI)
+ case 0x70: // Rn = Rx * Ry (SSI)
UML_MULS(block, I0, I0, REG(rx), REG(ry));
UML_MOV(block, REG(rn), I0);
// TODO: flags
return;
- case 0xb0: // Rn = MRF + Rx * Ry (SSI)
+ case 0xb0: // Rn = MRF + Rx * Ry (SSI)
UML_DSEXT(block, I0, REG(rx), SIZE_DWORD);
UML_DSEXT(block, I1, REG(ry), SIZE_DWORD);
UML_DMULS(block, I0, I0, I0, I1);
@@ -4921,7 +4921,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
// TODO: flags!
return;
- case 0xb2: // Rn = MRB + Rx * Ry (SSI)
+ case 0xb2: // Rn = MRB + Rx * Ry (SSI)
UML_DSEXT(block, I0, REG(rx), SIZE_DWORD);
UML_DSEXT(block, I1, REG(ry), SIZE_DWORD);
UML_DMULS(block, I0, I0, I0, I1);
@@ -4937,25 +4937,25 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
break;
}
- case 2: // shifter operations
+ case 2: // shifter operations
{
switch (operation)
{
- case 0x04: // Rn = ASHIFT Rx BY Ry | <data8>
- case 0x44: // Rn = FDEP Rx BY Ry | <bit6>:<len6>
- case 0x4c: // Rn = FDEP Rx BY Ry | <bit6>:<len6> (SE)
- case 0x24: // Rn = Rn OR ASHIFT Rx BY Ry | <data8>
- case 0x6c: // Rn = Rn OR FDEP Rx BY Ry | <bit6>:<len6> (SE)
- case 0x80: // Rn = EXP Rx
- case 0x84: // Rn = EXP Rx (EX)
- case 0x88: // Rn = LEFTZ Rx
- case 0x8c: // Rn = LEFTO Rx
- case 0x90: // Rn = FPACK Fx
- case 0x94: // Fn = FUNPACK Rx
+ case 0x04: // Rn = ASHIFT Rx BY Ry | <data8>
+ case 0x44: // Rn = FDEP Rx BY Ry | <bit6>:<len6>
+ case 0x4c: // Rn = FDEP Rx BY Ry | <bit6>:<len6> (SE)
+ case 0x24: // Rn = Rn OR ASHIFT Rx BY Ry | <data8>
+ case 0x6c: // Rn = Rn OR FDEP Rx BY Ry | <bit6>:<len6> (SE)
+ case 0x80: // Rn = EXP Rx
+ case 0x84: // Rn = EXP Rx (EX)
+ case 0x88: // Rn = LEFTZ Rx
+ case 0x8c: // Rn = LEFTO Rx
+ case 0x90: // Rn = FPACK Fx
+ case 0x94: // Fn = FUNPACK Rx
generate_unimplemented_compute(block, compiler, desc);
return;
- case 0x00: // Rn = LSHIFT Rx BY Ry | <data8>
+ case 0x00: // Rn = LSHIFT Rx BY Ry | <data8>
{
code_label shift_neg = compiler->labelnum++;
code_label shift_end = compiler->labelnum++;
@@ -4980,7 +4980,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0x08: // Rn = ROT Rx BY Ry | <data8>
+ case 0x08: // Rn = ROT Rx BY Ry | <data8>
{
code_label shift_neg = compiler->labelnum++;
code_label shift_end = compiler->labelnum++;
@@ -5001,7 +5001,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0x20: // Rn = Rn OR LSHIFT Rx BY Ry | <data8>
+ case 0x20: // Rn = Rn OR LSHIFT Rx BY Ry | <data8>
{
code_label shift_neg = compiler->labelnum++;
code_label shift_end = compiler->labelnum++;
@@ -5027,12 +5027,12 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0x40: // Rn = FEXT Rx BY Ry | <bit6>:<len6>
+ case 0x40: // Rn = FEXT Rx BY Ry | <bit6>:<len6>
// extraction mask
UML_MOV(block, I0, REG(ry));
UML_SHR(block, I1, I0, 6);
- UML_AND(block, I1, I1, 0x3f); // i1 = len6
- UML_AND(block, I0, I0, 0x3f); // i0 = bit6
+ UML_AND(block, I1, I1, 0x3f); // i1 = len6
+ UML_AND(block, I0, I0, 0x3f); // i0 = bit6
UML_MOV(block, I3, 0xffffffff);
UML_SUB(block, I2, 32, I1);
UML_SHR(block, I3, I3, I2);
@@ -5050,12 +5050,12 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x48: // Rn = FEXT Rx BY Ry | <bit6>:<len6> (SE)
+ case 0x48: // Rn = FEXT Rx BY Ry | <bit6>:<len6> (SE)
// extraction mask
UML_MOV(block, I0, REG(ry));
UML_SHR(block, I1, I0, 6);
- UML_AND(block, I1, I1, 0x3f); // i1 = len6
- UML_AND(block, I0, I0, 0x3f); // i0 = bit6
+ UML_AND(block, I1, I1, 0x3f); // i1 = len6
+ UML_AND(block, I0, I0, 0x3f); // i0 = bit6
UML_MOV(block, I3, 0xffffffff);
UML_SUB(block, I2, 32, I1);
UML_SHR(block, I3, I3, I2);
@@ -5079,12 +5079,12 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x64: // Rn = Rn OR FDEP Rx BY Ry | <bit6>:<len6>
+ case 0x64: // Rn = Rn OR FDEP Rx BY Ry | <bit6>:<len6>
// extraction mask
UML_MOV(block, I0, REG(ry));
UML_SHR(block, I1, I0, 6);
- UML_AND(block, I1, I1, 0x3f); // i1 = len6
- UML_AND(block, I0, I0, 0x3f); // i0 = bit6
+ UML_AND(block, I1, I1, 0x3f); // i1 = len6
+ UML_AND(block, I0, I0, 0x3f); // i0 = bit6
UML_MOV(block, I3, 0xffffffff);
UML_SUB(block, I2, 32, I1);
UML_SHR(block, I3, I3, I2);
@@ -5102,7 +5102,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0xc0: // Rn = BSET Rx BY Ry | <data8>
+ case 0xc0: // Rn = BSET Rx BY Ry | <data8>
{
UML_MOV(block, I0, REG(ry));
UML_SHL(block, I1, 1, I0);
@@ -5117,7 +5117,7 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0xc4: // Rn = BCLR Rx BY Ry | <data8>
+ case 0xc4: // Rn = BCLR Rx BY Ry | <data8>
{
UML_MOV(block, I0, REG(ry));
UML_SHL(block, I1, 1, I0);
@@ -5133,14 +5133,14 @@ void adsp21062_device::generate_compute(drcuml_block *block, compiler_state *com
return;
}
- case 0xcc: // BTST Rx BY Ry | <data8>
+ case 0xcc: // BTST Rx BY Ry | <data8>
{
UML_MOV(block, I0, REG(ry));
UML_SHL(block, I1, 1, I0);
UML_TEST(block, REG(rx), I1);
if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ);
- if (SV_CALC_REQUIRED)
- UML_CMP(block, I0, 31);
+ if (SV_CALC_REQUIRED)
+ UML_CMP(block, I0, 31);
if (SV_CALC_REQUIRED) UML_SETc(block, COND_G, ASTAT_SV);
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
@@ -5383,7 +5383,7 @@ void adsp21062_device::generate_do_condition(drcuml_block *block, compiler_state
// infinite loop
break;
case 0x0f: /* LCE */
- fatalerror("generate_do_condition 0x0f"); // this should only be used with counter loops
+ fatalerror("generate_do_condition 0x0f"); // this should only be used with counter loops
break;
case 0x10: /* NOT EQUAL */
UML_TEST(block, mem(&m_core->astat_delay_copy.az), 1);
@@ -5465,16 +5465,16 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
int len = (data >> 6) & 0x3f;
switch (shiftop)
- {
- case 0x11: // FDEP Rx BY <bit6>:<len6>
- case 0x13: // FDEP Rx BY <bit6>:<len6> (SE)
- case 0x1b: // Rn = Rn OR FDEP Rx BY <bit6>:<len6> (SE)
+ {
+ case 0x11: // FDEP Rx BY <bit6>:<len6>
+ case 0x13: // FDEP Rx BY <bit6>:<len6> (SE)
+ case 0x1b: // Rn = Rn OR FDEP Rx BY <bit6>:<len6> (SE)
UML_MOV(block, mem(&m_core->pc), desc->pc);
UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]);
UML_CALLC(block, cfunc_unimplemented_shiftimm, this);
break;
- case 0x00: // LSHIFT Rx BY <data8>
+ case 0x00: // LSHIFT Rx BY <data8>
if (abs(shift) >= 32)
{
UML_MOV(block, REG(rn), 0);
@@ -5495,7 +5495,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
}
return;
- case 0x01: // ASHIFT Rx BY <data8>
+ case 0x01: // ASHIFT Rx BY <data8>
if (abs(shift) >= 32)
{
UML_MOV(block, REG(rn), 0);
@@ -5518,7 +5518,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
}
return;
- case 0x02: // ROT Rx BY <data8>
+ case 0x02: // ROT Rx BY <data8>
if (shift < 0)
UML_ROR(block, REG(rn), REG(rx), (-shift) & 0x1f);
else
@@ -5528,7 +5528,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x08: // Rn = Rn OR LSHIFT Rx BY <data8>
+ case 0x08: // Rn = Rn OR LSHIFT Rx BY <data8>
if (abs(shift) >= 32)
{
UML_MOV(block, I0, 0);
@@ -5551,7 +5551,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
}
return;
- case 0x10: // FEXT Rx BY <bit6>:<len6>
+ case 0x10: // FEXT Rx BY <bit6>:<len6>
if (bit == 0)
{
UML_AND(block, REG(rn), REG(rx), MAKE_EXTRACT_MASK(bit, len));
@@ -5567,7 +5567,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x12: // FEXT Rx BY <bit6>:<len6> (SE)
+ case 0x12: // FEXT Rx BY <bit6>:<len6> (SE)
UML_AND(block, I0, REG(rx), MAKE_EXTRACT_MASK(bit, len));
UML_SHL(block, I0, I0, 32 - (bit + len));
UML_SAR(block, REG(rn), I0, 32 - (bit + len) + bit);
@@ -5577,7 +5577,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x19: // Rn = Rn OR FDEP Rx BY <bit6>:<len6>
+ case 0x19: // Rn = Rn OR FDEP Rx BY <bit6>:<len6>
UML_AND(block, I0, REG(rx), MAKE_EXTRACT_MASK(0, len));
if (bit > 0)
UML_SHL(block, I0, I0, bit);
@@ -5586,10 +5586,10 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ);
if (SV_CALC_REQUIRED && (bit + len) > 32) UML_MOV(block, ASTAT_SV, 1);
if (SV_CALC_REQUIRED && (bit + len) <= 32) UML_MOV(block, ASTAT_SV, 0);
- if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
+ if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x30: // BSET Rx BY <data8>
+ case 0x30: // BSET Rx BY <data8>
UML_OR(block, REG(rn), REG(rx), 1 << data);
if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ);
if (SV_CALC_REQUIRED && data > 31) UML_MOV(block, ASTAT_SV, 1);
@@ -5597,7 +5597,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x31: // BCLR Rx By <data8>
+ case 0x31: // BCLR Rx By <data8>
UML_AND(block, REG(rn), REG(rx), ~(1 << data));
if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ);
if (SV_CALC_REQUIRED && data > 31) UML_MOV(block, ASTAT_SV, 1);
@@ -5605,7 +5605,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x32: // BTGL Rx BY <data8>
+ case 0x32: // BTGL Rx BY <data8>
UML_XOR(block, REG(rn), REG(rx), 1 << data);
if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ);
if (SV_CALC_REQUIRED && data > 31) UML_MOV(block, ASTAT_SV, 1);
@@ -5613,8 +5613,8 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, 0);
return;
- case 0x33: // BTST Rx BY <data8>
- UML_TEST(block, REG(rx), 1 << data);
+ case 0x33: // BTST Rx BY <data8>
+ UML_TEST(block, REG(rx), 1 << data);
if (SZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_SZ);
if (SV_CALC_REQUIRED && data > 31) UML_MOV(block, ASTAT_SV, 1);
if (SV_CALC_REQUIRED && data <= 31) UML_MOV(block, ASTAT_SV, 0);
@@ -5627,4 +5627,4 @@ void adsp21062_device::generate_shift_imm(drcuml_block *block, compiler_state *c
UML_CALLC(block, cfunc_unimplemented_compute, this);
return;
}
-} \ No newline at end of file
+}
diff --git a/src/devices/cpu/sharc/sharcfe.cpp b/src/devices/cpu/sharc/sharcfe.cpp
index bae9014ee33..105eea6c66c 100644
--- a/src/devices/cpu/sharc/sharcfe.cpp
+++ b/src/devices/cpu/sharc/sharcfe.cpp
@@ -10,62 +10,62 @@
#include "emu.h"
#include "sharcfe.h"
-#define REG_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0)
-#define REG_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0)
-
-#define AZ_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0)
-#define AZ_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0)
-#define AV_USED(desc) do { (desc).regin[0] |= 1 << 17; } while(0)
-#define AV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 17; } while(0)
-#define AN_USED(desc) do { (desc).regin[0] |= 1 << 18; } while(0)
-#define AN_MODIFIED(desc) do { (desc).regout[0] |= 1 << 18; } while(0)
-#define AC_USED(desc) do { (desc).regin[0] |= 1 << 19; } while(0)
-#define AC_MODIFIED(desc) do { (desc).regout[0] |= 1 << 19; } while(0)
-#define AS_USED(desc) do { (desc).regin[0] |= 1 << 20; } while(0)
-#define AS_MODIFIED(desc) do { (desc).regout[0] |= 1 << 20; } while(0)
-#define AI_USED(desc) do { (desc).regin[0] |= 1 << 21; } while(0)
-#define AI_MODIFIED(desc) do { (desc).regout[0] |= 1 << 21; } while(0)
-#define MN_USED(desc) do { (desc).regin[0] |= 1 << 22; } while(0)
-#define MN_MODIFIED(desc) do { (desc).regout[0] |= 1 << 22; } while(0)
-#define MV_USED(desc) do { (desc).regin[0] |= 1 << 23; } while(0)
-#define MV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 23; } while(0)
-#define MU_USED(desc) do { (desc).regin[0] |= 1 << 24; } while(0)
-#define MU_MODIFIED(desc) do { (desc).regout[0] |= 1 << 24; } while(0)
-#define MI_USED(desc) do { (desc).regin[0] |= 1 << 25; } while(0)
-#define MI_MODIFIED(desc) do { (desc).regout[0] |= 1 << 25; } while(0)
-#define SV_USED(desc) do { (desc).regin[0] |= 1 << 26; } while(0)
-#define SV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 26; } while(0)
-#define SZ_USED(desc) do { (desc).regin[0] |= 1 << 27; } while(0)
-#define SZ_MODIFIED(desc) do { (desc).regout[0] |= 1 << 27; } while(0)
-#define SS_USED(desc) do { (desc).regin[0] |= 1 << 28; } while(0)
-#define SS_MODIFIED(desc) do { (desc).regout[0] |= 1 << 28; } while(0)
-#define BTF_USED(desc) do { (desc).regin[0] |= 1 << 29; } while(0)
-#define BTF_MODIFIED(desc) do { (desc).regout[0] |= 1 << 29; } while(0)
-#define AF_USED(desc) do { (desc).regin[0] |= 1 << 30; } while(0)
-#define AF_MODIFIED(desc) do { (desc).regout[0] |= 1 << 30; } while(0)
-
-#define ALU_FLAGS_MODIFIED(desc) do { AZ_MODIFIED(desc);AN_MODIFIED(desc);AV_MODIFIED(desc);AC_MODIFIED(desc);AS_MODIFIED(desc);AI_MODIFIED(desc); } while(0)
-#define MULT_FLAGS_MODIFIED(desc) do { MN_MODIFIED(desc);MV_MODIFIED(desc);MU_MODIFIED(desc);MI_MODIFIED(desc); } while(0)
-#define SHIFT_FLAGS_MODIFIED(desc) do { SZ_MODIFIED(desc);SV_MODIFIED(desc);SS_MODIFIED(desc); } while(0)
-
-
-#define PM_I_USED(desc,x) do { (desc).regin[1] |= 1 << (x); } while(0)
-#define PM_I_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (x); } while(0)
-#define PM_M_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 8); } while(0)
-#define PM_M_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 8); } while(0)
-#define PM_B_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 16); } while(0)
-#define PM_B_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 16); } while(0)
-#define PM_L_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 24); } while(0)
-#define PM_L_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 24); } while(0)
-
-#define DM_I_USED(desc,x) do { (desc).regin[2] |= 1 << (x); } while(0)
-#define DM_I_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << (x); } while(0)
-#define DM_M_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 8); } while(0)
-#define DM_M_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 8); } while(0)
-#define DM_B_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 16); } while(0)
-#define DM_B_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 16); } while(0)
-#define DM_L_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 24); } while(0)
-#define DM_L_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 24); } while(0)
+#define REG_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0)
+#define REG_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0)
+
+#define AZ_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0)
+#define AZ_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0)
+#define AV_USED(desc) do { (desc).regin[0] |= 1 << 17; } while(0)
+#define AV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 17; } while(0)
+#define AN_USED(desc) do { (desc).regin[0] |= 1 << 18; } while(0)
+#define AN_MODIFIED(desc) do { (desc).regout[0] |= 1 << 18; } while(0)
+#define AC_USED(desc) do { (desc).regin[0] |= 1 << 19; } while(0)
+#define AC_MODIFIED(desc) do { (desc).regout[0] |= 1 << 19; } while(0)
+#define AS_USED(desc) do { (desc).regin[0] |= 1 << 20; } while(0)
+#define AS_MODIFIED(desc) do { (desc).regout[0] |= 1 << 20; } while(0)
+#define AI_USED(desc) do { (desc).regin[0] |= 1 << 21; } while(0)
+#define AI_MODIFIED(desc) do { (desc).regout[0] |= 1 << 21; } while(0)
+#define MN_USED(desc) do { (desc).regin[0] |= 1 << 22; } while(0)
+#define MN_MODIFIED(desc) do { (desc).regout[0] |= 1 << 22; } while(0)
+#define MV_USED(desc) do { (desc).regin[0] |= 1 << 23; } while(0)
+#define MV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 23; } while(0)
+#define MU_USED(desc) do { (desc).regin[0] |= 1 << 24; } while(0)
+#define MU_MODIFIED(desc) do { (desc).regout[0] |= 1 << 24; } while(0)
+#define MI_USED(desc) do { (desc).regin[0] |= 1 << 25; } while(0)
+#define MI_MODIFIED(desc) do { (desc).regout[0] |= 1 << 25; } while(0)
+#define SV_USED(desc) do { (desc).regin[0] |= 1 << 26; } while(0)
+#define SV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 26; } while(0)
+#define SZ_USED(desc) do { (desc).regin[0] |= 1 << 27; } while(0)
+#define SZ_MODIFIED(desc) do { (desc).regout[0] |= 1 << 27; } while(0)
+#define SS_USED(desc) do { (desc).regin[0] |= 1 << 28; } while(0)
+#define SS_MODIFIED(desc) do { (desc).regout[0] |= 1 << 28; } while(0)
+#define BTF_USED(desc) do { (desc).regin[0] |= 1 << 29; } while(0)
+#define BTF_MODIFIED(desc) do { (desc).regout[0] |= 1 << 29; } while(0)
+#define AF_USED(desc) do { (desc).regin[0] |= 1 << 30; } while(0)
+#define AF_MODIFIED(desc) do { (desc).regout[0] |= 1 << 30; } while(0)
+
+#define ALU_FLAGS_MODIFIED(desc) do { AZ_MODIFIED(desc);AN_MODIFIED(desc);AV_MODIFIED(desc);AC_MODIFIED(desc);AS_MODIFIED(desc);AI_MODIFIED(desc); } while(0)
+#define MULT_FLAGS_MODIFIED(desc) do { MN_MODIFIED(desc);MV_MODIFIED(desc);MU_MODIFIED(desc);MI_MODIFIED(desc); } while(0)
+#define SHIFT_FLAGS_MODIFIED(desc) do { SZ_MODIFIED(desc);SV_MODIFIED(desc);SS_MODIFIED(desc); } while(0)
+
+
+#define PM_I_USED(desc,x) do { (desc).regin[1] |= 1 << (x); } while(0)
+#define PM_I_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (x); } while(0)
+#define PM_M_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 8); } while(0)
+#define PM_M_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 8); } while(0)
+#define PM_B_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 16); } while(0)
+#define PM_B_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 16); } while(0)
+#define PM_L_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 24); } while(0)
+#define PM_L_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 24); } while(0)
+
+#define DM_I_USED(desc,x) do { (desc).regin[2] |= 1 << (x); } while(0)
+#define DM_I_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << (x); } while(0)
+#define DM_M_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 8); } while(0)
+#define DM_M_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 8); } while(0)
+#define DM_B_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 16); } while(0)
+#define DM_B_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 16); } while(0)
+#define DM_L_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 24); } while(0)
+#define DM_L_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 24); } while(0)
sharc_frontend::sharc_frontend(adsp21062_device *sharc, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
@@ -221,12 +221,12 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
switch ((opcode >> 45) & 7)
{
- case 0: // subops
+ case 0: // subops
{
UINT32 subop = (opcode >> 40) & 0x1f;
switch (subop)
{
- case 0x00: // NOP / idle |000|00000|
+ case 0x00: // NOP / idle |000|00000|
if (opcode & U64(0x008000000000))
{
// IDLE
@@ -236,9 +236,9 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
{
// NOP
}
- break;
+ break;
- case 0x01: // compute |000|00001|
+ case 0x01: // compute |000|00001|
{
int cond = (opcode >> 33) & 0x1f;
describe_if_condition(desc, cond);
@@ -248,7 +248,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x02: // immediate shift |000|00010|
+ case 0x02: // immediate shift |000|00010|
{
int shiftop = (opcode >> 16) & 0x3f;
int rn = (opcode >> 4) & 0xf;
@@ -261,8 +261,8 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
return false;
break;
}
-
- case 0x04: // compute / modify |000|00100|
+
+ case 0x04: // compute / modify |000|00100|
{
int g = (opcode >> 38) & 0x1;
int m = (opcode >> 27) & 0x7;
@@ -291,8 +291,8 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x06: // direct jump|call |000|00110|
- {
+ case 0x06: // direct jump|call |000|00110|
+ {
int j = (opcode >> 26) & 0x1;
int b = (opcode >> 39) & 0x1;
int cond = (opcode >> 33) & 0x1f;
@@ -312,7 +312,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x07: // direct jump|call |000|00111|
+ case 0x07: // direct jump|call |000|00111|
{
int j = (opcode >> 26) & 0x1;
int b = (opcode >> 39) & 0x1;
@@ -333,8 +333,8 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x08: // indirect jump|call / compute |000|01000|
- {
+ case 0x08: // indirect jump|call / compute |000|01000|
+ {
int j = (opcode >> 26) & 0x1;
int b = (opcode >> 39) & 0x1;
int pmi = (opcode >> 30) & 0x7;
@@ -361,12 +361,12 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x09: // indirect jump|call / compute |000|01001|
+ case 0x09: // indirect jump|call / compute |000|01001|
{
int j = (opcode >> 26) & 0x1;
int b = (opcode >> 39) & 0x1;
int cond = (opcode >> 33) & 0x1f;
-
+
if (!describe_compute(desc, opcode))
return false;
@@ -384,7 +384,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x0a: // return from subroutine / compute |000|01010|
+ case 0x0a: // return from subroutine / compute |000|01010|
{
int cond = (opcode >> 33) & 0x1f;
int j = (opcode >> 26) & 0x1;
@@ -404,7 +404,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x0b: // return from interrupt / compute |000|01011|
+ case 0x0b: // return from interrupt / compute |000|01011|
{
int cond = (opcode >> 33) & 0x1f;
int j = (opcode >> 26) & 0x1;
@@ -424,7 +424,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x0c: // do until counter expired |000|01100|
+ case 0x0c: // do until counter expired |000|01100|
{
int offset = SIGN_EXTEND24(opcode & 0xffffff);
@@ -439,7 +439,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x0d: // do until counter expired |000|01101|
+ case 0x0d: // do until counter expired |000|01101|
{
int ureg = (opcode >> 32) & 0xff;
if (!describe_ureg_access(desc, ureg, UREG_READ))
@@ -458,7 +458,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x0e: // do until |000|01110|
+ case 0x0e: // do until |000|01110|
{
int offset = SIGN_EXTEND24(opcode & 0xffffff);
int cond = (opcode >> 33) & 0x1f;
@@ -472,8 +472,8 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
/*
loop.astat_check_pc = loop.end_pc - 2;
if (loop.astat_check_pc < loop.start_pc)
- fatalerror("describe_compute: conditional loop < 2 at %08X", desc.pc);
- */
+ fatalerror("describe_compute: conditional loop < 2 at %08X", desc.pc);
+ */
int jump_diff = loop.end_pc - loop.start_pc;
if (jump_diff >= 2)
@@ -488,7 +488,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x0f: // immediate data -> ureg |000|01111|
+ case 0x0f: // immediate data -> ureg |000|01111|
{
int ureg = (opcode >> 32) & 0xff;
if (!describe_ureg_access(desc, ureg, UREG_WRITE))
@@ -496,7 +496,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x10: // ureg <-> DM|PM (direct) |000|100|G|D|
+ case 0x10: // ureg <-> DM|PM (direct) |000|100|G|D|
case 0x11:
case 0x12:
case 0x13:
@@ -518,7 +518,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x14: // system register bit manipulation |000|10100|
+ case 0x14: // system register bit manipulation |000|10100|
{
int bop = (opcode >> 37) & 0x7;
int sreg = (opcode >> 32) & 0xf;
@@ -526,10 +526,10 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
switch (bop)
{
- case 0: // SET
- case 1: // CLEAR
- case 2: // TOGGLE
- if (sreg == 0x7c) // ASTAT
+ case 0: // SET
+ case 1: // CLEAR
+ case 2: // TOGGLE
+ if (sreg == 0x7c) // ASTAT
{
if (data & adsp21062_device::AZ)
{
@@ -594,8 +594,8 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
}
break;
- case 4: // TEST
- case 5: // XOR
+ case 4: // TEST
+ case 5: // XOR
BTF_MODIFIED(desc);
break;
@@ -606,13 +606,13 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x16: // I register modify / bit-reverse |000|10110|
+ case 0x16: // I register modify / bit-reverse |000|10110|
{
- if (opcode & U64(0x008000000000)) // bit reverse
+ if (opcode & U64(0x008000000000)) // bit reverse
{
fatalerror("sharc_frontend::describe: bit reverse unimplemented");
}
- else // modify
+ else // modify
{
int g = (opcode >> 38) & 0x1;
int i = (opcode >> 32) & 0x7;
@@ -625,17 +625,17 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 0x17: // push|pop stacks / flush cache |000|10111|
+ case 0x17: // push|pop stacks / flush cache |000|10111|
break;
- case 0x18: // cjump |000|11000|
+ case 0x18: // cjump |000|11000|
fatalerror("sharc_frontend::describe: cjump unimplemented");
break;
- case 0x19: // rframe |000|11001|
+ case 0x19: // rframe |000|11001|
fatalerror("sharc_frontend::describe: rframe unimplemented");
break;
-
+
default:
fatalerror("sharc_frontend::describe: unknown subop %02X in opcode %04X%08X", subop, (UINT16)(opcode >> 32), (UINT32)(opcode));
return false;
@@ -643,7 +643,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 1: // compute / dreg <-> DM / dreg <-> PM |001|
+ case 1: // compute / dreg <-> DM / dreg <-> PM |001|
{
if (!describe_compute(desc, opcode))
return false;
@@ -689,7 +689,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 2: // compute / ureg <-> DM|PM, register modify |010|
+ case 2: // compute / ureg <-> DM|PM, register modify |010|
{
if (!describe_compute(desc, opcode))
return false;
@@ -737,7 +737,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
if (!describe_compute(desc, opcode))
return false;
- if (opcode & U64(0x100000000000)) // compute / ureg <-> ureg |011|1|
+ if (opcode & U64(0x100000000000)) // compute / ureg <-> ureg |011|1|
{
int src_ureg = (opcode >> 36) & 0xff;
int dst_ureg = (opcode >> 23) & 0xff;
@@ -750,7 +750,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
if (!describe_ureg_access(desc, dst_ureg, UREG_WRITE))
return false;
}
- else // compute / dreg <-> DM|PM, immediate modify |011|0|
+ else // compute / dreg <-> DM|PM, immediate modify |011|0|
{
int u = (opcode >> 38) & 0x1;
int d = (opcode >> 39) & 0x1;
@@ -771,13 +771,13 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
REG_MODIFIED(desc, dreg);
desc.flags |= OPFLAG_READS_MEMORY;
}
-
+
if (g)
{
// PM
PM_I_USED(desc, i);
- if (u) // post-modify with update
+ if (u) // post-modify with update
{
PM_I_MODIFIED(desc, i);
}
@@ -787,7 +787,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
// DM
DM_I_USED(desc, i);
- if (u) // post-modify with update
+ if (u) // post-modify with update
{
DM_I_MODIFIED(desc, i);
}
@@ -798,7 +798,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 4:
{
- if (opcode & U64(0x100000000000)) // immediate data -> DM|PM |100|1|
+ if (opcode & U64(0x100000000000)) // immediate data -> DM|PM |100|1|
{
int i = (opcode >> 41) & 0x7;
int m = (opcode >> 38) & 0x7;
@@ -821,7 +821,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
DM_M_USED(desc, m);
}
}
- else // immediate shift / dreg <-> DM|PM |100|0|
+ else // immediate shift / dreg <-> DM|PM |100|0|
{
int i = (opcode >> 41) & 0x7;
int m = (opcode >> 38) & 0x7;
@@ -867,7 +867,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 5: // ureg <-> DM|PM (indirect) |101|
+ case 5: // ureg <-> DM|PM (indirect) |101|
{
int ureg = (opcode >> 32) & 0xff;
int d = (opcode >> 40) & 1;
@@ -890,11 +890,11 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
if (g)
PM_I_USED(desc, i);
else
- DM_I_USED(desc, i);
+ DM_I_USED(desc, i);
break;
}
- case 6: // indirect jump / compute / dreg <-> DM |110|
+ case 6: // indirect jump / compute / dreg <-> DM |110|
{
int d = (opcode >> 44) & 0x1;
int dmi = (opcode >> 41) & 0x7;
@@ -936,7 +936,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
}
- case 7: // indirect jump / compute / dreg <-> DM |111|
+ case 7: // indirect jump / compute / dreg <-> DM |111|
{
int d = (opcode >> 44) & 0x1;
int dmi = (opcode >> 41) & 0x7;
@@ -990,7 +990,7 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
int rx = (opcode >> 4) & 0xf;
int ry = (opcode >> 0) & 0xf;
- if (opcode & 0x400000) // multi-function operation
+ if (opcode & 0x400000) // multi-function operation
{
UINT32 multiop = (opcode >> 16) & 0x3f;
int fm = rs;
@@ -1002,15 +1002,15 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
switch (multiop)
{
- case 0x00: // Rn = MRxx
+ case 0x00: // Rn = MRxx
REG_MODIFIED(desc, rn);
break;
- case 0x01: // MRxx = Rn
+ case 0x01: // MRxx = Rn
REG_USED(desc, rn);
break;
- case 0x07: // Ra = Rx + Ry, Rs = Rx - Ry
- case 0x0f: // Fa = Fx + Fy, Fs = Fx - Fy
+ case 0x07: // Ra = Rx + Ry, Rs = Rx - Ry
+ case 0x0f: // Fa = Fx + Fy, Fs = Fx - Fy
REG_USED(desc, rx);
REG_USED(desc, ry);
REG_MODIFIED(desc, ra);
@@ -1018,9 +1018,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
ALU_FLAGS_MODIFIED(desc);
break;
- case 0x04: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
- case 0x05: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
- case 0x06: // Rm = R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
+ case 0x04: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
+ case 0x05: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
+ case 0x06: // Rm = R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
REG_USED(desc, fxm);
REG_USED(desc, fym);
REG_USED(desc, fxa);
@@ -1031,9 +1031,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x08: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12
- case 0x09: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12
- case 0x0a: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2
+ case 0x08: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12
+ case 0x09: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12
+ case 0x0a: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2
REG_USED(desc, fxm);
REG_USED(desc, fym);
REG_USED(desc, fxa);
@@ -1042,9 +1042,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x0c: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
- case 0x0d: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
- case 0x0e: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
+ case 0x0c: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
+ case 0x0d: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
+ case 0x0e: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
REG_USED(desc, fxm);
REG_USED(desc, fym);
REG_USED(desc, fxa);
@@ -1055,9 +1055,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x10: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12
- case 0x11: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12
- case 0x12: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2
+ case 0x10: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12
+ case 0x11: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12
+ case 0x12: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2
REG_USED(desc, fxm);
REG_USED(desc, fym);
REG_USED(desc, fxa);
@@ -1066,9 +1066,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x14: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
- case 0x15: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
- case 0x16: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
+ case 0x14: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12
+ case 0x15: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12
+ case 0x16: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2
REG_USED(desc, fxm);
REG_USED(desc, fym);
REG_USED(desc, fxa);
@@ -1079,13 +1079,13 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x18: // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12
- case 0x19: // Fm = F3-0 * F7-4, Fa = F11-8 - F15-12
- case 0x1a: // Fm = F3-0 * F7-4, Fa = FLOAT F11-8 BY R15-12
- case 0x1b: // Fm = F3-0 * F7-4, Fa = FIX F11-8 BY R15-12
- case 0x1c: // Fm = F3-0 * F7-4, Fa = (F11-8 + F15-12) / 2
- case 0x1e: // Fm = F3-0 * F7-4, Fa = MAX(F11-8, F15-12)
- case 0x1f: // Fm = F3-0 * F7-4, Fa = MIN(F11-8, F15-12)
+ case 0x18: // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12
+ case 0x19: // Fm = F3-0 * F7-4, Fa = F11-8 - F15-12
+ case 0x1a: // Fm = F3-0 * F7-4, Fa = FLOAT F11-8 BY R15-12
+ case 0x1b: // Fm = F3-0 * F7-4, Fa = FIX F11-8 BY R15-12
+ case 0x1c: // Fm = F3-0 * F7-4, Fa = (F11-8 + F15-12) / 2
+ case 0x1e: // Fm = F3-0 * F7-4, Fa = MAX(F11-8, F15-12)
+ case 0x1f: // Fm = F3-0 * F7-4, Fa = MIN(F11-8, F15-12)
REG_USED(desc, fxm);
REG_USED(desc, fym);
REG_USED(desc, fxa);
@@ -1096,7 +1096,7 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x1d: // Fm = F3-0 * F7-4, Fa = ABS F11-8
+ case 0x1d: // Fm = F3-0 * F7-4, Fa = ABS F11-8
REG_USED(desc, fxm);
REG_USED(desc, fym);
REG_USED(desc, fxa);
@@ -1139,48 +1139,48 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
return false;
}
}
- else // single-function operation
+ else // single-function operation
{
UINT32 operation = (opcode >> 12) & 0xff;
switch ((opcode >> 20) & 3)
{
- case 0: // ALU operations
+ case 0: // ALU operations
{
switch (operation)
{
- case 0x01: // Rn = Rx + Ry
- case 0x02: // Rn = Rx - Ry
- case 0x09: // Rn = (Rx + Ry) / 2
- case 0x40: // Rn = Rx AND Ry
- case 0x41: // Rn = Rx OR Ry
- case 0x42: // Rn = Rx XOR Ry
- case 0x61: // Rn = MIN(Rx, Ry)
- case 0x62: // Rn = MAX(Rx, Ry)
- case 0x63: // Rn = CLIP Rx BY Ry
- case 0x81: // Fn = Fx + Fy
- case 0x82: // Fn = Fx - Fy
- case 0x91: // Fn = ABS(Fx + Fy)
- case 0x92: // Fn = ABS(Fx - Fy)
- case 0x89: // Fn = (Fx + Fy) / 2
- case 0xbd: // Fn = SCALB Fx BY Ry
- case 0xd9: // Rn = FIX Fx BY Ry
- case 0xdd: // Rn = TRUNC Fx BY Ry
- case 0xda: // Fn = FLOAT Rx BY Ry
- case 0xe1: // Fn = MIN(Fx, Fy)
- case 0xe2: // Fn = MAX(Fx, Fy)
- case 0xe3: // Fn = CLIP Fx BY Fy
- case 0xe0: // Fn = Fx COPYSIGN Fy
+ case 0x01: // Rn = Rx + Ry
+ case 0x02: // Rn = Rx - Ry
+ case 0x09: // Rn = (Rx + Ry) / 2
+ case 0x40: // Rn = Rx AND Ry
+ case 0x41: // Rn = Rx OR Ry
+ case 0x42: // Rn = Rx XOR Ry
+ case 0x61: // Rn = MIN(Rx, Ry)
+ case 0x62: // Rn = MAX(Rx, Ry)
+ case 0x63: // Rn = CLIP Rx BY Ry
+ case 0x81: // Fn = Fx + Fy
+ case 0x82: // Fn = Fx - Fy
+ case 0x91: // Fn = ABS(Fx + Fy)
+ case 0x92: // Fn = ABS(Fx - Fy)
+ case 0x89: // Fn = (Fx + Fy) / 2
+ case 0xbd: // Fn = SCALB Fx BY Ry
+ case 0xd9: // Rn = FIX Fx BY Ry
+ case 0xdd: // Rn = TRUNC Fx BY Ry
+ case 0xda: // Fn = FLOAT Rx BY Ry
+ case 0xe1: // Fn = MIN(Fx, Fy)
+ case 0xe2: // Fn = MAX(Fx, Fy)
+ case 0xe3: // Fn = CLIP Fx BY Fy
+ case 0xe0: // Fn = Fx COPYSIGN Fy
REG_USED(desc, rx);
REG_USED(desc, ry);
REG_MODIFIED(desc, rn);
ALU_FLAGS_MODIFIED(desc);
break;
- case 0x05: // Rn = Rx + Ry + CI
- case 0x06: // Rn = Rx - Ry + CI - 1
- case 0x25: // Rn = Rx + CI
- case 0x26: // Rn = Rx + CI - 1
+ case 0x05: // Rn = Rx + Ry + CI
+ case 0x06: // Rn = Rx - Ry + CI - 1
+ case 0x25: // Rn = Rx + CI
+ case 0x26: // Rn = Rx + CI - 1
REG_USED(desc, rx);
REG_USED(desc, ry);
REG_MODIFIED(desc, rn);
@@ -1188,30 +1188,30 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
ALU_FLAGS_MODIFIED(desc);
break;
- case 0x0a: // COMP(Rx, Ry)
- case 0x8a: // COMP(Fx, Fy)
+ case 0x0a: // COMP(Rx, Ry)
+ case 0x8a: // COMP(Fx, Fy)
REG_USED(desc, rx);
REG_USED(desc, ry);
ALU_FLAGS_MODIFIED(desc);
break;
- case 0x29: // Rn = Rx + 1
- case 0x2a: // Rn = Rx - 1
- case 0x22: // Rn = -Rx
- case 0x30: // Rn = ABS Rx
- case 0x21: // Rn = PASS Rx
- case 0x43: // Rn = NOT Rx
- case 0xb0: // Fn = ABS(Fx)
- case 0xa1: // Fn = PASS Fx
- case 0xa2: // Fn = -Fx
- case 0xa5: // Fn = RND Fx
- case 0xad: // Rn = MANT Fx
- case 0xc1: // Rn = LOGB Fx
- case 0xc9: // Rn = FIX Fx
- case 0xcd: // Rn = TRUNC Fx
- case 0xca: // Fn = FLOAT Rx
- case 0xc4: // Fn = RECIPS Fx
- case 0xc5: // Fn = RSQRTS Fx
+ case 0x29: // Rn = Rx + 1
+ case 0x2a: // Rn = Rx - 1
+ case 0x22: // Rn = -Rx
+ case 0x30: // Rn = ABS Rx
+ case 0x21: // Rn = PASS Rx
+ case 0x43: // Rn = NOT Rx
+ case 0xb0: // Fn = ABS(Fx)
+ case 0xa1: // Fn = PASS Fx
+ case 0xa2: // Fn = -Fx
+ case 0xa5: // Fn = RND Fx
+ case 0xad: // Rn = MANT Fx
+ case 0xc1: // Rn = LOGB Fx
+ case 0xc9: // Rn = FIX Fx
+ case 0xcd: // Rn = TRUNC Fx
+ case 0xca: // Fn = FLOAT Rx
+ case 0xc4: // Fn = RECIPS Fx
+ case 0xc5: // Fn = RSQRTS Fx
REG_USED(desc, rx);
REG_MODIFIED(desc, rn);
ALU_FLAGS_MODIFIED(desc);
@@ -1248,76 +1248,76 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
break;
}
- case 1: // multiplier operations
+ case 1: // multiplier operations
{
switch (operation)
{
- case 0x40: // Rn = Rx * Ry (UUI)
- case 0x48: // Rn = Rx * Ry (UUF)
- case 0x49: // Rn = Rx * Ry (UUFR)
- case 0x50: // Rn = Rx * Ry (SUI)
- case 0x58: // Rn = Rx * Ry (SUF)
- case 0x59: // Rn = Rx * Ry (SUFR)
- case 0x60: // Rn = Rx * Ry (USI)
- case 0x68: // Rn = Rx * Ry (USF)
- case 0x69: // Rn = Rx * Ry (USFR)
- case 0x70: // Rn = Rx * Ry (SSI)
- case 0x78: // Rn = Rx * Ry (SSF)
- case 0x79: // Rn = Rx * Ry (SSFR)
+ case 0x40: // Rn = Rx * Ry (UUI)
+ case 0x48: // Rn = Rx * Ry (UUF)
+ case 0x49: // Rn = Rx * Ry (UUFR)
+ case 0x50: // Rn = Rx * Ry (SUI)
+ case 0x58: // Rn = Rx * Ry (SUF)
+ case 0x59: // Rn = Rx * Ry (SUFR)
+ case 0x60: // Rn = Rx * Ry (USI)
+ case 0x68: // Rn = Rx * Ry (USF)
+ case 0x69: // Rn = Rx * Ry (USFR)
+ case 0x70: // Rn = Rx * Ry (SSI)
+ case 0x78: // Rn = Rx * Ry (SSF)
+ case 0x79: // Rn = Rx * Ry (SSFR)
REG_USED(desc, rx);
REG_USED(desc, ry);
REG_MODIFIED(desc, rn);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x44: // MRF = Rx * Ry (UUI)
- case 0x4c: // MRF = Rx * Ry (UUF)
- case 0x4d: // MRF = Rx * Ry (UUFR)
- case 0x54: // MRF = Rx * Ry (SUI)
- case 0x5c: // MRF = Rx * Ry (SUF)
- case 0x5d: // MRF = Rx * Ry (SUFR)
- case 0x64: // MRF = Rx * Ry (USI)
- case 0x6c: // MRF = Rx * Ry (USF)
- case 0x6d: // MRF = Rx * Ry (USFR)
- case 0x74: // MRF = Rx * Ry (SSI)
- case 0x7c: // MRF = Rx * Ry (SSF)
- case 0x7d: // MRF = Rx * Ry (SSFR)
+ case 0x44: // MRF = Rx * Ry (UUI)
+ case 0x4c: // MRF = Rx * Ry (UUF)
+ case 0x4d: // MRF = Rx * Ry (UUFR)
+ case 0x54: // MRF = Rx * Ry (SUI)
+ case 0x5c: // MRF = Rx * Ry (SUF)
+ case 0x5d: // MRF = Rx * Ry (SUFR)
+ case 0x64: // MRF = Rx * Ry (USI)
+ case 0x6c: // MRF = Rx * Ry (USF)
+ case 0x6d: // MRF = Rx * Ry (USFR)
+ case 0x74: // MRF = Rx * Ry (SSI)
+ case 0x7c: // MRF = Rx * Ry (SSF)
+ case 0x7d: // MRF = Rx * Ry (SSFR)
// TODO: track MRF?
REG_USED(desc, rx);
REG_USED(desc, ry);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x46: // MRB = Rx * Ry (UUI)
- case 0x4e: // MRB = Rx * Ry (UUF)
- case 0x4f: // MRB = Rx * Ry (UUFR)
- case 0x56: // MRB = Rx * Ry (SUI)
- case 0x5e: // MRB = Rx * Ry (SUF)
- case 0x5f: // MRB = Rx * Ry (SUFR)
- case 0x66: // MRB = Rx * Ry (USI)
- case 0x6e: // MRB = Rx * Ry (USF)
- case 0x6f: // MRB = Rx * Ry (USFR)
- case 0x76: // MRB = Rx * Ry (SSI)
- case 0x7e: // MRB = Rx * Ry (SSF)
- case 0x7f: // MRB = Rx * Ry (SSFR)
+ case 0x46: // MRB = Rx * Ry (UUI)
+ case 0x4e: // MRB = Rx * Ry (UUF)
+ case 0x4f: // MRB = Rx * Ry (UUFR)
+ case 0x56: // MRB = Rx * Ry (SUI)
+ case 0x5e: // MRB = Rx * Ry (SUF)
+ case 0x5f: // MRB = Rx * Ry (SUFR)
+ case 0x66: // MRB = Rx * Ry (USI)
+ case 0x6e: // MRB = Rx * Ry (USF)
+ case 0x6f: // MRB = Rx * Ry (USFR)
+ case 0x76: // MRB = Rx * Ry (SSI)
+ case 0x7e: // MRB = Rx * Ry (SSF)
+ case 0x7f: // MRB = Rx * Ry (SSFR)
// TODO: track MRB?
REG_USED(desc, rx);
REG_USED(desc, ry);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x80: // Rn = MRF + Rx * Ry (UUI)
- case 0x88: // Rn = MRF + Rx * Ry (UUF)
- case 0x89: // Rn = MRF + Rx * Ry (UUFR)
- case 0x90: // Rn = MRF + Rx * Ry (SUI)
- case 0x98: // Rn = MRF + Rx * Ry (SUF)
- case 0x99: // Rn = MRF + Rx * Ry (SUFR)
- case 0xa0: // Rn = MRF + Rx * Ry (USI)
- case 0xa8: // Rn = MRF + Rx * Ry (USF)
- case 0xa9: // Rn = MRF + Rx * Ry (USFR)
- case 0xb0: // Rn = MRF + Rx * Ry (SSI)
- case 0xb8: // Rn = MRF + Rx * Ry (SSF)
- case 0xb9: // Rn = MRF + Rx * Ry (SSFR)
+ case 0x80: // Rn = MRF + Rx * Ry (UUI)
+ case 0x88: // Rn = MRF + Rx * Ry (UUF)
+ case 0x89: // Rn = MRF + Rx * Ry (UUFR)
+ case 0x90: // Rn = MRF + Rx * Ry (SUI)
+ case 0x98: // Rn = MRF + Rx * Ry (SUF)
+ case 0x99: // Rn = MRF + Rx * Ry (SUFR)
+ case 0xa0: // Rn = MRF + Rx * Ry (USI)
+ case 0xa8: // Rn = MRF + Rx * Ry (USF)
+ case 0xa9: // Rn = MRF + Rx * Ry (USFR)
+ case 0xb0: // Rn = MRF + Rx * Ry (SSI)
+ case 0xb8: // Rn = MRF + Rx * Ry (SSF)
+ case 0xb9: // Rn = MRF + Rx * Ry (SSFR)
// TODO: track MRF?
REG_USED(desc, rx);
REG_USED(desc, ry);
@@ -1325,18 +1325,18 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x82: // Rn = MRB + Rx * Ry (UUI)
- case 0x8a: // Rn = MRB + Rx * Ry (UUF)
- case 0x8b: // Rn = MRB + Rx * Ry (UUFR)
- case 0x92: // Rn = MRB + Rx * Ry (SUI)
- case 0x9a: // Rn = MRB + Rx * Ry (SUF)
- case 0x9b: // Rn = MRB + Rx * Ry (SUFR)
- case 0xa2: // Rn = MRB + Rx * Ry (USI)
- case 0xaa: // Rn = MRB + Rx * Ry (USF)
- case 0xab: // Rn = MRB + Rx * Ry (USFR)
- case 0xb2: // Rn = MRB + Rx * Ry (SSI)
- case 0xba: // Rn = MRB + Rx * Ry (SSF)
- case 0xbb: // Rn = MRB + Rx * Ry (SSFR)
+ case 0x82: // Rn = MRB + Rx * Ry (UUI)
+ case 0x8a: // Rn = MRB + Rx * Ry (UUF)
+ case 0x8b: // Rn = MRB + Rx * Ry (UUFR)
+ case 0x92: // Rn = MRB + Rx * Ry (SUI)
+ case 0x9a: // Rn = MRB + Rx * Ry (SUF)
+ case 0x9b: // Rn = MRB + Rx * Ry (SUFR)
+ case 0xa2: // Rn = MRB + Rx * Ry (USI)
+ case 0xaa: // Rn = MRB + Rx * Ry (USF)
+ case 0xab: // Rn = MRB + Rx * Ry (USFR)
+ case 0xb2: // Rn = MRB + Rx * Ry (SSI)
+ case 0xba: // Rn = MRB + Rx * Ry (SSF)
+ case 0xbb: // Rn = MRB + Rx * Ry (SSFR)
// TODO: track MRB?
REG_USED(desc, rx);
REG_USED(desc, ry);
@@ -1344,55 +1344,55 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x84: // MRF = MRF + Rx * Ry (UUI)
- case 0x8c: // MRF = MRF + Rx * Ry (UUF)
- case 0x8d: // MRF = MRF + Rx * Ry (UUFR)
- case 0x94: // MRF = MRF + Rx * Ry (SUI)
- case 0x9c: // MRF = MRF + Rx * Ry (SUF)
- case 0x9d: // MRF = MRF + Rx * Ry (SUFR)
- case 0xa4: // MRF = MRF + Rx * Ry (USI)
- case 0xac: // MRF = MRF + Rx * Ry (USF)
- case 0xad: // MRF = MRF + Rx * Ry (USFR)
- case 0xb4: // MRF = MRF + Rx * Ry (SSI)
- case 0xbc: // MRF = MRF + Rx * Ry (SSF)
- case 0xbd: // MRF = MRF + Rx * Ry (SSFR)
+ case 0x84: // MRF = MRF + Rx * Ry (UUI)
+ case 0x8c: // MRF = MRF + Rx * Ry (UUF)
+ case 0x8d: // MRF = MRF + Rx * Ry (UUFR)
+ case 0x94: // MRF = MRF + Rx * Ry (SUI)
+ case 0x9c: // MRF = MRF + Rx * Ry (SUF)
+ case 0x9d: // MRF = MRF + Rx * Ry (SUFR)
+ case 0xa4: // MRF = MRF + Rx * Ry (USI)
+ case 0xac: // MRF = MRF + Rx * Ry (USF)
+ case 0xad: // MRF = MRF + Rx * Ry (USFR)
+ case 0xb4: // MRF = MRF + Rx * Ry (SSI)
+ case 0xbc: // MRF = MRF + Rx * Ry (SSF)
+ case 0xbd: // MRF = MRF + Rx * Ry (SSFR)
// TODO: track MRF?
REG_USED(desc, rx);
REG_USED(desc, ry);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x86: // MRB = MRB + Rx * Ry (UUI)
- case 0x8e: // MRB = MRB + Rx * Ry (UUF)
- case 0x8f: // MRB = MRB + Rx * Ry (UUFR)
- case 0x96: // MRB = MRB + Rx * Ry (SUI)
- case 0x9e: // MRB = MRB + Rx * Ry (SUF)
- case 0x9f: // MRB = MRB + Rx * Ry (SUFR)
- case 0xa6: // MRB = MRB + Rx * Ry (USI)
- case 0xae: // MRB = MRB + Rx * Ry (USF)
- case 0xaf: // MRB = MRB + Rx * Ry (USFR)
- case 0xb6: // MRB = MRB + Rx * Ry (SSI)
- case 0xbe: // MRB = MRB + Rx * Ry (SSF)
- case 0xbf: // MRB = MRB + Rx * Ry (SSFR)
+ case 0x86: // MRB = MRB + Rx * Ry (UUI)
+ case 0x8e: // MRB = MRB + Rx * Ry (UUF)
+ case 0x8f: // MRB = MRB + Rx * Ry (UUFR)
+ case 0x96: // MRB = MRB + Rx * Ry (SUI)
+ case 0x9e: // MRB = MRB + Rx * Ry (SUF)
+ case 0x9f: // MRB = MRB + Rx * Ry (SUFR)
+ case 0xa6: // MRB = MRB + Rx * Ry (USI)
+ case 0xae: // MRB = MRB + Rx * Ry (USF)
+ case 0xaf: // MRB = MRB + Rx * Ry (USFR)
+ case 0xb6: // MRB = MRB + Rx * Ry (SSI)
+ case 0xbe: // MRB = MRB + Rx * Ry (SSF)
+ case 0xbf: // MRB = MRB + Rx * Ry (SSFR)
break;
// TODO: track MRB?
REG_USED(desc, rx);
REG_USED(desc, ry);
MULT_FLAGS_MODIFIED(desc);
break;
-
- case 0xc0: // Rn = MRF - Rx * Ry (UUI)
- case 0xc8: // Rn = MRF - Rx * Ry (UUF)
- case 0xc9: // Rn = MRF - Rx * Ry (UUFR)
- case 0xd0: // Rn = MRF - Rx * Ry (SUI)
- case 0xd8: // Rn = MRF - Rx * Ry (SUF)
- case 0xd9: // Rn = MRF - Rx * Ry (SUFR)
- case 0xe0: // Rn = MRF - Rx * Ry (USI)
- case 0xe8: // Rn = MRF - Rx * Ry (USF)
- case 0xe9: // Rn = MRF - Rx * Ry (USFR)
- case 0xf0: // Rn = MRF - Rx * Ry (SSI)
- case 0xf8: // Rn = MRF - Rx * Ry (SSF)
- case 0xf9: // Rn = MRF - Rx * Ry (SSFR)
+
+ case 0xc0: // Rn = MRF - Rx * Ry (UUI)
+ case 0xc8: // Rn = MRF - Rx * Ry (UUF)
+ case 0xc9: // Rn = MRF - Rx * Ry (UUFR)
+ case 0xd0: // Rn = MRF - Rx * Ry (SUI)
+ case 0xd8: // Rn = MRF - Rx * Ry (SUF)
+ case 0xd9: // Rn = MRF - Rx * Ry (SUFR)
+ case 0xe0: // Rn = MRF - Rx * Ry (USI)
+ case 0xe8: // Rn = MRF - Rx * Ry (USF)
+ case 0xe9: // Rn = MRF - Rx * Ry (USFR)
+ case 0xf0: // Rn = MRF - Rx * Ry (SSI)
+ case 0xf8: // Rn = MRF - Rx * Ry (SSF)
+ case 0xf9: // Rn = MRF - Rx * Ry (SSFR)
// TODO: track MRF?
REG_USED(desc, rx);
REG_USED(desc, ry);
@@ -1400,18 +1400,18 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0xc2: // Rn = MRB - Rx * Ry (UUI)
- case 0xca: // Rn = MRB - Rx * Ry (UUF)
- case 0xcb: // Rn = MRB - Rx * Ry (UUFR)
- case 0xd2: // Rn = MRB - Rx * Ry (SUI)
- case 0xda: // Rn = MRB - Rx * Ry (SUF)
- case 0xdb: // Rn = MRB - Rx * Ry (SUFR)
- case 0xe2: // Rn = MRB - Rx * Ry (USI)
- case 0xea: // Rn = MRB - Rx * Ry (USF)
- case 0xeb: // Rn = MRB - Rx * Ry (USFR)
- case 0xf2: // Rn = MRB - Rx * Ry (SSI)
- case 0xfa: // Rn = MRB - Rx * Ry (SSF)
- case 0xfb: // Rn = MRB - Rx * Ry (SSFR)
+ case 0xc2: // Rn = MRB - Rx * Ry (UUI)
+ case 0xca: // Rn = MRB - Rx * Ry (UUF)
+ case 0xcb: // Rn = MRB - Rx * Ry (UUFR)
+ case 0xd2: // Rn = MRB - Rx * Ry (SUI)
+ case 0xda: // Rn = MRB - Rx * Ry (SUF)
+ case 0xdb: // Rn = MRB - Rx * Ry (SUFR)
+ case 0xe2: // Rn = MRB - Rx * Ry (USI)
+ case 0xea: // Rn = MRB - Rx * Ry (USF)
+ case 0xeb: // Rn = MRB - Rx * Ry (USFR)
+ case 0xf2: // Rn = MRB - Rx * Ry (SSI)
+ case 0xfa: // Rn = MRB - Rx * Ry (SSF)
+ case 0xfb: // Rn = MRB - Rx * Ry (SSFR)
// TODO: track MRB?
REG_USED(desc, rx);
REG_USED(desc, ry);
@@ -1419,106 +1419,106 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0xc4: // MRF = MRF - Rx * Ry (UUI)
- case 0xcc: // MRF = MRF - Rx * Ry (UUF)
- case 0xcd: // MRF = MRF - Rx * Ry (UUFR)
- case 0xd4: // MRF = MRF - Rx * Ry (SUI)
- case 0xdc: // MRF = MRF - Rx * Ry (SUF)
- case 0xdd: // MRF = MRF - Rx * Ry (SUFR)
- case 0xe4: // MRF = MRF - Rx * Ry (USI)
- case 0xec: // MRF = MRF - Rx * Ry (USF)
- case 0xed: // MRF = MRF - Rx * Ry (USFR)
- case 0xf4: // MRF = MRF - Rx * Ry (SSI)
- case 0xfc: // MRF = MRF - Rx * Ry (SSF)
- case 0xfd: // MRF = MRF - Rx * Ry (SSFR)
+ case 0xc4: // MRF = MRF - Rx * Ry (UUI)
+ case 0xcc: // MRF = MRF - Rx * Ry (UUF)
+ case 0xcd: // MRF = MRF - Rx * Ry (UUFR)
+ case 0xd4: // MRF = MRF - Rx * Ry (SUI)
+ case 0xdc: // MRF = MRF - Rx * Ry (SUF)
+ case 0xdd: // MRF = MRF - Rx * Ry (SUFR)
+ case 0xe4: // MRF = MRF - Rx * Ry (USI)
+ case 0xec: // MRF = MRF - Rx * Ry (USF)
+ case 0xed: // MRF = MRF - Rx * Ry (USFR)
+ case 0xf4: // MRF = MRF - Rx * Ry (SSI)
+ case 0xfc: // MRF = MRF - Rx * Ry (SSF)
+ case 0xfd: // MRF = MRF - Rx * Ry (SSFR)
// TODO: track MRF?
REG_USED(desc, rx);
REG_USED(desc, ry);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0xc6: // MRB = MRB - Rx * Ry (UUI)
- case 0xce: // MRB = MRB - Rx * Ry (UUF)
- case 0xcf: // MRB = MRB - Rx * Ry (UUFR)
- case 0xd6: // MRB = MRB - Rx * Ry (SUI)
- case 0xde: // MRB = MRB - Rx * Ry (SUF)
- case 0xdf: // MRB = MRB - Rx * Ry (SUFR)
- case 0xe6: // MRB = MRB - Rx * Ry (USI)
- case 0xee: // MRB = MRB - Rx * Ry (USF)
- case 0xef: // MRB = MRB - Rx * Ry (USFR)
- case 0xf6: // MRB = MRB - Rx * Ry (SSI)
- case 0xfe: // MRB = MRB - Rx * Ry (SSF)
- case 0xff: // MRB = MRB - Rx * Ry (SSFR)
+ case 0xc6: // MRB = MRB - Rx * Ry (UUI)
+ case 0xce: // MRB = MRB - Rx * Ry (UUF)
+ case 0xcf: // MRB = MRB - Rx * Ry (UUFR)
+ case 0xd6: // MRB = MRB - Rx * Ry (SUI)
+ case 0xde: // MRB = MRB - Rx * Ry (SUF)
+ case 0xdf: // MRB = MRB - Rx * Ry (SUFR)
+ case 0xe6: // MRB = MRB - Rx * Ry (USI)
+ case 0xee: // MRB = MRB - Rx * Ry (USF)
+ case 0xef: // MRB = MRB - Rx * Ry (USFR)
+ case 0xf6: // MRB = MRB - Rx * Ry (SSI)
+ case 0xfe: // MRB = MRB - Rx * Ry (SSF)
+ case 0xff: // MRB = MRB - Rx * Ry (SSFR)
// TODO: track MRB?
REG_USED(desc, rx);
REG_USED(desc, ry);
MULT_FLAGS_MODIFIED(desc);
break;
-
- case 0x00: // Rn = SAT MRF (UI)
- case 0x01: // Rn = SAT MRF (SI)
- case 0x08: // Rn = SAT MRF (UF)
- case 0x09: // Rn = SAT MRF (SF)
+
+ case 0x00: // Rn = SAT MRF (UI)
+ case 0x01: // Rn = SAT MRF (SI)
+ case 0x08: // Rn = SAT MRF (UF)
+ case 0x09: // Rn = SAT MRF (SF)
// TODO: track MRF?
REG_MODIFIED(desc, rn);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x02: // Rn = SAT MRB (UI)
- case 0x03: // Rn = SAT MRB (SI)
- case 0x0a: // Rn = SAT MRB (UF)
- case 0x0b: // Rn = SAT MRB (SF)
+ case 0x02: // Rn = SAT MRB (UI)
+ case 0x03: // Rn = SAT MRB (SI)
+ case 0x0a: // Rn = SAT MRB (UF)
+ case 0x0b: // Rn = SAT MRB (SF)
// TODO: track MRB?
REG_MODIFIED(desc, rn);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x04: // MRF = SAT MRF (UI)
- case 0x05: // MRF = SAT MRF (SI)
- case 0x0c: // MRF = SAT MRF (UF)
- case 0x0d: // MRF = SAT MRF (SF)
+ case 0x04: // MRF = SAT MRF (UI)
+ case 0x05: // MRF = SAT MRF (SI)
+ case 0x0c: // MRF = SAT MRF (UF)
+ case 0x0d: // MRF = SAT MRF (SF)
// TODO: track MRF?
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x06: // MRB = SAT MRB (UI)
- case 0x07: // MRB = SAT MRB (SI)
- case 0x0e: // MRB = SAT MRB (UF)
- case 0x0f: // MRB = SAT MRB (SF)
+ case 0x06: // MRB = SAT MRB (UI)
+ case 0x07: // MRB = SAT MRB (SI)
+ case 0x0e: // MRB = SAT MRB (UF)
+ case 0x0f: // MRB = SAT MRB (SF)
// TODO: track MRB?
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x18: // Rn = RND MRF (U)
- case 0x19: // Rn = RND MRF (S)
+ case 0x18: // Rn = RND MRF (U)
+ case 0x19: // Rn = RND MRF (S)
REG_MODIFIED(desc, rn);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x1a: // Rn = RND MRB (U)
- case 0x1b: // Rn = RND MRB (S)
+ case 0x1a: // Rn = RND MRB (U)
+ case 0x1b: // Rn = RND MRB (S)
REG_MODIFIED(desc, rn);
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x1c: // MRF = RND MRF (U)
- case 0x1d: // MRF = RND MRF (S)
+ case 0x1c: // MRF = RND MRF (U)
+ case 0x1d: // MRF = RND MRF (S)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x1e: // MRB = RND MRB (U)
- case 0x1f: // MRB = RND MRB (S)
+ case 0x1e: // MRB = RND MRB (U)
+ case 0x1f: // MRB = RND MRB (S)
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x14: // MRF = 0
+ case 0x14: // MRF = 0
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x16: // MRB = 0
+ case 0x16: // MRB = 0
MULT_FLAGS_MODIFIED(desc);
break;
- case 0x30: // Fn = Fx * Fy
+ case 0x30: // Fn = Fx * Fy
REG_USED(desc, rx);
REG_USED(desc, ry);
REG_MODIFIED(desc, rn);
@@ -1531,48 +1531,48 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, UINT64 opcode)
break;
}
- case 2: // shifter operations
+ case 2: // shifter operations
{
switch (operation)
{
- case 0x00: // Rn = LSHIFT Rx BY Ry | <data8>
- case 0x04: // Rn = ASHIFT Rx BY Ry | <data8>
- case 0x08: // Rn = ROT Rx BY Ry | <data8>
- case 0xc4: // Rn = BCLR Rx BY Ry | <data8>
- case 0xc0: // Rn = BSET Rx BY Ry | <data8>
- case 0x44: // Rn = FDEP Rx BY Ry | <bit6>:<len6>
- case 0x4c: // Rn = FDEP Rx BY Ry | <bit6>:<len6> (SE)
- case 0x40: // Rn = FEXT Rx BY Ry | <bit6>:<len6>
- case 0x48: // Rn = FEXT Rx BY Ry | <bit6>:<len6> (SE)
+ case 0x00: // Rn = LSHIFT Rx BY Ry | <data8>
+ case 0x04: // Rn = ASHIFT Rx BY Ry | <data8>
+ case 0x08: // Rn = ROT Rx BY Ry | <data8>
+ case 0xc4: // Rn = BCLR Rx BY Ry | <data8>
+ case 0xc0: // Rn = BSET Rx BY Ry | <data8>
+ case 0x44: // Rn = FDEP Rx BY Ry | <bit6>:<len6>
+ case 0x4c: // Rn = FDEP Rx BY Ry | <bit6>:<len6> (SE)
+ case 0x40: // Rn = FEXT Rx BY Ry | <bit6>:<len6>
+ case 0x48: // Rn = FEXT Rx BY Ry | <bit6>:<len6> (SE)
REG_USED(desc, rx);
REG_USED(desc, ry);
REG_MODIFIED(desc, rn);
SHIFT_FLAGS_MODIFIED(desc);
break;
- case 0x20: // Rn = Rn OR LSHIFT Rx BY Ry | <data8>
- case 0x24: // Rn = Rn OR ASHIFT Rx BY Ry | <data8>
- case 0x64: // Rn = Rn OR FDEP Rx BY Ry | <bit6>:<len6>
- case 0x6c: // Rn = Rn OR FDEP Rx BY Ry | <bit6>:<len6> (SE)
+ case 0x20: // Rn = Rn OR LSHIFT Rx BY Ry | <data8>
+ case 0x24: // Rn = Rn OR ASHIFT Rx BY Ry | <data8>
+ case 0x64: // Rn = Rn OR FDEP Rx BY Ry | <bit6>:<len6>
+ case 0x6c: // Rn = Rn OR FDEP Rx BY Ry | <bit6>:<len6> (SE)
REG_USED(desc, rx);
REG_USED(desc, ry);
REG_USED(desc, rn);
REG_MODIFIED(desc, rn);
SHIFT_FLAGS_MODIFIED(desc);
break;
-
- case 0xcc: // BTST Rx BY Ry | <data8>
+
+ case 0xcc: // BTST Rx BY Ry | <data8>
REG_USED(desc, rx);
REG_USED(desc, ry);
SHIFT_FLAGS_MODIFIED(desc);
break;
-
- case 0x80: // Rn = EXP Rx
- case 0x84: // Rn = EXP Rx (EX)
- case 0x88: // Rn = LEFTZ Rx
- case 0x8c: // Rn = LEFTO Rx
- case 0x90: // Rn = FPACK Fx
- case 0x94: // Fn = FUNPACK Rx
+
+ case 0x80: // Rn = EXP Rx
+ case 0x84: // Rn = EXP Rx (EX)
+ case 0x88: // Rn = LEFTZ Rx
+ case 0x8c: // Rn = LEFTO Rx
+ case 0x90: // Rn = FPACK Fx
+ case 0x94: // Fn = FUNPACK Rx
REG_USED(desc, rx);
REG_MODIFIED(desc, rn);
SHIFT_FLAGS_MODIFIED(desc);
@@ -1657,34 +1657,34 @@ bool sharc_frontend::describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCES
PM_B_MODIFIED(desc, reg & 7);
break;
- case 0x60: // FADDR
+ case 0x60: // FADDR
break;
- case 0x61: // DADDR
+ case 0x61: // DADDR
break;
- case 0x63: // PC
+ case 0x63: // PC
break;
- case 0x64: // PCSTK
+ case 0x64: // PCSTK
break;
- case 0x65: // PCSTKP
+ case 0x65: // PCSTKP
break;
- case 0x66: // LADDR
+ case 0x66: // LADDR
break;
- case 0x67: // CURLCNTR
+ case 0x67: // CURLCNTR
break;
- case 0x68: // LCNTR
+ case 0x68: // LCNTR
break;
- case 0x70: // USTAT1
+ case 0x70: // USTAT1
break;
- case 0x71: // USTAT2
+ case 0x71: // USTAT2
break;
- case 0x79: // IRPTL
+ case 0x79: // IRPTL
break;
- case 0x7a: // MODE1
+ case 0x7a: // MODE1
break;
- case 0x7b: // MODE2
+ case 0x7b: // MODE2
break;
- case 0x7c: // ASTAT
+ case 0x7c: // ASTAT
if (access == UREG_READ)
{
AZ_USED(desc);
@@ -1713,17 +1713,17 @@ bool sharc_frontend::describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCES
}
break;
- case 0x7d: // IMASK
+ case 0x7d: // IMASK
break;
- case 0x7e: // STKY
+ case 0x7e: // STKY
break;
- case 0x7f: // IMASKP
+ case 0x7f: // IMASKP
break;
- case 0xdb: // PX
+ case 0xdb: // PX
break;
- case 0xdc: // PX1
+ case 0xdc: // PX1
break;
- case 0xdd: // PX2
+ case 0xdd: // PX2
break;
default:
@@ -1738,31 +1738,31 @@ bool sharc_frontend::describe_shiftop_imm(opcode_desc &desc, int shiftop, int rn
{
switch (shiftop)
{
- case 0x00: // LSHIFT Rx BY <data8>
- case 0x01: // ASHIFT Rx BY <data8>
- case 0x02: // ROT Rx BY <data8>
- case 0x10: // FEXT Rx BY <data8>
- case 0x11: // FDEP Rx BY <data8>
- case 0x12: // FEXT Rx BY <bit6>:<len6> (SE)
- case 0x13: // FDEP Rx BY <bit6>:<len6> (SE)
- case 0x30: // BSET Rx BY <data8>
- case 0x31: // BCLR Rx By <data8>
- case 0x32: // BTGL Rx BY <data8>
+ case 0x00: // LSHIFT Rx BY <data8>
+ case 0x01: // ASHIFT Rx BY <data8>
+ case 0x02: // ROT Rx BY <data8>
+ case 0x10: // FEXT Rx BY <data8>
+ case 0x11: // FDEP Rx BY <data8>
+ case 0x12: // FEXT Rx BY <bit6>:<len6> (SE)
+ case 0x13: // FDEP Rx BY <bit6>:<len6> (SE)
+ case 0x30: // BSET Rx BY <data8>
+ case 0x31: // BCLR Rx By <data8>
+ case 0x32: // BTGL Rx BY <data8>
REG_USED(desc, rx);
REG_MODIFIED(desc, rn);
SHIFT_FLAGS_MODIFIED(desc);
break;
- case 0x08: // Rn = Rn OR LSHIFT Rx BY <data8>
- case 0x19: // Rn = Rn OR FDEP Rx BY <bit6>:<len6>
- case 0x1b: // Rn = Rn OR FDEP Rx BY <bit6>:<len6> (SE)
+ case 0x08: // Rn = Rn OR LSHIFT Rx BY <data8>
+ case 0x19: // Rn = Rn OR FDEP Rx BY <bit6>:<len6>
+ case 0x1b: // Rn = Rn OR FDEP Rx BY <bit6>:<len6> (SE)
REG_USED(desc, rx);
REG_USED(desc, rn);
REG_MODIFIED(desc, rn);
SHIFT_FLAGS_MODIFIED(desc);
break;
- case 0x33: // BTST Rx BY <data8>
+ case 0x33: // BTST Rx BY <data8>
REG_USED(desc, rx);
SHIFT_FLAGS_MODIFIED(desc);
break;
@@ -1800,4 +1800,4 @@ void sharc_frontend::describe_if_condition(opcode_desc &desc, int condition)
case 0x18: SZ_USED(desc); break; /* NOT SZ */
case 0x1d: BTF_USED(desc); break; /* NOT TF */
}
-} \ No newline at end of file
+}