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path: root/src/devices/cpu/sh4/sh4tmu.cpp
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Diffstat (limited to 'src/devices/cpu/sh4/sh4tmu.cpp')
-rw-r--r--src/devices/cpu/sh4/sh4tmu.cpp66
1 files changed, 33 insertions, 33 deletions
diff --git a/src/devices/cpu/sh4/sh4tmu.cpp b/src/devices/cpu/sh4/sh4tmu.cpp
index 46044de0f09..4735b8bba67 100644
--- a/src/devices/cpu/sh4/sh4tmu.cpp
+++ b/src/devices/cpu/sh4/sh4tmu.cpp
@@ -16,25 +16,25 @@ static const int tcnt_div[8] = { 4, 16, 64, 256, 1024, 1, 1, 1 };
a (constant+1) where 0 <= constant < 2^32
-------------------------------------------------*/
-static inline attotime sh4_scale_up_mame_time(const attotime &_time1, UINT32 factor1)
+static inline attotime sh4_scale_up_mame_time(const attotime &_time1, uint32_t factor1)
{
return _time1 * factor1 + _time1;
}
-static UINT32 compute_ticks_timer(emu_timer *timer, int hertz, int divisor)
+static uint32_t compute_ticks_timer(emu_timer *timer, int hertz, int divisor)
{
double ret;
ret=((timer->remaining().as_double() * (double)hertz) / (double)divisor) - 1;
- return (UINT32)ret;
+ return (uint32_t)ret;
}
void sh34_base_device::sh4_timer_recompute(int which)
{
double ticks;
- UINT32 tcnt = 0;
- UINT32 tcr = 0;
+ uint32_t tcnt = 0;
+ uint32_t tcr = 0;
switch (which)
{
case 0:
@@ -126,7 +126,7 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_timer_callback )
}
-UINT32 sh34_base_device::sh4_handle_tcnt0_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcnt0_addr_r(uint32_t mem_mask)
{
if (m_SH4_TSTR & 1)
return compute_ticks_timer(m_timer[0], m_pm_clock, tcnt_div[m_SH4_TCR0 & 7]);
@@ -134,7 +134,7 @@ UINT32 sh34_base_device::sh4_handle_tcnt0_addr_r(UINT32 mem_mask)
return m_SH4_TCNT0;
}
-UINT32 sh34_base_device::sh4_handle_tcnt1_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcnt1_addr_r(uint32_t mem_mask)
{
if (m_SH4_TSTR & 2)
return compute_ticks_timer(m_timer[1], m_pm_clock, tcnt_div[m_SH4_TCR1 & 7]);
@@ -142,7 +142,7 @@ UINT32 sh34_base_device::sh4_handle_tcnt1_addr_r(UINT32 mem_mask)
return m_SH4_TCNT1;
}
-UINT32 sh34_base_device::sh4_handle_tcnt2_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcnt2_addr_r(uint32_t mem_mask)
{
if (m_SH4_TSTR & 4)
return compute_ticks_timer(m_timer[2], m_pm_clock, tcnt_div[m_SH4_TCR2 & 7]);
@@ -150,55 +150,55 @@ UINT32 sh34_base_device::sh4_handle_tcnt2_addr_r(UINT32 mem_mask)
return m_SH4_TCNT2;
}
-UINT32 sh34_base_device::sh4_handle_tcor0_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcor0_addr_r(uint32_t mem_mask)
{
return m_SH4_TCOR0;
}
-UINT32 sh34_base_device::sh4_handle_tcor1_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcor1_addr_r(uint32_t mem_mask)
{
return m_SH4_TCOR1;
}
-UINT32 sh34_base_device::sh4_handle_tcor2_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcor2_addr_r(uint32_t mem_mask)
{
return m_SH4_TCOR2;
}
-UINT32 sh34_base_device::sh4_handle_tcr0_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcr0_addr_r(uint32_t mem_mask)
{
return m_SH4_TCR0;
}
-UINT32 sh34_base_device::sh4_handle_tcr1_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcr1_addr_r(uint32_t mem_mask)
{
return m_SH4_TCR1;
}
-UINT32 sh34_base_device::sh4_handle_tcr2_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcr2_addr_r(uint32_t mem_mask)
{
return m_SH4_TCR2;
}
-UINT32 sh34_base_device::sh4_handle_tstr_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tstr_addr_r(uint32_t mem_mask)
{
return m_SH4_TSTR;
}
-UINT32 sh34_base_device::sh4_handle_tocr_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tocr_addr_r(uint32_t mem_mask)
{
return m_SH4_TOCR;
}
-UINT32 sh34_base_device::sh4_handle_tcpr2_addr_r(UINT32 mem_mask)
+uint32_t sh34_base_device::sh4_handle_tcpr2_addr_r(uint32_t mem_mask)
{
return m_SH4_TCPR2;
}
-void sh34_base_device::sh4_handle_tstr_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tstr_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old2 = m_SH4_TSTR;
+ uint32_t old2 = m_SH4_TSTR;
COMBINE_DATA(&m_SH4_TSTR);
if (old2 & 1)
@@ -223,9 +223,9 @@ void sh34_base_device::sh4_handle_tstr_addr_w(UINT32 data, UINT32 mem_mask)
sh4_timer_recompute(2);
}
-void sh34_base_device::sh4_handle_tcr0_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcr0_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old2 = m_SH4_TCR0;
+ uint32_t old2 = m_SH4_TCR0;
COMBINE_DATA(&m_SH4_TCR0);
if (m_SH4_TSTR & 1)
{
@@ -236,9 +236,9 @@ void sh34_base_device::sh4_handle_tcr0_addr_w(UINT32 data, UINT32 mem_mask)
sh4_exception_unrequest(SH4_INTC_TUNI0);
}
-void sh34_base_device::sh4_handle_tcr1_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcr1_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old2 = m_SH4_TCR1;
+ uint32_t old2 = m_SH4_TCR1;
COMBINE_DATA(&m_SH4_TCR1);
if (m_SH4_TSTR & 2)
{
@@ -249,9 +249,9 @@ void sh34_base_device::sh4_handle_tcr1_addr_w(UINT32 data, UINT32 mem_mask)
sh4_exception_unrequest(SH4_INTC_TUNI1);
}
-void sh34_base_device::sh4_handle_tcr2_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcr2_addr_w(uint32_t data, uint32_t mem_mask)
{
- UINT32 old2 = m_SH4_TCR2;
+ uint32_t old2 = m_SH4_TCR2;
COMBINE_DATA(&m_SH4_TCR2);
if (m_SH4_TSTR & 4)
{
@@ -262,7 +262,7 @@ void sh34_base_device::sh4_handle_tcr2_addr_w(UINT32 data, UINT32 mem_mask)
sh4_exception_unrequest(SH4_INTC_TUNI2);
}
-void sh34_base_device::sh4_handle_tcor0_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcor0_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCOR0);
if (m_SH4_TSTR & 1)
@@ -272,7 +272,7 @@ void sh34_base_device::sh4_handle_tcor0_addr_w(UINT32 data, UINT32 mem_mask)
}
}
-void sh34_base_device::sh4_handle_tcor1_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcor1_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCOR1);
if (m_SH4_TSTR & 2)
@@ -282,7 +282,7 @@ void sh34_base_device::sh4_handle_tcor1_addr_w(UINT32 data, UINT32 mem_mask)
}
}
-void sh34_base_device::sh4_handle_tcor2_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcor2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCOR2);
if (m_SH4_TSTR & 4)
@@ -292,33 +292,33 @@ void sh34_base_device::sh4_handle_tcor2_addr_w(UINT32 data, UINT32 mem_mask)
}
}
-void sh34_base_device::sh4_handle_tcnt0_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcnt0_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCNT0);
if (m_SH4_TSTR & 1)
sh4_timer_recompute(0);
}
-void sh34_base_device::sh4_handle_tcnt1_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcnt1_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCNT1);
if (m_SH4_TSTR & 2)
sh4_timer_recompute(1);
}
-void sh34_base_device::sh4_handle_tcnt2_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcnt2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCNT2);
if (m_SH4_TSTR & 4)
sh4_timer_recompute(2);
}
-void sh34_base_device::sh4_handle_tocr_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tocr_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TOCR);
}
-void sh34_base_device::sh4_handle_tcpr2_addr_w(UINT32 data, UINT32 mem_mask)
+void sh34_base_device::sh4_handle_tcpr2_addr_w(uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(&m_SH4_TCPR2);
}