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path: root/src/devices/cpu/sh/sh_dasm.cpp
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Diffstat (limited to 'src/devices/cpu/sh/sh_dasm.cpp')
-rw-r--r--src/devices/cpu/sh/sh_dasm.cpp73
1 files changed, 41 insertions, 32 deletions
diff --git a/src/devices/cpu/sh/sh_dasm.cpp b/src/devices/cpu/sh/sh_dasm.cpp
index a2e6dd67496..016d3022708 100644
--- a/src/devices/cpu/sh/sh_dasm.cpp
+++ b/src/devices/cpu/sh/sh_dasm.cpp
@@ -3,12 +3,11 @@
#include "emu.h"
#include "sh_dasm.h"
-#define SIGNX8(x) (((int32_t)(x) << 24) >> 24)
-#define SIGNX12(x) (((int32_t)(x) << 20) >> 20)
#define Rn ((opcode>>8)&15)
#define Rm ((opcode>>4)&15)
-const char *const sh_disassembler::regname[16] = {
+const char *const sh_disassembler::regname[16] =
+{
"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
"R8", "R9", "R10","R11","R12","R13","R14",
// The old SH2 dasm used 'SP' here, the old SH4 used 'R15'
@@ -19,7 +18,7 @@ const char *const sh_disassembler::regname[16] = {
uint32_t sh_disassembler::op0000(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
uint32_t flags = 0;
- switch(opcode & 0x3f)
+ switch (opcode & 0x3f)
{
case 0x02:
util::stream_format(stream, "STC SR,%s", regname[Rn]);
@@ -38,7 +37,7 @@ uint32_t sh_disassembler::op0000(std::ostream &stream, uint32_t pc, uint16_t opc
break;
case 0x0B:
stream << "RTS";
- flags = STEP_OUT;
+ flags = STEP_OUT | step_over_extra(1);
break;
case 0x12:
util::stream_format(stream, "STS GBR,%s", regname[Rn]);
@@ -72,10 +71,10 @@ uint32_t sh_disassembler::op0000(std::ostream &stream, uint32_t pc, uint16_t opc
break;
case 0x2B:
stream << "RTE";
- flags = STEP_OUT;
+ flags = STEP_OUT | step_over_extra(1);
break;
default:
- switch(opcode & 15)
+ switch (opcode & 15)
{
case 0:
util::stream_format(stream, "?????? $%04X", opcode);
@@ -123,7 +122,7 @@ uint32_t sh_disassembler::op0000(std::ostream &stream, uint32_t pc, uint16_t opc
util::stream_format(stream, "MOV.L @(R0,%s),%s", regname[Rm], regname[Rn]);
break;
case 15:
- util::stream_format(stream, "MAC.L @%s+,@%s+", regname[Rn], regname[Rm]);
+ util::stream_format(stream, "MAC.L @%s+,@%s+", regname[Rm], regname[Rn]);
break;
}
}
@@ -251,7 +250,7 @@ uint32_t sh_disassembler::op0011(std::ostream &stream, uint32_t pc, uint16_t opc
uint32_t sh_disassembler::op0100(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
uint32_t flags = 0;
- switch(opcode & 0x3F)
+ switch (opcode & 0x3F)
{
case 0x00:
util::stream_format(stream, "SHLL %s", regname[Rn]);
@@ -386,7 +385,7 @@ uint32_t sh_disassembler::op0101(std::ostream &stream, uint32_t pc, uint16_t opc
uint32_t sh_disassembler::op0110(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
- switch(opcode & 0xF)
+ switch (opcode & 0xF)
{
case 0x00:
util::stream_format(stream, "MOV.B @%s,%s", regname[Rm], regname[Rn]);
@@ -448,7 +447,7 @@ uint32_t sh_disassembler::op0111(std::ostream &stream, uint32_t pc, uint16_t opc
uint32_t sh_disassembler::op1000(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
- switch((opcode >> 8) & 15)
+ switch ((opcode >> 8) & 15)
{
case 0:
util::stream_format(stream, "MOV.B R0,@($%02X,%s)", (opcode & 15), regname[Rm]);
@@ -466,17 +465,17 @@ uint32_t sh_disassembler::op1000(std::ostream &stream, uint32_t pc, uint16_t opc
util::stream_format(stream, "CMP/EQ #$%02X,R0", (opcode & 0xff));
break;
case 9:
- util::stream_format(stream, "BT $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2);
- break;
+ util::stream_format(stream, "BT $%08X", pc + int8_t(opcode & 0xff) * 2 + 2);
+ return STEP_COND;
case 11:
- util::stream_format(stream, "BF $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2);
- break;
+ util::stream_format(stream, "BF $%08X", pc + int8_t(opcode & 0xff) * 2 + 2);
+ return STEP_COND;
case 13:
- util::stream_format(stream, "BTS $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2);
- break;
+ util::stream_format(stream, "BTS $%08X", pc + int8_t(opcode & 0xff) * 2 + 2);
+ return STEP_COND | step_over_extra(1);
case 15:
- util::stream_format(stream, "BFS $%08X", pc + SIGNX8(opcode & 0xff) * 2 + 2);
- break;
+ util::stream_format(stream, "BFS $%08X", pc + int8_t(opcode & 0xff) * 2 + 2);
+ return STEP_COND | step_over_extra(1);
default :
util::stream_format(stream, "invalid $%04X", opcode);
}
@@ -491,20 +490,20 @@ uint32_t sh_disassembler::op1001(std::ostream &stream, uint32_t pc, uint16_t opc
uint32_t sh_disassembler::op1010(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
- util::stream_format(stream, "BRA $%08X", SIGNX12(opcode & 0xfff) * 2 + pc + 2);
+ util::stream_format(stream, "BRA $%08X", util::sext(opcode & 0xfff, 12) * 2 + pc + 2);
return 0;
}
uint32_t sh_disassembler::op1011(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
- util::stream_format(stream, "BSR $%08X", SIGNX12(opcode & 0xfff) * 2 + pc + 2);
+ util::stream_format(stream, "BSR $%08X", util::sext(opcode & 0xfff, 12) * 2 + pc + 2);
return STEP_OVER | step_over_extra(1);
}
uint32_t sh_disassembler::op1100(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
uint32_t flags = 0;
- switch((opcode >> 8) & 15)
+ switch ((opcode >> 8) & 15)
{
case 0:
util::stream_format(stream, "MOV.B R0,@($%02X,GBR)", opcode & 0xff);
@@ -591,7 +590,8 @@ uint32_t sh_disassembler::op0000_sh34(std::ostream &stream, uint32_t pc, uint16_
util::stream_format(stream, "?????? $%04X", opcode);
break;
case 0x2:
- if (opcode & 0x80) {
+ if (opcode & 0x80)
+ {
util::stream_format(stream, "STC %s_BANK,%s", regname[(Rm) & 7], regname[Rn]);
return flags;
}
@@ -708,14 +708,14 @@ uint32_t sh_disassembler::op0000_sh34(std::ostream &stream, uint32_t pc, uint16_
{
case 0x00:
stream << "RTS";
- flags = STEP_OUT;
+ flags = STEP_OUT | step_over_extra(1);
break;
case 0x10:
stream << "SLEEP";
break;
case 0x20:
stream << "RTE";
- flags = STEP_OUT;
+ flags = STEP_OUT | step_over_extra(1);
break;
}
break;
@@ -796,7 +796,8 @@ uint32_t sh_disassembler::op0100_sh34(std::ostream &stream, uint32_t pc, uint16_
}
break;
case 0x3:
- if (opcode & 0x80) {
+ if (opcode & 0x80)
+ {
util::stream_format(stream, "STC.L %s_BANK,@-%s", regname[(Rm) & 7],regname[Rn]);
return flags;
}
@@ -868,7 +869,8 @@ uint32_t sh_disassembler::op0100_sh34(std::ostream &stream, uint32_t pc, uint16_
}
break;
case 0x7:
- if (opcode & 0x80) {
+ if (opcode & 0x80)
+ {
util::stream_format(stream, "LDC.L @%s+,%s_BANK", regname[Rn],regname[(Rm) & 7]);
return flags;
}
@@ -964,7 +966,8 @@ uint32_t sh_disassembler::op0100_sh34(std::ostream &stream, uint32_t pc, uint16_
util::stream_format(stream, "SHLD %s,%s", regname[Rm], regname[Rn]);
break;
case 0xE:
- if (opcode & 0x80) {
+ if (opcode & 0x80)
+ {
util::stream_format(stream, "LDC %s,%s_BANK", regname[Rn],regname[(Rm) & 7]);
return flags;
}
@@ -1081,8 +1084,10 @@ uint32_t sh_disassembler::op1111_sh34(std::ostream &stream, uint32_t pc, uint16_
util::stream_format(stream, "FIPR FV%d, FV%d", (Rn & 3) << 2, Rn & 12);
break;
case 0xF0:
- if (opcode & 0x100) {
- if (opcode & 0x200) {
+ if (opcode & 0x100)
+ {
+ if (opcode & 0x200)
+ {
switch (opcode & 0xC00)
{
case 0x000:
@@ -1095,10 +1100,14 @@ uint32_t sh_disassembler::op1111_sh34(std::ostream &stream, uint32_t pc, uint16_
util::stream_format(stream, "Funknown $%04X", opcode);
break;
}
- } else {
+ }
+ else
+ {
util::stream_format(stream, "FTRV XMTRX, FV%d", Rn & 12);
}
- } else {
+ }
+ else
+ {
util::stream_format(stream, "FSCA FPUL, F%s", regname[Rn & 14]);
}
break;