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Diffstat (limited to 'src/devices/cpu/sh/sh4.h')
-rw-r--r--src/devices/cpu/sh/sh4.h36
1 files changed, 17 insertions, 19 deletions
diff --git a/src/devices/cpu/sh/sh4.h b/src/devices/cpu/sh/sh4.h
index 87fe2e84f70..e344a42385e 100644
--- a/src/devices/cpu/sh/sh4.h
+++ b/src/devices/cpu/sh/sh4.h
@@ -2,7 +2,7 @@
// copyright-holders:R. Belmont
/*****************************************************************************
*
- * sh4->h
+ * sh4.h
* Portable Hitachi SH-4 (SH7750 family) emulator interface
*
* By R. Belmont, based on sh2.c by Juergen Buchmueller, Mariusz Wojcieszek,
@@ -168,10 +168,10 @@ public:
void set_mmu_hacktype(int hacktype) { m_mmuhack = hacktype; }
- TIMER_CALLBACK_MEMBER( sh4_refresh_timer_callback );
- TIMER_CALLBACK_MEMBER( sh4_rtc_timer_callback );
- TIMER_CALLBACK_MEMBER( sh4_timer_callback );
- TIMER_CALLBACK_MEMBER( sh4_dmac_callback );
+ TIMER_CALLBACK_MEMBER(sh4_refresh_timer_callback);
+ TIMER_CALLBACK_MEMBER(sh4_rtc_timer_callback);
+ TIMER_CALLBACK_MEMBER(sh4_timer_callback);
+ TIMER_CALLBACK_MEMBER(sh4_dmac_callback);
virtual void set_frt_input(int state) override;
void sh4_set_irln_input(int value);
@@ -288,7 +288,7 @@ protected:
int m_md[9];
int m_clock;
- // hack 1 = Naomi hack, hack 2 = Work in Progress implementation
+ // hack 1 = Naomi hack, hack 2 = WIP implementation
int m_mmuhack;
uint32_t m_exception_priority[128];
@@ -377,8 +377,7 @@ protected:
//void (*m_ftcsr_read_callback)(uint32_t data);
- /* This MMU simulation is good for the simple remap used on Naomi GD-ROM SQ access *ONLY* */
- uint8_t m_sh4_mmu_enabled;
+ bool m_sh4_mmu_enabled;
// sh3 internal
uint32_t m_sh3internal_upper[0x3000/4];
@@ -388,13 +387,11 @@ protected:
inline void sh4_check_pending_irq(const char *message) // look for highest priority active exception and handle it
{
- int a,irq,z;
-
m_willjump = 0; // for the DRC
- irq = 0;
- z = -1;
- for (a=0;a <= SH4_INTC_ROVI;a++)
+ int irq = 0;
+ int z = -1;
+ for (int a = 0; a <= SH4_INTC_ROVI; a++)
{
if (m_exception_requesting[a])
{
@@ -494,12 +491,13 @@ protected:
uint32_t sh4_handle_dmaor_addr_r(uint32_t mem_mask) { return m_SH4_DMAOR; }
// memory handlers
- virtual uint8_t RB(offs_t A) override;
- virtual uint16_t RW(offs_t A) override;
- virtual uint32_t RL(offs_t A) override;
- virtual void WB(offs_t A, uint8_t V) override;
- virtual void WW(offs_t A, uint16_t V) override;
- virtual void WL(offs_t A, uint32_t V) override;
+ virtual uint8_t read_byte(offs_t offset) override;
+ virtual uint16_t read_word(offs_t offset) override;
+ virtual uint32_t read_long(offs_t offset) override;
+ virtual uint16_t decrypted_read_word(offs_t offset) override;
+ virtual void write_byte(offs_t offset, uint8_t data) override;
+ virtual void write_word(offs_t offset, uint16_t data) override;
+ virtual void write_long(offs_t offset, uint32_t data) override;
// regular handlers for opcodes which need to differ on sh3/4 due to different interrupt / exception handling and register banking
virtual void LDCSR(const uint16_t opcode) override;