diff options
Diffstat (limited to 'src/devices/cpu/psx/dma.cpp')
-rw-r--r-- | src/devices/cpu/psx/dma.cpp | 102 |
1 files changed, 42 insertions, 60 deletions
diff --git a/src/devices/cpu/psx/dma.cpp b/src/devices/cpu/psx/dma.cpp index 36078c5b499..64bb8f1c71e 100644 --- a/src/devices/cpu/psx/dma.cpp +++ b/src/devices/cpu/psx/dma.cpp @@ -10,20 +10,11 @@ #include "emu.h" #include "dma.h" -#define VERBOSE_LEVEL ( 0 ) +#define LOG_CONTROL (1U << 1) +#define LOG_INTERRUPT (1U << 2) -static inline void ATTR_PRINTF(3,4) verboselog( device_t& device, int n_level, const char *s_fmt, ... ) -{ - if( VERBOSE_LEVEL >= n_level ) - { - va_list v; - char buf[ 32768 ]; - va_start( v, s_fmt ); - vsprintf( buf, s_fmt, v ); - va_end( v ); - device.logerror( "%s: %s", device.machine().describe_context(), buf ); - } -} +#define VERBOSE (0) +#include "logmacro.h" DEFINE_DEVICE_TYPE(PSX_DMA, psxdma_device, "psxdma", "Sony PSX DMA") @@ -35,36 +26,33 @@ psxdma_device::psxdma_device(const machine_config &mconfig, const char *tag, dev void psxdma_device::device_reset() { - int n; - m_dpcp = 0; m_dicr = 0; - for( n = 0; n < 7; n++ ) + for (int n = 0; n < 7; n++) { - dma_stop_timer( n ); + // FIXME: proper reset values + m_channel[n].n_channelcontrol = 0; + m_channel[n].b_running = 0; + dma_stop_timer(n); } } void psxdma_device::device_post_load() { - int n; - - for( n = 0; n < 7; n++ ) + for (int n = 0; n < 7; n++) { - dma_timer_adjust( n ); + dma_timer_adjust(n); } } void psxdma_device::device_start() { - m_irq_handler.resolve_safe(); - for( int index = 0; index < 7; index++ ) { psx_dma_channel *dma = &m_channel[ index ]; - dma->timer = timer_alloc(index); + dma->timer = timer_alloc( FUNC( psxdma_device::dma_finished ), this ); save_item( NAME( dma->n_base ), index ); save_item( NAME( dma->n_blockcontrol ), index ); @@ -90,7 +78,7 @@ void psxdma_device::dma_stop_timer( int index ) { psx_dma_channel *dma = &m_channel[ index ]; - dma->timer->adjust( attotime::never); + dma->timer->adjust(attotime::never); dma->b_running = 0; } @@ -118,19 +106,20 @@ void psxdma_device::dma_interrupt_update() if( ( n_mask & 0x80 ) != 0 && ( n_int & n_mask ) != 0 ) { - verboselog( *this, 2, "dma_interrupt_update( %02x, %02x ) interrupt triggered\n", n_int, n_mask ); + LOGMASKED( LOG_INTERRUPT, "dma_interrupt_update( %02x, %02x ) interrupt triggered\n", machine().describe_context(), n_int, n_mask ); m_dicr |= 0x80000000; m_irq_handler(1); } else if( n_int != 0 ) { - verboselog( *this, 2, "dma_interrupt_update( %02x, %02x ) interrupt not enabled\n", n_int, n_mask ); + LOGMASKED( LOG_INTERRUPT, "dma_interrupt_update( %02x, %02x ) interrupt not enabled\n", machine().describe_context(), n_int, n_mask ); } m_dicr &= 0x00ffffff | ( m_dicr << 8 ); } -void psxdma_device::dma_finished( int index ) +TIMER_CALLBACK_MEMBER( psxdma_device::dma_finished ) { + const int index = param; psx_dma_channel *dma = &m_channel[ index ]; if( dma->n_channelcontrol == 0x01000401 && index == 2 ) @@ -196,11 +185,6 @@ void psxdma_device::dma_finished( int index ) dma_stop_timer( index ); } -void psxdma_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) -{ - dma_finished(id); -} - void psxdma_device::install_read_handler( int index, read_delegate p_fn_dma_read ) { m_channel[ index ].fn_read = p_fn_dma_read; @@ -221,15 +205,15 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) switch( offset % 4 ) { case 0: - verboselog( *this, 2, "dmabase( %d ) = %08x\n", index, data ); + LOGMASKED( LOG_CONTROL, "%s: dmabase( %d ) = %08x\n", machine().describe_context(), index, data ); dma->n_base = data; break; case 1: - verboselog( *this, 2, "dmablockcontrol( %d ) = %08x\n", index, data ); + LOGMASKED( LOG_CONTROL, "%s: dmablockcontrol( %d ) = %08x\n", machine().describe_context(), index, data ); dma->n_blockcontrol = data; break; case 2: - verboselog( *this, 2, "dmachannelcontrol( %d ) = %08x\n", index, data ); + LOGMASKED( LOG_CONTROL, "%s: dmachannelcontrol( %d ) = %08x\n", machine().describe_context(), index, data ); dma->n_channelcontrol = data; if( ( dma->n_channelcontrol & ( 1L << 0x18 ) ) != 0 && ( m_dpcp & ( 1 << ( 3 + ( index * 4 ) ) ) ) != 0 ) { @@ -256,14 +240,14 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) if( dma->n_channelcontrol == 0x01000000 && !dma->fn_read.isnull() ) { - verboselog( *this, 1, "dma %d read block %08x %08x\n", index, n_address, n_size ); + LOG( "%s: dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size ); dma->fn_read( m_ram, n_address, n_size ); dma_finished( index ); } else if ((dma->n_channelcontrol & 0xffbffeff) == 0x11000000 && // CD DMA !dma->fn_read.isnull() ) { - verboselog( *this, 1, "dma %d read block %08x %08x\n", index, n_address, n_size ); + LOG( "%s: dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size ); // pSX's CD DMA size calc formula int oursize = (dma->n_blockcontrol>>16); @@ -276,7 +260,7 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) else if( dma->n_channelcontrol == 0x01000200 && !dma->fn_read.isnull() ) { - verboselog( *this, 1, "dma %d read block %08x %08x\n", index, n_address, n_size ); + LOG( "%s: dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size ); dma->fn_read( m_ram, n_address, n_size ); if( index == 1 ) { @@ -290,7 +274,7 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) else if( dma->n_channelcontrol == 0x01000201 && !dma->fn_write.isnull() ) { - verboselog( *this, 1, "dma %d write block %08x %08x\n", index, n_address, n_size ); + LOG( "%s: dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size ); dma->fn_write( m_ram, n_address, n_size ); dma_finished( index ); } @@ -298,7 +282,7 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) !dma->fn_write.isnull() ) { /* todo: check this is a write not a read... */ - verboselog( *this, 1, "dma %d write block %08x %08x\n", index, n_address, n_size ); + LOG( "%s: dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size ); dma->fn_write( m_ram, n_address, n_size ); dma_finished( index ); } @@ -306,7 +290,7 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) !dma->fn_write.isnull() ) { /* todo: check this is a write not a read... */ - verboselog( *this, 1, "dma %d write block %08x %08x\n", index, n_address, n_size ); + LOG( "%s: dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size ); dma->fn_write( m_ram, n_address, n_size ); dma_finished( index ); } @@ -314,16 +298,14 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) index == 2 && !dma->fn_write.isnull() ) { - verboselog( *this, 1, "dma %d write linked list %08x\n", - index, dma->n_base ); + LOG( "%s: dma %d write linked list %08x\n", machine().describe_context(), index, dma->n_base ); dma_finished( index ); } else if( dma->n_channelcontrol == 0x11000002 && index == 6 ) { - verboselog( *this, 1, "dma 6 reverse clear %08x %08x\n", - dma->n_base, dma->n_blockcontrol ); + LOG( "%s: dma 6 reverse clear %08x %08x\n", machine().describe_context(), dma->n_base, dma->n_blockcontrol ); if( n_size > 0 ) { n_size--; @@ -340,16 +322,16 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) } else { - verboselog( *this, 1, "dma %d unknown mode %08x\n", index, dma->n_channelcontrol ); + LOG( "%s: dma %d unknown mode %08x\n", machine().describe_context(), index, dma->n_channelcontrol ); } } else if( dma->n_channelcontrol != 0 ) { - verboselog( *this, 1, "psx_dma_w( %04x, %08x, %08x ) channel not enabled\n", offset, dma->n_channelcontrol, mem_mask ); + LOG( "%s: psx_dma_w( %04x, %08x, %08x ) channel not enabled\n", machine().describe_context(), offset, dma->n_channelcontrol, mem_mask ); } break; default: - verboselog( *this, 1, "psx_dma_w( %04x, %08x, %08x ) Unknown dma channel register\n", offset, data, mem_mask ); + LOG( "%s: psx_dma_w( %04x, %08x, %08x ) Unknown dma channel register\n", machine().describe_context(), offset, data, mem_mask ); break; } } @@ -358,7 +340,7 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) switch( offset % 4 ) { case 0x0: - verboselog( *this, 1, "psx_dma_w( %04x, %08x, %08x ) dpcp\n", offset, data, mem_mask ); + LOG( "%s: psx_dma_w( %04x, %08x, %08x ) dpcp\n", machine().describe_context(), offset, data, mem_mask ); m_dpcp = ( m_dpcp & ~mem_mask ) | data; break; case 0x1: @@ -369,14 +351,14 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask) if( ( m_dicr & 0x80000000 ) != 0 && ( m_dicr & 0x7f000000 ) == 0 ) { - verboselog( *this, 2, "dma interrupt cleared\n" ); + LOGMASKED( LOG_INTERRUPT, "%s: dma interrupt cleared\n", machine().describe_context() ); m_dicr &= ~0x80000000; } - verboselog( *this, 1, "psx_dma_w( %04x, %08x, %08x ) dicr -> %08x\n", offset, data, mem_mask, m_dicr ); + LOG( "%s: psx_dma_w( %04x, %08x, %08x ) dicr -> %08x\n", machine().describe_context(), offset, data, mem_mask, m_dicr ); break; default: - verboselog( *this, 0, "psx_dma_w( %04x, %08x, %08x ) Unknown dma control register\n", offset, data, mem_mask ); + logerror( "%s: psx_dma_w( %04x, %08x, %08x ) Unknown dma control register\n", machine().describe_context(), offset, data, mem_mask ); break; } } @@ -392,16 +374,16 @@ uint32_t psxdma_device::read(offs_t offset, uint32_t mem_mask) switch( offset % 4 ) { case 0: - verboselog( *this, 1, "psx_dma_r dmabase[ %d ] ( %08x )\n", index, dma->n_base ); + LOG( "%s: psx_dma_r dmabase[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_base ); return dma->n_base; case 1: - verboselog( *this, 1, "psx_dma_r dmablockcontrol[ %d ] ( %08x )\n", index, dma->n_blockcontrol ); + LOG( "%s: psx_dma_r dmablockcontrol[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_blockcontrol ); return dma->n_blockcontrol; case 2: - verboselog( *this, 1, "psx_dma_r dmachannelcontrol[ %d ] ( %08x )\n", index, dma->n_channelcontrol ); + LOG( "%s: psx_dma_r dmachannelcontrol[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_channelcontrol ); return dma->n_channelcontrol; default: - verboselog( *this, 0, "psx_dma_r( %08x, %08x ) Unknown dma channel register\n", offset, mem_mask ); + logerror( "%s: psx_dma_r( %08x, %08x ) Unknown dma channel register\n", machine().describe_context(), offset, mem_mask ); break; } } @@ -410,13 +392,13 @@ uint32_t psxdma_device::read(offs_t offset, uint32_t mem_mask) switch( offset % 4 ) { case 0x0: - verboselog( *this, 1, "psx_dma_r dpcp ( %08x )\n", m_dpcp ); + LOG( "%s: psx_dma_r dpcp ( %08x )\n", machine().describe_context(), m_dpcp ); return m_dpcp; case 0x1: - verboselog( *this, 1, "psx_dma_r dicr ( %08x )\n", m_dicr ); + LOG( "%s: psx_dma_r dicr ( %08x )\n", machine().describe_context(), m_dicr ); return m_dicr; default: - verboselog( *this, 0, "psx_dma_r( %08x, %08x ) Unknown dma control register\n", offset, mem_mask ); + logerror( "%s: psx_dma_r( %08x, %08x ) Unknown dma control register\n", machine().describe_context(), offset, mem_mask ); break; } } |