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Diffstat (limited to 'src/devices/cpu/nec/v25.h')
-rw-r--r--src/devices/cpu/nec/v25.h172
1 files changed, 86 insertions, 86 deletions
diff --git a/src/devices/cpu/nec/v25.h b/src/devices/cpu/nec/v25.h
index f170ad03b8f..28815e16609 100644
--- a/src/devices/cpu/nec/v25.h
+++ b/src/devices/cpu/nec/v25.h
@@ -49,10 +49,10 @@ class v25_common_device : public cpu_device
{
public:
// construction/destruction
- v25_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, bool is_16bit, offs_t fetch_xor, UINT8 prefetch_size, UINT8 prefetch_cycles, UINT32 chip_type);
+ v25_common_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, bool is_16bit, offs_t fetch_xor, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type);
// static configuration helpers
- static void set_decryption_table(device_t &device, const UINT8 *decryption_table) { downcast<v25_common_device &>(device).m_v25v35_decryptiontable = decryption_table; }
+ static void set_decryption_table(device_t &device, const uint8_t *decryption_table) { downcast<v25_common_device &>(device).m_v25v35_decryptiontable = decryption_table; }
template<class _Object> static devcb_base & set_pt_in_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_pt_in.set_callback(object); }
template<class _Object> static devcb_base & set_p0_in_cb(device_t &device, _Object object) { return downcast<v25_common_device &>(device).m_p0_in.set_callback(object); }
@@ -72,12 +72,12 @@ protected:
virtual void device_post_load() override { notify_clock_changed(); }
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return clocks / m_PCK; }
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return cycles * m_PCK; }
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 80; }
- virtual UINT32 execute_input_lines() const override { return 1; }
- virtual UINT32 execute_default_irq_vector() const override { return 0xff; }
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return clocks / m_PCK; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return cycles * m_PCK; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 80; }
+ virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_default_irq_vector() const override { return 0xff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -90,9 +90,9 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 8; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
@@ -101,43 +101,43 @@ private:
/* internal RAM and register banks */
union internalram
{
- UINT16 w[128];
- UINT8 b[256];
+ uint16_t w[128];
+ uint8_t b[256];
};
internalram m_ram;
offs_t m_fetch_xor;
- UINT16 m_ip;
+ uint16_t m_ip;
/* PSW flags */
- INT32 m_SignVal;
- UINT32 m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
- UINT8 m_IBRK, m_F0, m_F1, m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */
- UINT8 m_RBW, m_RBB; /* current register bank base, preshifted for word and byte registers */
+ int32_t m_SignVal;
+ uint32_t m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
+ uint8_t m_IBRK, m_F0, m_F1, m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */
+ uint8_t m_RBW, m_RBB; /* current register bank base, preshifted for word and byte registers */
/* interrupt related */
- UINT32 m_pending_irq;
- UINT32 m_unmasked_irq;
- UINT32 m_bankswitch_irq;
- UINT8 m_priority_inttu, m_priority_intd, m_priority_intp, m_priority_ints0, m_priority_ints1;
- UINT8 m_IRQS, m_ISPR;
- UINT32 m_nmi_state;
- UINT32 m_irq_state;
- UINT32 m_poll_state;
- UINT32 m_mode_state;
- UINT32 m_intp_state[3];
- UINT8 m_no_interrupt;
- UINT8 m_halted;
+ uint32_t m_pending_irq;
+ uint32_t m_unmasked_irq;
+ uint32_t m_bankswitch_irq;
+ uint8_t m_priority_inttu, m_priority_intd, m_priority_intp, m_priority_ints0, m_priority_ints1;
+ uint8_t m_IRQS, m_ISPR;
+ uint32_t m_nmi_state;
+ uint32_t m_irq_state;
+ uint32_t m_poll_state;
+ uint32_t m_mode_state;
+ uint32_t m_intp_state[3];
+ uint8_t m_no_interrupt;
+ uint8_t m_halted;
/* timer related */
- UINT16 m_TM0, m_MD0, m_TM1, m_MD1;
- UINT8 m_TMC0, m_TMC1;
+ uint16_t m_TM0, m_MD0, m_TM1, m_MD1;
+ uint8_t m_TMC0, m_TMC1;
emu_timer *m_timers[4];
/* system control */
- UINT8 m_RAMEN, m_TB, m_PCK; /* PRC register */
- UINT32 m_IDB;
+ uint8_t m_RAMEN, m_TB, m_PCK; /* PRC register */
+ uint32_t m_IDB;
address_space *m_program;
direct_read_data *m_direct;
@@ -154,47 +154,47 @@ union internalram
devcb_write8 m_p1_out;
devcb_write8 m_p2_out;
- UINT8 m_prefetch_size;
- UINT8 m_prefetch_cycles;
- INT8 m_prefetch_count;
- UINT8 m_prefetch_reset;
- UINT32 m_chip_type;
+ uint8_t m_prefetch_size;
+ uint8_t m_prefetch_cycles;
+ int8_t m_prefetch_count;
+ uint8_t m_prefetch_reset;
+ uint32_t m_chip_type;
- UINT32 m_prefix_base; /* base address of the latest prefix segment */
- UINT8 m_seg_prefix; /* prefix segment indicator */
+ uint32_t m_prefix_base; /* base address of the latest prefix segment */
+ uint8_t m_seg_prefix; /* prefix segment indicator */
- UINT32 m_EA;
- UINT16 m_EO;
- UINT16 m_E16;
+ uint32_t m_EA;
+ uint16_t m_EO;
+ uint16_t m_E16;
- UINT32 m_debugger_temp;
+ uint32_t m_debugger_temp;
- const UINT8 *m_v25v35_decryptiontable; // internal decryption table
+ const uint8_t *m_v25v35_decryptiontable; // internal decryption table
typedef void (v25_common_device::*nec_ophandler)();
- typedef UINT32 (v25_common_device::*nec_eahandler)();
+ typedef uint32_t (v25_common_device::*nec_eahandler)();
static const nec_ophandler s_nec_instruction[256];
static const nec_eahandler s_GetEA[192];
inline void prefetch();
void do_prefetch(int previous_ICount);
- inline UINT8 fetch();
- inline UINT16 fetchword();
- inline UINT8 fetchop();
+ inline uint8_t fetch();
+ inline uint16_t fetchword();
+ inline uint8_t fetchop();
void nec_interrupt(unsigned int_num, int /*INTSOURCES*/ source);
void nec_bankswitch(unsigned bank_num);
void nec_trap();
void external_int();
- UINT8 read_irqcontrol(int /*INTSOURCES*/ source, UINT8 priority);
- UINT8 read_sfr(unsigned o);
- UINT16 read_sfr_word(unsigned o);
- void write_irqcontrol(int /*INTSOURCES*/ source, UINT8 d);
- void write_sfr(unsigned o, UINT8 d);
- void write_sfr_word(unsigned o, UINT16 d);
- UINT8 v25_read_byte(unsigned a);
- UINT16 v25_read_word(unsigned a);
- void v25_write_byte(unsigned a, UINT8 d);
- void v25_write_word(unsigned a, UINT16 d);
+ uint8_t read_irqcontrol(int /*INTSOURCES*/ source, uint8_t priority);
+ uint8_t read_sfr(unsigned o);
+ uint16_t read_sfr_word(unsigned o);
+ void write_irqcontrol(int /*INTSOURCES*/ source, uint8_t d);
+ void write_sfr(unsigned o, uint8_t d);
+ void write_sfr_word(unsigned o, uint16_t d);
+ uint8_t v25_read_byte(unsigned a);
+ uint16_t v25_read_word(unsigned a);
+ void v25_write_byte(unsigned a, uint8_t d);
+ void v25_write_word(unsigned a, uint16_t d);
void i_add_br8();
void i_add_wr16();
@@ -446,44 +446,44 @@ union internalram
void i_brkn();
void i_brks();
- UINT32 EA_000();
- UINT32 EA_001();
- UINT32 EA_002();
- UINT32 EA_003();
- UINT32 EA_004();
- UINT32 EA_005();
- UINT32 EA_006();
- UINT32 EA_007();
- UINT32 EA_100();
- UINT32 EA_101();
- UINT32 EA_102();
- UINT32 EA_103();
- UINT32 EA_104();
- UINT32 EA_105();
- UINT32 EA_106();
- UINT32 EA_107();
- UINT32 EA_200();
- UINT32 EA_201();
- UINT32 EA_202();
- UINT32 EA_203();
- UINT32 EA_204();
- UINT32 EA_205();
- UINT32 EA_206();
- UINT32 EA_207();
+ uint32_t EA_000();
+ uint32_t EA_001();
+ uint32_t EA_002();
+ uint32_t EA_003();
+ uint32_t EA_004();
+ uint32_t EA_005();
+ uint32_t EA_006();
+ uint32_t EA_007();
+ uint32_t EA_100();
+ uint32_t EA_101();
+ uint32_t EA_102();
+ uint32_t EA_103();
+ uint32_t EA_104();
+ uint32_t EA_105();
+ uint32_t EA_106();
+ uint32_t EA_107();
+ uint32_t EA_200();
+ uint32_t EA_201();
+ uint32_t EA_202();
+ uint32_t EA_203();
+ uint32_t EA_204();
+ uint32_t EA_205();
+ uint32_t EA_206();
+ uint32_t EA_207();
};
class v25_device : public v25_common_device
{
public:
- v25_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v25_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
class v35_device : public v25_common_device
{
public:
- v35_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v35_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};