diff options
Diffstat (limited to 'src/devices/cpu/mips/mips3.h')
-rw-r--r-- | src/devices/cpu/mips/mips3.h | 304 |
1 files changed, 152 insertions, 152 deletions
diff --git a/src/devices/cpu/mips/mips3.h b/src/devices/cpu/mips/mips3.h index fff9044f472..247b21bd993 100644 --- a/src/devices/cpu/mips/mips3.h +++ b/src/devices/cpu/mips/mips3.h @@ -217,17 +217,17 @@ enum /* MIPS3 TLB entry */ struct mips3_tlb_entry { - UINT64 page_mask; - UINT64 entry_hi; - UINT64 entry_lo[2]; + uint64_t page_mask; + uint64_t entry_hi; + uint64_t entry_lo[2]; }; /* internal compiler state */ struct compiler_state { - UINT32 cycles; /* accumulated cycles */ - UINT8 checkints; /* need to check interrupts before next instruction */ - UINT8 checksoftints; /* need to check software interrupts before next instruction */ + uint32_t cycles; /* accumulated cycles */ + uint8_t checkints; /* need to check interrupts before next instruction */ + uint8_t checksoftints; /* need to check software interrupts before next instruction */ uml::code_label labelnum; /* index for local labels */ }; @@ -269,19 +269,19 @@ protected: public: // construction/destruction - mips3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, mips3_flavor flavor, endianness_t endiannes); + mips3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, mips3_flavor flavor, endianness_t endiannes); static void set_icache_size(device_t &device, size_t icache_size) { downcast<mips3_device &>(device).c_icache_size = icache_size; } static void set_dcache_size(device_t &device, size_t dcache_size) { downcast<mips3_device &>(device).c_dcache_size = dcache_size; } - static void set_system_clock(device_t &device, UINT32 system_clock) { downcast<mips3_device &>(device).c_system_clock = system_clock; } + static void set_system_clock(device_t &device, uint32_t system_clock) { downcast<mips3_device &>(device).c_system_clock = system_clock; } TIMER_CALLBACK_MEMBER(compare_int_callback); - void add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base); - void clear_fastram(UINT32 select_start); - void mips3drc_set_options(UINT32 options); - void mips3drc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles); - void burn_cycles(INT32 cycles); + void add_fastram(offs_t start, offs_t end, uint8_t readonly, void *base); + void clear_fastram(uint32_t select_start); + void mips3drc_set_options(uint32_t options); + void mips3drc_add_hotspot(offs_t pc, uint32_t opcode, uint32_t cycles); + void burn_cycles(int32_t cycles); protected: // device-level overrides @@ -290,12 +290,12 @@ protected: virtual void device_stop() override; // device_execute_interface overrides - virtual UINT32 execute_min_cycles() const override { return 1; } - virtual UINT32 execute_max_cycles() const override { return 40; } - virtual UINT32 execute_input_lines() const override { return 6; } + virtual uint32_t execute_min_cycles() const override { return 1; } + virtual uint32_t execute_max_cycles() const override { return 40; } + virtual uint32_t execute_input_lines() const override { return 6; } virtual void execute_run() override; virtual void execute_set_input(int inputnum, int state) override; - virtual void execute_burn(INT32 cycles) override { m_totalcycles += cycles; } + virtual void execute_burn(int32_t cycles) override { m_totalcycles += cycles; } // device_memory_interface overrides virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : nullptr; } @@ -306,35 +306,35 @@ protected: virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; // device_disasm_interface overrides - virtual UINT32 disasm_min_opcode_bytes() const override { return 4; } - virtual UINT32 disasm_max_opcode_bytes() const override { return 4; } - virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override; + virtual uint32_t disasm_min_opcode_bytes() const override { return 4; } + virtual uint32_t disasm_max_opcode_bytes() const override { return 4; } + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override; private: struct internal_mips3_state { /* core registers */ - UINT32 pc; + uint32_t pc; int icount; - UINT64 r[35]; + uint64_t r[35]; /* COP registers */ - UINT64 cpr[3][32]; - UINT64 ccr[3][32]; - UINT32 llbit; + uint64_t cpr[3][32]; + uint64_t ccr[3][32]; + uint32_t llbit; - UINT32 mode; /* current global mode */ + uint32_t mode; /* current global mode */ /* parameters for subroutines */ - UINT64 numcycles; /* return value from gettotalcycles */ + uint64_t numcycles; /* return value from gettotalcycles */ const char * format; /* format string for print_debug */ - UINT32 arg0; /* print_debug argument 1 */ - UINT32 arg1; /* print_debug argument 2 */ + uint32_t arg0; /* print_debug argument 1 */ + uint32_t arg1; /* print_debug argument 2 */ - UINT64 count_zero_time; - UINT32 compare_armed; - UINT32 jmpdest; /* destination jump target */ + uint64_t count_zero_time; + uint32_t compare_armed; + uint32_t jmpdest; /* destination jump target */ }; @@ -345,19 +345,19 @@ private: internal_mips3_state *m_core; /* internal stuff */ - UINT32 m_ppc; - UINT32 m_nextpc; - UINT32 m_pcbase; - UINT8 m_cf[4][8]; + uint32_t m_ppc; + uint32_t m_nextpc; + uint32_t m_pcbase; + uint8_t m_cf[4][8]; bool m_delayslot; int m_op; int m_interrupt_cycles; - UINT32 m_ll_value; - UINT64 m_lld_value; - UINT32 m_badcop_value; + uint32_t m_ll_value; + uint64_t m_lld_value; + uint32_t m_badcop_value; /* endian-dependent load/store */ - typedef void (mips3_device::*loadstore_func)(UINT32 op); + typedef void (mips3_device::*loadstore_func)(uint32_t op); loadstore_func m_lwl; loadstore_func m_lwr; loadstore_func m_swl; @@ -369,18 +369,18 @@ private: address_space *m_program; direct_read_data *m_direct; - UINT32 c_system_clock; - UINT32 m_cpu_clock; + uint32_t c_system_clock; + uint32_t m_cpu_clock; emu_timer * m_compare_int_timer; /* derived info based on flavor */ - UINT32 m_pfnmask; - UINT8 m_tlbentries; + uint32_t m_pfnmask; + uint8_t m_tlbentries; /* memory accesses */ bool m_bigendian; - UINT32 m_byte_xor; - UINT32 m_word_xor; + uint32_t m_byte_xor; + uint32_t m_word_xor; data_accessors m_memory; /* cache memory */ @@ -391,31 +391,31 @@ private: mips3_tlb_entry m_tlb[MIPS3_MAX_TLB_ENTRIES]; /* fast RAM */ - UINT32 m_fastram_select; + uint32_t m_fastram_select; struct { offs_t start; /* start of the RAM block */ offs_t end; /* end of the RAM block */ - UINT8 readonly; /* TRUE if read-only */ + uint8_t readonly; /* TRUE if read-only */ void * base; /* base in memory where the RAM lives */ - UINT8 * offset_base8; /* base in memory where the RAM lives, 8-bit pointer, with the start offset pre-applied */ - UINT16 * offset_base16; /* base in memory where the RAM lives, 16-bit pointer, with the start offset pre-applied */ - UINT32 * offset_base32; /* base in memory where the RAM lives, 32-bit pointer, with the start offset pre-applied */ + uint8_t * offset_base8; /* base in memory where the RAM lives, 8-bit pointer, with the start offset pre-applied */ + uint16_t * offset_base16; /* base in memory where the RAM lives, 16-bit pointer, with the start offset pre-applied */ + uint32_t * offset_base32; /* base in memory where the RAM lives, 32-bit pointer, with the start offset pre-applied */ } m_fastram[MIPS3_MAX_FASTRAM]; - UINT32 m_debugger_temp; + uint32_t m_debugger_temp; /* core state */ drc_cache m_cache; /* pointer to the DRC code cache */ std::unique_ptr<drcuml_state> m_drcuml; /* DRC UML generator state */ std::unique_ptr<mips3_frontend> m_drcfe; /* pointer to the DRC front-end state */ - UINT32 m_drcoptions; /* configurable DRC options */ + uint32_t m_drcoptions; /* configurable DRC options */ /* internal stuff */ - UINT8 m_cache_dirty; /* true if we need to flush the cache */ + uint8_t m_cache_dirty; /* true if we need to flush the cache */ /* tables */ - UINT8 m_fpmode[4]; /* FPU mode table */ + uint8_t m_fpmode[4]; /* FPU mode table */ /* register mappings */ uml::parameter m_regmap[34]; /* parameter to register mappings for all 32 integer registers */ @@ -442,19 +442,19 @@ private: uml::code_handle * m_exception_norecover[18/*EXCEPTION_COUNT*/]; /* array of no-recover exception handlers */ /* hotspots */ - UINT32 m_hotspot_select; + uint32_t m_hotspot_select; struct { offs_t pc; /* PC to consider */ - UINT32 opcode; /* required opcode at that PC */ - UINT32 cycles; /* number of cycles to eat when hit */ + uint32_t opcode; /* required opcode at that PC */ + uint32_t cycles; /* number of cycles to eat when hit */ } m_hotspot[MIPS3_MAX_HOTSPOTS]; bool m_isdrc; void generate_exception(int exception, int backup); void generate_tlb_exception(int exception, offs_t address); - void invalid_instruction(UINT32 op); + void invalid_instruction(uint32_t op); void check_irqs(); public: void mips3com_update_cycle_counting(); @@ -464,71 +464,71 @@ public: void mips3com_tlbwr(); void mips3com_tlbp(); private: - UINT32 compute_config_register(); - UINT32 compute_prid_register(); + uint32_t compute_config_register(); + uint32_t compute_prid_register(); void tlb_map_entry(int tlbindex); void tlb_write_common(int tlbindex); - bool RBYTE(offs_t address, UINT32 *result); - bool RHALF(offs_t address, UINT32 *result); - bool RWORD(offs_t address, UINT32 *result); - bool RWORD_MASKED(offs_t address, UINT32 *result, UINT32 mem_mask); - bool RDOUBLE(offs_t address, UINT64 *result); - bool RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64 mem_mask); - void WBYTE(offs_t address, UINT8 data); - void WHALF(offs_t address, UINT16 data); - void WWORD(offs_t address, UINT32 data); - void WWORD_MASKED(offs_t address, UINT32 data, UINT32 mem_mask); - void WDOUBLE(offs_t address, UINT64 data); - void WDOUBLE_MASKED(offs_t address, UINT64 data, UINT64 mem_mask); - - UINT64 get_cop0_reg(int idx); - void set_cop0_reg(int idx, UINT64 val); - UINT64 get_cop0_creg(int idx); - void set_cop0_creg(int idx, UINT64 val); - void handle_cop0(UINT32 op); - - UINT32 get_cop1_reg32(int idx); - UINT64 get_cop1_reg64(int idx); - void set_cop1_reg32(int idx, UINT32 val); - void set_cop1_reg64(int idx, UINT64 val); - UINT64 get_cop1_creg(int idx); - void set_cop1_creg(int idx, UINT64 val); - void handle_cop1_fr0(UINT32 op); - void handle_cop1_fr1(UINT32 op); - void handle_cop1x_fr0(UINT32 op); - void handle_cop1x_fr1(UINT32 op); - - UINT64 get_cop2_reg(int idx); - void set_cop2_reg(int idx, UINT64 val); - UINT64 get_cop2_creg(int idx); - void set_cop2_creg(int idx, UINT64 val); - void handle_cop2(UINT32 op); - - void handle_special(UINT32 op); - void handle_regimm(UINT32 op); - - void lwl_be(UINT32 op); - void lwr_be(UINT32 op); - void ldl_be(UINT32 op); - void ldr_be(UINT32 op); - void swl_be(UINT32 op); - void swr_be(UINT32 op); - void sdl_be(UINT32 op); - void sdr_be(UINT32 op); - void lwl_le(UINT32 op); - void lwr_le(UINT32 op); - void ldl_le(UINT32 op); - void ldr_le(UINT32 op); - void swl_le(UINT32 op); - void swr_le(UINT32 op); - void sdl_le(UINT32 op); - void sdr_le(UINT32 op); + bool RBYTE(offs_t address, uint32_t *result); + bool RHALF(offs_t address, uint32_t *result); + bool RWORD(offs_t address, uint32_t *result); + bool RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask); + bool RDOUBLE(offs_t address, uint64_t *result); + bool RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask); + void WBYTE(offs_t address, uint8_t data); + void WHALF(offs_t address, uint16_t data); + void WWORD(offs_t address, uint32_t data); + void WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask); + void WDOUBLE(offs_t address, uint64_t data); + void WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask); + + uint64_t get_cop0_reg(int idx); + void set_cop0_reg(int idx, uint64_t val); + uint64_t get_cop0_creg(int idx); + void set_cop0_creg(int idx, uint64_t val); + void handle_cop0(uint32_t op); + + uint32_t get_cop1_reg32(int idx); + uint64_t get_cop1_reg64(int idx); + void set_cop1_reg32(int idx, uint32_t val); + void set_cop1_reg64(int idx, uint64_t val); + uint64_t get_cop1_creg(int idx); + void set_cop1_creg(int idx, uint64_t val); + void handle_cop1_fr0(uint32_t op); + void handle_cop1_fr1(uint32_t op); + void handle_cop1x_fr0(uint32_t op); + void handle_cop1x_fr1(uint32_t op); + + uint64_t get_cop2_reg(int idx); + void set_cop2_reg(int idx, uint64_t val); + uint64_t get_cop2_creg(int idx); + void set_cop2_creg(int idx, uint64_t val); + void handle_cop2(uint32_t op); + + void handle_special(uint32_t op); + void handle_regimm(uint32_t op); + + void lwl_be(uint32_t op); + void lwr_be(uint32_t op); + void ldl_be(uint32_t op); + void ldr_be(uint32_t op); + void swl_be(uint32_t op); + void swr_be(uint32_t op); + void sdl_be(uint32_t op); + void sdr_be(uint32_t op); + void lwl_le(uint32_t op); + void lwr_le(uint32_t op); + void ldl_le(uint32_t op); + void ldr_le(uint32_t op); + void swl_le(uint32_t op); + void swr_le(uint32_t op); + void sdl_le(uint32_t op); + void sdr_le(uint32_t op); void load_fast_iregs(drcuml_block *block); void save_fast_iregs(drcuml_block *block); void code_flush_cache(); - void code_compile_block(UINT8 mode, offs_t pc); + void code_compile_block(uint8_t mode, offs_t pc); public: void func_get_cycles(); void func_printf_exception(); @@ -540,29 +540,29 @@ private: void static_generate_nocode_handler(); void static_generate_out_of_cycles(); void static_generate_tlb_mismatch(); - void static_generate_exception(UINT8 exception, int recover, const char *name); + void static_generate_exception(uint8_t exception, int recover, const char *name); void static_generate_memory_accessor(int mode, int size, int iswrite, int ismasked, const char *name, uml::code_handle **handleptr); void generate_update_mode(drcuml_block *block); void generate_update_cycles(drcuml_block *block, compiler_state *compiler, uml::parameter param, int allow_exception); void generate_checksum_block(drcuml_block *block, compiler_state *compiler, const opcode_desc *seqhead, const opcode_desc *seqlast); void generate_sequence_instruction(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 linkreg); + void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t linkreg); int generate_opcode(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); int generate_special(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); int generate_regimm(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); int generate_idt(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - int generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 reg); - int generate_get_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, UINT8 reg); + int generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg); + int generate_get_cop0_reg(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, uint8_t reg); int generate_cop0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); int generate_cop1_fr0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); int generate_cop1_fr1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); - void generate_get_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param); - void generate_get_cop1_reg64_d2i(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param); - void generate_set_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param); - void generate_set_cop1_reg64_i2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const UINT32 reg, const uml::parameter& param); + void generate_get_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param); + void generate_get_cop1_reg64_d2i(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param); + void generate_set_cop1_reg64(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param); + void generate_set_cop1_reg64_i2d(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc, const uint32_t reg, const uml::parameter& param); int generate_cop1x_fr0(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); int generate_cop1x_fr1(drcuml_block *block, compiler_state *compiler, const opcode_desc *desc); @@ -570,9 +570,9 @@ private: void check_cop1_access(drcuml_block *block); void generate_badcop(drcuml_block *block, const int cop); - void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op); - const char *log_desc_flags_to_string(UINT32 flags); - void log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist); + void log_add_disasm_comment(drcuml_block *block, uint32_t pc, uint32_t op); + const char *log_desc_flags_to_string(uint32_t flags); + void log_register_list(drcuml_state *drcuml, const char *string, const uint32_t *reglist, const uint32_t *regnostarlist); void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent); }; @@ -582,7 +582,7 @@ class vr4300be_device : public mips3_device { public: // construction/destruction - vr4300be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + vr4300be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, VR4300BE, "VR4300 (big)", tag, owner, clock, "vr4300be", MIPS3_TYPE_VR4300, ENDIANNESS_BIG) { } }; @@ -591,7 +591,7 @@ class vr4300le_device : public mips3_device { public: // construction/destruction - vr4300le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + vr4300le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, VR4300LE, "VR4300 (little)", tag, owner, clock, "vr4300le", MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE) { } }; @@ -600,7 +600,7 @@ class vr4310be_device : public mips3_device { public: // construction/destruction - vr4310be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + vr4310be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, VR4310BE, "VR4310 (big)", tag, owner, clock, "vr4310be", MIPS3_TYPE_VR4300, ENDIANNESS_BIG) { } }; @@ -609,7 +609,7 @@ class vr4310le_device : public mips3_device { public: // construction/destruction - vr4310le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + vr4310le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, VR4310LE, "VR4310 (little)", tag, owner, clock, "vr4310le", MIPS3_TYPE_VR4300, ENDIANNESS_LITTLE) { } }; @@ -618,7 +618,7 @@ class r4600be_device : public mips3_device { public: // construction/destruction - r4600be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + r4600be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, R4600BE, "R4600 (big)", tag, owner, clock, "r4600be", MIPS3_TYPE_R4600, ENDIANNESS_BIG) { } }; @@ -627,7 +627,7 @@ class r4600le_device : public mips3_device { public: // construction/destruction - r4600le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + r4600le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, R4600LE, "R4600 (little)", tag, owner, clock, "r4600le", MIPS3_TYPE_R4600, ENDIANNESS_LITTLE) { } }; @@ -636,7 +636,7 @@ class r4650be_device : public mips3_device { public: // construction/destruction - r4650be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + r4650be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, R4650BE, "IDT R4650 (big)", tag, owner, clock, "r4650be", MIPS3_TYPE_R4650, ENDIANNESS_BIG) { } }; @@ -645,7 +645,7 @@ class r4650le_device : public mips3_device { public: // construction/destruction - r4650le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + r4650le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, R4650LE, "IDT R4650 (little)", tag, owner, clock, "r4650le", MIPS3_TYPE_R4650, ENDIANNESS_LITTLE) { } }; @@ -654,7 +654,7 @@ class r4700be_device : public mips3_device { public: // construction/destruction - r4700be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + r4700be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, R4700BE, "R4700 (big)", tag, owner, clock, "r4700be", MIPS3_TYPE_R4700, ENDIANNESS_BIG) { } }; @@ -663,7 +663,7 @@ class r4700le_device : public mips3_device { public: // construction/destruction - r4700le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + r4700le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, R4700LE, "R4700 (little)", tag, owner, clock, "r4700le", MIPS3_TYPE_R4700, ENDIANNESS_LITTLE) { } }; @@ -672,7 +672,7 @@ class r5000be_device : public mips3_device { public: // construction/destruction - r5000be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + r5000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, R5000BE, "R5000 (big)", tag, owner, clock, "r5000be", MIPS3_TYPE_R5000, ENDIANNESS_BIG) { } }; @@ -681,7 +681,7 @@ class r5000le_device : public mips3_device { public: // construction/destruction - r5000le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + r5000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, R5000LE, "R5000 (little)", tag, owner, clock, "r5000le", MIPS3_TYPE_R5000, ENDIANNESS_LITTLE) { } }; @@ -690,7 +690,7 @@ class qed5271be_device : public mips3_device { public: // construction/destruction - qed5271be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + qed5271be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, QED5271BE, "QED5271 (big)", tag, owner, clock, "qed5271be", MIPS3_TYPE_QED5271, ENDIANNESS_BIG) { } }; @@ -699,7 +699,7 @@ class qed5271le_device : public mips3_device { public: // construction/destruction - qed5271le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + qed5271le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, QED5271LE, "QED5271 (little)", tag, owner, clock, "qed5271le", MIPS3_TYPE_QED5271, ENDIANNESS_LITTLE) { } }; @@ -708,7 +708,7 @@ class rm7000be_device : public mips3_device { public: // construction/destruction - rm7000be_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + rm7000be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, RM7000BE, "RM7000 (big)", tag, owner, clock, "rm7000be", MIPS3_TYPE_RM7000, ENDIANNESS_BIG) { } }; @@ -717,7 +717,7 @@ class rm7000le_device : public mips3_device { public: // construction/destruction - rm7000le_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + rm7000le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mips3_device(mconfig, RM7000LE, "RM7000 (little)", tag, owner, clock, "rm7000le", MIPS3_TYPE_RM7000, ENDIANNESS_LITTLE) { } }; @@ -728,7 +728,7 @@ class mips3_frontend : public drc_frontend { public: // construction/destruction - mips3_frontend(mips3_device *mips3, UINT32 window_start, UINT32 window_end, UINT32 max_sequence); + mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); protected: // required overrides @@ -736,13 +736,13 @@ protected: private: // internal helpers - bool describe_special(UINT32 op, opcode_desc &desc); - bool describe_regimm(UINT32 op, opcode_desc &desc); - bool describe_idt(UINT32 op, opcode_desc &desc); - bool describe_cop0(UINT32 op, opcode_desc &desc); - bool describe_cop1(UINT32 op, opcode_desc &desc); - bool describe_cop1x(UINT32 op, opcode_desc &desc); - bool describe_cop2(UINT32 op, opcode_desc &desc); + bool describe_special(uint32_t op, opcode_desc &desc); + bool describe_regimm(uint32_t op, opcode_desc &desc); + bool describe_idt(uint32_t op, opcode_desc &desc); + bool describe_cop0(uint32_t op, opcode_desc &desc); + bool describe_cop1(uint32_t op, opcode_desc &desc); + bool describe_cop1x(uint32_t op, opcode_desc &desc); + bool describe_cop2(uint32_t op, opcode_desc &desc); // internal state mips3_device *m_mips3; |