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Diffstat (limited to 'src/devices/cpu/mips/mips3.cpp')
-rw-r--r--src/devices/cpu/mips/mips3.cpp528
1 files changed, 391 insertions, 137 deletions
diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp
index 62fa0c4b77f..1db51f6e961 100644
--- a/src/devices/cpu/mips/mips3.cpp
+++ b/src/devices/cpu/mips/mips3.cpp
@@ -9,7 +9,6 @@
***************************************************************************/
#include "emu.h"
-#include "debugger.h"
#include "mips3.h"
#include "mips3com.h"
#include "mips3dsm.h"
@@ -19,6 +18,9 @@
#define ENABLE_OVERFLOWS (0)
#define ENABLE_EE_ELF_LOADER (0)
#define ENABLE_EE_DECI2 (0)
+#define ENABLE_O2_DPRINTF (0)
+
+#include "o2dprintf.hxx"
/***************************************************************************
HELPER MACROS
@@ -124,7 +126,8 @@ DEFINE_DEVICE_TYPE(R5000BE, r5000be_device, "r5000be", "MIPS R5000 (big)")
DEFINE_DEVICE_TYPE(R5000LE, r5000le_device, "r5000le", "MIPS R5000 (little)")
DEFINE_DEVICE_TYPE(VR5500BE, vr5500be_device, "vr5500be", "NEC VR5500 (big)")
DEFINE_DEVICE_TYPE(VR5500LE, vr5500le_device, "vr5500le", "NEC VR5500 (little)")
-DEFINE_DEVICE_TYPE(R5900LE, r5900le_device, "r5900le", "Emotion Engine Core")
+DEFINE_DEVICE_TYPE(R5900BE, r5900be_device, "r5900be", "Emotion Engine Core (big)")
+DEFINE_DEVICE_TYPE(R5900LE, r5900le_device, "r5900le", "Emotion Engine Core (little)")
DEFINE_DEVICE_TYPE(QED5271BE, qed5271be_device, "qed5271be", "MIPS QED5271 (big)")
DEFINE_DEVICE_TYPE(QED5271LE, qed5271le_device, "qed5271le", "MIPS QED5271 (little)")
DEFINE_DEVICE_TYPE(RM7000BE, rm7000be_device, "rm7000be", "MIPS RM7000 (big)")
@@ -244,7 +247,7 @@ void mips3_device::generate_exception(int exception, int backup)
if (exception != 0)
{
- fprintf(stderr, "Exception: PC=%08X, PPC=%08X\n", m_core->pc, m_ppc);
+ fprintf(stderr, "Exception type %d: PC=%08X, PPC=%08X\n", exception, m_core->pc, m_ppc);
machine().debug_break();
}
*/
@@ -345,11 +348,9 @@ void mips3_device::generate_exception(int exception, int backup)
void mips3_device::generate_tlb_exception(int exception, offs_t address)
{
m_core->cpr[0][COP0_BadVAddr] = address;
- if(exception == EXCEPTION_TLBLOAD || exception == EXCEPTION_TLBSTORE || exception == EXCEPTION_TLBLOAD_FILL || exception == EXCEPTION_TLBSTORE_FILL)
- {
- m_core->cpr[0][COP0_Context] = (m_core->cpr[0][COP0_Context] & 0xff800000) | ((address >> 9) & 0x007ffff0);
- m_core->cpr[0][COP0_EntryHi] = (address & 0xffffe000) | (m_core->cpr[0][COP0_EntryHi] & 0xff);
- }
+ m_core->cpr[0][COP0_Context] = (m_core->cpr[0][COP0_Context] & 0xff800000) | ((address >> 9) & 0x007ffff0);
+ m_core->cpr[0][COP0_EntryHi] = (address & 0xffffe000) | (m_core->cpr[0][COP0_EntryHi] & 0xff);
+
generate_exception(exception, 1);
}
@@ -372,7 +373,7 @@ void mips3_device::check_irqs()
generate_exception(EXCEPTION_INTERRUPT, 0);
}
-void r5900le_device::check_irqs()
+void r5900_device::check_irqs()
{
if ((CAUSE & SR & 0xfc00) && (SR & SR_IE) && (SR & SR_EIE) && !(SR & (SR_EXL | SR_ERL)))
generate_exception(EXCEPTION_INTERRUPT, 0);
@@ -401,30 +402,30 @@ void mips3_device::device_start()
{
if (m_data_bits == 32)
{
- auto cache = m_program->cache<2, 0, ENDIANNESS_LITTLE>();
- m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
- m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
+ m_program->cache(m_cache32le);
+ m_pr32 = delegate<u32 (offs_t)>(&memory_access<32, 2, 0, ENDIANNESS_LITTLE>::cache::read_dword, &m_cache32le);
+ m_prptr = [this] (offs_t address) -> const void * { return m_cache32le.read_ptr(address); };
}
else
{
- auto cache = m_program->cache<3, 0, ENDIANNESS_LITTLE>();
- m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
- m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
+ m_program->cache(m_cache64le);
+ m_pr32 = delegate<u32 (offs_t)>(&memory_access<32, 3, 0, ENDIANNESS_LITTLE>::cache::read_dword, &m_cache64le);
+ m_prptr = [this] (offs_t address) -> const void * { return m_cache64le.read_ptr(address); };
}
}
else
{
if (m_data_bits == 32)
{
- auto cache = m_program->cache<2, 0, ENDIANNESS_BIG>();
- m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
- m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
+ m_program->cache(m_cache32be);
+ m_pr32 = delegate<u32 (offs_t)>(&memory_access<32, 2, 0, ENDIANNESS_BIG>::cache::read_dword, &m_cache32be);
+ m_prptr = [this] (offs_t address) -> const void * { return m_cache32be.read_ptr(address); };
}
else
{
- auto cache = m_program->cache<3, 0, ENDIANNESS_BIG>();
- m_pr32 = [cache](offs_t address) -> u32 { return cache->read_dword(address); };
- m_prptr = [cache](offs_t address) -> const void * { return cache->read_ptr(address); };
+ m_program->cache(m_cache64be);
+ m_pr32 = delegate<u32 (offs_t)>(&memory_access<32, 3, 0, ENDIANNESS_BIG>::cache::read_dword, &m_cache64be);
+ m_prptr = [this] (offs_t address) -> const void * { return m_cache64be.read_ptr(address); };
}
}
@@ -432,7 +433,7 @@ void mips3_device::device_start()
m_program->accessors(m_memory);
/* allocate a timer for the compare interrupt */
- m_compare_int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mips3_device::compare_int_callback), this));
+ m_compare_int_timer = timer_alloc(FUNC(mips3_device::compare_int_callback), this);
uint32_t flags = 0;
/* initialize the UML generator */
@@ -444,9 +445,9 @@ void mips3_device::device_start()
for (int regnum = 0; regnum < 32; regnum++)
{
char buf[10];
- sprintf(buf, "r%d", regnum);
+ snprintf(buf, 10, "r%d", regnum);
m_drcuml->symbol_add(&m_core->r[regnum], sizeof(m_core->r[regnum]), buf);
- sprintf(buf, "f%d", regnum);
+ snprintf(buf, 10, "f%d", regnum);
m_drcuml->symbol_add(&m_core->cpr[1][regnum], sizeof(m_core->cpr[1][regnum]), buf);
}
m_drcuml->symbol_add(&m_core->r[REG_LO], sizeof(m_core->r[REG_LO]), "lo");
@@ -474,7 +475,8 @@ void mips3_device::device_start()
m_drcuml->symbol_add(&m_core->cpr[0][COP0_TagLo], sizeof(m_core->cpr[0][COP0_TagLo]), "TagLo");
m_drcuml->symbol_add(&m_core->cpr[0][COP0_TagHi], sizeof(m_core->cpr[0][COP0_TagHi]), "TagHi");
m_drcuml->symbol_add(&m_core->cpr[0][COP0_ErrorPC], sizeof(m_core->cpr[0][COP0_ErrorPC]), "ErrorPC");
- m_drcuml->symbol_add(&m_core->ccr[1][31], sizeof(m_core->cpr[1][31]), "fcr31");
+ m_drcuml->symbol_add(&m_core->ccr[1][0], sizeof(m_core->ccr[1][0]), "fcr0");
+ m_drcuml->symbol_add(&m_core->ccr[1][31], sizeof(m_core->ccr[1][31]), "fcr31");
m_drcuml->symbol_add(&m_core->mode, sizeof(m_core->mode), "mode");
m_drcuml->symbol_add(&m_core->arg0, sizeof(m_core->arg0), "arg0");
m_drcuml->symbol_add(&m_core->arg1, sizeof(m_core->arg1), "arg1");
@@ -728,13 +730,12 @@ void mips3_device::device_start()
state_add( MIPS3_LLADDR, "LLAddr", m_core->cpr[0][COP0_LLAddr]).formatstr("%08X");
state_add( STATE_GENPCBASE, "CURPC", m_core->pc).noshow();
- state_add( STATE_GENSP, "CURSP", m_core->r[31]).noshow();
state_add( STATE_GENFLAGS, "CURFLAGS", m_debugger_temp).formatstr("%1s").noshow();
set_icountptr(m_core->icount);
}
-void r5900le_device::device_start()
+void r5900_device::device_start()
{
mips3_device::device_start();
#if USE_ABI_REG_NAMES
@@ -1112,6 +1113,9 @@ void mips3_device::device_reset()
m_core->llbit = 0;
m_core->count_zero_time = total_cycles();
+ /* initialize the FPU state */
+ m_core->ccr[1][0] = compute_fpu_prid_register();
+
/* initialize the TLB state */
for (int tlbindex = 0; tlbindex < m_tlbentries; tlbindex++)
{
@@ -1127,11 +1131,11 @@ void mips3_device::device_reset()
}
/* load the fixed TLB range */
- vtlb_load(2 * m_tlbentries + 0, (0xa0000000 - 0x80000000) >> MIPS3_MIN_PAGE_SHIFT, 0x80000000, 0x00000000 | VTLB_READ_ALLOWED | VTLB_WRITE_ALLOWED | VTLB_FETCH_ALLOWED | VTLB_FLAG_VALID);
- vtlb_load(2 * m_tlbentries + 1, (0xc0000000 - 0xa0000000) >> MIPS3_MIN_PAGE_SHIFT, 0xa0000000, 0x00000000 | VTLB_READ_ALLOWED | VTLB_WRITE_ALLOWED | VTLB_FETCH_ALLOWED | VTLB_FLAG_VALID);
+ vtlb_load(2 * m_tlbentries + 0, (0xa0000000 - 0x80000000) >> MIPS3_MIN_PAGE_SHIFT, 0x80000000, 0x00000000 | READ_ALLOWED | WRITE_ALLOWED | FETCH_ALLOWED | FLAG_VALID);
+ vtlb_load(2 * m_tlbentries + 1, (0xc0000000 - 0xa0000000) >> MIPS3_MIN_PAGE_SHIFT, 0xa0000000, 0x00000000 | READ_ALLOWED | WRITE_ALLOWED | FETCH_ALLOWED | FLAG_VALID);
// TX4925 on-board peripherals pass-through
if (m_flavor == MIPS3_TYPE_TX4925)
- vtlb_load(2 * m_tlbentries + 2, (0xff200000 - 0xff1f0000) >> MIPS3_MIN_PAGE_SHIFT, 0xff1f0000, 0xff1f0000 | VTLB_READ_ALLOWED | VTLB_WRITE_ALLOWED | VTLB_FETCH_ALLOWED | VTLB_FLAG_VALID);
+ vtlb_load(2 * m_tlbentries + 2, (0xff200000 - 0xff1f0000) >> MIPS3_MIN_PAGE_SHIFT, 0xff1f0000, 0xff1f0000 | READ_ALLOWED | WRITE_ALLOWED | FETCH_ALLOWED | FLAG_VALID);
m_tlb_seed = 0;
m_core->mode = (MODE_KERNEL << 1) | 0;
@@ -1147,26 +1151,34 @@ void mips3_device::device_reset()
}
-bool mips3_device::memory_translate(int spacenum, int intention, offs_t &address)
+bool mips3_device::memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space)
{
+ target_space = &space(spacenum);
+
/* only applies to the program address space */
if (spacenum == AS_PROGRAM)
{
const vtlb_entry *table = vtlb_table();
vtlb_entry entry = table[address >> MIPS3_MIN_PAGE_SHIFT];
- if ((entry & (1 << (intention & (TRANSLATE_TYPE_MASK | TRANSLATE_USER_MASK)))) == 0)
+ if ((entry & (1 << intention)) == 0)
return false;
address = (entry & ~MIPS3_MIN_PAGE_MASK) | (address & MIPS3_MIN_PAGE_MASK);
}
return true;
}
+bool r4650_device::memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space)
+{
+ target_space = &space(spacenum);
+ return true;
+}
+
std::unique_ptr<util::disasm_interface> mips3_device::create_disassembler()
{
return std::make_unique<mips3_disassembler>();
}
-std::unique_ptr<util::disasm_interface> r5900le_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> r5900_device::create_disassembler()
{
return std::make_unique<ee_disassembler>();
}
@@ -1180,7 +1192,7 @@ std::unique_ptr<util::disasm_interface> r5900le_device::create_disassembler()
inline bool mips3_device::RBYTE(offs_t address, uint32_t *result)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
@@ -1196,7 +1208,7 @@ inline bool mips3_device::RBYTE(offs_t address, uint32_t *result)
}
else
{
- if(tlbval & VTLB_FLAG_FIXED)
+ if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1213,7 +1225,7 @@ inline bool mips3_device::RBYTE(offs_t address, uint32_t *result)
inline bool mips3_device::RHALF(offs_t address, uint32_t *result)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
@@ -1229,7 +1241,7 @@ inline bool mips3_device::RHALF(offs_t address, uint32_t *result)
}
else
{
- if(tlbval & VTLB_FLAG_FIXED)
+ if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1246,7 +1258,7 @@ inline bool mips3_device::RHALF(offs_t address, uint32_t *result)
inline bool mips3_device::RWORD(offs_t address, uint32_t *result, bool insn)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
@@ -1262,7 +1274,7 @@ inline bool mips3_device::RWORD(offs_t address, uint32_t *result, bool insn)
}
else
{
- if(tlbval & VTLB_FLAG_FIXED)
+ if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1279,13 +1291,13 @@ inline bool mips3_device::RWORD(offs_t address, uint32_t *result, bool insn)
inline bool mips3_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
*result = (*m_memory.read_dword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), mem_mask);
}
else
{
- if(tlbval & VTLB_FLAG_FIXED)
+ if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1302,13 +1314,13 @@ inline bool mips3_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_
inline bool mips3_device::RDOUBLE(offs_t address, uint64_t *result)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
*result = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff));
}
else
{
- if(tlbval & VTLB_FLAG_FIXED)
+ if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1325,13 +1337,13 @@ inline bool mips3_device::RDOUBLE(offs_t address, uint64_t *result)
inline bool mips3_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
*result = (*m_memory.read_qword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), mem_mask);
}
else
{
- if(tlbval & VTLB_FLAG_FIXED)
+ if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1348,7 +1360,7 @@ inline bool mips3_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint6
inline void mips3_device::WBYTE(offs_t address, uint8_t data)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_WRITE_ALLOWED)
+ if (tlbval & WRITE_ALLOWED)
{
const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
@@ -1364,11 +1376,11 @@ inline void mips3_device::WBYTE(offs_t address, uint8_t data)
}
else
{
- if(tlbval & VTLB_READ_ALLOWED)
+ if(tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & VTLB_FLAG_FIXED)
+ else if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1382,7 +1394,7 @@ inline void mips3_device::WBYTE(offs_t address, uint8_t data)
inline void mips3_device::WHALF(offs_t address, uint16_t data)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_WRITE_ALLOWED)
+ if (tlbval & WRITE_ALLOWED)
{
const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
@@ -1398,11 +1410,11 @@ inline void mips3_device::WHALF(offs_t address, uint16_t data)
}
else
{
- if(tlbval & VTLB_READ_ALLOWED)
+ if(tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & VTLB_FLAG_FIXED)
+ else if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1416,7 +1428,7 @@ inline void mips3_device::WHALF(offs_t address, uint16_t data)
inline void mips3_device::WWORD(offs_t address, uint32_t data)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_WRITE_ALLOWED)
+ if (tlbval & WRITE_ALLOWED)
{
const uint32_t tlbaddress = (tlbval & ~0xfff) | (address & 0xfff);
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
@@ -1432,11 +1444,11 @@ inline void mips3_device::WWORD(offs_t address, uint32_t data)
}
else
{
- if(tlbval & VTLB_READ_ALLOWED)
+ if(tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & VTLB_FLAG_FIXED)
+ else if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1450,17 +1462,17 @@ inline void mips3_device::WWORD(offs_t address, uint32_t data)
inline void mips3_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_WRITE_ALLOWED)
+ if (tlbval & WRITE_ALLOWED)
{
(*m_memory.write_dword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data, mem_mask);
}
else
{
- if(tlbval & VTLB_READ_ALLOWED)
+ if(tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & VTLB_FLAG_FIXED)
+ else if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1474,17 +1486,17 @@ inline void mips3_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t m
inline void mips3_device::WDOUBLE(offs_t address, uint64_t data)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_WRITE_ALLOWED)
+ if (tlbval & WRITE_ALLOWED)
{
(*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data);
}
else
{
- if(tlbval & VTLB_READ_ALLOWED)
+ if(tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & VTLB_FLAG_FIXED)
+ else if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1498,17 +1510,17 @@ inline void mips3_device::WDOUBLE(offs_t address, uint64_t data)
inline void mips3_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
{
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_WRITE_ALLOWED)
+ if (tlbval & WRITE_ALLOWED)
{
(*m_memory.write_qword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data, mem_mask);
}
else
{
- if(tlbval & VTLB_READ_ALLOWED)
+ if(tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & VTLB_FLAG_FIXED)
+ else if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1519,36 +1531,208 @@ inline void mips3_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t
}
}
-inline void r5900le_device::WBYTE(offs_t address, uint8_t data)
+inline bool r4650_device::RBYTE(offs_t address, uint32_t *result)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ {
+ *result = (*m_memory.read_byte)(*m_program, address);
+ return true;
+ }
+
+ if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ {
+ generate_tlb_exception(EXCEPTION_ADDRLOAD, address);
+ *result = 0;
+ return false;
+ }
+ *result = (*m_memory.read_byte)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase]);
+ return true;
+}
+
+inline bool r4650_device::RHALF(offs_t address, uint32_t *result)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ {
+ *result = (*m_memory.read_word)(*m_program, address);
+ return true;
+ }
+
+ if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ {
+ generate_tlb_exception(EXCEPTION_ADDRLOAD, address);
+ *result = 0;
+ return false;
+ }
+ *result = (*m_memory.read_word)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase]);
+ return true;
+}
+
+inline bool r4650_device::RWORD(offs_t address, uint32_t *result, bool insn)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ {
+ *result = (*m_memory.read_dword)(*m_program, address);
+ return true;
+ }
+
+ static const uint32_t BASE_INDICES[2] = { COP0_R4650_DBase, COP0_R4650_IBase };
+ static const uint32_t BOUND_INDICES[2] = { COP0_R4650_DBound, COP0_R4650_IBound };
+ const uint32_t base = m_core->cpr[0][BASE_INDICES[insn]];
+ const uint32_t bound = m_core->cpr[0][BOUND_INDICES[insn]];
+ if ((address & 0xfffff000) > bound)
+ {
+ generate_tlb_exception(EXCEPTION_ADDRLOAD, address);
+ *result = 0;
+ return false;
+ }
+ *result = (*m_memory.read_dword)(*m_program, address + base);
+ return true;
+}
+
+inline bool r4650_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ {
+ *result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask);
+ return true;
+ }
+
+ if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ {
+ generate_tlb_exception(EXCEPTION_ADDRLOAD, address);
+ *result = 0;
+ return false;
+ }
+ *result = (*m_memory.read_dword_masked)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase], mem_mask);
+ return true;
+}
+
+inline bool r4650_device::RDOUBLE(offs_t address, uint64_t *result)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ {
+ *result = (*m_memory.read_qword)(*m_program, address);
+ return true;
+ }
+
+ if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ {
+ generate_tlb_exception(EXCEPTION_ADDRLOAD, address);
+ *result = 0;
+ return false;
+ }
+ *result = (*m_memory.read_qword)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase]);
+ return true;
+}
+
+inline bool r4650_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ {
+ *result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask);
+ return true;
+ }
+
+ if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ {
+ generate_tlb_exception(EXCEPTION_ADDRLOAD, address);
+ *result = 0;
+ return false;
+ }
+ *result = (*m_memory.read_qword_masked)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase], mem_mask);
+ return true;
+}
+
+inline void r4650_device::WBYTE(offs_t address, uint8_t data)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ (*m_memory.write_byte)(*m_program, address, data);
+ else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
+ else
+ (*m_memory.write_byte)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data);
+}
+
+inline void r4650_device::WHALF(offs_t address, uint16_t data)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ (*m_memory.write_word)(*m_program, address, data);
+ else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
+ else
+ (*m_memory.write_word)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data);
+}
+
+inline void r4650_device::WWORD(offs_t address, uint32_t data)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ (*m_memory.write_dword)(*m_program, address, data);
+ else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
+ else
+ (*m_memory.write_dword)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data);
+}
+
+inline void r4650_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask);
+ else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
+ else
+ (*m_memory.write_dword_masked)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data, mem_mask);
+}
+
+inline void r4650_device::WDOUBLE(offs_t address, uint64_t data)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ (*m_memory.write_qword)(*m_program, address, data);
+ else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
+ else
+ (*m_memory.write_qword)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data);
+}
+
+inline void r4650_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
+{
+ if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
+ (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask);
+ else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
+ generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
+ else
+ (*m_memory.write_qword_masked)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data, mem_mask);
+}
+
+inline void r5900_device::WBYTE(offs_t address, uint8_t data)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_byte)(*m_program, address, data);
else mips3_device::WBYTE(address, data);
}
-inline void r5900le_device::WHALF(offs_t address, uint16_t data)
+inline void r5900_device::WHALF(offs_t address, uint16_t data)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_word)(*m_program, address, data);
else mips3_device::WHALF(address, data);
}
-inline void r5900le_device::WWORD(offs_t address, uint32_t data)
+inline void r5900_device::WWORD(offs_t address, uint32_t data)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword)(*m_program, address, data);
else mips3_device::WWORD(address, data);
}
-inline void r5900le_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
+inline void r5900_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask);
else mips3_device::WWORD_MASKED(address, data, mem_mask);
}
-inline void r5900le_device::WDOUBLE(offs_t address, uint64_t data) {
+inline void r5900_device::WDOUBLE(offs_t address, uint64_t data) {
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword)(*m_program, address, data);
else mips3_device::WDOUBLE(address, data);
}
-inline void r5900le_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
+inline void r5900_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
{
if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask);
else mips3_device::WDOUBLE_MASKED(address, data, mem_mask);
@@ -1564,18 +1748,18 @@ inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t dat
}
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_WRITE_ALLOWED)
+ if (tlbval & WRITE_ALLOWED)
{
(*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data_lo);
(*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | ((address + 8) & 0xfff), data_hi);
}
else
{
- if(tlbval & VTLB_READ_ALLOWED)
+ if(tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & VTLB_FLAG_FIXED)
+ else if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1586,7 +1770,39 @@ inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t dat
}
}
-inline bool r5900le_device::RBYTE(offs_t address, uint32_t *result) {
+inline void r5900be_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t data_lo)
+{
+ if (address >= 0x70000000 && address < 0x70004000)
+ {
+ (*m_memory.write_qword)(*m_program, address, data_hi);
+ (*m_memory.write_qword)(*m_program, address + 8, data_lo);
+ return;
+ }
+
+ const uint32_t tlbval = vtlb_table()[address >> 12];
+ if (tlbval & WRITE_ALLOWED)
+ {
+ (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data_hi);
+ (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | ((address + 8) & 0xfff), data_lo);
+ }
+ else
+ {
+ if(tlbval & READ_ALLOWED)
+ {
+ generate_tlb_exception(EXCEPTION_TLBMOD, address);
+ }
+ else if(tlbval & FLAG_FIXED)
+ {
+ generate_tlb_exception(EXCEPTION_TLBSTORE, address);
+ }
+ else
+ {
+ generate_tlb_exception(EXCEPTION_TLBSTORE_FILL, address);
+ }
+ }
+}
+
+inline bool r5900_device::RBYTE(offs_t address, uint32_t *result) {
if (address >= 0x70000000 && address < 0x70004000) {
*result = (*m_memory.read_byte)(*m_program, address);
return true;
@@ -1594,7 +1810,7 @@ inline bool r5900le_device::RBYTE(offs_t address, uint32_t *result) {
return mips3_device::RBYTE(address, result);
}
-inline bool r5900le_device::RHALF(offs_t address, uint32_t *result)
+inline bool r5900_device::RHALF(offs_t address, uint32_t *result)
{
if (address >= 0x70000000 && address < 0x70004000)
{
@@ -1604,7 +1820,7 @@ inline bool r5900le_device::RHALF(offs_t address, uint32_t *result)
return mips3_device::RHALF(address, result);
}
-inline bool r5900le_device::RWORD(offs_t address, uint32_t *result, bool insn)
+inline bool r5900_device::RWORD(offs_t address, uint32_t *result, bool insn)
{
if (address >= 0x70000000 && address < 0x70004000)
{
@@ -1614,7 +1830,7 @@ inline bool r5900le_device::RWORD(offs_t address, uint32_t *result, bool insn)
return mips3_device::RWORD(address, result, insn);
}
-inline bool r5900le_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask)
+inline bool r5900_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_t mem_mask)
{
if (address >= 0x70000000 && address < 0x70004000)
{
@@ -1624,7 +1840,7 @@ inline bool r5900le_device::RWORD_MASKED(offs_t address, uint32_t *result, uint3
return mips3_device::RWORD_MASKED(address, result, mem_mask);
}
-inline bool r5900le_device::RDOUBLE(offs_t address, uint64_t *result)
+inline bool r5900_device::RDOUBLE(offs_t address, uint64_t *result)
{
if (address >= 0x70000000 && address < 0x70004000)
{
@@ -1634,7 +1850,7 @@ inline bool r5900le_device::RDOUBLE(offs_t address, uint64_t *result)
return mips3_device::RDOUBLE(address, result);
}
-inline bool r5900le_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask)
+inline bool r5900_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint64_t mem_mask)
{
if (address >= 0x70000000 && address < 0x70004000)
{
@@ -1654,14 +1870,46 @@ inline bool r5900le_device::RQUAD(offs_t address, uint64_t *result_hi, uint64_t
}
const uint32_t tlbval = vtlb_table()[address >> 12];
- if (tlbval & VTLB_READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
*result_lo = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff));
*result_hi = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | ((address + 8) & 0xfff));
}
else
{
- if(tlbval & VTLB_FLAG_FIXED)
+ if(tlbval & FLAG_FIXED)
+ {
+ generate_tlb_exception(EXCEPTION_TLBLOAD, address);
+ }
+ else
+ {
+ generate_tlb_exception(EXCEPTION_TLBLOAD_FILL, address);
+ }
+ *result_hi = 0;
+ *result_lo = 0;
+ return false;
+ }
+ return true;
+}
+
+inline bool r5900be_device::RQUAD(offs_t address, uint64_t *result_hi, uint64_t *result_lo)
+{
+ if (address >= 0x70000000 && address < 0x70004000)
+ {
+ *result_hi = (*m_memory.read_qword)(*m_program, address);
+ *result_lo = (*m_memory.read_qword)(*m_program, address + 8);
+ return true;
+ }
+
+ const uint32_t tlbval = vtlb_table()[address >> 12];
+ if (tlbval & READ_ALLOWED)
+ {
+ *result_hi = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff));
+ *result_lo = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | ((address + 8) & 0xfff));
+ }
+ else
+ {
+ if(tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1705,23 +1953,40 @@ uint64_t mips3_device::get_cop0_reg(int idx)
}
else if (idx == COP0_Random)
{
- int wired = m_core->cpr[0][COP0_Wired] & 0x3f;
- int range = 48 - wired;
- if (range > 0)
- return ((total_cycles() - m_core->count_zero_time) % range + wired) & 0x3f;
- else
- return 47;
+ uint32_t wired = m_core->cpr[0][COP0_Wired] & 0x3f;
+ uint32_t unwired = m_tlbentries - wired;
+
+ if (unwired == 0)
+ return m_tlbentries - 1;
+
+ return (generate_tlb_index() % unwired) + wired;
}
return m_core->cpr[0][idx];
}
+void r4650_device::set_cop0_reg(int idx, uint64_t val)
+{
+ switch (idx)
+ {
+ case COP0_R4650_IBase:
+ case COP0_R4650_IBound:
+ case COP0_R4650_DBase:
+ case COP0_R4650_DBound:
+ m_core->cpr[0][idx] = val;
+ break;
+ default:
+ mips3_device::set_cop0_reg(idx, val);
+ break;
+ }
+}
+
void mips3_device::set_cop0_reg(int idx, uint64_t val)
{
switch (idx)
{
case COP0_Cause:
CAUSE = (CAUSE & 0xfc00) | (val & ~0xfc00);
- if (CAUSE & 0x300)
+ if ((CAUSE & SR & 0x300) && (SR & SR_IE) && !(SR & (SR_EXL | SR_ERL)))
{
/* if we're in a delay slot, propogate the target PC before generating the exception */
if (m_nextpc != ~0)
@@ -1812,8 +2077,8 @@ void mips3_device::handle_cop0(uint32_t op)
case 0x08: /* BC */
switch (RTREG)
{
- case 0x00: /* BCzF */ if (!m_cf[0]) ADDPC(SIMMVAL); break;
- case 0x01: /* BCzF */ if (m_cf[0]) ADDPC(SIMMVAL); break;
+ case 0x00: /* BCzF */ if (!m_cf[0][0]) ADDPC(SIMMVAL); break;
+ case 0x01: /* BCzF */ if (m_cf[0][0]) ADDPC(SIMMVAL); break;
case 0x02: /* BCzFL */ invalid_instruction(op); break;
case 0x03: /* BCzTL */ invalid_instruction(op); break;
default: invalid_instruction(op); break;
@@ -2876,7 +3141,7 @@ inline void mips3_device::set_cop2_creg(int idx, uint64_t val)
m_core->vfr[idx][0] = val;
}
-inline void r5900le_device::handle_dmfc2(uint32_t op)
+inline void r5900_device::handle_dmfc2(uint32_t op)
{
// QMFC2
if (!RTREG)
@@ -2894,7 +3159,7 @@ inline void r5900le_device::handle_dmfc2(uint32_t op)
m_core->rh[rt] = ((uint64_t)rtval[3] << 32) | rtval[2];
}
-inline void r5900le_device::handle_dmtc2(uint32_t op)
+inline void r5900_device::handle_dmtc2(uint32_t op)
{
// QMTC2
uint32_t rt = RTREG;
@@ -2906,23 +3171,23 @@ inline void r5900le_device::handle_dmtc2(uint32_t op)
}
}
-inline uint64_t r5900le_device::get_cop2_reg(int idx)
+inline uint64_t r5900_device::get_cop2_reg(int idx)
{
return reinterpret_cast<uint32_t*>(m_core->vfr[idx])[0];
}
-inline void r5900le_device::set_cop2_reg(int idx, uint64_t val)
+inline void r5900_device::set_cop2_reg(int idx, uint64_t val)
{
reinterpret_cast<uint32_t*>(m_core->vfr[idx])[0] = (uint32_t)val;
}
-inline uint64_t r5900le_device::get_cop2_creg(int idx)
+inline uint64_t r5900_device::get_cop2_creg(int idx)
{
logerror("%s: CFC2: Getting ccr[%d] (%08x)\n", machine().describe_context(), idx, m_core->vcr[idx]);
return m_core->vcr[idx];
}
-inline void r5900le_device::set_cop2_creg(int idx, uint64_t val)
+inline void r5900_device::set_cop2_creg(int idx, uint64_t val)
{
if (idx < 16)
{
@@ -3013,8 +3278,8 @@ void mips3_device::handle_cop2(uint32_t op)
case 0x08: /* BC */
switch (RTREG)
{
- case 0x00: /* BCzF */ if (!m_cf[2]) ADDPC(SIMMVAL); break;
- case 0x01: /* BCzT */ if (m_cf[2]) ADDPC(SIMMVAL); break;
+ case 0x00: /* BCzF */ if (!m_cf[2][0]) ADDPC(SIMMVAL); break;
+ case 0x01: /* BCzT */ if (m_cf[2][0]) ADDPC(SIMMVAL); break;
case 0x02: /* BCzFL */ invalid_instruction(op); break;
case 0x03: /* BCzTL */ invalid_instruction(op); break;
default: invalid_instruction(op); break;
@@ -3034,7 +3299,7 @@ void mips3_device::handle_extra_cop2(uint32_t op)
VU0/1 (COP2) EXECUTION HANDLING (R5900)
***************************************************************************/
-void r5900le_device::handle_extra_cop2(uint32_t op)
+void r5900_device::handle_extra_cop2(uint32_t op)
{
// TODO: Flags, rounding...
const int rd = (op >> 6) & 31;
@@ -3497,7 +3762,7 @@ void mips3_device::handle_mult(uint32_t op)
m_core->icount -= 3;
}
-void r5900le_device::handle_mult(uint32_t op)
+void r5900_device::handle_mult(uint32_t op)
{
mips3_device::handle_mult(op);
if (RDREG) RDVAL64 = LOVAL64;
@@ -3511,7 +3776,7 @@ void mips3_device::handle_multu(uint32_t op)
m_core->icount -= 3;
}
-void r5900le_device::handle_multu(uint32_t op)
+void r5900_device::handle_multu(uint32_t op)
{
mips3_device::handle_multu(op);
if (RDREG) RDVAL64 = LOVAL64;
@@ -3561,11 +3826,11 @@ void mips3_device::handle_special(uint32_t op)
m_core->icount -= 35;
break;
case 0x1c: /* DMULT */
- LOVAL64 = mul_64x64(RSVAL64, RTVAL64, reinterpret_cast<s64 *>(&HIVAL64));
+ LOVAL64 = mul_64x64(RSVAL64, RTVAL64, *reinterpret_cast<s64 *>(&HIVAL64));
m_core->icount -= 7;
break;
case 0x1d: /* DMULTU */
- LOVAL64 = mulu_64x64(RSVAL64, RTVAL64, &HIVAL64);
+ LOVAL64 = mulu_64x64(RSVAL64, RTVAL64, HIVAL64);
m_core->icount -= 7;
break;
case 0x1e: /* DDIV */
@@ -3651,7 +3916,7 @@ void mips3_device::handle_idt(uint32_t op)
}
}
-void r5900le_device::handle_extra_base(uint32_t op)
+void r5900_device::handle_extra_base(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
@@ -3680,7 +3945,7 @@ void r5900le_device::handle_extra_base(uint32_t op)
}
}
-void r5900le_device::handle_extra_special(uint32_t op)
+void r5900_device::handle_extra_special(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rd = (op >> 11) & 31;
@@ -3699,7 +3964,7 @@ void r5900le_device::handle_extra_special(uint32_t op)
}
}
-void r5900le_device::handle_extra_regimm(uint32_t op)
+void r5900_device::handle_extra_regimm(uint32_t op)
{
switch (op & 63)
{
@@ -3715,7 +3980,7 @@ void r5900le_device::handle_extra_regimm(uint32_t op)
}
}
-void r5900le_device::handle_extra_cop0(uint32_t op)
+void r5900_device::handle_extra_cop0(uint32_t op)
{
switch (op & 0x01ffffff)
{
@@ -3733,7 +3998,7 @@ void r5900le_device::handle_extra_cop0(uint32_t op)
}
}
-void r5900le_device::handle_extra_cop1(uint32_t op)
+void r5900_device::handle_extra_cop1(uint32_t op)
{
switch (op & 0x3f)
{
@@ -3748,7 +4013,7 @@ void r5900le_device::handle_extra_cop1(uint32_t op)
}
}
-void r5900le_device::handle_idt(uint32_t op)
+void r5900_device::handle_idt(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
@@ -3972,7 +4237,7 @@ void r5900le_device::handle_idt(uint32_t op)
}
}
-void r5900le_device::handle_mmi0(uint32_t op)
+void r5900_device::handle_mmi0(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
@@ -4431,7 +4696,7 @@ void r5900le_device::handle_mmi0(uint32_t op)
}
}
-void r5900le_device::handle_mmi1(uint32_t op)
+void r5900_device::handle_mmi1(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
@@ -4795,7 +5060,7 @@ void r5900le_device::handle_mmi1(uint32_t op)
}
}
-void r5900le_device::handle_mmi2(uint32_t op)
+void r5900_device::handle_mmi2(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
@@ -4922,7 +5187,7 @@ void r5900le_device::handle_mmi2(uint32_t op)
}
}
-void r5900le_device::handle_mmi3(uint32_t op)
+void r5900_device::handle_mmi3(uint32_t op)
{
const int rs = (op >> 21) & 31;
const int rt = (op >> 16) & 31;
@@ -5021,7 +5286,7 @@ void mips3_device::handle_sdc2(uint32_t op)
WDOUBLE(SIMMVAL+RSVAL32, get_cop2_reg(RTREG));
}
-void r5900le_device::handle_ldc2(uint32_t op)
+void r5900_device::handle_ldc2(uint32_t op)
{
/* LQC2 */
const uint32_t base = SIMMVAL + RSVAL32;
@@ -5033,7 +5298,7 @@ void r5900le_device::handle_ldc2(uint32_t op)
}
}
-void r5900le_device::handle_sdc2(uint32_t op)
+void r5900_device::handle_sdc2(uint32_t op)
{
/* SQC2 */
const uint32_t base = SIMMVAL + RSVAL32;
@@ -5044,15 +5309,6 @@ void r5900le_device::handle_sdc2(uint32_t op)
}
}
-void mips3_device::burn_cycles(int32_t cycles)
-{
- execute_burn(cycles);
-}
-
-#if ENABLE_O2_DPRINTF
-#include "o2dprintf.hxx"
-#endif
-
void mips3_device::execute_run()
{
if (m_isdrc)
@@ -5210,12 +5466,12 @@ void mips3_device::execute_run()
{
// Should actually use physical address
m_core->cpr[0][COP0_LLAddr] = SIMMVAL + RSVAL32;
- RTVAL64 = temp;
+ RTVAL64 = int64_t(int32_t(temp));
m_core->llbit = 1;
if LL_BREAK
machine().debug_break();
- break;
}
+ break;
case 0x31: /* LWC1 */
if (!(SR & SR_COP1))
{
@@ -5236,18 +5492,18 @@ void mips3_device::execute_run()
m_core->llbit = 1;
if LL_BREAK
machine().debug_break();
- break;
}
+ break;
case 0x35: /* LDC1 */
- if (!(SR & SR_COP1))
- {
- m_badcop_value = 1;
- generate_exception(EXCEPTION_BADCOP, 1);
+ if (!(SR & SR_COP1))
+ {
+ m_badcop_value = 1;
+ generate_exception(EXCEPTION_BADCOP, 1);
+ break;
+ }
+ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64))
+ set_cop1_reg64(RTREG, temp64);
break;
- }
- if (RDOUBLE(SIMMVAL+RSVAL32, &temp64))
- set_cop1_reg64(RTREG, temp64);
- break;
case 0x36: handle_ldc2(op); break;
case 0x37: /* LD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) RTVAL64 = temp64; break;
case 0x38: /* SC */
@@ -5303,12 +5559,10 @@ void mips3_device::execute_run()
m_delayslot = false;
m_core->icount--;
-#if ENABLE_O2_DPRINTF
- if (m_core->pc == 0xbfc04d74)
+ if (ENABLE_O2_DPRINTF && m_core->pc == 0xbfc04d74)
{
do_o2_dprintf((uint32_t)m_core->r[4], (uint32_t)m_core->r[5], (uint32_t)m_core->r[6], (uint32_t)m_core->r[7], (uint32_t)m_core->r[29] + 16);
}
-#endif
#if ENABLE_EE_ELF_LOADER
static bool elf_loaded = false;