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Diffstat (limited to 'src/devices/cpu/mcs96/mcs96ops.lst')
-rw-r--r--src/devices/cpu/mcs96/mcs96ops.lst164
1 files changed, 82 insertions, 82 deletions
diff --git a/src/devices/cpu/mcs96/mcs96ops.lst b/src/devices/cpu/mcs96/mcs96ops.lst
index 3c2516ae54a..062b70706bf 100644
--- a/src/devices/cpu/mcs96/mcs96ops.lst
+++ b/src/devices/cpu/mcs96/mcs96ops.lst
@@ -37,7 +37,7 @@ fetch_noirq
inst_state = OP1;
eadr rel8
- OP1 = INT8(read_pc());
+ OP1 = int8_t(read_pc());
eadr rel11
OP1 = read_pc();
@@ -51,11 +51,11 @@ eadr rel16
eadr rrel8
OP2 = read_pc();
- OP1 = INT8(read_pc());
+ OP1 = int8_t(read_pc());
eadr brrel8
OP2 = read_pc();
- OP1 = INT8(read_pc());
+ OP1 = int8_t(read_pc());
eadr direct_1
OP1 = read_pc();
@@ -134,7 +134,7 @@ eadr indexed_1
OPI &= 0xfe;
OP1 |= read_pc() << 8;
} else
- OP1 = INT8(OP1);
+ OP1 = int8_t(OP1);
if(OPI) {
OP1 += reg_r16(OPI);
}
@@ -196,7 +196,7 @@ macro post_indexed $cycles1 $cycles2
06 ext direct_1
OP1 &= 0xfc;
- TMP = INT16(reg_r16(OP1));
+ TMP = int16_t(reg_r16(OP1));
set_nz16(TMP);
reg_w16(OP1+2, TMP >> 16);
next(4);
@@ -216,10 +216,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 16 && (TMP & (0x0001 << (OP1-1))))
PSW |= F_C;
- TMP = UINT16(TMP) >> OP1;
+ TMP = uint16_t(TMP) >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT16(TMP) < 0)
+ else if(int16_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -234,10 +234,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 16 && (TMP & (0x8000 >> (OP1-1))))
PSW |= F_C;
- TMP = UINT16(TMP << OP1);
+ TMP = uint16_t(TMP << OP1);
if(!TMP)
PSW |= F_Z;
- else if(INT16(TMP) < 0)
+ else if(int16_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -252,10 +252,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 16 && (TMP & (0x0001 << (OP1-1))))
PSW |= F_C;
- TMP = INT16(TMP) >> OP1;
+ TMP = int16_t(TMP) >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT16(TMP) < 0)
+ else if(int16_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -275,7 +275,7 @@ macro post_indexed $cycles1 $cycles2
TMP = TMP >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT32(TMP) < 0)
+ else if(int32_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -296,7 +296,7 @@ macro post_indexed $cycles1 $cycles2
TMP = TMP << OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT32(TMP) < 0)
+ else if(int32_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -314,10 +314,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && (TMP & (0x00000001 << (OP1-1))))
PSW |= F_C;
- TMP = INT32(TMP) >> OP1;
+ TMP = int32_t(TMP) >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT32(TMP) < 0)
+ else if(int32_t(TMP) < 0)
PSW |= F_N;
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -327,7 +327,7 @@ macro post_indexed $cycles1 $cycles2
OP2 &= 0xfc;
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2) << 16;
- for(OP3 = 0; OP3 < 31 && INT32(TMP) >= 0; OP3++);
+ for(OP3 = 0; OP3 < 31 && int32_t(TMP) >= 0; OP3++);
PSW &= ~(F_Z|F_N|F_C);
if(!TMP)
PSW |= F_Z;
@@ -360,7 +360,7 @@ macro post_indexed $cycles1 $cycles2
16 extb direct_1
OP1 &= 0xfe;
- TMP = INT8(reg_r8(OP1));
+ TMP = int8_t(reg_r8(OP1));
set_nz8(TMP);
reg_w16(OP1, TMP);
next(4);
@@ -380,10 +380,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 8 && (TMP & (0x01 << (OP1-1))))
PSW |= F_C;
- TMP = UINT8(TMP) >> OP1;
+ TMP = uint8_t(TMP) >> OP1;
if(!TMP)
PSW |= F_Z;
- else if(INT8(TMP) < 0)
+ else if(int8_t(TMP) < 0)
PSW |= F_N;
reg_w8(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -398,10 +398,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 8 && (TMP & (0x80 >> (OP1-1))))
PSW |= F_C;
- TMP = UINT8(TMP << OP1);
+ TMP = uint8_t(TMP << OP1);
if(!TMP)
PSW |= F_Z;
- else if(INT8(TMP) < 0)
+ else if(int8_t(TMP) < 0)
PSW |= F_N;
reg_w8(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -416,10 +416,10 @@ macro post_indexed $cycles1 $cycles2
PSW |= F_ST;
if(OP1 >= 1 && OP1 <= 8 && (TMP & (0x01 << (OP1-1))))
PSW |= F_C;
- TMP = UINT8(INT8(TMP) >> OP1);
+ TMP = uint8_t(int8_t(TMP) >> OP1);
if(!TMP)
PSW |= F_Z;
- else if(INT8(TMP) < 0)
+ else if(int8_t(TMP) < 0)
PSW |= F_N;
reg_w8(OP2, TMP);
next(OP1 ? 7+OP1 : 8);
@@ -560,14 +560,14 @@ macro post_indexed $cycles1 $cycles2
fe4c mul direct_3
TMP = reg_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
OP3 &= 0xfc;
reg_w16(OP3, TMP);
reg_w16(OP3+2, TMP >> 16);
next(30);
fe4d mul immed_3w
- TMP = INT16(OP1) * INT16(reg_r16(OP2));
+ TMP = int16_t(OP1) * int16_t(reg_r16(OP2));
OP3 &= 0xfc;
reg_w16(OP3, TMP);
reg_w16(OP3+2, TMP >> 16);
@@ -575,7 +575,7 @@ fe4d mul immed_3w
fe4e mul indirect_3
TMP = any_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
OP3 &= 0xfc;
reg_w16(OP3, TMP);
reg_w16(OP3+2, TMP >> 16);
@@ -583,7 +583,7 @@ fe4e mul indirect_3
fe4f mul indexed_3
TMP = any_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
OP3 &= 0xfc;
reg_w16(OP3, TMP);
reg_w16(OP3+2, TMP >> 16);
@@ -687,24 +687,24 @@ fe4f mul indexed_3
fe5c mulb direct_3
TMP = reg_r8(OP1);
- TMP = INT8(reg_r8(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r8(OP2)) * int8_t(TMP);
reg_w16(OP3, TMP);
next(22);
fe5d mulb immed_3b
- TMP = INT8(OP1) * INT8(reg_r8(OP2));
+ TMP = int8_t(OP1) * int8_t(reg_r8(OP2));
reg_w16(OP3, TMP);
next(22);
fe5e mulb indirect_3
TMP = any_r8(OP1);
- TMP = INT8(reg_r8(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r8(OP2)) * int8_t(TMP);
reg_w16(OP3, TMP);
post_indirect 1 24 25 // +5 when external
fe5f mulb indexed_3
TMP = any_r8(OP1);
- TMP = INT8(reg_r8(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r8(OP2)) * int8_t(TMP);
reg_w16(OP3, TMP);
post_indexed 24 25 // +5 when external
@@ -815,14 +815,14 @@ fe5f mulb indexed_3
fe6c mul direct_2
OP2 &= 0xfc;
TMP = reg_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
next(29);
fe6d mul immed_2w
OP2 &= 0xfc;
- TMP = INT16(OP1) * INT16(reg_r16(OP2));
+ TMP = int16_t(OP1) * int16_t(reg_r16(OP2));
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
next(30);
@@ -830,7 +830,7 @@ fe6d mul immed_2w
fe6e mul indirect_2
OP2 &= 0xfc;
TMP = any_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
post_indirect 2 31 32 // +5 when external
@@ -838,7 +838,7 @@ fe6e mul indirect_2
fe6f mul indexed_2
OP2 &= 0xfc;
TMP = any_r16(OP1);
- TMP = INT16(reg_r16(OP2)) * INT16(TMP);
+ TMP = int16_t(reg_r16(OP2)) * int16_t(TMP);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
post_indexed 31 32 // +5 when external
@@ -946,27 +946,27 @@ fe6f mul indexed_2
fe7c mulb direct_2
OP2 &= 0xfe;
TMP = reg_r8(OP1);
- TMP = INT8(reg_r16(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r16(OP2)) * int8_t(TMP);
reg_w16(OP2, TMP);
next(21);
fe7d mulb immed_2b
OP2 &= 0xfe;
- TMP = INT8(OP1) * INT8(reg_r8(OP2));
+ TMP = int8_t(OP1) * int8_t(reg_r8(OP2));
reg_w16(OP2, TMP);
next(21);
fe7e mulb indirect_2
OP2 &= 0xfe;
TMP = any_r8(OP1);
- TMP = INT8(reg_r8(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r8(OP2)) * int8_t(TMP);
reg_w16(OP2, TMP);
post_indirect 1 23 24 // +5 when external
fe7f mulb indexed_2
OP2 &= 0xfe;
TMP = any_r16(OP1);
- TMP = INT8(reg_r16(OP2)) * INT8(TMP);
+ TMP = int8_t(reg_r16(OP2)) * int8_t(TMP);
reg_w16(OP2, TMP);
post_indexed 23 24 // +5 when external
@@ -1050,7 +1050,7 @@ fe7f mulb indexed_2
if(OP1) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- UINT32 TMP2 = TMP / OP1;
+ uint32_t TMP2 = TMP / OP1;
if(TMP2 > 65535)
PSW |= F_V|F_VT;
TMP = TMP % OP1;
@@ -1066,7 +1066,7 @@ fe7f mulb indexed_2
if(OP1) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- UINT32 TMP2 = TMP / OP1;
+ uint32_t TMP2 = TMP / OP1;
if(TMP2 > 65535)
PSW |= F_V|F_VT;
TMP = TMP % OP1;
@@ -1079,11 +1079,11 @@ fe7f mulb indexed_2
8e divu indirect_2
OP2 &= 0xfc;
PSW &= ~F_V;
- UINT32 d = any_r16(OP1);
+ uint32_t d = any_r16(OP1);
if(d) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- UINT32 TMP2 = TMP / d;
+ uint32_t TMP2 = TMP / d;
if(TMP2 > 65535)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1096,11 +1096,11 @@ fe7f mulb indexed_2
8f divu indexed_2
OP2 &= 0xfc;
PSW &= ~F_V;
- UINT32 d = any_r16(OP1);
+ uint32_t d = any_r16(OP1);
if(d) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- UINT32 TMP2 = TMP / d;
+ uint32_t TMP2 = TMP / d;
if(TMP2 > 65535)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1117,10 +1117,10 @@ fe8c div direct_2
if(OP1) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- INT32 TMP2 = INT32(TMP) / INT16(OP1);
+ int32_t TMP2 = int32_t(TMP) / int16_t(OP1);
if(TMP2 > 32767 || TMP2 < -32768)
PSW |= F_V|F_VT;
- TMP = TMP % INT16(OP1);
+ TMP = TMP % int16_t(OP1);
TMP = (TMP2 & 0xffff) | ((TMP & 0xffff) << 16);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -1133,10 +1133,10 @@ fe8d div immed_2w
if(OP1) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- INT32 TMP2 = INT32(TMP) / INT16(OP1);
+ int32_t TMP2 = int32_t(TMP) / int16_t(OP1);
if(TMP2 > 32767 || TMP2 < -32768)
PSW |= F_V|F_VT;
- TMP = TMP % INT16(OP1);
+ TMP = TMP % int16_t(OP1);
TMP = (TMP2 & 0xffff) | ((TMP & 0xffff) << 16);
reg_w16(OP2, TMP);
reg_w16(OP2+2, TMP >> 16);
@@ -1146,11 +1146,11 @@ fe8d div immed_2w
fe8e div indirect_2
OP2 &= 0xfc;
PSW &= ~F_V;
- INT32 d = INT16(any_r16(OP1));
+ int32_t d = int16_t(any_r16(OP1));
if(d) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- INT32 TMP2 = INT32(TMP) / d;
+ int32_t TMP2 = int32_t(TMP) / d;
if(TMP2 > 32767 || TMP2 < -32768)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1163,11 +1163,11 @@ fe8e div indirect_2
fe8f div indexed_2
OP2 &= 0xfc;
PSW &= ~F_V;
- INT32 d = INT16(any_r16(OP1));
+ int32_t d = int16_t(any_r16(OP1));
if(d) {
TMP = reg_r16(OP2);
TMP |= reg_r16(OP2+2);
- INT32 TMP2 = INT32(TMP) / d;
+ int32_t TMP2 = int32_t(TMP) / d;
if(TMP2 > 32767 || TMP2 < -32768)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1255,7 +1255,7 @@ fe8f div indexed_2
OP1 = reg_r8(OP1);
if(OP1) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = TMP / OP1;
+ uint32_t TMP2 = TMP / OP1;
if(TMP2 > 255)
PSW |= F_V|F_VT;
TMP = TMP % OP1;
@@ -1268,7 +1268,7 @@ fe8f div indexed_2
PSW &= ~F_V;
if(OP1) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = TMP / OP1;
+ uint32_t TMP2 = TMP / OP1;
if(TMP2 > 255)
PSW |= F_V|F_VT;
TMP = TMP % OP1;
@@ -1279,10 +1279,10 @@ fe8f div indexed_2
9e divub indirect_2
PSW &= ~F_V;
- UINT32 d = any_r8(OP1);
+ uint32_t d = any_r8(OP1);
if(d) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = TMP / d;
+ uint32_t TMP2 = TMP / d;
if(TMP2 > 255)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1293,10 +1293,10 @@ fe8f div indexed_2
9f divub indexed_2
PSW &= ~F_V;
- UINT32 d = any_r8(OP1);
+ uint32_t d = any_r8(OP1);
if(d) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = TMP / d;
+ uint32_t TMP2 = TMP / d;
if(TMP2 > 255)
PSW |= F_V|F_VT;
TMP = TMP % d;
@@ -1310,10 +1310,10 @@ fe9c divb direct_2
OP1 = reg_r8(OP1);
if(OP1) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = INT16(TMP) / INT8(OP1);
- if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
+ uint32_t TMP2 = int16_t(TMP) / int8_t(OP1);
+ if(int16_t(TMP2) > 127 || int16_t(TMP2) < -128)
PSW |= F_V|F_VT;
- TMP = INT16(TMP) % INT8(OP1);
+ TMP = int16_t(TMP) % int8_t(OP1);
TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
reg_w16(OP2, TMP);
}
@@ -1323,10 +1323,10 @@ fe9d divb immed_2b
PSW &= ~F_V;
if(OP1) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = INT16(TMP) / INT8(OP1);
- if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
+ uint32_t TMP2 = int16_t(TMP) / int8_t(OP1);
+ if(int16_t(TMP2) > 127 || int16_t(TMP2) < -128)
PSW |= F_V|F_VT;
- TMP = INT16(TMP) % INT8(OP1);
+ TMP = int16_t(TMP) % int8_t(OP1);
TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
reg_w16(OP2, TMP);
}
@@ -1334,13 +1334,13 @@ fe9d divb immed_2b
fe9e divb indirect_2
PSW &= ~F_V;
- INT32 d = INT8(any_r8(OP1));
+ int32_t d = int8_t(any_r8(OP1));
if(d) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = INT16(TMP) / d;
- if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
+ uint32_t TMP2 = int16_t(TMP) / d;
+ if(int16_t(TMP2) > 127 || int16_t(TMP2) < -128)
PSW |= F_V|F_VT;
- TMP = INT16(TMP) % d;
+ TMP = int16_t(TMP) % d;
TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
reg_w16(OP2, TMP);
}
@@ -1348,13 +1348,13 @@ fe9e divb indirect_2
fe9f divb indexed_2
PSW &= ~F_V;
- INT32 d = INT8(any_r8(OP1));
+ int32_t d = int8_t(any_r8(OP1));
if(d) {
TMP = reg_r16(OP2);
- UINT32 TMP2 = INT16(TMP) / d;
- if(INT16(TMP2) > 127 || INT16(TMP2) < -128)
+ uint32_t TMP2 = int16_t(TMP) / d;
+ if(int16_t(TMP2) > 127 || int16_t(TMP2) < -128)
PSW |= F_V|F_VT;
- TMP = INT16(TMP) % d;
+ TMP = int16_t(TMP) % d;
TMP = (TMP2 & 0xff) | ((TMP & 0xff) << 8);
reg_w16(OP2, TMP);
}
@@ -1423,19 +1423,19 @@ ab subc indexed_2
post_indexed 6 7 // +5 when external
ac ldbze direct_2
- reg_w16(OP2, UINT8(reg_r8(OP1)));
+ reg_w16(OP2, uint8_t(reg_r8(OP1)));
next(4);
ad ldbze immed_2b
- reg_w16(OP2, UINT8(OP1));
+ reg_w16(OP2, uint8_t(OP1));
next(4);
ae ldbze indirect_2
- reg_w16(OP2, UINT8(any_r8(OP1)));
+ reg_w16(OP2, uint8_t(any_r8(OP1)));
post_indirect 1 6 7 // +5 when external
af ldbze indexed_2
- reg_w16(OP2, UINT8(any_r8(OP1)));
+ reg_w16(OP2, uint8_t(any_r8(OP1)));
post_indexed 6 7 // +5 when external
b0 ldb direct_2
@@ -1501,19 +1501,19 @@ bb subcb indexed_2
post_indexed 6 7 // +5 when external
bc ldbse direct_2
- reg_w16(OP2, INT8(reg_r8(OP1)));
+ reg_w16(OP2, int8_t(reg_r8(OP1)));
next(4);
bd ldbse immed_2b
- reg_w16(OP2, INT8(OP1));
+ reg_w16(OP2, int8_t(OP1));
next(4);
be ldbse indirect_2
- reg_w16(OP2, INT8(any_r8(OP1)));
+ reg_w16(OP2, int8_t(any_r8(OP1)));
post_indirect 1 6 7 // +5 when external
bf ldbse indexed_2
- reg_w16(OP2, INT8(any_r8(OP1)));
+ reg_w16(OP2, int8_t(any_r8(OP1)));
post_indexed 6 7 // +5 when external
c0 st direct_2
@@ -1752,7 +1752,7 @@ df je rel8
e0 djnz rrel8
TMP = reg_r8(OP2);
- TMP = UINT8(TMP-1);
+ TMP = uint8_t(TMP-1);
reg_w8(OP2, TMP);
if(TMP) {
PC += OP1;