summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/m68000/m68kfpu.hxx
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/cpu/m68000/m68kfpu.hxx')
-rw-r--r--src/devices/cpu/m68000/m68kfpu.hxx1073
1 files changed, 535 insertions, 538 deletions
diff --git a/src/devices/cpu/m68000/m68kfpu.hxx b/src/devices/cpu/m68000/m68kfpu.hxx
index e53f4ad899d..5e2c74770f3 100644
--- a/src/devices/cpu/m68000/m68kfpu.hxx
+++ b/src/devices/cpu/m68000/m68kfpu.hxx
@@ -1,23 +1,20 @@
// license:BSD-3-Clause
// copyright-holders:Karl Stenerud
-#include <math.h>
-#define FPCC_N 0x08000000
-#define FPCC_Z 0x04000000
-#define FPCC_I 0x02000000
-#define FPCC_NAN 0x01000000
+static constexpr int FPCC_N = 0x08000000;
+static constexpr int FPCC_Z = 0x04000000;
+static constexpr int FPCC_I = 0x02000000;
+static constexpr int FPCC_NAN = 0x01000000;
-#define FPES_OE 0x00002000
-#define FPAE_IOP 0x00000080
+static constexpr int FPES_OE = 0x00002000;
+static constexpr int FPAE_IOP = 0x00000080;
-#define DOUBLE_INFINITY 0x7ff0000000000000U
-#define DOUBLE_EXPONENT 0x7ff0000000000000U
-#define DOUBLE_MANTISSA 0x000fffffffffffffU
-
-extern flag floatx80_is_nan( floatx80 a );
+static constexpr uint64_t DOUBLE_INFINITY = 0x7ff0000000000000U;
+static constexpr uint64_t DOUBLE_EXPONENT = 0x7ff0000000000000U;
+static constexpr uint64_t DOUBLE_MANTISSA = 0x000fffffffffffffU;
// masks for packed dwords, positive k-factor
-static const uint32_t pkmask2[18] =
+const uint32_t pkmask2[18] =
{
0xffffffff, 0, 0xf0000000, 0xff000000, 0xfff00000, 0xffff0000,
0xfffff000, 0xffffff00, 0xfffffff0, 0xffffffff,
@@ -25,7 +22,7 @@ static const uint32_t pkmask2[18] =
0xffffffff, 0xffffffff, 0xffffffff
};
-static const uint32_t pkmask3[18] =
+const uint32_t pkmask3[18] =
{
0xffffffff, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0xf0000000, 0xff000000, 0xfff00000, 0xffff0000,
@@ -53,15 +50,15 @@ static inline floatx80 double_to_fx80(double in)
return float64_to_floatx80(*d);
}
-static inline floatx80 load_extended_float80(m68000_base_device *m68k, uint32_t ea)
+inline floatx80 load_extended_float80(uint32_t ea)
{
uint32_t d1,d2;
uint16_t d3;
floatx80 fp;
- d3 = m68ki_read_16(m68k, ea);
- d1 = m68ki_read_32(m68k, ea+4);
- d2 = m68ki_read_32(m68k, ea+8);
+ d3 = m68ki_read_16(ea);
+ d1 = m68ki_read_32(ea+4);
+ d2 = m68ki_read_32(ea+8);
fp.high = d3;
fp.low = ((uint64_t)d1<<32) | (d2 & 0xffffffff);
@@ -69,24 +66,24 @@ static inline floatx80 load_extended_float80(m68000_base_device *m68k, uint32_t
return fp;
}
-static inline void store_extended_float80(m68000_base_device *m68k, uint32_t ea, floatx80 fpr)
+inline void store_extended_float80(uint32_t ea, floatx80 fpr)
{
- m68ki_write_16(m68k, ea+0, fpr.high);
- m68ki_write_16(m68k, ea+2, 0);
- m68ki_write_32(m68k, ea+4, (fpr.low>>32)&0xffffffff);
- m68ki_write_32(m68k, ea+8, fpr.low&0xffffffff);
+ m68ki_write_16(ea+0, fpr.high);
+ m68ki_write_16(ea+2, 0);
+ m68ki_write_32(ea+4, (fpr.low>>32)&0xffffffff);
+ m68ki_write_32(ea+8, fpr.low&0xffffffff);
}
-static inline floatx80 load_pack_float80(m68000_base_device *m68k, uint32_t ea)
+inline floatx80 load_pack_float80(uint32_t ea)
{
uint32_t dw1, dw2, dw3;
floatx80 result;
double tmp;
char str[128], *ch;
- dw1 = m68ki_read_32(m68k, ea);
- dw2 = m68ki_read_32(m68k, ea+4);
- dw3 = m68ki_read_32(m68k, ea+8);
+ dw1 = m68ki_read_32(ea);
+ dw2 = m68ki_read_32(ea+4);
+ dw3 = m68ki_read_32(ea+8);
ch = &str[0];
if (dw1 & 0x80000000) // mantissa sign
@@ -128,7 +125,7 @@ static inline floatx80 load_pack_float80(m68000_base_device *m68k, uint32_t ea)
return result;
}
-static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int k, floatx80 fpr)
+inline void store_pack_float80(uint32_t ea, int k, floatx80 fpr)
{
uint32_t dw1, dw2, dw3;
char str[128], *ch;
@@ -224,7 +221,7 @@ static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int
{
dw2 &= pkmask2[17];
dw3 &= pkmask3[17];
-// m68k->fpcr |= (need to set OPERR bit)
+// m_fpcr |= (need to set OPERR bit)
}
}
@@ -255,49 +252,49 @@ static inline void store_pack_float80(m68000_base_device *m68k, uint32_t ea, int
dw1 |= (j << 16);
}
- m68ki_write_32(m68k, ea, dw1);
- m68ki_write_32(m68k, ea+4, dw2);
- m68ki_write_32(m68k, ea+8, dw3);
+ m68ki_write_32(ea, dw1);
+ m68ki_write_32(ea+4, dw2);
+ m68ki_write_32(ea+8, dw3);
}
-static inline void SET_CONDITION_CODES(m68000_base_device *m68k, floatx80 reg)
+inline void SET_CONDITION_CODES(floatx80 reg)
{
// uint64_t *regi;
// regi = (uint64_t *)&reg;
- REG_FPSR(m68k) &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN);
+ m_fpsr &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN);
// sign flag
if (reg.high & 0x8000)
{
- REG_FPSR(m68k) |= FPCC_N;
+ m_fpsr |= FPCC_N;
}
// zero flag
if (((reg.high & 0x7fff) == 0) && ((reg.low<<1) == 0))
{
- REG_FPSR(m68k) |= FPCC_Z;
+ m_fpsr |= FPCC_Z;
}
// infinity flag
if (((reg.high & 0x7fff) == 0x7fff) && ((reg.low<<1) == 0))
{
- REG_FPSR(m68k) |= FPCC_I;
+ m_fpsr |= FPCC_I;
}
// NaN flag
if (floatx80_is_nan(reg))
{
- REG_FPSR(m68k) |= FPCC_NAN;
+ m_fpsr |= FPCC_NAN;
}
}
-static inline int TEST_CONDITION(m68000_base_device *m68k, int condition)
+inline int TEST_CONDITION(int condition)
{
- int n = (REG_FPSR(m68k) & FPCC_N) != 0;
- int z = (REG_FPSR(m68k) & FPCC_Z) != 0;
- int nan = (REG_FPSR(m68k) & FPCC_NAN) != 0;
+ int n = (m_fpsr & FPCC_N) != 0;
+ int z = (m_fpsr & FPCC_Z) != 0;
+ int nan = (m_fpsr & FPCC_NAN) != 0;
int r = 0;
switch (condition)
{
@@ -355,7 +352,7 @@ static inline int TEST_CONDITION(m68000_base_device *m68k, int condition)
return r;
}
-static uint8_t READ_EA_8(m68000_base_device *m68k, int ea)
+uint8_t READ_EA_8(int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -364,32 +361,32 @@ static uint8_t READ_EA_8(m68000_base_device *m68k, int ea)
{
case 0: // Dn
{
- return REG_D(m68k)[reg];
+ return REG_D()[reg];
}
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- return m68ki_read_8(m68k, ea);
+ uint32_t ea = REG_A()[reg];
+ return m68ki_read_8(ea);
}
case 3: // (An)+
{
- uint32_t ea = EA_AY_PI_8(m68k);
- return m68ki_read_8(m68k, ea);
+ uint32_t ea = EA_AY_PI_8();
+ return m68ki_read_8(ea);
}
case 4: // -(An)
{
- uint32_t ea = EA_AY_PD_8(m68k);
- return m68ki_read_8(m68k, ea);
+ uint32_t ea = EA_AY_PD_8();
+ return m68ki_read_8(ea);
}
case 5: // (d16, An)
{
- uint32_t ea = EA_AY_DI_8(m68k);
- return m68ki_read_8(m68k, ea);
+ uint32_t ea = EA_AY_DI_8();
+ return m68ki_read_8(ea);
}
case 6: // (An) + (Xn) + d8
{
- uint32_t ea = EA_AY_IX_8(m68k);
- return m68ki_read_8(m68k, ea);
+ uint32_t ea = EA_AY_IX_8();
+ return m68ki_read_8(ea);
}
case 7:
{
@@ -397,41 +394,41 @@ static uint8_t READ_EA_8(m68000_base_device *m68k, int ea)
{
case 0: // (xxx).W
{
- uint32_t ea = (uint32_t)OPER_I_16(m68k);
- return m68ki_read_8(m68k, ea);
+ uint32_t ea = OPER_I_16();
+ return m68ki_read_8(ea);
}
case 1: // (xxx).L
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- return m68ki_read_8(m68k, ea);
+ return m68ki_read_8(ea);
}
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_8(m68k);
- return m68ki_read_8(m68k, ea);
+ uint32_t ea = EA_PCDI_8();
+ return m68ki_read_8(ea);
}
case 3: // (PC) + (Xn) + d8
{
- uint32_t ea = EA_PCIX_8(m68k);
- return m68ki_read_8(m68k, ea);
+ uint32_t ea = EA_PCIX_8();
+ return m68ki_read_8(ea);
}
case 4: // #<data>
{
- return OPER_I_8(m68k);
+ return OPER_I_8();
}
- default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
break;
}
- default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
return 0;
}
-static uint16_t READ_EA_16(m68000_base_device *m68k, int ea)
+uint16_t READ_EA_16(int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -440,32 +437,32 @@ static uint16_t READ_EA_16(m68000_base_device *m68k, int ea)
{
case 0: // Dn
{
- return (uint16_t)(REG_D(m68k)[reg]);
+ return (uint16_t)(REG_D()[reg]);
}
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- return m68ki_read_16(m68k, ea);
+ uint32_t ea = REG_A()[reg];
+ return m68ki_read_16(ea);
}
case 3: // (An)+
{
- uint32_t ea = EA_AY_PI_16(m68k);
- return m68ki_read_16(m68k, ea);
+ uint32_t ea = EA_AY_PI_16();
+ return m68ki_read_16(ea);
}
case 4: // -(An)
{
- uint32_t ea = EA_AY_PD_16(m68k);
- return m68ki_read_16(m68k, ea);
+ uint32_t ea = EA_AY_PD_16();
+ return m68ki_read_16(ea);
}
case 5: // (d16, An)
{
- uint32_t ea = EA_AY_DI_16(m68k);
- return m68ki_read_16(m68k, ea);
+ uint32_t ea = EA_AY_DI_16();
+ return m68ki_read_16(ea);
}
case 6: // (An) + (Xn) + d8
{
- uint32_t ea = EA_AY_IX_16(m68k);
- return m68ki_read_16(m68k, ea);
+ uint32_t ea = EA_AY_IX_16();
+ return m68ki_read_16(ea);
}
case 7:
{
@@ -473,42 +470,42 @@ static uint16_t READ_EA_16(m68000_base_device *m68k, int ea)
{
case 0: // (xxx).W
{
- uint32_t ea = (uint32_t)OPER_I_16(m68k);
- return m68ki_read_16(m68k, ea);
+ uint32_t ea = OPER_I_16();
+ return m68ki_read_16(ea);
}
case 1: // (xxx).L
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- return m68ki_read_16(m68k, ea);
+ return m68ki_read_16(ea);
}
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_16(m68k);
- return m68ki_read_16(m68k, ea);
+ uint32_t ea = EA_PCDI_16();
+ return m68ki_read_16(ea);
}
case 3: // (PC) + (Xn) + d8
{
- uint32_t ea = EA_PCIX_16(m68k);
- return m68ki_read_16(m68k, ea);
+ uint32_t ea = EA_PCIX_16();
+ return m68ki_read_16(ea);
}
case 4: // #<data>
{
- return OPER_I_16(m68k);
+ return OPER_I_16();
}
- default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
break;
}
- default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
return 0;
}
-static uint32_t READ_EA_32(m68000_base_device *m68k, int ea)
+uint32_t READ_EA_32(int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -517,32 +514,32 @@ static uint32_t READ_EA_32(m68000_base_device *m68k, int ea)
{
case 0: // Dn
{
- return REG_D(m68k)[reg];
+ return REG_D()[reg];
}
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- return m68ki_read_32(m68k, ea);
+ uint32_t ea = REG_A()[reg];
+ return m68ki_read_32(ea);
}
case 3: // (An)+
{
- uint32_t ea = EA_AY_PI_32(m68k);
- return m68ki_read_32(m68k, ea);
+ uint32_t ea = EA_AY_PI_32();
+ return m68ki_read_32(ea);
}
case 4: // -(An)
{
- uint32_t ea = EA_AY_PD_32(m68k);
- return m68ki_read_32(m68k, ea);
+ uint32_t ea = EA_AY_PD_32();
+ return m68ki_read_32(ea);
}
case 5: // (d16, An)
{
- uint32_t ea = EA_AY_DI_32(m68k);
- return m68ki_read_32(m68k, ea);
+ uint32_t ea = EA_AY_DI_32();
+ return m68ki_read_32(ea);
}
case 6: // (An) + (Xn) + d8
{
- uint32_t ea = EA_AY_IX_32(m68k);
- return m68ki_read_32(m68k, ea);
+ uint32_t ea = EA_AY_IX_32();
+ return m68ki_read_32(ea);
}
case 7:
{
@@ -550,40 +547,40 @@ static uint32_t READ_EA_32(m68000_base_device *m68k, int ea)
{
case 0: // (xxx).W
{
- uint32_t ea = (uint32_t)OPER_I_16(m68k);
- return m68ki_read_32(m68k, ea);
+ uint32_t ea = OPER_I_16();
+ return m68ki_read_32(ea);
}
case 1: // (xxx).L
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- return m68ki_read_32(m68k, ea);
+ return m68ki_read_32(ea);
}
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_32(m68k);
- return m68ki_read_32(m68k, ea);
+ uint32_t ea = EA_PCDI_32();
+ return m68ki_read_32(ea);
}
case 3: // (PC) + (Xn) + d8
{
- uint32_t ea = EA_PCIX_32(m68k);
- return m68ki_read_32(m68k, ea);
+ uint32_t ea = EA_PCIX_32();
+ return m68ki_read_32(ea);
}
case 4: // #<data>
{
- return OPER_I_32(m68k);
+ return OPER_I_32();
}
- default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
break;
}
- default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
return 0;
}
-static uint64_t READ_EA_64(m68000_base_device *m68k, int ea)
+uint64_t READ_EA_64(int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -593,39 +590,39 @@ static uint64_t READ_EA_64(m68000_base_device *m68k, int ea)
{
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- h1 = m68ki_read_32(m68k, ea+0);
- h2 = m68ki_read_32(m68k, ea+4);
+ uint32_t ea = REG_A()[reg];
+ h1 = m68ki_read_32(ea+0);
+ h2 = m68ki_read_32(ea+4);
return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 3: // (An)+
{
- uint32_t ea = REG_A(m68k)[reg];
- REG_A(m68k)[reg] += 8;
- h1 = m68ki_read_32(m68k, ea+0);
- h2 = m68ki_read_32(m68k, ea+4);
+ uint32_t ea = REG_A()[reg];
+ REG_A()[reg] += 8;
+ h1 = m68ki_read_32(ea+0);
+ h2 = m68ki_read_32(ea+4);
return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 4: // -(An)
{
- uint32_t ea = REG_A(m68k)[reg]-8;
- REG_A(m68k)[reg] -= 8;
- h1 = m68ki_read_32(m68k, ea+0);
- h2 = m68ki_read_32(m68k, ea+4);
+ uint32_t ea = REG_A()[reg]-8;
+ REG_A()[reg] -= 8;
+ h1 = m68ki_read_32(ea+0);
+ h2 = m68ki_read_32(ea+4);
return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 5: // (d16, An)
{
- uint32_t ea = EA_AY_DI_32(m68k);
- h1 = m68ki_read_32(m68k, ea+0);
- h2 = m68ki_read_32(m68k, ea+4);
+ uint32_t ea = EA_AY_DI_32();
+ h1 = m68ki_read_32(ea+0);
+ h2 = m68ki_read_32(ea+4);
return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 6: // (An) + (Xn) + d8
{
- uint32_t ea = EA_AY_IX_32(m68k);
- h1 = m68ki_read_32(m68k, ea+0);
- h2 = m68ki_read_32(m68k, ea+4);
+ uint32_t ea = EA_AY_IX_32();
+ h1 = m68ki_read_32(ea+0);
+ h2 = m68ki_read_32(ea+4);
return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 7:
@@ -634,43 +631,43 @@ static uint64_t READ_EA_64(m68000_base_device *m68k, int ea)
{
case 1: // (xxx).L
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- return (uint64_t)(m68ki_read_32(m68k, ea)) << 32 | (uint64_t)(m68ki_read_32(m68k, ea+4));
+ return (uint64_t)(m68ki_read_32(ea)) << 32 | (uint64_t)(m68ki_read_32(ea+4));
}
case 3: // (PC) + (Xn) + d8
{
- uint32_t ea = EA_PCIX_32(m68k);
- h1 = m68ki_read_32(m68k, ea+0);
- h2 = m68ki_read_32(m68k, ea+4);
+ uint32_t ea = EA_PCIX_32();
+ h1 = m68ki_read_32(ea+0);
+ h2 = m68ki_read_32(ea+4);
return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 4: // #<data>
{
- h1 = OPER_I_32(m68k);
- h2 = OPER_I_32(m68k);
+ h1 = OPER_I_32();
+ h2 = OPER_I_32();
return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_32(m68k);
- h1 = m68ki_read_32(m68k, ea+0);
- h2 = m68ki_read_32(m68k, ea+4);
+ uint32_t ea = EA_PCDI_32();
+ h1 = m68ki_read_32(ea+0);
+ h2 = m68ki_read_32(ea+4);
return (uint64_t)(h1) << 32 | (uint64_t)(h2);
}
- default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
break;
}
- default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
return 0;
}
-static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea)
+floatx80 READ_EA_FPE(int ea)
{
floatx80 fpr;
int mode = (ea >> 3) & 0x7;
@@ -680,37 +677,37 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea)
{
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- fpr = load_extended_float80(m68k, ea);
+ uint32_t ea = REG_A()[reg];
+ fpr = load_extended_float80(ea);
break;
}
case 3: // (An)+
{
- uint32_t ea = REG_A(m68k)[reg];
- REG_A(m68k)[reg] += 12;
- fpr = load_extended_float80(m68k, ea);
+ uint32_t ea = REG_A()[reg];
+ REG_A()[reg] += 12;
+ fpr = load_extended_float80(ea);
break;
}
case 4: // -(An)
{
- uint32_t ea = REG_A(m68k)[reg]-12;
- REG_A(m68k)[reg] -= 12;
- fpr = load_extended_float80(m68k, ea);
+ uint32_t ea = REG_A()[reg]-12;
+ REG_A()[reg] -= 12;
+ fpr = load_extended_float80(ea);
break;
}
case 5: // (d16, An)
{
// FIXME: will fail for fmovem
- uint32_t ea = EA_AY_DI_32(m68k);
- fpr = load_extended_float80(m68k, ea);
+ uint32_t ea = EA_AY_DI_32();
+ fpr = load_extended_float80(ea);
break;
}
case 6: // (An) + (Xn) + d8
{
// FIXME: will fail for fmovem
- uint32_t ea = EA_AY_IX_32(m68k);
- fpr = load_extended_float80(m68k, ea);
+ uint32_t ea = EA_AY_IX_32();
+ fpr = load_extended_float80(ea);
break;
}
@@ -720,41 +717,41 @@ static floatx80 READ_EA_FPE(m68000_base_device *m68k, int ea)
{
case 1: // (xxx)
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- fpr = load_extended_float80(m68k, ea);
+ fpr = load_extended_float80(ea);
}
break;
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_32(m68k);
- fpr = load_extended_float80(m68k, ea);
+ uint32_t ea = EA_PCDI_32();
+ fpr = load_extended_float80(ea);
}
break;
case 3: // (d16,PC,Dx.w)
{
- uint32_t ea = EA_PCIX_32(m68k);
- fpr = load_extended_float80(m68k, ea);
+ uint32_t ea = EA_PCIX_32();
+ fpr = load_extended_float80(ea);
}
break;
default:
- fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc);
break;
}
}
break;
- default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break;
+ default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break;
}
return fpr;
}
-static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea)
+floatx80 READ_EA_PACK(int ea)
{
floatx80 fpr;
int mode = (ea >> 3) & 0x7;
@@ -764,16 +761,16 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea)
{
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- fpr = load_pack_float80(m68k, ea);
+ uint32_t ea = REG_A()[reg];
+ fpr = load_pack_float80(ea);
break;
}
case 3: // (An)+
{
- uint32_t ea = REG_A(m68k)[reg];
- REG_A(m68k)[reg] += 12;
- fpr = load_pack_float80(m68k, ea);
+ uint32_t ea = REG_A()[reg];
+ REG_A()[reg] += 12;
+ fpr = load_pack_float80(ea);
break;
}
@@ -783,25 +780,25 @@ static floatx80 READ_EA_PACK(m68000_base_device *m68k, int ea)
{
case 3: // (d16,PC,Dx.w)
{
- uint32_t ea = EA_PCIX_32(m68k);
- fpr = load_pack_float80(m68k, ea);
+ uint32_t ea = EA_PCIX_32();
+ fpr = load_pack_float80(ea);
}
break;
default:
- fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc);
break;
}
}
break;
- default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break;
+ default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc); break;
}
return fpr;
}
-static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data)
+void WRITE_EA_8(int ea, uint8_t data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -810,37 +807,37 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data)
{
case 0: // Dn
{
- REG_D(m68k)[reg] = data;
+ REG_D()[reg] = data;
break;
}
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- m68ki_write_8(m68k, ea, data);
+ uint32_t ea = REG_A()[reg];
+ m68ki_write_8(ea, data);
break;
}
case 3: // (An)+
{
- uint32_t ea = EA_AY_PI_8(m68k);
- m68ki_write_8(m68k, ea, data);
+ uint32_t ea = EA_AY_PI_8();
+ m68ki_write_8(ea, data);
break;
}
case 4: // -(An)
{
- uint32_t ea = EA_AY_PD_8(m68k);
- m68ki_write_8(m68k, ea, data);
+ uint32_t ea = EA_AY_PD_8();
+ m68ki_write_8(ea, data);
break;
}
case 5: // (d16, An)
{
- uint32_t ea = EA_AY_DI_8(m68k);
- m68ki_write_8(m68k, ea, data);
+ uint32_t ea = EA_AY_DI_8();
+ m68ki_write_8(ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
- uint32_t ea = EA_AY_IX_8(m68k);
- m68ki_write_8(m68k, ea, data);
+ uint32_t ea = EA_AY_IX_8();
+ m68ki_write_8(ea, data);
break;
}
case 7:
@@ -849,27 +846,27 @@ static void WRITE_EA_8(m68000_base_device *m68k, int ea, uint8_t data)
{
case 1: // (xxx).B
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- m68ki_write_8(m68k, ea, data);
+ m68ki_write_8(ea, data);
break;
}
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_16(m68k);
- m68ki_write_8(m68k, ea, data);
+ uint32_t ea = EA_PCDI_16();
+ m68ki_write_8(ea, data);
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc);
}
}
-static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data)
+void WRITE_EA_16(int ea, uint16_t data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -878,37 +875,37 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data)
{
case 0: // Dn
{
- REG_D(m68k)[reg] = data;
+ REG_D()[reg] = data;
break;
}
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- m68ki_write_16(m68k, ea, data);
+ uint32_t ea = REG_A()[reg];
+ m68ki_write_16(ea, data);
break;
}
case 3: // (An)+
{
- uint32_t ea = EA_AY_PI_16(m68k);
- m68ki_write_16(m68k, ea, data);
+ uint32_t ea = EA_AY_PI_16();
+ m68ki_write_16(ea, data);
break;
}
case 4: // -(An)
{
- uint32_t ea = EA_AY_PD_16(m68k);
- m68ki_write_16(m68k, ea, data);
+ uint32_t ea = EA_AY_PD_16();
+ m68ki_write_16(ea, data);
break;
}
case 5: // (d16, An)
{
- uint32_t ea = EA_AY_DI_16(m68k);
- m68ki_write_16(m68k, ea, data);
+ uint32_t ea = EA_AY_DI_16();
+ m68ki_write_16(ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
- uint32_t ea = EA_AY_IX_16(m68k);
- m68ki_write_16(m68k, ea, data);
+ uint32_t ea = EA_AY_IX_16();
+ m68ki_write_16(ea, data);
break;
}
case 7:
@@ -917,27 +914,27 @@ static void WRITE_EA_16(m68000_base_device *m68k, int ea, uint16_t data)
{
case 1: // (xxx).W
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- m68ki_write_16(m68k, ea, data);
+ m68ki_write_16(ea, data);
break;
}
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_16(m68k);
- m68ki_write_16(m68k, ea, data);
+ uint32_t ea = EA_PCDI_16();
+ m68ki_write_16(ea, data);
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc);
}
}
-static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data)
+void WRITE_EA_32(int ea, uint32_t data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -946,42 +943,42 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data)
{
case 0: // Dn
{
- REG_D(m68k)[reg] = data;
+ REG_D()[reg] = data;
break;
}
case 1: // An
{
- REG_A(m68k)[reg] = data;
+ REG_A()[reg] = data;
break;
}
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- m68ki_write_32(m68k, ea, data);
+ uint32_t ea = REG_A()[reg];
+ m68ki_write_32(ea, data);
break;
}
case 3: // (An)+
{
- uint32_t ea = EA_AY_PI_32(m68k);
- m68ki_write_32(m68k, ea, data);
+ uint32_t ea = EA_AY_PI_32();
+ m68ki_write_32(ea, data);
break;
}
case 4: // -(An)
{
- uint32_t ea = EA_AY_PD_32(m68k);
- m68ki_write_32(m68k, ea, data);
+ uint32_t ea = EA_AY_PD_32();
+ m68ki_write_32(ea, data);
break;
}
case 5: // (d16, An)
{
- uint32_t ea = EA_AY_DI_32(m68k);
- m68ki_write_32(m68k, ea, data);
+ uint32_t ea = EA_AY_DI_32();
+ m68ki_write_32(ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
- uint32_t ea = EA_AY_IX_32(m68k);
- m68ki_write_32(m68k, ea, data);
+ uint32_t ea = EA_AY_IX_32();
+ m68ki_write_32(ea, data);
break;
}
case 7:
@@ -990,33 +987,33 @@ static void WRITE_EA_32(m68000_base_device *m68k, int ea, uint32_t data)
{
case 0: // (xxx).W
{
- uint32_t ea = OPER_I_16(m68k);
- m68ki_write_32(m68k, ea, data);
+ uint32_t ea = OPER_I_16();
+ m68ki_write_32(ea, data);
break;
}
case 1: // (xxx).L
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- m68ki_write_32(m68k, ea, data);
+ m68ki_write_32(ea, data);
break;
}
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_32(m68k);
- m68ki_write_32(m68k, ea, data);
+ uint32_t ea = EA_PCDI_32();
+ m68ki_write_32(ea, data);
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, m_pc);
}
}
-static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data)
+void WRITE_EA_64(int ea, uint64_t data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -1025,40 +1022,40 @@ static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data)
{
case 2: // (An)
{
- uint32_t ea = REG_A(m68k)[reg];
- m68ki_write_32(m68k, ea, (uint32_t)(data >> 32));
- m68ki_write_32(m68k, ea+4, (uint32_t)(data));
+ uint32_t ea = REG_A()[reg];
+ m68ki_write_32(ea, (uint32_t)(data >> 32));
+ m68ki_write_32(ea+4, (uint32_t)(data));
break;
}
case 3: // (An)+
{
- uint32_t ea = REG_A(m68k)[reg];
- REG_A(m68k)[reg] += 8;
- m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
- m68ki_write_32(m68k, ea+4, (uint32_t)(data));
+ uint32_t ea = REG_A()[reg];
+ REG_A()[reg] += 8;
+ m68ki_write_32(ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(ea+4, (uint32_t)(data));
break;
}
case 4: // -(An)
{
uint32_t ea;
- REG_A(m68k)[reg] -= 8;
- ea = REG_A(m68k)[reg];
- m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
- m68ki_write_32(m68k, ea+4, (uint32_t)(data));
+ REG_A()[reg] -= 8;
+ ea = REG_A()[reg];
+ m68ki_write_32(ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(ea+4, (uint32_t)(data));
break;
}
case 5: // (d16, An)
{
- uint32_t ea = EA_AY_DI_32(m68k);
- m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
- m68ki_write_32(m68k, ea+4, (uint32_t)(data));
+ uint32_t ea = EA_AY_DI_32();
+ m68ki_write_32(ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(ea+4, (uint32_t)(data));
break;
}
case 6: // (An) + (Xn) + d8
{
- uint32_t ea = EA_AY_IX_32(m68k);
- m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
- m68ki_write_32(m68k, ea+4, (uint32_t)(data));
+ uint32_t ea = EA_AY_IX_32();
+ m68ki_write_32(ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(ea+4, (uint32_t)(data));
break;
}
case 7:
@@ -1067,29 +1064,29 @@ static void WRITE_EA_64(m68000_base_device *m68k, int ea, uint64_t data)
{
case 1: // (xxx).L
{
- uint32_t d1 = OPER_I_16(m68k);
- uint32_t d2 = OPER_I_16(m68k);
+ uint32_t d1 = OPER_I_16();
+ uint32_t d2 = OPER_I_16();
uint32_t ea = (d1 << 16) | d2;
- m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
- m68ki_write_32(m68k, ea+4, (uint32_t)(data));
+ m68ki_write_32(ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(ea+4, (uint32_t)(data));
break;
}
case 2: // (d16, PC)
{
- uint32_t ea = EA_PCDI_32(m68k);
- m68ki_write_32(m68k, ea+0, (uint32_t)(data >> 32));
- m68ki_write_32(m68k, ea+4, (uint32_t)(data));
+ uint32_t ea = EA_PCDI_32();
+ m68ki_write_32(ea+0, (uint32_t)(data >> 32));
+ m68ki_write_32(ea+4, (uint32_t)(data));
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (uint32_t)(data >> 32), (uint32_t)(data), REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (uint32_t)(data >> 32), (uint32_t)(data), m_pc);
}
}
-static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr)
+void WRITE_EA_FPE(int ea, floatx80 fpr)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -1099,26 +1096,26 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr)
case 2: // (An)
{
uint32_t ea;
- ea = REG_A(m68k)[reg];
- store_extended_float80(m68k, ea, fpr);
+ ea = REG_A()[reg];
+ store_extended_float80(ea, fpr);
break;
}
case 3: // (An)+
{
uint32_t ea;
- ea = REG_A(m68k)[reg];
- store_extended_float80(m68k, ea, fpr);
- REG_A(m68k)[reg] += 12;
+ ea = REG_A()[reg];
+ store_extended_float80(ea, fpr);
+ REG_A()[reg] += 12;
break;
}
case 4: // -(An)
{
uint32_t ea;
- REG_A(m68k)[reg] -= 12;
- ea = REG_A(m68k)[reg];
- store_extended_float80(m68k, ea, fpr);
+ REG_A()[reg] -= 12;
+ ea = REG_A()[reg];
+ store_extended_float80(ea, fpr);
break;
}
@@ -1126,14 +1123,14 @@ static void WRITE_EA_FPE(m68000_base_device *m68k, int ea, floatx80 fpr)
{
switch (reg)
{
- default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc);
}
}
- default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc);
}
}
-static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr)
+void WRITE_EA_PACK(int ea, int k, floatx80 fpr)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -1143,26 +1140,26 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr)
case 2: // (An)
{
uint32_t ea;
- ea = REG_A(m68k)[reg];
- store_pack_float80(m68k, ea, k, fpr);
+ ea = REG_A()[reg];
+ store_pack_float80(ea, k, fpr);
break;
}
case 3: // (An)+
{
uint32_t ea;
- ea = REG_A(m68k)[reg];
- store_pack_float80(m68k, ea, k, fpr);
- REG_A(m68k)[reg] += 12;
+ ea = REG_A()[reg];
+ store_pack_float80(ea, k, fpr);
+ REG_A()[reg] += 12;
break;
}
case 4: // -(An)
{
uint32_t ea;
- REG_A(m68k)[reg] -= 12;
- ea = REG_A(m68k)[reg];
- store_pack_float80(m68k, ea, k, fpr);
+ REG_A()[reg] -= 12;
+ ea = REG_A()[reg];
+ store_pack_float80(ea, k, fpr);
break;
}
@@ -1170,16 +1167,16 @@ static void WRITE_EA_PACK(m68000_base_device *m68k, int ea, int k, floatx80 fpr)
{
switch (reg)
{
- default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc);
}
}
- default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, m_pc);
}
}
-static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2)
+void fpgen_rm_reg(uint16_t w2)
{
- int ea = m68k->ir & 0x3f;
+ int ea = m_ir & 0x3f;
int rm = (w2 >> 14) & 0x1;
int src = (w2 >> 10) & 0x7;
int dst = (w2 >> 7) & 0x7;
@@ -1194,42 +1191,42 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2)
{
case 0: // Long-Word Integer
{
- int32_t d = READ_EA_32(m68k, ea);
+ int32_t d = READ_EA_32(ea);
source = int32_to_floatx80(d);
break;
}
case 1: // Single-precision Real
{
- uint32_t d = READ_EA_32(m68k, ea);
+ uint32_t d = READ_EA_32(ea);
source = float32_to_floatx80(d);
break;
}
case 2: // Extended-precision Real
{
- source = READ_EA_FPE(m68k, ea);
+ source = READ_EA_FPE(ea);
break;
}
case 3: // Packed-decimal Real
{
- source = READ_EA_PACK(m68k, ea);
+ source = READ_EA_PACK(ea);
break;
}
case 4: // Word Integer
{
- int16_t d = READ_EA_16(m68k, ea);
+ int16_t d = READ_EA_16(ea);
source = int32_to_floatx80((int32_t)d);
break;
}
case 5: // Double-precision Real
{
- uint64_t d = READ_EA_64(m68k, ea);
+ uint64_t d = READ_EA_64(ea);
source = float64_to_floatx80(d);
break;
}
case 6: // Byte Integer
{
- int8_t d = READ_EA_8(m68k, ea);
+ int8_t d = READ_EA_8(ea);
source = int32_to_floatx80((int32_t)d);
break;
}
@@ -1342,21 +1339,21 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2)
break;
default:
- fatalerror("fmove_rm_reg: unknown constant ROM offset %x at %08x\n", w2&0x7f, REG_PC(m68k)-4);
+ fatalerror("fmove_rm_reg: unknown constant ROM offset %x at %08x\n", w2&0x7f, m_pc-4);
break;
}
// handle it right here, the usual opmode bits aren't valid in the FMOVECR case
- REG_FP(m68k)[dst] = source;
- m68k->remaining_cycles -= 4;
+ m_fpr[dst] = source;
+ m_remaining_cycles -= 4;
return;
}
- default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, REG_PC(m68k)-4);
+ default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, m_pc-4);
}
}
else
{
- source = REG_FP(m68k)[src];
+ source = m_fpr[src];
}
@@ -1365,98 +1362,98 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2)
{
case 0x00: // FMOVE
{
- REG_FP(m68k)[dst] = source;
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 4;
+ m_fpr[dst] = source;
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 4;
break;
}
case 0x01: // FINT
{
int32_t temp;
temp = floatx80_to_int32(source);
- REG_FP(m68k)[dst] = int32_to_floatx80(temp);
+ m_fpr[dst] = int32_to_floatx80(temp);
break;
}
case 0x03: // FINTRZ
{
int32_t temp;
temp = floatx80_to_int32_round_to_zero(source);
- REG_FP(m68k)[dst] = int32_to_floatx80(temp);
+ m_fpr[dst] = int32_to_floatx80(temp);
break;
}
case 0x04: // FSQRT
{
- REG_FP(m68k)[dst] = floatx80_sqrt(source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 109;
+ m_fpr[dst] = floatx80_sqrt(source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 109;
break;
}
case 0x06: // FLOGNP1
{
- REG_FP(m68k)[dst] = floatx80_flognp1 (source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 594; // for MC68881
+ m_fpr[dst] = floatx80_flognp1 (source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 594; // for MC68881
break;
}
case 0x0e: // FSIN
{
- REG_FP(m68k)[dst] = source;
- floatx80_fsin(REG_FP(m68k)[dst]);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 75;
+ m_fpr[dst] = source;
+ floatx80_fsin(m_fpr[dst]);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 75;
break;
}
case 0x0f: // FTAN
{
- REG_FP(m68k)[dst] = source;
- floatx80_ftan(REG_FP(m68k)[dst]);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 75;
+ m_fpr[dst] = source;
+ floatx80_ftan(m_fpr[dst]);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 75;
break;
}
case 0x14: // FLOGN
{
- REG_FP(m68k)[dst] = floatx80_flogn (source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 548; // for MC68881
+ m_fpr[dst] = floatx80_flogn (source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 548; // for MC68881
break;
}
case 0x15: // FLOG10
{
- REG_FP(m68k)[dst] = floatx80_flog10 (source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 604; // for MC68881
+ m_fpr[dst] = floatx80_flog10 (source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 604; // for MC68881
break;
}
case 0x16: // FLOG2
{
- REG_FP(m68k)[dst] = floatx80_flog2 (source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 604; // for MC68881
+ m_fpr[dst] = floatx80_flog2 (source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 604; // for MC68881
break;
}
case 0x18: // FABS
{
- REG_FP(m68k)[dst] = source;
- REG_FP(m68k)[dst].high &= 0x7fff;
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 3;
+ m_fpr[dst] = source;
+ m_fpr[dst].high &= 0x7fff;
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 3;
break;
}
case 0x1a: // FNEG
{
- REG_FP(m68k)[dst] = source;
- REG_FP(m68k)[dst].high ^= 0x8000;
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 3;
+ m_fpr[dst] = source;
+ m_fpr[dst].high ^= 0x8000;
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 3;
break;
}
case 0x1d: // FCOS
{
- REG_FP(m68k)[dst] = source;
- floatx80_fcos(REG_FP(m68k)[dst]);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 75;
+ m_fpr[dst] = source;
+ floatx80_fcos(m_fpr[dst]);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 75;
break;
}
case 0x1e: // FGETEXP
@@ -1465,93 +1462,93 @@ static void fpgen_rm_reg(m68000_base_device *m68k, uint16_t w2)
temp2 = source.high; // get the exponent
temp2 -= 0x3fff; // take off the bias
- REG_FP(m68k)[dst] = double_to_fx80((double)temp2);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 6;
+ m_fpr[dst] = double_to_fx80((double)temp2);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 6;
break;
}
case 0x20: // FDIV
{
- REG_FP(m68k)[dst] = floatx80_div(REG_FP(m68k)[dst], source);
- m68k->remaining_cycles -= 43;
+ m_fpr[dst] = floatx80_div(m_fpr[dst], source);
+ m_remaining_cycles -= 43;
break;
}
case 0x22: // FADD
{
- REG_FP(m68k)[dst] = floatx80_add(REG_FP(m68k)[dst], source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 9;
+ m_fpr[dst] = floatx80_add(m_fpr[dst], source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 9;
break;
}
case 0x23: // FMUL
{
- REG_FP(m68k)[dst] = floatx80_mul(REG_FP(m68k)[dst], source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 11;
+ m_fpr[dst] = floatx80_mul(m_fpr[dst], source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 11;
break;
}
case 0x24: // FSGLDIV
{
- float32 a = floatx80_to_float32( REG_FP(m68k)[dst] );
+ float32 a = floatx80_to_float32( m_fpr[dst] );
float32 b = floatx80_to_float32( source );
- REG_FP(m68k)[dst] = float32_to_floatx80( float32_div(a, b) );
- m68k->remaining_cycles -= 43; // // ? (value is from FDIV)
+ m_fpr[dst] = float32_to_floatx80( float32_div(a, b) );
+ m_remaining_cycles -= 43; // // ? (value is from FDIV)
break;
}
case 0x25: // FREM
{
- REG_FP(m68k)[dst] = floatx80_rem(REG_FP(m68k)[dst], source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 43; // guess
+ m_fpr[dst] = floatx80_rem(m_fpr[dst], source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 43; // guess
break;
}
case 0x26: // FSCALE
{
- REG_FP(m68k)[dst] = floatx80_scale(REG_FP(m68k)[dst], source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 46; // (better?) guess
+ m_fpr[dst] = floatx80_scale(m_fpr[dst], source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 46; // (better?) guess
break;
}
case 0x27: // FSGLMUL
{
- float32 a = floatx80_to_float32( REG_FP(m68k)[dst] );
+ float32 a = floatx80_to_float32( m_fpr[dst] );
float32 b = floatx80_to_float32( source );
- REG_FP(m68k)[dst] = float32_to_floatx80( float32_mul(a, b) );
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 11; // ? (value is from FMUL)
+ m_fpr[dst] = float32_to_floatx80( float32_mul(a, b) );
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 11; // ? (value is from FMUL)
break;
}
case 0x28: // FSUB
{
- REG_FP(m68k)[dst] = floatx80_sub(REG_FP(m68k)[dst], source);
- SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 9;
+ m_fpr[dst] = floatx80_sub(m_fpr[dst], source);
+ SET_CONDITION_CODES(m_fpr[dst]);
+ m_remaining_cycles -= 9;
break;
}
case 0x38: // FCMP
{
floatx80 res;
- res = floatx80_sub(REG_FP(m68k)[dst], source);
- SET_CONDITION_CODES(m68k, res);
- m68k->remaining_cycles -= 7;
+ res = floatx80_sub(m_fpr[dst], source);
+ SET_CONDITION_CODES(res);
+ m_remaining_cycles -= 7;
break;
}
case 0x3a: // FTST
{
floatx80 res;
res = source;
- SET_CONDITION_CODES(m68k, res);
- m68k->remaining_cycles -= 7;
+ SET_CONDITION_CODES(res);
+ m_remaining_cycles -= 7;
break;
}
- default: fatalerror("fpgen_rm_reg: unimplemented opmode %02X at %08X\n", opmode, REG_PPC(m68k));
+ default: fatalerror("fpgen_rm_reg: unimplemented opmode %02X at %08X\n", opmode, m_ppc);
}
}
-static void fmove_reg_mem(m68000_base_device *m68k, uint16_t w2)
+void fmove_reg_mem(uint16_t w2)
{
- int ea = m68k->ir & 0x3f;
+ int ea = m_ir & 0x3f;
int src = (w2 >> 7) & 0x7;
int dst = (w2 >> 10) & 0x7;
int k = (w2 & 0x7f);
@@ -1560,70 +1557,70 @@ static void fmove_reg_mem(m68000_base_device *m68k, uint16_t w2)
{
case 0: // Long-Word Integer
{
- int32_t d = (int32_t)floatx80_to_int32(REG_FP(m68k)[src]);
- WRITE_EA_32(m68k, ea, d);
+ int32_t d = (int32_t)floatx80_to_int32(m_fpr[src]);
+ WRITE_EA_32(ea, d);
break;
}
case 1: // Single-precision Real
{
- uint32_t d = floatx80_to_float32(REG_FP(m68k)[src]);
- WRITE_EA_32(m68k, ea, d);
+ uint32_t d = floatx80_to_float32(m_fpr[src]);
+ WRITE_EA_32(ea, d);
break;
}
case 2: // Extended-precision Real
{
- WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[src]);
+ WRITE_EA_FPE(ea, m_fpr[src]);
break;
}
case 3: // Packed-decimal Real with Static K-factor
{
// sign-extend k
k = (k & 0x40) ? (k | 0xffffff80) : (k & 0x7f);
- WRITE_EA_PACK(m68k, ea, k, REG_FP(m68k)[src]);
+ WRITE_EA_PACK(ea, k, m_fpr[src]);
break;
}
case 4: // Word Integer
{
- int32 value = floatx80_to_int32(REG_FP(m68k)[src]);
+ int32 value = floatx80_to_int32(m_fpr[src]);
if (value > 0x7fff || value < -0x8000 )
{
- REG_FPSR(m68k) |= FPES_OE | FPAE_IOP;
+ m_fpsr |= FPES_OE | FPAE_IOP;
}
- WRITE_EA_16(m68k, ea, (int16_t)value);
+ WRITE_EA_16(ea, (int16_t)value);
break;
}
case 5: // Double-precision Real
{
uint64_t d;
- d = floatx80_to_float64(REG_FP(m68k)[src]);
+ d = floatx80_to_float64(m_fpr[src]);
- WRITE_EA_64(m68k, ea, d);
+ WRITE_EA_64(ea, d);
break;
}
case 6: // Byte Integer
{
- int32 value = floatx80_to_int32(REG_FP(m68k)[src]);
+ int32 value = floatx80_to_int32(m_fpr[src]);
if (value > 127 || value < -128)
{
- REG_FPSR(m68k) |= FPES_OE | FPAE_IOP;
+ m_fpsr |= FPES_OE | FPAE_IOP;
}
- WRITE_EA_8(m68k, ea, (int8_t) value);
+ WRITE_EA_8(ea, (int8_t) value);
break;
}
case 7: // Packed-decimal Real with Dynamic K-factor
{
- WRITE_EA_PACK(m68k, ea, REG_D(m68k)[k>>4], REG_FP(m68k)[src]);
+ WRITE_EA_PACK(ea, REG_D()[k>>4], m_fpr[src]);
break;
}
}
- m68k->remaining_cycles -= 12;
+ m_remaining_cycles -= 12;
}
-static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2)
+void fmove_fpcr(uint16_t w2)
{
- int ea = m68k->ir & 0x3f;
+ int ea = m_ir & 0x3f;
int dir = (w2 >> 13) & 0x1;
int regsel = (w2 >> 10) & 0x7;
int mode = (ea >> 3) & 0x7;
@@ -1634,39 +1631,39 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2)
if (mode == 5)
{
- address = EA_AY_DI_32(m68k);
+ address = EA_AY_DI_32();
}
else if (mode == 6)
{
- address = EA_AY_IX_32(m68k);
+ address = EA_AY_IX_32();
}
if (dir) // From system control reg to <ea>
{
- if (regsel & 4) { m68ki_write_32(m68k, address, REG_FPCR(m68k)); address += 4; }
- if (regsel & 2) { m68ki_write_32(m68k, address, REG_FPSR(m68k)); address += 4; }
- if (regsel & 1) { m68ki_write_32(m68k, address, REG_FPIAR(m68k)); address += 4; }
+ if (regsel & 4) { m68ki_write_32(address, m_fpcr); address += 4; }
+ if (regsel & 2) { m68ki_write_32(address, m_fpsr); address += 4; }
+ if (regsel & 1) { m68ki_write_32(address, m_fpiar); address += 4; }
}
else // From <ea> to system control reg
{
- if (regsel & 4) { REG_FPCR(m68k) = m68ki_read_32(m68k, address); address += 4; }
- if (regsel & 2) { REG_FPSR(m68k) = m68ki_read_32(m68k, address); address += 4; }
- if (regsel & 1) { REG_FPIAR(m68k) = m68ki_read_32(m68k, address); address += 4; }
+ if (regsel & 4) { m_fpcr = m68ki_read_32(address); address += 4; }
+ if (regsel & 2) { m_fpsr = m68ki_read_32(address); address += 4; }
+ if (regsel & 1) { m_fpiar = m68ki_read_32(address); address += 4; }
}
}
else
{
if (dir) // From system control reg to <ea>
{
- if (regsel & 4) WRITE_EA_32(m68k, ea, REG_FPCR(m68k));
- if (regsel & 2) WRITE_EA_32(m68k, ea, REG_FPSR(m68k));
- if (regsel & 1) WRITE_EA_32(m68k, ea, REG_FPIAR(m68k));
+ if (regsel & 4) WRITE_EA_32(ea, m_fpcr);
+ if (regsel & 2) WRITE_EA_32(ea, m_fpsr);
+ if (regsel & 1) WRITE_EA_32(ea, m_fpiar);
}
else // From <ea> to system control reg
{
- if (regsel & 4) REG_FPCR(m68k) = READ_EA_32(m68k, ea);
- if (regsel & 2) REG_FPSR(m68k) = READ_EA_32(m68k, ea);
- if (regsel & 1) REG_FPIAR(m68k) = READ_EA_32(m68k, ea);
+ if (regsel & 4) m_fpcr = READ_EA_32(ea);
+ if (regsel & 2) m_fpsr = READ_EA_32(ea);
+ if (regsel & 1) m_fpiar = READ_EA_32(ea);
}
}
@@ -1678,10 +1675,10 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2)
if ((regsel & 4) && dir == 0)
{
- int rnd = (REG_FPCR(m68k) >> 4) & 3;
- int prec = (REG_FPCR(m68k) >> 6) & 3;
+ int rnd = (m_fpcr >> 4) & 3;
+ int prec = (m_fpcr >> 6) & 3;
-// m68k->logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", REG_FPCR(m68k), prec, rnd);
+// logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", m_fpcr, prec, rnd);
#ifdef FLOATX80
switch (prec)
@@ -1718,13 +1715,13 @@ static void fmove_fpcr(m68000_base_device *m68k, uint16_t w2)
}
}
- m68k->remaining_cycles -= 10;
+ m_remaining_cycles -= 10;
}
-static void fmovem(m68000_base_device *m68k, uint16_t w2)
+void fmovem(uint16_t w2)
{
int i;
- int ea = m68k->ir & 0x3f;
+ int ea = m_ir & 0x3f;
int dir = (w2 >> 13) & 0x1;
int mode = (w2 >> 11) & 0x3;
int reglist = w2 & 0xff;
@@ -1733,10 +1730,10 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2)
switch (ea >> 3)
{
case 5: // (d16, An)
- mem_addr= EA_AY_DI_32(m68k);
+ mem_addr= EA_AY_DI_32();
break;
case 6: // (An) + (Xn) + d8
- mem_addr= EA_AY_IX_32(m68k);
+ mem_addr= EA_AY_IX_32();
break;
}
@@ -1746,7 +1743,7 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2)
{
case 1: // Dynamic register list, postincrement or control addressing mode.
// FIXME: not really tested, but seems to work
- reglist = REG_D(m68k)[(reglist >> 4) & 7];
+ reglist = REG_D()[(reglist >> 4) & 7];
case 0: // Static register list, predecrement or control addressing mode
{
@@ -1758,15 +1755,15 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2)
{
case 5: // (d16, An)
case 6: // (An) + (Xn) + d8
- store_extended_float80(m68k, mem_addr, REG_FP(m68k)[i]);
+ store_extended_float80(mem_addr, m_fpr[i]);
mem_addr += 12;
break;
default:
- WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[i]);
+ WRITE_EA_FPE(ea, m_fpr[i]);
break;
}
- m68k->remaining_cycles -= 2;
+ m_remaining_cycles -= 2;
}
}
break;
@@ -1782,21 +1779,21 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2)
{
case 5: // (d16, An)
case 6: // (An) + (Xn) + d8
- store_extended_float80(m68k, mem_addr, REG_FP(m68k)[7-i]);
+ store_extended_float80(mem_addr, m_fpr[7-i]);
mem_addr += 12;
break;
default:
- WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[7-i]);
+ WRITE_EA_FPE(ea, m_fpr[7-i]);
break;
}
- m68k->remaining_cycles -= 2;
+ m_remaining_cycles -= 2;
}
}
break;
}
- default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4);
+ default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, m_pc-4);
}
}
else // From mem to FP regs
@@ -1805,7 +1802,7 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2)
{
case 3: // Dynamic register list, predecrement addressing mode.
// FIXME: not really tested, but seems to work
- reglist = REG_D(m68k)[(reglist >> 4) & 7];
+ reglist = REG_D()[(reglist >> 4) & 7];
case 2: // Static register list, postincrement or control addressing mode
{
@@ -1817,151 +1814,151 @@ static void fmovem(m68000_base_device *m68k, uint16_t w2)
{
case 5: // (d16, An)
case 6: // (An) + (Xn) + d8
- REG_FP(m68k)[7-i] = load_extended_float80(m68k, mem_addr);
+ m_fpr[7-i] = load_extended_float80(mem_addr);
mem_addr += 12;
break;
default:
- REG_FP(m68k)[7-i] = READ_EA_FPE(m68k, ea);
+ m_fpr[7-i] = READ_EA_FPE(ea);
break;
}
- m68k->remaining_cycles -= 2;
+ m_remaining_cycles -= 2;
}
}
break;
}
- default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4);
+ default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, m_pc-4);
}
}
}
-static void fscc(m68000_base_device *m68k)
+void fscc()
{
- int ea = m68k->ir & 0x3f;
- int condition = (int16_t)(OPER_I_16(m68k));
+ int ea = m_ir & 0x3f;
+ int condition = (int16_t)(OPER_I_16());
- WRITE_EA_8(m68k, ea, TEST_CONDITION(m68k, condition) ? 0xff : 0);
- m68k->remaining_cycles -= 7; // ???
+ WRITE_EA_8(ea, TEST_CONDITION(condition) ? 0xff : 0);
+ m_remaining_cycles -= 7; // ???
}
-static void fbcc16(m68000_base_device *m68k)
+void fbcc16()
{
int32_t offset;
- int condition = m68k->ir & 0x3f;
+ int condition = m_ir & 0x3f;
- offset = (int16_t)(OPER_I_16(m68k));
+ offset = (int16_t)(OPER_I_16());
// TODO: condition and jump!!!
- if (TEST_CONDITION(m68k, condition))
+ if (TEST_CONDITION(condition))
{
- m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_16(m68k, offset-2);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_16(offset-2);
}
- m68k->remaining_cycles -= 7;
+ m_remaining_cycles -= 7;
}
-static void fbcc32(m68000_base_device *m68k)
+void fbcc32()
{
int32_t offset;
- int condition = m68k->ir & 0x3f;
+ int condition = m_ir & 0x3f;
- offset = OPER_I_32(m68k);
+ offset = OPER_I_32();
// TODO: condition and jump!!!
- if (TEST_CONDITION(m68k, condition))
+ if (TEST_CONDITION(condition))
{
- m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */
- m68ki_branch_32(m68k, offset-4);
+ m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
+ m68ki_branch_32(offset-4);
}
- m68k->remaining_cycles -= 7;
+ m_remaining_cycles -= 7;
}
-void m68040_fpu_op0(m68000_base_device *m68k)
+void m68040_fpu_op0()
{
- m68k->fpu_just_reset = 0;
+ m_fpu_just_reset = 0;
- switch ((m68k->ir >> 6) & 0x3)
+ switch ((m_ir >> 6) & 0x3)
{
case 0:
{
- uint16_t w2 = OPER_I_16(m68k);
+ uint16_t w2 = OPER_I_16();
switch ((w2 >> 13) & 0x7)
{
case 0x0: // FPU ALU FP, FP
case 0x2: // FPU ALU ea, FP
{
- fpgen_rm_reg(m68k, w2);
+ fpgen_rm_reg(w2);
break;
}
case 0x3: // FMOVE FP, ea
{
- fmove_reg_mem(m68k, w2);
+ fmove_reg_mem(w2);
break;
}
case 0x4: // FMOVEM ea, FPCR
case 0x5: // FMOVEM FPCR, ea
{
- fmove_fpcr(m68k, w2);
+ fmove_fpcr(w2);
break;
}
case 0x6: // FMOVEM ea, list
case 0x7: // FMOVEM list, ea
{
- fmovem(m68k, w2);
+ fmovem(w2);
break;
}
- default: fatalerror("M68kFPU: unimplemented subop %d at %08X\n", (w2 >> 13) & 0x7, REG_PC(m68k)-4);
+ default: fatalerror("M68kFPU: unimplemented subop %d at %08X\n", (w2 >> 13) & 0x7, m_pc-4);
}
break;
}
case 1: // FBcc disp16
{
- switch ((m68k->ir >> 3) & 0x7) {
+ switch ((m_ir >> 3) & 0x7) {
case 1: // FDBcc
// TODO:
break;
default: // FScc (?)
- fscc(m68k);
+ fscc();
return;
}
- fatalerror("M68kFPU: unimplemented main op %d with mode %d at %08X\n", (m68k->ir >> 6) & 0x3, (m68k->ir >> 3) & 0x7, REG_PPC(m68k));
+ fatalerror("M68kFPU: unimplemented main op %d with mode %d at %08X\n", (m_ir >> 6) & 0x3, (m_ir >> 3) & 0x7, m_ppc);
}
case 2: // FBcc disp16
{
- fbcc16(m68k);
+ fbcc16();
break;
}
case 3: // FBcc disp32
{
- fbcc32(m68k);
+ fbcc32();
break;
}
- default: fatalerror("M68kFPU: unimplemented main op %d\n", (m68k->ir >> 6) & 0x3);
+ default: fatalerror("M68kFPU: unimplemented main op %d\n", (m_ir >> 6) & 0x3);
}
}
-static int perform_fsave(m68000_base_device *m68k, uint32_t addr, int inc)
+int perform_fsave(uint32_t addr, int inc)
{
- if(m68k->cpu_type & CPU_TYPE_040)
+ if(m_cpu_type & CPU_TYPE_040)
{
if(inc)
{
- m68ki_write_32(m68k, addr, 0x41000000);
+ m68ki_write_32(addr, 0x41000000);
return 4;
}
else
{
- m68ki_write_32(m68k, addr-4, 0x41000000);
+ m68ki_write_32(addr-4, 0x41000000);
return -4;
}
}
@@ -1969,131 +1966,131 @@ static int perform_fsave(m68000_base_device *m68k, uint32_t addr, int inc)
if (inc)
{
// 68881 IDLE, version 0x1f
- m68ki_write_32(m68k, addr, 0x1f180000);
- m68ki_write_32(m68k, addr+4, 0);
- m68ki_write_32(m68k, addr+8, 0);
- m68ki_write_32(m68k, addr+12, 0);
- m68ki_write_32(m68k, addr+16, 0);
- m68ki_write_32(m68k, addr+20, 0);
- m68ki_write_32(m68k, addr+24, 0x70000000);
+ m68ki_write_32(addr, 0x1f180000);
+ m68ki_write_32(addr+4, 0);
+ m68ki_write_32(addr+8, 0);
+ m68ki_write_32(addr+12, 0);
+ m68ki_write_32(addr+16, 0);
+ m68ki_write_32(addr+20, 0);
+ m68ki_write_32(addr+24, 0x70000000);
return 7*4;
}
else
{
- m68ki_write_32(m68k, addr-4, 0x70000000);
- m68ki_write_32(m68k, addr-8, 0);
- m68ki_write_32(m68k, addr-12, 0);
- m68ki_write_32(m68k, addr-16, 0);
- m68ki_write_32(m68k, addr-20, 0);
- m68ki_write_32(m68k, addr-24, 0);
- m68ki_write_32(m68k, addr-28, 0x1f180000);
+ m68ki_write_32(addr-4, 0x70000000);
+ m68ki_write_32(addr-8, 0);
+ m68ki_write_32(addr-12, 0);
+ m68ki_write_32(addr-16, 0);
+ m68ki_write_32(addr-20, 0);
+ m68ki_write_32(addr-24, 0);
+ m68ki_write_32(addr-28, 0x1f180000);
return -7*4;
}
}
// FRESTORE on a nullptr frame reboots the FPU - all registers to NaN, the 3 status regs to 0
-static void do_frestore_null(m68000_base_device *m68k)
+void do_frestore_null()
{
int i;
- REG_FPCR(m68k) = 0;
- REG_FPSR(m68k) = 0;
- REG_FPIAR(m68k) = 0;
+ m_fpcr = 0;
+ m_fpsr = 0;
+ m_fpiar = 0;
for (i = 0; i < 8; i++)
{
- REG_FP(m68k)[i].high = 0x7fff;
- REG_FP(m68k)[i].low = 0xffffffffffffffffU;
+ m_fpr[i].high = 0x7fff;
+ m_fpr[i].low = 0xffffffffffffffffU;
}
// Mac IIci at 408458e6 wants an FSAVE of a just-restored nullptr frame to also be nullptr
// The PRM says it's possible to generate a nullptr frame, but not how/when/why. (need the 68881/68882 manual!)
- m68k->fpu_just_reset = 1;
+ m_fpu_just_reset = 1;
}
-static void m68040_do_fsave(m68000_base_device *m68k, uint32_t addr, int reg, int inc)
+void m68040_do_fsave(uint32_t addr, int reg, int inc)
{
- if (m68k->fpu_just_reset)
+ if (m_fpu_just_reset)
{
- m68ki_write_32(m68k, addr, 0);
+ m68ki_write_32(addr, 0);
}
else
{
// we normally generate an IDLE frame
- int delta = perform_fsave(m68k, addr, inc);
+ int delta = perform_fsave(addr, inc);
if(reg != -1)
- REG_A(m68k)[reg] += delta;
+ REG_A()[reg] += delta;
}
}
-static void m68040_do_frestore(m68000_base_device *m68k, uint32_t addr, int reg)
+void m68040_do_frestore(uint32_t addr, int reg)
{
- bool m40 = m68k->cpu_type & CPU_TYPE_040;
- uint32_t temp = m68ki_read_32(m68k, addr);
+ bool m40 = m_cpu_type & CPU_TYPE_040;
+ uint32_t temp = m68ki_read_32(addr);
// check for nullptr frame
if (temp & 0xff000000)
{
// we don't handle non-nullptr frames
- m68k->fpu_just_reset = 0;
+ m_fpu_just_reset = 0;
if (reg != -1)
{
// how about an IDLE frame?
if (!m40 && ((temp & 0x00ff0000) == 0x00180000))
{
- REG_A(m68k)[reg] += 7*4;
+ REG_A()[reg] += 7*4;
}
else if (m40 && ((temp & 0xffff0000) == 0x41000000))
{
- REG_A(m68k)[reg] += 4;
+ REG_A()[reg] += 4;
} // check UNIMP
else if ((temp & 0x00ff0000) == 0x00380000)
{
- REG_A(m68k)[reg] += 14*4;
+ REG_A()[reg] += 14*4;
} // check BUSY
else if ((temp & 0x00ff0000) == 0x00b40000)
{
- REG_A(m68k)[reg] += 45*4;
+ REG_A()[reg] += 45*4;
}
}
}
else
{
- do_frestore_null(m68k);
+ do_frestore_null();
}
}
-void m68040_fpu_op1(m68000_base_device *m68k)
+void m68040_fpu_op1()
{
- int ea = m68k->ir & 0x3f;
+ int ea = m_ir & 0x3f;
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
uint32_t addr;
- switch ((m68k->ir >> 6) & 0x3)
+ switch ((m_ir >> 6) & 0x3)
{
case 0: // FSAVE <ea>
{
switch (mode)
{
case 2: // (An)
- addr = REG_A(m68k)[reg];
- m68040_do_fsave(m68k, addr, -1, 1);
+ addr = REG_A()[reg];
+ m68040_do_fsave(addr, -1, 1);
break;
case 3: // (An)+
- addr = EA_AY_PI_32(m68k);
- m68040_do_fsave(m68k, addr, reg, 1);
+ addr = EA_AY_PI_32();
+ m68040_do_fsave(addr, reg, 1);
break;
case 4: // -(An)
- addr = EA_AY_PD_32(m68k);
- m68040_do_fsave(m68k, addr, reg, 0);
+ addr = EA_AY_PD_32();
+ m68040_do_fsave(addr, reg, 0);
break;
case 5: // (D16, An)
- addr = EA_AY_DI_16(m68k);
- m68040_do_fsave(m68k, addr, -1, 1);
+ addr = EA_AY_DI_16();
+ m68040_do_fsave(addr, -1, 1);
break;
case 7: //
@@ -2101,24 +2098,24 @@ void m68040_fpu_op1(m68000_base_device *m68k)
{
case 1: // (abs32)
{
- addr = EA_AL_32(m68k);
- m68040_do_fsave(m68k, addr, -1, 1);
+ addr = EA_AL_32();
+ m68040_do_fsave(addr, -1, 1);
break;
}
case 2: // (d16, PC)
{
- addr = EA_PCDI_16(m68k);
- m68040_do_fsave(m68k, addr, -1, 1);
+ addr = EA_PCDI_16();
+ m68040_do_fsave(addr, -1, 1);
break;
}
default:
- fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k));
+ fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, m_pc);
}
break;
default:
- fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k));
+ fatalerror("M68kFPU: FSAVE unhandled mode %d reg %d at %x\n", mode, reg, m_pc);
}
break;
}
@@ -2129,18 +2126,18 @@ void m68040_fpu_op1(m68000_base_device *m68k)
switch (mode)
{
case 2: // (An)
- addr = REG_A(m68k)[reg];
- m68040_do_frestore(m68k, addr, -1);
+ addr = REG_A()[reg];
+ m68040_do_frestore(addr, -1);
break;
case 3: // (An)+
- addr = EA_AY_PI_32(m68k);
- m68040_do_frestore(m68k, addr, reg);
+ addr = EA_AY_PI_32();
+ m68040_do_frestore(addr, reg);
break;
case 5: // (D16, An)
- addr = EA_AY_DI_16(m68k);
- m68040_do_frestore(m68k, addr, -1);
+ addr = EA_AY_DI_16();
+ m68040_do_frestore(addr, -1);
break;
case 7: //
@@ -2148,53 +2145,53 @@ void m68040_fpu_op1(m68000_base_device *m68k)
{
case 1: // (abs32)
{
- addr = EA_AL_32(m68k);
- m68040_do_frestore(m68k, addr, -1);
+ addr = EA_AL_32();
+ m68040_do_frestore(addr, -1);
break;
}
case 2: // (d16, PC)
{
- addr = EA_PCDI_16(m68k);
- m68040_do_frestore(m68k, addr, -1);
+ addr = EA_PCDI_16();
+ m68040_do_frestore(addr, -1);
break;
}
default:
- fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k));
+ fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, m_pc);
}
break;
default:
- fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, REG_PC(m68k));
+ fatalerror("M68kFPU: FRESTORE unhandled mode %d reg %d at %x\n", mode, reg, m_pc);
}
break;
}
break;
- default: fatalerror("m68040_fpu_op1: unimplemented op %d at %08X\n", (m68k->ir >> 6) & 0x3, REG_PC(m68k)-2);
+ default: fatalerror("m68040_fpu_op1: unimplemented op %d at %08X\n", (m_ir >> 6) & 0x3, m_pc-2);
}
}
-void m68881_ftrap(m68000_base_device *m68k)
+void m68881_ftrap()
{
- uint16_t w2 = OPER_I_16(m68k);
+ uint16_t w2 = OPER_I_16();
// now check the condition
- if (TEST_CONDITION(m68k, w2 & 0x3f))
+ if (TEST_CONDITION(w2 & 0x3f))
{
// trap here
- m68ki_exception_trap(m68k, EXCEPTION_TRAPV);
+ m68ki_exception_trap(EXCEPTION_TRAPV);
}
else // fall through, requires eating the operand
{
- switch (m68k->ir & 0x7)
+ switch (m_ir & 0x7)
{
case 2: // word operand
- OPER_I_16(m68k);
+ OPER_I_16();
break;
case 3: // long word operand
- OPER_I_32(m68k);
+ OPER_I_32();
break;
case 4: // no operand