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Diffstat (limited to 'src/devices/cpu/m6502/om65c02gk.lst')
-rw-r--r--src/devices/cpu/m6502/om65c02gk.lst88
1 files changed, 88 insertions, 0 deletions
diff --git a/src/devices/cpu/m6502/om65c02gk.lst b/src/devices/cpu/m6502/om65c02gk.lst
new file mode 100644
index 00000000000..9c2d732f062
--- /dev/null
+++ b/src/devices/cpu/m6502/om65c02gk.lst
@@ -0,0 +1,88 @@
+# license:BSD-3-Clause
+# copyright-holders:Peter Trauner
+# r65c02gk opcodes
+
+brk_c_imp
+ if(irq_taken || nmi_state) {
+ read_pc_noinc();
+ } else {
+ read_pc();
+ }
+ write(SP, PC >> 8);
+ dec_SP();
+ write(SP, PC);
+ dec_SP();
+ write(SP, irq_taken || nmi_state ? P & ~F_B : P);
+ dec_SP();
+ if(irq_taken && nmi_state) {
+ PC = read_arg(0x7ffa);
+ PC = set_h(PC, read_arg(0x7ffb));
+ nmi_state = false;
+ standard_irq_callback(NMI_LINE);
+ } else {
+ static int level=interrupt_controller.getlevel(); // !no gameking dual core expected
+ if (level==IRQ_GK3A) {
+ PC = read_arg(0x7fe2);
+ PC = set_h(PC, read_arg(0x7fe3));
+ } else if (level==IRQ_GK3B) {
+ PC = read_arg(0x7fe4);
+ PC = set_h(PC, read_arg(0x7fe5));
+ } else if (level==IRQ_TIMERUSER) {
+ m_bank4000->set_base(bank4000_irq);
+ PC = read_arg(0x7fee);
+ PC = set_h(PC, read_arg(0x7fef));
+ } else if (level==IRQ_INPUTS) {
+ m_bank4000->set_base(bank4000_irq);
+ PC = read_arg(0x7ff0);
+ PC = set_h(PC, read_arg(0x7ff1));
+ } else if (level==IRQ_USER) {
+ m_bank4000->set_base(bank4000_irq);
+ PC = read_arg(0x7ff2);
+ PC = set_h(PC, read_arg(0x7ff3));
+ } else if (level==IRQ_TIMER/*INPUT_LINE_IRQ9*/) {
+ m_bank4000->set_base(bank4000_irq);
+ PC = read_arg(0x7ff4);
+ PC = set_h(PC, read_arg(0x7ff5));
+ } else if (level==IRQ_6606) {
+ PC = read_arg(0x7ff6);
+ PC = set_h(PC, read_arg(0x7ff7));
+ } else {
+ PC = read_arg(0x7ffe);
+ PC = set_h(PC, read_arg(0x7fff));
+ if(irq_taken)
+ standard_irq_callback(IRQ_LINE);
+ }
+ }
+ irq_taken = false;
+ P = (P | F_I) & ~F_D; // Do *not* move after the prefetch
+ prefetch();
+ inst_state = -1;
+
+
+rti_imp
+ read_pc_noinc();
+ read(SP);
+ inc_SP();
+ P = read(SP) | (F_B|F_E);
+ inc_SP();
+ PC = read(SP);
+ inc_SP();
+ PC = set_h(PC, read(SP));
+ m_bank4000->set_base(bank4000_normal);
+ prefetch();
+
+wai_imp
+ read_pc_noinc(); /* same as m65c02 version, seams to be right*/
+ read_pc_noinc();
+ while(!nmi_state && !irq_state) {
+ eat-all-cycles;
+ }
+ prefetch();
+
+# exceptions
+reset
+ PC = read_arg(0x7ffc);
+ PC = set_h(PC, read_arg(0x7ffd));
+ prefetch();
+ inst_state = -1;
+ \ No newline at end of file