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Diffstat (limited to 'src/devices/cpu/m37710/m37710.h')
-rw-r--r--src/devices/cpu/m37710/m37710.h242
1 files changed, 121 insertions, 121 deletions
diff --git a/src/devices/cpu/m37710/m37710.h b/src/devices/cpu/m37710/m37710.h
index e88408e527a..32ec57ee04a 100644
--- a/src/devices/cpu/m37710/m37710.h
+++ b/src/devices/cpu/m37710/m37710.h
@@ -94,7 +94,7 @@ class m37710_cpu_device : public cpu_device
{
public:
// construction/destruction
- m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate);
+ m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source, address_map_delegate map_delegate);
DECLARE_READ16_MEMBER( m37710_internal_word_r );
DECLARE_WRITE16_MEMBER( m37710_internal_word_w );
@@ -105,9 +105,9 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override { return 1; }
- virtual UINT32 execute_max_cycles() const override { return 20; /* rough guess */ }
- virtual UINT32 execute_input_lines() const override { return M37710_LINE_MAX; }
+ virtual uint32_t execute_min_cycles() const override { return 1; }
+ virtual uint32_t execute_max_cycles() const override { return 20; /* rough guess */ }
+ virtual uint32_t execute_input_lines() const override { return M37710_LINE_MAX; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -120,71 +120,71 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override { return 1; }
- virtual UINT32 disasm_max_opcode_bytes() const override { return 6; }
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
+ virtual uint32_t disasm_max_opcode_bytes() const override { return 6; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
private:
address_space_config m_program_config;
address_space_config m_io_config;
- UINT32 m_a; /* Accumulator */
- UINT32 m_b; /* holds high byte of accumulator */
- UINT32 m_ba; /* Secondary Accumulator */
- UINT32 m_bb; /* holds high byte of secondary accumulator */
- UINT32 m_x; /* Index Register X */
- UINT32 m_y; /* Index Register Y */
- UINT32 m_xh; /* holds high byte of x */
- UINT32 m_yh; /* holds high byte of y */
- UINT32 m_s; /* Stack Pointer */
- UINT32 m_pc; /* Program Counter */
- UINT32 m_ppc; /* Previous Program Counter */
- UINT32 m_pb; /* Program Bank (shifted left 16) */
- UINT32 m_db; /* Data Bank (shifted left 16) */
- UINT32 m_d; /* Direct Register */
- UINT32 m_flag_e; /* Emulation Mode Flag */
- UINT32 m_flag_m; /* Memory/Accumulator Select Flag */
- UINT32 m_flag_x; /* Index Select Flag */
- UINT32 m_flag_n; /* Negative Flag */
- UINT32 m_flag_v; /* Overflow Flag */
- UINT32 m_flag_d; /* Decimal Mode Flag */
- UINT32 m_flag_i; /* Interrupt Mask Flag */
- UINT32 m_flag_z; /* Zero Flag (inverted) */
- UINT32 m_flag_c; /* Carry Flag */
- UINT32 m_line_irq; /* Bitmask of pending IRQs */
- UINT32 m_ipl; /* Interrupt priority level (top of PSW) */
- UINT32 m_ir; /* Instruction Register */
- UINT32 m_im; /* Immediate load value */
- UINT32 m_im2; /* Immediate load target */
- UINT32 m_im3; /* Immediate load target */
- UINT32 m_im4; /* Immediate load target */
- UINT32 m_irq_delay; /* delay 1 instruction before checking irq */
- UINT32 m_irq_level; /* irq level */
+ uint32_t m_a; /* Accumulator */
+ uint32_t m_b; /* holds high byte of accumulator */
+ uint32_t m_ba; /* Secondary Accumulator */
+ uint32_t m_bb; /* holds high byte of secondary accumulator */
+ uint32_t m_x; /* Index Register X */
+ uint32_t m_y; /* Index Register Y */
+ uint32_t m_xh; /* holds high byte of x */
+ uint32_t m_yh; /* holds high byte of y */
+ uint32_t m_s; /* Stack Pointer */
+ uint32_t m_pc; /* Program Counter */
+ uint32_t m_ppc; /* Previous Program Counter */
+ uint32_t m_pb; /* Program Bank (shifted left 16) */
+ uint32_t m_db; /* Data Bank (shifted left 16) */
+ uint32_t m_d; /* Direct Register */
+ uint32_t m_flag_e; /* Emulation Mode Flag */
+ uint32_t m_flag_m; /* Memory/Accumulator Select Flag */
+ uint32_t m_flag_x; /* Index Select Flag */
+ uint32_t m_flag_n; /* Negative Flag */
+ uint32_t m_flag_v; /* Overflow Flag */
+ uint32_t m_flag_d; /* Decimal Mode Flag */
+ uint32_t m_flag_i; /* Interrupt Mask Flag */
+ uint32_t m_flag_z; /* Zero Flag (inverted) */
+ uint32_t m_flag_c; /* Carry Flag */
+ uint32_t m_line_irq; /* Bitmask of pending IRQs */
+ uint32_t m_ipl; /* Interrupt priority level (top of PSW) */
+ uint32_t m_ir; /* Instruction Register */
+ uint32_t m_im; /* Immediate load value */
+ uint32_t m_im2; /* Immediate load target */
+ uint32_t m_im3; /* Immediate load target */
+ uint32_t m_im4; /* Immediate load target */
+ uint32_t m_irq_delay; /* delay 1 instruction before checking irq */
+ uint32_t m_irq_level; /* irq level */
int m_ICount; /* cycle count */
- UINT32 m_source; /* temp register */
- UINT32 m_destination; /* temp register */
+ uint32_t m_source; /* temp register */
+ uint32_t m_destination; /* temp register */
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
- UINT32 m_stopped; /* Sets how the CPU is stopped */
+ uint32_t m_stopped; /* Sets how the CPU is stopped */
// on-board peripheral stuff
- UINT8 m_m37710_regs[128];
+ uint8_t m_m37710_regs[128];
attotime m_reload[8];
emu_timer *m_timers[8];
// for debugger
- UINT32 m_debugger_pc;
- UINT32 m_debugger_pb;
- UINT32 m_debugger_db;
- UINT32 m_debugger_p;
- UINT32 m_debugger_a;
- UINT32 m_debugger_b;
+ uint32_t m_debugger_pc;
+ uint32_t m_debugger_pb;
+ uint32_t m_debugger_db;
+ uint32_t m_debugger_p;
+ uint32_t m_debugger_a;
+ uint32_t m_debugger_b;
// Statics
typedef void (m37710_cpu_device::*opcode_func)();
- typedef UINT32 (m37710_cpu_device::*get_reg_func)(int regnum);
- typedef void (m37710_cpu_device::*set_reg_func)(int regnum, UINT32 val);
+ typedef uint32_t (m37710_cpu_device::*get_reg_func)(int regnum);
+ typedef void (m37710_cpu_device::*set_reg_func)(int regnum, uint32_t val);
typedef void (m37710_cpu_device::*set_line_func)(int line, int state);
typedef int (m37710_cpu_device::*execute_func)(int cycles);
@@ -221,20 +221,20 @@ private:
execute_func m_execute;
// Implementation
- void m37710i_set_execution_mode(UINT32 mode);
+ void m37710i_set_execution_mode(uint32_t mode);
TIMER_CALLBACK_MEMBER( m37710_timer_cb );
void m37710_external_tick(int timer, int state);
void m37710_recalc_timer(int timer);
- UINT8 m37710_internal_r(int offset);
- void m37710_internal_w(int offset, UINT8 data);
- UINT32 m37710i_get_reg_M0X0(int regnum);
- UINT32 m37710i_get_reg_M0X1(int regnum);
- UINT32 m37710i_get_reg_M1X0(int regnum);
- UINT32 m37710i_get_reg_M1X1(int regnum);
- void m37710i_set_reg_M0X0(int regnum, UINT32 val);
- void m37710i_set_reg_M0X1(int regnum, UINT32 val);
- void m37710i_set_reg_M1X0(int regnum, UINT32 val);
- void m37710i_set_reg_M1X1(int regnum, UINT32 val);
+ uint8_t m37710_internal_r(int offset);
+ void m37710_internal_w(int offset, uint8_t data);
+ uint32_t m37710i_get_reg_M0X0(int regnum);
+ uint32_t m37710i_get_reg_M0X1(int regnum);
+ uint32_t m37710i_get_reg_M1X0(int regnum);
+ uint32_t m37710i_get_reg_M1X1(int regnum);
+ void m37710i_set_reg_M0X0(int regnum, uint32_t val);
+ void m37710i_set_reg_M0X1(int regnum, uint32_t val);
+ void m37710i_set_reg_M1X0(int regnum, uint32_t val);
+ void m37710i_set_reg_M1X1(int regnum, uint32_t val);
void m37710i_set_line_M0X0(int line, int state);
void m37710i_set_line_M0X1(int line, int state);
void m37710i_set_line_M1X0(int line, int state);
@@ -251,61 +251,61 @@ private:
void m37710_set_reg(int regnum, unsigned value);
void m37710_set_irq_line(int line, int state);
void m37710_restore_state();
- UINT32 m37710i_read_8_normal(UINT32 address);
- UINT32 m37710i_read_8_immediate(UINT32 address);
- UINT32 m37710i_read_8_direct(UINT32 address);
- void m37710i_write_8_normal(UINT32 address, UINT32 value);
- void m37710i_write_8_direct(UINT32 address, UINT32 value);
- UINT32 m37710i_read_16_normal(UINT32 address);
- UINT32 m37710i_read_16_immediate(UINT32 address);
- UINT32 m37710i_read_16_direct(UINT32 address);
- void m37710i_write_16_normal(UINT32 address, UINT32 value);
- void m37710i_write_16_direct(UINT32 address, UINT32 value);
- UINT32 m37710i_read_24_normal(UINT32 address);
- UINT32 m37710i_read_24_immediate(UINT32 address);
- UINT32 m37710i_read_24_direct(UINT32 address);
- void m37710i_push_8(UINT32 value);
- UINT32 m37710i_pull_8();
- void m37710i_push_16(UINT32 value);
- UINT32 m37710i_pull_16();
- void m37710i_push_24(UINT32 value);
- UINT32 m37710i_pull_24();
- void m37710i_jump_16(UINT32 address);
- void m37710i_jump_24(UINT32 address);
- void m37710i_branch_8(UINT32 offset);
- void m37710i_branch_16(UINT32 offset);
- UINT32 m37710i_get_reg_p();
- void m37710i_set_reg_ipl(UINT32 value);
- void m37710i_interrupt_software(UINT32 vector);
- void m37710i_set_flag_m0x0(UINT32 value);
- void m37710i_set_flag_m0x1(UINT32 value);
- void m37710i_set_flag_m1x0(UINT32 value);
- void m37710i_set_flag_m1x1(UINT32 value);
- void m37710i_set_reg_p_m0x0(UINT32 value);
- void m37710i_set_reg_p_m0x1(UINT32 value);
- void m37710i_set_reg_p_m1x0(UINT32 value);
- void m37710i_set_reg_p_m1x1(UINT32 value);
- UINT32 EA_IMM8();
- UINT32 EA_IMM16();
- UINT32 EA_IMM24();
- UINT32 EA_D();
- UINT32 EA_A();
- UINT32 EA_AL();
- UINT32 EA_DX();
- UINT32 EA_DY();
- UINT32 EA_AX();
- UINT32 EA_ALX();
- UINT32 EA_AY();
- UINT32 EA_DI();
- UINT32 EA_DLI();
- UINT32 EA_AI();
- UINT32 EA_ALI();
- UINT32 EA_DXI();
- UINT32 EA_DIY();
- UINT32 EA_DLIY();
- UINT32 EA_AXI();
- UINT32 EA_S();
- UINT32 EA_SIY();
+ uint32_t m37710i_read_8_normal(uint32_t address);
+ uint32_t m37710i_read_8_immediate(uint32_t address);
+ uint32_t m37710i_read_8_direct(uint32_t address);
+ void m37710i_write_8_normal(uint32_t address, uint32_t value);
+ void m37710i_write_8_direct(uint32_t address, uint32_t value);
+ uint32_t m37710i_read_16_normal(uint32_t address);
+ uint32_t m37710i_read_16_immediate(uint32_t address);
+ uint32_t m37710i_read_16_direct(uint32_t address);
+ void m37710i_write_16_normal(uint32_t address, uint32_t value);
+ void m37710i_write_16_direct(uint32_t address, uint32_t value);
+ uint32_t m37710i_read_24_normal(uint32_t address);
+ uint32_t m37710i_read_24_immediate(uint32_t address);
+ uint32_t m37710i_read_24_direct(uint32_t address);
+ void m37710i_push_8(uint32_t value);
+ uint32_t m37710i_pull_8();
+ void m37710i_push_16(uint32_t value);
+ uint32_t m37710i_pull_16();
+ void m37710i_push_24(uint32_t value);
+ uint32_t m37710i_pull_24();
+ void m37710i_jump_16(uint32_t address);
+ void m37710i_jump_24(uint32_t address);
+ void m37710i_branch_8(uint32_t offset);
+ void m37710i_branch_16(uint32_t offset);
+ uint32_t m37710i_get_reg_p();
+ void m37710i_set_reg_ipl(uint32_t value);
+ void m37710i_interrupt_software(uint32_t vector);
+ void m37710i_set_flag_m0x0(uint32_t value);
+ void m37710i_set_flag_m0x1(uint32_t value);
+ void m37710i_set_flag_m1x0(uint32_t value);
+ void m37710i_set_flag_m1x1(uint32_t value);
+ void m37710i_set_reg_p_m0x0(uint32_t value);
+ void m37710i_set_reg_p_m0x1(uint32_t value);
+ void m37710i_set_reg_p_m1x0(uint32_t value);
+ void m37710i_set_reg_p_m1x1(uint32_t value);
+ uint32_t EA_IMM8();
+ uint32_t EA_IMM16();
+ uint32_t EA_IMM24();
+ uint32_t EA_D();
+ uint32_t EA_A();
+ uint32_t EA_AL();
+ uint32_t EA_DX();
+ uint32_t EA_DY();
+ uint32_t EA_AX();
+ uint32_t EA_ALX();
+ uint32_t EA_AY();
+ uint32_t EA_DI();
+ uint32_t EA_DLI();
+ uint32_t EA_AI();
+ uint32_t EA_ALI();
+ uint32_t EA_DXI();
+ uint32_t EA_DIY();
+ uint32_t EA_DLIY();
+ uint32_t EA_AXI();
+ uint32_t EA_S();
+ uint32_t EA_SIY();
void m37710i_00_M0X0();
void m37710i_01_M0X0();
void m37710i_02_M0X0();
@@ -2014,7 +2014,7 @@ class m37702s1_device : public m37710_cpu_device
{
public:
// construction/destruction
- m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
DECLARE_ADDRESS_MAP(map, 16);
};
@@ -2023,8 +2023,8 @@ class m37702m2_device : public m37710_cpu_device
{
public:
// construction/destruction
- m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m37702m2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m37702m2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
protected:
DECLARE_ADDRESS_MAP(map, 16);
};
@@ -2033,7 +2033,7 @@ class m37710s4_device : public m37710_cpu_device
{
public:
// construction/destruction
- m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
DECLARE_ADDRESS_MAP(map, 16);
};