diff options
Diffstat (limited to 'src/devices/cpu/i960/i960.cpp')
-rw-r--r-- | src/devices/cpu/i960/i960.cpp | 182 |
1 files changed, 91 insertions, 91 deletions
diff --git a/src/devices/cpu/i960/i960.cpp b/src/devices/cpu/i960/i960.cpp index 3e74c2e676a..4be6f937e42 100644 --- a/src/devices/cpu/i960/i960.cpp +++ b/src/devices/cpu/i960/i960.cpp @@ -16,7 +16,7 @@ CPU_DISASSEMBLE( i960 ); const device_type I960 = &device_creator<i960_cpu_device>; -i960_cpu_device::i960_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) +i960_cpu_device::i960_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : cpu_device(mconfig, I960, "i960kb", tag, owner, clock, "i960kb", __FILE__) , m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0), m_rcache_pos(0), m_SAT(0), m_PRCB(0), m_PC(0), m_AC(0), m_IP(0), m_PIP(0), m_ICR(0), m_bursting(0), m_immediate_irq(0), m_immediate_vector(0), m_immediate_pri(0), m_program(nullptr), m_direct(nullptr), m_icount(0) @@ -24,7 +24,7 @@ i960_cpu_device::i960_cpu_device(const machine_config &mconfig, const char *tag, } -UINT32 i960_cpu_device::i960_read_dword_unaligned(UINT32 address) +uint32_t i960_cpu_device::i960_read_dword_unaligned(uint32_t address) { if (!DWORD_ALIGNED(address)) return m_program->read_byte(address) | m_program->read_byte(address+1)<<8 | m_program->read_byte(address+2)<<16 | m_program->read_byte(address+3)<<24; @@ -32,7 +32,7 @@ UINT32 i960_cpu_device::i960_read_dword_unaligned(UINT32 address) return m_program->read_dword(address); } -UINT16 i960_cpu_device::i960_read_word_unaligned(UINT32 address) +uint16_t i960_cpu_device::i960_read_word_unaligned(uint32_t address) { if (!WORD_ALIGNED(address)) return m_program->read_byte(address) | m_program->read_byte(address+1)<<8; @@ -40,7 +40,7 @@ UINT16 i960_cpu_device::i960_read_word_unaligned(UINT32 address) return m_program->read_word(address); } -void i960_cpu_device::i960_write_dword_unaligned(UINT32 address, UINT32 data) +void i960_cpu_device::i960_write_dword_unaligned(uint32_t address, uint32_t data) { if (!DWORD_ALIGNED(address)) { @@ -55,7 +55,7 @@ void i960_cpu_device::i960_write_dword_unaligned(UINT32 address, UINT32 data) } } -void i960_cpu_device::i960_write_word_unaligned(UINT32 address, UINT16 data) +void i960_cpu_device::i960_write_word_unaligned(uint32_t address, uint16_t data) { if (!WORD_ALIGNED(address)) { @@ -68,9 +68,9 @@ void i960_cpu_device::i960_write_word_unaligned(UINT32 address, UINT16 data) } } -void i960_cpu_device::send_iac(UINT32 adr) +void i960_cpu_device::send_iac(uint32_t adr) { - UINT32 iac[4]; + uint32_t iac[4]; iac[0] = m_program->read_dword(adr); iac[1] = m_program->read_dword(adr+4); iac[2] = m_program->read_dword(adr+8); @@ -87,11 +87,11 @@ void i960_cpu_device::send_iac(UINT32 adr) } } -UINT32 i960_cpu_device::get_ea(UINT32 opcode) +uint32_t i960_cpu_device::get_ea(uint32_t opcode) { int abase = (opcode >> 14) & 0x1f; if(!(opcode & 0x00001000)) { // MEMA - UINT32 offset = opcode & 0x1fff; + uint32_t offset = opcode & 0x1fff; if(!(opcode & 0x2000)) return offset; else @@ -100,7 +100,7 @@ UINT32 i960_cpu_device::get_ea(UINT32 opcode) int index = opcode & 0x1f; int scale = (opcode >> 7) & 0x7; int mode = (opcode >> 10) & 0xf; - UINT32 ret; + uint32_t ret; switch(mode) { case 0x4: @@ -135,7 +135,7 @@ UINT32 i960_cpu_device::get_ea(UINT32 opcode) } } -UINT32 i960_cpu_device::get_1_ri(UINT32 opcode) +uint32_t i960_cpu_device::get_1_ri(uint32_t opcode) { if(!(opcode & 0x00000800)) return m_r[opcode & 0x1f]; @@ -143,7 +143,7 @@ UINT32 i960_cpu_device::get_1_ri(UINT32 opcode) return opcode & 0x1f; } -UINT32 i960_cpu_device::get_2_ri(UINT32 opcode) +uint32_t i960_cpu_device::get_2_ri(uint32_t opcode) { if(!(opcode & 0x00001000)) return m_r[(opcode>>14) & 0x1f]; @@ -151,15 +151,15 @@ UINT32 i960_cpu_device::get_2_ri(UINT32 opcode) return (opcode>>14) & 0x1f; } -UINT64 i960_cpu_device::get_2_ri64(UINT32 opcode) +uint64_t i960_cpu_device::get_2_ri64(uint32_t opcode) { if(!(opcode & 0x00001000)) - return m_r[(opcode>>14) & 0x1f] | ((UINT64)m_r[((opcode>>14) & 0x1f)+1]<<32); + return m_r[(opcode>>14) & 0x1f] | ((uint64_t)m_r[((opcode>>14) & 0x1f)+1]<<32); else return (opcode>>14) & 0x1f; } -void i960_cpu_device::set_ri(UINT32 opcode, UINT32 val) +void i960_cpu_device::set_ri(uint32_t opcode, uint32_t val) { if(!(opcode & 0x00002000)) m_r[(opcode>>19) & 0x1f] = val; @@ -168,7 +168,7 @@ void i960_cpu_device::set_ri(UINT32 opcode, UINT32 val) } } -void i960_cpu_device::set_ri2(UINT32 opcode, UINT32 val, UINT32 val2) +void i960_cpu_device::set_ri2(uint32_t opcode, uint32_t val, uint32_t val2) { if(!(opcode & 0x00002000)) { @@ -180,7 +180,7 @@ void i960_cpu_device::set_ri2(UINT32 opcode, UINT32 val, UINT32 val2) } } -void i960_cpu_device::set_ri64(UINT32 opcode, UINT64 val) +void i960_cpu_device::set_ri64(uint32_t opcode, uint64_t val) { if(!(opcode & 0x00002000)) { m_r[(opcode>>19) & 0x1f] = val; @@ -189,7 +189,7 @@ void i960_cpu_device::set_ri64(UINT32 opcode, UINT64 val) fatalerror("I960: %x: set_ri64 on literal?\n", m_PIP); } -double i960_cpu_device::get_1_rif(UINT32 opcode) +double i960_cpu_device::get_1_rif(uint32_t opcode) { if(!(opcode & 0x00000800)) return u2f(m_r[opcode & 0x1f]); @@ -203,7 +203,7 @@ double i960_cpu_device::get_1_rif(UINT32 opcode) } } -double i960_cpu_device::get_2_rif(UINT32 opcode) +double i960_cpu_device::get_2_rif(uint32_t opcode) { if(!(opcode & 0x00001000)) return u2f(m_r[(opcode>>14) & 0x1f]); @@ -217,7 +217,7 @@ double i960_cpu_device::get_2_rif(UINT32 opcode) } } -void i960_cpu_device::set_rif(UINT32 opcode, double val) +void i960_cpu_device::set_rif(uint32_t opcode, double val) { if(!(opcode & 0x00002000)) m_r[(opcode>>19) & 0x1f] = f2u(val); @@ -227,11 +227,11 @@ void i960_cpu_device::set_rif(UINT32 opcode, double val) fatalerror("I960: %x: set_rif on literal?\n", m_PIP); } -double i960_cpu_device::get_1_rifl(UINT32 opcode) +double i960_cpu_device::get_1_rifl(uint32_t opcode) { if(!(opcode & 0x00000800)) { - UINT64 v = m_r[opcode & 0x1e]; - v |= ((UINT64)(m_r[(opcode & 0x1e)+1]))<<32; + uint64_t v = m_r[opcode & 0x1e]; + v |= ((uint64_t)(m_r[(opcode & 0x1e)+1]))<<32; return u2d(v); } else { int idx = opcode & 0x1f; @@ -243,11 +243,11 @@ double i960_cpu_device::get_1_rifl(UINT32 opcode) } } -double i960_cpu_device::get_2_rifl(UINT32 opcode) +double i960_cpu_device::get_2_rifl(uint32_t opcode) { if(!(opcode & 0x00001000)) { - UINT64 v = m_r[(opcode >> 14) & 0x1e]; - v |= ((UINT64)(m_r[((opcode>>14) & 0x1e)+1]))<<32; + uint64_t v = m_r[(opcode >> 14) & 0x1e]; + v |= ((uint64_t)(m_r[((opcode>>14) & 0x1e)+1]))<<32; return u2d(v); } else { int idx = (opcode>>14) & 0x1f; @@ -259,10 +259,10 @@ double i960_cpu_device::get_2_rifl(UINT32 opcode) } } -void i960_cpu_device::set_rifl(UINT32 opcode, double val) +void i960_cpu_device::set_rifl(uint32_t opcode, double val) { if(!(opcode & 0x00002000)) { - UINT64 v = d2u(val); + uint64_t v = d2u(val); m_r[(opcode>>19) & 0x1e] = v; m_r[((opcode>>19) & 0x1e)+1] = v>>32; } else if(!(opcode & 0x00e00000)) @@ -271,7 +271,7 @@ void i960_cpu_device::set_rifl(UINT32 opcode, double val) fatalerror("I960: %x: set_rifl on literal?\n", m_PIP); } -UINT32 i960_cpu_device::get_1_ci(UINT32 opcode) +uint32_t i960_cpu_device::get_1_ci(uint32_t opcode) { if(!(opcode & 0x00002000)) return m_r[(opcode >> 19) & 0x1f]; @@ -279,30 +279,30 @@ UINT32 i960_cpu_device::get_1_ci(UINT32 opcode) return (opcode >> 19) & 0x1f; } -UINT32 i960_cpu_device::get_2_ci(UINT32 opcode) +uint32_t i960_cpu_device::get_2_ci(uint32_t opcode) { return m_r[(opcode >> 14) & 0x1f]; } -UINT32 i960_cpu_device::get_disp(UINT32 opcode) +uint32_t i960_cpu_device::get_disp(uint32_t opcode) { - UINT32 disp; + uint32_t disp; disp = opcode & 0xffffff; if(disp & 0x00800000) disp |= 0xff000000; return disp-4; } -UINT32 i960_cpu_device::get_disp_s(UINT32 opcode) +uint32_t i960_cpu_device::get_disp_s(uint32_t opcode) { - UINT32 disp; + uint32_t disp; disp = opcode & 0x1fff; if(disp & 0x00001000) disp |= 0xffffe000; return disp-4; } -void i960_cpu_device::cmp_s(INT32 v1, INT32 v2) +void i960_cpu_device::cmp_s(int32_t v1, int32_t v2) { m_AC &= ~7; if(v1<v2) @@ -313,7 +313,7 @@ void i960_cpu_device::cmp_s(INT32 v1, INT32 v2) m_AC |= 1; } -void i960_cpu_device::cmp_u(UINT32 v1, UINT32 v2) +void i960_cpu_device::cmp_u(uint32_t v1, uint32_t v2) { m_AC &= ~7; if(v1<v2) @@ -324,7 +324,7 @@ void i960_cpu_device::cmp_u(UINT32 v1, UINT32 v2) m_AC |= 1; } -void i960_cpu_device::concmp_s(INT32 v1, INT32 v2) +void i960_cpu_device::concmp_s(int32_t v1, int32_t v2) { m_AC &= ~7; if(v1 <= v2) @@ -333,7 +333,7 @@ void i960_cpu_device::concmp_s(INT32 v1, INT32 v2) m_AC |= 1; } -void i960_cpu_device::concmp_u(UINT32 v1, UINT32 v2) +void i960_cpu_device::concmp_u(uint32_t v1, uint32_t v2) { m_AC &= ~7; if(v1 <= v2) @@ -353,21 +353,21 @@ void i960_cpu_device::cmp_d(double v1, double v2) m_AC |= 1; } -void i960_cpu_device::bxx(UINT32 opcode, int mask) +void i960_cpu_device::bxx(uint32_t opcode, int mask) { if(m_AC & mask) { m_IP += get_disp(opcode); } } -void i960_cpu_device::bxx_s(UINT32 opcode, int mask) +void i960_cpu_device::bxx_s(uint32_t opcode, int mask) { if(m_AC & mask) { m_IP += get_disp_s(opcode); } } -void i960_cpu_device::test(UINT32 opcode, int mask) +void i960_cpu_device::test(uint32_t opcode, int mask) { if(m_AC & mask) m_r[(opcode>>19) & 0x1f] = 1; @@ -382,7 +382,7 @@ void i960_cpu_device::take_interrupt(int vector, int lvl) int int_tab = m_program->read_dword(m_PRCB+20); // interrupt table int int_SP = m_program->read_dword(m_PRCB+24); // interrupt stack int SP; - UINT32 IRQV; + uint32_t IRQV; IRQV = m_program->read_dword(int_tab + 36 + (vector-8)*4); @@ -419,7 +419,7 @@ void i960_cpu_device::check_irqs() int pending_pri; int lvl, irq, take = -1; int vword; - static const UINT32 lvlmask[4] = { 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 }; + static const uint32_t lvlmask[4] = { 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 }; pending_pri = m_program->read_dword(int_tab); // read pending priorities @@ -477,10 +477,10 @@ void i960_cpu_device::check_irqs() } } -void i960_cpu_device::do_call(UINT32 adr, int type, UINT32 stack) +void i960_cpu_device::do_call(uint32_t adr, int type, uint32_t stack) { int i; - UINT32 FP; + uint32_t FP; // call and callx take 9 cycles base m_icount -= 9; @@ -499,7 +499,7 @@ void i960_cpu_device::do_call(UINT32 adr, int type, UINT32 stack) } else // a cache entry is available, use it { - memcpy(&m_rcache[m_rcache_pos][0], m_r, 0x10 * sizeof(UINT32)); + memcpy(&m_rcache[m_rcache_pos][0], m_r, 0x10 * sizeof(uint32_t)); m_rcache_frame_addr[m_rcache_pos] = m_r[I960_FP] & ~0x3f; } m_rcache_pos++; @@ -542,7 +542,7 @@ void i960_cpu_device::do_ret_0() } else { - memcpy(m_r, m_rcache[m_rcache_pos], 0x10*sizeof(UINT32)); + memcpy(m_r, m_rcache[m_rcache_pos], 0x10*sizeof(uint32_t)); } // osd_printf_debug("RET (type %d): FP %x, %x => %x, rcache_pos %d\n", type, m_r[I960_FP], m_IP, m_r[I960_RIP], m_rcache_pos); @@ -551,7 +551,7 @@ void i960_cpu_device::do_ret_0() void i960_cpu_device::do_ret() { - UINT32 x, y; + uint32_t x, y; m_icount -= 7; switch(m_r[I960_PFP] & 7) { case 0: @@ -575,9 +575,9 @@ void i960_cpu_device::do_ret() } } -void i960_cpu_device::execute_op(UINT32 opcode) +void i960_cpu_device::execute_op(uint32_t opcode) { - UINT32 t1, t2; + uint32_t t1, t2; double t1f, t2f; switch(opcode >> 24) { @@ -960,11 +960,11 @@ void i960_cpu_device::execute_op(UINT32 opcode) m_icount--; t1 = get_1_ri(opcode); t2 = get_2_ri(opcode); - if(((INT32)t2) < 0) { + if(((int32_t)t2) < 0) { if(t2 & ((1<<t1)-1)) - set_ri(opcode, (((INT32)t2)>>t1)+1); + set_ri(opcode, (((int32_t)t2)>>t1)+1); else - set_ri(opcode, ((INT32)t2)>>t1); + set_ri(opcode, ((int32_t)t2)>>t1); } else set_ri(opcode, t2>>t1); break; @@ -973,7 +973,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) m_icount--; t1 = get_1_ri(opcode); t2 = get_2_ri(opcode); - set_ri(opcode, ((INT32)t2)>>t1); + set_ri(opcode, ((int32_t)t2)>>t1); break; case 0xc: // shlo @@ -1088,7 +1088,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) switch((opcode >> 7) & 0xf) { case 0x0: // addc { - UINT64 res; + uint64_t res; m_icount -= 2; t1 = get_1_ri(opcode); @@ -1098,7 +1098,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) m_AC &= ~0x3; // clear C and V // set carry - m_AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0; + m_AC |= ((res) & (((uint64_t)1) << 32)) ? 0x2 : 0; // set overflow m_AC |= (((res) ^ (t1)) & ((res) ^ (t2)) & 0x80000000) ? 1: 0; } @@ -1106,7 +1106,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) case 0x2: // subc { - UINT64 res; + uint64_t res; m_icount -= 2; t1 = get_1_ri(opcode); @@ -1116,7 +1116,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) m_AC &= ~0x3; // clear C and V // set carry - m_AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0; + m_AC |= ((res) & (((uint64_t)1) << 32)) ? 0x2 : 0; // set overflow m_AC |= (((t2) ^ (t1)) & ((t2) ^ (res)) & 0x80000000) ? 1 : 0; } @@ -1149,7 +1149,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) t1 = opcode & 0x1f; m_r[t2] = m_r[t2+1] = t1; } else - memcpy(m_r+t2, m_r+(opcode & 0x1f), 2*sizeof(UINT32)); + memcpy(m_r+t2, m_r+(opcode & 0x1f), 2*sizeof(uint32_t)); break; default: @@ -1166,7 +1166,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) t1 = opcode & 0x1f; m_r[t2] = m_r[t2+1] = m_r[t2+2]= t1; } else - memcpy(m_r+t2, m_r+(opcode & 0x1f), 3*sizeof(UINT32)); + memcpy(m_r+t2, m_r+(opcode & 0x1f), 3*sizeof(uint32_t)); break; default: @@ -1183,7 +1183,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) t1 = opcode & 0x1f; m_r[t2] = m_r[t2+1] = m_r[t2+2] = m_r[t2+3] = t1; } else - memcpy(m_r+t2, m_r+(opcode & 0x1f), 4*sizeof(UINT32)); + memcpy(m_r+t2, m_r+(opcode & 0x1f), 4*sizeof(uint32_t)); break; default: @@ -1229,7 +1229,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) switch((opcode >> 7) & 0xf) { case 0x0: // spanbit { - UINT32 res = 0xffffffff; + uint32_t res = 0xffffffff; int i; m_icount -= 10; @@ -1253,7 +1253,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) case 0x1: // scanbit { - UINT32 res = 0xffffffff; + uint32_t res = 0xffffffff; int i; m_icount -= 10; @@ -1316,7 +1316,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) for (i = 0; i < 0x10; i++) { - m_program->write_dword(m_rcache_frame_addr[t1] + (i * sizeof(UINT32)), m_rcache[t1][i]); + m_program->write_dword(m_rcache_frame_addr[t1] + (i * sizeof(uint32_t)), m_rcache[t1][i]); } } m_rcache_pos = 0; @@ -1334,13 +1334,13 @@ void i960_cpu_device::execute_op(UINT32 opcode) t1 = get_1_ri(opcode); t2 = get_2_ri(opcode); - set_ri64(opcode, (INT64)t1 * (INT64)t2); + set_ri64(opcode, (int64_t)t1 * (int64_t)t2); break; case 0x1: // ediv m_icount -= 37; { - UINT64 src1, src2; + uint64_t src1, src2; src1 = get_1_ri(opcode); src2 = get_2_ri64(opcode); @@ -1352,27 +1352,27 @@ void i960_cpu_device::execute_op(UINT32 opcode) case 0x4: // cvtir m_icount -= 30; t1 = get_1_ri(opcode); - set_rif(opcode, (double)(INT32)t1); + set_rif(opcode, (double)(int32_t)t1); break; case 0x5: // cvtilr m_icount -= 30; t1 = get_1_ri(opcode); - set_rifl(opcode, (double)(INT32)t1); + set_rifl(opcode, (double)(int32_t)t1); break; case 0x6: // scalerl m_icount -= 30; t1 = get_1_ri(opcode); t2f = get_2_rifl(opcode); - set_rifl(opcode, t2f * pow(2.0, (double)(INT32)t1)); + set_rifl(opcode, t2f * pow(2.0, (double)(int32_t)t1)); break; case 0x7: // scaler m_icount -= 30; t1 = get_1_ri(opcode); t2f = get_2_rif(opcode); - set_rif(opcode, t2f * pow(2.0, (double)(INT32)t1)); + set_rif(opcode, t2f * pow(2.0, (double)(int32_t)t1)); break; default: @@ -1424,7 +1424,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) case 0xb: // roundr { - INT32 st1 = get_1_rif(opcode); + int32_t st1 = get_1_rif(opcode); m_icount -= 69; set_rif(opcode, (double)st1); } @@ -1495,7 +1495,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) case 0xb: // roundrl { - INT32 st1 = get_1_rifl(opcode); + int32_t st1 = get_1_rifl(opcode); m_icount -= 70; set_rifl(opcode, (double)st1); } @@ -1539,19 +1539,19 @@ void i960_cpu_device::execute_op(UINT32 opcode) case 2: t2f = ceil(t1f); break; case 3: t2f = t1f; break; } - set_ri(opcode, (INT32)t2f); + set_ri(opcode, (int32_t)t2f); break; case 0x2: // cvtzri m_icount -= 43; t1f = get_1_rif(opcode); - set_ri(opcode, (INT32)t1f); + set_ri(opcode, (int32_t)t1f); break; case 0x3: // cvtzril m_icount -= 44; t1f = get_1_rif(opcode); - set_ri64(opcode, (INT64)t1f); + set_ri64(opcode, (int64_t)t1f); break; case 0x9: // movr @@ -1582,22 +1582,22 @@ void i960_cpu_device::execute_op(UINT32 opcode) switch((opcode >> 7) & 0xf) { case 0x1: // movre { - UINT32 *src=nullptr, *dst=nullptr; + uint32_t *src=nullptr, *dst=nullptr; m_icount -= 8; if(!(opcode & 0x00000800)) { - src = (UINT32 *)&m_r[opcode & 0x1e]; + src = (uint32_t *)&m_r[opcode & 0x1e]; } else { int idx = opcode & 0x1f; if(idx < 4) - src = (UINT32 *)&m_fp[idx]; + src = (uint32_t *)&m_fp[idx]; } if(!(opcode & 0x00002000)) { - dst = (UINT32 *)&m_r[(opcode>>19) & 0x1e]; + dst = (uint32_t *)&m_r[(opcode>>19) & 0x1e]; } else if(!(opcode & 0x00e00000)) - dst = (UINT32 *)&m_fp[(opcode>>19) & 3]; + dst = (uint32_t *)&m_fp[(opcode>>19) & 3]; dst[0] = src[0]; dst[1] = src[1]; @@ -1656,21 +1656,21 @@ void i960_cpu_device::execute_op(UINT32 opcode) m_icount -= 18; t1 = get_1_ri(opcode); t2 = get_2_ri(opcode); - set_ri(opcode, ((INT32)t2)*((INT32)t1)); + set_ri(opcode, ((int32_t)t2)*((int32_t)t1)); break; case 0x8: // remi m_icount -= 37; t1 = get_1_ri(opcode); t2 = get_2_ri(opcode); - set_ri(opcode, ((INT32)t2)%((INT32)t1)); + set_ri(opcode, ((int32_t)t2)%((int32_t)t1)); break; case 0x9:{// modi - INT32 src1, src2, dst; + int32_t src1, src2, dst; m_icount -= 37; - src1 = (INT32)get_1_ri(opcode); - src2 = (INT32)get_2_ri(opcode); + src1 = (int32_t)get_1_ri(opcode); + src2 = (int32_t)get_2_ri(opcode); dst = src2 - ((src2/src1)*src1); if(((src2*src1) < 0) && (dst != 0)) dst += src1; @@ -1682,7 +1682,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) m_icount -= 37; t1 = get_1_ri(opcode); t2 = get_2_ri(opcode); - set_ri(opcode, ((INT32)t2)/((INT32)t1)); + set_ri(opcode, ((int32_t)t2)/((int32_t)t1)); break; default: @@ -1898,7 +1898,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) case 0xc0: // ldib m_icount -= 4; - m_r[(opcode>>19)&0x1f] = (INT8)m_program->read_byte(get_ea(opcode)); + m_r[(opcode>>19)&0x1f] = (int8_t)m_program->read_byte(get_ea(opcode)); break; case 0xc2: // stib @@ -1908,7 +1908,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) case 0xc8: // ldis m_icount -= 4; - m_r[(opcode>>19)&0x1f] = (INT16)i960_read_word_unaligned(get_ea(opcode)); + m_r[(opcode>>19)&0x1f] = (int16_t)i960_read_word_unaligned(get_ea(opcode)); break; case 0xca: // stis @@ -1924,7 +1924,7 @@ void i960_cpu_device::execute_op(UINT32 opcode) void i960_cpu_device::execute_run() { - UINT32 opcode; + uint32_t opcode; check_irqs(); while(m_icount > 0) { @@ -1946,7 +1946,7 @@ void i960_cpu_device::execute_set_input(int irqline, int state) int cpu_pri = (m_PC>>16)&0x1f; int vector =0; int priority; - UINT32 pend, word, wordofs; + uint32_t pend, word, wordofs; // We support the 4 external IRQ lines in "normal" mode only. // The i960's interrupt support is a bit more complete than that, @@ -2117,7 +2117,7 @@ void i960_cpu_device::device_reset() } -offs_t i960_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) +offs_t i960_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) { extern CPU_DISASSEMBLE( i960 ); return CPU_DISASSEMBLE_NAME(i960)(this, buffer, pc, oprom, opram, options); |