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Diffstat (limited to 'src/devices/cpu/dsp56k/dsp56pcu.cpp')
-rw-r--r--src/devices/cpu/dsp56k/dsp56pcu.cpp106
1 files changed, 53 insertions, 53 deletions
diff --git a/src/devices/cpu/dsp56k/dsp56pcu.cpp b/src/devices/cpu/dsp56k/dsp56pcu.cpp
index 5bfe52cd242..2c7da64c1ed 100644
--- a/src/devices/cpu/dsp56k/dsp56pcu.cpp
+++ b/src/devices/cpu/dsp56k/dsp56pcu.cpp
@@ -14,34 +14,34 @@ namespace DSP56K
/* |-------------------------------------| |-------------------------------| */
/* */
/* ************************************************************************* */
-UINT8 LF_bit(const dsp56k_core* cpustate) { return (SR & 0x8000) >> 15; }
-UINT8 FV_bit(const dsp56k_core* cpustate) { return (SR & 0x4000) >> 14; }
-// UINT8 S_bits(const dsp56k_core* cpustate) { return (SR & 0x0c00) >> 10; }
-UINT8 I_bits(const dsp56k_core* cpustate) { return (SR & 0x0300) >> 8; }
-UINT8 S_bit (const dsp56k_core* cpustate) { return (SR & 0x0080) >> 7; }
-UINT8 L_bit (const dsp56k_core* cpustate) { return (SR & 0x0040) >> 6; }
-UINT8 E_bit (const dsp56k_core* cpustate) { return (SR & 0x0020) >> 5; }
-UINT8 U_bit (const dsp56k_core* cpustate) { return (SR & 0x0010) >> 4; }
-UINT8 N_bit (const dsp56k_core* cpustate) { return (SR & 0x0008) >> 3; }
-UINT8 Z_bit (const dsp56k_core* cpustate) { return (SR & 0x0004) >> 2; }
-UINT8 V_bit (const dsp56k_core* cpustate) { return (SR & 0x0002) >> 1; }
-UINT8 C_bit (const dsp56k_core* cpustate) { return (SR & 0x0001) >> 0; }
+uint8_t LF_bit(const dsp56k_core* cpustate) { return (SR & 0x8000) >> 15; }
+uint8_t FV_bit(const dsp56k_core* cpustate) { return (SR & 0x4000) >> 14; }
+// uint8_t S_bits(const dsp56k_core* cpustate) { return (SR & 0x0c00) >> 10; }
+uint8_t I_bits(const dsp56k_core* cpustate) { return (SR & 0x0300) >> 8; }
+uint8_t S_bit (const dsp56k_core* cpustate) { return (SR & 0x0080) >> 7; }
+uint8_t L_bit (const dsp56k_core* cpustate) { return (SR & 0x0040) >> 6; }
+uint8_t E_bit (const dsp56k_core* cpustate) { return (SR & 0x0020) >> 5; }
+uint8_t U_bit (const dsp56k_core* cpustate) { return (SR & 0x0010) >> 4; }
+uint8_t N_bit (const dsp56k_core* cpustate) { return (SR & 0x0008) >> 3; }
+uint8_t Z_bit (const dsp56k_core* cpustate) { return (SR & 0x0004) >> 2; }
+uint8_t V_bit (const dsp56k_core* cpustate) { return (SR & 0x0002) >> 1; }
+uint8_t C_bit (const dsp56k_core* cpustate) { return (SR & 0x0001) >> 0; }
/* MR setters */
-void LF_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x8000); else (SR &= (~0x8000)); }
-void FV_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x4000); else (SR &= (~0x4000)); }
-void S_bits_set(dsp56k_core* cpustate, UINT8 value) { value = value & 0x03; SR &= ~(0x0c00); SR |= (value << 10); }
-void I_bits_set(dsp56k_core* cpustate, UINT8 value) { value = value & 0x03; SR &= ~(0x0300); SR |= (value << 8); }
+void LF_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x8000); else (SR &= (~0x8000)); }
+void FV_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x4000); else (SR &= (~0x4000)); }
+void S_bits_set(dsp56k_core* cpustate, uint8_t value) { value = value & 0x03; SR &= ~(0x0c00); SR |= (value << 10); }
+void I_bits_set(dsp56k_core* cpustate, uint8_t value) { value = value & 0x03; SR &= ~(0x0300); SR |= (value << 8); }
/* CCR setters */
-void S_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0080); else (SR &= (~0x0080)); }
-void L_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0040); else (SR &= (~0x0040)); }
-void E_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0020); else (SR &= (~0x0020)); }
-void U_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0010); else (SR &= (~0x0010)); }
-void N_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0008); else (SR &= (~0x0008)); }
-void Z_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0004); else (SR &= (~0x0004)); }
-void V_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0002); else (SR &= (~0x0002)); }
-void C_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0001); else (SR &= (~0x0001)); }
+void S_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0080); else (SR &= (~0x0080)); }
+void L_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0040); else (SR &= (~0x0040)); }
+void E_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0020); else (SR &= (~0x0020)); }
+void U_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0010); else (SR &= (~0x0010)); }
+void N_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0008); else (SR &= (~0x0008)); }
+void Z_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0004); else (SR &= (~0x0004)); }
+void V_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0002); else (SR &= (~0x0002)); }
+void C_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (SR |= 0x0001); else (SR &= (~0x0001)); }
@@ -54,23 +54,23 @@ void C_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (SR |= 0x0001);
/* |---------------------------------------------------------------------| */
/* */
/* ************************************************************************* */
-// UINT8 CD_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0080) != 0); }
-// UINT8 SD_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0040) != 0); }
-// UINT8 R_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0020) != 0); }
-// UINT8 SA_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0010) != 0); }
-// UINT8 MC_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0004) != 0); }
-UINT8 MB_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0002) != 0); }
-UINT8 MA_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0001) != 0); }
-
-void CD_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0080); else (OMR &= (~0x0080)); }
-void SD_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0040); else (OMR &= (~0x0040)); }
-void R_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0020); else (OMR &= (~0x0020)); }
-void SA_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0010); else (OMR &= (~0x0010)); }
-void MC_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0004); else (OMR &= (~0x0004)); }
-void MB_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0002); else (OMR &= (~0x0002)); }
-void MA_bit_set(dsp56k_core* cpustate, UINT8 value) { if (value) (OMR |= 0x0001); else (OMR &= (~0x0001)); }
-
-UINT8 dsp56k_operating_mode(const dsp56k_core* cpustate)
+// uint8_t CD_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0080) != 0); }
+// uint8_t SD_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0040) != 0); }
+// uint8_t R_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0020) != 0); }
+// uint8_t SA_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0010) != 0); }
+// uint8_t MC_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0004) != 0); }
+uint8_t MB_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0002) != 0); }
+uint8_t MA_bit(const dsp56k_core* cpustate) { return ((OMR & 0x0001) != 0); }
+
+void CD_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0080); else (OMR &= (~0x0080)); }
+void SD_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0040); else (OMR &= (~0x0040)); }
+void R_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0020); else (OMR &= (~0x0020)); }
+void SA_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0010); else (OMR &= (~0x0010)); }
+void MC_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0004); else (OMR &= (~0x0004)); }
+void MB_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0002); else (OMR &= (~0x0002)); }
+void MA_bit_set(dsp56k_core* cpustate, uint8_t value) { if (value) (OMR |= 0x0001); else (OMR &= (~0x0001)); }
+
+uint8_t dsp56k_operating_mode(const dsp56k_core* cpustate)
{
return ((MB_bit(cpustate) << 1) | MA_bit(cpustate));
}
@@ -86,11 +86,11 @@ UINT8 dsp56k_operating_mode(const dsp56k_core* cpustate)
/* |---------------------------------------------------------------------| */
/* */
/* ************************************************************************* */
-UINT8 UF_bit(const dsp56k_core* cpustate) { return ((SP & 0x0020) != 0); }
-UINT8 SE_bit(const dsp56k_core* cpustate) { return ((SP & 0x0010) != 0); }
+uint8_t UF_bit(const dsp56k_core* cpustate) { return ((SP & 0x0020) != 0); }
+uint8_t SE_bit(const dsp56k_core* cpustate) { return ((SP & 0x0010) != 0); }
-//void UF_bit_set(dsp56k_core* cpustate, UINT8 value) {};
-//void SE_bit_set(dsp56k_core* cpustate, UINT8 value) {};
+//void UF_bit_set(dsp56k_core* cpustate, uint8_t value) {};
+//void SE_bit_set(dsp56k_core* cpustate, uint8_t value) {};
@@ -137,7 +137,7 @@ void pcu_reset(dsp56k_core* cpustate)
/* This, in actuality, is handled with the internal boot ROM. */
for (i = 0; i < 0x800; i++)
{
- UINT32 mem_offset = (0xc000<<1) + (i<<1); /* TODO: TEST */
+ uint32_t mem_offset = (0xc000<<1) + (i<<1); /* TODO: TEST */
/* TODO - DO I HAVE TO FLIP THIS WORD? */
/* P:$c000 -> Internal P:$0000 low byte */
@@ -145,8 +145,8 @@ void pcu_reset(dsp56k_core* cpustate)
/* ... */
/* P:$cffe -> Internal P:$07ff low byte */
/* P:$cfff -> Internal P:$07ff high byte */
- UINT8 mem_value_low = cpustate->program->read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
- UINT8 mem_value_high = cpustate->program->read_byte(mem_offset);
+ uint8_t mem_value_low = cpustate->program->read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
+ uint8_t mem_value_high = cpustate->program->read_byte(mem_offset);
cpustate->program_ram[i] = (mem_value_high << 8) || mem_value_low;
}
@@ -239,7 +239,7 @@ void pcu_reset(dsp56k_core* cpustate)
***************************************************************************/
struct dsp56k_irq_data
{
- UINT16 irq_vector;
+ uint16_t irq_vector;
char irq_source[128];
};
@@ -266,7 +266,7 @@ void pcu_service_interrupts(dsp56k_core* cpustate)
const int interrupt_index = cpustate->PCU.pending_interrupts[i];
/* Get the priority of the interrupt - a return value of -1 means disabled! */
- INT8 priority = dsp56k_get_irq_priority(cpustate, interrupt_index);
+ int8_t priority = dsp56k_get_irq_priority(cpustate, interrupt_index);
/* 1-12 Make sure you're not masked out against the Interrupt Mask Bits (disabled is handled for free here) */
if (priority >= I_bits(cpustate))
@@ -283,7 +283,7 @@ void pcu_service_interrupts(dsp56k_core* cpustate)
else
{
/* The host command input has a floating vector. */
- const UINT16 irq_vector = HV_bits(cpustate) << 1;
+ const uint16_t irq_vector = HV_bits(cpustate) << 1;
PC = irq_vector;
@@ -314,7 +314,7 @@ void dsp56k_add_pending_interrupt(dsp56k_core* cpustate, const char* name)
}
/* Utility function to construct IRQ table */
-void dsp56k_set_irq_source(UINT8 irq_num, UINT16 iv, const char* source)
+void dsp56k_set_irq_source(uint8_t irq_num, uint16_t iv, const char* source)
{
dsp56k_interrupt_sources[irq_num].irq_vector = iv;
strcpy(dsp56k_interrupt_sources[irq_num].irq_source, source);
@@ -420,7 +420,7 @@ void dsp56k_sort_pending_interrupts(dsp56k_core* cpustate, int num)
}
/* Given an index into the irq table, return the interrupt's current priority */
-INT8 dsp56k_get_irq_priority(dsp56k_core* cpustate, int index)
+int8_t dsp56k_get_irq_priority(dsp56k_core* cpustate, int index)
{
/* 1-12 */
switch (index)