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Diffstat (limited to 'src/devices/cpu/dsp56156/dsp56pcu.cpp')
-rw-r--r--src/devices/cpu/dsp56156/dsp56pcu.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/devices/cpu/dsp56156/dsp56pcu.cpp b/src/devices/cpu/dsp56156/dsp56pcu.cpp
index 94ca3b1caae..fed41a5d267 100644
--- a/src/devices/cpu/dsp56156/dsp56pcu.cpp
+++ b/src/devices/cpu/dsp56156/dsp56pcu.cpp
@@ -57,7 +57,7 @@ void C_bit_set(dsp56156_core* cpustate, uint8_t value) { if (value) (SR |= 0x000
/* ************************************************************************* */
// uint8_t CD_bit(const dsp56156_core* cpustate) { return ((OMR & 0x0080) != 0); }
// uint8_t SD_bit(const dsp56156_core* cpustate) { return ((OMR & 0x0040) != 0); }
-// uint8_t R_bit(const dsp56156_core* cpustate) { return ((OMR & 0x0020) != 0); }
+uint8_t R_bit(const dsp56156_core* cpustate) { return ((OMR & 0x0020) != 0); }
// uint8_t SA_bit(const dsp56156_core* cpustate) { return ((OMR & 0x0010) != 0); }
// uint8_t MC_bit(const dsp56156_core* cpustate) { return ((OMR & 0x0004) != 0); }
uint8_t MB_bit(const dsp56156_core* cpustate) { return ((OMR & 0x0002) != 0); }
@@ -113,6 +113,7 @@ void pcu_init(dsp56156_core* cpustate, device_t *device)
device->save_item(NAME(cpustate->PCU.ss));
device->save_item(NAME(cpustate->PCU.pending_interrupts));
device->save_item(NAME(cpustate->PCU.reset_vector));
+ device->save_item(NAME(cpustate->PCU.ipc));
}
void pcu_reset(dsp56156_core* cpustate)
@@ -146,8 +147,8 @@ void pcu_reset(dsp56156_core* cpustate)
/* ... */
/* P:$cffe -> Internal P:$07ff low byte */
/* P:$cfff -> Internal P:$07ff high byte */
- uint8_t mem_value_low = cpustate->program->read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
- uint8_t mem_value_high = cpustate->program->read_byte(mem_offset);
+ uint8_t mem_value_low = cpustate->program.read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
+ uint8_t mem_value_high = cpustate->program.read_byte(mem_offset);
cpustate->program_ram[i] = (mem_value_high << 8) | mem_value_low;
}
@@ -168,7 +169,7 @@ void pcu_reset(dsp56156_core* cpustate)
/* they need. Once they've had their fill, they turn bootstrap mode off */
/* and the CPU begins execution at 0x0000; */
/* HACK - Read bit 15 at 0xc000 to see if we're working with the SSIO or host interface. */
- if (cpustate->program->read_word(0xc000<<1) & 0x8000)
+ if (cpustate->program.read_word(0xc000<<1) & 0x8000)
{
cpustate->bootstrap_mode = BOOTSTRAP_SSIX;
cpustate->device->logerror("DSP56156 : Currently in (hacked) bootstrap mode - reading from SSIx.\n");
@@ -272,8 +273,7 @@ void pcu_service_interrupts(dsp56156_core* cpustate)
/* 1-12 Make sure you're not masked out against the Interrupt Mask Bits (disabled is handled for free here) */
if (priority >= I_bits(cpustate))
{
- /* TODO: Implement long interrupts & fast interrupts correctly! */
- /* Right now they are handled in the JSR & BSR ops. SupahLame. */
+ IPC = PC;
/* Are you anything but the Host Command interrupt? */
if (interrupt_index != 22)