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Diffstat (limited to 'src/devices/cpu/dsp16/dsp16.h')
-rw-r--r--src/devices/cpu/dsp16/dsp16.h114
1 files changed, 57 insertions, 57 deletions
diff --git a/src/devices/cpu/dsp16/dsp16.h b/src/devices/cpu/dsp16/dsp16.h
index 6e509da0569..1a558f1f18a 100644
--- a/src/devices/cpu/dsp16/dsp16.h
+++ b/src/devices/cpu/dsp16/dsp16.h
@@ -24,7 +24,7 @@ class dsp16_device : public cpu_device
{
public:
// construction/destruction
- dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// public interfaces
@@ -34,11 +34,11 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return (clocks + 2 - 1) / 2; } // internal /2 divider
- virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return (cycles * 2); } // internal /2 divider
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 2 - 1) / 2; } // internal /2 divider
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 2); } // internal /2 divider
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -49,9 +49,9 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
// address spaces
const address_space_config m_program_config;
@@ -59,57 +59,57 @@ protected:
// CPU registers
// ROM Address Arithmetic Unit (XAAU) (page 2-4)
- UINT16 m_i; // 12 bits
- UINT16 m_pc;
- UINT16 m_pt;
- UINT16 m_pr;
- UINT16 m_pi;
+ uint16_t m_i; // 12 bits
+ uint16_t m_pc;
+ uint16_t m_pt;
+ uint16_t m_pr;
+ uint16_t m_pi;
// RAM Address Arithmetic Unit (YAAU) (page 2-6)
- UINT16 m_j; // Signed
- UINT16 m_k; // Signed
- UINT16 m_rb;
- UINT16 m_re;
- UINT16 m_r0;
- UINT16 m_r1;
- UINT16 m_r2;
- UINT16 m_r3;
+ uint16_t m_j; // Signed
+ uint16_t m_k; // Signed
+ uint16_t m_rb;
+ uint16_t m_re;
+ uint16_t m_r0;
+ uint16_t m_r1;
+ uint16_t m_r2;
+ uint16_t m_r3;
// Data Arithmetic Unit (DAU) (page 2-6)
- UINT16 m_x;
- UINT32 m_y;
- UINT32 m_p;
- UINT64 m_a0; // 36 bits
- UINT64 m_a1; // 36 bits
- UINT8 m_auc; // 6 bits
- UINT16 m_psw;
- UINT8 m_c0;
- UINT8 m_c1;
- UINT8 m_c2;
+ uint16_t m_x;
+ uint32_t m_y;
+ uint32_t m_p;
+ uint64_t m_a0; // 36 bits
+ uint64_t m_a1; // 36 bits
+ uint8_t m_auc; // 6 bits
+ uint16_t m_psw;
+ uint8_t m_c0;
+ uint8_t m_c1;
+ uint8_t m_c2;
// Serial and parallel interfaces (TODO: More here (page 2-13))
- UINT16 m_sioc;
- UINT16 m_srta;
- UINT16 m_sdx;
- UINT16 m_pioc;
- UINT16 m_pdx0; // pdx0 & pdx1 refer to the same physical register (page 6-1)
- UINT16 m_pdx1; // but we keep them separate for logic's sake.
+ uint16_t m_sioc;
+ uint16_t m_srta;
+ uint16_t m_sdx;
+ uint16_t m_pioc;
+ uint16_t m_pdx0; // pdx0 & pdx1 refer to the same physical register (page 6-1)
+ uint16_t m_pdx1; // but we keep them separate for logic's sake.
// internal stuff
- UINT16 m_ppc;
+ uint16_t m_ppc;
// This CPU core handles the cache as more of a loop than 15 separate memory elements.
// It's a bit of a hack, but it's easier this way (for now).
- UINT16 m_cacheStart;
- UINT16 m_cacheEnd;
- UINT16 m_cacheRedoNextPC;
- UINT16 m_cacheIterations;
- static const UINT16 CACHE_INVALID = 0xffff;
+ uint16_t m_cacheStart;
+ uint16_t m_cacheEnd;
+ uint16_t m_cacheRedoNextPC;
+ uint16_t m_cacheIterations;
+ static const uint16_t CACHE_INVALID = 0xffff;
// memory access
- inline UINT32 data_read(const UINT16& addr);
- inline void data_write(const UINT16& addr, const UINT16& data);
- inline UINT32 opcode_read(const UINT8 pcOffset=0);
+ inline uint32_t data_read(const uint16_t& addr);
+ inline void data_write(const uint16_t& addr, const uint16_t& data);
+ inline uint32_t opcode_read(const uint8_t pcOffset=0);
// address spaces
address_space* m_program;
@@ -120,23 +120,23 @@ protected:
int m_icount;
// operations
- void execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance);
+ void execute_one(const uint16_t& op, uint8_t& cycles, uint8_t& pcAdvance);
// table decoders
- void* registerFromRImmediateField(const UINT8& R);
- void* registerFromRTable(const UINT8& R);
- UINT16* registerFromYFieldUpper(const UINT8& Y);
+ void* registerFromRImmediateField(const uint8_t& R);
+ void* registerFromRTable(const uint8_t& R);
+ uint16_t* registerFromYFieldUpper(const uint8_t& Y);
// execution
- void executeF1Field(const UINT8& F1, const UINT8& D, const UINT8& S);
- void executeYFieldPost(const UINT8& Y);
- void executeZFieldPartOne(const UINT8& Z, UINT16* rN);
- void executeZFieldPartTwo(const UINT8& Z, UINT16* rN);
+ void executeF1Field(const uint8_t& F1, const uint8_t& D, const uint8_t& S);
+ void executeYFieldPost(const uint8_t& Y);
+ void executeZFieldPartOne(const uint8_t& Z, uint16_t* rN);
+ void executeZFieldPartTwo(const uint8_t& Z, uint16_t* rN);
// helpers
void* addressYL();
- void writeRegister(void* reg, const UINT16& value);
- bool conditionTest(const UINT8& CON);
+ void writeRegister(void* reg, const uint16_t& value);
+ bool conditionTest(const uint8_t& CON);
// flags
bool lmi();