diff options
Diffstat (limited to 'src/devices/cpu/drcbex86.cpp')
-rw-r--r-- | src/devices/cpu/drcbex86.cpp | 354 |
1 files changed, 177 insertions, 177 deletions
diff --git a/src/devices/cpu/drcbex86.cpp b/src/devices/cpu/drcbex86.cpp index 4bd869b410d..53dbe1eb347 100644 --- a/src/devices/cpu/drcbex86.cpp +++ b/src/devices/cpu/drcbex86.cpp @@ -115,15 +115,15 @@ using x86emit::REG_EDI; // CONSTANTS //************************************************************************** -const UINT32 PTYPE_M = 1 << parameter::PTYPE_MEMORY; -const UINT32 PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE; -const UINT32 PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER; -const UINT32 PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER; -//const UINT32 PTYPE_MI = PTYPE_M | PTYPE_I; -//const UINT32 PTYPE_RI = PTYPE_R | PTYPE_I; -const UINT32 PTYPE_MR = PTYPE_M | PTYPE_R; -const UINT32 PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I; -const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F; +const uint32_t PTYPE_M = 1 << parameter::PTYPE_MEMORY; +const uint32_t PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE; +const uint32_t PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER; +const uint32_t PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER; +//const uint32_t PTYPE_MI = PTYPE_M | PTYPE_I; +//const uint32_t PTYPE_RI = PTYPE_R | PTYPE_I; +const uint32_t PTYPE_MR = PTYPE_M | PTYPE_R; +const uint32_t PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I; +const uint32_t PTYPE_MF = PTYPE_M | PTYPE_F; @@ -148,20 +148,20 @@ const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F; drcbe_x86::opcode_generate_func drcbe_x86::s_opcode_table[OP_MAX]; // size-to-mask table -//static const UINT64 size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) }; +//static const uint64_t size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) }; // register mapping tables -static const UINT8 int_register_map[REG_I_COUNT] = +static const uint8_t int_register_map[REG_I_COUNT] = { REG_EBX, REG_ESI, REG_EDI, REG_EBP }; // flags mapping tables -static UINT8 flags_map[0x1000]; -static UINT32 flags_unmap[0x20]; +static uint8_t flags_map[0x1000]; +static uint32_t flags_unmap[0x20]; // condition mapping table -static const UINT8 condition_map[uml::COND_MAX - uml::COND_Z] = +static const uint8_t condition_map[uml::COND_MAX - uml::COND_Z] = { x86emit::COND_Z, // COND_Z = 0x80, requires Z x86emit::COND_NZ, // COND_NZ, requires Z @@ -182,7 +182,7 @@ static const UINT8 condition_map[uml::COND_MAX - uml::COND_Z] = }; // FPU control register mapping -static const UINT16 fp_control[4] = +static const uint16_t fp_control[4] = { 0x0e3f, // ROUND_TRUNC 0x023f, // ROUND_ROUND @@ -298,7 +298,7 @@ const drcbe_x86::opcode_table_entry drcbe_x86::s_opcode_table_source[] = // into a reduced set //------------------------------------------------- -drcbe_x86::be_parameter::be_parameter(drcbe_x86 &drcbe, const parameter ¶m, UINT32 allowed) +drcbe_x86::be_parameter::be_parameter(drcbe_x86 &drcbe, const parameter ¶m, uint32_t allowed) { int regnum; @@ -447,12 +447,12 @@ inline void drcbe_x86::reset_last_upper_lower_reg() // loaded a lower register //------------------------------------------------- -inline void drcbe_x86::set_last_lower_reg(x86code *&dst, const be_parameter ¶m, UINT8 reglo) +inline void drcbe_x86::set_last_lower_reg(x86code *&dst, const be_parameter ¶m, uint8_t reglo) { if (param.is_memory()) { m_last_lower_reg = reglo; - m_last_lower_addr = (UINT32 *)((uintptr_t)param.memory()); + m_last_lower_addr = (uint32_t *)((uintptr_t)param.memory()); m_last_lower_pc = dst; } } @@ -463,10 +463,10 @@ inline void drcbe_x86::set_last_lower_reg(x86code *&dst, const be_parameter &par // loaded an upper register //------------------------------------------------- -inline void drcbe_x86::set_last_upper_reg(x86code *&dst, const be_parameter ¶m, UINT8 reghi) +inline void drcbe_x86::set_last_upper_reg(x86code *&dst, const be_parameter ¶m, uint8_t reghi) { m_last_upper_reg = reghi; - m_last_upper_addr = (param.is_int_register()) ? m_reghi[param.ireg()] : (UINT32 *)((uintptr_t)param.memory(4)); + m_last_upper_addr = (param.is_int_register()) ? m_reghi[param.ireg()] : (uint32_t *)((uintptr_t)param.memory(4)); m_last_upper_pc = dst; } @@ -476,7 +476,7 @@ inline void drcbe_x86::set_last_upper_reg(x86code *&dst, const be_parameter &par // skip re-loading a lower half of a register //------------------------------------------------- -inline bool drcbe_x86::can_skip_lower_load(x86code *&dst, UINT32 *memref, UINT8 reglo) +inline bool drcbe_x86::can_skip_lower_load(x86code *&dst, uint32_t *memref, uint8_t reglo) { return (dst == m_last_lower_pc && memref == m_last_lower_addr && reglo == m_last_lower_reg); } @@ -487,7 +487,7 @@ inline bool drcbe_x86::can_skip_lower_load(x86code *&dst, UINT32 *memref, UINT8 // skip re-loading an upper half of a register //------------------------------------------------- -inline bool drcbe_x86::can_skip_upper_load(x86code *&dst, UINT32 *memref, UINT8 reghi) +inline bool drcbe_x86::can_skip_upper_load(x86code *&dst, uint32_t *memref, uint8_t reghi) { return (dst == m_last_upper_pc && memref == m_last_upper_addr && reghi == m_last_upper_reg); } @@ -516,7 +516,7 @@ inline void drcbe_x86::track_resolve_link(x86code *&destptr, const emit_link &li // drcbe_x86 - constructor //------------------------------------------------- -drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits) +drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits) : drcbe_interface(drcuml, cache, device), m_hash(cache, modes, addrbits, ignorebits), m_map(cache, 0), @@ -556,7 +556,7 @@ drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, U // build the flags map (static but it doesn't hurt to regenerate it) for (int entry = 0; entry < ARRAY_LENGTH(flags_map); entry++) { - UINT8 flags = 0; + uint8_t flags = 0; if (entry & 0x001) flags |= FLAG_C; if (entry & 0x004) flags |= FLAG_U; if (entry & 0x040) flags |= FLAG_Z; @@ -566,7 +566,7 @@ drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, U } for (int entry = 0; entry < ARRAY_LENGTH(flags_unmap); entry++) { - UINT32 flags = 0; + uint32_t flags = 0; if (entry & FLAG_C) flags |= 0x001; if (entry & FLAG_U) flags |= 0x004; if (entry & FLAG_Z) flags |= 0x040; @@ -618,7 +618,7 @@ void drcbe_x86::reset() x86code *dst = (x86code *)*cachetop; // generate a simple CPUID stub - UINT32 (*cpuid_ecx_stub)(void) = (UINT32 (*)(void))dst; + uint32_t (*cpuid_ecx_stub)(void) = (uint32_t (*)(void))dst; emit_push_r32(dst, REG_EBX); // push ebx emit_mov_r32_imm(dst, REG_EAX, 1); // mov eax,1 emit_cpuid(dst); // cpuid @@ -767,7 +767,7 @@ int drcbe_x86::execute(code_handle &entry) // drcbex86_generate - generate code //------------------------------------------------- -void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, UINT32 numinst) +void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst) { // tell all of our utility objects that a block is beginning m_hash.block_begin(block, instlist, numinst); @@ -803,7 +803,7 @@ void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, UINT3 if (inst.opcode() == OP_HANDLE) blockname = inst.param(0).handle().string(); else if (inst.opcode() == OP_HASH) - blockname = string_format("Code: mode=%d PC=%08X", (UINT32)inst.param(0).immediate(), (offs_t)inst.param(1).immediate()).c_str(); + blockname = string_format("Code: mode=%d PC=%08X", (uint32_t)inst.param(0).immediate(), (offs_t)inst.param(1).immediate()).c_str(); } // generate code @@ -830,7 +830,7 @@ void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, UINT3 // given mode/pc exists in the hash table //------------------------------------------------- -bool drcbe_x86::hash_exists(UINT32 mode, UINT32 pc) +bool drcbe_x86::hash_exists(uint32_t mode, uint32_t pc) { return m_hash.code_exists(mode, pc); } @@ -860,7 +860,7 @@ void drcbe_x86::get_info(drcbe_info &info) // into a register //------------------------------------------------- -void drcbe_x86::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m) +void drcbe_x86::emit_mov_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m) { if (param.is_immediate()) { @@ -885,13 +885,13 @@ void drcbe_x86::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p // any flags //------------------------------------------------- -void drcbe_x86::emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_parameter ¶m) +void drcbe_x86::emit_mov_r32_p32_keepflags(x86code *&dst, uint8_t reg, const be_parameter ¶m) { if (param.is_immediate()) emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param else if (param.is_memory()) { - if (!can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), reg)) + if (!can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), reg)) emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param] } else if (param.is_int_register()) @@ -913,7 +913,7 @@ void drcbe_x86::emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_para emit_mov_m32_imm(dst, memref, param.immediate()); // mov [mem],param else if (param.is_memory()) { - if (!can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), REG_EAX)) + if (!can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), REG_EAX)) emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param] emit_mov_m32_r32(dst, memref, REG_EAX); // mov [mem],eax } @@ -927,7 +927,7 @@ void drcbe_x86::emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_para // 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_mov_p32_r32(x86code *&dst, const be_parameter ¶m, UINT8 reg) +void drcbe_x86::emit_mov_p32_r32(x86code *&dst, const be_parameter ¶m, uint8_t reg) { assert(!param.is_immediate()); if (param.is_memory()) @@ -948,7 +948,7 @@ void drcbe_x86::emit_mov_p32_r32(x86code *&dst, const be_parameter ¶m, UINT8 // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_add_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_add_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { @@ -988,7 +988,7 @@ void drcbe_x86::emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_adc_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) emit_adc_r32_imm(dst, reg, param.immediate()); // adc reg,param @@ -1022,7 +1022,7 @@ void drcbe_x86::emit_adc_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_sub_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_sub_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { @@ -1062,7 +1062,7 @@ void drcbe_x86::emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_sbb_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) emit_sbb_r32_imm(dst, reg, param.immediate()); // sbb reg,param @@ -1096,7 +1096,7 @@ void drcbe_x86::emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_cmp_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) emit_cmp_r32_imm(dst, reg, param.immediate()); // cmp reg,param @@ -1130,13 +1130,13 @@ void drcbe_x86::emit_cmp_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_and_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_and_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) emit_xor_r32_r32(dst, reg, reg); // xor reg,reg else emit_and_r32_imm(dst, reg, param.immediate()); // and reg,param @@ -1157,9 +1157,9 @@ void drcbe_x86::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) emit_mov_m32_imm(dst, memref, 0); // mov [dest],0 else emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param @@ -1178,7 +1178,7 @@ void drcbe_x86::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_test_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) emit_test_r32_imm(dst, reg, param.immediate()); // test reg,param @@ -1213,13 +1213,13 @@ void drcbe_x86::emit_test_m32_p32(x86code *&dst, x86_memref memref, const be_par // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_or_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_or_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) emit_mov_r32_imm(dst, reg, ~0); // mov reg,-1 else emit_or_r32_imm(dst, reg, param.immediate()); // or reg,param @@ -1240,9 +1240,9 @@ void drcbe_x86::emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_param { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) emit_mov_m32_imm(dst, memref, ~0); // mov [dest],-1 else emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param @@ -1261,13 +1261,13 @@ void drcbe_x86::emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_param // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_xor_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_xor_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) emit_not_r32(dst, reg); // not reg else emit_xor_r32_imm(dst, reg, param.immediate()); // xor reg,param @@ -1288,9 +1288,9 @@ void drcbe_x86::emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) emit_not_m32(dst, memref); // not [dest] else emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param @@ -1309,11 +1309,11 @@ void drcbe_x86::emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_shl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_shl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_shl_r32_imm(dst, reg, param.immediate()); // shl reg,param @@ -1335,7 +1335,7 @@ void drcbe_x86::emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_shl_m32_imm(dst, memref, param.immediate()); // shl [dest],param @@ -1353,11 +1353,11 @@ void drcbe_x86::emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_shr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_shr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_shr_r32_imm(dst, reg, param.immediate()); // shr reg,param @@ -1379,7 +1379,7 @@ void drcbe_x86::emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_shr_m32_imm(dst, memref, param.immediate()); // shr [dest],param @@ -1397,11 +1397,11 @@ void drcbe_x86::emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_sar_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_sar_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_sar_r32_imm(dst, reg, param.immediate()); // sar reg,param @@ -1423,7 +1423,7 @@ void drcbe_x86::emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_sar_m32_imm(dst, memref, param.immediate()); // sar [dest],param @@ -1441,11 +1441,11 @@ void drcbe_x86::emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_rol_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_rol_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_rol_r32_imm(dst, reg, param.immediate()); // rol reg,param @@ -1467,7 +1467,7 @@ void drcbe_x86::emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_rol_m32_imm(dst, memref, param.immediate()); // rol [dest],param @@ -1485,11 +1485,11 @@ void drcbe_x86::emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_ror_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_ror_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_ror_r32_imm(dst, reg, param.immediate()); // ror reg,param @@ -1511,7 +1511,7 @@ void drcbe_x86::emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_ror_m32_imm(dst, memref, param.immediate()); // ror [dest],param @@ -1529,11 +1529,11 @@ void drcbe_x86::emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_rcl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_rcl_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_rcl_r32_imm(dst, reg, param.immediate()); // rcl reg,param @@ -1555,7 +1555,7 @@ void drcbe_x86::emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_rcl_m32_imm(dst, memref, param.immediate()); // rcl [dest],param @@ -1573,11 +1573,11 @@ void drcbe_x86::emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_para // register from a 32-bit parameter //------------------------------------------------- -void drcbe_x86::emit_rcr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_rcr_r32_p32(x86code *&dst, uint8_t reg, const be_parameter ¶m, const instruction &inst) { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_rcr_r32_imm(dst, reg, param.immediate()); // rcr reg,param @@ -1599,7 +1599,7 @@ void drcbe_x86::emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_para { if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip else emit_rcr_m32_imm(dst, memref, param.immediate()); // rcr [dest],param @@ -1622,27 +1622,27 @@ void drcbe_x86::emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_para // into a pair of registers //------------------------------------------------- -void drcbe_x86::emit_mov_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m) +void drcbe_x86::emit_mov_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m) { if (param.is_immediate()) { if (reglo == REG_NONE) ; - else if ((UINT32)param.immediate() == 0) + else if ((uint32_t)param.immediate() == 0) emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo else emit_mov_r32_imm(dst, reglo, param.immediate()); // mov reglo,param if (reghi == REG_NONE) ; - else if ((UINT32)(param.immediate() >> 32) == 0) + else if ((uint32_t)(param.immediate() >> 32) == 0) emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi else emit_mov_r32_imm(dst, reghi, param.immediate() >> 32); // mov reghi,param >> 32 } else if (param.is_memory()) { - int skip_lower = can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), reglo); - int skip_upper = can_skip_upper_load(dst, (UINT32 *)((uintptr_t)param.memory(4)), reghi); + int skip_lower = can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), reglo); + int skip_upper = can_skip_upper_load(dst, (uint32_t *)((uintptr_t)param.memory(4)), reghi); if (reglo != REG_NONE && !skip_lower) emit_mov_r32_m32(dst, reglo, MABS(param.memory())); // mov reglo,[param] if (reghi != REG_NONE && !skip_upper) @@ -1665,7 +1665,7 @@ void drcbe_x86::emit_mov_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const // affecting any flags //------------------------------------------------- -void drcbe_x86::emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m) +void drcbe_x86::emit_mov_r64_p64_keepflags(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m) { if (param.is_immediate()) { @@ -1676,8 +1676,8 @@ void drcbe_x86::emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reglo, UINT8 reg } else if (param.is_memory()) { - int skip_lower = can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), reglo); - int skip_upper = can_skip_upper_load(dst, (UINT32 *)((uintptr_t)param.memory(4)), reghi); + int skip_lower = can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), reglo); + int skip_upper = can_skip_upper_load(dst, (uint32_t *)((uintptr_t)param.memory(4)), reghi); if (reglo != REG_NONE && !skip_lower) emit_mov_r32_m32(dst, reglo, MABS(param.memory())); // mov reglo,[param] if (reghi != REG_NONE && !skip_upper) @@ -1708,7 +1708,7 @@ void drcbe_x86::emit_mov_m64_p64(x86code *&dst, x86_memref memref, const be_para } else if (param.is_memory()) { - int skip_lower = can_skip_lower_load(dst, (UINT32 *)((uintptr_t)param.memory()), REG_EAX); + int skip_lower = can_skip_lower_load(dst, (uint32_t *)((uintptr_t)param.memory()), REG_EAX); if (!skip_lower) emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param] emit_mov_m32_r32(dst, memref + 0, REG_EAX); // mov [mem],eax @@ -1729,7 +1729,7 @@ void drcbe_x86::emit_mov_m64_p64(x86code *&dst, x86_memref memref, const be_para // into a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_mov_p64_r64(x86code *&dst, const be_parameter ¶m, UINT8 reglo, UINT8 reghi) +void drcbe_x86::emit_mov_p64_r64(x86code *&dst, const be_parameter ¶m, uint8_t reglo, uint8_t reghi) { assert(!param.is_immediate()); if (param.is_memory()) @@ -1753,7 +1753,7 @@ void drcbe_x86::emit_mov_p64_r64(x86code *&dst, const be_parameter ¶m, UINT8 // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_add_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_add_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -1811,7 +1811,7 @@ void drcbe_x86::emit_add_m64_p64(x86code *&dst, x86_memref memref, const be_para // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_adc_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_adc_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -1869,7 +1869,7 @@ void drcbe_x86::emit_adc_m64_p64(x86code *&dst, x86_memref memref, const be_para // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_sub_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_sub_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -1927,7 +1927,7 @@ void drcbe_x86::emit_sub_m64_p64(x86code *&dst, x86_memref memref, const be_para // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_sbb_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_sbb_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -1985,7 +1985,7 @@ void drcbe_x86::emit_sbb_m64_p64(x86code *&dst, x86_memref memref, const be_para // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_cmp_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_cmp_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = (inst.flags() != FLAG_Z && (inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -2018,7 +2018,7 @@ void drcbe_x86::emit_cmp_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_and_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_and_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -2029,16 +2029,16 @@ void drcbe_x86::emit_and_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const } else if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo else emit_and_r32_imm(dst, reglo, param.immediate()); // and reglo,param if (saveflags) emit_pushf(dst); // pushf - if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff) + if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff) ;// skip - else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0) + else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0) emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi else emit_and_r32_imm(dst, reghi, param.immediate() >> 32); // and reghi,param >> 32 @@ -2064,16 +2064,16 @@ void drcbe_x86::emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_para int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) emit_mov_m32_imm(dst, memref, 0); // mov [dest],0 else emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param if (saveflags) emit_pushf(dst); // pushf - if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff) + if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff) ;// skip - else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0) + else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0) emit_mov_m32_imm(dst, memref + 4, 0); // mov [dest+4],0 else emit_and_m32_imm(dst, memref + 4, param.immediate() >> 32); // and [dest+4],param >> 32 @@ -2096,7 +2096,7 @@ void drcbe_x86::emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_para // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_test_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_test_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -2154,7 +2154,7 @@ void drcbe_x86::emit_test_m64_p64(x86code *&dst, x86_memref memref, const be_par // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_or_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_or_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -2165,16 +2165,16 @@ void drcbe_x86::emit_or_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const b } else if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) emit_mov_r32_imm(dst, reglo, ~0); // mov reglo,-1 else emit_or_r32_imm(dst, reglo, param.immediate()); // or reglo,param if (saveflags) emit_pushf(dst); // pushf - if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0) + if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff) emit_mov_r32_imm(dst, reghi, ~0); // mov reghi,-1 else emit_or_r32_imm(dst, reghi, param.immediate() >> 32); // or reghi,param >> 32 @@ -2200,16 +2200,16 @@ void drcbe_x86::emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_param int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) emit_mov_m32_imm(dst, memref, ~0); // mov [dest],-1 else emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param if (saveflags) emit_pushf(dst); // pushf - if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0) + if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff) emit_mov_m32_imm(dst, memref + 4, ~0); // mov [dest+4],-1 else emit_or_m32_imm(dst, memref + 4, param.immediate() >> 32); // or [dest+4],param >> 32 @@ -2232,7 +2232,7 @@ void drcbe_x86::emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_param // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_xor_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_xor_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_memory()) @@ -2243,16 +2243,16 @@ void drcbe_x86::emit_xor_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const } else if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) emit_not_r32(dst, reglo); // not reglo else emit_xor_r32_imm(dst, reglo, param.immediate()); // xor reglo,param if (saveflags) emit_pushf(dst); // pushf - if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0) + if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff) emit_not_r32(dst, reghi); // not reghi else emit_xor_r32_imm(dst, reghi, param.immediate() >> 32); // xor reghi,param >> 32 @@ -2278,16 +2278,16 @@ void drcbe_x86::emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_para int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_immediate()) { - if (inst.flags() == 0 && (UINT32)param.immediate() == 0) + if (inst.flags() == 0 && (uint32_t)param.immediate() == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)param.immediate() == 0xffffffff) emit_not_m32(dst, memref); // not [dest] else emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param if (saveflags) emit_pushf(dst); // pushf - if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0) + if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0) ;// skip - else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff) + else if (inst.flags() == 0 && (uint32_t)(param.immediate() >> 32) == 0xffffffff) emit_not_m32(dst, memref + 4); // not [dest+4] else emit_xor_m32_imm(dst, memref + 4, param.immediate() >> 32); // xor [dest+4],param >> 32 @@ -2310,7 +2310,7 @@ void drcbe_x86::emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_para // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_shl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_shl_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = (inst.flags() != 0); if (param.is_immediate()) @@ -2381,7 +2381,7 @@ void drcbe_x86::emit_shl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_shr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_shr_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_immediate()) @@ -2452,7 +2452,7 @@ void drcbe_x86::emit_shr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_sar_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_sar_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_immediate()) @@ -2523,7 +2523,7 @@ void drcbe_x86::emit_sar_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_rol_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_rol_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_immediate()) @@ -2598,7 +2598,7 @@ void drcbe_x86::emit_rol_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_ror_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_ror_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); if (param.is_immediate()) @@ -2673,7 +2673,7 @@ void drcbe_x86::emit_ror_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_rcl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_rcl_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = ((inst.flags() & FLAG_Z) != 0); emit_link skipall, skiploop; @@ -2715,7 +2715,7 @@ void drcbe_x86::emit_rcl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const // pair of registers from a 64-bit parameter //------------------------------------------------- -void drcbe_x86::emit_rcr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const be_parameter ¶m, const instruction &inst) +void drcbe_x86::emit_rcr_r64_p64(x86code *&dst, uint8_t reglo, uint8_t reghi, const be_parameter ¶m, const instruction &inst) { int saveflags = (inst.flags() != 0); emit_link skipall, skiploop; @@ -2812,12 +2812,12 @@ void drcbe_x86::fixup_label(void *parameter, drccodeptr labelcodeptr) else if (src[0] == 0xe9) { src += 1 + 4; - ((UINT32 *)src)[-1] = labelcodeptr - src; + ((uint32_t *)src)[-1] = labelcodeptr - src; } else if (src[0] == 0x0f && (src[1] & 0xf0) == 0x80) { src += 2 + 4; - ((UINT32 *)src)[-1] = labelcodeptr - src; + ((uint32_t *)src)[-1] = labelcodeptr - src; } else fatalerror("fixup_label called with invalid jmp source!\n"); @@ -2844,7 +2844,7 @@ void drcbe_x86::fixup_exception(drccodeptr *codeptr, void *param1, void *param2) // first fixup the jump to get us here drccodeptr dst = *codeptr; - ((UINT32 *)src)[-1] = dst - src; + ((uint32_t *)src)[-1] = dst - src; // then store the exception parameter emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp @@ -3076,8 +3076,8 @@ void drcbe_x86::op_hashjmp(x86code *&dst, const instruction &inst) // a straight immediate jump is direct, though we need the PC in EAX in case of failure if (pcp.is_immediate()) { - UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask(); - UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask(); + uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask(); + uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask(); emit_call_m32(dst, MABS(&m_hash.base()[modep.immediate()][l1val][l2val])); // call hash[modep][l1val][l2val] } @@ -3103,8 +3103,8 @@ void drcbe_x86::op_hashjmp(x86code *&dst, const instruction &inst) // fixed PC if (pcp.is_immediate()) { - UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask(); - UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask(); + uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask(); + uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask(); emit_mov_r32_m32(dst, REG_EDX, MBD(REG_ECX, l1val*4)); // mov edx,[ecx+l1val*4] emit_call_m32(dst, MBD(REG_EDX, l2val*4)); // call [l2val*4] } @@ -3416,7 +3416,7 @@ void drcbe_x86::op_getflgs(x86code *&dst, const instruction &inst) int dstreg = dstp.select_register(REG_EAX); // compute mask for flags - UINT32 flagmask = 0; + uint32_t flagmask = 0; if (maskp.immediate() & FLAG_C) flagmask |= 0x001; if (maskp.immediate() & FLAG_V) flagmask |= 0x800; if (maskp.immediate() & FLAG_Z) flagmask |= 0x040; @@ -4097,7 +4097,7 @@ void drcbe_x86::op_carry(x86code *&dst, const instruction &inst) // degenerate case: source is immediate if (srcp.is_immediate() && bitp.is_immediate()) { - if (srcp.immediate() & ((UINT64)1 << bitp.immediate())) + if (srcp.immediate() & ((uint64_t)1 << bitp.immediate())) emit_stc(dst); else emit_clc(dst); @@ -4769,8 +4769,8 @@ void drcbe_x86::op_cmp(x86code *&dst, const instruction &inst) void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst) { - UINT8 zsflags = inst.flags() & (FLAG_Z | FLAG_S); - UINT8 vflag = inst.flags() & FLAG_V; + uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S); + uint8_t vflag = inst.flags() & FLAG_V; // validate instruction assert(inst.size() == 4 || inst.size() == 8); @@ -4855,13 +4855,13 @@ void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst) emit_call(dst, (x86code *)dmulu); // call dmulu if (inst.flags() != 0) emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4] - emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo - emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi + emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo + emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax if (compute_hi) { - emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo - emit_mov_r32_m32(dst, REG_ECX, MABS((UINT32 *)&m_reshi + 1)); // mov ecx,reshi.hi + emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reshi + 0)); // mov eax,reshi.lo + emit_mov_r32_m32(dst, REG_ECX, MABS((uint32_t *)&m_reshi + 1)); // mov ecx,reshi.hi emit_mov_p64_r64(dst, edstp, REG_EAX, REG_ECX); // mov edstp,ecx:eax } if (inst.flags() != 0) @@ -4876,8 +4876,8 @@ void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst) void drcbe_x86::op_muls(x86code *&dst, const instruction &inst) { - UINT8 zsflags = inst.flags() & (FLAG_Z | FLAG_S); - UINT8 vflag = inst.flags() & FLAG_V; + uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S); + uint8_t vflag = inst.flags() & FLAG_V; // validate instruction assert(inst.size() == 4 || inst.size() == 8); @@ -4985,13 +4985,13 @@ void drcbe_x86::op_muls(x86code *&dst, const instruction &inst) emit_call(dst, (x86code *)dmuls); // call dmuls if (inst.flags() != 0) emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4] - emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo - emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi + emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo + emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax if (compute_hi) { - emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo - emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi + emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reshi + 0)); // mov eax,reshi.lo + emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reshi + 1)); // mov edx,reshi.hi emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax } if (inst.flags() != 0) @@ -5055,13 +5055,13 @@ void drcbe_x86::op_divu(x86code *&dst, const instruction &inst) emit_call(dst, (x86code *)ddivu); // call ddivu if (inst.flags() != 0) emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4] - emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo - emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi + emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo + emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax if (compute_rem) { - emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo - emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi + emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reshi + 0)); // mov eax,reshi.lo + emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reshi + 1)); // mov edx,reshi.hi emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax } if (inst.flags() != 0) @@ -5125,13 +5125,13 @@ void drcbe_x86::op_divs(x86code *&dst, const instruction &inst) emit_call(dst, (x86code *)ddivs); // call ddivs if (inst.flags() != 0) emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4] - emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo - emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi + emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo + emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax if (compute_rem) { - emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo - emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi + emit_mov_r32_m32(dst, REG_EAX, MABS((uint32_t *)&m_reshi + 0)); // mov eax,reshi.lo + emit_mov_r32_m32(dst, REG_EDX, MABS((uint32_t *)&m_reshi + 1)); // mov edx,reshi.hi emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax } if (inst.flags() != 0) @@ -6206,7 +6206,7 @@ void drcbe_x86::op_ffrint(x86code *&dst, const instruction &inst) if (srcp.is_immediate()) { emit_mov_m32_imm(dst, MABS(&m_fptemp), srcp.immediate()); // mov [fptemp],srcp - emit_mov_m32_imm(dst, MABS((UINT8 *)&m_fptemp + 4), srcp.immediate()); // mov [fptemp+4],srcp + emit_mov_m32_imm(dst, MABS((uint8_t *)&m_fptemp + 4), srcp.immediate()); // mov [fptemp+4],srcp emit_fild_m64(dst, MABS(&m_fptemp)); // fild [fptemp] } else if (srcp.is_memory()) @@ -6615,7 +6615,7 @@ void drcbe_x86::op_icopyf(x86code *&dst, const instruction &inst) // dmulu - perform a double-wide unsigned multiply //------------------------------------------------- -int drcbe_x86::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int flags) +int drcbe_x86::dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, int flags) { // shortcut if we don't care about the high bits or the flags if (&dstlo == &dsthi && flags == 0) @@ -6625,8 +6625,8 @@ int drcbe_x86::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int } // fetch source values - UINT64 a = src1; - UINT64 b = src2; + uint64_t a = src1; + uint64_t b = src2; if (a == 0 || b == 0) { dsthi = dstlo = 0; @@ -6634,17 +6634,17 @@ int drcbe_x86::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int } // compute high and low parts first - UINT64 lo = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 0); - UINT64 hi = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 32); + uint64_t lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0); + uint64_t hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32); // compute middle parts - UINT64 prevlo = lo; - UINT64 temp = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 0); + uint64_t prevlo = lo; + uint64_t temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0); lo += temp << 32; hi += (temp >> 32) + (lo < prevlo); prevlo = lo; - temp = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 32); + temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32); lo += temp << 32; hi += (temp >> 32) + (lo < prevlo); @@ -6659,10 +6659,10 @@ int drcbe_x86::dmulu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2, int // dmuls - perform a double-wide signed multiply //------------------------------------------------- -int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int flags) +int drcbe_x86::dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, int flags) { - UINT64 lo, hi, prevlo; - UINT64 a, b, temp; + uint64_t lo, hi, prevlo; + uint64_t a, b, temp; // shortcut if we don't care about the high bits or the flags if (&dstlo == &dsthi && flags == 0) @@ -6672,8 +6672,8 @@ int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int f } // fetch absolute source values - a = src1; if ((INT64)a < 0) a = -a; - b = src2; if ((INT64)b < 0) b = -b; + a = src1; if ((int64_t)a < 0) a = -a; + b = src2; if ((int64_t)b < 0) b = -b; if (a == 0 || b == 0) { dsthi = dstlo = 0; @@ -6681,22 +6681,22 @@ int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int f } // compute high and low parts first - lo = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 0); - hi = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 32); + lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0); + hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32); // compute middle parts prevlo = lo; - temp = (UINT64)(UINT32)(a >> 32) * (UINT64)(UINT32)(b >> 0); + temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0); lo += temp << 32; hi += (temp >> 32) + (lo < prevlo); prevlo = lo; - temp = (UINT64)(UINT32)(a >> 0) * (UINT64)(UINT32)(b >> 32); + temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32); lo += temp << 32; hi += (temp >> 32) + (lo < prevlo); // adjust for signage - if ((INT64)(src1 ^ src2) < 0) + if ((int64_t)(src1 ^ src2) < 0) { hi = ~hi + (lo == 0); lo = ~lo + 1; @@ -6705,7 +6705,7 @@ int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int f // store the results dsthi = hi; dstlo = lo; - return ((hi >> 60) & FLAG_S) | ((dsthi != ((INT64)lo >> 63)) << 1); + return ((hi >> 60) & FLAG_S) | ((dsthi != ((int64_t)lo >> 63)) << 1); } @@ -6713,7 +6713,7 @@ int drcbe_x86::dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int f // ddivu - perform a double-wide unsigned divide //------------------------------------------------- -int drcbe_x86::ddivu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2) +int drcbe_x86::ddivu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2) { // do nothing if src2 == 0 if (src2 == 0) @@ -6731,7 +6731,7 @@ int drcbe_x86::ddivu(UINT64 &dstlo, UINT64 &dsthi, UINT64 src1, UINT64 src2) // ddivs - perform a double-wide signed divide //------------------------------------------------- -int drcbe_x86::ddivs(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2) +int drcbe_x86::ddivs(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2) { // do nothing if src2 == 0 if (src2 == 0) |