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-rw-r--r--src/devices/cpu/arm/arm.cpp18
-rw-r--r--src/devices/cpu/arm/arm.h9
-rw-r--r--src/devices/cpu/arm/armdasm.cpp33
-rw-r--r--src/devices/cpu/arm/armdasm.h23
4 files changed, 45 insertions, 38 deletions
diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp
index 077f693b144..77c8a44ac6d 100644
--- a/src/devices/cpu/arm/arm.cpp
+++ b/src/devices/cpu/arm/arm.cpp
@@ -20,9 +20,7 @@
#include "emu.h"
#include "arm.h"
#include "debugger.h"
-
-CPU_DISASSEMBLE( arm );
-CPU_DISASSEMBLE( arm_be );
+#include "armdasm.h"
#define ARM_DEBUG_CORE 0
#define ARM_DEBUG_COPRO 0
@@ -512,7 +510,7 @@ void arm_cpu_device::execute_set_input(int irqline, int state)
void arm_cpu_device::device_start()
{
m_program = &space(AS_PROGRAM);
- m_direct = &m_program->direct();
+ m_direct = m_program->direct<0>();
save_item(NAME(m_sArmRegister));
save_item(NAME(m_coproRegister));
@@ -1562,15 +1560,7 @@ void arm_cpu_device::HandleCoPro( uint32_t insn )
}
-offs_t arm_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
-{
- extern CPU_DISASSEMBLE( arm );
- return CPU_DISASSEMBLE_NAME(arm)(this, stream, pc, oprom, opram, options);
-}
-
-
-offs_t arm_be_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
+util::disasm_interface *arm_cpu_device::create_disassembler()
{
- extern CPU_DISASSEMBLE( arm_be );
- return CPU_DISASSEMBLE_NAME(arm_be)(this, stream, pc, oprom, opram, options);
+ return new arm_disassembler;
}
diff --git a/src/devices/cpu/arm/arm.h b/src/devices/cpu/arm/arm.h
index 2de5fb3a39b..3cfb1386fa9 100644
--- a/src/devices/cpu/arm/arm.h
+++ b/src/devices/cpu/arm/arm.h
@@ -64,9 +64,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
- virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
- virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
- virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
+ virtual util::disasm_interface *create_disassembler() override;
address_space_config m_program_config;
@@ -76,7 +74,7 @@ protected:
uint8_t m_pendingIrq;
uint8_t m_pendingFiq;
address_space *m_program;
- direct_read_data *m_direct;
+ direct_read_data<0> *m_direct;
endianness_t m_endian;
copro_type m_copro_type;
@@ -111,9 +109,6 @@ class arm_be_cpu_device : public arm_cpu_device
public:
// construction/destruction
arm_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
diff --git a/src/devices/cpu/arm/armdasm.cpp b/src/devices/cpu/arm/armdasm.cpp
index 67d65209871..657ceb43550 100644
--- a/src/devices/cpu/arm/armdasm.cpp
+++ b/src/devices/cpu/arm/armdasm.cpp
@@ -7,9 +7,9 @@
*/
#include "emu.h"
-#include "arm.h"
+#include "armdasm.h"
-static void WriteImmediateOperand( std::ostream &stream, uint32_t opcode )
+void arm_disassembler::WriteImmediateOperand( std::ostream &stream, uint32_t opcode ) const
{
/* rrrrbbbbbbbb */
uint32_t imm;
@@ -21,7 +21,7 @@ static void WriteImmediateOperand( std::ostream &stream, uint32_t opcode )
util::stream_format( stream, ", #$%x", imm );
}
-static void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 )
+void arm_disassembler::WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 ) const
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@@ -57,7 +57,7 @@ static void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, i
}
}
-static void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode )
+void arm_disassembler::WriteRegisterOperand1( std::ostream &stream, uint32_t opcode ) const
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@@ -81,7 +81,7 @@ static void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode )
} /* WriteRegisterOperand */
-static void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode )
+void arm_disassembler::WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode ) const
{
opcode &= 0x00ffffff;
if( opcode&0x00800000 )
@@ -92,14 +92,14 @@ static void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opco
util::stream_format( stream, "$%x", pc );
} /* WriteBranchAddress */
-static void WritePadding(std::ostream &stream, std::streampos start_position)
+void arm_disassembler::WritePadding(std::ostream &stream, std::streampos start_position) const
{
std::streamoff difference = stream.tellp() - start_position;
for (std::streamoff i = difference; i < 8; i++)
stream << ' ';
}
-static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
+offs_t arm_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
static const char *const pConditionCodeTable[16] =
{
@@ -119,6 +119,8 @@ static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
uint32_t dasmflags = 0;
std::streampos start_position = stream.tellp();
+ u32 opcode = opcodes.r32(pc);
+
pConditionCode= pConditionCodeTable[opcode>>28];
if( (opcode&0x0fc000f0)==0x00000090u )
@@ -193,7 +195,7 @@ static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
case 0x0d:
/* look for mov pc,lr */
if (((opcode >> 12) & 0x0f) == 15 && ((opcode >> 0) & 0x0f) == 14 && (opcode & 0x02000000) == 0)
- dasmflags = DASMFLAG_STEP_OUT;
+ dasmflags = STEP_OUT;
case 0x0f:
WriteDataProcessingOperand(stream, opcode, 1, 0, 1);
break;
@@ -325,7 +327,7 @@ static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
if( opcode&0x01000000 )
{
util::stream_format( stream, "BL" );
- dasmflags = DASMFLAG_STEP_OVER;
+ dasmflags = STEP_OVER;
}
else
{
@@ -380,24 +382,21 @@ static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
util::stream_format( stream, "SWI%s $%x",
pConditionCode,
opcode&0x00ffffff );
- dasmflags = DASMFLAG_STEP_OVER;
+ dasmflags = STEP_OVER;
}
else
{
util::stream_format( stream, "Undefined" );
}
- return dasmflags | DASMFLAG_SUPPORTED;
+ return 4 | dasmflags | SUPPORTED;
}
-CPU_DISASSEMBLE( arm )
+u32 arm_disassembler::opcode_alignment() const
{
- uint32_t opcode = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
- return 4 | arm_disasm(stream, pc, opcode);
+ return 4;
}
-CPU_DISASSEMBLE( arm_be )
+arm_disassembler::arm_disassembler()
{
- uint32_t opcode = oprom[3] | (oprom[2] << 8) | (oprom[1] << 16) | (oprom[0] << 24);
- return 4 | arm_disasm(stream, pc, opcode);
}
diff --git a/src/devices/cpu/arm/armdasm.h b/src/devices/cpu/arm/armdasm.h
new file mode 100644
index 00000000000..1e2ed19f394
--- /dev/null
+++ b/src/devices/cpu/arm/armdasm.h
@@ -0,0 +1,23 @@
+
+#ifndef MAME_CPU_ARM_ARMDASM_H
+#define MAME_CPU_ARM_ARMDASM_H
+
+#pragma once
+
+class arm_disassembler : public util::disasm_interface
+{
+public:
+ arm_disassembler();
+ virtual u32 opcode_alignment() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+private:
+ void WriteImmediateOperand( std::ostream &stream, uint32_t opcode ) const;
+ void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 ) const;
+ void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode ) const;
+ void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode ) const;
+ void WritePadding(std::ostream &stream, std::streampos start_position) const;
+
+};
+
+#endif