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Diffstat (limited to 'src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp')
-rw-r--r--src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp56
1 files changed, 28 insertions, 28 deletions
diff --git a/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp b/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp
index ddd809b84bc..769a8604fc8 100644
--- a/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp
+++ b/src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp
@@ -15,7 +15,7 @@
int arcompact_handle00_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr = (op & 0x00010000) >> 16;
+ uint8_t subinstr = (op & 0x00010000) >> 16;
op &= ~0x00010000;
switch (subinstr)
@@ -30,7 +30,7 @@ int arcompact_handle00_dasm(DASM_OPS_32)
int arcompact_handle01_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr = (op & 0x00010000) >> 16;
+ uint8_t subinstr = (op & 0x00010000) >> 16;
op &= ~0x00010000;
switch (subinstr)
@@ -45,7 +45,7 @@ int arcompact_handle01_dasm(DASM_OPS_32)
int arcompact_handle01_00_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr2 = (op & 0x00020000) >> 17;
+ uint8_t subinstr2 = (op & 0x00020000) >> 17;
op &= ~0x00020000;
switch (subinstr2)
@@ -61,7 +61,7 @@ int arcompact_handle01_01_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr2 = (op & 0x00000010) >> 4;
+ uint8_t subinstr2 = (op & 0x00000010) >> 4;
op &= ~0x00000010;
switch (subinstr2)
@@ -76,7 +76,7 @@ int arcompact_handle01_01_dasm(DASM_OPS_32)
int arcompact_handle01_01_00_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr3 = (op & 0x0000000f) >> 0;
+ uint8_t subinstr3 = (op & 0x0000000f) >> 0;
op &= ~0x0000000f;
switch (subinstr3)
@@ -105,7 +105,7 @@ int arcompact_handle01_01_00_dasm(DASM_OPS_32)
int arcompact_handle01_01_01_dasm(DASM_OPS_32) // Branch on Compare/Bit Test Register-Immediate
{
int size = 4;
- UINT8 subinstr3 = (op & 0x0000000f) >> 0;
+ uint8_t subinstr3 = (op & 0x0000000f) >> 0;
op &= ~0x0000000f;
switch (subinstr3)
@@ -146,7 +146,7 @@ int arcompact_handle04_dasm(DASM_OPS_32)
// 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ General Operations Conditional Register
// 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ General Operations Conditional Register (Unsigned 6-bit IMM)
- UINT8 subinstr = (op & 0x003f0000) >> 16;
+ uint8_t subinstr = (op & 0x003f0000) >> 16;
op &= ~0x003f0000;
switch (subinstr)
@@ -223,7 +223,7 @@ int arcompact_handle04_dasm(DASM_OPS_32)
int arcompact_handle04_2f_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr2 = (op & 0x0000003f) >> 0;
+ uint8_t subinstr2 = (op & 0x0000003f) >> 0;
op &= ~0x0000003f;
switch (subinstr2)
@@ -301,7 +301,7 @@ int arcompact_handle04_2f_dasm(DASM_OPS_32)
int arcompact_handle05_2f_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr2 = (op & 0x0000003f) >> 0;
+ uint8_t subinstr2 = (op & 0x0000003f) >> 0;
op &= ~0x0000003f;
switch (subinstr2)
@@ -378,7 +378,7 @@ int arcompact_handle05_2f_dasm(DASM_OPS_32)
int arcompact_handle04_2f_3f_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr3 = (op & 0x07000000) >> 24;
+ uint8_t subinstr3 = (op & 0x07000000) >> 24;
subinstr3 |= ((op & 0x00007000) >> 12) << 3;
op &= ~0x07007000;
@@ -458,7 +458,7 @@ int arcompact_handle04_2f_3f_dasm(DASM_OPS_32)
int arcompact_handle05_2f_3f_dasm(DASM_OPS_32) // useless ZOP group, no actual opcodes
{
int size = 4;
- UINT8 subinstr3 = (op & 0x07000000) >> 24;
+ uint8_t subinstr3 = (op & 0x07000000) >> 24;
subinstr3 |= ((op & 0x00007000) >> 12) << 3;
op &= ~0x07007000;
@@ -539,7 +539,7 @@ int arcompact_handle05_2f_3f_dasm(DASM_OPS_32) // useless ZOP group, no actual o
int arcompact_handle05_dasm(DASM_OPS_32)
{
int size = 4;
- UINT8 subinstr = (op & 0x003f0000) >> 16;
+ uint8_t subinstr = (op & 0x003f0000) >> 16;
op &= ~0x003f0000;
switch (subinstr)
@@ -616,7 +616,7 @@ int arcompact_handle05_dasm(DASM_OPS_32)
int arcompact_handle0c_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
op &= ~0x0018;
switch (subinstr)
@@ -632,7 +632,7 @@ int arcompact_handle0c_dasm(DASM_OPS_16)
int arcompact_handle0d_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
op &= ~0x0018;
switch (subinstr)
@@ -648,7 +648,7 @@ int arcompact_handle0d_dasm(DASM_OPS_16)
int arcompact_handle0e_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0018) >> 3;
+ uint8_t subinstr = (op & 0x0018) >> 3;
op &= ~0x0018;
switch (subinstr)
@@ -666,7 +666,7 @@ int arcompact_handle0f_dasm(DASM_OPS_16)
int size = 2;
// General Register Instructions (16-bit)
// 0111 1bbb ccci iiii
- UINT8 subinstr = (op & 0x01f) >> 0;
+ uint8_t subinstr = (op & 0x01f) >> 0;
op &= ~0x001f;
switch (subinstr)
@@ -711,7 +711,7 @@ int arcompact_handle0f_dasm(DASM_OPS_16)
int arcompact_handle0f_00_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
op &= ~0x00e0;
switch (subinstr)
@@ -735,7 +735,7 @@ int arcompact_handle0f_00_07_dasm(DASM_OPS_16)
int size = 2;
// General Operations w/o Register
// 01111 iii 111 00000
- UINT8 subinstr3 = (op & 0x0700) >> 8;
+ uint8_t subinstr3 = (op & 0x0700) >> 8;
op &= ~0x0700;
switch (subinstr3)
@@ -756,7 +756,7 @@ int arcompact_handle0f_00_07_dasm(DASM_OPS_16)
int arcompact_handle17_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
op &= ~0x00e0;
switch (subinstr)
@@ -779,7 +779,7 @@ int arcompact_handle18_dasm(DASM_OPS_16)
int size = 2;
// Stack Pointer Based Instructions (16-bit)
// 11000 bbb iii uuuuu
- UINT8 subinstr = (op & 0x00e0) >> 5;
+ uint8_t subinstr = (op & 0x00e0) >> 5;
op &= ~0x00e0;
switch (subinstr)
@@ -800,7 +800,7 @@ int arcompact_handle18_dasm(DASM_OPS_16)
int arcompact_handle18_05_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr2 = (op & 0x0700) >> 8;
+ uint8_t subinstr2 = (op & 0x0700) >> 8;
op &= ~0x0700;
switch (subinstr2)
@@ -821,7 +821,7 @@ int arcompact_handle18_05_dasm(DASM_OPS_16)
int arcompact_handle18_06_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr2 = (op & 0x001f) >> 0;
+ uint8_t subinstr2 = (op & 0x001f) >> 0;
op &= ~0x001f;
switch (subinstr2)
@@ -866,7 +866,7 @@ int arcompact_handle18_06_dasm(DASM_OPS_16)
int arcompact_handle18_07_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr2 = (op & 0x001f) >> 0;
+ uint8_t subinstr2 = (op & 0x001f) >> 0;
op &= ~0x001f;
switch (subinstr2)
@@ -911,7 +911,7 @@ int arcompact_handle18_07_dasm(DASM_OPS_16)
int arcompact_handle19_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0600) >> 9;
+ uint8_t subinstr = (op & 0x0600) >> 9;
op &= ~0x0600;
switch (subinstr)
@@ -927,7 +927,7 @@ int arcompact_handle19_dasm(DASM_OPS_16)
int arcompact_handle1c_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0080) >> 7;
+ uint8_t subinstr = (op & 0x0080) >> 7;
op &= ~0x0080;
switch (subinstr)
@@ -941,7 +941,7 @@ int arcompact_handle1c_dasm(DASM_OPS_16)
int arcompact_handle1d_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0080) >> 7;
+ uint8_t subinstr = (op & 0x0080) >> 7;
op &= ~0x0080;
switch (subinstr)
@@ -955,7 +955,7 @@ int arcompact_handle1d_dasm(DASM_OPS_16)
int arcompact_handle1e_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr = (op & 0x0600) >> 9;
+ uint8_t subinstr = (op & 0x0600) >> 9;
op &= ~0x0600;
switch (subinstr)
@@ -971,7 +971,7 @@ int arcompact_handle1e_dasm(DASM_OPS_16)
int arcompact_handle1e_03_dasm(DASM_OPS_16)
{
int size = 2;
- UINT8 subinstr2 = (op & 0x01c0) >> 6;
+ uint8_t subinstr2 = (op & 0x01c0) >> 6;
op &= ~0x01c0;
switch (subinstr2)