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-rw-r--r--src/devices/bus/ti99/gromport/cartridges.cpp56
-rw-r--r--src/devices/bus/ti99/gromport/cartridges.h36
-rw-r--r--src/devices/bus/ti99/gromport/gkracker.cpp12
-rw-r--r--src/devices/bus/ti99/gromport/gkracker.h4
-rw-r--r--src/devices/bus/ti99/gromport/gromport.cpp12
-rw-r--r--src/devices/bus/ti99/gromport/gromport.h9
-rw-r--r--src/devices/bus/ti99/gromport/multiconn.cpp16
-rw-r--r--src/devices/bus/ti99/gromport/multiconn.h4
-rw-r--r--src/devices/bus/ti99/gromport/singleconn.cpp12
-rw-r--r--src/devices/bus/ti99/gromport/singleconn.h4
-rw-r--r--src/devices/bus/ti99/internal/992board.cpp10
-rw-r--r--src/devices/bus/ti99/internal/992board.h4
-rw-r--r--src/devices/bus/ti99/internal/998board.cpp78
-rw-r--r--src/devices/bus/ti99/internal/998board.h29
-rw-r--r--src/devices/bus/ti99/internal/datamux.cpp75
-rw-r--r--src/devices/bus/ti99/internal/datamux.h19
-rw-r--r--src/devices/bus/ti99/internal/genboard.cpp48
-rw-r--r--src/devices/bus/ti99/internal/genboard.h14
-rw-r--r--src/devices/bus/ti99/internal/ioport.cpp14
-rw-r--r--src/devices/bus/ti99/internal/ioport.h20
-rw-r--r--src/devices/bus/ti99/joyport/handset.cpp1
-rw-r--r--src/devices/bus/ti99/peb/bwg.cpp12
-rw-r--r--src/devices/bus/ti99/peb/bwg.h4
-rw-r--r--src/devices/bus/ti99/peb/evpc.cpp11
-rw-r--r--src/devices/bus/ti99/peb/evpc.h4
-rw-r--r--src/devices/bus/ti99/peb/hfdc.cpp22
-rw-r--r--src/devices/bus/ti99/peb/hfdc.h10
-rw-r--r--src/devices/bus/ti99/peb/horizon.cpp4
-rw-r--r--src/devices/bus/ti99/peb/horizon.h4
-rw-r--r--src/devices/bus/ti99/peb/hsgpl.cpp44
-rw-r--r--src/devices/bus/ti99/peb/hsgpl.h14
-rw-r--r--src/devices/bus/ti99/peb/memex.cpp7
-rw-r--r--src/devices/bus/ti99/peb/memex.h4
-rw-r--r--src/devices/bus/ti99/peb/myarcmem.cpp4
-rw-r--r--src/devices/bus/ti99/peb/myarcmem.h4
-rw-r--r--src/devices/bus/ti99/peb/pcode.cpp8
-rw-r--r--src/devices/bus/ti99/peb/pcode.h6
-rw-r--r--src/devices/bus/ti99/peb/peribox.cpp28
-rw-r--r--src/devices/bus/ti99/peb/peribox.h12
-rw-r--r--src/devices/bus/ti99/peb/samsmem.cpp4
-rw-r--r--src/devices/bus/ti99/peb/samsmem.h4
-rw-r--r--src/devices/bus/ti99/peb/spchsyn.cpp13
-rw-r--r--src/devices/bus/ti99/peb/spchsyn.h5
-rw-r--r--src/devices/bus/ti99/peb/ti_32kmem.cpp7
-rw-r--r--src/devices/bus/ti99/peb/ti_32kmem.h4
-rw-r--r--src/devices/bus/ti99/peb/ti_fdc.cpp8
-rw-r--r--src/devices/bus/ti99/peb/ti_fdc.h4
-rw-r--r--src/devices/bus/ti99/peb/ti_rs232.cpp27
-rw-r--r--src/devices/bus/ti99/peb/ti_rs232.h12
-rw-r--r--src/devices/bus/ti99/peb/tn_ide.cpp26
-rw-r--r--src/devices/bus/ti99/peb/tn_ide.h4
-rw-r--r--src/devices/bus/ti99/peb/tn_usbsm.cpp18
-rw-r--r--src/devices/bus/ti99/peb/tn_usbsm.h4
-rw-r--r--src/devices/bus/ti99/ti99defs.h8
54 files changed, 425 insertions, 402 deletions
diff --git a/src/devices/bus/ti99/gromport/cartridges.cpp b/src/devices/bus/ti99/gromport/cartridges.cpp
index d3f3f75a10a..7e93029f97f 100644
--- a/src/devices/bus/ti99/gromport/cartridges.cpp
+++ b/src/devices/bus/ti99/gromport/cartridges.cpp
@@ -341,23 +341,23 @@ void ti99_cartridge_device::set_slot(int i)
READ8Z_MEMBER(ti99_cartridge_device::readz)
{
if (m_pcb != nullptr)
- m_pcb->readz(offset, value);
+ m_pcb->readz(space, offset, value);
}
-void ti99_cartridge_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_cartridge_device::write)
{
if (m_pcb != nullptr)
- m_pcb->write(offset, data);
+ m_pcb->write(space, offset, data);
}
READ8Z_MEMBER(ti99_cartridge_device::crureadz)
{
- if (m_pcb != nullptr) m_pcb->crureadz(offset, value);
+ if (m_pcb != nullptr) m_pcb->crureadz(space, offset, value);
}
-void ti99_cartridge_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_cartridge_device::cruwrite)
{
- if (m_pcb != nullptr) m_pcb->cruwrite(offset, data);
+ if (m_pcb != nullptr) m_pcb->cruwrite(space, offset, data);
}
WRITE_LINE_MEMBER( ti99_cartridge_device::ready_line )
@@ -509,7 +509,7 @@ READ8Z_MEMBER(ti99_cartridge_pcb::readz)
}
}
-void ti99_cartridge_pcb::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_cartridge_pcb::write)
{
if (m_romspace_selected)
{
@@ -526,7 +526,7 @@ READ8Z_MEMBER(ti99_cartridge_pcb::crureadz)
{
}
-void ti99_cartridge_pcb::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_cartridge_pcb::cruwrite)
{
}
@@ -614,7 +614,7 @@ READ8Z_MEMBER(ti99_paged12k_cartridge::readz)
}
}
-void ti99_paged12k_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_paged12k_cartridge::write)
{
if (m_romspace_selected)
{
@@ -663,7 +663,7 @@ READ8Z_MEMBER(ti99_paged16k_cartridge::readz)
}
}
-void ti99_paged16k_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_paged16k_cartridge::write)
{
if (m_romspace_selected)
{
@@ -720,7 +720,7 @@ READ8Z_MEMBER(ti99_minimem_cartridge::readz)
}
/* Write function for the minimem cartridge. */
-void ti99_minimem_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_minimem_cartridge::write)
{
if (m_romspace_selected)
{
@@ -788,7 +788,7 @@ READ8Z_MEMBER(ti99_super_cartridge::readz)
}
/* Write function for the super cartridge. */
-void ti99_super_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_super_cartridge::write)
{
if (m_romspace_selected)
{
@@ -826,15 +826,19 @@ READ8Z_MEMBER(ti99_super_cartridge::crureadz)
// SRL R0,1 Restore Bank Number (optional)
// RT
+ // Our implementation in MESS always gets 8 bits in one go. Also, the address
+ // is twice the bit number. That is, the offset value is always a multiple
+ // of 0x10.
+
if ((offset & 0xfff0) == 0x0800)
{
LOGMASKED(LOG_CRU, "CRU accessed at %04x\n", offset);
uint8_t val = 0x02 << (m_ram_page << 1);
- *value = BIT(val, (offset & 0x000e) >> 1);
+ *value = (val >> ((offset - 0x0800)>>1)) & 0xff;
}
}
-void ti99_super_cartridge::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_super_cartridge::cruwrite)
{
if ((offset & 0xfff0) == 0x0800)
{
@@ -919,7 +923,7 @@ READ8Z_MEMBER(ti99_mbx_cartridge::readz)
}
/* Write function for the mbx cartridge. */
-void ti99_mbx_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_mbx_cartridge::write)
{
if (m_romspace_selected)
{
@@ -995,7 +999,7 @@ READ8Z_MEMBER(ti99_paged7_cartridge::readz)
}
/* Write function for the paged7 cartridge. */
-void ti99_paged7_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_paged7_cartridge::write)
{
if (m_romspace_selected)
{
@@ -1067,7 +1071,7 @@ READ8Z_MEMBER(ti99_paged379i_cartridge::readz)
}
/* Write function for the paged379i cartridge. Only used to set the bank. */
-void ti99_paged379i_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_paged379i_cartridge::write)
{
// Bits: 011x xxxx xxxb bbbx
// x = don't care, bbbb = bank
@@ -1118,7 +1122,7 @@ READ8Z_MEMBER(ti99_paged378_cartridge::readz)
}
/* Write function for the paged378 cartridge. Only used to set the bank. */
-void ti99_paged378_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_paged378_cartridge::write)
{
// Bits: 011x xxxx xbbb bbbx
// x = don't care, bbbb = bank
@@ -1158,7 +1162,7 @@ READ8Z_MEMBER(ti99_paged377_cartridge::readz)
}
/* Write function for the paged377 cartridge. Only used to set the bank. */
-void ti99_paged377_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_paged377_cartridge::write)
{
// Bits: 011x xxxb bbbb bbbx
// x = don't care, bbbb = bank
@@ -1212,7 +1216,7 @@ READ8Z_MEMBER(ti99_pagedcru_cartridge::readz)
}
/* Write function for the pagedcru cartridge. No effect. */
-void ti99_pagedcru_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_pagedcru_cartridge::write)
{
return;
}
@@ -1227,11 +1231,11 @@ READ8Z_MEMBER(ti99_pagedcru_cartridge::crureadz)
{
page = page-(bit/2); // 4 page flags per 8 bits
}
- *value = (offset & 0x000e) == (page * 4 + 2) ? 1 : 0;
+ *value = 1 << (page*2+1);
}
}
-void ti99_pagedcru_cartridge::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_pagedcru_cartridge::cruwrite)
{
if ((offset & 0xf800)==0x0800)
{
@@ -1303,7 +1307,7 @@ READ8Z_MEMBER(ti99_gromemu_cartridge::readz)
{
if (m_grom_selected)
{
- if (m_grom_read_mode) gromemureadz(offset, value);
+ if (m_grom_read_mode) gromemureadz(space, offset, value, mem_mask);
}
else
{
@@ -1323,7 +1327,7 @@ READ8Z_MEMBER(ti99_gromemu_cartridge::readz)
}
}
-void ti99_gromemu_cartridge::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_gromemu_cartridge::write)
{
if (m_romspace_selected)
{
@@ -1344,7 +1348,7 @@ void ti99_gromemu_cartridge::write(offs_t offset, uint8_t data)
// Will not change anything when not selected (preceding gsq=ASSERT)
if (m_grom_selected)
{
- if (!m_grom_read_mode) gromemuwrite(offset, data);
+ if (!m_grom_read_mode) gromemuwrite(space, offset, data, mem_mask);
}
}
}
@@ -1369,7 +1373,7 @@ READ8Z_MEMBER(ti99_gromemu_cartridge::gromemureadz)
m_waddr_LSB = false;
}
-void ti99_gromemu_cartridge::gromemuwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_gromemu_cartridge::gromemuwrite)
{
// Set GROM address
if (m_grom_address_mode)
diff --git a/src/devices/bus/ti99/gromport/cartridges.h b/src/devices/bus/ti99/gromport/cartridges.h
index e2e729f2d59..b969e65eccf 100644
--- a/src/devices/bus/ti99/gromport/cartridges.h
+++ b/src/devices/bus/ti99/gromport/cartridges.h
@@ -66,9 +66,9 @@ public:
ti99_cartridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz);
- void write(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER(write);
DECLARE_READ8Z_MEMBER(crureadz);
- void cruwrite(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER(cruwrite);
DECLARE_WRITE_LINE_MEMBER(ready_line);
DECLARE_WRITE_LINE_MEMBER(romgq_line);
@@ -213,9 +213,9 @@ public:
protected:
virtual DECLARE_READ8Z_MEMBER(readz);
- virtual void write(offs_t offset, uint8_t data);
+ virtual DECLARE_WRITE8_MEMBER(write);
virtual DECLARE_READ8Z_MEMBER(crureadz);
- virtual void cruwrite(offs_t offset, uint8_t data);
+ virtual DECLARE_WRITE8_MEMBER(cruwrite);
DECLARE_WRITE_LINE_MEMBER(romgq_line);
virtual void set_gromlines(line_state mline, line_state moline, line_state gsq);
@@ -263,7 +263,7 @@ class ti99_paged12k_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
};
/*********** Paged cartridge (others) ********************/
@@ -272,7 +272,7 @@ class ti99_paged16k_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
};
/*********** Paged7 cartridge (late carts) ********************/
@@ -281,7 +281,7 @@ class ti99_paged7_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
};
/********************** Mini Memory ***********************************/
@@ -290,7 +290,7 @@ class ti99_minimem_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
};
/********************* Super Space II *********************************/
@@ -299,9 +299,9 @@ class ti99_super_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
};
/************************* MBX ***************************************/
@@ -310,7 +310,7 @@ class ti99_mbx_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
};
/********************** Paged 379i ************************************/
@@ -319,7 +319,7 @@ class ti99_paged379i_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
private:
int get_paged379i_bank(int rompage);
};
@@ -330,7 +330,7 @@ class ti99_paged378_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
};
/********************** Paged 377 ************************************/
@@ -339,7 +339,7 @@ class ti99_paged377_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
};
/********************** Paged CRU ************************************/
@@ -348,9 +348,9 @@ class ti99_pagedcru_cartridge : public ti99_cartridge_pcb
{
public:
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
};
/********************** GROM emulation cartridge ************************************/
@@ -361,9 +361,9 @@ public:
ti99_gromemu_cartridge(): m_waddr_LSB(false), m_grom_selected(false), m_grom_read_mode(false), m_grom_address_mode(false)
{ m_grom_address = 0; }
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(gromemureadz);
- void gromemuwrite(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER(gromemuwrite);
void set_gromlines(line_state mline, line_state moline, line_state gsq) override;
private:
diff --git a/src/devices/bus/ti99/gromport/gkracker.cpp b/src/devices/bus/ti99/gromport/gkracker.cpp
index 57ccfbc87e1..d9de20949b2 100644
--- a/src/devices/bus/ti99/gromport/gkracker.cpp
+++ b/src/devices/bus/ti99/gromport/gkracker.cpp
@@ -227,18 +227,18 @@ READ8Z_MEMBER(ti99_gkracker_device::readz)
uint8_t val1 = *value;
// Read from the guest cartridge.
- m_cartridge->readz(offset, value);
+ m_cartridge->readz(space, offset, value, mem_mask);
if (val1 != *value)
LOGMASKED(LOG_GKRACKER, "Read (from guest) %04x -> %02x\n", offset, *value);
}
}
-void ti99_gkracker_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_gkracker_device::write)
{
// write to the guest cartridge if present
if (m_cartridge != nullptr)
{
- m_cartridge->write(offset, data);
+ m_cartridge->write(space, offset, data, mem_mask);
}
if (m_grom_selected)
@@ -307,12 +307,12 @@ void ti99_gkracker_device::write(offs_t offset, uint8_t data)
READ8Z_MEMBER( ti99_gkracker_device::crureadz )
{
- if (m_cartridge != nullptr) m_cartridge->crureadz(offset, value);
+ if (m_cartridge != nullptr) m_cartridge->crureadz(space, offset, value);
}
-void ti99_gkracker_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER( ti99_gkracker_device::cruwrite )
{
- if (m_cartridge != nullptr) m_cartridge->cruwrite(offset, data);
+ if (m_cartridge != nullptr) m_cartridge->cruwrite(space, offset, data);
}
INPUT_CHANGED_MEMBER( ti99_gkracker_device::gk_changed )
diff --git a/src/devices/bus/ti99/gromport/gkracker.h b/src/devices/bus/ti99/gromport/gkracker.h
index 34b267bf640..bb3d278d57a 100644
--- a/src/devices/bus/ti99/gromport/gkracker.h
+++ b/src/devices/bus/ti99/gromport/gkracker.h
@@ -19,9 +19,9 @@ public:
ti99_gkracker_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
DECLARE_WRITE_LINE_MEMBER(romgq_line) override;
void set_gromlines(line_state mline, line_state moline, line_state gsq) override;
diff --git a/src/devices/bus/ti99/gromport/gromport.cpp b/src/devices/bus/ti99/gromport/gromport.cpp
index 5f893aa4423..b6fa23e1111 100644
--- a/src/devices/bus/ti99/gromport/gromport.cpp
+++ b/src/devices/bus/ti99/gromport/gromport.cpp
@@ -143,7 +143,7 @@ READ8Z_MEMBER(gromport_device::readz)
{
if (m_connector != nullptr)
{
- m_connector->readz(offset & m_mask, value);
+ m_connector->readz(space, offset & m_mask, value);
if (m_romgq) LOGMASKED(LOG_READ, "Read %04x -> %02x\n", offset | 0x6000, *value);
}
}
@@ -152,25 +152,25 @@ READ8Z_MEMBER(gromport_device::readz)
Writing via the GROM port. Only 13 address lines are passed through
on the TI-99/4A, and 14 lines on the TI-99/8.
*/
-void gromport_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(gromport_device::write)
{
if (m_connector != nullptr)
{
if (m_romgq) LOGMASKED(LOG_WRITE, "Write %04x <- %02x\n", offset | 0x6000, data);
- m_connector->write(offset & m_mask, data);
+ m_connector->write(space, offset & m_mask, data);
}
}
READ8Z_MEMBER(gromport_device::crureadz)
{
if (m_connector != nullptr)
- m_connector->crureadz(offset, value);
+ m_connector->crureadz(space, offset, value);
}
-void gromport_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(gromport_device::cruwrite)
{
if (m_connector != nullptr)
- m_connector->cruwrite(offset, data);
+ m_connector->cruwrite(space, offset, data);
}
WRITE_LINE_MEMBER(gromport_device::ready_line)
diff --git a/src/devices/bus/ti99/gromport/gromport.h b/src/devices/bus/ti99/gromport/gromport.h
index 9c04ef5a8b8..8d5c61ce78d 100644
--- a/src/devices/bus/ti99/gromport/gromport.h
+++ b/src/devices/bus/ti99/gromport/gromport.h
@@ -39,11 +39,10 @@ public:
}
gromport_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
DECLARE_READ8Z_MEMBER(readz);
- void write(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER(write);
DECLARE_READ8Z_MEMBER(crureadz);
- void cruwrite(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER(cruwrite);
DECLARE_WRITE_LINE_MEMBER(ready_line);
DECLARE_WRITE_LINE_MEMBER(romgq_line);
void set_gromlines(line_state mline, line_state moline, line_state gsq);
@@ -77,11 +76,11 @@ class cartridge_connector_device : public device_t
{
public:
virtual DECLARE_READ8Z_MEMBER(readz) = 0;
- virtual void write(offs_t offset, uint8_t data) = 0;
+ virtual DECLARE_WRITE8_MEMBER(write) = 0;
virtual DECLARE_SETADDRESS_DBIN_MEMBER( setaddress_dbin ) { }
virtual DECLARE_READ8Z_MEMBER(crureadz) = 0;
- virtual void cruwrite(offs_t offset, uint8_t data) = 0;
+ virtual DECLARE_WRITE8_MEMBER(cruwrite) = 0;
virtual DECLARE_WRITE_LINE_MEMBER(romgq_line) = 0;
virtual void set_gromlines(line_state mline, line_state moline, line_state gsq) =0;
diff --git a/src/devices/bus/ti99/gromport/multiconn.cpp b/src/devices/bus/ti99/gromport/multiconn.cpp
index 191853f1029..efaf57d649d 100644
--- a/src/devices/bus/ti99/gromport/multiconn.cpp
+++ b/src/devices/bus/ti99/gromport/multiconn.cpp
@@ -195,7 +195,7 @@ READ8Z_MEMBER(ti99_multi_cart_conn_device::readz)
if (m_cartridge[i] != nullptr)
{
uint8_t newval = *value;
- m_cartridge[i]->readz(offset, &newval);
+ m_cartridge[i]->readz(space, offset, &newval, 0xff);
if (i==slot)
{
*value = newval;
@@ -207,12 +207,12 @@ READ8Z_MEMBER(ti99_multi_cart_conn_device::readz)
{
if (slot < NUMBER_OF_CARTRIDGE_SLOTS && m_cartridge[slot] != nullptr)
{
- m_cartridge[slot]->readz(offset, value);
+ m_cartridge[slot]->readz(space, offset, value, 0xff);
}
}
}
-void ti99_multi_cart_conn_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_multi_cart_conn_device::write)
{
// Same issue as above (read)
// We don't have GRAM cartridges, anyway, so it's just used for setting the address.
@@ -222,7 +222,7 @@ void ti99_multi_cart_conn_device::write(offs_t offset, uint8_t data)
{
if (elem != nullptr)
{
- elem->write(offset, data);
+ elem->write(space, offset, data, 0xff);
}
}
}
@@ -232,7 +232,7 @@ void ti99_multi_cart_conn_device::write(offs_t offset, uint8_t data)
if (slot < NUMBER_OF_CARTRIDGE_SLOTS && m_cartridge[slot] != nullptr)
{
// logerror("writing %04x (slot %d) <- %02x\n", offset, slot, data);
- m_cartridge[slot]->write(offset, data);
+ m_cartridge[slot]->write(space, offset, data, 0xff);
}
}
}
@@ -246,11 +246,11 @@ READ8Z_MEMBER(ti99_multi_cart_conn_device::crureadz)
if (m_cartridge[slot] != nullptr)
{
- m_cartridge[slot]->crureadz(offset, value);
+ m_cartridge[slot]->crureadz(space, offset, value);
}
}
-void ti99_multi_cart_conn_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_multi_cart_conn_device::cruwrite)
{
int slot = get_active_slot(true, offset);
@@ -260,7 +260,7 @@ void ti99_multi_cart_conn_device::cruwrite(offs_t offset, uint8_t data)
if (m_cartridge[slot] != nullptr)
{
- m_cartridge[slot]->cruwrite(offset, data);
+ m_cartridge[slot]->cruwrite(space, offset, data);
}
}
diff --git a/src/devices/bus/ti99/gromport/multiconn.h b/src/devices/bus/ti99/gromport/multiconn.h
index 56a5915cfb2..97b9308eb36 100644
--- a/src/devices/bus/ti99/gromport/multiconn.h
+++ b/src/devices/bus/ti99/gromport/multiconn.h
@@ -24,9 +24,9 @@ public:
ti99_multi_cart_conn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
DECLARE_WRITE_LINE_MEMBER(romgq_line) override;
void set_gromlines(line_state mline, line_state moline, line_state gsq) override;
DECLARE_WRITE_LINE_MEMBER(gclock_in) override;
diff --git a/src/devices/bus/ti99/gromport/singleconn.cpp b/src/devices/bus/ti99/gromport/singleconn.cpp
index 9a0b905a9e7..c967cf503f2 100644
--- a/src/devices/bus/ti99/gromport/singleconn.cpp
+++ b/src/devices/bus/ti99/gromport/singleconn.cpp
@@ -22,25 +22,25 @@ ti99_single_cart_conn_device::ti99_single_cart_conn_device(const machine_config
READ8Z_MEMBER(ti99_single_cart_conn_device::readz)
{
// Pass through
- m_cartridge->readz(offset, value);
+ m_cartridge->readz(space, offset, value);
}
-void ti99_single_cart_conn_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_single_cart_conn_device::write)
{
// Pass through
- m_cartridge->write(offset, data);
+ m_cartridge->write(space, offset, data);
}
READ8Z_MEMBER(ti99_single_cart_conn_device::crureadz)
{
// Pass through
- m_cartridge->crureadz(offset, value);
+ m_cartridge->crureadz(space, offset, value);
}
-void ti99_single_cart_conn_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti99_single_cart_conn_device::cruwrite)
{
// Pass through
- m_cartridge->cruwrite(offset, data);
+ m_cartridge->cruwrite(space, offset, data);
}
WRITE_LINE_MEMBER(ti99_single_cart_conn_device::romgq_line)
diff --git a/src/devices/bus/ti99/gromport/singleconn.h b/src/devices/bus/ti99/gromport/singleconn.h
index 831d70ffb18..10f1062f223 100644
--- a/src/devices/bus/ti99/gromport/singleconn.h
+++ b/src/devices/bus/ti99/gromport/singleconn.h
@@ -20,9 +20,9 @@ public:
ti99_single_cart_conn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
DECLARE_WRITE_LINE_MEMBER(romgq_line) override;
void set_gromlines(line_state mline, line_state moline, line_state gsq) override;
DECLARE_WRITE_LINE_MEMBER(gclock_in) override;
diff --git a/src/devices/bus/ti99/internal/992board.cpp b/src/devices/bus/ti99/internal/992board.cpp
index 071526016f2..330bcee4566 100644
--- a/src/devices/bus/ti99/internal/992board.cpp
+++ b/src/devices/bus/ti99/internal/992board.cpp
@@ -456,15 +456,15 @@ void io992_device::device_start()
m_set_rom_bank.resolve();
}
-uint8_t io992_device::cruread(offs_t offset)
+READ8_MEMBER(io992_device::cruread)
{
- int address = offset << 1;
+ int address = offset << 4;
uint8_t value = 0x7f; // All Hexbus lines high
double inp = 0;
int i;
uint8_t bit = 1;
- switch (address & 0xf800)
+ switch (address)
{
case 0xe000:
// CRU E000-E7fE: Keyboard
@@ -494,10 +494,10 @@ uint8_t io992_device::cruread(offs_t offset)
LOGMASKED(LOG_CRU, "CRU %04x -> %02x\n", address, value);
- return BIT(value, offset & 7);
+ return value;
}
-void io992_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(io992_device::cruwrite)
{
int address = (offset << 1) & 0xf80e;
diff --git a/src/devices/bus/ti99/internal/992board.h b/src/devices/bus/ti99/internal/992board.h
index 5b99519f81f..b9946ebe9c4 100644
--- a/src/devices/bus/ti99/internal/992board.h
+++ b/src/devices/bus/ti99/internal/992board.h
@@ -107,8 +107,8 @@ class io992_device : public bus::hexbus::hexbus_chained_device
public:
io992_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- uint8_t cruread(offs_t offset);
- void cruwrite(offs_t offset, uint8_t data);
+ DECLARE_READ8_MEMBER( cruread );
+ DECLARE_WRITE8_MEMBER( cruwrite );
void device_start() override;
ioport_constructor device_input_ports() const override;
auto rombank_cb() { return m_set_rom_bank.bind(); }
diff --git a/src/devices/bus/ti99/internal/998board.cpp b/src/devices/bus/ti99/internal/998board.cpp
index 96f1c3d07f3..b81eeb01c59 100644
--- a/src/devices/bus/ti99/internal/998board.cpp
+++ b/src/devices/bus/ti99/internal/998board.cpp
@@ -198,7 +198,7 @@ mainboard8_device::mainboard8_device(const machine_config &mconfig, const char *
// Debugger support
// The memory accesses by the debugger are routed around the custom chip logic
-uint8_t mainboard8_device::debugger_read(offs_t offset)
+READ8_MEMBER( mainboard8_device::debugger_read )
{
int logical_address = offset;
bool compat_mode = (m_crus_debug==ASSERT_LINE);
@@ -243,7 +243,7 @@ uint8_t mainboard8_device::debugger_read(offs_t offset)
if (m_mofetta->hexbus_access_debug()) return m_rom1[(physical_address & 0x1fff) | 0x6000];
if (m_mofetta->intdsr_access_debug()) return m_rom1[(physical_address & 0x1fff) | 0x4000];
m_ioport->memen_in(ASSERT_LINE);
- m_ioport->readz(physical_address & 0xffff, &value);
+ m_ioport->readz(space, physical_address & 0xffff, &value);
m_ioport->memen_in(CLEAR_LINE);
return value;
}
@@ -251,7 +251,7 @@ uint8_t mainboard8_device::debugger_read(offs_t offset)
{
// Cartridge space lower 8
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->readz(physical_address & 0x1fff, &value);
+ m_gromport->readz(space, physical_address & 0x1fff, &value);
m_gromport->romgq_line(CLEAR_LINE);
return value;
}
@@ -259,7 +259,7 @@ uint8_t mainboard8_device::debugger_read(offs_t offset)
{
// Cartridge space upper 8
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->readz((physical_address & 0x1fff) | 0x2000, &value);
+ m_gromport->readz(space, (physical_address & 0x1fff) | 0x2000, &value);
m_gromport->romgq_line(CLEAR_LINE);
return value;
}
@@ -276,7 +276,7 @@ uint8_t mainboard8_device::debugger_read(offs_t offset)
return 0;
}
-void mainboard8_device::debugger_write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( mainboard8_device::debugger_write )
{
int logical_address = offset;
bool compat_mode = (m_crus_debug==ASSERT_LINE);
@@ -324,14 +324,14 @@ void mainboard8_device::debugger_write(offs_t offset, uint8_t data)
if (m_mofetta->hexbus_access_debug()) return;
if (m_mofetta->intdsr_access_debug()) return;
m_ioport->memen_in(ASSERT_LINE);
- m_ioport->write(physical_address & 0xffff, data & 0xff);
+ m_ioport->write(space, physical_address & 0xffff, data & 0xff);
m_ioport->memen_in(CLEAR_LINE); return;
}
if ((physical_address & 0x00ffe000)==0x00ff6000)
{
// Cartridge space lower 8
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->write(physical_address & 0x1fff, data & 0xff);
+ m_gromport->write(space, physical_address & 0x1fff, data & 0xff);
m_gromport->romgq_line(CLEAR_LINE);
return;
}
@@ -339,7 +339,7 @@ void mainboard8_device::debugger_write(offs_t offset, uint8_t data)
{
// Cartridge space upper 8
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->write((physical_address & 0x1fff) | 0x2000, data & 0xff);
+ m_gromport->write(space, (physical_address & 0x1fff) | 0x2000, data & 0xff);
m_gromport->romgq_line(CLEAR_LINE);
return;
}
@@ -352,16 +352,16 @@ void mainboard8_device::debugger_write(offs_t offset, uint8_t data)
READ8Z_MEMBER(mainboard8_device::crureadz)
{
- m_ioport->crureadz(offset, value);
+ m_ioport->crureadz(space, offset, value);
}
/*
CRU handling. Mofetta is the only chip that bothers to handle it, beside the PEB
*/
-void mainboard8_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(mainboard8_device::cruwrite)
{
- m_mofetta->cruwrite(offset, data);
- m_ioport->cruwrite(offset, data);
+ m_mofetta->cruwrite(space, offset, data);
+ m_ioport->cruwrite(space, offset, data);
}
// =============== Memory bus access ==================
@@ -371,7 +371,7 @@ WRITE_LINE_MEMBER( mainboard8_device::dbin_in )
m_dbin_level = (line_state)state;
}
-uint8_t mainboard8_device::setoffset(offs_t offset)
+READ8_MEMBER( mainboard8_device::setoffset )
{
LOGMASKED(LOG_ADDRESS, "set %s %04x\n", (m_dbin_level==ASSERT_LINE)? "R" : "W", offset);
@@ -390,7 +390,7 @@ uint8_t mainboard8_device::setoffset(offs_t offset)
m_A14_set = ((m_logical_address & 2)!=0); // Needed for clock_in
// Check for match in logical space
- m_vaquerro->set_address(m_logical_address, m_dbin_level);
+ m_vaquerro->set_address(space, m_logical_address, m_dbin_level);
// Select GROMs if addressed
select_groms();
@@ -405,7 +405,7 @@ uint8_t mainboard8_device::setoffset(offs_t offset)
m_mofetta->lascs_in(lasreq);
// Need to set the address in any case so that the lines can be cleared
- m_amigo->set_address(m_logical_address);
+ m_amigo->set_address(space, m_logical_address);
// AMIGO is the one to control the READY line to the CPU
// MOFETTA does not contribute to READY
@@ -539,7 +539,7 @@ WRITE_LINE_MEMBER( mainboard8_device::clock_in )
if (m_mofetta->alccs_out()==ASSERT_LINE)
{
- m_oso->write(m_physical_address>>1, m_latched_data);
+ m_oso->write(*m_space, m_physical_address>>1, m_latched_data);
m_pending_write = false;
LOGMASKED(LOG_MEM, "Write %04x (phys %06x, OSO) <- %02x\n", m_logical_address, m_physical_address, m_latched_data);
}
@@ -547,7 +547,7 @@ WRITE_LINE_MEMBER( mainboard8_device::clock_in )
if (m_mofetta->cmas_out()==ASSERT_LINE)
{
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->write(m_physical_address & 0x3fff, m_latched_data);
+ m_gromport->write(*m_space, m_physical_address & 0x3fff, m_latched_data);
m_pending_write = false;
LOGMASKED(LOG_MEM, "Write %04x (phys %06x, cartridge) <- %02x\n", m_logical_address, m_physical_address, m_latched_data);
}
@@ -558,7 +558,7 @@ WRITE_LINE_MEMBER( mainboard8_device::clock_in )
if (m_mofetta->dbc_out()==ASSERT_LINE)
{
- m_ioport->write(m_physical_address, m_latched_data);
+ m_ioport->write(*m_space, m_physical_address, m_latched_data);
m_pending_write = false;
LOGMASKED(LOG_MEM, "Write %04x (phys %06x, PEB) <- %02x\n", m_logical_address, m_physical_address, m_latched_data);
}
@@ -635,7 +635,7 @@ void mainboard8_device::select_groms()
m_sgrom1->write(m_latched_data);
m_sgrom2->write(m_latched_data);
LOGMASKED(LOG_MEM, "Write GS <- %02x\n", m_latched_data);
- m_gromport->write(0, m_latched_data);
+ m_gromport->write(*m_space, 0, m_latched_data);
break;
case TSGSEL:
@@ -682,8 +682,8 @@ void mainboard8_device::set_paddress(int address)
m_physical_address = (m_physical_address << 16) | address;
LOGMASKED(LOG_DETAIL, "Setting physical address %06x\n", m_physical_address);
- m_mofetta->set_address(address, m_dbin_level);
- m_ioport->setaddress_dbin(address, m_dbin_level);
+ m_mofetta->set_address(*m_space, address, m_dbin_level);
+ m_ioport->setaddress_dbin(*m_space, address, m_dbin_level);
}
WRITE_LINE_MEMBER( mainboard8_device::msast_in )
@@ -701,14 +701,14 @@ WRITE_LINE_MEMBER( mainboard8_device::msast_in )
}
-uint8_t mainboard8_device::read(offs_t offset)
+READ8_MEMBER( mainboard8_device::read )
{
uint8_t value = 0;
const char* what;
if (machine().side_effects_disabled())
{
- return debugger_read(offset);
+ return debugger_read(space, offset);
}
// =================================================
@@ -716,7 +716,7 @@ uint8_t mainboard8_device::read(offs_t offset)
// =================================================
if (m_amigo->mapper_accessed())
{
- value = m_amigo->read();
+ value = m_amigo->read(space, 0);
what = "mapper";
goto readdone;
}
@@ -762,7 +762,7 @@ uint8_t mainboard8_device::read(offs_t offset)
m_sgrom0->readz(&value);
m_sgrom1->readz(&value);
m_sgrom2->readz(&value);
- m_gromport->readz(0, &value);
+ m_gromport->readz(space, 0, &value);
if (!m_A14_set) LOGMASKED(LOG_GROM, "GS>%04x\n", m_sgrom0->debug_get_address()-1);
what = "system GROM";
goto readdone;
@@ -843,7 +843,7 @@ uint8_t mainboard8_device::read(offs_t offset)
if (m_mofetta->alccs_out()==ASSERT_LINE)
{
- value = m_oso->read(m_physical_address>>1);
+ value = m_oso->read(*m_space, m_physical_address>>1);
what = "OSO";
goto readdonephys;
}
@@ -858,14 +858,14 @@ uint8_t mainboard8_device::read(offs_t offset)
if (m_mofetta->cmas_out()==ASSERT_LINE)
{
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->readz(m_physical_address & 0x3fff, &value);
+ m_gromport->readz(*m_space, m_physical_address & 0x3fff, &value);
what = "Cartridge";
goto readdonephys;
}
if (m_mofetta->dbc_out()==ASSERT_LINE)
{
- m_ioport->readz(m_physical_address & 0xffff, &value);
+ m_ioport->readz(*m_space, m_physical_address & 0xffff, &value);
what = "PEB";
goto readdonephys;
}
@@ -905,14 +905,14 @@ void mainboard8_device::cycle_end()
If the READY line is pulled down due to the mapping process, we must
store the data bus value until the physical address is available.
*/
-void mainboard8_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( mainboard8_device::write )
{
m_latched_data = data;
m_pending_write = true;
if (machine().side_effects_disabled())
{
- return debugger_write(offset, data);
+ return debugger_write(space, offset, data);
}
// Some logical space devices can be written immediately
@@ -920,7 +920,7 @@ void mainboard8_device::write(offs_t offset, uint8_t data)
if (m_amigo->mapper_accessed())
{
LOGMASKED(LOG_MEM, "Write %04x (mapper) <- %02x\n", m_logical_address, data);
- m_amigo->write(data);
+ m_amigo->write(space, 0, data);
m_pending_write = false;
}
@@ -1064,6 +1064,10 @@ void mainboard8_device::device_reset()
m_A14_set = false;
// Configure RAM and AMIGO
m_amigo->connect_sram(m_sram->pointer());
+
+ // Get the pointer to the address space; we need it outside of the
+ // usual memory functions. TODO: Possibly not anymore.
+ m_space = &m_maincpu->space(AS_PROGRAM);
}
void mainboard8_device::device_add_mconfig(machine_config &config)
@@ -1731,7 +1735,7 @@ bool mofetta_device::intdsr_access_debug()
return m_txspg;
}
-void mofetta_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(mofetta_device::cruwrite)
{
if ((offset & 0xff00)==0x2700)
{
@@ -1996,7 +2000,7 @@ WRITE_LINE_MEMBER( amigo_device::lascs_in )
3. Set the physical address bus with the second 16 bits of the physical
address. Clear the MSAST line. Forward any incoming READY=0 to the CPU.
*/
-uint8_t amigo_device::set_address(offs_t offset)
+READ8_MEMBER( amigo_device::set_address )
{
// Check whether the mapper itself is accessed
int mapaddr = (m_crus==ASSERT_LINE)? 0x8810 : 0xf870;
@@ -2049,7 +2053,7 @@ uint8_t amigo_device::set_address(offs_t offset)
/*
Read the mapper status bits
*/
-uint8_t amigo_device::read()
+READ8_MEMBER( amigo_device::read )
{
// Read the protection status bits and reset them
uint8_t value = m_protflag;
@@ -2060,7 +2064,7 @@ uint8_t amigo_device::read()
/*
Configure the mapper. This is the only reason to write to the AMIGO.
*/
-void amigo_device::write(uint8_t data)
+WRITE8_MEMBER( amigo_device::write )
{
// Load or save map file
if ((data & 0xf0)==0x00)
@@ -2291,7 +2295,7 @@ oso_device::oso_device(const machine_config &mconfig, const char *tag, device_t
m_hexbus_outbound = nullptr;
}
-uint8_t oso_device::read(offs_t offset)
+READ8_MEMBER( oso_device::read )
{
int value = 0;
offset &= 0x03;
@@ -2327,7 +2331,7 @@ uint8_t oso_device::read(offs_t offset)
return value;
}
-void oso_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( oso_device::write )
{
offset &= 0x03;
switch (offset)
diff --git a/src/devices/bus/ti99/internal/998board.h b/src/devices/bus/ti99/internal/998board.h
index 227a2dc4a7b..c0baf6589df 100644
--- a/src/devices/bus/ti99/internal/998board.h
+++ b/src/devices/bus/ti99/internal/998board.h
@@ -101,6 +101,7 @@ public:
line_state ready();
void treset();
+ DECLARE_READ8_MEMBER( read );
DECLARE_SETADDRESS_DBIN_MEMBER( set_address );
DECLARE_READ_LINE_MEMBER( sprd_out );
@@ -247,7 +248,7 @@ public:
void device_start() override;
void device_reset() override;
- void cruwrite(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER( cruwrite );
DECLARE_SETADDRESS_DBIN_MEMBER( set_address );
// Debugger support
@@ -260,6 +261,7 @@ public:
DECLARE_WRITE_LINE_MEMBER( pmemen_in );
DECLARE_WRITE_LINE_MEMBER( skdrcs_in );
+ DECLARE_READ8_MEMBER( rom1cs_out );
DECLARE_READ_LINE_MEMBER( gromclk_out );
DECLARE_READ_LINE_MEMBER( alccs_out );
@@ -333,9 +335,9 @@ public:
void device_start() override;
void device_reset() override;
- uint8_t read();
- void write(uint8_t data);
- uint8_t set_address(offs_t offset);
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( set_address );
// Debugger support
int get_physical_address_debug(offs_t offset);
@@ -451,8 +453,8 @@ class oso_device : public bus::hexbus::hexbus_chained_device
{
public:
oso_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- uint8_t read(offs_t offset);
- void write(offs_t offset, uint8_t data);
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
void device_start() override;
void hexbus_value_changed(uint8_t data) override;
@@ -539,17 +541,17 @@ public:
mainboard8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// Memory space
- uint8_t read(offs_t offset);
- void write(offs_t offset, uint8_t data);
- uint8_t setoffset(offs_t offset);
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( setoffset );
// Memory space for debugger access
- uint8_t debugger_read(offs_t offset);
- void debugger_write(offs_t offset, uint8_t data);
+ DECLARE_READ8_MEMBER( debugger_read );
+ DECLARE_WRITE8_MEMBER( debugger_write );
// I/O space
DECLARE_READ8Z_MEMBER( crureadz );
- void cruwrite(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER( cruwrite );
// Control lines
DECLARE_WRITE_LINE_MEMBER( clock_in );
@@ -596,6 +598,9 @@ private:
// Mapped physical address.
int m_physical_address;
+ // Hold the address space value so that we can use it in other methods.
+ address_space* m_space;
+
// Indicates that a byte is waiting on the data bus (see m_latched_data)
bool m_pending_write;
diff --git a/src/devices/bus/ti99/internal/datamux.cpp b/src/devices/bus/ti99/internal/datamux.cpp
index f6ba06d99b2..fa1b4de2dad 100644
--- a/src/devices/bus/ti99/internal/datamux.cpp
+++ b/src/devices/bus/ti99/internal/datamux.cpp
@@ -97,6 +97,7 @@ datamux_device::datamux_device(const machine_config &mconfig, const char *tag, d
m_ram16b(*owner, TI99_EXPRAM_TAG),
m_padram(*owner, TI99_PADRAM_TAG),
m_cpu(*owner, "maincpu"),
+ m_spacep(nullptr),
m_ready(*this),
m_addr_buf(0),
m_dbin(CLEAR_LINE),
@@ -117,7 +118,7 @@ datamux_device::datamux_device(const machine_config &mconfig, const char *tag, d
DEVICE ACCESSOR FUNCTIONS
***************************************************************************/
-void datamux_device::read_all(uint16_t addr, uint8_t *value)
+void datamux_device::read_all(address_space& space, uint16_t addr, uint8_t *value)
{
// Valid access
bool validaccess = ((addr & 0x0400)==0);
@@ -135,7 +136,7 @@ void datamux_device::read_all(uint16_t addr, uint8_t *value)
}
}
// GROMport (GROMs)
- m_gromport->readz(addr, value);
+ m_gromport->readz(space, addr, value);
m_grom_idle = false;
}
@@ -143,20 +144,20 @@ void datamux_device::read_all(uint16_t addr, uint8_t *value)
if ((addr & 0xf801)==0x8800)
{
// Forward to VDP unless we have an EVPC
- if (m_video != nullptr) *value = m_video->read(addr>>1); // A14 determines data or register read
+ if (m_video != nullptr) *value = m_video->read(space, addr>>1); // A14 determines data or register read
}
}
// GROMport (ROMs)
- if ((addr & 0xe000)==0x6000) m_gromport->readz(addr, value);
+ if ((addr & 0xe000)==0x6000) m_gromport->readz(space, addr, value);
// I/O port gets all accesses
- m_ioport->readz(addr, value);
+ m_ioport->readz(space, addr, value);
m_ioport->memen_in(CLEAR_LINE);
m_memen_state = CLEAR_LINE;
}
-void datamux_device::write_all(uint16_t addr, uint8_t value)
+void datamux_device::write_all(address_space& space, uint16_t addr, uint8_t value)
{
// GROM access
if ((addr & 0xf801)==0x9800)
@@ -167,12 +168,12 @@ void datamux_device::write_all(uint16_t addr, uint8_t value)
m_grom[i]->write(value);
}
// GROMport
- m_gromport->write(addr, value);
+ m_gromport->write(space, addr, value);
m_grom_idle = false;
}
// Cartridge port and sound
- if ((addr & 0xe000)==0x6000) m_gromport->write(addr, value);
+ if ((addr & 0xe000)==0x6000) m_gromport->write(space, addr, value);
// Only if the sound chip has not been removed
if ((addr & 0xfc01)==0x8400)
@@ -184,16 +185,16 @@ void datamux_device::write_all(uint16_t addr, uint8_t value)
if ((addr & 0xf801)==0x8800)
{
// Forward to VDP unless we have an EVPC
- if (m_video != nullptr) m_video->write(addr>>1, value); // A14 determines data or register write
+ if (m_video != nullptr) m_video->write(space, addr>>1, value); // A14 determines data or register write
}
// I/O port gets all accesses
- m_ioport->write(addr, value);
+ m_ioport->write(space, addr, value);
m_ioport->memen_in(CLEAR_LINE);
m_memen_state = CLEAR_LINE;
}
-void datamux_device::setaddress_all(uint16_t addr)
+void datamux_device::setaddress_all(address_space& space, uint16_t addr)
{
line_state a14 = ((addr & 2)!=0)? ASSERT_LINE : CLEAR_LINE;
@@ -226,7 +227,7 @@ void datamux_device::setaddress_all(uint16_t addr)
// I/O port gets all accesses
m_memen_state = ASSERT_LINE;
m_ioport->memen_in(m_memen_state);
- m_ioport->setaddress_dbin(addr, m_dbin);
+ m_ioport->setaddress_dbin(space, addr, m_dbin);
}
/*
@@ -235,7 +236,7 @@ void datamux_device::setaddress_all(uint16_t addr)
mapped devices are excluded because their state would be changed
unpredictably by the debugger access.
*/
-uint16_t datamux_device::debugger_read(uint16_t addr)
+uint16_t datamux_device::debugger_read(address_space& space, uint16_t addr)
{
uint16_t addrb = addr << 1;
uint16_t value = 0;
@@ -266,13 +267,13 @@ uint16_t datamux_device::debugger_read(uint16_t addr)
if ((addrb & 0xe000)==0x6000)
{
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->readz(addrb+1, &lval);
- m_gromport->readz(addrb, &hval);
+ m_gromport->readz(space, addrb+1, &lval);
+ m_gromport->readz(space, addrb, &hval);
m_gromport->romgq_line(m_romgq_state); // reset to previous state
}
m_ioport->memen_in(ASSERT_LINE);
- m_ioport->readz(addrb+1, &lval);
- m_ioport->readz(addrb, &hval);
+ m_ioport->readz(space, addrb+1, &lval);
+ m_ioport->readz(space, addrb, &hval);
m_ioport->memen_in(m_memen_state); // reset to previous state
value = ((hval << 8)&0xff00) | (lval & 0xff);
}
@@ -281,7 +282,7 @@ uint16_t datamux_device::debugger_read(uint16_t addr)
return value;
}
-void datamux_device::debugger_write(uint16_t addr, uint16_t data)
+void datamux_device::debugger_write(address_space& space, uint16_t addr, uint16_t data)
{
uint16_t addrb = addr << 1;
@@ -311,14 +312,14 @@ void datamux_device::debugger_write(uint16_t addr, uint16_t data)
if ((addrb & 0xe000)==0x6000)
{
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->write(addr+1, data & 0xff);
- m_gromport->write(addr, (data>>8) & 0xff);
+ m_gromport->write(space, addr+1, data & 0xff);
+ m_gromport->write(space, addr, (data>>8) & 0xff);
m_gromport->romgq_line(m_romgq_state); // reset to previous state
}
m_ioport->memen_in(ASSERT_LINE);
- m_ioport->write(addr+1, data & 0xff);
- m_ioport->write(addr, (data>>8) & 0xff);
+ m_ioport->write(space, addr+1, data & 0xff);
+ m_ioport->write(space, addr, (data>>8) & 0xff);
m_ioport->memen_in(m_memen_state); // reset to previous state
}
}
@@ -329,16 +330,16 @@ void datamux_device::debugger_write(uint16_t addr, uint16_t data)
accesses must not occur within the loop. So we have one access on the bus,
a delay, and then the second access.
- mem_mask is irrelevant for TMS processors (cannot control bus width)
+ mem_mask is always ffff on TMS processors (cannot control bus width)
*/
-uint16_t datamux_device::read(offs_t offset)
+READ16_MEMBER( datamux_device::read )
{
uint16_t value = 0;
// Care for debugger
if (machine().side_effects_disabled())
{
- return debugger_read(offset);
+ return debugger_read(space, offset);
}
// Addresses below 0x2000 are ROM (no wait states)
@@ -370,7 +371,7 @@ uint16_t datamux_device::read(offs_t offset)
// The byte from the odd address has already been read into the latch
// Reading the even address now (addr)
uint8_t hbyte = 0;
- read_all(m_addr_buf, &hbyte);
+ read_all(space, m_addr_buf, &hbyte);
LOGMASKED(LOG_ACCESS, "Read even byte from address %04x -> %02x\n", m_addr_buf, hbyte);
value = (hbyte<<8) | m_latch;
@@ -383,11 +384,11 @@ uint16_t datamux_device::read(offs_t offset)
/*
Write access.
*/
-void datamux_device::write(offs_t offset, uint16_t data)
+WRITE16_MEMBER( datamux_device::write )
{
if (machine().side_effects_disabled())
{
- debugger_write(offset, data);
+ debugger_write(space, offset, data);
return;
}
@@ -419,7 +420,7 @@ void datamux_device::write(offs_t offset, uint16_t data)
// write odd byte
LOGMASKED(LOG_ACCESS, "Write odd byte to address %04x <- %02x\n", m_addr_buf+1, data & 0xff);
- write_all(m_addr_buf+1, data & 0xff);
+ write_all(space, m_addr_buf+1, data & 0xff);
}
}
@@ -427,7 +428,7 @@ void datamux_device::write(offs_t offset, uint16_t data)
Called when the memory access starts by setting the address bus. From that
point on, we suspend the CPU until all operations are done.
*/
-uint8_t datamux_device::setoffset(offs_t offset)
+READ8_MEMBER( datamux_device::setoffset )
{
m_addr_buf = offset;
m_waitcount = 0;
@@ -463,7 +464,7 @@ uint8_t datamux_device::setoffset(offs_t offset)
{
// propagate the setaddress operation
// First the odd address
- setaddress_all(m_addr_buf+1);
+ setaddress_all(space, m_addr_buf+1);
m_muxready = CLEAR_LINE;
ready_join();
}
@@ -501,10 +502,10 @@ WRITE_LINE_MEMBER( datamux_device::clock_in )
if (m_waitcount==2)
{
// read odd byte
- read_all(m_addr_buf+1, &m_latch);
+ read_all(*m_spacep, m_addr_buf+1, &m_latch);
LOGMASKED(LOG_ACCESS, "Read odd byte from address %04x -> %02x\n", m_addr_buf+1, m_latch);
// do the setaddress for the even address
- setaddress_all(m_addr_buf);
+ setaddress_all(*m_spacep, m_addr_buf);
}
}
}
@@ -523,10 +524,10 @@ WRITE_LINE_MEMBER( datamux_device::clock_in )
if (m_waitcount==2)
{
// do the setaddress for the even address
- setaddress_all(m_addr_buf);
+ setaddress_all(*m_spacep, m_addr_buf);
// write even byte
LOGMASKED(LOG_ACCESS, "Write even byte to address %04x <- %02x\n", m_addr_buf, m_latch);
- write_all(m_addr_buf, m_latch);
+ write_all(*m_spacep, m_addr_buf, m_latch);
}
}
}
@@ -614,6 +615,10 @@ void datamux_device::device_reset(void)
m_latch = 0;
m_dbin = CLEAR_LINE;
+
+ // Get the pointer to the address space already here, because we cannot
+ // save that pointer to a savestate, and we need it on restore
+ m_spacep = &m_cpu->space(AS_PROGRAM);
}
void datamux_device::device_config_complete()
diff --git a/src/devices/bus/ti99/internal/datamux.h b/src/devices/bus/ti99/internal/datamux.h
index 6c36c7f8963..4ddc39e09e6 100644
--- a/src/devices/bus/ti99/internal/datamux.h
+++ b/src/devices/bus/ti99/internal/datamux.h
@@ -33,9 +33,9 @@ class datamux_device : public device_t
{
public:
datamux_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- uint16_t read(offs_t offset);
- void write(offs_t offset, uint16_t data);
- uint8_t setoffset(offs_t offset);
+ DECLARE_READ16_MEMBER( read );
+ DECLARE_WRITE16_MEMBER( write );
+ DECLARE_READ8_MEMBER( setoffset );
DECLARE_WRITE_LINE_MEMBER( clock_in );
DECLARE_WRITE_LINE_MEMBER( dbin_in );
@@ -75,6 +75,9 @@ private:
// Link to the CPU
required_device<cpu_device> m_cpu;
+ // Keeps the address space pointer
+ address_space* m_spacep;
+
// Console ROM
uint16_t* m_consolerom;
@@ -82,17 +85,17 @@ private:
tmc0430_device* m_grom[3];
// Common read routine
- void read_all(uint16_t addr, uint8_t *target);
+ void read_all(address_space& space, uint16_t addr, uint8_t *target);
// Common write routine
- void write_all(uint16_t addr, uint8_t value);
+ void write_all(address_space& space, uint16_t addr, uint8_t value);
// Common set address method
- void setaddress_all(uint16_t addr);
+ void setaddress_all(address_space& space, uint16_t addr);
// Debugger access
- uint16_t debugger_read(uint16_t addr);
- void debugger_write(uint16_t addr, uint16_t data);
+ uint16_t debugger_read(address_space& space, uint16_t addr);
+ void debugger_write(address_space& space, uint16_t addr, uint16_t data);
// Join own READY and external READY
void ready_join();
diff --git a/src/devices/bus/ti99/internal/genboard.cpp b/src/devices/bus/ti99/internal/genboard.cpp
index dd9ab0ee3db..861e0655200 100644
--- a/src/devices/bus/ti99/internal/genboard.cpp
+++ b/src/devices/bus/ti99/internal/genboard.cpp
@@ -329,7 +329,7 @@ INPUT_CHANGED_MEMBER( genmod_mapper_device::setgm_changed )
within the gate array. Unlike with real GROMs, no address wrapping occurs,
and the complete 64K space is available.
*/
-uint8_t geneve_mapper_device::read_grom(offs_t offset)
+READ8_MEMBER( geneve_mapper_device::read_grom )
{
uint8_t reply;
if (offset & 0x0002)
@@ -364,7 +364,7 @@ uint8_t geneve_mapper_device::read_grom(offs_t offset)
Simulates GROM. The real Geneve does not use GROMs but simulates them
within the gate array.
*/
-void geneve_mapper_device::write_grom(offs_t offset, uint8_t data)
+WRITE8_MEMBER( geneve_mapper_device::write_grom )
{
if (offset & 0x0002)
{
@@ -468,7 +468,7 @@ void geneve_mapper_device::set_extra_waitstates(bool wait)
SETOFFSET method, and we re-use the values stored there to quickly
access the appropriate component.
*/
-uint8_t geneve_mapper_device::readm(offs_t offset)
+READ8_MEMBER( geneve_mapper_device::readm )
{
uint8_t value = 0;
@@ -492,7 +492,7 @@ uint8_t geneve_mapper_device::readm(offs_t offset)
if (dec->function == MBOX)
{
m_peribox->memen_in(ASSERT_LINE);
- m_peribox->setaddress_dbin(dec->physaddr, true);
+ m_peribox->setaddress_dbin(space, dec->physaddr, true);
}
}
else
@@ -509,7 +509,7 @@ uint8_t geneve_mapper_device::readm(offs_t offset)
case MLVIDEO:
if (!machine().side_effects_disabled())
{
- value = m_video->read(dec->offset>>1);
+ value = m_video->read(space, dec->offset>>1);
LOGMASKED(LOG_READ, "Read video %04x -> %02x\n", dec->offset, value);
// Video wait states are created *after* the access
// Accordingly, they have no effect when execution is in onchip RAM
@@ -538,7 +538,7 @@ uint8_t geneve_mapper_device::readm(offs_t offset)
// Needs more investigation. We might as well ignore this,
// as the high nibble is obviously undefined and takes some past
// value floating around.
- value = m_clock->read(dec->offset & 0x000f);
+ value = m_clock->read(space, dec->offset & 0x000f);
if (m_geneve_mode) value |= 0xf0;
else value |= ((dec->offset & 0x000f)==0x000f)? 0x20 : 0x10;
LOGMASKED(LOG_READ, "Read clock %04x -> %02x\n", dec->offset, value);
@@ -548,7 +548,7 @@ uint8_t geneve_mapper_device::readm(offs_t offset)
// grom simulation
// ++++ ++-- ---- ---+
// 1001 1000 0000 00x0
- if (!machine().side_effects_disabled()) value = read_grom(dec->offset);
+ if (!machine().side_effects_disabled()) value = read_grom(space, dec->offset, 0xff);
LOGMASKED(LOG_READ, "Read GROM %04x -> %02x\n", dec->offset, value);
break;
@@ -571,7 +571,7 @@ uint8_t geneve_mapper_device::readm(offs_t offset)
case MPEPROM:
// 1 111. ..xx xxxx xxxx xxxx on-board eprom (16K)
// mirrored for f0, f2, f4, ...; f1, f3, f5, ...
- value = boot_rom(dec->physaddr);
+ value = boot_rom(space, dec->physaddr, 0xff);
break;
case MPSRAM:
@@ -593,7 +593,7 @@ uint8_t geneve_mapper_device::readm(offs_t offset)
// 0x000000-0x07ffff for the stock Geneve (AMC,AMB,AMA,A0 ...,A15)
// 0x000000-0x1fffff for the GenMod.(AME,AMD,AMC,AMB,AMA,A0 ...,A15)
- m_peribox->readz(dec->physaddr, &value);
+ m_peribox->readz(space, dec->physaddr, &value, 0xff);
m_peribox->memen_in(CLEAR_LINE);
LOGMASKED(LOG_READ, "Read P-Box %04x (%06x) -> %02x\n", dec->offset, dec->physaddr, value);
break;
@@ -605,7 +605,7 @@ uint8_t geneve_mapper_device::readm(offs_t offset)
return value;
}
-void geneve_mapper_device::writem(offs_t offset, uint8_t data)
+WRITE8_MEMBER( geneve_mapper_device::writem )
{
decdata *dec;
decdata debug;
@@ -627,7 +627,7 @@ void geneve_mapper_device::writem(offs_t offset, uint8_t data)
if (dec->function == MBOX)
{
m_peribox->memen_in(ASSERT_LINE);
- m_peribox->setaddress_dbin(dec->physaddr, false);
+ m_peribox->setaddress_dbin(space, dec->physaddr, false);
}
}
else
@@ -650,7 +650,7 @@ void geneve_mapper_device::writem(offs_t offset, uint8_t data)
if (!machine().side_effects_disabled())
{
- m_video->write(dec->offset>>1, data);
+ m_video->write(space, dec->offset>>1, data);
LOGMASKED(LOG_WRITE, "Write video %04x <- %02x\n", offset, data);
// See above
if (m_video_waitstates) set_video_waitcount(15);
@@ -666,7 +666,7 @@ void geneve_mapper_device::writem(offs_t offset, uint8_t data)
case MLCLOCK:
// clock
// ++++ ++++ ++++ ----
- m_clock->write(dec->offset & 0x000f, data);
+ m_clock->write(space, dec->offset & 0x000f, data);
LOGMASKED(LOG_WRITE, "Write clock %04x <- %02x\n", offset, data);
break;
@@ -679,7 +679,7 @@ void geneve_mapper_device::writem(offs_t offset, uint8_t data)
case MLGROM:
// The GROM simulator is only available in TI Mode
- write_grom(dec->offset, data);
+ write_grom(space, dec->offset, data, 0xff);
LOGMASKED(LOG_WRITE, "Write GROM %04x <- %02x\n", offset, data);
break;
@@ -700,7 +700,7 @@ void geneve_mapper_device::writem(offs_t offset, uint8_t data)
// 1 111. ..xx xxxx xxxx xxxx on-board eprom (16K)
// mirrored for f0, f2, f4, ...; f1, f3, f5, ...
// Ignore EPROM write (unless PFM)
- if (m_boot_rom != GENEVE_EPROM) write_to_pfm(dec->physaddr, data);
+ if (m_boot_rom != GENEVE_EPROM) write_to_pfm(space, dec->physaddr, data, 0xff);
else
LOGMASKED(LOG_WARN, "Write EPROM %04x (%06x) <- %02x, ignored\n", offset, dec->physaddr, data);
break;
@@ -720,7 +720,7 @@ void geneve_mapper_device::writem(offs_t offset, uint8_t data)
case MBOX:
// Route everything else to the P-Box
LOGMASKED(LOG_WRITE, "Write P-Box %04x (%06x) <- %02x\n", offset, dec->physaddr, data);
- m_peribox->write(dec->physaddr, data);
+ m_peribox->write(space, dec->physaddr, data, 0xff);
m_peribox->memen_in(CLEAR_LINE);
break;
@@ -854,7 +854,7 @@ void genmod_mapper_device::decode_mod(geneve_mapper_device::decdata* dec)
/*
Boot ROM handling, from EPROM or PFM.
*/
-uint8_t geneve_mapper_device::boot_rom(offs_t offset)
+READ8_MEMBER( geneve_mapper_device::boot_rom )
{
uint8_t value;
int pfmaddress = (offset & 0x01ffff) | (m_pfm_bank<<17);
@@ -866,10 +866,10 @@ uint8_t geneve_mapper_device::boot_rom(offs_t offset)
LOGMASKED(LOG_READ, "Read EPROM %04x -> %02x\n", offset & 0x003fff, value);
return value;
case GENEVE_PFM512:
- value = m_pfm512->read(pfmaddress);
+ value = m_pfm512->read(space, pfmaddress, mem_mask);
break;
case GENEVE_PFM512A:
- value = m_pfm512a->read(pfmaddress);
+ value = m_pfm512a->read(space, pfmaddress, mem_mask);
break;
default:
LOGMASKED(LOG_WARN, "Illegal mode for reading boot ROM: %d\n", m_boot_rom);
@@ -881,7 +881,7 @@ uint8_t geneve_mapper_device::boot_rom(offs_t offset)
return value;
}
-void geneve_mapper_device::write_to_pfm(offs_t offset, uint8_t data)
+WRITE8_MEMBER( geneve_mapper_device::write_to_pfm )
{
// Nota bene: The PFM must be write protected on startup, or the RESET
// of the 9995 will attempt to write the return vector into the flash EEPROM
@@ -891,10 +891,10 @@ void geneve_mapper_device::write_to_pfm(offs_t offset, uint8_t data)
switch (m_boot_rom)
{
case GENEVE_PFM512:
- m_pfm512->write(address, data);
+ m_pfm512->write(space, address, data, mem_mask);
break;
case GENEVE_PFM512A:
- m_pfm512a->write(address, data);
+ m_pfm512a->write(space, address, data, mem_mask);
break;
default:
LOGMASKED(LOG_WARN, "Illegal mode for writing to PFM: %d\n", m_boot_rom);
@@ -907,7 +907,7 @@ void geneve_mapper_device::write_to_pfm(offs_t offset, uint8_t data)
This decoding will later be used in the READ/WRITE member functions. Also,
we initiate wait state creation here.
*/
-uint8_t geneve_mapper_device::setoffset(offs_t offset)
+READ8_MEMBER( geneve_mapper_device::setoffset )
{
LOGMASKED(LOG_DETAIL, "setoffset = %04x\n", offset);
m_debug_no_ws = false;
@@ -926,7 +926,7 @@ uint8_t geneve_mapper_device::setoffset(offs_t offset)
if (m_decoded.function == MBOX)
{
m_peribox->memen_in(ASSERT_LINE);
- m_peribox->setaddress_dbin(m_decoded.physaddr, m_read_mode);
+ m_peribox->setaddress_dbin(space, m_decoded.physaddr, m_read_mode);
}
return 0;
}
diff --git a/src/devices/bus/ti99/internal/genboard.h b/src/devices/bus/ti99/internal/genboard.h
index baccf7463a9..875f9f8bd51 100644
--- a/src/devices/bus/ti99/internal/genboard.h
+++ b/src/devices/bus/ti99/internal/genboard.h
@@ -121,9 +121,9 @@ public:
void set_video_waitstates(bool wait);
void set_extra_waitstates(bool wait);
- uint8_t readm(offs_t offset);
- void writem(offs_t offset, uint8_t data);
- uint8_t setoffset(offs_t offset);
+ DECLARE_READ8_MEMBER( readm );
+ DECLARE_WRITE8_MEMBER( writem );
+ DECLARE_READ8_MEMBER( setoffset );
DECLARE_INPUT_CHANGED_MEMBER( settings_changed );
@@ -147,8 +147,8 @@ protected:
bool m_gromwaddr_LSB;
bool m_gromraddr_LSB;
int m_grom_address;
- uint8_t read_grom(offs_t offset);
- void write_grom(offs_t offset, uint8_t data);
+ DECLARE_READ8_MEMBER( read_grom );
+ DECLARE_WRITE8_MEMBER( write_grom );
// wait states
void set_wait(int min);
@@ -256,8 +256,8 @@ protected:
virtual void decode_mod(decdata* dec) { };
// PFM mod (0 = none, 1 = AT29C040, 2 = AT29C040A)
- uint8_t boot_rom(offs_t offset);
- void write_to_pfm(offs_t offset, uint8_t data);
+ DECLARE_READ8_MEMBER( boot_rom );
+ DECLARE_WRITE8_MEMBER( write_to_pfm );
int m_boot_rom;
int m_pfm_bank;
bool m_pfm_output_enable;
diff --git a/src/devices/bus/ti99/internal/ioport.cpp b/src/devices/bus/ti99/internal/ioport.cpp
index a855fd3bf41..3e769086141 100644
--- a/src/devices/bus/ti99/internal/ioport.cpp
+++ b/src/devices/bus/ti99/internal/ioport.cpp
@@ -96,31 +96,31 @@ ioport_device::ioport_device(const machine_config &mconfig, const char *tag, dev
READ8Z_MEMBER(ioport_device::readz)
{
if (m_connected != nullptr)
- m_connected->readz(offset, value);
+ m_connected->readz(space, offset, value);
}
-void ioport_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ioport_device::write)
{
if (m_connected != nullptr)
- m_connected->write(offset, data);
+ m_connected->write(space, offset, data);
}
SETADDRESS_DBIN_MEMBER(ioport_device::setaddress_dbin)
{
if (m_connected != nullptr)
- m_connected->setaddress_dbin(offset, state);
+ m_connected->setaddress_dbin(space, offset, state);
}
READ8Z_MEMBER(ioport_device::crureadz)
{
if (m_connected != nullptr)
- m_connected->crureadz(offset, value);
+ m_connected->crureadz(space, offset, value);
}
-void ioport_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ioport_device::cruwrite)
{
if (m_connected != nullptr)
- m_connected->cruwrite(offset, data);
+ m_connected->cruwrite(space, offset, data);
}
WRITE_LINE_MEMBER(ioport_device::memen_in)
diff --git a/src/devices/bus/ti99/internal/ioport.h b/src/devices/bus/ti99/internal/ioport.h
index 6b468007eda..aa30c51da77 100644
--- a/src/devices/bus/ti99/internal/ioport.h
+++ b/src/devices/bus/ti99/internal/ioport.h
@@ -29,14 +29,14 @@ public:
{ }
// Methods called from the console / ioport
- virtual DECLARE_READ8Z_MEMBER( readz ) { }
- virtual void write(offs_t offset, uint8_t data) { }
- virtual DECLARE_SETADDRESS_DBIN_MEMBER( setaddress_dbin ) { }
- virtual DECLARE_READ8Z_MEMBER( crureadz ) { }
- virtual void cruwrite(offs_t offset, uint8_t data) { }
- virtual DECLARE_WRITE_LINE_MEMBER( memen_in ) { }
- virtual DECLARE_WRITE_LINE_MEMBER( msast_in ) { }
- virtual DECLARE_WRITE_LINE_MEMBER( clock_in ) { }
+ virtual DECLARE_READ8Z_MEMBER( readz ) { };
+ virtual DECLARE_WRITE8_MEMBER( write ) { };
+ virtual DECLARE_SETADDRESS_DBIN_MEMBER( setaddress_dbin ) { };
+ virtual DECLARE_READ8Z_MEMBER( crureadz ) { };
+ virtual DECLARE_WRITE8_MEMBER( cruwrite ) { };
+ virtual DECLARE_WRITE_LINE_MEMBER( memen_in ) { };
+ virtual DECLARE_WRITE_LINE_MEMBER( msast_in ) { };
+ virtual DECLARE_WRITE_LINE_MEMBER( clock_in ) { };
void set_ioport(ioport_device* ioport) { m_ioport = ioport; }
@@ -71,10 +71,10 @@ public:
// Methods called from the console
DECLARE_READ8Z_MEMBER( readz );
- void write(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER( write );
DECLARE_SETADDRESS_DBIN_MEMBER( setaddress_dbin );
DECLARE_READ8Z_MEMBER( crureadz );
- void cruwrite(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER( cruwrite );
DECLARE_WRITE_LINE_MEMBER( memen_in );
DECLARE_WRITE_LINE_MEMBER( msast_in );
DECLARE_WRITE_LINE_MEMBER( clock_in );
diff --git a/src/devices/bus/ti99/joyport/handset.cpp b/src/devices/bus/ti99/joyport/handset.cpp
index 829b5bca087..304cdffe239 100644
--- a/src/devices/bus/ti99/joyport/handset.cpp
+++ b/src/devices/bus/ti99/joyport/handset.cpp
@@ -38,6 +38,7 @@
#include "emu.h"
#include "handset.h"
+#include "machine/tms9901.h"
#define LOG_WARN (1U<<1) // Warnings
#define LOG_CONFIG (1U<<2) // Configuration
diff --git a/src/devices/bus/ti99/peb/bwg.cpp b/src/devices/bus/ti99/peb/bwg.cpp
index f2a23fea518..c7aa2c903b7 100644
--- a/src/devices/bus/ti99/peb/bwg.cpp
+++ b/src/devices/bus/ti99/peb/bwg.cpp
@@ -228,7 +228,7 @@ READ8Z_MEMBER(snug_bwg_device::readz)
if (m_RTCsel)
{
// .... ..11 111x xxx0
- *value = m_clock->read((m_address & 0x001e) >> 1);
+ *value = m_clock->read(space, (m_address & 0x001e) >> 1);
LOGMASKED(LOG_RW, "read RTC: %04x -> %02x\n", m_address & 0xffff, *value);
}
else
@@ -275,7 +275,7 @@ READ8Z_MEMBER(snug_bwg_device::readz)
5c00 - 5fdf: RAM
5fe0 - 5fff: Clock (even addr)
*/
-void snug_bwg_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(snug_bwg_device::write)
{
if (machine().side_effects_disabled())
{
@@ -293,7 +293,7 @@ void snug_bwg_device::write(offs_t offset, uint8_t data)
{
// .... ..11 111x xxx0
LOGMASKED(LOG_RW, "write RTC: %04x <- %02x\n", m_address & 0xffff, data);
- m_clock->write((m_address & 0x001e) >> 1, data);
+ m_clock->write(space, (m_address & 0x001e) >> 1, data);
}
else
{
@@ -338,7 +338,7 @@ READ8Z_MEMBER(snug_bwg_device::crureadz)
if ((offset & 0xff00)==m_cru_base)
{
- if ((offset & 0x00f0)==0)
+ if ((offset & 0x00ff)==0)
{
// Check what drives are not connected
reply = ((m_floppy[0] != nullptr)? 0 : 0x02) // DSK1
@@ -355,7 +355,7 @@ READ8Z_MEMBER(snug_bwg_device::crureadz)
reply |= (m_dip34 << 6);
// Invert all
- *value = ~BIT(reply, (offset >> 1) & 7);
+ *value = ~reply;
}
else
*value = 0;
@@ -363,7 +363,7 @@ READ8Z_MEMBER(snug_bwg_device::crureadz)
}
}
-void snug_bwg_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(snug_bwg_device::cruwrite)
{
// int drive, drivebit;
diff --git a/src/devices/bus/ti99/peb/bwg.h b/src/devices/bus/ti99/peb/bwg.h
index 2a53f45c75b..a25d844a563 100644
--- a/src/devices/bus/ti99/peb/bwg.h
+++ b/src/devices/bus/ti99/peb/bwg.h
@@ -30,11 +30,11 @@ public:
snug_bwg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
protected:
void device_start() override;
diff --git a/src/devices/bus/ti99/peb/evpc.cpp b/src/devices/bus/ti99/peb/evpc.cpp
index 6b17d75ef74..fc5591112d5 100644
--- a/src/devices/bus/ti99/peb/evpc.cpp
+++ b/src/devices/bus/ti99/peb/evpc.cpp
@@ -213,7 +213,7 @@ READ8Z_MEMBER(snug_enhanced_video_device::readz)
if (m_video_accessed)
{
- *value = m_video->read(m_address>>1);
+ *value = m_video->read(space, m_address>>1);
}
}
@@ -223,7 +223,7 @@ READ8Z_MEMBER(snug_enhanced_video_device::readz)
0x5f00 - 0x5fef NOVRAM
0x5ff0 - 0x5fff Palette (5ff8, 5ffa, 5ffc, 5ffe)
*/
-void snug_enhanced_video_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(snug_enhanced_video_device::write)
{
if (m_selected && m_inDsrArea)
{
@@ -296,7 +296,7 @@ void snug_enhanced_video_device::write(offs_t offset, uint8_t data)
if (m_video_accessed)
{
- m_video->write(m_address>>1, data);
+ m_video->write(space, m_address>>1, data);
}
if (m_sound_accessed)
@@ -323,9 +323,8 @@ READ8Z_MEMBER(snug_enhanced_video_device::crureadz)
{
if ((offset & 0x00f0)==0) // offset 0 delivers bits 0-7 (address 00-0f)
{
- uint8_t p = ~(ioport("EVPC-SW1")->read() | (ioport("EVPC-SW3")->read()<<2)
+ *value = ~(ioport("EVPC-SW1")->read() | (ioport("EVPC-SW3")->read()<<2)
| (ioport("EVPC-SW4")->read()<<3) | (ioport("EVPC-SW8")->read()<<7));
- *value = BIT(p, (offset >> 1) & 7);
}
}
}
@@ -341,7 +340,7 @@ READ8Z_MEMBER(snug_enhanced_video_device::crureadz)
Bit 6: -
Bit 7: -
*/
-void snug_enhanced_video_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(snug_enhanced_video_device::cruwrite)
{
if ((offset & 0xff00)==EVPC_CRU_BASE)
{
diff --git a/src/devices/bus/ti99/peb/evpc.h b/src/devices/bus/ti99/peb/evpc.h
index 2e89c2fa405..a52e73b963c 100644
--- a/src/devices/bus/ti99/peb/evpc.h
+++ b/src/devices/bus/ti99/peb/evpc.h
@@ -32,11 +32,11 @@ class snug_enhanced_video_device : public device_t, public device_ti99_peribox_c
public:
snug_enhanced_video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
TIMER_DEVICE_CALLBACK_MEMBER( hblank_interrupt );
diff --git a/src/devices/bus/ti99/peb/hfdc.cpp b/src/devices/bus/ti99/peb/hfdc.cpp
index 6a9a89726b2..97ac8d403ab 100644
--- a/src/devices/bus/ti99/peb/hfdc.cpp
+++ b/src/devices/bus/ti99/peb/hfdc.cpp
@@ -223,14 +223,14 @@ READ8Z_MEMBER(myarc_hfdc_device::readz)
if (m_HDCsel)
{
- *value = m_hdc9234->read((m_address>>2)&1);
+ *value = m_hdc9234->read(space, (m_address>>2)&1, 0xff);
LOGMASKED(LOG_COMP, "%04x[HDC] -> %02x\n", m_address & 0xffff, *value);
return;
}
if (m_RTCsel)
{
- *value = m_clock->read((m_address & 0x001e) >> 1);
+ *value = m_clock->read(space, (m_address & 0x001e) >> 1);
LOGMASKED(LOG_COMP, "%04x[CLK] -> %02x\n", m_address & 0xffff, *value);
return;
}
@@ -278,7 +278,7 @@ READ8Z_MEMBER(myarc_hfdc_device::readz)
0x5800 - 0x5bff static RAM page any of 32 pages
0x5c00 - 0x5fff static RAM page any of 32 pages
*/
-void myarc_hfdc_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( myarc_hfdc_device::write )
{
if (machine().side_effects_disabled())
{
@@ -297,14 +297,14 @@ void myarc_hfdc_device::write(offs_t offset, uint8_t data)
if (m_HDCsel)
{
LOGMASKED(LOG_COMP, "%04x[HDC] <- %02x\n", m_address & 0xffff, data);
- m_hdc9234->write((m_address>>2)&1, data);
+ m_hdc9234->write(space, (m_address>>2)&1, data, 0xff);
return;
}
if (m_RTCsel)
{
LOGMASKED(LOG_COMP, "%04x[CLK] <- %02x\n", m_address & 0xffff, data);
- m_clock->write((m_address & 0x001e) >> 1, data);
+ m_clock->write(space, (m_address & 0x001e) >> 1, data);
return;
}
@@ -376,7 +376,7 @@ READ8Z_MEMBER(myarc_hfdc_device::crureadz)
uint8_t reply;
if ((offset & 0xff00)==m_cru_base)
{
- if ((offset & 0x00f0)==0) // CRU bits 0-7
+ if ((offset & 0x00ff)==0) // CRU bits 0-7
{
if (m_see_switches)
{
@@ -390,7 +390,7 @@ READ8Z_MEMBER(myarc_hfdc_device::crureadz)
if (!m_motor_running) reply |= 0x04;
if (m_wait_for_hd1) reply |= 0x08;
}
- *value = BIT(reply, (offset >> 1) & 7);
+ *value = reply;
}
else // CRU bits 8+
{
@@ -425,7 +425,7 @@ READ8Z_MEMBER(myarc_hfdc_device::crureadz)
HFDC manual p. 43
*/
-void myarc_hfdc_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(myarc_hfdc_device::cruwrite)
{
if ((offset & 0xff00)==m_cru_base)
{
@@ -627,7 +627,7 @@ void myarc_hfdc_device::signal_drive_status()
(1,0) = OUTPUT1
(1,1) = OUTPUT2
*/
-void myarc_hfdc_device::auxbus_out(offs_t offset, uint8_t data)
+WRITE8_MEMBER( myarc_hfdc_device::auxbus_out )
{
int index;
switch (offset)
@@ -848,7 +848,7 @@ WRITE_LINE_MEMBER( myarc_hfdc_device::dip_w )
/*
Read a byte from the onboard SRAM. This is called from the HDC9234.
*/
-uint8_t myarc_hfdc_device::read_buffer()
+READ8_MEMBER( myarc_hfdc_device::read_buffer )
{
LOGMASKED(LOG_DMA, "Read access to onboard SRAM at %04x\n", m_dma_address);
if (m_dma_address > 0x8000) LOGMASKED(LOG_WARN, "Read access beyond RAM size: %06x\n", m_dma_address);
@@ -860,7 +860,7 @@ uint8_t myarc_hfdc_device::read_buffer()
/*
Write a byte to the onboard SRAM. This is called from the HDC9234.
*/
-void myarc_hfdc_device::write_buffer(uint8_t data)
+WRITE8_MEMBER( myarc_hfdc_device::write_buffer )
{
LOGMASKED(LOG_DMA, "Write access to onboard SRAM at %04x: %02x\n", m_dma_address, data);
if (m_dma_address > 0x8000) LOGMASKED(LOG_WARN, "Write access beyond RAM size: %06x\n", m_dma_address);
diff --git a/src/devices/bus/ti99/peb/hfdc.h b/src/devices/bus/ti99/peb/hfdc.h
index 88648105eb5..1ac9ec925bd 100644
--- a/src/devices/bus/ti99/peb/hfdc.h
+++ b/src/devices/bus/ti99/peb/hfdc.h
@@ -38,10 +38,10 @@ public:
myarc_hfdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
protected:
void device_config_complete() override;
@@ -58,9 +58,9 @@ private:
DECLARE_WRITE_LINE_MEMBER( dmarq_w );
DECLARE_WRITE_LINE_MEMBER( intrq_w );
DECLARE_WRITE_LINE_MEMBER( dip_w );
- void auxbus_out(offs_t offset, uint8_t data);
- uint8_t read_buffer();
- void write_buffer(uint8_t data);
+ DECLARE_WRITE8_MEMBER( auxbus_out );
+ DECLARE_READ8_MEMBER( read_buffer );
+ DECLARE_WRITE8_MEMBER( write_buffer );
DECLARE_FLOPPY_FORMATS( floppy_formats );
diff --git a/src/devices/bus/ti99/peb/horizon.cpp b/src/devices/bus/ti99/peb/horizon.cpp
index fdf4b5f97c1..da5135f70bf 100644
--- a/src/devices/bus/ti99/peb/horizon.cpp
+++ b/src/devices/bus/ti99/peb/horizon.cpp
@@ -219,7 +219,7 @@ READ8Z_MEMBER(horizon_ramdisk_device::readz)
}
}
-void horizon_ramdisk_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(horizon_ramdisk_device::write)
{
// 32K expansion
// According to the manual, "this memory is not affected by the HIDE switch"
@@ -303,7 +303,7 @@ void horizon_ramdisk_device::setbit(int& page, int pattern, bool set)
}
}
-void horizon_ramdisk_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(horizon_ramdisk_device::cruwrite)
{
int size = ioport("HORIZONSIZE")->read();
int split_bit = size + 10;
diff --git a/src/devices/bus/ti99/peb/horizon.h b/src/devices/bus/ti99/peb/horizon.h
index f72e9f109fc..76895f0c586 100644
--- a/src/devices/bus/ti99/peb/horizon.h
+++ b/src/devices/bus/ti99/peb/horizon.h
@@ -26,10 +26,10 @@ class horizon_ramdisk_device : public device_t, public device_ti99_peribox_card_
public:
horizon_ramdisk_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
DECLARE_INPUT_CHANGED_MEMBER( hs_changed );
diff --git a/src/devices/bus/ti99/peb/hsgpl.cpp b/src/devices/bus/ti99/peb/hsgpl.cpp
index 11f40c4d1c8..f9f631726e2 100644
--- a/src/devices/bus/ti99/peb/hsgpl.cpp
+++ b/src/devices/bus/ti99/peb/hsgpl.cpp
@@ -191,7 +191,7 @@ READ8Z_MEMBER(snug_high_speed_gpl_device::crureadz)
/*
Write hsgpl CRU interface
*/
-void snug_high_speed_gpl_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(snug_high_speed_gpl_device::cruwrite)
{
// SuperCart handling - see gromport.c
if (m_supercart_enabled && ((offset & 0xfff0)==SUPERCART_BASE))
@@ -272,46 +272,46 @@ READ8Z_MEMBER(snug_high_speed_gpl_device::readz)
{
if ((offset & 0x7e000)==0x74000)
{
- dsrspace_readz(offset & 0xffff, value);
+ dsrspace_readz(space, offset & 0xffff, value, mem_mask);
}
if ((offset & 0x7e000)==0x76000)
{
- cartspace_readz(offset & 0xffff, value);
+ cartspace_readz(space, offset & 0xffff, value, mem_mask);
}
// 1001 1wbb bbbb bba0
if ((offset & 0x7fc01)==0x79800)
{
- grom_readz(offset & 0xffff, value);
+ grom_readz(space, offset & 0xffff, value, mem_mask);
}
}
/*
Memory write
*/
-void snug_high_speed_gpl_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(snug_high_speed_gpl_device::write)
{
if ((offset & 0x7e000)==0x76000)
{
- cartspace_write(offset & 0xffff, data);
+ cartspace_write(space, offset & 0xffff, data, mem_mask);
}
// 1001 1wbb bbbb bba0
if ((offset & 0x7fc01)==0x79c00)
{
- grom_write(offset & 0xffff, data);
+ grom_write(space, offset & 0xffff, data, mem_mask);
}
}
/*
Specific read access: dsrspace
*/
-void snug_high_speed_gpl_device::dsrspace_readz(offs_t offset, uint8_t* value)
+void snug_high_speed_gpl_device::dsrspace_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask)
{
if (m_dsr_enabled)
{
- *value = m_dsr_eeprom->read((offset & 0x1fff) | (m_dsr_page<<13));
+ *value = m_dsr_eeprom->read(space, (offset & 0x1fff) | (m_dsr_page<<13), mem_mask);
LOGMASKED(LOG_READ, "read dsr %04x[%02x] -> %02x\n", offset, m_dsr_page, *value);
}
}
@@ -319,7 +319,7 @@ void snug_high_speed_gpl_device::dsrspace_readz(offs_t offset, uint8_t* value)
/*
Specific read access: cartspace
*/
-void snug_high_speed_gpl_device::cartspace_readz(offs_t offset, uint8_t* value)
+void snug_high_speed_gpl_device::cartspace_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask)
{
if (!m_card_enabled || m_flash_mode)
{
@@ -329,7 +329,7 @@ void snug_high_speed_gpl_device::cartspace_readz(offs_t offset, uint8_t* value)
if (m_module_bank < 16)
{
- *value = m_rom6_eeprom->read((offset & 0x1fff) | (m_current_bank<<13) | (m_current_grom_port<<15));
+ *value = m_rom6_eeprom->read(space, (offset & 0x1fff) | (m_current_bank<<13) | (m_current_grom_port<<15), mem_mask);
LOGMASKED(LOG_READ, "cartridge space read %04x -> %02x\n", offset, *value);
}
else
@@ -351,7 +351,7 @@ void snug_high_speed_gpl_device::cartspace_readz(offs_t offset, uint8_t* value)
it here - which is indeed closer to reality, since the real HSGPL also
emulates GROM instead of using proper ones.
*/
-void snug_high_speed_gpl_device::grom_readz(offs_t offset, uint8_t* value)
+void snug_high_speed_gpl_device::grom_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask)
{
if (machine().side_effects_disabled()) return;
@@ -397,7 +397,7 @@ void snug_high_speed_gpl_device::grom_readz(offs_t offset, uint8_t* value)
{
if (!m_flash_mode)
{
- *value = m_grom_a_eeprom->read(m_grom_address | (port<<16));
+ *value = m_grom_a_eeprom->read(space, m_grom_address | (port<<16), mem_mask);
m_module_bank = port;
if (bNew) LOGMASKED(LOG_PORT, "GROM read access at %04x - switch to bank %d\n", offset & 0xffff, m_module_bank);
}
@@ -406,7 +406,7 @@ void snug_high_speed_gpl_device::grom_readz(offs_t offset, uint8_t* value)
{
if (port < 16)
{
- *value = m_grom_b_eeprom->read(m_grom_address | ((port-8)<<16));
+ *value = m_grom_b_eeprom->read(space, m_grom_address | ((port-8)<<16), mem_mask);
m_module_bank = port;
if (bNew) LOGMASKED(LOG_PORT, "GROM read access at %04x - switch to bank %d\n", offset & 0xffff, m_module_bank);
}
@@ -416,7 +416,7 @@ void snug_high_speed_gpl_device::grom_readz(offs_t offset, uint8_t* value)
{
// 9840-985c
// DSR banks 0-63 (8 KiB per bank, 8 banks per port)
- *value = m_dsr_eeprom->read(m_grom_address | ((port-16)<<16));
+ *value = m_dsr_eeprom->read(space, m_grom_address | ((port-16)<<16), mem_mask);
// Don't change the module port
if (bNew) LOGMASKED(LOG_DSR, "read access to DSR bank %d-%d (%04x)\n", (port-16)<<3, ((port-16)<<3)+7, offset);
}
@@ -427,7 +427,7 @@ void snug_high_speed_gpl_device::grom_readz(offs_t offset, uint8_t* value)
// 9860-987c (ports 24-31)
// Each ROM6 is available as 4 (sub)banks (switchable via 6000, 6002, 6004, 6006)
// Accordingly, each port has two complete sets
- *value = m_rom6_eeprom->read(m_grom_address | ((port-24)<<16));
+ *value = m_rom6_eeprom->read(space, m_grom_address | ((port-24)<<16), mem_mask);
if (bNew) LOGMASKED(LOG_PORT, "ROM6 read access for module bank %d-%d (%04x)\n", (port-24)<<1, ((port-24)<<1)+1, offset & 0xffff);
}
else
@@ -469,7 +469,7 @@ void snug_high_speed_gpl_device::grom_readz(offs_t offset, uint8_t* value)
/*
Specific write access: cartspace
*/
-void snug_high_speed_gpl_device::cartspace_write(offs_t offset, uint8_t data)
+void snug_high_speed_gpl_device::cartspace_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask)
{
if (!m_card_enabled || m_flash_mode)
{
@@ -537,7 +537,7 @@ void snug_high_speed_gpl_device::cartspace_write(offs_t offset, uint8_t data)
/*
Specific write access: grom_write
*/
-void snug_high_speed_gpl_device::grom_write(offs_t offset, uint8_t data)
+void snug_high_speed_gpl_device::grom_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask)
{
if (machine().side_effects_disabled()) return;
@@ -583,7 +583,7 @@ void snug_high_speed_gpl_device::grom_write(offs_t offset, uint8_t data)
{
if (port < 8)
{
- m_grom_a_eeprom->write(m_grom_address | (port<<16), data);
+ m_grom_a_eeprom->write(space, m_grom_address | (port<<16), data, mem_mask);
m_module_bank = port;
if (bNew) LOGMASKED(LOG_PORT, "GROM write access at %04x - switch to bank %d\n", offset & 0xffff, port);
}
@@ -591,7 +591,7 @@ void snug_high_speed_gpl_device::grom_write(offs_t offset, uint8_t data)
{
if (port < 16)
{
- m_grom_b_eeprom->write(m_grom_address | ((port-8)<<16), data);
+ m_grom_b_eeprom->write(space, m_grom_address | ((port-8)<<16), data, mem_mask);
m_module_bank = port;
if (bNew) LOGMASKED(LOG_PORT, "GROM write access at %04x - switch to bank %d\n", offset & 0xffff, port);
}
@@ -599,14 +599,14 @@ void snug_high_speed_gpl_device::grom_write(offs_t offset, uint8_t data)
{
if (port < 24)
{
- m_dsr_eeprom->write(m_grom_address | ((port-16)<<16), data);
+ m_dsr_eeprom->write(space, m_grom_address | ((port-16)<<16), data, mem_mask);
if (bNew) LOGMASKED(LOG_DSR, "write access to DSR bank %d-%d (%04x)\n", (port-16)<<3, ((port-16)<<3)+7, offset);
}
else
{
if (port < 32)
{
- m_rom6_eeprom->write(m_grom_address | ((port-24)<<16), data);
+ m_rom6_eeprom->write(space, m_grom_address | ((port-24)<<16), data, mem_mask);
if (bNew) LOGMASKED(LOG_PORT, "ROM6 write access for module bank %d-%d (%04x)\n", (port-24)<<1, ((port-24)<<1)+1,offset & 0xffff);
}
else
diff --git a/src/devices/bus/ti99/peb/hsgpl.h b/src/devices/bus/ti99/peb/hsgpl.h
index 7248436963f..65cca91a081 100644
--- a/src/devices/bus/ti99/peb/hsgpl.h
+++ b/src/devices/bus/ti99/peb/hsgpl.h
@@ -29,10 +29,10 @@ class snug_high_speed_gpl_device : public device_t, public device_ti99_peribox_c
public:
snug_high_speed_gpl_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
protected:
virtual void device_start() override;
@@ -51,12 +51,12 @@ private:
required_device<ram_device> m_ram6_memory;
required_device<ram_device> m_gram_memory;
- void dsrspace_readz(offs_t offset, uint8_t* value);
- void cartspace_readz(offs_t offset, uint8_t* value);
- void grom_readz(offs_t offset, uint8_t* value);
+ void dsrspace_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask);
+ void cartspace_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask);
+ void grom_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask);
- void cartspace_write(offs_t offset, uint8_t data);
- void grom_write(offs_t offset, uint8_t data);
+ void cartspace_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask);
+ void grom_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask);
bool m_dsr_enabled;
bool m_gram_enabled;
diff --git a/src/devices/bus/ti99/peb/memex.cpp b/src/devices/bus/ti99/peb/memex.cpp
index 3a3116d262d..1d770a9b224 100644
--- a/src/devices/bus/ti99/peb/memex.cpp
+++ b/src/devices/bus/ti99/peb/memex.cpp
@@ -101,7 +101,7 @@ READ8Z_MEMBER( geneve_memex_device::readz )
/*
Memory write
*/
-void geneve_memex_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( geneve_memex_device::write )
{
/* If not Genmod, add the upper two address bits 10 */
if (!m_genmod) offset |= 0x100000;
@@ -152,12 +152,11 @@ INPUT_PORTS_START( memex )
PORT_DIPSETTING( MDIP8, "Lock out pages FC-FF")
INPUT_PORTS_END
-void geneve_memex_device::device_add_mconfig(machine_config &config)
-{
+MACHINE_CONFIG_START(geneve_memex_device::device_add_mconfig)
RAM(config, m_ram, 0);
m_ram->set_default_size("2M");
m_ram->set_default_value(0);
-}
+MACHINE_CONFIG_END
ioport_constructor geneve_memex_device::device_input_ports() const
{
diff --git a/src/devices/bus/ti99/peb/memex.h b/src/devices/bus/ti99/peb/memex.h
index fb7ca27a1ad..3aa44429dc0 100644
--- a/src/devices/bus/ti99/peb/memex.h
+++ b/src/devices/bus/ti99/peb/memex.h
@@ -26,10 +26,10 @@ class geneve_memex_device : public device_t, public device_ti99_peribox_card_int
public:
geneve_memex_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override { }
- void cruwrite(offs_t offset, uint8_t data) override { }
+ DECLARE_WRITE8_MEMBER(cruwrite) override { }
protected:
void device_start() override;
diff --git a/src/devices/bus/ti99/peb/myarcmem.cpp b/src/devices/bus/ti99/peb/myarcmem.cpp
index 79add7a6c72..ccb8f0091cf 100644
--- a/src/devices/bus/ti99/peb/myarcmem.cpp
+++ b/src/devices/bus/ti99/peb/myarcmem.cpp
@@ -101,7 +101,7 @@ READ8Z_MEMBER(myarc_memory_expansion_device::readz)
/*
Memory write access. DSRROM does not allow writing.
*/
-void myarc_memory_expansion_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(myarc_memory_expansion_device::write)
{
int base = get_base(offset);
@@ -142,7 +142,7 @@ READ8Z_MEMBER(myarc_memory_expansion_device::crureadz)
1006 = bit 2 of RAM bank value (512K)
1008 = bit 3 of RAM bank value (512K)
*/
-void myarc_memory_expansion_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(myarc_memory_expansion_device::cruwrite)
{
if (((offset & 0xff00)==MYARCMEM_CRU_BASE1)||((offset & 0xff00)==MYARCMEM_CRU_BASE2))
{
diff --git a/src/devices/bus/ti99/peb/myarcmem.h b/src/devices/bus/ti99/peb/myarcmem.h
index 175b8d60344..3ea9d52419a 100644
--- a/src/devices/bus/ti99/peb/myarcmem.h
+++ b/src/devices/bus/ti99/peb/myarcmem.h
@@ -25,10 +25,10 @@ class myarc_memory_expansion_device : public device_t, public device_ti99_peribo
public:
myarc_memory_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
protected:
void device_start() override;
diff --git a/src/devices/bus/ti99/peb/pcode.cpp b/src/devices/bus/ti99/peb/pcode.cpp
index dbdd7c9f1a9..f0a24ad1646 100644
--- a/src/devices/bus/ti99/peb/pcode.cpp
+++ b/src/devices/bus/ti99/peb/pcode.cpp
@@ -142,7 +142,7 @@ SETADDRESS_DBIN_MEMBER( ti_pcode_card_device::setaddress_dbin )
}
}
-void ti_pcode_card_device::debugger_read(uint16_t offset, uint8_t& value)
+void ti_pcode_card_device::debugger_read(address_space& space, uint16_t offset, uint8_t& value)
{
// The debuger does not call setaddress
if (m_active && ((offset & m_select_mask)==m_select_value))
@@ -160,7 +160,7 @@ READ8Z_MEMBER( ti_pcode_card_device::readz )
// Care for debugger
if (machine().side_effects_disabled())
{
- debugger_read(offset, *value);
+ debugger_read(space, offset, *value);
}
if (m_active && m_inDsrArea && m_selected)
@@ -200,7 +200,7 @@ READ8Z_MEMBER( ti_pcode_card_device::readz )
Write a byte in P-Code ROM space. This is only used for setting the
GROM address.
*/
-void ti_pcode_card_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( ti_pcode_card_device::write )
{
if (machine().side_effects_disabled()) return;
if (m_active && m_isgrom && m_selected)
@@ -253,7 +253,7 @@ READ8Z_MEMBER(ti_pcode_card_device::crureadz)
A8, A13, and A14 so bit 0 is at 0x1f00, but bit 4 is at 0x1f80. Accordingly,
bit 7 would be 0x1f86 but it is not used.
*/
-void ti_pcode_card_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti_pcode_card_device::cruwrite)
{
if ((offset & 0xff00)==CRU_BASE)
m_crulatch->write_bit((offset & 0x80) >> 5 | (offset & 0x06) >> 1, data);
diff --git a/src/devices/bus/ti99/peb/pcode.h b/src/devices/bus/ti99/peb/pcode.h
index 5e7a2cb6ce0..96462dba527 100644
--- a/src/devices/bus/ti99/peb/pcode.h
+++ b/src/devices/bus/ti99/peb/pcode.h
@@ -28,9 +28,9 @@ class ti_pcode_card_device : public device_t, public device_ti99_peribox_card_in
public:
ti_pcode_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
DECLARE_WRITE_LINE_MEMBER(clock_in) override;
@@ -51,7 +51,7 @@ private:
DECLARE_WRITE_LINE_MEMBER(pcpage_w);
DECLARE_WRITE_LINE_MEMBER(ekrpg_w);
- void debugger_read(uint16_t addr, uint8_t& value);
+ void debugger_read(address_space& space, uint16_t addr, uint8_t& value);
required_device_array<tmc0430_device, 8> m_groms;
diff --git a/src/devices/bus/ti99/peb/peribox.cpp b/src/devices/bus/ti99/peb/peribox.cpp
index b75a15a49ed..80da29f6dd4 100644
--- a/src/devices/bus/ti99/peb/peribox.cpp
+++ b/src/devices/bus/ti99/peb/peribox.cpp
@@ -272,15 +272,15 @@ READ8Z_MEMBER(peribox_device::readz)
{
for (int i=2; i <= 8; i++)
{
- if (m_slot[i]!=nullptr) m_slot[i]->readz(offset | m_address_prefix, value);
+ if (m_slot[i]!=nullptr) m_slot[i]->readz(space, offset | m_address_prefix, value, mem_mask);
}
}
-void peribox_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(peribox_device::write)
{
for (int i=2; i <= 8; i++)
{
- if (m_slot[i]!=nullptr) m_slot[i]->write(offset | m_address_prefix, data);
+ if (m_slot[i]!=nullptr) m_slot[i]->write(space, offset | m_address_prefix, data, mem_mask);
}
}
@@ -291,7 +291,7 @@ SETADDRESS_DBIN_MEMBER(peribox_device::setaddress_dbin)
for (int i=2; i <= 8; i++)
{
- if (m_slot[i]!=nullptr) m_slot[i]->setaddress_dbin(offset | m_address_prefix, state);
+ if (m_slot[i]!=nullptr) m_slot[i]->setaddress_dbin(space, offset | m_address_prefix, state);
}
}
@@ -299,15 +299,15 @@ READ8Z_MEMBER(peribox_device::crureadz)
{
for (int i=2; i <= 8; i++)
{
- if (m_slot[i]!=nullptr) m_slot[i]->crureadz(offset, value);
+ if (m_slot[i]!=nullptr) m_slot[i]->crureadz(space, offset, value);
}
}
-void peribox_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(peribox_device::cruwrite)
{
for (int i=2; i <= 8; i++)
{
- if (m_slot[i]!=nullptr) m_slot[i]->cruwrite(offset, data);
+ if (m_slot[i]!=nullptr) m_slot[i]->cruwrite(space, offset, data);
}
}
@@ -647,27 +647,27 @@ peribox_slot_device::peribox_slot_device(const machine_config &mconfig, const ch
READ8Z_MEMBER(peribox_slot_device::readz)
{
- m_card->readz(offset, value);
+ m_card->readz(space, offset, value, mem_mask);
}
-void peribox_slot_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(peribox_slot_device::write)
{
- m_card->write(offset, data);
+ m_card->write(space, offset, data, mem_mask);
}
SETADDRESS_DBIN_MEMBER(peribox_slot_device::setaddress_dbin)
{
- m_card->setaddress_dbin(offset, state);
+ m_card->setaddress_dbin(space, offset, state);
}
READ8Z_MEMBER(peribox_slot_device::crureadz)
{
- m_card->crureadz(offset, value);
+ m_card->crureadz(space, offset, value);
}
-void peribox_slot_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(peribox_slot_device::cruwrite)
{
- m_card->cruwrite(offset, data);
+ m_card->cruwrite(space, offset, data);
}
WRITE_LINE_MEMBER( peribox_slot_device::senila )
diff --git a/src/devices/bus/ti99/peb/peribox.h b/src/devices/bus/ti99/peb/peribox.h
index 405ded3338e..a936a5346ef 100644
--- a/src/devices/bus/ti99/peb/peribox.h
+++ b/src/devices/bus/ti99/peb/peribox.h
@@ -36,11 +36,11 @@ public:
// Next eight methods are called from the console
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
DECLARE_WRITE_LINE_MEMBER(senila);
DECLARE_WRITE_LINE_MEMBER(senilb);
@@ -176,9 +176,9 @@ class device_ti99_peribox_card_interface : public device_slot_card_interface
public:
virtual DECLARE_READ8Z_MEMBER(readz) = 0;
- virtual void write(offs_t offset, uint8_t data) = 0;
+ virtual DECLARE_WRITE8_MEMBER(write) = 0;
virtual DECLARE_READ8Z_MEMBER(crureadz) = 0;
- virtual void cruwrite(offs_t offset, uint8_t data) = 0;
+ virtual DECLARE_WRITE8_MEMBER(cruwrite) = 0;
virtual DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) { };
virtual DECLARE_WRITE_LINE_MEMBER(clock_in) { }
@@ -231,7 +231,7 @@ public:
// Called from the box (direction to card)
DECLARE_READ8Z_MEMBER(readz);
- void write(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER(write);
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin);
DECLARE_WRITE_LINE_MEMBER(senila);
@@ -245,7 +245,7 @@ public:
DECLARE_WRITE_LINE_MEMBER( set_ready );
DECLARE_READ8Z_MEMBER(crureadz);
- void cruwrite(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER(cruwrite);
// called from the box itself
void set_genmod(bool set);
diff --git a/src/devices/bus/ti99/peb/samsmem.cpp b/src/devices/bus/ti99/peb/samsmem.cpp
index dff96b57198..1bc315fed1f 100644
--- a/src/devices/bus/ti99/peb/samsmem.cpp
+++ b/src/devices/bus/ti99/peb/samsmem.cpp
@@ -70,7 +70,7 @@ READ8Z_MEMBER(sams_memory_expansion_device::readz)
}
}
-void sams_memory_expansion_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(sams_memory_expansion_device::write)
{
int base;
@@ -104,7 +104,7 @@ READ8Z_MEMBER(sams_memory_expansion_device::crureadz)
/*
CRU write. Turns on the mapper and allows to change it.
*/
-void sams_memory_expansion_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(sams_memory_expansion_device::cruwrite)
{
if ((offset & 0xff00)==SAMS_CRU_BASE)
m_crulatch->write_bit((offset & 0x000e) >> 1, data);
diff --git a/src/devices/bus/ti99/peb/samsmem.h b/src/devices/bus/ti99/peb/samsmem.h
index da05b58438e..c002252d773 100644
--- a/src/devices/bus/ti99/peb/samsmem.h
+++ b/src/devices/bus/ti99/peb/samsmem.h
@@ -28,10 +28,10 @@ class sams_memory_expansion_device : public device_t, public device_ti99_peribox
public:
sams_memory_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
protected:
void device_start() override;
diff --git a/src/devices/bus/ti99/peb/spchsyn.cpp b/src/devices/bus/ti99/peb/spchsyn.cpp
index b4bcebf3c94..0f10eea1f33 100644
--- a/src/devices/bus/ti99/peb/spchsyn.cpp
+++ b/src/devices/bus/ti99/peb/spchsyn.cpp
@@ -67,14 +67,14 @@ READ8Z_MEMBER( ti_speech_synthesizer_device::readz )
// lines by setting the address bus to a different value, but the
// Geneve may behave differently. This may not 100% reflect the real
// situation, but it ensures a safe processing.
- m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
+ m_vsp->combined_rsq_wsq_w(space, 0, ~0);
}
}
/*
Memory write
*/
-void ti_speech_synthesizer_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( ti_speech_synthesizer_device::write )
{
if (machine().side_effects_disabled()) return;
@@ -92,6 +92,7 @@ SETADDRESS_DBIN_MEMBER( ti_speech_synthesizer_device::setaddress_dbin )
// 1001 00xx xxxx xxx0 DBIN=1
// 1001 01xx xxxx xxx0 DBIN=0
// 1111 1000 0000 0001 mask
+ m_space = &space;
m_reading = (state==ASSERT_LINE);
bool valid = (((offset & 0x0400)==0) == m_reading);
@@ -106,11 +107,11 @@ SETADDRESS_DBIN_MEMBER( ti_speech_synthesizer_device::setaddress_dbin )
// both RS* and WS* are active, which is illegal.
// Alternatively, we'll use the combined settings method
- m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, m_reading ? ~tms5220_device::RS : ~tms5220_device::WS);
+ m_vsp->combined_rsq_wsq_w(space, 0, m_reading ? ~tms5220_device::RS : ~tms5220_device::WS);
}
else
// If other address, turn off RS* and WS* (negative logic!)
- m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
+ m_vsp->combined_rsq_wsq_w(space, 0, ~0);
}
/****************************************************************************/
@@ -125,11 +126,13 @@ WRITE_LINE_MEMBER( ti_speech_synthesizer_device::speech_ready )
if ((state==0) && !m_reading)
// Clear the lines only when we are done with writing.
- m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
+ m_vsp->combined_rsq_wsq_w(*m_space, 0, ~0);
}
void ti_speech_synthesizer_device::device_start()
{
+ // We don't need to save m_space because the calling method
+ // combined_rsq_wsq_w only needs the address space formally.
save_item(NAME(m_reading));
save_item(NAME(m_sbe));
}
diff --git a/src/devices/bus/ti99/peb/spchsyn.h b/src/devices/bus/ti99/peb/spchsyn.h
index 8efee71aed7..35bf0f680e8 100644
--- a/src/devices/bus/ti99/peb/spchsyn.h
+++ b/src/devices/bus/ti99/peb/spchsyn.h
@@ -26,11 +26,11 @@ class ti_speech_synthesizer_device : public device_t, public device_ti99_peribox
public:
ti_speech_synthesizer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
DECLARE_READ8Z_MEMBER(crureadz) override { }
- void cruwrite(offs_t offset, uint8_t data) override { }
+ DECLARE_WRITE8_MEMBER(cruwrite) override { }
protected:
virtual void device_start() override;
@@ -41,6 +41,7 @@ protected:
private:
DECLARE_WRITE_LINE_MEMBER( speech_ready );
+ address_space* m_space;
required_device<cd2501e_device> m_vsp;
bool m_reading;
bool m_sbe; // Signal "Speech block enable"
diff --git a/src/devices/bus/ti99/peb/ti_32kmem.cpp b/src/devices/bus/ti99/peb/ti_32kmem.cpp
index b25c7d65784..fce434c70d7 100644
--- a/src/devices/bus/ti99/peb/ti_32kmem.cpp
+++ b/src/devices/bus/ti99/peb/ti_32kmem.cpp
@@ -82,7 +82,7 @@ READ8Z_MEMBER(ti_32k_expcard_device::readz)
}
}
-void ti_32k_expcard_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti_32k_expcard_device::write)
{
bool select = ((offset & 0xfc000)==0x7c000) | ((offset & 0xf6000)==0x72000); // PAL output pin 14 [1]
@@ -100,11 +100,10 @@ void ti_32k_expcard_device::device_start()
{
}
-void ti_32k_expcard_device::device_add_mconfig(machine_config &config)
-{
+MACHINE_CONFIG_START(ti_32k_expcard_device::device_add_mconfig)
RAM(config, m_ram, 0);
m_ram->set_default_size("32k");
m_ram->set_default_value(0);
-}
+MACHINE_CONFIG_END
} } } // end namespace bus::ti99::peb
diff --git a/src/devices/bus/ti99/peb/ti_32kmem.h b/src/devices/bus/ti99/peb/ti_32kmem.h
index 5ed0faac87c..0ff492ca1c7 100644
--- a/src/devices/bus/ti99/peb/ti_32kmem.h
+++ b/src/devices/bus/ti99/peb/ti_32kmem.h
@@ -26,10 +26,10 @@ class ti_32k_expcard_device : public device_t, public device_ti99_peribox_card_i
public:
ti_32k_expcard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override { }
- void cruwrite(offs_t offset, uint8_t data) override { }
+ DECLARE_WRITE8_MEMBER(cruwrite) override { }
protected:
void device_start() override;
diff --git a/src/devices/bus/ti99/peb/ti_fdc.cpp b/src/devices/bus/ti99/peb/ti_fdc.cpp
index 79d27cd5460..530dc71d987 100644
--- a/src/devices/bus/ti99/peb/ti_fdc.cpp
+++ b/src/devices/bus/ti99/peb/ti_fdc.cpp
@@ -160,7 +160,7 @@ READ8Z_MEMBER(ti_fdc_device::readz)
}
}
-void ti_fdc_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti_fdc_device::write)
{
if (machine().side_effects_disabled()) return;
@@ -201,7 +201,7 @@ READ8Z_MEMBER(ti_fdc_device::crureadz)
if ((offset & 0xff00)==m_cru_base)
{
uint8_t reply = 0;
- if ((offset & 0x0070) == 0)
+ if ((offset & 0x07) == 0)
{
// Selected drive
reply |= ((m_DSEL)<<1);
@@ -212,12 +212,12 @@ READ8Z_MEMBER(ti_fdc_device::crureadz)
// Selected side
if (m_SIDSEL==ASSERT_LINE) reply |= 0x80;
}
- *value = BIT(reply, (offset >> 1) & 0x07);
+ *value = reply;
LOGMASKED(LOG_CRU, "Read CRU = %02x\n", *value);
}
}
-void ti_fdc_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti_fdc_device::cruwrite)
{
if ((offset & 0xff00)==m_cru_base)
m_crulatch->write_bit((offset >> 1) & 0x07, BIT(data, 0));
diff --git a/src/devices/bus/ti99/peb/ti_fdc.h b/src/devices/bus/ti99/peb/ti_fdc.h
index 4c07bcb142e..f7312661080 100644
--- a/src/devices/bus/ti99/peb/ti_fdc.h
+++ b/src/devices/bus/ti99/peb/ti_fdc.h
@@ -28,11 +28,11 @@ class ti_fdc_device : public device_t, public device_ti99_peribox_card_interface
public:
ti_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
// bool dvena_r();
diff --git a/src/devices/bus/ti99/peb/ti_rs232.cpp b/src/devices/bus/ti99/peb/ti_rs232.cpp
index cbc164bbcb2..8f2ed3f4c45 100644
--- a/src/devices/bus/ti99/peb/ti_rs232.cpp
+++ b/src/devices/bus/ti99/peb/ti_rs232.cpp
@@ -254,17 +254,17 @@ READ8Z_MEMBER(ti_rs232_pio_device::crureadz)
if ((m_signals[0] & tms9902_device::CTS)!=0) reply |= 0x20;
if ((m_signals[1] & tms9902_device::CTS)!=0) reply |= 0x40;
if (m_led) reply |= 0x80;
- *value = BIT(reply, (offset>>1) & 7);
+ *value = reply;
return;
}
if ((offset & 0x00c0)==0x0040)
{
- *value = m_uart0->cruread(offset>>1);
+ *value = m_uart0->cruread(space, offset>>4, 0xff);
return;
}
if ((offset & 0x00c0)==0x0080)
{
- *value = m_uart1->cruread(offset>>1);
+ *value = m_uart1->cruread(space, offset>>4, 0xff);
return;
}
}
@@ -273,18 +273,18 @@ READ8Z_MEMBER(ti_rs232_pio_device::crureadz)
/*
CRU write
*/
-void ti_rs232_pio_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(ti_rs232_pio_device::cruwrite)
{
if ((offset & 0xff00)==m_cru_base)
{
if ((offset & 0x00c0)==0x0040)
{
- m_uart0->cruwrite(offset>>1, data);
+ m_uart0->cruwrite(space, offset>>1, data, 0xff);
return;
}
if ((offset & 0x00c0)==0x0080)
{
- m_uart1->cruwrite(offset>>1, data);
+ m_uart1->cruwrite(space, offset>>1, data, 0xff);
return;
}
@@ -403,7 +403,7 @@ READ8Z_MEMBER( ti_rs232_pio_device::readz )
/*
Memory write
*/
-void ti_rs232_pio_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER( ti_rs232_pio_device::write )
{
if (((offset & m_select_mask)==m_select_value) && m_selected)
{
@@ -967,12 +967,12 @@ WRITE_LINE_MEMBER( ti_rs232_pio_device::rcv1_callback )
receive_data_or_line_state(1);
}
-void ti_rs232_pio_device::xmit0_callback(uint8_t data)
+WRITE8_MEMBER( ti_rs232_pio_device::xmit0_callback )
{
transmit_data(0, data);
}
-void ti_rs232_pio_device::xmit1_callback(uint8_t data)
+WRITE8_MEMBER( ti_rs232_pio_device::xmit1_callback )
{
transmit_data(1, data);
}
@@ -998,12 +998,12 @@ void ti_rs232_pio_device::ctrl_callback(int uartind, int offset, uint8_t data)
}
}
-void ti_rs232_pio_device::ctrl0_callback(offs_t offset, uint8_t data)
+WRITE8_MEMBER( ti_rs232_pio_device::ctrl0_callback )
{
ctrl_callback(0, offset, data);
}
-void ti_rs232_pio_device::ctrl1_callback(offs_t offset, uint8_t data)
+WRITE8_MEMBER( ti_rs232_pio_device::ctrl1_callback )
{
ctrl_callback(1, offset, data);
}
@@ -1101,8 +1101,7 @@ INPUT_PORTS_START( ti_rs232 )
PORT_CONFSETTING( 0x02, "5-20" )
INPUT_PORTS_END
-void ti_rs232_pio_device::device_add_mconfig(machine_config &config)
-{
+MACHINE_CONFIG_START(ti_rs232_pio_device::device_add_mconfig)
TMS9902(config, m_uart0, 3000000);
m_uart0->int_cb().set(FUNC(ti_rs232_pio_device::int0_callback));
m_uart0->rcv_cb().set(FUNC(ti_rs232_pio_device::rcv0_callback));
@@ -1129,7 +1128,7 @@ void ti_rs232_pio_device::device_add_mconfig(machine_config &config)
m_crulatch->q_out_cb<5>().set(FUNC(ti_rs232_pio_device::cts0_w));
m_crulatch->q_out_cb<6>().set(FUNC(ti_rs232_pio_device::cts1_w));
m_crulatch->q_out_cb<7>().set(FUNC(ti_rs232_pio_device::led_w));
-}
+MACHINE_CONFIG_END
const tiny_rom_entry *ti_rs232_pio_device::device_rom_region() const
{
diff --git a/src/devices/bus/ti99/peb/ti_rs232.h b/src/devices/bus/ti99/peb/ti_rs232.h
index 3c3b1e89d4b..75e6ff582df 100644
--- a/src/devices/bus/ti99/peb/ti_rs232.h
+++ b/src/devices/bus/ti99/peb/ti_rs232.h
@@ -32,10 +32,10 @@ class ti_rs232_pio_device : public device_t, public device_ti99_peribox_card_int
public:
ti_rs232_pio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
protected:
void device_start() override;
@@ -50,10 +50,10 @@ private:
DECLARE_WRITE_LINE_MEMBER(int1_callback);
DECLARE_WRITE_LINE_MEMBER(rcv0_callback);
DECLARE_WRITE_LINE_MEMBER(rcv1_callback);
- void xmit0_callback(uint8_t data);
- void xmit1_callback(uint8_t data);
- void ctrl0_callback(offs_t offset, uint8_t data);
- void ctrl1_callback(offs_t offset, uint8_t data);
+ DECLARE_WRITE8_MEMBER(xmit0_callback);
+ DECLARE_WRITE8_MEMBER(xmit1_callback);
+ DECLARE_WRITE8_MEMBER(ctrl0_callback);
+ DECLARE_WRITE8_MEMBER(ctrl1_callback);
DECLARE_WRITE_LINE_MEMBER(selected_w);
DECLARE_WRITE_LINE_MEMBER(pio_direction_in_w);
diff --git a/src/devices/bus/ti99/peb/tn_ide.cpp b/src/devices/bus/ti99/peb/tn_ide.cpp
index 4654a926791..243450fd34f 100644
--- a/src/devices/bus/ti99/peb/tn_ide.cpp
+++ b/src/devices/bus/ti99/peb/tn_ide.cpp
@@ -71,7 +71,9 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::crureadz)
uint8_t reply = 0;
if ((offset & 0xff00)==m_cru_base)
{
- if ((offset & 0x0070) == 0)
+ int bit = (offset >> 4) & 7;
+
+ if (bit==0)
{
reply = m_cru_register & 0x30;
reply |= 8; /* IDE bus IORDY always set */
@@ -82,14 +84,14 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::crureadz)
if (!m_ata_irq)
reply |= 1;
}
- *value = BIT(reply, (offset >> 1) & 7);
+ *value = reply;
}
}
/*
CRU write
*/
-void nouspikel_ide_interface_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(nouspikel_ide_interface_device::cruwrite)
{
if ((offset & 0xff00)==m_cru_base)
{
@@ -144,18 +146,18 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
case 0: /* RTC RAM */
if (addr & 0x80)
/* RTC RAM page register */
- reply = m_rtc->xram_r((addr & 0x1f) | 0x20);
+ reply = m_rtc->xram_r(machine().dummy_space(), (addr & 0x1f) | 0x20);
else
/* RTC RAM read */
- reply = m_rtc->xram_r(addr);
+ reply = m_rtc->xram_r(machine().dummy_space(), addr);
break;
case 1: /* RTC registers */
if (addr & 0x10)
/* register data */
- reply = m_rtc->rtc_r(1);
+ reply = m_rtc->rtc_r(machine().dummy_space(), 1);
else
/* register select */
- reply = m_rtc->rtc_r(0);
+ reply = m_rtc->rtc_r(machine().dummy_space(), 0);
break;
case 2: /* IDE registers set 1 (CS1Fx) */
if (m_tms9995_mode ? (!(addr & 1)) : (addr & 1))
@@ -195,7 +197,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
/*
Memory write. The controller is 16 bit, so we need to demultiplex again.
*/
-void nouspikel_ide_interface_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(nouspikel_ide_interface_device::write)
{
if (machine().side_effects_disabled()) return;
@@ -215,18 +217,18 @@ void nouspikel_ide_interface_device::write(offs_t offset, uint8_t data)
case 0: /* RTC RAM */
if (addr & 0x80)
/* RTC RAM page register */
- m_rtc->xram_w((addr & 0x1f) | 0x20, data);
+ m_rtc->xram_w(machine().dummy_space(), (addr & 0x1f) | 0x20, data);
else
/* RTC RAM write */
- m_rtc->xram_w(addr, data);
+ m_rtc->xram_w(machine().dummy_space(), addr, data);
break;
case 1: /* RTC registers */
if (addr & 0x10)
/* register data */
- m_rtc->rtc_w(1, data);
+ m_rtc->rtc_w(machine().dummy_space(), 1, data);
else
/* register select */
- m_rtc->rtc_w(0, data);
+ m_rtc->rtc_w(machine().dummy_space(), 0, data);
break;
case 2: /* IDE registers set 1 (CS1Fx) */
/*
diff --git a/src/devices/bus/ti99/peb/tn_ide.h b/src/devices/bus/ti99/peb/tn_ide.h
index 51d516d5af0..b4aa66f2fe3 100644
--- a/src/devices/bus/ti99/peb/tn_ide.h
+++ b/src/devices/bus/ti99/peb/tn_ide.h
@@ -28,10 +28,10 @@ class nouspikel_ide_interface_device : public device_t, public device_ti99_perib
public:
nouspikel_ide_interface_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
void do_inta(int state);
bool m_ata_irq;
diff --git a/src/devices/bus/ti99/peb/tn_usbsm.cpp b/src/devices/bus/ti99/peb/tn_usbsm.cpp
index 77f933667e9..813ced0eb0d 100644
--- a/src/devices/bus/ti99/peb/tn_usbsm.cpp
+++ b/src/devices/bus/ti99/peb/tn_usbsm.cpp
@@ -93,8 +93,9 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::crureadz)
if ((offset & 0xff00)==m_cru_base)
{
uint8_t reply = 0;
+ offset &= 3;
- if ((offset & 0x0030) == 0)
+ if (offset == 0)
{
// bit
// 0 >1x00 0: USB Host controller requests interrupt.
@@ -116,14 +117,14 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::crureadz)
else if (!m_smartmedia->is_protected())
reply |= 0x80;
}
- *value = BIT(reply, (offset >> 1) & 7);
+ *value = reply;
}
}
/*
CRU write
*/
-void nouspikel_usb_smartmedia_device::cruwrite(offs_t offset, uint8_t data)
+WRITE8_MEMBER(nouspikel_usb_smartmedia_device::cruwrite)
{
if ((offset & 0xff00)==m_cru_base)
{
@@ -211,7 +212,7 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::readz)
{
// FEEPROM
if (!m_write_flash)
- m_input_latch = m_flash->read16((offset>>1)&0xffff);
+ m_input_latch = m_flash->read16(space, (offset>>1)&0xffff);
}
}
else
@@ -239,7 +240,7 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::readz)
/*
Memory write. The controller is 16 bit, so we need to demultiplex again.
*/
-void nouspikel_usb_smartmedia_device::write(offs_t offset, uint8_t data)
+WRITE8_MEMBER(nouspikel_usb_smartmedia_device::write)
{
if (machine().side_effects_disabled()) return;
@@ -279,7 +280,7 @@ void nouspikel_usb_smartmedia_device::write(offs_t offset, uint8_t data)
else
{ // FEEPROM
if (m_write_flash)
- m_flash->write16((offset>>1)&0xffff, m_output_latch);
+ m_flash->write16(space, (offset>>1)&0xffff, m_output_latch);
}
}
else
@@ -365,13 +366,12 @@ INPUT_PORTS_START( tn_usbsm )
PORT_DIPSETTING( 0x01, "Geneve mode")
INPUT_PORTS_END
-void nouspikel_usb_smartmedia_device::device_add_mconfig(machine_config &config)
-{
+MACHINE_CONFIG_START(nouspikel_usb_smartmedia_device::device_add_mconfig)
SMARTMEDIA(config, "smartmedia", 0);
STRATAFLASH(config, STRATA_TAG, 0);
RAM(config, RAM1_TAG).set_default_size("512K").set_default_value(0);
RAM(config, RAM2_TAG).set_default_size("512K").set_default_value(0);
-}
+MACHINE_CONFIG_END
ioport_constructor nouspikel_usb_smartmedia_device::device_input_ports() const
{
diff --git a/src/devices/bus/ti99/peb/tn_usbsm.h b/src/devices/bus/ti99/peb/tn_usbsm.h
index 52c2690f3ed..a379d67102c 100644
--- a/src/devices/bus/ti99/peb/tn_usbsm.h
+++ b/src/devices/bus/ti99/peb/tn_usbsm.h
@@ -28,10 +28,10 @@ class nouspikel_usb_smartmedia_device : public device_t, public device_ti99_peri
public:
nouspikel_usb_smartmedia_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8Z_MEMBER(readz) override;
- void write(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(write) override;
DECLARE_READ8Z_MEMBER(crureadz) override;
- void cruwrite(offs_t offset, uint8_t data) override;
+ DECLARE_WRITE8_MEMBER(cruwrite) override;
protected:
virtual void device_start() override;
diff --git a/src/devices/bus/ti99/ti99defs.h b/src/devices/bus/ti99/ti99defs.h
index 46bb67aaae9..32d7c88ed38 100644
--- a/src/devices/bus/ti99/ti99defs.h
+++ b/src/devices/bus/ti99/ti99defs.h
@@ -52,8 +52,8 @@
devices as in the real machine, and only the active device changes the bus lines.
*/
-#define READ8Z_MEMBER(name) void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value)
-#define DECLARE_READ8Z_MEMBER(name) void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value)
+#define READ8Z_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value, ATTR_UNUSED uint8_t mem_mask)
+#define DECLARE_READ8Z_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED uint8_t *value, ATTR_UNUSED uint8_t mem_mask = 0xff)
/*
For almost all applications of setoffset, we also need the data bus
@@ -61,7 +61,7 @@
that this is a general rule, we use new macros here which contain the
DBIN setting.
*/
-#define SETADDRESS_DBIN_MEMBER(name) void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED int state)
-#define DECLARE_SETADDRESS_DBIN_MEMBER(name) void name(ATTR_UNUSED offs_t offset, ATTR_UNUSED int state)
+#define SETADDRESS_DBIN_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED int state)
+#define DECLARE_SETADDRESS_DBIN_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED int state)
#endif // MAME_BUS_TI99_TI99DEFS_H