summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/bus/ti99/internal/datamux.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/bus/ti99/internal/datamux.cpp')
-rw-r--r--src/devices/bus/ti99/internal/datamux.cpp75
1 files changed, 35 insertions, 40 deletions
diff --git a/src/devices/bus/ti99/internal/datamux.cpp b/src/devices/bus/ti99/internal/datamux.cpp
index fa1b4de2dad..f6ba06d99b2 100644
--- a/src/devices/bus/ti99/internal/datamux.cpp
+++ b/src/devices/bus/ti99/internal/datamux.cpp
@@ -97,7 +97,6 @@ datamux_device::datamux_device(const machine_config &mconfig, const char *tag, d
m_ram16b(*owner, TI99_EXPRAM_TAG),
m_padram(*owner, TI99_PADRAM_TAG),
m_cpu(*owner, "maincpu"),
- m_spacep(nullptr),
m_ready(*this),
m_addr_buf(0),
m_dbin(CLEAR_LINE),
@@ -118,7 +117,7 @@ datamux_device::datamux_device(const machine_config &mconfig, const char *tag, d
DEVICE ACCESSOR FUNCTIONS
***************************************************************************/
-void datamux_device::read_all(address_space& space, uint16_t addr, uint8_t *value)
+void datamux_device::read_all(uint16_t addr, uint8_t *value)
{
// Valid access
bool validaccess = ((addr & 0x0400)==0);
@@ -136,7 +135,7 @@ void datamux_device::read_all(address_space& space, uint16_t addr, uint8_t *valu
}
}
// GROMport (GROMs)
- m_gromport->readz(space, addr, value);
+ m_gromport->readz(addr, value);
m_grom_idle = false;
}
@@ -144,20 +143,20 @@ void datamux_device::read_all(address_space& space, uint16_t addr, uint8_t *valu
if ((addr & 0xf801)==0x8800)
{
// Forward to VDP unless we have an EVPC
- if (m_video != nullptr) *value = m_video->read(space, addr>>1); // A14 determines data or register read
+ if (m_video != nullptr) *value = m_video->read(addr>>1); // A14 determines data or register read
}
}
// GROMport (ROMs)
- if ((addr & 0xe000)==0x6000) m_gromport->readz(space, addr, value);
+ if ((addr & 0xe000)==0x6000) m_gromport->readz(addr, value);
// I/O port gets all accesses
- m_ioport->readz(space, addr, value);
+ m_ioport->readz(addr, value);
m_ioport->memen_in(CLEAR_LINE);
m_memen_state = CLEAR_LINE;
}
-void datamux_device::write_all(address_space& space, uint16_t addr, uint8_t value)
+void datamux_device::write_all(uint16_t addr, uint8_t value)
{
// GROM access
if ((addr & 0xf801)==0x9800)
@@ -168,12 +167,12 @@ void datamux_device::write_all(address_space& space, uint16_t addr, uint8_t valu
m_grom[i]->write(value);
}
// GROMport
- m_gromport->write(space, addr, value);
+ m_gromport->write(addr, value);
m_grom_idle = false;
}
// Cartridge port and sound
- if ((addr & 0xe000)==0x6000) m_gromport->write(space, addr, value);
+ if ((addr & 0xe000)==0x6000) m_gromport->write(addr, value);
// Only if the sound chip has not been removed
if ((addr & 0xfc01)==0x8400)
@@ -185,16 +184,16 @@ void datamux_device::write_all(address_space& space, uint16_t addr, uint8_t valu
if ((addr & 0xf801)==0x8800)
{
// Forward to VDP unless we have an EVPC
- if (m_video != nullptr) m_video->write(space, addr>>1, value); // A14 determines data or register write
+ if (m_video != nullptr) m_video->write(addr>>1, value); // A14 determines data or register write
}
// I/O port gets all accesses
- m_ioport->write(space, addr, value);
+ m_ioport->write(addr, value);
m_ioport->memen_in(CLEAR_LINE);
m_memen_state = CLEAR_LINE;
}
-void datamux_device::setaddress_all(address_space& space, uint16_t addr)
+void datamux_device::setaddress_all(uint16_t addr)
{
line_state a14 = ((addr & 2)!=0)? ASSERT_LINE : CLEAR_LINE;
@@ -227,7 +226,7 @@ void datamux_device::setaddress_all(address_space& space, uint16_t addr)
// I/O port gets all accesses
m_memen_state = ASSERT_LINE;
m_ioport->memen_in(m_memen_state);
- m_ioport->setaddress_dbin(space, addr, m_dbin);
+ m_ioport->setaddress_dbin(addr, m_dbin);
}
/*
@@ -236,7 +235,7 @@ void datamux_device::setaddress_all(address_space& space, uint16_t addr)
mapped devices are excluded because their state would be changed
unpredictably by the debugger access.
*/
-uint16_t datamux_device::debugger_read(address_space& space, uint16_t addr)
+uint16_t datamux_device::debugger_read(uint16_t addr)
{
uint16_t addrb = addr << 1;
uint16_t value = 0;
@@ -267,13 +266,13 @@ uint16_t datamux_device::debugger_read(address_space& space, uint16_t addr)
if ((addrb & 0xe000)==0x6000)
{
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->readz(space, addrb+1, &lval);
- m_gromport->readz(space, addrb, &hval);
+ m_gromport->readz(addrb+1, &lval);
+ m_gromport->readz(addrb, &hval);
m_gromport->romgq_line(m_romgq_state); // reset to previous state
}
m_ioport->memen_in(ASSERT_LINE);
- m_ioport->readz(space, addrb+1, &lval);
- m_ioport->readz(space, addrb, &hval);
+ m_ioport->readz(addrb+1, &lval);
+ m_ioport->readz(addrb, &hval);
m_ioport->memen_in(m_memen_state); // reset to previous state
value = ((hval << 8)&0xff00) | (lval & 0xff);
}
@@ -282,7 +281,7 @@ uint16_t datamux_device::debugger_read(address_space& space, uint16_t addr)
return value;
}
-void datamux_device::debugger_write(address_space& space, uint16_t addr, uint16_t data)
+void datamux_device::debugger_write(uint16_t addr, uint16_t data)
{
uint16_t addrb = addr << 1;
@@ -312,14 +311,14 @@ void datamux_device::debugger_write(address_space& space, uint16_t addr, uint16_
if ((addrb & 0xe000)==0x6000)
{
m_gromport->romgq_line(ASSERT_LINE);
- m_gromport->write(space, addr+1, data & 0xff);
- m_gromport->write(space, addr, (data>>8) & 0xff);
+ m_gromport->write(addr+1, data & 0xff);
+ m_gromport->write(addr, (data>>8) & 0xff);
m_gromport->romgq_line(m_romgq_state); // reset to previous state
}
m_ioport->memen_in(ASSERT_LINE);
- m_ioport->write(space, addr+1, data & 0xff);
- m_ioport->write(space, addr, (data>>8) & 0xff);
+ m_ioport->write(addr+1, data & 0xff);
+ m_ioport->write(addr, (data>>8) & 0xff);
m_ioport->memen_in(m_memen_state); // reset to previous state
}
}
@@ -330,16 +329,16 @@ void datamux_device::debugger_write(address_space& space, uint16_t addr, uint16_
accesses must not occur within the loop. So we have one access on the bus,
a delay, and then the second access.
- mem_mask is always ffff on TMS processors (cannot control bus width)
+ mem_mask is irrelevant for TMS processors (cannot control bus width)
*/
-READ16_MEMBER( datamux_device::read )
+uint16_t datamux_device::read(offs_t offset)
{
uint16_t value = 0;
// Care for debugger
if (machine().side_effects_disabled())
{
- return debugger_read(space, offset);
+ return debugger_read(offset);
}
// Addresses below 0x2000 are ROM (no wait states)
@@ -371,7 +370,7 @@ READ16_MEMBER( datamux_device::read )
// The byte from the odd address has already been read into the latch
// Reading the even address now (addr)
uint8_t hbyte = 0;
- read_all(space, m_addr_buf, &hbyte);
+ read_all(m_addr_buf, &hbyte);
LOGMASKED(LOG_ACCESS, "Read even byte from address %04x -> %02x\n", m_addr_buf, hbyte);
value = (hbyte<<8) | m_latch;
@@ -384,11 +383,11 @@ READ16_MEMBER( datamux_device::read )
/*
Write access.
*/
-WRITE16_MEMBER( datamux_device::write )
+void datamux_device::write(offs_t offset, uint16_t data)
{
if (machine().side_effects_disabled())
{
- debugger_write(space, offset, data);
+ debugger_write(offset, data);
return;
}
@@ -420,7 +419,7 @@ WRITE16_MEMBER( datamux_device::write )
// write odd byte
LOGMASKED(LOG_ACCESS, "Write odd byte to address %04x <- %02x\n", m_addr_buf+1, data & 0xff);
- write_all(space, m_addr_buf+1, data & 0xff);
+ write_all(m_addr_buf+1, data & 0xff);
}
}
@@ -428,7 +427,7 @@ WRITE16_MEMBER( datamux_device::write )
Called when the memory access starts by setting the address bus. From that
point on, we suspend the CPU until all operations are done.
*/
-READ8_MEMBER( datamux_device::setoffset )
+uint8_t datamux_device::setoffset(offs_t offset)
{
m_addr_buf = offset;
m_waitcount = 0;
@@ -464,7 +463,7 @@ READ8_MEMBER( datamux_device::setoffset )
{
// propagate the setaddress operation
// First the odd address
- setaddress_all(space, m_addr_buf+1);
+ setaddress_all(m_addr_buf+1);
m_muxready = CLEAR_LINE;
ready_join();
}
@@ -502,10 +501,10 @@ WRITE_LINE_MEMBER( datamux_device::clock_in )
if (m_waitcount==2)
{
// read odd byte
- read_all(*m_spacep, m_addr_buf+1, &m_latch);
+ read_all(m_addr_buf+1, &m_latch);
LOGMASKED(LOG_ACCESS, "Read odd byte from address %04x -> %02x\n", m_addr_buf+1, m_latch);
// do the setaddress for the even address
- setaddress_all(*m_spacep, m_addr_buf);
+ setaddress_all(m_addr_buf);
}
}
}
@@ -524,10 +523,10 @@ WRITE_LINE_MEMBER( datamux_device::clock_in )
if (m_waitcount==2)
{
// do the setaddress for the even address
- setaddress_all(*m_spacep, m_addr_buf);
+ setaddress_all(m_addr_buf);
// write even byte
LOGMASKED(LOG_ACCESS, "Write even byte to address %04x <- %02x\n", m_addr_buf, m_latch);
- write_all(*m_spacep, m_addr_buf, m_latch);
+ write_all(m_addr_buf, m_latch);
}
}
}
@@ -615,10 +614,6 @@ void datamux_device::device_reset(void)
m_latch = 0;
m_dbin = CLEAR_LINE;
-
- // Get the pointer to the address space already here, because we cannot
- // save that pointer to a savestate, and we need it on restore
- m_spacep = &m_cpu->space(AS_PROGRAM);
}
void datamux_device::device_config_complete()