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Diffstat (limited to 'src/devices/bus/ti99/internal/998board.h')
-rw-r--r--src/devices/bus/ti99/internal/998board.h54
1 files changed, 51 insertions, 3 deletions
diff --git a/src/devices/bus/ti99/internal/998board.h b/src/devices/bus/ti99/internal/998board.h
index bde035d7d73..1787c0f9cec 100644
--- a/src/devices/bus/ti99/internal/998board.h
+++ b/src/devices/bus/ti99/internal/998board.h
@@ -436,15 +436,60 @@ public:
WRITE_LINE_MEMBER( clock_in );
+ // INT line
+ devcb_write_line m_int;
+
private:
+ bool control_bit(int bit) { return (m_control & bit)!=0; }
+ bool status_bit(int bit) { return (m_status & bit)!=0; }
+ void clear_int_status();
+ void set_status(int bit, bool set) { m_status = (set)? (m_status | bit) : (m_status & ~bit); }
+ void update_hexbus();
+
+ // Registers
uint8_t m_data;
uint8_t m_status;
uint8_t m_control;
uint8_t m_xmit;
- int m_clkcount;
-
- int m_xmit_send;
+ // Last hexbus value; when the new value is different, send it via the hexbus
+ uint8_t m_lasthxvalue;
+
+ bool m_bav; // Bus available; when true, a communication is about to happen
+ bool m_sbav; // Stable BAV; the BAV signal is true for two clock cycles
+ bool m_sbavold; // Old SBAV state
+ bool m_bavhold; // For computing the SBAV signal
+
+ bool m_hsk; // Handshake line; when true, a bus member needs more time to process the message
+ bool m_shsk; // Stable HSK
+ bool m_shskold; // see above
+ bool m_hskhold; // see above
+
+ // Page 3 in OSO schematics: Write timing
+ bool m_wq1; // Flipflop 1
+ bool m_wq1old; // Previous state
+ bool m_wq2; // Flipflop 2
+ bool m_wq2old; // Previous state
+ bool m_wnp; // Write nibble selection; true means upper 4 bits
+ bool m_wbusyold; // Old state of the WBUSY line
+ bool m_sendbyte; // Byte has been loaded into the XMIT register
+ bool m_wrset; // Start sending
+ bool m_counting; // Counter running
+ int m_clkcount; // Counter for 30 cycles
+
+ // Page 4 in OSO schematics: Read timing
+ bool m_rq1; // Flipflop 1
+ bool m_rq2; // Flipflop 2
+ bool m_rq2old; // Previous state
+ bool m_rnib; // Read nibble, true means upper 4 bits
+ bool m_rnibcold; // Needed to detect the raising edge
+ bool m_rdset; // Start reading
+ bool m_rdsetold; // Old state
+ bool m_msns; // Upper 4 bits
+ bool m_lsns; // Lower 4 bits
+
+ // Page 6 (RHSUS*)
+ bool m_rhsus; // Needed to assert the HSK line until the CPU has read the byte
};
class mainboard8_device : public device_t
@@ -612,6 +657,9 @@ private:
#define MCFG_MAINBOARD8_HOLD_CALLBACK(_write) \
devcb = &bus::ti99::internal::mainboard8_device::set_hold_wr_callback(*device, DEVCB_##_write);
+#define MCFG_OSO_INT_CALLBACK(_int) \
+ devcb = &bus::ti99::internal::oso_device::set_int_callback(*device, DEVCB##_int);
+
DECLARE_DEVICE_TYPE_NS(TI99_MAINBOARD8, bus::ti99::internal, mainboard8_device)
DECLARE_DEVICE_TYPE_NS(TI99_VAQUERRO, bus::ti99::internal, vaquerro_device)
DECLARE_DEVICE_TYPE_NS(TI99_MOFETTA, bus::ti99::internal, mofetta_device)