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-rw-r--r--src/devices/bus/snes/bsx.cpp38
-rw-r--r--src/devices/bus/snes/bsx.h32
-rw-r--r--src/devices/bus/snes/event.cpp23
-rw-r--r--src/devices/bus/snes/event.h12
-rw-r--r--src/devices/bus/snes/rom.cpp54
-rw-r--r--src/devices/bus/snes/rom.h54
-rw-r--r--src/devices/bus/snes/rom21.cpp8
-rw-r--r--src/devices/bus/snes/rom21.h8
-rw-r--r--src/devices/bus/snes/sa1.cpp87
-rw-r--r--src/devices/bus/snes/sa1.h32
-rw-r--r--src/devices/bus/snes/sdd1.cpp14
-rw-r--r--src/devices/bus/snes/sdd1.h12
-rw-r--r--src/devices/bus/snes/sfx.cpp26
-rw-r--r--src/devices/bus/snes/sfx.h26
-rw-r--r--src/devices/bus/snes/sgb.cpp44
-rw-r--r--src/devices/bus/snes/sgb.h33
-rw-r--r--src/devices/bus/snes/snes_slot.cpp51
-rw-r--r--src/devices/bus/snes/snes_slot.h36
-rw-r--r--src/devices/bus/snes/spc7110.cpp12
-rw-r--r--src/devices/bus/snes/spc7110.h20
-rw-r--r--src/devices/bus/snes/sufami.cpp26
-rw-r--r--src/devices/bus/snes/sufami.h10
-rw-r--r--src/devices/bus/snes/upd.cpp170
-rw-r--r--src/devices/bus/snes/upd.h30
24 files changed, 445 insertions, 413 deletions
diff --git a/src/devices/bus/snes/bsx.cpp b/src/devices/bus/snes/bsx.cpp
index 1f6efc1af6c..6aacaa3ed2c 100644
--- a/src/devices/bus/snes/bsx.cpp
+++ b/src/devices/bus/snes/bsx.cpp
@@ -283,13 +283,13 @@ void sns_rom_bsx_device::access_update()
}
}
-READ8_MEMBER(sns_rom_bsx_device::read_l)
+uint8_t sns_rom_bsx_device::read_l(offs_t offset)
{
if (offset < 0x200000 && access_00_1f)
{
// 0x00-0x1f:0x8000-0xffff -> CART
if (m_slot->m_cart && m_slot->m_cart->get_rom_size())
- return m_slot->m_cart->read_l(space, offset);
+ return m_slot->m_cart->read_l(offset);
}
if (offset >= 0x200000 && offset < 0x400000)
{
@@ -334,13 +334,13 @@ READ8_MEMBER(sns_rom_bsx_device::read_l)
}
-READ8_MEMBER(sns_rom_bsx_device::read_h)
+uint8_t sns_rom_bsx_device::read_h(offs_t offset)
{
if (offset < 0x200000 && access_80_9f)
{
// 0x80-0x9f:0x8000-0xffff -> CART
if (m_slot->m_cart && m_slot->m_cart->get_rom_size())
- return m_slot->m_cart->read_l(space, offset);
+ return m_slot->m_cart->read_l(offset);
}
// if not in any of the cases above...
@@ -358,7 +358,7 @@ READ8_MEMBER(sns_rom_bsx_device::read_h)
//return 0x00;
}
-WRITE8_MEMBER(sns_rom_bsx_device::write_l)
+void sns_rom_bsx_device::write_l(offs_t offset, uint8_t data)
{
if (offset < 0x200000 && access_00_1f)
{
@@ -400,7 +400,7 @@ WRITE8_MEMBER(sns_rom_bsx_device::write_l)
}
-WRITE8_MEMBER(sns_rom_bsx_device::write_h)
+void sns_rom_bsx_device::write_h(offs_t offset, uint8_t data)
{
if (offset < 0x200000 && access_80_9f)
{
@@ -416,7 +416,7 @@ WRITE8_MEMBER(sns_rom_bsx_device::write_h)
}
-READ8_MEMBER(sns_rom_bsx_device::chip_read)
+uint8_t sns_rom_bsx_device::chip_read(offs_t offset)
{
if ((offset & 0xffff) >= 0x2188 && (offset & 0xffff) < 0x21a0)
return m_base_unit->read(offset & 0xffff);
@@ -435,7 +435,7 @@ READ8_MEMBER(sns_rom_bsx_device::chip_read)
return 0x00;
}
-WRITE8_MEMBER(sns_rom_bsx_device::chip_write)
+void sns_rom_bsx_device::chip_write(offs_t offset, uint8_t data)
{
if ((offset & 0xffff) >= 0x2188 && (offset & 0xffff) < 0x21a0)
m_base_unit->write(offset & 0xffff, data);
@@ -457,7 +457,7 @@ WRITE8_MEMBER(sns_rom_bsx_device::chip_write)
// LoROM cart w/BS-X slot
-READ8_MEMBER(sns_rom_bsxlo_device::read_l)
+uint8_t sns_rom_bsxlo_device::read_l(offs_t offset)
{
if (offset < 0x400000)
{
@@ -469,7 +469,7 @@ READ8_MEMBER(sns_rom_bsxlo_device::read_l)
return 0x00;
}
-READ8_MEMBER(sns_rom_bsxlo_device::read_h)
+uint8_t sns_rom_bsxlo_device::read_h(offs_t offset)
{
if (offset < 0x400000)
{
@@ -481,7 +481,7 @@ READ8_MEMBER(sns_rom_bsxlo_device::read_h)
else if (offset < 0x700000)
{
if (m_slot->m_cart && m_slot->m_cart->get_rom_size())
- return m_slot->m_cart->read_h(space, offset);
+ return m_slot->m_cart->read_h(offset);
}
// RAM [70-7f]
return 0x00;
@@ -490,12 +490,12 @@ READ8_MEMBER(sns_rom_bsxlo_device::read_h)
// HiROM cart w/BS-X slot
-READ8_MEMBER(sns_rom_bsxhi_device::read_l)
+uint8_t sns_rom_bsxhi_device::read_l(offs_t offset)
{
- return read_h(space, offset);
+ return read_h(offset);
}
-READ8_MEMBER(sns_rom_bsxhi_device::read_h)
+uint8_t sns_rom_bsxhi_device::read_h(offs_t offset)
{
if (offset < 0x200000 && (offset & 0xffff) >= 0x8000)
{
@@ -505,7 +505,7 @@ READ8_MEMBER(sns_rom_bsxhi_device::read_h)
if (offset >= 0x200000 && offset < 0x400000)
{
if (m_slot->m_cart && m_slot->m_cart->get_rom_size() && (offset & 0xffff) >= 0x8000)
- return m_slot->m_cart->read_h(space, offset);
+ return m_slot->m_cart->read_h(offset);
}
if (offset >= 0x400000 && offset < 0x600000)
{
@@ -516,7 +516,7 @@ READ8_MEMBER(sns_rom_bsxhi_device::read_h)
if (offset >= 0x600000)
{
if (m_slot->m_cart && m_slot->m_cart->get_rom_size())
- return m_slot->m_cart->read_h(space, offset);
+ return m_slot->m_cart->read_h(offset);
}
return 0xff;
}
@@ -530,18 +530,18 @@ READ8_MEMBER(sns_rom_bsxhi_device::read_h)
// Hence, we use low read handler for ROM access in the 0x8000-0xffff range (i.e. mempack mapped as LoROM) and
// hi read handler for ROM access in the 0x0000-0xffff range (i.e. mempack mapped as HiROM)...
-READ8_MEMBER(sns_rom_bsmempak_device::read_l)
+uint8_t sns_rom_bsmempak_device::read_l(offs_t offset)
{
int bank = offset / 0x10000;
return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
}
-READ8_MEMBER(sns_rom_bsmempak_device::read_h)
+uint8_t sns_rom_bsmempak_device::read_h(offs_t offset)
{
int bank = offset / 0x8000;
return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
}
-WRITE8_MEMBER(sns_rom_bsmempak_device::write_l)
+void sns_rom_bsmempak_device::write_l(offs_t offset, uint8_t data)
{
}
diff --git a/src/devices/bus/snes/bsx.h b/src/devices/bus/snes/bsx.h
index 24ce7b9f691..e144ff118ff 100644
--- a/src/devices/bus/snes/bsx.h
+++ b/src/devices/bus/snes/bsx.h
@@ -18,12 +18,12 @@ public:
sns_rom_bsx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_WRITE8_MEMBER(write_l) override;
- virtual DECLARE_WRITE8_MEMBER(write_h) override;
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual void write_l(offs_t offset, uint8_t data) override;
+ virtual void write_h(offs_t offset, uint8_t data) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
class bsx_base
@@ -84,8 +84,8 @@ public:
sns_rom_bsxlo_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
protected:
// device-level overrides
@@ -106,8 +106,8 @@ public:
sns_rom_bsxhi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
protected:
// device-level overrides
@@ -129,12 +129,12 @@ public:
sns_rom_bsmempak_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_WRITE8_MEMBER(write_l) override;
-// virtual DECLARE_WRITE8_MEMBER(write_h);
-// virtual DECLARE_READ8_MEMBER(chip_read);
-// virtual DECLARE_WRITE8_MEMBER(chip_write);
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual void write_l(offs_t offset, uint8_t data) override;
+// virtual void write_h(offs_t offset, uint8_t data) override;
+// virtual uint8_t chip_read(offs_t offset) override;
+// virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
// device-level overrides
diff --git a/src/devices/bus/snes/event.cpp b/src/devices/bus/snes/event.cpp
index 7131807edab..3591a2a679a 100644
--- a/src/devices/bus/snes/event.cpp
+++ b/src/devices/bus/snes/event.cpp
@@ -60,7 +60,7 @@ void sns_pfest94_device::device_reset()
mapper specific handlers
-------------------------------------------------*/
-READ8_MEMBER(sns_pfest94_device::read_l)
+uint8_t sns_pfest94_device::read_l(offs_t offset)
{
// menu
if ((offset & 0x208000) == 0x208000)
@@ -77,7 +77,7 @@ READ8_MEMBER(sns_pfest94_device::read_l)
}
}
-READ8_MEMBER(sns_pfest94_device::read_h)
+uint8_t sns_pfest94_device::read_h(offs_t offset)
{
// menu
if ((offset & 0x208000) == 0x208000)
@@ -103,7 +103,7 @@ READ8_MEMBER(sns_pfest94_device::read_h)
// these are used for two diff effects: both to select game from menu and to access the DSP when running SMK!
-READ8_MEMBER( sns_pfest94_device::chip_read )
+uint8_t sns_pfest94_device::chip_read(offs_t offset)
{
if (offset & 0x8000)
{
@@ -119,7 +119,7 @@ READ8_MEMBER( sns_pfest94_device::chip_read )
}
-WRITE8_MEMBER( sns_pfest94_device::chip_write )
+void sns_pfest94_device::chip_write(offs_t offset, uint8_t data)
{
if (offset & 0x8000)
{
@@ -186,12 +186,12 @@ void sns_pfest94_device::speedup_addon_bios_access()
// DSP dump contains prg at offset 0 and data at offset 0x2000
-READ32_MEMBER( sns_pfest94_device::necdsp_prg_r )
+uint32_t sns_pfest94_device::necdsp_prg_r(offs_t offset)
{
return get_prg(&m_bios[0], offset);
}
-READ16_MEMBER( sns_pfest94_device::necdsp_data_r )
+uint16_t sns_pfest94_device::necdsp_data_r(offs_t offset)
{
return get_data(&m_bios[0], offset + 0x2000/2);
}
@@ -221,11 +221,12 @@ void sns_pfest94_device::dsp_data_map_lorom(address_map &map)
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(sns_pfest94_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_lorom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_lorom)
-MACHINE_CONFIG_END
+void sns_pfest94_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_pfest94_device::dsp_prg_map_lorom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_pfest94_device::dsp_data_map_lorom);
+}
//-------------------------------------------------
// Dipswitch
diff --git a/src/devices/bus/snes/event.h b/src/devices/bus/snes/event.h
index 812022b3799..dedd18f921a 100644
--- a/src/devices/bus/snes/event.h
+++ b/src/devices/bus/snes/event.h
@@ -32,13 +32,13 @@ protected:
virtual void speedup_addon_bios_access() override;
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
- virtual DECLARE_READ32_MEMBER(necdsp_prg_r);
- virtual DECLARE_READ16_MEMBER(necdsp_data_r);
+ virtual uint32_t necdsp_prg_r(offs_t offset);
+ virtual uint16_t necdsp_data_r(offs_t offset);
private:
required_device<upd7725_device> m_upd7725;
diff --git a/src/devices/bus/snes/rom.cpp b/src/devices/bus/snes/rom.cpp
index bae27f21fad..3308808a008 100644
--- a/src/devices/bus/snes/rom.cpp
+++ b/src/devices/bus/snes/rom.cpp
@@ -174,12 +174,12 @@ void sns_rom_20col_device::device_start()
mapper specific handlers
-------------------------------------------------*/
-READ8_MEMBER(sns_rom_device::read_l)
+uint8_t sns_rom_device::read_l(offs_t offset)
{
- return read_h(space, offset);
+ return read_h(offset);
}
-READ8_MEMBER(sns_rom_device::read_h)
+uint8_t sns_rom_device::read_h(offs_t offset)
{
int bank = offset / 0x10000;
return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
@@ -200,7 +200,7 @@ READ8_MEMBER(sns_rom_device::read_h)
***********************************************************************************************************/
-READ8_MEMBER( sns_rom_obc1_device::chip_read )
+uint8_t sns_rom_obc1_device::chip_read(offs_t offset)
{
uint16_t address = offset & 0x1fff;
uint8_t value;
@@ -236,7 +236,7 @@ READ8_MEMBER( sns_rom_obc1_device::chip_read )
}
-WRITE8_MEMBER( sns_rom_obc1_device::chip_write )
+void sns_rom_obc1_device::chip_write(offs_t offset, uint8_t data)
{
uint16_t address = offset & 0x1fff;
uint8_t temp;
@@ -289,12 +289,12 @@ WRITE8_MEMBER( sns_rom_obc1_device::chip_write )
// Pokemon (and many others): a byte is written and a permutation of its bits must be returned.
// Address range for read/write depends on the game (check snes.xml)
-READ8_MEMBER( sns_rom_pokemon_device::chip_read )
+uint8_t sns_rom_pokemon_device::chip_read(offs_t offset)
{
return bitswap<8>(m_latch,0,6,7,1,2,3,4,5);
}
-WRITE8_MEMBER( sns_rom_pokemon_device::chip_write )
+void sns_rom_pokemon_device::chip_write(offs_t offset, uint8_t data)
{
m_latch = data;
}
@@ -340,7 +340,7 @@ void sns_rom_tekken2_device::update_prot(uint32_t offset)
}
}
-READ8_MEMBER( sns_rom_tekken2_device::chip_read )
+uint8_t sns_rom_tekken2_device::chip_read(offs_t offset)
{
update_prot(offset);
@@ -362,10 +362,10 @@ READ8_MEMBER( sns_rom_tekken2_device::chip_read )
}
}
- return 0xff; // should be open_bus
+ return read_open_bus();
}
-WRITE8_MEMBER( sns_rom_tekken2_device::chip_write )
+void sns_rom_tekken2_device::chip_write(offs_t offset, uint8_t data)
{
update_prot(offset);
}
@@ -373,7 +373,7 @@ WRITE8_MEMBER( sns_rom_tekken2_device::chip_write )
// Soul Blade: Adresses $xxx0-$xxx3 in banks $80-$bf always read $55, $0f, $aa, $f0.
// Banks $c0-$ff return open bus.
-READ8_MEMBER( sns_rom_soulblad_device::chip_read )
+uint8_t sns_rom_soulblad_device::chip_read(offs_t offset)
{
uint8_t value;
offset &= 3;
@@ -401,36 +401,36 @@ READ8_MEMBER( sns_rom_soulblad_device::chip_read )
// The actual banks depends on the last 8bits of the address accessed.
// Type 1: bits0-4 of the address are used as base bank (256KB chunks)
-READ8_MEMBER(sns_rom_mcpirate1_device::read_l)
+uint8_t sns_rom_mcpirate1_device::read_l(offs_t offset)
{
- return read_h(space, offset);
+ return read_h(offset);
}
-READ8_MEMBER(sns_rom_mcpirate1_device::read_h)
+uint8_t sns_rom_mcpirate1_device::read_h(offs_t offset)
{
int bank = (offset / 0x10000) + (m_base_bank * 8);
return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
}
-WRITE8_MEMBER( sns_rom_mcpirate1_device::chip_write )
+void sns_rom_mcpirate1_device::chip_write(offs_t offset, uint8_t data)
{
m_base_bank = offset & 0x1f;
// printf("offset %X data %X bank %X\n", offset, data, m_base_bank);
}
// Type 2: bits0-3 & bit5 of the address are used as base bank (256KB chunks)
-READ8_MEMBER(sns_rom_mcpirate2_device::read_l)
+uint8_t sns_rom_mcpirate2_device::read_l(offs_t offset)
{
- return read_h(space, offset);
+ return read_h(offset);
}
-READ8_MEMBER(sns_rom_mcpirate2_device::read_h)
+uint8_t sns_rom_mcpirate2_device::read_h(offs_t offset)
{
int bank = (offset / 0x10000) + (m_base_bank * 8);
return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
}
-WRITE8_MEMBER( sns_rom_mcpirate2_device::chip_write )
+void sns_rom_mcpirate2_device::chip_write(offs_t offset, uint8_t data)
{
m_base_bank = (offset & 0x0f) | ((offset & 0x20) >> 1);
// printf("offset %X data %X bank %X\n", offset, data, m_base_bank);
@@ -443,19 +443,19 @@ WRITE8_MEMBER( sns_rom_mcpirate2_device::chip_write )
// accesses in [01-3f] don't go to the only 32KB bank)
// - bit 5 is always 0
// it's worth to notice that for FC games size of bank is twice the size of original FC PRG
-READ8_MEMBER(sns_rom_20col_device::read_l)
+uint8_t sns_rom_20col_device::read_l(offs_t offset)
{
- return read_h(space, offset);
+ return read_h(offset);
}
-READ8_MEMBER(sns_rom_20col_device::read_h)
+uint8_t sns_rom_20col_device::read_h(offs_t offset)
{
int prg32k = (!BIT(m_base_bank, 6) && BIT(m_base_bank, 7));
int bank = prg32k ? 0 : (offset / 0x10000);
return m_rom[((m_base_bank & 0x1f) + bank) * 0x8000 + (offset & 0x7fff)];
}
-WRITE8_MEMBER( sns_rom_20col_device::chip_write )
+void sns_rom_20col_device::chip_write(offs_t offset, uint8_t data)
{
// [#] game - written bank value
// [01] spartan x - c6
@@ -486,23 +486,23 @@ WRITE8_MEMBER( sns_rom_20col_device::chip_write )
// Work in progress (probably very wrong)
-READ8_MEMBER( sns_rom_banana_device::chip_read )
+uint8_t sns_rom_banana_device::chip_read(offs_t offset)
{
return bitswap<8>(m_latch[0xf],0,6,7,1,2,3,4,5);
}
-WRITE8_MEMBER( sns_rom_banana_device::chip_write )
+void sns_rom_banana_device::chip_write(offs_t offset, uint8_t data)
{
// printf("write addr %X data %X\n", offset, data);
m_latch[0xf] = data;
}
-READ8_MEMBER( sns_rom_bugs_device::chip_read )
+uint8_t sns_rom_bugs_device::chip_read(offs_t offset)
{
return bitswap<8>(m_latch[offset & 0xff],0,6,7,1,2,3,4,5);
}
-WRITE8_MEMBER( sns_rom_bugs_device::chip_write )
+void sns_rom_bugs_device::chip_write(offs_t offset, uint8_t data)
{
m_latch[offset & 0xff] = data;
}
diff --git a/src/devices/bus/snes/rom.h b/src/devices/bus/snes/rom.h
index 9e95e4b8e00..d2a09b774c1 100644
--- a/src/devices/bus/snes/rom.h
+++ b/src/devices/bus/snes/rom.h
@@ -17,8 +17,8 @@ public:
sns_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
protected:
sns_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -36,8 +36,8 @@ public:
sns_rom_obc1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
// device-level overrides
@@ -60,9 +60,9 @@ public:
// construction/destruction
sns_rom_pokemon_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- // reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device
- virtual DECLARE_WRITE8_MEMBER(chip_write) override; // protection device
+ // reading and writing (protection device)
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
// device-level overrides
@@ -80,9 +80,9 @@ public:
// construction/destruction
sns_rom_tekken2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- // reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device
- virtual DECLARE_WRITE8_MEMBER(chip_write) override; // protection device
+ // reading and writing (protection device)
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
// device-level overrides
@@ -104,8 +104,8 @@ public:
// construction/destruction
sns_rom_soulblad_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- // reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device
+ // reading and writing (protection device)
+ virtual uint8_t chip_read(offs_t offset) override;
};
// ======================> sns_rom_mcpirate1_device
@@ -117,9 +117,9 @@ public:
sns_rom_mcpirate1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override; // bankswitch device
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override; // bankswitch device
protected:
// device-level overrides
@@ -138,9 +138,9 @@ public:
sns_rom_mcpirate2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override; // bankswitch device
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override; // bankswitch device
protected:
// device-level overrides
@@ -159,9 +159,9 @@ public:
sns_rom_20col_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override; // bankswitch device
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override; // bankswitch device
protected:
// device-level overrides
@@ -178,9 +178,9 @@ public:
// construction/destruction
sns_rom_banana_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- // reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device
- virtual DECLARE_WRITE8_MEMBER(chip_write) override; // protection device
+ // reading and writing (protection device)
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
// device-level overrides
@@ -198,9 +198,9 @@ public:
// construction/destruction
sns_rom_bugs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- // reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override; // protection device
- virtual DECLARE_WRITE8_MEMBER(chip_write) override; // protection device
+ // reading and writing (protection device)
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
// device-level overrides
diff --git a/src/devices/bus/snes/rom21.cpp b/src/devices/bus/snes/rom21.cpp
index 91c61394688..8cc1f6fddb6 100644
--- a/src/devices/bus/snes/rom21.cpp
+++ b/src/devices/bus/snes/rom21.cpp
@@ -66,14 +66,14 @@ void sns_rom21_srtc_device::device_reset()
// low and hi reads are not the same! (different ROM banks are accessed)
-READ8_MEMBER(sns_rom21_device::read_l)
+uint8_t sns_rom21_device::read_l(offs_t offset)
{
// here ROM banks from 128 to 255, mirrored twice
int bank = (offset & 0x3fffff) / 0x8000;
return m_rom[rom_bank_map[bank + 0x80] * 0x8000 + (offset & 0x7fff)];
}
-READ8_MEMBER(sns_rom21_device::read_h)
+uint8_t sns_rom21_device::read_h(offs_t offset)
{
// here ROM banks from 0 to 127, mirrored twice
int bank = (offset & 0x3fffff) / 0x8000;
@@ -173,7 +173,7 @@ uint8_t sns_rom21_srtc_device::srtc_weekday( uint32_t year, uint32_t month, uint
// this gets called only for accesses at 0x2800,
// because for 0x2801 open bus gets returned...
-READ8_MEMBER(sns_rom21_srtc_device::chip_read)
+uint8_t sns_rom21_srtc_device::chip_read(offs_t offset)
{
if (m_mode != RTCM_Read)
return 0x00;
@@ -194,7 +194,7 @@ READ8_MEMBER(sns_rom21_srtc_device::chip_read)
}
// this gets called only for accesses at 0x2801
-WRITE8_MEMBER(sns_rom21_srtc_device::chip_write)
+void sns_rom21_srtc_device::chip_write(offs_t offset, uint8_t data)
{
data &= 0x0f; // Only the low four bits are used
diff --git a/src/devices/bus/snes/rom21.h b/src/devices/bus/snes/rom21.h
index 545e2457ef3..fb9b0b6c65a 100644
--- a/src/devices/bus/snes/rom21.h
+++ b/src/devices/bus/snes/rom21.h
@@ -18,8 +18,8 @@ public:
sns_rom21_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
protected:
sns_rom21_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -38,8 +38,8 @@ public:
sns_rom21_srtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
// S-RTC specific variables
diff --git a/src/devices/bus/snes/sa1.cpp b/src/devices/bus/snes/sa1.cpp
index aaf7024ce5f..487f176fd86 100644
--- a/src/devices/bus/snes/sa1.cpp
+++ b/src/devices/bus/snes/sa1.cpp
@@ -204,7 +204,7 @@ void sns_sa1_device::recalc_irqs()
// handle this separately to avoid accessing recursively the regs?
-uint8_t sns_sa1_device::var_length_read(address_space &space, uint32_t offset)
+uint8_t sns_sa1_device::var_length_read(uint32_t offset)
{
// handle 0xffea/0xffeb/0xffee/0xffef
if ((offset & 0xffffe0) == 0x00ffe0)
@@ -216,13 +216,13 @@ uint8_t sns_sa1_device::var_length_read(address_space &space, uint32_t offset)
}
if ((offset & 0xc08000) == 0x008000) //$00-3f:8000-ffff
- return read_l(space, (offset & 0x7fffff));
+ return read_l(offset & 0x7fffff);
if ((offset & 0xc08000) == 0x808000) //$80-bf:8000-ffff
- return read_h(space, (offset & 0x7fffff));
+ return read_h(offset & 0x7fffff);
if ((offset & 0xc00000) == 0xc00000) //$c0-ff:0000-ffff
- return read_h(space, (offset & 0x7fffff));
+ return read_h(offset & 0x7fffff);
if ((offset & 0x40e000) == 0x006000) //$00-3f|80-bf:6000-7fff
return read_bwram((m_bwram_snes * 0x2000) + (offset & 0x1fff));
@@ -239,7 +239,7 @@ uint8_t sns_sa1_device::var_length_read(address_space &space, uint32_t offset)
return 0;
}
-void sns_sa1_device::dma_transfer(address_space &space)
+void sns_sa1_device::dma_transfer()
{
// printf("DMA src %08x (%d), dst %08x (%d) cnt %d\n", m_src_addr, m_dma_ctrl & 3, m_dst_addr, m_dma_ctrl & 4, m_dma_cnt);
@@ -260,15 +260,15 @@ void sns_sa1_device::dma_transfer(address_space &space)
case 0: // ROM
if ((dma_src & 0x408000) == 0x008000 && (dma_src & 0x800000) == 0x000000)
{
- data = read_l(space, (dma_src & 0x7fffff));
+ data = read_l(dma_src & 0x7fffff);
}
if ((dma_src & 0x408000) == 0x008000 && (dma_src & 0x800000) == 0x800000)
{
- data = read_h(space, (dma_src & 0x7fffff));
+ data = read_h(dma_src & 0x7fffff);
}
if ((dma_src & 0xc00000) == 0xc00000)
{
- data = read_h(space, (dma_src & 0x7fffff));
+ data = read_h(dma_src & 0x7fffff);
}
break;
@@ -311,17 +311,17 @@ void sns_sa1_device::dma_transfer(address_space &space)
recalc_irqs();
}
-void sns_sa1_device::dma_cctype1_transfer(address_space &space)
+void sns_sa1_device::dma_cctype1_transfer()
{
m_scpu_flags |= SCPU_IRQ_CHARCONV;
recalc_irqs();
}
-void sns_sa1_device::dma_cctype2_transfer(address_space &space)
+void sns_sa1_device::dma_cctype2_transfer()
{
}
-uint8_t sns_sa1_device::read_regs(address_space &space, uint32_t offset)
+uint8_t sns_sa1_device::read_regs(uint32_t offset)
{
uint8_t value = 0xff;
offset &= 0x1ff; // $2200 + offset gives the reg value to compare with docs
@@ -383,8 +383,8 @@ uint8_t sns_sa1_device::read_regs(address_space &space, uint32_t offset)
case 0x10c:
// Var-Length Read Port Low
{
- uint32_t data = (var_length_read(space, m_vda + 0) << 0) | (var_length_read(space, m_vda + 1) << 8)
- | (var_length_read(space, m_vda + 2) << 16);
+ uint32_t data = (var_length_read(m_vda + 0) << 0) | (var_length_read(m_vda + 1) << 8)
+ | (var_length_read(m_vda + 2) << 16);
data >>= m_vbit;
value = (data >> 0) & 0xff;
}
@@ -392,8 +392,8 @@ uint8_t sns_sa1_device::read_regs(address_space &space, uint32_t offset)
case 0x10d:
// Var-Length Read Port High
{
- uint32_t data = (var_length_read(space, m_vda + 0) << 0) | (var_length_read(space, m_vda + 1) << 8)
- | (var_length_read(space, m_vda + 2) << 16);
+ uint32_t data = (var_length_read(m_vda + 0) << 0) | (var_length_read(m_vda + 1) << 8)
+ | (var_length_read(m_vda + 2) << 16);
data >>= m_vbit;
if (m_drm == 1)
@@ -417,7 +417,7 @@ uint8_t sns_sa1_device::read_regs(address_space &space, uint32_t offset)
return value;
}
-void sns_sa1_device::write_regs(address_space &space, uint32_t offset, uint8_t data)
+void sns_sa1_device::write_regs(uint32_t offset, uint8_t data)
{
offset &= 0x1ff; // $2200 + offset gives the reg value to compare with docs
@@ -669,14 +669,14 @@ void sns_sa1_device::write_regs(address_space &space, uint32_t offset, uint8_t d
{
if (!(m_dma_ctrl & 0x20) && !(m_dma_ctrl & 0x04)) // Normal DMA to IRAM
{
- dma_transfer(space);
+ dma_transfer();
// printf("SA-1: normal DMA to IRAM\n");
}
if (m_dma_ctrl & 0x20 && m_dma_ctrl & 0x10) // CC DMA Type 1
{
// printf("SA-1: CC DMA type 1\n");
- dma_cctype1_transfer(space);
+ dma_cctype1_transfer();
}
}
break;
@@ -688,7 +688,7 @@ void sns_sa1_device::write_regs(address_space &space, uint32_t offset, uint8_t d
if (!(m_dma_ctrl & 0x20) && m_dma_ctrl & 0x04) // Normal DMA to BWRAM
{
// printf("SA-1: normal DMA to BWRAM\n");
- dma_transfer(space);
+ dma_transfer();
}
}
break;
@@ -729,7 +729,7 @@ void sns_sa1_device::write_regs(address_space &space, uint32_t offset, uint8_t d
if (m_dma_ctrl & 0x20 && !(m_dma_ctrl & 0x10)) // CC DMA Type 2
{
// printf("SA-1: CC DMA type 2\n");
- dma_cctype2_transfer(space);
+ dma_cctype2_transfer();
}
}
break;
@@ -901,7 +901,7 @@ void sns_sa1_device::write_bwram(uint32_t offset, uint8_t data)
-------------------------------------------------*/
-READ8_MEMBER(sns_sa1_device::read_l)
+uint8_t sns_sa1_device::read_l(offs_t offset)
{
int bank;
@@ -936,7 +936,7 @@ READ8_MEMBER(sns_sa1_device::read_l)
return 0; // this should not happen (the driver should only call read_l in the above case)
}
-READ8_MEMBER(sns_sa1_device::read_h)
+uint8_t sns_sa1_device::read_h(offs_t offset)
{
int bank;
@@ -972,20 +972,20 @@ READ8_MEMBER(sns_sa1_device::read_h)
return m_rom[rom_bank_map[(m_bank_f_rom * 0x20) + ((offset - 0x700000) / 0x8000)] * 0x8000 + (offset & 0x7fff)];
}
-WRITE8_MEMBER(sns_sa1_device::write_l)
+void sns_sa1_device::write_l(offs_t offset, uint8_t data)
{
}
-WRITE8_MEMBER(sns_sa1_device::write_h)
+void sns_sa1_device::write_h(offs_t offset, uint8_t data)
{
}
-READ8_MEMBER( sns_sa1_device::chip_read )
+uint8_t sns_sa1_device::chip_read(offs_t offset)
{
uint16_t address = offset & 0xffff;
if (offset < 0x400000 && address >= 0x2200 && address < 0x2400)
- return read_regs(space, address & 0x1ff); // SA-1 Regs
+ return read_regs(address & 0x1ff); // SA-1 Regs
if (offset < 0x400000 && address >= 0x3000 && address < 0x3800)
return read_iram(address & 0x7ff); // Internal SA-1 RAM (2K)
@@ -1000,12 +1000,12 @@ READ8_MEMBER( sns_sa1_device::chip_read )
}
-WRITE8_MEMBER( sns_sa1_device::chip_write )
+void sns_sa1_device::chip_write(offs_t offset, uint8_t data)
{
uint16_t address = offset & 0xffff;
if (offset < 0x400000 && address >= 0x2200 && address < 0x2400)
- write_regs(space, address & 0x1ff, data); // SA-1 Regs
+ write_regs(address & 0x1ff, data); // SA-1 Regs
if (offset < 0x400000 && address >= 0x3000 && address < 0x3800)
write_iram(address & 0x7ff, data); // Internal SA-1 RAM (2K)
@@ -1026,7 +1026,7 @@ WRITE8_MEMBER( sns_sa1_device::chip_write )
// I/O regs or WRAM, and there are a few additional accesses to IRAM (in [00-3f][0000-07ff])
// and to BWRAM (in [60-6f][0000-ffff], so-called bitmap mode)
-READ8_MEMBER( sns_sa1_device::sa1_hi_r )
+uint8_t sns_sa1_device::sa1_hi_r(offs_t offset)
{
uint16_t address = offset & 0xffff;
@@ -1037,22 +1037,22 @@ READ8_MEMBER( sns_sa1_device::sa1_hi_r )
if (address < 0x0800)
return read_iram(offset); // Internal SA-1 RAM (2K)
else if (address >= 0x2200 && address < 0x2400)
- return read_regs(space, offset & 0x1ff); // SA-1 Regs
+ return read_regs(offset & 0x1ff); // SA-1 Regs
else if (address >= 0x3000 && address < 0x3800)
return read_iram(offset); // Internal SA-1 RAM (2K)
}
else if (address < 0x8000)
return read_bwram((m_bwram_sa1 * 0x2000) + (offset & 0x1fff) + (m_bwram_sa1_source * 0x100000)); // SA-1 BWRAM
else
- return read_h(space, offset); // ROM
+ return read_h(offset); // ROM
return 0xff; // maybe open bus? same as the main system one or diff? (currently not accessible from carts anyway...)
}
else
- return read_h(space, offset); // ROM
+ return read_h(offset); // ROM
}
-READ8_MEMBER( sns_sa1_device::sa1_lo_r )
+uint8_t sns_sa1_device::sa1_lo_r(offs_t offset)
{
uint16_t address = offset & 0xffff;
@@ -1063,7 +1063,7 @@ READ8_MEMBER( sns_sa1_device::sa1_lo_r )
if (address < 0x0800)
return read_iram(offset); // Internal SA-1 RAM (2K)
else if (address >= 0x2200 && address < 0x2400)
- return read_regs(space, offset & 0x1ff); // SA-1 Regs
+ return read_regs(offset & 0x1ff); // SA-1 Regs
else if (address >= 0x3000 && address < 0x3800)
return read_iram(offset); // Internal SA-1 RAM (2K)
}
@@ -1094,7 +1094,7 @@ READ8_MEMBER( sns_sa1_device::sa1_lo_r )
return m_sa1_reset>>8;
}
else
- return read_l(space, offset); // ROM
+ return read_l(offset); // ROM
return 0xff; // maybe open bus? same as the main system one or diff? (currently not accessible from carts anyway...)
}
@@ -1106,7 +1106,7 @@ READ8_MEMBER( sns_sa1_device::sa1_lo_r )
return 0xff; // nothing should be mapped here, so maybe open bus?
}
-WRITE8_MEMBER( sns_sa1_device::sa1_hi_w )
+void sns_sa1_device::sa1_hi_w(offs_t offset, uint8_t data)
{
uint16_t address = offset & 0xffff;
if (offset < 0x400000)
@@ -1116,7 +1116,7 @@ WRITE8_MEMBER( sns_sa1_device::sa1_hi_w )
if (address < 0x0800)
write_iram(offset, data); // Internal SA-1 RAM (2K)
else if (address >= 0x2200 && address < 0x2400)
- write_regs(space, offset & 0x1ff, data); // SA-1 Regs
+ write_regs(offset & 0x1ff, data); // SA-1 Regs
else if (address >= 0x3000 && address < 0x3800)
write_iram(offset, data); // Internal SA-1 RAM (2K)
}
@@ -1125,14 +1125,14 @@ WRITE8_MEMBER( sns_sa1_device::sa1_hi_w )
}
}
-WRITE8_MEMBER( sns_sa1_device::sa1_lo_w )
+void sns_sa1_device::sa1_lo_w(offs_t offset, uint8_t data)
{
if (offset >= 0x400000 && offset < 0x500000)
write_bwram(offset & 0xfffff, data); // SA-1 BWRAM (not mirrored above!)
else if (offset >= 0x600000 && offset < 0x700000)
write_bwram((offset & 0xfffff) + 0x100000, data); // SA-1 BWRAM Bitmap mode
else
- sa1_hi_w(space, offset, data);
+ sa1_hi_w(offset, data);
}
void sns_sa1_device::sa1_map(address_map &map)
@@ -1143,7 +1143,8 @@ void sns_sa1_device::sa1_map(address_map &map)
}
-MACHINE_CONFIG_START(sns_sa1_device::device_add_mconfig)
- MCFG_DEVICE_ADD("sa1cpu", G65816, 10000000)
- MCFG_DEVICE_PROGRAM_MAP(sa1_map)
-MACHINE_CONFIG_END
+void sns_sa1_device::device_add_mconfig(machine_config &config)
+{
+ G65816(config, m_sa1, 10000000);
+ m_sa1->set_addrmap(AS_PROGRAM, &sns_sa1_device::sa1_map);
+}
diff --git a/src/devices/bus/snes/sa1.h b/src/devices/bus/snes/sa1.h
index 6ea8ae9b15a..e4fb646385a 100644
--- a/src/devices/bus/snes/sa1.h
+++ b/src/devices/bus/snes/sa1.h
@@ -26,25 +26,25 @@ protected:
virtual void device_add_mconfig(machine_config &config) override;
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_WRITE8_MEMBER(write_l) override;
- virtual DECLARE_WRITE8_MEMBER(write_h) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual void write_l(offs_t offset, uint8_t data) override;
+ virtual void write_h(offs_t offset, uint8_t data) override;
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
private:
- uint8_t var_length_read(address_space &space, uint32_t offset);
- void dma_transfer(address_space &space);
- void dma_cctype1_transfer(address_space &space);
- void dma_cctype2_transfer(address_space &space);
+ uint8_t var_length_read(uint32_t offset);
+ void dma_transfer();
+ void dma_cctype1_transfer();
+ void dma_cctype2_transfer();
- uint8_t read_regs(address_space &space, uint32_t offset);
+ uint8_t read_regs(uint32_t offset);
uint8_t read_iram(uint32_t offset);
uint8_t read_bwram(uint32_t offset);
- void write_regs(address_space &space, uint32_t offset, uint8_t data);
+ void write_regs(uint32_t offset, uint8_t data);
void write_iram(uint32_t offset, uint8_t data);
void write_bwram(uint32_t offset, uint8_t data);
void recalc_irqs();
@@ -103,10 +103,10 @@ private:
// $2302-$2305
uint16_t m_hcr, m_vcr;
- DECLARE_READ8_MEMBER(sa1_lo_r);
- DECLARE_READ8_MEMBER(sa1_hi_r);
- DECLARE_WRITE8_MEMBER(sa1_lo_w);
- DECLARE_WRITE8_MEMBER(sa1_hi_w);
+ uint8_t sa1_lo_r(offs_t offset);
+ uint8_t sa1_hi_r(offs_t offset);
+ void sa1_lo_w(offs_t offset, uint8_t data);
+ void sa1_hi_w(offs_t offset, uint8_t data);
void sa1_map(address_map &map);
};
diff --git a/src/devices/bus/snes/sdd1.cpp b/src/devices/bus/snes/sdd1.cpp
index 6d13fcd97a8..94374d07681 100644
--- a/src/devices/bus/snes/sdd1.cpp
+++ b/src/devices/bus/snes/sdd1.cpp
@@ -470,7 +470,7 @@ void sns_rom_sdd1_device::device_reset()
mapper specific handlers
-------------------------------------------------*/
-READ8_MEMBER( sns_rom_sdd1_device::chip_read )
+uint8_t sns_rom_sdd1_device::chip_read(offs_t offset)
{
uint16_t addr = offset & 0xffff;
@@ -491,7 +491,7 @@ READ8_MEMBER( sns_rom_sdd1_device::chip_read )
}
-WRITE8_MEMBER( sns_rom_sdd1_device::chip_write )
+void sns_rom_sdd1_device::chip_write(offs_t offset, uint8_t data)
{
uint16_t addr = offset & 0xffff;
@@ -589,7 +589,7 @@ uint8_t sns_rom_sdd1_device::read_helper(uint32_t addr)
return m_rom[m_mmc[(addr >> 20) & 3] + (addr & 0x0fffff)];
}
-READ8_MEMBER(sns_rom_sdd1_device::read_l)
+uint8_t sns_rom_sdd1_device::read_l(offs_t offset)
{
if (offset < 0x400000)
return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
@@ -597,21 +597,21 @@ READ8_MEMBER(sns_rom_sdd1_device::read_l)
return m_rom[rom_bank_map[(offset - 0x400000) / 0x8000] * 0x8000 + (offset & 0x7fff)];
}
-READ8_MEMBER(sns_rom_sdd1_device::read_h)
+uint8_t sns_rom_sdd1_device::read_h(offs_t offset)
{
if (offset >= 0x400000)
return read_helper(offset - 0x400000);
else
- return read_l(space, offset);
+ return read_l(offset);
}
-READ8_MEMBER( sns_rom_sdd1_device::read_ram )
+uint8_t sns_rom_sdd1_device::read_ram(offs_t offset)
{
return m_nvram[offset & 0x1fff];
}
-WRITE8_MEMBER( sns_rom_sdd1_device::write_ram )
+void sns_rom_sdd1_device::write_ram(offs_t offset, uint8_t data)
{
m_nvram[offset & 0x1fff] = data;
}
diff --git a/src/devices/bus/snes/sdd1.h b/src/devices/bus/snes/sdd1.h
index 6265e630bdc..5164a169f65 100644
--- a/src/devices/bus/snes/sdd1.h
+++ b/src/devices/bus/snes/sdd1.h
@@ -19,12 +19,12 @@ public:
sns_rom_sdd1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_READ8_MEMBER(read_ram) override;
- virtual DECLARE_WRITE8_MEMBER(write_ram) override;
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual uint8_t read_ram(offs_t offset) override;
+ virtual void write_ram(offs_t offset, uint8_t data) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
sns_rom_sdd1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
diff --git a/src/devices/bus/snes/sfx.cpp b/src/devices/bus/snes/sfx.cpp
index cf9942ada4d..59908b9b06e 100644
--- a/src/devices/bus/snes/sfx.cpp
+++ b/src/devices/bus/snes/sfx.cpp
@@ -40,30 +40,30 @@ void sns_rom_superfx_device::device_reset()
// LoROM + SuperFX (GSU-1,2)
// TODO: mask sfx_ram based on the actual RAM...
-READ8_MEMBER( sns_rom_superfx_device::superfx_r_bank1 )
+uint8_t sns_rom_superfx_device::superfx_r_bank1(offs_t offset)
{
return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
}
-READ8_MEMBER( sns_rom_superfx_device::superfx_r_bank2 )
+uint8_t sns_rom_superfx_device::superfx_r_bank2(offs_t offset)
{
return m_rom[rom_bank_map[offset / 0x8000] * 0x8000 + (offset & 0x7fff)];
}
-READ8_MEMBER( sns_rom_superfx_device::superfx_r_bank3 )
+uint8_t sns_rom_superfx_device::superfx_r_bank3(offs_t offset)
{
return sfx_ram[offset & 0xfffff];
}
-WRITE8_MEMBER( sns_rom_superfx_device::superfx_w_bank1 )
+void sns_rom_superfx_device::superfx_w_bank1(offs_t offset, uint8_t data)
{
}
-WRITE8_MEMBER( sns_rom_superfx_device::superfx_w_bank2 )
+void sns_rom_superfx_device::superfx_w_bank2(offs_t offset, uint8_t data)
{
}
-WRITE8_MEMBER( sns_rom_superfx_device::superfx_w_bank3 )
+void sns_rom_superfx_device::superfx_w_bank3(offs_t offset, uint8_t data)
{
sfx_ram[offset & 0xfffff] = data;
}
@@ -92,23 +92,23 @@ void sns_rom_superfx_device::device_add_mconfig(machine_config &config)
m_superfx->irq().set(FUNC(sns_rom_superfx_device::snes_extern_irq_w)); /* IRQ line from cart */
}
-READ8_MEMBER( sns_rom_superfx_device::chip_read )
+uint8_t sns_rom_superfx_device::chip_read(offs_t offset)
{
return m_superfx->mmio_read(offset);
}
-WRITE8_MEMBER( sns_rom_superfx_device::chip_write )
+void sns_rom_superfx_device::chip_write(offs_t offset, uint8_t data)
{
m_superfx->mmio_write(offset, data);
}
-READ8_MEMBER( sns_rom_superfx_device::read_l )
+uint8_t sns_rom_superfx_device::read_l(offs_t offset)
{
- return read_h(space, offset);
+ return read_h(offset);
}
-READ8_MEMBER(sns_rom_superfx_device::read_h)
+uint8_t sns_rom_superfx_device::read_h(offs_t offset)
{
if (offset < 0x400000)
return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
@@ -130,14 +130,14 @@ READ8_MEMBER(sns_rom_superfx_device::read_h)
return 0xff; // this handler should never be called for [60-7f]/[e0-ff] ranges
}
-READ8_MEMBER( sns_rom_superfx_device::read_ram )
+uint8_t sns_rom_superfx_device::read_ram(offs_t offset)
{
if (m_superfx->access_ram())
return sfx_ram[offset & 0xfffff];
return 0xff; // should be open bus...
}
-WRITE8_MEMBER( sns_rom_superfx_device::write_ram )
+void sns_rom_superfx_device::write_ram(offs_t offset, uint8_t data)
{
if (m_superfx->access_ram())
sfx_ram[offset & 0xfffff] = data;
diff --git a/src/devices/bus/snes/sfx.h b/src/devices/bus/snes/sfx.h
index 253084be139..7c92e411749 100644
--- a/src/devices/bus/snes/sfx.h
+++ b/src/devices/bus/snes/sfx.h
@@ -26,19 +26,19 @@ protected:
virtual DECLARE_WRITE_LINE_MEMBER(snes_extern_irq_w);
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_READ8_MEMBER(read_ram) override;
- virtual DECLARE_WRITE8_MEMBER(write_ram) override;
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
-
- virtual DECLARE_READ8_MEMBER(superfx_r_bank1);
- virtual DECLARE_READ8_MEMBER(superfx_r_bank2);
- virtual DECLARE_READ8_MEMBER(superfx_r_bank3);
- virtual DECLARE_WRITE8_MEMBER(superfx_w_bank1);
- virtual DECLARE_WRITE8_MEMBER(superfx_w_bank2);
- virtual DECLARE_WRITE8_MEMBER(superfx_w_bank3);
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual uint8_t read_ram(offs_t offset) override;
+ virtual void write_ram(offs_t offset, uint8_t data) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
+
+ uint8_t superfx_r_bank1(offs_t offset);
+ uint8_t superfx_r_bank2(offs_t offset);
+ uint8_t superfx_r_bank3(offs_t offset);
+ void superfx_w_bank1(offs_t offset, uint8_t data);
+ void superfx_w_bank2(offs_t offset, uint8_t data);
+ void superfx_w_bank3(offs_t offset, uint8_t data);
private:
required_device<superfx_device> m_superfx;
diff --git a/src/devices/bus/snes/sgb.cpp b/src/devices/bus/snes/sgb.cpp
index 1a50f504f01..6c790a1c773 100644
--- a/src/devices/bus/snes/sgb.cpp
+++ b/src/devices/bus/snes/sgb.cpp
@@ -74,55 +74,55 @@ void sns_rom_sgb_device::device_reset()
// ADDRESS_MAP( supergb_map )
//-------------------------------------------------
-READ8_MEMBER(sns_rom_sgb_device::gb_cart_r)
+uint8_t sns_rom_sgb_device::gb_cart_r(offs_t offset)
{
if (offset < 0x100 && !m_bios_disabled)
{
return m_region_bios->base()[offset];
}
- return m_cartslot->read_rom(space, offset);
+ return m_cartslot->read_rom(offset);
}
-WRITE8_MEMBER(sns_rom_sgb_device::gb_bank_w)
+void sns_rom_sgb_device::gb_bank_w(offs_t offset, uint8_t data)
{
- m_cartslot->write_bank(space, offset, data);
+ m_cartslot->write_bank(offset, data);
}
-READ8_MEMBER(sns_rom_sgb_device::gb_ram_r)
+uint8_t sns_rom_sgb_device::gb_ram_r(offs_t offset)
{
- return m_cartslot->read_ram(space, offset);
+ return m_cartslot->read_ram(offset);
}
-WRITE8_MEMBER(sns_rom_sgb_device::gb_ram_w)
+void sns_rom_sgb_device::gb_ram_w(offs_t offset, uint8_t data)
{
- m_cartslot->write_ram(space, offset, data);
+ m_cartslot->write_ram(offset, data);
}
-READ8_MEMBER(sns_rom_sgb_device::gb_echo_r)
+uint8_t sns_rom_sgb_device::gb_echo_r(offs_t offset)
{
- return space.read_byte(0xc000 + offset);
+ return m_sgb_cpu->space(AS_PROGRAM).read_byte(0xc000 + offset);
}
-WRITE8_MEMBER(sns_rom_sgb_device::gb_echo_w)
+void sns_rom_sgb_device::gb_echo_w(offs_t offset, uint8_t data)
{
- return space.write_byte(0xc000 + offset, data);
+ return m_sgb_cpu->space(AS_PROGRAM).write_byte(0xc000 + offset, data);
}
-READ8_MEMBER(sns_rom_sgb_device::gb_io_r)
+uint8_t sns_rom_sgb_device::gb_io_r(offs_t offset)
{
return 0;
}
-WRITE8_MEMBER(sns_rom_sgb_device::gb_io_w)
+void sns_rom_sgb_device::gb_io_w(offs_t offset, uint8_t data)
{
}
-READ8_MEMBER(sns_rom_sgb_device::gb_ie_r)
+uint8_t sns_rom_sgb_device::gb_ie_r(offs_t offset)
{
return m_sgb_cpu->get_ie();
}
-WRITE8_MEMBER(sns_rom_sgb_device::gb_ie_w)
+void sns_rom_sgb_device::gb_ie_w(offs_t offset, uint8_t data)
{
m_sgb_cpu->set_ie(data);
}
@@ -149,7 +149,7 @@ void sns_rom_sgb_device::supergb_map(address_map &map)
-WRITE8_MEMBER( sns_rom_sgb_device::gb_timer_callback )
+void sns_rom_sgb_device::gb_timer_callback(uint8_t data)
{
}
@@ -220,18 +220,18 @@ const tiny_rom_entry *sns_rom_sgb2_device::device_rom_region() const
-------------------------------------------------*/
-READ8_MEMBER(sns_rom_sgb_device::read_l)
+uint8_t sns_rom_sgb_device::read_l(offs_t offset)
{
- return read_h(space, offset);
+ return read_h(offset);
}
-READ8_MEMBER(sns_rom_sgb_device::read_h)
+uint8_t sns_rom_sgb_device::read_h(offs_t offset)
{
int bank = offset / 0x10000;
return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
}
-READ8_MEMBER( sns_rom_sgb_device::chip_read )
+uint8_t sns_rom_sgb_device::chip_read(offs_t offset)
{
uint16_t address = offset & 0xffff;
@@ -299,7 +299,7 @@ void sns_rom_sgb_device::lcd_render(uint32_t *source)
}
}
-WRITE8_MEMBER( sns_rom_sgb_device::chip_write )
+void sns_rom_sgb_device::chip_write(offs_t offset, uint8_t data)
{
uint16_t address = offset & 0xffff;
diff --git a/src/devices/bus/snes/sgb.h b/src/devices/bus/snes/sgb.h
index c49ebaa44e3..db6782ddb98 100644
--- a/src/devices/bus/snes/sgb.h
+++ b/src/devices/bus/snes/sgb.h
@@ -21,8 +21,7 @@
class sns_rom_sgb_device : public sns_rom_device
{
public:
-
- virtual DECLARE_WRITE8_MEMBER(gb_timer_callback);
+ void gb_timer_callback(uint8_t data);
protected:
// construction/destruction
@@ -33,21 +32,21 @@ protected:
virtual void device_reset() override;
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
-
- virtual DECLARE_READ8_MEMBER(gb_cart_r);
- virtual DECLARE_WRITE8_MEMBER(gb_bank_w);
- virtual DECLARE_READ8_MEMBER(gb_ram_r);
- virtual DECLARE_WRITE8_MEMBER(gb_ram_w);
- virtual DECLARE_READ8_MEMBER(gb_echo_r);
- virtual DECLARE_WRITE8_MEMBER(gb_echo_w);
- virtual DECLARE_READ8_MEMBER(gb_io_r);
- virtual DECLARE_WRITE8_MEMBER(gb_io_w);
- virtual DECLARE_READ8_MEMBER(gb_ie_r);
- virtual DECLARE_WRITE8_MEMBER(gb_ie_w);
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
+
+ uint8_t gb_cart_r(offs_t offset);
+ void gb_bank_w(offs_t offset, uint8_t data);
+ uint8_t gb_ram_r(offs_t offset);
+ void gb_ram_w(offs_t offset, uint8_t data);
+ uint8_t gb_echo_r(offs_t offset);
+ void gb_echo_w(offs_t offset, uint8_t data);
+ uint8_t gb_io_r(offs_t offset);
+ void gb_io_w(offs_t offset, uint8_t data);
+ uint8_t gb_ie_r(offs_t offset);
+ void gb_ie_w(offs_t offset, uint8_t data);
void supergb_map(address_map &map);
diff --git a/src/devices/bus/snes/snes_slot.cpp b/src/devices/bus/snes/snes_slot.cpp
index f85f198f257..7af674e9f6d 100644
--- a/src/devices/bus/snes/snes_slot.cpp
+++ b/src/devices/bus/snes/snes_slot.cpp
@@ -177,6 +177,18 @@ WRITE_LINE_MEMBER(device_sns_cart_interface::write_irq)
m_slot->write_irq(state);
}
+//-------------------------------------------------
+// read_open_bus - read from the open bus
+//-------------------------------------------------
+
+uint8_t device_sns_cart_interface::read_open_bus()
+{
+ if (m_slot != nullptr)
+ return m_slot->read_open_bus();
+
+ return 0xff;
+}
+
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
@@ -191,7 +203,8 @@ base_sns_cart_slot_device::base_sns_cart_slot_device(const machine_config &mconf
m_addon(ADDON_NONE),
m_type(SNES_MODE20),
m_cart(nullptr),
- m_irq_callback(*this)
+ m_irq_callback(*this),
+ m_open_bus_callback(*this)
{
}
@@ -225,9 +238,11 @@ base_sns_cart_slot_device::~base_sns_cart_slot_device()
void base_sns_cart_slot_device::device_start()
{
m_cart = dynamic_cast<device_sns_cart_interface *>(get_card_device());
- m_cart->m_slot = this;
+ if (m_cart != nullptr)
+ m_cart->m_slot = this;
m_irq_callback.resolve_safe();
+ m_open_bus_callback.resolve_safe(0xff);
}
@@ -1060,34 +1075,34 @@ std::string base_sns_cart_slot_device::get_default_card_software(get_default_car
read
-------------------------------------------------*/
-READ8_MEMBER(base_sns_cart_slot_device::read_l)
+uint8_t base_sns_cart_slot_device::read_l(offs_t offset)
{
if (m_cart)
- return m_cart->read_l(space, offset);
+ return m_cart->read_l(offset);
else
return 0xff;
}
-READ8_MEMBER(base_sns_cart_slot_device::read_h)
+uint8_t base_sns_cart_slot_device::read_h(offs_t offset)
{
if (m_cart)
- return m_cart->read_h(space, offset);
+ return m_cart->read_h(offset);
else
return 0xff;
}
-READ8_MEMBER(base_sns_cart_slot_device::read_ram)
+uint8_t base_sns_cart_slot_device::read_ram(offs_t offset)
{
if (m_cart)
- return m_cart->read_ram(space, offset);
+ return m_cart->read_ram(offset);
else
return 0xff;
}
-READ8_MEMBER(base_sns_cart_slot_device::chip_read)
+uint8_t base_sns_cart_slot_device::chip_read(offs_t offset)
{
if (m_cart)
- return m_cart->chip_read(space, offset);
+ return m_cart->chip_read(offset);
else
return 0xff;
}
@@ -1096,28 +1111,28 @@ READ8_MEMBER(base_sns_cart_slot_device::chip_read)
write
-------------------------------------------------*/
-WRITE8_MEMBER(base_sns_cart_slot_device::write_l)
+void base_sns_cart_slot_device::write_l(offs_t offset, uint8_t data)
{
if (m_cart)
- m_cart->write_l(space, offset, data);
+ m_cart->write_l(offset, data);
}
-WRITE8_MEMBER(base_sns_cart_slot_device::write_h)
+void base_sns_cart_slot_device::write_h(offs_t offset, uint8_t data)
{
if (m_cart)
- m_cart->write_h(space, offset, data);
+ m_cart->write_h(offset, data);
}
-WRITE8_MEMBER(base_sns_cart_slot_device::write_ram)
+void base_sns_cart_slot_device::write_ram(offs_t offset, uint8_t data)
{
if (m_cart)
- m_cart->write_ram(space, offset, data);
+ m_cart->write_ram(offset, data);
}
-WRITE8_MEMBER(base_sns_cart_slot_device::chip_write)
+void base_sns_cart_slot_device::chip_write(offs_t offset, uint8_t data)
{
if (m_cart)
- m_cart->chip_write(space, offset, data);
+ m_cart->chip_write(offset, data);
}
diff --git a/src/devices/bus/snes/snes_slot.h b/src/devices/bus/snes/snes_slot.h
index 91f61e88f4d..9d63a1ba9c2 100644
--- a/src/devices/bus/snes/snes_slot.h
+++ b/src/devices/bus/snes/snes_slot.h
@@ -111,14 +111,14 @@ public:
virtual ~device_sns_cart_interface();
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) { return 0xff; } // ROM access in range [00-7f]
- virtual DECLARE_READ8_MEMBER(read_h) { return 0xff; } // ROM access in range [80-ff]
- virtual DECLARE_READ8_MEMBER(read_ram) { if (!m_nvram.empty()) return m_nvram[offset & (m_nvram.size()-1)]; else return 0xff; } // NVRAM access
- virtual DECLARE_WRITE8_MEMBER(write_l) { } // used by carts with subslots
- virtual DECLARE_WRITE8_MEMBER(write_h) { } // used by carts with subslots
- virtual DECLARE_WRITE8_MEMBER(write_ram) { if (!m_nvram.empty()) m_nvram[offset & (m_nvram.size()-1)] = data; } // NVRAM access
- virtual DECLARE_READ8_MEMBER(chip_read) { return 0xff; }
- virtual DECLARE_WRITE8_MEMBER(chip_write) { }
+ virtual uint8_t read_l(offs_t offset) { return 0xff; } // ROM access in range [00-7f]
+ virtual uint8_t read_h(offs_t offset) { return 0xff; } // ROM access in range [80-ff]
+ virtual uint8_t read_ram(offs_t offset) { if (!m_nvram.empty()) return m_nvram[offset & (m_nvram.size()-1)]; else return 0xff; } // NVRAM access
+ virtual void write_l(offs_t offset, uint8_t data) { } // used by carts with subslots
+ virtual void write_h(offs_t offset, uint8_t data) { } // used by carts with subslots
+ virtual void write_ram(offs_t offset, uint8_t data) { if (!m_nvram.empty()) m_nvram[offset & (m_nvram.size()-1)] = data; } // NVRAM access
+ virtual uint8_t chip_read(offs_t offset) { return 0xff; }
+ virtual void chip_write(offs_t offset, uint8_t data) { }
virtual void speedup_addon_bios_access() {}
void rom_alloc(uint32_t size, const char *tag);
@@ -142,6 +142,7 @@ protected:
device_sns_cart_interface(const machine_config &mconfig, device_t &device);
DECLARE_WRITE_LINE_MEMBER(write_irq);
+ uint8_t read_open_bus();
// internal state
uint8_t *m_rom;
@@ -168,6 +169,7 @@ public:
// configuration
auto irq_callback() { return m_irq_callback.bind(); }
+ auto open_bus_callback() { return m_open_bus_callback.bind(); }
// device-level overrides
virtual void device_start() override;
@@ -198,16 +200,17 @@ public:
virtual std::string get_default_card_software(get_default_card_software_hook &hook) const override;
// reading and writing
- DECLARE_READ8_MEMBER(read_l);
- DECLARE_READ8_MEMBER(read_h);
- DECLARE_READ8_MEMBER(read_ram);
- DECLARE_WRITE8_MEMBER(write_l);
- DECLARE_WRITE8_MEMBER(write_h);
- DECLARE_WRITE8_MEMBER(write_ram);
- DECLARE_READ8_MEMBER(chip_read);
- DECLARE_WRITE8_MEMBER(chip_write);
+ uint8_t read_l(offs_t offset);
+ uint8_t read_h(offs_t offset);
+ uint8_t read_ram(offs_t offset);
+ void write_l(offs_t offset, uint8_t data);
+ void write_h(offs_t offset, uint8_t data);
+ void write_ram(offs_t offset, uint8_t data);
+ uint8_t chip_read(offs_t offset);
+ void chip_write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER(write_irq) { m_irq_callback(state); }
+ uint8_t read_open_bus() { return m_open_bus_callback(); }
// in order to support legacy dumps + add-on CPU dump appended at the end of the file, we
// check if the required data is present and update bank map accordingly
@@ -230,6 +233,7 @@ protected:
private:
devcb_write_line m_irq_callback;
+ devcb_read8 m_open_bus_callback;
};
// ======================> sns_cart_slot_device
diff --git a/src/devices/bus/snes/spc7110.cpp b/src/devices/bus/snes/spc7110.cpp
index a88c06e9250..20d59dc681a 100644
--- a/src/devices/bus/snes/spc7110.cpp
+++ b/src/devices/bus/snes/spc7110.cpp
@@ -1076,7 +1076,7 @@ void sns_rom_spc7110_device::spc7110_update_time(uint8_t offset)
}
}
-READ8_MEMBER(sns_rom_spc7110_device::chip_read)
+uint8_t sns_rom_spc7110_device::chip_read(offs_t offset)
{
uint8_t *ROM = get_rom_base();
uint32_t len = get_rom_size();
@@ -1262,7 +1262,7 @@ READ8_MEMBER(sns_rom_spc7110_device::chip_read)
return 0xff;
}
-WRITE8_MEMBER(sns_rom_spc7110_device::chip_write)
+void sns_rom_spc7110_device::chip_write(offs_t offset, uint8_t data)
{
uint8_t *ROM = get_rom_base();
uint32_t len = get_rom_size();
@@ -1648,7 +1648,7 @@ WRITE8_MEMBER(sns_rom_spc7110_device::chip_write)
}
}
-READ8_MEMBER(sns_rom_spc7110_device::read_l)
+uint8_t sns_rom_spc7110_device::read_l(offs_t offset)
{
if (offset < 0x400000)
return m_rom[rom_bank_map[offset / 0x8000] * 0x8000 + (offset & 0x7fff)];
@@ -1656,7 +1656,7 @@ READ8_MEMBER(sns_rom_spc7110_device::read_l)
return 0xff;
}
-READ8_MEMBER(sns_rom_spc7110_device::read_h)
+uint8_t sns_rom_spc7110_device::read_h(offs_t offset)
{
uint16_t address = offset & 0xfffff;
@@ -1683,12 +1683,12 @@ READ8_MEMBER(sns_rom_spc7110_device::read_h)
}
-READ8_MEMBER( sns_rom_spc7110_device::read_ram )
+uint8_t sns_rom_spc7110_device::read_ram(offs_t offset)
{
return m_nvram[offset & 0x1fff];
}
-WRITE8_MEMBER( sns_rom_spc7110_device::write_ram )
+void sns_rom_spc7110_device::write_ram(offs_t offset, uint8_t data)
{
m_nvram[offset & 0x1fff] = data;
}
diff --git a/src/devices/bus/snes/spc7110.h b/src/devices/bus/snes/spc7110.h
index 249944c8ae7..a7c798244c1 100644
--- a/src/devices/bus/snes/spc7110.h
+++ b/src/devices/bus/snes/spc7110.h
@@ -18,13 +18,13 @@ public:
sns_rom_spc7110_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_READ8_MEMBER(read_ram) override;
- virtual DECLARE_WRITE8_MEMBER(write_ram) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual uint8_t read_ram(offs_t offset) override;
+ virtual void write_ram(offs_t offset, uint8_t data) override;
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
protected:
sns_rom_spc7110_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -199,11 +199,11 @@ public:
// reading and writing
// we just use the spc7110 ones for the moment, pending the split of regs 0x4840-0x4842 (RTC) from the base add-on
-// virtual DECLARE_READ8_MEMBER(read_l);
-// virtual DECLARE_READ8_MEMBER(read_h);
+// virtual uint8_t read_l(offs_t offset);
+// virtual uint8_t read_h(offs_t offset);
-// virtual DECLARE_READ8_MEMBER(chip_read);
-// virtual DECLARE_WRITE8_MEMBER(chip_write);
+// virtual uint8_t chip_read(offs_t offset);
+// virtual void chip_write(offs_t offset, uint8_t data);
protected:
// device-level overrides
diff --git a/src/devices/bus/snes/sufami.cpp b/src/devices/bus/snes/sufami.cpp
index 3e163e150e5..7589fb84fa4 100644
--- a/src/devices/bus/snes/sufami.cpp
+++ b/src/devices/bus/snes/sufami.cpp
@@ -66,12 +66,12 @@ void sns_rom_sufami_device::device_add_mconfig(machine_config &config)
mapper specific handlers
-------------------------------------------------*/
-READ8_MEMBER(sns_rom_sufami_device::read_l)
+uint8_t sns_rom_sufami_device::read_l(offs_t offset)
{
- return read_h(space, offset);
+ return read_h(offset);
}
-READ8_MEMBER(sns_rom_sufami_device::read_h)
+uint8_t sns_rom_sufami_device::read_h(offs_t offset)
{
int bank;
@@ -82,11 +82,11 @@ READ8_MEMBER(sns_rom_sufami_device::read_h)
}
if (offset >= 0x200000 && offset < 0x400000) // SLOT1 STROM
{
- return m_slot1->read_l(space, offset - 0x200000);
+ return m_slot1->read_l(offset - 0x200000);
}
if (offset >= 0x400000 && offset < 0x600000) // SLOT2 STROM
{
- return m_slot2->read_l(space, offset - 0x400000);
+ return m_slot2->read_l(offset - 0x400000);
}
if (offset >= 0x600000 && offset < 0x640000) // SLOT1 RAM
{
@@ -94,7 +94,7 @@ READ8_MEMBER(sns_rom_sufami_device::read_h)
{
offset -= 0x600000;
bank = offset / 0x10000;
- return m_slot1->read_ram(space, bank * 0x8000 + (offset & 0x7fff));
+ return m_slot1->read_ram(bank * 0x8000 + (offset & 0x7fff));
}
}
if (offset >= 0x700000 && offset < 0x740000) // SLOT2 RAM
@@ -103,19 +103,19 @@ READ8_MEMBER(sns_rom_sufami_device::read_h)
{
offset -= 0x700000;
bank = offset / 0x10000;
- return m_slot2->read_ram(space, bank * 0x8000 + (offset & 0x7fff));
+ return m_slot2->read_ram(bank * 0x8000 + (offset & 0x7fff));
}
}
return 0xff;
}
-WRITE8_MEMBER(sns_rom_sufami_device::write_l)
+void sns_rom_sufami_device::write_l(offs_t offset, uint8_t data)
{
- write_h(space, offset, data);
+ write_h(offset, data);
}
-WRITE8_MEMBER(sns_rom_sufami_device::write_h)
+void sns_rom_sufami_device::write_h(offs_t offset, uint8_t data)
{
int bank;
if (offset >= 0x600000 && offset < 0x640000) // SLOT1 RAM
@@ -124,7 +124,7 @@ WRITE8_MEMBER(sns_rom_sufami_device::write_h)
{
offset -= 0x600000;
bank = offset / 0x10000;
- m_slot1->write_ram(space, bank * 0x8000 + (offset & 0x7fff), data);
+ m_slot1->write_ram(bank * 0x8000 + (offset & 0x7fff), data);
}
}
@@ -134,7 +134,7 @@ WRITE8_MEMBER(sns_rom_sufami_device::write_h)
{
offset -= 0x700000;
bank = offset / 0x10000;
- m_slot2->write_ram(space, bank * 0x8000 + (offset & 0x7fff), data);
+ m_slot2->write_ram(bank * 0x8000 + (offset & 0x7fff), data);
}
}
@@ -144,7 +144,7 @@ WRITE8_MEMBER(sns_rom_sufami_device::write_h)
Sufami Turbo 'minicart' emulation
-------------------------------------------------*/
-READ8_MEMBER(sns_rom_strom_device::read_l)
+uint8_t sns_rom_strom_device::read_l(offs_t offset)
{
if (offset < 0x200000)
{
diff --git a/src/devices/bus/snes/sufami.h b/src/devices/bus/snes/sufami.h
index 6b4b3df3bea..1b231131a2b 100644
--- a/src/devices/bus/snes/sufami.h
+++ b/src/devices/bus/snes/sufami.h
@@ -18,10 +18,10 @@ public:
sns_rom_sufami_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
- virtual DECLARE_READ8_MEMBER(read_h) override;
- virtual DECLARE_WRITE8_MEMBER(write_l) override;
- virtual DECLARE_WRITE8_MEMBER(write_h) override;
+ virtual uint8_t read_l(offs_t offset) override;
+ virtual uint8_t read_h(offs_t offset) override;
+ virtual void write_l(offs_t offset, uint8_t data) override;
+ virtual void write_h(offs_t offset, uint8_t data) override;
protected:
// device-level overrides
@@ -43,7 +43,7 @@ public:
sns_rom_strom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(read_l) override;
+ virtual uint8_t read_l(offs_t offset) override;
protected:
// device-level overrides
diff --git a/src/devices/bus/snes/upd.cpp b/src/devices/bus/snes/upd.cpp
index 462ab0faf98..70396938e89 100644
--- a/src/devices/bus/snes/upd.cpp
+++ b/src/devices/bus/snes/upd.cpp
@@ -97,12 +97,12 @@ void sns_rom_setadsp_device::device_start()
// Lo-ROM
// DSP dump contains prg at offset 0 and data at offset 0x2000
-READ32_MEMBER( sns_rom20_necdsp_device::necdsp_prg_r )
+uint32_t sns_rom20_necdsp_device::necdsp_prg_r(offs_t offset)
{
return get_prg(&m_bios[0], offset);
}
-READ16_MEMBER( sns_rom20_necdsp_device::necdsp_data_r )
+uint16_t sns_rom20_necdsp_device::necdsp_data_r(offs_t offset)
{
return get_data(&m_bios[0], offset + 0x2000/2);
}
@@ -132,20 +132,21 @@ void sns_rom20_necdsp_device::dsp_data_map_lorom(address_map &map)
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(sns_rom20_necdsp_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_lorom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_lorom)
-MACHINE_CONFIG_END
+void sns_rom20_necdsp_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp_device::dsp_prg_map_lorom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp_device::dsp_data_map_lorom);
+}
-READ8_MEMBER( sns_rom20_necdsp_device::chip_read )
+uint8_t sns_rom20_necdsp_device::chip_read(offs_t offset)
{
offset &= 0x7fff;
return m_upd7725->snesdsp_read(offset < 0x4000);
}
-WRITE8_MEMBER( sns_rom20_necdsp_device::chip_write )
+void sns_rom20_necdsp_device::chip_write(offs_t offset, uint8_t data)
{
offset &= 0x7fff;
m_upd7725->snesdsp_write(offset < 0x4000, data);
@@ -155,12 +156,12 @@ WRITE8_MEMBER( sns_rom20_necdsp_device::chip_write )
// Hi-ROM
// DSP dump contains prg at offset 0 and data at offset 0x2000
-READ32_MEMBER( sns_rom21_necdsp_device::necdsp_prg_r )
+uint32_t sns_rom21_necdsp_device::necdsp_prg_r(offs_t offset)
{
return get_prg(&m_bios[0], offset);
}
-READ16_MEMBER( sns_rom21_necdsp_device::necdsp_data_r )
+uint16_t sns_rom21_necdsp_device::necdsp_data_r(offs_t offset)
{
return get_data(&m_bios[0], offset + 0x2000/2);
}
@@ -189,20 +190,21 @@ void sns_rom21_necdsp_device::dsp_data_map_hirom(address_map &map)
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(sns_rom21_necdsp_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_hirom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_hirom)
-MACHINE_CONFIG_END
+void sns_rom21_necdsp_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom21_necdsp_device::dsp_prg_map_hirom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_rom21_necdsp_device::dsp_data_map_hirom);
+}
-READ8_MEMBER( sns_rom21_necdsp_device::chip_read )
+uint8_t sns_rom21_necdsp_device::chip_read(offs_t offset)
{
offset &= 0x1fff;
return m_upd7725->snesdsp_read(offset < 0x1000);
}
-WRITE8_MEMBER( sns_rom21_necdsp_device::chip_write )
+void sns_rom21_necdsp_device::chip_write(offs_t offset, uint8_t data)
{
offset &= 0x1fff;
m_upd7725->snesdsp_write(offset < 0x1000, data);
@@ -215,7 +217,7 @@ WRITE8_MEMBER( sns_rom21_necdsp_device::chip_write )
// same as above but additional read/write handling for the add-on chip
-READ8_MEMBER( sns_rom_setadsp_device::chip_read )
+uint8_t sns_rom_setadsp_device::chip_read(offs_t offset)
{
if (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000)
m_upd96050->snesdsp_read((offset & 0x01) ? false : true);
@@ -234,7 +236,7 @@ READ8_MEMBER( sns_rom_setadsp_device::chip_read )
}
-WRITE8_MEMBER( sns_rom_setadsp_device::chip_write )
+void sns_rom_setadsp_device::chip_write(offs_t offset, uint8_t data)
{
if (offset >= 0x600000 && offset < 0x680000 && (offset & 0xffff) < 0x4000)
{
@@ -265,12 +267,12 @@ WRITE8_MEMBER( sns_rom_setadsp_device::chip_write )
// DSP dump contains prg at offset 0 and data at offset 0x10000
-READ32_MEMBER( sns_rom_setadsp_device::setadsp_prg_r )
+uint32_t sns_rom_setadsp_device::setadsp_prg_r(offs_t offset)
{
return get_prg(&m_bios[0], offset);
}
-READ16_MEMBER( sns_rom_setadsp_device::setadsp_data_r )
+uint16_t sns_rom_setadsp_device::setadsp_data_r(offs_t offset)
{
return get_data(&m_bios[0], offset + 0x10000/2);
}
@@ -300,18 +302,20 @@ void sns_rom_setadsp_device::st01x_data_map(address_map &map)
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(sns_rom_seta10dsp_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD96050, 10000000)
- MCFG_DEVICE_PROGRAM_MAP(st01x_prg_map)
- MCFG_DEVICE_DATA_MAP(st01x_data_map)
-MACHINE_CONFIG_END
+void sns_rom_seta10dsp_device::device_add_mconfig(machine_config &config)
+{
+ UPD96050(config, m_upd96050, 10000000);
+ m_upd96050->set_addrmap(AS_PROGRAM, &sns_rom_seta10dsp_device::st01x_prg_map);
+ m_upd96050->set_addrmap(AS_DATA, &sns_rom_seta10dsp_device::st01x_data_map);
+}
-MACHINE_CONFIG_START(sns_rom_seta11dsp_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD96050, 15000000)
- MCFG_DEVICE_PROGRAM_MAP(st01x_prg_map)
- MCFG_DEVICE_DATA_MAP(st01x_data_map)
-MACHINE_CONFIG_END
+void sns_rom_seta11dsp_device::device_add_mconfig(machine_config &config)
+{
+ UPD96050(config, m_upd96050, 15000000);
+ m_upd96050->set_addrmap(AS_PROGRAM, &sns_rom_seta11dsp_device::st01x_prg_map);
+ m_upd96050->set_addrmap(AS_DATA, &sns_rom_seta11dsp_device::st01x_data_map);
+}
// To make faster DSP access to its internal rom, let's install read banks and map m_bios there with correct byte order
@@ -411,53 +415,61 @@ sns_rom_seta11dsp_legacy_device::sns_rom_seta11dsp_legacy_device(const machine_c
}
-MACHINE_CONFIG_START(sns_rom20_necdsp1_legacy_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_lorom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_lorom)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(sns_rom20_necdsp1b_legacy_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_lorom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_lorom)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(sns_rom20_necdsp2_legacy_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_lorom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_lorom)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(sns_rom20_necdsp3_legacy_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_lorom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_lorom)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(sns_rom20_necdsp4_legacy_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_lorom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_lorom)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(sns_rom21_necdsp1_legacy_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD7725, 8000000)
- MCFG_DEVICE_PROGRAM_MAP(dsp_prg_map_hirom)
- MCFG_DEVICE_DATA_MAP(dsp_data_map_hirom)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(sns_rom_seta10dsp_legacy_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD96050, 10000000)
- MCFG_DEVICE_PROGRAM_MAP(st01x_prg_map)
- MCFG_DEVICE_DATA_MAP(st01x_data_map)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(sns_rom_seta11dsp_legacy_device::device_add_mconfig)
- MCFG_DEVICE_ADD("dsp", UPD96050, 15000000)
- MCFG_DEVICE_PROGRAM_MAP(st01x_prg_map)
- MCFG_DEVICE_DATA_MAP(st01x_data_map)
-MACHINE_CONFIG_END
+void sns_rom20_necdsp1_legacy_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp1_legacy_device::dsp_prg_map_lorom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp1_legacy_device::dsp_data_map_lorom);
+}
+
+void sns_rom20_necdsp1b_legacy_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp1b_legacy_device::dsp_prg_map_lorom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp1b_legacy_device::dsp_data_map_lorom);
+}
+
+void sns_rom20_necdsp2_legacy_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp2_legacy_device::dsp_prg_map_lorom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp2_legacy_device::dsp_data_map_lorom);
+}
+
+void sns_rom20_necdsp3_legacy_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp3_legacy_device::dsp_prg_map_lorom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp3_legacy_device::dsp_data_map_lorom);
+}
+
+void sns_rom20_necdsp4_legacy_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom20_necdsp4_legacy_device::dsp_prg_map_lorom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_rom20_necdsp4_legacy_device::dsp_data_map_lorom);
+}
+
+void sns_rom21_necdsp1_legacy_device::device_add_mconfig(machine_config &config)
+{
+ UPD7725(config, m_upd7725, 8000000);
+ m_upd7725->set_addrmap(AS_PROGRAM, &sns_rom21_necdsp1_legacy_device::dsp_prg_map_hirom);
+ m_upd7725->set_addrmap(AS_DATA, &sns_rom21_necdsp1_legacy_device::dsp_data_map_hirom);
+}
+
+void sns_rom_seta10dsp_legacy_device::device_add_mconfig(machine_config &config)
+{
+ UPD96050(config, m_upd96050, 10000000);
+ m_upd96050->set_addrmap(AS_PROGRAM, &sns_rom_seta10dsp_legacy_device::st01x_prg_map);
+ m_upd96050->set_addrmap(AS_DATA, &sns_rom_seta10dsp_legacy_device::st01x_data_map);
+}
+
+void sns_rom_seta11dsp_legacy_device::device_add_mconfig(machine_config &config)
+{
+ UPD96050(config, m_upd96050, 15000000);
+ m_upd96050->set_addrmap(AS_PROGRAM, &sns_rom_seta11dsp_legacy_device::st01x_prg_map);
+ m_upd96050->set_addrmap(AS_DATA, &sns_rom_seta11dsp_legacy_device::st01x_data_map);
+}
ROM_START( snes_dsp1 )
diff --git a/src/devices/bus/snes/upd.h b/src/devices/bus/snes/upd.h
index dfc55466225..65dd780c725 100644
--- a/src/devices/bus/snes/upd.h
+++ b/src/devices/bus/snes/upd.h
@@ -28,18 +28,18 @@ protected:
virtual void speedup_addon_bios_access() override;
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
- virtual DECLARE_READ32_MEMBER(necdsp_prg_r);
- virtual DECLARE_READ16_MEMBER(necdsp_data_r);
+ uint32_t necdsp_prg_r(offs_t offset);
+ uint16_t necdsp_data_r(offs_t offset);
void dsp_data_map_lorom(address_map &map);
void dsp_prg_map_lorom(address_map &map);
-private:
required_device<upd7725_device> m_upd7725;
+private:
std::vector<uint32_t> m_dsp_prg;
std::vector<uint16_t> m_dsp_data;
};
@@ -62,18 +62,18 @@ protected:
virtual void speedup_addon_bios_access() override;
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
- virtual DECLARE_READ32_MEMBER(necdsp_prg_r);
- virtual DECLARE_READ16_MEMBER(necdsp_data_r);
+ uint32_t necdsp_prg_r(offs_t offset);
+ uint16_t necdsp_data_r(offs_t offset);
void dsp_data_map_hirom(address_map &map);
void dsp_prg_map_hirom(address_map &map);
-private:
required_device<upd7725_device> m_upd7725;
+private:
std::vector<uint32_t> m_dsp_prg;
std::vector<uint16_t> m_dsp_data;
};
@@ -93,18 +93,18 @@ protected:
virtual void device_start() override;
// additional reading and writing
- virtual DECLARE_READ8_MEMBER(chip_read) override;
- virtual DECLARE_WRITE8_MEMBER(chip_write) override;
+ virtual uint8_t chip_read(offs_t offset) override;
+ virtual void chip_write(offs_t offset, uint8_t data) override;
- virtual DECLARE_READ32_MEMBER(setadsp_prg_r);
- virtual DECLARE_READ16_MEMBER(setadsp_data_r);
+ virtual uint32_t setadsp_prg_r(offs_t offset);
+ virtual uint16_t setadsp_data_r(offs_t offset);
void st01x_data_map(address_map &map);
void st01x_prg_map(address_map &map);
-private:
required_device<upd96050_device> m_upd96050;
+private:
std::vector<uint32_t> m_dsp_prg;
std::vector<uint16_t> m_dsp_data;
};