diff options
Diffstat (limited to 'src/devices/bus/nes/mmc1.cpp')
-rw-r--r-- | src/devices/bus/nes/mmc1.cpp | 94 |
1 files changed, 44 insertions, 50 deletions
diff --git a/src/devices/bus/nes/mmc1.cpp b/src/devices/bus/nes/mmc1.cpp index bfd2992d0a8..c2cbccf77e9 100644 --- a/src/devices/bus/nes/mmc1.cpp +++ b/src/devices/bus/nes/mmc1.cpp @@ -27,12 +27,11 @@ #include "mmc1.h" #ifdef NES_PCB_DEBUG -#define VERBOSE 1 +#define VERBOSE (LOG_GENERAL) #else -#define VERBOSE 0 +#define VERBOSE (0) #endif - -#define LOG_MMC(x) do { if (VERBOSE) logerror x; } while (0) +#include "logmacro.h" //------------------------------------------------- @@ -45,17 +44,17 @@ DEFINE_DEVICE_TYPE(NES_SZROM, nes_szrom_device, "nes_szrom", "NES Cart SZROM (MM -nes_sxrom_device::nes_sxrom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) +nes_sxrom_device::nes_sxrom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : nes_nrom_device(mconfig, type, tag, owner, clock), m_reg_write_enable(0), m_latch(0), m_count(0) { } -nes_sxrom_device::nes_sxrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +nes_sxrom_device::nes_sxrom_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : nes_sxrom_device(mconfig, NES_SXROM, tag, owner, clock) { } -nes_sorom_device::nes_sorom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +nes_sorom_device::nes_sorom_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : nes_sxrom_device(mconfig, NES_SOROM, tag, owner, clock) { } @@ -78,18 +77,17 @@ void nes_sxrom_device::device_start() void nes_sxrom_device::pcb_reset() { - m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; - m_latch = 0; m_count = 0; m_reg[0] = 0x0f; - m_reg[1] = m_reg[2] = 0; - m_reg[3] = m_mmc1_type == mmc1_type::MMC1C ? 0x10 : 0x00; // WRAM disabled by default on MMC1C + m_reg[1] = 0; + m_reg[2] = 0; + m_reg[3] = 0; m_reg_write_enable = 1; - set_nt_mirroring(PPU_MIRROR_HORZ); set_chr(); set_prg(); + set_mirror(); } @@ -120,7 +118,7 @@ void nes_sxrom_device::set_prg(int prg_base, int prg_mask) { u8 bank = prg_base | (m_reg[3] & prg_mask); - switch ((m_reg[0] >> 2) & 3) + switch (BIT(m_reg[0], 2, 2)) { case 0: case 1: @@ -139,7 +137,7 @@ void nes_sxrom_device::set_prg(int prg_base, int prg_mask) void nes_sxrom_device::set_prg() { - uint8_t prg_mode, prg_offset; + u8 prg_mode, prg_offset; prg_mode = m_reg[0] & 0x0c; /* prg_mode&0x8 determines bank size: 32k (if 0) or 16k (if 1)? when in 16k mode, @@ -184,21 +182,22 @@ void nes_sxrom_device::set_chr(int chr_base, int chr_mask) chr8((chr_base | (m_reg[1] & chr_mask)) >> 1, m_chr_source); } -// this allows for easier implementation of the NES-EVENT board used for Nintento World Championships +void nes_sxrom_device::set_mirror() +{ + static constexpr u8 mirr[4] = { PPU_MIRROR_LOW, PPU_MIRROR_HIGH, PPU_MIRROR_VERT, PPU_MIRROR_HORZ }; + + set_nt_mirroring(mirr[m_reg[0] & 0x03]); +} + +// this allows for easier implementation of MMC1 subclasses void nes_sxrom_device::update_regs(int reg) { switch (reg) { case 0: - switch (m_reg[0] & 0x03) - { - case 0: set_nt_mirroring(PPU_MIRROR_LOW); break; - case 1: set_nt_mirroring(PPU_MIRROR_HIGH); break; - case 2: set_nt_mirroring(PPU_MIRROR_VERT); break; - case 3: set_nt_mirroring(PPU_MIRROR_HORZ); break; - } set_chr(); set_prg(); + set_mirror(); break; case 1: set_chr(); @@ -213,9 +212,9 @@ void nes_sxrom_device::update_regs(int reg) } } -void nes_sxrom_device::write_h(offs_t offset, uint8_t data) +void nes_sxrom_device::write_h(offs_t offset, u8 data) { - LOG_MMC(("sxrom write_h, offset: %04x, data: %02x\n", offset, data)); + LOG("sxrom write_h, offset: %04x, data: %02x\n", offset, data); // There is only one latch and shift counter, shared amongst the 4 regs (testcase: Space Shuttle) @@ -235,7 +234,6 @@ void nes_sxrom_device::write_h(offs_t offset, uint8_t data) if (data & 0x80) { m_count = 0; - m_latch = 0; // Set reg at 0x8000 to size 16k and lower half swap - needed for Robocop 3, Dynowars m_reg[0] |= 0x0c; @@ -243,26 +241,22 @@ void nes_sxrom_device::write_h(offs_t offset, uint8_t data) return; } - if (m_count < 5) - { - if (m_count == 0) m_latch = 0; - m_latch >>= 1; - m_latch |= (data & 0x01) ? 0x10 : 0x00; - m_count++; - } + m_latch >>= 1; + m_latch |= (data & 1) << 4; + m_count = (m_count + 1) % 5; - if (m_count == 5) + if (!m_count) { - m_reg[(offset & 0x6000) >> 13] = m_latch; - update_regs((offset & 0x6000) >> 13); - m_count = 0; + int reg = BIT(offset, 13, 2); + m_reg[reg] = m_latch; + update_regs(reg); } } -void nes_sxrom_device::write_m(offs_t offset, uint8_t data) +void nes_sxrom_device::write_m(offs_t offset, u8 data) { - uint8_t bank = (m_reg[1] >> 2) & 3; - LOG_MMC(("sxrom write_m, offset: %04x, data: %02x\n", offset, data)); + u8 bank = BIT(m_reg[1], 2, 2); + LOG("sxrom write_m, offset: %04x, data: %02x\n", offset, data); if (!BIT(m_reg[3], 4) || m_mmc1_type == mmc1_type::MMC1A) // WRAM enabled { @@ -273,10 +267,10 @@ void nes_sxrom_device::write_m(offs_t offset, uint8_t data) } } -uint8_t nes_sxrom_device::read_m(offs_t offset) +u8 nes_sxrom_device::read_m(offs_t offset) { - uint8_t bank = (m_reg[1] >> 2) & 3; - LOG_MMC(("sxrom read_m, offset: %04x\n", offset)); + u8 bank = BIT(m_reg[1], 2, 2); + LOG("sxrom read_m, offset: %04x\n", offset); if (!BIT(m_reg[3], 4) || m_mmc1_type == mmc1_type::MMC1A) // WRAM enabled { @@ -290,10 +284,10 @@ uint8_t nes_sxrom_device::read_m(offs_t offset) } // SOROM has two RAM banks, the first is not battery backed up, the second is. -void nes_sorom_device::write_m(offs_t offset, uint8_t data) +void nes_sorom_device::write_m(offs_t offset, u8 data) { - uint8_t type = BIT(m_reg[0], 4) ? BIT(m_reg[1], 4) : BIT(m_reg[1], 3); - LOG_MMC(("sorom write_m, offset: %04x, data: %02x\n", offset, data)); + u8 type = BIT(m_reg[0], 4) ? BIT(m_reg[1], 4) : BIT(m_reg[1], 3); + LOG("sorom write_m, offset: %04x, data: %02x\n", offset, data); if (!BIT(m_reg[3], 4) || m_mmc1_type == mmc1_type::MMC1A) // WRAM enabled { @@ -304,10 +298,10 @@ void nes_sorom_device::write_m(offs_t offset, uint8_t data) } } -uint8_t nes_sorom_device::read_m(offs_t offset) +u8 nes_sorom_device::read_m(offs_t offset) { - uint8_t type = BIT(m_reg[0], 4) ? BIT(m_reg[1], 4) : BIT(m_reg[1], 3); - LOG_MMC(("sorom read_m, offset: %04x\n", offset)); + u8 type = BIT(m_reg[0], 4) ? BIT(m_reg[1], 4) : BIT(m_reg[1], 3); + LOG("sorom read_m, offset: %04x\n", offset); if (!BIT(m_reg[3], 4) || m_mmc1_type == mmc1_type::MMC1A) // WRAM enabled { @@ -323,7 +317,7 @@ uint8_t nes_sorom_device::read_m(offs_t offset) // SZROM has two RAM banks, the first is not battery backed up, the second is. void nes_szrom_device::write_m(offs_t offset, u8 data) { - LOG_MMC(("szrom write_m, offset: %04x, data: %02x\n", offset, data)); + LOG("szrom write_m, offset: %04x, data: %02x\n", offset, data); if (!BIT(m_reg[3], 4) || m_mmc1_type == mmc1_type::MMC1A) // WRAM enabled { @@ -336,7 +330,7 @@ void nes_szrom_device::write_m(offs_t offset, u8 data) u8 nes_szrom_device::read_m(offs_t offset) { - LOG_MMC(("szrom read_m, offset: %04x\n", offset)); + LOG("szrom read_m, offset: %04x\n", offset); if (!BIT(m_reg[3], 4) || m_mmc1_type == mmc1_type::MMC1A) // WRAM enabled { |