summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/bus/nes/act53.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/bus/nes/act53.h')
-rw-r--r--src/devices/bus/nes/act53.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/devices/bus/nes/act53.h b/src/devices/bus/nes/act53.h
index e3b395ce1cd..3d9c8d53155 100644
--- a/src/devices/bus/nes/act53.h
+++ b/src/devices/bus/nes/act53.h
@@ -12,7 +12,7 @@ class nes_action53_device : public nes_nrom_device
{
public:
// construction/destruction
- nes_action53_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ nes_action53_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_start() override;
@@ -24,8 +24,8 @@ public:
private:
void update_prg();
void update_mirr();
- UINT8 m_sel;
- UINT8 m_reg[4];
+ uint8_t m_sel;
+ uint8_t m_reg[4];
};
#n135'>135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027
/*
    experimental LISA driver

    This driver runs most ROM test code successfully, and it loads the boot
    file, but it locks when booting from Lisa OS (probably because of floppy
    write bug).  MacWorks boots fine, though (I think it looks when we
    attempt to write to floppy, too).

    TODO :
    * fix floppy write bug
    * *** Boot and run LisaTest !!! ***
    * finish MMU (does not switch to bank 0 on 68k trap) --- fixed in June 2003???
    * support hard disk to boot office system
    * finish keyboard/mouse support
    * finish clock support
    * write SCC support
    * finalize sound support (involves adding new features to the 6522 VIA core)
    * fix warm-reset (I think I need to use a callback when 68k RESET
      instruction is called)
    * write support for additionnal hardware (hard disk, etc...)
    * emulate LISA1 (?)
    * optimize MMU emulation !

    DONE (just a reminder to uplift my spirit) :
    * the lion's share of MMU (spring 2000)
    * video hardware (except contrast control) (spring 2000)
    * LISA2/Mac XL floppy hardware (november 2000)

    Credits :
    * the lisaemu project (<http://www.sundernet.com/>) has gathered much
       hardware information (books, schematics...) without which this driver
       could never have been written
    * The driver raised the interest of several MESS regulars (Paul Lunga,
      Dennis Munsie...) who supported my feeble efforts

    Raphael Nabet, 2000-2003
*/

#include "emu.h"
#include "includes/lisa.h"
#include "machine/6522via.h"
#include "machine/applefdc.h"
#include "devices/sonydriv.h"
#include "cpu/m68000/m68000.h"
#include "sound/speaker.h"


/*
    pointers with RAM & ROM location
*/

/* up to 2MB of 68k RAM (normally 1MB or 512kb), generally 16kb of ROM */

/* offsets in "maincpu" */
#define RAM_OFFSET 0x004000
#define ROM_OFFSET 0x000000

/* 1kb of RAM for 6504 floppy disk controller (shared with 68000), and 4kb of
ROM (8kb on some boards, but then only one 4kb bank is selected, according to
the drive type (TWIGGY or 3.5'')) */

/* special ROM (includes S/N) */


/*
    MMU regs
*/





/*
    parity logic - only hard errors are emulated for now, since
    a) the ROMs power-up test only tests hard errors
    b) most memory boards do not use soft errors (i.e. they only generate 1
      parity bit to detect errors, instead of generating several ECC bits to
      fix errors)
*/




/*
    video
*/


/*
    2 vias : one is used for communication with COPS ; the other may be used to interface
    a hard disk
*/

static READ8_DEVICE_HANDLER(COPS_via_in_b);
static WRITE8_DEVICE_HANDLER(COPS_via_out_a);
static WRITE8_DEVICE_HANDLER(COPS_via_out_b);
static WRITE8_DEVICE_HANDLER(COPS_via_out_ca2);
static WRITE8_DEVICE_HANDLER(COPS_via_out_cb2);
static void COPS_via_irq_func(device_t *device, int val);
static READ8_DEVICE_HANDLER(parallel_via_in_b);


const via6522_interface lisa_via6522_0_intf =
{
	/* COPS via */
	DEVCB_NULL, DEVCB_HANDLER(COPS_via_in_b),
	DEVCB_NULL, DEVCB_NULL,
	DEVCB_NULL, DEVCB_NULL,
	DEVCB_HANDLER(COPS_via_out_a), DEVCB_HANDLER(COPS_via_out_b),
	DEVCB_HANDLER(COPS_via_out_ca2), DEVCB_HANDLER(COPS_via_out_cb2),
	DEVCB_NULL, DEVCB_NULL,
	DEVCB_LINE(COPS_via_irq_func),
};

const via6522_interface lisa_via6522_1_intf =
{
	/* parallel interface via - incomplete */
	DEVCB_NULL, DEVCB_HANDLER(parallel_via_in_b),
	DEVCB_NULL, DEVCB_NULL,
	DEVCB_NULL, DEVCB_NULL,
	DEVCB_NULL, DEVCB_NULL,
	DEVCB_NULL, DEVCB_NULL,
	DEVCB_NULL, DEVCB_NULL,
};

/*
    floppy disk interface
*/




/*
    lisa model identification
*/
enum lisa_model_t
{
	/*lisa1,*/		/* twiggy floppy drive */
	lisa2,		/* 3.5'' Sony floppy drive */
	lisa210,	/* modified I/O board, and internal 10Meg drive */
	mac_xl		/* same as above with modified video */
};



/*
    protos
*/





/*
    Interrupt handling
*/

static void lisa_field_interrupts(running_machine &machine)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	if (state->m_parity_error_pending)
		return;	/* don't touch anything... */

#if 0
	if (RSIR)
		// serial interrupt
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_6, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
	else if (int0)
		// external interrupt
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_5, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
	else if (int1)
		// external interrupt
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_4, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
	else if (int2)
		// external interrupt
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_3, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
	else
#endif
	if (state->m_KBIR)
		/* COPS VIA interrupt */
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_2, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
	else if (state->m_FDIR || state->m_VTIR)
		/* floppy disk or VBl */
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_1, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
	else
		/* clear all interrupts */
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_1, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
}

static void set_parity_error_pending(running_machine &machine, int value)
{
	lisa_state *state = machine.driver_data<lisa_state>();
#if 1
	/* does not work well due to bugs in 68k cores */
	state->m_parity_error_pending = value;
	if (state->m_parity_error_pending)
	{
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_7, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
	}
	else
	{
		machine.device("maincpu")->execute().set_input_line(M68K_IRQ_7, CLEAR_LINE);
	}
#else
	/* work-around... */
	if ((! state->m_parity_error_pending) && value)
	{
		state->m_parity_error_pending = 1;
		machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_7, PULSE_LINE, M68K_INT_ACK_AUTOVECTOR);
	}
	else if (state->m_parity_error_pending && (! value))
	{
		state->m_parity_error_pending = 0;
		lisa_field_interrupts(machine);
	}
#endif
}

INLINE void set_VTIR(running_machine &machine, int value)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	if (state->m_VTIR != value)
	{
		state->m_VTIR = value;
		if (state->m_VTIR==1)
			lisa_field_interrupts(machine);
	}
}



/*
    keyboard interface (COPS simulation; our COPS CPU core is too broken and too esoteric to emulate this correctly, I tried)
*/

INLINE void COPS_send_data_if_possible(running_machine &machine)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	via6522_device *via_0 = machine.device<via6522_device>("via6522_0");
	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);

	if ((! state->m_hold_COPS_data) && state->m_fifo_size && (! state->m_COPS_Ready))
	{
//        printf("COPsim: sending %02x to VIA\n", state->m_fifo_data[state->m_fifo_head]);

		via_0->write_porta(*space, 0, state->m_fifo_data[state->m_fifo_head]);	/* output data */
		if (state->m_fifo_head == state->m_mouse_data_offset)
			state->m_mouse_data_offset = -1;	/* we just phased out the mouse data in buffer */
		state->m_fifo_head = (state->m_fifo_head+1) & 0x7;
		state->m_fifo_size--;
		via_0->write_ca1(1);		/* pulse ca1 so that VIA reads it */
		via_0->write_ca1(0);		/* BTW, I have no idea how a real COPS does it ! */
	}
}

/* send data (queue it into the FIFO if needed) */
static void COPS_queue_data(running_machine &machine, const UINT8 *data, int len)
{
	lisa_state *state = machine.driver_data<lisa_state>();
#if 0
	if (state->m_fifo_size + len <= 8)
#else
	/* trash old data */
	while (state->m_fifo_size > 8 - len)
	{
		if (state->m_fifo_head == state->m_mouse_data_offset)
			state->m_mouse_data_offset = -1;	/* we just phased out the mouse data in buffer */
		state->m_fifo_head = (state->m_fifo_head+1) & 0x7;
		state->m_fifo_size--;
	}
#endif

	{
//      printf("Adding %d bytes of data to FIFO\n", len);

		while (len--)
		{
			state->m_fifo_data[state->m_fifo_tail] = * (data++);
			state->m_fifo_tail = (state->m_fifo_tail+1) & 0x7;
			state->m_fifo_size++;
		}

		/*logerror("COPS_queue_data : trying to send data to VIA\n");*/
		COPS_send_data_if_possible(machine);
	}
}

/*
    scan_keyboard()

    scan the keyboard, and add key transition codes to buffer as needed
*/
/* shamelessly stolen from machine/mac.c :-) */

/* keyboard matrix to detect transition */

static void scan_keyboard(running_machine &machine)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	int i, j;
	int keybuf;
	UINT8 keycode;
	static const char *const keynames[] = { "LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7" };

	if (! state->m_COPS_force_unplug)
		for (i=0; i<8; i++)
		{
			keybuf = machine.root_device().ioport(keynames[i])->read();

			if (keybuf != state->m_key_matrix[i])
			{	/* if state has changed, find first bit which has changed */
				/*logerror("keyboard state changed, %d %X\n", i, keybuf);*/

				for (j=0; j<16; j++)
				{
					if (((keybuf ^ state->m_key_matrix[i]) >> j) & 1)
					{
						/* update key_matrix */
						state->m_key_matrix[i] = (state->m_key_matrix[i] & ~ (1 << j)) | (keybuf & (1 << j));

						/* create key code */
						keycode = (i << 4) | j;
						if (keybuf & (1 << j))
						{	/* key down */
							keycode |= 0x80;
						}
#if 0
						if (keycode == state->m_NMIcode)
						{	/* generate NMI interrupt */
							machine.device("maincpu")->execute().set_input_line(M68K_IRQ_7, PULSE_LINE);
							machine.device("maincpu")->execute().set_input_line_vector(M68K_IRQ_7, M68K_INT_ACK_AUTOVECTOR);
						}
#endif
						COPS_queue_data(machine, & keycode, 1);
					}
				}
			}
		}
}

/* handle mouse moves */
/* shamelessly stolen from machine/mac.c :-) */
static TIMER_CALLBACK(handle_mouse)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	int diff_x = 0, diff_y = 0;
	int new_mx, new_my;

#if 0
	if (state->m_COPS_force_unplug)
		return;	/* ???? */
#endif

	new_mx = machine.root_device().ioport("MOUSE_X")->read();
	new_my = machine.root_device().ioport("MOUSE_Y")->read();

	/* see if it moved in the x coord */
	if (new_mx != state->m_last_mx)
	{
		diff_x = new_mx - state->m_last_mx;

		/* check for wrap */
		if (diff_x > 0x80)
			diff_x = 0x100-diff_x;
		if  (diff_x < -0x80)
			diff_x = -0x100-diff_x;

		state->m_last_mx = new_mx;
	}
	/* see if it moved in the y coord */
	if (new_my != state->m_last_my)
	{
		diff_y = new_my - state->m_last_my;

		/* check for wrap */
		if (diff_y > 0x80)
			diff_y = 0x100-diff_y;
		if  (diff_y < -0x80)
			diff_y = -0x100-diff_y;

		state->m_last_my = new_my;
	}

	/* update any remaining count and then return */
	if (diff_x || diff_y)
	{
		if (state->m_mouse_data_offset != -1)
		{
			state->m_fifo_data[state->m_mouse_data_offset] += diff_x;
			state->m_fifo_data[(state->m_mouse_data_offset+1) & 0x7] += diff_y;
		}
		else
		{
#if 0
			if (state->m_fifo_size <= 5)
#else
			/* trash old data */
			while (state->m_fifo_size > 5)
			{
				state->m_fifo_head = (state->m_fifo_head+1) & 0x7;
				state->m_fifo_size--;
			}
#endif

			{
				/*logerror("Adding 3 bytes of mouse data to FIFO\n");*/

				state->m_fifo_data[state->m_fifo_tail] = 0;
				state->m_mouse_data_offset = state->m_fifo_tail = (state->m_fifo_tail+1) & 0x7;
				state->m_fifo_data[state->m_fifo_tail] = diff_x;
				state->m_fifo_tail = (state->m_fifo_tail+1) & 0x7;
				state->m_fifo_data[state->m_fifo_tail] = diff_y;
				state->m_fifo_tail = (state->m_fifo_tail+1) & 0x7;
				state->m_fifo_size += 3;

				/*logerror("handle_mouse : trying to send data to VIA\n");*/
				COPS_send_data_if_possible(machine);
			}
			/* else, mouse data is lost forever (correct ??) */
		}
	}
}

/* read command from the VIA port A */
static TIMER_CALLBACK(read_COPS_command)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	int command;
	via6522_device *via_0 = machine.device<via6522_device>("via6522_0");
	address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);

	state->m_COPS_Ready = 0;

	/*logerror("read_COPS_command : trying to send data to VIA\n");*/
	COPS_send_data_if_possible(machine);

	/* some pull-ups allow the COPS to read 1s when the VIA port is not set as output */
	command = (state->m_COPS_command | (~ via_0->read(*space, VIA_DDRA))) & 0xff;

//    printf("Dropping Ready, command = %02x\n", command);

	if (command & 0x80)
		return;	/* NOP */

	if (command & 0xF0)
	{	/* commands with 4-bit immediate operand */
		int immediate = command & 0xf;

		switch ((command & 0xF0) >> 4)
		{
		case 0x1:	/* write clock data */
			if (state->m_clock_regs.clock_write_ptr != -1)
			{
				switch (state->m_clock_regs.clock_write_ptr)
				{
				case 0:
				case 1:
				case 2:
				case 3:
				case 4:
					/* alarm */
					state->m_clock_regs.alarm &= ~ (0xf << (4 * (4 - state->m_clock_regs.clock_write_ptr)));
					state->m_clock_regs.alarm |= immediate << (4 * (4 - state->m_clock_regs.clock_write_ptr));
					break;
				case 5:
					/* year */
					state->m_clock_regs.years = immediate;
					break;
				case 6:
					/* day */
					state->m_clock_regs.days1 = immediate;
					break;
				case 7:
					/* day */
					state->m_clock_regs.days2 = immediate;
					break;
				case 8:
					/* day */
					state->m_clock_regs.days3 = immediate;
					break;
				case 9:
					/* hours */
					state->m_clock_regs.hours1 = immediate;
					break;
				case 10:
					/* hours */
					state->m_clock_regs.hours2 = immediate;
					break;
				case 11:
					/* minutes */
					state->m_clock_regs.minutes1 = immediate;
					break;
				case 12:
					/* minutes */
					state->m_clock_regs.minutes1 = immediate;
					break;
				case 13:
					/* seconds */
					state->m_clock_regs.seconds1 = immediate;
					break;
				case 14:
					/* seconds */
					state->m_clock_regs.seconds2 = immediate;
					break;
				case 15:
					/* tenth */
					state->m_clock_regs.tenths = immediate;
					break;
				}
				state->m_clock_regs.clock_write_ptr++;
				if (state->m_clock_regs.clock_write_ptr == 16)
					state->m_clock_regs.clock_write_ptr = -1;
			}

			break;

		case 0x2:	/* set clock mode */
			if (immediate & 0x8)
			{	/* start setting the clock */
				state->m_clock_regs.clock_write_ptr = 0;
			}
			else
			{	/* clock write disabled */
				state->m_clock_regs.clock_write_ptr = -1;
			}

			if (! (immediate & 0x4))
			{	/* enter sleep mode */
				/* ... */
			}
			else
			{	/* wake up */
				/* should never happen */
			}

			state->m_clock_regs.clock_mode = (clock_mode_t)(immediate & 0x3);
			break;

#if 0
		/* LED commands - not implemented in production LISAs */
		case 0x3:	/* write 4 keyboard LEDs */
			keyboard_leds = (keyboard_leds & 0x0f) | (immediate << 4);
			break;

		case 0x4:	/* write next 4 keyboard LEDs */
			keyboard_leds = (keyboard_leds & 0xf0) | immediate;
			break;
#endif

		case 0x5:	/* set high nibble of NMI character to nnnn */
			state->m_NMIcode = (state->m_NMIcode & 0x0f) | (immediate << 4);
			break;

		case 0x6:	/* set low nibble of NMI character to nnnn */
			state->m_NMIcode = (state->m_NMIcode & 0xf0) | immediate;
			break;

		case 0x7:	/* send mouse command */
			if (immediate & 0x8)
				state->m_mouse_timer->adjust(attotime::zero, 0, attotime::from_msec((immediate & 0x7)*4)); /* enable mouse */
			else
				state->m_mouse_timer->reset();
			break;
		}
	}
	else
	{	/* operand-less commands */
		switch (command)
		{
		case 0x0:	/*Turn I/O port on (???) */

			break;

		case 0x1:	/*Turn I/O port off (???) */

			break;

		case 0x2:	/* Read clock data */
			{
				/* format and send reply */

				UINT8 reply[7];

				reply[0] = 0x80;
				reply[1] = 0xE0 | state->m_clock_regs.years;
				reply[2] = (state->m_clock_regs.days1 << 4) | state->m_clock_regs.days2;
				reply[3] = (state->m_clock_regs.days3 << 4) | state->m_clock_regs.hours1;
				reply[4] = (state->m_clock_regs.hours2 << 4) | state->m_clock_regs.minutes1;
				reply[5] = (state->m_clock_regs.minutes2 << 4) | state->m_clock_regs.seconds1;
				reply[6] = (state->m_clock_regs.seconds2 << 4) | state->m_clock_regs.tenths;

				COPS_queue_data(machine, reply, 7);
			}
			break;
		}
	}
}

/* this timer callback raises the COPS Ready line, which tells the COPS is about to read a command */
static TIMER_CALLBACK(set_COPS_ready)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	state->m_COPS_Ready = 1;

	/* impulsion width : +/- 20us */
	machine.scheduler().timer_set(attotime::from_usec(20), FUNC(read_COPS_command));
}

static void reset_COPS(lisa_state *state)
{
	int i;

	state->m_fifo_size = 0;
	state->m_fifo_head = 0;
	state->m_fifo_tail = 0;
	state->m_mouse_data_offset = -1;

	for (i=0; i<8; i++)
		state->m_key_matrix[i] = 0;

	state->m_mouse_timer->reset();
}

static void unplug_keyboard(running_machine &machine)
{
	static const UINT8 cmd[2] =
	{
		0x80,	/* RESET code */
		0xFD	/* keyboard unplugged */
	};

	COPS_queue_data(machine, cmd, 2);
}


static void plug_keyboard(running_machine &machine)
{
	/*
        possible keyboard IDs according to Lisa Hardware Manual and boot ROM source code

        2 MSBs : "mfg code" (-> 0x80 for Keytronics, 0x00 for "APD")
        6 LSBs :
            0x0x : "old US keyboard"
            0x3f : US keyboard
            0x3d : Canadian keyboard
            0x2f : UK
            0x2e : German
            0x2d : French
            0x27 : Swiss-French
            0x26 : Swiss-German
            unknown : spanish, US dvorak, italian & swedish
    */

	static const UINT8 cmd[2] =
	{
		0x80,	/* RESET code */
		0x3f	/* keyboard ID - US for now */
	};

	COPS_queue_data(machine, cmd, 2);
}


/* called at power-up */
static void init_COPS(running_machine &machine)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	state->m_COPS_Ready = 0;

	reset_COPS(state);
}



/* VIA1 accessors (COPS, sound, and 2 hard disk lines) */

/*
    PA0-7 (I/O) : VIA <-> COPS data bus
    CA1 (I) : COPS sending valid data
    CA2 (O) : VIA -> COPS handshake
*/
static WRITE8_DEVICE_HANDLER(COPS_via_out_a)
{
	lisa_state *state = device->machine().driver_data<lisa_state>();
//    printf("VIA A = %02x\n", data);
    state->m_COPS_command = data;
}

static WRITE8_DEVICE_HANDLER(COPS_via_out_ca2)
{
	lisa_state *state = device->machine().driver_data<lisa_state>();
	state->m_hold_COPS_data = data;

	/*logerror("COPS CA2 line state : %d\n", val);*/

	/*logerror("COPS_via_out_ca2 : trying to send data to VIA\n");*/
	COPS_send_data_if_possible(device->machine());
}

/*
    PB7 (O) : CR* ("Controller Reset", used by hard disk interface) ???
    PB6 (I) : CRDY ("COPS ready") : set low by the COPS for 20us when it is reading a command
        from the data bus (command latched at low-to-high transition)
    PB5 (I/O) : PR* ; as output : "parity error latch reset" (only when CR* and RESET* are
        inactive) ; as input : low when CR* or RESET are low.
    PB4 (I) : FDIR (floppy disk interrupt request - the fdc shared RAM should not be accessed
        unless this bit is 1)
    PB1-3 (O) : sound volume
    PB0 (O) : forces disconnection of keyboard and mouse (allows to retrive keyboard ID, etc.)

    CB1 : not used
    CB2 (O) : sound output
*/
static READ8_DEVICE_HANDLER(COPS_via_in_b)
{
	lisa_state *state = device->machine().driver_data<lisa_state>();
	int val = 0;

	if (state->m_COPS_Ready)
		val |= 0x40;

	if (state->m_FDIR)
		val |= 0x10;

	return val;
}

static WRITE8_DEVICE_HANDLER(COPS_via_out_b)
{
	lisa_state *state = device->machine().driver_data<lisa_state>();
	via6522_device *via_0 = device->machine().device<via6522_device>("via6522_0");
	address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);

	/* pull-up */
	data |= (~ via_0->read(*space,VIA_DDRA)) & 0x01;

	if (data & 0x01)
	{
		if (state->m_COPS_force_unplug)
		{
			state->m_COPS_force_unplug = 0;
			plug_keyboard(device->machine());
		}
	}
	else
	{
		if (! state->m_COPS_force_unplug)
		{
			state->m_COPS_force_unplug = 1;
			unplug_keyboard(device->machine());
			//reset_COPS(state);
		}
	}
}

static WRITE8_DEVICE_HANDLER(COPS_via_out_cb2)
{
	device_t *speaker = device->machine().device(SPEAKER_TAG);
	speaker_level_w(speaker, data);
}

static void COPS_via_irq_func(device_t *device, int val)
{
	lisa_state *state = device->machine().driver_data<lisa_state>();
	if (state->m_KBIR != val)
	{
		state->m_KBIR = val;
		lisa_field_interrupts(device->machine());
	}
}

/* VIA2 accessors (hard disk, and a few floppy disk lines) */

/*
    PA0-7 (I/O) : VIA <-> hard disk data bus (cf PB3)
    CA1 (I) : hard disk BSY line
    CA2 (O) : hard disk PSTRB* line
*/

/*
    PB7 (O) : WCNT line : set contrast latch on low-to-high transition ?
    PB6 (I) : floppy disk DISK DIAG line
    PB5 (I) : hard disk data DD0-7 current parity (does not depend on PB2)
    PB4 (O) : hard disk CMD* line
    PB3 (O) : hard disk DR/W* line ; controls the direction of the drivers on the data bus
    PB2 (O) : when low, disables hard disk interface drivers
    PB1 (I) : hard disk BSY line
    PB0 (I) : hard disk OCD (Open Cable Detect) line : 0 when hard disk attached
    CB1 : not used
    CB2 (I) : current parity latch value
*/
static READ8_DEVICE_HANDLER(parallel_via_in_b)
{
	lisa_state *state = device->machine().driver_data<lisa_state>();
	int val = 0;

	if (state->m_DISK_DIAG)
		val |= 0x40;

	/* tell there is no hard disk : */
	val |= 0x1;

	/* keep busy high to work around a bug??? */
	//val |= 0x2;

	return val;
}






/*
    LISA video emulation
*/

VIDEO_START( lisa )
{
}

/*
    Video update
*/
SCREEN_UPDATE_IND16( lisa )
{
	lisa_state *state = screen.machine().driver_data<lisa_state>();
	UINT16 *v;
	int x, y;
	/* resolution is 720*364 on lisa, vs 608*431 on mac XL */
	int resx = (state->m_features.has_mac_xl_video) ? 608 : 720;	/* width */
	int resy = (state->m_features.has_mac_xl_video) ? 431 : 364;	/* height */

	UINT8 line_buffer[720];

	v = state->m_videoram_ptr;

	for (y = 0; y < resy; y++)
	{
		for (x = 0; x < resx; x++)
//          line_buffer[x] = (v[(x+y*resx)>>4] & (0x8000 >> ((x+y*resx) & 0xf))) ? 0 : 1;
			line_buffer[x] = (v[(x+y*resx)>>4] & (0x8000 >> (x & 0xf))) ? 0 : 1;
		draw_scanline8(bitmap, 0, y, resx, line_buffer, screen.machine().pens);
	}
	return 0;
}

#if 0	// we can execute directly out of read handlers now, so this shouldn't be necessary any more.  #if 0'd for documentation until we get everything working.
DIRECT_UPDATE_HANDLER (lisa_OPbaseoverride)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	/* upper 7 bits -> segment # */
	int segment = (address >> 17) & 0x7f;
	int the_seg = state->m_seg;

	address &= 0xffffff;

	printf("lisa: logical address %x\n", address);

	if (state->m_setup)
	{
		if (address & 0x004000)
		{
//          the_seg = 0;    /* correct ??? */
		}
		else
		{
			if (address & 0x008000)
			{	/* MMU register : BUS error ??? */
				printf("illegal opbase address %lX\n", (long) address);
			}
			else
			{	/* system ROMs */
				direct.explicit_configure((address & 0xffc000), (address & 0xffc000) + 0x003fff, 0xffffff, state->m_rom_ptr - (address & 0x3fff));
			}

			return -1;
		}

	}

	if (machine.device("maincpu")->state().state_int(M68K_SR) & 0x2000)
	{
		/* supervisor mode -> force register file 0 */
		the_seg = 0;
	}

	{
		int seg_offset = address & 0x01ffff;

		/* add revelant origin -> address */
		offs_t mapped_address = (state->m_mmu_regs[the_seg][segment].sorg + seg_offset) & 0x1fffff;

		switch ((mmu_entry_t)state->m_mmu_regs[the_seg][segment].type)
		{

		case RAM_r:
		case RAM_rw:
			if (seg_offset > state->m_mmu_regs[the_seg][segment].slim)
			{
				/* out of segment limits : bus error */
				printf("illegal opbase address%lX\n", (long) address);
			}
			direct.explicit_configure((address & 0xffc000), (address & 0xffc000) + 0x003fff, 0xffffff, state->m_ram_ptr + mapped_address - address);
			printf("RAM\n");
			break;

		case RAM_stack_r:
		case RAM_stack_rw:	/* stack : bus error ??? */
		case IO:			/* I/O : bus error ??? */
		case invalid:		/* unmapped segment */
			/* bus error */
			printf("illegal opbase address%lX\n", (long) address);
			break;

		case special_IO:
			direct.explicit_configure((address & 0xffc000), (address & 0xffc000) + 0x003fff, 0xffffff, state->m_rom_ptr + (mapped_address & 0x003fff) - address);
			printf("ROM\n");
			break;
		}
	}

	return -1;
}
#endif

/* should save PRAM to file */
/* TODO : save time difference with host clock, set default date, etc */
NVRAM_HANDLER(lisa)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	if (read_or_write)
	{
		file->write(state->m_fdc_ram, 1024);
	}
	else
	{
		if (file)
			file->read(state->m_fdc_ram, 1024);
		else
			memset(state->m_fdc_ram, 0, 1024);

		{
			/* Now we copy the host clock into the Lisa clock */
			system_time systime;
			machine.base_datetime(systime);

			state->m_clock_regs.alarm = 0xfffffL;
			/* The clock count starts on 1st January 1980 */
			state->m_clock_regs.years = (systime.local_time.year - 1980) & 0xf;
			state->m_clock_regs.days1 = (systime.local_time.day + 1) / 100;
			state->m_clock_regs.days2 = ((systime.local_time.day + 1) / 10) % 10;
			state->m_clock_regs.days3 = (systime.local_time.day + 1) % 10;
			state->m_clock_regs.hours1 = systime.local_time.hour / 10;
			state->m_clock_regs.hours2 = systime.local_time.hour % 10;
			state->m_clock_regs.minutes1 = systime.local_time.minute / 10;
			state->m_clock_regs.minutes2 = systime.local_time.minute % 10;
			state->m_clock_regs.seconds1 = systime.local_time.second / 10;
			state->m_clock_regs.seconds2 = systime.local_time.second % 10;
			state->m_clock_regs.tenths = 0;
		}
		state->m_clock_regs.clock_mode = timer_disable;
		state->m_clock_regs.clock_write_ptr = -1;
	}


#if 0
	UINT32 temp32;
	SINT8 temp8;
	temp32 = (state->m_clock_regs.alarm << 12) | (state->m_clock_regs.years << 8) | (state->m_clock_regs.days1 << 4)
	        | state->m_clock_regs.days2;

	temp32 = (state->m_clock_regs.days3 << 28) | (state->m_clock_regs.hours1 << 24) | (state->m_clock_regs.hours2 << 20)
	        | (state->m_clock_regs.minutes1 << 16) | (state->m_clock_regs.minutes2 << 12)
	        | (state->m_clock_regs.seconds1 << 8) | (state->m_clock_regs.seconds2 << 4) | state->m_clock_regs.tenths;

	temp8 = clock_mode;			/* clock mode */

	temp8 = state->m_clock_regs.clock_write_ptr;	/* clock byte to be written next (-1 if clock write disabled) */
#endif
}

#ifdef UNUSED_FUNCTION
void init_lisa1(void)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	state->m_model = lisa1;
	state->m_features.has_fast_timers = 0;
	state->m_features.floppy_hardware = twiggy;
	state->m_features.has_double_sided_floppy = 1;
	state->m_features.has_mac_xl_video = 0;
}
#endif

DRIVER_INIT_MEMBER(lisa_state,lisa2)
{
	m_ram_ptr = machine().root_device().memregion("maincpu")->base() + RAM_OFFSET;
	m_rom_ptr = memregion("maincpu")->base() + ROM_OFFSET;
	m_model = lisa2;
	m_features.has_fast_timers = 0;
	m_features.floppy_hardware = sony_lisa2;
	m_features.has_double_sided_floppy = 0;
	m_features.has_mac_xl_video = 0;

	m_bad_parity_table = auto_alloc_array(machine(), UINT8, 0x40000);  /* 1 bit per byte of CPU RAM */
}

DRIVER_INIT_MEMBER(lisa_state,lisa210)
{
	m_ram_ptr = machine().root_device().memregion("maincpu")->base() + RAM_OFFSET;
	m_rom_ptr = memregion("maincpu")->base() + ROM_OFFSET;
	m_model = lisa210;
	m_features.has_fast_timers = 1;
	m_features.floppy_hardware = sony_lisa210;
	m_features.has_double_sided_floppy = 0;
	m_features.has_mac_xl_video = 0;

	m_bad_parity_table = auto_alloc_array(machine(), UINT8, 0x40000);  /* 1 bit per byte of CPU RAM */
}

DRIVER_INIT_MEMBER(lisa_state,mac_xl)
{
	m_ram_ptr = machine().root_device().memregion("maincpu")->base() + RAM_OFFSET;
	m_rom_ptr = memregion("maincpu")->base() + ROM_OFFSET;
	m_model = mac_xl;
	m_features.has_fast_timers = 1;
	m_features.floppy_hardware = sony_lisa210;
	m_features.has_double_sided_floppy = 0;
	m_features.has_mac_xl_video = 1;

	m_bad_parity_table = auto_alloc_array(machine(), UINT8, 0x40000);  /* 1 bit per byte of CPU RAM */
}

MACHINE_START( lisa )
{
	lisa_state *state = machine.driver_data<lisa_state>();
	state->m_mouse_timer = machine.scheduler().timer_alloc(FUNC(handle_mouse));

	/* read command every ms (don't know the real value) */
	machine.scheduler().timer_pulse(attotime::from_msec(1), FUNC(set_COPS_ready));
}

MACHINE_RESET( lisa )
{
	lisa_state *state = machine.driver_data<lisa_state>();
	state->m_ram_ptr = machine.root_device().memregion("maincpu")->base() + RAM_OFFSET;
	state->m_rom_ptr = machine.root_device().memregion("maincpu")->base() + ROM_OFFSET;
	state->m_videoROM_ptr = state->memregion("gfx1")->base();

//  machine.device("maincpu")->memory().space(AS_PROGRAM)->set_direct_update_handler(direct_update_delegate_create_static(lisa_OPbaseoverride, *machine));
//  m68k_set_reset_callback(machine.device("maincpu"), /*lisa_reset_instr_callback*/NULL);

	/* init MMU */
	state->m_setup = 1;
	state->m_seg = 0;

	/* init parity */
	state->m_diag2 = 0;
	state->m_test_parity = 0;
	state->m_parity_error_pending = 0;

	state->m_bad_parity_count = 0;
	memset(state->m_bad_parity_table, 0, 0x40000);	/* Clear */

	/* init video */

	state->m_VTMSK = 0;
	set_VTIR(machine, 0);

	state->m_video_address_latch = 0;
	state->m_videoram_ptr = (UINT16 *) state->m_ram_ptr;

	/* reset COPS keyboard/mouse controller */
	init_COPS(machine);

	{
		via6522_device *via_0 = machine.device<via6522_device>("via6522_0");
		COPS_via_out_ca2(via_0, 0, 0);	/* VIA core forgets to do so */
	}

	/* initialize floppy */
	{
		if (state->m_features.floppy_hardware == sony_lisa2)
		{
			sony_set_enable_lines(machine.device("fdc"),1);	/* on lisa2, drive unit 1 is always selected (?) */
		}
	}

	/* reset 68k to pick up proper vectors from MMU */
	devtag_reset(machine, "maincpu");
}

INTERRUPT_GEN( lisa_interrupt )
{
	lisa_state *state = device->machine().driver_data<lisa_state>();
	if ((++state->m_frame_count) == 6)
	{	/* increment clock every 1/10s */
		state->m_frame_count = 0;

		if (state->m_clock_regs.clock_mode != clock_timer_disable)
		{
			if ((++state->m_clock_regs.tenths) == 10)
			{
				state->m_clock_regs.tenths = 0;

				if (state->m_clock_regs.clock_mode != timer_disable)
				{
					if (state->m_clock_regs.alarm == 0)
					{
						/* generate reset (should cause a VIA interrupt...) */
						static const UINT8 cmd[2] =
						{
							0x80,	/* RESET code */
							0xFC	/* timer time-out */
						};
						COPS_queue_data(device->machine(), cmd, 2);

						state->m_clock_regs.alarm = 0xfffffL;
					}
					else
					{
						state->m_clock_regs.alarm--;
					}
				}

				if ((++state->m_clock_regs.seconds2) == 10)
				{
					state->m_clock_regs.seconds2 = 0;

					if ((++state->m_clock_regs.seconds1) == 6)
					{
						state->m_clock_regs.seconds1 = 0;

						if ((++state->m_clock_regs.minutes2) == 10)
						{
							state->m_clock_regs.minutes2 = 0;

							if ((++state->m_clock_regs.minutes1) == 6)
							{
								state->m_clock_regs.minutes1 = 0;

								if ((++state->m_clock_regs.hours2) == 10)
								{
									state->m_clock_regs.hours2 = 0;

									state->m_clock_regs.hours1++;
								}

								if ((state->m_clock_regs.hours1*10 + state->m_clock_regs.hours2) == 24)
								{
									state->m_clock_regs.hours1 = state->m_clock_regs.hours2 = 0;

									if ((++state->m_clock_regs.days3) == 10)
									{
										state->m_clock_regs.days3 = 0;

										if ((++state->m_clock_regs.days2) == 10)
										{
											state->m_clock_regs.days2 = 0;

											state->m_clock_regs.days1++;
										}
									}

									if ((state->m_clock_regs.days1*100 + state->m_clock_regs.days2*10 + state->m_clock_regs.days3) ==
										((state->m_clock_regs.years % 4) ? 366 : 367))
									{
										state->m_clock_regs.days1 = state->m_clock_regs.days2 = state->m_clock_regs.days3 = 0;

										state->m_clock_regs.years = (state->m_clock_regs.years + 1) & 0xf;
									}
								}
							}
						}
					}
				}
			}
		}
	}

	/* set VBI */
	if (state->m_VTMSK)
		set_VTIR(device->machine(), 1);
	else
		set_VTIR(device->machine(), 0);

	/* do keyboard scan */
	scan_keyboard(device->machine());
}

/*
    Lots of fun with the Lisa fdc hardware

    The iwm floppy select line is connected to the drive SEL line in Lisa2 (which is why Lisa 2
    cannot support 2 floppy drives)...
*/

INLINE void lisa_fdc_ttl_glue_access(running_machine &machine, offs_t offset)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	switch ((offset & 0x000E) >> 1)
	{
	case 0:
		/*stop = offset & 1;*/	/* stop/run motor pulse generation */
		break;
	case 2:
		/*MT0 = offset & 1;*/	/* ???? */
		break;
	case 3:
		/* enable/disable the motor on Lisa 1 */
		/* can disable the motor on Lisa 2/10, too (although it is not useful) */
		/* On lisa 2, commands the loading of the speed register on lisalite board */
		if (state->m_features.floppy_hardware == sony_lisa2)
		{
			int oldMT1 = state->m_MT1;
			state->m_MT1 = offset & 1;
			if (state->m_MT1 && ! oldMT1)
			{
				device_t *fdc = machine.device("fdc");

				state->m_PWM_floppy_motor_speed = (state->m_PWM_floppy_motor_speed << 1) & 0xff;
				if (applefdc_get_lines(fdc) & APPLEFDC_PH0)
					state->m_PWM_floppy_motor_speed |= 1;
				sony_set_speed(((256-state->m_PWM_floppy_motor_speed) * 1.3) + 237);
			}
		}
		/*else
            state->m_MT1 = offset & 1;*/
		break;
	case 4:
		/*DIS = offset & 1;*/	/* forbids access from the 68000 to our RAM */
		break;
	case 5:
		/*HDS = offset & 1;*/		/* head select (-> disk side) on twiggy */
#if 0
		if (state->m_features.floppy_hardware == twiggy)
			twiggy_set_head_line(offset & 1);
		else
#endif
		if (state->m_features.floppy_hardware == sony_lisa210)
			sony_set_sel_line(machine.device("fdc"), offset & 1);
		break;
	case 6:
		state->m_DISK_DIAG = offset & 1;
		break;
	case 7:
		state->m_FDIR = offset & 1;	/* Interrupt request to 68k */
		lisa_field_interrupts(machine);
		break;
	}
}

READ8_MEMBER(lisa_state::lisa_fdc_io_r)
{
	int answer=0;
	device_t *fdc = machine().device("fdc");

	switch ((offset & 0x0030) >> 4)
	{
	case 0:	/* IWM */
		answer = applefdc_r(fdc, offset);
		break;

	case 1:	/* TTL glue */
		lisa_fdc_ttl_glue_access(machine(), offset);
		answer = 0;	/* ??? */
		break;

	case 2:	/* pulses the PWM LOAD line (bug!) */
		answer = 0;	/* ??? */
		break;

	case 3:	/* not used */
		answer = 0;	/* ??? */
		break;
	}

	return answer;
}

WRITE8_MEMBER(lisa_state::lisa_fdc_io_w)
{
	device_t *fdc = machine().device("fdc");

	switch ((offset & 0x0030) >> 4)
	{
	case 0:	/* IWM */
		applefdc_w(fdc, offset, data);
		break;

	case 1:	/* TTL glue */
		lisa_fdc_ttl_glue_access(machine(), offset);
		break;

	case 2:	/* writes the PWM register */
		/* the written value is used to generate the motor speed control signal */
#if 0
		if (m_features.floppy_hardware == twiggy)
			twiggy_set_speed((256-data) * 1.3 /* ??? */ + 237 /* ??? */);
		else
#endif
		if (m_features.floppy_hardware == sony_lisa210)
			sony_set_speed(((256-data) * 1.3) + 237);
		break;

	case 3:	/* not used */
		break;
	}
}

READ8_MEMBER(lisa_state::lisa_fdc_r)
{
	if (! (offset & 0x1000))
	{
		if (! (offset & 0x0800))
			if (! (offset & 0x0400))
				return m_fdc_ram[offset & 0x03ff];
			else
				return lisa_fdc_io_r(space, offset & 0x03ff);
		else
			return 0;	/* ??? */
	}
	else
		return m_fdc_rom[offset & 0x0fff];
}

READ8_MEMBER(lisa_state::lisa210_fdc_r)
{
	if (! (offset & 0x1000))
	{
		if (! (offset & 0x0400))
			if (! (offset & 0x0800))
				return m_fdc_ram[offset & 0x03ff];
			else
				return lisa_fdc_io_r(space, offset & 0x03ff);
		else
			return 0;	/* ??? */
	}
	else
		return m_fdc_rom[offset & 0x0fff];
}

WRITE8_MEMBER(lisa_state::lisa_fdc_w)
{
	if (! (offset & 0x1000))
	{
		if (! (offset & 0x0800))
		{
			if (! (offset & 0x0400))
				m_fdc_ram[offset & 0x03ff] = data;
			else
				lisa_fdc_io_w(space, offset & 0x03ff, data);
		}
	}
}

WRITE8_MEMBER(lisa_state::lisa210_fdc_w)
{
	if (! (offset & 0x1000))
	{
		if (! (offset & 0x0400))
		{
			if (! (offset & 0x0800))
				m_fdc_ram[offset & 0x03ff] = data;
			else
				lisa_fdc_io_w(space, offset & 0x03ff, data);
		}
	}
}

READ16_MEMBER(lisa_state::lisa_r)
{
	int answer=0;

	/* segment register set */
	int the_seg = m_seg;

	/* upper 7 bits -> segment # */
	int segment = (offset >> 16) & 0x7f;

	/*logerror("read, logical address%lX\n", offset);*/

	if (m_setup)
	{	/* special setup mode */
		if (offset & 0x002000)
		{
            the_seg = 0;        // TRUSTED by Lisa Hardware Manual section 2.3.3 and MMU startup test
		}
		else
		{
			if (offset & 0x004000)
			{	/* read MMU register */
				/*logerror("read from segment registers (%X:%X) ", the_seg, segment);*/
				if (offset & 0x000004)
				{	/* sorg register */
					answer = m_real_mmu_regs[the_seg][segment].sorg;
					/*logerror("sorg, data = %X\n", answer);*/
				}
				else
				{	/* slim register */
					answer = m_real_mmu_regs[the_seg][segment].slim;
					/*logerror("slim, data = %X\n", answer);*/
				}
			}
			else
			{	/* system ROMs */
				answer = ((UINT16*)m_rom_ptr)[(offset & 0x001fff)];
				/*logerror("dst address in ROM (setup mode)\n");*/
			}

			return answer;
		}
	}

	if (machine().device("maincpu")->state().state_int(M68K_SR) & 0x2000)
		/* supervisor mode -> force register file 0 */
		the_seg = 0;

	{
		/* offset in segment */
		int seg_offset = (offset & 0x00ffff) << 1;

		/* add revelant origin -> address */
		offs_t address = (m_mmu_regs[the_seg][segment].sorg + seg_offset) & 0x1fffff;

		/*logerror("read, logical address%lX\n", offset);
        logerror("physical address%lX\n", address);*/

		switch (m_mmu_regs[the_seg][segment].type)
		{

		case RAM_stack_r:
		case RAM_stack_rw:
			if (address <= m_mmu_regs[the_seg][segment].slim)
			{
				/* out of segment limits : bus error */

			}
			answer = *(UINT16 *)(m_ram_ptr + address);

			if (m_bad_parity_count && m_test_parity
					&& (m_bad_parity_table[address >> 3] & (0x3 << (address & 0x7))))
			{
				m_mem_err_addr_latch = address >> 5;
				set_parity_error_pending(machine(), 1);
			}

			break;

		case RAM_r:
		case RAM_rw:
			if (address > m_mmu_regs[the_seg][segment].slim)
			{
				/* out of segment limits : bus error */

			}
			answer = *(UINT16 *)(m_ram_ptr + address);

			if (m_bad_parity_count && m_test_parity
					&& (m_bad_parity_table[address >> 3] & (0x3 << (address & 0x7))))
			{
				m_mem_err_addr_latch = address >> 5;
				set_parity_error_pending(machine(), 1);
			}

			break;

		case IO:
			answer = lisa_IO_r(space, (address & 0x00ffff) >> 1, mem_mask);

			break;

		case invalid:		/* unmapped segment */
			/* bus error */

			answer = 0;

			break;

		case special_IO:
			if (! (address & 0x008000))
				answer = *(UINT16 *)(m_rom_ptr + (address & 0x003fff));
			else
			{	/* read serial number from ROM */
				/* this has to be be the least efficient way to read a ROM :-) */
				/* this emulation is not guaranteed accurate */

				/* problem : due to collisions with video, timings of the LISA CPU
                are slightly different from timings of a bare 68k */
				/* so we use a kludge... */
				int time_in_frame = machine().primary_screen->vpos();

				/* the BOOT ROM only reads 56 bits, so there must be some wrap-around for
                videoROM_address <= 56 */
				/* pixel clock 20MHz, memory access rate 1.25MHz, horizontal clock 22.7kHz
                according to Apple, which must stand for 1.25MHz/55 = 22727kHz, vertical
                clock approximately 60Hz, which means there are about 380 lines, including VBlank */
				/* The values are different on the Mac XL, and I don't know the correct values
                for sure. */

				/* Something appears to be wrong with the timings, since we expect to read the
                2nd half when v-syncing, i.e. for lines beyond the 431th or 364th one (provided
                there are no additionnal margins).
                This is caused by the fact that 68k timings are wrong (memory accesses are
                interlaced with the video hardware, which is not emulated). */
				if (m_features.has_mac_xl_video)
				{
					if ((time_in_frame >= 374) && (time_in_frame <= 392))	/* these values have not been tested */
						answer = m_videoROM_ptr[m_videoROM_address|0x80] << 8;
					else
						answer = m_videoROM_ptr[m_videoROM_address] << 8;
				}
				else
				{
					if ((time_in_frame >= 364) && (time_in_frame <= 375))
					{
						answer = m_videoROM_ptr[m_videoROM_address|0x80] << 8;
				logerror("reading1 %06X=%04x PC=%06x time=%d\n", address, answer, machine().device("maincpu")->safe_pc(), time_in_frame);
					}
					else
					{
						answer = m_videoROM_ptr[m_videoROM_address] << 8;
				logerror("reading2 %06X=%04x PC=%06x time=%d\n", address, answer, machine().device("maincpu")->safe_pc(), time_in_frame);
					}
				}


				m_videoROM_address = (m_videoROM_address + 1) & 0x7f;
				if (m_videoROM_address == ((m_features.has_mac_xl_video) ? 48 : 56)) {
					logerror("loop %d\n", m_videoROM_address);
					m_videoROM_address = 0;
				}

			}

			break;
		}
	}

	/*logerror("result %X\n", answer);*/

	return answer;
}

WRITE16_MEMBER(lisa_state::lisa_w)
{
	/* segment register set */
	int the_seg = m_seg;

	/* upper 7 bits -> segment # */
	int segment = (offset >> 16) & 0x7f;


	if (m_setup)
	{
		if (offset & 0x002000)
		{
            the_seg = 0;        // TRUSTED by Lisa Hardware Manual section 2.3.3 and MMU startup test
		}
		else
		{
			if (offset & 0x004000)
			{	/* write to MMU register */
				logerror("write to segment registers (%X:%X) ", the_seg, segment);
				if (offset & 0x000004)
				{	/* sorg register */
					logerror("sorg, data = %X\n", data);
					m_real_mmu_regs[the_seg][segment].sorg = data & 0xFFF;
					m_mmu_regs[the_seg][segment].sorg = (data & 0x0fff) << 9;
				}
				else
				{	/* slim register */
					logerror("slim, data = %X\n", data);
					m_real_mmu_regs[the_seg][segment].slim = data & 0xFFF;
					m_mmu_regs[the_seg][segment].slim = (~ (data << 9)) & 0x01ffff;
					switch ((data & 0x0f00) >> 8)
					{
					case 0x4:
						/*logerror("type : RAM stack r\n");*/
						m_mmu_regs[the_seg][segment].type = RAM_stack_r;
						break;
					case 0x5:
						/*logerror("type : RAM r\n");*/
						m_mmu_regs[the_seg][segment].type = RAM_r;
						break;
					case 0x6:
						/*logerror("type : RAM stack rw\n");*/
						m_mmu_regs[the_seg][segment].type = RAM_stack_rw;
						break;
					case 0x7:
						/*logerror("type : RAM rw\n");*/
						m_mmu_regs[the_seg][segment].type = RAM_rw;
						break;
					case 0x8:
					case 0x9:	/* not documented, but used by ROMs (?) */
						/*logerror("type : I/O\n");*/
						m_mmu_regs[the_seg][segment].type = IO;
						break;
					case 0xC:
						/*logerror("type : invalid\n");*/
						m_mmu_regs[the_seg][segment].type = invalid;
						break;
					case 0xF:
						logerror("type : special I/O\n");
						m_mmu_regs[the_seg][segment].type = special_IO;
						break;
					default:	/* "unpredictable results" */
						logerror("type : unknown\n");
						m_mmu_regs[the_seg][segment].type = invalid;
						break;
					}
				}
			}
			else
			{	/* system ROMs : read-only ??? */
				/* bus error ??? */
			}
			return;
		}
	}

	if (machine().device("maincpu")->state().state_int(M68K_SR) & 0x2000)
		/* supervisor mode -> force register file 0 */
		the_seg = 0;

	{
		/* offset in segment */
		int seg_offset = (offset & 0x00ffff) << 1;

		/* add revelant origin -> address */
		offs_t address = (m_mmu_regs[the_seg][segment].sorg + seg_offset) & 0x1fffff;

		switch (m_mmu_regs[the_seg][segment].type)
		{

		case RAM_stack_rw:
			if (address <= m_mmu_regs[the_seg][segment].slim)
			{
				/* out of segment limits : bus error */

			}
			COMBINE_DATA((UINT16 *) (m_ram_ptr + address));
			if (m_diag2)
			{
				if ((ACCESSING_BITS_0_7)
					&& ! (m_bad_parity_table[address >> 3] & (0x1 << (address & 0x7))))
				{
					m_bad_parity_table[address >> 3] |= 0x1 << (address & 0x7);
					m_bad_parity_count++;
				}
				if ((ACCESSING_BITS_8_15)
					&& ! (m_bad_parity_table[address >> 3] & (0x2 << (address & 0x7))))
				{
					m_bad_parity_table[address >> 3] |= 0x2 << (address & 0x7);
					m_bad_parity_count++;
				}
			}
			else if (m_bad_parity_table[address >> 3] & (0x3 << (address & 0x7)))
			{
				if ((ACCESSING_BITS_0_7)
					&& (m_bad_parity_table[address >> 3] & (0x1 << (address & 0x7))))
				{
					m_bad_parity_table[address >> 3] &= ~ (0x1 << (address & 0x7));
					m_bad_parity_count--;
				}
				if ((ACCESSING_BITS_8_15)
					&& (m_bad_parity_table[address >> 3] & (0x2 << (address & 0x7))))
				{
					m_bad_parity_table[address >> 3] &= ~ (0x2 << (address & 0x7));
					m_bad_parity_count--;
				}
			}
			break;

		case RAM_rw:
			if (address > m_mmu_regs[the_seg][segment].slim)
			{
				/* out of segment limits : bus error */

			}
			COMBINE_DATA((UINT16 *) (m_ram_ptr + address));
			if (m_diag2)
			{
				if ((ACCESSING_BITS_0_7)
					&& ! (m_bad_parity_table[address >> 3] & (0x1 << (address & 0x7))))
				{
					m_bad_parity_table[address >> 3] |= 0x1 << (address & 0x7);
					m_bad_parity_count++;
				}
				if ((ACCESSING_BITS_8_15)
					&& ! (m_bad_parity_table[address >> 3] & (0x2 << (address & 0x7))))
				{
					m_bad_parity_table[address >> 3] |= 0x2 << (address & 0x7);
					m_bad_parity_count++;
				}
			}
			else if (m_bad_parity_table[address >> 3] & (0x3 << (address & 0x7)))
			{
				if ((ACCESSING_BITS_0_7)
					&& (m_bad_parity_table[address >> 3] & (0x1 << (address & 0x7))))
				{
					m_bad_parity_table[address >> 3] &= ~ (0x1 << (address & 0x7));
					m_bad_parity_count--;
				}
				if ((ACCESSING_BITS_8_15)
					&& (m_bad_parity_table[address >> 3] & (0x2 << (address & 0x7))))
				{
					m_bad_parity_table[address >> 3] &= ~ (0x2 << (address & 0x7));
					m_bad_parity_count--;
				}
			}
			break;

		case IO:
			lisa_IO_w(space, (address & 0x00ffff) >> 1, data, mem_mask);
			break;

		case RAM_stack_r:	/* read-only */
		case RAM_r:			/* read-only */
		case special_IO:	/* system ROMs : read-only ??? */
		case invalid:		/* unmapped segment */
			/* bus error */

			break;
		}
	}
}


/**************************************************************************************\
* I/O Slot Memory                                                                      *
*                                                                                      *
* 000000 - 001FFF Slot 0 Low  Decode                                                   *
* 002000 - 003FFF Slot 0 High Decode                                                   *
* 004000 - 005FFF Slot 1 Low  Decode                                                   *
* 006000 - 007FFF Slot 1 High Decode                                                   *
* 008000 - 009FFF Slot 2 Low  Decode                                                   *
* 00A000 - 00BFFF Slot 2 High Decode                                                   *
* 00C000 - 00CFFF Floppy Disk Controller shared RAM                                    *
*   00c001-00c7ff floppy disk control                                                  *
* 00D000 - 00DFFF I/O Board Devices                                                    *
*   00d000-00d3ff serial ports control                                                 *
*   00d800-00dbff paralel port                                                         *
*   00dc00-00dfff keyboard/mouse cops via                                              *
* 00E000 - 00FFFF CPU Board Devices                                                    *
*   00e000-00e01e cpu board control                                                    *
*   00e01f-00e7ff unused                                                               *
*   00e8xx-video address latch                                                         *
*   00f0xx memory error address latch                                                  *
*   00f8xx status register                                                             *
*                                                                                      *
\**************************************************************************************/

INLINE void cpu_board_control_access(running_machine &machine, offs_t offset)
{
	lisa_state *state = machine.driver_data<lisa_state>();
	switch ((offset & 0x03ff) << 1)
	{
	case 0x0002:	/* Set DIAG1 Latch */
	case 0x0000:	/* Reset DIAG1 Latch */
		break;
	case 0x0006:	/* Set Diag2 Latch */
		state->m_diag2 = 1;
		break;
	case 0x0004:	/* ReSet Diag2 Latch */
		state->m_diag2 = 0;
		break;
	case 0x000A:	/* SEG1 Context Selection bit SET */
		/*logerror("seg bit 0 set\n");*/
		state->m_seg |= 1;
		break;
	case 0x0008:	/* SEG1 Context Selection bit RESET */
		/*logerror("seg bit 0 clear\n");*/
		state->m_seg &= ~1;
		break;
	case 0x000E:	/* SEG2 Context Selection bit SET */
		/*logerror("seg bit 1 set\n");*/
		state->m_seg |= 2;
		break;
	case 0x000C:	/* SEG2 Context Selection bit RESET */
		/*logerror("seg bit 1 clear\n");*/
		state->m_seg &= ~2;
		break;
	case 0x0010:	/* SETUP register SET */
		logerror("setup SET PC=%x\n", machine.device("maincpu")->safe_pc());
		state->m_setup = 1;
		break;
	case 0x0012:	/* SETUP register RESET */
		logerror("setup UNSET PC=%x\n", machine.device("maincpu")->safe_pc());
		state->m_setup = 0;
		break;
	case 0x001A:	/* Enable Vertical Retrace Interrupt */
		logerror("enable retrace PC=%x\n", machine.device("maincpu")->safe_pc());
		state->m_VTMSK = 1;
		break;
	case 0x0018:	/* Disable Vertical Retrace Interrupt */
		logerror("disable retrace PC=%x\n", machine.device("maincpu")->safe_pc());
		state->m_VTMSK = 0;
		set_VTIR(machine, 2);
		break;
	case 0x0016:	/* Enable Soft Error Detect. */
	case 0x0014:	/* Disable Soft Error Detect. */
		break;
	case 0x001E:	/* Enable Hard Error Detect */
		state->m_test_parity = 1;
		break;
	case 0x001C:	/* Disable Hard Error Detect */
		state->m_test_parity = 0;
		set_parity_error_pending(machine, 0);
		break;
	}
}

READ16_MEMBER(lisa_state::lisa_IO_r)
{
	via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
	via6522_device *via_1 = machine().device<via6522_device>("via6522_1");
	int answer=0;

	switch ((offset & 0x7000) >> 12)
	{
	case 0x0:
		/* Slot 0 Low */
		break;

	case 0x1:
		/* Slot 0 High */
		break;

	case 0x2:
		/* Slot 1 Low */
		break;

	case 0x3:
		/* Slot 1 High */
		break;

	case 0x4:
		/* Slot 2 Low */
		break;

	case 0x5:
		/* Slot 2 High */
		break;

	case 0x6:
		if (! (offset & 0x800))
		{
			if (! (offset & 0x400))
			{
				/*if (ACCESSING_BITS_0_7)*/	/* Geez, who cares ? */
					answer = m_fdc_ram[offset & 0x03ff] & 0xff;	/* right ??? */
			}
		}
		else
		{
			/* I/O Board Devices */
			switch ((offset & 0x0600) >> 9)
			{
            case 0:	/* serial ports control */
                answer = m_scc->reg_r(space, offset&7);
				break;

			case 2:	/* parallel port */
				/* 1 VIA located at 0xD901 */
				if (ACCESSING_BITS_0_7)
					answer = via_1->read(space, (offset >> 2) & 0xf);
				break;

			case 3:	/* keyboard/mouse cops via */
				/* 1 VIA located at 0xDD81 */
				if (ACCESSING_BITS_0_7)
					answer = via_0->read(space, offset & 0xf);
				break;
			}
		}
		break;

	case 0x7:
		/* CPU Board Devices */
		switch ((offset & 0x0C00) >> 10)
		{
		case 0x0:	/* cpu board control */
			cpu_board_control_access(machine(), offset & 0x03ff);
			break;

		case 0x1:	/* Video Address Latch */
			answer = m_video_address_latch;
			break;

		case 0x2:	/* Memory Error Address Latch */
			answer = m_mem_err_addr_latch;
			break;

		case 0x3:	/* Status Register */
			answer = 0;
			if (! m_parity_error_pending)
				answer |= 0x02;
			if (m_VTIR<=1)
// GFE : needs to be in phase with Serial NUM
			{
				int time_in_frame = machine().primary_screen->vpos();
				if (m_features.has_mac_xl_video)
				{
					if ((time_in_frame >= 374) && (time_in_frame <= 392))	/* these values have not been tested */
					{	/* if VSyncing, read ROM 2nd half ? */
					}
					else
					{
						m_VTIR=0;
						answer |= 0x04;
					}
				}
				else
				{
					logerror("read status time=%x\n", time_in_frame);
					if ((time_in_frame >= 364) && (time_in_frame <= 383))	/* these values are approximative */
					{	/* if VSyncing, read ROM 2nd half ? */
					}
					else
					{
						m_VTIR=0;
						answer |= 0x04;
					}
				}

			}
			else
						answer |= 0x04;
			/* huh... we need to emulate some other bits */
			logerror("read status PC=%x val=%x\n", machine().device("maincpu")->safe_pc(), answer);

			break;
		}
		break;
	}

	return answer;
}

WRITE16_MEMBER(lisa_state::lisa_IO_w)
{
	via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
	via6522_device *via_1 = machine().device<via6522_device>("via6522_1");

	switch ((offset & 0x7000) >> 12)
	{
	case 0x0:
		/* Slot 0 Low */
		break;

	case 0x1:
		/* Slot 0 High */
		break;

	case 0x2:
		/* Slot 1 Low */
		break;

	case 0x3:
		/* Slot 1 High */
		break;

	case 0x4:
		/* Slot 2 Low */
		break;

	case 0x5:
		/* Slot 2 High */
		break;

	case 0x6:
		if (! (offset & 0x0800))
		{
			/* Floppy Disk Controller shared RAM */
			if (! (offset & 0x0400))
			{
				if (ACCESSING_BITS_0_7)
					m_fdc_ram[offset & 0x03ff] = data & 0xff;
			}
		}
		else
		{
			/* I/O Board Devices */
			switch ((offset & 0x0600) >> 9)
			{
            case 0:	/* serial ports control */
                m_scc->reg_w(space, offset&7, data);
				break;

			case 2:	/* paralel port */
				if (ACCESSING_BITS_0_7)
					via_1->write(space, (offset >> 2) & 0xf, data & 0xff);
				break;

			case 3:	/* keyboard/mouse cops via */
				if (ACCESSING_BITS_0_7)
					via_0->write(space, offset & 0xf, data & 0xff);
				break;
			}
		}
		break;

	case 0x7:
		/* CPU Board Devices */
		switch ((offset & 0x0C00) >> 10)
		{
		case 0x0:	/* cpu board control */
			cpu_board_control_access(machine(), offset & 0x03ff);
			break;

		case 0x1:	/* Video Address Latch */
			/*logerror("video address latch write offs=%X, data=%X\n", offset, data);*/
			COMBINE_DATA(& m_video_address_latch);
			m_videoram_ptr = ((UINT16 *)m_ram_ptr) + ((m_video_address_latch << 6) & 0xfc000);
			/*logerror("video address latch %X -> base address %X\n", m_video_address_latch,
                            (m_video_address_latch << 7) & 0x1f8000);*/
			break;
		}
		break;
	}
}

void lisa_state::set_scc_interrupt(bool value)
{
}