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Diffstat (limited to 'src/devices/bus/isa/pgc.cpp')
-rw-r--r--src/devices/bus/isa/pgc.cpp57
1 files changed, 27 insertions, 30 deletions
diff --git a/src/devices/bus/isa/pgc.cpp b/src/devices/bus/isa/pgc.cpp
index 9e65cd819d0..1a67e545378 100644
--- a/src/devices/bus/isa/pgc.cpp
+++ b/src/devices/bus/isa/pgc.cpp
@@ -16,7 +16,7 @@
http://www.seasip.info/VintagePC/pgc.html
To do:
- - pass IBM diagnostics (currently fail with code 3905)
+ - pass IBM diagnostics (currently fail with code 3905 - 'Cold start cycle power error')
- CGA emulator
- what's up with irq 3 (= vblank irq)? (causes soft reset)
- "test pin of the microprocessor samples the hsync pulse"
@@ -32,7 +32,6 @@
#include "screen.h"
-//#define LOG_GENERAL (1U << 0) //defined in logmacro.h already
#define LOG_VRAM (1U << 1)
#define LOG_CMD (1U << 2)
@@ -71,8 +70,6 @@ ROM_START( pgc )
ROMX_LOAD("pgc_u44.bin", 0x00000, 0x8000, CRC(71280241) SHA1(7042ccd4ebd03f576a256a433b8aa38d1b4fefa8), ROM_BIOS(1))
ROMX_LOAD("pgc_u43.bin", 0x08000, 0x8000, CRC(923f5ea3) SHA1(2b2a55d64b20d3a613b00c51443105aa03eca5d6), ROM_BIOS(1))
- ROM_REGION(0x800, "commarea", ROMREGION_ERASE00)
-
ROM_REGION(0x1000, "chargen", 0)
ROM_LOAD("pgc_u27.bin", 0x0000, 0x1000, CRC(6be256cc) SHA1(deb1195886268dcddce10459911e020f7a9f74f7))
ROM_END
@@ -113,7 +110,7 @@ void isa8_pgc_device::pgc_map(address_map &map)
map(0x08000, 0x0ffff).rom().region("maincpu", 0x8000);
map(0x10000, 0x1001f).rw(FUNC(isa8_pgc_device::stateparam_r), FUNC(isa8_pgc_device::stateparam_w));
// map(0x18000, 0x18fff).ram(); // ??
- map(0x28000, 0x287ff).ram().region("commarea", 0).mirror(0x800);
+ map(0x28000, 0x287ff).ram().share("commarea").mirror(0x800);
map(0x32001, 0x32001).nopw();
map(0x32020, 0x3203f).w(FUNC(isa8_pgc_device::accel_w));
map(0x3c000, 0x3c001).r(FUNC(isa8_pgc_device::init_r));
@@ -210,7 +207,8 @@ isa8_pgc_device::isa8_pgc_device(const machine_config &mconfig, device_type type
m_cpu(*this, "maincpu"),
m_screen(*this, PGC_SCREEN_NAME),
m_palette(*this, "palette"),
- m_commarea(nullptr), m_vram(nullptr), m_eram(nullptr)
+ m_commarea(*this, "commarea"),
+ m_vram(nullptr), m_eram(nullptr)
{
}
@@ -246,16 +244,15 @@ void isa8_pgc_device::device_reset()
memset(m_lut, 0, sizeof(m_lut));
m_accel = 0;
- m_commarea = memregion("commarea")->base();
if (BIT(ioport("DSW")->read(), 1))
- m_isa->install_bank(0xc6400, 0xc67ff, "commarea", m_commarea);
+ m_isa->install_bank(0xc6400, 0xc67ff, m_commarea);
else
- m_isa->install_bank(0xc6000, 0xc63ff, "commarea", m_commarea);
+ m_isa->install_bank(0xc6000, 0xc63ff, m_commarea);
}
//
-WRITE_LINE_MEMBER(isa8_pgc_device::vblank_irq)
+void isa8_pgc_device::vblank_irq(int state)
{
if (state)
{
@@ -273,7 +270,7 @@ IRQ_CALLBACK_MEMBER(isa8_pgc_device::irq_callback)
// memory handlers
-READ8_MEMBER(isa8_pgc_device::vram_r)
+uint8_t isa8_pgc_device::vram_r(offs_t offset)
{
uint8_t ret;
@@ -293,7 +290,7 @@ READ8_MEMBER(isa8_pgc_device::vram_r)
* 9 - write up to 5 pixel groups, ending at offset. offset may be in the middle of pixel group.
* 13 - write up to 5 pixel groups, starting at offset.
*/
-WRITE8_MEMBER(isa8_pgc_device::vram_w)
+void isa8_pgc_device::vram_w(offs_t offset, uint8_t data)
{
bool handled = true;
@@ -336,13 +333,13 @@ WRITE8_MEMBER(isa8_pgc_device::vram_w)
handled ? "" : " (unsupported)");
}
-WRITE8_MEMBER(isa8_pgc_device::accel_w)
+void isa8_pgc_device::accel_w(offs_t offset, uint8_t data)
{
m_accel = offset >> 1;
LOGV("accel @ %05x <- %02x (%d)\n", 0x32020 + offset, data, m_accel);
}
-READ8_MEMBER(isa8_pgc_device::stateparam_r)
+uint8_t isa8_pgc_device::stateparam_r(offs_t offset)
{
uint8_t ret;
@@ -354,7 +351,7 @@ READ8_MEMBER(isa8_pgc_device::stateparam_r)
return ret;
}
-WRITE8_MEMBER(isa8_pgc_device::stateparam_w)
+void isa8_pgc_device::stateparam_w(offs_t offset, uint8_t data)
{
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
@@ -363,7 +360,7 @@ WRITE8_MEMBER(isa8_pgc_device::stateparam_w)
m_stateparam[offset >> 1] = data;
}
-WRITE8_MEMBER(isa8_pgc_device::lut_w)
+void isa8_pgc_device::lut_w(offs_t offset, uint8_t data)
{
uint8_t o = (offset >> 1) * 3;
@@ -379,32 +376,32 @@ WRITE8_MEMBER(isa8_pgc_device::lut_w)
}
}
-READ8_MEMBER(isa8_pgc_device::init_r)
+uint8_t isa8_pgc_device::init_r()
{
- LOG("INIT: unmapping ROM\n");
- space.unmap_read(0xf8000, 0xfffff);
+ if (!machine().side_effects_disabled())
+ {
+ address_space &space = m_cpu->space(AS_PROGRAM);
- LOG("INIT: mapping emulator RAM\n");
- space.install_readwrite_bank(0xf8000, 0xfffff, "eram");
- membank("eram")->set_base(m_eram.get());
+ LOG("INIT: unmapping ROM\n");
+ space.unmap_read(0xf8000, 0xfffff);
- LOG("INIT: mapping LUT\n");
- space.install_write_handler(0xf8400, 0xf85ff,
- write8_delegate(FUNC(isa8_pgc_device::lut_w), this));
+ LOG("INIT: mapping emulator RAM\n");
+ space.install_ram(0xf8000, 0xfffff, m_eram.get());
+
+ LOG("INIT: mapping LUT\n");
+ space.install_write_handler(0xf8400, 0xf85ff, write8sm_delegate(*this, FUNC(isa8_pgc_device::lut_w)));
+ }
return 0; // XXX ignored
}
uint32_t isa8_pgc_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
- uint16_t *p;
- uint8_t *v;
-
for (int y = 0; y < PGC_DISP_VERT; y++)
{
// XXX address translation happens in hardware
- v = &m_vram[y * 1024];
- p = &bitmap.pix16(y + PGC_VERT_START, PGC_HORZ_START);
+ uint8_t const *v = &m_vram[y * 1024];
+ uint16_t *p = &bitmap.pix(y + PGC_VERT_START, PGC_HORZ_START);
for (int x = 0; x < PGC_DISP_HORZ; x++)
{