summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/bus/isa/gus.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/devices/bus/isa/gus.h')
-rw-r--r--src/devices/bus/isa/gus.h152
1 files changed, 76 insertions, 76 deletions
diff --git a/src/devices/bus/isa/gus.h b/src/devices/bus/isa/gus.h
index 0370fd6ed80..cac3c7241a5 100644
--- a/src/devices/bus/isa/gus.h
+++ b/src/devices/bus/isa/gus.h
@@ -99,20 +99,20 @@
struct gus_voice
{
- UINT8 voice_ctrl;
- UINT16 freq_ctrl;
- UINT32 start_addr;
- UINT32 end_addr;
- UINT8 vol_ramp_rate;
- UINT8 vol_ramp_start;
- UINT8 vol_ramp_end;
- UINT16 current_vol;
- UINT32 current_addr;
- UINT8 pan_position;
- UINT8 vol_ramp_ctrl;
- UINT32 vol_count;
+ uint8_t voice_ctrl;
+ uint16_t freq_ctrl;
+ uint32_t start_addr;
+ uint32_t end_addr;
+ uint8_t vol_ramp_rate;
+ uint8_t vol_ramp_start;
+ uint8_t vol_ramp_end;
+ uint16_t current_vol;
+ uint32_t current_addr;
+ uint8_t pan_position;
+ uint8_t vol_ramp_ctrl;
+ uint32_t vol_count;
bool rollover;
- INT16 sample; // current sample data
+ int16_t sample; // current sample data
};
class gf1_device :
@@ -121,7 +121,7 @@ class gf1_device :
{
public:
// construction/destruction
- gf1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ gf1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class _Object> static devcb_base &set_txirq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_txirq_handler.set_callback(object); }
template<class _Object> static devcb_base &set_rxirq_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_rxirq_handler.set_callback(object); }
@@ -136,10 +136,10 @@ public:
template<class _Object> static devcb_base &set_nmi_handler(device_t &device, _Object object) { return downcast<gf1_device &>(device).m_nmi_handler.set_callback(object); }
// current IRQ/DMA channel getters
- UINT8 gf1_irq() { if(m_gf1_irq != 0) return m_gf1_irq; else return m_midi_irq; } // workaround for win95 loading dumb values
- UINT8 midi_irq() { if(m_irq_combine == 0) return m_midi_irq; else return m_gf1_irq; }
- UINT8 dma_channel1() { return m_dma_channel1; }
- UINT8 dma_channel2() { if(m_dma_combine == 0) return m_dma_channel2; else return m_dma_channel1; }
+ uint8_t gf1_irq() { if(m_gf1_irq != 0) return m_gf1_irq; else return m_midi_irq; } // workaround for win95 loading dumb values
+ uint8_t midi_irq() { if(m_irq_combine == 0) return m_midi_irq; else return m_gf1_irq; }
+ uint8_t dma_channel1() { return m_dma_channel1; }
+ uint8_t dma_channel2() { if(m_dma_combine == 0) return m_dma_channel2; else return m_dma_channel1; }
DECLARE_READ8_MEMBER(global_reg_select_r);
DECLARE_WRITE8_MEMBER(global_reg_select_w);
@@ -160,8 +160,8 @@ public:
DECLARE_WRITE8_MEMBER(sb2x6_w);
// DMA signals
- UINT8 dack_r(int line);
- void dack_w(int line,UINT8 data);
+ uint8_t dack_r(int line);
+ void dack_w(int line,uint8_t data);
void eop_w(int state);
// optional information overrides
@@ -172,26 +172,26 @@ public:
gus_voice m_voice[32];
// global registers (not voice-specific)
- UINT8 m_dma_dram_ctrl;
- UINT16 m_dma_start_addr;
- UINT32 m_dram_addr;
- UINT8 m_timer_ctrl;
- UINT8 m_timer1_count;
- UINT8 m_timer2_count;
- UINT8 m_timer1_value;
- UINT8 m_timer2_value;
- UINT16 m_sampling_freq;
- UINT8 m_sampling_ctrl;
- UINT8 m_joy_trim_dac;
- UINT8 m_reset;
- UINT8 m_active_voices;
- UINT8 m_irq_source;
-
- void set_irq(UINT8 source, UINT8 voice);
- void reset_irq(UINT8 source);
+ uint8_t m_dma_dram_ctrl;
+ uint16_t m_dma_start_addr;
+ uint32_t m_dram_addr;
+ uint8_t m_timer_ctrl;
+ uint8_t m_timer1_count;
+ uint8_t m_timer2_count;
+ uint8_t m_timer1_value;
+ uint8_t m_timer2_value;
+ uint16_t m_sampling_freq;
+ uint8_t m_sampling_ctrl;
+ uint8_t m_joy_trim_dac;
+ uint8_t m_reset;
+ uint8_t m_active_voices;
+ uint8_t m_irq_source;
+
+ void set_irq(uint8_t source, uint8_t voice);
+ void reset_irq(uint8_t source);
void update_volume_ramps();
- std::vector<UINT8> m_wave_ram;
+ std::vector<uint8_t> m_wave_ram;
protected:
// device-level overrides
@@ -210,36 +210,36 @@ private:
emu_timer* m_dmatimer;
emu_timer* m_voltimer;
- UINT8 m_current_voice;
- UINT8 m_current_reg;
- //UINT8 m_port;
- //UINT8 m_irq;
- //UINT8 m_dma;
-
- UINT8 m_adlib_cmd;
- UINT8 m_mix_ctrl;
- UINT8 m_gf1_irq;
- UINT8 m_midi_irq;
- UINT8 m_dma_channel1;
- UINT8 m_dma_channel2;
- UINT8 m_irq_combine;
- UINT8 m_dma_combine;
- UINT8 m_adlib_timer_cmd;
- UINT8 m_adlib_timer1_enable;
- UINT8 m_adlib_timer2_enable;
- UINT8 m_adlib_status;
- UINT8 m_adlib_data;
- UINT8 m_voice_irq_fifo[32];
- UINT8 m_voice_irq_ptr;
- UINT8 m_voice_irq_current;
- UINT8 m_dma_16bit; // set by bit 6 of the DMA DRAM control reg
- UINT8 m_statread;
- UINT8 m_sb_data_2xc;
- UINT8 m_sb_data_2xe;
- UINT8 m_reg_ctrl;
- UINT8 m_fake_adlib_status;
- UINT32 m_dma_current;
- UINT16 m_volume_table[4096];
+ uint8_t m_current_voice;
+ uint8_t m_current_reg;
+ //uint8_t m_port;
+ //uint8_t m_irq;
+ //uint8_t m_dma;
+
+ uint8_t m_adlib_cmd;
+ uint8_t m_mix_ctrl;
+ uint8_t m_gf1_irq;
+ uint8_t m_midi_irq;
+ uint8_t m_dma_channel1;
+ uint8_t m_dma_channel2;
+ uint8_t m_irq_combine;
+ uint8_t m_dma_combine;
+ uint8_t m_adlib_timer_cmd;
+ uint8_t m_adlib_timer1_enable;
+ uint8_t m_adlib_timer2_enable;
+ uint8_t m_adlib_status;
+ uint8_t m_adlib_data;
+ uint8_t m_voice_irq_fifo[32];
+ uint8_t m_voice_irq_ptr;
+ uint8_t m_voice_irq_current;
+ uint8_t m_dma_16bit; // set by bit 6 of the DMA DRAM control reg
+ uint8_t m_statread;
+ uint8_t m_sb_data_2xc;
+ uint8_t m_sb_data_2xe;
+ uint8_t m_reg_ctrl;
+ uint8_t m_fake_adlib_status;
+ uint32_t m_dma_current;
+ uint16_t m_volume_table[4096];
static const device_timer_id ADLIB_TIMER1 = 0;
static const device_timer_id ADLIB_TIMER2 = 1;
@@ -267,11 +267,11 @@ class isa16_gus_device :
public device_isa16_card_interface
{
public:
- isa16_gus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- void set_irq(UINT8 source);
- void reset_irq(UINT8 source);
- void set_midi_irq(UINT8 source);
- void reset_midi_irq(UINT8 source);
+ isa16_gus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ void set_irq(uint8_t source);
+ void reset_irq(uint8_t source);
+ void set_midi_irq(uint8_t source);
+ void reset_midi_irq(uint8_t source);
DECLARE_READ8_MEMBER(board_r);
DECLARE_READ8_MEMBER(synth_r);
@@ -295,8 +295,8 @@ public:
DECLARE_WRITE_LINE_MEMBER(write_acia_clock);
// DMA overrides
- virtual UINT8 dack_r(int line) override;
- virtual void dack_w(int line,UINT8 data) override;
+ virtual uint8_t dack_r(int line) override;
+ virtual void dack_w(int line,uint8_t data) override;
virtual void eop_w(int state) override;
// optional information overrides
@@ -312,7 +312,7 @@ protected:
private:
required_device<gf1_device> m_gf1;
- UINT8 m_irq_status;
+ uint8_t m_irq_status;
attotime m_joy_time;
};